From 361dba595d54eb142480855a7d479bb7a6c3a924 Mon Sep 17 00:00:00 2001 From: "colin.liang" Date: Thu, 12 Jan 2023 19:55:50 +0800 Subject: [PATCH] remove compressed_instr. --- picorv32.v | 16 +++++----------- 1 file changed, 5 insertions(+), 11 deletions(-) diff --git a/picorv32.v b/picorv32.v index 8de3891..e6f6e4b 100644 --- a/picorv32.v +++ b/picorv32.v @@ -371,7 +371,6 @@ module picorv32 #( reg decoder_trigger_q; reg decoder_pseudo_trigger; reg decoder_pseudo_trigger_q; - reg compressed_instr; reg is_lui_auipc_jal; reg is_lb_lh_lw_lbu_lhu; @@ -608,8 +607,6 @@ module picorv32 #( if (mem_rdata_latched[6:0] == 7'b0001011 && mem_rdata_latched[31:25] == 7'b0000010) decoded_rs1 <= irqregs_offset; // instr_retirq - - compressed_instr <= 0; end if (decoder_trigger && !decoder_pseudo_trigger) begin @@ -772,7 +769,6 @@ module picorv32 #( reg latched_store; reg latched_stalu; reg latched_branch; - reg latched_compr; reg latched_trace; reg latched_is_lu; reg latched_is_lh; @@ -843,7 +839,7 @@ module picorv32 #( (* parallel_case *) case (1'b1) latched_branch: begin - cpuregs_wrdata = reg_pc + (latched_compr ? 2 : 4); + cpuregs_wrdata = reg_pc + 4; cpuregs_write = 1; end latched_store && !latched_branch: begin @@ -851,7 +847,7 @@ module picorv32 #( cpuregs_write = 1; end irq_state[0]: begin - cpuregs_wrdata = reg_next_pc | latched_compr; + cpuregs_wrdata = reg_next_pc; cpuregs_write = 1; end irq_state[1]: begin @@ -972,7 +968,7 @@ module picorv32 #( `debug($display( "ST_RD: %2d 0x%08x, BRANCH 0x%08x", latched_rd, - reg_pc + (latched_compr ? 2 : 4), + reg_pc + 4, current_pc );) end @@ -1009,23 +1005,21 @@ module picorv32 #( latched_is_lh <= 0; latched_is_lb <= 0; latched_rd <= decoded_rd; - latched_compr <= compressed_instr; if (((decoder_trigger && !irq_active && !irq_delay && |(irq_pending & ~irq_mask)) || irq_state)) begin irq_state <= irq_state == 2'b00 ? 2'b01 : irq_state == 2'b01 ? 2'b10 : 2'b00; - latched_compr <= latched_compr; latched_rd <= irqregs_offset | irq_state[0]; end else if ((decoder_trigger || do_waitirq) && instr_waitirq) begin if (irq_pending) begin latched_store <= 1; reg_out <= irq_pending; - reg_next_pc <= current_pc + (compressed_instr ? 2 : 4); + reg_next_pc <= current_pc + 4; mem_do_rinst <= 1; end else do_waitirq <= 1; end else if (decoder_trigger) begin `debug($display("-- %-0t", $time);) irq_delay <= irq_active; - reg_next_pc <= current_pc + (compressed_instr ? 2 : 4); + reg_next_pc <= current_pc + 4; if (ENABLE_TRACE) latched_trace <= 1; count_instr <= count_instr + 1; if (instr_jal) begin