Added "make test_sp"

.gitignore

@@ -15,6 +15,7 @@
 /dhrystone/*.d
 /dhrystone/*.o
 /testbench.exe
+/testbench_sp.exe
 /testbench_axi.exe
 /testbench.vcd
 .*.swp

Makefile

@@ -5,6 +5,9 @@ FIRMWARE_OBJS = firmware/start.o firmware/irq.o firmware/print.o firmware/sieve.
 test: testbench.exe firmware/firmware.hex
 	vvp -N testbench.exe
 
+test_sp: testbench_sp.exe firmware/firmware.hex
+	vvp -N testbench_sp.exe
+
 test_axi: testbench_axi.exe firmware/firmware.hex
 	vvp -N testbench_axi.exe
 
@@ -12,6 +15,10 @@ testbench.exe: testbench.v picorv32.v
 	iverilog -o testbench.exe testbench.v picorv32.v
 	chmod -x testbench.exe
 
+testbench_sp.exe: testbench.v picorv32.v
+	iverilog -o testbench_sp.exe -DSP_TEST testbench.v picorv32.v
+	chmod -x testbench_sp.exe
+
 testbench_axi.exe: testbench.v picorv32.v
 	iverilog -o testbench_axi.exe -DAXI_TEST testbench.v picorv32.v
 	chmod -x testbench_axi.exe
@@ -41,8 +48,8 @@ tests/%.o: tests/%.S tests/riscv_test.h tests/test_macros.h
 
 clean:
 	rm -vrf $(TEST_OBJS) firmware/firmware.elf firmware/firmware.bin firmware/firmware.hex \
-		firmware/firmware.map testbench.exe testbench.vcd .Xil fsm_encoding.os \
+		firmware/firmware.map testbench*.exe testbench.vcd .Xil fsm_encoding.os \
 		synth_vivado.log synth_vivado_*.backup.log synth_vivado.v
 
-.PHONY: test test_axi clean
+.PHONY: test test_sp test_axi clean
 

testbench.v

@@ -45,6 +45,9 @@ module testbench;
 	reg  [31:0] mem_axi_rdata;
 
 	picorv32_axi #(
+`ifdef SP_TEST
+		.ENABLE_REGS_DUALPORT(0),
+`endif
 		.ENABLE_MUL(1),
 		.ENABLE_IRQ(1)
 	) uut (