icestorm sim improvements
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@ -28,16 +28,47 @@ example_tb.exe: example_tb.v example.v firmware.hex
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iverilog -o example_tb.exe -s testbench example.v example_tb.v ../../picorv32.v
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chmod -x example_tb.exe
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sim: example_tb.exe
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vvp -N example_tb.exe # +vcd
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example_sim: example_tb.exe
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vvp -N example_tb.exe
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example_sim_vcd: example_tb.exe
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vvp -N example_tb.exe +vcd
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synth_tb.exe: example_tb.v synth.blif
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iverilog -o synth_tb.exe -s testbench synth.v example_tb.v /usr/local/share/yosys/ice40/cells_sim.v
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chmod -x synth_tb.exe
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synth_sim: synth_tb.exe
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vvp -N synth_tb.exe
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synth_sim_vcd: synth_tb.exe
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vvp -N synth_tb.exe +vcd
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route.v: example.txt
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icebox_vlog -L -n top -sp example.pcf example.txt > route.v
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route_tb.exe: example_tb.v route.v
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iverilog -o route_tb.exe -s testbench route.v example_tb.v /usr/local/share/yosys/ice40/cells_sim.v
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chmod -x route_tb.exe
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route_sim: route_tb.exe
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vvp -N route_tb.exe
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route_sim_vcd: route_tb.exe
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vvp -N route_tb.exe +vcd
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prog_sram:
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iceprog -S example.bin
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view:
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gtkwave example.vcd example.gtkw
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clean:
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rm -f firmware.elf firmware.map firmware.bin firmware.hex
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rm -f synth.log synth.v synth.blif example.txt example.bin
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rm -f example_tb.exe example.vcd
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rm -f synth.log synth.v synth.blif route.v example.txt example.bin
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rm -f example_tb.exe synth_tb.exe route_tb.exe example.vcd
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.PHONY: all sim prog_sram clean
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.PHONY: all prog_sram view clean
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.PHONY: example_sim synth_sim route_sim
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.PHONY: example_sim_vcd synth_sim_vcd route_sim_vcd
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@ -24,7 +24,7 @@ module testbench;
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end
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$monitor(LED7, LED6, LED5, LED4, LED3, LED2, LED1, LED0);
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repeat (10000000) @(posedge clk_pin);
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repeat (10000) @(posedge clk_pin);
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$finish;
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end
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endmodule
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@ -1,5 +1,6 @@
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#include <stdint.h>
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// use SHIFT_COUNTER_BITS=4 for simulation
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#define SHIFT_COUNTER_BITS 16
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void output(uint8_t c)
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