PicoSoC QSPI and XIP now working (tested in hardware)
This commit is contained in:
Clifford Wolf
parent
2cc1256ce7
commit
7639e6ebac
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@ -14,7 +14,7 @@ extern uint32_t sram;
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extern uint32_t flashio_worker_begin;
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extern uint32_t flashio_worker_end;
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void flashio(uint8_t *data, int len)
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void flashio(uint8_t *data, int len, uint8_t wrencmd)
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{
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uint32_t func[&flashio_worker_end - &flashio_worker_begin];
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@ -24,7 +24,17 @@ void flashio(uint8_t *data, int len)
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while (src_ptr != &flashio_worker_end)
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*(dst_ptr++) = *(src_ptr++);
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((void(*)(uint8_t*, int))func)(data, len);
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((void(*)(uint8_t*, uint32_t, uint32_t))func)(data, len, wrencmd);
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}
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void set_quad_spi_flag()
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{
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uint32_t addr = 0x800002;
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uint8_t buffer_rd[6] = {0x65, addr >> 16, addr >> 8, addr, 0, 0};
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flashio(buffer_rd, 6, 0);
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uint8_t buffer_wr[5] = {0x71, addr >> 16, addr >> 8, addr, buffer_rd[5] | 2};
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flashio(buffer_wr, 5, 0x06);
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}
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// --------------------------------------------------------
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@ -114,10 +124,10 @@ char getchar()
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// --------------------------------------------------------
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void cmd_read_spi_flash_id()
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void cmd_read_flash_id()
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{
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uint8_t buffer[17] = { 0x9F, /* zeros */ };
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flashio(buffer, 17);
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flashio(buffer, 17, 0);
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for (int i = 1; i <= 16; i++) {
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putchar(' ');
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@ -128,10 +138,10 @@ void cmd_read_spi_flash_id()
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// --------------------------------------------------------
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uint8_t cmd_read_spi_flash_regs_print(uint32_t addr, const char *name)
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uint8_t cmd_read_flash_regs_print(uint32_t addr, const char *name)
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{
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uint8_t buffer[6] = {0x65, addr >> 16, addr >> 8, addr, 0, 0};
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flashio(buffer, 6);
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flashio(buffer, 6, 0);
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print("0x");
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print_hex(addr, 6);
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@ -144,15 +154,15 @@ uint8_t cmd_read_spi_flash_regs_print(uint32_t addr, const char *name)
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return buffer[5];
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}
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void cmd_read_spi_flash_regs()
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void cmd_read_flash_regs()
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{
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print("\n");
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uint8_t sr1v = cmd_read_spi_flash_regs_print(0x800000, "SR1V");
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uint8_t sr2v = cmd_read_spi_flash_regs_print(0x800001, "SR2V");
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uint8_t cr1v = cmd_read_spi_flash_regs_print(0x800002, "CR1V");
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uint8_t cr2v = cmd_read_spi_flash_regs_print(0x800003, "CR2V");
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uint8_t cr3v = cmd_read_spi_flash_regs_print(0x800004, "CR3V");
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uint8_t vdlp = cmd_read_spi_flash_regs_print(0x800005, "VDLP");
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uint8_t sr1v = cmd_read_flash_regs_print(0x800000, "SR1V");
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uint8_t sr2v = cmd_read_flash_regs_print(0x800001, "SR2V");
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uint8_t cr1v = cmd_read_flash_regs_print(0x800002, "CR1V");
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uint8_t cr2v = cmd_read_flash_regs_print(0x800003, "CR2V");
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uint8_t cr3v = cmd_read_flash_regs_print(0x800004, "CR3V");
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uint8_t vdlp = cmd_read_flash_regs_print(0x800005, "VDLP");
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}
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// --------------------------------------------------------
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@ -212,6 +222,8 @@ void cmd_benchmark()
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void main()
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{
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reg_uart_clkdiv = 104;
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set_quad_spi_flag();
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while (getchar_prompt("Press ENTER to continue..\n") != '\r') { /* wait */ }
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print("\n");
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@ -227,15 +239,15 @@ void main()
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print("\n");
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print("SPI State:\n");
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print(" LATENCY ");
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print_dec((reg_spictrl >> 16) & 15);
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print("\n");
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print(" DDR ");
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if ((reg_spictrl & (1 << 22)) != 0)
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print("ON");
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print("ON\n");
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else
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print("OFF");
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print(" (latency=");
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print_dec((reg_spictrl >> 16) & 15);
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print(")\n");
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print("OFF\n");
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print(" QSPI ");
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if ((reg_spictrl & (1 << 21)) != 0)
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@ -271,10 +283,10 @@ void main()
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switch (cmd)
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{
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case '1':
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cmd_read_spi_flash_id();
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cmd_read_flash_id();
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break;
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case '2':
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cmd_read_spi_flash_regs();
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cmd_read_flash_regs();
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break;
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case '3':
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reg_spictrl ^= 1 << 22;
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@ -27,7 +27,7 @@ module testbench;
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$dumpfile("testbench.vcd");
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$dumpvars(0, testbench);
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repeat (100000) @(posedge clk);
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repeat (200000) @(posedge clk);
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$finish;
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end
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@ -42,6 +42,7 @@ module spiflash (
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inout io3
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);
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localparam verbose = 0;
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localparam integer latency = 8;
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reg [7:0] buffer;
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integer bitcount = 0;
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@ -148,7 +149,7 @@ module spiflash (
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if (bytecount == 5) begin
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xip_cmd = (buffer == 8'h a5) ? spi_cmd : 8'h 00;
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mode = mode_qspi_wr;
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dummycount = 1;
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dummycount = latency;
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end
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if (bytecount >= 5) begin
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@ -173,7 +174,7 @@ module spiflash (
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if (bytecount == 5) begin
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xip_cmd = (buffer == 8'h a5) ? spi_cmd : 8'h 00;
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mode = mode_qspi_ddr_wr;
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dummycount = 1;
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dummycount = latency;
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end
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if (bytecount >= 5) begin
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@ -45,6 +45,7 @@ j loop
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flashio_worker_begin:
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# a0 ... data pointer
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# a1 ... data length
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# a2 ... optional WREN cmd (0 = disable)
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# address of SPI ctrl reg
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li t0, 0x02000000
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@ -54,8 +55,22 @@ li t1, 0x120
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sh t1, 0(t0)
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# Enable Manual SPI Ctrl
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li t1, 0x00
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sb t1, 3(t0)
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sb zero, 3(t0)
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# Send optional WREN cmd
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beqz a2, flashio_worker_L1
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li t5, 8
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andi t2, a2, 0xff
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flashio_worker_L4:
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srli t4, t2, 7
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sb t4, 0(t0)
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ori t4, t4, 0x10
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sb t4, 0(t0)
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slli t2, t2, 1
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andi t2, t2, 0xff
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addi t5, t5, -1
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bnez t5, flashio_worker_L4
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sb t1, 0(t0)
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# SPI transfer
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flashio_worker_L1:
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