Improved IRQ documentation, added assembler macros
This commit is contained in:
Clifford Wolf
parent
792baeabcf
commit
818faffe25
6
Makefile
6
Makefile
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@ -47,9 +47,9 @@ tests/%.o: tests/%.S tests/riscv_test.h tests/test_macros.h
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-DTEST_FUNC_TXT='"$(notdir $(basename $<))"' -DTEST_FUNC_RET=$(notdir $(basename $<))_ret $<
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clean:
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rm -vrf $(TEST_OBJS) firmware/firmware.elf firmware/firmware.bin firmware/firmware.hex \
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firmware/firmware.map testbench*.exe testbench.vcd .Xil fsm_encoding.os \
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synth_vivado.log synth_vivado_*.backup.log synth_vivado.v
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rm -vrf $(FIRMWARE_OBJS) $(TEST_OBJS) \
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firmware/firmware.{elf,bin,hex,map} \
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testbench{,_sp,_axi}.exe testbench.vcd
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.PHONY: test test_sp test_axi clean
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66
README.md
66
README.md
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@ -206,53 +206,51 @@ one bit is set in `q1`.
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Registers `q2` and `q3` are uninitialized and can be used as temporary storage
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when saving/restoring register values in the IRQ handler.
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All of the following instructions are encoded under the `custom0` opcode.
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All of the following instructions are encoded under the `custom0` opcode. The f3
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and rs2 fields are ignored in all this instructions.
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See [firmware/custom_ops.S](firmware/custom_ops.S) for GNU assembler macros that
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implement mnemonics for this instructions.
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See [firmware/start.S](firmware/start.S) for an example implementaion of an
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interrupt handler assember wrapper, and [firmware/irq.c](firmware/irq.c) for
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the actual interrupt handler.
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#### getq rd, qs
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This instruction copies the value from a q-register to a general-purpose
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register.
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0000000 00000 000XX 000 XXXXX 0001011
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0000000 ----- 000XX --- XXXXX 0001011
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f7 rs2 qs f3 rd opcode
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Example assembler code using the `custom0` mnemonic:
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Example:
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| Instruction | Assember Code |
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| ------------------| --------------------|
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| getq x5, q2 | custom0 5, 2, 0, 0 |
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| getq x3, q0 | custom0 3, 0, 0, 0 |
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| getq x1, q3 | custom0 1, 3, 0, 0 |
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getq x5, q2
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#### setq qd, rs
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This instruction copies the value from a general-purpose register to a
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q-register.
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0000001 00000 XXXXX 000 000XX 0001011
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0000001 ----- XXXXX --- 000XX 0001011
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f7 rs2 rs f3 qd opcode
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Example assembler code using the `custom0` mnemonic:
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Example:
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| Instruction | Assember Code |
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| ------------------| --------------------|
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| setq q2, x5 | custom0 2, 5, 0, 1 |
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| setq q0, x3 | custom0 0, 3, 0, 1 |
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| setq q3, x1 | custom0 3, 1, 0, 1 |
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setq q2, x5
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#### retirq
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Return from interrupt. This instruction copies the value from `q0`
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to the program counter and re-enables interrupts.
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0000010 00000 00000 000 00000 0001011
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0000010 ----- 00000 --- 00000 0001011
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f7 rs2 rs f3 rd opcode
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Example assembler code using the `custom0` mnemonic:
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Example:
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| Instruction | Assember Code |
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| ------------------| --------------------|
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| retirq | custom0 0, 0, 0, 2 |
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retirq
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#### maskirq
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@ -260,14 +258,12 @@ The "IRQ Mask" register contains a bitmask of masked (disabled) interrupts.
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This instruction writes a new value to the irq mask register and reads the old
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value.
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0000011 00000 XXXXX 000 XXXXX 0001011
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0000011 ----- XXXXX --- XXXXX 0001011
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f7 rs2 rs f3 rd opcode
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Example assembler code using the `custom0` mnemonic:
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Example:
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| Instruction | Assember Code |
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| ------------------| --------------------|
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| maskirq x1, x2 | custom0 1, 2, 0, 3 |
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maskirq x1, x2
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The processor starts with all interrupts disabled.
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@ -276,17 +272,15 @@ interrupt is disabled will cause the processor to halt.
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#### waitirq
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Pause execution until an interrupt triggers. The bitmask of pending IRQs is
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written to `rd`.
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Pause execution until an interrupt becomes pending. The bitmask of pending IRQs
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is written to `rd`.
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0000100 00000 00000 000 XXXXX 0001011
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0000100 ----- 00000 --- XXXXX 0001011
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f7 rs2 rs f3 rd opcode
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Example assembler code using the `custom0` mnemonic:
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Example:
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| Instruction | Assember Code |
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| ------------------| --------------------|
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| waitirq x1 | custom0 1, 0, 0, 4 |
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waitirq x1
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#### timer
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@ -295,14 +289,12 @@ triggers the timer interrupt when transitioning from 1 to 0. Setting the
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counter to zero disables the timer. The old value of the counter is written to
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`rd`.
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0000101 00000 XXXXX 000 XXXXX 0001011
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0000101 ----- XXXXX --- XXXXX 0001011
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f7 rs2 rs f3 rd opcode
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Example assembler code using the `custom0` mnemonic:
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Example:
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| Instruction | Assember Code |
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| ------------------| --------------------|
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| timer x1, x2 | custom0 1, 2, 0, 5 |
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timer x1, x2
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Building a pure RV32I Toolchain:
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@ -0,0 +1,36 @@
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// This is free and unencumbered software released into the public domain.
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//
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// Anyone is free to copy, modify, publish, use, compile, sell, or
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// distribute this software, either in source code form or as a compiled
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// binary, for any purpose, commercial or non-commercial, and by any
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// means.
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#define q0 0
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#define q1 1
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#define q2 2
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#define q3 3
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.macro getq rd qs
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custom0 \rd,\qs,0,0
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.endm
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.macro setq qd rs
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custom0 \qd,\rs,0,1
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.endm
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.macro retirq
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custom0 0,0,0,2
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.endm
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.macro maskirq rd rs
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custom0 \rd,\rs,0,3
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.endm
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.macro waitirq rd
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custom0 \rd,0,0,4
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.endm
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.macro timer rd rs
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custom0 \rd,\rs,0,5
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.endm
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@ -1,3 +1,10 @@
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// This is free and unencumbered software released into the public domain.
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//
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// Anyone is free to copy, modify, publish, use, compile, sell, or
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// distribute this software, either in source code form or as a compiled
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// binary, for any purpose, commercial or non-commercial, and by any
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// means.
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#ifndef FIRMWARE_H
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#define FIRMWARE_H
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@ -1,3 +1,9 @@
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// This is free and unencumbered software released into the public domain.
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//
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// Anyone is free to copy, modify, publish, use, compile, sell, or
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// distribute this software, either in source code form or as a compiled
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// binary, for any purpose, commercial or non-commercial, and by any
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// means.
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#include "firmware.h"
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@ -1,4 +1,11 @@
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#!/usr/bin/python3
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#
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# This is free and unencumbered software released into the public domain.
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#
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# Anyone is free to copy, modify, publish, use, compile, sell, or
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# distribute this software, either in source code form or as a compiled
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# binary, for any purpose, commercial or non-commercial, and by any
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# means.
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from sys import argv
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@ -1,3 +1,10 @@
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// This is free and unencumbered software released into the public domain.
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//
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// Anyone is free to copy, modify, publish, use, compile, sell, or
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// distribute this software, either in source code form or as a compiled
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// binary, for any purpose, commercial or non-commercial, and by any
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// means.
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#include "firmware.h"
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uint32_t xorshift32() {
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@ -1,3 +1,9 @@
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// This is free and unencumbered software released into the public domain.
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//
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// Anyone is free to copy, modify, publish, use, compile, sell, or
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// distribute this software, either in source code form or as a compiled
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// binary, for any purpose, commercial or non-commercial, and by any
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// means.
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#include "firmware.h"
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@ -1,3 +1,12 @@
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/*
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This is free and unencumbered software released into the public domain.
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Anyone is free to copy, modify, publish, use, compile, sell, or
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distribute this software, either in source code form or as a compiled
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binary, for any purpose, commercial or non-commercial, and by any
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means.
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*/
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SECTIONS {
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.memory : {
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. = 0x000000;
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@ -1,3 +1,10 @@
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// This is free and unencumbered software released into the public domain.
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//
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// Anyone is free to copy, modify, publish, use, compile, sell, or
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// distribute this software, either in source code form or as a compiled
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// binary, for any purpose, commercial or non-commercial, and by any
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// means.
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// A simple Sieve of Eratosthenes
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#include "firmware.h"
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@ -1,8 +1,17 @@
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// This is free and unencumbered software released into the public domain.
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//
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// Anyone is free to copy, modify, publish, use, compile, sell, or
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// distribute this software, either in source code form or as a compiled
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// binary, for any purpose, commercial or non-commercial, and by any
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// means.
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#define ENABLE_RVTST
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#define ENABLE_SIEVE
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#define ENABLE_MULTST
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#define ENABLE_STATS
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#include "custom_ops.S"
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.section .text
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.global irq
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.global sieve
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@ -13,43 +22,33 @@
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.global hard_mulhu
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.global stats
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#ifdef ENABLE_RVTST
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# define TEST(n) \
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.global n; \
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addi x1, zero, 1000; \
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custom0 0,1,0,5; /* timer zero, x1 */ \
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jal zero,n; \
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.global n ## _ret; \
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n ## _ret:
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#else
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# define TEST(n) \
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.global n ## _ret; \
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n ## _ret:
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#endif
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reset_vec:
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custom0 0,0,0,4 // waitirq zero
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custom0 0,0,0,3 // maskirq zero, zero
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// no more than 16 bytes here !
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waitirq zero
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maskirq zero, zero
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j start
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nop
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nop
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/* Interrupt handler
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**********************************/
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.balign 16
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irq_vec:
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/* save registers */
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custom0 2,1,0,1 // setq q2, x1
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custom0 3,2,0,1 // setq q3, x2
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setq q2, x1
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setq q3, x2
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lui x1, %hi(irq_regs)
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addi x1, x1, %lo(irq_regs)
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custom0 2,0,0,0 // getq x2, q0
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getq x2, q0
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sw x2, 0*4(x1)
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custom0 2,2,0,0 // getq x2, q2
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getq x2, q2
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sw x2, 1*4(x1)
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custom0 2,3,0,0 // getq x2, q3
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getq x2, q3
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sw x2, 2*4(x1)
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sw x3, 3*4(x1)
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@ -82,19 +81,19 @@ irq_vec:
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sw x30, 30*4(x1)
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sw x31, 31*4(x1)
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/* call interrupt handler */
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/* call interrupt handler C function */
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lui sp, %hi(irq_stack_top)
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addi sp, sp, %lo(irq_stack_top)
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lui sp, %hi(irq_stack)
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addi sp, sp, %lo(irq_stack)
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// arg0 = address of regs
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lui a0, %hi(irq_regs)
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addi a0, a0, %lo(irq_regs)
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// arg1 = interrupt type
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custom0 11,1,0,0 // getq x11, q1
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getq x11, q1
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// call to c function
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// call to C function
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jal ra, irq
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/* restore registers */
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@ -103,13 +102,13 @@ irq_vec:
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addi x1, x1, %lo(irq_regs)
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lw x2, 0*4(x1)
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custom0 0,2,0,1 // setq q0, x2
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setq q0, x2
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lw x2, 1*4(x1)
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custom0 1,2,0,1 // setq q1, x2
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setq q1, x2
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lw x2, 2*4(x1)
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custom0 2,2,0,1 // setq q2, x2
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setq q2, x2
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lw x3, 3*4(x1)
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lw x4, 4*4(x1)
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@ -141,21 +140,27 @@ irq_vec:
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lw x30, 30*4(x1)
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lw x31, 31*4(x1)
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custom0 1,1,0,0 // getq x1, q1
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custom0 2,2,0,0 // getq x2, q2
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getq x1, q1
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getq x2, q2
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custom0 0,0,0,2 // retirq
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retirq
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irq_regs:
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// registers are saved to this memory region
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// registers are saved to this memory region during interrupt handling
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// the program counter is saved as register 0
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.fill 32,4
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irq_stack:
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// stack for the interrupt handler
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.fill 128,4
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irq_stack_top:
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irq_stack:
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/* Main program
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**********************************/
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start:
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/* zero-initialize all registers */
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addi x1, zero, 0
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addi x2, zero, 0
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addi x3, zero, 0
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@ -188,6 +193,22 @@ start:
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addi x30, zero, 0
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addi x31, zero, 0
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/* running tests from riscv-tests */
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#ifdef ENABLE_RVTST
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# define TEST(n) \
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.global n; \
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addi x1, zero, 1000; \
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timer zero, x1; \
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jal zero,n; \
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.global n ## _ret; \
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n ## _ret:
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#else
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# define TEST(n) \
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.global n ## _ret; \
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n ## _ret:
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#endif
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TEST(lui)
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TEST(auipc)
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TEST(j)
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@ -1,3 +1,10 @@
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// This is free and unencumbered software released into the public domain.
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//
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// Anyone is free to copy, modify, publish, use, compile, sell, or
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// distribute this software, either in source code form or as a compiled
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// binary, for any purpose, commercial or non-commercial, and by any
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// means.
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#include "firmware.h"
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static void stats_print_dec(int val, int digits, bool zero_pad)
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