Fix miscellaneous typos in documentation

README.md

@@ -661,7 +661,7 @@ By default calling any of those make targets will (re-)download the toolchain
 sources. Run `make download-tools` to download the sources to `/var/cache/distfiles/`
 once in advance.
 
-*Note: This instructions are for git rev 1b80cbe (2010-04-01) of riscv-gnu-toolchain.*
+*Note: These instructions are for git rev 1b80cbe (2018-01-31) of riscv-gnu-toolchain.*
 
 
 Linking binaries with newlib for PicoRV32

dhrystone/syscalls.c

@@ -1,5 +1,5 @@
 // An extremely minimalist syscalls.c for newlib
-// Based on riscv newlib libgloss/riscv/machine/syscall.h
+// Based on riscv newlib libgloss/riscv/sys_*.c
 // Written by Clifford Wolf.
 
 #include <sys/stat.h>

picosoc/README.md

@@ -53,7 +53,7 @@ physical SRAM will read from the corresponding addresses in serial flash.
 Reading from the UART Send/Recv Data Register will return the last received
 byte, or -1 (all 32 bits set) when the receive buffer is empty.
 
-The UART Clock Divider Register must be set to the system clock freuqency
+The UART Clock Divider Register must be set to the system clock frequency
 divided by the baud rate.
 
 The example design (hx8kdemo.v) has the 8 LEDs on the iCE40-HX8K Breakout Board

scripts/yosys-cmp/README.md

@@ -1,7 +1,7 @@
 
 Synthesis results for the PicoRV32 core (in its default configuration) with Yosys 0.5+383 (git sha1 8648089), Synplify Pro and Lattice LSE from iCEcube2.2014.08, and Xilinx Vivado 2015.3.
 
-No timing contraints where used for synthesis; only resource utilisation is compared.
+No timing constraints were used for synthesis; only resource utilisation is compared.
 
 Last updated: 2015-10-30