Minor changes and build fixes for new riscv-gnu-toolchain
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2
Makefile
2
Makefile
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@ -69,7 +69,7 @@ firmware/firmware.elf: $(FIRMWARE_OBJS) $(TEST_OBJS) firmware/sections.lds
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chmod -x $@
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firmware/start.o: firmware/start.S
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$(TOOLCHAIN_PREFIX)gcc -c -m32 -march=RV32IM$(COMPRESSED_ISA)Xcustom -o $@ $<
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$(TOOLCHAIN_PREFIX)gcc -c -m32 -march=RV32IM$(COMPRESSED_ISA) -o $@ $<
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firmware/%.o: firmware/%.c
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$(TOOLCHAIN_PREFIX)gcc -c -m32 -march=RV32I$(COMPRESSED_ISA) -Os --std=c99 $(GCC_WARNS) -ffreestanding -nostdlib -o $@ $<
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@ -19,13 +19,7 @@ RVTEST_CODE_BEGIN
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TEST_ST_OP( 2, lb, sb, 0xffffffaa, 0, tdat );
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TEST_ST_OP( 3, lb, sb, 0x00000000, 1, tdat );
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#ifdef __RISCVEL
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TEST_ST_OP( 4, lh, sb, 0xffffefa0, 2, tdat );
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#elif defined(__RISCVEB)
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#else
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TEST_ST_OP( 4, lh, sb, 0xffffa0ef, 2, tdat );
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#error unknown endianness!
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#endif
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TEST_ST_OP( 5, lb, sb, 0x0000000a, 3, tdat );
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# Test with negative offset
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@ -19,13 +19,7 @@ RVTEST_CODE_BEGIN
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TEST_ST_OP( 2, lh, sh, 0x000000aa, 0, tdat );
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TEST_ST_OP( 3, lh, sh, 0xffffaa00, 2, tdat );
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#ifdef __RISCVEL
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TEST_ST_OP( 4, lw, sh, 0xbeef0aa0, 4, tdat );
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#elif defined(__RISCVEB)
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#else
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TEST_ST_OP( 4, lw, sh, 0x0aa0beef, 4, tdat );
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#error unknown endianness!
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#endif
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TEST_ST_OP( 5, lh, sh, 0xffffa00a, 6, tdat );
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# Test with negative offset
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