Remove generic PicoSoC testbench
This commit is contained in:
Clifford Wolf
parent
8b5f2aeff3
commit
ae0e5a6c94
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@ -1,5 +1,3 @@
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/testbench.vcd
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/testbench.vvp
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/spiflash_tb.vcd
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/spiflash_tb.vvp
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/firmware.elf
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@ -13,3 +11,4 @@
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/hx8kdemo_syn.v
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/hx8kdemo_syn_tb.vvp
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/hx8kdemo_tb.vvp
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/testbench.vcd
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@ -1,27 +1,6 @@
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# ---- Generic Testbenches ----
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testbench: testbench.vvp firmware.hex
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vvp -N $<
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testbench.vvp: spiflash.v spimemio.v simpleuart.v testbench.v picosoc.v ../picorv32.v
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iverilog -s testbench -o $@ $^
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spiflash_tb: spiflash_tb.vvp firmware.hex
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vvp -N $<
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spiflash_tb.vvp: spiflash.v spiflash_tb.v
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iverilog -s testbench -o $@ $^
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# ---- iCE40 HX8K Breakout Board ----
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hx8kprog: hx8kdemo.bin firmware.bin
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iceprog hx8kdemo.bin
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iceprog -o 1M firmware.bin
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hx8kprog_fw: firmware.bin
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iceprog -o 1M firmware.bin
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hx8ksim: hx8kdemo_tb.vvp firmware.hex
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vvp -N $<
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@ -47,6 +26,13 @@ hx8kdemo.bin: hx8kdemo.asc
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icetime -d hx8k -c 12 -mtr hx8kdemo.rpt hx8kdemo.asc
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icepack hx8kdemo.asc hx8kdemo.bin
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hx8kprog: hx8kdemo.bin firmware.bin
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iceprog hx8kdemo.bin
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iceprog -o 1M firmware.bin
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hx8kprog_fw: firmware.bin
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iceprog -o 1M firmware.bin
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# ---- Example Firmware ----
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firmware.elf: sections.lds start.s firmware.c
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@ -58,6 +44,14 @@ firmware.hex: firmware.elf
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firmware.bin: firmware.elf
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riscv32-unknown-elf-objcopy -O binary firmware.elf /dev/stdout | tail -c +1048577 > firmware.bin
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# ---- Testbench for SPI Flash Model ----
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spiflash_tb: spiflash_tb.vvp firmware.hex
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vvp -N $<
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spiflash_tb.vvp: spiflash.v spiflash_tb.v
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iverilog -s testbench -o $@ $^
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# ---- Clean ----
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clean:
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@ -66,5 +60,5 @@ clean:
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rm -f hx8kdemo.blif hx8kdemo.log hx8kdemo.asc hx8kdemo.rpt hx8kdemo.bin
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rm -f hx8kdemo_syn.v hx8kdemo_syn_tb.vvp hx8kdemo_tb.vvp
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.PHONY: testbench spiflash_tb hx8kprog hx8kprog_fw hx8ksim hx8ksynsim clean
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.PHONY: spiflash_tb hx8kprog hx8kprog_fw hx8ksim hx8ksynsim clean
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@ -1,150 +0,0 @@
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/*
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* PicoSoC - A simple example SoC using PicoRV32
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*
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* Copyright (C) 2017 Clifford Wolf <clifford@clifford.at>
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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`timescale 1 ns / 1 ps
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module testbench;
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reg clk;
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always #5 clk = (clk === 1'b0);
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reg resetn = 0;
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integer cycles = 0;
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always @(posedge clk)
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cycles <= cycles + 1;
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initial begin
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$dumpfile("testbench.vcd");
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$dumpvars(0, testbench);
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repeat (100) @(posedge clk);
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resetn <= 1;
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repeat (100000) @(posedge clk);
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$display("");
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$display("[TIMEOUT]");
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$stop;
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end
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wire flash_csb;
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wire flash_clk;
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wire flash_io0;
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wire flash_io1;
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wire flash_io2;
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wire flash_io3;
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wire flash_io0_oe;
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wire flash_io1_oe;
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wire flash_io2_oe;
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wire flash_io3_oe;
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wire flash_io0_do;
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wire flash_io1_do;
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wire flash_io2_do;
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wire flash_io3_do;
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wire flash_io0_di = flash_io0;
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wire flash_io1_di = flash_io1;
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wire flash_io2_di = flash_io2;
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wire flash_io3_di = flash_io3;
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assign flash_io0 = flash_io0_oe ? flash_io0_do : 1'bz;
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assign flash_io1 = flash_io1_oe ? flash_io1_do : 1'bz;
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assign flash_io2 = flash_io2_oe ? flash_io2_do : 1'bz;
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assign flash_io3 = flash_io3_oe ? flash_io3_do : 1'bz;
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wire iomem_valid;
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reg iomem_ready;
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wire [3:0] iomem_wstrb;
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wire [31:0] iomem_addr;
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wire [31:0] iomem_wdata;
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reg [31:0] iomem_rdata;
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wire ser_tx_rx;
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reg [31:0] gpio;
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always @(posedge clk) begin
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iomem_ready <= 0;
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if (iomem_valid && !iomem_ready && iomem_addr[31:24] == 8'h 03) begin
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iomem_ready <= 1;
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iomem_rdata <= gpio;
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if (iomem_wstrb[0]) gpio[ 7: 0] <= iomem_wdata[ 7: 0];
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if (iomem_wstrb[1]) gpio[15: 8] <= iomem_wdata[15: 8];
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if (iomem_wstrb[2]) gpio[23:16] <= iomem_wdata[23:16];
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if (iomem_wstrb[3]) gpio[31:24] <= iomem_wdata[31:24];
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end
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end
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always @(gpio) begin
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$write("<GPIO:%02x>", gpio[7:0]);
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if (gpio == 63) begin
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$display("[OK]");
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$display("Finished after %0d cycles.", cycles);
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$finish;
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end
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if (gpio % 8 == 7) begin
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$display("");
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end
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end
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picosoc uut (
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.clk (clk ),
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.resetn (resetn ),
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.ser_tx (ser_tx_rx ),
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.ser_rx (ser_tx_rx ),
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.flash_csb (flash_csb ),
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.flash_clk (flash_clk ),
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.flash_io0_oe (flash_io0_oe),
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.flash_io1_oe (flash_io1_oe),
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.flash_io2_oe (flash_io2_oe),
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.flash_io3_oe (flash_io3_oe),
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.flash_io0_do (flash_io0_do),
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.flash_io1_do (flash_io1_do),
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.flash_io2_do (flash_io2_do),
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.flash_io3_do (flash_io3_do),
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.flash_io0_di (flash_io0_di),
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.flash_io1_di (flash_io1_di),
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.flash_io2_di (flash_io2_di),
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.flash_io3_di (flash_io3_di),
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.iomem_valid (iomem_valid ),
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.iomem_ready (iomem_ready ),
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.iomem_wstrb (iomem_wstrb ),
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.iomem_addr (iomem_addr ),
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.iomem_wdata (iomem_wdata ),
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.iomem_rdata (iomem_rdata )
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);
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spiflash spiflash (
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.csb(flash_csb),
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.clk(flash_clk),
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.io0(flash_io0),
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.io1(flash_io1),
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.io2(flash_io2),
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.io3(flash_io3)
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);
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endmodule
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