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Remove counter parameter. Default enable.

This commit is contained in:
colin.liang 2023-01-10 20:52:25 +08:00
parent f714dd5da4
commit b99c193120
1 changed files with 10 additions and 22 deletions
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26
picorv32.v
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@ -999,11 +999,11 @@ module picorv32 #(
instr_and <= is_alu_reg_reg && mem_rdata_q[14:12] == 3'b111 && mem_rdata_q[31:25] == 7'b0000000; instr_and <= is_alu_reg_reg && mem_rdata_q[14:12] == 3'b111 && mem_rdata_q[31:25] == 7'b0000000;
instr_rdcycle <= ((mem_rdata_q[6:0] == 7'b1110011 && mem_rdata_q[31:12] == 'b11000000000000000010) || instr_rdcycle <= ((mem_rdata_q[6:0] == 7'b1110011 && mem_rdata_q[31:12] == 'b11000000000000000010) ||
(mem_rdata_q[6:0] == 7'b1110011 && mem_rdata_q[31:12] == 'b11000000000100000010)) && ENABLE_COUNTERS; (mem_rdata_q[6:0] == 7'b1110011 && mem_rdata_q[31:12] == 'b11000000000100000010));
instr_rdcycleh <= ((mem_rdata_q[6:0] == 7'b1110011 && mem_rdata_q[31:12] == 'b11001000000000000010) || instr_rdcycleh <= ((mem_rdata_q[6:0] == 7'b1110011 && mem_rdata_q[31:12] == 'b11001000000000000010) ||
(mem_rdata_q[6:0] == 7'b1110011 && mem_rdata_q[31:12] == 'b11001000000100000010)) && ENABLE_COUNTERS && ENABLE_COUNTERS64; (mem_rdata_q[6:0] == 7'b1110011 && mem_rdata_q[31:12] == 'b11001000000100000010));
instr_rdinstr <= (mem_rdata_q[6:0] == 7'b1110011 && mem_rdata_q[31:12] == 'b11000000001000000010) && ENABLE_COUNTERS; instr_rdinstr <= (mem_rdata_q[6:0] == 7'b1110011 && mem_rdata_q[31:12] == 'b11000000001000000010);
instr_rdinstrh <= (mem_rdata_q[6:0] == 7'b1110011 && mem_rdata_q[31:12] == 'b11001000001000000010) && ENABLE_COUNTERS && ENABLE_COUNTERS64; instr_rdinstrh <= (mem_rdata_q[6:0] == 7'b1110011 && mem_rdata_q[31:12] == 'b11001000001000000010);
instr_ecall_ebreak <= ((mem_rdata_q[6:0] == 7'b1110011 && !mem_rdata_q[31:21] && !mem_rdata_q[19:7]) || instr_ecall_ebreak <= ((mem_rdata_q[6:0] == 7'b1110011 && !mem_rdata_q[31:21] && !mem_rdata_q[19:7]) ||
(COMPRESSED_ISA && mem_rdata_q[15:0] == 16'h9002)); (COMPRESSED_ISA && mem_rdata_q[15:0] == 16'h9002));
@ -1345,15 +1345,7 @@ module picorv32 #(
pcpi_timeout_counter <= ~0; pcpi_timeout_counter <= ~0;
pcpi_timeout <= !pcpi_timeout_counter; pcpi_timeout <= !pcpi_timeout_counter;
end end
if (ENABLE_COUNTERS) begin
count_cycle <= resetn ? count_cycle + 1 : 0; count_cycle <= resetn ? count_cycle + 1 : 0;
if (!ENABLE_COUNTERS64) count_cycle[63:32] <= 0;
end else begin
count_cycle <= 'bx;
count_instr <= 'bx;
end
next_irq_pending = ENABLE_IRQ ? irq_pending & LATCHED_IRQ : 'bx; next_irq_pending = ENABLE_IRQ ? irq_pending & LATCHED_IRQ : 'bx;
if (ENABLE_IRQ && ENABLE_IRQ_TIMER && timer) begin if (ENABLE_IRQ && ENABLE_IRQ_TIMER && timer) begin
@ -1374,7 +1366,6 @@ module picorv32 #(
if (!resetn) begin if (!resetn) begin
reg_pc <= PROGADDR_RESET; reg_pc <= PROGADDR_RESET;
reg_next_pc <= PROGADDR_RESET; reg_next_pc <= PROGADDR_RESET;
if (ENABLE_COUNTERS)
count_instr <= 0; count_instr <= 0;
latched_store <= 0; latched_store <= 0;
latched_stalu <= 0; latched_stalu <= 0;
@ -1477,10 +1468,7 @@ module picorv32 #(
reg_next_pc <= current_pc + (compressed_instr ? 2 : 4); reg_next_pc <= current_pc + (compressed_instr ? 2 : 4);
if (ENABLE_TRACE) if (ENABLE_TRACE)
latched_trace <= 1; latched_trace <= 1;
if (ENABLE_COUNTERS) begin
count_instr <= count_instr + 1; count_instr <= count_instr + 1;
if (!ENABLE_COUNTERS64) count_instr[63:32] <= 0;
end
if (instr_jal) begin if (instr_jal) begin
mem_do_rinst <= 1; mem_do_rinst <= 1;
reg_next_pc <= current_pc + decoded_imm_j; reg_next_pc <= current_pc + decoded_imm_j;
@ -1540,16 +1528,16 @@ module picorv32 #(
cpu_state <= cpu_state_trap; cpu_state <= cpu_state_trap;
end end
end end
ENABLE_COUNTERS && is_rdcycle_rdcycleh_rdinstr_rdinstrh: begin is_rdcycle_rdcycleh_rdinstr_rdinstrh: begin
(* parallel_case, full_case *) (* parallel_case, full_case *)
case (1'b1) case (1'b1)
instr_rdcycle: instr_rdcycle:
reg_out <= count_cycle[31:0]; reg_out <= count_cycle[31:0];
instr_rdcycleh && ENABLE_COUNTERS64: instr_rdcycleh:
reg_out <= count_cycle[63:32]; reg_out <= count_cycle[63:32];
instr_rdinstr: instr_rdinstr:
reg_out <= count_instr[31:0]; reg_out <= count_instr[31:0];
instr_rdinstrh && ENABLE_COUNTERS64: instr_rdinstrh:
reg_out <= count_instr[63:32]; reg_out <= count_instr[63:32];
endcase endcase
latched_store <= 1; latched_store <= 1;