Fixed jalr, c_jalr, and c_jr insns (bug discovered by riscv-formal)
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@ -1175,7 +1175,7 @@ module picorv32 #(
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reg [regindex_bits-1:0] latched_rd;
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reg [31:0] current_pc;
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assign next_pc = latched_store && latched_branch ? reg_out : reg_next_pc;
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assign next_pc = latched_store && latched_branch ? reg_out & ~1 : reg_next_pc;
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reg [3:0] pcpi_timeout_counter;
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reg pcpi_timeout;
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@ -1430,7 +1430,7 @@ module picorv32 #(
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(* parallel_case *)
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case (1'b1)
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latched_branch: begin
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current_pc = latched_store ? (latched_stalu ? alu_out_q : reg_out) : reg_next_pc;
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current_pc = latched_store ? (latched_stalu ? alu_out_q : reg_out) & ~1 : reg_next_pc;
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`debug($display("ST_RD: %2d 0x%08x, BRANCH 0x%08x", latched_rd, reg_pc + (latched_compr ? 2 : 4), current_pc);)
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end
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latched_store && !latched_branch: begin
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