Added STACKADDR parameter
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@ -279,6 +279,14 @@ The start address of the program.
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The start address of the interrupt handler.
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The start address of the interrupt handler.
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#### STACKADDR (default = 32'h ffff_ffff)
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When this parameter has a value different from 0xffffffff, then register `x2` (the
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stack pointer) is initialized to this value on reset. (All other registers remain
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uninitialized.) Note that the RISC-V calling convention requires the stack pointer
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to be aligned on 16 bytes boundaries (4 bytes for the RV32I soft float calling
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convention).
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Cycles per Instruction Performance
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Cycles per Instruction Performance
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----------------------------------
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----------------------------------
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@ -61,7 +61,8 @@ module picorv32 #(
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parameter [31:0] MASKED_IRQ = 32'h 0000_0000,
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parameter [31:0] MASKED_IRQ = 32'h 0000_0000,
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parameter [31:0] LATCHED_IRQ = 32'h ffff_ffff,
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parameter [31:0] LATCHED_IRQ = 32'h ffff_ffff,
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parameter [31:0] PROGADDR_RESET = 32'h 0000_0000,
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parameter [31:0] PROGADDR_RESET = 32'h 0000_0000,
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parameter [31:0] PROGADDR_IRQ = 32'h 0000_0010
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parameter [31:0] PROGADDR_IRQ = 32'h 0000_0010,
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parameter [31:0] STACKADDR = 32'h ffff_ffff
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) (
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) (
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input clk, resetn,
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input clk, resetn,
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output reg trap,
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output reg trap,
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@ -1162,6 +1163,11 @@ module picorv32 #(
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irq_state <= 0;
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irq_state <= 0;
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eoi <= 0;
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eoi <= 0;
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timer <= 0;
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timer <= 0;
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if (~STACKADDR) begin
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latched_store <= 1;
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latched_rd <= 2;
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reg_out <= STACKADDR;
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end
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cpu_state <= cpu_state_fetch;
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cpu_state <= cpu_state_fetch;
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end else
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end else
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(* parallel_case, full_case *)
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(* parallel_case, full_case *)
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