colin
/
picorv32
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Merged various testbench changes from compressed ISA branch

This commit is contained in:
Clifford Wolf 2016-02-03 16:33:01 +01:00
parent b1a24f4f89
commit c4c477180e
7 changed files with 31 additions and 30 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
Makefile
View File

@ -4,6 +4,7 @@ FIRMWARE_OBJS = firmware/start.o firmware/irq.o firmware/print.o firmware/sieve.
GCC_WARNS = -Werror -Wall -Wextra -Wshadow -Wundef -Wpointer-arith -Wcast-qual -Wcast-align -Wwrite-strings
GCC_WARNS += -Wredundant-decls -Wstrict-prototypes -Wmissing-prototypes -pedantic # -Wconversion
TOOLCHAIN_PREFIX = riscv32-unknown-elf-
# COMPRESSED_ISA = C
test: testbench.exe firmware/firmware.hex
vvp -N testbench.exe
@ -33,15 +34,15 @@ test_synth: testbench_synth.exe firmware/firmware.hex
vvp -N testbench_synth.exe
testbench.exe: testbench.v picorv32.v
iverilog -o testbench.exe testbench.v picorv32.v
iverilog -o testbench.exe $(subst $(COMPRESSED_ISA),C,-DCOMPRESSED_ISA) testbench.v picorv32.v
chmod -x testbench.exe
testbench_sp.exe: testbench.v picorv32.v
iverilog -o testbench_sp.exe -DSP_TEST testbench.v picorv32.v
iverilog -o testbench_sp.exe $(subst $(COMPRESSED_ISA),C,-DCOMPRESSED_ISA) -DSP_TEST testbench.v picorv32.v
chmod -x testbench_sp.exe
testbench_axi.exe: testbench.v picorv32.v
iverilog -o testbench_axi.exe -DAXI_TEST testbench.v picorv32.v
iverilog -o testbench_axi.exe $(subst $(COMPRESSED_ISA),C,-DCOMPRESSED_ISA) -DAXI_TEST testbench.v picorv32.v
chmod -x testbench_axi.exe
testbench_synth.exe: testbench.v synth.v
@ -65,10 +66,10 @@ firmware/firmware.elf: $(FIRMWARE_OBJS) $(TEST_OBJS) firmware/sections.lds
chmod -x $@
firmware/start.o: firmware/start.S
$(TOOLCHAIN_PREFIX)gcc -c -m32 -march=RV32IMXcustom -o $@ $<
$(TOOLCHAIN_PREFIX)gcc -c -m32 -march=RV32IM$(COMPRESSED_ISA)Xcustom -o $@ $<
firmware/%.o: firmware/%.c
$(TOOLCHAIN_PREFIX)gcc -c -m32 -march=RV32I -Os --std=c99 $(GCC_WARNS) -ffreestanding -nostdlib -o $@ $<
$(TOOLCHAIN_PREFIX)gcc -c -m32 -march=RV32I$(COMPRESSED_ISA) -Os --std=c99 $(GCC_WARNS) -ffreestanding -nostdlib -o $@ $<
tests/%.o: tests/%.S tests/riscv_test.h tests/test_macros.h
$(TOOLCHAIN_PREFIX)gcc -c -m32 -march=RV32IM -o $@ -DTEST_FUNC_NAME=$(notdir $(basename $<)) \

2
firmware/firmware.h
View File

@ -18,7 +18,7 @@ uint32_t *irq(uint32_t *regs, uint32_t irqs);
void print_chr(char ch);
void print_str(const char *p);
void print_dec(unsigned int val);
void print_hex(unsigned int val);
void print_hex(unsigned int val, int digits);
// sieve.c
void sieve(void);

17
firmware/irq.c
View File

@ -31,30 +31,31 @@ uint32_t *irq(uint32_t *regs, uint32_t irqs)
if ((irqs & 6) != 0)
{
uint32_t pc = regs[0] - 4;
uint32_t instr = *(uint32_t*)pc;
uint16_t *instr_hwords = (uint16_t*)pc;
uint32_t instr = instr_hwords[0] | (instr_hwords[1] << 16);
print_str("\n");
print_str("------------------------------------------------------------\n");
if ((irqs & 2) != 0) {
if (instr == 0x00100073) {
if (instr == 0x00100073 || (instr & 0xffff) == 9002) {
print_str("SBREAK instruction at 0x");
print_hex(pc);
print_hex(pc, 8);
print_str("\n");
} else {
print_str("Illegal Instruction at 0x");
print_hex(pc);
print_hex(pc, 8);
print_str(": 0x");
print_hex(instr);
print_hex(instr, ((instr & 3) == 3) ? 8 : 4);
print_str("\n");
}
}
if ((irqs & 4) != 0) {
print_str("Bus error in Instruction at 0x");
print_hex(pc);
print_hex(pc, 8);
print_str(": 0x");
print_hex(instr);
print_hex(instr, ((instr & 3) == 3) ? 8 : 4);
print_str("\n");
}
@ -90,7 +91,7 @@ uint32_t *irq(uint32_t *regs, uint32_t irqs)
print_chr(' ');
}
print_hex(regs[r]);
print_hex(regs[r], 8);
print_str(k == 3 ? "\n" : " ");
}

24
firmware/multest.c
View File

@ -26,51 +26,51 @@ void multest(void)
int64_t as = (int32_t)a, bs = (int32_t)b;
print_str("input [");
print_hex(as >> 32);
print_hex(as >> 32, 8);
print_str("] ");
print_hex(a);
print_hex(a, 8);
print_str(" [");
print_hex(bs >> 32);
print_hex(bs >> 32, 8);
print_str("] ");
print_hex(b);
print_hex(b, 8);
print_chr('\n');
uint32_t h_mul, h_mulh, h_mulhsu, h_mulhu;
print_str("hard ");
h_mul = hard_mul(a, b);
print_hex(h_mul);
print_hex(h_mul, 8);
print_str(" ");
h_mulh = hard_mulh(a, b);
print_hex(h_mulh);
print_hex(h_mulh, 8);
print_str(" ");
h_mulhsu = hard_mulhsu(a, b);
print_hex(h_mulhsu);
print_hex(h_mulhsu, 8);
print_str(" ");
h_mulhu = hard_mulhu(a, b);
print_hex(h_mulhu);
print_hex(h_mulhu, 8);
print_chr('\n');
uint32_t s_mul, s_mulh, s_mulhsu, s_mulhu;
print_str("soft ");
s_mul = a * b;
print_hex(s_mul);
print_hex(s_mul, 8);
print_str(" ");
s_mulh = (as * bs) >> 32;
print_hex(s_mulh);
print_hex(s_mulh, 8);
print_str(" ");
s_mulhsu = (as * bu) >> 32;
print_hex(s_mulhsu);
print_hex(s_mulhsu, 8);
print_str(" ");
s_mulhu = (au * bu) >> 32;
print_hex(s_mulhu);
print_hex(s_mulhu, 8);
print_str(" ");
if (s_mul != h_mul || s_mulh != h_mulh || s_mulhsu != h_mulhsu || s_mulhu != h_mulhu) {

4
firmware/print.c
View File

@ -33,9 +33,9 @@ void print_dec(unsigned int val)
}
}
void print_hex(unsigned int val)
void print_hex(unsigned int val, int digits)
{
for (int i = 32-4; i >= 0; i -= 4)
for (int i = (4*digits)-4; i >= 0; i -= 4)
*((volatile uint32_t*)OUTPORT) = "0123456789ABCDEF"[(val >> i) % 16];
}

2
firmware/sieve.c
View File

@ -72,7 +72,7 @@ void sieve(void)
}
print_str("checksum: ");
print_hex(hash);
print_hex(hash, 8);
if (hash == 0x1772A48F) {
print_str(" OK\n");

1
testbench.v
View File

@ -7,7 +7,6 @@
`timescale 1 ns / 1 ps
// `define VERBOSE
// `define AXI_TEST
module testbench;