Bump riscv-gnu-toolchain version
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@ -277,9 +277,9 @@ CPI numbers for a core built without ENABLE_REGS_DUALPORT.
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When `ENABLE_MUL` is activated, then a `MUL` instruction will execute
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When `ENABLE_MUL` is activated, then a `MUL` instruction will execute
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in 40 cycles and a `MULH[SU|U]` instruction will execute in 72 cycles.
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in 40 cycles and a `MULH[SU|U]` instruction will execute in 72 cycles.
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Dhrystone benchmark results: 0.309 DMIPS/MHz (544 Dhrystones/Second/MHz)
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Dhrystone benchmark results: 0.311 DMIPS/MHz (547 Dhrystones/Second/MHz)
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For the Dhrystone benchmark the average CPI is 4.167.
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For the Dhrystone benchmark the average CPI is 4.144.
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PicoRV32 Native Memory Interface
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PicoRV32 Native Memory Interface
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@ -531,7 +531,7 @@ pure RV32I target, and install it in `/opt/riscv32i`:
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git clone https://github.com/riscv/riscv-gnu-toolchain riscv-gnu-toolchain-rv32i
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git clone https://github.com/riscv/riscv-gnu-toolchain riscv-gnu-toolchain-rv32i
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cd riscv-gnu-toolchain-rv32i
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cd riscv-gnu-toolchain-rv32i
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git checkout 572033b
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git checkout b68866f
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mkdir build; cd build
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mkdir build; cd build
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../configure --with-xlen=32 --with-arch=I --prefix=/opt/riscv32i
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../configure --with-xlen=32 --with-arch=I --prefix=/opt/riscv32i
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@ -541,7 +541,7 @@ The commands will all be named using the prefix `riscv32-unknown-elf-`, which
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makes it easy to install them side-by-side with the regular riscv-tools, which
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makes it easy to install them side-by-side with the regular riscv-tools, which
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are using the name prefix `riscv64-unknown-elf-` by default.
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are using the name prefix `riscv64-unknown-elf-` by default.
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*Note: This instructions are for git rev 572033b (2015-09-14) of riscv-gnu-toolchain.*
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*Note: This instructions are for git rev b68866f (2015-11-09) of riscv-gnu-toolchain.*
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Evaluation: Timing and Utilization on Xilinx 7-Series FPGAs
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Evaluation: Timing and Utilization on Xilinx 7-Series FPGAs
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