Switch PicoSoC firmware to C

This commit is contained in:
Clifford Wolf 2017-09-15 15:35:26 +02:00
parent 48f729d13c
commit cfd4933272
4 changed files with 67 additions and 128 deletions

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@ -49,8 +49,8 @@ hx8kdemo.bin: hx8kdemo.asc
# ---- Example Firmware ----
firmware.elf: sections.lds firmware.S
riscv32-unknown-elf-gcc -Wl,-Bstatic,-T,sections.lds,--strip-debug -ffreestanding -nostdlib -o firmware.elf firmware.S
firmware.elf: sections.lds start.s firmware.c
riscv32-unknown-elf-gcc -Wl,-Bstatic,-T,sections.lds,--strip-debug -ffreestanding -nostdlib -o firmware.elf start.s firmware.c
firmware.hex: firmware.elf
riscv32-unknown-elf-objcopy -O verilog firmware.elf /dev/stdout | sed -e '2,65537 d;' > firmware.hex

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@ -1,126 +0,0 @@
// write RAM code (a sequence of nops followed by ret)
li x5,0x00000013 // nop
sw x5,4(x0)
sw x5,8(x0)
sw x5,12(x0)
sw x5,16(x0)
sw x5,20(x0)
sw x5,24(x0)
sw x5,28(x0)
sw x5,32(x0)
sw x5,36(x0)
sw x5,40(x0)
sw x5,44(x0)
sw x5,48(x0)
sw x5,52(x0)
sw x5,56(x0)
sw x5,60(x0)
sw x5,64(x0)
sw x5,68(x0)
sw x5,72(x0)
sw x5,76(x0)
sw x5,80(x0)
sw x5,84(x0)
sw x5,88(x0)
sw x5,92(x0)
sw x5,96(x0)
sw x5,100(x0)
sw x5,104(x0)
sw x5,108(x0)
sw x5,112(x0)
sw x5,116(x0)
sw x5,120(x0)
sw x5,124(x0)
sw x5,128(x0)
sw x5,132(x0)
sw x5,136(x0)
sw x5,140(x0)
sw x5,144(x0)
sw x5,148(x0)
sw x5,152(x0)
sw x5,156(x0)
sw x5,160(x0)
sw x5,164(x0)
sw x5,168(x0)
sw x5,172(x0)
sw x5,176(x0)
sw x5,180(x0)
sw x5,184(x0)
sw x5,188(x0)
sw x5,192(x0)
li x5,0x00008067 // ret
sw x5,196(x0)
// write a few chars to UART
li x5,0x02000004
li x6,104
sw x6,0(x5)
li x5,0x02000008
li x6,'H'
sw x6,0(x5)
li x6,'e'
sw x6,0(x5)
li x6,'l'
sw x6,0(x5)
li x6,'l'
sw x6,0(x5)
li x6,'o'
sw x6,0(x5)
li x6,' '
sw x6,0(x5)
li x6,'W'
sw x6,0(x5)
li x6,'o'
sw x6,0(x5)
li x6,'r'
sw x6,0(x5)
li x6,'l'
sw x6,0(x5)
li x6,'d'
sw x6,0(x5)
li x6,'!'
sw x6,0(x5)
li x6,'\r'
sw x6,0(x5)
li x6,'\n'
sw x6,0(x5)
#if 0
// switch spimemio to continous qspi ddr mode
li x5,0x02000000
li x6,0x80000071
sw x6,0(x5)
#endif
// setup gpio address in x5
li x5,0x03000000
sw x0,0(x5)
// initial entry point into RAM code
li x3,4
// initialize RAM counter
sw x0,0(x0)
// start of loop. remember this address
auipc x4,0
// execute RAM code, come back here
jalr x3
// load counter and increment
lw x6,0(x0)
addi x6,x6,1
// store counter and update gpios
sw x6,0(x5)
sw x6,0(x0)
// calculate new entry point into RAM code
slli x3,x6,2
andi x3,x3,127
addi x3,x3,32
// execute RAM code, come back to start of loop
mv x1,x4
jr x3

27
picosoc/firmware.c Normal file
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@ -0,0 +1,27 @@
#include <stdint.h>
#define reg_spictrl (*(volatile uint32_t*)0x02000000)
#define reg_uart_clkdiv (*(volatile uint32_t*)0x02000004)
#define reg_uart_data (*(volatile uint32_t*)0x02000008)
#define reg_leds (*(volatile uint32_t*)0x03000000)
void main()
{
reg_uart_clkdiv = 104;
reg_leds = 1;
reg_uart_data = 'H';
reg_leds = 2;
reg_uart_data = 'e';
reg_leds = 3;
reg_uart_data = 'l';
reg_leds = 4;
reg_uart_data = 'l';
reg_leds = 5;
reg_uart_data = 'o';
reg_leds = 6;
reg_uart_data = '\r';
reg_leds = 7;
reg_uart_data = '\n';
reg_leds = 8;
}

38
picosoc/start.s Normal file
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@ -0,0 +1,38 @@
.section .text
start:
addi x1, zero, 0
addi x2, zero, 0
addi x3, zero, 0
addi x4, zero, 0
addi x5, zero, 0
addi x6, zero, 0
addi x7, zero, 0
addi x8, zero, 0
addi x9, zero, 0
addi x10, zero, 0
addi x11, zero, 0
addi x12, zero, 0
addi x13, zero, 0
addi x14, zero, 0
addi x15, zero, 0
addi x16, zero, 0
addi x17, zero, 0
addi x18, zero, 0
addi x19, zero, 0
addi x20, zero, 0
addi x21, zero, 0
addi x22, zero, 0
addi x23, zero, 0
addi x24, zero, 0
addi x25, zero, 0
addi x26, zero, 0
addi x27, zero, 0
addi x28, zero, 0
addi x29, zero, 0
addi x30, zero, 0
addi x31, zero, 0
li sp, 4*256
call main
j start