From d1b0213ff0ed9b6712ca0cd608a765f5acf859a3 Mon Sep 17 00:00:00 2001 From: "colin.liang" Date: Tue, 10 Jan 2023 19:56:05 +0800 Subject: [PATCH] Default donot use compress isa. --- Makefile | 6 +++--- testbench_wb.v | 6 ++++-- 2 files changed, 7 insertions(+), 5 deletions(-) diff --git a/Makefile b/Makefile index d48ce72..40022dd 100644 --- a/Makefile +++ b/Makefile @@ -66,16 +66,16 @@ firmware/firmware.hex: firmware/firmware.elf # chmod -x $@ firmware/firmware.elf: $(FIRMWARE_OBJS) $(TEST_OBJS) firmware/sections.lds - $(TOOLCHAIN_PREFIX)gcc -Os -mabi=ilp32 -march=rv32im$(subst C,c,$(COMPRESSED_ISA)) -ffreestanding -nostdlib -o $@ \ + $(TOOLCHAIN_PREFIX)gcc -Os -mabi=ilp32 -march=rv32im -ffreestanding -nostdlib -o $@ \ -Wl,--build-id=none,-Bstatic,-T,firmware/sections.lds,-Map,firmware/firmware.map,--strip-debug \ $(FIRMWARE_OBJS) $(TEST_OBJS) -lgcc chmod -x $@ firmware/start.o: firmware/start.S - $(TOOLCHAIN_PREFIX)gcc -c -mabi=ilp32 -march=rv32im$(subst C,c,$(COMPRESSED_ISA)) -o $@ $< + $(TOOLCHAIN_PREFIX)gcc -c -mabi=ilp32 -march=rv32im -o $@ $< firmware/%.o: firmware/%.c - $(TOOLCHAIN_PREFIX)gcc -c -mabi=ilp32 -march=rv32i$(subst C,c,$(COMPRESSED_ISA)) -Os --std=c99 $(GCC_WARNS) -ffreestanding -nostdlib -o $@ $< + $(TOOLCHAIN_PREFIX)gcc -c -mabi=ilp32 -march=rv32i -Os --std=c99 $(GCC_WARNS) -ffreestanding -nostdlib -o $@ $< tests/%.o: tests/%.S tests/riscv_test.h tests/test_macros.h $(TOOLCHAIN_PREFIX)gcc -c -mabi=ilp32 -march=rv32im -o $@ -DTEST_FUNC_NAME=$(notdir $(basename $<)) \ diff --git a/testbench_wb.v b/testbench_wb.v index ffb1a3a..c9ec7d7 100644 --- a/testbench_wb.v +++ b/testbench_wb.v @@ -99,7 +99,9 @@ module picorv32_wrapper #( reg [1023:0] firmware_file; initial begin - if (!$value$plusargs("firmware=%s", firmware_file)) firmware_file = "firmware/firmware.hex"; + if (!$value$plusargs("firmware=%s", firmware_file)) + firmware_file = "firmware/firmware.hex"; + // firmware_file = "dhrystone/dhry.hex"; $readmemh(firmware_file, uut.memory); end @@ -197,7 +199,7 @@ module picorv32_wb #( .BARREL_SHIFTER(0), .TWO_CYCLE_COMPARE(0), .TWO_CYCLE_ALU(0), - .COMPRESSED_ISA(1), + .COMPRESSED_ISA(0), .CATCH_MISALIGN(0), .CATCH_ILLINSN(1), .ENABLE_PCPI(0),