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fix for check target

This commit is contained in:
Miodrag Milanovic 2021-12-27 10:52:12 +01:00
parent b08952b896
commit d330c1406b
1 changed files with 1 additions and 1 deletions
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Makefile
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@ -93,7 +93,7 @@ check-%: check.smt2
check.smt2: picorv32.v
yosys -v2 -p 'read_verilog -formal picorv32.v' \
-p 'prep -top picorv32 -nordff' \
-p 'assertpmux -noinit; opt -fast' \
-p 'assertpmux -noinit; opt -fast; dffunmap' \
-p 'write_smt2 -wires check.smt2'
synth.v: picorv32.v scripts/yosys/synth_sim.ys