format testbench.

This commit is contained in:
colin.liang 2023-01-10 15:44:16 +08:00
parent 42e498aa28
commit d4ce161c1c
1 changed files with 216 additions and 220 deletions

View File

@ -35,8 +35,7 @@ module testbench #(
repeat (10) @(posedge clk); repeat (10) @(posedge clk);
while (!trap) begin while (!trap) begin
@(posedge clk); @(posedge clk);
if (trace_valid) if (trace_valid) $fwrite(trace_file, "%x\n", trace_data);
$fwrite(trace_file, "%x\n", trace_data);
end end
$fclose(trace_file); $fclose(trace_file);
$display("Finished writing testbench.trace."); $display("Finished writing testbench.trace.");
@ -86,8 +85,7 @@ module picorv32_wrapper #(
wire [31:0] wb_s2m_dat; wire [31:0] wb_s2m_dat;
wire wb_s2m_ack; wire wb_s2m_ack;
picorv32_wb #( picorv32_wb #() uut (
) uut (
.trap(trap), .trap(trap),
.exit(exit), .exit(exit),
.irq(irq), .irq(irq),
@ -101,8 +99,7 @@ module picorv32_wrapper #(
reg [1023:0] firmware_file; reg [1023:0] firmware_file;
initial begin initial begin
if (!$value$plusargs("firmware=%s", firmware_file)) if (!$value$plusargs("firmware=%s", firmware_file)) firmware_file = "firmware/firmware.hex";
firmware_file = "firmware/firmware.hex";
$readmemh(firmware_file, uut.memory); $readmemh(firmware_file, uut.memory);
end end
@ -119,8 +116,7 @@ module picorv32_wrapper #(
$finish; $finish;
end else begin end else begin
$display("ERROR!"); $display("ERROR!");
if ($test$plusargs("noerror")) if ($test$plusargs("noerror")) $finish;
$finish;
$stop; $stop;
end end
end end
@ -133,7 +129,8 @@ endmodule
* picorv32_wb * picorv32_wb
***************************************************************/ ***************************************************************/
module picorv32_wb #() ( module picorv32_wb #(
) (
output trap, output trap,
output reg exit, output reg exit,
@ -261,8 +258,7 @@ endmodule
`endif `endif
end end
32'h2000_0000: begin 32'h2000_0000: begin
if (mem_la_wdata[31:0] == 123456789) if (mem_la_wdata[31:0] == 123456789) exit = 1;
exit = 1;
end end
default: begin default: begin
if (mem_la_wstrb[0]) memory[mem_la_addr+0] <= mem_la_wdata[7:0]; if (mem_la_wstrb[0]) memory[mem_la_addr+0] <= mem_la_wdata[7:0];