Added vivado synth_area_{small,regular,large}.tcl scripts

This commit is contained in:
Clifford Wolf 2015-07-01 21:51:15 +02:00
parent 553b1ef143
commit e72abc0284
4 changed files with 33 additions and 4 deletions

View File

@ -3,10 +3,7 @@ read_verilog ../../picorv32.v
read_verilog synth_area_top.v read_verilog synth_area_top.v
read_xdc synth_area.xdc read_xdc synth_area.xdc
synth_design -part xc7k70t-fbg676 -top picorv32_axi synth_design -part xc7k70t-fbg676 -top top_large
# synth_design -part xc7k70t-fbg676 -top top_small
# synth_design -part xc7k70t-fbg676 -top top_regular
# synth_design -part xc7k70t-fbg676 -top top_large
opt_design -resynth_seq_area opt_design -resynth_seq_area
report_utilization report_utilization

View File

@ -0,0 +1,10 @@
read_verilog ../../picorv32.v
read_xdc synth_area.xdc
synth_design -part xc7k70t-fbg676 -top picorv32_axi
opt_design -resynth_seq_area
report_utilization
# report_timing

View File

@ -0,0 +1,11 @@
read_verilog ../../picorv32.v
read_verilog synth_area_top.v
read_xdc synth_area.xdc
synth_design -part xc7k70t-fbg676 -top top_small
opt_design -resynth_seq_area
report_utilization
# report_timing

View File

@ -0,0 +1,11 @@
read_verilog ../../picorv32.v
read_verilog synth_area_top.v
read_xdc synth_area.xdc
synth_design -part xc7k70t-fbg676 -top top_regular
opt_design -resynth_seq_area
report_utilization
# report_timing