From e7f5d640cab596410cb21bab0ac7bc49c3ad87b7 Mon Sep 17 00:00:00 2001 From: Tom Verbeure Date: Tue, 30 Aug 2016 22:54:14 -0700 Subject: [PATCH] synth_system --- scripts/quartus/Makefile | 2 +- scripts/quartus/synth_system.qsf | 6 ++++++ scripts/quartus/synth_system.sdc | 1 + scripts/quartus/synth_system.xdc | 34 -------------------------------- scripts/quartus/system.v | 2 +- 5 files changed, 9 insertions(+), 36 deletions(-) create mode 100644 scripts/quartus/synth_system.qsf create mode 100644 scripts/quartus/synth_system.sdc delete mode 100644 scripts/quartus/synth_system.xdc diff --git a/scripts/quartus/Makefile b/scripts/quartus/Makefile index 318f7b3..f626fc5 100644 --- a/scripts/quartus/Makefile +++ b/scripts/quartus/Makefile @@ -46,7 +46,7 @@ tab_%/results.txt: bash tabtest.sh $@ area: synth_area_small synth_area_regular synth_area_large - -grep -B4 -A10 'Slice LUTs' synth_area_small.log synth_area_regular.log synth_area_large.log + -grep -A3 "Total logic elements" synth_area_*_build/output_files/synth_area_*.fit.summary table.txt: tab_small_ep4ce_c7/results.txt table.txt: tab_small_ep4cgx_c7/results.txt diff --git a/scripts/quartus/synth_system.qsf b/scripts/quartus/synth_system.qsf new file mode 100644 index 0000000..1a84293 --- /dev/null +++ b/scripts/quartus/synth_system.qsf @@ -0,0 +1,6 @@ +set_global_assignment -name DEVICE ep4ce40f29c7 +set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files +set_global_assignment -name TOP_LEVEL_ENTITY system +set_global_assignment -name VERILOG_FILE ../system.v +set_global_assignment -name VERILOG_FILE ../../../picorv32.v +set_global_assignment -name SDC_FILE ../synth_system.sdc diff --git a/scripts/quartus/synth_system.sdc b/scripts/quartus/synth_system.sdc new file mode 100644 index 0000000..90ee3a2 --- /dev/null +++ b/scripts/quartus/synth_system.sdc @@ -0,0 +1 @@ +create_clock -period 10.00 [get_ports clk] diff --git a/scripts/quartus/synth_system.xdc b/scripts/quartus/synth_system.xdc deleted file mode 100644 index 5748466..0000000 --- a/scripts/quartus/synth_system.xdc +++ /dev/null @@ -1,34 +0,0 @@ - -# XDC File for Basys3 Board -########################### - -set_property PACKAGE_PIN W5 [get_ports clk] -set_property IOSTANDARD LVCMOS33 [get_ports clk] -create_clock -period 10.00 [get_ports clk] - -# Pmod Header JA (JA0..JA7) -set_property PACKAGE_PIN J1 [get_ports {out_byte[0]}] -set_property IOSTANDARD LVCMOS33 [get_ports {out_byte[0]}] -set_property PACKAGE_PIN L2 [get_ports {out_byte[1]}] -set_property IOSTANDARD LVCMOS33 [get_ports {out_byte[1]}] -set_property PACKAGE_PIN J2 [get_ports {out_byte[2]}] -set_property IOSTANDARD LVCMOS33 [get_ports {out_byte[2]}] -set_property PACKAGE_PIN G2 [get_ports {out_byte[3]}] -set_property IOSTANDARD LVCMOS33 [get_ports {out_byte[3]}] -set_property PACKAGE_PIN H1 [get_ports {out_byte[4]}] -set_property IOSTANDARD LVCMOS33 [get_ports {out_byte[4]}] -set_property PACKAGE_PIN K2 [get_ports {out_byte[5]}] -set_property IOSTANDARD LVCMOS33 [get_ports {out_byte[5]}] -set_property PACKAGE_PIN H2 [get_ports {out_byte[6]}] -set_property IOSTANDARD LVCMOS33 [get_ports {out_byte[6]}] -set_property PACKAGE_PIN G3 [get_ports {out_byte[7]}] -set_property IOSTANDARD LVCMOS33 [get_ports {out_byte[7]}] - -# Pmod Header JB (JB0..JB2) -set_property PACKAGE_PIN A14 [get_ports {resetn}] -set_property IOSTANDARD LVCMOS33 [get_ports {resetn}] -set_property PACKAGE_PIN A16 [get_ports {trap}] -set_property IOSTANDARD LVCMOS33 [get_ports {trap}] -set_property PACKAGE_PIN B15 [get_ports {out_byte_en}] -set_property IOSTANDARD LVCMOS33 [get_ports {out_byte_en}] - diff --git a/scripts/quartus/system.v b/scripts/quartus/system.v index c4882a1..19a4b8d 100644 --- a/scripts/quartus/system.v +++ b/scripts/quartus/system.v @@ -8,7 +8,7 @@ module system ( output reg out_byte_en ); // set this to 0 for better timing but less performance/MHz - parameter FAST_MEMORY = 1; + parameter FAST_MEMORY = 0; // 4096 32bit words = 16kB memory parameter MEM_SIZE = 4096;