Suppress writes to cpuregs[0] to prevent confusion
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@ -190,7 +190,7 @@ module picorv32 #(
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endtask
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`ifdef DEBUGREGS
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wire [31:0] dbg_reg_x0 = cpuregs[0];
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wire [31:0] dbg_reg_x0 = 0;
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wire [31:0] dbg_reg_x1 = cpuregs[1];
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wire [31:0] dbg_reg_x2 = cpuregs[2];
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wire [31:0] dbg_reg_x3 = cpuregs[3];
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@ -1301,7 +1301,7 @@ module picorv32 #(
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end
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always @(posedge clk) begin
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if (resetn && cpuregs_write)
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if (resetn && cpuregs_write && latched_rd)
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cpuregs[latched_rd] <= cpuregs_wrdata;
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end
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