Bugfix in memory interface (related to compressed ISA)
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				|  | @ -188,11 +188,11 @@ module picorv32 #( | |||
| 	reg [15:0] mem_16bit_buffer; | ||||
| 
 | ||||
| 	wire mem_busy = |{mem_do_prefetch, mem_do_rinst, mem_do_rdata, mem_do_wdata}; | ||||
| 	wire mem_done = resetn && ((mem_ready && |mem_state && (mem_do_rinst || mem_do_rdata || mem_do_wdata)) || (&mem_state && mem_do_rinst)) && !mem_la_firstword; | ||||
| 	wire mem_done = resetn && ((mem_valid && mem_ready && |mem_state && (mem_do_rinst || mem_do_rdata || mem_do_wdata)) || (&mem_state && mem_do_rinst)) && !mem_la_firstword; | ||||
| 
 | ||||
| 	assign mem_la_write = resetn && !mem_state && mem_do_wdata; | ||||
| 	assign mem_la_read = resetn && ((!mem_state && (mem_do_rinst || mem_do_prefetch || mem_do_rdata)) || (mem_ready && mem_la_firstword && !mem_la_secondword)); | ||||
| 	assign mem_la_addr = (mem_do_prefetch || mem_do_rinst) ? {next_pc[31:2] + (mem_ready && mem_la_firstword), 2'b00} : {reg_op1[31:2], 2'b00}; | ||||
| 	assign mem_la_read = resetn && ((!mem_state && (mem_do_rinst || mem_do_prefetch || mem_do_rdata)) || (mem_valid && mem_ready && mem_la_firstword && !mem_la_secondword)); | ||||
| 	assign mem_la_addr = (mem_do_prefetch || mem_do_rinst) ? {next_pc[31:2] + (mem_valid && mem_ready && mem_la_firstword), 2'b00} : {reg_op1[31:2], 2'b00}; | ||||
| 
 | ||||
| 	wire [31:0] mem_rdata_latched_noshuffle; | ||||
| 	assign mem_rdata_latched_noshuffle = ((mem_valid && mem_ready) || LATCHED_MEM_RDATA) ? mem_rdata : mem_rdata_q; | ||||
|  |  | |||
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