Improve and cleanup picosoc firmware

picosoc/.gitignore

@@ -3,7 +3,7 @@
 /spiflash_tb.vcd
 /spiflash_tb.vvp
 /firmware.elf
-/firmware_vma.elf
+/firmware_up.elf
 /firmware.hex
 /firmware.bin
 /hx8kdemo.asc

picosoc/Makefile

@@ -46,14 +46,14 @@ hx8kdemo.bin: hx8kdemo.asc
 
 # ---- Example Firmware ----
 
-firmware.elf: firmware.s
-	riscv32-unknown-elf-gcc -c -o firmware.elf firmware.s
+firmware.elf: sections.lds firmware.S
+	riscv32-unknown-elf-gcc -Wl,-Bstatic,-T,sections.lds,--strip-debug -ffreestanding -nostdlib -o firmware.elf firmware.S
 
-firmware_vma.elf: firmware.elf
-	riscv32-unknown-elf-objcopy --change-section-vma .text=0x00100000 firmware.elf firmware_vma.elf
+firmware_up.elf: firmware.elf
+	riscv32-unknown-elf-objcopy --change-addresses 0x100000 firmware.elf firmware_up.elf
 
-firmware.hex: firmware_vma.elf
-	riscv32-unknown-elf-objcopy -O verilog firmware_vma.elf firmware.hex
+firmware.hex: firmware_up.elf
+	riscv32-unknown-elf-objcopy -O verilog firmware_up.elf firmware.hex
 
 firmware.bin: firmware.elf
 	riscv32-unknown-elf-objcopy -O binary firmware.elf firmware.bin
@@ -62,7 +62,7 @@ firmware.bin: firmware.elf
 
 clean:
 	rm -f testbench.vvp testbench.vcd spiflash_tb.vvp spiflash_tb.vcd
-	rm -f firmware.elf firmware_vma.elf firmware.hex firmware.bin
+	rm -f firmware.elf firmware_up.elf firmware.hex firmware.bin
 	rm -f hx8kdemo.blif hx8kdemo.log hx8kdemo.asc hx8kdemo.rpt hx8kdemo.bin
 	rm -f hx8kdemo_syn.v hx8kdemo_syn_tb.vvp hx8kdemo_tb.vvp
 

picosoc/firmware.S

@@ -1,5 +1,5 @@
-# write RAM code (a sequence of nops followed by ret)
-li      x5,0x00000013   # nop
+// write RAM code (a sequence of nops followed by ret)
+li      x5,0x00000013   // nop
 sw      x5,4(x0)
 sw      x5,8(x0)
 sw      x5,12(x0)
@@ -48,38 +48,45 @@ sw      x5,180(x0)
 sw      x5,184(x0)
 sw      x5,188(x0)
 sw      x5,192(x0)
-li      x5,0x00008067   # ret
+li      x5,0x00008067   // ret
 sw      x5,196(x0)
 
-# setup gpio address in x5
+#if 0
+// switch spimemio to continous qspi ddr mode
+li      x5,0x02000000
+li      x6,0x80000071
+sw      x6,0(x5)
+#endif
+
+// setup gpio address in x5
 li      x5,0x03000000
 sw      x0,0(x5)
 
-# initial entry point into RAM code
+// initial entry point into RAM code
 li      x3,4
 
-# initialize RAM counter
+// initialize RAM counter
 sw      x0,0(x0)
 
-# start of loop. remember this address
+// start of loop. remember this address
 auipc   x4,0
 
-# execute RAM code, come back here
+// execute RAM code, come back here
 jalr    x3
 
-# load counter and increment
+// load counter and increment
 lw      x6,0(x0)
 addi    x6,x6,1
 
-# store counter and update gpios
+// store counter and update gpios
 sw      x6,0(x5)
 sw      x6,0(x0)
 
-# calculate new entry point into RAM code
+// calculate new entry point into RAM code
 slli    x3,x6,2
 andi    x3,x3,127
 addi    x3,x3,32
 
-# execute RAM code, come back to start of loop
+// execute RAM code, come back to start of loop
 mv      x1,x4
 jr      x3

picosoc/sections.lds

@@ -0,0 +1,8 @@
+SECTIONS {
+	.memory : {
+		. = 0x000000;
+		start*(.text);
+		*(.text);
+		*(*);
+	}
+}

picosoc/testbench.v

@@ -24,6 +24,10 @@ module testbench;
 	always #5 clk = (clk === 1'b0);
 
 	reg resetn = 0;
+	integer cycles = 0;
+
+	always @(posedge clk)
+		cycles <= cycles + 1;
 
 	initial begin
 		$dumpfile("testbench.vcd");
@@ -92,6 +96,7 @@ module testbench;
 		$write("<GPIO:%02x>", gpio[7:0]);
 		if (gpio == 63) begin
 			$display("[OK]");
+			$display("Finished after %0d cycles.", cycles);
 			$finish;
 		end
 		if (gpio % 8 == 7) begin