Tom Verbeure 41918ee265 synth_speed		2016-08-30 23:02:31 -07:00
..
csmith	RISC-V ISA 2.1 now calls "sbreak" officially "ebreak"	2016-06-06 10:46:52 +02:00
cxxdemo	RISC-V ISA 2.1 now calls "sbreak" officially "ebreak"	2016-06-06 10:46:52 +02:00
icestorm	Minor fixes in scripts/icestorm/	2016-07-14 09:07:52 +02:00
quartus	synth_speed	2016-08-30 23:02:31 -07:00
smt2-bmc	Better "steps" default in smt2-bmc/sync.py	2015-10-06 11:35:23 +02:00
smtbmc	Added more asserts to picorv32, more smtbmc examples	2016-08-29 17:23:00 +02:00
torture	RISC-V ISA 2.1 now calls "sbreak" officially "ebreak"	2016-06-06 10:46:52 +02:00
vivado	RISC-V ISA 2.1 now calls "sbreak" officially "ebreak"	2016-06-06 10:46:52 +02:00
yosys	Added scripts/yosys/synth_gates	2015-09-12 14:02:23 +02:00
yosys-cmp	Added scripts/yosys-cmp/	2015-10-30 14:25:04 +01:00