picorv32

History

colin.liang f6b14b047b Refine memory interface. Change start addr from 10000 to 0.		2023-01-18 21:09:57 +08:00
..
README	More README stuff	2015-06-28 12:20:23 +02:00
custom_ops.S	Add newlib linker info to README file	2017-01-15 14:38:27 +01:00
firmware.h	Remove irq support.	2023-01-16 20:41:28 +08:00
hello.c	Improve test firmware, increase testbench memory size to 128kB	2019-09-12 10:50:45 +02:00
makehex.py	Using "#!/usr/bin/env python3"	2015-08-22 09:54:21 +02:00
multest.c	Improve test firmware, increase testbench memory size to 128kB	2019-09-12 10:50:45 +02:00
print.c	Test firmware: Added print_hex() digits arg	2015-11-19 14:01:16 +01:00
riscv.ld	Refine memory interface. Change start addr from 10000 to 0.	2023-01-18 21:09:57 +08:00
riscv.ld.orig	Update riscv-gnu-toolchain to 1b80cbe	2018-04-03 20:14:17 +02:00
sections.lds	Refine memory interface. Change start addr from 10000 to 0.	2023-01-18 21:09:57 +08:00
sieve.c	RISC-V ISA 2.1 now calls "sbreak" officially "ebreak"	2016-06-06 10:46:52 +02:00
start.S	Remove irq support.	2023-01-16 20:41:28 +08:00
stats.c	Add missing "volatile" to "asm" statements	2017-10-30 11:22:54 +01:00

A simple test firmware. This code is in the public domain. Simply copy whatever
you can use.