[
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    "class":"firrtl.transforms.CombinationalPath",
    "sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_bits_by",
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      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_valid_raw_d",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dma_mem_sz"
    ]
  },
  {
    "class":"firrtl.transforms.CombinationalPath",
    "sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_end_addr_d",
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      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_bits_load_ldst_bypass_d",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_exu_lsu_rs1_d",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dma_mem_addr",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_valid_raw_d",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_bits_load_ldst_bypass_d",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_bits_word",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_bus_read_data_m",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_ld_data_m",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_offset_d",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_bits_half",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_addr_external_m",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_bits_by",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_bits_unsign",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_bits_dword",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_bits_half",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_bits_word",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_bits_dword",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_bits_half",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_bits_word",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dma_mem_sz"
    ]
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  {
    "class":"firrtl.transforms.CombinationalPath",
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      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_valid_raw_d"
    ]
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  {
    "class":"firrtl.transforms.CombinationalPath",
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      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_valid_raw_d"
    ]
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  {
    "class":"firrtl.transforms.CombinationalPath",
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      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_valid_raw_d",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dma_mem_sz"
    ]
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  {
    "class":"firrtl.transforms.CombinationalPath",
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      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_exu_lsu_rs1_d",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dma_mem_addr",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_valid_raw_d",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_offset_d",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_bits_load_ldst_bypass_d",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_bits_word",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_bus_read_data_m",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_ld_data_m",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_bits_half",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_addr_external_m",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_bits_by",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_bits_unsign"
    ]
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  {
    "class":"firrtl.transforms.CombinationalPath",
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      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_valid_raw_d",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dma_mem_sz"
    ]
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  {
    "class":"firrtl.transforms.CombinationalPath",
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      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_picm_mask_data_m",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_bits_store_data_bypass_m",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_addr_in_pic_m",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_bits_word",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_bus_read_data_m",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_ld_data_m",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_bits_half",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_addr_external_m",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_bits_by",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_bits_unsign"
    ]
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  {
    "class":"firrtl.transforms.CombinationalPath",
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    ]
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  {
    "class":"firrtl.transforms.CombinationalPath",
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      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_valid_raw_d",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dma_mem_write"
    ]
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  {
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      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_valid_raw_d"
    ]
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  {
    "class":"firrtl.transforms.CombinationalPath",
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    ]
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    "class":"firrtl.transforms.CombinationalPath",
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      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_exu_lsu_rs1_d",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dma_mem_addr",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_valid_raw_d",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_bits_load_ldst_bypass_d",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_offset_d",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_bits_word",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_bus_read_data_m",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_ld_data_m",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_bits_half",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_addr_external_m",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_bits_by",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_bits_unsign",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_bits_dword",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_bits_half",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_bits_word",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_bits_dword",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_bits_half",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_bits_word",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dma_mem_sz"
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      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_valid_raw_d",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dma_mem_write"
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      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_valid",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_flush_r",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_bits_store",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_bits_load"
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      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_valid_raw_d"
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      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_bits_load_ldst_bypass_d",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_exu_lsu_rs1_d",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dma_mem_addr",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_valid_raw_d",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_bits_load_ldst_bypass_d",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_offset_d",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_bits_word",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_bus_read_data_m",
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      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_bits_half",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_addr_external_m",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_bits_by",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_bits_unsign",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_bits_dword",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_bits_half",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_bits_word",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_bits_dword",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_bits_half",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_bits_word",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dma_mem_sz"
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      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_commit_r",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_bits_dma",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_double_ecc_error_r",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_flush_r",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_bits_store",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_bits_load"
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      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_valid",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_flush_m_up",
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      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_addr_external_m",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_bits_by",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_bits_unsign"
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      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_ld_data_corr_r",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_bits_half",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_bits_by",
      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_bits_unsign"
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      "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dma_mem_sz"
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]