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LSU with Bundling
2020-12-10 12:50:49 +08:00
;buildInfoPackage: chisel3, version: 3.3.1, scalaVersion: 2.12.11, sbtVersion: 1.3.10
circuit lsu_bus_buffer :
extmodule gated_latch :
output Q : Clock
input CK : Clock
input EN : UInt<1>
input SE : UInt<1>
defname = gated_latch
module rvclkhdr :
input clock : Clock
input reset : Reset
output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
inst clkhdr of gated_latch @[el2_lib.scala 474:26]
clkhdr.SE is invalid
clkhdr.EN is invalid
clkhdr.CK is invalid
clkhdr.Q is invalid
io.l1clk <= clkhdr.Q @[el2_lib.scala 475:14]
clkhdr.CK <= io.clk @[el2_lib.scala 476:18]
clkhdr.EN <= io.en @[el2_lib.scala 477:18]
clkhdr.SE <= io.scan_mode @[el2_lib.scala 478:18]
extmodule gated_latch_1 :
output Q : Clock
input CK : Clock
input EN : UInt<1>
input SE : UInt<1>
defname = gated_latch
module rvclkhdr_1 :
input clock : Clock
input reset : Reset
output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
inst clkhdr of gated_latch_1 @[el2_lib.scala 474:26]
clkhdr.SE is invalid
clkhdr.EN is invalid
clkhdr.CK is invalid
clkhdr.Q is invalid
io.l1clk <= clkhdr.Q @[el2_lib.scala 475:14]
clkhdr.CK <= io.clk @[el2_lib.scala 476:18]
clkhdr.EN <= io.en @[el2_lib.scala 477:18]
clkhdr.SE <= io.scan_mode @[el2_lib.scala 478:18]
extmodule gated_latch_2 :
output Q : Clock
input CK : Clock
input EN : UInt<1>
input SE : UInt<1>
defname = gated_latch
module rvclkhdr_2 :
input clock : Clock
input reset : Reset
output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
inst clkhdr of gated_latch_2 @[el2_lib.scala 474:26]
clkhdr.SE is invalid
clkhdr.EN is invalid
clkhdr.CK is invalid
clkhdr.Q is invalid
io.l1clk <= clkhdr.Q @[el2_lib.scala 475:14]
clkhdr.CK <= io.clk @[el2_lib.scala 476:18]
clkhdr.EN <= io.en @[el2_lib.scala 477:18]
clkhdr.SE <= io.scan_mode @[el2_lib.scala 478:18]
extmodule gated_latch_3 :
output Q : Clock
input CK : Clock
input EN : UInt<1>
input SE : UInt<1>
defname = gated_latch
module rvclkhdr_3 :
input clock : Clock
input reset : Reset
output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
inst clkhdr of gated_latch_3 @[el2_lib.scala 474:26]
clkhdr.SE is invalid
clkhdr.EN is invalid
clkhdr.CK is invalid
clkhdr.Q is invalid
io.l1clk <= clkhdr.Q @[el2_lib.scala 475:14]
clkhdr.CK <= io.clk @[el2_lib.scala 476:18]
clkhdr.EN <= io.en @[el2_lib.scala 477:18]
clkhdr.SE <= io.scan_mode @[el2_lib.scala 478:18]
extmodule gated_latch_4 :
output Q : Clock
input CK : Clock
input EN : UInt<1>
input SE : UInt<1>
defname = gated_latch
module rvclkhdr_4 :
input clock : Clock
input reset : Reset
output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
inst clkhdr of gated_latch_4 @[el2_lib.scala 474:26]
clkhdr.SE is invalid
clkhdr.EN is invalid
clkhdr.CK is invalid
clkhdr.Q is invalid
io.l1clk <= clkhdr.Q @[el2_lib.scala 475:14]
clkhdr.CK <= io.clk @[el2_lib.scala 476:18]
clkhdr.EN <= io.en @[el2_lib.scala 477:18]
clkhdr.SE <= io.scan_mode @[el2_lib.scala 478:18]
extmodule gated_latch_5 :
output Q : Clock
input CK : Clock
input EN : UInt<1>
input SE : UInt<1>
defname = gated_latch
module rvclkhdr_5 :
input clock : Clock
input reset : Reset
output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
inst clkhdr of gated_latch_5 @[el2_lib.scala 474:26]
clkhdr.SE is invalid
clkhdr.EN is invalid
clkhdr.CK is invalid
clkhdr.Q is invalid
io.l1clk <= clkhdr.Q @[el2_lib.scala 475:14]
clkhdr.CK <= io.clk @[el2_lib.scala 476:18]
clkhdr.EN <= io.en @[el2_lib.scala 477:18]
clkhdr.SE <= io.scan_mode @[el2_lib.scala 478:18]
extmodule gated_latch_6 :
output Q : Clock
input CK : Clock
input EN : UInt<1>
input SE : UInt<1>
defname = gated_latch
module rvclkhdr_6 :
input clock : Clock
input reset : Reset
output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
inst clkhdr of gated_latch_6 @[el2_lib.scala 474:26]
clkhdr.SE is invalid
clkhdr.EN is invalid
clkhdr.CK is invalid
clkhdr.Q is invalid
io.l1clk <= clkhdr.Q @[el2_lib.scala 475:14]
clkhdr.CK <= io.clk @[el2_lib.scala 476:18]
clkhdr.EN <= io.en @[el2_lib.scala 477:18]
clkhdr.SE <= io.scan_mode @[el2_lib.scala 478:18]
extmodule gated_latch_7 :
output Q : Clock
input CK : Clock
input EN : UInt<1>
input SE : UInt<1>
defname = gated_latch
module rvclkhdr_7 :
input clock : Clock
input reset : Reset
output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
inst clkhdr of gated_latch_7 @[el2_lib.scala 474:26]
clkhdr.SE is invalid
clkhdr.EN is invalid
clkhdr.CK is invalid
clkhdr.Q is invalid
io.l1clk <= clkhdr.Q @[el2_lib.scala 475:14]
clkhdr.CK <= io.clk @[el2_lib.scala 476:18]
clkhdr.EN <= io.en @[el2_lib.scala 477:18]
clkhdr.SE <= io.scan_mode @[el2_lib.scala 478:18]
extmodule gated_latch_8 :
output Q : Clock
input CK : Clock
input EN : UInt<1>
input SE : UInt<1>
defname = gated_latch
module rvclkhdr_8 :
input clock : Clock
input reset : Reset
output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
inst clkhdr of gated_latch_8 @[el2_lib.scala 474:26]
clkhdr.SE is invalid
clkhdr.EN is invalid
clkhdr.CK is invalid
clkhdr.Q is invalid
io.l1clk <= clkhdr.Q @[el2_lib.scala 475:14]
clkhdr.CK <= io.clk @[el2_lib.scala 476:18]
clkhdr.EN <= io.en @[el2_lib.scala 477:18]
clkhdr.SE <= io.scan_mode @[el2_lib.scala 478:18]
extmodule gated_latch_9 :
output Q : Clock
input CK : Clock
input EN : UInt<1>
input SE : UInt<1>
defname = gated_latch
module rvclkhdr_9 :
input clock : Clock
input reset : Reset
output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
inst clkhdr of gated_latch_9 @[el2_lib.scala 474:26]
clkhdr.SE is invalid
clkhdr.EN is invalid
clkhdr.CK is invalid
clkhdr.Q is invalid
io.l1clk <= clkhdr.Q @[el2_lib.scala 475:14]
clkhdr.CK <= io.clk @[el2_lib.scala 476:18]
clkhdr.EN <= io.en @[el2_lib.scala 477:18]
clkhdr.SE <= io.scan_mode @[el2_lib.scala 478:18]
extmodule gated_latch_10 :
output Q : Clock
input CK : Clock
input EN : UInt<1>
input SE : UInt<1>
defname = gated_latch
module rvclkhdr_10 :
input clock : Clock
input reset : Reset
output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
inst clkhdr of gated_latch_10 @[el2_lib.scala 474:26]
clkhdr.SE is invalid
clkhdr.EN is invalid
clkhdr.CK is invalid
clkhdr.Q is invalid
io.l1clk <= clkhdr.Q @[el2_lib.scala 475:14]
clkhdr.CK <= io.clk @[el2_lib.scala 476:18]
clkhdr.EN <= io.en @[el2_lib.scala 477:18]
clkhdr.SE <= io.scan_mode @[el2_lib.scala 478:18]
extmodule gated_latch_11 :
output Q : Clock
input CK : Clock
input EN : UInt<1>
input SE : UInt<1>
defname = gated_latch
module rvclkhdr_11 :
input clock : Clock
input reset : Reset
output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
inst clkhdr of gated_latch_11 @[el2_lib.scala 474:26]
clkhdr.SE is invalid
clkhdr.EN is invalid
clkhdr.CK is invalid
clkhdr.Q is invalid
io.l1clk <= clkhdr.Q @[el2_lib.scala 475:14]
clkhdr.CK <= io.clk @[el2_lib.scala 476:18]
clkhdr.EN <= io.en @[el2_lib.scala 477:18]
clkhdr.SE <= io.scan_mode @[el2_lib.scala 478:18]
module lsu_bus_buffer :
input clock : Clock
input reset : AsyncReset
output io : {flip scan_mode : UInt<1>, tlu_busbuff : {lsu_pmu_bus_trxn : UInt<1>, lsu_pmu_bus_misaligned : UInt<1>, lsu_pmu_bus_error : UInt<1>, lsu_pmu_bus_busy : UInt<1>, flip dec_tlu_external_ldfwd_disable : UInt<1>, flip dec_tlu_wb_coalescing_disable : UInt<1>, flip dec_tlu_sideeffect_posted_disable : UInt<1>, lsu_imprecise_error_load_any : UInt<1>, lsu_imprecise_error_store_any : UInt<1>, lsu_imprecise_error_addr_any : UInt<32>}, dctl_busbuff : {lsu_nonblock_load_valid_m : UInt<1>, lsu_nonblock_load_tag_m : UInt<2>, lsu_nonblock_load_inv_r : UInt<1>, lsu_nonblock_load_inv_tag_r : UInt<2>, lsu_nonblock_load_data_valid : UInt<1>, lsu_nonblock_load_data_error : UInt<1>, lsu_nonblock_load_data_tag : UInt<2>, lsu_nonblock_load_data : UInt<32>}, flip dec_tlu_force_halt : UInt<1>, flip lsu_c2_r_clk : Clock, flip lsu_bus_ibuf_c1_clk : Clock, flip lsu_bus_obuf_c1_clk : Clock, flip lsu_bus_buf_c1_clk : Clock, flip lsu_free_c2_clk : Clock, flip lsu_busm_clk : Clock, flip dec_lsu_valid_raw_d : UInt<1>, flip lsu_pkt_m : {valid : UInt<1>, bits : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>}}, flip lsu_pkt_r : {valid : UInt<1>, bits : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>}}, flip lsu_addr_m : UInt<32>, flip end_addr_m : UInt<32>, flip lsu_addr_r : UInt<32>, flip end_addr_r : UInt<32>, flip store_data_r : UInt<32>, flip no_word_merge_r : UInt<1>, flip no_dword_merge_r : UInt<1>, flip lsu_busreq_m : UInt<1>, flip ld_full_hit_m : UInt<1>, flip flush_m_up : UInt<1>, flip flush_r : UInt<1>, flip lsu_commit_r : UInt<1>, flip is_sideeffects_r : UInt<1>, flip ldst_dual_d : UInt<1>, flip ldst_dual_m : UInt<1>, flip ldst_dual_r : UInt<1>, flip ldst_byteen_ext_m : UInt<8>, lsu_axi : {aw : {flip ready : UInt<1>, valid : UInt<1>, bits : {id : UInt<3>, addr : UInt<32>, region : UInt<4>, len : UInt<8>, size : UInt<3>, burst : UInt<2>, lock : UInt<1>, cache : UInt<4>, prot : UInt<3>, qos : UInt<4>}}, w : {flip ready : UInt<1>, valid : UInt<1>, bits : {data : UInt<64>, strb : UInt<8>, last : UInt<1>}}, flip b : {flip ready : UInt<1>, valid : UInt<1>, bits : {resp : UInt<2>, id : UInt<3>}}, ar : {flip ready : UInt<1>, valid : UInt<1>, bits : {id : UInt<3>, addr : UInt<32>, region : UInt<4>, len : UInt<8>, size : UInt<3>, burst : UInt<2>, lock : UInt<1>, cache : UInt<4>, prot : UInt<3>, qos : UInt<4>}}, flip r : {flip ready : UInt<1>, valid : UInt<1>, bits : {id : UInt<3>, data : UInt<64>, resp : UInt<2>, last : UInt<1>}}}, flip lsu_bus_clk_en : UInt<1>, flip lsu_bus_clk_en_q : UInt<1>, lsu_busreq_r : UInt<1>, lsu_bus_buffer_pend_any : UInt<1>, lsu_bus_buffer_full_any : UInt<1>, lsu_bus_buffer_empty_any : UInt<1>, lsu_bus_idle_any : UInt<1>, ld_byte_hit_buf_lo : UInt<4>, ld_byte_hit_buf_hi : UInt<4>, ld_fwddata_buf_lo : UInt<32>, ld_fwddata_buf_hi : UInt<32>}
wire buf_addr : UInt<32>[4] @[lsu_bus_buffer.scala 67:22]
wire buf_state : UInt<3>[4] @[lsu_bus_buffer.scala 68:23]
wire buf_write : UInt<4>
buf_write <= UInt<1>("h00")
wire CmdPtr0 : UInt<2>
CmdPtr0 <= UInt<1>("h00")
node ldst_byteen_hi_m = bits(io.ldst_byteen_ext_m, 7, 4) @[lsu_bus_buffer.scala 73:46]
node ldst_byteen_lo_m = bits(io.ldst_byteen_ext_m, 3, 0) @[lsu_bus_buffer.scala 74:46]
node _T = bits(io.lsu_addr_m, 31, 2) @[lsu_bus_buffer.scala 76:66]
node _T_1 = bits(buf_addr[0], 31, 2) @[lsu_bus_buffer.scala 76:89]
node _T_2 = eq(_T, _T_1) @[lsu_bus_buffer.scala 76:74]
node _T_3 = bits(buf_write, 0, 0) @[lsu_bus_buffer.scala 76:109]
node _T_4 = and(_T_2, _T_3) @[lsu_bus_buffer.scala 76:98]
node _T_5 = neq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 76:129]
node _T_6 = and(_T_4, _T_5) @[lsu_bus_buffer.scala 76:113]
node ld_addr_hitvec_lo_0 = and(_T_6, io.lsu_busreq_m) @[lsu_bus_buffer.scala 76:141]
node _T_7 = bits(io.lsu_addr_m, 31, 2) @[lsu_bus_buffer.scala 76:66]
node _T_8 = bits(buf_addr[1], 31, 2) @[lsu_bus_buffer.scala 76:89]
node _T_9 = eq(_T_7, _T_8) @[lsu_bus_buffer.scala 76:74]
node _T_10 = bits(buf_write, 1, 1) @[lsu_bus_buffer.scala 76:109]
node _T_11 = and(_T_9, _T_10) @[lsu_bus_buffer.scala 76:98]
node _T_12 = neq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 76:129]
node _T_13 = and(_T_11, _T_12) @[lsu_bus_buffer.scala 76:113]
node ld_addr_hitvec_lo_1 = and(_T_13, io.lsu_busreq_m) @[lsu_bus_buffer.scala 76:141]
node _T_14 = bits(io.lsu_addr_m, 31, 2) @[lsu_bus_buffer.scala 76:66]
node _T_15 = bits(buf_addr[2], 31, 2) @[lsu_bus_buffer.scala 76:89]
node _T_16 = eq(_T_14, _T_15) @[lsu_bus_buffer.scala 76:74]
node _T_17 = bits(buf_write, 2, 2) @[lsu_bus_buffer.scala 76:109]
node _T_18 = and(_T_16, _T_17) @[lsu_bus_buffer.scala 76:98]
node _T_19 = neq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 76:129]
node _T_20 = and(_T_18, _T_19) @[lsu_bus_buffer.scala 76:113]
node ld_addr_hitvec_lo_2 = and(_T_20, io.lsu_busreq_m) @[lsu_bus_buffer.scala 76:141]
node _T_21 = bits(io.lsu_addr_m, 31, 2) @[lsu_bus_buffer.scala 76:66]
node _T_22 = bits(buf_addr[3], 31, 2) @[lsu_bus_buffer.scala 76:89]
node _T_23 = eq(_T_21, _T_22) @[lsu_bus_buffer.scala 76:74]
node _T_24 = bits(buf_write, 3, 3) @[lsu_bus_buffer.scala 76:109]
node _T_25 = and(_T_23, _T_24) @[lsu_bus_buffer.scala 76:98]
node _T_26 = neq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 76:129]
node _T_27 = and(_T_25, _T_26) @[lsu_bus_buffer.scala 76:113]
node ld_addr_hitvec_lo_3 = and(_T_27, io.lsu_busreq_m) @[lsu_bus_buffer.scala 76:141]
node _T_28 = bits(io.end_addr_m, 31, 2) @[lsu_bus_buffer.scala 77:66]
node _T_29 = bits(buf_addr[0], 31, 2) @[lsu_bus_buffer.scala 77:89]
node _T_30 = eq(_T_28, _T_29) @[lsu_bus_buffer.scala 77:74]
node _T_31 = bits(buf_write, 0, 0) @[lsu_bus_buffer.scala 77:109]
node _T_32 = and(_T_30, _T_31) @[lsu_bus_buffer.scala 77:98]
node _T_33 = neq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 77:129]
node _T_34 = and(_T_32, _T_33) @[lsu_bus_buffer.scala 77:113]
node ld_addr_hitvec_hi_0 = and(_T_34, io.lsu_busreq_m) @[lsu_bus_buffer.scala 77:141]
node _T_35 = bits(io.end_addr_m, 31, 2) @[lsu_bus_buffer.scala 77:66]
node _T_36 = bits(buf_addr[1], 31, 2) @[lsu_bus_buffer.scala 77:89]
node _T_37 = eq(_T_35, _T_36) @[lsu_bus_buffer.scala 77:74]
node _T_38 = bits(buf_write, 1, 1) @[lsu_bus_buffer.scala 77:109]
node _T_39 = and(_T_37, _T_38) @[lsu_bus_buffer.scala 77:98]
node _T_40 = neq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 77:129]
node _T_41 = and(_T_39, _T_40) @[lsu_bus_buffer.scala 77:113]
node ld_addr_hitvec_hi_1 = and(_T_41, io.lsu_busreq_m) @[lsu_bus_buffer.scala 77:141]
node _T_42 = bits(io.end_addr_m, 31, 2) @[lsu_bus_buffer.scala 77:66]
node _T_43 = bits(buf_addr[2], 31, 2) @[lsu_bus_buffer.scala 77:89]
node _T_44 = eq(_T_42, _T_43) @[lsu_bus_buffer.scala 77:74]
node _T_45 = bits(buf_write, 2, 2) @[lsu_bus_buffer.scala 77:109]
node _T_46 = and(_T_44, _T_45) @[lsu_bus_buffer.scala 77:98]
node _T_47 = neq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 77:129]
node _T_48 = and(_T_46, _T_47) @[lsu_bus_buffer.scala 77:113]
node ld_addr_hitvec_hi_2 = and(_T_48, io.lsu_busreq_m) @[lsu_bus_buffer.scala 77:141]
node _T_49 = bits(io.end_addr_m, 31, 2) @[lsu_bus_buffer.scala 77:66]
node _T_50 = bits(buf_addr[3], 31, 2) @[lsu_bus_buffer.scala 77:89]
node _T_51 = eq(_T_49, _T_50) @[lsu_bus_buffer.scala 77:74]
node _T_52 = bits(buf_write, 3, 3) @[lsu_bus_buffer.scala 77:109]
node _T_53 = and(_T_51, _T_52) @[lsu_bus_buffer.scala 77:98]
node _T_54 = neq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 77:129]
node _T_55 = and(_T_53, _T_54) @[lsu_bus_buffer.scala 77:113]
node ld_addr_hitvec_hi_3 = and(_T_55, io.lsu_busreq_m) @[lsu_bus_buffer.scala 77:141]
wire ld_byte_hitvecfn_lo : UInt<4>[4] @[lsu_bus_buffer.scala 78:33]
wire ld_byte_ibuf_hit_lo : UInt<4>
ld_byte_ibuf_hit_lo <= UInt<1>("h00")
wire ld_byte_hitvecfn_hi : UInt<4>[4] @[lsu_bus_buffer.scala 80:33]
wire ld_byte_ibuf_hit_hi : UInt<4>
ld_byte_ibuf_hit_hi <= UInt<1>("h00")
wire buf_byteen : UInt<4>[4] @[lsu_bus_buffer.scala 82:24]
buf_byteen[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 83:14]
buf_byteen[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 83:14]
buf_byteen[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 83:14]
buf_byteen[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 83:14]
wire buf_nxtstate : UInt<3>[4] @[lsu_bus_buffer.scala 84:26]
buf_nxtstate[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 85:16]
buf_nxtstate[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 85:16]
buf_nxtstate[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 85:16]
buf_nxtstate[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 85:16]
wire buf_wr_en : UInt<1>[4] @[lsu_bus_buffer.scala 86:23]
buf_wr_en[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 87:13]
buf_wr_en[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 87:13]
buf_wr_en[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 87:13]
buf_wr_en[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 87:13]
wire buf_data_en : UInt<1>[4] @[lsu_bus_buffer.scala 88:25]
buf_data_en[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 89:15]
buf_data_en[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 89:15]
buf_data_en[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 89:15]
buf_data_en[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 89:15]
wire buf_state_bus_en : UInt<1>[4] @[lsu_bus_buffer.scala 90:30]
buf_state_bus_en[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 91:20]
buf_state_bus_en[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 91:20]
buf_state_bus_en[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 91:20]
buf_state_bus_en[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 91:20]
wire buf_ldfwd_in : UInt<1>[4] @[lsu_bus_buffer.scala 92:26]
buf_ldfwd_in[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 93:16]
buf_ldfwd_in[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 93:16]
buf_ldfwd_in[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 93:16]
buf_ldfwd_in[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 93:16]
wire buf_ldfwd_en : UInt<1>[4] @[lsu_bus_buffer.scala 94:26]
buf_ldfwd_en[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 95:16]
buf_ldfwd_en[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 95:16]
buf_ldfwd_en[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 95:16]
buf_ldfwd_en[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 95:16]
wire buf_data_in : UInt<32>[4] @[lsu_bus_buffer.scala 96:25]
buf_data_in[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 97:15]
buf_data_in[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 97:15]
buf_data_in[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 97:15]
buf_data_in[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 97:15]
wire buf_ldfwdtag_in : UInt<2>[4] @[lsu_bus_buffer.scala 98:29]
buf_ldfwdtag_in[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 99:19]
buf_ldfwdtag_in[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 99:19]
buf_ldfwdtag_in[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 99:19]
buf_ldfwdtag_in[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 99:19]
wire buf_error_en : UInt<1>[4] @[lsu_bus_buffer.scala 100:26]
buf_error_en[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 101:16]
buf_error_en[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 101:16]
buf_error_en[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 101:16]
buf_error_en[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 101:16]
wire bus_rsp_read_error : UInt<1>
bus_rsp_read_error <= UInt<1>("h00")
wire bus_rsp_rdata : UInt<64>
bus_rsp_rdata <= UInt<1>("h00")
wire bus_rsp_write_error : UInt<1>
bus_rsp_write_error <= UInt<1>("h00")
wire buf_dualtag : UInt<2>[4] @[lsu_bus_buffer.scala 105:25]
buf_dualtag[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 106:15]
buf_dualtag[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 106:15]
buf_dualtag[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 106:15]
buf_dualtag[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 106:15]
wire buf_ldfwd : UInt<4>
buf_ldfwd <= UInt<1>("h00")
wire buf_resp_state_bus_en : UInt<1>[4] @[lsu_bus_buffer.scala 108:35]
buf_resp_state_bus_en[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 109:25]
buf_resp_state_bus_en[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 109:25]
buf_resp_state_bus_en[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 109:25]
buf_resp_state_bus_en[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 109:25]
wire any_done_wait_state : UInt<1>
any_done_wait_state <= UInt<1>("h00")
wire bus_rsp_write : UInt<1>
bus_rsp_write <= UInt<1>("h00")
wire bus_rsp_write_tag : UInt<3>
bus_rsp_write_tag <= UInt<1>("h00")
wire buf_ldfwdtag : UInt<2>[4] @[lsu_bus_buffer.scala 113:26]
buf_ldfwdtag[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 114:16]
buf_ldfwdtag[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 114:16]
buf_ldfwdtag[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 114:16]
buf_ldfwdtag[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 114:16]
wire buf_rst : UInt<1>[4] @[lsu_bus_buffer.scala 115:21]
buf_rst[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 116:11]
buf_rst[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 116:11]
buf_rst[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 116:11]
buf_rst[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 116:11]
wire ibuf_drainvec_vld : UInt<4>
ibuf_drainvec_vld <= UInt<1>("h00")
wire buf_byteen_in : UInt<4>[4] @[lsu_bus_buffer.scala 118:27]
buf_byteen_in[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 119:17]
buf_byteen_in[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 119:17]
buf_byteen_in[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 119:17]
buf_byteen_in[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 119:17]
wire buf_addr_in : UInt<32>[4] @[lsu_bus_buffer.scala 120:25]
buf_addr_in[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 121:15]
buf_addr_in[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 121:15]
buf_addr_in[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 121:15]
buf_addr_in[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 121:15]
wire buf_dual_in : UInt<4>
buf_dual_in <= UInt<1>("h00")
wire buf_samedw_in : UInt<4>
buf_samedw_in <= UInt<1>("h00")
wire buf_nomerge_in : UInt<4>
buf_nomerge_in <= UInt<1>("h00")
wire buf_dualhi_in : UInt<4>
buf_dualhi_in <= UInt<1>("h00")
wire buf_dualtag_in : UInt<2>[4] @[lsu_bus_buffer.scala 126:28]
buf_dualtag_in[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 127:18]
buf_dualtag_in[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 127:18]
buf_dualtag_in[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 127:18]
buf_dualtag_in[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 127:18]
wire buf_sideeffect_in : UInt<4>
buf_sideeffect_in <= UInt<1>("h00")
wire buf_unsign_in : UInt<4>
buf_unsign_in <= UInt<1>("h00")
wire buf_sz_in : UInt<2>[4] @[lsu_bus_buffer.scala 130:23]
buf_sz_in[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 131:13]
buf_sz_in[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 131:13]
buf_sz_in[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 131:13]
buf_sz_in[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 131:13]
wire buf_write_in : UInt<4>
buf_write_in <= UInt<1>("h00")
wire buf_unsign : UInt<4>
buf_unsign <= UInt<1>("h00")
wire buf_error : UInt<4>
buf_error <= UInt<1>("h00")
wire CmdPtr1 : UInt<2>
CmdPtr1 <= UInt<1>("h00")
wire ibuf_data : UInt<32>
ibuf_data <= UInt<1>("h00")
node _T_56 = orr(ld_byte_hitvecfn_lo[0]) @[lsu_bus_buffer.scala 138:73]
node _T_57 = bits(ld_byte_ibuf_hit_lo, 0, 0) @[lsu_bus_buffer.scala 138:98]
node _T_58 = or(_T_56, _T_57) @[lsu_bus_buffer.scala 138:77]
node _T_59 = orr(ld_byte_hitvecfn_lo[1]) @[lsu_bus_buffer.scala 138:73]
node _T_60 = bits(ld_byte_ibuf_hit_lo, 1, 1) @[lsu_bus_buffer.scala 138:98]
node _T_61 = or(_T_59, _T_60) @[lsu_bus_buffer.scala 138:77]
node _T_62 = orr(ld_byte_hitvecfn_lo[2]) @[lsu_bus_buffer.scala 138:73]
node _T_63 = bits(ld_byte_ibuf_hit_lo, 2, 2) @[lsu_bus_buffer.scala 138:98]
node _T_64 = or(_T_62, _T_63) @[lsu_bus_buffer.scala 138:77]
node _T_65 = orr(ld_byte_hitvecfn_lo[3]) @[lsu_bus_buffer.scala 138:73]
node _T_66 = bits(ld_byte_ibuf_hit_lo, 3, 3) @[lsu_bus_buffer.scala 138:98]
node _T_67 = or(_T_65, _T_66) @[lsu_bus_buffer.scala 138:77]
node _T_68 = cat(_T_67, _T_64) @[Cat.scala 29:58]
node _T_69 = cat(_T_68, _T_61) @[Cat.scala 29:58]
node _T_70 = cat(_T_69, _T_58) @[Cat.scala 29:58]
io.ld_byte_hit_buf_lo <= _T_70 @[lsu_bus_buffer.scala 138:25]
node _T_71 = orr(ld_byte_hitvecfn_hi[0]) @[lsu_bus_buffer.scala 139:73]
node _T_72 = bits(ld_byte_ibuf_hit_hi, 0, 0) @[lsu_bus_buffer.scala 139:98]
node _T_73 = or(_T_71, _T_72) @[lsu_bus_buffer.scala 139:77]
node _T_74 = orr(ld_byte_hitvecfn_hi[1]) @[lsu_bus_buffer.scala 139:73]
node _T_75 = bits(ld_byte_ibuf_hit_hi, 1, 1) @[lsu_bus_buffer.scala 139:98]
node _T_76 = or(_T_74, _T_75) @[lsu_bus_buffer.scala 139:77]
node _T_77 = orr(ld_byte_hitvecfn_hi[2]) @[lsu_bus_buffer.scala 139:73]
node _T_78 = bits(ld_byte_ibuf_hit_hi, 2, 2) @[lsu_bus_buffer.scala 139:98]
node _T_79 = or(_T_77, _T_78) @[lsu_bus_buffer.scala 139:77]
node _T_80 = orr(ld_byte_hitvecfn_hi[3]) @[lsu_bus_buffer.scala 139:73]
node _T_81 = bits(ld_byte_ibuf_hit_hi, 3, 3) @[lsu_bus_buffer.scala 139:98]
node _T_82 = or(_T_80, _T_81) @[lsu_bus_buffer.scala 139:77]
node _T_83 = cat(_T_82, _T_79) @[Cat.scala 29:58]
node _T_84 = cat(_T_83, _T_76) @[Cat.scala 29:58]
node _T_85 = cat(_T_84, _T_73) @[Cat.scala 29:58]
io.ld_byte_hit_buf_hi <= _T_85 @[lsu_bus_buffer.scala 139:25]
node _T_86 = bits(buf_byteen[0], 0, 0) @[lsu_bus_buffer.scala 141:110]
node _T_87 = and(ld_addr_hitvec_lo_0, _T_86) @[lsu_bus_buffer.scala 141:95]
node _T_88 = bits(ldst_byteen_lo_m, 0, 0) @[lsu_bus_buffer.scala 141:132]
node _T_89 = and(_T_87, _T_88) @[lsu_bus_buffer.scala 141:114]
node _T_90 = bits(buf_byteen[1], 0, 0) @[lsu_bus_buffer.scala 141:110]
node _T_91 = and(ld_addr_hitvec_lo_1, _T_90) @[lsu_bus_buffer.scala 141:95]
node _T_92 = bits(ldst_byteen_lo_m, 0, 0) @[lsu_bus_buffer.scala 141:132]
node _T_93 = and(_T_91, _T_92) @[lsu_bus_buffer.scala 141:114]
node _T_94 = bits(buf_byteen[2], 0, 0) @[lsu_bus_buffer.scala 141:110]
node _T_95 = and(ld_addr_hitvec_lo_2, _T_94) @[lsu_bus_buffer.scala 141:95]
node _T_96 = bits(ldst_byteen_lo_m, 0, 0) @[lsu_bus_buffer.scala 141:132]
node _T_97 = and(_T_95, _T_96) @[lsu_bus_buffer.scala 141:114]
node _T_98 = bits(buf_byteen[3], 0, 0) @[lsu_bus_buffer.scala 141:110]
node _T_99 = and(ld_addr_hitvec_lo_3, _T_98) @[lsu_bus_buffer.scala 141:95]
node _T_100 = bits(ldst_byteen_lo_m, 0, 0) @[lsu_bus_buffer.scala 141:132]
node _T_101 = and(_T_99, _T_100) @[lsu_bus_buffer.scala 141:114]
node _T_102 = cat(_T_101, _T_97) @[Cat.scala 29:58]
node _T_103 = cat(_T_102, _T_93) @[Cat.scala 29:58]
node ld_byte_hitvec_lo_0 = cat(_T_103, _T_89) @[Cat.scala 29:58]
node _T_104 = bits(buf_byteen[0], 1, 1) @[lsu_bus_buffer.scala 141:110]
node _T_105 = and(ld_addr_hitvec_lo_0, _T_104) @[lsu_bus_buffer.scala 141:95]
node _T_106 = bits(ldst_byteen_lo_m, 1, 1) @[lsu_bus_buffer.scala 141:132]
node _T_107 = and(_T_105, _T_106) @[lsu_bus_buffer.scala 141:114]
node _T_108 = bits(buf_byteen[1], 1, 1) @[lsu_bus_buffer.scala 141:110]
node _T_109 = and(ld_addr_hitvec_lo_1, _T_108) @[lsu_bus_buffer.scala 141:95]
node _T_110 = bits(ldst_byteen_lo_m, 1, 1) @[lsu_bus_buffer.scala 141:132]
node _T_111 = and(_T_109, _T_110) @[lsu_bus_buffer.scala 141:114]
node _T_112 = bits(buf_byteen[2], 1, 1) @[lsu_bus_buffer.scala 141:110]
node _T_113 = and(ld_addr_hitvec_lo_2, _T_112) @[lsu_bus_buffer.scala 141:95]
node _T_114 = bits(ldst_byteen_lo_m, 1, 1) @[lsu_bus_buffer.scala 141:132]
node _T_115 = and(_T_113, _T_114) @[lsu_bus_buffer.scala 141:114]
node _T_116 = bits(buf_byteen[3], 1, 1) @[lsu_bus_buffer.scala 141:110]
node _T_117 = and(ld_addr_hitvec_lo_3, _T_116) @[lsu_bus_buffer.scala 141:95]
node _T_118 = bits(ldst_byteen_lo_m, 1, 1) @[lsu_bus_buffer.scala 141:132]
node _T_119 = and(_T_117, _T_118) @[lsu_bus_buffer.scala 141:114]
node _T_120 = cat(_T_119, _T_115) @[Cat.scala 29:58]
node _T_121 = cat(_T_120, _T_111) @[Cat.scala 29:58]
node ld_byte_hitvec_lo_1 = cat(_T_121, _T_107) @[Cat.scala 29:58]
node _T_122 = bits(buf_byteen[0], 2, 2) @[lsu_bus_buffer.scala 141:110]
node _T_123 = and(ld_addr_hitvec_lo_0, _T_122) @[lsu_bus_buffer.scala 141:95]
node _T_124 = bits(ldst_byteen_lo_m, 2, 2) @[lsu_bus_buffer.scala 141:132]
node _T_125 = and(_T_123, _T_124) @[lsu_bus_buffer.scala 141:114]
node _T_126 = bits(buf_byteen[1], 2, 2) @[lsu_bus_buffer.scala 141:110]
node _T_127 = and(ld_addr_hitvec_lo_1, _T_126) @[lsu_bus_buffer.scala 141:95]
node _T_128 = bits(ldst_byteen_lo_m, 2, 2) @[lsu_bus_buffer.scala 141:132]
node _T_129 = and(_T_127, _T_128) @[lsu_bus_buffer.scala 141:114]
node _T_130 = bits(buf_byteen[2], 2, 2) @[lsu_bus_buffer.scala 141:110]
node _T_131 = and(ld_addr_hitvec_lo_2, _T_130) @[lsu_bus_buffer.scala 141:95]
node _T_132 = bits(ldst_byteen_lo_m, 2, 2) @[lsu_bus_buffer.scala 141:132]
node _T_133 = and(_T_131, _T_132) @[lsu_bus_buffer.scala 141:114]
node _T_134 = bits(buf_byteen[3], 2, 2) @[lsu_bus_buffer.scala 141:110]
node _T_135 = and(ld_addr_hitvec_lo_3, _T_134) @[lsu_bus_buffer.scala 141:95]
node _T_136 = bits(ldst_byteen_lo_m, 2, 2) @[lsu_bus_buffer.scala 141:132]
node _T_137 = and(_T_135, _T_136) @[lsu_bus_buffer.scala 141:114]
node _T_138 = cat(_T_137, _T_133) @[Cat.scala 29:58]
node _T_139 = cat(_T_138, _T_129) @[Cat.scala 29:58]
node ld_byte_hitvec_lo_2 = cat(_T_139, _T_125) @[Cat.scala 29:58]
node _T_140 = bits(buf_byteen[0], 3, 3) @[lsu_bus_buffer.scala 141:110]
node _T_141 = and(ld_addr_hitvec_lo_0, _T_140) @[lsu_bus_buffer.scala 141:95]
node _T_142 = bits(ldst_byteen_lo_m, 3, 3) @[lsu_bus_buffer.scala 141:132]
node _T_143 = and(_T_141, _T_142) @[lsu_bus_buffer.scala 141:114]
node _T_144 = bits(buf_byteen[1], 3, 3) @[lsu_bus_buffer.scala 141:110]
node _T_145 = and(ld_addr_hitvec_lo_1, _T_144) @[lsu_bus_buffer.scala 141:95]
node _T_146 = bits(ldst_byteen_lo_m, 3, 3) @[lsu_bus_buffer.scala 141:132]
node _T_147 = and(_T_145, _T_146) @[lsu_bus_buffer.scala 141:114]
node _T_148 = bits(buf_byteen[2], 3, 3) @[lsu_bus_buffer.scala 141:110]
node _T_149 = and(ld_addr_hitvec_lo_2, _T_148) @[lsu_bus_buffer.scala 141:95]
node _T_150 = bits(ldst_byteen_lo_m, 3, 3) @[lsu_bus_buffer.scala 141:132]
node _T_151 = and(_T_149, _T_150) @[lsu_bus_buffer.scala 141:114]
node _T_152 = bits(buf_byteen[3], 3, 3) @[lsu_bus_buffer.scala 141:110]
node _T_153 = and(ld_addr_hitvec_lo_3, _T_152) @[lsu_bus_buffer.scala 141:95]
node _T_154 = bits(ldst_byteen_lo_m, 3, 3) @[lsu_bus_buffer.scala 141:132]
node _T_155 = and(_T_153, _T_154) @[lsu_bus_buffer.scala 141:114]
node _T_156 = cat(_T_155, _T_151) @[Cat.scala 29:58]
node _T_157 = cat(_T_156, _T_147) @[Cat.scala 29:58]
node ld_byte_hitvec_lo_3 = cat(_T_157, _T_143) @[Cat.scala 29:58]
node _T_158 = bits(buf_byteen[0], 0, 0) @[lsu_bus_buffer.scala 142:110]
node _T_159 = and(ld_addr_hitvec_hi_0, _T_158) @[lsu_bus_buffer.scala 142:95]
node _T_160 = bits(ldst_byteen_hi_m, 0, 0) @[lsu_bus_buffer.scala 142:132]
node _T_161 = and(_T_159, _T_160) @[lsu_bus_buffer.scala 142:114]
node _T_162 = bits(buf_byteen[1], 0, 0) @[lsu_bus_buffer.scala 142:110]
node _T_163 = and(ld_addr_hitvec_hi_1, _T_162) @[lsu_bus_buffer.scala 142:95]
node _T_164 = bits(ldst_byteen_hi_m, 0, 0) @[lsu_bus_buffer.scala 142:132]
node _T_165 = and(_T_163, _T_164) @[lsu_bus_buffer.scala 142:114]
node _T_166 = bits(buf_byteen[2], 0, 0) @[lsu_bus_buffer.scala 142:110]
node _T_167 = and(ld_addr_hitvec_hi_2, _T_166) @[lsu_bus_buffer.scala 142:95]
node _T_168 = bits(ldst_byteen_hi_m, 0, 0) @[lsu_bus_buffer.scala 142:132]
node _T_169 = and(_T_167, _T_168) @[lsu_bus_buffer.scala 142:114]
node _T_170 = bits(buf_byteen[3], 0, 0) @[lsu_bus_buffer.scala 142:110]
node _T_171 = and(ld_addr_hitvec_hi_3, _T_170) @[lsu_bus_buffer.scala 142:95]
node _T_172 = bits(ldst_byteen_hi_m, 0, 0) @[lsu_bus_buffer.scala 142:132]
node _T_173 = and(_T_171, _T_172) @[lsu_bus_buffer.scala 142:114]
node _T_174 = cat(_T_173, _T_169) @[Cat.scala 29:58]
node _T_175 = cat(_T_174, _T_165) @[Cat.scala 29:58]
node ld_byte_hitvec_hi_0 = cat(_T_175, _T_161) @[Cat.scala 29:58]
node _T_176 = bits(buf_byteen[0], 1, 1) @[lsu_bus_buffer.scala 142:110]
node _T_177 = and(ld_addr_hitvec_hi_0, _T_176) @[lsu_bus_buffer.scala 142:95]
node _T_178 = bits(ldst_byteen_hi_m, 1, 1) @[lsu_bus_buffer.scala 142:132]
node _T_179 = and(_T_177, _T_178) @[lsu_bus_buffer.scala 142:114]
node _T_180 = bits(buf_byteen[1], 1, 1) @[lsu_bus_buffer.scala 142:110]
node _T_181 = and(ld_addr_hitvec_hi_1, _T_180) @[lsu_bus_buffer.scala 142:95]
node _T_182 = bits(ldst_byteen_hi_m, 1, 1) @[lsu_bus_buffer.scala 142:132]
node _T_183 = and(_T_181, _T_182) @[lsu_bus_buffer.scala 142:114]
node _T_184 = bits(buf_byteen[2], 1, 1) @[lsu_bus_buffer.scala 142:110]
node _T_185 = and(ld_addr_hitvec_hi_2, _T_184) @[lsu_bus_buffer.scala 142:95]
node _T_186 = bits(ldst_byteen_hi_m, 1, 1) @[lsu_bus_buffer.scala 142:132]
node _T_187 = and(_T_185, _T_186) @[lsu_bus_buffer.scala 142:114]
node _T_188 = bits(buf_byteen[3], 1, 1) @[lsu_bus_buffer.scala 142:110]
node _T_189 = and(ld_addr_hitvec_hi_3, _T_188) @[lsu_bus_buffer.scala 142:95]
node _T_190 = bits(ldst_byteen_hi_m, 1, 1) @[lsu_bus_buffer.scala 142:132]
node _T_191 = and(_T_189, _T_190) @[lsu_bus_buffer.scala 142:114]
node _T_192 = cat(_T_191, _T_187) @[Cat.scala 29:58]
node _T_193 = cat(_T_192, _T_183) @[Cat.scala 29:58]
node ld_byte_hitvec_hi_1 = cat(_T_193, _T_179) @[Cat.scala 29:58]
node _T_194 = bits(buf_byteen[0], 2, 2) @[lsu_bus_buffer.scala 142:110]
node _T_195 = and(ld_addr_hitvec_hi_0, _T_194) @[lsu_bus_buffer.scala 142:95]
node _T_196 = bits(ldst_byteen_hi_m, 2, 2) @[lsu_bus_buffer.scala 142:132]
node _T_197 = and(_T_195, _T_196) @[lsu_bus_buffer.scala 142:114]
node _T_198 = bits(buf_byteen[1], 2, 2) @[lsu_bus_buffer.scala 142:110]
node _T_199 = and(ld_addr_hitvec_hi_1, _T_198) @[lsu_bus_buffer.scala 142:95]
node _T_200 = bits(ldst_byteen_hi_m, 2, 2) @[lsu_bus_buffer.scala 142:132]
node _T_201 = and(_T_199, _T_200) @[lsu_bus_buffer.scala 142:114]
node _T_202 = bits(buf_byteen[2], 2, 2) @[lsu_bus_buffer.scala 142:110]
node _T_203 = and(ld_addr_hitvec_hi_2, _T_202) @[lsu_bus_buffer.scala 142:95]
node _T_204 = bits(ldst_byteen_hi_m, 2, 2) @[lsu_bus_buffer.scala 142:132]
node _T_205 = and(_T_203, _T_204) @[lsu_bus_buffer.scala 142:114]
node _T_206 = bits(buf_byteen[3], 2, 2) @[lsu_bus_buffer.scala 142:110]
node _T_207 = and(ld_addr_hitvec_hi_3, _T_206) @[lsu_bus_buffer.scala 142:95]
node _T_208 = bits(ldst_byteen_hi_m, 2, 2) @[lsu_bus_buffer.scala 142:132]
node _T_209 = and(_T_207, _T_208) @[lsu_bus_buffer.scala 142:114]
node _T_210 = cat(_T_209, _T_205) @[Cat.scala 29:58]
node _T_211 = cat(_T_210, _T_201) @[Cat.scala 29:58]
node ld_byte_hitvec_hi_2 = cat(_T_211, _T_197) @[Cat.scala 29:58]
node _T_212 = bits(buf_byteen[0], 3, 3) @[lsu_bus_buffer.scala 142:110]
node _T_213 = and(ld_addr_hitvec_hi_0, _T_212) @[lsu_bus_buffer.scala 142:95]
node _T_214 = bits(ldst_byteen_hi_m, 3, 3) @[lsu_bus_buffer.scala 142:132]
node _T_215 = and(_T_213, _T_214) @[lsu_bus_buffer.scala 142:114]
node _T_216 = bits(buf_byteen[1], 3, 3) @[lsu_bus_buffer.scala 142:110]
node _T_217 = and(ld_addr_hitvec_hi_1, _T_216) @[lsu_bus_buffer.scala 142:95]
node _T_218 = bits(ldst_byteen_hi_m, 3, 3) @[lsu_bus_buffer.scala 142:132]
node _T_219 = and(_T_217, _T_218) @[lsu_bus_buffer.scala 142:114]
node _T_220 = bits(buf_byteen[2], 3, 3) @[lsu_bus_buffer.scala 142:110]
node _T_221 = and(ld_addr_hitvec_hi_2, _T_220) @[lsu_bus_buffer.scala 142:95]
node _T_222 = bits(ldst_byteen_hi_m, 3, 3) @[lsu_bus_buffer.scala 142:132]
node _T_223 = and(_T_221, _T_222) @[lsu_bus_buffer.scala 142:114]
node _T_224 = bits(buf_byteen[3], 3, 3) @[lsu_bus_buffer.scala 142:110]
node _T_225 = and(ld_addr_hitvec_hi_3, _T_224) @[lsu_bus_buffer.scala 142:95]
node _T_226 = bits(ldst_byteen_hi_m, 3, 3) @[lsu_bus_buffer.scala 142:132]
node _T_227 = and(_T_225, _T_226) @[lsu_bus_buffer.scala 142:114]
node _T_228 = cat(_T_227, _T_223) @[Cat.scala 29:58]
node _T_229 = cat(_T_228, _T_219) @[Cat.scala 29:58]
node ld_byte_hitvec_hi_3 = cat(_T_229, _T_215) @[Cat.scala 29:58]
wire buf_age_younger : UInt<4>[4] @[lsu_bus_buffer.scala 144:29]
buf_age_younger[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 145:19]
buf_age_younger[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 145:19]
buf_age_younger[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 145:19]
buf_age_younger[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 145:19]
node _T_230 = bits(ld_byte_hitvec_lo_0, 0, 0) @[lsu_bus_buffer.scala 146:93]
node _T_231 = and(ld_byte_hitvec_lo_0, buf_age_younger[0]) @[lsu_bus_buffer.scala 146:122]
node _T_232 = orr(_T_231) @[lsu_bus_buffer.scala 146:144]
node _T_233 = eq(_T_232, UInt<1>("h00")) @[lsu_bus_buffer.scala 146:99]
node _T_234 = and(_T_230, _T_233) @[lsu_bus_buffer.scala 146:97]
node _T_235 = bits(ld_byte_ibuf_hit_lo, 0, 0) @[lsu_bus_buffer.scala 146:170]
node _T_236 = eq(_T_235, UInt<1>("h00")) @[lsu_bus_buffer.scala 146:150]
node _T_237 = and(_T_234, _T_236) @[lsu_bus_buffer.scala 146:148]
node _T_238 = bits(ld_byte_hitvec_lo_0, 1, 1) @[lsu_bus_buffer.scala 146:93]
node _T_239 = and(ld_byte_hitvec_lo_0, buf_age_younger[1]) @[lsu_bus_buffer.scala 146:122]
node _T_240 = orr(_T_239) @[lsu_bus_buffer.scala 146:144]
node _T_241 = eq(_T_240, UInt<1>("h00")) @[lsu_bus_buffer.scala 146:99]
node _T_242 = and(_T_238, _T_241) @[lsu_bus_buffer.scala 146:97]
node _T_243 = bits(ld_byte_ibuf_hit_lo, 0, 0) @[lsu_bus_buffer.scala 146:170]
node _T_244 = eq(_T_243, UInt<1>("h00")) @[lsu_bus_buffer.scala 146:150]
node _T_245 = and(_T_242, _T_244) @[lsu_bus_buffer.scala 146:148]
node _T_246 = bits(ld_byte_hitvec_lo_0, 2, 2) @[lsu_bus_buffer.scala 146:93]
node _T_247 = and(ld_byte_hitvec_lo_0, buf_age_younger[2]) @[lsu_bus_buffer.scala 146:122]
node _T_248 = orr(_T_247) @[lsu_bus_buffer.scala 146:144]
node _T_249 = eq(_T_248, UInt<1>("h00")) @[lsu_bus_buffer.scala 146:99]
node _T_250 = and(_T_246, _T_249) @[lsu_bus_buffer.scala 146:97]
node _T_251 = bits(ld_byte_ibuf_hit_lo, 0, 0) @[lsu_bus_buffer.scala 146:170]
node _T_252 = eq(_T_251, UInt<1>("h00")) @[lsu_bus_buffer.scala 146:150]
node _T_253 = and(_T_250, _T_252) @[lsu_bus_buffer.scala 146:148]
node _T_254 = bits(ld_byte_hitvec_lo_0, 3, 3) @[lsu_bus_buffer.scala 146:93]
node _T_255 = and(ld_byte_hitvec_lo_0, buf_age_younger[3]) @[lsu_bus_buffer.scala 146:122]
node _T_256 = orr(_T_255) @[lsu_bus_buffer.scala 146:144]
node _T_257 = eq(_T_256, UInt<1>("h00")) @[lsu_bus_buffer.scala 146:99]
node _T_258 = and(_T_254, _T_257) @[lsu_bus_buffer.scala 146:97]
node _T_259 = bits(ld_byte_ibuf_hit_lo, 0, 0) @[lsu_bus_buffer.scala 146:170]
node _T_260 = eq(_T_259, UInt<1>("h00")) @[lsu_bus_buffer.scala 146:150]
node _T_261 = and(_T_258, _T_260) @[lsu_bus_buffer.scala 146:148]
node _T_262 = cat(_T_261, _T_253) @[Cat.scala 29:58]
node _T_263 = cat(_T_262, _T_245) @[Cat.scala 29:58]
node _T_264 = cat(_T_263, _T_237) @[Cat.scala 29:58]
node _T_265 = bits(ld_byte_hitvec_lo_1, 0, 0) @[lsu_bus_buffer.scala 146:93]
node _T_266 = and(ld_byte_hitvec_lo_1, buf_age_younger[0]) @[lsu_bus_buffer.scala 146:122]
node _T_267 = orr(_T_266) @[lsu_bus_buffer.scala 146:144]
node _T_268 = eq(_T_267, UInt<1>("h00")) @[lsu_bus_buffer.scala 146:99]
node _T_269 = and(_T_265, _T_268) @[lsu_bus_buffer.scala 146:97]
node _T_270 = bits(ld_byte_ibuf_hit_lo, 1, 1) @[lsu_bus_buffer.scala 146:170]
node _T_271 = eq(_T_270, UInt<1>("h00")) @[lsu_bus_buffer.scala 146:150]
node _T_272 = and(_T_269, _T_271) @[lsu_bus_buffer.scala 146:148]
node _T_273 = bits(ld_byte_hitvec_lo_1, 1, 1) @[lsu_bus_buffer.scala 146:93]
node _T_274 = and(ld_byte_hitvec_lo_1, buf_age_younger[1]) @[lsu_bus_buffer.scala 146:122]
node _T_275 = orr(_T_274) @[lsu_bus_buffer.scala 146:144]
node _T_276 = eq(_T_275, UInt<1>("h00")) @[lsu_bus_buffer.scala 146:99]
node _T_277 = and(_T_273, _T_276) @[lsu_bus_buffer.scala 146:97]
node _T_278 = bits(ld_byte_ibuf_hit_lo, 1, 1) @[lsu_bus_buffer.scala 146:170]
node _T_279 = eq(_T_278, UInt<1>("h00")) @[lsu_bus_buffer.scala 146:150]
node _T_280 = and(_T_277, _T_279) @[lsu_bus_buffer.scala 146:148]
node _T_281 = bits(ld_byte_hitvec_lo_1, 2, 2) @[lsu_bus_buffer.scala 146:93]
node _T_282 = and(ld_byte_hitvec_lo_1, buf_age_younger[2]) @[lsu_bus_buffer.scala 146:122]
node _T_283 = orr(_T_282) @[lsu_bus_buffer.scala 146:144]
node _T_284 = eq(_T_283, UInt<1>("h00")) @[lsu_bus_buffer.scala 146:99]
node _T_285 = and(_T_281, _T_284) @[lsu_bus_buffer.scala 146:97]
node _T_286 = bits(ld_byte_ibuf_hit_lo, 1, 1) @[lsu_bus_buffer.scala 146:170]
node _T_287 = eq(_T_286, UInt<1>("h00")) @[lsu_bus_buffer.scala 146:150]
node _T_288 = and(_T_285, _T_287) @[lsu_bus_buffer.scala 146:148]
node _T_289 = bits(ld_byte_hitvec_lo_1, 3, 3) @[lsu_bus_buffer.scala 146:93]
node _T_290 = and(ld_byte_hitvec_lo_1, buf_age_younger[3]) @[lsu_bus_buffer.scala 146:122]
node _T_291 = orr(_T_290) @[lsu_bus_buffer.scala 146:144]
node _T_292 = eq(_T_291, UInt<1>("h00")) @[lsu_bus_buffer.scala 146:99]
node _T_293 = and(_T_289, _T_292) @[lsu_bus_buffer.scala 146:97]
node _T_294 = bits(ld_byte_ibuf_hit_lo, 1, 1) @[lsu_bus_buffer.scala 146:170]
node _T_295 = eq(_T_294, UInt<1>("h00")) @[lsu_bus_buffer.scala 146:150]
node _T_296 = and(_T_293, _T_295) @[lsu_bus_buffer.scala 146:148]
node _T_297 = cat(_T_296, _T_288) @[Cat.scala 29:58]
node _T_298 = cat(_T_297, _T_280) @[Cat.scala 29:58]
node _T_299 = cat(_T_298, _T_272) @[Cat.scala 29:58]
node _T_300 = bits(ld_byte_hitvec_lo_2, 0, 0) @[lsu_bus_buffer.scala 146:93]
node _T_301 = and(ld_byte_hitvec_lo_2, buf_age_younger[0]) @[lsu_bus_buffer.scala 146:122]
node _T_302 = orr(_T_301) @[lsu_bus_buffer.scala 146:144]
node _T_303 = eq(_T_302, UInt<1>("h00")) @[lsu_bus_buffer.scala 146:99]
node _T_304 = and(_T_300, _T_303) @[lsu_bus_buffer.scala 146:97]
node _T_305 = bits(ld_byte_ibuf_hit_lo, 2, 2) @[lsu_bus_buffer.scala 146:170]
node _T_306 = eq(_T_305, UInt<1>("h00")) @[lsu_bus_buffer.scala 146:150]
node _T_307 = and(_T_304, _T_306) @[lsu_bus_buffer.scala 146:148]
node _T_308 = bits(ld_byte_hitvec_lo_2, 1, 1) @[lsu_bus_buffer.scala 146:93]
node _T_309 = and(ld_byte_hitvec_lo_2, buf_age_younger[1]) @[lsu_bus_buffer.scala 146:122]
node _T_310 = orr(_T_309) @[lsu_bus_buffer.scala 146:144]
node _T_311 = eq(_T_310, UInt<1>("h00")) @[lsu_bus_buffer.scala 146:99]
node _T_312 = and(_T_308, _T_311) @[lsu_bus_buffer.scala 146:97]
node _T_313 = bits(ld_byte_ibuf_hit_lo, 2, 2) @[lsu_bus_buffer.scala 146:170]
node _T_314 = eq(_T_313, UInt<1>("h00")) @[lsu_bus_buffer.scala 146:150]
node _T_315 = and(_T_312, _T_314) @[lsu_bus_buffer.scala 146:148]
node _T_316 = bits(ld_byte_hitvec_lo_2, 2, 2) @[lsu_bus_buffer.scala 146:93]
node _T_317 = and(ld_byte_hitvec_lo_2, buf_age_younger[2]) @[lsu_bus_buffer.scala 146:122]
node _T_318 = orr(_T_317) @[lsu_bus_buffer.scala 146:144]
node _T_319 = eq(_T_318, UInt<1>("h00")) @[lsu_bus_buffer.scala 146:99]
node _T_320 = and(_T_316, _T_319) @[lsu_bus_buffer.scala 146:97]
node _T_321 = bits(ld_byte_ibuf_hit_lo, 2, 2) @[lsu_bus_buffer.scala 146:170]
node _T_322 = eq(_T_321, UInt<1>("h00")) @[lsu_bus_buffer.scala 146:150]
node _T_323 = and(_T_320, _T_322) @[lsu_bus_buffer.scala 146:148]
node _T_324 = bits(ld_byte_hitvec_lo_2, 3, 3) @[lsu_bus_buffer.scala 146:93]
node _T_325 = and(ld_byte_hitvec_lo_2, buf_age_younger[3]) @[lsu_bus_buffer.scala 146:122]
node _T_326 = orr(_T_325) @[lsu_bus_buffer.scala 146:144]
node _T_327 = eq(_T_326, UInt<1>("h00")) @[lsu_bus_buffer.scala 146:99]
node _T_328 = and(_T_324, _T_327) @[lsu_bus_buffer.scala 146:97]
node _T_329 = bits(ld_byte_ibuf_hit_lo, 2, 2) @[lsu_bus_buffer.scala 146:170]
node _T_330 = eq(_T_329, UInt<1>("h00")) @[lsu_bus_buffer.scala 146:150]
node _T_331 = and(_T_328, _T_330) @[lsu_bus_buffer.scala 146:148]
node _T_332 = cat(_T_331, _T_323) @[Cat.scala 29:58]
node _T_333 = cat(_T_332, _T_315) @[Cat.scala 29:58]
node _T_334 = cat(_T_333, _T_307) @[Cat.scala 29:58]
node _T_335 = bits(ld_byte_hitvec_lo_3, 0, 0) @[lsu_bus_buffer.scala 146:93]
node _T_336 = and(ld_byte_hitvec_lo_3, buf_age_younger[0]) @[lsu_bus_buffer.scala 146:122]
node _T_337 = orr(_T_336) @[lsu_bus_buffer.scala 146:144]
node _T_338 = eq(_T_337, UInt<1>("h00")) @[lsu_bus_buffer.scala 146:99]
node _T_339 = and(_T_335, _T_338) @[lsu_bus_buffer.scala 146:97]
node _T_340 = bits(ld_byte_ibuf_hit_lo, 3, 3) @[lsu_bus_buffer.scala 146:170]
node _T_341 = eq(_T_340, UInt<1>("h00")) @[lsu_bus_buffer.scala 146:150]
node _T_342 = and(_T_339, _T_341) @[lsu_bus_buffer.scala 146:148]
node _T_343 = bits(ld_byte_hitvec_lo_3, 1, 1) @[lsu_bus_buffer.scala 146:93]
node _T_344 = and(ld_byte_hitvec_lo_3, buf_age_younger[1]) @[lsu_bus_buffer.scala 146:122]
node _T_345 = orr(_T_344) @[lsu_bus_buffer.scala 146:144]
node _T_346 = eq(_T_345, UInt<1>("h00")) @[lsu_bus_buffer.scala 146:99]
node _T_347 = and(_T_343, _T_346) @[lsu_bus_buffer.scala 146:97]
node _T_348 = bits(ld_byte_ibuf_hit_lo, 3, 3) @[lsu_bus_buffer.scala 146:170]
node _T_349 = eq(_T_348, UInt<1>("h00")) @[lsu_bus_buffer.scala 146:150]
node _T_350 = and(_T_347, _T_349) @[lsu_bus_buffer.scala 146:148]
node _T_351 = bits(ld_byte_hitvec_lo_3, 2, 2) @[lsu_bus_buffer.scala 146:93]
node _T_352 = and(ld_byte_hitvec_lo_3, buf_age_younger[2]) @[lsu_bus_buffer.scala 146:122]
node _T_353 = orr(_T_352) @[lsu_bus_buffer.scala 146:144]
node _T_354 = eq(_T_353, UInt<1>("h00")) @[lsu_bus_buffer.scala 146:99]
node _T_355 = and(_T_351, _T_354) @[lsu_bus_buffer.scala 146:97]
node _T_356 = bits(ld_byte_ibuf_hit_lo, 3, 3) @[lsu_bus_buffer.scala 146:170]
node _T_357 = eq(_T_356, UInt<1>("h00")) @[lsu_bus_buffer.scala 146:150]
node _T_358 = and(_T_355, _T_357) @[lsu_bus_buffer.scala 146:148]
node _T_359 = bits(ld_byte_hitvec_lo_3, 3, 3) @[lsu_bus_buffer.scala 146:93]
node _T_360 = and(ld_byte_hitvec_lo_3, buf_age_younger[3]) @[lsu_bus_buffer.scala 146:122]
node _T_361 = orr(_T_360) @[lsu_bus_buffer.scala 146:144]
node _T_362 = eq(_T_361, UInt<1>("h00")) @[lsu_bus_buffer.scala 146:99]
node _T_363 = and(_T_359, _T_362) @[lsu_bus_buffer.scala 146:97]
node _T_364 = bits(ld_byte_ibuf_hit_lo, 3, 3) @[lsu_bus_buffer.scala 146:170]
node _T_365 = eq(_T_364, UInt<1>("h00")) @[lsu_bus_buffer.scala 146:150]
node _T_366 = and(_T_363, _T_365) @[lsu_bus_buffer.scala 146:148]
node _T_367 = cat(_T_366, _T_358) @[Cat.scala 29:58]
node _T_368 = cat(_T_367, _T_350) @[Cat.scala 29:58]
node _T_369 = cat(_T_368, _T_342) @[Cat.scala 29:58]
ld_byte_hitvecfn_lo[0] <= _T_264 @[lsu_bus_buffer.scala 146:23]
ld_byte_hitvecfn_lo[1] <= _T_299 @[lsu_bus_buffer.scala 146:23]
ld_byte_hitvecfn_lo[2] <= _T_334 @[lsu_bus_buffer.scala 146:23]
ld_byte_hitvecfn_lo[3] <= _T_369 @[lsu_bus_buffer.scala 146:23]
node _T_370 = bits(ld_byte_hitvec_hi_0, 0, 0) @[lsu_bus_buffer.scala 147:93]
node _T_371 = and(ld_byte_hitvec_hi_0, buf_age_younger[0]) @[lsu_bus_buffer.scala 147:122]
node _T_372 = orr(_T_371) @[lsu_bus_buffer.scala 147:144]
node _T_373 = eq(_T_372, UInt<1>("h00")) @[lsu_bus_buffer.scala 147:99]
node _T_374 = and(_T_370, _T_373) @[lsu_bus_buffer.scala 147:97]
node _T_375 = bits(ld_byte_ibuf_hit_hi, 0, 0) @[lsu_bus_buffer.scala 147:170]
node _T_376 = eq(_T_375, UInt<1>("h00")) @[lsu_bus_buffer.scala 147:150]
node _T_377 = and(_T_374, _T_376) @[lsu_bus_buffer.scala 147:148]
node _T_378 = bits(ld_byte_hitvec_hi_0, 1, 1) @[lsu_bus_buffer.scala 147:93]
node _T_379 = and(ld_byte_hitvec_hi_0, buf_age_younger[1]) @[lsu_bus_buffer.scala 147:122]
node _T_380 = orr(_T_379) @[lsu_bus_buffer.scala 147:144]
node _T_381 = eq(_T_380, UInt<1>("h00")) @[lsu_bus_buffer.scala 147:99]
node _T_382 = and(_T_378, _T_381) @[lsu_bus_buffer.scala 147:97]
node _T_383 = bits(ld_byte_ibuf_hit_hi, 0, 0) @[lsu_bus_buffer.scala 147:170]
node _T_384 = eq(_T_383, UInt<1>("h00")) @[lsu_bus_buffer.scala 147:150]
node _T_385 = and(_T_382, _T_384) @[lsu_bus_buffer.scala 147:148]
node _T_386 = bits(ld_byte_hitvec_hi_0, 2, 2) @[lsu_bus_buffer.scala 147:93]
node _T_387 = and(ld_byte_hitvec_hi_0, buf_age_younger[2]) @[lsu_bus_buffer.scala 147:122]
node _T_388 = orr(_T_387) @[lsu_bus_buffer.scala 147:144]
node _T_389 = eq(_T_388, UInt<1>("h00")) @[lsu_bus_buffer.scala 147:99]
node _T_390 = and(_T_386, _T_389) @[lsu_bus_buffer.scala 147:97]
node _T_391 = bits(ld_byte_ibuf_hit_hi, 0, 0) @[lsu_bus_buffer.scala 147:170]
node _T_392 = eq(_T_391, UInt<1>("h00")) @[lsu_bus_buffer.scala 147:150]
node _T_393 = and(_T_390, _T_392) @[lsu_bus_buffer.scala 147:148]
node _T_394 = bits(ld_byte_hitvec_hi_0, 3, 3) @[lsu_bus_buffer.scala 147:93]
node _T_395 = and(ld_byte_hitvec_hi_0, buf_age_younger[3]) @[lsu_bus_buffer.scala 147:122]
node _T_396 = orr(_T_395) @[lsu_bus_buffer.scala 147:144]
node _T_397 = eq(_T_396, UInt<1>("h00")) @[lsu_bus_buffer.scala 147:99]
node _T_398 = and(_T_394, _T_397) @[lsu_bus_buffer.scala 147:97]
node _T_399 = bits(ld_byte_ibuf_hit_hi, 0, 0) @[lsu_bus_buffer.scala 147:170]
node _T_400 = eq(_T_399, UInt<1>("h00")) @[lsu_bus_buffer.scala 147:150]
node _T_401 = and(_T_398, _T_400) @[lsu_bus_buffer.scala 147:148]
node _T_402 = cat(_T_401, _T_393) @[Cat.scala 29:58]
node _T_403 = cat(_T_402, _T_385) @[Cat.scala 29:58]
node _T_404 = cat(_T_403, _T_377) @[Cat.scala 29:58]
node _T_405 = bits(ld_byte_hitvec_hi_1, 0, 0) @[lsu_bus_buffer.scala 147:93]
node _T_406 = and(ld_byte_hitvec_hi_1, buf_age_younger[0]) @[lsu_bus_buffer.scala 147:122]
node _T_407 = orr(_T_406) @[lsu_bus_buffer.scala 147:144]
node _T_408 = eq(_T_407, UInt<1>("h00")) @[lsu_bus_buffer.scala 147:99]
node _T_409 = and(_T_405, _T_408) @[lsu_bus_buffer.scala 147:97]
node _T_410 = bits(ld_byte_ibuf_hit_hi, 1, 1) @[lsu_bus_buffer.scala 147:170]
node _T_411 = eq(_T_410, UInt<1>("h00")) @[lsu_bus_buffer.scala 147:150]
node _T_412 = and(_T_409, _T_411) @[lsu_bus_buffer.scala 147:148]
node _T_413 = bits(ld_byte_hitvec_hi_1, 1, 1) @[lsu_bus_buffer.scala 147:93]
node _T_414 = and(ld_byte_hitvec_hi_1, buf_age_younger[1]) @[lsu_bus_buffer.scala 147:122]
node _T_415 = orr(_T_414) @[lsu_bus_buffer.scala 147:144]
node _T_416 = eq(_T_415, UInt<1>("h00")) @[lsu_bus_buffer.scala 147:99]
node _T_417 = and(_T_413, _T_416) @[lsu_bus_buffer.scala 147:97]
node _T_418 = bits(ld_byte_ibuf_hit_hi, 1, 1) @[lsu_bus_buffer.scala 147:170]
node _T_419 = eq(_T_418, UInt<1>("h00")) @[lsu_bus_buffer.scala 147:150]
node _T_420 = and(_T_417, _T_419) @[lsu_bus_buffer.scala 147:148]
node _T_421 = bits(ld_byte_hitvec_hi_1, 2, 2) @[lsu_bus_buffer.scala 147:93]
node _T_422 = and(ld_byte_hitvec_hi_1, buf_age_younger[2]) @[lsu_bus_buffer.scala 147:122]
node _T_423 = orr(_T_422) @[lsu_bus_buffer.scala 147:144]
node _T_424 = eq(_T_423, UInt<1>("h00")) @[lsu_bus_buffer.scala 147:99]
node _T_425 = and(_T_421, _T_424) @[lsu_bus_buffer.scala 147:97]
node _T_426 = bits(ld_byte_ibuf_hit_hi, 1, 1) @[lsu_bus_buffer.scala 147:170]
node _T_427 = eq(_T_426, UInt<1>("h00")) @[lsu_bus_buffer.scala 147:150]
node _T_428 = and(_T_425, _T_427) @[lsu_bus_buffer.scala 147:148]
node _T_429 = bits(ld_byte_hitvec_hi_1, 3, 3) @[lsu_bus_buffer.scala 147:93]
node _T_430 = and(ld_byte_hitvec_hi_1, buf_age_younger[3]) @[lsu_bus_buffer.scala 147:122]
node _T_431 = orr(_T_430) @[lsu_bus_buffer.scala 147:144]
node _T_432 = eq(_T_431, UInt<1>("h00")) @[lsu_bus_buffer.scala 147:99]
node _T_433 = and(_T_429, _T_432) @[lsu_bus_buffer.scala 147:97]
node _T_434 = bits(ld_byte_ibuf_hit_hi, 1, 1) @[lsu_bus_buffer.scala 147:170]
node _T_435 = eq(_T_434, UInt<1>("h00")) @[lsu_bus_buffer.scala 147:150]
node _T_436 = and(_T_433, _T_435) @[lsu_bus_buffer.scala 147:148]
node _T_437 = cat(_T_436, _T_428) @[Cat.scala 29:58]
node _T_438 = cat(_T_437, _T_420) @[Cat.scala 29:58]
node _T_439 = cat(_T_438, _T_412) @[Cat.scala 29:58]
node _T_440 = bits(ld_byte_hitvec_hi_2, 0, 0) @[lsu_bus_buffer.scala 147:93]
node _T_441 = and(ld_byte_hitvec_hi_2, buf_age_younger[0]) @[lsu_bus_buffer.scala 147:122]
node _T_442 = orr(_T_441) @[lsu_bus_buffer.scala 147:144]
node _T_443 = eq(_T_442, UInt<1>("h00")) @[lsu_bus_buffer.scala 147:99]
node _T_444 = and(_T_440, _T_443) @[lsu_bus_buffer.scala 147:97]
node _T_445 = bits(ld_byte_ibuf_hit_hi, 2, 2) @[lsu_bus_buffer.scala 147:170]
node _T_446 = eq(_T_445, UInt<1>("h00")) @[lsu_bus_buffer.scala 147:150]
node _T_447 = and(_T_444, _T_446) @[lsu_bus_buffer.scala 147:148]
node _T_448 = bits(ld_byte_hitvec_hi_2, 1, 1) @[lsu_bus_buffer.scala 147:93]
node _T_449 = and(ld_byte_hitvec_hi_2, buf_age_younger[1]) @[lsu_bus_buffer.scala 147:122]
node _T_450 = orr(_T_449) @[lsu_bus_buffer.scala 147:144]
node _T_451 = eq(_T_450, UInt<1>("h00")) @[lsu_bus_buffer.scala 147:99]
node _T_452 = and(_T_448, _T_451) @[lsu_bus_buffer.scala 147:97]
node _T_453 = bits(ld_byte_ibuf_hit_hi, 2, 2) @[lsu_bus_buffer.scala 147:170]
node _T_454 = eq(_T_453, UInt<1>("h00")) @[lsu_bus_buffer.scala 147:150]
node _T_455 = and(_T_452, _T_454) @[lsu_bus_buffer.scala 147:148]
node _T_456 = bits(ld_byte_hitvec_hi_2, 2, 2) @[lsu_bus_buffer.scala 147:93]
node _T_457 = and(ld_byte_hitvec_hi_2, buf_age_younger[2]) @[lsu_bus_buffer.scala 147:122]
node _T_458 = orr(_T_457) @[lsu_bus_buffer.scala 147:144]
node _T_459 = eq(_T_458, UInt<1>("h00")) @[lsu_bus_buffer.scala 147:99]
node _T_460 = and(_T_456, _T_459) @[lsu_bus_buffer.scala 147:97]
node _T_461 = bits(ld_byte_ibuf_hit_hi, 2, 2) @[lsu_bus_buffer.scala 147:170]
node _T_462 = eq(_T_461, UInt<1>("h00")) @[lsu_bus_buffer.scala 147:150]
node _T_463 = and(_T_460, _T_462) @[lsu_bus_buffer.scala 147:148]
node _T_464 = bits(ld_byte_hitvec_hi_2, 3, 3) @[lsu_bus_buffer.scala 147:93]
node _T_465 = and(ld_byte_hitvec_hi_2, buf_age_younger[3]) @[lsu_bus_buffer.scala 147:122]
node _T_466 = orr(_T_465) @[lsu_bus_buffer.scala 147:144]
node _T_467 = eq(_T_466, UInt<1>("h00")) @[lsu_bus_buffer.scala 147:99]
node _T_468 = and(_T_464, _T_467) @[lsu_bus_buffer.scala 147:97]
node _T_469 = bits(ld_byte_ibuf_hit_hi, 2, 2) @[lsu_bus_buffer.scala 147:170]
node _T_470 = eq(_T_469, UInt<1>("h00")) @[lsu_bus_buffer.scala 147:150]
node _T_471 = and(_T_468, _T_470) @[lsu_bus_buffer.scala 147:148]
node _T_472 = cat(_T_471, _T_463) @[Cat.scala 29:58]
node _T_473 = cat(_T_472, _T_455) @[Cat.scala 29:58]
node _T_474 = cat(_T_473, _T_447) @[Cat.scala 29:58]
node _T_475 = bits(ld_byte_hitvec_hi_3, 0, 0) @[lsu_bus_buffer.scala 147:93]
node _T_476 = and(ld_byte_hitvec_hi_3, buf_age_younger[0]) @[lsu_bus_buffer.scala 147:122]
node _T_477 = orr(_T_476) @[lsu_bus_buffer.scala 147:144]
node _T_478 = eq(_T_477, UInt<1>("h00")) @[lsu_bus_buffer.scala 147:99]
node _T_479 = and(_T_475, _T_478) @[lsu_bus_buffer.scala 147:97]
node _T_480 = bits(ld_byte_ibuf_hit_hi, 3, 3) @[lsu_bus_buffer.scala 147:170]
node _T_481 = eq(_T_480, UInt<1>("h00")) @[lsu_bus_buffer.scala 147:150]
node _T_482 = and(_T_479, _T_481) @[lsu_bus_buffer.scala 147:148]
node _T_483 = bits(ld_byte_hitvec_hi_3, 1, 1) @[lsu_bus_buffer.scala 147:93]
node _T_484 = and(ld_byte_hitvec_hi_3, buf_age_younger[1]) @[lsu_bus_buffer.scala 147:122]
node _T_485 = orr(_T_484) @[lsu_bus_buffer.scala 147:144]
node _T_486 = eq(_T_485, UInt<1>("h00")) @[lsu_bus_buffer.scala 147:99]
node _T_487 = and(_T_483, _T_486) @[lsu_bus_buffer.scala 147:97]
node _T_488 = bits(ld_byte_ibuf_hit_hi, 3, 3) @[lsu_bus_buffer.scala 147:170]
node _T_489 = eq(_T_488, UInt<1>("h00")) @[lsu_bus_buffer.scala 147:150]
node _T_490 = and(_T_487, _T_489) @[lsu_bus_buffer.scala 147:148]
node _T_491 = bits(ld_byte_hitvec_hi_3, 2, 2) @[lsu_bus_buffer.scala 147:93]
node _T_492 = and(ld_byte_hitvec_hi_3, buf_age_younger[2]) @[lsu_bus_buffer.scala 147:122]
node _T_493 = orr(_T_492) @[lsu_bus_buffer.scala 147:144]
node _T_494 = eq(_T_493, UInt<1>("h00")) @[lsu_bus_buffer.scala 147:99]
node _T_495 = and(_T_491, _T_494) @[lsu_bus_buffer.scala 147:97]
node _T_496 = bits(ld_byte_ibuf_hit_hi, 3, 3) @[lsu_bus_buffer.scala 147:170]
node _T_497 = eq(_T_496, UInt<1>("h00")) @[lsu_bus_buffer.scala 147:150]
node _T_498 = and(_T_495, _T_497) @[lsu_bus_buffer.scala 147:148]
node _T_499 = bits(ld_byte_hitvec_hi_3, 3, 3) @[lsu_bus_buffer.scala 147:93]
node _T_500 = and(ld_byte_hitvec_hi_3, buf_age_younger[3]) @[lsu_bus_buffer.scala 147:122]
node _T_501 = orr(_T_500) @[lsu_bus_buffer.scala 147:144]
node _T_502 = eq(_T_501, UInt<1>("h00")) @[lsu_bus_buffer.scala 147:99]
node _T_503 = and(_T_499, _T_502) @[lsu_bus_buffer.scala 147:97]
node _T_504 = bits(ld_byte_ibuf_hit_hi, 3, 3) @[lsu_bus_buffer.scala 147:170]
node _T_505 = eq(_T_504, UInt<1>("h00")) @[lsu_bus_buffer.scala 147:150]
node _T_506 = and(_T_503, _T_505) @[lsu_bus_buffer.scala 147:148]
node _T_507 = cat(_T_506, _T_498) @[Cat.scala 29:58]
node _T_508 = cat(_T_507, _T_490) @[Cat.scala 29:58]
node _T_509 = cat(_T_508, _T_482) @[Cat.scala 29:58]
ld_byte_hitvecfn_hi[0] <= _T_404 @[lsu_bus_buffer.scala 147:23]
ld_byte_hitvecfn_hi[1] <= _T_439 @[lsu_bus_buffer.scala 147:23]
ld_byte_hitvecfn_hi[2] <= _T_474 @[lsu_bus_buffer.scala 147:23]
ld_byte_hitvecfn_hi[3] <= _T_509 @[lsu_bus_buffer.scala 147:23]
wire ibuf_addr : UInt<32>
ibuf_addr <= UInt<1>("h00")
wire ibuf_write : UInt<1>
ibuf_write <= UInt<1>("h00")
wire ibuf_valid : UInt<1>
ibuf_valid <= UInt<1>("h00")
node _T_510 = bits(io.lsu_addr_m, 31, 2) @[lsu_bus_buffer.scala 152:43]
node _T_511 = bits(ibuf_addr, 31, 2) @[lsu_bus_buffer.scala 152:64]
node _T_512 = eq(_T_510, _T_511) @[lsu_bus_buffer.scala 152:51]
node _T_513 = and(_T_512, ibuf_write) @[lsu_bus_buffer.scala 152:73]
node _T_514 = and(_T_513, ibuf_valid) @[lsu_bus_buffer.scala 152:86]
node ld_addr_ibuf_hit_lo = and(_T_514, io.lsu_busreq_m) @[lsu_bus_buffer.scala 152:99]
node _T_515 = bits(io.end_addr_m, 31, 2) @[lsu_bus_buffer.scala 153:43]
node _T_516 = bits(ibuf_addr, 31, 2) @[lsu_bus_buffer.scala 153:64]
node _T_517 = eq(_T_515, _T_516) @[lsu_bus_buffer.scala 153:51]
node _T_518 = and(_T_517, ibuf_write) @[lsu_bus_buffer.scala 153:73]
node _T_519 = and(_T_518, ibuf_valid) @[lsu_bus_buffer.scala 153:86]
node ld_addr_ibuf_hit_hi = and(_T_519, io.lsu_busreq_m) @[lsu_bus_buffer.scala 153:99]
wire ibuf_byteen : UInt<4>
ibuf_byteen <= UInt<1>("h00")
node _T_520 = bits(ld_addr_ibuf_hit_lo, 0, 0) @[Bitwise.scala 72:15]
node _T_521 = mux(_T_520, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12]
node _T_522 = and(_T_521, ibuf_byteen) @[lsu_bus_buffer.scala 157:55]
node _T_523 = and(_T_522, ldst_byteen_lo_m) @[lsu_bus_buffer.scala 157:69]
ld_byte_ibuf_hit_lo <= _T_523 @[lsu_bus_buffer.scala 157:23]
node _T_524 = bits(ld_addr_ibuf_hit_hi, 0, 0) @[Bitwise.scala 72:15]
node _T_525 = mux(_T_524, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12]
node _T_526 = and(_T_525, ibuf_byteen) @[lsu_bus_buffer.scala 158:55]
node _T_527 = and(_T_526, ldst_byteen_hi_m) @[lsu_bus_buffer.scala 158:69]
ld_byte_ibuf_hit_hi <= _T_527 @[lsu_bus_buffer.scala 158:23]
wire buf_data : UInt<32>[4] @[lsu_bus_buffer.scala 160:22]
buf_data[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 161:12]
buf_data[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 161:12]
buf_data[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 161:12]
buf_data[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 161:12]
wire fwd_data : UInt<32>
fwd_data <= UInt<1>("h00")
node _T_528 = bits(ld_byte_ibuf_hit_lo, 0, 0) @[lsu_bus_buffer.scala 163:81]
node _T_529 = bits(_T_528, 0, 0) @[Bitwise.scala 72:15]
node _T_530 = mux(_T_529, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_531 = bits(ld_byte_ibuf_hit_lo, 1, 1) @[lsu_bus_buffer.scala 163:81]
node _T_532 = bits(_T_531, 0, 0) @[Bitwise.scala 72:15]
node _T_533 = mux(_T_532, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_534 = bits(ld_byte_ibuf_hit_lo, 2, 2) @[lsu_bus_buffer.scala 163:81]
node _T_535 = bits(_T_534, 0, 0) @[Bitwise.scala 72:15]
node _T_536 = mux(_T_535, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_537 = bits(ld_byte_ibuf_hit_lo, 3, 3) @[lsu_bus_buffer.scala 163:81]
node _T_538 = bits(_T_537, 0, 0) @[Bitwise.scala 72:15]
node _T_539 = mux(_T_538, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_540 = cat(_T_539, _T_536) @[Cat.scala 29:58]
node _T_541 = cat(_T_540, _T_533) @[Cat.scala 29:58]
node ld_fwddata_buf_lo_initial = cat(_T_541, _T_530) @[Cat.scala 29:58]
node _T_542 = bits(ld_byte_ibuf_hit_hi, 0, 0) @[lsu_bus_buffer.scala 164:81]
node _T_543 = bits(_T_542, 0, 0) @[Bitwise.scala 72:15]
node _T_544 = mux(_T_543, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_545 = bits(ld_byte_ibuf_hit_hi, 1, 1) @[lsu_bus_buffer.scala 164:81]
node _T_546 = bits(_T_545, 0, 0) @[Bitwise.scala 72:15]
node _T_547 = mux(_T_546, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_548 = bits(ld_byte_ibuf_hit_hi, 2, 2) @[lsu_bus_buffer.scala 164:81]
node _T_549 = bits(_T_548, 0, 0) @[Bitwise.scala 72:15]
node _T_550 = mux(_T_549, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_551 = bits(ld_byte_ibuf_hit_hi, 3, 3) @[lsu_bus_buffer.scala 164:81]
node _T_552 = bits(_T_551, 0, 0) @[Bitwise.scala 72:15]
node _T_553 = mux(_T_552, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_554 = cat(_T_553, _T_550) @[Cat.scala 29:58]
node _T_555 = cat(_T_554, _T_547) @[Cat.scala 29:58]
node ld_fwddata_buf_hi_initial = cat(_T_555, _T_544) @[Cat.scala 29:58]
node _T_556 = bits(ld_byte_hitvecfn_lo[3], 0, 0) @[lsu_bus_buffer.scala 165:86]
node _T_557 = bits(_T_556, 0, 0) @[Bitwise.scala 72:15]
node _T_558 = mux(_T_557, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_559 = bits(buf_data[0], 31, 24) @[lsu_bus_buffer.scala 165:104]
node _T_560 = and(_T_558, _T_559) @[lsu_bus_buffer.scala 165:91]
node _T_561 = bits(ld_byte_hitvecfn_lo[3], 1, 1) @[lsu_bus_buffer.scala 165:86]
node _T_562 = bits(_T_561, 0, 0) @[Bitwise.scala 72:15]
node _T_563 = mux(_T_562, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_564 = bits(buf_data[1], 31, 24) @[lsu_bus_buffer.scala 165:104]
node _T_565 = and(_T_563, _T_564) @[lsu_bus_buffer.scala 165:91]
node _T_566 = bits(ld_byte_hitvecfn_lo[3], 2, 2) @[lsu_bus_buffer.scala 165:86]
node _T_567 = bits(_T_566, 0, 0) @[Bitwise.scala 72:15]
node _T_568 = mux(_T_567, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_569 = bits(buf_data[2], 31, 24) @[lsu_bus_buffer.scala 165:104]
node _T_570 = and(_T_568, _T_569) @[lsu_bus_buffer.scala 165:91]
node _T_571 = bits(ld_byte_hitvecfn_lo[3], 3, 3) @[lsu_bus_buffer.scala 165:86]
node _T_572 = bits(_T_571, 0, 0) @[Bitwise.scala 72:15]
node _T_573 = mux(_T_572, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_574 = bits(buf_data[3], 31, 24) @[lsu_bus_buffer.scala 165:104]
node _T_575 = and(_T_573, _T_574) @[lsu_bus_buffer.scala 165:91]
node _T_576 = or(_T_560, _T_565) @[lsu_bus_buffer.scala 165:123]
node _T_577 = or(_T_576, _T_570) @[lsu_bus_buffer.scala 165:123]
node _T_578 = or(_T_577, _T_575) @[lsu_bus_buffer.scala 165:123]
node _T_579 = bits(ld_byte_hitvecfn_lo[2], 0, 0) @[lsu_bus_buffer.scala 166:60]
node _T_580 = bits(_T_579, 0, 0) @[Bitwise.scala 72:15]
node _T_581 = mux(_T_580, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_582 = bits(buf_data[0], 23, 16) @[lsu_bus_buffer.scala 166:78]
node _T_583 = and(_T_581, _T_582) @[lsu_bus_buffer.scala 166:65]
node _T_584 = bits(ld_byte_hitvecfn_lo[2], 1, 1) @[lsu_bus_buffer.scala 166:60]
node _T_585 = bits(_T_584, 0, 0) @[Bitwise.scala 72:15]
node _T_586 = mux(_T_585, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_587 = bits(buf_data[1], 23, 16) @[lsu_bus_buffer.scala 166:78]
node _T_588 = and(_T_586, _T_587) @[lsu_bus_buffer.scala 166:65]
node _T_589 = bits(ld_byte_hitvecfn_lo[2], 2, 2) @[lsu_bus_buffer.scala 166:60]
node _T_590 = bits(_T_589, 0, 0) @[Bitwise.scala 72:15]
node _T_591 = mux(_T_590, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_592 = bits(buf_data[2], 23, 16) @[lsu_bus_buffer.scala 166:78]
node _T_593 = and(_T_591, _T_592) @[lsu_bus_buffer.scala 166:65]
node _T_594 = bits(ld_byte_hitvecfn_lo[2], 3, 3) @[lsu_bus_buffer.scala 166:60]
node _T_595 = bits(_T_594, 0, 0) @[Bitwise.scala 72:15]
node _T_596 = mux(_T_595, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_597 = bits(buf_data[3], 23, 16) @[lsu_bus_buffer.scala 166:78]
node _T_598 = and(_T_596, _T_597) @[lsu_bus_buffer.scala 166:65]
node _T_599 = or(_T_583, _T_588) @[lsu_bus_buffer.scala 166:97]
node _T_600 = or(_T_599, _T_593) @[lsu_bus_buffer.scala 166:97]
node _T_601 = or(_T_600, _T_598) @[lsu_bus_buffer.scala 166:97]
node _T_602 = bits(ld_byte_hitvecfn_lo[1], 0, 0) @[lsu_bus_buffer.scala 167:60]
node _T_603 = bits(_T_602, 0, 0) @[Bitwise.scala 72:15]
node _T_604 = mux(_T_603, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_605 = bits(buf_data[0], 15, 8) @[lsu_bus_buffer.scala 167:78]
node _T_606 = and(_T_604, _T_605) @[lsu_bus_buffer.scala 167:65]
node _T_607 = bits(ld_byte_hitvecfn_lo[1], 1, 1) @[lsu_bus_buffer.scala 167:60]
node _T_608 = bits(_T_607, 0, 0) @[Bitwise.scala 72:15]
node _T_609 = mux(_T_608, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_610 = bits(buf_data[1], 15, 8) @[lsu_bus_buffer.scala 167:78]
node _T_611 = and(_T_609, _T_610) @[lsu_bus_buffer.scala 167:65]
node _T_612 = bits(ld_byte_hitvecfn_lo[1], 2, 2) @[lsu_bus_buffer.scala 167:60]
node _T_613 = bits(_T_612, 0, 0) @[Bitwise.scala 72:15]
node _T_614 = mux(_T_613, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_615 = bits(buf_data[2], 15, 8) @[lsu_bus_buffer.scala 167:78]
node _T_616 = and(_T_614, _T_615) @[lsu_bus_buffer.scala 167:65]
node _T_617 = bits(ld_byte_hitvecfn_lo[1], 3, 3) @[lsu_bus_buffer.scala 167:60]
node _T_618 = bits(_T_617, 0, 0) @[Bitwise.scala 72:15]
node _T_619 = mux(_T_618, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_620 = bits(buf_data[3], 15, 8) @[lsu_bus_buffer.scala 167:78]
node _T_621 = and(_T_619, _T_620) @[lsu_bus_buffer.scala 167:65]
node _T_622 = or(_T_606, _T_611) @[lsu_bus_buffer.scala 167:97]
node _T_623 = or(_T_622, _T_616) @[lsu_bus_buffer.scala 167:97]
node _T_624 = or(_T_623, _T_621) @[lsu_bus_buffer.scala 167:97]
node _T_625 = bits(ld_byte_hitvecfn_lo[0], 0, 0) @[lsu_bus_buffer.scala 168:60]
node _T_626 = bits(_T_625, 0, 0) @[Bitwise.scala 72:15]
node _T_627 = mux(_T_626, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_628 = bits(buf_data[0], 7, 0) @[lsu_bus_buffer.scala 168:78]
node _T_629 = and(_T_627, _T_628) @[lsu_bus_buffer.scala 168:65]
node _T_630 = bits(ld_byte_hitvecfn_lo[0], 1, 1) @[lsu_bus_buffer.scala 168:60]
node _T_631 = bits(_T_630, 0, 0) @[Bitwise.scala 72:15]
node _T_632 = mux(_T_631, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_633 = bits(buf_data[1], 7, 0) @[lsu_bus_buffer.scala 168:78]
node _T_634 = and(_T_632, _T_633) @[lsu_bus_buffer.scala 168:65]
node _T_635 = bits(ld_byte_hitvecfn_lo[0], 2, 2) @[lsu_bus_buffer.scala 168:60]
node _T_636 = bits(_T_635, 0, 0) @[Bitwise.scala 72:15]
node _T_637 = mux(_T_636, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_638 = bits(buf_data[2], 7, 0) @[lsu_bus_buffer.scala 168:78]
node _T_639 = and(_T_637, _T_638) @[lsu_bus_buffer.scala 168:65]
node _T_640 = bits(ld_byte_hitvecfn_lo[0], 3, 3) @[lsu_bus_buffer.scala 168:60]
node _T_641 = bits(_T_640, 0, 0) @[Bitwise.scala 72:15]
node _T_642 = mux(_T_641, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_643 = bits(buf_data[3], 7, 0) @[lsu_bus_buffer.scala 168:78]
node _T_644 = and(_T_642, _T_643) @[lsu_bus_buffer.scala 168:65]
node _T_645 = or(_T_629, _T_634) @[lsu_bus_buffer.scala 168:97]
node _T_646 = or(_T_645, _T_639) @[lsu_bus_buffer.scala 168:97]
node _T_647 = or(_T_646, _T_644) @[lsu_bus_buffer.scala 168:97]
node _T_648 = cat(_T_624, _T_647) @[Cat.scala 29:58]
node _T_649 = cat(_T_578, _T_601) @[Cat.scala 29:58]
node _T_650 = cat(_T_649, _T_648) @[Cat.scala 29:58]
node _T_651 = and(ld_fwddata_buf_lo_initial, ibuf_data) @[lsu_bus_buffer.scala 169:32]
node _T_652 = or(_T_650, _T_651) @[lsu_bus_buffer.scala 168:103]
io.ld_fwddata_buf_lo <= _T_652 @[lsu_bus_buffer.scala 165:24]
node _T_653 = bits(ld_byte_hitvecfn_hi[3], 0, 0) @[lsu_bus_buffer.scala 171:86]
node _T_654 = bits(_T_653, 0, 0) @[Bitwise.scala 72:15]
node _T_655 = mux(_T_654, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_656 = bits(buf_data[0], 31, 24) @[lsu_bus_buffer.scala 171:104]
node _T_657 = and(_T_655, _T_656) @[lsu_bus_buffer.scala 171:91]
node _T_658 = bits(ld_byte_hitvecfn_hi[3], 1, 1) @[lsu_bus_buffer.scala 171:86]
node _T_659 = bits(_T_658, 0, 0) @[Bitwise.scala 72:15]
node _T_660 = mux(_T_659, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_661 = bits(buf_data[1], 31, 24) @[lsu_bus_buffer.scala 171:104]
node _T_662 = and(_T_660, _T_661) @[lsu_bus_buffer.scala 171:91]
node _T_663 = bits(ld_byte_hitvecfn_hi[3], 2, 2) @[lsu_bus_buffer.scala 171:86]
node _T_664 = bits(_T_663, 0, 0) @[Bitwise.scala 72:15]
node _T_665 = mux(_T_664, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_666 = bits(buf_data[2], 31, 24) @[lsu_bus_buffer.scala 171:104]
node _T_667 = and(_T_665, _T_666) @[lsu_bus_buffer.scala 171:91]
node _T_668 = bits(ld_byte_hitvecfn_hi[3], 3, 3) @[lsu_bus_buffer.scala 171:86]
node _T_669 = bits(_T_668, 0, 0) @[Bitwise.scala 72:15]
node _T_670 = mux(_T_669, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_671 = bits(buf_data[3], 31, 24) @[lsu_bus_buffer.scala 171:104]
node _T_672 = and(_T_670, _T_671) @[lsu_bus_buffer.scala 171:91]
node _T_673 = or(_T_657, _T_662) @[lsu_bus_buffer.scala 171:123]
node _T_674 = or(_T_673, _T_667) @[lsu_bus_buffer.scala 171:123]
node _T_675 = or(_T_674, _T_672) @[lsu_bus_buffer.scala 171:123]
node _T_676 = bits(ld_byte_hitvecfn_hi[2], 0, 0) @[lsu_bus_buffer.scala 172:60]
node _T_677 = bits(_T_676, 0, 0) @[Bitwise.scala 72:15]
node _T_678 = mux(_T_677, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_679 = bits(buf_data[0], 23, 16) @[lsu_bus_buffer.scala 172:78]
node _T_680 = and(_T_678, _T_679) @[lsu_bus_buffer.scala 172:65]
node _T_681 = bits(ld_byte_hitvecfn_hi[2], 1, 1) @[lsu_bus_buffer.scala 172:60]
node _T_682 = bits(_T_681, 0, 0) @[Bitwise.scala 72:15]
node _T_683 = mux(_T_682, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_684 = bits(buf_data[1], 23, 16) @[lsu_bus_buffer.scala 172:78]
node _T_685 = and(_T_683, _T_684) @[lsu_bus_buffer.scala 172:65]
node _T_686 = bits(ld_byte_hitvecfn_hi[2], 2, 2) @[lsu_bus_buffer.scala 172:60]
node _T_687 = bits(_T_686, 0, 0) @[Bitwise.scala 72:15]
node _T_688 = mux(_T_687, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_689 = bits(buf_data[2], 23, 16) @[lsu_bus_buffer.scala 172:78]
node _T_690 = and(_T_688, _T_689) @[lsu_bus_buffer.scala 172:65]
node _T_691 = bits(ld_byte_hitvecfn_hi[2], 3, 3) @[lsu_bus_buffer.scala 172:60]
node _T_692 = bits(_T_691, 0, 0) @[Bitwise.scala 72:15]
node _T_693 = mux(_T_692, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_694 = bits(buf_data[3], 23, 16) @[lsu_bus_buffer.scala 172:78]
node _T_695 = and(_T_693, _T_694) @[lsu_bus_buffer.scala 172:65]
node _T_696 = or(_T_680, _T_685) @[lsu_bus_buffer.scala 172:97]
node _T_697 = or(_T_696, _T_690) @[lsu_bus_buffer.scala 172:97]
node _T_698 = or(_T_697, _T_695) @[lsu_bus_buffer.scala 172:97]
node _T_699 = bits(ld_byte_hitvecfn_hi[1], 0, 0) @[lsu_bus_buffer.scala 173:60]
node _T_700 = bits(_T_699, 0, 0) @[Bitwise.scala 72:15]
node _T_701 = mux(_T_700, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_702 = bits(buf_data[0], 15, 8) @[lsu_bus_buffer.scala 173:78]
node _T_703 = and(_T_701, _T_702) @[lsu_bus_buffer.scala 173:65]
node _T_704 = bits(ld_byte_hitvecfn_hi[1], 1, 1) @[lsu_bus_buffer.scala 173:60]
node _T_705 = bits(_T_704, 0, 0) @[Bitwise.scala 72:15]
node _T_706 = mux(_T_705, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_707 = bits(buf_data[1], 15, 8) @[lsu_bus_buffer.scala 173:78]
node _T_708 = and(_T_706, _T_707) @[lsu_bus_buffer.scala 173:65]
node _T_709 = bits(ld_byte_hitvecfn_hi[1], 2, 2) @[lsu_bus_buffer.scala 173:60]
node _T_710 = bits(_T_709, 0, 0) @[Bitwise.scala 72:15]
node _T_711 = mux(_T_710, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_712 = bits(buf_data[2], 15, 8) @[lsu_bus_buffer.scala 173:78]
node _T_713 = and(_T_711, _T_712) @[lsu_bus_buffer.scala 173:65]
node _T_714 = bits(ld_byte_hitvecfn_hi[1], 3, 3) @[lsu_bus_buffer.scala 173:60]
node _T_715 = bits(_T_714, 0, 0) @[Bitwise.scala 72:15]
node _T_716 = mux(_T_715, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_717 = bits(buf_data[3], 15, 8) @[lsu_bus_buffer.scala 173:78]
node _T_718 = and(_T_716, _T_717) @[lsu_bus_buffer.scala 173:65]
node _T_719 = or(_T_703, _T_708) @[lsu_bus_buffer.scala 173:97]
node _T_720 = or(_T_719, _T_713) @[lsu_bus_buffer.scala 173:97]
node _T_721 = or(_T_720, _T_718) @[lsu_bus_buffer.scala 173:97]
node _T_722 = bits(ld_byte_hitvecfn_hi[0], 0, 0) @[lsu_bus_buffer.scala 174:60]
node _T_723 = bits(_T_722, 0, 0) @[Bitwise.scala 72:15]
node _T_724 = mux(_T_723, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_725 = bits(buf_data[0], 7, 0) @[lsu_bus_buffer.scala 174:78]
node _T_726 = and(_T_724, _T_725) @[lsu_bus_buffer.scala 174:65]
node _T_727 = bits(ld_byte_hitvecfn_hi[0], 1, 1) @[lsu_bus_buffer.scala 174:60]
node _T_728 = bits(_T_727, 0, 0) @[Bitwise.scala 72:15]
node _T_729 = mux(_T_728, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_730 = bits(buf_data[1], 7, 0) @[lsu_bus_buffer.scala 174:78]
node _T_731 = and(_T_729, _T_730) @[lsu_bus_buffer.scala 174:65]
node _T_732 = bits(ld_byte_hitvecfn_hi[0], 2, 2) @[lsu_bus_buffer.scala 174:60]
node _T_733 = bits(_T_732, 0, 0) @[Bitwise.scala 72:15]
node _T_734 = mux(_T_733, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_735 = bits(buf_data[2], 7, 0) @[lsu_bus_buffer.scala 174:78]
node _T_736 = and(_T_734, _T_735) @[lsu_bus_buffer.scala 174:65]
node _T_737 = bits(ld_byte_hitvecfn_hi[0], 3, 3) @[lsu_bus_buffer.scala 174:60]
node _T_738 = bits(_T_737, 0, 0) @[Bitwise.scala 72:15]
node _T_739 = mux(_T_738, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_740 = bits(buf_data[3], 7, 0) @[lsu_bus_buffer.scala 174:78]
node _T_741 = and(_T_739, _T_740) @[lsu_bus_buffer.scala 174:65]
node _T_742 = or(_T_726, _T_731) @[lsu_bus_buffer.scala 174:97]
node _T_743 = or(_T_742, _T_736) @[lsu_bus_buffer.scala 174:97]
node _T_744 = or(_T_743, _T_741) @[lsu_bus_buffer.scala 174:97]
node _T_745 = cat(_T_721, _T_744) @[Cat.scala 29:58]
node _T_746 = cat(_T_675, _T_698) @[Cat.scala 29:58]
node _T_747 = cat(_T_746, _T_745) @[Cat.scala 29:58]
node _T_748 = and(ld_fwddata_buf_hi_initial, ibuf_data) @[lsu_bus_buffer.scala 175:32]
node _T_749 = or(_T_747, _T_748) @[lsu_bus_buffer.scala 174:103]
io.ld_fwddata_buf_hi <= _T_749 @[lsu_bus_buffer.scala 171:24]
node bus_coalescing_disable = or(io.tlu_busbuff.dec_tlu_wb_coalescing_disable, UInt<1>("h00")) @[lsu_bus_buffer.scala 177:77]
node _T_750 = mux(io.lsu_pkt_r.bits.by, UInt<4>("h01"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_751 = mux(io.lsu_pkt_r.bits.half, UInt<4>("h03"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_752 = mux(io.lsu_pkt_r.bits.word, UInt<4>("h0f"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_753 = or(_T_750, _T_751) @[Mux.scala 27:72]
node _T_754 = or(_T_753, _T_752) @[Mux.scala 27:72]
wire ldst_byteen_r : UInt<4> @[Mux.scala 27:72]
ldst_byteen_r <= _T_754 @[Mux.scala 27:72]
node _T_755 = bits(io.lsu_addr_r, 1, 0) @[lsu_bus_buffer.scala 182:50]
node _T_756 = eq(_T_755, UInt<1>("h00")) @[lsu_bus_buffer.scala 182:55]
node _T_757 = bits(io.lsu_addr_r, 1, 0) @[lsu_bus_buffer.scala 183:19]
node _T_758 = eq(_T_757, UInt<1>("h01")) @[lsu_bus_buffer.scala 183:24]
node _T_759 = bits(ldst_byteen_r, 3, 3) @[lsu_bus_buffer.scala 183:60]
node _T_760 = cat(UInt<3>("h00"), _T_759) @[Cat.scala 29:58]
node _T_761 = bits(io.lsu_addr_r, 1, 0) @[lsu_bus_buffer.scala 184:19]
node _T_762 = eq(_T_761, UInt<2>("h02")) @[lsu_bus_buffer.scala 184:24]
node _T_763 = bits(ldst_byteen_r, 3, 2) @[lsu_bus_buffer.scala 184:60]
node _T_764 = cat(UInt<2>("h00"), _T_763) @[Cat.scala 29:58]
node _T_765 = bits(io.lsu_addr_r, 1, 0) @[lsu_bus_buffer.scala 185:19]
node _T_766 = eq(_T_765, UInt<2>("h03")) @[lsu_bus_buffer.scala 185:24]
node _T_767 = bits(ldst_byteen_r, 3, 1) @[lsu_bus_buffer.scala 185:60]
node _T_768 = cat(UInt<1>("h00"), _T_767) @[Cat.scala 29:58]
node _T_769 = mux(_T_756, UInt<4>("h00"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_770 = mux(_T_758, _T_760, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_771 = mux(_T_762, _T_764, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_772 = mux(_T_766, _T_768, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_773 = or(_T_769, _T_770) @[Mux.scala 27:72]
node _T_774 = or(_T_773, _T_771) @[Mux.scala 27:72]
node _T_775 = or(_T_774, _T_772) @[Mux.scala 27:72]
wire ldst_byteen_hi_r : UInt<4> @[Mux.scala 27:72]
ldst_byteen_hi_r <= _T_775 @[Mux.scala 27:72]
node _T_776 = bits(io.lsu_addr_r, 1, 0) @[lsu_bus_buffer.scala 186:50]
node _T_777 = eq(_T_776, UInt<1>("h00")) @[lsu_bus_buffer.scala 186:55]
node _T_778 = bits(io.lsu_addr_r, 1, 0) @[lsu_bus_buffer.scala 187:19]
node _T_779 = eq(_T_778, UInt<1>("h01")) @[lsu_bus_buffer.scala 187:24]
node _T_780 = bits(ldst_byteen_r, 2, 0) @[lsu_bus_buffer.scala 187:50]
node _T_781 = cat(_T_780, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_782 = bits(io.lsu_addr_r, 1, 0) @[lsu_bus_buffer.scala 188:19]
node _T_783 = eq(_T_782, UInt<2>("h02")) @[lsu_bus_buffer.scala 188:24]
node _T_784 = bits(ldst_byteen_r, 1, 0) @[lsu_bus_buffer.scala 188:50]
node _T_785 = cat(_T_784, UInt<2>("h00")) @[Cat.scala 29:58]
node _T_786 = bits(io.lsu_addr_r, 1, 0) @[lsu_bus_buffer.scala 189:19]
node _T_787 = eq(_T_786, UInt<2>("h03")) @[lsu_bus_buffer.scala 189:24]
node _T_788 = bits(ldst_byteen_r, 0, 0) @[lsu_bus_buffer.scala 189:50]
node _T_789 = cat(_T_788, UInt<3>("h00")) @[Cat.scala 29:58]
node _T_790 = mux(_T_777, ldst_byteen_r, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_791 = mux(_T_779, _T_781, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_792 = mux(_T_783, _T_785, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_793 = mux(_T_787, _T_789, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_794 = or(_T_790, _T_791) @[Mux.scala 27:72]
node _T_795 = or(_T_794, _T_792) @[Mux.scala 27:72]
node _T_796 = or(_T_795, _T_793) @[Mux.scala 27:72]
wire ldst_byteen_lo_r : UInt<4> @[Mux.scala 27:72]
ldst_byteen_lo_r <= _T_796 @[Mux.scala 27:72]
node _T_797 = bits(io.lsu_addr_r, 1, 0) @[lsu_bus_buffer.scala 191:49]
node _T_798 = eq(_T_797, UInt<1>("h00")) @[lsu_bus_buffer.scala 191:54]
node _T_799 = bits(io.lsu_addr_r, 1, 0) @[lsu_bus_buffer.scala 192:19]
node _T_800 = eq(_T_799, UInt<1>("h01")) @[lsu_bus_buffer.scala 192:24]
node _T_801 = bits(io.store_data_r, 31, 24) @[lsu_bus_buffer.scala 192:64]
node _T_802 = cat(UInt<24>("h00"), _T_801) @[Cat.scala 29:58]
node _T_803 = bits(io.lsu_addr_r, 1, 0) @[lsu_bus_buffer.scala 193:19]
node _T_804 = eq(_T_803, UInt<2>("h02")) @[lsu_bus_buffer.scala 193:24]
node _T_805 = bits(io.store_data_r, 31, 16) @[lsu_bus_buffer.scala 193:63]
node _T_806 = cat(UInt<16>("h00"), _T_805) @[Cat.scala 29:58]
node _T_807 = bits(io.lsu_addr_r, 1, 0) @[lsu_bus_buffer.scala 194:19]
node _T_808 = eq(_T_807, UInt<2>("h03")) @[lsu_bus_buffer.scala 194:24]
node _T_809 = bits(io.store_data_r, 31, 8) @[lsu_bus_buffer.scala 194:62]
node _T_810 = cat(UInt<8>("h00"), _T_809) @[Cat.scala 29:58]
node _T_811 = mux(_T_798, UInt<32>("h00"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_812 = mux(_T_800, _T_802, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_813 = mux(_T_804, _T_806, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_814 = mux(_T_808, _T_810, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_815 = or(_T_811, _T_812) @[Mux.scala 27:72]
node _T_816 = or(_T_815, _T_813) @[Mux.scala 27:72]
node _T_817 = or(_T_816, _T_814) @[Mux.scala 27:72]
wire store_data_hi_r : UInt<32> @[Mux.scala 27:72]
store_data_hi_r <= _T_817 @[Mux.scala 27:72]
node _T_818 = bits(io.lsu_addr_r, 1, 0) @[lsu_bus_buffer.scala 196:49]
node _T_819 = eq(_T_818, UInt<1>("h00")) @[lsu_bus_buffer.scala 196:54]
node _T_820 = bits(io.lsu_addr_r, 1, 0) @[lsu_bus_buffer.scala 197:19]
node _T_821 = eq(_T_820, UInt<1>("h01")) @[lsu_bus_buffer.scala 197:24]
node _T_822 = bits(io.store_data_r, 23, 0) @[lsu_bus_buffer.scala 197:52]
node _T_823 = cat(_T_822, UInt<8>("h00")) @[Cat.scala 29:58]
node _T_824 = bits(io.lsu_addr_r, 1, 0) @[lsu_bus_buffer.scala 198:19]
node _T_825 = eq(_T_824, UInt<2>("h02")) @[lsu_bus_buffer.scala 198:24]
node _T_826 = bits(io.store_data_r, 15, 0) @[lsu_bus_buffer.scala 198:52]
node _T_827 = cat(_T_826, UInt<16>("h00")) @[Cat.scala 29:58]
node _T_828 = bits(io.lsu_addr_r, 1, 0) @[lsu_bus_buffer.scala 199:19]
node _T_829 = eq(_T_828, UInt<2>("h03")) @[lsu_bus_buffer.scala 199:24]
node _T_830 = bits(io.store_data_r, 7, 0) @[lsu_bus_buffer.scala 199:52]
node _T_831 = cat(_T_830, UInt<24>("h00")) @[Cat.scala 29:58]
node _T_832 = mux(_T_819, io.store_data_r, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_833 = mux(_T_821, _T_823, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_834 = mux(_T_825, _T_827, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_835 = mux(_T_829, _T_831, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_836 = or(_T_832, _T_833) @[Mux.scala 27:72]
node _T_837 = or(_T_836, _T_834) @[Mux.scala 27:72]
node _T_838 = or(_T_837, _T_835) @[Mux.scala 27:72]
wire store_data_lo_r : UInt<32> @[Mux.scala 27:72]
store_data_lo_r <= _T_838 @[Mux.scala 27:72]
node _T_839 = bits(io.lsu_addr_r, 3, 3) @[lsu_bus_buffer.scala 202:36]
node _T_840 = bits(io.end_addr_r, 3, 3) @[lsu_bus_buffer.scala 202:57]
node ldst_samedw_r = eq(_T_839, _T_840) @[lsu_bus_buffer.scala 202:40]
node _T_841 = bits(io.lsu_addr_r, 1, 0) @[lsu_bus_buffer.scala 203:72]
node _T_842 = eq(_T_841, UInt<1>("h00")) @[lsu_bus_buffer.scala 203:79]
node _T_843 = bits(io.lsu_addr_r, 0, 0) @[lsu_bus_buffer.scala 204:45]
node _T_844 = eq(_T_843, UInt<1>("h00")) @[lsu_bus_buffer.scala 204:31]
node _T_845 = mux(io.lsu_pkt_r.bits.word, _T_842, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_846 = mux(io.lsu_pkt_r.bits.half, _T_844, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_847 = mux(io.lsu_pkt_r.bits.by, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_848 = or(_T_845, _T_846) @[Mux.scala 27:72]
node _T_849 = or(_T_848, _T_847) @[Mux.scala 27:72]
wire is_aligned_r : UInt<1> @[Mux.scala 27:72]
is_aligned_r <= _T_849 @[Mux.scala 27:72]
node _T_850 = or(io.lsu_pkt_r.bits.load, io.no_word_merge_r) @[lsu_bus_buffer.scala 206:60]
node _T_851 = and(io.lsu_busreq_r, _T_850) @[lsu_bus_buffer.scala 206:34]
node _T_852 = eq(ibuf_valid, UInt<1>("h00")) @[lsu_bus_buffer.scala 206:84]
node ibuf_byp = and(_T_851, _T_852) @[lsu_bus_buffer.scala 206:82]
node _T_853 = and(io.lsu_busreq_r, io.lsu_commit_r) @[lsu_bus_buffer.scala 207:36]
node _T_854 = eq(ibuf_byp, UInt<1>("h00")) @[lsu_bus_buffer.scala 207:56]
node ibuf_wr_en = and(_T_853, _T_854) @[lsu_bus_buffer.scala 207:54]
wire ibuf_drain_vld : UInt<1>
ibuf_drain_vld <= UInt<1>("h00")
node _T_855 = eq(ibuf_wr_en, UInt<1>("h00")) @[lsu_bus_buffer.scala 209:36]
node _T_856 = and(ibuf_drain_vld, _T_855) @[lsu_bus_buffer.scala 209:34]
node ibuf_rst = or(_T_856, io.dec_tlu_force_halt) @[lsu_bus_buffer.scala 209:49]
node _T_857 = eq(io.lsu_busreq_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 210:44]
node _T_858 = and(io.lsu_busreq_m, _T_857) @[lsu_bus_buffer.scala 210:42]
node _T_859 = and(_T_858, ibuf_valid) @[lsu_bus_buffer.scala 210:61]
node _T_860 = bits(ibuf_addr, 31, 2) @[lsu_bus_buffer.scala 210:112]
node _T_861 = bits(io.lsu_addr_m, 31, 2) @[lsu_bus_buffer.scala 210:137]
node _T_862 = neq(_T_860, _T_861) @[lsu_bus_buffer.scala 210:120]
node _T_863 = or(io.lsu_pkt_m.bits.load, _T_862) @[lsu_bus_buffer.scala 210:100]
node ibuf_force_drain = and(_T_859, _T_863) @[lsu_bus_buffer.scala 210:74]
wire ibuf_sideeffect : UInt<1>
ibuf_sideeffect <= UInt<1>("h00")
wire ibuf_timer : UInt<3>
ibuf_timer <= UInt<1>("h00")
wire ibuf_merge_en : UInt<1>
ibuf_merge_en <= UInt<1>("h00")
wire ibuf_merge_in : UInt<1>
ibuf_merge_in <= UInt<1>("h00")
node _T_864 = eq(ibuf_timer, UInt<3>("h07")) @[lsu_bus_buffer.scala 215:62]
node _T_865 = or(ibuf_wr_en, _T_864) @[lsu_bus_buffer.scala 215:48]
node _T_866 = and(ibuf_merge_en, ibuf_merge_in) @[lsu_bus_buffer.scala 215:98]
node _T_867 = eq(_T_866, UInt<1>("h00")) @[lsu_bus_buffer.scala 215:82]
node _T_868 = and(_T_865, _T_867) @[lsu_bus_buffer.scala 215:80]
node _T_869 = or(_T_868, ibuf_byp) @[lsu_bus_buffer.scala 216:5]
node _T_870 = or(_T_869, ibuf_force_drain) @[lsu_bus_buffer.scala 216:16]
node _T_871 = or(_T_870, ibuf_sideeffect) @[lsu_bus_buffer.scala 216:35]
node _T_872 = eq(ibuf_write, UInt<1>("h00")) @[lsu_bus_buffer.scala 216:55]
node _T_873 = or(_T_871, _T_872) @[lsu_bus_buffer.scala 216:53]
node _T_874 = or(_T_873, bus_coalescing_disable) @[lsu_bus_buffer.scala 216:67]
node _T_875 = and(ibuf_valid, _T_874) @[lsu_bus_buffer.scala 215:32]
ibuf_drain_vld <= _T_875 @[lsu_bus_buffer.scala 215:18]
wire ibuf_tag : UInt<2>
ibuf_tag <= UInt<1>("h00")
wire WrPtr1_r : UInt<2>
WrPtr1_r <= UInt<1>("h00")
wire WrPtr0_r : UInt<2>
WrPtr0_r <= UInt<1>("h00")
node _T_876 = and(ibuf_merge_en, ibuf_merge_in) @[lsu_bus_buffer.scala 221:39]
node _T_877 = mux(io.ldst_dual_r, WrPtr1_r, WrPtr0_r) @[lsu_bus_buffer.scala 221:69]
node ibuf_tag_in = mux(_T_876, ibuf_tag, _T_877) @[lsu_bus_buffer.scala 221:24]
node ibuf_sz_in = cat(io.lsu_pkt_r.bits.word, io.lsu_pkt_r.bits.half) @[Cat.scala 29:58]
node ibuf_addr_in = mux(io.ldst_dual_r, io.end_addr_r, io.lsu_addr_r) @[lsu_bus_buffer.scala 224:25]
node _T_878 = and(ibuf_merge_en, ibuf_merge_in) @[lsu_bus_buffer.scala 225:42]
node _T_879 = bits(ibuf_byteen, 3, 0) @[lsu_bus_buffer.scala 225:70]
node _T_880 = bits(ldst_byteen_lo_r, 3, 0) @[lsu_bus_buffer.scala 225:95]
node _T_881 = or(_T_879, _T_880) @[lsu_bus_buffer.scala 225:77]
node _T_882 = bits(ldst_byteen_hi_r, 3, 0) @[lsu_bus_buffer.scala 226:41]
node _T_883 = bits(ldst_byteen_lo_r, 3, 0) @[lsu_bus_buffer.scala 226:65]
node _T_884 = mux(io.ldst_dual_r, _T_882, _T_883) @[lsu_bus_buffer.scala 226:8]
node ibuf_byteen_in = mux(_T_878, _T_881, _T_884) @[lsu_bus_buffer.scala 225:27]
node _T_885 = and(ibuf_merge_en, ibuf_merge_in) @[lsu_bus_buffer.scala 229:61]
node _T_886 = bits(ldst_byteen_lo_r, 0, 0) @[lsu_bus_buffer.scala 230:25]
node _T_887 = bits(store_data_lo_r, 7, 0) @[lsu_bus_buffer.scala 230:45]
node _T_888 = bits(ibuf_data, 7, 0) @[lsu_bus_buffer.scala 230:76]
node _T_889 = mux(_T_886, _T_887, _T_888) @[lsu_bus_buffer.scala 230:8]
node _T_890 = bits(store_data_hi_r, 7, 0) @[lsu_bus_buffer.scala 231:40]
node _T_891 = bits(store_data_lo_r, 7, 0) @[lsu_bus_buffer.scala 231:77]
node _T_892 = mux(io.ldst_dual_r, _T_890, _T_891) @[lsu_bus_buffer.scala 231:8]
node _T_893 = mux(_T_885, _T_889, _T_892) @[lsu_bus_buffer.scala 229:46]
node _T_894 = and(ibuf_merge_en, ibuf_merge_in) @[lsu_bus_buffer.scala 229:61]
node _T_895 = bits(ldst_byteen_lo_r, 1, 1) @[lsu_bus_buffer.scala 230:25]
node _T_896 = bits(store_data_lo_r, 15, 8) @[lsu_bus_buffer.scala 230:45]
node _T_897 = bits(ibuf_data, 15, 8) @[lsu_bus_buffer.scala 230:76]
node _T_898 = mux(_T_895, _T_896, _T_897) @[lsu_bus_buffer.scala 230:8]
node _T_899 = bits(store_data_hi_r, 15, 8) @[lsu_bus_buffer.scala 231:40]
node _T_900 = bits(store_data_lo_r, 15, 8) @[lsu_bus_buffer.scala 231:77]
node _T_901 = mux(io.ldst_dual_r, _T_899, _T_900) @[lsu_bus_buffer.scala 231:8]
node _T_902 = mux(_T_894, _T_898, _T_901) @[lsu_bus_buffer.scala 229:46]
node _T_903 = and(ibuf_merge_en, ibuf_merge_in) @[lsu_bus_buffer.scala 229:61]
node _T_904 = bits(ldst_byteen_lo_r, 2, 2) @[lsu_bus_buffer.scala 230:25]
node _T_905 = bits(store_data_lo_r, 23, 16) @[lsu_bus_buffer.scala 230:45]
node _T_906 = bits(ibuf_data, 23, 16) @[lsu_bus_buffer.scala 230:76]
node _T_907 = mux(_T_904, _T_905, _T_906) @[lsu_bus_buffer.scala 230:8]
node _T_908 = bits(store_data_hi_r, 23, 16) @[lsu_bus_buffer.scala 231:40]
node _T_909 = bits(store_data_lo_r, 23, 16) @[lsu_bus_buffer.scala 231:77]
node _T_910 = mux(io.ldst_dual_r, _T_908, _T_909) @[lsu_bus_buffer.scala 231:8]
node _T_911 = mux(_T_903, _T_907, _T_910) @[lsu_bus_buffer.scala 229:46]
node _T_912 = and(ibuf_merge_en, ibuf_merge_in) @[lsu_bus_buffer.scala 229:61]
node _T_913 = bits(ldst_byteen_lo_r, 3, 3) @[lsu_bus_buffer.scala 230:25]
node _T_914 = bits(store_data_lo_r, 31, 24) @[lsu_bus_buffer.scala 230:45]
node _T_915 = bits(ibuf_data, 31, 24) @[lsu_bus_buffer.scala 230:76]
node _T_916 = mux(_T_913, _T_914, _T_915) @[lsu_bus_buffer.scala 230:8]
node _T_917 = bits(store_data_hi_r, 31, 24) @[lsu_bus_buffer.scala 231:40]
node _T_918 = bits(store_data_lo_r, 31, 24) @[lsu_bus_buffer.scala 231:77]
node _T_919 = mux(io.ldst_dual_r, _T_917, _T_918) @[lsu_bus_buffer.scala 231:8]
node _T_920 = mux(_T_912, _T_916, _T_919) @[lsu_bus_buffer.scala 229:46]
node _T_921 = cat(_T_920, _T_911) @[Cat.scala 29:58]
node _T_922 = cat(_T_921, _T_902) @[Cat.scala 29:58]
node ibuf_data_in = cat(_T_922, _T_893) @[Cat.scala 29:58]
node _T_923 = lt(ibuf_timer, UInt<3>("h07")) @[lsu_bus_buffer.scala 232:59]
node _T_924 = bits(_T_923, 0, 0) @[lsu_bus_buffer.scala 232:79]
node _T_925 = add(ibuf_timer, UInt<1>("h01")) @[lsu_bus_buffer.scala 232:93]
node _T_926 = tail(_T_925, 1) @[lsu_bus_buffer.scala 232:93]
node _T_927 = mux(_T_924, _T_926, ibuf_timer) @[lsu_bus_buffer.scala 232:47]
node ibuf_timer_in = mux(ibuf_wr_en, UInt<1>("h00"), _T_927) @[lsu_bus_buffer.scala 232:26]
node _T_928 = and(io.lsu_busreq_r, io.lsu_commit_r) @[lsu_bus_buffer.scala 234:36]
node _T_929 = and(_T_928, io.lsu_pkt_r.bits.store) @[lsu_bus_buffer.scala 234:54]
node _T_930 = and(_T_929, ibuf_valid) @[lsu_bus_buffer.scala 234:80]
node _T_931 = and(_T_930, ibuf_write) @[lsu_bus_buffer.scala 234:93]
node _T_932 = bits(io.lsu_addr_r, 31, 2) @[lsu_bus_buffer.scala 234:122]
node _T_933 = bits(ibuf_addr, 31, 2) @[lsu_bus_buffer.scala 234:142]
node _T_934 = eq(_T_932, _T_933) @[lsu_bus_buffer.scala 234:129]
node _T_935 = and(_T_931, _T_934) @[lsu_bus_buffer.scala 234:106]
node _T_936 = eq(io.is_sideeffects_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 234:152]
node _T_937 = and(_T_935, _T_936) @[lsu_bus_buffer.scala 234:150]
node _T_938 = eq(bus_coalescing_disable, UInt<1>("h00")) @[lsu_bus_buffer.scala 234:175]
node _T_939 = and(_T_937, _T_938) @[lsu_bus_buffer.scala 234:173]
ibuf_merge_en <= _T_939 @[lsu_bus_buffer.scala 234:17]
node _T_940 = eq(io.ldst_dual_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 235:20]
ibuf_merge_in <= _T_940 @[lsu_bus_buffer.scala 235:17]
node _T_941 = eq(ibuf_merge_in, UInt<1>("h00")) @[lsu_bus_buffer.scala 236:65]
node _T_942 = and(ibuf_merge_en, _T_941) @[lsu_bus_buffer.scala 236:63]
node _T_943 = bits(ibuf_byteen, 0, 0) @[lsu_bus_buffer.scala 236:92]
node _T_944 = bits(ldst_byteen_lo_r, 0, 0) @[lsu_bus_buffer.scala 236:114]
node _T_945 = or(_T_943, _T_944) @[lsu_bus_buffer.scala 236:96]
node _T_946 = bits(ibuf_byteen, 0, 0) @[lsu_bus_buffer.scala 236:130]
node _T_947 = mux(_T_942, _T_945, _T_946) @[lsu_bus_buffer.scala 236:48]
node _T_948 = eq(ibuf_merge_in, UInt<1>("h00")) @[lsu_bus_buffer.scala 236:65]
node _T_949 = and(ibuf_merge_en, _T_948) @[lsu_bus_buffer.scala 236:63]
node _T_950 = bits(ibuf_byteen, 1, 1) @[lsu_bus_buffer.scala 236:92]
node _T_951 = bits(ldst_byteen_lo_r, 1, 1) @[lsu_bus_buffer.scala 236:114]
node _T_952 = or(_T_950, _T_951) @[lsu_bus_buffer.scala 236:96]
node _T_953 = bits(ibuf_byteen, 1, 1) @[lsu_bus_buffer.scala 236:130]
node _T_954 = mux(_T_949, _T_952, _T_953) @[lsu_bus_buffer.scala 236:48]
node _T_955 = eq(ibuf_merge_in, UInt<1>("h00")) @[lsu_bus_buffer.scala 236:65]
node _T_956 = and(ibuf_merge_en, _T_955) @[lsu_bus_buffer.scala 236:63]
node _T_957 = bits(ibuf_byteen, 2, 2) @[lsu_bus_buffer.scala 236:92]
node _T_958 = bits(ldst_byteen_lo_r, 2, 2) @[lsu_bus_buffer.scala 236:114]
node _T_959 = or(_T_957, _T_958) @[lsu_bus_buffer.scala 236:96]
node _T_960 = bits(ibuf_byteen, 2, 2) @[lsu_bus_buffer.scala 236:130]
node _T_961 = mux(_T_956, _T_959, _T_960) @[lsu_bus_buffer.scala 236:48]
node _T_962 = eq(ibuf_merge_in, UInt<1>("h00")) @[lsu_bus_buffer.scala 236:65]
node _T_963 = and(ibuf_merge_en, _T_962) @[lsu_bus_buffer.scala 236:63]
node _T_964 = bits(ibuf_byteen, 3, 3) @[lsu_bus_buffer.scala 236:92]
node _T_965 = bits(ldst_byteen_lo_r, 3, 3) @[lsu_bus_buffer.scala 236:114]
node _T_966 = or(_T_964, _T_965) @[lsu_bus_buffer.scala 236:96]
node _T_967 = bits(ibuf_byteen, 3, 3) @[lsu_bus_buffer.scala 236:130]
node _T_968 = mux(_T_963, _T_966, _T_967) @[lsu_bus_buffer.scala 236:48]
node _T_969 = cat(_T_968, _T_961) @[Cat.scala 29:58]
node _T_970 = cat(_T_969, _T_954) @[Cat.scala 29:58]
node ibuf_byteen_out = cat(_T_970, _T_947) @[Cat.scala 29:58]
node _T_971 = eq(ibuf_merge_in, UInt<1>("h00")) @[lsu_bus_buffer.scala 237:62]
node _T_972 = and(ibuf_merge_en, _T_971) @[lsu_bus_buffer.scala 237:60]
node _T_973 = bits(ldst_byteen_lo_r, 0, 0) @[lsu_bus_buffer.scala 237:98]
node _T_974 = bits(store_data_lo_r, 7, 0) @[lsu_bus_buffer.scala 237:118]
node _T_975 = bits(ibuf_data, 7, 0) @[lsu_bus_buffer.scala 237:143]
node _T_976 = mux(_T_973, _T_974, _T_975) @[lsu_bus_buffer.scala 237:81]
node _T_977 = bits(ibuf_data, 7, 0) @[lsu_bus_buffer.scala 237:169]
node _T_978 = mux(_T_972, _T_976, _T_977) @[lsu_bus_buffer.scala 237:45]
node _T_979 = eq(ibuf_merge_in, UInt<1>("h00")) @[lsu_bus_buffer.scala 237:62]
node _T_980 = and(ibuf_merge_en, _T_979) @[lsu_bus_buffer.scala 237:60]
node _T_981 = bits(ldst_byteen_lo_r, 1, 1) @[lsu_bus_buffer.scala 237:98]
node _T_982 = bits(store_data_lo_r, 15, 8) @[lsu_bus_buffer.scala 237:118]
node _T_983 = bits(ibuf_data, 15, 8) @[lsu_bus_buffer.scala 237:143]
node _T_984 = mux(_T_981, _T_982, _T_983) @[lsu_bus_buffer.scala 237:81]
node _T_985 = bits(ibuf_data, 15, 8) @[lsu_bus_buffer.scala 237:169]
node _T_986 = mux(_T_980, _T_984, _T_985) @[lsu_bus_buffer.scala 237:45]
node _T_987 = eq(ibuf_merge_in, UInt<1>("h00")) @[lsu_bus_buffer.scala 237:62]
node _T_988 = and(ibuf_merge_en, _T_987) @[lsu_bus_buffer.scala 237:60]
node _T_989 = bits(ldst_byteen_lo_r, 2, 2) @[lsu_bus_buffer.scala 237:98]
node _T_990 = bits(store_data_lo_r, 23, 16) @[lsu_bus_buffer.scala 237:118]
node _T_991 = bits(ibuf_data, 23, 16) @[lsu_bus_buffer.scala 237:143]
node _T_992 = mux(_T_989, _T_990, _T_991) @[lsu_bus_buffer.scala 237:81]
node _T_993 = bits(ibuf_data, 23, 16) @[lsu_bus_buffer.scala 237:169]
node _T_994 = mux(_T_988, _T_992, _T_993) @[lsu_bus_buffer.scala 237:45]
node _T_995 = eq(ibuf_merge_in, UInt<1>("h00")) @[lsu_bus_buffer.scala 237:62]
node _T_996 = and(ibuf_merge_en, _T_995) @[lsu_bus_buffer.scala 237:60]
node _T_997 = bits(ldst_byteen_lo_r, 3, 3) @[lsu_bus_buffer.scala 237:98]
node _T_998 = bits(store_data_lo_r, 31, 24) @[lsu_bus_buffer.scala 237:118]
node _T_999 = bits(ibuf_data, 31, 24) @[lsu_bus_buffer.scala 237:143]
node _T_1000 = mux(_T_997, _T_998, _T_999) @[lsu_bus_buffer.scala 237:81]
node _T_1001 = bits(ibuf_data, 31, 24) @[lsu_bus_buffer.scala 237:169]
node _T_1002 = mux(_T_996, _T_1000, _T_1001) @[lsu_bus_buffer.scala 237:45]
node _T_1003 = cat(_T_1002, _T_994) @[Cat.scala 29:58]
node _T_1004 = cat(_T_1003, _T_986) @[Cat.scala 29:58]
node ibuf_data_out = cat(_T_1004, _T_978) @[Cat.scala 29:58]
node _T_1005 = mux(ibuf_wr_en, UInt<1>("h01"), ibuf_valid) @[lsu_bus_buffer.scala 239:58]
node _T_1006 = eq(ibuf_rst, UInt<1>("h00")) @[lsu_bus_buffer.scala 239:93]
node _T_1007 = and(_T_1005, _T_1006) @[lsu_bus_buffer.scala 239:91]
reg _T_1008 : UInt<1>, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_buffer.scala 239:54]
_T_1008 <= _T_1007 @[lsu_bus_buffer.scala 239:54]
ibuf_valid <= _T_1008 @[lsu_bus_buffer.scala 239:14]
reg _T_1009 : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when ibuf_wr_en : @[Reg.scala 28:19]
_T_1009 <= ibuf_tag_in @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
ibuf_tag <= _T_1009 @[lsu_bus_buffer.scala 240:12]
reg ibuf_dualtag : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when ibuf_wr_en : @[Reg.scala 28:19]
ibuf_dualtag <= WrPtr0_r @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
reg ibuf_dual : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when ibuf_wr_en : @[Reg.scala 28:19]
ibuf_dual <= io.ldst_dual_r @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
reg ibuf_samedw : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when ibuf_wr_en : @[Reg.scala 28:19]
ibuf_samedw <= ldst_samedw_r @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
reg ibuf_nomerge : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when ibuf_wr_en : @[Reg.scala 28:19]
ibuf_nomerge <= io.no_dword_merge_r @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
reg _T_1010 : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when ibuf_wr_en : @[Reg.scala 28:19]
_T_1010 <= io.is_sideeffects_r @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
ibuf_sideeffect <= _T_1010 @[lsu_bus_buffer.scala 245:19]
reg ibuf_unsign : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when ibuf_wr_en : @[Reg.scala 28:19]
ibuf_unsign <= io.lsu_pkt_r.bits.unsign @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
reg _T_1011 : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when ibuf_wr_en : @[Reg.scala 28:19]
_T_1011 <= io.lsu_pkt_r.bits.store @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
ibuf_write <= _T_1011 @[lsu_bus_buffer.scala 247:14]
reg ibuf_sz : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when ibuf_wr_en : @[Reg.scala 28:19]
ibuf_sz <= ibuf_sz_in @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
inst rvclkhdr of rvclkhdr @[el2_lib.scala 508:23]
rvclkhdr.clock <= clock
rvclkhdr.reset <= reset
rvclkhdr.io.clk <= clock @[el2_lib.scala 510:18]
rvclkhdr.io.en <= ibuf_wr_en @[el2_lib.scala 511:17]
rvclkhdr.io.scan_mode <= io.scan_mode @[el2_lib.scala 512:24]
reg _T_1012 : UInt, rvclkhdr.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 514:16]
_T_1012 <= ibuf_addr_in @[el2_lib.scala 514:16]
ibuf_addr <= _T_1012 @[lsu_bus_buffer.scala 249:13]
reg _T_1013 : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when ibuf_wr_en : @[Reg.scala 28:19]
_T_1013 <= ibuf_byteen_in @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
ibuf_byteen <= _T_1013 @[lsu_bus_buffer.scala 250:15]
inst rvclkhdr_1 of rvclkhdr_1 @[el2_lib.scala 508:23]
rvclkhdr_1.clock <= clock
rvclkhdr_1.reset <= reset
rvclkhdr_1.io.clk <= clock @[el2_lib.scala 510:18]
rvclkhdr_1.io.en <= ibuf_wr_en @[el2_lib.scala 511:17]
rvclkhdr_1.io.scan_mode <= io.scan_mode @[el2_lib.scala 512:24]
reg _T_1014 : UInt, rvclkhdr_1.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 514:16]
_T_1014 <= ibuf_data_in @[el2_lib.scala 514:16]
ibuf_data <= _T_1014 @[lsu_bus_buffer.scala 251:13]
reg _T_1015 : UInt, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_buffer.scala 252:55]
_T_1015 <= ibuf_timer_in @[lsu_bus_buffer.scala 252:55]
ibuf_timer <= _T_1015 @[lsu_bus_buffer.scala 252:14]
wire buf_numvld_wrcmd_any : UInt<4>
buf_numvld_wrcmd_any <= UInt<1>("h00")
wire buf_numvld_cmd_any : UInt<4>
buf_numvld_cmd_any <= UInt<1>("h00")
wire obuf_wr_timer : UInt<3>
obuf_wr_timer <= UInt<1>("h00")
wire buf_nomerge : UInt<1>[4] @[lsu_bus_buffer.scala 256:25]
buf_nomerge[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 257:15]
buf_nomerge[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 257:15]
buf_nomerge[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 257:15]
buf_nomerge[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 257:15]
wire buf_sideeffect : UInt<4>
buf_sideeffect <= UInt<1>("h00")
wire obuf_force_wr_en : UInt<1>
obuf_force_wr_en <= UInt<1>("h00")
wire obuf_wr_en : UInt<1>
obuf_wr_en <= UInt<1>("h00")
node _T_1016 = eq(buf_numvld_wrcmd_any, UInt<1>("h01")) @[lsu_bus_buffer.scala 262:43]
node _T_1017 = eq(buf_numvld_cmd_any, UInt<1>("h01")) @[lsu_bus_buffer.scala 262:72]
node _T_1018 = and(_T_1016, _T_1017) @[lsu_bus_buffer.scala 262:51]
node _T_1019 = neq(obuf_wr_timer, UInt<3>("h07")) @[lsu_bus_buffer.scala 262:97]
node _T_1020 = and(_T_1018, _T_1019) @[lsu_bus_buffer.scala 262:80]
node _T_1021 = eq(bus_coalescing_disable, UInt<1>("h00")) @[lsu_bus_buffer.scala 263:5]
node _T_1022 = and(_T_1020, _T_1021) @[lsu_bus_buffer.scala 262:114]
node _T_1023 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 263:114]
node _T_1024 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 263:114]
node _T_1025 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 263:114]
node _T_1026 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 263:114]
node _T_1027 = mux(_T_1023, buf_nomerge[0], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1028 = mux(_T_1024, buf_nomerge[1], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1029 = mux(_T_1025, buf_nomerge[2], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1030 = mux(_T_1026, buf_nomerge[3], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1031 = or(_T_1027, _T_1028) @[Mux.scala 27:72]
node _T_1032 = or(_T_1031, _T_1029) @[Mux.scala 27:72]
node _T_1033 = or(_T_1032, _T_1030) @[Mux.scala 27:72]
wire _T_1034 : UInt<1> @[Mux.scala 27:72]
_T_1034 <= _T_1033 @[Mux.scala 27:72]
node _T_1035 = eq(_T_1034, UInt<1>("h00")) @[lsu_bus_buffer.scala 263:31]
node _T_1036 = and(_T_1022, _T_1035) @[lsu_bus_buffer.scala 263:29]
node _T_1037 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 264:88]
node _T_1038 = bits(buf_sideeffect, 0, 0) @[lsu_bus_buffer.scala 264:111]
node _T_1039 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 264:88]
node _T_1040 = bits(buf_sideeffect, 1, 1) @[lsu_bus_buffer.scala 264:111]
node _T_1041 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 264:88]
node _T_1042 = bits(buf_sideeffect, 2, 2) @[lsu_bus_buffer.scala 264:111]
node _T_1043 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 264:88]
node _T_1044 = bits(buf_sideeffect, 3, 3) @[lsu_bus_buffer.scala 264:111]
node _T_1045 = mux(_T_1037, _T_1038, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1046 = mux(_T_1039, _T_1040, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1047 = mux(_T_1041, _T_1042, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1048 = mux(_T_1043, _T_1044, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1049 = or(_T_1045, _T_1046) @[Mux.scala 27:72]
node _T_1050 = or(_T_1049, _T_1047) @[Mux.scala 27:72]
node _T_1051 = or(_T_1050, _T_1048) @[Mux.scala 27:72]
wire _T_1052 : UInt<1> @[Mux.scala 27:72]
_T_1052 <= _T_1051 @[Mux.scala 27:72]
node _T_1053 = eq(_T_1052, UInt<1>("h00")) @[lsu_bus_buffer.scala 264:5]
node _T_1054 = and(_T_1036, _T_1053) @[lsu_bus_buffer.scala 263:140]
node _T_1055 = eq(obuf_force_wr_en, UInt<1>("h00")) @[lsu_bus_buffer.scala 264:119]
node obuf_wr_wait = and(_T_1054, _T_1055) @[lsu_bus_buffer.scala 264:117]
node _T_1056 = orr(buf_numvld_cmd_any) @[lsu_bus_buffer.scala 265:75]
node _T_1057 = lt(obuf_wr_timer, UInt<3>("h07")) @[lsu_bus_buffer.scala 265:95]
node _T_1058 = and(_T_1056, _T_1057) @[lsu_bus_buffer.scala 265:79]
node _T_1059 = add(obuf_wr_timer, UInt<1>("h01")) @[lsu_bus_buffer.scala 265:123]
node _T_1060 = tail(_T_1059, 1) @[lsu_bus_buffer.scala 265:123]
node _T_1061 = mux(_T_1058, _T_1060, obuf_wr_timer) @[lsu_bus_buffer.scala 265:55]
node obuf_wr_timer_in = mux(obuf_wr_en, UInt<3>("h00"), _T_1061) @[lsu_bus_buffer.scala 265:29]
node _T_1062 = eq(io.lsu_busreq_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 266:41]
node _T_1063 = and(io.lsu_busreq_m, _T_1062) @[lsu_bus_buffer.scala 266:39]
node _T_1064 = eq(ibuf_valid, UInt<1>("h00")) @[lsu_bus_buffer.scala 266:60]
node _T_1065 = and(_T_1063, _T_1064) @[lsu_bus_buffer.scala 266:58]
node _T_1066 = eq(buf_numvld_cmd_any, UInt<1>("h01")) @[lsu_bus_buffer.scala 266:93]
node _T_1067 = and(_T_1065, _T_1066) @[lsu_bus_buffer.scala 266:72]
node _T_1068 = bits(io.lsu_addr_m, 31, 2) @[lsu_bus_buffer.scala 266:117]
node _T_1069 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 266:208]
node _T_1070 = bits(buf_addr[0], 31, 2) @[lsu_bus_buffer.scala 266:228]
node _T_1071 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 266:208]
node _T_1072 = bits(buf_addr[1], 31, 2) @[lsu_bus_buffer.scala 266:228]
node _T_1073 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 266:208]
node _T_1074 = bits(buf_addr[2], 31, 2) @[lsu_bus_buffer.scala 266:228]
node _T_1075 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 266:208]
node _T_1076 = bits(buf_addr[3], 31, 2) @[lsu_bus_buffer.scala 266:228]
node _T_1077 = mux(_T_1069, _T_1070, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1078 = mux(_T_1071, _T_1072, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1079 = mux(_T_1073, _T_1074, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1080 = mux(_T_1075, _T_1076, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1081 = or(_T_1077, _T_1078) @[Mux.scala 27:72]
node _T_1082 = or(_T_1081, _T_1079) @[Mux.scala 27:72]
node _T_1083 = or(_T_1082, _T_1080) @[Mux.scala 27:72]
wire _T_1084 : UInt<30> @[Mux.scala 27:72]
_T_1084 <= _T_1083 @[Mux.scala 27:72]
node _T_1085 = neq(_T_1068, _T_1084) @[lsu_bus_buffer.scala 266:123]
node _T_1086 = and(_T_1067, _T_1085) @[lsu_bus_buffer.scala 266:101]
obuf_force_wr_en <= _T_1086 @[lsu_bus_buffer.scala 266:20]
wire buf_numvld_pend_any : UInt<4>
buf_numvld_pend_any <= UInt<1>("h00")
node _T_1087 = eq(buf_numvld_pend_any, UInt<1>("h00")) @[lsu_bus_buffer.scala 268:53]
node _T_1088 = and(ibuf_byp, _T_1087) @[lsu_bus_buffer.scala 268:31]
node _T_1089 = eq(io.lsu_pkt_r.bits.store, UInt<1>("h00")) @[lsu_bus_buffer.scala 268:64]
node _T_1090 = or(_T_1089, io.no_dword_merge_r) @[lsu_bus_buffer.scala 268:89]
node ibuf_buf_byp = and(_T_1088, _T_1090) @[lsu_bus_buffer.scala 268:61]
wire bus_sideeffect_pend : UInt<1>
bus_sideeffect_pend <= UInt<1>("h00")
wire found_cmdptr0 : UInt<1>
found_cmdptr0 <= UInt<1>("h00")
wire buf_cmd_state_bus_en : UInt<1>[4] @[lsu_bus_buffer.scala 271:34]
buf_cmd_state_bus_en[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 272:24]
buf_cmd_state_bus_en[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 272:24]
buf_cmd_state_bus_en[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 272:24]
buf_cmd_state_bus_en[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 272:24]
wire buf_dual : UInt<1>[4] @[lsu_bus_buffer.scala 273:22]
buf_dual[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 274:12]
buf_dual[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 274:12]
buf_dual[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 274:12]
buf_dual[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 274:12]
wire buf_samedw : UInt<1>[4] @[lsu_bus_buffer.scala 275:24]
buf_samedw[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 276:14]
buf_samedw[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 276:14]
buf_samedw[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 276:14]
buf_samedw[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 276:14]
wire found_cmdptr1 : UInt<1>
found_cmdptr1 <= UInt<1>("h00")
wire bus_cmd_ready : UInt<1>
bus_cmd_ready <= UInt<1>("h00")
wire obuf_valid : UInt<1>
obuf_valid <= UInt<1>("h00")
wire obuf_nosend : UInt<1>
obuf_nosend <= UInt<1>("h00")
wire lsu_bus_cntr_overflow : UInt<1>
lsu_bus_cntr_overflow <= UInt<1>("h00")
wire bus_addr_match_pending : UInt<1>
bus_addr_match_pending <= UInt<1>("h00")
node _T_1091 = and(ibuf_buf_byp, io.lsu_commit_r) @[lsu_bus_buffer.scala 283:32]
node _T_1092 = and(io.is_sideeffects_r, bus_sideeffect_pend) @[lsu_bus_buffer.scala 283:74]
node _T_1093 = eq(_T_1092, UInt<1>("h00")) @[lsu_bus_buffer.scala 283:52]
node _T_1094 = and(_T_1091, _T_1093) @[lsu_bus_buffer.scala 283:50]
node _T_1095 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 58:123]
node _T_1096 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 58:123]
node _T_1097 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 58:123]
node _T_1098 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 58:123]
node _T_1099 = mux(_T_1095, buf_state[0], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1100 = mux(_T_1096, buf_state[1], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1101 = mux(_T_1097, buf_state[2], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1102 = mux(_T_1098, buf_state[3], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1103 = or(_T_1099, _T_1100) @[Mux.scala 27:72]
node _T_1104 = or(_T_1103, _T_1101) @[Mux.scala 27:72]
node _T_1105 = or(_T_1104, _T_1102) @[Mux.scala 27:72]
wire _T_1106 : UInt<3> @[Mux.scala 27:72]
_T_1106 <= _T_1105 @[Mux.scala 27:72]
node _T_1107 = eq(_T_1106, UInt<3>("h02")) @[lsu_bus_buffer.scala 284:36]
node _T_1108 = and(_T_1107, found_cmdptr0) @[lsu_bus_buffer.scala 284:47]
node _T_1109 = cat(buf_cmd_state_bus_en[3], buf_cmd_state_bus_en[2]) @[Cat.scala 29:58]
node _T_1110 = cat(_T_1109, buf_cmd_state_bus_en[1]) @[Cat.scala 29:58]
node _T_1111 = cat(_T_1110, buf_cmd_state_bus_en[0]) @[Cat.scala 29:58]
node _T_1112 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 57:118]
node _T_1113 = bits(_T_1111, 0, 0) @[lsu_bus_buffer.scala 57:129]
node _T_1114 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 57:118]
node _T_1115 = bits(_T_1111, 1, 1) @[lsu_bus_buffer.scala 57:129]
node _T_1116 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 57:118]
node _T_1117 = bits(_T_1111, 2, 2) @[lsu_bus_buffer.scala 57:129]
node _T_1118 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 57:118]
node _T_1119 = bits(_T_1111, 3, 3) @[lsu_bus_buffer.scala 57:129]
node _T_1120 = mux(_T_1112, _T_1113, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1121 = mux(_T_1114, _T_1115, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1122 = mux(_T_1116, _T_1117, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1123 = mux(_T_1118, _T_1119, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1124 = or(_T_1120, _T_1121) @[Mux.scala 27:72]
node _T_1125 = or(_T_1124, _T_1122) @[Mux.scala 27:72]
node _T_1126 = or(_T_1125, _T_1123) @[Mux.scala 27:72]
wire _T_1127 : UInt<1> @[Mux.scala 27:72]
_T_1127 <= _T_1126 @[Mux.scala 27:72]
node _T_1128 = eq(_T_1127, UInt<1>("h00")) @[lsu_bus_buffer.scala 285:23]
node _T_1129 = and(_T_1108, _T_1128) @[lsu_bus_buffer.scala 285:21]
node _T_1130 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 57:118]
node _T_1131 = bits(buf_sideeffect, 0, 0) @[lsu_bus_buffer.scala 57:129]
node _T_1132 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 57:118]
node _T_1133 = bits(buf_sideeffect, 1, 1) @[lsu_bus_buffer.scala 57:129]
node _T_1134 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 57:118]
node _T_1135 = bits(buf_sideeffect, 2, 2) @[lsu_bus_buffer.scala 57:129]
node _T_1136 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 57:118]
node _T_1137 = bits(buf_sideeffect, 3, 3) @[lsu_bus_buffer.scala 57:129]
node _T_1138 = mux(_T_1130, _T_1131, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1139 = mux(_T_1132, _T_1133, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1140 = mux(_T_1134, _T_1135, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1141 = mux(_T_1136, _T_1137, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1142 = or(_T_1138, _T_1139) @[Mux.scala 27:72]
node _T_1143 = or(_T_1142, _T_1140) @[Mux.scala 27:72]
node _T_1144 = or(_T_1143, _T_1141) @[Mux.scala 27:72]
wire _T_1145 : UInt<1> @[Mux.scala 27:72]
_T_1145 <= _T_1144 @[Mux.scala 27:72]
node _T_1146 = and(_T_1145, bus_sideeffect_pend) @[lsu_bus_buffer.scala 285:141]
node _T_1147 = eq(_T_1146, UInt<1>("h00")) @[lsu_bus_buffer.scala 285:105]
node _T_1148 = and(_T_1129, _T_1147) @[lsu_bus_buffer.scala 285:103]
node _T_1149 = cat(buf_dual[3], buf_dual[2]) @[Cat.scala 29:58]
node _T_1150 = cat(_T_1149, buf_dual[1]) @[Cat.scala 29:58]
node _T_1151 = cat(_T_1150, buf_dual[0]) @[Cat.scala 29:58]
node _T_1152 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 57:118]
node _T_1153 = bits(_T_1151, 0, 0) @[lsu_bus_buffer.scala 57:129]
node _T_1154 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 57:118]
node _T_1155 = bits(_T_1151, 1, 1) @[lsu_bus_buffer.scala 57:129]
node _T_1156 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 57:118]
node _T_1157 = bits(_T_1151, 2, 2) @[lsu_bus_buffer.scala 57:129]
node _T_1158 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 57:118]
node _T_1159 = bits(_T_1151, 3, 3) @[lsu_bus_buffer.scala 57:129]
node _T_1160 = mux(_T_1152, _T_1153, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1161 = mux(_T_1154, _T_1155, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1162 = mux(_T_1156, _T_1157, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1163 = mux(_T_1158, _T_1159, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1164 = or(_T_1160, _T_1161) @[Mux.scala 27:72]
node _T_1165 = or(_T_1164, _T_1162) @[Mux.scala 27:72]
node _T_1166 = or(_T_1165, _T_1163) @[Mux.scala 27:72]
wire _T_1167 : UInt<1> @[Mux.scala 27:72]
_T_1167 <= _T_1166 @[Mux.scala 27:72]
node _T_1168 = cat(buf_samedw[3], buf_samedw[2]) @[Cat.scala 29:58]
node _T_1169 = cat(_T_1168, buf_samedw[1]) @[Cat.scala 29:58]
node _T_1170 = cat(_T_1169, buf_samedw[0]) @[Cat.scala 29:58]
node _T_1171 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 57:118]
node _T_1172 = bits(_T_1170, 0, 0) @[lsu_bus_buffer.scala 57:129]
node _T_1173 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 57:118]
node _T_1174 = bits(_T_1170, 1, 1) @[lsu_bus_buffer.scala 57:129]
node _T_1175 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 57:118]
node _T_1176 = bits(_T_1170, 2, 2) @[lsu_bus_buffer.scala 57:129]
node _T_1177 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 57:118]
node _T_1178 = bits(_T_1170, 3, 3) @[lsu_bus_buffer.scala 57:129]
node _T_1179 = mux(_T_1171, _T_1172, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1180 = mux(_T_1173, _T_1174, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1181 = mux(_T_1175, _T_1176, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1182 = mux(_T_1177, _T_1178, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1183 = or(_T_1179, _T_1180) @[Mux.scala 27:72]
node _T_1184 = or(_T_1183, _T_1181) @[Mux.scala 27:72]
node _T_1185 = or(_T_1184, _T_1182) @[Mux.scala 27:72]
wire _T_1186 : UInt<1> @[Mux.scala 27:72]
_T_1186 <= _T_1185 @[Mux.scala 27:72]
node _T_1187 = and(_T_1167, _T_1186) @[lsu_bus_buffer.scala 286:77]
node _T_1188 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 57:118]
node _T_1189 = bits(buf_write, 0, 0) @[lsu_bus_buffer.scala 57:129]
node _T_1190 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 57:118]
node _T_1191 = bits(buf_write, 1, 1) @[lsu_bus_buffer.scala 57:129]
node _T_1192 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 57:118]
node _T_1193 = bits(buf_write, 2, 2) @[lsu_bus_buffer.scala 57:129]
node _T_1194 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 57:118]
node _T_1195 = bits(buf_write, 3, 3) @[lsu_bus_buffer.scala 57:129]
node _T_1196 = mux(_T_1188, _T_1189, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1197 = mux(_T_1190, _T_1191, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1198 = mux(_T_1192, _T_1193, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1199 = mux(_T_1194, _T_1195, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1200 = or(_T_1196, _T_1197) @[Mux.scala 27:72]
node _T_1201 = or(_T_1200, _T_1198) @[Mux.scala 27:72]
node _T_1202 = or(_T_1201, _T_1199) @[Mux.scala 27:72]
wire _T_1203 : UInt<1> @[Mux.scala 27:72]
_T_1203 <= _T_1202 @[Mux.scala 27:72]
node _T_1204 = eq(_T_1203, UInt<1>("h00")) @[lsu_bus_buffer.scala 286:150]
node _T_1205 = and(_T_1187, _T_1204) @[lsu_bus_buffer.scala 286:148]
node _T_1206 = eq(_T_1205, UInt<1>("h00")) @[lsu_bus_buffer.scala 286:8]
node _T_1207 = or(_T_1206, found_cmdptr1) @[lsu_bus_buffer.scala 286:181]
node _T_1208 = cat(buf_nomerge[3], buf_nomerge[2]) @[Cat.scala 29:58]
node _T_1209 = cat(_T_1208, buf_nomerge[1]) @[Cat.scala 29:58]
node _T_1210 = cat(_T_1209, buf_nomerge[0]) @[Cat.scala 29:58]
node _T_1211 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 57:118]
node _T_1212 = bits(_T_1210, 0, 0) @[lsu_bus_buffer.scala 57:129]
node _T_1213 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 57:118]
node _T_1214 = bits(_T_1210, 1, 1) @[lsu_bus_buffer.scala 57:129]
node _T_1215 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 57:118]
node _T_1216 = bits(_T_1210, 2, 2) @[lsu_bus_buffer.scala 57:129]
node _T_1217 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 57:118]
node _T_1218 = bits(_T_1210, 3, 3) @[lsu_bus_buffer.scala 57:129]
node _T_1219 = mux(_T_1211, _T_1212, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1220 = mux(_T_1213, _T_1214, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1221 = mux(_T_1215, _T_1216, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1222 = mux(_T_1217, _T_1218, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1223 = or(_T_1219, _T_1220) @[Mux.scala 27:72]
node _T_1224 = or(_T_1223, _T_1221) @[Mux.scala 27:72]
node _T_1225 = or(_T_1224, _T_1222) @[Mux.scala 27:72]
wire _T_1226 : UInt<1> @[Mux.scala 27:72]
_T_1226 <= _T_1225 @[Mux.scala 27:72]
node _T_1227 = or(_T_1207, _T_1226) @[lsu_bus_buffer.scala 286:197]
node _T_1228 = or(_T_1227, obuf_force_wr_en) @[lsu_bus_buffer.scala 286:269]
node _T_1229 = and(_T_1148, _T_1228) @[lsu_bus_buffer.scala 285:164]
node _T_1230 = or(_T_1094, _T_1229) @[lsu_bus_buffer.scala 283:98]
node _T_1231 = eq(obuf_valid, UInt<1>("h00")) @[lsu_bus_buffer.scala 287:48]
node _T_1232 = or(bus_cmd_ready, _T_1231) @[lsu_bus_buffer.scala 287:46]
node _T_1233 = or(_T_1232, obuf_nosend) @[lsu_bus_buffer.scala 287:60]
node _T_1234 = and(_T_1230, _T_1233) @[lsu_bus_buffer.scala 287:29]
node _T_1235 = eq(obuf_wr_wait, UInt<1>("h00")) @[lsu_bus_buffer.scala 287:77]
node _T_1236 = and(_T_1234, _T_1235) @[lsu_bus_buffer.scala 287:75]
node _T_1237 = eq(lsu_bus_cntr_overflow, UInt<1>("h00")) @[lsu_bus_buffer.scala 287:93]
node _T_1238 = and(_T_1236, _T_1237) @[lsu_bus_buffer.scala 287:91]
node _T_1239 = eq(bus_addr_match_pending, UInt<1>("h00")) @[lsu_bus_buffer.scala 287:118]
node _T_1240 = and(_T_1238, _T_1239) @[lsu_bus_buffer.scala 287:116]
node _T_1241 = and(_T_1240, io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 287:142]
obuf_wr_en <= _T_1241 @[lsu_bus_buffer.scala 283:14]
wire bus_cmd_sent : UInt<1>
bus_cmd_sent <= UInt<1>("h00")
node _T_1242 = and(obuf_valid, obuf_nosend) @[lsu_bus_buffer.scala 289:47]
node _T_1243 = or(bus_cmd_sent, _T_1242) @[lsu_bus_buffer.scala 289:33]
node _T_1244 = eq(obuf_wr_en, UInt<1>("h00")) @[lsu_bus_buffer.scala 289:65]
node _T_1245 = and(_T_1243, _T_1244) @[lsu_bus_buffer.scala 289:63]
node _T_1246 = and(_T_1245, io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 289:77]
node obuf_rst = or(_T_1246, io.dec_tlu_force_halt) @[lsu_bus_buffer.scala 289:98]
node _T_1247 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 57:118]
node _T_1248 = bits(buf_write, 0, 0) @[lsu_bus_buffer.scala 57:129]
node _T_1249 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 57:118]
node _T_1250 = bits(buf_write, 1, 1) @[lsu_bus_buffer.scala 57:129]
node _T_1251 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 57:118]
node _T_1252 = bits(buf_write, 2, 2) @[lsu_bus_buffer.scala 57:129]
node _T_1253 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 57:118]
node _T_1254 = bits(buf_write, 3, 3) @[lsu_bus_buffer.scala 57:129]
node _T_1255 = mux(_T_1247, _T_1248, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1256 = mux(_T_1249, _T_1250, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1257 = mux(_T_1251, _T_1252, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1258 = mux(_T_1253, _T_1254, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1259 = or(_T_1255, _T_1256) @[Mux.scala 27:72]
node _T_1260 = or(_T_1259, _T_1257) @[Mux.scala 27:72]
node _T_1261 = or(_T_1260, _T_1258) @[Mux.scala 27:72]
wire _T_1262 : UInt<1> @[Mux.scala 27:72]
_T_1262 <= _T_1261 @[Mux.scala 27:72]
node obuf_write_in = mux(ibuf_buf_byp, io.lsu_pkt_r.bits.store, _T_1262) @[lsu_bus_buffer.scala 290:26]
node _T_1263 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 57:118]
node _T_1264 = bits(buf_sideeffect, 0, 0) @[lsu_bus_buffer.scala 57:129]
node _T_1265 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 57:118]
node _T_1266 = bits(buf_sideeffect, 1, 1) @[lsu_bus_buffer.scala 57:129]
node _T_1267 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 57:118]
node _T_1268 = bits(buf_sideeffect, 2, 2) @[lsu_bus_buffer.scala 57:129]
node _T_1269 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 57:118]
node _T_1270 = bits(buf_sideeffect, 3, 3) @[lsu_bus_buffer.scala 57:129]
node _T_1271 = mux(_T_1263, _T_1264, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1272 = mux(_T_1265, _T_1266, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1273 = mux(_T_1267, _T_1268, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1274 = mux(_T_1269, _T_1270, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1275 = or(_T_1271, _T_1272) @[Mux.scala 27:72]
node _T_1276 = or(_T_1275, _T_1273) @[Mux.scala 27:72]
node _T_1277 = or(_T_1276, _T_1274) @[Mux.scala 27:72]
wire _T_1278 : UInt<1> @[Mux.scala 27:72]
_T_1278 <= _T_1277 @[Mux.scala 27:72]
node obuf_sideeffect_in = mux(ibuf_buf_byp, io.is_sideeffects_r, _T_1278) @[lsu_bus_buffer.scala 291:31]
node _T_1279 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 58:123]
node _T_1280 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 58:123]
node _T_1281 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 58:123]
node _T_1282 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 58:123]
node _T_1283 = mux(_T_1279, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1284 = mux(_T_1280, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1285 = mux(_T_1281, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1286 = mux(_T_1282, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1287 = or(_T_1283, _T_1284) @[Mux.scala 27:72]
node _T_1288 = or(_T_1287, _T_1285) @[Mux.scala 27:72]
node _T_1289 = or(_T_1288, _T_1286) @[Mux.scala 27:72]
wire _T_1290 : UInt<32> @[Mux.scala 27:72]
_T_1290 <= _T_1289 @[Mux.scala 27:72]
node obuf_addr_in = mux(ibuf_buf_byp, io.lsu_addr_r, _T_1290) @[lsu_bus_buffer.scala 292:25]
wire buf_sz : UInt<2>[4] @[lsu_bus_buffer.scala 293:20]
buf_sz[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 294:10]
buf_sz[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 294:10]
buf_sz[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 294:10]
buf_sz[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 294:10]
node _T_1291 = cat(io.lsu_pkt_r.bits.word, io.lsu_pkt_r.bits.half) @[Cat.scala 29:58]
node _T_1292 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 58:123]
node _T_1293 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 58:123]
node _T_1294 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 58:123]
node _T_1295 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 58:123]
node _T_1296 = mux(_T_1292, buf_sz[0], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1297 = mux(_T_1293, buf_sz[1], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1298 = mux(_T_1294, buf_sz[2], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1299 = mux(_T_1295, buf_sz[3], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1300 = or(_T_1296, _T_1297) @[Mux.scala 27:72]
node _T_1301 = or(_T_1300, _T_1298) @[Mux.scala 27:72]
node _T_1302 = or(_T_1301, _T_1299) @[Mux.scala 27:72]
wire _T_1303 : UInt<2> @[Mux.scala 27:72]
_T_1303 <= _T_1302 @[Mux.scala 27:72]
node obuf_sz_in = mux(ibuf_buf_byp, _T_1291, _T_1303) @[lsu_bus_buffer.scala 295:23]
wire obuf_merge_en : UInt<1>
obuf_merge_en <= UInt<1>("h00")
node obuf_tag0_in = mux(ibuf_buf_byp, WrPtr0_r, CmdPtr0) @[lsu_bus_buffer.scala 298:25]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node obuf_tag1_in = mux(ibuf_buf_byp, WrPtr1_r, CmdPtr1) @[lsu_bus_buffer.scala 300:25]
LSU with Bundling
2020-12-10 12:50:49 +08:00
wire obuf_cmd_done : UInt<1>
obuf_cmd_done <= UInt<1>("h00")
wire bus_wcmd_sent : UInt<1>
bus_wcmd_sent <= UInt<1>("h00")
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_1304 = or(obuf_wr_en, obuf_rst) @[lsu_bus_buffer.scala 303:39]
node _T_1305 = eq(_T_1304, UInt<1>("h00")) @[lsu_bus_buffer.scala 303:26]
node _T_1306 = or(obuf_cmd_done, bus_wcmd_sent) @[lsu_bus_buffer.scala 303:68]
node obuf_cmd_done_in = and(_T_1305, _T_1306) @[lsu_bus_buffer.scala 303:51]
LSU with Bundling
2020-12-10 12:50:49 +08:00
wire obuf_data_done : UInt<1>
obuf_data_done <= UInt<1>("h00")
wire bus_wdata_sent : UInt<1>
bus_wdata_sent <= UInt<1>("h00")
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_1307 = or(obuf_wr_en, obuf_rst) @[lsu_bus_buffer.scala 306:40]
node _T_1308 = eq(_T_1307, UInt<1>("h00")) @[lsu_bus_buffer.scala 306:27]
node _T_1309 = or(obuf_data_done, bus_wdata_sent) @[lsu_bus_buffer.scala 306:70]
node obuf_data_done_in = and(_T_1308, _T_1309) @[lsu_bus_buffer.scala 306:52]
node _T_1310 = bits(obuf_sz_in, 1, 0) @[lsu_bus_buffer.scala 307:67]
node _T_1311 = eq(_T_1310, UInt<1>("h00")) @[lsu_bus_buffer.scala 307:72]
node _T_1312 = bits(obuf_sz_in, 0, 0) @[lsu_bus_buffer.scala 307:92]
node _T_1313 = bits(obuf_addr_in, 0, 0) @[lsu_bus_buffer.scala 307:111]
node _T_1314 = eq(_T_1313, UInt<1>("h00")) @[lsu_bus_buffer.scala 307:98]
node _T_1315 = and(_T_1312, _T_1314) @[lsu_bus_buffer.scala 307:96]
node _T_1316 = or(_T_1311, _T_1315) @[lsu_bus_buffer.scala 307:79]
node _T_1317 = bits(obuf_sz_in, 1, 1) @[lsu_bus_buffer.scala 307:129]
node _T_1318 = bits(obuf_addr_in, 1, 0) @[lsu_bus_buffer.scala 307:147]
node _T_1319 = orr(_T_1318) @[lsu_bus_buffer.scala 307:153]
node _T_1320 = eq(_T_1319, UInt<1>("h00")) @[lsu_bus_buffer.scala 307:134]
node _T_1321 = and(_T_1317, _T_1320) @[lsu_bus_buffer.scala 307:132]
node _T_1322 = or(_T_1316, _T_1321) @[lsu_bus_buffer.scala 307:116]
node obuf_aligned_in = mux(ibuf_buf_byp, is_aligned_r, _T_1322) @[lsu_bus_buffer.scala 307:28]
LSU with Bundling
2020-12-10 12:50:49 +08:00
wire obuf_nosend_in : UInt<1>
obuf_nosend_in <= UInt<1>("h00")
wire obuf_rdrsp_pend : UInt<1>
obuf_rdrsp_pend <= UInt<1>("h00")
wire bus_rsp_read : UInt<1>
bus_rsp_read <= UInt<1>("h00")
wire bus_rsp_read_tag : UInt<3>
bus_rsp_read_tag <= UInt<1>("h00")
wire obuf_rdrsp_tag : UInt<3>
obuf_rdrsp_tag <= UInt<1>("h00")
wire obuf_write : UInt<1>
obuf_write <= UInt<1>("h00")
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_1323 = eq(obuf_nosend_in, UInt<1>("h00")) @[lsu_bus_buffer.scala 315:44]
node _T_1324 = and(obuf_wr_en, _T_1323) @[lsu_bus_buffer.scala 315:42]
node _T_1325 = eq(_T_1324, UInt<1>("h00")) @[lsu_bus_buffer.scala 315:29]
node _T_1326 = and(_T_1325, obuf_rdrsp_pend) @[lsu_bus_buffer.scala 315:61]
node _T_1327 = eq(bus_rsp_read_tag, obuf_rdrsp_tag) @[lsu_bus_buffer.scala 315:116]
node _T_1328 = and(bus_rsp_read, _T_1327) @[lsu_bus_buffer.scala 315:96]
node _T_1329 = eq(_T_1328, UInt<1>("h00")) @[lsu_bus_buffer.scala 315:81]
node _T_1330 = and(_T_1326, _T_1329) @[lsu_bus_buffer.scala 315:79]
node _T_1331 = eq(obuf_write, UInt<1>("h00")) @[lsu_bus_buffer.scala 316:22]
node _T_1332 = and(bus_cmd_sent, _T_1331) @[lsu_bus_buffer.scala 316:20]
node _T_1333 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[lsu_bus_buffer.scala 316:37]
node _T_1334 = and(_T_1332, _T_1333) @[lsu_bus_buffer.scala 316:35]
node obuf_rdrsp_pend_in = or(_T_1330, _T_1334) @[lsu_bus_buffer.scala 315:138]
LSU with Bundling
2020-12-10 12:50:49 +08:00
wire obuf_tag0 : UInt<3>
obuf_tag0 <= UInt<1>("h00")
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_1335 = eq(obuf_write, UInt<1>("h00")) @[lsu_bus_buffer.scala 318:46]
node _T_1336 = and(bus_cmd_sent, _T_1335) @[lsu_bus_buffer.scala 318:44]
node obuf_rdrsp_tag_in = mux(_T_1336, obuf_tag0, obuf_rdrsp_tag) @[lsu_bus_buffer.scala 318:30]
LSU with Bundling
2020-12-10 12:50:49 +08:00
wire obuf_addr : UInt<32>
obuf_addr <= UInt<1>("h00")
wire obuf_sideeffect : UInt<1>
obuf_sideeffect <= UInt<1>("h00")
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_1337 = bits(obuf_addr_in, 31, 3) @[lsu_bus_buffer.scala 321:34]
node _T_1338 = bits(obuf_addr, 31, 3) @[lsu_bus_buffer.scala 321:52]
node _T_1339 = eq(_T_1337, _T_1338) @[lsu_bus_buffer.scala 321:40]
node _T_1340 = and(_T_1339, obuf_aligned_in) @[lsu_bus_buffer.scala 321:60]
node _T_1341 = eq(obuf_sideeffect, UInt<1>("h00")) @[lsu_bus_buffer.scala 321:80]
node _T_1342 = and(_T_1340, _T_1341) @[lsu_bus_buffer.scala 321:78]
node _T_1343 = eq(obuf_write, UInt<1>("h00")) @[lsu_bus_buffer.scala 321:99]
node _T_1344 = and(_T_1342, _T_1343) @[lsu_bus_buffer.scala 321:97]
node _T_1345 = eq(obuf_write_in, UInt<1>("h00")) @[lsu_bus_buffer.scala 321:113]
node _T_1346 = and(_T_1344, _T_1345) @[lsu_bus_buffer.scala 321:111]
node _T_1347 = eq(io.tlu_busbuff.dec_tlu_external_ldfwd_disable, UInt<1>("h00")) @[lsu_bus_buffer.scala 321:130]
node _T_1348 = and(_T_1346, _T_1347) @[lsu_bus_buffer.scala 321:128]
node _T_1349 = eq(obuf_nosend, UInt<1>("h00")) @[lsu_bus_buffer.scala 322:20]
node _T_1350 = and(obuf_valid, _T_1349) @[lsu_bus_buffer.scala 322:18]
node _T_1351 = eq(bus_rsp_read_tag, obuf_rdrsp_tag) @[lsu_bus_buffer.scala 322:90]
node _T_1352 = and(bus_rsp_read, _T_1351) @[lsu_bus_buffer.scala 322:70]
node _T_1353 = eq(_T_1352, UInt<1>("h00")) @[lsu_bus_buffer.scala 322:55]
node _T_1354 = and(obuf_rdrsp_pend, _T_1353) @[lsu_bus_buffer.scala 322:53]
node _T_1355 = or(_T_1350, _T_1354) @[lsu_bus_buffer.scala 322:34]
node _T_1356 = and(_T_1348, _T_1355) @[lsu_bus_buffer.scala 321:177]
obuf_nosend_in <= _T_1356 @[lsu_bus_buffer.scala 321:18]
node _T_1357 = bits(io.lsu_addr_r, 2, 2) @[lsu_bus_buffer.scala 323:60]
LSU with Bundling
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node _T_1358 = cat(ldst_byteen_lo_r, UInt<4>("h00")) @[Cat.scala 29:58]
node _T_1359 = cat(UInt<4>("h00"), ldst_byteen_lo_r) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_1360 = mux(_T_1357, _T_1358, _T_1359) @[lsu_bus_buffer.scala 323:46]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_1361 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 58:123]
node _T_1362 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 58:123]
node _T_1363 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 58:123]
node _T_1364 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 58:123]
node _T_1365 = mux(_T_1361, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1366 = mux(_T_1362, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1367 = mux(_T_1363, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1368 = mux(_T_1364, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1369 = or(_T_1365, _T_1366) @[Mux.scala 27:72]
node _T_1370 = or(_T_1369, _T_1367) @[Mux.scala 27:72]
node _T_1371 = or(_T_1370, _T_1368) @[Mux.scala 27:72]
wire _T_1372 : UInt<32> @[Mux.scala 27:72]
_T_1372 <= _T_1371 @[Mux.scala 27:72]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_1373 = bits(_T_1372, 2, 2) @[lsu_bus_buffer.scala 324:36]
node _T_1374 = bits(_T_1373, 0, 0) @[lsu_bus_buffer.scala 324:46]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_1375 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 58:123]
node _T_1376 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 58:123]
node _T_1377 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 58:123]
node _T_1378 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 58:123]
node _T_1379 = mux(_T_1375, buf_byteen[0], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1380 = mux(_T_1376, buf_byteen[1], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1381 = mux(_T_1377, buf_byteen[2], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1382 = mux(_T_1378, buf_byteen[3], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1383 = or(_T_1379, _T_1380) @[Mux.scala 27:72]
node _T_1384 = or(_T_1383, _T_1381) @[Mux.scala 27:72]
node _T_1385 = or(_T_1384, _T_1382) @[Mux.scala 27:72]
wire _T_1386 : UInt<4> @[Mux.scala 27:72]
_T_1386 <= _T_1385 @[Mux.scala 27:72]
node _T_1387 = cat(_T_1386, UInt<4>("h00")) @[Cat.scala 29:58]
node _T_1388 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 58:123]
node _T_1389 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 58:123]
node _T_1390 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 58:123]
node _T_1391 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 58:123]
node _T_1392 = mux(_T_1388, buf_byteen[0], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1393 = mux(_T_1389, buf_byteen[1], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1394 = mux(_T_1390, buf_byteen[2], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1395 = mux(_T_1391, buf_byteen[3], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1396 = or(_T_1392, _T_1393) @[Mux.scala 27:72]
node _T_1397 = or(_T_1396, _T_1394) @[Mux.scala 27:72]
node _T_1398 = or(_T_1397, _T_1395) @[Mux.scala 27:72]
wire _T_1399 : UInt<4> @[Mux.scala 27:72]
_T_1399 <= _T_1398 @[Mux.scala 27:72]
node _T_1400 = cat(UInt<4>("h00"), _T_1399) @[Cat.scala 29:58]
Bus Buffer Update
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node _T_1401 = mux(_T_1374, _T_1387, _T_1400) @[lsu_bus_buffer.scala 324:8]
node obuf_byteen0_in = mux(ibuf_buf_byp, _T_1360, _T_1401) @[lsu_bus_buffer.scala 323:28]
node _T_1402 = bits(io.end_addr_r, 2, 2) @[lsu_bus_buffer.scala 325:60]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_1403 = cat(ldst_byteen_hi_r, UInt<4>("h00")) @[Cat.scala 29:58]
node _T_1404 = cat(UInt<4>("h00"), ldst_byteen_hi_r) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_1405 = mux(_T_1402, _T_1403, _T_1404) @[lsu_bus_buffer.scala 325:46]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_1406 = eq(CmdPtr1, UInt<1>("h00")) @[lsu_bus_buffer.scala 58:123]
node _T_1407 = eq(CmdPtr1, UInt<1>("h01")) @[lsu_bus_buffer.scala 58:123]
node _T_1408 = eq(CmdPtr1, UInt<2>("h02")) @[lsu_bus_buffer.scala 58:123]
node _T_1409 = eq(CmdPtr1, UInt<2>("h03")) @[lsu_bus_buffer.scala 58:123]
node _T_1410 = mux(_T_1406, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1411 = mux(_T_1407, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1412 = mux(_T_1408, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1413 = mux(_T_1409, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1414 = or(_T_1410, _T_1411) @[Mux.scala 27:72]
node _T_1415 = or(_T_1414, _T_1412) @[Mux.scala 27:72]
node _T_1416 = or(_T_1415, _T_1413) @[Mux.scala 27:72]
wire _T_1417 : UInt<32> @[Mux.scala 27:72]
_T_1417 <= _T_1416 @[Mux.scala 27:72]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_1418 = bits(_T_1417, 2, 2) @[lsu_bus_buffer.scala 326:36]
node _T_1419 = bits(_T_1418, 0, 0) @[lsu_bus_buffer.scala 326:46]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_1420 = eq(CmdPtr1, UInt<1>("h00")) @[lsu_bus_buffer.scala 58:123]
node _T_1421 = eq(CmdPtr1, UInt<1>("h01")) @[lsu_bus_buffer.scala 58:123]
node _T_1422 = eq(CmdPtr1, UInt<2>("h02")) @[lsu_bus_buffer.scala 58:123]
node _T_1423 = eq(CmdPtr1, UInt<2>("h03")) @[lsu_bus_buffer.scala 58:123]
node _T_1424 = mux(_T_1420, buf_byteen[0], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1425 = mux(_T_1421, buf_byteen[1], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1426 = mux(_T_1422, buf_byteen[2], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1427 = mux(_T_1423, buf_byteen[3], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1428 = or(_T_1424, _T_1425) @[Mux.scala 27:72]
node _T_1429 = or(_T_1428, _T_1426) @[Mux.scala 27:72]
node _T_1430 = or(_T_1429, _T_1427) @[Mux.scala 27:72]
wire _T_1431 : UInt<4> @[Mux.scala 27:72]
_T_1431 <= _T_1430 @[Mux.scala 27:72]
node _T_1432 = cat(_T_1431, UInt<4>("h00")) @[Cat.scala 29:58]
node _T_1433 = eq(CmdPtr1, UInt<1>("h00")) @[lsu_bus_buffer.scala 58:123]
node _T_1434 = eq(CmdPtr1, UInt<1>("h01")) @[lsu_bus_buffer.scala 58:123]
node _T_1435 = eq(CmdPtr1, UInt<2>("h02")) @[lsu_bus_buffer.scala 58:123]
node _T_1436 = eq(CmdPtr1, UInt<2>("h03")) @[lsu_bus_buffer.scala 58:123]
node _T_1437 = mux(_T_1433, buf_byteen[0], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1438 = mux(_T_1434, buf_byteen[1], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1439 = mux(_T_1435, buf_byteen[2], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1440 = mux(_T_1436, buf_byteen[3], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1441 = or(_T_1437, _T_1438) @[Mux.scala 27:72]
node _T_1442 = or(_T_1441, _T_1439) @[Mux.scala 27:72]
node _T_1443 = or(_T_1442, _T_1440) @[Mux.scala 27:72]
wire _T_1444 : UInt<4> @[Mux.scala 27:72]
_T_1444 <= _T_1443 @[Mux.scala 27:72]
node _T_1445 = cat(UInt<4>("h00"), _T_1444) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_1446 = mux(_T_1419, _T_1432, _T_1445) @[lsu_bus_buffer.scala 326:8]
node obuf_byteen1_in = mux(ibuf_buf_byp, _T_1405, _T_1446) @[lsu_bus_buffer.scala 325:28]
node _T_1447 = bits(io.lsu_addr_r, 2, 2) @[lsu_bus_buffer.scala 328:58]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_1448 = cat(store_data_lo_r, UInt<32>("h00")) @[Cat.scala 29:58]
node _T_1449 = cat(UInt<32>("h00"), store_data_lo_r) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_1450 = mux(_T_1447, _T_1448, _T_1449) @[lsu_bus_buffer.scala 328:44]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_1451 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 58:123]
node _T_1452 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 58:123]
node _T_1453 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 58:123]
node _T_1454 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 58:123]
node _T_1455 = mux(_T_1451, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1456 = mux(_T_1452, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1457 = mux(_T_1453, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1458 = mux(_T_1454, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1459 = or(_T_1455, _T_1456) @[Mux.scala 27:72]
node _T_1460 = or(_T_1459, _T_1457) @[Mux.scala 27:72]
node _T_1461 = or(_T_1460, _T_1458) @[Mux.scala 27:72]
wire _T_1462 : UInt<32> @[Mux.scala 27:72]
_T_1462 <= _T_1461 @[Mux.scala 27:72]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_1463 = bits(_T_1462, 2, 2) @[lsu_bus_buffer.scala 329:36]
node _T_1464 = bits(_T_1463, 0, 0) @[lsu_bus_buffer.scala 329:46]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_1465 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 58:123]
node _T_1466 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 58:123]
node _T_1467 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 58:123]
node _T_1468 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 58:123]
node _T_1469 = mux(_T_1465, buf_data[0], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1470 = mux(_T_1466, buf_data[1], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1471 = mux(_T_1467, buf_data[2], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1472 = mux(_T_1468, buf_data[3], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1473 = or(_T_1469, _T_1470) @[Mux.scala 27:72]
node _T_1474 = or(_T_1473, _T_1471) @[Mux.scala 27:72]
node _T_1475 = or(_T_1474, _T_1472) @[Mux.scala 27:72]
wire _T_1476 : UInt<32> @[Mux.scala 27:72]
_T_1476 <= _T_1475 @[Mux.scala 27:72]
node _T_1477 = cat(_T_1476, UInt<32>("h00")) @[Cat.scala 29:58]
node _T_1478 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 58:123]
node _T_1479 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 58:123]
node _T_1480 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 58:123]
node _T_1481 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 58:123]
node _T_1482 = mux(_T_1478, buf_data[0], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1483 = mux(_T_1479, buf_data[1], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1484 = mux(_T_1480, buf_data[2], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1485 = mux(_T_1481, buf_data[3], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1486 = or(_T_1482, _T_1483) @[Mux.scala 27:72]
node _T_1487 = or(_T_1486, _T_1484) @[Mux.scala 27:72]
node _T_1488 = or(_T_1487, _T_1485) @[Mux.scala 27:72]
wire _T_1489 : UInt<32> @[Mux.scala 27:72]
_T_1489 <= _T_1488 @[Mux.scala 27:72]
node _T_1490 = cat(UInt<32>("h00"), _T_1489) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_1491 = mux(_T_1464, _T_1477, _T_1490) @[lsu_bus_buffer.scala 329:8]
node obuf_data0_in = mux(ibuf_buf_byp, _T_1450, _T_1491) @[lsu_bus_buffer.scala 328:26]
node _T_1492 = bits(io.lsu_addr_r, 2, 2) @[lsu_bus_buffer.scala 330:58]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_1493 = cat(store_data_hi_r, UInt<32>("h00")) @[Cat.scala 29:58]
node _T_1494 = cat(UInt<32>("h00"), store_data_hi_r) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_1495 = mux(_T_1492, _T_1493, _T_1494) @[lsu_bus_buffer.scala 330:44]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_1496 = eq(CmdPtr1, UInt<1>("h00")) @[lsu_bus_buffer.scala 58:123]
node _T_1497 = eq(CmdPtr1, UInt<1>("h01")) @[lsu_bus_buffer.scala 58:123]
node _T_1498 = eq(CmdPtr1, UInt<2>("h02")) @[lsu_bus_buffer.scala 58:123]
node _T_1499 = eq(CmdPtr1, UInt<2>("h03")) @[lsu_bus_buffer.scala 58:123]
node _T_1500 = mux(_T_1496, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1501 = mux(_T_1497, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1502 = mux(_T_1498, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1503 = mux(_T_1499, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1504 = or(_T_1500, _T_1501) @[Mux.scala 27:72]
node _T_1505 = or(_T_1504, _T_1502) @[Mux.scala 27:72]
node _T_1506 = or(_T_1505, _T_1503) @[Mux.scala 27:72]
wire _T_1507 : UInt<32> @[Mux.scala 27:72]
_T_1507 <= _T_1506 @[Mux.scala 27:72]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_1508 = bits(_T_1507, 2, 2) @[lsu_bus_buffer.scala 331:36]
node _T_1509 = bits(_T_1508, 0, 0) @[lsu_bus_buffer.scala 331:46]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_1510 = eq(CmdPtr1, UInt<1>("h00")) @[lsu_bus_buffer.scala 58:123]
node _T_1511 = eq(CmdPtr1, UInt<1>("h01")) @[lsu_bus_buffer.scala 58:123]
node _T_1512 = eq(CmdPtr1, UInt<2>("h02")) @[lsu_bus_buffer.scala 58:123]
node _T_1513 = eq(CmdPtr1, UInt<2>("h03")) @[lsu_bus_buffer.scala 58:123]
node _T_1514 = mux(_T_1510, buf_data[0], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1515 = mux(_T_1511, buf_data[1], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1516 = mux(_T_1512, buf_data[2], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1517 = mux(_T_1513, buf_data[3], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1518 = or(_T_1514, _T_1515) @[Mux.scala 27:72]
node _T_1519 = or(_T_1518, _T_1516) @[Mux.scala 27:72]
node _T_1520 = or(_T_1519, _T_1517) @[Mux.scala 27:72]
wire _T_1521 : UInt<32> @[Mux.scala 27:72]
_T_1521 <= _T_1520 @[Mux.scala 27:72]
node _T_1522 = cat(_T_1521, UInt<32>("h00")) @[Cat.scala 29:58]
node _T_1523 = eq(CmdPtr1, UInt<1>("h00")) @[lsu_bus_buffer.scala 58:123]
node _T_1524 = eq(CmdPtr1, UInt<1>("h01")) @[lsu_bus_buffer.scala 58:123]
node _T_1525 = eq(CmdPtr1, UInt<2>("h02")) @[lsu_bus_buffer.scala 58:123]
node _T_1526 = eq(CmdPtr1, UInt<2>("h03")) @[lsu_bus_buffer.scala 58:123]
node _T_1527 = mux(_T_1523, buf_data[0], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1528 = mux(_T_1524, buf_data[1], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1529 = mux(_T_1525, buf_data[2], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1530 = mux(_T_1526, buf_data[3], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1531 = or(_T_1527, _T_1528) @[Mux.scala 27:72]
node _T_1532 = or(_T_1531, _T_1529) @[Mux.scala 27:72]
node _T_1533 = or(_T_1532, _T_1530) @[Mux.scala 27:72]
wire _T_1534 : UInt<32> @[Mux.scala 27:72]
_T_1534 <= _T_1533 @[Mux.scala 27:72]
node _T_1535 = cat(UInt<32>("h00"), _T_1534) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_1536 = mux(_T_1509, _T_1522, _T_1535) @[lsu_bus_buffer.scala 331:8]
node obuf_data1_in = mux(ibuf_buf_byp, _T_1495, _T_1536) @[lsu_bus_buffer.scala 330:26]
node _T_1537 = bits(obuf_byteen0_in, 0, 0) @[lsu_bus_buffer.scala 332:59]
node _T_1538 = bits(obuf_byteen1_in, 0, 0) @[lsu_bus_buffer.scala 332:97]
node _T_1539 = and(obuf_merge_en, _T_1538) @[lsu_bus_buffer.scala 332:80]
node _T_1540 = or(_T_1537, _T_1539) @[lsu_bus_buffer.scala 332:63]
node _T_1541 = bits(obuf_byteen0_in, 1, 1) @[lsu_bus_buffer.scala 332:59]
node _T_1542 = bits(obuf_byteen1_in, 1, 1) @[lsu_bus_buffer.scala 332:97]
node _T_1543 = and(obuf_merge_en, _T_1542) @[lsu_bus_buffer.scala 332:80]
node _T_1544 = or(_T_1541, _T_1543) @[lsu_bus_buffer.scala 332:63]
node _T_1545 = bits(obuf_byteen0_in, 2, 2) @[lsu_bus_buffer.scala 332:59]
node _T_1546 = bits(obuf_byteen1_in, 2, 2) @[lsu_bus_buffer.scala 332:97]
node _T_1547 = and(obuf_merge_en, _T_1546) @[lsu_bus_buffer.scala 332:80]
node _T_1548 = or(_T_1545, _T_1547) @[lsu_bus_buffer.scala 332:63]
node _T_1549 = bits(obuf_byteen0_in, 3, 3) @[lsu_bus_buffer.scala 332:59]
node _T_1550 = bits(obuf_byteen1_in, 3, 3) @[lsu_bus_buffer.scala 332:97]
node _T_1551 = and(obuf_merge_en, _T_1550) @[lsu_bus_buffer.scala 332:80]
node _T_1552 = or(_T_1549, _T_1551) @[lsu_bus_buffer.scala 332:63]
node _T_1553 = bits(obuf_byteen0_in, 4, 4) @[lsu_bus_buffer.scala 332:59]
node _T_1554 = bits(obuf_byteen1_in, 4, 4) @[lsu_bus_buffer.scala 332:97]
node _T_1555 = and(obuf_merge_en, _T_1554) @[lsu_bus_buffer.scala 332:80]
node _T_1556 = or(_T_1553, _T_1555) @[lsu_bus_buffer.scala 332:63]
node _T_1557 = bits(obuf_byteen0_in, 5, 5) @[lsu_bus_buffer.scala 332:59]
node _T_1558 = bits(obuf_byteen1_in, 5, 5) @[lsu_bus_buffer.scala 332:97]
node _T_1559 = and(obuf_merge_en, _T_1558) @[lsu_bus_buffer.scala 332:80]
node _T_1560 = or(_T_1557, _T_1559) @[lsu_bus_buffer.scala 332:63]
node _T_1561 = bits(obuf_byteen0_in, 6, 6) @[lsu_bus_buffer.scala 332:59]
node _T_1562 = bits(obuf_byteen1_in, 6, 6) @[lsu_bus_buffer.scala 332:97]
node _T_1563 = and(obuf_merge_en, _T_1562) @[lsu_bus_buffer.scala 332:80]
node _T_1564 = or(_T_1561, _T_1563) @[lsu_bus_buffer.scala 332:63]
node _T_1565 = bits(obuf_byteen0_in, 7, 7) @[lsu_bus_buffer.scala 332:59]
node _T_1566 = bits(obuf_byteen1_in, 7, 7) @[lsu_bus_buffer.scala 332:97]
node _T_1567 = and(obuf_merge_en, _T_1566) @[lsu_bus_buffer.scala 332:80]
node _T_1568 = or(_T_1565, _T_1567) @[lsu_bus_buffer.scala 332:63]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_1569 = cat(_T_1568, _T_1564) @[Cat.scala 29:58]
node _T_1570 = cat(_T_1569, _T_1560) @[Cat.scala 29:58]
node _T_1571 = cat(_T_1570, _T_1556) @[Cat.scala 29:58]
node _T_1572 = cat(_T_1571, _T_1552) @[Cat.scala 29:58]
node _T_1573 = cat(_T_1572, _T_1548) @[Cat.scala 29:58]
node _T_1574 = cat(_T_1573, _T_1544) @[Cat.scala 29:58]
node obuf_byteen_in = cat(_T_1574, _T_1540) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_1575 = bits(obuf_byteen1_in, 0, 0) @[lsu_bus_buffer.scala 333:76]
node _T_1576 = and(obuf_merge_en, _T_1575) @[lsu_bus_buffer.scala 333:59]
node _T_1577 = bits(obuf_data1_in, 7, 0) @[lsu_bus_buffer.scala 333:94]
node _T_1578 = bits(obuf_data0_in, 7, 0) @[lsu_bus_buffer.scala 333:123]
node _T_1579 = mux(_T_1576, _T_1577, _T_1578) @[lsu_bus_buffer.scala 333:44]
node _T_1580 = bits(obuf_byteen1_in, 1, 1) @[lsu_bus_buffer.scala 333:76]
node _T_1581 = and(obuf_merge_en, _T_1580) @[lsu_bus_buffer.scala 333:59]
node _T_1582 = bits(obuf_data1_in, 15, 8) @[lsu_bus_buffer.scala 333:94]
node _T_1583 = bits(obuf_data0_in, 15, 8) @[lsu_bus_buffer.scala 333:123]
node _T_1584 = mux(_T_1581, _T_1582, _T_1583) @[lsu_bus_buffer.scala 333:44]
node _T_1585 = bits(obuf_byteen1_in, 2, 2) @[lsu_bus_buffer.scala 333:76]
node _T_1586 = and(obuf_merge_en, _T_1585) @[lsu_bus_buffer.scala 333:59]
node _T_1587 = bits(obuf_data1_in, 23, 16) @[lsu_bus_buffer.scala 333:94]
node _T_1588 = bits(obuf_data0_in, 23, 16) @[lsu_bus_buffer.scala 333:123]
node _T_1589 = mux(_T_1586, _T_1587, _T_1588) @[lsu_bus_buffer.scala 333:44]
node _T_1590 = bits(obuf_byteen1_in, 3, 3) @[lsu_bus_buffer.scala 333:76]
node _T_1591 = and(obuf_merge_en, _T_1590) @[lsu_bus_buffer.scala 333:59]
node _T_1592 = bits(obuf_data1_in, 31, 24) @[lsu_bus_buffer.scala 333:94]
node _T_1593 = bits(obuf_data0_in, 31, 24) @[lsu_bus_buffer.scala 333:123]
node _T_1594 = mux(_T_1591, _T_1592, _T_1593) @[lsu_bus_buffer.scala 333:44]
node _T_1595 = bits(obuf_byteen1_in, 4, 4) @[lsu_bus_buffer.scala 333:76]
node _T_1596 = and(obuf_merge_en, _T_1595) @[lsu_bus_buffer.scala 333:59]
node _T_1597 = bits(obuf_data1_in, 39, 32) @[lsu_bus_buffer.scala 333:94]
node _T_1598 = bits(obuf_data0_in, 39, 32) @[lsu_bus_buffer.scala 333:123]
node _T_1599 = mux(_T_1596, _T_1597, _T_1598) @[lsu_bus_buffer.scala 333:44]
node _T_1600 = bits(obuf_byteen1_in, 5, 5) @[lsu_bus_buffer.scala 333:76]
node _T_1601 = and(obuf_merge_en, _T_1600) @[lsu_bus_buffer.scala 333:59]
node _T_1602 = bits(obuf_data1_in, 47, 40) @[lsu_bus_buffer.scala 333:94]
node _T_1603 = bits(obuf_data0_in, 47, 40) @[lsu_bus_buffer.scala 333:123]
node _T_1604 = mux(_T_1601, _T_1602, _T_1603) @[lsu_bus_buffer.scala 333:44]
node _T_1605 = bits(obuf_byteen1_in, 6, 6) @[lsu_bus_buffer.scala 333:76]
node _T_1606 = and(obuf_merge_en, _T_1605) @[lsu_bus_buffer.scala 333:59]
node _T_1607 = bits(obuf_data1_in, 55, 48) @[lsu_bus_buffer.scala 333:94]
node _T_1608 = bits(obuf_data0_in, 55, 48) @[lsu_bus_buffer.scala 333:123]
node _T_1609 = mux(_T_1606, _T_1607, _T_1608) @[lsu_bus_buffer.scala 333:44]
node _T_1610 = bits(obuf_byteen1_in, 7, 7) @[lsu_bus_buffer.scala 333:76]
node _T_1611 = and(obuf_merge_en, _T_1610) @[lsu_bus_buffer.scala 333:59]
node _T_1612 = bits(obuf_data1_in, 63, 56) @[lsu_bus_buffer.scala 333:94]
node _T_1613 = bits(obuf_data0_in, 63, 56) @[lsu_bus_buffer.scala 333:123]
node _T_1614 = mux(_T_1611, _T_1612, _T_1613) @[lsu_bus_buffer.scala 333:44]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_1615 = cat(_T_1614, _T_1609) @[Cat.scala 29:58]
node _T_1616 = cat(_T_1615, _T_1604) @[Cat.scala 29:58]
node _T_1617 = cat(_T_1616, _T_1599) @[Cat.scala 29:58]
node _T_1618 = cat(_T_1617, _T_1594) @[Cat.scala 29:58]
node _T_1619 = cat(_T_1618, _T_1589) @[Cat.scala 29:58]
node _T_1620 = cat(_T_1619, _T_1584) @[Cat.scala 29:58]
node obuf_data_in = cat(_T_1620, _T_1579) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
wire buf_dualhi : UInt<1>[4] @[lsu_bus_buffer.scala 335:24]
buf_dualhi[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 336:14]
buf_dualhi[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 336:14]
buf_dualhi[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 336:14]
buf_dualhi[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 336:14]
node _T_1621 = neq(CmdPtr0, CmdPtr1) @[lsu_bus_buffer.scala 337:30]
node _T_1622 = and(_T_1621, found_cmdptr0) @[lsu_bus_buffer.scala 337:43]
node _T_1623 = and(_T_1622, found_cmdptr1) @[lsu_bus_buffer.scala 337:59]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_1624 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 58:123]
node _T_1625 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 58:123]
node _T_1626 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 58:123]
node _T_1627 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 58:123]
node _T_1628 = mux(_T_1624, buf_state[0], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1629 = mux(_T_1625, buf_state[1], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1630 = mux(_T_1626, buf_state[2], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1631 = mux(_T_1627, buf_state[3], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1632 = or(_T_1628, _T_1629) @[Mux.scala 27:72]
node _T_1633 = or(_T_1632, _T_1630) @[Mux.scala 27:72]
node _T_1634 = or(_T_1633, _T_1631) @[Mux.scala 27:72]
wire _T_1635 : UInt<3> @[Mux.scala 27:72]
_T_1635 <= _T_1634 @[Mux.scala 27:72]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_1636 = eq(_T_1635, UInt<3>("h02")) @[lsu_bus_buffer.scala 337:107]
node _T_1637 = and(_T_1623, _T_1636) @[lsu_bus_buffer.scala 337:75]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_1638 = eq(CmdPtr1, UInt<1>("h00")) @[lsu_bus_buffer.scala 58:123]
node _T_1639 = eq(CmdPtr1, UInt<1>("h01")) @[lsu_bus_buffer.scala 58:123]
node _T_1640 = eq(CmdPtr1, UInt<2>("h02")) @[lsu_bus_buffer.scala 58:123]
node _T_1641 = eq(CmdPtr1, UInt<2>("h03")) @[lsu_bus_buffer.scala 58:123]
node _T_1642 = mux(_T_1638, buf_state[0], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1643 = mux(_T_1639, buf_state[1], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1644 = mux(_T_1640, buf_state[2], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1645 = mux(_T_1641, buf_state[3], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1646 = or(_T_1642, _T_1643) @[Mux.scala 27:72]
node _T_1647 = or(_T_1646, _T_1644) @[Mux.scala 27:72]
node _T_1648 = or(_T_1647, _T_1645) @[Mux.scala 27:72]
wire _T_1649 : UInt<3> @[Mux.scala 27:72]
_T_1649 <= _T_1648 @[Mux.scala 27:72]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_1650 = eq(_T_1649, UInt<3>("h02")) @[lsu_bus_buffer.scala 337:150]
node _T_1651 = and(_T_1637, _T_1650) @[lsu_bus_buffer.scala 337:118]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_1652 = cat(buf_cmd_state_bus_en[3], buf_cmd_state_bus_en[2]) @[Cat.scala 29:58]
node _T_1653 = cat(_T_1652, buf_cmd_state_bus_en[1]) @[Cat.scala 29:58]
node _T_1654 = cat(_T_1653, buf_cmd_state_bus_en[0]) @[Cat.scala 29:58]
node _T_1655 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 57:118]
node _T_1656 = bits(_T_1654, 0, 0) @[lsu_bus_buffer.scala 57:129]
node _T_1657 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 57:118]
node _T_1658 = bits(_T_1654, 1, 1) @[lsu_bus_buffer.scala 57:129]
node _T_1659 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 57:118]
node _T_1660 = bits(_T_1654, 2, 2) @[lsu_bus_buffer.scala 57:129]
node _T_1661 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 57:118]
node _T_1662 = bits(_T_1654, 3, 3) @[lsu_bus_buffer.scala 57:129]
node _T_1663 = mux(_T_1655, _T_1656, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1664 = mux(_T_1657, _T_1658, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1665 = mux(_T_1659, _T_1660, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1666 = mux(_T_1661, _T_1662, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1667 = or(_T_1663, _T_1664) @[Mux.scala 27:72]
node _T_1668 = or(_T_1667, _T_1665) @[Mux.scala 27:72]
node _T_1669 = or(_T_1668, _T_1666) @[Mux.scala 27:72]
wire _T_1670 : UInt<1> @[Mux.scala 27:72]
_T_1670 <= _T_1669 @[Mux.scala 27:72]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_1671 = eq(_T_1670, UInt<1>("h00")) @[lsu_bus_buffer.scala 338:5]
node _T_1672 = and(_T_1651, _T_1671) @[lsu_bus_buffer.scala 337:161]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_1673 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 57:118]
node _T_1674 = bits(buf_sideeffect, 0, 0) @[lsu_bus_buffer.scala 57:129]
node _T_1675 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 57:118]
node _T_1676 = bits(buf_sideeffect, 1, 1) @[lsu_bus_buffer.scala 57:129]
node _T_1677 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 57:118]
node _T_1678 = bits(buf_sideeffect, 2, 2) @[lsu_bus_buffer.scala 57:129]
node _T_1679 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 57:118]
node _T_1680 = bits(buf_sideeffect, 3, 3) @[lsu_bus_buffer.scala 57:129]
node _T_1681 = mux(_T_1673, _T_1674, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1682 = mux(_T_1675, _T_1676, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1683 = mux(_T_1677, _T_1678, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1684 = mux(_T_1679, _T_1680, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1685 = or(_T_1681, _T_1682) @[Mux.scala 27:72]
node _T_1686 = or(_T_1685, _T_1683) @[Mux.scala 27:72]
node _T_1687 = or(_T_1686, _T_1684) @[Mux.scala 27:72]
wire _T_1688 : UInt<1> @[Mux.scala 27:72]
_T_1688 <= _T_1687 @[Mux.scala 27:72]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_1689 = eq(_T_1688, UInt<1>("h00")) @[lsu_bus_buffer.scala 338:87]
node _T_1690 = and(_T_1672, _T_1689) @[lsu_bus_buffer.scala 338:85]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_1691 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 57:118]
node _T_1692 = bits(buf_write, 0, 0) @[lsu_bus_buffer.scala 57:129]
node _T_1693 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 57:118]
node _T_1694 = bits(buf_write, 1, 1) @[lsu_bus_buffer.scala 57:129]
node _T_1695 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 57:118]
node _T_1696 = bits(buf_write, 2, 2) @[lsu_bus_buffer.scala 57:129]
node _T_1697 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 57:118]
node _T_1698 = bits(buf_write, 3, 3) @[lsu_bus_buffer.scala 57:129]
node _T_1699 = mux(_T_1691, _T_1692, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1700 = mux(_T_1693, _T_1694, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1701 = mux(_T_1695, _T_1696, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1702 = mux(_T_1697, _T_1698, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1703 = or(_T_1699, _T_1700) @[Mux.scala 27:72]
node _T_1704 = or(_T_1703, _T_1701) @[Mux.scala 27:72]
node _T_1705 = or(_T_1704, _T_1702) @[Mux.scala 27:72]
wire _T_1706 : UInt<1> @[Mux.scala 27:72]
_T_1706 <= _T_1705 @[Mux.scala 27:72]
node _T_1707 = eq(CmdPtr1, UInt<1>("h00")) @[lsu_bus_buffer.scala 57:118]
node _T_1708 = bits(buf_write, 0, 0) @[lsu_bus_buffer.scala 57:129]
node _T_1709 = eq(CmdPtr1, UInt<1>("h01")) @[lsu_bus_buffer.scala 57:118]
node _T_1710 = bits(buf_write, 1, 1) @[lsu_bus_buffer.scala 57:129]
node _T_1711 = eq(CmdPtr1, UInt<2>("h02")) @[lsu_bus_buffer.scala 57:118]
node _T_1712 = bits(buf_write, 2, 2) @[lsu_bus_buffer.scala 57:129]
node _T_1713 = eq(CmdPtr1, UInt<2>("h03")) @[lsu_bus_buffer.scala 57:118]
node _T_1714 = bits(buf_write, 3, 3) @[lsu_bus_buffer.scala 57:129]
node _T_1715 = mux(_T_1707, _T_1708, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1716 = mux(_T_1709, _T_1710, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1717 = mux(_T_1711, _T_1712, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1718 = mux(_T_1713, _T_1714, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1719 = or(_T_1715, _T_1716) @[Mux.scala 27:72]
node _T_1720 = or(_T_1719, _T_1717) @[Mux.scala 27:72]
node _T_1721 = or(_T_1720, _T_1718) @[Mux.scala 27:72]
wire _T_1722 : UInt<1> @[Mux.scala 27:72]
_T_1722 <= _T_1721 @[Mux.scala 27:72]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_1723 = and(_T_1706, _T_1722) @[lsu_bus_buffer.scala 339:36]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_1724 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 58:123]
node _T_1725 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 58:123]
node _T_1726 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 58:123]
node _T_1727 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 58:123]
node _T_1728 = mux(_T_1724, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1729 = mux(_T_1725, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1730 = mux(_T_1726, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1731 = mux(_T_1727, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1732 = or(_T_1728, _T_1729) @[Mux.scala 27:72]
node _T_1733 = or(_T_1732, _T_1730) @[Mux.scala 27:72]
node _T_1734 = or(_T_1733, _T_1731) @[Mux.scala 27:72]
wire _T_1735 : UInt<32> @[Mux.scala 27:72]
_T_1735 <= _T_1734 @[Mux.scala 27:72]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_1736 = bits(_T_1735, 31, 3) @[lsu_bus_buffer.scala 340:35]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_1737 = eq(CmdPtr1, UInt<1>("h00")) @[lsu_bus_buffer.scala 58:123]
node _T_1738 = eq(CmdPtr1, UInt<1>("h01")) @[lsu_bus_buffer.scala 58:123]
node _T_1739 = eq(CmdPtr1, UInt<2>("h02")) @[lsu_bus_buffer.scala 58:123]
node _T_1740 = eq(CmdPtr1, UInt<2>("h03")) @[lsu_bus_buffer.scala 58:123]
node _T_1741 = mux(_T_1737, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1742 = mux(_T_1738, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1743 = mux(_T_1739, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1744 = mux(_T_1740, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1745 = or(_T_1741, _T_1742) @[Mux.scala 27:72]
node _T_1746 = or(_T_1745, _T_1743) @[Mux.scala 27:72]
node _T_1747 = or(_T_1746, _T_1744) @[Mux.scala 27:72]
wire _T_1748 : UInt<32> @[Mux.scala 27:72]
_T_1748 <= _T_1747 @[Mux.scala 27:72]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_1749 = bits(_T_1748, 31, 3) @[lsu_bus_buffer.scala 340:71]
node _T_1750 = eq(_T_1736, _T_1749) @[lsu_bus_buffer.scala 340:41]
node _T_1751 = and(_T_1723, _T_1750) @[lsu_bus_buffer.scala 339:67]
node _T_1752 = eq(bus_coalescing_disable, UInt<1>("h00")) @[lsu_bus_buffer.scala 340:81]
node _T_1753 = and(_T_1751, _T_1752) @[lsu_bus_buffer.scala 340:79]
node _T_1754 = eq(UInt<1>("h01"), UInt<1>("h00")) @[lsu_bus_buffer.scala 340:107]
node _T_1755 = and(_T_1753, _T_1754) @[lsu_bus_buffer.scala 340:105]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_1756 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 57:118]
node _T_1757 = bits(buf_write, 0, 0) @[lsu_bus_buffer.scala 57:129]
node _T_1758 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 57:118]
node _T_1759 = bits(buf_write, 1, 1) @[lsu_bus_buffer.scala 57:129]
node _T_1760 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 57:118]
node _T_1761 = bits(buf_write, 2, 2) @[lsu_bus_buffer.scala 57:129]
node _T_1762 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 57:118]
node _T_1763 = bits(buf_write, 3, 3) @[lsu_bus_buffer.scala 57:129]
node _T_1764 = mux(_T_1756, _T_1757, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1765 = mux(_T_1758, _T_1759, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1766 = mux(_T_1760, _T_1761, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1767 = mux(_T_1762, _T_1763, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1768 = or(_T_1764, _T_1765) @[Mux.scala 27:72]
node _T_1769 = or(_T_1768, _T_1766) @[Mux.scala 27:72]
node _T_1770 = or(_T_1769, _T_1767) @[Mux.scala 27:72]
wire _T_1771 : UInt<1> @[Mux.scala 27:72]
_T_1771 <= _T_1770 @[Mux.scala 27:72]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_1772 = eq(_T_1771, UInt<1>("h00")) @[lsu_bus_buffer.scala 341:8]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_1773 = cat(buf_dual[3], buf_dual[2]) @[Cat.scala 29:58]
node _T_1774 = cat(_T_1773, buf_dual[1]) @[Cat.scala 29:58]
node _T_1775 = cat(_T_1774, buf_dual[0]) @[Cat.scala 29:58]
node _T_1776 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 57:118]
node _T_1777 = bits(_T_1775, 0, 0) @[lsu_bus_buffer.scala 57:129]
node _T_1778 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 57:118]
node _T_1779 = bits(_T_1775, 1, 1) @[lsu_bus_buffer.scala 57:129]
node _T_1780 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 57:118]
node _T_1781 = bits(_T_1775, 2, 2) @[lsu_bus_buffer.scala 57:129]
node _T_1782 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 57:118]
node _T_1783 = bits(_T_1775, 3, 3) @[lsu_bus_buffer.scala 57:129]
node _T_1784 = mux(_T_1776, _T_1777, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1785 = mux(_T_1778, _T_1779, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1786 = mux(_T_1780, _T_1781, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1787 = mux(_T_1782, _T_1783, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1788 = or(_T_1784, _T_1785) @[Mux.scala 27:72]
node _T_1789 = or(_T_1788, _T_1786) @[Mux.scala 27:72]
node _T_1790 = or(_T_1789, _T_1787) @[Mux.scala 27:72]
wire _T_1791 : UInt<1> @[Mux.scala 27:72]
_T_1791 <= _T_1790 @[Mux.scala 27:72]
Bus Buffer Update
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node _T_1792 = and(_T_1772, _T_1791) @[lsu_bus_buffer.scala 341:38]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_1793 = cat(buf_dualhi[3], buf_dualhi[2]) @[Cat.scala 29:58]
node _T_1794 = cat(_T_1793, buf_dualhi[1]) @[Cat.scala 29:58]
node _T_1795 = cat(_T_1794, buf_dualhi[0]) @[Cat.scala 29:58]
node _T_1796 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 57:118]
node _T_1797 = bits(_T_1795, 0, 0) @[lsu_bus_buffer.scala 57:129]
node _T_1798 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 57:118]
node _T_1799 = bits(_T_1795, 1, 1) @[lsu_bus_buffer.scala 57:129]
node _T_1800 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 57:118]
node _T_1801 = bits(_T_1795, 2, 2) @[lsu_bus_buffer.scala 57:129]
node _T_1802 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 57:118]
node _T_1803 = bits(_T_1795, 3, 3) @[lsu_bus_buffer.scala 57:129]
node _T_1804 = mux(_T_1796, _T_1797, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1805 = mux(_T_1798, _T_1799, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1806 = mux(_T_1800, _T_1801, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1807 = mux(_T_1802, _T_1803, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1808 = or(_T_1804, _T_1805) @[Mux.scala 27:72]
node _T_1809 = or(_T_1808, _T_1806) @[Mux.scala 27:72]
node _T_1810 = or(_T_1809, _T_1807) @[Mux.scala 27:72]
wire _T_1811 : UInt<1> @[Mux.scala 27:72]
_T_1811 <= _T_1810 @[Mux.scala 27:72]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_1812 = eq(_T_1811, UInt<1>("h00")) @[lsu_bus_buffer.scala 341:109]
node _T_1813 = and(_T_1792, _T_1812) @[lsu_bus_buffer.scala 341:107]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_1814 = cat(buf_samedw[3], buf_samedw[2]) @[Cat.scala 29:58]
node _T_1815 = cat(_T_1814, buf_samedw[1]) @[Cat.scala 29:58]
node _T_1816 = cat(_T_1815, buf_samedw[0]) @[Cat.scala 29:58]
node _T_1817 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 57:118]
node _T_1818 = bits(_T_1816, 0, 0) @[lsu_bus_buffer.scala 57:129]
node _T_1819 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 57:118]
node _T_1820 = bits(_T_1816, 1, 1) @[lsu_bus_buffer.scala 57:129]
node _T_1821 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 57:118]
node _T_1822 = bits(_T_1816, 2, 2) @[lsu_bus_buffer.scala 57:129]
node _T_1823 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 57:118]
node _T_1824 = bits(_T_1816, 3, 3) @[lsu_bus_buffer.scala 57:129]
node _T_1825 = mux(_T_1817, _T_1818, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1826 = mux(_T_1819, _T_1820, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1827 = mux(_T_1821, _T_1822, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1828 = mux(_T_1823, _T_1824, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1829 = or(_T_1825, _T_1826) @[Mux.scala 27:72]
node _T_1830 = or(_T_1829, _T_1827) @[Mux.scala 27:72]
node _T_1831 = or(_T_1830, _T_1828) @[Mux.scala 27:72]
wire _T_1832 : UInt<1> @[Mux.scala 27:72]
_T_1832 <= _T_1831 @[Mux.scala 27:72]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_1833 = and(_T_1813, _T_1832) @[lsu_bus_buffer.scala 341:179]
node _T_1834 = or(_T_1755, _T_1833) @[lsu_bus_buffer.scala 340:128]
node _T_1835 = and(_T_1690, _T_1834) @[lsu_bus_buffer.scala 338:122]
node _T_1836 = and(ibuf_buf_byp, ldst_samedw_r) @[lsu_bus_buffer.scala 342:19]
node _T_1837 = and(_T_1836, io.ldst_dual_r) @[lsu_bus_buffer.scala 342:35]
node _T_1838 = or(_T_1835, _T_1837) @[lsu_bus_buffer.scala 341:253]
obuf_merge_en <= _T_1838 @[lsu_bus_buffer.scala 337:17]
reg obuf_wr_enQ : UInt<1>, io.lsu_busm_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_buffer.scala 344:55]
obuf_wr_enQ <= obuf_wr_en @[lsu_bus_buffer.scala 344:55]
node _T_1839 = mux(obuf_wr_en, UInt<1>("h01"), obuf_valid) @[lsu_bus_buffer.scala 345:58]
node _T_1840 = eq(obuf_rst, UInt<1>("h00")) @[lsu_bus_buffer.scala 345:93]
node _T_1841 = and(_T_1839, _T_1840) @[lsu_bus_buffer.scala 345:91]
reg _T_1842 : UInt<1>, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_buffer.scala 345:54]
_T_1842 <= _T_1841 @[lsu_bus_buffer.scala 345:54]
obuf_valid <= _T_1842 @[lsu_bus_buffer.scala 345:14]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_1843 : UInt<1>, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when obuf_wr_en : @[Reg.scala 28:19]
_T_1843 <= obuf_nosend_in @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
obuf_nosend <= _T_1843 @[lsu_bus_buffer.scala 346:15]
reg _T_1844 : UInt<1>, io.lsu_busm_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_buffer.scala 347:54]
_T_1844 <= obuf_cmd_done_in @[lsu_bus_buffer.scala 347:54]
obuf_cmd_done <= _T_1844 @[lsu_bus_buffer.scala 347:17]
reg _T_1845 : UInt<1>, io.lsu_busm_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_buffer.scala 348:55]
_T_1845 <= obuf_data_done_in @[lsu_bus_buffer.scala 348:55]
obuf_data_done <= _T_1845 @[lsu_bus_buffer.scala 348:18]
reg _T_1846 : UInt<1>, io.lsu_busm_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_buffer.scala 349:56]
_T_1846 <= obuf_rdrsp_pend_in @[lsu_bus_buffer.scala 349:56]
obuf_rdrsp_pend <= _T_1846 @[lsu_bus_buffer.scala 349:19]
reg _T_1847 : UInt, io.lsu_busm_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_buffer.scala 350:55]
_T_1847 <= obuf_rdrsp_tag_in @[lsu_bus_buffer.scala 350:55]
obuf_rdrsp_tag <= _T_1847 @[lsu_bus_buffer.scala 350:18]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_1848 : UInt, io.lsu_bus_obuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when obuf_wr_en : @[Reg.scala 28:19]
_T_1848 <= obuf_tag0_in @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
obuf_tag0 <= _T_1848 @[lsu_bus_buffer.scala 351:13]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg obuf_tag1 : UInt, io.lsu_bus_obuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when obuf_wr_en : @[Reg.scala 28:19]
obuf_tag1 <= obuf_tag1_in @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
reg obuf_merge : UInt<1>, io.lsu_bus_obuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when obuf_wr_en : @[Reg.scala 28:19]
obuf_merge <= obuf_merge_en @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
reg _T_1849 : UInt<1>, io.lsu_bus_obuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when obuf_wr_en : @[Reg.scala 28:19]
_T_1849 <= obuf_write_in @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
obuf_write <= _T_1849 @[lsu_bus_buffer.scala 354:14]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_1850 : UInt<1>, io.lsu_bus_obuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when obuf_wr_en : @[Reg.scala 28:19]
_T_1850 <= obuf_sideeffect_in @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
obuf_sideeffect <= _T_1850 @[lsu_bus_buffer.scala 355:19]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg obuf_sz : UInt, io.lsu_bus_obuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when obuf_wr_en : @[Reg.scala 28:19]
obuf_sz <= obuf_sz_in @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
inst rvclkhdr_2 of rvclkhdr_2 @[el2_lib.scala 508:23]
rvclkhdr_2.clock <= clock
rvclkhdr_2.reset <= reset
rvclkhdr_2.io.clk <= clock @[el2_lib.scala 510:18]
rvclkhdr_2.io.en <= obuf_wr_en @[el2_lib.scala 511:17]
rvclkhdr_2.io.scan_mode <= io.scan_mode @[el2_lib.scala 512:24]
reg _T_1851 : UInt, rvclkhdr_2.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 514:16]
_T_1851 <= obuf_addr_in @[el2_lib.scala 514:16]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
obuf_addr <= _T_1851 @[lsu_bus_buffer.scala 357:13]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg obuf_byteen : UInt, io.lsu_bus_obuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when obuf_wr_en : @[Reg.scala 28:19]
obuf_byteen <= obuf_byteen_in @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
inst rvclkhdr_3 of rvclkhdr_3 @[el2_lib.scala 508:23]
rvclkhdr_3.clock <= clock
rvclkhdr_3.reset <= reset
rvclkhdr_3.io.clk <= clock @[el2_lib.scala 510:18]
rvclkhdr_3.io.en <= obuf_wr_en @[el2_lib.scala 511:17]
rvclkhdr_3.io.scan_mode <= io.scan_mode @[el2_lib.scala 512:24]
reg obuf_data : UInt, rvclkhdr_3.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 514:16]
obuf_data <= obuf_data_in @[el2_lib.scala 514:16]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
reg _T_1852 : UInt, io.lsu_busm_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_buffer.scala 360:54]
_T_1852 <= obuf_wr_timer_in @[lsu_bus_buffer.scala 360:54]
obuf_wr_timer <= _T_1852 @[lsu_bus_buffer.scala 360:17]
LSU with Bundling
2020-12-10 12:50:49 +08:00
wire WrPtr0_m : UInt<2>
WrPtr0_m <= UInt<1>("h00")
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_1853 = eq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 363:65]
node _T_1854 = eq(ibuf_tag, UInt<1>("h00")) @[lsu_bus_buffer.scala 364:30]
node _T_1855 = and(ibuf_valid, _T_1854) @[lsu_bus_buffer.scala 364:19]
node _T_1856 = eq(WrPtr0_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 365:18]
node _T_1857 = eq(WrPtr1_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 365:57]
node _T_1858 = and(io.ldst_dual_r, _T_1857) @[lsu_bus_buffer.scala 365:45]
node _T_1859 = or(_T_1856, _T_1858) @[lsu_bus_buffer.scala 365:27]
node _T_1860 = and(io.lsu_busreq_r, _T_1859) @[lsu_bus_buffer.scala 364:58]
node _T_1861 = or(_T_1855, _T_1860) @[lsu_bus_buffer.scala 364:39]
node _T_1862 = eq(_T_1861, UInt<1>("h00")) @[lsu_bus_buffer.scala 364:5]
node _T_1863 = and(_T_1853, _T_1862) @[lsu_bus_buffer.scala 363:76]
node _T_1864 = eq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 363:65]
node _T_1865 = eq(ibuf_tag, UInt<1>("h01")) @[lsu_bus_buffer.scala 364:30]
node _T_1866 = and(ibuf_valid, _T_1865) @[lsu_bus_buffer.scala 364:19]
node _T_1867 = eq(WrPtr0_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 365:18]
node _T_1868 = eq(WrPtr1_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 365:57]
node _T_1869 = and(io.ldst_dual_r, _T_1868) @[lsu_bus_buffer.scala 365:45]
node _T_1870 = or(_T_1867, _T_1869) @[lsu_bus_buffer.scala 365:27]
node _T_1871 = and(io.lsu_busreq_r, _T_1870) @[lsu_bus_buffer.scala 364:58]
node _T_1872 = or(_T_1866, _T_1871) @[lsu_bus_buffer.scala 364:39]
node _T_1873 = eq(_T_1872, UInt<1>("h00")) @[lsu_bus_buffer.scala 364:5]
node _T_1874 = and(_T_1864, _T_1873) @[lsu_bus_buffer.scala 363:76]
node _T_1875 = eq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 363:65]
node _T_1876 = eq(ibuf_tag, UInt<2>("h02")) @[lsu_bus_buffer.scala 364:30]
node _T_1877 = and(ibuf_valid, _T_1876) @[lsu_bus_buffer.scala 364:19]
node _T_1878 = eq(WrPtr0_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 365:18]
node _T_1879 = eq(WrPtr1_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 365:57]
node _T_1880 = and(io.ldst_dual_r, _T_1879) @[lsu_bus_buffer.scala 365:45]
node _T_1881 = or(_T_1878, _T_1880) @[lsu_bus_buffer.scala 365:27]
node _T_1882 = and(io.lsu_busreq_r, _T_1881) @[lsu_bus_buffer.scala 364:58]
node _T_1883 = or(_T_1877, _T_1882) @[lsu_bus_buffer.scala 364:39]
node _T_1884 = eq(_T_1883, UInt<1>("h00")) @[lsu_bus_buffer.scala 364:5]
node _T_1885 = and(_T_1875, _T_1884) @[lsu_bus_buffer.scala 363:76]
node _T_1886 = eq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 363:65]
node _T_1887 = eq(ibuf_tag, UInt<2>("h03")) @[lsu_bus_buffer.scala 364:30]
node _T_1888 = and(ibuf_valid, _T_1887) @[lsu_bus_buffer.scala 364:19]
node _T_1889 = eq(WrPtr0_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 365:18]
node _T_1890 = eq(WrPtr1_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 365:57]
node _T_1891 = and(io.ldst_dual_r, _T_1890) @[lsu_bus_buffer.scala 365:45]
node _T_1892 = or(_T_1889, _T_1891) @[lsu_bus_buffer.scala 365:27]
node _T_1893 = and(io.lsu_busreq_r, _T_1892) @[lsu_bus_buffer.scala 364:58]
node _T_1894 = or(_T_1888, _T_1893) @[lsu_bus_buffer.scala 364:39]
node _T_1895 = eq(_T_1894, UInt<1>("h00")) @[lsu_bus_buffer.scala 364:5]
node _T_1896 = and(_T_1886, _T_1895) @[lsu_bus_buffer.scala 363:76]
LSU with Bundling
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node _T_1897 = mux(_T_1896, UInt<2>("h03"), UInt<2>("h03")) @[Mux.scala 98:16]
node _T_1898 = mux(_T_1885, UInt<2>("h02"), _T_1897) @[Mux.scala 98:16]
node _T_1899 = mux(_T_1874, UInt<1>("h01"), _T_1898) @[Mux.scala 98:16]
node _T_1900 = mux(_T_1863, UInt<1>("h00"), _T_1899) @[Mux.scala 98:16]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
WrPtr0_m <= _T_1900 @[lsu_bus_buffer.scala 363:12]
LSU with Bundling
2020-12-10 12:50:49 +08:00
wire WrPtr1_m : UInt<2>
WrPtr1_m <= UInt<1>("h00")
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_1901 = eq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 369:65]
node _T_1902 = eq(ibuf_tag, UInt<1>("h00")) @[lsu_bus_buffer.scala 369:103]
node _T_1903 = and(ibuf_valid, _T_1902) @[lsu_bus_buffer.scala 369:92]
node _T_1904 = eq(WrPtr0_m, UInt<1>("h00")) @[lsu_bus_buffer.scala 370:33]
node _T_1905 = and(io.lsu_busreq_m, _T_1904) @[lsu_bus_buffer.scala 370:22]
node _T_1906 = or(_T_1903, _T_1905) @[lsu_bus_buffer.scala 369:112]
node _T_1907 = eq(WrPtr0_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 371:36]
node _T_1908 = eq(WrPtr1_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 372:34]
node _T_1909 = and(io.ldst_dual_r, _T_1908) @[lsu_bus_buffer.scala 372:23]
node _T_1910 = or(_T_1907, _T_1909) @[lsu_bus_buffer.scala 371:46]
node _T_1911 = and(io.lsu_busreq_r, _T_1910) @[lsu_bus_buffer.scala 371:22]
node _T_1912 = or(_T_1906, _T_1911) @[lsu_bus_buffer.scala 370:42]
node _T_1913 = eq(_T_1912, UInt<1>("h00")) @[lsu_bus_buffer.scala 369:78]
node _T_1914 = and(_T_1901, _T_1913) @[lsu_bus_buffer.scala 369:76]
node _T_1915 = eq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 369:65]
node _T_1916 = eq(ibuf_tag, UInt<1>("h01")) @[lsu_bus_buffer.scala 369:103]
node _T_1917 = and(ibuf_valid, _T_1916) @[lsu_bus_buffer.scala 369:92]
node _T_1918 = eq(WrPtr0_m, UInt<1>("h01")) @[lsu_bus_buffer.scala 370:33]
node _T_1919 = and(io.lsu_busreq_m, _T_1918) @[lsu_bus_buffer.scala 370:22]
node _T_1920 = or(_T_1917, _T_1919) @[lsu_bus_buffer.scala 369:112]
node _T_1921 = eq(WrPtr0_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 371:36]
node _T_1922 = eq(WrPtr1_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 372:34]
node _T_1923 = and(io.ldst_dual_r, _T_1922) @[lsu_bus_buffer.scala 372:23]
node _T_1924 = or(_T_1921, _T_1923) @[lsu_bus_buffer.scala 371:46]
node _T_1925 = and(io.lsu_busreq_r, _T_1924) @[lsu_bus_buffer.scala 371:22]
node _T_1926 = or(_T_1920, _T_1925) @[lsu_bus_buffer.scala 370:42]
node _T_1927 = eq(_T_1926, UInt<1>("h00")) @[lsu_bus_buffer.scala 369:78]
node _T_1928 = and(_T_1915, _T_1927) @[lsu_bus_buffer.scala 369:76]
node _T_1929 = eq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 369:65]
node _T_1930 = eq(ibuf_tag, UInt<2>("h02")) @[lsu_bus_buffer.scala 369:103]
node _T_1931 = and(ibuf_valid, _T_1930) @[lsu_bus_buffer.scala 369:92]
node _T_1932 = eq(WrPtr0_m, UInt<2>("h02")) @[lsu_bus_buffer.scala 370:33]
node _T_1933 = and(io.lsu_busreq_m, _T_1932) @[lsu_bus_buffer.scala 370:22]
node _T_1934 = or(_T_1931, _T_1933) @[lsu_bus_buffer.scala 369:112]
node _T_1935 = eq(WrPtr0_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 371:36]
node _T_1936 = eq(WrPtr1_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 372:34]
node _T_1937 = and(io.ldst_dual_r, _T_1936) @[lsu_bus_buffer.scala 372:23]
node _T_1938 = or(_T_1935, _T_1937) @[lsu_bus_buffer.scala 371:46]
node _T_1939 = and(io.lsu_busreq_r, _T_1938) @[lsu_bus_buffer.scala 371:22]
node _T_1940 = or(_T_1934, _T_1939) @[lsu_bus_buffer.scala 370:42]
node _T_1941 = eq(_T_1940, UInt<1>("h00")) @[lsu_bus_buffer.scala 369:78]
node _T_1942 = and(_T_1929, _T_1941) @[lsu_bus_buffer.scala 369:76]
node _T_1943 = eq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 369:65]
node _T_1944 = eq(ibuf_tag, UInt<2>("h03")) @[lsu_bus_buffer.scala 369:103]
node _T_1945 = and(ibuf_valid, _T_1944) @[lsu_bus_buffer.scala 369:92]
node _T_1946 = eq(WrPtr0_m, UInt<2>("h03")) @[lsu_bus_buffer.scala 370:33]
node _T_1947 = and(io.lsu_busreq_m, _T_1946) @[lsu_bus_buffer.scala 370:22]
node _T_1948 = or(_T_1945, _T_1947) @[lsu_bus_buffer.scala 369:112]
node _T_1949 = eq(WrPtr0_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 371:36]
node _T_1950 = eq(WrPtr1_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 372:34]
node _T_1951 = and(io.ldst_dual_r, _T_1950) @[lsu_bus_buffer.scala 372:23]
node _T_1952 = or(_T_1949, _T_1951) @[lsu_bus_buffer.scala 371:46]
node _T_1953 = and(io.lsu_busreq_r, _T_1952) @[lsu_bus_buffer.scala 371:22]
node _T_1954 = or(_T_1948, _T_1953) @[lsu_bus_buffer.scala 370:42]
node _T_1955 = eq(_T_1954, UInt<1>("h00")) @[lsu_bus_buffer.scala 369:78]
node _T_1956 = and(_T_1943, _T_1955) @[lsu_bus_buffer.scala 369:76]
LSU with Bundling
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node _T_1957 = mux(_T_1956, UInt<2>("h03"), UInt<2>("h03")) @[Mux.scala 98:16]
node _T_1958 = mux(_T_1942, UInt<2>("h02"), _T_1957) @[Mux.scala 98:16]
node _T_1959 = mux(_T_1928, UInt<1>("h01"), _T_1958) @[Mux.scala 98:16]
node _T_1960 = mux(_T_1914, UInt<1>("h00"), _T_1959) @[Mux.scala 98:16]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
WrPtr1_m <= _T_1960 @[lsu_bus_buffer.scala 369:12]
wire buf_age : UInt<4>[4] @[lsu_bus_buffer.scala 374:21]
buf_age[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 375:11]
buf_age[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 375:11]
buf_age[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 375:11]
buf_age[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 375:11]
node _T_1961 = orr(buf_age[0]) @[lsu_bus_buffer.scala 377:58]
node _T_1962 = eq(_T_1961, UInt<1>("h00")) @[lsu_bus_buffer.scala 377:45]
node _T_1963 = eq(buf_state[0], UInt<3>("h02")) @[lsu_bus_buffer.scala 377:78]
node _T_1964 = and(_T_1962, _T_1963) @[lsu_bus_buffer.scala 377:63]
node _T_1965 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[lsu_bus_buffer.scala 377:90]
node _T_1966 = and(_T_1964, _T_1965) @[lsu_bus_buffer.scala 377:88]
node _T_1967 = orr(buf_age[1]) @[lsu_bus_buffer.scala 377:58]
node _T_1968 = eq(_T_1967, UInt<1>("h00")) @[lsu_bus_buffer.scala 377:45]
node _T_1969 = eq(buf_state[1], UInt<3>("h02")) @[lsu_bus_buffer.scala 377:78]
node _T_1970 = and(_T_1968, _T_1969) @[lsu_bus_buffer.scala 377:63]
node _T_1971 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[lsu_bus_buffer.scala 377:90]
node _T_1972 = and(_T_1970, _T_1971) @[lsu_bus_buffer.scala 377:88]
node _T_1973 = orr(buf_age[2]) @[lsu_bus_buffer.scala 377:58]
node _T_1974 = eq(_T_1973, UInt<1>("h00")) @[lsu_bus_buffer.scala 377:45]
node _T_1975 = eq(buf_state[2], UInt<3>("h02")) @[lsu_bus_buffer.scala 377:78]
node _T_1976 = and(_T_1974, _T_1975) @[lsu_bus_buffer.scala 377:63]
node _T_1977 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[lsu_bus_buffer.scala 377:90]
node _T_1978 = and(_T_1976, _T_1977) @[lsu_bus_buffer.scala 377:88]
node _T_1979 = orr(buf_age[3]) @[lsu_bus_buffer.scala 377:58]
node _T_1980 = eq(_T_1979, UInt<1>("h00")) @[lsu_bus_buffer.scala 377:45]
node _T_1981 = eq(buf_state[3], UInt<3>("h02")) @[lsu_bus_buffer.scala 377:78]
node _T_1982 = and(_T_1980, _T_1981) @[lsu_bus_buffer.scala 377:63]
node _T_1983 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[lsu_bus_buffer.scala 377:90]
node _T_1984 = and(_T_1982, _T_1983) @[lsu_bus_buffer.scala 377:88]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_1985 = cat(_T_1984, _T_1978) @[Cat.scala 29:58]
node _T_1986 = cat(_T_1985, _T_1972) @[Cat.scala 29:58]
node CmdPtr0Dec = cat(_T_1986, _T_1966) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_1987 = not(CmdPtr0Dec) @[lsu_bus_buffer.scala 378:62]
node _T_1988 = and(buf_age[0], _T_1987) @[lsu_bus_buffer.scala 378:59]
node _T_1989 = orr(_T_1988) @[lsu_bus_buffer.scala 378:76]
node _T_1990 = eq(_T_1989, UInt<1>("h00")) @[lsu_bus_buffer.scala 378:45]
node _T_1991 = bits(CmdPtr0Dec, 0, 0) @[lsu_bus_buffer.scala 378:94]
node _T_1992 = eq(_T_1991, UInt<1>("h00")) @[lsu_bus_buffer.scala 378:83]
node _T_1993 = and(_T_1990, _T_1992) @[lsu_bus_buffer.scala 378:81]
node _T_1994 = eq(buf_state[0], UInt<3>("h02")) @[lsu_bus_buffer.scala 378:113]
node _T_1995 = and(_T_1993, _T_1994) @[lsu_bus_buffer.scala 378:98]
node _T_1996 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[lsu_bus_buffer.scala 378:125]
node _T_1997 = and(_T_1995, _T_1996) @[lsu_bus_buffer.scala 378:123]
node _T_1998 = not(CmdPtr0Dec) @[lsu_bus_buffer.scala 378:62]
node _T_1999 = and(buf_age[1], _T_1998) @[lsu_bus_buffer.scala 378:59]
node _T_2000 = orr(_T_1999) @[lsu_bus_buffer.scala 378:76]
node _T_2001 = eq(_T_2000, UInt<1>("h00")) @[lsu_bus_buffer.scala 378:45]
node _T_2002 = bits(CmdPtr0Dec, 1, 1) @[lsu_bus_buffer.scala 378:94]
node _T_2003 = eq(_T_2002, UInt<1>("h00")) @[lsu_bus_buffer.scala 378:83]
node _T_2004 = and(_T_2001, _T_2003) @[lsu_bus_buffer.scala 378:81]
node _T_2005 = eq(buf_state[1], UInt<3>("h02")) @[lsu_bus_buffer.scala 378:113]
node _T_2006 = and(_T_2004, _T_2005) @[lsu_bus_buffer.scala 378:98]
node _T_2007 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[lsu_bus_buffer.scala 378:125]
node _T_2008 = and(_T_2006, _T_2007) @[lsu_bus_buffer.scala 378:123]
node _T_2009 = not(CmdPtr0Dec) @[lsu_bus_buffer.scala 378:62]
node _T_2010 = and(buf_age[2], _T_2009) @[lsu_bus_buffer.scala 378:59]
node _T_2011 = orr(_T_2010) @[lsu_bus_buffer.scala 378:76]
node _T_2012 = eq(_T_2011, UInt<1>("h00")) @[lsu_bus_buffer.scala 378:45]
node _T_2013 = bits(CmdPtr0Dec, 2, 2) @[lsu_bus_buffer.scala 378:94]
node _T_2014 = eq(_T_2013, UInt<1>("h00")) @[lsu_bus_buffer.scala 378:83]
node _T_2015 = and(_T_2012, _T_2014) @[lsu_bus_buffer.scala 378:81]
node _T_2016 = eq(buf_state[2], UInt<3>("h02")) @[lsu_bus_buffer.scala 378:113]
node _T_2017 = and(_T_2015, _T_2016) @[lsu_bus_buffer.scala 378:98]
node _T_2018 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[lsu_bus_buffer.scala 378:125]
node _T_2019 = and(_T_2017, _T_2018) @[lsu_bus_buffer.scala 378:123]
node _T_2020 = not(CmdPtr0Dec) @[lsu_bus_buffer.scala 378:62]
node _T_2021 = and(buf_age[3], _T_2020) @[lsu_bus_buffer.scala 378:59]
node _T_2022 = orr(_T_2021) @[lsu_bus_buffer.scala 378:76]
node _T_2023 = eq(_T_2022, UInt<1>("h00")) @[lsu_bus_buffer.scala 378:45]
node _T_2024 = bits(CmdPtr0Dec, 3, 3) @[lsu_bus_buffer.scala 378:94]
node _T_2025 = eq(_T_2024, UInt<1>("h00")) @[lsu_bus_buffer.scala 378:83]
node _T_2026 = and(_T_2023, _T_2025) @[lsu_bus_buffer.scala 378:81]
node _T_2027 = eq(buf_state[3], UInt<3>("h02")) @[lsu_bus_buffer.scala 378:113]
node _T_2028 = and(_T_2026, _T_2027) @[lsu_bus_buffer.scala 378:98]
node _T_2029 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[lsu_bus_buffer.scala 378:125]
node _T_2030 = and(_T_2028, _T_2029) @[lsu_bus_buffer.scala 378:123]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_2031 = cat(_T_2030, _T_2019) @[Cat.scala 29:58]
node _T_2032 = cat(_T_2031, _T_2008) @[Cat.scala 29:58]
node CmdPtr1Dec = cat(_T_2032, _T_1997) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
wire buf_rsp_pickage : UInt<4>[4] @[lsu_bus_buffer.scala 379:29]
buf_rsp_pickage[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 380:19]
buf_rsp_pickage[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 380:19]
buf_rsp_pickage[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 380:19]
buf_rsp_pickage[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 380:19]
node _T_2033 = orr(buf_rsp_pickage[0]) @[lsu_bus_buffer.scala 381:65]
node _T_2034 = eq(_T_2033, UInt<1>("h00")) @[lsu_bus_buffer.scala 381:44]
node _T_2035 = eq(buf_state[0], UInt<3>("h05")) @[lsu_bus_buffer.scala 381:85]
node _T_2036 = and(_T_2034, _T_2035) @[lsu_bus_buffer.scala 381:70]
node _T_2037 = orr(buf_rsp_pickage[1]) @[lsu_bus_buffer.scala 381:65]
node _T_2038 = eq(_T_2037, UInt<1>("h00")) @[lsu_bus_buffer.scala 381:44]
node _T_2039 = eq(buf_state[1], UInt<3>("h05")) @[lsu_bus_buffer.scala 381:85]
node _T_2040 = and(_T_2038, _T_2039) @[lsu_bus_buffer.scala 381:70]
node _T_2041 = orr(buf_rsp_pickage[2]) @[lsu_bus_buffer.scala 381:65]
node _T_2042 = eq(_T_2041, UInt<1>("h00")) @[lsu_bus_buffer.scala 381:44]
node _T_2043 = eq(buf_state[2], UInt<3>("h05")) @[lsu_bus_buffer.scala 381:85]
node _T_2044 = and(_T_2042, _T_2043) @[lsu_bus_buffer.scala 381:70]
node _T_2045 = orr(buf_rsp_pickage[3]) @[lsu_bus_buffer.scala 381:65]
node _T_2046 = eq(_T_2045, UInt<1>("h00")) @[lsu_bus_buffer.scala 381:44]
node _T_2047 = eq(buf_state[3], UInt<3>("h05")) @[lsu_bus_buffer.scala 381:85]
node _T_2048 = and(_T_2046, _T_2047) @[lsu_bus_buffer.scala 381:70]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_2049 = cat(_T_2048, _T_2044) @[Cat.scala 29:58]
node _T_2050 = cat(_T_2049, _T_2040) @[Cat.scala 29:58]
node RspPtrDec = cat(_T_2050, _T_2036) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_2051 = orr(CmdPtr0Dec) @[lsu_bus_buffer.scala 382:31]
found_cmdptr0 <= _T_2051 @[lsu_bus_buffer.scala 382:17]
node _T_2052 = orr(CmdPtr1Dec) @[lsu_bus_buffer.scala 383:31]
found_cmdptr1 <= _T_2052 @[lsu_bus_buffer.scala 383:17]
LSU with Bundling
2020-12-10 12:50:49 +08:00
wire RspPtr : UInt<2>
RspPtr <= UInt<1>("h00")
node _T_2053 = mux(UInt<1>("h00"), UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12]
node _T_2054 = cat(_T_2053, CmdPtr0Dec) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_2055 = bits(_T_2054, 4, 4) @[lsu_bus_buffer.scala 385:39]
node _T_2056 = bits(_T_2054, 5, 5) @[lsu_bus_buffer.scala 385:45]
node _T_2057 = or(_T_2055, _T_2056) @[lsu_bus_buffer.scala 385:42]
node _T_2058 = bits(_T_2054, 6, 6) @[lsu_bus_buffer.scala 385:51]
node _T_2059 = or(_T_2057, _T_2058) @[lsu_bus_buffer.scala 385:48]
node _T_2060 = bits(_T_2054, 7, 7) @[lsu_bus_buffer.scala 385:57]
node _T_2061 = or(_T_2059, _T_2060) @[lsu_bus_buffer.scala 385:54]
node _T_2062 = bits(_T_2054, 2, 2) @[lsu_bus_buffer.scala 385:64]
node _T_2063 = bits(_T_2054, 3, 3) @[lsu_bus_buffer.scala 385:70]
node _T_2064 = or(_T_2062, _T_2063) @[lsu_bus_buffer.scala 385:67]
node _T_2065 = bits(_T_2054, 6, 6) @[lsu_bus_buffer.scala 385:76]
node _T_2066 = or(_T_2064, _T_2065) @[lsu_bus_buffer.scala 385:73]
node _T_2067 = bits(_T_2054, 7, 7) @[lsu_bus_buffer.scala 385:82]
node _T_2068 = or(_T_2066, _T_2067) @[lsu_bus_buffer.scala 385:79]
node _T_2069 = bits(_T_2054, 1, 1) @[lsu_bus_buffer.scala 385:89]
node _T_2070 = bits(_T_2054, 3, 3) @[lsu_bus_buffer.scala 385:95]
node _T_2071 = or(_T_2069, _T_2070) @[lsu_bus_buffer.scala 385:92]
node _T_2072 = bits(_T_2054, 5, 5) @[lsu_bus_buffer.scala 385:101]
node _T_2073 = or(_T_2071, _T_2072) @[lsu_bus_buffer.scala 385:98]
node _T_2074 = bits(_T_2054, 7, 7) @[lsu_bus_buffer.scala 385:107]
node _T_2075 = or(_T_2073, _T_2074) @[lsu_bus_buffer.scala 385:104]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_2076 = cat(_T_2061, _T_2068) @[Cat.scala 29:58]
node _T_2077 = cat(_T_2076, _T_2075) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
CmdPtr0 <= _T_2077 @[lsu_bus_buffer.scala 390:11]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_2078 = mux(UInt<1>("h00"), UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12]
node _T_2079 = cat(_T_2078, CmdPtr1Dec) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_2080 = bits(_T_2079, 4, 4) @[lsu_bus_buffer.scala 385:39]
node _T_2081 = bits(_T_2079, 5, 5) @[lsu_bus_buffer.scala 385:45]
node _T_2082 = or(_T_2080, _T_2081) @[lsu_bus_buffer.scala 385:42]
node _T_2083 = bits(_T_2079, 6, 6) @[lsu_bus_buffer.scala 385:51]
node _T_2084 = or(_T_2082, _T_2083) @[lsu_bus_buffer.scala 385:48]
node _T_2085 = bits(_T_2079, 7, 7) @[lsu_bus_buffer.scala 385:57]
node _T_2086 = or(_T_2084, _T_2085) @[lsu_bus_buffer.scala 385:54]
node _T_2087 = bits(_T_2079, 2, 2) @[lsu_bus_buffer.scala 385:64]
node _T_2088 = bits(_T_2079, 3, 3) @[lsu_bus_buffer.scala 385:70]
node _T_2089 = or(_T_2087, _T_2088) @[lsu_bus_buffer.scala 385:67]
node _T_2090 = bits(_T_2079, 6, 6) @[lsu_bus_buffer.scala 385:76]
node _T_2091 = or(_T_2089, _T_2090) @[lsu_bus_buffer.scala 385:73]
node _T_2092 = bits(_T_2079, 7, 7) @[lsu_bus_buffer.scala 385:82]
node _T_2093 = or(_T_2091, _T_2092) @[lsu_bus_buffer.scala 385:79]
node _T_2094 = bits(_T_2079, 1, 1) @[lsu_bus_buffer.scala 385:89]
node _T_2095 = bits(_T_2079, 3, 3) @[lsu_bus_buffer.scala 385:95]
node _T_2096 = or(_T_2094, _T_2095) @[lsu_bus_buffer.scala 385:92]
node _T_2097 = bits(_T_2079, 5, 5) @[lsu_bus_buffer.scala 385:101]
node _T_2098 = or(_T_2096, _T_2097) @[lsu_bus_buffer.scala 385:98]
node _T_2099 = bits(_T_2079, 7, 7) @[lsu_bus_buffer.scala 385:107]
node _T_2100 = or(_T_2098, _T_2099) @[lsu_bus_buffer.scala 385:104]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_2101 = cat(_T_2086, _T_2093) @[Cat.scala 29:58]
node _T_2102 = cat(_T_2101, _T_2100) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
CmdPtr1 <= _T_2102 @[lsu_bus_buffer.scala 392:11]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_2103 = mux(UInt<1>("h00"), UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12]
node _T_2104 = cat(_T_2103, RspPtrDec) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_2105 = bits(_T_2104, 4, 4) @[lsu_bus_buffer.scala 385:39]
node _T_2106 = bits(_T_2104, 5, 5) @[lsu_bus_buffer.scala 385:45]
node _T_2107 = or(_T_2105, _T_2106) @[lsu_bus_buffer.scala 385:42]
node _T_2108 = bits(_T_2104, 6, 6) @[lsu_bus_buffer.scala 385:51]
node _T_2109 = or(_T_2107, _T_2108) @[lsu_bus_buffer.scala 385:48]
node _T_2110 = bits(_T_2104, 7, 7) @[lsu_bus_buffer.scala 385:57]
node _T_2111 = or(_T_2109, _T_2110) @[lsu_bus_buffer.scala 385:54]
node _T_2112 = bits(_T_2104, 2, 2) @[lsu_bus_buffer.scala 385:64]
node _T_2113 = bits(_T_2104, 3, 3) @[lsu_bus_buffer.scala 385:70]
node _T_2114 = or(_T_2112, _T_2113) @[lsu_bus_buffer.scala 385:67]
node _T_2115 = bits(_T_2104, 6, 6) @[lsu_bus_buffer.scala 385:76]
node _T_2116 = or(_T_2114, _T_2115) @[lsu_bus_buffer.scala 385:73]
node _T_2117 = bits(_T_2104, 7, 7) @[lsu_bus_buffer.scala 385:82]
node _T_2118 = or(_T_2116, _T_2117) @[lsu_bus_buffer.scala 385:79]
node _T_2119 = bits(_T_2104, 1, 1) @[lsu_bus_buffer.scala 385:89]
node _T_2120 = bits(_T_2104, 3, 3) @[lsu_bus_buffer.scala 385:95]
node _T_2121 = or(_T_2119, _T_2120) @[lsu_bus_buffer.scala 385:92]
node _T_2122 = bits(_T_2104, 5, 5) @[lsu_bus_buffer.scala 385:101]
node _T_2123 = or(_T_2121, _T_2122) @[lsu_bus_buffer.scala 385:98]
node _T_2124 = bits(_T_2104, 7, 7) @[lsu_bus_buffer.scala 385:107]
node _T_2125 = or(_T_2123, _T_2124) @[lsu_bus_buffer.scala 385:104]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_2126 = cat(_T_2111, _T_2118) @[Cat.scala 29:58]
node _T_2127 = cat(_T_2126, _T_2125) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
RspPtr <= _T_2127 @[lsu_bus_buffer.scala 393:10]
wire buf_state_en : UInt<1>[4] @[lsu_bus_buffer.scala 394:26]
buf_state_en[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 395:16]
buf_state_en[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 395:16]
buf_state_en[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 395:16]
buf_state_en[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 395:16]
wire buf_rspageQ : UInt<4>[4] @[lsu_bus_buffer.scala 396:25]
buf_rspageQ[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 397:15]
buf_rspageQ[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 397:15]
buf_rspageQ[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 397:15]
buf_rspageQ[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 397:15]
wire buf_rspage_set : UInt<4>[4] @[lsu_bus_buffer.scala 398:28]
buf_rspage_set[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 399:18]
buf_rspage_set[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 399:18]
buf_rspage_set[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 399:18]
buf_rspage_set[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 399:18]
wire buf_rspage_in : UInt<4>[4] @[lsu_bus_buffer.scala 400:27]
buf_rspage_in[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 401:17]
buf_rspage_in[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 401:17]
buf_rspage_in[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 401:17]
buf_rspage_in[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 401:17]
wire buf_rspage : UInt<4>[4] @[lsu_bus_buffer.scala 402:24]
buf_rspage[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 403:14]
buf_rspage[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 403:14]
buf_rspage[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 403:14]
buf_rspage[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 403:14]
node _T_2128 = eq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 405:83]
node _T_2129 = and(_T_2128, buf_state_en[0]) @[lsu_bus_buffer.scala 405:94]
node _T_2130 = eq(buf_state[0], UInt<3>("h01")) @[lsu_bus_buffer.scala 406:20]
node _T_2131 = eq(buf_state[0], UInt<3>("h02")) @[lsu_bus_buffer.scala 406:47]
node _T_2132 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[lsu_bus_buffer.scala 406:59]
node _T_2133 = and(_T_2131, _T_2132) @[lsu_bus_buffer.scala 406:57]
node _T_2134 = or(_T_2130, _T_2133) @[lsu_bus_buffer.scala 406:31]
node _T_2135 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 407:23]
node _T_2136 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 407:53]
node _T_2137 = and(_T_2135, _T_2136) @[lsu_bus_buffer.scala 407:41]
node _T_2138 = eq(WrPtr0_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 407:83]
node _T_2139 = and(_T_2137, _T_2138) @[lsu_bus_buffer.scala 407:71]
node _T_2140 = eq(ibuf_tag, UInt<1>("h00")) @[lsu_bus_buffer.scala 407:104]
node _T_2141 = and(_T_2139, _T_2140) @[lsu_bus_buffer.scala 407:92]
node _T_2142 = or(_T_2134, _T_2141) @[lsu_bus_buffer.scala 406:86]
node _T_2143 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 408:17]
node _T_2144 = and(_T_2143, io.ldst_dual_r) @[lsu_bus_buffer.scala 408:35]
node _T_2145 = eq(WrPtr1_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 408:64]
node _T_2146 = and(_T_2144, _T_2145) @[lsu_bus_buffer.scala 408:52]
node _T_2147 = eq(WrPtr0_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 408:85]
node _T_2148 = and(_T_2146, _T_2147) @[lsu_bus_buffer.scala 408:73]
node _T_2149 = or(_T_2142, _T_2148) @[lsu_bus_buffer.scala 407:114]
node _T_2150 = and(_T_2129, _T_2149) @[lsu_bus_buffer.scala 405:113]
node _T_2151 = bits(buf_age[0], 0, 0) @[lsu_bus_buffer.scala 408:109]
node _T_2152 = or(_T_2150, _T_2151) @[lsu_bus_buffer.scala 408:97]
node _T_2153 = eq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 405:83]
node _T_2154 = and(_T_2153, buf_state_en[0]) @[lsu_bus_buffer.scala 405:94]
node _T_2155 = eq(buf_state[1], UInt<3>("h01")) @[lsu_bus_buffer.scala 406:20]
node _T_2156 = eq(buf_state[1], UInt<3>("h02")) @[lsu_bus_buffer.scala 406:47]
node _T_2157 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[lsu_bus_buffer.scala 406:59]
node _T_2158 = and(_T_2156, _T_2157) @[lsu_bus_buffer.scala 406:57]
node _T_2159 = or(_T_2155, _T_2158) @[lsu_bus_buffer.scala 406:31]
node _T_2160 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 407:23]
node _T_2161 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 407:53]
node _T_2162 = and(_T_2160, _T_2161) @[lsu_bus_buffer.scala 407:41]
node _T_2163 = eq(WrPtr0_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 407:83]
node _T_2164 = and(_T_2162, _T_2163) @[lsu_bus_buffer.scala 407:71]
node _T_2165 = eq(ibuf_tag, UInt<1>("h01")) @[lsu_bus_buffer.scala 407:104]
node _T_2166 = and(_T_2164, _T_2165) @[lsu_bus_buffer.scala 407:92]
node _T_2167 = or(_T_2159, _T_2166) @[lsu_bus_buffer.scala 406:86]
node _T_2168 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 408:17]
node _T_2169 = and(_T_2168, io.ldst_dual_r) @[lsu_bus_buffer.scala 408:35]
node _T_2170 = eq(WrPtr1_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 408:64]
node _T_2171 = and(_T_2169, _T_2170) @[lsu_bus_buffer.scala 408:52]
node _T_2172 = eq(WrPtr0_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 408:85]
node _T_2173 = and(_T_2171, _T_2172) @[lsu_bus_buffer.scala 408:73]
node _T_2174 = or(_T_2167, _T_2173) @[lsu_bus_buffer.scala 407:114]
node _T_2175 = and(_T_2154, _T_2174) @[lsu_bus_buffer.scala 405:113]
node _T_2176 = bits(buf_age[0], 1, 1) @[lsu_bus_buffer.scala 408:109]
node _T_2177 = or(_T_2175, _T_2176) @[lsu_bus_buffer.scala 408:97]
node _T_2178 = eq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 405:83]
node _T_2179 = and(_T_2178, buf_state_en[0]) @[lsu_bus_buffer.scala 405:94]
node _T_2180 = eq(buf_state[2], UInt<3>("h01")) @[lsu_bus_buffer.scala 406:20]
node _T_2181 = eq(buf_state[2], UInt<3>("h02")) @[lsu_bus_buffer.scala 406:47]
node _T_2182 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[lsu_bus_buffer.scala 406:59]
node _T_2183 = and(_T_2181, _T_2182) @[lsu_bus_buffer.scala 406:57]
node _T_2184 = or(_T_2180, _T_2183) @[lsu_bus_buffer.scala 406:31]
node _T_2185 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 407:23]
node _T_2186 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 407:53]
node _T_2187 = and(_T_2185, _T_2186) @[lsu_bus_buffer.scala 407:41]
node _T_2188 = eq(WrPtr0_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 407:83]
node _T_2189 = and(_T_2187, _T_2188) @[lsu_bus_buffer.scala 407:71]
node _T_2190 = eq(ibuf_tag, UInt<2>("h02")) @[lsu_bus_buffer.scala 407:104]
node _T_2191 = and(_T_2189, _T_2190) @[lsu_bus_buffer.scala 407:92]
node _T_2192 = or(_T_2184, _T_2191) @[lsu_bus_buffer.scala 406:86]
node _T_2193 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 408:17]
node _T_2194 = and(_T_2193, io.ldst_dual_r) @[lsu_bus_buffer.scala 408:35]
node _T_2195 = eq(WrPtr1_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 408:64]
node _T_2196 = and(_T_2194, _T_2195) @[lsu_bus_buffer.scala 408:52]
node _T_2197 = eq(WrPtr0_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 408:85]
node _T_2198 = and(_T_2196, _T_2197) @[lsu_bus_buffer.scala 408:73]
node _T_2199 = or(_T_2192, _T_2198) @[lsu_bus_buffer.scala 407:114]
node _T_2200 = and(_T_2179, _T_2199) @[lsu_bus_buffer.scala 405:113]
node _T_2201 = bits(buf_age[0], 2, 2) @[lsu_bus_buffer.scala 408:109]
node _T_2202 = or(_T_2200, _T_2201) @[lsu_bus_buffer.scala 408:97]
node _T_2203 = eq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 405:83]
node _T_2204 = and(_T_2203, buf_state_en[0]) @[lsu_bus_buffer.scala 405:94]
node _T_2205 = eq(buf_state[3], UInt<3>("h01")) @[lsu_bus_buffer.scala 406:20]
node _T_2206 = eq(buf_state[3], UInt<3>("h02")) @[lsu_bus_buffer.scala 406:47]
node _T_2207 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[lsu_bus_buffer.scala 406:59]
node _T_2208 = and(_T_2206, _T_2207) @[lsu_bus_buffer.scala 406:57]
node _T_2209 = or(_T_2205, _T_2208) @[lsu_bus_buffer.scala 406:31]
node _T_2210 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 407:23]
node _T_2211 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 407:53]
node _T_2212 = and(_T_2210, _T_2211) @[lsu_bus_buffer.scala 407:41]
node _T_2213 = eq(WrPtr0_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 407:83]
node _T_2214 = and(_T_2212, _T_2213) @[lsu_bus_buffer.scala 407:71]
node _T_2215 = eq(ibuf_tag, UInt<2>("h03")) @[lsu_bus_buffer.scala 407:104]
node _T_2216 = and(_T_2214, _T_2215) @[lsu_bus_buffer.scala 407:92]
node _T_2217 = or(_T_2209, _T_2216) @[lsu_bus_buffer.scala 406:86]
node _T_2218 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 408:17]
node _T_2219 = and(_T_2218, io.ldst_dual_r) @[lsu_bus_buffer.scala 408:35]
node _T_2220 = eq(WrPtr1_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 408:64]
node _T_2221 = and(_T_2219, _T_2220) @[lsu_bus_buffer.scala 408:52]
node _T_2222 = eq(WrPtr0_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 408:85]
node _T_2223 = and(_T_2221, _T_2222) @[lsu_bus_buffer.scala 408:73]
node _T_2224 = or(_T_2217, _T_2223) @[lsu_bus_buffer.scala 407:114]
node _T_2225 = and(_T_2204, _T_2224) @[lsu_bus_buffer.scala 405:113]
node _T_2226 = bits(buf_age[0], 3, 3) @[lsu_bus_buffer.scala 408:109]
node _T_2227 = or(_T_2225, _T_2226) @[lsu_bus_buffer.scala 408:97]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_2228 = cat(_T_2227, _T_2202) @[Cat.scala 29:58]
node _T_2229 = cat(_T_2228, _T_2177) @[Cat.scala 29:58]
node buf_age_in_0 = cat(_T_2229, _T_2152) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_2230 = eq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 405:83]
node _T_2231 = and(_T_2230, buf_state_en[1]) @[lsu_bus_buffer.scala 405:94]
node _T_2232 = eq(buf_state[0], UInt<3>("h01")) @[lsu_bus_buffer.scala 406:20]
node _T_2233 = eq(buf_state[0], UInt<3>("h02")) @[lsu_bus_buffer.scala 406:47]
node _T_2234 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[lsu_bus_buffer.scala 406:59]
node _T_2235 = and(_T_2233, _T_2234) @[lsu_bus_buffer.scala 406:57]
node _T_2236 = or(_T_2232, _T_2235) @[lsu_bus_buffer.scala 406:31]
node _T_2237 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 407:23]
node _T_2238 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 407:53]
node _T_2239 = and(_T_2237, _T_2238) @[lsu_bus_buffer.scala 407:41]
node _T_2240 = eq(WrPtr0_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 407:83]
node _T_2241 = and(_T_2239, _T_2240) @[lsu_bus_buffer.scala 407:71]
node _T_2242 = eq(ibuf_tag, UInt<1>("h00")) @[lsu_bus_buffer.scala 407:104]
node _T_2243 = and(_T_2241, _T_2242) @[lsu_bus_buffer.scala 407:92]
node _T_2244 = or(_T_2236, _T_2243) @[lsu_bus_buffer.scala 406:86]
node _T_2245 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 408:17]
node _T_2246 = and(_T_2245, io.ldst_dual_r) @[lsu_bus_buffer.scala 408:35]
node _T_2247 = eq(WrPtr1_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 408:64]
node _T_2248 = and(_T_2246, _T_2247) @[lsu_bus_buffer.scala 408:52]
node _T_2249 = eq(WrPtr0_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 408:85]
node _T_2250 = and(_T_2248, _T_2249) @[lsu_bus_buffer.scala 408:73]
node _T_2251 = or(_T_2244, _T_2250) @[lsu_bus_buffer.scala 407:114]
node _T_2252 = and(_T_2231, _T_2251) @[lsu_bus_buffer.scala 405:113]
node _T_2253 = bits(buf_age[1], 0, 0) @[lsu_bus_buffer.scala 408:109]
node _T_2254 = or(_T_2252, _T_2253) @[lsu_bus_buffer.scala 408:97]
node _T_2255 = eq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 405:83]
node _T_2256 = and(_T_2255, buf_state_en[1]) @[lsu_bus_buffer.scala 405:94]
node _T_2257 = eq(buf_state[1], UInt<3>("h01")) @[lsu_bus_buffer.scala 406:20]
node _T_2258 = eq(buf_state[1], UInt<3>("h02")) @[lsu_bus_buffer.scala 406:47]
node _T_2259 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[lsu_bus_buffer.scala 406:59]
node _T_2260 = and(_T_2258, _T_2259) @[lsu_bus_buffer.scala 406:57]
node _T_2261 = or(_T_2257, _T_2260) @[lsu_bus_buffer.scala 406:31]
node _T_2262 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 407:23]
node _T_2263 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 407:53]
node _T_2264 = and(_T_2262, _T_2263) @[lsu_bus_buffer.scala 407:41]
node _T_2265 = eq(WrPtr0_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 407:83]
node _T_2266 = and(_T_2264, _T_2265) @[lsu_bus_buffer.scala 407:71]
node _T_2267 = eq(ibuf_tag, UInt<1>("h01")) @[lsu_bus_buffer.scala 407:104]
node _T_2268 = and(_T_2266, _T_2267) @[lsu_bus_buffer.scala 407:92]
node _T_2269 = or(_T_2261, _T_2268) @[lsu_bus_buffer.scala 406:86]
node _T_2270 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 408:17]
node _T_2271 = and(_T_2270, io.ldst_dual_r) @[lsu_bus_buffer.scala 408:35]
node _T_2272 = eq(WrPtr1_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 408:64]
node _T_2273 = and(_T_2271, _T_2272) @[lsu_bus_buffer.scala 408:52]
node _T_2274 = eq(WrPtr0_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 408:85]
node _T_2275 = and(_T_2273, _T_2274) @[lsu_bus_buffer.scala 408:73]
node _T_2276 = or(_T_2269, _T_2275) @[lsu_bus_buffer.scala 407:114]
node _T_2277 = and(_T_2256, _T_2276) @[lsu_bus_buffer.scala 405:113]
node _T_2278 = bits(buf_age[1], 1, 1) @[lsu_bus_buffer.scala 408:109]
node _T_2279 = or(_T_2277, _T_2278) @[lsu_bus_buffer.scala 408:97]
node _T_2280 = eq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 405:83]
node _T_2281 = and(_T_2280, buf_state_en[1]) @[lsu_bus_buffer.scala 405:94]
node _T_2282 = eq(buf_state[2], UInt<3>("h01")) @[lsu_bus_buffer.scala 406:20]
node _T_2283 = eq(buf_state[2], UInt<3>("h02")) @[lsu_bus_buffer.scala 406:47]
node _T_2284 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[lsu_bus_buffer.scala 406:59]
node _T_2285 = and(_T_2283, _T_2284) @[lsu_bus_buffer.scala 406:57]
node _T_2286 = or(_T_2282, _T_2285) @[lsu_bus_buffer.scala 406:31]
node _T_2287 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 407:23]
node _T_2288 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 407:53]
node _T_2289 = and(_T_2287, _T_2288) @[lsu_bus_buffer.scala 407:41]
node _T_2290 = eq(WrPtr0_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 407:83]
node _T_2291 = and(_T_2289, _T_2290) @[lsu_bus_buffer.scala 407:71]
node _T_2292 = eq(ibuf_tag, UInt<2>("h02")) @[lsu_bus_buffer.scala 407:104]
node _T_2293 = and(_T_2291, _T_2292) @[lsu_bus_buffer.scala 407:92]
node _T_2294 = or(_T_2286, _T_2293) @[lsu_bus_buffer.scala 406:86]
node _T_2295 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 408:17]
node _T_2296 = and(_T_2295, io.ldst_dual_r) @[lsu_bus_buffer.scala 408:35]
node _T_2297 = eq(WrPtr1_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 408:64]
node _T_2298 = and(_T_2296, _T_2297) @[lsu_bus_buffer.scala 408:52]
node _T_2299 = eq(WrPtr0_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 408:85]
node _T_2300 = and(_T_2298, _T_2299) @[lsu_bus_buffer.scala 408:73]
node _T_2301 = or(_T_2294, _T_2300) @[lsu_bus_buffer.scala 407:114]
node _T_2302 = and(_T_2281, _T_2301) @[lsu_bus_buffer.scala 405:113]
node _T_2303 = bits(buf_age[1], 2, 2) @[lsu_bus_buffer.scala 408:109]
node _T_2304 = or(_T_2302, _T_2303) @[lsu_bus_buffer.scala 408:97]
node _T_2305 = eq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 405:83]
node _T_2306 = and(_T_2305, buf_state_en[1]) @[lsu_bus_buffer.scala 405:94]
node _T_2307 = eq(buf_state[3], UInt<3>("h01")) @[lsu_bus_buffer.scala 406:20]
node _T_2308 = eq(buf_state[3], UInt<3>("h02")) @[lsu_bus_buffer.scala 406:47]
node _T_2309 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[lsu_bus_buffer.scala 406:59]
node _T_2310 = and(_T_2308, _T_2309) @[lsu_bus_buffer.scala 406:57]
node _T_2311 = or(_T_2307, _T_2310) @[lsu_bus_buffer.scala 406:31]
node _T_2312 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 407:23]
node _T_2313 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 407:53]
node _T_2314 = and(_T_2312, _T_2313) @[lsu_bus_buffer.scala 407:41]
node _T_2315 = eq(WrPtr0_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 407:83]
node _T_2316 = and(_T_2314, _T_2315) @[lsu_bus_buffer.scala 407:71]
node _T_2317 = eq(ibuf_tag, UInt<2>("h03")) @[lsu_bus_buffer.scala 407:104]
node _T_2318 = and(_T_2316, _T_2317) @[lsu_bus_buffer.scala 407:92]
node _T_2319 = or(_T_2311, _T_2318) @[lsu_bus_buffer.scala 406:86]
node _T_2320 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 408:17]
node _T_2321 = and(_T_2320, io.ldst_dual_r) @[lsu_bus_buffer.scala 408:35]
node _T_2322 = eq(WrPtr1_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 408:64]
node _T_2323 = and(_T_2321, _T_2322) @[lsu_bus_buffer.scala 408:52]
node _T_2324 = eq(WrPtr0_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 408:85]
node _T_2325 = and(_T_2323, _T_2324) @[lsu_bus_buffer.scala 408:73]
node _T_2326 = or(_T_2319, _T_2325) @[lsu_bus_buffer.scala 407:114]
node _T_2327 = and(_T_2306, _T_2326) @[lsu_bus_buffer.scala 405:113]
node _T_2328 = bits(buf_age[1], 3, 3) @[lsu_bus_buffer.scala 408:109]
node _T_2329 = or(_T_2327, _T_2328) @[lsu_bus_buffer.scala 408:97]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_2330 = cat(_T_2329, _T_2304) @[Cat.scala 29:58]
node _T_2331 = cat(_T_2330, _T_2279) @[Cat.scala 29:58]
node buf_age_in_1 = cat(_T_2331, _T_2254) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_2332 = eq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 405:83]
node _T_2333 = and(_T_2332, buf_state_en[2]) @[lsu_bus_buffer.scala 405:94]
node _T_2334 = eq(buf_state[0], UInt<3>("h01")) @[lsu_bus_buffer.scala 406:20]
node _T_2335 = eq(buf_state[0], UInt<3>("h02")) @[lsu_bus_buffer.scala 406:47]
node _T_2336 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[lsu_bus_buffer.scala 406:59]
node _T_2337 = and(_T_2335, _T_2336) @[lsu_bus_buffer.scala 406:57]
node _T_2338 = or(_T_2334, _T_2337) @[lsu_bus_buffer.scala 406:31]
node _T_2339 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 407:23]
node _T_2340 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 407:53]
node _T_2341 = and(_T_2339, _T_2340) @[lsu_bus_buffer.scala 407:41]
node _T_2342 = eq(WrPtr0_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 407:83]
node _T_2343 = and(_T_2341, _T_2342) @[lsu_bus_buffer.scala 407:71]
node _T_2344 = eq(ibuf_tag, UInt<1>("h00")) @[lsu_bus_buffer.scala 407:104]
node _T_2345 = and(_T_2343, _T_2344) @[lsu_bus_buffer.scala 407:92]
node _T_2346 = or(_T_2338, _T_2345) @[lsu_bus_buffer.scala 406:86]
node _T_2347 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 408:17]
node _T_2348 = and(_T_2347, io.ldst_dual_r) @[lsu_bus_buffer.scala 408:35]
node _T_2349 = eq(WrPtr1_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 408:64]
node _T_2350 = and(_T_2348, _T_2349) @[lsu_bus_buffer.scala 408:52]
node _T_2351 = eq(WrPtr0_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 408:85]
node _T_2352 = and(_T_2350, _T_2351) @[lsu_bus_buffer.scala 408:73]
node _T_2353 = or(_T_2346, _T_2352) @[lsu_bus_buffer.scala 407:114]
node _T_2354 = and(_T_2333, _T_2353) @[lsu_bus_buffer.scala 405:113]
node _T_2355 = bits(buf_age[2], 0, 0) @[lsu_bus_buffer.scala 408:109]
node _T_2356 = or(_T_2354, _T_2355) @[lsu_bus_buffer.scala 408:97]
node _T_2357 = eq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 405:83]
node _T_2358 = and(_T_2357, buf_state_en[2]) @[lsu_bus_buffer.scala 405:94]
node _T_2359 = eq(buf_state[1], UInt<3>("h01")) @[lsu_bus_buffer.scala 406:20]
node _T_2360 = eq(buf_state[1], UInt<3>("h02")) @[lsu_bus_buffer.scala 406:47]
node _T_2361 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[lsu_bus_buffer.scala 406:59]
node _T_2362 = and(_T_2360, _T_2361) @[lsu_bus_buffer.scala 406:57]
node _T_2363 = or(_T_2359, _T_2362) @[lsu_bus_buffer.scala 406:31]
node _T_2364 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 407:23]
node _T_2365 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 407:53]
node _T_2366 = and(_T_2364, _T_2365) @[lsu_bus_buffer.scala 407:41]
node _T_2367 = eq(WrPtr0_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 407:83]
node _T_2368 = and(_T_2366, _T_2367) @[lsu_bus_buffer.scala 407:71]
node _T_2369 = eq(ibuf_tag, UInt<1>("h01")) @[lsu_bus_buffer.scala 407:104]
node _T_2370 = and(_T_2368, _T_2369) @[lsu_bus_buffer.scala 407:92]
node _T_2371 = or(_T_2363, _T_2370) @[lsu_bus_buffer.scala 406:86]
node _T_2372 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 408:17]
node _T_2373 = and(_T_2372, io.ldst_dual_r) @[lsu_bus_buffer.scala 408:35]
node _T_2374 = eq(WrPtr1_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 408:64]
node _T_2375 = and(_T_2373, _T_2374) @[lsu_bus_buffer.scala 408:52]
node _T_2376 = eq(WrPtr0_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 408:85]
node _T_2377 = and(_T_2375, _T_2376) @[lsu_bus_buffer.scala 408:73]
node _T_2378 = or(_T_2371, _T_2377) @[lsu_bus_buffer.scala 407:114]
node _T_2379 = and(_T_2358, _T_2378) @[lsu_bus_buffer.scala 405:113]
node _T_2380 = bits(buf_age[2], 1, 1) @[lsu_bus_buffer.scala 408:109]
node _T_2381 = or(_T_2379, _T_2380) @[lsu_bus_buffer.scala 408:97]
node _T_2382 = eq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 405:83]
node _T_2383 = and(_T_2382, buf_state_en[2]) @[lsu_bus_buffer.scala 405:94]
node _T_2384 = eq(buf_state[2], UInt<3>("h01")) @[lsu_bus_buffer.scala 406:20]
node _T_2385 = eq(buf_state[2], UInt<3>("h02")) @[lsu_bus_buffer.scala 406:47]
node _T_2386 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[lsu_bus_buffer.scala 406:59]
node _T_2387 = and(_T_2385, _T_2386) @[lsu_bus_buffer.scala 406:57]
node _T_2388 = or(_T_2384, _T_2387) @[lsu_bus_buffer.scala 406:31]
node _T_2389 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 407:23]
node _T_2390 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 407:53]
node _T_2391 = and(_T_2389, _T_2390) @[lsu_bus_buffer.scala 407:41]
node _T_2392 = eq(WrPtr0_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 407:83]
node _T_2393 = and(_T_2391, _T_2392) @[lsu_bus_buffer.scala 407:71]
node _T_2394 = eq(ibuf_tag, UInt<2>("h02")) @[lsu_bus_buffer.scala 407:104]
node _T_2395 = and(_T_2393, _T_2394) @[lsu_bus_buffer.scala 407:92]
node _T_2396 = or(_T_2388, _T_2395) @[lsu_bus_buffer.scala 406:86]
node _T_2397 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 408:17]
node _T_2398 = and(_T_2397, io.ldst_dual_r) @[lsu_bus_buffer.scala 408:35]
node _T_2399 = eq(WrPtr1_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 408:64]
node _T_2400 = and(_T_2398, _T_2399) @[lsu_bus_buffer.scala 408:52]
node _T_2401 = eq(WrPtr0_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 408:85]
node _T_2402 = and(_T_2400, _T_2401) @[lsu_bus_buffer.scala 408:73]
node _T_2403 = or(_T_2396, _T_2402) @[lsu_bus_buffer.scala 407:114]
node _T_2404 = and(_T_2383, _T_2403) @[lsu_bus_buffer.scala 405:113]
node _T_2405 = bits(buf_age[2], 2, 2) @[lsu_bus_buffer.scala 408:109]
node _T_2406 = or(_T_2404, _T_2405) @[lsu_bus_buffer.scala 408:97]
node _T_2407 = eq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 405:83]
node _T_2408 = and(_T_2407, buf_state_en[2]) @[lsu_bus_buffer.scala 405:94]
node _T_2409 = eq(buf_state[3], UInt<3>("h01")) @[lsu_bus_buffer.scala 406:20]
node _T_2410 = eq(buf_state[3], UInt<3>("h02")) @[lsu_bus_buffer.scala 406:47]
node _T_2411 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[lsu_bus_buffer.scala 406:59]
node _T_2412 = and(_T_2410, _T_2411) @[lsu_bus_buffer.scala 406:57]
node _T_2413 = or(_T_2409, _T_2412) @[lsu_bus_buffer.scala 406:31]
node _T_2414 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 407:23]
node _T_2415 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 407:53]
node _T_2416 = and(_T_2414, _T_2415) @[lsu_bus_buffer.scala 407:41]
node _T_2417 = eq(WrPtr0_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 407:83]
node _T_2418 = and(_T_2416, _T_2417) @[lsu_bus_buffer.scala 407:71]
node _T_2419 = eq(ibuf_tag, UInt<2>("h03")) @[lsu_bus_buffer.scala 407:104]
node _T_2420 = and(_T_2418, _T_2419) @[lsu_bus_buffer.scala 407:92]
node _T_2421 = or(_T_2413, _T_2420) @[lsu_bus_buffer.scala 406:86]
node _T_2422 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 408:17]
node _T_2423 = and(_T_2422, io.ldst_dual_r) @[lsu_bus_buffer.scala 408:35]
node _T_2424 = eq(WrPtr1_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 408:64]
node _T_2425 = and(_T_2423, _T_2424) @[lsu_bus_buffer.scala 408:52]
node _T_2426 = eq(WrPtr0_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 408:85]
node _T_2427 = and(_T_2425, _T_2426) @[lsu_bus_buffer.scala 408:73]
node _T_2428 = or(_T_2421, _T_2427) @[lsu_bus_buffer.scala 407:114]
node _T_2429 = and(_T_2408, _T_2428) @[lsu_bus_buffer.scala 405:113]
node _T_2430 = bits(buf_age[2], 3, 3) @[lsu_bus_buffer.scala 408:109]
node _T_2431 = or(_T_2429, _T_2430) @[lsu_bus_buffer.scala 408:97]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_2432 = cat(_T_2431, _T_2406) @[Cat.scala 29:58]
node _T_2433 = cat(_T_2432, _T_2381) @[Cat.scala 29:58]
node buf_age_in_2 = cat(_T_2433, _T_2356) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_2434 = eq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 405:83]
node _T_2435 = and(_T_2434, buf_state_en[3]) @[lsu_bus_buffer.scala 405:94]
node _T_2436 = eq(buf_state[0], UInt<3>("h01")) @[lsu_bus_buffer.scala 406:20]
node _T_2437 = eq(buf_state[0], UInt<3>("h02")) @[lsu_bus_buffer.scala 406:47]
node _T_2438 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[lsu_bus_buffer.scala 406:59]
node _T_2439 = and(_T_2437, _T_2438) @[lsu_bus_buffer.scala 406:57]
node _T_2440 = or(_T_2436, _T_2439) @[lsu_bus_buffer.scala 406:31]
node _T_2441 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 407:23]
node _T_2442 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 407:53]
node _T_2443 = and(_T_2441, _T_2442) @[lsu_bus_buffer.scala 407:41]
node _T_2444 = eq(WrPtr0_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 407:83]
node _T_2445 = and(_T_2443, _T_2444) @[lsu_bus_buffer.scala 407:71]
node _T_2446 = eq(ibuf_tag, UInt<1>("h00")) @[lsu_bus_buffer.scala 407:104]
node _T_2447 = and(_T_2445, _T_2446) @[lsu_bus_buffer.scala 407:92]
node _T_2448 = or(_T_2440, _T_2447) @[lsu_bus_buffer.scala 406:86]
node _T_2449 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 408:17]
node _T_2450 = and(_T_2449, io.ldst_dual_r) @[lsu_bus_buffer.scala 408:35]
node _T_2451 = eq(WrPtr1_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 408:64]
node _T_2452 = and(_T_2450, _T_2451) @[lsu_bus_buffer.scala 408:52]
node _T_2453 = eq(WrPtr0_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 408:85]
node _T_2454 = and(_T_2452, _T_2453) @[lsu_bus_buffer.scala 408:73]
node _T_2455 = or(_T_2448, _T_2454) @[lsu_bus_buffer.scala 407:114]
node _T_2456 = and(_T_2435, _T_2455) @[lsu_bus_buffer.scala 405:113]
node _T_2457 = bits(buf_age[3], 0, 0) @[lsu_bus_buffer.scala 408:109]
node _T_2458 = or(_T_2456, _T_2457) @[lsu_bus_buffer.scala 408:97]
node _T_2459 = eq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 405:83]
node _T_2460 = and(_T_2459, buf_state_en[3]) @[lsu_bus_buffer.scala 405:94]
node _T_2461 = eq(buf_state[1], UInt<3>("h01")) @[lsu_bus_buffer.scala 406:20]
node _T_2462 = eq(buf_state[1], UInt<3>("h02")) @[lsu_bus_buffer.scala 406:47]
node _T_2463 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[lsu_bus_buffer.scala 406:59]
node _T_2464 = and(_T_2462, _T_2463) @[lsu_bus_buffer.scala 406:57]
node _T_2465 = or(_T_2461, _T_2464) @[lsu_bus_buffer.scala 406:31]
node _T_2466 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 407:23]
node _T_2467 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 407:53]
node _T_2468 = and(_T_2466, _T_2467) @[lsu_bus_buffer.scala 407:41]
node _T_2469 = eq(WrPtr0_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 407:83]
node _T_2470 = and(_T_2468, _T_2469) @[lsu_bus_buffer.scala 407:71]
node _T_2471 = eq(ibuf_tag, UInt<1>("h01")) @[lsu_bus_buffer.scala 407:104]
node _T_2472 = and(_T_2470, _T_2471) @[lsu_bus_buffer.scala 407:92]
node _T_2473 = or(_T_2465, _T_2472) @[lsu_bus_buffer.scala 406:86]
node _T_2474 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 408:17]
node _T_2475 = and(_T_2474, io.ldst_dual_r) @[lsu_bus_buffer.scala 408:35]
node _T_2476 = eq(WrPtr1_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 408:64]
node _T_2477 = and(_T_2475, _T_2476) @[lsu_bus_buffer.scala 408:52]
node _T_2478 = eq(WrPtr0_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 408:85]
node _T_2479 = and(_T_2477, _T_2478) @[lsu_bus_buffer.scala 408:73]
node _T_2480 = or(_T_2473, _T_2479) @[lsu_bus_buffer.scala 407:114]
node _T_2481 = and(_T_2460, _T_2480) @[lsu_bus_buffer.scala 405:113]
node _T_2482 = bits(buf_age[3], 1, 1) @[lsu_bus_buffer.scala 408:109]
node _T_2483 = or(_T_2481, _T_2482) @[lsu_bus_buffer.scala 408:97]
node _T_2484 = eq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 405:83]
node _T_2485 = and(_T_2484, buf_state_en[3]) @[lsu_bus_buffer.scala 405:94]
node _T_2486 = eq(buf_state[2], UInt<3>("h01")) @[lsu_bus_buffer.scala 406:20]
node _T_2487 = eq(buf_state[2], UInt<3>("h02")) @[lsu_bus_buffer.scala 406:47]
node _T_2488 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[lsu_bus_buffer.scala 406:59]
node _T_2489 = and(_T_2487, _T_2488) @[lsu_bus_buffer.scala 406:57]
node _T_2490 = or(_T_2486, _T_2489) @[lsu_bus_buffer.scala 406:31]
node _T_2491 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 407:23]
node _T_2492 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 407:53]
node _T_2493 = and(_T_2491, _T_2492) @[lsu_bus_buffer.scala 407:41]
node _T_2494 = eq(WrPtr0_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 407:83]
node _T_2495 = and(_T_2493, _T_2494) @[lsu_bus_buffer.scala 407:71]
node _T_2496 = eq(ibuf_tag, UInt<2>("h02")) @[lsu_bus_buffer.scala 407:104]
node _T_2497 = and(_T_2495, _T_2496) @[lsu_bus_buffer.scala 407:92]
node _T_2498 = or(_T_2490, _T_2497) @[lsu_bus_buffer.scala 406:86]
node _T_2499 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 408:17]
node _T_2500 = and(_T_2499, io.ldst_dual_r) @[lsu_bus_buffer.scala 408:35]
node _T_2501 = eq(WrPtr1_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 408:64]
node _T_2502 = and(_T_2500, _T_2501) @[lsu_bus_buffer.scala 408:52]
node _T_2503 = eq(WrPtr0_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 408:85]
node _T_2504 = and(_T_2502, _T_2503) @[lsu_bus_buffer.scala 408:73]
node _T_2505 = or(_T_2498, _T_2504) @[lsu_bus_buffer.scala 407:114]
node _T_2506 = and(_T_2485, _T_2505) @[lsu_bus_buffer.scala 405:113]
node _T_2507 = bits(buf_age[3], 2, 2) @[lsu_bus_buffer.scala 408:109]
node _T_2508 = or(_T_2506, _T_2507) @[lsu_bus_buffer.scala 408:97]
node _T_2509 = eq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 405:83]
node _T_2510 = and(_T_2509, buf_state_en[3]) @[lsu_bus_buffer.scala 405:94]
node _T_2511 = eq(buf_state[3], UInt<3>("h01")) @[lsu_bus_buffer.scala 406:20]
node _T_2512 = eq(buf_state[3], UInt<3>("h02")) @[lsu_bus_buffer.scala 406:47]
node _T_2513 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[lsu_bus_buffer.scala 406:59]
node _T_2514 = and(_T_2512, _T_2513) @[lsu_bus_buffer.scala 406:57]
node _T_2515 = or(_T_2511, _T_2514) @[lsu_bus_buffer.scala 406:31]
node _T_2516 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 407:23]
node _T_2517 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 407:53]
node _T_2518 = and(_T_2516, _T_2517) @[lsu_bus_buffer.scala 407:41]
node _T_2519 = eq(WrPtr0_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 407:83]
node _T_2520 = and(_T_2518, _T_2519) @[lsu_bus_buffer.scala 407:71]
node _T_2521 = eq(ibuf_tag, UInt<2>("h03")) @[lsu_bus_buffer.scala 407:104]
node _T_2522 = and(_T_2520, _T_2521) @[lsu_bus_buffer.scala 407:92]
node _T_2523 = or(_T_2515, _T_2522) @[lsu_bus_buffer.scala 406:86]
node _T_2524 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 408:17]
node _T_2525 = and(_T_2524, io.ldst_dual_r) @[lsu_bus_buffer.scala 408:35]
node _T_2526 = eq(WrPtr1_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 408:64]
node _T_2527 = and(_T_2525, _T_2526) @[lsu_bus_buffer.scala 408:52]
node _T_2528 = eq(WrPtr0_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 408:85]
node _T_2529 = and(_T_2527, _T_2528) @[lsu_bus_buffer.scala 408:73]
node _T_2530 = or(_T_2523, _T_2529) @[lsu_bus_buffer.scala 407:114]
node _T_2531 = and(_T_2510, _T_2530) @[lsu_bus_buffer.scala 405:113]
node _T_2532 = bits(buf_age[3], 3, 3) @[lsu_bus_buffer.scala 408:109]
node _T_2533 = or(_T_2531, _T_2532) @[lsu_bus_buffer.scala 408:97]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_2534 = cat(_T_2533, _T_2508) @[Cat.scala 29:58]
node _T_2535 = cat(_T_2534, _T_2483) @[Cat.scala 29:58]
node buf_age_in_3 = cat(_T_2535, _T_2458) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
wire buf_ageQ : UInt<4>[4] @[lsu_bus_buffer.scala 409:22]
buf_ageQ[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 410:12]
buf_ageQ[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 410:12]
buf_ageQ[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 410:12]
buf_ageQ[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 410:12]
node _T_2536 = bits(buf_ageQ[0], 0, 0) @[lsu_bus_buffer.scala 411:72]
node _T_2537 = eq(buf_state[0], UInt<3>("h02")) @[lsu_bus_buffer.scala 411:93]
node _T_2538 = and(_T_2537, buf_cmd_state_bus_en[0]) @[lsu_bus_buffer.scala 411:103]
node _T_2539 = eq(_T_2538, UInt<1>("h00")) @[lsu_bus_buffer.scala 411:78]
node _T_2540 = and(_T_2536, _T_2539) @[lsu_bus_buffer.scala 411:76]
node _T_2541 = bits(buf_ageQ[0], 1, 1) @[lsu_bus_buffer.scala 411:72]
node _T_2542 = eq(buf_state[1], UInt<3>("h02")) @[lsu_bus_buffer.scala 411:93]
node _T_2543 = and(_T_2542, buf_cmd_state_bus_en[1]) @[lsu_bus_buffer.scala 411:103]
node _T_2544 = eq(_T_2543, UInt<1>("h00")) @[lsu_bus_buffer.scala 411:78]
node _T_2545 = and(_T_2541, _T_2544) @[lsu_bus_buffer.scala 411:76]
node _T_2546 = bits(buf_ageQ[0], 2, 2) @[lsu_bus_buffer.scala 411:72]
node _T_2547 = eq(buf_state[2], UInt<3>("h02")) @[lsu_bus_buffer.scala 411:93]
node _T_2548 = and(_T_2547, buf_cmd_state_bus_en[2]) @[lsu_bus_buffer.scala 411:103]
node _T_2549 = eq(_T_2548, UInt<1>("h00")) @[lsu_bus_buffer.scala 411:78]
node _T_2550 = and(_T_2546, _T_2549) @[lsu_bus_buffer.scala 411:76]
node _T_2551 = bits(buf_ageQ[0], 3, 3) @[lsu_bus_buffer.scala 411:72]
node _T_2552 = eq(buf_state[3], UInt<3>("h02")) @[lsu_bus_buffer.scala 411:93]
node _T_2553 = and(_T_2552, buf_cmd_state_bus_en[3]) @[lsu_bus_buffer.scala 411:103]
node _T_2554 = eq(_T_2553, UInt<1>("h00")) @[lsu_bus_buffer.scala 411:78]
node _T_2555 = and(_T_2551, _T_2554) @[lsu_bus_buffer.scala 411:76]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_2556 = cat(_T_2555, _T_2550) @[Cat.scala 29:58]
node _T_2557 = cat(_T_2556, _T_2545) @[Cat.scala 29:58]
node _T_2558 = cat(_T_2557, _T_2540) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_2559 = bits(buf_ageQ[1], 0, 0) @[lsu_bus_buffer.scala 411:72]
node _T_2560 = eq(buf_state[0], UInt<3>("h02")) @[lsu_bus_buffer.scala 411:93]
node _T_2561 = and(_T_2560, buf_cmd_state_bus_en[0]) @[lsu_bus_buffer.scala 411:103]
node _T_2562 = eq(_T_2561, UInt<1>("h00")) @[lsu_bus_buffer.scala 411:78]
node _T_2563 = and(_T_2559, _T_2562) @[lsu_bus_buffer.scala 411:76]
node _T_2564 = bits(buf_ageQ[1], 1, 1) @[lsu_bus_buffer.scala 411:72]
node _T_2565 = eq(buf_state[1], UInt<3>("h02")) @[lsu_bus_buffer.scala 411:93]
node _T_2566 = and(_T_2565, buf_cmd_state_bus_en[1]) @[lsu_bus_buffer.scala 411:103]
node _T_2567 = eq(_T_2566, UInt<1>("h00")) @[lsu_bus_buffer.scala 411:78]
node _T_2568 = and(_T_2564, _T_2567) @[lsu_bus_buffer.scala 411:76]
node _T_2569 = bits(buf_ageQ[1], 2, 2) @[lsu_bus_buffer.scala 411:72]
node _T_2570 = eq(buf_state[2], UInt<3>("h02")) @[lsu_bus_buffer.scala 411:93]
node _T_2571 = and(_T_2570, buf_cmd_state_bus_en[2]) @[lsu_bus_buffer.scala 411:103]
node _T_2572 = eq(_T_2571, UInt<1>("h00")) @[lsu_bus_buffer.scala 411:78]
node _T_2573 = and(_T_2569, _T_2572) @[lsu_bus_buffer.scala 411:76]
node _T_2574 = bits(buf_ageQ[1], 3, 3) @[lsu_bus_buffer.scala 411:72]
node _T_2575 = eq(buf_state[3], UInt<3>("h02")) @[lsu_bus_buffer.scala 411:93]
node _T_2576 = and(_T_2575, buf_cmd_state_bus_en[3]) @[lsu_bus_buffer.scala 411:103]
node _T_2577 = eq(_T_2576, UInt<1>("h00")) @[lsu_bus_buffer.scala 411:78]
node _T_2578 = and(_T_2574, _T_2577) @[lsu_bus_buffer.scala 411:76]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_2579 = cat(_T_2578, _T_2573) @[Cat.scala 29:58]
node _T_2580 = cat(_T_2579, _T_2568) @[Cat.scala 29:58]
node _T_2581 = cat(_T_2580, _T_2563) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_2582 = bits(buf_ageQ[2], 0, 0) @[lsu_bus_buffer.scala 411:72]
node _T_2583 = eq(buf_state[0], UInt<3>("h02")) @[lsu_bus_buffer.scala 411:93]
node _T_2584 = and(_T_2583, buf_cmd_state_bus_en[0]) @[lsu_bus_buffer.scala 411:103]
node _T_2585 = eq(_T_2584, UInt<1>("h00")) @[lsu_bus_buffer.scala 411:78]
node _T_2586 = and(_T_2582, _T_2585) @[lsu_bus_buffer.scala 411:76]
node _T_2587 = bits(buf_ageQ[2], 1, 1) @[lsu_bus_buffer.scala 411:72]
node _T_2588 = eq(buf_state[1], UInt<3>("h02")) @[lsu_bus_buffer.scala 411:93]
node _T_2589 = and(_T_2588, buf_cmd_state_bus_en[1]) @[lsu_bus_buffer.scala 411:103]
node _T_2590 = eq(_T_2589, UInt<1>("h00")) @[lsu_bus_buffer.scala 411:78]
node _T_2591 = and(_T_2587, _T_2590) @[lsu_bus_buffer.scala 411:76]
node _T_2592 = bits(buf_ageQ[2], 2, 2) @[lsu_bus_buffer.scala 411:72]
node _T_2593 = eq(buf_state[2], UInt<3>("h02")) @[lsu_bus_buffer.scala 411:93]
node _T_2594 = and(_T_2593, buf_cmd_state_bus_en[2]) @[lsu_bus_buffer.scala 411:103]
node _T_2595 = eq(_T_2594, UInt<1>("h00")) @[lsu_bus_buffer.scala 411:78]
node _T_2596 = and(_T_2592, _T_2595) @[lsu_bus_buffer.scala 411:76]
node _T_2597 = bits(buf_ageQ[2], 3, 3) @[lsu_bus_buffer.scala 411:72]
node _T_2598 = eq(buf_state[3], UInt<3>("h02")) @[lsu_bus_buffer.scala 411:93]
node _T_2599 = and(_T_2598, buf_cmd_state_bus_en[3]) @[lsu_bus_buffer.scala 411:103]
node _T_2600 = eq(_T_2599, UInt<1>("h00")) @[lsu_bus_buffer.scala 411:78]
node _T_2601 = and(_T_2597, _T_2600) @[lsu_bus_buffer.scala 411:76]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_2602 = cat(_T_2601, _T_2596) @[Cat.scala 29:58]
node _T_2603 = cat(_T_2602, _T_2591) @[Cat.scala 29:58]
node _T_2604 = cat(_T_2603, _T_2586) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_2605 = bits(buf_ageQ[3], 0, 0) @[lsu_bus_buffer.scala 411:72]
node _T_2606 = eq(buf_state[0], UInt<3>("h02")) @[lsu_bus_buffer.scala 411:93]
node _T_2607 = and(_T_2606, buf_cmd_state_bus_en[0]) @[lsu_bus_buffer.scala 411:103]
node _T_2608 = eq(_T_2607, UInt<1>("h00")) @[lsu_bus_buffer.scala 411:78]
node _T_2609 = and(_T_2605, _T_2608) @[lsu_bus_buffer.scala 411:76]
node _T_2610 = bits(buf_ageQ[3], 1, 1) @[lsu_bus_buffer.scala 411:72]
node _T_2611 = eq(buf_state[1], UInt<3>("h02")) @[lsu_bus_buffer.scala 411:93]
node _T_2612 = and(_T_2611, buf_cmd_state_bus_en[1]) @[lsu_bus_buffer.scala 411:103]
node _T_2613 = eq(_T_2612, UInt<1>("h00")) @[lsu_bus_buffer.scala 411:78]
node _T_2614 = and(_T_2610, _T_2613) @[lsu_bus_buffer.scala 411:76]
node _T_2615 = bits(buf_ageQ[3], 2, 2) @[lsu_bus_buffer.scala 411:72]
node _T_2616 = eq(buf_state[2], UInt<3>("h02")) @[lsu_bus_buffer.scala 411:93]
node _T_2617 = and(_T_2616, buf_cmd_state_bus_en[2]) @[lsu_bus_buffer.scala 411:103]
node _T_2618 = eq(_T_2617, UInt<1>("h00")) @[lsu_bus_buffer.scala 411:78]
node _T_2619 = and(_T_2615, _T_2618) @[lsu_bus_buffer.scala 411:76]
node _T_2620 = bits(buf_ageQ[3], 3, 3) @[lsu_bus_buffer.scala 411:72]
node _T_2621 = eq(buf_state[3], UInt<3>("h02")) @[lsu_bus_buffer.scala 411:93]
node _T_2622 = and(_T_2621, buf_cmd_state_bus_en[3]) @[lsu_bus_buffer.scala 411:103]
node _T_2623 = eq(_T_2622, UInt<1>("h00")) @[lsu_bus_buffer.scala 411:78]
node _T_2624 = and(_T_2620, _T_2623) @[lsu_bus_buffer.scala 411:76]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_2625 = cat(_T_2624, _T_2619) @[Cat.scala 29:58]
node _T_2626 = cat(_T_2625, _T_2614) @[Cat.scala 29:58]
node _T_2627 = cat(_T_2626, _T_2609) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_age[0] <= _T_2558 @[lsu_bus_buffer.scala 411:11]
buf_age[1] <= _T_2581 @[lsu_bus_buffer.scala 411:11]
buf_age[2] <= _T_2604 @[lsu_bus_buffer.scala 411:11]
buf_age[3] <= _T_2627 @[lsu_bus_buffer.scala 411:11]
node _T_2628 = eq(UInt<1>("h00"), UInt<1>("h00")) @[lsu_bus_buffer.scala 412:76]
node _T_2629 = bits(buf_age[0], 0, 0) @[lsu_bus_buffer.scala 412:100]
node _T_2630 = eq(_T_2629, UInt<1>("h00")) @[lsu_bus_buffer.scala 412:89]
node _T_2631 = neq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 412:119]
node _T_2632 = and(_T_2630, _T_2631) @[lsu_bus_buffer.scala 412:104]
node _T_2633 = mux(_T_2628, UInt<1>("h00"), _T_2632) @[lsu_bus_buffer.scala 412:72]
node _T_2634 = eq(UInt<1>("h00"), UInt<1>("h01")) @[lsu_bus_buffer.scala 412:76]
node _T_2635 = bits(buf_age[0], 1, 1) @[lsu_bus_buffer.scala 412:100]
node _T_2636 = eq(_T_2635, UInt<1>("h00")) @[lsu_bus_buffer.scala 412:89]
node _T_2637 = neq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 412:119]
node _T_2638 = and(_T_2636, _T_2637) @[lsu_bus_buffer.scala 412:104]
node _T_2639 = mux(_T_2634, UInt<1>("h00"), _T_2638) @[lsu_bus_buffer.scala 412:72]
node _T_2640 = eq(UInt<1>("h00"), UInt<2>("h02")) @[lsu_bus_buffer.scala 412:76]
node _T_2641 = bits(buf_age[0], 2, 2) @[lsu_bus_buffer.scala 412:100]
node _T_2642 = eq(_T_2641, UInt<1>("h00")) @[lsu_bus_buffer.scala 412:89]
node _T_2643 = neq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 412:119]
node _T_2644 = and(_T_2642, _T_2643) @[lsu_bus_buffer.scala 412:104]
node _T_2645 = mux(_T_2640, UInt<1>("h00"), _T_2644) @[lsu_bus_buffer.scala 412:72]
node _T_2646 = eq(UInt<1>("h00"), UInt<2>("h03")) @[lsu_bus_buffer.scala 412:76]
node _T_2647 = bits(buf_age[0], 3, 3) @[lsu_bus_buffer.scala 412:100]
node _T_2648 = eq(_T_2647, UInt<1>("h00")) @[lsu_bus_buffer.scala 412:89]
node _T_2649 = neq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 412:119]
node _T_2650 = and(_T_2648, _T_2649) @[lsu_bus_buffer.scala 412:104]
node _T_2651 = mux(_T_2646, UInt<1>("h00"), _T_2650) @[lsu_bus_buffer.scala 412:72]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_2652 = cat(_T_2651, _T_2645) @[Cat.scala 29:58]
node _T_2653 = cat(_T_2652, _T_2639) @[Cat.scala 29:58]
node _T_2654 = cat(_T_2653, _T_2633) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_2655 = eq(UInt<1>("h01"), UInt<1>("h00")) @[lsu_bus_buffer.scala 412:76]
node _T_2656 = bits(buf_age[1], 0, 0) @[lsu_bus_buffer.scala 412:100]
node _T_2657 = eq(_T_2656, UInt<1>("h00")) @[lsu_bus_buffer.scala 412:89]
node _T_2658 = neq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 412:119]
node _T_2659 = and(_T_2657, _T_2658) @[lsu_bus_buffer.scala 412:104]
node _T_2660 = mux(_T_2655, UInt<1>("h00"), _T_2659) @[lsu_bus_buffer.scala 412:72]
node _T_2661 = eq(UInt<1>("h01"), UInt<1>("h01")) @[lsu_bus_buffer.scala 412:76]
node _T_2662 = bits(buf_age[1], 1, 1) @[lsu_bus_buffer.scala 412:100]
node _T_2663 = eq(_T_2662, UInt<1>("h00")) @[lsu_bus_buffer.scala 412:89]
node _T_2664 = neq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 412:119]
node _T_2665 = and(_T_2663, _T_2664) @[lsu_bus_buffer.scala 412:104]
node _T_2666 = mux(_T_2661, UInt<1>("h00"), _T_2665) @[lsu_bus_buffer.scala 412:72]
node _T_2667 = eq(UInt<1>("h01"), UInt<2>("h02")) @[lsu_bus_buffer.scala 412:76]
node _T_2668 = bits(buf_age[1], 2, 2) @[lsu_bus_buffer.scala 412:100]
node _T_2669 = eq(_T_2668, UInt<1>("h00")) @[lsu_bus_buffer.scala 412:89]
node _T_2670 = neq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 412:119]
node _T_2671 = and(_T_2669, _T_2670) @[lsu_bus_buffer.scala 412:104]
node _T_2672 = mux(_T_2667, UInt<1>("h00"), _T_2671) @[lsu_bus_buffer.scala 412:72]
node _T_2673 = eq(UInt<1>("h01"), UInt<2>("h03")) @[lsu_bus_buffer.scala 412:76]
node _T_2674 = bits(buf_age[1], 3, 3) @[lsu_bus_buffer.scala 412:100]
node _T_2675 = eq(_T_2674, UInt<1>("h00")) @[lsu_bus_buffer.scala 412:89]
node _T_2676 = neq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 412:119]
node _T_2677 = and(_T_2675, _T_2676) @[lsu_bus_buffer.scala 412:104]
node _T_2678 = mux(_T_2673, UInt<1>("h00"), _T_2677) @[lsu_bus_buffer.scala 412:72]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_2679 = cat(_T_2678, _T_2672) @[Cat.scala 29:58]
node _T_2680 = cat(_T_2679, _T_2666) @[Cat.scala 29:58]
node _T_2681 = cat(_T_2680, _T_2660) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_2682 = eq(UInt<2>("h02"), UInt<1>("h00")) @[lsu_bus_buffer.scala 412:76]
node _T_2683 = bits(buf_age[2], 0, 0) @[lsu_bus_buffer.scala 412:100]
node _T_2684 = eq(_T_2683, UInt<1>("h00")) @[lsu_bus_buffer.scala 412:89]
node _T_2685 = neq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 412:119]
node _T_2686 = and(_T_2684, _T_2685) @[lsu_bus_buffer.scala 412:104]
node _T_2687 = mux(_T_2682, UInt<1>("h00"), _T_2686) @[lsu_bus_buffer.scala 412:72]
node _T_2688 = eq(UInt<2>("h02"), UInt<1>("h01")) @[lsu_bus_buffer.scala 412:76]
node _T_2689 = bits(buf_age[2], 1, 1) @[lsu_bus_buffer.scala 412:100]
node _T_2690 = eq(_T_2689, UInt<1>("h00")) @[lsu_bus_buffer.scala 412:89]
node _T_2691 = neq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 412:119]
node _T_2692 = and(_T_2690, _T_2691) @[lsu_bus_buffer.scala 412:104]
node _T_2693 = mux(_T_2688, UInt<1>("h00"), _T_2692) @[lsu_bus_buffer.scala 412:72]
node _T_2694 = eq(UInt<2>("h02"), UInt<2>("h02")) @[lsu_bus_buffer.scala 412:76]
node _T_2695 = bits(buf_age[2], 2, 2) @[lsu_bus_buffer.scala 412:100]
node _T_2696 = eq(_T_2695, UInt<1>("h00")) @[lsu_bus_buffer.scala 412:89]
node _T_2697 = neq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 412:119]
node _T_2698 = and(_T_2696, _T_2697) @[lsu_bus_buffer.scala 412:104]
node _T_2699 = mux(_T_2694, UInt<1>("h00"), _T_2698) @[lsu_bus_buffer.scala 412:72]
node _T_2700 = eq(UInt<2>("h02"), UInt<2>("h03")) @[lsu_bus_buffer.scala 412:76]
node _T_2701 = bits(buf_age[2], 3, 3) @[lsu_bus_buffer.scala 412:100]
node _T_2702 = eq(_T_2701, UInt<1>("h00")) @[lsu_bus_buffer.scala 412:89]
node _T_2703 = neq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 412:119]
node _T_2704 = and(_T_2702, _T_2703) @[lsu_bus_buffer.scala 412:104]
node _T_2705 = mux(_T_2700, UInt<1>("h00"), _T_2704) @[lsu_bus_buffer.scala 412:72]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_2706 = cat(_T_2705, _T_2699) @[Cat.scala 29:58]
node _T_2707 = cat(_T_2706, _T_2693) @[Cat.scala 29:58]
node _T_2708 = cat(_T_2707, _T_2687) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_2709 = eq(UInt<2>("h03"), UInt<1>("h00")) @[lsu_bus_buffer.scala 412:76]
node _T_2710 = bits(buf_age[3], 0, 0) @[lsu_bus_buffer.scala 412:100]
node _T_2711 = eq(_T_2710, UInt<1>("h00")) @[lsu_bus_buffer.scala 412:89]
node _T_2712 = neq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 412:119]
node _T_2713 = and(_T_2711, _T_2712) @[lsu_bus_buffer.scala 412:104]
node _T_2714 = mux(_T_2709, UInt<1>("h00"), _T_2713) @[lsu_bus_buffer.scala 412:72]
node _T_2715 = eq(UInt<2>("h03"), UInt<1>("h01")) @[lsu_bus_buffer.scala 412:76]
node _T_2716 = bits(buf_age[3], 1, 1) @[lsu_bus_buffer.scala 412:100]
node _T_2717 = eq(_T_2716, UInt<1>("h00")) @[lsu_bus_buffer.scala 412:89]
node _T_2718 = neq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 412:119]
node _T_2719 = and(_T_2717, _T_2718) @[lsu_bus_buffer.scala 412:104]
node _T_2720 = mux(_T_2715, UInt<1>("h00"), _T_2719) @[lsu_bus_buffer.scala 412:72]
node _T_2721 = eq(UInt<2>("h03"), UInt<2>("h02")) @[lsu_bus_buffer.scala 412:76]
node _T_2722 = bits(buf_age[3], 2, 2) @[lsu_bus_buffer.scala 412:100]
node _T_2723 = eq(_T_2722, UInt<1>("h00")) @[lsu_bus_buffer.scala 412:89]
node _T_2724 = neq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 412:119]
node _T_2725 = and(_T_2723, _T_2724) @[lsu_bus_buffer.scala 412:104]
node _T_2726 = mux(_T_2721, UInt<1>("h00"), _T_2725) @[lsu_bus_buffer.scala 412:72]
node _T_2727 = eq(UInt<2>("h03"), UInt<2>("h03")) @[lsu_bus_buffer.scala 412:76]
node _T_2728 = bits(buf_age[3], 3, 3) @[lsu_bus_buffer.scala 412:100]
node _T_2729 = eq(_T_2728, UInt<1>("h00")) @[lsu_bus_buffer.scala 412:89]
node _T_2730 = neq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 412:119]
node _T_2731 = and(_T_2729, _T_2730) @[lsu_bus_buffer.scala 412:104]
node _T_2732 = mux(_T_2727, UInt<1>("h00"), _T_2731) @[lsu_bus_buffer.scala 412:72]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_2733 = cat(_T_2732, _T_2726) @[Cat.scala 29:58]
node _T_2734 = cat(_T_2733, _T_2720) @[Cat.scala 29:58]
node _T_2735 = cat(_T_2734, _T_2714) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_age_younger[0] <= _T_2654 @[lsu_bus_buffer.scala 412:19]
buf_age_younger[1] <= _T_2681 @[lsu_bus_buffer.scala 412:19]
buf_age_younger[2] <= _T_2708 @[lsu_bus_buffer.scala 412:19]
buf_age_younger[3] <= _T_2735 @[lsu_bus_buffer.scala 412:19]
node _T_2736 = bits(buf_rspageQ[0], 0, 0) @[lsu_bus_buffer.scala 413:83]
node _T_2737 = eq(buf_state[0], UInt<3>("h05")) @[lsu_bus_buffer.scala 413:102]
node _T_2738 = and(_T_2736, _T_2737) @[lsu_bus_buffer.scala 413:87]
node _T_2739 = bits(buf_rspageQ[0], 1, 1) @[lsu_bus_buffer.scala 413:83]
node _T_2740 = eq(buf_state[1], UInt<3>("h05")) @[lsu_bus_buffer.scala 413:102]
node _T_2741 = and(_T_2739, _T_2740) @[lsu_bus_buffer.scala 413:87]
node _T_2742 = bits(buf_rspageQ[0], 2, 2) @[lsu_bus_buffer.scala 413:83]
node _T_2743 = eq(buf_state[2], UInt<3>("h05")) @[lsu_bus_buffer.scala 413:102]
node _T_2744 = and(_T_2742, _T_2743) @[lsu_bus_buffer.scala 413:87]
node _T_2745 = bits(buf_rspageQ[0], 3, 3) @[lsu_bus_buffer.scala 413:83]
node _T_2746 = eq(buf_state[3], UInt<3>("h05")) @[lsu_bus_buffer.scala 413:102]
node _T_2747 = and(_T_2745, _T_2746) @[lsu_bus_buffer.scala 413:87]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_2748 = cat(_T_2747, _T_2744) @[Cat.scala 29:58]
node _T_2749 = cat(_T_2748, _T_2741) @[Cat.scala 29:58]
node _T_2750 = cat(_T_2749, _T_2738) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_2751 = bits(buf_rspageQ[1], 0, 0) @[lsu_bus_buffer.scala 413:83]
node _T_2752 = eq(buf_state[0], UInt<3>("h05")) @[lsu_bus_buffer.scala 413:102]
node _T_2753 = and(_T_2751, _T_2752) @[lsu_bus_buffer.scala 413:87]
node _T_2754 = bits(buf_rspageQ[1], 1, 1) @[lsu_bus_buffer.scala 413:83]
node _T_2755 = eq(buf_state[1], UInt<3>("h05")) @[lsu_bus_buffer.scala 413:102]
node _T_2756 = and(_T_2754, _T_2755) @[lsu_bus_buffer.scala 413:87]
node _T_2757 = bits(buf_rspageQ[1], 2, 2) @[lsu_bus_buffer.scala 413:83]
node _T_2758 = eq(buf_state[2], UInt<3>("h05")) @[lsu_bus_buffer.scala 413:102]
node _T_2759 = and(_T_2757, _T_2758) @[lsu_bus_buffer.scala 413:87]
node _T_2760 = bits(buf_rspageQ[1], 3, 3) @[lsu_bus_buffer.scala 413:83]
node _T_2761 = eq(buf_state[3], UInt<3>("h05")) @[lsu_bus_buffer.scala 413:102]
node _T_2762 = and(_T_2760, _T_2761) @[lsu_bus_buffer.scala 413:87]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_2763 = cat(_T_2762, _T_2759) @[Cat.scala 29:58]
node _T_2764 = cat(_T_2763, _T_2756) @[Cat.scala 29:58]
node _T_2765 = cat(_T_2764, _T_2753) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_2766 = bits(buf_rspageQ[2], 0, 0) @[lsu_bus_buffer.scala 413:83]
node _T_2767 = eq(buf_state[0], UInt<3>("h05")) @[lsu_bus_buffer.scala 413:102]
node _T_2768 = and(_T_2766, _T_2767) @[lsu_bus_buffer.scala 413:87]
node _T_2769 = bits(buf_rspageQ[2], 1, 1) @[lsu_bus_buffer.scala 413:83]
node _T_2770 = eq(buf_state[1], UInt<3>("h05")) @[lsu_bus_buffer.scala 413:102]
node _T_2771 = and(_T_2769, _T_2770) @[lsu_bus_buffer.scala 413:87]
node _T_2772 = bits(buf_rspageQ[2], 2, 2) @[lsu_bus_buffer.scala 413:83]
node _T_2773 = eq(buf_state[2], UInt<3>("h05")) @[lsu_bus_buffer.scala 413:102]
node _T_2774 = and(_T_2772, _T_2773) @[lsu_bus_buffer.scala 413:87]
node _T_2775 = bits(buf_rspageQ[2], 3, 3) @[lsu_bus_buffer.scala 413:83]
node _T_2776 = eq(buf_state[3], UInt<3>("h05")) @[lsu_bus_buffer.scala 413:102]
node _T_2777 = and(_T_2775, _T_2776) @[lsu_bus_buffer.scala 413:87]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_2778 = cat(_T_2777, _T_2774) @[Cat.scala 29:58]
node _T_2779 = cat(_T_2778, _T_2771) @[Cat.scala 29:58]
node _T_2780 = cat(_T_2779, _T_2768) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_2781 = bits(buf_rspageQ[3], 0, 0) @[lsu_bus_buffer.scala 413:83]
node _T_2782 = eq(buf_state[0], UInt<3>("h05")) @[lsu_bus_buffer.scala 413:102]
node _T_2783 = and(_T_2781, _T_2782) @[lsu_bus_buffer.scala 413:87]
node _T_2784 = bits(buf_rspageQ[3], 1, 1) @[lsu_bus_buffer.scala 413:83]
node _T_2785 = eq(buf_state[1], UInt<3>("h05")) @[lsu_bus_buffer.scala 413:102]
node _T_2786 = and(_T_2784, _T_2785) @[lsu_bus_buffer.scala 413:87]
node _T_2787 = bits(buf_rspageQ[3], 2, 2) @[lsu_bus_buffer.scala 413:83]
node _T_2788 = eq(buf_state[2], UInt<3>("h05")) @[lsu_bus_buffer.scala 413:102]
node _T_2789 = and(_T_2787, _T_2788) @[lsu_bus_buffer.scala 413:87]
node _T_2790 = bits(buf_rspageQ[3], 3, 3) @[lsu_bus_buffer.scala 413:83]
node _T_2791 = eq(buf_state[3], UInt<3>("h05")) @[lsu_bus_buffer.scala 413:102]
node _T_2792 = and(_T_2790, _T_2791) @[lsu_bus_buffer.scala 413:87]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_2793 = cat(_T_2792, _T_2789) @[Cat.scala 29:58]
node _T_2794 = cat(_T_2793, _T_2786) @[Cat.scala 29:58]
node _T_2795 = cat(_T_2794, _T_2783) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_rsp_pickage[0] <= _T_2750 @[lsu_bus_buffer.scala 413:19]
buf_rsp_pickage[1] <= _T_2765 @[lsu_bus_buffer.scala 413:19]
buf_rsp_pickage[2] <= _T_2780 @[lsu_bus_buffer.scala 413:19]
buf_rsp_pickage[3] <= _T_2795 @[lsu_bus_buffer.scala 413:19]
node _T_2796 = eq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 415:82]
node _T_2797 = and(_T_2796, buf_state_en[0]) @[lsu_bus_buffer.scala 415:93]
node _T_2798 = eq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 416:21]
node _T_2799 = eq(buf_state[0], UInt<3>("h06")) @[lsu_bus_buffer.scala 416:47]
node _T_2800 = or(_T_2798, _T_2799) @[lsu_bus_buffer.scala 416:32]
node _T_2801 = eq(_T_2800, UInt<1>("h00")) @[lsu_bus_buffer.scala 416:6]
node _T_2802 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 417:23]
node _T_2803 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 417:53]
node _T_2804 = and(_T_2802, _T_2803) @[lsu_bus_buffer.scala 417:41]
node _T_2805 = eq(WrPtr0_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 417:82]
node _T_2806 = and(_T_2804, _T_2805) @[lsu_bus_buffer.scala 417:71]
node _T_2807 = eq(ibuf_tag, UInt<1>("h00")) @[lsu_bus_buffer.scala 417:101]
node _T_2808 = and(_T_2806, _T_2807) @[lsu_bus_buffer.scala 417:90]
node _T_2809 = or(_T_2801, _T_2808) @[lsu_bus_buffer.scala 416:59]
node _T_2810 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 418:17]
node _T_2811 = and(_T_2810, io.ldst_dual_r) @[lsu_bus_buffer.scala 418:35]
node _T_2812 = eq(WrPtr1_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 418:63]
node _T_2813 = and(_T_2811, _T_2812) @[lsu_bus_buffer.scala 418:52]
node _T_2814 = eq(WrPtr0_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 418:82]
node _T_2815 = and(_T_2813, _T_2814) @[lsu_bus_buffer.scala 418:71]
node _T_2816 = or(_T_2809, _T_2815) @[lsu_bus_buffer.scala 417:110]
node _T_2817 = and(_T_2797, _T_2816) @[lsu_bus_buffer.scala 415:112]
node _T_2818 = eq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 415:82]
node _T_2819 = and(_T_2818, buf_state_en[0]) @[lsu_bus_buffer.scala 415:93]
node _T_2820 = eq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 416:21]
node _T_2821 = eq(buf_state[1], UInt<3>("h06")) @[lsu_bus_buffer.scala 416:47]
node _T_2822 = or(_T_2820, _T_2821) @[lsu_bus_buffer.scala 416:32]
node _T_2823 = eq(_T_2822, UInt<1>("h00")) @[lsu_bus_buffer.scala 416:6]
node _T_2824 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 417:23]
node _T_2825 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 417:53]
node _T_2826 = and(_T_2824, _T_2825) @[lsu_bus_buffer.scala 417:41]
node _T_2827 = eq(WrPtr0_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 417:82]
node _T_2828 = and(_T_2826, _T_2827) @[lsu_bus_buffer.scala 417:71]
node _T_2829 = eq(ibuf_tag, UInt<1>("h01")) @[lsu_bus_buffer.scala 417:101]
node _T_2830 = and(_T_2828, _T_2829) @[lsu_bus_buffer.scala 417:90]
node _T_2831 = or(_T_2823, _T_2830) @[lsu_bus_buffer.scala 416:59]
node _T_2832 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 418:17]
node _T_2833 = and(_T_2832, io.ldst_dual_r) @[lsu_bus_buffer.scala 418:35]
node _T_2834 = eq(WrPtr1_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 418:63]
node _T_2835 = and(_T_2833, _T_2834) @[lsu_bus_buffer.scala 418:52]
node _T_2836 = eq(WrPtr0_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 418:82]
node _T_2837 = and(_T_2835, _T_2836) @[lsu_bus_buffer.scala 418:71]
node _T_2838 = or(_T_2831, _T_2837) @[lsu_bus_buffer.scala 417:110]
node _T_2839 = and(_T_2819, _T_2838) @[lsu_bus_buffer.scala 415:112]
node _T_2840 = eq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 415:82]
node _T_2841 = and(_T_2840, buf_state_en[0]) @[lsu_bus_buffer.scala 415:93]
node _T_2842 = eq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 416:21]
node _T_2843 = eq(buf_state[2], UInt<3>("h06")) @[lsu_bus_buffer.scala 416:47]
node _T_2844 = or(_T_2842, _T_2843) @[lsu_bus_buffer.scala 416:32]
node _T_2845 = eq(_T_2844, UInt<1>("h00")) @[lsu_bus_buffer.scala 416:6]
node _T_2846 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 417:23]
node _T_2847 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 417:53]
node _T_2848 = and(_T_2846, _T_2847) @[lsu_bus_buffer.scala 417:41]
node _T_2849 = eq(WrPtr0_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 417:82]
node _T_2850 = and(_T_2848, _T_2849) @[lsu_bus_buffer.scala 417:71]
node _T_2851 = eq(ibuf_tag, UInt<2>("h02")) @[lsu_bus_buffer.scala 417:101]
node _T_2852 = and(_T_2850, _T_2851) @[lsu_bus_buffer.scala 417:90]
node _T_2853 = or(_T_2845, _T_2852) @[lsu_bus_buffer.scala 416:59]
node _T_2854 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 418:17]
node _T_2855 = and(_T_2854, io.ldst_dual_r) @[lsu_bus_buffer.scala 418:35]
node _T_2856 = eq(WrPtr1_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 418:63]
node _T_2857 = and(_T_2855, _T_2856) @[lsu_bus_buffer.scala 418:52]
node _T_2858 = eq(WrPtr0_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 418:82]
node _T_2859 = and(_T_2857, _T_2858) @[lsu_bus_buffer.scala 418:71]
node _T_2860 = or(_T_2853, _T_2859) @[lsu_bus_buffer.scala 417:110]
node _T_2861 = and(_T_2841, _T_2860) @[lsu_bus_buffer.scala 415:112]
node _T_2862 = eq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 415:82]
node _T_2863 = and(_T_2862, buf_state_en[0]) @[lsu_bus_buffer.scala 415:93]
node _T_2864 = eq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 416:21]
node _T_2865 = eq(buf_state[3], UInt<3>("h06")) @[lsu_bus_buffer.scala 416:47]
node _T_2866 = or(_T_2864, _T_2865) @[lsu_bus_buffer.scala 416:32]
node _T_2867 = eq(_T_2866, UInt<1>("h00")) @[lsu_bus_buffer.scala 416:6]
node _T_2868 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 417:23]
node _T_2869 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 417:53]
node _T_2870 = and(_T_2868, _T_2869) @[lsu_bus_buffer.scala 417:41]
node _T_2871 = eq(WrPtr0_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 417:82]
node _T_2872 = and(_T_2870, _T_2871) @[lsu_bus_buffer.scala 417:71]
node _T_2873 = eq(ibuf_tag, UInt<2>("h03")) @[lsu_bus_buffer.scala 417:101]
node _T_2874 = and(_T_2872, _T_2873) @[lsu_bus_buffer.scala 417:90]
node _T_2875 = or(_T_2867, _T_2874) @[lsu_bus_buffer.scala 416:59]
node _T_2876 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 418:17]
node _T_2877 = and(_T_2876, io.ldst_dual_r) @[lsu_bus_buffer.scala 418:35]
node _T_2878 = eq(WrPtr1_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 418:63]
node _T_2879 = and(_T_2877, _T_2878) @[lsu_bus_buffer.scala 418:52]
node _T_2880 = eq(WrPtr0_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 418:82]
node _T_2881 = and(_T_2879, _T_2880) @[lsu_bus_buffer.scala 418:71]
node _T_2882 = or(_T_2875, _T_2881) @[lsu_bus_buffer.scala 417:110]
node _T_2883 = and(_T_2863, _T_2882) @[lsu_bus_buffer.scala 415:112]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_2884 = cat(_T_2883, _T_2861) @[Cat.scala 29:58]
node _T_2885 = cat(_T_2884, _T_2839) @[Cat.scala 29:58]
node _T_2886 = cat(_T_2885, _T_2817) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_2887 = eq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 415:82]
node _T_2888 = and(_T_2887, buf_state_en[1]) @[lsu_bus_buffer.scala 415:93]
node _T_2889 = eq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 416:21]
node _T_2890 = eq(buf_state[0], UInt<3>("h06")) @[lsu_bus_buffer.scala 416:47]
node _T_2891 = or(_T_2889, _T_2890) @[lsu_bus_buffer.scala 416:32]
node _T_2892 = eq(_T_2891, UInt<1>("h00")) @[lsu_bus_buffer.scala 416:6]
node _T_2893 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 417:23]
node _T_2894 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 417:53]
node _T_2895 = and(_T_2893, _T_2894) @[lsu_bus_buffer.scala 417:41]
node _T_2896 = eq(WrPtr0_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 417:82]
node _T_2897 = and(_T_2895, _T_2896) @[lsu_bus_buffer.scala 417:71]
node _T_2898 = eq(ibuf_tag, UInt<1>("h00")) @[lsu_bus_buffer.scala 417:101]
node _T_2899 = and(_T_2897, _T_2898) @[lsu_bus_buffer.scala 417:90]
node _T_2900 = or(_T_2892, _T_2899) @[lsu_bus_buffer.scala 416:59]
node _T_2901 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 418:17]
node _T_2902 = and(_T_2901, io.ldst_dual_r) @[lsu_bus_buffer.scala 418:35]
node _T_2903 = eq(WrPtr1_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 418:63]
node _T_2904 = and(_T_2902, _T_2903) @[lsu_bus_buffer.scala 418:52]
node _T_2905 = eq(WrPtr0_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 418:82]
node _T_2906 = and(_T_2904, _T_2905) @[lsu_bus_buffer.scala 418:71]
node _T_2907 = or(_T_2900, _T_2906) @[lsu_bus_buffer.scala 417:110]
node _T_2908 = and(_T_2888, _T_2907) @[lsu_bus_buffer.scala 415:112]
node _T_2909 = eq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 415:82]
node _T_2910 = and(_T_2909, buf_state_en[1]) @[lsu_bus_buffer.scala 415:93]
node _T_2911 = eq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 416:21]
node _T_2912 = eq(buf_state[1], UInt<3>("h06")) @[lsu_bus_buffer.scala 416:47]
node _T_2913 = or(_T_2911, _T_2912) @[lsu_bus_buffer.scala 416:32]
node _T_2914 = eq(_T_2913, UInt<1>("h00")) @[lsu_bus_buffer.scala 416:6]
node _T_2915 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 417:23]
node _T_2916 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 417:53]
node _T_2917 = and(_T_2915, _T_2916) @[lsu_bus_buffer.scala 417:41]
node _T_2918 = eq(WrPtr0_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 417:82]
node _T_2919 = and(_T_2917, _T_2918) @[lsu_bus_buffer.scala 417:71]
node _T_2920 = eq(ibuf_tag, UInt<1>("h01")) @[lsu_bus_buffer.scala 417:101]
node _T_2921 = and(_T_2919, _T_2920) @[lsu_bus_buffer.scala 417:90]
node _T_2922 = or(_T_2914, _T_2921) @[lsu_bus_buffer.scala 416:59]
node _T_2923 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 418:17]
node _T_2924 = and(_T_2923, io.ldst_dual_r) @[lsu_bus_buffer.scala 418:35]
node _T_2925 = eq(WrPtr1_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 418:63]
node _T_2926 = and(_T_2924, _T_2925) @[lsu_bus_buffer.scala 418:52]
node _T_2927 = eq(WrPtr0_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 418:82]
node _T_2928 = and(_T_2926, _T_2927) @[lsu_bus_buffer.scala 418:71]
node _T_2929 = or(_T_2922, _T_2928) @[lsu_bus_buffer.scala 417:110]
node _T_2930 = and(_T_2910, _T_2929) @[lsu_bus_buffer.scala 415:112]
node _T_2931 = eq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 415:82]
node _T_2932 = and(_T_2931, buf_state_en[1]) @[lsu_bus_buffer.scala 415:93]
node _T_2933 = eq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 416:21]
node _T_2934 = eq(buf_state[2], UInt<3>("h06")) @[lsu_bus_buffer.scala 416:47]
node _T_2935 = or(_T_2933, _T_2934) @[lsu_bus_buffer.scala 416:32]
node _T_2936 = eq(_T_2935, UInt<1>("h00")) @[lsu_bus_buffer.scala 416:6]
node _T_2937 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 417:23]
node _T_2938 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 417:53]
node _T_2939 = and(_T_2937, _T_2938) @[lsu_bus_buffer.scala 417:41]
node _T_2940 = eq(WrPtr0_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 417:82]
node _T_2941 = and(_T_2939, _T_2940) @[lsu_bus_buffer.scala 417:71]
node _T_2942 = eq(ibuf_tag, UInt<2>("h02")) @[lsu_bus_buffer.scala 417:101]
node _T_2943 = and(_T_2941, _T_2942) @[lsu_bus_buffer.scala 417:90]
node _T_2944 = or(_T_2936, _T_2943) @[lsu_bus_buffer.scala 416:59]
node _T_2945 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 418:17]
node _T_2946 = and(_T_2945, io.ldst_dual_r) @[lsu_bus_buffer.scala 418:35]
node _T_2947 = eq(WrPtr1_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 418:63]
node _T_2948 = and(_T_2946, _T_2947) @[lsu_bus_buffer.scala 418:52]
node _T_2949 = eq(WrPtr0_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 418:82]
node _T_2950 = and(_T_2948, _T_2949) @[lsu_bus_buffer.scala 418:71]
node _T_2951 = or(_T_2944, _T_2950) @[lsu_bus_buffer.scala 417:110]
node _T_2952 = and(_T_2932, _T_2951) @[lsu_bus_buffer.scala 415:112]
node _T_2953 = eq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 415:82]
node _T_2954 = and(_T_2953, buf_state_en[1]) @[lsu_bus_buffer.scala 415:93]
node _T_2955 = eq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 416:21]
node _T_2956 = eq(buf_state[3], UInt<3>("h06")) @[lsu_bus_buffer.scala 416:47]
node _T_2957 = or(_T_2955, _T_2956) @[lsu_bus_buffer.scala 416:32]
node _T_2958 = eq(_T_2957, UInt<1>("h00")) @[lsu_bus_buffer.scala 416:6]
node _T_2959 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 417:23]
node _T_2960 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 417:53]
node _T_2961 = and(_T_2959, _T_2960) @[lsu_bus_buffer.scala 417:41]
node _T_2962 = eq(WrPtr0_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 417:82]
node _T_2963 = and(_T_2961, _T_2962) @[lsu_bus_buffer.scala 417:71]
node _T_2964 = eq(ibuf_tag, UInt<2>("h03")) @[lsu_bus_buffer.scala 417:101]
node _T_2965 = and(_T_2963, _T_2964) @[lsu_bus_buffer.scala 417:90]
node _T_2966 = or(_T_2958, _T_2965) @[lsu_bus_buffer.scala 416:59]
node _T_2967 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 418:17]
node _T_2968 = and(_T_2967, io.ldst_dual_r) @[lsu_bus_buffer.scala 418:35]
node _T_2969 = eq(WrPtr1_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 418:63]
node _T_2970 = and(_T_2968, _T_2969) @[lsu_bus_buffer.scala 418:52]
node _T_2971 = eq(WrPtr0_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 418:82]
node _T_2972 = and(_T_2970, _T_2971) @[lsu_bus_buffer.scala 418:71]
node _T_2973 = or(_T_2966, _T_2972) @[lsu_bus_buffer.scala 417:110]
node _T_2974 = and(_T_2954, _T_2973) @[lsu_bus_buffer.scala 415:112]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_2975 = cat(_T_2974, _T_2952) @[Cat.scala 29:58]
node _T_2976 = cat(_T_2975, _T_2930) @[Cat.scala 29:58]
node _T_2977 = cat(_T_2976, _T_2908) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_2978 = eq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 415:82]
node _T_2979 = and(_T_2978, buf_state_en[2]) @[lsu_bus_buffer.scala 415:93]
node _T_2980 = eq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 416:21]
node _T_2981 = eq(buf_state[0], UInt<3>("h06")) @[lsu_bus_buffer.scala 416:47]
node _T_2982 = or(_T_2980, _T_2981) @[lsu_bus_buffer.scala 416:32]
node _T_2983 = eq(_T_2982, UInt<1>("h00")) @[lsu_bus_buffer.scala 416:6]
node _T_2984 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 417:23]
node _T_2985 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 417:53]
node _T_2986 = and(_T_2984, _T_2985) @[lsu_bus_buffer.scala 417:41]
node _T_2987 = eq(WrPtr0_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 417:82]
node _T_2988 = and(_T_2986, _T_2987) @[lsu_bus_buffer.scala 417:71]
node _T_2989 = eq(ibuf_tag, UInt<1>("h00")) @[lsu_bus_buffer.scala 417:101]
node _T_2990 = and(_T_2988, _T_2989) @[lsu_bus_buffer.scala 417:90]
node _T_2991 = or(_T_2983, _T_2990) @[lsu_bus_buffer.scala 416:59]
node _T_2992 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 418:17]
node _T_2993 = and(_T_2992, io.ldst_dual_r) @[lsu_bus_buffer.scala 418:35]
node _T_2994 = eq(WrPtr1_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 418:63]
node _T_2995 = and(_T_2993, _T_2994) @[lsu_bus_buffer.scala 418:52]
node _T_2996 = eq(WrPtr0_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 418:82]
node _T_2997 = and(_T_2995, _T_2996) @[lsu_bus_buffer.scala 418:71]
node _T_2998 = or(_T_2991, _T_2997) @[lsu_bus_buffer.scala 417:110]
node _T_2999 = and(_T_2979, _T_2998) @[lsu_bus_buffer.scala 415:112]
node _T_3000 = eq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 415:82]
node _T_3001 = and(_T_3000, buf_state_en[2]) @[lsu_bus_buffer.scala 415:93]
node _T_3002 = eq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 416:21]
node _T_3003 = eq(buf_state[1], UInt<3>("h06")) @[lsu_bus_buffer.scala 416:47]
node _T_3004 = or(_T_3002, _T_3003) @[lsu_bus_buffer.scala 416:32]
node _T_3005 = eq(_T_3004, UInt<1>("h00")) @[lsu_bus_buffer.scala 416:6]
node _T_3006 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 417:23]
node _T_3007 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 417:53]
node _T_3008 = and(_T_3006, _T_3007) @[lsu_bus_buffer.scala 417:41]
node _T_3009 = eq(WrPtr0_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 417:82]
node _T_3010 = and(_T_3008, _T_3009) @[lsu_bus_buffer.scala 417:71]
node _T_3011 = eq(ibuf_tag, UInt<1>("h01")) @[lsu_bus_buffer.scala 417:101]
node _T_3012 = and(_T_3010, _T_3011) @[lsu_bus_buffer.scala 417:90]
node _T_3013 = or(_T_3005, _T_3012) @[lsu_bus_buffer.scala 416:59]
node _T_3014 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 418:17]
node _T_3015 = and(_T_3014, io.ldst_dual_r) @[lsu_bus_buffer.scala 418:35]
node _T_3016 = eq(WrPtr1_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 418:63]
node _T_3017 = and(_T_3015, _T_3016) @[lsu_bus_buffer.scala 418:52]
node _T_3018 = eq(WrPtr0_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 418:82]
node _T_3019 = and(_T_3017, _T_3018) @[lsu_bus_buffer.scala 418:71]
node _T_3020 = or(_T_3013, _T_3019) @[lsu_bus_buffer.scala 417:110]
node _T_3021 = and(_T_3001, _T_3020) @[lsu_bus_buffer.scala 415:112]
node _T_3022 = eq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 415:82]
node _T_3023 = and(_T_3022, buf_state_en[2]) @[lsu_bus_buffer.scala 415:93]
node _T_3024 = eq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 416:21]
node _T_3025 = eq(buf_state[2], UInt<3>("h06")) @[lsu_bus_buffer.scala 416:47]
node _T_3026 = or(_T_3024, _T_3025) @[lsu_bus_buffer.scala 416:32]
node _T_3027 = eq(_T_3026, UInt<1>("h00")) @[lsu_bus_buffer.scala 416:6]
node _T_3028 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 417:23]
node _T_3029 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 417:53]
node _T_3030 = and(_T_3028, _T_3029) @[lsu_bus_buffer.scala 417:41]
node _T_3031 = eq(WrPtr0_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 417:82]
node _T_3032 = and(_T_3030, _T_3031) @[lsu_bus_buffer.scala 417:71]
node _T_3033 = eq(ibuf_tag, UInt<2>("h02")) @[lsu_bus_buffer.scala 417:101]
node _T_3034 = and(_T_3032, _T_3033) @[lsu_bus_buffer.scala 417:90]
node _T_3035 = or(_T_3027, _T_3034) @[lsu_bus_buffer.scala 416:59]
node _T_3036 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 418:17]
node _T_3037 = and(_T_3036, io.ldst_dual_r) @[lsu_bus_buffer.scala 418:35]
node _T_3038 = eq(WrPtr1_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 418:63]
node _T_3039 = and(_T_3037, _T_3038) @[lsu_bus_buffer.scala 418:52]
node _T_3040 = eq(WrPtr0_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 418:82]
node _T_3041 = and(_T_3039, _T_3040) @[lsu_bus_buffer.scala 418:71]
node _T_3042 = or(_T_3035, _T_3041) @[lsu_bus_buffer.scala 417:110]
node _T_3043 = and(_T_3023, _T_3042) @[lsu_bus_buffer.scala 415:112]
node _T_3044 = eq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 415:82]
node _T_3045 = and(_T_3044, buf_state_en[2]) @[lsu_bus_buffer.scala 415:93]
node _T_3046 = eq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 416:21]
node _T_3047 = eq(buf_state[3], UInt<3>("h06")) @[lsu_bus_buffer.scala 416:47]
node _T_3048 = or(_T_3046, _T_3047) @[lsu_bus_buffer.scala 416:32]
node _T_3049 = eq(_T_3048, UInt<1>("h00")) @[lsu_bus_buffer.scala 416:6]
node _T_3050 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 417:23]
node _T_3051 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 417:53]
node _T_3052 = and(_T_3050, _T_3051) @[lsu_bus_buffer.scala 417:41]
node _T_3053 = eq(WrPtr0_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 417:82]
node _T_3054 = and(_T_3052, _T_3053) @[lsu_bus_buffer.scala 417:71]
node _T_3055 = eq(ibuf_tag, UInt<2>("h03")) @[lsu_bus_buffer.scala 417:101]
node _T_3056 = and(_T_3054, _T_3055) @[lsu_bus_buffer.scala 417:90]
node _T_3057 = or(_T_3049, _T_3056) @[lsu_bus_buffer.scala 416:59]
node _T_3058 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 418:17]
node _T_3059 = and(_T_3058, io.ldst_dual_r) @[lsu_bus_buffer.scala 418:35]
node _T_3060 = eq(WrPtr1_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 418:63]
node _T_3061 = and(_T_3059, _T_3060) @[lsu_bus_buffer.scala 418:52]
node _T_3062 = eq(WrPtr0_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 418:82]
node _T_3063 = and(_T_3061, _T_3062) @[lsu_bus_buffer.scala 418:71]
node _T_3064 = or(_T_3057, _T_3063) @[lsu_bus_buffer.scala 417:110]
node _T_3065 = and(_T_3045, _T_3064) @[lsu_bus_buffer.scala 415:112]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_3066 = cat(_T_3065, _T_3043) @[Cat.scala 29:58]
node _T_3067 = cat(_T_3066, _T_3021) @[Cat.scala 29:58]
node _T_3068 = cat(_T_3067, _T_2999) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_3069 = eq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 415:82]
node _T_3070 = and(_T_3069, buf_state_en[3]) @[lsu_bus_buffer.scala 415:93]
node _T_3071 = eq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 416:21]
node _T_3072 = eq(buf_state[0], UInt<3>("h06")) @[lsu_bus_buffer.scala 416:47]
node _T_3073 = or(_T_3071, _T_3072) @[lsu_bus_buffer.scala 416:32]
node _T_3074 = eq(_T_3073, UInt<1>("h00")) @[lsu_bus_buffer.scala 416:6]
node _T_3075 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 417:23]
node _T_3076 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 417:53]
node _T_3077 = and(_T_3075, _T_3076) @[lsu_bus_buffer.scala 417:41]
node _T_3078 = eq(WrPtr0_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 417:82]
node _T_3079 = and(_T_3077, _T_3078) @[lsu_bus_buffer.scala 417:71]
node _T_3080 = eq(ibuf_tag, UInt<1>("h00")) @[lsu_bus_buffer.scala 417:101]
node _T_3081 = and(_T_3079, _T_3080) @[lsu_bus_buffer.scala 417:90]
node _T_3082 = or(_T_3074, _T_3081) @[lsu_bus_buffer.scala 416:59]
node _T_3083 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 418:17]
node _T_3084 = and(_T_3083, io.ldst_dual_r) @[lsu_bus_buffer.scala 418:35]
node _T_3085 = eq(WrPtr1_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 418:63]
node _T_3086 = and(_T_3084, _T_3085) @[lsu_bus_buffer.scala 418:52]
node _T_3087 = eq(WrPtr0_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 418:82]
node _T_3088 = and(_T_3086, _T_3087) @[lsu_bus_buffer.scala 418:71]
node _T_3089 = or(_T_3082, _T_3088) @[lsu_bus_buffer.scala 417:110]
node _T_3090 = and(_T_3070, _T_3089) @[lsu_bus_buffer.scala 415:112]
node _T_3091 = eq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 415:82]
node _T_3092 = and(_T_3091, buf_state_en[3]) @[lsu_bus_buffer.scala 415:93]
node _T_3093 = eq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 416:21]
node _T_3094 = eq(buf_state[1], UInt<3>("h06")) @[lsu_bus_buffer.scala 416:47]
node _T_3095 = or(_T_3093, _T_3094) @[lsu_bus_buffer.scala 416:32]
node _T_3096 = eq(_T_3095, UInt<1>("h00")) @[lsu_bus_buffer.scala 416:6]
node _T_3097 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 417:23]
node _T_3098 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 417:53]
node _T_3099 = and(_T_3097, _T_3098) @[lsu_bus_buffer.scala 417:41]
node _T_3100 = eq(WrPtr0_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 417:82]
node _T_3101 = and(_T_3099, _T_3100) @[lsu_bus_buffer.scala 417:71]
node _T_3102 = eq(ibuf_tag, UInt<1>("h01")) @[lsu_bus_buffer.scala 417:101]
node _T_3103 = and(_T_3101, _T_3102) @[lsu_bus_buffer.scala 417:90]
node _T_3104 = or(_T_3096, _T_3103) @[lsu_bus_buffer.scala 416:59]
node _T_3105 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 418:17]
node _T_3106 = and(_T_3105, io.ldst_dual_r) @[lsu_bus_buffer.scala 418:35]
node _T_3107 = eq(WrPtr1_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 418:63]
node _T_3108 = and(_T_3106, _T_3107) @[lsu_bus_buffer.scala 418:52]
node _T_3109 = eq(WrPtr0_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 418:82]
node _T_3110 = and(_T_3108, _T_3109) @[lsu_bus_buffer.scala 418:71]
node _T_3111 = or(_T_3104, _T_3110) @[lsu_bus_buffer.scala 417:110]
node _T_3112 = and(_T_3092, _T_3111) @[lsu_bus_buffer.scala 415:112]
node _T_3113 = eq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 415:82]
node _T_3114 = and(_T_3113, buf_state_en[3]) @[lsu_bus_buffer.scala 415:93]
node _T_3115 = eq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 416:21]
node _T_3116 = eq(buf_state[2], UInt<3>("h06")) @[lsu_bus_buffer.scala 416:47]
node _T_3117 = or(_T_3115, _T_3116) @[lsu_bus_buffer.scala 416:32]
node _T_3118 = eq(_T_3117, UInt<1>("h00")) @[lsu_bus_buffer.scala 416:6]
node _T_3119 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 417:23]
node _T_3120 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 417:53]
node _T_3121 = and(_T_3119, _T_3120) @[lsu_bus_buffer.scala 417:41]
node _T_3122 = eq(WrPtr0_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 417:82]
node _T_3123 = and(_T_3121, _T_3122) @[lsu_bus_buffer.scala 417:71]
node _T_3124 = eq(ibuf_tag, UInt<2>("h02")) @[lsu_bus_buffer.scala 417:101]
node _T_3125 = and(_T_3123, _T_3124) @[lsu_bus_buffer.scala 417:90]
node _T_3126 = or(_T_3118, _T_3125) @[lsu_bus_buffer.scala 416:59]
node _T_3127 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 418:17]
node _T_3128 = and(_T_3127, io.ldst_dual_r) @[lsu_bus_buffer.scala 418:35]
node _T_3129 = eq(WrPtr1_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 418:63]
node _T_3130 = and(_T_3128, _T_3129) @[lsu_bus_buffer.scala 418:52]
node _T_3131 = eq(WrPtr0_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 418:82]
node _T_3132 = and(_T_3130, _T_3131) @[lsu_bus_buffer.scala 418:71]
node _T_3133 = or(_T_3126, _T_3132) @[lsu_bus_buffer.scala 417:110]
node _T_3134 = and(_T_3114, _T_3133) @[lsu_bus_buffer.scala 415:112]
node _T_3135 = eq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 415:82]
node _T_3136 = and(_T_3135, buf_state_en[3]) @[lsu_bus_buffer.scala 415:93]
node _T_3137 = eq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 416:21]
node _T_3138 = eq(buf_state[3], UInt<3>("h06")) @[lsu_bus_buffer.scala 416:47]
node _T_3139 = or(_T_3137, _T_3138) @[lsu_bus_buffer.scala 416:32]
node _T_3140 = eq(_T_3139, UInt<1>("h00")) @[lsu_bus_buffer.scala 416:6]
node _T_3141 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 417:23]
node _T_3142 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 417:53]
node _T_3143 = and(_T_3141, _T_3142) @[lsu_bus_buffer.scala 417:41]
node _T_3144 = eq(WrPtr0_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 417:82]
node _T_3145 = and(_T_3143, _T_3144) @[lsu_bus_buffer.scala 417:71]
node _T_3146 = eq(ibuf_tag, UInt<2>("h03")) @[lsu_bus_buffer.scala 417:101]
node _T_3147 = and(_T_3145, _T_3146) @[lsu_bus_buffer.scala 417:90]
node _T_3148 = or(_T_3140, _T_3147) @[lsu_bus_buffer.scala 416:59]
node _T_3149 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 418:17]
node _T_3150 = and(_T_3149, io.ldst_dual_r) @[lsu_bus_buffer.scala 418:35]
node _T_3151 = eq(WrPtr1_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 418:63]
node _T_3152 = and(_T_3150, _T_3151) @[lsu_bus_buffer.scala 418:52]
node _T_3153 = eq(WrPtr0_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 418:82]
node _T_3154 = and(_T_3152, _T_3153) @[lsu_bus_buffer.scala 418:71]
node _T_3155 = or(_T_3148, _T_3154) @[lsu_bus_buffer.scala 417:110]
node _T_3156 = and(_T_3136, _T_3155) @[lsu_bus_buffer.scala 415:112]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_3157 = cat(_T_3156, _T_3134) @[Cat.scala 29:58]
node _T_3158 = cat(_T_3157, _T_3112) @[Cat.scala 29:58]
node _T_3159 = cat(_T_3158, _T_3090) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_rspage_set[0] <= _T_2886 @[lsu_bus_buffer.scala 415:18]
buf_rspage_set[1] <= _T_2977 @[lsu_bus_buffer.scala 415:18]
buf_rspage_set[2] <= _T_3068 @[lsu_bus_buffer.scala 415:18]
buf_rspage_set[3] <= _T_3159 @[lsu_bus_buffer.scala 415:18]
node _T_3160 = bits(buf_rspage_set[0], 0, 0) @[lsu_bus_buffer.scala 419:84]
node _T_3161 = bits(buf_rspage[0], 0, 0) @[lsu_bus_buffer.scala 419:103]
node _T_3162 = or(_T_3160, _T_3161) @[lsu_bus_buffer.scala 419:88]
node _T_3163 = bits(buf_rspage_set[0], 1, 1) @[lsu_bus_buffer.scala 419:84]
node _T_3164 = bits(buf_rspage[0], 1, 1) @[lsu_bus_buffer.scala 419:103]
node _T_3165 = or(_T_3163, _T_3164) @[lsu_bus_buffer.scala 419:88]
node _T_3166 = bits(buf_rspage_set[0], 2, 2) @[lsu_bus_buffer.scala 419:84]
node _T_3167 = bits(buf_rspage[0], 2, 2) @[lsu_bus_buffer.scala 419:103]
node _T_3168 = or(_T_3166, _T_3167) @[lsu_bus_buffer.scala 419:88]
node _T_3169 = bits(buf_rspage_set[0], 3, 3) @[lsu_bus_buffer.scala 419:84]
node _T_3170 = bits(buf_rspage[0], 3, 3) @[lsu_bus_buffer.scala 419:103]
node _T_3171 = or(_T_3169, _T_3170) @[lsu_bus_buffer.scala 419:88]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_3172 = cat(_T_3171, _T_3168) @[Cat.scala 29:58]
node _T_3173 = cat(_T_3172, _T_3165) @[Cat.scala 29:58]
node _T_3174 = cat(_T_3173, _T_3162) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_3175 = bits(buf_rspage_set[1], 0, 0) @[lsu_bus_buffer.scala 419:84]
node _T_3176 = bits(buf_rspage[1], 0, 0) @[lsu_bus_buffer.scala 419:103]
node _T_3177 = or(_T_3175, _T_3176) @[lsu_bus_buffer.scala 419:88]
node _T_3178 = bits(buf_rspage_set[1], 1, 1) @[lsu_bus_buffer.scala 419:84]
node _T_3179 = bits(buf_rspage[1], 1, 1) @[lsu_bus_buffer.scala 419:103]
node _T_3180 = or(_T_3178, _T_3179) @[lsu_bus_buffer.scala 419:88]
node _T_3181 = bits(buf_rspage_set[1], 2, 2) @[lsu_bus_buffer.scala 419:84]
node _T_3182 = bits(buf_rspage[1], 2, 2) @[lsu_bus_buffer.scala 419:103]
node _T_3183 = or(_T_3181, _T_3182) @[lsu_bus_buffer.scala 419:88]
node _T_3184 = bits(buf_rspage_set[1], 3, 3) @[lsu_bus_buffer.scala 419:84]
node _T_3185 = bits(buf_rspage[1], 3, 3) @[lsu_bus_buffer.scala 419:103]
node _T_3186 = or(_T_3184, _T_3185) @[lsu_bus_buffer.scala 419:88]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_3187 = cat(_T_3186, _T_3183) @[Cat.scala 29:58]
node _T_3188 = cat(_T_3187, _T_3180) @[Cat.scala 29:58]
node _T_3189 = cat(_T_3188, _T_3177) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_3190 = bits(buf_rspage_set[2], 0, 0) @[lsu_bus_buffer.scala 419:84]
node _T_3191 = bits(buf_rspage[2], 0, 0) @[lsu_bus_buffer.scala 419:103]
node _T_3192 = or(_T_3190, _T_3191) @[lsu_bus_buffer.scala 419:88]
node _T_3193 = bits(buf_rspage_set[2], 1, 1) @[lsu_bus_buffer.scala 419:84]
node _T_3194 = bits(buf_rspage[2], 1, 1) @[lsu_bus_buffer.scala 419:103]
node _T_3195 = or(_T_3193, _T_3194) @[lsu_bus_buffer.scala 419:88]
node _T_3196 = bits(buf_rspage_set[2], 2, 2) @[lsu_bus_buffer.scala 419:84]
node _T_3197 = bits(buf_rspage[2], 2, 2) @[lsu_bus_buffer.scala 419:103]
node _T_3198 = or(_T_3196, _T_3197) @[lsu_bus_buffer.scala 419:88]
node _T_3199 = bits(buf_rspage_set[2], 3, 3) @[lsu_bus_buffer.scala 419:84]
node _T_3200 = bits(buf_rspage[2], 3, 3) @[lsu_bus_buffer.scala 419:103]
node _T_3201 = or(_T_3199, _T_3200) @[lsu_bus_buffer.scala 419:88]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_3202 = cat(_T_3201, _T_3198) @[Cat.scala 29:58]
node _T_3203 = cat(_T_3202, _T_3195) @[Cat.scala 29:58]
node _T_3204 = cat(_T_3203, _T_3192) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_3205 = bits(buf_rspage_set[3], 0, 0) @[lsu_bus_buffer.scala 419:84]
node _T_3206 = bits(buf_rspage[3], 0, 0) @[lsu_bus_buffer.scala 419:103]
node _T_3207 = or(_T_3205, _T_3206) @[lsu_bus_buffer.scala 419:88]
node _T_3208 = bits(buf_rspage_set[3], 1, 1) @[lsu_bus_buffer.scala 419:84]
node _T_3209 = bits(buf_rspage[3], 1, 1) @[lsu_bus_buffer.scala 419:103]
node _T_3210 = or(_T_3208, _T_3209) @[lsu_bus_buffer.scala 419:88]
node _T_3211 = bits(buf_rspage_set[3], 2, 2) @[lsu_bus_buffer.scala 419:84]
node _T_3212 = bits(buf_rspage[3], 2, 2) @[lsu_bus_buffer.scala 419:103]
node _T_3213 = or(_T_3211, _T_3212) @[lsu_bus_buffer.scala 419:88]
node _T_3214 = bits(buf_rspage_set[3], 3, 3) @[lsu_bus_buffer.scala 419:84]
node _T_3215 = bits(buf_rspage[3], 3, 3) @[lsu_bus_buffer.scala 419:103]
node _T_3216 = or(_T_3214, _T_3215) @[lsu_bus_buffer.scala 419:88]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_3217 = cat(_T_3216, _T_3213) @[Cat.scala 29:58]
node _T_3218 = cat(_T_3217, _T_3210) @[Cat.scala 29:58]
node _T_3219 = cat(_T_3218, _T_3207) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_rspage_in[0] <= _T_3174 @[lsu_bus_buffer.scala 419:17]
buf_rspage_in[1] <= _T_3189 @[lsu_bus_buffer.scala 419:17]
buf_rspage_in[2] <= _T_3204 @[lsu_bus_buffer.scala 419:17]
buf_rspage_in[3] <= _T_3219 @[lsu_bus_buffer.scala 419:17]
node _T_3220 = bits(buf_rspageQ[0], 0, 0) @[lsu_bus_buffer.scala 420:78]
node _T_3221 = eq(buf_state[0], UInt<3>("h06")) @[lsu_bus_buffer.scala 420:99]
node _T_3222 = eq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 420:125]
node _T_3223 = or(_T_3221, _T_3222) @[lsu_bus_buffer.scala 420:110]
node _T_3224 = eq(_T_3223, UInt<1>("h00")) @[lsu_bus_buffer.scala 420:84]
node _T_3225 = and(_T_3220, _T_3224) @[lsu_bus_buffer.scala 420:82]
node _T_3226 = bits(buf_rspageQ[0], 1, 1) @[lsu_bus_buffer.scala 420:78]
node _T_3227 = eq(buf_state[1], UInt<3>("h06")) @[lsu_bus_buffer.scala 420:99]
node _T_3228 = eq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 420:125]
node _T_3229 = or(_T_3227, _T_3228) @[lsu_bus_buffer.scala 420:110]
node _T_3230 = eq(_T_3229, UInt<1>("h00")) @[lsu_bus_buffer.scala 420:84]
node _T_3231 = and(_T_3226, _T_3230) @[lsu_bus_buffer.scala 420:82]
node _T_3232 = bits(buf_rspageQ[0], 2, 2) @[lsu_bus_buffer.scala 420:78]
node _T_3233 = eq(buf_state[2], UInt<3>("h06")) @[lsu_bus_buffer.scala 420:99]
node _T_3234 = eq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 420:125]
node _T_3235 = or(_T_3233, _T_3234) @[lsu_bus_buffer.scala 420:110]
node _T_3236 = eq(_T_3235, UInt<1>("h00")) @[lsu_bus_buffer.scala 420:84]
node _T_3237 = and(_T_3232, _T_3236) @[lsu_bus_buffer.scala 420:82]
node _T_3238 = bits(buf_rspageQ[0], 3, 3) @[lsu_bus_buffer.scala 420:78]
node _T_3239 = eq(buf_state[3], UInt<3>("h06")) @[lsu_bus_buffer.scala 420:99]
node _T_3240 = eq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 420:125]
node _T_3241 = or(_T_3239, _T_3240) @[lsu_bus_buffer.scala 420:110]
node _T_3242 = eq(_T_3241, UInt<1>("h00")) @[lsu_bus_buffer.scala 420:84]
node _T_3243 = and(_T_3238, _T_3242) @[lsu_bus_buffer.scala 420:82]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_3244 = cat(_T_3243, _T_3237) @[Cat.scala 29:58]
node _T_3245 = cat(_T_3244, _T_3231) @[Cat.scala 29:58]
node _T_3246 = cat(_T_3245, _T_3225) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_3247 = bits(buf_rspageQ[1], 0, 0) @[lsu_bus_buffer.scala 420:78]
node _T_3248 = eq(buf_state[0], UInt<3>("h06")) @[lsu_bus_buffer.scala 420:99]
node _T_3249 = eq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 420:125]
node _T_3250 = or(_T_3248, _T_3249) @[lsu_bus_buffer.scala 420:110]
node _T_3251 = eq(_T_3250, UInt<1>("h00")) @[lsu_bus_buffer.scala 420:84]
node _T_3252 = and(_T_3247, _T_3251) @[lsu_bus_buffer.scala 420:82]
node _T_3253 = bits(buf_rspageQ[1], 1, 1) @[lsu_bus_buffer.scala 420:78]
node _T_3254 = eq(buf_state[1], UInt<3>("h06")) @[lsu_bus_buffer.scala 420:99]
node _T_3255 = eq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 420:125]
node _T_3256 = or(_T_3254, _T_3255) @[lsu_bus_buffer.scala 420:110]
node _T_3257 = eq(_T_3256, UInt<1>("h00")) @[lsu_bus_buffer.scala 420:84]
node _T_3258 = and(_T_3253, _T_3257) @[lsu_bus_buffer.scala 420:82]
node _T_3259 = bits(buf_rspageQ[1], 2, 2) @[lsu_bus_buffer.scala 420:78]
node _T_3260 = eq(buf_state[2], UInt<3>("h06")) @[lsu_bus_buffer.scala 420:99]
node _T_3261 = eq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 420:125]
node _T_3262 = or(_T_3260, _T_3261) @[lsu_bus_buffer.scala 420:110]
node _T_3263 = eq(_T_3262, UInt<1>("h00")) @[lsu_bus_buffer.scala 420:84]
node _T_3264 = and(_T_3259, _T_3263) @[lsu_bus_buffer.scala 420:82]
node _T_3265 = bits(buf_rspageQ[1], 3, 3) @[lsu_bus_buffer.scala 420:78]
node _T_3266 = eq(buf_state[3], UInt<3>("h06")) @[lsu_bus_buffer.scala 420:99]
node _T_3267 = eq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 420:125]
node _T_3268 = or(_T_3266, _T_3267) @[lsu_bus_buffer.scala 420:110]
node _T_3269 = eq(_T_3268, UInt<1>("h00")) @[lsu_bus_buffer.scala 420:84]
node _T_3270 = and(_T_3265, _T_3269) @[lsu_bus_buffer.scala 420:82]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_3271 = cat(_T_3270, _T_3264) @[Cat.scala 29:58]
node _T_3272 = cat(_T_3271, _T_3258) @[Cat.scala 29:58]
node _T_3273 = cat(_T_3272, _T_3252) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_3274 = bits(buf_rspageQ[2], 0, 0) @[lsu_bus_buffer.scala 420:78]
node _T_3275 = eq(buf_state[0], UInt<3>("h06")) @[lsu_bus_buffer.scala 420:99]
node _T_3276 = eq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 420:125]
node _T_3277 = or(_T_3275, _T_3276) @[lsu_bus_buffer.scala 420:110]
node _T_3278 = eq(_T_3277, UInt<1>("h00")) @[lsu_bus_buffer.scala 420:84]
node _T_3279 = and(_T_3274, _T_3278) @[lsu_bus_buffer.scala 420:82]
node _T_3280 = bits(buf_rspageQ[2], 1, 1) @[lsu_bus_buffer.scala 420:78]
node _T_3281 = eq(buf_state[1], UInt<3>("h06")) @[lsu_bus_buffer.scala 420:99]
node _T_3282 = eq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 420:125]
node _T_3283 = or(_T_3281, _T_3282) @[lsu_bus_buffer.scala 420:110]
node _T_3284 = eq(_T_3283, UInt<1>("h00")) @[lsu_bus_buffer.scala 420:84]
node _T_3285 = and(_T_3280, _T_3284) @[lsu_bus_buffer.scala 420:82]
node _T_3286 = bits(buf_rspageQ[2], 2, 2) @[lsu_bus_buffer.scala 420:78]
node _T_3287 = eq(buf_state[2], UInt<3>("h06")) @[lsu_bus_buffer.scala 420:99]
node _T_3288 = eq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 420:125]
node _T_3289 = or(_T_3287, _T_3288) @[lsu_bus_buffer.scala 420:110]
node _T_3290 = eq(_T_3289, UInt<1>("h00")) @[lsu_bus_buffer.scala 420:84]
node _T_3291 = and(_T_3286, _T_3290) @[lsu_bus_buffer.scala 420:82]
node _T_3292 = bits(buf_rspageQ[2], 3, 3) @[lsu_bus_buffer.scala 420:78]
node _T_3293 = eq(buf_state[3], UInt<3>("h06")) @[lsu_bus_buffer.scala 420:99]
node _T_3294 = eq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 420:125]
node _T_3295 = or(_T_3293, _T_3294) @[lsu_bus_buffer.scala 420:110]
node _T_3296 = eq(_T_3295, UInt<1>("h00")) @[lsu_bus_buffer.scala 420:84]
node _T_3297 = and(_T_3292, _T_3296) @[lsu_bus_buffer.scala 420:82]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_3298 = cat(_T_3297, _T_3291) @[Cat.scala 29:58]
node _T_3299 = cat(_T_3298, _T_3285) @[Cat.scala 29:58]
node _T_3300 = cat(_T_3299, _T_3279) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_3301 = bits(buf_rspageQ[3], 0, 0) @[lsu_bus_buffer.scala 420:78]
node _T_3302 = eq(buf_state[0], UInt<3>("h06")) @[lsu_bus_buffer.scala 420:99]
node _T_3303 = eq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 420:125]
node _T_3304 = or(_T_3302, _T_3303) @[lsu_bus_buffer.scala 420:110]
node _T_3305 = eq(_T_3304, UInt<1>("h00")) @[lsu_bus_buffer.scala 420:84]
node _T_3306 = and(_T_3301, _T_3305) @[lsu_bus_buffer.scala 420:82]
node _T_3307 = bits(buf_rspageQ[3], 1, 1) @[lsu_bus_buffer.scala 420:78]
node _T_3308 = eq(buf_state[1], UInt<3>("h06")) @[lsu_bus_buffer.scala 420:99]
node _T_3309 = eq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 420:125]
node _T_3310 = or(_T_3308, _T_3309) @[lsu_bus_buffer.scala 420:110]
node _T_3311 = eq(_T_3310, UInt<1>("h00")) @[lsu_bus_buffer.scala 420:84]
node _T_3312 = and(_T_3307, _T_3311) @[lsu_bus_buffer.scala 420:82]
node _T_3313 = bits(buf_rspageQ[3], 2, 2) @[lsu_bus_buffer.scala 420:78]
node _T_3314 = eq(buf_state[2], UInt<3>("h06")) @[lsu_bus_buffer.scala 420:99]
node _T_3315 = eq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 420:125]
node _T_3316 = or(_T_3314, _T_3315) @[lsu_bus_buffer.scala 420:110]
node _T_3317 = eq(_T_3316, UInt<1>("h00")) @[lsu_bus_buffer.scala 420:84]
node _T_3318 = and(_T_3313, _T_3317) @[lsu_bus_buffer.scala 420:82]
node _T_3319 = bits(buf_rspageQ[3], 3, 3) @[lsu_bus_buffer.scala 420:78]
node _T_3320 = eq(buf_state[3], UInt<3>("h06")) @[lsu_bus_buffer.scala 420:99]
node _T_3321 = eq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 420:125]
node _T_3322 = or(_T_3320, _T_3321) @[lsu_bus_buffer.scala 420:110]
node _T_3323 = eq(_T_3322, UInt<1>("h00")) @[lsu_bus_buffer.scala 420:84]
node _T_3324 = and(_T_3319, _T_3323) @[lsu_bus_buffer.scala 420:82]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_3325 = cat(_T_3324, _T_3318) @[Cat.scala 29:58]
node _T_3326 = cat(_T_3325, _T_3312) @[Cat.scala 29:58]
node _T_3327 = cat(_T_3326, _T_3306) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_rspage[0] <= _T_3246 @[lsu_bus_buffer.scala 420:14]
buf_rspage[1] <= _T_3273 @[lsu_bus_buffer.scala 420:14]
buf_rspage[2] <= _T_3300 @[lsu_bus_buffer.scala 420:14]
buf_rspage[3] <= _T_3327 @[lsu_bus_buffer.scala 420:14]
node _T_3328 = eq(ibuf_tag, UInt<1>("h00")) @[lsu_bus_buffer.scala 425:75]
node _T_3329 = and(ibuf_drain_vld, _T_3328) @[lsu_bus_buffer.scala 425:63]
node _T_3330 = eq(ibuf_tag, UInt<1>("h01")) @[lsu_bus_buffer.scala 425:75]
node _T_3331 = and(ibuf_drain_vld, _T_3330) @[lsu_bus_buffer.scala 425:63]
node _T_3332 = eq(ibuf_tag, UInt<2>("h02")) @[lsu_bus_buffer.scala 425:75]
node _T_3333 = and(ibuf_drain_vld, _T_3332) @[lsu_bus_buffer.scala 425:63]
node _T_3334 = eq(ibuf_tag, UInt<2>("h03")) @[lsu_bus_buffer.scala 425:75]
node _T_3335 = and(ibuf_drain_vld, _T_3334) @[lsu_bus_buffer.scala 425:63]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_3336 = cat(_T_3335, _T_3333) @[Cat.scala 29:58]
node _T_3337 = cat(_T_3336, _T_3331) @[Cat.scala 29:58]
node _T_3338 = cat(_T_3337, _T_3329) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
ibuf_drainvec_vld <= _T_3338 @[lsu_bus_buffer.scala 425:21]
node _T_3339 = bits(ibuf_drainvec_vld, 0, 0) @[lsu_bus_buffer.scala 426:64]
node _T_3340 = bits(ibuf_byteen_out, 3, 0) @[lsu_bus_buffer.scala 426:84]
node _T_3341 = and(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 427:18]
node _T_3342 = eq(WrPtr1_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 427:46]
node _T_3343 = and(_T_3341, _T_3342) @[lsu_bus_buffer.scala 427:35]
node _T_3344 = bits(ldst_byteen_hi_r, 3, 0) @[lsu_bus_buffer.scala 427:71]
node _T_3345 = bits(ldst_byteen_lo_r, 3, 0) @[lsu_bus_buffer.scala 427:94]
node _T_3346 = mux(_T_3343, _T_3344, _T_3345) @[lsu_bus_buffer.scala 427:8]
node _T_3347 = mux(_T_3339, _T_3340, _T_3346) @[lsu_bus_buffer.scala 426:46]
node _T_3348 = bits(ibuf_drainvec_vld, 1, 1) @[lsu_bus_buffer.scala 426:64]
node _T_3349 = bits(ibuf_byteen_out, 3, 0) @[lsu_bus_buffer.scala 426:84]
node _T_3350 = and(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 427:18]
node _T_3351 = eq(WrPtr1_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 427:46]
node _T_3352 = and(_T_3350, _T_3351) @[lsu_bus_buffer.scala 427:35]
node _T_3353 = bits(ldst_byteen_hi_r, 3, 0) @[lsu_bus_buffer.scala 427:71]
node _T_3354 = bits(ldst_byteen_lo_r, 3, 0) @[lsu_bus_buffer.scala 427:94]
node _T_3355 = mux(_T_3352, _T_3353, _T_3354) @[lsu_bus_buffer.scala 427:8]
node _T_3356 = mux(_T_3348, _T_3349, _T_3355) @[lsu_bus_buffer.scala 426:46]
node _T_3357 = bits(ibuf_drainvec_vld, 2, 2) @[lsu_bus_buffer.scala 426:64]
node _T_3358 = bits(ibuf_byteen_out, 3, 0) @[lsu_bus_buffer.scala 426:84]
node _T_3359 = and(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 427:18]
node _T_3360 = eq(WrPtr1_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 427:46]
node _T_3361 = and(_T_3359, _T_3360) @[lsu_bus_buffer.scala 427:35]
node _T_3362 = bits(ldst_byteen_hi_r, 3, 0) @[lsu_bus_buffer.scala 427:71]
node _T_3363 = bits(ldst_byteen_lo_r, 3, 0) @[lsu_bus_buffer.scala 427:94]
node _T_3364 = mux(_T_3361, _T_3362, _T_3363) @[lsu_bus_buffer.scala 427:8]
node _T_3365 = mux(_T_3357, _T_3358, _T_3364) @[lsu_bus_buffer.scala 426:46]
node _T_3366 = bits(ibuf_drainvec_vld, 3, 3) @[lsu_bus_buffer.scala 426:64]
node _T_3367 = bits(ibuf_byteen_out, 3, 0) @[lsu_bus_buffer.scala 426:84]
node _T_3368 = and(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 427:18]
node _T_3369 = eq(WrPtr1_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 427:46]
node _T_3370 = and(_T_3368, _T_3369) @[lsu_bus_buffer.scala 427:35]
node _T_3371 = bits(ldst_byteen_hi_r, 3, 0) @[lsu_bus_buffer.scala 427:71]
node _T_3372 = bits(ldst_byteen_lo_r, 3, 0) @[lsu_bus_buffer.scala 427:94]
node _T_3373 = mux(_T_3370, _T_3371, _T_3372) @[lsu_bus_buffer.scala 427:8]
node _T_3374 = mux(_T_3366, _T_3367, _T_3373) @[lsu_bus_buffer.scala 426:46]
buf_byteen_in[0] <= _T_3347 @[lsu_bus_buffer.scala 426:17]
buf_byteen_in[1] <= _T_3356 @[lsu_bus_buffer.scala 426:17]
buf_byteen_in[2] <= _T_3365 @[lsu_bus_buffer.scala 426:17]
buf_byteen_in[3] <= _T_3374 @[lsu_bus_buffer.scala 426:17]
node _T_3375 = bits(ibuf_drainvec_vld, 0, 0) @[lsu_bus_buffer.scala 428:62]
node _T_3376 = and(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 428:91]
node _T_3377 = eq(WrPtr1_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 428:119]
node _T_3378 = and(_T_3376, _T_3377) @[lsu_bus_buffer.scala 428:108]
node _T_3379 = mux(_T_3378, io.end_addr_r, io.lsu_addr_r) @[lsu_bus_buffer.scala 428:81]
node _T_3380 = mux(_T_3375, ibuf_addr, _T_3379) @[lsu_bus_buffer.scala 428:44]
node _T_3381 = bits(ibuf_drainvec_vld, 1, 1) @[lsu_bus_buffer.scala 428:62]
node _T_3382 = and(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 428:91]
node _T_3383 = eq(WrPtr1_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 428:119]
node _T_3384 = and(_T_3382, _T_3383) @[lsu_bus_buffer.scala 428:108]
node _T_3385 = mux(_T_3384, io.end_addr_r, io.lsu_addr_r) @[lsu_bus_buffer.scala 428:81]
node _T_3386 = mux(_T_3381, ibuf_addr, _T_3385) @[lsu_bus_buffer.scala 428:44]
node _T_3387 = bits(ibuf_drainvec_vld, 2, 2) @[lsu_bus_buffer.scala 428:62]
node _T_3388 = and(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 428:91]
node _T_3389 = eq(WrPtr1_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 428:119]
node _T_3390 = and(_T_3388, _T_3389) @[lsu_bus_buffer.scala 428:108]
node _T_3391 = mux(_T_3390, io.end_addr_r, io.lsu_addr_r) @[lsu_bus_buffer.scala 428:81]
node _T_3392 = mux(_T_3387, ibuf_addr, _T_3391) @[lsu_bus_buffer.scala 428:44]
node _T_3393 = bits(ibuf_drainvec_vld, 3, 3) @[lsu_bus_buffer.scala 428:62]
node _T_3394 = and(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 428:91]
node _T_3395 = eq(WrPtr1_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 428:119]
node _T_3396 = and(_T_3394, _T_3395) @[lsu_bus_buffer.scala 428:108]
node _T_3397 = mux(_T_3396, io.end_addr_r, io.lsu_addr_r) @[lsu_bus_buffer.scala 428:81]
node _T_3398 = mux(_T_3393, ibuf_addr, _T_3397) @[lsu_bus_buffer.scala 428:44]
buf_addr_in[0] <= _T_3380 @[lsu_bus_buffer.scala 428:15]
buf_addr_in[1] <= _T_3386 @[lsu_bus_buffer.scala 428:15]
buf_addr_in[2] <= _T_3392 @[lsu_bus_buffer.scala 428:15]
buf_addr_in[3] <= _T_3398 @[lsu_bus_buffer.scala 428:15]
node _T_3399 = bits(ibuf_drainvec_vld, 0, 0) @[lsu_bus_buffer.scala 429:63]
node _T_3400 = mux(_T_3399, ibuf_dual, io.ldst_dual_r) @[lsu_bus_buffer.scala 429:45]
node _T_3401 = bits(ibuf_drainvec_vld, 1, 1) @[lsu_bus_buffer.scala 429:63]
node _T_3402 = mux(_T_3401, ibuf_dual, io.ldst_dual_r) @[lsu_bus_buffer.scala 429:45]
node _T_3403 = bits(ibuf_drainvec_vld, 2, 2) @[lsu_bus_buffer.scala 429:63]
node _T_3404 = mux(_T_3403, ibuf_dual, io.ldst_dual_r) @[lsu_bus_buffer.scala 429:45]
node _T_3405 = bits(ibuf_drainvec_vld, 3, 3) @[lsu_bus_buffer.scala 429:63]
node _T_3406 = mux(_T_3405, ibuf_dual, io.ldst_dual_r) @[lsu_bus_buffer.scala 429:45]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_3407 = cat(_T_3406, _T_3404) @[Cat.scala 29:58]
node _T_3408 = cat(_T_3407, _T_3402) @[Cat.scala 29:58]
node _T_3409 = cat(_T_3408, _T_3400) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_dual_in <= _T_3409 @[lsu_bus_buffer.scala 429:15]
node _T_3410 = bits(ibuf_drainvec_vld, 0, 0) @[lsu_bus_buffer.scala 430:65]
node _T_3411 = mux(_T_3410, ibuf_samedw, ldst_samedw_r) @[lsu_bus_buffer.scala 430:47]
node _T_3412 = bits(ibuf_drainvec_vld, 1, 1) @[lsu_bus_buffer.scala 430:65]
node _T_3413 = mux(_T_3412, ibuf_samedw, ldst_samedw_r) @[lsu_bus_buffer.scala 430:47]
node _T_3414 = bits(ibuf_drainvec_vld, 2, 2) @[lsu_bus_buffer.scala 430:65]
node _T_3415 = mux(_T_3414, ibuf_samedw, ldst_samedw_r) @[lsu_bus_buffer.scala 430:47]
node _T_3416 = bits(ibuf_drainvec_vld, 3, 3) @[lsu_bus_buffer.scala 430:65]
node _T_3417 = mux(_T_3416, ibuf_samedw, ldst_samedw_r) @[lsu_bus_buffer.scala 430:47]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_3418 = cat(_T_3417, _T_3415) @[Cat.scala 29:58]
node _T_3419 = cat(_T_3418, _T_3413) @[Cat.scala 29:58]
node _T_3420 = cat(_T_3419, _T_3411) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_samedw_in <= _T_3420 @[lsu_bus_buffer.scala 430:17]
node _T_3421 = bits(ibuf_drainvec_vld, 0, 0) @[lsu_bus_buffer.scala 431:66]
node _T_3422 = or(ibuf_nomerge, ibuf_force_drain) @[lsu_bus_buffer.scala 431:84]
node _T_3423 = mux(_T_3421, _T_3422, io.no_dword_merge_r) @[lsu_bus_buffer.scala 431:48]
node _T_3424 = bits(ibuf_drainvec_vld, 1, 1) @[lsu_bus_buffer.scala 431:66]
node _T_3425 = or(ibuf_nomerge, ibuf_force_drain) @[lsu_bus_buffer.scala 431:84]
node _T_3426 = mux(_T_3424, _T_3425, io.no_dword_merge_r) @[lsu_bus_buffer.scala 431:48]
node _T_3427 = bits(ibuf_drainvec_vld, 2, 2) @[lsu_bus_buffer.scala 431:66]
node _T_3428 = or(ibuf_nomerge, ibuf_force_drain) @[lsu_bus_buffer.scala 431:84]
node _T_3429 = mux(_T_3427, _T_3428, io.no_dword_merge_r) @[lsu_bus_buffer.scala 431:48]
node _T_3430 = bits(ibuf_drainvec_vld, 3, 3) @[lsu_bus_buffer.scala 431:66]
node _T_3431 = or(ibuf_nomerge, ibuf_force_drain) @[lsu_bus_buffer.scala 431:84]
node _T_3432 = mux(_T_3430, _T_3431, io.no_dword_merge_r) @[lsu_bus_buffer.scala 431:48]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_3433 = cat(_T_3432, _T_3429) @[Cat.scala 29:58]
node _T_3434 = cat(_T_3433, _T_3426) @[Cat.scala 29:58]
node _T_3435 = cat(_T_3434, _T_3423) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_nomerge_in <= _T_3435 @[lsu_bus_buffer.scala 431:18]
node _T_3436 = bits(ibuf_drainvec_vld, 0, 0) @[lsu_bus_buffer.scala 432:65]
node _T_3437 = and(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 432:90]
node _T_3438 = eq(WrPtr1_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 432:118]
node _T_3439 = and(_T_3437, _T_3438) @[lsu_bus_buffer.scala 432:107]
node _T_3440 = mux(_T_3436, ibuf_dual, _T_3439) @[lsu_bus_buffer.scala 432:47]
node _T_3441 = bits(ibuf_drainvec_vld, 1, 1) @[lsu_bus_buffer.scala 432:65]
node _T_3442 = and(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 432:90]
node _T_3443 = eq(WrPtr1_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 432:118]
node _T_3444 = and(_T_3442, _T_3443) @[lsu_bus_buffer.scala 432:107]
node _T_3445 = mux(_T_3441, ibuf_dual, _T_3444) @[lsu_bus_buffer.scala 432:47]
node _T_3446 = bits(ibuf_drainvec_vld, 2, 2) @[lsu_bus_buffer.scala 432:65]
node _T_3447 = and(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 432:90]
node _T_3448 = eq(WrPtr1_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 432:118]
node _T_3449 = and(_T_3447, _T_3448) @[lsu_bus_buffer.scala 432:107]
node _T_3450 = mux(_T_3446, ibuf_dual, _T_3449) @[lsu_bus_buffer.scala 432:47]
node _T_3451 = bits(ibuf_drainvec_vld, 3, 3) @[lsu_bus_buffer.scala 432:65]
node _T_3452 = and(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 432:90]
node _T_3453 = eq(WrPtr1_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 432:118]
node _T_3454 = and(_T_3452, _T_3453) @[lsu_bus_buffer.scala 432:107]
node _T_3455 = mux(_T_3451, ibuf_dual, _T_3454) @[lsu_bus_buffer.scala 432:47]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_3456 = cat(_T_3455, _T_3450) @[Cat.scala 29:58]
node _T_3457 = cat(_T_3456, _T_3445) @[Cat.scala 29:58]
node _T_3458 = cat(_T_3457, _T_3440) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_dualhi_in <= _T_3458 @[lsu_bus_buffer.scala 432:17]
node _T_3459 = bits(ibuf_drainvec_vld, 0, 0) @[lsu_bus_buffer.scala 433:65]
node _T_3460 = and(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 433:97]
node _T_3461 = eq(WrPtr1_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 433:125]
node _T_3462 = and(_T_3460, _T_3461) @[lsu_bus_buffer.scala 433:114]
node _T_3463 = mux(_T_3462, WrPtr0_r, WrPtr1_r) @[lsu_bus_buffer.scala 433:87]
node _T_3464 = mux(_T_3459, ibuf_dualtag, _T_3463) @[lsu_bus_buffer.scala 433:47]
node _T_3465 = bits(ibuf_drainvec_vld, 1, 1) @[lsu_bus_buffer.scala 433:65]
node _T_3466 = and(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 433:97]
node _T_3467 = eq(WrPtr1_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 433:125]
node _T_3468 = and(_T_3466, _T_3467) @[lsu_bus_buffer.scala 433:114]
node _T_3469 = mux(_T_3468, WrPtr0_r, WrPtr1_r) @[lsu_bus_buffer.scala 433:87]
node _T_3470 = mux(_T_3465, ibuf_dualtag, _T_3469) @[lsu_bus_buffer.scala 433:47]
node _T_3471 = bits(ibuf_drainvec_vld, 2, 2) @[lsu_bus_buffer.scala 433:65]
node _T_3472 = and(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 433:97]
node _T_3473 = eq(WrPtr1_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 433:125]
node _T_3474 = and(_T_3472, _T_3473) @[lsu_bus_buffer.scala 433:114]
node _T_3475 = mux(_T_3474, WrPtr0_r, WrPtr1_r) @[lsu_bus_buffer.scala 433:87]
node _T_3476 = mux(_T_3471, ibuf_dualtag, _T_3475) @[lsu_bus_buffer.scala 433:47]
node _T_3477 = bits(ibuf_drainvec_vld, 3, 3) @[lsu_bus_buffer.scala 433:65]
node _T_3478 = and(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 433:97]
node _T_3479 = eq(WrPtr1_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 433:125]
node _T_3480 = and(_T_3478, _T_3479) @[lsu_bus_buffer.scala 433:114]
node _T_3481 = mux(_T_3480, WrPtr0_r, WrPtr1_r) @[lsu_bus_buffer.scala 433:87]
node _T_3482 = mux(_T_3477, ibuf_dualtag, _T_3481) @[lsu_bus_buffer.scala 433:47]
buf_dualtag_in[0] <= _T_3464 @[lsu_bus_buffer.scala 433:18]
buf_dualtag_in[1] <= _T_3470 @[lsu_bus_buffer.scala 433:18]
buf_dualtag_in[2] <= _T_3476 @[lsu_bus_buffer.scala 433:18]
buf_dualtag_in[3] <= _T_3482 @[lsu_bus_buffer.scala 433:18]
node _T_3483 = bits(ibuf_drainvec_vld, 0, 0) @[lsu_bus_buffer.scala 434:69]
node _T_3484 = mux(_T_3483, ibuf_sideeffect, io.is_sideeffects_r) @[lsu_bus_buffer.scala 434:51]
node _T_3485 = bits(ibuf_drainvec_vld, 1, 1) @[lsu_bus_buffer.scala 434:69]
node _T_3486 = mux(_T_3485, ibuf_sideeffect, io.is_sideeffects_r) @[lsu_bus_buffer.scala 434:51]
node _T_3487 = bits(ibuf_drainvec_vld, 2, 2) @[lsu_bus_buffer.scala 434:69]
node _T_3488 = mux(_T_3487, ibuf_sideeffect, io.is_sideeffects_r) @[lsu_bus_buffer.scala 434:51]
node _T_3489 = bits(ibuf_drainvec_vld, 3, 3) @[lsu_bus_buffer.scala 434:69]
node _T_3490 = mux(_T_3489, ibuf_sideeffect, io.is_sideeffects_r) @[lsu_bus_buffer.scala 434:51]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_3491 = cat(_T_3490, _T_3488) @[Cat.scala 29:58]
node _T_3492 = cat(_T_3491, _T_3486) @[Cat.scala 29:58]
node _T_3493 = cat(_T_3492, _T_3484) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_sideeffect_in <= _T_3493 @[lsu_bus_buffer.scala 434:21]
node _T_3494 = bits(ibuf_drainvec_vld, 0, 0) @[lsu_bus_buffer.scala 435:65]
node _T_3495 = mux(_T_3494, ibuf_unsign, io.lsu_pkt_r.bits.unsign) @[lsu_bus_buffer.scala 435:47]
node _T_3496 = bits(ibuf_drainvec_vld, 1, 1) @[lsu_bus_buffer.scala 435:65]
node _T_3497 = mux(_T_3496, ibuf_unsign, io.lsu_pkt_r.bits.unsign) @[lsu_bus_buffer.scala 435:47]
node _T_3498 = bits(ibuf_drainvec_vld, 2, 2) @[lsu_bus_buffer.scala 435:65]
node _T_3499 = mux(_T_3498, ibuf_unsign, io.lsu_pkt_r.bits.unsign) @[lsu_bus_buffer.scala 435:47]
node _T_3500 = bits(ibuf_drainvec_vld, 3, 3) @[lsu_bus_buffer.scala 435:65]
node _T_3501 = mux(_T_3500, ibuf_unsign, io.lsu_pkt_r.bits.unsign) @[lsu_bus_buffer.scala 435:47]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_3502 = cat(_T_3501, _T_3499) @[Cat.scala 29:58]
node _T_3503 = cat(_T_3502, _T_3497) @[Cat.scala 29:58]
node _T_3504 = cat(_T_3503, _T_3495) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_unsign_in <= _T_3504 @[lsu_bus_buffer.scala 435:17]
node _T_3505 = bits(ibuf_drainvec_vld, 0, 0) @[lsu_bus_buffer.scala 436:60]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_3506 = cat(io.lsu_pkt_r.bits.word, io.lsu_pkt_r.bits.half) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_3507 = mux(_T_3505, ibuf_sz, _T_3506) @[lsu_bus_buffer.scala 436:42]
node _T_3508 = bits(ibuf_drainvec_vld, 1, 1) @[lsu_bus_buffer.scala 436:60]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_3509 = cat(io.lsu_pkt_r.bits.word, io.lsu_pkt_r.bits.half) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_3510 = mux(_T_3508, ibuf_sz, _T_3509) @[lsu_bus_buffer.scala 436:42]
node _T_3511 = bits(ibuf_drainvec_vld, 2, 2) @[lsu_bus_buffer.scala 436:60]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_3512 = cat(io.lsu_pkt_r.bits.word, io.lsu_pkt_r.bits.half) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_3513 = mux(_T_3511, ibuf_sz, _T_3512) @[lsu_bus_buffer.scala 436:42]
node _T_3514 = bits(ibuf_drainvec_vld, 3, 3) @[lsu_bus_buffer.scala 436:60]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_3515 = cat(io.lsu_pkt_r.bits.word, io.lsu_pkt_r.bits.half) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_3516 = mux(_T_3514, ibuf_sz, _T_3515) @[lsu_bus_buffer.scala 436:42]
buf_sz_in[0] <= _T_3507 @[lsu_bus_buffer.scala 436:13]
buf_sz_in[1] <= _T_3510 @[lsu_bus_buffer.scala 436:13]
buf_sz_in[2] <= _T_3513 @[lsu_bus_buffer.scala 436:13]
buf_sz_in[3] <= _T_3516 @[lsu_bus_buffer.scala 436:13]
node _T_3517 = bits(ibuf_drainvec_vld, 0, 0) @[lsu_bus_buffer.scala 437:64]
node _T_3518 = mux(_T_3517, ibuf_write, io.lsu_pkt_r.bits.store) @[lsu_bus_buffer.scala 437:46]
node _T_3519 = bits(ibuf_drainvec_vld, 1, 1) @[lsu_bus_buffer.scala 437:64]
node _T_3520 = mux(_T_3519, ibuf_write, io.lsu_pkt_r.bits.store) @[lsu_bus_buffer.scala 437:46]
node _T_3521 = bits(ibuf_drainvec_vld, 2, 2) @[lsu_bus_buffer.scala 437:64]
node _T_3522 = mux(_T_3521, ibuf_write, io.lsu_pkt_r.bits.store) @[lsu_bus_buffer.scala 437:46]
node _T_3523 = bits(ibuf_drainvec_vld, 3, 3) @[lsu_bus_buffer.scala 437:64]
node _T_3524 = mux(_T_3523, ibuf_write, io.lsu_pkt_r.bits.store) @[lsu_bus_buffer.scala 437:46]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_3525 = cat(_T_3524, _T_3522) @[Cat.scala 29:58]
node _T_3526 = cat(_T_3525, _T_3520) @[Cat.scala 29:58]
node _T_3527 = cat(_T_3526, _T_3518) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_write_in <= _T_3527 @[lsu_bus_buffer.scala 437:16]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_3528 = eq(UInt<3>("h00"), buf_state[0]) @[Conditional.scala 37:30]
when _T_3528 : @[Conditional.scala 40:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_3529 = bits(io.lsu_bus_clk_en, 0, 0) @[lsu_bus_buffer.scala 442:56]
node _T_3530 = mux(_T_3529, UInt<3>("h02"), UInt<3>("h01")) @[lsu_bus_buffer.scala 442:31]
buf_nxtstate[0] <= _T_3530 @[lsu_bus_buffer.scala 442:25]
node _T_3531 = and(io.lsu_busreq_r, io.lsu_commit_r) @[lsu_bus_buffer.scala 443:45]
node _T_3532 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 443:77]
node _T_3533 = eq(ibuf_merge_en, UInt<1>("h00")) @[lsu_bus_buffer.scala 443:97]
node _T_3534 = and(_T_3532, _T_3533) @[lsu_bus_buffer.scala 443:95]
node _T_3535 = eq(UInt<1>("h00"), WrPtr0_r) @[lsu_bus_buffer.scala 443:117]
node _T_3536 = and(_T_3534, _T_3535) @[lsu_bus_buffer.scala 443:112]
node _T_3537 = and(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 443:144]
node _T_3538 = eq(UInt<1>("h00"), WrPtr1_r) @[lsu_bus_buffer.scala 443:166]
node _T_3539 = and(_T_3537, _T_3538) @[lsu_bus_buffer.scala 443:161]
node _T_3540 = or(_T_3536, _T_3539) @[lsu_bus_buffer.scala 443:132]
node _T_3541 = and(_T_3531, _T_3540) @[lsu_bus_buffer.scala 443:63]
node _T_3542 = eq(UInt<1>("h00"), ibuf_tag) @[lsu_bus_buffer.scala 443:206]
node _T_3543 = and(ibuf_drain_vld, _T_3542) @[lsu_bus_buffer.scala 443:201]
node _T_3544 = or(_T_3541, _T_3543) @[lsu_bus_buffer.scala 443:183]
buf_state_en[0] <= _T_3544 @[lsu_bus_buffer.scala 443:25]
buf_wr_en[0] <= buf_state_en[0] @[lsu_bus_buffer.scala 444:22]
buf_data_en[0] <= buf_state_en[0] @[lsu_bus_buffer.scala 445:24]
node _T_3545 = eq(UInt<1>("h00"), ibuf_tag) @[lsu_bus_buffer.scala 446:52]
node _T_3546 = and(ibuf_drain_vld, _T_3545) @[lsu_bus_buffer.scala 446:47]
node _T_3547 = bits(_T_3546, 0, 0) @[lsu_bus_buffer.scala 446:73]
node _T_3548 = bits(ibuf_data_out, 31, 0) @[lsu_bus_buffer.scala 446:90]
node _T_3549 = bits(store_data_lo_r, 31, 0) @[lsu_bus_buffer.scala 446:114]
node _T_3550 = mux(_T_3547, _T_3548, _T_3549) @[lsu_bus_buffer.scala 446:30]
buf_data_in[0] <= _T_3550 @[lsu_bus_buffer.scala 446:24]
LSU with Bundling
2020-12-10 12:50:49 +08:00
skip @[Conditional.scala 40:58]
else : @[Conditional.scala 39:67]
node _T_3551 = eq(UInt<3>("h01"), buf_state[0]) @[Conditional.scala 37:30]
when _T_3551 : @[Conditional.scala 39:67]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_3552 = bits(io.dec_tlu_force_halt, 0, 0) @[lsu_bus_buffer.scala 449:60]
node _T_3553 = mux(_T_3552, UInt<3>("h00"), UInt<3>("h02")) @[lsu_bus_buffer.scala 449:31]
buf_nxtstate[0] <= _T_3553 @[lsu_bus_buffer.scala 449:25]
node _T_3554 = or(io.lsu_bus_clk_en, io.dec_tlu_force_halt) @[lsu_bus_buffer.scala 450:46]
buf_state_en[0] <= _T_3554 @[lsu_bus_buffer.scala 450:25]
LSU with Bundling
2020-12-10 12:50:49 +08:00
skip @[Conditional.scala 39:67]
else : @[Conditional.scala 39:67]
node _T_3555 = eq(UInt<3>("h02"), buf_state[0]) @[Conditional.scala 37:30]
when _T_3555 : @[Conditional.scala 39:67]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_3556 = bits(io.dec_tlu_force_halt, 0, 0) @[lsu_bus_buffer.scala 453:60]
node _T_3557 = and(obuf_nosend, bus_rsp_read) @[lsu_bus_buffer.scala 453:89]
node _T_3558 = eq(bus_rsp_read_tag, obuf_rdrsp_tag) @[lsu_bus_buffer.scala 453:124]
node _T_3559 = and(_T_3557, _T_3558) @[lsu_bus_buffer.scala 453:104]
node _T_3560 = mux(_T_3559, UInt<3>("h05"), UInt<3>("h03")) @[lsu_bus_buffer.scala 453:75]
node _T_3561 = mux(_T_3556, UInt<3>("h00"), _T_3560) @[lsu_bus_buffer.scala 453:31]
buf_nxtstate[0] <= _T_3561 @[lsu_bus_buffer.scala 453:25]
node _T_3562 = eq(obuf_tag0, UInt<3>("h00")) @[lsu_bus_buffer.scala 454:48]
node _T_3563 = eq(obuf_tag1, UInt<3>("h00")) @[lsu_bus_buffer.scala 454:104]
node _T_3564 = and(obuf_merge, _T_3563) @[lsu_bus_buffer.scala 454:91]
node _T_3565 = or(_T_3562, _T_3564) @[lsu_bus_buffer.scala 454:77]
node _T_3566 = and(_T_3565, obuf_valid) @[lsu_bus_buffer.scala 454:135]
node _T_3567 = and(_T_3566, obuf_wr_enQ) @[lsu_bus_buffer.scala 454:148]
buf_cmd_state_bus_en[0] <= _T_3567 @[lsu_bus_buffer.scala 454:33]
buf_state_bus_en[0] <= buf_cmd_state_bus_en[0] @[lsu_bus_buffer.scala 455:29]
node _T_3568 = and(buf_state_bus_en[0], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 456:49]
node _T_3569 = or(_T_3568, io.dec_tlu_force_halt) @[lsu_bus_buffer.scala 456:70]
buf_state_en[0] <= _T_3569 @[lsu_bus_buffer.scala 456:25]
buf_ldfwd_in[0] <= UInt<1>("h01") @[lsu_bus_buffer.scala 457:25]
node _T_3570 = bits(buf_write, 0, 0) @[lsu_bus_buffer.scala 458:56]
node _T_3571 = eq(_T_3570, UInt<1>("h00")) @[lsu_bus_buffer.scala 458:46]
node _T_3572 = and(buf_state_en[0], _T_3571) @[lsu_bus_buffer.scala 458:44]
node _T_3573 = and(_T_3572, obuf_nosend) @[lsu_bus_buffer.scala 458:60]
node _T_3574 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[lsu_bus_buffer.scala 458:76]
node _T_3575 = and(_T_3573, _T_3574) @[lsu_bus_buffer.scala 458:74]
buf_ldfwd_en[0] <= _T_3575 @[lsu_bus_buffer.scala 458:25]
node _T_3576 = bits(obuf_rdrsp_tag, 1, 0) @[lsu_bus_buffer.scala 459:46]
buf_ldfwdtag_in[0] <= _T_3576 @[lsu_bus_buffer.scala 459:28]
node _T_3577 = and(buf_state_bus_en[0], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 460:47]
node _T_3578 = and(_T_3577, obuf_nosend) @[lsu_bus_buffer.scala 460:67]
node _T_3579 = and(_T_3578, bus_rsp_read) @[lsu_bus_buffer.scala 460:81]
buf_data_en[0] <= _T_3579 @[lsu_bus_buffer.scala 460:24]
node _T_3580 = and(buf_state_bus_en[0], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 461:48]
node _T_3581 = and(_T_3580, obuf_nosend) @[lsu_bus_buffer.scala 461:68]
node _T_3582 = and(_T_3581, bus_rsp_read_error) @[lsu_bus_buffer.scala 461:82]
buf_error_en[0] <= _T_3582 @[lsu_bus_buffer.scala 461:25]
node _T_3583 = bits(bus_rsp_rdata, 31, 0) @[lsu_bus_buffer.scala 462:61]
node _T_3584 = bits(buf_addr[0], 2, 2) @[lsu_bus_buffer.scala 462:85]
node _T_3585 = bits(bus_rsp_rdata, 63, 32) @[lsu_bus_buffer.scala 462:103]
node _T_3586 = bits(bus_rsp_rdata, 31, 0) @[lsu_bus_buffer.scala 462:126]
node _T_3587 = mux(_T_3584, _T_3585, _T_3586) @[lsu_bus_buffer.scala 462:73]
node _T_3588 = mux(buf_error_en[0], _T_3583, _T_3587) @[lsu_bus_buffer.scala 462:30]
buf_data_in[0] <= _T_3588 @[lsu_bus_buffer.scala 462:24]
LSU with Bundling
2020-12-10 12:50:49 +08:00
skip @[Conditional.scala 39:67]
else : @[Conditional.scala 39:67]
node _T_3589 = eq(UInt<3>("h03"), buf_state[0]) @[Conditional.scala 37:30]
when _T_3589 : @[Conditional.scala 39:67]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_3590 = bits(buf_write, 0, 0) @[lsu_bus_buffer.scala 465:67]
node _T_3591 = and(UInt<1>("h01"), bus_rsp_write_error) @[lsu_bus_buffer.scala 465:94]
node _T_3592 = eq(_T_3591, UInt<1>("h00")) @[lsu_bus_buffer.scala 465:73]
node _T_3593 = and(_T_3590, _T_3592) @[lsu_bus_buffer.scala 465:71]
node _T_3594 = or(io.dec_tlu_force_halt, _T_3593) @[lsu_bus_buffer.scala 465:55]
node _T_3595 = bits(_T_3594, 0, 0) @[lsu_bus_buffer.scala 465:125]
node _T_3596 = eq(buf_samedw[0], UInt<1>("h00")) @[lsu_bus_buffer.scala 466:30]
node _T_3597 = and(buf_dual[0], _T_3596) @[lsu_bus_buffer.scala 466:28]
node _T_3598 = bits(buf_write, 0, 0) @[lsu_bus_buffer.scala 466:57]
node _T_3599 = eq(_T_3598, UInt<1>("h00")) @[lsu_bus_buffer.scala 466:47]
node _T_3600 = and(_T_3597, _T_3599) @[lsu_bus_buffer.scala 466:45]
node _T_3601 = neq(buf_state[buf_dualtag[0]], UInt<3>("h04")) @[lsu_bus_buffer.scala 466:90]
node _T_3602 = and(_T_3600, _T_3601) @[lsu_bus_buffer.scala 466:61]
node _T_3603 = bits(buf_ldfwd, 0, 0) @[lsu_bus_buffer.scala 467:27]
node _T_3604 = or(_T_3603, any_done_wait_state) @[lsu_bus_buffer.scala 467:31]
node _T_3605 = eq(buf_samedw[0], UInt<1>("h00")) @[lsu_bus_buffer.scala 467:70]
node _T_3606 = and(buf_dual[0], _T_3605) @[lsu_bus_buffer.scala 467:68]
node _T_3607 = bits(buf_write, 0, 0) @[lsu_bus_buffer.scala 467:97]
node _T_3608 = eq(_T_3607, UInt<1>("h00")) @[lsu_bus_buffer.scala 467:87]
node _T_3609 = and(_T_3606, _T_3608) @[lsu_bus_buffer.scala 467:85]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_3610 = eq(buf_dualtag[0], UInt<1>("h00")) @[lsu_bus_buffer.scala 57:118]
node _T_3611 = bits(buf_ldfwd, 0, 0) @[lsu_bus_buffer.scala 57:129]
node _T_3612 = eq(buf_dualtag[0], UInt<1>("h01")) @[lsu_bus_buffer.scala 57:118]
node _T_3613 = bits(buf_ldfwd, 1, 1) @[lsu_bus_buffer.scala 57:129]
node _T_3614 = eq(buf_dualtag[0], UInt<2>("h02")) @[lsu_bus_buffer.scala 57:118]
node _T_3615 = bits(buf_ldfwd, 2, 2) @[lsu_bus_buffer.scala 57:129]
node _T_3616 = eq(buf_dualtag[0], UInt<2>("h03")) @[lsu_bus_buffer.scala 57:118]
node _T_3617 = bits(buf_ldfwd, 3, 3) @[lsu_bus_buffer.scala 57:129]
node _T_3618 = mux(_T_3610, _T_3611, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_3619 = mux(_T_3612, _T_3613, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_3620 = mux(_T_3614, _T_3615, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_3621 = mux(_T_3616, _T_3617, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_3622 = or(_T_3618, _T_3619) @[Mux.scala 27:72]
node _T_3623 = or(_T_3622, _T_3620) @[Mux.scala 27:72]
node _T_3624 = or(_T_3623, _T_3621) @[Mux.scala 27:72]
wire _T_3625 : UInt<1> @[Mux.scala 27:72]
_T_3625 <= _T_3624 @[Mux.scala 27:72]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_3626 = and(_T_3609, _T_3625) @[lsu_bus_buffer.scala 467:101]
node _T_3627 = eq(buf_state[buf_dualtag[0]], UInt<3>("h04")) @[lsu_bus_buffer.scala 467:167]
node _T_3628 = and(_T_3626, _T_3627) @[lsu_bus_buffer.scala 467:138]
node _T_3629 = and(_T_3628, any_done_wait_state) @[lsu_bus_buffer.scala 467:187]
node _T_3630 = or(_T_3604, _T_3629) @[lsu_bus_buffer.scala 467:53]
node _T_3631 = mux(_T_3630, UInt<3>("h05"), UInt<3>("h06")) @[lsu_bus_buffer.scala 467:16]
node _T_3632 = mux(_T_3602, UInt<3>("h04"), _T_3631) @[lsu_bus_buffer.scala 466:14]
node _T_3633 = mux(_T_3595, UInt<3>("h00"), _T_3632) @[lsu_bus_buffer.scala 465:31]
buf_nxtstate[0] <= _T_3633 @[lsu_bus_buffer.scala 465:25]
node _T_3634 = eq(bus_rsp_write_tag, UInt<3>("h00")) @[lsu_bus_buffer.scala 468:73]
node _T_3635 = and(bus_rsp_write, _T_3634) @[lsu_bus_buffer.scala 468:52]
node _T_3636 = eq(bus_rsp_read_tag, UInt<3>("h00")) @[lsu_bus_buffer.scala 469:46]
node _T_3637 = bits(buf_ldfwd, 0, 0) @[lsu_bus_buffer.scala 470:23]
node _T_3638 = eq(bus_rsp_read_tag, buf_ldfwdtag[0]) @[lsu_bus_buffer.scala 470:47]
node _T_3639 = and(_T_3637, _T_3638) @[lsu_bus_buffer.scala 470:27]
node _T_3640 = or(_T_3636, _T_3639) @[lsu_bus_buffer.scala 469:77]
node _T_3641 = and(buf_dual[0], buf_dualhi[0]) @[lsu_bus_buffer.scala 471:26]
node _T_3642 = bits(buf_write, 0, 0) @[lsu_bus_buffer.scala 471:54]
node _T_3643 = not(_T_3642) @[lsu_bus_buffer.scala 471:44]
node _T_3644 = and(_T_3641, _T_3643) @[lsu_bus_buffer.scala 471:42]
node _T_3645 = and(_T_3644, buf_samedw[0]) @[lsu_bus_buffer.scala 471:58]
node _T_3646 = eq(bus_rsp_read_tag, buf_dualtag[0]) @[lsu_bus_buffer.scala 471:94]
node _T_3647 = and(_T_3645, _T_3646) @[lsu_bus_buffer.scala 471:74]
node _T_3648 = or(_T_3640, _T_3647) @[lsu_bus_buffer.scala 470:71]
node _T_3649 = and(bus_rsp_read, _T_3648) @[lsu_bus_buffer.scala 469:25]
node _T_3650 = or(_T_3635, _T_3649) @[lsu_bus_buffer.scala 468:105]
buf_resp_state_bus_en[0] <= _T_3650 @[lsu_bus_buffer.scala 468:34]
buf_state_bus_en[0] <= buf_resp_state_bus_en[0] @[lsu_bus_buffer.scala 472:29]
node _T_3651 = and(buf_state_bus_en[0], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 473:49]
node _T_3652 = or(_T_3651, io.dec_tlu_force_halt) @[lsu_bus_buffer.scala 473:70]
buf_state_en[0] <= _T_3652 @[lsu_bus_buffer.scala 473:25]
node _T_3653 = and(buf_state_bus_en[0], bus_rsp_read) @[lsu_bus_buffer.scala 474:47]
node _T_3654 = and(_T_3653, io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 474:62]
buf_data_en[0] <= _T_3654 @[lsu_bus_buffer.scala 474:24]
node _T_3655 = and(buf_state_bus_en[0], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 475:48]
node _T_3656 = eq(bus_rsp_read_tag, UInt<3>("h00")) @[lsu_bus_buffer.scala 475:111]
node _T_3657 = and(bus_rsp_read_error, _T_3656) @[lsu_bus_buffer.scala 475:91]
node _T_3658 = bits(buf_ldfwd, 0, 0) @[lsu_bus_buffer.scala 476:42]
node _T_3659 = and(bus_rsp_read_error, _T_3658) @[lsu_bus_buffer.scala 476:31]
node _T_3660 = eq(bus_rsp_read_tag, buf_ldfwdtag[0]) @[lsu_bus_buffer.scala 476:66]
node _T_3661 = and(_T_3659, _T_3660) @[lsu_bus_buffer.scala 476:46]
node _T_3662 = or(_T_3657, _T_3661) @[lsu_bus_buffer.scala 475:143]
node _T_3663 = and(bus_rsp_write_error, UInt<1>("h01")) @[lsu_bus_buffer.scala 477:32]
node _T_3664 = eq(bus_rsp_write_tag, UInt<3>("h00")) @[lsu_bus_buffer.scala 477:74]
node _T_3665 = and(_T_3663, _T_3664) @[lsu_bus_buffer.scala 477:53]
node _T_3666 = or(_T_3662, _T_3665) @[lsu_bus_buffer.scala 476:88]
node _T_3667 = and(_T_3655, _T_3666) @[lsu_bus_buffer.scala 475:68]
buf_error_en[0] <= _T_3667 @[lsu_bus_buffer.scala 475:25]
node _T_3668 = eq(buf_error_en[0], UInt<1>("h00")) @[lsu_bus_buffer.scala 478:50]
node _T_3669 = and(buf_state_en[0], _T_3668) @[lsu_bus_buffer.scala 478:48]
node _T_3670 = bits(buf_addr[0], 2, 2) @[lsu_bus_buffer.scala 478:84]
node _T_3671 = bits(bus_rsp_rdata, 63, 32) @[lsu_bus_buffer.scala 478:102]
node _T_3672 = bits(bus_rsp_rdata, 31, 0) @[lsu_bus_buffer.scala 478:125]
node _T_3673 = mux(_T_3670, _T_3671, _T_3672) @[lsu_bus_buffer.scala 478:72]
node _T_3674 = bits(bus_rsp_rdata, 31, 0) @[lsu_bus_buffer.scala 478:148]
node _T_3675 = mux(_T_3669, _T_3673, _T_3674) @[lsu_bus_buffer.scala 478:30]
buf_data_in[0] <= _T_3675 @[lsu_bus_buffer.scala 478:24]
LSU with Bundling
2020-12-10 12:50:49 +08:00
skip @[Conditional.scala 39:67]
else : @[Conditional.scala 39:67]
node _T_3676 = eq(UInt<3>("h04"), buf_state[0]) @[Conditional.scala 37:30]
when _T_3676 : @[Conditional.scala 39:67]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_3677 = bits(io.dec_tlu_force_halt, 0, 0) @[lsu_bus_buffer.scala 481:60]
node _T_3678 = bits(buf_ldfwd, 0, 0) @[lsu_bus_buffer.scala 481:86]
node _T_3679 = dshr(buf_ldfwd, buf_dualtag[0]) @[lsu_bus_buffer.scala 481:101]
node _T_3680 = bits(_T_3679, 0, 0) @[lsu_bus_buffer.scala 481:101]
node _T_3681 = or(_T_3678, _T_3680) @[lsu_bus_buffer.scala 481:90]
node _T_3682 = or(_T_3681, any_done_wait_state) @[lsu_bus_buffer.scala 481:118]
node _T_3683 = mux(_T_3682, UInt<3>("h05"), UInt<3>("h06")) @[lsu_bus_buffer.scala 481:75]
node _T_3684 = mux(_T_3677, UInt<3>("h00"), _T_3683) @[lsu_bus_buffer.scala 481:31]
buf_nxtstate[0] <= _T_3684 @[lsu_bus_buffer.scala 481:25]
node _T_3685 = eq(bus_rsp_read_tag, buf_dualtag[0]) @[lsu_bus_buffer.scala 482:66]
node _T_3686 = dshr(buf_ldfwd, buf_dualtag[0]) @[lsu_bus_buffer.scala 483:21]
node _T_3687 = bits(_T_3686, 0, 0) @[lsu_bus_buffer.scala 483:21]
node _T_3688 = eq(bus_rsp_read_tag, buf_ldfwdtag[buf_dualtag[0]]) @[lsu_bus_buffer.scala 483:58]
node _T_3689 = and(_T_3687, _T_3688) @[lsu_bus_buffer.scala 483:38]
node _T_3690 = or(_T_3685, _T_3689) @[lsu_bus_buffer.scala 482:95]
node _T_3691 = and(bus_rsp_read, _T_3690) @[lsu_bus_buffer.scala 482:45]
buf_state_bus_en[0] <= _T_3691 @[lsu_bus_buffer.scala 482:29]
node _T_3692 = and(buf_state_bus_en[0], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 484:49]
node _T_3693 = or(_T_3692, io.dec_tlu_force_halt) @[lsu_bus_buffer.scala 484:70]
buf_state_en[0] <= _T_3693 @[lsu_bus_buffer.scala 484:25]
LSU with Bundling
2020-12-10 12:50:49 +08:00
skip @[Conditional.scala 39:67]
else : @[Conditional.scala 39:67]
node _T_3694 = eq(UInt<3>("h05"), buf_state[0]) @[Conditional.scala 37:30]
when _T_3694 : @[Conditional.scala 39:67]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_3695 = bits(io.dec_tlu_force_halt, 0, 0) @[lsu_bus_buffer.scala 487:60]
node _T_3696 = mux(_T_3695, UInt<3>("h00"), UInt<3>("h06")) @[lsu_bus_buffer.scala 487:31]
buf_nxtstate[0] <= _T_3696 @[lsu_bus_buffer.scala 487:25]
node _T_3697 = eq(RspPtr, UInt<2>("h00")) @[lsu_bus_buffer.scala 488:37]
node _T_3698 = eq(buf_dualtag[0], RspPtr) @[lsu_bus_buffer.scala 488:98]
node _T_3699 = and(buf_dual[0], _T_3698) @[lsu_bus_buffer.scala 488:80]
node _T_3700 = or(_T_3697, _T_3699) @[lsu_bus_buffer.scala 488:65]
node _T_3701 = or(_T_3700, io.dec_tlu_force_halt) @[lsu_bus_buffer.scala 488:112]
buf_state_en[0] <= _T_3701 @[lsu_bus_buffer.scala 488:25]
LSU with Bundling
2020-12-10 12:50:49 +08:00
skip @[Conditional.scala 39:67]
else : @[Conditional.scala 39:67]
node _T_3702 = eq(UInt<3>("h06"), buf_state[0]) @[Conditional.scala 37:30]
when _T_3702 : @[Conditional.scala 39:67]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_nxtstate[0] <= UInt<3>("h00") @[lsu_bus_buffer.scala 491:25]
buf_rst[0] <= UInt<1>("h01") @[lsu_bus_buffer.scala 492:20]
buf_state_en[0] <= UInt<1>("h01") @[lsu_bus_buffer.scala 493:25]
buf_ldfwd_in[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 494:25]
buf_ldfwd_en[0] <= buf_state_en[0] @[lsu_bus_buffer.scala 495:25]
LSU with Bundling
2020-12-10 12:50:49 +08:00
skip @[Conditional.scala 39:67]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_3703 = bits(buf_state_en[0], 0, 0) @[lsu_bus_buffer.scala 498:108]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_3704 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_3703 : @[Reg.scala 28:19]
_T_3704 <= buf_nxtstate[0] @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_state[0] <= _T_3704 @[lsu_bus_buffer.scala 498:18]
reg _T_3705 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_buffer.scala 499:60]
_T_3705 <= buf_age_in_0 @[lsu_bus_buffer.scala 499:60]
buf_ageQ[0] <= _T_3705 @[lsu_bus_buffer.scala 499:17]
reg _T_3706 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_buffer.scala 500:63]
_T_3706 <= buf_rspage_in[0] @[lsu_bus_buffer.scala 500:63]
buf_rspageQ[0] <= _T_3706 @[lsu_bus_buffer.scala 500:20]
node _T_3707 = bits(buf_wr_en[0], 0, 0) @[lsu_bus_buffer.scala 501:109]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_3708 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_3707 : @[Reg.scala 28:19]
_T_3708 <= buf_dualtag_in[0] @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_dualtag[0] <= _T_3708 @[lsu_bus_buffer.scala 501:20]
node _T_3709 = bits(buf_dual_in, 0, 0) @[lsu_bus_buffer.scala 502:74]
node _T_3710 = bits(buf_wr_en[0], 0, 0) @[lsu_bus_buffer.scala 502:107]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_3711 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_3710 : @[Reg.scala 28:19]
_T_3711 <= _T_3709 @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_dual[0] <= _T_3711 @[lsu_bus_buffer.scala 502:17]
node _T_3712 = bits(buf_samedw_in, 0, 0) @[lsu_bus_buffer.scala 503:78]
node _T_3713 = bits(buf_wr_en[0], 0, 0) @[lsu_bus_buffer.scala 503:111]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_3714 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_3713 : @[Reg.scala 28:19]
_T_3714 <= _T_3712 @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_samedw[0] <= _T_3714 @[lsu_bus_buffer.scala 503:19]
node _T_3715 = bits(buf_nomerge_in, 0, 0) @[lsu_bus_buffer.scala 504:80]
node _T_3716 = bits(buf_wr_en[0], 0, 0) @[lsu_bus_buffer.scala 504:113]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_3717 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_3716 : @[Reg.scala 28:19]
_T_3717 <= _T_3715 @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_nomerge[0] <= _T_3717 @[lsu_bus_buffer.scala 504:20]
node _T_3718 = bits(buf_dualhi_in, 0, 0) @[lsu_bus_buffer.scala 505:78]
node _T_3719 = bits(buf_wr_en[0], 0, 0) @[lsu_bus_buffer.scala 505:111]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_3720 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_3719 : @[Reg.scala 28:19]
_T_3720 <= _T_3718 @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_dualhi[0] <= _T_3720 @[lsu_bus_buffer.scala 505:19]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_3721 = eq(UInt<3>("h00"), buf_state[1]) @[Conditional.scala 37:30]
when _T_3721 : @[Conditional.scala 40:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_3722 = bits(io.lsu_bus_clk_en, 0, 0) @[lsu_bus_buffer.scala 442:56]
node _T_3723 = mux(_T_3722, UInt<3>("h02"), UInt<3>("h01")) @[lsu_bus_buffer.scala 442:31]
buf_nxtstate[1] <= _T_3723 @[lsu_bus_buffer.scala 442:25]
node _T_3724 = and(io.lsu_busreq_r, io.lsu_commit_r) @[lsu_bus_buffer.scala 443:45]
node _T_3725 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 443:77]
node _T_3726 = eq(ibuf_merge_en, UInt<1>("h00")) @[lsu_bus_buffer.scala 443:97]
node _T_3727 = and(_T_3725, _T_3726) @[lsu_bus_buffer.scala 443:95]
node _T_3728 = eq(UInt<1>("h01"), WrPtr0_r) @[lsu_bus_buffer.scala 443:117]
node _T_3729 = and(_T_3727, _T_3728) @[lsu_bus_buffer.scala 443:112]
node _T_3730 = and(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 443:144]
node _T_3731 = eq(UInt<1>("h01"), WrPtr1_r) @[lsu_bus_buffer.scala 443:166]
node _T_3732 = and(_T_3730, _T_3731) @[lsu_bus_buffer.scala 443:161]
node _T_3733 = or(_T_3729, _T_3732) @[lsu_bus_buffer.scala 443:132]
node _T_3734 = and(_T_3724, _T_3733) @[lsu_bus_buffer.scala 443:63]
node _T_3735 = eq(UInt<1>("h01"), ibuf_tag) @[lsu_bus_buffer.scala 443:206]
node _T_3736 = and(ibuf_drain_vld, _T_3735) @[lsu_bus_buffer.scala 443:201]
node _T_3737 = or(_T_3734, _T_3736) @[lsu_bus_buffer.scala 443:183]
buf_state_en[1] <= _T_3737 @[lsu_bus_buffer.scala 443:25]
buf_wr_en[1] <= buf_state_en[1] @[lsu_bus_buffer.scala 444:22]
buf_data_en[1] <= buf_state_en[1] @[lsu_bus_buffer.scala 445:24]
node _T_3738 = eq(UInt<1>("h01"), ibuf_tag) @[lsu_bus_buffer.scala 446:52]
node _T_3739 = and(ibuf_drain_vld, _T_3738) @[lsu_bus_buffer.scala 446:47]
node _T_3740 = bits(_T_3739, 0, 0) @[lsu_bus_buffer.scala 446:73]
node _T_3741 = bits(ibuf_data_out, 31, 0) @[lsu_bus_buffer.scala 446:90]
node _T_3742 = bits(store_data_lo_r, 31, 0) @[lsu_bus_buffer.scala 446:114]
node _T_3743 = mux(_T_3740, _T_3741, _T_3742) @[lsu_bus_buffer.scala 446:30]
buf_data_in[1] <= _T_3743 @[lsu_bus_buffer.scala 446:24]
LSU with Bundling
2020-12-10 12:50:49 +08:00
skip @[Conditional.scala 40:58]
else : @[Conditional.scala 39:67]
node _T_3744 = eq(UInt<3>("h01"), buf_state[1]) @[Conditional.scala 37:30]
when _T_3744 : @[Conditional.scala 39:67]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_3745 = bits(io.dec_tlu_force_halt, 0, 0) @[lsu_bus_buffer.scala 449:60]
node _T_3746 = mux(_T_3745, UInt<3>("h00"), UInt<3>("h02")) @[lsu_bus_buffer.scala 449:31]
buf_nxtstate[1] <= _T_3746 @[lsu_bus_buffer.scala 449:25]
node _T_3747 = or(io.lsu_bus_clk_en, io.dec_tlu_force_halt) @[lsu_bus_buffer.scala 450:46]
buf_state_en[1] <= _T_3747 @[lsu_bus_buffer.scala 450:25]
LSU with Bundling
2020-12-10 12:50:49 +08:00
skip @[Conditional.scala 39:67]
else : @[Conditional.scala 39:67]
node _T_3748 = eq(UInt<3>("h02"), buf_state[1]) @[Conditional.scala 37:30]
when _T_3748 : @[Conditional.scala 39:67]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_3749 = bits(io.dec_tlu_force_halt, 0, 0) @[lsu_bus_buffer.scala 453:60]
node _T_3750 = and(obuf_nosend, bus_rsp_read) @[lsu_bus_buffer.scala 453:89]
node _T_3751 = eq(bus_rsp_read_tag, obuf_rdrsp_tag) @[lsu_bus_buffer.scala 453:124]
node _T_3752 = and(_T_3750, _T_3751) @[lsu_bus_buffer.scala 453:104]
node _T_3753 = mux(_T_3752, UInt<3>("h05"), UInt<3>("h03")) @[lsu_bus_buffer.scala 453:75]
node _T_3754 = mux(_T_3749, UInt<3>("h00"), _T_3753) @[lsu_bus_buffer.scala 453:31]
buf_nxtstate[1] <= _T_3754 @[lsu_bus_buffer.scala 453:25]
node _T_3755 = eq(obuf_tag0, UInt<3>("h01")) @[lsu_bus_buffer.scala 454:48]
node _T_3756 = eq(obuf_tag1, UInt<3>("h01")) @[lsu_bus_buffer.scala 454:104]
node _T_3757 = and(obuf_merge, _T_3756) @[lsu_bus_buffer.scala 454:91]
node _T_3758 = or(_T_3755, _T_3757) @[lsu_bus_buffer.scala 454:77]
node _T_3759 = and(_T_3758, obuf_valid) @[lsu_bus_buffer.scala 454:135]
node _T_3760 = and(_T_3759, obuf_wr_enQ) @[lsu_bus_buffer.scala 454:148]
buf_cmd_state_bus_en[1] <= _T_3760 @[lsu_bus_buffer.scala 454:33]
buf_state_bus_en[1] <= buf_cmd_state_bus_en[1] @[lsu_bus_buffer.scala 455:29]
node _T_3761 = and(buf_state_bus_en[1], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 456:49]
node _T_3762 = or(_T_3761, io.dec_tlu_force_halt) @[lsu_bus_buffer.scala 456:70]
buf_state_en[1] <= _T_3762 @[lsu_bus_buffer.scala 456:25]
buf_ldfwd_in[1] <= UInt<1>("h01") @[lsu_bus_buffer.scala 457:25]
node _T_3763 = bits(buf_write, 1, 1) @[lsu_bus_buffer.scala 458:56]
node _T_3764 = eq(_T_3763, UInt<1>("h00")) @[lsu_bus_buffer.scala 458:46]
node _T_3765 = and(buf_state_en[1], _T_3764) @[lsu_bus_buffer.scala 458:44]
node _T_3766 = and(_T_3765, obuf_nosend) @[lsu_bus_buffer.scala 458:60]
node _T_3767 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[lsu_bus_buffer.scala 458:76]
node _T_3768 = and(_T_3766, _T_3767) @[lsu_bus_buffer.scala 458:74]
buf_ldfwd_en[1] <= _T_3768 @[lsu_bus_buffer.scala 458:25]
node _T_3769 = bits(obuf_rdrsp_tag, 1, 0) @[lsu_bus_buffer.scala 459:46]
buf_ldfwdtag_in[1] <= _T_3769 @[lsu_bus_buffer.scala 459:28]
node _T_3770 = and(buf_state_bus_en[1], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 460:47]
node _T_3771 = and(_T_3770, obuf_nosend) @[lsu_bus_buffer.scala 460:67]
node _T_3772 = and(_T_3771, bus_rsp_read) @[lsu_bus_buffer.scala 460:81]
buf_data_en[1] <= _T_3772 @[lsu_bus_buffer.scala 460:24]
node _T_3773 = and(buf_state_bus_en[1], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 461:48]
node _T_3774 = and(_T_3773, obuf_nosend) @[lsu_bus_buffer.scala 461:68]
node _T_3775 = and(_T_3774, bus_rsp_read_error) @[lsu_bus_buffer.scala 461:82]
buf_error_en[1] <= _T_3775 @[lsu_bus_buffer.scala 461:25]
node _T_3776 = bits(bus_rsp_rdata, 31, 0) @[lsu_bus_buffer.scala 462:61]
node _T_3777 = bits(buf_addr[1], 2, 2) @[lsu_bus_buffer.scala 462:85]
node _T_3778 = bits(bus_rsp_rdata, 63, 32) @[lsu_bus_buffer.scala 462:103]
node _T_3779 = bits(bus_rsp_rdata, 31, 0) @[lsu_bus_buffer.scala 462:126]
node _T_3780 = mux(_T_3777, _T_3778, _T_3779) @[lsu_bus_buffer.scala 462:73]
node _T_3781 = mux(buf_error_en[1], _T_3776, _T_3780) @[lsu_bus_buffer.scala 462:30]
buf_data_in[1] <= _T_3781 @[lsu_bus_buffer.scala 462:24]
LSU with Bundling
2020-12-10 12:50:49 +08:00
skip @[Conditional.scala 39:67]
else : @[Conditional.scala 39:67]
node _T_3782 = eq(UInt<3>("h03"), buf_state[1]) @[Conditional.scala 37:30]
when _T_3782 : @[Conditional.scala 39:67]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_3783 = bits(buf_write, 1, 1) @[lsu_bus_buffer.scala 465:67]
node _T_3784 = and(UInt<1>("h01"), bus_rsp_write_error) @[lsu_bus_buffer.scala 465:94]
node _T_3785 = eq(_T_3784, UInt<1>("h00")) @[lsu_bus_buffer.scala 465:73]
node _T_3786 = and(_T_3783, _T_3785) @[lsu_bus_buffer.scala 465:71]
node _T_3787 = or(io.dec_tlu_force_halt, _T_3786) @[lsu_bus_buffer.scala 465:55]
node _T_3788 = bits(_T_3787, 0, 0) @[lsu_bus_buffer.scala 465:125]
node _T_3789 = eq(buf_samedw[1], UInt<1>("h00")) @[lsu_bus_buffer.scala 466:30]
node _T_3790 = and(buf_dual[1], _T_3789) @[lsu_bus_buffer.scala 466:28]
node _T_3791 = bits(buf_write, 1, 1) @[lsu_bus_buffer.scala 466:57]
node _T_3792 = eq(_T_3791, UInt<1>("h00")) @[lsu_bus_buffer.scala 466:47]
node _T_3793 = and(_T_3790, _T_3792) @[lsu_bus_buffer.scala 466:45]
node _T_3794 = neq(buf_state[buf_dualtag[1]], UInt<3>("h04")) @[lsu_bus_buffer.scala 466:90]
node _T_3795 = and(_T_3793, _T_3794) @[lsu_bus_buffer.scala 466:61]
node _T_3796 = bits(buf_ldfwd, 1, 1) @[lsu_bus_buffer.scala 467:27]
node _T_3797 = or(_T_3796, any_done_wait_state) @[lsu_bus_buffer.scala 467:31]
node _T_3798 = eq(buf_samedw[1], UInt<1>("h00")) @[lsu_bus_buffer.scala 467:70]
node _T_3799 = and(buf_dual[1], _T_3798) @[lsu_bus_buffer.scala 467:68]
node _T_3800 = bits(buf_write, 1, 1) @[lsu_bus_buffer.scala 467:97]
node _T_3801 = eq(_T_3800, UInt<1>("h00")) @[lsu_bus_buffer.scala 467:87]
node _T_3802 = and(_T_3799, _T_3801) @[lsu_bus_buffer.scala 467:85]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_3803 = eq(buf_dualtag[1], UInt<1>("h00")) @[lsu_bus_buffer.scala 57:118]
node _T_3804 = bits(buf_ldfwd, 0, 0) @[lsu_bus_buffer.scala 57:129]
node _T_3805 = eq(buf_dualtag[1], UInt<1>("h01")) @[lsu_bus_buffer.scala 57:118]
node _T_3806 = bits(buf_ldfwd, 1, 1) @[lsu_bus_buffer.scala 57:129]
node _T_3807 = eq(buf_dualtag[1], UInt<2>("h02")) @[lsu_bus_buffer.scala 57:118]
node _T_3808 = bits(buf_ldfwd, 2, 2) @[lsu_bus_buffer.scala 57:129]
node _T_3809 = eq(buf_dualtag[1], UInt<2>("h03")) @[lsu_bus_buffer.scala 57:118]
node _T_3810 = bits(buf_ldfwd, 3, 3) @[lsu_bus_buffer.scala 57:129]
node _T_3811 = mux(_T_3803, _T_3804, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_3812 = mux(_T_3805, _T_3806, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_3813 = mux(_T_3807, _T_3808, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_3814 = mux(_T_3809, _T_3810, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_3815 = or(_T_3811, _T_3812) @[Mux.scala 27:72]
node _T_3816 = or(_T_3815, _T_3813) @[Mux.scala 27:72]
node _T_3817 = or(_T_3816, _T_3814) @[Mux.scala 27:72]
wire _T_3818 : UInt<1> @[Mux.scala 27:72]
_T_3818 <= _T_3817 @[Mux.scala 27:72]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_3819 = and(_T_3802, _T_3818) @[lsu_bus_buffer.scala 467:101]
node _T_3820 = eq(buf_state[buf_dualtag[1]], UInt<3>("h04")) @[lsu_bus_buffer.scala 467:167]
node _T_3821 = and(_T_3819, _T_3820) @[lsu_bus_buffer.scala 467:138]
node _T_3822 = and(_T_3821, any_done_wait_state) @[lsu_bus_buffer.scala 467:187]
node _T_3823 = or(_T_3797, _T_3822) @[lsu_bus_buffer.scala 467:53]
node _T_3824 = mux(_T_3823, UInt<3>("h05"), UInt<3>("h06")) @[lsu_bus_buffer.scala 467:16]
node _T_3825 = mux(_T_3795, UInt<3>("h04"), _T_3824) @[lsu_bus_buffer.scala 466:14]
node _T_3826 = mux(_T_3788, UInt<3>("h00"), _T_3825) @[lsu_bus_buffer.scala 465:31]
buf_nxtstate[1] <= _T_3826 @[lsu_bus_buffer.scala 465:25]
node _T_3827 = eq(bus_rsp_write_tag, UInt<3>("h01")) @[lsu_bus_buffer.scala 468:73]
node _T_3828 = and(bus_rsp_write, _T_3827) @[lsu_bus_buffer.scala 468:52]
node _T_3829 = eq(bus_rsp_read_tag, UInt<3>("h01")) @[lsu_bus_buffer.scala 469:46]
node _T_3830 = bits(buf_ldfwd, 1, 1) @[lsu_bus_buffer.scala 470:23]
node _T_3831 = eq(bus_rsp_read_tag, buf_ldfwdtag[1]) @[lsu_bus_buffer.scala 470:47]
node _T_3832 = and(_T_3830, _T_3831) @[lsu_bus_buffer.scala 470:27]
node _T_3833 = or(_T_3829, _T_3832) @[lsu_bus_buffer.scala 469:77]
node _T_3834 = and(buf_dual[1], buf_dualhi[1]) @[lsu_bus_buffer.scala 471:26]
node _T_3835 = bits(buf_write, 1, 1) @[lsu_bus_buffer.scala 471:54]
node _T_3836 = not(_T_3835) @[lsu_bus_buffer.scala 471:44]
node _T_3837 = and(_T_3834, _T_3836) @[lsu_bus_buffer.scala 471:42]
node _T_3838 = and(_T_3837, buf_samedw[1]) @[lsu_bus_buffer.scala 471:58]
node _T_3839 = eq(bus_rsp_read_tag, buf_dualtag[1]) @[lsu_bus_buffer.scala 471:94]
node _T_3840 = and(_T_3838, _T_3839) @[lsu_bus_buffer.scala 471:74]
node _T_3841 = or(_T_3833, _T_3840) @[lsu_bus_buffer.scala 470:71]
node _T_3842 = and(bus_rsp_read, _T_3841) @[lsu_bus_buffer.scala 469:25]
node _T_3843 = or(_T_3828, _T_3842) @[lsu_bus_buffer.scala 468:105]
buf_resp_state_bus_en[1] <= _T_3843 @[lsu_bus_buffer.scala 468:34]
buf_state_bus_en[1] <= buf_resp_state_bus_en[1] @[lsu_bus_buffer.scala 472:29]
node _T_3844 = and(buf_state_bus_en[1], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 473:49]
node _T_3845 = or(_T_3844, io.dec_tlu_force_halt) @[lsu_bus_buffer.scala 473:70]
buf_state_en[1] <= _T_3845 @[lsu_bus_buffer.scala 473:25]
node _T_3846 = and(buf_state_bus_en[1], bus_rsp_read) @[lsu_bus_buffer.scala 474:47]
node _T_3847 = and(_T_3846, io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 474:62]
buf_data_en[1] <= _T_3847 @[lsu_bus_buffer.scala 474:24]
node _T_3848 = and(buf_state_bus_en[1], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 475:48]
node _T_3849 = eq(bus_rsp_read_tag, UInt<3>("h01")) @[lsu_bus_buffer.scala 475:111]
node _T_3850 = and(bus_rsp_read_error, _T_3849) @[lsu_bus_buffer.scala 475:91]
node _T_3851 = bits(buf_ldfwd, 1, 1) @[lsu_bus_buffer.scala 476:42]
node _T_3852 = and(bus_rsp_read_error, _T_3851) @[lsu_bus_buffer.scala 476:31]
node _T_3853 = eq(bus_rsp_read_tag, buf_ldfwdtag[1]) @[lsu_bus_buffer.scala 476:66]
node _T_3854 = and(_T_3852, _T_3853) @[lsu_bus_buffer.scala 476:46]
node _T_3855 = or(_T_3850, _T_3854) @[lsu_bus_buffer.scala 475:143]
node _T_3856 = and(bus_rsp_write_error, UInt<1>("h01")) @[lsu_bus_buffer.scala 477:32]
node _T_3857 = eq(bus_rsp_write_tag, UInt<3>("h01")) @[lsu_bus_buffer.scala 477:74]
node _T_3858 = and(_T_3856, _T_3857) @[lsu_bus_buffer.scala 477:53]
node _T_3859 = or(_T_3855, _T_3858) @[lsu_bus_buffer.scala 476:88]
node _T_3860 = and(_T_3848, _T_3859) @[lsu_bus_buffer.scala 475:68]
buf_error_en[1] <= _T_3860 @[lsu_bus_buffer.scala 475:25]
node _T_3861 = eq(buf_error_en[1], UInt<1>("h00")) @[lsu_bus_buffer.scala 478:50]
node _T_3862 = and(buf_state_en[1], _T_3861) @[lsu_bus_buffer.scala 478:48]
node _T_3863 = bits(buf_addr[1], 2, 2) @[lsu_bus_buffer.scala 478:84]
node _T_3864 = bits(bus_rsp_rdata, 63, 32) @[lsu_bus_buffer.scala 478:102]
node _T_3865 = bits(bus_rsp_rdata, 31, 0) @[lsu_bus_buffer.scala 478:125]
node _T_3866 = mux(_T_3863, _T_3864, _T_3865) @[lsu_bus_buffer.scala 478:72]
node _T_3867 = bits(bus_rsp_rdata, 31, 0) @[lsu_bus_buffer.scala 478:148]
node _T_3868 = mux(_T_3862, _T_3866, _T_3867) @[lsu_bus_buffer.scala 478:30]
buf_data_in[1] <= _T_3868 @[lsu_bus_buffer.scala 478:24]
LSU with Bundling
2020-12-10 12:50:49 +08:00
skip @[Conditional.scala 39:67]
else : @[Conditional.scala 39:67]
node _T_3869 = eq(UInt<3>("h04"), buf_state[1]) @[Conditional.scala 37:30]
when _T_3869 : @[Conditional.scala 39:67]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_3870 = bits(io.dec_tlu_force_halt, 0, 0) @[lsu_bus_buffer.scala 481:60]
node _T_3871 = bits(buf_ldfwd, 1, 1) @[lsu_bus_buffer.scala 481:86]
node _T_3872 = dshr(buf_ldfwd, buf_dualtag[1]) @[lsu_bus_buffer.scala 481:101]
node _T_3873 = bits(_T_3872, 0, 0) @[lsu_bus_buffer.scala 481:101]
node _T_3874 = or(_T_3871, _T_3873) @[lsu_bus_buffer.scala 481:90]
node _T_3875 = or(_T_3874, any_done_wait_state) @[lsu_bus_buffer.scala 481:118]
node _T_3876 = mux(_T_3875, UInt<3>("h05"), UInt<3>("h06")) @[lsu_bus_buffer.scala 481:75]
node _T_3877 = mux(_T_3870, UInt<3>("h00"), _T_3876) @[lsu_bus_buffer.scala 481:31]
buf_nxtstate[1] <= _T_3877 @[lsu_bus_buffer.scala 481:25]
node _T_3878 = eq(bus_rsp_read_tag, buf_dualtag[1]) @[lsu_bus_buffer.scala 482:66]
node _T_3879 = dshr(buf_ldfwd, buf_dualtag[1]) @[lsu_bus_buffer.scala 483:21]
node _T_3880 = bits(_T_3879, 0, 0) @[lsu_bus_buffer.scala 483:21]
node _T_3881 = eq(bus_rsp_read_tag, buf_ldfwdtag[buf_dualtag[1]]) @[lsu_bus_buffer.scala 483:58]
node _T_3882 = and(_T_3880, _T_3881) @[lsu_bus_buffer.scala 483:38]
node _T_3883 = or(_T_3878, _T_3882) @[lsu_bus_buffer.scala 482:95]
node _T_3884 = and(bus_rsp_read, _T_3883) @[lsu_bus_buffer.scala 482:45]
buf_state_bus_en[1] <= _T_3884 @[lsu_bus_buffer.scala 482:29]
node _T_3885 = and(buf_state_bus_en[1], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 484:49]
node _T_3886 = or(_T_3885, io.dec_tlu_force_halt) @[lsu_bus_buffer.scala 484:70]
buf_state_en[1] <= _T_3886 @[lsu_bus_buffer.scala 484:25]
LSU with Bundling
2020-12-10 12:50:49 +08:00
skip @[Conditional.scala 39:67]
else : @[Conditional.scala 39:67]
node _T_3887 = eq(UInt<3>("h05"), buf_state[1]) @[Conditional.scala 37:30]
when _T_3887 : @[Conditional.scala 39:67]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_3888 = bits(io.dec_tlu_force_halt, 0, 0) @[lsu_bus_buffer.scala 487:60]
node _T_3889 = mux(_T_3888, UInt<3>("h00"), UInt<3>("h06")) @[lsu_bus_buffer.scala 487:31]
buf_nxtstate[1] <= _T_3889 @[lsu_bus_buffer.scala 487:25]
node _T_3890 = eq(RspPtr, UInt<2>("h01")) @[lsu_bus_buffer.scala 488:37]
node _T_3891 = eq(buf_dualtag[1], RspPtr) @[lsu_bus_buffer.scala 488:98]
node _T_3892 = and(buf_dual[1], _T_3891) @[lsu_bus_buffer.scala 488:80]
node _T_3893 = or(_T_3890, _T_3892) @[lsu_bus_buffer.scala 488:65]
node _T_3894 = or(_T_3893, io.dec_tlu_force_halt) @[lsu_bus_buffer.scala 488:112]
buf_state_en[1] <= _T_3894 @[lsu_bus_buffer.scala 488:25]
LSU with Bundling
2020-12-10 12:50:49 +08:00
skip @[Conditional.scala 39:67]
else : @[Conditional.scala 39:67]
node _T_3895 = eq(UInt<3>("h06"), buf_state[1]) @[Conditional.scala 37:30]
when _T_3895 : @[Conditional.scala 39:67]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_nxtstate[1] <= UInt<3>("h00") @[lsu_bus_buffer.scala 491:25]
buf_rst[1] <= UInt<1>("h01") @[lsu_bus_buffer.scala 492:20]
buf_state_en[1] <= UInt<1>("h01") @[lsu_bus_buffer.scala 493:25]
buf_ldfwd_in[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 494:25]
buf_ldfwd_en[1] <= buf_state_en[1] @[lsu_bus_buffer.scala 495:25]
LSU with Bundling
2020-12-10 12:50:49 +08:00
skip @[Conditional.scala 39:67]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_3896 = bits(buf_state_en[1], 0, 0) @[lsu_bus_buffer.scala 498:108]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_3897 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_3896 : @[Reg.scala 28:19]
_T_3897 <= buf_nxtstate[1] @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_state[1] <= _T_3897 @[lsu_bus_buffer.scala 498:18]
reg _T_3898 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_buffer.scala 499:60]
_T_3898 <= buf_age_in_1 @[lsu_bus_buffer.scala 499:60]
buf_ageQ[1] <= _T_3898 @[lsu_bus_buffer.scala 499:17]
reg _T_3899 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_buffer.scala 500:63]
_T_3899 <= buf_rspage_in[1] @[lsu_bus_buffer.scala 500:63]
buf_rspageQ[1] <= _T_3899 @[lsu_bus_buffer.scala 500:20]
node _T_3900 = bits(buf_wr_en[1], 0, 0) @[lsu_bus_buffer.scala 501:109]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_3901 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_3900 : @[Reg.scala 28:19]
_T_3901 <= buf_dualtag_in[1] @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_dualtag[1] <= _T_3901 @[lsu_bus_buffer.scala 501:20]
node _T_3902 = bits(buf_dual_in, 1, 1) @[lsu_bus_buffer.scala 502:74]
node _T_3903 = bits(buf_wr_en[1], 0, 0) @[lsu_bus_buffer.scala 502:107]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_3904 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_3903 : @[Reg.scala 28:19]
_T_3904 <= _T_3902 @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_dual[1] <= _T_3904 @[lsu_bus_buffer.scala 502:17]
node _T_3905 = bits(buf_samedw_in, 1, 1) @[lsu_bus_buffer.scala 503:78]
node _T_3906 = bits(buf_wr_en[1], 0, 0) @[lsu_bus_buffer.scala 503:111]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_3907 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_3906 : @[Reg.scala 28:19]
_T_3907 <= _T_3905 @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_samedw[1] <= _T_3907 @[lsu_bus_buffer.scala 503:19]
node _T_3908 = bits(buf_nomerge_in, 1, 1) @[lsu_bus_buffer.scala 504:80]
node _T_3909 = bits(buf_wr_en[1], 0, 0) @[lsu_bus_buffer.scala 504:113]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_3910 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_3909 : @[Reg.scala 28:19]
_T_3910 <= _T_3908 @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_nomerge[1] <= _T_3910 @[lsu_bus_buffer.scala 504:20]
node _T_3911 = bits(buf_dualhi_in, 1, 1) @[lsu_bus_buffer.scala 505:78]
node _T_3912 = bits(buf_wr_en[1], 0, 0) @[lsu_bus_buffer.scala 505:111]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_3913 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_3912 : @[Reg.scala 28:19]
_T_3913 <= _T_3911 @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_dualhi[1] <= _T_3913 @[lsu_bus_buffer.scala 505:19]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_3914 = eq(UInt<3>("h00"), buf_state[2]) @[Conditional.scala 37:30]
when _T_3914 : @[Conditional.scala 40:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_3915 = bits(io.lsu_bus_clk_en, 0, 0) @[lsu_bus_buffer.scala 442:56]
node _T_3916 = mux(_T_3915, UInt<3>("h02"), UInt<3>("h01")) @[lsu_bus_buffer.scala 442:31]
buf_nxtstate[2] <= _T_3916 @[lsu_bus_buffer.scala 442:25]
node _T_3917 = and(io.lsu_busreq_r, io.lsu_commit_r) @[lsu_bus_buffer.scala 443:45]
node _T_3918 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 443:77]
node _T_3919 = eq(ibuf_merge_en, UInt<1>("h00")) @[lsu_bus_buffer.scala 443:97]
node _T_3920 = and(_T_3918, _T_3919) @[lsu_bus_buffer.scala 443:95]
node _T_3921 = eq(UInt<2>("h02"), WrPtr0_r) @[lsu_bus_buffer.scala 443:117]
node _T_3922 = and(_T_3920, _T_3921) @[lsu_bus_buffer.scala 443:112]
node _T_3923 = and(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 443:144]
node _T_3924 = eq(UInt<2>("h02"), WrPtr1_r) @[lsu_bus_buffer.scala 443:166]
node _T_3925 = and(_T_3923, _T_3924) @[lsu_bus_buffer.scala 443:161]
node _T_3926 = or(_T_3922, _T_3925) @[lsu_bus_buffer.scala 443:132]
node _T_3927 = and(_T_3917, _T_3926) @[lsu_bus_buffer.scala 443:63]
node _T_3928 = eq(UInt<2>("h02"), ibuf_tag) @[lsu_bus_buffer.scala 443:206]
node _T_3929 = and(ibuf_drain_vld, _T_3928) @[lsu_bus_buffer.scala 443:201]
node _T_3930 = or(_T_3927, _T_3929) @[lsu_bus_buffer.scala 443:183]
buf_state_en[2] <= _T_3930 @[lsu_bus_buffer.scala 443:25]
buf_wr_en[2] <= buf_state_en[2] @[lsu_bus_buffer.scala 444:22]
buf_data_en[2] <= buf_state_en[2] @[lsu_bus_buffer.scala 445:24]
node _T_3931 = eq(UInt<2>("h02"), ibuf_tag) @[lsu_bus_buffer.scala 446:52]
node _T_3932 = and(ibuf_drain_vld, _T_3931) @[lsu_bus_buffer.scala 446:47]
node _T_3933 = bits(_T_3932, 0, 0) @[lsu_bus_buffer.scala 446:73]
node _T_3934 = bits(ibuf_data_out, 31, 0) @[lsu_bus_buffer.scala 446:90]
node _T_3935 = bits(store_data_lo_r, 31, 0) @[lsu_bus_buffer.scala 446:114]
node _T_3936 = mux(_T_3933, _T_3934, _T_3935) @[lsu_bus_buffer.scala 446:30]
buf_data_in[2] <= _T_3936 @[lsu_bus_buffer.scala 446:24]
LSU with Bundling
2020-12-10 12:50:49 +08:00
skip @[Conditional.scala 40:58]
else : @[Conditional.scala 39:67]
node _T_3937 = eq(UInt<3>("h01"), buf_state[2]) @[Conditional.scala 37:30]
when _T_3937 : @[Conditional.scala 39:67]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_3938 = bits(io.dec_tlu_force_halt, 0, 0) @[lsu_bus_buffer.scala 449:60]
node _T_3939 = mux(_T_3938, UInt<3>("h00"), UInt<3>("h02")) @[lsu_bus_buffer.scala 449:31]
buf_nxtstate[2] <= _T_3939 @[lsu_bus_buffer.scala 449:25]
node _T_3940 = or(io.lsu_bus_clk_en, io.dec_tlu_force_halt) @[lsu_bus_buffer.scala 450:46]
buf_state_en[2] <= _T_3940 @[lsu_bus_buffer.scala 450:25]
LSU with Bundling
2020-12-10 12:50:49 +08:00
skip @[Conditional.scala 39:67]
else : @[Conditional.scala 39:67]
node _T_3941 = eq(UInt<3>("h02"), buf_state[2]) @[Conditional.scala 37:30]
when _T_3941 : @[Conditional.scala 39:67]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_3942 = bits(io.dec_tlu_force_halt, 0, 0) @[lsu_bus_buffer.scala 453:60]
node _T_3943 = and(obuf_nosend, bus_rsp_read) @[lsu_bus_buffer.scala 453:89]
node _T_3944 = eq(bus_rsp_read_tag, obuf_rdrsp_tag) @[lsu_bus_buffer.scala 453:124]
node _T_3945 = and(_T_3943, _T_3944) @[lsu_bus_buffer.scala 453:104]
node _T_3946 = mux(_T_3945, UInt<3>("h05"), UInt<3>("h03")) @[lsu_bus_buffer.scala 453:75]
node _T_3947 = mux(_T_3942, UInt<3>("h00"), _T_3946) @[lsu_bus_buffer.scala 453:31]
buf_nxtstate[2] <= _T_3947 @[lsu_bus_buffer.scala 453:25]
node _T_3948 = eq(obuf_tag0, UInt<3>("h02")) @[lsu_bus_buffer.scala 454:48]
node _T_3949 = eq(obuf_tag1, UInt<3>("h02")) @[lsu_bus_buffer.scala 454:104]
node _T_3950 = and(obuf_merge, _T_3949) @[lsu_bus_buffer.scala 454:91]
node _T_3951 = or(_T_3948, _T_3950) @[lsu_bus_buffer.scala 454:77]
node _T_3952 = and(_T_3951, obuf_valid) @[lsu_bus_buffer.scala 454:135]
node _T_3953 = and(_T_3952, obuf_wr_enQ) @[lsu_bus_buffer.scala 454:148]
buf_cmd_state_bus_en[2] <= _T_3953 @[lsu_bus_buffer.scala 454:33]
buf_state_bus_en[2] <= buf_cmd_state_bus_en[2] @[lsu_bus_buffer.scala 455:29]
node _T_3954 = and(buf_state_bus_en[2], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 456:49]
node _T_3955 = or(_T_3954, io.dec_tlu_force_halt) @[lsu_bus_buffer.scala 456:70]
buf_state_en[2] <= _T_3955 @[lsu_bus_buffer.scala 456:25]
buf_ldfwd_in[2] <= UInt<1>("h01") @[lsu_bus_buffer.scala 457:25]
node _T_3956 = bits(buf_write, 2, 2) @[lsu_bus_buffer.scala 458:56]
node _T_3957 = eq(_T_3956, UInt<1>("h00")) @[lsu_bus_buffer.scala 458:46]
node _T_3958 = and(buf_state_en[2], _T_3957) @[lsu_bus_buffer.scala 458:44]
node _T_3959 = and(_T_3958, obuf_nosend) @[lsu_bus_buffer.scala 458:60]
node _T_3960 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[lsu_bus_buffer.scala 458:76]
node _T_3961 = and(_T_3959, _T_3960) @[lsu_bus_buffer.scala 458:74]
buf_ldfwd_en[2] <= _T_3961 @[lsu_bus_buffer.scala 458:25]
node _T_3962 = bits(obuf_rdrsp_tag, 1, 0) @[lsu_bus_buffer.scala 459:46]
buf_ldfwdtag_in[2] <= _T_3962 @[lsu_bus_buffer.scala 459:28]
node _T_3963 = and(buf_state_bus_en[2], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 460:47]
node _T_3964 = and(_T_3963, obuf_nosend) @[lsu_bus_buffer.scala 460:67]
node _T_3965 = and(_T_3964, bus_rsp_read) @[lsu_bus_buffer.scala 460:81]
buf_data_en[2] <= _T_3965 @[lsu_bus_buffer.scala 460:24]
node _T_3966 = and(buf_state_bus_en[2], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 461:48]
node _T_3967 = and(_T_3966, obuf_nosend) @[lsu_bus_buffer.scala 461:68]
node _T_3968 = and(_T_3967, bus_rsp_read_error) @[lsu_bus_buffer.scala 461:82]
buf_error_en[2] <= _T_3968 @[lsu_bus_buffer.scala 461:25]
node _T_3969 = bits(bus_rsp_rdata, 31, 0) @[lsu_bus_buffer.scala 462:61]
node _T_3970 = bits(buf_addr[2], 2, 2) @[lsu_bus_buffer.scala 462:85]
node _T_3971 = bits(bus_rsp_rdata, 63, 32) @[lsu_bus_buffer.scala 462:103]
node _T_3972 = bits(bus_rsp_rdata, 31, 0) @[lsu_bus_buffer.scala 462:126]
node _T_3973 = mux(_T_3970, _T_3971, _T_3972) @[lsu_bus_buffer.scala 462:73]
node _T_3974 = mux(buf_error_en[2], _T_3969, _T_3973) @[lsu_bus_buffer.scala 462:30]
buf_data_in[2] <= _T_3974 @[lsu_bus_buffer.scala 462:24]
LSU with Bundling
2020-12-10 12:50:49 +08:00
skip @[Conditional.scala 39:67]
else : @[Conditional.scala 39:67]
node _T_3975 = eq(UInt<3>("h03"), buf_state[2]) @[Conditional.scala 37:30]
when _T_3975 : @[Conditional.scala 39:67]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_3976 = bits(buf_write, 2, 2) @[lsu_bus_buffer.scala 465:67]
node _T_3977 = and(UInt<1>("h01"), bus_rsp_write_error) @[lsu_bus_buffer.scala 465:94]
node _T_3978 = eq(_T_3977, UInt<1>("h00")) @[lsu_bus_buffer.scala 465:73]
node _T_3979 = and(_T_3976, _T_3978) @[lsu_bus_buffer.scala 465:71]
node _T_3980 = or(io.dec_tlu_force_halt, _T_3979) @[lsu_bus_buffer.scala 465:55]
node _T_3981 = bits(_T_3980, 0, 0) @[lsu_bus_buffer.scala 465:125]
node _T_3982 = eq(buf_samedw[2], UInt<1>("h00")) @[lsu_bus_buffer.scala 466:30]
node _T_3983 = and(buf_dual[2], _T_3982) @[lsu_bus_buffer.scala 466:28]
node _T_3984 = bits(buf_write, 2, 2) @[lsu_bus_buffer.scala 466:57]
node _T_3985 = eq(_T_3984, UInt<1>("h00")) @[lsu_bus_buffer.scala 466:47]
node _T_3986 = and(_T_3983, _T_3985) @[lsu_bus_buffer.scala 466:45]
node _T_3987 = neq(buf_state[buf_dualtag[2]], UInt<3>("h04")) @[lsu_bus_buffer.scala 466:90]
node _T_3988 = and(_T_3986, _T_3987) @[lsu_bus_buffer.scala 466:61]
node _T_3989 = bits(buf_ldfwd, 2, 2) @[lsu_bus_buffer.scala 467:27]
node _T_3990 = or(_T_3989, any_done_wait_state) @[lsu_bus_buffer.scala 467:31]
node _T_3991 = eq(buf_samedw[2], UInt<1>("h00")) @[lsu_bus_buffer.scala 467:70]
node _T_3992 = and(buf_dual[2], _T_3991) @[lsu_bus_buffer.scala 467:68]
node _T_3993 = bits(buf_write, 2, 2) @[lsu_bus_buffer.scala 467:97]
node _T_3994 = eq(_T_3993, UInt<1>("h00")) @[lsu_bus_buffer.scala 467:87]
node _T_3995 = and(_T_3992, _T_3994) @[lsu_bus_buffer.scala 467:85]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_3996 = eq(buf_dualtag[2], UInt<1>("h00")) @[lsu_bus_buffer.scala 57:118]
node _T_3997 = bits(buf_ldfwd, 0, 0) @[lsu_bus_buffer.scala 57:129]
node _T_3998 = eq(buf_dualtag[2], UInt<1>("h01")) @[lsu_bus_buffer.scala 57:118]
node _T_3999 = bits(buf_ldfwd, 1, 1) @[lsu_bus_buffer.scala 57:129]
node _T_4000 = eq(buf_dualtag[2], UInt<2>("h02")) @[lsu_bus_buffer.scala 57:118]
node _T_4001 = bits(buf_ldfwd, 2, 2) @[lsu_bus_buffer.scala 57:129]
node _T_4002 = eq(buf_dualtag[2], UInt<2>("h03")) @[lsu_bus_buffer.scala 57:118]
node _T_4003 = bits(buf_ldfwd, 3, 3) @[lsu_bus_buffer.scala 57:129]
node _T_4004 = mux(_T_3996, _T_3997, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4005 = mux(_T_3998, _T_3999, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4006 = mux(_T_4000, _T_4001, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4007 = mux(_T_4002, _T_4003, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4008 = or(_T_4004, _T_4005) @[Mux.scala 27:72]
node _T_4009 = or(_T_4008, _T_4006) @[Mux.scala 27:72]
node _T_4010 = or(_T_4009, _T_4007) @[Mux.scala 27:72]
wire _T_4011 : UInt<1> @[Mux.scala 27:72]
_T_4011 <= _T_4010 @[Mux.scala 27:72]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4012 = and(_T_3995, _T_4011) @[lsu_bus_buffer.scala 467:101]
node _T_4013 = eq(buf_state[buf_dualtag[2]], UInt<3>("h04")) @[lsu_bus_buffer.scala 467:167]
node _T_4014 = and(_T_4012, _T_4013) @[lsu_bus_buffer.scala 467:138]
node _T_4015 = and(_T_4014, any_done_wait_state) @[lsu_bus_buffer.scala 467:187]
node _T_4016 = or(_T_3990, _T_4015) @[lsu_bus_buffer.scala 467:53]
node _T_4017 = mux(_T_4016, UInt<3>("h05"), UInt<3>("h06")) @[lsu_bus_buffer.scala 467:16]
node _T_4018 = mux(_T_3988, UInt<3>("h04"), _T_4017) @[lsu_bus_buffer.scala 466:14]
node _T_4019 = mux(_T_3981, UInt<3>("h00"), _T_4018) @[lsu_bus_buffer.scala 465:31]
buf_nxtstate[2] <= _T_4019 @[lsu_bus_buffer.scala 465:25]
node _T_4020 = eq(bus_rsp_write_tag, UInt<3>("h02")) @[lsu_bus_buffer.scala 468:73]
node _T_4021 = and(bus_rsp_write, _T_4020) @[lsu_bus_buffer.scala 468:52]
node _T_4022 = eq(bus_rsp_read_tag, UInt<3>("h02")) @[lsu_bus_buffer.scala 469:46]
node _T_4023 = bits(buf_ldfwd, 2, 2) @[lsu_bus_buffer.scala 470:23]
node _T_4024 = eq(bus_rsp_read_tag, buf_ldfwdtag[2]) @[lsu_bus_buffer.scala 470:47]
node _T_4025 = and(_T_4023, _T_4024) @[lsu_bus_buffer.scala 470:27]
node _T_4026 = or(_T_4022, _T_4025) @[lsu_bus_buffer.scala 469:77]
node _T_4027 = and(buf_dual[2], buf_dualhi[2]) @[lsu_bus_buffer.scala 471:26]
node _T_4028 = bits(buf_write, 2, 2) @[lsu_bus_buffer.scala 471:54]
node _T_4029 = not(_T_4028) @[lsu_bus_buffer.scala 471:44]
node _T_4030 = and(_T_4027, _T_4029) @[lsu_bus_buffer.scala 471:42]
node _T_4031 = and(_T_4030, buf_samedw[2]) @[lsu_bus_buffer.scala 471:58]
node _T_4032 = eq(bus_rsp_read_tag, buf_dualtag[2]) @[lsu_bus_buffer.scala 471:94]
node _T_4033 = and(_T_4031, _T_4032) @[lsu_bus_buffer.scala 471:74]
node _T_4034 = or(_T_4026, _T_4033) @[lsu_bus_buffer.scala 470:71]
node _T_4035 = and(bus_rsp_read, _T_4034) @[lsu_bus_buffer.scala 469:25]
node _T_4036 = or(_T_4021, _T_4035) @[lsu_bus_buffer.scala 468:105]
buf_resp_state_bus_en[2] <= _T_4036 @[lsu_bus_buffer.scala 468:34]
buf_state_bus_en[2] <= buf_resp_state_bus_en[2] @[lsu_bus_buffer.scala 472:29]
node _T_4037 = and(buf_state_bus_en[2], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 473:49]
node _T_4038 = or(_T_4037, io.dec_tlu_force_halt) @[lsu_bus_buffer.scala 473:70]
buf_state_en[2] <= _T_4038 @[lsu_bus_buffer.scala 473:25]
node _T_4039 = and(buf_state_bus_en[2], bus_rsp_read) @[lsu_bus_buffer.scala 474:47]
node _T_4040 = and(_T_4039, io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 474:62]
buf_data_en[2] <= _T_4040 @[lsu_bus_buffer.scala 474:24]
node _T_4041 = and(buf_state_bus_en[2], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 475:48]
node _T_4042 = eq(bus_rsp_read_tag, UInt<3>("h02")) @[lsu_bus_buffer.scala 475:111]
node _T_4043 = and(bus_rsp_read_error, _T_4042) @[lsu_bus_buffer.scala 475:91]
node _T_4044 = bits(buf_ldfwd, 2, 2) @[lsu_bus_buffer.scala 476:42]
node _T_4045 = and(bus_rsp_read_error, _T_4044) @[lsu_bus_buffer.scala 476:31]
node _T_4046 = eq(bus_rsp_read_tag, buf_ldfwdtag[2]) @[lsu_bus_buffer.scala 476:66]
node _T_4047 = and(_T_4045, _T_4046) @[lsu_bus_buffer.scala 476:46]
node _T_4048 = or(_T_4043, _T_4047) @[lsu_bus_buffer.scala 475:143]
node _T_4049 = and(bus_rsp_write_error, UInt<1>("h01")) @[lsu_bus_buffer.scala 477:32]
node _T_4050 = eq(bus_rsp_write_tag, UInt<3>("h02")) @[lsu_bus_buffer.scala 477:74]
node _T_4051 = and(_T_4049, _T_4050) @[lsu_bus_buffer.scala 477:53]
node _T_4052 = or(_T_4048, _T_4051) @[lsu_bus_buffer.scala 476:88]
node _T_4053 = and(_T_4041, _T_4052) @[lsu_bus_buffer.scala 475:68]
buf_error_en[2] <= _T_4053 @[lsu_bus_buffer.scala 475:25]
node _T_4054 = eq(buf_error_en[2], UInt<1>("h00")) @[lsu_bus_buffer.scala 478:50]
node _T_4055 = and(buf_state_en[2], _T_4054) @[lsu_bus_buffer.scala 478:48]
node _T_4056 = bits(buf_addr[2], 2, 2) @[lsu_bus_buffer.scala 478:84]
node _T_4057 = bits(bus_rsp_rdata, 63, 32) @[lsu_bus_buffer.scala 478:102]
node _T_4058 = bits(bus_rsp_rdata, 31, 0) @[lsu_bus_buffer.scala 478:125]
node _T_4059 = mux(_T_4056, _T_4057, _T_4058) @[lsu_bus_buffer.scala 478:72]
node _T_4060 = bits(bus_rsp_rdata, 31, 0) @[lsu_bus_buffer.scala 478:148]
node _T_4061 = mux(_T_4055, _T_4059, _T_4060) @[lsu_bus_buffer.scala 478:30]
buf_data_in[2] <= _T_4061 @[lsu_bus_buffer.scala 478:24]
LSU with Bundling
2020-12-10 12:50:49 +08:00
skip @[Conditional.scala 39:67]
else : @[Conditional.scala 39:67]
node _T_4062 = eq(UInt<3>("h04"), buf_state[2]) @[Conditional.scala 37:30]
when _T_4062 : @[Conditional.scala 39:67]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4063 = bits(io.dec_tlu_force_halt, 0, 0) @[lsu_bus_buffer.scala 481:60]
node _T_4064 = bits(buf_ldfwd, 2, 2) @[lsu_bus_buffer.scala 481:86]
node _T_4065 = dshr(buf_ldfwd, buf_dualtag[2]) @[lsu_bus_buffer.scala 481:101]
node _T_4066 = bits(_T_4065, 0, 0) @[lsu_bus_buffer.scala 481:101]
node _T_4067 = or(_T_4064, _T_4066) @[lsu_bus_buffer.scala 481:90]
node _T_4068 = or(_T_4067, any_done_wait_state) @[lsu_bus_buffer.scala 481:118]
node _T_4069 = mux(_T_4068, UInt<3>("h05"), UInt<3>("h06")) @[lsu_bus_buffer.scala 481:75]
node _T_4070 = mux(_T_4063, UInt<3>("h00"), _T_4069) @[lsu_bus_buffer.scala 481:31]
buf_nxtstate[2] <= _T_4070 @[lsu_bus_buffer.scala 481:25]
node _T_4071 = eq(bus_rsp_read_tag, buf_dualtag[2]) @[lsu_bus_buffer.scala 482:66]
node _T_4072 = dshr(buf_ldfwd, buf_dualtag[2]) @[lsu_bus_buffer.scala 483:21]
node _T_4073 = bits(_T_4072, 0, 0) @[lsu_bus_buffer.scala 483:21]
node _T_4074 = eq(bus_rsp_read_tag, buf_ldfwdtag[buf_dualtag[2]]) @[lsu_bus_buffer.scala 483:58]
node _T_4075 = and(_T_4073, _T_4074) @[lsu_bus_buffer.scala 483:38]
node _T_4076 = or(_T_4071, _T_4075) @[lsu_bus_buffer.scala 482:95]
node _T_4077 = and(bus_rsp_read, _T_4076) @[lsu_bus_buffer.scala 482:45]
buf_state_bus_en[2] <= _T_4077 @[lsu_bus_buffer.scala 482:29]
node _T_4078 = and(buf_state_bus_en[2], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 484:49]
node _T_4079 = or(_T_4078, io.dec_tlu_force_halt) @[lsu_bus_buffer.scala 484:70]
buf_state_en[2] <= _T_4079 @[lsu_bus_buffer.scala 484:25]
LSU with Bundling
2020-12-10 12:50:49 +08:00
skip @[Conditional.scala 39:67]
else : @[Conditional.scala 39:67]
node _T_4080 = eq(UInt<3>("h05"), buf_state[2]) @[Conditional.scala 37:30]
when _T_4080 : @[Conditional.scala 39:67]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4081 = bits(io.dec_tlu_force_halt, 0, 0) @[lsu_bus_buffer.scala 487:60]
node _T_4082 = mux(_T_4081, UInt<3>("h00"), UInt<3>("h06")) @[lsu_bus_buffer.scala 487:31]
buf_nxtstate[2] <= _T_4082 @[lsu_bus_buffer.scala 487:25]
node _T_4083 = eq(RspPtr, UInt<2>("h02")) @[lsu_bus_buffer.scala 488:37]
node _T_4084 = eq(buf_dualtag[2], RspPtr) @[lsu_bus_buffer.scala 488:98]
node _T_4085 = and(buf_dual[2], _T_4084) @[lsu_bus_buffer.scala 488:80]
node _T_4086 = or(_T_4083, _T_4085) @[lsu_bus_buffer.scala 488:65]
node _T_4087 = or(_T_4086, io.dec_tlu_force_halt) @[lsu_bus_buffer.scala 488:112]
buf_state_en[2] <= _T_4087 @[lsu_bus_buffer.scala 488:25]
LSU with Bundling
2020-12-10 12:50:49 +08:00
skip @[Conditional.scala 39:67]
else : @[Conditional.scala 39:67]
node _T_4088 = eq(UInt<3>("h06"), buf_state[2]) @[Conditional.scala 37:30]
when _T_4088 : @[Conditional.scala 39:67]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_nxtstate[2] <= UInt<3>("h00") @[lsu_bus_buffer.scala 491:25]
buf_rst[2] <= UInt<1>("h01") @[lsu_bus_buffer.scala 492:20]
buf_state_en[2] <= UInt<1>("h01") @[lsu_bus_buffer.scala 493:25]
buf_ldfwd_in[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 494:25]
buf_ldfwd_en[2] <= buf_state_en[2] @[lsu_bus_buffer.scala 495:25]
LSU with Bundling
2020-12-10 12:50:49 +08:00
skip @[Conditional.scala 39:67]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4089 = bits(buf_state_en[2], 0, 0) @[lsu_bus_buffer.scala 498:108]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_4090 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_4089 : @[Reg.scala 28:19]
_T_4090 <= buf_nxtstate[2] @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_state[2] <= _T_4090 @[lsu_bus_buffer.scala 498:18]
reg _T_4091 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_buffer.scala 499:60]
_T_4091 <= buf_age_in_2 @[lsu_bus_buffer.scala 499:60]
buf_ageQ[2] <= _T_4091 @[lsu_bus_buffer.scala 499:17]
reg _T_4092 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_buffer.scala 500:63]
_T_4092 <= buf_rspage_in[2] @[lsu_bus_buffer.scala 500:63]
buf_rspageQ[2] <= _T_4092 @[lsu_bus_buffer.scala 500:20]
node _T_4093 = bits(buf_wr_en[2], 0, 0) @[lsu_bus_buffer.scala 501:109]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_4094 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_4093 : @[Reg.scala 28:19]
_T_4094 <= buf_dualtag_in[2] @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_dualtag[2] <= _T_4094 @[lsu_bus_buffer.scala 501:20]
node _T_4095 = bits(buf_dual_in, 2, 2) @[lsu_bus_buffer.scala 502:74]
node _T_4096 = bits(buf_wr_en[2], 0, 0) @[lsu_bus_buffer.scala 502:107]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_4097 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_4096 : @[Reg.scala 28:19]
_T_4097 <= _T_4095 @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_dual[2] <= _T_4097 @[lsu_bus_buffer.scala 502:17]
node _T_4098 = bits(buf_samedw_in, 2, 2) @[lsu_bus_buffer.scala 503:78]
node _T_4099 = bits(buf_wr_en[2], 0, 0) @[lsu_bus_buffer.scala 503:111]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_4100 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_4099 : @[Reg.scala 28:19]
_T_4100 <= _T_4098 @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_samedw[2] <= _T_4100 @[lsu_bus_buffer.scala 503:19]
node _T_4101 = bits(buf_nomerge_in, 2, 2) @[lsu_bus_buffer.scala 504:80]
node _T_4102 = bits(buf_wr_en[2], 0, 0) @[lsu_bus_buffer.scala 504:113]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_4103 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_4102 : @[Reg.scala 28:19]
_T_4103 <= _T_4101 @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_nomerge[2] <= _T_4103 @[lsu_bus_buffer.scala 504:20]
node _T_4104 = bits(buf_dualhi_in, 2, 2) @[lsu_bus_buffer.scala 505:78]
node _T_4105 = bits(buf_wr_en[2], 0, 0) @[lsu_bus_buffer.scala 505:111]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_4106 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_4105 : @[Reg.scala 28:19]
_T_4106 <= _T_4104 @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_dualhi[2] <= _T_4106 @[lsu_bus_buffer.scala 505:19]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_4107 = eq(UInt<3>("h00"), buf_state[3]) @[Conditional.scala 37:30]
when _T_4107 : @[Conditional.scala 40:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4108 = bits(io.lsu_bus_clk_en, 0, 0) @[lsu_bus_buffer.scala 442:56]
node _T_4109 = mux(_T_4108, UInt<3>("h02"), UInt<3>("h01")) @[lsu_bus_buffer.scala 442:31]
buf_nxtstate[3] <= _T_4109 @[lsu_bus_buffer.scala 442:25]
node _T_4110 = and(io.lsu_busreq_r, io.lsu_commit_r) @[lsu_bus_buffer.scala 443:45]
node _T_4111 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 443:77]
node _T_4112 = eq(ibuf_merge_en, UInt<1>("h00")) @[lsu_bus_buffer.scala 443:97]
node _T_4113 = and(_T_4111, _T_4112) @[lsu_bus_buffer.scala 443:95]
node _T_4114 = eq(UInt<2>("h03"), WrPtr0_r) @[lsu_bus_buffer.scala 443:117]
node _T_4115 = and(_T_4113, _T_4114) @[lsu_bus_buffer.scala 443:112]
node _T_4116 = and(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 443:144]
node _T_4117 = eq(UInt<2>("h03"), WrPtr1_r) @[lsu_bus_buffer.scala 443:166]
node _T_4118 = and(_T_4116, _T_4117) @[lsu_bus_buffer.scala 443:161]
node _T_4119 = or(_T_4115, _T_4118) @[lsu_bus_buffer.scala 443:132]
node _T_4120 = and(_T_4110, _T_4119) @[lsu_bus_buffer.scala 443:63]
node _T_4121 = eq(UInt<2>("h03"), ibuf_tag) @[lsu_bus_buffer.scala 443:206]
node _T_4122 = and(ibuf_drain_vld, _T_4121) @[lsu_bus_buffer.scala 443:201]
node _T_4123 = or(_T_4120, _T_4122) @[lsu_bus_buffer.scala 443:183]
buf_state_en[3] <= _T_4123 @[lsu_bus_buffer.scala 443:25]
buf_wr_en[3] <= buf_state_en[3] @[lsu_bus_buffer.scala 444:22]
buf_data_en[3] <= buf_state_en[3] @[lsu_bus_buffer.scala 445:24]
node _T_4124 = eq(UInt<2>("h03"), ibuf_tag) @[lsu_bus_buffer.scala 446:52]
node _T_4125 = and(ibuf_drain_vld, _T_4124) @[lsu_bus_buffer.scala 446:47]
node _T_4126 = bits(_T_4125, 0, 0) @[lsu_bus_buffer.scala 446:73]
node _T_4127 = bits(ibuf_data_out, 31, 0) @[lsu_bus_buffer.scala 446:90]
node _T_4128 = bits(store_data_lo_r, 31, 0) @[lsu_bus_buffer.scala 446:114]
node _T_4129 = mux(_T_4126, _T_4127, _T_4128) @[lsu_bus_buffer.scala 446:30]
buf_data_in[3] <= _T_4129 @[lsu_bus_buffer.scala 446:24]
LSU with Bundling
2020-12-10 12:50:49 +08:00
skip @[Conditional.scala 40:58]
else : @[Conditional.scala 39:67]
node _T_4130 = eq(UInt<3>("h01"), buf_state[3]) @[Conditional.scala 37:30]
when _T_4130 : @[Conditional.scala 39:67]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4131 = bits(io.dec_tlu_force_halt, 0, 0) @[lsu_bus_buffer.scala 449:60]
node _T_4132 = mux(_T_4131, UInt<3>("h00"), UInt<3>("h02")) @[lsu_bus_buffer.scala 449:31]
buf_nxtstate[3] <= _T_4132 @[lsu_bus_buffer.scala 449:25]
node _T_4133 = or(io.lsu_bus_clk_en, io.dec_tlu_force_halt) @[lsu_bus_buffer.scala 450:46]
buf_state_en[3] <= _T_4133 @[lsu_bus_buffer.scala 450:25]
LSU with Bundling
2020-12-10 12:50:49 +08:00
skip @[Conditional.scala 39:67]
else : @[Conditional.scala 39:67]
node _T_4134 = eq(UInt<3>("h02"), buf_state[3]) @[Conditional.scala 37:30]
when _T_4134 : @[Conditional.scala 39:67]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4135 = bits(io.dec_tlu_force_halt, 0, 0) @[lsu_bus_buffer.scala 453:60]
node _T_4136 = and(obuf_nosend, bus_rsp_read) @[lsu_bus_buffer.scala 453:89]
node _T_4137 = eq(bus_rsp_read_tag, obuf_rdrsp_tag) @[lsu_bus_buffer.scala 453:124]
node _T_4138 = and(_T_4136, _T_4137) @[lsu_bus_buffer.scala 453:104]
node _T_4139 = mux(_T_4138, UInt<3>("h05"), UInt<3>("h03")) @[lsu_bus_buffer.scala 453:75]
node _T_4140 = mux(_T_4135, UInt<3>("h00"), _T_4139) @[lsu_bus_buffer.scala 453:31]
buf_nxtstate[3] <= _T_4140 @[lsu_bus_buffer.scala 453:25]
node _T_4141 = eq(obuf_tag0, UInt<3>("h03")) @[lsu_bus_buffer.scala 454:48]
node _T_4142 = eq(obuf_tag1, UInt<3>("h03")) @[lsu_bus_buffer.scala 454:104]
node _T_4143 = and(obuf_merge, _T_4142) @[lsu_bus_buffer.scala 454:91]
node _T_4144 = or(_T_4141, _T_4143) @[lsu_bus_buffer.scala 454:77]
node _T_4145 = and(_T_4144, obuf_valid) @[lsu_bus_buffer.scala 454:135]
node _T_4146 = and(_T_4145, obuf_wr_enQ) @[lsu_bus_buffer.scala 454:148]
buf_cmd_state_bus_en[3] <= _T_4146 @[lsu_bus_buffer.scala 454:33]
buf_state_bus_en[3] <= buf_cmd_state_bus_en[3] @[lsu_bus_buffer.scala 455:29]
node _T_4147 = and(buf_state_bus_en[3], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 456:49]
node _T_4148 = or(_T_4147, io.dec_tlu_force_halt) @[lsu_bus_buffer.scala 456:70]
buf_state_en[3] <= _T_4148 @[lsu_bus_buffer.scala 456:25]
buf_ldfwd_in[3] <= UInt<1>("h01") @[lsu_bus_buffer.scala 457:25]
node _T_4149 = bits(buf_write, 3, 3) @[lsu_bus_buffer.scala 458:56]
node _T_4150 = eq(_T_4149, UInt<1>("h00")) @[lsu_bus_buffer.scala 458:46]
node _T_4151 = and(buf_state_en[3], _T_4150) @[lsu_bus_buffer.scala 458:44]
node _T_4152 = and(_T_4151, obuf_nosend) @[lsu_bus_buffer.scala 458:60]
node _T_4153 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[lsu_bus_buffer.scala 458:76]
node _T_4154 = and(_T_4152, _T_4153) @[lsu_bus_buffer.scala 458:74]
buf_ldfwd_en[3] <= _T_4154 @[lsu_bus_buffer.scala 458:25]
node _T_4155 = bits(obuf_rdrsp_tag, 1, 0) @[lsu_bus_buffer.scala 459:46]
buf_ldfwdtag_in[3] <= _T_4155 @[lsu_bus_buffer.scala 459:28]
node _T_4156 = and(buf_state_bus_en[3], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 460:47]
node _T_4157 = and(_T_4156, obuf_nosend) @[lsu_bus_buffer.scala 460:67]
node _T_4158 = and(_T_4157, bus_rsp_read) @[lsu_bus_buffer.scala 460:81]
buf_data_en[3] <= _T_4158 @[lsu_bus_buffer.scala 460:24]
node _T_4159 = and(buf_state_bus_en[3], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 461:48]
node _T_4160 = and(_T_4159, obuf_nosend) @[lsu_bus_buffer.scala 461:68]
node _T_4161 = and(_T_4160, bus_rsp_read_error) @[lsu_bus_buffer.scala 461:82]
buf_error_en[3] <= _T_4161 @[lsu_bus_buffer.scala 461:25]
node _T_4162 = bits(bus_rsp_rdata, 31, 0) @[lsu_bus_buffer.scala 462:61]
node _T_4163 = bits(buf_addr[3], 2, 2) @[lsu_bus_buffer.scala 462:85]
node _T_4164 = bits(bus_rsp_rdata, 63, 32) @[lsu_bus_buffer.scala 462:103]
node _T_4165 = bits(bus_rsp_rdata, 31, 0) @[lsu_bus_buffer.scala 462:126]
node _T_4166 = mux(_T_4163, _T_4164, _T_4165) @[lsu_bus_buffer.scala 462:73]
node _T_4167 = mux(buf_error_en[3], _T_4162, _T_4166) @[lsu_bus_buffer.scala 462:30]
buf_data_in[3] <= _T_4167 @[lsu_bus_buffer.scala 462:24]
LSU with Bundling
2020-12-10 12:50:49 +08:00
skip @[Conditional.scala 39:67]
else : @[Conditional.scala 39:67]
node _T_4168 = eq(UInt<3>("h03"), buf_state[3]) @[Conditional.scala 37:30]
when _T_4168 : @[Conditional.scala 39:67]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4169 = bits(buf_write, 3, 3) @[lsu_bus_buffer.scala 465:67]
node _T_4170 = and(UInt<1>("h01"), bus_rsp_write_error) @[lsu_bus_buffer.scala 465:94]
node _T_4171 = eq(_T_4170, UInt<1>("h00")) @[lsu_bus_buffer.scala 465:73]
node _T_4172 = and(_T_4169, _T_4171) @[lsu_bus_buffer.scala 465:71]
node _T_4173 = or(io.dec_tlu_force_halt, _T_4172) @[lsu_bus_buffer.scala 465:55]
node _T_4174 = bits(_T_4173, 0, 0) @[lsu_bus_buffer.scala 465:125]
node _T_4175 = eq(buf_samedw[3], UInt<1>("h00")) @[lsu_bus_buffer.scala 466:30]
node _T_4176 = and(buf_dual[3], _T_4175) @[lsu_bus_buffer.scala 466:28]
node _T_4177 = bits(buf_write, 3, 3) @[lsu_bus_buffer.scala 466:57]
node _T_4178 = eq(_T_4177, UInt<1>("h00")) @[lsu_bus_buffer.scala 466:47]
node _T_4179 = and(_T_4176, _T_4178) @[lsu_bus_buffer.scala 466:45]
node _T_4180 = neq(buf_state[buf_dualtag[3]], UInt<3>("h04")) @[lsu_bus_buffer.scala 466:90]
node _T_4181 = and(_T_4179, _T_4180) @[lsu_bus_buffer.scala 466:61]
node _T_4182 = bits(buf_ldfwd, 3, 3) @[lsu_bus_buffer.scala 467:27]
node _T_4183 = or(_T_4182, any_done_wait_state) @[lsu_bus_buffer.scala 467:31]
node _T_4184 = eq(buf_samedw[3], UInt<1>("h00")) @[lsu_bus_buffer.scala 467:70]
node _T_4185 = and(buf_dual[3], _T_4184) @[lsu_bus_buffer.scala 467:68]
node _T_4186 = bits(buf_write, 3, 3) @[lsu_bus_buffer.scala 467:97]
node _T_4187 = eq(_T_4186, UInt<1>("h00")) @[lsu_bus_buffer.scala 467:87]
node _T_4188 = and(_T_4185, _T_4187) @[lsu_bus_buffer.scala 467:85]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_4189 = eq(buf_dualtag[3], UInt<1>("h00")) @[lsu_bus_buffer.scala 57:118]
node _T_4190 = bits(buf_ldfwd, 0, 0) @[lsu_bus_buffer.scala 57:129]
node _T_4191 = eq(buf_dualtag[3], UInt<1>("h01")) @[lsu_bus_buffer.scala 57:118]
node _T_4192 = bits(buf_ldfwd, 1, 1) @[lsu_bus_buffer.scala 57:129]
node _T_4193 = eq(buf_dualtag[3], UInt<2>("h02")) @[lsu_bus_buffer.scala 57:118]
node _T_4194 = bits(buf_ldfwd, 2, 2) @[lsu_bus_buffer.scala 57:129]
node _T_4195 = eq(buf_dualtag[3], UInt<2>("h03")) @[lsu_bus_buffer.scala 57:118]
node _T_4196 = bits(buf_ldfwd, 3, 3) @[lsu_bus_buffer.scala 57:129]
node _T_4197 = mux(_T_4189, _T_4190, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4198 = mux(_T_4191, _T_4192, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4199 = mux(_T_4193, _T_4194, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4200 = mux(_T_4195, _T_4196, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4201 = or(_T_4197, _T_4198) @[Mux.scala 27:72]
node _T_4202 = or(_T_4201, _T_4199) @[Mux.scala 27:72]
node _T_4203 = or(_T_4202, _T_4200) @[Mux.scala 27:72]
wire _T_4204 : UInt<1> @[Mux.scala 27:72]
_T_4204 <= _T_4203 @[Mux.scala 27:72]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4205 = and(_T_4188, _T_4204) @[lsu_bus_buffer.scala 467:101]
node _T_4206 = eq(buf_state[buf_dualtag[3]], UInt<3>("h04")) @[lsu_bus_buffer.scala 467:167]
node _T_4207 = and(_T_4205, _T_4206) @[lsu_bus_buffer.scala 467:138]
node _T_4208 = and(_T_4207, any_done_wait_state) @[lsu_bus_buffer.scala 467:187]
node _T_4209 = or(_T_4183, _T_4208) @[lsu_bus_buffer.scala 467:53]
node _T_4210 = mux(_T_4209, UInt<3>("h05"), UInt<3>("h06")) @[lsu_bus_buffer.scala 467:16]
node _T_4211 = mux(_T_4181, UInt<3>("h04"), _T_4210) @[lsu_bus_buffer.scala 466:14]
node _T_4212 = mux(_T_4174, UInt<3>("h00"), _T_4211) @[lsu_bus_buffer.scala 465:31]
buf_nxtstate[3] <= _T_4212 @[lsu_bus_buffer.scala 465:25]
node _T_4213 = eq(bus_rsp_write_tag, UInt<3>("h03")) @[lsu_bus_buffer.scala 468:73]
node _T_4214 = and(bus_rsp_write, _T_4213) @[lsu_bus_buffer.scala 468:52]
node _T_4215 = eq(bus_rsp_read_tag, UInt<3>("h03")) @[lsu_bus_buffer.scala 469:46]
node _T_4216 = bits(buf_ldfwd, 3, 3) @[lsu_bus_buffer.scala 470:23]
node _T_4217 = eq(bus_rsp_read_tag, buf_ldfwdtag[3]) @[lsu_bus_buffer.scala 470:47]
node _T_4218 = and(_T_4216, _T_4217) @[lsu_bus_buffer.scala 470:27]
node _T_4219 = or(_T_4215, _T_4218) @[lsu_bus_buffer.scala 469:77]
node _T_4220 = and(buf_dual[3], buf_dualhi[3]) @[lsu_bus_buffer.scala 471:26]
node _T_4221 = bits(buf_write, 3, 3) @[lsu_bus_buffer.scala 471:54]
node _T_4222 = not(_T_4221) @[lsu_bus_buffer.scala 471:44]
node _T_4223 = and(_T_4220, _T_4222) @[lsu_bus_buffer.scala 471:42]
node _T_4224 = and(_T_4223, buf_samedw[3]) @[lsu_bus_buffer.scala 471:58]
node _T_4225 = eq(bus_rsp_read_tag, buf_dualtag[3]) @[lsu_bus_buffer.scala 471:94]
node _T_4226 = and(_T_4224, _T_4225) @[lsu_bus_buffer.scala 471:74]
node _T_4227 = or(_T_4219, _T_4226) @[lsu_bus_buffer.scala 470:71]
node _T_4228 = and(bus_rsp_read, _T_4227) @[lsu_bus_buffer.scala 469:25]
node _T_4229 = or(_T_4214, _T_4228) @[lsu_bus_buffer.scala 468:105]
buf_resp_state_bus_en[3] <= _T_4229 @[lsu_bus_buffer.scala 468:34]
buf_state_bus_en[3] <= buf_resp_state_bus_en[3] @[lsu_bus_buffer.scala 472:29]
node _T_4230 = and(buf_state_bus_en[3], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 473:49]
node _T_4231 = or(_T_4230, io.dec_tlu_force_halt) @[lsu_bus_buffer.scala 473:70]
buf_state_en[3] <= _T_4231 @[lsu_bus_buffer.scala 473:25]
node _T_4232 = and(buf_state_bus_en[3], bus_rsp_read) @[lsu_bus_buffer.scala 474:47]
node _T_4233 = and(_T_4232, io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 474:62]
buf_data_en[3] <= _T_4233 @[lsu_bus_buffer.scala 474:24]
node _T_4234 = and(buf_state_bus_en[3], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 475:48]
node _T_4235 = eq(bus_rsp_read_tag, UInt<3>("h03")) @[lsu_bus_buffer.scala 475:111]
node _T_4236 = and(bus_rsp_read_error, _T_4235) @[lsu_bus_buffer.scala 475:91]
node _T_4237 = bits(buf_ldfwd, 3, 3) @[lsu_bus_buffer.scala 476:42]
node _T_4238 = and(bus_rsp_read_error, _T_4237) @[lsu_bus_buffer.scala 476:31]
node _T_4239 = eq(bus_rsp_read_tag, buf_ldfwdtag[3]) @[lsu_bus_buffer.scala 476:66]
node _T_4240 = and(_T_4238, _T_4239) @[lsu_bus_buffer.scala 476:46]
node _T_4241 = or(_T_4236, _T_4240) @[lsu_bus_buffer.scala 475:143]
node _T_4242 = and(bus_rsp_write_error, UInt<1>("h01")) @[lsu_bus_buffer.scala 477:32]
node _T_4243 = eq(bus_rsp_write_tag, UInt<3>("h03")) @[lsu_bus_buffer.scala 477:74]
node _T_4244 = and(_T_4242, _T_4243) @[lsu_bus_buffer.scala 477:53]
node _T_4245 = or(_T_4241, _T_4244) @[lsu_bus_buffer.scala 476:88]
node _T_4246 = and(_T_4234, _T_4245) @[lsu_bus_buffer.scala 475:68]
buf_error_en[3] <= _T_4246 @[lsu_bus_buffer.scala 475:25]
node _T_4247 = eq(buf_error_en[3], UInt<1>("h00")) @[lsu_bus_buffer.scala 478:50]
node _T_4248 = and(buf_state_en[3], _T_4247) @[lsu_bus_buffer.scala 478:48]
node _T_4249 = bits(buf_addr[3], 2, 2) @[lsu_bus_buffer.scala 478:84]
node _T_4250 = bits(bus_rsp_rdata, 63, 32) @[lsu_bus_buffer.scala 478:102]
node _T_4251 = bits(bus_rsp_rdata, 31, 0) @[lsu_bus_buffer.scala 478:125]
node _T_4252 = mux(_T_4249, _T_4250, _T_4251) @[lsu_bus_buffer.scala 478:72]
node _T_4253 = bits(bus_rsp_rdata, 31, 0) @[lsu_bus_buffer.scala 478:148]
node _T_4254 = mux(_T_4248, _T_4252, _T_4253) @[lsu_bus_buffer.scala 478:30]
buf_data_in[3] <= _T_4254 @[lsu_bus_buffer.scala 478:24]
LSU with Bundling
2020-12-10 12:50:49 +08:00
skip @[Conditional.scala 39:67]
else : @[Conditional.scala 39:67]
node _T_4255 = eq(UInt<3>("h04"), buf_state[3]) @[Conditional.scala 37:30]
when _T_4255 : @[Conditional.scala 39:67]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4256 = bits(io.dec_tlu_force_halt, 0, 0) @[lsu_bus_buffer.scala 481:60]
node _T_4257 = bits(buf_ldfwd, 3, 3) @[lsu_bus_buffer.scala 481:86]
node _T_4258 = dshr(buf_ldfwd, buf_dualtag[3]) @[lsu_bus_buffer.scala 481:101]
node _T_4259 = bits(_T_4258, 0, 0) @[lsu_bus_buffer.scala 481:101]
node _T_4260 = or(_T_4257, _T_4259) @[lsu_bus_buffer.scala 481:90]
node _T_4261 = or(_T_4260, any_done_wait_state) @[lsu_bus_buffer.scala 481:118]
node _T_4262 = mux(_T_4261, UInt<3>("h05"), UInt<3>("h06")) @[lsu_bus_buffer.scala 481:75]
node _T_4263 = mux(_T_4256, UInt<3>("h00"), _T_4262) @[lsu_bus_buffer.scala 481:31]
buf_nxtstate[3] <= _T_4263 @[lsu_bus_buffer.scala 481:25]
node _T_4264 = eq(bus_rsp_read_tag, buf_dualtag[3]) @[lsu_bus_buffer.scala 482:66]
node _T_4265 = dshr(buf_ldfwd, buf_dualtag[3]) @[lsu_bus_buffer.scala 483:21]
node _T_4266 = bits(_T_4265, 0, 0) @[lsu_bus_buffer.scala 483:21]
node _T_4267 = eq(bus_rsp_read_tag, buf_ldfwdtag[buf_dualtag[3]]) @[lsu_bus_buffer.scala 483:58]
node _T_4268 = and(_T_4266, _T_4267) @[lsu_bus_buffer.scala 483:38]
node _T_4269 = or(_T_4264, _T_4268) @[lsu_bus_buffer.scala 482:95]
node _T_4270 = and(bus_rsp_read, _T_4269) @[lsu_bus_buffer.scala 482:45]
buf_state_bus_en[3] <= _T_4270 @[lsu_bus_buffer.scala 482:29]
node _T_4271 = and(buf_state_bus_en[3], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 484:49]
node _T_4272 = or(_T_4271, io.dec_tlu_force_halt) @[lsu_bus_buffer.scala 484:70]
buf_state_en[3] <= _T_4272 @[lsu_bus_buffer.scala 484:25]
LSU with Bundling
2020-12-10 12:50:49 +08:00
skip @[Conditional.scala 39:67]
else : @[Conditional.scala 39:67]
node _T_4273 = eq(UInt<3>("h05"), buf_state[3]) @[Conditional.scala 37:30]
when _T_4273 : @[Conditional.scala 39:67]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4274 = bits(io.dec_tlu_force_halt, 0, 0) @[lsu_bus_buffer.scala 487:60]
node _T_4275 = mux(_T_4274, UInt<3>("h00"), UInt<3>("h06")) @[lsu_bus_buffer.scala 487:31]
buf_nxtstate[3] <= _T_4275 @[lsu_bus_buffer.scala 487:25]
node _T_4276 = eq(RspPtr, UInt<2>("h03")) @[lsu_bus_buffer.scala 488:37]
node _T_4277 = eq(buf_dualtag[3], RspPtr) @[lsu_bus_buffer.scala 488:98]
node _T_4278 = and(buf_dual[3], _T_4277) @[lsu_bus_buffer.scala 488:80]
node _T_4279 = or(_T_4276, _T_4278) @[lsu_bus_buffer.scala 488:65]
node _T_4280 = or(_T_4279, io.dec_tlu_force_halt) @[lsu_bus_buffer.scala 488:112]
buf_state_en[3] <= _T_4280 @[lsu_bus_buffer.scala 488:25]
LSU with Bundling
2020-12-10 12:50:49 +08:00
skip @[Conditional.scala 39:67]
else : @[Conditional.scala 39:67]
node _T_4281 = eq(UInt<3>("h06"), buf_state[3]) @[Conditional.scala 37:30]
when _T_4281 : @[Conditional.scala 39:67]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_nxtstate[3] <= UInt<3>("h00") @[lsu_bus_buffer.scala 491:25]
buf_rst[3] <= UInt<1>("h01") @[lsu_bus_buffer.scala 492:20]
buf_state_en[3] <= UInt<1>("h01") @[lsu_bus_buffer.scala 493:25]
buf_ldfwd_in[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 494:25]
buf_ldfwd_en[3] <= buf_state_en[3] @[lsu_bus_buffer.scala 495:25]
LSU with Bundling
2020-12-10 12:50:49 +08:00
skip @[Conditional.scala 39:67]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4282 = bits(buf_state_en[3], 0, 0) @[lsu_bus_buffer.scala 498:108]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_4283 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_4282 : @[Reg.scala 28:19]
_T_4283 <= buf_nxtstate[3] @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_state[3] <= _T_4283 @[lsu_bus_buffer.scala 498:18]
reg _T_4284 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_buffer.scala 499:60]
_T_4284 <= buf_age_in_3 @[lsu_bus_buffer.scala 499:60]
buf_ageQ[3] <= _T_4284 @[lsu_bus_buffer.scala 499:17]
reg _T_4285 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_buffer.scala 500:63]
_T_4285 <= buf_rspage_in[3] @[lsu_bus_buffer.scala 500:63]
buf_rspageQ[3] <= _T_4285 @[lsu_bus_buffer.scala 500:20]
node _T_4286 = bits(buf_wr_en[3], 0, 0) @[lsu_bus_buffer.scala 501:109]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_4287 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_4286 : @[Reg.scala 28:19]
_T_4287 <= buf_dualtag_in[3] @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_dualtag[3] <= _T_4287 @[lsu_bus_buffer.scala 501:20]
node _T_4288 = bits(buf_dual_in, 3, 3) @[lsu_bus_buffer.scala 502:74]
node _T_4289 = bits(buf_wr_en[3], 0, 0) @[lsu_bus_buffer.scala 502:107]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_4290 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_4289 : @[Reg.scala 28:19]
_T_4290 <= _T_4288 @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_dual[3] <= _T_4290 @[lsu_bus_buffer.scala 502:17]
node _T_4291 = bits(buf_samedw_in, 3, 3) @[lsu_bus_buffer.scala 503:78]
node _T_4292 = bits(buf_wr_en[3], 0, 0) @[lsu_bus_buffer.scala 503:111]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_4293 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_4292 : @[Reg.scala 28:19]
_T_4293 <= _T_4291 @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_samedw[3] <= _T_4293 @[lsu_bus_buffer.scala 503:19]
node _T_4294 = bits(buf_nomerge_in, 3, 3) @[lsu_bus_buffer.scala 504:80]
node _T_4295 = bits(buf_wr_en[3], 0, 0) @[lsu_bus_buffer.scala 504:113]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_4296 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_4295 : @[Reg.scala 28:19]
_T_4296 <= _T_4294 @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_nomerge[3] <= _T_4296 @[lsu_bus_buffer.scala 504:20]
node _T_4297 = bits(buf_dualhi_in, 3, 3) @[lsu_bus_buffer.scala 505:78]
node _T_4298 = bits(buf_wr_en[3], 0, 0) @[lsu_bus_buffer.scala 505:111]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_4299 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_4298 : @[Reg.scala 28:19]
_T_4299 <= _T_4297 @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_dualhi[3] <= _T_4299 @[lsu_bus_buffer.scala 505:19]
node _T_4300 = bits(buf_ldfwd_en[0], 0, 0) @[lsu_bus_buffer.scala 508:131]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_4301 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_4300 : @[Reg.scala 28:19]
_T_4301 <= buf_ldfwd_in[0] @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4302 = bits(buf_ldfwd_en[1], 0, 0) @[lsu_bus_buffer.scala 508:131]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_4303 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_4302 : @[Reg.scala 28:19]
_T_4303 <= buf_ldfwd_in[1] @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4304 = bits(buf_ldfwd_en[2], 0, 0) @[lsu_bus_buffer.scala 508:131]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_4305 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_4304 : @[Reg.scala 28:19]
_T_4305 <= buf_ldfwd_in[2] @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4306 = bits(buf_ldfwd_en[3], 0, 0) @[lsu_bus_buffer.scala 508:131]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_4307 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_4306 : @[Reg.scala 28:19]
_T_4307 <= buf_ldfwd_in[3] @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
node _T_4308 = cat(_T_4307, _T_4305) @[Cat.scala 29:58]
node _T_4309 = cat(_T_4308, _T_4303) @[Cat.scala 29:58]
node _T_4310 = cat(_T_4309, _T_4301) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_ldfwd <= _T_4310 @[lsu_bus_buffer.scala 508:13]
node _T_4311 = bits(buf_ldfwd_en[0], 0, 0) @[lsu_bus_buffer.scala 509:132]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_4312 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_4311 : @[Reg.scala 28:19]
_T_4312 <= buf_ldfwdtag_in[0] @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4313 = bits(buf_ldfwd_en[1], 0, 0) @[lsu_bus_buffer.scala 509:132]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_4314 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_4313 : @[Reg.scala 28:19]
_T_4314 <= buf_ldfwdtag_in[1] @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4315 = bits(buf_ldfwd_en[2], 0, 0) @[lsu_bus_buffer.scala 509:132]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_4316 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_4315 : @[Reg.scala 28:19]
_T_4316 <= buf_ldfwdtag_in[2] @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4317 = bits(buf_ldfwd_en[3], 0, 0) @[lsu_bus_buffer.scala 509:132]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_4318 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_4317 : @[Reg.scala 28:19]
_T_4318 <= buf_ldfwdtag_in[3] @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_ldfwdtag[0] <= _T_4312 @[lsu_bus_buffer.scala 509:16]
buf_ldfwdtag[1] <= _T_4314 @[lsu_bus_buffer.scala 509:16]
buf_ldfwdtag[2] <= _T_4316 @[lsu_bus_buffer.scala 509:16]
buf_ldfwdtag[3] <= _T_4318 @[lsu_bus_buffer.scala 509:16]
node _T_4319 = bits(buf_sideeffect_in, 0, 0) @[lsu_bus_buffer.scala 510:105]
node _T_4320 = bits(buf_wr_en[0], 0, 0) @[lsu_bus_buffer.scala 510:138]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_4321 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_4320 : @[Reg.scala 28:19]
_T_4321 <= _T_4319 @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4322 = bits(buf_sideeffect_in, 1, 1) @[lsu_bus_buffer.scala 510:105]
node _T_4323 = bits(buf_wr_en[1], 0, 0) @[lsu_bus_buffer.scala 510:138]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_4324 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_4323 : @[Reg.scala 28:19]
_T_4324 <= _T_4322 @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4325 = bits(buf_sideeffect_in, 2, 2) @[lsu_bus_buffer.scala 510:105]
node _T_4326 = bits(buf_wr_en[2], 0, 0) @[lsu_bus_buffer.scala 510:138]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_4327 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_4326 : @[Reg.scala 28:19]
_T_4327 <= _T_4325 @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4328 = bits(buf_sideeffect_in, 3, 3) @[lsu_bus_buffer.scala 510:105]
node _T_4329 = bits(buf_wr_en[3], 0, 0) @[lsu_bus_buffer.scala 510:138]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_4330 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_4329 : @[Reg.scala 28:19]
_T_4330 <= _T_4328 @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
node _T_4331 = cat(_T_4330, _T_4327) @[Cat.scala 29:58]
node _T_4332 = cat(_T_4331, _T_4324) @[Cat.scala 29:58]
node _T_4333 = cat(_T_4332, _T_4321) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_sideeffect <= _T_4333 @[lsu_bus_buffer.scala 510:18]
node _T_4334 = bits(buf_unsign_in, 0, 0) @[lsu_bus_buffer.scala 511:97]
node _T_4335 = bits(buf_wr_en[0], 0, 0) @[lsu_bus_buffer.scala 511:130]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_4336 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_4335 : @[Reg.scala 28:19]
_T_4336 <= _T_4334 @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4337 = bits(buf_unsign_in, 1, 1) @[lsu_bus_buffer.scala 511:97]
node _T_4338 = bits(buf_wr_en[1], 0, 0) @[lsu_bus_buffer.scala 511:130]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_4339 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_4338 : @[Reg.scala 28:19]
_T_4339 <= _T_4337 @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4340 = bits(buf_unsign_in, 2, 2) @[lsu_bus_buffer.scala 511:97]
node _T_4341 = bits(buf_wr_en[2], 0, 0) @[lsu_bus_buffer.scala 511:130]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_4342 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_4341 : @[Reg.scala 28:19]
_T_4342 <= _T_4340 @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4343 = bits(buf_unsign_in, 3, 3) @[lsu_bus_buffer.scala 511:97]
node _T_4344 = bits(buf_wr_en[3], 0, 0) @[lsu_bus_buffer.scala 511:130]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_4345 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_4344 : @[Reg.scala 28:19]
_T_4345 <= _T_4343 @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
node _T_4346 = cat(_T_4345, _T_4342) @[Cat.scala 29:58]
node _T_4347 = cat(_T_4346, _T_4339) @[Cat.scala 29:58]
node _T_4348 = cat(_T_4347, _T_4336) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_unsign <= _T_4348 @[lsu_bus_buffer.scala 511:14]
node _T_4349 = bits(buf_write_in, 0, 0) @[lsu_bus_buffer.scala 512:95]
node _T_4350 = bits(buf_wr_en[0], 0, 0) @[lsu_bus_buffer.scala 512:128]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_4351 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_4350 : @[Reg.scala 28:19]
_T_4351 <= _T_4349 @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4352 = bits(buf_write_in, 1, 1) @[lsu_bus_buffer.scala 512:95]
node _T_4353 = bits(buf_wr_en[1], 0, 0) @[lsu_bus_buffer.scala 512:128]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_4354 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_4353 : @[Reg.scala 28:19]
_T_4354 <= _T_4352 @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4355 = bits(buf_write_in, 2, 2) @[lsu_bus_buffer.scala 512:95]
node _T_4356 = bits(buf_wr_en[2], 0, 0) @[lsu_bus_buffer.scala 512:128]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_4357 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_4356 : @[Reg.scala 28:19]
_T_4357 <= _T_4355 @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4358 = bits(buf_write_in, 3, 3) @[lsu_bus_buffer.scala 512:95]
node _T_4359 = bits(buf_wr_en[3], 0, 0) @[lsu_bus_buffer.scala 512:128]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_4360 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_4359 : @[Reg.scala 28:19]
_T_4360 <= _T_4358 @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
node _T_4361 = cat(_T_4360, _T_4357) @[Cat.scala 29:58]
node _T_4362 = cat(_T_4361, _T_4354) @[Cat.scala 29:58]
node _T_4363 = cat(_T_4362, _T_4351) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_write <= _T_4363 @[lsu_bus_buffer.scala 512:13]
node _T_4364 = bits(buf_wr_en[0], 0, 0) @[lsu_bus_buffer.scala 513:117]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_4365 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_4364 : @[Reg.scala 28:19]
_T_4365 <= buf_sz_in[0] @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4366 = bits(buf_wr_en[1], 0, 0) @[lsu_bus_buffer.scala 513:117]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_4367 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_4366 : @[Reg.scala 28:19]
_T_4367 <= buf_sz_in[1] @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4368 = bits(buf_wr_en[2], 0, 0) @[lsu_bus_buffer.scala 513:117]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_4369 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_4368 : @[Reg.scala 28:19]
_T_4369 <= buf_sz_in[2] @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4370 = bits(buf_wr_en[3], 0, 0) @[lsu_bus_buffer.scala 513:117]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_4371 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_4370 : @[Reg.scala 28:19]
_T_4371 <= buf_sz_in[3] @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_sz[0] <= _T_4365 @[lsu_bus_buffer.scala 513:10]
buf_sz[1] <= _T_4367 @[lsu_bus_buffer.scala 513:10]
buf_sz[2] <= _T_4369 @[lsu_bus_buffer.scala 513:10]
buf_sz[3] <= _T_4371 @[lsu_bus_buffer.scala 513:10]
node _T_4372 = bits(buf_wr_en[0], 0, 0) @[lsu_bus_buffer.scala 514:80]
LSU with Bundling
2020-12-10 12:50:49 +08:00
inst rvclkhdr_4 of rvclkhdr_4 @[el2_lib.scala 508:23]
rvclkhdr_4.clock <= clock
rvclkhdr_4.reset <= reset
rvclkhdr_4.io.clk <= clock @[el2_lib.scala 510:18]
rvclkhdr_4.io.en <= _T_4372 @[el2_lib.scala 511:17]
rvclkhdr_4.io.scan_mode <= io.scan_mode @[el2_lib.scala 512:24]
reg _T_4373 : UInt, rvclkhdr_4.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 514:16]
_T_4373 <= buf_addr_in[0] @[el2_lib.scala 514:16]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4374 = bits(buf_wr_en[1], 0, 0) @[lsu_bus_buffer.scala 514:80]
LSU with Bundling
2020-12-10 12:50:49 +08:00
inst rvclkhdr_5 of rvclkhdr_5 @[el2_lib.scala 508:23]
rvclkhdr_5.clock <= clock
rvclkhdr_5.reset <= reset
rvclkhdr_5.io.clk <= clock @[el2_lib.scala 510:18]
rvclkhdr_5.io.en <= _T_4374 @[el2_lib.scala 511:17]
rvclkhdr_5.io.scan_mode <= io.scan_mode @[el2_lib.scala 512:24]
reg _T_4375 : UInt, rvclkhdr_5.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 514:16]
_T_4375 <= buf_addr_in[1] @[el2_lib.scala 514:16]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4376 = bits(buf_wr_en[2], 0, 0) @[lsu_bus_buffer.scala 514:80]
LSU with Bundling
2020-12-10 12:50:49 +08:00
inst rvclkhdr_6 of rvclkhdr_6 @[el2_lib.scala 508:23]
rvclkhdr_6.clock <= clock
rvclkhdr_6.reset <= reset
rvclkhdr_6.io.clk <= clock @[el2_lib.scala 510:18]
rvclkhdr_6.io.en <= _T_4376 @[el2_lib.scala 511:17]
rvclkhdr_6.io.scan_mode <= io.scan_mode @[el2_lib.scala 512:24]
reg _T_4377 : UInt, rvclkhdr_6.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 514:16]
_T_4377 <= buf_addr_in[2] @[el2_lib.scala 514:16]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4378 = bits(buf_wr_en[3], 0, 0) @[lsu_bus_buffer.scala 514:80]
LSU with Bundling
2020-12-10 12:50:49 +08:00
inst rvclkhdr_7 of rvclkhdr_7 @[el2_lib.scala 508:23]
rvclkhdr_7.clock <= clock
rvclkhdr_7.reset <= reset
rvclkhdr_7.io.clk <= clock @[el2_lib.scala 510:18]
rvclkhdr_7.io.en <= _T_4378 @[el2_lib.scala 511:17]
rvclkhdr_7.io.scan_mode <= io.scan_mode @[el2_lib.scala 512:24]
reg _T_4379 : UInt, rvclkhdr_7.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 514:16]
_T_4379 <= buf_addr_in[3] @[el2_lib.scala 514:16]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_addr[0] <= _T_4373 @[lsu_bus_buffer.scala 514:12]
buf_addr[1] <= _T_4375 @[lsu_bus_buffer.scala 514:12]
buf_addr[2] <= _T_4377 @[lsu_bus_buffer.scala 514:12]
buf_addr[3] <= _T_4379 @[lsu_bus_buffer.scala 514:12]
node _T_4380 = bits(buf_wr_en[0], 0, 0) @[lsu_bus_buffer.scala 515:125]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_4381 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_4380 : @[Reg.scala 28:19]
_T_4381 <= buf_byteen_in[0] @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4382 = bits(buf_wr_en[1], 0, 0) @[lsu_bus_buffer.scala 515:125]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_4383 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_4382 : @[Reg.scala 28:19]
_T_4383 <= buf_byteen_in[1] @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4384 = bits(buf_wr_en[2], 0, 0) @[lsu_bus_buffer.scala 515:125]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_4385 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_4384 : @[Reg.scala 28:19]
_T_4385 <= buf_byteen_in[2] @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4386 = bits(buf_wr_en[3], 0, 0) @[lsu_bus_buffer.scala 515:125]
LSU with Bundling
2020-12-10 12:50:49 +08:00
reg _T_4387 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_4386 : @[Reg.scala 28:19]
_T_4387 <= buf_byteen_in[3] @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_byteen[0] <= _T_4381 @[lsu_bus_buffer.scala 515:14]
buf_byteen[1] <= _T_4383 @[lsu_bus_buffer.scala 515:14]
buf_byteen[2] <= _T_4385 @[lsu_bus_buffer.scala 515:14]
buf_byteen[3] <= _T_4387 @[lsu_bus_buffer.scala 515:14]
LSU with Bundling
2020-12-10 12:50:49 +08:00
inst rvclkhdr_8 of rvclkhdr_8 @[el2_lib.scala 508:23]
rvclkhdr_8.clock <= clock
rvclkhdr_8.reset <= reset
rvclkhdr_8.io.clk <= clock @[el2_lib.scala 510:18]
rvclkhdr_8.io.en <= buf_data_en[0] @[el2_lib.scala 511:17]
rvclkhdr_8.io.scan_mode <= io.scan_mode @[el2_lib.scala 512:24]
reg _T_4388 : UInt, rvclkhdr_8.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 514:16]
_T_4388 <= buf_data_in[0] @[el2_lib.scala 514:16]
inst rvclkhdr_9 of rvclkhdr_9 @[el2_lib.scala 508:23]
rvclkhdr_9.clock <= clock
rvclkhdr_9.reset <= reset
rvclkhdr_9.io.clk <= clock @[el2_lib.scala 510:18]
rvclkhdr_9.io.en <= buf_data_en[1] @[el2_lib.scala 511:17]
rvclkhdr_9.io.scan_mode <= io.scan_mode @[el2_lib.scala 512:24]
reg _T_4389 : UInt, rvclkhdr_9.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 514:16]
_T_4389 <= buf_data_in[1] @[el2_lib.scala 514:16]
inst rvclkhdr_10 of rvclkhdr_10 @[el2_lib.scala 508:23]
rvclkhdr_10.clock <= clock
rvclkhdr_10.reset <= reset
rvclkhdr_10.io.clk <= clock @[el2_lib.scala 510:18]
rvclkhdr_10.io.en <= buf_data_en[2] @[el2_lib.scala 511:17]
rvclkhdr_10.io.scan_mode <= io.scan_mode @[el2_lib.scala 512:24]
reg _T_4390 : UInt, rvclkhdr_10.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 514:16]
_T_4390 <= buf_data_in[2] @[el2_lib.scala 514:16]
inst rvclkhdr_11 of rvclkhdr_11 @[el2_lib.scala 508:23]
rvclkhdr_11.clock <= clock
rvclkhdr_11.reset <= reset
rvclkhdr_11.io.clk <= clock @[el2_lib.scala 510:18]
rvclkhdr_11.io.en <= buf_data_en[3] @[el2_lib.scala 511:17]
rvclkhdr_11.io.scan_mode <= io.scan_mode @[el2_lib.scala 512:24]
reg _T_4391 : UInt, rvclkhdr_11.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 514:16]
_T_4391 <= buf_data_in[3] @[el2_lib.scala 514:16]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_data[0] <= _T_4388 @[lsu_bus_buffer.scala 516:12]
buf_data[1] <= _T_4389 @[lsu_bus_buffer.scala 516:12]
buf_data[2] <= _T_4390 @[lsu_bus_buffer.scala 516:12]
buf_data[3] <= _T_4391 @[lsu_bus_buffer.scala 516:12]
node _T_4392 = bits(buf_error, 0, 0) @[lsu_bus_buffer.scala 517:119]
node _T_4393 = mux(buf_error_en[0], UInt<1>("h01"), _T_4392) @[lsu_bus_buffer.scala 517:84]
node _T_4394 = eq(buf_rst[0], UInt<1>("h00")) @[lsu_bus_buffer.scala 517:126]
node _T_4395 = and(_T_4393, _T_4394) @[lsu_bus_buffer.scala 517:124]
reg _T_4396 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_buffer.scala 517:80]
_T_4396 <= _T_4395 @[lsu_bus_buffer.scala 517:80]
node _T_4397 = bits(buf_error, 1, 1) @[lsu_bus_buffer.scala 517:119]
node _T_4398 = mux(buf_error_en[1], UInt<1>("h01"), _T_4397) @[lsu_bus_buffer.scala 517:84]
node _T_4399 = eq(buf_rst[1], UInt<1>("h00")) @[lsu_bus_buffer.scala 517:126]
node _T_4400 = and(_T_4398, _T_4399) @[lsu_bus_buffer.scala 517:124]
reg _T_4401 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_buffer.scala 517:80]
_T_4401 <= _T_4400 @[lsu_bus_buffer.scala 517:80]
node _T_4402 = bits(buf_error, 2, 2) @[lsu_bus_buffer.scala 517:119]
node _T_4403 = mux(buf_error_en[2], UInt<1>("h01"), _T_4402) @[lsu_bus_buffer.scala 517:84]
node _T_4404 = eq(buf_rst[2], UInt<1>("h00")) @[lsu_bus_buffer.scala 517:126]
node _T_4405 = and(_T_4403, _T_4404) @[lsu_bus_buffer.scala 517:124]
reg _T_4406 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_buffer.scala 517:80]
_T_4406 <= _T_4405 @[lsu_bus_buffer.scala 517:80]
node _T_4407 = bits(buf_error, 3, 3) @[lsu_bus_buffer.scala 517:119]
node _T_4408 = mux(buf_error_en[3], UInt<1>("h01"), _T_4407) @[lsu_bus_buffer.scala 517:84]
node _T_4409 = eq(buf_rst[3], UInt<1>("h00")) @[lsu_bus_buffer.scala 517:126]
node _T_4410 = and(_T_4408, _T_4409) @[lsu_bus_buffer.scala 517:124]
reg _T_4411 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_buffer.scala 517:80]
_T_4411 <= _T_4410 @[lsu_bus_buffer.scala 517:80]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_4412 = cat(_T_4411, _T_4406) @[Cat.scala 29:58]
node _T_4413 = cat(_T_4412, _T_4401) @[Cat.scala 29:58]
node _T_4414 = cat(_T_4413, _T_4396) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
buf_error <= _T_4414 @[lsu_bus_buffer.scala 517:13]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_4415 = cat(io.lsu_busreq_m, UInt<1>("h00")) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4416 = mux(io.ldst_dual_m, _T_4415, io.lsu_busreq_m) @[lsu_bus_buffer.scala 520:28]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_4417 = cat(io.lsu_busreq_r, UInt<1>("h00")) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4418 = mux(io.ldst_dual_r, _T_4417, io.lsu_busreq_r) @[lsu_bus_buffer.scala 520:94]
node _T_4419 = add(_T_4416, _T_4418) @[lsu_bus_buffer.scala 520:88]
node _T_4420 = add(_T_4419, ibuf_valid) @[lsu_bus_buffer.scala 520:154]
node _T_4421 = neq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 520:190]
node _T_4422 = neq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 520:190]
node _T_4423 = neq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 520:190]
node _T_4424 = neq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 520:190]
node _T_4425 = add(_T_4421, _T_4422) @[lsu_bus_buffer.scala 520:217]
node _T_4426 = add(_T_4425, _T_4423) @[lsu_bus_buffer.scala 520:217]
node _T_4427 = add(_T_4426, _T_4424) @[lsu_bus_buffer.scala 520:217]
node _T_4428 = add(_T_4420, _T_4427) @[lsu_bus_buffer.scala 520:169]
node buf_numvld_any = tail(_T_4428, 1) @[lsu_bus_buffer.scala 520:169]
node _T_4429 = bits(buf_write, 0, 0) @[lsu_bus_buffer.scala 521:60]
node _T_4430 = eq(buf_state[0], UInt<3>("h02")) @[lsu_bus_buffer.scala 521:79]
node _T_4431 = and(_T_4429, _T_4430) @[lsu_bus_buffer.scala 521:64]
node _T_4432 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[lsu_bus_buffer.scala 521:91]
node _T_4433 = and(_T_4431, _T_4432) @[lsu_bus_buffer.scala 521:89]
node _T_4434 = bits(buf_write, 1, 1) @[lsu_bus_buffer.scala 521:60]
node _T_4435 = eq(buf_state[1], UInt<3>("h02")) @[lsu_bus_buffer.scala 521:79]
node _T_4436 = and(_T_4434, _T_4435) @[lsu_bus_buffer.scala 521:64]
node _T_4437 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[lsu_bus_buffer.scala 521:91]
node _T_4438 = and(_T_4436, _T_4437) @[lsu_bus_buffer.scala 521:89]
node _T_4439 = bits(buf_write, 2, 2) @[lsu_bus_buffer.scala 521:60]
node _T_4440 = eq(buf_state[2], UInt<3>("h02")) @[lsu_bus_buffer.scala 521:79]
node _T_4441 = and(_T_4439, _T_4440) @[lsu_bus_buffer.scala 521:64]
node _T_4442 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[lsu_bus_buffer.scala 521:91]
node _T_4443 = and(_T_4441, _T_4442) @[lsu_bus_buffer.scala 521:89]
node _T_4444 = bits(buf_write, 3, 3) @[lsu_bus_buffer.scala 521:60]
node _T_4445 = eq(buf_state[3], UInt<3>("h02")) @[lsu_bus_buffer.scala 521:79]
node _T_4446 = and(_T_4444, _T_4445) @[lsu_bus_buffer.scala 521:64]
node _T_4447 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[lsu_bus_buffer.scala 521:91]
node _T_4448 = and(_T_4446, _T_4447) @[lsu_bus_buffer.scala 521:89]
node _T_4449 = add(_T_4448, _T_4443) @[lsu_bus_buffer.scala 521:142]
node _T_4450 = add(_T_4449, _T_4438) @[lsu_bus_buffer.scala 521:142]
node _T_4451 = add(_T_4450, _T_4433) @[lsu_bus_buffer.scala 521:142]
buf_numvld_wrcmd_any <= _T_4451 @[lsu_bus_buffer.scala 521:24]
node _T_4452 = eq(buf_state[0], UInt<3>("h02")) @[lsu_bus_buffer.scala 522:63]
node _T_4453 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[lsu_bus_buffer.scala 522:75]
node _T_4454 = and(_T_4452, _T_4453) @[lsu_bus_buffer.scala 522:73]
node _T_4455 = eq(buf_state[1], UInt<3>("h02")) @[lsu_bus_buffer.scala 522:63]
node _T_4456 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[lsu_bus_buffer.scala 522:75]
node _T_4457 = and(_T_4455, _T_4456) @[lsu_bus_buffer.scala 522:73]
node _T_4458 = eq(buf_state[2], UInt<3>("h02")) @[lsu_bus_buffer.scala 522:63]
node _T_4459 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[lsu_bus_buffer.scala 522:75]
node _T_4460 = and(_T_4458, _T_4459) @[lsu_bus_buffer.scala 522:73]
node _T_4461 = eq(buf_state[3], UInt<3>("h02")) @[lsu_bus_buffer.scala 522:63]
node _T_4462 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[lsu_bus_buffer.scala 522:75]
node _T_4463 = and(_T_4461, _T_4462) @[lsu_bus_buffer.scala 522:73]
node _T_4464 = add(_T_4463, _T_4460) @[lsu_bus_buffer.scala 522:126]
node _T_4465 = add(_T_4464, _T_4457) @[lsu_bus_buffer.scala 522:126]
node _T_4466 = add(_T_4465, _T_4454) @[lsu_bus_buffer.scala 522:126]
buf_numvld_cmd_any <= _T_4466 @[lsu_bus_buffer.scala 522:22]
node _T_4467 = eq(buf_state[0], UInt<3>("h01")) @[lsu_bus_buffer.scala 523:63]
node _T_4468 = eq(buf_state[0], UInt<3>("h02")) @[lsu_bus_buffer.scala 523:90]
node _T_4469 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[lsu_bus_buffer.scala 523:102]
node _T_4470 = and(_T_4468, _T_4469) @[lsu_bus_buffer.scala 523:100]
node _T_4471 = or(_T_4467, _T_4470) @[lsu_bus_buffer.scala 523:74]
node _T_4472 = eq(buf_state[1], UInt<3>("h01")) @[lsu_bus_buffer.scala 523:63]
node _T_4473 = eq(buf_state[1], UInt<3>("h02")) @[lsu_bus_buffer.scala 523:90]
node _T_4474 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[lsu_bus_buffer.scala 523:102]
node _T_4475 = and(_T_4473, _T_4474) @[lsu_bus_buffer.scala 523:100]
node _T_4476 = or(_T_4472, _T_4475) @[lsu_bus_buffer.scala 523:74]
node _T_4477 = eq(buf_state[2], UInt<3>("h01")) @[lsu_bus_buffer.scala 523:63]
node _T_4478 = eq(buf_state[2], UInt<3>("h02")) @[lsu_bus_buffer.scala 523:90]
node _T_4479 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[lsu_bus_buffer.scala 523:102]
node _T_4480 = and(_T_4478, _T_4479) @[lsu_bus_buffer.scala 523:100]
node _T_4481 = or(_T_4477, _T_4480) @[lsu_bus_buffer.scala 523:74]
node _T_4482 = eq(buf_state[3], UInt<3>("h01")) @[lsu_bus_buffer.scala 523:63]
node _T_4483 = eq(buf_state[3], UInt<3>("h02")) @[lsu_bus_buffer.scala 523:90]
node _T_4484 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[lsu_bus_buffer.scala 523:102]
node _T_4485 = and(_T_4483, _T_4484) @[lsu_bus_buffer.scala 523:100]
node _T_4486 = or(_T_4482, _T_4485) @[lsu_bus_buffer.scala 523:74]
node _T_4487 = add(_T_4486, _T_4481) @[lsu_bus_buffer.scala 523:154]
node _T_4488 = add(_T_4487, _T_4476) @[lsu_bus_buffer.scala 523:154]
node _T_4489 = add(_T_4488, _T_4471) @[lsu_bus_buffer.scala 523:154]
buf_numvld_pend_any <= _T_4489 @[lsu_bus_buffer.scala 523:23]
node _T_4490 = eq(buf_state[0], UInt<3>("h05")) @[lsu_bus_buffer.scala 524:61]
node _T_4491 = eq(buf_state[1], UInt<3>("h05")) @[lsu_bus_buffer.scala 524:61]
node _T_4492 = eq(buf_state[2], UInt<3>("h05")) @[lsu_bus_buffer.scala 524:61]
node _T_4493 = eq(buf_state[3], UInt<3>("h05")) @[lsu_bus_buffer.scala 524:61]
node _T_4494 = or(_T_4493, _T_4492) @[lsu_bus_buffer.scala 524:93]
node _T_4495 = or(_T_4494, _T_4491) @[lsu_bus_buffer.scala 524:93]
node _T_4496 = or(_T_4495, _T_4490) @[lsu_bus_buffer.scala 524:93]
any_done_wait_state <= _T_4496 @[lsu_bus_buffer.scala 524:23]
node _T_4497 = orr(buf_numvld_pend_any) @[lsu_bus_buffer.scala 525:53]
io.lsu_bus_buffer_pend_any <= _T_4497 @[lsu_bus_buffer.scala 525:30]
node _T_4498 = and(io.ldst_dual_d, io.dec_lsu_valid_raw_d) @[lsu_bus_buffer.scala 526:52]
node _T_4499 = geq(buf_numvld_any, UInt<2>("h03")) @[lsu_bus_buffer.scala 526:92]
node _T_4500 = eq(buf_numvld_any, UInt<3>("h04")) @[lsu_bus_buffer.scala 526:121]
node _T_4501 = mux(_T_4498, _T_4499, _T_4500) @[lsu_bus_buffer.scala 526:36]
io.lsu_bus_buffer_full_any <= _T_4501 @[lsu_bus_buffer.scala 526:30]
node _T_4502 = orr(buf_state[0]) @[lsu_bus_buffer.scala 527:52]
node _T_4503 = orr(buf_state[1]) @[lsu_bus_buffer.scala 527:52]
node _T_4504 = orr(buf_state[2]) @[lsu_bus_buffer.scala 527:52]
node _T_4505 = orr(buf_state[3]) @[lsu_bus_buffer.scala 527:52]
node _T_4506 = or(_T_4502, _T_4503) @[lsu_bus_buffer.scala 527:65]
node _T_4507 = or(_T_4506, _T_4504) @[lsu_bus_buffer.scala 527:65]
node _T_4508 = or(_T_4507, _T_4505) @[lsu_bus_buffer.scala 527:65]
node _T_4509 = eq(_T_4508, UInt<1>("h00")) @[lsu_bus_buffer.scala 527:34]
node _T_4510 = eq(ibuf_valid, UInt<1>("h00")) @[lsu_bus_buffer.scala 527:72]
node _T_4511 = and(_T_4509, _T_4510) @[lsu_bus_buffer.scala 527:70]
node _T_4512 = eq(obuf_valid, UInt<1>("h00")) @[lsu_bus_buffer.scala 527:86]
node _T_4513 = and(_T_4511, _T_4512) @[lsu_bus_buffer.scala 527:84]
io.lsu_bus_buffer_empty_any <= _T_4513 @[lsu_bus_buffer.scala 527:31]
node _T_4514 = and(io.lsu_busreq_m, io.lsu_pkt_m.valid) @[lsu_bus_buffer.scala 529:64]
node _T_4515 = and(_T_4514, io.lsu_pkt_m.bits.load) @[lsu_bus_buffer.scala 529:85]
node _T_4516 = eq(io.flush_m_up, UInt<1>("h00")) @[lsu_bus_buffer.scala 529:112]
node _T_4517 = and(_T_4515, _T_4516) @[lsu_bus_buffer.scala 529:110]
node _T_4518 = eq(io.ld_full_hit_m, UInt<1>("h00")) @[lsu_bus_buffer.scala 529:129]
node _T_4519 = and(_T_4517, _T_4518) @[lsu_bus_buffer.scala 529:127]
io.dctl_busbuff.lsu_nonblock_load_valid_m <= _T_4519 @[lsu_bus_buffer.scala 529:45]
io.dctl_busbuff.lsu_nonblock_load_tag_m <= WrPtr0_m @[lsu_bus_buffer.scala 530:43]
LSU with Bundling
2020-12-10 12:50:49 +08:00
wire lsu_nonblock_load_valid_r : UInt<1>
lsu_nonblock_load_valid_r <= UInt<1>("h00")
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4520 = eq(io.lsu_commit_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 532:74]
node _T_4521 = and(lsu_nonblock_load_valid_r, _T_4520) @[lsu_bus_buffer.scala 532:72]
io.dctl_busbuff.lsu_nonblock_load_inv_r <= _T_4521 @[lsu_bus_buffer.scala 532:43]
io.dctl_busbuff.lsu_nonblock_load_inv_tag_r <= WrPtr0_r @[lsu_bus_buffer.scala 533:47]
node _T_4522 = eq(buf_state[0], UInt<3>("h06")) @[lsu_bus_buffer.scala 534:80]
node _T_4523 = bits(buf_write, 0, 0) @[lsu_bus_buffer.scala 534:127]
node _T_4524 = and(UInt<1>("h01"), _T_4523) @[lsu_bus_buffer.scala 534:116]
node _T_4525 = eq(_T_4524, UInt<1>("h00")) @[lsu_bus_buffer.scala 534:95]
node _T_4526 = eq(buf_state[1], UInt<3>("h06")) @[lsu_bus_buffer.scala 534:80]
node _T_4527 = bits(buf_write, 1, 1) @[lsu_bus_buffer.scala 534:127]
node _T_4528 = and(UInt<1>("h01"), _T_4527) @[lsu_bus_buffer.scala 534:116]
node _T_4529 = eq(_T_4528, UInt<1>("h00")) @[lsu_bus_buffer.scala 534:95]
node _T_4530 = eq(buf_state[2], UInt<3>("h06")) @[lsu_bus_buffer.scala 534:80]
node _T_4531 = bits(buf_write, 2, 2) @[lsu_bus_buffer.scala 534:127]
node _T_4532 = and(UInt<1>("h01"), _T_4531) @[lsu_bus_buffer.scala 534:116]
node _T_4533 = eq(_T_4532, UInt<1>("h00")) @[lsu_bus_buffer.scala 534:95]
node _T_4534 = eq(buf_state[3], UInt<3>("h06")) @[lsu_bus_buffer.scala 534:80]
node _T_4535 = bits(buf_write, 3, 3) @[lsu_bus_buffer.scala 534:127]
node _T_4536 = and(UInt<1>("h01"), _T_4535) @[lsu_bus_buffer.scala 534:116]
node _T_4537 = eq(_T_4536, UInt<1>("h00")) @[lsu_bus_buffer.scala 534:95]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_4538 = mux(_T_4522, _T_4525, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4539 = mux(_T_4526, _T_4529, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4540 = mux(_T_4530, _T_4533, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4541 = mux(_T_4534, _T_4537, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4542 = or(_T_4538, _T_4539) @[Mux.scala 27:72]
node _T_4543 = or(_T_4542, _T_4540) @[Mux.scala 27:72]
node _T_4544 = or(_T_4543, _T_4541) @[Mux.scala 27:72]
wire lsu_nonblock_load_data_ready : UInt<1> @[Mux.scala 27:72]
lsu_nonblock_load_data_ready <= _T_4544 @[Mux.scala 27:72]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4545 = eq(buf_state[0], UInt<3>("h06")) @[lsu_bus_buffer.scala 535:93]
node _T_4546 = bits(buf_error, 0, 0) @[lsu_bus_buffer.scala 535:117]
node _T_4547 = bits(buf_write, 0, 0) @[lsu_bus_buffer.scala 535:133]
node _T_4548 = eq(_T_4547, UInt<1>("h00")) @[lsu_bus_buffer.scala 535:123]
node _T_4549 = and(_T_4546, _T_4548) @[lsu_bus_buffer.scala 535:121]
node _T_4550 = eq(buf_state[1], UInt<3>("h06")) @[lsu_bus_buffer.scala 535:93]
node _T_4551 = bits(buf_error, 1, 1) @[lsu_bus_buffer.scala 535:117]
node _T_4552 = bits(buf_write, 1, 1) @[lsu_bus_buffer.scala 535:133]
node _T_4553 = eq(_T_4552, UInt<1>("h00")) @[lsu_bus_buffer.scala 535:123]
node _T_4554 = and(_T_4551, _T_4553) @[lsu_bus_buffer.scala 535:121]
node _T_4555 = eq(buf_state[2], UInt<3>("h06")) @[lsu_bus_buffer.scala 535:93]
node _T_4556 = bits(buf_error, 2, 2) @[lsu_bus_buffer.scala 535:117]
node _T_4557 = bits(buf_write, 2, 2) @[lsu_bus_buffer.scala 535:133]
node _T_4558 = eq(_T_4557, UInt<1>("h00")) @[lsu_bus_buffer.scala 535:123]
node _T_4559 = and(_T_4556, _T_4558) @[lsu_bus_buffer.scala 535:121]
node _T_4560 = eq(buf_state[3], UInt<3>("h06")) @[lsu_bus_buffer.scala 535:93]
node _T_4561 = bits(buf_error, 3, 3) @[lsu_bus_buffer.scala 535:117]
node _T_4562 = bits(buf_write, 3, 3) @[lsu_bus_buffer.scala 535:133]
node _T_4563 = eq(_T_4562, UInt<1>("h00")) @[lsu_bus_buffer.scala 535:123]
node _T_4564 = and(_T_4561, _T_4563) @[lsu_bus_buffer.scala 535:121]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_4565 = mux(_T_4545, _T_4549, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4566 = mux(_T_4550, _T_4554, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4567 = mux(_T_4555, _T_4559, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4568 = mux(_T_4560, _T_4564, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4569 = or(_T_4565, _T_4566) @[Mux.scala 27:72]
node _T_4570 = or(_T_4569, _T_4567) @[Mux.scala 27:72]
node _T_4571 = or(_T_4570, _T_4568) @[Mux.scala 27:72]
wire _T_4572 : UInt<1> @[Mux.scala 27:72]
_T_4572 <= _T_4571 @[Mux.scala 27:72]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
io.dctl_busbuff.lsu_nonblock_load_data_error <= _T_4572 @[lsu_bus_buffer.scala 535:48]
node _T_4573 = eq(buf_state[0], UInt<3>("h06")) @[lsu_bus_buffer.scala 536:92]
node _T_4574 = bits(buf_write, 0, 0) @[lsu_bus_buffer.scala 536:115]
node _T_4575 = eq(_T_4574, UInt<1>("h00")) @[lsu_bus_buffer.scala 536:105]
node _T_4576 = and(_T_4573, _T_4575) @[lsu_bus_buffer.scala 536:103]
node _T_4577 = eq(buf_dual[0], UInt<1>("h00")) @[lsu_bus_buffer.scala 536:122]
node _T_4578 = eq(buf_dualhi[0], UInt<1>("h00")) @[lsu_bus_buffer.scala 536:137]
node _T_4579 = or(_T_4577, _T_4578) @[lsu_bus_buffer.scala 536:135]
node _T_4580 = and(_T_4576, _T_4579) @[lsu_bus_buffer.scala 536:119]
node _T_4581 = eq(buf_state[1], UInt<3>("h06")) @[lsu_bus_buffer.scala 536:92]
node _T_4582 = bits(buf_write, 1, 1) @[lsu_bus_buffer.scala 536:115]
node _T_4583 = eq(_T_4582, UInt<1>("h00")) @[lsu_bus_buffer.scala 536:105]
node _T_4584 = and(_T_4581, _T_4583) @[lsu_bus_buffer.scala 536:103]
node _T_4585 = eq(buf_dual[1], UInt<1>("h00")) @[lsu_bus_buffer.scala 536:122]
node _T_4586 = eq(buf_dualhi[1], UInt<1>("h00")) @[lsu_bus_buffer.scala 536:137]
node _T_4587 = or(_T_4585, _T_4586) @[lsu_bus_buffer.scala 536:135]
node _T_4588 = and(_T_4584, _T_4587) @[lsu_bus_buffer.scala 536:119]
node _T_4589 = eq(buf_state[2], UInt<3>("h06")) @[lsu_bus_buffer.scala 536:92]
node _T_4590 = bits(buf_write, 2, 2) @[lsu_bus_buffer.scala 536:115]
node _T_4591 = eq(_T_4590, UInt<1>("h00")) @[lsu_bus_buffer.scala 536:105]
node _T_4592 = and(_T_4589, _T_4591) @[lsu_bus_buffer.scala 536:103]
node _T_4593 = eq(buf_dual[2], UInt<1>("h00")) @[lsu_bus_buffer.scala 536:122]
node _T_4594 = eq(buf_dualhi[2], UInt<1>("h00")) @[lsu_bus_buffer.scala 536:137]
node _T_4595 = or(_T_4593, _T_4594) @[lsu_bus_buffer.scala 536:135]
node _T_4596 = and(_T_4592, _T_4595) @[lsu_bus_buffer.scala 536:119]
node _T_4597 = eq(buf_state[3], UInt<3>("h06")) @[lsu_bus_buffer.scala 536:92]
node _T_4598 = bits(buf_write, 3, 3) @[lsu_bus_buffer.scala 536:115]
node _T_4599 = eq(_T_4598, UInt<1>("h00")) @[lsu_bus_buffer.scala 536:105]
node _T_4600 = and(_T_4597, _T_4599) @[lsu_bus_buffer.scala 536:103]
node _T_4601 = eq(buf_dual[3], UInt<1>("h00")) @[lsu_bus_buffer.scala 536:122]
node _T_4602 = eq(buf_dualhi[3], UInt<1>("h00")) @[lsu_bus_buffer.scala 536:137]
node _T_4603 = or(_T_4601, _T_4602) @[lsu_bus_buffer.scala 536:135]
node _T_4604 = and(_T_4600, _T_4603) @[lsu_bus_buffer.scala 536:119]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_4605 = mux(_T_4580, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4606 = mux(_T_4588, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4607 = mux(_T_4596, UInt<2>("h02"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4608 = mux(_T_4604, UInt<2>("h03"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4609 = or(_T_4605, _T_4606) @[Mux.scala 27:72]
node _T_4610 = or(_T_4609, _T_4607) @[Mux.scala 27:72]
node _T_4611 = or(_T_4610, _T_4608) @[Mux.scala 27:72]
wire _T_4612 : UInt<2> @[Mux.scala 27:72]
_T_4612 <= _T_4611 @[Mux.scala 27:72]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
io.dctl_busbuff.lsu_nonblock_load_data_tag <= _T_4612 @[lsu_bus_buffer.scala 536:46]
node _T_4613 = eq(buf_state[0], UInt<3>("h06")) @[lsu_bus_buffer.scala 537:78]
node _T_4614 = bits(buf_write, 0, 0) @[lsu_bus_buffer.scala 537:101]
node _T_4615 = eq(_T_4614, UInt<1>("h00")) @[lsu_bus_buffer.scala 537:91]
node _T_4616 = and(_T_4613, _T_4615) @[lsu_bus_buffer.scala 537:89]
node _T_4617 = eq(buf_dual[0], UInt<1>("h00")) @[lsu_bus_buffer.scala 537:108]
node _T_4618 = eq(buf_dualhi[0], UInt<1>("h00")) @[lsu_bus_buffer.scala 537:123]
node _T_4619 = or(_T_4617, _T_4618) @[lsu_bus_buffer.scala 537:121]
node _T_4620 = and(_T_4616, _T_4619) @[lsu_bus_buffer.scala 537:105]
node _T_4621 = eq(buf_state[1], UInt<3>("h06")) @[lsu_bus_buffer.scala 537:78]
node _T_4622 = bits(buf_write, 1, 1) @[lsu_bus_buffer.scala 537:101]
node _T_4623 = eq(_T_4622, UInt<1>("h00")) @[lsu_bus_buffer.scala 537:91]
node _T_4624 = and(_T_4621, _T_4623) @[lsu_bus_buffer.scala 537:89]
node _T_4625 = eq(buf_dual[1], UInt<1>("h00")) @[lsu_bus_buffer.scala 537:108]
node _T_4626 = eq(buf_dualhi[1], UInt<1>("h00")) @[lsu_bus_buffer.scala 537:123]
node _T_4627 = or(_T_4625, _T_4626) @[lsu_bus_buffer.scala 537:121]
node _T_4628 = and(_T_4624, _T_4627) @[lsu_bus_buffer.scala 537:105]
node _T_4629 = eq(buf_state[2], UInt<3>("h06")) @[lsu_bus_buffer.scala 537:78]
node _T_4630 = bits(buf_write, 2, 2) @[lsu_bus_buffer.scala 537:101]
node _T_4631 = eq(_T_4630, UInt<1>("h00")) @[lsu_bus_buffer.scala 537:91]
node _T_4632 = and(_T_4629, _T_4631) @[lsu_bus_buffer.scala 537:89]
node _T_4633 = eq(buf_dual[2], UInt<1>("h00")) @[lsu_bus_buffer.scala 537:108]
node _T_4634 = eq(buf_dualhi[2], UInt<1>("h00")) @[lsu_bus_buffer.scala 537:123]
node _T_4635 = or(_T_4633, _T_4634) @[lsu_bus_buffer.scala 537:121]
node _T_4636 = and(_T_4632, _T_4635) @[lsu_bus_buffer.scala 537:105]
node _T_4637 = eq(buf_state[3], UInt<3>("h06")) @[lsu_bus_buffer.scala 537:78]
node _T_4638 = bits(buf_write, 3, 3) @[lsu_bus_buffer.scala 537:101]
node _T_4639 = eq(_T_4638, UInt<1>("h00")) @[lsu_bus_buffer.scala 537:91]
node _T_4640 = and(_T_4637, _T_4639) @[lsu_bus_buffer.scala 537:89]
node _T_4641 = eq(buf_dual[3], UInt<1>("h00")) @[lsu_bus_buffer.scala 537:108]
node _T_4642 = eq(buf_dualhi[3], UInt<1>("h00")) @[lsu_bus_buffer.scala 537:123]
node _T_4643 = or(_T_4641, _T_4642) @[lsu_bus_buffer.scala 537:121]
node _T_4644 = and(_T_4640, _T_4643) @[lsu_bus_buffer.scala 537:105]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_4645 = mux(_T_4620, buf_data[0], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4646 = mux(_T_4628, buf_data[1], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4647 = mux(_T_4636, buf_data[2], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4648 = mux(_T_4644, buf_data[3], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4649 = or(_T_4645, _T_4646) @[Mux.scala 27:72]
node _T_4650 = or(_T_4649, _T_4647) @[Mux.scala 27:72]
node _T_4651 = or(_T_4650, _T_4648) @[Mux.scala 27:72]
wire lsu_nonblock_load_data_lo : UInt<32> @[Mux.scala 27:72]
lsu_nonblock_load_data_lo <= _T_4651 @[Mux.scala 27:72]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4652 = eq(buf_state[0], UInt<3>("h06")) @[lsu_bus_buffer.scala 538:78]
node _T_4653 = bits(buf_write, 0, 0) @[lsu_bus_buffer.scala 538:101]
node _T_4654 = eq(_T_4653, UInt<1>("h00")) @[lsu_bus_buffer.scala 538:91]
node _T_4655 = and(_T_4652, _T_4654) @[lsu_bus_buffer.scala 538:89]
node _T_4656 = and(buf_dual[0], buf_dualhi[0]) @[lsu_bus_buffer.scala 538:120]
node _T_4657 = and(_T_4655, _T_4656) @[lsu_bus_buffer.scala 538:105]
node _T_4658 = eq(buf_state[1], UInt<3>("h06")) @[lsu_bus_buffer.scala 538:78]
node _T_4659 = bits(buf_write, 1, 1) @[lsu_bus_buffer.scala 538:101]
node _T_4660 = eq(_T_4659, UInt<1>("h00")) @[lsu_bus_buffer.scala 538:91]
node _T_4661 = and(_T_4658, _T_4660) @[lsu_bus_buffer.scala 538:89]
node _T_4662 = and(buf_dual[1], buf_dualhi[1]) @[lsu_bus_buffer.scala 538:120]
node _T_4663 = and(_T_4661, _T_4662) @[lsu_bus_buffer.scala 538:105]
node _T_4664 = eq(buf_state[2], UInt<3>("h06")) @[lsu_bus_buffer.scala 538:78]
node _T_4665 = bits(buf_write, 2, 2) @[lsu_bus_buffer.scala 538:101]
node _T_4666 = eq(_T_4665, UInt<1>("h00")) @[lsu_bus_buffer.scala 538:91]
node _T_4667 = and(_T_4664, _T_4666) @[lsu_bus_buffer.scala 538:89]
node _T_4668 = and(buf_dual[2], buf_dualhi[2]) @[lsu_bus_buffer.scala 538:120]
node _T_4669 = and(_T_4667, _T_4668) @[lsu_bus_buffer.scala 538:105]
node _T_4670 = eq(buf_state[3], UInt<3>("h06")) @[lsu_bus_buffer.scala 538:78]
node _T_4671 = bits(buf_write, 3, 3) @[lsu_bus_buffer.scala 538:101]
node _T_4672 = eq(_T_4671, UInt<1>("h00")) @[lsu_bus_buffer.scala 538:91]
node _T_4673 = and(_T_4670, _T_4672) @[lsu_bus_buffer.scala 538:89]
node _T_4674 = and(buf_dual[3], buf_dualhi[3]) @[lsu_bus_buffer.scala 538:120]
node _T_4675 = and(_T_4673, _T_4674) @[lsu_bus_buffer.scala 538:105]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_4676 = mux(_T_4657, buf_data[0], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4677 = mux(_T_4663, buf_data[1], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4678 = mux(_T_4669, buf_data[2], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4679 = mux(_T_4675, buf_data[3], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4680 = or(_T_4676, _T_4677) @[Mux.scala 27:72]
node _T_4681 = or(_T_4680, _T_4678) @[Mux.scala 27:72]
node _T_4682 = or(_T_4681, _T_4679) @[Mux.scala 27:72]
wire lsu_nonblock_load_data_hi : UInt<32> @[Mux.scala 27:72]
lsu_nonblock_load_data_hi <= _T_4682 @[Mux.scala 27:72]
node _T_4683 = eq(io.dctl_busbuff.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[lsu_bus_buffer.scala 58:123]
node _T_4684 = eq(io.dctl_busbuff.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[lsu_bus_buffer.scala 58:123]
node _T_4685 = eq(io.dctl_busbuff.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[lsu_bus_buffer.scala 58:123]
node _T_4686 = eq(io.dctl_busbuff.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[lsu_bus_buffer.scala 58:123]
node _T_4687 = mux(_T_4683, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4688 = mux(_T_4684, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4689 = mux(_T_4685, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4690 = mux(_T_4686, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4691 = or(_T_4687, _T_4688) @[Mux.scala 27:72]
node _T_4692 = or(_T_4691, _T_4689) @[Mux.scala 27:72]
node _T_4693 = or(_T_4692, _T_4690) @[Mux.scala 27:72]
wire _T_4694 : UInt<32> @[Mux.scala 27:72]
_T_4694 <= _T_4693 @[Mux.scala 27:72]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node lsu_nonblock_addr_offset = bits(_T_4694, 1, 0) @[lsu_bus_buffer.scala 539:96]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_4695 = eq(io.dctl_busbuff.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[lsu_bus_buffer.scala 58:123]
node _T_4696 = eq(io.dctl_busbuff.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[lsu_bus_buffer.scala 58:123]
node _T_4697 = eq(io.dctl_busbuff.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[lsu_bus_buffer.scala 58:123]
node _T_4698 = eq(io.dctl_busbuff.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[lsu_bus_buffer.scala 58:123]
node _T_4699 = mux(_T_4695, buf_sz[0], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4700 = mux(_T_4696, buf_sz[1], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4701 = mux(_T_4697, buf_sz[2], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4702 = mux(_T_4698, buf_sz[3], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4703 = or(_T_4699, _T_4700) @[Mux.scala 27:72]
node _T_4704 = or(_T_4703, _T_4701) @[Mux.scala 27:72]
node _T_4705 = or(_T_4704, _T_4702) @[Mux.scala 27:72]
wire lsu_nonblock_sz : UInt<2> @[Mux.scala 27:72]
lsu_nonblock_sz <= _T_4705 @[Mux.scala 27:72]
node _T_4706 = eq(io.dctl_busbuff.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[lsu_bus_buffer.scala 57:118]
node _T_4707 = bits(buf_unsign, 0, 0) @[lsu_bus_buffer.scala 57:129]
node _T_4708 = eq(io.dctl_busbuff.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[lsu_bus_buffer.scala 57:118]
node _T_4709 = bits(buf_unsign, 1, 1) @[lsu_bus_buffer.scala 57:129]
node _T_4710 = eq(io.dctl_busbuff.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[lsu_bus_buffer.scala 57:118]
node _T_4711 = bits(buf_unsign, 2, 2) @[lsu_bus_buffer.scala 57:129]
node _T_4712 = eq(io.dctl_busbuff.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[lsu_bus_buffer.scala 57:118]
node _T_4713 = bits(buf_unsign, 3, 3) @[lsu_bus_buffer.scala 57:129]
node _T_4714 = mux(_T_4706, _T_4707, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4715 = mux(_T_4708, _T_4709, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4716 = mux(_T_4710, _T_4711, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4717 = mux(_T_4712, _T_4713, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4718 = or(_T_4714, _T_4715) @[Mux.scala 27:72]
node _T_4719 = or(_T_4718, _T_4716) @[Mux.scala 27:72]
node _T_4720 = or(_T_4719, _T_4717) @[Mux.scala 27:72]
wire lsu_nonblock_unsign : UInt<1> @[Mux.scala 27:72]
lsu_nonblock_unsign <= _T_4720 @[Mux.scala 27:72]
node _T_4721 = cat(buf_dual[3], buf_dual[2]) @[Cat.scala 29:58]
node _T_4722 = cat(_T_4721, buf_dual[1]) @[Cat.scala 29:58]
node _T_4723 = cat(_T_4722, buf_dual[0]) @[Cat.scala 29:58]
node _T_4724 = eq(io.dctl_busbuff.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[lsu_bus_buffer.scala 57:118]
node _T_4725 = bits(_T_4723, 0, 0) @[lsu_bus_buffer.scala 57:129]
node _T_4726 = eq(io.dctl_busbuff.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[lsu_bus_buffer.scala 57:118]
node _T_4727 = bits(_T_4723, 1, 1) @[lsu_bus_buffer.scala 57:129]
node _T_4728 = eq(io.dctl_busbuff.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[lsu_bus_buffer.scala 57:118]
node _T_4729 = bits(_T_4723, 2, 2) @[lsu_bus_buffer.scala 57:129]
node _T_4730 = eq(io.dctl_busbuff.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[lsu_bus_buffer.scala 57:118]
node _T_4731 = bits(_T_4723, 3, 3) @[lsu_bus_buffer.scala 57:129]
node _T_4732 = mux(_T_4724, _T_4725, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4733 = mux(_T_4726, _T_4727, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4734 = mux(_T_4728, _T_4729, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4735 = mux(_T_4730, _T_4731, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4736 = or(_T_4732, _T_4733) @[Mux.scala 27:72]
node _T_4737 = or(_T_4736, _T_4734) @[Mux.scala 27:72]
node _T_4738 = or(_T_4737, _T_4735) @[Mux.scala 27:72]
wire lsu_nonblock_dual : UInt<1> @[Mux.scala 27:72]
lsu_nonblock_dual <= _T_4738 @[Mux.scala 27:72]
node _T_4739 = cat(lsu_nonblock_load_data_hi, lsu_nonblock_load_data_lo) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4740 = mul(lsu_nonblock_addr_offset, UInt<4>("h08")) @[lsu_bus_buffer.scala 543:121]
node lsu_nonblock_data_unalgn = dshr(_T_4739, _T_4740) @[lsu_bus_buffer.scala 543:92]
node _T_4741 = eq(io.dctl_busbuff.lsu_nonblock_load_data_error, UInt<1>("h00")) @[lsu_bus_buffer.scala 545:82]
node _T_4742 = and(lsu_nonblock_load_data_ready, _T_4741) @[lsu_bus_buffer.scala 545:80]
io.dctl_busbuff.lsu_nonblock_load_data_valid <= _T_4742 @[lsu_bus_buffer.scala 545:48]
node _T_4743 = eq(lsu_nonblock_sz, UInt<1>("h00")) @[lsu_bus_buffer.scala 546:94]
node _T_4744 = and(lsu_nonblock_unsign, _T_4743) @[lsu_bus_buffer.scala 546:76]
node _T_4745 = bits(lsu_nonblock_data_unalgn, 7, 0) @[lsu_bus_buffer.scala 546:144]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_4746 = cat(UInt<24>("h00"), _T_4745) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4747 = eq(lsu_nonblock_sz, UInt<1>("h01")) @[lsu_bus_buffer.scala 547:45]
node _T_4748 = and(lsu_nonblock_unsign, _T_4747) @[lsu_bus_buffer.scala 547:26]
node _T_4749 = bits(lsu_nonblock_data_unalgn, 15, 0) @[lsu_bus_buffer.scala 547:95]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_4750 = cat(UInt<16>("h00"), _T_4749) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4751 = eq(lsu_nonblock_unsign, UInt<1>("h00")) @[lsu_bus_buffer.scala 548:6]
node _T_4752 = eq(lsu_nonblock_sz, UInt<1>("h00")) @[lsu_bus_buffer.scala 548:45]
node _T_4753 = and(_T_4751, _T_4752) @[lsu_bus_buffer.scala 548:27]
node _T_4754 = bits(lsu_nonblock_data_unalgn, 7, 7) @[lsu_bus_buffer.scala 548:93]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_4755 = bits(_T_4754, 0, 0) @[Bitwise.scala 72:15]
node _T_4756 = mux(_T_4755, UInt<24>("h0ffffff"), UInt<24>("h00")) @[Bitwise.scala 72:12]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4757 = bits(lsu_nonblock_data_unalgn, 7, 0) @[lsu_bus_buffer.scala 548:123]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_4758 = cat(_T_4756, _T_4757) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4759 = eq(lsu_nonblock_unsign, UInt<1>("h00")) @[lsu_bus_buffer.scala 549:6]
node _T_4760 = eq(lsu_nonblock_sz, UInt<1>("h01")) @[lsu_bus_buffer.scala 549:45]
node _T_4761 = and(_T_4759, _T_4760) @[lsu_bus_buffer.scala 549:27]
node _T_4762 = bits(lsu_nonblock_data_unalgn, 15, 15) @[lsu_bus_buffer.scala 549:93]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_4763 = bits(_T_4762, 0, 0) @[Bitwise.scala 72:15]
node _T_4764 = mux(_T_4763, UInt<16>("h0ffff"), UInt<16>("h00")) @[Bitwise.scala 72:12]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4765 = bits(lsu_nonblock_data_unalgn, 15, 0) @[lsu_bus_buffer.scala 549:124]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_4766 = cat(_T_4764, _T_4765) @[Cat.scala 29:58]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
node _T_4767 = eq(lsu_nonblock_sz, UInt<2>("h02")) @[lsu_bus_buffer.scala 550:21]
LSU with Bundling
2020-12-10 12:50:49 +08:00
node _T_4768 = mux(_T_4744, _T_4746, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4769 = mux(_T_4748, _T_4750, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4770 = mux(_T_4753, _T_4758, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4771 = mux(_T_4761, _T_4766, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4772 = mux(_T_4767, lsu_nonblock_data_unalgn, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4773 = or(_T_4768, _T_4769) @[Mux.scala 27:72]
node _T_4774 = or(_T_4773, _T_4770) @[Mux.scala 27:72]
node _T_4775 = or(_T_4774, _T_4771) @[Mux.scala 27:72]
node _T_4776 = or(_T_4775, _T_4772) @[Mux.scala 27:72]
wire _T_4777 : UInt<64> @[Mux.scala 27:72]
_T_4777 <= _T_4776 @[Mux.scala 27:72]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
io.dctl_busbuff.lsu_nonblock_load_data <= _T_4777 @[lsu_bus_buffer.scala 546:42]
node _T_4778 = eq(buf_state[0], UInt<3>("h03")) @[lsu_bus_buffer.scala 551:62]
node _T_4779 = bits(buf_sideeffect, 0, 0) @[lsu_bus_buffer.scala 551:89]
node _T_4780 = and(_T_4778, _T_4779) @[lsu_bus_buffer.scala 551:73]
node _T_4781 = and(_T_4780, io.tlu_busbuff.dec_tlu_sideeffect_posted_disable) @[lsu_bus_buffer.scala 551:93]
node _T_4782 = eq(buf_state[1], UInt<3>("h03")) @[lsu_bus_buffer.scala 551:62]
node _T_4783 = bits(buf_sideeffect, 1, 1) @[lsu_bus_buffer.scala 551:89]
node _T_4784 = and(_T_4782, _T_4783) @[lsu_bus_buffer.scala 551:73]
node _T_4785 = and(_T_4784, io.tlu_busbuff.dec_tlu_sideeffect_posted_disable) @[lsu_bus_buffer.scala 551:93]
node _T_4786 = eq(buf_state[2], UInt<3>("h03")) @[lsu_bus_buffer.scala 551:62]
node _T_4787 = bits(buf_sideeffect, 2, 2) @[lsu_bus_buffer.scala 551:89]
node _T_4788 = and(_T_4786, _T_4787) @[lsu_bus_buffer.scala 551:73]
node _T_4789 = and(_T_4788, io.tlu_busbuff.dec_tlu_sideeffect_posted_disable) @[lsu_bus_buffer.scala 551:93]
node _T_4790 = eq(buf_state[3], UInt<3>("h03")) @[lsu_bus_buffer.scala 551:62]
node _T_4791 = bits(buf_sideeffect, 3, 3) @[lsu_bus_buffer.scala 551:89]
node _T_4792 = and(_T_4790, _T_4791) @[lsu_bus_buffer.scala 551:73]
node _T_4793 = and(_T_4792, io.tlu_busbuff.dec_tlu_sideeffect_posted_disable) @[lsu_bus_buffer.scala 551:93]
node _T_4794 = or(_T_4781, _T_4785) @[lsu_bus_buffer.scala 551:153]
node _T_4795 = or(_T_4794, _T_4789) @[lsu_bus_buffer.scala 551:153]
node _T_4796 = or(_T_4795, _T_4793) @[lsu_bus_buffer.scala 551:153]
node _T_4797 = and(obuf_valid, obuf_sideeffect) @[lsu_bus_buffer.scala 551:171]
node _T_4798 = and(_T_4797, io.tlu_busbuff.dec_tlu_sideeffect_posted_disable) @[lsu_bus_buffer.scala 551:189]
node _T_4799 = or(_T_4796, _T_4798) @[lsu_bus_buffer.scala 551:157]
bus_sideeffect_pend <= _T_4799 @[lsu_bus_buffer.scala 551:23]
node _T_4800 = eq(buf_state[0], UInt<3>("h03")) @[lsu_bus_buffer.scala 552:71]
node _T_4801 = and(UInt<1>("h01"), obuf_valid) @[lsu_bus_buffer.scala 553:25]
node _T_4802 = bits(obuf_addr, 31, 3) @[lsu_bus_buffer.scala 553:50]
node _T_4803 = bits(buf_addr[0], 31, 3) @[lsu_bus_buffer.scala 553:70]
node _T_4804 = eq(_T_4802, _T_4803) @[lsu_bus_buffer.scala 553:56]
node _T_4805 = and(_T_4801, _T_4804) @[lsu_bus_buffer.scala 553:38]
node _T_4806 = eq(obuf_tag0, UInt<1>("h00")) @[lsu_bus_buffer.scala 553:92]
node _T_4807 = eq(obuf_tag1, UInt<1>("h00")) @[lsu_bus_buffer.scala 553:126]
node _T_4808 = and(obuf_merge, _T_4807) @[lsu_bus_buffer.scala 553:114]
node _T_4809 = or(_T_4806, _T_4808) @[lsu_bus_buffer.scala 553:100]
node _T_4810 = eq(_T_4809, UInt<1>("h00")) @[lsu_bus_buffer.scala 553:80]
node _T_4811 = and(_T_4805, _T_4810) @[lsu_bus_buffer.scala 553:78]
node _T_4812 = eq(buf_state[1], UInt<3>("h03")) @[lsu_bus_buffer.scala 552:71]
node _T_4813 = and(UInt<1>("h01"), obuf_valid) @[lsu_bus_buffer.scala 553:25]
node _T_4814 = bits(obuf_addr, 31, 3) @[lsu_bus_buffer.scala 553:50]
node _T_4815 = bits(buf_addr[1], 31, 3) @[lsu_bus_buffer.scala 553:70]
node _T_4816 = eq(_T_4814, _T_4815) @[lsu_bus_buffer.scala 553:56]
node _T_4817 = and(_T_4813, _T_4816) @[lsu_bus_buffer.scala 553:38]
node _T_4818 = eq(obuf_tag0, UInt<1>("h01")) @[lsu_bus_buffer.scala 553:92]
node _T_4819 = eq(obuf_tag1, UInt<1>("h01")) @[lsu_bus_buffer.scala 553:126]
node _T_4820 = and(obuf_merge, _T_4819) @[lsu_bus_buffer.scala 553:114]
node _T_4821 = or(_T_4818, _T_4820) @[lsu_bus_buffer.scala 553:100]
node _T_4822 = eq(_T_4821, UInt<1>("h00")) @[lsu_bus_buffer.scala 553:80]
node _T_4823 = and(_T_4817, _T_4822) @[lsu_bus_buffer.scala 553:78]
node _T_4824 = eq(buf_state[2], UInt<3>("h03")) @[lsu_bus_buffer.scala 552:71]
node _T_4825 = and(UInt<1>("h01"), obuf_valid) @[lsu_bus_buffer.scala 553:25]
node _T_4826 = bits(obuf_addr, 31, 3) @[lsu_bus_buffer.scala 553:50]
node _T_4827 = bits(buf_addr[2], 31, 3) @[lsu_bus_buffer.scala 553:70]
node _T_4828 = eq(_T_4826, _T_4827) @[lsu_bus_buffer.scala 553:56]
node _T_4829 = and(_T_4825, _T_4828) @[lsu_bus_buffer.scala 553:38]
node _T_4830 = eq(obuf_tag0, UInt<2>("h02")) @[lsu_bus_buffer.scala 553:92]
node _T_4831 = eq(obuf_tag1, UInt<2>("h02")) @[lsu_bus_buffer.scala 553:126]
node _T_4832 = and(obuf_merge, _T_4831) @[lsu_bus_buffer.scala 553:114]
node _T_4833 = or(_T_4830, _T_4832) @[lsu_bus_buffer.scala 553:100]
node _T_4834 = eq(_T_4833, UInt<1>("h00")) @[lsu_bus_buffer.scala 553:80]
node _T_4835 = and(_T_4829, _T_4834) @[lsu_bus_buffer.scala 553:78]
node _T_4836 = eq(buf_state[3], UInt<3>("h03")) @[lsu_bus_buffer.scala 552:71]
node _T_4837 = and(UInt<1>("h01"), obuf_valid) @[lsu_bus_buffer.scala 553:25]
node _T_4838 = bits(obuf_addr, 31, 3) @[lsu_bus_buffer.scala 553:50]
node _T_4839 = bits(buf_addr[3], 31, 3) @[lsu_bus_buffer.scala 553:70]
node _T_4840 = eq(_T_4838, _T_4839) @[lsu_bus_buffer.scala 553:56]
node _T_4841 = and(_T_4837, _T_4840) @[lsu_bus_buffer.scala 553:38]
node _T_4842 = eq(obuf_tag0, UInt<2>("h03")) @[lsu_bus_buffer.scala 553:92]
node _T_4843 = eq(obuf_tag1, UInt<2>("h03")) @[lsu_bus_buffer.scala 553:126]
node _T_4844 = and(obuf_merge, _T_4843) @[lsu_bus_buffer.scala 553:114]
node _T_4845 = or(_T_4842, _T_4844) @[lsu_bus_buffer.scala 553:100]
node _T_4846 = eq(_T_4845, UInt<1>("h00")) @[lsu_bus_buffer.scala 553:80]
node _T_4847 = and(_T_4841, _T_4846) @[lsu_bus_buffer.scala 553:78]
node _T_4848 = mux(_T_4800, _T_4811, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4849 = mux(_T_4812, _T_4823, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4850 = mux(_T_4824, _T_4835, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4851 = mux(_T_4836, _T_4847, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4852 = or(_T_4848, _T_4849) @[Mux.scala 27:72]
node _T_4853 = or(_T_4852, _T_4850) @[Mux.scala 27:72]
node _T_4854 = or(_T_4853, _T_4851) @[Mux.scala 27:72]
wire _T_4855 : UInt<1> @[Mux.scala 27:72]
_T_4855 <= _T_4854 @[Mux.scala 27:72]
bus_addr_match_pending <= _T_4855 @[lsu_bus_buffer.scala 552:26]
node _T_4856 = or(obuf_cmd_done, obuf_data_done) @[lsu_bus_buffer.scala 555:54]
node _T_4857 = mux(obuf_cmd_done, io.lsu_axi.w.ready, io.lsu_axi.aw.ready) @[lsu_bus_buffer.scala 555:75]
node _T_4858 = and(io.lsu_axi.aw.ready, io.lsu_axi.aw.ready) @[lsu_bus_buffer.scala 555:153]
node _T_4859 = mux(_T_4856, _T_4857, _T_4858) @[lsu_bus_buffer.scala 555:39]
node _T_4860 = mux(obuf_write, _T_4859, io.lsu_axi.ar.ready) @[lsu_bus_buffer.scala 555:23]
bus_cmd_ready <= _T_4860 @[lsu_bus_buffer.scala 555:17]
node _T_4861 = and(io.lsu_axi.aw.valid, io.lsu_axi.aw.ready) @[lsu_bus_buffer.scala 556:40]
bus_wcmd_sent <= _T_4861 @[lsu_bus_buffer.scala 556:17]
node _T_4862 = and(io.lsu_axi.w.valid, io.lsu_axi.w.ready) @[lsu_bus_buffer.scala 557:40]
bus_wdata_sent <= _T_4862 @[lsu_bus_buffer.scala 557:18]
node _T_4863 = or(obuf_cmd_done, bus_wcmd_sent) @[lsu_bus_buffer.scala 558:35]
node _T_4864 = or(obuf_data_done, bus_wdata_sent) @[lsu_bus_buffer.scala 558:70]
node _T_4865 = and(_T_4863, _T_4864) @[lsu_bus_buffer.scala 558:52]
node _T_4866 = and(io.lsu_axi.ar.valid, io.lsu_axi.ar.ready) @[lsu_bus_buffer.scala 558:112]
node _T_4867 = or(_T_4865, _T_4866) @[lsu_bus_buffer.scala 558:89]
bus_cmd_sent <= _T_4867 @[lsu_bus_buffer.scala 558:16]
node _T_4868 = and(io.lsu_axi.r.valid, io.lsu_axi.r.ready) @[lsu_bus_buffer.scala 559:38]
bus_rsp_read <= _T_4868 @[lsu_bus_buffer.scala 559:16]
node _T_4869 = and(io.lsu_axi.b.valid, io.lsu_axi.b.ready) @[lsu_bus_buffer.scala 560:39]
bus_rsp_write <= _T_4869 @[lsu_bus_buffer.scala 560:17]
bus_rsp_read_tag <= io.lsu_axi.r.bits.id @[lsu_bus_buffer.scala 561:20]
bus_rsp_write_tag <= io.lsu_axi.b.bits.id @[lsu_bus_buffer.scala 562:21]
node _T_4870 = neq(io.lsu_axi.b.bits.resp, UInt<1>("h00")) @[lsu_bus_buffer.scala 563:66]
node _T_4871 = and(bus_rsp_write, _T_4870) @[lsu_bus_buffer.scala 563:40]
bus_rsp_write_error <= _T_4871 @[lsu_bus_buffer.scala 563:23]
node _T_4872 = neq(io.lsu_axi.r.bits.resp, UInt<1>("h00")) @[lsu_bus_buffer.scala 564:64]
node _T_4873 = and(bus_rsp_read, _T_4872) @[lsu_bus_buffer.scala 564:38]
bus_rsp_read_error <= _T_4873 @[lsu_bus_buffer.scala 564:22]
bus_rsp_rdata <= io.lsu_axi.r.bits.data @[lsu_bus_buffer.scala 565:17]
node _T_4874 = and(obuf_valid, obuf_write) @[lsu_bus_buffer.scala 568:37]
node _T_4875 = eq(obuf_cmd_done, UInt<1>("h00")) @[lsu_bus_buffer.scala 568:52]
node _T_4876 = and(_T_4874, _T_4875) @[lsu_bus_buffer.scala 568:50]
node _T_4877 = eq(bus_addr_match_pending, UInt<1>("h00")) @[lsu_bus_buffer.scala 568:69]
node _T_4878 = and(_T_4876, _T_4877) @[lsu_bus_buffer.scala 568:67]
io.lsu_axi.aw.valid <= _T_4878 @[lsu_bus_buffer.scala 568:23]
io.lsu_axi.aw.bits.id <= obuf_tag0 @[lsu_bus_buffer.scala 569:25]
node _T_4879 = bits(obuf_addr, 31, 3) @[lsu_bus_buffer.scala 570:75]
node _T_4880 = cat(_T_4879, UInt<3>("h00")) @[Cat.scala 29:58]
node _T_4881 = mux(obuf_sideeffect, obuf_addr, _T_4880) @[lsu_bus_buffer.scala 570:33]
io.lsu_axi.aw.bits.addr <= _T_4881 @[lsu_bus_buffer.scala 570:27]
node _T_4882 = cat(UInt<1>("h00"), obuf_sz) @[Cat.scala 29:58]
node _T_4883 = mux(obuf_sideeffect, _T_4882, UInt<3>("h03")) @[lsu_bus_buffer.scala 571:33]
io.lsu_axi.aw.bits.size <= _T_4883 @[lsu_bus_buffer.scala 571:27]
io.lsu_axi.aw.bits.prot <= UInt<1>("h00") @[lsu_bus_buffer.scala 572:27]
node _T_4884 = mux(obuf_sideeffect, UInt<1>("h00"), UInt<4>("h0f")) @[lsu_bus_buffer.scala 573:34]
io.lsu_axi.aw.bits.cache <= _T_4884 @[lsu_bus_buffer.scala 573:28]
node _T_4885 = bits(obuf_addr, 31, 28) @[lsu_bus_buffer.scala 574:41]
io.lsu_axi.aw.bits.region <= _T_4885 @[lsu_bus_buffer.scala 574:29]
io.lsu_axi.aw.bits.len <= UInt<1>("h00") @[lsu_bus_buffer.scala 575:26]
io.lsu_axi.aw.bits.burst <= UInt<2>("h01") @[lsu_bus_buffer.scala 576:28]
io.lsu_axi.aw.bits.qos <= UInt<1>("h00") @[lsu_bus_buffer.scala 577:26]
io.lsu_axi.aw.bits.lock <= UInt<1>("h00") @[lsu_bus_buffer.scala 578:27]
node _T_4886 = and(obuf_valid, obuf_write) @[lsu_bus_buffer.scala 580:36]
node _T_4887 = eq(obuf_data_done, UInt<1>("h00")) @[lsu_bus_buffer.scala 580:51]
node _T_4888 = and(_T_4886, _T_4887) @[lsu_bus_buffer.scala 580:49]
node _T_4889 = eq(bus_addr_match_pending, UInt<1>("h00")) @[lsu_bus_buffer.scala 580:69]
node _T_4890 = and(_T_4888, _T_4889) @[lsu_bus_buffer.scala 580:67]
io.lsu_axi.w.valid <= _T_4890 @[lsu_bus_buffer.scala 580:22]
node _T_4891 = bits(obuf_write, 0, 0) @[Bitwise.scala 72:15]
node _T_4892 = mux(_T_4891, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_4893 = and(obuf_byteen, _T_4892) @[lsu_bus_buffer.scala 581:41]
io.lsu_axi.w.bits.strb <= _T_4893 @[lsu_bus_buffer.scala 581:26]
io.lsu_axi.w.bits.data <= obuf_data @[lsu_bus_buffer.scala 582:26]
io.lsu_axi.w.bits.last <= UInt<1>("h01") @[lsu_bus_buffer.scala 583:26]
node _T_4894 = eq(obuf_write, UInt<1>("h00")) @[lsu_bus_buffer.scala 585:39]
node _T_4895 = and(obuf_valid, _T_4894) @[lsu_bus_buffer.scala 585:37]
node _T_4896 = eq(obuf_nosend, UInt<1>("h00")) @[lsu_bus_buffer.scala 585:53]
node _T_4897 = and(_T_4895, _T_4896) @[lsu_bus_buffer.scala 585:51]
node _T_4898 = eq(bus_addr_match_pending, UInt<1>("h00")) @[lsu_bus_buffer.scala 585:68]
node _T_4899 = and(_T_4897, _T_4898) @[lsu_bus_buffer.scala 585:66]
io.lsu_axi.ar.valid <= _T_4899 @[lsu_bus_buffer.scala 585:23]
io.lsu_axi.ar.bits.id <= obuf_tag0 @[lsu_bus_buffer.scala 586:25]
node _T_4900 = bits(obuf_addr, 31, 3) @[lsu_bus_buffer.scala 587:75]
node _T_4901 = cat(_T_4900, UInt<3>("h00")) @[Cat.scala 29:58]
node _T_4902 = mux(obuf_sideeffect, obuf_addr, _T_4901) @[lsu_bus_buffer.scala 587:33]
io.lsu_axi.ar.bits.addr <= _T_4902 @[lsu_bus_buffer.scala 587:27]
node _T_4903 = cat(UInt<1>("h00"), obuf_sz) @[Cat.scala 29:58]
node _T_4904 = mux(obuf_sideeffect, _T_4903, UInt<3>("h03")) @[lsu_bus_buffer.scala 588:33]
io.lsu_axi.ar.bits.size <= _T_4904 @[lsu_bus_buffer.scala 588:27]
io.lsu_axi.ar.bits.prot <= UInt<1>("h00") @[lsu_bus_buffer.scala 589:27]
node _T_4905 = mux(obuf_sideeffect, UInt<4>("h00"), UInt<4>("h0f")) @[lsu_bus_buffer.scala 590:34]
io.lsu_axi.ar.bits.cache <= _T_4905 @[lsu_bus_buffer.scala 590:28]
node _T_4906 = bits(obuf_addr, 31, 28) @[lsu_bus_buffer.scala 591:41]
io.lsu_axi.ar.bits.region <= _T_4906 @[lsu_bus_buffer.scala 591:29]
io.lsu_axi.ar.bits.len <= UInt<1>("h00") @[lsu_bus_buffer.scala 592:26]
io.lsu_axi.ar.bits.burst <= UInt<2>("h01") @[lsu_bus_buffer.scala 593:28]
io.lsu_axi.ar.bits.qos <= UInt<1>("h00") @[lsu_bus_buffer.scala 594:26]
io.lsu_axi.ar.bits.lock <= UInt<1>("h00") @[lsu_bus_buffer.scala 595:27]
io.lsu_axi.b.ready <= UInt<1>("h01") @[lsu_bus_buffer.scala 596:22]
io.lsu_axi.r.ready <= UInt<1>("h01") @[lsu_bus_buffer.scala 597:22]
node _T_4907 = eq(buf_state[0], UInt<3>("h06")) @[lsu_bus_buffer.scala 598:93]
node _T_4908 = bits(buf_error, 0, 0) @[lsu_bus_buffer.scala 598:137]
node _T_4909 = and(io.lsu_bus_clk_en_q, _T_4908) @[lsu_bus_buffer.scala 598:126]
node _T_4910 = bits(buf_write, 0, 0) @[lsu_bus_buffer.scala 598:152]
node _T_4911 = and(_T_4909, _T_4910) @[lsu_bus_buffer.scala 598:141]
node _T_4912 = eq(buf_state[1], UInt<3>("h06")) @[lsu_bus_buffer.scala 598:93]
node _T_4913 = bits(buf_error, 1, 1) @[lsu_bus_buffer.scala 598:137]
node _T_4914 = and(io.lsu_bus_clk_en_q, _T_4913) @[lsu_bus_buffer.scala 598:126]
node _T_4915 = bits(buf_write, 1, 1) @[lsu_bus_buffer.scala 598:152]
node _T_4916 = and(_T_4914, _T_4915) @[lsu_bus_buffer.scala 598:141]
node _T_4917 = eq(buf_state[2], UInt<3>("h06")) @[lsu_bus_buffer.scala 598:93]
node _T_4918 = bits(buf_error, 2, 2) @[lsu_bus_buffer.scala 598:137]
node _T_4919 = and(io.lsu_bus_clk_en_q, _T_4918) @[lsu_bus_buffer.scala 598:126]
node _T_4920 = bits(buf_write, 2, 2) @[lsu_bus_buffer.scala 598:152]
node _T_4921 = and(_T_4919, _T_4920) @[lsu_bus_buffer.scala 598:141]
node _T_4922 = eq(buf_state[3], UInt<3>("h06")) @[lsu_bus_buffer.scala 598:93]
node _T_4923 = bits(buf_error, 3, 3) @[lsu_bus_buffer.scala 598:137]
node _T_4924 = and(io.lsu_bus_clk_en_q, _T_4923) @[lsu_bus_buffer.scala 598:126]
node _T_4925 = bits(buf_write, 3, 3) @[lsu_bus_buffer.scala 598:152]
node _T_4926 = and(_T_4924, _T_4925) @[lsu_bus_buffer.scala 598:141]
node _T_4927 = mux(_T_4907, _T_4911, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4928 = mux(_T_4912, _T_4916, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4929 = mux(_T_4917, _T_4921, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4930 = mux(_T_4922, _T_4926, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4931 = or(_T_4927, _T_4928) @[Mux.scala 27:72]
node _T_4932 = or(_T_4931, _T_4929) @[Mux.scala 27:72]
node _T_4933 = or(_T_4932, _T_4930) @[Mux.scala 27:72]
wire _T_4934 : UInt<1> @[Mux.scala 27:72]
_T_4934 <= _T_4933 @[Mux.scala 27:72]
io.tlu_busbuff.lsu_imprecise_error_store_any <= _T_4934 @[lsu_bus_buffer.scala 598:48]
node _T_4935 = eq(buf_state[0], UInt<3>("h06")) @[lsu_bus_buffer.scala 599:82]
node _T_4936 = bits(buf_error, 0, 0) @[lsu_bus_buffer.scala 599:104]
node _T_4937 = and(_T_4935, _T_4936) @[lsu_bus_buffer.scala 599:93]
node _T_4938 = bits(buf_write, 0, 0) @[lsu_bus_buffer.scala 599:119]
node _T_4939 = and(_T_4937, _T_4938) @[lsu_bus_buffer.scala 599:108]
node _T_4940 = eq(buf_state[1], UInt<3>("h06")) @[lsu_bus_buffer.scala 599:82]
node _T_4941 = bits(buf_error, 1, 1) @[lsu_bus_buffer.scala 599:104]
node _T_4942 = and(_T_4940, _T_4941) @[lsu_bus_buffer.scala 599:93]
node _T_4943 = bits(buf_write, 1, 1) @[lsu_bus_buffer.scala 599:119]
node _T_4944 = and(_T_4942, _T_4943) @[lsu_bus_buffer.scala 599:108]
node _T_4945 = eq(buf_state[2], UInt<3>("h06")) @[lsu_bus_buffer.scala 599:82]
node _T_4946 = bits(buf_error, 2, 2) @[lsu_bus_buffer.scala 599:104]
node _T_4947 = and(_T_4945, _T_4946) @[lsu_bus_buffer.scala 599:93]
node _T_4948 = bits(buf_write, 2, 2) @[lsu_bus_buffer.scala 599:119]
node _T_4949 = and(_T_4947, _T_4948) @[lsu_bus_buffer.scala 599:108]
node _T_4950 = eq(buf_state[3], UInt<3>("h06")) @[lsu_bus_buffer.scala 599:82]
node _T_4951 = bits(buf_error, 3, 3) @[lsu_bus_buffer.scala 599:104]
node _T_4952 = and(_T_4950, _T_4951) @[lsu_bus_buffer.scala 599:93]
node _T_4953 = bits(buf_write, 3, 3) @[lsu_bus_buffer.scala 599:119]
node _T_4954 = and(_T_4952, _T_4953) @[lsu_bus_buffer.scala 599:108]
node _T_4955 = mux(_T_4939, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4956 = mux(_T_4944, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4957 = mux(_T_4949, UInt<2>("h02"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4958 = mux(_T_4954, UInt<2>("h03"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4959 = or(_T_4955, _T_4956) @[Mux.scala 27:72]
node _T_4960 = or(_T_4959, _T_4957) @[Mux.scala 27:72]
node _T_4961 = or(_T_4960, _T_4958) @[Mux.scala 27:72]
LSU with Bundling
2020-12-10 12:50:49 +08:00
wire lsu_imprecise_error_store_tag : UInt<2> @[Mux.scala 27:72]
Bus Buffer Update
2020-12-10 15:09:34 +08:00
lsu_imprecise_error_store_tag <= _T_4961 @[Mux.scala 27:72]
node _T_4962 = eq(io.tlu_busbuff.lsu_imprecise_error_store_any, UInt<1>("h00")) @[lsu_bus_buffer.scala 601:97]
node _T_4963 = and(io.dctl_busbuff.lsu_nonblock_load_data_error, _T_4962) @[lsu_bus_buffer.scala 601:95]
io.tlu_busbuff.lsu_imprecise_error_load_any <= _T_4963 @[lsu_bus_buffer.scala 601:47]
node _T_4964 = mux(io.tlu_busbuff.lsu_imprecise_error_store_any, buf_addr[lsu_imprecise_error_store_tag], buf_addr[io.dctl_busbuff.lsu_nonblock_load_data_tag]) @[lsu_bus_buffer.scala 602:53]
io.tlu_busbuff.lsu_imprecise_error_addr_any <= _T_4964 @[lsu_bus_buffer.scala 602:47]
lsu_bus_cntr_overflow <= UInt<1>("h00") @[lsu_bus_buffer.scala 603:25]
io.lsu_bus_idle_any <= UInt<1>("h01") @[lsu_bus_buffer.scala 605:23]
node _T_4965 = and(io.lsu_axi.aw.valid, io.lsu_axi.aw.ready) @[lsu_bus_buffer.scala 608:59]
node _T_4966 = and(io.lsu_axi.w.valid, io.lsu_axi.w.ready) @[lsu_bus_buffer.scala 608:104]
node _T_4967 = or(_T_4965, _T_4966) @[lsu_bus_buffer.scala 608:82]
node _T_4968 = and(io.lsu_axi.ar.valid, io.lsu_axi.ar.ready) @[lsu_bus_buffer.scala 608:149]
node _T_4969 = or(_T_4967, _T_4968) @[lsu_bus_buffer.scala 608:126]
io.tlu_busbuff.lsu_pmu_bus_trxn <= _T_4969 @[lsu_bus_buffer.scala 608:35]
node _T_4970 = and(io.lsu_busreq_r, io.ldst_dual_r) @[lsu_bus_buffer.scala 609:60]
node _T_4971 = and(_T_4970, io.lsu_commit_r) @[lsu_bus_buffer.scala 609:77]
io.tlu_busbuff.lsu_pmu_bus_misaligned <= _T_4971 @[lsu_bus_buffer.scala 609:41]
node _T_4972 = or(io.tlu_busbuff.lsu_imprecise_error_load_any, io.tlu_busbuff.lsu_imprecise_error_store_any) @[lsu_bus_buffer.scala 610:83]
io.tlu_busbuff.lsu_pmu_bus_error <= _T_4972 @[lsu_bus_buffer.scala 610:36]
node _T_4973 = eq(io.lsu_axi.aw.ready, UInt<1>("h00")) @[lsu_bus_buffer.scala 612:61]
node _T_4974 = and(io.lsu_axi.aw.valid, _T_4973) @[lsu_bus_buffer.scala 612:59]
node _T_4975 = eq(io.lsu_axi.w.ready, UInt<1>("h00")) @[lsu_bus_buffer.scala 612:107]
node _T_4976 = and(io.lsu_axi.w.valid, _T_4975) @[lsu_bus_buffer.scala 612:105]
node _T_4977 = or(_T_4974, _T_4976) @[lsu_bus_buffer.scala 612:83]
node _T_4978 = eq(io.lsu_axi.ar.ready, UInt<1>("h00")) @[lsu_bus_buffer.scala 612:153]
node _T_4979 = and(io.lsu_axi.ar.valid, _T_4978) @[lsu_bus_buffer.scala 612:151]
node _T_4980 = or(_T_4977, _T_4979) @[lsu_bus_buffer.scala 612:128]
io.tlu_busbuff.lsu_pmu_bus_busy <= _T_4980 @[lsu_bus_buffer.scala 612:35]
reg _T_4981 : UInt, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_buffer.scala 614:49]
_T_4981 <= WrPtr0_m @[lsu_bus_buffer.scala 614:49]
WrPtr0_r <= _T_4981 @[lsu_bus_buffer.scala 614:12]
reg _T_4982 : UInt, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_buffer.scala 615:49]
_T_4982 <= WrPtr1_m @[lsu_bus_buffer.scala 615:49]
WrPtr1_r <= _T_4982 @[lsu_bus_buffer.scala 615:12]
node _T_4983 = eq(io.flush_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 616:75]
node _T_4984 = and(io.lsu_busreq_m, _T_4983) @[lsu_bus_buffer.scala 616:73]
node _T_4985 = eq(io.ld_full_hit_m, UInt<1>("h00")) @[lsu_bus_buffer.scala 616:89]
node _T_4986 = and(_T_4984, _T_4985) @[lsu_bus_buffer.scala 616:87]
reg _T_4987 : UInt<1>, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_buffer.scala 616:56]
_T_4987 <= _T_4986 @[lsu_bus_buffer.scala 616:56]
io.lsu_busreq_r <= _T_4987 @[lsu_bus_buffer.scala 616:19]
reg _T_4988 : UInt<1>, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_buffer.scala 617:66]
_T_4988 <= io.dctl_busbuff.lsu_nonblock_load_valid_m @[lsu_bus_buffer.scala 617:66]
lsu_nonblock_load_valid_r <= _T_4988 @[lsu_bus_buffer.scala 617:29]
LSU with Bundling
2020-12-10 12:50:49 +08:00