77 lines
2.1 KiB
Makefile
77 lines
2.1 KiB
Makefile
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export RV_ROOT = ${PWD}/../..
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GDB_PREFIX = /opt/riscv/bin/riscv32-unknown-elf-gdb
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TEST_CFLAGS = -g -O3 -funroll-all-loops
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ABI = -mabi=ilp32 -march=rv32imc
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DEMODIR = ${PWD}
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BUILD_DIR = ${DEMODIR}/build
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RV_SOC = ${RV_ROOT}/quasar
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TEST = jtag
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ifdef debug
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DEBUG_PLUS = +dumpon
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VERILATOR_DEBUG = --trace
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endif
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LINK = $(DEMODIR)/link.ld
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# CFLAGS for verilator generated Makefiles. Without -std=c++11 it complains for `auto` variables
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CFLAGS += "-std=c++11"
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# Optimization for better performance; alternative is nothing for slower runtime (faster compiles)
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# -O2 for faster runtime (slower compiles), or -O for balance.
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VERILATOR_MAKE_FLAGS = OPT_FAST="-Os"
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# Targets
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all: clean verilator
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clean:
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rm -rf build obj_dir
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swerv_define :
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BUILD_PATH=${BUILD_DIR} PERLLIB=${RV_SOC} ${RV_SOC}/swerv.config -target=default -set iccm_enable
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##################### Verilog Builds #####################################
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verilator-build: swerv_define
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echo '`undef ASSERT_ON' >> ${BUILD_DIR}/common_defines.vh
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verilator --cc -CFLAGS ${CFLAGS} \
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$(BUILD_DIR)/common_defines.vh \
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-I${BUILD_DIR} \
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-Wno-UNOPTFLAT \
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-Wno-WIDTH \
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-Wno-LATCH \
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-Wno-IMPLICIT \
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-F ${RV_SOC}/soc_top.mk \
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-F ${RV_SOC}/soc_sim.mk \
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$(RV_SOC)/soc_sim.sv \
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--top-module soc_sim -exe test_soc_sim.cpp --autoflush $(VERILATOR_DEBUG)
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cp ${DEMODIR}/test_soc_sim.cpp obj_dir
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$(MAKE) -j -C obj_dir/ -f Vsoc_sim.mk $(VERILATOR_MAKE_FLAGS)
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##################### Simulation Runs #####################################
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verilator: program verilator-build
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cd build && ../obj_dir/Vsoc_sim ${DEBUG_PLUS}
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##################### Test hex Build #####################################
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program:
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@mkdir build
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@cp program.hex build/program.hex
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@cp jtag.bin build/jtag.bin
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##################### openocd #####################################
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openocd:
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openocd -f swerv.cfg
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gdb:
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$(GDB_PREFIX) -x gdbinit ./build/jtag.bin
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help:
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@echo Possible targets: verilator help clean all verilator-build program.hex
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.PHONY: help clean verilator
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