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2 bit divider
2021-01-06 12:32:46 +08:00
;buildInfoPackage: chisel3, version: 3.3.1, scalaVersion: 2.12.11, sbtVersion: 1.3.10
circuit exu_div_new_1bit_fullshortq :
module exu_div_cls :
input clock : Clock
input reset : Reset
output io : {flip operand : UInt<33>, cls : UInt<5>}
wire cls_zeros : UInt<5>
cls_zeros <= UInt<5>("h00")
wire cls_ones : UInt<5>
cls_ones <= UInt<5>("h00")
node _T = bits(io.operand, 31, 31) @[exu_div_ctl.scala 510:54]
node _T_1 = eq(_T, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_2 = bits(io.operand, 31, 30) @[exu_div_ctl.scala 510:54]
node _T_3 = eq(_T_2, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_4 = bits(io.operand, 31, 29) @[exu_div_ctl.scala 510:54]
node _T_5 = eq(_T_4, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_6 = bits(io.operand, 31, 28) @[exu_div_ctl.scala 510:54]
node _T_7 = eq(_T_6, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_8 = bits(io.operand, 31, 27) @[exu_div_ctl.scala 510:54]
node _T_9 = eq(_T_8, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_10 = bits(io.operand, 31, 26) @[exu_div_ctl.scala 510:54]
node _T_11 = eq(_T_10, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_12 = bits(io.operand, 31, 25) @[exu_div_ctl.scala 510:54]
node _T_13 = eq(_T_12, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_14 = bits(io.operand, 31, 24) @[exu_div_ctl.scala 510:54]
node _T_15 = eq(_T_14, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_16 = bits(io.operand, 31, 23) @[exu_div_ctl.scala 510:54]
node _T_17 = eq(_T_16, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_18 = bits(io.operand, 31, 22) @[exu_div_ctl.scala 510:54]
node _T_19 = eq(_T_18, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_20 = bits(io.operand, 31, 21) @[exu_div_ctl.scala 510:54]
node _T_21 = eq(_T_20, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_22 = bits(io.operand, 31, 20) @[exu_div_ctl.scala 510:54]
node _T_23 = eq(_T_22, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_24 = bits(io.operand, 31, 19) @[exu_div_ctl.scala 510:54]
node _T_25 = eq(_T_24, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_26 = bits(io.operand, 31, 18) @[exu_div_ctl.scala 510:54]
node _T_27 = eq(_T_26, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_28 = bits(io.operand, 31, 17) @[exu_div_ctl.scala 510:54]
node _T_29 = eq(_T_28, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_30 = bits(io.operand, 31, 16) @[exu_div_ctl.scala 510:54]
node _T_31 = eq(_T_30, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_32 = bits(io.operand, 31, 15) @[exu_div_ctl.scala 510:54]
node _T_33 = eq(_T_32, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_34 = bits(io.operand, 31, 14) @[exu_div_ctl.scala 510:54]
node _T_35 = eq(_T_34, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_36 = bits(io.operand, 31, 13) @[exu_div_ctl.scala 510:54]
node _T_37 = eq(_T_36, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_38 = bits(io.operand, 31, 12) @[exu_div_ctl.scala 510:54]
node _T_39 = eq(_T_38, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_40 = bits(io.operand, 31, 11) @[exu_div_ctl.scala 510:54]
node _T_41 = eq(_T_40, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_42 = bits(io.operand, 31, 10) @[exu_div_ctl.scala 510:54]
node _T_43 = eq(_T_42, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_44 = bits(io.operand, 31, 9) @[exu_div_ctl.scala 510:54]
node _T_45 = eq(_T_44, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_46 = bits(io.operand, 31, 8) @[exu_div_ctl.scala 510:54]
node _T_47 = eq(_T_46, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_48 = bits(io.operand, 31, 7) @[exu_div_ctl.scala 510:54]
node _T_49 = eq(_T_48, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_50 = bits(io.operand, 31, 6) @[exu_div_ctl.scala 510:54]
node _T_51 = eq(_T_50, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_52 = bits(io.operand, 31, 5) @[exu_div_ctl.scala 510:54]
node _T_53 = eq(_T_52, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_54 = bits(io.operand, 31, 4) @[exu_div_ctl.scala 510:54]
node _T_55 = eq(_T_54, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_56 = bits(io.operand, 31, 3) @[exu_div_ctl.scala 510:54]
node _T_57 = eq(_T_56, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_58 = bits(io.operand, 31, 2) @[exu_div_ctl.scala 510:54]
node _T_59 = eq(_T_58, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_60 = bits(io.operand, 31, 1) @[exu_div_ctl.scala 510:54]
node _T_61 = eq(_T_60, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_62 = bits(io.operand, 31, 0) @[exu_div_ctl.scala 510:54]
node _T_63 = eq(_T_62, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_64 = mux(_T_1, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_65 = mux(_T_3, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_66 = mux(_T_5, UInt<2>("h02"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_67 = mux(_T_7, UInt<2>("h03"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_68 = mux(_T_9, UInt<3>("h04"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_69 = mux(_T_11, UInt<3>("h05"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_70 = mux(_T_13, UInt<3>("h06"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_71 = mux(_T_15, UInt<3>("h07"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_72 = mux(_T_17, UInt<4>("h08"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_73 = mux(_T_19, UInt<4>("h09"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_74 = mux(_T_21, UInt<4>("h0a"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_75 = mux(_T_23, UInt<4>("h0b"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_76 = mux(_T_25, UInt<4>("h0c"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_77 = mux(_T_27, UInt<4>("h0d"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_78 = mux(_T_29, UInt<4>("h0e"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_79 = mux(_T_31, UInt<4>("h0f"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_80 = mux(_T_33, UInt<5>("h010"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_81 = mux(_T_35, UInt<5>("h011"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_82 = mux(_T_37, UInt<5>("h012"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_83 = mux(_T_39, UInt<5>("h013"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_84 = mux(_T_41, UInt<5>("h014"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_85 = mux(_T_43, UInt<5>("h015"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_86 = mux(_T_45, UInt<5>("h016"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_87 = mux(_T_47, UInt<5>("h017"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_88 = mux(_T_49, UInt<5>("h018"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_89 = mux(_T_51, UInt<5>("h019"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_90 = mux(_T_53, UInt<5>("h01a"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_91 = mux(_T_55, UInt<5>("h01b"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_92 = mux(_T_57, UInt<5>("h01c"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_93 = mux(_T_59, UInt<5>("h01d"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_94 = mux(_T_61, UInt<5>("h01e"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_95 = mux(_T_63, UInt<5>("h01f"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_96 = or(_T_64, _T_65) @[Mux.scala 27:72]
node _T_97 = or(_T_96, _T_66) @[Mux.scala 27:72]
node _T_98 = or(_T_97, _T_67) @[Mux.scala 27:72]
node _T_99 = or(_T_98, _T_68) @[Mux.scala 27:72]
node _T_100 = or(_T_99, _T_69) @[Mux.scala 27:72]
node _T_101 = or(_T_100, _T_70) @[Mux.scala 27:72]
node _T_102 = or(_T_101, _T_71) @[Mux.scala 27:72]
node _T_103 = or(_T_102, _T_72) @[Mux.scala 27:72]
node _T_104 = or(_T_103, _T_73) @[Mux.scala 27:72]
node _T_105 = or(_T_104, _T_74) @[Mux.scala 27:72]
node _T_106 = or(_T_105, _T_75) @[Mux.scala 27:72]
node _T_107 = or(_T_106, _T_76) @[Mux.scala 27:72]
node _T_108 = or(_T_107, _T_77) @[Mux.scala 27:72]
node _T_109 = or(_T_108, _T_78) @[Mux.scala 27:72]
node _T_110 = or(_T_109, _T_79) @[Mux.scala 27:72]
node _T_111 = or(_T_110, _T_80) @[Mux.scala 27:72]
node _T_112 = or(_T_111, _T_81) @[Mux.scala 27:72]
node _T_113 = or(_T_112, _T_82) @[Mux.scala 27:72]
node _T_114 = or(_T_113, _T_83) @[Mux.scala 27:72]
node _T_115 = or(_T_114, _T_84) @[Mux.scala 27:72]
node _T_116 = or(_T_115, _T_85) @[Mux.scala 27:72]
node _T_117 = or(_T_116, _T_86) @[Mux.scala 27:72]
node _T_118 = or(_T_117, _T_87) @[Mux.scala 27:72]
node _T_119 = or(_T_118, _T_88) @[Mux.scala 27:72]
node _T_120 = or(_T_119, _T_89) @[Mux.scala 27:72]
node _T_121 = or(_T_120, _T_90) @[Mux.scala 27:72]
node _T_122 = or(_T_121, _T_91) @[Mux.scala 27:72]
node _T_123 = or(_T_122, _T_92) @[Mux.scala 27:72]
node _T_124 = or(_T_123, _T_93) @[Mux.scala 27:72]
node _T_125 = or(_T_124, _T_94) @[Mux.scala 27:72]
node _T_126 = or(_T_125, _T_95) @[Mux.scala 27:72]
wire _T_127 : UInt<5> @[Mux.scala 27:72]
_T_127 <= _T_126 @[Mux.scala 27:72]
cls_zeros <= _T_127 @[exu_div_ctl.scala 510:13]
node _T_128 = bits(io.operand, 31, 0) @[exu_div_ctl.scala 512:18]
node _T_129 = eq(_T_128, UInt<32>("h0ffffffff")) @[exu_div_ctl.scala 512:25]
when _T_129 : @[exu_div_ctl.scala 512:44]
cls_ones <= UInt<5>("h01f") @[exu_div_ctl.scala 512:55]
skip @[exu_div_ctl.scala 512:44]
else : @[exu_div_ctl.scala 513:15]
node _T_130 = bits(io.operand, 31, 30) @[exu_div_ctl.scala 513:66]
node _T_131 = cat(UInt<1>("h01"), UInt<1>("h00")) @[Cat.scala 29:58]
node _T_132 = eq(_T_130, _T_131) @[exu_div_ctl.scala 513:76]
node _T_133 = bits(_T_132, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_134 = bits(io.operand, 31, 29) @[exu_div_ctl.scala 513:66]
node _T_135 = mux(UInt<1>("h01"), UInt<2>("h03"), UInt<2>("h00")) @[Bitwise.scala 72:12]
node _T_136 = cat(_T_135, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_137 = eq(_T_134, _T_136) @[exu_div_ctl.scala 513:76]
node _T_138 = bits(_T_137, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_139 = bits(io.operand, 31, 28) @[exu_div_ctl.scala 513:66]
node _T_140 = mux(UInt<1>("h01"), UInt<3>("h07"), UInt<3>("h00")) @[Bitwise.scala 72:12]
node _T_141 = cat(_T_140, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_142 = eq(_T_139, _T_141) @[exu_div_ctl.scala 513:76]
node _T_143 = bits(_T_142, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_144 = bits(io.operand, 31, 27) @[exu_div_ctl.scala 513:66]
node _T_145 = mux(UInt<1>("h01"), UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12]
node _T_146 = cat(_T_145, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_147 = eq(_T_144, _T_146) @[exu_div_ctl.scala 513:76]
node _T_148 = bits(_T_147, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_149 = bits(io.operand, 31, 26) @[exu_div_ctl.scala 513:66]
node _T_150 = mux(UInt<1>("h01"), UInt<5>("h01f"), UInt<5>("h00")) @[Bitwise.scala 72:12]
node _T_151 = cat(_T_150, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_152 = eq(_T_149, _T_151) @[exu_div_ctl.scala 513:76]
node _T_153 = bits(_T_152, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_154 = bits(io.operand, 31, 25) @[exu_div_ctl.scala 513:66]
node _T_155 = mux(UInt<1>("h01"), UInt<6>("h03f"), UInt<6>("h00")) @[Bitwise.scala 72:12]
node _T_156 = cat(_T_155, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_157 = eq(_T_154, _T_156) @[exu_div_ctl.scala 513:76]
node _T_158 = bits(_T_157, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_159 = bits(io.operand, 31, 24) @[exu_div_ctl.scala 513:66]
node _T_160 = mux(UInt<1>("h01"), UInt<7>("h07f"), UInt<7>("h00")) @[Bitwise.scala 72:12]
node _T_161 = cat(_T_160, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_162 = eq(_T_159, _T_161) @[exu_div_ctl.scala 513:76]
node _T_163 = bits(_T_162, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_164 = bits(io.operand, 31, 23) @[exu_div_ctl.scala 513:66]
node _T_165 = mux(UInt<1>("h01"), UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_166 = cat(_T_165, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_167 = eq(_T_164, _T_166) @[exu_div_ctl.scala 513:76]
node _T_168 = bits(_T_167, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_169 = bits(io.operand, 31, 22) @[exu_div_ctl.scala 513:66]
node _T_170 = mux(UInt<1>("h01"), UInt<9>("h01ff"), UInt<9>("h00")) @[Bitwise.scala 72:12]
node _T_171 = cat(_T_170, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_172 = eq(_T_169, _T_171) @[exu_div_ctl.scala 513:76]
node _T_173 = bits(_T_172, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_174 = bits(io.operand, 31, 21) @[exu_div_ctl.scala 513:66]
node _T_175 = mux(UInt<1>("h01"), UInt<10>("h03ff"), UInt<10>("h00")) @[Bitwise.scala 72:12]
node _T_176 = cat(_T_175, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_177 = eq(_T_174, _T_176) @[exu_div_ctl.scala 513:76]
node _T_178 = bits(_T_177, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_179 = bits(io.operand, 31, 20) @[exu_div_ctl.scala 513:66]
node _T_180 = mux(UInt<1>("h01"), UInt<11>("h07ff"), UInt<11>("h00")) @[Bitwise.scala 72:12]
node _T_181 = cat(_T_180, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_182 = eq(_T_179, _T_181) @[exu_div_ctl.scala 513:76]
node _T_183 = bits(_T_182, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_184 = bits(io.operand, 31, 19) @[exu_div_ctl.scala 513:66]
node _T_185 = mux(UInt<1>("h01"), UInt<12>("h0fff"), UInt<12>("h00")) @[Bitwise.scala 72:12]
node _T_186 = cat(_T_185, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_187 = eq(_T_184, _T_186) @[exu_div_ctl.scala 513:76]
node _T_188 = bits(_T_187, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_189 = bits(io.operand, 31, 18) @[exu_div_ctl.scala 513:66]
node _T_190 = mux(UInt<1>("h01"), UInt<13>("h01fff"), UInt<13>("h00")) @[Bitwise.scala 72:12]
node _T_191 = cat(_T_190, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_192 = eq(_T_189, _T_191) @[exu_div_ctl.scala 513:76]
node _T_193 = bits(_T_192, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_194 = bits(io.operand, 31, 17) @[exu_div_ctl.scala 513:66]
node _T_195 = mux(UInt<1>("h01"), UInt<14>("h03fff"), UInt<14>("h00")) @[Bitwise.scala 72:12]
node _T_196 = cat(_T_195, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_197 = eq(_T_194, _T_196) @[exu_div_ctl.scala 513:76]
node _T_198 = bits(_T_197, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_199 = bits(io.operand, 31, 16) @[exu_div_ctl.scala 513:66]
node _T_200 = mux(UInt<1>("h01"), UInt<15>("h07fff"), UInt<15>("h00")) @[Bitwise.scala 72:12]
node _T_201 = cat(_T_200, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_202 = eq(_T_199, _T_201) @[exu_div_ctl.scala 513:76]
node _T_203 = bits(_T_202, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_204 = bits(io.operand, 31, 15) @[exu_div_ctl.scala 513:66]
node _T_205 = mux(UInt<1>("h01"), UInt<16>("h0ffff"), UInt<16>("h00")) @[Bitwise.scala 72:12]
node _T_206 = cat(_T_205, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_207 = eq(_T_204, _T_206) @[exu_div_ctl.scala 513:76]
node _T_208 = bits(_T_207, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_209 = bits(io.operand, 31, 14) @[exu_div_ctl.scala 513:66]
node _T_210 = mux(UInt<1>("h01"), UInt<17>("h01ffff"), UInt<17>("h00")) @[Bitwise.scala 72:12]
node _T_211 = cat(_T_210, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_212 = eq(_T_209, _T_211) @[exu_div_ctl.scala 513:76]
node _T_213 = bits(_T_212, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_214 = bits(io.operand, 31, 13) @[exu_div_ctl.scala 513:66]
node _T_215 = mux(UInt<1>("h01"), UInt<18>("h03ffff"), UInt<18>("h00")) @[Bitwise.scala 72:12]
node _T_216 = cat(_T_215, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_217 = eq(_T_214, _T_216) @[exu_div_ctl.scala 513:76]
node _T_218 = bits(_T_217, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_219 = bits(io.operand, 31, 12) @[exu_div_ctl.scala 513:66]
node _T_220 = mux(UInt<1>("h01"), UInt<19>("h07ffff"), UInt<19>("h00")) @[Bitwise.scala 72:12]
node _T_221 = cat(_T_220, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_222 = eq(_T_219, _T_221) @[exu_div_ctl.scala 513:76]
node _T_223 = bits(_T_222, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_224 = bits(io.operand, 31, 11) @[exu_div_ctl.scala 513:66]
node _T_225 = mux(UInt<1>("h01"), UInt<20>("h0fffff"), UInt<20>("h00")) @[Bitwise.scala 72:12]
node _T_226 = cat(_T_225, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_227 = eq(_T_224, _T_226) @[exu_div_ctl.scala 513:76]
node _T_228 = bits(_T_227, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_229 = bits(io.operand, 31, 10) @[exu_div_ctl.scala 513:66]
node _T_230 = mux(UInt<1>("h01"), UInt<21>("h01fffff"), UInt<21>("h00")) @[Bitwise.scala 72:12]
node _T_231 = cat(_T_230, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_232 = eq(_T_229, _T_231) @[exu_div_ctl.scala 513:76]
node _T_233 = bits(_T_232, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_234 = bits(io.operand, 31, 9) @[exu_div_ctl.scala 513:66]
node _T_235 = mux(UInt<1>("h01"), UInt<22>("h03fffff"), UInt<22>("h00")) @[Bitwise.scala 72:12]
node _T_236 = cat(_T_235, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_237 = eq(_T_234, _T_236) @[exu_div_ctl.scala 513:76]
node _T_238 = bits(_T_237, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_239 = bits(io.operand, 31, 8) @[exu_div_ctl.scala 513:66]
node _T_240 = mux(UInt<1>("h01"), UInt<23>("h07fffff"), UInt<23>("h00")) @[Bitwise.scala 72:12]
node _T_241 = cat(_T_240, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_242 = eq(_T_239, _T_241) @[exu_div_ctl.scala 513:76]
node _T_243 = bits(_T_242, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_244 = bits(io.operand, 31, 7) @[exu_div_ctl.scala 513:66]
node _T_245 = mux(UInt<1>("h01"), UInt<24>("h0ffffff"), UInt<24>("h00")) @[Bitwise.scala 72:12]
node _T_246 = cat(_T_245, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_247 = eq(_T_244, _T_246) @[exu_div_ctl.scala 513:76]
node _T_248 = bits(_T_247, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_249 = bits(io.operand, 31, 6) @[exu_div_ctl.scala 513:66]
node _T_250 = mux(UInt<1>("h01"), UInt<25>("h01ffffff"), UInt<25>("h00")) @[Bitwise.scala 72:12]
node _T_251 = cat(_T_250, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_252 = eq(_T_249, _T_251) @[exu_div_ctl.scala 513:76]
node _T_253 = bits(_T_252, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_254 = bits(io.operand, 31, 5) @[exu_div_ctl.scala 513:66]
node _T_255 = mux(UInt<1>("h01"), UInt<26>("h03ffffff"), UInt<26>("h00")) @[Bitwise.scala 72:12]
node _T_256 = cat(_T_255, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_257 = eq(_T_254, _T_256) @[exu_div_ctl.scala 513:76]
node _T_258 = bits(_T_257, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_259 = bits(io.operand, 31, 4) @[exu_div_ctl.scala 513:66]
node _T_260 = mux(UInt<1>("h01"), UInt<27>("h07ffffff"), UInt<27>("h00")) @[Bitwise.scala 72:12]
node _T_261 = cat(_T_260, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_262 = eq(_T_259, _T_261) @[exu_div_ctl.scala 513:76]
node _T_263 = bits(_T_262, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_264 = bits(io.operand, 31, 3) @[exu_div_ctl.scala 513:66]
node _T_265 = mux(UInt<1>("h01"), UInt<28>("h0fffffff"), UInt<28>("h00")) @[Bitwise.scala 72:12]
node _T_266 = cat(_T_265, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_267 = eq(_T_264, _T_266) @[exu_div_ctl.scala 513:76]
node _T_268 = bits(_T_267, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_269 = bits(io.operand, 31, 2) @[exu_div_ctl.scala 513:66]
node _T_270 = mux(UInt<1>("h01"), UInt<29>("h01fffffff"), UInt<29>("h00")) @[Bitwise.scala 72:12]
node _T_271 = cat(_T_270, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_272 = eq(_T_269, _T_271) @[exu_div_ctl.scala 513:76]
node _T_273 = bits(_T_272, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_274 = bits(io.operand, 31, 1) @[exu_div_ctl.scala 513:66]
node _T_275 = mux(UInt<1>("h01"), UInt<30>("h03fffffff"), UInt<30>("h00")) @[Bitwise.scala 72:12]
node _T_276 = cat(_T_275, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_277 = eq(_T_274, _T_276) @[exu_div_ctl.scala 513:76]
node _T_278 = bits(_T_277, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_279 = bits(io.operand, 31, 0) @[exu_div_ctl.scala 513:66]
node _T_280 = mux(UInt<1>("h01"), UInt<31>("h07fffffff"), UInt<31>("h00")) @[Bitwise.scala 72:12]
node _T_281 = cat(_T_280, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_282 = eq(_T_279, _T_281) @[exu_div_ctl.scala 513:76]
node _T_283 = bits(_T_282, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_284 = mux(_T_133, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_285 = mux(_T_138, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_286 = mux(_T_143, UInt<2>("h02"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_287 = mux(_T_148, UInt<2>("h03"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_288 = mux(_T_153, UInt<3>("h04"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_289 = mux(_T_158, UInt<3>("h05"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_290 = mux(_T_163, UInt<3>("h06"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_291 = mux(_T_168, UInt<3>("h07"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_292 = mux(_T_173, UInt<4>("h08"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_293 = mux(_T_178, UInt<4>("h09"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_294 = mux(_T_183, UInt<4>("h0a"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_295 = mux(_T_188, UInt<4>("h0b"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_296 = mux(_T_193, UInt<4>("h0c"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_297 = mux(_T_198, UInt<4>("h0d"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_298 = mux(_T_203, UInt<4>("h0e"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_299 = mux(_T_208, UInt<4>("h0f"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_300 = mux(_T_213, UInt<5>("h010"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_301 = mux(_T_218, UInt<5>("h011"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_302 = mux(_T_223, UInt<5>("h012"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_303 = mux(_T_228, UInt<5>("h013"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_304 = mux(_T_233, UInt<5>("h014"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_305 = mux(_T_238, UInt<5>("h015"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_306 = mux(_T_243, UInt<5>("h016"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_307 = mux(_T_248, UInt<5>("h017"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_308 = mux(_T_253, UInt<5>("h018"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_309 = mux(_T_258, UInt<5>("h019"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_310 = mux(_T_263, UInt<5>("h01a"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_311 = mux(_T_268, UInt<5>("h01b"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_312 = mux(_T_273, UInt<5>("h01c"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_313 = mux(_T_278, UInt<5>("h01d"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_314 = mux(_T_283, UInt<5>("h01e"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_315 = or(_T_284, _T_285) @[Mux.scala 27:72]
node _T_316 = or(_T_315, _T_286) @[Mux.scala 27:72]
node _T_317 = or(_T_316, _T_287) @[Mux.scala 27:72]
node _T_318 = or(_T_317, _T_288) @[Mux.scala 27:72]
node _T_319 = or(_T_318, _T_289) @[Mux.scala 27:72]
node _T_320 = or(_T_319, _T_290) @[Mux.scala 27:72]
node _T_321 = or(_T_320, _T_291) @[Mux.scala 27:72]
node _T_322 = or(_T_321, _T_292) @[Mux.scala 27:72]
node _T_323 = or(_T_322, _T_293) @[Mux.scala 27:72]
node _T_324 = or(_T_323, _T_294) @[Mux.scala 27:72]
node _T_325 = or(_T_324, _T_295) @[Mux.scala 27:72]
node _T_326 = or(_T_325, _T_296) @[Mux.scala 27:72]
node _T_327 = or(_T_326, _T_297) @[Mux.scala 27:72]
node _T_328 = or(_T_327, _T_298) @[Mux.scala 27:72]
node _T_329 = or(_T_328, _T_299) @[Mux.scala 27:72]
node _T_330 = or(_T_329, _T_300) @[Mux.scala 27:72]
node _T_331 = or(_T_330, _T_301) @[Mux.scala 27:72]
node _T_332 = or(_T_331, _T_302) @[Mux.scala 27:72]
node _T_333 = or(_T_332, _T_303) @[Mux.scala 27:72]
node _T_334 = or(_T_333, _T_304) @[Mux.scala 27:72]
node _T_335 = or(_T_334, _T_305) @[Mux.scala 27:72]
node _T_336 = or(_T_335, _T_306) @[Mux.scala 27:72]
node _T_337 = or(_T_336, _T_307) @[Mux.scala 27:72]
node _T_338 = or(_T_337, _T_308) @[Mux.scala 27:72]
node _T_339 = or(_T_338, _T_309) @[Mux.scala 27:72]
node _T_340 = or(_T_339, _T_310) @[Mux.scala 27:72]
node _T_341 = or(_T_340, _T_311) @[Mux.scala 27:72]
node _T_342 = or(_T_341, _T_312) @[Mux.scala 27:72]
node _T_343 = or(_T_342, _T_313) @[Mux.scala 27:72]
node _T_344 = or(_T_343, _T_314) @[Mux.scala 27:72]
wire _T_345 : UInt<5> @[Mux.scala 27:72]
_T_345 <= _T_344 @[Mux.scala 27:72]
cls_ones <= _T_345 @[exu_div_ctl.scala 513:25]
skip @[exu_div_ctl.scala 513:15]
node _T_346 = bits(io.operand, 32, 32) @[exu_div_ctl.scala 514:27]
node _T_347 = mux(_T_346, cls_ones, cls_zeros) @[exu_div_ctl.scala 514:16]
io.cls <= _T_347 @[exu_div_ctl.scala 514:10]
module exu_div_cls_1 :
input clock : Clock
input reset : Reset
output io : {flip operand : UInt<33>, cls : UInt<5>}
wire cls_zeros : UInt<5>
cls_zeros <= UInt<5>("h00")
wire cls_ones : UInt<5>
cls_ones <= UInt<5>("h00")
node _T = bits(io.operand, 31, 31) @[exu_div_ctl.scala 510:54]
node _T_1 = eq(_T, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_2 = bits(io.operand, 31, 30) @[exu_div_ctl.scala 510:54]
node _T_3 = eq(_T_2, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_4 = bits(io.operand, 31, 29) @[exu_div_ctl.scala 510:54]
node _T_5 = eq(_T_4, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_6 = bits(io.operand, 31, 28) @[exu_div_ctl.scala 510:54]
node _T_7 = eq(_T_6, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_8 = bits(io.operand, 31, 27) @[exu_div_ctl.scala 510:54]
node _T_9 = eq(_T_8, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_10 = bits(io.operand, 31, 26) @[exu_div_ctl.scala 510:54]
node _T_11 = eq(_T_10, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_12 = bits(io.operand, 31, 25) @[exu_div_ctl.scala 510:54]
node _T_13 = eq(_T_12, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_14 = bits(io.operand, 31, 24) @[exu_div_ctl.scala 510:54]
node _T_15 = eq(_T_14, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_16 = bits(io.operand, 31, 23) @[exu_div_ctl.scala 510:54]
node _T_17 = eq(_T_16, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_18 = bits(io.operand, 31, 22) @[exu_div_ctl.scala 510:54]
node _T_19 = eq(_T_18, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_20 = bits(io.operand, 31, 21) @[exu_div_ctl.scala 510:54]
node _T_21 = eq(_T_20, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_22 = bits(io.operand, 31, 20) @[exu_div_ctl.scala 510:54]
node _T_23 = eq(_T_22, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_24 = bits(io.operand, 31, 19) @[exu_div_ctl.scala 510:54]
node _T_25 = eq(_T_24, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_26 = bits(io.operand, 31, 18) @[exu_div_ctl.scala 510:54]
node _T_27 = eq(_T_26, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_28 = bits(io.operand, 31, 17) @[exu_div_ctl.scala 510:54]
node _T_29 = eq(_T_28, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_30 = bits(io.operand, 31, 16) @[exu_div_ctl.scala 510:54]
node _T_31 = eq(_T_30, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_32 = bits(io.operand, 31, 15) @[exu_div_ctl.scala 510:54]
node _T_33 = eq(_T_32, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_34 = bits(io.operand, 31, 14) @[exu_div_ctl.scala 510:54]
node _T_35 = eq(_T_34, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_36 = bits(io.operand, 31, 13) @[exu_div_ctl.scala 510:54]
node _T_37 = eq(_T_36, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_38 = bits(io.operand, 31, 12) @[exu_div_ctl.scala 510:54]
node _T_39 = eq(_T_38, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_40 = bits(io.operand, 31, 11) @[exu_div_ctl.scala 510:54]
node _T_41 = eq(_T_40, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_42 = bits(io.operand, 31, 10) @[exu_div_ctl.scala 510:54]
node _T_43 = eq(_T_42, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_44 = bits(io.operand, 31, 9) @[exu_div_ctl.scala 510:54]
node _T_45 = eq(_T_44, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_46 = bits(io.operand, 31, 8) @[exu_div_ctl.scala 510:54]
node _T_47 = eq(_T_46, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_48 = bits(io.operand, 31, 7) @[exu_div_ctl.scala 510:54]
node _T_49 = eq(_T_48, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_50 = bits(io.operand, 31, 6) @[exu_div_ctl.scala 510:54]
node _T_51 = eq(_T_50, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_52 = bits(io.operand, 31, 5) @[exu_div_ctl.scala 510:54]
node _T_53 = eq(_T_52, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_54 = bits(io.operand, 31, 4) @[exu_div_ctl.scala 510:54]
node _T_55 = eq(_T_54, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_56 = bits(io.operand, 31, 3) @[exu_div_ctl.scala 510:54]
node _T_57 = eq(_T_56, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_58 = bits(io.operand, 31, 2) @[exu_div_ctl.scala 510:54]
node _T_59 = eq(_T_58, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_60 = bits(io.operand, 31, 1) @[exu_div_ctl.scala 510:54]
node _T_61 = eq(_T_60, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_62 = bits(io.operand, 31, 0) @[exu_div_ctl.scala 510:54]
node _T_63 = eq(_T_62, UInt<1>("h01")) @[exu_div_ctl.scala 510:63]
node _T_64 = mux(_T_1, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_65 = mux(_T_3, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_66 = mux(_T_5, UInt<2>("h02"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_67 = mux(_T_7, UInt<2>("h03"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_68 = mux(_T_9, UInt<3>("h04"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_69 = mux(_T_11, UInt<3>("h05"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_70 = mux(_T_13, UInt<3>("h06"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_71 = mux(_T_15, UInt<3>("h07"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_72 = mux(_T_17, UInt<4>("h08"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_73 = mux(_T_19, UInt<4>("h09"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_74 = mux(_T_21, UInt<4>("h0a"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_75 = mux(_T_23, UInt<4>("h0b"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_76 = mux(_T_25, UInt<4>("h0c"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_77 = mux(_T_27, UInt<4>("h0d"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_78 = mux(_T_29, UInt<4>("h0e"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_79 = mux(_T_31, UInt<4>("h0f"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_80 = mux(_T_33, UInt<5>("h010"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_81 = mux(_T_35, UInt<5>("h011"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_82 = mux(_T_37, UInt<5>("h012"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_83 = mux(_T_39, UInt<5>("h013"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_84 = mux(_T_41, UInt<5>("h014"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_85 = mux(_T_43, UInt<5>("h015"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_86 = mux(_T_45, UInt<5>("h016"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_87 = mux(_T_47, UInt<5>("h017"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_88 = mux(_T_49, UInt<5>("h018"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_89 = mux(_T_51, UInt<5>("h019"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_90 = mux(_T_53, UInt<5>("h01a"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_91 = mux(_T_55, UInt<5>("h01b"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_92 = mux(_T_57, UInt<5>("h01c"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_93 = mux(_T_59, UInt<5>("h01d"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_94 = mux(_T_61, UInt<5>("h01e"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_95 = mux(_T_63, UInt<5>("h01f"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_96 = or(_T_64, _T_65) @[Mux.scala 27:72]
node _T_97 = or(_T_96, _T_66) @[Mux.scala 27:72]
node _T_98 = or(_T_97, _T_67) @[Mux.scala 27:72]
node _T_99 = or(_T_98, _T_68) @[Mux.scala 27:72]
node _T_100 = or(_T_99, _T_69) @[Mux.scala 27:72]
node _T_101 = or(_T_100, _T_70) @[Mux.scala 27:72]
node _T_102 = or(_T_101, _T_71) @[Mux.scala 27:72]
node _T_103 = or(_T_102, _T_72) @[Mux.scala 27:72]
node _T_104 = or(_T_103, _T_73) @[Mux.scala 27:72]
node _T_105 = or(_T_104, _T_74) @[Mux.scala 27:72]
node _T_106 = or(_T_105, _T_75) @[Mux.scala 27:72]
node _T_107 = or(_T_106, _T_76) @[Mux.scala 27:72]
node _T_108 = or(_T_107, _T_77) @[Mux.scala 27:72]
node _T_109 = or(_T_108, _T_78) @[Mux.scala 27:72]
node _T_110 = or(_T_109, _T_79) @[Mux.scala 27:72]
node _T_111 = or(_T_110, _T_80) @[Mux.scala 27:72]
node _T_112 = or(_T_111, _T_81) @[Mux.scala 27:72]
node _T_113 = or(_T_112, _T_82) @[Mux.scala 27:72]
node _T_114 = or(_T_113, _T_83) @[Mux.scala 27:72]
node _T_115 = or(_T_114, _T_84) @[Mux.scala 27:72]
node _T_116 = or(_T_115, _T_85) @[Mux.scala 27:72]
node _T_117 = or(_T_116, _T_86) @[Mux.scala 27:72]
node _T_118 = or(_T_117, _T_87) @[Mux.scala 27:72]
node _T_119 = or(_T_118, _T_88) @[Mux.scala 27:72]
node _T_120 = or(_T_119, _T_89) @[Mux.scala 27:72]
node _T_121 = or(_T_120, _T_90) @[Mux.scala 27:72]
node _T_122 = or(_T_121, _T_91) @[Mux.scala 27:72]
node _T_123 = or(_T_122, _T_92) @[Mux.scala 27:72]
node _T_124 = or(_T_123, _T_93) @[Mux.scala 27:72]
node _T_125 = or(_T_124, _T_94) @[Mux.scala 27:72]
node _T_126 = or(_T_125, _T_95) @[Mux.scala 27:72]
wire _T_127 : UInt<5> @[Mux.scala 27:72]
_T_127 <= _T_126 @[Mux.scala 27:72]
cls_zeros <= _T_127 @[exu_div_ctl.scala 510:13]
node _T_128 = bits(io.operand, 31, 0) @[exu_div_ctl.scala 512:18]
node _T_129 = eq(_T_128, UInt<32>("h0ffffffff")) @[exu_div_ctl.scala 512:25]
when _T_129 : @[exu_div_ctl.scala 512:44]
cls_ones <= UInt<5>("h01f") @[exu_div_ctl.scala 512:55]
skip @[exu_div_ctl.scala 512:44]
else : @[exu_div_ctl.scala 513:15]
node _T_130 = bits(io.operand, 31, 30) @[exu_div_ctl.scala 513:66]
node _T_131 = cat(UInt<1>("h01"), UInt<1>("h00")) @[Cat.scala 29:58]
node _T_132 = eq(_T_130, _T_131) @[exu_div_ctl.scala 513:76]
node _T_133 = bits(_T_132, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_134 = bits(io.operand, 31, 29) @[exu_div_ctl.scala 513:66]
node _T_135 = mux(UInt<1>("h01"), UInt<2>("h03"), UInt<2>("h00")) @[Bitwise.scala 72:12]
node _T_136 = cat(_T_135, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_137 = eq(_T_134, _T_136) @[exu_div_ctl.scala 513:76]
node _T_138 = bits(_T_137, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_139 = bits(io.operand, 31, 28) @[exu_div_ctl.scala 513:66]
node _T_140 = mux(UInt<1>("h01"), UInt<3>("h07"), UInt<3>("h00")) @[Bitwise.scala 72:12]
node _T_141 = cat(_T_140, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_142 = eq(_T_139, _T_141) @[exu_div_ctl.scala 513:76]
node _T_143 = bits(_T_142, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_144 = bits(io.operand, 31, 27) @[exu_div_ctl.scala 513:66]
node _T_145 = mux(UInt<1>("h01"), UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12]
node _T_146 = cat(_T_145, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_147 = eq(_T_144, _T_146) @[exu_div_ctl.scala 513:76]
node _T_148 = bits(_T_147, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_149 = bits(io.operand, 31, 26) @[exu_div_ctl.scala 513:66]
node _T_150 = mux(UInt<1>("h01"), UInt<5>("h01f"), UInt<5>("h00")) @[Bitwise.scala 72:12]
node _T_151 = cat(_T_150, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_152 = eq(_T_149, _T_151) @[exu_div_ctl.scala 513:76]
node _T_153 = bits(_T_152, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_154 = bits(io.operand, 31, 25) @[exu_div_ctl.scala 513:66]
node _T_155 = mux(UInt<1>("h01"), UInt<6>("h03f"), UInt<6>("h00")) @[Bitwise.scala 72:12]
node _T_156 = cat(_T_155, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_157 = eq(_T_154, _T_156) @[exu_div_ctl.scala 513:76]
node _T_158 = bits(_T_157, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_159 = bits(io.operand, 31, 24) @[exu_div_ctl.scala 513:66]
node _T_160 = mux(UInt<1>("h01"), UInt<7>("h07f"), UInt<7>("h00")) @[Bitwise.scala 72:12]
node _T_161 = cat(_T_160, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_162 = eq(_T_159, _T_161) @[exu_div_ctl.scala 513:76]
node _T_163 = bits(_T_162, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_164 = bits(io.operand, 31, 23) @[exu_div_ctl.scala 513:66]
node _T_165 = mux(UInt<1>("h01"), UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_166 = cat(_T_165, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_167 = eq(_T_164, _T_166) @[exu_div_ctl.scala 513:76]
node _T_168 = bits(_T_167, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_169 = bits(io.operand, 31, 22) @[exu_div_ctl.scala 513:66]
node _T_170 = mux(UInt<1>("h01"), UInt<9>("h01ff"), UInt<9>("h00")) @[Bitwise.scala 72:12]
node _T_171 = cat(_T_170, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_172 = eq(_T_169, _T_171) @[exu_div_ctl.scala 513:76]
node _T_173 = bits(_T_172, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_174 = bits(io.operand, 31, 21) @[exu_div_ctl.scala 513:66]
node _T_175 = mux(UInt<1>("h01"), UInt<10>("h03ff"), UInt<10>("h00")) @[Bitwise.scala 72:12]
node _T_176 = cat(_T_175, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_177 = eq(_T_174, _T_176) @[exu_div_ctl.scala 513:76]
node _T_178 = bits(_T_177, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_179 = bits(io.operand, 31, 20) @[exu_div_ctl.scala 513:66]
node _T_180 = mux(UInt<1>("h01"), UInt<11>("h07ff"), UInt<11>("h00")) @[Bitwise.scala 72:12]
node _T_181 = cat(_T_180, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_182 = eq(_T_179, _T_181) @[exu_div_ctl.scala 513:76]
node _T_183 = bits(_T_182, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_184 = bits(io.operand, 31, 19) @[exu_div_ctl.scala 513:66]
node _T_185 = mux(UInt<1>("h01"), UInt<12>("h0fff"), UInt<12>("h00")) @[Bitwise.scala 72:12]
node _T_186 = cat(_T_185, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_187 = eq(_T_184, _T_186) @[exu_div_ctl.scala 513:76]
node _T_188 = bits(_T_187, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_189 = bits(io.operand, 31, 18) @[exu_div_ctl.scala 513:66]
node _T_190 = mux(UInt<1>("h01"), UInt<13>("h01fff"), UInt<13>("h00")) @[Bitwise.scala 72:12]
node _T_191 = cat(_T_190, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_192 = eq(_T_189, _T_191) @[exu_div_ctl.scala 513:76]
node _T_193 = bits(_T_192, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_194 = bits(io.operand, 31, 17) @[exu_div_ctl.scala 513:66]
node _T_195 = mux(UInt<1>("h01"), UInt<14>("h03fff"), UInt<14>("h00")) @[Bitwise.scala 72:12]
node _T_196 = cat(_T_195, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_197 = eq(_T_194, _T_196) @[exu_div_ctl.scala 513:76]
node _T_198 = bits(_T_197, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_199 = bits(io.operand, 31, 16) @[exu_div_ctl.scala 513:66]
node _T_200 = mux(UInt<1>("h01"), UInt<15>("h07fff"), UInt<15>("h00")) @[Bitwise.scala 72:12]
node _T_201 = cat(_T_200, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_202 = eq(_T_199, _T_201) @[exu_div_ctl.scala 513:76]
node _T_203 = bits(_T_202, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_204 = bits(io.operand, 31, 15) @[exu_div_ctl.scala 513:66]
node _T_205 = mux(UInt<1>("h01"), UInt<16>("h0ffff"), UInt<16>("h00")) @[Bitwise.scala 72:12]
node _T_206 = cat(_T_205, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_207 = eq(_T_204, _T_206) @[exu_div_ctl.scala 513:76]
node _T_208 = bits(_T_207, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_209 = bits(io.operand, 31, 14) @[exu_div_ctl.scala 513:66]
node _T_210 = mux(UInt<1>("h01"), UInt<17>("h01ffff"), UInt<17>("h00")) @[Bitwise.scala 72:12]
node _T_211 = cat(_T_210, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_212 = eq(_T_209, _T_211) @[exu_div_ctl.scala 513:76]
node _T_213 = bits(_T_212, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_214 = bits(io.operand, 31, 13) @[exu_div_ctl.scala 513:66]
node _T_215 = mux(UInt<1>("h01"), UInt<18>("h03ffff"), UInt<18>("h00")) @[Bitwise.scala 72:12]
node _T_216 = cat(_T_215, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_217 = eq(_T_214, _T_216) @[exu_div_ctl.scala 513:76]
node _T_218 = bits(_T_217, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_219 = bits(io.operand, 31, 12) @[exu_div_ctl.scala 513:66]
node _T_220 = mux(UInt<1>("h01"), UInt<19>("h07ffff"), UInt<19>("h00")) @[Bitwise.scala 72:12]
node _T_221 = cat(_T_220, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_222 = eq(_T_219, _T_221) @[exu_div_ctl.scala 513:76]
node _T_223 = bits(_T_222, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_224 = bits(io.operand, 31, 11) @[exu_div_ctl.scala 513:66]
node _T_225 = mux(UInt<1>("h01"), UInt<20>("h0fffff"), UInt<20>("h00")) @[Bitwise.scala 72:12]
node _T_226 = cat(_T_225, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_227 = eq(_T_224, _T_226) @[exu_div_ctl.scala 513:76]
node _T_228 = bits(_T_227, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_229 = bits(io.operand, 31, 10) @[exu_div_ctl.scala 513:66]
node _T_230 = mux(UInt<1>("h01"), UInt<21>("h01fffff"), UInt<21>("h00")) @[Bitwise.scala 72:12]
node _T_231 = cat(_T_230, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_232 = eq(_T_229, _T_231) @[exu_div_ctl.scala 513:76]
node _T_233 = bits(_T_232, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_234 = bits(io.operand, 31, 9) @[exu_div_ctl.scala 513:66]
node _T_235 = mux(UInt<1>("h01"), UInt<22>("h03fffff"), UInt<22>("h00")) @[Bitwise.scala 72:12]
node _T_236 = cat(_T_235, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_237 = eq(_T_234, _T_236) @[exu_div_ctl.scala 513:76]
node _T_238 = bits(_T_237, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_239 = bits(io.operand, 31, 8) @[exu_div_ctl.scala 513:66]
node _T_240 = mux(UInt<1>("h01"), UInt<23>("h07fffff"), UInt<23>("h00")) @[Bitwise.scala 72:12]
node _T_241 = cat(_T_240, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_242 = eq(_T_239, _T_241) @[exu_div_ctl.scala 513:76]
node _T_243 = bits(_T_242, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_244 = bits(io.operand, 31, 7) @[exu_div_ctl.scala 513:66]
node _T_245 = mux(UInt<1>("h01"), UInt<24>("h0ffffff"), UInt<24>("h00")) @[Bitwise.scala 72:12]
node _T_246 = cat(_T_245, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_247 = eq(_T_244, _T_246) @[exu_div_ctl.scala 513:76]
node _T_248 = bits(_T_247, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_249 = bits(io.operand, 31, 6) @[exu_div_ctl.scala 513:66]
node _T_250 = mux(UInt<1>("h01"), UInt<25>("h01ffffff"), UInt<25>("h00")) @[Bitwise.scala 72:12]
node _T_251 = cat(_T_250, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_252 = eq(_T_249, _T_251) @[exu_div_ctl.scala 513:76]
node _T_253 = bits(_T_252, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_254 = bits(io.operand, 31, 5) @[exu_div_ctl.scala 513:66]
node _T_255 = mux(UInt<1>("h01"), UInt<26>("h03ffffff"), UInt<26>("h00")) @[Bitwise.scala 72:12]
node _T_256 = cat(_T_255, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_257 = eq(_T_254, _T_256) @[exu_div_ctl.scala 513:76]
node _T_258 = bits(_T_257, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_259 = bits(io.operand, 31, 4) @[exu_div_ctl.scala 513:66]
node _T_260 = mux(UInt<1>("h01"), UInt<27>("h07ffffff"), UInt<27>("h00")) @[Bitwise.scala 72:12]
node _T_261 = cat(_T_260, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_262 = eq(_T_259, _T_261) @[exu_div_ctl.scala 513:76]
node _T_263 = bits(_T_262, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_264 = bits(io.operand, 31, 3) @[exu_div_ctl.scala 513:66]
node _T_265 = mux(UInt<1>("h01"), UInt<28>("h0fffffff"), UInt<28>("h00")) @[Bitwise.scala 72:12]
node _T_266 = cat(_T_265, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_267 = eq(_T_264, _T_266) @[exu_div_ctl.scala 513:76]
node _T_268 = bits(_T_267, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_269 = bits(io.operand, 31, 2) @[exu_div_ctl.scala 513:66]
node _T_270 = mux(UInt<1>("h01"), UInt<29>("h01fffffff"), UInt<29>("h00")) @[Bitwise.scala 72:12]
node _T_271 = cat(_T_270, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_272 = eq(_T_269, _T_271) @[exu_div_ctl.scala 513:76]
node _T_273 = bits(_T_272, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_274 = bits(io.operand, 31, 1) @[exu_div_ctl.scala 513:66]
node _T_275 = mux(UInt<1>("h01"), UInt<30>("h03fffffff"), UInt<30>("h00")) @[Bitwise.scala 72:12]
node _T_276 = cat(_T_275, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_277 = eq(_T_274, _T_276) @[exu_div_ctl.scala 513:76]
node _T_278 = bits(_T_277, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_279 = bits(io.operand, 31, 0) @[exu_div_ctl.scala 513:66]
node _T_280 = mux(UInt<1>("h01"), UInt<31>("h07fffffff"), UInt<31>("h00")) @[Bitwise.scala 72:12]
node _T_281 = cat(_T_280, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_282 = eq(_T_279, _T_281) @[exu_div_ctl.scala 513:76]
node _T_283 = bits(_T_282, 0, 0) @[exu_div_ctl.scala 513:102]
node _T_284 = mux(_T_133, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_285 = mux(_T_138, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_286 = mux(_T_143, UInt<2>("h02"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_287 = mux(_T_148, UInt<2>("h03"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_288 = mux(_T_153, UInt<3>("h04"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_289 = mux(_T_158, UInt<3>("h05"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_290 = mux(_T_163, UInt<3>("h06"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_291 = mux(_T_168, UInt<3>("h07"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_292 = mux(_T_173, UInt<4>("h08"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_293 = mux(_T_178, UInt<4>("h09"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_294 = mux(_T_183, UInt<4>("h0a"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_295 = mux(_T_188, UInt<4>("h0b"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_296 = mux(_T_193, UInt<4>("h0c"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_297 = mux(_T_198, UInt<4>("h0d"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_298 = mux(_T_203, UInt<4>("h0e"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_299 = mux(_T_208, UInt<4>("h0f"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_300 = mux(_T_213, UInt<5>("h010"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_301 = mux(_T_218, UInt<5>("h011"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_302 = mux(_T_223, UInt<5>("h012"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_303 = mux(_T_228, UInt<5>("h013"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_304 = mux(_T_233, UInt<5>("h014"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_305 = mux(_T_238, UInt<5>("h015"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_306 = mux(_T_243, UInt<5>("h016"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_307 = mux(_T_248, UInt<5>("h017"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_308 = mux(_T_253, UInt<5>("h018"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_309 = mux(_T_258, UInt<5>("h019"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_310 = mux(_T_263, UInt<5>("h01a"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_311 = mux(_T_268, UInt<5>("h01b"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_312 = mux(_T_273, UInt<5>("h01c"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_313 = mux(_T_278, UInt<5>("h01d"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_314 = mux(_T_283, UInt<5>("h01e"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_315 = or(_T_284, _T_285) @[Mux.scala 27:72]
node _T_316 = or(_T_315, _T_286) @[Mux.scala 27:72]
node _T_317 = or(_T_316, _T_287) @[Mux.scala 27:72]
node _T_318 = or(_T_317, _T_288) @[Mux.scala 27:72]
node _T_319 = or(_T_318, _T_289) @[Mux.scala 27:72]
node _T_320 = or(_T_319, _T_290) @[Mux.scala 27:72]
node _T_321 = or(_T_320, _T_291) @[Mux.scala 27:72]
node _T_322 = or(_T_321, _T_292) @[Mux.scala 27:72]
node _T_323 = or(_T_322, _T_293) @[Mux.scala 27:72]
node _T_324 = or(_T_323, _T_294) @[Mux.scala 27:72]
node _T_325 = or(_T_324, _T_295) @[Mux.scala 27:72]
node _T_326 = or(_T_325, _T_296) @[Mux.scala 27:72]
node _T_327 = or(_T_326, _T_297) @[Mux.scala 27:72]
node _T_328 = or(_T_327, _T_298) @[Mux.scala 27:72]
node _T_329 = or(_T_328, _T_299) @[Mux.scala 27:72]
node _T_330 = or(_T_329, _T_300) @[Mux.scala 27:72]
node _T_331 = or(_T_330, _T_301) @[Mux.scala 27:72]
node _T_332 = or(_T_331, _T_302) @[Mux.scala 27:72]
node _T_333 = or(_T_332, _T_303) @[Mux.scala 27:72]
node _T_334 = or(_T_333, _T_304) @[Mux.scala 27:72]
node _T_335 = or(_T_334, _T_305) @[Mux.scala 27:72]
node _T_336 = or(_T_335, _T_306) @[Mux.scala 27:72]
node _T_337 = or(_T_336, _T_307) @[Mux.scala 27:72]
node _T_338 = or(_T_337, _T_308) @[Mux.scala 27:72]
node _T_339 = or(_T_338, _T_309) @[Mux.scala 27:72]
node _T_340 = or(_T_339, _T_310) @[Mux.scala 27:72]
node _T_341 = or(_T_340, _T_311) @[Mux.scala 27:72]
node _T_342 = or(_T_341, _T_312) @[Mux.scala 27:72]
node _T_343 = or(_T_342, _T_313) @[Mux.scala 27:72]
node _T_344 = or(_T_343, _T_314) @[Mux.scala 27:72]
wire _T_345 : UInt<5> @[Mux.scala 27:72]
_T_345 <= _T_344 @[Mux.scala 27:72]
cls_ones <= _T_345 @[exu_div_ctl.scala 513:25]
skip @[exu_div_ctl.scala 513:15]
node _T_346 = bits(io.operand, 32, 32) @[exu_div_ctl.scala 514:27]
node _T_347 = mux(_T_346, cls_ones, cls_zeros) @[exu_div_ctl.scala 514:16]
io.cls <= _T_347 @[exu_div_ctl.scala 514:10]
extmodule gated_latch :
output Q : Clock
input CK : Clock
input EN : UInt<1>
input SE : UInt<1>
defname = gated_latch
module rvclkhdr :
input clock : Clock
input reset : Reset
output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
inst clkhdr of gated_latch @[lib.scala 334:26]
clkhdr.SE is invalid
clkhdr.EN is invalid
clkhdr.CK is invalid
clkhdr.Q is invalid
io.l1clk <= clkhdr.Q @[lib.scala 335:14]
clkhdr.CK <= io.clk @[lib.scala 336:18]
clkhdr.EN <= io.en @[lib.scala 337:18]
clkhdr.SE <= io.scan_mode @[lib.scala 338:18]
extmodule gated_latch_1 :
output Q : Clock
input CK : Clock
input EN : UInt<1>
input SE : UInt<1>
defname = gated_latch
module rvclkhdr_1 :
input clock : Clock
input reset : Reset
output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
inst clkhdr of gated_latch_1 @[lib.scala 334:26]
clkhdr.SE is invalid
clkhdr.EN is invalid
clkhdr.CK is invalid
clkhdr.Q is invalid
io.l1clk <= clkhdr.Q @[lib.scala 335:14]
clkhdr.CK <= io.clk @[lib.scala 336:18]
clkhdr.EN <= io.en @[lib.scala 337:18]
clkhdr.SE <= io.scan_mode @[lib.scala 338:18]
extmodule gated_latch_2 :
output Q : Clock
input CK : Clock
input EN : UInt<1>
input SE : UInt<1>
defname = gated_latch
module rvclkhdr_2 :
input clock : Clock
input reset : Reset
output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
inst clkhdr of gated_latch_2 @[lib.scala 334:26]
clkhdr.SE is invalid
clkhdr.EN is invalid
clkhdr.CK is invalid
clkhdr.Q is invalid
io.l1clk <= clkhdr.Q @[lib.scala 335:14]
clkhdr.CK <= io.clk @[lib.scala 336:18]
clkhdr.EN <= io.en @[lib.scala 337:18]
clkhdr.SE <= io.scan_mode @[lib.scala 338:18]
extmodule gated_latch_3 :
output Q : Clock
input CK : Clock
input EN : UInt<1>
input SE : UInt<1>
defname = gated_latch
module rvclkhdr_3 :
input clock : Clock
input reset : Reset
output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
inst clkhdr of gated_latch_3 @[lib.scala 334:26]
clkhdr.SE is invalid
clkhdr.EN is invalid
clkhdr.CK is invalid
clkhdr.Q is invalid
io.l1clk <= clkhdr.Q @[lib.scala 335:14]
clkhdr.CK <= io.clk @[lib.scala 336:18]
clkhdr.EN <= io.en @[lib.scala 337:18]
clkhdr.SE <= io.scan_mode @[lib.scala 338:18]
extmodule gated_latch_4 :
output Q : Clock
input CK : Clock
input EN : UInt<1>
input SE : UInt<1>
defname = gated_latch
module rvclkhdr_4 :
input clock : Clock
input reset : Reset
output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
inst clkhdr of gated_latch_4 @[lib.scala 334:26]
clkhdr.SE is invalid
clkhdr.EN is invalid
clkhdr.CK is invalid
clkhdr.Q is invalid
io.l1clk <= clkhdr.Q @[lib.scala 335:14]
clkhdr.CK <= io.clk @[lib.scala 336:18]
clkhdr.EN <= io.en @[lib.scala 337:18]
clkhdr.SE <= io.scan_mode @[lib.scala 338:18]
extmodule gated_latch_5 :
output Q : Clock
input CK : Clock
input EN : UInt<1>
input SE : UInt<1>
defname = gated_latch
module rvclkhdr_5 :
input clock : Clock
input reset : Reset
output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
inst clkhdr of gated_latch_5 @[lib.scala 334:26]
clkhdr.SE is invalid
clkhdr.EN is invalid
clkhdr.CK is invalid
clkhdr.Q is invalid
io.l1clk <= clkhdr.Q @[lib.scala 335:14]
clkhdr.CK <= io.clk @[lib.scala 336:18]
clkhdr.EN <= io.en @[lib.scala 337:18]
clkhdr.SE <= io.scan_mode @[lib.scala 338:18]
extmodule gated_latch_6 :
output Q : Clock
input CK : Clock
input EN : UInt<1>
input SE : UInt<1>
defname = gated_latch
module rvclkhdr_6 :
input clock : Clock
input reset : Reset
output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
inst clkhdr of gated_latch_6 @[lib.scala 334:26]
clkhdr.SE is invalid
clkhdr.EN is invalid
clkhdr.CK is invalid
clkhdr.Q is invalid
io.l1clk <= clkhdr.Q @[lib.scala 335:14]
clkhdr.CK <= io.clk @[lib.scala 336:18]
clkhdr.EN <= io.en @[lib.scala 337:18]
clkhdr.SE <= io.scan_mode @[lib.scala 338:18]
extmodule gated_latch_7 :
output Q : Clock
input CK : Clock
input EN : UInt<1>
input SE : UInt<1>
defname = gated_latch
module rvclkhdr_7 :
input clock : Clock
input reset : Reset
output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
inst clkhdr of gated_latch_7 @[lib.scala 334:26]
clkhdr.SE is invalid
clkhdr.EN is invalid
clkhdr.CK is invalid
clkhdr.Q is invalid
io.l1clk <= clkhdr.Q @[lib.scala 335:14]
clkhdr.CK <= io.clk @[lib.scala 336:18]
clkhdr.EN <= io.en @[lib.scala 337:18]
clkhdr.SE <= io.scan_mode @[lib.scala 338:18]
extmodule gated_latch_8 :
output Q : Clock
input CK : Clock
input EN : UInt<1>
input SE : UInt<1>
defname = gated_latch
module rvclkhdr_8 :
input clock : Clock
input reset : Reset
output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
inst clkhdr of gated_latch_8 @[lib.scala 334:26]
clkhdr.SE is invalid
clkhdr.EN is invalid
clkhdr.CK is invalid
clkhdr.Q is invalid
io.l1clk <= clkhdr.Q @[lib.scala 335:14]
clkhdr.CK <= io.clk @[lib.scala 336:18]
clkhdr.EN <= io.en @[lib.scala 337:18]
clkhdr.SE <= io.scan_mode @[lib.scala 338:18]
extmodule gated_latch_9 :
output Q : Clock
input CK : Clock
input EN : UInt<1>
input SE : UInt<1>
defname = gated_latch
module rvclkhdr_9 :
input clock : Clock
input reset : Reset
output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
inst clkhdr of gated_latch_9 @[lib.scala 334:26]
clkhdr.SE is invalid
clkhdr.EN is invalid
clkhdr.CK is invalid
clkhdr.Q is invalid
io.l1clk <= clkhdr.Q @[lib.scala 335:14]
clkhdr.CK <= io.clk @[lib.scala 336:18]
clkhdr.EN <= io.en @[lib.scala 337:18]
clkhdr.SE <= io.scan_mode @[lib.scala 338:18]
extmodule gated_latch_10 :
output Q : Clock
input CK : Clock
input EN : UInt<1>
input SE : UInt<1>
defname = gated_latch
module rvclkhdr_10 :
input clock : Clock
input reset : Reset
output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
inst clkhdr of gated_latch_10 @[lib.scala 334:26]
clkhdr.SE is invalid
clkhdr.EN is invalid
clkhdr.CK is invalid
clkhdr.Q is invalid
io.l1clk <= clkhdr.Q @[lib.scala 335:14]
clkhdr.CK <= io.clk @[lib.scala 336:18]
clkhdr.EN <= io.en @[lib.scala 337:18]
clkhdr.SE <= io.scan_mode @[lib.scala 338:18]
module exu_div_new_1bit_fullshortq :
input clock : Clock
input reset : AsyncReset
output io : {flip scan_mode : UInt<1>, flip cancel : UInt<1>, flip valid_in : UInt<1>, flip signed_in : UInt<1>, flip rem_in : UInt<1>, flip dividend_in : UInt<32>, flip divisor_in : UInt<32>, data_out : UInt<32>, valid_out : UInt<1>}
wire valid_ff : UInt<1>
valid_ff <= UInt<1>("h00")
wire finish_ff : UInt<1>
finish_ff <= UInt<1>("h00")
wire control_ff : UInt<3>
control_ff <= UInt<3>("h00")
wire count_ff : UInt<7>
count_ff <= UInt<7>("h00")
wire smallnum : UInt<4>
smallnum <= UInt<4>("h00")
wire a_ff : UInt<32>
a_ff <= UInt<32>("h00")
wire b_ff : UInt<33>
b_ff <= UInt<33>("h00")
wire q_ff : UInt<32>
q_ff <= UInt<32>("h00")
wire r_ff : UInt<32>
r_ff <= UInt<32>("h00")
wire quotient_set : UInt<1>
quotient_set <= UInt<1>("h00")
wire shortq_enable : UInt<1>
shortq_enable <= UInt<1>("h00")
wire shortq_enable_ff : UInt<1>
shortq_enable_ff <= UInt<1>("h00")
wire by_zero_case_ff : UInt<1>
by_zero_case_ff <= UInt<1>("h00")
wire adder_out : UInt<33>
adder_out <= UInt<33>("h00")
wire ar_shifted : UInt<64>
ar_shifted <= UInt<64>("h00")
wire shortq_shift_ff : UInt<5>
shortq_shift_ff <= UInt<5>("h00")
node dividend_sign_ff = bits(control_ff, 2, 2) @[exu_div_ctl.scala 343:40]
node divisor_sign_ff = bits(control_ff, 1, 1) @[exu_div_ctl.scala 344:40]
node rem_ff = bits(control_ff, 0, 0) @[exu_div_ctl.scala 345:40]
node _T = bits(b_ff, 31, 0) @[exu_div_ctl.scala 346:47]
node _T_1 = eq(_T, UInt<1>("h00")) @[exu_div_ctl.scala 346:54]
node by_zero_case = and(valid_ff, _T_1) @[exu_div_ctl.scala 346:40]
node _T_2 = bits(a_ff, 31, 4) @[exu_div_ctl.scala 347:30]
node _T_3 = eq(_T_2, UInt<1>("h00")) @[exu_div_ctl.scala 347:37]
node _T_4 = bits(b_ff, 31, 4) @[exu_div_ctl.scala 347:53]
node _T_5 = eq(_T_4, UInt<1>("h00")) @[exu_div_ctl.scala 347:60]
node _T_6 = and(_T_3, _T_5) @[exu_div_ctl.scala 347:46]
node _T_7 = eq(by_zero_case, UInt<1>("h00")) @[exu_div_ctl.scala 347:71]
node _T_8 = and(_T_6, _T_7) @[exu_div_ctl.scala 347:69]
node _T_9 = eq(rem_ff, UInt<1>("h00")) @[exu_div_ctl.scala 347:87]
node _T_10 = and(_T_8, _T_9) @[exu_div_ctl.scala 347:85]
node _T_11 = and(_T_10, valid_ff) @[exu_div_ctl.scala 347:95]
node _T_12 = eq(io.cancel, UInt<1>("h00")) @[exu_div_ctl.scala 347:108]
node _T_13 = and(_T_11, _T_12) @[exu_div_ctl.scala 347:106]
node _T_14 = bits(a_ff, 31, 0) @[exu_div_ctl.scala 348:11]
node _T_15 = eq(_T_14, UInt<1>("h00")) @[exu_div_ctl.scala 348:18]
node _T_16 = eq(by_zero_case, UInt<1>("h00")) @[exu_div_ctl.scala 348:29]
node _T_17 = and(_T_15, _T_16) @[exu_div_ctl.scala 348:27]
node _T_18 = eq(rem_ff, UInt<1>("h00")) @[exu_div_ctl.scala 348:45]
node _T_19 = and(_T_17, _T_18) @[exu_div_ctl.scala 348:43]
node _T_20 = and(_T_19, valid_ff) @[exu_div_ctl.scala 348:53]
node _T_21 = eq(io.cancel, UInt<1>("h00")) @[exu_div_ctl.scala 348:66]
node _T_22 = and(_T_20, _T_21) @[exu_div_ctl.scala 348:64]
node smallnum_case = or(_T_13, _T_22) @[exu_div_ctl.scala 347:120]
node _T_23 = eq(io.cancel, UInt<1>("h00")) @[exu_div_ctl.scala 349:45]
node valid_ff_in = and(io.valid_in, _T_23) @[exu_div_ctl.scala 349:43]
node _T_24 = eq(io.valid_in, UInt<1>("h00")) @[exu_div_ctl.scala 350:35]
node _T_25 = bits(control_ff, 2, 2) @[exu_div_ctl.scala 350:60]
node _T_26 = and(_T_24, _T_25) @[exu_div_ctl.scala 350:48]
node _T_27 = and(io.valid_in, io.signed_in) @[exu_div_ctl.scala 350:80]
node _T_28 = bits(io.dividend_in, 31, 31) @[exu_div_ctl.scala 350:112]
node _T_29 = and(_T_27, _T_28) @[exu_div_ctl.scala 350:96]
node _T_30 = or(_T_26, _T_29) @[exu_div_ctl.scala 350:65]
node _T_31 = eq(io.valid_in, UInt<1>("h00")) @[exu_div_ctl.scala 350:120]
node _T_32 = bits(control_ff, 1, 1) @[exu_div_ctl.scala 350:145]
node _T_33 = and(_T_31, _T_32) @[exu_div_ctl.scala 350:133]
node _T_34 = and(io.valid_in, io.signed_in) @[exu_div_ctl.scala 350:165]
node _T_35 = bits(io.divisor_in, 31, 31) @[exu_div_ctl.scala 350:197]
node _T_36 = and(_T_34, _T_35) @[exu_div_ctl.scala 350:181]
node _T_37 = or(_T_33, _T_36) @[exu_div_ctl.scala 350:150]
node _T_38 = eq(io.valid_in, UInt<1>("h00")) @[exu_div_ctl.scala 350:205]
node _T_39 = bits(control_ff, 0, 0) @[exu_div_ctl.scala 350:230]
node _T_40 = and(_T_38, _T_39) @[exu_div_ctl.scala 350:218]
node _T_41 = and(io.valid_in, io.rem_in) @[exu_div_ctl.scala 350:250]
node _T_42 = or(_T_40, _T_41) @[exu_div_ctl.scala 350:235]
node _T_43 = cat(_T_30, _T_37) @[Cat.scala 29:58]
node control_in = cat(_T_43, _T_42) @[Cat.scala 29:58]
node _T_44 = orr(count_ff) @[exu_div_ctl.scala 351:42]
node running_state = or(_T_44, shortq_enable_ff) @[exu_div_ctl.scala 351:45]
node _T_45 = or(io.valid_in, valid_ff) @[exu_div_ctl.scala 352:43]
node _T_46 = or(_T_45, io.cancel) @[exu_div_ctl.scala 352:54]
node _T_47 = or(_T_46, running_state) @[exu_div_ctl.scala 352:66]
node misc_enable = or(_T_47, finish_ff) @[exu_div_ctl.scala 352:82]
node _T_48 = or(smallnum_case, by_zero_case) @[exu_div_ctl.scala 353:45]
node _T_49 = eq(count_ff, UInt<6>("h020")) @[exu_div_ctl.scala 353:72]
node finish_raw = or(_T_48, _T_49) @[exu_div_ctl.scala 353:60]
node _T_50 = eq(io.cancel, UInt<1>("h00")) @[exu_div_ctl.scala 354:43]
node finish = and(finish_raw, _T_50) @[exu_div_ctl.scala 354:41]
node _T_51 = or(valid_ff, running_state) @[exu_div_ctl.scala 355:40]
node _T_52 = eq(finish, UInt<1>("h00")) @[exu_div_ctl.scala 355:59]
node _T_53 = and(_T_51, _T_52) @[exu_div_ctl.scala 355:57]
node _T_54 = eq(finish_ff, UInt<1>("h00")) @[exu_div_ctl.scala 355:69]
node _T_55 = and(_T_53, _T_54) @[exu_div_ctl.scala 355:67]
node _T_56 = eq(io.cancel, UInt<1>("h00")) @[exu_div_ctl.scala 355:82]
node _T_57 = and(_T_55, _T_56) @[exu_div_ctl.scala 355:80]
node _T_58 = eq(shortq_enable, UInt<1>("h00")) @[exu_div_ctl.scala 355:95]
node count_enable = and(_T_57, _T_58) @[exu_div_ctl.scala 355:93]
node _T_59 = bits(count_enable, 0, 0) @[Bitwise.scala 72:15]
node _T_60 = mux(_T_59, UInt<7>("h07f"), UInt<7>("h00")) @[Bitwise.scala 72:12]
node _T_61 = cat(UInt<6>("h00"), UInt<1>("h01")) @[Cat.scala 29:58]
node _T_62 = add(count_ff, _T_61) @[exu_div_ctl.scala 356:63]
node _T_63 = tail(_T_62, 1) @[exu_div_ctl.scala 356:63]
node _T_64 = cat(UInt<2>("h00"), shortq_shift_ff) @[Cat.scala 29:58]
node _T_65 = add(_T_63, _T_64) @[exu_div_ctl.scala 356:83]
node _T_66 = tail(_T_65, 1) @[exu_div_ctl.scala 356:83]
node count_in = and(_T_60, _T_66) @[exu_div_ctl.scala 356:51]
node a_enable = or(io.valid_in, running_state) @[exu_div_ctl.scala 357:43]
node _T_67 = eq(shortq_enable_ff, UInt<1>("h00")) @[exu_div_ctl.scala 358:47]
node a_shift = and(running_state, _T_67) @[exu_div_ctl.scala 358:45]
node _T_68 = bits(dividend_sign_ff, 0, 0) @[Bitwise.scala 72:15]
node _T_69 = mux(_T_68, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12]
node _T_70 = cat(_T_69, a_ff) @[Cat.scala 29:58]
node _T_71 = dshl(_T_70, shortq_shift_ff) @[exu_div_ctl.scala 359:68]
ar_shifted <= _T_71 @[exu_div_ctl.scala 359:28]
node _T_72 = xor(dividend_sign_ff, divisor_sign_ff) @[exu_div_ctl.scala 360:61]
node _T_73 = eq(_T_72, UInt<1>("h00")) @[exu_div_ctl.scala 360:42]
node b_twos_comp = and(valid_ff, _T_73) @[exu_div_ctl.scala 360:40]
node _T_74 = xor(dividend_sign_ff, divisor_sign_ff) @[exu_div_ctl.scala 361:62]
node _T_75 = eq(_T_74, UInt<1>("h00")) @[exu_div_ctl.scala 361:43]
node twos_comp_b_sel = and(valid_ff, _T_75) @[exu_div_ctl.scala 361:41]
node _T_76 = eq(valid_ff, UInt<1>("h00")) @[exu_div_ctl.scala 362:30]
node _T_77 = eq(rem_ff, UInt<1>("h00")) @[exu_div_ctl.scala 362:42]
node _T_78 = and(_T_76, _T_77) @[exu_div_ctl.scala 362:40]
node _T_79 = xor(dividend_sign_ff, divisor_sign_ff) @[exu_div_ctl.scala 362:71]
node _T_80 = and(_T_78, _T_79) @[exu_div_ctl.scala 362:50]
node _T_81 = eq(by_zero_case_ff, UInt<1>("h00")) @[exu_div_ctl.scala 362:92]
node twos_comp_q_sel = and(_T_80, _T_81) @[exu_div_ctl.scala 362:90]
node b_enable = or(io.valid_in, b_twos_comp) @[exu_div_ctl.scala 363:43]
node _T_82 = or(io.valid_in, valid_ff) @[exu_div_ctl.scala 364:43]
node rq_enable = or(_T_82, running_state) @[exu_div_ctl.scala 364:54]
node _T_83 = and(valid_ff, dividend_sign_ff) @[exu_div_ctl.scala 365:40]
node _T_84 = eq(by_zero_case, UInt<1>("h00")) @[exu_div_ctl.scala 365:61]
node r_sign_sel = and(_T_83, _T_84) @[exu_div_ctl.scala 365:59]
node _T_85 = eq(quotient_set, UInt<1>("h00")) @[exu_div_ctl.scala 366:47]
node _T_86 = and(running_state, _T_85) @[exu_div_ctl.scala 366:45]
node _T_87 = eq(shortq_enable_ff, UInt<1>("h00")) @[exu_div_ctl.scala 366:63]
node r_restore_sel = and(_T_86, _T_87) @[exu_div_ctl.scala 366:61]
node _T_88 = and(running_state, quotient_set) @[exu_div_ctl.scala 367:45]
node _T_89 = eq(shortq_enable_ff, UInt<1>("h00")) @[exu_div_ctl.scala 367:63]
node r_adder_sel = and(_T_88, _T_89) @[exu_div_ctl.scala 367:61]
node _T_90 = bits(b_ff, 31, 0) @[exu_div_ctl.scala 370:48]
node _T_91 = mux(twos_comp_q_sel, q_ff, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_92 = mux(twos_comp_b_sel, _T_90, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_93 = or(_T_91, _T_92) @[Mux.scala 27:72]
wire twos_comp_in : UInt<32> @[Mux.scala 27:72]
twos_comp_in <= _T_93 @[Mux.scala 27:72]
wire _T_94 : UInt<1>[31] @[lib.scala 426:20]
node _T_95 = bits(twos_comp_in, 0, 0) @[lib.scala 428:27]
node _T_96 = orr(_T_95) @[lib.scala 428:35]
node _T_97 = bits(twos_comp_in, 1, 1) @[lib.scala 428:44]
node _T_98 = not(_T_97) @[lib.scala 428:40]
node _T_99 = bits(twos_comp_in, 1, 1) @[lib.scala 428:51]
node _T_100 = mux(_T_96, _T_98, _T_99) @[lib.scala 428:23]
_T_94[0] <= _T_100 @[lib.scala 428:17]
node _T_101 = bits(twos_comp_in, 1, 0) @[lib.scala 428:27]
node _T_102 = orr(_T_101) @[lib.scala 428:35]
node _T_103 = bits(twos_comp_in, 2, 2) @[lib.scala 428:44]
node _T_104 = not(_T_103) @[lib.scala 428:40]
node _T_105 = bits(twos_comp_in, 2, 2) @[lib.scala 428:51]
node _T_106 = mux(_T_102, _T_104, _T_105) @[lib.scala 428:23]
_T_94[1] <= _T_106 @[lib.scala 428:17]
node _T_107 = bits(twos_comp_in, 2, 0) @[lib.scala 428:27]
node _T_108 = orr(_T_107) @[lib.scala 428:35]
node _T_109 = bits(twos_comp_in, 3, 3) @[lib.scala 428:44]
node _T_110 = not(_T_109) @[lib.scala 428:40]
node _T_111 = bits(twos_comp_in, 3, 3) @[lib.scala 428:51]
node _T_112 = mux(_T_108, _T_110, _T_111) @[lib.scala 428:23]
_T_94[2] <= _T_112 @[lib.scala 428:17]
node _T_113 = bits(twos_comp_in, 3, 0) @[lib.scala 428:27]
node _T_114 = orr(_T_113) @[lib.scala 428:35]
node _T_115 = bits(twos_comp_in, 4, 4) @[lib.scala 428:44]
node _T_116 = not(_T_115) @[lib.scala 428:40]
node _T_117 = bits(twos_comp_in, 4, 4) @[lib.scala 428:51]
node _T_118 = mux(_T_114, _T_116, _T_117) @[lib.scala 428:23]
_T_94[3] <= _T_118 @[lib.scala 428:17]
node _T_119 = bits(twos_comp_in, 4, 0) @[lib.scala 428:27]
node _T_120 = orr(_T_119) @[lib.scala 428:35]
node _T_121 = bits(twos_comp_in, 5, 5) @[lib.scala 428:44]
node _T_122 = not(_T_121) @[lib.scala 428:40]
node _T_123 = bits(twos_comp_in, 5, 5) @[lib.scala 428:51]
node _T_124 = mux(_T_120, _T_122, _T_123) @[lib.scala 428:23]
_T_94[4] <= _T_124 @[lib.scala 428:17]
node _T_125 = bits(twos_comp_in, 5, 0) @[lib.scala 428:27]
node _T_126 = orr(_T_125) @[lib.scala 428:35]
node _T_127 = bits(twos_comp_in, 6, 6) @[lib.scala 428:44]
node _T_128 = not(_T_127) @[lib.scala 428:40]
node _T_129 = bits(twos_comp_in, 6, 6) @[lib.scala 428:51]
node _T_130 = mux(_T_126, _T_128, _T_129) @[lib.scala 428:23]
_T_94[5] <= _T_130 @[lib.scala 428:17]
node _T_131 = bits(twos_comp_in, 6, 0) @[lib.scala 428:27]
node _T_132 = orr(_T_131) @[lib.scala 428:35]
node _T_133 = bits(twos_comp_in, 7, 7) @[lib.scala 428:44]
node _T_134 = not(_T_133) @[lib.scala 428:40]
node _T_135 = bits(twos_comp_in, 7, 7) @[lib.scala 428:51]
node _T_136 = mux(_T_132, _T_134, _T_135) @[lib.scala 428:23]
_T_94[6] <= _T_136 @[lib.scala 428:17]
node _T_137 = bits(twos_comp_in, 7, 0) @[lib.scala 428:27]
node _T_138 = orr(_T_137) @[lib.scala 428:35]
node _T_139 = bits(twos_comp_in, 8, 8) @[lib.scala 428:44]
node _T_140 = not(_T_139) @[lib.scala 428:40]
node _T_141 = bits(twos_comp_in, 8, 8) @[lib.scala 428:51]
node _T_142 = mux(_T_138, _T_140, _T_141) @[lib.scala 428:23]
_T_94[7] <= _T_142 @[lib.scala 428:17]
node _T_143 = bits(twos_comp_in, 8, 0) @[lib.scala 428:27]
node _T_144 = orr(_T_143) @[lib.scala 428:35]
node _T_145 = bits(twos_comp_in, 9, 9) @[lib.scala 428:44]
node _T_146 = not(_T_145) @[lib.scala 428:40]
node _T_147 = bits(twos_comp_in, 9, 9) @[lib.scala 428:51]
node _T_148 = mux(_T_144, _T_146, _T_147) @[lib.scala 428:23]
_T_94[8] <= _T_148 @[lib.scala 428:17]
node _T_149 = bits(twos_comp_in, 9, 0) @[lib.scala 428:27]
node _T_150 = orr(_T_149) @[lib.scala 428:35]
node _T_151 = bits(twos_comp_in, 10, 10) @[lib.scala 428:44]
node _T_152 = not(_T_151) @[lib.scala 428:40]
node _T_153 = bits(twos_comp_in, 10, 10) @[lib.scala 428:51]
node _T_154 = mux(_T_150, _T_152, _T_153) @[lib.scala 428:23]
_T_94[9] <= _T_154 @[lib.scala 428:17]
node _T_155 = bits(twos_comp_in, 10, 0) @[lib.scala 428:27]
node _T_156 = orr(_T_155) @[lib.scala 428:35]
node _T_157 = bits(twos_comp_in, 11, 11) @[lib.scala 428:44]
node _T_158 = not(_T_157) @[lib.scala 428:40]
node _T_159 = bits(twos_comp_in, 11, 11) @[lib.scala 428:51]
node _T_160 = mux(_T_156, _T_158, _T_159) @[lib.scala 428:23]
_T_94[10] <= _T_160 @[lib.scala 428:17]
node _T_161 = bits(twos_comp_in, 11, 0) @[lib.scala 428:27]
node _T_162 = orr(_T_161) @[lib.scala 428:35]
node _T_163 = bits(twos_comp_in, 12, 12) @[lib.scala 428:44]
node _T_164 = not(_T_163) @[lib.scala 428:40]
node _T_165 = bits(twos_comp_in, 12, 12) @[lib.scala 428:51]
node _T_166 = mux(_T_162, _T_164, _T_165) @[lib.scala 428:23]
_T_94[11] <= _T_166 @[lib.scala 428:17]
node _T_167 = bits(twos_comp_in, 12, 0) @[lib.scala 428:27]
node _T_168 = orr(_T_167) @[lib.scala 428:35]
node _T_169 = bits(twos_comp_in, 13, 13) @[lib.scala 428:44]
node _T_170 = not(_T_169) @[lib.scala 428:40]
node _T_171 = bits(twos_comp_in, 13, 13) @[lib.scala 428:51]
node _T_172 = mux(_T_168, _T_170, _T_171) @[lib.scala 428:23]
_T_94[12] <= _T_172 @[lib.scala 428:17]
node _T_173 = bits(twos_comp_in, 13, 0) @[lib.scala 428:27]
node _T_174 = orr(_T_173) @[lib.scala 428:35]
node _T_175 = bits(twos_comp_in, 14, 14) @[lib.scala 428:44]
node _T_176 = not(_T_175) @[lib.scala 428:40]
node _T_177 = bits(twos_comp_in, 14, 14) @[lib.scala 428:51]
node _T_178 = mux(_T_174, _T_176, _T_177) @[lib.scala 428:23]
_T_94[13] <= _T_178 @[lib.scala 428:17]
node _T_179 = bits(twos_comp_in, 14, 0) @[lib.scala 428:27]
node _T_180 = orr(_T_179) @[lib.scala 428:35]
node _T_181 = bits(twos_comp_in, 15, 15) @[lib.scala 428:44]
node _T_182 = not(_T_181) @[lib.scala 428:40]
node _T_183 = bits(twos_comp_in, 15, 15) @[lib.scala 428:51]
node _T_184 = mux(_T_180, _T_182, _T_183) @[lib.scala 428:23]
_T_94[14] <= _T_184 @[lib.scala 428:17]
node _T_185 = bits(twos_comp_in, 15, 0) @[lib.scala 428:27]
node _T_186 = orr(_T_185) @[lib.scala 428:35]
node _T_187 = bits(twos_comp_in, 16, 16) @[lib.scala 428:44]
node _T_188 = not(_T_187) @[lib.scala 428:40]
node _T_189 = bits(twos_comp_in, 16, 16) @[lib.scala 428:51]
node _T_190 = mux(_T_186, _T_188, _T_189) @[lib.scala 428:23]
_T_94[15] <= _T_190 @[lib.scala 428:17]
node _T_191 = bits(twos_comp_in, 16, 0) @[lib.scala 428:27]
node _T_192 = orr(_T_191) @[lib.scala 428:35]
node _T_193 = bits(twos_comp_in, 17, 17) @[lib.scala 428:44]
node _T_194 = not(_T_193) @[lib.scala 428:40]
node _T_195 = bits(twos_comp_in, 17, 17) @[lib.scala 428:51]
node _T_196 = mux(_T_192, _T_194, _T_195) @[lib.scala 428:23]
_T_94[16] <= _T_196 @[lib.scala 428:17]
node _T_197 = bits(twos_comp_in, 17, 0) @[lib.scala 428:27]
node _T_198 = orr(_T_197) @[lib.scala 428:35]
node _T_199 = bits(twos_comp_in, 18, 18) @[lib.scala 428:44]
node _T_200 = not(_T_199) @[lib.scala 428:40]
node _T_201 = bits(twos_comp_in, 18, 18) @[lib.scala 428:51]
node _T_202 = mux(_T_198, _T_200, _T_201) @[lib.scala 428:23]
_T_94[17] <= _T_202 @[lib.scala 428:17]
node _T_203 = bits(twos_comp_in, 18, 0) @[lib.scala 428:27]
node _T_204 = orr(_T_203) @[lib.scala 428:35]
node _T_205 = bits(twos_comp_in, 19, 19) @[lib.scala 428:44]
node _T_206 = not(_T_205) @[lib.scala 428:40]
node _T_207 = bits(twos_comp_in, 19, 19) @[lib.scala 428:51]
node _T_208 = mux(_T_204, _T_206, _T_207) @[lib.scala 428:23]
_T_94[18] <= _T_208 @[lib.scala 428:17]
node _T_209 = bits(twos_comp_in, 19, 0) @[lib.scala 428:27]
node _T_210 = orr(_T_209) @[lib.scala 428:35]
node _T_211 = bits(twos_comp_in, 20, 20) @[lib.scala 428:44]
node _T_212 = not(_T_211) @[lib.scala 428:40]
node _T_213 = bits(twos_comp_in, 20, 20) @[lib.scala 428:51]
node _T_214 = mux(_T_210, _T_212, _T_213) @[lib.scala 428:23]
_T_94[19] <= _T_214 @[lib.scala 428:17]
node _T_215 = bits(twos_comp_in, 20, 0) @[lib.scala 428:27]
node _T_216 = orr(_T_215) @[lib.scala 428:35]
node _T_217 = bits(twos_comp_in, 21, 21) @[lib.scala 428:44]
node _T_218 = not(_T_217) @[lib.scala 428:40]
node _T_219 = bits(twos_comp_in, 21, 21) @[lib.scala 428:51]
node _T_220 = mux(_T_216, _T_218, _T_219) @[lib.scala 428:23]
_T_94[20] <= _T_220 @[lib.scala 428:17]
node _T_221 = bits(twos_comp_in, 21, 0) @[lib.scala 428:27]
node _T_222 = orr(_T_221) @[lib.scala 428:35]
node _T_223 = bits(twos_comp_in, 22, 22) @[lib.scala 428:44]
node _T_224 = not(_T_223) @[lib.scala 428:40]
node _T_225 = bits(twos_comp_in, 22, 22) @[lib.scala 428:51]
node _T_226 = mux(_T_222, _T_224, _T_225) @[lib.scala 428:23]
_T_94[21] <= _T_226 @[lib.scala 428:17]
node _T_227 = bits(twos_comp_in, 22, 0) @[lib.scala 428:27]
node _T_228 = orr(_T_227) @[lib.scala 428:35]
node _T_229 = bits(twos_comp_in, 23, 23) @[lib.scala 428:44]
node _T_230 = not(_T_229) @[lib.scala 428:40]
node _T_231 = bits(twos_comp_in, 23, 23) @[lib.scala 428:51]
node _T_232 = mux(_T_228, _T_230, _T_231) @[lib.scala 428:23]
_T_94[22] <= _T_232 @[lib.scala 428:17]
node _T_233 = bits(twos_comp_in, 23, 0) @[lib.scala 428:27]
node _T_234 = orr(_T_233) @[lib.scala 428:35]
node _T_235 = bits(twos_comp_in, 24, 24) @[lib.scala 428:44]
node _T_236 = not(_T_235) @[lib.scala 428:40]
node _T_237 = bits(twos_comp_in, 24, 24) @[lib.scala 428:51]
node _T_238 = mux(_T_234, _T_236, _T_237) @[lib.scala 428:23]
_T_94[23] <= _T_238 @[lib.scala 428:17]
node _T_239 = bits(twos_comp_in, 24, 0) @[lib.scala 428:27]
node _T_240 = orr(_T_239) @[lib.scala 428:35]
node _T_241 = bits(twos_comp_in, 25, 25) @[lib.scala 428:44]
node _T_242 = not(_T_241) @[lib.scala 428:40]
node _T_243 = bits(twos_comp_in, 25, 25) @[lib.scala 428:51]
node _T_244 = mux(_T_240, _T_242, _T_243) @[lib.scala 428:23]
_T_94[24] <= _T_244 @[lib.scala 428:17]
node _T_245 = bits(twos_comp_in, 25, 0) @[lib.scala 428:27]
node _T_246 = orr(_T_245) @[lib.scala 428:35]
node _T_247 = bits(twos_comp_in, 26, 26) @[lib.scala 428:44]
node _T_248 = not(_T_247) @[lib.scala 428:40]
node _T_249 = bits(twos_comp_in, 26, 26) @[lib.scala 428:51]
node _T_250 = mux(_T_246, _T_248, _T_249) @[lib.scala 428:23]
_T_94[25] <= _T_250 @[lib.scala 428:17]
node _T_251 = bits(twos_comp_in, 26, 0) @[lib.scala 428:27]
node _T_252 = orr(_T_251) @[lib.scala 428:35]
node _T_253 = bits(twos_comp_in, 27, 27) @[lib.scala 428:44]
node _T_254 = not(_T_253) @[lib.scala 428:40]
node _T_255 = bits(twos_comp_in, 27, 27) @[lib.scala 428:51]
node _T_256 = mux(_T_252, _T_254, _T_255) @[lib.scala 428:23]
_T_94[26] <= _T_256 @[lib.scala 428:17]
node _T_257 = bits(twos_comp_in, 27, 0) @[lib.scala 428:27]
node _T_258 = orr(_T_257) @[lib.scala 428:35]
node _T_259 = bits(twos_comp_in, 28, 28) @[lib.scala 428:44]
node _T_260 = not(_T_259) @[lib.scala 428:40]
node _T_261 = bits(twos_comp_in, 28, 28) @[lib.scala 428:51]
node _T_262 = mux(_T_258, _T_260, _T_261) @[lib.scala 428:23]
_T_94[27] <= _T_262 @[lib.scala 428:17]
node _T_263 = bits(twos_comp_in, 28, 0) @[lib.scala 428:27]
node _T_264 = orr(_T_263) @[lib.scala 428:35]
node _T_265 = bits(twos_comp_in, 29, 29) @[lib.scala 428:44]
node _T_266 = not(_T_265) @[lib.scala 428:40]
node _T_267 = bits(twos_comp_in, 29, 29) @[lib.scala 428:51]
node _T_268 = mux(_T_264, _T_266, _T_267) @[lib.scala 428:23]
_T_94[28] <= _T_268 @[lib.scala 428:17]
node _T_269 = bits(twos_comp_in, 29, 0) @[lib.scala 428:27]
node _T_270 = orr(_T_269) @[lib.scala 428:35]
node _T_271 = bits(twos_comp_in, 30, 30) @[lib.scala 428:44]
node _T_272 = not(_T_271) @[lib.scala 428:40]
node _T_273 = bits(twos_comp_in, 30, 30) @[lib.scala 428:51]
node _T_274 = mux(_T_270, _T_272, _T_273) @[lib.scala 428:23]
_T_94[29] <= _T_274 @[lib.scala 428:17]
node _T_275 = bits(twos_comp_in, 30, 0) @[lib.scala 428:27]
node _T_276 = orr(_T_275) @[lib.scala 428:35]
node _T_277 = bits(twos_comp_in, 31, 31) @[lib.scala 428:44]
node _T_278 = not(_T_277) @[lib.scala 428:40]
node _T_279 = bits(twos_comp_in, 31, 31) @[lib.scala 428:51]
node _T_280 = mux(_T_276, _T_278, _T_279) @[lib.scala 428:23]
_T_94[30] <= _T_280 @[lib.scala 428:17]
node _T_281 = cat(_T_94[2], _T_94[1]) @[lib.scala 430:14]
node _T_282 = cat(_T_281, _T_94[0]) @[lib.scala 430:14]
node _T_283 = cat(_T_94[4], _T_94[3]) @[lib.scala 430:14]
node _T_284 = cat(_T_94[6], _T_94[5]) @[lib.scala 430:14]
node _T_285 = cat(_T_284, _T_283) @[lib.scala 430:14]
node _T_286 = cat(_T_285, _T_282) @[lib.scala 430:14]
node _T_287 = cat(_T_94[8], _T_94[7]) @[lib.scala 430:14]
node _T_288 = cat(_T_94[10], _T_94[9]) @[lib.scala 430:14]
node _T_289 = cat(_T_288, _T_287) @[lib.scala 430:14]
node _T_290 = cat(_T_94[12], _T_94[11]) @[lib.scala 430:14]
node _T_291 = cat(_T_94[14], _T_94[13]) @[lib.scala 430:14]
node _T_292 = cat(_T_291, _T_290) @[lib.scala 430:14]
node _T_293 = cat(_T_292, _T_289) @[lib.scala 430:14]
node _T_294 = cat(_T_293, _T_286) @[lib.scala 430:14]
node _T_295 = cat(_T_94[16], _T_94[15]) @[lib.scala 430:14]
node _T_296 = cat(_T_94[18], _T_94[17]) @[lib.scala 430:14]
node _T_297 = cat(_T_296, _T_295) @[lib.scala 430:14]
node _T_298 = cat(_T_94[20], _T_94[19]) @[lib.scala 430:14]
node _T_299 = cat(_T_94[22], _T_94[21]) @[lib.scala 430:14]
node _T_300 = cat(_T_299, _T_298) @[lib.scala 430:14]
node _T_301 = cat(_T_300, _T_297) @[lib.scala 430:14]
node _T_302 = cat(_T_94[24], _T_94[23]) @[lib.scala 430:14]
node _T_303 = cat(_T_94[26], _T_94[25]) @[lib.scala 430:14]
node _T_304 = cat(_T_303, _T_302) @[lib.scala 430:14]
node _T_305 = cat(_T_94[28], _T_94[27]) @[lib.scala 430:14]
node _T_306 = cat(_T_94[30], _T_94[29]) @[lib.scala 430:14]
node _T_307 = cat(_T_306, _T_305) @[lib.scala 430:14]
node _T_308 = cat(_T_307, _T_304) @[lib.scala 430:14]
node _T_309 = cat(_T_308, _T_301) @[lib.scala 430:14]
node _T_310 = cat(_T_309, _T_294) @[lib.scala 430:14]
node _T_311 = bits(twos_comp_in, 0, 0) @[lib.scala 430:24]
node twos_comp_out = cat(_T_310, _T_311) @[Cat.scala 29:58]
node _T_312 = eq(a_shift, UInt<1>("h00")) @[exu_div_ctl.scala 375:6]
node _T_313 = eq(shortq_enable_ff, UInt<1>("h00")) @[exu_div_ctl.scala 375:17]
node _T_314 = and(_T_312, _T_313) @[exu_div_ctl.scala 375:15]
node _T_315 = bits(_T_314, 0, 0) @[exu_div_ctl.scala 375:36]
node _T_316 = bits(a_ff, 30, 0) @[exu_div_ctl.scala 376:54]
node _T_317 = cat(_T_316, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_318 = bits(ar_shifted, 31, 0) @[exu_div_ctl.scala 377:56]
node _T_319 = mux(_T_315, io.dividend_in, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_320 = mux(a_shift, _T_317, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_321 = mux(shortq_enable_ff, _T_318, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_322 = or(_T_319, _T_320) @[Mux.scala 27:72]
node _T_323 = or(_T_322, _T_321) @[Mux.scala 27:72]
wire a_in : UInt<32> @[Mux.scala 27:72]
a_in <= _T_323 @[Mux.scala 27:72]
node _T_324 = eq(b_twos_comp, UInt<1>("h00")) @[exu_div_ctl.scala 380:5]
node _T_325 = bits(io.divisor_in, 31, 31) @[exu_div_ctl.scala 380:78]
node _T_326 = and(io.signed_in, _T_325) @[exu_div_ctl.scala 380:63]
node _T_327 = bits(io.divisor_in, 31, 0) @[exu_div_ctl.scala 380:96]
node _T_328 = cat(_T_326, _T_327) @[Cat.scala 29:58]
node _T_329 = eq(divisor_sign_ff, UInt<1>("h00")) @[exu_div_ctl.scala 381:50]
node _T_330 = bits(twos_comp_out, 31, 0) @[exu_div_ctl.scala 381:80]
node _T_331 = cat(_T_329, _T_330) @[Cat.scala 29:58]
node _T_332 = mux(_T_324, _T_328, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_333 = mux(b_twos_comp, _T_331, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_334 = or(_T_332, _T_333) @[Mux.scala 27:72]
wire b_in : UInt<33> @[Mux.scala 27:72]
b_in <= _T_334 @[Mux.scala 27:72]
node _T_335 = bits(r_ff, 30, 0) @[exu_div_ctl.scala 385:54]
node _T_336 = bits(a_ff, 31, 31) @[exu_div_ctl.scala 385:65]
node _T_337 = cat(_T_335, _T_336) @[Cat.scala 29:58]
node _T_338 = bits(adder_out, 31, 0) @[exu_div_ctl.scala 386:55]
node _T_339 = bits(ar_shifted, 63, 32) @[exu_div_ctl.scala 387:56]
node _T_340 = mux(r_sign_sel, UInt<32>("h0ffffffff"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_341 = mux(r_restore_sel, _T_337, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_342 = mux(r_adder_sel, _T_338, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_343 = mux(shortq_enable_ff, _T_339, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_344 = mux(by_zero_case, a_ff, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_345 = or(_T_340, _T_341) @[Mux.scala 27:72]
node _T_346 = or(_T_345, _T_342) @[Mux.scala 27:72]
node _T_347 = or(_T_346, _T_343) @[Mux.scala 27:72]
node _T_348 = or(_T_347, _T_344) @[Mux.scala 27:72]
wire r_in : UInt<32> @[Mux.scala 27:72]
r_in <= _T_348 @[Mux.scala 27:72]
node _T_349 = eq(valid_ff, UInt<1>("h00")) @[exu_div_ctl.scala 391:4]
node _T_350 = bits(q_ff, 30, 0) @[exu_div_ctl.scala 391:54]
node _T_351 = cat(_T_350, quotient_set) @[Cat.scala 29:58]
node _T_352 = cat(UInt<28>("h00"), smallnum) @[Cat.scala 29:58]
node _T_353 = mux(UInt<1>("h01"), UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12]
node _T_354 = mux(_T_349, _T_351, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_355 = mux(smallnum_case, _T_352, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_356 = mux(by_zero_case, _T_353, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_357 = or(_T_354, _T_355) @[Mux.scala 27:72]
node _T_358 = or(_T_357, _T_356) @[Mux.scala 27:72]
wire q_in : UInt<32> @[Mux.scala 27:72]
q_in <= _T_358 @[Mux.scala 27:72]
node _T_359 = bits(a_ff, 31, 31) @[exu_div_ctl.scala 395:29]
node _T_360 = cat(r_ff, _T_359) @[Cat.scala 29:58]
node _T_361 = add(_T_360, b_ff) @[exu_div_ctl.scala 395:35]
node _T_362 = tail(_T_361, 1) @[exu_div_ctl.scala 395:35]
adder_out <= _T_362 @[exu_div_ctl.scala 395:13]
node _T_363 = bits(adder_out, 32, 32) @[exu_div_ctl.scala 396:30]
node _T_364 = eq(_T_363, UInt<1>("h00")) @[exu_div_ctl.scala 396:20]
node _T_365 = xor(_T_364, dividend_sign_ff) @[exu_div_ctl.scala 396:35]
node _T_366 = bits(a_ff, 30, 0) @[exu_div_ctl.scala 396:63]
node _T_367 = eq(_T_366, UInt<1>("h00")) @[exu_div_ctl.scala 396:70]
node _T_368 = eq(adder_out, UInt<1>("h00")) @[exu_div_ctl.scala 396:92]
node _T_369 = and(_T_367, _T_368) @[exu_div_ctl.scala 396:79]
node _T_370 = or(_T_365, _T_369) @[exu_div_ctl.scala 396:55]
quotient_set <= _T_370 @[exu_div_ctl.scala 396:16]
node _T_371 = eq(io.cancel, UInt<1>("h00")) @[exu_div_ctl.scala 397:31]
node _T_372 = and(finish_ff, _T_371) @[exu_div_ctl.scala 397:29]
io.valid_out <= _T_372 @[exu_div_ctl.scala 397:16]
node _T_373 = eq(rem_ff, UInt<1>("h00")) @[exu_div_ctl.scala 399:6]
node _T_374 = eq(twos_comp_q_sel, UInt<1>("h00")) @[exu_div_ctl.scala 399:16]
node _T_375 = and(_T_373, _T_374) @[exu_div_ctl.scala 399:14]
node _T_376 = bits(_T_375, 0, 0) @[exu_div_ctl.scala 399:40]
node _T_377 = mux(_T_376, q_ff, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_378 = mux(rem_ff, r_ff, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_379 = mux(twos_comp_q_sel, twos_comp_out, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_380 = or(_T_377, _T_378) @[Mux.scala 27:72]
node _T_381 = or(_T_380, _T_379) @[Mux.scala 27:72]
wire _T_382 : UInt<32> @[Mux.scala 27:72]
_T_382 <= _T_381 @[Mux.scala 27:72]
io.data_out <= _T_382 @[exu_div_ctl.scala 398:15]
node _T_383 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 404:58]
node _T_384 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 405:75]
node _T_385 = eq(_T_384, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_386 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 405:75]
node _T_387 = eq(_T_386, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_388 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 405:75]
node _T_389 = eq(_T_388, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_390 = and(_T_385, _T_387) @[exu_div_ctl.scala 405:95]
node _T_391 = and(_T_390, _T_389) @[exu_div_ctl.scala 405:95]
node _T_392 = and(_T_383, _T_391) @[exu_div_ctl.scala 406:11]
node _T_393 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 404:58]
node _T_394 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 405:75]
node _T_395 = eq(_T_394, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_396 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 405:75]
node _T_397 = eq(_T_396, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_398 = and(_T_395, _T_397) @[exu_div_ctl.scala 405:95]
node _T_399 = and(_T_393, _T_398) @[exu_div_ctl.scala 406:11]
node _T_400 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 412:38]
node _T_401 = eq(_T_400, UInt<1>("h00")) @[exu_div_ctl.scala 412:33]
node _T_402 = and(_T_399, _T_401) @[exu_div_ctl.scala 412:31]
node _T_403 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 404:58]
node _T_404 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 405:75]
node _T_405 = eq(_T_404, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_406 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 405:75]
node _T_407 = eq(_T_406, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_408 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 405:75]
node _T_409 = eq(_T_408, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_410 = and(_T_405, _T_407) @[exu_div_ctl.scala 405:95]
node _T_411 = and(_T_410, _T_409) @[exu_div_ctl.scala 405:95]
node _T_412 = and(_T_403, _T_411) @[exu_div_ctl.scala 406:11]
node _T_413 = or(_T_402, _T_412) @[exu_div_ctl.scala 412:42]
node _T_414 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 404:58]
node _T_415 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 404:58]
node _T_416 = and(_T_414, _T_415) @[exu_div_ctl.scala 404:95]
node _T_417 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 405:75]
node _T_418 = eq(_T_417, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_419 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 405:75]
node _T_420 = eq(_T_419, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_421 = and(_T_418, _T_420) @[exu_div_ctl.scala 405:95]
node _T_422 = and(_T_416, _T_421) @[exu_div_ctl.scala 406:11]
node _T_423 = or(_T_413, _T_422) @[exu_div_ctl.scala 412:75]
node _T_424 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 404:58]
node _T_425 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 405:75]
node _T_426 = eq(_T_425, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_427 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 405:75]
node _T_428 = eq(_T_427, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_429 = and(_T_426, _T_428) @[exu_div_ctl.scala 405:95]
node _T_430 = and(_T_424, _T_429) @[exu_div_ctl.scala 406:11]
node _T_431 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 414:38]
node _T_432 = eq(_T_431, UInt<1>("h00")) @[exu_div_ctl.scala 414:33]
node _T_433 = and(_T_430, _T_432) @[exu_div_ctl.scala 414:31]
node _T_434 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 404:58]
node _T_435 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 405:75]
node _T_436 = eq(_T_435, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_437 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 405:75]
node _T_438 = eq(_T_437, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_439 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 405:75]
node _T_440 = eq(_T_439, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_441 = and(_T_436, _T_438) @[exu_div_ctl.scala 405:95]
node _T_442 = and(_T_441, _T_440) @[exu_div_ctl.scala 405:95]
node _T_443 = and(_T_434, _T_442) @[exu_div_ctl.scala 406:11]
node _T_444 = or(_T_433, _T_443) @[exu_div_ctl.scala 414:42]
node _T_445 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 404:58]
node _T_446 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 405:75]
node _T_447 = eq(_T_446, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_448 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 405:75]
node _T_449 = eq(_T_448, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_450 = and(_T_447, _T_449) @[exu_div_ctl.scala 405:95]
node _T_451 = and(_T_445, _T_450) @[exu_div_ctl.scala 406:11]
node _T_452 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 414:113]
node _T_453 = eq(_T_452, UInt<1>("h00")) @[exu_div_ctl.scala 414:108]
node _T_454 = and(_T_451, _T_453) @[exu_div_ctl.scala 414:106]
node _T_455 = or(_T_444, _T_454) @[exu_div_ctl.scala 414:78]
node _T_456 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 404:58]
node _T_457 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 404:75]
node _T_458 = eq(_T_457, UInt<1>("h00")) @[exu_div_ctl.scala 404:70]
node _T_459 = and(_T_456, _T_458) @[exu_div_ctl.scala 404:95]
node _T_460 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 405:75]
node _T_461 = eq(_T_460, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_462 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 405:75]
node _T_463 = eq(_T_462, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_464 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 405:58]
node _T_465 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 405:58]
node _T_466 = and(_T_461, _T_463) @[exu_div_ctl.scala 405:95]
node _T_467 = and(_T_466, _T_464) @[exu_div_ctl.scala 405:95]
node _T_468 = and(_T_467, _T_465) @[exu_div_ctl.scala 405:95]
node _T_469 = and(_T_459, _T_468) @[exu_div_ctl.scala 406:11]
node _T_470 = or(_T_455, _T_469) @[exu_div_ctl.scala 414:117]
node _T_471 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 404:75]
node _T_472 = eq(_T_471, UInt<1>("h00")) @[exu_div_ctl.scala 404:70]
node _T_473 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 404:58]
node _T_474 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 404:58]
node _T_475 = and(_T_472, _T_473) @[exu_div_ctl.scala 404:95]
node _T_476 = and(_T_475, _T_474) @[exu_div_ctl.scala 404:95]
node _T_477 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 405:75]
node _T_478 = eq(_T_477, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_479 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 405:75]
node _T_480 = eq(_T_479, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_481 = and(_T_478, _T_480) @[exu_div_ctl.scala 405:95]
node _T_482 = and(_T_476, _T_481) @[exu_div_ctl.scala 406:11]
node _T_483 = or(_T_470, _T_482) @[exu_div_ctl.scala 415:44]
node _T_484 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 404:58]
node _T_485 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 404:58]
node _T_486 = and(_T_484, _T_485) @[exu_div_ctl.scala 404:95]
node _T_487 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 405:75]
node _T_488 = eq(_T_487, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_489 = and(_T_486, _T_488) @[exu_div_ctl.scala 406:11]
node _T_490 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 415:114]
node _T_491 = eq(_T_490, UInt<1>("h00")) @[exu_div_ctl.scala 415:109]
node _T_492 = and(_T_489, _T_491) @[exu_div_ctl.scala 415:107]
node _T_493 = or(_T_483, _T_492) @[exu_div_ctl.scala 415:80]
node _T_494 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 404:58]
node _T_495 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 404:58]
node _T_496 = and(_T_494, _T_495) @[exu_div_ctl.scala 404:95]
node _T_497 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 405:75]
node _T_498 = eq(_T_497, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_499 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 405:58]
node _T_500 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 405:75]
node _T_501 = eq(_T_500, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_502 = and(_T_498, _T_499) @[exu_div_ctl.scala 405:95]
node _T_503 = and(_T_502, _T_501) @[exu_div_ctl.scala 405:95]
node _T_504 = and(_T_496, _T_503) @[exu_div_ctl.scala 406:11]
node _T_505 = or(_T_493, _T_504) @[exu_div_ctl.scala 415:119]
node _T_506 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 404:58]
node _T_507 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 404:58]
node _T_508 = and(_T_506, _T_507) @[exu_div_ctl.scala 404:95]
node _T_509 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 405:75]
node _T_510 = eq(_T_509, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_511 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 405:75]
node _T_512 = eq(_T_511, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_513 = and(_T_510, _T_512) @[exu_div_ctl.scala 405:95]
node _T_514 = and(_T_508, _T_513) @[exu_div_ctl.scala 406:11]
node _T_515 = or(_T_505, _T_514) @[exu_div_ctl.scala 416:44]
node _T_516 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 404:58]
node _T_517 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 404:58]
node _T_518 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 404:58]
node _T_519 = and(_T_516, _T_517) @[exu_div_ctl.scala 404:95]
node _T_520 = and(_T_519, _T_518) @[exu_div_ctl.scala 404:95]
node _T_521 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 405:75]
node _T_522 = eq(_T_521, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_523 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 405:58]
node _T_524 = and(_T_522, _T_523) @[exu_div_ctl.scala 405:95]
node _T_525 = and(_T_520, _T_524) @[exu_div_ctl.scala 406:11]
node _T_526 = or(_T_515, _T_525) @[exu_div_ctl.scala 416:79]
node _T_527 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 404:58]
node _T_528 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 404:58]
node _T_529 = bits(a_ff, 0, 0) @[exu_div_ctl.scala 404:58]
node _T_530 = and(_T_527, _T_528) @[exu_div_ctl.scala 404:95]
node _T_531 = and(_T_530, _T_529) @[exu_div_ctl.scala 404:95]
node _T_532 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 405:75]
node _T_533 = eq(_T_532, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_534 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 405:75]
node _T_535 = eq(_T_534, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_536 = and(_T_533, _T_535) @[exu_div_ctl.scala 405:95]
node _T_537 = and(_T_531, _T_536) @[exu_div_ctl.scala 406:11]
node _T_538 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 404:58]
node _T_539 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 404:75]
node _T_540 = eq(_T_539, UInt<1>("h00")) @[exu_div_ctl.scala 404:70]
node _T_541 = bits(a_ff, 0, 0) @[exu_div_ctl.scala 404:58]
node _T_542 = and(_T_538, _T_540) @[exu_div_ctl.scala 404:95]
node _T_543 = and(_T_542, _T_541) @[exu_div_ctl.scala 404:95]
node _T_544 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 405:75]
node _T_545 = eq(_T_544, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_546 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 405:58]
node _T_547 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 405:58]
node _T_548 = and(_T_545, _T_546) @[exu_div_ctl.scala 405:95]
node _T_549 = and(_T_548, _T_547) @[exu_div_ctl.scala 405:95]
node _T_550 = and(_T_543, _T_549) @[exu_div_ctl.scala 406:11]
node _T_551 = or(_T_537, _T_550) @[exu_div_ctl.scala 418:45]
node _T_552 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 404:58]
node _T_553 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 405:75]
node _T_554 = eq(_T_553, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_555 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 405:75]
node _T_556 = eq(_T_555, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_557 = and(_T_554, _T_556) @[exu_div_ctl.scala 405:95]
node _T_558 = and(_T_552, _T_557) @[exu_div_ctl.scala 406:11]
node _T_559 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 418:121]
node _T_560 = eq(_T_559, UInt<1>("h00")) @[exu_div_ctl.scala 418:116]
node _T_561 = and(_T_558, _T_560) @[exu_div_ctl.scala 418:114]
node _T_562 = or(_T_551, _T_561) @[exu_div_ctl.scala 418:86]
node _T_563 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 404:58]
node _T_564 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 405:75]
node _T_565 = eq(_T_564, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_566 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 405:75]
node _T_567 = eq(_T_566, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_568 = and(_T_565, _T_567) @[exu_div_ctl.scala 405:95]
node _T_569 = and(_T_563, _T_568) @[exu_div_ctl.scala 406:11]
node _T_570 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 419:40]
node _T_571 = eq(_T_570, UInt<1>("h00")) @[exu_div_ctl.scala 419:35]
node _T_572 = and(_T_569, _T_571) @[exu_div_ctl.scala 419:33]
node _T_573 = or(_T_562, _T_572) @[exu_div_ctl.scala 418:129]
node _T_574 = bits(a_ff, 0, 0) @[exu_div_ctl.scala 404:58]
node _T_575 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 405:75]
node _T_576 = eq(_T_575, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_577 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 405:75]
node _T_578 = eq(_T_577, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_579 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 405:75]
node _T_580 = eq(_T_579, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_581 = and(_T_576, _T_578) @[exu_div_ctl.scala 405:95]
node _T_582 = and(_T_581, _T_580) @[exu_div_ctl.scala 405:95]
node _T_583 = and(_T_574, _T_582) @[exu_div_ctl.scala 406:11]
node _T_584 = or(_T_573, _T_583) @[exu_div_ctl.scala 419:47]
node _T_585 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 404:75]
node _T_586 = eq(_T_585, UInt<1>("h00")) @[exu_div_ctl.scala 404:70]
node _T_587 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 404:58]
node _T_588 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 404:75]
node _T_589 = eq(_T_588, UInt<1>("h00")) @[exu_div_ctl.scala 404:70]
node _T_590 = and(_T_586, _T_587) @[exu_div_ctl.scala 404:95]
node _T_591 = and(_T_590, _T_589) @[exu_div_ctl.scala 404:95]
node _T_592 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 405:75]
node _T_593 = eq(_T_592, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_594 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 405:75]
node _T_595 = eq(_T_594, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_596 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 405:58]
node _T_597 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 405:58]
node _T_598 = and(_T_593, _T_595) @[exu_div_ctl.scala 405:95]
node _T_599 = and(_T_598, _T_596) @[exu_div_ctl.scala 405:95]
node _T_600 = and(_T_599, _T_597) @[exu_div_ctl.scala 405:95]
node _T_601 = and(_T_591, _T_600) @[exu_div_ctl.scala 406:11]
node _T_602 = or(_T_584, _T_601) @[exu_div_ctl.scala 419:88]
node _T_603 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 404:75]
node _T_604 = eq(_T_603, UInt<1>("h00")) @[exu_div_ctl.scala 404:70]
node _T_605 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 404:58]
node _T_606 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 404:58]
node _T_607 = and(_T_604, _T_605) @[exu_div_ctl.scala 404:95]
node _T_608 = and(_T_607, _T_606) @[exu_div_ctl.scala 404:95]
node _T_609 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 405:75]
node _T_610 = eq(_T_609, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_611 = and(_T_608, _T_610) @[exu_div_ctl.scala 406:11]
node _T_612 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 420:43]
node _T_613 = eq(_T_612, UInt<1>("h00")) @[exu_div_ctl.scala 420:38]
node _T_614 = and(_T_611, _T_613) @[exu_div_ctl.scala 420:36]
node _T_615 = or(_T_602, _T_614) @[exu_div_ctl.scala 419:131]
node _T_616 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 404:58]
node _T_617 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 405:75]
node _T_618 = eq(_T_617, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_619 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 405:75]
node _T_620 = eq(_T_619, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_621 = and(_T_618, _T_620) @[exu_div_ctl.scala 405:95]
node _T_622 = and(_T_616, _T_621) @[exu_div_ctl.scala 406:11]
node _T_623 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 420:83]
node _T_624 = eq(_T_623, UInt<1>("h00")) @[exu_div_ctl.scala 420:78]
node _T_625 = and(_T_622, _T_624) @[exu_div_ctl.scala 420:76]
node _T_626 = or(_T_615, _T_625) @[exu_div_ctl.scala 420:47]
node _T_627 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 404:58]
node _T_628 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 404:75]
node _T_629 = eq(_T_628, UInt<1>("h00")) @[exu_div_ctl.scala 404:70]
node _T_630 = and(_T_627, _T_629) @[exu_div_ctl.scala 404:95]
node _T_631 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 405:75]
node _T_632 = eq(_T_631, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_633 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 405:58]
node _T_634 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 405:58]
node _T_635 = and(_T_632, _T_633) @[exu_div_ctl.scala 405:95]
node _T_636 = and(_T_635, _T_634) @[exu_div_ctl.scala 405:95]
node _T_637 = and(_T_630, _T_636) @[exu_div_ctl.scala 406:11]
node _T_638 = or(_T_626, _T_637) @[exu_div_ctl.scala 420:88]
node _T_639 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 404:75]
node _T_640 = eq(_T_639, UInt<1>("h00")) @[exu_div_ctl.scala 404:70]
node _T_641 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 404:58]
node _T_642 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 404:58]
node _T_643 = and(_T_640, _T_641) @[exu_div_ctl.scala 404:95]
node _T_644 = and(_T_643, _T_642) @[exu_div_ctl.scala 404:95]
node _T_645 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 405:75]
node _T_646 = eq(_T_645, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_647 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 405:58]
node _T_648 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 405:75]
node _T_649 = eq(_T_648, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_650 = and(_T_646, _T_647) @[exu_div_ctl.scala 405:95]
node _T_651 = and(_T_650, _T_649) @[exu_div_ctl.scala 405:95]
node _T_652 = and(_T_644, _T_651) @[exu_div_ctl.scala 406:11]
node _T_653 = or(_T_638, _T_652) @[exu_div_ctl.scala 420:131]
node _T_654 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 404:75]
node _T_655 = eq(_T_654, UInt<1>("h00")) @[exu_div_ctl.scala 404:70]
node _T_656 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 404:58]
node _T_657 = bits(a_ff, 0, 0) @[exu_div_ctl.scala 404:58]
node _T_658 = and(_T_655, _T_656) @[exu_div_ctl.scala 404:95]
node _T_659 = and(_T_658, _T_657) @[exu_div_ctl.scala 404:95]
node _T_660 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 405:75]
node _T_661 = eq(_T_660, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_662 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 405:75]
node _T_663 = eq(_T_662, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_664 = and(_T_661, _T_663) @[exu_div_ctl.scala 405:95]
node _T_665 = and(_T_659, _T_664) @[exu_div_ctl.scala 406:11]
node _T_666 = or(_T_653, _T_665) @[exu_div_ctl.scala 421:47]
node _T_667 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 404:58]
node _T_668 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 404:75]
node _T_669 = eq(_T_668, UInt<1>("h00")) @[exu_div_ctl.scala 404:70]
node _T_670 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 404:75]
node _T_671 = eq(_T_670, UInt<1>("h00")) @[exu_div_ctl.scala 404:70]
node _T_672 = and(_T_667, _T_669) @[exu_div_ctl.scala 404:95]
node _T_673 = and(_T_672, _T_671) @[exu_div_ctl.scala 404:95]
node _T_674 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 405:75]
node _T_675 = eq(_T_674, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_676 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 405:58]
node _T_677 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 405:58]
node _T_678 = and(_T_675, _T_676) @[exu_div_ctl.scala 405:95]
node _T_679 = and(_T_678, _T_677) @[exu_div_ctl.scala 405:95]
node _T_680 = and(_T_673, _T_679) @[exu_div_ctl.scala 406:11]
node _T_681 = or(_T_666, _T_680) @[exu_div_ctl.scala 421:88]
node _T_682 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 404:75]
node _T_683 = eq(_T_682, UInt<1>("h00")) @[exu_div_ctl.scala 404:70]
node _T_684 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 404:58]
node _T_685 = bits(a_ff, 0, 0) @[exu_div_ctl.scala 404:58]
node _T_686 = and(_T_683, _T_684) @[exu_div_ctl.scala 404:95]
node _T_687 = and(_T_686, _T_685) @[exu_div_ctl.scala 404:95]
node _T_688 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 405:75]
node _T_689 = eq(_T_688, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_690 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 405:75]
node _T_691 = eq(_T_690, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_692 = and(_T_689, _T_691) @[exu_div_ctl.scala 405:95]
node _T_693 = and(_T_687, _T_692) @[exu_div_ctl.scala 406:11]
node _T_694 = or(_T_681, _T_693) @[exu_div_ctl.scala 421:131]
node _T_695 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 404:58]
node _T_696 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 404:58]
node _T_697 = and(_T_695, _T_696) @[exu_div_ctl.scala 404:95]
node _T_698 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 405:75]
node _T_699 = eq(_T_698, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_700 = and(_T_697, _T_699) @[exu_div_ctl.scala 406:11]
node _T_701 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 422:82]
node _T_702 = eq(_T_701, UInt<1>("h00")) @[exu_div_ctl.scala 422:77]
node _T_703 = and(_T_700, _T_702) @[exu_div_ctl.scala 422:75]
node _T_704 = or(_T_694, _T_703) @[exu_div_ctl.scala 422:47]
node _T_705 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 404:75]
node _T_706 = eq(_T_705, UInt<1>("h00")) @[exu_div_ctl.scala 404:70]
node _T_707 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 404:58]
node _T_708 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 404:58]
node _T_709 = bits(a_ff, 0, 0) @[exu_div_ctl.scala 404:58]
node _T_710 = and(_T_706, _T_707) @[exu_div_ctl.scala 404:95]
node _T_711 = and(_T_710, _T_708) @[exu_div_ctl.scala 404:95]
node _T_712 = and(_T_711, _T_709) @[exu_div_ctl.scala 404:95]
node _T_713 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 405:75]
node _T_714 = eq(_T_713, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_715 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 405:58]
node _T_716 = and(_T_714, _T_715) @[exu_div_ctl.scala 405:95]
node _T_717 = and(_T_712, _T_716) @[exu_div_ctl.scala 406:11]
node _T_718 = or(_T_704, _T_717) @[exu_div_ctl.scala 422:88]
node _T_719 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 404:58]
node _T_720 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 404:58]
node _T_721 = and(_T_719, _T_720) @[exu_div_ctl.scala 404:95]
node _T_722 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 405:58]
node _T_723 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 405:75]
node _T_724 = eq(_T_723, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_725 = and(_T_722, _T_724) @[exu_div_ctl.scala 405:95]
node _T_726 = and(_T_721, _T_725) @[exu_div_ctl.scala 406:11]
node _T_727 = or(_T_718, _T_726) @[exu_div_ctl.scala 422:131]
node _T_728 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 404:58]
node _T_729 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 404:58]
node _T_730 = and(_T_728, _T_729) @[exu_div_ctl.scala 404:95]
node _T_731 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 405:58]
node _T_732 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 405:75]
node _T_733 = eq(_T_732, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_734 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 405:75]
node _T_735 = eq(_T_734, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_736 = and(_T_731, _T_733) @[exu_div_ctl.scala 405:95]
node _T_737 = and(_T_736, _T_735) @[exu_div_ctl.scala 405:95]
node _T_738 = and(_T_730, _T_737) @[exu_div_ctl.scala 406:11]
node _T_739 = or(_T_727, _T_738) @[exu_div_ctl.scala 423:47]
node _T_740 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 404:58]
node _T_741 = bits(a_ff, 0, 0) @[exu_div_ctl.scala 404:58]
node _T_742 = and(_T_740, _T_741) @[exu_div_ctl.scala 404:95]
node _T_743 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 405:75]
node _T_744 = eq(_T_743, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_745 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 405:75]
node _T_746 = eq(_T_745, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_747 = and(_T_744, _T_746) @[exu_div_ctl.scala 405:95]
node _T_748 = and(_T_742, _T_747) @[exu_div_ctl.scala 406:11]
node _T_749 = or(_T_739, _T_748) @[exu_div_ctl.scala 423:88]
node _T_750 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 404:58]
node _T_751 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 404:75]
node _T_752 = eq(_T_751, UInt<1>("h00")) @[exu_div_ctl.scala 404:70]
node _T_753 = and(_T_750, _T_752) @[exu_div_ctl.scala 404:95]
node _T_754 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 405:75]
node _T_755 = eq(_T_754, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_756 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 405:58]
node _T_757 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 405:58]
node _T_758 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 405:58]
node _T_759 = and(_T_755, _T_756) @[exu_div_ctl.scala 405:95]
node _T_760 = and(_T_759, _T_757) @[exu_div_ctl.scala 405:95]
node _T_761 = and(_T_760, _T_758) @[exu_div_ctl.scala 405:95]
node _T_762 = and(_T_753, _T_761) @[exu_div_ctl.scala 406:11]
node _T_763 = or(_T_749, _T_762) @[exu_div_ctl.scala 423:131]
node _T_764 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 404:58]
node _T_765 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 404:58]
node _T_766 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 404:58]
node _T_767 = and(_T_764, _T_765) @[exu_div_ctl.scala 404:95]
node _T_768 = and(_T_767, _T_766) @[exu_div_ctl.scala 404:95]
node _T_769 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 405:58]
node _T_770 = and(_T_768, _T_769) @[exu_div_ctl.scala 406:11]
node _T_771 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 424:84]
node _T_772 = eq(_T_771, UInt<1>("h00")) @[exu_div_ctl.scala 424:79]
node _T_773 = and(_T_770, _T_772) @[exu_div_ctl.scala 424:77]
node _T_774 = or(_T_763, _T_773) @[exu_div_ctl.scala 424:47]
node _T_775 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 404:58]
node _T_776 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 404:58]
node _T_777 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 404:58]
node _T_778 = and(_T_775, _T_776) @[exu_div_ctl.scala 404:95]
node _T_779 = and(_T_778, _T_777) @[exu_div_ctl.scala 404:95]
node _T_780 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 405:58]
node _T_781 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 405:75]
node _T_782 = eq(_T_781, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_783 = and(_T_780, _T_782) @[exu_div_ctl.scala 405:95]
node _T_784 = and(_T_779, _T_783) @[exu_div_ctl.scala 406:11]
node _T_785 = or(_T_774, _T_784) @[exu_div_ctl.scala 424:88]
node _T_786 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 404:58]
node _T_787 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 404:58]
node _T_788 = bits(a_ff, 0, 0) @[exu_div_ctl.scala 404:58]
node _T_789 = and(_T_786, _T_787) @[exu_div_ctl.scala 404:95]
node _T_790 = and(_T_789, _T_788) @[exu_div_ctl.scala 404:95]
node _T_791 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 405:58]
node _T_792 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 405:75]
node _T_793 = eq(_T_792, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_794 = and(_T_791, _T_793) @[exu_div_ctl.scala 405:95]
node _T_795 = and(_T_790, _T_794) @[exu_div_ctl.scala 406:11]
node _T_796 = or(_T_785, _T_795) @[exu_div_ctl.scala 424:131]
node _T_797 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 404:58]
node _T_798 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 404:75]
node _T_799 = eq(_T_798, UInt<1>("h00")) @[exu_div_ctl.scala 404:70]
node _T_800 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 404:58]
node _T_801 = and(_T_797, _T_799) @[exu_div_ctl.scala 404:95]
node _T_802 = and(_T_801, _T_800) @[exu_div_ctl.scala 404:95]
node _T_803 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 405:75]
node _T_804 = eq(_T_803, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_805 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 405:58]
node _T_806 = and(_T_804, _T_805) @[exu_div_ctl.scala 405:95]
node _T_807 = and(_T_802, _T_806) @[exu_div_ctl.scala 406:11]
node _T_808 = or(_T_796, _T_807) @[exu_div_ctl.scala 425:47]
node _T_809 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 404:58]
node _T_810 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 404:58]
node _T_811 = bits(a_ff, 0, 0) @[exu_div_ctl.scala 404:58]
node _T_812 = and(_T_809, _T_810) @[exu_div_ctl.scala 404:95]
node _T_813 = and(_T_812, _T_811) @[exu_div_ctl.scala 404:95]
node _T_814 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 405:75]
node _T_815 = eq(_T_814, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_816 = and(_T_813, _T_815) @[exu_div_ctl.scala 406:11]
node _T_817 = or(_T_808, _T_816) @[exu_div_ctl.scala 425:88]
node _T_818 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 404:58]
node _T_819 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 404:58]
node _T_820 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 404:58]
node _T_821 = bits(a_ff, 0, 0) @[exu_div_ctl.scala 404:58]
node _T_822 = and(_T_818, _T_819) @[exu_div_ctl.scala 404:95]
node _T_823 = and(_T_822, _T_820) @[exu_div_ctl.scala 404:95]
node _T_824 = and(_T_823, _T_821) @[exu_div_ctl.scala 404:95]
node _T_825 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 405:58]
node _T_826 = and(_T_824, _T_825) @[exu_div_ctl.scala 406:11]
node _T_827 = or(_T_817, _T_826) @[exu_div_ctl.scala 425:131]
node _T_828 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 404:58]
node _T_829 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 404:58]
node _T_830 = and(_T_828, _T_829) @[exu_div_ctl.scala 404:95]
node _T_831 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 405:75]
node _T_832 = eq(_T_831, UInt<1>("h00")) @[exu_div_ctl.scala 405:70]
node _T_833 = and(_T_830, _T_832) @[exu_div_ctl.scala 406:11]
node _T_834 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 426:81]
node _T_835 = eq(_T_834, UInt<1>("h00")) @[exu_div_ctl.scala 426:76]
node _T_836 = and(_T_833, _T_835) @[exu_div_ctl.scala 426:74]
node _T_837 = or(_T_827, _T_836) @[exu_div_ctl.scala 426:47]
node _T_838 = cat(_T_526, _T_837) @[Cat.scala 29:58]
node _T_839 = cat(_T_392, _T_423) @[Cat.scala 29:58]
node _T_840 = cat(_T_839, _T_838) @[Cat.scala 29:58]
smallnum <= _T_840 @[exu_div_ctl.scala 409:12]
node shortq_dividend = cat(dividend_sign_ff, a_ff) @[Cat.scala 29:58]
inst a_enc of exu_div_cls @[exu_div_ctl.scala 429:21]
a_enc.clock <= clock
a_enc.reset <= reset
a_enc.io.operand <= shortq_dividend @[exu_div_ctl.scala 430:20]
inst b_enc of exu_div_cls_1 @[exu_div_ctl.scala 432:21]
b_enc.clock <= clock
b_enc.reset <= reset
b_enc.io.operand <= b_ff @[exu_div_ctl.scala 433:20]
node dw_a_enc = cat(UInt<1>("h00"), a_enc.io.cls) @[Cat.scala 29:58]
node dw_b_enc = cat(UInt<1>("h00"), b_enc.io.cls) @[Cat.scala 29:58]
node _T_841 = cat(UInt<1>("h00"), dw_b_enc) @[Cat.scala 29:58]
node _T_842 = cat(UInt<1>("h00"), dw_a_enc) @[Cat.scala 29:58]
node _T_843 = sub(_T_841, _T_842) @[exu_div_ctl.scala 437:41]
node _T_844 = tail(_T_843, 1) @[exu_div_ctl.scala 437:41]
node _T_845 = add(_T_844, UInt<7>("h01")) @[exu_div_ctl.scala 437:61]
node dw_shortq_raw = tail(_T_845, 1) @[exu_div_ctl.scala 437:61]
node _T_846 = bits(dw_shortq_raw, 6, 6) @[exu_div_ctl.scala 438:33]
node _T_847 = bits(_T_846, 0, 0) @[exu_div_ctl.scala 438:43]
node _T_848 = bits(dw_shortq_raw, 5, 0) @[exu_div_ctl.scala 438:63]
node shortq = mux(_T_847, UInt<1>("h00"), _T_848) @[exu_div_ctl.scala 438:19]
node _T_849 = bits(shortq, 5, 5) @[exu_div_ctl.scala 439:38]
node _T_850 = eq(_T_849, UInt<1>("h00")) @[exu_div_ctl.scala 439:31]
node _T_851 = and(valid_ff, _T_850) @[exu_div_ctl.scala 439:29]
node _T_852 = bits(shortq, 4, 1) @[exu_div_ctl.scala 439:52]
node _T_853 = eq(_T_852, UInt<4>("h0f")) @[exu_div_ctl.scala 439:58]
node _T_854 = eq(_T_853, UInt<1>("h00")) @[exu_div_ctl.scala 439:44]
node _T_855 = and(_T_851, _T_854) @[exu_div_ctl.scala 439:42]
node _T_856 = eq(io.cancel, UInt<1>("h00")) @[exu_div_ctl.scala 439:76]
node _T_857 = and(_T_855, _T_856) @[exu_div_ctl.scala 439:74]
shortq_enable <= _T_857 @[exu_div_ctl.scala 439:17]
node _T_858 = eq(shortq_enable, UInt<1>("h00")) @[exu_div_ctl.scala 440:26]
node _T_859 = bits(shortq, 4, 0) @[exu_div_ctl.scala 440:65]
node _T_860 = sub(UInt<5>("h01f"), _T_859) @[exu_div_ctl.scala 440:57]
node _T_861 = tail(_T_860, 1) @[exu_div_ctl.scala 440:57]
node shortq_shift = mux(_T_858, UInt<1>("h00"), _T_861) @[exu_div_ctl.scala 440:25]
inst rvclkhdr of rvclkhdr @[lib.scala 390:23]
rvclkhdr.clock <= clock
rvclkhdr.reset <= reset
rvclkhdr.io.clk <= clock @[lib.scala 392:18]
rvclkhdr.io.en <= misc_enable @[lib.scala 393:17]
rvclkhdr.io.scan_mode <= UInt<1>("h00") @[lib.scala 394:24]
reg _T_862 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when misc_enable : @[Reg.scala 28:19]
_T_862 <= valid_ff_in @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
valid_ff <= _T_862 @[exu_div_ctl.scala 441:12]
inst rvclkhdr_1 of rvclkhdr_1 @[lib.scala 390:23]
rvclkhdr_1.clock <= clock
rvclkhdr_1.reset <= reset
rvclkhdr_1.io.clk <= clock @[lib.scala 392:18]
rvclkhdr_1.io.en <= misc_enable @[lib.scala 393:17]
rvclkhdr_1.io.scan_mode <= UInt<1>("h00") @[lib.scala 394:24]
reg _T_863 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when misc_enable : @[Reg.scala 28:19]
_T_863 <= control_in @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
control_ff <= _T_863 @[exu_div_ctl.scala 442:16]
inst rvclkhdr_2 of rvclkhdr_2 @[lib.scala 390:23]
rvclkhdr_2.clock <= clock
rvclkhdr_2.reset <= reset
rvclkhdr_2.io.clk <= clock @[lib.scala 392:18]
rvclkhdr_2.io.en <= misc_enable @[lib.scala 393:17]
rvclkhdr_2.io.scan_mode <= UInt<1>("h00") @[lib.scala 394:24]
reg _T_864 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when misc_enable : @[Reg.scala 28:19]
_T_864 <= by_zero_case @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
by_zero_case_ff <= _T_864 @[exu_div_ctl.scala 443:19]
inst rvclkhdr_3 of rvclkhdr_3 @[lib.scala 390:23]
rvclkhdr_3.clock <= clock
rvclkhdr_3.reset <= reset
rvclkhdr_3.io.clk <= clock @[lib.scala 392:18]
rvclkhdr_3.io.en <= misc_enable @[lib.scala 393:17]
rvclkhdr_3.io.scan_mode <= UInt<1>("h00") @[lib.scala 394:24]
reg _T_865 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when misc_enable : @[Reg.scala 28:19]
_T_865 <= shortq_enable @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
shortq_enable_ff <= _T_865 @[exu_div_ctl.scala 444:20]
inst rvclkhdr_4 of rvclkhdr_4 @[lib.scala 390:23]
rvclkhdr_4.clock <= clock
rvclkhdr_4.reset <= reset
rvclkhdr_4.io.clk <= clock @[lib.scala 392:18]
rvclkhdr_4.io.en <= misc_enable @[lib.scala 393:17]
rvclkhdr_4.io.scan_mode <= UInt<1>("h00") @[lib.scala 394:24]
reg _T_866 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when misc_enable : @[Reg.scala 28:19]
_T_866 <= shortq_shift @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
shortq_shift_ff <= _T_866 @[exu_div_ctl.scala 445:19]
inst rvclkhdr_5 of rvclkhdr_5 @[lib.scala 390:23]
rvclkhdr_5.clock <= clock
rvclkhdr_5.reset <= reset
rvclkhdr_5.io.clk <= clock @[lib.scala 392:18]
rvclkhdr_5.io.en <= misc_enable @[lib.scala 393:17]
rvclkhdr_5.io.scan_mode <= UInt<1>("h00") @[lib.scala 394:24]
reg _T_867 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when misc_enable : @[Reg.scala 28:19]
_T_867 <= finish @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
finish_ff <= _T_867 @[exu_div_ctl.scala 446:13]
inst rvclkhdr_6 of rvclkhdr_6 @[lib.scala 390:23]
rvclkhdr_6.clock <= clock
rvclkhdr_6.reset <= reset
rvclkhdr_6.io.clk <= clock @[lib.scala 392:18]
rvclkhdr_6.io.en <= misc_enable @[lib.scala 393:17]
rvclkhdr_6.io.scan_mode <= UInt<1>("h00") @[lib.scala 394:24]
reg _T_868 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when misc_enable : @[Reg.scala 28:19]
_T_868 <= count_in @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
count_ff <= _T_868 @[exu_div_ctl.scala 447:12]
inst rvclkhdr_7 of rvclkhdr_7 @[lib.scala 390:23]
rvclkhdr_7.clock <= clock
rvclkhdr_7.reset <= reset
rvclkhdr_7.io.clk <= clock @[lib.scala 392:18]
rvclkhdr_7.io.en <= a_enable @[lib.scala 393:17]
rvclkhdr_7.io.scan_mode <= UInt<1>("h00") @[lib.scala 394:24]
reg _T_869 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when a_enable : @[Reg.scala 28:19]
_T_869 <= a_in @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
a_ff <= _T_869 @[exu_div_ctl.scala 449:8]
inst rvclkhdr_8 of rvclkhdr_8 @[lib.scala 390:23]
rvclkhdr_8.clock <= clock
rvclkhdr_8.reset <= reset
rvclkhdr_8.io.clk <= clock @[lib.scala 392:18]
rvclkhdr_8.io.en <= b_enable @[lib.scala 393:17]
rvclkhdr_8.io.scan_mode <= UInt<1>("h00") @[lib.scala 394:24]
reg _T_870 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when b_enable : @[Reg.scala 28:19]
_T_870 <= b_in @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
b_ff <= _T_870 @[exu_div_ctl.scala 450:8]
inst rvclkhdr_9 of rvclkhdr_9 @[lib.scala 390:23]
rvclkhdr_9.clock <= clock
rvclkhdr_9.reset <= reset
rvclkhdr_9.io.clk <= clock @[lib.scala 392:18]
rvclkhdr_9.io.en <= rq_enable @[lib.scala 393:17]
rvclkhdr_9.io.scan_mode <= UInt<1>("h00") @[lib.scala 394:24]
reg _T_871 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when rq_enable : @[Reg.scala 28:19]
_T_871 <= r_in @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
r_ff <= _T_871 @[exu_div_ctl.scala 451:8]
inst rvclkhdr_10 of rvclkhdr_10 @[lib.scala 390:23]
rvclkhdr_10.clock <= clock
rvclkhdr_10.reset <= reset
rvclkhdr_10.io.clk <= clock @[lib.scala 392:18]
rvclkhdr_10.io.en <= rq_enable @[lib.scala 393:17]
rvclkhdr_10.io.scan_mode <= UInt<1>("h00") @[lib.scala 394:24]
reg _T_872 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when rq_enable : @[Reg.scala 28:19]
_T_872 <= q_in @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
q_ff <= _T_872 @[exu_div_ctl.scala 452:8]