261 lines
11 KiB
Markdown
261 lines
11 KiB
Markdown
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# Quasar RISC-V Core 2.0 from Lampro Mellon
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This repository contains the Quasar Core design in CHISEL.
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## License
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By contributing to this project, you agree that your contribution is governed by [Apache-2.0](LICENSE).
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Files under the [tools](tools/) directory may be available under a different license. Please review individual file for details.
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## Background
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Quasar is a Chiselified version of EL2 SweRV RISC-V Core.
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## Directory Structure
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├── configs # Configurations dir
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├── design
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│ ├── project
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│ ├── project
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│ └── target
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│ ├── snapshots
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│ └── default # Where generated configuration files are created
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│ ├── src
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│ ├── main
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│ ├── resources
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│ └── vsrc # Blackbox files dir
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│ └── scala # Design root dir
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│ ├── dbg # Debugger
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│ ├── dec # Decode, Registers and Exceptions
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│ ├── dmi # DMI block
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│ ├── exu # EXU (ALU/MUL/DIV)
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│ ├── ifu # Fetch & Branch Prediction
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│ ├── include # Bundles file
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│ ├── lib # Bridges and Library
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│ └── lsu # Load/Store
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│ └── test
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│ ├── target
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│ └── test_run_dir
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├── doc # PPA Report
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├── generated_rtl # Quasar wrapper
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├── testbench
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│ ├── asm # Example assembly files
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│ ├── hex # Canned demo hex files
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│ └── tests # Example tests
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├── tools # Scripts/Makefiles
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├── tracer_logs # generated log files
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└── verif
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├── LEC
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├── formality_work
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└── formality_log # LEC log files
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└── setup_files # user_match files
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└── sim # Simulation log/dump files
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## Dependencies
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- Verilator **(4.102 or later)** must be installed on the system if running with verilator.
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- Vcs must be installed on the system if running with vcs.
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- RISCV tool chain (based on gcc version 8.3 or higher) must be
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installed so that it can be used to prepare RISCV binaries to run.
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- Sbt **(1.3.13 or later)** must be installed on the system.
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## Quickstart guide
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1. Clone the repository
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2. Setup RV_ROOT to point to the path in your local filesystem
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3. Determine your configuration {optional}
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4. Run make with $RV_ROOT/tools/Makefile
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## Release Notes for this version
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Please see [release-notes](release-notes.md) for changes and bug fixes in this version of Quasar.
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### Configurations
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Quasar can be configured by running the script:
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```
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$RV_ROOT/configs/quasar.config
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```
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For detailed help options.
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```
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$RV_ROOT/configs/quasar.config -h
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```
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For example, to build with a DCCM of size 64Kb:
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```
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$RV_ROOT/configs/quasar.config -dccm_size=64
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```
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This will update the **default** snapshot in `$RV_ROOT/design/snapshots/default/` with parameters for a 64K DCCM.
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Add `-snapshot=dccm64`, for example, if you wish to name your build snapshot *dccm64* and refer to it during the build.
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There are 4 predefined target configurations: `default`, `default_ahb`, `typical_pd` and `high_perf` that can be selected via the `-target=name` option to quasar.config.
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This script derives the following consistent set of include files :
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```
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$RV_ROOT/design/snapshots/default
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├── common_defines.vh # `defines for testbench or design
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├── defines.h # defines for C/assembly headers
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├── param.vh # Design parameters
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├── pdef.vh # Parameter structure
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├── pd_defines.vh # `defines for physical design
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├── perl_configs.pl # Perl %configs hash for scripting
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├── pic_map_auto.h # PIC memory map based on configure size
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├── whisper.json # JSON file for swerv-iss
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└── link.ld # default linker control file
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```
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#### 1. Generate scala parameter
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```
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make -f $RV_ROOT/tools/Makefile conf
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```
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This script will run `quasar.config` and derives the include file:
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```
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$RV_ROOT/design/src/main/scala/lib
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└── param.scala # Scala design parameters
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```
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### Running RTL Simulation
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while in a work directory:
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#### 1. Set the RV_ROOT environment variable to the root of the Quasar directory structure.
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Example for bash shell:
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```
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export RV_ROOT=$(pwd)
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```
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Example for csh or its derivatives:
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```
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setenv RV_ROOT /path/to/QUASAR
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```
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#### 2. Create your specific configuration
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*(Skip if default is sufficient)*
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*(Name your snapshot to distinguish it from the default. Without an explicit name, it will update/override the __default__ snapshot)*. For example, if `mybuild` is the name for the snapshot:
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set BUILD_PATH environment variable:
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```
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setenv BUILD_PATH snapshots/mybuild
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$RV_ROOT/configs/quasar.config [configuration options..] -snapshot=mybuild
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```
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Snapshots are placed in `$BUILD_PATH` directory.
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#### 3. Run sbt
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```
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make -f $RV_ROOT/tools/Makefile sbt_
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```
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This command will generate the Quasar wrapper in system verilog of Quasar chisel, in the `generated_rtl` directory and runs the `reset_script.py`
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* In the reset_script we do a post verilog-generation changes, these changes are as follows:
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* Replace `posedge reset` with `negedge reset`
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* Replace `if (reset)` with `if (~reset)`
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#### 4. Running a simple Hello World program (verilator)
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```
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make -f $RV_ROOT/tools/Makefile
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```
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This command will build a verilator model of Quasar with AXI bus, and execute a short sequence of instructions that writes out "HELLO WORLD"
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to the bus.
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The simulation produces output on the screen like:
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```
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VerilatorTB: Start of sim
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----------------------------------
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Hello World from QUASAR @LMDC !!
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----------------------------------
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TEST_PASSED
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Finished : minstret = 437, mcycle = 922
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See "exec.log" for execution trace with register updates..
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```
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The simulation generates following files in `$RV_ROOT/verif/sim`:
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`console.log` contains what the cpu writes to the console address of 0xd0580000.
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`exec.log` shows instruction trace with GPR updates.
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`trace_port.csv` contains a log of the trace port.
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Other log files are `dec.log`, `exu.log`, `ifu.log`, `lsu.log` and `pic.log`, generates in `$RV_ROOT/tracer_logs`.
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When `debug=1` is provided, a vcd file `sim.vcd` is created and can be browsed by gtkwave or similar waveform viewers.
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You can re-execute simulation using:
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```
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make -f $RV_ROOT/tools/Makefile verilator
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```
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#### 5. Default for VCS/Verilotor
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If you want to run default configuration on verilator use the following command
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```
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make -f $RV_ROOT/tools/Makefile
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```
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For VCS use
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```
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make -f $RV_ROOT/tools/Makefile vcs_all
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```
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The simulation run/build command has following generic form:
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```
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make -f $RV_ROOT/tools/Makefile [<simulator>] [debug=1] [snapshot=mybuild] [target=<target>] [TEST=<test>] [TEST_DIR=<path_to_test_dir>]
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```
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where:
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```
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<simulator> - can be 'verilator' (by default) , 'vcs' - Synopsys VCS, 'riviera'- Aldec Riviera-PRO. If not provided, 'make' cleans work directory, builds verilator executable and runs a test.
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debug=1 - allows VCD generation for verilator and VCS and SHM waves for irun option.
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<target> - predefined CPU configurations 'default' ( by default), 'default_ahb', 'typical_pd', 'high_perf'.
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TEST - allows to run a C (<test>.c) or assembly (<test>.s) test, hello_world is run by default.
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TEST_DIR - alternative to test source directory testbench/asm or testbench/tests.
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<snapshot> - run and build executable model of custom CPU configuration, remember to provide 'snapshot' argument for runs on custom configurations.
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CONF_PARAMS - allows to provide -set options to quasar.conf script to alter predefined targets parameters.
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```
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Example:
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```
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make -f $RV_ROOT/tools/Makefile verilator TEST=cmark
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```
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will build and simulate `testbench/asm/cmark.c` program with verilator.
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If you want to compile a test only, you can run:
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```
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make -f $RV_ROOT/tools/Makefile program.hex TEST=<test> [TEST_DIR=/path/to/dir]
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```
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The Makefile uses `snapshot/<target>/link.ld` file, generated by quasar.conf script by default to build test executable. User can provide test specific linker file in form `<test_name>.ld` to build the test executable, in the same directory with the test source.
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User also can create a test specific makefile in form `<test_name>.makefile`, containing building instructions how to create `program.hex` file used by simulation. The private makefile should be in the same directory as the test source. See examples in `testbench/asm` directory.
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*(`program.hex` file is loaded to instruction and LSU bus memory slaves and optionally to DCCM/ICCM at the beginning of simulation)*.
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User can build `program.hex` file by any other means and then run simulation with following command:
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make -f $RV_ROOT/tools/Makefile <simulator>
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Note: You may need to delete `program.hex` file from work directory, when run a new test.
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The `$RV_ROOT/testbench/asm` directory contains following tests ready to simulate:
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```
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hello_world - default test program to run, prints Hello World message to screen and console.log
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hello_world_dccm - the same as above, but takes the string from preloaded DCCM.
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hello_world_iccm - the same as hello_world, but loads the test code to ICCM via LSU to DMA bridge and then executes it from there. Runs on QUASAR with AXI4 buses only.
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cmark - coremark benchmark running with code and data in external memories
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cmark_dccm - the same as above, running data and stack from DCCM (faster)
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cmark_iccm - the same as above with preloaded code to ICCM.
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dhry - Run dhrystone. (Scale by 1757 to get DMIPS/MHZ)
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```
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The `$RV_ROOT/testbench/hex` directory contains precompiled hex files of the tests, ready for simulation in case RISCV SW tools are not installed.
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#### 6. Logical Equivalence Checking of Quasar
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If you want to perform LEC on quasar, use the following command
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```
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make -f $RV_ROOT/tools/Makefile lec
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```
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This command will call the LEC Makefile to clone Quasar along with the SweRV-EL2 and run `sbt` for chisel-generated RTL. Then, this will take file for user-match the ports, blockbox pins, latches, flops and perform the LEC of Quasar.
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Following log files are created in `$RV_ROOT/verif/LEC/formality_work/formality_log` :
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`fm_shell_command.log` gives the detail of instructions
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`formality.log` gives the detail of undriven nets
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**Note**: The testbench has a simple synthesizable bridge that allows you to load the ICCM via load/store instructions. This is only supported for AXI4 builds.
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