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quasar/exu_alu_ctl.fir

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EXU Top updated
2021-01-25 20:58:38 +08:00
;buildInfoPackage: chisel3, version: 3.3.1, scalaVersion: 2.12.11, sbtVersion: 1.3.10
circuit exu_alu_ctl :
extmodule gated_latch :
output Q : Clock
input CK : Clock
input EN : UInt<1>
input SE : UInt<1>
defname = gated_latch
module rvclkhdr :
input clock : Clock
input reset : Reset
output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
inst clkhdr of gated_latch @[lib.scala 334:26]
clkhdr.SE is invalid
clkhdr.EN is invalid
clkhdr.CK is invalid
clkhdr.Q is invalid
io.l1clk <= clkhdr.Q @[lib.scala 335:14]
clkhdr.CK <= io.clk @[lib.scala 336:18]
clkhdr.EN <= io.en @[lib.scala 337:18]
clkhdr.SE <= io.scan_mode @[lib.scala 338:18]
module exu_alu_ctl :
input clock : Clock
input reset : AsyncReset
output io : {dec_alu : {flip dec_i0_alu_decode_d : UInt<1>, flip dec_csr_ren_d : UInt<1>, flip dec_i0_br_immed_d : UInt<12>, exu_i0_pc_x : UInt<31>}, flip csr_rddata_in : UInt<32>, flip dec_i0_pc_d : UInt<31>, flip scan_mode : UInt<1>, flip flush_upper_x : UInt<1>, flip dec_tlu_flush_lower_r : UInt<1>, flip enable : UInt<1>, flip i0_ap : {clz : UInt<1>, ctz : UInt<1>, pcnt : UInt<1>, sext_b : UInt<1>, sext_h : UInt<1>, slo : UInt<1>, sro : UInt<1>, min : UInt<1>, max : UInt<1>, pack : UInt<1>, packu : UInt<1>, packh : UInt<1>, rol : UInt<1>, ror : UInt<1>, grev : UInt<1>, gorc : UInt<1>, zbb : UInt<1>, sbset : UInt<1>, sbclr : UInt<1>, sbinv : UInt<1>, sbext : UInt<1>, sh1add : UInt<1>, sh2add : UInt<1>, sh3add : UInt<1>, zba : UInt<1>, land : UInt<1>, lor : UInt<1>, lxor : UInt<1>, sll : UInt<1>, srl : UInt<1>, sra : UInt<1>, beq : UInt<1>, bne : UInt<1>, blt : UInt<1>, bge : UInt<1>, add : UInt<1>, sub : UInt<1>, slt : UInt<1>, unsign : UInt<1>, jal : UInt<1>, predict_t : UInt<1>, predict_nt : UInt<1>, csr_write : UInt<1>, csr_imm : UInt<1>}, flip a_in : SInt<32>, flip b_in : UInt<32>, flip pp_in : {valid : UInt<1>, bits : {misp : UInt<1>, ataken : UInt<1>, boffset : UInt<1>, pc4 : UInt<1>, hist : UInt<2>, toffset : UInt<12>, br_error : UInt<1>, br_start_error : UInt<1>, prett : UInt<31>, pcall : UInt<1>, pret : UInt<1>, pja : UInt<1>, way : UInt<1>}}, result_ff : UInt<32>, flush_upper_out : UInt<1>, flush_final_out : UInt<1>, flush_path_out : UInt<31>, pred_correct_out : UInt<1>, predict_p_out : {valid : UInt<1>, bits : {misp : UInt<1>, ataken : UInt<1>, boffset : UInt<1>, pc4 : UInt<1>, hist : UInt<2>, toffset : UInt<12>, br_error : UInt<1>, br_start_error : UInt<1>, prett : UInt<31>, pcall : UInt<1>, pret : UInt<1>, pja : UInt<1>, way : UInt<1>}}}
wire ap_clz : UInt<1>
ap_clz <= UInt<1>("h00")
wire ap_ctz : UInt<1>
ap_ctz <= UInt<1>("h00")
wire ap_pcnt : UInt<1>
ap_pcnt <= UInt<1>("h00")
wire ap_sext_b : UInt<1>
ap_sext_b <= UInt<1>("h00")
wire ap_sext_h : UInt<1>
ap_sext_h <= UInt<1>("h00")
wire ap_min : UInt<1>
ap_min <= UInt<1>("h00")
wire ap_max : UInt<1>
ap_max <= UInt<1>("h00")
wire ap_pack : UInt<1>
ap_pack <= UInt<1>("h00")
wire ap_packu : UInt<1>
ap_packu <= UInt<1>("h00")
wire ap_packh : UInt<1>
ap_packh <= UInt<1>("h00")
wire ap_rol : UInt<1>
ap_rol <= UInt<1>("h00")
wire ap_ror : UInt<1>
ap_ror <= UInt<1>("h00")
wire ap_rev : UInt<1>
ap_rev <= UInt<1>("h00")
wire ap_rev8 : UInt<1>
ap_rev8 <= UInt<1>("h00")
wire ap_orc_b : UInt<1>
ap_orc_b <= UInt<1>("h00")
wire ap_orc16 : UInt<1>
ap_orc16 <= UInt<1>("h00")
wire ap_zbb : UInt<1>
ap_zbb <= UInt<1>("h00")
wire ap_sbset : UInt<1>
ap_sbset <= UInt<1>("h00")
wire ap_sbclr : UInt<1>
ap_sbclr <= UInt<1>("h00")
wire ap_sbinv : UInt<1>
ap_sbinv <= UInt<1>("h00")
wire ap_sbext : UInt<1>
ap_sbext <= UInt<1>("h00")
wire ap_slo : UInt<1>
ap_slo <= UInt<1>("h00")
wire ap_sro : UInt<1>
ap_sro <= UInt<1>("h00")
wire ap_sh1add : UInt<1>
ap_sh1add <= UInt<1>("h00")
wire ap_sh2add : UInt<1>
ap_sh2add <= UInt<1>("h00")
wire ap_sh3add : UInt<1>
ap_sh3add <= UInt<1>("h00")
wire ap_zba : UInt<1>
ap_zba <= UInt<1>("h00")
ap_clz <= io.i0_ap.clz @[exu_alu_ctl.scala 65:21]
ap_ctz <= io.i0_ap.ctz @[exu_alu_ctl.scala 66:21]
ap_pcnt <= io.i0_ap.pcnt @[exu_alu_ctl.scala 67:21]
ap_sext_b <= io.i0_ap.sext_b @[exu_alu_ctl.scala 68:21]
ap_sext_h <= io.i0_ap.sext_h @[exu_alu_ctl.scala 69:21]
ap_min <= io.i0_ap.min @[exu_alu_ctl.scala 70:21]
ap_max <= io.i0_ap.max @[exu_alu_ctl.scala 71:21]
ap_pack <= io.i0_ap.pack @[exu_alu_ctl.scala 82:21]
ap_packu <= io.i0_ap.packu @[exu_alu_ctl.scala 83:21]
ap_packh <= io.i0_ap.packh @[exu_alu_ctl.scala 84:21]
ap_rol <= io.i0_ap.rol @[exu_alu_ctl.scala 85:21]
ap_ror <= io.i0_ap.ror @[exu_alu_ctl.scala 86:21]
node _T = bits(io.b_in, 4, 0) @[exu_alu_ctl.scala 87:49]
node _T_1 = eq(_T, UInt<5>("h01f")) @[exu_alu_ctl.scala 87:55]
node _T_2 = and(io.i0_ap.grev, _T_1) @[exu_alu_ctl.scala 87:39]
ap_rev <= _T_2 @[exu_alu_ctl.scala 87:21]
node _T_3 = bits(io.b_in, 4, 0) @[exu_alu_ctl.scala 88:49]
node _T_4 = eq(_T_3, UInt<5>("h018")) @[exu_alu_ctl.scala 88:55]
node _T_5 = and(io.i0_ap.grev, _T_4) @[exu_alu_ctl.scala 88:39]
ap_rev8 <= _T_5 @[exu_alu_ctl.scala 88:21]
node _T_6 = bits(io.b_in, 4, 0) @[exu_alu_ctl.scala 89:49]
node _T_7 = eq(_T_6, UInt<3>("h07")) @[exu_alu_ctl.scala 89:55]
node _T_8 = and(io.i0_ap.gorc, _T_7) @[exu_alu_ctl.scala 89:39]
ap_orc_b <= _T_8 @[exu_alu_ctl.scala 89:21]
node _T_9 = bits(io.b_in, 4, 0) @[exu_alu_ctl.scala 90:49]
node _T_10 = eq(_T_9, UInt<5>("h010")) @[exu_alu_ctl.scala 90:55]
node _T_11 = and(io.i0_ap.gorc, _T_10) @[exu_alu_ctl.scala 90:39]
ap_orc16 <= _T_11 @[exu_alu_ctl.scala 90:21]
ap_zbb <= io.i0_ap.zbb @[exu_alu_ctl.scala 91:21]
ap_sbset <= io.i0_ap.sbset @[exu_alu_ctl.scala 105:21]
ap_sbclr <= io.i0_ap.sbclr @[exu_alu_ctl.scala 106:21]
ap_sbinv <= io.i0_ap.sbinv @[exu_alu_ctl.scala 107:21]
ap_sbext <= io.i0_ap.sbext @[exu_alu_ctl.scala 108:21]
ap_slo <= UInt<1>("h00") @[exu_alu_ctl.scala 119:21]
ap_sro <= UInt<1>("h00") @[exu_alu_ctl.scala 120:21]
ap_sh1add <= UInt<1>("h00") @[exu_alu_ctl.scala 128:21]
ap_sh2add <= UInt<1>("h00") @[exu_alu_ctl.scala 129:21]
ap_sh3add <= UInt<1>("h00") @[exu_alu_ctl.scala 130:21]
ap_zba <= UInt<1>("h00") @[exu_alu_ctl.scala 131:21]
node _T_12 = bits(io.scan_mode, 0, 0) @[exu_alu_ctl.scala 133:104]
wire _T_13 : UInt<31> @[lib.scala 598:38]
_T_13 <= UInt<1>("h00") @[lib.scala 598:38]
reg _T_14 : UInt, clock with : (reset => (reset, _T_13)) @[Reg.scala 27:20]
when io.enable : @[Reg.scala 28:19]
_T_14 <= io.dec_i0_pc_d @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
io.dec_alu.exu_i0_pc_x <= _T_14 @[exu_alu_ctl.scala 133:26]
wire result : UInt<32>
result <= UInt<1>("h00")
node _T_15 = and(io.enable, io.dec_alu.dec_i0_alu_decode_d) @[exu_alu_ctl.scala 135:43]
node _T_16 = bits(_T_15, 0, 0) @[lib.scala 8:44]
node _T_17 = bits(io.scan_mode, 0, 0) @[exu_alu_ctl.scala 135:95]
inst rvclkhdr of rvclkhdr @[lib.scala 399:23]
rvclkhdr.clock <= clock
rvclkhdr.reset <= reset
rvclkhdr.io.clk <= clock @[lib.scala 401:18]
rvclkhdr.io.en <= _T_16 @[lib.scala 402:17]
rvclkhdr.io.scan_mode <= UInt<1>("h00") @[lib.scala 403:24]
reg _T_18 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_16 : @[Reg.scala 28:19]
_T_18 <= result @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
io.result_ff <= _T_18 @[exu_alu_ctl.scala 135:16]
node _T_19 = bits(io.a_in, 30, 0) @[exu_alu_ctl.scala 138:29]
node _T_20 = cat(_T_19, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_21 = asSInt(_T_20) @[exu_alu_ctl.scala 138:46]
node _T_22 = bits(io.a_in, 29, 0) @[exu_alu_ctl.scala 139:29]
node _T_23 = cat(_T_22, UInt<2>("h00")) @[Cat.scala 29:58]
node _T_24 = asSInt(_T_23) @[exu_alu_ctl.scala 139:46]
node _T_25 = bits(io.a_in, 28, 0) @[exu_alu_ctl.scala 140:29]
node _T_26 = cat(_T_25, UInt<3>("h00")) @[Cat.scala 29:58]
node _T_27 = asSInt(_T_26) @[exu_alu_ctl.scala 140:46]
node _T_28 = not(ap_zba) @[exu_alu_ctl.scala 141:5]
wire _T_29 : SInt<32> @[Mux.scala 27:72]
node _T_30 = asUInt(_T_21) @[Mux.scala 27:72]
node _T_31 = asSInt(_T_30) @[Mux.scala 27:72]
_T_29 <= _T_31 @[Mux.scala 27:72]
wire _T_32 : SInt<32> @[Mux.scala 27:72]
node _T_33 = asUInt(_T_24) @[Mux.scala 27:72]
node _T_34 = asSInt(_T_33) @[Mux.scala 27:72]
_T_32 <= _T_34 @[Mux.scala 27:72]
wire _T_35 : SInt<32> @[Mux.scala 27:72]
node _T_36 = asUInt(_T_27) @[Mux.scala 27:72]
node _T_37 = asSInt(_T_36) @[Mux.scala 27:72]
_T_35 <= _T_37 @[Mux.scala 27:72]
wire _T_38 : SInt<32> @[Mux.scala 27:72]
node _T_39 = asUInt(io.a_in) @[Mux.scala 27:72]
node _T_40 = asSInt(_T_39) @[Mux.scala 27:72]
_T_38 <= _T_40 @[Mux.scala 27:72]
node _T_41 = mux(ap_sh1add, _T_29, asSInt(UInt<1>("h00"))) @[Mux.scala 27:72]
node _T_42 = mux(ap_sh2add, _T_32, asSInt(UInt<1>("h00"))) @[Mux.scala 27:72]
node _T_43 = mux(ap_sh3add, _T_35, asSInt(UInt<1>("h00"))) @[Mux.scala 27:72]
node _T_44 = mux(_T_28, _T_38, asSInt(UInt<1>("h00"))) @[Mux.scala 27:72]
node _T_45 = or(_T_41, _T_42) @[Mux.scala 27:72]
node _T_46 = asSInt(_T_45) @[Mux.scala 27:72]
node _T_47 = or(_T_46, _T_43) @[Mux.scala 27:72]
node _T_48 = asSInt(_T_47) @[Mux.scala 27:72]
node _T_49 = or(_T_48, _T_44) @[Mux.scala 27:72]
node _T_50 = asSInt(_T_49) @[Mux.scala 27:72]
wire zba_a_in : SInt<32> @[Mux.scala 27:72]
node _T_51 = asUInt(_T_50) @[Mux.scala 27:72]
node _T_52 = asSInt(_T_51) @[Mux.scala 27:72]
zba_a_in <= _T_52 @[Mux.scala 27:72]
node _T_53 = bits(io.i0_ap.sub, 0, 0) @[exu_alu_ctl.scala 143:32]
node _T_54 = not(io.b_in) @[exu_alu_ctl.scala 143:40]
node bm = mux(_T_53, _T_54, io.b_in) @[exu_alu_ctl.scala 143:17]
wire aout : UInt<33>
aout <= UInt<1>("h00")
node _T_55 = bits(io.i0_ap.sub, 0, 0) @[exu_alu_ctl.scala 146:28]
node _T_56 = asUInt(zba_a_in) @[Cat.scala 29:58]
node _T_57 = cat(UInt<1>("h00"), _T_56) @[Cat.scala 29:58]
node _T_58 = not(io.b_in) @[exu_alu_ctl.scala 146:74]
node _T_59 = cat(UInt<1>("h00"), _T_58) @[Cat.scala 29:58]
node _T_60 = add(_T_57, _T_59) @[exu_alu_ctl.scala 146:59]
node _T_61 = tail(_T_60, 1) @[exu_alu_ctl.scala 146:59]
node _T_62 = cat(UInt<32>("h00"), io.i0_ap.sub) @[Cat.scala 29:58]
node _T_63 = add(_T_61, _T_62) @[exu_alu_ctl.scala 146:84]
node _T_64 = tail(_T_63, 1) @[exu_alu_ctl.scala 146:84]
node _T_65 = asUInt(io.a_in) @[Cat.scala 29:58]
node _T_66 = cat(UInt<1>("h00"), _T_65) @[Cat.scala 29:58]
node _T_67 = cat(UInt<1>("h00"), io.b_in) @[Cat.scala 29:58]
node _T_68 = add(_T_66, _T_67) @[exu_alu_ctl.scala 146:139]
node _T_69 = tail(_T_68, 1) @[exu_alu_ctl.scala 146:139]
node _T_70 = cat(UInt<32>("h00"), io.i0_ap.sub) @[Cat.scala 29:58]
node _T_71 = add(_T_69, _T_70) @[exu_alu_ctl.scala 146:164]
node _T_72 = tail(_T_71, 1) @[exu_alu_ctl.scala 146:164]
node _T_73 = mux(_T_55, _T_64, _T_72) @[exu_alu_ctl.scala 146:14]
aout <= _T_73 @[exu_alu_ctl.scala 146:8]
node cout = bits(aout, 32, 32) @[exu_alu_ctl.scala 147:18]
node _T_74 = bits(io.a_in, 31, 31) @[exu_alu_ctl.scala 149:22]
node _T_75 = eq(_T_74, UInt<1>("h00")) @[exu_alu_ctl.scala 149:14]
node _T_76 = bits(bm, 31, 31) @[exu_alu_ctl.scala 149:32]
node _T_77 = eq(_T_76, UInt<1>("h00")) @[exu_alu_ctl.scala 149:29]
node _T_78 = and(_T_75, _T_77) @[exu_alu_ctl.scala 149:27]
node _T_79 = bits(aout, 31, 31) @[exu_alu_ctl.scala 149:44]
node _T_80 = and(_T_78, _T_79) @[exu_alu_ctl.scala 149:37]
node _T_81 = bits(io.a_in, 31, 31) @[exu_alu_ctl.scala 149:61]
node _T_82 = bits(bm, 31, 31) @[exu_alu_ctl.scala 149:71]
node _T_83 = and(_T_81, _T_82) @[exu_alu_ctl.scala 149:66]
node _T_84 = bits(aout, 31, 31) @[exu_alu_ctl.scala 149:83]
node _T_85 = eq(_T_84, UInt<1>("h00")) @[exu_alu_ctl.scala 149:78]
node _T_86 = and(_T_83, _T_85) @[exu_alu_ctl.scala 149:76]
node ov = or(_T_80, _T_86) @[exu_alu_ctl.scala 149:50]
node _T_87 = asSInt(io.b_in) @[exu_alu_ctl.scala 151:50]
node eq = eq(io.a_in, _T_87) @[exu_alu_ctl.scala 151:38]
node ne = not(eq) @[exu_alu_ctl.scala 152:29]
node neg = bits(aout, 31, 31) @[exu_alu_ctl.scala 153:34]
node _T_88 = eq(io.i0_ap.unsign, UInt<1>("h00")) @[exu_alu_ctl.scala 154:30]
node _T_89 = xor(neg, ov) @[exu_alu_ctl.scala 154:54]
node _T_90 = and(_T_88, _T_89) @[exu_alu_ctl.scala 154:47]
node _T_91 = eq(cout, UInt<1>("h00")) @[exu_alu_ctl.scala 154:84]
node _T_92 = and(io.i0_ap.unsign, _T_91) @[exu_alu_ctl.scala 154:82]
node lt = or(_T_90, _T_92) @[exu_alu_ctl.scala 154:61]
node ge = eq(lt, UInt<1>("h00")) @[exu_alu_ctl.scala 155:29]
node _T_93 = asSInt(io.csr_rddata_in) @[exu_alu_ctl.scala 159:62]
node _T_94 = eq(ap_zbb, UInt<1>("h00")) @[exu_alu_ctl.scala 160:22]
node _T_95 = and(io.i0_ap.land, _T_94) @[exu_alu_ctl.scala 160:20]
node _T_96 = bits(_T_95, 0, 0) @[exu_alu_ctl.scala 160:31]
node _T_97 = asUInt(io.a_in) @[Cat.scala 29:58]
node _T_98 = cat(UInt<1>("h00"), _T_97) @[Cat.scala 29:58]
node _T_99 = asSInt(_T_98) @[exu_alu_ctl.scala 160:67]
node _T_100 = asSInt(io.b_in) @[exu_alu_ctl.scala 160:85]
node _T_101 = and(_T_99, _T_100) @[exu_alu_ctl.scala 160:74]
node _T_102 = asSInt(_T_101) @[exu_alu_ctl.scala 160:74]
node _T_103 = eq(ap_zbb, UInt<1>("h00")) @[exu_alu_ctl.scala 161:22]
node _T_104 = and(io.i0_ap.lor, _T_103) @[exu_alu_ctl.scala 161:20]
node _T_105 = bits(_T_104, 0, 0) @[exu_alu_ctl.scala 161:31]
node _T_106 = asUInt(io.a_in) @[Cat.scala 29:58]
node _T_107 = cat(UInt<1>("h00"), _T_106) @[Cat.scala 29:58]
node _T_108 = asSInt(_T_107) @[exu_alu_ctl.scala 161:67]
node _T_109 = asSInt(io.b_in) @[exu_alu_ctl.scala 161:85]
node _T_110 = or(_T_108, _T_109) @[exu_alu_ctl.scala 161:74]
node _T_111 = asSInt(_T_110) @[exu_alu_ctl.scala 161:74]
node _T_112 = eq(ap_zbb, UInt<1>("h00")) @[exu_alu_ctl.scala 162:22]
node _T_113 = and(io.i0_ap.lxor, _T_112) @[exu_alu_ctl.scala 162:20]
node _T_114 = bits(_T_113, 0, 0) @[exu_alu_ctl.scala 162:31]
node _T_115 = asUInt(io.a_in) @[Cat.scala 29:58]
node _T_116 = cat(UInt<1>("h00"), _T_115) @[Cat.scala 29:58]
node _T_117 = asSInt(_T_116) @[exu_alu_ctl.scala 162:67]
node _T_118 = asSInt(io.b_in) @[exu_alu_ctl.scala 162:85]
node _T_119 = xor(_T_117, _T_118) @[exu_alu_ctl.scala 162:74]
node _T_120 = asSInt(_T_119) @[exu_alu_ctl.scala 162:74]
node _T_121 = and(io.i0_ap.land, ap_zbb) @[exu_alu_ctl.scala 163:20]
node _T_122 = bits(_T_121, 0, 0) @[exu_alu_ctl.scala 163:31]
node _T_123 = asUInt(io.a_in) @[Cat.scala 29:58]
node _T_124 = cat(UInt<1>("h00"), _T_123) @[Cat.scala 29:58]
node _T_125 = asSInt(_T_124) @[exu_alu_ctl.scala 163:67]
node _T_126 = asSInt(io.b_in) @[exu_alu_ctl.scala 163:85]
node _T_127 = not(_T_126) @[exu_alu_ctl.scala 163:76]
node _T_128 = asSInt(_T_127) @[exu_alu_ctl.scala 163:76]
node _T_129 = and(_T_125, _T_128) @[exu_alu_ctl.scala 163:74]
node _T_130 = asSInt(_T_129) @[exu_alu_ctl.scala 163:74]
node _T_131 = and(io.i0_ap.lor, ap_zbb) @[exu_alu_ctl.scala 164:20]
node _T_132 = bits(_T_131, 0, 0) @[exu_alu_ctl.scala 164:31]
node _T_133 = asUInt(io.a_in) @[Cat.scala 29:58]
node _T_134 = cat(UInt<1>("h00"), _T_133) @[Cat.scala 29:58]
node _T_135 = asSInt(_T_134) @[exu_alu_ctl.scala 164:67]
node _T_136 = asSInt(io.b_in) @[exu_alu_ctl.scala 164:85]
node _T_137 = not(_T_136) @[exu_alu_ctl.scala 164:76]
node _T_138 = asSInt(_T_137) @[exu_alu_ctl.scala 164:76]
node _T_139 = or(_T_135, _T_138) @[exu_alu_ctl.scala 164:74]
node _T_140 = asSInt(_T_139) @[exu_alu_ctl.scala 164:74]
node _T_141 = and(io.i0_ap.lxor, ap_zbb) @[exu_alu_ctl.scala 165:20]
node _T_142 = bits(_T_141, 0, 0) @[exu_alu_ctl.scala 165:31]
node _T_143 = asUInt(io.a_in) @[Cat.scala 29:58]
node _T_144 = cat(UInt<1>("h00"), _T_143) @[Cat.scala 29:58]
node _T_145 = asSInt(_T_144) @[exu_alu_ctl.scala 165:67]
node _T_146 = asSInt(io.b_in) @[exu_alu_ctl.scala 165:85]
node _T_147 = not(_T_146) @[exu_alu_ctl.scala 165:76]
node _T_148 = asSInt(_T_147) @[exu_alu_ctl.scala 165:76]
node _T_149 = xor(_T_145, _T_148) @[exu_alu_ctl.scala 165:74]
node _T_150 = asSInt(_T_149) @[exu_alu_ctl.scala 165:74]
wire _T_151 : SInt<33> @[Mux.scala 27:72]
node _T_152 = asUInt(_T_93) @[Mux.scala 27:72]
node _T_153 = asSInt(_T_152) @[Mux.scala 27:72]
_T_151 <= _T_153 @[Mux.scala 27:72]
wire _T_154 : SInt<33> @[Mux.scala 27:72]
node _T_155 = asUInt(_T_102) @[Mux.scala 27:72]
node _T_156 = asSInt(_T_155) @[Mux.scala 27:72]
_T_154 <= _T_156 @[Mux.scala 27:72]
wire _T_157 : SInt<33> @[Mux.scala 27:72]
node _T_158 = asUInt(_T_111) @[Mux.scala 27:72]
node _T_159 = asSInt(_T_158) @[Mux.scala 27:72]
_T_157 <= _T_159 @[Mux.scala 27:72]
wire _T_160 : SInt<33> @[Mux.scala 27:72]
node _T_161 = asUInt(_T_120) @[Mux.scala 27:72]
node _T_162 = asSInt(_T_161) @[Mux.scala 27:72]
_T_160 <= _T_162 @[Mux.scala 27:72]
wire _T_163 : SInt<33> @[Mux.scala 27:72]
node _T_164 = asUInt(_T_130) @[Mux.scala 27:72]
node _T_165 = asSInt(_T_164) @[Mux.scala 27:72]
_T_163 <= _T_165 @[Mux.scala 27:72]
wire _T_166 : SInt<33> @[Mux.scala 27:72]
node _T_167 = asUInt(_T_140) @[Mux.scala 27:72]
node _T_168 = asSInt(_T_167) @[Mux.scala 27:72]
_T_166 <= _T_168 @[Mux.scala 27:72]
wire _T_169 : SInt<33> @[Mux.scala 27:72]
node _T_170 = asUInt(_T_150) @[Mux.scala 27:72]
node _T_171 = asSInt(_T_170) @[Mux.scala 27:72]
_T_169 <= _T_171 @[Mux.scala 27:72]
node _T_172 = mux(io.dec_alu.dec_csr_ren_d, _T_151, asSInt(UInt<1>("h00"))) @[Mux.scala 27:72]
node _T_173 = mux(_T_96, _T_154, asSInt(UInt<1>("h00"))) @[Mux.scala 27:72]
node _T_174 = mux(_T_105, _T_157, asSInt(UInt<1>("h00"))) @[Mux.scala 27:72]
node _T_175 = mux(_T_114, _T_160, asSInt(UInt<1>("h00"))) @[Mux.scala 27:72]
node _T_176 = mux(_T_122, _T_163, asSInt(UInt<1>("h00"))) @[Mux.scala 27:72]
node _T_177 = mux(_T_132, _T_166, asSInt(UInt<1>("h00"))) @[Mux.scala 27:72]
node _T_178 = mux(_T_142, _T_169, asSInt(UInt<1>("h00"))) @[Mux.scala 27:72]
node _T_179 = or(_T_172, _T_173) @[Mux.scala 27:72]
node _T_180 = asSInt(_T_179) @[Mux.scala 27:72]
node _T_181 = or(_T_180, _T_174) @[Mux.scala 27:72]
node _T_182 = asSInt(_T_181) @[Mux.scala 27:72]
node _T_183 = or(_T_182, _T_175) @[Mux.scala 27:72]
node _T_184 = asSInt(_T_183) @[Mux.scala 27:72]
node _T_185 = or(_T_184, _T_176) @[Mux.scala 27:72]
node _T_186 = asSInt(_T_185) @[Mux.scala 27:72]
node _T_187 = or(_T_186, _T_177) @[Mux.scala 27:72]
node _T_188 = asSInt(_T_187) @[Mux.scala 27:72]
node _T_189 = or(_T_188, _T_178) @[Mux.scala 27:72]
node _T_190 = asSInt(_T_189) @[Mux.scala 27:72]
wire lout : SInt<33> @[Mux.scala 27:72]
node _T_191 = asUInt(_T_190) @[Mux.scala 27:72]
node _T_192 = asSInt(_T_191) @[Mux.scala 27:72]
lout <= _T_192 @[Mux.scala 27:72]
node _T_193 = bits(io.i0_ap.sll, 0, 0) @[exu_alu_ctl.scala 179:18]
node _T_194 = bits(io.b_in, 4, 0) @[exu_alu_ctl.scala 179:63]
node _T_195 = cat(UInt<1>("h00"), _T_194) @[Cat.scala 29:58]
node _T_196 = sub(UInt<6>("h020"), _T_195) @[exu_alu_ctl.scala 179:41]
node _T_197 = tail(_T_196, 1) @[exu_alu_ctl.scala 179:41]
node _T_198 = bits(io.i0_ap.srl, 0, 0) @[exu_alu_ctl.scala 180:18]
node _T_199 = bits(io.b_in, 4, 0) @[exu_alu_ctl.scala 180:63]
node _T_200 = cat(UInt<1>("h00"), _T_199) @[Cat.scala 29:58]
node _T_201 = bits(io.i0_ap.sra, 0, 0) @[exu_alu_ctl.scala 181:18]
node _T_202 = bits(io.b_in, 4, 0) @[exu_alu_ctl.scala 181:63]
node _T_203 = cat(UInt<1>("h00"), _T_202) @[Cat.scala 29:58]
node _T_204 = bits(io.b_in, 4, 0) @[exu_alu_ctl.scala 182:63]
node _T_205 = cat(UInt<1>("h00"), _T_204) @[Cat.scala 29:58]
node _T_206 = sub(UInt<6>("h020"), _T_205) @[exu_alu_ctl.scala 182:41]
node _T_207 = tail(_T_206, 1) @[exu_alu_ctl.scala 182:41]
node _T_208 = bits(io.b_in, 4, 0) @[exu_alu_ctl.scala 183:63]
node _T_209 = cat(UInt<1>("h00"), _T_208) @[Cat.scala 29:58]
node _T_210 = bits(io.b_in, 4, 0) @[exu_alu_ctl.scala 184:63]
node _T_211 = cat(UInt<1>("h00"), _T_210) @[Cat.scala 29:58]
node _T_212 = sub(UInt<6>("h020"), _T_211) @[exu_alu_ctl.scala 184:41]
node _T_213 = tail(_T_212, 1) @[exu_alu_ctl.scala 184:41]
node _T_214 = bits(io.b_in, 4, 0) @[exu_alu_ctl.scala 185:63]
node _T_215 = cat(UInt<1>("h00"), _T_214) @[Cat.scala 29:58]
node _T_216 = bits(io.b_in, 4, 0) @[exu_alu_ctl.scala 186:63]
node _T_217 = cat(UInt<1>("h00"), _T_216) @[Cat.scala 29:58]
node _T_218 = mux(_T_193, _T_197, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_219 = mux(_T_198, _T_200, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_220 = mux(_T_201, _T_203, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_221 = mux(ap_rol, _T_207, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_222 = mux(ap_ror, _T_209, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_223 = mux(ap_slo, _T_213, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_224 = mux(ap_sro, _T_215, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_225 = mux(ap_sbext, _T_217, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_226 = or(_T_218, _T_219) @[Mux.scala 27:72]
node _T_227 = or(_T_226, _T_220) @[Mux.scala 27:72]
node _T_228 = or(_T_227, _T_221) @[Mux.scala 27:72]
node _T_229 = or(_T_228, _T_222) @[Mux.scala 27:72]
node _T_230 = or(_T_229, _T_223) @[Mux.scala 27:72]
node _T_231 = or(_T_230, _T_224) @[Mux.scala 27:72]
node _T_232 = or(_T_231, _T_225) @[Mux.scala 27:72]
wire shift_amount : UInt<6> @[Mux.scala 27:72]
shift_amount <= _T_232 @[Mux.scala 27:72]
wire shift_mask : UInt<32>
shift_mask <= UInt<1>("h00")
node _T_233 = or(io.i0_ap.sll, ap_slo) @[exu_alu_ctl.scala 189:63]
wire _T_234 : UInt<1>[5] @[lib.scala 12:48]
_T_234[0] <= _T_233 @[lib.scala 12:48]
_T_234[1] <= _T_233 @[lib.scala 12:48]
_T_234[2] <= _T_233 @[lib.scala 12:48]
_T_234[3] <= _T_233 @[lib.scala 12:48]
_T_234[4] <= _T_233 @[lib.scala 12:48]
node _T_235 = cat(_T_234[0], _T_234[1]) @[Cat.scala 29:58]
node _T_236 = cat(_T_235, _T_234[2]) @[Cat.scala 29:58]
node _T_237 = cat(_T_236, _T_234[3]) @[Cat.scala 29:58]
node _T_238 = cat(_T_237, _T_234[4]) @[Cat.scala 29:58]
node _T_239 = bits(io.b_in, 4, 0) @[exu_alu_ctl.scala 189:82]
node _T_240 = and(_T_238, _T_239) @[exu_alu_ctl.scala 189:73]
node _T_241 = dshl(UInt<32>("h0ffffffff"), _T_240) @[exu_alu_ctl.scala 189:39]
shift_mask <= _T_241 @[exu_alu_ctl.scala 189:14]
wire shift_extend : UInt<63>
shift_extend <= UInt<1>("h00")
wire _T_242 : UInt<1>[31] @[lib.scala 12:48]
_T_242[0] <= io.i0_ap.sra @[lib.scala 12:48]
_T_242[1] <= io.i0_ap.sra @[lib.scala 12:48]
_T_242[2] <= io.i0_ap.sra @[lib.scala 12:48]
_T_242[3] <= io.i0_ap.sra @[lib.scala 12:48]
_T_242[4] <= io.i0_ap.sra @[lib.scala 12:48]
_T_242[5] <= io.i0_ap.sra @[lib.scala 12:48]
_T_242[6] <= io.i0_ap.sra @[lib.scala 12:48]
_T_242[7] <= io.i0_ap.sra @[lib.scala 12:48]
_T_242[8] <= io.i0_ap.sra @[lib.scala 12:48]
_T_242[9] <= io.i0_ap.sra @[lib.scala 12:48]
_T_242[10] <= io.i0_ap.sra @[lib.scala 12:48]
_T_242[11] <= io.i0_ap.sra @[lib.scala 12:48]
_T_242[12] <= io.i0_ap.sra @[lib.scala 12:48]
_T_242[13] <= io.i0_ap.sra @[lib.scala 12:48]
_T_242[14] <= io.i0_ap.sra @[lib.scala 12:48]
_T_242[15] <= io.i0_ap.sra @[lib.scala 12:48]
_T_242[16] <= io.i0_ap.sra @[lib.scala 12:48]
_T_242[17] <= io.i0_ap.sra @[lib.scala 12:48]
_T_242[18] <= io.i0_ap.sra @[lib.scala 12:48]
_T_242[19] <= io.i0_ap.sra @[lib.scala 12:48]
_T_242[20] <= io.i0_ap.sra @[lib.scala 12:48]
_T_242[21] <= io.i0_ap.sra @[lib.scala 12:48]
_T_242[22] <= io.i0_ap.sra @[lib.scala 12:48]
_T_242[23] <= io.i0_ap.sra @[lib.scala 12:48]
_T_242[24] <= io.i0_ap.sra @[lib.scala 12:48]
_T_242[25] <= io.i0_ap.sra @[lib.scala 12:48]
_T_242[26] <= io.i0_ap.sra @[lib.scala 12:48]
_T_242[27] <= io.i0_ap.sra @[lib.scala 12:48]
_T_242[28] <= io.i0_ap.sra @[lib.scala 12:48]
_T_242[29] <= io.i0_ap.sra @[lib.scala 12:48]
_T_242[30] <= io.i0_ap.sra @[lib.scala 12:48]
node _T_243 = cat(_T_242[0], _T_242[1]) @[Cat.scala 29:58]
node _T_244 = cat(_T_243, _T_242[2]) @[Cat.scala 29:58]
node _T_245 = cat(_T_244, _T_242[3]) @[Cat.scala 29:58]
node _T_246 = cat(_T_245, _T_242[4]) @[Cat.scala 29:58]
node _T_247 = cat(_T_246, _T_242[5]) @[Cat.scala 29:58]
node _T_248 = cat(_T_247, _T_242[6]) @[Cat.scala 29:58]
node _T_249 = cat(_T_248, _T_242[7]) @[Cat.scala 29:58]
node _T_250 = cat(_T_249, _T_242[8]) @[Cat.scala 29:58]
node _T_251 = cat(_T_250, _T_242[9]) @[Cat.scala 29:58]
node _T_252 = cat(_T_251, _T_242[10]) @[Cat.scala 29:58]
node _T_253 = cat(_T_252, _T_242[11]) @[Cat.scala 29:58]
node _T_254 = cat(_T_253, _T_242[12]) @[Cat.scala 29:58]
node _T_255 = cat(_T_254, _T_242[13]) @[Cat.scala 29:58]
node _T_256 = cat(_T_255, _T_242[14]) @[Cat.scala 29:58]
node _T_257 = cat(_T_256, _T_242[15]) @[Cat.scala 29:58]
node _T_258 = cat(_T_257, _T_242[16]) @[Cat.scala 29:58]
node _T_259 = cat(_T_258, _T_242[17]) @[Cat.scala 29:58]
node _T_260 = cat(_T_259, _T_242[18]) @[Cat.scala 29:58]
node _T_261 = cat(_T_260, _T_242[19]) @[Cat.scala 29:58]
node _T_262 = cat(_T_261, _T_242[20]) @[Cat.scala 29:58]
node _T_263 = cat(_T_262, _T_242[21]) @[Cat.scala 29:58]
node _T_264 = cat(_T_263, _T_242[22]) @[Cat.scala 29:58]
node _T_265 = cat(_T_264, _T_242[23]) @[Cat.scala 29:58]
node _T_266 = cat(_T_265, _T_242[24]) @[Cat.scala 29:58]
node _T_267 = cat(_T_266, _T_242[25]) @[Cat.scala 29:58]
node _T_268 = cat(_T_267, _T_242[26]) @[Cat.scala 29:58]
node _T_269 = cat(_T_268, _T_242[27]) @[Cat.scala 29:58]
node _T_270 = cat(_T_269, _T_242[28]) @[Cat.scala 29:58]
node _T_271 = cat(_T_270, _T_242[29]) @[Cat.scala 29:58]
node _T_272 = cat(_T_271, _T_242[30]) @[Cat.scala 29:58]
node _T_273 = bits(io.a_in, 31, 31) @[exu_alu_ctl.scala 192:64]
wire _T_274 : UInt<1>[31] @[lib.scala 12:48]
_T_274[0] <= _T_273 @[lib.scala 12:48]
_T_274[1] <= _T_273 @[lib.scala 12:48]
_T_274[2] <= _T_273 @[lib.scala 12:48]
_T_274[3] <= _T_273 @[lib.scala 12:48]
_T_274[4] <= _T_273 @[lib.scala 12:48]
_T_274[5] <= _T_273 @[lib.scala 12:48]
_T_274[6] <= _T_273 @[lib.scala 12:48]
_T_274[7] <= _T_273 @[lib.scala 12:48]
_T_274[8] <= _T_273 @[lib.scala 12:48]
_T_274[9] <= _T_273 @[lib.scala 12:48]
_T_274[10] <= _T_273 @[lib.scala 12:48]
_T_274[11] <= _T_273 @[lib.scala 12:48]
_T_274[12] <= _T_273 @[lib.scala 12:48]
_T_274[13] <= _T_273 @[lib.scala 12:48]
_T_274[14] <= _T_273 @[lib.scala 12:48]
_T_274[15] <= _T_273 @[lib.scala 12:48]
_T_274[16] <= _T_273 @[lib.scala 12:48]
_T_274[17] <= _T_273 @[lib.scala 12:48]
_T_274[18] <= _T_273 @[lib.scala 12:48]
_T_274[19] <= _T_273 @[lib.scala 12:48]
_T_274[20] <= _T_273 @[lib.scala 12:48]
_T_274[21] <= _T_273 @[lib.scala 12:48]
_T_274[22] <= _T_273 @[lib.scala 12:48]
_T_274[23] <= _T_273 @[lib.scala 12:48]
_T_274[24] <= _T_273 @[lib.scala 12:48]
_T_274[25] <= _T_273 @[lib.scala 12:48]
_T_274[26] <= _T_273 @[lib.scala 12:48]
_T_274[27] <= _T_273 @[lib.scala 12:48]
_T_274[28] <= _T_273 @[lib.scala 12:48]
_T_274[29] <= _T_273 @[lib.scala 12:48]
_T_274[30] <= _T_273 @[lib.scala 12:48]
node _T_275 = cat(_T_274[0], _T_274[1]) @[Cat.scala 29:58]
node _T_276 = cat(_T_275, _T_274[2]) @[Cat.scala 29:58]
node _T_277 = cat(_T_276, _T_274[3]) @[Cat.scala 29:58]
node _T_278 = cat(_T_277, _T_274[4]) @[Cat.scala 29:58]
node _T_279 = cat(_T_278, _T_274[5]) @[Cat.scala 29:58]
node _T_280 = cat(_T_279, _T_274[6]) @[Cat.scala 29:58]
node _T_281 = cat(_T_280, _T_274[7]) @[Cat.scala 29:58]
node _T_282 = cat(_T_281, _T_274[8]) @[Cat.scala 29:58]
node _T_283 = cat(_T_282, _T_274[9]) @[Cat.scala 29:58]
node _T_284 = cat(_T_283, _T_274[10]) @[Cat.scala 29:58]
node _T_285 = cat(_T_284, _T_274[11]) @[Cat.scala 29:58]
node _T_286 = cat(_T_285, _T_274[12]) @[Cat.scala 29:58]
node _T_287 = cat(_T_286, _T_274[13]) @[Cat.scala 29:58]
node _T_288 = cat(_T_287, _T_274[14]) @[Cat.scala 29:58]
node _T_289 = cat(_T_288, _T_274[15]) @[Cat.scala 29:58]
node _T_290 = cat(_T_289, _T_274[16]) @[Cat.scala 29:58]
node _T_291 = cat(_T_290, _T_274[17]) @[Cat.scala 29:58]
node _T_292 = cat(_T_291, _T_274[18]) @[Cat.scala 29:58]
node _T_293 = cat(_T_292, _T_274[19]) @[Cat.scala 29:58]
node _T_294 = cat(_T_293, _T_274[20]) @[Cat.scala 29:58]
node _T_295 = cat(_T_294, _T_274[21]) @[Cat.scala 29:58]
node _T_296 = cat(_T_295, _T_274[22]) @[Cat.scala 29:58]
node _T_297 = cat(_T_296, _T_274[23]) @[Cat.scala 29:58]
node _T_298 = cat(_T_297, _T_274[24]) @[Cat.scala 29:58]
node _T_299 = cat(_T_298, _T_274[25]) @[Cat.scala 29:58]
node _T_300 = cat(_T_299, _T_274[26]) @[Cat.scala 29:58]
node _T_301 = cat(_T_300, _T_274[27]) @[Cat.scala 29:58]
node _T_302 = cat(_T_301, _T_274[28]) @[Cat.scala 29:58]
node _T_303 = cat(_T_302, _T_274[29]) @[Cat.scala 29:58]
node _T_304 = cat(_T_303, _T_274[30]) @[Cat.scala 29:58]
node _T_305 = and(_T_272, _T_304) @[exu_alu_ctl.scala 192:47]
wire _T_306 : UInt<1>[31] @[lib.scala 12:48]
_T_306[0] <= io.i0_ap.sll @[lib.scala 12:48]
_T_306[1] <= io.i0_ap.sll @[lib.scala 12:48]
_T_306[2] <= io.i0_ap.sll @[lib.scala 12:48]
_T_306[3] <= io.i0_ap.sll @[lib.scala 12:48]
_T_306[4] <= io.i0_ap.sll @[lib.scala 12:48]
_T_306[5] <= io.i0_ap.sll @[lib.scala 12:48]
_T_306[6] <= io.i0_ap.sll @[lib.scala 12:48]
_T_306[7] <= io.i0_ap.sll @[lib.scala 12:48]
_T_306[8] <= io.i0_ap.sll @[lib.scala 12:48]
_T_306[9] <= io.i0_ap.sll @[lib.scala 12:48]
_T_306[10] <= io.i0_ap.sll @[lib.scala 12:48]
_T_306[11] <= io.i0_ap.sll @[lib.scala 12:48]
_T_306[12] <= io.i0_ap.sll @[lib.scala 12:48]
_T_306[13] <= io.i0_ap.sll @[lib.scala 12:48]
_T_306[14] <= io.i0_ap.sll @[lib.scala 12:48]
_T_306[15] <= io.i0_ap.sll @[lib.scala 12:48]
_T_306[16] <= io.i0_ap.sll @[lib.scala 12:48]
_T_306[17] <= io.i0_ap.sll @[lib.scala 12:48]
_T_306[18] <= io.i0_ap.sll @[lib.scala 12:48]
_T_306[19] <= io.i0_ap.sll @[lib.scala 12:48]
_T_306[20] <= io.i0_ap.sll @[lib.scala 12:48]
_T_306[21] <= io.i0_ap.sll @[lib.scala 12:48]
_T_306[22] <= io.i0_ap.sll @[lib.scala 12:48]
_T_306[23] <= io.i0_ap.sll @[lib.scala 12:48]
_T_306[24] <= io.i0_ap.sll @[lib.scala 12:48]
_T_306[25] <= io.i0_ap.sll @[lib.scala 12:48]
_T_306[26] <= io.i0_ap.sll @[lib.scala 12:48]
_T_306[27] <= io.i0_ap.sll @[lib.scala 12:48]
_T_306[28] <= io.i0_ap.sll @[lib.scala 12:48]
_T_306[29] <= io.i0_ap.sll @[lib.scala 12:48]
_T_306[30] <= io.i0_ap.sll @[lib.scala 12:48]
node _T_307 = cat(_T_306[0], _T_306[1]) @[Cat.scala 29:58]
node _T_308 = cat(_T_307, _T_306[2]) @[Cat.scala 29:58]
node _T_309 = cat(_T_308, _T_306[3]) @[Cat.scala 29:58]
node _T_310 = cat(_T_309, _T_306[4]) @[Cat.scala 29:58]
node _T_311 = cat(_T_310, _T_306[5]) @[Cat.scala 29:58]
node _T_312 = cat(_T_311, _T_306[6]) @[Cat.scala 29:58]
node _T_313 = cat(_T_312, _T_306[7]) @[Cat.scala 29:58]
node _T_314 = cat(_T_313, _T_306[8]) @[Cat.scala 29:58]
node _T_315 = cat(_T_314, _T_306[9]) @[Cat.scala 29:58]
node _T_316 = cat(_T_315, _T_306[10]) @[Cat.scala 29:58]
node _T_317 = cat(_T_316, _T_306[11]) @[Cat.scala 29:58]
node _T_318 = cat(_T_317, _T_306[12]) @[Cat.scala 29:58]
node _T_319 = cat(_T_318, _T_306[13]) @[Cat.scala 29:58]
node _T_320 = cat(_T_319, _T_306[14]) @[Cat.scala 29:58]
node _T_321 = cat(_T_320, _T_306[15]) @[Cat.scala 29:58]
node _T_322 = cat(_T_321, _T_306[16]) @[Cat.scala 29:58]
node _T_323 = cat(_T_322, _T_306[17]) @[Cat.scala 29:58]
node _T_324 = cat(_T_323, _T_306[18]) @[Cat.scala 29:58]
node _T_325 = cat(_T_324, _T_306[19]) @[Cat.scala 29:58]
node _T_326 = cat(_T_325, _T_306[20]) @[Cat.scala 29:58]
node _T_327 = cat(_T_326, _T_306[21]) @[Cat.scala 29:58]
node _T_328 = cat(_T_327, _T_306[22]) @[Cat.scala 29:58]
node _T_329 = cat(_T_328, _T_306[23]) @[Cat.scala 29:58]
node _T_330 = cat(_T_329, _T_306[24]) @[Cat.scala 29:58]
node _T_331 = cat(_T_330, _T_306[25]) @[Cat.scala 29:58]
node _T_332 = cat(_T_331, _T_306[26]) @[Cat.scala 29:58]
node _T_333 = cat(_T_332, _T_306[27]) @[Cat.scala 29:58]
node _T_334 = cat(_T_333, _T_306[28]) @[Cat.scala 29:58]
node _T_335 = cat(_T_334, _T_306[29]) @[Cat.scala 29:58]
node _T_336 = cat(_T_335, _T_306[30]) @[Cat.scala 29:58]
node _T_337 = bits(io.a_in, 30, 0) @[exu_alu_ctl.scala 192:105]
node _T_338 = and(_T_336, _T_337) @[exu_alu_ctl.scala 192:96]
node _T_339 = or(_T_305, _T_338) @[exu_alu_ctl.scala 192:71]
node _T_340 = asUInt(io.a_in) @[Cat.scala 29:58]
node _T_341 = cat(_T_339, _T_340) @[Cat.scala 29:58]
shift_extend <= _T_341 @[exu_alu_ctl.scala 192:16]
node _T_342 = bits(io.i0_ap.sra, 0, 0) @[exu_alu_ctl.scala 194:54]
node _T_343 = bits(io.a_in, 31, 31) @[exu_alu_ctl.scala 194:75]
node _T_344 = bits(_T_343, 0, 0) @[Bitwise.scala 72:15]
node _T_345 = mux(_T_344, UInt<31>("h07fffffff"), UInt<31>("h00")) @[Bitwise.scala 72:12]
node _T_346 = bits(io.i0_ap.sll, 0, 0) @[exu_alu_ctl.scala 195:24]
node _T_347 = bits(io.a_in, 30, 0) @[exu_alu_ctl.scala 195:41]
node _T_348 = bits(io.a_in, 30, 0) @[exu_alu_ctl.scala 196:41]
node _T_349 = bits(io.a_in, 30, 0) @[exu_alu_ctl.scala 197:41]
node _T_350 = bits(io.a_in, 30, 0) @[exu_alu_ctl.scala 198:41]
node _T_351 = mux(UInt<1>("h01"), UInt<31>("h07fffffff"), UInt<31>("h00")) @[Bitwise.scala 72:12]
node _T_352 = mux(_T_342, _T_345, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_353 = mux(_T_346, _T_347, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_354 = mux(ap_rol, _T_348, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_355 = mux(ap_ror, _T_349, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_356 = mux(ap_slo, _T_350, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_357 = mux(ap_sro, _T_351, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_358 = or(_T_352, _T_353) @[Mux.scala 27:72]
node _T_359 = or(_T_358, _T_354) @[Mux.scala 27:72]
node _T_360 = or(_T_359, _T_355) @[Mux.scala 27:72]
node _T_361 = or(_T_360, _T_356) @[Mux.scala 27:72]
node _T_362 = or(_T_361, _T_357) @[Mux.scala 27:72]
wire _T_363 : UInt<31> @[Mux.scala 27:72]
_T_363 <= _T_362 @[Mux.scala 27:72]
node _T_364 = asUInt(io.a_in) @[Cat.scala 29:58]
node _T_365 = cat(_T_363, _T_364) @[Cat.scala 29:58]
shift_extend <= _T_365 @[exu_alu_ctl.scala 194:16]
wire shift_long : UInt<63>
shift_long <= UInt<1>("h00")
node _T_366 = bits(shift_amount, 4, 0) @[exu_alu_ctl.scala 202:47]
node _T_367 = dshr(shift_extend, _T_366) @[exu_alu_ctl.scala 202:32]
shift_long <= _T_367 @[exu_alu_ctl.scala 202:14]
node _T_368 = bits(shift_long, 31, 0) @[exu_alu_ctl.scala 204:27]
node _T_369 = bits(shift_mask, 31, 0) @[exu_alu_ctl.scala 204:46]
node _T_370 = and(_T_368, _T_369) @[exu_alu_ctl.scala 204:34]
node _T_371 = bits(ap_slo, 0, 0) @[Bitwise.scala 72:15]
node _T_372 = mux(_T_371, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12]
node _T_373 = bits(shift_mask, 31, 0) @[exu_alu_ctl.scala 204:88]
node _T_374 = not(_T_373) @[exu_alu_ctl.scala 204:77]
node _T_375 = and(_T_372, _T_374) @[exu_alu_ctl.scala 204:75]
node sout = or(_T_370, _T_375) @[exu_alu_ctl.scala 204:55]
node _T_376 = bits(io.a_in, 0, 0) @[exu_alu_ctl.scala 208:74]
node _T_377 = bits(io.a_in, 1, 1) @[exu_alu_ctl.scala 208:74]
node _T_378 = bits(io.a_in, 2, 2) @[exu_alu_ctl.scala 208:74]
node _T_379 = bits(io.a_in, 3, 3) @[exu_alu_ctl.scala 208:74]
node _T_380 = bits(io.a_in, 4, 4) @[exu_alu_ctl.scala 208:74]
node _T_381 = bits(io.a_in, 5, 5) @[exu_alu_ctl.scala 208:74]
node _T_382 = bits(io.a_in, 6, 6) @[exu_alu_ctl.scala 208:74]
node _T_383 = bits(io.a_in, 7, 7) @[exu_alu_ctl.scala 208:74]
node _T_384 = bits(io.a_in, 8, 8) @[exu_alu_ctl.scala 208:74]
node _T_385 = bits(io.a_in, 9, 9) @[exu_alu_ctl.scala 208:74]
node _T_386 = bits(io.a_in, 10, 10) @[exu_alu_ctl.scala 208:74]
node _T_387 = bits(io.a_in, 11, 11) @[exu_alu_ctl.scala 208:74]
node _T_388 = bits(io.a_in, 12, 12) @[exu_alu_ctl.scala 208:74]
node _T_389 = bits(io.a_in, 13, 13) @[exu_alu_ctl.scala 208:74]
node _T_390 = bits(io.a_in, 14, 14) @[exu_alu_ctl.scala 208:74]
node _T_391 = bits(io.a_in, 15, 15) @[exu_alu_ctl.scala 208:74]
node _T_392 = bits(io.a_in, 16, 16) @[exu_alu_ctl.scala 208:74]
node _T_393 = bits(io.a_in, 17, 17) @[exu_alu_ctl.scala 208:74]
node _T_394 = bits(io.a_in, 18, 18) @[exu_alu_ctl.scala 208:74]
node _T_395 = bits(io.a_in, 19, 19) @[exu_alu_ctl.scala 208:74]
node _T_396 = bits(io.a_in, 20, 20) @[exu_alu_ctl.scala 208:74]
node _T_397 = bits(io.a_in, 21, 21) @[exu_alu_ctl.scala 208:74]
node _T_398 = bits(io.a_in, 22, 22) @[exu_alu_ctl.scala 208:74]
node _T_399 = bits(io.a_in, 23, 23) @[exu_alu_ctl.scala 208:74]
node _T_400 = bits(io.a_in, 24, 24) @[exu_alu_ctl.scala 208:74]
node _T_401 = bits(io.a_in, 25, 25) @[exu_alu_ctl.scala 208:74]
node _T_402 = bits(io.a_in, 26, 26) @[exu_alu_ctl.scala 208:74]
node _T_403 = bits(io.a_in, 27, 27) @[exu_alu_ctl.scala 208:74]
node _T_404 = bits(io.a_in, 28, 28) @[exu_alu_ctl.scala 208:74]
node _T_405 = bits(io.a_in, 29, 29) @[exu_alu_ctl.scala 208:74]
node _T_406 = bits(io.a_in, 30, 30) @[exu_alu_ctl.scala 208:74]
node _T_407 = bits(io.a_in, 31, 31) @[exu_alu_ctl.scala 208:74]
node _T_408 = cat(_T_376, _T_377) @[Cat.scala 29:58]
node _T_409 = cat(_T_408, _T_378) @[Cat.scala 29:58]
node _T_410 = cat(_T_409, _T_379) @[Cat.scala 29:58]
node _T_411 = cat(_T_410, _T_380) @[Cat.scala 29:58]
node _T_412 = cat(_T_411, _T_381) @[Cat.scala 29:58]
node _T_413 = cat(_T_412, _T_382) @[Cat.scala 29:58]
node _T_414 = cat(_T_413, _T_383) @[Cat.scala 29:58]
node _T_415 = cat(_T_414, _T_384) @[Cat.scala 29:58]
node _T_416 = cat(_T_415, _T_385) @[Cat.scala 29:58]
node _T_417 = cat(_T_416, _T_386) @[Cat.scala 29:58]
node _T_418 = cat(_T_417, _T_387) @[Cat.scala 29:58]
node _T_419 = cat(_T_418, _T_388) @[Cat.scala 29:58]
node _T_420 = cat(_T_419, _T_389) @[Cat.scala 29:58]
node _T_421 = cat(_T_420, _T_390) @[Cat.scala 29:58]
node _T_422 = cat(_T_421, _T_391) @[Cat.scala 29:58]
node _T_423 = cat(_T_422, _T_392) @[Cat.scala 29:58]
node _T_424 = cat(_T_423, _T_393) @[Cat.scala 29:58]
node _T_425 = cat(_T_424, _T_394) @[Cat.scala 29:58]
node _T_426 = cat(_T_425, _T_395) @[Cat.scala 29:58]
node _T_427 = cat(_T_426, _T_396) @[Cat.scala 29:58]
node _T_428 = cat(_T_427, _T_397) @[Cat.scala 29:58]
node _T_429 = cat(_T_428, _T_398) @[Cat.scala 29:58]
node _T_430 = cat(_T_429, _T_399) @[Cat.scala 29:58]
node _T_431 = cat(_T_430, _T_400) @[Cat.scala 29:58]
node _T_432 = cat(_T_431, _T_401) @[Cat.scala 29:58]
node _T_433 = cat(_T_432, _T_402) @[Cat.scala 29:58]
node _T_434 = cat(_T_433, _T_403) @[Cat.scala 29:58]
node _T_435 = cat(_T_434, _T_404) @[Cat.scala 29:58]
node _T_436 = cat(_T_435, _T_405) @[Cat.scala 29:58]
node _T_437 = cat(_T_436, _T_406) @[Cat.scala 29:58]
node bitmanip_a_reverse_ff = cat(_T_437, _T_407) @[Cat.scala 29:58]
node _T_438 = asSInt(bitmanip_a_reverse_ff) @[exu_alu_ctl.scala 214:93]
wire _T_439 : SInt<32> @[Mux.scala 27:72]
node _T_440 = asUInt(io.a_in) @[Mux.scala 27:72]
node _T_441 = asSInt(_T_440) @[Mux.scala 27:72]
_T_439 <= _T_441 @[Mux.scala 27:72]
wire _T_442 : SInt<32> @[Mux.scala 27:72]
node _T_443 = asUInt(_T_438) @[Mux.scala 27:72]
node _T_444 = asSInt(_T_443) @[Mux.scala 27:72]
_T_442 <= _T_444 @[Mux.scala 27:72]
node _T_445 = mux(ap_clz, _T_439, asSInt(UInt<1>("h00"))) @[Mux.scala 27:72]
node _T_446 = mux(ap_ctz, _T_442, asSInt(UInt<1>("h00"))) @[Mux.scala 27:72]
node _T_447 = or(_T_445, _T_446) @[Mux.scala 27:72]
node _T_448 = asSInt(_T_447) @[Mux.scala 27:72]
wire bitmanip_lzd_in : SInt<32> @[Mux.scala 27:72]
node _T_449 = asUInt(_T_448) @[Mux.scala 27:72]
node _T_450 = asSInt(_T_449) @[Mux.scala 27:72]
bitmanip_lzd_in <= _T_450 @[Mux.scala 27:72]
wire bitmanip_dw_lzd_enc : UInt<6>
bitmanip_dw_lzd_enc <= UInt<1>("h00")
node _T_451 = bits(bitmanip_lzd_in, 31, 0) @[exu_alu_ctl.scala 219:75]
node _T_452 = eq(_T_451, UInt<1>("h00")) @[exu_alu_ctl.scala 219:81]
node _T_453 = bits(bitmanip_lzd_in, 31, 1) @[exu_alu_ctl.scala 219:75]
node _T_454 = eq(_T_453, UInt<1>("h00")) @[exu_alu_ctl.scala 219:81]
node _T_455 = bits(bitmanip_lzd_in, 31, 2) @[exu_alu_ctl.scala 219:75]
node _T_456 = eq(_T_455, UInt<1>("h00")) @[exu_alu_ctl.scala 219:81]
node _T_457 = bits(bitmanip_lzd_in, 31, 3) @[exu_alu_ctl.scala 219:75]
node _T_458 = eq(_T_457, UInt<1>("h00")) @[exu_alu_ctl.scala 219:81]
node _T_459 = bits(bitmanip_lzd_in, 31, 4) @[exu_alu_ctl.scala 219:75]
node _T_460 = eq(_T_459, UInt<1>("h00")) @[exu_alu_ctl.scala 219:81]
node _T_461 = bits(bitmanip_lzd_in, 31, 5) @[exu_alu_ctl.scala 219:75]
node _T_462 = eq(_T_461, UInt<1>("h00")) @[exu_alu_ctl.scala 219:81]
node _T_463 = bits(bitmanip_lzd_in, 31, 6) @[exu_alu_ctl.scala 219:75]
node _T_464 = eq(_T_463, UInt<1>("h00")) @[exu_alu_ctl.scala 219:81]
node _T_465 = bits(bitmanip_lzd_in, 31, 7) @[exu_alu_ctl.scala 219:75]
node _T_466 = eq(_T_465, UInt<1>("h00")) @[exu_alu_ctl.scala 219:81]
node _T_467 = bits(bitmanip_lzd_in, 31, 8) @[exu_alu_ctl.scala 219:75]
node _T_468 = eq(_T_467, UInt<1>("h00")) @[exu_alu_ctl.scala 219:81]
node _T_469 = bits(bitmanip_lzd_in, 31, 9) @[exu_alu_ctl.scala 219:75]
node _T_470 = eq(_T_469, UInt<1>("h00")) @[exu_alu_ctl.scala 219:81]
node _T_471 = bits(bitmanip_lzd_in, 31, 10) @[exu_alu_ctl.scala 219:75]
node _T_472 = eq(_T_471, UInt<1>("h00")) @[exu_alu_ctl.scala 219:81]
node _T_473 = bits(bitmanip_lzd_in, 31, 11) @[exu_alu_ctl.scala 219:75]
node _T_474 = eq(_T_473, UInt<1>("h00")) @[exu_alu_ctl.scala 219:81]
node _T_475 = bits(bitmanip_lzd_in, 31, 12) @[exu_alu_ctl.scala 219:75]
node _T_476 = eq(_T_475, UInt<1>("h00")) @[exu_alu_ctl.scala 219:81]
node _T_477 = bits(bitmanip_lzd_in, 31, 13) @[exu_alu_ctl.scala 219:75]
node _T_478 = eq(_T_477, UInt<1>("h00")) @[exu_alu_ctl.scala 219:81]
node _T_479 = bits(bitmanip_lzd_in, 31, 14) @[exu_alu_ctl.scala 219:75]
node _T_480 = eq(_T_479, UInt<1>("h00")) @[exu_alu_ctl.scala 219:81]
node _T_481 = bits(bitmanip_lzd_in, 31, 15) @[exu_alu_ctl.scala 219:75]
node _T_482 = eq(_T_481, UInt<1>("h00")) @[exu_alu_ctl.scala 219:81]
node _T_483 = bits(bitmanip_lzd_in, 31, 16) @[exu_alu_ctl.scala 219:75]
node _T_484 = eq(_T_483, UInt<1>("h00")) @[exu_alu_ctl.scala 219:81]
node _T_485 = bits(bitmanip_lzd_in, 31, 17) @[exu_alu_ctl.scala 219:75]
node _T_486 = eq(_T_485, UInt<1>("h00")) @[exu_alu_ctl.scala 219:81]
node _T_487 = bits(bitmanip_lzd_in, 31, 18) @[exu_alu_ctl.scala 219:75]
node _T_488 = eq(_T_487, UInt<1>("h00")) @[exu_alu_ctl.scala 219:81]
node _T_489 = bits(bitmanip_lzd_in, 31, 19) @[exu_alu_ctl.scala 219:75]
node _T_490 = eq(_T_489, UInt<1>("h00")) @[exu_alu_ctl.scala 219:81]
node _T_491 = bits(bitmanip_lzd_in, 31, 20) @[exu_alu_ctl.scala 219:75]
node _T_492 = eq(_T_491, UInt<1>("h00")) @[exu_alu_ctl.scala 219:81]
node _T_493 = bits(bitmanip_lzd_in, 31, 21) @[exu_alu_ctl.scala 219:75]
node _T_494 = eq(_T_493, UInt<1>("h00")) @[exu_alu_ctl.scala 219:81]
node _T_495 = bits(bitmanip_lzd_in, 31, 22) @[exu_alu_ctl.scala 219:75]
node _T_496 = eq(_T_495, UInt<1>("h00")) @[exu_alu_ctl.scala 219:81]
node _T_497 = bits(bitmanip_lzd_in, 31, 23) @[exu_alu_ctl.scala 219:75]
node _T_498 = eq(_T_497, UInt<1>("h00")) @[exu_alu_ctl.scala 219:81]
node _T_499 = bits(bitmanip_lzd_in, 31, 24) @[exu_alu_ctl.scala 219:75]
node _T_500 = eq(_T_499, UInt<1>("h00")) @[exu_alu_ctl.scala 219:81]
node _T_501 = bits(bitmanip_lzd_in, 31, 25) @[exu_alu_ctl.scala 219:75]
node _T_502 = eq(_T_501, UInt<1>("h00")) @[exu_alu_ctl.scala 219:81]
node _T_503 = bits(bitmanip_lzd_in, 31, 26) @[exu_alu_ctl.scala 219:75]
node _T_504 = eq(_T_503, UInt<1>("h00")) @[exu_alu_ctl.scala 219:81]
node _T_505 = bits(bitmanip_lzd_in, 31, 27) @[exu_alu_ctl.scala 219:75]
node _T_506 = eq(_T_505, UInt<1>("h00")) @[exu_alu_ctl.scala 219:81]
node _T_507 = bits(bitmanip_lzd_in, 31, 28) @[exu_alu_ctl.scala 219:75]
node _T_508 = eq(_T_507, UInt<1>("h00")) @[exu_alu_ctl.scala 219:81]
node _T_509 = bits(bitmanip_lzd_in, 31, 29) @[exu_alu_ctl.scala 219:75]
node _T_510 = eq(_T_509, UInt<1>("h00")) @[exu_alu_ctl.scala 219:81]
node _T_511 = bits(bitmanip_lzd_in, 31, 30) @[exu_alu_ctl.scala 219:75]
node _T_512 = eq(_T_511, UInt<1>("h00")) @[exu_alu_ctl.scala 219:81]
node _T_513 = bits(bitmanip_lzd_in, 31, 31) @[exu_alu_ctl.scala 219:75]
node _T_514 = eq(_T_513, UInt<1>("h00")) @[exu_alu_ctl.scala 219:81]
node _T_515 = mux(_T_514, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 98:16]
node _T_516 = mux(_T_512, UInt<2>("h02"), _T_515) @[Mux.scala 98:16]
node _T_517 = mux(_T_510, UInt<2>("h03"), _T_516) @[Mux.scala 98:16]
node _T_518 = mux(_T_508, UInt<3>("h04"), _T_517) @[Mux.scala 98:16]
node _T_519 = mux(_T_506, UInt<3>("h05"), _T_518) @[Mux.scala 98:16]
node _T_520 = mux(_T_504, UInt<3>("h06"), _T_519) @[Mux.scala 98:16]
node _T_521 = mux(_T_502, UInt<3>("h07"), _T_520) @[Mux.scala 98:16]
node _T_522 = mux(_T_500, UInt<4>("h08"), _T_521) @[Mux.scala 98:16]
node _T_523 = mux(_T_498, UInt<4>("h09"), _T_522) @[Mux.scala 98:16]
node _T_524 = mux(_T_496, UInt<4>("h0a"), _T_523) @[Mux.scala 98:16]
node _T_525 = mux(_T_494, UInt<4>("h0b"), _T_524) @[Mux.scala 98:16]
node _T_526 = mux(_T_492, UInt<4>("h0c"), _T_525) @[Mux.scala 98:16]
node _T_527 = mux(_T_490, UInt<4>("h0d"), _T_526) @[Mux.scala 98:16]
node _T_528 = mux(_T_488, UInt<4>("h0e"), _T_527) @[Mux.scala 98:16]
node _T_529 = mux(_T_486, UInt<4>("h0f"), _T_528) @[Mux.scala 98:16]
node _T_530 = mux(_T_484, UInt<5>("h010"), _T_529) @[Mux.scala 98:16]
node _T_531 = mux(_T_482, UInt<5>("h011"), _T_530) @[Mux.scala 98:16]
node _T_532 = mux(_T_480, UInt<5>("h012"), _T_531) @[Mux.scala 98:16]
node _T_533 = mux(_T_478, UInt<5>("h013"), _T_532) @[Mux.scala 98:16]
node _T_534 = mux(_T_476, UInt<5>("h014"), _T_533) @[Mux.scala 98:16]
node _T_535 = mux(_T_474, UInt<5>("h015"), _T_534) @[Mux.scala 98:16]
node _T_536 = mux(_T_472, UInt<5>("h016"), _T_535) @[Mux.scala 98:16]
node _T_537 = mux(_T_470, UInt<5>("h017"), _T_536) @[Mux.scala 98:16]
node _T_538 = mux(_T_468, UInt<5>("h018"), _T_537) @[Mux.scala 98:16]
node _T_539 = mux(_T_466, UInt<5>("h019"), _T_538) @[Mux.scala 98:16]
node _T_540 = mux(_T_464, UInt<5>("h01a"), _T_539) @[Mux.scala 98:16]
node _T_541 = mux(_T_462, UInt<5>("h01b"), _T_540) @[Mux.scala 98:16]
node _T_542 = mux(_T_460, UInt<5>("h01c"), _T_541) @[Mux.scala 98:16]
node _T_543 = mux(_T_458, UInt<5>("h01d"), _T_542) @[Mux.scala 98:16]
node _T_544 = mux(_T_456, UInt<5>("h01e"), _T_543) @[Mux.scala 98:16]
node _T_545 = mux(_T_454, UInt<5>("h01f"), _T_544) @[Mux.scala 98:16]
node _T_546 = mux(_T_452, UInt<6>("h020"), _T_545) @[Mux.scala 98:16]
bitmanip_dw_lzd_enc <= _T_546 @[exu_alu_ctl.scala 219:23]
node _T_547 = or(ap_clz, ap_ctz) @[exu_alu_ctl.scala 221:52]
node _T_548 = bits(_T_547, 0, 0) @[Bitwise.scala 72:15]
node _T_549 = mux(_T_548, UInt<6>("h03f"), UInt<6>("h00")) @[Bitwise.scala 72:12]
node _T_550 = bits(bitmanip_dw_lzd_enc, 5, 5) @[exu_alu_ctl.scala 221:83]
node _T_551 = and(_T_549, _T_550) @[exu_alu_ctl.scala 221:62]
node _T_552 = bits(bitmanip_dw_lzd_enc, 5, 5) @[exu_alu_ctl.scala 221:116]
node _T_553 = eq(_T_552, UInt<1>("h00")) @[exu_alu_ctl.scala 221:96]
node _T_554 = bits(_T_553, 0, 0) @[Bitwise.scala 72:15]
node _T_555 = mux(_T_554, UInt<5>("h01f"), UInt<5>("h00")) @[Bitwise.scala 72:12]
node _T_556 = bits(bitmanip_dw_lzd_enc, 4, 0) @[exu_alu_ctl.scala 221:142]
node _T_557 = and(_T_555, _T_556) @[exu_alu_ctl.scala 221:121]
node bitmanip_clz_ctz_result = cat(_T_551, _T_557) @[Cat.scala 29:58]
node _T_558 = bits(ap_pcnt, 0, 0) @[Bitwise.scala 72:15]
node _T_559 = mux(_T_558, UInt<6>("h03f"), UInt<6>("h00")) @[Bitwise.scala 72:12]
node _T_560 = bits(io.a_in, 0, 0) @[Bitwise.scala 49:65]
node _T_561 = bits(io.a_in, 1, 1) @[Bitwise.scala 49:65]
node _T_562 = bits(io.a_in, 2, 2) @[Bitwise.scala 49:65]
node _T_563 = bits(io.a_in, 3, 3) @[Bitwise.scala 49:65]
node _T_564 = bits(io.a_in, 4, 4) @[Bitwise.scala 49:65]
node _T_565 = bits(io.a_in, 5, 5) @[Bitwise.scala 49:65]
node _T_566 = bits(io.a_in, 6, 6) @[Bitwise.scala 49:65]
node _T_567 = bits(io.a_in, 7, 7) @[Bitwise.scala 49:65]
node _T_568 = bits(io.a_in, 8, 8) @[Bitwise.scala 49:65]
node _T_569 = bits(io.a_in, 9, 9) @[Bitwise.scala 49:65]
node _T_570 = bits(io.a_in, 10, 10) @[Bitwise.scala 49:65]
node _T_571 = bits(io.a_in, 11, 11) @[Bitwise.scala 49:65]
node _T_572 = bits(io.a_in, 12, 12) @[Bitwise.scala 49:65]
node _T_573 = bits(io.a_in, 13, 13) @[Bitwise.scala 49:65]
node _T_574 = bits(io.a_in, 14, 14) @[Bitwise.scala 49:65]
node _T_575 = bits(io.a_in, 15, 15) @[Bitwise.scala 49:65]
node _T_576 = bits(io.a_in, 16, 16) @[Bitwise.scala 49:65]
node _T_577 = bits(io.a_in, 17, 17) @[Bitwise.scala 49:65]
node _T_578 = bits(io.a_in, 18, 18) @[Bitwise.scala 49:65]
node _T_579 = bits(io.a_in, 19, 19) @[Bitwise.scala 49:65]
node _T_580 = bits(io.a_in, 20, 20) @[Bitwise.scala 49:65]
node _T_581 = bits(io.a_in, 21, 21) @[Bitwise.scala 49:65]
node _T_582 = bits(io.a_in, 22, 22) @[Bitwise.scala 49:65]
node _T_583 = bits(io.a_in, 23, 23) @[Bitwise.scala 49:65]
node _T_584 = bits(io.a_in, 24, 24) @[Bitwise.scala 49:65]
node _T_585 = bits(io.a_in, 25, 25) @[Bitwise.scala 49:65]
node _T_586 = bits(io.a_in, 26, 26) @[Bitwise.scala 49:65]
node _T_587 = bits(io.a_in, 27, 27) @[Bitwise.scala 49:65]
node _T_588 = bits(io.a_in, 28, 28) @[Bitwise.scala 49:65]
node _T_589 = bits(io.a_in, 29, 29) @[Bitwise.scala 49:65]
node _T_590 = bits(io.a_in, 30, 30) @[Bitwise.scala 49:65]
node _T_591 = bits(io.a_in, 31, 31) @[Bitwise.scala 49:65]
node _T_592 = add(_T_560, _T_561) @[Bitwise.scala 47:55]
node _T_593 = bits(_T_592, 1, 0) @[Bitwise.scala 47:55]
node _T_594 = add(_T_562, _T_563) @[Bitwise.scala 47:55]
node _T_595 = bits(_T_594, 1, 0) @[Bitwise.scala 47:55]
node _T_596 = add(_T_593, _T_595) @[Bitwise.scala 47:55]
node _T_597 = bits(_T_596, 2, 0) @[Bitwise.scala 47:55]
node _T_598 = add(_T_564, _T_565) @[Bitwise.scala 47:55]
node _T_599 = bits(_T_598, 1, 0) @[Bitwise.scala 47:55]
node _T_600 = add(_T_566, _T_567) @[Bitwise.scala 47:55]
node _T_601 = bits(_T_600, 1, 0) @[Bitwise.scala 47:55]
node _T_602 = add(_T_599, _T_601) @[Bitwise.scala 47:55]
node _T_603 = bits(_T_602, 2, 0) @[Bitwise.scala 47:55]
node _T_604 = add(_T_597, _T_603) @[Bitwise.scala 47:55]
node _T_605 = bits(_T_604, 3, 0) @[Bitwise.scala 47:55]
node _T_606 = add(_T_568, _T_569) @[Bitwise.scala 47:55]
node _T_607 = bits(_T_606, 1, 0) @[Bitwise.scala 47:55]
node _T_608 = add(_T_570, _T_571) @[Bitwise.scala 47:55]
node _T_609 = bits(_T_608, 1, 0) @[Bitwise.scala 47:55]
node _T_610 = add(_T_607, _T_609) @[Bitwise.scala 47:55]
node _T_611 = bits(_T_610, 2, 0) @[Bitwise.scala 47:55]
node _T_612 = add(_T_572, _T_573) @[Bitwise.scala 47:55]
node _T_613 = bits(_T_612, 1, 0) @[Bitwise.scala 47:55]
node _T_614 = add(_T_574, _T_575) @[Bitwise.scala 47:55]
node _T_615 = bits(_T_614, 1, 0) @[Bitwise.scala 47:55]
node _T_616 = add(_T_613, _T_615) @[Bitwise.scala 47:55]
node _T_617 = bits(_T_616, 2, 0) @[Bitwise.scala 47:55]
node _T_618 = add(_T_611, _T_617) @[Bitwise.scala 47:55]
node _T_619 = bits(_T_618, 3, 0) @[Bitwise.scala 47:55]
node _T_620 = add(_T_605, _T_619) @[Bitwise.scala 47:55]
node _T_621 = bits(_T_620, 4, 0) @[Bitwise.scala 47:55]
node _T_622 = add(_T_576, _T_577) @[Bitwise.scala 47:55]
node _T_623 = bits(_T_622, 1, 0) @[Bitwise.scala 47:55]
node _T_624 = add(_T_578, _T_579) @[Bitwise.scala 47:55]
node _T_625 = bits(_T_624, 1, 0) @[Bitwise.scala 47:55]
node _T_626 = add(_T_623, _T_625) @[Bitwise.scala 47:55]
node _T_627 = bits(_T_626, 2, 0) @[Bitwise.scala 47:55]
node _T_628 = add(_T_580, _T_581) @[Bitwise.scala 47:55]
node _T_629 = bits(_T_628, 1, 0) @[Bitwise.scala 47:55]
node _T_630 = add(_T_582, _T_583) @[Bitwise.scala 47:55]
node _T_631 = bits(_T_630, 1, 0) @[Bitwise.scala 47:55]
node _T_632 = add(_T_629, _T_631) @[Bitwise.scala 47:55]
node _T_633 = bits(_T_632, 2, 0) @[Bitwise.scala 47:55]
node _T_634 = add(_T_627, _T_633) @[Bitwise.scala 47:55]
node _T_635 = bits(_T_634, 3, 0) @[Bitwise.scala 47:55]
node _T_636 = add(_T_584, _T_585) @[Bitwise.scala 47:55]
node _T_637 = bits(_T_636, 1, 0) @[Bitwise.scala 47:55]
node _T_638 = add(_T_586, _T_587) @[Bitwise.scala 47:55]
node _T_639 = bits(_T_638, 1, 0) @[Bitwise.scala 47:55]
node _T_640 = add(_T_637, _T_639) @[Bitwise.scala 47:55]
node _T_641 = bits(_T_640, 2, 0) @[Bitwise.scala 47:55]
node _T_642 = add(_T_588, _T_589) @[Bitwise.scala 47:55]
node _T_643 = bits(_T_642, 1, 0) @[Bitwise.scala 47:55]
node _T_644 = add(_T_590, _T_591) @[Bitwise.scala 47:55]
node _T_645 = bits(_T_644, 1, 0) @[Bitwise.scala 47:55]
node _T_646 = add(_T_643, _T_645) @[Bitwise.scala 47:55]
node _T_647 = bits(_T_646, 2, 0) @[Bitwise.scala 47:55]
node _T_648 = add(_T_641, _T_647) @[Bitwise.scala 47:55]
node _T_649 = bits(_T_648, 3, 0) @[Bitwise.scala 47:55]
node _T_650 = add(_T_635, _T_649) @[Bitwise.scala 47:55]
node _T_651 = bits(_T_650, 4, 0) @[Bitwise.scala 47:55]
node _T_652 = add(_T_621, _T_651) @[Bitwise.scala 47:55]
node _T_653 = bits(_T_652, 5, 0) @[Bitwise.scala 47:55]
node bitmanip_pcnt_result = and(_T_559, _T_653) @[exu_alu_ctl.scala 224:50]
node _T_654 = bits(io.a_in, 7, 7) @[exu_alu_ctl.scala 228:75]
node _T_655 = bits(_T_654, 0, 0) @[Bitwise.scala 72:15]
node _T_656 = mux(_T_655, UInt<24>("h0ffffff"), UInt<24>("h00")) @[Bitwise.scala 72:12]
node _T_657 = bits(io.a_in, 7, 0) @[exu_alu_ctl.scala 228:88]
node _T_658 = cat(_T_656, _T_657) @[Cat.scala 29:58]
node _T_659 = bits(io.a_in, 15, 15) @[exu_alu_ctl.scala 229:38]
node _T_660 = bits(_T_659, 0, 0) @[Bitwise.scala 72:15]
node _T_661 = mux(_T_660, UInt<16>("h0ffff"), UInt<16>("h00")) @[Bitwise.scala 72:12]
node _T_662 = bits(io.a_in, 15, 0) @[exu_alu_ctl.scala 229:51]
node _T_663 = cat(_T_661, _T_662) @[Cat.scala 29:58]
node _T_664 = mux(ap_sext_b, _T_658, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_665 = mux(ap_sext_h, _T_663, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_666 = or(_T_664, _T_665) @[Mux.scala 27:72]
wire bitmanip_sext_result : UInt<32> @[Mux.scala 27:72]
bitmanip_sext_result <= _T_666 @[Mux.scala 27:72]
node bitmanip_minmax_sel = or(ap_min, ap_max) @[exu_alu_ctl.scala 233:46]
node bitmanip_minmax_sel_a = xor(ge, ap_min) @[exu_alu_ctl.scala 235:43]
node _T_667 = and(bitmanip_minmax_sel, bitmanip_minmax_sel_a) @[exu_alu_ctl.scala 238:26]
node _T_668 = eq(bitmanip_minmax_sel_a, UInt<1>("h00")) @[exu_alu_ctl.scala 239:28]
node _T_669 = and(bitmanip_minmax_sel, _T_668) @[exu_alu_ctl.scala 239:26]
node _T_670 = asSInt(io.b_in) @[exu_alu_ctl.scala 239:65]
wire _T_671 : SInt<32> @[Mux.scala 27:72]
node _T_672 = asUInt(io.a_in) @[Mux.scala 27:72]
node _T_673 = asSInt(_T_672) @[Mux.scala 27:72]
_T_671 <= _T_673 @[Mux.scala 27:72]
wire _T_674 : SInt<32> @[Mux.scala 27:72]
node _T_675 = asUInt(_T_670) @[Mux.scala 27:72]
node _T_676 = asSInt(_T_675) @[Mux.scala 27:72]
_T_674 <= _T_676 @[Mux.scala 27:72]
node _T_677 = mux(_T_667, _T_671, asSInt(UInt<1>("h00"))) @[Mux.scala 27:72]
node _T_678 = mux(_T_669, _T_674, asSInt(UInt<1>("h00"))) @[Mux.scala 27:72]
node _T_679 = or(_T_677, _T_678) @[Mux.scala 27:72]
node _T_680 = asSInt(_T_679) @[Mux.scala 27:72]
wire bitmanip_minmax_result : SInt<32> @[Mux.scala 27:72]
node _T_681 = asUInt(_T_680) @[Mux.scala 27:72]
node _T_682 = asSInt(_T_681) @[Mux.scala 27:72]
bitmanip_minmax_result <= _T_682 @[Mux.scala 27:72]
node _T_683 = bits(ap_pack, 0, 0) @[Bitwise.scala 72:15]
node _T_684 = mux(_T_683, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12]
node _T_685 = bits(io.b_in, 15, 0) @[exu_alu_ctl.scala 244:63]
node _T_686 = bits(io.a_in, 15, 0) @[exu_alu_ctl.scala 244:78]
node _T_687 = cat(_T_685, _T_686) @[Cat.scala 29:58]
node bitmanip_pack_result = and(_T_684, _T_687) @[exu_alu_ctl.scala 244:50]
node _T_688 = bits(ap_packu, 0, 0) @[Bitwise.scala 72:15]
node _T_689 = mux(_T_688, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12]
node _T_690 = bits(io.b_in, 31, 16) @[exu_alu_ctl.scala 245:63]
node _T_691 = bits(io.a_in, 31, 16) @[exu_alu_ctl.scala 245:78]
node _T_692 = cat(_T_690, _T_691) @[Cat.scala 29:58]
node bitmanip_packu_result = and(_T_689, _T_692) @[exu_alu_ctl.scala 245:50]
node _T_693 = bits(ap_packh, 0, 0) @[Bitwise.scala 72:15]
node _T_694 = mux(_T_693, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12]
node _T_695 = bits(io.b_in, 7, 0) @[exu_alu_ctl.scala 246:73]
node _T_696 = bits(io.a_in, 7, 0) @[exu_alu_ctl.scala 246:86]
node _T_697 = cat(UInt<16>("h00"), _T_695) @[Cat.scala 29:58]
node _T_698 = cat(_T_697, _T_696) @[Cat.scala 29:58]
node bitmanip_packh_result = and(_T_694, _T_698) @[exu_alu_ctl.scala 246:50]
node _T_699 = bits(ap_rev, 0, 0) @[Bitwise.scala 72:15]
node _T_700 = mux(_T_699, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12]
node _T_701 = bits(io.a_in, 0, 0) @[exu_alu_ctl.scala 252:92]
node _T_702 = bits(io.a_in, 1, 1) @[exu_alu_ctl.scala 252:92]
node _T_703 = bits(io.a_in, 2, 2) @[exu_alu_ctl.scala 252:92]
node _T_704 = bits(io.a_in, 3, 3) @[exu_alu_ctl.scala 252:92]
node _T_705 = bits(io.a_in, 4, 4) @[exu_alu_ctl.scala 252:92]
node _T_706 = bits(io.a_in, 5, 5) @[exu_alu_ctl.scala 252:92]
node _T_707 = bits(io.a_in, 6, 6) @[exu_alu_ctl.scala 252:92]
node _T_708 = bits(io.a_in, 7, 7) @[exu_alu_ctl.scala 252:92]
node _T_709 = bits(io.a_in, 8, 8) @[exu_alu_ctl.scala 252:92]
node _T_710 = bits(io.a_in, 9, 9) @[exu_alu_ctl.scala 252:92]
node _T_711 = bits(io.a_in, 10, 10) @[exu_alu_ctl.scala 252:92]
node _T_712 = bits(io.a_in, 11, 11) @[exu_alu_ctl.scala 252:92]
node _T_713 = bits(io.a_in, 12, 12) @[exu_alu_ctl.scala 252:92]
node _T_714 = bits(io.a_in, 13, 13) @[exu_alu_ctl.scala 252:92]
node _T_715 = bits(io.a_in, 14, 14) @[exu_alu_ctl.scala 252:92]
node _T_716 = bits(io.a_in, 15, 15) @[exu_alu_ctl.scala 252:92]
node _T_717 = bits(io.a_in, 16, 16) @[exu_alu_ctl.scala 252:92]
node _T_718 = bits(io.a_in, 17, 17) @[exu_alu_ctl.scala 252:92]
node _T_719 = bits(io.a_in, 18, 18) @[exu_alu_ctl.scala 252:92]
node _T_720 = bits(io.a_in, 19, 19) @[exu_alu_ctl.scala 252:92]
node _T_721 = bits(io.a_in, 20, 20) @[exu_alu_ctl.scala 252:92]
node _T_722 = bits(io.a_in, 21, 21) @[exu_alu_ctl.scala 252:92]
node _T_723 = bits(io.a_in, 22, 22) @[exu_alu_ctl.scala 252:92]
node _T_724 = bits(io.a_in, 23, 23) @[exu_alu_ctl.scala 252:92]
node _T_725 = bits(io.a_in, 24, 24) @[exu_alu_ctl.scala 252:92]
node _T_726 = bits(io.a_in, 25, 25) @[exu_alu_ctl.scala 252:92]
node _T_727 = bits(io.a_in, 26, 26) @[exu_alu_ctl.scala 252:92]
node _T_728 = bits(io.a_in, 27, 27) @[exu_alu_ctl.scala 252:92]
node _T_729 = bits(io.a_in, 28, 28) @[exu_alu_ctl.scala 252:92]
node _T_730 = bits(io.a_in, 29, 29) @[exu_alu_ctl.scala 252:92]
node _T_731 = bits(io.a_in, 30, 30) @[exu_alu_ctl.scala 252:92]
node _T_732 = bits(io.a_in, 31, 31) @[exu_alu_ctl.scala 252:92]
node _T_733 = cat(_T_701, _T_702) @[Cat.scala 29:58]
node _T_734 = cat(_T_733, _T_703) @[Cat.scala 29:58]
node _T_735 = cat(_T_734, _T_704) @[Cat.scala 29:58]
node _T_736 = cat(_T_735, _T_705) @[Cat.scala 29:58]
node _T_737 = cat(_T_736, _T_706) @[Cat.scala 29:58]
node _T_738 = cat(_T_737, _T_707) @[Cat.scala 29:58]
node _T_739 = cat(_T_738, _T_708) @[Cat.scala 29:58]
node _T_740 = cat(_T_739, _T_709) @[Cat.scala 29:58]
node _T_741 = cat(_T_740, _T_710) @[Cat.scala 29:58]
node _T_742 = cat(_T_741, _T_711) @[Cat.scala 29:58]
node _T_743 = cat(_T_742, _T_712) @[Cat.scala 29:58]
node _T_744 = cat(_T_743, _T_713) @[Cat.scala 29:58]
node _T_745 = cat(_T_744, _T_714) @[Cat.scala 29:58]
node _T_746 = cat(_T_745, _T_715) @[Cat.scala 29:58]
node _T_747 = cat(_T_746, _T_716) @[Cat.scala 29:58]
node _T_748 = cat(_T_747, _T_717) @[Cat.scala 29:58]
node _T_749 = cat(_T_748, _T_718) @[Cat.scala 29:58]
node _T_750 = cat(_T_749, _T_719) @[Cat.scala 29:58]
node _T_751 = cat(_T_750, _T_720) @[Cat.scala 29:58]
node _T_752 = cat(_T_751, _T_721) @[Cat.scala 29:58]
node _T_753 = cat(_T_752, _T_722) @[Cat.scala 29:58]
node _T_754 = cat(_T_753, _T_723) @[Cat.scala 29:58]
node _T_755 = cat(_T_754, _T_724) @[Cat.scala 29:58]
node _T_756 = cat(_T_755, _T_725) @[Cat.scala 29:58]
node _T_757 = cat(_T_756, _T_726) @[Cat.scala 29:58]
node _T_758 = cat(_T_757, _T_727) @[Cat.scala 29:58]
node _T_759 = cat(_T_758, _T_728) @[Cat.scala 29:58]
node _T_760 = cat(_T_759, _T_729) @[Cat.scala 29:58]
node _T_761 = cat(_T_760, _T_730) @[Cat.scala 29:58]
node _T_762 = cat(_T_761, _T_731) @[Cat.scala 29:58]
node _T_763 = cat(_T_762, _T_732) @[Cat.scala 29:58]
node bitmanip_rev_result = and(_T_700, _T_763) @[exu_alu_ctl.scala 252:48]
node _T_764 = bits(ap_rev8, 0, 0) @[Bitwise.scala 72:15]
node _T_765 = mux(_T_764, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12]
node _T_766 = bits(io.a_in, 7, 0) @[exu_alu_ctl.scala 254:96]
node _T_767 = bits(io.a_in, 15, 8) @[exu_alu_ctl.scala 254:96]
node _T_768 = bits(io.a_in, 23, 16) @[exu_alu_ctl.scala 254:96]
node _T_769 = bits(io.a_in, 31, 24) @[exu_alu_ctl.scala 254:96]
node _T_770 = cat(_T_766, _T_767) @[Cat.scala 29:58]
node _T_771 = cat(_T_770, _T_768) @[Cat.scala 29:58]
node _T_772 = cat(_T_771, _T_769) @[Cat.scala 29:58]
node bitmanip_rev8_result = and(_T_765, _T_772) @[exu_alu_ctl.scala 254:50]
node _T_773 = bits(ap_orc_b, 0, 0) @[Bitwise.scala 72:15]
node _T_774 = mux(_T_773, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12]
node _T_775 = bits(io.a_in, 7, 0) @[exu_alu_ctl.scala 279:103]
node _T_776 = orr(_T_775) @[exu_alu_ctl.scala 279:117]
node _T_777 = bits(_T_776, 0, 0) @[Bitwise.scala 72:15]
node _T_778 = mux(_T_777, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_779 = bits(io.a_in, 15, 8) @[exu_alu_ctl.scala 279:103]
node _T_780 = orr(_T_779) @[exu_alu_ctl.scala 279:117]
node _T_781 = bits(_T_780, 0, 0) @[Bitwise.scala 72:15]
node _T_782 = mux(_T_781, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_783 = bits(io.a_in, 23, 16) @[exu_alu_ctl.scala 279:103]
node _T_784 = orr(_T_783) @[exu_alu_ctl.scala 279:117]
node _T_785 = bits(_T_784, 0, 0) @[Bitwise.scala 72:15]
node _T_786 = mux(_T_785, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_787 = bits(io.a_in, 31, 24) @[exu_alu_ctl.scala 279:103]
node _T_788 = orr(_T_787) @[exu_alu_ctl.scala 279:117]
node _T_789 = bits(_T_788, 0, 0) @[Bitwise.scala 72:15]
node _T_790 = mux(_T_789, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_791 = cat(_T_790, _T_786) @[Cat.scala 29:58]
node _T_792 = cat(_T_791, _T_782) @[Cat.scala 29:58]
node _T_793 = cat(_T_792, _T_778) @[Cat.scala 29:58]
node bitmanip_orc_b_result = and(_T_774, _T_793) @[exu_alu_ctl.scala 279:50]
node _T_794 = bits(ap_orc16, 0, 0) @[Bitwise.scala 72:15]
node _T_795 = mux(_T_794, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12]
node _T_796 = bits(io.a_in, 31, 16) @[exu_alu_ctl.scala 281:63]
node _T_797 = bits(io.a_in, 15, 0) @[exu_alu_ctl.scala 281:80]
node _T_798 = or(_T_796, _T_797) @[exu_alu_ctl.scala 281:71]
node _T_799 = bits(io.a_in, 31, 16) @[exu_alu_ctl.scala 281:95]
node _T_800 = bits(io.a_in, 15, 0) @[exu_alu_ctl.scala 281:112]
node _T_801 = or(_T_799, _T_800) @[exu_alu_ctl.scala 281:103]
node _T_802 = cat(_T_798, _T_801) @[Cat.scala 29:58]
node bitmanip_orc16_result = and(_T_795, _T_802) @[exu_alu_ctl.scala 281:50]
node _T_803 = bits(io.b_in, 4, 0) @[exu_alu_ctl.scala 285:63]
node bitmanip_sb_1hot = dshl(UInt<32>("h01"), _T_803) @[exu_alu_ctl.scala 285:53]
node _T_804 = bits(bitmanip_sb_1hot, 31, 0) @[exu_alu_ctl.scala 288:46]
node _T_805 = asSInt(_T_804) @[exu_alu_ctl.scala 288:53]
node _T_806 = or(io.a_in, _T_805) @[exu_alu_ctl.scala 288:27]
node _T_807 = asSInt(_T_806) @[exu_alu_ctl.scala 288:27]
node _T_808 = bits(bitmanip_sb_1hot, 31, 0) @[exu_alu_ctl.scala 289:46]
node _T_809 = asSInt(_T_808) @[exu_alu_ctl.scala 289:53]
node _T_810 = not(_T_809) @[exu_alu_ctl.scala 289:29]
node _T_811 = asSInt(_T_810) @[exu_alu_ctl.scala 289:29]
node _T_812 = and(io.a_in, _T_811) @[exu_alu_ctl.scala 289:27]
node _T_813 = asSInt(_T_812) @[exu_alu_ctl.scala 289:27]
node _T_814 = bits(bitmanip_sb_1hot, 31, 0) @[exu_alu_ctl.scala 290:46]
node _T_815 = asSInt(_T_814) @[exu_alu_ctl.scala 290:53]
node _T_816 = xor(io.a_in, _T_815) @[exu_alu_ctl.scala 290:27]
node _T_817 = asSInt(_T_816) @[exu_alu_ctl.scala 290:27]
wire _T_818 : SInt<32> @[Mux.scala 27:72]
node _T_819 = asUInt(_T_807) @[Mux.scala 27:72]
node _T_820 = asSInt(_T_819) @[Mux.scala 27:72]
_T_818 <= _T_820 @[Mux.scala 27:72]
wire _T_821 : SInt<32> @[Mux.scala 27:72]
node _T_822 = asUInt(_T_813) @[Mux.scala 27:72]
node _T_823 = asSInt(_T_822) @[Mux.scala 27:72]
_T_821 <= _T_823 @[Mux.scala 27:72]
wire _T_824 : SInt<32> @[Mux.scala 27:72]
node _T_825 = asUInt(_T_817) @[Mux.scala 27:72]
node _T_826 = asSInt(_T_825) @[Mux.scala 27:72]
_T_824 <= _T_826 @[Mux.scala 27:72]
node _T_827 = mux(ap_sbset, _T_818, asSInt(UInt<1>("h00"))) @[Mux.scala 27:72]
node _T_828 = mux(ap_sbclr, _T_821, asSInt(UInt<1>("h00"))) @[Mux.scala 27:72]
node _T_829 = mux(ap_sbinv, _T_824, asSInt(UInt<1>("h00"))) @[Mux.scala 27:72]
node _T_830 = or(_T_827, _T_828) @[Mux.scala 27:72]
node _T_831 = asSInt(_T_830) @[Mux.scala 27:72]
node _T_832 = or(_T_831, _T_829) @[Mux.scala 27:72]
node _T_833 = asSInt(_T_832) @[Mux.scala 27:72]
wire bitmanip_sb_data : SInt<32> @[Mux.scala 27:72]
node _T_834 = asUInt(_T_833) @[Mux.scala 27:72]
node _T_835 = asSInt(_T_834) @[Mux.scala 27:72]
bitmanip_sb_data <= _T_835 @[Mux.scala 27:72]
node _T_836 = or(io.i0_ap.sll, io.i0_ap.srl) @[exu_alu_ctl.scala 293:44]
node _T_837 = or(_T_836, io.i0_ap.sra) @[exu_alu_ctl.scala 293:59]
node _T_838 = or(_T_837, ap_slo) @[exu_alu_ctl.scala 293:74]
node _T_839 = or(_T_838, ap_sro) @[exu_alu_ctl.scala 293:83]
node _T_840 = or(_T_839, ap_rol) @[exu_alu_ctl.scala 293:92]
node sel_shift = or(_T_840, ap_ror) @[exu_alu_ctl.scala 293:101]
node _T_841 = or(io.i0_ap.add, io.i0_ap.sub) @[exu_alu_ctl.scala 294:44]
node _T_842 = or(_T_841, ap_zba) @[exu_alu_ctl.scala 294:59]
node _T_843 = eq(io.i0_ap.slt, UInt<1>("h00")) @[exu_alu_ctl.scala 294:71]
node _T_844 = and(_T_842, _T_843) @[exu_alu_ctl.scala 294:69]
node _T_845 = eq(ap_min, UInt<1>("h00")) @[exu_alu_ctl.scala 294:87]
node _T_846 = and(_T_844, _T_845) @[exu_alu_ctl.scala 294:85]
node _T_847 = eq(ap_max, UInt<1>("h00")) @[exu_alu_ctl.scala 294:97]
node sel_adder = and(_T_846, _T_847) @[exu_alu_ctl.scala 294:95]
node _T_848 = or(io.i0_ap.jal, io.pp_in.bits.pcall) @[exu_alu_ctl.scala 295:44]
node _T_849 = or(_T_848, io.pp_in.bits.pja) @[exu_alu_ctl.scala 295:66]
node sel_pc = or(_T_849, io.pp_in.bits.pret) @[exu_alu_ctl.scala 295:86]
node _T_850 = bits(io.i0_ap.csr_imm, 0, 0) @[exu_alu_ctl.scala 296:50]
node _T_851 = asSInt(io.b_in) @[exu_alu_ctl.scala 296:66]
node csr_write_data = mux(_T_850, _T_851, io.a_in) @[exu_alu_ctl.scala 296:32]
node slt_one = and(io.i0_ap.slt, lt) @[exu_alu_ctl.scala 298:43]
node _T_852 = cat(io.dec_i0_pc_d, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_853 = cat(io.dec_alu.dec_i0_br_immed_d, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_854 = bits(_T_852, 12, 1) @[lib.scala 68:24]
node _T_855 = bits(_T_853, 12, 1) @[lib.scala 68:40]
node _T_856 = add(_T_854, _T_855) @[lib.scala 68:31]
node _T_857 = bits(_T_852, 31, 13) @[lib.scala 69:20]
node _T_858 = add(_T_857, UInt<1>("h01")) @[lib.scala 69:27]
node _T_859 = tail(_T_858, 1) @[lib.scala 69:27]
node _T_860 = bits(_T_852, 31, 13) @[lib.scala 70:20]
node _T_861 = sub(_T_860, UInt<1>("h01")) @[lib.scala 70:27]
node _T_862 = tail(_T_861, 1) @[lib.scala 70:27]
node _T_863 = bits(_T_853, 12, 12) @[lib.scala 71:22]
node _T_864 = bits(_T_856, 12, 12) @[lib.scala 72:39]
node _T_865 = eq(_T_864, UInt<1>("h00")) @[lib.scala 72:28]
node _T_866 = xor(_T_863, _T_865) @[lib.scala 72:26]
node _T_867 = bits(_T_866, 0, 0) @[lib.scala 72:64]
node _T_868 = bits(_T_852, 31, 13) @[lib.scala 72:76]
node _T_869 = eq(_T_863, UInt<1>("h00")) @[lib.scala 73:20]
node _T_870 = bits(_T_856, 12, 12) @[lib.scala 73:39]
node _T_871 = and(_T_869, _T_870) @[lib.scala 73:26]
node _T_872 = bits(_T_871, 0, 0) @[lib.scala 73:64]
node _T_873 = bits(_T_856, 12, 12) @[lib.scala 74:39]
node _T_874 = eq(_T_873, UInt<1>("h00")) @[lib.scala 74:28]
node _T_875 = and(_T_863, _T_874) @[lib.scala 74:26]
node _T_876 = bits(_T_875, 0, 0) @[lib.scala 74:64]
node _T_877 = mux(_T_867, _T_868, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_878 = mux(_T_872, _T_859, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_879 = mux(_T_876, _T_862, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_880 = or(_T_877, _T_878) @[Mux.scala 27:72]
node _T_881 = or(_T_880, _T_879) @[Mux.scala 27:72]
wire _T_882 : UInt<19> @[Mux.scala 27:72]
_T_882 <= _T_881 @[Mux.scala 27:72]
node _T_883 = bits(_T_856, 11, 0) @[lib.scala 74:94]
node _T_884 = cat(_T_882, _T_883) @[Cat.scala 29:58]
node pcout = cat(_T_884, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_885 = bits(lout, 31, 0) @[exu_alu_ctl.scala 304:24]
node _T_886 = bits(sel_shift, 0, 0) @[Bitwise.scala 72:15]
node _T_887 = mux(_T_886, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12]
node _T_888 = bits(sout, 31, 0) @[exu_alu_ctl.scala 304:63]
node _T_889 = and(_T_887, _T_888) @[exu_alu_ctl.scala 304:56]
node _T_890 = or(_T_885, _T_889) @[exu_alu_ctl.scala 304:31]
node _T_891 = bits(sel_adder, 0, 0) @[Bitwise.scala 72:15]
node _T_892 = mux(_T_891, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12]
node _T_893 = bits(aout, 31, 0) @[exu_alu_ctl.scala 305:35]
node _T_894 = and(_T_892, _T_893) @[exu_alu_ctl.scala 305:28]
node _T_895 = or(_T_890, _T_894) @[exu_alu_ctl.scala 304:71]
node _T_896 = bits(sel_pc, 0, 0) @[Bitwise.scala 72:15]
node _T_897 = mux(_T_896, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12]
node _T_898 = and(_T_897, pcout) @[exu_alu_ctl.scala 306:28]
node _T_899 = or(_T_895, _T_898) @[exu_alu_ctl.scala 305:43]
node _T_900 = bits(io.i0_ap.csr_write, 0, 0) @[Bitwise.scala 72:15]
node _T_901 = mux(_T_900, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12]
node _T_902 = bits(csr_write_data, 31, 0) @[exu_alu_ctl.scala 307:51]
node _T_903 = and(_T_901, _T_902) @[exu_alu_ctl.scala 307:34]
node _T_904 = or(_T_899, _T_903) @[exu_alu_ctl.scala 306:41]
node _T_905 = cat(UInt<31>("h00"), slt_one) @[Cat.scala 29:58]
node _T_906 = or(_T_904, _T_905) @[exu_alu_ctl.scala 307:59]
node _T_907 = bits(ap_sbext, 0, 0) @[Bitwise.scala 72:15]
node _T_908 = mux(_T_907, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12]
node _T_909 = bits(sout, 0, 0) @[exu_alu_ctl.scala 309:50]
node _T_910 = cat(UInt<31>("h00"), _T_909) @[Cat.scala 29:58]
node _T_911 = and(_T_908, _T_910) @[exu_alu_ctl.scala 309:28]
node _T_912 = or(_T_906, _T_911) @[exu_alu_ctl.scala 308:56]
node _T_913 = bits(bitmanip_clz_ctz_result, 5, 0) @[exu_alu_ctl.scala 310:44]
node _T_914 = cat(UInt<26>("h00"), _T_913) @[Cat.scala 29:58]
node _T_915 = or(_T_912, _T_914) @[exu_alu_ctl.scala 309:56]
node _T_916 = bits(bitmanip_pcnt_result, 5, 0) @[exu_alu_ctl.scala 311:41]
node _T_917 = cat(UInt<26>("h00"), _T_916) @[Cat.scala 29:58]
node _T_918 = or(_T_915, _T_917) @[exu_alu_ctl.scala 310:52]
node _T_919 = bits(bitmanip_sext_result, 31, 0) @[exu_alu_ctl.scala 312:25]
node _T_920 = or(_T_918, _T_919) @[exu_alu_ctl.scala 311:52]
node _T_921 = bits(bitmanip_minmax_result, 31, 0) @[exu_alu_ctl.scala 313:27]
node _T_922 = or(_T_920, _T_921) @[exu_alu_ctl.scala 312:35]
node _T_923 = bits(bitmanip_pack_result, 31, 0) @[exu_alu_ctl.scala 314:25]
node _T_924 = or(_T_922, _T_923) @[exu_alu_ctl.scala 313:35]
node _T_925 = bits(bitmanip_packu_result, 31, 0) @[exu_alu_ctl.scala 315:26]
node _T_926 = or(_T_924, _T_925) @[exu_alu_ctl.scala 314:35]
node _T_927 = bits(bitmanip_packh_result, 31, 0) @[exu_alu_ctl.scala 316:26]
node _T_928 = or(_T_926, _T_927) @[exu_alu_ctl.scala 315:35]
node _T_929 = bits(bitmanip_rev_result, 31, 0) @[exu_alu_ctl.scala 317:24]
node _T_930 = or(_T_928, _T_929) @[exu_alu_ctl.scala 316:35]
node _T_931 = bits(bitmanip_rev8_result, 31, 0) @[exu_alu_ctl.scala 318:25]
node _T_932 = or(_T_930, _T_931) @[exu_alu_ctl.scala 317:35]
node _T_933 = bits(bitmanip_orc_b_result, 31, 0) @[exu_alu_ctl.scala 319:26]
node _T_934 = or(_T_932, _T_933) @[exu_alu_ctl.scala 318:35]
node _T_935 = bits(bitmanip_orc16_result, 31, 0) @[exu_alu_ctl.scala 320:26]
node _T_936 = or(_T_934, _T_935) @[exu_alu_ctl.scala 319:35]
node _T_937 = bits(bitmanip_sb_data, 31, 0) @[exu_alu_ctl.scala 321:21]
node _T_938 = or(_T_936, _T_937) @[exu_alu_ctl.scala 320:35]
result <= _T_938 @[exu_alu_ctl.scala 304:16]
node _T_939 = or(io.i0_ap.jal, io.pp_in.bits.pcall) @[exu_alu_ctl.scala 330:48]
node _T_940 = or(_T_939, io.pp_in.bits.pja) @[exu_alu_ctl.scala 331:25]
node any_jal = or(_T_940, io.pp_in.bits.pret) @[exu_alu_ctl.scala 332:25]
node _T_941 = and(io.i0_ap.beq, eq) @[exu_alu_ctl.scala 335:43]
node _T_942 = and(io.i0_ap.bne, ne) @[exu_alu_ctl.scala 335:65]
node _T_943 = or(_T_941, _T_942) @[exu_alu_ctl.scala 335:49]
node _T_944 = and(io.i0_ap.blt, lt) @[exu_alu_ctl.scala 335:94]
node _T_945 = or(_T_943, _T_944) @[exu_alu_ctl.scala 335:78]
node _T_946 = and(io.i0_ap.bge, ge) @[exu_alu_ctl.scala 335:116]
node _T_947 = or(_T_945, _T_946) @[exu_alu_ctl.scala 335:100]
node actual_taken = or(_T_947, any_jal) @[exu_alu_ctl.scala 335:122]
node _T_948 = and(io.dec_alu.dec_i0_alu_decode_d, io.i0_ap.predict_nt) @[exu_alu_ctl.scala 340:61]
node _T_949 = eq(actual_taken, UInt<1>("h00")) @[exu_alu_ctl.scala 340:85]
node _T_950 = and(_T_948, _T_949) @[exu_alu_ctl.scala 340:83]
node _T_951 = eq(any_jal, UInt<1>("h00")) @[exu_alu_ctl.scala 340:101]
node _T_952 = and(_T_950, _T_951) @[exu_alu_ctl.scala 340:99]
node _T_953 = and(io.dec_alu.dec_i0_alu_decode_d, io.i0_ap.predict_t) @[exu_alu_ctl.scala 340:145]
node _T_954 = and(_T_953, actual_taken) @[exu_alu_ctl.scala 340:167]
node _T_955 = eq(any_jal, UInt<1>("h00")) @[exu_alu_ctl.scala 340:185]
node _T_956 = and(_T_954, _T_955) @[exu_alu_ctl.scala 340:183]
node _T_957 = or(_T_952, _T_956) @[exu_alu_ctl.scala 340:111]
io.pred_correct_out <= _T_957 @[exu_alu_ctl.scala 340:26]
node _T_958 = bits(any_jal, 0, 0) @[exu_alu_ctl.scala 342:37]
node _T_959 = bits(aout, 31, 1) @[exu_alu_ctl.scala 342:49]
node _T_960 = bits(pcout, 31, 1) @[exu_alu_ctl.scala 342:62]
node _T_961 = mux(_T_958, _T_959, _T_960) @[exu_alu_ctl.scala 342:28]
io.flush_path_out <= _T_961 @[exu_alu_ctl.scala 342:22]
node _T_962 = eq(actual_taken, UInt<1>("h00")) @[exu_alu_ctl.scala 345:50]
node _T_963 = and(io.i0_ap.predict_t, _T_962) @[exu_alu_ctl.scala 345:48]
node _T_964 = and(io.i0_ap.predict_nt, actual_taken) @[exu_alu_ctl.scala 345:88]
node cond_mispredict = or(_T_963, _T_964) @[exu_alu_ctl.scala 345:65]
node _T_965 = bits(aout, 31, 1) @[exu_alu_ctl.scala 348:80]
node _T_966 = neq(io.pp_in.bits.prett, _T_965) @[exu_alu_ctl.scala 348:72]
node target_mispredict = and(io.pp_in.bits.pret, _T_966) @[exu_alu_ctl.scala 348:49]
node _T_967 = or(io.i0_ap.jal, cond_mispredict) @[exu_alu_ctl.scala 350:45]
node _T_968 = or(_T_967, target_mispredict) @[exu_alu_ctl.scala 350:63]
node _T_969 = and(_T_968, io.dec_alu.dec_i0_alu_decode_d) @[exu_alu_ctl.scala 350:84]
node _T_970 = eq(io.flush_upper_x, UInt<1>("h00")) @[exu_alu_ctl.scala 350:119]
node _T_971 = and(_T_969, _T_970) @[exu_alu_ctl.scala 350:117]
node _T_972 = eq(io.dec_tlu_flush_lower_r, UInt<1>("h00")) @[exu_alu_ctl.scala 350:141]
node _T_973 = and(_T_971, _T_972) @[exu_alu_ctl.scala 350:139]
io.flush_upper_out <= _T_973 @[exu_alu_ctl.scala 350:26]
node _T_974 = or(io.i0_ap.jal, cond_mispredict) @[exu_alu_ctl.scala 351:45]
node _T_975 = or(_T_974, target_mispredict) @[exu_alu_ctl.scala 351:63]
node _T_976 = and(_T_975, io.dec_alu.dec_i0_alu_decode_d) @[exu_alu_ctl.scala 351:84]
node _T_977 = eq(io.flush_upper_x, UInt<1>("h00")) @[exu_alu_ctl.scala 351:119]
node _T_978 = and(_T_976, _T_977) @[exu_alu_ctl.scala 351:117]
node _T_979 = or(_T_978, io.dec_tlu_flush_lower_r) @[exu_alu_ctl.scala 351:139]
io.flush_final_out <= _T_979 @[exu_alu_ctl.scala 351:26]
wire newhist : UInt<2>
newhist <= UInt<1>("h00")
node _T_980 = bits(io.pp_in.bits.hist, 1, 1) @[exu_alu_ctl.scala 355:40]
node _T_981 = bits(io.pp_in.bits.hist, 0, 0) @[exu_alu_ctl.scala 355:65]
node _T_982 = and(_T_980, _T_981) @[exu_alu_ctl.scala 355:44]
node _T_983 = bits(io.pp_in.bits.hist, 0, 0) @[exu_alu_ctl.scala 355:92]
node _T_984 = eq(_T_983, UInt<1>("h00")) @[exu_alu_ctl.scala 355:73]
node _T_985 = and(_T_984, actual_taken) @[exu_alu_ctl.scala 355:96]
node _T_986 = or(_T_982, _T_985) @[exu_alu_ctl.scala 355:70]
node _T_987 = bits(io.pp_in.bits.hist, 1, 1) @[exu_alu_ctl.scala 356:25]
node _T_988 = eq(_T_987, UInt<1>("h00")) @[exu_alu_ctl.scala 356:6]
node _T_989 = eq(actual_taken, UInt<1>("h00")) @[exu_alu_ctl.scala 356:31]
node _T_990 = and(_T_988, _T_989) @[exu_alu_ctl.scala 356:29]
node _T_991 = bits(io.pp_in.bits.hist, 1, 1) @[exu_alu_ctl.scala 356:68]
node _T_992 = and(_T_991, actual_taken) @[exu_alu_ctl.scala 356:72]
node _T_993 = or(_T_990, _T_992) @[exu_alu_ctl.scala 356:47]
node _T_994 = cat(_T_986, _T_993) @[Cat.scala 29:58]
newhist <= _T_994 @[exu_alu_ctl.scala 355:14]
io.predict_p_out.bits.way <= io.pp_in.bits.way @[exu_alu_ctl.scala 358:30]
io.predict_p_out.bits.pja <= io.pp_in.bits.pja @[exu_alu_ctl.scala 358:30]
io.predict_p_out.bits.pret <= io.pp_in.bits.pret @[exu_alu_ctl.scala 358:30]
io.predict_p_out.bits.pcall <= io.pp_in.bits.pcall @[exu_alu_ctl.scala 358:30]
io.predict_p_out.bits.prett <= io.pp_in.bits.prett @[exu_alu_ctl.scala 358:30]
io.predict_p_out.bits.br_start_error <= io.pp_in.bits.br_start_error @[exu_alu_ctl.scala 358:30]
io.predict_p_out.bits.br_error <= io.pp_in.bits.br_error @[exu_alu_ctl.scala 358:30]
io.predict_p_out.bits.toffset <= io.pp_in.bits.toffset @[exu_alu_ctl.scala 358:30]
io.predict_p_out.bits.hist <= io.pp_in.bits.hist @[exu_alu_ctl.scala 358:30]
io.predict_p_out.bits.pc4 <= io.pp_in.bits.pc4 @[exu_alu_ctl.scala 358:30]
io.predict_p_out.bits.boffset <= io.pp_in.bits.boffset @[exu_alu_ctl.scala 358:30]
io.predict_p_out.bits.ataken <= io.pp_in.bits.ataken @[exu_alu_ctl.scala 358:30]
io.predict_p_out.bits.misp <= io.pp_in.bits.misp @[exu_alu_ctl.scala 358:30]
io.predict_p_out.valid <= io.pp_in.valid @[exu_alu_ctl.scala 358:30]
node _T_995 = eq(io.flush_upper_x, UInt<1>("h00")) @[exu_alu_ctl.scala 359:38]
node _T_996 = eq(io.dec_tlu_flush_lower_r, UInt<1>("h00")) @[exu_alu_ctl.scala 359:58]
node _T_997 = and(_T_995, _T_996) @[exu_alu_ctl.scala 359:56]
node _T_998 = or(cond_mispredict, target_mispredict) @[exu_alu_ctl.scala 359:103]
node _T_999 = and(_T_997, _T_998) @[exu_alu_ctl.scala 359:84]
io.predict_p_out.bits.misp <= _T_999 @[exu_alu_ctl.scala 359:35]
io.predict_p_out.bits.ataken <= actual_taken @[exu_alu_ctl.scala 360:35]
io.predict_p_out.bits.hist <= newhist @[exu_alu_ctl.scala 361:35]