quasar/lsu_stbuf.anno.json

[
  {
    "class":"firrtl.transforms.CombinationalPath",
    "sink":"~lsu_stbuf|lsu_stbuf>io_stbuf_fwddata_lo_m",
    "sources":[
      "~lsu_stbuf|lsu_stbuf>io_store_data_lo_r",
      "~lsu_stbuf|lsu_stbuf>io_store_data_hi_r",
      "~lsu_stbuf|lsu_stbuf>io_addr_in_dccm_m",
      "~lsu_stbuf|lsu_stbuf>io_lsu_pkt_r_bits_store",
      "~lsu_stbuf|lsu_stbuf>io_lsu_pkt_r_bits_dma",
      "~lsu_stbuf|lsu_stbuf>io_ldst_dual_r",
      "~lsu_stbuf|lsu_stbuf>io_store_stbuf_reqvld_r",
      "~lsu_stbuf|lsu_stbuf>io_lsu_pkt_r_valid",
      "~lsu_stbuf|lsu_stbuf>io_lsu_addr_m",
      "~lsu_stbuf|lsu_stbuf>io_lsu_addr_r",
      "~lsu_stbuf|lsu_stbuf>io_end_addr_r",
      "~lsu_stbuf|lsu_stbuf>io_lsu_pkt_r_bits_dword",
      "~lsu_stbuf|lsu_stbuf>io_lsu_pkt_r_bits_word",
      "~lsu_stbuf|lsu_stbuf>io_lsu_pkt_r_bits_by",
      "~lsu_stbuf|lsu_stbuf>io_lsu_pkt_r_bits_half"
    ]
  },
  {
    "class":"firrtl.transforms.CombinationalPath",
    "sink":"~lsu_stbuf|lsu_stbuf>io_stbuf_fwddata_hi_m",
    "sources":[
      "~lsu_stbuf|lsu_stbuf>io_store_data_lo_r",
      "~lsu_stbuf|lsu_stbuf>io_store_data_hi_r",
      "~lsu_stbuf|lsu_stbuf>io_addr_in_dccm_m",
      "~lsu_stbuf|lsu_stbuf>io_lsu_pkt_r_bits_store",
      "~lsu_stbuf|lsu_stbuf>io_lsu_pkt_r_bits_dma",
      "~lsu_stbuf|lsu_stbuf>io_ldst_dual_r",
      "~lsu_stbuf|lsu_stbuf>io_store_stbuf_reqvld_r",
      "~lsu_stbuf|lsu_stbuf>io_lsu_pkt_r_valid",
      "~lsu_stbuf|lsu_stbuf>io_end_addr_m",
      "~lsu_stbuf|lsu_stbuf>io_lsu_addr_r",
      "~lsu_stbuf|lsu_stbuf>io_end_addr_r",
      "~lsu_stbuf|lsu_stbuf>io_lsu_pkt_r_bits_dword",
      "~lsu_stbuf|lsu_stbuf>io_lsu_pkt_r_bits_word",
      "~lsu_stbuf|lsu_stbuf>io_lsu_pkt_r_bits_by",
      "~lsu_stbuf|lsu_stbuf>io_lsu_pkt_r_bits_half"
    ]
  },
  {
    "class":"firrtl.transforms.CombinationalPath",
    "sink":"~lsu_stbuf|lsu_stbuf>io_stbuf_fwdbyteen_lo_m",
    "sources":[
      "~lsu_stbuf|lsu_stbuf>io_addr_in_dccm_m",
      "~lsu_stbuf|lsu_stbuf>io_lsu_pkt_r_bits_store",
      "~lsu_stbuf|lsu_stbuf>io_lsu_pkt_r_bits_dma",
      "~lsu_stbuf|lsu_stbuf>io_ldst_dual_r",
      "~lsu_stbuf|lsu_stbuf>io_store_stbuf_reqvld_r",
      "~lsu_stbuf|lsu_stbuf>io_lsu_pkt_r_valid",
      "~lsu_stbuf|lsu_stbuf>io_lsu_addr_m",
      "~lsu_stbuf|lsu_stbuf>io_lsu_addr_r",
      "~lsu_stbuf|lsu_stbuf>io_end_addr_r",
      "~lsu_stbuf|lsu_stbuf>io_lsu_pkt_r_bits_dword",
      "~lsu_stbuf|lsu_stbuf>io_lsu_pkt_r_bits_word",
      "~lsu_stbuf|lsu_stbuf>io_lsu_pkt_r_bits_by",
      "~lsu_stbuf|lsu_stbuf>io_lsu_pkt_r_bits_half"
    ]
  },
  {
    "class":"firrtl.transforms.CombinationalPath",
    "sink":"~lsu_stbuf|lsu_stbuf>io_stbuf_fwdbyteen_hi_m",
    "sources":[
      "~lsu_stbuf|lsu_stbuf>io_addr_in_dccm_m",
      "~lsu_stbuf|lsu_stbuf>io_lsu_pkt_r_bits_store",
      "~lsu_stbuf|lsu_stbuf>io_lsu_pkt_r_bits_dma",
      "~lsu_stbuf|lsu_stbuf>io_ldst_dual_r",
      "~lsu_stbuf|lsu_stbuf>io_store_stbuf_reqvld_r",
      "~lsu_stbuf|lsu_stbuf>io_lsu_pkt_r_valid",
      "~lsu_stbuf|lsu_stbuf>io_end_addr_m",
      "~lsu_stbuf|lsu_stbuf>io_lsu_addr_r",
      "~lsu_stbuf|lsu_stbuf>io_end_addr_r",
      "~lsu_stbuf|lsu_stbuf>io_lsu_pkt_r_bits_dword",
      "~lsu_stbuf|lsu_stbuf>io_lsu_pkt_r_bits_word",
      "~lsu_stbuf|lsu_stbuf>io_lsu_pkt_r_bits_by",
      "~lsu_stbuf|lsu_stbuf>io_lsu_pkt_r_bits_half"
    ]
  },
  {
    "class":"firrtl.transforms.CombinationalPath",
    "sink":"~lsu_stbuf|lsu_stbuf>io_stbuf_reqvld_any",
    "sources":[
      "~lsu_stbuf|lsu_stbuf>io_lsu_pkt_m_bits_store",
      "~lsu_stbuf|lsu_stbuf>io_lsu_pkt_m_bits_dma",
      "~lsu_stbuf|lsu_stbuf>io_lsu_pkt_m_valid",
      "~lsu_stbuf|lsu_stbuf>io_addr_in_dccm_m",
      "~lsu_stbuf|lsu_stbuf>io_end_addr_m",
      "~lsu_stbuf|lsu_stbuf>io_lsu_addr_m"
    ]
  },
  {
    "class":"firrtl.transforms.CombinationalPath",
    "sink":"~lsu_stbuf|lsu_stbuf>io_lsu_stbuf_full_any",
    "sources":[
      "~lsu_stbuf|lsu_stbuf>io_dec_lsu_valid_raw_d",
      "~lsu_stbuf|lsu_stbuf>io_ldst_dual_d",
      "~lsu_stbuf|lsu_stbuf>io_ldst_dual_r",
      "~lsu_stbuf|lsu_stbuf>io_ldst_dual_m",
      "~lsu_stbuf|lsu_stbuf>io_addr_in_dccm_r",
      "~lsu_stbuf|lsu_stbuf>io_lsu_pkt_r_bits_dma",
      "~lsu_stbuf|lsu_stbuf>io_lsu_pkt_r_valid",
      "~lsu_stbuf|lsu_stbuf>io_lsu_pkt_r_bits_store",
      "~lsu_stbuf|lsu_stbuf>io_addr_in_dccm_m",
      "~lsu_stbuf|lsu_stbuf>io_lsu_pkt_m_bits_dma",
      "~lsu_stbuf|lsu_stbuf>io_lsu_pkt_m_valid",
      "~lsu_stbuf|lsu_stbuf>io_lsu_pkt_m_bits_store"
    ]
  },
  {
    "class":"firrtl.transforms.CombinationalPath",
    "sink":"~lsu_stbuf|lsu_stbuf>io_ldst_stbuf_reqvld_r",
    "sources":[
      "~lsu_stbuf|lsu_stbuf>io_store_stbuf_reqvld_r",
      "~lsu_stbuf|lsu_stbuf>io_lsu_commit_r",
      "~lsu_stbuf|lsu_stbuf>io_lsu_pkt_r_bits_dma"
    ]
  },
  {
    "class":"firrtl.EmitCircuitAnnotation",
    "emitter":"firrtl.VerilogEmitter"
  },
  {
    "class":"firrtl.transforms.BlackBoxResourceAnno",
    "target":"lsu_stbuf.gated_latch",
    "resourceId":"/vsrc/gated_latch.sv"
  },
  {
    "class":"firrtl.options.TargetDirAnnotation",
    "directory":"."
  },
  {
    "class":"firrtl.options.OutputAnnotationFileAnnotation",
    "file":"lsu_stbuf"
  },
  {
    "class":"firrtl.transforms.BlackBoxTargetDirAnno",
    "targetDir":"."
  }
]