51 lines
1.7 KiB
Systemverilog
51 lines
1.7 KiB
Systemverilog
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typedef struct packed {
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logic TEST1;
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logic RME;
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logic [3:0] RM;
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logic LS;
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logic DS;
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logic SD;
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logic TEST_RNM;
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logic BC1;
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logic BC2;
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} ccm_ext_in_pkt_t;
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typedef struct packed {
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logic TEST1;
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logic RME;
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logic [3:0] RM;
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logic LS;
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logic DS;
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logic SD;
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logic TEST_RNM;
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logic BC1;
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logic BC2;
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} dccm_ext_in_pkt_t;
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typedef struct packed {
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logic TEST1;
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logic RME;
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logic [3:0] RM;
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logic LS;
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logic DS;
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logic SD;
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logic TEST_RNM;
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logic BC1;
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logic BC2;
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} ic_data_ext_in_pkt_t;
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typedef struct packed {
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logic TEST1;
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logic RME;
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logic [3:0] RM;
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logic LS;
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logic DS;
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logic SD;
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logic TEST_RNM;
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logic BC1;
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logic BC2;
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} ic_tag_ext_in_pkt_t;
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