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quasar/el2_ifu_mem_ctl.anno.json

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Clk enable removed from predictor
2020-10-07 12:35:34 +08:00
[
ICCM Done
2020-10-12 19:46:52 +08:00
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_hit_f",
"sources":[
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_hit"
]
},
IMC 80%
2020-10-19 13:10:40 +08:00
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rd_ecc_single_err",
"sources":[
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dec_tlu_core_ecc_disable",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rd_data_ecc",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_fetch_val_f",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_hit_f",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_hit"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_wren",
"sources":[
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dma_mem_write",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dma_iccm_req",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_dma_sb_error",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifc_dma_access_ok",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dec_tlu_core_ecc_disable",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rd_data_ecc",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_fetch_val_f",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_hit_f",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_hit"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_access_fault_type_f",
"sources":[
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rd_ecc_double_err",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dec_tlu_core_ecc_disable",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rd_data_ecc",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_fetch_val_f",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_hit_f",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_hit"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_dma_active",
"sources":[
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dec_tlu_flush_err_wb",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dec_tlu_i0_commit_cmt",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_fetch_val",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_data"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_test",
"sources":[
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rd_data_ecc",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dec_tlu_core_ecc_disable",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_fetch_val_f",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_hit_f",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_hit"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rd_ecc_double_err",
"sources":[
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dec_tlu_core_ecc_disable",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rd_data_ecc",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_fetch_val_f",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_hit_f",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_hit"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_fetch_val_f",
"sources":[
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_hit_f",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_hit"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rw_addr",
"sources":[
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dma_mem_addr",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dma_iccm_req",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifc_fetch_addr_bf",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_dma_sb_error",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifc_dma_access_ok",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dec_tlu_core_ecc_disable",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rd_data_ecc",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_fetch_val_f",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_hit_f",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_hit"
]
},
ICCM Done
2020-10-12 19:46:52 +08:00
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_access_fault_f",
"sources":[
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
IMC 80%
2020-10-19 13:10:40 +08:00
"sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_wr_data",
ICCM Done
2020-10-12 19:46:52 +08:00
"sources":[
IMC 80%
2020-10-19 13:10:40 +08:00
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dma_iccm_req",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dma_mem_wdata",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_dma_sb_error",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifc_dma_access_ok",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dec_tlu_core_ecc_disable",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rd_data_ecc",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_fetch_val_f",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_hit_f",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_hit"
ICCM Done
2020-10-12 19:46:52 +08:00
]
},
{
"class":"firrtl.transforms.CombinationalPath",
IMC 80%
2020-10-19 13:10:40 +08:00
"sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_wr_size",
ICCM Done
2020-10-12 19:46:52 +08:00
"sources":[
IMC 80%
2020-10-19 13:10:40 +08:00
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dma_mem_sz",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dma_iccm_req"
ICCM Done
2020-10-12 19:46:52 +08:00
]
},
{
"class":"firrtl.transforms.CombinationalPath",
IMC 80%
2020-10-19 13:10:40 +08:00
"sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_dma_ecc_error",
"sources":[
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dec_tlu_core_ecc_disable",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rd_data_ecc",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_fetch_val_f",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_hit_f",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_hit"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_error_start",
ICCM Done
2020-10-12 19:46:52 +08:00
"sources":[
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_eccerr",
IMC 80%
2020-10-19 13:10:40 +08:00
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_tag_perr",
ICCM Done
2020-10-12 19:46:52 +08:00
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_hit",
IMC 80%
2020-10-19 13:10:40 +08:00
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_bp_hit_taken_f",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_hit_f",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_axi_rid",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_axi_rvalid",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_bus_clk_en"
ICCM Done
2020-10-12 19:46:52 +08:00
]
},
{
"class":"firrtl.transforms.CombinationalPath",
IMC 80%
2020-10-19 13:10:40 +08:00
"sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_dma_sb_error",
"sources":[
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dec_tlu_core_ecc_disable",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rd_data_ecc",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_fetch_val_f",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_hit_f",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_hit"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rden",
ICCM Done
2020-10-12 19:46:52 +08:00
"sources":[
IMC 80%
2020-10-19 13:10:40 +08:00
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifc_iccm_access_bf",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifc_fetch_req_bf",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dma_iccm_req",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dma_mem_write",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_dma_sb_error",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifc_dma_access_ok",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dec_tlu_core_ecc_disable",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rd_data_ecc",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_fetch_val_f",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_hit_f",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_hit"
ICCM Done
2020-10-12 19:46:52 +08:00
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_debug_wr_data",
"sources":[
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dec_tlu_ic_diag_pkt_icache_wrdata"
]
},
IMC 80%
2020-10-19 13:10:40 +08:00
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_async_error_start",
"sources":[
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rd_ecc_single_err",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_error_start",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_eccerr",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_tag_perr",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_hit",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dec_tlu_core_ecc_disable",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rd_data_ecc",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_bp_hit_taken_f",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_hit_f",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_fetch_val_f",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_axi_rid",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_axi_rvalid",
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_bus_clk_en"
]
},
Clk enable removed from predictor
2020-10-07 12:35:34 +08:00
{
"class":"firrtl.EmitCircuitAnnotation",
"emitter":"firrtl.VerilogEmitter"
},
ICCM Done
2020-10-12 19:46:52 +08:00
{
"class":"firrtl.transforms.BlackBoxResourceAnno",
"target":"el2_ifu_mem_ctl.TEC_RV_ICG",
"resourceId":"/vsrc/TEC_RV_ICG.v"
},
Clk enable removed from predictor
2020-10-07 12:35:34 +08:00
{
"class":"firrtl.options.TargetDirAnnotation",
"directory":"."
},
{
"class":"firrtl.options.OutputAnnotationFileAnnotation",
"file":"el2_ifu_mem_ctl"
},
{
"class":"firrtl.transforms.BlackBoxTargetDirAnno",
"targetDir":"."
}
]