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Update el2_ifu_compress_ctl.scala

This commit is contained in:
Sarmad-paracha 2020-09-25 21:39:02 +05:00 committed by GitHub
parent 964a6009af
commit 04aeb043e9
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GPG Key ID: 4AEE18F83AFDEB23
1 changed files with 6 additions and 6 deletions
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12
src/main/scala/ifu/el2_ifu_compress_ctl.scala
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@ -179,8 +179,8 @@ class RVCDecoder(x: UInt, xLen: Int) {
class el2_ifu_compress_ctl( val XLen: Int, val usingCompressed: Boolean) extends Module {
val io = IO(new Bundle {
val in = Input(UInt(16.W))
val out = Output(UInt(32.W))
val din = Input(UInt(16.W))
val dout = Output(UInt(32.W))
//val rvc = Output(Bool())
//val legal = Output(Bool())
//val waleed_out = Output(UInt(32.W))
@ -189,10 +189,10 @@ class el2_ifu_compress_ctl( val XLen: Int, val usingCompressed: Boolean) extends
//val q3_Out = Output(new ExpandedInstruction)
})
if (usingCompressed) {
val rvc = io.in(1,0) =/= 3.U
val inst = new RVCDecoder(Cat(Fill(16,0.U),io.in), XLen)
val rvc = io.din(1,0) =/= 3.U
val inst = new RVCDecoder(Cat(Fill(16,0.U),io.din), XLen)
val decoded = inst.decode
io.out := Mux(rvc, 0.U, decoded.bits)
io.dout := Mux(rvc, 0.U, decoded.bits)
//io.out.rd := 0.U
//io.out.rs1 := 0.U
//io.out.rs2 := 0.U
@ -221,7 +221,7 @@ class el2_ifu_compress_ctl( val XLen: Int, val usingCompressed: Boolean) extends
io.waleed_out := Mux(io.legal,io.out.bits,0.U)*/
} else {
//io.rvc := false.B
io.out := new RVCDecoder(io.in, XLen).passthrough
io.dout := new RVCDecoder(io.din, XLen).passthrough
}
}