colin
/
quasar
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Only 1 obj

This commit is contained in:
waleed-lm 2020-12-10 12:36:03 +05:00
parent 2a79511a72
commit 0bd697a1d2
9 changed files with 1 additions and 194730 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

90
dmi_wrapper.sv
View File

@ -1,90 +0,0 @@
// SPDX-License-Identifier: Apache-2.0
// Copyright 2018 Western Digital Corporation or it's affiliates.
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
//------------------------------------------------------------------------------------
//
// Copyright Western Digital, 2018
// Owner : Anusha Narayanamoorthy
// Description:
// Wrapper module for JTAG_TAP and DMI synchronizer
//
//-------------------------------------------------------------------------------------
module dmi_wrapper(
// JTAG signals
input trst_n, // JTAG reset
input tck, // JTAG clock
input tms, // Test mode select
input tdi, // Test Data Input
output tdo, // Test Data Output
output tdoEnable, // Test Data Output enable
// Processor Signals
input core_rst_n, // Core reset
input core_clk, // Core clock
input [31:1] jtag_id, // JTAG ID
input [31:0] rd_data, // 32 bit Read data from Processor
output [31:0] reg_wr_data, // 32 bit Write data to Processor
output [6:0] reg_wr_addr, // 7 bit reg address to Processor
output reg_en, // 1 bit Read enable to Processor
output reg_wr_en, // 1 bit Write enable to Processor
output dmi_hard_reset
);
//Wire Declaration
wire rd_en;
wire wr_en;
wire dmireset;
//jtag_tap instantiation
rvjtag_tap i_jtag_tap(
.trst(trst_n), // dedicated JTAG TRST (active low) pad signal or asynchronous active low power on reset
.tck(tck), // dedicated JTAG TCK pad signal
.tms(tms), // dedicated JTAG TMS pad signal
.tdi(tdi), // dedicated JTAG TDI pad signal
.tdo(tdo), // dedicated JTAG TDO pad signal
.tdoEnable(tdoEnable), // enable for TDO pad
.wr_data(reg_wr_data), // 32 bit Write data
.wr_addr(reg_wr_addr), // 7 bit Write address
.rd_en(rd_en), // 1 bit read enable
.wr_en(wr_en), // 1 bit Write enable
.rd_data(rd_data), // 32 bit Read data
.rd_status(2'b0),
.idle(3'h0), // no need to wait to sample data
.dmi_stat(2'b0), // no need to wait or error possible
.version(4'h1), // debug spec 0.13 compliant
.jtag_id(jtag_id),
.dmi_hard_reset(dmi_hard_reset),
.dmi_reset(dmireset)
);
// dmi_jtag_to_core_sync instantiation
dmi_jtag_to_core_sync i_dmi_jtag_to_core_sync(
.wr_en(wr_en), // 1 bit Write enable
.rd_en(rd_en), // 1 bit Read enable
.rst_n(core_rst_n),
.clk(core_clk),
.reg_en(reg_en), // 1 bit Write interface bit
.reg_wr_en(reg_wr_en) // 1 bit Write enable
);
endmodule

3
firrtl_black_box_resource_files.f
View File

@ -1,3 +0,0 @@
/home/waleedbinehsan/Desktop/Quasar/gated_latch.v
/home/waleedbinehsan/Desktop/Quasar/dmi_wrapper.sv
/home/waleedbinehsan/Desktop/Quasar/mem.sv

14
gated_latch.v
View File

@ -1,14 +0,0 @@
module gated_latch
(
input wire SE, EN, CK,
output Q
);
reg en_ff;
wire enable;
assign enable = EN | SE;
always @(CK, enable) begin
if(!CK)
en_ff = enable;
end
assign Q = CK & en_ff;
endmodule

173
mem.sv
View File

@ -1,173 +0,0 @@
module mem #(
parameter ICACHE_BEAT_BITS,
parameter ICCM_BITS,
parameter ICACHE_NUM_WAYS,
parameter DCCM_BYTE_WIDTH,
parameter ICCM_BANK_INDEX_LO,
parameter ICACHE_BANK_BITS,
parameter DCCM_BITS,
parameter ICACHE_BEAT_ADDR_HI,
parameter ICCM_INDEX_BITS,
parameter ICCM_BANK_HI,
parameter ICACHE_BANKS_WAY,
parameter ICACHE_INDEX_HI,
parameter DCCM_NUM_BANKS,
parameter ICACHE_BANK_HI,
parameter ICACHE_BANK_LO,
parameter DCCM_ENABLE= 'b1,
parameter ICACHE_TAG_LO,
parameter ICACHE_DATA_INDEX_LO,
parameter ICCM_NUM_BANKS,
parameter ICACHE_ECC,
parameter ICACHE_ENABLE= 'b1,
parameter DCCM_BANK_BITS,
parameter ICCM_ENABLE= 'b1,
parameter ICCM_BANK_BITS,
parameter ICACHE_TAG_DEPTH,
parameter ICACHE_WAYPACK,
parameter DCCM_SIZE,
parameter DCCM_FDATA_WIDTH,
parameter ICACHE_TAG_INDEX_LO,
parameter ICACHE_DATA_DEPTH)
(
input logic clk,
input logic rst_l,
input logic dccm_clk_override,
input logic icm_clk_override,
input logic dec_tlu_core_ecc_disable,
//DCCM ports
input logic dccm_wren,
input logic dccm_rden,
input logic [DCCM_BITS-1:0] dccm_wr_addr_lo,
input logic [DCCM_BITS-1:0] dccm_wr_addr_hi,
input logic [DCCM_BITS-1:0] dccm_rd_addr_lo,
input logic [DCCM_BITS-1:0] dccm_rd_addr_hi,
input logic [DCCM_FDATA_WIDTH-1:0] dccm_wr_data_lo,
input logic [DCCM_FDATA_WIDTH-1:0] dccm_wr_data_hi,
output logic [DCCM_FDATA_WIDTH-1:0] dccm_rd_data_lo,
output logic [DCCM_FDATA_WIDTH-1:0] dccm_rd_data_hi,
//`ifdef DCCM_ENABLE
//`endif
//ICCM ports
input logic [ICCM_BITS-1:1] iccm_rw_addr,
input logic iccm_buf_correct_ecc, // ICCM is doing a single bit error correct cycle
input logic iccm_correction_state, // ICCM is doing a single bit error correct cycle
input logic iccm_wren,
input logic iccm_rden,
input logic [2:0] iccm_wr_size,
input logic [77:0] iccm_wr_data,
output logic [63:0] iccm_rd_data,
output logic [77:0] iccm_rd_data_ecc,
// Icache and Itag Ports
input logic [31:1] ic_rw_addr,
input logic [ICACHE_NUM_WAYS-1:0] ic_tag_valid,
input logic [ICACHE_NUM_WAYS-1:0] ic_wr_en,
input logic ic_rd_en,
input logic [63:0] ic_premux_data, // Premux data to be muxed with each way of the Icache.
input logic ic_sel_premux_data, // Premux data sel
input logic [70:0] ic_wr_data_0, // Data to fill to the Icache. With ECC
input logic [70:0] ic_wr_data_1,
input logic [70:0] ic_debug_wr_data, // Debug wr cache.
output logic [70:0] ic_debug_rd_data , // Data read from Icache. 2x64bits + parity bits. F2 stage. With ECC
input logic [ICACHE_INDEX_HI:3] ic_debug_addr, // Read/Write addresss to the Icache.
input logic ic_debug_rd_en, // Icache debug rd
input logic ic_debug_wr_en, // Icache debug wr
input logic ic_debug_tag_array, // Debug tag array
input logic [ICACHE_NUM_WAYS-1:0] ic_debug_way, // Debug way. Rd or Wr.
output logic [63:0] ic_rd_data , // Data read from Icache. 2x64bits + parity bits. F2 stage. With ECC
output logic [25:0] ic_tag_debug_rd_data,// Debug icache tag.
output logic [ICACHE_BANKS_WAY-1:0] ic_eccerr, // ecc error per bank
output logic [ICACHE_BANKS_WAY-1:0] ic_parerr, // parity error per bank
output logic [ICACHE_NUM_WAYS-1:0] ic_rd_hit,
output logic ic_tag_perr, // Icache Tag parity error
input logic scan_mode
);
logic [ICACHE_BANKS_WAY-1:0][70:0] ic_wr_data;
assign ic_wr_data [0] = ic_wr_data_0;
assign ic_wr_data [1] = ic_wr_data_1;
// DCCM Instantiation
if (DCCM_ENABLE == 1) begin: Gen_dccm_enable
lsu_dccm_mem #(
.DCCM_BYTE_WIDTH(DCCM_BYTE_WIDTH),
.DCCM_BITS(DCCM_BITS),
.DCCM_NUM_BANKS(DCCM_NUM_BANKS),
.DCCM_BANK_BITS(DCCM_BANK_BITS),
.DCCM_SIZE(DCCM_SIZE),
.DCCM_FDATA_WIDTH(DCCM_FDATA_WIDTH)) dccm (
.clk_override(dccm_clk_override),
.*
);
end else begin: Gen_dccm_disable
assign dccm_rd_data_lo = '0;
assign dccm_rd_data_hi = '0;
end
if ( ICACHE_ENABLE ) begin: icache
ifu_ic_mem #(
.ICACHE_BEAT_BITS(ICACHE_BEAT_BITS),
.ICACHE_NUM_WAYS(ICACHE_NUM_WAYS),
.ICACHE_BANK_BITS(ICACHE_BANK_BITS),
.ICACHE_BEAT_ADDR_HI(ICACHE_BEAT_ADDR_HI),
.ICACHE_BANKS_WAY(ICACHE_BANKS_WAY),
.ICACHE_INDEX_HI(ICACHE_INDEX_HI),
.ICACHE_BANK_HI(ICACHE_BANK_HI),
.ICACHE_BANK_LO(ICACHE_BANK_LO),
.ICACHE_TAG_LO(ICACHE_TAG_LO),
.ICACHE_DATA_INDEX_LO(ICACHE_DATA_INDEX_LO),
.ICACHE_ECC(ICACHE_ECC),
.ICACHE_TAG_DEPTH(ICACHE_TAG_DEPTH),
.ICACHE_WAYPACK(ICACHE_WAYPACK),
.ICACHE_TAG_INDEX_LO(ICACHE_TAG_INDEX_LO),
.ICACHE_DATA_DEPTH(ICACHE_DATA_DEPTH)) icm (
.clk_override(icm_clk_override),
.*
);
end
else begin
assign ic_rd_hit[ICACHE_NUM_WAYS-1:0] = '0;
assign ic_tag_perr = '0 ;
assign ic_rd_data = '0 ;
assign ic_tag_debug_rd_data = '0 ;
end // else: !if( ICACHE_ENABLE )
if (ICCM_ENABLE) begin : iccm
ifu_iccm_mem #(
.ICCM_BITS(ICCM_BITS),
.ICCM_BANK_INDEX_LO(ICCM_BANK_INDEX_LO),
.ICCM_INDEX_BITS(ICCM_INDEX_BITS),
.ICCM_BANK_HI(ICCM_BANK_HI),
.ICCM_NUM_BANKS(ICCM_NUM_BANKS),
.ICCM_BANK_BITS(ICCM_BANK_BITS)) iccm (.*,
.clk_override(icm_clk_override),
.iccm_rw_addr(iccm_rw_addr[ICCM_BITS-1:1]),
.iccm_rd_data(iccm_rd_data[63:0])
);
end
else begin
assign iccm_rd_data = '0 ;
assign iccm_rd_data_ecc = '0 ;
end
endmodule

997
quasar_wrapper.anno.json
View File

@ -1,997 +0,0 @@
[
{
"class":"firrtl.EmitCircuitAnnotation",
"emitter":"firrtl.VerilogEmitter"
},
{
"class":"firrtl.transforms.BlackBoxResourceAnno",
"target":"quasar_wrapper.gated_latch",
"resourceId":"/vsrc/gated_latch.v"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>selected_int_priority"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_4_2"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_4_0"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_3_4"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_3_2"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_3_0"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_2_8"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_2_6"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_2_4"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_2_2"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_2_0"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_1_16"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_1_14"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_1_12"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_1_10"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_1_8"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_1_6"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_1_4"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_1_2"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_1_0"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_0_32"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_0_30"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_0_28"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_0_26"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_0_24"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_0_22"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_0_20"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_0_18"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_0_16"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_0_14"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_0_12"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_0_10"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_0_8"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_0_6"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_0_4"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_0_2"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_0_0"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_w_prior_en_0_0"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_w_prior_en_0_1"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_w_prior_en_0_2"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_w_prior_en_0_3"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_w_prior_en_0_4"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_w_prior_en_0_5"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_w_prior_en_0_6"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_w_prior_en_0_7"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_w_prior_en_0_8"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_w_prior_en_0_9"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_w_prior_en_0_10"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_w_prior_en_0_11"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_w_prior_en_0_12"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_w_prior_en_0_13"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_w_prior_en_0_14"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_w_prior_en_0_15"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_w_prior_en_0_16"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_w_prior_en_0_17"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_w_prior_en_0_18"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_w_prior_en_0_19"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_w_prior_en_0_20"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_w_prior_en_0_21"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_w_prior_en_0_22"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_w_prior_en_0_23"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_w_prior_en_0_24"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_w_prior_en_0_25"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_w_prior_en_0_26"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_w_prior_en_0_27"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_w_prior_en_0_28"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_w_prior_en_0_29"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_w_prior_en_0_30"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_w_prior_en_0_31"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_w_prior_en_0_32"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_w_prior_en_0_33"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_0_1"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_0_3"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_0_5"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_0_7"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_0_9"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_0_11"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_0_13"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_0_15"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_0_17"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_0_19"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_0_21"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_0_23"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_0_25"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_0_27"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_0_29"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_0_31"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_0_33"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_1_1"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_1_3"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_1_5"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_1_7"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_1_9"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_1_11"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_1_13"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_1_15"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_1_17"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_1_18"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_1_19"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_1_20"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_1_21"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_1_22"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_1_23"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_1_24"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_1_25"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_1_26"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_1_27"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_1_28"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_1_29"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_1_30"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_1_31"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_1_32"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_1_33"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_2_1"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_2_3"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_2_5"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_2_7"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_2_9"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_2_10"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_2_11"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_2_12"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_2_13"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_2_14"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_2_15"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_2_16"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_2_17"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_2_18"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_2_19"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_2_20"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_2_21"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_2_22"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_2_23"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_2_24"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_2_25"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_2_26"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_2_27"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_2_28"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_2_29"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_2_30"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_2_31"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_2_32"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_2_33"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_3_1"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_3_3"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_3_5"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_3_6"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_3_7"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_3_8"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_3_9"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_3_10"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_3_11"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_3_12"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_3_13"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_3_14"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_3_15"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_3_16"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_3_17"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_3_18"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_3_19"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_3_20"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_3_21"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_3_22"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_3_23"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_3_24"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_3_25"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_3_26"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_3_27"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_3_28"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_3_29"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_3_30"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_3_31"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_3_32"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_3_33"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_4_1"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_4_3"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_4_4"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_4_5"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_4_6"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_4_7"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_4_8"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_4_9"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_4_10"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_4_11"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_4_12"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_4_13"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_4_14"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_4_15"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_4_16"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_4_17"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_4_18"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_4_19"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_4_20"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_4_21"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_4_22"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_4_23"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_4_24"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_4_25"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_4_26"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_4_27"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_4_28"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_4_29"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_4_30"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_4_31"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_4_32"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_4_33"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_5_0"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_5_1"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_5_2"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_5_3"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_5_4"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_5_5"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_5_6"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_5_7"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_5_8"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_5_9"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_5_10"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_5_11"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_5_12"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_5_13"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_5_14"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_5_15"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_5_16"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_5_17"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_5_18"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_5_19"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_5_20"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_5_21"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_5_22"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_5_23"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_5_24"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_5_25"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_5_26"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_5_27"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_5_28"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_5_29"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_5_30"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_5_31"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_5_32"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|pic_ctrl>level_intpend_id_5_33"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|exu>i0_rs2_d"
},
{
"class":"firrtl.transforms.DontTouchAnnotation",
"target":"~quasar_wrapper|dec_trigger>io_dec_i0_trigger_match_d"
},
{
"class":"firrtl.transforms.BlackBoxResourceAnno",
"target":"quasar_wrapper.dmi_wrapper",
"resourceId":"/vsrc/dmi_wrapper.sv"
},
{
"class":"firrtl.transforms.BlackBoxResourceAnno",
"target":"quasar_wrapper.mem",
"resourceId":"/vsrc/mem.sv"
},
{
"class":"firrtl.options.TargetDirAnnotation",
"directory":"."
},
{
"class":"firrtl.options.OutputAnnotationFileAnnotation",
"file":"quasar_wrapper"
},
{
"class":"firrtl.transforms.BlackBoxTargetDirAnno",
"targetDir":"."
}
]

109968
quasar_wrapper.fir
View File

File diff suppressed because one or more lines are too long

83480
quasar_wrapper.v
View File

File diff suppressed because it is too large Load Diff

3
src/main/scala/quasar.scala
View File

@ -337,7 +337,7 @@ class quasar extends Module with RequireAsyncReset with lib {
/*when(BUILD_AHB_LITE.B) { when(BUILD_AHB_LITE.B) {
val lsu_axi4_to_ahb = Module(new axi4_to_ahb()) val lsu_axi4_to_ahb = Module(new axi4_to_ahb())
lsu_axi4_to_ahb.io.axi_awvalid := io.lsu_axi.aw.valid lsu_axi4_to_ahb.io.axi_awvalid := io.lsu_axi.aw.valid
lsu_axi4_to_ahb.io.scan_mode := io.scan_mode lsu_axi4_to_ahb.io.scan_mode := io.scan_mode
@ -514,7 +514,6 @@ class quasar extends Module with RequireAsyncReset with lib {
io.dma_hreadyout := 0.U io.dma_hreadyout := 0.U
io.dma_hresp := 0.U io.dma_hresp := 0.U
} }
io.dmi_reg_rdata := 0.U*/
io.haddr := 0.U io.haddr := 0.U
io.hburst := 0.U io.hburst := 0.U

3
src/main/scala/quasar_wrapper.scala
View File

@ -197,6 +197,3 @@ class quasar_wrapper extends Module with lib with RequireAsyncReset {
io.dma_hresp := core.io.dma_hresp io.dma_hresp := core.io.dma_hresp
} }
object QUASAR_Wrp extends App {
println((new chisel3.stage.ChiselStage).emitVerilog(new quasar_wrapper()))
}