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BP Started

This commit is contained in:
waleed-lm 2020-10-21 11:09:44 +05:00
parent aa2d1436e8
commit 0da296342e
6 changed files with 20845 additions and 21404 deletions
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36106
el2_ifu_bp_ctl.fir
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6132
el2_ifu_bp_ctl.v
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src/main/scala/ifu/el2_ifu_bp_ctl.scala
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@ -372,13 +372,18 @@ class el2_ifu_bp_ctl extends Module with el2_lib with RequireAsyncReset {
val bht_bank_clken = Wire(Vec(2, Vec(BHT_ARRAY_DEPTH/NUM_BHT_LOOP, Bool())))
for(i<-0 until 2; k<- 0 until (BHT_ARRAY_DEPTH/NUM_BHT_LOOP)){
bht_bank_clken(i)(k) := (bht_wr_en0(i) & ((bht_wr_addr0(BHT_ADDR_HI-BHT_ADDR_LO,NUM_BHT_LOOP_OUTER_LO-1)===k.U) | BHT_NO_ADDR_MATCH.B)) |
(bht_wr_en2(i) & ((bht_wr_addr2(BHT_ADDR_HI-BHT_ADDR_LO,NUM_BHT_LOOP_OUTER_LO-1)===k.U) | BHT_NO_ADDR_MATCH.B))
bht_bank_clken(i)(k) := (bht_wr_en0(i) & ((bht_wr_addr0(BHT_ADDR_HI-BHT_ADDR_LO,NUM_BHT_LOOP_OUTER_LO-2)===k.U) | BHT_NO_ADDR_MATCH.B)) |
(bht_wr_en2(i) & ((bht_wr_addr2(BHT_ADDR_HI-BHT_ADDR_LO,NUM_BHT_LOOP_OUTER_LO-2)===k.U) | BHT_NO_ADDR_MATCH.B))
}
val bht_bank_wr_data = (0 until 2).map(i=>(0 until BHT_ARRAY_DEPTH/NUM_BHT_LOOP).map(k=>(0 until NUM_BHT_LOOP).map(j=>
Mux((bht_wr_en2(i)&(bht_wr_addr2(NUM_BHT_LOOP_INNER_HI-BHT_ADDR_LO,0)===j.asUInt)&(bht_wr_addr2(BHT_ADDR_HI-NUM_BHT_LOOP_OUTER_LO+1,NUM_BHT_LOOP_OUTER_LO-BHT_ADDR_LO)===k.asUInt)|BHT_NO_ADDR_MATCH.B).asBool, bht_wr_data2, bht_wr_data0))))
Mux((bht_wr_en2(i)&(bht_wr_addr2(NUM_BHT_LOOP_INNER_HI-BHT_ADDR_LO,0)===j.U)&(bht_wr_addr2(BHT_ADDR_HI-BHT_ADDR_LO,NUM_BHT_LOOP_OUTER_LO-BHT_ADDR_LO)===k.U)|BHT_NO_ADDR_MATCH.B).asBool, bht_wr_data2, bht_wr_data0))))
//BHT_ADDR_HI-NUM_BHT_LOOP_OUTER_LO, NUM_BHT_LOOP_OUTER_LO-BHT_ADDR_LO
println(s"The addresses we are checking are ${BHT_ADDR_HI-BHT_ADDR_LO} : ${NUM_BHT_LOOP_OUTER_LO-BHT_ADDR_LO}")
println(s"The addresses we are checking are ${NUM_BHT_LOOP_INNER_HI-BHT_ADDR_LO} : 0")
//NUM_BHT_LOOP_INNER_HI-BHT_ADDR_LO
val bht_bank_sel = Wire(Vec(2, Vec(BHT_ARRAY_DEPTH/NUM_BHT_LOOP, Vec(NUM_BHT_LOOP, Bool()))))
for(i<-0 until 2; k<-0 until BHT_ARRAY_DEPTH/NUM_BHT_LOOP; j<- 0 until NUM_BHT_LOOP){

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target/scala-2.12/classes/ifu/el2_ifu_bp_ctl.class
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target/scala-2.12/classes/ifu/ifu_bp$.class
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target/scala-2.12/classes/ifu/ifu_bp$delayedInit$body.class
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