This commit is contained in:
waleed-lm 2020-10-26 19:22:45 +05:00
parent a5341c5549
commit 132de07541
4 changed files with 9 additions and 9 deletions

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@ -7357,7 +7357,7 @@ circuit el2_ifu_mem_ctl :
node _T_5186 = and(_T_5184, _T_5185) @[el2_ifu_mem_ctl.scala 743:83]
node _T_5187 = or(_T_5182, _T_5186) @[el2_ifu_mem_ctl.scala 742:113]
node _T_5188 = or(_T_5187, reset_all_tags) @[el2_ifu_mem_ctl.scala 743:106]
node tag_valid_clken_0 = cat(_T_5178, _T_5188) @[Cat.scala 29:58]
node tag_valid_clken_0 = cat(_T_5188, _T_5178) @[Cat.scala 29:58]
node _T_5189 = bits(ifu_ic_rw_int_addr_ff, 5, 4) @[el2_ifu_mem_ctl.scala 742:35]
node _T_5190 = eq(_T_5189, UInt<1>("h01")) @[el2_ifu_mem_ctl.scala 742:82]
node _T_5191 = bits(ifu_tag_wren_ff, 0, 0) @[el2_ifu_mem_ctl.scala 742:108]
@ -7378,7 +7378,7 @@ circuit el2_ifu_mem_ctl :
node _T_5206 = and(_T_5204, _T_5205) @[el2_ifu_mem_ctl.scala 743:83]
node _T_5207 = or(_T_5202, _T_5206) @[el2_ifu_mem_ctl.scala 742:113]
node _T_5208 = or(_T_5207, reset_all_tags) @[el2_ifu_mem_ctl.scala 743:106]
node tag_valid_clken_1 = cat(_T_5198, _T_5208) @[Cat.scala 29:58]
node tag_valid_clken_1 = cat(_T_5208, _T_5198) @[Cat.scala 29:58]
node _T_5209 = bits(ifu_ic_rw_int_addr_ff, 5, 4) @[el2_ifu_mem_ctl.scala 742:35]
node _T_5210 = eq(_T_5209, UInt<2>("h02")) @[el2_ifu_mem_ctl.scala 742:82]
node _T_5211 = bits(ifu_tag_wren_ff, 0, 0) @[el2_ifu_mem_ctl.scala 742:108]
@ -7399,7 +7399,7 @@ circuit el2_ifu_mem_ctl :
node _T_5226 = and(_T_5224, _T_5225) @[el2_ifu_mem_ctl.scala 743:83]
node _T_5227 = or(_T_5222, _T_5226) @[el2_ifu_mem_ctl.scala 742:113]
node _T_5228 = or(_T_5227, reset_all_tags) @[el2_ifu_mem_ctl.scala 743:106]
node tag_valid_clken_2 = cat(_T_5218, _T_5228) @[Cat.scala 29:58]
node tag_valid_clken_2 = cat(_T_5228, _T_5218) @[Cat.scala 29:58]
node _T_5229 = bits(ifu_ic_rw_int_addr_ff, 5, 4) @[el2_ifu_mem_ctl.scala 742:35]
node _T_5230 = eq(_T_5229, UInt<2>("h03")) @[el2_ifu_mem_ctl.scala 742:82]
node _T_5231 = bits(ifu_tag_wren_ff, 0, 0) @[el2_ifu_mem_ctl.scala 742:108]
@ -7420,7 +7420,7 @@ circuit el2_ifu_mem_ctl :
node _T_5246 = and(_T_5244, _T_5245) @[el2_ifu_mem_ctl.scala 743:83]
node _T_5247 = or(_T_5242, _T_5246) @[el2_ifu_mem_ctl.scala 742:113]
node _T_5248 = or(_T_5247, reset_all_tags) @[el2_ifu_mem_ctl.scala 743:106]
node tag_valid_clken_3 = cat(_T_5238, _T_5248) @[Cat.scala 29:58]
node tag_valid_clken_3 = cat(_T_5248, _T_5238) @[Cat.scala 29:58]
wire ic_tag_valid_out : UInt<1>[128][2] @[el2_ifu_mem_ctl.scala 746:32]
node _T_5249 = bits(reset_all_tags, 0, 0) @[el2_ifu_mem_ctl.scala 748:82]
node _T_5250 = eq(_T_5249, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 748:66]

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@ -3786,7 +3786,7 @@ module el2_ifu_mem_ctl(
wire _T_5186 = _T_5174 & perr_err_inv_way[1]; // @[el2_ifu_mem_ctl.scala 743:83]
wire _T_5187 = _T_5182 | _T_5186; // @[el2_ifu_mem_ctl.scala 742:113]
wire _T_5188 = _T_5187 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 743:106]
wire [1:0] tag_valid_clken_0 = {_T_5178,_T_5188}; // @[Cat.scala 29:58]
wire [1:0] tag_valid_clken_0 = {_T_5188,_T_5178}; // @[Cat.scala 29:58]
wire _T_5190 = ifu_ic_rw_int_addr_ff[5:4] == 2'h1; // @[el2_ifu_mem_ctl.scala 742:82]
wire _T_5192 = _T_5190 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 742:91]
wire _T_5194 = perr_ic_index_ff[5:4] == 2'h1; // @[el2_ifu_mem_ctl.scala 743:74]
@ -3797,7 +3797,7 @@ module el2_ifu_mem_ctl(
wire _T_5206 = _T_5194 & perr_err_inv_way[1]; // @[el2_ifu_mem_ctl.scala 743:83]
wire _T_5207 = _T_5202 | _T_5206; // @[el2_ifu_mem_ctl.scala 742:113]
wire _T_5208 = _T_5207 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 743:106]
wire [1:0] tag_valid_clken_1 = {_T_5198,_T_5208}; // @[Cat.scala 29:58]
wire [1:0] tag_valid_clken_1 = {_T_5208,_T_5198}; // @[Cat.scala 29:58]
wire _T_5210 = ifu_ic_rw_int_addr_ff[5:4] == 2'h2; // @[el2_ifu_mem_ctl.scala 742:82]
wire _T_5212 = _T_5210 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 742:91]
wire _T_5214 = perr_ic_index_ff[5:4] == 2'h2; // @[el2_ifu_mem_ctl.scala 743:74]
@ -3808,7 +3808,7 @@ module el2_ifu_mem_ctl(
wire _T_5226 = _T_5214 & perr_err_inv_way[1]; // @[el2_ifu_mem_ctl.scala 743:83]
wire _T_5227 = _T_5222 | _T_5226; // @[el2_ifu_mem_ctl.scala 742:113]
wire _T_5228 = _T_5227 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 743:106]
wire [1:0] tag_valid_clken_2 = {_T_5218,_T_5228}; // @[Cat.scala 29:58]
wire [1:0] tag_valid_clken_2 = {_T_5228,_T_5218}; // @[Cat.scala 29:58]
wire _T_5230 = ifu_ic_rw_int_addr_ff[5:4] == 2'h3; // @[el2_ifu_mem_ctl.scala 742:82]
wire _T_5232 = _T_5230 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 742:91]
wire _T_5234 = perr_ic_index_ff[5:4] == 2'h3; // @[el2_ifu_mem_ctl.scala 743:74]
@ -3819,7 +3819,7 @@ module el2_ifu_mem_ctl(
wire _T_5246 = _T_5234 & perr_err_inv_way[1]; // @[el2_ifu_mem_ctl.scala 743:83]
wire _T_5247 = _T_5242 | _T_5246; // @[el2_ifu_mem_ctl.scala 742:113]
wire _T_5248 = _T_5247 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 743:106]
wire [1:0] tag_valid_clken_3 = {_T_5238,_T_5248}; // @[Cat.scala 29:58]
wire [1:0] tag_valid_clken_3 = {_T_5248,_T_5238}; // @[Cat.scala 29:58]
wire _T_5251 = ic_valid_ff & _T_195; // @[el2_ifu_mem_ctl.scala 748:64]
wire _T_5252 = ~perr_sel_invalidate; // @[el2_ifu_mem_ctl.scala 748:91]
wire _T_5253 = _T_5251 & _T_5252; // @[el2_ifu_mem_ctl.scala 748:89]

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@ -741,7 +741,7 @@ class el2_ifu_mem_ctl extends Module with el2_lib {
if (ICACHE_TAG_DEPTH == 32) (ifu_tag_wren_ff(j) | perr_err_inv_way(j) | reset_all_tags)
else ((ifu_ic_rw_int_addr_ff(ICACHE_INDEX_HI - ICACHE_TAG_INDEX_LO - 1, 4) === i.U) & ifu_tag_wren_ff(j)) |
((perr_ic_index_ff(ICACHE_INDEX_HI - ICACHE_TAG_INDEX_LO - 1, 4) === i.U) & perr_err_inv_way(j)) |
reset_all_tags).reduce(Cat(_, _)))
reset_all_tags).reverse.reduce(Cat(_, _)))
// val tag_valid_clk = (0 until ICACHE_TAG_DEPTH / 32).map(i => (0 until ICACHE_NUM_WAYS).map(j => rvclkhdr(clock, tag_valid_clken(i)(j), io.scan_mode)))
val ic_tag_valid_out = Wire(Vec(ICACHE_NUM_WAYS, Vec(ICACHE_TAG_DEPTH, Bool())))
for (i <- 0 until ICACHE_TAG_DEPTH / 32; j <- 0 until ICACHE_NUM_WAYS; k <- 0 until 32)