From 1c32bd65e87c7c0930e54247af0fe6b0f711a18d Mon Sep 17 00:00:00 2001 From: waleed-lm Date: Tue, 27 Oct 2020 13:05:20 +0500 Subject: [PATCH] IMC DONE --- el2_ifu_mem_ctl.fir | 12 ++++++------ el2_ifu_mem_ctl.v | 8 ++++---- src/main/scala/ifu/el2_ifu_mem_ctl.scala | 2 +- .../classes/ifu/el2_ifu_mem_ctl.class | Bin 221945 -> 221954 bytes 4 files changed, 11 insertions(+), 11 deletions(-) diff --git a/el2_ifu_mem_ctl.fir b/el2_ifu_mem_ctl.fir index 1ede13f4..c97b0322 100644 --- a/el2_ifu_mem_ctl.fir +++ b/el2_ifu_mem_ctl.fir @@ -461,12 +461,12 @@ circuit el2_ifu_mem_ctl : node imb_in = mux(_T_269, imb_scnd_ff, _T_271) @[el2_ifu_mem_ctl.scala 292:19] wire ifu_wr_cumulative_err_data : UInt<1> ifu_wr_cumulative_err_data <= UInt<1>("h00") - node _T_272 = bits(imb_ff, 12, 6) @[el2_ifu_mem_ctl.scala 294:38] - node _T_273 = bits(imb_scnd_ff, 12, 6) @[el2_ifu_mem_ctl.scala 294:89] - node _T_274 = eq(_T_272, _T_273) @[el2_ifu_mem_ctl.scala 294:75] - node _T_275 = and(_T_274, scnd_miss_req) @[el2_ifu_mem_ctl.scala 294:127] - node _T_276 = eq(ifu_wr_cumulative_err_data, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 294:145] - node scnd_miss_index_match = and(_T_275, _T_276) @[el2_ifu_mem_ctl.scala 294:143] + node _T_272 = bits(imb_ff, 11, 5) @[el2_ifu_mem_ctl.scala 294:38] + node _T_273 = bits(imb_scnd_ff, 11, 5) @[el2_ifu_mem_ctl.scala 294:93] + node _T_274 = eq(_T_272, _T_273) @[el2_ifu_mem_ctl.scala 294:79] + node _T_275 = and(_T_274, scnd_miss_req) @[el2_ifu_mem_ctl.scala 294:135] + node _T_276 = eq(ifu_wr_cumulative_err_data, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 294:153] + node scnd_miss_index_match = and(_T_275, _T_276) @[el2_ifu_mem_ctl.scala 294:151] wire way_status_mb_ff : UInt<1> way_status_mb_ff <= UInt<1>("h00") wire way_status_rep_new : UInt<1> diff --git a/el2_ifu_mem_ctl.v b/el2_ifu_mem_ctl.v index 32590062..0031366a 100644 --- a/el2_ifu_mem_ctl.v +++ b/el2_ifu_mem_ctl.v @@ -1781,16 +1781,16 @@ module el2_ifu_mem_ctl( wire _T_264 = ifc_region_acc_fault_final_f & ifc_fetch_req_f; // @[el2_ifu_mem_ctl.scala 290:94] wire _T_268 = sel_hold_imb ? uncacheable_miss_ff : io_ifc_fetch_uncacheable_bf; // @[el2_ifu_mem_ctl.scala 291:84] wire uncacheable_miss_in = scnd_miss_req ? uncacheable_miss_scnd_ff : _T_268; // @[el2_ifu_mem_ctl.scala 291:32] - wire _T_274 = imb_ff[12:6] == imb_scnd_ff[12:6]; // @[el2_ifu_mem_ctl.scala 294:75] - wire _T_275 = _T_274 & scnd_miss_req; // @[el2_ifu_mem_ctl.scala 294:127] + wire _T_274 = imb_ff[11:5] == imb_scnd_ff[11:5]; // @[el2_ifu_mem_ctl.scala 294:79] + wire _T_275 = _T_274 & scnd_miss_req; // @[el2_ifu_mem_ctl.scala 294:135] reg [1:0] ifu_bus_rresp_ff; // @[Reg.scala 27:20] wire _T_2662 = |ifu_bus_rresp_ff; // @[el2_ifu_mem_ctl.scala 622:48] wire _T_2663 = _T_2662 & ifu_bus_rvalid_ff; // @[el2_ifu_mem_ctl.scala 622:52] wire bus_ifu_wr_data_error_ff = _T_2663 & miss_pending; // @[el2_ifu_mem_ctl.scala 622:73] reg ifu_wr_data_comb_err_ff; // @[el2_ifu_mem_ctl.scala 367:61] wire ifu_wr_cumulative_err_data = bus_ifu_wr_data_error_ff | ifu_wr_data_comb_err_ff; // @[el2_ifu_mem_ctl.scala 366:55] - wire _T_276 = ~ifu_wr_cumulative_err_data; // @[el2_ifu_mem_ctl.scala 294:145] - wire scnd_miss_index_match = _T_275 & _T_276; // @[el2_ifu_mem_ctl.scala 294:143] + wire _T_276 = ~ifu_wr_cumulative_err_data; // @[el2_ifu_mem_ctl.scala 294:153] + wire scnd_miss_index_match = _T_275 & _T_276; // @[el2_ifu_mem_ctl.scala 294:151] wire _T_277 = ~scnd_miss_index_match; // @[el2_ifu_mem_ctl.scala 297:47] wire _T_278 = scnd_miss_req & _T_277; // @[el2_ifu_mem_ctl.scala 297:45] wire _T_280 = scnd_miss_req & scnd_miss_index_match; // @[el2_ifu_mem_ctl.scala 298:26] diff --git a/src/main/scala/ifu/el2_ifu_mem_ctl.scala b/src/main/scala/ifu/el2_ifu_mem_ctl.scala index 4a98f29b..b0781317 100644 --- a/src/main/scala/ifu/el2_ifu_mem_ctl.scala +++ b/src/main/scala/ifu/el2_ifu_mem_ctl.scala @@ -291,7 +291,7 @@ class el2_ifu_mem_ctl extends Module with el2_lib { val uncacheable_miss_in = Mux(scnd_miss_req.asBool, uncacheable_miss_scnd_ff, Mux(sel_hold_imb.asBool, uncacheable_miss_ff, io.ifc_fetch_uncacheable_bf)) val imb_in = Mux(scnd_miss_req.asBool, imb_scnd_ff, Mux(sel_hold_imb.asBool, imb_ff, io.ifc_fetch_addr_bf)) val ifu_wr_cumulative_err_data = WireInit(Bool(), 0.U) - val scnd_miss_index_match = (imb_ff(ICACHE_INDEX_HI,ICACHE_TAG_INDEX_LO)===imb_scnd_ff(ICACHE_INDEX_HI,ICACHE_TAG_INDEX_LO))& scnd_miss_req & !ifu_wr_cumulative_err_data + val scnd_miss_index_match = (imb_ff(ICACHE_INDEX_HI-1,ICACHE_TAG_INDEX_LO-1)===imb_scnd_ff(ICACHE_INDEX_HI-1,ICACHE_TAG_INDEX_LO-1))& scnd_miss_req & !ifu_wr_cumulative_err_data val way_status_mb_ff = WireInit(UInt(ICACHE_STATUS_BITS.W), 0.U) val way_status_rep_new = WireInit(UInt(ICACHE_STATUS_BITS.W), 0.U) val way_status_mb_in = Mux((scnd_miss_req & !scnd_miss_index_match).asBool, way_status_mb_scnd_ff, diff --git a/target/scala-2.12/classes/ifu/el2_ifu_mem_ctl.class b/target/scala-2.12/classes/ifu/el2_ifu_mem_ctl.class index 4ffd74864acf169f2438a536853057bcd13ebed4..0f08d3056d378637026ab0581dc680221c634a24 100644 GIT binary patch delta 2235 zcmY+*Ygi5V76$O%_n(HrF_|+BjKtmBxABuQe2!(D`b)T)T|p+IrkY%yw2otyx_*3BkLB{* z@j{{eb({#(l1;-@{V+_^FNW?c3rwGtg&76{(+v!uYY+fE0|jOpyo3JiJj^nTfWBcC z3=CT^+vp1z8eN8w(EyB%XT!ue9;U{nFf)FSIVOfMH;IFV$pg$ajfREkNk~ke!P0Cd ztjspT+AJS7b82Bb=QZqP=4)YZu7HDiKO8M)z{z3-oGlXJA{h!-i9hB^4q?9J3fwG{ z;clgi1y);BCcwk06br47W08$7JZ-jNu}uk<*t~|9tvRys{Wpp!3xoYD~N)PxY{XoNafA;d)uYh6qb z<`RZ=E;$Hy$w!2%2_jv$W4&uRHn_e()VvAUINuD>Zt>XUmV{WhI>fo}#%A|!mA!~x zZ~$8t+*jF+tsZ9B=HZ6~j|50P${_P-lOb`T1W5~{ki2Ldwl50AjzwA6={W*BJSEuf znS@=7d$D_oJN7Qwk9|whk+P&6sb0gd-^&OGymsRUuUw>gJ;q`0FLA_Mf^_dF9Q7`P z+`AJQKErU_#}QdR<;eDVf;^voGEC4ss)7q|%L1LL6x zEJSHw2g(C`Q4#nIy3smQ(O)UK;t?GG^~rnmGBX047bG92u)mzw8ZuG)6ukn_-#WGZf)p9 zbJR54jtW6bRJO_rv~Apv_Kj`mh#rd0=qc!m_QUaG|9!JOatFjl=jvLEKan}4k&X<$pQaB~u%m49?zGO~Zt5X_Rn`#tAoRlJK6UQWu&@qc}%;j26<t zt#nHoLiZ%q!-8ZjdL+;1!tEMdv^|raJEm~)j!-VyIi6lS7t(uIFnx9%rSGoK^xJLD zWxESiw$XQw2L1PBaK+xGT)Fo-1NKees+7SDOj*yMl;;diUCN-;Wn8^~EJOCUF!aDg zt~n6NwLdg4?4T#t9SmobN1Ti&2Mlx$$ruqYuj&b0mVX=@pDi z@8IU6Lm7XxmRsbvxb?>%Zu_y02^nsbW~5SfOrMFFT9jojV^U@jlQZvdd*%Rl9Jl1o zFd2eKphLv|()X4mpi_A934jNsuMOCHGy zV0z9e9z9`4dG0bE%{{>%bMG=E&y>gVY9)q$d~7eQh2_ohKiyF zDt=00Y4K2&6{oAb#0zI#S#~y>AstZZ1zEH;6^2@wb5y4+7@>RC8uA-Oq6|&c=<_|U~b=asp$ScZB z{;JGZS;T9~SG@l7G&cQwkJl>)^G4;@yjeLx^1)HQ&{4R2jqfwMzb{_7Xo_YURf|Gk&Ox=cjrl|9iQf zpBmKpxzUaTjsN23E2jMGs=2_`ZozBuLR{Ap>ep)ouHO|JOrZz~cyponNAr6z;`SJ!dAmuBY;hJ}w?v9>TGEA9OSSm6^(!&D)lq!c>L$jt zhKLERsbXSlsnBk{CnmKHi0|)A7L)JH6I1R)i>Y^YgznunVtU&sq1WavX0{~@{WhhT z)%Hplv}+5a_Ibj%Jx3-?+OG=J_CJK#y>2n5qd}N;+!yAZ>x4yTzL?uJQb@YC2+OWw zVb#?moVt32_5B=S^B_-HKe#DuA2th{ho6L9_kgf{q$})u^n_iHk8tSq6ZXA3h2!Hr z!r^h5aO$fNj(t7C`AMH}>K`dw`kRI8Q*ANt>7d2J{b{URMb9RXZrZRL&_%qX52Yg|~cY zs;E+SOcmi1q-mI=7l^rf#h9mW2yOjre53y-v<>E9o`D~93`(GD@H6xbk3!!l1bRl< zFfh6SL!-Z7WZVd2<2NudnF~{sNSK+F!rbIFEKKLY(li2AruQ)4EF4y5$6#&t1Pjb( z!p1xd3(XaL#n4g(mb=V(@Py`UdBlE zO2Dq=ec0{oh&|qE*z3I?`@HX9zmLEHA8n-j$Z*i-2(o-0;*c+p?Q4v~zM;tRErZ;* z6G#07j{8|7&#xQ`zegzY8$kZI!zl2-hJ62DP#7R}q9EWMidKw7;R-_(ujoS2N;RBX zX^N7SW;ngd6(y^`#p%_lC|whZk~KLfTXP*}0)g_t08|8?M`h4-oDFipxu8f?1r?w= zr~|b@eW(k1qVjhrgFiz6K7T~UWsR-k7~8hW?fMqf1XFnS95qdoB`Iv4}dRd^gdj3+UpF&MKK(ojq@p2xhy zi&z8v7`qn3v5EL8b`Sm)n}c6ti}BysbNDm1MYXr$L+o!voG}>}N)eaIkK#(G9#_kc z<61c`?k*?A4XCyuejPuaGvdvt74N~B@hO}Yf1I-uzTljMC7heEgYyzDQ#;`gezUD# zqRw_(>TZvvUg9e1CuYzv@jQ)^KBaL|CQXvA&@|~a&14H{E(@iFER$BU0>- z7s!;fk@aw)>jeP(3V5(WHBdJv~z1(=#=TUTIUfJZ%-dcYaQvozC>#^&S0o9iacN-x#plfZy#d zP_3xhZpi5m~9+oK?@rtS&|!n$9hUA{c!row3;=j5}Px_`@Ac z$RW4p)N-5rDz_gAVB(Q_CLML4>}V>bW3!l?t4S%>i#u`)nUZ^xskv{McHD$Jk9Trc z-WcxAv*-7D72K0|jeGOnaGzo#r2`5#rYk~tP?5z9MJ+QG&zP03&O`Yo%+B}Y;rv|Y z6j)MT=*65uIgb?H;?W{q9xJlo@uDc^6&5(tg9?xZDkjgXVY1Cww~2zhgfy)AFMz3mdYwER#nYs zLsb$Rs~)haCV|a0Wo)T!wZyrP`SHsx+!Rc7&;QlYYt zH+h=kz*`L;^LE1om6Le4!GWC(a&|S;@Lr<^?>EM>r|}ilOq4+G41>75q<2n97a(y`_?WwAAtK#diLANsn(YMe<#1CI5H1f$uKApg-uB86zz6eHSe1ln&2^_yG7$XlNXja#Kc8g<)4sNdcoKDqN+ zXm%8cPdi?V(VgSO*v?iluFFP@?^-K9@7gaWbe$JpbdMC1x~;{R-40@M_ewFXJ5@~Y zE)`#Q-xV{u-w3UHlf}$?c4F4Oa53lpR59=VYN6dTTIlpR3f-QqLa(P%==VGm2E7x7 zaj%^)>CKUZY41g0*87t%f6yZ=`kI7!U$?M)7$mG7D#ZN$QNp@EN-XFv7B>A4gj0W? zSokPM*bW>O3kR+UyT{jr?c-mC{gXGsZg9GA7}65%u}p+tmo*jh}U{Wo_9KXm{A