diff --git a/el2_lsu.anno.json b/el2_lsu.anno.json new file mode 100644 index 00000000..671f8f28 --- /dev/null +++ b/el2_lsu.anno.json @@ -0,0 +1,494 @@ +[ + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_dccm_dma_rdata", + "sources":[ + "~el2_lsu|el2_lsu>io_picm_rd_data", + "~el2_lsu|el2_lsu>io_dec_tlu_core_ecc_disable", + "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", + "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", + "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_lsu_single_ecc_error_incr", + "sources":[ + "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r", + "~el2_lsu|el2_lsu>io_dec_tlu_core_ecc_disable", + "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", + "~el2_lsu|el2_lsu>io_dccm_rd_data_lo" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_picm_rdaddr", + "sources":[ + "~el2_lsu|el2_lsu>io_exu_lsu_rs1_d", + "~el2_lsu|el2_lsu>io_dma_mem_addr", + "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d", + "~el2_lsu|el2_lsu>io_dec_lsu_offset_d", + "~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d", + "~el2_lsu|el2_lsu>io_picm_rd_data", + "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", + "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", + "~el2_lsu|el2_lsu>io_dec_tlu_flush_lower_r", + "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_lsu_trigger_match_m", + "sources":[ + "~el2_lsu|el2_lsu>io_trigger_pkt_any_0_store", + "~el2_lsu|el2_lsu>io_trigger_pkt_any_1_store", + "~el2_lsu|el2_lsu>io_trigger_pkt_any_0_load", + "~el2_lsu|el2_lsu>io_trigger_pkt_any_0_select", + "~el2_lsu|el2_lsu>io_trigger_pkt_any_3_store", + "~el2_lsu|el2_lsu>io_trigger_pkt_any_2_store", + "~el2_lsu|el2_lsu>io_trigger_pkt_any_1_load", + "~el2_lsu|el2_lsu>io_trigger_pkt_any_1_select", + "~el2_lsu|el2_lsu>io_trigger_pkt_any_3_load", + "~el2_lsu|el2_lsu>io_trigger_pkt_any_3_select", + "~el2_lsu|el2_lsu>io_trigger_pkt_any_2_load", + "~el2_lsu|el2_lsu>io_trigger_pkt_any_2_select", + "~el2_lsu|el2_lsu>io_trigger_pkt_any_0_tdata2", + "~el2_lsu|el2_lsu>io_trigger_pkt_any_0_match_", + "~el2_lsu|el2_lsu>io_trigger_pkt_any_1_tdata2", + "~el2_lsu|el2_lsu>io_trigger_pkt_any_1_match_", + "~el2_lsu|el2_lsu>io_trigger_pkt_any_3_tdata2", + "~el2_lsu|el2_lsu>io_trigger_pkt_any_3_match_", + "~el2_lsu|el2_lsu>io_trigger_pkt_any_2_tdata2", + "~el2_lsu|el2_lsu>io_trigger_pkt_any_2_match_", + "~el2_lsu|el2_lsu>io_picm_rd_data", + "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", + "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", + "~el2_lsu|el2_lsu>io_dec_tlu_flush_lower_r", + "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_dccm_wren", + "sources":[ + "~el2_lsu|el2_lsu>io_dma_dccm_req", + "~el2_lsu|el2_lsu>io_dma_mem_write", + "~el2_lsu|el2_lsu>io_exu_lsu_rs1_d", + "~el2_lsu|el2_lsu>io_dma_mem_addr", + "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d", + "~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d", + "~el2_lsu|el2_lsu>io_dec_lsu_offset_d", + "~el2_lsu|el2_lsu>io_lsu_p_dword", + "~el2_lsu|el2_lsu>io_lsu_p_half", + "~el2_lsu|el2_lsu>io_lsu_p_word", + "~el2_lsu|el2_lsu>io_dma_mem_sz", + "~el2_lsu|el2_lsu>io_lsu_p_valid", + "~el2_lsu|el2_lsu>io_dec_tlu_flush_lower_r", + "~el2_lsu|el2_lsu>io_lsu_p_fast_int", + "~el2_lsu|el2_lsu>io_lsu_p_load", + "~el2_lsu|el2_lsu>io_lsu_p_store", + "~el2_lsu|el2_lsu>io_picm_rd_data", + "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", + "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", + "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_lsu_load_stall_any", + "sources":[ + "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d", + "~el2_lsu|el2_lsu>io_exu_lsu_rs1_d", + "~el2_lsu|el2_lsu>io_dma_mem_addr", + "~el2_lsu|el2_lsu>io_dec_lsu_offset_d", + "~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d", + "~el2_lsu|el2_lsu>io_lsu_p_dword", + "~el2_lsu|el2_lsu>io_lsu_p_half", + "~el2_lsu|el2_lsu>io_lsu_p_word", + "~el2_lsu|el2_lsu>io_dma_mem_sz", + "~el2_lsu|el2_lsu>io_dec_tlu_flush_lower_r", + "~el2_lsu|el2_lsu>io_picm_rd_data", + "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", + "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", + "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_dccm_wr_data_hi", + "sources":[ + "~el2_lsu|el2_lsu>io_dma_dccm_req", + "~el2_lsu|el2_lsu>io_dma_mem_write", + "~el2_lsu|el2_lsu>io_exu_lsu_rs1_d", + "~el2_lsu|el2_lsu>io_dma_mem_addr", + "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d", + "~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d", + "~el2_lsu|el2_lsu>io_dec_lsu_offset_d", + "~el2_lsu|el2_lsu>io_lsu_p_dword", + "~el2_lsu|el2_lsu>io_lsu_p_half", + "~el2_lsu|el2_lsu>io_lsu_p_word", + "~el2_lsu|el2_lsu>io_dma_mem_sz", + "~el2_lsu|el2_lsu>io_dma_mem_wdata", + "~el2_lsu|el2_lsu>io_picm_rd_data", + "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", + "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", + "~el2_lsu|el2_lsu>io_dec_tlu_flush_lower_r", + "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_dccm_rden", + "sources":[ + "~el2_lsu|el2_lsu>io_exu_lsu_rs1_d", + "~el2_lsu|el2_lsu>io_dma_mem_addr", + "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d", + "~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d", + "~el2_lsu|el2_lsu>io_dec_lsu_offset_d", + "~el2_lsu|el2_lsu>io_lsu_p_dword", + "~el2_lsu|el2_lsu>io_lsu_p_half", + "~el2_lsu|el2_lsu>io_lsu_p_word", + "~el2_lsu|el2_lsu>io_dma_mem_sz", + "~el2_lsu|el2_lsu>io_dma_dccm_req", + "~el2_lsu|el2_lsu>io_lsu_p_valid", + "~el2_lsu|el2_lsu>io_dec_tlu_flush_lower_r", + "~el2_lsu|el2_lsu>io_lsu_p_fast_int", + "~el2_lsu|el2_lsu>io_lsu_p_load", + "~el2_lsu|el2_lsu>io_dma_mem_write", + "~el2_lsu|el2_lsu>io_lsu_p_store", + "~el2_lsu|el2_lsu>io_picm_rd_data", + "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", + "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", + "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_picm_rden", + "sources":[ + "~el2_lsu|el2_lsu>io_exu_lsu_rs1_d", + "~el2_lsu|el2_lsu>io_dma_mem_addr", + "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d", + "~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d", + "~el2_lsu|el2_lsu>io_dec_lsu_offset_d", + "~el2_lsu|el2_lsu>io_lsu_p_dword", + "~el2_lsu|el2_lsu>io_lsu_p_half", + "~el2_lsu|el2_lsu>io_lsu_p_word", + "~el2_lsu|el2_lsu>io_dma_mem_sz", + "~el2_lsu|el2_lsu>io_dma_dccm_req", + "~el2_lsu|el2_lsu>io_lsu_p_valid", + "~el2_lsu|el2_lsu>io_dec_tlu_flush_lower_r", + "~el2_lsu|el2_lsu>io_lsu_p_fast_int", + "~el2_lsu|el2_lsu>io_lsu_p_load", + "~el2_lsu|el2_lsu>io_dma_mem_write", + "~el2_lsu|el2_lsu>io_picm_rd_data", + "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", + "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", + "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_picm_wren", + "sources":[ + "~el2_lsu|el2_lsu>io_dma_dccm_req", + "~el2_lsu|el2_lsu>io_dma_mem_write", + "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r", + "~el2_lsu|el2_lsu>io_exu_lsu_rs1_d", + "~el2_lsu|el2_lsu>io_dma_mem_addr", + "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d", + "~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d", + "~el2_lsu|el2_lsu>io_dec_lsu_offset_d", + "~el2_lsu|el2_lsu>io_lsu_p_dword", + "~el2_lsu|el2_lsu>io_lsu_p_half", + "~el2_lsu|el2_lsu>io_lsu_p_word", + "~el2_lsu|el2_lsu>io_dma_mem_sz", + "~el2_lsu|el2_lsu>io_picm_rd_data", + "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", + "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", + "~el2_lsu|el2_lsu>io_dec_tlu_flush_lower_r" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_dccm_rd_addr_hi", + "sources":[ + "~el2_lsu|el2_lsu>io_exu_lsu_rs1_d", + "~el2_lsu|el2_lsu>io_dma_mem_addr", + "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d", + "~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d", + "~el2_lsu|el2_lsu>io_dec_lsu_offset_d", + "~el2_lsu|el2_lsu>io_lsu_p_dword", + "~el2_lsu|el2_lsu>io_lsu_p_half", + "~el2_lsu|el2_lsu>io_lsu_p_word", + "~el2_lsu|el2_lsu>io_dma_mem_sz", + "~el2_lsu|el2_lsu>io_picm_rd_data", + "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", + "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", + "~el2_lsu|el2_lsu>io_dec_tlu_flush_lower_r", + "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_dccm_ready", + "sources":[ + "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_picm_wraddr", + "sources":[ + "~el2_lsu|el2_lsu>io_dma_mem_addr", + "~el2_lsu|el2_lsu>io_dma_dccm_req", + "~el2_lsu|el2_lsu>io_dma_mem_write", + "~el2_lsu|el2_lsu>io_exu_lsu_rs1_d", + "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d", + "~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d", + "~el2_lsu|el2_lsu>io_dec_lsu_offset_d", + "~el2_lsu|el2_lsu>io_lsu_p_dword", + "~el2_lsu|el2_lsu>io_lsu_p_half", + "~el2_lsu|el2_lsu>io_lsu_p_word", + "~el2_lsu|el2_lsu>io_dma_mem_sz", + "~el2_lsu|el2_lsu>io_picm_rd_data", + "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", + "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", + "~el2_lsu|el2_lsu>io_dec_tlu_flush_lower_r", + "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_lsu_store_stall_any", + "sources":[ + "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d", + "~el2_lsu|el2_lsu>io_exu_lsu_rs1_d", + "~el2_lsu|el2_lsu>io_dma_mem_addr", + "~el2_lsu|el2_lsu>io_dec_lsu_offset_d", + "~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d", + "~el2_lsu|el2_lsu>io_lsu_p_dword", + "~el2_lsu|el2_lsu>io_lsu_p_half", + "~el2_lsu|el2_lsu>io_lsu_p_word", + "~el2_lsu|el2_lsu>io_dma_mem_sz", + "~el2_lsu|el2_lsu>io_picm_rd_data", + "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", + "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", + "~el2_lsu|el2_lsu>io_dec_tlu_flush_lower_r", + "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_lsu_pmu_bus_trxn", + "sources":[ + "~el2_lsu|el2_lsu>io_lsu_axi_arready", + "~el2_lsu|el2_lsu>io_lsu_axi_awready", + "~el2_lsu|el2_lsu>io_lsu_axi_wready" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_dccm_dma_ecc_error", + "sources":[ + "~el2_lsu|el2_lsu>io_dec_tlu_core_ecc_disable", + "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", + "~el2_lsu|el2_lsu>io_dccm_rd_data_lo" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_lsu_fastint_stall_any", + "sources":[ + "~el2_lsu|el2_lsu>io_dec_tlu_core_ecc_disable", + "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", + "~el2_lsu|el2_lsu>io_dccm_rd_data_lo" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_lsu_pmu_bus_busy", + "sources":[ + "~el2_lsu|el2_lsu>io_lsu_axi_arready", + "~el2_lsu|el2_lsu>io_lsu_axi_awready", + "~el2_lsu|el2_lsu>io_lsu_axi_wready" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_dccm_rd_addr_lo", + "sources":[ + "~el2_lsu|el2_lsu>io_exu_lsu_rs1_d", + "~el2_lsu|el2_lsu>io_dma_mem_addr", + "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d", + "~el2_lsu|el2_lsu>io_dec_lsu_offset_d", + "~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d", + "~el2_lsu|el2_lsu>io_picm_rd_data", + "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", + "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", + "~el2_lsu|el2_lsu>io_dec_tlu_flush_lower_r", + "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_picm_wr_data", + "sources":[ + "~el2_lsu|el2_lsu>io_dma_mem_wdata", + "~el2_lsu|el2_lsu>io_dma_dccm_req", + "~el2_lsu|el2_lsu>io_dma_mem_write", + "~el2_lsu|el2_lsu>io_exu_lsu_rs1_d", + "~el2_lsu|el2_lsu>io_dma_mem_addr", + "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d", + "~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d", + "~el2_lsu|el2_lsu>io_dec_lsu_offset_d", + "~el2_lsu|el2_lsu>io_lsu_p_dword", + "~el2_lsu|el2_lsu>io_lsu_p_half", + "~el2_lsu|el2_lsu>io_lsu_p_word", + "~el2_lsu|el2_lsu>io_dma_mem_sz", + "~el2_lsu|el2_lsu>io_lsu_p_valid", + "~el2_lsu|el2_lsu>io_dec_tlu_flush_lower_r", + "~el2_lsu|el2_lsu>io_lsu_p_fast_int", + "~el2_lsu|el2_lsu>io_lsu_p_load", + "~el2_lsu|el2_lsu>io_lsu_p_store", + "~el2_lsu|el2_lsu>io_picm_rd_data", + "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", + "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", + "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_dccm_wr_addr_lo", + "sources":[ + "~el2_lsu|el2_lsu>io_dma_dccm_req", + "~el2_lsu|el2_lsu>io_dma_mem_write", + "~el2_lsu|el2_lsu>io_exu_lsu_rs1_d", + "~el2_lsu|el2_lsu>io_dma_mem_addr", + "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d", + "~el2_lsu|el2_lsu>io_dec_lsu_offset_d", + "~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d", + "~el2_lsu|el2_lsu>io_lsu_p_dword", + "~el2_lsu|el2_lsu>io_lsu_p_half", + "~el2_lsu|el2_lsu>io_lsu_p_word", + "~el2_lsu|el2_lsu>io_dma_mem_sz", + "~el2_lsu|el2_lsu>io_picm_rd_data", + "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", + "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", + "~el2_lsu|el2_lsu>io_dec_tlu_flush_lower_r", + "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_picm_mken", + "sources":[ + "~el2_lsu|el2_lsu>io_exu_lsu_rs1_d", + "~el2_lsu|el2_lsu>io_dma_mem_addr", + "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d", + "~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d", + "~el2_lsu|el2_lsu>io_dec_lsu_offset_d", + "~el2_lsu|el2_lsu>io_lsu_p_dword", + "~el2_lsu|el2_lsu>io_lsu_p_half", + "~el2_lsu|el2_lsu>io_lsu_p_word", + "~el2_lsu|el2_lsu>io_dma_mem_sz", + "~el2_lsu|el2_lsu>io_dma_dccm_req", + "~el2_lsu|el2_lsu>io_lsu_p_valid", + "~el2_lsu|el2_lsu>io_dec_tlu_flush_lower_r", + "~el2_lsu|el2_lsu>io_lsu_p_fast_int", + "~el2_lsu|el2_lsu>io_lsu_p_store", + "~el2_lsu|el2_lsu>io_dma_mem_write", + "~el2_lsu|el2_lsu>io_picm_rd_data", + "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", + "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", + "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_lsu_nonblock_load_valid_m", + "sources":[ + "~el2_lsu|el2_lsu>io_dec_tlu_flush_lower_r" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_dccm_wr_data_lo", + "sources":[ + "~el2_lsu|el2_lsu>io_dma_dccm_req", + "~el2_lsu|el2_lsu>io_dma_mem_write", + "~el2_lsu|el2_lsu>io_exu_lsu_rs1_d", + "~el2_lsu|el2_lsu>io_dma_mem_addr", + "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d", + "~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d", + "~el2_lsu|el2_lsu>io_dec_lsu_offset_d", + "~el2_lsu|el2_lsu>io_lsu_p_dword", + "~el2_lsu|el2_lsu>io_lsu_p_half", + "~el2_lsu|el2_lsu>io_lsu_p_word", + "~el2_lsu|el2_lsu>io_dma_mem_sz", + "~el2_lsu|el2_lsu>io_dma_mem_wdata", + "~el2_lsu|el2_lsu>io_picm_rd_data", + "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", + "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", + "~el2_lsu|el2_lsu>io_dec_tlu_flush_lower_r", + "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_lsu_pmu_bus_misaligned", + "sources":[ + "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_lsu_nonblock_load_inv_r", + "sources":[ + "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_dccm_wr_addr_hi", + "sources":[ + "~el2_lsu|el2_lsu>io_dma_dccm_req", + "~el2_lsu|el2_lsu>io_dma_mem_write", + "~el2_lsu|el2_lsu>io_exu_lsu_rs1_d", + "~el2_lsu|el2_lsu>io_dma_mem_addr", + "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d", + "~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d", + "~el2_lsu|el2_lsu>io_dec_lsu_offset_d", + "~el2_lsu|el2_lsu>io_lsu_p_dword", + "~el2_lsu|el2_lsu>io_lsu_p_half", + "~el2_lsu|el2_lsu>io_lsu_p_word", + "~el2_lsu|el2_lsu>io_dma_mem_sz", + "~el2_lsu|el2_lsu>io_picm_rd_data", + "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", + "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", + "~el2_lsu|el2_lsu>io_dec_tlu_flush_lower_r", + "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" + ] + }, + { + "class":"firrtl.EmitCircuitAnnotation", + "emitter":"firrtl.VerilogEmitter" + }, + { + "class":"firrtl.transforms.BlackBoxResourceAnno", + "target":"el2_lsu.TEC_RV_ICG", + "resourceId":"/vsrc/TEC_RV_ICG.v" + }, + { + "class":"firrtl.options.TargetDirAnnotation", + "directory":"." + }, + { + "class":"firrtl.options.OutputAnnotationFileAnnotation", + "file":"el2_lsu" + }, + { + "class":"firrtl.transforms.BlackBoxTargetDirAnno", + "targetDir":"." + } +] \ No newline at end of file diff --git a/el2_lsu.fir b/el2_lsu.fir new file mode 100644 index 00000000..cf3fa184 --- /dev/null +++ b/el2_lsu.fir @@ -0,0 +1,15840 @@ +;buildInfoPackage: chisel3, version: 3.3.1, scalaVersion: 2.12.11, sbtVersion: 1.3.10 +circuit el2_lsu : + module el2_lsu_addrcheck : + input clock : Clock + input reset : AsyncReset + output io : {flip lsu_c2_m_clk : Clock, flip start_addr_d : UInt<32>, flip end_addr_d : UInt<32>, flip lsu_pkt_d : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip dec_tlu_mrac_ff : UInt<32>, flip rs1_region_d : UInt<4>, flip rs1_d : UInt<32>, is_sideeffects_m : UInt<1>, addr_in_dccm_d : UInt<1>, addr_in_pic_d : UInt<1>, addr_external_d : UInt<1>, access_fault_d : UInt<1>, misaligned_fault_d : UInt<1>, exc_mscause_d : UInt<4>, fir_dccm_access_error_d : UInt<1>, fir_nondccm_access_error_d : UInt<1>, flip scan_mode : UInt<1>} + + node _T = bits(io.start_addr_d, 31, 28) @[el2_lib.scala 494:27] + node start_addr_in_dccm_region_d = eq(_T, UInt<4>("h0f")) @[el2_lib.scala 494:49] + wire start_addr_in_dccm_d : UInt<1> @[el2_lib.scala 495:26] + node _T_1 = bits(io.start_addr_d, 31, 16) @[el2_lib.scala 499:24] + node _T_2 = eq(_T_1, UInt<16>("h0f004")) @[el2_lib.scala 499:39] + start_addr_in_dccm_d <= _T_2 @[el2_lib.scala 499:16] + node _T_3 = bits(io.end_addr_d, 31, 28) @[el2_lib.scala 494:27] + node end_addr_in_dccm_region_d = eq(_T_3, UInt<4>("h0f")) @[el2_lib.scala 494:49] + wire end_addr_in_dccm_d : UInt<1> @[el2_lib.scala 495:26] + node _T_4 = bits(io.end_addr_d, 31, 16) @[el2_lib.scala 499:24] + node _T_5 = eq(_T_4, UInt<16>("h0f004")) @[el2_lib.scala 499:39] + end_addr_in_dccm_d <= _T_5 @[el2_lib.scala 499:16] + wire addr_in_iccm : UInt<1> + addr_in_iccm <= UInt<1>("h00") + node _T_6 = bits(io.start_addr_d, 31, 28) @[el2_lsu_addrcheck.scala 42:37] + node _T_7 = eq(_T_6, UInt<4>("h0e")) @[el2_lsu_addrcheck.scala 42:45] + addr_in_iccm <= _T_7 @[el2_lsu_addrcheck.scala 42:18] + node _T_8 = bits(io.start_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 50:89] + node _T_9 = bits(_T_8, 31, 28) @[el2_lib.scala 494:27] + node start_addr_in_pic_region_d = eq(_T_9, UInt<4>("h0f")) @[el2_lib.scala 494:49] + wire start_addr_in_pic_d : UInt<1> @[el2_lib.scala 495:26] + node _T_10 = bits(_T_8, 31, 15) @[el2_lib.scala 499:24] + node _T_11 = eq(_T_10, UInt<17>("h01e018")) @[el2_lib.scala 499:39] + start_addr_in_pic_d <= _T_11 @[el2_lib.scala 499:16] + node _T_12 = bits(io.end_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 52:83] + node _T_13 = bits(_T_12, 31, 28) @[el2_lib.scala 494:27] + node end_addr_in_pic_region_d = eq(_T_13, UInt<4>("h0f")) @[el2_lib.scala 494:49] + wire end_addr_in_pic_d : UInt<1> @[el2_lib.scala 495:26] + node _T_14 = bits(_T_12, 31, 15) @[el2_lib.scala 499:24] + node _T_15 = eq(_T_14, UInt<17>("h01e018")) @[el2_lib.scala 499:39] + end_addr_in_pic_d <= _T_15 @[el2_lib.scala 499:16] + node start_addr_dccm_or_pic = or(start_addr_in_dccm_region_d, start_addr_in_pic_region_d) @[el2_lsu_addrcheck.scala 54:60] + node _T_16 = bits(io.rs1_region_d, 3, 0) @[el2_lsu_addrcheck.scala 55:48] + node _T_17 = eq(_T_16, UInt<4>("h0f")) @[el2_lsu_addrcheck.scala 55:54] + node _T_18 = bits(io.rs1_region_d, 3, 0) @[el2_lsu_addrcheck.scala 55:91] + node _T_19 = eq(_T_18, UInt<4>("h0f")) @[el2_lsu_addrcheck.scala 55:97] + node base_reg_dccm_or_pic = or(_T_17, _T_19) @[el2_lsu_addrcheck.scala 55:73] + node _T_20 = and(start_addr_in_dccm_d, end_addr_in_dccm_d) @[el2_lsu_addrcheck.scala 56:57] + io.addr_in_dccm_d <= _T_20 @[el2_lsu_addrcheck.scala 56:32] + node _T_21 = and(start_addr_in_pic_d, end_addr_in_pic_d) @[el2_lsu_addrcheck.scala 57:56] + io.addr_in_pic_d <= _T_21 @[el2_lsu_addrcheck.scala 57:32] + node _T_22 = or(start_addr_in_dccm_region_d, start_addr_in_pic_region_d) @[el2_lsu_addrcheck.scala 59:63] + node _T_23 = not(_T_22) @[el2_lsu_addrcheck.scala 59:33] + io.addr_external_d <= _T_23 @[el2_lsu_addrcheck.scala 59:30] + node _T_24 = bits(io.start_addr_d, 31, 28) @[el2_lsu_addrcheck.scala 60:51] + node csr_idx = cat(_T_24, UInt<1>("h01")) @[Cat.scala 29:58] + node _T_25 = dshr(io.dec_tlu_mrac_ff, csr_idx) @[el2_lsu_addrcheck.scala 61:50] + node _T_26 = bits(_T_25, 0, 0) @[el2_lsu_addrcheck.scala 61:50] + node _T_27 = or(start_addr_in_dccm_region_d, start_addr_in_pic_region_d) @[el2_lsu_addrcheck.scala 61:92] + node _T_28 = or(_T_27, addr_in_iccm) @[el2_lsu_addrcheck.scala 61:121] + node _T_29 = eq(_T_28, UInt<1>("h00")) @[el2_lsu_addrcheck.scala 61:62] + node _T_30 = and(_T_26, _T_29) @[el2_lsu_addrcheck.scala 61:60] + node _T_31 = and(_T_30, io.lsu_pkt_d.valid) @[el2_lsu_addrcheck.scala 61:137] + node _T_32 = or(io.lsu_pkt_d.store, io.lsu_pkt_d.load) @[el2_lsu_addrcheck.scala 61:180] + node is_sideeffects_d = and(_T_31, _T_32) @[el2_lsu_addrcheck.scala 61:158] + node _T_33 = bits(io.start_addr_d, 1, 0) @[el2_lsu_addrcheck.scala 62:69] + node _T_34 = eq(_T_33, UInt<1>("h00")) @[el2_lsu_addrcheck.scala 62:75] + node _T_35 = and(io.lsu_pkt_d.word, _T_34) @[el2_lsu_addrcheck.scala 62:51] + node _T_36 = bits(io.start_addr_d, 0, 0) @[el2_lsu_addrcheck.scala 62:124] + node _T_37 = eq(_T_36, UInt<1>("h00")) @[el2_lsu_addrcheck.scala 62:128] + node _T_38 = and(io.lsu_pkt_d.half, _T_37) @[el2_lsu_addrcheck.scala 62:106] + node _T_39 = or(_T_35, _T_38) @[el2_lsu_addrcheck.scala 62:85] + node is_aligned_d = or(_T_39, io.lsu_pkt_d.by) @[el2_lsu_addrcheck.scala 62:138] + node _T_40 = cat(UInt<1>("h00"), UInt<1>("h00")) @[Cat.scala 29:58] + node _T_41 = cat(UInt<1>("h00"), UInt<1>("h00")) @[Cat.scala 29:58] + node _T_42 = cat(_T_41, _T_40) @[Cat.scala 29:58] + node _T_43 = cat(UInt<1>("h01"), UInt<1>("h01")) @[Cat.scala 29:58] + node _T_44 = cat(UInt<1>("h01"), UInt<1>("h01")) @[Cat.scala 29:58] + node _T_45 = cat(_T_44, _T_43) @[Cat.scala 29:58] + node _T_46 = cat(_T_45, _T_42) @[Cat.scala 29:58] + node _T_47 = orr(_T_46) @[el2_lsu_addrcheck.scala 66:95] + node _T_48 = eq(_T_47, UInt<1>("h00")) @[el2_lsu_addrcheck.scala 65:33] + node _T_49 = bits(io.start_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 67:49] + node _T_50 = or(_T_49, UInt<31>("h07fffffff")) @[el2_lsu_addrcheck.scala 67:56] + node _T_51 = or(UInt<1>("h00"), UInt<31>("h07fffffff")) @[el2_lsu_addrcheck.scala 67:105] + node _T_52 = eq(_T_50, _T_51) @[el2_lsu_addrcheck.scala 67:80] + node _T_53 = and(UInt<1>("h01"), _T_52) @[el2_lsu_addrcheck.scala 67:30] + node _T_54 = bits(io.start_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 68:49] + node _T_55 = or(_T_54, UInt<30>("h03fffffff")) @[el2_lsu_addrcheck.scala 68:56] + node _T_56 = or(UInt<32>("h0c0000000"), UInt<30>("h03fffffff")) @[el2_lsu_addrcheck.scala 68:105] + node _T_57 = eq(_T_55, _T_56) @[el2_lsu_addrcheck.scala 68:80] + node _T_58 = and(UInt<1>("h01"), _T_57) @[el2_lsu_addrcheck.scala 68:30] + node _T_59 = or(_T_53, _T_58) @[el2_lsu_addrcheck.scala 67:129] + node _T_60 = bits(io.start_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 69:49] + node _T_61 = or(_T_60, UInt<29>("h01fffffff")) @[el2_lsu_addrcheck.scala 69:56] + node _T_62 = or(UInt<32>("h0a0000000"), UInt<29>("h01fffffff")) @[el2_lsu_addrcheck.scala 69:105] + node _T_63 = eq(_T_61, _T_62) @[el2_lsu_addrcheck.scala 69:80] + node _T_64 = and(UInt<1>("h01"), _T_63) @[el2_lsu_addrcheck.scala 69:30] + node _T_65 = or(_T_59, _T_64) @[el2_lsu_addrcheck.scala 68:129] + node _T_66 = bits(io.start_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 70:49] + node _T_67 = or(_T_66, UInt<28>("h0fffffff")) @[el2_lsu_addrcheck.scala 70:56] + node _T_68 = or(UInt<32>("h080000000"), UInt<28>("h0fffffff")) @[el2_lsu_addrcheck.scala 70:105] + node _T_69 = eq(_T_67, _T_68) @[el2_lsu_addrcheck.scala 70:80] + node _T_70 = and(UInt<1>("h01"), _T_69) @[el2_lsu_addrcheck.scala 70:30] + node _T_71 = or(_T_65, _T_70) @[el2_lsu_addrcheck.scala 69:129] + node _T_72 = bits(io.start_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 71:49] + node _T_73 = or(_T_72, UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 71:56] + node _T_74 = or(UInt<1>("h00"), UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 71:105] + node _T_75 = eq(_T_73, _T_74) @[el2_lsu_addrcheck.scala 71:80] + node _T_76 = and(UInt<1>("h00"), _T_75) @[el2_lsu_addrcheck.scala 71:30] + node _T_77 = or(_T_71, _T_76) @[el2_lsu_addrcheck.scala 70:129] + node _T_78 = bits(io.start_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 72:49] + node _T_79 = or(_T_78, UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 72:56] + node _T_80 = or(UInt<1>("h00"), UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 72:105] + node _T_81 = eq(_T_79, _T_80) @[el2_lsu_addrcheck.scala 72:80] + node _T_82 = and(UInt<1>("h00"), _T_81) @[el2_lsu_addrcheck.scala 72:30] + node _T_83 = or(_T_77, _T_82) @[el2_lsu_addrcheck.scala 71:129] + node _T_84 = bits(io.start_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 73:49] + node _T_85 = or(_T_84, UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 73:56] + node _T_86 = or(UInt<1>("h00"), UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 73:105] + node _T_87 = eq(_T_85, _T_86) @[el2_lsu_addrcheck.scala 73:80] + node _T_88 = and(UInt<1>("h00"), _T_87) @[el2_lsu_addrcheck.scala 73:30] + node _T_89 = or(_T_83, _T_88) @[el2_lsu_addrcheck.scala 72:129] + node _T_90 = bits(io.start_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 74:49] + node _T_91 = or(_T_90, UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 74:56] + node _T_92 = or(UInt<1>("h00"), UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 74:105] + node _T_93 = eq(_T_91, _T_92) @[el2_lsu_addrcheck.scala 74:80] + node _T_94 = and(UInt<1>("h00"), _T_93) @[el2_lsu_addrcheck.scala 74:30] + node _T_95 = or(_T_89, _T_94) @[el2_lsu_addrcheck.scala 73:129] + node _T_96 = bits(io.end_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 76:48] + node _T_97 = or(_T_96, UInt<31>("h07fffffff")) @[el2_lsu_addrcheck.scala 76:57] + node _T_98 = or(UInt<1>("h00"), UInt<31>("h07fffffff")) @[el2_lsu_addrcheck.scala 76:106] + node _T_99 = eq(_T_97, _T_98) @[el2_lsu_addrcheck.scala 76:81] + node _T_100 = and(UInt<1>("h01"), _T_99) @[el2_lsu_addrcheck.scala 76:31] + node _T_101 = bits(io.end_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 77:49] + node _T_102 = or(_T_101, UInt<30>("h03fffffff")) @[el2_lsu_addrcheck.scala 77:58] + node _T_103 = or(UInt<32>("h0c0000000"), UInt<30>("h03fffffff")) @[el2_lsu_addrcheck.scala 77:107] + node _T_104 = eq(_T_102, _T_103) @[el2_lsu_addrcheck.scala 77:82] + node _T_105 = and(UInt<1>("h01"), _T_104) @[el2_lsu_addrcheck.scala 77:32] + node _T_106 = or(_T_100, _T_105) @[el2_lsu_addrcheck.scala 76:130] + node _T_107 = bits(io.end_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 78:49] + node _T_108 = or(_T_107, UInt<29>("h01fffffff")) @[el2_lsu_addrcheck.scala 78:58] + node _T_109 = or(UInt<32>("h0a0000000"), UInt<29>("h01fffffff")) @[el2_lsu_addrcheck.scala 78:107] + node _T_110 = eq(_T_108, _T_109) @[el2_lsu_addrcheck.scala 78:82] + node _T_111 = and(UInt<1>("h01"), _T_110) @[el2_lsu_addrcheck.scala 78:32] + node _T_112 = or(_T_106, _T_111) @[el2_lsu_addrcheck.scala 77:131] + node _T_113 = bits(io.end_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 79:49] + node _T_114 = or(_T_113, UInt<28>("h0fffffff")) @[el2_lsu_addrcheck.scala 79:58] + node _T_115 = or(UInt<32>("h080000000"), UInt<28>("h0fffffff")) @[el2_lsu_addrcheck.scala 79:107] + node _T_116 = eq(_T_114, _T_115) @[el2_lsu_addrcheck.scala 79:82] + node _T_117 = and(UInt<1>("h01"), _T_116) @[el2_lsu_addrcheck.scala 79:32] + node _T_118 = or(_T_112, _T_117) @[el2_lsu_addrcheck.scala 78:131] + node _T_119 = bits(io.end_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 80:49] + node _T_120 = or(_T_119, UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 80:58] + node _T_121 = or(UInt<1>("h00"), UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 80:107] + node _T_122 = eq(_T_120, _T_121) @[el2_lsu_addrcheck.scala 80:82] + node _T_123 = and(UInt<1>("h00"), _T_122) @[el2_lsu_addrcheck.scala 80:32] + node _T_124 = or(_T_118, _T_123) @[el2_lsu_addrcheck.scala 79:131] + node _T_125 = bits(io.end_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 81:49] + node _T_126 = or(_T_125, UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 81:58] + node _T_127 = or(UInt<1>("h00"), UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 81:107] + node _T_128 = eq(_T_126, _T_127) @[el2_lsu_addrcheck.scala 81:82] + node _T_129 = and(UInt<1>("h00"), _T_128) @[el2_lsu_addrcheck.scala 81:32] + node _T_130 = or(_T_124, _T_129) @[el2_lsu_addrcheck.scala 80:131] + node _T_131 = bits(io.end_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 82:49] + node _T_132 = or(_T_131, UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 82:58] + node _T_133 = or(UInt<1>("h00"), UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 82:107] + node _T_134 = eq(_T_132, _T_133) @[el2_lsu_addrcheck.scala 82:82] + node _T_135 = and(UInt<1>("h00"), _T_134) @[el2_lsu_addrcheck.scala 82:32] + node _T_136 = or(_T_130, _T_135) @[el2_lsu_addrcheck.scala 81:131] + node _T_137 = bits(io.end_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 83:49] + node _T_138 = or(_T_137, UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 83:58] + node _T_139 = or(UInt<1>("h00"), UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 83:107] + node _T_140 = eq(_T_138, _T_139) @[el2_lsu_addrcheck.scala 83:82] + node _T_141 = and(UInt<1>("h00"), _T_140) @[el2_lsu_addrcheck.scala 83:32] + node _T_142 = or(_T_136, _T_141) @[el2_lsu_addrcheck.scala 82:131] + node _T_143 = and(_T_95, _T_142) @[el2_lsu_addrcheck.scala 75:7] + node non_dccm_access_ok = or(_T_48, _T_143) @[el2_lsu_addrcheck.scala 66:100] + node regpred_access_fault_d = xor(start_addr_dccm_or_pic, base_reg_dccm_or_pic) @[el2_lsu_addrcheck.scala 85:57] + node _T_144 = bits(io.start_addr_d, 1, 0) @[el2_lsu_addrcheck.scala 86:70] + node _T_145 = neq(_T_144, UInt<2>("h00")) @[el2_lsu_addrcheck.scala 86:76] + node _T_146 = eq(io.lsu_pkt_d.word, UInt<1>("h00")) @[el2_lsu_addrcheck.scala 86:92] + node _T_147 = or(_T_145, _T_146) @[el2_lsu_addrcheck.scala 86:90] + node picm_access_fault_d = and(io.addr_in_pic_d, _T_147) @[el2_lsu_addrcheck.scala 86:51] + wire unmapped_access_fault_d : UInt<1> + unmapped_access_fault_d <= UInt<1>("h01") + wire mpu_access_fault_d : UInt<1> + mpu_access_fault_d <= UInt<1>("h01") + node _T_148 = or(start_addr_in_dccm_d, start_addr_in_pic_d) @[el2_lsu_addrcheck.scala 91:87] + node _T_149 = eq(_T_148, UInt<1>("h00")) @[el2_lsu_addrcheck.scala 91:64] + node _T_150 = and(start_addr_in_dccm_region_d, _T_149) @[el2_lsu_addrcheck.scala 91:62] + node _T_151 = or(end_addr_in_dccm_d, end_addr_in_pic_d) @[el2_lsu_addrcheck.scala 93:57] + node _T_152 = eq(_T_151, UInt<1>("h00")) @[el2_lsu_addrcheck.scala 93:36] + node _T_153 = and(end_addr_in_dccm_region_d, _T_152) @[el2_lsu_addrcheck.scala 93:34] + node _T_154 = or(_T_150, _T_153) @[el2_lsu_addrcheck.scala 91:112] + node _T_155 = and(start_addr_in_dccm_d, end_addr_in_pic_d) @[el2_lsu_addrcheck.scala 95:29] + node _T_156 = or(_T_154, _T_155) @[el2_lsu_addrcheck.scala 93:85] + node _T_157 = and(start_addr_in_pic_d, end_addr_in_dccm_d) @[el2_lsu_addrcheck.scala 97:29] + node _T_158 = or(_T_156, _T_157) @[el2_lsu_addrcheck.scala 95:85] + unmapped_access_fault_d <= _T_158 @[el2_lsu_addrcheck.scala 91:29] + node _T_159 = eq(start_addr_in_dccm_region_d, UInt<1>("h00")) @[el2_lsu_addrcheck.scala 99:33] + node _T_160 = eq(non_dccm_access_ok, UInt<1>("h00")) @[el2_lsu_addrcheck.scala 99:64] + node _T_161 = and(_T_159, _T_160) @[el2_lsu_addrcheck.scala 99:62] + mpu_access_fault_d <= _T_161 @[el2_lsu_addrcheck.scala 99:29] + node _T_162 = or(unmapped_access_fault_d, mpu_access_fault_d) @[el2_lsu_addrcheck.scala 111:49] + node _T_163 = or(_T_162, picm_access_fault_d) @[el2_lsu_addrcheck.scala 111:70] + node _T_164 = or(_T_163, regpred_access_fault_d) @[el2_lsu_addrcheck.scala 111:92] + node _T_165 = and(_T_164, io.lsu_pkt_d.valid) @[el2_lsu_addrcheck.scala 111:118] + node _T_166 = eq(io.lsu_pkt_d.dma, UInt<1>("h00")) @[el2_lsu_addrcheck.scala 111:141] + node _T_167 = and(_T_165, _T_166) @[el2_lsu_addrcheck.scala 111:139] + io.access_fault_d <= _T_167 @[el2_lsu_addrcheck.scala 111:21] + node _T_168 = bits(unmapped_access_fault_d, 0, 0) @[el2_lsu_addrcheck.scala 112:60] + node _T_169 = bits(mpu_access_fault_d, 0, 0) @[el2_lsu_addrcheck.scala 112:100] + node _T_170 = bits(regpred_access_fault_d, 0, 0) @[el2_lsu_addrcheck.scala 112:144] + node _T_171 = bits(picm_access_fault_d, 0, 0) @[el2_lsu_addrcheck.scala 112:185] + node _T_172 = mux(_T_171, UInt<4>("h06"), UInt<4>("h00")) @[el2_lsu_addrcheck.scala 112:164] + node _T_173 = mux(_T_170, UInt<4>("h05"), _T_172) @[el2_lsu_addrcheck.scala 112:120] + node _T_174 = mux(_T_169, UInt<4>("h03"), _T_173) @[el2_lsu_addrcheck.scala 112:80] + node access_fault_mscause_d = mux(_T_168, UInt<4>("h02"), _T_174) @[el2_lsu_addrcheck.scala 112:35] + node _T_175 = bits(io.start_addr_d, 31, 28) @[el2_lsu_addrcheck.scala 113:53] + node _T_176 = bits(io.end_addr_d, 31, 28) @[el2_lsu_addrcheck.scala 113:78] + node regcross_misaligned_fault_d = neq(_T_175, _T_176) @[el2_lsu_addrcheck.scala 113:61] + node _T_177 = eq(is_aligned_d, UInt<1>("h00")) @[el2_lsu_addrcheck.scala 114:59] + node sideeffect_misaligned_fault_d = and(is_sideeffects_d, _T_177) @[el2_lsu_addrcheck.scala 114:57] + node _T_178 = and(sideeffect_misaligned_fault_d, io.addr_external_d) @[el2_lsu_addrcheck.scala 115:90] + node _T_179 = or(regcross_misaligned_fault_d, _T_178) @[el2_lsu_addrcheck.scala 115:57] + node _T_180 = and(_T_179, io.lsu_pkt_d.valid) @[el2_lsu_addrcheck.scala 115:113] + node _T_181 = eq(io.lsu_pkt_d.dma, UInt<1>("h00")) @[el2_lsu_addrcheck.scala 115:136] + node _T_182 = and(_T_180, _T_181) @[el2_lsu_addrcheck.scala 115:134] + io.misaligned_fault_d <= _T_182 @[el2_lsu_addrcheck.scala 115:25] + node _T_183 = bits(sideeffect_misaligned_fault_d, 0, 0) @[el2_lsu_addrcheck.scala 116:111] + node _T_184 = mux(_T_183, UInt<4>("h01"), UInt<4>("h00")) @[el2_lsu_addrcheck.scala 116:80] + node misaligned_fault_mscause_d = mux(regcross_misaligned_fault_d, UInt<4>("h02"), _T_184) @[el2_lsu_addrcheck.scala 116:39] + node _T_185 = bits(io.misaligned_fault_d, 0, 0) @[el2_lsu_addrcheck.scala 117:50] + node _T_186 = bits(misaligned_fault_mscause_d, 3, 0) @[el2_lsu_addrcheck.scala 117:84] + node _T_187 = bits(access_fault_mscause_d, 3, 0) @[el2_lsu_addrcheck.scala 117:113] + node _T_188 = mux(_T_185, _T_186, _T_187) @[el2_lsu_addrcheck.scala 117:27] + io.exc_mscause_d <= _T_188 @[el2_lsu_addrcheck.scala 117:21] + node _T_189 = eq(start_addr_in_dccm_d, UInt<1>("h00")) @[el2_lsu_addrcheck.scala 118:66] + node _T_190 = and(start_addr_in_dccm_region_d, _T_189) @[el2_lsu_addrcheck.scala 118:64] + node _T_191 = eq(end_addr_in_dccm_d, UInt<1>("h00")) @[el2_lsu_addrcheck.scala 118:120] + node _T_192 = and(end_addr_in_dccm_region_d, _T_191) @[el2_lsu_addrcheck.scala 118:118] + node _T_193 = or(_T_190, _T_192) @[el2_lsu_addrcheck.scala 118:88] + node _T_194 = and(_T_193, io.lsu_pkt_d.valid) @[el2_lsu_addrcheck.scala 118:142] + node _T_195 = and(_T_194, io.lsu_pkt_d.fast_int) @[el2_lsu_addrcheck.scala 118:163] + io.fir_dccm_access_error_d <= _T_195 @[el2_lsu_addrcheck.scala 118:31] + node _T_196 = and(start_addr_in_dccm_region_d, end_addr_in_dccm_region_d) @[el2_lsu_addrcheck.scala 119:66] + node _T_197 = eq(_T_196, UInt<1>("h00")) @[el2_lsu_addrcheck.scala 119:36] + node _T_198 = and(_T_197, io.lsu_pkt_d.valid) @[el2_lsu_addrcheck.scala 119:95] + node _T_199 = and(_T_198, io.lsu_pkt_d.fast_int) @[el2_lsu_addrcheck.scala 119:116] + io.fir_nondccm_access_error_d <= _T_199 @[el2_lsu_addrcheck.scala 119:33] + reg _T_200 : UInt<1>, io.lsu_c2_m_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_addrcheck.scala 121:60] + _T_200 <= is_sideeffects_d @[el2_lsu_addrcheck.scala 121:60] + io.is_sideeffects_m <= _T_200 @[el2_lsu_addrcheck.scala 121:50] + + module el2_lsu_lsc_ctl : + input clock : Clock + input reset : AsyncReset + output io : {flip lsu_c1_m_clk : Clock, flip lsu_c1_r_clk : Clock, flip lsu_c2_m_clk : Clock, flip lsu_c2_r_clk : Clock, flip lsu_store_c1_m_clk : Clock, flip lsu_ld_data_r : UInt<32>, flip lsu_ld_data_corr_r : UInt<32>, flip lsu_single_ecc_error_r : UInt<1>, flip lsu_double_ecc_error_r : UInt<1>, flip lsu_ld_data_m : UInt<32>, flip lsu_single_ecc_error_m : UInt<1>, flip lsu_double_ecc_error_m : UInt<1>, flip flush_m_up : UInt<1>, flip flush_r : UInt<1>, flip exu_lsu_rs1_d : UInt<32>, flip exu_lsu_rs2_d : UInt<32>, flip lsu_p : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip dec_lsu_valid_raw_d : UInt<1>, flip dec_lsu_offset_d : UInt<12>, flip picm_mask_data_m : UInt<32>, flip bus_read_data_m : UInt<32>, lsu_result_m : UInt<32>, lsu_result_corr_r : UInt<32>, lsu_addr_d : UInt<32>, lsu_addr_m : UInt<32>, lsu_addr_r : UInt<32>, end_addr_d : UInt<32>, end_addr_m : UInt<32>, end_addr_r : UInt<32>, store_data_m : UInt<32>, flip dec_tlu_mrac_ff : UInt<32>, lsu_exc_m : UInt<1>, is_sideeffects_m : UInt<1>, lsu_commit_r : UInt<1>, lsu_single_ecc_error_incr : UInt<1>, lsu_error_pkt_r : {exc_valid : UInt<1>, single_ecc_error : UInt<1>, inst_type : UInt<1>, exc_type : UInt<1>, mscause : UInt<1>, addr : UInt<1>}, lsu_fir_addr : UInt<31>, lsu_fir_error : UInt<2>, addr_in_dccm_d : UInt<1>, addr_in_dccm_m : UInt<1>, addr_in_dccm_r : UInt<1>, addr_in_pic_d : UInt<1>, addr_in_pic_m : UInt<1>, addr_in_pic_r : UInt<1>, addr_external_m : UInt<1>, flip dma_dccm_req : UInt<1>, flip dma_mem_addr : UInt<32>, flip dma_mem_sz : UInt<3>, flip dma_mem_write : UInt<1>, flip dma_mem_wdata : UInt<64>, lsu_pkt_d : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, lsu_pkt_m : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, lsu_pkt_r : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip scan_mode : UInt<1>} + + wire dma_pkt_d : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>} @[el2_lsu_lsc_ctl.scala 96:29] + wire lsu_pkt_m_in : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>} @[el2_lsu_lsc_ctl.scala 97:29] + wire lsu_pkt_r_in : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>} @[el2_lsu_lsc_ctl.scala 98:29] + wire lsu_error_pkt_m : {exc_valid : UInt<1>, single_ecc_error : UInt<1>, inst_type : UInt<1>, exc_type : UInt<1>, mscause : UInt<1>, addr : UInt<1>} @[el2_lsu_lsc_ctl.scala 99:29] + node _T = bits(io.dec_lsu_valid_raw_d, 0, 0) @[el2_lsu_lsc_ctl.scala 101:52] + node lsu_rs1_d = mux(_T, io.exu_lsu_rs1_d, io.dma_mem_addr) @[el2_lsu_lsc_ctl.scala 101:28] + node _T_1 = bits(io.dec_lsu_offset_d, 11, 0) @[el2_lsu_lsc_ctl.scala 102:44] + node _T_2 = bits(io.dec_lsu_valid_raw_d, 0, 0) @[Bitwise.scala 72:15] + node _T_3 = mux(_T_2, UInt<12>("h0fff"), UInt<12>("h00")) @[Bitwise.scala 72:12] + node lsu_offset_d = and(_T_1, _T_3) @[el2_lsu_lsc_ctl.scala 102:51] + node _T_4 = bits(io.lsu_pkt_d.load_ldst_bypass_d, 0, 0) @[el2_lsu_lsc_ctl.scala 105:61] + node rs1_d = mux(_T_4, io.lsu_result_m, lsu_rs1_d) @[el2_lsu_lsc_ctl.scala 105:28] + node _T_5 = bits(rs1_d, 11, 0) @[el2_lib.scala 230:31] + node _T_6 = cat(UInt<1>("h00"), _T_5) @[Cat.scala 29:58] + node _T_7 = bits(lsu_offset_d, 11, 0) @[el2_lib.scala 230:60] + node _T_8 = cat(UInt<1>("h00"), _T_7) @[Cat.scala 29:58] + node _T_9 = add(_T_6, _T_8) @[el2_lib.scala 230:39] + node _T_10 = tail(_T_9, 1) @[el2_lib.scala 230:39] + node _T_11 = bits(lsu_offset_d, 11, 11) @[el2_lib.scala 231:41] + node _T_12 = bits(_T_10, 12, 12) @[el2_lib.scala 231:50] + node _T_13 = xor(_T_11, _T_12) @[el2_lib.scala 231:46] + node _T_14 = not(_T_13) @[el2_lib.scala 231:33] + node _T_15 = bits(_T_14, 0, 0) @[Bitwise.scala 72:15] + node _T_16 = mux(_T_15, UInt<20>("h0fffff"), UInt<20>("h00")) @[Bitwise.scala 72:12] + node _T_17 = bits(rs1_d, 31, 12) @[el2_lib.scala 231:63] + node _T_18 = and(_T_16, _T_17) @[el2_lib.scala 231:58] + node _T_19 = bits(lsu_offset_d, 11, 11) @[el2_lib.scala 232:25] + node _T_20 = not(_T_19) @[el2_lib.scala 232:18] + node _T_21 = bits(_T_10, 12, 12) @[el2_lib.scala 232:34] + node _T_22 = and(_T_20, _T_21) @[el2_lib.scala 232:30] + node _T_23 = bits(_T_22, 0, 0) @[Bitwise.scala 72:15] + node _T_24 = mux(_T_23, UInt<20>("h0fffff"), UInt<20>("h00")) @[Bitwise.scala 72:12] + node _T_25 = bits(rs1_d, 31, 12) @[el2_lib.scala 232:47] + node _T_26 = add(_T_25, UInt<1>("h01")) @[el2_lib.scala 232:54] + node _T_27 = tail(_T_26, 1) @[el2_lib.scala 232:54] + node _T_28 = and(_T_24, _T_27) @[el2_lib.scala 232:41] + node _T_29 = or(_T_18, _T_28) @[el2_lib.scala 231:72] + node _T_30 = bits(lsu_offset_d, 11, 11) @[el2_lib.scala 233:24] + node _T_31 = bits(_T_10, 12, 12) @[el2_lib.scala 233:34] + node _T_32 = not(_T_31) @[el2_lib.scala 233:31] + node _T_33 = and(_T_30, _T_32) @[el2_lib.scala 233:29] + node _T_34 = bits(_T_33, 0, 0) @[Bitwise.scala 72:15] + node _T_35 = mux(_T_34, UInt<20>("h0fffff"), UInt<20>("h00")) @[Bitwise.scala 72:12] + node _T_36 = bits(rs1_d, 31, 12) @[el2_lib.scala 233:47] + node _T_37 = sub(_T_36, UInt<1>("h01")) @[el2_lib.scala 233:54] + node _T_38 = tail(_T_37, 1) @[el2_lib.scala 233:54] + node _T_39 = and(_T_35, _T_38) @[el2_lib.scala 233:41] + node _T_40 = or(_T_29, _T_39) @[el2_lib.scala 232:61] + node _T_41 = bits(_T_10, 11, 0) @[el2_lib.scala 234:22] + node full_addr_d = cat(_T_40, _T_41) @[Cat.scala 29:58] + node _T_42 = bits(io.lsu_pkt_d.half, 0, 0) @[Bitwise.scala 72:15] + node _T_43 = mux(_T_42, UInt<3>("h07"), UInt<3>("h00")) @[Bitwise.scala 72:12] + node _T_44 = and(_T_43, UInt<3>("h01")) @[el2_lsu_lsc_ctl.scala 110:53] + node _T_45 = bits(io.lsu_pkt_d.word, 0, 0) @[Bitwise.scala 72:15] + node _T_46 = mux(_T_45, UInt<3>("h07"), UInt<3>("h00")) @[Bitwise.scala 72:12] + node _T_47 = and(_T_46, UInt<3>("h03")) @[el2_lsu_lsc_ctl.scala 111:35] + node _T_48 = or(_T_44, _T_47) @[el2_lsu_lsc_ctl.scala 110:65] + node _T_49 = bits(io.lsu_pkt_d.dword, 0, 0) @[Bitwise.scala 72:15] + node _T_50 = mux(_T_49, UInt<3>("h07"), UInt<3>("h00")) @[Bitwise.scala 72:12] + node _T_51 = and(_T_50, UInt<3>("h07")) @[el2_lsu_lsc_ctl.scala 112:35] + node addr_offset_d = or(_T_48, _T_51) @[el2_lsu_lsc_ctl.scala 111:47] + node _T_52 = bits(lsu_offset_d, 11, 11) @[el2_lsu_lsc_ctl.scala 114:39] + node _T_53 = bits(lsu_offset_d, 11, 0) @[el2_lsu_lsc_ctl.scala 114:52] + node _T_54 = cat(_T_52, _T_53) @[Cat.scala 29:58] + node _T_55 = mux(UInt<1>("h00"), UInt<9>("h01ff"), UInt<9>("h00")) @[Bitwise.scala 72:12] + node _T_56 = bits(addr_offset_d, 2, 0) @[el2_lsu_lsc_ctl.scala 114:91] + node _T_57 = cat(_T_55, _T_56) @[Cat.scala 29:58] + node _T_58 = add(_T_54, _T_57) @[el2_lsu_lsc_ctl.scala 114:60] + node end_addr_offset_d = tail(_T_58, 1) @[el2_lsu_lsc_ctl.scala 114:60] + node _T_59 = bits(rs1_d, 31, 0) @[el2_lsu_lsc_ctl.scala 115:32] + node _T_60 = bits(end_addr_offset_d, 12, 12) @[el2_lsu_lsc_ctl.scala 115:70] + node _T_61 = bits(_T_60, 0, 0) @[Bitwise.scala 72:15] + node _T_62 = mux(_T_61, UInt<19>("h07ffff"), UInt<19>("h00")) @[Bitwise.scala 72:12] + node _T_63 = bits(end_addr_offset_d, 12, 0) @[el2_lsu_lsc_ctl.scala 115:93] + node _T_64 = cat(_T_62, _T_63) @[Cat.scala 29:58] + node _T_65 = add(_T_59, _T_64) @[el2_lsu_lsc_ctl.scala 115:39] + node full_end_addr_d = tail(_T_65, 1) @[el2_lsu_lsc_ctl.scala 115:39] + io.end_addr_d <= full_end_addr_d @[el2_lsu_lsc_ctl.scala 116:24] + inst addrcheck of el2_lsu_addrcheck @[el2_lsu_lsc_ctl.scala 119:25] + addrcheck.clock <= clock + addrcheck.reset <= reset + addrcheck.io.lsu_c2_m_clk <= io.lsu_c2_m_clk @[el2_lsu_lsc_ctl.scala 121:42] + addrcheck.io.start_addr_d <= full_addr_d @[el2_lsu_lsc_ctl.scala 123:42] + addrcheck.io.end_addr_d <= full_end_addr_d @[el2_lsu_lsc_ctl.scala 124:42] + addrcheck.io.lsu_pkt_d.valid <= io.lsu_pkt_d.valid @[el2_lsu_lsc_ctl.scala 125:42] + addrcheck.io.lsu_pkt_d.store_data_bypass_m <= io.lsu_pkt_d.store_data_bypass_m @[el2_lsu_lsc_ctl.scala 125:42] + addrcheck.io.lsu_pkt_d.load_ldst_bypass_d <= io.lsu_pkt_d.load_ldst_bypass_d @[el2_lsu_lsc_ctl.scala 125:42] + addrcheck.io.lsu_pkt_d.store_data_bypass_d <= io.lsu_pkt_d.store_data_bypass_d @[el2_lsu_lsc_ctl.scala 125:42] + addrcheck.io.lsu_pkt_d.dma <= io.lsu_pkt_d.dma @[el2_lsu_lsc_ctl.scala 125:42] + addrcheck.io.lsu_pkt_d.unsign <= io.lsu_pkt_d.unsign @[el2_lsu_lsc_ctl.scala 125:42] + addrcheck.io.lsu_pkt_d.store <= io.lsu_pkt_d.store @[el2_lsu_lsc_ctl.scala 125:42] + addrcheck.io.lsu_pkt_d.load <= io.lsu_pkt_d.load @[el2_lsu_lsc_ctl.scala 125:42] + addrcheck.io.lsu_pkt_d.dword <= io.lsu_pkt_d.dword @[el2_lsu_lsc_ctl.scala 125:42] + addrcheck.io.lsu_pkt_d.word <= io.lsu_pkt_d.word @[el2_lsu_lsc_ctl.scala 125:42] + addrcheck.io.lsu_pkt_d.half <= io.lsu_pkt_d.half @[el2_lsu_lsc_ctl.scala 125:42] + addrcheck.io.lsu_pkt_d.by <= io.lsu_pkt_d.by @[el2_lsu_lsc_ctl.scala 125:42] + addrcheck.io.lsu_pkt_d.fast_int <= io.lsu_pkt_d.fast_int @[el2_lsu_lsc_ctl.scala 125:42] + addrcheck.io.dec_tlu_mrac_ff <= io.dec_tlu_mrac_ff @[el2_lsu_lsc_ctl.scala 126:42] + node _T_66 = bits(rs1_d, 31, 28) @[el2_lsu_lsc_ctl.scala 127:50] + addrcheck.io.rs1_region_d <= _T_66 @[el2_lsu_lsc_ctl.scala 127:42] + addrcheck.io.rs1_d <= rs1_d @[el2_lsu_lsc_ctl.scala 128:42] + io.is_sideeffects_m <= addrcheck.io.is_sideeffects_m @[el2_lsu_lsc_ctl.scala 129:42] + io.addr_in_dccm_d <= addrcheck.io.addr_in_dccm_d @[el2_lsu_lsc_ctl.scala 130:42] + io.addr_in_pic_d <= addrcheck.io.addr_in_pic_d @[el2_lsu_lsc_ctl.scala 131:42] + addrcheck.io.scan_mode <= io.scan_mode @[el2_lsu_lsc_ctl.scala 138:42] + wire exc_mscause_r : UInt<4> + exc_mscause_r <= UInt<4>("h00") + wire fir_dccm_access_error_r : UInt<1> + fir_dccm_access_error_r <= UInt<1>("h00") + wire fir_nondccm_access_error_r : UInt<1> + fir_nondccm_access_error_r <= UInt<1>("h00") + wire access_fault_r : UInt<1> + access_fault_r <= UInt<1>("h00") + wire misaligned_fault_r : UInt<1> + misaligned_fault_r <= UInt<1>("h00") + wire lsu_fir_error_m : UInt<2> + lsu_fir_error_m <= UInt<2>("h00") + wire fir_dccm_access_error_m : UInt<1> + fir_dccm_access_error_m <= UInt<1>("h00") + wire fir_nondccm_access_error_m : UInt<1> + fir_nondccm_access_error_m <= UInt<1>("h00") + reg access_fault_m : UInt, io.lsu_c1_m_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_lsc_ctl.scala 150:75] + access_fault_m <= addrcheck.io.access_fault_d @[el2_lsu_lsc_ctl.scala 150:75] + reg misaligned_fault_m : UInt, io.lsu_c1_m_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_lsc_ctl.scala 151:75] + misaligned_fault_m <= addrcheck.io.misaligned_fault_d @[el2_lsu_lsc_ctl.scala 151:75] + reg exc_mscause_m : UInt, io.lsu_c1_m_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_lsc_ctl.scala 152:75] + exc_mscause_m <= addrcheck.io.exc_mscause_d @[el2_lsu_lsc_ctl.scala 152:75] + reg _T_67 : UInt, io.lsu_c1_m_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_lsc_ctl.scala 153:75] + _T_67 <= addrcheck.io.fir_dccm_access_error_d @[el2_lsu_lsc_ctl.scala 153:75] + fir_dccm_access_error_m <= _T_67 @[el2_lsu_lsc_ctl.scala 153:38] + reg _T_68 : UInt, io.lsu_c1_m_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_lsc_ctl.scala 154:75] + _T_68 <= addrcheck.io.fir_nondccm_access_error_d @[el2_lsu_lsc_ctl.scala 154:75] + fir_nondccm_access_error_m <= _T_68 @[el2_lsu_lsc_ctl.scala 154:38] + node _T_69 = or(access_fault_m, misaligned_fault_m) @[el2_lsu_lsc_ctl.scala 156:34] + io.lsu_exc_m <= _T_69 @[el2_lsu_lsc_ctl.scala 156:16] + node _T_70 = eq(io.lsu_double_ecc_error_r, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 157:64] + node _T_71 = and(io.lsu_single_ecc_error_r, _T_70) @[el2_lsu_lsc_ctl.scala 157:62] + node _T_72 = or(io.lsu_commit_r, io.lsu_pkt_r.dma) @[el2_lsu_lsc_ctl.scala 157:111] + node _T_73 = and(_T_71, _T_72) @[el2_lsu_lsc_ctl.scala 157:92] + node _T_74 = and(_T_73, io.lsu_pkt_r.valid) @[el2_lsu_lsc_ctl.scala 157:131] + io.lsu_single_ecc_error_incr <= _T_74 @[el2_lsu_lsc_ctl.scala 157:32] + node _T_75 = or(access_fault_m, misaligned_fault_m) @[el2_lsu_lsc_ctl.scala 179:50] + node _T_76 = or(_T_75, io.lsu_double_ecc_error_m) @[el2_lsu_lsc_ctl.scala 179:71] + node _T_77 = and(_T_76, io.lsu_pkt_m.valid) @[el2_lsu_lsc_ctl.scala 179:100] + node _T_78 = eq(io.lsu_pkt_m.dma, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 179:123] + node _T_79 = and(_T_77, _T_78) @[el2_lsu_lsc_ctl.scala 179:121] + node _T_80 = eq(io.lsu_pkt_m.fast_int, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 179:143] + node _T_81 = and(_T_79, _T_80) @[el2_lsu_lsc_ctl.scala 179:141] + node _T_82 = eq(io.flush_m_up, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 179:168] + node _T_83 = and(_T_81, _T_82) @[el2_lsu_lsc_ctl.scala 179:166] + lsu_error_pkt_m.exc_valid <= _T_83 @[el2_lsu_lsc_ctl.scala 179:31] + node _T_84 = eq(lsu_error_pkt_m.exc_valid, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 180:70] + node _T_85 = and(io.lsu_single_ecc_error_m, _T_84) @[el2_lsu_lsc_ctl.scala 180:68] + node _T_86 = eq(io.lsu_pkt_m.dma, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 180:100] + node _T_87 = and(_T_85, _T_86) @[el2_lsu_lsc_ctl.scala 180:98] + lsu_error_pkt_m.single_ecc_error <= _T_87 @[el2_lsu_lsc_ctl.scala 180:38] + lsu_error_pkt_m.inst_type <= io.lsu_pkt_m.store @[el2_lsu_lsc_ctl.scala 181:38] + node _T_88 = not(misaligned_fault_m) @[el2_lsu_lsc_ctl.scala 182:41] + lsu_error_pkt_m.exc_type <= _T_88 @[el2_lsu_lsc_ctl.scala 182:38] + node _T_89 = eq(misaligned_fault_m, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 183:75] + node _T_90 = and(io.lsu_double_ecc_error_m, _T_89) @[el2_lsu_lsc_ctl.scala 183:73] + node _T_91 = eq(access_fault_m, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 183:97] + node _T_92 = and(_T_90, _T_91) @[el2_lsu_lsc_ctl.scala 183:95] + node _T_93 = eq(_T_92, UInt<1>("h01")) @[el2_lsu_lsc_ctl.scala 183:113] + node _T_94 = bits(exc_mscause_m, 3, 0) @[el2_lsu_lsc_ctl.scala 183:144] + node _T_95 = mux(_T_93, UInt<4>("h01"), _T_94) @[el2_lsu_lsc_ctl.scala 183:44] + lsu_error_pkt_m.mscause <= _T_95 @[el2_lsu_lsc_ctl.scala 183:38] + node _T_96 = bits(io.lsu_addr_m, 31, 0) @[el2_lsu_lsc_ctl.scala 184:54] + lsu_error_pkt_m.addr <= _T_96 @[el2_lsu_lsc_ctl.scala 184:38] + node _T_97 = bits(fir_nondccm_access_error_m, 0, 0) @[el2_lsu_lsc_ctl.scala 185:72] + node _T_98 = bits(fir_dccm_access_error_m, 0, 0) @[el2_lsu_lsc_ctl.scala 185:117] + node _T_99 = and(io.lsu_pkt_m.fast_int, io.lsu_double_ecc_error_m) @[el2_lsu_lsc_ctl.scala 185:161] + node _T_100 = bits(_T_99, 0, 0) @[el2_lsu_lsc_ctl.scala 185:190] + node _T_101 = mux(_T_100, UInt<2>("h01"), UInt<2>("h00")) @[el2_lsu_lsc_ctl.scala 185:137] + node _T_102 = mux(_T_98, UInt<2>("h02"), _T_101) @[el2_lsu_lsc_ctl.scala 185:92] + node _T_103 = mux(_T_97, UInt<2>("h03"), _T_102) @[el2_lsu_lsc_ctl.scala 185:44] + lsu_fir_error_m <= _T_103 @[el2_lsu_lsc_ctl.scala 185:38] + wire _T_104 : {exc_valid : UInt<1>, single_ecc_error : UInt<1>, inst_type : UInt<1>, exc_type : UInt<1>, mscause : UInt<1>, addr : UInt<1>} @[el2_lsu_lsc_ctl.scala 186:104] + _T_104.addr <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 186:104] + _T_104.mscause <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 186:104] + _T_104.exc_type <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 186:104] + _T_104.inst_type <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 186:104] + _T_104.single_ecc_error <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 186:104] + _T_104.exc_valid <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 186:104] + reg _T_105 : {exc_valid : UInt<1>, single_ecc_error : UInt<1>, inst_type : UInt<1>, exc_type : UInt<1>, mscause : UInt<1>, addr : UInt<1>}, io.lsu_c2_r_clk with : (reset => (reset, _T_104)) @[el2_lsu_lsc_ctl.scala 186:75] + _T_105.addr <= lsu_error_pkt_m.addr @[el2_lsu_lsc_ctl.scala 186:75] + _T_105.mscause <= lsu_error_pkt_m.mscause @[el2_lsu_lsc_ctl.scala 186:75] + _T_105.exc_type <= lsu_error_pkt_m.exc_type @[el2_lsu_lsc_ctl.scala 186:75] + _T_105.inst_type <= lsu_error_pkt_m.inst_type @[el2_lsu_lsc_ctl.scala 186:75] + _T_105.single_ecc_error <= lsu_error_pkt_m.single_ecc_error @[el2_lsu_lsc_ctl.scala 186:75] + _T_105.exc_valid <= lsu_error_pkt_m.exc_valid @[el2_lsu_lsc_ctl.scala 186:75] + io.lsu_error_pkt_r.addr <= _T_105.addr @[el2_lsu_lsc_ctl.scala 186:38] + io.lsu_error_pkt_r.mscause <= _T_105.mscause @[el2_lsu_lsc_ctl.scala 186:38] + io.lsu_error_pkt_r.exc_type <= _T_105.exc_type @[el2_lsu_lsc_ctl.scala 186:38] + io.lsu_error_pkt_r.inst_type <= _T_105.inst_type @[el2_lsu_lsc_ctl.scala 186:38] + io.lsu_error_pkt_r.single_ecc_error <= _T_105.single_ecc_error @[el2_lsu_lsc_ctl.scala 186:38] + io.lsu_error_pkt_r.exc_valid <= _T_105.exc_valid @[el2_lsu_lsc_ctl.scala 186:38] + reg _T_106 : UInt, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_lsc_ctl.scala 187:75] + _T_106 <= lsu_fir_error_m @[el2_lsu_lsc_ctl.scala 187:75] + io.lsu_fir_error <= _T_106 @[el2_lsu_lsc_ctl.scala 187:38] + dma_pkt_d.unsign <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 189:22] + dma_pkt_d.fast_int <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 190:22] + dma_pkt_d.valid <= io.dma_dccm_req @[el2_lsu_lsc_ctl.scala 191:22] + dma_pkt_d.dma <= UInt<1>("h01") @[el2_lsu_lsc_ctl.scala 192:22] + dma_pkt_d.store <= io.dma_mem_write @[el2_lsu_lsc_ctl.scala 193:22] + node _T_107 = not(io.dma_mem_write) @[el2_lsu_lsc_ctl.scala 194:25] + dma_pkt_d.load <= _T_107 @[el2_lsu_lsc_ctl.scala 194:22] + node _T_108 = bits(io.dma_mem_sz, 2, 0) @[el2_lsu_lsc_ctl.scala 195:39] + node _T_109 = eq(_T_108, UInt<3>("h00")) @[el2_lsu_lsc_ctl.scala 195:45] + dma_pkt_d.by <= _T_109 @[el2_lsu_lsc_ctl.scala 195:22] + node _T_110 = bits(io.dma_mem_sz, 2, 0) @[el2_lsu_lsc_ctl.scala 196:39] + node _T_111 = eq(_T_110, UInt<3>("h01")) @[el2_lsu_lsc_ctl.scala 196:45] + dma_pkt_d.half <= _T_111 @[el2_lsu_lsc_ctl.scala 196:22] + node _T_112 = bits(io.dma_mem_sz, 2, 0) @[el2_lsu_lsc_ctl.scala 197:39] + node _T_113 = eq(_T_112, UInt<3>("h02")) @[el2_lsu_lsc_ctl.scala 197:45] + dma_pkt_d.word <= _T_113 @[el2_lsu_lsc_ctl.scala 197:22] + node _T_114 = bits(io.dma_mem_sz, 2, 0) @[el2_lsu_lsc_ctl.scala 198:39] + node _T_115 = eq(_T_114, UInt<3>("h03")) @[el2_lsu_lsc_ctl.scala 198:45] + dma_pkt_d.dword <= _T_115 @[el2_lsu_lsc_ctl.scala 198:22] + dma_pkt_d.store_data_bypass_d <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 199:34] + dma_pkt_d.load_ldst_bypass_d <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 200:34] + dma_pkt_d.store_data_bypass_m <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 201:34] + wire lsu_ld_datafn_r : UInt<32> + lsu_ld_datafn_r <= UInt<32>("h00") + wire lsu_ld_datafn_corr_r : UInt<32> + lsu_ld_datafn_corr_r <= UInt<32>("h00") + wire lsu_ld_datafn_m : UInt<32> + lsu_ld_datafn_m <= UInt<32>("h00") + node _T_116 = bits(io.dec_lsu_valid_raw_d, 0, 0) @[el2_lsu_lsc_ctl.scala 207:50] + node _T_117 = mux(_T_116, io.lsu_p, dma_pkt_d) @[el2_lsu_lsc_ctl.scala 207:26] + io.lsu_pkt_d.valid <= _T_117.valid @[el2_lsu_lsc_ctl.scala 207:20] + io.lsu_pkt_d.store_data_bypass_m <= _T_117.store_data_bypass_m @[el2_lsu_lsc_ctl.scala 207:20] + io.lsu_pkt_d.load_ldst_bypass_d <= _T_117.load_ldst_bypass_d @[el2_lsu_lsc_ctl.scala 207:20] + io.lsu_pkt_d.store_data_bypass_d <= _T_117.store_data_bypass_d @[el2_lsu_lsc_ctl.scala 207:20] + io.lsu_pkt_d.dma <= _T_117.dma @[el2_lsu_lsc_ctl.scala 207:20] + io.lsu_pkt_d.unsign <= _T_117.unsign @[el2_lsu_lsc_ctl.scala 207:20] + io.lsu_pkt_d.store <= _T_117.store @[el2_lsu_lsc_ctl.scala 207:20] + io.lsu_pkt_d.load <= _T_117.load @[el2_lsu_lsc_ctl.scala 207:20] + io.lsu_pkt_d.dword <= _T_117.dword @[el2_lsu_lsc_ctl.scala 207:20] + io.lsu_pkt_d.word <= _T_117.word @[el2_lsu_lsc_ctl.scala 207:20] + io.lsu_pkt_d.half <= _T_117.half @[el2_lsu_lsc_ctl.scala 207:20] + io.lsu_pkt_d.by <= _T_117.by @[el2_lsu_lsc_ctl.scala 207:20] + io.lsu_pkt_d.fast_int <= _T_117.fast_int @[el2_lsu_lsc_ctl.scala 207:20] + lsu_pkt_m_in.valid <= io.lsu_pkt_d.valid @[el2_lsu_lsc_ctl.scala 208:20] + lsu_pkt_m_in.store_data_bypass_m <= io.lsu_pkt_d.store_data_bypass_m @[el2_lsu_lsc_ctl.scala 208:20] + lsu_pkt_m_in.load_ldst_bypass_d <= io.lsu_pkt_d.load_ldst_bypass_d @[el2_lsu_lsc_ctl.scala 208:20] + lsu_pkt_m_in.store_data_bypass_d <= io.lsu_pkt_d.store_data_bypass_d @[el2_lsu_lsc_ctl.scala 208:20] + lsu_pkt_m_in.dma <= io.lsu_pkt_d.dma @[el2_lsu_lsc_ctl.scala 208:20] + lsu_pkt_m_in.unsign <= io.lsu_pkt_d.unsign @[el2_lsu_lsc_ctl.scala 208:20] + lsu_pkt_m_in.store <= io.lsu_pkt_d.store @[el2_lsu_lsc_ctl.scala 208:20] + lsu_pkt_m_in.load <= io.lsu_pkt_d.load @[el2_lsu_lsc_ctl.scala 208:20] + lsu_pkt_m_in.dword <= io.lsu_pkt_d.dword @[el2_lsu_lsc_ctl.scala 208:20] + lsu_pkt_m_in.word <= io.lsu_pkt_d.word @[el2_lsu_lsc_ctl.scala 208:20] + lsu_pkt_m_in.half <= io.lsu_pkt_d.half @[el2_lsu_lsc_ctl.scala 208:20] + lsu_pkt_m_in.by <= io.lsu_pkt_d.by @[el2_lsu_lsc_ctl.scala 208:20] + lsu_pkt_m_in.fast_int <= io.lsu_pkt_d.fast_int @[el2_lsu_lsc_ctl.scala 208:20] + lsu_pkt_r_in.valid <= io.lsu_pkt_m.valid @[el2_lsu_lsc_ctl.scala 209:20] + lsu_pkt_r_in.store_data_bypass_m <= io.lsu_pkt_m.store_data_bypass_m @[el2_lsu_lsc_ctl.scala 209:20] + lsu_pkt_r_in.load_ldst_bypass_d <= io.lsu_pkt_m.load_ldst_bypass_d @[el2_lsu_lsc_ctl.scala 209:20] + lsu_pkt_r_in.store_data_bypass_d <= io.lsu_pkt_m.store_data_bypass_d @[el2_lsu_lsc_ctl.scala 209:20] + lsu_pkt_r_in.dma <= io.lsu_pkt_m.dma @[el2_lsu_lsc_ctl.scala 209:20] + lsu_pkt_r_in.unsign <= io.lsu_pkt_m.unsign @[el2_lsu_lsc_ctl.scala 209:20] + lsu_pkt_r_in.store <= io.lsu_pkt_m.store @[el2_lsu_lsc_ctl.scala 209:20] + lsu_pkt_r_in.load <= io.lsu_pkt_m.load @[el2_lsu_lsc_ctl.scala 209:20] + lsu_pkt_r_in.dword <= io.lsu_pkt_m.dword @[el2_lsu_lsc_ctl.scala 209:20] + lsu_pkt_r_in.word <= io.lsu_pkt_m.word @[el2_lsu_lsc_ctl.scala 209:20] + lsu_pkt_r_in.half <= io.lsu_pkt_m.half @[el2_lsu_lsc_ctl.scala 209:20] + lsu_pkt_r_in.by <= io.lsu_pkt_m.by @[el2_lsu_lsc_ctl.scala 209:20] + lsu_pkt_r_in.fast_int <= io.lsu_pkt_m.fast_int @[el2_lsu_lsc_ctl.scala 209:20] + node _T_118 = eq(io.lsu_p.fast_int, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 211:64] + node _T_119 = and(io.flush_m_up, _T_118) @[el2_lsu_lsc_ctl.scala 211:61] + node _T_120 = eq(_T_119, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 211:45] + node _T_121 = and(io.lsu_p.valid, _T_120) @[el2_lsu_lsc_ctl.scala 211:43] + node _T_122 = or(_T_121, io.dma_dccm_req) @[el2_lsu_lsc_ctl.scala 211:85] + io.lsu_pkt_d.valid <= _T_122 @[el2_lsu_lsc_ctl.scala 211:24] + node _T_123 = eq(io.lsu_pkt_d.dma, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 212:68] + node _T_124 = and(io.flush_m_up, _T_123) @[el2_lsu_lsc_ctl.scala 212:65] + node _T_125 = eq(_T_124, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 212:49] + node _T_126 = and(io.lsu_pkt_d.valid, _T_125) @[el2_lsu_lsc_ctl.scala 212:47] + lsu_pkt_m_in.valid <= _T_126 @[el2_lsu_lsc_ctl.scala 212:24] + node _T_127 = eq(io.lsu_pkt_m.dma, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 213:68] + node _T_128 = and(io.flush_m_up, _T_127) @[el2_lsu_lsc_ctl.scala 213:65] + node _T_129 = eq(_T_128, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 213:49] + node _T_130 = and(io.lsu_pkt_m.valid, _T_129) @[el2_lsu_lsc_ctl.scala 213:47] + lsu_pkt_r_in.valid <= _T_130 @[el2_lsu_lsc_ctl.scala 213:24] + wire _T_131 : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>} @[el2_lsu_lsc_ctl.scala 215:91] + _T_131.valid <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 215:91] + _T_131.store_data_bypass_m <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 215:91] + _T_131.load_ldst_bypass_d <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 215:91] + _T_131.store_data_bypass_d <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 215:91] + _T_131.dma <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 215:91] + _T_131.unsign <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 215:91] + _T_131.store <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 215:91] + _T_131.load <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 215:91] + _T_131.dword <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 215:91] + _T_131.word <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 215:91] + _T_131.half <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 215:91] + _T_131.by <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 215:91] + _T_131.fast_int <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 215:91] + reg _T_132 : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, io.lsu_c1_m_clk with : (reset => (reset, _T_131)) @[el2_lsu_lsc_ctl.scala 215:65] + _T_132.valid <= lsu_pkt_m_in.valid @[el2_lsu_lsc_ctl.scala 215:65] + _T_132.store_data_bypass_m <= lsu_pkt_m_in.store_data_bypass_m @[el2_lsu_lsc_ctl.scala 215:65] + _T_132.load_ldst_bypass_d <= lsu_pkt_m_in.load_ldst_bypass_d @[el2_lsu_lsc_ctl.scala 215:65] + _T_132.store_data_bypass_d <= lsu_pkt_m_in.store_data_bypass_d @[el2_lsu_lsc_ctl.scala 215:65] + _T_132.dma <= lsu_pkt_m_in.dma @[el2_lsu_lsc_ctl.scala 215:65] + _T_132.unsign <= lsu_pkt_m_in.unsign @[el2_lsu_lsc_ctl.scala 215:65] + _T_132.store <= lsu_pkt_m_in.store @[el2_lsu_lsc_ctl.scala 215:65] + _T_132.load <= lsu_pkt_m_in.load @[el2_lsu_lsc_ctl.scala 215:65] + _T_132.dword <= lsu_pkt_m_in.dword @[el2_lsu_lsc_ctl.scala 215:65] + _T_132.word <= lsu_pkt_m_in.word @[el2_lsu_lsc_ctl.scala 215:65] + _T_132.half <= lsu_pkt_m_in.half @[el2_lsu_lsc_ctl.scala 215:65] + _T_132.by <= lsu_pkt_m_in.by @[el2_lsu_lsc_ctl.scala 215:65] + _T_132.fast_int <= lsu_pkt_m_in.fast_int @[el2_lsu_lsc_ctl.scala 215:65] + io.lsu_pkt_m.valid <= _T_132.valid @[el2_lsu_lsc_ctl.scala 215:28] + io.lsu_pkt_m.store_data_bypass_m <= _T_132.store_data_bypass_m @[el2_lsu_lsc_ctl.scala 215:28] + io.lsu_pkt_m.load_ldst_bypass_d <= _T_132.load_ldst_bypass_d @[el2_lsu_lsc_ctl.scala 215:28] + io.lsu_pkt_m.store_data_bypass_d <= _T_132.store_data_bypass_d @[el2_lsu_lsc_ctl.scala 215:28] + io.lsu_pkt_m.dma <= _T_132.dma @[el2_lsu_lsc_ctl.scala 215:28] + io.lsu_pkt_m.unsign <= _T_132.unsign @[el2_lsu_lsc_ctl.scala 215:28] + io.lsu_pkt_m.store <= _T_132.store @[el2_lsu_lsc_ctl.scala 215:28] + io.lsu_pkt_m.load <= _T_132.load @[el2_lsu_lsc_ctl.scala 215:28] + io.lsu_pkt_m.dword <= _T_132.dword @[el2_lsu_lsc_ctl.scala 215:28] + io.lsu_pkt_m.word <= _T_132.word @[el2_lsu_lsc_ctl.scala 215:28] + io.lsu_pkt_m.half <= _T_132.half @[el2_lsu_lsc_ctl.scala 215:28] + io.lsu_pkt_m.by <= _T_132.by @[el2_lsu_lsc_ctl.scala 215:28] + io.lsu_pkt_m.fast_int <= _T_132.fast_int @[el2_lsu_lsc_ctl.scala 215:28] + wire _T_133 : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>} @[el2_lsu_lsc_ctl.scala 216:91] + _T_133.valid <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 216:91] + _T_133.store_data_bypass_m <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 216:91] + _T_133.load_ldst_bypass_d <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 216:91] + _T_133.store_data_bypass_d <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 216:91] + _T_133.dma <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 216:91] + _T_133.unsign <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 216:91] + _T_133.store <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 216:91] + _T_133.load <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 216:91] + _T_133.dword <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 216:91] + _T_133.word <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 216:91] + _T_133.half <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 216:91] + _T_133.by <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 216:91] + _T_133.fast_int <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 216:91] + reg _T_134 : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, io.lsu_c1_r_clk with : (reset => (reset, _T_133)) @[el2_lsu_lsc_ctl.scala 216:65] + _T_134.valid <= lsu_pkt_r_in.valid @[el2_lsu_lsc_ctl.scala 216:65] + _T_134.store_data_bypass_m <= lsu_pkt_r_in.store_data_bypass_m @[el2_lsu_lsc_ctl.scala 216:65] + _T_134.load_ldst_bypass_d <= lsu_pkt_r_in.load_ldst_bypass_d @[el2_lsu_lsc_ctl.scala 216:65] + _T_134.store_data_bypass_d <= lsu_pkt_r_in.store_data_bypass_d @[el2_lsu_lsc_ctl.scala 216:65] + _T_134.dma <= lsu_pkt_r_in.dma @[el2_lsu_lsc_ctl.scala 216:65] + _T_134.unsign <= lsu_pkt_r_in.unsign @[el2_lsu_lsc_ctl.scala 216:65] + _T_134.store <= lsu_pkt_r_in.store @[el2_lsu_lsc_ctl.scala 216:65] + _T_134.load <= lsu_pkt_r_in.load @[el2_lsu_lsc_ctl.scala 216:65] + _T_134.dword <= lsu_pkt_r_in.dword @[el2_lsu_lsc_ctl.scala 216:65] + _T_134.word <= lsu_pkt_r_in.word @[el2_lsu_lsc_ctl.scala 216:65] + _T_134.half <= lsu_pkt_r_in.half @[el2_lsu_lsc_ctl.scala 216:65] + _T_134.by <= lsu_pkt_r_in.by @[el2_lsu_lsc_ctl.scala 216:65] + _T_134.fast_int <= lsu_pkt_r_in.fast_int @[el2_lsu_lsc_ctl.scala 216:65] + io.lsu_pkt_r.valid <= _T_134.valid @[el2_lsu_lsc_ctl.scala 216:28] + io.lsu_pkt_r.store_data_bypass_m <= _T_134.store_data_bypass_m @[el2_lsu_lsc_ctl.scala 216:28] + io.lsu_pkt_r.load_ldst_bypass_d <= _T_134.load_ldst_bypass_d @[el2_lsu_lsc_ctl.scala 216:28] + io.lsu_pkt_r.store_data_bypass_d <= _T_134.store_data_bypass_d @[el2_lsu_lsc_ctl.scala 216:28] + io.lsu_pkt_r.dma <= _T_134.dma @[el2_lsu_lsc_ctl.scala 216:28] + io.lsu_pkt_r.unsign <= _T_134.unsign @[el2_lsu_lsc_ctl.scala 216:28] + io.lsu_pkt_r.store <= _T_134.store @[el2_lsu_lsc_ctl.scala 216:28] + io.lsu_pkt_r.load <= _T_134.load @[el2_lsu_lsc_ctl.scala 216:28] + io.lsu_pkt_r.dword <= _T_134.dword @[el2_lsu_lsc_ctl.scala 216:28] + io.lsu_pkt_r.word <= _T_134.word @[el2_lsu_lsc_ctl.scala 216:28] + io.lsu_pkt_r.half <= _T_134.half @[el2_lsu_lsc_ctl.scala 216:28] + io.lsu_pkt_r.by <= _T_134.by @[el2_lsu_lsc_ctl.scala 216:28] + io.lsu_pkt_r.fast_int <= _T_134.fast_int @[el2_lsu_lsc_ctl.scala 216:28] + reg _T_135 : UInt<1>, io.lsu_c2_m_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_lsc_ctl.scala 217:65] + _T_135 <= lsu_pkt_m_in.valid @[el2_lsu_lsc_ctl.scala 217:65] + io.lsu_pkt_m.valid <= _T_135 @[el2_lsu_lsc_ctl.scala 217:28] + reg _T_136 : UInt<1>, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_lsc_ctl.scala 218:65] + _T_136 <= lsu_pkt_r_in.valid @[el2_lsu_lsc_ctl.scala 218:65] + io.lsu_pkt_r.valid <= _T_136 @[el2_lsu_lsc_ctl.scala 218:28] + node _T_137 = bits(io.dma_mem_wdata, 63, 0) @[el2_lsu_lsc_ctl.scala 220:47] + node _T_138 = bits(io.dma_mem_addr, 2, 0) @[el2_lsu_lsc_ctl.scala 220:76] + node _T_139 = cat(_T_138, UInt<3>("h00")) @[Cat.scala 29:58] + node dma_mem_wdata_shifted = dshr(_T_137, _T_139) @[el2_lsu_lsc_ctl.scala 220:54] + node _T_140 = bits(io.dma_dccm_req, 0, 0) @[el2_lsu_lsc_ctl.scala 221:51] + node _T_141 = bits(dma_mem_wdata_shifted, 31, 0) @[el2_lsu_lsc_ctl.scala 221:79] + node _T_142 = bits(io.exu_lsu_rs2_d, 31, 0) @[el2_lsu_lsc_ctl.scala 221:102] + node store_data_d = mux(_T_140, _T_141, _T_142) @[el2_lsu_lsc_ctl.scala 221:34] + node _T_143 = bits(io.lsu_pkt_d.store_data_bypass_d, 0, 0) @[el2_lsu_lsc_ctl.scala 222:68] + node _T_144 = bits(io.lsu_result_m, 31, 0) @[el2_lsu_lsc_ctl.scala 222:90] + node _T_145 = bits(store_data_d, 31, 0) @[el2_lsu_lsc_ctl.scala 222:109] + node store_data_m_in = mux(_T_143, _T_144, _T_145) @[el2_lsu_lsc_ctl.scala 222:34] + reg store_data_pre_m : UInt, io.lsu_store_c1_m_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_lsc_ctl.scala 224:72] + store_data_pre_m <= store_data_m_in @[el2_lsu_lsc_ctl.scala 224:72] + reg _T_146 : UInt, io.lsu_c1_m_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_lsc_ctl.scala 225:62] + _T_146 <= io.lsu_addr_d @[el2_lsu_lsc_ctl.scala 225:62] + io.lsu_addr_m <= _T_146 @[el2_lsu_lsc_ctl.scala 225:24] + reg _T_147 : UInt, io.lsu_c1_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_lsc_ctl.scala 226:62] + _T_147 <= io.lsu_addr_m @[el2_lsu_lsc_ctl.scala 226:62] + io.lsu_addr_r <= _T_147 @[el2_lsu_lsc_ctl.scala 226:24] + reg _T_148 : UInt, io.lsu_c1_m_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_lsc_ctl.scala 227:62] + _T_148 <= io.end_addr_d @[el2_lsu_lsc_ctl.scala 227:62] + io.end_addr_m <= _T_148 @[el2_lsu_lsc_ctl.scala 227:24] + reg _T_149 : UInt, io.lsu_c1_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_lsc_ctl.scala 228:62] + _T_149 <= io.end_addr_m @[el2_lsu_lsc_ctl.scala 228:62] + io.end_addr_r <= _T_149 @[el2_lsu_lsc_ctl.scala 228:24] + reg _T_150 : UInt, io.lsu_c1_m_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_lsc_ctl.scala 229:62] + _T_150 <= io.addr_in_dccm_d @[el2_lsu_lsc_ctl.scala 229:62] + io.addr_in_dccm_m <= _T_150 @[el2_lsu_lsc_ctl.scala 229:24] + reg _T_151 : UInt, io.lsu_c1_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_lsc_ctl.scala 230:62] + _T_151 <= io.addr_in_dccm_m @[el2_lsu_lsc_ctl.scala 230:62] + io.addr_in_dccm_r <= _T_151 @[el2_lsu_lsc_ctl.scala 230:24] + reg _T_152 : UInt, io.lsu_c1_m_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_lsc_ctl.scala 231:62] + _T_152 <= io.addr_in_pic_d @[el2_lsu_lsc_ctl.scala 231:62] + io.addr_in_pic_m <= _T_152 @[el2_lsu_lsc_ctl.scala 231:24] + reg _T_153 : UInt, io.lsu_c1_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_lsc_ctl.scala 232:62] + _T_153 <= io.addr_in_pic_m @[el2_lsu_lsc_ctl.scala 232:62] + io.addr_in_pic_r <= _T_153 @[el2_lsu_lsc_ctl.scala 232:24] + reg _T_154 : UInt, io.lsu_c1_m_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_lsc_ctl.scala 233:62] + _T_154 <= addrcheck.io.addr_external_d @[el2_lsu_lsc_ctl.scala 233:62] + io.addr_external_m <= _T_154 @[el2_lsu_lsc_ctl.scala 233:24] + reg addr_external_r : UInt, io.lsu_c1_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_lsc_ctl.scala 234:66] + addr_external_r <= io.addr_external_m @[el2_lsu_lsc_ctl.scala 234:66] + reg bus_read_data_r : UInt, io.lsu_c1_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_lsc_ctl.scala 235:66] + bus_read_data_r <= io.bus_read_data_m @[el2_lsu_lsc_ctl.scala 235:66] + node _T_155 = bits(io.lsu_ld_data_corr_r, 31, 1) @[el2_lsu_lsc_ctl.scala 237:52] + io.lsu_fir_addr <= _T_155 @[el2_lsu_lsc_ctl.scala 237:28] + io.lsu_addr_d <= full_addr_d @[el2_lsu_lsc_ctl.scala 239:28] + node _T_156 = or(io.lsu_pkt_r.store, io.lsu_pkt_r.load) @[el2_lsu_lsc_ctl.scala 241:63] + node _T_157 = and(io.lsu_pkt_r.valid, _T_156) @[el2_lsu_lsc_ctl.scala 241:41] + node _T_158 = eq(io.flush_r, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 241:86] + node _T_159 = and(_T_157, _T_158) @[el2_lsu_lsc_ctl.scala 241:84] + node _T_160 = eq(io.lsu_pkt_r.dma, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 241:100] + node _T_161 = and(_T_159, _T_160) @[el2_lsu_lsc_ctl.scala 241:98] + io.lsu_commit_r <= _T_161 @[el2_lsu_lsc_ctl.scala 241:19] + node _T_162 = bits(io.picm_mask_data_m, 31, 0) @[el2_lsu_lsc_ctl.scala 242:52] + node _T_163 = eq(io.addr_in_pic_m, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 242:69] + node _T_164 = bits(_T_163, 0, 0) @[Bitwise.scala 72:15] + node _T_165 = mux(_T_164, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_166 = or(_T_162, _T_165) @[el2_lsu_lsc_ctl.scala 242:59] + node _T_167 = bits(io.lsu_pkt_m.store_data_bypass_m, 0, 0) @[el2_lsu_lsc_ctl.scala 242:128] + node _T_168 = mux(_T_167, io.lsu_result_m, store_data_pre_m) @[el2_lsu_lsc_ctl.scala 242:94] + node _T_169 = and(_T_166, _T_168) @[el2_lsu_lsc_ctl.scala 242:89] + io.store_data_m <= _T_169 @[el2_lsu_lsc_ctl.scala 242:29] + node _T_170 = bits(io.addr_external_m, 0, 0) @[el2_lsu_lsc_ctl.scala 263:53] + node _T_171 = mux(_T_170, io.bus_read_data_m, io.lsu_ld_data_m) @[el2_lsu_lsc_ctl.scala 263:33] + lsu_ld_datafn_m <= _T_171 @[el2_lsu_lsc_ctl.scala 263:27] + node _T_172 = eq(addr_external_r, UInt<1>("h01")) @[el2_lsu_lsc_ctl.scala 264:49] + node _T_173 = mux(_T_172, bus_read_data_r, io.lsu_ld_data_corr_r) @[el2_lsu_lsc_ctl.scala 264:33] + lsu_ld_datafn_corr_r <= _T_173 @[el2_lsu_lsc_ctl.scala 264:27] + node _T_174 = and(io.lsu_pkt_m.unsign, io.lsu_pkt_m.by) @[el2_lsu_lsc_ctl.scala 265:61] + node _T_175 = bits(_T_174, 0, 0) @[Bitwise.scala 72:15] + node _T_176 = mux(_T_175, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_177 = bits(lsu_ld_datafn_m, 7, 0) @[el2_lsu_lsc_ctl.scala 265:115] + node _T_178 = cat(UInt<24>("h00"), _T_177) @[Cat.scala 29:58] + node _T_179 = and(_T_176, _T_178) @[el2_lsu_lsc_ctl.scala 265:84] + node _T_180 = and(io.lsu_pkt_m.unsign, io.lsu_pkt_m.half) @[el2_lsu_lsc_ctl.scala 266:38] + node _T_181 = bits(_T_180, 0, 0) @[Bitwise.scala 72:15] + node _T_182 = mux(_T_181, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_183 = bits(lsu_ld_datafn_m, 15, 0) @[el2_lsu_lsc_ctl.scala 266:92] + node _T_184 = cat(UInt<16>("h00"), _T_183) @[Cat.scala 29:58] + node _T_185 = and(_T_182, _T_184) @[el2_lsu_lsc_ctl.scala 266:61] + node _T_186 = or(_T_179, _T_185) @[el2_lsu_lsc_ctl.scala 265:123] + node _T_187 = eq(io.lsu_pkt_m.unsign, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 267:17] + node _T_188 = and(_T_187, io.lsu_pkt_m.by) @[el2_lsu_lsc_ctl.scala 267:38] + node _T_189 = bits(_T_188, 0, 0) @[Bitwise.scala 72:15] + node _T_190 = mux(_T_189, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_191 = bits(lsu_ld_datafn_m, 7, 7) @[el2_lsu_lsc_ctl.scala 267:92] + node _T_192 = bits(_T_191, 0, 0) @[Bitwise.scala 72:15] + node _T_193 = mux(_T_192, UInt<24>("h0ffffff"), UInt<24>("h00")) @[Bitwise.scala 72:12] + node _T_194 = bits(lsu_ld_datafn_m, 7, 0) @[el2_lsu_lsc_ctl.scala 267:115] + node _T_195 = cat(_T_193, _T_194) @[Cat.scala 29:58] + node _T_196 = and(_T_190, _T_195) @[el2_lsu_lsc_ctl.scala 267:61] + node _T_197 = or(_T_186, _T_196) @[el2_lsu_lsc_ctl.scala 266:104] + node _T_198 = eq(io.lsu_pkt_m.unsign, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 268:17] + node _T_199 = and(_T_198, io.lsu_pkt_m.half) @[el2_lsu_lsc_ctl.scala 268:38] + node _T_200 = bits(_T_199, 0, 0) @[Bitwise.scala 72:15] + node _T_201 = mux(_T_200, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_202 = bits(lsu_ld_datafn_m, 15, 15) @[el2_lsu_lsc_ctl.scala 268:91] + node _T_203 = bits(_T_202, 0, 0) @[Bitwise.scala 72:15] + node _T_204 = mux(_T_203, UInt<16>("h0ffff"), UInt<16>("h00")) @[Bitwise.scala 72:12] + node _T_205 = bits(lsu_ld_datafn_m, 15, 0) @[el2_lsu_lsc_ctl.scala 268:115] + node _T_206 = cat(_T_204, _T_205) @[Cat.scala 29:58] + node _T_207 = and(_T_201, _T_206) @[el2_lsu_lsc_ctl.scala 268:61] + node _T_208 = or(_T_197, _T_207) @[el2_lsu_lsc_ctl.scala 267:124] + node _T_209 = bits(io.lsu_pkt_m.word, 0, 0) @[Bitwise.scala 72:15] + node _T_210 = mux(_T_209, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_211 = bits(lsu_ld_datafn_m, 31, 0) @[el2_lsu_lsc_ctl.scala 269:55] + node _T_212 = and(_T_210, _T_211) @[el2_lsu_lsc_ctl.scala 269:38] + node _T_213 = or(_T_208, _T_212) @[el2_lsu_lsc_ctl.scala 268:124] + io.lsu_result_m <= _T_213 @[el2_lsu_lsc_ctl.scala 265:27] + node _T_214 = and(io.lsu_pkt_r.unsign, io.lsu_pkt_r.by) @[el2_lsu_lsc_ctl.scala 270:61] + node _T_215 = bits(_T_214, 0, 0) @[Bitwise.scala 72:15] + node _T_216 = mux(_T_215, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_217 = bits(lsu_ld_datafn_corr_r, 7, 0) @[el2_lsu_lsc_ctl.scala 270:120] + node _T_218 = cat(UInt<24>("h00"), _T_217) @[Cat.scala 29:58] + node _T_219 = and(_T_216, _T_218) @[el2_lsu_lsc_ctl.scala 270:84] + node _T_220 = and(io.lsu_pkt_r.unsign, io.lsu_pkt_r.half) @[el2_lsu_lsc_ctl.scala 271:38] + node _T_221 = bits(_T_220, 0, 0) @[Bitwise.scala 72:15] + node _T_222 = mux(_T_221, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_223 = bits(lsu_ld_datafn_corr_r, 15, 0) @[el2_lsu_lsc_ctl.scala 271:97] + node _T_224 = cat(UInt<16>("h00"), _T_223) @[Cat.scala 29:58] + node _T_225 = and(_T_222, _T_224) @[el2_lsu_lsc_ctl.scala 271:61] + node _T_226 = or(_T_219, _T_225) @[el2_lsu_lsc_ctl.scala 270:128] + node _T_227 = eq(io.lsu_pkt_r.unsign, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 272:17] + node _T_228 = and(_T_227, io.lsu_pkt_r.by) @[el2_lsu_lsc_ctl.scala 272:38] + node _T_229 = bits(_T_228, 0, 0) @[Bitwise.scala 72:15] + node _T_230 = mux(_T_229, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_231 = bits(lsu_ld_datafn_corr_r, 7, 7) @[el2_lsu_lsc_ctl.scala 272:97] + node _T_232 = bits(_T_231, 0, 0) @[Bitwise.scala 72:15] + node _T_233 = mux(_T_232, UInt<24>("h0ffffff"), UInt<24>("h00")) @[Bitwise.scala 72:12] + node _T_234 = bits(lsu_ld_datafn_corr_r, 7, 0) @[el2_lsu_lsc_ctl.scala 272:125] + node _T_235 = cat(_T_233, _T_234) @[Cat.scala 29:58] + node _T_236 = and(_T_230, _T_235) @[el2_lsu_lsc_ctl.scala 272:61] + node _T_237 = or(_T_226, _T_236) @[el2_lsu_lsc_ctl.scala 271:109] + node _T_238 = eq(io.lsu_pkt_r.unsign, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 273:17] + node _T_239 = and(_T_238, io.lsu_pkt_r.half) @[el2_lsu_lsc_ctl.scala 273:38] + node _T_240 = bits(_T_239, 0, 0) @[Bitwise.scala 72:15] + node _T_241 = mux(_T_240, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_242 = bits(lsu_ld_datafn_corr_r, 15, 15) @[el2_lsu_lsc_ctl.scala 273:96] + node _T_243 = bits(_T_242, 0, 0) @[Bitwise.scala 72:15] + node _T_244 = mux(_T_243, UInt<16>("h0ffff"), UInt<16>("h00")) @[Bitwise.scala 72:12] + node _T_245 = bits(lsu_ld_datafn_corr_r, 15, 0) @[el2_lsu_lsc_ctl.scala 273:125] + node _T_246 = cat(_T_244, _T_245) @[Cat.scala 29:58] + node _T_247 = and(_T_241, _T_246) @[el2_lsu_lsc_ctl.scala 273:61] + node _T_248 = or(_T_237, _T_247) @[el2_lsu_lsc_ctl.scala 272:134] + node _T_249 = bits(io.lsu_pkt_r.word, 0, 0) @[Bitwise.scala 72:15] + node _T_250 = mux(_T_249, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_251 = bits(lsu_ld_datafn_corr_r, 31, 0) @[el2_lsu_lsc_ctl.scala 274:60] + node _T_252 = and(_T_250, _T_251) @[el2_lsu_lsc_ctl.scala 274:38] + node _T_253 = or(_T_248, _T_252) @[el2_lsu_lsc_ctl.scala 273:134] + io.lsu_result_corr_r <= _T_253 @[el2_lsu_lsc_ctl.scala 270:27] + + extmodule TEC_RV_ICG : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + extmodule TEC_RV_ICG_1 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_1 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_1 @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + module el2_lsu_dccm_ctl : + input clock : Clock + input reset : AsyncReset + output io : {flip lsu_c2_m_clk : Clock, flip lsu_c2_r_clk : Clock, flip lsu_free_c2_clk : Clock, flip lsu_c1_r_clk : Clock, flip lsu_store_c1_r_clk : Clock, flip lsu_pkt_d : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip lsu_pkt_m : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip lsu_pkt_r : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip addr_in_dccm_d : UInt<1>, flip addr_in_dccm_m : UInt<1>, flip addr_in_dccm_r : UInt<1>, flip addr_in_pic_d : UInt<1>, flip addr_in_pic_m : UInt<1>, flip addr_in_pic_r : UInt<1>, flip lsu_raw_fwd_lo_r : UInt<1>, flip lsu_raw_fwd_hi_r : UInt<1>, flip lsu_commit_r : UInt<1>, flip lsu_addr_d : UInt<32>, flip lsu_addr_m : UInt<16>, flip lsu_addr_r : UInt<32>, flip end_addr_d : UInt<16>, flip end_addr_m : UInt<16>, flip end_addr_r : UInt<16>, flip stbuf_reqvld_any : UInt<1>, flip stbuf_addr_any : UInt<16>, flip stbuf_data_any : UInt<32>, flip stbuf_ecc_any : UInt<7>, flip stbuf_fwddata_hi_m : UInt<32>, flip stbuf_fwddata_lo_m : UInt<32>, flip stbuf_fwdbyteen_lo_m : UInt<4>, flip stbuf_fwdbyteen_hi_m : UInt<4>, dccm_rdata_hi_r : UInt<32>, dccm_rdata_lo_r : UInt<32>, dccm_data_ecc_hi_r : UInt<7>, dccm_data_ecc_lo_r : UInt<7>, lsu_ld_data_r : UInt<32>, lsu_ld_data_corr_r : UInt<32>, flip lsu_double_ecc_error_r : UInt<1>, flip single_ecc_error_hi_r : UInt<1>, flip single_ecc_error_lo_r : UInt<1>, flip sec_data_hi_r : UInt<32>, flip sec_data_lo_r : UInt<32>, flip sec_data_hi_r_ff : UInt<32>, flip sec_data_lo_r_ff : UInt<32>, flip sec_data_ecc_hi_r_ff : UInt<7>, flip sec_data_ecc_lo_r_ff : UInt<7>, dccm_rdata_hi_m : UInt<32>, dccm_rdata_lo_m : UInt<32>, dccm_data_ecc_hi_m : UInt<7>, dccm_data_ecc_lo_m : UInt<7>, lsu_ld_data_m : UInt<32>, flip lsu_double_ecc_error_m : UInt<1>, flip sec_data_hi_m : UInt<32>, flip sec_data_lo_m : UInt<32>, flip store_data_m : UInt<32>, flip dma_dccm_wen : UInt<1>, flip dma_pic_wen : UInt<1>, flip dma_mem_tag_m : UInt<3>, flip dma_mem_addr : UInt<32>, flip dma_mem_wdata : UInt<64>, flip dma_dccm_wdata_lo : UInt<32>, flip dma_dccm_wdata_hi : UInt<32>, flip dma_dccm_wdata_ecc_hi : UInt<7>, flip dma_dccm_wdata_ecc_lo : UInt<7>, store_data_hi_r : UInt<32>, store_data_lo_r : UInt<32>, store_datafn_hi_r : UInt<32>, store_datafn_lo_r : UInt<32>, store_data_r : UInt<32>, ld_single_ecc_error_r : UInt<1>, ld_single_ecc_error_r_ff : UInt<1>, picm_mask_data_m : UInt<32>, lsu_stbuf_commit_any : UInt<1>, lsu_dccm_rden_m : UInt<1>, lsu_dccm_rden_r : UInt<1>, dccm_dma_rvalid : UInt<1>, dccm_dma_ecc_error : UInt<1>, dccm_dma_rtag : UInt<3>, dccm_dma_rdata : UInt<64>, dccm_wren : UInt<1>, dccm_rden : UInt<1>, dccm_wr_addr_lo : UInt<16>, dccm_wr_data_lo : UInt<39>, dccm_rd_addr_lo : UInt<16>, flip dccm_rd_data_lo : UInt<39>, dccm_wr_addr_hi : UInt<16>, dccm_wr_data_hi : UInt<39>, dccm_rd_addr_hi : UInt<16>, flip dccm_rd_data_hi : UInt<39>, picm_wren : UInt<1>, picm_rden : UInt<1>, picm_mken : UInt<1>, picm_rdaddr : UInt<32>, picm_wraddr : UInt<32>, picm_wr_data : UInt<32>, flip picm_rd_data : UInt<32>, flip scan_mode : UInt<1>} + + node picm_rd_data_m = cat(io.picm_rd_data, io.picm_rd_data) @[Cat.scala 29:58] + node dccm_rdata_corr_r = cat(io.sec_data_hi_r, io.sec_data_lo_r) @[Cat.scala 29:58] + node dccm_rdata_corr_m = cat(io.sec_data_hi_m, io.sec_data_lo_m) @[Cat.scala 29:58] + node dccm_rdata_r = cat(io.dccm_rdata_hi_r, io.dccm_rdata_lo_r) @[Cat.scala 29:58] + node dccm_rdata_m = cat(io.dccm_rdata_hi_m, io.dccm_rdata_lo_m) @[Cat.scala 29:58] + wire lsu_rdata_r : UInt<64> + lsu_rdata_r <= UInt<1>("h00") + wire lsu_rdata_m : UInt<64> + lsu_rdata_m <= UInt<1>("h00") + wire lsu_rdata_corr_r : UInt<64> + lsu_rdata_corr_r <= UInt<1>("h00") + wire lsu_rdata_corr_m : UInt<64> + lsu_rdata_corr_m <= UInt<1>("h00") + wire stbuf_fwddata_r : UInt<64> + stbuf_fwddata_r <= UInt<1>("h00") + wire stbuf_fwdbyteen_r : UInt<64> + stbuf_fwdbyteen_r <= UInt<1>("h00") + wire picm_rd_data_r_32 : UInt<32> + picm_rd_data_r_32 <= UInt<1>("h00") + wire picm_rd_data_r : UInt<64> + picm_rd_data_r <= UInt<1>("h00") + wire lsu_ld_data_corr_m : UInt<64> + lsu_ld_data_corr_m <= UInt<1>("h00") + node _T = and(io.lsu_pkt_m.valid, io.lsu_pkt_m.load) @[el2_lsu_dccm_ctl.scala 161:50] + node _T_1 = and(_T, io.lsu_pkt_m.dma) @[el2_lsu_dccm_ctl.scala 161:70] + io.dccm_dma_rvalid <= _T_1 @[el2_lsu_dccm_ctl.scala 161:28] + io.dccm_dma_ecc_error <= io.lsu_double_ecc_error_m @[el2_lsu_dccm_ctl.scala 162:28] + io.dccm_dma_rdata <= lsu_rdata_corr_m @[el2_lsu_dccm_ctl.scala 163:28] + io.dccm_dma_rtag <= io.dma_mem_tag_m @[el2_lsu_dccm_ctl.scala 164:28] + io.dccm_rdata_lo_r <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 165:28] + io.dccm_rdata_hi_r <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 166:28] + io.dccm_data_ecc_hi_r <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 167:28] + io.dccm_data_ecc_lo_r <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 168:28] + io.lsu_ld_data_r <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 169:28] + reg _T_2 : UInt, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_dccm_ctl.scala 171:65] + _T_2 <= lsu_ld_data_corr_m @[el2_lsu_dccm_ctl.scala 171:65] + io.lsu_ld_data_corr_r <= _T_2 @[el2_lsu_dccm_ctl.scala 171:28] + node _T_3 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_4 = bits(_T_3, 0, 0) @[el2_lsu_dccm_ctl.scala 172:134] + node _T_5 = bits(_T_4, 0, 0) @[el2_lsu_dccm_ctl.scala 172:139] + node _T_6 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_7 = bits(_T_6, 7, 0) @[el2_lsu_dccm_ctl.scala 172:196] + node _T_8 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 172:231] + node _T_9 = bits(picm_rd_data_m, 7, 0) @[el2_lsu_dccm_ctl.scala 172:252] + node _T_10 = bits(dccm_rdata_corr_m, 7, 0) @[el2_lsu_dccm_ctl.scala 172:283] + node _T_11 = mux(_T_8, _T_9, _T_10) @[el2_lsu_dccm_ctl.scala 172:213] + node _T_12 = mux(_T_5, _T_7, _T_11) @[el2_lsu_dccm_ctl.scala 172:78] + node _T_13 = shl(UInt<4>("h0f"), 4) @[Bitwise.scala 102:47] + node _T_14 = xor(UInt<8>("h0ff"), _T_13) @[Bitwise.scala 102:21] + node _T_15 = shr(_T_12, 4) @[Bitwise.scala 103:21] + node _T_16 = and(_T_15, _T_14) @[Bitwise.scala 103:31] + node _T_17 = bits(_T_12, 3, 0) @[Bitwise.scala 103:46] + node _T_18 = shl(_T_17, 4) @[Bitwise.scala 103:65] + node _T_19 = not(_T_14) @[Bitwise.scala 103:77] + node _T_20 = and(_T_18, _T_19) @[Bitwise.scala 103:75] + node _T_21 = or(_T_16, _T_20) @[Bitwise.scala 103:39] + node _T_22 = bits(_T_14, 5, 0) @[Bitwise.scala 102:28] + node _T_23 = shl(_T_22, 2) @[Bitwise.scala 102:47] + node _T_24 = xor(_T_14, _T_23) @[Bitwise.scala 102:21] + node _T_25 = shr(_T_21, 2) @[Bitwise.scala 103:21] + node _T_26 = and(_T_25, _T_24) @[Bitwise.scala 103:31] + node _T_27 = bits(_T_21, 5, 0) @[Bitwise.scala 103:46] + node _T_28 = shl(_T_27, 2) @[Bitwise.scala 103:65] + node _T_29 = not(_T_24) @[Bitwise.scala 103:77] + node _T_30 = and(_T_28, _T_29) @[Bitwise.scala 103:75] + node _T_31 = or(_T_26, _T_30) @[Bitwise.scala 103:39] + node _T_32 = bits(_T_24, 6, 0) @[Bitwise.scala 102:28] + node _T_33 = shl(_T_32, 1) @[Bitwise.scala 102:47] + node _T_34 = xor(_T_24, _T_33) @[Bitwise.scala 102:21] + node _T_35 = shr(_T_31, 1) @[Bitwise.scala 103:21] + node _T_36 = and(_T_35, _T_34) @[Bitwise.scala 103:31] + node _T_37 = bits(_T_31, 6, 0) @[Bitwise.scala 103:46] + node _T_38 = shl(_T_37, 1) @[Bitwise.scala 103:65] + node _T_39 = not(_T_34) @[Bitwise.scala 103:77] + node _T_40 = and(_T_38, _T_39) @[Bitwise.scala 103:75] + node _T_41 = or(_T_36, _T_40) @[Bitwise.scala 103:39] + node _T_42 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_43 = bits(_T_42, 1, 1) @[el2_lsu_dccm_ctl.scala 172:134] + node _T_44 = bits(_T_43, 0, 0) @[el2_lsu_dccm_ctl.scala 172:139] + node _T_45 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_46 = bits(_T_45, 15, 8) @[el2_lsu_dccm_ctl.scala 172:196] + node _T_47 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 172:231] + node _T_48 = bits(picm_rd_data_m, 15, 8) @[el2_lsu_dccm_ctl.scala 172:252] + node _T_49 = bits(dccm_rdata_corr_m, 15, 8) @[el2_lsu_dccm_ctl.scala 172:283] + node _T_50 = mux(_T_47, _T_48, _T_49) @[el2_lsu_dccm_ctl.scala 172:213] + node _T_51 = mux(_T_44, _T_46, _T_50) @[el2_lsu_dccm_ctl.scala 172:78] + node _T_52 = shl(UInt<4>("h0f"), 4) @[Bitwise.scala 102:47] + node _T_53 = xor(UInt<8>("h0ff"), _T_52) @[Bitwise.scala 102:21] + node _T_54 = shr(_T_51, 4) @[Bitwise.scala 103:21] + node _T_55 = and(_T_54, _T_53) @[Bitwise.scala 103:31] + node _T_56 = bits(_T_51, 3, 0) @[Bitwise.scala 103:46] + node _T_57 = shl(_T_56, 4) @[Bitwise.scala 103:65] + node _T_58 = not(_T_53) @[Bitwise.scala 103:77] + node _T_59 = and(_T_57, _T_58) @[Bitwise.scala 103:75] + node _T_60 = or(_T_55, _T_59) @[Bitwise.scala 103:39] + node _T_61 = bits(_T_53, 5, 0) @[Bitwise.scala 102:28] + node _T_62 = shl(_T_61, 2) @[Bitwise.scala 102:47] + node _T_63 = xor(_T_53, _T_62) @[Bitwise.scala 102:21] + node _T_64 = shr(_T_60, 2) @[Bitwise.scala 103:21] + node _T_65 = and(_T_64, _T_63) @[Bitwise.scala 103:31] + node _T_66 = bits(_T_60, 5, 0) @[Bitwise.scala 103:46] + node _T_67 = shl(_T_66, 2) @[Bitwise.scala 103:65] + node _T_68 = not(_T_63) @[Bitwise.scala 103:77] + node _T_69 = and(_T_67, _T_68) @[Bitwise.scala 103:75] + node _T_70 = or(_T_65, _T_69) @[Bitwise.scala 103:39] + node _T_71 = bits(_T_63, 6, 0) @[Bitwise.scala 102:28] + node _T_72 = shl(_T_71, 1) @[Bitwise.scala 102:47] + node _T_73 = xor(_T_63, _T_72) @[Bitwise.scala 102:21] + node _T_74 = shr(_T_70, 1) @[Bitwise.scala 103:21] + node _T_75 = and(_T_74, _T_73) @[Bitwise.scala 103:31] + node _T_76 = bits(_T_70, 6, 0) @[Bitwise.scala 103:46] + node _T_77 = shl(_T_76, 1) @[Bitwise.scala 103:65] + node _T_78 = not(_T_73) @[Bitwise.scala 103:77] + node _T_79 = and(_T_77, _T_78) @[Bitwise.scala 103:75] + node _T_80 = or(_T_75, _T_79) @[Bitwise.scala 103:39] + node _T_81 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_82 = bits(_T_81, 2, 2) @[el2_lsu_dccm_ctl.scala 172:134] + node _T_83 = bits(_T_82, 0, 0) @[el2_lsu_dccm_ctl.scala 172:139] + node _T_84 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_85 = bits(_T_84, 23, 16) @[el2_lsu_dccm_ctl.scala 172:196] + node _T_86 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 172:231] + node _T_87 = bits(picm_rd_data_m, 23, 16) @[el2_lsu_dccm_ctl.scala 172:252] + node _T_88 = bits(dccm_rdata_corr_m, 23, 16) @[el2_lsu_dccm_ctl.scala 172:283] + node _T_89 = mux(_T_86, _T_87, _T_88) @[el2_lsu_dccm_ctl.scala 172:213] + node _T_90 = mux(_T_83, _T_85, _T_89) @[el2_lsu_dccm_ctl.scala 172:78] + node _T_91 = shl(UInt<4>("h0f"), 4) @[Bitwise.scala 102:47] + node _T_92 = xor(UInt<8>("h0ff"), _T_91) @[Bitwise.scala 102:21] + node _T_93 = shr(_T_90, 4) @[Bitwise.scala 103:21] + node _T_94 = and(_T_93, _T_92) @[Bitwise.scala 103:31] + node _T_95 = bits(_T_90, 3, 0) @[Bitwise.scala 103:46] + node _T_96 = shl(_T_95, 4) @[Bitwise.scala 103:65] + node _T_97 = not(_T_92) @[Bitwise.scala 103:77] + node _T_98 = and(_T_96, _T_97) @[Bitwise.scala 103:75] + node _T_99 = or(_T_94, _T_98) @[Bitwise.scala 103:39] + node _T_100 = bits(_T_92, 5, 0) @[Bitwise.scala 102:28] + node _T_101 = shl(_T_100, 2) @[Bitwise.scala 102:47] + node _T_102 = xor(_T_92, _T_101) @[Bitwise.scala 102:21] + node _T_103 = shr(_T_99, 2) @[Bitwise.scala 103:21] + node _T_104 = and(_T_103, _T_102) @[Bitwise.scala 103:31] + node _T_105 = bits(_T_99, 5, 0) @[Bitwise.scala 103:46] + node _T_106 = shl(_T_105, 2) @[Bitwise.scala 103:65] + node _T_107 = not(_T_102) @[Bitwise.scala 103:77] + node _T_108 = and(_T_106, _T_107) @[Bitwise.scala 103:75] + node _T_109 = or(_T_104, _T_108) @[Bitwise.scala 103:39] + node _T_110 = bits(_T_102, 6, 0) @[Bitwise.scala 102:28] + node _T_111 = shl(_T_110, 1) @[Bitwise.scala 102:47] + node _T_112 = xor(_T_102, _T_111) @[Bitwise.scala 102:21] + node _T_113 = shr(_T_109, 1) @[Bitwise.scala 103:21] + node _T_114 = and(_T_113, _T_112) @[Bitwise.scala 103:31] + node _T_115 = bits(_T_109, 6, 0) @[Bitwise.scala 103:46] + node _T_116 = shl(_T_115, 1) @[Bitwise.scala 103:65] + node _T_117 = not(_T_112) @[Bitwise.scala 103:77] + node _T_118 = and(_T_116, _T_117) @[Bitwise.scala 103:75] + node _T_119 = or(_T_114, _T_118) @[Bitwise.scala 103:39] + node _T_120 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_121 = bits(_T_120, 3, 3) @[el2_lsu_dccm_ctl.scala 172:134] + node _T_122 = bits(_T_121, 0, 0) @[el2_lsu_dccm_ctl.scala 172:139] + node _T_123 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_124 = bits(_T_123, 31, 24) @[el2_lsu_dccm_ctl.scala 172:196] + node _T_125 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 172:231] + node _T_126 = bits(picm_rd_data_m, 31, 24) @[el2_lsu_dccm_ctl.scala 172:252] + node _T_127 = bits(dccm_rdata_corr_m, 31, 24) @[el2_lsu_dccm_ctl.scala 172:283] + node _T_128 = mux(_T_125, _T_126, _T_127) @[el2_lsu_dccm_ctl.scala 172:213] + node _T_129 = mux(_T_122, _T_124, _T_128) @[el2_lsu_dccm_ctl.scala 172:78] + node _T_130 = shl(UInt<4>("h0f"), 4) @[Bitwise.scala 102:47] + node _T_131 = xor(UInt<8>("h0ff"), _T_130) @[Bitwise.scala 102:21] + node _T_132 = shr(_T_129, 4) @[Bitwise.scala 103:21] + node _T_133 = and(_T_132, _T_131) @[Bitwise.scala 103:31] + node _T_134 = bits(_T_129, 3, 0) @[Bitwise.scala 103:46] + node _T_135 = shl(_T_134, 4) @[Bitwise.scala 103:65] + node _T_136 = not(_T_131) @[Bitwise.scala 103:77] + node _T_137 = and(_T_135, _T_136) @[Bitwise.scala 103:75] + node _T_138 = or(_T_133, _T_137) @[Bitwise.scala 103:39] + node _T_139 = bits(_T_131, 5, 0) @[Bitwise.scala 102:28] + node _T_140 = shl(_T_139, 2) @[Bitwise.scala 102:47] + node _T_141 = xor(_T_131, _T_140) @[Bitwise.scala 102:21] + node _T_142 = shr(_T_138, 2) @[Bitwise.scala 103:21] + node _T_143 = and(_T_142, _T_141) @[Bitwise.scala 103:31] + node _T_144 = bits(_T_138, 5, 0) @[Bitwise.scala 103:46] + node _T_145 = shl(_T_144, 2) @[Bitwise.scala 103:65] + node _T_146 = not(_T_141) @[Bitwise.scala 103:77] + node _T_147 = and(_T_145, _T_146) @[Bitwise.scala 103:75] + node _T_148 = or(_T_143, _T_147) @[Bitwise.scala 103:39] + node _T_149 = bits(_T_141, 6, 0) @[Bitwise.scala 102:28] + node _T_150 = shl(_T_149, 1) @[Bitwise.scala 102:47] + node _T_151 = xor(_T_141, _T_150) @[Bitwise.scala 102:21] + node _T_152 = shr(_T_148, 1) @[Bitwise.scala 103:21] + node _T_153 = and(_T_152, _T_151) @[Bitwise.scala 103:31] + node _T_154 = bits(_T_148, 6, 0) @[Bitwise.scala 103:46] + node _T_155 = shl(_T_154, 1) @[Bitwise.scala 103:65] + node _T_156 = not(_T_151) @[Bitwise.scala 103:77] + node _T_157 = and(_T_155, _T_156) @[Bitwise.scala 103:75] + node _T_158 = or(_T_153, _T_157) @[Bitwise.scala 103:39] + node _T_159 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_160 = bits(_T_159, 4, 4) @[el2_lsu_dccm_ctl.scala 172:134] + node _T_161 = bits(_T_160, 0, 0) @[el2_lsu_dccm_ctl.scala 172:139] + node _T_162 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_163 = bits(_T_162, 39, 32) @[el2_lsu_dccm_ctl.scala 172:196] + node _T_164 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 172:231] + node _T_165 = bits(picm_rd_data_m, 39, 32) @[el2_lsu_dccm_ctl.scala 172:252] + node _T_166 = bits(dccm_rdata_corr_m, 39, 32) @[el2_lsu_dccm_ctl.scala 172:283] + node _T_167 = mux(_T_164, _T_165, _T_166) @[el2_lsu_dccm_ctl.scala 172:213] + node _T_168 = mux(_T_161, _T_163, _T_167) @[el2_lsu_dccm_ctl.scala 172:78] + node _T_169 = shl(UInt<4>("h0f"), 4) @[Bitwise.scala 102:47] + node _T_170 = xor(UInt<8>("h0ff"), _T_169) @[Bitwise.scala 102:21] + node _T_171 = shr(_T_168, 4) @[Bitwise.scala 103:21] + node _T_172 = and(_T_171, _T_170) @[Bitwise.scala 103:31] + node _T_173 = bits(_T_168, 3, 0) @[Bitwise.scala 103:46] + node _T_174 = shl(_T_173, 4) @[Bitwise.scala 103:65] + node _T_175 = not(_T_170) @[Bitwise.scala 103:77] + node _T_176 = and(_T_174, _T_175) @[Bitwise.scala 103:75] + node _T_177 = or(_T_172, _T_176) @[Bitwise.scala 103:39] + node _T_178 = bits(_T_170, 5, 0) @[Bitwise.scala 102:28] + node _T_179 = shl(_T_178, 2) @[Bitwise.scala 102:47] + node _T_180 = xor(_T_170, _T_179) @[Bitwise.scala 102:21] + node _T_181 = shr(_T_177, 2) @[Bitwise.scala 103:21] + node _T_182 = and(_T_181, _T_180) @[Bitwise.scala 103:31] + node _T_183 = bits(_T_177, 5, 0) @[Bitwise.scala 103:46] + node _T_184 = shl(_T_183, 2) @[Bitwise.scala 103:65] + node _T_185 = not(_T_180) @[Bitwise.scala 103:77] + node _T_186 = and(_T_184, _T_185) @[Bitwise.scala 103:75] + node _T_187 = or(_T_182, _T_186) @[Bitwise.scala 103:39] + node _T_188 = bits(_T_180, 6, 0) @[Bitwise.scala 102:28] + node _T_189 = shl(_T_188, 1) @[Bitwise.scala 102:47] + node _T_190 = xor(_T_180, _T_189) @[Bitwise.scala 102:21] + node _T_191 = shr(_T_187, 1) @[Bitwise.scala 103:21] + node _T_192 = and(_T_191, _T_190) @[Bitwise.scala 103:31] + node _T_193 = bits(_T_187, 6, 0) @[Bitwise.scala 103:46] + node _T_194 = shl(_T_193, 1) @[Bitwise.scala 103:65] + node _T_195 = not(_T_190) @[Bitwise.scala 103:77] + node _T_196 = and(_T_194, _T_195) @[Bitwise.scala 103:75] + node _T_197 = or(_T_192, _T_196) @[Bitwise.scala 103:39] + node _T_198 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_199 = bits(_T_198, 5, 5) @[el2_lsu_dccm_ctl.scala 172:134] + node _T_200 = bits(_T_199, 0, 0) @[el2_lsu_dccm_ctl.scala 172:139] + node _T_201 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_202 = bits(_T_201, 47, 40) @[el2_lsu_dccm_ctl.scala 172:196] + node _T_203 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 172:231] + node _T_204 = bits(picm_rd_data_m, 47, 40) @[el2_lsu_dccm_ctl.scala 172:252] + node _T_205 = bits(dccm_rdata_corr_m, 47, 40) @[el2_lsu_dccm_ctl.scala 172:283] + node _T_206 = mux(_T_203, _T_204, _T_205) @[el2_lsu_dccm_ctl.scala 172:213] + node _T_207 = mux(_T_200, _T_202, _T_206) @[el2_lsu_dccm_ctl.scala 172:78] + node _T_208 = shl(UInt<4>("h0f"), 4) @[Bitwise.scala 102:47] + node _T_209 = xor(UInt<8>("h0ff"), _T_208) @[Bitwise.scala 102:21] + node _T_210 = shr(_T_207, 4) @[Bitwise.scala 103:21] + node _T_211 = and(_T_210, _T_209) @[Bitwise.scala 103:31] + node _T_212 = bits(_T_207, 3, 0) @[Bitwise.scala 103:46] + node _T_213 = shl(_T_212, 4) @[Bitwise.scala 103:65] + node _T_214 = not(_T_209) @[Bitwise.scala 103:77] + node _T_215 = and(_T_213, _T_214) @[Bitwise.scala 103:75] + node _T_216 = or(_T_211, _T_215) @[Bitwise.scala 103:39] + node _T_217 = bits(_T_209, 5, 0) @[Bitwise.scala 102:28] + node _T_218 = shl(_T_217, 2) @[Bitwise.scala 102:47] + node _T_219 = xor(_T_209, _T_218) @[Bitwise.scala 102:21] + node _T_220 = shr(_T_216, 2) @[Bitwise.scala 103:21] + node _T_221 = and(_T_220, _T_219) @[Bitwise.scala 103:31] + node _T_222 = bits(_T_216, 5, 0) @[Bitwise.scala 103:46] + node _T_223 = shl(_T_222, 2) @[Bitwise.scala 103:65] + node _T_224 = not(_T_219) @[Bitwise.scala 103:77] + node _T_225 = and(_T_223, _T_224) @[Bitwise.scala 103:75] + node _T_226 = or(_T_221, _T_225) @[Bitwise.scala 103:39] + node _T_227 = bits(_T_219, 6, 0) @[Bitwise.scala 102:28] + node _T_228 = shl(_T_227, 1) @[Bitwise.scala 102:47] + node _T_229 = xor(_T_219, _T_228) @[Bitwise.scala 102:21] + node _T_230 = shr(_T_226, 1) @[Bitwise.scala 103:21] + node _T_231 = and(_T_230, _T_229) @[Bitwise.scala 103:31] + node _T_232 = bits(_T_226, 6, 0) @[Bitwise.scala 103:46] + node _T_233 = shl(_T_232, 1) @[Bitwise.scala 103:65] + node _T_234 = not(_T_229) @[Bitwise.scala 103:77] + node _T_235 = and(_T_233, _T_234) @[Bitwise.scala 103:75] + node _T_236 = or(_T_231, _T_235) @[Bitwise.scala 103:39] + node _T_237 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_238 = bits(_T_237, 6, 6) @[el2_lsu_dccm_ctl.scala 172:134] + node _T_239 = bits(_T_238, 0, 0) @[el2_lsu_dccm_ctl.scala 172:139] + node _T_240 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_241 = bits(_T_240, 55, 48) @[el2_lsu_dccm_ctl.scala 172:196] + node _T_242 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 172:231] + node _T_243 = bits(picm_rd_data_m, 55, 48) @[el2_lsu_dccm_ctl.scala 172:252] + node _T_244 = bits(dccm_rdata_corr_m, 55, 48) @[el2_lsu_dccm_ctl.scala 172:283] + node _T_245 = mux(_T_242, _T_243, _T_244) @[el2_lsu_dccm_ctl.scala 172:213] + node _T_246 = mux(_T_239, _T_241, _T_245) @[el2_lsu_dccm_ctl.scala 172:78] + node _T_247 = shl(UInt<4>("h0f"), 4) @[Bitwise.scala 102:47] + node _T_248 = xor(UInt<8>("h0ff"), _T_247) @[Bitwise.scala 102:21] + node _T_249 = shr(_T_246, 4) @[Bitwise.scala 103:21] + node _T_250 = and(_T_249, _T_248) @[Bitwise.scala 103:31] + node _T_251 = bits(_T_246, 3, 0) @[Bitwise.scala 103:46] + node _T_252 = shl(_T_251, 4) @[Bitwise.scala 103:65] + node _T_253 = not(_T_248) @[Bitwise.scala 103:77] + node _T_254 = and(_T_252, _T_253) @[Bitwise.scala 103:75] + node _T_255 = or(_T_250, _T_254) @[Bitwise.scala 103:39] + node _T_256 = bits(_T_248, 5, 0) @[Bitwise.scala 102:28] + node _T_257 = shl(_T_256, 2) @[Bitwise.scala 102:47] + node _T_258 = xor(_T_248, _T_257) @[Bitwise.scala 102:21] + node _T_259 = shr(_T_255, 2) @[Bitwise.scala 103:21] + node _T_260 = and(_T_259, _T_258) @[Bitwise.scala 103:31] + node _T_261 = bits(_T_255, 5, 0) @[Bitwise.scala 103:46] + node _T_262 = shl(_T_261, 2) @[Bitwise.scala 103:65] + node _T_263 = not(_T_258) @[Bitwise.scala 103:77] + node _T_264 = and(_T_262, _T_263) @[Bitwise.scala 103:75] + node _T_265 = or(_T_260, _T_264) @[Bitwise.scala 103:39] + node _T_266 = bits(_T_258, 6, 0) @[Bitwise.scala 102:28] + node _T_267 = shl(_T_266, 1) @[Bitwise.scala 102:47] + node _T_268 = xor(_T_258, _T_267) @[Bitwise.scala 102:21] + node _T_269 = shr(_T_265, 1) @[Bitwise.scala 103:21] + node _T_270 = and(_T_269, _T_268) @[Bitwise.scala 103:31] + node _T_271 = bits(_T_265, 6, 0) @[Bitwise.scala 103:46] + node _T_272 = shl(_T_271, 1) @[Bitwise.scala 103:65] + node _T_273 = not(_T_268) @[Bitwise.scala 103:77] + node _T_274 = and(_T_272, _T_273) @[Bitwise.scala 103:75] + node _T_275 = or(_T_270, _T_274) @[Bitwise.scala 103:39] + node _T_276 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_277 = bits(_T_276, 7, 7) @[el2_lsu_dccm_ctl.scala 172:134] + node _T_278 = bits(_T_277, 0, 0) @[el2_lsu_dccm_ctl.scala 172:139] + node _T_279 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_280 = bits(_T_279, 63, 56) @[el2_lsu_dccm_ctl.scala 172:196] + node _T_281 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 172:231] + node _T_282 = bits(picm_rd_data_m, 63, 56) @[el2_lsu_dccm_ctl.scala 172:252] + node _T_283 = bits(dccm_rdata_corr_m, 63, 56) @[el2_lsu_dccm_ctl.scala 172:283] + node _T_284 = mux(_T_281, _T_282, _T_283) @[el2_lsu_dccm_ctl.scala 172:213] + node _T_285 = mux(_T_278, _T_280, _T_284) @[el2_lsu_dccm_ctl.scala 172:78] + node _T_286 = shl(UInt<4>("h0f"), 4) @[Bitwise.scala 102:47] + node _T_287 = xor(UInt<8>("h0ff"), _T_286) @[Bitwise.scala 102:21] + node _T_288 = shr(_T_285, 4) @[Bitwise.scala 103:21] + node _T_289 = and(_T_288, _T_287) @[Bitwise.scala 103:31] + node _T_290 = bits(_T_285, 3, 0) @[Bitwise.scala 103:46] + node _T_291 = shl(_T_290, 4) @[Bitwise.scala 103:65] + node _T_292 = not(_T_287) @[Bitwise.scala 103:77] + node _T_293 = and(_T_291, _T_292) @[Bitwise.scala 103:75] + node _T_294 = or(_T_289, _T_293) @[Bitwise.scala 103:39] + node _T_295 = bits(_T_287, 5, 0) @[Bitwise.scala 102:28] + node _T_296 = shl(_T_295, 2) @[Bitwise.scala 102:47] + node _T_297 = xor(_T_287, _T_296) @[Bitwise.scala 102:21] + node _T_298 = shr(_T_294, 2) @[Bitwise.scala 103:21] + node _T_299 = and(_T_298, _T_297) @[Bitwise.scala 103:31] + node _T_300 = bits(_T_294, 5, 0) @[Bitwise.scala 103:46] + node _T_301 = shl(_T_300, 2) @[Bitwise.scala 103:65] + node _T_302 = not(_T_297) @[Bitwise.scala 103:77] + node _T_303 = and(_T_301, _T_302) @[Bitwise.scala 103:75] + node _T_304 = or(_T_299, _T_303) @[Bitwise.scala 103:39] + node _T_305 = bits(_T_297, 6, 0) @[Bitwise.scala 102:28] + node _T_306 = shl(_T_305, 1) @[Bitwise.scala 102:47] + node _T_307 = xor(_T_297, _T_306) @[Bitwise.scala 102:21] + node _T_308 = shr(_T_304, 1) @[Bitwise.scala 103:21] + node _T_309 = and(_T_308, _T_307) @[Bitwise.scala 103:31] + node _T_310 = bits(_T_304, 6, 0) @[Bitwise.scala 103:46] + node _T_311 = shl(_T_310, 1) @[Bitwise.scala 103:65] + node _T_312 = not(_T_307) @[Bitwise.scala 103:77] + node _T_313 = and(_T_311, _T_312) @[Bitwise.scala 103:75] + node _T_314 = or(_T_309, _T_313) @[Bitwise.scala 103:39] + wire _T_315 : UInt<8>[8] @[el2_lsu_dccm_ctl.scala 172:62] + _T_315[0] <= _T_41 @[el2_lsu_dccm_ctl.scala 172:62] + _T_315[1] <= _T_80 @[el2_lsu_dccm_ctl.scala 172:62] + _T_315[2] <= _T_119 @[el2_lsu_dccm_ctl.scala 172:62] + _T_315[3] <= _T_158 @[el2_lsu_dccm_ctl.scala 172:62] + _T_315[4] <= _T_197 @[el2_lsu_dccm_ctl.scala 172:62] + _T_315[5] <= _T_236 @[el2_lsu_dccm_ctl.scala 172:62] + _T_315[6] <= _T_275 @[el2_lsu_dccm_ctl.scala 172:62] + _T_315[7] <= _T_314 @[el2_lsu_dccm_ctl.scala 172:62] + node _T_316 = cat(_T_315[6], _T_315[7]) @[Cat.scala 29:58] + node _T_317 = cat(_T_315[4], _T_315[5]) @[Cat.scala 29:58] + node _T_318 = cat(_T_317, _T_316) @[Cat.scala 29:58] + node _T_319 = cat(_T_315[2], _T_315[3]) @[Cat.scala 29:58] + node _T_320 = cat(_T_315[0], _T_315[1]) @[Cat.scala 29:58] + node _T_321 = cat(_T_320, _T_319) @[Cat.scala 29:58] + node _T_322 = cat(_T_321, _T_318) @[Cat.scala 29:58] + node _T_323 = shl(UInt<32>("h0ffffffff"), 32) @[Bitwise.scala 102:47] + node _T_324 = xor(UInt<64>("h0ffffffffffffffff"), _T_323) @[Bitwise.scala 102:21] + node _T_325 = shr(_T_322, 32) @[Bitwise.scala 103:21] + node _T_326 = and(_T_325, _T_324) @[Bitwise.scala 103:31] + node _T_327 = bits(_T_322, 31, 0) @[Bitwise.scala 103:46] + node _T_328 = shl(_T_327, 32) @[Bitwise.scala 103:65] + node _T_329 = not(_T_324) @[Bitwise.scala 103:77] + node _T_330 = and(_T_328, _T_329) @[Bitwise.scala 103:75] + node _T_331 = or(_T_326, _T_330) @[Bitwise.scala 103:39] + node _T_332 = bits(_T_324, 47, 0) @[Bitwise.scala 102:28] + node _T_333 = shl(_T_332, 16) @[Bitwise.scala 102:47] + node _T_334 = xor(_T_324, _T_333) @[Bitwise.scala 102:21] + node _T_335 = shr(_T_331, 16) @[Bitwise.scala 103:21] + node _T_336 = and(_T_335, _T_334) @[Bitwise.scala 103:31] + node _T_337 = bits(_T_331, 47, 0) @[Bitwise.scala 103:46] + node _T_338 = shl(_T_337, 16) @[Bitwise.scala 103:65] + node _T_339 = not(_T_334) @[Bitwise.scala 103:77] + node _T_340 = and(_T_338, _T_339) @[Bitwise.scala 103:75] + node _T_341 = or(_T_336, _T_340) @[Bitwise.scala 103:39] + node _T_342 = bits(_T_334, 55, 0) @[Bitwise.scala 102:28] + node _T_343 = shl(_T_342, 8) @[Bitwise.scala 102:47] + node _T_344 = xor(_T_334, _T_343) @[Bitwise.scala 102:21] + node _T_345 = shr(_T_341, 8) @[Bitwise.scala 103:21] + node _T_346 = and(_T_345, _T_344) @[Bitwise.scala 103:31] + node _T_347 = bits(_T_341, 55, 0) @[Bitwise.scala 103:46] + node _T_348 = shl(_T_347, 8) @[Bitwise.scala 103:65] + node _T_349 = not(_T_344) @[Bitwise.scala 103:77] + node _T_350 = and(_T_348, _T_349) @[Bitwise.scala 103:75] + node _T_351 = or(_T_346, _T_350) @[Bitwise.scala 103:39] + node _T_352 = bits(_T_344, 59, 0) @[Bitwise.scala 102:28] + node _T_353 = shl(_T_352, 4) @[Bitwise.scala 102:47] + node _T_354 = xor(_T_344, _T_353) @[Bitwise.scala 102:21] + node _T_355 = shr(_T_351, 4) @[Bitwise.scala 103:21] + node _T_356 = and(_T_355, _T_354) @[Bitwise.scala 103:31] + node _T_357 = bits(_T_351, 59, 0) @[Bitwise.scala 103:46] + node _T_358 = shl(_T_357, 4) @[Bitwise.scala 103:65] + node _T_359 = not(_T_354) @[Bitwise.scala 103:77] + node _T_360 = and(_T_358, _T_359) @[Bitwise.scala 103:75] + node _T_361 = or(_T_356, _T_360) @[Bitwise.scala 103:39] + node _T_362 = bits(_T_354, 61, 0) @[Bitwise.scala 102:28] + node _T_363 = shl(_T_362, 2) @[Bitwise.scala 102:47] + node _T_364 = xor(_T_354, _T_363) @[Bitwise.scala 102:21] + node _T_365 = shr(_T_361, 2) @[Bitwise.scala 103:21] + node _T_366 = and(_T_365, _T_364) @[Bitwise.scala 103:31] + node _T_367 = bits(_T_361, 61, 0) @[Bitwise.scala 103:46] + node _T_368 = shl(_T_367, 2) @[Bitwise.scala 103:65] + node _T_369 = not(_T_364) @[Bitwise.scala 103:77] + node _T_370 = and(_T_368, _T_369) @[Bitwise.scala 103:75] + node _T_371 = or(_T_366, _T_370) @[Bitwise.scala 103:39] + node _T_372 = bits(_T_364, 62, 0) @[Bitwise.scala 102:28] + node _T_373 = shl(_T_372, 1) @[Bitwise.scala 102:47] + node _T_374 = xor(_T_364, _T_373) @[Bitwise.scala 102:21] + node _T_375 = shr(_T_371, 1) @[Bitwise.scala 103:21] + node _T_376 = and(_T_375, _T_374) @[Bitwise.scala 103:31] + node _T_377 = bits(_T_371, 62, 0) @[Bitwise.scala 103:46] + node _T_378 = shl(_T_377, 1) @[Bitwise.scala 103:65] + node _T_379 = not(_T_374) @[Bitwise.scala 103:77] + node _T_380 = and(_T_378, _T_379) @[Bitwise.scala 103:75] + node _T_381 = or(_T_376, _T_380) @[Bitwise.scala 103:39] + lsu_rdata_corr_m <= _T_381 @[el2_lsu_dccm_ctl.scala 172:28] + node _T_382 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_383 = bits(_T_382, 0, 0) @[el2_lsu_dccm_ctl.scala 173:134] + node _T_384 = bits(_T_383, 0, 0) @[el2_lsu_dccm_ctl.scala 173:139] + node _T_385 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_386 = bits(_T_385, 7, 0) @[el2_lsu_dccm_ctl.scala 173:196] + node _T_387 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 173:231] + node _T_388 = bits(picm_rd_data_m, 7, 0) @[el2_lsu_dccm_ctl.scala 173:252] + node _T_389 = bits(dccm_rdata_m, 7, 0) @[el2_lsu_dccm_ctl.scala 173:278] + node _T_390 = mux(_T_387, _T_388, _T_389) @[el2_lsu_dccm_ctl.scala 173:213] + node _T_391 = mux(_T_384, _T_386, _T_390) @[el2_lsu_dccm_ctl.scala 173:78] + node _T_392 = shl(UInt<4>("h0f"), 4) @[Bitwise.scala 102:47] + node _T_393 = xor(UInt<8>("h0ff"), _T_392) @[Bitwise.scala 102:21] + node _T_394 = shr(_T_391, 4) @[Bitwise.scala 103:21] + node _T_395 = and(_T_394, _T_393) @[Bitwise.scala 103:31] + node _T_396 = bits(_T_391, 3, 0) @[Bitwise.scala 103:46] + node _T_397 = shl(_T_396, 4) @[Bitwise.scala 103:65] + node _T_398 = not(_T_393) @[Bitwise.scala 103:77] + node _T_399 = and(_T_397, _T_398) @[Bitwise.scala 103:75] + node _T_400 = or(_T_395, _T_399) @[Bitwise.scala 103:39] + node _T_401 = bits(_T_393, 5, 0) @[Bitwise.scala 102:28] + node _T_402 = shl(_T_401, 2) @[Bitwise.scala 102:47] + node _T_403 = xor(_T_393, _T_402) @[Bitwise.scala 102:21] + node _T_404 = shr(_T_400, 2) @[Bitwise.scala 103:21] + node _T_405 = and(_T_404, _T_403) @[Bitwise.scala 103:31] + node _T_406 = bits(_T_400, 5, 0) @[Bitwise.scala 103:46] + node _T_407 = shl(_T_406, 2) @[Bitwise.scala 103:65] + node _T_408 = not(_T_403) @[Bitwise.scala 103:77] + node _T_409 = and(_T_407, _T_408) @[Bitwise.scala 103:75] + node _T_410 = or(_T_405, _T_409) @[Bitwise.scala 103:39] + node _T_411 = bits(_T_403, 6, 0) @[Bitwise.scala 102:28] + node _T_412 = shl(_T_411, 1) @[Bitwise.scala 102:47] + node _T_413 = xor(_T_403, _T_412) @[Bitwise.scala 102:21] + node _T_414 = shr(_T_410, 1) @[Bitwise.scala 103:21] + node _T_415 = and(_T_414, _T_413) @[Bitwise.scala 103:31] + node _T_416 = bits(_T_410, 6, 0) @[Bitwise.scala 103:46] + node _T_417 = shl(_T_416, 1) @[Bitwise.scala 103:65] + node _T_418 = not(_T_413) @[Bitwise.scala 103:77] + node _T_419 = and(_T_417, _T_418) @[Bitwise.scala 103:75] + node _T_420 = or(_T_415, _T_419) @[Bitwise.scala 103:39] + node _T_421 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_422 = bits(_T_421, 1, 1) @[el2_lsu_dccm_ctl.scala 173:134] + node _T_423 = bits(_T_422, 0, 0) @[el2_lsu_dccm_ctl.scala 173:139] + node _T_424 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_425 = bits(_T_424, 15, 8) @[el2_lsu_dccm_ctl.scala 173:196] + node _T_426 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 173:231] + node _T_427 = bits(picm_rd_data_m, 15, 8) @[el2_lsu_dccm_ctl.scala 173:252] + node _T_428 = bits(dccm_rdata_m, 15, 8) @[el2_lsu_dccm_ctl.scala 173:278] + node _T_429 = mux(_T_426, _T_427, _T_428) @[el2_lsu_dccm_ctl.scala 173:213] + node _T_430 = mux(_T_423, _T_425, _T_429) @[el2_lsu_dccm_ctl.scala 173:78] + node _T_431 = shl(UInt<4>("h0f"), 4) @[Bitwise.scala 102:47] + node _T_432 = xor(UInt<8>("h0ff"), _T_431) @[Bitwise.scala 102:21] + node _T_433 = shr(_T_430, 4) @[Bitwise.scala 103:21] + node _T_434 = and(_T_433, _T_432) @[Bitwise.scala 103:31] + node _T_435 = bits(_T_430, 3, 0) @[Bitwise.scala 103:46] + node _T_436 = shl(_T_435, 4) @[Bitwise.scala 103:65] + node _T_437 = not(_T_432) @[Bitwise.scala 103:77] + node _T_438 = and(_T_436, _T_437) @[Bitwise.scala 103:75] + node _T_439 = or(_T_434, _T_438) @[Bitwise.scala 103:39] + node _T_440 = bits(_T_432, 5, 0) @[Bitwise.scala 102:28] + node _T_441 = shl(_T_440, 2) @[Bitwise.scala 102:47] + node _T_442 = xor(_T_432, _T_441) @[Bitwise.scala 102:21] + node _T_443 = shr(_T_439, 2) @[Bitwise.scala 103:21] + node _T_444 = and(_T_443, _T_442) @[Bitwise.scala 103:31] + node _T_445 = bits(_T_439, 5, 0) @[Bitwise.scala 103:46] + node _T_446 = shl(_T_445, 2) @[Bitwise.scala 103:65] + node _T_447 = not(_T_442) @[Bitwise.scala 103:77] + node _T_448 = and(_T_446, _T_447) @[Bitwise.scala 103:75] + node _T_449 = or(_T_444, _T_448) @[Bitwise.scala 103:39] + node _T_450 = bits(_T_442, 6, 0) @[Bitwise.scala 102:28] + node _T_451 = shl(_T_450, 1) @[Bitwise.scala 102:47] + node _T_452 = xor(_T_442, _T_451) @[Bitwise.scala 102:21] + node _T_453 = shr(_T_449, 1) @[Bitwise.scala 103:21] + node _T_454 = and(_T_453, _T_452) @[Bitwise.scala 103:31] + node _T_455 = bits(_T_449, 6, 0) @[Bitwise.scala 103:46] + node _T_456 = shl(_T_455, 1) @[Bitwise.scala 103:65] + node _T_457 = not(_T_452) @[Bitwise.scala 103:77] + node _T_458 = and(_T_456, _T_457) @[Bitwise.scala 103:75] + node _T_459 = or(_T_454, _T_458) @[Bitwise.scala 103:39] + node _T_460 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_461 = bits(_T_460, 2, 2) @[el2_lsu_dccm_ctl.scala 173:134] + node _T_462 = bits(_T_461, 0, 0) @[el2_lsu_dccm_ctl.scala 173:139] + node _T_463 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_464 = bits(_T_463, 23, 16) @[el2_lsu_dccm_ctl.scala 173:196] + node _T_465 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 173:231] + node _T_466 = bits(picm_rd_data_m, 23, 16) @[el2_lsu_dccm_ctl.scala 173:252] + node _T_467 = bits(dccm_rdata_m, 23, 16) @[el2_lsu_dccm_ctl.scala 173:278] + node _T_468 = mux(_T_465, _T_466, _T_467) @[el2_lsu_dccm_ctl.scala 173:213] + node _T_469 = mux(_T_462, _T_464, _T_468) @[el2_lsu_dccm_ctl.scala 173:78] + node _T_470 = shl(UInt<4>("h0f"), 4) @[Bitwise.scala 102:47] + node _T_471 = xor(UInt<8>("h0ff"), _T_470) @[Bitwise.scala 102:21] + node _T_472 = shr(_T_469, 4) @[Bitwise.scala 103:21] + node _T_473 = and(_T_472, _T_471) @[Bitwise.scala 103:31] + node _T_474 = bits(_T_469, 3, 0) @[Bitwise.scala 103:46] + node _T_475 = shl(_T_474, 4) @[Bitwise.scala 103:65] + node _T_476 = not(_T_471) @[Bitwise.scala 103:77] + node _T_477 = and(_T_475, _T_476) @[Bitwise.scala 103:75] + node _T_478 = or(_T_473, _T_477) @[Bitwise.scala 103:39] + node _T_479 = bits(_T_471, 5, 0) @[Bitwise.scala 102:28] + node _T_480 = shl(_T_479, 2) @[Bitwise.scala 102:47] + node _T_481 = xor(_T_471, _T_480) @[Bitwise.scala 102:21] + node _T_482 = shr(_T_478, 2) @[Bitwise.scala 103:21] + node _T_483 = and(_T_482, _T_481) @[Bitwise.scala 103:31] + node _T_484 = bits(_T_478, 5, 0) @[Bitwise.scala 103:46] + node _T_485 = shl(_T_484, 2) @[Bitwise.scala 103:65] + node _T_486 = not(_T_481) @[Bitwise.scala 103:77] + node _T_487 = and(_T_485, _T_486) @[Bitwise.scala 103:75] + node _T_488 = or(_T_483, _T_487) @[Bitwise.scala 103:39] + node _T_489 = bits(_T_481, 6, 0) @[Bitwise.scala 102:28] + node _T_490 = shl(_T_489, 1) @[Bitwise.scala 102:47] + node _T_491 = xor(_T_481, _T_490) @[Bitwise.scala 102:21] + node _T_492 = shr(_T_488, 1) @[Bitwise.scala 103:21] + node _T_493 = and(_T_492, _T_491) @[Bitwise.scala 103:31] + node _T_494 = bits(_T_488, 6, 0) @[Bitwise.scala 103:46] + node _T_495 = shl(_T_494, 1) @[Bitwise.scala 103:65] + node _T_496 = not(_T_491) @[Bitwise.scala 103:77] + node _T_497 = and(_T_495, _T_496) @[Bitwise.scala 103:75] + node _T_498 = or(_T_493, _T_497) @[Bitwise.scala 103:39] + node _T_499 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_500 = bits(_T_499, 3, 3) @[el2_lsu_dccm_ctl.scala 173:134] + node _T_501 = bits(_T_500, 0, 0) @[el2_lsu_dccm_ctl.scala 173:139] + node _T_502 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_503 = bits(_T_502, 31, 24) @[el2_lsu_dccm_ctl.scala 173:196] + node _T_504 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 173:231] + node _T_505 = bits(picm_rd_data_m, 31, 24) @[el2_lsu_dccm_ctl.scala 173:252] + node _T_506 = bits(dccm_rdata_m, 31, 24) @[el2_lsu_dccm_ctl.scala 173:278] + node _T_507 = mux(_T_504, _T_505, _T_506) @[el2_lsu_dccm_ctl.scala 173:213] + node _T_508 = mux(_T_501, _T_503, _T_507) @[el2_lsu_dccm_ctl.scala 173:78] + node _T_509 = shl(UInt<4>("h0f"), 4) @[Bitwise.scala 102:47] + node _T_510 = xor(UInt<8>("h0ff"), _T_509) @[Bitwise.scala 102:21] + node _T_511 = shr(_T_508, 4) @[Bitwise.scala 103:21] + node _T_512 = and(_T_511, _T_510) @[Bitwise.scala 103:31] + node _T_513 = bits(_T_508, 3, 0) @[Bitwise.scala 103:46] + node _T_514 = shl(_T_513, 4) @[Bitwise.scala 103:65] + node _T_515 = not(_T_510) @[Bitwise.scala 103:77] + node _T_516 = and(_T_514, _T_515) @[Bitwise.scala 103:75] + node _T_517 = or(_T_512, _T_516) @[Bitwise.scala 103:39] + node _T_518 = bits(_T_510, 5, 0) @[Bitwise.scala 102:28] + node _T_519 = shl(_T_518, 2) @[Bitwise.scala 102:47] + node _T_520 = xor(_T_510, _T_519) @[Bitwise.scala 102:21] + node _T_521 = shr(_T_517, 2) @[Bitwise.scala 103:21] + node _T_522 = and(_T_521, _T_520) @[Bitwise.scala 103:31] + node _T_523 = bits(_T_517, 5, 0) @[Bitwise.scala 103:46] + node _T_524 = shl(_T_523, 2) @[Bitwise.scala 103:65] + node _T_525 = not(_T_520) @[Bitwise.scala 103:77] + node _T_526 = and(_T_524, _T_525) @[Bitwise.scala 103:75] + node _T_527 = or(_T_522, _T_526) @[Bitwise.scala 103:39] + node _T_528 = bits(_T_520, 6, 0) @[Bitwise.scala 102:28] + node _T_529 = shl(_T_528, 1) @[Bitwise.scala 102:47] + node _T_530 = xor(_T_520, _T_529) @[Bitwise.scala 102:21] + node _T_531 = shr(_T_527, 1) @[Bitwise.scala 103:21] + node _T_532 = and(_T_531, _T_530) @[Bitwise.scala 103:31] + node _T_533 = bits(_T_527, 6, 0) @[Bitwise.scala 103:46] + node _T_534 = shl(_T_533, 1) @[Bitwise.scala 103:65] + node _T_535 = not(_T_530) @[Bitwise.scala 103:77] + node _T_536 = and(_T_534, _T_535) @[Bitwise.scala 103:75] + node _T_537 = or(_T_532, _T_536) @[Bitwise.scala 103:39] + node _T_538 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_539 = bits(_T_538, 4, 4) @[el2_lsu_dccm_ctl.scala 173:134] + node _T_540 = bits(_T_539, 0, 0) @[el2_lsu_dccm_ctl.scala 173:139] + node _T_541 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_542 = bits(_T_541, 39, 32) @[el2_lsu_dccm_ctl.scala 173:196] + node _T_543 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 173:231] + node _T_544 = bits(picm_rd_data_m, 39, 32) @[el2_lsu_dccm_ctl.scala 173:252] + node _T_545 = bits(dccm_rdata_m, 39, 32) @[el2_lsu_dccm_ctl.scala 173:278] + node _T_546 = mux(_T_543, _T_544, _T_545) @[el2_lsu_dccm_ctl.scala 173:213] + node _T_547 = mux(_T_540, _T_542, _T_546) @[el2_lsu_dccm_ctl.scala 173:78] + node _T_548 = shl(UInt<4>("h0f"), 4) @[Bitwise.scala 102:47] + node _T_549 = xor(UInt<8>("h0ff"), _T_548) @[Bitwise.scala 102:21] + node _T_550 = shr(_T_547, 4) @[Bitwise.scala 103:21] + node _T_551 = and(_T_550, _T_549) @[Bitwise.scala 103:31] + node _T_552 = bits(_T_547, 3, 0) @[Bitwise.scala 103:46] + node _T_553 = shl(_T_552, 4) @[Bitwise.scala 103:65] + node _T_554 = not(_T_549) @[Bitwise.scala 103:77] + node _T_555 = and(_T_553, _T_554) @[Bitwise.scala 103:75] + node _T_556 = or(_T_551, _T_555) @[Bitwise.scala 103:39] + node _T_557 = bits(_T_549, 5, 0) @[Bitwise.scala 102:28] + node _T_558 = shl(_T_557, 2) @[Bitwise.scala 102:47] + node _T_559 = xor(_T_549, _T_558) @[Bitwise.scala 102:21] + node _T_560 = shr(_T_556, 2) @[Bitwise.scala 103:21] + node _T_561 = and(_T_560, _T_559) @[Bitwise.scala 103:31] + node _T_562 = bits(_T_556, 5, 0) @[Bitwise.scala 103:46] + node _T_563 = shl(_T_562, 2) @[Bitwise.scala 103:65] + node _T_564 = not(_T_559) @[Bitwise.scala 103:77] + node _T_565 = and(_T_563, _T_564) @[Bitwise.scala 103:75] + node _T_566 = or(_T_561, _T_565) @[Bitwise.scala 103:39] + node _T_567 = bits(_T_559, 6, 0) @[Bitwise.scala 102:28] + node _T_568 = shl(_T_567, 1) @[Bitwise.scala 102:47] + node _T_569 = xor(_T_559, _T_568) @[Bitwise.scala 102:21] + node _T_570 = shr(_T_566, 1) @[Bitwise.scala 103:21] + node _T_571 = and(_T_570, _T_569) @[Bitwise.scala 103:31] + node _T_572 = bits(_T_566, 6, 0) @[Bitwise.scala 103:46] + node _T_573 = shl(_T_572, 1) @[Bitwise.scala 103:65] + node _T_574 = not(_T_569) @[Bitwise.scala 103:77] + node _T_575 = and(_T_573, _T_574) @[Bitwise.scala 103:75] + node _T_576 = or(_T_571, _T_575) @[Bitwise.scala 103:39] + node _T_577 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_578 = bits(_T_577, 5, 5) @[el2_lsu_dccm_ctl.scala 173:134] + node _T_579 = bits(_T_578, 0, 0) @[el2_lsu_dccm_ctl.scala 173:139] + node _T_580 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_581 = bits(_T_580, 47, 40) @[el2_lsu_dccm_ctl.scala 173:196] + node _T_582 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 173:231] + node _T_583 = bits(picm_rd_data_m, 47, 40) @[el2_lsu_dccm_ctl.scala 173:252] + node _T_584 = bits(dccm_rdata_m, 47, 40) @[el2_lsu_dccm_ctl.scala 173:278] + node _T_585 = mux(_T_582, _T_583, _T_584) @[el2_lsu_dccm_ctl.scala 173:213] + node _T_586 = mux(_T_579, _T_581, _T_585) @[el2_lsu_dccm_ctl.scala 173:78] + node _T_587 = shl(UInt<4>("h0f"), 4) @[Bitwise.scala 102:47] + node _T_588 = xor(UInt<8>("h0ff"), _T_587) @[Bitwise.scala 102:21] + node _T_589 = shr(_T_586, 4) @[Bitwise.scala 103:21] + node _T_590 = and(_T_589, _T_588) @[Bitwise.scala 103:31] + node _T_591 = bits(_T_586, 3, 0) @[Bitwise.scala 103:46] + node _T_592 = shl(_T_591, 4) @[Bitwise.scala 103:65] + node _T_593 = not(_T_588) @[Bitwise.scala 103:77] + node _T_594 = and(_T_592, _T_593) @[Bitwise.scala 103:75] + node _T_595 = or(_T_590, _T_594) @[Bitwise.scala 103:39] + node _T_596 = bits(_T_588, 5, 0) @[Bitwise.scala 102:28] + node _T_597 = shl(_T_596, 2) @[Bitwise.scala 102:47] + node _T_598 = xor(_T_588, _T_597) @[Bitwise.scala 102:21] + node _T_599 = shr(_T_595, 2) @[Bitwise.scala 103:21] + node _T_600 = and(_T_599, _T_598) @[Bitwise.scala 103:31] + node _T_601 = bits(_T_595, 5, 0) @[Bitwise.scala 103:46] + node _T_602 = shl(_T_601, 2) @[Bitwise.scala 103:65] + node _T_603 = not(_T_598) @[Bitwise.scala 103:77] + node _T_604 = and(_T_602, _T_603) @[Bitwise.scala 103:75] + node _T_605 = or(_T_600, _T_604) @[Bitwise.scala 103:39] + node _T_606 = bits(_T_598, 6, 0) @[Bitwise.scala 102:28] + node _T_607 = shl(_T_606, 1) @[Bitwise.scala 102:47] + node _T_608 = xor(_T_598, _T_607) @[Bitwise.scala 102:21] + node _T_609 = shr(_T_605, 1) @[Bitwise.scala 103:21] + node _T_610 = and(_T_609, _T_608) @[Bitwise.scala 103:31] + node _T_611 = bits(_T_605, 6, 0) @[Bitwise.scala 103:46] + node _T_612 = shl(_T_611, 1) @[Bitwise.scala 103:65] + node _T_613 = not(_T_608) @[Bitwise.scala 103:77] + node _T_614 = and(_T_612, _T_613) @[Bitwise.scala 103:75] + node _T_615 = or(_T_610, _T_614) @[Bitwise.scala 103:39] + node _T_616 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_617 = bits(_T_616, 6, 6) @[el2_lsu_dccm_ctl.scala 173:134] + node _T_618 = bits(_T_617, 0, 0) @[el2_lsu_dccm_ctl.scala 173:139] + node _T_619 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_620 = bits(_T_619, 55, 48) @[el2_lsu_dccm_ctl.scala 173:196] + node _T_621 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 173:231] + node _T_622 = bits(picm_rd_data_m, 55, 48) @[el2_lsu_dccm_ctl.scala 173:252] + node _T_623 = bits(dccm_rdata_m, 55, 48) @[el2_lsu_dccm_ctl.scala 173:278] + node _T_624 = mux(_T_621, _T_622, _T_623) @[el2_lsu_dccm_ctl.scala 173:213] + node _T_625 = mux(_T_618, _T_620, _T_624) @[el2_lsu_dccm_ctl.scala 173:78] + node _T_626 = shl(UInt<4>("h0f"), 4) @[Bitwise.scala 102:47] + node _T_627 = xor(UInt<8>("h0ff"), _T_626) @[Bitwise.scala 102:21] + node _T_628 = shr(_T_625, 4) @[Bitwise.scala 103:21] + node _T_629 = and(_T_628, _T_627) @[Bitwise.scala 103:31] + node _T_630 = bits(_T_625, 3, 0) @[Bitwise.scala 103:46] + node _T_631 = shl(_T_630, 4) @[Bitwise.scala 103:65] + node _T_632 = not(_T_627) @[Bitwise.scala 103:77] + node _T_633 = and(_T_631, _T_632) @[Bitwise.scala 103:75] + node _T_634 = or(_T_629, _T_633) @[Bitwise.scala 103:39] + node _T_635 = bits(_T_627, 5, 0) @[Bitwise.scala 102:28] + node _T_636 = shl(_T_635, 2) @[Bitwise.scala 102:47] + node _T_637 = xor(_T_627, _T_636) @[Bitwise.scala 102:21] + node _T_638 = shr(_T_634, 2) @[Bitwise.scala 103:21] + node _T_639 = and(_T_638, _T_637) @[Bitwise.scala 103:31] + node _T_640 = bits(_T_634, 5, 0) @[Bitwise.scala 103:46] + node _T_641 = shl(_T_640, 2) @[Bitwise.scala 103:65] + node _T_642 = not(_T_637) @[Bitwise.scala 103:77] + node _T_643 = and(_T_641, _T_642) @[Bitwise.scala 103:75] + node _T_644 = or(_T_639, _T_643) @[Bitwise.scala 103:39] + node _T_645 = bits(_T_637, 6, 0) @[Bitwise.scala 102:28] + node _T_646 = shl(_T_645, 1) @[Bitwise.scala 102:47] + node _T_647 = xor(_T_637, _T_646) @[Bitwise.scala 102:21] + node _T_648 = shr(_T_644, 1) @[Bitwise.scala 103:21] + node _T_649 = and(_T_648, _T_647) @[Bitwise.scala 103:31] + node _T_650 = bits(_T_644, 6, 0) @[Bitwise.scala 103:46] + node _T_651 = shl(_T_650, 1) @[Bitwise.scala 103:65] + node _T_652 = not(_T_647) @[Bitwise.scala 103:77] + node _T_653 = and(_T_651, _T_652) @[Bitwise.scala 103:75] + node _T_654 = or(_T_649, _T_653) @[Bitwise.scala 103:39] + node _T_655 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_656 = bits(_T_655, 7, 7) @[el2_lsu_dccm_ctl.scala 173:134] + node _T_657 = bits(_T_656, 0, 0) @[el2_lsu_dccm_ctl.scala 173:139] + node _T_658 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_659 = bits(_T_658, 63, 56) @[el2_lsu_dccm_ctl.scala 173:196] + node _T_660 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 173:231] + node _T_661 = bits(picm_rd_data_m, 63, 56) @[el2_lsu_dccm_ctl.scala 173:252] + node _T_662 = bits(dccm_rdata_m, 63, 56) @[el2_lsu_dccm_ctl.scala 173:278] + node _T_663 = mux(_T_660, _T_661, _T_662) @[el2_lsu_dccm_ctl.scala 173:213] + node _T_664 = mux(_T_657, _T_659, _T_663) @[el2_lsu_dccm_ctl.scala 173:78] + node _T_665 = shl(UInt<4>("h0f"), 4) @[Bitwise.scala 102:47] + node _T_666 = xor(UInt<8>("h0ff"), _T_665) @[Bitwise.scala 102:21] + node _T_667 = shr(_T_664, 4) @[Bitwise.scala 103:21] + node _T_668 = and(_T_667, _T_666) @[Bitwise.scala 103:31] + node _T_669 = bits(_T_664, 3, 0) @[Bitwise.scala 103:46] + node _T_670 = shl(_T_669, 4) @[Bitwise.scala 103:65] + node _T_671 = not(_T_666) @[Bitwise.scala 103:77] + node _T_672 = and(_T_670, _T_671) @[Bitwise.scala 103:75] + node _T_673 = or(_T_668, _T_672) @[Bitwise.scala 103:39] + node _T_674 = bits(_T_666, 5, 0) @[Bitwise.scala 102:28] + node _T_675 = shl(_T_674, 2) @[Bitwise.scala 102:47] + node _T_676 = xor(_T_666, _T_675) @[Bitwise.scala 102:21] + node _T_677 = shr(_T_673, 2) @[Bitwise.scala 103:21] + node _T_678 = and(_T_677, _T_676) @[Bitwise.scala 103:31] + node _T_679 = bits(_T_673, 5, 0) @[Bitwise.scala 103:46] + node _T_680 = shl(_T_679, 2) @[Bitwise.scala 103:65] + node _T_681 = not(_T_676) @[Bitwise.scala 103:77] + node _T_682 = and(_T_680, _T_681) @[Bitwise.scala 103:75] + node _T_683 = or(_T_678, _T_682) @[Bitwise.scala 103:39] + node _T_684 = bits(_T_676, 6, 0) @[Bitwise.scala 102:28] + node _T_685 = shl(_T_684, 1) @[Bitwise.scala 102:47] + node _T_686 = xor(_T_676, _T_685) @[Bitwise.scala 102:21] + node _T_687 = shr(_T_683, 1) @[Bitwise.scala 103:21] + node _T_688 = and(_T_687, _T_686) @[Bitwise.scala 103:31] + node _T_689 = bits(_T_683, 6, 0) @[Bitwise.scala 103:46] + node _T_690 = shl(_T_689, 1) @[Bitwise.scala 103:65] + node _T_691 = not(_T_686) @[Bitwise.scala 103:77] + node _T_692 = and(_T_690, _T_691) @[Bitwise.scala 103:75] + node _T_693 = or(_T_688, _T_692) @[Bitwise.scala 103:39] + wire _T_694 : UInt<8>[8] @[el2_lsu_dccm_ctl.scala 173:62] + _T_694[0] <= _T_420 @[el2_lsu_dccm_ctl.scala 173:62] + _T_694[1] <= _T_459 @[el2_lsu_dccm_ctl.scala 173:62] + _T_694[2] <= _T_498 @[el2_lsu_dccm_ctl.scala 173:62] + _T_694[3] <= _T_537 @[el2_lsu_dccm_ctl.scala 173:62] + _T_694[4] <= _T_576 @[el2_lsu_dccm_ctl.scala 173:62] + _T_694[5] <= _T_615 @[el2_lsu_dccm_ctl.scala 173:62] + _T_694[6] <= _T_654 @[el2_lsu_dccm_ctl.scala 173:62] + _T_694[7] <= _T_693 @[el2_lsu_dccm_ctl.scala 173:62] + node _T_695 = cat(_T_694[6], _T_694[7]) @[Cat.scala 29:58] + node _T_696 = cat(_T_694[4], _T_694[5]) @[Cat.scala 29:58] + node _T_697 = cat(_T_696, _T_695) @[Cat.scala 29:58] + node _T_698 = cat(_T_694[2], _T_694[3]) @[Cat.scala 29:58] + node _T_699 = cat(_T_694[0], _T_694[1]) @[Cat.scala 29:58] + node _T_700 = cat(_T_699, _T_698) @[Cat.scala 29:58] + node _T_701 = cat(_T_700, _T_697) @[Cat.scala 29:58] + node _T_702 = shl(UInt<32>("h0ffffffff"), 32) @[Bitwise.scala 102:47] + node _T_703 = xor(UInt<64>("h0ffffffffffffffff"), _T_702) @[Bitwise.scala 102:21] + node _T_704 = shr(_T_701, 32) @[Bitwise.scala 103:21] + node _T_705 = and(_T_704, _T_703) @[Bitwise.scala 103:31] + node _T_706 = bits(_T_701, 31, 0) @[Bitwise.scala 103:46] + node _T_707 = shl(_T_706, 32) @[Bitwise.scala 103:65] + node _T_708 = not(_T_703) @[Bitwise.scala 103:77] + node _T_709 = and(_T_707, _T_708) @[Bitwise.scala 103:75] + node _T_710 = or(_T_705, _T_709) @[Bitwise.scala 103:39] + node _T_711 = bits(_T_703, 47, 0) @[Bitwise.scala 102:28] + node _T_712 = shl(_T_711, 16) @[Bitwise.scala 102:47] + node _T_713 = xor(_T_703, _T_712) @[Bitwise.scala 102:21] + node _T_714 = shr(_T_710, 16) @[Bitwise.scala 103:21] + node _T_715 = and(_T_714, _T_713) @[Bitwise.scala 103:31] + node _T_716 = bits(_T_710, 47, 0) @[Bitwise.scala 103:46] + node _T_717 = shl(_T_716, 16) @[Bitwise.scala 103:65] + node _T_718 = not(_T_713) @[Bitwise.scala 103:77] + node _T_719 = and(_T_717, _T_718) @[Bitwise.scala 103:75] + node _T_720 = or(_T_715, _T_719) @[Bitwise.scala 103:39] + node _T_721 = bits(_T_713, 55, 0) @[Bitwise.scala 102:28] + node _T_722 = shl(_T_721, 8) @[Bitwise.scala 102:47] + node _T_723 = xor(_T_713, _T_722) @[Bitwise.scala 102:21] + node _T_724 = shr(_T_720, 8) @[Bitwise.scala 103:21] + node _T_725 = and(_T_724, _T_723) @[Bitwise.scala 103:31] + node _T_726 = bits(_T_720, 55, 0) @[Bitwise.scala 103:46] + node _T_727 = shl(_T_726, 8) @[Bitwise.scala 103:65] + node _T_728 = not(_T_723) @[Bitwise.scala 103:77] + node _T_729 = and(_T_727, _T_728) @[Bitwise.scala 103:75] + node _T_730 = or(_T_725, _T_729) @[Bitwise.scala 103:39] + node _T_731 = bits(_T_723, 59, 0) @[Bitwise.scala 102:28] + node _T_732 = shl(_T_731, 4) @[Bitwise.scala 102:47] + node _T_733 = xor(_T_723, _T_732) @[Bitwise.scala 102:21] + node _T_734 = shr(_T_730, 4) @[Bitwise.scala 103:21] + node _T_735 = and(_T_734, _T_733) @[Bitwise.scala 103:31] + node _T_736 = bits(_T_730, 59, 0) @[Bitwise.scala 103:46] + node _T_737 = shl(_T_736, 4) @[Bitwise.scala 103:65] + node _T_738 = not(_T_733) @[Bitwise.scala 103:77] + node _T_739 = and(_T_737, _T_738) @[Bitwise.scala 103:75] + node _T_740 = or(_T_735, _T_739) @[Bitwise.scala 103:39] + node _T_741 = bits(_T_733, 61, 0) @[Bitwise.scala 102:28] + node _T_742 = shl(_T_741, 2) @[Bitwise.scala 102:47] + node _T_743 = xor(_T_733, _T_742) @[Bitwise.scala 102:21] + node _T_744 = shr(_T_740, 2) @[Bitwise.scala 103:21] + node _T_745 = and(_T_744, _T_743) @[Bitwise.scala 103:31] + node _T_746 = bits(_T_740, 61, 0) @[Bitwise.scala 103:46] + node _T_747 = shl(_T_746, 2) @[Bitwise.scala 103:65] + node _T_748 = not(_T_743) @[Bitwise.scala 103:77] + node _T_749 = and(_T_747, _T_748) @[Bitwise.scala 103:75] + node _T_750 = or(_T_745, _T_749) @[Bitwise.scala 103:39] + node _T_751 = bits(_T_743, 62, 0) @[Bitwise.scala 102:28] + node _T_752 = shl(_T_751, 1) @[Bitwise.scala 102:47] + node _T_753 = xor(_T_743, _T_752) @[Bitwise.scala 102:21] + node _T_754 = shr(_T_750, 1) @[Bitwise.scala 103:21] + node _T_755 = and(_T_754, _T_753) @[Bitwise.scala 103:31] + node _T_756 = bits(_T_750, 62, 0) @[Bitwise.scala 103:46] + node _T_757 = shl(_T_756, 1) @[Bitwise.scala 103:65] + node _T_758 = not(_T_753) @[Bitwise.scala 103:77] + node _T_759 = and(_T_757, _T_758) @[Bitwise.scala 103:75] + node _T_760 = or(_T_755, _T_759) @[Bitwise.scala 103:39] + lsu_rdata_m <= _T_760 @[el2_lsu_dccm_ctl.scala 173:28] + node _T_761 = bits(io.lsu_addr_m, 1, 0) @[el2_lsu_dccm_ctl.scala 174:63] + node _T_762 = mul(UInt<4>("h08"), _T_761) @[el2_lsu_dccm_ctl.scala 174:49] + node _T_763 = dshr(lsu_rdata_m, _T_762) @[el2_lsu_dccm_ctl.scala 174:43] + io.lsu_ld_data_m <= _T_763 @[el2_lsu_dccm_ctl.scala 174:28] + node _T_764 = bits(io.lsu_addr_m, 1, 0) @[el2_lsu_dccm_ctl.scala 175:68] + node _T_765 = mul(UInt<4>("h08"), _T_764) @[el2_lsu_dccm_ctl.scala 175:54] + node _T_766 = dshr(lsu_rdata_corr_m, _T_765) @[el2_lsu_dccm_ctl.scala 175:48] + lsu_ld_data_corr_m <= _T_766 @[el2_lsu_dccm_ctl.scala 175:28] + node _T_767 = bits(io.lsu_addr_d, 15, 2) @[el2_lsu_dccm_ctl.scala 179:44] + node _T_768 = bits(io.lsu_addr_r, 15, 2) @[el2_lsu_dccm_ctl.scala 179:77] + node _T_769 = eq(_T_767, _T_768) @[el2_lsu_dccm_ctl.scala 179:60] + node _T_770 = bits(io.end_addr_d, 15, 2) @[el2_lsu_dccm_ctl.scala 179:117] + node _T_771 = bits(io.lsu_addr_r, 15, 2) @[el2_lsu_dccm_ctl.scala 179:150] + node _T_772 = eq(_T_770, _T_771) @[el2_lsu_dccm_ctl.scala 179:133] + node _T_773 = or(_T_769, _T_772) @[el2_lsu_dccm_ctl.scala 179:101] + node _T_774 = and(_T_773, io.lsu_pkt_d.valid) @[el2_lsu_dccm_ctl.scala 179:175] + node _T_775 = and(_T_774, io.lsu_pkt_d.store) @[el2_lsu_dccm_ctl.scala 179:196] + node _T_776 = and(_T_775, io.lsu_pkt_d.dma) @[el2_lsu_dccm_ctl.scala 179:217] + node _T_777 = and(_T_776, io.addr_in_dccm_d) @[el2_lsu_dccm_ctl.scala 179:236] + node _T_778 = bits(io.lsu_addr_m, 15, 2) @[el2_lsu_dccm_ctl.scala 180:21] + node _T_779 = bits(io.lsu_addr_r, 15, 2) @[el2_lsu_dccm_ctl.scala 180:54] + node _T_780 = eq(_T_778, _T_779) @[el2_lsu_dccm_ctl.scala 180:37] + node _T_781 = bits(io.end_addr_m, 15, 2) @[el2_lsu_dccm_ctl.scala 180:94] + node _T_782 = bits(io.lsu_addr_r, 15, 2) @[el2_lsu_dccm_ctl.scala 180:127] + node _T_783 = eq(_T_781, _T_782) @[el2_lsu_dccm_ctl.scala 180:110] + node _T_784 = or(_T_780, _T_783) @[el2_lsu_dccm_ctl.scala 180:78] + node _T_785 = and(_T_784, io.lsu_pkt_m.valid) @[el2_lsu_dccm_ctl.scala 180:152] + node _T_786 = and(_T_785, io.lsu_pkt_m.store) @[el2_lsu_dccm_ctl.scala 180:173] + node _T_787 = and(_T_786, io.lsu_pkt_m.dma) @[el2_lsu_dccm_ctl.scala 180:194] + node _T_788 = and(_T_787, io.addr_in_dccm_m) @[el2_lsu_dccm_ctl.scala 180:213] + node kill_ecc_corr_lo_r = or(_T_777, _T_788) @[el2_lsu_dccm_ctl.scala 179:257] + node _T_789 = bits(io.lsu_addr_d, 15, 2) @[el2_lsu_dccm_ctl.scala 182:44] + node _T_790 = bits(io.end_addr_r, 15, 2) @[el2_lsu_dccm_ctl.scala 182:77] + node _T_791 = eq(_T_789, _T_790) @[el2_lsu_dccm_ctl.scala 182:60] + node _T_792 = bits(io.end_addr_d, 15, 2) @[el2_lsu_dccm_ctl.scala 182:117] + node _T_793 = bits(io.end_addr_r, 15, 2) @[el2_lsu_dccm_ctl.scala 182:150] + node _T_794 = eq(_T_792, _T_793) @[el2_lsu_dccm_ctl.scala 182:133] + node _T_795 = or(_T_791, _T_794) @[el2_lsu_dccm_ctl.scala 182:101] + node _T_796 = and(_T_795, io.lsu_pkt_d.valid) @[el2_lsu_dccm_ctl.scala 182:175] + node _T_797 = and(_T_796, io.lsu_pkt_d.store) @[el2_lsu_dccm_ctl.scala 182:196] + node _T_798 = and(_T_797, io.lsu_pkt_d.dma) @[el2_lsu_dccm_ctl.scala 182:217] + node _T_799 = and(_T_798, io.addr_in_dccm_d) @[el2_lsu_dccm_ctl.scala 182:236] + node _T_800 = bits(io.lsu_addr_m, 15, 2) @[el2_lsu_dccm_ctl.scala 183:21] + node _T_801 = bits(io.end_addr_r, 15, 2) @[el2_lsu_dccm_ctl.scala 183:54] + node _T_802 = eq(_T_800, _T_801) @[el2_lsu_dccm_ctl.scala 183:37] + node _T_803 = bits(io.end_addr_m, 15, 2) @[el2_lsu_dccm_ctl.scala 183:94] + node _T_804 = bits(io.end_addr_r, 15, 2) @[el2_lsu_dccm_ctl.scala 183:127] + node _T_805 = eq(_T_803, _T_804) @[el2_lsu_dccm_ctl.scala 183:110] + node _T_806 = or(_T_802, _T_805) @[el2_lsu_dccm_ctl.scala 183:78] + node _T_807 = and(_T_806, io.lsu_pkt_m.valid) @[el2_lsu_dccm_ctl.scala 183:152] + node _T_808 = and(_T_807, io.lsu_pkt_m.store) @[el2_lsu_dccm_ctl.scala 183:173] + node _T_809 = and(_T_808, io.lsu_pkt_m.dma) @[el2_lsu_dccm_ctl.scala 183:194] + node _T_810 = and(_T_809, io.addr_in_dccm_m) @[el2_lsu_dccm_ctl.scala 183:213] + node kill_ecc_corr_hi_r = or(_T_799, _T_810) @[el2_lsu_dccm_ctl.scala 182:257] + node _T_811 = and(io.lsu_pkt_r.load, io.single_ecc_error_lo_r) @[el2_lsu_dccm_ctl.scala 185:55] + node _T_812 = eq(io.lsu_raw_fwd_lo_r, UInt<1>("h00")) @[el2_lsu_dccm_ctl.scala 185:84] + node ld_single_ecc_error_lo_r = and(_T_811, _T_812) @[el2_lsu_dccm_ctl.scala 185:82] + node _T_813 = and(io.lsu_pkt_r.load, io.single_ecc_error_hi_r) @[el2_lsu_dccm_ctl.scala 186:55] + node _T_814 = eq(io.lsu_raw_fwd_hi_r, UInt<1>("h00")) @[el2_lsu_dccm_ctl.scala 186:84] + node ld_single_ecc_error_hi_r = and(_T_813, _T_814) @[el2_lsu_dccm_ctl.scala 186:82] + node _T_815 = or(ld_single_ecc_error_lo_r, ld_single_ecc_error_hi_r) @[el2_lsu_dccm_ctl.scala 187:63] + node _T_816 = eq(io.lsu_double_ecc_error_r, UInt<1>("h00")) @[el2_lsu_dccm_ctl.scala 187:93] + node _T_817 = and(_T_815, _T_816) @[el2_lsu_dccm_ctl.scala 187:91] + io.ld_single_ecc_error_r <= _T_817 @[el2_lsu_dccm_ctl.scala 187:34] + node _T_818 = or(io.lsu_commit_r, io.lsu_pkt_r.dma) @[el2_lsu_dccm_ctl.scala 188:81] + node _T_819 = and(ld_single_ecc_error_lo_r, _T_818) @[el2_lsu_dccm_ctl.scala 188:62] + node _T_820 = eq(kill_ecc_corr_lo_r, UInt<1>("h00")) @[el2_lsu_dccm_ctl.scala 188:103] + node ld_single_ecc_error_lo_r_ns = and(_T_819, _T_820) @[el2_lsu_dccm_ctl.scala 188:101] + node _T_821 = or(io.lsu_commit_r, io.lsu_pkt_r.dma) @[el2_lsu_dccm_ctl.scala 189:81] + node _T_822 = and(ld_single_ecc_error_hi_r, _T_821) @[el2_lsu_dccm_ctl.scala 189:62] + node _T_823 = eq(kill_ecc_corr_hi_r, UInt<1>("h00")) @[el2_lsu_dccm_ctl.scala 189:103] + node ld_single_ecc_error_hi_r_ns = and(_T_822, _T_823) @[el2_lsu_dccm_ctl.scala 189:101] + reg lsu_double_ecc_error_r_ff : UInt, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_dccm_ctl.scala 191:74] + lsu_double_ecc_error_r_ff <= io.lsu_double_ecc_error_r @[el2_lsu_dccm_ctl.scala 191:74] + reg ld_single_ecc_error_hi_r_ff : UInt, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_dccm_ctl.scala 192:74] + ld_single_ecc_error_hi_r_ff <= ld_single_ecc_error_hi_r_ns @[el2_lsu_dccm_ctl.scala 192:74] + reg ld_single_ecc_error_lo_r_ff : UInt, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_dccm_ctl.scala 193:74] + ld_single_ecc_error_lo_r_ff <= ld_single_ecc_error_lo_r_ns @[el2_lsu_dccm_ctl.scala 193:74] + node _T_824 = bits(io.end_addr_r, 15, 0) @[el2_lsu_dccm_ctl.scala 195:49] + node _T_825 = bits(io.ld_single_ecc_error_r, 0, 0) @[el2_lsu_dccm_ctl.scala 195:90] + node _T_826 = bits(io.scan_mode, 0, 0) @[el2_lsu_dccm_ctl.scala 195:116] + inst rvclkhdr of rvclkhdr @[el2_lib.scala 506:23] + rvclkhdr.clock <= clock + rvclkhdr.reset <= reset + rvclkhdr.io.clk <= clock @[el2_lib.scala 508:18] + rvclkhdr.io.en <= _T_825 @[el2_lib.scala 509:17] + rvclkhdr.io.scan_mode <= _T_826 @[el2_lib.scala 510:24] + reg ld_sec_addr_hi_r_ff : UInt, rvclkhdr.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 512:16] + ld_sec_addr_hi_r_ff <= _T_824 @[el2_lib.scala 512:16] + node _T_827 = bits(io.lsu_addr_r, 15, 0) @[el2_lsu_dccm_ctl.scala 196:49] + node _T_828 = bits(io.ld_single_ecc_error_r, 0, 0) @[el2_lsu_dccm_ctl.scala 196:90] + node _T_829 = bits(io.scan_mode, 0, 0) @[el2_lsu_dccm_ctl.scala 196:116] + inst rvclkhdr_1 of rvclkhdr_1 @[el2_lib.scala 506:23] + rvclkhdr_1.clock <= clock + rvclkhdr_1.reset <= reset + rvclkhdr_1.io.clk <= clock @[el2_lib.scala 508:18] + rvclkhdr_1.io.en <= _T_828 @[el2_lib.scala 509:17] + rvclkhdr_1.io.scan_mode <= _T_829 @[el2_lib.scala 510:24] + reg ld_sec_addr_lo_r_ff : UInt, rvclkhdr_1.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 512:16] + ld_sec_addr_lo_r_ff <= _T_827 @[el2_lib.scala 512:16] + node _T_830 = or(io.lsu_pkt_d.word, io.lsu_pkt_d.dword) @[el2_lsu_dccm_ctl.scala 197:110] + node _T_831 = eq(_T_830, UInt<1>("h00")) @[el2_lsu_dccm_ctl.scala 197:90] + node _T_832 = bits(io.lsu_addr_d, 1, 0) @[el2_lsu_dccm_ctl.scala 197:148] + node _T_833 = neq(_T_832, UInt<2>("h00")) @[el2_lsu_dccm_ctl.scala 197:154] + node _T_834 = or(_T_831, _T_833) @[el2_lsu_dccm_ctl.scala 197:132] + node _T_835 = and(io.lsu_pkt_d.store, _T_834) @[el2_lsu_dccm_ctl.scala 197:87] + node _T_836 = or(io.lsu_pkt_d.load, _T_835) @[el2_lsu_dccm_ctl.scala 197:65] + node _T_837 = and(io.lsu_pkt_d.valid, _T_836) @[el2_lsu_dccm_ctl.scala 197:44] + node lsu_dccm_rden_d = and(_T_837, io.addr_in_dccm_d) @[el2_lsu_dccm_ctl.scala 197:171] + node _T_838 = or(ld_single_ecc_error_lo_r_ff, ld_single_ecc_error_hi_r_ff) @[el2_lsu_dccm_ctl.scala 200:63] + node _T_839 = eq(lsu_double_ecc_error_r_ff, UInt<1>("h00")) @[el2_lsu_dccm_ctl.scala 200:96] + node _T_840 = and(_T_838, _T_839) @[el2_lsu_dccm_ctl.scala 200:94] + io.ld_single_ecc_error_r_ff <= _T_840 @[el2_lsu_dccm_ctl.scala 200:31] + node _T_841 = or(lsu_dccm_rden_d, io.dma_dccm_wen) @[el2_lsu_dccm_ctl.scala 201:75] + node _T_842 = or(_T_841, io.ld_single_ecc_error_r_ff) @[el2_lsu_dccm_ctl.scala 201:93] + node _T_843 = eq(_T_842, UInt<1>("h00")) @[el2_lsu_dccm_ctl.scala 201:57] + node _T_844 = bits(io.stbuf_addr_any, 3, 2) @[el2_lsu_dccm_ctl.scala 202:44] + node _T_845 = bits(io.lsu_addr_d, 3, 2) @[el2_lsu_dccm_ctl.scala 202:112] + node _T_846 = eq(_T_844, _T_845) @[el2_lsu_dccm_ctl.scala 202:95] + node _T_847 = bits(io.stbuf_addr_any, 3, 2) @[el2_lsu_dccm_ctl.scala 203:25] + node _T_848 = bits(io.end_addr_d, 3, 2) @[el2_lsu_dccm_ctl.scala 203:93] + node _T_849 = eq(_T_847, _T_848) @[el2_lsu_dccm_ctl.scala 203:76] + node _T_850 = or(_T_846, _T_849) @[el2_lsu_dccm_ctl.scala 202:171] + node _T_851 = eq(_T_850, UInt<1>("h00")) @[el2_lsu_dccm_ctl.scala 202:24] + node _T_852 = and(lsu_dccm_rden_d, _T_851) @[el2_lsu_dccm_ctl.scala 202:22] + node _T_853 = or(_T_843, _T_852) @[el2_lsu_dccm_ctl.scala 201:124] + node _T_854 = and(io.stbuf_reqvld_any, _T_853) @[el2_lsu_dccm_ctl.scala 201:54] + io.lsu_stbuf_commit_any <= _T_854 @[el2_lsu_dccm_ctl.scala 201:31] + node _T_855 = or(io.dma_dccm_wen, io.lsu_stbuf_commit_any) @[el2_lsu_dccm_ctl.scala 207:41] + node _T_856 = or(_T_855, io.ld_single_ecc_error_r_ff) @[el2_lsu_dccm_ctl.scala 207:67] + io.dccm_wren <= _T_856 @[el2_lsu_dccm_ctl.scala 207:22] + node _T_857 = and(lsu_dccm_rden_d, io.addr_in_dccm_d) @[el2_lsu_dccm_ctl.scala 208:41] + io.dccm_rden <= _T_857 @[el2_lsu_dccm_ctl.scala 208:22] + node _T_858 = bits(io.ld_single_ecc_error_r_ff, 0, 0) @[el2_lsu_dccm_ctl.scala 210:57] + node _T_859 = eq(ld_single_ecc_error_lo_r_ff, UInt<1>("h01")) @[el2_lsu_dccm_ctl.scala 211:36] + node _T_860 = bits(ld_sec_addr_lo_r_ff, 15, 0) @[el2_lsu_dccm_ctl.scala 211:62] + node _T_861 = bits(ld_sec_addr_hi_r_ff, 15, 0) @[el2_lsu_dccm_ctl.scala 211:97] + node _T_862 = mux(_T_859, _T_860, _T_861) @[el2_lsu_dccm_ctl.scala 211:8] + node _T_863 = bits(io.dma_dccm_wen, 0, 0) @[el2_lsu_dccm_ctl.scala 212:25] + node _T_864 = bits(io.lsu_addr_d, 15, 0) @[el2_lsu_dccm_ctl.scala 212:45] + node _T_865 = bits(io.stbuf_addr_any, 15, 0) @[el2_lsu_dccm_ctl.scala 212:78] + node _T_866 = mux(_T_863, _T_864, _T_865) @[el2_lsu_dccm_ctl.scala 212:8] + node _T_867 = mux(_T_858, _T_862, _T_866) @[el2_lsu_dccm_ctl.scala 210:28] + io.dccm_wr_addr_lo <= _T_867 @[el2_lsu_dccm_ctl.scala 210:22] + node _T_868 = bits(io.ld_single_ecc_error_r_ff, 0, 0) @[el2_lsu_dccm_ctl.scala 214:57] + node _T_869 = eq(ld_single_ecc_error_hi_r_ff, UInt<1>("h01")) @[el2_lsu_dccm_ctl.scala 215:36] + node _T_870 = bits(ld_sec_addr_hi_r_ff, 15, 0) @[el2_lsu_dccm_ctl.scala 215:63] + node _T_871 = bits(ld_sec_addr_lo_r_ff, 15, 0) @[el2_lsu_dccm_ctl.scala 215:99] + node _T_872 = mux(_T_869, _T_870, _T_871) @[el2_lsu_dccm_ctl.scala 215:8] + node _T_873 = bits(io.dma_dccm_wen, 0, 0) @[el2_lsu_dccm_ctl.scala 216:25] + node _T_874 = bits(io.end_addr_d, 15, 0) @[el2_lsu_dccm_ctl.scala 216:46] + node _T_875 = bits(io.stbuf_addr_any, 15, 0) @[el2_lsu_dccm_ctl.scala 216:79] + node _T_876 = mux(_T_873, _T_874, _T_875) @[el2_lsu_dccm_ctl.scala 216:8] + node _T_877 = mux(_T_868, _T_872, _T_876) @[el2_lsu_dccm_ctl.scala 214:28] + io.dccm_wr_addr_hi <= _T_877 @[el2_lsu_dccm_ctl.scala 214:22] + node _T_878 = bits(io.lsu_addr_d, 15, 0) @[el2_lsu_dccm_ctl.scala 218:38] + io.dccm_rd_addr_lo <= _T_878 @[el2_lsu_dccm_ctl.scala 218:22] + node _T_879 = bits(io.end_addr_d, 15, 0) @[el2_lsu_dccm_ctl.scala 219:38] + io.dccm_rd_addr_hi <= _T_879 @[el2_lsu_dccm_ctl.scala 219:22] + node _T_880 = bits(io.ld_single_ecc_error_r_ff, 0, 0) @[el2_lsu_dccm_ctl.scala 221:57] + node _T_881 = eq(ld_single_ecc_error_lo_r_ff, UInt<1>("h00")) @[el2_lsu_dccm_ctl.scala 222:36] + node _T_882 = bits(io.sec_data_ecc_lo_r_ff, 6, 0) @[el2_lsu_dccm_ctl.scala 222:70] + node _T_883 = bits(io.sec_data_lo_r_ff, 31, 0) @[el2_lsu_dccm_ctl.scala 222:110] + node _T_884 = cat(_T_882, _T_883) @[Cat.scala 29:58] + node _T_885 = bits(io.sec_data_ecc_hi_r_ff, 6, 0) @[el2_lsu_dccm_ctl.scala 223:34] + node _T_886 = bits(io.sec_data_hi_r_ff, 31, 0) @[el2_lsu_dccm_ctl.scala 223:74] + node _T_887 = cat(_T_885, _T_886) @[Cat.scala 29:58] + node _T_888 = mux(_T_881, _T_884, _T_887) @[el2_lsu_dccm_ctl.scala 222:8] + node _T_889 = bits(io.dma_dccm_wen, 0, 0) @[el2_lsu_dccm_ctl.scala 224:25] + node _T_890 = bits(io.dma_dccm_wdata_ecc_lo, 6, 0) @[el2_lsu_dccm_ctl.scala 224:60] + node _T_891 = bits(io.dma_dccm_wdata_lo, 31, 0) @[el2_lsu_dccm_ctl.scala 224:101] + node _T_892 = cat(_T_890, _T_891) @[Cat.scala 29:58] + node _T_893 = bits(io.stbuf_ecc_any, 6, 0) @[el2_lsu_dccm_ctl.scala 225:27] + node _T_894 = bits(io.stbuf_data_any, 31, 0) @[el2_lsu_dccm_ctl.scala 225:65] + node _T_895 = cat(_T_893, _T_894) @[Cat.scala 29:58] + node _T_896 = mux(_T_889, _T_892, _T_895) @[el2_lsu_dccm_ctl.scala 224:8] + node _T_897 = mux(_T_880, _T_888, _T_896) @[el2_lsu_dccm_ctl.scala 221:28] + io.dccm_wr_data_lo <= _T_897 @[el2_lsu_dccm_ctl.scala 221:22] + node _T_898 = bits(io.ld_single_ecc_error_r_ff, 0, 0) @[el2_lsu_dccm_ctl.scala 227:57] + node _T_899 = eq(ld_single_ecc_error_hi_r_ff, UInt<1>("h00")) @[el2_lsu_dccm_ctl.scala 228:36] + node _T_900 = bits(io.sec_data_ecc_hi_r_ff, 6, 0) @[el2_lsu_dccm_ctl.scala 228:71] + node _T_901 = bits(io.sec_data_hi_r_ff, 31, 0) @[el2_lsu_dccm_ctl.scala 228:111] + node _T_902 = cat(_T_900, _T_901) @[Cat.scala 29:58] + node _T_903 = bits(io.sec_data_ecc_lo_r_ff, 6, 0) @[el2_lsu_dccm_ctl.scala 229:34] + node _T_904 = bits(io.sec_data_lo_r_ff, 31, 0) @[el2_lsu_dccm_ctl.scala 229:74] + node _T_905 = cat(_T_903, _T_904) @[Cat.scala 29:58] + node _T_906 = mux(_T_899, _T_902, _T_905) @[el2_lsu_dccm_ctl.scala 228:8] + node _T_907 = bits(io.dma_dccm_wen, 0, 0) @[el2_lsu_dccm_ctl.scala 230:25] + node _T_908 = bits(io.dma_dccm_wdata_ecc_hi, 6, 0) @[el2_lsu_dccm_ctl.scala 230:61] + node _T_909 = bits(io.dma_dccm_wdata_hi, 31, 0) @[el2_lsu_dccm_ctl.scala 230:102] + node _T_910 = cat(_T_908, _T_909) @[Cat.scala 29:58] + node _T_911 = bits(io.stbuf_ecc_any, 6, 0) @[el2_lsu_dccm_ctl.scala 231:27] + node _T_912 = bits(io.stbuf_data_any, 31, 0) @[el2_lsu_dccm_ctl.scala 231:65] + node _T_913 = cat(_T_911, _T_912) @[Cat.scala 29:58] + node _T_914 = mux(_T_907, _T_910, _T_913) @[el2_lsu_dccm_ctl.scala 230:8] + node _T_915 = mux(_T_898, _T_906, _T_914) @[el2_lsu_dccm_ctl.scala 227:28] + io.dccm_wr_data_hi <= _T_915 @[el2_lsu_dccm_ctl.scala 227:22] + node _T_916 = bits(io.lsu_pkt_m.store, 0, 0) @[Bitwise.scala 72:15] + node _T_917 = mux(_T_916, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_918 = bits(io.lsu_pkt_m.by, 0, 0) @[Bitwise.scala 72:15] + node _T_919 = mux(_T_918, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_920 = and(_T_919, UInt<4>("h01")) @[el2_lsu_dccm_ctl.scala 234:84] + node _T_921 = bits(io.lsu_pkt_m.half, 0, 0) @[Bitwise.scala 72:15] + node _T_922 = mux(_T_921, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_923 = and(_T_922, UInt<4>("h03")) @[el2_lsu_dccm_ctl.scala 235:33] + node _T_924 = or(_T_920, _T_923) @[el2_lsu_dccm_ctl.scala 234:97] + node _T_925 = bits(io.lsu_pkt_m.word, 0, 0) @[Bitwise.scala 72:15] + node _T_926 = mux(_T_925, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_927 = and(_T_926, UInt<4>("h0f")) @[el2_lsu_dccm_ctl.scala 236:33] + node _T_928 = or(_T_924, _T_927) @[el2_lsu_dccm_ctl.scala 235:46] + node store_byteen_m = and(_T_917, _T_928) @[el2_lsu_dccm_ctl.scala 234:53] + node _T_929 = bits(io.lsu_pkt_r.store, 0, 0) @[Bitwise.scala 72:15] + node _T_930 = mux(_T_929, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_931 = bits(io.lsu_pkt_r.by, 0, 0) @[Bitwise.scala 72:15] + node _T_932 = mux(_T_931, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_933 = and(_T_932, UInt<4>("h01")) @[el2_lsu_dccm_ctl.scala 238:84] + node _T_934 = bits(io.lsu_pkt_r.half, 0, 0) @[Bitwise.scala 72:15] + node _T_935 = mux(_T_934, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_936 = and(_T_935, UInt<4>("h03")) @[el2_lsu_dccm_ctl.scala 239:33] + node _T_937 = or(_T_933, _T_936) @[el2_lsu_dccm_ctl.scala 238:97] + node _T_938 = bits(io.lsu_pkt_r.word, 0, 0) @[Bitwise.scala 72:15] + node _T_939 = mux(_T_938, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_940 = and(_T_939, UInt<4>("h0f")) @[el2_lsu_dccm_ctl.scala 240:33] + node _T_941 = or(_T_937, _T_940) @[el2_lsu_dccm_ctl.scala 239:46] + node store_byteen_r = and(_T_930, _T_941) @[el2_lsu_dccm_ctl.scala 238:53] + wire store_byteen_ext_m : UInt<8> + store_byteen_ext_m <= UInt<1>("h00") + node _T_942 = bits(store_byteen_m, 3, 0) @[el2_lsu_dccm_ctl.scala 242:39] + node _T_943 = bits(io.lsu_addr_m, 1, 0) @[el2_lsu_dccm_ctl.scala 242:61] + node _T_944 = dshl(_T_942, _T_943) @[el2_lsu_dccm_ctl.scala 242:45] + store_byteen_ext_m <= _T_944 @[el2_lsu_dccm_ctl.scala 242:22] + wire store_byteen_ext_r : UInt<8> + store_byteen_ext_r <= UInt<1>("h00") + node _T_945 = bits(store_byteen_r, 3, 0) @[el2_lsu_dccm_ctl.scala 244:39] + node _T_946 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_dccm_ctl.scala 244:61] + node _T_947 = dshl(_T_945, _T_946) @[el2_lsu_dccm_ctl.scala 244:45] + store_byteen_ext_r <= _T_947 @[el2_lsu_dccm_ctl.scala 244:22] + node _T_948 = bits(io.stbuf_addr_any, 15, 2) @[el2_lsu_dccm_ctl.scala 247:51] + node _T_949 = bits(io.lsu_addr_m, 15, 2) @[el2_lsu_dccm_ctl.scala 247:84] + node _T_950 = eq(_T_948, _T_949) @[el2_lsu_dccm_ctl.scala 247:67] + node dccm_wr_bypass_d_m_lo = and(_T_950, io.addr_in_dccm_m) @[el2_lsu_dccm_ctl.scala 247:101] + node _T_951 = bits(io.stbuf_addr_any, 15, 2) @[el2_lsu_dccm_ctl.scala 248:51] + node _T_952 = bits(io.end_addr_m, 15, 2) @[el2_lsu_dccm_ctl.scala 248:84] + node _T_953 = eq(_T_951, _T_952) @[el2_lsu_dccm_ctl.scala 248:67] + node dccm_wr_bypass_d_m_hi = and(_T_953, io.addr_in_dccm_m) @[el2_lsu_dccm_ctl.scala 248:101] + node _T_954 = bits(io.stbuf_addr_any, 15, 2) @[el2_lsu_dccm_ctl.scala 250:51] + node _T_955 = bits(io.lsu_addr_r, 15, 2) @[el2_lsu_dccm_ctl.scala 250:84] + node _T_956 = eq(_T_954, _T_955) @[el2_lsu_dccm_ctl.scala 250:67] + node dccm_wr_bypass_d_r_lo = and(_T_956, io.addr_in_dccm_r) @[el2_lsu_dccm_ctl.scala 250:101] + node _T_957 = bits(io.stbuf_addr_any, 15, 2) @[el2_lsu_dccm_ctl.scala 251:51] + node _T_958 = bits(io.end_addr_r, 15, 2) @[el2_lsu_dccm_ctl.scala 251:84] + node _T_959 = eq(_T_957, _T_958) @[el2_lsu_dccm_ctl.scala 251:67] + node dccm_wr_bypass_d_r_hi = and(_T_959, io.addr_in_dccm_r) @[el2_lsu_dccm_ctl.scala 251:101] + wire dccm_wr_bypass_d_m_hi_Q : UInt<1> + dccm_wr_bypass_d_m_hi_Q <= UInt<1>("h00") + wire dccm_wr_bypass_d_m_lo_Q : UInt<1> + dccm_wr_bypass_d_m_lo_Q <= UInt<1>("h00") + wire dccm_wren_Q : UInt<1> + dccm_wren_Q <= UInt<1>("h00") + wire dccm_wr_data_Q : UInt<32> + dccm_wr_data_Q <= UInt<32>("h00") + wire store_data_pre_r : UInt<64> + store_data_pre_r <= UInt<64>("h00") + wire store_data_pre_hi_r : UInt<32> + store_data_pre_hi_r <= UInt<32>("h00") + wire store_data_pre_lo_r : UInt<32> + store_data_pre_lo_r <= UInt<32>("h00") + wire store_data_pre_m : UInt<64> + store_data_pre_m <= UInt<64>("h00") + wire store_data_hi_m : UInt<32> + store_data_hi_m <= UInt<32>("h00") + wire store_data_lo_m : UInt<32> + store_data_lo_m <= UInt<32>("h00") + node _T_960 = mux(UInt<1>("h00"), UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_961 = bits(io.store_data_m, 31, 0) @[el2_lsu_dccm_ctl.scala 280:64] + node _T_962 = cat(_T_960, _T_961) @[Cat.scala 29:58] + node _T_963 = bits(io.lsu_addr_m, 1, 0) @[el2_lsu_dccm_ctl.scala 280:92] + node _T_964 = mul(UInt<4>("h08"), _T_963) @[el2_lsu_dccm_ctl.scala 280:78] + node _T_965 = dshl(_T_962, _T_964) @[el2_lsu_dccm_ctl.scala 280:72] + store_data_pre_m <= _T_965 @[el2_lsu_dccm_ctl.scala 280:29] + node _T_966 = bits(store_data_pre_m, 63, 32) @[el2_lsu_dccm_ctl.scala 281:48] + store_data_hi_m <= _T_966 @[el2_lsu_dccm_ctl.scala 281:29] + node _T_967 = bits(store_data_pre_m, 31, 0) @[el2_lsu_dccm_ctl.scala 282:48] + store_data_lo_m <= _T_967 @[el2_lsu_dccm_ctl.scala 282:29] + node _T_968 = bits(store_byteen_ext_m, 0, 0) @[el2_lsu_dccm_ctl.scala 283:139] + node _T_969 = bits(_T_968, 0, 0) @[el2_lsu_dccm_ctl.scala 283:143] + node _T_970 = bits(store_data_lo_m, 7, 0) @[el2_lsu_dccm_ctl.scala 283:167] + node _T_971 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_m_lo) @[el2_lsu_dccm_ctl.scala 283:211] + node _T_972 = bits(_T_971, 0, 0) @[el2_lsu_dccm_ctl.scala 283:237] + node _T_973 = bits(io.stbuf_data_any, 7, 0) @[el2_lsu_dccm_ctl.scala 283:262] + node _T_974 = bits(io.sec_data_lo_m, 7, 0) @[el2_lsu_dccm_ctl.scala 283:292] + node _T_975 = mux(_T_972, _T_973, _T_974) @[el2_lsu_dccm_ctl.scala 283:185] + node _T_976 = mux(_T_969, _T_970, _T_975) @[el2_lsu_dccm_ctl.scala 283:120] + node _T_977 = shl(UInt<4>("h0f"), 4) @[Bitwise.scala 102:47] + node _T_978 = xor(UInt<8>("h0ff"), _T_977) @[Bitwise.scala 102:21] + node _T_979 = shr(_T_976, 4) @[Bitwise.scala 103:21] + node _T_980 = and(_T_979, _T_978) @[Bitwise.scala 103:31] + node _T_981 = bits(_T_976, 3, 0) @[Bitwise.scala 103:46] + node _T_982 = shl(_T_981, 4) @[Bitwise.scala 103:65] + node _T_983 = not(_T_978) @[Bitwise.scala 103:77] + node _T_984 = and(_T_982, _T_983) @[Bitwise.scala 103:75] + node _T_985 = or(_T_980, _T_984) @[Bitwise.scala 103:39] + node _T_986 = bits(_T_978, 5, 0) @[Bitwise.scala 102:28] + node _T_987 = shl(_T_986, 2) @[Bitwise.scala 102:47] + node _T_988 = xor(_T_978, _T_987) @[Bitwise.scala 102:21] + node _T_989 = shr(_T_985, 2) @[Bitwise.scala 103:21] + node _T_990 = and(_T_989, _T_988) @[Bitwise.scala 103:31] + node _T_991 = bits(_T_985, 5, 0) @[Bitwise.scala 103:46] + node _T_992 = shl(_T_991, 2) @[Bitwise.scala 103:65] + node _T_993 = not(_T_988) @[Bitwise.scala 103:77] + node _T_994 = and(_T_992, _T_993) @[Bitwise.scala 103:75] + node _T_995 = or(_T_990, _T_994) @[Bitwise.scala 103:39] + node _T_996 = bits(_T_988, 6, 0) @[Bitwise.scala 102:28] + node _T_997 = shl(_T_996, 1) @[Bitwise.scala 102:47] + node _T_998 = xor(_T_988, _T_997) @[Bitwise.scala 102:21] + node _T_999 = shr(_T_995, 1) @[Bitwise.scala 103:21] + node _T_1000 = and(_T_999, _T_998) @[Bitwise.scala 103:31] + node _T_1001 = bits(_T_995, 6, 0) @[Bitwise.scala 103:46] + node _T_1002 = shl(_T_1001, 1) @[Bitwise.scala 103:65] + node _T_1003 = not(_T_998) @[Bitwise.scala 103:77] + node _T_1004 = and(_T_1002, _T_1003) @[Bitwise.scala 103:75] + node _T_1005 = or(_T_1000, _T_1004) @[Bitwise.scala 103:39] + node _T_1006 = bits(store_byteen_ext_m, 1, 1) @[el2_lsu_dccm_ctl.scala 283:139] + node _T_1007 = bits(_T_1006, 0, 0) @[el2_lsu_dccm_ctl.scala 283:143] + node _T_1008 = bits(store_data_lo_m, 15, 8) @[el2_lsu_dccm_ctl.scala 283:167] + node _T_1009 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_m_lo) @[el2_lsu_dccm_ctl.scala 283:211] + node _T_1010 = bits(_T_1009, 0, 0) @[el2_lsu_dccm_ctl.scala 283:237] + node _T_1011 = bits(io.stbuf_data_any, 15, 8) @[el2_lsu_dccm_ctl.scala 283:262] + node _T_1012 = bits(io.sec_data_lo_m, 15, 8) @[el2_lsu_dccm_ctl.scala 283:292] + node _T_1013 = mux(_T_1010, _T_1011, _T_1012) @[el2_lsu_dccm_ctl.scala 283:185] + node _T_1014 = mux(_T_1007, _T_1008, _T_1013) @[el2_lsu_dccm_ctl.scala 283:120] + node _T_1015 = shl(UInt<4>("h0f"), 4) @[Bitwise.scala 102:47] + node _T_1016 = xor(UInt<8>("h0ff"), _T_1015) @[Bitwise.scala 102:21] + node _T_1017 = shr(_T_1014, 4) @[Bitwise.scala 103:21] + node _T_1018 = and(_T_1017, _T_1016) @[Bitwise.scala 103:31] + node _T_1019 = bits(_T_1014, 3, 0) @[Bitwise.scala 103:46] + node _T_1020 = shl(_T_1019, 4) @[Bitwise.scala 103:65] + node _T_1021 = not(_T_1016) @[Bitwise.scala 103:77] + node _T_1022 = and(_T_1020, _T_1021) @[Bitwise.scala 103:75] + node _T_1023 = or(_T_1018, _T_1022) @[Bitwise.scala 103:39] + node _T_1024 = bits(_T_1016, 5, 0) @[Bitwise.scala 102:28] + node _T_1025 = shl(_T_1024, 2) @[Bitwise.scala 102:47] + node _T_1026 = xor(_T_1016, _T_1025) @[Bitwise.scala 102:21] + node _T_1027 = shr(_T_1023, 2) @[Bitwise.scala 103:21] + node _T_1028 = and(_T_1027, _T_1026) @[Bitwise.scala 103:31] + node _T_1029 = bits(_T_1023, 5, 0) @[Bitwise.scala 103:46] + node _T_1030 = shl(_T_1029, 2) @[Bitwise.scala 103:65] + node _T_1031 = not(_T_1026) @[Bitwise.scala 103:77] + node _T_1032 = and(_T_1030, _T_1031) @[Bitwise.scala 103:75] + node _T_1033 = or(_T_1028, _T_1032) @[Bitwise.scala 103:39] + node _T_1034 = bits(_T_1026, 6, 0) @[Bitwise.scala 102:28] + node _T_1035 = shl(_T_1034, 1) @[Bitwise.scala 102:47] + node _T_1036 = xor(_T_1026, _T_1035) @[Bitwise.scala 102:21] + node _T_1037 = shr(_T_1033, 1) @[Bitwise.scala 103:21] + node _T_1038 = and(_T_1037, _T_1036) @[Bitwise.scala 103:31] + node _T_1039 = bits(_T_1033, 6, 0) @[Bitwise.scala 103:46] + node _T_1040 = shl(_T_1039, 1) @[Bitwise.scala 103:65] + node _T_1041 = not(_T_1036) @[Bitwise.scala 103:77] + node _T_1042 = and(_T_1040, _T_1041) @[Bitwise.scala 103:75] + node _T_1043 = or(_T_1038, _T_1042) @[Bitwise.scala 103:39] + node _T_1044 = bits(store_byteen_ext_m, 2, 2) @[el2_lsu_dccm_ctl.scala 283:139] + node _T_1045 = bits(_T_1044, 0, 0) @[el2_lsu_dccm_ctl.scala 283:143] + node _T_1046 = bits(store_data_lo_m, 23, 16) @[el2_lsu_dccm_ctl.scala 283:167] + node _T_1047 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_m_lo) @[el2_lsu_dccm_ctl.scala 283:211] + node _T_1048 = bits(_T_1047, 0, 0) @[el2_lsu_dccm_ctl.scala 283:237] + node _T_1049 = bits(io.stbuf_data_any, 23, 16) @[el2_lsu_dccm_ctl.scala 283:262] + node _T_1050 = bits(io.sec_data_lo_m, 23, 16) @[el2_lsu_dccm_ctl.scala 283:292] + node _T_1051 = mux(_T_1048, _T_1049, _T_1050) @[el2_lsu_dccm_ctl.scala 283:185] + node _T_1052 = mux(_T_1045, _T_1046, _T_1051) @[el2_lsu_dccm_ctl.scala 283:120] + node _T_1053 = shl(UInt<4>("h0f"), 4) @[Bitwise.scala 102:47] + node _T_1054 = xor(UInt<8>("h0ff"), _T_1053) @[Bitwise.scala 102:21] + node _T_1055 = shr(_T_1052, 4) @[Bitwise.scala 103:21] + node _T_1056 = and(_T_1055, _T_1054) @[Bitwise.scala 103:31] + node _T_1057 = bits(_T_1052, 3, 0) @[Bitwise.scala 103:46] + node _T_1058 = shl(_T_1057, 4) @[Bitwise.scala 103:65] + node _T_1059 = not(_T_1054) @[Bitwise.scala 103:77] + node _T_1060 = and(_T_1058, _T_1059) @[Bitwise.scala 103:75] + node _T_1061 = or(_T_1056, _T_1060) @[Bitwise.scala 103:39] + node _T_1062 = bits(_T_1054, 5, 0) @[Bitwise.scala 102:28] + node _T_1063 = shl(_T_1062, 2) @[Bitwise.scala 102:47] + node _T_1064 = xor(_T_1054, _T_1063) @[Bitwise.scala 102:21] + node _T_1065 = shr(_T_1061, 2) @[Bitwise.scala 103:21] + node _T_1066 = and(_T_1065, _T_1064) @[Bitwise.scala 103:31] + node _T_1067 = bits(_T_1061, 5, 0) @[Bitwise.scala 103:46] + node _T_1068 = shl(_T_1067, 2) @[Bitwise.scala 103:65] + node _T_1069 = not(_T_1064) @[Bitwise.scala 103:77] + node _T_1070 = and(_T_1068, _T_1069) @[Bitwise.scala 103:75] + node _T_1071 = or(_T_1066, _T_1070) @[Bitwise.scala 103:39] + node _T_1072 = bits(_T_1064, 6, 0) @[Bitwise.scala 102:28] + node _T_1073 = shl(_T_1072, 1) @[Bitwise.scala 102:47] + node _T_1074 = xor(_T_1064, _T_1073) @[Bitwise.scala 102:21] + node _T_1075 = shr(_T_1071, 1) @[Bitwise.scala 103:21] + node _T_1076 = and(_T_1075, _T_1074) @[Bitwise.scala 103:31] + node _T_1077 = bits(_T_1071, 6, 0) @[Bitwise.scala 103:46] + node _T_1078 = shl(_T_1077, 1) @[Bitwise.scala 103:65] + node _T_1079 = not(_T_1074) @[Bitwise.scala 103:77] + node _T_1080 = and(_T_1078, _T_1079) @[Bitwise.scala 103:75] + node _T_1081 = or(_T_1076, _T_1080) @[Bitwise.scala 103:39] + node _T_1082 = bits(store_byteen_ext_m, 3, 3) @[el2_lsu_dccm_ctl.scala 283:139] + node _T_1083 = bits(_T_1082, 0, 0) @[el2_lsu_dccm_ctl.scala 283:143] + node _T_1084 = bits(store_data_lo_m, 31, 24) @[el2_lsu_dccm_ctl.scala 283:167] + node _T_1085 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_m_lo) @[el2_lsu_dccm_ctl.scala 283:211] + node _T_1086 = bits(_T_1085, 0, 0) @[el2_lsu_dccm_ctl.scala 283:237] + node _T_1087 = bits(io.stbuf_data_any, 31, 24) @[el2_lsu_dccm_ctl.scala 283:262] + node _T_1088 = bits(io.sec_data_lo_m, 31, 24) @[el2_lsu_dccm_ctl.scala 283:292] + node _T_1089 = mux(_T_1086, _T_1087, _T_1088) @[el2_lsu_dccm_ctl.scala 283:185] + node _T_1090 = mux(_T_1083, _T_1084, _T_1089) @[el2_lsu_dccm_ctl.scala 283:120] + node _T_1091 = shl(UInt<4>("h0f"), 4) @[Bitwise.scala 102:47] + node _T_1092 = xor(UInt<8>("h0ff"), _T_1091) @[Bitwise.scala 102:21] + node _T_1093 = shr(_T_1090, 4) @[Bitwise.scala 103:21] + node _T_1094 = and(_T_1093, _T_1092) @[Bitwise.scala 103:31] + node _T_1095 = bits(_T_1090, 3, 0) @[Bitwise.scala 103:46] + node _T_1096 = shl(_T_1095, 4) @[Bitwise.scala 103:65] + node _T_1097 = not(_T_1092) @[Bitwise.scala 103:77] + node _T_1098 = and(_T_1096, _T_1097) @[Bitwise.scala 103:75] + node _T_1099 = or(_T_1094, _T_1098) @[Bitwise.scala 103:39] + node _T_1100 = bits(_T_1092, 5, 0) @[Bitwise.scala 102:28] + node _T_1101 = shl(_T_1100, 2) @[Bitwise.scala 102:47] + node _T_1102 = xor(_T_1092, _T_1101) @[Bitwise.scala 102:21] + node _T_1103 = shr(_T_1099, 2) @[Bitwise.scala 103:21] + node _T_1104 = and(_T_1103, _T_1102) @[Bitwise.scala 103:31] + node _T_1105 = bits(_T_1099, 5, 0) @[Bitwise.scala 103:46] + node _T_1106 = shl(_T_1105, 2) @[Bitwise.scala 103:65] + node _T_1107 = not(_T_1102) @[Bitwise.scala 103:77] + node _T_1108 = and(_T_1106, _T_1107) @[Bitwise.scala 103:75] + node _T_1109 = or(_T_1104, _T_1108) @[Bitwise.scala 103:39] + node _T_1110 = bits(_T_1102, 6, 0) @[Bitwise.scala 102:28] + node _T_1111 = shl(_T_1110, 1) @[Bitwise.scala 102:47] + node _T_1112 = xor(_T_1102, _T_1111) @[Bitwise.scala 102:21] + node _T_1113 = shr(_T_1109, 1) @[Bitwise.scala 103:21] + node _T_1114 = and(_T_1113, _T_1112) @[Bitwise.scala 103:31] + node _T_1115 = bits(_T_1109, 6, 0) @[Bitwise.scala 103:46] + node _T_1116 = shl(_T_1115, 1) @[Bitwise.scala 103:65] + node _T_1117 = not(_T_1112) @[Bitwise.scala 103:77] + node _T_1118 = and(_T_1116, _T_1117) @[Bitwise.scala 103:75] + node _T_1119 = or(_T_1114, _T_1118) @[Bitwise.scala 103:39] + wire _T_1120 : UInt<8>[4] @[el2_lsu_dccm_ctl.scala 283:104] + _T_1120[0] <= _T_1005 @[el2_lsu_dccm_ctl.scala 283:104] + _T_1120[1] <= _T_1043 @[el2_lsu_dccm_ctl.scala 283:104] + _T_1120[2] <= _T_1081 @[el2_lsu_dccm_ctl.scala 283:104] + _T_1120[3] <= _T_1119 @[el2_lsu_dccm_ctl.scala 283:104] + node _T_1121 = cat(_T_1120[2], _T_1120[3]) @[Cat.scala 29:58] + node _T_1122 = cat(_T_1120[0], _T_1120[1]) @[Cat.scala 29:58] + node _T_1123 = cat(_T_1122, _T_1121) @[Cat.scala 29:58] + node _T_1124 = shl(UInt<16>("h0ffff"), 16) @[Bitwise.scala 102:47] + node _T_1125 = xor(UInt<32>("h0ffffffff"), _T_1124) @[Bitwise.scala 102:21] + node _T_1126 = shr(_T_1123, 16) @[Bitwise.scala 103:21] + node _T_1127 = and(_T_1126, _T_1125) @[Bitwise.scala 103:31] + node _T_1128 = bits(_T_1123, 15, 0) @[Bitwise.scala 103:46] + node _T_1129 = shl(_T_1128, 16) @[Bitwise.scala 103:65] + node _T_1130 = not(_T_1125) @[Bitwise.scala 103:77] + node _T_1131 = and(_T_1129, _T_1130) @[Bitwise.scala 103:75] + node _T_1132 = or(_T_1127, _T_1131) @[Bitwise.scala 103:39] + node _T_1133 = bits(_T_1125, 23, 0) @[Bitwise.scala 102:28] + node _T_1134 = shl(_T_1133, 8) @[Bitwise.scala 102:47] + node _T_1135 = xor(_T_1125, _T_1134) @[Bitwise.scala 102:21] + node _T_1136 = shr(_T_1132, 8) @[Bitwise.scala 103:21] + node _T_1137 = and(_T_1136, _T_1135) @[Bitwise.scala 103:31] + node _T_1138 = bits(_T_1132, 23, 0) @[Bitwise.scala 103:46] + node _T_1139 = shl(_T_1138, 8) @[Bitwise.scala 103:65] + node _T_1140 = not(_T_1135) @[Bitwise.scala 103:77] + node _T_1141 = and(_T_1139, _T_1140) @[Bitwise.scala 103:75] + node _T_1142 = or(_T_1137, _T_1141) @[Bitwise.scala 103:39] + node _T_1143 = bits(_T_1135, 27, 0) @[Bitwise.scala 102:28] + node _T_1144 = shl(_T_1143, 4) @[Bitwise.scala 102:47] + node _T_1145 = xor(_T_1135, _T_1144) @[Bitwise.scala 102:21] + node _T_1146 = shr(_T_1142, 4) @[Bitwise.scala 103:21] + node _T_1147 = and(_T_1146, _T_1145) @[Bitwise.scala 103:31] + node _T_1148 = bits(_T_1142, 27, 0) @[Bitwise.scala 103:46] + node _T_1149 = shl(_T_1148, 4) @[Bitwise.scala 103:65] + node _T_1150 = not(_T_1145) @[Bitwise.scala 103:77] + node _T_1151 = and(_T_1149, _T_1150) @[Bitwise.scala 103:75] + node _T_1152 = or(_T_1147, _T_1151) @[Bitwise.scala 103:39] + node _T_1153 = bits(_T_1145, 29, 0) @[Bitwise.scala 102:28] + node _T_1154 = shl(_T_1153, 2) @[Bitwise.scala 102:47] + node _T_1155 = xor(_T_1145, _T_1154) @[Bitwise.scala 102:21] + node _T_1156 = shr(_T_1152, 2) @[Bitwise.scala 103:21] + node _T_1157 = and(_T_1156, _T_1155) @[Bitwise.scala 103:31] + node _T_1158 = bits(_T_1152, 29, 0) @[Bitwise.scala 103:46] + node _T_1159 = shl(_T_1158, 2) @[Bitwise.scala 103:65] + node _T_1160 = not(_T_1155) @[Bitwise.scala 103:77] + node _T_1161 = and(_T_1159, _T_1160) @[Bitwise.scala 103:75] + node _T_1162 = or(_T_1157, _T_1161) @[Bitwise.scala 103:39] + node _T_1163 = bits(_T_1155, 30, 0) @[Bitwise.scala 102:28] + node _T_1164 = shl(_T_1163, 1) @[Bitwise.scala 102:47] + node _T_1165 = xor(_T_1155, _T_1164) @[Bitwise.scala 102:21] + node _T_1166 = shr(_T_1162, 1) @[Bitwise.scala 103:21] + node _T_1167 = and(_T_1166, _T_1165) @[Bitwise.scala 103:31] + node _T_1168 = bits(_T_1162, 30, 0) @[Bitwise.scala 103:46] + node _T_1169 = shl(_T_1168, 1) @[Bitwise.scala 103:65] + node _T_1170 = not(_T_1165) @[Bitwise.scala 103:77] + node _T_1171 = and(_T_1169, _T_1170) @[Bitwise.scala 103:75] + node _T_1172 = or(_T_1167, _T_1171) @[Bitwise.scala 103:39] + reg _T_1173 : UInt, io.lsu_store_c1_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_dccm_ctl.scala 283:72] + _T_1173 <= _T_1172 @[el2_lsu_dccm_ctl.scala 283:72] + io.store_data_lo_r <= _T_1173 @[el2_lsu_dccm_ctl.scala 283:29] + node _T_1174 = bits(store_byteen_ext_m, 4, 4) @[el2_lsu_dccm_ctl.scala 284:139] + node _T_1175 = bits(_T_1174, 0, 0) @[el2_lsu_dccm_ctl.scala 284:145] + node _T_1176 = bits(store_data_hi_m, 7, 0) @[el2_lsu_dccm_ctl.scala 284:167] + node _T_1177 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_m_hi) @[el2_lsu_dccm_ctl.scala 284:211] + node _T_1178 = bits(_T_1177, 0, 0) @[el2_lsu_dccm_ctl.scala 284:237] + node _T_1179 = bits(io.stbuf_data_any, 7, 0) @[el2_lsu_dccm_ctl.scala 284:262] + node _T_1180 = bits(io.sec_data_hi_m, 7, 0) @[el2_lsu_dccm_ctl.scala 284:292] + node _T_1181 = mux(_T_1178, _T_1179, _T_1180) @[el2_lsu_dccm_ctl.scala 284:185] + node _T_1182 = mux(_T_1175, _T_1176, _T_1181) @[el2_lsu_dccm_ctl.scala 284:120] + node _T_1183 = shl(UInt<4>("h0f"), 4) @[Bitwise.scala 102:47] + node _T_1184 = xor(UInt<8>("h0ff"), _T_1183) @[Bitwise.scala 102:21] + node _T_1185 = shr(_T_1182, 4) @[Bitwise.scala 103:21] + node _T_1186 = and(_T_1185, _T_1184) @[Bitwise.scala 103:31] + node _T_1187 = bits(_T_1182, 3, 0) @[Bitwise.scala 103:46] + node _T_1188 = shl(_T_1187, 4) @[Bitwise.scala 103:65] + node _T_1189 = not(_T_1184) @[Bitwise.scala 103:77] + node _T_1190 = and(_T_1188, _T_1189) @[Bitwise.scala 103:75] + node _T_1191 = or(_T_1186, _T_1190) @[Bitwise.scala 103:39] + node _T_1192 = bits(_T_1184, 5, 0) @[Bitwise.scala 102:28] + node _T_1193 = shl(_T_1192, 2) @[Bitwise.scala 102:47] + node _T_1194 = xor(_T_1184, _T_1193) @[Bitwise.scala 102:21] + node _T_1195 = shr(_T_1191, 2) @[Bitwise.scala 103:21] + node _T_1196 = and(_T_1195, _T_1194) @[Bitwise.scala 103:31] + node _T_1197 = bits(_T_1191, 5, 0) @[Bitwise.scala 103:46] + node _T_1198 = shl(_T_1197, 2) @[Bitwise.scala 103:65] + node _T_1199 = not(_T_1194) @[Bitwise.scala 103:77] + node _T_1200 = and(_T_1198, _T_1199) @[Bitwise.scala 103:75] + node _T_1201 = or(_T_1196, _T_1200) @[Bitwise.scala 103:39] + node _T_1202 = bits(_T_1194, 6, 0) @[Bitwise.scala 102:28] + node _T_1203 = shl(_T_1202, 1) @[Bitwise.scala 102:47] + node _T_1204 = xor(_T_1194, _T_1203) @[Bitwise.scala 102:21] + node _T_1205 = shr(_T_1201, 1) @[Bitwise.scala 103:21] + node _T_1206 = and(_T_1205, _T_1204) @[Bitwise.scala 103:31] + node _T_1207 = bits(_T_1201, 6, 0) @[Bitwise.scala 103:46] + node _T_1208 = shl(_T_1207, 1) @[Bitwise.scala 103:65] + node _T_1209 = not(_T_1204) @[Bitwise.scala 103:77] + node _T_1210 = and(_T_1208, _T_1209) @[Bitwise.scala 103:75] + node _T_1211 = or(_T_1206, _T_1210) @[Bitwise.scala 103:39] + node _T_1212 = bits(store_byteen_ext_m, 5, 5) @[el2_lsu_dccm_ctl.scala 284:139] + node _T_1213 = bits(_T_1212, 0, 0) @[el2_lsu_dccm_ctl.scala 284:145] + node _T_1214 = bits(store_data_hi_m, 15, 8) @[el2_lsu_dccm_ctl.scala 284:167] + node _T_1215 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_m_hi) @[el2_lsu_dccm_ctl.scala 284:211] + node _T_1216 = bits(_T_1215, 0, 0) @[el2_lsu_dccm_ctl.scala 284:237] + node _T_1217 = bits(io.stbuf_data_any, 15, 8) @[el2_lsu_dccm_ctl.scala 284:262] + node _T_1218 = bits(io.sec_data_hi_m, 15, 8) @[el2_lsu_dccm_ctl.scala 284:292] + node _T_1219 = mux(_T_1216, _T_1217, _T_1218) @[el2_lsu_dccm_ctl.scala 284:185] + node _T_1220 = mux(_T_1213, _T_1214, _T_1219) @[el2_lsu_dccm_ctl.scala 284:120] + node _T_1221 = shl(UInt<4>("h0f"), 4) @[Bitwise.scala 102:47] + node _T_1222 = xor(UInt<8>("h0ff"), _T_1221) @[Bitwise.scala 102:21] + node _T_1223 = shr(_T_1220, 4) @[Bitwise.scala 103:21] + node _T_1224 = and(_T_1223, _T_1222) @[Bitwise.scala 103:31] + node _T_1225 = bits(_T_1220, 3, 0) @[Bitwise.scala 103:46] + node _T_1226 = shl(_T_1225, 4) @[Bitwise.scala 103:65] + node _T_1227 = not(_T_1222) @[Bitwise.scala 103:77] + node _T_1228 = and(_T_1226, _T_1227) @[Bitwise.scala 103:75] + node _T_1229 = or(_T_1224, _T_1228) @[Bitwise.scala 103:39] + node _T_1230 = bits(_T_1222, 5, 0) @[Bitwise.scala 102:28] + node _T_1231 = shl(_T_1230, 2) @[Bitwise.scala 102:47] + node _T_1232 = xor(_T_1222, _T_1231) @[Bitwise.scala 102:21] + node _T_1233 = shr(_T_1229, 2) @[Bitwise.scala 103:21] + node _T_1234 = and(_T_1233, _T_1232) @[Bitwise.scala 103:31] + node _T_1235 = bits(_T_1229, 5, 0) @[Bitwise.scala 103:46] + node _T_1236 = shl(_T_1235, 2) @[Bitwise.scala 103:65] + node _T_1237 = not(_T_1232) @[Bitwise.scala 103:77] + node _T_1238 = and(_T_1236, _T_1237) @[Bitwise.scala 103:75] + node _T_1239 = or(_T_1234, _T_1238) @[Bitwise.scala 103:39] + node _T_1240 = bits(_T_1232, 6, 0) @[Bitwise.scala 102:28] + node _T_1241 = shl(_T_1240, 1) @[Bitwise.scala 102:47] + node _T_1242 = xor(_T_1232, _T_1241) @[Bitwise.scala 102:21] + node _T_1243 = shr(_T_1239, 1) @[Bitwise.scala 103:21] + node _T_1244 = and(_T_1243, _T_1242) @[Bitwise.scala 103:31] + node _T_1245 = bits(_T_1239, 6, 0) @[Bitwise.scala 103:46] + node _T_1246 = shl(_T_1245, 1) @[Bitwise.scala 103:65] + node _T_1247 = not(_T_1242) @[Bitwise.scala 103:77] + node _T_1248 = and(_T_1246, _T_1247) @[Bitwise.scala 103:75] + node _T_1249 = or(_T_1244, _T_1248) @[Bitwise.scala 103:39] + node _T_1250 = bits(store_byteen_ext_m, 6, 6) @[el2_lsu_dccm_ctl.scala 284:139] + node _T_1251 = bits(_T_1250, 0, 0) @[el2_lsu_dccm_ctl.scala 284:145] + node _T_1252 = bits(store_data_hi_m, 23, 16) @[el2_lsu_dccm_ctl.scala 284:167] + node _T_1253 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_m_hi) @[el2_lsu_dccm_ctl.scala 284:211] + node _T_1254 = bits(_T_1253, 0, 0) @[el2_lsu_dccm_ctl.scala 284:237] + node _T_1255 = bits(io.stbuf_data_any, 23, 16) @[el2_lsu_dccm_ctl.scala 284:262] + node _T_1256 = bits(io.sec_data_hi_m, 23, 16) @[el2_lsu_dccm_ctl.scala 284:292] + node _T_1257 = mux(_T_1254, _T_1255, _T_1256) @[el2_lsu_dccm_ctl.scala 284:185] + node _T_1258 = mux(_T_1251, _T_1252, _T_1257) @[el2_lsu_dccm_ctl.scala 284:120] + node _T_1259 = shl(UInt<4>("h0f"), 4) @[Bitwise.scala 102:47] + node _T_1260 = xor(UInt<8>("h0ff"), _T_1259) @[Bitwise.scala 102:21] + node _T_1261 = shr(_T_1258, 4) @[Bitwise.scala 103:21] + node _T_1262 = and(_T_1261, _T_1260) @[Bitwise.scala 103:31] + node _T_1263 = bits(_T_1258, 3, 0) @[Bitwise.scala 103:46] + node _T_1264 = shl(_T_1263, 4) @[Bitwise.scala 103:65] + node _T_1265 = not(_T_1260) @[Bitwise.scala 103:77] + node _T_1266 = and(_T_1264, _T_1265) @[Bitwise.scala 103:75] + node _T_1267 = or(_T_1262, _T_1266) @[Bitwise.scala 103:39] + node _T_1268 = bits(_T_1260, 5, 0) @[Bitwise.scala 102:28] + node _T_1269 = shl(_T_1268, 2) @[Bitwise.scala 102:47] + node _T_1270 = xor(_T_1260, _T_1269) @[Bitwise.scala 102:21] + node _T_1271 = shr(_T_1267, 2) @[Bitwise.scala 103:21] + node _T_1272 = and(_T_1271, _T_1270) @[Bitwise.scala 103:31] + node _T_1273 = bits(_T_1267, 5, 0) @[Bitwise.scala 103:46] + node _T_1274 = shl(_T_1273, 2) @[Bitwise.scala 103:65] + node _T_1275 = not(_T_1270) @[Bitwise.scala 103:77] + node _T_1276 = and(_T_1274, _T_1275) @[Bitwise.scala 103:75] + node _T_1277 = or(_T_1272, _T_1276) @[Bitwise.scala 103:39] + node _T_1278 = bits(_T_1270, 6, 0) @[Bitwise.scala 102:28] + node _T_1279 = shl(_T_1278, 1) @[Bitwise.scala 102:47] + node _T_1280 = xor(_T_1270, _T_1279) @[Bitwise.scala 102:21] + node _T_1281 = shr(_T_1277, 1) @[Bitwise.scala 103:21] + node _T_1282 = and(_T_1281, _T_1280) @[Bitwise.scala 103:31] + node _T_1283 = bits(_T_1277, 6, 0) @[Bitwise.scala 103:46] + node _T_1284 = shl(_T_1283, 1) @[Bitwise.scala 103:65] + node _T_1285 = not(_T_1280) @[Bitwise.scala 103:77] + node _T_1286 = and(_T_1284, _T_1285) @[Bitwise.scala 103:75] + node _T_1287 = or(_T_1282, _T_1286) @[Bitwise.scala 103:39] + node _T_1288 = bits(store_byteen_ext_m, 7, 7) @[el2_lsu_dccm_ctl.scala 284:139] + node _T_1289 = bits(_T_1288, 0, 0) @[el2_lsu_dccm_ctl.scala 284:145] + node _T_1290 = bits(store_data_hi_m, 31, 24) @[el2_lsu_dccm_ctl.scala 284:167] + node _T_1291 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_m_hi) @[el2_lsu_dccm_ctl.scala 284:211] + node _T_1292 = bits(_T_1291, 0, 0) @[el2_lsu_dccm_ctl.scala 284:237] + node _T_1293 = bits(io.stbuf_data_any, 31, 24) @[el2_lsu_dccm_ctl.scala 284:262] + node _T_1294 = bits(io.sec_data_hi_m, 31, 24) @[el2_lsu_dccm_ctl.scala 284:292] + node _T_1295 = mux(_T_1292, _T_1293, _T_1294) @[el2_lsu_dccm_ctl.scala 284:185] + node _T_1296 = mux(_T_1289, _T_1290, _T_1295) @[el2_lsu_dccm_ctl.scala 284:120] + node _T_1297 = shl(UInt<4>("h0f"), 4) @[Bitwise.scala 102:47] + node _T_1298 = xor(UInt<8>("h0ff"), _T_1297) @[Bitwise.scala 102:21] + node _T_1299 = shr(_T_1296, 4) @[Bitwise.scala 103:21] + node _T_1300 = and(_T_1299, _T_1298) @[Bitwise.scala 103:31] + node _T_1301 = bits(_T_1296, 3, 0) @[Bitwise.scala 103:46] + node _T_1302 = shl(_T_1301, 4) @[Bitwise.scala 103:65] + node _T_1303 = not(_T_1298) @[Bitwise.scala 103:77] + node _T_1304 = and(_T_1302, _T_1303) @[Bitwise.scala 103:75] + node _T_1305 = or(_T_1300, _T_1304) @[Bitwise.scala 103:39] + node _T_1306 = bits(_T_1298, 5, 0) @[Bitwise.scala 102:28] + node _T_1307 = shl(_T_1306, 2) @[Bitwise.scala 102:47] + node _T_1308 = xor(_T_1298, _T_1307) @[Bitwise.scala 102:21] + node _T_1309 = shr(_T_1305, 2) @[Bitwise.scala 103:21] + node _T_1310 = and(_T_1309, _T_1308) @[Bitwise.scala 103:31] + node _T_1311 = bits(_T_1305, 5, 0) @[Bitwise.scala 103:46] + node _T_1312 = shl(_T_1311, 2) @[Bitwise.scala 103:65] + node _T_1313 = not(_T_1308) @[Bitwise.scala 103:77] + node _T_1314 = and(_T_1312, _T_1313) @[Bitwise.scala 103:75] + node _T_1315 = or(_T_1310, _T_1314) @[Bitwise.scala 103:39] + node _T_1316 = bits(_T_1308, 6, 0) @[Bitwise.scala 102:28] + node _T_1317 = shl(_T_1316, 1) @[Bitwise.scala 102:47] + node _T_1318 = xor(_T_1308, _T_1317) @[Bitwise.scala 102:21] + node _T_1319 = shr(_T_1315, 1) @[Bitwise.scala 103:21] + node _T_1320 = and(_T_1319, _T_1318) @[Bitwise.scala 103:31] + node _T_1321 = bits(_T_1315, 6, 0) @[Bitwise.scala 103:46] + node _T_1322 = shl(_T_1321, 1) @[Bitwise.scala 103:65] + node _T_1323 = not(_T_1318) @[Bitwise.scala 103:77] + node _T_1324 = and(_T_1322, _T_1323) @[Bitwise.scala 103:75] + node _T_1325 = or(_T_1320, _T_1324) @[Bitwise.scala 103:39] + wire _T_1326 : UInt<8>[4] @[el2_lsu_dccm_ctl.scala 284:104] + _T_1326[0] <= _T_1211 @[el2_lsu_dccm_ctl.scala 284:104] + _T_1326[1] <= _T_1249 @[el2_lsu_dccm_ctl.scala 284:104] + _T_1326[2] <= _T_1287 @[el2_lsu_dccm_ctl.scala 284:104] + _T_1326[3] <= _T_1325 @[el2_lsu_dccm_ctl.scala 284:104] + node _T_1327 = cat(_T_1326[2], _T_1326[3]) @[Cat.scala 29:58] + node _T_1328 = cat(_T_1326[0], _T_1326[1]) @[Cat.scala 29:58] + node _T_1329 = cat(_T_1328, _T_1327) @[Cat.scala 29:58] + node _T_1330 = shl(UInt<16>("h0ffff"), 16) @[Bitwise.scala 102:47] + node _T_1331 = xor(UInt<32>("h0ffffffff"), _T_1330) @[Bitwise.scala 102:21] + node _T_1332 = shr(_T_1329, 16) @[Bitwise.scala 103:21] + node _T_1333 = and(_T_1332, _T_1331) @[Bitwise.scala 103:31] + node _T_1334 = bits(_T_1329, 15, 0) @[Bitwise.scala 103:46] + node _T_1335 = shl(_T_1334, 16) @[Bitwise.scala 103:65] + node _T_1336 = not(_T_1331) @[Bitwise.scala 103:77] + node _T_1337 = and(_T_1335, _T_1336) @[Bitwise.scala 103:75] + node _T_1338 = or(_T_1333, _T_1337) @[Bitwise.scala 103:39] + node _T_1339 = bits(_T_1331, 23, 0) @[Bitwise.scala 102:28] + node _T_1340 = shl(_T_1339, 8) @[Bitwise.scala 102:47] + node _T_1341 = xor(_T_1331, _T_1340) @[Bitwise.scala 102:21] + node _T_1342 = shr(_T_1338, 8) @[Bitwise.scala 103:21] + node _T_1343 = and(_T_1342, _T_1341) @[Bitwise.scala 103:31] + node _T_1344 = bits(_T_1338, 23, 0) @[Bitwise.scala 103:46] + node _T_1345 = shl(_T_1344, 8) @[Bitwise.scala 103:65] + node _T_1346 = not(_T_1341) @[Bitwise.scala 103:77] + node _T_1347 = and(_T_1345, _T_1346) @[Bitwise.scala 103:75] + node _T_1348 = or(_T_1343, _T_1347) @[Bitwise.scala 103:39] + node _T_1349 = bits(_T_1341, 27, 0) @[Bitwise.scala 102:28] + node _T_1350 = shl(_T_1349, 4) @[Bitwise.scala 102:47] + node _T_1351 = xor(_T_1341, _T_1350) @[Bitwise.scala 102:21] + node _T_1352 = shr(_T_1348, 4) @[Bitwise.scala 103:21] + node _T_1353 = and(_T_1352, _T_1351) @[Bitwise.scala 103:31] + node _T_1354 = bits(_T_1348, 27, 0) @[Bitwise.scala 103:46] + node _T_1355 = shl(_T_1354, 4) @[Bitwise.scala 103:65] + node _T_1356 = not(_T_1351) @[Bitwise.scala 103:77] + node _T_1357 = and(_T_1355, _T_1356) @[Bitwise.scala 103:75] + node _T_1358 = or(_T_1353, _T_1357) @[Bitwise.scala 103:39] + node _T_1359 = bits(_T_1351, 29, 0) @[Bitwise.scala 102:28] + node _T_1360 = shl(_T_1359, 2) @[Bitwise.scala 102:47] + node _T_1361 = xor(_T_1351, _T_1360) @[Bitwise.scala 102:21] + node _T_1362 = shr(_T_1358, 2) @[Bitwise.scala 103:21] + node _T_1363 = and(_T_1362, _T_1361) @[Bitwise.scala 103:31] + node _T_1364 = bits(_T_1358, 29, 0) @[Bitwise.scala 103:46] + node _T_1365 = shl(_T_1364, 2) @[Bitwise.scala 103:65] + node _T_1366 = not(_T_1361) @[Bitwise.scala 103:77] + node _T_1367 = and(_T_1365, _T_1366) @[Bitwise.scala 103:75] + node _T_1368 = or(_T_1363, _T_1367) @[Bitwise.scala 103:39] + node _T_1369 = bits(_T_1361, 30, 0) @[Bitwise.scala 102:28] + node _T_1370 = shl(_T_1369, 1) @[Bitwise.scala 102:47] + node _T_1371 = xor(_T_1361, _T_1370) @[Bitwise.scala 102:21] + node _T_1372 = shr(_T_1368, 1) @[Bitwise.scala 103:21] + node _T_1373 = and(_T_1372, _T_1371) @[Bitwise.scala 103:31] + node _T_1374 = bits(_T_1368, 30, 0) @[Bitwise.scala 103:46] + node _T_1375 = shl(_T_1374, 1) @[Bitwise.scala 103:65] + node _T_1376 = not(_T_1371) @[Bitwise.scala 103:77] + node _T_1377 = and(_T_1375, _T_1376) @[Bitwise.scala 103:75] + node _T_1378 = or(_T_1373, _T_1377) @[Bitwise.scala 103:39] + reg _T_1379 : UInt, io.lsu_store_c1_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_dccm_ctl.scala 284:72] + _T_1379 <= _T_1378 @[el2_lsu_dccm_ctl.scala 284:72] + io.store_data_hi_r <= _T_1379 @[el2_lsu_dccm_ctl.scala 284:29] + node _T_1380 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_r_lo) @[el2_lsu_dccm_ctl.scala 285:105] + node _T_1381 = bits(store_byteen_ext_r, 0, 0) @[el2_lsu_dccm_ctl.scala 285:150] + node _T_1382 = eq(_T_1381, UInt<1>("h00")) @[el2_lsu_dccm_ctl.scala 285:131] + node _T_1383 = and(_T_1380, _T_1382) @[el2_lsu_dccm_ctl.scala 285:129] + node _T_1384 = bits(_T_1383, 0, 0) @[el2_lsu_dccm_ctl.scala 285:155] + node _T_1385 = bits(io.stbuf_data_any, 7, 0) @[el2_lsu_dccm_ctl.scala 285:179] + node _T_1386 = bits(io.store_data_lo_r, 7, 0) @[el2_lsu_dccm_ctl.scala 285:211] + node _T_1387 = mux(_T_1384, _T_1385, _T_1386) @[el2_lsu_dccm_ctl.scala 285:79] + node _T_1388 = shl(UInt<4>("h0f"), 4) @[Bitwise.scala 102:47] + node _T_1389 = xor(UInt<8>("h0ff"), _T_1388) @[Bitwise.scala 102:21] + node _T_1390 = shr(_T_1387, 4) @[Bitwise.scala 103:21] + node _T_1391 = and(_T_1390, _T_1389) @[Bitwise.scala 103:31] + node _T_1392 = bits(_T_1387, 3, 0) @[Bitwise.scala 103:46] + node _T_1393 = shl(_T_1392, 4) @[Bitwise.scala 103:65] + node _T_1394 = not(_T_1389) @[Bitwise.scala 103:77] + node _T_1395 = and(_T_1393, _T_1394) @[Bitwise.scala 103:75] + node _T_1396 = or(_T_1391, _T_1395) @[Bitwise.scala 103:39] + node _T_1397 = bits(_T_1389, 5, 0) @[Bitwise.scala 102:28] + node _T_1398 = shl(_T_1397, 2) @[Bitwise.scala 102:47] + node _T_1399 = xor(_T_1389, _T_1398) @[Bitwise.scala 102:21] + node _T_1400 = shr(_T_1396, 2) @[Bitwise.scala 103:21] + node _T_1401 = and(_T_1400, _T_1399) @[Bitwise.scala 103:31] + node _T_1402 = bits(_T_1396, 5, 0) @[Bitwise.scala 103:46] + node _T_1403 = shl(_T_1402, 2) @[Bitwise.scala 103:65] + node _T_1404 = not(_T_1399) @[Bitwise.scala 103:77] + node _T_1405 = and(_T_1403, _T_1404) @[Bitwise.scala 103:75] + node _T_1406 = or(_T_1401, _T_1405) @[Bitwise.scala 103:39] + node _T_1407 = bits(_T_1399, 6, 0) @[Bitwise.scala 102:28] + node _T_1408 = shl(_T_1407, 1) @[Bitwise.scala 102:47] + node _T_1409 = xor(_T_1399, _T_1408) @[Bitwise.scala 102:21] + node _T_1410 = shr(_T_1406, 1) @[Bitwise.scala 103:21] + node _T_1411 = and(_T_1410, _T_1409) @[Bitwise.scala 103:31] + node _T_1412 = bits(_T_1406, 6, 0) @[Bitwise.scala 103:46] + node _T_1413 = shl(_T_1412, 1) @[Bitwise.scala 103:65] + node _T_1414 = not(_T_1409) @[Bitwise.scala 103:77] + node _T_1415 = and(_T_1413, _T_1414) @[Bitwise.scala 103:75] + node _T_1416 = or(_T_1411, _T_1415) @[Bitwise.scala 103:39] + node _T_1417 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_r_lo) @[el2_lsu_dccm_ctl.scala 285:105] + node _T_1418 = bits(store_byteen_ext_r, 1, 1) @[el2_lsu_dccm_ctl.scala 285:150] + node _T_1419 = eq(_T_1418, UInt<1>("h00")) @[el2_lsu_dccm_ctl.scala 285:131] + node _T_1420 = and(_T_1417, _T_1419) @[el2_lsu_dccm_ctl.scala 285:129] + node _T_1421 = bits(_T_1420, 0, 0) @[el2_lsu_dccm_ctl.scala 285:155] + node _T_1422 = bits(io.stbuf_data_any, 15, 8) @[el2_lsu_dccm_ctl.scala 285:179] + node _T_1423 = bits(io.store_data_lo_r, 15, 8) @[el2_lsu_dccm_ctl.scala 285:211] + node _T_1424 = mux(_T_1421, _T_1422, _T_1423) @[el2_lsu_dccm_ctl.scala 285:79] + node _T_1425 = shl(UInt<4>("h0f"), 4) @[Bitwise.scala 102:47] + node _T_1426 = xor(UInt<8>("h0ff"), _T_1425) @[Bitwise.scala 102:21] + node _T_1427 = shr(_T_1424, 4) @[Bitwise.scala 103:21] + node _T_1428 = and(_T_1427, _T_1426) @[Bitwise.scala 103:31] + node _T_1429 = bits(_T_1424, 3, 0) @[Bitwise.scala 103:46] + node _T_1430 = shl(_T_1429, 4) @[Bitwise.scala 103:65] + node _T_1431 = not(_T_1426) @[Bitwise.scala 103:77] + node _T_1432 = and(_T_1430, _T_1431) @[Bitwise.scala 103:75] + node _T_1433 = or(_T_1428, _T_1432) @[Bitwise.scala 103:39] + node _T_1434 = bits(_T_1426, 5, 0) @[Bitwise.scala 102:28] + node _T_1435 = shl(_T_1434, 2) @[Bitwise.scala 102:47] + node _T_1436 = xor(_T_1426, _T_1435) @[Bitwise.scala 102:21] + node _T_1437 = shr(_T_1433, 2) @[Bitwise.scala 103:21] + node _T_1438 = and(_T_1437, _T_1436) @[Bitwise.scala 103:31] + node _T_1439 = bits(_T_1433, 5, 0) @[Bitwise.scala 103:46] + node _T_1440 = shl(_T_1439, 2) @[Bitwise.scala 103:65] + node _T_1441 = not(_T_1436) @[Bitwise.scala 103:77] + node _T_1442 = and(_T_1440, _T_1441) @[Bitwise.scala 103:75] + node _T_1443 = or(_T_1438, _T_1442) @[Bitwise.scala 103:39] + node _T_1444 = bits(_T_1436, 6, 0) @[Bitwise.scala 102:28] + node _T_1445 = shl(_T_1444, 1) @[Bitwise.scala 102:47] + node _T_1446 = xor(_T_1436, _T_1445) @[Bitwise.scala 102:21] + node _T_1447 = shr(_T_1443, 1) @[Bitwise.scala 103:21] + node _T_1448 = and(_T_1447, _T_1446) @[Bitwise.scala 103:31] + node _T_1449 = bits(_T_1443, 6, 0) @[Bitwise.scala 103:46] + node _T_1450 = shl(_T_1449, 1) @[Bitwise.scala 103:65] + node _T_1451 = not(_T_1446) @[Bitwise.scala 103:77] + node _T_1452 = and(_T_1450, _T_1451) @[Bitwise.scala 103:75] + node _T_1453 = or(_T_1448, _T_1452) @[Bitwise.scala 103:39] + node _T_1454 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_r_lo) @[el2_lsu_dccm_ctl.scala 285:105] + node _T_1455 = bits(store_byteen_ext_r, 2, 2) @[el2_lsu_dccm_ctl.scala 285:150] + node _T_1456 = eq(_T_1455, UInt<1>("h00")) @[el2_lsu_dccm_ctl.scala 285:131] + node _T_1457 = and(_T_1454, _T_1456) @[el2_lsu_dccm_ctl.scala 285:129] + node _T_1458 = bits(_T_1457, 0, 0) @[el2_lsu_dccm_ctl.scala 285:155] + node _T_1459 = bits(io.stbuf_data_any, 23, 16) @[el2_lsu_dccm_ctl.scala 285:179] + node _T_1460 = bits(io.store_data_lo_r, 23, 16) @[el2_lsu_dccm_ctl.scala 285:211] + node _T_1461 = mux(_T_1458, _T_1459, _T_1460) @[el2_lsu_dccm_ctl.scala 285:79] + node _T_1462 = shl(UInt<4>("h0f"), 4) @[Bitwise.scala 102:47] + node _T_1463 = xor(UInt<8>("h0ff"), _T_1462) @[Bitwise.scala 102:21] + node _T_1464 = shr(_T_1461, 4) @[Bitwise.scala 103:21] + node _T_1465 = and(_T_1464, _T_1463) @[Bitwise.scala 103:31] + node _T_1466 = bits(_T_1461, 3, 0) @[Bitwise.scala 103:46] + node _T_1467 = shl(_T_1466, 4) @[Bitwise.scala 103:65] + node _T_1468 = not(_T_1463) @[Bitwise.scala 103:77] + node _T_1469 = and(_T_1467, _T_1468) @[Bitwise.scala 103:75] + node _T_1470 = or(_T_1465, _T_1469) @[Bitwise.scala 103:39] + node _T_1471 = bits(_T_1463, 5, 0) @[Bitwise.scala 102:28] + node _T_1472 = shl(_T_1471, 2) @[Bitwise.scala 102:47] + node _T_1473 = xor(_T_1463, _T_1472) @[Bitwise.scala 102:21] + node _T_1474 = shr(_T_1470, 2) @[Bitwise.scala 103:21] + node _T_1475 = and(_T_1474, _T_1473) @[Bitwise.scala 103:31] + node _T_1476 = bits(_T_1470, 5, 0) @[Bitwise.scala 103:46] + node _T_1477 = shl(_T_1476, 2) @[Bitwise.scala 103:65] + node _T_1478 = not(_T_1473) @[Bitwise.scala 103:77] + node _T_1479 = and(_T_1477, _T_1478) @[Bitwise.scala 103:75] + node _T_1480 = or(_T_1475, _T_1479) @[Bitwise.scala 103:39] + node _T_1481 = bits(_T_1473, 6, 0) @[Bitwise.scala 102:28] + node _T_1482 = shl(_T_1481, 1) @[Bitwise.scala 102:47] + node _T_1483 = xor(_T_1473, _T_1482) @[Bitwise.scala 102:21] + node _T_1484 = shr(_T_1480, 1) @[Bitwise.scala 103:21] + node _T_1485 = and(_T_1484, _T_1483) @[Bitwise.scala 103:31] + node _T_1486 = bits(_T_1480, 6, 0) @[Bitwise.scala 103:46] + node _T_1487 = shl(_T_1486, 1) @[Bitwise.scala 103:65] + node _T_1488 = not(_T_1483) @[Bitwise.scala 103:77] + node _T_1489 = and(_T_1487, _T_1488) @[Bitwise.scala 103:75] + node _T_1490 = or(_T_1485, _T_1489) @[Bitwise.scala 103:39] + node _T_1491 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_r_lo) @[el2_lsu_dccm_ctl.scala 285:105] + node _T_1492 = bits(store_byteen_ext_r, 3, 3) @[el2_lsu_dccm_ctl.scala 285:150] + node _T_1493 = eq(_T_1492, UInt<1>("h00")) @[el2_lsu_dccm_ctl.scala 285:131] + node _T_1494 = and(_T_1491, _T_1493) @[el2_lsu_dccm_ctl.scala 285:129] + node _T_1495 = bits(_T_1494, 0, 0) @[el2_lsu_dccm_ctl.scala 285:155] + node _T_1496 = bits(io.stbuf_data_any, 31, 24) @[el2_lsu_dccm_ctl.scala 285:179] + node _T_1497 = bits(io.store_data_lo_r, 31, 24) @[el2_lsu_dccm_ctl.scala 285:211] + node _T_1498 = mux(_T_1495, _T_1496, _T_1497) @[el2_lsu_dccm_ctl.scala 285:79] + node _T_1499 = shl(UInt<4>("h0f"), 4) @[Bitwise.scala 102:47] + node _T_1500 = xor(UInt<8>("h0ff"), _T_1499) @[Bitwise.scala 102:21] + node _T_1501 = shr(_T_1498, 4) @[Bitwise.scala 103:21] + node _T_1502 = and(_T_1501, _T_1500) @[Bitwise.scala 103:31] + node _T_1503 = bits(_T_1498, 3, 0) @[Bitwise.scala 103:46] + node _T_1504 = shl(_T_1503, 4) @[Bitwise.scala 103:65] + node _T_1505 = not(_T_1500) @[Bitwise.scala 103:77] + node _T_1506 = and(_T_1504, _T_1505) @[Bitwise.scala 103:75] + node _T_1507 = or(_T_1502, _T_1506) @[Bitwise.scala 103:39] + node _T_1508 = bits(_T_1500, 5, 0) @[Bitwise.scala 102:28] + node _T_1509 = shl(_T_1508, 2) @[Bitwise.scala 102:47] + node _T_1510 = xor(_T_1500, _T_1509) @[Bitwise.scala 102:21] + node _T_1511 = shr(_T_1507, 2) @[Bitwise.scala 103:21] + node _T_1512 = and(_T_1511, _T_1510) @[Bitwise.scala 103:31] + node _T_1513 = bits(_T_1507, 5, 0) @[Bitwise.scala 103:46] + node _T_1514 = shl(_T_1513, 2) @[Bitwise.scala 103:65] + node _T_1515 = not(_T_1510) @[Bitwise.scala 103:77] + node _T_1516 = and(_T_1514, _T_1515) @[Bitwise.scala 103:75] + node _T_1517 = or(_T_1512, _T_1516) @[Bitwise.scala 103:39] + node _T_1518 = bits(_T_1510, 6, 0) @[Bitwise.scala 102:28] + node _T_1519 = shl(_T_1518, 1) @[Bitwise.scala 102:47] + node _T_1520 = xor(_T_1510, _T_1519) @[Bitwise.scala 102:21] + node _T_1521 = shr(_T_1517, 1) @[Bitwise.scala 103:21] + node _T_1522 = and(_T_1521, _T_1520) @[Bitwise.scala 103:31] + node _T_1523 = bits(_T_1517, 6, 0) @[Bitwise.scala 103:46] + node _T_1524 = shl(_T_1523, 1) @[Bitwise.scala 103:65] + node _T_1525 = not(_T_1520) @[Bitwise.scala 103:77] + node _T_1526 = and(_T_1524, _T_1525) @[Bitwise.scala 103:75] + node _T_1527 = or(_T_1522, _T_1526) @[Bitwise.scala 103:39] + wire _T_1528 : UInt<8>[4] @[el2_lsu_dccm_ctl.scala 285:63] + _T_1528[0] <= _T_1416 @[el2_lsu_dccm_ctl.scala 285:63] + _T_1528[1] <= _T_1453 @[el2_lsu_dccm_ctl.scala 285:63] + _T_1528[2] <= _T_1490 @[el2_lsu_dccm_ctl.scala 285:63] + _T_1528[3] <= _T_1527 @[el2_lsu_dccm_ctl.scala 285:63] + node _T_1529 = cat(_T_1528[2], _T_1528[3]) @[Cat.scala 29:58] + node _T_1530 = cat(_T_1528[0], _T_1528[1]) @[Cat.scala 29:58] + node _T_1531 = cat(_T_1530, _T_1529) @[Cat.scala 29:58] + node _T_1532 = shl(UInt<16>("h0ffff"), 16) @[Bitwise.scala 102:47] + node _T_1533 = xor(UInt<32>("h0ffffffff"), _T_1532) @[Bitwise.scala 102:21] + node _T_1534 = shr(_T_1531, 16) @[Bitwise.scala 103:21] + node _T_1535 = and(_T_1534, _T_1533) @[Bitwise.scala 103:31] + node _T_1536 = bits(_T_1531, 15, 0) @[Bitwise.scala 103:46] + node _T_1537 = shl(_T_1536, 16) @[Bitwise.scala 103:65] + node _T_1538 = not(_T_1533) @[Bitwise.scala 103:77] + node _T_1539 = and(_T_1537, _T_1538) @[Bitwise.scala 103:75] + node _T_1540 = or(_T_1535, _T_1539) @[Bitwise.scala 103:39] + node _T_1541 = bits(_T_1533, 23, 0) @[Bitwise.scala 102:28] + node _T_1542 = shl(_T_1541, 8) @[Bitwise.scala 102:47] + node _T_1543 = xor(_T_1533, _T_1542) @[Bitwise.scala 102:21] + node _T_1544 = shr(_T_1540, 8) @[Bitwise.scala 103:21] + node _T_1545 = and(_T_1544, _T_1543) @[Bitwise.scala 103:31] + node _T_1546 = bits(_T_1540, 23, 0) @[Bitwise.scala 103:46] + node _T_1547 = shl(_T_1546, 8) @[Bitwise.scala 103:65] + node _T_1548 = not(_T_1543) @[Bitwise.scala 103:77] + node _T_1549 = and(_T_1547, _T_1548) @[Bitwise.scala 103:75] + node _T_1550 = or(_T_1545, _T_1549) @[Bitwise.scala 103:39] + node _T_1551 = bits(_T_1543, 27, 0) @[Bitwise.scala 102:28] + node _T_1552 = shl(_T_1551, 4) @[Bitwise.scala 102:47] + node _T_1553 = xor(_T_1543, _T_1552) @[Bitwise.scala 102:21] + node _T_1554 = shr(_T_1550, 4) @[Bitwise.scala 103:21] + node _T_1555 = and(_T_1554, _T_1553) @[Bitwise.scala 103:31] + node _T_1556 = bits(_T_1550, 27, 0) @[Bitwise.scala 103:46] + node _T_1557 = shl(_T_1556, 4) @[Bitwise.scala 103:65] + node _T_1558 = not(_T_1553) @[Bitwise.scala 103:77] + node _T_1559 = and(_T_1557, _T_1558) @[Bitwise.scala 103:75] + node _T_1560 = or(_T_1555, _T_1559) @[Bitwise.scala 103:39] + node _T_1561 = bits(_T_1553, 29, 0) @[Bitwise.scala 102:28] + node _T_1562 = shl(_T_1561, 2) @[Bitwise.scala 102:47] + node _T_1563 = xor(_T_1553, _T_1562) @[Bitwise.scala 102:21] + node _T_1564 = shr(_T_1560, 2) @[Bitwise.scala 103:21] + node _T_1565 = and(_T_1564, _T_1563) @[Bitwise.scala 103:31] + node _T_1566 = bits(_T_1560, 29, 0) @[Bitwise.scala 103:46] + node _T_1567 = shl(_T_1566, 2) @[Bitwise.scala 103:65] + node _T_1568 = not(_T_1563) @[Bitwise.scala 103:77] + node _T_1569 = and(_T_1567, _T_1568) @[Bitwise.scala 103:75] + node _T_1570 = or(_T_1565, _T_1569) @[Bitwise.scala 103:39] + node _T_1571 = bits(_T_1563, 30, 0) @[Bitwise.scala 102:28] + node _T_1572 = shl(_T_1571, 1) @[Bitwise.scala 102:47] + node _T_1573 = xor(_T_1563, _T_1572) @[Bitwise.scala 102:21] + node _T_1574 = shr(_T_1570, 1) @[Bitwise.scala 103:21] + node _T_1575 = and(_T_1574, _T_1573) @[Bitwise.scala 103:31] + node _T_1576 = bits(_T_1570, 30, 0) @[Bitwise.scala 103:46] + node _T_1577 = shl(_T_1576, 1) @[Bitwise.scala 103:65] + node _T_1578 = not(_T_1573) @[Bitwise.scala 103:77] + node _T_1579 = and(_T_1577, _T_1578) @[Bitwise.scala 103:75] + node _T_1580 = or(_T_1575, _T_1579) @[Bitwise.scala 103:39] + io.store_datafn_lo_r <= _T_1580 @[el2_lsu_dccm_ctl.scala 285:29] + node _T_1581 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_r_lo) @[el2_lsu_dccm_ctl.scala 286:105] + node _T_1582 = bits(store_byteen_ext_r, 0, 0) @[el2_lsu_dccm_ctl.scala 286:150] + node _T_1583 = eq(_T_1582, UInt<1>("h00")) @[el2_lsu_dccm_ctl.scala 286:131] + node _T_1584 = and(_T_1581, _T_1583) @[el2_lsu_dccm_ctl.scala 286:129] + node _T_1585 = bits(_T_1584, 0, 0) @[el2_lsu_dccm_ctl.scala 286:155] + node _T_1586 = bits(io.stbuf_data_any, 7, 0) @[el2_lsu_dccm_ctl.scala 286:179] + node _T_1587 = bits(io.store_data_hi_r, 7, 0) @[el2_lsu_dccm_ctl.scala 286:211] + node _T_1588 = mux(_T_1585, _T_1586, _T_1587) @[el2_lsu_dccm_ctl.scala 286:79] + node _T_1589 = shl(UInt<4>("h0f"), 4) @[Bitwise.scala 102:47] + node _T_1590 = xor(UInt<8>("h0ff"), _T_1589) @[Bitwise.scala 102:21] + node _T_1591 = shr(_T_1588, 4) @[Bitwise.scala 103:21] + node _T_1592 = and(_T_1591, _T_1590) @[Bitwise.scala 103:31] + node _T_1593 = bits(_T_1588, 3, 0) @[Bitwise.scala 103:46] + node _T_1594 = shl(_T_1593, 4) @[Bitwise.scala 103:65] + node _T_1595 = not(_T_1590) @[Bitwise.scala 103:77] + node _T_1596 = and(_T_1594, _T_1595) @[Bitwise.scala 103:75] + node _T_1597 = or(_T_1592, _T_1596) @[Bitwise.scala 103:39] + node _T_1598 = bits(_T_1590, 5, 0) @[Bitwise.scala 102:28] + node _T_1599 = shl(_T_1598, 2) @[Bitwise.scala 102:47] + node _T_1600 = xor(_T_1590, _T_1599) @[Bitwise.scala 102:21] + node _T_1601 = shr(_T_1597, 2) @[Bitwise.scala 103:21] + node _T_1602 = and(_T_1601, _T_1600) @[Bitwise.scala 103:31] + node _T_1603 = bits(_T_1597, 5, 0) @[Bitwise.scala 103:46] + node _T_1604 = shl(_T_1603, 2) @[Bitwise.scala 103:65] + node _T_1605 = not(_T_1600) @[Bitwise.scala 103:77] + node _T_1606 = and(_T_1604, _T_1605) @[Bitwise.scala 103:75] + node _T_1607 = or(_T_1602, _T_1606) @[Bitwise.scala 103:39] + node _T_1608 = bits(_T_1600, 6, 0) @[Bitwise.scala 102:28] + node _T_1609 = shl(_T_1608, 1) @[Bitwise.scala 102:47] + node _T_1610 = xor(_T_1600, _T_1609) @[Bitwise.scala 102:21] + node _T_1611 = shr(_T_1607, 1) @[Bitwise.scala 103:21] + node _T_1612 = and(_T_1611, _T_1610) @[Bitwise.scala 103:31] + node _T_1613 = bits(_T_1607, 6, 0) @[Bitwise.scala 103:46] + node _T_1614 = shl(_T_1613, 1) @[Bitwise.scala 103:65] + node _T_1615 = not(_T_1610) @[Bitwise.scala 103:77] + node _T_1616 = and(_T_1614, _T_1615) @[Bitwise.scala 103:75] + node _T_1617 = or(_T_1612, _T_1616) @[Bitwise.scala 103:39] + node _T_1618 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_r_lo) @[el2_lsu_dccm_ctl.scala 286:105] + node _T_1619 = bits(store_byteen_ext_r, 1, 1) @[el2_lsu_dccm_ctl.scala 286:150] + node _T_1620 = eq(_T_1619, UInt<1>("h00")) @[el2_lsu_dccm_ctl.scala 286:131] + node _T_1621 = and(_T_1618, _T_1620) @[el2_lsu_dccm_ctl.scala 286:129] + node _T_1622 = bits(_T_1621, 0, 0) @[el2_lsu_dccm_ctl.scala 286:155] + node _T_1623 = bits(io.stbuf_data_any, 15, 8) @[el2_lsu_dccm_ctl.scala 286:179] + node _T_1624 = bits(io.store_data_hi_r, 15, 8) @[el2_lsu_dccm_ctl.scala 286:211] + node _T_1625 = mux(_T_1622, _T_1623, _T_1624) @[el2_lsu_dccm_ctl.scala 286:79] + node _T_1626 = shl(UInt<4>("h0f"), 4) @[Bitwise.scala 102:47] + node _T_1627 = xor(UInt<8>("h0ff"), _T_1626) @[Bitwise.scala 102:21] + node _T_1628 = shr(_T_1625, 4) @[Bitwise.scala 103:21] + node _T_1629 = and(_T_1628, _T_1627) @[Bitwise.scala 103:31] + node _T_1630 = bits(_T_1625, 3, 0) @[Bitwise.scala 103:46] + node _T_1631 = shl(_T_1630, 4) @[Bitwise.scala 103:65] + node _T_1632 = not(_T_1627) @[Bitwise.scala 103:77] + node _T_1633 = and(_T_1631, _T_1632) @[Bitwise.scala 103:75] + node _T_1634 = or(_T_1629, _T_1633) @[Bitwise.scala 103:39] + node _T_1635 = bits(_T_1627, 5, 0) @[Bitwise.scala 102:28] + node _T_1636 = shl(_T_1635, 2) @[Bitwise.scala 102:47] + node _T_1637 = xor(_T_1627, _T_1636) @[Bitwise.scala 102:21] + node _T_1638 = shr(_T_1634, 2) @[Bitwise.scala 103:21] + node _T_1639 = and(_T_1638, _T_1637) @[Bitwise.scala 103:31] + node _T_1640 = bits(_T_1634, 5, 0) @[Bitwise.scala 103:46] + node _T_1641 = shl(_T_1640, 2) @[Bitwise.scala 103:65] + node _T_1642 = not(_T_1637) @[Bitwise.scala 103:77] + node _T_1643 = and(_T_1641, _T_1642) @[Bitwise.scala 103:75] + node _T_1644 = or(_T_1639, _T_1643) @[Bitwise.scala 103:39] + node _T_1645 = bits(_T_1637, 6, 0) @[Bitwise.scala 102:28] + node _T_1646 = shl(_T_1645, 1) @[Bitwise.scala 102:47] + node _T_1647 = xor(_T_1637, _T_1646) @[Bitwise.scala 102:21] + node _T_1648 = shr(_T_1644, 1) @[Bitwise.scala 103:21] + node _T_1649 = and(_T_1648, _T_1647) @[Bitwise.scala 103:31] + node _T_1650 = bits(_T_1644, 6, 0) @[Bitwise.scala 103:46] + node _T_1651 = shl(_T_1650, 1) @[Bitwise.scala 103:65] + node _T_1652 = not(_T_1647) @[Bitwise.scala 103:77] + node _T_1653 = and(_T_1651, _T_1652) @[Bitwise.scala 103:75] + node _T_1654 = or(_T_1649, _T_1653) @[Bitwise.scala 103:39] + node _T_1655 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_r_lo) @[el2_lsu_dccm_ctl.scala 286:105] + node _T_1656 = bits(store_byteen_ext_r, 2, 2) @[el2_lsu_dccm_ctl.scala 286:150] + node _T_1657 = eq(_T_1656, UInt<1>("h00")) @[el2_lsu_dccm_ctl.scala 286:131] + node _T_1658 = and(_T_1655, _T_1657) @[el2_lsu_dccm_ctl.scala 286:129] + node _T_1659 = bits(_T_1658, 0, 0) @[el2_lsu_dccm_ctl.scala 286:155] + node _T_1660 = bits(io.stbuf_data_any, 23, 16) @[el2_lsu_dccm_ctl.scala 286:179] + node _T_1661 = bits(io.store_data_hi_r, 23, 16) @[el2_lsu_dccm_ctl.scala 286:211] + node _T_1662 = mux(_T_1659, _T_1660, _T_1661) @[el2_lsu_dccm_ctl.scala 286:79] + node _T_1663 = shl(UInt<4>("h0f"), 4) @[Bitwise.scala 102:47] + node _T_1664 = xor(UInt<8>("h0ff"), _T_1663) @[Bitwise.scala 102:21] + node _T_1665 = shr(_T_1662, 4) @[Bitwise.scala 103:21] + node _T_1666 = and(_T_1665, _T_1664) @[Bitwise.scala 103:31] + node _T_1667 = bits(_T_1662, 3, 0) @[Bitwise.scala 103:46] + node _T_1668 = shl(_T_1667, 4) @[Bitwise.scala 103:65] + node _T_1669 = not(_T_1664) @[Bitwise.scala 103:77] + node _T_1670 = and(_T_1668, _T_1669) @[Bitwise.scala 103:75] + node _T_1671 = or(_T_1666, _T_1670) @[Bitwise.scala 103:39] + node _T_1672 = bits(_T_1664, 5, 0) @[Bitwise.scala 102:28] + node _T_1673 = shl(_T_1672, 2) @[Bitwise.scala 102:47] + node _T_1674 = xor(_T_1664, _T_1673) @[Bitwise.scala 102:21] + node _T_1675 = shr(_T_1671, 2) @[Bitwise.scala 103:21] + node _T_1676 = and(_T_1675, _T_1674) @[Bitwise.scala 103:31] + node _T_1677 = bits(_T_1671, 5, 0) @[Bitwise.scala 103:46] + node _T_1678 = shl(_T_1677, 2) @[Bitwise.scala 103:65] + node _T_1679 = not(_T_1674) @[Bitwise.scala 103:77] + node _T_1680 = and(_T_1678, _T_1679) @[Bitwise.scala 103:75] + node _T_1681 = or(_T_1676, _T_1680) @[Bitwise.scala 103:39] + node _T_1682 = bits(_T_1674, 6, 0) @[Bitwise.scala 102:28] + node _T_1683 = shl(_T_1682, 1) @[Bitwise.scala 102:47] + node _T_1684 = xor(_T_1674, _T_1683) @[Bitwise.scala 102:21] + node _T_1685 = shr(_T_1681, 1) @[Bitwise.scala 103:21] + node _T_1686 = and(_T_1685, _T_1684) @[Bitwise.scala 103:31] + node _T_1687 = bits(_T_1681, 6, 0) @[Bitwise.scala 103:46] + node _T_1688 = shl(_T_1687, 1) @[Bitwise.scala 103:65] + node _T_1689 = not(_T_1684) @[Bitwise.scala 103:77] + node _T_1690 = and(_T_1688, _T_1689) @[Bitwise.scala 103:75] + node _T_1691 = or(_T_1686, _T_1690) @[Bitwise.scala 103:39] + node _T_1692 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_r_lo) @[el2_lsu_dccm_ctl.scala 286:105] + node _T_1693 = bits(store_byteen_ext_r, 3, 3) @[el2_lsu_dccm_ctl.scala 286:150] + node _T_1694 = eq(_T_1693, UInt<1>("h00")) @[el2_lsu_dccm_ctl.scala 286:131] + node _T_1695 = and(_T_1692, _T_1694) @[el2_lsu_dccm_ctl.scala 286:129] + node _T_1696 = bits(_T_1695, 0, 0) @[el2_lsu_dccm_ctl.scala 286:155] + node _T_1697 = bits(io.stbuf_data_any, 31, 24) @[el2_lsu_dccm_ctl.scala 286:179] + node _T_1698 = bits(io.store_data_hi_r, 31, 24) @[el2_lsu_dccm_ctl.scala 286:211] + node _T_1699 = mux(_T_1696, _T_1697, _T_1698) @[el2_lsu_dccm_ctl.scala 286:79] + node _T_1700 = shl(UInt<4>("h0f"), 4) @[Bitwise.scala 102:47] + node _T_1701 = xor(UInt<8>("h0ff"), _T_1700) @[Bitwise.scala 102:21] + node _T_1702 = shr(_T_1699, 4) @[Bitwise.scala 103:21] + node _T_1703 = and(_T_1702, _T_1701) @[Bitwise.scala 103:31] + node _T_1704 = bits(_T_1699, 3, 0) @[Bitwise.scala 103:46] + node _T_1705 = shl(_T_1704, 4) @[Bitwise.scala 103:65] + node _T_1706 = not(_T_1701) @[Bitwise.scala 103:77] + node _T_1707 = and(_T_1705, _T_1706) @[Bitwise.scala 103:75] + node _T_1708 = or(_T_1703, _T_1707) @[Bitwise.scala 103:39] + node _T_1709 = bits(_T_1701, 5, 0) @[Bitwise.scala 102:28] + node _T_1710 = shl(_T_1709, 2) @[Bitwise.scala 102:47] + node _T_1711 = xor(_T_1701, _T_1710) @[Bitwise.scala 102:21] + node _T_1712 = shr(_T_1708, 2) @[Bitwise.scala 103:21] + node _T_1713 = and(_T_1712, _T_1711) @[Bitwise.scala 103:31] + node _T_1714 = bits(_T_1708, 5, 0) @[Bitwise.scala 103:46] + node _T_1715 = shl(_T_1714, 2) @[Bitwise.scala 103:65] + node _T_1716 = not(_T_1711) @[Bitwise.scala 103:77] + node _T_1717 = and(_T_1715, _T_1716) @[Bitwise.scala 103:75] + node _T_1718 = or(_T_1713, _T_1717) @[Bitwise.scala 103:39] + node _T_1719 = bits(_T_1711, 6, 0) @[Bitwise.scala 102:28] + node _T_1720 = shl(_T_1719, 1) @[Bitwise.scala 102:47] + node _T_1721 = xor(_T_1711, _T_1720) @[Bitwise.scala 102:21] + node _T_1722 = shr(_T_1718, 1) @[Bitwise.scala 103:21] + node _T_1723 = and(_T_1722, _T_1721) @[Bitwise.scala 103:31] + node _T_1724 = bits(_T_1718, 6, 0) @[Bitwise.scala 103:46] + node _T_1725 = shl(_T_1724, 1) @[Bitwise.scala 103:65] + node _T_1726 = not(_T_1721) @[Bitwise.scala 103:77] + node _T_1727 = and(_T_1725, _T_1726) @[Bitwise.scala 103:75] + node _T_1728 = or(_T_1723, _T_1727) @[Bitwise.scala 103:39] + wire _T_1729 : UInt<8>[4] @[el2_lsu_dccm_ctl.scala 286:63] + _T_1729[0] <= _T_1617 @[el2_lsu_dccm_ctl.scala 286:63] + _T_1729[1] <= _T_1654 @[el2_lsu_dccm_ctl.scala 286:63] + _T_1729[2] <= _T_1691 @[el2_lsu_dccm_ctl.scala 286:63] + _T_1729[3] <= _T_1728 @[el2_lsu_dccm_ctl.scala 286:63] + node _T_1730 = cat(_T_1729[2], _T_1729[3]) @[Cat.scala 29:58] + node _T_1731 = cat(_T_1729[0], _T_1729[1]) @[Cat.scala 29:58] + node _T_1732 = cat(_T_1731, _T_1730) @[Cat.scala 29:58] + node _T_1733 = shl(UInt<16>("h0ffff"), 16) @[Bitwise.scala 102:47] + node _T_1734 = xor(UInt<32>("h0ffffffff"), _T_1733) @[Bitwise.scala 102:21] + node _T_1735 = shr(_T_1732, 16) @[Bitwise.scala 103:21] + node _T_1736 = and(_T_1735, _T_1734) @[Bitwise.scala 103:31] + node _T_1737 = bits(_T_1732, 15, 0) @[Bitwise.scala 103:46] + node _T_1738 = shl(_T_1737, 16) @[Bitwise.scala 103:65] + node _T_1739 = not(_T_1734) @[Bitwise.scala 103:77] + node _T_1740 = and(_T_1738, _T_1739) @[Bitwise.scala 103:75] + node _T_1741 = or(_T_1736, _T_1740) @[Bitwise.scala 103:39] + node _T_1742 = bits(_T_1734, 23, 0) @[Bitwise.scala 102:28] + node _T_1743 = shl(_T_1742, 8) @[Bitwise.scala 102:47] + node _T_1744 = xor(_T_1734, _T_1743) @[Bitwise.scala 102:21] + node _T_1745 = shr(_T_1741, 8) @[Bitwise.scala 103:21] + node _T_1746 = and(_T_1745, _T_1744) @[Bitwise.scala 103:31] + node _T_1747 = bits(_T_1741, 23, 0) @[Bitwise.scala 103:46] + node _T_1748 = shl(_T_1747, 8) @[Bitwise.scala 103:65] + node _T_1749 = not(_T_1744) @[Bitwise.scala 103:77] + node _T_1750 = and(_T_1748, _T_1749) @[Bitwise.scala 103:75] + node _T_1751 = or(_T_1746, _T_1750) @[Bitwise.scala 103:39] + node _T_1752 = bits(_T_1744, 27, 0) @[Bitwise.scala 102:28] + node _T_1753 = shl(_T_1752, 4) @[Bitwise.scala 102:47] + node _T_1754 = xor(_T_1744, _T_1753) @[Bitwise.scala 102:21] + node _T_1755 = shr(_T_1751, 4) @[Bitwise.scala 103:21] + node _T_1756 = and(_T_1755, _T_1754) @[Bitwise.scala 103:31] + node _T_1757 = bits(_T_1751, 27, 0) @[Bitwise.scala 103:46] + node _T_1758 = shl(_T_1757, 4) @[Bitwise.scala 103:65] + node _T_1759 = not(_T_1754) @[Bitwise.scala 103:77] + node _T_1760 = and(_T_1758, _T_1759) @[Bitwise.scala 103:75] + node _T_1761 = or(_T_1756, _T_1760) @[Bitwise.scala 103:39] + node _T_1762 = bits(_T_1754, 29, 0) @[Bitwise.scala 102:28] + node _T_1763 = shl(_T_1762, 2) @[Bitwise.scala 102:47] + node _T_1764 = xor(_T_1754, _T_1763) @[Bitwise.scala 102:21] + node _T_1765 = shr(_T_1761, 2) @[Bitwise.scala 103:21] + node _T_1766 = and(_T_1765, _T_1764) @[Bitwise.scala 103:31] + node _T_1767 = bits(_T_1761, 29, 0) @[Bitwise.scala 103:46] + node _T_1768 = shl(_T_1767, 2) @[Bitwise.scala 103:65] + node _T_1769 = not(_T_1764) @[Bitwise.scala 103:77] + node _T_1770 = and(_T_1768, _T_1769) @[Bitwise.scala 103:75] + node _T_1771 = or(_T_1766, _T_1770) @[Bitwise.scala 103:39] + node _T_1772 = bits(_T_1764, 30, 0) @[Bitwise.scala 102:28] + node _T_1773 = shl(_T_1772, 1) @[Bitwise.scala 102:47] + node _T_1774 = xor(_T_1764, _T_1773) @[Bitwise.scala 102:21] + node _T_1775 = shr(_T_1771, 1) @[Bitwise.scala 103:21] + node _T_1776 = and(_T_1775, _T_1774) @[Bitwise.scala 103:31] + node _T_1777 = bits(_T_1771, 30, 0) @[Bitwise.scala 103:46] + node _T_1778 = shl(_T_1777, 1) @[Bitwise.scala 103:65] + node _T_1779 = not(_T_1774) @[Bitwise.scala 103:77] + node _T_1780 = and(_T_1778, _T_1779) @[Bitwise.scala 103:75] + node _T_1781 = or(_T_1776, _T_1780) @[Bitwise.scala 103:39] + io.store_datafn_hi_r <= _T_1781 @[el2_lsu_dccm_ctl.scala 286:29] + node _T_1782 = bits(io.store_data_hi_r, 31, 0) @[el2_lsu_dccm_ctl.scala 287:55] + node _T_1783 = bits(io.store_data_lo_r, 31, 0) @[el2_lsu_dccm_ctl.scala 287:80] + node _T_1784 = cat(_T_1782, _T_1783) @[Cat.scala 29:58] + node _T_1785 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_dccm_ctl.scala 287:108] + node _T_1786 = mul(UInt<4>("h08"), _T_1785) @[el2_lsu_dccm_ctl.scala 287:94] + node _T_1787 = dshr(_T_1784, _T_1786) @[el2_lsu_dccm_ctl.scala 287:88] + node _T_1788 = bits(store_byteen_r, 0, 0) @[el2_lsu_dccm_ctl.scala 287:174] + node _T_1789 = bits(_T_1788, 0, 0) @[Bitwise.scala 72:15] + node _T_1790 = mux(_T_1789, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1791 = bits(store_byteen_r, 1, 1) @[el2_lsu_dccm_ctl.scala 287:174] + node _T_1792 = bits(_T_1791, 0, 0) @[Bitwise.scala 72:15] + node _T_1793 = mux(_T_1792, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1794 = bits(store_byteen_r, 2, 2) @[el2_lsu_dccm_ctl.scala 287:174] + node _T_1795 = bits(_T_1794, 0, 0) @[Bitwise.scala 72:15] + node _T_1796 = mux(_T_1795, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1797 = bits(store_byteen_r, 3, 3) @[el2_lsu_dccm_ctl.scala 287:174] + node _T_1798 = bits(_T_1797, 0, 0) @[Bitwise.scala 72:15] + node _T_1799 = mux(_T_1798, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + wire _T_1800 : UInt<8>[4] @[el2_lsu_dccm_ctl.scala 287:148] + _T_1800[0] <= _T_1790 @[el2_lsu_dccm_ctl.scala 287:148] + _T_1800[1] <= _T_1793 @[el2_lsu_dccm_ctl.scala 287:148] + _T_1800[2] <= _T_1796 @[el2_lsu_dccm_ctl.scala 287:148] + _T_1800[3] <= _T_1799 @[el2_lsu_dccm_ctl.scala 287:148] + node _T_1801 = cat(_T_1800[2], _T_1800[3]) @[Cat.scala 29:58] + node _T_1802 = cat(_T_1800[0], _T_1800[1]) @[Cat.scala 29:58] + node _T_1803 = cat(_T_1802, _T_1801) @[Cat.scala 29:58] + node _T_1804 = shl(UInt<16>("h0ffff"), 16) @[Bitwise.scala 102:47] + node _T_1805 = xor(UInt<32>("h0ffffffff"), _T_1804) @[Bitwise.scala 102:21] + node _T_1806 = shr(_T_1803, 16) @[Bitwise.scala 103:21] + node _T_1807 = and(_T_1806, _T_1805) @[Bitwise.scala 103:31] + node _T_1808 = bits(_T_1803, 15, 0) @[Bitwise.scala 103:46] + node _T_1809 = shl(_T_1808, 16) @[Bitwise.scala 103:65] + node _T_1810 = not(_T_1805) @[Bitwise.scala 103:77] + node _T_1811 = and(_T_1809, _T_1810) @[Bitwise.scala 103:75] + node _T_1812 = or(_T_1807, _T_1811) @[Bitwise.scala 103:39] + node _T_1813 = bits(_T_1805, 23, 0) @[Bitwise.scala 102:28] + node _T_1814 = shl(_T_1813, 8) @[Bitwise.scala 102:47] + node _T_1815 = xor(_T_1805, _T_1814) @[Bitwise.scala 102:21] + node _T_1816 = shr(_T_1812, 8) @[Bitwise.scala 103:21] + node _T_1817 = and(_T_1816, _T_1815) @[Bitwise.scala 103:31] + node _T_1818 = bits(_T_1812, 23, 0) @[Bitwise.scala 103:46] + node _T_1819 = shl(_T_1818, 8) @[Bitwise.scala 103:65] + node _T_1820 = not(_T_1815) @[Bitwise.scala 103:77] + node _T_1821 = and(_T_1819, _T_1820) @[Bitwise.scala 103:75] + node _T_1822 = or(_T_1817, _T_1821) @[Bitwise.scala 103:39] + node _T_1823 = bits(_T_1815, 27, 0) @[Bitwise.scala 102:28] + node _T_1824 = shl(_T_1823, 4) @[Bitwise.scala 102:47] + node _T_1825 = xor(_T_1815, _T_1824) @[Bitwise.scala 102:21] + node _T_1826 = shr(_T_1822, 4) @[Bitwise.scala 103:21] + node _T_1827 = and(_T_1826, _T_1825) @[Bitwise.scala 103:31] + node _T_1828 = bits(_T_1822, 27, 0) @[Bitwise.scala 103:46] + node _T_1829 = shl(_T_1828, 4) @[Bitwise.scala 103:65] + node _T_1830 = not(_T_1825) @[Bitwise.scala 103:77] + node _T_1831 = and(_T_1829, _T_1830) @[Bitwise.scala 103:75] + node _T_1832 = or(_T_1827, _T_1831) @[Bitwise.scala 103:39] + node _T_1833 = bits(_T_1825, 29, 0) @[Bitwise.scala 102:28] + node _T_1834 = shl(_T_1833, 2) @[Bitwise.scala 102:47] + node _T_1835 = xor(_T_1825, _T_1834) @[Bitwise.scala 102:21] + node _T_1836 = shr(_T_1832, 2) @[Bitwise.scala 103:21] + node _T_1837 = and(_T_1836, _T_1835) @[Bitwise.scala 103:31] + node _T_1838 = bits(_T_1832, 29, 0) @[Bitwise.scala 103:46] + node _T_1839 = shl(_T_1838, 2) @[Bitwise.scala 103:65] + node _T_1840 = not(_T_1835) @[Bitwise.scala 103:77] + node _T_1841 = and(_T_1839, _T_1840) @[Bitwise.scala 103:75] + node _T_1842 = or(_T_1837, _T_1841) @[Bitwise.scala 103:39] + node _T_1843 = bits(_T_1835, 30, 0) @[Bitwise.scala 102:28] + node _T_1844 = shl(_T_1843, 1) @[Bitwise.scala 102:47] + node _T_1845 = xor(_T_1835, _T_1844) @[Bitwise.scala 102:21] + node _T_1846 = shr(_T_1842, 1) @[Bitwise.scala 103:21] + node _T_1847 = and(_T_1846, _T_1845) @[Bitwise.scala 103:31] + node _T_1848 = bits(_T_1842, 30, 0) @[Bitwise.scala 103:46] + node _T_1849 = shl(_T_1848, 1) @[Bitwise.scala 103:65] + node _T_1850 = not(_T_1845) @[Bitwise.scala 103:77] + node _T_1851 = and(_T_1849, _T_1850) @[Bitwise.scala 103:75] + node _T_1852 = or(_T_1847, _T_1851) @[Bitwise.scala 103:39] + node _T_1853 = and(_T_1787, _T_1852) @[el2_lsu_dccm_ctl.scala 287:115] + io.store_data_r <= _T_1853 @[el2_lsu_dccm_ctl.scala 287:29] + node _T_1854 = bits(io.dccm_rd_data_lo, 31, 0) @[el2_lsu_dccm_ctl.scala 289:48] + io.dccm_rdata_lo_m <= _T_1854 @[el2_lsu_dccm_ctl.scala 289:27] + node _T_1855 = bits(io.dccm_rd_data_hi, 31, 0) @[el2_lsu_dccm_ctl.scala 290:48] + io.dccm_rdata_hi_m <= _T_1855 @[el2_lsu_dccm_ctl.scala 290:27] + node _T_1856 = bits(io.dccm_rd_data_lo, 38, 32) @[el2_lsu_dccm_ctl.scala 291:48] + io.dccm_data_ecc_lo_m <= _T_1856 @[el2_lsu_dccm_ctl.scala 291:27] + node _T_1857 = bits(io.dccm_rd_data_hi, 38, 32) @[el2_lsu_dccm_ctl.scala 292:48] + io.dccm_data_ecc_hi_m <= _T_1857 @[el2_lsu_dccm_ctl.scala 292:27] + node _T_1858 = and(io.lsu_pkt_r.valid, io.lsu_pkt_r.store) @[el2_lsu_dccm_ctl.scala 294:50] + node _T_1859 = and(_T_1858, io.addr_in_pic_r) @[el2_lsu_dccm_ctl.scala 294:71] + node _T_1860 = and(_T_1859, io.lsu_commit_r) @[el2_lsu_dccm_ctl.scala 294:90] + node _T_1861 = or(_T_1860, io.dma_pic_wen) @[el2_lsu_dccm_ctl.scala 294:109] + io.picm_wren <= _T_1861 @[el2_lsu_dccm_ctl.scala 294:27] + node _T_1862 = and(io.lsu_pkt_d.valid, io.lsu_pkt_d.load) @[el2_lsu_dccm_ctl.scala 295:50] + node _T_1863 = and(_T_1862, io.addr_in_pic_d) @[el2_lsu_dccm_ctl.scala 295:71] + io.picm_rden <= _T_1863 @[el2_lsu_dccm_ctl.scala 295:27] + node _T_1864 = and(io.lsu_pkt_d.valid, io.lsu_pkt_d.store) @[el2_lsu_dccm_ctl.scala 296:50] + node _T_1865 = and(_T_1864, io.addr_in_pic_d) @[el2_lsu_dccm_ctl.scala 296:71] + io.picm_mken <= _T_1865 @[el2_lsu_dccm_ctl.scala 296:27] + node _T_1866 = mux(UInt<1>("h00"), UInt<17>("h01ffff"), UInt<17>("h00")) @[Bitwise.scala 72:12] + node _T_1867 = bits(io.lsu_addr_d, 14, 0) @[el2_lsu_dccm_ctl.scala 297:87] + node _T_1868 = cat(_T_1866, _T_1867) @[Cat.scala 29:58] + node _T_1869 = or(UInt<32>("h0f00c0000"), _T_1868) @[el2_lsu_dccm_ctl.scala 297:46] + io.picm_rdaddr <= _T_1869 @[el2_lsu_dccm_ctl.scala 297:27] + node _T_1870 = mux(UInt<1>("h00"), UInt<17>("h01ffff"), UInt<17>("h00")) @[Bitwise.scala 72:12] + node _T_1871 = bits(io.dma_pic_wen, 0, 0) @[el2_lsu_dccm_ctl.scala 298:93] + node _T_1872 = bits(io.dma_mem_addr, 14, 0) @[el2_lsu_dccm_ctl.scala 298:115] + node _T_1873 = bits(io.lsu_addr_r, 14, 0) @[el2_lsu_dccm_ctl.scala 298:143] + node _T_1874 = mux(_T_1871, _T_1872, _T_1873) @[el2_lsu_dccm_ctl.scala 298:77] + node _T_1875 = cat(_T_1870, _T_1874) @[Cat.scala 29:58] + node _T_1876 = or(UInt<32>("h0f00c0000"), _T_1875) @[el2_lsu_dccm_ctl.scala 298:46] + io.picm_wraddr <= _T_1876 @[el2_lsu_dccm_ctl.scala 298:27] + node _T_1877 = bits(picm_rd_data_m, 31, 0) @[el2_lsu_dccm_ctl.scala 299:44] + io.picm_mask_data_m <= _T_1877 @[el2_lsu_dccm_ctl.scala 299:27] + node _T_1878 = bits(io.dma_pic_wen, 0, 0) @[el2_lsu_dccm_ctl.scala 300:49] + node _T_1879 = bits(io.dma_mem_wdata, 31, 0) @[el2_lsu_dccm_ctl.scala 300:72] + node _T_1880 = bits(io.store_datafn_lo_r, 31, 0) @[el2_lsu_dccm_ctl.scala 300:99] + node _T_1881 = mux(_T_1878, _T_1879, _T_1880) @[el2_lsu_dccm_ctl.scala 300:33] + io.picm_wr_data <= _T_1881 @[el2_lsu_dccm_ctl.scala 300:27] + reg _T_1882 : UInt, io.lsu_c2_m_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_dccm_ctl.scala 303:61] + _T_1882 <= lsu_dccm_rden_d @[el2_lsu_dccm_ctl.scala 303:61] + io.lsu_dccm_rden_m <= _T_1882 @[el2_lsu_dccm_ctl.scala 303:24] + reg _T_1883 : UInt, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_dccm_ctl.scala 304:61] + _T_1883 <= io.lsu_dccm_rden_m @[el2_lsu_dccm_ctl.scala 304:61] + io.lsu_dccm_rden_r <= _T_1883 @[el2_lsu_dccm_ctl.scala 304:24] + + extmodule TEC_RV_ICG_2 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_2 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_2 @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + extmodule TEC_RV_ICG_3 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_3 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_3 @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + extmodule TEC_RV_ICG_4 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_4 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_4 @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + extmodule TEC_RV_ICG_5 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_5 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_5 @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + extmodule TEC_RV_ICG_6 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_6 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_6 @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + extmodule TEC_RV_ICG_7 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_7 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_7 @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + extmodule TEC_RV_ICG_8 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_8 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_8 @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + extmodule TEC_RV_ICG_9 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_9 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_9 @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + module el2_lsu_stbuf : + input clock : Clock + input reset : AsyncReset + output io : {flip lsu_c1_m_clk : Clock, flip lsu_c1_r_clk : Clock, flip lsu_stbuf_c1_clk : Clock, flip lsu_free_c2_clk : Clock, flip lsu_pkt_m : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip lsu_pkt_r : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip store_stbuf_reqvld_r : UInt<1>, flip lsu_commit_r : UInt<1>, flip dec_lsu_valid_raw_d : UInt<1>, flip store_data_hi_r : UInt<32>, flip store_data_lo_r : UInt<32>, flip store_datafn_hi_r : UInt<32>, flip store_datafn_lo_r : UInt<32>, flip lsu_stbuf_commit_any : UInt<1>, flip lsu_addr_d : UInt<16>, flip lsu_addr_m : UInt<32>, flip lsu_addr_r : UInt<32>, flip end_addr_d : UInt<16>, flip end_addr_m : UInt<32>, flip end_addr_r : UInt<32>, flip addr_in_dccm_m : UInt<1>, flip addr_in_dccm_r : UInt<1>, flip lsu_cmpen_m : UInt<1>, flip scan_mode : UInt<1>, stbuf_reqvld_any : UInt<1>, stbuf_reqvld_flushed_any : UInt<1>, stbuf_addr_any : UInt<16>, stbuf_data_any : UInt<32>, lsu_stbuf_full_any : UInt<1>, lsu_stbuf_empty_any : UInt<1>, ldst_stbuf_reqvld_r : UInt<1>, stbuf_fwddata_hi_m : UInt<32>, stbuf_fwddata_lo_m : UInt<32>, stbuf_fwdbyteen_hi_m : UInt<4>, stbuf_fwdbyteen_lo_m : UInt<4>} + + io.stbuf_reqvld_any <= UInt<1>("h00") @[el2_lsu_stbuf.scala 52:47] + io.stbuf_reqvld_flushed_any <= UInt<1>("h00") @[el2_lsu_stbuf.scala 53:35] + io.stbuf_addr_any <= UInt<1>("h00") @[el2_lsu_stbuf.scala 54:35] + io.stbuf_data_any <= UInt<1>("h00") @[el2_lsu_stbuf.scala 55:35] + io.lsu_stbuf_full_any <= UInt<1>("h00") @[el2_lsu_stbuf.scala 56:43] + io.lsu_stbuf_empty_any <= UInt<1>("h00") @[el2_lsu_stbuf.scala 57:43] + io.ldst_stbuf_reqvld_r <= UInt<1>("h00") @[el2_lsu_stbuf.scala 58:43] + io.stbuf_fwddata_hi_m <= UInt<1>("h00") @[el2_lsu_stbuf.scala 59:43] + io.stbuf_fwddata_lo_m <= UInt<1>("h00") @[el2_lsu_stbuf.scala 60:43] + io.stbuf_fwdbyteen_hi_m <= UInt<1>("h00") @[el2_lsu_stbuf.scala 61:37] + io.stbuf_fwdbyteen_lo_m <= UInt<1>("h00") @[el2_lsu_stbuf.scala 62:37] + wire stbuf_vld : UInt<4> + stbuf_vld <= UInt<1>("h00") + wire stbuf_wr_en : UInt<4> + stbuf_wr_en <= UInt<1>("h00") + wire stbuf_dma_kill_en : UInt<4> + stbuf_dma_kill_en <= UInt<1>("h00") + wire stbuf_dma_kill : UInt<4> + stbuf_dma_kill <= UInt<1>("h00") + wire stbuf_reset : UInt<4> + stbuf_reset <= UInt<1>("h00") + wire store_byteen_ext_r : UInt<8> + store_byteen_ext_r <= UInt<1>("h00") + wire stbuf_addr : UInt<16>[4] @[el2_lsu_stbuf.scala 71:38] + stbuf_addr[0] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 72:14] + stbuf_addr[1] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 72:14] + stbuf_addr[2] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 72:14] + stbuf_addr[3] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 72:14] + wire stbuf_byteen : UInt<4>[4] @[el2_lsu_stbuf.scala 73:38] + stbuf_byteen[0] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 74:16] + stbuf_byteen[1] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 74:16] + stbuf_byteen[2] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 74:16] + stbuf_byteen[3] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 74:16] + wire stbuf_data : UInt<32>[4] @[el2_lsu_stbuf.scala 75:38] + stbuf_data[0] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 76:14] + stbuf_data[1] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 76:14] + stbuf_data[2] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 76:14] + stbuf_data[3] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 76:14] + wire stbuf_addrin : UInt<16>[4] @[el2_lsu_stbuf.scala 77:38] + stbuf_addrin[0] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 78:16] + stbuf_addrin[1] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 78:16] + stbuf_addrin[2] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 78:16] + stbuf_addrin[3] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 78:16] + wire stbuf_datain : UInt<32>[4] @[el2_lsu_stbuf.scala 79:38] + stbuf_datain[0] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 80:16] + stbuf_datain[1] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 80:16] + stbuf_datain[2] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 80:16] + stbuf_datain[3] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 80:16] + wire stbuf_byteenin : UInt<4>[4] @[el2_lsu_stbuf.scala 81:38] + stbuf_byteenin[0] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 82:18] + stbuf_byteenin[1] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 82:18] + stbuf_byteenin[2] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 82:18] + stbuf_byteenin[3] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 82:18] + wire WrPtr : UInt<2> + WrPtr <= UInt<1>("h00") + wire RdPtr : UInt<2> + RdPtr <= UInt<1>("h00") + wire ldst_dual_m : UInt<1> + ldst_dual_m <= UInt<1>("h00") + wire ldst_dual_r : UInt<1> + ldst_dual_r <= UInt<1>("h00") + wire cmpaddr_hi_m : UInt<16> + cmpaddr_hi_m <= UInt<16>("h00") + wire stbuf_specvld_m : UInt<2> + stbuf_specvld_m <= UInt<2>("h00") + wire stbuf_specvld_r : UInt<2> + stbuf_specvld_r <= UInt<2>("h00") + wire cmpaddr_lo_m : UInt<16> + cmpaddr_lo_m <= UInt<16>("h00") + wire stbuf_fwdata_hi_pre_m : UInt<32> + stbuf_fwdata_hi_pre_m <= UInt<1>("h00") + wire stbuf_fwdata_lo_pre_m : UInt<32> + stbuf_fwdata_lo_pre_m <= UInt<1>("h00") + wire ld_byte_rhit_lo_lo : UInt<4> + ld_byte_rhit_lo_lo <= UInt<1>("h00") + wire ld_byte_rhit_hi_lo : UInt<4> + ld_byte_rhit_hi_lo <= UInt<1>("h00") + wire ld_byte_rhit_lo_hi : UInt<4> + ld_byte_rhit_lo_hi <= UInt<1>("h00") + wire ld_byte_rhit_hi_hi : UInt<4> + ld_byte_rhit_hi_hi <= UInt<1>("h00") + wire ld_byte_hit_lo : UInt<4> + ld_byte_hit_lo <= UInt<1>("h00") + wire ld_byte_rhit_lo : UInt<4> + ld_byte_rhit_lo <= UInt<1>("h00") + wire ld_byte_hit_hi : UInt<4> + ld_byte_hit_hi <= UInt<1>("h00") + wire ld_byte_rhit_hi : UInt<4> + ld_byte_rhit_hi <= UInt<1>("h00") + wire ldst_byteen_ext_r : UInt<8> + ldst_byteen_ext_r <= UInt<1>("h00") + wire ld_fwddata_rpipe_lo : UInt<32> + ld_fwddata_rpipe_lo <= UInt<1>("h00") + wire ld_fwddata_rpipe_hi : UInt<32> + ld_fwddata_rpipe_hi <= UInt<1>("h00") + wire datain1 : UInt<8>[4] @[el2_lsu_stbuf.scala 106:33] + wire datain2 : UInt<8>[4] @[el2_lsu_stbuf.scala 107:33] + wire datain3 : UInt<8>[4] @[el2_lsu_stbuf.scala 108:33] + wire datain4 : UInt<8>[4] @[el2_lsu_stbuf.scala 109:33] + node _T = bits(io.lsu_pkt_r.by, 0, 0) @[el2_lsu_stbuf.scala 113:21] + node _T_1 = bits(io.lsu_pkt_r.half, 0, 0) @[el2_lsu_stbuf.scala 114:23] + node _T_2 = bits(io.lsu_pkt_r.word, 0, 0) @[el2_lsu_stbuf.scala 115:23] + node _T_3 = bits(io.lsu_pkt_r.dword, 0, 0) @[el2_lsu_stbuf.scala 116:24] + node _T_4 = mux(_T, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_5 = mux(_T_1, UInt<2>("h03"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_6 = mux(_T_2, UInt<4>("h0f"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_7 = mux(_T_3, UInt<8>("h0ff"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_8 = or(_T_4, _T_5) @[Mux.scala 27:72] + node _T_9 = or(_T_8, _T_6) @[Mux.scala 27:72] + node _T_10 = or(_T_9, _T_7) @[Mux.scala 27:72] + wire ldst_byteen_r : UInt<8> @[Mux.scala 27:72] + ldst_byteen_r <= _T_10 @[Mux.scala 27:72] + node _T_11 = bits(io.lsu_addr_d, 2, 2) @[el2_lsu_stbuf.scala 118:35] + node _T_12 = bits(io.end_addr_d, 2, 2) @[el2_lsu_stbuf.scala 118:56] + node ldst_dual_d = neq(_T_11, _T_12) @[el2_lsu_stbuf.scala 118:39] + node dual_stbuf_write_r = and(ldst_dual_r, io.store_stbuf_reqvld_r) @[el2_lsu_stbuf.scala 119:40] + node _T_13 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_stbuf.scala 121:55] + node _T_14 = dshl(ldst_byteen_r, _T_13) @[el2_lsu_stbuf.scala 121:39] + store_byteen_ext_r <= _T_14 @[el2_lsu_stbuf.scala 121:22] + node _T_15 = bits(store_byteen_ext_r, 7, 4) @[el2_lsu_stbuf.scala 122:46] + node _T_16 = bits(io.lsu_pkt_r.store, 0, 0) @[Bitwise.scala 72:15] + node _T_17 = mux(_T_16, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node store_byteen_hi_r = and(_T_15, _T_17) @[el2_lsu_stbuf.scala 122:52] + node _T_18 = bits(store_byteen_ext_r, 3, 0) @[el2_lsu_stbuf.scala 123:46] + node _T_19 = bits(io.lsu_pkt_r.store, 0, 0) @[Bitwise.scala 72:15] + node _T_20 = mux(_T_19, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node store_byteen_lo_r = and(_T_18, _T_20) @[el2_lsu_stbuf.scala 123:52] + node _T_21 = add(RdPtr, UInt<1>("h01")) @[el2_lsu_stbuf.scala 125:26] + node RdPtrPlus1 = tail(_T_21, 1) @[el2_lsu_stbuf.scala 125:26] + node _T_22 = add(WrPtr, UInt<1>("h01")) @[el2_lsu_stbuf.scala 126:26] + node WrPtrPlus1 = tail(_T_22, 1) @[el2_lsu_stbuf.scala 126:26] + node _T_23 = add(WrPtr, UInt<2>("h02")) @[el2_lsu_stbuf.scala 127:26] + node WrPtrPlus2 = tail(_T_23, 1) @[el2_lsu_stbuf.scala 127:26] + node _T_24 = and(io.lsu_commit_r, io.store_stbuf_reqvld_r) @[el2_lsu_stbuf.scala 129:45] + io.ldst_stbuf_reqvld_r <= _T_24 @[el2_lsu_stbuf.scala 129:26] + node _T_25 = bits(stbuf_addr[0], 15, 2) @[el2_lsu_stbuf.scala 131:78] + node _T_26 = bits(io.lsu_addr_r, 15, 2) @[el2_lsu_stbuf.scala 131:137] + node _T_27 = eq(_T_25, _T_26) @[el2_lsu_stbuf.scala 131:120] + node _T_28 = bits(stbuf_vld, 0, 0) @[el2_lsu_stbuf.scala 131:191] + node _T_29 = and(_T_27, _T_28) @[el2_lsu_stbuf.scala 131:179] + node _T_30 = bits(stbuf_dma_kill, 0, 0) @[el2_lsu_stbuf.scala 131:212] + node _T_31 = eq(_T_30, UInt<1>("h00")) @[el2_lsu_stbuf.scala 131:197] + node _T_32 = and(_T_29, _T_31) @[el2_lsu_stbuf.scala 131:195] + node _T_33 = bits(stbuf_reset, 0, 0) @[el2_lsu_stbuf.scala 131:230] + node _T_34 = eq(_T_33, UInt<1>("h00")) @[el2_lsu_stbuf.scala 131:218] + node _T_35 = and(_T_32, _T_34) @[el2_lsu_stbuf.scala 131:216] + node _T_36 = bits(stbuf_addr[1], 15, 2) @[el2_lsu_stbuf.scala 131:78] + node _T_37 = bits(io.lsu_addr_r, 15, 2) @[el2_lsu_stbuf.scala 131:137] + node _T_38 = eq(_T_36, _T_37) @[el2_lsu_stbuf.scala 131:120] + node _T_39 = bits(stbuf_vld, 1, 1) @[el2_lsu_stbuf.scala 131:191] + node _T_40 = and(_T_38, _T_39) @[el2_lsu_stbuf.scala 131:179] + node _T_41 = bits(stbuf_dma_kill, 1, 1) @[el2_lsu_stbuf.scala 131:212] + node _T_42 = eq(_T_41, UInt<1>("h00")) @[el2_lsu_stbuf.scala 131:197] + node _T_43 = and(_T_40, _T_42) @[el2_lsu_stbuf.scala 131:195] + node _T_44 = bits(stbuf_reset, 1, 1) @[el2_lsu_stbuf.scala 131:230] + node _T_45 = eq(_T_44, UInt<1>("h00")) @[el2_lsu_stbuf.scala 131:218] + node _T_46 = and(_T_43, _T_45) @[el2_lsu_stbuf.scala 131:216] + node _T_47 = bits(stbuf_addr[2], 15, 2) @[el2_lsu_stbuf.scala 131:78] + node _T_48 = bits(io.lsu_addr_r, 15, 2) @[el2_lsu_stbuf.scala 131:137] + node _T_49 = eq(_T_47, _T_48) @[el2_lsu_stbuf.scala 131:120] + node _T_50 = bits(stbuf_vld, 2, 2) @[el2_lsu_stbuf.scala 131:191] + node _T_51 = and(_T_49, _T_50) @[el2_lsu_stbuf.scala 131:179] + node _T_52 = bits(stbuf_dma_kill, 2, 2) @[el2_lsu_stbuf.scala 131:212] + node _T_53 = eq(_T_52, UInt<1>("h00")) @[el2_lsu_stbuf.scala 131:197] + node _T_54 = and(_T_51, _T_53) @[el2_lsu_stbuf.scala 131:195] + node _T_55 = bits(stbuf_reset, 2, 2) @[el2_lsu_stbuf.scala 131:230] + node _T_56 = eq(_T_55, UInt<1>("h00")) @[el2_lsu_stbuf.scala 131:218] + node _T_57 = and(_T_54, _T_56) @[el2_lsu_stbuf.scala 131:216] + node _T_58 = bits(stbuf_addr[3], 15, 2) @[el2_lsu_stbuf.scala 131:78] + node _T_59 = bits(io.lsu_addr_r, 15, 2) @[el2_lsu_stbuf.scala 131:137] + node _T_60 = eq(_T_58, _T_59) @[el2_lsu_stbuf.scala 131:120] + node _T_61 = bits(stbuf_vld, 3, 3) @[el2_lsu_stbuf.scala 131:191] + node _T_62 = and(_T_60, _T_61) @[el2_lsu_stbuf.scala 131:179] + node _T_63 = bits(stbuf_dma_kill, 3, 3) @[el2_lsu_stbuf.scala 131:212] + node _T_64 = eq(_T_63, UInt<1>("h00")) @[el2_lsu_stbuf.scala 131:197] + node _T_65 = and(_T_62, _T_64) @[el2_lsu_stbuf.scala 131:195] + node _T_66 = bits(stbuf_reset, 3, 3) @[el2_lsu_stbuf.scala 131:230] + node _T_67 = eq(_T_66, UInt<1>("h00")) @[el2_lsu_stbuf.scala 131:218] + node _T_68 = and(_T_65, _T_67) @[el2_lsu_stbuf.scala 131:216] + node _T_69 = cat(_T_68, _T_57) @[Cat.scala 29:58] + node _T_70 = cat(_T_69, _T_46) @[Cat.scala 29:58] + node store_matchvec_lo_r = cat(_T_70, _T_35) @[Cat.scala 29:58] + node _T_71 = bits(stbuf_addr[0], 15, 2) @[el2_lsu_stbuf.scala 132:78] + node _T_72 = bits(io.end_addr_r, 15, 2) @[el2_lsu_stbuf.scala 132:137] + node _T_73 = eq(_T_71, _T_72) @[el2_lsu_stbuf.scala 132:120] + node _T_74 = bits(stbuf_vld, 0, 0) @[el2_lsu_stbuf.scala 132:190] + node _T_75 = and(_T_73, _T_74) @[el2_lsu_stbuf.scala 132:179] + node _T_76 = bits(stbuf_dma_kill, 0, 0) @[el2_lsu_stbuf.scala 132:211] + node _T_77 = eq(_T_76, UInt<1>("h00")) @[el2_lsu_stbuf.scala 132:196] + node _T_78 = and(_T_75, _T_77) @[el2_lsu_stbuf.scala 132:194] + node _T_79 = and(_T_78, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 132:215] + node _T_80 = bits(stbuf_reset, 0, 0) @[el2_lsu_stbuf.scala 132:250] + node _T_81 = eq(_T_80, UInt<1>("h00")) @[el2_lsu_stbuf.scala 132:238] + node _T_82 = and(_T_79, _T_81) @[el2_lsu_stbuf.scala 132:236] + node _T_83 = bits(stbuf_addr[1], 15, 2) @[el2_lsu_stbuf.scala 132:78] + node _T_84 = bits(io.end_addr_r, 15, 2) @[el2_lsu_stbuf.scala 132:137] + node _T_85 = eq(_T_83, _T_84) @[el2_lsu_stbuf.scala 132:120] + node _T_86 = bits(stbuf_vld, 1, 1) @[el2_lsu_stbuf.scala 132:190] + node _T_87 = and(_T_85, _T_86) @[el2_lsu_stbuf.scala 132:179] + node _T_88 = bits(stbuf_dma_kill, 1, 1) @[el2_lsu_stbuf.scala 132:211] + node _T_89 = eq(_T_88, UInt<1>("h00")) @[el2_lsu_stbuf.scala 132:196] + node _T_90 = and(_T_87, _T_89) @[el2_lsu_stbuf.scala 132:194] + node _T_91 = and(_T_90, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 132:215] + node _T_92 = bits(stbuf_reset, 1, 1) @[el2_lsu_stbuf.scala 132:250] + node _T_93 = eq(_T_92, UInt<1>("h00")) @[el2_lsu_stbuf.scala 132:238] + node _T_94 = and(_T_91, _T_93) @[el2_lsu_stbuf.scala 132:236] + node _T_95 = bits(stbuf_addr[2], 15, 2) @[el2_lsu_stbuf.scala 132:78] + node _T_96 = bits(io.end_addr_r, 15, 2) @[el2_lsu_stbuf.scala 132:137] + node _T_97 = eq(_T_95, _T_96) @[el2_lsu_stbuf.scala 132:120] + node _T_98 = bits(stbuf_vld, 2, 2) @[el2_lsu_stbuf.scala 132:190] + node _T_99 = and(_T_97, _T_98) @[el2_lsu_stbuf.scala 132:179] + node _T_100 = bits(stbuf_dma_kill, 2, 2) @[el2_lsu_stbuf.scala 132:211] + node _T_101 = eq(_T_100, UInt<1>("h00")) @[el2_lsu_stbuf.scala 132:196] + node _T_102 = and(_T_99, _T_101) @[el2_lsu_stbuf.scala 132:194] + node _T_103 = and(_T_102, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 132:215] + node _T_104 = bits(stbuf_reset, 2, 2) @[el2_lsu_stbuf.scala 132:250] + node _T_105 = eq(_T_104, UInt<1>("h00")) @[el2_lsu_stbuf.scala 132:238] + node _T_106 = and(_T_103, _T_105) @[el2_lsu_stbuf.scala 132:236] + node _T_107 = bits(stbuf_addr[3], 15, 2) @[el2_lsu_stbuf.scala 132:78] + node _T_108 = bits(io.end_addr_r, 15, 2) @[el2_lsu_stbuf.scala 132:137] + node _T_109 = eq(_T_107, _T_108) @[el2_lsu_stbuf.scala 132:120] + node _T_110 = bits(stbuf_vld, 3, 3) @[el2_lsu_stbuf.scala 132:190] + node _T_111 = and(_T_109, _T_110) @[el2_lsu_stbuf.scala 132:179] + node _T_112 = bits(stbuf_dma_kill, 3, 3) @[el2_lsu_stbuf.scala 132:211] + node _T_113 = eq(_T_112, UInt<1>("h00")) @[el2_lsu_stbuf.scala 132:196] + node _T_114 = and(_T_111, _T_113) @[el2_lsu_stbuf.scala 132:194] + node _T_115 = and(_T_114, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 132:215] + node _T_116 = bits(stbuf_reset, 3, 3) @[el2_lsu_stbuf.scala 132:250] + node _T_117 = eq(_T_116, UInt<1>("h00")) @[el2_lsu_stbuf.scala 132:238] + node _T_118 = and(_T_115, _T_117) @[el2_lsu_stbuf.scala 132:236] + node _T_119 = cat(_T_118, _T_106) @[Cat.scala 29:58] + node _T_120 = cat(_T_119, _T_94) @[Cat.scala 29:58] + node store_matchvec_hi_r = cat(_T_120, _T_82) @[Cat.scala 29:58] + node store_coalesce_lo_r = orr(store_matchvec_lo_r) @[el2_lsu_stbuf.scala 134:49] + node store_coalesce_hi_r = orr(store_matchvec_hi_r) @[el2_lsu_stbuf.scala 135:49] + node _T_121 = eq(UInt<1>("h00"), WrPtr) @[el2_lsu_stbuf.scala 138:16] + node _T_122 = eq(store_coalesce_lo_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 138:29] + node _T_123 = and(_T_121, _T_122) @[el2_lsu_stbuf.scala 138:27] + node _T_124 = eq(UInt<1>("h00"), WrPtr) @[el2_lsu_stbuf.scala 139:18] + node _T_125 = and(_T_124, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 139:29] + node _T_126 = eq(store_coalesce_hi_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 139:52] + node _T_127 = and(_T_125, _T_126) @[el2_lsu_stbuf.scala 139:50] + node _T_128 = or(_T_123, _T_127) @[el2_lsu_stbuf.scala 138:51] + node _T_129 = eq(UInt<1>("h00"), WrPtrPlus1) @[el2_lsu_stbuf.scala 140:18] + node _T_130 = and(_T_129, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 140:34] + node _T_131 = or(store_coalesce_lo_r, store_coalesce_hi_r) @[el2_lsu_stbuf.scala 140:79] + node _T_132 = eq(_T_131, UInt<1>("h00")) @[el2_lsu_stbuf.scala 140:57] + node _T_133 = and(_T_130, _T_132) @[el2_lsu_stbuf.scala 140:55] + node _T_134 = or(_T_128, _T_133) @[el2_lsu_stbuf.scala 139:74] + node _T_135 = bits(store_matchvec_lo_r, 0, 0) @[el2_lsu_stbuf.scala 141:26] + node _T_136 = or(_T_134, _T_135) @[el2_lsu_stbuf.scala 140:103] + node _T_137 = bits(store_matchvec_hi_r, 0, 0) @[el2_lsu_stbuf.scala 141:51] + node _T_138 = or(_T_136, _T_137) @[el2_lsu_stbuf.scala 141:30] + node _T_139 = and(io.ldst_stbuf_reqvld_r, _T_138) @[el2_lsu_stbuf.scala 137:76] + node _T_140 = eq(UInt<1>("h01"), WrPtr) @[el2_lsu_stbuf.scala 138:16] + node _T_141 = eq(store_coalesce_lo_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 138:29] + node _T_142 = and(_T_140, _T_141) @[el2_lsu_stbuf.scala 138:27] + node _T_143 = eq(UInt<1>("h01"), WrPtr) @[el2_lsu_stbuf.scala 139:18] + node _T_144 = and(_T_143, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 139:29] + node _T_145 = eq(store_coalesce_hi_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 139:52] + node _T_146 = and(_T_144, _T_145) @[el2_lsu_stbuf.scala 139:50] + node _T_147 = or(_T_142, _T_146) @[el2_lsu_stbuf.scala 138:51] + node _T_148 = eq(UInt<1>("h01"), WrPtrPlus1) @[el2_lsu_stbuf.scala 140:18] + node _T_149 = and(_T_148, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 140:34] + node _T_150 = or(store_coalesce_lo_r, store_coalesce_hi_r) @[el2_lsu_stbuf.scala 140:79] + node _T_151 = eq(_T_150, UInt<1>("h00")) @[el2_lsu_stbuf.scala 140:57] + node _T_152 = and(_T_149, _T_151) @[el2_lsu_stbuf.scala 140:55] + node _T_153 = or(_T_147, _T_152) @[el2_lsu_stbuf.scala 139:74] + node _T_154 = bits(store_matchvec_lo_r, 1, 1) @[el2_lsu_stbuf.scala 141:26] + node _T_155 = or(_T_153, _T_154) @[el2_lsu_stbuf.scala 140:103] + node _T_156 = bits(store_matchvec_hi_r, 1, 1) @[el2_lsu_stbuf.scala 141:51] + node _T_157 = or(_T_155, _T_156) @[el2_lsu_stbuf.scala 141:30] + node _T_158 = and(io.ldst_stbuf_reqvld_r, _T_157) @[el2_lsu_stbuf.scala 137:76] + node _T_159 = eq(UInt<2>("h02"), WrPtr) @[el2_lsu_stbuf.scala 138:16] + node _T_160 = eq(store_coalesce_lo_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 138:29] + node _T_161 = and(_T_159, _T_160) @[el2_lsu_stbuf.scala 138:27] + node _T_162 = eq(UInt<2>("h02"), WrPtr) @[el2_lsu_stbuf.scala 139:18] + node _T_163 = and(_T_162, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 139:29] + node _T_164 = eq(store_coalesce_hi_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 139:52] + node _T_165 = and(_T_163, _T_164) @[el2_lsu_stbuf.scala 139:50] + node _T_166 = or(_T_161, _T_165) @[el2_lsu_stbuf.scala 138:51] + node _T_167 = eq(UInt<2>("h02"), WrPtrPlus1) @[el2_lsu_stbuf.scala 140:18] + node _T_168 = and(_T_167, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 140:34] + node _T_169 = or(store_coalesce_lo_r, store_coalesce_hi_r) @[el2_lsu_stbuf.scala 140:79] + node _T_170 = eq(_T_169, UInt<1>("h00")) @[el2_lsu_stbuf.scala 140:57] + node _T_171 = and(_T_168, _T_170) @[el2_lsu_stbuf.scala 140:55] + node _T_172 = or(_T_166, _T_171) @[el2_lsu_stbuf.scala 139:74] + node _T_173 = bits(store_matchvec_lo_r, 2, 2) @[el2_lsu_stbuf.scala 141:26] + node _T_174 = or(_T_172, _T_173) @[el2_lsu_stbuf.scala 140:103] + node _T_175 = bits(store_matchvec_hi_r, 2, 2) @[el2_lsu_stbuf.scala 141:51] + node _T_176 = or(_T_174, _T_175) @[el2_lsu_stbuf.scala 141:30] + node _T_177 = and(io.ldst_stbuf_reqvld_r, _T_176) @[el2_lsu_stbuf.scala 137:76] + node _T_178 = eq(UInt<2>("h03"), WrPtr) @[el2_lsu_stbuf.scala 138:16] + node _T_179 = eq(store_coalesce_lo_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 138:29] + node _T_180 = and(_T_178, _T_179) @[el2_lsu_stbuf.scala 138:27] + node _T_181 = eq(UInt<2>("h03"), WrPtr) @[el2_lsu_stbuf.scala 139:18] + node _T_182 = and(_T_181, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 139:29] + node _T_183 = eq(store_coalesce_hi_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 139:52] + node _T_184 = and(_T_182, _T_183) @[el2_lsu_stbuf.scala 139:50] + node _T_185 = or(_T_180, _T_184) @[el2_lsu_stbuf.scala 138:51] + node _T_186 = eq(UInt<2>("h03"), WrPtrPlus1) @[el2_lsu_stbuf.scala 140:18] + node _T_187 = and(_T_186, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 140:34] + node _T_188 = or(store_coalesce_lo_r, store_coalesce_hi_r) @[el2_lsu_stbuf.scala 140:79] + node _T_189 = eq(_T_188, UInt<1>("h00")) @[el2_lsu_stbuf.scala 140:57] + node _T_190 = and(_T_187, _T_189) @[el2_lsu_stbuf.scala 140:55] + node _T_191 = or(_T_185, _T_190) @[el2_lsu_stbuf.scala 139:74] + node _T_192 = bits(store_matchvec_lo_r, 3, 3) @[el2_lsu_stbuf.scala 141:26] + node _T_193 = or(_T_191, _T_192) @[el2_lsu_stbuf.scala 140:103] + node _T_194 = bits(store_matchvec_hi_r, 3, 3) @[el2_lsu_stbuf.scala 141:51] + node _T_195 = or(_T_193, _T_194) @[el2_lsu_stbuf.scala 141:30] + node _T_196 = and(io.ldst_stbuf_reqvld_r, _T_195) @[el2_lsu_stbuf.scala 137:76] + node _T_197 = cat(_T_196, _T_177) @[Cat.scala 29:58] + node _T_198 = cat(_T_197, _T_158) @[Cat.scala 29:58] + node _T_199 = cat(_T_198, _T_139) @[Cat.scala 29:58] + stbuf_wr_en <= _T_199 @[el2_lsu_stbuf.scala 137:15] + node _T_200 = or(io.lsu_stbuf_commit_any, io.stbuf_reqvld_flushed_any) @[el2_lsu_stbuf.scala 142:78] + node _T_201 = eq(UInt<1>("h00"), RdPtr) @[el2_lsu_stbuf.scala 142:121] + node _T_202 = bits(_T_201, 0, 0) @[el2_lsu_stbuf.scala 142:132] + node _T_203 = and(_T_200, _T_202) @[el2_lsu_stbuf.scala 142:109] + node _T_204 = or(io.lsu_stbuf_commit_any, io.stbuf_reqvld_flushed_any) @[el2_lsu_stbuf.scala 142:78] + node _T_205 = eq(UInt<1>("h01"), RdPtr) @[el2_lsu_stbuf.scala 142:121] + node _T_206 = bits(_T_205, 0, 0) @[el2_lsu_stbuf.scala 142:132] + node _T_207 = and(_T_204, _T_206) @[el2_lsu_stbuf.scala 142:109] + node _T_208 = or(io.lsu_stbuf_commit_any, io.stbuf_reqvld_flushed_any) @[el2_lsu_stbuf.scala 142:78] + node _T_209 = eq(UInt<2>("h02"), RdPtr) @[el2_lsu_stbuf.scala 142:121] + node _T_210 = bits(_T_209, 0, 0) @[el2_lsu_stbuf.scala 142:132] + node _T_211 = and(_T_208, _T_210) @[el2_lsu_stbuf.scala 142:109] + node _T_212 = or(io.lsu_stbuf_commit_any, io.stbuf_reqvld_flushed_any) @[el2_lsu_stbuf.scala 142:78] + node _T_213 = eq(UInt<2>("h03"), RdPtr) @[el2_lsu_stbuf.scala 142:121] + node _T_214 = bits(_T_213, 0, 0) @[el2_lsu_stbuf.scala 142:132] + node _T_215 = and(_T_212, _T_214) @[el2_lsu_stbuf.scala 142:109] + node _T_216 = cat(_T_215, _T_211) @[Cat.scala 29:58] + node _T_217 = cat(_T_216, _T_207) @[Cat.scala 29:58] + node _T_218 = cat(_T_217, _T_203) @[Cat.scala 29:58] + stbuf_reset <= _T_218 @[el2_lsu_stbuf.scala 142:15] + node _T_219 = eq(ldst_dual_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 143:53] + node _T_220 = or(_T_219, io.store_stbuf_reqvld_r) @[el2_lsu_stbuf.scala 143:66] + node _T_221 = eq(UInt<1>("h00"), WrPtr) @[el2_lsu_stbuf.scala 143:105] + node _T_222 = bits(_T_221, 0, 0) @[el2_lsu_stbuf.scala 143:116] + node _T_223 = and(_T_220, _T_222) @[el2_lsu_stbuf.scala 143:93] + node _T_224 = eq(store_coalesce_lo_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 143:125] + node _T_225 = and(_T_223, _T_224) @[el2_lsu_stbuf.scala 143:123] + node _T_226 = bits(store_matchvec_lo_r, 0, 0) @[el2_lsu_stbuf.scala 143:168] + node _T_227 = or(_T_225, _T_226) @[el2_lsu_stbuf.scala 143:147] + node _T_228 = eq(ldst_dual_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 143:53] + node _T_229 = or(_T_228, io.store_stbuf_reqvld_r) @[el2_lsu_stbuf.scala 143:66] + node _T_230 = eq(UInt<1>("h01"), WrPtr) @[el2_lsu_stbuf.scala 143:105] + node _T_231 = bits(_T_230, 0, 0) @[el2_lsu_stbuf.scala 143:116] + node _T_232 = and(_T_229, _T_231) @[el2_lsu_stbuf.scala 143:93] + node _T_233 = eq(store_coalesce_lo_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 143:125] + node _T_234 = and(_T_232, _T_233) @[el2_lsu_stbuf.scala 143:123] + node _T_235 = bits(store_matchvec_lo_r, 1, 1) @[el2_lsu_stbuf.scala 143:168] + node _T_236 = or(_T_234, _T_235) @[el2_lsu_stbuf.scala 143:147] + node _T_237 = eq(ldst_dual_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 143:53] + node _T_238 = or(_T_237, io.store_stbuf_reqvld_r) @[el2_lsu_stbuf.scala 143:66] + node _T_239 = eq(UInt<2>("h02"), WrPtr) @[el2_lsu_stbuf.scala 143:105] + node _T_240 = bits(_T_239, 0, 0) @[el2_lsu_stbuf.scala 143:116] + node _T_241 = and(_T_238, _T_240) @[el2_lsu_stbuf.scala 143:93] + node _T_242 = eq(store_coalesce_lo_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 143:125] + node _T_243 = and(_T_241, _T_242) @[el2_lsu_stbuf.scala 143:123] + node _T_244 = bits(store_matchvec_lo_r, 2, 2) @[el2_lsu_stbuf.scala 143:168] + node _T_245 = or(_T_243, _T_244) @[el2_lsu_stbuf.scala 143:147] + node _T_246 = eq(ldst_dual_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 143:53] + node _T_247 = or(_T_246, io.store_stbuf_reqvld_r) @[el2_lsu_stbuf.scala 143:66] + node _T_248 = eq(UInt<2>("h03"), WrPtr) @[el2_lsu_stbuf.scala 143:105] + node _T_249 = bits(_T_248, 0, 0) @[el2_lsu_stbuf.scala 143:116] + node _T_250 = and(_T_247, _T_249) @[el2_lsu_stbuf.scala 143:93] + node _T_251 = eq(store_coalesce_lo_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 143:125] + node _T_252 = and(_T_250, _T_251) @[el2_lsu_stbuf.scala 143:123] + node _T_253 = bits(store_matchvec_lo_r, 3, 3) @[el2_lsu_stbuf.scala 143:168] + node _T_254 = or(_T_252, _T_253) @[el2_lsu_stbuf.scala 143:147] + node _T_255 = cat(_T_254, _T_245) @[Cat.scala 29:58] + node _T_256 = cat(_T_255, _T_236) @[Cat.scala 29:58] + node sel_lo = cat(_T_256, _T_227) @[Cat.scala 29:58] + node _T_257 = bits(sel_lo, 0, 0) @[el2_lsu_stbuf.scala 145:63] + node _T_258 = bits(io.lsu_addr_r, 15, 0) @[el2_lsu_stbuf.scala 145:81] + node _T_259 = bits(io.end_addr_r, 15, 0) @[el2_lsu_stbuf.scala 145:113] + node _T_260 = mux(_T_257, _T_258, _T_259) @[el2_lsu_stbuf.scala 145:56] + node _T_261 = bits(sel_lo, 1, 1) @[el2_lsu_stbuf.scala 145:63] + node _T_262 = bits(io.lsu_addr_r, 15, 0) @[el2_lsu_stbuf.scala 145:81] + node _T_263 = bits(io.end_addr_r, 15, 0) @[el2_lsu_stbuf.scala 145:113] + node _T_264 = mux(_T_261, _T_262, _T_263) @[el2_lsu_stbuf.scala 145:56] + node _T_265 = bits(sel_lo, 2, 2) @[el2_lsu_stbuf.scala 145:63] + node _T_266 = bits(io.lsu_addr_r, 15, 0) @[el2_lsu_stbuf.scala 145:81] + node _T_267 = bits(io.end_addr_r, 15, 0) @[el2_lsu_stbuf.scala 145:113] + node _T_268 = mux(_T_265, _T_266, _T_267) @[el2_lsu_stbuf.scala 145:56] + node _T_269 = bits(sel_lo, 3, 3) @[el2_lsu_stbuf.scala 145:63] + node _T_270 = bits(io.lsu_addr_r, 15, 0) @[el2_lsu_stbuf.scala 145:81] + node _T_271 = bits(io.end_addr_r, 15, 0) @[el2_lsu_stbuf.scala 145:113] + node _T_272 = mux(_T_269, _T_270, _T_271) @[el2_lsu_stbuf.scala 145:56] + stbuf_addrin[0] <= _T_260 @[el2_lsu_stbuf.scala 145:16] + stbuf_addrin[1] <= _T_264 @[el2_lsu_stbuf.scala 145:16] + stbuf_addrin[2] <= _T_268 @[el2_lsu_stbuf.scala 145:16] + stbuf_addrin[3] <= _T_272 @[el2_lsu_stbuf.scala 145:16] + node _T_273 = bits(sel_lo, 0, 0) @[el2_lsu_stbuf.scala 146:65] + node _T_274 = or(stbuf_byteen[0], store_byteen_lo_r) @[el2_lsu_stbuf.scala 146:86] + node _T_275 = or(stbuf_byteen[0], store_byteen_hi_r) @[el2_lsu_stbuf.scala 146:123] + node _T_276 = mux(_T_273, _T_274, _T_275) @[el2_lsu_stbuf.scala 146:58] + node _T_277 = bits(sel_lo, 1, 1) @[el2_lsu_stbuf.scala 146:65] + node _T_278 = or(stbuf_byteen[1], store_byteen_lo_r) @[el2_lsu_stbuf.scala 146:86] + node _T_279 = or(stbuf_byteen[1], store_byteen_hi_r) @[el2_lsu_stbuf.scala 146:123] + node _T_280 = mux(_T_277, _T_278, _T_279) @[el2_lsu_stbuf.scala 146:58] + node _T_281 = bits(sel_lo, 2, 2) @[el2_lsu_stbuf.scala 146:65] + node _T_282 = or(stbuf_byteen[2], store_byteen_lo_r) @[el2_lsu_stbuf.scala 146:86] + node _T_283 = or(stbuf_byteen[2], store_byteen_hi_r) @[el2_lsu_stbuf.scala 146:123] + node _T_284 = mux(_T_281, _T_282, _T_283) @[el2_lsu_stbuf.scala 146:58] + node _T_285 = bits(sel_lo, 3, 3) @[el2_lsu_stbuf.scala 146:65] + node _T_286 = or(stbuf_byteen[3], store_byteen_lo_r) @[el2_lsu_stbuf.scala 146:86] + node _T_287 = or(stbuf_byteen[3], store_byteen_hi_r) @[el2_lsu_stbuf.scala 146:123] + node _T_288 = mux(_T_285, _T_286, _T_287) @[el2_lsu_stbuf.scala 146:58] + stbuf_byteenin[0] <= _T_276 @[el2_lsu_stbuf.scala 146:18] + stbuf_byteenin[1] <= _T_280 @[el2_lsu_stbuf.scala 146:18] + stbuf_byteenin[2] <= _T_284 @[el2_lsu_stbuf.scala 146:18] + stbuf_byteenin[3] <= _T_288 @[el2_lsu_stbuf.scala 146:18] + node _T_289 = bits(sel_lo, 0, 0) @[el2_lsu_stbuf.scala 148:58] + node _T_290 = bits(stbuf_byteen[0], 0, 0) @[el2_lsu_stbuf.scala 148:83] + node _T_291 = eq(_T_290, UInt<1>("h00")) @[el2_lsu_stbuf.scala 148:67] + node _T_292 = bits(store_byteen_lo_r, 0, 0) @[el2_lsu_stbuf.scala 148:106] + node _T_293 = or(_T_291, _T_292) @[el2_lsu_stbuf.scala 148:87] + node _T_294 = bits(io.store_datafn_lo_r, 7, 0) @[el2_lsu_stbuf.scala 148:131] + node _T_295 = bits(stbuf_data[0], 7, 0) @[el2_lsu_stbuf.scala 148:152] + node _T_296 = mux(_T_293, _T_294, _T_295) @[el2_lsu_stbuf.scala 148:66] + node _T_297 = bits(stbuf_byteen[0], 0, 0) @[el2_lsu_stbuf.scala 149:25] + node _T_298 = eq(_T_297, UInt<1>("h00")) @[el2_lsu_stbuf.scala 149:9] + node _T_299 = bits(store_byteen_hi_r, 0, 0) @[el2_lsu_stbuf.scala 149:48] + node _T_300 = or(_T_298, _T_299) @[el2_lsu_stbuf.scala 149:29] + node _T_301 = bits(io.store_datafn_hi_r, 7, 0) @[el2_lsu_stbuf.scala 149:73] + node _T_302 = bits(stbuf_data[0], 7, 0) @[el2_lsu_stbuf.scala 149:94] + node _T_303 = mux(_T_300, _T_301, _T_302) @[el2_lsu_stbuf.scala 149:8] + node _T_304 = mux(_T_289, _T_296, _T_303) @[el2_lsu_stbuf.scala 148:51] + node _T_305 = bits(sel_lo, 1, 1) @[el2_lsu_stbuf.scala 148:58] + node _T_306 = bits(stbuf_byteen[1], 0, 0) @[el2_lsu_stbuf.scala 148:83] + node _T_307 = eq(_T_306, UInt<1>("h00")) @[el2_lsu_stbuf.scala 148:67] + node _T_308 = bits(store_byteen_lo_r, 0, 0) @[el2_lsu_stbuf.scala 148:106] + node _T_309 = or(_T_307, _T_308) @[el2_lsu_stbuf.scala 148:87] + node _T_310 = bits(io.store_datafn_lo_r, 7, 0) @[el2_lsu_stbuf.scala 148:131] + node _T_311 = bits(stbuf_data[1], 7, 0) @[el2_lsu_stbuf.scala 148:152] + node _T_312 = mux(_T_309, _T_310, _T_311) @[el2_lsu_stbuf.scala 148:66] + node _T_313 = bits(stbuf_byteen[1], 0, 0) @[el2_lsu_stbuf.scala 149:25] + node _T_314 = eq(_T_313, UInt<1>("h00")) @[el2_lsu_stbuf.scala 149:9] + node _T_315 = bits(store_byteen_hi_r, 0, 0) @[el2_lsu_stbuf.scala 149:48] + node _T_316 = or(_T_314, _T_315) @[el2_lsu_stbuf.scala 149:29] + node _T_317 = bits(io.store_datafn_hi_r, 7, 0) @[el2_lsu_stbuf.scala 149:73] + node _T_318 = bits(stbuf_data[1], 7, 0) @[el2_lsu_stbuf.scala 149:94] + node _T_319 = mux(_T_316, _T_317, _T_318) @[el2_lsu_stbuf.scala 149:8] + node _T_320 = mux(_T_305, _T_312, _T_319) @[el2_lsu_stbuf.scala 148:51] + node _T_321 = bits(sel_lo, 2, 2) @[el2_lsu_stbuf.scala 148:58] + node _T_322 = bits(stbuf_byteen[2], 0, 0) @[el2_lsu_stbuf.scala 148:83] + node _T_323 = eq(_T_322, UInt<1>("h00")) @[el2_lsu_stbuf.scala 148:67] + node _T_324 = bits(store_byteen_lo_r, 0, 0) @[el2_lsu_stbuf.scala 148:106] + node _T_325 = or(_T_323, _T_324) @[el2_lsu_stbuf.scala 148:87] + node _T_326 = bits(io.store_datafn_lo_r, 7, 0) @[el2_lsu_stbuf.scala 148:131] + node _T_327 = bits(stbuf_data[2], 7, 0) @[el2_lsu_stbuf.scala 148:152] + node _T_328 = mux(_T_325, _T_326, _T_327) @[el2_lsu_stbuf.scala 148:66] + node _T_329 = bits(stbuf_byteen[2], 0, 0) @[el2_lsu_stbuf.scala 149:25] + node _T_330 = eq(_T_329, UInt<1>("h00")) @[el2_lsu_stbuf.scala 149:9] + node _T_331 = bits(store_byteen_hi_r, 0, 0) @[el2_lsu_stbuf.scala 149:48] + node _T_332 = or(_T_330, _T_331) @[el2_lsu_stbuf.scala 149:29] + node _T_333 = bits(io.store_datafn_hi_r, 7, 0) @[el2_lsu_stbuf.scala 149:73] + node _T_334 = bits(stbuf_data[2], 7, 0) @[el2_lsu_stbuf.scala 149:94] + node _T_335 = mux(_T_332, _T_333, _T_334) @[el2_lsu_stbuf.scala 149:8] + node _T_336 = mux(_T_321, _T_328, _T_335) @[el2_lsu_stbuf.scala 148:51] + node _T_337 = bits(sel_lo, 3, 3) @[el2_lsu_stbuf.scala 148:58] + node _T_338 = bits(stbuf_byteen[3], 0, 0) @[el2_lsu_stbuf.scala 148:83] + node _T_339 = eq(_T_338, UInt<1>("h00")) @[el2_lsu_stbuf.scala 148:67] + node _T_340 = bits(store_byteen_lo_r, 0, 0) @[el2_lsu_stbuf.scala 148:106] + node _T_341 = or(_T_339, _T_340) @[el2_lsu_stbuf.scala 148:87] + node _T_342 = bits(io.store_datafn_lo_r, 7, 0) @[el2_lsu_stbuf.scala 148:131] + node _T_343 = bits(stbuf_data[3], 7, 0) @[el2_lsu_stbuf.scala 148:152] + node _T_344 = mux(_T_341, _T_342, _T_343) @[el2_lsu_stbuf.scala 148:66] + node _T_345 = bits(stbuf_byteen[3], 0, 0) @[el2_lsu_stbuf.scala 149:25] + node _T_346 = eq(_T_345, UInt<1>("h00")) @[el2_lsu_stbuf.scala 149:9] + node _T_347 = bits(store_byteen_hi_r, 0, 0) @[el2_lsu_stbuf.scala 149:48] + node _T_348 = or(_T_346, _T_347) @[el2_lsu_stbuf.scala 149:29] + node _T_349 = bits(io.store_datafn_hi_r, 7, 0) @[el2_lsu_stbuf.scala 149:73] + node _T_350 = bits(stbuf_data[3], 7, 0) @[el2_lsu_stbuf.scala 149:94] + node _T_351 = mux(_T_348, _T_349, _T_350) @[el2_lsu_stbuf.scala 149:8] + node _T_352 = mux(_T_337, _T_344, _T_351) @[el2_lsu_stbuf.scala 148:51] + datain1[0] <= _T_304 @[el2_lsu_stbuf.scala 148:11] + datain1[1] <= _T_320 @[el2_lsu_stbuf.scala 148:11] + datain1[2] <= _T_336 @[el2_lsu_stbuf.scala 148:11] + datain1[3] <= _T_352 @[el2_lsu_stbuf.scala 148:11] + node _T_353 = bits(sel_lo, 0, 0) @[el2_lsu_stbuf.scala 151:59] + node _T_354 = bits(stbuf_byteen[0], 1, 1) @[el2_lsu_stbuf.scala 151:84] + node _T_355 = eq(_T_354, UInt<1>("h00")) @[el2_lsu_stbuf.scala 151:68] + node _T_356 = bits(store_byteen_lo_r, 1, 1) @[el2_lsu_stbuf.scala 151:107] + node _T_357 = or(_T_355, _T_356) @[el2_lsu_stbuf.scala 151:88] + node _T_358 = bits(io.store_datafn_lo_r, 15, 8) @[el2_lsu_stbuf.scala 151:132] + node _T_359 = bits(stbuf_data[0], 15, 8) @[el2_lsu_stbuf.scala 151:154] + node _T_360 = mux(_T_357, _T_358, _T_359) @[el2_lsu_stbuf.scala 151:67] + node _T_361 = bits(stbuf_byteen[0], 1, 1) @[el2_lsu_stbuf.scala 152:25] + node _T_362 = eq(_T_361, UInt<1>("h00")) @[el2_lsu_stbuf.scala 152:9] + node _T_363 = bits(store_byteen_hi_r, 1, 1) @[el2_lsu_stbuf.scala 152:48] + node _T_364 = or(_T_362, _T_363) @[el2_lsu_stbuf.scala 152:29] + node _T_365 = bits(io.store_datafn_hi_r, 15, 8) @[el2_lsu_stbuf.scala 152:73] + node _T_366 = bits(stbuf_data[0], 15, 8) @[el2_lsu_stbuf.scala 152:95] + node _T_367 = mux(_T_364, _T_365, _T_366) @[el2_lsu_stbuf.scala 152:8] + node _T_368 = mux(_T_353, _T_360, _T_367) @[el2_lsu_stbuf.scala 151:52] + node _T_369 = bits(sel_lo, 1, 1) @[el2_lsu_stbuf.scala 151:59] + node _T_370 = bits(stbuf_byteen[1], 1, 1) @[el2_lsu_stbuf.scala 151:84] + node _T_371 = eq(_T_370, UInt<1>("h00")) @[el2_lsu_stbuf.scala 151:68] + node _T_372 = bits(store_byteen_lo_r, 1, 1) @[el2_lsu_stbuf.scala 151:107] + node _T_373 = or(_T_371, _T_372) @[el2_lsu_stbuf.scala 151:88] + node _T_374 = bits(io.store_datafn_lo_r, 15, 8) @[el2_lsu_stbuf.scala 151:132] + node _T_375 = bits(stbuf_data[1], 15, 8) @[el2_lsu_stbuf.scala 151:154] + node _T_376 = mux(_T_373, _T_374, _T_375) @[el2_lsu_stbuf.scala 151:67] + node _T_377 = bits(stbuf_byteen[1], 1, 1) @[el2_lsu_stbuf.scala 152:25] + node _T_378 = eq(_T_377, UInt<1>("h00")) @[el2_lsu_stbuf.scala 152:9] + node _T_379 = bits(store_byteen_hi_r, 1, 1) @[el2_lsu_stbuf.scala 152:48] + node _T_380 = or(_T_378, _T_379) @[el2_lsu_stbuf.scala 152:29] + node _T_381 = bits(io.store_datafn_hi_r, 15, 8) @[el2_lsu_stbuf.scala 152:73] + node _T_382 = bits(stbuf_data[1], 15, 8) @[el2_lsu_stbuf.scala 152:95] + node _T_383 = mux(_T_380, _T_381, _T_382) @[el2_lsu_stbuf.scala 152:8] + node _T_384 = mux(_T_369, _T_376, _T_383) @[el2_lsu_stbuf.scala 151:52] + node _T_385 = bits(sel_lo, 2, 2) @[el2_lsu_stbuf.scala 151:59] + node _T_386 = bits(stbuf_byteen[2], 1, 1) @[el2_lsu_stbuf.scala 151:84] + node _T_387 = eq(_T_386, UInt<1>("h00")) @[el2_lsu_stbuf.scala 151:68] + node _T_388 = bits(store_byteen_lo_r, 1, 1) @[el2_lsu_stbuf.scala 151:107] + node _T_389 = or(_T_387, _T_388) @[el2_lsu_stbuf.scala 151:88] + node _T_390 = bits(io.store_datafn_lo_r, 15, 8) @[el2_lsu_stbuf.scala 151:132] + node _T_391 = bits(stbuf_data[2], 15, 8) @[el2_lsu_stbuf.scala 151:154] + node _T_392 = mux(_T_389, _T_390, _T_391) @[el2_lsu_stbuf.scala 151:67] + node _T_393 = bits(stbuf_byteen[2], 1, 1) @[el2_lsu_stbuf.scala 152:25] + node _T_394 = eq(_T_393, UInt<1>("h00")) @[el2_lsu_stbuf.scala 152:9] + node _T_395 = bits(store_byteen_hi_r, 1, 1) @[el2_lsu_stbuf.scala 152:48] + node _T_396 = or(_T_394, _T_395) @[el2_lsu_stbuf.scala 152:29] + node _T_397 = bits(io.store_datafn_hi_r, 15, 8) @[el2_lsu_stbuf.scala 152:73] + node _T_398 = bits(stbuf_data[2], 15, 8) @[el2_lsu_stbuf.scala 152:95] + node _T_399 = mux(_T_396, _T_397, _T_398) @[el2_lsu_stbuf.scala 152:8] + node _T_400 = mux(_T_385, _T_392, _T_399) @[el2_lsu_stbuf.scala 151:52] + node _T_401 = bits(sel_lo, 3, 3) @[el2_lsu_stbuf.scala 151:59] + node _T_402 = bits(stbuf_byteen[3], 1, 1) @[el2_lsu_stbuf.scala 151:84] + node _T_403 = eq(_T_402, UInt<1>("h00")) @[el2_lsu_stbuf.scala 151:68] + node _T_404 = bits(store_byteen_lo_r, 1, 1) @[el2_lsu_stbuf.scala 151:107] + node _T_405 = or(_T_403, _T_404) @[el2_lsu_stbuf.scala 151:88] + node _T_406 = bits(io.store_datafn_lo_r, 15, 8) @[el2_lsu_stbuf.scala 151:132] + node _T_407 = bits(stbuf_data[3], 15, 8) @[el2_lsu_stbuf.scala 151:154] + node _T_408 = mux(_T_405, _T_406, _T_407) @[el2_lsu_stbuf.scala 151:67] + node _T_409 = bits(stbuf_byteen[3], 1, 1) @[el2_lsu_stbuf.scala 152:25] + node _T_410 = eq(_T_409, UInt<1>("h00")) @[el2_lsu_stbuf.scala 152:9] + node _T_411 = bits(store_byteen_hi_r, 1, 1) @[el2_lsu_stbuf.scala 152:48] + node _T_412 = or(_T_410, _T_411) @[el2_lsu_stbuf.scala 152:29] + node _T_413 = bits(io.store_datafn_hi_r, 15, 8) @[el2_lsu_stbuf.scala 152:73] + node _T_414 = bits(stbuf_data[3], 15, 8) @[el2_lsu_stbuf.scala 152:95] + node _T_415 = mux(_T_412, _T_413, _T_414) @[el2_lsu_stbuf.scala 152:8] + node _T_416 = mux(_T_401, _T_408, _T_415) @[el2_lsu_stbuf.scala 151:52] + datain2[0] <= _T_368 @[el2_lsu_stbuf.scala 151:12] + datain2[1] <= _T_384 @[el2_lsu_stbuf.scala 151:12] + datain2[2] <= _T_400 @[el2_lsu_stbuf.scala 151:12] + datain2[3] <= _T_416 @[el2_lsu_stbuf.scala 151:12] + node _T_417 = bits(sel_lo, 0, 0) @[el2_lsu_stbuf.scala 154:59] + node _T_418 = bits(stbuf_byteen[0], 2, 2) @[el2_lsu_stbuf.scala 154:84] + node _T_419 = eq(_T_418, UInt<1>("h00")) @[el2_lsu_stbuf.scala 154:68] + node _T_420 = bits(store_byteen_lo_r, 2, 2) @[el2_lsu_stbuf.scala 154:107] + node _T_421 = or(_T_419, _T_420) @[el2_lsu_stbuf.scala 154:88] + node _T_422 = bits(io.store_datafn_lo_r, 23, 16) @[el2_lsu_stbuf.scala 154:132] + node _T_423 = bits(stbuf_data[0], 23, 16) @[el2_lsu_stbuf.scala 154:155] + node _T_424 = mux(_T_421, _T_422, _T_423) @[el2_lsu_stbuf.scala 154:67] + node _T_425 = bits(stbuf_byteen[0], 2, 2) @[el2_lsu_stbuf.scala 155:25] + node _T_426 = eq(_T_425, UInt<1>("h00")) @[el2_lsu_stbuf.scala 155:9] + node _T_427 = bits(store_byteen_hi_r, 2, 2) @[el2_lsu_stbuf.scala 155:48] + node _T_428 = or(_T_426, _T_427) @[el2_lsu_stbuf.scala 155:29] + node _T_429 = bits(io.store_datafn_hi_r, 23, 16) @[el2_lsu_stbuf.scala 155:73] + node _T_430 = bits(stbuf_data[0], 23, 16) @[el2_lsu_stbuf.scala 155:96] + node _T_431 = mux(_T_428, _T_429, _T_430) @[el2_lsu_stbuf.scala 155:8] + node _T_432 = mux(_T_417, _T_424, _T_431) @[el2_lsu_stbuf.scala 154:52] + node _T_433 = bits(sel_lo, 1, 1) @[el2_lsu_stbuf.scala 154:59] + node _T_434 = bits(stbuf_byteen[1], 2, 2) @[el2_lsu_stbuf.scala 154:84] + node _T_435 = eq(_T_434, UInt<1>("h00")) @[el2_lsu_stbuf.scala 154:68] + node _T_436 = bits(store_byteen_lo_r, 2, 2) @[el2_lsu_stbuf.scala 154:107] + node _T_437 = or(_T_435, _T_436) @[el2_lsu_stbuf.scala 154:88] + node _T_438 = bits(io.store_datafn_lo_r, 23, 16) @[el2_lsu_stbuf.scala 154:132] + node _T_439 = bits(stbuf_data[1], 23, 16) @[el2_lsu_stbuf.scala 154:155] + node _T_440 = mux(_T_437, _T_438, _T_439) @[el2_lsu_stbuf.scala 154:67] + node _T_441 = bits(stbuf_byteen[1], 2, 2) @[el2_lsu_stbuf.scala 155:25] + node _T_442 = eq(_T_441, UInt<1>("h00")) @[el2_lsu_stbuf.scala 155:9] + node _T_443 = bits(store_byteen_hi_r, 2, 2) @[el2_lsu_stbuf.scala 155:48] + node _T_444 = or(_T_442, _T_443) @[el2_lsu_stbuf.scala 155:29] + node _T_445 = bits(io.store_datafn_hi_r, 23, 16) @[el2_lsu_stbuf.scala 155:73] + node _T_446 = bits(stbuf_data[1], 23, 16) @[el2_lsu_stbuf.scala 155:96] + node _T_447 = mux(_T_444, _T_445, _T_446) @[el2_lsu_stbuf.scala 155:8] + node _T_448 = mux(_T_433, _T_440, _T_447) @[el2_lsu_stbuf.scala 154:52] + node _T_449 = bits(sel_lo, 2, 2) @[el2_lsu_stbuf.scala 154:59] + node _T_450 = bits(stbuf_byteen[2], 2, 2) @[el2_lsu_stbuf.scala 154:84] + node _T_451 = eq(_T_450, UInt<1>("h00")) @[el2_lsu_stbuf.scala 154:68] + node _T_452 = bits(store_byteen_lo_r, 2, 2) @[el2_lsu_stbuf.scala 154:107] + node _T_453 = or(_T_451, _T_452) @[el2_lsu_stbuf.scala 154:88] + node _T_454 = bits(io.store_datafn_lo_r, 23, 16) @[el2_lsu_stbuf.scala 154:132] + node _T_455 = bits(stbuf_data[2], 23, 16) @[el2_lsu_stbuf.scala 154:155] + node _T_456 = mux(_T_453, _T_454, _T_455) @[el2_lsu_stbuf.scala 154:67] + node _T_457 = bits(stbuf_byteen[2], 2, 2) @[el2_lsu_stbuf.scala 155:25] + node _T_458 = eq(_T_457, UInt<1>("h00")) @[el2_lsu_stbuf.scala 155:9] + node _T_459 = bits(store_byteen_hi_r, 2, 2) @[el2_lsu_stbuf.scala 155:48] + node _T_460 = or(_T_458, _T_459) @[el2_lsu_stbuf.scala 155:29] + node _T_461 = bits(io.store_datafn_hi_r, 23, 16) @[el2_lsu_stbuf.scala 155:73] + node _T_462 = bits(stbuf_data[2], 23, 16) @[el2_lsu_stbuf.scala 155:96] + node _T_463 = mux(_T_460, _T_461, _T_462) @[el2_lsu_stbuf.scala 155:8] + node _T_464 = mux(_T_449, _T_456, _T_463) @[el2_lsu_stbuf.scala 154:52] + node _T_465 = bits(sel_lo, 3, 3) @[el2_lsu_stbuf.scala 154:59] + node _T_466 = bits(stbuf_byteen[3], 2, 2) @[el2_lsu_stbuf.scala 154:84] + node _T_467 = eq(_T_466, UInt<1>("h00")) @[el2_lsu_stbuf.scala 154:68] + node _T_468 = bits(store_byteen_lo_r, 2, 2) @[el2_lsu_stbuf.scala 154:107] + node _T_469 = or(_T_467, _T_468) @[el2_lsu_stbuf.scala 154:88] + node _T_470 = bits(io.store_datafn_lo_r, 23, 16) @[el2_lsu_stbuf.scala 154:132] + node _T_471 = bits(stbuf_data[3], 23, 16) @[el2_lsu_stbuf.scala 154:155] + node _T_472 = mux(_T_469, _T_470, _T_471) @[el2_lsu_stbuf.scala 154:67] + node _T_473 = bits(stbuf_byteen[3], 2, 2) @[el2_lsu_stbuf.scala 155:25] + node _T_474 = eq(_T_473, UInt<1>("h00")) @[el2_lsu_stbuf.scala 155:9] + node _T_475 = bits(store_byteen_hi_r, 2, 2) @[el2_lsu_stbuf.scala 155:48] + node _T_476 = or(_T_474, _T_475) @[el2_lsu_stbuf.scala 155:29] + node _T_477 = bits(io.store_datafn_hi_r, 23, 16) @[el2_lsu_stbuf.scala 155:73] + node _T_478 = bits(stbuf_data[3], 23, 16) @[el2_lsu_stbuf.scala 155:96] + node _T_479 = mux(_T_476, _T_477, _T_478) @[el2_lsu_stbuf.scala 155:8] + node _T_480 = mux(_T_465, _T_472, _T_479) @[el2_lsu_stbuf.scala 154:52] + datain3[0] <= _T_432 @[el2_lsu_stbuf.scala 154:12] + datain3[1] <= _T_448 @[el2_lsu_stbuf.scala 154:12] + datain3[2] <= _T_464 @[el2_lsu_stbuf.scala 154:12] + datain3[3] <= _T_480 @[el2_lsu_stbuf.scala 154:12] + node _T_481 = bits(sel_lo, 0, 0) @[el2_lsu_stbuf.scala 157:59] + node _T_482 = bits(stbuf_byteen[0], 3, 3) @[el2_lsu_stbuf.scala 157:84] + node _T_483 = eq(_T_482, UInt<1>("h00")) @[el2_lsu_stbuf.scala 157:68] + node _T_484 = bits(store_byteen_lo_r, 3, 3) @[el2_lsu_stbuf.scala 157:107] + node _T_485 = or(_T_483, _T_484) @[el2_lsu_stbuf.scala 157:88] + node _T_486 = bits(io.store_datafn_lo_r, 31, 24) @[el2_lsu_stbuf.scala 157:132] + node _T_487 = bits(stbuf_data[0], 31, 24) @[el2_lsu_stbuf.scala 157:155] + node _T_488 = mux(_T_485, _T_486, _T_487) @[el2_lsu_stbuf.scala 157:67] + node _T_489 = bits(stbuf_byteen[0], 3, 3) @[el2_lsu_stbuf.scala 158:25] + node _T_490 = eq(_T_489, UInt<1>("h00")) @[el2_lsu_stbuf.scala 158:9] + node _T_491 = bits(store_byteen_hi_r, 3, 3) @[el2_lsu_stbuf.scala 158:48] + node _T_492 = or(_T_490, _T_491) @[el2_lsu_stbuf.scala 158:29] + node _T_493 = bits(io.store_datafn_hi_r, 31, 24) @[el2_lsu_stbuf.scala 158:73] + node _T_494 = bits(stbuf_data[0], 31, 24) @[el2_lsu_stbuf.scala 158:96] + node _T_495 = mux(_T_492, _T_493, _T_494) @[el2_lsu_stbuf.scala 158:8] + node _T_496 = mux(_T_481, _T_488, _T_495) @[el2_lsu_stbuf.scala 157:52] + node _T_497 = bits(sel_lo, 1, 1) @[el2_lsu_stbuf.scala 157:59] + node _T_498 = bits(stbuf_byteen[1], 3, 3) @[el2_lsu_stbuf.scala 157:84] + node _T_499 = eq(_T_498, UInt<1>("h00")) @[el2_lsu_stbuf.scala 157:68] + node _T_500 = bits(store_byteen_lo_r, 3, 3) @[el2_lsu_stbuf.scala 157:107] + node _T_501 = or(_T_499, _T_500) @[el2_lsu_stbuf.scala 157:88] + node _T_502 = bits(io.store_datafn_lo_r, 31, 24) @[el2_lsu_stbuf.scala 157:132] + node _T_503 = bits(stbuf_data[1], 31, 24) @[el2_lsu_stbuf.scala 157:155] + node _T_504 = mux(_T_501, _T_502, _T_503) @[el2_lsu_stbuf.scala 157:67] + node _T_505 = bits(stbuf_byteen[1], 3, 3) @[el2_lsu_stbuf.scala 158:25] + node _T_506 = eq(_T_505, UInt<1>("h00")) @[el2_lsu_stbuf.scala 158:9] + node _T_507 = bits(store_byteen_hi_r, 3, 3) @[el2_lsu_stbuf.scala 158:48] + node _T_508 = or(_T_506, _T_507) @[el2_lsu_stbuf.scala 158:29] + node _T_509 = bits(io.store_datafn_hi_r, 31, 24) @[el2_lsu_stbuf.scala 158:73] + node _T_510 = bits(stbuf_data[1], 31, 24) @[el2_lsu_stbuf.scala 158:96] + node _T_511 = mux(_T_508, _T_509, _T_510) @[el2_lsu_stbuf.scala 158:8] + node _T_512 = mux(_T_497, _T_504, _T_511) @[el2_lsu_stbuf.scala 157:52] + node _T_513 = bits(sel_lo, 2, 2) @[el2_lsu_stbuf.scala 157:59] + node _T_514 = bits(stbuf_byteen[2], 3, 3) @[el2_lsu_stbuf.scala 157:84] + node _T_515 = eq(_T_514, UInt<1>("h00")) @[el2_lsu_stbuf.scala 157:68] + node _T_516 = bits(store_byteen_lo_r, 3, 3) @[el2_lsu_stbuf.scala 157:107] + node _T_517 = or(_T_515, _T_516) @[el2_lsu_stbuf.scala 157:88] + node _T_518 = bits(io.store_datafn_lo_r, 31, 24) @[el2_lsu_stbuf.scala 157:132] + node _T_519 = bits(stbuf_data[2], 31, 24) @[el2_lsu_stbuf.scala 157:155] + node _T_520 = mux(_T_517, _T_518, _T_519) @[el2_lsu_stbuf.scala 157:67] + node _T_521 = bits(stbuf_byteen[2], 3, 3) @[el2_lsu_stbuf.scala 158:25] + node _T_522 = eq(_T_521, UInt<1>("h00")) @[el2_lsu_stbuf.scala 158:9] + node _T_523 = bits(store_byteen_hi_r, 3, 3) @[el2_lsu_stbuf.scala 158:48] + node _T_524 = or(_T_522, _T_523) @[el2_lsu_stbuf.scala 158:29] + node _T_525 = bits(io.store_datafn_hi_r, 31, 24) @[el2_lsu_stbuf.scala 158:73] + node _T_526 = bits(stbuf_data[2], 31, 24) @[el2_lsu_stbuf.scala 158:96] + node _T_527 = mux(_T_524, _T_525, _T_526) @[el2_lsu_stbuf.scala 158:8] + node _T_528 = mux(_T_513, _T_520, _T_527) @[el2_lsu_stbuf.scala 157:52] + node _T_529 = bits(sel_lo, 3, 3) @[el2_lsu_stbuf.scala 157:59] + node _T_530 = bits(stbuf_byteen[3], 3, 3) @[el2_lsu_stbuf.scala 157:84] + node _T_531 = eq(_T_530, UInt<1>("h00")) @[el2_lsu_stbuf.scala 157:68] + node _T_532 = bits(store_byteen_lo_r, 3, 3) @[el2_lsu_stbuf.scala 157:107] + node _T_533 = or(_T_531, _T_532) @[el2_lsu_stbuf.scala 157:88] + node _T_534 = bits(io.store_datafn_lo_r, 31, 24) @[el2_lsu_stbuf.scala 157:132] + node _T_535 = bits(stbuf_data[3], 31, 24) @[el2_lsu_stbuf.scala 157:155] + node _T_536 = mux(_T_533, _T_534, _T_535) @[el2_lsu_stbuf.scala 157:67] + node _T_537 = bits(stbuf_byteen[3], 3, 3) @[el2_lsu_stbuf.scala 158:25] + node _T_538 = eq(_T_537, UInt<1>("h00")) @[el2_lsu_stbuf.scala 158:9] + node _T_539 = bits(store_byteen_hi_r, 3, 3) @[el2_lsu_stbuf.scala 158:48] + node _T_540 = or(_T_538, _T_539) @[el2_lsu_stbuf.scala 158:29] + node _T_541 = bits(io.store_datafn_hi_r, 31, 24) @[el2_lsu_stbuf.scala 158:73] + node _T_542 = bits(stbuf_data[3], 31, 24) @[el2_lsu_stbuf.scala 158:96] + node _T_543 = mux(_T_540, _T_541, _T_542) @[el2_lsu_stbuf.scala 158:8] + node _T_544 = mux(_T_529, _T_536, _T_543) @[el2_lsu_stbuf.scala 157:52] + datain4[0] <= _T_496 @[el2_lsu_stbuf.scala 157:12] + datain4[1] <= _T_512 @[el2_lsu_stbuf.scala 157:12] + datain4[2] <= _T_528 @[el2_lsu_stbuf.scala 157:12] + datain4[3] <= _T_544 @[el2_lsu_stbuf.scala 157:12] + node _T_545 = cat(datain2[0], datain1[0]) @[Cat.scala 29:58] + node _T_546 = cat(datain4[0], datain3[0]) @[Cat.scala 29:58] + node _T_547 = cat(_T_546, _T_545) @[Cat.scala 29:58] + node _T_548 = cat(datain2[1], datain1[1]) @[Cat.scala 29:58] + node _T_549 = cat(datain4[1], datain3[1]) @[Cat.scala 29:58] + node _T_550 = cat(_T_549, _T_548) @[Cat.scala 29:58] + node _T_551 = cat(datain2[2], datain1[2]) @[Cat.scala 29:58] + node _T_552 = cat(datain4[2], datain3[2]) @[Cat.scala 29:58] + node _T_553 = cat(_T_552, _T_551) @[Cat.scala 29:58] + node _T_554 = cat(datain2[3], datain1[3]) @[Cat.scala 29:58] + node _T_555 = cat(datain4[3], datain3[3]) @[Cat.scala 29:58] + node _T_556 = cat(_T_555, _T_554) @[Cat.scala 29:58] + stbuf_datain[0] <= _T_547 @[el2_lsu_stbuf.scala 160:16] + stbuf_datain[1] <= _T_550 @[el2_lsu_stbuf.scala 160:16] + stbuf_datain[2] <= _T_553 @[el2_lsu_stbuf.scala 160:16] + stbuf_datain[3] <= _T_556 @[el2_lsu_stbuf.scala 160:16] + node _T_557 = bits(stbuf_wr_en, 0, 0) @[el2_lsu_stbuf.scala 164:104] + node _T_558 = bits(_T_557, 0, 0) @[el2_lsu_stbuf.scala 164:114] + node _T_559 = bits(stbuf_vld, 0, 0) @[el2_lsu_stbuf.scala 164:131] + node _T_560 = mux(_T_558, UInt<1>("h01"), _T_559) @[el2_lsu_stbuf.scala 164:92] + node _T_561 = bits(stbuf_reset, 0, 0) @[el2_lsu_stbuf.scala 164:150] + node _T_562 = eq(_T_561, UInt<1>("h00")) @[el2_lsu_stbuf.scala 164:138] + node _T_563 = and(_T_560, _T_562) @[el2_lsu_stbuf.scala 164:136] + reg _T_564 : UInt, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_stbuf.scala 164:88] + _T_564 <= _T_563 @[el2_lsu_stbuf.scala 164:88] + node _T_565 = bits(stbuf_wr_en, 1, 1) @[el2_lsu_stbuf.scala 164:104] + node _T_566 = bits(_T_565, 0, 0) @[el2_lsu_stbuf.scala 164:114] + node _T_567 = bits(stbuf_vld, 1, 1) @[el2_lsu_stbuf.scala 164:131] + node _T_568 = mux(_T_566, UInt<1>("h01"), _T_567) @[el2_lsu_stbuf.scala 164:92] + node _T_569 = bits(stbuf_reset, 1, 1) @[el2_lsu_stbuf.scala 164:150] + node _T_570 = eq(_T_569, UInt<1>("h00")) @[el2_lsu_stbuf.scala 164:138] + node _T_571 = and(_T_568, _T_570) @[el2_lsu_stbuf.scala 164:136] + reg _T_572 : UInt, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_stbuf.scala 164:88] + _T_572 <= _T_571 @[el2_lsu_stbuf.scala 164:88] + node _T_573 = bits(stbuf_wr_en, 2, 2) @[el2_lsu_stbuf.scala 164:104] + node _T_574 = bits(_T_573, 0, 0) @[el2_lsu_stbuf.scala 164:114] + node _T_575 = bits(stbuf_vld, 2, 2) @[el2_lsu_stbuf.scala 164:131] + node _T_576 = mux(_T_574, UInt<1>("h01"), _T_575) @[el2_lsu_stbuf.scala 164:92] + node _T_577 = bits(stbuf_reset, 2, 2) @[el2_lsu_stbuf.scala 164:150] + node _T_578 = eq(_T_577, UInt<1>("h00")) @[el2_lsu_stbuf.scala 164:138] + node _T_579 = and(_T_576, _T_578) @[el2_lsu_stbuf.scala 164:136] + reg _T_580 : UInt, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_stbuf.scala 164:88] + _T_580 <= _T_579 @[el2_lsu_stbuf.scala 164:88] + node _T_581 = bits(stbuf_wr_en, 3, 3) @[el2_lsu_stbuf.scala 164:104] + node _T_582 = bits(_T_581, 0, 0) @[el2_lsu_stbuf.scala 164:114] + node _T_583 = bits(stbuf_vld, 3, 3) @[el2_lsu_stbuf.scala 164:131] + node _T_584 = mux(_T_582, UInt<1>("h01"), _T_583) @[el2_lsu_stbuf.scala 164:92] + node _T_585 = bits(stbuf_reset, 3, 3) @[el2_lsu_stbuf.scala 164:150] + node _T_586 = eq(_T_585, UInt<1>("h00")) @[el2_lsu_stbuf.scala 164:138] + node _T_587 = and(_T_584, _T_586) @[el2_lsu_stbuf.scala 164:136] + reg _T_588 : UInt, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_stbuf.scala 164:88] + _T_588 <= _T_587 @[el2_lsu_stbuf.scala 164:88] + node _T_589 = cat(_T_588, _T_580) @[Cat.scala 29:58] + node _T_590 = cat(_T_589, _T_572) @[Cat.scala 29:58] + node _T_591 = cat(_T_590, _T_564) @[Cat.scala 29:58] + stbuf_vld <= _T_591 @[el2_lsu_stbuf.scala 164:13] + node _T_592 = bits(stbuf_dma_kill_en, 0, 0) @[el2_lsu_stbuf.scala 166:114] + node _T_593 = bits(_T_592, 0, 0) @[el2_lsu_stbuf.scala 166:118] + node _T_594 = bits(stbuf_dma_kill, 0, 0) @[el2_lsu_stbuf.scala 166:144] + node _T_595 = mux(_T_593, UInt<1>("h01"), _T_594) @[el2_lsu_stbuf.scala 166:96] + node _T_596 = bits(stbuf_reset, 0, 0) @[el2_lsu_stbuf.scala 166:163] + node _T_597 = eq(_T_596, UInt<1>("h00")) @[el2_lsu_stbuf.scala 166:151] + node _T_598 = and(_T_595, _T_597) @[el2_lsu_stbuf.scala 166:149] + reg _T_599 : UInt, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_stbuf.scala 166:92] + _T_599 <= _T_598 @[el2_lsu_stbuf.scala 166:92] + node _T_600 = bits(stbuf_dma_kill_en, 1, 1) @[el2_lsu_stbuf.scala 166:114] + node _T_601 = bits(_T_600, 0, 0) @[el2_lsu_stbuf.scala 166:118] + node _T_602 = bits(stbuf_dma_kill, 1, 1) @[el2_lsu_stbuf.scala 166:144] + node _T_603 = mux(_T_601, UInt<1>("h01"), _T_602) @[el2_lsu_stbuf.scala 166:96] + node _T_604 = bits(stbuf_reset, 1, 1) @[el2_lsu_stbuf.scala 166:163] + node _T_605 = eq(_T_604, UInt<1>("h00")) @[el2_lsu_stbuf.scala 166:151] + node _T_606 = and(_T_603, _T_605) @[el2_lsu_stbuf.scala 166:149] + reg _T_607 : UInt, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_stbuf.scala 166:92] + _T_607 <= _T_606 @[el2_lsu_stbuf.scala 166:92] + node _T_608 = bits(stbuf_dma_kill_en, 2, 2) @[el2_lsu_stbuf.scala 166:114] + node _T_609 = bits(_T_608, 0, 0) @[el2_lsu_stbuf.scala 166:118] + node _T_610 = bits(stbuf_dma_kill, 2, 2) @[el2_lsu_stbuf.scala 166:144] + node _T_611 = mux(_T_609, UInt<1>("h01"), _T_610) @[el2_lsu_stbuf.scala 166:96] + node _T_612 = bits(stbuf_reset, 2, 2) @[el2_lsu_stbuf.scala 166:163] + node _T_613 = eq(_T_612, UInt<1>("h00")) @[el2_lsu_stbuf.scala 166:151] + node _T_614 = and(_T_611, _T_613) @[el2_lsu_stbuf.scala 166:149] + reg _T_615 : UInt, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_stbuf.scala 166:92] + _T_615 <= _T_614 @[el2_lsu_stbuf.scala 166:92] + node _T_616 = bits(stbuf_dma_kill_en, 3, 3) @[el2_lsu_stbuf.scala 166:114] + node _T_617 = bits(_T_616, 0, 0) @[el2_lsu_stbuf.scala 166:118] + node _T_618 = bits(stbuf_dma_kill, 3, 3) @[el2_lsu_stbuf.scala 166:144] + node _T_619 = mux(_T_617, UInt<1>("h01"), _T_618) @[el2_lsu_stbuf.scala 166:96] + node _T_620 = bits(stbuf_reset, 3, 3) @[el2_lsu_stbuf.scala 166:163] + node _T_621 = eq(_T_620, UInt<1>("h00")) @[el2_lsu_stbuf.scala 166:151] + node _T_622 = and(_T_619, _T_621) @[el2_lsu_stbuf.scala 166:149] + reg _T_623 : UInt, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_stbuf.scala 166:92] + _T_623 <= _T_622 @[el2_lsu_stbuf.scala 166:92] + node _T_624 = cat(_T_623, _T_615) @[Cat.scala 29:58] + node _T_625 = cat(_T_624, _T_607) @[Cat.scala 29:58] + node _T_626 = cat(_T_625, _T_599) @[Cat.scala 29:58] + stbuf_dma_kill <= _T_626 @[el2_lsu_stbuf.scala 166:18] + node _T_627 = bits(stbuf_wr_en, 0, 0) @[el2_lsu_stbuf.scala 167:108] + node _T_628 = bits(_T_627, 0, 0) @[el2_lsu_stbuf.scala 167:118] + node _T_629 = mux(_T_628, stbuf_byteenin[0], stbuf_byteen[0]) @[el2_lsu_stbuf.scala 167:96] + node _T_630 = bits(stbuf_reset, 0, 0) @[el2_lsu_stbuf.scala 167:206] + node _T_631 = eq(_T_630, UInt<1>("h00")) @[el2_lsu_stbuf.scala 167:194] + node _T_632 = bits(_T_631, 0, 0) @[Bitwise.scala 72:15] + node _T_633 = mux(_T_632, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_634 = and(_T_629, _T_633) @[el2_lsu_stbuf.scala 167:158] + reg _T_635 : UInt, io.lsu_stbuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_stbuf.scala 167:92] + _T_635 <= _T_634 @[el2_lsu_stbuf.scala 167:92] + node _T_636 = bits(stbuf_wr_en, 1, 1) @[el2_lsu_stbuf.scala 167:108] + node _T_637 = bits(_T_636, 0, 0) @[el2_lsu_stbuf.scala 167:118] + node _T_638 = mux(_T_637, stbuf_byteenin[1], stbuf_byteen[1]) @[el2_lsu_stbuf.scala 167:96] + node _T_639 = bits(stbuf_reset, 1, 1) @[el2_lsu_stbuf.scala 167:206] + node _T_640 = eq(_T_639, UInt<1>("h00")) @[el2_lsu_stbuf.scala 167:194] + node _T_641 = bits(_T_640, 0, 0) @[Bitwise.scala 72:15] + node _T_642 = mux(_T_641, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_643 = and(_T_638, _T_642) @[el2_lsu_stbuf.scala 167:158] + reg _T_644 : UInt, io.lsu_stbuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_stbuf.scala 167:92] + _T_644 <= _T_643 @[el2_lsu_stbuf.scala 167:92] + node _T_645 = bits(stbuf_wr_en, 2, 2) @[el2_lsu_stbuf.scala 167:108] + node _T_646 = bits(_T_645, 0, 0) @[el2_lsu_stbuf.scala 167:118] + node _T_647 = mux(_T_646, stbuf_byteenin[2], stbuf_byteen[2]) @[el2_lsu_stbuf.scala 167:96] + node _T_648 = bits(stbuf_reset, 2, 2) @[el2_lsu_stbuf.scala 167:206] + node _T_649 = eq(_T_648, UInt<1>("h00")) @[el2_lsu_stbuf.scala 167:194] + node _T_650 = bits(_T_649, 0, 0) @[Bitwise.scala 72:15] + node _T_651 = mux(_T_650, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_652 = and(_T_647, _T_651) @[el2_lsu_stbuf.scala 167:158] + reg _T_653 : UInt, io.lsu_stbuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_stbuf.scala 167:92] + _T_653 <= _T_652 @[el2_lsu_stbuf.scala 167:92] + node _T_654 = bits(stbuf_wr_en, 3, 3) @[el2_lsu_stbuf.scala 167:108] + node _T_655 = bits(_T_654, 0, 0) @[el2_lsu_stbuf.scala 167:118] + node _T_656 = mux(_T_655, stbuf_byteenin[3], stbuf_byteen[3]) @[el2_lsu_stbuf.scala 167:96] + node _T_657 = bits(stbuf_reset, 3, 3) @[el2_lsu_stbuf.scala 167:206] + node _T_658 = eq(_T_657, UInt<1>("h00")) @[el2_lsu_stbuf.scala 167:194] + node _T_659 = bits(_T_658, 0, 0) @[Bitwise.scala 72:15] + node _T_660 = mux(_T_659, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_661 = and(_T_656, _T_660) @[el2_lsu_stbuf.scala 167:158] + reg _T_662 : UInt, io.lsu_stbuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_stbuf.scala 167:92] + _T_662 <= _T_661 @[el2_lsu_stbuf.scala 167:92] + stbuf_byteen[0] <= _T_635 @[el2_lsu_stbuf.scala 167:16] + stbuf_byteen[1] <= _T_644 @[el2_lsu_stbuf.scala 167:16] + stbuf_byteen[2] <= _T_653 @[el2_lsu_stbuf.scala 167:16] + stbuf_byteen[3] <= _T_662 @[el2_lsu_stbuf.scala 167:16] + node _T_663 = bits(stbuf_wr_en, 0, 0) @[el2_lsu_stbuf.scala 172:56] + node _T_664 = bits(_T_663, 0, 0) @[el2_lsu_stbuf.scala 172:66] + inst rvclkhdr of rvclkhdr_2 @[el2_lib.scala 506:23] + rvclkhdr.clock <= clock + rvclkhdr.reset <= reset + rvclkhdr.io.clk <= clock @[el2_lib.scala 508:18] + rvclkhdr.io.en <= _T_664 @[el2_lib.scala 509:17] + rvclkhdr.io.scan_mode <= io.scan_mode @[el2_lib.scala 510:24] + reg _T_665 : UInt, rvclkhdr.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 512:16] + _T_665 <= stbuf_addrin[0] @[el2_lib.scala 512:16] + stbuf_addr[0] <= _T_665 @[el2_lsu_stbuf.scala 172:19] + node _T_666 = bits(stbuf_wr_en, 0, 0) @[el2_lsu_stbuf.scala 174:56] + node _T_667 = bits(_T_666, 0, 0) @[el2_lsu_stbuf.scala 174:66] + inst rvclkhdr_1 of rvclkhdr_3 @[el2_lib.scala 506:23] + rvclkhdr_1.clock <= clock + rvclkhdr_1.reset <= reset + rvclkhdr_1.io.clk <= clock @[el2_lib.scala 508:18] + rvclkhdr_1.io.en <= _T_667 @[el2_lib.scala 509:17] + rvclkhdr_1.io.scan_mode <= io.scan_mode @[el2_lib.scala 510:24] + reg _T_668 : UInt, rvclkhdr_1.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 512:16] + _T_668 <= stbuf_datain[0] @[el2_lib.scala 512:16] + stbuf_data[0] <= _T_668 @[el2_lsu_stbuf.scala 174:19] + node _T_669 = bits(stbuf_wr_en, 1, 1) @[el2_lsu_stbuf.scala 172:56] + node _T_670 = bits(_T_669, 0, 0) @[el2_lsu_stbuf.scala 172:66] + inst rvclkhdr_2 of rvclkhdr_4 @[el2_lib.scala 506:23] + rvclkhdr_2.clock <= clock + rvclkhdr_2.reset <= reset + rvclkhdr_2.io.clk <= clock @[el2_lib.scala 508:18] + rvclkhdr_2.io.en <= _T_670 @[el2_lib.scala 509:17] + rvclkhdr_2.io.scan_mode <= io.scan_mode @[el2_lib.scala 510:24] + reg _T_671 : UInt, rvclkhdr_2.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 512:16] + _T_671 <= stbuf_addrin[1] @[el2_lib.scala 512:16] + stbuf_addr[1] <= _T_671 @[el2_lsu_stbuf.scala 172:19] + node _T_672 = bits(stbuf_wr_en, 1, 1) @[el2_lsu_stbuf.scala 174:56] + node _T_673 = bits(_T_672, 0, 0) @[el2_lsu_stbuf.scala 174:66] + inst rvclkhdr_3 of rvclkhdr_5 @[el2_lib.scala 506:23] + rvclkhdr_3.clock <= clock + rvclkhdr_3.reset <= reset + rvclkhdr_3.io.clk <= clock @[el2_lib.scala 508:18] + rvclkhdr_3.io.en <= _T_673 @[el2_lib.scala 509:17] + rvclkhdr_3.io.scan_mode <= io.scan_mode @[el2_lib.scala 510:24] + reg _T_674 : UInt, rvclkhdr_3.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 512:16] + _T_674 <= stbuf_datain[1] @[el2_lib.scala 512:16] + stbuf_data[1] <= _T_674 @[el2_lsu_stbuf.scala 174:19] + node _T_675 = bits(stbuf_wr_en, 2, 2) @[el2_lsu_stbuf.scala 172:56] + node _T_676 = bits(_T_675, 0, 0) @[el2_lsu_stbuf.scala 172:66] + inst rvclkhdr_4 of rvclkhdr_6 @[el2_lib.scala 506:23] + rvclkhdr_4.clock <= clock + rvclkhdr_4.reset <= reset + rvclkhdr_4.io.clk <= clock @[el2_lib.scala 508:18] + rvclkhdr_4.io.en <= _T_676 @[el2_lib.scala 509:17] + rvclkhdr_4.io.scan_mode <= io.scan_mode @[el2_lib.scala 510:24] + reg _T_677 : UInt, rvclkhdr_4.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 512:16] + _T_677 <= stbuf_addrin[2] @[el2_lib.scala 512:16] + stbuf_addr[2] <= _T_677 @[el2_lsu_stbuf.scala 172:19] + node _T_678 = bits(stbuf_wr_en, 2, 2) @[el2_lsu_stbuf.scala 174:56] + node _T_679 = bits(_T_678, 0, 0) @[el2_lsu_stbuf.scala 174:66] + inst rvclkhdr_5 of rvclkhdr_7 @[el2_lib.scala 506:23] + rvclkhdr_5.clock <= clock + rvclkhdr_5.reset <= reset + rvclkhdr_5.io.clk <= clock @[el2_lib.scala 508:18] + rvclkhdr_5.io.en <= _T_679 @[el2_lib.scala 509:17] + rvclkhdr_5.io.scan_mode <= io.scan_mode @[el2_lib.scala 510:24] + reg _T_680 : UInt, rvclkhdr_5.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 512:16] + _T_680 <= stbuf_datain[2] @[el2_lib.scala 512:16] + stbuf_data[2] <= _T_680 @[el2_lsu_stbuf.scala 174:19] + node _T_681 = bits(stbuf_wr_en, 3, 3) @[el2_lsu_stbuf.scala 172:56] + node _T_682 = bits(_T_681, 0, 0) @[el2_lsu_stbuf.scala 172:66] + inst rvclkhdr_6 of rvclkhdr_8 @[el2_lib.scala 506:23] + rvclkhdr_6.clock <= clock + rvclkhdr_6.reset <= reset + rvclkhdr_6.io.clk <= clock @[el2_lib.scala 508:18] + rvclkhdr_6.io.en <= _T_682 @[el2_lib.scala 509:17] + rvclkhdr_6.io.scan_mode <= io.scan_mode @[el2_lib.scala 510:24] + reg _T_683 : UInt, rvclkhdr_6.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 512:16] + _T_683 <= stbuf_addrin[3] @[el2_lib.scala 512:16] + stbuf_addr[3] <= _T_683 @[el2_lsu_stbuf.scala 172:19] + node _T_684 = bits(stbuf_wr_en, 3, 3) @[el2_lsu_stbuf.scala 174:56] + node _T_685 = bits(_T_684, 0, 0) @[el2_lsu_stbuf.scala 174:66] + inst rvclkhdr_7 of rvclkhdr_9 @[el2_lib.scala 506:23] + rvclkhdr_7.clock <= clock + rvclkhdr_7.reset <= reset + rvclkhdr_7.io.clk <= clock @[el2_lib.scala 508:18] + rvclkhdr_7.io.en <= _T_685 @[el2_lib.scala 509:17] + rvclkhdr_7.io.scan_mode <= io.scan_mode @[el2_lib.scala 510:24] + reg _T_686 : UInt, rvclkhdr_7.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 512:16] + _T_686 <= stbuf_datain[3] @[el2_lib.scala 512:16] + stbuf_data[3] <= _T_686 @[el2_lsu_stbuf.scala 174:19] + reg _T_687 : UInt<1>, io.lsu_c1_m_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_stbuf.scala 176:52] + _T_687 <= ldst_dual_d @[el2_lsu_stbuf.scala 176:52] + ldst_dual_m <= _T_687 @[el2_lsu_stbuf.scala 176:42] + reg _T_688 : UInt<1>, io.lsu_c1_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_stbuf.scala 177:52] + _T_688 <= ldst_dual_m @[el2_lsu_stbuf.scala 177:52] + ldst_dual_r <= _T_688 @[el2_lsu_stbuf.scala 177:42] + node _T_689 = dshr(stbuf_vld, RdPtr) @[el2_lsu_stbuf.scala 180:43] + node _T_690 = bits(_T_689, 0, 0) @[el2_lsu_stbuf.scala 180:43] + node _T_691 = dshr(stbuf_dma_kill, RdPtr) @[el2_lsu_stbuf.scala 180:67] + node _T_692 = bits(_T_691, 0, 0) @[el2_lsu_stbuf.scala 180:67] + node _T_693 = and(_T_690, _T_692) @[el2_lsu_stbuf.scala 180:51] + io.stbuf_reqvld_flushed_any <= _T_693 @[el2_lsu_stbuf.scala 180:31] + node _T_694 = dshr(stbuf_vld, RdPtr) @[el2_lsu_stbuf.scala 181:36] + node _T_695 = bits(_T_694, 0, 0) @[el2_lsu_stbuf.scala 181:36] + node _T_696 = dshr(stbuf_dma_kill, RdPtr) @[el2_lsu_stbuf.scala 181:61] + node _T_697 = bits(_T_696, 0, 0) @[el2_lsu_stbuf.scala 181:61] + node _T_698 = eq(_T_697, UInt<1>("h00")) @[el2_lsu_stbuf.scala 181:46] + node _T_699 = and(_T_695, _T_698) @[el2_lsu_stbuf.scala 181:44] + node _T_700 = orr(stbuf_dma_kill_en) @[el2_lsu_stbuf.scala 181:91] + node _T_701 = eq(_T_700, UInt<1>("h00")) @[el2_lsu_stbuf.scala 181:71] + node _T_702 = and(_T_699, _T_701) @[el2_lsu_stbuf.scala 181:69] + io.stbuf_reqvld_any <= _T_702 @[el2_lsu_stbuf.scala 181:24] + io.stbuf_addr_any <= stbuf_addr[RdPtr] @[el2_lsu_stbuf.scala 182:22] + io.stbuf_data_any <= stbuf_data[RdPtr] @[el2_lsu_stbuf.scala 183:22] + node _T_703 = eq(dual_stbuf_write_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 185:44] + node _T_704 = and(io.ldst_stbuf_reqvld_r, _T_703) @[el2_lsu_stbuf.scala 185:42] + node _T_705 = or(store_coalesce_hi_r, store_coalesce_lo_r) @[el2_lsu_stbuf.scala 185:88] + node _T_706 = eq(_T_705, UInt<1>("h00")) @[el2_lsu_stbuf.scala 185:66] + node _T_707 = and(_T_704, _T_706) @[el2_lsu_stbuf.scala 185:64] + node _T_708 = and(io.ldst_stbuf_reqvld_r, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 186:30] + node _T_709 = and(store_coalesce_hi_r, store_coalesce_lo_r) @[el2_lsu_stbuf.scala 186:76] + node _T_710 = eq(_T_709, UInt<1>("h00")) @[el2_lsu_stbuf.scala 186:54] + node _T_711 = and(_T_708, _T_710) @[el2_lsu_stbuf.scala 186:52] + node _T_712 = or(_T_707, _T_711) @[el2_lsu_stbuf.scala 185:113] + node WrPtrEn = bits(_T_712, 0, 0) @[el2_lsu_stbuf.scala 186:101] + node _T_713 = and(io.ldst_stbuf_reqvld_r, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 187:46] + node _T_714 = or(store_coalesce_hi_r, store_coalesce_lo_r) @[el2_lsu_stbuf.scala 187:91] + node _T_715 = eq(_T_714, UInt<1>("h00")) @[el2_lsu_stbuf.scala 187:69] + node _T_716 = and(_T_713, _T_715) @[el2_lsu_stbuf.scala 187:67] + node _T_717 = bits(_T_716, 0, 0) @[el2_lsu_stbuf.scala 187:115] + node NxtWrPtr = mux(_T_717, WrPtrPlus2, WrPtrPlus1) @[el2_lsu_stbuf.scala 187:21] + node RdPtrEn = or(io.lsu_stbuf_commit_any, io.stbuf_reqvld_flushed_any) @[el2_lsu_stbuf.scala 188:42] + reg _T_718 : UInt, io.lsu_stbuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when WrPtrEn : @[Reg.scala 28:19] + _T_718 <= NxtWrPtr @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + WrPtr <= _T_718 @[el2_lsu_stbuf.scala 191:41] + reg _T_719 : UInt, io.lsu_stbuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when RdPtrEn : @[Reg.scala 28:19] + _T_719 <= RdPtrPlus1 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + RdPtr <= _T_719 @[el2_lsu_stbuf.scala 192:41] + node _T_720 = bits(stbuf_vld, 0, 0) @[el2_lsu_stbuf.scala 194:86] + node _T_721 = cat(UInt<3>("h00"), _T_720) @[Cat.scala 29:58] + node _T_722 = bits(stbuf_vld, 1, 1) @[el2_lsu_stbuf.scala 194:86] + node _T_723 = cat(UInt<3>("h00"), _T_722) @[Cat.scala 29:58] + node _T_724 = bits(stbuf_vld, 2, 2) @[el2_lsu_stbuf.scala 194:86] + node _T_725 = cat(UInt<3>("h00"), _T_724) @[Cat.scala 29:58] + node _T_726 = bits(stbuf_vld, 3, 3) @[el2_lsu_stbuf.scala 194:86] + node _T_727 = cat(UInt<3>("h00"), _T_726) @[Cat.scala 29:58] + wire _T_728 : UInt<4>[4] @[el2_lsu_stbuf.scala 194:59] + _T_728[0] <= _T_721 @[el2_lsu_stbuf.scala 194:59] + _T_728[1] <= _T_723 @[el2_lsu_stbuf.scala 194:59] + _T_728[2] <= _T_725 @[el2_lsu_stbuf.scala 194:59] + _T_728[3] <= _T_727 @[el2_lsu_stbuf.scala 194:59] + node _T_729 = add(_T_728[0], _T_728[1]) @[el2_lsu_stbuf.scala 194:101] + node _T_730 = tail(_T_729, 1) @[el2_lsu_stbuf.scala 194:101] + node _T_731 = add(_T_730, _T_728[2]) @[el2_lsu_stbuf.scala 194:101] + node _T_732 = tail(_T_731, 1) @[el2_lsu_stbuf.scala 194:101] + node _T_733 = add(_T_732, _T_728[3]) @[el2_lsu_stbuf.scala 194:101] + node stbuf_numvld_any = tail(_T_733, 1) @[el2_lsu_stbuf.scala 194:101] + node _T_734 = and(io.lsu_pkt_m.valid, io.lsu_pkt_m.store) @[el2_lsu_stbuf.scala 195:39] + node _T_735 = and(_T_734, io.addr_in_dccm_m) @[el2_lsu_stbuf.scala 195:60] + node _T_736 = eq(io.lsu_pkt_m.dma, UInt<1>("h00")) @[el2_lsu_stbuf.scala 195:82] + node isdccmst_m = and(_T_735, _T_736) @[el2_lsu_stbuf.scala 195:80] + node _T_737 = and(io.lsu_pkt_r.valid, io.lsu_pkt_r.store) @[el2_lsu_stbuf.scala 196:39] + node _T_738 = and(_T_737, io.addr_in_dccm_r) @[el2_lsu_stbuf.scala 196:60] + node _T_739 = eq(io.lsu_pkt_r.dma, UInt<1>("h00")) @[el2_lsu_stbuf.scala 196:82] + node isdccmst_r = and(_T_738, _T_739) @[el2_lsu_stbuf.scala 196:80] + node _T_740 = cat(UInt<1>("h00"), isdccmst_m) @[Cat.scala 29:58] + node _T_741 = and(isdccmst_m, ldst_dual_m) @[el2_lsu_stbuf.scala 198:62] + node _T_742 = dshl(_T_740, _T_741) @[el2_lsu_stbuf.scala 198:47] + stbuf_specvld_m <= _T_742 @[el2_lsu_stbuf.scala 198:19] + node _T_743 = cat(UInt<1>("h00"), isdccmst_r) @[Cat.scala 29:58] + node _T_744 = and(isdccmst_r, ldst_dual_r) @[el2_lsu_stbuf.scala 199:62] + node _T_745 = dshl(_T_743, _T_744) @[el2_lsu_stbuf.scala 199:47] + stbuf_specvld_r <= _T_745 @[el2_lsu_stbuf.scala 199:19] + node _T_746 = cat(UInt<2>("h00"), stbuf_specvld_m) @[Cat.scala 29:58] + node _T_747 = add(stbuf_numvld_any, _T_746) @[el2_lsu_stbuf.scala 200:44] + node _T_748 = tail(_T_747, 1) @[el2_lsu_stbuf.scala 200:44] + node _T_749 = cat(UInt<2>("h00"), stbuf_specvld_r) @[Cat.scala 29:58] + node _T_750 = add(_T_748, _T_749) @[el2_lsu_stbuf.scala 200:78] + node stbuf_specvld_any = tail(_T_750, 1) @[el2_lsu_stbuf.scala 200:78] + node _T_751 = eq(ldst_dual_d, UInt<1>("h00")) @[el2_lsu_stbuf.scala 202:34] + node _T_752 = and(_T_751, io.dec_lsu_valid_raw_d) @[el2_lsu_stbuf.scala 202:47] + node _T_753 = bits(_T_752, 0, 0) @[el2_lsu_stbuf.scala 202:73] + node _T_754 = geq(stbuf_specvld_any, UInt<3>("h04")) @[el2_lsu_stbuf.scala 202:99] + node _T_755 = geq(stbuf_specvld_any, UInt<2>("h03")) @[el2_lsu_stbuf.scala 202:140] + node _T_756 = mux(_T_753, _T_754, _T_755) @[el2_lsu_stbuf.scala 202:32] + io.lsu_stbuf_full_any <= _T_756 @[el2_lsu_stbuf.scala 202:26] + node _T_757 = eq(stbuf_numvld_any, UInt<1>("h00")) @[el2_lsu_stbuf.scala 203:46] + io.lsu_stbuf_empty_any <= _T_757 @[el2_lsu_stbuf.scala 203:26] + node cmpen_hi_m = and(io.lsu_cmpen_m, ldst_dual_m) @[el2_lsu_stbuf.scala 205:36] + node _T_758 = bits(io.end_addr_m, 15, 2) @[el2_lsu_stbuf.scala 206:32] + cmpaddr_hi_m <= _T_758 @[el2_lsu_stbuf.scala 206:16] + node _T_759 = bits(io.lsu_addr_m, 15, 2) @[el2_lsu_stbuf.scala 209:33] + cmpaddr_lo_m <= _T_759 @[el2_lsu_stbuf.scala 209:17] + node _T_760 = bits(stbuf_addr[0], 15, 2) @[el2_lsu_stbuf.scala 212:73] + node _T_761 = bits(cmpaddr_hi_m, 13, 0) @[el2_lsu_stbuf.scala 212:131] + node _T_762 = eq(_T_760, _T_761) @[el2_lsu_stbuf.scala 212:115] + node _T_763 = bits(stbuf_vld, 0, 0) @[el2_lsu_stbuf.scala 212:150] + node _T_764 = and(_T_762, _T_763) @[el2_lsu_stbuf.scala 212:139] + node _T_765 = bits(stbuf_dma_kill, 0, 0) @[el2_lsu_stbuf.scala 212:171] + node _T_766 = eq(_T_765, UInt<1>("h00")) @[el2_lsu_stbuf.scala 212:156] + node _T_767 = and(_T_764, _T_766) @[el2_lsu_stbuf.scala 212:154] + node _T_768 = and(_T_767, io.addr_in_dccm_m) @[el2_lsu_stbuf.scala 212:175] + node _T_769 = bits(stbuf_addr[1], 15, 2) @[el2_lsu_stbuf.scala 212:73] + node _T_770 = bits(cmpaddr_hi_m, 13, 0) @[el2_lsu_stbuf.scala 212:131] + node _T_771 = eq(_T_769, _T_770) @[el2_lsu_stbuf.scala 212:115] + node _T_772 = bits(stbuf_vld, 1, 1) @[el2_lsu_stbuf.scala 212:150] + node _T_773 = and(_T_771, _T_772) @[el2_lsu_stbuf.scala 212:139] + node _T_774 = bits(stbuf_dma_kill, 1, 1) @[el2_lsu_stbuf.scala 212:171] + node _T_775 = eq(_T_774, UInt<1>("h00")) @[el2_lsu_stbuf.scala 212:156] + node _T_776 = and(_T_773, _T_775) @[el2_lsu_stbuf.scala 212:154] + node _T_777 = and(_T_776, io.addr_in_dccm_m) @[el2_lsu_stbuf.scala 212:175] + node _T_778 = bits(stbuf_addr[2], 15, 2) @[el2_lsu_stbuf.scala 212:73] + node _T_779 = bits(cmpaddr_hi_m, 13, 0) @[el2_lsu_stbuf.scala 212:131] + node _T_780 = eq(_T_778, _T_779) @[el2_lsu_stbuf.scala 212:115] + node _T_781 = bits(stbuf_vld, 2, 2) @[el2_lsu_stbuf.scala 212:150] + node _T_782 = and(_T_780, _T_781) @[el2_lsu_stbuf.scala 212:139] + node _T_783 = bits(stbuf_dma_kill, 2, 2) @[el2_lsu_stbuf.scala 212:171] + node _T_784 = eq(_T_783, UInt<1>("h00")) @[el2_lsu_stbuf.scala 212:156] + node _T_785 = and(_T_782, _T_784) @[el2_lsu_stbuf.scala 212:154] + node _T_786 = and(_T_785, io.addr_in_dccm_m) @[el2_lsu_stbuf.scala 212:175] + node _T_787 = bits(stbuf_addr[3], 15, 2) @[el2_lsu_stbuf.scala 212:73] + node _T_788 = bits(cmpaddr_hi_m, 13, 0) @[el2_lsu_stbuf.scala 212:131] + node _T_789 = eq(_T_787, _T_788) @[el2_lsu_stbuf.scala 212:115] + node _T_790 = bits(stbuf_vld, 3, 3) @[el2_lsu_stbuf.scala 212:150] + node _T_791 = and(_T_789, _T_790) @[el2_lsu_stbuf.scala 212:139] + node _T_792 = bits(stbuf_dma_kill, 3, 3) @[el2_lsu_stbuf.scala 212:171] + node _T_793 = eq(_T_792, UInt<1>("h00")) @[el2_lsu_stbuf.scala 212:156] + node _T_794 = and(_T_791, _T_793) @[el2_lsu_stbuf.scala 212:154] + node _T_795 = and(_T_794, io.addr_in_dccm_m) @[el2_lsu_stbuf.scala 212:175] + node _T_796 = cat(_T_795, _T_786) @[Cat.scala 29:58] + node _T_797 = cat(_T_796, _T_777) @[Cat.scala 29:58] + node stbuf_match_hi = cat(_T_797, _T_768) @[Cat.scala 29:58] + node _T_798 = bits(stbuf_addr[0], 15, 2) @[el2_lsu_stbuf.scala 213:73] + node _T_799 = bits(cmpaddr_lo_m, 13, 0) @[el2_lsu_stbuf.scala 213:131] + node _T_800 = eq(_T_798, _T_799) @[el2_lsu_stbuf.scala 213:115] + node _T_801 = bits(stbuf_vld, 0, 0) @[el2_lsu_stbuf.scala 213:150] + node _T_802 = and(_T_800, _T_801) @[el2_lsu_stbuf.scala 213:139] + node _T_803 = bits(stbuf_dma_kill, 0, 0) @[el2_lsu_stbuf.scala 213:171] + node _T_804 = eq(_T_803, UInt<1>("h00")) @[el2_lsu_stbuf.scala 213:156] + node _T_805 = and(_T_802, _T_804) @[el2_lsu_stbuf.scala 213:154] + node _T_806 = and(_T_805, io.addr_in_dccm_m) @[el2_lsu_stbuf.scala 213:175] + node _T_807 = bits(stbuf_addr[1], 15, 2) @[el2_lsu_stbuf.scala 213:73] + node _T_808 = bits(cmpaddr_lo_m, 13, 0) @[el2_lsu_stbuf.scala 213:131] + node _T_809 = eq(_T_807, _T_808) @[el2_lsu_stbuf.scala 213:115] + node _T_810 = bits(stbuf_vld, 1, 1) @[el2_lsu_stbuf.scala 213:150] + node _T_811 = and(_T_809, _T_810) @[el2_lsu_stbuf.scala 213:139] + node _T_812 = bits(stbuf_dma_kill, 1, 1) @[el2_lsu_stbuf.scala 213:171] + node _T_813 = eq(_T_812, UInt<1>("h00")) @[el2_lsu_stbuf.scala 213:156] + node _T_814 = and(_T_811, _T_813) @[el2_lsu_stbuf.scala 213:154] + node _T_815 = and(_T_814, io.addr_in_dccm_m) @[el2_lsu_stbuf.scala 213:175] + node _T_816 = bits(stbuf_addr[2], 15, 2) @[el2_lsu_stbuf.scala 213:73] + node _T_817 = bits(cmpaddr_lo_m, 13, 0) @[el2_lsu_stbuf.scala 213:131] + node _T_818 = eq(_T_816, _T_817) @[el2_lsu_stbuf.scala 213:115] + node _T_819 = bits(stbuf_vld, 2, 2) @[el2_lsu_stbuf.scala 213:150] + node _T_820 = and(_T_818, _T_819) @[el2_lsu_stbuf.scala 213:139] + node _T_821 = bits(stbuf_dma_kill, 2, 2) @[el2_lsu_stbuf.scala 213:171] + node _T_822 = eq(_T_821, UInt<1>("h00")) @[el2_lsu_stbuf.scala 213:156] + node _T_823 = and(_T_820, _T_822) @[el2_lsu_stbuf.scala 213:154] + node _T_824 = and(_T_823, io.addr_in_dccm_m) @[el2_lsu_stbuf.scala 213:175] + node _T_825 = bits(stbuf_addr[3], 15, 2) @[el2_lsu_stbuf.scala 213:73] + node _T_826 = bits(cmpaddr_lo_m, 13, 0) @[el2_lsu_stbuf.scala 213:131] + node _T_827 = eq(_T_825, _T_826) @[el2_lsu_stbuf.scala 213:115] + node _T_828 = bits(stbuf_vld, 3, 3) @[el2_lsu_stbuf.scala 213:150] + node _T_829 = and(_T_827, _T_828) @[el2_lsu_stbuf.scala 213:139] + node _T_830 = bits(stbuf_dma_kill, 3, 3) @[el2_lsu_stbuf.scala 213:171] + node _T_831 = eq(_T_830, UInt<1>("h00")) @[el2_lsu_stbuf.scala 213:156] + node _T_832 = and(_T_829, _T_831) @[el2_lsu_stbuf.scala 213:154] + node _T_833 = and(_T_832, io.addr_in_dccm_m) @[el2_lsu_stbuf.scala 213:175] + node _T_834 = cat(_T_833, _T_824) @[Cat.scala 29:58] + node _T_835 = cat(_T_834, _T_815) @[Cat.scala 29:58] + node stbuf_match_lo = cat(_T_835, _T_806) @[Cat.scala 29:58] + node _T_836 = bits(stbuf_match_hi, 0, 0) @[el2_lsu_stbuf.scala 214:74] + node _T_837 = bits(stbuf_match_lo, 0, 0) @[el2_lsu_stbuf.scala 214:94] + node _T_838 = or(_T_836, _T_837) @[el2_lsu_stbuf.scala 214:78] + node _T_839 = and(_T_838, io.lsu_pkt_m.valid) @[el2_lsu_stbuf.scala 214:99] + node _T_840 = and(_T_839, io.lsu_pkt_m.dma) @[el2_lsu_stbuf.scala 214:120] + node _T_841 = and(_T_840, io.lsu_pkt_m.store) @[el2_lsu_stbuf.scala 214:139] + node _T_842 = bits(stbuf_match_hi, 1, 1) @[el2_lsu_stbuf.scala 214:74] + node _T_843 = bits(stbuf_match_lo, 1, 1) @[el2_lsu_stbuf.scala 214:94] + node _T_844 = or(_T_842, _T_843) @[el2_lsu_stbuf.scala 214:78] + node _T_845 = and(_T_844, io.lsu_pkt_m.valid) @[el2_lsu_stbuf.scala 214:99] + node _T_846 = and(_T_845, io.lsu_pkt_m.dma) @[el2_lsu_stbuf.scala 214:120] + node _T_847 = and(_T_846, io.lsu_pkt_m.store) @[el2_lsu_stbuf.scala 214:139] + node _T_848 = bits(stbuf_match_hi, 2, 2) @[el2_lsu_stbuf.scala 214:74] + node _T_849 = bits(stbuf_match_lo, 2, 2) @[el2_lsu_stbuf.scala 214:94] + node _T_850 = or(_T_848, _T_849) @[el2_lsu_stbuf.scala 214:78] + node _T_851 = and(_T_850, io.lsu_pkt_m.valid) @[el2_lsu_stbuf.scala 214:99] + node _T_852 = and(_T_851, io.lsu_pkt_m.dma) @[el2_lsu_stbuf.scala 214:120] + node _T_853 = and(_T_852, io.lsu_pkt_m.store) @[el2_lsu_stbuf.scala 214:139] + node _T_854 = bits(stbuf_match_hi, 3, 3) @[el2_lsu_stbuf.scala 214:74] + node _T_855 = bits(stbuf_match_lo, 3, 3) @[el2_lsu_stbuf.scala 214:94] + node _T_856 = or(_T_854, _T_855) @[el2_lsu_stbuf.scala 214:78] + node _T_857 = and(_T_856, io.lsu_pkt_m.valid) @[el2_lsu_stbuf.scala 214:99] + node _T_858 = and(_T_857, io.lsu_pkt_m.dma) @[el2_lsu_stbuf.scala 214:120] + node _T_859 = and(_T_858, io.lsu_pkt_m.store) @[el2_lsu_stbuf.scala 214:139] + node _T_860 = cat(_T_859, _T_853) @[Cat.scala 29:58] + node _T_861 = cat(_T_860, _T_847) @[Cat.scala 29:58] + node _T_862 = cat(_T_861, _T_841) @[Cat.scala 29:58] + stbuf_dma_kill_en <= _T_862 @[el2_lsu_stbuf.scala 214:21] + node _T_863 = bits(stbuf_match_hi, 0, 0) @[el2_lsu_stbuf.scala 217:112] + node _T_864 = bits(stbuf_byteen[0], 0, 0) @[el2_lsu_stbuf.scala 217:133] + node _T_865 = and(_T_863, _T_864) @[el2_lsu_stbuf.scala 217:116] + node _T_866 = bits(stbuf_vld, 0, 0) @[el2_lsu_stbuf.scala 217:148] + node stbuf_fwdbyteenvec_hi_0_0 = and(_T_865, _T_866) @[el2_lsu_stbuf.scala 217:137] + node _T_867 = bits(stbuf_match_hi, 0, 0) @[el2_lsu_stbuf.scala 217:112] + node _T_868 = bits(stbuf_byteen[0], 1, 1) @[el2_lsu_stbuf.scala 217:133] + node _T_869 = and(_T_867, _T_868) @[el2_lsu_stbuf.scala 217:116] + node _T_870 = bits(stbuf_vld, 0, 0) @[el2_lsu_stbuf.scala 217:148] + node stbuf_fwdbyteenvec_hi_0_1 = and(_T_869, _T_870) @[el2_lsu_stbuf.scala 217:137] + node _T_871 = bits(stbuf_match_hi, 0, 0) @[el2_lsu_stbuf.scala 217:112] + node _T_872 = bits(stbuf_byteen[0], 2, 2) @[el2_lsu_stbuf.scala 217:133] + node _T_873 = and(_T_871, _T_872) @[el2_lsu_stbuf.scala 217:116] + node _T_874 = bits(stbuf_vld, 0, 0) @[el2_lsu_stbuf.scala 217:148] + node stbuf_fwdbyteenvec_hi_0_2 = and(_T_873, _T_874) @[el2_lsu_stbuf.scala 217:137] + node _T_875 = bits(stbuf_match_hi, 0, 0) @[el2_lsu_stbuf.scala 217:112] + node _T_876 = bits(stbuf_byteen[0], 3, 3) @[el2_lsu_stbuf.scala 217:133] + node _T_877 = and(_T_875, _T_876) @[el2_lsu_stbuf.scala 217:116] + node _T_878 = bits(stbuf_vld, 0, 0) @[el2_lsu_stbuf.scala 217:148] + node stbuf_fwdbyteenvec_hi_0_3 = and(_T_877, _T_878) @[el2_lsu_stbuf.scala 217:137] + node _T_879 = bits(stbuf_match_hi, 1, 1) @[el2_lsu_stbuf.scala 217:112] + node _T_880 = bits(stbuf_byteen[1], 0, 0) @[el2_lsu_stbuf.scala 217:133] + node _T_881 = and(_T_879, _T_880) @[el2_lsu_stbuf.scala 217:116] + node _T_882 = bits(stbuf_vld, 1, 1) @[el2_lsu_stbuf.scala 217:148] + node stbuf_fwdbyteenvec_hi_1_0 = and(_T_881, _T_882) @[el2_lsu_stbuf.scala 217:137] + node _T_883 = bits(stbuf_match_hi, 1, 1) @[el2_lsu_stbuf.scala 217:112] + node _T_884 = bits(stbuf_byteen[1], 1, 1) @[el2_lsu_stbuf.scala 217:133] + node _T_885 = and(_T_883, _T_884) @[el2_lsu_stbuf.scala 217:116] + node _T_886 = bits(stbuf_vld, 1, 1) @[el2_lsu_stbuf.scala 217:148] + node stbuf_fwdbyteenvec_hi_1_1 = and(_T_885, _T_886) @[el2_lsu_stbuf.scala 217:137] + node _T_887 = bits(stbuf_match_hi, 1, 1) @[el2_lsu_stbuf.scala 217:112] + node _T_888 = bits(stbuf_byteen[1], 2, 2) @[el2_lsu_stbuf.scala 217:133] + node _T_889 = and(_T_887, _T_888) @[el2_lsu_stbuf.scala 217:116] + node _T_890 = bits(stbuf_vld, 1, 1) @[el2_lsu_stbuf.scala 217:148] + node stbuf_fwdbyteenvec_hi_1_2 = and(_T_889, _T_890) @[el2_lsu_stbuf.scala 217:137] + node _T_891 = bits(stbuf_match_hi, 1, 1) @[el2_lsu_stbuf.scala 217:112] + node _T_892 = bits(stbuf_byteen[1], 3, 3) @[el2_lsu_stbuf.scala 217:133] + node _T_893 = and(_T_891, _T_892) @[el2_lsu_stbuf.scala 217:116] + node _T_894 = bits(stbuf_vld, 1, 1) @[el2_lsu_stbuf.scala 217:148] + node stbuf_fwdbyteenvec_hi_1_3 = and(_T_893, _T_894) @[el2_lsu_stbuf.scala 217:137] + node _T_895 = bits(stbuf_match_hi, 2, 2) @[el2_lsu_stbuf.scala 217:112] + node _T_896 = bits(stbuf_byteen[2], 0, 0) @[el2_lsu_stbuf.scala 217:133] + node _T_897 = and(_T_895, _T_896) @[el2_lsu_stbuf.scala 217:116] + node _T_898 = bits(stbuf_vld, 2, 2) @[el2_lsu_stbuf.scala 217:148] + node stbuf_fwdbyteenvec_hi_2_0 = and(_T_897, _T_898) @[el2_lsu_stbuf.scala 217:137] + node _T_899 = bits(stbuf_match_hi, 2, 2) @[el2_lsu_stbuf.scala 217:112] + node _T_900 = bits(stbuf_byteen[2], 1, 1) @[el2_lsu_stbuf.scala 217:133] + node _T_901 = and(_T_899, _T_900) @[el2_lsu_stbuf.scala 217:116] + node _T_902 = bits(stbuf_vld, 2, 2) @[el2_lsu_stbuf.scala 217:148] + node stbuf_fwdbyteenvec_hi_2_1 = and(_T_901, _T_902) @[el2_lsu_stbuf.scala 217:137] + node _T_903 = bits(stbuf_match_hi, 2, 2) @[el2_lsu_stbuf.scala 217:112] + node _T_904 = bits(stbuf_byteen[2], 2, 2) @[el2_lsu_stbuf.scala 217:133] + node _T_905 = and(_T_903, _T_904) @[el2_lsu_stbuf.scala 217:116] + node _T_906 = bits(stbuf_vld, 2, 2) @[el2_lsu_stbuf.scala 217:148] + node stbuf_fwdbyteenvec_hi_2_2 = and(_T_905, _T_906) @[el2_lsu_stbuf.scala 217:137] + node _T_907 = bits(stbuf_match_hi, 2, 2) @[el2_lsu_stbuf.scala 217:112] + node _T_908 = bits(stbuf_byteen[2], 3, 3) @[el2_lsu_stbuf.scala 217:133] + node _T_909 = and(_T_907, _T_908) @[el2_lsu_stbuf.scala 217:116] + node _T_910 = bits(stbuf_vld, 2, 2) @[el2_lsu_stbuf.scala 217:148] + node stbuf_fwdbyteenvec_hi_2_3 = and(_T_909, _T_910) @[el2_lsu_stbuf.scala 217:137] + node _T_911 = bits(stbuf_match_hi, 3, 3) @[el2_lsu_stbuf.scala 217:112] + node _T_912 = bits(stbuf_byteen[3], 0, 0) @[el2_lsu_stbuf.scala 217:133] + node _T_913 = and(_T_911, _T_912) @[el2_lsu_stbuf.scala 217:116] + node _T_914 = bits(stbuf_vld, 3, 3) @[el2_lsu_stbuf.scala 217:148] + node stbuf_fwdbyteenvec_hi_3_0 = and(_T_913, _T_914) @[el2_lsu_stbuf.scala 217:137] + node _T_915 = bits(stbuf_match_hi, 3, 3) @[el2_lsu_stbuf.scala 217:112] + node _T_916 = bits(stbuf_byteen[3], 1, 1) @[el2_lsu_stbuf.scala 217:133] + node _T_917 = and(_T_915, _T_916) @[el2_lsu_stbuf.scala 217:116] + node _T_918 = bits(stbuf_vld, 3, 3) @[el2_lsu_stbuf.scala 217:148] + node stbuf_fwdbyteenvec_hi_3_1 = and(_T_917, _T_918) @[el2_lsu_stbuf.scala 217:137] + node _T_919 = bits(stbuf_match_hi, 3, 3) @[el2_lsu_stbuf.scala 217:112] + node _T_920 = bits(stbuf_byteen[3], 2, 2) @[el2_lsu_stbuf.scala 217:133] + node _T_921 = and(_T_919, _T_920) @[el2_lsu_stbuf.scala 217:116] + node _T_922 = bits(stbuf_vld, 3, 3) @[el2_lsu_stbuf.scala 217:148] + node stbuf_fwdbyteenvec_hi_3_2 = and(_T_921, _T_922) @[el2_lsu_stbuf.scala 217:137] + node _T_923 = bits(stbuf_match_hi, 3, 3) @[el2_lsu_stbuf.scala 217:112] + node _T_924 = bits(stbuf_byteen[3], 3, 3) @[el2_lsu_stbuf.scala 217:133] + node _T_925 = and(_T_923, _T_924) @[el2_lsu_stbuf.scala 217:116] + node _T_926 = bits(stbuf_vld, 3, 3) @[el2_lsu_stbuf.scala 217:148] + node stbuf_fwdbyteenvec_hi_3_3 = and(_T_925, _T_926) @[el2_lsu_stbuf.scala 217:137] + node _T_927 = bits(stbuf_match_lo, 0, 0) @[el2_lsu_stbuf.scala 218:112] + node _T_928 = bits(stbuf_byteen[0], 0, 0) @[el2_lsu_stbuf.scala 218:133] + node _T_929 = and(_T_927, _T_928) @[el2_lsu_stbuf.scala 218:116] + node _T_930 = bits(stbuf_vld, 0, 0) @[el2_lsu_stbuf.scala 218:148] + node stbuf_fwdbyteenvec_lo_0_0 = and(_T_929, _T_930) @[el2_lsu_stbuf.scala 218:137] + node _T_931 = bits(stbuf_match_lo, 0, 0) @[el2_lsu_stbuf.scala 218:112] + node _T_932 = bits(stbuf_byteen[0], 1, 1) @[el2_lsu_stbuf.scala 218:133] + node _T_933 = and(_T_931, _T_932) @[el2_lsu_stbuf.scala 218:116] + node _T_934 = bits(stbuf_vld, 0, 0) @[el2_lsu_stbuf.scala 218:148] + node stbuf_fwdbyteenvec_lo_0_1 = and(_T_933, _T_934) @[el2_lsu_stbuf.scala 218:137] + node _T_935 = bits(stbuf_match_lo, 0, 0) @[el2_lsu_stbuf.scala 218:112] + node _T_936 = bits(stbuf_byteen[0], 2, 2) @[el2_lsu_stbuf.scala 218:133] + node _T_937 = and(_T_935, _T_936) @[el2_lsu_stbuf.scala 218:116] + node _T_938 = bits(stbuf_vld, 0, 0) @[el2_lsu_stbuf.scala 218:148] + node stbuf_fwdbyteenvec_lo_0_2 = and(_T_937, _T_938) @[el2_lsu_stbuf.scala 218:137] + node _T_939 = bits(stbuf_match_lo, 0, 0) @[el2_lsu_stbuf.scala 218:112] + node _T_940 = bits(stbuf_byteen[0], 3, 3) @[el2_lsu_stbuf.scala 218:133] + node _T_941 = and(_T_939, _T_940) @[el2_lsu_stbuf.scala 218:116] + node _T_942 = bits(stbuf_vld, 0, 0) @[el2_lsu_stbuf.scala 218:148] + node stbuf_fwdbyteenvec_lo_0_3 = and(_T_941, _T_942) @[el2_lsu_stbuf.scala 218:137] + node _T_943 = bits(stbuf_match_lo, 1, 1) @[el2_lsu_stbuf.scala 218:112] + node _T_944 = bits(stbuf_byteen[1], 0, 0) @[el2_lsu_stbuf.scala 218:133] + node _T_945 = and(_T_943, _T_944) @[el2_lsu_stbuf.scala 218:116] + node _T_946 = bits(stbuf_vld, 1, 1) @[el2_lsu_stbuf.scala 218:148] + node stbuf_fwdbyteenvec_lo_1_0 = and(_T_945, _T_946) @[el2_lsu_stbuf.scala 218:137] + node _T_947 = bits(stbuf_match_lo, 1, 1) @[el2_lsu_stbuf.scala 218:112] + node _T_948 = bits(stbuf_byteen[1], 1, 1) @[el2_lsu_stbuf.scala 218:133] + node _T_949 = and(_T_947, _T_948) @[el2_lsu_stbuf.scala 218:116] + node _T_950 = bits(stbuf_vld, 1, 1) @[el2_lsu_stbuf.scala 218:148] + node stbuf_fwdbyteenvec_lo_1_1 = and(_T_949, _T_950) @[el2_lsu_stbuf.scala 218:137] + node _T_951 = bits(stbuf_match_lo, 1, 1) @[el2_lsu_stbuf.scala 218:112] + node _T_952 = bits(stbuf_byteen[1], 2, 2) @[el2_lsu_stbuf.scala 218:133] + node _T_953 = and(_T_951, _T_952) @[el2_lsu_stbuf.scala 218:116] + node _T_954 = bits(stbuf_vld, 1, 1) @[el2_lsu_stbuf.scala 218:148] + node stbuf_fwdbyteenvec_lo_1_2 = and(_T_953, _T_954) @[el2_lsu_stbuf.scala 218:137] + node _T_955 = bits(stbuf_match_lo, 1, 1) @[el2_lsu_stbuf.scala 218:112] + node _T_956 = bits(stbuf_byteen[1], 3, 3) @[el2_lsu_stbuf.scala 218:133] + node _T_957 = and(_T_955, _T_956) @[el2_lsu_stbuf.scala 218:116] + node _T_958 = bits(stbuf_vld, 1, 1) @[el2_lsu_stbuf.scala 218:148] + node stbuf_fwdbyteenvec_lo_1_3 = and(_T_957, _T_958) @[el2_lsu_stbuf.scala 218:137] + node _T_959 = bits(stbuf_match_lo, 2, 2) @[el2_lsu_stbuf.scala 218:112] + node _T_960 = bits(stbuf_byteen[2], 0, 0) @[el2_lsu_stbuf.scala 218:133] + node _T_961 = and(_T_959, _T_960) @[el2_lsu_stbuf.scala 218:116] + node _T_962 = bits(stbuf_vld, 2, 2) @[el2_lsu_stbuf.scala 218:148] + node stbuf_fwdbyteenvec_lo_2_0 = and(_T_961, _T_962) @[el2_lsu_stbuf.scala 218:137] + node _T_963 = bits(stbuf_match_lo, 2, 2) @[el2_lsu_stbuf.scala 218:112] + node _T_964 = bits(stbuf_byteen[2], 1, 1) @[el2_lsu_stbuf.scala 218:133] + node _T_965 = and(_T_963, _T_964) @[el2_lsu_stbuf.scala 218:116] + node _T_966 = bits(stbuf_vld, 2, 2) @[el2_lsu_stbuf.scala 218:148] + node stbuf_fwdbyteenvec_lo_2_1 = and(_T_965, _T_966) @[el2_lsu_stbuf.scala 218:137] + node _T_967 = bits(stbuf_match_lo, 2, 2) @[el2_lsu_stbuf.scala 218:112] + node _T_968 = bits(stbuf_byteen[2], 2, 2) @[el2_lsu_stbuf.scala 218:133] + node _T_969 = and(_T_967, _T_968) @[el2_lsu_stbuf.scala 218:116] + node _T_970 = bits(stbuf_vld, 2, 2) @[el2_lsu_stbuf.scala 218:148] + node stbuf_fwdbyteenvec_lo_2_2 = and(_T_969, _T_970) @[el2_lsu_stbuf.scala 218:137] + node _T_971 = bits(stbuf_match_lo, 2, 2) @[el2_lsu_stbuf.scala 218:112] + node _T_972 = bits(stbuf_byteen[2], 3, 3) @[el2_lsu_stbuf.scala 218:133] + node _T_973 = and(_T_971, _T_972) @[el2_lsu_stbuf.scala 218:116] + node _T_974 = bits(stbuf_vld, 2, 2) @[el2_lsu_stbuf.scala 218:148] + node stbuf_fwdbyteenvec_lo_2_3 = and(_T_973, _T_974) @[el2_lsu_stbuf.scala 218:137] + node _T_975 = bits(stbuf_match_lo, 3, 3) @[el2_lsu_stbuf.scala 218:112] + node _T_976 = bits(stbuf_byteen[3], 0, 0) @[el2_lsu_stbuf.scala 218:133] + node _T_977 = and(_T_975, _T_976) @[el2_lsu_stbuf.scala 218:116] + node _T_978 = bits(stbuf_vld, 3, 3) @[el2_lsu_stbuf.scala 218:148] + node stbuf_fwdbyteenvec_lo_3_0 = and(_T_977, _T_978) @[el2_lsu_stbuf.scala 218:137] + node _T_979 = bits(stbuf_match_lo, 3, 3) @[el2_lsu_stbuf.scala 218:112] + node _T_980 = bits(stbuf_byteen[3], 1, 1) @[el2_lsu_stbuf.scala 218:133] + node _T_981 = and(_T_979, _T_980) @[el2_lsu_stbuf.scala 218:116] + node _T_982 = bits(stbuf_vld, 3, 3) @[el2_lsu_stbuf.scala 218:148] + node stbuf_fwdbyteenvec_lo_3_1 = and(_T_981, _T_982) @[el2_lsu_stbuf.scala 218:137] + node _T_983 = bits(stbuf_match_lo, 3, 3) @[el2_lsu_stbuf.scala 218:112] + node _T_984 = bits(stbuf_byteen[3], 2, 2) @[el2_lsu_stbuf.scala 218:133] + node _T_985 = and(_T_983, _T_984) @[el2_lsu_stbuf.scala 218:116] + node _T_986 = bits(stbuf_vld, 3, 3) @[el2_lsu_stbuf.scala 218:148] + node stbuf_fwdbyteenvec_lo_3_2 = and(_T_985, _T_986) @[el2_lsu_stbuf.scala 218:137] + node _T_987 = bits(stbuf_match_lo, 3, 3) @[el2_lsu_stbuf.scala 218:112] + node _T_988 = bits(stbuf_byteen[3], 3, 3) @[el2_lsu_stbuf.scala 218:133] + node _T_989 = and(_T_987, _T_988) @[el2_lsu_stbuf.scala 218:116] + node _T_990 = bits(stbuf_vld, 3, 3) @[el2_lsu_stbuf.scala 218:148] + node stbuf_fwdbyteenvec_lo_3_3 = and(_T_989, _T_990) @[el2_lsu_stbuf.scala 218:137] + node _T_991 = or(stbuf_fwdbyteenvec_hi_0_0, stbuf_fwdbyteenvec_hi_1_0) @[el2_lsu_stbuf.scala 219:147] + node _T_992 = or(_T_991, stbuf_fwdbyteenvec_hi_2_0) @[el2_lsu_stbuf.scala 219:147] + node stbuf_fwdbyteen_hi_pre_m_0 = or(_T_992, stbuf_fwdbyteenvec_hi_3_0) @[el2_lsu_stbuf.scala 219:147] + node _T_993 = or(stbuf_fwdbyteenvec_hi_0_1, stbuf_fwdbyteenvec_hi_1_1) @[el2_lsu_stbuf.scala 219:147] + node _T_994 = or(_T_993, stbuf_fwdbyteenvec_hi_2_1) @[el2_lsu_stbuf.scala 219:147] + node stbuf_fwdbyteen_hi_pre_m_1 = or(_T_994, stbuf_fwdbyteenvec_hi_3_1) @[el2_lsu_stbuf.scala 219:147] + node _T_995 = or(stbuf_fwdbyteenvec_hi_0_2, stbuf_fwdbyteenvec_hi_1_2) @[el2_lsu_stbuf.scala 219:147] + node _T_996 = or(_T_995, stbuf_fwdbyteenvec_hi_2_2) @[el2_lsu_stbuf.scala 219:147] + node stbuf_fwdbyteen_hi_pre_m_2 = or(_T_996, stbuf_fwdbyteenvec_hi_3_2) @[el2_lsu_stbuf.scala 219:147] + node _T_997 = or(stbuf_fwdbyteenvec_hi_0_3, stbuf_fwdbyteenvec_hi_1_3) @[el2_lsu_stbuf.scala 219:147] + node _T_998 = or(_T_997, stbuf_fwdbyteenvec_hi_2_3) @[el2_lsu_stbuf.scala 219:147] + node stbuf_fwdbyteen_hi_pre_m_3 = or(_T_998, stbuf_fwdbyteenvec_hi_3_3) @[el2_lsu_stbuf.scala 219:147] + node _T_999 = or(stbuf_fwdbyteenvec_lo_0_0, stbuf_fwdbyteenvec_lo_1_0) @[el2_lsu_stbuf.scala 220:147] + node _T_1000 = or(_T_999, stbuf_fwdbyteenvec_lo_2_0) @[el2_lsu_stbuf.scala 220:147] + node stbuf_fwdbyteen_lo_pre_m_0 = or(_T_1000, stbuf_fwdbyteenvec_lo_3_0) @[el2_lsu_stbuf.scala 220:147] + node _T_1001 = or(stbuf_fwdbyteenvec_lo_0_1, stbuf_fwdbyteenvec_lo_1_1) @[el2_lsu_stbuf.scala 220:147] + node _T_1002 = or(_T_1001, stbuf_fwdbyteenvec_lo_2_1) @[el2_lsu_stbuf.scala 220:147] + node stbuf_fwdbyteen_lo_pre_m_1 = or(_T_1002, stbuf_fwdbyteenvec_lo_3_1) @[el2_lsu_stbuf.scala 220:147] + node _T_1003 = or(stbuf_fwdbyteenvec_lo_0_2, stbuf_fwdbyteenvec_lo_1_2) @[el2_lsu_stbuf.scala 220:147] + node _T_1004 = or(_T_1003, stbuf_fwdbyteenvec_lo_2_2) @[el2_lsu_stbuf.scala 220:147] + node stbuf_fwdbyteen_lo_pre_m_2 = or(_T_1004, stbuf_fwdbyteenvec_lo_3_2) @[el2_lsu_stbuf.scala 220:147] + node _T_1005 = or(stbuf_fwdbyteenvec_lo_0_3, stbuf_fwdbyteenvec_lo_1_3) @[el2_lsu_stbuf.scala 220:147] + node _T_1006 = or(_T_1005, stbuf_fwdbyteenvec_lo_2_3) @[el2_lsu_stbuf.scala 220:147] + node stbuf_fwdbyteen_lo_pre_m_3 = or(_T_1006, stbuf_fwdbyteenvec_lo_3_3) @[el2_lsu_stbuf.scala 220:147] + node _T_1007 = bits(stbuf_match_hi, 0, 0) @[el2_lsu_stbuf.scala 222:92] + node _T_1008 = bits(_T_1007, 0, 0) @[Bitwise.scala 72:15] + node _T_1009 = mux(_T_1008, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_1010 = and(_T_1009, stbuf_data[0]) @[el2_lsu_stbuf.scala 222:97] + node _T_1011 = bits(stbuf_match_hi, 1, 1) @[el2_lsu_stbuf.scala 222:92] + node _T_1012 = bits(_T_1011, 0, 0) @[Bitwise.scala 72:15] + node _T_1013 = mux(_T_1012, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_1014 = and(_T_1013, stbuf_data[1]) @[el2_lsu_stbuf.scala 222:97] + node _T_1015 = bits(stbuf_match_hi, 2, 2) @[el2_lsu_stbuf.scala 222:92] + node _T_1016 = bits(_T_1015, 0, 0) @[Bitwise.scala 72:15] + node _T_1017 = mux(_T_1016, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_1018 = and(_T_1017, stbuf_data[2]) @[el2_lsu_stbuf.scala 222:97] + node _T_1019 = bits(stbuf_match_hi, 3, 3) @[el2_lsu_stbuf.scala 222:92] + node _T_1020 = bits(_T_1019, 0, 0) @[Bitwise.scala 72:15] + node _T_1021 = mux(_T_1020, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_1022 = and(_T_1021, stbuf_data[3]) @[el2_lsu_stbuf.scala 222:97] + wire _T_1023 : UInt<32>[4] @[el2_lsu_stbuf.scala 222:65] + _T_1023[0] <= _T_1010 @[el2_lsu_stbuf.scala 222:65] + _T_1023[1] <= _T_1014 @[el2_lsu_stbuf.scala 222:65] + _T_1023[2] <= _T_1018 @[el2_lsu_stbuf.scala 222:65] + _T_1023[3] <= _T_1022 @[el2_lsu_stbuf.scala 222:65] + node _T_1024 = or(_T_1023[3], _T_1023[2]) @[el2_lsu_stbuf.scala 222:130] + node _T_1025 = or(_T_1024, _T_1023[1]) @[el2_lsu_stbuf.scala 222:130] + node stbuf_fwddata_hi_pre_m = or(_T_1025, _T_1023[0]) @[el2_lsu_stbuf.scala 222:130] + node _T_1026 = bits(stbuf_match_lo, 0, 0) @[el2_lsu_stbuf.scala 223:92] + node _T_1027 = bits(_T_1026, 0, 0) @[Bitwise.scala 72:15] + node _T_1028 = mux(_T_1027, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_1029 = and(_T_1028, stbuf_data[0]) @[el2_lsu_stbuf.scala 223:97] + node _T_1030 = bits(stbuf_match_lo, 1, 1) @[el2_lsu_stbuf.scala 223:92] + node _T_1031 = bits(_T_1030, 0, 0) @[Bitwise.scala 72:15] + node _T_1032 = mux(_T_1031, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_1033 = and(_T_1032, stbuf_data[1]) @[el2_lsu_stbuf.scala 223:97] + node _T_1034 = bits(stbuf_match_lo, 2, 2) @[el2_lsu_stbuf.scala 223:92] + node _T_1035 = bits(_T_1034, 0, 0) @[Bitwise.scala 72:15] + node _T_1036 = mux(_T_1035, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_1037 = and(_T_1036, stbuf_data[2]) @[el2_lsu_stbuf.scala 223:97] + node _T_1038 = bits(stbuf_match_lo, 3, 3) @[el2_lsu_stbuf.scala 223:92] + node _T_1039 = bits(_T_1038, 0, 0) @[Bitwise.scala 72:15] + node _T_1040 = mux(_T_1039, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_1041 = and(_T_1040, stbuf_data[3]) @[el2_lsu_stbuf.scala 223:97] + wire _T_1042 : UInt<32>[4] @[el2_lsu_stbuf.scala 223:65] + _T_1042[0] <= _T_1029 @[el2_lsu_stbuf.scala 223:65] + _T_1042[1] <= _T_1033 @[el2_lsu_stbuf.scala 223:65] + _T_1042[2] <= _T_1037 @[el2_lsu_stbuf.scala 223:65] + _T_1042[3] <= _T_1041 @[el2_lsu_stbuf.scala 223:65] + node _T_1043 = or(_T_1042[3], _T_1042[2]) @[el2_lsu_stbuf.scala 223:130] + node _T_1044 = or(_T_1043, _T_1042[1]) @[el2_lsu_stbuf.scala 223:130] + node stbuf_fwddata_lo_pre_m = or(_T_1044, _T_1042[0]) @[el2_lsu_stbuf.scala 223:130] + node _T_1045 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_stbuf.scala 226:54] + node _T_1046 = dshl(ldst_byteen_r, _T_1045) @[el2_lsu_stbuf.scala 226:38] + ldst_byteen_ext_r <= _T_1046 @[el2_lsu_stbuf.scala 226:21] + node ldst_byteen_hi_r = bits(ldst_byteen_ext_r, 7, 4) @[el2_lsu_stbuf.scala 227:43] + node ldst_byteen_lo_r = bits(ldst_byteen_ext_r, 3, 0) @[el2_lsu_stbuf.scala 228:43] + node _T_1047 = bits(io.lsu_addr_m, 31, 2) @[el2_lsu_stbuf.scala 230:42] + node _T_1048 = bits(io.lsu_addr_r, 31, 2) @[el2_lsu_stbuf.scala 230:66] + node _T_1049 = eq(_T_1047, _T_1048) @[el2_lsu_stbuf.scala 230:49] + node _T_1050 = and(_T_1049, io.lsu_pkt_r.valid) @[el2_lsu_stbuf.scala 230:74] + node _T_1051 = and(_T_1050, io.lsu_pkt_r.store) @[el2_lsu_stbuf.scala 230:95] + node _T_1052 = eq(io.lsu_pkt_r.dma, UInt<1>("h00")) @[el2_lsu_stbuf.scala 230:118] + node ld_addr_rhit_lo_lo = and(_T_1051, _T_1052) @[el2_lsu_stbuf.scala 230:116] + node _T_1053 = bits(io.end_addr_m, 31, 2) @[el2_lsu_stbuf.scala 231:42] + node _T_1054 = bits(io.lsu_addr_r, 31, 2) @[el2_lsu_stbuf.scala 231:66] + node _T_1055 = eq(_T_1053, _T_1054) @[el2_lsu_stbuf.scala 231:49] + node _T_1056 = and(_T_1055, io.lsu_pkt_r.valid) @[el2_lsu_stbuf.scala 231:74] + node _T_1057 = and(_T_1056, io.lsu_pkt_r.store) @[el2_lsu_stbuf.scala 231:95] + node _T_1058 = eq(io.lsu_pkt_r.dma, UInt<1>("h00")) @[el2_lsu_stbuf.scala 231:118] + node ld_addr_rhit_lo_hi = and(_T_1057, _T_1058) @[el2_lsu_stbuf.scala 231:116] + node _T_1059 = bits(io.lsu_addr_m, 31, 2) @[el2_lsu_stbuf.scala 232:42] + node _T_1060 = bits(io.end_addr_r, 31, 2) @[el2_lsu_stbuf.scala 232:66] + node _T_1061 = eq(_T_1059, _T_1060) @[el2_lsu_stbuf.scala 232:49] + node _T_1062 = and(_T_1061, io.lsu_pkt_r.valid) @[el2_lsu_stbuf.scala 232:74] + node _T_1063 = and(_T_1062, io.lsu_pkt_r.store) @[el2_lsu_stbuf.scala 232:95] + node _T_1064 = eq(io.lsu_pkt_r.dma, UInt<1>("h00")) @[el2_lsu_stbuf.scala 232:118] + node _T_1065 = and(_T_1063, _T_1064) @[el2_lsu_stbuf.scala 232:116] + node ld_addr_rhit_hi_lo = and(_T_1065, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 232:136] + node _T_1066 = bits(io.end_addr_m, 31, 2) @[el2_lsu_stbuf.scala 233:42] + node _T_1067 = bits(io.end_addr_r, 31, 2) @[el2_lsu_stbuf.scala 233:66] + node _T_1068 = eq(_T_1066, _T_1067) @[el2_lsu_stbuf.scala 233:49] + node _T_1069 = and(_T_1068, io.lsu_pkt_r.valid) @[el2_lsu_stbuf.scala 233:74] + node _T_1070 = and(_T_1069, io.lsu_pkt_r.store) @[el2_lsu_stbuf.scala 233:95] + node _T_1071 = eq(io.lsu_pkt_r.dma, UInt<1>("h00")) @[el2_lsu_stbuf.scala 233:118] + node _T_1072 = and(_T_1070, _T_1071) @[el2_lsu_stbuf.scala 233:116] + node ld_addr_rhit_hi_hi = and(_T_1072, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 233:136] + node _T_1073 = bits(ldst_byteen_lo_r, 0, 0) @[el2_lsu_stbuf.scala 235:97] + node _T_1074 = and(ld_addr_rhit_lo_lo, _T_1073) @[el2_lsu_stbuf.scala 235:79] + node _T_1075 = bits(ldst_byteen_lo_r, 1, 1) @[el2_lsu_stbuf.scala 235:97] + node _T_1076 = and(ld_addr_rhit_lo_lo, _T_1075) @[el2_lsu_stbuf.scala 235:79] + node _T_1077 = bits(ldst_byteen_lo_r, 2, 2) @[el2_lsu_stbuf.scala 235:97] + node _T_1078 = and(ld_addr_rhit_lo_lo, _T_1077) @[el2_lsu_stbuf.scala 235:79] + node _T_1079 = bits(ldst_byteen_lo_r, 3, 3) @[el2_lsu_stbuf.scala 235:97] + node _T_1080 = and(ld_addr_rhit_lo_lo, _T_1079) @[el2_lsu_stbuf.scala 235:79] + node _T_1081 = cat(_T_1080, _T_1078) @[Cat.scala 29:58] + node _T_1082 = cat(_T_1081, _T_1076) @[Cat.scala 29:58] + node _T_1083 = cat(_T_1082, _T_1074) @[Cat.scala 29:58] + ld_byte_rhit_lo_lo <= _T_1083 @[el2_lsu_stbuf.scala 235:22] + node _T_1084 = bits(ldst_byteen_lo_r, 0, 0) @[el2_lsu_stbuf.scala 236:97] + node _T_1085 = and(ld_addr_rhit_lo_hi, _T_1084) @[el2_lsu_stbuf.scala 236:79] + node _T_1086 = bits(ldst_byteen_lo_r, 1, 1) @[el2_lsu_stbuf.scala 236:97] + node _T_1087 = and(ld_addr_rhit_lo_hi, _T_1086) @[el2_lsu_stbuf.scala 236:79] + node _T_1088 = bits(ldst_byteen_lo_r, 2, 2) @[el2_lsu_stbuf.scala 236:97] + node _T_1089 = and(ld_addr_rhit_lo_hi, _T_1088) @[el2_lsu_stbuf.scala 236:79] + node _T_1090 = bits(ldst_byteen_lo_r, 3, 3) @[el2_lsu_stbuf.scala 236:97] + node _T_1091 = and(ld_addr_rhit_lo_hi, _T_1090) @[el2_lsu_stbuf.scala 236:79] + node _T_1092 = cat(_T_1091, _T_1089) @[Cat.scala 29:58] + node _T_1093 = cat(_T_1092, _T_1087) @[Cat.scala 29:58] + node _T_1094 = cat(_T_1093, _T_1085) @[Cat.scala 29:58] + ld_byte_rhit_lo_hi <= _T_1094 @[el2_lsu_stbuf.scala 236:22] + node _T_1095 = bits(ldst_byteen_hi_r, 0, 0) @[el2_lsu_stbuf.scala 237:97] + node _T_1096 = and(ld_addr_rhit_hi_lo, _T_1095) @[el2_lsu_stbuf.scala 237:79] + node _T_1097 = bits(ldst_byteen_hi_r, 1, 1) @[el2_lsu_stbuf.scala 237:97] + node _T_1098 = and(ld_addr_rhit_hi_lo, _T_1097) @[el2_lsu_stbuf.scala 237:79] + node _T_1099 = bits(ldst_byteen_hi_r, 2, 2) @[el2_lsu_stbuf.scala 237:97] + node _T_1100 = and(ld_addr_rhit_hi_lo, _T_1099) @[el2_lsu_stbuf.scala 237:79] + node _T_1101 = bits(ldst_byteen_hi_r, 3, 3) @[el2_lsu_stbuf.scala 237:97] + node _T_1102 = and(ld_addr_rhit_hi_lo, _T_1101) @[el2_lsu_stbuf.scala 237:79] + node _T_1103 = cat(_T_1102, _T_1100) @[Cat.scala 29:58] + node _T_1104 = cat(_T_1103, _T_1098) @[Cat.scala 29:58] + node _T_1105 = cat(_T_1104, _T_1096) @[Cat.scala 29:58] + ld_byte_rhit_hi_lo <= _T_1105 @[el2_lsu_stbuf.scala 237:22] + node _T_1106 = bits(ldst_byteen_hi_r, 0, 0) @[el2_lsu_stbuf.scala 238:97] + node _T_1107 = and(ld_addr_rhit_hi_hi, _T_1106) @[el2_lsu_stbuf.scala 238:79] + node _T_1108 = bits(ldst_byteen_hi_r, 1, 1) @[el2_lsu_stbuf.scala 238:97] + node _T_1109 = and(ld_addr_rhit_hi_hi, _T_1108) @[el2_lsu_stbuf.scala 238:79] + node _T_1110 = bits(ldst_byteen_hi_r, 2, 2) @[el2_lsu_stbuf.scala 238:97] + node _T_1111 = and(ld_addr_rhit_hi_hi, _T_1110) @[el2_lsu_stbuf.scala 238:79] + node _T_1112 = bits(ldst_byteen_hi_r, 3, 3) @[el2_lsu_stbuf.scala 238:97] + node _T_1113 = and(ld_addr_rhit_hi_hi, _T_1112) @[el2_lsu_stbuf.scala 238:79] + node _T_1114 = cat(_T_1113, _T_1111) @[Cat.scala 29:58] + node _T_1115 = cat(_T_1114, _T_1109) @[Cat.scala 29:58] + node _T_1116 = cat(_T_1115, _T_1107) @[Cat.scala 29:58] + ld_byte_rhit_hi_hi <= _T_1116 @[el2_lsu_stbuf.scala 238:22] + node _T_1117 = bits(ld_byte_rhit_lo_lo, 0, 0) @[el2_lsu_stbuf.scala 240:75] + node _T_1118 = bits(ld_byte_rhit_hi_lo, 0, 0) @[el2_lsu_stbuf.scala 240:99] + node _T_1119 = or(_T_1117, _T_1118) @[el2_lsu_stbuf.scala 240:79] + node _T_1120 = bits(ld_byte_rhit_lo_lo, 1, 1) @[el2_lsu_stbuf.scala 240:75] + node _T_1121 = bits(ld_byte_rhit_hi_lo, 1, 1) @[el2_lsu_stbuf.scala 240:99] + node _T_1122 = or(_T_1120, _T_1121) @[el2_lsu_stbuf.scala 240:79] + node _T_1123 = bits(ld_byte_rhit_lo_lo, 2, 2) @[el2_lsu_stbuf.scala 240:75] + node _T_1124 = bits(ld_byte_rhit_hi_lo, 2, 2) @[el2_lsu_stbuf.scala 240:99] + node _T_1125 = or(_T_1123, _T_1124) @[el2_lsu_stbuf.scala 240:79] + node _T_1126 = bits(ld_byte_rhit_lo_lo, 3, 3) @[el2_lsu_stbuf.scala 240:75] + node _T_1127 = bits(ld_byte_rhit_hi_lo, 3, 3) @[el2_lsu_stbuf.scala 240:99] + node _T_1128 = or(_T_1126, _T_1127) @[el2_lsu_stbuf.scala 240:79] + node _T_1129 = cat(_T_1128, _T_1125) @[Cat.scala 29:58] + node _T_1130 = cat(_T_1129, _T_1122) @[Cat.scala 29:58] + node _T_1131 = cat(_T_1130, _T_1119) @[Cat.scala 29:58] + ld_byte_rhit_lo <= _T_1131 @[el2_lsu_stbuf.scala 240:19] + node _T_1132 = bits(ld_byte_rhit_lo_hi, 0, 0) @[el2_lsu_stbuf.scala 241:75] + node _T_1133 = bits(ld_byte_rhit_hi_hi, 0, 0) @[el2_lsu_stbuf.scala 241:99] + node _T_1134 = or(_T_1132, _T_1133) @[el2_lsu_stbuf.scala 241:79] + node _T_1135 = bits(ld_byte_rhit_lo_hi, 1, 1) @[el2_lsu_stbuf.scala 241:75] + node _T_1136 = bits(ld_byte_rhit_hi_hi, 1, 1) @[el2_lsu_stbuf.scala 241:99] + node _T_1137 = or(_T_1135, _T_1136) @[el2_lsu_stbuf.scala 241:79] + node _T_1138 = bits(ld_byte_rhit_lo_hi, 2, 2) @[el2_lsu_stbuf.scala 241:75] + node _T_1139 = bits(ld_byte_rhit_hi_hi, 2, 2) @[el2_lsu_stbuf.scala 241:99] + node _T_1140 = or(_T_1138, _T_1139) @[el2_lsu_stbuf.scala 241:79] + node _T_1141 = bits(ld_byte_rhit_lo_hi, 3, 3) @[el2_lsu_stbuf.scala 241:75] + node _T_1142 = bits(ld_byte_rhit_hi_hi, 3, 3) @[el2_lsu_stbuf.scala 241:99] + node _T_1143 = or(_T_1141, _T_1142) @[el2_lsu_stbuf.scala 241:79] + node _T_1144 = cat(_T_1143, _T_1140) @[Cat.scala 29:58] + node _T_1145 = cat(_T_1144, _T_1137) @[Cat.scala 29:58] + node _T_1146 = cat(_T_1145, _T_1134) @[Cat.scala 29:58] + ld_byte_rhit_hi <= _T_1146 @[el2_lsu_stbuf.scala 241:19] + node _T_1147 = bits(ld_byte_rhit_lo_lo, 0, 0) @[el2_lsu_stbuf.scala 243:48] + node _T_1148 = bits(_T_1147, 0, 0) @[Bitwise.scala 72:15] + node _T_1149 = mux(_T_1148, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1150 = bits(io.store_data_lo_r, 7, 0) @[el2_lsu_stbuf.scala 243:73] + node _T_1151 = and(_T_1149, _T_1150) @[el2_lsu_stbuf.scala 243:53] + node _T_1152 = bits(ld_byte_rhit_hi_lo, 0, 0) @[el2_lsu_stbuf.scala 243:109] + node _T_1153 = bits(_T_1152, 0, 0) @[Bitwise.scala 72:15] + node _T_1154 = mux(_T_1153, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1155 = bits(io.store_data_hi_r, 7, 0) @[el2_lsu_stbuf.scala 243:134] + node _T_1156 = and(_T_1154, _T_1155) @[el2_lsu_stbuf.scala 243:114] + node fwdpipe1_lo = or(_T_1151, _T_1156) @[el2_lsu_stbuf.scala 243:80] + node _T_1157 = bits(ld_byte_rhit_lo_lo, 1, 1) @[el2_lsu_stbuf.scala 244:48] + node _T_1158 = bits(_T_1157, 0, 0) @[Bitwise.scala 72:15] + node _T_1159 = mux(_T_1158, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1160 = bits(io.store_data_lo_r, 15, 8) @[el2_lsu_stbuf.scala 244:73] + node _T_1161 = and(_T_1159, _T_1160) @[el2_lsu_stbuf.scala 244:53] + node _T_1162 = bits(ld_byte_rhit_hi_lo, 1, 1) @[el2_lsu_stbuf.scala 244:110] + node _T_1163 = bits(_T_1162, 0, 0) @[Bitwise.scala 72:15] + node _T_1164 = mux(_T_1163, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1165 = bits(io.store_data_hi_r, 15, 8) @[el2_lsu_stbuf.scala 244:135] + node _T_1166 = and(_T_1164, _T_1165) @[el2_lsu_stbuf.scala 244:115] + node fwdpipe2_lo = or(_T_1161, _T_1166) @[el2_lsu_stbuf.scala 244:81] + node _T_1167 = bits(ld_byte_rhit_lo_lo, 2, 2) @[el2_lsu_stbuf.scala 245:48] + node _T_1168 = bits(_T_1167, 0, 0) @[Bitwise.scala 72:15] + node _T_1169 = mux(_T_1168, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1170 = bits(io.store_data_lo_r, 23, 16) @[el2_lsu_stbuf.scala 245:73] + node _T_1171 = and(_T_1169, _T_1170) @[el2_lsu_stbuf.scala 245:53] + node _T_1172 = bits(ld_byte_rhit_hi_lo, 2, 2) @[el2_lsu_stbuf.scala 245:111] + node _T_1173 = bits(_T_1172, 0, 0) @[Bitwise.scala 72:15] + node _T_1174 = mux(_T_1173, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1175 = bits(io.store_data_hi_r, 23, 16) @[el2_lsu_stbuf.scala 245:136] + node _T_1176 = and(_T_1174, _T_1175) @[el2_lsu_stbuf.scala 245:116] + node fwdpipe3_lo = or(_T_1171, _T_1176) @[el2_lsu_stbuf.scala 245:82] + node _T_1177 = bits(ld_byte_rhit_lo_lo, 3, 3) @[el2_lsu_stbuf.scala 246:48] + node _T_1178 = bits(_T_1177, 0, 0) @[Bitwise.scala 72:15] + node _T_1179 = mux(_T_1178, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1180 = bits(io.store_data_lo_r, 31, 24) @[el2_lsu_stbuf.scala 246:73] + node _T_1181 = and(_T_1179, _T_1180) @[el2_lsu_stbuf.scala 246:53] + node _T_1182 = bits(ld_byte_rhit_hi_lo, 3, 3) @[el2_lsu_stbuf.scala 246:111] + node _T_1183 = bits(_T_1182, 0, 0) @[Bitwise.scala 72:15] + node _T_1184 = mux(_T_1183, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1185 = bits(io.store_data_hi_r, 31, 24) @[el2_lsu_stbuf.scala 246:136] + node _T_1186 = and(_T_1184, _T_1185) @[el2_lsu_stbuf.scala 246:116] + node fwdpipe4_lo = or(_T_1181, _T_1186) @[el2_lsu_stbuf.scala 246:82] + node _T_1187 = cat(fwdpipe2_lo, fwdpipe1_lo) @[Cat.scala 29:58] + node _T_1188 = cat(fwdpipe4_lo, fwdpipe3_lo) @[Cat.scala 29:58] + node _T_1189 = cat(_T_1188, _T_1187) @[Cat.scala 29:58] + ld_fwddata_rpipe_lo <= _T_1189 @[el2_lsu_stbuf.scala 247:23] + node _T_1190 = bits(ld_byte_rhit_lo_hi, 0, 0) @[el2_lsu_stbuf.scala 249:48] + node _T_1191 = bits(_T_1190, 0, 0) @[Bitwise.scala 72:15] + node _T_1192 = mux(_T_1191, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1193 = bits(io.store_data_lo_r, 7, 0) @[el2_lsu_stbuf.scala 249:73] + node _T_1194 = and(_T_1192, _T_1193) @[el2_lsu_stbuf.scala 249:53] + node _T_1195 = bits(ld_byte_rhit_hi_hi, 0, 0) @[el2_lsu_stbuf.scala 249:109] + node _T_1196 = bits(_T_1195, 0, 0) @[Bitwise.scala 72:15] + node _T_1197 = mux(_T_1196, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1198 = bits(io.store_data_hi_r, 7, 0) @[el2_lsu_stbuf.scala 249:134] + node _T_1199 = and(_T_1197, _T_1198) @[el2_lsu_stbuf.scala 249:114] + node fwdpipe1_hi = or(_T_1194, _T_1199) @[el2_lsu_stbuf.scala 249:80] + node _T_1200 = bits(ld_byte_rhit_lo_hi, 1, 1) @[el2_lsu_stbuf.scala 250:48] + node _T_1201 = bits(_T_1200, 0, 0) @[Bitwise.scala 72:15] + node _T_1202 = mux(_T_1201, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1203 = bits(io.store_data_lo_r, 15, 8) @[el2_lsu_stbuf.scala 250:73] + node _T_1204 = and(_T_1202, _T_1203) @[el2_lsu_stbuf.scala 250:53] + node _T_1205 = bits(ld_byte_rhit_hi_hi, 1, 1) @[el2_lsu_stbuf.scala 250:110] + node _T_1206 = bits(_T_1205, 0, 0) @[Bitwise.scala 72:15] + node _T_1207 = mux(_T_1206, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1208 = bits(io.store_data_hi_r, 15, 8) @[el2_lsu_stbuf.scala 250:135] + node _T_1209 = and(_T_1207, _T_1208) @[el2_lsu_stbuf.scala 250:115] + node fwdpipe2_hi = or(_T_1204, _T_1209) @[el2_lsu_stbuf.scala 250:81] + node _T_1210 = bits(ld_byte_rhit_lo_hi, 2, 2) @[el2_lsu_stbuf.scala 251:48] + node _T_1211 = bits(_T_1210, 0, 0) @[Bitwise.scala 72:15] + node _T_1212 = mux(_T_1211, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1213 = bits(io.store_data_lo_r, 23, 16) @[el2_lsu_stbuf.scala 251:73] + node _T_1214 = and(_T_1212, _T_1213) @[el2_lsu_stbuf.scala 251:53] + node _T_1215 = bits(ld_byte_rhit_hi_hi, 2, 2) @[el2_lsu_stbuf.scala 251:111] + node _T_1216 = bits(_T_1215, 0, 0) @[Bitwise.scala 72:15] + node _T_1217 = mux(_T_1216, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1218 = bits(io.store_data_hi_r, 23, 16) @[el2_lsu_stbuf.scala 251:136] + node _T_1219 = and(_T_1217, _T_1218) @[el2_lsu_stbuf.scala 251:116] + node fwdpipe3_hi = or(_T_1214, _T_1219) @[el2_lsu_stbuf.scala 251:82] + node _T_1220 = bits(ld_byte_rhit_lo_hi, 3, 3) @[el2_lsu_stbuf.scala 252:48] + node _T_1221 = bits(_T_1220, 0, 0) @[Bitwise.scala 72:15] + node _T_1222 = mux(_T_1221, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1223 = bits(io.store_data_lo_r, 31, 24) @[el2_lsu_stbuf.scala 252:73] + node _T_1224 = and(_T_1222, _T_1223) @[el2_lsu_stbuf.scala 252:53] + node _T_1225 = bits(ld_byte_rhit_hi_hi, 3, 3) @[el2_lsu_stbuf.scala 252:111] + node _T_1226 = bits(_T_1225, 0, 0) @[Bitwise.scala 72:15] + node _T_1227 = mux(_T_1226, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1228 = bits(io.store_data_hi_r, 31, 24) @[el2_lsu_stbuf.scala 252:136] + node _T_1229 = and(_T_1227, _T_1228) @[el2_lsu_stbuf.scala 252:116] + node fwdpipe4_hi = or(_T_1224, _T_1229) @[el2_lsu_stbuf.scala 252:82] + node _T_1230 = cat(fwdpipe2_hi, fwdpipe1_hi) @[Cat.scala 29:58] + node _T_1231 = cat(fwdpipe4_hi, fwdpipe3_hi) @[Cat.scala 29:58] + node _T_1232 = cat(_T_1231, _T_1230) @[Cat.scala 29:58] + ld_fwddata_rpipe_hi <= _T_1232 @[el2_lsu_stbuf.scala 253:23] + node _T_1233 = bits(ld_byte_rhit_lo_lo, 0, 0) @[el2_lsu_stbuf.scala 255:74] + node _T_1234 = bits(ld_byte_rhit_hi_lo, 0, 0) @[el2_lsu_stbuf.scala 255:98] + node _T_1235 = or(_T_1233, _T_1234) @[el2_lsu_stbuf.scala 255:78] + node _T_1236 = bits(ld_byte_rhit_lo_lo, 1, 1) @[el2_lsu_stbuf.scala 255:74] + node _T_1237 = bits(ld_byte_rhit_hi_lo, 1, 1) @[el2_lsu_stbuf.scala 255:98] + node _T_1238 = or(_T_1236, _T_1237) @[el2_lsu_stbuf.scala 255:78] + node _T_1239 = bits(ld_byte_rhit_lo_lo, 2, 2) @[el2_lsu_stbuf.scala 255:74] + node _T_1240 = bits(ld_byte_rhit_hi_lo, 2, 2) @[el2_lsu_stbuf.scala 255:98] + node _T_1241 = or(_T_1239, _T_1240) @[el2_lsu_stbuf.scala 255:78] + node _T_1242 = bits(ld_byte_rhit_lo_lo, 3, 3) @[el2_lsu_stbuf.scala 255:74] + node _T_1243 = bits(ld_byte_rhit_hi_lo, 3, 3) @[el2_lsu_stbuf.scala 255:98] + node _T_1244 = or(_T_1242, _T_1243) @[el2_lsu_stbuf.scala 255:78] + node _T_1245 = cat(_T_1244, _T_1241) @[Cat.scala 29:58] + node _T_1246 = cat(_T_1245, _T_1238) @[Cat.scala 29:58] + node _T_1247 = cat(_T_1246, _T_1235) @[Cat.scala 29:58] + ld_byte_hit_lo <= _T_1247 @[el2_lsu_stbuf.scala 255:18] + node _T_1248 = bits(ld_byte_rhit_lo_hi, 0, 0) @[el2_lsu_stbuf.scala 256:74] + node _T_1249 = bits(ld_byte_rhit_hi_hi, 0, 0) @[el2_lsu_stbuf.scala 256:98] + node _T_1250 = or(_T_1248, _T_1249) @[el2_lsu_stbuf.scala 256:78] + node _T_1251 = bits(ld_byte_rhit_lo_hi, 1, 1) @[el2_lsu_stbuf.scala 256:74] + node _T_1252 = bits(ld_byte_rhit_hi_hi, 1, 1) @[el2_lsu_stbuf.scala 256:98] + node _T_1253 = or(_T_1251, _T_1252) @[el2_lsu_stbuf.scala 256:78] + node _T_1254 = bits(ld_byte_rhit_lo_hi, 2, 2) @[el2_lsu_stbuf.scala 256:74] + node _T_1255 = bits(ld_byte_rhit_hi_hi, 2, 2) @[el2_lsu_stbuf.scala 256:98] + node _T_1256 = or(_T_1254, _T_1255) @[el2_lsu_stbuf.scala 256:78] + node _T_1257 = bits(ld_byte_rhit_lo_hi, 3, 3) @[el2_lsu_stbuf.scala 256:74] + node _T_1258 = bits(ld_byte_rhit_hi_hi, 3, 3) @[el2_lsu_stbuf.scala 256:98] + node _T_1259 = or(_T_1257, _T_1258) @[el2_lsu_stbuf.scala 256:78] + node _T_1260 = cat(_T_1259, _T_1256) @[Cat.scala 29:58] + node _T_1261 = cat(_T_1260, _T_1253) @[Cat.scala 29:58] + node _T_1262 = cat(_T_1261, _T_1250) @[Cat.scala 29:58] + ld_byte_hit_hi <= _T_1262 @[el2_lsu_stbuf.scala 256:18] + node _T_1263 = bits(ld_byte_hit_hi, 0, 0) @[el2_lsu_stbuf.scala 258:79] + node _T_1264 = or(_T_1263, stbuf_fwdbyteen_hi_pre_m_0) @[el2_lsu_stbuf.scala 258:83] + node _T_1265 = bits(ld_byte_hit_hi, 1, 1) @[el2_lsu_stbuf.scala 258:79] + node _T_1266 = or(_T_1265, stbuf_fwdbyteen_hi_pre_m_1) @[el2_lsu_stbuf.scala 258:83] + node _T_1267 = bits(ld_byte_hit_hi, 2, 2) @[el2_lsu_stbuf.scala 258:79] + node _T_1268 = or(_T_1267, stbuf_fwdbyteen_hi_pre_m_2) @[el2_lsu_stbuf.scala 258:83] + node _T_1269 = bits(ld_byte_hit_hi, 3, 3) @[el2_lsu_stbuf.scala 258:79] + node _T_1270 = or(_T_1269, stbuf_fwdbyteen_hi_pre_m_3) @[el2_lsu_stbuf.scala 258:83] + node _T_1271 = cat(_T_1270, _T_1268) @[Cat.scala 29:58] + node _T_1272 = cat(_T_1271, _T_1266) @[Cat.scala 29:58] + node _T_1273 = cat(_T_1272, _T_1264) @[Cat.scala 29:58] + io.stbuf_fwdbyteen_hi_m <= _T_1273 @[el2_lsu_stbuf.scala 258:27] + node _T_1274 = bits(ld_byte_hit_lo, 0, 0) @[el2_lsu_stbuf.scala 259:79] + node _T_1275 = or(_T_1274, stbuf_fwdbyteen_lo_pre_m_0) @[el2_lsu_stbuf.scala 259:83] + node _T_1276 = bits(ld_byte_hit_lo, 1, 1) @[el2_lsu_stbuf.scala 259:79] + node _T_1277 = or(_T_1276, stbuf_fwdbyteen_lo_pre_m_1) @[el2_lsu_stbuf.scala 259:83] + node _T_1278 = bits(ld_byte_hit_lo, 2, 2) @[el2_lsu_stbuf.scala 259:79] + node _T_1279 = or(_T_1278, stbuf_fwdbyteen_lo_pre_m_2) @[el2_lsu_stbuf.scala 259:83] + node _T_1280 = bits(ld_byte_hit_lo, 3, 3) @[el2_lsu_stbuf.scala 259:79] + node _T_1281 = or(_T_1280, stbuf_fwdbyteen_lo_pre_m_3) @[el2_lsu_stbuf.scala 259:83] + node _T_1282 = cat(_T_1281, _T_1279) @[Cat.scala 29:58] + node _T_1283 = cat(_T_1282, _T_1277) @[Cat.scala 29:58] + node _T_1284 = cat(_T_1283, _T_1275) @[Cat.scala 29:58] + io.stbuf_fwdbyteen_lo_m <= _T_1284 @[el2_lsu_stbuf.scala 259:27] + node _T_1285 = bits(ld_byte_rhit_lo, 0, 0) @[el2_lsu_stbuf.scala 262:46] + node _T_1286 = bits(ld_fwddata_rpipe_lo, 7, 0) @[el2_lsu_stbuf.scala 262:69] + node _T_1287 = bits(stbuf_fwddata_lo_pre_m, 7, 0) @[el2_lsu_stbuf.scala 262:97] + node stbuf_fwdpipe1_lo = mux(_T_1285, _T_1286, _T_1287) @[el2_lsu_stbuf.scala 262:30] + node _T_1288 = bits(ld_byte_rhit_lo, 1, 1) @[el2_lsu_stbuf.scala 263:46] + node _T_1289 = bits(ld_fwddata_rpipe_lo, 15, 8) @[el2_lsu_stbuf.scala 263:69] + node _T_1290 = bits(stbuf_fwddata_lo_pre_m, 15, 8) @[el2_lsu_stbuf.scala 263:98] + node stbuf_fwdpipe2_lo = mux(_T_1288, _T_1289, _T_1290) @[el2_lsu_stbuf.scala 263:30] + node _T_1291 = bits(ld_byte_rhit_lo, 2, 2) @[el2_lsu_stbuf.scala 264:46] + node _T_1292 = bits(ld_fwddata_rpipe_lo, 23, 16) @[el2_lsu_stbuf.scala 264:69] + node _T_1293 = bits(stbuf_fwddata_lo_pre_m, 23, 16) @[el2_lsu_stbuf.scala 264:99] + node stbuf_fwdpipe3_lo = mux(_T_1291, _T_1292, _T_1293) @[el2_lsu_stbuf.scala 264:30] + node _T_1294 = bits(ld_byte_rhit_lo, 3, 3) @[el2_lsu_stbuf.scala 265:46] + node _T_1295 = bits(ld_fwddata_rpipe_lo, 31, 24) @[el2_lsu_stbuf.scala 265:69] + node _T_1296 = bits(stbuf_fwddata_lo_pre_m, 31, 24) @[el2_lsu_stbuf.scala 265:99] + node stbuf_fwdpipe4_lo = mux(_T_1294, _T_1295, _T_1296) @[el2_lsu_stbuf.scala 265:30] + node _T_1297 = cat(stbuf_fwdpipe2_lo, stbuf_fwdpipe1_lo) @[Cat.scala 29:58] + node _T_1298 = cat(stbuf_fwdpipe4_lo, stbuf_fwdpipe3_lo) @[Cat.scala 29:58] + node _T_1299 = cat(_T_1298, _T_1297) @[Cat.scala 29:58] + io.stbuf_fwddata_lo_m <= _T_1299 @[el2_lsu_stbuf.scala 266:25] + node _T_1300 = bits(ld_byte_rhit_hi, 0, 0) @[el2_lsu_stbuf.scala 268:46] + node _T_1301 = bits(ld_fwddata_rpipe_hi, 7, 0) @[el2_lsu_stbuf.scala 268:69] + node _T_1302 = bits(stbuf_fwddata_hi_pre_m, 7, 0) @[el2_lsu_stbuf.scala 268:97] + node stbuf_fwdpipe1_hi = mux(_T_1300, _T_1301, _T_1302) @[el2_lsu_stbuf.scala 268:30] + node _T_1303 = bits(ld_byte_rhit_hi, 1, 1) @[el2_lsu_stbuf.scala 269:46] + node _T_1304 = bits(ld_fwddata_rpipe_hi, 15, 8) @[el2_lsu_stbuf.scala 269:69] + node _T_1305 = bits(stbuf_fwddata_hi_pre_m, 15, 8) @[el2_lsu_stbuf.scala 269:98] + node stbuf_fwdpipe2_hi = mux(_T_1303, _T_1304, _T_1305) @[el2_lsu_stbuf.scala 269:30] + node _T_1306 = bits(ld_byte_rhit_hi, 2, 2) @[el2_lsu_stbuf.scala 270:46] + node _T_1307 = bits(ld_fwddata_rpipe_hi, 23, 16) @[el2_lsu_stbuf.scala 270:69] + node _T_1308 = bits(stbuf_fwddata_hi_pre_m, 23, 16) @[el2_lsu_stbuf.scala 270:99] + node stbuf_fwdpipe3_hi = mux(_T_1306, _T_1307, _T_1308) @[el2_lsu_stbuf.scala 270:30] + node _T_1309 = bits(ld_byte_rhit_hi, 3, 3) @[el2_lsu_stbuf.scala 271:46] + node _T_1310 = bits(ld_fwddata_rpipe_hi, 31, 24) @[el2_lsu_stbuf.scala 271:69] + node _T_1311 = bits(stbuf_fwddata_hi_pre_m, 31, 24) @[el2_lsu_stbuf.scala 271:99] + node stbuf_fwdpipe4_hi = mux(_T_1309, _T_1310, _T_1311) @[el2_lsu_stbuf.scala 271:30] + node _T_1312 = cat(stbuf_fwdpipe2_hi, stbuf_fwdpipe1_hi) @[Cat.scala 29:58] + node _T_1313 = cat(stbuf_fwdpipe4_hi, stbuf_fwdpipe3_hi) @[Cat.scala 29:58] + node _T_1314 = cat(_T_1313, _T_1312) @[Cat.scala 29:58] + io.stbuf_fwddata_hi_m <= _T_1314 @[el2_lsu_stbuf.scala 272:25] + + extmodule TEC_RV_ICG_10 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_10 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_10 @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + extmodule TEC_RV_ICG_11 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_11 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_11 @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + module el2_lsu_ecc : + input clock : Clock + input reset : AsyncReset + output io : {flip lsu_c2_r_clk : Clock, flip lsu_pkt_m : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip lsu_pkt_r : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip stbuf_data_any : UInt<32>, flip dec_tlu_core_ecc_disable : UInt<1>, flip lsu_dccm_rden_r : UInt<1>, flip addr_in_dccm_r : UInt<1>, flip lsu_addr_r : UInt<16>, flip end_addr_r : UInt<16>, flip lsu_addr_m : UInt<16>, flip end_addr_m : UInt<16>, flip dccm_rdata_hi_r : UInt<32>, flip dccm_rdata_lo_r : UInt<32>, flip dccm_rdata_hi_m : UInt<32>, flip dccm_rdata_lo_m : UInt<32>, flip dccm_data_ecc_hi_r : UInt<7>, flip dccm_data_ecc_lo_r : UInt<7>, flip dccm_data_ecc_hi_m : UInt<7>, flip dccm_data_ecc_lo_m : UInt<7>, flip ld_single_ecc_error_r : UInt<1>, flip ld_single_ecc_error_r_ff : UInt<1>, flip lsu_dccm_rden_m : UInt<1>, flip addr_in_dccm_m : UInt<1>, flip dma_dccm_wen : UInt<1>, flip dma_dccm_wdata_lo : UInt<32>, flip dma_dccm_wdata_hi : UInt<32>, flip scan_mode : UInt<1>, sec_data_hi_r : UInt<32>, sec_data_lo_r : UInt<32>, sec_data_hi_m : UInt<32>, sec_data_lo_m : UInt<32>, sec_data_hi_r_ff : UInt<32>, sec_data_lo_r_ff : UInt<32>, dma_dccm_wdata_ecc_hi : UInt<7>, dma_dccm_wdata_ecc_lo : UInt<7>, stbuf_ecc_any : UInt<7>, sec_data_ecc_hi_r_ff : UInt<7>, sec_data_ecc_lo_r_ff : UInt<7>, single_ecc_error_hi_r : UInt<1>, single_ecc_error_lo_r : UInt<1>, lsu_single_ecc_error_r : UInt<1>, lsu_double_ecc_error_r : UInt<1>, lsu_single_ecc_error_m : UInt<1>, lsu_double_ecc_error_m : UInt<1>} + + wire is_ldst_r : UInt<1> + is_ldst_r <= UInt<1>("h00") + wire is_ldst_hi_any : UInt<1> + is_ldst_hi_any <= UInt<1>("h00") + wire is_ldst_lo_any : UInt<1> + is_ldst_lo_any <= UInt<1>("h00") + wire dccm_wdata_hi_any : UInt<32> + dccm_wdata_hi_any <= UInt<32>("h00") + wire dccm_wdata_lo_any : UInt<32> + dccm_wdata_lo_any <= UInt<32>("h00") + wire dccm_rdata_hi_any : UInt<32> + dccm_rdata_hi_any <= UInt<32>("h00") + wire dccm_rdata_lo_any : UInt<32> + dccm_rdata_lo_any <= UInt<32>("h00") + wire dccm_data_ecc_hi_any : UInt<7> + dccm_data_ecc_hi_any <= UInt<7>("h00") + wire dccm_data_ecc_lo_any : UInt<7> + dccm_data_ecc_lo_any <= UInt<7>("h00") + wire double_ecc_error_hi_m : UInt<1> + double_ecc_error_hi_m <= UInt<1>("h00") + wire double_ecc_error_lo_m : UInt<1> + double_ecc_error_lo_m <= UInt<1>("h00") + wire double_ecc_error_hi_r : UInt<1> + double_ecc_error_hi_r <= UInt<1>("h00") + wire double_ecc_error_lo_r : UInt<1> + double_ecc_error_lo_r <= UInt<1>("h00") + wire ldst_dual_m : UInt<1> + ldst_dual_m <= UInt<1>("h00") + wire ldst_dual_r : UInt<1> + ldst_dual_r <= UInt<1>("h00") + wire is_ldst_m : UInt<1> + is_ldst_m <= UInt<1>("h00") + wire is_ldst_hi_m : UInt<1> + is_ldst_hi_m <= UInt<1>("h00") + wire is_ldst_lo_m : UInt<1> + is_ldst_lo_m <= UInt<1>("h00") + wire is_ldst_hi_r : UInt<1> + is_ldst_hi_r <= UInt<1>("h00") + wire is_ldst_lo_r : UInt<1> + is_ldst_lo_r <= UInt<1>("h00") + io.sec_data_hi_m <= UInt<1>("h00") @[el2_lsu_ecc.scala 90:32] + io.sec_data_lo_m <= UInt<1>("h00") @[el2_lsu_ecc.scala 91:32] + io.lsu_single_ecc_error_m <= UInt<1>("h00") @[el2_lsu_ecc.scala 92:30] + io.lsu_double_ecc_error_m <= UInt<1>("h00") @[el2_lsu_ecc.scala 93:30] + wire _T : UInt<1>[18] @[el2_lib.scala 311:18] + wire _T_1 : UInt<1>[18] @[el2_lib.scala 312:18] + wire _T_2 : UInt<1>[18] @[el2_lib.scala 313:18] + wire _T_3 : UInt<1>[15] @[el2_lib.scala 314:18] + wire _T_4 : UInt<1>[15] @[el2_lib.scala 315:18] + wire _T_5 : UInt<1>[6] @[el2_lib.scala 316:18] + node _T_6 = bits(dccm_rdata_hi_any, 0, 0) @[el2_lib.scala 323:36] + _T[0] <= _T_6 @[el2_lib.scala 323:30] + node _T_7 = bits(dccm_rdata_hi_any, 0, 0) @[el2_lib.scala 324:36] + _T_1[0] <= _T_7 @[el2_lib.scala 324:30] + node _T_8 = bits(dccm_rdata_hi_any, 1, 1) @[el2_lib.scala 323:36] + _T[1] <= _T_8 @[el2_lib.scala 323:30] + node _T_9 = bits(dccm_rdata_hi_any, 1, 1) @[el2_lib.scala 325:36] + _T_2[0] <= _T_9 @[el2_lib.scala 325:30] + node _T_10 = bits(dccm_rdata_hi_any, 2, 2) @[el2_lib.scala 324:36] + _T_1[1] <= _T_10 @[el2_lib.scala 324:30] + node _T_11 = bits(dccm_rdata_hi_any, 2, 2) @[el2_lib.scala 325:36] + _T_2[1] <= _T_11 @[el2_lib.scala 325:30] + node _T_12 = bits(dccm_rdata_hi_any, 3, 3) @[el2_lib.scala 323:36] + _T[2] <= _T_12 @[el2_lib.scala 323:30] + node _T_13 = bits(dccm_rdata_hi_any, 3, 3) @[el2_lib.scala 324:36] + _T_1[2] <= _T_13 @[el2_lib.scala 324:30] + node _T_14 = bits(dccm_rdata_hi_any, 3, 3) @[el2_lib.scala 325:36] + _T_2[2] <= _T_14 @[el2_lib.scala 325:30] + node _T_15 = bits(dccm_rdata_hi_any, 4, 4) @[el2_lib.scala 323:36] + _T[3] <= _T_15 @[el2_lib.scala 323:30] + node _T_16 = bits(dccm_rdata_hi_any, 4, 4) @[el2_lib.scala 326:36] + _T_3[0] <= _T_16 @[el2_lib.scala 326:30] + node _T_17 = bits(dccm_rdata_hi_any, 5, 5) @[el2_lib.scala 324:36] + _T_1[3] <= _T_17 @[el2_lib.scala 324:30] + node _T_18 = bits(dccm_rdata_hi_any, 5, 5) @[el2_lib.scala 326:36] + _T_3[1] <= _T_18 @[el2_lib.scala 326:30] + node _T_19 = bits(dccm_rdata_hi_any, 6, 6) @[el2_lib.scala 323:36] + _T[4] <= _T_19 @[el2_lib.scala 323:30] + node _T_20 = bits(dccm_rdata_hi_any, 6, 6) @[el2_lib.scala 324:36] + _T_1[4] <= _T_20 @[el2_lib.scala 324:30] + node _T_21 = bits(dccm_rdata_hi_any, 6, 6) @[el2_lib.scala 326:36] + _T_3[2] <= _T_21 @[el2_lib.scala 326:30] + node _T_22 = bits(dccm_rdata_hi_any, 7, 7) @[el2_lib.scala 325:36] + _T_2[3] <= _T_22 @[el2_lib.scala 325:30] + node _T_23 = bits(dccm_rdata_hi_any, 7, 7) @[el2_lib.scala 326:36] + _T_3[3] <= _T_23 @[el2_lib.scala 326:30] + node _T_24 = bits(dccm_rdata_hi_any, 8, 8) @[el2_lib.scala 323:36] + _T[5] <= _T_24 @[el2_lib.scala 323:30] + node _T_25 = bits(dccm_rdata_hi_any, 8, 8) @[el2_lib.scala 325:36] + _T_2[4] <= _T_25 @[el2_lib.scala 325:30] + node _T_26 = bits(dccm_rdata_hi_any, 8, 8) @[el2_lib.scala 326:36] + _T_3[4] <= _T_26 @[el2_lib.scala 326:30] + node _T_27 = bits(dccm_rdata_hi_any, 9, 9) @[el2_lib.scala 324:36] + _T_1[5] <= _T_27 @[el2_lib.scala 324:30] + node _T_28 = bits(dccm_rdata_hi_any, 9, 9) @[el2_lib.scala 325:36] + _T_2[5] <= _T_28 @[el2_lib.scala 325:30] + node _T_29 = bits(dccm_rdata_hi_any, 9, 9) @[el2_lib.scala 326:36] + _T_3[5] <= _T_29 @[el2_lib.scala 326:30] + node _T_30 = bits(dccm_rdata_hi_any, 10, 10) @[el2_lib.scala 323:36] + _T[6] <= _T_30 @[el2_lib.scala 323:30] + node _T_31 = bits(dccm_rdata_hi_any, 10, 10) @[el2_lib.scala 324:36] + _T_1[6] <= _T_31 @[el2_lib.scala 324:30] + node _T_32 = bits(dccm_rdata_hi_any, 10, 10) @[el2_lib.scala 325:36] + _T_2[6] <= _T_32 @[el2_lib.scala 325:30] + node _T_33 = bits(dccm_rdata_hi_any, 10, 10) @[el2_lib.scala 326:36] + _T_3[6] <= _T_33 @[el2_lib.scala 326:30] + node _T_34 = bits(dccm_rdata_hi_any, 11, 11) @[el2_lib.scala 323:36] + _T[7] <= _T_34 @[el2_lib.scala 323:30] + node _T_35 = bits(dccm_rdata_hi_any, 11, 11) @[el2_lib.scala 327:36] + _T_4[0] <= _T_35 @[el2_lib.scala 327:30] + node _T_36 = bits(dccm_rdata_hi_any, 12, 12) @[el2_lib.scala 324:36] + _T_1[7] <= _T_36 @[el2_lib.scala 324:30] + node _T_37 = bits(dccm_rdata_hi_any, 12, 12) @[el2_lib.scala 327:36] + _T_4[1] <= _T_37 @[el2_lib.scala 327:30] + node _T_38 = bits(dccm_rdata_hi_any, 13, 13) @[el2_lib.scala 323:36] + _T[8] <= _T_38 @[el2_lib.scala 323:30] + node _T_39 = bits(dccm_rdata_hi_any, 13, 13) @[el2_lib.scala 324:36] + _T_1[8] <= _T_39 @[el2_lib.scala 324:30] + node _T_40 = bits(dccm_rdata_hi_any, 13, 13) @[el2_lib.scala 327:36] + _T_4[2] <= _T_40 @[el2_lib.scala 327:30] + node _T_41 = bits(dccm_rdata_hi_any, 14, 14) @[el2_lib.scala 325:36] + _T_2[7] <= _T_41 @[el2_lib.scala 325:30] + node _T_42 = bits(dccm_rdata_hi_any, 14, 14) @[el2_lib.scala 327:36] + _T_4[3] <= _T_42 @[el2_lib.scala 327:30] + node _T_43 = bits(dccm_rdata_hi_any, 15, 15) @[el2_lib.scala 323:36] + _T[9] <= _T_43 @[el2_lib.scala 323:30] + node _T_44 = bits(dccm_rdata_hi_any, 15, 15) @[el2_lib.scala 325:36] + _T_2[8] <= _T_44 @[el2_lib.scala 325:30] + node _T_45 = bits(dccm_rdata_hi_any, 15, 15) @[el2_lib.scala 327:36] + _T_4[4] <= _T_45 @[el2_lib.scala 327:30] + node _T_46 = bits(dccm_rdata_hi_any, 16, 16) @[el2_lib.scala 324:36] + _T_1[9] <= _T_46 @[el2_lib.scala 324:30] + node _T_47 = bits(dccm_rdata_hi_any, 16, 16) @[el2_lib.scala 325:36] + _T_2[9] <= _T_47 @[el2_lib.scala 325:30] + node _T_48 = bits(dccm_rdata_hi_any, 16, 16) @[el2_lib.scala 327:36] + _T_4[5] <= _T_48 @[el2_lib.scala 327:30] + node _T_49 = bits(dccm_rdata_hi_any, 17, 17) @[el2_lib.scala 323:36] + _T[10] <= _T_49 @[el2_lib.scala 323:30] + node _T_50 = bits(dccm_rdata_hi_any, 17, 17) @[el2_lib.scala 324:36] + _T_1[10] <= _T_50 @[el2_lib.scala 324:30] + node _T_51 = bits(dccm_rdata_hi_any, 17, 17) @[el2_lib.scala 325:36] + _T_2[10] <= _T_51 @[el2_lib.scala 325:30] + node _T_52 = bits(dccm_rdata_hi_any, 17, 17) @[el2_lib.scala 327:36] + _T_4[6] <= _T_52 @[el2_lib.scala 327:30] + node _T_53 = bits(dccm_rdata_hi_any, 18, 18) @[el2_lib.scala 326:36] + _T_3[7] <= _T_53 @[el2_lib.scala 326:30] + node _T_54 = bits(dccm_rdata_hi_any, 18, 18) @[el2_lib.scala 327:36] + _T_4[7] <= _T_54 @[el2_lib.scala 327:30] + node _T_55 = bits(dccm_rdata_hi_any, 19, 19) @[el2_lib.scala 323:36] + _T[11] <= _T_55 @[el2_lib.scala 323:30] + node _T_56 = bits(dccm_rdata_hi_any, 19, 19) @[el2_lib.scala 326:36] + _T_3[8] <= _T_56 @[el2_lib.scala 326:30] + node _T_57 = bits(dccm_rdata_hi_any, 19, 19) @[el2_lib.scala 327:36] + _T_4[8] <= _T_57 @[el2_lib.scala 327:30] + node _T_58 = bits(dccm_rdata_hi_any, 20, 20) @[el2_lib.scala 324:36] + _T_1[11] <= _T_58 @[el2_lib.scala 324:30] + node _T_59 = bits(dccm_rdata_hi_any, 20, 20) @[el2_lib.scala 326:36] + _T_3[9] <= _T_59 @[el2_lib.scala 326:30] + node _T_60 = bits(dccm_rdata_hi_any, 20, 20) @[el2_lib.scala 327:36] + _T_4[9] <= _T_60 @[el2_lib.scala 327:30] + node _T_61 = bits(dccm_rdata_hi_any, 21, 21) @[el2_lib.scala 323:36] + _T[12] <= _T_61 @[el2_lib.scala 323:30] + node _T_62 = bits(dccm_rdata_hi_any, 21, 21) @[el2_lib.scala 324:36] + _T_1[12] <= _T_62 @[el2_lib.scala 324:30] + node _T_63 = bits(dccm_rdata_hi_any, 21, 21) @[el2_lib.scala 326:36] + _T_3[10] <= _T_63 @[el2_lib.scala 326:30] + node _T_64 = bits(dccm_rdata_hi_any, 21, 21) @[el2_lib.scala 327:36] + _T_4[10] <= _T_64 @[el2_lib.scala 327:30] + node _T_65 = bits(dccm_rdata_hi_any, 22, 22) @[el2_lib.scala 325:36] + _T_2[11] <= _T_65 @[el2_lib.scala 325:30] + node _T_66 = bits(dccm_rdata_hi_any, 22, 22) @[el2_lib.scala 326:36] + _T_3[11] <= _T_66 @[el2_lib.scala 326:30] + node _T_67 = bits(dccm_rdata_hi_any, 22, 22) @[el2_lib.scala 327:36] + _T_4[11] <= _T_67 @[el2_lib.scala 327:30] + node _T_68 = bits(dccm_rdata_hi_any, 23, 23) @[el2_lib.scala 323:36] + _T[13] <= _T_68 @[el2_lib.scala 323:30] + node _T_69 = bits(dccm_rdata_hi_any, 23, 23) @[el2_lib.scala 325:36] + _T_2[12] <= _T_69 @[el2_lib.scala 325:30] + node _T_70 = bits(dccm_rdata_hi_any, 23, 23) @[el2_lib.scala 326:36] + _T_3[12] <= _T_70 @[el2_lib.scala 326:30] + node _T_71 = bits(dccm_rdata_hi_any, 23, 23) @[el2_lib.scala 327:36] + _T_4[12] <= _T_71 @[el2_lib.scala 327:30] + node _T_72 = bits(dccm_rdata_hi_any, 24, 24) @[el2_lib.scala 324:36] + _T_1[13] <= _T_72 @[el2_lib.scala 324:30] + node _T_73 = bits(dccm_rdata_hi_any, 24, 24) @[el2_lib.scala 325:36] + _T_2[13] <= _T_73 @[el2_lib.scala 325:30] + node _T_74 = bits(dccm_rdata_hi_any, 24, 24) @[el2_lib.scala 326:36] + _T_3[13] <= _T_74 @[el2_lib.scala 326:30] + node _T_75 = bits(dccm_rdata_hi_any, 24, 24) @[el2_lib.scala 327:36] + _T_4[13] <= _T_75 @[el2_lib.scala 327:30] + node _T_76 = bits(dccm_rdata_hi_any, 25, 25) @[el2_lib.scala 323:36] + _T[14] <= _T_76 @[el2_lib.scala 323:30] + node _T_77 = bits(dccm_rdata_hi_any, 25, 25) @[el2_lib.scala 324:36] + _T_1[14] <= _T_77 @[el2_lib.scala 324:30] + node _T_78 = bits(dccm_rdata_hi_any, 25, 25) @[el2_lib.scala 325:36] + _T_2[14] <= _T_78 @[el2_lib.scala 325:30] + node _T_79 = bits(dccm_rdata_hi_any, 25, 25) @[el2_lib.scala 326:36] + _T_3[14] <= _T_79 @[el2_lib.scala 326:30] + node _T_80 = bits(dccm_rdata_hi_any, 25, 25) @[el2_lib.scala 327:36] + _T_4[14] <= _T_80 @[el2_lib.scala 327:30] + node _T_81 = bits(dccm_rdata_hi_any, 26, 26) @[el2_lib.scala 323:36] + _T[15] <= _T_81 @[el2_lib.scala 323:30] + node _T_82 = bits(dccm_rdata_hi_any, 26, 26) @[el2_lib.scala 328:36] + _T_5[0] <= _T_82 @[el2_lib.scala 328:30] + node _T_83 = bits(dccm_rdata_hi_any, 27, 27) @[el2_lib.scala 324:36] + _T_1[15] <= _T_83 @[el2_lib.scala 324:30] + node _T_84 = bits(dccm_rdata_hi_any, 27, 27) @[el2_lib.scala 328:36] + _T_5[1] <= _T_84 @[el2_lib.scala 328:30] + node _T_85 = bits(dccm_rdata_hi_any, 28, 28) @[el2_lib.scala 323:36] + _T[16] <= _T_85 @[el2_lib.scala 323:30] + node _T_86 = bits(dccm_rdata_hi_any, 28, 28) @[el2_lib.scala 324:36] + _T_1[16] <= _T_86 @[el2_lib.scala 324:30] + node _T_87 = bits(dccm_rdata_hi_any, 28, 28) @[el2_lib.scala 328:36] + _T_5[2] <= _T_87 @[el2_lib.scala 328:30] + node _T_88 = bits(dccm_rdata_hi_any, 29, 29) @[el2_lib.scala 325:36] + _T_2[15] <= _T_88 @[el2_lib.scala 325:30] + node _T_89 = bits(dccm_rdata_hi_any, 29, 29) @[el2_lib.scala 328:36] + _T_5[3] <= _T_89 @[el2_lib.scala 328:30] + node _T_90 = bits(dccm_rdata_hi_any, 30, 30) @[el2_lib.scala 323:36] + _T[17] <= _T_90 @[el2_lib.scala 323:30] + node _T_91 = bits(dccm_rdata_hi_any, 30, 30) @[el2_lib.scala 325:36] + _T_2[16] <= _T_91 @[el2_lib.scala 325:30] + node _T_92 = bits(dccm_rdata_hi_any, 30, 30) @[el2_lib.scala 328:36] + _T_5[4] <= _T_92 @[el2_lib.scala 328:30] + node _T_93 = bits(dccm_rdata_hi_any, 31, 31) @[el2_lib.scala 324:36] + _T_1[17] <= _T_93 @[el2_lib.scala 324:30] + node _T_94 = bits(dccm_rdata_hi_any, 31, 31) @[el2_lib.scala 325:36] + _T_2[17] <= _T_94 @[el2_lib.scala 325:30] + node _T_95 = bits(dccm_rdata_hi_any, 31, 31) @[el2_lib.scala 328:36] + _T_5[5] <= _T_95 @[el2_lib.scala 328:30] + node _T_96 = xorr(dccm_rdata_hi_any) @[el2_lib.scala 331:30] + node _T_97 = xorr(dccm_data_ecc_hi_any) @[el2_lib.scala 331:44] + node _T_98 = xor(_T_96, _T_97) @[el2_lib.scala 331:35] + node _T_99 = not(UInt<1>("h00")) @[el2_lib.scala 331:52] + node _T_100 = and(_T_98, _T_99) @[el2_lib.scala 331:50] + node _T_101 = bits(dccm_data_ecc_hi_any, 5, 5) @[el2_lib.scala 331:68] + node _T_102 = cat(_T_5[2], _T_5[1]) @[el2_lib.scala 331:76] + node _T_103 = cat(_T_102, _T_5[0]) @[el2_lib.scala 331:76] + node _T_104 = cat(_T_5[5], _T_5[4]) @[el2_lib.scala 331:76] + node _T_105 = cat(_T_104, _T_5[3]) @[el2_lib.scala 331:76] + node _T_106 = cat(_T_105, _T_103) @[el2_lib.scala 331:76] + node _T_107 = xorr(_T_106) @[el2_lib.scala 331:83] + node _T_108 = xor(_T_101, _T_107) @[el2_lib.scala 331:71] + node _T_109 = bits(dccm_data_ecc_hi_any, 4, 4) @[el2_lib.scala 331:95] + node _T_110 = cat(_T_4[2], _T_4[1]) @[el2_lib.scala 331:103] + node _T_111 = cat(_T_110, _T_4[0]) @[el2_lib.scala 331:103] + node _T_112 = cat(_T_4[4], _T_4[3]) @[el2_lib.scala 331:103] + node _T_113 = cat(_T_4[6], _T_4[5]) @[el2_lib.scala 331:103] + node _T_114 = cat(_T_113, _T_112) @[el2_lib.scala 331:103] + node _T_115 = cat(_T_114, _T_111) @[el2_lib.scala 331:103] + node _T_116 = cat(_T_4[8], _T_4[7]) @[el2_lib.scala 331:103] + node _T_117 = cat(_T_4[10], _T_4[9]) @[el2_lib.scala 331:103] + node _T_118 = cat(_T_117, _T_116) @[el2_lib.scala 331:103] + node _T_119 = cat(_T_4[12], _T_4[11]) @[el2_lib.scala 331:103] + node _T_120 = cat(_T_4[14], _T_4[13]) @[el2_lib.scala 331:103] + node _T_121 = cat(_T_120, _T_119) @[el2_lib.scala 331:103] + node _T_122 = cat(_T_121, _T_118) @[el2_lib.scala 331:103] + node _T_123 = cat(_T_122, _T_115) @[el2_lib.scala 331:103] + node _T_124 = xorr(_T_123) @[el2_lib.scala 331:110] + node _T_125 = xor(_T_109, _T_124) @[el2_lib.scala 331:98] + node _T_126 = bits(dccm_data_ecc_hi_any, 3, 3) @[el2_lib.scala 331:122] + node _T_127 = cat(_T_3[2], _T_3[1]) @[el2_lib.scala 331:130] + node _T_128 = cat(_T_127, _T_3[0]) @[el2_lib.scala 331:130] + node _T_129 = cat(_T_3[4], _T_3[3]) @[el2_lib.scala 331:130] + node _T_130 = cat(_T_3[6], _T_3[5]) @[el2_lib.scala 331:130] + node _T_131 = cat(_T_130, _T_129) @[el2_lib.scala 331:130] + node _T_132 = cat(_T_131, _T_128) @[el2_lib.scala 331:130] + node _T_133 = cat(_T_3[8], _T_3[7]) @[el2_lib.scala 331:130] + node _T_134 = cat(_T_3[10], _T_3[9]) @[el2_lib.scala 331:130] + node _T_135 = cat(_T_134, _T_133) @[el2_lib.scala 331:130] + node _T_136 = cat(_T_3[12], _T_3[11]) @[el2_lib.scala 331:130] + node _T_137 = cat(_T_3[14], _T_3[13]) @[el2_lib.scala 331:130] + node _T_138 = cat(_T_137, _T_136) @[el2_lib.scala 331:130] + node _T_139 = cat(_T_138, _T_135) @[el2_lib.scala 331:130] + node _T_140 = cat(_T_139, _T_132) @[el2_lib.scala 331:130] + node _T_141 = xorr(_T_140) @[el2_lib.scala 331:137] + node _T_142 = xor(_T_126, _T_141) @[el2_lib.scala 331:125] + node _T_143 = bits(dccm_data_ecc_hi_any, 2, 2) @[el2_lib.scala 331:149] + node _T_144 = cat(_T_2[1], _T_2[0]) @[el2_lib.scala 331:157] + node _T_145 = cat(_T_2[3], _T_2[2]) @[el2_lib.scala 331:157] + node _T_146 = cat(_T_145, _T_144) @[el2_lib.scala 331:157] + node _T_147 = cat(_T_2[5], _T_2[4]) @[el2_lib.scala 331:157] + node _T_148 = cat(_T_2[8], _T_2[7]) @[el2_lib.scala 331:157] + node _T_149 = cat(_T_148, _T_2[6]) @[el2_lib.scala 331:157] + node _T_150 = cat(_T_149, _T_147) @[el2_lib.scala 331:157] + node _T_151 = cat(_T_150, _T_146) @[el2_lib.scala 331:157] + node _T_152 = cat(_T_2[10], _T_2[9]) @[el2_lib.scala 331:157] + node _T_153 = cat(_T_2[12], _T_2[11]) @[el2_lib.scala 331:157] + node _T_154 = cat(_T_153, _T_152) @[el2_lib.scala 331:157] + node _T_155 = cat(_T_2[14], _T_2[13]) @[el2_lib.scala 331:157] + node _T_156 = cat(_T_2[17], _T_2[16]) @[el2_lib.scala 331:157] + node _T_157 = cat(_T_156, _T_2[15]) @[el2_lib.scala 331:157] + node _T_158 = cat(_T_157, _T_155) @[el2_lib.scala 331:157] + node _T_159 = cat(_T_158, _T_154) @[el2_lib.scala 331:157] + node _T_160 = cat(_T_159, _T_151) @[el2_lib.scala 331:157] + node _T_161 = xorr(_T_160) @[el2_lib.scala 331:164] + node _T_162 = xor(_T_143, _T_161) @[el2_lib.scala 331:152] + node _T_163 = bits(dccm_data_ecc_hi_any, 1, 1) @[el2_lib.scala 331:176] + node _T_164 = cat(_T_1[1], _T_1[0]) @[el2_lib.scala 331:184] + node _T_165 = cat(_T_1[3], _T_1[2]) @[el2_lib.scala 331:184] + node _T_166 = cat(_T_165, _T_164) @[el2_lib.scala 331:184] + node _T_167 = cat(_T_1[5], _T_1[4]) @[el2_lib.scala 331:184] + node _T_168 = cat(_T_1[8], _T_1[7]) @[el2_lib.scala 331:184] + node _T_169 = cat(_T_168, _T_1[6]) @[el2_lib.scala 331:184] + node _T_170 = cat(_T_169, _T_167) @[el2_lib.scala 331:184] + node _T_171 = cat(_T_170, _T_166) @[el2_lib.scala 331:184] + node _T_172 = cat(_T_1[10], _T_1[9]) @[el2_lib.scala 331:184] + node _T_173 = cat(_T_1[12], _T_1[11]) @[el2_lib.scala 331:184] + node _T_174 = cat(_T_173, _T_172) @[el2_lib.scala 331:184] + node _T_175 = cat(_T_1[14], _T_1[13]) @[el2_lib.scala 331:184] + node _T_176 = cat(_T_1[17], _T_1[16]) @[el2_lib.scala 331:184] + node _T_177 = cat(_T_176, _T_1[15]) @[el2_lib.scala 331:184] + node _T_178 = cat(_T_177, _T_175) @[el2_lib.scala 331:184] + node _T_179 = cat(_T_178, _T_174) @[el2_lib.scala 331:184] + node _T_180 = cat(_T_179, _T_171) @[el2_lib.scala 331:184] + node _T_181 = xorr(_T_180) @[el2_lib.scala 331:191] + node _T_182 = xor(_T_163, _T_181) @[el2_lib.scala 331:179] + node _T_183 = bits(dccm_data_ecc_hi_any, 0, 0) @[el2_lib.scala 331:203] + node _T_184 = cat(_T[1], _T[0]) @[el2_lib.scala 331:211] + node _T_185 = cat(_T[3], _T[2]) @[el2_lib.scala 331:211] + node _T_186 = cat(_T_185, _T_184) @[el2_lib.scala 331:211] + node _T_187 = cat(_T[5], _T[4]) @[el2_lib.scala 331:211] + node _T_188 = cat(_T[8], _T[7]) @[el2_lib.scala 331:211] + node _T_189 = cat(_T_188, _T[6]) @[el2_lib.scala 331:211] + node _T_190 = cat(_T_189, _T_187) @[el2_lib.scala 331:211] + node _T_191 = cat(_T_190, _T_186) @[el2_lib.scala 331:211] + node _T_192 = cat(_T[10], _T[9]) @[el2_lib.scala 331:211] + node _T_193 = cat(_T[12], _T[11]) @[el2_lib.scala 331:211] + node _T_194 = cat(_T_193, _T_192) @[el2_lib.scala 331:211] + node _T_195 = cat(_T[14], _T[13]) @[el2_lib.scala 331:211] + node _T_196 = cat(_T[17], _T[16]) @[el2_lib.scala 331:211] + node _T_197 = cat(_T_196, _T[15]) @[el2_lib.scala 331:211] + node _T_198 = cat(_T_197, _T_195) @[el2_lib.scala 331:211] + node _T_199 = cat(_T_198, _T_194) @[el2_lib.scala 331:211] + node _T_200 = cat(_T_199, _T_191) @[el2_lib.scala 331:211] + node _T_201 = xorr(_T_200) @[el2_lib.scala 331:218] + node _T_202 = xor(_T_183, _T_201) @[el2_lib.scala 331:206] + node _T_203 = cat(_T_162, _T_182) @[Cat.scala 29:58] + node _T_204 = cat(_T_203, _T_202) @[Cat.scala 29:58] + node _T_205 = cat(_T_125, _T_142) @[Cat.scala 29:58] + node _T_206 = cat(_T_100, _T_108) @[Cat.scala 29:58] + node _T_207 = cat(_T_206, _T_205) @[Cat.scala 29:58] + node _T_208 = cat(_T_207, _T_204) @[Cat.scala 29:58] + node _T_209 = neq(_T_208, UInt<1>("h00")) @[el2_lib.scala 332:44] + node _T_210 = and(is_ldst_hi_any, _T_209) @[el2_lib.scala 332:32] + node _T_211 = bits(_T_208, 6, 6) @[el2_lib.scala 332:64] + node single_ecc_error_hi_any = and(_T_210, _T_211) @[el2_lib.scala 332:53] + node _T_212 = neq(_T_208, UInt<1>("h00")) @[el2_lib.scala 333:44] + node _T_213 = and(is_ldst_hi_any, _T_212) @[el2_lib.scala 333:32] + node _T_214 = bits(_T_208, 6, 6) @[el2_lib.scala 333:65] + node _T_215 = not(_T_214) @[el2_lib.scala 333:55] + node double_ecc_error_hi_any = and(_T_213, _T_215) @[el2_lib.scala 333:53] + wire _T_216 : UInt<1>[39] @[el2_lib.scala 334:26] + node _T_217 = bits(_T_208, 5, 0) @[el2_lib.scala 337:35] + node _T_218 = eq(_T_217, UInt<1>("h01")) @[el2_lib.scala 337:41] + _T_216[0] <= _T_218 @[el2_lib.scala 337:23] + node _T_219 = bits(_T_208, 5, 0) @[el2_lib.scala 337:35] + node _T_220 = eq(_T_219, UInt<2>("h02")) @[el2_lib.scala 337:41] + _T_216[1] <= _T_220 @[el2_lib.scala 337:23] + node _T_221 = bits(_T_208, 5, 0) @[el2_lib.scala 337:35] + node _T_222 = eq(_T_221, UInt<2>("h03")) @[el2_lib.scala 337:41] + _T_216[2] <= _T_222 @[el2_lib.scala 337:23] + node _T_223 = bits(_T_208, 5, 0) @[el2_lib.scala 337:35] + node _T_224 = eq(_T_223, UInt<3>("h04")) @[el2_lib.scala 337:41] + _T_216[3] <= _T_224 @[el2_lib.scala 337:23] + node _T_225 = bits(_T_208, 5, 0) @[el2_lib.scala 337:35] + node _T_226 = eq(_T_225, UInt<3>("h05")) @[el2_lib.scala 337:41] + _T_216[4] <= _T_226 @[el2_lib.scala 337:23] + node _T_227 = bits(_T_208, 5, 0) @[el2_lib.scala 337:35] + node _T_228 = eq(_T_227, UInt<3>("h06")) @[el2_lib.scala 337:41] + _T_216[5] <= _T_228 @[el2_lib.scala 337:23] + node _T_229 = bits(_T_208, 5, 0) @[el2_lib.scala 337:35] + node _T_230 = eq(_T_229, UInt<3>("h07")) @[el2_lib.scala 337:41] + _T_216[6] <= _T_230 @[el2_lib.scala 337:23] + node _T_231 = bits(_T_208, 5, 0) @[el2_lib.scala 337:35] + node _T_232 = eq(_T_231, UInt<4>("h08")) @[el2_lib.scala 337:41] + _T_216[7] <= _T_232 @[el2_lib.scala 337:23] + node _T_233 = bits(_T_208, 5, 0) @[el2_lib.scala 337:35] + node _T_234 = eq(_T_233, UInt<4>("h09")) @[el2_lib.scala 337:41] + _T_216[8] <= _T_234 @[el2_lib.scala 337:23] + node _T_235 = bits(_T_208, 5, 0) @[el2_lib.scala 337:35] + node _T_236 = eq(_T_235, UInt<4>("h0a")) @[el2_lib.scala 337:41] + _T_216[9] <= _T_236 @[el2_lib.scala 337:23] + node _T_237 = bits(_T_208, 5, 0) @[el2_lib.scala 337:35] + node _T_238 = eq(_T_237, UInt<4>("h0b")) @[el2_lib.scala 337:41] + _T_216[10] <= _T_238 @[el2_lib.scala 337:23] + node _T_239 = bits(_T_208, 5, 0) @[el2_lib.scala 337:35] + node _T_240 = eq(_T_239, UInt<4>("h0c")) @[el2_lib.scala 337:41] + _T_216[11] <= _T_240 @[el2_lib.scala 337:23] + node _T_241 = bits(_T_208, 5, 0) @[el2_lib.scala 337:35] + node _T_242 = eq(_T_241, UInt<4>("h0d")) @[el2_lib.scala 337:41] + _T_216[12] <= _T_242 @[el2_lib.scala 337:23] + node _T_243 = bits(_T_208, 5, 0) @[el2_lib.scala 337:35] + node _T_244 = eq(_T_243, UInt<4>("h0e")) @[el2_lib.scala 337:41] + _T_216[13] <= _T_244 @[el2_lib.scala 337:23] + node _T_245 = bits(_T_208, 5, 0) @[el2_lib.scala 337:35] + node _T_246 = eq(_T_245, UInt<4>("h0f")) @[el2_lib.scala 337:41] + _T_216[14] <= _T_246 @[el2_lib.scala 337:23] + node _T_247 = bits(_T_208, 5, 0) @[el2_lib.scala 337:35] + node _T_248 = eq(_T_247, UInt<5>("h010")) @[el2_lib.scala 337:41] + _T_216[15] <= _T_248 @[el2_lib.scala 337:23] + node _T_249 = bits(_T_208, 5, 0) @[el2_lib.scala 337:35] + node _T_250 = eq(_T_249, UInt<5>("h011")) @[el2_lib.scala 337:41] + _T_216[16] <= _T_250 @[el2_lib.scala 337:23] + node _T_251 = bits(_T_208, 5, 0) @[el2_lib.scala 337:35] + node _T_252 = eq(_T_251, UInt<5>("h012")) @[el2_lib.scala 337:41] + _T_216[17] <= _T_252 @[el2_lib.scala 337:23] + node _T_253 = bits(_T_208, 5, 0) @[el2_lib.scala 337:35] + node _T_254 = eq(_T_253, UInt<5>("h013")) @[el2_lib.scala 337:41] + _T_216[18] <= _T_254 @[el2_lib.scala 337:23] + node _T_255 = bits(_T_208, 5, 0) @[el2_lib.scala 337:35] + node _T_256 = eq(_T_255, UInt<5>("h014")) @[el2_lib.scala 337:41] + _T_216[19] <= _T_256 @[el2_lib.scala 337:23] + node _T_257 = bits(_T_208, 5, 0) @[el2_lib.scala 337:35] + node _T_258 = eq(_T_257, UInt<5>("h015")) @[el2_lib.scala 337:41] + _T_216[20] <= _T_258 @[el2_lib.scala 337:23] + node _T_259 = bits(_T_208, 5, 0) @[el2_lib.scala 337:35] + node _T_260 = eq(_T_259, UInt<5>("h016")) @[el2_lib.scala 337:41] + _T_216[21] <= _T_260 @[el2_lib.scala 337:23] + node _T_261 = bits(_T_208, 5, 0) @[el2_lib.scala 337:35] + node _T_262 = eq(_T_261, UInt<5>("h017")) @[el2_lib.scala 337:41] + _T_216[22] <= _T_262 @[el2_lib.scala 337:23] + node _T_263 = bits(_T_208, 5, 0) @[el2_lib.scala 337:35] + node _T_264 = eq(_T_263, UInt<5>("h018")) @[el2_lib.scala 337:41] + _T_216[23] <= _T_264 @[el2_lib.scala 337:23] + node _T_265 = bits(_T_208, 5, 0) @[el2_lib.scala 337:35] + node _T_266 = eq(_T_265, UInt<5>("h019")) @[el2_lib.scala 337:41] + _T_216[24] <= _T_266 @[el2_lib.scala 337:23] + node _T_267 = bits(_T_208, 5, 0) @[el2_lib.scala 337:35] + node _T_268 = eq(_T_267, UInt<5>("h01a")) @[el2_lib.scala 337:41] + _T_216[25] <= _T_268 @[el2_lib.scala 337:23] + node _T_269 = bits(_T_208, 5, 0) @[el2_lib.scala 337:35] + node _T_270 = eq(_T_269, UInt<5>("h01b")) @[el2_lib.scala 337:41] + _T_216[26] <= _T_270 @[el2_lib.scala 337:23] + node _T_271 = bits(_T_208, 5, 0) @[el2_lib.scala 337:35] + node _T_272 = eq(_T_271, UInt<5>("h01c")) @[el2_lib.scala 337:41] + _T_216[27] <= _T_272 @[el2_lib.scala 337:23] + node _T_273 = bits(_T_208, 5, 0) @[el2_lib.scala 337:35] + node _T_274 = eq(_T_273, UInt<5>("h01d")) @[el2_lib.scala 337:41] + _T_216[28] <= _T_274 @[el2_lib.scala 337:23] + node _T_275 = bits(_T_208, 5, 0) @[el2_lib.scala 337:35] + node _T_276 = eq(_T_275, UInt<5>("h01e")) @[el2_lib.scala 337:41] + _T_216[29] <= _T_276 @[el2_lib.scala 337:23] + node _T_277 = bits(_T_208, 5, 0) @[el2_lib.scala 337:35] + node _T_278 = eq(_T_277, UInt<5>("h01f")) @[el2_lib.scala 337:41] + _T_216[30] <= _T_278 @[el2_lib.scala 337:23] + node _T_279 = bits(_T_208, 5, 0) @[el2_lib.scala 337:35] + node _T_280 = eq(_T_279, UInt<6>("h020")) @[el2_lib.scala 337:41] + _T_216[31] <= _T_280 @[el2_lib.scala 337:23] + node _T_281 = bits(_T_208, 5, 0) @[el2_lib.scala 337:35] + node _T_282 = eq(_T_281, UInt<6>("h021")) @[el2_lib.scala 337:41] + _T_216[32] <= _T_282 @[el2_lib.scala 337:23] + node _T_283 = bits(_T_208, 5, 0) @[el2_lib.scala 337:35] + node _T_284 = eq(_T_283, UInt<6>("h022")) @[el2_lib.scala 337:41] + _T_216[33] <= _T_284 @[el2_lib.scala 337:23] + node _T_285 = bits(_T_208, 5, 0) @[el2_lib.scala 337:35] + node _T_286 = eq(_T_285, UInt<6>("h023")) @[el2_lib.scala 337:41] + _T_216[34] <= _T_286 @[el2_lib.scala 337:23] + node _T_287 = bits(_T_208, 5, 0) @[el2_lib.scala 337:35] + node _T_288 = eq(_T_287, UInt<6>("h024")) @[el2_lib.scala 337:41] + _T_216[35] <= _T_288 @[el2_lib.scala 337:23] + node _T_289 = bits(_T_208, 5, 0) @[el2_lib.scala 337:35] + node _T_290 = eq(_T_289, UInt<6>("h025")) @[el2_lib.scala 337:41] + _T_216[36] <= _T_290 @[el2_lib.scala 337:23] + node _T_291 = bits(_T_208, 5, 0) @[el2_lib.scala 337:35] + node _T_292 = eq(_T_291, UInt<6>("h026")) @[el2_lib.scala 337:41] + _T_216[37] <= _T_292 @[el2_lib.scala 337:23] + node _T_293 = bits(_T_208, 5, 0) @[el2_lib.scala 337:35] + node _T_294 = eq(_T_293, UInt<6>("h027")) @[el2_lib.scala 337:41] + _T_216[38] <= _T_294 @[el2_lib.scala 337:23] + node _T_295 = bits(dccm_data_ecc_hi_any, 6, 6) @[el2_lib.scala 339:37] + node _T_296 = bits(dccm_rdata_hi_any, 31, 26) @[el2_lib.scala 339:45] + node _T_297 = bits(dccm_data_ecc_hi_any, 5, 5) @[el2_lib.scala 339:60] + node _T_298 = bits(dccm_rdata_hi_any, 25, 11) @[el2_lib.scala 339:68] + node _T_299 = bits(dccm_data_ecc_hi_any, 4, 4) @[el2_lib.scala 339:83] + node _T_300 = bits(dccm_rdata_hi_any, 10, 4) @[el2_lib.scala 339:91] + node _T_301 = bits(dccm_data_ecc_hi_any, 3, 3) @[el2_lib.scala 339:105] + node _T_302 = bits(dccm_rdata_hi_any, 3, 1) @[el2_lib.scala 339:113] + node _T_303 = bits(dccm_data_ecc_hi_any, 2, 2) @[el2_lib.scala 339:126] + node _T_304 = bits(dccm_rdata_hi_any, 0, 0) @[el2_lib.scala 339:134] + node _T_305 = bits(dccm_data_ecc_hi_any, 1, 0) @[el2_lib.scala 339:145] + node _T_306 = cat(_T_304, _T_305) @[Cat.scala 29:58] + node _T_307 = cat(_T_301, _T_302) @[Cat.scala 29:58] + node _T_308 = cat(_T_307, _T_303) @[Cat.scala 29:58] + node _T_309 = cat(_T_308, _T_306) @[Cat.scala 29:58] + node _T_310 = cat(_T_298, _T_299) @[Cat.scala 29:58] + node _T_311 = cat(_T_310, _T_300) @[Cat.scala 29:58] + node _T_312 = cat(_T_295, _T_296) @[Cat.scala 29:58] + node _T_313 = cat(_T_312, _T_297) @[Cat.scala 29:58] + node _T_314 = cat(_T_313, _T_311) @[Cat.scala 29:58] + node _T_315 = cat(_T_314, _T_309) @[Cat.scala 29:58] + node _T_316 = bits(single_ecc_error_hi_any, 0, 0) @[el2_lib.scala 340:49] + node _T_317 = cat(_T_216[1], _T_216[0]) @[el2_lib.scala 340:69] + node _T_318 = cat(_T_216[3], _T_216[2]) @[el2_lib.scala 340:69] + node _T_319 = cat(_T_318, _T_317) @[el2_lib.scala 340:69] + node _T_320 = cat(_T_216[5], _T_216[4]) @[el2_lib.scala 340:69] + node _T_321 = cat(_T_216[8], _T_216[7]) @[el2_lib.scala 340:69] + node _T_322 = cat(_T_321, _T_216[6]) @[el2_lib.scala 340:69] + node _T_323 = cat(_T_322, _T_320) @[el2_lib.scala 340:69] + node _T_324 = cat(_T_323, _T_319) @[el2_lib.scala 340:69] + node _T_325 = cat(_T_216[10], _T_216[9]) @[el2_lib.scala 340:69] + node _T_326 = cat(_T_216[13], _T_216[12]) @[el2_lib.scala 340:69] + node _T_327 = cat(_T_326, _T_216[11]) @[el2_lib.scala 340:69] + node _T_328 = cat(_T_327, _T_325) @[el2_lib.scala 340:69] + node _T_329 = cat(_T_216[15], _T_216[14]) @[el2_lib.scala 340:69] + node _T_330 = cat(_T_216[18], _T_216[17]) @[el2_lib.scala 340:69] + node _T_331 = cat(_T_330, _T_216[16]) @[el2_lib.scala 340:69] + node _T_332 = cat(_T_331, _T_329) @[el2_lib.scala 340:69] + node _T_333 = cat(_T_332, _T_328) @[el2_lib.scala 340:69] + node _T_334 = cat(_T_333, _T_324) @[el2_lib.scala 340:69] + node _T_335 = cat(_T_216[20], _T_216[19]) @[el2_lib.scala 340:69] + node _T_336 = cat(_T_216[23], _T_216[22]) @[el2_lib.scala 340:69] + node _T_337 = cat(_T_336, _T_216[21]) @[el2_lib.scala 340:69] + node _T_338 = cat(_T_337, _T_335) @[el2_lib.scala 340:69] + node _T_339 = cat(_T_216[25], _T_216[24]) @[el2_lib.scala 340:69] + node _T_340 = cat(_T_216[28], _T_216[27]) @[el2_lib.scala 340:69] + node _T_341 = cat(_T_340, _T_216[26]) @[el2_lib.scala 340:69] + node _T_342 = cat(_T_341, _T_339) @[el2_lib.scala 340:69] + node _T_343 = cat(_T_342, _T_338) @[el2_lib.scala 340:69] + node _T_344 = cat(_T_216[30], _T_216[29]) @[el2_lib.scala 340:69] + node _T_345 = cat(_T_216[33], _T_216[32]) @[el2_lib.scala 340:69] + node _T_346 = cat(_T_345, _T_216[31]) @[el2_lib.scala 340:69] + node _T_347 = cat(_T_346, _T_344) @[el2_lib.scala 340:69] + node _T_348 = cat(_T_216[35], _T_216[34]) @[el2_lib.scala 340:69] + node _T_349 = cat(_T_216[38], _T_216[37]) @[el2_lib.scala 340:69] + node _T_350 = cat(_T_349, _T_216[36]) @[el2_lib.scala 340:69] + node _T_351 = cat(_T_350, _T_348) @[el2_lib.scala 340:69] + node _T_352 = cat(_T_351, _T_347) @[el2_lib.scala 340:69] + node _T_353 = cat(_T_352, _T_343) @[el2_lib.scala 340:69] + node _T_354 = cat(_T_353, _T_334) @[el2_lib.scala 340:69] + node _T_355 = xor(_T_354, _T_315) @[el2_lib.scala 340:76] + node _T_356 = mux(_T_316, _T_355, _T_315) @[el2_lib.scala 340:31] + node _T_357 = bits(_T_356, 37, 32) @[el2_lib.scala 342:37] + node _T_358 = bits(_T_356, 30, 16) @[el2_lib.scala 342:61] + node _T_359 = bits(_T_356, 14, 8) @[el2_lib.scala 342:86] + node _T_360 = bits(_T_356, 6, 4) @[el2_lib.scala 342:110] + node _T_361 = bits(_T_356, 2, 2) @[el2_lib.scala 342:133] + node _T_362 = cat(_T_360, _T_361) @[Cat.scala 29:58] + node _T_363 = cat(_T_357, _T_358) @[Cat.scala 29:58] + node _T_364 = cat(_T_363, _T_359) @[Cat.scala 29:58] + node sec_data_hi_any = cat(_T_364, _T_362) @[Cat.scala 29:58] + node _T_365 = bits(_T_356, 38, 38) @[el2_lib.scala 343:39] + node _T_366 = bits(_T_208, 6, 0) @[el2_lib.scala 343:56] + node _T_367 = eq(_T_366, UInt<7>("h040")) @[el2_lib.scala 343:62] + node _T_368 = xor(_T_365, _T_367) @[el2_lib.scala 343:44] + node _T_369 = bits(_T_356, 31, 31) @[el2_lib.scala 343:102] + node _T_370 = bits(_T_356, 15, 15) @[el2_lib.scala 343:124] + node _T_371 = bits(_T_356, 7, 7) @[el2_lib.scala 343:146] + node _T_372 = bits(_T_356, 3, 3) @[el2_lib.scala 343:167] + node _T_373 = bits(_T_356, 1, 0) @[el2_lib.scala 343:188] + node _T_374 = cat(_T_371, _T_372) @[Cat.scala 29:58] + node _T_375 = cat(_T_374, _T_373) @[Cat.scala 29:58] + node _T_376 = cat(_T_368, _T_369) @[Cat.scala 29:58] + node _T_377 = cat(_T_376, _T_370) @[Cat.scala 29:58] + node ecc_out_hi_nc = cat(_T_377, _T_375) @[Cat.scala 29:58] + wire _T_378 : UInt<1>[18] @[el2_lib.scala 311:18] + wire _T_379 : UInt<1>[18] @[el2_lib.scala 312:18] + wire _T_380 : UInt<1>[18] @[el2_lib.scala 313:18] + wire _T_381 : UInt<1>[15] @[el2_lib.scala 314:18] + wire _T_382 : UInt<1>[15] @[el2_lib.scala 315:18] + wire _T_383 : UInt<1>[6] @[el2_lib.scala 316:18] + node _T_384 = bits(dccm_rdata_lo_any, 0, 0) @[el2_lib.scala 323:36] + _T_378[0] <= _T_384 @[el2_lib.scala 323:30] + node _T_385 = bits(dccm_rdata_lo_any, 0, 0) @[el2_lib.scala 324:36] + _T_379[0] <= _T_385 @[el2_lib.scala 324:30] + node _T_386 = bits(dccm_rdata_lo_any, 1, 1) @[el2_lib.scala 323:36] + _T_378[1] <= _T_386 @[el2_lib.scala 323:30] + node _T_387 = bits(dccm_rdata_lo_any, 1, 1) @[el2_lib.scala 325:36] + _T_380[0] <= _T_387 @[el2_lib.scala 325:30] + node _T_388 = bits(dccm_rdata_lo_any, 2, 2) @[el2_lib.scala 324:36] + _T_379[1] <= _T_388 @[el2_lib.scala 324:30] + node _T_389 = bits(dccm_rdata_lo_any, 2, 2) @[el2_lib.scala 325:36] + _T_380[1] <= _T_389 @[el2_lib.scala 325:30] + node _T_390 = bits(dccm_rdata_lo_any, 3, 3) @[el2_lib.scala 323:36] + _T_378[2] <= _T_390 @[el2_lib.scala 323:30] + node _T_391 = bits(dccm_rdata_lo_any, 3, 3) @[el2_lib.scala 324:36] + _T_379[2] <= _T_391 @[el2_lib.scala 324:30] + node _T_392 = bits(dccm_rdata_lo_any, 3, 3) @[el2_lib.scala 325:36] + _T_380[2] <= _T_392 @[el2_lib.scala 325:30] + node _T_393 = bits(dccm_rdata_lo_any, 4, 4) @[el2_lib.scala 323:36] + _T_378[3] <= _T_393 @[el2_lib.scala 323:30] + node _T_394 = bits(dccm_rdata_lo_any, 4, 4) @[el2_lib.scala 326:36] + _T_381[0] <= _T_394 @[el2_lib.scala 326:30] + node _T_395 = bits(dccm_rdata_lo_any, 5, 5) @[el2_lib.scala 324:36] + _T_379[3] <= _T_395 @[el2_lib.scala 324:30] + node _T_396 = bits(dccm_rdata_lo_any, 5, 5) @[el2_lib.scala 326:36] + _T_381[1] <= _T_396 @[el2_lib.scala 326:30] + node _T_397 = bits(dccm_rdata_lo_any, 6, 6) @[el2_lib.scala 323:36] + _T_378[4] <= _T_397 @[el2_lib.scala 323:30] + node _T_398 = bits(dccm_rdata_lo_any, 6, 6) @[el2_lib.scala 324:36] + _T_379[4] <= _T_398 @[el2_lib.scala 324:30] + node _T_399 = bits(dccm_rdata_lo_any, 6, 6) @[el2_lib.scala 326:36] + _T_381[2] <= _T_399 @[el2_lib.scala 326:30] + node _T_400 = bits(dccm_rdata_lo_any, 7, 7) @[el2_lib.scala 325:36] + _T_380[3] <= _T_400 @[el2_lib.scala 325:30] + node _T_401 = bits(dccm_rdata_lo_any, 7, 7) @[el2_lib.scala 326:36] + _T_381[3] <= _T_401 @[el2_lib.scala 326:30] + node _T_402 = bits(dccm_rdata_lo_any, 8, 8) @[el2_lib.scala 323:36] + _T_378[5] <= _T_402 @[el2_lib.scala 323:30] + node _T_403 = bits(dccm_rdata_lo_any, 8, 8) @[el2_lib.scala 325:36] + _T_380[4] <= _T_403 @[el2_lib.scala 325:30] + node _T_404 = bits(dccm_rdata_lo_any, 8, 8) @[el2_lib.scala 326:36] + _T_381[4] <= _T_404 @[el2_lib.scala 326:30] + node _T_405 = bits(dccm_rdata_lo_any, 9, 9) @[el2_lib.scala 324:36] + _T_379[5] <= _T_405 @[el2_lib.scala 324:30] + node _T_406 = bits(dccm_rdata_lo_any, 9, 9) @[el2_lib.scala 325:36] + _T_380[5] <= _T_406 @[el2_lib.scala 325:30] + node _T_407 = bits(dccm_rdata_lo_any, 9, 9) @[el2_lib.scala 326:36] + _T_381[5] <= _T_407 @[el2_lib.scala 326:30] + node _T_408 = bits(dccm_rdata_lo_any, 10, 10) @[el2_lib.scala 323:36] + _T_378[6] <= _T_408 @[el2_lib.scala 323:30] + node _T_409 = bits(dccm_rdata_lo_any, 10, 10) @[el2_lib.scala 324:36] + _T_379[6] <= _T_409 @[el2_lib.scala 324:30] + node _T_410 = bits(dccm_rdata_lo_any, 10, 10) @[el2_lib.scala 325:36] + _T_380[6] <= _T_410 @[el2_lib.scala 325:30] + node _T_411 = bits(dccm_rdata_lo_any, 10, 10) @[el2_lib.scala 326:36] + _T_381[6] <= _T_411 @[el2_lib.scala 326:30] + node _T_412 = bits(dccm_rdata_lo_any, 11, 11) @[el2_lib.scala 323:36] + _T_378[7] <= _T_412 @[el2_lib.scala 323:30] + node _T_413 = bits(dccm_rdata_lo_any, 11, 11) @[el2_lib.scala 327:36] + _T_382[0] <= _T_413 @[el2_lib.scala 327:30] + node _T_414 = bits(dccm_rdata_lo_any, 12, 12) @[el2_lib.scala 324:36] + _T_379[7] <= _T_414 @[el2_lib.scala 324:30] + node _T_415 = bits(dccm_rdata_lo_any, 12, 12) @[el2_lib.scala 327:36] + _T_382[1] <= _T_415 @[el2_lib.scala 327:30] + node _T_416 = bits(dccm_rdata_lo_any, 13, 13) @[el2_lib.scala 323:36] + _T_378[8] <= _T_416 @[el2_lib.scala 323:30] + node _T_417 = bits(dccm_rdata_lo_any, 13, 13) @[el2_lib.scala 324:36] + _T_379[8] <= _T_417 @[el2_lib.scala 324:30] + node _T_418 = bits(dccm_rdata_lo_any, 13, 13) @[el2_lib.scala 327:36] + _T_382[2] <= _T_418 @[el2_lib.scala 327:30] + node _T_419 = bits(dccm_rdata_lo_any, 14, 14) @[el2_lib.scala 325:36] + _T_380[7] <= _T_419 @[el2_lib.scala 325:30] + node _T_420 = bits(dccm_rdata_lo_any, 14, 14) @[el2_lib.scala 327:36] + _T_382[3] <= _T_420 @[el2_lib.scala 327:30] + node _T_421 = bits(dccm_rdata_lo_any, 15, 15) @[el2_lib.scala 323:36] + _T_378[9] <= _T_421 @[el2_lib.scala 323:30] + node _T_422 = bits(dccm_rdata_lo_any, 15, 15) @[el2_lib.scala 325:36] + _T_380[8] <= _T_422 @[el2_lib.scala 325:30] + node _T_423 = bits(dccm_rdata_lo_any, 15, 15) @[el2_lib.scala 327:36] + _T_382[4] <= _T_423 @[el2_lib.scala 327:30] + node _T_424 = bits(dccm_rdata_lo_any, 16, 16) @[el2_lib.scala 324:36] + _T_379[9] <= _T_424 @[el2_lib.scala 324:30] + node _T_425 = bits(dccm_rdata_lo_any, 16, 16) @[el2_lib.scala 325:36] + _T_380[9] <= _T_425 @[el2_lib.scala 325:30] + node _T_426 = bits(dccm_rdata_lo_any, 16, 16) @[el2_lib.scala 327:36] + _T_382[5] <= _T_426 @[el2_lib.scala 327:30] + node _T_427 = bits(dccm_rdata_lo_any, 17, 17) @[el2_lib.scala 323:36] + _T_378[10] <= _T_427 @[el2_lib.scala 323:30] + node _T_428 = bits(dccm_rdata_lo_any, 17, 17) @[el2_lib.scala 324:36] + _T_379[10] <= _T_428 @[el2_lib.scala 324:30] + node _T_429 = bits(dccm_rdata_lo_any, 17, 17) @[el2_lib.scala 325:36] + _T_380[10] <= _T_429 @[el2_lib.scala 325:30] + node _T_430 = bits(dccm_rdata_lo_any, 17, 17) @[el2_lib.scala 327:36] + _T_382[6] <= _T_430 @[el2_lib.scala 327:30] + node _T_431 = bits(dccm_rdata_lo_any, 18, 18) @[el2_lib.scala 326:36] + _T_381[7] <= _T_431 @[el2_lib.scala 326:30] + node _T_432 = bits(dccm_rdata_lo_any, 18, 18) @[el2_lib.scala 327:36] + _T_382[7] <= _T_432 @[el2_lib.scala 327:30] + node _T_433 = bits(dccm_rdata_lo_any, 19, 19) @[el2_lib.scala 323:36] + _T_378[11] <= _T_433 @[el2_lib.scala 323:30] + node _T_434 = bits(dccm_rdata_lo_any, 19, 19) @[el2_lib.scala 326:36] + _T_381[8] <= _T_434 @[el2_lib.scala 326:30] + node _T_435 = bits(dccm_rdata_lo_any, 19, 19) @[el2_lib.scala 327:36] + _T_382[8] <= _T_435 @[el2_lib.scala 327:30] + node _T_436 = bits(dccm_rdata_lo_any, 20, 20) @[el2_lib.scala 324:36] + _T_379[11] <= _T_436 @[el2_lib.scala 324:30] + node _T_437 = bits(dccm_rdata_lo_any, 20, 20) @[el2_lib.scala 326:36] + _T_381[9] <= _T_437 @[el2_lib.scala 326:30] + node _T_438 = bits(dccm_rdata_lo_any, 20, 20) @[el2_lib.scala 327:36] + _T_382[9] <= _T_438 @[el2_lib.scala 327:30] + node _T_439 = bits(dccm_rdata_lo_any, 21, 21) @[el2_lib.scala 323:36] + _T_378[12] <= _T_439 @[el2_lib.scala 323:30] + node _T_440 = bits(dccm_rdata_lo_any, 21, 21) @[el2_lib.scala 324:36] + _T_379[12] <= _T_440 @[el2_lib.scala 324:30] + node _T_441 = bits(dccm_rdata_lo_any, 21, 21) @[el2_lib.scala 326:36] + _T_381[10] <= _T_441 @[el2_lib.scala 326:30] + node _T_442 = bits(dccm_rdata_lo_any, 21, 21) @[el2_lib.scala 327:36] + _T_382[10] <= _T_442 @[el2_lib.scala 327:30] + node _T_443 = bits(dccm_rdata_lo_any, 22, 22) @[el2_lib.scala 325:36] + _T_380[11] <= _T_443 @[el2_lib.scala 325:30] + node _T_444 = bits(dccm_rdata_lo_any, 22, 22) @[el2_lib.scala 326:36] + _T_381[11] <= _T_444 @[el2_lib.scala 326:30] + node _T_445 = bits(dccm_rdata_lo_any, 22, 22) @[el2_lib.scala 327:36] + _T_382[11] <= _T_445 @[el2_lib.scala 327:30] + node _T_446 = bits(dccm_rdata_lo_any, 23, 23) @[el2_lib.scala 323:36] + _T_378[13] <= _T_446 @[el2_lib.scala 323:30] + node _T_447 = bits(dccm_rdata_lo_any, 23, 23) @[el2_lib.scala 325:36] + _T_380[12] <= _T_447 @[el2_lib.scala 325:30] + node _T_448 = bits(dccm_rdata_lo_any, 23, 23) @[el2_lib.scala 326:36] + _T_381[12] <= _T_448 @[el2_lib.scala 326:30] + node _T_449 = bits(dccm_rdata_lo_any, 23, 23) @[el2_lib.scala 327:36] + _T_382[12] <= _T_449 @[el2_lib.scala 327:30] + node _T_450 = bits(dccm_rdata_lo_any, 24, 24) @[el2_lib.scala 324:36] + _T_379[13] <= _T_450 @[el2_lib.scala 324:30] + node _T_451 = bits(dccm_rdata_lo_any, 24, 24) @[el2_lib.scala 325:36] + _T_380[13] <= _T_451 @[el2_lib.scala 325:30] + node _T_452 = bits(dccm_rdata_lo_any, 24, 24) @[el2_lib.scala 326:36] + _T_381[13] <= _T_452 @[el2_lib.scala 326:30] + node _T_453 = bits(dccm_rdata_lo_any, 24, 24) @[el2_lib.scala 327:36] + _T_382[13] <= _T_453 @[el2_lib.scala 327:30] + node _T_454 = bits(dccm_rdata_lo_any, 25, 25) @[el2_lib.scala 323:36] + _T_378[14] <= _T_454 @[el2_lib.scala 323:30] + node _T_455 = bits(dccm_rdata_lo_any, 25, 25) @[el2_lib.scala 324:36] + _T_379[14] <= _T_455 @[el2_lib.scala 324:30] + node _T_456 = bits(dccm_rdata_lo_any, 25, 25) @[el2_lib.scala 325:36] + _T_380[14] <= _T_456 @[el2_lib.scala 325:30] + node _T_457 = bits(dccm_rdata_lo_any, 25, 25) @[el2_lib.scala 326:36] + _T_381[14] <= _T_457 @[el2_lib.scala 326:30] + node _T_458 = bits(dccm_rdata_lo_any, 25, 25) @[el2_lib.scala 327:36] + _T_382[14] <= _T_458 @[el2_lib.scala 327:30] + node _T_459 = bits(dccm_rdata_lo_any, 26, 26) @[el2_lib.scala 323:36] + _T_378[15] <= _T_459 @[el2_lib.scala 323:30] + node _T_460 = bits(dccm_rdata_lo_any, 26, 26) @[el2_lib.scala 328:36] + _T_383[0] <= _T_460 @[el2_lib.scala 328:30] + node _T_461 = bits(dccm_rdata_lo_any, 27, 27) @[el2_lib.scala 324:36] + _T_379[15] <= _T_461 @[el2_lib.scala 324:30] + node _T_462 = bits(dccm_rdata_lo_any, 27, 27) @[el2_lib.scala 328:36] + _T_383[1] <= _T_462 @[el2_lib.scala 328:30] + node _T_463 = bits(dccm_rdata_lo_any, 28, 28) @[el2_lib.scala 323:36] + _T_378[16] <= _T_463 @[el2_lib.scala 323:30] + node _T_464 = bits(dccm_rdata_lo_any, 28, 28) @[el2_lib.scala 324:36] + _T_379[16] <= _T_464 @[el2_lib.scala 324:30] + node _T_465 = bits(dccm_rdata_lo_any, 28, 28) @[el2_lib.scala 328:36] + _T_383[2] <= _T_465 @[el2_lib.scala 328:30] + node _T_466 = bits(dccm_rdata_lo_any, 29, 29) @[el2_lib.scala 325:36] + _T_380[15] <= _T_466 @[el2_lib.scala 325:30] + node _T_467 = bits(dccm_rdata_lo_any, 29, 29) @[el2_lib.scala 328:36] + _T_383[3] <= _T_467 @[el2_lib.scala 328:30] + node _T_468 = bits(dccm_rdata_lo_any, 30, 30) @[el2_lib.scala 323:36] + _T_378[17] <= _T_468 @[el2_lib.scala 323:30] + node _T_469 = bits(dccm_rdata_lo_any, 30, 30) @[el2_lib.scala 325:36] + _T_380[16] <= _T_469 @[el2_lib.scala 325:30] + node _T_470 = bits(dccm_rdata_lo_any, 30, 30) @[el2_lib.scala 328:36] + _T_383[4] <= _T_470 @[el2_lib.scala 328:30] + node _T_471 = bits(dccm_rdata_lo_any, 31, 31) @[el2_lib.scala 324:36] + _T_379[17] <= _T_471 @[el2_lib.scala 324:30] + node _T_472 = bits(dccm_rdata_lo_any, 31, 31) @[el2_lib.scala 325:36] + _T_380[17] <= _T_472 @[el2_lib.scala 325:30] + node _T_473 = bits(dccm_rdata_lo_any, 31, 31) @[el2_lib.scala 328:36] + _T_383[5] <= _T_473 @[el2_lib.scala 328:30] + node _T_474 = xorr(dccm_rdata_lo_any) @[el2_lib.scala 331:30] + node _T_475 = xorr(dccm_data_ecc_lo_any) @[el2_lib.scala 331:44] + node _T_476 = xor(_T_474, _T_475) @[el2_lib.scala 331:35] + node _T_477 = not(UInt<1>("h00")) @[el2_lib.scala 331:52] + node _T_478 = and(_T_476, _T_477) @[el2_lib.scala 331:50] + node _T_479 = bits(dccm_data_ecc_lo_any, 5, 5) @[el2_lib.scala 331:68] + node _T_480 = cat(_T_383[2], _T_383[1]) @[el2_lib.scala 331:76] + node _T_481 = cat(_T_480, _T_383[0]) @[el2_lib.scala 331:76] + node _T_482 = cat(_T_383[5], _T_383[4]) @[el2_lib.scala 331:76] + node _T_483 = cat(_T_482, _T_383[3]) @[el2_lib.scala 331:76] + node _T_484 = cat(_T_483, _T_481) @[el2_lib.scala 331:76] + node _T_485 = xorr(_T_484) @[el2_lib.scala 331:83] + node _T_486 = xor(_T_479, _T_485) @[el2_lib.scala 331:71] + node _T_487 = bits(dccm_data_ecc_lo_any, 4, 4) @[el2_lib.scala 331:95] + node _T_488 = cat(_T_382[2], _T_382[1]) @[el2_lib.scala 331:103] + node _T_489 = cat(_T_488, _T_382[0]) @[el2_lib.scala 331:103] + node _T_490 = cat(_T_382[4], _T_382[3]) @[el2_lib.scala 331:103] + node _T_491 = cat(_T_382[6], _T_382[5]) @[el2_lib.scala 331:103] + node _T_492 = cat(_T_491, _T_490) @[el2_lib.scala 331:103] + node _T_493 = cat(_T_492, _T_489) @[el2_lib.scala 331:103] + node _T_494 = cat(_T_382[8], _T_382[7]) @[el2_lib.scala 331:103] + node _T_495 = cat(_T_382[10], _T_382[9]) @[el2_lib.scala 331:103] + node _T_496 = cat(_T_495, _T_494) @[el2_lib.scala 331:103] + node _T_497 = cat(_T_382[12], _T_382[11]) @[el2_lib.scala 331:103] + node _T_498 = cat(_T_382[14], _T_382[13]) @[el2_lib.scala 331:103] + node _T_499 = cat(_T_498, _T_497) @[el2_lib.scala 331:103] + node _T_500 = cat(_T_499, _T_496) @[el2_lib.scala 331:103] + node _T_501 = cat(_T_500, _T_493) @[el2_lib.scala 331:103] + node _T_502 = xorr(_T_501) @[el2_lib.scala 331:110] + node _T_503 = xor(_T_487, _T_502) @[el2_lib.scala 331:98] + node _T_504 = bits(dccm_data_ecc_lo_any, 3, 3) @[el2_lib.scala 331:122] + node _T_505 = cat(_T_381[2], _T_381[1]) @[el2_lib.scala 331:130] + node _T_506 = cat(_T_505, _T_381[0]) @[el2_lib.scala 331:130] + node _T_507 = cat(_T_381[4], _T_381[3]) @[el2_lib.scala 331:130] + node _T_508 = cat(_T_381[6], _T_381[5]) @[el2_lib.scala 331:130] + node _T_509 = cat(_T_508, _T_507) @[el2_lib.scala 331:130] + node _T_510 = cat(_T_509, _T_506) @[el2_lib.scala 331:130] + node _T_511 = cat(_T_381[8], _T_381[7]) @[el2_lib.scala 331:130] + node _T_512 = cat(_T_381[10], _T_381[9]) @[el2_lib.scala 331:130] + node _T_513 = cat(_T_512, _T_511) @[el2_lib.scala 331:130] + node _T_514 = cat(_T_381[12], _T_381[11]) @[el2_lib.scala 331:130] + node _T_515 = cat(_T_381[14], _T_381[13]) @[el2_lib.scala 331:130] + node _T_516 = cat(_T_515, _T_514) @[el2_lib.scala 331:130] + node _T_517 = cat(_T_516, _T_513) @[el2_lib.scala 331:130] + node _T_518 = cat(_T_517, _T_510) @[el2_lib.scala 331:130] + node _T_519 = xorr(_T_518) @[el2_lib.scala 331:137] + node _T_520 = xor(_T_504, _T_519) @[el2_lib.scala 331:125] + node _T_521 = bits(dccm_data_ecc_lo_any, 2, 2) @[el2_lib.scala 331:149] + node _T_522 = cat(_T_380[1], _T_380[0]) @[el2_lib.scala 331:157] + node _T_523 = cat(_T_380[3], _T_380[2]) @[el2_lib.scala 331:157] + node _T_524 = cat(_T_523, _T_522) @[el2_lib.scala 331:157] + node _T_525 = cat(_T_380[5], _T_380[4]) @[el2_lib.scala 331:157] + node _T_526 = cat(_T_380[8], _T_380[7]) @[el2_lib.scala 331:157] + node _T_527 = cat(_T_526, _T_380[6]) @[el2_lib.scala 331:157] + node _T_528 = cat(_T_527, _T_525) @[el2_lib.scala 331:157] + node _T_529 = cat(_T_528, _T_524) @[el2_lib.scala 331:157] + node _T_530 = cat(_T_380[10], _T_380[9]) @[el2_lib.scala 331:157] + node _T_531 = cat(_T_380[12], _T_380[11]) @[el2_lib.scala 331:157] + node _T_532 = cat(_T_531, _T_530) @[el2_lib.scala 331:157] + node _T_533 = cat(_T_380[14], _T_380[13]) @[el2_lib.scala 331:157] + node _T_534 = cat(_T_380[17], _T_380[16]) @[el2_lib.scala 331:157] + node _T_535 = cat(_T_534, _T_380[15]) @[el2_lib.scala 331:157] + node _T_536 = cat(_T_535, _T_533) @[el2_lib.scala 331:157] + node _T_537 = cat(_T_536, _T_532) @[el2_lib.scala 331:157] + node _T_538 = cat(_T_537, _T_529) @[el2_lib.scala 331:157] + node _T_539 = xorr(_T_538) @[el2_lib.scala 331:164] + node _T_540 = xor(_T_521, _T_539) @[el2_lib.scala 331:152] + node _T_541 = bits(dccm_data_ecc_lo_any, 1, 1) @[el2_lib.scala 331:176] + node _T_542 = cat(_T_379[1], _T_379[0]) @[el2_lib.scala 331:184] + node _T_543 = cat(_T_379[3], _T_379[2]) @[el2_lib.scala 331:184] + node _T_544 = cat(_T_543, _T_542) @[el2_lib.scala 331:184] + node _T_545 = cat(_T_379[5], _T_379[4]) @[el2_lib.scala 331:184] + node _T_546 = cat(_T_379[8], _T_379[7]) @[el2_lib.scala 331:184] + node _T_547 = cat(_T_546, _T_379[6]) @[el2_lib.scala 331:184] + node _T_548 = cat(_T_547, _T_545) @[el2_lib.scala 331:184] + node _T_549 = cat(_T_548, _T_544) @[el2_lib.scala 331:184] + node _T_550 = cat(_T_379[10], _T_379[9]) @[el2_lib.scala 331:184] + node _T_551 = cat(_T_379[12], _T_379[11]) @[el2_lib.scala 331:184] + node _T_552 = cat(_T_551, _T_550) @[el2_lib.scala 331:184] + node _T_553 = cat(_T_379[14], _T_379[13]) @[el2_lib.scala 331:184] + node _T_554 = cat(_T_379[17], _T_379[16]) @[el2_lib.scala 331:184] + node _T_555 = cat(_T_554, _T_379[15]) @[el2_lib.scala 331:184] + node _T_556 = cat(_T_555, _T_553) @[el2_lib.scala 331:184] + node _T_557 = cat(_T_556, _T_552) @[el2_lib.scala 331:184] + node _T_558 = cat(_T_557, _T_549) @[el2_lib.scala 331:184] + node _T_559 = xorr(_T_558) @[el2_lib.scala 331:191] + node _T_560 = xor(_T_541, _T_559) @[el2_lib.scala 331:179] + node _T_561 = bits(dccm_data_ecc_lo_any, 0, 0) @[el2_lib.scala 331:203] + node _T_562 = cat(_T_378[1], _T_378[0]) @[el2_lib.scala 331:211] + node _T_563 = cat(_T_378[3], _T_378[2]) @[el2_lib.scala 331:211] + node _T_564 = cat(_T_563, _T_562) @[el2_lib.scala 331:211] + node _T_565 = cat(_T_378[5], _T_378[4]) @[el2_lib.scala 331:211] + node _T_566 = cat(_T_378[8], _T_378[7]) @[el2_lib.scala 331:211] + node _T_567 = cat(_T_566, _T_378[6]) @[el2_lib.scala 331:211] + node _T_568 = cat(_T_567, _T_565) @[el2_lib.scala 331:211] + node _T_569 = cat(_T_568, _T_564) @[el2_lib.scala 331:211] + node _T_570 = cat(_T_378[10], _T_378[9]) @[el2_lib.scala 331:211] + node _T_571 = cat(_T_378[12], _T_378[11]) @[el2_lib.scala 331:211] + node _T_572 = cat(_T_571, _T_570) @[el2_lib.scala 331:211] + node _T_573 = cat(_T_378[14], _T_378[13]) @[el2_lib.scala 331:211] + node _T_574 = cat(_T_378[17], _T_378[16]) @[el2_lib.scala 331:211] + node _T_575 = cat(_T_574, _T_378[15]) @[el2_lib.scala 331:211] + node _T_576 = cat(_T_575, _T_573) @[el2_lib.scala 331:211] + node _T_577 = cat(_T_576, _T_572) @[el2_lib.scala 331:211] + node _T_578 = cat(_T_577, _T_569) @[el2_lib.scala 331:211] + node _T_579 = xorr(_T_578) @[el2_lib.scala 331:218] + node _T_580 = xor(_T_561, _T_579) @[el2_lib.scala 331:206] + node _T_581 = cat(_T_540, _T_560) @[Cat.scala 29:58] + node _T_582 = cat(_T_581, _T_580) @[Cat.scala 29:58] + node _T_583 = cat(_T_503, _T_520) @[Cat.scala 29:58] + node _T_584 = cat(_T_478, _T_486) @[Cat.scala 29:58] + node _T_585 = cat(_T_584, _T_583) @[Cat.scala 29:58] + node _T_586 = cat(_T_585, _T_582) @[Cat.scala 29:58] + node _T_587 = neq(_T_586, UInt<1>("h00")) @[el2_lib.scala 332:44] + node _T_588 = and(is_ldst_lo_any, _T_587) @[el2_lib.scala 332:32] + node _T_589 = bits(_T_586, 6, 6) @[el2_lib.scala 332:64] + node single_ecc_error_lo_any = and(_T_588, _T_589) @[el2_lib.scala 332:53] + node _T_590 = neq(_T_586, UInt<1>("h00")) @[el2_lib.scala 333:44] + node _T_591 = and(is_ldst_lo_any, _T_590) @[el2_lib.scala 333:32] + node _T_592 = bits(_T_586, 6, 6) @[el2_lib.scala 333:65] + node _T_593 = not(_T_592) @[el2_lib.scala 333:55] + node double_ecc_error_lo_any = and(_T_591, _T_593) @[el2_lib.scala 333:53] + wire _T_594 : UInt<1>[39] @[el2_lib.scala 334:26] + node _T_595 = bits(_T_586, 5, 0) @[el2_lib.scala 337:35] + node _T_596 = eq(_T_595, UInt<1>("h01")) @[el2_lib.scala 337:41] + _T_594[0] <= _T_596 @[el2_lib.scala 337:23] + node _T_597 = bits(_T_586, 5, 0) @[el2_lib.scala 337:35] + node _T_598 = eq(_T_597, UInt<2>("h02")) @[el2_lib.scala 337:41] + _T_594[1] <= _T_598 @[el2_lib.scala 337:23] + node _T_599 = bits(_T_586, 5, 0) @[el2_lib.scala 337:35] + node _T_600 = eq(_T_599, UInt<2>("h03")) @[el2_lib.scala 337:41] + _T_594[2] <= _T_600 @[el2_lib.scala 337:23] + node _T_601 = bits(_T_586, 5, 0) @[el2_lib.scala 337:35] + node _T_602 = eq(_T_601, UInt<3>("h04")) @[el2_lib.scala 337:41] + _T_594[3] <= _T_602 @[el2_lib.scala 337:23] + node _T_603 = bits(_T_586, 5, 0) @[el2_lib.scala 337:35] + node _T_604 = eq(_T_603, UInt<3>("h05")) @[el2_lib.scala 337:41] + _T_594[4] <= _T_604 @[el2_lib.scala 337:23] + node _T_605 = bits(_T_586, 5, 0) @[el2_lib.scala 337:35] + node _T_606 = eq(_T_605, UInt<3>("h06")) @[el2_lib.scala 337:41] + _T_594[5] <= _T_606 @[el2_lib.scala 337:23] + node _T_607 = bits(_T_586, 5, 0) @[el2_lib.scala 337:35] + node _T_608 = eq(_T_607, UInt<3>("h07")) @[el2_lib.scala 337:41] + _T_594[6] <= _T_608 @[el2_lib.scala 337:23] + node _T_609 = bits(_T_586, 5, 0) @[el2_lib.scala 337:35] + node _T_610 = eq(_T_609, UInt<4>("h08")) @[el2_lib.scala 337:41] + _T_594[7] <= _T_610 @[el2_lib.scala 337:23] + node _T_611 = bits(_T_586, 5, 0) @[el2_lib.scala 337:35] + node _T_612 = eq(_T_611, UInt<4>("h09")) @[el2_lib.scala 337:41] + _T_594[8] <= _T_612 @[el2_lib.scala 337:23] + node _T_613 = bits(_T_586, 5, 0) @[el2_lib.scala 337:35] + node _T_614 = eq(_T_613, UInt<4>("h0a")) @[el2_lib.scala 337:41] + _T_594[9] <= _T_614 @[el2_lib.scala 337:23] + node _T_615 = bits(_T_586, 5, 0) @[el2_lib.scala 337:35] + node _T_616 = eq(_T_615, UInt<4>("h0b")) @[el2_lib.scala 337:41] + _T_594[10] <= _T_616 @[el2_lib.scala 337:23] + node _T_617 = bits(_T_586, 5, 0) @[el2_lib.scala 337:35] + node _T_618 = eq(_T_617, UInt<4>("h0c")) @[el2_lib.scala 337:41] + _T_594[11] <= _T_618 @[el2_lib.scala 337:23] + node _T_619 = bits(_T_586, 5, 0) @[el2_lib.scala 337:35] + node _T_620 = eq(_T_619, UInt<4>("h0d")) @[el2_lib.scala 337:41] + _T_594[12] <= _T_620 @[el2_lib.scala 337:23] + node _T_621 = bits(_T_586, 5, 0) @[el2_lib.scala 337:35] + node _T_622 = eq(_T_621, UInt<4>("h0e")) @[el2_lib.scala 337:41] + _T_594[13] <= _T_622 @[el2_lib.scala 337:23] + node _T_623 = bits(_T_586, 5, 0) @[el2_lib.scala 337:35] + node _T_624 = eq(_T_623, UInt<4>("h0f")) @[el2_lib.scala 337:41] + _T_594[14] <= _T_624 @[el2_lib.scala 337:23] + node _T_625 = bits(_T_586, 5, 0) @[el2_lib.scala 337:35] + node _T_626 = eq(_T_625, UInt<5>("h010")) @[el2_lib.scala 337:41] + _T_594[15] <= _T_626 @[el2_lib.scala 337:23] + node _T_627 = bits(_T_586, 5, 0) @[el2_lib.scala 337:35] + node _T_628 = eq(_T_627, UInt<5>("h011")) @[el2_lib.scala 337:41] + _T_594[16] <= _T_628 @[el2_lib.scala 337:23] + node _T_629 = bits(_T_586, 5, 0) @[el2_lib.scala 337:35] + node _T_630 = eq(_T_629, UInt<5>("h012")) @[el2_lib.scala 337:41] + _T_594[17] <= _T_630 @[el2_lib.scala 337:23] + node _T_631 = bits(_T_586, 5, 0) @[el2_lib.scala 337:35] + node _T_632 = eq(_T_631, UInt<5>("h013")) @[el2_lib.scala 337:41] + _T_594[18] <= _T_632 @[el2_lib.scala 337:23] + node _T_633 = bits(_T_586, 5, 0) @[el2_lib.scala 337:35] + node _T_634 = eq(_T_633, UInt<5>("h014")) @[el2_lib.scala 337:41] + _T_594[19] <= _T_634 @[el2_lib.scala 337:23] + node _T_635 = bits(_T_586, 5, 0) @[el2_lib.scala 337:35] + node _T_636 = eq(_T_635, UInt<5>("h015")) @[el2_lib.scala 337:41] + _T_594[20] <= _T_636 @[el2_lib.scala 337:23] + node _T_637 = bits(_T_586, 5, 0) @[el2_lib.scala 337:35] + node _T_638 = eq(_T_637, UInt<5>("h016")) @[el2_lib.scala 337:41] + _T_594[21] <= _T_638 @[el2_lib.scala 337:23] + node _T_639 = bits(_T_586, 5, 0) @[el2_lib.scala 337:35] + node _T_640 = eq(_T_639, UInt<5>("h017")) @[el2_lib.scala 337:41] + _T_594[22] <= _T_640 @[el2_lib.scala 337:23] + node _T_641 = bits(_T_586, 5, 0) @[el2_lib.scala 337:35] + node _T_642 = eq(_T_641, UInt<5>("h018")) @[el2_lib.scala 337:41] + _T_594[23] <= _T_642 @[el2_lib.scala 337:23] + node _T_643 = bits(_T_586, 5, 0) @[el2_lib.scala 337:35] + node _T_644 = eq(_T_643, UInt<5>("h019")) @[el2_lib.scala 337:41] + _T_594[24] <= _T_644 @[el2_lib.scala 337:23] + node _T_645 = bits(_T_586, 5, 0) @[el2_lib.scala 337:35] + node _T_646 = eq(_T_645, UInt<5>("h01a")) @[el2_lib.scala 337:41] + _T_594[25] <= _T_646 @[el2_lib.scala 337:23] + node _T_647 = bits(_T_586, 5, 0) @[el2_lib.scala 337:35] + node _T_648 = eq(_T_647, UInt<5>("h01b")) @[el2_lib.scala 337:41] + _T_594[26] <= _T_648 @[el2_lib.scala 337:23] + node _T_649 = bits(_T_586, 5, 0) @[el2_lib.scala 337:35] + node _T_650 = eq(_T_649, UInt<5>("h01c")) @[el2_lib.scala 337:41] + _T_594[27] <= _T_650 @[el2_lib.scala 337:23] + node _T_651 = bits(_T_586, 5, 0) @[el2_lib.scala 337:35] + node _T_652 = eq(_T_651, UInt<5>("h01d")) @[el2_lib.scala 337:41] + _T_594[28] <= _T_652 @[el2_lib.scala 337:23] + node _T_653 = bits(_T_586, 5, 0) @[el2_lib.scala 337:35] + node _T_654 = eq(_T_653, UInt<5>("h01e")) @[el2_lib.scala 337:41] + _T_594[29] <= _T_654 @[el2_lib.scala 337:23] + node _T_655 = bits(_T_586, 5, 0) @[el2_lib.scala 337:35] + node _T_656 = eq(_T_655, UInt<5>("h01f")) @[el2_lib.scala 337:41] + _T_594[30] <= _T_656 @[el2_lib.scala 337:23] + node _T_657 = bits(_T_586, 5, 0) @[el2_lib.scala 337:35] + node _T_658 = eq(_T_657, UInt<6>("h020")) @[el2_lib.scala 337:41] + _T_594[31] <= _T_658 @[el2_lib.scala 337:23] + node _T_659 = bits(_T_586, 5, 0) @[el2_lib.scala 337:35] + node _T_660 = eq(_T_659, UInt<6>("h021")) @[el2_lib.scala 337:41] + _T_594[32] <= _T_660 @[el2_lib.scala 337:23] + node _T_661 = bits(_T_586, 5, 0) @[el2_lib.scala 337:35] + node _T_662 = eq(_T_661, UInt<6>("h022")) @[el2_lib.scala 337:41] + _T_594[33] <= _T_662 @[el2_lib.scala 337:23] + node _T_663 = bits(_T_586, 5, 0) @[el2_lib.scala 337:35] + node _T_664 = eq(_T_663, UInt<6>("h023")) @[el2_lib.scala 337:41] + _T_594[34] <= _T_664 @[el2_lib.scala 337:23] + node _T_665 = bits(_T_586, 5, 0) @[el2_lib.scala 337:35] + node _T_666 = eq(_T_665, UInt<6>("h024")) @[el2_lib.scala 337:41] + _T_594[35] <= _T_666 @[el2_lib.scala 337:23] + node _T_667 = bits(_T_586, 5, 0) @[el2_lib.scala 337:35] + node _T_668 = eq(_T_667, UInt<6>("h025")) @[el2_lib.scala 337:41] + _T_594[36] <= _T_668 @[el2_lib.scala 337:23] + node _T_669 = bits(_T_586, 5, 0) @[el2_lib.scala 337:35] + node _T_670 = eq(_T_669, UInt<6>("h026")) @[el2_lib.scala 337:41] + _T_594[37] <= _T_670 @[el2_lib.scala 337:23] + node _T_671 = bits(_T_586, 5, 0) @[el2_lib.scala 337:35] + node _T_672 = eq(_T_671, UInt<6>("h027")) @[el2_lib.scala 337:41] + _T_594[38] <= _T_672 @[el2_lib.scala 337:23] + node _T_673 = bits(dccm_data_ecc_lo_any, 6, 6) @[el2_lib.scala 339:37] + node _T_674 = bits(dccm_rdata_lo_any, 31, 26) @[el2_lib.scala 339:45] + node _T_675 = bits(dccm_data_ecc_lo_any, 5, 5) @[el2_lib.scala 339:60] + node _T_676 = bits(dccm_rdata_lo_any, 25, 11) @[el2_lib.scala 339:68] + node _T_677 = bits(dccm_data_ecc_lo_any, 4, 4) @[el2_lib.scala 339:83] + node _T_678 = bits(dccm_rdata_lo_any, 10, 4) @[el2_lib.scala 339:91] + node _T_679 = bits(dccm_data_ecc_lo_any, 3, 3) @[el2_lib.scala 339:105] + node _T_680 = bits(dccm_rdata_lo_any, 3, 1) @[el2_lib.scala 339:113] + node _T_681 = bits(dccm_data_ecc_lo_any, 2, 2) @[el2_lib.scala 339:126] + node _T_682 = bits(dccm_rdata_lo_any, 0, 0) @[el2_lib.scala 339:134] + node _T_683 = bits(dccm_data_ecc_lo_any, 1, 0) @[el2_lib.scala 339:145] + node _T_684 = cat(_T_682, _T_683) @[Cat.scala 29:58] + node _T_685 = cat(_T_679, _T_680) @[Cat.scala 29:58] + node _T_686 = cat(_T_685, _T_681) @[Cat.scala 29:58] + node _T_687 = cat(_T_686, _T_684) @[Cat.scala 29:58] + node _T_688 = cat(_T_676, _T_677) @[Cat.scala 29:58] + node _T_689 = cat(_T_688, _T_678) @[Cat.scala 29:58] + node _T_690 = cat(_T_673, _T_674) @[Cat.scala 29:58] + node _T_691 = cat(_T_690, _T_675) @[Cat.scala 29:58] + node _T_692 = cat(_T_691, _T_689) @[Cat.scala 29:58] + node _T_693 = cat(_T_692, _T_687) @[Cat.scala 29:58] + node _T_694 = bits(single_ecc_error_lo_any, 0, 0) @[el2_lib.scala 340:49] + node _T_695 = cat(_T_594[1], _T_594[0]) @[el2_lib.scala 340:69] + node _T_696 = cat(_T_594[3], _T_594[2]) @[el2_lib.scala 340:69] + node _T_697 = cat(_T_696, _T_695) @[el2_lib.scala 340:69] + node _T_698 = cat(_T_594[5], _T_594[4]) @[el2_lib.scala 340:69] + node _T_699 = cat(_T_594[8], _T_594[7]) @[el2_lib.scala 340:69] + node _T_700 = cat(_T_699, _T_594[6]) @[el2_lib.scala 340:69] + node _T_701 = cat(_T_700, _T_698) @[el2_lib.scala 340:69] + node _T_702 = cat(_T_701, _T_697) @[el2_lib.scala 340:69] + node _T_703 = cat(_T_594[10], _T_594[9]) @[el2_lib.scala 340:69] + node _T_704 = cat(_T_594[13], _T_594[12]) @[el2_lib.scala 340:69] + node _T_705 = cat(_T_704, _T_594[11]) @[el2_lib.scala 340:69] + node _T_706 = cat(_T_705, _T_703) @[el2_lib.scala 340:69] + node _T_707 = cat(_T_594[15], _T_594[14]) @[el2_lib.scala 340:69] + node _T_708 = cat(_T_594[18], _T_594[17]) @[el2_lib.scala 340:69] + node _T_709 = cat(_T_708, _T_594[16]) @[el2_lib.scala 340:69] + node _T_710 = cat(_T_709, _T_707) @[el2_lib.scala 340:69] + node _T_711 = cat(_T_710, _T_706) @[el2_lib.scala 340:69] + node _T_712 = cat(_T_711, _T_702) @[el2_lib.scala 340:69] + node _T_713 = cat(_T_594[20], _T_594[19]) @[el2_lib.scala 340:69] + node _T_714 = cat(_T_594[23], _T_594[22]) @[el2_lib.scala 340:69] + node _T_715 = cat(_T_714, _T_594[21]) @[el2_lib.scala 340:69] + node _T_716 = cat(_T_715, _T_713) @[el2_lib.scala 340:69] + node _T_717 = cat(_T_594[25], _T_594[24]) @[el2_lib.scala 340:69] + node _T_718 = cat(_T_594[28], _T_594[27]) @[el2_lib.scala 340:69] + node _T_719 = cat(_T_718, _T_594[26]) @[el2_lib.scala 340:69] + node _T_720 = cat(_T_719, _T_717) @[el2_lib.scala 340:69] + node _T_721 = cat(_T_720, _T_716) @[el2_lib.scala 340:69] + node _T_722 = cat(_T_594[30], _T_594[29]) @[el2_lib.scala 340:69] + node _T_723 = cat(_T_594[33], _T_594[32]) @[el2_lib.scala 340:69] + node _T_724 = cat(_T_723, _T_594[31]) @[el2_lib.scala 340:69] + node _T_725 = cat(_T_724, _T_722) @[el2_lib.scala 340:69] + node _T_726 = cat(_T_594[35], _T_594[34]) @[el2_lib.scala 340:69] + node _T_727 = cat(_T_594[38], _T_594[37]) @[el2_lib.scala 340:69] + node _T_728 = cat(_T_727, _T_594[36]) @[el2_lib.scala 340:69] + node _T_729 = cat(_T_728, _T_726) @[el2_lib.scala 340:69] + node _T_730 = cat(_T_729, _T_725) @[el2_lib.scala 340:69] + node _T_731 = cat(_T_730, _T_721) @[el2_lib.scala 340:69] + node _T_732 = cat(_T_731, _T_712) @[el2_lib.scala 340:69] + node _T_733 = xor(_T_732, _T_693) @[el2_lib.scala 340:76] + node _T_734 = mux(_T_694, _T_733, _T_693) @[el2_lib.scala 340:31] + node _T_735 = bits(_T_734, 37, 32) @[el2_lib.scala 342:37] + node _T_736 = bits(_T_734, 30, 16) @[el2_lib.scala 342:61] + node _T_737 = bits(_T_734, 14, 8) @[el2_lib.scala 342:86] + node _T_738 = bits(_T_734, 6, 4) @[el2_lib.scala 342:110] + node _T_739 = bits(_T_734, 2, 2) @[el2_lib.scala 342:133] + node _T_740 = cat(_T_738, _T_739) @[Cat.scala 29:58] + node _T_741 = cat(_T_735, _T_736) @[Cat.scala 29:58] + node _T_742 = cat(_T_741, _T_737) @[Cat.scala 29:58] + node sec_data_lo_any = cat(_T_742, _T_740) @[Cat.scala 29:58] + node _T_743 = bits(_T_734, 38, 38) @[el2_lib.scala 343:39] + node _T_744 = bits(_T_586, 6, 0) @[el2_lib.scala 343:56] + node _T_745 = eq(_T_744, UInt<7>("h040")) @[el2_lib.scala 343:62] + node _T_746 = xor(_T_743, _T_745) @[el2_lib.scala 343:44] + node _T_747 = bits(_T_734, 31, 31) @[el2_lib.scala 343:102] + node _T_748 = bits(_T_734, 15, 15) @[el2_lib.scala 343:124] + node _T_749 = bits(_T_734, 7, 7) @[el2_lib.scala 343:146] + node _T_750 = bits(_T_734, 3, 3) @[el2_lib.scala 343:167] + node _T_751 = bits(_T_734, 1, 0) @[el2_lib.scala 343:188] + node _T_752 = cat(_T_749, _T_750) @[Cat.scala 29:58] + node _T_753 = cat(_T_752, _T_751) @[Cat.scala 29:58] + node _T_754 = cat(_T_746, _T_747) @[Cat.scala 29:58] + node _T_755 = cat(_T_754, _T_748) @[Cat.scala 29:58] + node ecc_out_lo_nc = cat(_T_755, _T_753) @[Cat.scala 29:58] + node _T_756 = bits(dccm_wdata_lo_any, 0, 0) @[el2_lib.scala 257:58] + node _T_757 = bits(dccm_wdata_lo_any, 1, 1) @[el2_lib.scala 257:58] + node _T_758 = bits(dccm_wdata_lo_any, 3, 3) @[el2_lib.scala 257:58] + node _T_759 = bits(dccm_wdata_lo_any, 4, 4) @[el2_lib.scala 257:58] + node _T_760 = bits(dccm_wdata_lo_any, 6, 6) @[el2_lib.scala 257:58] + node _T_761 = bits(dccm_wdata_lo_any, 8, 8) @[el2_lib.scala 257:58] + node _T_762 = bits(dccm_wdata_lo_any, 10, 10) @[el2_lib.scala 257:58] + node _T_763 = bits(dccm_wdata_lo_any, 11, 11) @[el2_lib.scala 257:58] + node _T_764 = bits(dccm_wdata_lo_any, 13, 13) @[el2_lib.scala 257:58] + node _T_765 = bits(dccm_wdata_lo_any, 15, 15) @[el2_lib.scala 257:58] + node _T_766 = bits(dccm_wdata_lo_any, 17, 17) @[el2_lib.scala 257:58] + node _T_767 = bits(dccm_wdata_lo_any, 19, 19) @[el2_lib.scala 257:58] + node _T_768 = bits(dccm_wdata_lo_any, 21, 21) @[el2_lib.scala 257:58] + node _T_769 = bits(dccm_wdata_lo_any, 23, 23) @[el2_lib.scala 257:58] + node _T_770 = bits(dccm_wdata_lo_any, 25, 25) @[el2_lib.scala 257:58] + node _T_771 = bits(dccm_wdata_lo_any, 26, 26) @[el2_lib.scala 257:58] + node _T_772 = bits(dccm_wdata_lo_any, 28, 28) @[el2_lib.scala 257:58] + node _T_773 = bits(dccm_wdata_lo_any, 30, 30) @[el2_lib.scala 257:58] + node _T_774 = xor(_T_756, _T_757) @[el2_lib.scala 257:74] + node _T_775 = xor(_T_774, _T_758) @[el2_lib.scala 257:74] + node _T_776 = xor(_T_775, _T_759) @[el2_lib.scala 257:74] + node _T_777 = xor(_T_776, _T_760) @[el2_lib.scala 257:74] + node _T_778 = xor(_T_777, _T_761) @[el2_lib.scala 257:74] + node _T_779 = xor(_T_778, _T_762) @[el2_lib.scala 257:74] + node _T_780 = xor(_T_779, _T_763) @[el2_lib.scala 257:74] + node _T_781 = xor(_T_780, _T_764) @[el2_lib.scala 257:74] + node _T_782 = xor(_T_781, _T_765) @[el2_lib.scala 257:74] + node _T_783 = xor(_T_782, _T_766) @[el2_lib.scala 257:74] + node _T_784 = xor(_T_783, _T_767) @[el2_lib.scala 257:74] + node _T_785 = xor(_T_784, _T_768) @[el2_lib.scala 257:74] + node _T_786 = xor(_T_785, _T_769) @[el2_lib.scala 257:74] + node _T_787 = xor(_T_786, _T_770) @[el2_lib.scala 257:74] + node _T_788 = xor(_T_787, _T_771) @[el2_lib.scala 257:74] + node _T_789 = xor(_T_788, _T_772) @[el2_lib.scala 257:74] + node _T_790 = xor(_T_789, _T_773) @[el2_lib.scala 257:74] + node _T_791 = bits(dccm_wdata_lo_any, 0, 0) @[el2_lib.scala 257:58] + node _T_792 = bits(dccm_wdata_lo_any, 2, 2) @[el2_lib.scala 257:58] + node _T_793 = bits(dccm_wdata_lo_any, 3, 3) @[el2_lib.scala 257:58] + node _T_794 = bits(dccm_wdata_lo_any, 5, 5) @[el2_lib.scala 257:58] + node _T_795 = bits(dccm_wdata_lo_any, 6, 6) @[el2_lib.scala 257:58] + node _T_796 = bits(dccm_wdata_lo_any, 9, 9) @[el2_lib.scala 257:58] + node _T_797 = bits(dccm_wdata_lo_any, 10, 10) @[el2_lib.scala 257:58] + node _T_798 = bits(dccm_wdata_lo_any, 12, 12) @[el2_lib.scala 257:58] + node _T_799 = bits(dccm_wdata_lo_any, 13, 13) @[el2_lib.scala 257:58] + node _T_800 = bits(dccm_wdata_lo_any, 16, 16) @[el2_lib.scala 257:58] + node _T_801 = bits(dccm_wdata_lo_any, 17, 17) @[el2_lib.scala 257:58] + node _T_802 = bits(dccm_wdata_lo_any, 20, 20) @[el2_lib.scala 257:58] + node _T_803 = bits(dccm_wdata_lo_any, 21, 21) @[el2_lib.scala 257:58] + node _T_804 = bits(dccm_wdata_lo_any, 24, 24) @[el2_lib.scala 257:58] + node _T_805 = bits(dccm_wdata_lo_any, 25, 25) @[el2_lib.scala 257:58] + node _T_806 = bits(dccm_wdata_lo_any, 27, 27) @[el2_lib.scala 257:58] + node _T_807 = bits(dccm_wdata_lo_any, 28, 28) @[el2_lib.scala 257:58] + node _T_808 = bits(dccm_wdata_lo_any, 31, 31) @[el2_lib.scala 257:58] + node _T_809 = xor(_T_791, _T_792) @[el2_lib.scala 257:74] + node _T_810 = xor(_T_809, _T_793) @[el2_lib.scala 257:74] + node _T_811 = xor(_T_810, _T_794) @[el2_lib.scala 257:74] + node _T_812 = xor(_T_811, _T_795) @[el2_lib.scala 257:74] + node _T_813 = xor(_T_812, _T_796) @[el2_lib.scala 257:74] + node _T_814 = xor(_T_813, _T_797) @[el2_lib.scala 257:74] + node _T_815 = xor(_T_814, _T_798) @[el2_lib.scala 257:74] + node _T_816 = xor(_T_815, _T_799) @[el2_lib.scala 257:74] + node _T_817 = xor(_T_816, _T_800) @[el2_lib.scala 257:74] + node _T_818 = xor(_T_817, _T_801) @[el2_lib.scala 257:74] + node _T_819 = xor(_T_818, _T_802) @[el2_lib.scala 257:74] + node _T_820 = xor(_T_819, _T_803) @[el2_lib.scala 257:74] + node _T_821 = xor(_T_820, _T_804) @[el2_lib.scala 257:74] + node _T_822 = xor(_T_821, _T_805) @[el2_lib.scala 257:74] + node _T_823 = xor(_T_822, _T_806) @[el2_lib.scala 257:74] + node _T_824 = xor(_T_823, _T_807) @[el2_lib.scala 257:74] + node _T_825 = xor(_T_824, _T_808) @[el2_lib.scala 257:74] + node _T_826 = bits(dccm_wdata_lo_any, 1, 1) @[el2_lib.scala 257:58] + node _T_827 = bits(dccm_wdata_lo_any, 2, 2) @[el2_lib.scala 257:58] + node _T_828 = bits(dccm_wdata_lo_any, 3, 3) @[el2_lib.scala 257:58] + node _T_829 = bits(dccm_wdata_lo_any, 7, 7) @[el2_lib.scala 257:58] + node _T_830 = bits(dccm_wdata_lo_any, 8, 8) @[el2_lib.scala 257:58] + node _T_831 = bits(dccm_wdata_lo_any, 9, 9) @[el2_lib.scala 257:58] + node _T_832 = bits(dccm_wdata_lo_any, 10, 10) @[el2_lib.scala 257:58] + node _T_833 = bits(dccm_wdata_lo_any, 14, 14) @[el2_lib.scala 257:58] + node _T_834 = bits(dccm_wdata_lo_any, 15, 15) @[el2_lib.scala 257:58] + node _T_835 = bits(dccm_wdata_lo_any, 16, 16) @[el2_lib.scala 257:58] + node _T_836 = bits(dccm_wdata_lo_any, 17, 17) @[el2_lib.scala 257:58] + node _T_837 = bits(dccm_wdata_lo_any, 22, 22) @[el2_lib.scala 257:58] + node _T_838 = bits(dccm_wdata_lo_any, 23, 23) @[el2_lib.scala 257:58] + node _T_839 = bits(dccm_wdata_lo_any, 24, 24) @[el2_lib.scala 257:58] + node _T_840 = bits(dccm_wdata_lo_any, 25, 25) @[el2_lib.scala 257:58] + node _T_841 = bits(dccm_wdata_lo_any, 29, 29) @[el2_lib.scala 257:58] + node _T_842 = bits(dccm_wdata_lo_any, 30, 30) @[el2_lib.scala 257:58] + node _T_843 = bits(dccm_wdata_lo_any, 31, 31) @[el2_lib.scala 257:58] + node _T_844 = xor(_T_826, _T_827) @[el2_lib.scala 257:74] + node _T_845 = xor(_T_844, _T_828) @[el2_lib.scala 257:74] + node _T_846 = xor(_T_845, _T_829) @[el2_lib.scala 257:74] + node _T_847 = xor(_T_846, _T_830) @[el2_lib.scala 257:74] + node _T_848 = xor(_T_847, _T_831) @[el2_lib.scala 257:74] + node _T_849 = xor(_T_848, _T_832) @[el2_lib.scala 257:74] + node _T_850 = xor(_T_849, _T_833) @[el2_lib.scala 257:74] + node _T_851 = xor(_T_850, _T_834) @[el2_lib.scala 257:74] + node _T_852 = xor(_T_851, _T_835) @[el2_lib.scala 257:74] + node _T_853 = xor(_T_852, _T_836) @[el2_lib.scala 257:74] + node _T_854 = xor(_T_853, _T_837) @[el2_lib.scala 257:74] + node _T_855 = xor(_T_854, _T_838) @[el2_lib.scala 257:74] + node _T_856 = xor(_T_855, _T_839) @[el2_lib.scala 257:74] + node _T_857 = xor(_T_856, _T_840) @[el2_lib.scala 257:74] + node _T_858 = xor(_T_857, _T_841) @[el2_lib.scala 257:74] + node _T_859 = xor(_T_858, _T_842) @[el2_lib.scala 257:74] + node _T_860 = xor(_T_859, _T_843) @[el2_lib.scala 257:74] + node _T_861 = bits(dccm_wdata_lo_any, 4, 4) @[el2_lib.scala 257:58] + node _T_862 = bits(dccm_wdata_lo_any, 5, 5) @[el2_lib.scala 257:58] + node _T_863 = bits(dccm_wdata_lo_any, 6, 6) @[el2_lib.scala 257:58] + node _T_864 = bits(dccm_wdata_lo_any, 7, 7) @[el2_lib.scala 257:58] + node _T_865 = bits(dccm_wdata_lo_any, 8, 8) @[el2_lib.scala 257:58] + node _T_866 = bits(dccm_wdata_lo_any, 9, 9) @[el2_lib.scala 257:58] + node _T_867 = bits(dccm_wdata_lo_any, 10, 10) @[el2_lib.scala 257:58] + node _T_868 = bits(dccm_wdata_lo_any, 18, 18) @[el2_lib.scala 257:58] + node _T_869 = bits(dccm_wdata_lo_any, 19, 19) @[el2_lib.scala 257:58] + node _T_870 = bits(dccm_wdata_lo_any, 20, 20) @[el2_lib.scala 257:58] + node _T_871 = bits(dccm_wdata_lo_any, 21, 21) @[el2_lib.scala 257:58] + node _T_872 = bits(dccm_wdata_lo_any, 22, 22) @[el2_lib.scala 257:58] + node _T_873 = bits(dccm_wdata_lo_any, 23, 23) @[el2_lib.scala 257:58] + node _T_874 = bits(dccm_wdata_lo_any, 24, 24) @[el2_lib.scala 257:58] + node _T_875 = bits(dccm_wdata_lo_any, 25, 25) @[el2_lib.scala 257:58] + node _T_876 = xor(_T_861, _T_862) @[el2_lib.scala 257:74] + node _T_877 = xor(_T_876, _T_863) @[el2_lib.scala 257:74] + node _T_878 = xor(_T_877, _T_864) @[el2_lib.scala 257:74] + node _T_879 = xor(_T_878, _T_865) @[el2_lib.scala 257:74] + node _T_880 = xor(_T_879, _T_866) @[el2_lib.scala 257:74] + node _T_881 = xor(_T_880, _T_867) @[el2_lib.scala 257:74] + node _T_882 = xor(_T_881, _T_868) @[el2_lib.scala 257:74] + node _T_883 = xor(_T_882, _T_869) @[el2_lib.scala 257:74] + node _T_884 = xor(_T_883, _T_870) @[el2_lib.scala 257:74] + node _T_885 = xor(_T_884, _T_871) @[el2_lib.scala 257:74] + node _T_886 = xor(_T_885, _T_872) @[el2_lib.scala 257:74] + node _T_887 = xor(_T_886, _T_873) @[el2_lib.scala 257:74] + node _T_888 = xor(_T_887, _T_874) @[el2_lib.scala 257:74] + node _T_889 = xor(_T_888, _T_875) @[el2_lib.scala 257:74] + node _T_890 = bits(dccm_wdata_lo_any, 11, 11) @[el2_lib.scala 257:58] + node _T_891 = bits(dccm_wdata_lo_any, 12, 12) @[el2_lib.scala 257:58] + node _T_892 = bits(dccm_wdata_lo_any, 13, 13) @[el2_lib.scala 257:58] + node _T_893 = bits(dccm_wdata_lo_any, 14, 14) @[el2_lib.scala 257:58] + node _T_894 = bits(dccm_wdata_lo_any, 15, 15) @[el2_lib.scala 257:58] + node _T_895 = bits(dccm_wdata_lo_any, 16, 16) @[el2_lib.scala 257:58] + node _T_896 = bits(dccm_wdata_lo_any, 17, 17) @[el2_lib.scala 257:58] + node _T_897 = bits(dccm_wdata_lo_any, 18, 18) @[el2_lib.scala 257:58] + node _T_898 = bits(dccm_wdata_lo_any, 19, 19) @[el2_lib.scala 257:58] + node _T_899 = bits(dccm_wdata_lo_any, 20, 20) @[el2_lib.scala 257:58] + node _T_900 = bits(dccm_wdata_lo_any, 21, 21) @[el2_lib.scala 257:58] + node _T_901 = bits(dccm_wdata_lo_any, 22, 22) @[el2_lib.scala 257:58] + node _T_902 = bits(dccm_wdata_lo_any, 23, 23) @[el2_lib.scala 257:58] + node _T_903 = bits(dccm_wdata_lo_any, 24, 24) @[el2_lib.scala 257:58] + node _T_904 = bits(dccm_wdata_lo_any, 25, 25) @[el2_lib.scala 257:58] + node _T_905 = xor(_T_890, _T_891) @[el2_lib.scala 257:74] + node _T_906 = xor(_T_905, _T_892) @[el2_lib.scala 257:74] + node _T_907 = xor(_T_906, _T_893) @[el2_lib.scala 257:74] + node _T_908 = xor(_T_907, _T_894) @[el2_lib.scala 257:74] + node _T_909 = xor(_T_908, _T_895) @[el2_lib.scala 257:74] + node _T_910 = xor(_T_909, _T_896) @[el2_lib.scala 257:74] + node _T_911 = xor(_T_910, _T_897) @[el2_lib.scala 257:74] + node _T_912 = xor(_T_911, _T_898) @[el2_lib.scala 257:74] + node _T_913 = xor(_T_912, _T_899) @[el2_lib.scala 257:74] + node _T_914 = xor(_T_913, _T_900) @[el2_lib.scala 257:74] + node _T_915 = xor(_T_914, _T_901) @[el2_lib.scala 257:74] + node _T_916 = xor(_T_915, _T_902) @[el2_lib.scala 257:74] + node _T_917 = xor(_T_916, _T_903) @[el2_lib.scala 257:74] + node _T_918 = xor(_T_917, _T_904) @[el2_lib.scala 257:74] + node _T_919 = bits(dccm_wdata_lo_any, 26, 26) @[el2_lib.scala 257:58] + node _T_920 = bits(dccm_wdata_lo_any, 27, 27) @[el2_lib.scala 257:58] + node _T_921 = bits(dccm_wdata_lo_any, 28, 28) @[el2_lib.scala 257:58] + node _T_922 = bits(dccm_wdata_lo_any, 29, 29) @[el2_lib.scala 257:58] + node _T_923 = bits(dccm_wdata_lo_any, 30, 30) @[el2_lib.scala 257:58] + node _T_924 = bits(dccm_wdata_lo_any, 31, 31) @[el2_lib.scala 257:58] + node _T_925 = xor(_T_919, _T_920) @[el2_lib.scala 257:74] + node _T_926 = xor(_T_925, _T_921) @[el2_lib.scala 257:74] + node _T_927 = xor(_T_926, _T_922) @[el2_lib.scala 257:74] + node _T_928 = xor(_T_927, _T_923) @[el2_lib.scala 257:74] + node _T_929 = xor(_T_928, _T_924) @[el2_lib.scala 257:74] + node _T_930 = cat(_T_860, _T_825) @[Cat.scala 29:58] + node _T_931 = cat(_T_930, _T_790) @[Cat.scala 29:58] + node _T_932 = cat(_T_929, _T_918) @[Cat.scala 29:58] + node _T_933 = cat(_T_932, _T_889) @[Cat.scala 29:58] + node _T_934 = cat(_T_933, _T_931) @[Cat.scala 29:58] + node _T_935 = xorr(dccm_wdata_lo_any) @[el2_lib.scala 265:13] + node _T_936 = xorr(_T_934) @[el2_lib.scala 265:23] + node _T_937 = xor(_T_935, _T_936) @[el2_lib.scala 265:18] + node dccm_wdata_ecc_lo_any = cat(_T_937, _T_934) @[Cat.scala 29:58] + node _T_938 = bits(dccm_wdata_hi_any, 0, 0) @[el2_lib.scala 257:58] + node _T_939 = bits(dccm_wdata_hi_any, 1, 1) @[el2_lib.scala 257:58] + node _T_940 = bits(dccm_wdata_hi_any, 3, 3) @[el2_lib.scala 257:58] + node _T_941 = bits(dccm_wdata_hi_any, 4, 4) @[el2_lib.scala 257:58] + node _T_942 = bits(dccm_wdata_hi_any, 6, 6) @[el2_lib.scala 257:58] + node _T_943 = bits(dccm_wdata_hi_any, 8, 8) @[el2_lib.scala 257:58] + node _T_944 = bits(dccm_wdata_hi_any, 10, 10) @[el2_lib.scala 257:58] + node _T_945 = bits(dccm_wdata_hi_any, 11, 11) @[el2_lib.scala 257:58] + node _T_946 = bits(dccm_wdata_hi_any, 13, 13) @[el2_lib.scala 257:58] + node _T_947 = bits(dccm_wdata_hi_any, 15, 15) @[el2_lib.scala 257:58] + node _T_948 = bits(dccm_wdata_hi_any, 17, 17) @[el2_lib.scala 257:58] + node _T_949 = bits(dccm_wdata_hi_any, 19, 19) @[el2_lib.scala 257:58] + node _T_950 = bits(dccm_wdata_hi_any, 21, 21) @[el2_lib.scala 257:58] + node _T_951 = bits(dccm_wdata_hi_any, 23, 23) @[el2_lib.scala 257:58] + node _T_952 = bits(dccm_wdata_hi_any, 25, 25) @[el2_lib.scala 257:58] + node _T_953 = bits(dccm_wdata_hi_any, 26, 26) @[el2_lib.scala 257:58] + node _T_954 = bits(dccm_wdata_hi_any, 28, 28) @[el2_lib.scala 257:58] + node _T_955 = bits(dccm_wdata_hi_any, 30, 30) @[el2_lib.scala 257:58] + node _T_956 = xor(_T_938, _T_939) @[el2_lib.scala 257:74] + node _T_957 = xor(_T_956, _T_940) @[el2_lib.scala 257:74] + node _T_958 = xor(_T_957, _T_941) @[el2_lib.scala 257:74] + node _T_959 = xor(_T_958, _T_942) @[el2_lib.scala 257:74] + node _T_960 = xor(_T_959, _T_943) @[el2_lib.scala 257:74] + node _T_961 = xor(_T_960, _T_944) @[el2_lib.scala 257:74] + node _T_962 = xor(_T_961, _T_945) @[el2_lib.scala 257:74] + node _T_963 = xor(_T_962, _T_946) @[el2_lib.scala 257:74] + node _T_964 = xor(_T_963, _T_947) @[el2_lib.scala 257:74] + node _T_965 = xor(_T_964, _T_948) @[el2_lib.scala 257:74] + node _T_966 = xor(_T_965, _T_949) @[el2_lib.scala 257:74] + node _T_967 = xor(_T_966, _T_950) @[el2_lib.scala 257:74] + node _T_968 = xor(_T_967, _T_951) @[el2_lib.scala 257:74] + node _T_969 = xor(_T_968, _T_952) @[el2_lib.scala 257:74] + node _T_970 = xor(_T_969, _T_953) @[el2_lib.scala 257:74] + node _T_971 = xor(_T_970, _T_954) @[el2_lib.scala 257:74] + node _T_972 = xor(_T_971, _T_955) @[el2_lib.scala 257:74] + node _T_973 = bits(dccm_wdata_hi_any, 0, 0) @[el2_lib.scala 257:58] + node _T_974 = bits(dccm_wdata_hi_any, 2, 2) @[el2_lib.scala 257:58] + node _T_975 = bits(dccm_wdata_hi_any, 3, 3) @[el2_lib.scala 257:58] + node _T_976 = bits(dccm_wdata_hi_any, 5, 5) @[el2_lib.scala 257:58] + node _T_977 = bits(dccm_wdata_hi_any, 6, 6) @[el2_lib.scala 257:58] + node _T_978 = bits(dccm_wdata_hi_any, 9, 9) @[el2_lib.scala 257:58] + node _T_979 = bits(dccm_wdata_hi_any, 10, 10) @[el2_lib.scala 257:58] + node _T_980 = bits(dccm_wdata_hi_any, 12, 12) @[el2_lib.scala 257:58] + node _T_981 = bits(dccm_wdata_hi_any, 13, 13) @[el2_lib.scala 257:58] + node _T_982 = bits(dccm_wdata_hi_any, 16, 16) @[el2_lib.scala 257:58] + node _T_983 = bits(dccm_wdata_hi_any, 17, 17) @[el2_lib.scala 257:58] + node _T_984 = bits(dccm_wdata_hi_any, 20, 20) @[el2_lib.scala 257:58] + node _T_985 = bits(dccm_wdata_hi_any, 21, 21) @[el2_lib.scala 257:58] + node _T_986 = bits(dccm_wdata_hi_any, 24, 24) @[el2_lib.scala 257:58] + node _T_987 = bits(dccm_wdata_hi_any, 25, 25) @[el2_lib.scala 257:58] + node _T_988 = bits(dccm_wdata_hi_any, 27, 27) @[el2_lib.scala 257:58] + node _T_989 = bits(dccm_wdata_hi_any, 28, 28) @[el2_lib.scala 257:58] + node _T_990 = bits(dccm_wdata_hi_any, 31, 31) @[el2_lib.scala 257:58] + node _T_991 = xor(_T_973, _T_974) @[el2_lib.scala 257:74] + node _T_992 = xor(_T_991, _T_975) @[el2_lib.scala 257:74] + node _T_993 = xor(_T_992, _T_976) @[el2_lib.scala 257:74] + node _T_994 = xor(_T_993, _T_977) @[el2_lib.scala 257:74] + node _T_995 = xor(_T_994, _T_978) @[el2_lib.scala 257:74] + node _T_996 = xor(_T_995, _T_979) @[el2_lib.scala 257:74] + node _T_997 = xor(_T_996, _T_980) @[el2_lib.scala 257:74] + node _T_998 = xor(_T_997, _T_981) @[el2_lib.scala 257:74] + node _T_999 = xor(_T_998, _T_982) @[el2_lib.scala 257:74] + node _T_1000 = xor(_T_999, _T_983) @[el2_lib.scala 257:74] + node _T_1001 = xor(_T_1000, _T_984) @[el2_lib.scala 257:74] + node _T_1002 = xor(_T_1001, _T_985) @[el2_lib.scala 257:74] + node _T_1003 = xor(_T_1002, _T_986) @[el2_lib.scala 257:74] + node _T_1004 = xor(_T_1003, _T_987) @[el2_lib.scala 257:74] + node _T_1005 = xor(_T_1004, _T_988) @[el2_lib.scala 257:74] + node _T_1006 = xor(_T_1005, _T_989) @[el2_lib.scala 257:74] + node _T_1007 = xor(_T_1006, _T_990) @[el2_lib.scala 257:74] + node _T_1008 = bits(dccm_wdata_hi_any, 1, 1) @[el2_lib.scala 257:58] + node _T_1009 = bits(dccm_wdata_hi_any, 2, 2) @[el2_lib.scala 257:58] + node _T_1010 = bits(dccm_wdata_hi_any, 3, 3) @[el2_lib.scala 257:58] + node _T_1011 = bits(dccm_wdata_hi_any, 7, 7) @[el2_lib.scala 257:58] + node _T_1012 = bits(dccm_wdata_hi_any, 8, 8) @[el2_lib.scala 257:58] + node _T_1013 = bits(dccm_wdata_hi_any, 9, 9) @[el2_lib.scala 257:58] + node _T_1014 = bits(dccm_wdata_hi_any, 10, 10) @[el2_lib.scala 257:58] + node _T_1015 = bits(dccm_wdata_hi_any, 14, 14) @[el2_lib.scala 257:58] + node _T_1016 = bits(dccm_wdata_hi_any, 15, 15) @[el2_lib.scala 257:58] + node _T_1017 = bits(dccm_wdata_hi_any, 16, 16) @[el2_lib.scala 257:58] + node _T_1018 = bits(dccm_wdata_hi_any, 17, 17) @[el2_lib.scala 257:58] + node _T_1019 = bits(dccm_wdata_hi_any, 22, 22) @[el2_lib.scala 257:58] + node _T_1020 = bits(dccm_wdata_hi_any, 23, 23) @[el2_lib.scala 257:58] + node _T_1021 = bits(dccm_wdata_hi_any, 24, 24) @[el2_lib.scala 257:58] + node _T_1022 = bits(dccm_wdata_hi_any, 25, 25) @[el2_lib.scala 257:58] + node _T_1023 = bits(dccm_wdata_hi_any, 29, 29) @[el2_lib.scala 257:58] + node _T_1024 = bits(dccm_wdata_hi_any, 30, 30) @[el2_lib.scala 257:58] + node _T_1025 = bits(dccm_wdata_hi_any, 31, 31) @[el2_lib.scala 257:58] + node _T_1026 = xor(_T_1008, _T_1009) @[el2_lib.scala 257:74] + node _T_1027 = xor(_T_1026, _T_1010) @[el2_lib.scala 257:74] + node _T_1028 = xor(_T_1027, _T_1011) @[el2_lib.scala 257:74] + node _T_1029 = xor(_T_1028, _T_1012) @[el2_lib.scala 257:74] + node _T_1030 = xor(_T_1029, _T_1013) @[el2_lib.scala 257:74] + node _T_1031 = xor(_T_1030, _T_1014) @[el2_lib.scala 257:74] + node _T_1032 = xor(_T_1031, _T_1015) @[el2_lib.scala 257:74] + node _T_1033 = xor(_T_1032, _T_1016) @[el2_lib.scala 257:74] + node _T_1034 = xor(_T_1033, _T_1017) @[el2_lib.scala 257:74] + node _T_1035 = xor(_T_1034, _T_1018) @[el2_lib.scala 257:74] + node _T_1036 = xor(_T_1035, _T_1019) @[el2_lib.scala 257:74] + node _T_1037 = xor(_T_1036, _T_1020) @[el2_lib.scala 257:74] + node _T_1038 = xor(_T_1037, _T_1021) @[el2_lib.scala 257:74] + node _T_1039 = xor(_T_1038, _T_1022) @[el2_lib.scala 257:74] + node _T_1040 = xor(_T_1039, _T_1023) @[el2_lib.scala 257:74] + node _T_1041 = xor(_T_1040, _T_1024) @[el2_lib.scala 257:74] + node _T_1042 = xor(_T_1041, _T_1025) @[el2_lib.scala 257:74] + node _T_1043 = bits(dccm_wdata_hi_any, 4, 4) @[el2_lib.scala 257:58] + node _T_1044 = bits(dccm_wdata_hi_any, 5, 5) @[el2_lib.scala 257:58] + node _T_1045 = bits(dccm_wdata_hi_any, 6, 6) @[el2_lib.scala 257:58] + node _T_1046 = bits(dccm_wdata_hi_any, 7, 7) @[el2_lib.scala 257:58] + node _T_1047 = bits(dccm_wdata_hi_any, 8, 8) @[el2_lib.scala 257:58] + node _T_1048 = bits(dccm_wdata_hi_any, 9, 9) @[el2_lib.scala 257:58] + node _T_1049 = bits(dccm_wdata_hi_any, 10, 10) @[el2_lib.scala 257:58] + node _T_1050 = bits(dccm_wdata_hi_any, 18, 18) @[el2_lib.scala 257:58] + node _T_1051 = bits(dccm_wdata_hi_any, 19, 19) @[el2_lib.scala 257:58] + node _T_1052 = bits(dccm_wdata_hi_any, 20, 20) @[el2_lib.scala 257:58] + node _T_1053 = bits(dccm_wdata_hi_any, 21, 21) @[el2_lib.scala 257:58] + node _T_1054 = bits(dccm_wdata_hi_any, 22, 22) @[el2_lib.scala 257:58] + node _T_1055 = bits(dccm_wdata_hi_any, 23, 23) @[el2_lib.scala 257:58] + node _T_1056 = bits(dccm_wdata_hi_any, 24, 24) @[el2_lib.scala 257:58] + node _T_1057 = bits(dccm_wdata_hi_any, 25, 25) @[el2_lib.scala 257:58] + node _T_1058 = xor(_T_1043, _T_1044) @[el2_lib.scala 257:74] + node _T_1059 = xor(_T_1058, _T_1045) @[el2_lib.scala 257:74] + node _T_1060 = xor(_T_1059, _T_1046) @[el2_lib.scala 257:74] + node _T_1061 = xor(_T_1060, _T_1047) @[el2_lib.scala 257:74] + node _T_1062 = xor(_T_1061, _T_1048) @[el2_lib.scala 257:74] + node _T_1063 = xor(_T_1062, _T_1049) @[el2_lib.scala 257:74] + node _T_1064 = xor(_T_1063, _T_1050) @[el2_lib.scala 257:74] + node _T_1065 = xor(_T_1064, _T_1051) @[el2_lib.scala 257:74] + node _T_1066 = xor(_T_1065, _T_1052) @[el2_lib.scala 257:74] + node _T_1067 = xor(_T_1066, _T_1053) @[el2_lib.scala 257:74] + node _T_1068 = xor(_T_1067, _T_1054) @[el2_lib.scala 257:74] + node _T_1069 = xor(_T_1068, _T_1055) @[el2_lib.scala 257:74] + node _T_1070 = xor(_T_1069, _T_1056) @[el2_lib.scala 257:74] + node _T_1071 = xor(_T_1070, _T_1057) @[el2_lib.scala 257:74] + node _T_1072 = bits(dccm_wdata_hi_any, 11, 11) @[el2_lib.scala 257:58] + node _T_1073 = bits(dccm_wdata_hi_any, 12, 12) @[el2_lib.scala 257:58] + node _T_1074 = bits(dccm_wdata_hi_any, 13, 13) @[el2_lib.scala 257:58] + node _T_1075 = bits(dccm_wdata_hi_any, 14, 14) @[el2_lib.scala 257:58] + node _T_1076 = bits(dccm_wdata_hi_any, 15, 15) @[el2_lib.scala 257:58] + node _T_1077 = bits(dccm_wdata_hi_any, 16, 16) @[el2_lib.scala 257:58] + node _T_1078 = bits(dccm_wdata_hi_any, 17, 17) @[el2_lib.scala 257:58] + node _T_1079 = bits(dccm_wdata_hi_any, 18, 18) @[el2_lib.scala 257:58] + node _T_1080 = bits(dccm_wdata_hi_any, 19, 19) @[el2_lib.scala 257:58] + node _T_1081 = bits(dccm_wdata_hi_any, 20, 20) @[el2_lib.scala 257:58] + node _T_1082 = bits(dccm_wdata_hi_any, 21, 21) @[el2_lib.scala 257:58] + node _T_1083 = bits(dccm_wdata_hi_any, 22, 22) @[el2_lib.scala 257:58] + node _T_1084 = bits(dccm_wdata_hi_any, 23, 23) @[el2_lib.scala 257:58] + node _T_1085 = bits(dccm_wdata_hi_any, 24, 24) @[el2_lib.scala 257:58] + node _T_1086 = bits(dccm_wdata_hi_any, 25, 25) @[el2_lib.scala 257:58] + node _T_1087 = xor(_T_1072, _T_1073) @[el2_lib.scala 257:74] + node _T_1088 = xor(_T_1087, _T_1074) @[el2_lib.scala 257:74] + node _T_1089 = xor(_T_1088, _T_1075) @[el2_lib.scala 257:74] + node _T_1090 = xor(_T_1089, _T_1076) @[el2_lib.scala 257:74] + node _T_1091 = xor(_T_1090, _T_1077) @[el2_lib.scala 257:74] + node _T_1092 = xor(_T_1091, _T_1078) @[el2_lib.scala 257:74] + node _T_1093 = xor(_T_1092, _T_1079) @[el2_lib.scala 257:74] + node _T_1094 = xor(_T_1093, _T_1080) @[el2_lib.scala 257:74] + node _T_1095 = xor(_T_1094, _T_1081) @[el2_lib.scala 257:74] + node _T_1096 = xor(_T_1095, _T_1082) @[el2_lib.scala 257:74] + node _T_1097 = xor(_T_1096, _T_1083) @[el2_lib.scala 257:74] + node _T_1098 = xor(_T_1097, _T_1084) @[el2_lib.scala 257:74] + node _T_1099 = xor(_T_1098, _T_1085) @[el2_lib.scala 257:74] + node _T_1100 = xor(_T_1099, _T_1086) @[el2_lib.scala 257:74] + node _T_1101 = bits(dccm_wdata_hi_any, 26, 26) @[el2_lib.scala 257:58] + node _T_1102 = bits(dccm_wdata_hi_any, 27, 27) @[el2_lib.scala 257:58] + node _T_1103 = bits(dccm_wdata_hi_any, 28, 28) @[el2_lib.scala 257:58] + node _T_1104 = bits(dccm_wdata_hi_any, 29, 29) @[el2_lib.scala 257:58] + node _T_1105 = bits(dccm_wdata_hi_any, 30, 30) @[el2_lib.scala 257:58] + node _T_1106 = bits(dccm_wdata_hi_any, 31, 31) @[el2_lib.scala 257:58] + node _T_1107 = xor(_T_1101, _T_1102) @[el2_lib.scala 257:74] + node _T_1108 = xor(_T_1107, _T_1103) @[el2_lib.scala 257:74] + node _T_1109 = xor(_T_1108, _T_1104) @[el2_lib.scala 257:74] + node _T_1110 = xor(_T_1109, _T_1105) @[el2_lib.scala 257:74] + node _T_1111 = xor(_T_1110, _T_1106) @[el2_lib.scala 257:74] + node _T_1112 = cat(_T_1042, _T_1007) @[Cat.scala 29:58] + node _T_1113 = cat(_T_1112, _T_972) @[Cat.scala 29:58] + node _T_1114 = cat(_T_1111, _T_1100) @[Cat.scala 29:58] + node _T_1115 = cat(_T_1114, _T_1071) @[Cat.scala 29:58] + node _T_1116 = cat(_T_1115, _T_1113) @[Cat.scala 29:58] + node _T_1117 = xorr(dccm_wdata_hi_any) @[el2_lib.scala 265:13] + node _T_1118 = xorr(_T_1116) @[el2_lib.scala 265:23] + node _T_1119 = xor(_T_1117, _T_1118) @[el2_lib.scala 265:18] + node dccm_wdata_ecc_hi_any = cat(_T_1119, _T_1116) @[Cat.scala 29:58] + when UInt<1>("h00") : @[el2_lsu_ecc.scala 103:30] + node _T_1120 = bits(io.lsu_addr_r, 2, 2) @[el2_lsu_ecc.scala 104:33] + node _T_1121 = bits(io.end_addr_r, 2, 2) @[el2_lsu_ecc.scala 104:54] + node _T_1122 = neq(_T_1120, _T_1121) @[el2_lsu_ecc.scala 104:37] + ldst_dual_r <= _T_1122 @[el2_lsu_ecc.scala 104:17] + node _T_1123 = or(io.lsu_pkt_r.load, io.lsu_pkt_r.store) @[el2_lsu_ecc.scala 105:58] + node _T_1124 = and(io.lsu_pkt_r.valid, _T_1123) @[el2_lsu_ecc.scala 105:37] + node _T_1125 = and(_T_1124, io.addr_in_dccm_r) @[el2_lsu_ecc.scala 105:80] + node _T_1126 = and(_T_1125, io.lsu_dccm_rden_r) @[el2_lsu_ecc.scala 105:100] + is_ldst_r <= _T_1126 @[el2_lsu_ecc.scala 105:15] + node _T_1127 = eq(io.dec_tlu_core_ecc_disable, UInt<1>("h00")) @[el2_lsu_ecc.scala 106:33] + node _T_1128 = and(is_ldst_r, _T_1127) @[el2_lsu_ecc.scala 106:31] + is_ldst_lo_r <= _T_1128 @[el2_lsu_ecc.scala 106:18] + node _T_1129 = or(ldst_dual_r, io.lsu_pkt_r.dma) @[el2_lsu_ecc.scala 107:46] + node _T_1130 = and(is_ldst_r, _T_1129) @[el2_lsu_ecc.scala 107:31] + node _T_1131 = eq(io.dec_tlu_core_ecc_disable, UInt<1>("h00")) @[el2_lsu_ecc.scala 107:68] + node _T_1132 = and(_T_1130, _T_1131) @[el2_lsu_ecc.scala 107:66] + is_ldst_hi_r <= _T_1132 @[el2_lsu_ecc.scala 107:18] + is_ldst_hi_any <= is_ldst_hi_r @[el2_lsu_ecc.scala 108:21] + dccm_rdata_hi_any <= io.dccm_rdata_hi_r @[el2_lsu_ecc.scala 109:24] + dccm_data_ecc_hi_any <= io.dccm_data_ecc_hi_r @[el2_lsu_ecc.scala 110:26] + is_ldst_lo_any <= is_ldst_lo_r @[el2_lsu_ecc.scala 111:20] + dccm_rdata_lo_any <= io.dccm_rdata_lo_r @[el2_lsu_ecc.scala 112:25] + dccm_data_ecc_lo_any <= io.dccm_data_ecc_lo_r @[el2_lsu_ecc.scala 113:26] + io.sec_data_hi_r <= sec_data_hi_any @[el2_lsu_ecc.scala 114:22] + io.single_ecc_error_hi_r <= single_ecc_error_hi_any @[el2_lsu_ecc.scala 115:31] + double_ecc_error_hi_r <= double_ecc_error_hi_any @[el2_lsu_ecc.scala 116:28] + io.sec_data_lo_r <= sec_data_lo_any @[el2_lsu_ecc.scala 117:25] + io.single_ecc_error_lo_r <= single_ecc_error_lo_any @[el2_lsu_ecc.scala 118:31] + double_ecc_error_lo_r <= double_ecc_error_lo_any @[el2_lsu_ecc.scala 119:28] + node _T_1133 = or(io.single_ecc_error_hi_r, io.single_ecc_error_lo_r) @[el2_lsu_ecc.scala 120:59] + io.lsu_single_ecc_error_r <= _T_1133 @[el2_lsu_ecc.scala 120:31] + node _T_1134 = or(double_ecc_error_hi_r, double_ecc_error_lo_r) @[el2_lsu_ecc.scala 121:56] + io.lsu_double_ecc_error_r <= _T_1134 @[el2_lsu_ecc.scala 121:31] + skip @[el2_lsu_ecc.scala 103:30] + else : @[el2_lsu_ecc.scala 123:16] + node _T_1135 = bits(io.lsu_addr_m, 2, 2) @[el2_lsu_ecc.scala 124:35] + node _T_1136 = bits(io.end_addr_m, 2, 2) @[el2_lsu_ecc.scala 124:56] + node _T_1137 = neq(_T_1135, _T_1136) @[el2_lsu_ecc.scala 124:39] + ldst_dual_m <= _T_1137 @[el2_lsu_ecc.scala 124:19] + node _T_1138 = or(io.lsu_pkt_m.load, io.lsu_pkt_m.store) @[el2_lsu_ecc.scala 125:60] + node _T_1139 = and(io.lsu_pkt_m.valid, _T_1138) @[el2_lsu_ecc.scala 125:39] + node _T_1140 = and(_T_1139, io.addr_in_dccm_m) @[el2_lsu_ecc.scala 125:82] + node _T_1141 = and(_T_1140, io.lsu_dccm_rden_m) @[el2_lsu_ecc.scala 125:102] + is_ldst_m <= _T_1141 @[el2_lsu_ecc.scala 125:17] + node _T_1142 = eq(io.dec_tlu_core_ecc_disable, UInt<1>("h00")) @[el2_lsu_ecc.scala 126:35] + node _T_1143 = and(is_ldst_m, _T_1142) @[el2_lsu_ecc.scala 126:33] + is_ldst_lo_m <= _T_1143 @[el2_lsu_ecc.scala 126:20] + node _T_1144 = or(ldst_dual_m, io.lsu_pkt_m.dma) @[el2_lsu_ecc.scala 127:48] + node _T_1145 = and(is_ldst_m, _T_1144) @[el2_lsu_ecc.scala 127:33] + node _T_1146 = eq(io.dec_tlu_core_ecc_disable, UInt<1>("h00")) @[el2_lsu_ecc.scala 127:70] + node _T_1147 = and(_T_1145, _T_1146) @[el2_lsu_ecc.scala 127:68] + is_ldst_hi_m <= _T_1147 @[el2_lsu_ecc.scala 127:20] + is_ldst_hi_any <= is_ldst_hi_m @[el2_lsu_ecc.scala 128:23] + dccm_rdata_hi_any <= io.dccm_rdata_hi_m @[el2_lsu_ecc.scala 129:26] + dccm_data_ecc_hi_any <= io.dccm_data_ecc_hi_m @[el2_lsu_ecc.scala 130:28] + is_ldst_lo_any <= is_ldst_lo_m @[el2_lsu_ecc.scala 131:22] + dccm_rdata_lo_any <= io.dccm_rdata_lo_m @[el2_lsu_ecc.scala 132:27] + dccm_data_ecc_lo_any <= io.dccm_data_ecc_lo_m @[el2_lsu_ecc.scala 133:28] + io.sec_data_hi_m <= sec_data_hi_any @[el2_lsu_ecc.scala 134:27] + double_ecc_error_hi_m <= double_ecc_error_hi_any @[el2_lsu_ecc.scala 135:30] + io.sec_data_lo_m <= sec_data_lo_any @[el2_lsu_ecc.scala 136:27] + double_ecc_error_lo_m <= double_ecc_error_lo_any @[el2_lsu_ecc.scala 137:30] + node _T_1148 = or(single_ecc_error_hi_any, single_ecc_error_lo_any) @[el2_lsu_ecc.scala 138:60] + io.lsu_single_ecc_error_m <= _T_1148 @[el2_lsu_ecc.scala 138:33] + node _T_1149 = or(double_ecc_error_hi_m, double_ecc_error_lo_m) @[el2_lsu_ecc.scala 139:58] + io.lsu_double_ecc_error_m <= _T_1149 @[el2_lsu_ecc.scala 139:33] + reg _T_1150 : UInt<1>, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_ecc.scala 141:72] + _T_1150 <= io.lsu_single_ecc_error_m @[el2_lsu_ecc.scala 141:72] + io.lsu_single_ecc_error_r <= _T_1150 @[el2_lsu_ecc.scala 141:62] + reg _T_1151 : UInt<1>, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_ecc.scala 142:72] + _T_1151 <= io.lsu_double_ecc_error_m @[el2_lsu_ecc.scala 142:72] + io.lsu_double_ecc_error_r <= _T_1151 @[el2_lsu_ecc.scala 142:62] + reg _T_1152 : UInt, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_ecc.scala 143:72] + _T_1152 <= single_ecc_error_lo_any @[el2_lsu_ecc.scala 143:72] + io.single_ecc_error_lo_r <= _T_1152 @[el2_lsu_ecc.scala 143:62] + reg _T_1153 : UInt, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_ecc.scala 144:72] + _T_1153 <= single_ecc_error_hi_any @[el2_lsu_ecc.scala 144:72] + io.single_ecc_error_hi_r <= _T_1153 @[el2_lsu_ecc.scala 144:62] + reg _T_1154 : UInt, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_ecc.scala 145:72] + _T_1154 <= io.sec_data_hi_m @[el2_lsu_ecc.scala 145:72] + io.sec_data_hi_r <= _T_1154 @[el2_lsu_ecc.scala 145:62] + reg _T_1155 : UInt, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_ecc.scala 146:72] + _T_1155 <= io.sec_data_lo_m @[el2_lsu_ecc.scala 146:72] + io.sec_data_lo_r <= _T_1155 @[el2_lsu_ecc.scala 146:62] + skip @[el2_lsu_ecc.scala 123:16] + node _T_1156 = bits(io.ld_single_ecc_error_r_ff, 0, 0) @[el2_lsu_ecc.scala 149:56] + node _T_1157 = bits(io.dma_dccm_wen, 0, 0) @[el2_lsu_ecc.scala 149:104] + node _T_1158 = mux(_T_1157, io.dma_dccm_wdata_lo, io.stbuf_data_any) @[el2_lsu_ecc.scala 149:87] + node _T_1159 = mux(_T_1156, io.sec_data_lo_r_ff, _T_1158) @[el2_lsu_ecc.scala 149:27] + dccm_wdata_lo_any <= _T_1159 @[el2_lsu_ecc.scala 149:21] + node _T_1160 = bits(io.ld_single_ecc_error_r_ff, 0, 0) @[el2_lsu_ecc.scala 150:56] + node _T_1161 = bits(io.dma_dccm_wen, 0, 0) @[el2_lsu_ecc.scala 150:104] + node _T_1162 = mux(_T_1161, io.dma_dccm_wdata_hi, io.stbuf_data_any) @[el2_lsu_ecc.scala 150:87] + node _T_1163 = mux(_T_1160, io.sec_data_hi_r_ff, _T_1162) @[el2_lsu_ecc.scala 150:27] + dccm_wdata_hi_any <= _T_1163 @[el2_lsu_ecc.scala 150:21] + io.sec_data_ecc_hi_r_ff <= dccm_wdata_ecc_hi_any @[el2_lsu_ecc.scala 151:28] + io.sec_data_ecc_lo_r_ff <= dccm_wdata_ecc_lo_any @[el2_lsu_ecc.scala 152:28] + io.stbuf_ecc_any <= dccm_wdata_ecc_lo_any @[el2_lsu_ecc.scala 153:28] + io.dma_dccm_wdata_ecc_hi <= dccm_wdata_ecc_hi_any @[el2_lsu_ecc.scala 154:28] + io.dma_dccm_wdata_ecc_lo <= dccm_wdata_ecc_lo_any @[el2_lsu_ecc.scala 155:28] + inst rvclkhdr of rvclkhdr_10 @[el2_lib.scala 506:23] + rvclkhdr.clock <= clock + rvclkhdr.reset <= reset + rvclkhdr.io.clk <= clock @[el2_lib.scala 508:18] + rvclkhdr.io.en <= io.ld_single_ecc_error_r @[el2_lib.scala 509:17] + rvclkhdr.io.scan_mode <= io.scan_mode @[el2_lib.scala 510:24] + reg _T_1164 : UInt, rvclkhdr.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 512:16] + _T_1164 <= io.sec_data_hi_r @[el2_lib.scala 512:16] + io.sec_data_hi_r_ff <= _T_1164 @[el2_lsu_ecc.scala 157:23] + inst rvclkhdr_1 of rvclkhdr_11 @[el2_lib.scala 506:23] + rvclkhdr_1.clock <= clock + rvclkhdr_1.reset <= reset + rvclkhdr_1.io.clk <= clock @[el2_lib.scala 508:18] + rvclkhdr_1.io.en <= io.ld_single_ecc_error_r @[el2_lib.scala 509:17] + rvclkhdr_1.io.scan_mode <= io.scan_mode @[el2_lib.scala 510:24] + reg _T_1165 : UInt, rvclkhdr_1.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 512:16] + _T_1165 <= io.sec_data_lo_r @[el2_lib.scala 512:16] + io.sec_data_lo_r_ff <= _T_1165 @[el2_lsu_ecc.scala 158:23] + + module el2_lsu_trigger : + input clock : Clock + input reset : AsyncReset + output io : {flip trigger_pkt_any : {select : UInt<1>, match_ : UInt<1>, store : UInt<1>, load : UInt<1>, execute : UInt<1>, m : UInt<1>, tdata2 : UInt<32>}[4], flip lsu_pkt_m : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip lsu_addr_m : UInt<32>, flip store_data_m : UInt<32>, lsu_trigger_match_m : UInt<4>} + + node _T = bits(io.lsu_pkt_m.word, 0, 0) @[Bitwise.scala 72:15] + node _T_1 = mux(_T, UInt<16>("h0ffff"), UInt<16>("h00")) @[Bitwise.scala 72:12] + node _T_2 = bits(io.store_data_m, 31, 16) @[el2_lsu_trigger.scala 16:78] + node _T_3 = and(_T_1, _T_2) @[el2_lsu_trigger.scala 16:61] + node _T_4 = or(io.lsu_pkt_m.half, io.lsu_pkt_m.word) @[el2_lsu_trigger.scala 16:114] + node _T_5 = bits(_T_4, 0, 0) @[Bitwise.scala 72:15] + node _T_6 = mux(_T_5, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_7 = bits(io.store_data_m, 15, 8) @[el2_lsu_trigger.scala 16:153] + node _T_8 = and(_T_6, _T_7) @[el2_lsu_trigger.scala 16:136] + node _T_9 = bits(io.store_data_m, 7, 0) @[el2_lsu_trigger.scala 16:177] + node _T_10 = cat(_T_3, _T_8) @[Cat.scala 29:58] + node store_data_trigger_m = cat(_T_10, _T_9) @[Cat.scala 29:58] + node _T_11 = bits(io.trigger_pkt_any[0].select, 0, 0) @[el2_lsu_trigger.scala 17:83] + node _T_12 = eq(_T_11, UInt<1>("h00")) @[el2_lsu_trigger.scala 17:53] + node _T_13 = and(io.trigger_pkt_any[0].select, io.trigger_pkt_any[0].store) @[el2_lsu_trigger.scala 17:136] + node _T_14 = bits(_T_13, 0, 0) @[el2_lsu_trigger.scala 17:167] + node _T_15 = mux(_T_12, io.lsu_addr_m, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_16 = mux(_T_14, store_data_trigger_m, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_17 = or(_T_15, _T_16) @[Mux.scala 27:72] + wire lsu_match_data_0 : UInt<32> @[Mux.scala 27:72] + lsu_match_data_0 <= _T_17 @[Mux.scala 27:72] + node _T_18 = bits(io.trigger_pkt_any[1].select, 0, 0) @[el2_lsu_trigger.scala 17:83] + node _T_19 = eq(_T_18, UInt<1>("h00")) @[el2_lsu_trigger.scala 17:53] + node _T_20 = and(io.trigger_pkt_any[1].select, io.trigger_pkt_any[1].store) @[el2_lsu_trigger.scala 17:136] + node _T_21 = bits(_T_20, 0, 0) @[el2_lsu_trigger.scala 17:167] + node _T_22 = mux(_T_19, io.lsu_addr_m, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_23 = mux(_T_21, store_data_trigger_m, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_24 = or(_T_22, _T_23) @[Mux.scala 27:72] + wire lsu_match_data_1 : UInt<32> @[Mux.scala 27:72] + lsu_match_data_1 <= _T_24 @[Mux.scala 27:72] + node _T_25 = bits(io.trigger_pkt_any[2].select, 0, 0) @[el2_lsu_trigger.scala 17:83] + node _T_26 = eq(_T_25, UInt<1>("h00")) @[el2_lsu_trigger.scala 17:53] + node _T_27 = and(io.trigger_pkt_any[2].select, io.trigger_pkt_any[2].store) @[el2_lsu_trigger.scala 17:136] + node _T_28 = bits(_T_27, 0, 0) @[el2_lsu_trigger.scala 17:167] + node _T_29 = mux(_T_26, io.lsu_addr_m, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_30 = mux(_T_28, store_data_trigger_m, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_31 = or(_T_29, _T_30) @[Mux.scala 27:72] + wire lsu_match_data_2 : UInt<32> @[Mux.scala 27:72] + lsu_match_data_2 <= _T_31 @[Mux.scala 27:72] + node _T_32 = bits(io.trigger_pkt_any[3].select, 0, 0) @[el2_lsu_trigger.scala 17:83] + node _T_33 = eq(_T_32, UInt<1>("h00")) @[el2_lsu_trigger.scala 17:53] + node _T_34 = and(io.trigger_pkt_any[3].select, io.trigger_pkt_any[3].store) @[el2_lsu_trigger.scala 17:136] + node _T_35 = bits(_T_34, 0, 0) @[el2_lsu_trigger.scala 17:167] + node _T_36 = mux(_T_33, io.lsu_addr_m, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_37 = mux(_T_35, store_data_trigger_m, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_38 = or(_T_36, _T_37) @[Mux.scala 27:72] + wire lsu_match_data_3 : UInt<32> @[Mux.scala 27:72] + lsu_match_data_3 <= _T_38 @[Mux.scala 27:72] + node _T_39 = eq(io.lsu_pkt_m.dma, UInt<1>("h00")) @[el2_lsu_trigger.scala 18:71] + node _T_40 = and(io.lsu_pkt_m.valid, _T_39) @[el2_lsu_trigger.scala 18:69] + node _T_41 = and(io.trigger_pkt_any[0].store, io.lsu_pkt_m.store) @[el2_lsu_trigger.scala 18:121] + node _T_42 = and(io.trigger_pkt_any[0].load, io.lsu_pkt_m.load) @[el2_lsu_trigger.scala 19:33] + node _T_43 = eq(io.trigger_pkt_any[0].select, UInt<1>("h00")) @[el2_lsu_trigger.scala 19:55] + node _T_44 = and(_T_42, _T_43) @[el2_lsu_trigger.scala 19:53] + node _T_45 = or(_T_41, _T_44) @[el2_lsu_trigger.scala 18:142] + node _T_46 = and(_T_40, _T_45) @[el2_lsu_trigger.scala 18:89] + node _T_47 = bits(io.trigger_pkt_any[0].match_, 0, 0) @[el2_lsu_trigger.scala 20:104] + wire _T_48 : UInt<1>[32] @[el2_lib.scala 238:24] + node _T_49 = andr(io.trigger_pkt_any[0].tdata2) @[el2_lib.scala 239:45] + node _T_50 = not(_T_49) @[el2_lib.scala 239:39] + node _T_51 = and(_T_47, _T_50) @[el2_lib.scala 239:37] + node _T_52 = bits(io.trigger_pkt_any[0].tdata2, 0, 0) @[el2_lib.scala 240:48] + node _T_53 = bits(lsu_match_data_0, 0, 0) @[el2_lib.scala 240:60] + node _T_54 = eq(_T_52, _T_53) @[el2_lib.scala 240:52] + node _T_55 = or(_T_51, _T_54) @[el2_lib.scala 240:41] + _T_48[0] <= _T_55 @[el2_lib.scala 240:18] + node _T_56 = bits(io.trigger_pkt_any[0].tdata2, 0, 0) @[el2_lib.scala 242:28] + node _T_57 = andr(_T_56) @[el2_lib.scala 242:36] + node _T_58 = and(_T_57, _T_51) @[el2_lib.scala 242:41] + node _T_59 = bits(io.trigger_pkt_any[0].tdata2, 1, 1) @[el2_lib.scala 242:74] + node _T_60 = bits(lsu_match_data_0, 1, 1) @[el2_lib.scala 242:86] + node _T_61 = eq(_T_59, _T_60) @[el2_lib.scala 242:78] + node _T_62 = mux(_T_58, UInt<1>("h01"), _T_61) @[el2_lib.scala 242:23] + _T_48[1] <= _T_62 @[el2_lib.scala 242:17] + node _T_63 = bits(io.trigger_pkt_any[0].tdata2, 1, 0) @[el2_lib.scala 242:28] + node _T_64 = andr(_T_63) @[el2_lib.scala 242:36] + node _T_65 = and(_T_64, _T_51) @[el2_lib.scala 242:41] + node _T_66 = bits(io.trigger_pkt_any[0].tdata2, 2, 2) @[el2_lib.scala 242:74] + node _T_67 = bits(lsu_match_data_0, 2, 2) @[el2_lib.scala 242:86] + node _T_68 = eq(_T_66, _T_67) @[el2_lib.scala 242:78] + node _T_69 = mux(_T_65, UInt<1>("h01"), _T_68) @[el2_lib.scala 242:23] + _T_48[2] <= _T_69 @[el2_lib.scala 242:17] + node _T_70 = bits(io.trigger_pkt_any[0].tdata2, 2, 0) @[el2_lib.scala 242:28] + node _T_71 = andr(_T_70) @[el2_lib.scala 242:36] + node _T_72 = and(_T_71, _T_51) @[el2_lib.scala 242:41] + node _T_73 = bits(io.trigger_pkt_any[0].tdata2, 3, 3) @[el2_lib.scala 242:74] + node _T_74 = bits(lsu_match_data_0, 3, 3) @[el2_lib.scala 242:86] + node _T_75 = eq(_T_73, _T_74) @[el2_lib.scala 242:78] + node _T_76 = mux(_T_72, UInt<1>("h01"), _T_75) @[el2_lib.scala 242:23] + _T_48[3] <= _T_76 @[el2_lib.scala 242:17] + node _T_77 = bits(io.trigger_pkt_any[0].tdata2, 3, 0) @[el2_lib.scala 242:28] + node _T_78 = andr(_T_77) @[el2_lib.scala 242:36] + node _T_79 = and(_T_78, _T_51) @[el2_lib.scala 242:41] + node _T_80 = bits(io.trigger_pkt_any[0].tdata2, 4, 4) @[el2_lib.scala 242:74] + node _T_81 = bits(lsu_match_data_0, 4, 4) @[el2_lib.scala 242:86] + node _T_82 = eq(_T_80, _T_81) @[el2_lib.scala 242:78] + node _T_83 = mux(_T_79, UInt<1>("h01"), _T_82) @[el2_lib.scala 242:23] + _T_48[4] <= _T_83 @[el2_lib.scala 242:17] + node _T_84 = bits(io.trigger_pkt_any[0].tdata2, 4, 0) @[el2_lib.scala 242:28] + node _T_85 = andr(_T_84) @[el2_lib.scala 242:36] + node _T_86 = and(_T_85, _T_51) @[el2_lib.scala 242:41] + node _T_87 = bits(io.trigger_pkt_any[0].tdata2, 5, 5) @[el2_lib.scala 242:74] + node _T_88 = bits(lsu_match_data_0, 5, 5) @[el2_lib.scala 242:86] + node _T_89 = eq(_T_87, _T_88) @[el2_lib.scala 242:78] + node _T_90 = mux(_T_86, UInt<1>("h01"), _T_89) @[el2_lib.scala 242:23] + _T_48[5] <= _T_90 @[el2_lib.scala 242:17] + node _T_91 = bits(io.trigger_pkt_any[0].tdata2, 5, 0) @[el2_lib.scala 242:28] + node _T_92 = andr(_T_91) @[el2_lib.scala 242:36] + node _T_93 = and(_T_92, _T_51) @[el2_lib.scala 242:41] + node _T_94 = bits(io.trigger_pkt_any[0].tdata2, 6, 6) @[el2_lib.scala 242:74] + node _T_95 = bits(lsu_match_data_0, 6, 6) @[el2_lib.scala 242:86] + node _T_96 = eq(_T_94, _T_95) @[el2_lib.scala 242:78] + node _T_97 = mux(_T_93, UInt<1>("h01"), _T_96) @[el2_lib.scala 242:23] + _T_48[6] <= _T_97 @[el2_lib.scala 242:17] + node _T_98 = bits(io.trigger_pkt_any[0].tdata2, 6, 0) @[el2_lib.scala 242:28] + node _T_99 = andr(_T_98) @[el2_lib.scala 242:36] + node _T_100 = and(_T_99, _T_51) @[el2_lib.scala 242:41] + node _T_101 = bits(io.trigger_pkt_any[0].tdata2, 7, 7) @[el2_lib.scala 242:74] + node _T_102 = bits(lsu_match_data_0, 7, 7) @[el2_lib.scala 242:86] + node _T_103 = eq(_T_101, _T_102) @[el2_lib.scala 242:78] + node _T_104 = mux(_T_100, UInt<1>("h01"), _T_103) @[el2_lib.scala 242:23] + _T_48[7] <= _T_104 @[el2_lib.scala 242:17] + node _T_105 = bits(io.trigger_pkt_any[0].tdata2, 7, 0) @[el2_lib.scala 242:28] + node _T_106 = andr(_T_105) @[el2_lib.scala 242:36] + node _T_107 = and(_T_106, _T_51) @[el2_lib.scala 242:41] + node _T_108 = bits(io.trigger_pkt_any[0].tdata2, 8, 8) @[el2_lib.scala 242:74] + node _T_109 = bits(lsu_match_data_0, 8, 8) @[el2_lib.scala 242:86] + node _T_110 = eq(_T_108, _T_109) @[el2_lib.scala 242:78] + node _T_111 = mux(_T_107, UInt<1>("h01"), _T_110) @[el2_lib.scala 242:23] + _T_48[8] <= _T_111 @[el2_lib.scala 242:17] + node _T_112 = bits(io.trigger_pkt_any[0].tdata2, 8, 0) @[el2_lib.scala 242:28] + node _T_113 = andr(_T_112) @[el2_lib.scala 242:36] + node _T_114 = and(_T_113, _T_51) @[el2_lib.scala 242:41] + node _T_115 = bits(io.trigger_pkt_any[0].tdata2, 9, 9) @[el2_lib.scala 242:74] + node _T_116 = bits(lsu_match_data_0, 9, 9) @[el2_lib.scala 242:86] + node _T_117 = eq(_T_115, _T_116) @[el2_lib.scala 242:78] + node _T_118 = mux(_T_114, UInt<1>("h01"), _T_117) @[el2_lib.scala 242:23] + _T_48[9] <= _T_118 @[el2_lib.scala 242:17] + node _T_119 = bits(io.trigger_pkt_any[0].tdata2, 9, 0) @[el2_lib.scala 242:28] + node _T_120 = andr(_T_119) @[el2_lib.scala 242:36] + node _T_121 = and(_T_120, _T_51) @[el2_lib.scala 242:41] + node _T_122 = bits(io.trigger_pkt_any[0].tdata2, 10, 10) @[el2_lib.scala 242:74] + node _T_123 = bits(lsu_match_data_0, 10, 10) @[el2_lib.scala 242:86] + node _T_124 = eq(_T_122, _T_123) @[el2_lib.scala 242:78] + node _T_125 = mux(_T_121, UInt<1>("h01"), _T_124) @[el2_lib.scala 242:23] + _T_48[10] <= _T_125 @[el2_lib.scala 242:17] + node _T_126 = bits(io.trigger_pkt_any[0].tdata2, 10, 0) @[el2_lib.scala 242:28] + node _T_127 = andr(_T_126) @[el2_lib.scala 242:36] + node _T_128 = and(_T_127, _T_51) @[el2_lib.scala 242:41] + node _T_129 = bits(io.trigger_pkt_any[0].tdata2, 11, 11) @[el2_lib.scala 242:74] + node _T_130 = bits(lsu_match_data_0, 11, 11) @[el2_lib.scala 242:86] + node _T_131 = eq(_T_129, _T_130) @[el2_lib.scala 242:78] + node _T_132 = mux(_T_128, UInt<1>("h01"), _T_131) @[el2_lib.scala 242:23] + _T_48[11] <= _T_132 @[el2_lib.scala 242:17] + node _T_133 = bits(io.trigger_pkt_any[0].tdata2, 11, 0) @[el2_lib.scala 242:28] + node _T_134 = andr(_T_133) @[el2_lib.scala 242:36] + node _T_135 = and(_T_134, _T_51) @[el2_lib.scala 242:41] + node _T_136 = bits(io.trigger_pkt_any[0].tdata2, 12, 12) @[el2_lib.scala 242:74] + node _T_137 = bits(lsu_match_data_0, 12, 12) @[el2_lib.scala 242:86] + node _T_138 = eq(_T_136, _T_137) @[el2_lib.scala 242:78] + node _T_139 = mux(_T_135, UInt<1>("h01"), _T_138) @[el2_lib.scala 242:23] + _T_48[12] <= _T_139 @[el2_lib.scala 242:17] + node _T_140 = bits(io.trigger_pkt_any[0].tdata2, 12, 0) @[el2_lib.scala 242:28] + node _T_141 = andr(_T_140) @[el2_lib.scala 242:36] + node _T_142 = and(_T_141, _T_51) @[el2_lib.scala 242:41] + node _T_143 = bits(io.trigger_pkt_any[0].tdata2, 13, 13) @[el2_lib.scala 242:74] + node _T_144 = bits(lsu_match_data_0, 13, 13) @[el2_lib.scala 242:86] + node _T_145 = eq(_T_143, _T_144) @[el2_lib.scala 242:78] + node _T_146 = mux(_T_142, UInt<1>("h01"), _T_145) @[el2_lib.scala 242:23] + _T_48[13] <= _T_146 @[el2_lib.scala 242:17] + node _T_147 = bits(io.trigger_pkt_any[0].tdata2, 13, 0) @[el2_lib.scala 242:28] + node _T_148 = andr(_T_147) @[el2_lib.scala 242:36] + node _T_149 = and(_T_148, _T_51) @[el2_lib.scala 242:41] + node _T_150 = bits(io.trigger_pkt_any[0].tdata2, 14, 14) @[el2_lib.scala 242:74] + node _T_151 = bits(lsu_match_data_0, 14, 14) @[el2_lib.scala 242:86] + node _T_152 = eq(_T_150, _T_151) @[el2_lib.scala 242:78] + node _T_153 = mux(_T_149, UInt<1>("h01"), _T_152) @[el2_lib.scala 242:23] + _T_48[14] <= _T_153 @[el2_lib.scala 242:17] + node _T_154 = bits(io.trigger_pkt_any[0].tdata2, 14, 0) @[el2_lib.scala 242:28] + node _T_155 = andr(_T_154) @[el2_lib.scala 242:36] + node _T_156 = and(_T_155, _T_51) @[el2_lib.scala 242:41] + node _T_157 = bits(io.trigger_pkt_any[0].tdata2, 15, 15) @[el2_lib.scala 242:74] + node _T_158 = bits(lsu_match_data_0, 15, 15) @[el2_lib.scala 242:86] + node _T_159 = eq(_T_157, _T_158) @[el2_lib.scala 242:78] + node _T_160 = mux(_T_156, UInt<1>("h01"), _T_159) @[el2_lib.scala 242:23] + _T_48[15] <= _T_160 @[el2_lib.scala 242:17] + node _T_161 = bits(io.trigger_pkt_any[0].tdata2, 15, 0) @[el2_lib.scala 242:28] + node _T_162 = andr(_T_161) @[el2_lib.scala 242:36] + node _T_163 = and(_T_162, _T_51) @[el2_lib.scala 242:41] + node _T_164 = bits(io.trigger_pkt_any[0].tdata2, 16, 16) @[el2_lib.scala 242:74] + node _T_165 = bits(lsu_match_data_0, 16, 16) @[el2_lib.scala 242:86] + node _T_166 = eq(_T_164, _T_165) @[el2_lib.scala 242:78] + node _T_167 = mux(_T_163, UInt<1>("h01"), _T_166) @[el2_lib.scala 242:23] + _T_48[16] <= _T_167 @[el2_lib.scala 242:17] + node _T_168 = bits(io.trigger_pkt_any[0].tdata2, 16, 0) @[el2_lib.scala 242:28] + node _T_169 = andr(_T_168) @[el2_lib.scala 242:36] + node _T_170 = and(_T_169, _T_51) @[el2_lib.scala 242:41] + node _T_171 = bits(io.trigger_pkt_any[0].tdata2, 17, 17) @[el2_lib.scala 242:74] + node _T_172 = bits(lsu_match_data_0, 17, 17) @[el2_lib.scala 242:86] + node _T_173 = eq(_T_171, _T_172) @[el2_lib.scala 242:78] + node _T_174 = mux(_T_170, UInt<1>("h01"), _T_173) @[el2_lib.scala 242:23] + _T_48[17] <= _T_174 @[el2_lib.scala 242:17] + node _T_175 = bits(io.trigger_pkt_any[0].tdata2, 17, 0) @[el2_lib.scala 242:28] + node _T_176 = andr(_T_175) @[el2_lib.scala 242:36] + node _T_177 = and(_T_176, _T_51) @[el2_lib.scala 242:41] + node _T_178 = bits(io.trigger_pkt_any[0].tdata2, 18, 18) @[el2_lib.scala 242:74] + node _T_179 = bits(lsu_match_data_0, 18, 18) @[el2_lib.scala 242:86] + node _T_180 = eq(_T_178, _T_179) @[el2_lib.scala 242:78] + node _T_181 = mux(_T_177, UInt<1>("h01"), _T_180) @[el2_lib.scala 242:23] + _T_48[18] <= _T_181 @[el2_lib.scala 242:17] + node _T_182 = bits(io.trigger_pkt_any[0].tdata2, 18, 0) @[el2_lib.scala 242:28] + node _T_183 = andr(_T_182) @[el2_lib.scala 242:36] + node _T_184 = and(_T_183, _T_51) @[el2_lib.scala 242:41] + node _T_185 = bits(io.trigger_pkt_any[0].tdata2, 19, 19) @[el2_lib.scala 242:74] + node _T_186 = bits(lsu_match_data_0, 19, 19) @[el2_lib.scala 242:86] + node _T_187 = eq(_T_185, _T_186) @[el2_lib.scala 242:78] + node _T_188 = mux(_T_184, UInt<1>("h01"), _T_187) @[el2_lib.scala 242:23] + _T_48[19] <= _T_188 @[el2_lib.scala 242:17] + node _T_189 = bits(io.trigger_pkt_any[0].tdata2, 19, 0) @[el2_lib.scala 242:28] + node _T_190 = andr(_T_189) @[el2_lib.scala 242:36] + node _T_191 = and(_T_190, _T_51) @[el2_lib.scala 242:41] + node _T_192 = bits(io.trigger_pkt_any[0].tdata2, 20, 20) @[el2_lib.scala 242:74] + node _T_193 = bits(lsu_match_data_0, 20, 20) @[el2_lib.scala 242:86] + node _T_194 = eq(_T_192, _T_193) @[el2_lib.scala 242:78] + node _T_195 = mux(_T_191, UInt<1>("h01"), _T_194) @[el2_lib.scala 242:23] + _T_48[20] <= _T_195 @[el2_lib.scala 242:17] + node _T_196 = bits(io.trigger_pkt_any[0].tdata2, 20, 0) @[el2_lib.scala 242:28] + node _T_197 = andr(_T_196) @[el2_lib.scala 242:36] + node _T_198 = and(_T_197, _T_51) @[el2_lib.scala 242:41] + node _T_199 = bits(io.trigger_pkt_any[0].tdata2, 21, 21) @[el2_lib.scala 242:74] + node _T_200 = bits(lsu_match_data_0, 21, 21) @[el2_lib.scala 242:86] + node _T_201 = eq(_T_199, _T_200) @[el2_lib.scala 242:78] + node _T_202 = mux(_T_198, UInt<1>("h01"), _T_201) @[el2_lib.scala 242:23] + _T_48[21] <= _T_202 @[el2_lib.scala 242:17] + node _T_203 = bits(io.trigger_pkt_any[0].tdata2, 21, 0) @[el2_lib.scala 242:28] + node _T_204 = andr(_T_203) @[el2_lib.scala 242:36] + node _T_205 = and(_T_204, _T_51) @[el2_lib.scala 242:41] + node _T_206 = bits(io.trigger_pkt_any[0].tdata2, 22, 22) @[el2_lib.scala 242:74] + node _T_207 = bits(lsu_match_data_0, 22, 22) @[el2_lib.scala 242:86] + node _T_208 = eq(_T_206, _T_207) @[el2_lib.scala 242:78] + node _T_209 = mux(_T_205, UInt<1>("h01"), _T_208) @[el2_lib.scala 242:23] + _T_48[22] <= _T_209 @[el2_lib.scala 242:17] + node _T_210 = bits(io.trigger_pkt_any[0].tdata2, 22, 0) @[el2_lib.scala 242:28] + node _T_211 = andr(_T_210) @[el2_lib.scala 242:36] + node _T_212 = and(_T_211, _T_51) @[el2_lib.scala 242:41] + node _T_213 = bits(io.trigger_pkt_any[0].tdata2, 23, 23) @[el2_lib.scala 242:74] + node _T_214 = bits(lsu_match_data_0, 23, 23) @[el2_lib.scala 242:86] + node _T_215 = eq(_T_213, _T_214) @[el2_lib.scala 242:78] + node _T_216 = mux(_T_212, UInt<1>("h01"), _T_215) @[el2_lib.scala 242:23] + _T_48[23] <= _T_216 @[el2_lib.scala 242:17] + node _T_217 = bits(io.trigger_pkt_any[0].tdata2, 23, 0) @[el2_lib.scala 242:28] + node _T_218 = andr(_T_217) @[el2_lib.scala 242:36] + node _T_219 = and(_T_218, _T_51) @[el2_lib.scala 242:41] + node _T_220 = bits(io.trigger_pkt_any[0].tdata2, 24, 24) @[el2_lib.scala 242:74] + node _T_221 = bits(lsu_match_data_0, 24, 24) @[el2_lib.scala 242:86] + node _T_222 = eq(_T_220, _T_221) @[el2_lib.scala 242:78] + node _T_223 = mux(_T_219, UInt<1>("h01"), _T_222) @[el2_lib.scala 242:23] + _T_48[24] <= _T_223 @[el2_lib.scala 242:17] + node _T_224 = bits(io.trigger_pkt_any[0].tdata2, 24, 0) @[el2_lib.scala 242:28] + node _T_225 = andr(_T_224) @[el2_lib.scala 242:36] + node _T_226 = and(_T_225, _T_51) @[el2_lib.scala 242:41] + node _T_227 = bits(io.trigger_pkt_any[0].tdata2, 25, 25) @[el2_lib.scala 242:74] + node _T_228 = bits(lsu_match_data_0, 25, 25) @[el2_lib.scala 242:86] + node _T_229 = eq(_T_227, _T_228) @[el2_lib.scala 242:78] + node _T_230 = mux(_T_226, UInt<1>("h01"), _T_229) @[el2_lib.scala 242:23] + _T_48[25] <= _T_230 @[el2_lib.scala 242:17] + node _T_231 = bits(io.trigger_pkt_any[0].tdata2, 25, 0) @[el2_lib.scala 242:28] + node _T_232 = andr(_T_231) @[el2_lib.scala 242:36] + node _T_233 = and(_T_232, _T_51) @[el2_lib.scala 242:41] + node _T_234 = bits(io.trigger_pkt_any[0].tdata2, 26, 26) @[el2_lib.scala 242:74] + node _T_235 = bits(lsu_match_data_0, 26, 26) @[el2_lib.scala 242:86] + node _T_236 = eq(_T_234, _T_235) @[el2_lib.scala 242:78] + node _T_237 = mux(_T_233, UInt<1>("h01"), _T_236) @[el2_lib.scala 242:23] + _T_48[26] <= _T_237 @[el2_lib.scala 242:17] + node _T_238 = bits(io.trigger_pkt_any[0].tdata2, 26, 0) @[el2_lib.scala 242:28] + node _T_239 = andr(_T_238) @[el2_lib.scala 242:36] + node _T_240 = and(_T_239, _T_51) @[el2_lib.scala 242:41] + node _T_241 = bits(io.trigger_pkt_any[0].tdata2, 27, 27) @[el2_lib.scala 242:74] + node _T_242 = bits(lsu_match_data_0, 27, 27) @[el2_lib.scala 242:86] + node _T_243 = eq(_T_241, _T_242) @[el2_lib.scala 242:78] + node _T_244 = mux(_T_240, UInt<1>("h01"), _T_243) @[el2_lib.scala 242:23] + _T_48[27] <= _T_244 @[el2_lib.scala 242:17] + node _T_245 = bits(io.trigger_pkt_any[0].tdata2, 27, 0) @[el2_lib.scala 242:28] + node _T_246 = andr(_T_245) @[el2_lib.scala 242:36] + node _T_247 = and(_T_246, _T_51) @[el2_lib.scala 242:41] + node _T_248 = bits(io.trigger_pkt_any[0].tdata2, 28, 28) @[el2_lib.scala 242:74] + node _T_249 = bits(lsu_match_data_0, 28, 28) @[el2_lib.scala 242:86] + node _T_250 = eq(_T_248, _T_249) @[el2_lib.scala 242:78] + node _T_251 = mux(_T_247, UInt<1>("h01"), _T_250) @[el2_lib.scala 242:23] + _T_48[28] <= _T_251 @[el2_lib.scala 242:17] + node _T_252 = bits(io.trigger_pkt_any[0].tdata2, 28, 0) @[el2_lib.scala 242:28] + node _T_253 = andr(_T_252) @[el2_lib.scala 242:36] + node _T_254 = and(_T_253, _T_51) @[el2_lib.scala 242:41] + node _T_255 = bits(io.trigger_pkt_any[0].tdata2, 29, 29) @[el2_lib.scala 242:74] + node _T_256 = bits(lsu_match_data_0, 29, 29) @[el2_lib.scala 242:86] + node _T_257 = eq(_T_255, _T_256) @[el2_lib.scala 242:78] + node _T_258 = mux(_T_254, UInt<1>("h01"), _T_257) @[el2_lib.scala 242:23] + _T_48[29] <= _T_258 @[el2_lib.scala 242:17] + node _T_259 = bits(io.trigger_pkt_any[0].tdata2, 29, 0) @[el2_lib.scala 242:28] + node _T_260 = andr(_T_259) @[el2_lib.scala 242:36] + node _T_261 = and(_T_260, _T_51) @[el2_lib.scala 242:41] + node _T_262 = bits(io.trigger_pkt_any[0].tdata2, 30, 30) @[el2_lib.scala 242:74] + node _T_263 = bits(lsu_match_data_0, 30, 30) @[el2_lib.scala 242:86] + node _T_264 = eq(_T_262, _T_263) @[el2_lib.scala 242:78] + node _T_265 = mux(_T_261, UInt<1>("h01"), _T_264) @[el2_lib.scala 242:23] + _T_48[30] <= _T_265 @[el2_lib.scala 242:17] + node _T_266 = bits(io.trigger_pkt_any[0].tdata2, 30, 0) @[el2_lib.scala 242:28] + node _T_267 = andr(_T_266) @[el2_lib.scala 242:36] + node _T_268 = and(_T_267, _T_51) @[el2_lib.scala 242:41] + node _T_269 = bits(io.trigger_pkt_any[0].tdata2, 31, 31) @[el2_lib.scala 242:74] + node _T_270 = bits(lsu_match_data_0, 31, 31) @[el2_lib.scala 242:86] + node _T_271 = eq(_T_269, _T_270) @[el2_lib.scala 242:78] + node _T_272 = mux(_T_268, UInt<1>("h01"), _T_271) @[el2_lib.scala 242:23] + _T_48[31] <= _T_272 @[el2_lib.scala 242:17] + node _T_273 = cat(_T_48[1], _T_48[0]) @[el2_lib.scala 243:14] + node _T_274 = cat(_T_48[3], _T_48[2]) @[el2_lib.scala 243:14] + node _T_275 = cat(_T_274, _T_273) @[el2_lib.scala 243:14] + node _T_276 = cat(_T_48[5], _T_48[4]) @[el2_lib.scala 243:14] + node _T_277 = cat(_T_48[7], _T_48[6]) @[el2_lib.scala 243:14] + node _T_278 = cat(_T_277, _T_276) @[el2_lib.scala 243:14] + node _T_279 = cat(_T_278, _T_275) @[el2_lib.scala 243:14] + node _T_280 = cat(_T_48[9], _T_48[8]) @[el2_lib.scala 243:14] + node _T_281 = cat(_T_48[11], _T_48[10]) @[el2_lib.scala 243:14] + node _T_282 = cat(_T_281, _T_280) @[el2_lib.scala 243:14] + node _T_283 = cat(_T_48[13], _T_48[12]) @[el2_lib.scala 243:14] + node _T_284 = cat(_T_48[15], _T_48[14]) @[el2_lib.scala 243:14] + node _T_285 = cat(_T_284, _T_283) @[el2_lib.scala 243:14] + node _T_286 = cat(_T_285, _T_282) @[el2_lib.scala 243:14] + node _T_287 = cat(_T_286, _T_279) @[el2_lib.scala 243:14] + node _T_288 = cat(_T_48[17], _T_48[16]) @[el2_lib.scala 243:14] + node _T_289 = cat(_T_48[19], _T_48[18]) @[el2_lib.scala 243:14] + node _T_290 = cat(_T_289, _T_288) @[el2_lib.scala 243:14] + node _T_291 = cat(_T_48[21], _T_48[20]) @[el2_lib.scala 243:14] + node _T_292 = cat(_T_48[23], _T_48[22]) @[el2_lib.scala 243:14] + node _T_293 = cat(_T_292, _T_291) @[el2_lib.scala 243:14] + node _T_294 = cat(_T_293, _T_290) @[el2_lib.scala 243:14] + node _T_295 = cat(_T_48[25], _T_48[24]) @[el2_lib.scala 243:14] + node _T_296 = cat(_T_48[27], _T_48[26]) @[el2_lib.scala 243:14] + node _T_297 = cat(_T_296, _T_295) @[el2_lib.scala 243:14] + node _T_298 = cat(_T_48[29], _T_48[28]) @[el2_lib.scala 243:14] + node _T_299 = cat(_T_48[31], _T_48[30]) @[el2_lib.scala 243:14] + node _T_300 = cat(_T_299, _T_298) @[el2_lib.scala 243:14] + node _T_301 = cat(_T_300, _T_297) @[el2_lib.scala 243:14] + node _T_302 = cat(_T_301, _T_294) @[el2_lib.scala 243:14] + node _T_303 = cat(_T_302, _T_287) @[el2_lib.scala 243:14] + node _T_304 = and(_T_46, _T_303) @[el2_lsu_trigger.scala 19:87] + node _T_305 = eq(io.lsu_pkt_m.dma, UInt<1>("h00")) @[el2_lsu_trigger.scala 18:71] + node _T_306 = and(io.lsu_pkt_m.valid, _T_305) @[el2_lsu_trigger.scala 18:69] + node _T_307 = and(io.trigger_pkt_any[1].store, io.lsu_pkt_m.store) @[el2_lsu_trigger.scala 18:121] + node _T_308 = and(io.trigger_pkt_any[1].load, io.lsu_pkt_m.load) @[el2_lsu_trigger.scala 19:33] + node _T_309 = eq(io.trigger_pkt_any[1].select, UInt<1>("h00")) @[el2_lsu_trigger.scala 19:55] + node _T_310 = and(_T_308, _T_309) @[el2_lsu_trigger.scala 19:53] + node _T_311 = or(_T_307, _T_310) @[el2_lsu_trigger.scala 18:142] + node _T_312 = and(_T_306, _T_311) @[el2_lsu_trigger.scala 18:89] + node _T_313 = bits(io.trigger_pkt_any[1].match_, 0, 0) @[el2_lsu_trigger.scala 20:104] + wire _T_314 : UInt<1>[32] @[el2_lib.scala 238:24] + node _T_315 = andr(io.trigger_pkt_any[1].tdata2) @[el2_lib.scala 239:45] + node _T_316 = not(_T_315) @[el2_lib.scala 239:39] + node _T_317 = and(_T_313, _T_316) @[el2_lib.scala 239:37] + node _T_318 = bits(io.trigger_pkt_any[1].tdata2, 0, 0) @[el2_lib.scala 240:48] + node _T_319 = bits(lsu_match_data_1, 0, 0) @[el2_lib.scala 240:60] + node _T_320 = eq(_T_318, _T_319) @[el2_lib.scala 240:52] + node _T_321 = or(_T_317, _T_320) @[el2_lib.scala 240:41] + _T_314[0] <= _T_321 @[el2_lib.scala 240:18] + node _T_322 = bits(io.trigger_pkt_any[1].tdata2, 0, 0) @[el2_lib.scala 242:28] + node _T_323 = andr(_T_322) @[el2_lib.scala 242:36] + node _T_324 = and(_T_323, _T_317) @[el2_lib.scala 242:41] + node _T_325 = bits(io.trigger_pkt_any[1].tdata2, 1, 1) @[el2_lib.scala 242:74] + node _T_326 = bits(lsu_match_data_1, 1, 1) @[el2_lib.scala 242:86] + node _T_327 = eq(_T_325, _T_326) @[el2_lib.scala 242:78] + node _T_328 = mux(_T_324, UInt<1>("h01"), _T_327) @[el2_lib.scala 242:23] + _T_314[1] <= _T_328 @[el2_lib.scala 242:17] + node _T_329 = bits(io.trigger_pkt_any[1].tdata2, 1, 0) @[el2_lib.scala 242:28] + node _T_330 = andr(_T_329) @[el2_lib.scala 242:36] + node _T_331 = and(_T_330, _T_317) @[el2_lib.scala 242:41] + node _T_332 = bits(io.trigger_pkt_any[1].tdata2, 2, 2) @[el2_lib.scala 242:74] + node _T_333 = bits(lsu_match_data_1, 2, 2) @[el2_lib.scala 242:86] + node _T_334 = eq(_T_332, _T_333) @[el2_lib.scala 242:78] + node _T_335 = mux(_T_331, UInt<1>("h01"), _T_334) @[el2_lib.scala 242:23] + _T_314[2] <= _T_335 @[el2_lib.scala 242:17] + node _T_336 = bits(io.trigger_pkt_any[1].tdata2, 2, 0) @[el2_lib.scala 242:28] + node _T_337 = andr(_T_336) @[el2_lib.scala 242:36] + node _T_338 = and(_T_337, _T_317) @[el2_lib.scala 242:41] + node _T_339 = bits(io.trigger_pkt_any[1].tdata2, 3, 3) @[el2_lib.scala 242:74] + node _T_340 = bits(lsu_match_data_1, 3, 3) @[el2_lib.scala 242:86] + node _T_341 = eq(_T_339, _T_340) @[el2_lib.scala 242:78] + node _T_342 = mux(_T_338, UInt<1>("h01"), _T_341) @[el2_lib.scala 242:23] + _T_314[3] <= _T_342 @[el2_lib.scala 242:17] + node _T_343 = bits(io.trigger_pkt_any[1].tdata2, 3, 0) @[el2_lib.scala 242:28] + node _T_344 = andr(_T_343) @[el2_lib.scala 242:36] + node _T_345 = and(_T_344, _T_317) @[el2_lib.scala 242:41] + node _T_346 = bits(io.trigger_pkt_any[1].tdata2, 4, 4) @[el2_lib.scala 242:74] + node _T_347 = bits(lsu_match_data_1, 4, 4) @[el2_lib.scala 242:86] + node _T_348 = eq(_T_346, _T_347) @[el2_lib.scala 242:78] + node _T_349 = mux(_T_345, UInt<1>("h01"), _T_348) @[el2_lib.scala 242:23] + _T_314[4] <= _T_349 @[el2_lib.scala 242:17] + node _T_350 = bits(io.trigger_pkt_any[1].tdata2, 4, 0) @[el2_lib.scala 242:28] + node _T_351 = andr(_T_350) @[el2_lib.scala 242:36] + node _T_352 = and(_T_351, _T_317) @[el2_lib.scala 242:41] + node _T_353 = bits(io.trigger_pkt_any[1].tdata2, 5, 5) @[el2_lib.scala 242:74] + node _T_354 = bits(lsu_match_data_1, 5, 5) @[el2_lib.scala 242:86] + node _T_355 = eq(_T_353, _T_354) @[el2_lib.scala 242:78] + node _T_356 = mux(_T_352, UInt<1>("h01"), _T_355) @[el2_lib.scala 242:23] + _T_314[5] <= _T_356 @[el2_lib.scala 242:17] + node _T_357 = bits(io.trigger_pkt_any[1].tdata2, 5, 0) @[el2_lib.scala 242:28] + node _T_358 = andr(_T_357) @[el2_lib.scala 242:36] + node _T_359 = and(_T_358, _T_317) @[el2_lib.scala 242:41] + node _T_360 = bits(io.trigger_pkt_any[1].tdata2, 6, 6) @[el2_lib.scala 242:74] + node _T_361 = bits(lsu_match_data_1, 6, 6) @[el2_lib.scala 242:86] + node _T_362 = eq(_T_360, _T_361) @[el2_lib.scala 242:78] + node _T_363 = mux(_T_359, UInt<1>("h01"), _T_362) @[el2_lib.scala 242:23] + _T_314[6] <= _T_363 @[el2_lib.scala 242:17] + node _T_364 = bits(io.trigger_pkt_any[1].tdata2, 6, 0) @[el2_lib.scala 242:28] + node _T_365 = andr(_T_364) @[el2_lib.scala 242:36] + node _T_366 = and(_T_365, _T_317) @[el2_lib.scala 242:41] + node _T_367 = bits(io.trigger_pkt_any[1].tdata2, 7, 7) @[el2_lib.scala 242:74] + node _T_368 = bits(lsu_match_data_1, 7, 7) @[el2_lib.scala 242:86] + node _T_369 = eq(_T_367, _T_368) @[el2_lib.scala 242:78] + node _T_370 = mux(_T_366, UInt<1>("h01"), _T_369) @[el2_lib.scala 242:23] + _T_314[7] <= _T_370 @[el2_lib.scala 242:17] + node _T_371 = bits(io.trigger_pkt_any[1].tdata2, 7, 0) @[el2_lib.scala 242:28] + node _T_372 = andr(_T_371) @[el2_lib.scala 242:36] + node _T_373 = and(_T_372, _T_317) @[el2_lib.scala 242:41] + node _T_374 = bits(io.trigger_pkt_any[1].tdata2, 8, 8) @[el2_lib.scala 242:74] + node _T_375 = bits(lsu_match_data_1, 8, 8) @[el2_lib.scala 242:86] + node _T_376 = eq(_T_374, _T_375) @[el2_lib.scala 242:78] + node _T_377 = mux(_T_373, UInt<1>("h01"), _T_376) @[el2_lib.scala 242:23] + _T_314[8] <= _T_377 @[el2_lib.scala 242:17] + node _T_378 = bits(io.trigger_pkt_any[1].tdata2, 8, 0) @[el2_lib.scala 242:28] + node _T_379 = andr(_T_378) @[el2_lib.scala 242:36] + node _T_380 = and(_T_379, _T_317) @[el2_lib.scala 242:41] + node _T_381 = bits(io.trigger_pkt_any[1].tdata2, 9, 9) @[el2_lib.scala 242:74] + node _T_382 = bits(lsu_match_data_1, 9, 9) @[el2_lib.scala 242:86] + node _T_383 = eq(_T_381, _T_382) @[el2_lib.scala 242:78] + node _T_384 = mux(_T_380, UInt<1>("h01"), _T_383) @[el2_lib.scala 242:23] + _T_314[9] <= _T_384 @[el2_lib.scala 242:17] + node _T_385 = bits(io.trigger_pkt_any[1].tdata2, 9, 0) @[el2_lib.scala 242:28] + node _T_386 = andr(_T_385) @[el2_lib.scala 242:36] + node _T_387 = and(_T_386, _T_317) @[el2_lib.scala 242:41] + node _T_388 = bits(io.trigger_pkt_any[1].tdata2, 10, 10) @[el2_lib.scala 242:74] + node _T_389 = bits(lsu_match_data_1, 10, 10) @[el2_lib.scala 242:86] + node _T_390 = eq(_T_388, _T_389) @[el2_lib.scala 242:78] + node _T_391 = mux(_T_387, UInt<1>("h01"), _T_390) @[el2_lib.scala 242:23] + _T_314[10] <= _T_391 @[el2_lib.scala 242:17] + node _T_392 = bits(io.trigger_pkt_any[1].tdata2, 10, 0) @[el2_lib.scala 242:28] + node _T_393 = andr(_T_392) @[el2_lib.scala 242:36] + node _T_394 = and(_T_393, _T_317) @[el2_lib.scala 242:41] + node _T_395 = bits(io.trigger_pkt_any[1].tdata2, 11, 11) @[el2_lib.scala 242:74] + node _T_396 = bits(lsu_match_data_1, 11, 11) @[el2_lib.scala 242:86] + node _T_397 = eq(_T_395, _T_396) @[el2_lib.scala 242:78] + node _T_398 = mux(_T_394, UInt<1>("h01"), _T_397) @[el2_lib.scala 242:23] + _T_314[11] <= _T_398 @[el2_lib.scala 242:17] + node _T_399 = bits(io.trigger_pkt_any[1].tdata2, 11, 0) @[el2_lib.scala 242:28] + node _T_400 = andr(_T_399) @[el2_lib.scala 242:36] + node _T_401 = and(_T_400, _T_317) @[el2_lib.scala 242:41] + node _T_402 = bits(io.trigger_pkt_any[1].tdata2, 12, 12) @[el2_lib.scala 242:74] + node _T_403 = bits(lsu_match_data_1, 12, 12) @[el2_lib.scala 242:86] + node _T_404 = eq(_T_402, _T_403) @[el2_lib.scala 242:78] + node _T_405 = mux(_T_401, UInt<1>("h01"), _T_404) @[el2_lib.scala 242:23] + _T_314[12] <= _T_405 @[el2_lib.scala 242:17] + node _T_406 = bits(io.trigger_pkt_any[1].tdata2, 12, 0) @[el2_lib.scala 242:28] + node _T_407 = andr(_T_406) @[el2_lib.scala 242:36] + node _T_408 = and(_T_407, _T_317) @[el2_lib.scala 242:41] + node _T_409 = bits(io.trigger_pkt_any[1].tdata2, 13, 13) @[el2_lib.scala 242:74] + node _T_410 = bits(lsu_match_data_1, 13, 13) @[el2_lib.scala 242:86] + node _T_411 = eq(_T_409, _T_410) @[el2_lib.scala 242:78] + node _T_412 = mux(_T_408, UInt<1>("h01"), _T_411) @[el2_lib.scala 242:23] + _T_314[13] <= _T_412 @[el2_lib.scala 242:17] + node _T_413 = bits(io.trigger_pkt_any[1].tdata2, 13, 0) @[el2_lib.scala 242:28] + node _T_414 = andr(_T_413) @[el2_lib.scala 242:36] + node _T_415 = and(_T_414, _T_317) @[el2_lib.scala 242:41] + node _T_416 = bits(io.trigger_pkt_any[1].tdata2, 14, 14) @[el2_lib.scala 242:74] + node _T_417 = bits(lsu_match_data_1, 14, 14) @[el2_lib.scala 242:86] + node _T_418 = eq(_T_416, _T_417) @[el2_lib.scala 242:78] + node _T_419 = mux(_T_415, UInt<1>("h01"), _T_418) @[el2_lib.scala 242:23] + _T_314[14] <= _T_419 @[el2_lib.scala 242:17] + node _T_420 = bits(io.trigger_pkt_any[1].tdata2, 14, 0) @[el2_lib.scala 242:28] + node _T_421 = andr(_T_420) @[el2_lib.scala 242:36] + node _T_422 = and(_T_421, _T_317) @[el2_lib.scala 242:41] + node _T_423 = bits(io.trigger_pkt_any[1].tdata2, 15, 15) @[el2_lib.scala 242:74] + node _T_424 = bits(lsu_match_data_1, 15, 15) @[el2_lib.scala 242:86] + node _T_425 = eq(_T_423, _T_424) @[el2_lib.scala 242:78] + node _T_426 = mux(_T_422, UInt<1>("h01"), _T_425) @[el2_lib.scala 242:23] + _T_314[15] <= _T_426 @[el2_lib.scala 242:17] + node _T_427 = bits(io.trigger_pkt_any[1].tdata2, 15, 0) @[el2_lib.scala 242:28] + node _T_428 = andr(_T_427) @[el2_lib.scala 242:36] + node _T_429 = and(_T_428, _T_317) @[el2_lib.scala 242:41] + node _T_430 = bits(io.trigger_pkt_any[1].tdata2, 16, 16) @[el2_lib.scala 242:74] + node _T_431 = bits(lsu_match_data_1, 16, 16) @[el2_lib.scala 242:86] + node _T_432 = eq(_T_430, _T_431) @[el2_lib.scala 242:78] + node _T_433 = mux(_T_429, UInt<1>("h01"), _T_432) @[el2_lib.scala 242:23] + _T_314[16] <= _T_433 @[el2_lib.scala 242:17] + node _T_434 = bits(io.trigger_pkt_any[1].tdata2, 16, 0) @[el2_lib.scala 242:28] + node _T_435 = andr(_T_434) @[el2_lib.scala 242:36] + node _T_436 = and(_T_435, _T_317) @[el2_lib.scala 242:41] + node _T_437 = bits(io.trigger_pkt_any[1].tdata2, 17, 17) @[el2_lib.scala 242:74] + node _T_438 = bits(lsu_match_data_1, 17, 17) @[el2_lib.scala 242:86] + node _T_439 = eq(_T_437, _T_438) @[el2_lib.scala 242:78] + node _T_440 = mux(_T_436, UInt<1>("h01"), _T_439) @[el2_lib.scala 242:23] + _T_314[17] <= _T_440 @[el2_lib.scala 242:17] + node _T_441 = bits(io.trigger_pkt_any[1].tdata2, 17, 0) @[el2_lib.scala 242:28] + node _T_442 = andr(_T_441) @[el2_lib.scala 242:36] + node _T_443 = and(_T_442, _T_317) @[el2_lib.scala 242:41] + node _T_444 = bits(io.trigger_pkt_any[1].tdata2, 18, 18) @[el2_lib.scala 242:74] + node _T_445 = bits(lsu_match_data_1, 18, 18) @[el2_lib.scala 242:86] + node _T_446 = eq(_T_444, _T_445) @[el2_lib.scala 242:78] + node _T_447 = mux(_T_443, UInt<1>("h01"), _T_446) @[el2_lib.scala 242:23] + _T_314[18] <= _T_447 @[el2_lib.scala 242:17] + node _T_448 = bits(io.trigger_pkt_any[1].tdata2, 18, 0) @[el2_lib.scala 242:28] + node _T_449 = andr(_T_448) @[el2_lib.scala 242:36] + node _T_450 = and(_T_449, _T_317) @[el2_lib.scala 242:41] + node _T_451 = bits(io.trigger_pkt_any[1].tdata2, 19, 19) @[el2_lib.scala 242:74] + node _T_452 = bits(lsu_match_data_1, 19, 19) @[el2_lib.scala 242:86] + node _T_453 = eq(_T_451, _T_452) @[el2_lib.scala 242:78] + node _T_454 = mux(_T_450, UInt<1>("h01"), _T_453) @[el2_lib.scala 242:23] + _T_314[19] <= _T_454 @[el2_lib.scala 242:17] + node _T_455 = bits(io.trigger_pkt_any[1].tdata2, 19, 0) @[el2_lib.scala 242:28] + node _T_456 = andr(_T_455) @[el2_lib.scala 242:36] + node _T_457 = and(_T_456, _T_317) @[el2_lib.scala 242:41] + node _T_458 = bits(io.trigger_pkt_any[1].tdata2, 20, 20) @[el2_lib.scala 242:74] + node _T_459 = bits(lsu_match_data_1, 20, 20) @[el2_lib.scala 242:86] + node _T_460 = eq(_T_458, _T_459) @[el2_lib.scala 242:78] + node _T_461 = mux(_T_457, UInt<1>("h01"), _T_460) @[el2_lib.scala 242:23] + _T_314[20] <= _T_461 @[el2_lib.scala 242:17] + node _T_462 = bits(io.trigger_pkt_any[1].tdata2, 20, 0) @[el2_lib.scala 242:28] + node _T_463 = andr(_T_462) @[el2_lib.scala 242:36] + node _T_464 = and(_T_463, _T_317) @[el2_lib.scala 242:41] + node _T_465 = bits(io.trigger_pkt_any[1].tdata2, 21, 21) @[el2_lib.scala 242:74] + node _T_466 = bits(lsu_match_data_1, 21, 21) @[el2_lib.scala 242:86] + node _T_467 = eq(_T_465, _T_466) @[el2_lib.scala 242:78] + node _T_468 = mux(_T_464, UInt<1>("h01"), _T_467) @[el2_lib.scala 242:23] + _T_314[21] <= _T_468 @[el2_lib.scala 242:17] + node _T_469 = bits(io.trigger_pkt_any[1].tdata2, 21, 0) @[el2_lib.scala 242:28] + node _T_470 = andr(_T_469) @[el2_lib.scala 242:36] + node _T_471 = and(_T_470, _T_317) @[el2_lib.scala 242:41] + node _T_472 = bits(io.trigger_pkt_any[1].tdata2, 22, 22) @[el2_lib.scala 242:74] + node _T_473 = bits(lsu_match_data_1, 22, 22) @[el2_lib.scala 242:86] + node _T_474 = eq(_T_472, _T_473) @[el2_lib.scala 242:78] + node _T_475 = mux(_T_471, UInt<1>("h01"), _T_474) @[el2_lib.scala 242:23] + _T_314[22] <= _T_475 @[el2_lib.scala 242:17] + node _T_476 = bits(io.trigger_pkt_any[1].tdata2, 22, 0) @[el2_lib.scala 242:28] + node _T_477 = andr(_T_476) @[el2_lib.scala 242:36] + node _T_478 = and(_T_477, _T_317) @[el2_lib.scala 242:41] + node _T_479 = bits(io.trigger_pkt_any[1].tdata2, 23, 23) @[el2_lib.scala 242:74] + node _T_480 = bits(lsu_match_data_1, 23, 23) @[el2_lib.scala 242:86] + node _T_481 = eq(_T_479, _T_480) @[el2_lib.scala 242:78] + node _T_482 = mux(_T_478, UInt<1>("h01"), _T_481) @[el2_lib.scala 242:23] + _T_314[23] <= _T_482 @[el2_lib.scala 242:17] + node _T_483 = bits(io.trigger_pkt_any[1].tdata2, 23, 0) @[el2_lib.scala 242:28] + node _T_484 = andr(_T_483) @[el2_lib.scala 242:36] + node _T_485 = and(_T_484, _T_317) @[el2_lib.scala 242:41] + node _T_486 = bits(io.trigger_pkt_any[1].tdata2, 24, 24) @[el2_lib.scala 242:74] + node _T_487 = bits(lsu_match_data_1, 24, 24) @[el2_lib.scala 242:86] + node _T_488 = eq(_T_486, _T_487) @[el2_lib.scala 242:78] + node _T_489 = mux(_T_485, UInt<1>("h01"), _T_488) @[el2_lib.scala 242:23] + _T_314[24] <= _T_489 @[el2_lib.scala 242:17] + node _T_490 = bits(io.trigger_pkt_any[1].tdata2, 24, 0) @[el2_lib.scala 242:28] + node _T_491 = andr(_T_490) @[el2_lib.scala 242:36] + node _T_492 = and(_T_491, _T_317) @[el2_lib.scala 242:41] + node _T_493 = bits(io.trigger_pkt_any[1].tdata2, 25, 25) @[el2_lib.scala 242:74] + node _T_494 = bits(lsu_match_data_1, 25, 25) @[el2_lib.scala 242:86] + node _T_495 = eq(_T_493, _T_494) @[el2_lib.scala 242:78] + node _T_496 = mux(_T_492, UInt<1>("h01"), _T_495) @[el2_lib.scala 242:23] + _T_314[25] <= _T_496 @[el2_lib.scala 242:17] + node _T_497 = bits(io.trigger_pkt_any[1].tdata2, 25, 0) @[el2_lib.scala 242:28] + node _T_498 = andr(_T_497) @[el2_lib.scala 242:36] + node _T_499 = and(_T_498, _T_317) @[el2_lib.scala 242:41] + node _T_500 = bits(io.trigger_pkt_any[1].tdata2, 26, 26) @[el2_lib.scala 242:74] + node _T_501 = bits(lsu_match_data_1, 26, 26) @[el2_lib.scala 242:86] + node _T_502 = eq(_T_500, _T_501) @[el2_lib.scala 242:78] + node _T_503 = mux(_T_499, UInt<1>("h01"), _T_502) @[el2_lib.scala 242:23] + _T_314[26] <= _T_503 @[el2_lib.scala 242:17] + node _T_504 = bits(io.trigger_pkt_any[1].tdata2, 26, 0) @[el2_lib.scala 242:28] + node _T_505 = andr(_T_504) @[el2_lib.scala 242:36] + node _T_506 = and(_T_505, _T_317) @[el2_lib.scala 242:41] + node _T_507 = bits(io.trigger_pkt_any[1].tdata2, 27, 27) @[el2_lib.scala 242:74] + node _T_508 = bits(lsu_match_data_1, 27, 27) @[el2_lib.scala 242:86] + node _T_509 = eq(_T_507, _T_508) @[el2_lib.scala 242:78] + node _T_510 = mux(_T_506, UInt<1>("h01"), _T_509) @[el2_lib.scala 242:23] + _T_314[27] <= _T_510 @[el2_lib.scala 242:17] + node _T_511 = bits(io.trigger_pkt_any[1].tdata2, 27, 0) @[el2_lib.scala 242:28] + node _T_512 = andr(_T_511) @[el2_lib.scala 242:36] + node _T_513 = and(_T_512, _T_317) @[el2_lib.scala 242:41] + node _T_514 = bits(io.trigger_pkt_any[1].tdata2, 28, 28) @[el2_lib.scala 242:74] + node _T_515 = bits(lsu_match_data_1, 28, 28) @[el2_lib.scala 242:86] + node _T_516 = eq(_T_514, _T_515) @[el2_lib.scala 242:78] + node _T_517 = mux(_T_513, UInt<1>("h01"), _T_516) @[el2_lib.scala 242:23] + _T_314[28] <= _T_517 @[el2_lib.scala 242:17] + node _T_518 = bits(io.trigger_pkt_any[1].tdata2, 28, 0) @[el2_lib.scala 242:28] + node _T_519 = andr(_T_518) @[el2_lib.scala 242:36] + node _T_520 = and(_T_519, _T_317) @[el2_lib.scala 242:41] + node _T_521 = bits(io.trigger_pkt_any[1].tdata2, 29, 29) @[el2_lib.scala 242:74] + node _T_522 = bits(lsu_match_data_1, 29, 29) @[el2_lib.scala 242:86] + node _T_523 = eq(_T_521, _T_522) @[el2_lib.scala 242:78] + node _T_524 = mux(_T_520, UInt<1>("h01"), _T_523) @[el2_lib.scala 242:23] + _T_314[29] <= _T_524 @[el2_lib.scala 242:17] + node _T_525 = bits(io.trigger_pkt_any[1].tdata2, 29, 0) @[el2_lib.scala 242:28] + node _T_526 = andr(_T_525) @[el2_lib.scala 242:36] + node _T_527 = and(_T_526, _T_317) @[el2_lib.scala 242:41] + node _T_528 = bits(io.trigger_pkt_any[1].tdata2, 30, 30) @[el2_lib.scala 242:74] + node _T_529 = bits(lsu_match_data_1, 30, 30) @[el2_lib.scala 242:86] + node _T_530 = eq(_T_528, _T_529) @[el2_lib.scala 242:78] + node _T_531 = mux(_T_527, UInt<1>("h01"), _T_530) @[el2_lib.scala 242:23] + _T_314[30] <= _T_531 @[el2_lib.scala 242:17] + node _T_532 = bits(io.trigger_pkt_any[1].tdata2, 30, 0) @[el2_lib.scala 242:28] + node _T_533 = andr(_T_532) @[el2_lib.scala 242:36] + node _T_534 = and(_T_533, _T_317) @[el2_lib.scala 242:41] + node _T_535 = bits(io.trigger_pkt_any[1].tdata2, 31, 31) @[el2_lib.scala 242:74] + node _T_536 = bits(lsu_match_data_1, 31, 31) @[el2_lib.scala 242:86] + node _T_537 = eq(_T_535, _T_536) @[el2_lib.scala 242:78] + node _T_538 = mux(_T_534, UInt<1>("h01"), _T_537) @[el2_lib.scala 242:23] + _T_314[31] <= _T_538 @[el2_lib.scala 242:17] + node _T_539 = cat(_T_314[1], _T_314[0]) @[el2_lib.scala 243:14] + node _T_540 = cat(_T_314[3], _T_314[2]) @[el2_lib.scala 243:14] + node _T_541 = cat(_T_540, _T_539) @[el2_lib.scala 243:14] + node _T_542 = cat(_T_314[5], _T_314[4]) @[el2_lib.scala 243:14] + node _T_543 = cat(_T_314[7], _T_314[6]) @[el2_lib.scala 243:14] + node _T_544 = cat(_T_543, _T_542) @[el2_lib.scala 243:14] + node _T_545 = cat(_T_544, _T_541) @[el2_lib.scala 243:14] + node _T_546 = cat(_T_314[9], _T_314[8]) @[el2_lib.scala 243:14] + node _T_547 = cat(_T_314[11], _T_314[10]) @[el2_lib.scala 243:14] + node _T_548 = cat(_T_547, _T_546) @[el2_lib.scala 243:14] + node _T_549 = cat(_T_314[13], _T_314[12]) @[el2_lib.scala 243:14] + node _T_550 = cat(_T_314[15], _T_314[14]) @[el2_lib.scala 243:14] + node _T_551 = cat(_T_550, _T_549) @[el2_lib.scala 243:14] + node _T_552 = cat(_T_551, _T_548) @[el2_lib.scala 243:14] + node _T_553 = cat(_T_552, _T_545) @[el2_lib.scala 243:14] + node _T_554 = cat(_T_314[17], _T_314[16]) @[el2_lib.scala 243:14] + node _T_555 = cat(_T_314[19], _T_314[18]) @[el2_lib.scala 243:14] + node _T_556 = cat(_T_555, _T_554) @[el2_lib.scala 243:14] + node _T_557 = cat(_T_314[21], _T_314[20]) @[el2_lib.scala 243:14] + node _T_558 = cat(_T_314[23], _T_314[22]) @[el2_lib.scala 243:14] + node _T_559 = cat(_T_558, _T_557) @[el2_lib.scala 243:14] + node _T_560 = cat(_T_559, _T_556) @[el2_lib.scala 243:14] + node _T_561 = cat(_T_314[25], _T_314[24]) @[el2_lib.scala 243:14] + node _T_562 = cat(_T_314[27], _T_314[26]) @[el2_lib.scala 243:14] + node _T_563 = cat(_T_562, _T_561) @[el2_lib.scala 243:14] + node _T_564 = cat(_T_314[29], _T_314[28]) @[el2_lib.scala 243:14] + node _T_565 = cat(_T_314[31], _T_314[30]) @[el2_lib.scala 243:14] + node _T_566 = cat(_T_565, _T_564) @[el2_lib.scala 243:14] + node _T_567 = cat(_T_566, _T_563) @[el2_lib.scala 243:14] + node _T_568 = cat(_T_567, _T_560) @[el2_lib.scala 243:14] + node _T_569 = cat(_T_568, _T_553) @[el2_lib.scala 243:14] + node _T_570 = and(_T_312, _T_569) @[el2_lsu_trigger.scala 19:87] + node _T_571 = eq(io.lsu_pkt_m.dma, UInt<1>("h00")) @[el2_lsu_trigger.scala 18:71] + node _T_572 = and(io.lsu_pkt_m.valid, _T_571) @[el2_lsu_trigger.scala 18:69] + node _T_573 = and(io.trigger_pkt_any[2].store, io.lsu_pkt_m.store) @[el2_lsu_trigger.scala 18:121] + node _T_574 = and(io.trigger_pkt_any[2].load, io.lsu_pkt_m.load) @[el2_lsu_trigger.scala 19:33] + node _T_575 = eq(io.trigger_pkt_any[2].select, UInt<1>("h00")) @[el2_lsu_trigger.scala 19:55] + node _T_576 = and(_T_574, _T_575) @[el2_lsu_trigger.scala 19:53] + node _T_577 = or(_T_573, _T_576) @[el2_lsu_trigger.scala 18:142] + node _T_578 = and(_T_572, _T_577) @[el2_lsu_trigger.scala 18:89] + node _T_579 = bits(io.trigger_pkt_any[2].match_, 0, 0) @[el2_lsu_trigger.scala 20:104] + wire _T_580 : UInt<1>[32] @[el2_lib.scala 238:24] + node _T_581 = andr(io.trigger_pkt_any[2].tdata2) @[el2_lib.scala 239:45] + node _T_582 = not(_T_581) @[el2_lib.scala 239:39] + node _T_583 = and(_T_579, _T_582) @[el2_lib.scala 239:37] + node _T_584 = bits(io.trigger_pkt_any[2].tdata2, 0, 0) @[el2_lib.scala 240:48] + node _T_585 = bits(lsu_match_data_2, 0, 0) @[el2_lib.scala 240:60] + node _T_586 = eq(_T_584, _T_585) @[el2_lib.scala 240:52] + node _T_587 = or(_T_583, _T_586) @[el2_lib.scala 240:41] + _T_580[0] <= _T_587 @[el2_lib.scala 240:18] + node _T_588 = bits(io.trigger_pkt_any[2].tdata2, 0, 0) @[el2_lib.scala 242:28] + node _T_589 = andr(_T_588) @[el2_lib.scala 242:36] + node _T_590 = and(_T_589, _T_583) @[el2_lib.scala 242:41] + node _T_591 = bits(io.trigger_pkt_any[2].tdata2, 1, 1) @[el2_lib.scala 242:74] + node _T_592 = bits(lsu_match_data_2, 1, 1) @[el2_lib.scala 242:86] + node _T_593 = eq(_T_591, _T_592) @[el2_lib.scala 242:78] + node _T_594 = mux(_T_590, UInt<1>("h01"), _T_593) @[el2_lib.scala 242:23] + _T_580[1] <= _T_594 @[el2_lib.scala 242:17] + node _T_595 = bits(io.trigger_pkt_any[2].tdata2, 1, 0) @[el2_lib.scala 242:28] + node _T_596 = andr(_T_595) @[el2_lib.scala 242:36] + node _T_597 = and(_T_596, _T_583) @[el2_lib.scala 242:41] + node _T_598 = bits(io.trigger_pkt_any[2].tdata2, 2, 2) @[el2_lib.scala 242:74] + node _T_599 = bits(lsu_match_data_2, 2, 2) @[el2_lib.scala 242:86] + node _T_600 = eq(_T_598, _T_599) @[el2_lib.scala 242:78] + node _T_601 = mux(_T_597, UInt<1>("h01"), _T_600) @[el2_lib.scala 242:23] + _T_580[2] <= _T_601 @[el2_lib.scala 242:17] + node _T_602 = bits(io.trigger_pkt_any[2].tdata2, 2, 0) @[el2_lib.scala 242:28] + node _T_603 = andr(_T_602) @[el2_lib.scala 242:36] + node _T_604 = and(_T_603, _T_583) @[el2_lib.scala 242:41] + node _T_605 = bits(io.trigger_pkt_any[2].tdata2, 3, 3) @[el2_lib.scala 242:74] + node _T_606 = bits(lsu_match_data_2, 3, 3) @[el2_lib.scala 242:86] + node _T_607 = eq(_T_605, _T_606) @[el2_lib.scala 242:78] + node _T_608 = mux(_T_604, UInt<1>("h01"), _T_607) @[el2_lib.scala 242:23] + _T_580[3] <= _T_608 @[el2_lib.scala 242:17] + node _T_609 = bits(io.trigger_pkt_any[2].tdata2, 3, 0) @[el2_lib.scala 242:28] + node _T_610 = andr(_T_609) @[el2_lib.scala 242:36] + node _T_611 = and(_T_610, _T_583) @[el2_lib.scala 242:41] + node _T_612 = bits(io.trigger_pkt_any[2].tdata2, 4, 4) @[el2_lib.scala 242:74] + node _T_613 = bits(lsu_match_data_2, 4, 4) @[el2_lib.scala 242:86] + node _T_614 = eq(_T_612, _T_613) @[el2_lib.scala 242:78] + node _T_615 = mux(_T_611, UInt<1>("h01"), _T_614) @[el2_lib.scala 242:23] + _T_580[4] <= _T_615 @[el2_lib.scala 242:17] + node _T_616 = bits(io.trigger_pkt_any[2].tdata2, 4, 0) @[el2_lib.scala 242:28] + node _T_617 = andr(_T_616) @[el2_lib.scala 242:36] + node _T_618 = and(_T_617, _T_583) @[el2_lib.scala 242:41] + node _T_619 = bits(io.trigger_pkt_any[2].tdata2, 5, 5) @[el2_lib.scala 242:74] + node _T_620 = bits(lsu_match_data_2, 5, 5) @[el2_lib.scala 242:86] + node _T_621 = eq(_T_619, _T_620) @[el2_lib.scala 242:78] + node _T_622 = mux(_T_618, UInt<1>("h01"), _T_621) @[el2_lib.scala 242:23] + _T_580[5] <= _T_622 @[el2_lib.scala 242:17] + node _T_623 = bits(io.trigger_pkt_any[2].tdata2, 5, 0) @[el2_lib.scala 242:28] + node _T_624 = andr(_T_623) @[el2_lib.scala 242:36] + node _T_625 = and(_T_624, _T_583) @[el2_lib.scala 242:41] + node _T_626 = bits(io.trigger_pkt_any[2].tdata2, 6, 6) @[el2_lib.scala 242:74] + node _T_627 = bits(lsu_match_data_2, 6, 6) @[el2_lib.scala 242:86] + node _T_628 = eq(_T_626, _T_627) @[el2_lib.scala 242:78] + node _T_629 = mux(_T_625, UInt<1>("h01"), _T_628) @[el2_lib.scala 242:23] + _T_580[6] <= _T_629 @[el2_lib.scala 242:17] + node _T_630 = bits(io.trigger_pkt_any[2].tdata2, 6, 0) @[el2_lib.scala 242:28] + node _T_631 = andr(_T_630) @[el2_lib.scala 242:36] + node _T_632 = and(_T_631, _T_583) @[el2_lib.scala 242:41] + node _T_633 = bits(io.trigger_pkt_any[2].tdata2, 7, 7) @[el2_lib.scala 242:74] + node _T_634 = bits(lsu_match_data_2, 7, 7) @[el2_lib.scala 242:86] + node _T_635 = eq(_T_633, _T_634) @[el2_lib.scala 242:78] + node _T_636 = mux(_T_632, UInt<1>("h01"), _T_635) @[el2_lib.scala 242:23] + _T_580[7] <= _T_636 @[el2_lib.scala 242:17] + node _T_637 = bits(io.trigger_pkt_any[2].tdata2, 7, 0) @[el2_lib.scala 242:28] + node _T_638 = andr(_T_637) @[el2_lib.scala 242:36] + node _T_639 = and(_T_638, _T_583) @[el2_lib.scala 242:41] + node _T_640 = bits(io.trigger_pkt_any[2].tdata2, 8, 8) @[el2_lib.scala 242:74] + node _T_641 = bits(lsu_match_data_2, 8, 8) @[el2_lib.scala 242:86] + node _T_642 = eq(_T_640, _T_641) @[el2_lib.scala 242:78] + node _T_643 = mux(_T_639, UInt<1>("h01"), _T_642) @[el2_lib.scala 242:23] + _T_580[8] <= _T_643 @[el2_lib.scala 242:17] + node _T_644 = bits(io.trigger_pkt_any[2].tdata2, 8, 0) @[el2_lib.scala 242:28] + node _T_645 = andr(_T_644) @[el2_lib.scala 242:36] + node _T_646 = and(_T_645, _T_583) @[el2_lib.scala 242:41] + node _T_647 = bits(io.trigger_pkt_any[2].tdata2, 9, 9) @[el2_lib.scala 242:74] + node _T_648 = bits(lsu_match_data_2, 9, 9) @[el2_lib.scala 242:86] + node _T_649 = eq(_T_647, _T_648) @[el2_lib.scala 242:78] + node _T_650 = mux(_T_646, UInt<1>("h01"), _T_649) @[el2_lib.scala 242:23] + _T_580[9] <= _T_650 @[el2_lib.scala 242:17] + node _T_651 = bits(io.trigger_pkt_any[2].tdata2, 9, 0) @[el2_lib.scala 242:28] + node _T_652 = andr(_T_651) @[el2_lib.scala 242:36] + node _T_653 = and(_T_652, _T_583) @[el2_lib.scala 242:41] + node _T_654 = bits(io.trigger_pkt_any[2].tdata2, 10, 10) @[el2_lib.scala 242:74] + node _T_655 = bits(lsu_match_data_2, 10, 10) @[el2_lib.scala 242:86] + node _T_656 = eq(_T_654, _T_655) @[el2_lib.scala 242:78] + node _T_657 = mux(_T_653, UInt<1>("h01"), _T_656) @[el2_lib.scala 242:23] + _T_580[10] <= _T_657 @[el2_lib.scala 242:17] + node _T_658 = bits(io.trigger_pkt_any[2].tdata2, 10, 0) @[el2_lib.scala 242:28] + node _T_659 = andr(_T_658) @[el2_lib.scala 242:36] + node _T_660 = and(_T_659, _T_583) @[el2_lib.scala 242:41] + node _T_661 = bits(io.trigger_pkt_any[2].tdata2, 11, 11) @[el2_lib.scala 242:74] + node _T_662 = bits(lsu_match_data_2, 11, 11) @[el2_lib.scala 242:86] + node _T_663 = eq(_T_661, _T_662) @[el2_lib.scala 242:78] + node _T_664 = mux(_T_660, UInt<1>("h01"), _T_663) @[el2_lib.scala 242:23] + _T_580[11] <= _T_664 @[el2_lib.scala 242:17] + node _T_665 = bits(io.trigger_pkt_any[2].tdata2, 11, 0) @[el2_lib.scala 242:28] + node _T_666 = andr(_T_665) @[el2_lib.scala 242:36] + node _T_667 = and(_T_666, _T_583) @[el2_lib.scala 242:41] + node _T_668 = bits(io.trigger_pkt_any[2].tdata2, 12, 12) @[el2_lib.scala 242:74] + node _T_669 = bits(lsu_match_data_2, 12, 12) @[el2_lib.scala 242:86] + node _T_670 = eq(_T_668, _T_669) @[el2_lib.scala 242:78] + node _T_671 = mux(_T_667, UInt<1>("h01"), _T_670) @[el2_lib.scala 242:23] + _T_580[12] <= _T_671 @[el2_lib.scala 242:17] + node _T_672 = bits(io.trigger_pkt_any[2].tdata2, 12, 0) @[el2_lib.scala 242:28] + node _T_673 = andr(_T_672) @[el2_lib.scala 242:36] + node _T_674 = and(_T_673, _T_583) @[el2_lib.scala 242:41] + node _T_675 = bits(io.trigger_pkt_any[2].tdata2, 13, 13) @[el2_lib.scala 242:74] + node _T_676 = bits(lsu_match_data_2, 13, 13) @[el2_lib.scala 242:86] + node _T_677 = eq(_T_675, _T_676) @[el2_lib.scala 242:78] + node _T_678 = mux(_T_674, UInt<1>("h01"), _T_677) @[el2_lib.scala 242:23] + _T_580[13] <= _T_678 @[el2_lib.scala 242:17] + node _T_679 = bits(io.trigger_pkt_any[2].tdata2, 13, 0) @[el2_lib.scala 242:28] + node _T_680 = andr(_T_679) @[el2_lib.scala 242:36] + node _T_681 = and(_T_680, _T_583) @[el2_lib.scala 242:41] + node _T_682 = bits(io.trigger_pkt_any[2].tdata2, 14, 14) @[el2_lib.scala 242:74] + node _T_683 = bits(lsu_match_data_2, 14, 14) @[el2_lib.scala 242:86] + node _T_684 = eq(_T_682, _T_683) @[el2_lib.scala 242:78] + node _T_685 = mux(_T_681, UInt<1>("h01"), _T_684) @[el2_lib.scala 242:23] + _T_580[14] <= _T_685 @[el2_lib.scala 242:17] + node _T_686 = bits(io.trigger_pkt_any[2].tdata2, 14, 0) @[el2_lib.scala 242:28] + node _T_687 = andr(_T_686) @[el2_lib.scala 242:36] + node _T_688 = and(_T_687, _T_583) @[el2_lib.scala 242:41] + node _T_689 = bits(io.trigger_pkt_any[2].tdata2, 15, 15) @[el2_lib.scala 242:74] + node _T_690 = bits(lsu_match_data_2, 15, 15) @[el2_lib.scala 242:86] + node _T_691 = eq(_T_689, _T_690) @[el2_lib.scala 242:78] + node _T_692 = mux(_T_688, UInt<1>("h01"), _T_691) @[el2_lib.scala 242:23] + _T_580[15] <= _T_692 @[el2_lib.scala 242:17] + node _T_693 = bits(io.trigger_pkt_any[2].tdata2, 15, 0) @[el2_lib.scala 242:28] + node _T_694 = andr(_T_693) @[el2_lib.scala 242:36] + node _T_695 = and(_T_694, _T_583) @[el2_lib.scala 242:41] + node _T_696 = bits(io.trigger_pkt_any[2].tdata2, 16, 16) @[el2_lib.scala 242:74] + node _T_697 = bits(lsu_match_data_2, 16, 16) @[el2_lib.scala 242:86] + node _T_698 = eq(_T_696, _T_697) @[el2_lib.scala 242:78] + node _T_699 = mux(_T_695, UInt<1>("h01"), _T_698) @[el2_lib.scala 242:23] + _T_580[16] <= _T_699 @[el2_lib.scala 242:17] + node _T_700 = bits(io.trigger_pkt_any[2].tdata2, 16, 0) @[el2_lib.scala 242:28] + node _T_701 = andr(_T_700) @[el2_lib.scala 242:36] + node _T_702 = and(_T_701, _T_583) @[el2_lib.scala 242:41] + node _T_703 = bits(io.trigger_pkt_any[2].tdata2, 17, 17) @[el2_lib.scala 242:74] + node _T_704 = bits(lsu_match_data_2, 17, 17) @[el2_lib.scala 242:86] + node _T_705 = eq(_T_703, _T_704) @[el2_lib.scala 242:78] + node _T_706 = mux(_T_702, UInt<1>("h01"), _T_705) @[el2_lib.scala 242:23] + _T_580[17] <= _T_706 @[el2_lib.scala 242:17] + node _T_707 = bits(io.trigger_pkt_any[2].tdata2, 17, 0) @[el2_lib.scala 242:28] + node _T_708 = andr(_T_707) @[el2_lib.scala 242:36] + node _T_709 = and(_T_708, _T_583) @[el2_lib.scala 242:41] + node _T_710 = bits(io.trigger_pkt_any[2].tdata2, 18, 18) @[el2_lib.scala 242:74] + node _T_711 = bits(lsu_match_data_2, 18, 18) @[el2_lib.scala 242:86] + node _T_712 = eq(_T_710, _T_711) @[el2_lib.scala 242:78] + node _T_713 = mux(_T_709, UInt<1>("h01"), _T_712) @[el2_lib.scala 242:23] + _T_580[18] <= _T_713 @[el2_lib.scala 242:17] + node _T_714 = bits(io.trigger_pkt_any[2].tdata2, 18, 0) @[el2_lib.scala 242:28] + node _T_715 = andr(_T_714) @[el2_lib.scala 242:36] + node _T_716 = and(_T_715, _T_583) @[el2_lib.scala 242:41] + node _T_717 = bits(io.trigger_pkt_any[2].tdata2, 19, 19) @[el2_lib.scala 242:74] + node _T_718 = bits(lsu_match_data_2, 19, 19) @[el2_lib.scala 242:86] + node _T_719 = eq(_T_717, _T_718) @[el2_lib.scala 242:78] + node _T_720 = mux(_T_716, UInt<1>("h01"), _T_719) @[el2_lib.scala 242:23] + _T_580[19] <= _T_720 @[el2_lib.scala 242:17] + node _T_721 = bits(io.trigger_pkt_any[2].tdata2, 19, 0) @[el2_lib.scala 242:28] + node _T_722 = andr(_T_721) @[el2_lib.scala 242:36] + node _T_723 = and(_T_722, _T_583) @[el2_lib.scala 242:41] + node _T_724 = bits(io.trigger_pkt_any[2].tdata2, 20, 20) @[el2_lib.scala 242:74] + node _T_725 = bits(lsu_match_data_2, 20, 20) @[el2_lib.scala 242:86] + node _T_726 = eq(_T_724, _T_725) @[el2_lib.scala 242:78] + node _T_727 = mux(_T_723, UInt<1>("h01"), _T_726) @[el2_lib.scala 242:23] + _T_580[20] <= _T_727 @[el2_lib.scala 242:17] + node _T_728 = bits(io.trigger_pkt_any[2].tdata2, 20, 0) @[el2_lib.scala 242:28] + node _T_729 = andr(_T_728) @[el2_lib.scala 242:36] + node _T_730 = and(_T_729, _T_583) @[el2_lib.scala 242:41] + node _T_731 = bits(io.trigger_pkt_any[2].tdata2, 21, 21) @[el2_lib.scala 242:74] + node _T_732 = bits(lsu_match_data_2, 21, 21) @[el2_lib.scala 242:86] + node _T_733 = eq(_T_731, _T_732) @[el2_lib.scala 242:78] + node _T_734 = mux(_T_730, UInt<1>("h01"), _T_733) @[el2_lib.scala 242:23] + _T_580[21] <= _T_734 @[el2_lib.scala 242:17] + node _T_735 = bits(io.trigger_pkt_any[2].tdata2, 21, 0) @[el2_lib.scala 242:28] + node _T_736 = andr(_T_735) @[el2_lib.scala 242:36] + node _T_737 = and(_T_736, _T_583) @[el2_lib.scala 242:41] + node _T_738 = bits(io.trigger_pkt_any[2].tdata2, 22, 22) @[el2_lib.scala 242:74] + node _T_739 = bits(lsu_match_data_2, 22, 22) @[el2_lib.scala 242:86] + node _T_740 = eq(_T_738, _T_739) @[el2_lib.scala 242:78] + node _T_741 = mux(_T_737, UInt<1>("h01"), _T_740) @[el2_lib.scala 242:23] + _T_580[22] <= _T_741 @[el2_lib.scala 242:17] + node _T_742 = bits(io.trigger_pkt_any[2].tdata2, 22, 0) @[el2_lib.scala 242:28] + node _T_743 = andr(_T_742) @[el2_lib.scala 242:36] + node _T_744 = and(_T_743, _T_583) @[el2_lib.scala 242:41] + node _T_745 = bits(io.trigger_pkt_any[2].tdata2, 23, 23) @[el2_lib.scala 242:74] + node _T_746 = bits(lsu_match_data_2, 23, 23) @[el2_lib.scala 242:86] + node _T_747 = eq(_T_745, _T_746) @[el2_lib.scala 242:78] + node _T_748 = mux(_T_744, UInt<1>("h01"), _T_747) @[el2_lib.scala 242:23] + _T_580[23] <= _T_748 @[el2_lib.scala 242:17] + node _T_749 = bits(io.trigger_pkt_any[2].tdata2, 23, 0) @[el2_lib.scala 242:28] + node _T_750 = andr(_T_749) @[el2_lib.scala 242:36] + node _T_751 = and(_T_750, _T_583) @[el2_lib.scala 242:41] + node _T_752 = bits(io.trigger_pkt_any[2].tdata2, 24, 24) @[el2_lib.scala 242:74] + node _T_753 = bits(lsu_match_data_2, 24, 24) @[el2_lib.scala 242:86] + node _T_754 = eq(_T_752, _T_753) @[el2_lib.scala 242:78] + node _T_755 = mux(_T_751, UInt<1>("h01"), _T_754) @[el2_lib.scala 242:23] + _T_580[24] <= _T_755 @[el2_lib.scala 242:17] + node _T_756 = bits(io.trigger_pkt_any[2].tdata2, 24, 0) @[el2_lib.scala 242:28] + node _T_757 = andr(_T_756) @[el2_lib.scala 242:36] + node _T_758 = and(_T_757, _T_583) @[el2_lib.scala 242:41] + node _T_759 = bits(io.trigger_pkt_any[2].tdata2, 25, 25) @[el2_lib.scala 242:74] + node _T_760 = bits(lsu_match_data_2, 25, 25) @[el2_lib.scala 242:86] + node _T_761 = eq(_T_759, _T_760) @[el2_lib.scala 242:78] + node _T_762 = mux(_T_758, UInt<1>("h01"), _T_761) @[el2_lib.scala 242:23] + _T_580[25] <= _T_762 @[el2_lib.scala 242:17] + node _T_763 = bits(io.trigger_pkt_any[2].tdata2, 25, 0) @[el2_lib.scala 242:28] + node _T_764 = andr(_T_763) @[el2_lib.scala 242:36] + node _T_765 = and(_T_764, _T_583) @[el2_lib.scala 242:41] + node _T_766 = bits(io.trigger_pkt_any[2].tdata2, 26, 26) @[el2_lib.scala 242:74] + node _T_767 = bits(lsu_match_data_2, 26, 26) @[el2_lib.scala 242:86] + node _T_768 = eq(_T_766, _T_767) @[el2_lib.scala 242:78] + node _T_769 = mux(_T_765, UInt<1>("h01"), _T_768) @[el2_lib.scala 242:23] + _T_580[26] <= _T_769 @[el2_lib.scala 242:17] + node _T_770 = bits(io.trigger_pkt_any[2].tdata2, 26, 0) @[el2_lib.scala 242:28] + node _T_771 = andr(_T_770) @[el2_lib.scala 242:36] + node _T_772 = and(_T_771, _T_583) @[el2_lib.scala 242:41] + node _T_773 = bits(io.trigger_pkt_any[2].tdata2, 27, 27) @[el2_lib.scala 242:74] + node _T_774 = bits(lsu_match_data_2, 27, 27) @[el2_lib.scala 242:86] + node _T_775 = eq(_T_773, _T_774) @[el2_lib.scala 242:78] + node _T_776 = mux(_T_772, UInt<1>("h01"), _T_775) @[el2_lib.scala 242:23] + _T_580[27] <= _T_776 @[el2_lib.scala 242:17] + node _T_777 = bits(io.trigger_pkt_any[2].tdata2, 27, 0) @[el2_lib.scala 242:28] + node _T_778 = andr(_T_777) @[el2_lib.scala 242:36] + node _T_779 = and(_T_778, _T_583) @[el2_lib.scala 242:41] + node _T_780 = bits(io.trigger_pkt_any[2].tdata2, 28, 28) @[el2_lib.scala 242:74] + node _T_781 = bits(lsu_match_data_2, 28, 28) @[el2_lib.scala 242:86] + node _T_782 = eq(_T_780, _T_781) @[el2_lib.scala 242:78] + node _T_783 = mux(_T_779, UInt<1>("h01"), _T_782) @[el2_lib.scala 242:23] + _T_580[28] <= _T_783 @[el2_lib.scala 242:17] + node _T_784 = bits(io.trigger_pkt_any[2].tdata2, 28, 0) @[el2_lib.scala 242:28] + node _T_785 = andr(_T_784) @[el2_lib.scala 242:36] + node _T_786 = and(_T_785, _T_583) @[el2_lib.scala 242:41] + node _T_787 = bits(io.trigger_pkt_any[2].tdata2, 29, 29) @[el2_lib.scala 242:74] + node _T_788 = bits(lsu_match_data_2, 29, 29) @[el2_lib.scala 242:86] + node _T_789 = eq(_T_787, _T_788) @[el2_lib.scala 242:78] + node _T_790 = mux(_T_786, UInt<1>("h01"), _T_789) @[el2_lib.scala 242:23] + _T_580[29] <= _T_790 @[el2_lib.scala 242:17] + node _T_791 = bits(io.trigger_pkt_any[2].tdata2, 29, 0) @[el2_lib.scala 242:28] + node _T_792 = andr(_T_791) @[el2_lib.scala 242:36] + node _T_793 = and(_T_792, _T_583) @[el2_lib.scala 242:41] + node _T_794 = bits(io.trigger_pkt_any[2].tdata2, 30, 30) @[el2_lib.scala 242:74] + node _T_795 = bits(lsu_match_data_2, 30, 30) @[el2_lib.scala 242:86] + node _T_796 = eq(_T_794, _T_795) @[el2_lib.scala 242:78] + node _T_797 = mux(_T_793, UInt<1>("h01"), _T_796) @[el2_lib.scala 242:23] + _T_580[30] <= _T_797 @[el2_lib.scala 242:17] + node _T_798 = bits(io.trigger_pkt_any[2].tdata2, 30, 0) @[el2_lib.scala 242:28] + node _T_799 = andr(_T_798) @[el2_lib.scala 242:36] + node _T_800 = and(_T_799, _T_583) @[el2_lib.scala 242:41] + node _T_801 = bits(io.trigger_pkt_any[2].tdata2, 31, 31) @[el2_lib.scala 242:74] + node _T_802 = bits(lsu_match_data_2, 31, 31) @[el2_lib.scala 242:86] + node _T_803 = eq(_T_801, _T_802) @[el2_lib.scala 242:78] + node _T_804 = mux(_T_800, UInt<1>("h01"), _T_803) @[el2_lib.scala 242:23] + _T_580[31] <= _T_804 @[el2_lib.scala 242:17] + node _T_805 = cat(_T_580[1], _T_580[0]) @[el2_lib.scala 243:14] + node _T_806 = cat(_T_580[3], _T_580[2]) @[el2_lib.scala 243:14] + node _T_807 = cat(_T_806, _T_805) @[el2_lib.scala 243:14] + node _T_808 = cat(_T_580[5], _T_580[4]) @[el2_lib.scala 243:14] + node _T_809 = cat(_T_580[7], _T_580[6]) @[el2_lib.scala 243:14] + node _T_810 = cat(_T_809, _T_808) @[el2_lib.scala 243:14] + node _T_811 = cat(_T_810, _T_807) @[el2_lib.scala 243:14] + node _T_812 = cat(_T_580[9], _T_580[8]) @[el2_lib.scala 243:14] + node _T_813 = cat(_T_580[11], _T_580[10]) @[el2_lib.scala 243:14] + node _T_814 = cat(_T_813, _T_812) @[el2_lib.scala 243:14] + node _T_815 = cat(_T_580[13], _T_580[12]) @[el2_lib.scala 243:14] + node _T_816 = cat(_T_580[15], _T_580[14]) @[el2_lib.scala 243:14] + node _T_817 = cat(_T_816, _T_815) @[el2_lib.scala 243:14] + node _T_818 = cat(_T_817, _T_814) @[el2_lib.scala 243:14] + node _T_819 = cat(_T_818, _T_811) @[el2_lib.scala 243:14] + node _T_820 = cat(_T_580[17], _T_580[16]) @[el2_lib.scala 243:14] + node _T_821 = cat(_T_580[19], _T_580[18]) @[el2_lib.scala 243:14] + node _T_822 = cat(_T_821, _T_820) @[el2_lib.scala 243:14] + node _T_823 = cat(_T_580[21], _T_580[20]) @[el2_lib.scala 243:14] + node _T_824 = cat(_T_580[23], _T_580[22]) @[el2_lib.scala 243:14] + node _T_825 = cat(_T_824, _T_823) @[el2_lib.scala 243:14] + node _T_826 = cat(_T_825, _T_822) @[el2_lib.scala 243:14] + node _T_827 = cat(_T_580[25], _T_580[24]) @[el2_lib.scala 243:14] + node _T_828 = cat(_T_580[27], _T_580[26]) @[el2_lib.scala 243:14] + node _T_829 = cat(_T_828, _T_827) @[el2_lib.scala 243:14] + node _T_830 = cat(_T_580[29], _T_580[28]) @[el2_lib.scala 243:14] + node _T_831 = cat(_T_580[31], _T_580[30]) @[el2_lib.scala 243:14] + node _T_832 = cat(_T_831, _T_830) @[el2_lib.scala 243:14] + node _T_833 = cat(_T_832, _T_829) @[el2_lib.scala 243:14] + node _T_834 = cat(_T_833, _T_826) @[el2_lib.scala 243:14] + node _T_835 = cat(_T_834, _T_819) @[el2_lib.scala 243:14] + node _T_836 = and(_T_578, _T_835) @[el2_lsu_trigger.scala 19:87] + node _T_837 = eq(io.lsu_pkt_m.dma, UInt<1>("h00")) @[el2_lsu_trigger.scala 18:71] + node _T_838 = and(io.lsu_pkt_m.valid, _T_837) @[el2_lsu_trigger.scala 18:69] + node _T_839 = and(io.trigger_pkt_any[3].store, io.lsu_pkt_m.store) @[el2_lsu_trigger.scala 18:121] + node _T_840 = and(io.trigger_pkt_any[3].load, io.lsu_pkt_m.load) @[el2_lsu_trigger.scala 19:33] + node _T_841 = eq(io.trigger_pkt_any[3].select, UInt<1>("h00")) @[el2_lsu_trigger.scala 19:55] + node _T_842 = and(_T_840, _T_841) @[el2_lsu_trigger.scala 19:53] + node _T_843 = or(_T_839, _T_842) @[el2_lsu_trigger.scala 18:142] + node _T_844 = and(_T_838, _T_843) @[el2_lsu_trigger.scala 18:89] + node _T_845 = bits(io.trigger_pkt_any[3].match_, 0, 0) @[el2_lsu_trigger.scala 20:104] + wire _T_846 : UInt<1>[32] @[el2_lib.scala 238:24] + node _T_847 = andr(io.trigger_pkt_any[3].tdata2) @[el2_lib.scala 239:45] + node _T_848 = not(_T_847) @[el2_lib.scala 239:39] + node _T_849 = and(_T_845, _T_848) @[el2_lib.scala 239:37] + node _T_850 = bits(io.trigger_pkt_any[3].tdata2, 0, 0) @[el2_lib.scala 240:48] + node _T_851 = bits(lsu_match_data_3, 0, 0) @[el2_lib.scala 240:60] + node _T_852 = eq(_T_850, _T_851) @[el2_lib.scala 240:52] + node _T_853 = or(_T_849, _T_852) @[el2_lib.scala 240:41] + _T_846[0] <= _T_853 @[el2_lib.scala 240:18] + node _T_854 = bits(io.trigger_pkt_any[3].tdata2, 0, 0) @[el2_lib.scala 242:28] + node _T_855 = andr(_T_854) @[el2_lib.scala 242:36] + node _T_856 = and(_T_855, _T_849) @[el2_lib.scala 242:41] + node _T_857 = bits(io.trigger_pkt_any[3].tdata2, 1, 1) @[el2_lib.scala 242:74] + node _T_858 = bits(lsu_match_data_3, 1, 1) @[el2_lib.scala 242:86] + node _T_859 = eq(_T_857, _T_858) @[el2_lib.scala 242:78] + node _T_860 = mux(_T_856, UInt<1>("h01"), _T_859) @[el2_lib.scala 242:23] + _T_846[1] <= _T_860 @[el2_lib.scala 242:17] + node _T_861 = bits(io.trigger_pkt_any[3].tdata2, 1, 0) @[el2_lib.scala 242:28] + node _T_862 = andr(_T_861) @[el2_lib.scala 242:36] + node _T_863 = and(_T_862, _T_849) @[el2_lib.scala 242:41] + node _T_864 = bits(io.trigger_pkt_any[3].tdata2, 2, 2) @[el2_lib.scala 242:74] + node _T_865 = bits(lsu_match_data_3, 2, 2) @[el2_lib.scala 242:86] + node _T_866 = eq(_T_864, _T_865) @[el2_lib.scala 242:78] + node _T_867 = mux(_T_863, UInt<1>("h01"), _T_866) @[el2_lib.scala 242:23] + _T_846[2] <= _T_867 @[el2_lib.scala 242:17] + node _T_868 = bits(io.trigger_pkt_any[3].tdata2, 2, 0) @[el2_lib.scala 242:28] + node _T_869 = andr(_T_868) @[el2_lib.scala 242:36] + node _T_870 = and(_T_869, _T_849) @[el2_lib.scala 242:41] + node _T_871 = bits(io.trigger_pkt_any[3].tdata2, 3, 3) @[el2_lib.scala 242:74] + node _T_872 = bits(lsu_match_data_3, 3, 3) @[el2_lib.scala 242:86] + node _T_873 = eq(_T_871, _T_872) @[el2_lib.scala 242:78] + node _T_874 = mux(_T_870, UInt<1>("h01"), _T_873) @[el2_lib.scala 242:23] + _T_846[3] <= _T_874 @[el2_lib.scala 242:17] + node _T_875 = bits(io.trigger_pkt_any[3].tdata2, 3, 0) @[el2_lib.scala 242:28] + node _T_876 = andr(_T_875) @[el2_lib.scala 242:36] + node _T_877 = and(_T_876, _T_849) @[el2_lib.scala 242:41] + node _T_878 = bits(io.trigger_pkt_any[3].tdata2, 4, 4) @[el2_lib.scala 242:74] + node _T_879 = bits(lsu_match_data_3, 4, 4) @[el2_lib.scala 242:86] + node _T_880 = eq(_T_878, _T_879) @[el2_lib.scala 242:78] + node _T_881 = mux(_T_877, UInt<1>("h01"), _T_880) @[el2_lib.scala 242:23] + _T_846[4] <= _T_881 @[el2_lib.scala 242:17] + node _T_882 = bits(io.trigger_pkt_any[3].tdata2, 4, 0) @[el2_lib.scala 242:28] + node _T_883 = andr(_T_882) @[el2_lib.scala 242:36] + node _T_884 = and(_T_883, _T_849) @[el2_lib.scala 242:41] + node _T_885 = bits(io.trigger_pkt_any[3].tdata2, 5, 5) @[el2_lib.scala 242:74] + node _T_886 = bits(lsu_match_data_3, 5, 5) @[el2_lib.scala 242:86] + node _T_887 = eq(_T_885, _T_886) @[el2_lib.scala 242:78] + node _T_888 = mux(_T_884, UInt<1>("h01"), _T_887) @[el2_lib.scala 242:23] + _T_846[5] <= _T_888 @[el2_lib.scala 242:17] + node _T_889 = bits(io.trigger_pkt_any[3].tdata2, 5, 0) @[el2_lib.scala 242:28] + node _T_890 = andr(_T_889) @[el2_lib.scala 242:36] + node _T_891 = and(_T_890, _T_849) @[el2_lib.scala 242:41] + node _T_892 = bits(io.trigger_pkt_any[3].tdata2, 6, 6) @[el2_lib.scala 242:74] + node _T_893 = bits(lsu_match_data_3, 6, 6) @[el2_lib.scala 242:86] + node _T_894 = eq(_T_892, _T_893) @[el2_lib.scala 242:78] + node _T_895 = mux(_T_891, UInt<1>("h01"), _T_894) @[el2_lib.scala 242:23] + _T_846[6] <= _T_895 @[el2_lib.scala 242:17] + node _T_896 = bits(io.trigger_pkt_any[3].tdata2, 6, 0) @[el2_lib.scala 242:28] + node _T_897 = andr(_T_896) @[el2_lib.scala 242:36] + node _T_898 = and(_T_897, _T_849) @[el2_lib.scala 242:41] + node _T_899 = bits(io.trigger_pkt_any[3].tdata2, 7, 7) @[el2_lib.scala 242:74] + node _T_900 = bits(lsu_match_data_3, 7, 7) @[el2_lib.scala 242:86] + node _T_901 = eq(_T_899, _T_900) @[el2_lib.scala 242:78] + node _T_902 = mux(_T_898, UInt<1>("h01"), _T_901) @[el2_lib.scala 242:23] + _T_846[7] <= _T_902 @[el2_lib.scala 242:17] + node _T_903 = bits(io.trigger_pkt_any[3].tdata2, 7, 0) @[el2_lib.scala 242:28] + node _T_904 = andr(_T_903) @[el2_lib.scala 242:36] + node _T_905 = and(_T_904, _T_849) @[el2_lib.scala 242:41] + node _T_906 = bits(io.trigger_pkt_any[3].tdata2, 8, 8) @[el2_lib.scala 242:74] + node _T_907 = bits(lsu_match_data_3, 8, 8) @[el2_lib.scala 242:86] + node _T_908 = eq(_T_906, _T_907) @[el2_lib.scala 242:78] + node _T_909 = mux(_T_905, UInt<1>("h01"), _T_908) @[el2_lib.scala 242:23] + _T_846[8] <= _T_909 @[el2_lib.scala 242:17] + node _T_910 = bits(io.trigger_pkt_any[3].tdata2, 8, 0) @[el2_lib.scala 242:28] + node _T_911 = andr(_T_910) @[el2_lib.scala 242:36] + node _T_912 = and(_T_911, _T_849) @[el2_lib.scala 242:41] + node _T_913 = bits(io.trigger_pkt_any[3].tdata2, 9, 9) @[el2_lib.scala 242:74] + node _T_914 = bits(lsu_match_data_3, 9, 9) @[el2_lib.scala 242:86] + node _T_915 = eq(_T_913, _T_914) @[el2_lib.scala 242:78] + node _T_916 = mux(_T_912, UInt<1>("h01"), _T_915) @[el2_lib.scala 242:23] + _T_846[9] <= _T_916 @[el2_lib.scala 242:17] + node _T_917 = bits(io.trigger_pkt_any[3].tdata2, 9, 0) @[el2_lib.scala 242:28] + node _T_918 = andr(_T_917) @[el2_lib.scala 242:36] + node _T_919 = and(_T_918, _T_849) @[el2_lib.scala 242:41] + node _T_920 = bits(io.trigger_pkt_any[3].tdata2, 10, 10) @[el2_lib.scala 242:74] + node _T_921 = bits(lsu_match_data_3, 10, 10) @[el2_lib.scala 242:86] + node _T_922 = eq(_T_920, _T_921) @[el2_lib.scala 242:78] + node _T_923 = mux(_T_919, UInt<1>("h01"), _T_922) @[el2_lib.scala 242:23] + _T_846[10] <= _T_923 @[el2_lib.scala 242:17] + node _T_924 = bits(io.trigger_pkt_any[3].tdata2, 10, 0) @[el2_lib.scala 242:28] + node _T_925 = andr(_T_924) @[el2_lib.scala 242:36] + node _T_926 = and(_T_925, _T_849) @[el2_lib.scala 242:41] + node _T_927 = bits(io.trigger_pkt_any[3].tdata2, 11, 11) @[el2_lib.scala 242:74] + node _T_928 = bits(lsu_match_data_3, 11, 11) @[el2_lib.scala 242:86] + node _T_929 = eq(_T_927, _T_928) @[el2_lib.scala 242:78] + node _T_930 = mux(_T_926, UInt<1>("h01"), _T_929) @[el2_lib.scala 242:23] + _T_846[11] <= _T_930 @[el2_lib.scala 242:17] + node _T_931 = bits(io.trigger_pkt_any[3].tdata2, 11, 0) @[el2_lib.scala 242:28] + node _T_932 = andr(_T_931) @[el2_lib.scala 242:36] + node _T_933 = and(_T_932, _T_849) @[el2_lib.scala 242:41] + node _T_934 = bits(io.trigger_pkt_any[3].tdata2, 12, 12) @[el2_lib.scala 242:74] + node _T_935 = bits(lsu_match_data_3, 12, 12) @[el2_lib.scala 242:86] + node _T_936 = eq(_T_934, _T_935) @[el2_lib.scala 242:78] + node _T_937 = mux(_T_933, UInt<1>("h01"), _T_936) @[el2_lib.scala 242:23] + _T_846[12] <= _T_937 @[el2_lib.scala 242:17] + node _T_938 = bits(io.trigger_pkt_any[3].tdata2, 12, 0) @[el2_lib.scala 242:28] + node _T_939 = andr(_T_938) @[el2_lib.scala 242:36] + node _T_940 = and(_T_939, _T_849) @[el2_lib.scala 242:41] + node _T_941 = bits(io.trigger_pkt_any[3].tdata2, 13, 13) @[el2_lib.scala 242:74] + node _T_942 = bits(lsu_match_data_3, 13, 13) @[el2_lib.scala 242:86] + node _T_943 = eq(_T_941, _T_942) @[el2_lib.scala 242:78] + node _T_944 = mux(_T_940, UInt<1>("h01"), _T_943) @[el2_lib.scala 242:23] + _T_846[13] <= _T_944 @[el2_lib.scala 242:17] + node _T_945 = bits(io.trigger_pkt_any[3].tdata2, 13, 0) @[el2_lib.scala 242:28] + node _T_946 = andr(_T_945) @[el2_lib.scala 242:36] + node _T_947 = and(_T_946, _T_849) @[el2_lib.scala 242:41] + node _T_948 = bits(io.trigger_pkt_any[3].tdata2, 14, 14) @[el2_lib.scala 242:74] + node _T_949 = bits(lsu_match_data_3, 14, 14) @[el2_lib.scala 242:86] + node _T_950 = eq(_T_948, _T_949) @[el2_lib.scala 242:78] + node _T_951 = mux(_T_947, UInt<1>("h01"), _T_950) @[el2_lib.scala 242:23] + _T_846[14] <= _T_951 @[el2_lib.scala 242:17] + node _T_952 = bits(io.trigger_pkt_any[3].tdata2, 14, 0) @[el2_lib.scala 242:28] + node _T_953 = andr(_T_952) @[el2_lib.scala 242:36] + node _T_954 = and(_T_953, _T_849) @[el2_lib.scala 242:41] + node _T_955 = bits(io.trigger_pkt_any[3].tdata2, 15, 15) @[el2_lib.scala 242:74] + node _T_956 = bits(lsu_match_data_3, 15, 15) @[el2_lib.scala 242:86] + node _T_957 = eq(_T_955, _T_956) @[el2_lib.scala 242:78] + node _T_958 = mux(_T_954, UInt<1>("h01"), _T_957) @[el2_lib.scala 242:23] + _T_846[15] <= _T_958 @[el2_lib.scala 242:17] + node _T_959 = bits(io.trigger_pkt_any[3].tdata2, 15, 0) @[el2_lib.scala 242:28] + node _T_960 = andr(_T_959) @[el2_lib.scala 242:36] + node _T_961 = and(_T_960, _T_849) @[el2_lib.scala 242:41] + node _T_962 = bits(io.trigger_pkt_any[3].tdata2, 16, 16) @[el2_lib.scala 242:74] + node _T_963 = bits(lsu_match_data_3, 16, 16) @[el2_lib.scala 242:86] + node _T_964 = eq(_T_962, _T_963) @[el2_lib.scala 242:78] + node _T_965 = mux(_T_961, UInt<1>("h01"), _T_964) @[el2_lib.scala 242:23] + _T_846[16] <= _T_965 @[el2_lib.scala 242:17] + node _T_966 = bits(io.trigger_pkt_any[3].tdata2, 16, 0) @[el2_lib.scala 242:28] + node _T_967 = andr(_T_966) @[el2_lib.scala 242:36] + node _T_968 = and(_T_967, _T_849) @[el2_lib.scala 242:41] + node _T_969 = bits(io.trigger_pkt_any[3].tdata2, 17, 17) @[el2_lib.scala 242:74] + node _T_970 = bits(lsu_match_data_3, 17, 17) @[el2_lib.scala 242:86] + node _T_971 = eq(_T_969, _T_970) @[el2_lib.scala 242:78] + node _T_972 = mux(_T_968, UInt<1>("h01"), _T_971) @[el2_lib.scala 242:23] + _T_846[17] <= _T_972 @[el2_lib.scala 242:17] + node _T_973 = bits(io.trigger_pkt_any[3].tdata2, 17, 0) @[el2_lib.scala 242:28] + node _T_974 = andr(_T_973) @[el2_lib.scala 242:36] + node _T_975 = and(_T_974, _T_849) @[el2_lib.scala 242:41] + node _T_976 = bits(io.trigger_pkt_any[3].tdata2, 18, 18) @[el2_lib.scala 242:74] + node _T_977 = bits(lsu_match_data_3, 18, 18) @[el2_lib.scala 242:86] + node _T_978 = eq(_T_976, _T_977) @[el2_lib.scala 242:78] + node _T_979 = mux(_T_975, UInt<1>("h01"), _T_978) @[el2_lib.scala 242:23] + _T_846[18] <= _T_979 @[el2_lib.scala 242:17] + node _T_980 = bits(io.trigger_pkt_any[3].tdata2, 18, 0) @[el2_lib.scala 242:28] + node _T_981 = andr(_T_980) @[el2_lib.scala 242:36] + node _T_982 = and(_T_981, _T_849) @[el2_lib.scala 242:41] + node _T_983 = bits(io.trigger_pkt_any[3].tdata2, 19, 19) @[el2_lib.scala 242:74] + node _T_984 = bits(lsu_match_data_3, 19, 19) @[el2_lib.scala 242:86] + node _T_985 = eq(_T_983, _T_984) @[el2_lib.scala 242:78] + node _T_986 = mux(_T_982, UInt<1>("h01"), _T_985) @[el2_lib.scala 242:23] + _T_846[19] <= _T_986 @[el2_lib.scala 242:17] + node _T_987 = bits(io.trigger_pkt_any[3].tdata2, 19, 0) @[el2_lib.scala 242:28] + node _T_988 = andr(_T_987) @[el2_lib.scala 242:36] + node _T_989 = and(_T_988, _T_849) @[el2_lib.scala 242:41] + node _T_990 = bits(io.trigger_pkt_any[3].tdata2, 20, 20) @[el2_lib.scala 242:74] + node _T_991 = bits(lsu_match_data_3, 20, 20) @[el2_lib.scala 242:86] + node _T_992 = eq(_T_990, _T_991) @[el2_lib.scala 242:78] + node _T_993 = mux(_T_989, UInt<1>("h01"), _T_992) @[el2_lib.scala 242:23] + _T_846[20] <= _T_993 @[el2_lib.scala 242:17] + node _T_994 = bits(io.trigger_pkt_any[3].tdata2, 20, 0) @[el2_lib.scala 242:28] + node _T_995 = andr(_T_994) @[el2_lib.scala 242:36] + node _T_996 = and(_T_995, _T_849) @[el2_lib.scala 242:41] + node _T_997 = bits(io.trigger_pkt_any[3].tdata2, 21, 21) @[el2_lib.scala 242:74] + node _T_998 = bits(lsu_match_data_3, 21, 21) @[el2_lib.scala 242:86] + node _T_999 = eq(_T_997, _T_998) @[el2_lib.scala 242:78] + node _T_1000 = mux(_T_996, UInt<1>("h01"), _T_999) @[el2_lib.scala 242:23] + _T_846[21] <= _T_1000 @[el2_lib.scala 242:17] + node _T_1001 = bits(io.trigger_pkt_any[3].tdata2, 21, 0) @[el2_lib.scala 242:28] + node _T_1002 = andr(_T_1001) @[el2_lib.scala 242:36] + node _T_1003 = and(_T_1002, _T_849) @[el2_lib.scala 242:41] + node _T_1004 = bits(io.trigger_pkt_any[3].tdata2, 22, 22) @[el2_lib.scala 242:74] + node _T_1005 = bits(lsu_match_data_3, 22, 22) @[el2_lib.scala 242:86] + node _T_1006 = eq(_T_1004, _T_1005) @[el2_lib.scala 242:78] + node _T_1007 = mux(_T_1003, UInt<1>("h01"), _T_1006) @[el2_lib.scala 242:23] + _T_846[22] <= _T_1007 @[el2_lib.scala 242:17] + node _T_1008 = bits(io.trigger_pkt_any[3].tdata2, 22, 0) @[el2_lib.scala 242:28] + node _T_1009 = andr(_T_1008) @[el2_lib.scala 242:36] + node _T_1010 = and(_T_1009, _T_849) @[el2_lib.scala 242:41] + node _T_1011 = bits(io.trigger_pkt_any[3].tdata2, 23, 23) @[el2_lib.scala 242:74] + node _T_1012 = bits(lsu_match_data_3, 23, 23) @[el2_lib.scala 242:86] + node _T_1013 = eq(_T_1011, _T_1012) @[el2_lib.scala 242:78] + node _T_1014 = mux(_T_1010, UInt<1>("h01"), _T_1013) @[el2_lib.scala 242:23] + _T_846[23] <= _T_1014 @[el2_lib.scala 242:17] + node _T_1015 = bits(io.trigger_pkt_any[3].tdata2, 23, 0) @[el2_lib.scala 242:28] + node _T_1016 = andr(_T_1015) @[el2_lib.scala 242:36] + node _T_1017 = and(_T_1016, _T_849) @[el2_lib.scala 242:41] + node _T_1018 = bits(io.trigger_pkt_any[3].tdata2, 24, 24) @[el2_lib.scala 242:74] + node _T_1019 = bits(lsu_match_data_3, 24, 24) @[el2_lib.scala 242:86] + node _T_1020 = eq(_T_1018, _T_1019) @[el2_lib.scala 242:78] + node _T_1021 = mux(_T_1017, UInt<1>("h01"), _T_1020) @[el2_lib.scala 242:23] + _T_846[24] <= _T_1021 @[el2_lib.scala 242:17] + node _T_1022 = bits(io.trigger_pkt_any[3].tdata2, 24, 0) @[el2_lib.scala 242:28] + node _T_1023 = andr(_T_1022) @[el2_lib.scala 242:36] + node _T_1024 = and(_T_1023, _T_849) @[el2_lib.scala 242:41] + node _T_1025 = bits(io.trigger_pkt_any[3].tdata2, 25, 25) @[el2_lib.scala 242:74] + node _T_1026 = bits(lsu_match_data_3, 25, 25) @[el2_lib.scala 242:86] + node _T_1027 = eq(_T_1025, _T_1026) @[el2_lib.scala 242:78] + node _T_1028 = mux(_T_1024, UInt<1>("h01"), _T_1027) @[el2_lib.scala 242:23] + _T_846[25] <= _T_1028 @[el2_lib.scala 242:17] + node _T_1029 = bits(io.trigger_pkt_any[3].tdata2, 25, 0) @[el2_lib.scala 242:28] + node _T_1030 = andr(_T_1029) @[el2_lib.scala 242:36] + node _T_1031 = and(_T_1030, _T_849) @[el2_lib.scala 242:41] + node _T_1032 = bits(io.trigger_pkt_any[3].tdata2, 26, 26) @[el2_lib.scala 242:74] + node _T_1033 = bits(lsu_match_data_3, 26, 26) @[el2_lib.scala 242:86] + node _T_1034 = eq(_T_1032, _T_1033) @[el2_lib.scala 242:78] + node _T_1035 = mux(_T_1031, UInt<1>("h01"), _T_1034) @[el2_lib.scala 242:23] + _T_846[26] <= _T_1035 @[el2_lib.scala 242:17] + node _T_1036 = bits(io.trigger_pkt_any[3].tdata2, 26, 0) @[el2_lib.scala 242:28] + node _T_1037 = andr(_T_1036) @[el2_lib.scala 242:36] + node _T_1038 = and(_T_1037, _T_849) @[el2_lib.scala 242:41] + node _T_1039 = bits(io.trigger_pkt_any[3].tdata2, 27, 27) @[el2_lib.scala 242:74] + node _T_1040 = bits(lsu_match_data_3, 27, 27) @[el2_lib.scala 242:86] + node _T_1041 = eq(_T_1039, _T_1040) @[el2_lib.scala 242:78] + node _T_1042 = mux(_T_1038, UInt<1>("h01"), _T_1041) @[el2_lib.scala 242:23] + _T_846[27] <= _T_1042 @[el2_lib.scala 242:17] + node _T_1043 = bits(io.trigger_pkt_any[3].tdata2, 27, 0) @[el2_lib.scala 242:28] + node _T_1044 = andr(_T_1043) @[el2_lib.scala 242:36] + node _T_1045 = and(_T_1044, _T_849) @[el2_lib.scala 242:41] + node _T_1046 = bits(io.trigger_pkt_any[3].tdata2, 28, 28) @[el2_lib.scala 242:74] + node _T_1047 = bits(lsu_match_data_3, 28, 28) @[el2_lib.scala 242:86] + node _T_1048 = eq(_T_1046, _T_1047) @[el2_lib.scala 242:78] + node _T_1049 = mux(_T_1045, UInt<1>("h01"), _T_1048) @[el2_lib.scala 242:23] + _T_846[28] <= _T_1049 @[el2_lib.scala 242:17] + node _T_1050 = bits(io.trigger_pkt_any[3].tdata2, 28, 0) @[el2_lib.scala 242:28] + node _T_1051 = andr(_T_1050) @[el2_lib.scala 242:36] + node _T_1052 = and(_T_1051, _T_849) @[el2_lib.scala 242:41] + node _T_1053 = bits(io.trigger_pkt_any[3].tdata2, 29, 29) @[el2_lib.scala 242:74] + node _T_1054 = bits(lsu_match_data_3, 29, 29) @[el2_lib.scala 242:86] + node _T_1055 = eq(_T_1053, _T_1054) @[el2_lib.scala 242:78] + node _T_1056 = mux(_T_1052, UInt<1>("h01"), _T_1055) @[el2_lib.scala 242:23] + _T_846[29] <= _T_1056 @[el2_lib.scala 242:17] + node _T_1057 = bits(io.trigger_pkt_any[3].tdata2, 29, 0) @[el2_lib.scala 242:28] + node _T_1058 = andr(_T_1057) @[el2_lib.scala 242:36] + node _T_1059 = and(_T_1058, _T_849) @[el2_lib.scala 242:41] + node _T_1060 = bits(io.trigger_pkt_any[3].tdata2, 30, 30) @[el2_lib.scala 242:74] + node _T_1061 = bits(lsu_match_data_3, 30, 30) @[el2_lib.scala 242:86] + node _T_1062 = eq(_T_1060, _T_1061) @[el2_lib.scala 242:78] + node _T_1063 = mux(_T_1059, UInt<1>("h01"), _T_1062) @[el2_lib.scala 242:23] + _T_846[30] <= _T_1063 @[el2_lib.scala 242:17] + node _T_1064 = bits(io.trigger_pkt_any[3].tdata2, 30, 0) @[el2_lib.scala 242:28] + node _T_1065 = andr(_T_1064) @[el2_lib.scala 242:36] + node _T_1066 = and(_T_1065, _T_849) @[el2_lib.scala 242:41] + node _T_1067 = bits(io.trigger_pkt_any[3].tdata2, 31, 31) @[el2_lib.scala 242:74] + node _T_1068 = bits(lsu_match_data_3, 31, 31) @[el2_lib.scala 242:86] + node _T_1069 = eq(_T_1067, _T_1068) @[el2_lib.scala 242:78] + node _T_1070 = mux(_T_1066, UInt<1>("h01"), _T_1069) @[el2_lib.scala 242:23] + _T_846[31] <= _T_1070 @[el2_lib.scala 242:17] + node _T_1071 = cat(_T_846[1], _T_846[0]) @[el2_lib.scala 243:14] + node _T_1072 = cat(_T_846[3], _T_846[2]) @[el2_lib.scala 243:14] + node _T_1073 = cat(_T_1072, _T_1071) @[el2_lib.scala 243:14] + node _T_1074 = cat(_T_846[5], _T_846[4]) @[el2_lib.scala 243:14] + node _T_1075 = cat(_T_846[7], _T_846[6]) @[el2_lib.scala 243:14] + node _T_1076 = cat(_T_1075, _T_1074) @[el2_lib.scala 243:14] + node _T_1077 = cat(_T_1076, _T_1073) @[el2_lib.scala 243:14] + node _T_1078 = cat(_T_846[9], _T_846[8]) @[el2_lib.scala 243:14] + node _T_1079 = cat(_T_846[11], _T_846[10]) @[el2_lib.scala 243:14] + node _T_1080 = cat(_T_1079, _T_1078) @[el2_lib.scala 243:14] + node _T_1081 = cat(_T_846[13], _T_846[12]) @[el2_lib.scala 243:14] + node _T_1082 = cat(_T_846[15], _T_846[14]) @[el2_lib.scala 243:14] + node _T_1083 = cat(_T_1082, _T_1081) @[el2_lib.scala 243:14] + node _T_1084 = cat(_T_1083, _T_1080) @[el2_lib.scala 243:14] + node _T_1085 = cat(_T_1084, _T_1077) @[el2_lib.scala 243:14] + node _T_1086 = cat(_T_846[17], _T_846[16]) @[el2_lib.scala 243:14] + node _T_1087 = cat(_T_846[19], _T_846[18]) @[el2_lib.scala 243:14] + node _T_1088 = cat(_T_1087, _T_1086) @[el2_lib.scala 243:14] + node _T_1089 = cat(_T_846[21], _T_846[20]) @[el2_lib.scala 243:14] + node _T_1090 = cat(_T_846[23], _T_846[22]) @[el2_lib.scala 243:14] + node _T_1091 = cat(_T_1090, _T_1089) @[el2_lib.scala 243:14] + node _T_1092 = cat(_T_1091, _T_1088) @[el2_lib.scala 243:14] + node _T_1093 = cat(_T_846[25], _T_846[24]) @[el2_lib.scala 243:14] + node _T_1094 = cat(_T_846[27], _T_846[26]) @[el2_lib.scala 243:14] + node _T_1095 = cat(_T_1094, _T_1093) @[el2_lib.scala 243:14] + node _T_1096 = cat(_T_846[29], _T_846[28]) @[el2_lib.scala 243:14] + node _T_1097 = cat(_T_846[31], _T_846[30]) @[el2_lib.scala 243:14] + node _T_1098 = cat(_T_1097, _T_1096) @[el2_lib.scala 243:14] + node _T_1099 = cat(_T_1098, _T_1095) @[el2_lib.scala 243:14] + node _T_1100 = cat(_T_1099, _T_1092) @[el2_lib.scala 243:14] + node _T_1101 = cat(_T_1100, _T_1085) @[el2_lib.scala 243:14] + node _T_1102 = and(_T_844, _T_1101) @[el2_lsu_trigger.scala 19:87] + node _T_1103 = cat(_T_1102, _T_836) @[Cat.scala 29:58] + node _T_1104 = cat(_T_1103, _T_570) @[Cat.scala 29:58] + node _T_1105 = cat(_T_1104, _T_304) @[Cat.scala 29:58] + io.lsu_trigger_match_m <= _T_1105 @[el2_lsu_trigger.scala 18:26] + + extmodule TEC_RV_ICG_12 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_12 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_12 @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + extmodule TEC_RV_ICG_13 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_13 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_13 @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + extmodule TEC_RV_ICG_14 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_14 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_14 @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + extmodule TEC_RV_ICG_15 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_15 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_15 @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + extmodule TEC_RV_ICG_16 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_16 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_16 @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + extmodule TEC_RV_ICG_17 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_17 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_17 @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + extmodule TEC_RV_ICG_18 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_18 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_18 @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + extmodule TEC_RV_ICG_19 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_19 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_19 @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + extmodule TEC_RV_ICG_20 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_20 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_20 @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + extmodule TEC_RV_ICG_21 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_21 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_21 @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + extmodule TEC_RV_ICG_22 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_22 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_22 @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + extmodule TEC_RV_ICG_23 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_23 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_23 @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + module el2_lsu_clkdomain : + input clock : Clock + input reset : AsyncReset + output io : {flip free_clk : Clock, flip clk_override : UInt<1>, flip addr_in_dccm_m : UInt<1>, flip dma_dccm_req : UInt<1>, flip ldst_stbuf_reqvld_r : UInt<1>, flip stbuf_reqvld_any : UInt<1>, flip stbuf_reqvld_flushed_any : UInt<1>, flip lsu_busreq_r : UInt<1>, flip lsu_bus_buffer_pend_any : UInt<1>, flip lsu_bus_buffer_empty_any : UInt<1>, flip lsu_stbuf_empty_any : UInt<1>, flip lsu_bus_clk_en : UInt<1>, flip lsu_p : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip lsu_pkt_d : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip lsu_pkt_m : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip lsu_pkt_r : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, lsu_c1_m_clk : Clock, lsu_c1_r_clk : Clock, lsu_c2_m_clk : Clock, lsu_c2_r_clk : Clock, lsu_store_c1_m_clk : Clock, lsu_store_c1_r_clk : Clock, lsu_stbuf_c1_clk : Clock, lsu_bus_obuf_c1_clk : Clock, lsu_bus_ibuf_c1_clk : Clock, lsu_bus_buf_c1_clk : Clock, lsu_busm_clk : Clock, lsu_free_c2_clk : Clock, flip scan_mode : UInt<1>} + + wire lsu_c1_d_clken_q : UInt<1> @[el2_lsu_clkdomain.scala 58:36] + wire lsu_c1_m_clken_q : UInt<1> @[el2_lsu_clkdomain.scala 59:36] + wire lsu_c1_r_clken_q : UInt<1> @[el2_lsu_clkdomain.scala 60:36] + wire lsu_free_c1_clken_q : UInt<1> @[el2_lsu_clkdomain.scala 61:36] + node _T = or(io.lsu_p.valid, io.dma_dccm_req) @[el2_lsu_clkdomain.scala 63:51] + node lsu_c1_d_clken = or(_T, io.clk_override) @[el2_lsu_clkdomain.scala 63:70] + node _T_1 = or(io.lsu_pkt_d.valid, lsu_c1_d_clken_q) @[el2_lsu_clkdomain.scala 64:51] + node lsu_c1_m_clken = or(_T_1, io.clk_override) @[el2_lsu_clkdomain.scala 64:70] + node _T_2 = or(io.lsu_pkt_m.valid, lsu_c1_m_clken_q) @[el2_lsu_clkdomain.scala 65:51] + node lsu_c1_r_clken = or(_T_2, io.clk_override) @[el2_lsu_clkdomain.scala 65:70] + node _T_3 = or(lsu_c1_m_clken, lsu_c1_m_clken_q) @[el2_lsu_clkdomain.scala 67:47] + node lsu_c2_m_clken = or(_T_3, io.clk_override) @[el2_lsu_clkdomain.scala 67:66] + node _T_4 = or(lsu_c1_r_clken, lsu_c1_r_clken_q) @[el2_lsu_clkdomain.scala 68:47] + node lsu_c2_r_clken = or(_T_4, io.clk_override) @[el2_lsu_clkdomain.scala 68:66] + node _T_5 = and(lsu_c1_m_clken, io.lsu_pkt_d.store) @[el2_lsu_clkdomain.scala 70:49] + node lsu_store_c1_m_clken = or(_T_5, io.clk_override) @[el2_lsu_clkdomain.scala 70:71] + node _T_6 = and(lsu_c1_r_clken, io.lsu_pkt_m.store) @[el2_lsu_clkdomain.scala 71:49] + node lsu_store_c1_r_clken = or(_T_6, io.clk_override) @[el2_lsu_clkdomain.scala 71:71] + node _T_7 = or(io.ldst_stbuf_reqvld_r, io.stbuf_reqvld_any) @[el2_lsu_clkdomain.scala 72:55] + node _T_8 = or(_T_7, io.stbuf_reqvld_flushed_any) @[el2_lsu_clkdomain.scala 72:77] + node lsu_stbuf_c1_clken = or(_T_8, io.clk_override) @[el2_lsu_clkdomain.scala 72:107] + node lsu_bus_ibuf_c1_clken = or(io.lsu_busreq_r, io.clk_override) @[el2_lsu_clkdomain.scala 73:49] + node _T_9 = or(io.lsu_bus_buffer_pend_any, io.lsu_busreq_r) @[el2_lsu_clkdomain.scala 74:61] + node _T_10 = or(_T_9, io.clk_override) @[el2_lsu_clkdomain.scala 74:79] + node lsu_bus_obuf_c1_clken = and(_T_10, io.lsu_bus_clk_en) @[el2_lsu_clkdomain.scala 74:98] + node _T_11 = eq(io.lsu_bus_buffer_empty_any, UInt<1>("h00")) @[el2_lsu_clkdomain.scala 75:33] + node _T_12 = or(_T_11, io.lsu_busreq_r) @[el2_lsu_clkdomain.scala 75:62] + node _T_13 = or(_T_12, io.clk_override) @[el2_lsu_clkdomain.scala 75:80] + node lsu_bus_buf_c1_clken = bits(_T_13, 0, 0) @[el2_lsu_clkdomain.scala 75:99] + node _T_14 = or(io.lsu_p.valid, io.lsu_pkt_d.valid) @[el2_lsu_clkdomain.scala 77:48] + node _T_15 = or(_T_14, io.lsu_pkt_m.valid) @[el2_lsu_clkdomain.scala 77:69] + node _T_16 = or(_T_15, io.lsu_pkt_r.valid) @[el2_lsu_clkdomain.scala 77:90] + node _T_17 = not(io.lsu_bus_buffer_empty_any) @[el2_lsu_clkdomain.scala 77:114] + node _T_18 = or(_T_16, _T_17) @[el2_lsu_clkdomain.scala 77:112] + node _T_19 = not(io.lsu_stbuf_empty_any) @[el2_lsu_clkdomain.scala 77:145] + node _T_20 = or(_T_18, _T_19) @[el2_lsu_clkdomain.scala 77:143] + node lsu_free_c1_clken = or(_T_20, io.clk_override) @[el2_lsu_clkdomain.scala 77:169] + node _T_21 = or(lsu_free_c1_clken, lsu_free_c1_clken_q) @[el2_lsu_clkdomain.scala 78:50] + node lsu_free_c2_clken = or(_T_21, io.clk_override) @[el2_lsu_clkdomain.scala 78:72] + reg _T_22 : UInt<1>, io.free_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_clkdomain.scala 81:60] + _T_22 <= lsu_free_c1_clken @[el2_lsu_clkdomain.scala 81:60] + lsu_free_c1_clken_q <= _T_22 @[el2_lsu_clkdomain.scala 81:26] + reg _T_23 : UInt<1>, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_clkdomain.scala 82:67] + _T_23 <= lsu_c1_d_clken @[el2_lsu_clkdomain.scala 82:67] + lsu_c1_d_clken_q <= _T_23 @[el2_lsu_clkdomain.scala 82:26] + reg _T_24 : UInt<1>, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_clkdomain.scala 83:67] + _T_24 <= lsu_c1_m_clken @[el2_lsu_clkdomain.scala 83:67] + lsu_c1_m_clken_q <= _T_24 @[el2_lsu_clkdomain.scala 83:26] + reg _T_25 : UInt<1>, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_clkdomain.scala 84:67] + _T_25 <= lsu_c1_r_clken @[el2_lsu_clkdomain.scala 84:67] + lsu_c1_r_clken_q <= _T_25 @[el2_lsu_clkdomain.scala 84:26] + node _T_26 = bits(lsu_c1_m_clken, 0, 0) @[el2_lsu_clkdomain.scala 86:59] + inst rvclkhdr of rvclkhdr_12 @[el2_lib.scala 481:22] + rvclkhdr.clock <= clock + rvclkhdr.reset <= reset + rvclkhdr.io.clk <= clock @[el2_lib.scala 482:17] + rvclkhdr.io.en <= _T_26 @[el2_lib.scala 483:16] + rvclkhdr.io.scan_mode <= io.scan_mode @[el2_lib.scala 484:23] + io.lsu_c1_m_clk <= rvclkhdr.io.l1clk @[el2_lsu_clkdomain.scala 86:26] + node _T_27 = bits(lsu_c1_r_clken, 0, 0) @[el2_lsu_clkdomain.scala 87:59] + inst rvclkhdr_1 of rvclkhdr_13 @[el2_lib.scala 481:22] + rvclkhdr_1.clock <= clock + rvclkhdr_1.reset <= reset + rvclkhdr_1.io.clk <= clock @[el2_lib.scala 482:17] + rvclkhdr_1.io.en <= _T_27 @[el2_lib.scala 483:16] + rvclkhdr_1.io.scan_mode <= io.scan_mode @[el2_lib.scala 484:23] + io.lsu_c1_r_clk <= rvclkhdr_1.io.l1clk @[el2_lsu_clkdomain.scala 87:26] + node _T_28 = bits(lsu_c2_m_clken, 0, 0) @[el2_lsu_clkdomain.scala 88:59] + inst rvclkhdr_2 of rvclkhdr_14 @[el2_lib.scala 481:22] + rvclkhdr_2.clock <= clock + rvclkhdr_2.reset <= reset + rvclkhdr_2.io.clk <= clock @[el2_lib.scala 482:17] + rvclkhdr_2.io.en <= _T_28 @[el2_lib.scala 483:16] + rvclkhdr_2.io.scan_mode <= io.scan_mode @[el2_lib.scala 484:23] + io.lsu_c2_m_clk <= rvclkhdr_2.io.l1clk @[el2_lsu_clkdomain.scala 88:26] + node _T_29 = bits(lsu_c2_r_clken, 0, 0) @[el2_lsu_clkdomain.scala 89:59] + inst rvclkhdr_3 of rvclkhdr_15 @[el2_lib.scala 481:22] + rvclkhdr_3.clock <= clock + rvclkhdr_3.reset <= reset + rvclkhdr_3.io.clk <= clock @[el2_lib.scala 482:17] + rvclkhdr_3.io.en <= _T_29 @[el2_lib.scala 483:16] + rvclkhdr_3.io.scan_mode <= io.scan_mode @[el2_lib.scala 484:23] + io.lsu_c2_r_clk <= rvclkhdr_3.io.l1clk @[el2_lsu_clkdomain.scala 89:26] + node _T_30 = bits(lsu_store_c1_m_clken, 0, 0) @[el2_lsu_clkdomain.scala 90:65] + inst rvclkhdr_4 of rvclkhdr_16 @[el2_lib.scala 481:22] + rvclkhdr_4.clock <= clock + rvclkhdr_4.reset <= reset + rvclkhdr_4.io.clk <= clock @[el2_lib.scala 482:17] + rvclkhdr_4.io.en <= _T_30 @[el2_lib.scala 483:16] + rvclkhdr_4.io.scan_mode <= io.scan_mode @[el2_lib.scala 484:23] + io.lsu_store_c1_m_clk <= rvclkhdr_4.io.l1clk @[el2_lsu_clkdomain.scala 90:26] + node _T_31 = bits(lsu_store_c1_r_clken, 0, 0) @[el2_lsu_clkdomain.scala 91:65] + inst rvclkhdr_5 of rvclkhdr_17 @[el2_lib.scala 481:22] + rvclkhdr_5.clock <= clock + rvclkhdr_5.reset <= reset + rvclkhdr_5.io.clk <= clock @[el2_lib.scala 482:17] + rvclkhdr_5.io.en <= _T_31 @[el2_lib.scala 483:16] + rvclkhdr_5.io.scan_mode <= io.scan_mode @[el2_lib.scala 484:23] + io.lsu_store_c1_r_clk <= rvclkhdr_5.io.l1clk @[el2_lsu_clkdomain.scala 91:26] + node _T_32 = bits(lsu_stbuf_c1_clken, 0, 0) @[el2_lsu_clkdomain.scala 92:63] + inst rvclkhdr_6 of rvclkhdr_18 @[el2_lib.scala 481:22] + rvclkhdr_6.clock <= clock + rvclkhdr_6.reset <= reset + rvclkhdr_6.io.clk <= clock @[el2_lib.scala 482:17] + rvclkhdr_6.io.en <= _T_32 @[el2_lib.scala 483:16] + rvclkhdr_6.io.scan_mode <= io.scan_mode @[el2_lib.scala 484:23] + io.lsu_stbuf_c1_clk <= rvclkhdr_6.io.l1clk @[el2_lsu_clkdomain.scala 92:26] + node _T_33 = bits(lsu_bus_ibuf_c1_clken, 0, 0) @[el2_lsu_clkdomain.scala 93:66] + inst rvclkhdr_7 of rvclkhdr_19 @[el2_lib.scala 481:22] + rvclkhdr_7.clock <= clock + rvclkhdr_7.reset <= reset + rvclkhdr_7.io.clk <= clock @[el2_lib.scala 482:17] + rvclkhdr_7.io.en <= _T_33 @[el2_lib.scala 483:16] + rvclkhdr_7.io.scan_mode <= io.scan_mode @[el2_lib.scala 484:23] + io.lsu_bus_ibuf_c1_clk <= rvclkhdr_7.io.l1clk @[el2_lsu_clkdomain.scala 93:26] + node _T_34 = bits(lsu_bus_obuf_c1_clken, 0, 0) @[el2_lsu_clkdomain.scala 94:66] + inst rvclkhdr_8 of rvclkhdr_20 @[el2_lib.scala 481:22] + rvclkhdr_8.clock <= clock + rvclkhdr_8.reset <= reset + rvclkhdr_8.io.clk <= clock @[el2_lib.scala 482:17] + rvclkhdr_8.io.en <= _T_34 @[el2_lib.scala 483:16] + rvclkhdr_8.io.scan_mode <= io.scan_mode @[el2_lib.scala 484:23] + io.lsu_bus_obuf_c1_clk <= rvclkhdr_8.io.l1clk @[el2_lsu_clkdomain.scala 94:26] + node _T_35 = bits(lsu_bus_buf_c1_clken, 0, 0) @[el2_lsu_clkdomain.scala 95:65] + inst rvclkhdr_9 of rvclkhdr_21 @[el2_lib.scala 481:22] + rvclkhdr_9.clock <= clock + rvclkhdr_9.reset <= reset + rvclkhdr_9.io.clk <= clock @[el2_lib.scala 482:17] + rvclkhdr_9.io.en <= _T_35 @[el2_lib.scala 483:16] + rvclkhdr_9.io.scan_mode <= io.scan_mode @[el2_lib.scala 484:23] + io.lsu_bus_buf_c1_clk <= rvclkhdr_9.io.l1clk @[el2_lsu_clkdomain.scala 95:26] + node _T_36 = bits(io.lsu_bus_clk_en, 0, 0) @[el2_lsu_clkdomain.scala 96:62] + inst rvclkhdr_10 of rvclkhdr_22 @[el2_lib.scala 481:22] + rvclkhdr_10.clock <= clock + rvclkhdr_10.reset <= reset + rvclkhdr_10.io.clk <= clock @[el2_lib.scala 482:17] + rvclkhdr_10.io.en <= _T_36 @[el2_lib.scala 483:16] + rvclkhdr_10.io.scan_mode <= io.scan_mode @[el2_lib.scala 484:23] + io.lsu_busm_clk <= rvclkhdr_10.io.l1clk @[el2_lsu_clkdomain.scala 96:26] + node _T_37 = bits(lsu_free_c2_clken, 0, 0) @[el2_lsu_clkdomain.scala 97:62] + inst rvclkhdr_11 of rvclkhdr_23 @[el2_lib.scala 481:22] + rvclkhdr_11.clock <= clock + rvclkhdr_11.reset <= reset + rvclkhdr_11.io.clk <= clock @[el2_lib.scala 482:17] + rvclkhdr_11.io.en <= _T_37 @[el2_lib.scala 483:16] + rvclkhdr_11.io.scan_mode <= io.scan_mode @[el2_lib.scala 484:23] + io.lsu_free_c2_clk <= rvclkhdr_11.io.l1clk @[el2_lsu_clkdomain.scala 97:26] + + extmodule TEC_RV_ICG_24 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_24 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_24 @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + extmodule TEC_RV_ICG_25 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_25 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_25 @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + extmodule TEC_RV_ICG_26 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_26 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_26 @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + extmodule TEC_RV_ICG_27 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_27 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_27 @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + extmodule TEC_RV_ICG_28 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_28 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_28 @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + extmodule TEC_RV_ICG_29 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_29 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_29 @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + extmodule TEC_RV_ICG_30 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_30 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_30 @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + extmodule TEC_RV_ICG_31 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_31 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_31 @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + extmodule TEC_RV_ICG_32 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_32 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_32 @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + extmodule TEC_RV_ICG_33 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_33 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_33 @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + extmodule TEC_RV_ICG_34 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_34 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_34 @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + extmodule TEC_RV_ICG_35 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_35 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_35 @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + module el2_lsu_bus_buffer : + input clock : Clock + input reset : AsyncReset + output io : {flip scan_mode : UInt<1>, flip dec_tlu_external_ldfwd_disable : UInt<1>, flip dec_tlu_wb_coalescing_disable : UInt<1>, flip dec_tlu_sideeffect_posted_disable : UInt<1>, flip dec_tlu_force_halt : UInt<1>, flip lsu_c2_r_clk : Clock, flip lsu_bus_ibuf_c1_clk : Clock, flip lsu_bus_obuf_c1_clk : Clock, flip lsu_bus_buf_c1_clk : Clock, flip lsu_free_c2_clk : Clock, flip lsu_busm_clk : Clock, flip dec_lsu_valid_raw_d : UInt<1>, flip lsu_pkt_m : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip lsu_pkt_r : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip lsu_addr_m : UInt<32>, flip end_addr_m : UInt<32>, flip lsu_addr_r : UInt<32>, flip end_addr_r : UInt<32>, flip store_data_r : UInt<32>, flip no_word_merge_r : UInt<1>, flip no_dword_merge_r : UInt<1>, flip lsu_busreq_m : UInt<1>, flip ld_full_hit_m : UInt<1>, flip flush_m_up : UInt<1>, flip flush_r : UInt<1>, flip lsu_commit_r : UInt<1>, flip is_sideeffects_r : UInt<1>, flip ldst_dual_d : UInt<1>, flip ldst_dual_m : UInt<1>, flip ldst_dual_r : UInt<1>, flip ldst_byteen_ext_m : UInt<8>, flip lsu_axi_awready : UInt<1>, flip lsu_axi_wready : UInt<1>, flip lsu_axi_bvalid : UInt<1>, flip lsu_axi_bresp : UInt<2>, flip lsu_axi_bid : UInt<3>, flip lsu_axi_arready : UInt<1>, flip lsu_axi_rvalid : UInt<1>, flip lsu_axi_rid : UInt<3>, flip lsu_axi_rdata : UInt<64>, flip lsu_axi_rresp : UInt<2>, flip lsu_bus_clk_en : UInt<1>, flip lsu_bus_clk_en_q : UInt<1>, lsu_busreq_r : UInt<1>, lsu_bus_buffer_pend_any : UInt<1>, lsu_bus_buffer_full_any : UInt<1>, lsu_bus_buffer_empty_any : UInt<1>, lsu_bus_idle_any : UInt<1>, ld_byte_hit_buf_lo : UInt<4>, ld_byte_hit_buf_hi : UInt<4>, ld_fwddata_buf_lo : UInt<32>, ld_fwddata_buf_hi : UInt<32>, lsu_imprecise_error_load_any : UInt<1>, lsu_imprecise_error_store_any : UInt<1>, lsu_imprecise_error_addr_any : UInt<32>, lsu_nonblock_load_valid_m : UInt<1>, lsu_nonblock_load_tag_m : UInt<2>, lsu_nonblock_load_inv_r : UInt<1>, lsu_nonblock_load_inv_tag_r : UInt<2>, lsu_nonblock_load_data_valid : UInt<1>, lsu_nonblock_load_data_error : UInt<1>, lsu_nonblock_load_data_tag : UInt<2>, lsu_nonblock_load_data : UInt<32>, lsu_pmu_bus_trxn : UInt<1>, lsu_pmu_bus_misaligned : UInt<1>, lsu_pmu_bus_error : UInt<1>, lsu_pmu_bus_busy : UInt<1>, lsu_axi_awvalid : UInt<1>, lsu_axi_awid : UInt<3>, lsu_axi_awaddr : UInt<32>, lsu_axi_awregion : UInt<4>, lsu_axi_awlen : UInt<8>, lsu_axi_awsize : UInt<3>, lsu_axi_awburst : UInt<2>, lsu_axi_awlock : UInt<1>, lsu_axi_awcache : UInt<4>, lsu_axi_awprot : UInt<3>, lsu_axi_awqos : UInt<4>, lsu_axi_wvalid : UInt<1>, lsu_axi_wdata : UInt<64>, lsu_axi_wstrb : UInt<8>, lsu_axi_wlast : UInt<1>, lsu_axi_bready : UInt<1>, lsu_axi_arvalid : UInt<1>, lsu_axi_arid : UInt<3>, lsu_axi_araddr : UInt<32>, lsu_axi_arregion : UInt<4>, lsu_axi_arlen : UInt<8>, lsu_axi_arsize : UInt<3>, lsu_axi_arburst : UInt<2>, lsu_axi_arlock : UInt<1>, lsu_axi_arcache : UInt<4>, lsu_axi_arprot : UInt<3>, lsu_axi_arqos : UInt<4>, lsu_axi_rready : UInt<1>} + + wire buf_addr : UInt<32>[4] @[el2_lsu_bus_buffer.scala 119:22] + wire buf_state : UInt<3>[4] @[el2_lsu_bus_buffer.scala 120:23] + wire buf_write : UInt<4> + buf_write <= UInt<1>("h00") + wire CmdPtr0 : UInt<2> + CmdPtr0 <= UInt<1>("h00") + node ldst_byteen_hi_m = bits(io.ldst_byteen_ext_m, 7, 4) @[el2_lsu_bus_buffer.scala 125:46] + node ldst_byteen_lo_m = bits(io.ldst_byteen_ext_m, 3, 0) @[el2_lsu_bus_buffer.scala 126:46] + node _T = bits(io.lsu_addr_m, 31, 2) @[el2_lsu_bus_buffer.scala 128:66] + node _T_1 = bits(buf_addr[0], 31, 2) @[el2_lsu_bus_buffer.scala 128:89] + node _T_2 = eq(_T, _T_1) @[el2_lsu_bus_buffer.scala 128:74] + node _T_3 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 128:109] + node _T_4 = and(_T_2, _T_3) @[el2_lsu_bus_buffer.scala 128:98] + node _T_5 = neq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 128:129] + node _T_6 = and(_T_4, _T_5) @[el2_lsu_bus_buffer.scala 128:113] + node ld_addr_hitvec_lo_0 = and(_T_6, io.lsu_busreq_m) @[el2_lsu_bus_buffer.scala 128:141] + node _T_7 = bits(io.lsu_addr_m, 31, 2) @[el2_lsu_bus_buffer.scala 128:66] + node _T_8 = bits(buf_addr[1], 31, 2) @[el2_lsu_bus_buffer.scala 128:89] + node _T_9 = eq(_T_7, _T_8) @[el2_lsu_bus_buffer.scala 128:74] + node _T_10 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 128:109] + node _T_11 = and(_T_9, _T_10) @[el2_lsu_bus_buffer.scala 128:98] + node _T_12 = neq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 128:129] + node _T_13 = and(_T_11, _T_12) @[el2_lsu_bus_buffer.scala 128:113] + node ld_addr_hitvec_lo_1 = and(_T_13, io.lsu_busreq_m) @[el2_lsu_bus_buffer.scala 128:141] + node _T_14 = bits(io.lsu_addr_m, 31, 2) @[el2_lsu_bus_buffer.scala 128:66] + node _T_15 = bits(buf_addr[2], 31, 2) @[el2_lsu_bus_buffer.scala 128:89] + node _T_16 = eq(_T_14, _T_15) @[el2_lsu_bus_buffer.scala 128:74] + node _T_17 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 128:109] + node _T_18 = and(_T_16, _T_17) @[el2_lsu_bus_buffer.scala 128:98] + node _T_19 = neq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 128:129] + node _T_20 = and(_T_18, _T_19) @[el2_lsu_bus_buffer.scala 128:113] + node ld_addr_hitvec_lo_2 = and(_T_20, io.lsu_busreq_m) @[el2_lsu_bus_buffer.scala 128:141] + node _T_21 = bits(io.lsu_addr_m, 31, 2) @[el2_lsu_bus_buffer.scala 128:66] + node _T_22 = bits(buf_addr[3], 31, 2) @[el2_lsu_bus_buffer.scala 128:89] + node _T_23 = eq(_T_21, _T_22) @[el2_lsu_bus_buffer.scala 128:74] + node _T_24 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 128:109] + node _T_25 = and(_T_23, _T_24) @[el2_lsu_bus_buffer.scala 128:98] + node _T_26 = neq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 128:129] + node _T_27 = and(_T_25, _T_26) @[el2_lsu_bus_buffer.scala 128:113] + node ld_addr_hitvec_lo_3 = and(_T_27, io.lsu_busreq_m) @[el2_lsu_bus_buffer.scala 128:141] + node _T_28 = bits(io.end_addr_m, 31, 2) @[el2_lsu_bus_buffer.scala 129:66] + node _T_29 = bits(buf_addr[0], 31, 2) @[el2_lsu_bus_buffer.scala 129:89] + node _T_30 = eq(_T_28, _T_29) @[el2_lsu_bus_buffer.scala 129:74] + node _T_31 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 129:109] + node _T_32 = and(_T_30, _T_31) @[el2_lsu_bus_buffer.scala 129:98] + node _T_33 = neq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 129:129] + node _T_34 = and(_T_32, _T_33) @[el2_lsu_bus_buffer.scala 129:113] + node ld_addr_hitvec_hi_0 = and(_T_34, io.lsu_busreq_m) @[el2_lsu_bus_buffer.scala 129:141] + node _T_35 = bits(io.end_addr_m, 31, 2) @[el2_lsu_bus_buffer.scala 129:66] + node _T_36 = bits(buf_addr[1], 31, 2) @[el2_lsu_bus_buffer.scala 129:89] + node _T_37 = eq(_T_35, _T_36) @[el2_lsu_bus_buffer.scala 129:74] + node _T_38 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 129:109] + node _T_39 = and(_T_37, _T_38) @[el2_lsu_bus_buffer.scala 129:98] + node _T_40 = neq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 129:129] + node _T_41 = and(_T_39, _T_40) @[el2_lsu_bus_buffer.scala 129:113] + node ld_addr_hitvec_hi_1 = and(_T_41, io.lsu_busreq_m) @[el2_lsu_bus_buffer.scala 129:141] + node _T_42 = bits(io.end_addr_m, 31, 2) @[el2_lsu_bus_buffer.scala 129:66] + node _T_43 = bits(buf_addr[2], 31, 2) @[el2_lsu_bus_buffer.scala 129:89] + node _T_44 = eq(_T_42, _T_43) @[el2_lsu_bus_buffer.scala 129:74] + node _T_45 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 129:109] + node _T_46 = and(_T_44, _T_45) @[el2_lsu_bus_buffer.scala 129:98] + node _T_47 = neq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 129:129] + node _T_48 = and(_T_46, _T_47) @[el2_lsu_bus_buffer.scala 129:113] + node ld_addr_hitvec_hi_2 = and(_T_48, io.lsu_busreq_m) @[el2_lsu_bus_buffer.scala 129:141] + node _T_49 = bits(io.end_addr_m, 31, 2) @[el2_lsu_bus_buffer.scala 129:66] + node _T_50 = bits(buf_addr[3], 31, 2) @[el2_lsu_bus_buffer.scala 129:89] + node _T_51 = eq(_T_49, _T_50) @[el2_lsu_bus_buffer.scala 129:74] + node _T_52 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 129:109] + node _T_53 = and(_T_51, _T_52) @[el2_lsu_bus_buffer.scala 129:98] + node _T_54 = neq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 129:129] + node _T_55 = and(_T_53, _T_54) @[el2_lsu_bus_buffer.scala 129:113] + node ld_addr_hitvec_hi_3 = and(_T_55, io.lsu_busreq_m) @[el2_lsu_bus_buffer.scala 129:141] + wire ld_byte_hitvecfn_lo : UInt<4>[4] @[el2_lsu_bus_buffer.scala 130:33] + wire ld_byte_ibuf_hit_lo : UInt<4> + ld_byte_ibuf_hit_lo <= UInt<1>("h00") + wire ld_byte_hitvecfn_hi : UInt<4>[4] @[el2_lsu_bus_buffer.scala 132:33] + wire ld_byte_ibuf_hit_hi : UInt<4> + ld_byte_ibuf_hit_hi <= UInt<1>("h00") + wire buf_byteen : UInt<4>[4] @[el2_lsu_bus_buffer.scala 134:24] + buf_byteen[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 135:14] + buf_byteen[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 135:14] + buf_byteen[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 135:14] + buf_byteen[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 135:14] + wire buf_nxtstate : UInt<3>[4] @[el2_lsu_bus_buffer.scala 136:26] + buf_nxtstate[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 137:16] + buf_nxtstate[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 137:16] + buf_nxtstate[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 137:16] + buf_nxtstate[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 137:16] + wire buf_wr_en : UInt<1>[4] @[el2_lsu_bus_buffer.scala 138:23] + buf_wr_en[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 139:13] + buf_wr_en[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 139:13] + buf_wr_en[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 139:13] + buf_wr_en[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 139:13] + wire buf_data_en : UInt<1>[4] @[el2_lsu_bus_buffer.scala 140:25] + buf_data_en[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 141:15] + buf_data_en[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 141:15] + buf_data_en[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 141:15] + buf_data_en[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 141:15] + wire buf_state_bus_en : UInt<1>[4] @[el2_lsu_bus_buffer.scala 142:30] + buf_state_bus_en[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 143:20] + buf_state_bus_en[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 143:20] + buf_state_bus_en[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 143:20] + buf_state_bus_en[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 143:20] + wire buf_ldfwd_in : UInt<1>[4] @[el2_lsu_bus_buffer.scala 144:26] + buf_ldfwd_in[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 145:16] + buf_ldfwd_in[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 145:16] + buf_ldfwd_in[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 145:16] + buf_ldfwd_in[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 145:16] + wire buf_ldfwd_en : UInt<1>[4] @[el2_lsu_bus_buffer.scala 146:26] + buf_ldfwd_en[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 147:16] + buf_ldfwd_en[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 147:16] + buf_ldfwd_en[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 147:16] + buf_ldfwd_en[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 147:16] + wire buf_data_in : UInt<32>[4] @[el2_lsu_bus_buffer.scala 148:25] + buf_data_in[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 149:15] + buf_data_in[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 149:15] + buf_data_in[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 149:15] + buf_data_in[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 149:15] + wire buf_ldfwdtag_in : UInt<2>[4] @[el2_lsu_bus_buffer.scala 150:29] + buf_ldfwdtag_in[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 151:19] + buf_ldfwdtag_in[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 151:19] + buf_ldfwdtag_in[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 151:19] + buf_ldfwdtag_in[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 151:19] + wire buf_error_en : UInt<1>[4] @[el2_lsu_bus_buffer.scala 152:26] + buf_error_en[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 153:16] + buf_error_en[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 153:16] + buf_error_en[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 153:16] + buf_error_en[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 153:16] + wire bus_rsp_read_error : UInt<1> + bus_rsp_read_error <= UInt<1>("h00") + wire bus_rsp_rdata : UInt<64> + bus_rsp_rdata <= UInt<1>("h00") + wire bus_rsp_write_error : UInt<1> + bus_rsp_write_error <= UInt<1>("h00") + wire buf_dualtag : UInt<2>[4] @[el2_lsu_bus_buffer.scala 157:25] + buf_dualtag[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 158:15] + buf_dualtag[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 158:15] + buf_dualtag[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 158:15] + buf_dualtag[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 158:15] + wire buf_ldfwd : UInt<4> + buf_ldfwd <= UInt<1>("h00") + wire buf_resp_state_bus_en : UInt<1>[4] @[el2_lsu_bus_buffer.scala 160:35] + buf_resp_state_bus_en[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 161:25] + buf_resp_state_bus_en[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 161:25] + buf_resp_state_bus_en[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 161:25] + buf_resp_state_bus_en[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 161:25] + wire any_done_wait_state : UInt<1> + any_done_wait_state <= UInt<1>("h00") + wire bus_rsp_write : UInt<1> + bus_rsp_write <= UInt<1>("h00") + wire bus_rsp_write_tag : UInt<3> + bus_rsp_write_tag <= UInt<1>("h00") + wire buf_ldfwdtag : UInt<2>[4] @[el2_lsu_bus_buffer.scala 165:26] + buf_ldfwdtag[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 166:16] + buf_ldfwdtag[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 166:16] + buf_ldfwdtag[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 166:16] + buf_ldfwdtag[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 166:16] + wire buf_rst : UInt<1>[4] @[el2_lsu_bus_buffer.scala 167:21] + buf_rst[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 168:11] + buf_rst[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 168:11] + buf_rst[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 168:11] + buf_rst[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 168:11] + wire ibuf_drainvec_vld : UInt<4> + ibuf_drainvec_vld <= UInt<1>("h00") + wire buf_byteen_in : UInt<4>[4] @[el2_lsu_bus_buffer.scala 170:27] + buf_byteen_in[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 171:17] + buf_byteen_in[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 171:17] + buf_byteen_in[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 171:17] + buf_byteen_in[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 171:17] + wire buf_addr_in : UInt<32>[4] @[el2_lsu_bus_buffer.scala 172:25] + buf_addr_in[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 173:15] + buf_addr_in[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 173:15] + buf_addr_in[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 173:15] + buf_addr_in[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 173:15] + wire buf_dual_in : UInt<4> + buf_dual_in <= UInt<1>("h00") + wire buf_samedw_in : UInt<4> + buf_samedw_in <= UInt<1>("h00") + wire buf_nomerge_in : UInt<4> + buf_nomerge_in <= UInt<1>("h00") + wire buf_dualhi_in : UInt<4> + buf_dualhi_in <= UInt<1>("h00") + wire buf_dualtag_in : UInt<2>[4] @[el2_lsu_bus_buffer.scala 178:28] + buf_dualtag_in[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 179:18] + buf_dualtag_in[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 179:18] + buf_dualtag_in[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 179:18] + buf_dualtag_in[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 179:18] + wire buf_sideeffect_in : UInt<4> + buf_sideeffect_in <= UInt<1>("h00") + wire buf_unsign_in : UInt<4> + buf_unsign_in <= UInt<1>("h00") + wire buf_sz_in : UInt<2>[4] @[el2_lsu_bus_buffer.scala 182:23] + buf_sz_in[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 183:13] + buf_sz_in[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 183:13] + buf_sz_in[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 183:13] + buf_sz_in[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 183:13] + wire buf_write_in : UInt<4> + buf_write_in <= UInt<1>("h00") + wire buf_unsign : UInt<4> + buf_unsign <= UInt<1>("h00") + wire buf_error : UInt<4> + buf_error <= UInt<1>("h00") + wire ibuf_data : UInt<32> + ibuf_data <= UInt<1>("h00") + node _T_56 = orr(ld_byte_hitvecfn_lo[0]) @[el2_lsu_bus_buffer.scala 189:73] + node _T_57 = bits(ld_byte_ibuf_hit_lo, 0, 0) @[el2_lsu_bus_buffer.scala 189:98] + node _T_58 = or(_T_56, _T_57) @[el2_lsu_bus_buffer.scala 189:77] + node _T_59 = orr(ld_byte_hitvecfn_lo[1]) @[el2_lsu_bus_buffer.scala 189:73] + node _T_60 = bits(ld_byte_ibuf_hit_lo, 1, 1) @[el2_lsu_bus_buffer.scala 189:98] + node _T_61 = or(_T_59, _T_60) @[el2_lsu_bus_buffer.scala 189:77] + node _T_62 = orr(ld_byte_hitvecfn_lo[2]) @[el2_lsu_bus_buffer.scala 189:73] + node _T_63 = bits(ld_byte_ibuf_hit_lo, 2, 2) @[el2_lsu_bus_buffer.scala 189:98] + node _T_64 = or(_T_62, _T_63) @[el2_lsu_bus_buffer.scala 189:77] + node _T_65 = orr(ld_byte_hitvecfn_lo[3]) @[el2_lsu_bus_buffer.scala 189:73] + node _T_66 = bits(ld_byte_ibuf_hit_lo, 3, 3) @[el2_lsu_bus_buffer.scala 189:98] + node _T_67 = or(_T_65, _T_66) @[el2_lsu_bus_buffer.scala 189:77] + node _T_68 = cat(_T_67, _T_64) @[Cat.scala 29:58] + node _T_69 = cat(_T_68, _T_61) @[Cat.scala 29:58] + node _T_70 = cat(_T_69, _T_58) @[Cat.scala 29:58] + io.ld_byte_hit_buf_lo <= _T_70 @[el2_lsu_bus_buffer.scala 189:25] + node _T_71 = orr(ld_byte_hitvecfn_hi[0]) @[el2_lsu_bus_buffer.scala 190:73] + node _T_72 = bits(ld_byte_ibuf_hit_hi, 0, 0) @[el2_lsu_bus_buffer.scala 190:98] + node _T_73 = or(_T_71, _T_72) @[el2_lsu_bus_buffer.scala 190:77] + node _T_74 = orr(ld_byte_hitvecfn_hi[1]) @[el2_lsu_bus_buffer.scala 190:73] + node _T_75 = bits(ld_byte_ibuf_hit_hi, 1, 1) @[el2_lsu_bus_buffer.scala 190:98] + node _T_76 = or(_T_74, _T_75) @[el2_lsu_bus_buffer.scala 190:77] + node _T_77 = orr(ld_byte_hitvecfn_hi[2]) @[el2_lsu_bus_buffer.scala 190:73] + node _T_78 = bits(ld_byte_ibuf_hit_hi, 2, 2) @[el2_lsu_bus_buffer.scala 190:98] + node _T_79 = or(_T_77, _T_78) @[el2_lsu_bus_buffer.scala 190:77] + node _T_80 = orr(ld_byte_hitvecfn_hi[3]) @[el2_lsu_bus_buffer.scala 190:73] + node _T_81 = bits(ld_byte_ibuf_hit_hi, 3, 3) @[el2_lsu_bus_buffer.scala 190:98] + node _T_82 = or(_T_80, _T_81) @[el2_lsu_bus_buffer.scala 190:77] + node _T_83 = cat(_T_82, _T_79) @[Cat.scala 29:58] + node _T_84 = cat(_T_83, _T_76) @[Cat.scala 29:58] + node _T_85 = cat(_T_84, _T_73) @[Cat.scala 29:58] + io.ld_byte_hit_buf_hi <= _T_85 @[el2_lsu_bus_buffer.scala 190:25] + node _T_86 = bits(buf_byteen[0], 0, 0) @[el2_lsu_bus_buffer.scala 192:110] + node _T_87 = and(ld_addr_hitvec_lo_0, _T_86) @[el2_lsu_bus_buffer.scala 192:95] + node _T_88 = bits(ldst_byteen_lo_m, 0, 0) @[el2_lsu_bus_buffer.scala 192:132] + node _T_89 = and(_T_87, _T_88) @[el2_lsu_bus_buffer.scala 192:114] + node _T_90 = bits(buf_byteen[1], 0, 0) @[el2_lsu_bus_buffer.scala 192:110] + node _T_91 = and(ld_addr_hitvec_lo_1, _T_90) @[el2_lsu_bus_buffer.scala 192:95] + node _T_92 = bits(ldst_byteen_lo_m, 0, 0) @[el2_lsu_bus_buffer.scala 192:132] + node _T_93 = and(_T_91, _T_92) @[el2_lsu_bus_buffer.scala 192:114] + node _T_94 = bits(buf_byteen[2], 0, 0) @[el2_lsu_bus_buffer.scala 192:110] + node _T_95 = and(ld_addr_hitvec_lo_2, _T_94) @[el2_lsu_bus_buffer.scala 192:95] + node _T_96 = bits(ldst_byteen_lo_m, 0, 0) @[el2_lsu_bus_buffer.scala 192:132] + node _T_97 = and(_T_95, _T_96) @[el2_lsu_bus_buffer.scala 192:114] + node _T_98 = bits(buf_byteen[3], 0, 0) @[el2_lsu_bus_buffer.scala 192:110] + node _T_99 = and(ld_addr_hitvec_lo_3, _T_98) @[el2_lsu_bus_buffer.scala 192:95] + node _T_100 = bits(ldst_byteen_lo_m, 0, 0) @[el2_lsu_bus_buffer.scala 192:132] + node _T_101 = and(_T_99, _T_100) @[el2_lsu_bus_buffer.scala 192:114] + node _T_102 = cat(_T_101, _T_97) @[Cat.scala 29:58] + node _T_103 = cat(_T_102, _T_93) @[Cat.scala 29:58] + node ld_byte_hitvec_lo_0 = cat(_T_103, _T_89) @[Cat.scala 29:58] + node _T_104 = bits(buf_byteen[0], 1, 1) @[el2_lsu_bus_buffer.scala 192:110] + node _T_105 = and(ld_addr_hitvec_lo_0, _T_104) @[el2_lsu_bus_buffer.scala 192:95] + node _T_106 = bits(ldst_byteen_lo_m, 1, 1) @[el2_lsu_bus_buffer.scala 192:132] + node _T_107 = and(_T_105, _T_106) @[el2_lsu_bus_buffer.scala 192:114] + node _T_108 = bits(buf_byteen[1], 1, 1) @[el2_lsu_bus_buffer.scala 192:110] + node _T_109 = and(ld_addr_hitvec_lo_1, _T_108) @[el2_lsu_bus_buffer.scala 192:95] + node _T_110 = bits(ldst_byteen_lo_m, 1, 1) @[el2_lsu_bus_buffer.scala 192:132] + node _T_111 = and(_T_109, _T_110) @[el2_lsu_bus_buffer.scala 192:114] + node _T_112 = bits(buf_byteen[2], 1, 1) @[el2_lsu_bus_buffer.scala 192:110] + node _T_113 = and(ld_addr_hitvec_lo_2, _T_112) @[el2_lsu_bus_buffer.scala 192:95] + node _T_114 = bits(ldst_byteen_lo_m, 1, 1) @[el2_lsu_bus_buffer.scala 192:132] + node _T_115 = and(_T_113, _T_114) @[el2_lsu_bus_buffer.scala 192:114] + node _T_116 = bits(buf_byteen[3], 1, 1) @[el2_lsu_bus_buffer.scala 192:110] + node _T_117 = and(ld_addr_hitvec_lo_3, _T_116) @[el2_lsu_bus_buffer.scala 192:95] + node _T_118 = bits(ldst_byteen_lo_m, 1, 1) @[el2_lsu_bus_buffer.scala 192:132] + node _T_119 = and(_T_117, _T_118) @[el2_lsu_bus_buffer.scala 192:114] + node _T_120 = cat(_T_119, _T_115) @[Cat.scala 29:58] + node _T_121 = cat(_T_120, _T_111) @[Cat.scala 29:58] + node ld_byte_hitvec_lo_1 = cat(_T_121, _T_107) @[Cat.scala 29:58] + node _T_122 = bits(buf_byteen[0], 2, 2) @[el2_lsu_bus_buffer.scala 192:110] + node _T_123 = and(ld_addr_hitvec_lo_0, _T_122) @[el2_lsu_bus_buffer.scala 192:95] + node _T_124 = bits(ldst_byteen_lo_m, 2, 2) @[el2_lsu_bus_buffer.scala 192:132] + node _T_125 = and(_T_123, _T_124) @[el2_lsu_bus_buffer.scala 192:114] + node _T_126 = bits(buf_byteen[1], 2, 2) @[el2_lsu_bus_buffer.scala 192:110] + node _T_127 = and(ld_addr_hitvec_lo_1, _T_126) @[el2_lsu_bus_buffer.scala 192:95] + node _T_128 = bits(ldst_byteen_lo_m, 2, 2) @[el2_lsu_bus_buffer.scala 192:132] + node _T_129 = and(_T_127, _T_128) @[el2_lsu_bus_buffer.scala 192:114] + node _T_130 = bits(buf_byteen[2], 2, 2) @[el2_lsu_bus_buffer.scala 192:110] + node _T_131 = and(ld_addr_hitvec_lo_2, _T_130) @[el2_lsu_bus_buffer.scala 192:95] + node _T_132 = bits(ldst_byteen_lo_m, 2, 2) @[el2_lsu_bus_buffer.scala 192:132] + node _T_133 = and(_T_131, _T_132) @[el2_lsu_bus_buffer.scala 192:114] + node _T_134 = bits(buf_byteen[3], 2, 2) @[el2_lsu_bus_buffer.scala 192:110] + node _T_135 = and(ld_addr_hitvec_lo_3, _T_134) @[el2_lsu_bus_buffer.scala 192:95] + node _T_136 = bits(ldst_byteen_lo_m, 2, 2) @[el2_lsu_bus_buffer.scala 192:132] + node _T_137 = and(_T_135, _T_136) @[el2_lsu_bus_buffer.scala 192:114] + node _T_138 = cat(_T_137, _T_133) @[Cat.scala 29:58] + node _T_139 = cat(_T_138, _T_129) @[Cat.scala 29:58] + node ld_byte_hitvec_lo_2 = cat(_T_139, _T_125) @[Cat.scala 29:58] + node _T_140 = bits(buf_byteen[0], 3, 3) @[el2_lsu_bus_buffer.scala 192:110] + node _T_141 = and(ld_addr_hitvec_lo_0, _T_140) @[el2_lsu_bus_buffer.scala 192:95] + node _T_142 = bits(ldst_byteen_lo_m, 3, 3) @[el2_lsu_bus_buffer.scala 192:132] + node _T_143 = and(_T_141, _T_142) @[el2_lsu_bus_buffer.scala 192:114] + node _T_144 = bits(buf_byteen[1], 3, 3) @[el2_lsu_bus_buffer.scala 192:110] + node _T_145 = and(ld_addr_hitvec_lo_1, _T_144) @[el2_lsu_bus_buffer.scala 192:95] + node _T_146 = bits(ldst_byteen_lo_m, 3, 3) @[el2_lsu_bus_buffer.scala 192:132] + node _T_147 = and(_T_145, _T_146) @[el2_lsu_bus_buffer.scala 192:114] + node _T_148 = bits(buf_byteen[2], 3, 3) @[el2_lsu_bus_buffer.scala 192:110] + node _T_149 = and(ld_addr_hitvec_lo_2, _T_148) @[el2_lsu_bus_buffer.scala 192:95] + node _T_150 = bits(ldst_byteen_lo_m, 3, 3) @[el2_lsu_bus_buffer.scala 192:132] + node _T_151 = and(_T_149, _T_150) @[el2_lsu_bus_buffer.scala 192:114] + node _T_152 = bits(buf_byteen[3], 3, 3) @[el2_lsu_bus_buffer.scala 192:110] + node _T_153 = and(ld_addr_hitvec_lo_3, _T_152) @[el2_lsu_bus_buffer.scala 192:95] + node _T_154 = bits(ldst_byteen_lo_m, 3, 3) @[el2_lsu_bus_buffer.scala 192:132] + node _T_155 = and(_T_153, _T_154) @[el2_lsu_bus_buffer.scala 192:114] + node _T_156 = cat(_T_155, _T_151) @[Cat.scala 29:58] + node _T_157 = cat(_T_156, _T_147) @[Cat.scala 29:58] + node ld_byte_hitvec_lo_3 = cat(_T_157, _T_143) @[Cat.scala 29:58] + node _T_158 = bits(buf_byteen[0], 0, 0) @[el2_lsu_bus_buffer.scala 193:110] + node _T_159 = and(ld_addr_hitvec_hi_0, _T_158) @[el2_lsu_bus_buffer.scala 193:95] + node _T_160 = bits(ldst_byteen_hi_m, 0, 0) @[el2_lsu_bus_buffer.scala 193:132] + node _T_161 = and(_T_159, _T_160) @[el2_lsu_bus_buffer.scala 193:114] + node _T_162 = bits(buf_byteen[1], 0, 0) @[el2_lsu_bus_buffer.scala 193:110] + node _T_163 = and(ld_addr_hitvec_hi_1, _T_162) @[el2_lsu_bus_buffer.scala 193:95] + node _T_164 = bits(ldst_byteen_hi_m, 0, 0) @[el2_lsu_bus_buffer.scala 193:132] + node _T_165 = and(_T_163, _T_164) @[el2_lsu_bus_buffer.scala 193:114] + node _T_166 = bits(buf_byteen[2], 0, 0) @[el2_lsu_bus_buffer.scala 193:110] + node _T_167 = and(ld_addr_hitvec_hi_2, _T_166) @[el2_lsu_bus_buffer.scala 193:95] + node _T_168 = bits(ldst_byteen_hi_m, 0, 0) @[el2_lsu_bus_buffer.scala 193:132] + node _T_169 = and(_T_167, _T_168) @[el2_lsu_bus_buffer.scala 193:114] + node _T_170 = bits(buf_byteen[3], 0, 0) @[el2_lsu_bus_buffer.scala 193:110] + node _T_171 = and(ld_addr_hitvec_hi_3, _T_170) @[el2_lsu_bus_buffer.scala 193:95] + node _T_172 = bits(ldst_byteen_hi_m, 0, 0) @[el2_lsu_bus_buffer.scala 193:132] + node _T_173 = and(_T_171, _T_172) @[el2_lsu_bus_buffer.scala 193:114] + node _T_174 = cat(_T_173, _T_169) @[Cat.scala 29:58] + node _T_175 = cat(_T_174, _T_165) @[Cat.scala 29:58] + node ld_byte_hitvec_hi_0 = cat(_T_175, _T_161) @[Cat.scala 29:58] + node _T_176 = bits(buf_byteen[0], 1, 1) @[el2_lsu_bus_buffer.scala 193:110] + node _T_177 = and(ld_addr_hitvec_hi_0, _T_176) @[el2_lsu_bus_buffer.scala 193:95] + node _T_178 = bits(ldst_byteen_hi_m, 1, 1) @[el2_lsu_bus_buffer.scala 193:132] + node _T_179 = and(_T_177, _T_178) @[el2_lsu_bus_buffer.scala 193:114] + node _T_180 = bits(buf_byteen[1], 1, 1) @[el2_lsu_bus_buffer.scala 193:110] + node _T_181 = and(ld_addr_hitvec_hi_1, _T_180) @[el2_lsu_bus_buffer.scala 193:95] + node _T_182 = bits(ldst_byteen_hi_m, 1, 1) @[el2_lsu_bus_buffer.scala 193:132] + node _T_183 = and(_T_181, _T_182) @[el2_lsu_bus_buffer.scala 193:114] + node _T_184 = bits(buf_byteen[2], 1, 1) @[el2_lsu_bus_buffer.scala 193:110] + node _T_185 = and(ld_addr_hitvec_hi_2, _T_184) @[el2_lsu_bus_buffer.scala 193:95] + node _T_186 = bits(ldst_byteen_hi_m, 1, 1) @[el2_lsu_bus_buffer.scala 193:132] + node _T_187 = and(_T_185, _T_186) @[el2_lsu_bus_buffer.scala 193:114] + node _T_188 = bits(buf_byteen[3], 1, 1) @[el2_lsu_bus_buffer.scala 193:110] + node _T_189 = and(ld_addr_hitvec_hi_3, _T_188) @[el2_lsu_bus_buffer.scala 193:95] + node _T_190 = bits(ldst_byteen_hi_m, 1, 1) @[el2_lsu_bus_buffer.scala 193:132] + node _T_191 = and(_T_189, _T_190) @[el2_lsu_bus_buffer.scala 193:114] + node _T_192 = cat(_T_191, _T_187) @[Cat.scala 29:58] + node _T_193 = cat(_T_192, _T_183) @[Cat.scala 29:58] + node ld_byte_hitvec_hi_1 = cat(_T_193, _T_179) @[Cat.scala 29:58] + node _T_194 = bits(buf_byteen[0], 2, 2) @[el2_lsu_bus_buffer.scala 193:110] + node _T_195 = and(ld_addr_hitvec_hi_0, _T_194) @[el2_lsu_bus_buffer.scala 193:95] + node _T_196 = bits(ldst_byteen_hi_m, 2, 2) @[el2_lsu_bus_buffer.scala 193:132] + node _T_197 = and(_T_195, _T_196) @[el2_lsu_bus_buffer.scala 193:114] + node _T_198 = bits(buf_byteen[1], 2, 2) @[el2_lsu_bus_buffer.scala 193:110] + node _T_199 = and(ld_addr_hitvec_hi_1, _T_198) @[el2_lsu_bus_buffer.scala 193:95] + node _T_200 = bits(ldst_byteen_hi_m, 2, 2) @[el2_lsu_bus_buffer.scala 193:132] + node _T_201 = and(_T_199, _T_200) @[el2_lsu_bus_buffer.scala 193:114] + node _T_202 = bits(buf_byteen[2], 2, 2) @[el2_lsu_bus_buffer.scala 193:110] + node _T_203 = and(ld_addr_hitvec_hi_2, _T_202) @[el2_lsu_bus_buffer.scala 193:95] + node _T_204 = bits(ldst_byteen_hi_m, 2, 2) @[el2_lsu_bus_buffer.scala 193:132] + node _T_205 = and(_T_203, _T_204) @[el2_lsu_bus_buffer.scala 193:114] + node _T_206 = bits(buf_byteen[3], 2, 2) @[el2_lsu_bus_buffer.scala 193:110] + node _T_207 = and(ld_addr_hitvec_hi_3, _T_206) @[el2_lsu_bus_buffer.scala 193:95] + node _T_208 = bits(ldst_byteen_hi_m, 2, 2) @[el2_lsu_bus_buffer.scala 193:132] + node _T_209 = and(_T_207, _T_208) @[el2_lsu_bus_buffer.scala 193:114] + node _T_210 = cat(_T_209, _T_205) @[Cat.scala 29:58] + node _T_211 = cat(_T_210, _T_201) @[Cat.scala 29:58] + node ld_byte_hitvec_hi_2 = cat(_T_211, _T_197) @[Cat.scala 29:58] + node _T_212 = bits(buf_byteen[0], 3, 3) @[el2_lsu_bus_buffer.scala 193:110] + node _T_213 = and(ld_addr_hitvec_hi_0, _T_212) @[el2_lsu_bus_buffer.scala 193:95] + node _T_214 = bits(ldst_byteen_hi_m, 3, 3) @[el2_lsu_bus_buffer.scala 193:132] + node _T_215 = and(_T_213, _T_214) @[el2_lsu_bus_buffer.scala 193:114] + node _T_216 = bits(buf_byteen[1], 3, 3) @[el2_lsu_bus_buffer.scala 193:110] + node _T_217 = and(ld_addr_hitvec_hi_1, _T_216) @[el2_lsu_bus_buffer.scala 193:95] + node _T_218 = bits(ldst_byteen_hi_m, 3, 3) @[el2_lsu_bus_buffer.scala 193:132] + node _T_219 = and(_T_217, _T_218) @[el2_lsu_bus_buffer.scala 193:114] + node _T_220 = bits(buf_byteen[2], 3, 3) @[el2_lsu_bus_buffer.scala 193:110] + node _T_221 = and(ld_addr_hitvec_hi_2, _T_220) @[el2_lsu_bus_buffer.scala 193:95] + node _T_222 = bits(ldst_byteen_hi_m, 3, 3) @[el2_lsu_bus_buffer.scala 193:132] + node _T_223 = and(_T_221, _T_222) @[el2_lsu_bus_buffer.scala 193:114] + node _T_224 = bits(buf_byteen[3], 3, 3) @[el2_lsu_bus_buffer.scala 193:110] + node _T_225 = and(ld_addr_hitvec_hi_3, _T_224) @[el2_lsu_bus_buffer.scala 193:95] + node _T_226 = bits(ldst_byteen_hi_m, 3, 3) @[el2_lsu_bus_buffer.scala 193:132] + node _T_227 = and(_T_225, _T_226) @[el2_lsu_bus_buffer.scala 193:114] + node _T_228 = cat(_T_227, _T_223) @[Cat.scala 29:58] + node _T_229 = cat(_T_228, _T_219) @[Cat.scala 29:58] + node ld_byte_hitvec_hi_3 = cat(_T_229, _T_215) @[Cat.scala 29:58] + wire buf_age_younger : UInt<4>[4] @[el2_lsu_bus_buffer.scala 195:29] + buf_age_younger[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 196:19] + buf_age_younger[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 196:19] + buf_age_younger[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 196:19] + buf_age_younger[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 196:19] + node _T_230 = bits(ld_byte_hitvec_lo_0, 0, 0) @[el2_lsu_bus_buffer.scala 197:93] + node _T_231 = and(ld_byte_hitvec_lo_0, buf_age_younger[0]) @[el2_lsu_bus_buffer.scala 197:122] + node _T_232 = orr(_T_231) @[el2_lsu_bus_buffer.scala 197:144] + node _T_233 = eq(_T_232, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99] + node _T_234 = and(_T_230, _T_233) @[el2_lsu_bus_buffer.scala 197:97] + node _T_235 = bits(ld_byte_ibuf_hit_lo, 0, 0) @[el2_lsu_bus_buffer.scala 197:170] + node _T_236 = eq(_T_235, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150] + node _T_237 = and(_T_234, _T_236) @[el2_lsu_bus_buffer.scala 197:148] + node _T_238 = bits(ld_byte_hitvec_lo_0, 1, 1) @[el2_lsu_bus_buffer.scala 197:93] + node _T_239 = and(ld_byte_hitvec_lo_0, buf_age_younger[1]) @[el2_lsu_bus_buffer.scala 197:122] + node _T_240 = orr(_T_239) @[el2_lsu_bus_buffer.scala 197:144] + node _T_241 = eq(_T_240, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99] + node _T_242 = and(_T_238, _T_241) @[el2_lsu_bus_buffer.scala 197:97] + node _T_243 = bits(ld_byte_ibuf_hit_lo, 0, 0) @[el2_lsu_bus_buffer.scala 197:170] + node _T_244 = eq(_T_243, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150] + node _T_245 = and(_T_242, _T_244) @[el2_lsu_bus_buffer.scala 197:148] + node _T_246 = bits(ld_byte_hitvec_lo_0, 2, 2) @[el2_lsu_bus_buffer.scala 197:93] + node _T_247 = and(ld_byte_hitvec_lo_0, buf_age_younger[2]) @[el2_lsu_bus_buffer.scala 197:122] + node _T_248 = orr(_T_247) @[el2_lsu_bus_buffer.scala 197:144] + node _T_249 = eq(_T_248, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99] + node _T_250 = and(_T_246, _T_249) @[el2_lsu_bus_buffer.scala 197:97] + node _T_251 = bits(ld_byte_ibuf_hit_lo, 0, 0) @[el2_lsu_bus_buffer.scala 197:170] + node _T_252 = eq(_T_251, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150] + node _T_253 = and(_T_250, _T_252) @[el2_lsu_bus_buffer.scala 197:148] + node _T_254 = bits(ld_byte_hitvec_lo_0, 3, 3) @[el2_lsu_bus_buffer.scala 197:93] + node _T_255 = and(ld_byte_hitvec_lo_0, buf_age_younger[3]) @[el2_lsu_bus_buffer.scala 197:122] + node _T_256 = orr(_T_255) @[el2_lsu_bus_buffer.scala 197:144] + node _T_257 = eq(_T_256, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99] + node _T_258 = and(_T_254, _T_257) @[el2_lsu_bus_buffer.scala 197:97] + node _T_259 = bits(ld_byte_ibuf_hit_lo, 0, 0) @[el2_lsu_bus_buffer.scala 197:170] + node _T_260 = eq(_T_259, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150] + node _T_261 = and(_T_258, _T_260) @[el2_lsu_bus_buffer.scala 197:148] + node _T_262 = cat(_T_261, _T_253) @[Cat.scala 29:58] + node _T_263 = cat(_T_262, _T_245) @[Cat.scala 29:58] + node _T_264 = cat(_T_263, _T_237) @[Cat.scala 29:58] + node _T_265 = bits(ld_byte_hitvec_lo_1, 0, 0) @[el2_lsu_bus_buffer.scala 197:93] + node _T_266 = and(ld_byte_hitvec_lo_1, buf_age_younger[0]) @[el2_lsu_bus_buffer.scala 197:122] + node _T_267 = orr(_T_266) @[el2_lsu_bus_buffer.scala 197:144] + node _T_268 = eq(_T_267, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99] + node _T_269 = and(_T_265, _T_268) @[el2_lsu_bus_buffer.scala 197:97] + node _T_270 = bits(ld_byte_ibuf_hit_lo, 1, 1) @[el2_lsu_bus_buffer.scala 197:170] + node _T_271 = eq(_T_270, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150] + node _T_272 = and(_T_269, _T_271) @[el2_lsu_bus_buffer.scala 197:148] + node _T_273 = bits(ld_byte_hitvec_lo_1, 1, 1) @[el2_lsu_bus_buffer.scala 197:93] + node _T_274 = and(ld_byte_hitvec_lo_1, buf_age_younger[1]) @[el2_lsu_bus_buffer.scala 197:122] + node _T_275 = orr(_T_274) @[el2_lsu_bus_buffer.scala 197:144] + node _T_276 = eq(_T_275, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99] + node _T_277 = and(_T_273, _T_276) @[el2_lsu_bus_buffer.scala 197:97] + node _T_278 = bits(ld_byte_ibuf_hit_lo, 1, 1) @[el2_lsu_bus_buffer.scala 197:170] + node _T_279 = eq(_T_278, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150] + node _T_280 = and(_T_277, _T_279) @[el2_lsu_bus_buffer.scala 197:148] + node _T_281 = bits(ld_byte_hitvec_lo_1, 2, 2) @[el2_lsu_bus_buffer.scala 197:93] + node _T_282 = and(ld_byte_hitvec_lo_1, buf_age_younger[2]) @[el2_lsu_bus_buffer.scala 197:122] + node _T_283 = orr(_T_282) @[el2_lsu_bus_buffer.scala 197:144] + node _T_284 = eq(_T_283, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99] + node _T_285 = and(_T_281, _T_284) @[el2_lsu_bus_buffer.scala 197:97] + node _T_286 = bits(ld_byte_ibuf_hit_lo, 1, 1) @[el2_lsu_bus_buffer.scala 197:170] + node _T_287 = eq(_T_286, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150] + node _T_288 = and(_T_285, _T_287) @[el2_lsu_bus_buffer.scala 197:148] + node _T_289 = bits(ld_byte_hitvec_lo_1, 3, 3) @[el2_lsu_bus_buffer.scala 197:93] + node _T_290 = and(ld_byte_hitvec_lo_1, buf_age_younger[3]) @[el2_lsu_bus_buffer.scala 197:122] + node _T_291 = orr(_T_290) @[el2_lsu_bus_buffer.scala 197:144] + node _T_292 = eq(_T_291, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99] + node _T_293 = and(_T_289, _T_292) @[el2_lsu_bus_buffer.scala 197:97] + node _T_294 = bits(ld_byte_ibuf_hit_lo, 1, 1) @[el2_lsu_bus_buffer.scala 197:170] + node _T_295 = eq(_T_294, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150] + node _T_296 = and(_T_293, _T_295) @[el2_lsu_bus_buffer.scala 197:148] + node _T_297 = cat(_T_296, _T_288) @[Cat.scala 29:58] + node _T_298 = cat(_T_297, _T_280) @[Cat.scala 29:58] + node _T_299 = cat(_T_298, _T_272) @[Cat.scala 29:58] + node _T_300 = bits(ld_byte_hitvec_lo_2, 0, 0) @[el2_lsu_bus_buffer.scala 197:93] + node _T_301 = and(ld_byte_hitvec_lo_2, buf_age_younger[0]) @[el2_lsu_bus_buffer.scala 197:122] + node _T_302 = orr(_T_301) @[el2_lsu_bus_buffer.scala 197:144] + node _T_303 = eq(_T_302, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99] + node _T_304 = and(_T_300, _T_303) @[el2_lsu_bus_buffer.scala 197:97] + node _T_305 = bits(ld_byte_ibuf_hit_lo, 2, 2) @[el2_lsu_bus_buffer.scala 197:170] + node _T_306 = eq(_T_305, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150] + node _T_307 = and(_T_304, _T_306) @[el2_lsu_bus_buffer.scala 197:148] + node _T_308 = bits(ld_byte_hitvec_lo_2, 1, 1) @[el2_lsu_bus_buffer.scala 197:93] + node _T_309 = and(ld_byte_hitvec_lo_2, buf_age_younger[1]) @[el2_lsu_bus_buffer.scala 197:122] + node _T_310 = orr(_T_309) @[el2_lsu_bus_buffer.scala 197:144] + node _T_311 = eq(_T_310, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99] + node _T_312 = and(_T_308, _T_311) @[el2_lsu_bus_buffer.scala 197:97] + node _T_313 = bits(ld_byte_ibuf_hit_lo, 2, 2) @[el2_lsu_bus_buffer.scala 197:170] + node _T_314 = eq(_T_313, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150] + node _T_315 = and(_T_312, _T_314) @[el2_lsu_bus_buffer.scala 197:148] + node _T_316 = bits(ld_byte_hitvec_lo_2, 2, 2) @[el2_lsu_bus_buffer.scala 197:93] + node _T_317 = and(ld_byte_hitvec_lo_2, buf_age_younger[2]) @[el2_lsu_bus_buffer.scala 197:122] + node _T_318 = orr(_T_317) @[el2_lsu_bus_buffer.scala 197:144] + node _T_319 = eq(_T_318, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99] + node _T_320 = and(_T_316, _T_319) @[el2_lsu_bus_buffer.scala 197:97] + node _T_321 = bits(ld_byte_ibuf_hit_lo, 2, 2) @[el2_lsu_bus_buffer.scala 197:170] + node _T_322 = eq(_T_321, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150] + node _T_323 = and(_T_320, _T_322) @[el2_lsu_bus_buffer.scala 197:148] + node _T_324 = bits(ld_byte_hitvec_lo_2, 3, 3) @[el2_lsu_bus_buffer.scala 197:93] + node _T_325 = and(ld_byte_hitvec_lo_2, buf_age_younger[3]) @[el2_lsu_bus_buffer.scala 197:122] + node _T_326 = orr(_T_325) @[el2_lsu_bus_buffer.scala 197:144] + node _T_327 = eq(_T_326, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99] + node _T_328 = and(_T_324, _T_327) @[el2_lsu_bus_buffer.scala 197:97] + node _T_329 = bits(ld_byte_ibuf_hit_lo, 2, 2) @[el2_lsu_bus_buffer.scala 197:170] + node _T_330 = eq(_T_329, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150] + node _T_331 = and(_T_328, _T_330) @[el2_lsu_bus_buffer.scala 197:148] + node _T_332 = cat(_T_331, _T_323) @[Cat.scala 29:58] + node _T_333 = cat(_T_332, _T_315) @[Cat.scala 29:58] + node _T_334 = cat(_T_333, _T_307) @[Cat.scala 29:58] + node _T_335 = bits(ld_byte_hitvec_lo_3, 0, 0) @[el2_lsu_bus_buffer.scala 197:93] + node _T_336 = and(ld_byte_hitvec_lo_3, buf_age_younger[0]) @[el2_lsu_bus_buffer.scala 197:122] + node _T_337 = orr(_T_336) @[el2_lsu_bus_buffer.scala 197:144] + node _T_338 = eq(_T_337, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99] + node _T_339 = and(_T_335, _T_338) @[el2_lsu_bus_buffer.scala 197:97] + node _T_340 = bits(ld_byte_ibuf_hit_lo, 3, 3) @[el2_lsu_bus_buffer.scala 197:170] + node _T_341 = eq(_T_340, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150] + node _T_342 = and(_T_339, _T_341) @[el2_lsu_bus_buffer.scala 197:148] + node _T_343 = bits(ld_byte_hitvec_lo_3, 1, 1) @[el2_lsu_bus_buffer.scala 197:93] + node _T_344 = and(ld_byte_hitvec_lo_3, buf_age_younger[1]) @[el2_lsu_bus_buffer.scala 197:122] + node _T_345 = orr(_T_344) @[el2_lsu_bus_buffer.scala 197:144] + node _T_346 = eq(_T_345, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99] + node _T_347 = and(_T_343, _T_346) @[el2_lsu_bus_buffer.scala 197:97] + node _T_348 = bits(ld_byte_ibuf_hit_lo, 3, 3) @[el2_lsu_bus_buffer.scala 197:170] + node _T_349 = eq(_T_348, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150] + node _T_350 = and(_T_347, _T_349) @[el2_lsu_bus_buffer.scala 197:148] + node _T_351 = bits(ld_byte_hitvec_lo_3, 2, 2) @[el2_lsu_bus_buffer.scala 197:93] + node _T_352 = and(ld_byte_hitvec_lo_3, buf_age_younger[2]) @[el2_lsu_bus_buffer.scala 197:122] + node _T_353 = orr(_T_352) @[el2_lsu_bus_buffer.scala 197:144] + node _T_354 = eq(_T_353, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99] + node _T_355 = and(_T_351, _T_354) @[el2_lsu_bus_buffer.scala 197:97] + node _T_356 = bits(ld_byte_ibuf_hit_lo, 3, 3) @[el2_lsu_bus_buffer.scala 197:170] + node _T_357 = eq(_T_356, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150] + node _T_358 = and(_T_355, _T_357) @[el2_lsu_bus_buffer.scala 197:148] + node _T_359 = bits(ld_byte_hitvec_lo_3, 3, 3) @[el2_lsu_bus_buffer.scala 197:93] + node _T_360 = and(ld_byte_hitvec_lo_3, buf_age_younger[3]) @[el2_lsu_bus_buffer.scala 197:122] + node _T_361 = orr(_T_360) @[el2_lsu_bus_buffer.scala 197:144] + node _T_362 = eq(_T_361, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99] + node _T_363 = and(_T_359, _T_362) @[el2_lsu_bus_buffer.scala 197:97] + node _T_364 = bits(ld_byte_ibuf_hit_lo, 3, 3) @[el2_lsu_bus_buffer.scala 197:170] + node _T_365 = eq(_T_364, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150] + node _T_366 = and(_T_363, _T_365) @[el2_lsu_bus_buffer.scala 197:148] + node _T_367 = cat(_T_366, _T_358) @[Cat.scala 29:58] + node _T_368 = cat(_T_367, _T_350) @[Cat.scala 29:58] + node _T_369 = cat(_T_368, _T_342) @[Cat.scala 29:58] + ld_byte_hitvecfn_lo[0] <= _T_264 @[el2_lsu_bus_buffer.scala 197:23] + ld_byte_hitvecfn_lo[1] <= _T_299 @[el2_lsu_bus_buffer.scala 197:23] + ld_byte_hitvecfn_lo[2] <= _T_334 @[el2_lsu_bus_buffer.scala 197:23] + ld_byte_hitvecfn_lo[3] <= _T_369 @[el2_lsu_bus_buffer.scala 197:23] + node _T_370 = bits(ld_byte_hitvec_hi_0, 0, 0) @[el2_lsu_bus_buffer.scala 198:93] + node _T_371 = and(ld_byte_hitvec_hi_0, buf_age_younger[0]) @[el2_lsu_bus_buffer.scala 198:122] + node _T_372 = orr(_T_371) @[el2_lsu_bus_buffer.scala 198:144] + node _T_373 = eq(_T_372, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:99] + node _T_374 = and(_T_370, _T_373) @[el2_lsu_bus_buffer.scala 198:97] + node _T_375 = bits(ld_byte_ibuf_hit_hi, 0, 0) @[el2_lsu_bus_buffer.scala 198:170] + node _T_376 = eq(_T_375, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:150] + node _T_377 = and(_T_374, _T_376) @[el2_lsu_bus_buffer.scala 198:148] + node _T_378 = bits(ld_byte_hitvec_hi_0, 1, 1) @[el2_lsu_bus_buffer.scala 198:93] + node _T_379 = and(ld_byte_hitvec_hi_0, buf_age_younger[1]) @[el2_lsu_bus_buffer.scala 198:122] + node _T_380 = orr(_T_379) @[el2_lsu_bus_buffer.scala 198:144] + node _T_381 = eq(_T_380, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:99] + node _T_382 = and(_T_378, _T_381) @[el2_lsu_bus_buffer.scala 198:97] + node _T_383 = bits(ld_byte_ibuf_hit_hi, 0, 0) @[el2_lsu_bus_buffer.scala 198:170] + node _T_384 = eq(_T_383, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:150] + node _T_385 = and(_T_382, _T_384) @[el2_lsu_bus_buffer.scala 198:148] + node _T_386 = bits(ld_byte_hitvec_hi_0, 2, 2) @[el2_lsu_bus_buffer.scala 198:93] + node _T_387 = and(ld_byte_hitvec_hi_0, buf_age_younger[2]) @[el2_lsu_bus_buffer.scala 198:122] + node _T_388 = orr(_T_387) @[el2_lsu_bus_buffer.scala 198:144] + node _T_389 = eq(_T_388, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:99] + node _T_390 = and(_T_386, _T_389) @[el2_lsu_bus_buffer.scala 198:97] + node _T_391 = bits(ld_byte_ibuf_hit_hi, 0, 0) @[el2_lsu_bus_buffer.scala 198:170] + node _T_392 = eq(_T_391, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:150] + node _T_393 = and(_T_390, _T_392) @[el2_lsu_bus_buffer.scala 198:148] + node _T_394 = bits(ld_byte_hitvec_hi_0, 3, 3) @[el2_lsu_bus_buffer.scala 198:93] + node _T_395 = and(ld_byte_hitvec_hi_0, buf_age_younger[3]) @[el2_lsu_bus_buffer.scala 198:122] + node _T_396 = orr(_T_395) @[el2_lsu_bus_buffer.scala 198:144] + node _T_397 = eq(_T_396, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:99] + node _T_398 = and(_T_394, _T_397) @[el2_lsu_bus_buffer.scala 198:97] + node _T_399 = bits(ld_byte_ibuf_hit_hi, 0, 0) @[el2_lsu_bus_buffer.scala 198:170] + node _T_400 = eq(_T_399, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:150] + node _T_401 = and(_T_398, _T_400) @[el2_lsu_bus_buffer.scala 198:148] + node _T_402 = cat(_T_401, _T_393) @[Cat.scala 29:58] + node _T_403 = cat(_T_402, _T_385) @[Cat.scala 29:58] + node _T_404 = cat(_T_403, _T_377) @[Cat.scala 29:58] + node _T_405 = bits(ld_byte_hitvec_hi_1, 0, 0) @[el2_lsu_bus_buffer.scala 198:93] + node _T_406 = and(ld_byte_hitvec_hi_1, buf_age_younger[0]) @[el2_lsu_bus_buffer.scala 198:122] + node _T_407 = orr(_T_406) @[el2_lsu_bus_buffer.scala 198:144] + node _T_408 = eq(_T_407, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:99] + node _T_409 = and(_T_405, _T_408) @[el2_lsu_bus_buffer.scala 198:97] + node _T_410 = bits(ld_byte_ibuf_hit_hi, 1, 1) @[el2_lsu_bus_buffer.scala 198:170] + node _T_411 = eq(_T_410, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:150] + node _T_412 = and(_T_409, _T_411) @[el2_lsu_bus_buffer.scala 198:148] + node _T_413 = bits(ld_byte_hitvec_hi_1, 1, 1) @[el2_lsu_bus_buffer.scala 198:93] + node _T_414 = and(ld_byte_hitvec_hi_1, buf_age_younger[1]) @[el2_lsu_bus_buffer.scala 198:122] + node _T_415 = orr(_T_414) @[el2_lsu_bus_buffer.scala 198:144] + node _T_416 = eq(_T_415, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:99] + node _T_417 = and(_T_413, _T_416) @[el2_lsu_bus_buffer.scala 198:97] + node _T_418 = bits(ld_byte_ibuf_hit_hi, 1, 1) @[el2_lsu_bus_buffer.scala 198:170] + node _T_419 = eq(_T_418, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:150] + node _T_420 = and(_T_417, _T_419) @[el2_lsu_bus_buffer.scala 198:148] + node _T_421 = bits(ld_byte_hitvec_hi_1, 2, 2) @[el2_lsu_bus_buffer.scala 198:93] + node _T_422 = and(ld_byte_hitvec_hi_1, buf_age_younger[2]) @[el2_lsu_bus_buffer.scala 198:122] + node _T_423 = orr(_T_422) @[el2_lsu_bus_buffer.scala 198:144] + node _T_424 = eq(_T_423, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:99] + node _T_425 = and(_T_421, _T_424) @[el2_lsu_bus_buffer.scala 198:97] + node _T_426 = bits(ld_byte_ibuf_hit_hi, 1, 1) @[el2_lsu_bus_buffer.scala 198:170] + node _T_427 = eq(_T_426, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:150] + node _T_428 = and(_T_425, _T_427) @[el2_lsu_bus_buffer.scala 198:148] + node _T_429 = bits(ld_byte_hitvec_hi_1, 3, 3) @[el2_lsu_bus_buffer.scala 198:93] + node _T_430 = and(ld_byte_hitvec_hi_1, buf_age_younger[3]) @[el2_lsu_bus_buffer.scala 198:122] + node _T_431 = orr(_T_430) @[el2_lsu_bus_buffer.scala 198:144] + node _T_432 = eq(_T_431, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:99] + node _T_433 = and(_T_429, _T_432) @[el2_lsu_bus_buffer.scala 198:97] + node _T_434 = bits(ld_byte_ibuf_hit_hi, 1, 1) @[el2_lsu_bus_buffer.scala 198:170] + node _T_435 = eq(_T_434, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:150] + node _T_436 = and(_T_433, _T_435) @[el2_lsu_bus_buffer.scala 198:148] + node _T_437 = cat(_T_436, _T_428) @[Cat.scala 29:58] + node _T_438 = cat(_T_437, _T_420) @[Cat.scala 29:58] + node _T_439 = cat(_T_438, _T_412) @[Cat.scala 29:58] + node _T_440 = bits(ld_byte_hitvec_hi_2, 0, 0) @[el2_lsu_bus_buffer.scala 198:93] + node _T_441 = and(ld_byte_hitvec_hi_2, buf_age_younger[0]) @[el2_lsu_bus_buffer.scala 198:122] + node _T_442 = orr(_T_441) @[el2_lsu_bus_buffer.scala 198:144] + node _T_443 = eq(_T_442, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:99] + node _T_444 = and(_T_440, _T_443) @[el2_lsu_bus_buffer.scala 198:97] + node _T_445 = bits(ld_byte_ibuf_hit_hi, 2, 2) @[el2_lsu_bus_buffer.scala 198:170] + node _T_446 = eq(_T_445, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:150] + node _T_447 = and(_T_444, _T_446) @[el2_lsu_bus_buffer.scala 198:148] + node _T_448 = bits(ld_byte_hitvec_hi_2, 1, 1) @[el2_lsu_bus_buffer.scala 198:93] + node _T_449 = and(ld_byte_hitvec_hi_2, buf_age_younger[1]) @[el2_lsu_bus_buffer.scala 198:122] + node _T_450 = orr(_T_449) @[el2_lsu_bus_buffer.scala 198:144] + node _T_451 = eq(_T_450, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:99] + node _T_452 = and(_T_448, _T_451) @[el2_lsu_bus_buffer.scala 198:97] + node _T_453 = bits(ld_byte_ibuf_hit_hi, 2, 2) @[el2_lsu_bus_buffer.scala 198:170] + node _T_454 = eq(_T_453, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:150] + node _T_455 = and(_T_452, _T_454) @[el2_lsu_bus_buffer.scala 198:148] + node _T_456 = bits(ld_byte_hitvec_hi_2, 2, 2) @[el2_lsu_bus_buffer.scala 198:93] + node _T_457 = and(ld_byte_hitvec_hi_2, buf_age_younger[2]) @[el2_lsu_bus_buffer.scala 198:122] + node _T_458 = orr(_T_457) @[el2_lsu_bus_buffer.scala 198:144] + node _T_459 = eq(_T_458, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:99] + node _T_460 = and(_T_456, _T_459) @[el2_lsu_bus_buffer.scala 198:97] + node _T_461 = bits(ld_byte_ibuf_hit_hi, 2, 2) @[el2_lsu_bus_buffer.scala 198:170] + node _T_462 = eq(_T_461, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:150] + node _T_463 = and(_T_460, _T_462) @[el2_lsu_bus_buffer.scala 198:148] + node _T_464 = bits(ld_byte_hitvec_hi_2, 3, 3) @[el2_lsu_bus_buffer.scala 198:93] + node _T_465 = and(ld_byte_hitvec_hi_2, buf_age_younger[3]) @[el2_lsu_bus_buffer.scala 198:122] + node _T_466 = orr(_T_465) @[el2_lsu_bus_buffer.scala 198:144] + node _T_467 = eq(_T_466, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:99] + node _T_468 = and(_T_464, _T_467) @[el2_lsu_bus_buffer.scala 198:97] + node _T_469 = bits(ld_byte_ibuf_hit_hi, 2, 2) @[el2_lsu_bus_buffer.scala 198:170] + node _T_470 = eq(_T_469, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:150] + node _T_471 = and(_T_468, _T_470) @[el2_lsu_bus_buffer.scala 198:148] + node _T_472 = cat(_T_471, _T_463) @[Cat.scala 29:58] + node _T_473 = cat(_T_472, _T_455) @[Cat.scala 29:58] + node _T_474 = cat(_T_473, _T_447) @[Cat.scala 29:58] + node _T_475 = bits(ld_byte_hitvec_hi_3, 0, 0) @[el2_lsu_bus_buffer.scala 198:93] + node _T_476 = and(ld_byte_hitvec_hi_3, buf_age_younger[0]) @[el2_lsu_bus_buffer.scala 198:122] + node _T_477 = orr(_T_476) @[el2_lsu_bus_buffer.scala 198:144] + node _T_478 = eq(_T_477, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:99] + node _T_479 = and(_T_475, _T_478) @[el2_lsu_bus_buffer.scala 198:97] + node _T_480 = bits(ld_byte_ibuf_hit_hi, 3, 3) @[el2_lsu_bus_buffer.scala 198:170] + node _T_481 = eq(_T_480, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:150] + node _T_482 = and(_T_479, _T_481) @[el2_lsu_bus_buffer.scala 198:148] + node _T_483 = bits(ld_byte_hitvec_hi_3, 1, 1) @[el2_lsu_bus_buffer.scala 198:93] + node _T_484 = and(ld_byte_hitvec_hi_3, buf_age_younger[1]) @[el2_lsu_bus_buffer.scala 198:122] + node _T_485 = orr(_T_484) @[el2_lsu_bus_buffer.scala 198:144] + node _T_486 = eq(_T_485, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:99] + node _T_487 = and(_T_483, _T_486) @[el2_lsu_bus_buffer.scala 198:97] + node _T_488 = bits(ld_byte_ibuf_hit_hi, 3, 3) @[el2_lsu_bus_buffer.scala 198:170] + node _T_489 = eq(_T_488, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:150] + node _T_490 = and(_T_487, _T_489) @[el2_lsu_bus_buffer.scala 198:148] + node _T_491 = bits(ld_byte_hitvec_hi_3, 2, 2) @[el2_lsu_bus_buffer.scala 198:93] + node _T_492 = and(ld_byte_hitvec_hi_3, buf_age_younger[2]) @[el2_lsu_bus_buffer.scala 198:122] + node _T_493 = orr(_T_492) @[el2_lsu_bus_buffer.scala 198:144] + node _T_494 = eq(_T_493, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:99] + node _T_495 = and(_T_491, _T_494) @[el2_lsu_bus_buffer.scala 198:97] + node _T_496 = bits(ld_byte_ibuf_hit_hi, 3, 3) @[el2_lsu_bus_buffer.scala 198:170] + node _T_497 = eq(_T_496, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:150] + node _T_498 = and(_T_495, _T_497) @[el2_lsu_bus_buffer.scala 198:148] + node _T_499 = bits(ld_byte_hitvec_hi_3, 3, 3) @[el2_lsu_bus_buffer.scala 198:93] + node _T_500 = and(ld_byte_hitvec_hi_3, buf_age_younger[3]) @[el2_lsu_bus_buffer.scala 198:122] + node _T_501 = orr(_T_500) @[el2_lsu_bus_buffer.scala 198:144] + node _T_502 = eq(_T_501, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:99] + node _T_503 = and(_T_499, _T_502) @[el2_lsu_bus_buffer.scala 198:97] + node _T_504 = bits(ld_byte_ibuf_hit_hi, 3, 3) @[el2_lsu_bus_buffer.scala 198:170] + node _T_505 = eq(_T_504, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:150] + node _T_506 = and(_T_503, _T_505) @[el2_lsu_bus_buffer.scala 198:148] + node _T_507 = cat(_T_506, _T_498) @[Cat.scala 29:58] + node _T_508 = cat(_T_507, _T_490) @[Cat.scala 29:58] + node _T_509 = cat(_T_508, _T_482) @[Cat.scala 29:58] + ld_byte_hitvecfn_hi[0] <= _T_404 @[el2_lsu_bus_buffer.scala 198:23] + ld_byte_hitvecfn_hi[1] <= _T_439 @[el2_lsu_bus_buffer.scala 198:23] + ld_byte_hitvecfn_hi[2] <= _T_474 @[el2_lsu_bus_buffer.scala 198:23] + ld_byte_hitvecfn_hi[3] <= _T_509 @[el2_lsu_bus_buffer.scala 198:23] + wire ibuf_addr : UInt<32> + ibuf_addr <= UInt<1>("h00") + wire ibuf_write : UInt<1> + ibuf_write <= UInt<1>("h00") + wire ibuf_valid : UInt<1> + ibuf_valid <= UInt<1>("h00") + node _T_510 = bits(io.lsu_addr_m, 31, 2) @[el2_lsu_bus_buffer.scala 203:43] + node _T_511 = bits(ibuf_addr, 31, 2) @[el2_lsu_bus_buffer.scala 203:64] + node _T_512 = eq(_T_510, _T_511) @[el2_lsu_bus_buffer.scala 203:51] + node _T_513 = and(_T_512, ibuf_write) @[el2_lsu_bus_buffer.scala 203:73] + node _T_514 = and(_T_513, ibuf_valid) @[el2_lsu_bus_buffer.scala 203:86] + node ld_addr_ibuf_hit_lo = and(_T_514, io.lsu_busreq_m) @[el2_lsu_bus_buffer.scala 203:99] + node _T_515 = bits(io.end_addr_m, 31, 2) @[el2_lsu_bus_buffer.scala 204:43] + node _T_516 = bits(ibuf_addr, 31, 2) @[el2_lsu_bus_buffer.scala 204:64] + node _T_517 = eq(_T_515, _T_516) @[el2_lsu_bus_buffer.scala 204:51] + node _T_518 = and(_T_517, ibuf_write) @[el2_lsu_bus_buffer.scala 204:73] + node _T_519 = and(_T_518, ibuf_valid) @[el2_lsu_bus_buffer.scala 204:86] + node ld_addr_ibuf_hit_hi = and(_T_519, io.lsu_busreq_m) @[el2_lsu_bus_buffer.scala 204:99] + wire ibuf_byteen : UInt<4> + ibuf_byteen <= UInt<1>("h00") + node _T_520 = bits(ld_addr_ibuf_hit_lo, 0, 0) @[Bitwise.scala 72:15] + node _T_521 = mux(_T_520, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_522 = and(_T_521, ibuf_byteen) @[el2_lsu_bus_buffer.scala 208:55] + node _T_523 = and(_T_522, ldst_byteen_lo_m) @[el2_lsu_bus_buffer.scala 208:69] + ld_byte_ibuf_hit_lo <= _T_523 @[el2_lsu_bus_buffer.scala 208:23] + node _T_524 = bits(ld_addr_ibuf_hit_hi, 0, 0) @[Bitwise.scala 72:15] + node _T_525 = mux(_T_524, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_526 = and(_T_525, ibuf_byteen) @[el2_lsu_bus_buffer.scala 209:55] + node _T_527 = and(_T_526, ldst_byteen_hi_m) @[el2_lsu_bus_buffer.scala 209:69] + ld_byte_ibuf_hit_hi <= _T_527 @[el2_lsu_bus_buffer.scala 209:23] + wire buf_data : UInt<32>[4] @[el2_lsu_bus_buffer.scala 211:22] + buf_data[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 212:12] + buf_data[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 212:12] + buf_data[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 212:12] + buf_data[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 212:12] + wire fwd_data : UInt<32> + fwd_data <= UInt<1>("h00") + node _T_528 = bits(ld_byte_ibuf_hit_lo, 0, 0) @[el2_lsu_bus_buffer.scala 214:81] + node _T_529 = bits(_T_528, 0, 0) @[Bitwise.scala 72:15] + node _T_530 = mux(_T_529, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_531 = bits(ld_byte_ibuf_hit_lo, 1, 1) @[el2_lsu_bus_buffer.scala 214:81] + node _T_532 = bits(_T_531, 0, 0) @[Bitwise.scala 72:15] + node _T_533 = mux(_T_532, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_534 = bits(ld_byte_ibuf_hit_lo, 2, 2) @[el2_lsu_bus_buffer.scala 214:81] + node _T_535 = bits(_T_534, 0, 0) @[Bitwise.scala 72:15] + node _T_536 = mux(_T_535, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_537 = bits(ld_byte_ibuf_hit_lo, 3, 3) @[el2_lsu_bus_buffer.scala 214:81] + node _T_538 = bits(_T_537, 0, 0) @[Bitwise.scala 72:15] + node _T_539 = mux(_T_538, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_540 = cat(_T_539, _T_536) @[Cat.scala 29:58] + node _T_541 = cat(_T_540, _T_533) @[Cat.scala 29:58] + node ld_fwddata_buf_lo_initial = cat(_T_541, _T_530) @[Cat.scala 29:58] + node _T_542 = bits(ld_byte_ibuf_hit_hi, 0, 0) @[el2_lsu_bus_buffer.scala 215:81] + node _T_543 = bits(_T_542, 0, 0) @[Bitwise.scala 72:15] + node _T_544 = mux(_T_543, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_545 = bits(ld_byte_ibuf_hit_hi, 1, 1) @[el2_lsu_bus_buffer.scala 215:81] + node _T_546 = bits(_T_545, 0, 0) @[Bitwise.scala 72:15] + node _T_547 = mux(_T_546, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_548 = bits(ld_byte_ibuf_hit_hi, 2, 2) @[el2_lsu_bus_buffer.scala 215:81] + node _T_549 = bits(_T_548, 0, 0) @[Bitwise.scala 72:15] + node _T_550 = mux(_T_549, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_551 = bits(ld_byte_ibuf_hit_hi, 3, 3) @[el2_lsu_bus_buffer.scala 215:81] + node _T_552 = bits(_T_551, 0, 0) @[Bitwise.scala 72:15] + node _T_553 = mux(_T_552, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_554 = cat(_T_553, _T_550) @[Cat.scala 29:58] + node _T_555 = cat(_T_554, _T_547) @[Cat.scala 29:58] + node ld_fwddata_buf_hi_initial = cat(_T_555, _T_544) @[Cat.scala 29:58] + node _T_556 = bits(ld_byte_hitvecfn_lo[3], 0, 0) @[el2_lsu_bus_buffer.scala 216:86] + node _T_557 = bits(_T_556, 0, 0) @[Bitwise.scala 72:15] + node _T_558 = mux(_T_557, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_559 = bits(buf_data[0], 31, 24) @[el2_lsu_bus_buffer.scala 216:104] + node _T_560 = and(_T_558, _T_559) @[el2_lsu_bus_buffer.scala 216:91] + node _T_561 = bits(ld_byte_hitvecfn_lo[3], 1, 1) @[el2_lsu_bus_buffer.scala 216:86] + node _T_562 = bits(_T_561, 0, 0) @[Bitwise.scala 72:15] + node _T_563 = mux(_T_562, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_564 = bits(buf_data[1], 31, 24) @[el2_lsu_bus_buffer.scala 216:104] + node _T_565 = and(_T_563, _T_564) @[el2_lsu_bus_buffer.scala 216:91] + node _T_566 = bits(ld_byte_hitvecfn_lo[3], 2, 2) @[el2_lsu_bus_buffer.scala 216:86] + node _T_567 = bits(_T_566, 0, 0) @[Bitwise.scala 72:15] + node _T_568 = mux(_T_567, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_569 = bits(buf_data[2], 31, 24) @[el2_lsu_bus_buffer.scala 216:104] + node _T_570 = and(_T_568, _T_569) @[el2_lsu_bus_buffer.scala 216:91] + node _T_571 = bits(ld_byte_hitvecfn_lo[3], 3, 3) @[el2_lsu_bus_buffer.scala 216:86] + node _T_572 = bits(_T_571, 0, 0) @[Bitwise.scala 72:15] + node _T_573 = mux(_T_572, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_574 = bits(buf_data[3], 31, 24) @[el2_lsu_bus_buffer.scala 216:104] + node _T_575 = and(_T_573, _T_574) @[el2_lsu_bus_buffer.scala 216:91] + node _T_576 = or(_T_560, _T_565) @[el2_lsu_bus_buffer.scala 216:123] + node _T_577 = or(_T_576, _T_570) @[el2_lsu_bus_buffer.scala 216:123] + node _T_578 = or(_T_577, _T_575) @[el2_lsu_bus_buffer.scala 216:123] + node _T_579 = bits(ld_byte_hitvecfn_lo[2], 0, 0) @[el2_lsu_bus_buffer.scala 217:86] + node _T_580 = bits(_T_579, 0, 0) @[Bitwise.scala 72:15] + node _T_581 = mux(_T_580, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_582 = bits(buf_data[0], 23, 16) @[el2_lsu_bus_buffer.scala 217:104] + node _T_583 = and(_T_581, _T_582) @[el2_lsu_bus_buffer.scala 217:91] + node _T_584 = bits(ld_byte_hitvecfn_lo[2], 1, 1) @[el2_lsu_bus_buffer.scala 217:86] + node _T_585 = bits(_T_584, 0, 0) @[Bitwise.scala 72:15] + node _T_586 = mux(_T_585, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_587 = bits(buf_data[1], 23, 16) @[el2_lsu_bus_buffer.scala 217:104] + node _T_588 = and(_T_586, _T_587) @[el2_lsu_bus_buffer.scala 217:91] + node _T_589 = bits(ld_byte_hitvecfn_lo[2], 2, 2) @[el2_lsu_bus_buffer.scala 217:86] + node _T_590 = bits(_T_589, 0, 0) @[Bitwise.scala 72:15] + node _T_591 = mux(_T_590, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_592 = bits(buf_data[2], 23, 16) @[el2_lsu_bus_buffer.scala 217:104] + node _T_593 = and(_T_591, _T_592) @[el2_lsu_bus_buffer.scala 217:91] + node _T_594 = bits(ld_byte_hitvecfn_lo[2], 3, 3) @[el2_lsu_bus_buffer.scala 217:86] + node _T_595 = bits(_T_594, 0, 0) @[Bitwise.scala 72:15] + node _T_596 = mux(_T_595, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_597 = bits(buf_data[3], 23, 16) @[el2_lsu_bus_buffer.scala 217:104] + node _T_598 = and(_T_596, _T_597) @[el2_lsu_bus_buffer.scala 217:91] + node _T_599 = or(_T_583, _T_588) @[el2_lsu_bus_buffer.scala 217:123] + node _T_600 = or(_T_599, _T_593) @[el2_lsu_bus_buffer.scala 217:123] + node _T_601 = or(_T_600, _T_598) @[el2_lsu_bus_buffer.scala 217:123] + node _T_602 = bits(ld_byte_hitvecfn_lo[1], 0, 0) @[el2_lsu_bus_buffer.scala 218:86] + node _T_603 = bits(_T_602, 0, 0) @[Bitwise.scala 72:15] + node _T_604 = mux(_T_603, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_605 = bits(buf_data[0], 15, 8) @[el2_lsu_bus_buffer.scala 218:104] + node _T_606 = and(_T_604, _T_605) @[el2_lsu_bus_buffer.scala 218:91] + node _T_607 = bits(ld_byte_hitvecfn_lo[1], 1, 1) @[el2_lsu_bus_buffer.scala 218:86] + node _T_608 = bits(_T_607, 0, 0) @[Bitwise.scala 72:15] + node _T_609 = mux(_T_608, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_610 = bits(buf_data[1], 15, 8) @[el2_lsu_bus_buffer.scala 218:104] + node _T_611 = and(_T_609, _T_610) @[el2_lsu_bus_buffer.scala 218:91] + node _T_612 = bits(ld_byte_hitvecfn_lo[1], 2, 2) @[el2_lsu_bus_buffer.scala 218:86] + node _T_613 = bits(_T_612, 0, 0) @[Bitwise.scala 72:15] + node _T_614 = mux(_T_613, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_615 = bits(buf_data[2], 15, 8) @[el2_lsu_bus_buffer.scala 218:104] + node _T_616 = and(_T_614, _T_615) @[el2_lsu_bus_buffer.scala 218:91] + node _T_617 = bits(ld_byte_hitvecfn_lo[1], 3, 3) @[el2_lsu_bus_buffer.scala 218:86] + node _T_618 = bits(_T_617, 0, 0) @[Bitwise.scala 72:15] + node _T_619 = mux(_T_618, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_620 = bits(buf_data[3], 15, 8) @[el2_lsu_bus_buffer.scala 218:104] + node _T_621 = and(_T_619, _T_620) @[el2_lsu_bus_buffer.scala 218:91] + node _T_622 = or(_T_606, _T_611) @[el2_lsu_bus_buffer.scala 218:123] + node _T_623 = or(_T_622, _T_616) @[el2_lsu_bus_buffer.scala 218:123] + node _T_624 = or(_T_623, _T_621) @[el2_lsu_bus_buffer.scala 218:123] + node _T_625 = bits(ld_byte_hitvecfn_lo[0], 0, 0) @[el2_lsu_bus_buffer.scala 219:86] + node _T_626 = bits(_T_625, 0, 0) @[Bitwise.scala 72:15] + node _T_627 = mux(_T_626, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_628 = bits(buf_data[0], 7, 0) @[el2_lsu_bus_buffer.scala 219:104] + node _T_629 = and(_T_627, _T_628) @[el2_lsu_bus_buffer.scala 219:91] + node _T_630 = bits(ld_byte_hitvecfn_lo[0], 1, 1) @[el2_lsu_bus_buffer.scala 219:86] + node _T_631 = bits(_T_630, 0, 0) @[Bitwise.scala 72:15] + node _T_632 = mux(_T_631, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_633 = bits(buf_data[1], 7, 0) @[el2_lsu_bus_buffer.scala 219:104] + node _T_634 = and(_T_632, _T_633) @[el2_lsu_bus_buffer.scala 219:91] + node _T_635 = bits(ld_byte_hitvecfn_lo[0], 2, 2) @[el2_lsu_bus_buffer.scala 219:86] + node _T_636 = bits(_T_635, 0, 0) @[Bitwise.scala 72:15] + node _T_637 = mux(_T_636, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_638 = bits(buf_data[2], 7, 0) @[el2_lsu_bus_buffer.scala 219:104] + node _T_639 = and(_T_637, _T_638) @[el2_lsu_bus_buffer.scala 219:91] + node _T_640 = bits(ld_byte_hitvecfn_lo[0], 3, 3) @[el2_lsu_bus_buffer.scala 219:86] + node _T_641 = bits(_T_640, 0, 0) @[Bitwise.scala 72:15] + node _T_642 = mux(_T_641, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_643 = bits(buf_data[3], 7, 0) @[el2_lsu_bus_buffer.scala 219:104] + node _T_644 = and(_T_642, _T_643) @[el2_lsu_bus_buffer.scala 219:91] + node _T_645 = or(_T_629, _T_634) @[el2_lsu_bus_buffer.scala 219:123] + node _T_646 = or(_T_645, _T_639) @[el2_lsu_bus_buffer.scala 219:123] + node _T_647 = or(_T_646, _T_644) @[el2_lsu_bus_buffer.scala 219:123] + node _T_648 = cat(_T_624, _T_647) @[Cat.scala 29:58] + node _T_649 = cat(_T_578, _T_601) @[Cat.scala 29:58] + node _T_650 = cat(_T_649, _T_648) @[Cat.scala 29:58] + node _T_651 = and(ld_fwddata_buf_lo_initial, ibuf_data) @[el2_lsu_bus_buffer.scala 220:32] + node _T_652 = or(_T_650, _T_651) @[el2_lsu_bus_buffer.scala 219:129] + io.ld_fwddata_buf_lo <= _T_652 @[el2_lsu_bus_buffer.scala 216:24] + node _T_653 = bits(ld_byte_hitvecfn_hi[3], 0, 0) @[el2_lsu_bus_buffer.scala 222:86] + node _T_654 = bits(_T_653, 0, 0) @[Bitwise.scala 72:15] + node _T_655 = mux(_T_654, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_656 = bits(buf_data[0], 31, 24) @[el2_lsu_bus_buffer.scala 222:104] + node _T_657 = and(_T_655, _T_656) @[el2_lsu_bus_buffer.scala 222:91] + node _T_658 = bits(ld_byte_hitvecfn_hi[3], 1, 1) @[el2_lsu_bus_buffer.scala 222:86] + node _T_659 = bits(_T_658, 0, 0) @[Bitwise.scala 72:15] + node _T_660 = mux(_T_659, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_661 = bits(buf_data[1], 31, 24) @[el2_lsu_bus_buffer.scala 222:104] + node _T_662 = and(_T_660, _T_661) @[el2_lsu_bus_buffer.scala 222:91] + node _T_663 = bits(ld_byte_hitvecfn_hi[3], 2, 2) @[el2_lsu_bus_buffer.scala 222:86] + node _T_664 = bits(_T_663, 0, 0) @[Bitwise.scala 72:15] + node _T_665 = mux(_T_664, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_666 = bits(buf_data[2], 31, 24) @[el2_lsu_bus_buffer.scala 222:104] + node _T_667 = and(_T_665, _T_666) @[el2_lsu_bus_buffer.scala 222:91] + node _T_668 = bits(ld_byte_hitvecfn_hi[3], 3, 3) @[el2_lsu_bus_buffer.scala 222:86] + node _T_669 = bits(_T_668, 0, 0) @[Bitwise.scala 72:15] + node _T_670 = mux(_T_669, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_671 = bits(buf_data[3], 31, 24) @[el2_lsu_bus_buffer.scala 222:104] + node _T_672 = and(_T_670, _T_671) @[el2_lsu_bus_buffer.scala 222:91] + node _T_673 = or(_T_657, _T_662) @[el2_lsu_bus_buffer.scala 222:123] + node _T_674 = or(_T_673, _T_667) @[el2_lsu_bus_buffer.scala 222:123] + node _T_675 = or(_T_674, _T_672) @[el2_lsu_bus_buffer.scala 222:123] + node _T_676 = bits(ld_byte_hitvecfn_hi[2], 0, 0) @[el2_lsu_bus_buffer.scala 223:86] + node _T_677 = bits(_T_676, 0, 0) @[Bitwise.scala 72:15] + node _T_678 = mux(_T_677, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_679 = bits(buf_data[0], 23, 16) @[el2_lsu_bus_buffer.scala 223:104] + node _T_680 = and(_T_678, _T_679) @[el2_lsu_bus_buffer.scala 223:91] + node _T_681 = bits(ld_byte_hitvecfn_hi[2], 1, 1) @[el2_lsu_bus_buffer.scala 223:86] + node _T_682 = bits(_T_681, 0, 0) @[Bitwise.scala 72:15] + node _T_683 = mux(_T_682, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_684 = bits(buf_data[1], 23, 16) @[el2_lsu_bus_buffer.scala 223:104] + node _T_685 = and(_T_683, _T_684) @[el2_lsu_bus_buffer.scala 223:91] + node _T_686 = bits(ld_byte_hitvecfn_hi[2], 2, 2) @[el2_lsu_bus_buffer.scala 223:86] + node _T_687 = bits(_T_686, 0, 0) @[Bitwise.scala 72:15] + node _T_688 = mux(_T_687, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_689 = bits(buf_data[2], 23, 16) @[el2_lsu_bus_buffer.scala 223:104] + node _T_690 = and(_T_688, _T_689) @[el2_lsu_bus_buffer.scala 223:91] + node _T_691 = bits(ld_byte_hitvecfn_hi[2], 3, 3) @[el2_lsu_bus_buffer.scala 223:86] + node _T_692 = bits(_T_691, 0, 0) @[Bitwise.scala 72:15] + node _T_693 = mux(_T_692, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_694 = bits(buf_data[3], 23, 16) @[el2_lsu_bus_buffer.scala 223:104] + node _T_695 = and(_T_693, _T_694) @[el2_lsu_bus_buffer.scala 223:91] + node _T_696 = or(_T_680, _T_685) @[el2_lsu_bus_buffer.scala 223:123] + node _T_697 = or(_T_696, _T_690) @[el2_lsu_bus_buffer.scala 223:123] + node _T_698 = or(_T_697, _T_695) @[el2_lsu_bus_buffer.scala 223:123] + node _T_699 = bits(ld_byte_hitvecfn_hi[1], 0, 0) @[el2_lsu_bus_buffer.scala 224:86] + node _T_700 = bits(_T_699, 0, 0) @[Bitwise.scala 72:15] + node _T_701 = mux(_T_700, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_702 = bits(buf_data[0], 15, 8) @[el2_lsu_bus_buffer.scala 224:104] + node _T_703 = and(_T_701, _T_702) @[el2_lsu_bus_buffer.scala 224:91] + node _T_704 = bits(ld_byte_hitvecfn_hi[1], 1, 1) @[el2_lsu_bus_buffer.scala 224:86] + node _T_705 = bits(_T_704, 0, 0) @[Bitwise.scala 72:15] + node _T_706 = mux(_T_705, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_707 = bits(buf_data[1], 15, 8) @[el2_lsu_bus_buffer.scala 224:104] + node _T_708 = and(_T_706, _T_707) @[el2_lsu_bus_buffer.scala 224:91] + node _T_709 = bits(ld_byte_hitvecfn_hi[1], 2, 2) @[el2_lsu_bus_buffer.scala 224:86] + node _T_710 = bits(_T_709, 0, 0) @[Bitwise.scala 72:15] + node _T_711 = mux(_T_710, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_712 = bits(buf_data[2], 15, 8) @[el2_lsu_bus_buffer.scala 224:104] + node _T_713 = and(_T_711, _T_712) @[el2_lsu_bus_buffer.scala 224:91] + node _T_714 = bits(ld_byte_hitvecfn_hi[1], 3, 3) @[el2_lsu_bus_buffer.scala 224:86] + node _T_715 = bits(_T_714, 0, 0) @[Bitwise.scala 72:15] + node _T_716 = mux(_T_715, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_717 = bits(buf_data[3], 15, 8) @[el2_lsu_bus_buffer.scala 224:104] + node _T_718 = and(_T_716, _T_717) @[el2_lsu_bus_buffer.scala 224:91] + node _T_719 = or(_T_703, _T_708) @[el2_lsu_bus_buffer.scala 224:123] + node _T_720 = or(_T_719, _T_713) @[el2_lsu_bus_buffer.scala 224:123] + node _T_721 = or(_T_720, _T_718) @[el2_lsu_bus_buffer.scala 224:123] + node _T_722 = bits(ld_byte_hitvecfn_hi[0], 0, 0) @[el2_lsu_bus_buffer.scala 225:86] + node _T_723 = bits(_T_722, 0, 0) @[Bitwise.scala 72:15] + node _T_724 = mux(_T_723, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_725 = bits(buf_data[0], 7, 0) @[el2_lsu_bus_buffer.scala 225:104] + node _T_726 = and(_T_724, _T_725) @[el2_lsu_bus_buffer.scala 225:91] + node _T_727 = bits(ld_byte_hitvecfn_hi[0], 1, 1) @[el2_lsu_bus_buffer.scala 225:86] + node _T_728 = bits(_T_727, 0, 0) @[Bitwise.scala 72:15] + node _T_729 = mux(_T_728, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_730 = bits(buf_data[1], 7, 0) @[el2_lsu_bus_buffer.scala 225:104] + node _T_731 = and(_T_729, _T_730) @[el2_lsu_bus_buffer.scala 225:91] + node _T_732 = bits(ld_byte_hitvecfn_hi[0], 2, 2) @[el2_lsu_bus_buffer.scala 225:86] + node _T_733 = bits(_T_732, 0, 0) @[Bitwise.scala 72:15] + node _T_734 = mux(_T_733, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_735 = bits(buf_data[2], 7, 0) @[el2_lsu_bus_buffer.scala 225:104] + node _T_736 = and(_T_734, _T_735) @[el2_lsu_bus_buffer.scala 225:91] + node _T_737 = bits(ld_byte_hitvecfn_hi[0], 3, 3) @[el2_lsu_bus_buffer.scala 225:86] + node _T_738 = bits(_T_737, 0, 0) @[Bitwise.scala 72:15] + node _T_739 = mux(_T_738, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_740 = bits(buf_data[3], 7, 0) @[el2_lsu_bus_buffer.scala 225:104] + node _T_741 = and(_T_739, _T_740) @[el2_lsu_bus_buffer.scala 225:91] + node _T_742 = or(_T_726, _T_731) @[el2_lsu_bus_buffer.scala 225:123] + node _T_743 = or(_T_742, _T_736) @[el2_lsu_bus_buffer.scala 225:123] + node _T_744 = or(_T_743, _T_741) @[el2_lsu_bus_buffer.scala 225:123] + node _T_745 = cat(_T_721, _T_744) @[Cat.scala 29:58] + node _T_746 = cat(_T_675, _T_698) @[Cat.scala 29:58] + node _T_747 = cat(_T_746, _T_745) @[Cat.scala 29:58] + node _T_748 = and(ld_fwddata_buf_hi_initial, ibuf_data) @[el2_lsu_bus_buffer.scala 226:32] + node _T_749 = or(_T_747, _T_748) @[el2_lsu_bus_buffer.scala 225:129] + io.ld_fwddata_buf_hi <= _T_749 @[el2_lsu_bus_buffer.scala 222:24] + node bus_coalescing_disable = or(io.dec_tlu_wb_coalescing_disable, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 228:65] + node _T_750 = mux(io.lsu_pkt_r.by, UInt<4>("h01"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_751 = mux(io.lsu_pkt_r.half, UInt<4>("h03"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_752 = mux(io.lsu_pkt_r.word, UInt<4>("h0f"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_753 = or(_T_750, _T_751) @[Mux.scala 27:72] + node _T_754 = or(_T_753, _T_752) @[Mux.scala 27:72] + wire ldst_byteen_r : UInt<4> @[Mux.scala 27:72] + ldst_byteen_r <= _T_754 @[Mux.scala 27:72] + node _T_755 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_bus_buffer.scala 233:50] + node _T_756 = eq(_T_755, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 233:55] + node _T_757 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_bus_buffer.scala 234:50] + node _T_758 = eq(_T_757, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 234:55] + node _T_759 = bits(ldst_byteen_r, 3, 3) @[el2_lsu_bus_buffer.scala 234:91] + node _T_760 = cat(UInt<3>("h00"), _T_759) @[Cat.scala 29:58] + node _T_761 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_bus_buffer.scala 235:50] + node _T_762 = eq(_T_761, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 235:55] + node _T_763 = bits(ldst_byteen_r, 3, 2) @[el2_lsu_bus_buffer.scala 235:91] + node _T_764 = cat(UInt<2>("h00"), _T_763) @[Cat.scala 29:58] + node _T_765 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_bus_buffer.scala 236:50] + node _T_766 = eq(_T_765, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 236:55] + node _T_767 = bits(ldst_byteen_r, 3, 1) @[el2_lsu_bus_buffer.scala 236:91] + node _T_768 = cat(UInt<1>("h00"), _T_767) @[Cat.scala 29:58] + node _T_769 = mux(_T_756, UInt<4>("h00"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_770 = mux(_T_758, _T_760, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_771 = mux(_T_762, _T_764, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_772 = mux(_T_766, _T_768, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_773 = or(_T_769, _T_770) @[Mux.scala 27:72] + node _T_774 = or(_T_773, _T_771) @[Mux.scala 27:72] + node _T_775 = or(_T_774, _T_772) @[Mux.scala 27:72] + wire ldst_byteen_hi_r : UInt<4> @[Mux.scala 27:72] + ldst_byteen_hi_r <= _T_775 @[Mux.scala 27:72] + node _T_776 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_bus_buffer.scala 237:50] + node _T_777 = eq(_T_776, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 237:55] + node _T_778 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_bus_buffer.scala 238:50] + node _T_779 = eq(_T_778, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 238:55] + node _T_780 = bits(ldst_byteen_r, 2, 0) @[el2_lsu_bus_buffer.scala 238:81] + node _T_781 = cat(_T_780, UInt<1>("h00")) @[Cat.scala 29:58] + node _T_782 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_bus_buffer.scala 239:50] + node _T_783 = eq(_T_782, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 239:55] + node _T_784 = bits(ldst_byteen_r, 1, 0) @[el2_lsu_bus_buffer.scala 239:81] + node _T_785 = cat(_T_784, UInt<2>("h00")) @[Cat.scala 29:58] + node _T_786 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_bus_buffer.scala 240:50] + node _T_787 = eq(_T_786, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 240:55] + node _T_788 = bits(ldst_byteen_r, 0, 0) @[el2_lsu_bus_buffer.scala 240:81] + node _T_789 = cat(_T_788, UInt<3>("h00")) @[Cat.scala 29:58] + node _T_790 = mux(_T_777, ldst_byteen_r, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_791 = mux(_T_779, _T_781, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_792 = mux(_T_783, _T_785, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_793 = mux(_T_787, _T_789, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_794 = or(_T_790, _T_791) @[Mux.scala 27:72] + node _T_795 = or(_T_794, _T_792) @[Mux.scala 27:72] + node _T_796 = or(_T_795, _T_793) @[Mux.scala 27:72] + wire ldst_byteen_lo_r : UInt<4> @[Mux.scala 27:72] + ldst_byteen_lo_r <= _T_796 @[Mux.scala 27:72] + node _T_797 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_bus_buffer.scala 242:49] + node _T_798 = eq(_T_797, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 242:54] + node _T_799 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_bus_buffer.scala 243:49] + node _T_800 = eq(_T_799, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 243:54] + node _T_801 = bits(io.store_data_r, 31, 8) @[el2_lsu_bus_buffer.scala 243:93] + node _T_802 = cat(UInt<8>("h00"), _T_801) @[Cat.scala 29:58] + node _T_803 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_bus_buffer.scala 244:49] + node _T_804 = eq(_T_803, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 244:54] + node _T_805 = bits(io.store_data_r, 31, 16) @[el2_lsu_bus_buffer.scala 244:93] + node _T_806 = cat(UInt<16>("h00"), _T_805) @[Cat.scala 29:58] + node _T_807 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_bus_buffer.scala 245:49] + node _T_808 = eq(_T_807, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 245:54] + node _T_809 = bits(io.store_data_r, 31, 24) @[el2_lsu_bus_buffer.scala 245:93] + node _T_810 = cat(UInt<24>("h00"), _T_809) @[Cat.scala 29:58] + node _T_811 = mux(_T_798, UInt<32>("h00"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_812 = mux(_T_800, _T_802, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_813 = mux(_T_804, _T_806, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_814 = mux(_T_808, _T_810, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_815 = or(_T_811, _T_812) @[Mux.scala 27:72] + node _T_816 = or(_T_815, _T_813) @[Mux.scala 27:72] + node _T_817 = or(_T_816, _T_814) @[Mux.scala 27:72] + wire store_data_hi_r : UInt<32> @[Mux.scala 27:72] + store_data_hi_r <= _T_817 @[Mux.scala 27:72] + node _T_818 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_bus_buffer.scala 247:49] + node _T_819 = eq(_T_818, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 247:54] + node _T_820 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_bus_buffer.scala 248:49] + node _T_821 = eq(_T_820, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 248:54] + node _T_822 = bits(io.store_data_r, 23, 0) @[el2_lsu_bus_buffer.scala 248:82] + node _T_823 = cat(_T_822, UInt<8>("h00")) @[Cat.scala 29:58] + node _T_824 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_bus_buffer.scala 249:49] + node _T_825 = eq(_T_824, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 249:54] + node _T_826 = bits(io.store_data_r, 15, 0) @[el2_lsu_bus_buffer.scala 249:82] + node _T_827 = cat(_T_826, UInt<16>("h00")) @[Cat.scala 29:58] + node _T_828 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_bus_buffer.scala 250:49] + node _T_829 = eq(_T_828, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 250:54] + node _T_830 = bits(io.store_data_r, 7, 0) @[el2_lsu_bus_buffer.scala 250:82] + node _T_831 = cat(_T_830, UInt<24>("h00")) @[Cat.scala 29:58] + node _T_832 = mux(_T_819, io.store_data_r, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_833 = mux(_T_821, _T_823, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_834 = mux(_T_825, _T_827, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_835 = mux(_T_829, _T_831, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_836 = or(_T_832, _T_833) @[Mux.scala 27:72] + node _T_837 = or(_T_836, _T_834) @[Mux.scala 27:72] + node _T_838 = or(_T_837, _T_835) @[Mux.scala 27:72] + wire store_data_lo_r : UInt<32> @[Mux.scala 27:72] + store_data_lo_r <= _T_838 @[Mux.scala 27:72] + node _T_839 = bits(io.lsu_addr_r, 3, 3) @[el2_lsu_bus_buffer.scala 253:36] + node _T_840 = bits(io.end_addr_r, 3, 3) @[el2_lsu_bus_buffer.scala 253:57] + node ldst_samedw_r = eq(_T_839, _T_840) @[el2_lsu_bus_buffer.scala 253:40] + node _T_841 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_bus_buffer.scala 254:67] + node _T_842 = eq(_T_841, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 254:74] + node _T_843 = bits(io.lsu_addr_r, 0, 0) @[el2_lsu_bus_buffer.scala 255:40] + node _T_844 = eq(_T_843, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 255:26] + node _T_845 = mux(io.lsu_pkt_r.word, _T_842, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_846 = mux(io.lsu_pkt_r.half, _T_844, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_847 = mux(io.lsu_pkt_r.by, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_848 = or(_T_845, _T_846) @[Mux.scala 27:72] + node _T_849 = or(_T_848, _T_847) @[Mux.scala 27:72] + wire is_aligned_r : UInt<1> @[Mux.scala 27:72] + is_aligned_r <= _T_849 @[Mux.scala 27:72] + node _T_850 = or(io.lsu_pkt_r.load, io.no_word_merge_r) @[el2_lsu_bus_buffer.scala 257:55] + node _T_851 = and(io.lsu_busreq_r, _T_850) @[el2_lsu_bus_buffer.scala 257:34] + node _T_852 = eq(ibuf_valid, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 257:79] + node ibuf_byp = and(_T_851, _T_852) @[el2_lsu_bus_buffer.scala 257:77] + node _T_853 = and(io.lsu_busreq_r, io.lsu_commit_r) @[el2_lsu_bus_buffer.scala 258:36] + node _T_854 = eq(ibuf_byp, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 258:56] + node ibuf_wr_en = and(_T_853, _T_854) @[el2_lsu_bus_buffer.scala 258:54] + wire ibuf_drain_vld : UInt<1> + ibuf_drain_vld <= UInt<1>("h00") + node _T_855 = eq(ibuf_wr_en, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 260:36] + node _T_856 = and(ibuf_drain_vld, _T_855) @[el2_lsu_bus_buffer.scala 260:34] + node ibuf_rst = or(_T_856, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 260:49] + node _T_857 = eq(io.lsu_busreq_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 261:44] + node _T_858 = and(io.lsu_busreq_m, _T_857) @[el2_lsu_bus_buffer.scala 261:42] + node _T_859 = and(_T_858, ibuf_valid) @[el2_lsu_bus_buffer.scala 261:61] + node _T_860 = bits(ibuf_addr, 31, 2) @[el2_lsu_bus_buffer.scala 261:107] + node _T_861 = bits(io.lsu_addr_m, 31, 2) @[el2_lsu_bus_buffer.scala 261:132] + node _T_862 = neq(_T_860, _T_861) @[el2_lsu_bus_buffer.scala 261:115] + node _T_863 = or(io.lsu_pkt_m.load, _T_862) @[el2_lsu_bus_buffer.scala 261:95] + node ibuf_force_drain = and(_T_859, _T_863) @[el2_lsu_bus_buffer.scala 261:74] + wire ibuf_sideeffect : UInt<1> + ibuf_sideeffect <= UInt<1>("h00") + wire ibuf_timer : UInt<3> + ibuf_timer <= UInt<1>("h00") + wire ibuf_merge_en : UInt<1> + ibuf_merge_en <= UInt<1>("h00") + wire ibuf_merge_in : UInt<1> + ibuf_merge_in <= UInt<1>("h00") + node _T_864 = eq(ibuf_timer, UInt<3>("h07")) @[el2_lsu_bus_buffer.scala 266:62] + node _T_865 = or(ibuf_wr_en, _T_864) @[el2_lsu_bus_buffer.scala 266:48] + node _T_866 = and(ibuf_merge_en, ibuf_merge_in) @[el2_lsu_bus_buffer.scala 266:98] + node _T_867 = eq(_T_866, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 266:82] + node _T_868 = and(_T_865, _T_867) @[el2_lsu_bus_buffer.scala 266:80] + node _T_869 = or(_T_868, ibuf_byp) @[el2_lsu_bus_buffer.scala 267:5] + node _T_870 = or(_T_869, ibuf_force_drain) @[el2_lsu_bus_buffer.scala 267:16] + node _T_871 = or(_T_870, ibuf_sideeffect) @[el2_lsu_bus_buffer.scala 267:35] + node _T_872 = eq(ibuf_write, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 267:55] + node _T_873 = or(_T_871, _T_872) @[el2_lsu_bus_buffer.scala 267:53] + node _T_874 = or(_T_873, bus_coalescing_disable) @[el2_lsu_bus_buffer.scala 267:67] + node _T_875 = and(ibuf_valid, _T_874) @[el2_lsu_bus_buffer.scala 266:32] + ibuf_drain_vld <= _T_875 @[el2_lsu_bus_buffer.scala 266:18] + wire ibuf_tag : UInt<2> + ibuf_tag <= UInt<1>("h00") + wire WrPtr1_r : UInt<2> + WrPtr1_r <= UInt<1>("h00") + wire WrPtr0_r : UInt<2> + WrPtr0_r <= UInt<1>("h00") + node _T_876 = and(ibuf_merge_en, ibuf_merge_in) @[el2_lsu_bus_buffer.scala 272:39] + node _T_877 = mux(io.ldst_dual_r, WrPtr1_r, WrPtr0_r) @[el2_lsu_bus_buffer.scala 272:69] + node ibuf_tag_in = mux(_T_876, ibuf_tag, _T_877) @[el2_lsu_bus_buffer.scala 272:24] + node ibuf_sz_in = cat(io.lsu_pkt_r.word, io.lsu_pkt_r.half) @[Cat.scala 29:58] + node ibuf_addr_in = mux(io.ldst_dual_r, io.end_addr_r, io.lsu_addr_r) @[el2_lsu_bus_buffer.scala 275:25] + node _T_878 = and(ibuf_merge_en, ibuf_merge_in) @[el2_lsu_bus_buffer.scala 276:42] + node _T_879 = bits(ibuf_byteen, 3, 0) @[el2_lsu_bus_buffer.scala 276:70] + node _T_880 = bits(ldst_byteen_lo_r, 3, 0) @[el2_lsu_bus_buffer.scala 276:95] + node _T_881 = or(_T_879, _T_880) @[el2_lsu_bus_buffer.scala 276:77] + node _T_882 = bits(ldst_byteen_hi_r, 3, 0) @[el2_lsu_bus_buffer.scala 277:41] + node _T_883 = bits(ldst_byteen_lo_r, 3, 0) @[el2_lsu_bus_buffer.scala 277:65] + node _T_884 = mux(io.ldst_dual_r, _T_882, _T_883) @[el2_lsu_bus_buffer.scala 277:8] + node ibuf_byteen_in = mux(_T_878, _T_881, _T_884) @[el2_lsu_bus_buffer.scala 276:27] + node _T_885 = and(ibuf_merge_en, ibuf_merge_in) @[el2_lsu_bus_buffer.scala 280:61] + node _T_886 = bits(ldst_byteen_lo_r, 0, 0) @[el2_lsu_bus_buffer.scala 281:25] + node _T_887 = bits(store_data_lo_r, 7, 0) @[el2_lsu_bus_buffer.scala 281:45] + node _T_888 = bits(ibuf_data, 7, 0) @[el2_lsu_bus_buffer.scala 281:76] + node _T_889 = mux(_T_886, _T_887, _T_888) @[el2_lsu_bus_buffer.scala 281:8] + node _T_890 = bits(store_data_hi_r, 7, 0) @[el2_lsu_bus_buffer.scala 282:40] + node _T_891 = bits(store_data_lo_r, 7, 0) @[el2_lsu_bus_buffer.scala 282:77] + node _T_892 = mux(io.ldst_dual_r, _T_890, _T_891) @[el2_lsu_bus_buffer.scala 282:8] + node _T_893 = mux(_T_885, _T_889, _T_892) @[el2_lsu_bus_buffer.scala 280:46] + node _T_894 = and(ibuf_merge_en, ibuf_merge_in) @[el2_lsu_bus_buffer.scala 280:61] + node _T_895 = bits(ldst_byteen_lo_r, 1, 1) @[el2_lsu_bus_buffer.scala 281:25] + node _T_896 = bits(store_data_lo_r, 15, 8) @[el2_lsu_bus_buffer.scala 281:45] + node _T_897 = bits(ibuf_data, 15, 8) @[el2_lsu_bus_buffer.scala 281:76] + node _T_898 = mux(_T_895, _T_896, _T_897) @[el2_lsu_bus_buffer.scala 281:8] + node _T_899 = bits(store_data_hi_r, 15, 8) @[el2_lsu_bus_buffer.scala 282:40] + node _T_900 = bits(store_data_lo_r, 15, 8) @[el2_lsu_bus_buffer.scala 282:77] + node _T_901 = mux(io.ldst_dual_r, _T_899, _T_900) @[el2_lsu_bus_buffer.scala 282:8] + node _T_902 = mux(_T_894, _T_898, _T_901) @[el2_lsu_bus_buffer.scala 280:46] + node _T_903 = and(ibuf_merge_en, ibuf_merge_in) @[el2_lsu_bus_buffer.scala 280:61] + node _T_904 = bits(ldst_byteen_lo_r, 2, 2) @[el2_lsu_bus_buffer.scala 281:25] + node _T_905 = bits(store_data_lo_r, 23, 16) @[el2_lsu_bus_buffer.scala 281:45] + node _T_906 = bits(ibuf_data, 23, 16) @[el2_lsu_bus_buffer.scala 281:76] + node _T_907 = mux(_T_904, _T_905, _T_906) @[el2_lsu_bus_buffer.scala 281:8] + node _T_908 = bits(store_data_hi_r, 23, 16) @[el2_lsu_bus_buffer.scala 282:40] + node _T_909 = bits(store_data_lo_r, 23, 16) @[el2_lsu_bus_buffer.scala 282:77] + node _T_910 = mux(io.ldst_dual_r, _T_908, _T_909) @[el2_lsu_bus_buffer.scala 282:8] + node _T_911 = mux(_T_903, _T_907, _T_910) @[el2_lsu_bus_buffer.scala 280:46] + node _T_912 = and(ibuf_merge_en, ibuf_merge_in) @[el2_lsu_bus_buffer.scala 280:61] + node _T_913 = bits(ldst_byteen_lo_r, 3, 3) @[el2_lsu_bus_buffer.scala 281:25] + node _T_914 = bits(store_data_lo_r, 31, 24) @[el2_lsu_bus_buffer.scala 281:45] + node _T_915 = bits(ibuf_data, 31, 24) @[el2_lsu_bus_buffer.scala 281:76] + node _T_916 = mux(_T_913, _T_914, _T_915) @[el2_lsu_bus_buffer.scala 281:8] + node _T_917 = bits(store_data_hi_r, 31, 24) @[el2_lsu_bus_buffer.scala 282:40] + node _T_918 = bits(store_data_lo_r, 31, 24) @[el2_lsu_bus_buffer.scala 282:77] + node _T_919 = mux(io.ldst_dual_r, _T_917, _T_918) @[el2_lsu_bus_buffer.scala 282:8] + node _T_920 = mux(_T_912, _T_916, _T_919) @[el2_lsu_bus_buffer.scala 280:46] + node _T_921 = cat(_T_920, _T_911) @[Cat.scala 29:58] + node _T_922 = cat(_T_921, _T_902) @[Cat.scala 29:58] + node ibuf_data_in = cat(_T_922, _T_893) @[Cat.scala 29:58] + node _T_923 = lt(ibuf_timer, UInt<3>("h07")) @[el2_lsu_bus_buffer.scala 283:59] + node _T_924 = bits(_T_923, 0, 0) @[el2_lsu_bus_buffer.scala 283:79] + node _T_925 = add(ibuf_timer, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 283:93] + node _T_926 = tail(_T_925, 1) @[el2_lsu_bus_buffer.scala 283:93] + node _T_927 = mux(_T_924, _T_926, ibuf_timer) @[el2_lsu_bus_buffer.scala 283:47] + node ibuf_timer_in = mux(ibuf_wr_en, UInt<1>("h00"), _T_927) @[el2_lsu_bus_buffer.scala 283:26] + node _T_928 = and(io.lsu_busreq_r, io.lsu_commit_r) @[el2_lsu_bus_buffer.scala 285:36] + node _T_929 = and(_T_928, io.lsu_pkt_r.store) @[el2_lsu_bus_buffer.scala 285:54] + node _T_930 = and(_T_929, ibuf_valid) @[el2_lsu_bus_buffer.scala 285:75] + node _T_931 = and(_T_930, ibuf_write) @[el2_lsu_bus_buffer.scala 285:88] + node _T_932 = bits(io.lsu_addr_r, 31, 2) @[el2_lsu_bus_buffer.scala 285:117] + node _T_933 = bits(ibuf_addr, 31, 2) @[el2_lsu_bus_buffer.scala 285:137] + node _T_934 = eq(_T_932, _T_933) @[el2_lsu_bus_buffer.scala 285:124] + node _T_935 = and(_T_931, _T_934) @[el2_lsu_bus_buffer.scala 285:101] + node _T_936 = eq(io.is_sideeffects_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 285:147] + node _T_937 = and(_T_935, _T_936) @[el2_lsu_bus_buffer.scala 285:145] + node _T_938 = eq(bus_coalescing_disable, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 285:170] + node _T_939 = and(_T_937, _T_938) @[el2_lsu_bus_buffer.scala 285:168] + ibuf_merge_en <= _T_939 @[el2_lsu_bus_buffer.scala 285:17] + node _T_940 = eq(io.ldst_dual_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 286:20] + ibuf_merge_in <= _T_940 @[el2_lsu_bus_buffer.scala 286:17] + node _T_941 = eq(ibuf_merge_in, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 287:65] + node _T_942 = and(ibuf_merge_en, _T_941) @[el2_lsu_bus_buffer.scala 287:63] + node _T_943 = bits(ibuf_byteen, 0, 0) @[el2_lsu_bus_buffer.scala 287:92] + node _T_944 = bits(ldst_byteen_lo_r, 0, 0) @[el2_lsu_bus_buffer.scala 287:114] + node _T_945 = or(_T_943, _T_944) @[el2_lsu_bus_buffer.scala 287:96] + node _T_946 = bits(ibuf_byteen, 0, 0) @[el2_lsu_bus_buffer.scala 287:130] + node _T_947 = mux(_T_942, _T_945, _T_946) @[el2_lsu_bus_buffer.scala 287:48] + node _T_948 = eq(ibuf_merge_in, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 287:65] + node _T_949 = and(ibuf_merge_en, _T_948) @[el2_lsu_bus_buffer.scala 287:63] + node _T_950 = bits(ibuf_byteen, 1, 1) @[el2_lsu_bus_buffer.scala 287:92] + node _T_951 = bits(ldst_byteen_lo_r, 1, 1) @[el2_lsu_bus_buffer.scala 287:114] + node _T_952 = or(_T_950, _T_951) @[el2_lsu_bus_buffer.scala 287:96] + node _T_953 = bits(ibuf_byteen, 1, 1) @[el2_lsu_bus_buffer.scala 287:130] + node _T_954 = mux(_T_949, _T_952, _T_953) @[el2_lsu_bus_buffer.scala 287:48] + node _T_955 = eq(ibuf_merge_in, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 287:65] + node _T_956 = and(ibuf_merge_en, _T_955) @[el2_lsu_bus_buffer.scala 287:63] + node _T_957 = bits(ibuf_byteen, 2, 2) @[el2_lsu_bus_buffer.scala 287:92] + node _T_958 = bits(ldst_byteen_lo_r, 2, 2) @[el2_lsu_bus_buffer.scala 287:114] + node _T_959 = or(_T_957, _T_958) @[el2_lsu_bus_buffer.scala 287:96] + node _T_960 = bits(ibuf_byteen, 2, 2) @[el2_lsu_bus_buffer.scala 287:130] + node _T_961 = mux(_T_956, _T_959, _T_960) @[el2_lsu_bus_buffer.scala 287:48] + node _T_962 = eq(ibuf_merge_in, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 287:65] + node _T_963 = and(ibuf_merge_en, _T_962) @[el2_lsu_bus_buffer.scala 287:63] + node _T_964 = bits(ibuf_byteen, 3, 3) @[el2_lsu_bus_buffer.scala 287:92] + node _T_965 = bits(ldst_byteen_lo_r, 3, 3) @[el2_lsu_bus_buffer.scala 287:114] + node _T_966 = or(_T_964, _T_965) @[el2_lsu_bus_buffer.scala 287:96] + node _T_967 = bits(ibuf_byteen, 3, 3) @[el2_lsu_bus_buffer.scala 287:130] + node _T_968 = mux(_T_963, _T_966, _T_967) @[el2_lsu_bus_buffer.scala 287:48] + node _T_969 = cat(_T_968, _T_961) @[Cat.scala 29:58] + node _T_970 = cat(_T_969, _T_954) @[Cat.scala 29:58] + node ibuf_byteen_out = cat(_T_970, _T_947) @[Cat.scala 29:58] + node _T_971 = eq(ibuf_merge_in, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 288:62] + node _T_972 = and(ibuf_merge_en, _T_971) @[el2_lsu_bus_buffer.scala 288:60] + node _T_973 = bits(ldst_byteen_lo_r, 0, 0) @[el2_lsu_bus_buffer.scala 288:98] + node _T_974 = bits(store_data_lo_r, 7, 0) @[el2_lsu_bus_buffer.scala 288:118] + node _T_975 = bits(ibuf_data, 7, 0) @[el2_lsu_bus_buffer.scala 288:143] + node _T_976 = mux(_T_973, _T_974, _T_975) @[el2_lsu_bus_buffer.scala 288:81] + node _T_977 = bits(ibuf_data, 7, 0) @[el2_lsu_bus_buffer.scala 288:169] + node _T_978 = mux(_T_972, _T_976, _T_977) @[el2_lsu_bus_buffer.scala 288:45] + node _T_979 = eq(ibuf_merge_in, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 288:62] + node _T_980 = and(ibuf_merge_en, _T_979) @[el2_lsu_bus_buffer.scala 288:60] + node _T_981 = bits(ldst_byteen_lo_r, 1, 1) @[el2_lsu_bus_buffer.scala 288:98] + node _T_982 = bits(store_data_lo_r, 15, 8) @[el2_lsu_bus_buffer.scala 288:118] + node _T_983 = bits(ibuf_data, 15, 8) @[el2_lsu_bus_buffer.scala 288:143] + node _T_984 = mux(_T_981, _T_982, _T_983) @[el2_lsu_bus_buffer.scala 288:81] + node _T_985 = bits(ibuf_data, 15, 8) @[el2_lsu_bus_buffer.scala 288:169] + node _T_986 = mux(_T_980, _T_984, _T_985) @[el2_lsu_bus_buffer.scala 288:45] + node _T_987 = eq(ibuf_merge_in, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 288:62] + node _T_988 = and(ibuf_merge_en, _T_987) @[el2_lsu_bus_buffer.scala 288:60] + node _T_989 = bits(ldst_byteen_lo_r, 2, 2) @[el2_lsu_bus_buffer.scala 288:98] + node _T_990 = bits(store_data_lo_r, 23, 16) @[el2_lsu_bus_buffer.scala 288:118] + node _T_991 = bits(ibuf_data, 23, 16) @[el2_lsu_bus_buffer.scala 288:143] + node _T_992 = mux(_T_989, _T_990, _T_991) @[el2_lsu_bus_buffer.scala 288:81] + node _T_993 = bits(ibuf_data, 23, 16) @[el2_lsu_bus_buffer.scala 288:169] + node _T_994 = mux(_T_988, _T_992, _T_993) @[el2_lsu_bus_buffer.scala 288:45] + node _T_995 = eq(ibuf_merge_in, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 288:62] + node _T_996 = and(ibuf_merge_en, _T_995) @[el2_lsu_bus_buffer.scala 288:60] + node _T_997 = bits(ldst_byteen_lo_r, 3, 3) @[el2_lsu_bus_buffer.scala 288:98] + node _T_998 = bits(store_data_lo_r, 31, 24) @[el2_lsu_bus_buffer.scala 288:118] + node _T_999 = bits(ibuf_data, 31, 24) @[el2_lsu_bus_buffer.scala 288:143] + node _T_1000 = mux(_T_997, _T_998, _T_999) @[el2_lsu_bus_buffer.scala 288:81] + node _T_1001 = bits(ibuf_data, 31, 24) @[el2_lsu_bus_buffer.scala 288:169] + node _T_1002 = mux(_T_996, _T_1000, _T_1001) @[el2_lsu_bus_buffer.scala 288:45] + node _T_1003 = cat(_T_1002, _T_994) @[Cat.scala 29:58] + node _T_1004 = cat(_T_1003, _T_986) @[Cat.scala 29:58] + node ibuf_data_out = cat(_T_1004, _T_978) @[Cat.scala 29:58] + node _T_1005 = mux(ibuf_wr_en, UInt<1>("h01"), ibuf_valid) @[el2_lsu_bus_buffer.scala 290:28] + node _T_1006 = eq(ibuf_rst, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 290:63] + node _T_1007 = and(_T_1005, _T_1006) @[el2_lsu_bus_buffer.scala 290:61] + reg _T_1008 : UInt<1>, clock with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 290:24] + _T_1008 <= _T_1007 @[el2_lsu_bus_buffer.scala 290:24] + ibuf_valid <= _T_1008 @[el2_lsu_bus_buffer.scala 290:14] + node _T_1009 = asUInt(io.lsu_bus_ibuf_c1_clk) @[el2_lsu_bus_buffer.scala 291:120] + node _T_1010 = bits(_T_1009, 0, 0) @[el2_lsu_bus_buffer.scala 291:120] + node _T_1011 = and(ibuf_wr_en, _T_1010) @[el2_lsu_bus_buffer.scala 291:89] + reg _T_1012 : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1011 : @[Reg.scala 28:19] + _T_1012 <= ibuf_tag_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + ibuf_tag <= _T_1012 @[el2_lsu_bus_buffer.scala 291:12] + node _T_1013 = asUInt(io.lsu_bus_ibuf_c1_clk) @[el2_lsu_bus_buffer.scala 292:131] + node _T_1014 = bits(_T_1013, 0, 0) @[el2_lsu_bus_buffer.scala 292:131] + node _T_1015 = and(ibuf_wr_en, _T_1014) @[el2_lsu_bus_buffer.scala 292:100] + reg ibuf_dualtag : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1015 : @[Reg.scala 28:19] + ibuf_dualtag <= WrPtr0_r @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_1016 = asUInt(io.lsu_bus_ibuf_c1_clk) @[el2_lsu_bus_buffer.scala 293:127] + node _T_1017 = bits(_T_1016, 0, 0) @[el2_lsu_bus_buffer.scala 293:127] + node _T_1018 = and(ibuf_wr_en, _T_1017) @[el2_lsu_bus_buffer.scala 293:96] + reg ibuf_dual : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1018 : @[Reg.scala 28:19] + ibuf_dual <= io.ldst_dual_r @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_1019 = asUInt(io.lsu_bus_ibuf_c1_clk) @[el2_lsu_bus_buffer.scala 294:128] + node _T_1020 = bits(_T_1019, 0, 0) @[el2_lsu_bus_buffer.scala 294:128] + node _T_1021 = and(ibuf_wr_en, _T_1020) @[el2_lsu_bus_buffer.scala 294:97] + reg ibuf_samedw : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1021 : @[Reg.scala 28:19] + ibuf_samedw <= ldst_samedw_r @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_1022 = asUInt(io.lsu_bus_ibuf_c1_clk) @[el2_lsu_bus_buffer.scala 295:135] + node _T_1023 = bits(_T_1022, 0, 0) @[el2_lsu_bus_buffer.scala 295:135] + node _T_1024 = and(ibuf_wr_en, _T_1023) @[el2_lsu_bus_buffer.scala 295:104] + reg ibuf_nomerge : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1024 : @[Reg.scala 28:19] + ibuf_nomerge <= io.no_dword_merge_r @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_1025 = asUInt(io.lsu_bus_ibuf_c1_clk) @[el2_lsu_bus_buffer.scala 296:135] + node _T_1026 = bits(_T_1025, 0, 0) @[el2_lsu_bus_buffer.scala 296:135] + node _T_1027 = and(ibuf_wr_en, _T_1026) @[el2_lsu_bus_buffer.scala 296:104] + reg _T_1028 : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1027 : @[Reg.scala 28:19] + _T_1028 <= io.is_sideeffects_r @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + ibuf_sideeffect <= _T_1028 @[el2_lsu_bus_buffer.scala 296:19] + node _T_1029 = asUInt(io.lsu_bus_ibuf_c1_clk) @[el2_lsu_bus_buffer.scala 297:134] + node _T_1030 = bits(_T_1029, 0, 0) @[el2_lsu_bus_buffer.scala 297:134] + node _T_1031 = and(ibuf_wr_en, _T_1030) @[el2_lsu_bus_buffer.scala 297:103] + reg ibuf_unsign : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1031 : @[Reg.scala 28:19] + ibuf_unsign <= io.lsu_pkt_r.unsign @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + reg _T_1032 : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when ibuf_wr_en : @[Reg.scala 28:19] + _T_1032 <= io.lsu_pkt_r.store @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + ibuf_write <= _T_1032 @[el2_lsu_bus_buffer.scala 298:14] + reg ibuf_sz : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when ibuf_wr_en : @[Reg.scala 28:19] + ibuf_sz <= ibuf_sz_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + inst rvclkhdr of rvclkhdr_24 @[el2_lib.scala 506:23] + rvclkhdr.clock <= clock + rvclkhdr.reset <= reset + rvclkhdr.io.clk <= clock @[el2_lib.scala 508:18] + rvclkhdr.io.en <= ibuf_wr_en @[el2_lib.scala 509:17] + rvclkhdr.io.scan_mode <= io.scan_mode @[el2_lib.scala 510:24] + reg _T_1033 : UInt, rvclkhdr.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 512:16] + _T_1033 <= ibuf_addr_in @[el2_lib.scala 512:16] + ibuf_addr <= _T_1033 @[el2_lsu_bus_buffer.scala 300:13] + reg _T_1034 : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when ibuf_wr_en : @[Reg.scala 28:19] + _T_1034 <= ibuf_byteen_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + ibuf_byteen <= _T_1034 @[el2_lsu_bus_buffer.scala 301:15] + inst rvclkhdr_1 of rvclkhdr_25 @[el2_lib.scala 506:23] + rvclkhdr_1.clock <= clock + rvclkhdr_1.reset <= reset + rvclkhdr_1.io.clk <= clock @[el2_lib.scala 508:18] + rvclkhdr_1.io.en <= ibuf_wr_en @[el2_lib.scala 509:17] + rvclkhdr_1.io.scan_mode <= io.scan_mode @[el2_lib.scala 510:24] + reg _T_1035 : UInt, rvclkhdr_1.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 512:16] + _T_1035 <= ibuf_data_in @[el2_lib.scala 512:16] + ibuf_data <= _T_1035 @[el2_lsu_bus_buffer.scala 302:13] + reg _T_1036 : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 303:59] + _T_1036 <= ibuf_timer_in @[el2_lsu_bus_buffer.scala 303:59] + ibuf_timer <= _T_1036 @[el2_lsu_bus_buffer.scala 303:14] + wire buf_numvld_wrcmd_any : UInt<4> + buf_numvld_wrcmd_any <= UInt<1>("h00") + wire buf_numvld_cmd_any : UInt<4> + buf_numvld_cmd_any <= UInt<1>("h00") + wire obuf_wr_timer : UInt<3> + obuf_wr_timer <= UInt<1>("h00") + wire buf_nomerge : UInt<1>[4] @[el2_lsu_bus_buffer.scala 307:25] + buf_nomerge[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 308:15] + buf_nomerge[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 308:15] + buf_nomerge[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 308:15] + buf_nomerge[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 308:15] + wire buf_sideeffect : UInt<4> + buf_sideeffect <= UInt<1>("h00") + wire obuf_force_wr_en : UInt<1> + obuf_force_wr_en <= UInt<1>("h00") + wire obuf_wr_en : UInt<1> + obuf_wr_en <= UInt<1>("h00") + node _T_1037 = eq(buf_numvld_wrcmd_any, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 313:43] + node _T_1038 = eq(buf_numvld_cmd_any, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 313:72] + node _T_1039 = and(_T_1037, _T_1038) @[el2_lsu_bus_buffer.scala 313:51] + node _T_1040 = neq(obuf_wr_timer, UInt<3>("h07")) @[el2_lsu_bus_buffer.scala 313:97] + node _T_1041 = and(_T_1039, _T_1040) @[el2_lsu_bus_buffer.scala 313:80] + node _T_1042 = eq(bus_coalescing_disable, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 314:5] + node _T_1043 = and(_T_1041, _T_1042) @[el2_lsu_bus_buffer.scala 313:114] + node _T_1044 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 314:114] + node _T_1045 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 314:114] + node _T_1046 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 314:114] + node _T_1047 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 314:114] + node _T_1048 = mux(_T_1044, buf_nomerge[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1049 = mux(_T_1045, buf_nomerge[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1050 = mux(_T_1046, buf_nomerge[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1051 = mux(_T_1047, buf_nomerge[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1052 = or(_T_1048, _T_1049) @[Mux.scala 27:72] + node _T_1053 = or(_T_1052, _T_1050) @[Mux.scala 27:72] + node _T_1054 = or(_T_1053, _T_1051) @[Mux.scala 27:72] + wire _T_1055 : UInt<1> @[Mux.scala 27:72] + _T_1055 <= _T_1054 @[Mux.scala 27:72] + node _T_1056 = eq(_T_1055, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 314:31] + node _T_1057 = and(_T_1043, _T_1056) @[el2_lsu_bus_buffer.scala 314:29] + node _T_1058 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 315:88] + node _T_1059 = bits(buf_sideeffect, 0, 0) @[el2_lsu_bus_buffer.scala 315:111] + node _T_1060 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 315:88] + node _T_1061 = bits(buf_sideeffect, 1, 1) @[el2_lsu_bus_buffer.scala 315:111] + node _T_1062 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 315:88] + node _T_1063 = bits(buf_sideeffect, 2, 2) @[el2_lsu_bus_buffer.scala 315:111] + node _T_1064 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 315:88] + node _T_1065 = bits(buf_sideeffect, 3, 3) @[el2_lsu_bus_buffer.scala 315:111] + node _T_1066 = mux(_T_1058, _T_1059, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1067 = mux(_T_1060, _T_1061, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1068 = mux(_T_1062, _T_1063, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1069 = mux(_T_1064, _T_1065, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1070 = or(_T_1066, _T_1067) @[Mux.scala 27:72] + node _T_1071 = or(_T_1070, _T_1068) @[Mux.scala 27:72] + node _T_1072 = or(_T_1071, _T_1069) @[Mux.scala 27:72] + wire _T_1073 : UInt<1> @[Mux.scala 27:72] + _T_1073 <= _T_1072 @[Mux.scala 27:72] + node _T_1074 = eq(_T_1073, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 315:5] + node _T_1075 = and(_T_1057, _T_1074) @[el2_lsu_bus_buffer.scala 314:140] + node _T_1076 = eq(obuf_force_wr_en, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 315:119] + node obuf_wr_wait = and(_T_1075, _T_1076) @[el2_lsu_bus_buffer.scala 315:117] + node _T_1077 = orr(buf_numvld_cmd_any) @[el2_lsu_bus_buffer.scala 316:75] + node _T_1078 = lt(obuf_wr_timer, UInt<3>("h07")) @[el2_lsu_bus_buffer.scala 316:95] + node _T_1079 = and(_T_1077, _T_1078) @[el2_lsu_bus_buffer.scala 316:79] + node _T_1080 = add(obuf_wr_timer, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 316:121] + node _T_1081 = tail(_T_1080, 1) @[el2_lsu_bus_buffer.scala 316:121] + node _T_1082 = mux(_T_1079, _T_1081, obuf_wr_timer) @[el2_lsu_bus_buffer.scala 316:55] + node obuf_wr_timer_in = mux(obuf_wr_en, UInt<3>("h00"), _T_1082) @[el2_lsu_bus_buffer.scala 316:29] + node _T_1083 = eq(io.lsu_busreq_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 317:41] + node _T_1084 = and(io.lsu_busreq_m, _T_1083) @[el2_lsu_bus_buffer.scala 317:39] + node _T_1085 = eq(ibuf_valid, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 317:60] + node _T_1086 = and(_T_1084, _T_1085) @[el2_lsu_bus_buffer.scala 317:58] + node _T_1087 = eq(buf_numvld_cmd_any, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 317:93] + node _T_1088 = and(_T_1086, _T_1087) @[el2_lsu_bus_buffer.scala 317:72] + node _T_1089 = bits(io.lsu_addr_m, 31, 2) @[el2_lsu_bus_buffer.scala 317:117] + node _T_1090 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 317:208] + node _T_1091 = bits(buf_addr[0], 31, 2) @[el2_lsu_bus_buffer.scala 317:228] + node _T_1092 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 317:208] + node _T_1093 = bits(buf_addr[1], 31, 2) @[el2_lsu_bus_buffer.scala 317:228] + node _T_1094 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 317:208] + node _T_1095 = bits(buf_addr[2], 31, 2) @[el2_lsu_bus_buffer.scala 317:228] + node _T_1096 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 317:208] + node _T_1097 = bits(buf_addr[3], 31, 2) @[el2_lsu_bus_buffer.scala 317:228] + node _T_1098 = mux(_T_1090, _T_1091, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1099 = mux(_T_1092, _T_1093, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1100 = mux(_T_1094, _T_1095, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1101 = mux(_T_1096, _T_1097, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1102 = or(_T_1098, _T_1099) @[Mux.scala 27:72] + node _T_1103 = or(_T_1102, _T_1100) @[Mux.scala 27:72] + node _T_1104 = or(_T_1103, _T_1101) @[Mux.scala 27:72] + wire _T_1105 : UInt<30> @[Mux.scala 27:72] + _T_1105 <= _T_1104 @[Mux.scala 27:72] + node _T_1106 = neq(_T_1089, _T_1105) @[el2_lsu_bus_buffer.scala 317:123] + node _T_1107 = and(_T_1088, _T_1106) @[el2_lsu_bus_buffer.scala 317:101] + obuf_force_wr_en <= _T_1107 @[el2_lsu_bus_buffer.scala 317:20] + wire buf_numvld_pend_any : UInt<4> + buf_numvld_pend_any <= UInt<1>("h00") + node _T_1108 = eq(buf_numvld_pend_any, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 319:53] + node _T_1109 = and(ibuf_byp, _T_1108) @[el2_lsu_bus_buffer.scala 319:31] + node _T_1110 = eq(io.lsu_pkt_r.store, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 319:64] + node _T_1111 = or(_T_1110, io.no_dword_merge_r) @[el2_lsu_bus_buffer.scala 319:84] + node ibuf_buf_byp = and(_T_1109, _T_1111) @[el2_lsu_bus_buffer.scala 319:61] + wire bus_sideeffect_pend : UInt<1> + bus_sideeffect_pend <= UInt<1>("h00") + wire found_cmdptr0 : UInt<1> + found_cmdptr0 <= UInt<1>("h00") + wire buf_cmd_state_bus_en : UInt<1>[4] @[el2_lsu_bus_buffer.scala 322:34] + buf_cmd_state_bus_en[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 323:24] + buf_cmd_state_bus_en[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 323:24] + buf_cmd_state_bus_en[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 323:24] + buf_cmd_state_bus_en[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 323:24] + wire buf_dual : UInt<1>[4] @[el2_lsu_bus_buffer.scala 324:22] + buf_dual[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 325:12] + buf_dual[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 325:12] + buf_dual[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 325:12] + buf_dual[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 325:12] + wire buf_samedw : UInt<1>[4] @[el2_lsu_bus_buffer.scala 326:24] + buf_samedw[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 327:14] + buf_samedw[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 327:14] + buf_samedw[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 327:14] + buf_samedw[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 327:14] + wire found_cmdptr1 : UInt<1> + found_cmdptr1 <= UInt<1>("h00") + wire bus_cmd_ready : UInt<1> + bus_cmd_ready <= UInt<1>("h00") + wire obuf_valid : UInt<1> + obuf_valid <= UInt<1>("h00") + wire obuf_nosend : UInt<1> + obuf_nosend <= UInt<1>("h00") + wire lsu_bus_cntr_overflow : UInt<1> + lsu_bus_cntr_overflow <= UInt<1>("h00") + wire bus_addr_match_pending : UInt<1> + bus_addr_match_pending <= UInt<1>("h00") + node _T_1112 = and(ibuf_buf_byp, io.lsu_commit_r) @[el2_lsu_bus_buffer.scala 334:32] + node _T_1113 = and(io.is_sideeffects_r, bus_sideeffect_pend) @[el2_lsu_bus_buffer.scala 334:74] + node _T_1114 = eq(_T_1113, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 334:52] + node _T_1115 = and(_T_1112, _T_1114) @[el2_lsu_bus_buffer.scala 334:50] + node _T_1116 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1117 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1118 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1119 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1120 = mux(_T_1116, buf_state[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1121 = mux(_T_1117, buf_state[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1122 = mux(_T_1118, buf_state[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1123 = mux(_T_1119, buf_state[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1124 = or(_T_1120, _T_1121) @[Mux.scala 27:72] + node _T_1125 = or(_T_1124, _T_1122) @[Mux.scala 27:72] + node _T_1126 = or(_T_1125, _T_1123) @[Mux.scala 27:72] + wire _T_1127 : UInt<3> @[Mux.scala 27:72] + _T_1127 <= _T_1126 @[Mux.scala 27:72] + node _T_1128 = eq(_T_1127, UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 335:36] + node _T_1129 = and(_T_1128, found_cmdptr0) @[el2_lsu_bus_buffer.scala 335:47] + node _T_1130 = cat(buf_cmd_state_bus_en[3], buf_cmd_state_bus_en[2]) @[Cat.scala 29:58] + node _T_1131 = cat(_T_1130, buf_cmd_state_bus_en[1]) @[Cat.scala 29:58] + node _T_1132 = cat(_T_1131, buf_cmd_state_bus_en[0]) @[Cat.scala 29:58] + node _T_1133 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1134 = bits(_T_1132, 0, 0) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1135 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1136 = bits(_T_1132, 1, 1) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1137 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1138 = bits(_T_1132, 2, 2) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1139 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1140 = bits(_T_1132, 3, 3) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1141 = mux(_T_1133, _T_1134, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1142 = mux(_T_1135, _T_1136, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1143 = mux(_T_1137, _T_1138, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1144 = mux(_T_1139, _T_1140, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1145 = or(_T_1141, _T_1142) @[Mux.scala 27:72] + node _T_1146 = or(_T_1145, _T_1143) @[Mux.scala 27:72] + node _T_1147 = or(_T_1146, _T_1144) @[Mux.scala 27:72] + wire _T_1148 : UInt<1> @[Mux.scala 27:72] + _T_1148 <= _T_1147 @[Mux.scala 27:72] + node _T_1149 = eq(_T_1148, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 336:23] + node _T_1150 = and(_T_1129, _T_1149) @[el2_lsu_bus_buffer.scala 336:21] + node _T_1151 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1152 = bits(buf_sideeffect, 0, 0) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1153 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1154 = bits(buf_sideeffect, 1, 1) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1155 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1156 = bits(buf_sideeffect, 2, 2) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1157 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1158 = bits(buf_sideeffect, 3, 3) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1159 = mux(_T_1151, _T_1152, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1160 = mux(_T_1153, _T_1154, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1161 = mux(_T_1155, _T_1156, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1162 = mux(_T_1157, _T_1158, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1163 = or(_T_1159, _T_1160) @[Mux.scala 27:72] + node _T_1164 = or(_T_1163, _T_1161) @[Mux.scala 27:72] + node _T_1165 = or(_T_1164, _T_1162) @[Mux.scala 27:72] + wire _T_1166 : UInt<1> @[Mux.scala 27:72] + _T_1166 <= _T_1165 @[Mux.scala 27:72] + node _T_1167 = and(_T_1166, bus_sideeffect_pend) @[el2_lsu_bus_buffer.scala 336:141] + node _T_1168 = eq(_T_1167, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 336:105] + node _T_1169 = and(_T_1150, _T_1168) @[el2_lsu_bus_buffer.scala 336:103] + node _T_1170 = cat(buf_dual[3], buf_dual[2]) @[Cat.scala 29:58] + node _T_1171 = cat(_T_1170, buf_dual[1]) @[Cat.scala 29:58] + node _T_1172 = cat(_T_1171, buf_dual[0]) @[Cat.scala 29:58] + node _T_1173 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1174 = bits(_T_1172, 0, 0) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1175 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1176 = bits(_T_1172, 1, 1) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1177 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1178 = bits(_T_1172, 2, 2) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1179 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1180 = bits(_T_1172, 3, 3) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1181 = mux(_T_1173, _T_1174, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1182 = mux(_T_1175, _T_1176, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1183 = mux(_T_1177, _T_1178, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1184 = mux(_T_1179, _T_1180, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1185 = or(_T_1181, _T_1182) @[Mux.scala 27:72] + node _T_1186 = or(_T_1185, _T_1183) @[Mux.scala 27:72] + node _T_1187 = or(_T_1186, _T_1184) @[Mux.scala 27:72] + wire _T_1188 : UInt<1> @[Mux.scala 27:72] + _T_1188 <= _T_1187 @[Mux.scala 27:72] + node _T_1189 = cat(buf_samedw[3], buf_samedw[2]) @[Cat.scala 29:58] + node _T_1190 = cat(_T_1189, buf_samedw[1]) @[Cat.scala 29:58] + node _T_1191 = cat(_T_1190, buf_samedw[0]) @[Cat.scala 29:58] + node _T_1192 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1193 = bits(_T_1191, 0, 0) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1194 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1195 = bits(_T_1191, 1, 1) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1196 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1197 = bits(_T_1191, 2, 2) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1198 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1199 = bits(_T_1191, 3, 3) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1200 = mux(_T_1192, _T_1193, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1201 = mux(_T_1194, _T_1195, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1202 = mux(_T_1196, _T_1197, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1203 = mux(_T_1198, _T_1199, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1204 = or(_T_1200, _T_1201) @[Mux.scala 27:72] + node _T_1205 = or(_T_1204, _T_1202) @[Mux.scala 27:72] + node _T_1206 = or(_T_1205, _T_1203) @[Mux.scala 27:72] + wire _T_1207 : UInt<1> @[Mux.scala 27:72] + _T_1207 <= _T_1206 @[Mux.scala 27:72] + node _T_1208 = and(_T_1188, _T_1207) @[el2_lsu_bus_buffer.scala 337:77] + node _T_1209 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1210 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1211 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1212 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1213 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1214 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1215 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1216 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1217 = mux(_T_1209, _T_1210, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1218 = mux(_T_1211, _T_1212, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1219 = mux(_T_1213, _T_1214, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1220 = mux(_T_1215, _T_1216, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1221 = or(_T_1217, _T_1218) @[Mux.scala 27:72] + node _T_1222 = or(_T_1221, _T_1219) @[Mux.scala 27:72] + node _T_1223 = or(_T_1222, _T_1220) @[Mux.scala 27:72] + wire _T_1224 : UInt<1> @[Mux.scala 27:72] + _T_1224 <= _T_1223 @[Mux.scala 27:72] + node _T_1225 = eq(_T_1224, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 337:150] + node _T_1226 = and(_T_1208, _T_1225) @[el2_lsu_bus_buffer.scala 337:148] + node _T_1227 = eq(_T_1226, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 337:8] + node _T_1228 = or(_T_1227, found_cmdptr1) @[el2_lsu_bus_buffer.scala 337:181] + node _T_1229 = cat(buf_nomerge[3], buf_nomerge[2]) @[Cat.scala 29:58] + node _T_1230 = cat(_T_1229, buf_nomerge[1]) @[Cat.scala 29:58] + node _T_1231 = cat(_T_1230, buf_nomerge[0]) @[Cat.scala 29:58] + node _T_1232 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1233 = bits(_T_1231, 0, 0) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1234 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1235 = bits(_T_1231, 1, 1) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1236 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1237 = bits(_T_1231, 2, 2) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1238 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1239 = bits(_T_1231, 3, 3) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1240 = mux(_T_1232, _T_1233, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1241 = mux(_T_1234, _T_1235, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1242 = mux(_T_1236, _T_1237, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1243 = mux(_T_1238, _T_1239, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1244 = or(_T_1240, _T_1241) @[Mux.scala 27:72] + node _T_1245 = or(_T_1244, _T_1242) @[Mux.scala 27:72] + node _T_1246 = or(_T_1245, _T_1243) @[Mux.scala 27:72] + wire _T_1247 : UInt<1> @[Mux.scala 27:72] + _T_1247 <= _T_1246 @[Mux.scala 27:72] + node _T_1248 = or(_T_1228, _T_1247) @[el2_lsu_bus_buffer.scala 337:197] + node _T_1249 = or(_T_1248, obuf_force_wr_en) @[el2_lsu_bus_buffer.scala 337:269] + node _T_1250 = and(_T_1169, _T_1249) @[el2_lsu_bus_buffer.scala 336:164] + node _T_1251 = or(_T_1115, _T_1250) @[el2_lsu_bus_buffer.scala 334:98] + node _T_1252 = eq(obuf_valid, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 338:48] + node _T_1253 = or(bus_cmd_ready, _T_1252) @[el2_lsu_bus_buffer.scala 338:46] + node _T_1254 = or(_T_1253, obuf_nosend) @[el2_lsu_bus_buffer.scala 338:60] + node _T_1255 = and(_T_1251, _T_1254) @[el2_lsu_bus_buffer.scala 338:29] + node _T_1256 = eq(obuf_wr_wait, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 338:77] + node _T_1257 = and(_T_1255, _T_1256) @[el2_lsu_bus_buffer.scala 338:75] + node _T_1258 = eq(lsu_bus_cntr_overflow, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 338:93] + node _T_1259 = and(_T_1257, _T_1258) @[el2_lsu_bus_buffer.scala 338:91] + node _T_1260 = eq(bus_addr_match_pending, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 338:118] + node _T_1261 = and(_T_1259, _T_1260) @[el2_lsu_bus_buffer.scala 338:116] + node _T_1262 = and(_T_1261, io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 338:142] + obuf_wr_en <= _T_1262 @[el2_lsu_bus_buffer.scala 334:14] + wire bus_cmd_sent : UInt<1> + bus_cmd_sent <= UInt<1>("h00") + node _T_1263 = and(obuf_valid, obuf_nosend) @[el2_lsu_bus_buffer.scala 340:47] + node _T_1264 = or(bus_cmd_sent, _T_1263) @[el2_lsu_bus_buffer.scala 340:33] + node _T_1265 = eq(obuf_wr_en, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 340:65] + node _T_1266 = and(_T_1264, _T_1265) @[el2_lsu_bus_buffer.scala 340:63] + node _T_1267 = and(_T_1266, io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 340:77] + node obuf_rst = or(_T_1267, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 340:98] + node _T_1268 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1269 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1270 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1271 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1272 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1273 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1274 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1275 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1276 = mux(_T_1268, _T_1269, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1277 = mux(_T_1270, _T_1271, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1278 = mux(_T_1272, _T_1273, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1279 = mux(_T_1274, _T_1275, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1280 = or(_T_1276, _T_1277) @[Mux.scala 27:72] + node _T_1281 = or(_T_1280, _T_1278) @[Mux.scala 27:72] + node _T_1282 = or(_T_1281, _T_1279) @[Mux.scala 27:72] + wire _T_1283 : UInt<1> @[Mux.scala 27:72] + _T_1283 <= _T_1282 @[Mux.scala 27:72] + node obuf_write_in = mux(ibuf_buf_byp, io.lsu_pkt_r.store, _T_1283) @[el2_lsu_bus_buffer.scala 341:26] + node _T_1284 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1285 = bits(buf_sideeffect, 0, 0) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1286 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1287 = bits(buf_sideeffect, 1, 1) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1288 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1289 = bits(buf_sideeffect, 2, 2) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1290 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1291 = bits(buf_sideeffect, 3, 3) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1292 = mux(_T_1284, _T_1285, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1293 = mux(_T_1286, _T_1287, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1294 = mux(_T_1288, _T_1289, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1295 = mux(_T_1290, _T_1291, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1296 = or(_T_1292, _T_1293) @[Mux.scala 27:72] + node _T_1297 = or(_T_1296, _T_1294) @[Mux.scala 27:72] + node _T_1298 = or(_T_1297, _T_1295) @[Mux.scala 27:72] + wire _T_1299 : UInt<1> @[Mux.scala 27:72] + _T_1299 <= _T_1298 @[Mux.scala 27:72] + node obuf_sideeffect_in = mux(ibuf_buf_byp, io.is_sideeffects_r, _T_1299) @[el2_lsu_bus_buffer.scala 342:31] + node _T_1300 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1301 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1302 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1303 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1304 = mux(_T_1300, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1305 = mux(_T_1301, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1306 = mux(_T_1302, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1307 = mux(_T_1303, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1308 = or(_T_1304, _T_1305) @[Mux.scala 27:72] + node _T_1309 = or(_T_1308, _T_1306) @[Mux.scala 27:72] + node _T_1310 = or(_T_1309, _T_1307) @[Mux.scala 27:72] + wire _T_1311 : UInt<32> @[Mux.scala 27:72] + _T_1311 <= _T_1310 @[Mux.scala 27:72] + node obuf_addr_in = mux(ibuf_buf_byp, io.lsu_addr_r, _T_1311) @[el2_lsu_bus_buffer.scala 343:25] + wire buf_sz : UInt<2>[4] @[el2_lsu_bus_buffer.scala 344:20] + buf_sz[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 345:10] + buf_sz[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 345:10] + buf_sz[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 345:10] + buf_sz[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 345:10] + node _T_1312 = cat(io.lsu_pkt_r.word, io.lsu_pkt_r.half) @[Cat.scala 29:58] + node _T_1313 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1314 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1315 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1316 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1317 = mux(_T_1313, buf_sz[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1318 = mux(_T_1314, buf_sz[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1319 = mux(_T_1315, buf_sz[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1320 = mux(_T_1316, buf_sz[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1321 = or(_T_1317, _T_1318) @[Mux.scala 27:72] + node _T_1322 = or(_T_1321, _T_1319) @[Mux.scala 27:72] + node _T_1323 = or(_T_1322, _T_1320) @[Mux.scala 27:72] + wire _T_1324 : UInt<2> @[Mux.scala 27:72] + _T_1324 <= _T_1323 @[Mux.scala 27:72] + node obuf_sz_in = mux(ibuf_buf_byp, _T_1312, _T_1324) @[el2_lsu_bus_buffer.scala 346:23] + wire obuf_merge_en : UInt<1> + obuf_merge_en <= UInt<1>("h00") + node obuf_tag0_in = mux(ibuf_buf_byp, WrPtr0_r, CmdPtr0) @[el2_lsu_bus_buffer.scala 349:25] + wire Cmdptr1 : UInt<2> + Cmdptr1 <= UInt<1>("h00") + node obuf_tag1_in = mux(ibuf_buf_byp, WrPtr1_r, Cmdptr1) @[el2_lsu_bus_buffer.scala 352:25] + wire obuf_cmd_done : UInt<1> + obuf_cmd_done <= UInt<1>("h00") + wire bus_wcmd_sent : UInt<1> + bus_wcmd_sent <= UInt<1>("h00") + node _T_1325 = or(obuf_wr_en, obuf_rst) @[el2_lsu_bus_buffer.scala 355:39] + node _T_1326 = eq(_T_1325, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 355:26] + node _T_1327 = or(obuf_cmd_done, bus_wcmd_sent) @[el2_lsu_bus_buffer.scala 355:68] + node obuf_cmd_done_in = and(_T_1326, _T_1327) @[el2_lsu_bus_buffer.scala 355:51] + wire obuf_data_done : UInt<1> + obuf_data_done <= UInt<1>("h00") + wire bus_wdata_sent : UInt<1> + bus_wdata_sent <= UInt<1>("h00") + node _T_1328 = or(obuf_wr_en, obuf_rst) @[el2_lsu_bus_buffer.scala 358:40] + node _T_1329 = eq(_T_1328, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 358:27] + node _T_1330 = or(obuf_data_done, bus_wdata_sent) @[el2_lsu_bus_buffer.scala 358:70] + node obuf_data_done_in = and(_T_1329, _T_1330) @[el2_lsu_bus_buffer.scala 358:52] + node _T_1331 = bits(obuf_sz_in, 1, 0) @[el2_lsu_bus_buffer.scala 359:67] + node _T_1332 = eq(_T_1331, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 359:72] + node _T_1333 = bits(obuf_sz_in, 0, 0) @[el2_lsu_bus_buffer.scala 359:92] + node _T_1334 = bits(obuf_addr_in, 0, 0) @[el2_lsu_bus_buffer.scala 359:111] + node _T_1335 = eq(_T_1334, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 359:98] + node _T_1336 = and(_T_1333, _T_1335) @[el2_lsu_bus_buffer.scala 359:96] + node _T_1337 = or(_T_1332, _T_1336) @[el2_lsu_bus_buffer.scala 359:79] + node _T_1338 = bits(obuf_sz_in, 1, 1) @[el2_lsu_bus_buffer.scala 359:129] + node _T_1339 = bits(obuf_addr_in, 1, 0) @[el2_lsu_bus_buffer.scala 359:147] + node _T_1340 = orr(_T_1339) @[el2_lsu_bus_buffer.scala 359:153] + node _T_1341 = eq(_T_1340, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 359:134] + node _T_1342 = and(_T_1338, _T_1341) @[el2_lsu_bus_buffer.scala 359:132] + node _T_1343 = or(_T_1337, _T_1342) @[el2_lsu_bus_buffer.scala 359:116] + node obuf_aligned_in = mux(ibuf_buf_byp, is_aligned_r, _T_1343) @[el2_lsu_bus_buffer.scala 359:28] + wire obuf_nosend_in : UInt<1> + obuf_nosend_in <= UInt<1>("h00") + wire obuf_rdrsp_pend : UInt<1> + obuf_rdrsp_pend <= UInt<1>("h00") + wire bus_rsp_read : UInt<1> + bus_rsp_read <= UInt<1>("h00") + wire bus_rsp_read_tag : UInt<3> + bus_rsp_read_tag <= UInt<1>("h00") + wire obuf_rdrsp_tag : UInt<3> + obuf_rdrsp_tag <= UInt<1>("h00") + wire obuf_write : UInt<1> + obuf_write <= UInt<1>("h00") + node _T_1344 = eq(obuf_nosend_in, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 367:44] + node _T_1345 = and(obuf_wr_en, _T_1344) @[el2_lsu_bus_buffer.scala 367:42] + node _T_1346 = eq(_T_1345, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 367:29] + node _T_1347 = and(_T_1346, obuf_rdrsp_pend) @[el2_lsu_bus_buffer.scala 367:61] + node _T_1348 = eq(bus_rsp_read_tag, obuf_rdrsp_tag) @[el2_lsu_bus_buffer.scala 367:116] + node _T_1349 = and(bus_rsp_read, _T_1348) @[el2_lsu_bus_buffer.scala 367:96] + node _T_1350 = eq(_T_1349, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 367:81] + node _T_1351 = and(_T_1347, _T_1350) @[el2_lsu_bus_buffer.scala 367:79] + node _T_1352 = eq(obuf_write, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 368:22] + node _T_1353 = and(bus_cmd_sent, _T_1352) @[el2_lsu_bus_buffer.scala 368:20] + node _T_1354 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 368:37] + node _T_1355 = and(_T_1353, _T_1354) @[el2_lsu_bus_buffer.scala 368:35] + node obuf_rdrsp_pend_in = or(_T_1351, _T_1355) @[el2_lsu_bus_buffer.scala 367:138] + wire obuf_tag0 : UInt<3> + obuf_tag0 <= UInt<1>("h00") + node _T_1356 = eq(obuf_write, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 370:46] + node _T_1357 = or(bus_cmd_sent, _T_1356) @[el2_lsu_bus_buffer.scala 370:44] + node obuf_rdrsp_tag_in = mux(_T_1357, obuf_tag0, obuf_rdrsp_tag) @[el2_lsu_bus_buffer.scala 370:30] + wire obuf_addr : UInt<32> + obuf_addr <= UInt<1>("h00") + wire obuf_sideeffect : UInt<1> + obuf_sideeffect <= UInt<1>("h00") + node _T_1358 = bits(obuf_addr_in, 31, 3) @[el2_lsu_bus_buffer.scala 373:34] + node _T_1359 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 373:52] + node _T_1360 = eq(_T_1358, _T_1359) @[el2_lsu_bus_buffer.scala 373:40] + node _T_1361 = and(_T_1360, obuf_aligned_in) @[el2_lsu_bus_buffer.scala 373:60] + node _T_1362 = eq(obuf_sideeffect, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 373:80] + node _T_1363 = and(_T_1361, _T_1362) @[el2_lsu_bus_buffer.scala 373:78] + node _T_1364 = eq(obuf_write, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 373:99] + node _T_1365 = and(_T_1363, _T_1364) @[el2_lsu_bus_buffer.scala 373:97] + node _T_1366 = eq(obuf_write_in, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 373:113] + node _T_1367 = and(_T_1365, _T_1366) @[el2_lsu_bus_buffer.scala 373:111] + node _T_1368 = eq(io.dec_tlu_external_ldfwd_disable, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 373:130] + node _T_1369 = and(_T_1367, _T_1368) @[el2_lsu_bus_buffer.scala 373:128] + node _T_1370 = eq(obuf_nosend, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 374:20] + node _T_1371 = and(obuf_valid, _T_1370) @[el2_lsu_bus_buffer.scala 374:18] + node _T_1372 = eq(bus_rsp_read_tag, obuf_rdrsp_tag) @[el2_lsu_bus_buffer.scala 374:90] + node _T_1373 = and(bus_rsp_read, _T_1372) @[el2_lsu_bus_buffer.scala 374:70] + node _T_1374 = eq(_T_1373, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 374:55] + node _T_1375 = and(obuf_rdrsp_pend, _T_1374) @[el2_lsu_bus_buffer.scala 374:53] + node _T_1376 = or(_T_1371, _T_1375) @[el2_lsu_bus_buffer.scala 374:34] + node _T_1377 = and(_T_1369, _T_1376) @[el2_lsu_bus_buffer.scala 373:165] + obuf_nosend_in <= _T_1377 @[el2_lsu_bus_buffer.scala 373:18] + node _T_1378 = bits(io.lsu_addr_r, 2, 2) @[el2_lsu_bus_buffer.scala 375:60] + node _T_1379 = cat(ldst_byteen_lo_r, UInt<4>("h00")) @[Cat.scala 29:58] + node _T_1380 = cat(UInt<4>("h00"), ldst_byteen_lo_r) @[Cat.scala 29:58] + node _T_1381 = mux(_T_1378, _T_1379, _T_1380) @[el2_lsu_bus_buffer.scala 375:46] + node _T_1382 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1383 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1384 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1385 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1386 = mux(_T_1382, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1387 = mux(_T_1383, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1388 = mux(_T_1384, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1389 = mux(_T_1385, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1390 = or(_T_1386, _T_1387) @[Mux.scala 27:72] + node _T_1391 = or(_T_1390, _T_1388) @[Mux.scala 27:72] + node _T_1392 = or(_T_1391, _T_1389) @[Mux.scala 27:72] + wire _T_1393 : UInt<32> @[Mux.scala 27:72] + _T_1393 <= _T_1392 @[Mux.scala 27:72] + node _T_1394 = bits(_T_1393, 2, 2) @[el2_lsu_bus_buffer.scala 376:36] + node _T_1395 = bits(_T_1394, 0, 0) @[el2_lsu_bus_buffer.scala 376:46] + node _T_1396 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1397 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1398 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1399 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1400 = mux(_T_1396, buf_byteen[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1401 = mux(_T_1397, buf_byteen[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1402 = mux(_T_1398, buf_byteen[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1403 = mux(_T_1399, buf_byteen[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1404 = or(_T_1400, _T_1401) @[Mux.scala 27:72] + node _T_1405 = or(_T_1404, _T_1402) @[Mux.scala 27:72] + node _T_1406 = or(_T_1405, _T_1403) @[Mux.scala 27:72] + wire _T_1407 : UInt<4> @[Mux.scala 27:72] + _T_1407 <= _T_1406 @[Mux.scala 27:72] + node _T_1408 = cat(_T_1407, UInt<4>("h00")) @[Cat.scala 29:58] + node _T_1409 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1410 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1411 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1412 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1413 = mux(_T_1409, buf_byteen[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1414 = mux(_T_1410, buf_byteen[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1415 = mux(_T_1411, buf_byteen[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1416 = mux(_T_1412, buf_byteen[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1417 = or(_T_1413, _T_1414) @[Mux.scala 27:72] + node _T_1418 = or(_T_1417, _T_1415) @[Mux.scala 27:72] + node _T_1419 = or(_T_1418, _T_1416) @[Mux.scala 27:72] + wire _T_1420 : UInt<4> @[Mux.scala 27:72] + _T_1420 <= _T_1419 @[Mux.scala 27:72] + node _T_1421 = cat(UInt<4>("h00"), _T_1420) @[Cat.scala 29:58] + node _T_1422 = mux(_T_1395, _T_1408, _T_1421) @[el2_lsu_bus_buffer.scala 376:8] + node obuf_byteen0_in = mux(ibuf_buf_byp, _T_1381, _T_1422) @[el2_lsu_bus_buffer.scala 375:28] + node _T_1423 = bits(io.end_addr_r, 2, 2) @[el2_lsu_bus_buffer.scala 377:60] + node _T_1424 = cat(ldst_byteen_hi_r, UInt<4>("h00")) @[Cat.scala 29:58] + node _T_1425 = cat(UInt<4>("h00"), ldst_byteen_hi_r) @[Cat.scala 29:58] + node _T_1426 = mux(_T_1423, _T_1424, _T_1425) @[el2_lsu_bus_buffer.scala 377:46] + node _T_1427 = eq(Cmdptr1, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1428 = eq(Cmdptr1, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1429 = eq(Cmdptr1, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1430 = eq(Cmdptr1, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1431 = mux(_T_1427, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1432 = mux(_T_1428, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1433 = mux(_T_1429, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1434 = mux(_T_1430, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1435 = or(_T_1431, _T_1432) @[Mux.scala 27:72] + node _T_1436 = or(_T_1435, _T_1433) @[Mux.scala 27:72] + node _T_1437 = or(_T_1436, _T_1434) @[Mux.scala 27:72] + wire _T_1438 : UInt<32> @[Mux.scala 27:72] + _T_1438 <= _T_1437 @[Mux.scala 27:72] + node _T_1439 = bits(_T_1438, 2, 2) @[el2_lsu_bus_buffer.scala 378:36] + node _T_1440 = bits(_T_1439, 0, 0) @[el2_lsu_bus_buffer.scala 378:46] + node _T_1441 = eq(Cmdptr1, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1442 = eq(Cmdptr1, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1443 = eq(Cmdptr1, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1444 = eq(Cmdptr1, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1445 = mux(_T_1441, buf_byteen[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1446 = mux(_T_1442, buf_byteen[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1447 = mux(_T_1443, buf_byteen[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1448 = mux(_T_1444, buf_byteen[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1449 = or(_T_1445, _T_1446) @[Mux.scala 27:72] + node _T_1450 = or(_T_1449, _T_1447) @[Mux.scala 27:72] + node _T_1451 = or(_T_1450, _T_1448) @[Mux.scala 27:72] + wire _T_1452 : UInt<4> @[Mux.scala 27:72] + _T_1452 <= _T_1451 @[Mux.scala 27:72] + node _T_1453 = cat(_T_1452, UInt<4>("h00")) @[Cat.scala 29:58] + node _T_1454 = eq(Cmdptr1, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1455 = eq(Cmdptr1, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1456 = eq(Cmdptr1, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1457 = eq(Cmdptr1, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1458 = mux(_T_1454, buf_byteen[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1459 = mux(_T_1455, buf_byteen[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1460 = mux(_T_1456, buf_byteen[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1461 = mux(_T_1457, buf_byteen[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1462 = or(_T_1458, _T_1459) @[Mux.scala 27:72] + node _T_1463 = or(_T_1462, _T_1460) @[Mux.scala 27:72] + node _T_1464 = or(_T_1463, _T_1461) @[Mux.scala 27:72] + wire _T_1465 : UInt<4> @[Mux.scala 27:72] + _T_1465 <= _T_1464 @[Mux.scala 27:72] + node _T_1466 = cat(UInt<4>("h00"), _T_1465) @[Cat.scala 29:58] + node _T_1467 = mux(_T_1440, _T_1453, _T_1466) @[el2_lsu_bus_buffer.scala 378:8] + node obuf_byteen1_in = mux(ibuf_buf_byp, _T_1426, _T_1467) @[el2_lsu_bus_buffer.scala 377:28] + node _T_1468 = bits(io.lsu_addr_r, 2, 2) @[el2_lsu_bus_buffer.scala 380:58] + node _T_1469 = cat(store_data_lo_r, UInt<32>("h00")) @[Cat.scala 29:58] + node _T_1470 = cat(UInt<32>("h00"), store_data_lo_r) @[Cat.scala 29:58] + node _T_1471 = mux(_T_1468, _T_1469, _T_1470) @[el2_lsu_bus_buffer.scala 380:44] + node _T_1472 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1473 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1474 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1475 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1476 = mux(_T_1472, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1477 = mux(_T_1473, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1478 = mux(_T_1474, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1479 = mux(_T_1475, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1480 = or(_T_1476, _T_1477) @[Mux.scala 27:72] + node _T_1481 = or(_T_1480, _T_1478) @[Mux.scala 27:72] + node _T_1482 = or(_T_1481, _T_1479) @[Mux.scala 27:72] + wire _T_1483 : UInt<32> @[Mux.scala 27:72] + _T_1483 <= _T_1482 @[Mux.scala 27:72] + node _T_1484 = bits(_T_1483, 2, 2) @[el2_lsu_bus_buffer.scala 381:36] + node _T_1485 = bits(_T_1484, 0, 0) @[el2_lsu_bus_buffer.scala 381:46] + node _T_1486 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1487 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1488 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1489 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1490 = mux(_T_1486, buf_data[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1491 = mux(_T_1487, buf_data[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1492 = mux(_T_1488, buf_data[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1493 = mux(_T_1489, buf_data[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1494 = or(_T_1490, _T_1491) @[Mux.scala 27:72] + node _T_1495 = or(_T_1494, _T_1492) @[Mux.scala 27:72] + node _T_1496 = or(_T_1495, _T_1493) @[Mux.scala 27:72] + wire _T_1497 : UInt<32> @[Mux.scala 27:72] + _T_1497 <= _T_1496 @[Mux.scala 27:72] + node _T_1498 = cat(_T_1497, UInt<32>("h00")) @[Cat.scala 29:58] + node _T_1499 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1500 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1501 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1502 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1503 = mux(_T_1499, buf_data[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1504 = mux(_T_1500, buf_data[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1505 = mux(_T_1501, buf_data[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1506 = mux(_T_1502, buf_data[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1507 = or(_T_1503, _T_1504) @[Mux.scala 27:72] + node _T_1508 = or(_T_1507, _T_1505) @[Mux.scala 27:72] + node _T_1509 = or(_T_1508, _T_1506) @[Mux.scala 27:72] + wire _T_1510 : UInt<32> @[Mux.scala 27:72] + _T_1510 <= _T_1509 @[Mux.scala 27:72] + node _T_1511 = cat(UInt<32>("h00"), _T_1510) @[Cat.scala 29:58] + node _T_1512 = mux(_T_1485, _T_1498, _T_1511) @[el2_lsu_bus_buffer.scala 381:8] + node obuf_data0_in = mux(ibuf_buf_byp, _T_1471, _T_1512) @[el2_lsu_bus_buffer.scala 380:26] + node _T_1513 = bits(io.lsu_addr_r, 2, 2) @[el2_lsu_bus_buffer.scala 382:58] + node _T_1514 = cat(store_data_hi_r, UInt<32>("h00")) @[Cat.scala 29:58] + node _T_1515 = cat(UInt<32>("h00"), store_data_hi_r) @[Cat.scala 29:58] + node _T_1516 = mux(_T_1513, _T_1514, _T_1515) @[el2_lsu_bus_buffer.scala 382:44] + node _T_1517 = eq(Cmdptr1, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1518 = eq(Cmdptr1, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1519 = eq(Cmdptr1, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1520 = eq(Cmdptr1, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1521 = mux(_T_1517, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1522 = mux(_T_1518, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1523 = mux(_T_1519, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1524 = mux(_T_1520, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1525 = or(_T_1521, _T_1522) @[Mux.scala 27:72] + node _T_1526 = or(_T_1525, _T_1523) @[Mux.scala 27:72] + node _T_1527 = or(_T_1526, _T_1524) @[Mux.scala 27:72] + wire _T_1528 : UInt<32> @[Mux.scala 27:72] + _T_1528 <= _T_1527 @[Mux.scala 27:72] + node _T_1529 = bits(_T_1528, 2, 2) @[el2_lsu_bus_buffer.scala 383:36] + node _T_1530 = bits(_T_1529, 0, 0) @[el2_lsu_bus_buffer.scala 383:46] + node _T_1531 = eq(Cmdptr1, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1532 = eq(Cmdptr1, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1533 = eq(Cmdptr1, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1534 = eq(Cmdptr1, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1535 = mux(_T_1531, buf_data[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1536 = mux(_T_1532, buf_data[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1537 = mux(_T_1533, buf_data[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1538 = mux(_T_1534, buf_data[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1539 = or(_T_1535, _T_1536) @[Mux.scala 27:72] + node _T_1540 = or(_T_1539, _T_1537) @[Mux.scala 27:72] + node _T_1541 = or(_T_1540, _T_1538) @[Mux.scala 27:72] + wire _T_1542 : UInt<32> @[Mux.scala 27:72] + _T_1542 <= _T_1541 @[Mux.scala 27:72] + node _T_1543 = cat(_T_1542, UInt<32>("h00")) @[Cat.scala 29:58] + node _T_1544 = eq(Cmdptr1, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1545 = eq(Cmdptr1, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1546 = eq(Cmdptr1, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1547 = eq(Cmdptr1, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1548 = mux(_T_1544, buf_data[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1549 = mux(_T_1545, buf_data[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1550 = mux(_T_1546, buf_data[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1551 = mux(_T_1547, buf_data[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1552 = or(_T_1548, _T_1549) @[Mux.scala 27:72] + node _T_1553 = or(_T_1552, _T_1550) @[Mux.scala 27:72] + node _T_1554 = or(_T_1553, _T_1551) @[Mux.scala 27:72] + wire _T_1555 : UInt<32> @[Mux.scala 27:72] + _T_1555 <= _T_1554 @[Mux.scala 27:72] + node _T_1556 = cat(UInt<32>("h00"), _T_1555) @[Cat.scala 29:58] + node _T_1557 = mux(_T_1530, _T_1543, _T_1556) @[el2_lsu_bus_buffer.scala 383:8] + node obuf_data1_in = mux(ibuf_buf_byp, _T_1516, _T_1557) @[el2_lsu_bus_buffer.scala 382:26] + node _T_1558 = bits(obuf_byteen0_in, 0, 0) @[el2_lsu_bus_buffer.scala 384:59] + node _T_1559 = bits(obuf_byteen1_in, 0, 0) @[el2_lsu_bus_buffer.scala 384:97] + node _T_1560 = and(obuf_merge_en, _T_1559) @[el2_lsu_bus_buffer.scala 384:80] + node _T_1561 = or(_T_1558, _T_1560) @[el2_lsu_bus_buffer.scala 384:63] + node _T_1562 = bits(obuf_byteen0_in, 1, 1) @[el2_lsu_bus_buffer.scala 384:59] + node _T_1563 = bits(obuf_byteen1_in, 1, 1) @[el2_lsu_bus_buffer.scala 384:97] + node _T_1564 = and(obuf_merge_en, _T_1563) @[el2_lsu_bus_buffer.scala 384:80] + node _T_1565 = or(_T_1562, _T_1564) @[el2_lsu_bus_buffer.scala 384:63] + node _T_1566 = bits(obuf_byteen0_in, 2, 2) @[el2_lsu_bus_buffer.scala 384:59] + node _T_1567 = bits(obuf_byteen1_in, 2, 2) @[el2_lsu_bus_buffer.scala 384:97] + node _T_1568 = and(obuf_merge_en, _T_1567) @[el2_lsu_bus_buffer.scala 384:80] + node _T_1569 = or(_T_1566, _T_1568) @[el2_lsu_bus_buffer.scala 384:63] + node _T_1570 = bits(obuf_byteen0_in, 3, 3) @[el2_lsu_bus_buffer.scala 384:59] + node _T_1571 = bits(obuf_byteen1_in, 3, 3) @[el2_lsu_bus_buffer.scala 384:97] + node _T_1572 = and(obuf_merge_en, _T_1571) @[el2_lsu_bus_buffer.scala 384:80] + node _T_1573 = or(_T_1570, _T_1572) @[el2_lsu_bus_buffer.scala 384:63] + node _T_1574 = bits(obuf_byteen0_in, 4, 4) @[el2_lsu_bus_buffer.scala 384:59] + node _T_1575 = bits(obuf_byteen1_in, 4, 4) @[el2_lsu_bus_buffer.scala 384:97] + node _T_1576 = and(obuf_merge_en, _T_1575) @[el2_lsu_bus_buffer.scala 384:80] + node _T_1577 = or(_T_1574, _T_1576) @[el2_lsu_bus_buffer.scala 384:63] + node _T_1578 = bits(obuf_byteen0_in, 5, 5) @[el2_lsu_bus_buffer.scala 384:59] + node _T_1579 = bits(obuf_byteen1_in, 5, 5) @[el2_lsu_bus_buffer.scala 384:97] + node _T_1580 = and(obuf_merge_en, _T_1579) @[el2_lsu_bus_buffer.scala 384:80] + node _T_1581 = or(_T_1578, _T_1580) @[el2_lsu_bus_buffer.scala 384:63] + node _T_1582 = bits(obuf_byteen0_in, 6, 6) @[el2_lsu_bus_buffer.scala 384:59] + node _T_1583 = bits(obuf_byteen1_in, 6, 6) @[el2_lsu_bus_buffer.scala 384:97] + node _T_1584 = and(obuf_merge_en, _T_1583) @[el2_lsu_bus_buffer.scala 384:80] + node _T_1585 = or(_T_1582, _T_1584) @[el2_lsu_bus_buffer.scala 384:63] + node _T_1586 = bits(obuf_byteen0_in, 7, 7) @[el2_lsu_bus_buffer.scala 384:59] + node _T_1587 = bits(obuf_byteen1_in, 7, 7) @[el2_lsu_bus_buffer.scala 384:97] + node _T_1588 = and(obuf_merge_en, _T_1587) @[el2_lsu_bus_buffer.scala 384:80] + node _T_1589 = or(_T_1586, _T_1588) @[el2_lsu_bus_buffer.scala 384:63] + node _T_1590 = cat(_T_1589, _T_1585) @[Cat.scala 29:58] + node _T_1591 = cat(_T_1590, _T_1581) @[Cat.scala 29:58] + node _T_1592 = cat(_T_1591, _T_1577) @[Cat.scala 29:58] + node _T_1593 = cat(_T_1592, _T_1573) @[Cat.scala 29:58] + node _T_1594 = cat(_T_1593, _T_1569) @[Cat.scala 29:58] + node _T_1595 = cat(_T_1594, _T_1565) @[Cat.scala 29:58] + node obuf_byteen_in = cat(_T_1595, _T_1561) @[Cat.scala 29:58] + node _T_1596 = bits(obuf_byteen1_in, 0, 0) @[el2_lsu_bus_buffer.scala 385:76] + node _T_1597 = and(obuf_merge_en, _T_1596) @[el2_lsu_bus_buffer.scala 385:59] + node _T_1598 = bits(obuf_data1_in, 7, 0) @[el2_lsu_bus_buffer.scala 385:94] + node _T_1599 = bits(obuf_data0_in, 7, 0) @[el2_lsu_bus_buffer.scala 385:123] + node _T_1600 = mux(_T_1597, _T_1598, _T_1599) @[el2_lsu_bus_buffer.scala 385:44] + node _T_1601 = bits(obuf_byteen1_in, 1, 1) @[el2_lsu_bus_buffer.scala 385:76] + node _T_1602 = and(obuf_merge_en, _T_1601) @[el2_lsu_bus_buffer.scala 385:59] + node _T_1603 = bits(obuf_data1_in, 15, 8) @[el2_lsu_bus_buffer.scala 385:94] + node _T_1604 = bits(obuf_data0_in, 15, 8) @[el2_lsu_bus_buffer.scala 385:123] + node _T_1605 = mux(_T_1602, _T_1603, _T_1604) @[el2_lsu_bus_buffer.scala 385:44] + node _T_1606 = bits(obuf_byteen1_in, 2, 2) @[el2_lsu_bus_buffer.scala 385:76] + node _T_1607 = and(obuf_merge_en, _T_1606) @[el2_lsu_bus_buffer.scala 385:59] + node _T_1608 = bits(obuf_data1_in, 23, 16) @[el2_lsu_bus_buffer.scala 385:94] + node _T_1609 = bits(obuf_data0_in, 23, 16) @[el2_lsu_bus_buffer.scala 385:123] + node _T_1610 = mux(_T_1607, _T_1608, _T_1609) @[el2_lsu_bus_buffer.scala 385:44] + node _T_1611 = bits(obuf_byteen1_in, 3, 3) @[el2_lsu_bus_buffer.scala 385:76] + node _T_1612 = and(obuf_merge_en, _T_1611) @[el2_lsu_bus_buffer.scala 385:59] + node _T_1613 = bits(obuf_data1_in, 31, 24) @[el2_lsu_bus_buffer.scala 385:94] + node _T_1614 = bits(obuf_data0_in, 31, 24) @[el2_lsu_bus_buffer.scala 385:123] + node _T_1615 = mux(_T_1612, _T_1613, _T_1614) @[el2_lsu_bus_buffer.scala 385:44] + node _T_1616 = bits(obuf_byteen1_in, 4, 4) @[el2_lsu_bus_buffer.scala 385:76] + node _T_1617 = and(obuf_merge_en, _T_1616) @[el2_lsu_bus_buffer.scala 385:59] + node _T_1618 = bits(obuf_data1_in, 39, 32) @[el2_lsu_bus_buffer.scala 385:94] + node _T_1619 = bits(obuf_data0_in, 39, 32) @[el2_lsu_bus_buffer.scala 385:123] + node _T_1620 = mux(_T_1617, _T_1618, _T_1619) @[el2_lsu_bus_buffer.scala 385:44] + node _T_1621 = bits(obuf_byteen1_in, 5, 5) @[el2_lsu_bus_buffer.scala 385:76] + node _T_1622 = and(obuf_merge_en, _T_1621) @[el2_lsu_bus_buffer.scala 385:59] + node _T_1623 = bits(obuf_data1_in, 47, 40) @[el2_lsu_bus_buffer.scala 385:94] + node _T_1624 = bits(obuf_data0_in, 47, 40) @[el2_lsu_bus_buffer.scala 385:123] + node _T_1625 = mux(_T_1622, _T_1623, _T_1624) @[el2_lsu_bus_buffer.scala 385:44] + node _T_1626 = bits(obuf_byteen1_in, 6, 6) @[el2_lsu_bus_buffer.scala 385:76] + node _T_1627 = and(obuf_merge_en, _T_1626) @[el2_lsu_bus_buffer.scala 385:59] + node _T_1628 = bits(obuf_data1_in, 55, 48) @[el2_lsu_bus_buffer.scala 385:94] + node _T_1629 = bits(obuf_data0_in, 55, 48) @[el2_lsu_bus_buffer.scala 385:123] + node _T_1630 = mux(_T_1627, _T_1628, _T_1629) @[el2_lsu_bus_buffer.scala 385:44] + node _T_1631 = bits(obuf_byteen1_in, 7, 7) @[el2_lsu_bus_buffer.scala 385:76] + node _T_1632 = and(obuf_merge_en, _T_1631) @[el2_lsu_bus_buffer.scala 385:59] + node _T_1633 = bits(obuf_data1_in, 63, 56) @[el2_lsu_bus_buffer.scala 385:94] + node _T_1634 = bits(obuf_data0_in, 63, 56) @[el2_lsu_bus_buffer.scala 385:123] + node _T_1635 = mux(_T_1632, _T_1633, _T_1634) @[el2_lsu_bus_buffer.scala 385:44] + node _T_1636 = cat(_T_1635, _T_1630) @[Cat.scala 29:58] + node _T_1637 = cat(_T_1636, _T_1625) @[Cat.scala 29:58] + node _T_1638 = cat(_T_1637, _T_1620) @[Cat.scala 29:58] + node _T_1639 = cat(_T_1638, _T_1615) @[Cat.scala 29:58] + node _T_1640 = cat(_T_1639, _T_1610) @[Cat.scala 29:58] + node _T_1641 = cat(_T_1640, _T_1605) @[Cat.scala 29:58] + node obuf_data_in = cat(_T_1641, _T_1600) @[Cat.scala 29:58] + wire buf_dualhi : UInt<1>[4] @[el2_lsu_bus_buffer.scala 387:24] + buf_dualhi[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 388:14] + buf_dualhi[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 388:14] + buf_dualhi[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 388:14] + buf_dualhi[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 388:14] + node _T_1642 = neq(CmdPtr0, Cmdptr1) @[el2_lsu_bus_buffer.scala 389:30] + node _T_1643 = and(_T_1642, found_cmdptr0) @[el2_lsu_bus_buffer.scala 389:43] + node _T_1644 = and(_T_1643, found_cmdptr1) @[el2_lsu_bus_buffer.scala 389:59] + node _T_1645 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1646 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1647 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1648 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1649 = mux(_T_1645, buf_state[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1650 = mux(_T_1646, buf_state[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1651 = mux(_T_1647, buf_state[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1652 = mux(_T_1648, buf_state[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1653 = or(_T_1649, _T_1650) @[Mux.scala 27:72] + node _T_1654 = or(_T_1653, _T_1651) @[Mux.scala 27:72] + node _T_1655 = or(_T_1654, _T_1652) @[Mux.scala 27:72] + wire _T_1656 : UInt<3> @[Mux.scala 27:72] + _T_1656 <= _T_1655 @[Mux.scala 27:72] + node _T_1657 = eq(_T_1656, UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 389:107] + node _T_1658 = and(_T_1644, _T_1657) @[el2_lsu_bus_buffer.scala 389:75] + node _T_1659 = eq(Cmdptr1, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1660 = eq(Cmdptr1, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1661 = eq(Cmdptr1, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1662 = eq(Cmdptr1, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1663 = mux(_T_1659, buf_state[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1664 = mux(_T_1660, buf_state[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1665 = mux(_T_1661, buf_state[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1666 = mux(_T_1662, buf_state[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1667 = or(_T_1663, _T_1664) @[Mux.scala 27:72] + node _T_1668 = or(_T_1667, _T_1665) @[Mux.scala 27:72] + node _T_1669 = or(_T_1668, _T_1666) @[Mux.scala 27:72] + wire _T_1670 : UInt<3> @[Mux.scala 27:72] + _T_1670 <= _T_1669 @[Mux.scala 27:72] + node _T_1671 = eq(_T_1670, UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 389:150] + node _T_1672 = and(_T_1658, _T_1671) @[el2_lsu_bus_buffer.scala 389:118] + node _T_1673 = cat(buf_cmd_state_bus_en[3], buf_cmd_state_bus_en[2]) @[Cat.scala 29:58] + node _T_1674 = cat(_T_1673, buf_cmd_state_bus_en[1]) @[Cat.scala 29:58] + node _T_1675 = cat(_T_1674, buf_cmd_state_bus_en[0]) @[Cat.scala 29:58] + node _T_1676 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1677 = bits(_T_1675, 0, 0) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1678 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1679 = bits(_T_1675, 1, 1) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1680 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1681 = bits(_T_1675, 2, 2) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1682 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1683 = bits(_T_1675, 3, 3) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1684 = mux(_T_1676, _T_1677, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1685 = mux(_T_1678, _T_1679, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1686 = mux(_T_1680, _T_1681, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1687 = mux(_T_1682, _T_1683, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1688 = or(_T_1684, _T_1685) @[Mux.scala 27:72] + node _T_1689 = or(_T_1688, _T_1686) @[Mux.scala 27:72] + node _T_1690 = or(_T_1689, _T_1687) @[Mux.scala 27:72] + wire _T_1691 : UInt<1> @[Mux.scala 27:72] + _T_1691 <= _T_1690 @[Mux.scala 27:72] + node _T_1692 = eq(_T_1691, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 390:3] + node _T_1693 = and(_T_1672, _T_1692) @[el2_lsu_bus_buffer.scala 389:161] + node _T_1694 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1695 = bits(buf_sideeffect, 0, 0) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1696 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1697 = bits(buf_sideeffect, 1, 1) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1698 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1699 = bits(buf_sideeffect, 2, 2) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1700 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1701 = bits(buf_sideeffect, 3, 3) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1702 = mux(_T_1694, _T_1695, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1703 = mux(_T_1696, _T_1697, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1704 = mux(_T_1698, _T_1699, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1705 = mux(_T_1700, _T_1701, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1706 = or(_T_1702, _T_1703) @[Mux.scala 27:72] + node _T_1707 = or(_T_1706, _T_1704) @[Mux.scala 27:72] + node _T_1708 = or(_T_1707, _T_1705) @[Mux.scala 27:72] + wire _T_1709 : UInt<1> @[Mux.scala 27:72] + _T_1709 <= _T_1708 @[Mux.scala 27:72] + node _T_1710 = eq(_T_1709, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 390:85] + node _T_1711 = and(_T_1693, _T_1710) @[el2_lsu_bus_buffer.scala 390:83] + node _T_1712 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1713 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1714 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1715 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1716 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1717 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1718 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1719 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1720 = mux(_T_1712, _T_1713, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1721 = mux(_T_1714, _T_1715, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1722 = mux(_T_1716, _T_1717, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1723 = mux(_T_1718, _T_1719, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1724 = or(_T_1720, _T_1721) @[Mux.scala 27:72] + node _T_1725 = or(_T_1724, _T_1722) @[Mux.scala 27:72] + node _T_1726 = or(_T_1725, _T_1723) @[Mux.scala 27:72] + wire _T_1727 : UInt<1> @[Mux.scala 27:72] + _T_1727 <= _T_1726 @[Mux.scala 27:72] + node _T_1728 = eq(Cmdptr1, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1729 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1730 = eq(Cmdptr1, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1731 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1732 = eq(Cmdptr1, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1733 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1734 = eq(Cmdptr1, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1735 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1736 = mux(_T_1728, _T_1729, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1737 = mux(_T_1730, _T_1731, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1738 = mux(_T_1732, _T_1733, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1739 = mux(_T_1734, _T_1735, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1740 = or(_T_1736, _T_1737) @[Mux.scala 27:72] + node _T_1741 = or(_T_1740, _T_1738) @[Mux.scala 27:72] + node _T_1742 = or(_T_1741, _T_1739) @[Mux.scala 27:72] + wire _T_1743 : UInt<1> @[Mux.scala 27:72] + _T_1743 <= _T_1742 @[Mux.scala 27:72] + node _T_1744 = and(_T_1727, _T_1743) @[el2_lsu_bus_buffer.scala 391:36] + node _T_1745 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1746 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1747 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1748 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1749 = mux(_T_1745, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1750 = mux(_T_1746, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1751 = mux(_T_1747, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1752 = mux(_T_1748, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1753 = or(_T_1749, _T_1750) @[Mux.scala 27:72] + node _T_1754 = or(_T_1753, _T_1751) @[Mux.scala 27:72] + node _T_1755 = or(_T_1754, _T_1752) @[Mux.scala 27:72] + wire _T_1756 : UInt<32> @[Mux.scala 27:72] + _T_1756 <= _T_1755 @[Mux.scala 27:72] + node _T_1757 = bits(_T_1756, 31, 3) @[el2_lsu_bus_buffer.scala 392:33] + node _T_1758 = eq(Cmdptr1, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1759 = eq(Cmdptr1, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1760 = eq(Cmdptr1, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1761 = eq(Cmdptr1, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1762 = mux(_T_1758, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1763 = mux(_T_1759, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1764 = mux(_T_1760, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1765 = mux(_T_1761, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1766 = or(_T_1762, _T_1763) @[Mux.scala 27:72] + node _T_1767 = or(_T_1766, _T_1764) @[Mux.scala 27:72] + node _T_1768 = or(_T_1767, _T_1765) @[Mux.scala 27:72] + wire _T_1769 : UInt<32> @[Mux.scala 27:72] + _T_1769 <= _T_1768 @[Mux.scala 27:72] + node _T_1770 = bits(_T_1769, 31, 3) @[el2_lsu_bus_buffer.scala 392:69] + node _T_1771 = eq(_T_1757, _T_1770) @[el2_lsu_bus_buffer.scala 392:39] + node _T_1772 = and(_T_1744, _T_1771) @[el2_lsu_bus_buffer.scala 391:67] + node _T_1773 = eq(bus_coalescing_disable, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 392:79] + node _T_1774 = and(_T_1772, _T_1773) @[el2_lsu_bus_buffer.scala 392:77] + node _T_1775 = eq(UInt<1>("h01"), UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 392:105] + node _T_1776 = and(_T_1774, _T_1775) @[el2_lsu_bus_buffer.scala 392:103] + node _T_1777 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1778 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1779 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1780 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1781 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1782 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1783 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1784 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1785 = mux(_T_1777, _T_1778, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1786 = mux(_T_1779, _T_1780, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1787 = mux(_T_1781, _T_1782, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1788 = mux(_T_1783, _T_1784, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1789 = or(_T_1785, _T_1786) @[Mux.scala 27:72] + node _T_1790 = or(_T_1789, _T_1787) @[Mux.scala 27:72] + node _T_1791 = or(_T_1790, _T_1788) @[Mux.scala 27:72] + wire _T_1792 : UInt<1> @[Mux.scala 27:72] + _T_1792 <= _T_1791 @[Mux.scala 27:72] + node _T_1793 = eq(_T_1792, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 393:6] + node _T_1794 = cat(buf_dual[3], buf_dual[2]) @[Cat.scala 29:58] + node _T_1795 = cat(_T_1794, buf_dual[1]) @[Cat.scala 29:58] + node _T_1796 = cat(_T_1795, buf_dual[0]) @[Cat.scala 29:58] + node _T_1797 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1798 = bits(_T_1796, 0, 0) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1799 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1800 = bits(_T_1796, 1, 1) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1801 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1802 = bits(_T_1796, 2, 2) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1803 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1804 = bits(_T_1796, 3, 3) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1805 = mux(_T_1797, _T_1798, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1806 = mux(_T_1799, _T_1800, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1807 = mux(_T_1801, _T_1802, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1808 = mux(_T_1803, _T_1804, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1809 = or(_T_1805, _T_1806) @[Mux.scala 27:72] + node _T_1810 = or(_T_1809, _T_1807) @[Mux.scala 27:72] + node _T_1811 = or(_T_1810, _T_1808) @[Mux.scala 27:72] + wire _T_1812 : UInt<1> @[Mux.scala 27:72] + _T_1812 <= _T_1811 @[Mux.scala 27:72] + node _T_1813 = and(_T_1793, _T_1812) @[el2_lsu_bus_buffer.scala 393:36] + node _T_1814 = cat(buf_dualhi[3], buf_dualhi[2]) @[Cat.scala 29:58] + node _T_1815 = cat(_T_1814, buf_dualhi[1]) @[Cat.scala 29:58] + node _T_1816 = cat(_T_1815, buf_dualhi[0]) @[Cat.scala 29:58] + node _T_1817 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1818 = bits(_T_1816, 0, 0) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1819 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1820 = bits(_T_1816, 1, 1) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1821 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1822 = bits(_T_1816, 2, 2) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1823 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1824 = bits(_T_1816, 3, 3) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1825 = mux(_T_1817, _T_1818, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1826 = mux(_T_1819, _T_1820, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1827 = mux(_T_1821, _T_1822, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1828 = mux(_T_1823, _T_1824, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1829 = or(_T_1825, _T_1826) @[Mux.scala 27:72] + node _T_1830 = or(_T_1829, _T_1827) @[Mux.scala 27:72] + node _T_1831 = or(_T_1830, _T_1828) @[Mux.scala 27:72] + wire _T_1832 : UInt<1> @[Mux.scala 27:72] + _T_1832 <= _T_1831 @[Mux.scala 27:72] + node _T_1833 = eq(_T_1832, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 393:107] + node _T_1834 = and(_T_1813, _T_1833) @[el2_lsu_bus_buffer.scala 393:105] + node _T_1835 = cat(buf_samedw[3], buf_samedw[2]) @[Cat.scala 29:58] + node _T_1836 = cat(_T_1835, buf_samedw[1]) @[Cat.scala 29:58] + node _T_1837 = cat(_T_1836, buf_samedw[0]) @[Cat.scala 29:58] + node _T_1838 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1839 = bits(_T_1837, 0, 0) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1840 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1841 = bits(_T_1837, 1, 1) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1842 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1843 = bits(_T_1837, 2, 2) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1844 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1845 = bits(_T_1837, 3, 3) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1846 = mux(_T_1838, _T_1839, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1847 = mux(_T_1840, _T_1841, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1848 = mux(_T_1842, _T_1843, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1849 = mux(_T_1844, _T_1845, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1850 = or(_T_1846, _T_1847) @[Mux.scala 27:72] + node _T_1851 = or(_T_1850, _T_1848) @[Mux.scala 27:72] + node _T_1852 = or(_T_1851, _T_1849) @[Mux.scala 27:72] + wire _T_1853 : UInt<1> @[Mux.scala 27:72] + _T_1853 <= _T_1852 @[Mux.scala 27:72] + node _T_1854 = and(_T_1834, _T_1853) @[el2_lsu_bus_buffer.scala 393:177] + node _T_1855 = or(_T_1776, _T_1854) @[el2_lsu_bus_buffer.scala 392:126] + node _T_1856 = and(_T_1711, _T_1855) @[el2_lsu_bus_buffer.scala 390:120] + node _T_1857 = and(ibuf_buf_byp, ldst_samedw_r) @[el2_lsu_bus_buffer.scala 394:19] + node _T_1858 = and(_T_1857, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 394:35] + node _T_1859 = or(_T_1856, _T_1858) @[el2_lsu_bus_buffer.scala 393:251] + obuf_merge_en <= _T_1859 @[el2_lsu_bus_buffer.scala 389:17] + reg obuf_wr_enQ : UInt<1>, io.lsu_busm_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 396:55] + obuf_wr_enQ <= obuf_wr_en @[el2_lsu_bus_buffer.scala 396:55] + node _T_1860 = mux(obuf_wr_en, UInt<1>("h01"), obuf_valid) @[el2_lsu_bus_buffer.scala 397:58] + node _T_1861 = eq(obuf_rst, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 397:93] + node _T_1862 = and(_T_1860, _T_1861) @[el2_lsu_bus_buffer.scala 397:91] + reg _T_1863 : UInt<1>, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 397:54] + _T_1863 <= _T_1862 @[el2_lsu_bus_buffer.scala 397:54] + obuf_valid <= _T_1863 @[el2_lsu_bus_buffer.scala 397:14] + reg _T_1864 : UInt<1>, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when obuf_wr_en : @[Reg.scala 28:19] + _T_1864 <= obuf_nosend_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + obuf_nosend <= _T_1864 @[el2_lsu_bus_buffer.scala 398:15] + reg _T_1865 : UInt<1>, io.lsu_busm_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 399:54] + _T_1865 <= obuf_cmd_done_in @[el2_lsu_bus_buffer.scala 399:54] + obuf_cmd_done <= _T_1865 @[el2_lsu_bus_buffer.scala 399:17] + reg _T_1866 : UInt<1>, io.lsu_busm_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 400:55] + _T_1866 <= obuf_data_done_in @[el2_lsu_bus_buffer.scala 400:55] + obuf_data_done <= _T_1866 @[el2_lsu_bus_buffer.scala 400:18] + reg _T_1867 : UInt<1>, io.lsu_busm_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 401:56] + _T_1867 <= obuf_rdrsp_pend_in @[el2_lsu_bus_buffer.scala 401:56] + obuf_rdrsp_pend <= _T_1867 @[el2_lsu_bus_buffer.scala 401:19] + reg _T_1868 : UInt, io.lsu_busm_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 402:55] + _T_1868 <= obuf_rdrsp_tag_in @[el2_lsu_bus_buffer.scala 402:55] + obuf_rdrsp_tag <= _T_1868 @[el2_lsu_bus_buffer.scala 402:18] + reg _T_1869 : UInt, io.lsu_busm_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when obuf_wr_en : @[Reg.scala 28:19] + _T_1869 <= obuf_tag0_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + obuf_tag0 <= _T_1869 @[el2_lsu_bus_buffer.scala 403:13] + reg obuf_tag1 : UInt, io.lsu_busm_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when obuf_wr_en : @[Reg.scala 28:19] + obuf_tag1 <= obuf_tag1_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + reg obuf_merge : UInt<1>, io.lsu_busm_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when obuf_wr_en : @[Reg.scala 28:19] + obuf_merge <= obuf_merge_en @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + reg _T_1870 : UInt<1>, io.lsu_busm_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when obuf_wr_en : @[Reg.scala 28:19] + _T_1870 <= obuf_write_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + obuf_write <= _T_1870 @[el2_lsu_bus_buffer.scala 406:14] + reg _T_1871 : UInt<1>, io.lsu_busm_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when obuf_wr_en : @[Reg.scala 28:19] + _T_1871 <= obuf_sideeffect_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + obuf_sideeffect <= _T_1871 @[el2_lsu_bus_buffer.scala 407:19] + reg obuf_sz : UInt, io.lsu_busm_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when obuf_wr_en : @[Reg.scala 28:19] + obuf_sz <= obuf_sz_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + inst rvclkhdr_2 of rvclkhdr_26 @[el2_lib.scala 506:23] + rvclkhdr_2.clock <= clock + rvclkhdr_2.reset <= reset + rvclkhdr_2.io.clk <= io.lsu_busm_clk @[el2_lib.scala 508:18] + rvclkhdr_2.io.en <= obuf_wr_en @[el2_lib.scala 509:17] + rvclkhdr_2.io.scan_mode <= io.scan_mode @[el2_lib.scala 510:24] + reg _T_1872 : UInt, rvclkhdr_2.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 512:16] + _T_1872 <= obuf_addr_in @[el2_lib.scala 512:16] + obuf_addr <= _T_1872 @[el2_lsu_bus_buffer.scala 409:13] + reg obuf_byteen : UInt, io.lsu_busm_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when obuf_wr_en : @[Reg.scala 28:19] + obuf_byteen <= obuf_byteen_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + inst rvclkhdr_3 of rvclkhdr_27 @[el2_lib.scala 506:23] + rvclkhdr_3.clock <= clock + rvclkhdr_3.reset <= reset + rvclkhdr_3.io.clk <= io.lsu_busm_clk @[el2_lib.scala 508:18] + rvclkhdr_3.io.en <= obuf_wr_en @[el2_lib.scala 509:17] + rvclkhdr_3.io.scan_mode <= io.scan_mode @[el2_lib.scala 510:24] + reg obuf_data : UInt, rvclkhdr_3.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 512:16] + obuf_data <= obuf_data_in @[el2_lib.scala 512:16] + reg _T_1873 : UInt, io.lsu_busm_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 412:54] + _T_1873 <= obuf_wr_timer_in @[el2_lsu_bus_buffer.scala 412:54] + obuf_wr_timer <= _T_1873 @[el2_lsu_bus_buffer.scala 412:17] + wire WrPtr0_m : UInt<2> + WrPtr0_m <= UInt<1>("h00") + node _T_1874 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 415:65] + node _T_1875 = eq(ibuf_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 416:30] + node _T_1876 = and(ibuf_valid, _T_1875) @[el2_lsu_bus_buffer.scala 416:19] + node _T_1877 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 417:18] + node _T_1878 = eq(WrPtr1_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 417:57] + node _T_1879 = and(io.ldst_dual_r, _T_1878) @[el2_lsu_bus_buffer.scala 417:45] + node _T_1880 = or(_T_1877, _T_1879) @[el2_lsu_bus_buffer.scala 417:27] + node _T_1881 = and(io.lsu_busreq_r, _T_1880) @[el2_lsu_bus_buffer.scala 416:58] + node _T_1882 = or(_T_1876, _T_1881) @[el2_lsu_bus_buffer.scala 416:39] + node _T_1883 = eq(_T_1882, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 416:5] + node _T_1884 = and(_T_1874, _T_1883) @[el2_lsu_bus_buffer.scala 415:76] + node _T_1885 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 415:65] + node _T_1886 = eq(ibuf_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 416:30] + node _T_1887 = and(ibuf_valid, _T_1886) @[el2_lsu_bus_buffer.scala 416:19] + node _T_1888 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 417:18] + node _T_1889 = eq(WrPtr1_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 417:57] + node _T_1890 = and(io.ldst_dual_r, _T_1889) @[el2_lsu_bus_buffer.scala 417:45] + node _T_1891 = or(_T_1888, _T_1890) @[el2_lsu_bus_buffer.scala 417:27] + node _T_1892 = and(io.lsu_busreq_r, _T_1891) @[el2_lsu_bus_buffer.scala 416:58] + node _T_1893 = or(_T_1887, _T_1892) @[el2_lsu_bus_buffer.scala 416:39] + node _T_1894 = eq(_T_1893, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 416:5] + node _T_1895 = and(_T_1885, _T_1894) @[el2_lsu_bus_buffer.scala 415:76] + node _T_1896 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 415:65] + node _T_1897 = eq(ibuf_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 416:30] + node _T_1898 = and(ibuf_valid, _T_1897) @[el2_lsu_bus_buffer.scala 416:19] + node _T_1899 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 417:18] + node _T_1900 = eq(WrPtr1_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 417:57] + node _T_1901 = and(io.ldst_dual_r, _T_1900) @[el2_lsu_bus_buffer.scala 417:45] + node _T_1902 = or(_T_1899, _T_1901) @[el2_lsu_bus_buffer.scala 417:27] + node _T_1903 = and(io.lsu_busreq_r, _T_1902) @[el2_lsu_bus_buffer.scala 416:58] + node _T_1904 = or(_T_1898, _T_1903) @[el2_lsu_bus_buffer.scala 416:39] + node _T_1905 = eq(_T_1904, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 416:5] + node _T_1906 = and(_T_1896, _T_1905) @[el2_lsu_bus_buffer.scala 415:76] + node _T_1907 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 415:65] + node _T_1908 = eq(ibuf_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 416:30] + node _T_1909 = and(ibuf_valid, _T_1908) @[el2_lsu_bus_buffer.scala 416:19] + node _T_1910 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 417:18] + node _T_1911 = eq(WrPtr1_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 417:57] + node _T_1912 = and(io.ldst_dual_r, _T_1911) @[el2_lsu_bus_buffer.scala 417:45] + node _T_1913 = or(_T_1910, _T_1912) @[el2_lsu_bus_buffer.scala 417:27] + node _T_1914 = and(io.lsu_busreq_r, _T_1913) @[el2_lsu_bus_buffer.scala 416:58] + node _T_1915 = or(_T_1909, _T_1914) @[el2_lsu_bus_buffer.scala 416:39] + node _T_1916 = eq(_T_1915, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 416:5] + node _T_1917 = and(_T_1907, _T_1916) @[el2_lsu_bus_buffer.scala 415:76] + node _T_1918 = mux(_T_1917, UInt<2>("h03"), UInt<2>("h03")) @[Mux.scala 98:16] + node _T_1919 = mux(_T_1906, UInt<2>("h02"), _T_1918) @[Mux.scala 98:16] + node _T_1920 = mux(_T_1895, UInt<1>("h01"), _T_1919) @[Mux.scala 98:16] + node _T_1921 = mux(_T_1884, UInt<1>("h00"), _T_1920) @[Mux.scala 98:16] + WrPtr0_m <= _T_1921 @[el2_lsu_bus_buffer.scala 415:12] + wire WrPtr1_m : UInt<2> + WrPtr1_m <= UInt<1>("h00") + node _T_1922 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 421:65] + node _T_1923 = eq(ibuf_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 421:103] + node _T_1924 = and(ibuf_valid, _T_1923) @[el2_lsu_bus_buffer.scala 421:92] + node _T_1925 = eq(WrPtr0_m, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 422:33] + node _T_1926 = and(io.lsu_busreq_m, _T_1925) @[el2_lsu_bus_buffer.scala 422:22] + node _T_1927 = or(_T_1924, _T_1926) @[el2_lsu_bus_buffer.scala 421:112] + node _T_1928 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 423:36] + node _T_1929 = eq(WrPtr1_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 424:34] + node _T_1930 = and(io.ldst_dual_r, _T_1929) @[el2_lsu_bus_buffer.scala 424:23] + node _T_1931 = or(_T_1928, _T_1930) @[el2_lsu_bus_buffer.scala 423:46] + node _T_1932 = and(io.lsu_busreq_r, _T_1931) @[el2_lsu_bus_buffer.scala 423:22] + node _T_1933 = or(_T_1927, _T_1932) @[el2_lsu_bus_buffer.scala 422:42] + node _T_1934 = eq(_T_1933, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 421:78] + node _T_1935 = and(_T_1922, _T_1934) @[el2_lsu_bus_buffer.scala 421:76] + node _T_1936 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 421:65] + node _T_1937 = eq(ibuf_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 421:103] + node _T_1938 = and(ibuf_valid, _T_1937) @[el2_lsu_bus_buffer.scala 421:92] + node _T_1939 = eq(WrPtr0_m, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 422:33] + node _T_1940 = and(io.lsu_busreq_m, _T_1939) @[el2_lsu_bus_buffer.scala 422:22] + node _T_1941 = or(_T_1938, _T_1940) @[el2_lsu_bus_buffer.scala 421:112] + node _T_1942 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 423:36] + node _T_1943 = eq(WrPtr1_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 424:34] + node _T_1944 = and(io.ldst_dual_r, _T_1943) @[el2_lsu_bus_buffer.scala 424:23] + node _T_1945 = or(_T_1942, _T_1944) @[el2_lsu_bus_buffer.scala 423:46] + node _T_1946 = and(io.lsu_busreq_r, _T_1945) @[el2_lsu_bus_buffer.scala 423:22] + node _T_1947 = or(_T_1941, _T_1946) @[el2_lsu_bus_buffer.scala 422:42] + node _T_1948 = eq(_T_1947, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 421:78] + node _T_1949 = and(_T_1936, _T_1948) @[el2_lsu_bus_buffer.scala 421:76] + node _T_1950 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 421:65] + node _T_1951 = eq(ibuf_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 421:103] + node _T_1952 = and(ibuf_valid, _T_1951) @[el2_lsu_bus_buffer.scala 421:92] + node _T_1953 = eq(WrPtr0_m, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 422:33] + node _T_1954 = and(io.lsu_busreq_m, _T_1953) @[el2_lsu_bus_buffer.scala 422:22] + node _T_1955 = or(_T_1952, _T_1954) @[el2_lsu_bus_buffer.scala 421:112] + node _T_1956 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 423:36] + node _T_1957 = eq(WrPtr1_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 424:34] + node _T_1958 = and(io.ldst_dual_r, _T_1957) @[el2_lsu_bus_buffer.scala 424:23] + node _T_1959 = or(_T_1956, _T_1958) @[el2_lsu_bus_buffer.scala 423:46] + node _T_1960 = and(io.lsu_busreq_r, _T_1959) @[el2_lsu_bus_buffer.scala 423:22] + node _T_1961 = or(_T_1955, _T_1960) @[el2_lsu_bus_buffer.scala 422:42] + node _T_1962 = eq(_T_1961, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 421:78] + node _T_1963 = and(_T_1950, _T_1962) @[el2_lsu_bus_buffer.scala 421:76] + node _T_1964 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 421:65] + node _T_1965 = eq(ibuf_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 421:103] + node _T_1966 = and(ibuf_valid, _T_1965) @[el2_lsu_bus_buffer.scala 421:92] + node _T_1967 = eq(WrPtr0_m, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 422:33] + node _T_1968 = and(io.lsu_busreq_m, _T_1967) @[el2_lsu_bus_buffer.scala 422:22] + node _T_1969 = or(_T_1966, _T_1968) @[el2_lsu_bus_buffer.scala 421:112] + node _T_1970 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 423:36] + node _T_1971 = eq(WrPtr1_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 424:34] + node _T_1972 = and(io.ldst_dual_r, _T_1971) @[el2_lsu_bus_buffer.scala 424:23] + node _T_1973 = or(_T_1970, _T_1972) @[el2_lsu_bus_buffer.scala 423:46] + node _T_1974 = and(io.lsu_busreq_r, _T_1973) @[el2_lsu_bus_buffer.scala 423:22] + node _T_1975 = or(_T_1969, _T_1974) @[el2_lsu_bus_buffer.scala 422:42] + node _T_1976 = eq(_T_1975, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 421:78] + node _T_1977 = and(_T_1964, _T_1976) @[el2_lsu_bus_buffer.scala 421:76] + node _T_1978 = mux(_T_1977, UInt<2>("h03"), UInt<2>("h03")) @[Mux.scala 98:16] + node _T_1979 = mux(_T_1963, UInt<2>("h02"), _T_1978) @[Mux.scala 98:16] + node _T_1980 = mux(_T_1949, UInt<1>("h01"), _T_1979) @[Mux.scala 98:16] + node _T_1981 = mux(_T_1935, UInt<1>("h00"), _T_1980) @[Mux.scala 98:16] + WrPtr1_m <= _T_1981 @[el2_lsu_bus_buffer.scala 421:12] + wire buf_age : UInt<4>[4] @[el2_lsu_bus_buffer.scala 426:21] + buf_age[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 427:11] + buf_age[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 427:11] + buf_age[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 427:11] + buf_age[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 427:11] + node _T_1982 = orr(buf_age[0]) @[el2_lsu_bus_buffer.scala 429:58] + node _T_1983 = eq(_T_1982, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 429:45] + node _T_1984 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 429:78] + node _T_1985 = and(_T_1983, _T_1984) @[el2_lsu_bus_buffer.scala 429:63] + node _T_1986 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 429:90] + node _T_1987 = and(_T_1985, _T_1986) @[el2_lsu_bus_buffer.scala 429:88] + node _T_1988 = orr(buf_age[1]) @[el2_lsu_bus_buffer.scala 429:58] + node _T_1989 = eq(_T_1988, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 429:45] + node _T_1990 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 429:78] + node _T_1991 = and(_T_1989, _T_1990) @[el2_lsu_bus_buffer.scala 429:63] + node _T_1992 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 429:90] + node _T_1993 = and(_T_1991, _T_1992) @[el2_lsu_bus_buffer.scala 429:88] + node _T_1994 = orr(buf_age[2]) @[el2_lsu_bus_buffer.scala 429:58] + node _T_1995 = eq(_T_1994, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 429:45] + node _T_1996 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 429:78] + node _T_1997 = and(_T_1995, _T_1996) @[el2_lsu_bus_buffer.scala 429:63] + node _T_1998 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 429:90] + node _T_1999 = and(_T_1997, _T_1998) @[el2_lsu_bus_buffer.scala 429:88] + node _T_2000 = orr(buf_age[3]) @[el2_lsu_bus_buffer.scala 429:58] + node _T_2001 = eq(_T_2000, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 429:45] + node _T_2002 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 429:78] + node _T_2003 = and(_T_2001, _T_2002) @[el2_lsu_bus_buffer.scala 429:63] + node _T_2004 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 429:90] + node _T_2005 = and(_T_2003, _T_2004) @[el2_lsu_bus_buffer.scala 429:88] + node _T_2006 = cat(_T_2005, _T_1999) @[Cat.scala 29:58] + node _T_2007 = cat(_T_2006, _T_1993) @[Cat.scala 29:58] + node CmdPtr0Dec = cat(_T_2007, _T_1987) @[Cat.scala 29:58] + node _T_2008 = not(CmdPtr0Dec) @[el2_lsu_bus_buffer.scala 430:62] + node _T_2009 = and(buf_age[0], _T_2008) @[el2_lsu_bus_buffer.scala 430:59] + node _T_2010 = orr(_T_2009) @[el2_lsu_bus_buffer.scala 430:76] + node _T_2011 = eq(_T_2010, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 430:45] + node _T_2012 = bits(CmdPtr0Dec, 0, 0) @[el2_lsu_bus_buffer.scala 430:94] + node _T_2013 = eq(_T_2012, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 430:83] + node _T_2014 = and(_T_2011, _T_2013) @[el2_lsu_bus_buffer.scala 430:81] + node _T_2015 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 430:113] + node _T_2016 = and(_T_2014, _T_2015) @[el2_lsu_bus_buffer.scala 430:98] + node _T_2017 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 430:125] + node _T_2018 = and(_T_2016, _T_2017) @[el2_lsu_bus_buffer.scala 430:123] + node _T_2019 = not(CmdPtr0Dec) @[el2_lsu_bus_buffer.scala 430:62] + node _T_2020 = and(buf_age[1], _T_2019) @[el2_lsu_bus_buffer.scala 430:59] + node _T_2021 = orr(_T_2020) @[el2_lsu_bus_buffer.scala 430:76] + node _T_2022 = eq(_T_2021, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 430:45] + node _T_2023 = bits(CmdPtr0Dec, 1, 1) @[el2_lsu_bus_buffer.scala 430:94] + node _T_2024 = eq(_T_2023, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 430:83] + node _T_2025 = and(_T_2022, _T_2024) @[el2_lsu_bus_buffer.scala 430:81] + node _T_2026 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 430:113] + node _T_2027 = and(_T_2025, _T_2026) @[el2_lsu_bus_buffer.scala 430:98] + node _T_2028 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 430:125] + node _T_2029 = and(_T_2027, _T_2028) @[el2_lsu_bus_buffer.scala 430:123] + node _T_2030 = not(CmdPtr0Dec) @[el2_lsu_bus_buffer.scala 430:62] + node _T_2031 = and(buf_age[2], _T_2030) @[el2_lsu_bus_buffer.scala 430:59] + node _T_2032 = orr(_T_2031) @[el2_lsu_bus_buffer.scala 430:76] + node _T_2033 = eq(_T_2032, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 430:45] + node _T_2034 = bits(CmdPtr0Dec, 2, 2) @[el2_lsu_bus_buffer.scala 430:94] + node _T_2035 = eq(_T_2034, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 430:83] + node _T_2036 = and(_T_2033, _T_2035) @[el2_lsu_bus_buffer.scala 430:81] + node _T_2037 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 430:113] + node _T_2038 = and(_T_2036, _T_2037) @[el2_lsu_bus_buffer.scala 430:98] + node _T_2039 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 430:125] + node _T_2040 = and(_T_2038, _T_2039) @[el2_lsu_bus_buffer.scala 430:123] + node _T_2041 = not(CmdPtr0Dec) @[el2_lsu_bus_buffer.scala 430:62] + node _T_2042 = and(buf_age[3], _T_2041) @[el2_lsu_bus_buffer.scala 430:59] + node _T_2043 = orr(_T_2042) @[el2_lsu_bus_buffer.scala 430:76] + node _T_2044 = eq(_T_2043, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 430:45] + node _T_2045 = bits(CmdPtr0Dec, 3, 3) @[el2_lsu_bus_buffer.scala 430:94] + node _T_2046 = eq(_T_2045, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 430:83] + node _T_2047 = and(_T_2044, _T_2046) @[el2_lsu_bus_buffer.scala 430:81] + node _T_2048 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 430:113] + node _T_2049 = and(_T_2047, _T_2048) @[el2_lsu_bus_buffer.scala 430:98] + node _T_2050 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 430:125] + node _T_2051 = and(_T_2049, _T_2050) @[el2_lsu_bus_buffer.scala 430:123] + node _T_2052 = cat(_T_2051, _T_2040) @[Cat.scala 29:58] + node _T_2053 = cat(_T_2052, _T_2029) @[Cat.scala 29:58] + node CmdPtr1Dec = cat(_T_2053, _T_2018) @[Cat.scala 29:58] + wire buf_rsp_pickage : UInt<4>[4] @[el2_lsu_bus_buffer.scala 431:29] + buf_rsp_pickage[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 432:19] + buf_rsp_pickage[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 432:19] + buf_rsp_pickage[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 432:19] + buf_rsp_pickage[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 432:19] + node _T_2054 = orr(buf_rsp_pickage[0]) @[el2_lsu_bus_buffer.scala 433:65] + node _T_2055 = eq(_T_2054, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 433:44] + node _T_2056 = eq(buf_state[0], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 433:85] + node _T_2057 = and(_T_2055, _T_2056) @[el2_lsu_bus_buffer.scala 433:70] + node _T_2058 = orr(buf_rsp_pickage[1]) @[el2_lsu_bus_buffer.scala 433:65] + node _T_2059 = eq(_T_2058, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 433:44] + node _T_2060 = eq(buf_state[1], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 433:85] + node _T_2061 = and(_T_2059, _T_2060) @[el2_lsu_bus_buffer.scala 433:70] + node _T_2062 = orr(buf_rsp_pickage[2]) @[el2_lsu_bus_buffer.scala 433:65] + node _T_2063 = eq(_T_2062, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 433:44] + node _T_2064 = eq(buf_state[2], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 433:85] + node _T_2065 = and(_T_2063, _T_2064) @[el2_lsu_bus_buffer.scala 433:70] + node _T_2066 = orr(buf_rsp_pickage[3]) @[el2_lsu_bus_buffer.scala 433:65] + node _T_2067 = eq(_T_2066, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 433:44] + node _T_2068 = eq(buf_state[3], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 433:85] + node _T_2069 = and(_T_2067, _T_2068) @[el2_lsu_bus_buffer.scala 433:70] + node _T_2070 = cat(_T_2069, _T_2065) @[Cat.scala 29:58] + node _T_2071 = cat(_T_2070, _T_2061) @[Cat.scala 29:58] + node RspPtrDec = cat(_T_2071, _T_2057) @[Cat.scala 29:58] + node _T_2072 = orr(CmdPtr0Dec) @[el2_lsu_bus_buffer.scala 434:31] + found_cmdptr0 <= _T_2072 @[el2_lsu_bus_buffer.scala 434:17] + node _T_2073 = orr(CmdPtr1Dec) @[el2_lsu_bus_buffer.scala 435:31] + found_cmdptr1 <= _T_2073 @[el2_lsu_bus_buffer.scala 435:17] + wire CmdPtr1 : UInt<2> + CmdPtr1 <= UInt<1>("h00") + wire RspPtr : UInt<2> + RspPtr <= UInt<1>("h00") + node _T_2074 = mux(UInt<1>("h00"), UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_2075 = cat(_T_2074, CmdPtr0Dec) @[Cat.scala 29:58] + node _T_2076 = bits(_T_2075, 4, 4) @[el2_lsu_bus_buffer.scala 437:39] + node _T_2077 = bits(_T_2075, 5, 5) @[el2_lsu_bus_buffer.scala 437:45] + node _T_2078 = or(_T_2076, _T_2077) @[el2_lsu_bus_buffer.scala 437:42] + node _T_2079 = bits(_T_2075, 6, 6) @[el2_lsu_bus_buffer.scala 437:51] + node _T_2080 = or(_T_2078, _T_2079) @[el2_lsu_bus_buffer.scala 437:48] + node _T_2081 = bits(_T_2075, 7, 7) @[el2_lsu_bus_buffer.scala 437:57] + node _T_2082 = or(_T_2080, _T_2081) @[el2_lsu_bus_buffer.scala 437:54] + node _T_2083 = bits(_T_2075, 2, 2) @[el2_lsu_bus_buffer.scala 437:64] + node _T_2084 = bits(_T_2075, 3, 3) @[el2_lsu_bus_buffer.scala 437:70] + node _T_2085 = or(_T_2083, _T_2084) @[el2_lsu_bus_buffer.scala 437:67] + node _T_2086 = bits(_T_2075, 6, 6) @[el2_lsu_bus_buffer.scala 437:76] + node _T_2087 = or(_T_2085, _T_2086) @[el2_lsu_bus_buffer.scala 437:73] + node _T_2088 = bits(_T_2075, 7, 7) @[el2_lsu_bus_buffer.scala 437:82] + node _T_2089 = or(_T_2087, _T_2088) @[el2_lsu_bus_buffer.scala 437:79] + node _T_2090 = bits(_T_2075, 1, 1) @[el2_lsu_bus_buffer.scala 437:89] + node _T_2091 = bits(_T_2075, 3, 3) @[el2_lsu_bus_buffer.scala 437:95] + node _T_2092 = or(_T_2090, _T_2091) @[el2_lsu_bus_buffer.scala 437:92] + node _T_2093 = bits(_T_2075, 5, 5) @[el2_lsu_bus_buffer.scala 437:101] + node _T_2094 = or(_T_2092, _T_2093) @[el2_lsu_bus_buffer.scala 437:98] + node _T_2095 = bits(_T_2075, 7, 7) @[el2_lsu_bus_buffer.scala 437:107] + node _T_2096 = or(_T_2094, _T_2095) @[el2_lsu_bus_buffer.scala 437:104] + node _T_2097 = cat(_T_2082, _T_2089) @[Cat.scala 29:58] + node _T_2098 = cat(_T_2097, _T_2096) @[Cat.scala 29:58] + CmdPtr0 <= _T_2098 @[el2_lsu_bus_buffer.scala 442:11] + node _T_2099 = mux(UInt<1>("h00"), UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_2100 = cat(_T_2099, CmdPtr1Dec) @[Cat.scala 29:58] + node _T_2101 = bits(_T_2100, 4, 4) @[el2_lsu_bus_buffer.scala 437:39] + node _T_2102 = bits(_T_2100, 5, 5) @[el2_lsu_bus_buffer.scala 437:45] + node _T_2103 = or(_T_2101, _T_2102) @[el2_lsu_bus_buffer.scala 437:42] + node _T_2104 = bits(_T_2100, 6, 6) @[el2_lsu_bus_buffer.scala 437:51] + node _T_2105 = or(_T_2103, _T_2104) @[el2_lsu_bus_buffer.scala 437:48] + node _T_2106 = bits(_T_2100, 7, 7) @[el2_lsu_bus_buffer.scala 437:57] + node _T_2107 = or(_T_2105, _T_2106) @[el2_lsu_bus_buffer.scala 437:54] + node _T_2108 = bits(_T_2100, 2, 2) @[el2_lsu_bus_buffer.scala 437:64] + node _T_2109 = bits(_T_2100, 3, 3) @[el2_lsu_bus_buffer.scala 437:70] + node _T_2110 = or(_T_2108, _T_2109) @[el2_lsu_bus_buffer.scala 437:67] + node _T_2111 = bits(_T_2100, 6, 6) @[el2_lsu_bus_buffer.scala 437:76] + node _T_2112 = or(_T_2110, _T_2111) @[el2_lsu_bus_buffer.scala 437:73] + node _T_2113 = bits(_T_2100, 7, 7) @[el2_lsu_bus_buffer.scala 437:82] + node _T_2114 = or(_T_2112, _T_2113) @[el2_lsu_bus_buffer.scala 437:79] + node _T_2115 = bits(_T_2100, 1, 1) @[el2_lsu_bus_buffer.scala 437:89] + node _T_2116 = bits(_T_2100, 3, 3) @[el2_lsu_bus_buffer.scala 437:95] + node _T_2117 = or(_T_2115, _T_2116) @[el2_lsu_bus_buffer.scala 437:92] + node _T_2118 = bits(_T_2100, 5, 5) @[el2_lsu_bus_buffer.scala 437:101] + node _T_2119 = or(_T_2117, _T_2118) @[el2_lsu_bus_buffer.scala 437:98] + node _T_2120 = bits(_T_2100, 7, 7) @[el2_lsu_bus_buffer.scala 437:107] + node _T_2121 = or(_T_2119, _T_2120) @[el2_lsu_bus_buffer.scala 437:104] + node _T_2122 = cat(_T_2107, _T_2114) @[Cat.scala 29:58] + node _T_2123 = cat(_T_2122, _T_2121) @[Cat.scala 29:58] + CmdPtr1 <= _T_2123 @[el2_lsu_bus_buffer.scala 444:11] + node _T_2124 = mux(UInt<1>("h00"), UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_2125 = cat(_T_2124, RspPtrDec) @[Cat.scala 29:58] + node _T_2126 = bits(_T_2125, 4, 4) @[el2_lsu_bus_buffer.scala 437:39] + node _T_2127 = bits(_T_2125, 5, 5) @[el2_lsu_bus_buffer.scala 437:45] + node _T_2128 = or(_T_2126, _T_2127) @[el2_lsu_bus_buffer.scala 437:42] + node _T_2129 = bits(_T_2125, 6, 6) @[el2_lsu_bus_buffer.scala 437:51] + node _T_2130 = or(_T_2128, _T_2129) @[el2_lsu_bus_buffer.scala 437:48] + node _T_2131 = bits(_T_2125, 7, 7) @[el2_lsu_bus_buffer.scala 437:57] + node _T_2132 = or(_T_2130, _T_2131) @[el2_lsu_bus_buffer.scala 437:54] + node _T_2133 = bits(_T_2125, 2, 2) @[el2_lsu_bus_buffer.scala 437:64] + node _T_2134 = bits(_T_2125, 3, 3) @[el2_lsu_bus_buffer.scala 437:70] + node _T_2135 = or(_T_2133, _T_2134) @[el2_lsu_bus_buffer.scala 437:67] + node _T_2136 = bits(_T_2125, 6, 6) @[el2_lsu_bus_buffer.scala 437:76] + node _T_2137 = or(_T_2135, _T_2136) @[el2_lsu_bus_buffer.scala 437:73] + node _T_2138 = bits(_T_2125, 7, 7) @[el2_lsu_bus_buffer.scala 437:82] + node _T_2139 = or(_T_2137, _T_2138) @[el2_lsu_bus_buffer.scala 437:79] + node _T_2140 = bits(_T_2125, 1, 1) @[el2_lsu_bus_buffer.scala 437:89] + node _T_2141 = bits(_T_2125, 3, 3) @[el2_lsu_bus_buffer.scala 437:95] + node _T_2142 = or(_T_2140, _T_2141) @[el2_lsu_bus_buffer.scala 437:92] + node _T_2143 = bits(_T_2125, 5, 5) @[el2_lsu_bus_buffer.scala 437:101] + node _T_2144 = or(_T_2142, _T_2143) @[el2_lsu_bus_buffer.scala 437:98] + node _T_2145 = bits(_T_2125, 7, 7) @[el2_lsu_bus_buffer.scala 437:107] + node _T_2146 = or(_T_2144, _T_2145) @[el2_lsu_bus_buffer.scala 437:104] + node _T_2147 = cat(_T_2132, _T_2139) @[Cat.scala 29:58] + node _T_2148 = cat(_T_2147, _T_2146) @[Cat.scala 29:58] + RspPtr <= _T_2148 @[el2_lsu_bus_buffer.scala 445:10] + wire buf_state_en : UInt<1>[4] @[el2_lsu_bus_buffer.scala 446:26] + buf_state_en[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 447:16] + buf_state_en[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 447:16] + buf_state_en[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 447:16] + buf_state_en[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 447:16] + wire buf_rspageQ : UInt<4>[4] @[el2_lsu_bus_buffer.scala 448:25] + buf_rspageQ[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 449:15] + buf_rspageQ[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 449:15] + buf_rspageQ[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 449:15] + buf_rspageQ[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 449:15] + wire buf_rspage_set : UInt<4>[4] @[el2_lsu_bus_buffer.scala 450:28] + buf_rspage_set[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 451:18] + buf_rspage_set[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 451:18] + buf_rspage_set[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 451:18] + buf_rspage_set[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 451:18] + wire buf_rspage_in : UInt<4>[4] @[el2_lsu_bus_buffer.scala 452:27] + buf_rspage_in[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 453:17] + buf_rspage_in[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 453:17] + buf_rspage_in[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 453:17] + buf_rspage_in[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 453:17] + wire buf_rspage : UInt<4>[4] @[el2_lsu_bus_buffer.scala 454:24] + buf_rspage[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 455:14] + buf_rspage[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 455:14] + buf_rspage[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 455:14] + buf_rspage[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 455:14] + node _T_2149 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 457:83] + node _T_2150 = and(_T_2149, buf_state_en[0]) @[el2_lsu_bus_buffer.scala 457:94] + node _T_2151 = eq(buf_state[0], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 458:20] + node _T_2152 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 458:47] + node _T_2153 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 458:59] + node _T_2154 = and(_T_2152, _T_2153) @[el2_lsu_bus_buffer.scala 458:57] + node _T_2155 = or(_T_2151, _T_2154) @[el2_lsu_bus_buffer.scala 458:31] + node _T_2156 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 459:23] + node _T_2157 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 459:53] + node _T_2158 = and(_T_2156, _T_2157) @[el2_lsu_bus_buffer.scala 459:41] + node _T_2159 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 459:83] + node _T_2160 = and(_T_2158, _T_2159) @[el2_lsu_bus_buffer.scala 459:71] + node _T_2161 = eq(ibuf_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 459:104] + node _T_2162 = and(_T_2160, _T_2161) @[el2_lsu_bus_buffer.scala 459:92] + node _T_2163 = or(_T_2155, _T_2162) @[el2_lsu_bus_buffer.scala 458:86] + node _T_2164 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 460:17] + node _T_2165 = and(_T_2164, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 460:35] + node _T_2166 = eq(WrPtr1_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 460:64] + node _T_2167 = and(_T_2165, _T_2166) @[el2_lsu_bus_buffer.scala 460:52] + node _T_2168 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 460:85] + node _T_2169 = and(_T_2167, _T_2168) @[el2_lsu_bus_buffer.scala 460:73] + node _T_2170 = or(_T_2163, _T_2169) @[el2_lsu_bus_buffer.scala 459:114] + node _T_2171 = and(_T_2150, _T_2170) @[el2_lsu_bus_buffer.scala 457:113] + node _T_2172 = bits(buf_age[0], 0, 0) @[el2_lsu_bus_buffer.scala 460:109] + node _T_2173 = or(_T_2171, _T_2172) @[el2_lsu_bus_buffer.scala 460:97] + node _T_2174 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 457:83] + node _T_2175 = and(_T_2174, buf_state_en[0]) @[el2_lsu_bus_buffer.scala 457:94] + node _T_2176 = eq(buf_state[1], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 458:20] + node _T_2177 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 458:47] + node _T_2178 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 458:59] + node _T_2179 = and(_T_2177, _T_2178) @[el2_lsu_bus_buffer.scala 458:57] + node _T_2180 = or(_T_2176, _T_2179) @[el2_lsu_bus_buffer.scala 458:31] + node _T_2181 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 459:23] + node _T_2182 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 459:53] + node _T_2183 = and(_T_2181, _T_2182) @[el2_lsu_bus_buffer.scala 459:41] + node _T_2184 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 459:83] + node _T_2185 = and(_T_2183, _T_2184) @[el2_lsu_bus_buffer.scala 459:71] + node _T_2186 = eq(ibuf_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 459:104] + node _T_2187 = and(_T_2185, _T_2186) @[el2_lsu_bus_buffer.scala 459:92] + node _T_2188 = or(_T_2180, _T_2187) @[el2_lsu_bus_buffer.scala 458:86] + node _T_2189 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 460:17] + node _T_2190 = and(_T_2189, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 460:35] + node _T_2191 = eq(WrPtr1_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 460:64] + node _T_2192 = and(_T_2190, _T_2191) @[el2_lsu_bus_buffer.scala 460:52] + node _T_2193 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 460:85] + node _T_2194 = and(_T_2192, _T_2193) @[el2_lsu_bus_buffer.scala 460:73] + node _T_2195 = or(_T_2188, _T_2194) @[el2_lsu_bus_buffer.scala 459:114] + node _T_2196 = and(_T_2175, _T_2195) @[el2_lsu_bus_buffer.scala 457:113] + node _T_2197 = bits(buf_age[0], 1, 1) @[el2_lsu_bus_buffer.scala 460:109] + node _T_2198 = or(_T_2196, _T_2197) @[el2_lsu_bus_buffer.scala 460:97] + node _T_2199 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 457:83] + node _T_2200 = and(_T_2199, buf_state_en[0]) @[el2_lsu_bus_buffer.scala 457:94] + node _T_2201 = eq(buf_state[2], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 458:20] + node _T_2202 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 458:47] + node _T_2203 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 458:59] + node _T_2204 = and(_T_2202, _T_2203) @[el2_lsu_bus_buffer.scala 458:57] + node _T_2205 = or(_T_2201, _T_2204) @[el2_lsu_bus_buffer.scala 458:31] + node _T_2206 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 459:23] + node _T_2207 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 459:53] + node _T_2208 = and(_T_2206, _T_2207) @[el2_lsu_bus_buffer.scala 459:41] + node _T_2209 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 459:83] + node _T_2210 = and(_T_2208, _T_2209) @[el2_lsu_bus_buffer.scala 459:71] + node _T_2211 = eq(ibuf_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 459:104] + node _T_2212 = and(_T_2210, _T_2211) @[el2_lsu_bus_buffer.scala 459:92] + node _T_2213 = or(_T_2205, _T_2212) @[el2_lsu_bus_buffer.scala 458:86] + node _T_2214 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 460:17] + node _T_2215 = and(_T_2214, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 460:35] + node _T_2216 = eq(WrPtr1_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 460:64] + node _T_2217 = and(_T_2215, _T_2216) @[el2_lsu_bus_buffer.scala 460:52] + node _T_2218 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 460:85] + node _T_2219 = and(_T_2217, _T_2218) @[el2_lsu_bus_buffer.scala 460:73] + node _T_2220 = or(_T_2213, _T_2219) @[el2_lsu_bus_buffer.scala 459:114] + node _T_2221 = and(_T_2200, _T_2220) @[el2_lsu_bus_buffer.scala 457:113] + node _T_2222 = bits(buf_age[0], 2, 2) @[el2_lsu_bus_buffer.scala 460:109] + node _T_2223 = or(_T_2221, _T_2222) @[el2_lsu_bus_buffer.scala 460:97] + node _T_2224 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 457:83] + node _T_2225 = and(_T_2224, buf_state_en[0]) @[el2_lsu_bus_buffer.scala 457:94] + node _T_2226 = eq(buf_state[3], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 458:20] + node _T_2227 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 458:47] + node _T_2228 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 458:59] + node _T_2229 = and(_T_2227, _T_2228) @[el2_lsu_bus_buffer.scala 458:57] + node _T_2230 = or(_T_2226, _T_2229) @[el2_lsu_bus_buffer.scala 458:31] + node _T_2231 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 459:23] + node _T_2232 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 459:53] + node _T_2233 = and(_T_2231, _T_2232) @[el2_lsu_bus_buffer.scala 459:41] + node _T_2234 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 459:83] + node _T_2235 = and(_T_2233, _T_2234) @[el2_lsu_bus_buffer.scala 459:71] + node _T_2236 = eq(ibuf_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 459:104] + node _T_2237 = and(_T_2235, _T_2236) @[el2_lsu_bus_buffer.scala 459:92] + node _T_2238 = or(_T_2230, _T_2237) @[el2_lsu_bus_buffer.scala 458:86] + node _T_2239 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 460:17] + node _T_2240 = and(_T_2239, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 460:35] + node _T_2241 = eq(WrPtr1_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 460:64] + node _T_2242 = and(_T_2240, _T_2241) @[el2_lsu_bus_buffer.scala 460:52] + node _T_2243 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 460:85] + node _T_2244 = and(_T_2242, _T_2243) @[el2_lsu_bus_buffer.scala 460:73] + node _T_2245 = or(_T_2238, _T_2244) @[el2_lsu_bus_buffer.scala 459:114] + node _T_2246 = and(_T_2225, _T_2245) @[el2_lsu_bus_buffer.scala 457:113] + node _T_2247 = bits(buf_age[0], 3, 3) @[el2_lsu_bus_buffer.scala 460:109] + node _T_2248 = or(_T_2246, _T_2247) @[el2_lsu_bus_buffer.scala 460:97] + node _T_2249 = cat(_T_2248, _T_2223) @[Cat.scala 29:58] + node _T_2250 = cat(_T_2249, _T_2198) @[Cat.scala 29:58] + node buf_age_in_0 = cat(_T_2250, _T_2173) @[Cat.scala 29:58] + node _T_2251 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 457:83] + node _T_2252 = and(_T_2251, buf_state_en[1]) @[el2_lsu_bus_buffer.scala 457:94] + node _T_2253 = eq(buf_state[0], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 458:20] + node _T_2254 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 458:47] + node _T_2255 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 458:59] + node _T_2256 = and(_T_2254, _T_2255) @[el2_lsu_bus_buffer.scala 458:57] + node _T_2257 = or(_T_2253, _T_2256) @[el2_lsu_bus_buffer.scala 458:31] + node _T_2258 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 459:23] + node _T_2259 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 459:53] + node _T_2260 = and(_T_2258, _T_2259) @[el2_lsu_bus_buffer.scala 459:41] + node _T_2261 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 459:83] + node _T_2262 = and(_T_2260, _T_2261) @[el2_lsu_bus_buffer.scala 459:71] + node _T_2263 = eq(ibuf_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 459:104] + node _T_2264 = and(_T_2262, _T_2263) @[el2_lsu_bus_buffer.scala 459:92] + node _T_2265 = or(_T_2257, _T_2264) @[el2_lsu_bus_buffer.scala 458:86] + node _T_2266 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 460:17] + node _T_2267 = and(_T_2266, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 460:35] + node _T_2268 = eq(WrPtr1_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 460:64] + node _T_2269 = and(_T_2267, _T_2268) @[el2_lsu_bus_buffer.scala 460:52] + node _T_2270 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 460:85] + node _T_2271 = and(_T_2269, _T_2270) @[el2_lsu_bus_buffer.scala 460:73] + node _T_2272 = or(_T_2265, _T_2271) @[el2_lsu_bus_buffer.scala 459:114] + node _T_2273 = and(_T_2252, _T_2272) @[el2_lsu_bus_buffer.scala 457:113] + node _T_2274 = bits(buf_age[1], 0, 0) @[el2_lsu_bus_buffer.scala 460:109] + node _T_2275 = or(_T_2273, _T_2274) @[el2_lsu_bus_buffer.scala 460:97] + node _T_2276 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 457:83] + node _T_2277 = and(_T_2276, buf_state_en[1]) @[el2_lsu_bus_buffer.scala 457:94] + node _T_2278 = eq(buf_state[1], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 458:20] + node _T_2279 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 458:47] + node _T_2280 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 458:59] + node _T_2281 = and(_T_2279, _T_2280) @[el2_lsu_bus_buffer.scala 458:57] + node _T_2282 = or(_T_2278, _T_2281) @[el2_lsu_bus_buffer.scala 458:31] + node _T_2283 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 459:23] + node _T_2284 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 459:53] + node _T_2285 = and(_T_2283, _T_2284) @[el2_lsu_bus_buffer.scala 459:41] + node _T_2286 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 459:83] + node _T_2287 = and(_T_2285, _T_2286) @[el2_lsu_bus_buffer.scala 459:71] + node _T_2288 = eq(ibuf_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 459:104] + node _T_2289 = and(_T_2287, _T_2288) @[el2_lsu_bus_buffer.scala 459:92] + node _T_2290 = or(_T_2282, _T_2289) @[el2_lsu_bus_buffer.scala 458:86] + node _T_2291 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 460:17] + node _T_2292 = and(_T_2291, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 460:35] + node _T_2293 = eq(WrPtr1_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 460:64] + node _T_2294 = and(_T_2292, _T_2293) @[el2_lsu_bus_buffer.scala 460:52] + node _T_2295 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 460:85] + node _T_2296 = and(_T_2294, _T_2295) @[el2_lsu_bus_buffer.scala 460:73] + node _T_2297 = or(_T_2290, _T_2296) @[el2_lsu_bus_buffer.scala 459:114] + node _T_2298 = and(_T_2277, _T_2297) @[el2_lsu_bus_buffer.scala 457:113] + node _T_2299 = bits(buf_age[1], 1, 1) @[el2_lsu_bus_buffer.scala 460:109] + node _T_2300 = or(_T_2298, _T_2299) @[el2_lsu_bus_buffer.scala 460:97] + node _T_2301 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 457:83] + node _T_2302 = and(_T_2301, buf_state_en[1]) @[el2_lsu_bus_buffer.scala 457:94] + node _T_2303 = eq(buf_state[2], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 458:20] + node _T_2304 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 458:47] + node _T_2305 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 458:59] + node _T_2306 = and(_T_2304, _T_2305) @[el2_lsu_bus_buffer.scala 458:57] + node _T_2307 = or(_T_2303, _T_2306) @[el2_lsu_bus_buffer.scala 458:31] + node _T_2308 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 459:23] + node _T_2309 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 459:53] + node _T_2310 = and(_T_2308, _T_2309) @[el2_lsu_bus_buffer.scala 459:41] + node _T_2311 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 459:83] + node _T_2312 = and(_T_2310, _T_2311) @[el2_lsu_bus_buffer.scala 459:71] + node _T_2313 = eq(ibuf_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 459:104] + node _T_2314 = and(_T_2312, _T_2313) @[el2_lsu_bus_buffer.scala 459:92] + node _T_2315 = or(_T_2307, _T_2314) @[el2_lsu_bus_buffer.scala 458:86] + node _T_2316 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 460:17] + node _T_2317 = and(_T_2316, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 460:35] + node _T_2318 = eq(WrPtr1_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 460:64] + node _T_2319 = and(_T_2317, _T_2318) @[el2_lsu_bus_buffer.scala 460:52] + node _T_2320 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 460:85] + node _T_2321 = and(_T_2319, _T_2320) @[el2_lsu_bus_buffer.scala 460:73] + node _T_2322 = or(_T_2315, _T_2321) @[el2_lsu_bus_buffer.scala 459:114] + node _T_2323 = and(_T_2302, _T_2322) @[el2_lsu_bus_buffer.scala 457:113] + node _T_2324 = bits(buf_age[1], 2, 2) @[el2_lsu_bus_buffer.scala 460:109] + node _T_2325 = or(_T_2323, _T_2324) @[el2_lsu_bus_buffer.scala 460:97] + node _T_2326 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 457:83] + node _T_2327 = and(_T_2326, buf_state_en[1]) @[el2_lsu_bus_buffer.scala 457:94] + node _T_2328 = eq(buf_state[3], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 458:20] + node _T_2329 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 458:47] + node _T_2330 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 458:59] + node _T_2331 = and(_T_2329, _T_2330) @[el2_lsu_bus_buffer.scala 458:57] + node _T_2332 = or(_T_2328, _T_2331) @[el2_lsu_bus_buffer.scala 458:31] + node _T_2333 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 459:23] + node _T_2334 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 459:53] + node _T_2335 = and(_T_2333, _T_2334) @[el2_lsu_bus_buffer.scala 459:41] + node _T_2336 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 459:83] + node _T_2337 = and(_T_2335, _T_2336) @[el2_lsu_bus_buffer.scala 459:71] + node _T_2338 = eq(ibuf_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 459:104] + node _T_2339 = and(_T_2337, _T_2338) @[el2_lsu_bus_buffer.scala 459:92] + node _T_2340 = or(_T_2332, _T_2339) @[el2_lsu_bus_buffer.scala 458:86] + node _T_2341 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 460:17] + node _T_2342 = and(_T_2341, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 460:35] + node _T_2343 = eq(WrPtr1_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 460:64] + node _T_2344 = and(_T_2342, _T_2343) @[el2_lsu_bus_buffer.scala 460:52] + node _T_2345 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 460:85] + node _T_2346 = and(_T_2344, _T_2345) @[el2_lsu_bus_buffer.scala 460:73] + node _T_2347 = or(_T_2340, _T_2346) @[el2_lsu_bus_buffer.scala 459:114] + node _T_2348 = and(_T_2327, _T_2347) @[el2_lsu_bus_buffer.scala 457:113] + node _T_2349 = bits(buf_age[1], 3, 3) @[el2_lsu_bus_buffer.scala 460:109] + node _T_2350 = or(_T_2348, _T_2349) @[el2_lsu_bus_buffer.scala 460:97] + node _T_2351 = cat(_T_2350, _T_2325) @[Cat.scala 29:58] + node _T_2352 = cat(_T_2351, _T_2300) @[Cat.scala 29:58] + node buf_age_in_1 = cat(_T_2352, _T_2275) @[Cat.scala 29:58] + node _T_2353 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 457:83] + node _T_2354 = and(_T_2353, buf_state_en[2]) @[el2_lsu_bus_buffer.scala 457:94] + node _T_2355 = eq(buf_state[0], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 458:20] + node _T_2356 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 458:47] + node _T_2357 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 458:59] + node _T_2358 = and(_T_2356, _T_2357) @[el2_lsu_bus_buffer.scala 458:57] + node _T_2359 = or(_T_2355, _T_2358) @[el2_lsu_bus_buffer.scala 458:31] + node _T_2360 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 459:23] + node _T_2361 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 459:53] + node _T_2362 = and(_T_2360, _T_2361) @[el2_lsu_bus_buffer.scala 459:41] + node _T_2363 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 459:83] + node _T_2364 = and(_T_2362, _T_2363) @[el2_lsu_bus_buffer.scala 459:71] + node _T_2365 = eq(ibuf_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 459:104] + node _T_2366 = and(_T_2364, _T_2365) @[el2_lsu_bus_buffer.scala 459:92] + node _T_2367 = or(_T_2359, _T_2366) @[el2_lsu_bus_buffer.scala 458:86] + node _T_2368 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 460:17] + node _T_2369 = and(_T_2368, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 460:35] + node _T_2370 = eq(WrPtr1_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 460:64] + node _T_2371 = and(_T_2369, _T_2370) @[el2_lsu_bus_buffer.scala 460:52] + node _T_2372 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 460:85] + node _T_2373 = and(_T_2371, _T_2372) @[el2_lsu_bus_buffer.scala 460:73] + node _T_2374 = or(_T_2367, _T_2373) @[el2_lsu_bus_buffer.scala 459:114] + node _T_2375 = and(_T_2354, _T_2374) @[el2_lsu_bus_buffer.scala 457:113] + node _T_2376 = bits(buf_age[2], 0, 0) @[el2_lsu_bus_buffer.scala 460:109] + node _T_2377 = or(_T_2375, _T_2376) @[el2_lsu_bus_buffer.scala 460:97] + node _T_2378 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 457:83] + node _T_2379 = and(_T_2378, buf_state_en[2]) @[el2_lsu_bus_buffer.scala 457:94] + node _T_2380 = eq(buf_state[1], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 458:20] + node _T_2381 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 458:47] + node _T_2382 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 458:59] + node _T_2383 = and(_T_2381, _T_2382) @[el2_lsu_bus_buffer.scala 458:57] + node _T_2384 = or(_T_2380, _T_2383) @[el2_lsu_bus_buffer.scala 458:31] + node _T_2385 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 459:23] + node _T_2386 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 459:53] + node _T_2387 = and(_T_2385, _T_2386) @[el2_lsu_bus_buffer.scala 459:41] + node _T_2388 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 459:83] + node _T_2389 = and(_T_2387, _T_2388) @[el2_lsu_bus_buffer.scala 459:71] + node _T_2390 = eq(ibuf_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 459:104] + node _T_2391 = and(_T_2389, _T_2390) @[el2_lsu_bus_buffer.scala 459:92] + node _T_2392 = or(_T_2384, _T_2391) @[el2_lsu_bus_buffer.scala 458:86] + node _T_2393 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 460:17] + node _T_2394 = and(_T_2393, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 460:35] + node _T_2395 = eq(WrPtr1_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 460:64] + node _T_2396 = and(_T_2394, _T_2395) @[el2_lsu_bus_buffer.scala 460:52] + node _T_2397 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 460:85] + node _T_2398 = and(_T_2396, _T_2397) @[el2_lsu_bus_buffer.scala 460:73] + node _T_2399 = or(_T_2392, _T_2398) @[el2_lsu_bus_buffer.scala 459:114] + node _T_2400 = and(_T_2379, _T_2399) @[el2_lsu_bus_buffer.scala 457:113] + node _T_2401 = bits(buf_age[2], 1, 1) @[el2_lsu_bus_buffer.scala 460:109] + node _T_2402 = or(_T_2400, _T_2401) @[el2_lsu_bus_buffer.scala 460:97] + node _T_2403 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 457:83] + node _T_2404 = and(_T_2403, buf_state_en[2]) @[el2_lsu_bus_buffer.scala 457:94] + node _T_2405 = eq(buf_state[2], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 458:20] + node _T_2406 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 458:47] + node _T_2407 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 458:59] + node _T_2408 = and(_T_2406, _T_2407) @[el2_lsu_bus_buffer.scala 458:57] + node _T_2409 = or(_T_2405, _T_2408) @[el2_lsu_bus_buffer.scala 458:31] + node _T_2410 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 459:23] + node _T_2411 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 459:53] + node _T_2412 = and(_T_2410, _T_2411) @[el2_lsu_bus_buffer.scala 459:41] + node _T_2413 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 459:83] + node _T_2414 = and(_T_2412, _T_2413) @[el2_lsu_bus_buffer.scala 459:71] + node _T_2415 = eq(ibuf_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 459:104] + node _T_2416 = and(_T_2414, _T_2415) @[el2_lsu_bus_buffer.scala 459:92] + node _T_2417 = or(_T_2409, _T_2416) @[el2_lsu_bus_buffer.scala 458:86] + node _T_2418 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 460:17] + node _T_2419 = and(_T_2418, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 460:35] + node _T_2420 = eq(WrPtr1_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 460:64] + node _T_2421 = and(_T_2419, _T_2420) @[el2_lsu_bus_buffer.scala 460:52] + node _T_2422 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 460:85] + node _T_2423 = and(_T_2421, _T_2422) @[el2_lsu_bus_buffer.scala 460:73] + node _T_2424 = or(_T_2417, _T_2423) @[el2_lsu_bus_buffer.scala 459:114] + node _T_2425 = and(_T_2404, _T_2424) @[el2_lsu_bus_buffer.scala 457:113] + node _T_2426 = bits(buf_age[2], 2, 2) @[el2_lsu_bus_buffer.scala 460:109] + node _T_2427 = or(_T_2425, _T_2426) @[el2_lsu_bus_buffer.scala 460:97] + node _T_2428 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 457:83] + node _T_2429 = and(_T_2428, buf_state_en[2]) @[el2_lsu_bus_buffer.scala 457:94] + node _T_2430 = eq(buf_state[3], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 458:20] + node _T_2431 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 458:47] + node _T_2432 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 458:59] + node _T_2433 = and(_T_2431, _T_2432) @[el2_lsu_bus_buffer.scala 458:57] + node _T_2434 = or(_T_2430, _T_2433) @[el2_lsu_bus_buffer.scala 458:31] + node _T_2435 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 459:23] + node _T_2436 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 459:53] + node _T_2437 = and(_T_2435, _T_2436) @[el2_lsu_bus_buffer.scala 459:41] + node _T_2438 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 459:83] + node _T_2439 = and(_T_2437, _T_2438) @[el2_lsu_bus_buffer.scala 459:71] + node _T_2440 = eq(ibuf_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 459:104] + node _T_2441 = and(_T_2439, _T_2440) @[el2_lsu_bus_buffer.scala 459:92] + node _T_2442 = or(_T_2434, _T_2441) @[el2_lsu_bus_buffer.scala 458:86] + node _T_2443 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 460:17] + node _T_2444 = and(_T_2443, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 460:35] + node _T_2445 = eq(WrPtr1_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 460:64] + node _T_2446 = and(_T_2444, _T_2445) @[el2_lsu_bus_buffer.scala 460:52] + node _T_2447 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 460:85] + node _T_2448 = and(_T_2446, _T_2447) @[el2_lsu_bus_buffer.scala 460:73] + node _T_2449 = or(_T_2442, _T_2448) @[el2_lsu_bus_buffer.scala 459:114] + node _T_2450 = and(_T_2429, _T_2449) @[el2_lsu_bus_buffer.scala 457:113] + node _T_2451 = bits(buf_age[2], 3, 3) @[el2_lsu_bus_buffer.scala 460:109] + node _T_2452 = or(_T_2450, _T_2451) @[el2_lsu_bus_buffer.scala 460:97] + node _T_2453 = cat(_T_2452, _T_2427) @[Cat.scala 29:58] + node _T_2454 = cat(_T_2453, _T_2402) @[Cat.scala 29:58] + node buf_age_in_2 = cat(_T_2454, _T_2377) @[Cat.scala 29:58] + node _T_2455 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 457:83] + node _T_2456 = and(_T_2455, buf_state_en[3]) @[el2_lsu_bus_buffer.scala 457:94] + node _T_2457 = eq(buf_state[0], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 458:20] + node _T_2458 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 458:47] + node _T_2459 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 458:59] + node _T_2460 = and(_T_2458, _T_2459) @[el2_lsu_bus_buffer.scala 458:57] + node _T_2461 = or(_T_2457, _T_2460) @[el2_lsu_bus_buffer.scala 458:31] + node _T_2462 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 459:23] + node _T_2463 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 459:53] + node _T_2464 = and(_T_2462, _T_2463) @[el2_lsu_bus_buffer.scala 459:41] + node _T_2465 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 459:83] + node _T_2466 = and(_T_2464, _T_2465) @[el2_lsu_bus_buffer.scala 459:71] + node _T_2467 = eq(ibuf_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 459:104] + node _T_2468 = and(_T_2466, _T_2467) @[el2_lsu_bus_buffer.scala 459:92] + node _T_2469 = or(_T_2461, _T_2468) @[el2_lsu_bus_buffer.scala 458:86] + node _T_2470 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 460:17] + node _T_2471 = and(_T_2470, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 460:35] + node _T_2472 = eq(WrPtr1_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 460:64] + node _T_2473 = and(_T_2471, _T_2472) @[el2_lsu_bus_buffer.scala 460:52] + node _T_2474 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 460:85] + node _T_2475 = and(_T_2473, _T_2474) @[el2_lsu_bus_buffer.scala 460:73] + node _T_2476 = or(_T_2469, _T_2475) @[el2_lsu_bus_buffer.scala 459:114] + node _T_2477 = and(_T_2456, _T_2476) @[el2_lsu_bus_buffer.scala 457:113] + node _T_2478 = bits(buf_age[3], 0, 0) @[el2_lsu_bus_buffer.scala 460:109] + node _T_2479 = or(_T_2477, _T_2478) @[el2_lsu_bus_buffer.scala 460:97] + node _T_2480 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 457:83] + node _T_2481 = and(_T_2480, buf_state_en[3]) @[el2_lsu_bus_buffer.scala 457:94] + node _T_2482 = eq(buf_state[1], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 458:20] + node _T_2483 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 458:47] + node _T_2484 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 458:59] + node _T_2485 = and(_T_2483, _T_2484) @[el2_lsu_bus_buffer.scala 458:57] + node _T_2486 = or(_T_2482, _T_2485) @[el2_lsu_bus_buffer.scala 458:31] + node _T_2487 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 459:23] + node _T_2488 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 459:53] + node _T_2489 = and(_T_2487, _T_2488) @[el2_lsu_bus_buffer.scala 459:41] + node _T_2490 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 459:83] + node _T_2491 = and(_T_2489, _T_2490) @[el2_lsu_bus_buffer.scala 459:71] + node _T_2492 = eq(ibuf_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 459:104] + node _T_2493 = and(_T_2491, _T_2492) @[el2_lsu_bus_buffer.scala 459:92] + node _T_2494 = or(_T_2486, _T_2493) @[el2_lsu_bus_buffer.scala 458:86] + node _T_2495 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 460:17] + node _T_2496 = and(_T_2495, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 460:35] + node _T_2497 = eq(WrPtr1_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 460:64] + node _T_2498 = and(_T_2496, _T_2497) @[el2_lsu_bus_buffer.scala 460:52] + node _T_2499 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 460:85] + node _T_2500 = and(_T_2498, _T_2499) @[el2_lsu_bus_buffer.scala 460:73] + node _T_2501 = or(_T_2494, _T_2500) @[el2_lsu_bus_buffer.scala 459:114] + node _T_2502 = and(_T_2481, _T_2501) @[el2_lsu_bus_buffer.scala 457:113] + node _T_2503 = bits(buf_age[3], 1, 1) @[el2_lsu_bus_buffer.scala 460:109] + node _T_2504 = or(_T_2502, _T_2503) @[el2_lsu_bus_buffer.scala 460:97] + node _T_2505 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 457:83] + node _T_2506 = and(_T_2505, buf_state_en[3]) @[el2_lsu_bus_buffer.scala 457:94] + node _T_2507 = eq(buf_state[2], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 458:20] + node _T_2508 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 458:47] + node _T_2509 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 458:59] + node _T_2510 = and(_T_2508, _T_2509) @[el2_lsu_bus_buffer.scala 458:57] + node _T_2511 = or(_T_2507, _T_2510) @[el2_lsu_bus_buffer.scala 458:31] + node _T_2512 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 459:23] + node _T_2513 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 459:53] + node _T_2514 = and(_T_2512, _T_2513) @[el2_lsu_bus_buffer.scala 459:41] + node _T_2515 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 459:83] + node _T_2516 = and(_T_2514, _T_2515) @[el2_lsu_bus_buffer.scala 459:71] + node _T_2517 = eq(ibuf_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 459:104] + node _T_2518 = and(_T_2516, _T_2517) @[el2_lsu_bus_buffer.scala 459:92] + node _T_2519 = or(_T_2511, _T_2518) @[el2_lsu_bus_buffer.scala 458:86] + node _T_2520 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 460:17] + node _T_2521 = and(_T_2520, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 460:35] + node _T_2522 = eq(WrPtr1_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 460:64] + node _T_2523 = and(_T_2521, _T_2522) @[el2_lsu_bus_buffer.scala 460:52] + node _T_2524 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 460:85] + node _T_2525 = and(_T_2523, _T_2524) @[el2_lsu_bus_buffer.scala 460:73] + node _T_2526 = or(_T_2519, _T_2525) @[el2_lsu_bus_buffer.scala 459:114] + node _T_2527 = and(_T_2506, _T_2526) @[el2_lsu_bus_buffer.scala 457:113] + node _T_2528 = bits(buf_age[3], 2, 2) @[el2_lsu_bus_buffer.scala 460:109] + node _T_2529 = or(_T_2527, _T_2528) @[el2_lsu_bus_buffer.scala 460:97] + node _T_2530 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 457:83] + node _T_2531 = and(_T_2530, buf_state_en[3]) @[el2_lsu_bus_buffer.scala 457:94] + node _T_2532 = eq(buf_state[3], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 458:20] + node _T_2533 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 458:47] + node _T_2534 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 458:59] + node _T_2535 = and(_T_2533, _T_2534) @[el2_lsu_bus_buffer.scala 458:57] + node _T_2536 = or(_T_2532, _T_2535) @[el2_lsu_bus_buffer.scala 458:31] + node _T_2537 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 459:23] + node _T_2538 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 459:53] + node _T_2539 = and(_T_2537, _T_2538) @[el2_lsu_bus_buffer.scala 459:41] + node _T_2540 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 459:83] + node _T_2541 = and(_T_2539, _T_2540) @[el2_lsu_bus_buffer.scala 459:71] + node _T_2542 = eq(ibuf_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 459:104] + node _T_2543 = and(_T_2541, _T_2542) @[el2_lsu_bus_buffer.scala 459:92] + node _T_2544 = or(_T_2536, _T_2543) @[el2_lsu_bus_buffer.scala 458:86] + node _T_2545 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 460:17] + node _T_2546 = and(_T_2545, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 460:35] + node _T_2547 = eq(WrPtr1_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 460:64] + node _T_2548 = and(_T_2546, _T_2547) @[el2_lsu_bus_buffer.scala 460:52] + node _T_2549 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 460:85] + node _T_2550 = and(_T_2548, _T_2549) @[el2_lsu_bus_buffer.scala 460:73] + node _T_2551 = or(_T_2544, _T_2550) @[el2_lsu_bus_buffer.scala 459:114] + node _T_2552 = and(_T_2531, _T_2551) @[el2_lsu_bus_buffer.scala 457:113] + node _T_2553 = bits(buf_age[3], 3, 3) @[el2_lsu_bus_buffer.scala 460:109] + node _T_2554 = or(_T_2552, _T_2553) @[el2_lsu_bus_buffer.scala 460:97] + node _T_2555 = cat(_T_2554, _T_2529) @[Cat.scala 29:58] + node _T_2556 = cat(_T_2555, _T_2504) @[Cat.scala 29:58] + node buf_age_in_3 = cat(_T_2556, _T_2479) @[Cat.scala 29:58] + wire buf_ageQ : UInt<4>[4] @[el2_lsu_bus_buffer.scala 461:22] + buf_ageQ[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 462:12] + buf_ageQ[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 462:12] + buf_ageQ[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 462:12] + buf_ageQ[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 462:12] + node _T_2557 = bits(buf_ageQ[0], 0, 0) @[el2_lsu_bus_buffer.scala 463:74] + node _T_2558 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 463:95] + node _T_2559 = and(_T_2558, buf_cmd_state_bus_en[0]) @[el2_lsu_bus_buffer.scala 463:105] + node _T_2560 = eq(_T_2559, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 463:80] + node _T_2561 = and(_T_2557, _T_2560) @[el2_lsu_bus_buffer.scala 463:78] + node _T_2562 = bits(buf_ageQ[0], 1, 1) @[el2_lsu_bus_buffer.scala 463:74] + node _T_2563 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 463:95] + node _T_2564 = and(_T_2563, buf_cmd_state_bus_en[1]) @[el2_lsu_bus_buffer.scala 463:105] + node _T_2565 = eq(_T_2564, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 463:80] + node _T_2566 = and(_T_2562, _T_2565) @[el2_lsu_bus_buffer.scala 463:78] + node _T_2567 = bits(buf_ageQ[0], 2, 2) @[el2_lsu_bus_buffer.scala 463:74] + node _T_2568 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 463:95] + node _T_2569 = and(_T_2568, buf_cmd_state_bus_en[2]) @[el2_lsu_bus_buffer.scala 463:105] + node _T_2570 = eq(_T_2569, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 463:80] + node _T_2571 = and(_T_2567, _T_2570) @[el2_lsu_bus_buffer.scala 463:78] + node _T_2572 = bits(buf_ageQ[0], 3, 3) @[el2_lsu_bus_buffer.scala 463:74] + node _T_2573 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 463:95] + node _T_2574 = and(_T_2573, buf_cmd_state_bus_en[3]) @[el2_lsu_bus_buffer.scala 463:105] + node _T_2575 = eq(_T_2574, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 463:80] + node _T_2576 = and(_T_2572, _T_2575) @[el2_lsu_bus_buffer.scala 463:78] + node _T_2577 = cat(_T_2576, _T_2571) @[Cat.scala 29:58] + node _T_2578 = cat(_T_2577, _T_2566) @[Cat.scala 29:58] + node _T_2579 = cat(_T_2578, _T_2561) @[Cat.scala 29:58] + node _T_2580 = bits(buf_ageQ[1], 0, 0) @[el2_lsu_bus_buffer.scala 463:74] + node _T_2581 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 463:95] + node _T_2582 = and(_T_2581, buf_cmd_state_bus_en[0]) @[el2_lsu_bus_buffer.scala 463:105] + node _T_2583 = eq(_T_2582, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 463:80] + node _T_2584 = and(_T_2580, _T_2583) @[el2_lsu_bus_buffer.scala 463:78] + node _T_2585 = bits(buf_ageQ[1], 1, 1) @[el2_lsu_bus_buffer.scala 463:74] + node _T_2586 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 463:95] + node _T_2587 = and(_T_2586, buf_cmd_state_bus_en[1]) @[el2_lsu_bus_buffer.scala 463:105] + node _T_2588 = eq(_T_2587, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 463:80] + node _T_2589 = and(_T_2585, _T_2588) @[el2_lsu_bus_buffer.scala 463:78] + node _T_2590 = bits(buf_ageQ[1], 2, 2) @[el2_lsu_bus_buffer.scala 463:74] + node _T_2591 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 463:95] + node _T_2592 = and(_T_2591, buf_cmd_state_bus_en[2]) @[el2_lsu_bus_buffer.scala 463:105] + node _T_2593 = eq(_T_2592, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 463:80] + node _T_2594 = and(_T_2590, _T_2593) @[el2_lsu_bus_buffer.scala 463:78] + node _T_2595 = bits(buf_ageQ[1], 3, 3) @[el2_lsu_bus_buffer.scala 463:74] + node _T_2596 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 463:95] + node _T_2597 = and(_T_2596, buf_cmd_state_bus_en[3]) @[el2_lsu_bus_buffer.scala 463:105] + node _T_2598 = eq(_T_2597, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 463:80] + node _T_2599 = and(_T_2595, _T_2598) @[el2_lsu_bus_buffer.scala 463:78] + node _T_2600 = cat(_T_2599, _T_2594) @[Cat.scala 29:58] + node _T_2601 = cat(_T_2600, _T_2589) @[Cat.scala 29:58] + node _T_2602 = cat(_T_2601, _T_2584) @[Cat.scala 29:58] + node _T_2603 = bits(buf_ageQ[2], 0, 0) @[el2_lsu_bus_buffer.scala 463:74] + node _T_2604 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 463:95] + node _T_2605 = and(_T_2604, buf_cmd_state_bus_en[0]) @[el2_lsu_bus_buffer.scala 463:105] + node _T_2606 = eq(_T_2605, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 463:80] + node _T_2607 = and(_T_2603, _T_2606) @[el2_lsu_bus_buffer.scala 463:78] + node _T_2608 = bits(buf_ageQ[2], 1, 1) @[el2_lsu_bus_buffer.scala 463:74] + node _T_2609 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 463:95] + node _T_2610 = and(_T_2609, buf_cmd_state_bus_en[1]) @[el2_lsu_bus_buffer.scala 463:105] + node _T_2611 = eq(_T_2610, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 463:80] + node _T_2612 = and(_T_2608, _T_2611) @[el2_lsu_bus_buffer.scala 463:78] + node _T_2613 = bits(buf_ageQ[2], 2, 2) @[el2_lsu_bus_buffer.scala 463:74] + node _T_2614 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 463:95] + node _T_2615 = and(_T_2614, buf_cmd_state_bus_en[2]) @[el2_lsu_bus_buffer.scala 463:105] + node _T_2616 = eq(_T_2615, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 463:80] + node _T_2617 = and(_T_2613, _T_2616) @[el2_lsu_bus_buffer.scala 463:78] + node _T_2618 = bits(buf_ageQ[2], 3, 3) @[el2_lsu_bus_buffer.scala 463:74] + node _T_2619 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 463:95] + node _T_2620 = and(_T_2619, buf_cmd_state_bus_en[3]) @[el2_lsu_bus_buffer.scala 463:105] + node _T_2621 = eq(_T_2620, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 463:80] + node _T_2622 = and(_T_2618, _T_2621) @[el2_lsu_bus_buffer.scala 463:78] + node _T_2623 = cat(_T_2622, _T_2617) @[Cat.scala 29:58] + node _T_2624 = cat(_T_2623, _T_2612) @[Cat.scala 29:58] + node _T_2625 = cat(_T_2624, _T_2607) @[Cat.scala 29:58] + node _T_2626 = bits(buf_ageQ[3], 0, 0) @[el2_lsu_bus_buffer.scala 463:74] + node _T_2627 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 463:95] + node _T_2628 = and(_T_2627, buf_cmd_state_bus_en[0]) @[el2_lsu_bus_buffer.scala 463:105] + node _T_2629 = eq(_T_2628, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 463:80] + node _T_2630 = and(_T_2626, _T_2629) @[el2_lsu_bus_buffer.scala 463:78] + node _T_2631 = bits(buf_ageQ[3], 1, 1) @[el2_lsu_bus_buffer.scala 463:74] + node _T_2632 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 463:95] + node _T_2633 = and(_T_2632, buf_cmd_state_bus_en[1]) @[el2_lsu_bus_buffer.scala 463:105] + node _T_2634 = eq(_T_2633, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 463:80] + node _T_2635 = and(_T_2631, _T_2634) @[el2_lsu_bus_buffer.scala 463:78] + node _T_2636 = bits(buf_ageQ[3], 2, 2) @[el2_lsu_bus_buffer.scala 463:74] + node _T_2637 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 463:95] + node _T_2638 = and(_T_2637, buf_cmd_state_bus_en[2]) @[el2_lsu_bus_buffer.scala 463:105] + node _T_2639 = eq(_T_2638, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 463:80] + node _T_2640 = and(_T_2636, _T_2639) @[el2_lsu_bus_buffer.scala 463:78] + node _T_2641 = bits(buf_ageQ[3], 3, 3) @[el2_lsu_bus_buffer.scala 463:74] + node _T_2642 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 463:95] + node _T_2643 = and(_T_2642, buf_cmd_state_bus_en[3]) @[el2_lsu_bus_buffer.scala 463:105] + node _T_2644 = eq(_T_2643, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 463:80] + node _T_2645 = and(_T_2641, _T_2644) @[el2_lsu_bus_buffer.scala 463:78] + node _T_2646 = cat(_T_2645, _T_2640) @[Cat.scala 29:58] + node _T_2647 = cat(_T_2646, _T_2635) @[Cat.scala 29:58] + node _T_2648 = cat(_T_2647, _T_2630) @[Cat.scala 29:58] + buf_age[0] <= _T_2579 @[el2_lsu_bus_buffer.scala 463:13] + buf_age[1] <= _T_2602 @[el2_lsu_bus_buffer.scala 463:13] + buf_age[2] <= _T_2625 @[el2_lsu_bus_buffer.scala 463:13] + buf_age[3] <= _T_2648 @[el2_lsu_bus_buffer.scala 463:13] + node _T_2649 = eq(UInt<1>("h00"), UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 464:78] + node _T_2650 = bits(buf_age[0], 0, 0) @[el2_lsu_bus_buffer.scala 464:102] + node _T_2651 = eq(_T_2650, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 464:91] + node _T_2652 = neq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 464:121] + node _T_2653 = and(_T_2651, _T_2652) @[el2_lsu_bus_buffer.scala 464:106] + node _T_2654 = mux(_T_2649, UInt<1>("h00"), _T_2653) @[el2_lsu_bus_buffer.scala 464:74] + node _T_2655 = eq(UInt<1>("h00"), UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 464:78] + node _T_2656 = bits(buf_age[0], 1, 1) @[el2_lsu_bus_buffer.scala 464:102] + node _T_2657 = eq(_T_2656, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 464:91] + node _T_2658 = neq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 464:121] + node _T_2659 = and(_T_2657, _T_2658) @[el2_lsu_bus_buffer.scala 464:106] + node _T_2660 = mux(_T_2655, UInt<1>("h00"), _T_2659) @[el2_lsu_bus_buffer.scala 464:74] + node _T_2661 = eq(UInt<1>("h00"), UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 464:78] + node _T_2662 = bits(buf_age[0], 2, 2) @[el2_lsu_bus_buffer.scala 464:102] + node _T_2663 = eq(_T_2662, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 464:91] + node _T_2664 = neq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 464:121] + node _T_2665 = and(_T_2663, _T_2664) @[el2_lsu_bus_buffer.scala 464:106] + node _T_2666 = mux(_T_2661, UInt<1>("h00"), _T_2665) @[el2_lsu_bus_buffer.scala 464:74] + node _T_2667 = eq(UInt<1>("h00"), UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 464:78] + node _T_2668 = bits(buf_age[0], 3, 3) @[el2_lsu_bus_buffer.scala 464:102] + node _T_2669 = eq(_T_2668, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 464:91] + node _T_2670 = neq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 464:121] + node _T_2671 = and(_T_2669, _T_2670) @[el2_lsu_bus_buffer.scala 464:106] + node _T_2672 = mux(_T_2667, UInt<1>("h00"), _T_2671) @[el2_lsu_bus_buffer.scala 464:74] + node _T_2673 = cat(_T_2672, _T_2666) @[Cat.scala 29:58] + node _T_2674 = cat(_T_2673, _T_2660) @[Cat.scala 29:58] + node _T_2675 = cat(_T_2674, _T_2654) @[Cat.scala 29:58] + node _T_2676 = eq(UInt<1>("h01"), UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 464:78] + node _T_2677 = bits(buf_age[1], 0, 0) @[el2_lsu_bus_buffer.scala 464:102] + node _T_2678 = eq(_T_2677, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 464:91] + node _T_2679 = neq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 464:121] + node _T_2680 = and(_T_2678, _T_2679) @[el2_lsu_bus_buffer.scala 464:106] + node _T_2681 = mux(_T_2676, UInt<1>("h00"), _T_2680) @[el2_lsu_bus_buffer.scala 464:74] + node _T_2682 = eq(UInt<1>("h01"), UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 464:78] + node _T_2683 = bits(buf_age[1], 1, 1) @[el2_lsu_bus_buffer.scala 464:102] + node _T_2684 = eq(_T_2683, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 464:91] + node _T_2685 = neq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 464:121] + node _T_2686 = and(_T_2684, _T_2685) @[el2_lsu_bus_buffer.scala 464:106] + node _T_2687 = mux(_T_2682, UInt<1>("h00"), _T_2686) @[el2_lsu_bus_buffer.scala 464:74] + node _T_2688 = eq(UInt<1>("h01"), UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 464:78] + node _T_2689 = bits(buf_age[1], 2, 2) @[el2_lsu_bus_buffer.scala 464:102] + node _T_2690 = eq(_T_2689, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 464:91] + node _T_2691 = neq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 464:121] + node _T_2692 = and(_T_2690, _T_2691) @[el2_lsu_bus_buffer.scala 464:106] + node _T_2693 = mux(_T_2688, UInt<1>("h00"), _T_2692) @[el2_lsu_bus_buffer.scala 464:74] + node _T_2694 = eq(UInt<1>("h01"), UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 464:78] + node _T_2695 = bits(buf_age[1], 3, 3) @[el2_lsu_bus_buffer.scala 464:102] + node _T_2696 = eq(_T_2695, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 464:91] + node _T_2697 = neq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 464:121] + node _T_2698 = and(_T_2696, _T_2697) @[el2_lsu_bus_buffer.scala 464:106] + node _T_2699 = mux(_T_2694, UInt<1>("h00"), _T_2698) @[el2_lsu_bus_buffer.scala 464:74] + node _T_2700 = cat(_T_2699, _T_2693) @[Cat.scala 29:58] + node _T_2701 = cat(_T_2700, _T_2687) @[Cat.scala 29:58] + node _T_2702 = cat(_T_2701, _T_2681) @[Cat.scala 29:58] + node _T_2703 = eq(UInt<2>("h02"), UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 464:78] + node _T_2704 = bits(buf_age[2], 0, 0) @[el2_lsu_bus_buffer.scala 464:102] + node _T_2705 = eq(_T_2704, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 464:91] + node _T_2706 = neq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 464:121] + node _T_2707 = and(_T_2705, _T_2706) @[el2_lsu_bus_buffer.scala 464:106] + node _T_2708 = mux(_T_2703, UInt<1>("h00"), _T_2707) @[el2_lsu_bus_buffer.scala 464:74] + node _T_2709 = eq(UInt<2>("h02"), UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 464:78] + node _T_2710 = bits(buf_age[2], 1, 1) @[el2_lsu_bus_buffer.scala 464:102] + node _T_2711 = eq(_T_2710, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 464:91] + node _T_2712 = neq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 464:121] + node _T_2713 = and(_T_2711, _T_2712) @[el2_lsu_bus_buffer.scala 464:106] + node _T_2714 = mux(_T_2709, UInt<1>("h00"), _T_2713) @[el2_lsu_bus_buffer.scala 464:74] + node _T_2715 = eq(UInt<2>("h02"), UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 464:78] + node _T_2716 = bits(buf_age[2], 2, 2) @[el2_lsu_bus_buffer.scala 464:102] + node _T_2717 = eq(_T_2716, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 464:91] + node _T_2718 = neq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 464:121] + node _T_2719 = and(_T_2717, _T_2718) @[el2_lsu_bus_buffer.scala 464:106] + node _T_2720 = mux(_T_2715, UInt<1>("h00"), _T_2719) @[el2_lsu_bus_buffer.scala 464:74] + node _T_2721 = eq(UInt<2>("h02"), UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 464:78] + node _T_2722 = bits(buf_age[2], 3, 3) @[el2_lsu_bus_buffer.scala 464:102] + node _T_2723 = eq(_T_2722, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 464:91] + node _T_2724 = neq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 464:121] + node _T_2725 = and(_T_2723, _T_2724) @[el2_lsu_bus_buffer.scala 464:106] + node _T_2726 = mux(_T_2721, UInt<1>("h00"), _T_2725) @[el2_lsu_bus_buffer.scala 464:74] + node _T_2727 = cat(_T_2726, _T_2720) @[Cat.scala 29:58] + node _T_2728 = cat(_T_2727, _T_2714) @[Cat.scala 29:58] + node _T_2729 = cat(_T_2728, _T_2708) @[Cat.scala 29:58] + node _T_2730 = eq(UInt<2>("h03"), UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 464:78] + node _T_2731 = bits(buf_age[3], 0, 0) @[el2_lsu_bus_buffer.scala 464:102] + node _T_2732 = eq(_T_2731, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 464:91] + node _T_2733 = neq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 464:121] + node _T_2734 = and(_T_2732, _T_2733) @[el2_lsu_bus_buffer.scala 464:106] + node _T_2735 = mux(_T_2730, UInt<1>("h00"), _T_2734) @[el2_lsu_bus_buffer.scala 464:74] + node _T_2736 = eq(UInt<2>("h03"), UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 464:78] + node _T_2737 = bits(buf_age[3], 1, 1) @[el2_lsu_bus_buffer.scala 464:102] + node _T_2738 = eq(_T_2737, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 464:91] + node _T_2739 = neq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 464:121] + node _T_2740 = and(_T_2738, _T_2739) @[el2_lsu_bus_buffer.scala 464:106] + node _T_2741 = mux(_T_2736, UInt<1>("h00"), _T_2740) @[el2_lsu_bus_buffer.scala 464:74] + node _T_2742 = eq(UInt<2>("h03"), UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 464:78] + node _T_2743 = bits(buf_age[3], 2, 2) @[el2_lsu_bus_buffer.scala 464:102] + node _T_2744 = eq(_T_2743, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 464:91] + node _T_2745 = neq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 464:121] + node _T_2746 = and(_T_2744, _T_2745) @[el2_lsu_bus_buffer.scala 464:106] + node _T_2747 = mux(_T_2742, UInt<1>("h00"), _T_2746) @[el2_lsu_bus_buffer.scala 464:74] + node _T_2748 = eq(UInt<2>("h03"), UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 464:78] + node _T_2749 = bits(buf_age[3], 3, 3) @[el2_lsu_bus_buffer.scala 464:102] + node _T_2750 = eq(_T_2749, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 464:91] + node _T_2751 = neq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 464:121] + node _T_2752 = and(_T_2750, _T_2751) @[el2_lsu_bus_buffer.scala 464:106] + node _T_2753 = mux(_T_2748, UInt<1>("h00"), _T_2752) @[el2_lsu_bus_buffer.scala 464:74] + node _T_2754 = cat(_T_2753, _T_2747) @[Cat.scala 29:58] + node _T_2755 = cat(_T_2754, _T_2741) @[Cat.scala 29:58] + node _T_2756 = cat(_T_2755, _T_2735) @[Cat.scala 29:58] + buf_age_younger[0] <= _T_2675 @[el2_lsu_bus_buffer.scala 464:21] + buf_age_younger[1] <= _T_2702 @[el2_lsu_bus_buffer.scala 464:21] + buf_age_younger[2] <= _T_2729 @[el2_lsu_bus_buffer.scala 464:21] + buf_age_younger[3] <= _T_2756 @[el2_lsu_bus_buffer.scala 464:21] + node _T_2757 = bits(buf_rspageQ[0], 0, 0) @[el2_lsu_bus_buffer.scala 465:85] + node _T_2758 = eq(buf_state[0], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 465:104] + node _T_2759 = and(_T_2757, _T_2758) @[el2_lsu_bus_buffer.scala 465:89] + node _T_2760 = bits(buf_rspageQ[0], 1, 1) @[el2_lsu_bus_buffer.scala 465:85] + node _T_2761 = eq(buf_state[1], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 465:104] + node _T_2762 = and(_T_2760, _T_2761) @[el2_lsu_bus_buffer.scala 465:89] + node _T_2763 = bits(buf_rspageQ[0], 2, 2) @[el2_lsu_bus_buffer.scala 465:85] + node _T_2764 = eq(buf_state[2], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 465:104] + node _T_2765 = and(_T_2763, _T_2764) @[el2_lsu_bus_buffer.scala 465:89] + node _T_2766 = bits(buf_rspageQ[0], 3, 3) @[el2_lsu_bus_buffer.scala 465:85] + node _T_2767 = eq(buf_state[3], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 465:104] + node _T_2768 = and(_T_2766, _T_2767) @[el2_lsu_bus_buffer.scala 465:89] + node _T_2769 = cat(_T_2768, _T_2765) @[Cat.scala 29:58] + node _T_2770 = cat(_T_2769, _T_2762) @[Cat.scala 29:58] + node _T_2771 = cat(_T_2770, _T_2759) @[Cat.scala 29:58] + node _T_2772 = bits(buf_rspageQ[1], 0, 0) @[el2_lsu_bus_buffer.scala 465:85] + node _T_2773 = eq(buf_state[0], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 465:104] + node _T_2774 = and(_T_2772, _T_2773) @[el2_lsu_bus_buffer.scala 465:89] + node _T_2775 = bits(buf_rspageQ[1], 1, 1) @[el2_lsu_bus_buffer.scala 465:85] + node _T_2776 = eq(buf_state[1], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 465:104] + node _T_2777 = and(_T_2775, _T_2776) @[el2_lsu_bus_buffer.scala 465:89] + node _T_2778 = bits(buf_rspageQ[1], 2, 2) @[el2_lsu_bus_buffer.scala 465:85] + node _T_2779 = eq(buf_state[2], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 465:104] + node _T_2780 = and(_T_2778, _T_2779) @[el2_lsu_bus_buffer.scala 465:89] + node _T_2781 = bits(buf_rspageQ[1], 3, 3) @[el2_lsu_bus_buffer.scala 465:85] + node _T_2782 = eq(buf_state[3], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 465:104] + node _T_2783 = and(_T_2781, _T_2782) @[el2_lsu_bus_buffer.scala 465:89] + node _T_2784 = cat(_T_2783, _T_2780) @[Cat.scala 29:58] + node _T_2785 = cat(_T_2784, _T_2777) @[Cat.scala 29:58] + node _T_2786 = cat(_T_2785, _T_2774) @[Cat.scala 29:58] + node _T_2787 = bits(buf_rspageQ[2], 0, 0) @[el2_lsu_bus_buffer.scala 465:85] + node _T_2788 = eq(buf_state[0], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 465:104] + node _T_2789 = and(_T_2787, _T_2788) @[el2_lsu_bus_buffer.scala 465:89] + node _T_2790 = bits(buf_rspageQ[2], 1, 1) @[el2_lsu_bus_buffer.scala 465:85] + node _T_2791 = eq(buf_state[1], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 465:104] + node _T_2792 = and(_T_2790, _T_2791) @[el2_lsu_bus_buffer.scala 465:89] + node _T_2793 = bits(buf_rspageQ[2], 2, 2) @[el2_lsu_bus_buffer.scala 465:85] + node _T_2794 = eq(buf_state[2], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 465:104] + node _T_2795 = and(_T_2793, _T_2794) @[el2_lsu_bus_buffer.scala 465:89] + node _T_2796 = bits(buf_rspageQ[2], 3, 3) @[el2_lsu_bus_buffer.scala 465:85] + node _T_2797 = eq(buf_state[3], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 465:104] + node _T_2798 = and(_T_2796, _T_2797) @[el2_lsu_bus_buffer.scala 465:89] + node _T_2799 = cat(_T_2798, _T_2795) @[Cat.scala 29:58] + node _T_2800 = cat(_T_2799, _T_2792) @[Cat.scala 29:58] + node _T_2801 = cat(_T_2800, _T_2789) @[Cat.scala 29:58] + node _T_2802 = bits(buf_rspageQ[3], 0, 0) @[el2_lsu_bus_buffer.scala 465:85] + node _T_2803 = eq(buf_state[0], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 465:104] + node _T_2804 = and(_T_2802, _T_2803) @[el2_lsu_bus_buffer.scala 465:89] + node _T_2805 = bits(buf_rspageQ[3], 1, 1) @[el2_lsu_bus_buffer.scala 465:85] + node _T_2806 = eq(buf_state[1], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 465:104] + node _T_2807 = and(_T_2805, _T_2806) @[el2_lsu_bus_buffer.scala 465:89] + node _T_2808 = bits(buf_rspageQ[3], 2, 2) @[el2_lsu_bus_buffer.scala 465:85] + node _T_2809 = eq(buf_state[2], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 465:104] + node _T_2810 = and(_T_2808, _T_2809) @[el2_lsu_bus_buffer.scala 465:89] + node _T_2811 = bits(buf_rspageQ[3], 3, 3) @[el2_lsu_bus_buffer.scala 465:85] + node _T_2812 = eq(buf_state[3], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 465:104] + node _T_2813 = and(_T_2811, _T_2812) @[el2_lsu_bus_buffer.scala 465:89] + node _T_2814 = cat(_T_2813, _T_2810) @[Cat.scala 29:58] + node _T_2815 = cat(_T_2814, _T_2807) @[Cat.scala 29:58] + node _T_2816 = cat(_T_2815, _T_2804) @[Cat.scala 29:58] + buf_rsp_pickage[0] <= _T_2771 @[el2_lsu_bus_buffer.scala 465:21] + buf_rsp_pickage[1] <= _T_2786 @[el2_lsu_bus_buffer.scala 465:21] + buf_rsp_pickage[2] <= _T_2801 @[el2_lsu_bus_buffer.scala 465:21] + buf_rsp_pickage[3] <= _T_2816 @[el2_lsu_bus_buffer.scala 465:21] + node _T_2817 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 467:84] + node _T_2818 = and(_T_2817, buf_state_en[0]) @[el2_lsu_bus_buffer.scala 467:95] + node _T_2819 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 468:23] + node _T_2820 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 468:49] + node _T_2821 = or(_T_2819, _T_2820) @[el2_lsu_bus_buffer.scala 468:34] + node _T_2822 = eq(_T_2821, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 468:8] + node _T_2823 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 469:25] + node _T_2824 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 469:55] + node _T_2825 = and(_T_2823, _T_2824) @[el2_lsu_bus_buffer.scala 469:43] + node _T_2826 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 469:84] + node _T_2827 = and(_T_2825, _T_2826) @[el2_lsu_bus_buffer.scala 469:73] + node _T_2828 = eq(ibuf_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 469:103] + node _T_2829 = and(_T_2827, _T_2828) @[el2_lsu_bus_buffer.scala 469:92] + node _T_2830 = or(_T_2822, _T_2829) @[el2_lsu_bus_buffer.scala 468:61] + node _T_2831 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 470:19] + node _T_2832 = and(_T_2831, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 470:37] + node _T_2833 = eq(WrPtr1_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 470:65] + node _T_2834 = and(_T_2832, _T_2833) @[el2_lsu_bus_buffer.scala 470:54] + node _T_2835 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 470:84] + node _T_2836 = and(_T_2834, _T_2835) @[el2_lsu_bus_buffer.scala 470:73] + node _T_2837 = or(_T_2830, _T_2836) @[el2_lsu_bus_buffer.scala 469:112] + node _T_2838 = and(_T_2818, _T_2837) @[el2_lsu_bus_buffer.scala 467:114] + node _T_2839 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 467:84] + node _T_2840 = and(_T_2839, buf_state_en[0]) @[el2_lsu_bus_buffer.scala 467:95] + node _T_2841 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 468:23] + node _T_2842 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 468:49] + node _T_2843 = or(_T_2841, _T_2842) @[el2_lsu_bus_buffer.scala 468:34] + node _T_2844 = eq(_T_2843, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 468:8] + node _T_2845 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 469:25] + node _T_2846 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 469:55] + node _T_2847 = and(_T_2845, _T_2846) @[el2_lsu_bus_buffer.scala 469:43] + node _T_2848 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 469:84] + node _T_2849 = and(_T_2847, _T_2848) @[el2_lsu_bus_buffer.scala 469:73] + node _T_2850 = eq(ibuf_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 469:103] + node _T_2851 = and(_T_2849, _T_2850) @[el2_lsu_bus_buffer.scala 469:92] + node _T_2852 = or(_T_2844, _T_2851) @[el2_lsu_bus_buffer.scala 468:61] + node _T_2853 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 470:19] + node _T_2854 = and(_T_2853, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 470:37] + node _T_2855 = eq(WrPtr1_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 470:65] + node _T_2856 = and(_T_2854, _T_2855) @[el2_lsu_bus_buffer.scala 470:54] + node _T_2857 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 470:84] + node _T_2858 = and(_T_2856, _T_2857) @[el2_lsu_bus_buffer.scala 470:73] + node _T_2859 = or(_T_2852, _T_2858) @[el2_lsu_bus_buffer.scala 469:112] + node _T_2860 = and(_T_2840, _T_2859) @[el2_lsu_bus_buffer.scala 467:114] + node _T_2861 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 467:84] + node _T_2862 = and(_T_2861, buf_state_en[0]) @[el2_lsu_bus_buffer.scala 467:95] + node _T_2863 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 468:23] + node _T_2864 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 468:49] + node _T_2865 = or(_T_2863, _T_2864) @[el2_lsu_bus_buffer.scala 468:34] + node _T_2866 = eq(_T_2865, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 468:8] + node _T_2867 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 469:25] + node _T_2868 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 469:55] + node _T_2869 = and(_T_2867, _T_2868) @[el2_lsu_bus_buffer.scala 469:43] + node _T_2870 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 469:84] + node _T_2871 = and(_T_2869, _T_2870) @[el2_lsu_bus_buffer.scala 469:73] + node _T_2872 = eq(ibuf_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 469:103] + node _T_2873 = and(_T_2871, _T_2872) @[el2_lsu_bus_buffer.scala 469:92] + node _T_2874 = or(_T_2866, _T_2873) @[el2_lsu_bus_buffer.scala 468:61] + node _T_2875 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 470:19] + node _T_2876 = and(_T_2875, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 470:37] + node _T_2877 = eq(WrPtr1_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 470:65] + node _T_2878 = and(_T_2876, _T_2877) @[el2_lsu_bus_buffer.scala 470:54] + node _T_2879 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 470:84] + node _T_2880 = and(_T_2878, _T_2879) @[el2_lsu_bus_buffer.scala 470:73] + node _T_2881 = or(_T_2874, _T_2880) @[el2_lsu_bus_buffer.scala 469:112] + node _T_2882 = and(_T_2862, _T_2881) @[el2_lsu_bus_buffer.scala 467:114] + node _T_2883 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 467:84] + node _T_2884 = and(_T_2883, buf_state_en[0]) @[el2_lsu_bus_buffer.scala 467:95] + node _T_2885 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 468:23] + node _T_2886 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 468:49] + node _T_2887 = or(_T_2885, _T_2886) @[el2_lsu_bus_buffer.scala 468:34] + node _T_2888 = eq(_T_2887, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 468:8] + node _T_2889 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 469:25] + node _T_2890 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 469:55] + node _T_2891 = and(_T_2889, _T_2890) @[el2_lsu_bus_buffer.scala 469:43] + node _T_2892 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 469:84] + node _T_2893 = and(_T_2891, _T_2892) @[el2_lsu_bus_buffer.scala 469:73] + node _T_2894 = eq(ibuf_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 469:103] + node _T_2895 = and(_T_2893, _T_2894) @[el2_lsu_bus_buffer.scala 469:92] + node _T_2896 = or(_T_2888, _T_2895) @[el2_lsu_bus_buffer.scala 468:61] + node _T_2897 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 470:19] + node _T_2898 = and(_T_2897, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 470:37] + node _T_2899 = eq(WrPtr1_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 470:65] + node _T_2900 = and(_T_2898, _T_2899) @[el2_lsu_bus_buffer.scala 470:54] + node _T_2901 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 470:84] + node _T_2902 = and(_T_2900, _T_2901) @[el2_lsu_bus_buffer.scala 470:73] + node _T_2903 = or(_T_2896, _T_2902) @[el2_lsu_bus_buffer.scala 469:112] + node _T_2904 = and(_T_2884, _T_2903) @[el2_lsu_bus_buffer.scala 467:114] + node _T_2905 = cat(_T_2904, _T_2882) @[Cat.scala 29:58] + node _T_2906 = cat(_T_2905, _T_2860) @[Cat.scala 29:58] + node _T_2907 = cat(_T_2906, _T_2838) @[Cat.scala 29:58] + node _T_2908 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 467:84] + node _T_2909 = and(_T_2908, buf_state_en[1]) @[el2_lsu_bus_buffer.scala 467:95] + node _T_2910 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 468:23] + node _T_2911 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 468:49] + node _T_2912 = or(_T_2910, _T_2911) @[el2_lsu_bus_buffer.scala 468:34] + node _T_2913 = eq(_T_2912, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 468:8] + node _T_2914 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 469:25] + node _T_2915 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 469:55] + node _T_2916 = and(_T_2914, _T_2915) @[el2_lsu_bus_buffer.scala 469:43] + node _T_2917 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 469:84] + node _T_2918 = and(_T_2916, _T_2917) @[el2_lsu_bus_buffer.scala 469:73] + node _T_2919 = eq(ibuf_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 469:103] + node _T_2920 = and(_T_2918, _T_2919) @[el2_lsu_bus_buffer.scala 469:92] + node _T_2921 = or(_T_2913, _T_2920) @[el2_lsu_bus_buffer.scala 468:61] + node _T_2922 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 470:19] + node _T_2923 = and(_T_2922, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 470:37] + node _T_2924 = eq(WrPtr1_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 470:65] + node _T_2925 = and(_T_2923, _T_2924) @[el2_lsu_bus_buffer.scala 470:54] + node _T_2926 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 470:84] + node _T_2927 = and(_T_2925, _T_2926) @[el2_lsu_bus_buffer.scala 470:73] + node _T_2928 = or(_T_2921, _T_2927) @[el2_lsu_bus_buffer.scala 469:112] + node _T_2929 = and(_T_2909, _T_2928) @[el2_lsu_bus_buffer.scala 467:114] + node _T_2930 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 467:84] + node _T_2931 = and(_T_2930, buf_state_en[1]) @[el2_lsu_bus_buffer.scala 467:95] + node _T_2932 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 468:23] + node _T_2933 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 468:49] + node _T_2934 = or(_T_2932, _T_2933) @[el2_lsu_bus_buffer.scala 468:34] + node _T_2935 = eq(_T_2934, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 468:8] + node _T_2936 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 469:25] + node _T_2937 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 469:55] + node _T_2938 = and(_T_2936, _T_2937) @[el2_lsu_bus_buffer.scala 469:43] + node _T_2939 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 469:84] + node _T_2940 = and(_T_2938, _T_2939) @[el2_lsu_bus_buffer.scala 469:73] + node _T_2941 = eq(ibuf_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 469:103] + node _T_2942 = and(_T_2940, _T_2941) @[el2_lsu_bus_buffer.scala 469:92] + node _T_2943 = or(_T_2935, _T_2942) @[el2_lsu_bus_buffer.scala 468:61] + node _T_2944 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 470:19] + node _T_2945 = and(_T_2944, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 470:37] + node _T_2946 = eq(WrPtr1_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 470:65] + node _T_2947 = and(_T_2945, _T_2946) @[el2_lsu_bus_buffer.scala 470:54] + node _T_2948 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 470:84] + node _T_2949 = and(_T_2947, _T_2948) @[el2_lsu_bus_buffer.scala 470:73] + node _T_2950 = or(_T_2943, _T_2949) @[el2_lsu_bus_buffer.scala 469:112] + node _T_2951 = and(_T_2931, _T_2950) @[el2_lsu_bus_buffer.scala 467:114] + node _T_2952 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 467:84] + node _T_2953 = and(_T_2952, buf_state_en[1]) @[el2_lsu_bus_buffer.scala 467:95] + node _T_2954 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 468:23] + node _T_2955 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 468:49] + node _T_2956 = or(_T_2954, _T_2955) @[el2_lsu_bus_buffer.scala 468:34] + node _T_2957 = eq(_T_2956, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 468:8] + node _T_2958 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 469:25] + node _T_2959 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 469:55] + node _T_2960 = and(_T_2958, _T_2959) @[el2_lsu_bus_buffer.scala 469:43] + node _T_2961 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 469:84] + node _T_2962 = and(_T_2960, _T_2961) @[el2_lsu_bus_buffer.scala 469:73] + node _T_2963 = eq(ibuf_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 469:103] + node _T_2964 = and(_T_2962, _T_2963) @[el2_lsu_bus_buffer.scala 469:92] + node _T_2965 = or(_T_2957, _T_2964) @[el2_lsu_bus_buffer.scala 468:61] + node _T_2966 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 470:19] + node _T_2967 = and(_T_2966, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 470:37] + node _T_2968 = eq(WrPtr1_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 470:65] + node _T_2969 = and(_T_2967, _T_2968) @[el2_lsu_bus_buffer.scala 470:54] + node _T_2970 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 470:84] + node _T_2971 = and(_T_2969, _T_2970) @[el2_lsu_bus_buffer.scala 470:73] + node _T_2972 = or(_T_2965, _T_2971) @[el2_lsu_bus_buffer.scala 469:112] + node _T_2973 = and(_T_2953, _T_2972) @[el2_lsu_bus_buffer.scala 467:114] + node _T_2974 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 467:84] + node _T_2975 = and(_T_2974, buf_state_en[1]) @[el2_lsu_bus_buffer.scala 467:95] + node _T_2976 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 468:23] + node _T_2977 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 468:49] + node _T_2978 = or(_T_2976, _T_2977) @[el2_lsu_bus_buffer.scala 468:34] + node _T_2979 = eq(_T_2978, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 468:8] + node _T_2980 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 469:25] + node _T_2981 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 469:55] + node _T_2982 = and(_T_2980, _T_2981) @[el2_lsu_bus_buffer.scala 469:43] + node _T_2983 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 469:84] + node _T_2984 = and(_T_2982, _T_2983) @[el2_lsu_bus_buffer.scala 469:73] + node _T_2985 = eq(ibuf_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 469:103] + node _T_2986 = and(_T_2984, _T_2985) @[el2_lsu_bus_buffer.scala 469:92] + node _T_2987 = or(_T_2979, _T_2986) @[el2_lsu_bus_buffer.scala 468:61] + node _T_2988 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 470:19] + node _T_2989 = and(_T_2988, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 470:37] + node _T_2990 = eq(WrPtr1_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 470:65] + node _T_2991 = and(_T_2989, _T_2990) @[el2_lsu_bus_buffer.scala 470:54] + node _T_2992 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 470:84] + node _T_2993 = and(_T_2991, _T_2992) @[el2_lsu_bus_buffer.scala 470:73] + node _T_2994 = or(_T_2987, _T_2993) @[el2_lsu_bus_buffer.scala 469:112] + node _T_2995 = and(_T_2975, _T_2994) @[el2_lsu_bus_buffer.scala 467:114] + node _T_2996 = cat(_T_2995, _T_2973) @[Cat.scala 29:58] + node _T_2997 = cat(_T_2996, _T_2951) @[Cat.scala 29:58] + node _T_2998 = cat(_T_2997, _T_2929) @[Cat.scala 29:58] + node _T_2999 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 467:84] + node _T_3000 = and(_T_2999, buf_state_en[2]) @[el2_lsu_bus_buffer.scala 467:95] + node _T_3001 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 468:23] + node _T_3002 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 468:49] + node _T_3003 = or(_T_3001, _T_3002) @[el2_lsu_bus_buffer.scala 468:34] + node _T_3004 = eq(_T_3003, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 468:8] + node _T_3005 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 469:25] + node _T_3006 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 469:55] + node _T_3007 = and(_T_3005, _T_3006) @[el2_lsu_bus_buffer.scala 469:43] + node _T_3008 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 469:84] + node _T_3009 = and(_T_3007, _T_3008) @[el2_lsu_bus_buffer.scala 469:73] + node _T_3010 = eq(ibuf_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 469:103] + node _T_3011 = and(_T_3009, _T_3010) @[el2_lsu_bus_buffer.scala 469:92] + node _T_3012 = or(_T_3004, _T_3011) @[el2_lsu_bus_buffer.scala 468:61] + node _T_3013 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 470:19] + node _T_3014 = and(_T_3013, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 470:37] + node _T_3015 = eq(WrPtr1_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 470:65] + node _T_3016 = and(_T_3014, _T_3015) @[el2_lsu_bus_buffer.scala 470:54] + node _T_3017 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 470:84] + node _T_3018 = and(_T_3016, _T_3017) @[el2_lsu_bus_buffer.scala 470:73] + node _T_3019 = or(_T_3012, _T_3018) @[el2_lsu_bus_buffer.scala 469:112] + node _T_3020 = and(_T_3000, _T_3019) @[el2_lsu_bus_buffer.scala 467:114] + node _T_3021 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 467:84] + node _T_3022 = and(_T_3021, buf_state_en[2]) @[el2_lsu_bus_buffer.scala 467:95] + node _T_3023 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 468:23] + node _T_3024 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 468:49] + node _T_3025 = or(_T_3023, _T_3024) @[el2_lsu_bus_buffer.scala 468:34] + node _T_3026 = eq(_T_3025, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 468:8] + node _T_3027 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 469:25] + node _T_3028 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 469:55] + node _T_3029 = and(_T_3027, _T_3028) @[el2_lsu_bus_buffer.scala 469:43] + node _T_3030 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 469:84] + node _T_3031 = and(_T_3029, _T_3030) @[el2_lsu_bus_buffer.scala 469:73] + node _T_3032 = eq(ibuf_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 469:103] + node _T_3033 = and(_T_3031, _T_3032) @[el2_lsu_bus_buffer.scala 469:92] + node _T_3034 = or(_T_3026, _T_3033) @[el2_lsu_bus_buffer.scala 468:61] + node _T_3035 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 470:19] + node _T_3036 = and(_T_3035, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 470:37] + node _T_3037 = eq(WrPtr1_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 470:65] + node _T_3038 = and(_T_3036, _T_3037) @[el2_lsu_bus_buffer.scala 470:54] + node _T_3039 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 470:84] + node _T_3040 = and(_T_3038, _T_3039) @[el2_lsu_bus_buffer.scala 470:73] + node _T_3041 = or(_T_3034, _T_3040) @[el2_lsu_bus_buffer.scala 469:112] + node _T_3042 = and(_T_3022, _T_3041) @[el2_lsu_bus_buffer.scala 467:114] + node _T_3043 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 467:84] + node _T_3044 = and(_T_3043, buf_state_en[2]) @[el2_lsu_bus_buffer.scala 467:95] + node _T_3045 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 468:23] + node _T_3046 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 468:49] + node _T_3047 = or(_T_3045, _T_3046) @[el2_lsu_bus_buffer.scala 468:34] + node _T_3048 = eq(_T_3047, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 468:8] + node _T_3049 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 469:25] + node _T_3050 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 469:55] + node _T_3051 = and(_T_3049, _T_3050) @[el2_lsu_bus_buffer.scala 469:43] + node _T_3052 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 469:84] + node _T_3053 = and(_T_3051, _T_3052) @[el2_lsu_bus_buffer.scala 469:73] + node _T_3054 = eq(ibuf_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 469:103] + node _T_3055 = and(_T_3053, _T_3054) @[el2_lsu_bus_buffer.scala 469:92] + node _T_3056 = or(_T_3048, _T_3055) @[el2_lsu_bus_buffer.scala 468:61] + node _T_3057 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 470:19] + node _T_3058 = and(_T_3057, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 470:37] + node _T_3059 = eq(WrPtr1_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 470:65] + node _T_3060 = and(_T_3058, _T_3059) @[el2_lsu_bus_buffer.scala 470:54] + node _T_3061 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 470:84] + node _T_3062 = and(_T_3060, _T_3061) @[el2_lsu_bus_buffer.scala 470:73] + node _T_3063 = or(_T_3056, _T_3062) @[el2_lsu_bus_buffer.scala 469:112] + node _T_3064 = and(_T_3044, _T_3063) @[el2_lsu_bus_buffer.scala 467:114] + node _T_3065 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 467:84] + node _T_3066 = and(_T_3065, buf_state_en[2]) @[el2_lsu_bus_buffer.scala 467:95] + node _T_3067 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 468:23] + node _T_3068 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 468:49] + node _T_3069 = or(_T_3067, _T_3068) @[el2_lsu_bus_buffer.scala 468:34] + node _T_3070 = eq(_T_3069, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 468:8] + node _T_3071 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 469:25] + node _T_3072 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 469:55] + node _T_3073 = and(_T_3071, _T_3072) @[el2_lsu_bus_buffer.scala 469:43] + node _T_3074 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 469:84] + node _T_3075 = and(_T_3073, _T_3074) @[el2_lsu_bus_buffer.scala 469:73] + node _T_3076 = eq(ibuf_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 469:103] + node _T_3077 = and(_T_3075, _T_3076) @[el2_lsu_bus_buffer.scala 469:92] + node _T_3078 = or(_T_3070, _T_3077) @[el2_lsu_bus_buffer.scala 468:61] + node _T_3079 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 470:19] + node _T_3080 = and(_T_3079, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 470:37] + node _T_3081 = eq(WrPtr1_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 470:65] + node _T_3082 = and(_T_3080, _T_3081) @[el2_lsu_bus_buffer.scala 470:54] + node _T_3083 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 470:84] + node _T_3084 = and(_T_3082, _T_3083) @[el2_lsu_bus_buffer.scala 470:73] + node _T_3085 = or(_T_3078, _T_3084) @[el2_lsu_bus_buffer.scala 469:112] + node _T_3086 = and(_T_3066, _T_3085) @[el2_lsu_bus_buffer.scala 467:114] + node _T_3087 = cat(_T_3086, _T_3064) @[Cat.scala 29:58] + node _T_3088 = cat(_T_3087, _T_3042) @[Cat.scala 29:58] + node _T_3089 = cat(_T_3088, _T_3020) @[Cat.scala 29:58] + node _T_3090 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 467:84] + node _T_3091 = and(_T_3090, buf_state_en[3]) @[el2_lsu_bus_buffer.scala 467:95] + node _T_3092 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 468:23] + node _T_3093 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 468:49] + node _T_3094 = or(_T_3092, _T_3093) @[el2_lsu_bus_buffer.scala 468:34] + node _T_3095 = eq(_T_3094, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 468:8] + node _T_3096 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 469:25] + node _T_3097 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 469:55] + node _T_3098 = and(_T_3096, _T_3097) @[el2_lsu_bus_buffer.scala 469:43] + node _T_3099 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 469:84] + node _T_3100 = and(_T_3098, _T_3099) @[el2_lsu_bus_buffer.scala 469:73] + node _T_3101 = eq(ibuf_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 469:103] + node _T_3102 = and(_T_3100, _T_3101) @[el2_lsu_bus_buffer.scala 469:92] + node _T_3103 = or(_T_3095, _T_3102) @[el2_lsu_bus_buffer.scala 468:61] + node _T_3104 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 470:19] + node _T_3105 = and(_T_3104, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 470:37] + node _T_3106 = eq(WrPtr1_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 470:65] + node _T_3107 = and(_T_3105, _T_3106) @[el2_lsu_bus_buffer.scala 470:54] + node _T_3108 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 470:84] + node _T_3109 = and(_T_3107, _T_3108) @[el2_lsu_bus_buffer.scala 470:73] + node _T_3110 = or(_T_3103, _T_3109) @[el2_lsu_bus_buffer.scala 469:112] + node _T_3111 = and(_T_3091, _T_3110) @[el2_lsu_bus_buffer.scala 467:114] + node _T_3112 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 467:84] + node _T_3113 = and(_T_3112, buf_state_en[3]) @[el2_lsu_bus_buffer.scala 467:95] + node _T_3114 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 468:23] + node _T_3115 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 468:49] + node _T_3116 = or(_T_3114, _T_3115) @[el2_lsu_bus_buffer.scala 468:34] + node _T_3117 = eq(_T_3116, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 468:8] + node _T_3118 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 469:25] + node _T_3119 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 469:55] + node _T_3120 = and(_T_3118, _T_3119) @[el2_lsu_bus_buffer.scala 469:43] + node _T_3121 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 469:84] + node _T_3122 = and(_T_3120, _T_3121) @[el2_lsu_bus_buffer.scala 469:73] + node _T_3123 = eq(ibuf_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 469:103] + node _T_3124 = and(_T_3122, _T_3123) @[el2_lsu_bus_buffer.scala 469:92] + node _T_3125 = or(_T_3117, _T_3124) @[el2_lsu_bus_buffer.scala 468:61] + node _T_3126 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 470:19] + node _T_3127 = and(_T_3126, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 470:37] + node _T_3128 = eq(WrPtr1_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 470:65] + node _T_3129 = and(_T_3127, _T_3128) @[el2_lsu_bus_buffer.scala 470:54] + node _T_3130 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 470:84] + node _T_3131 = and(_T_3129, _T_3130) @[el2_lsu_bus_buffer.scala 470:73] + node _T_3132 = or(_T_3125, _T_3131) @[el2_lsu_bus_buffer.scala 469:112] + node _T_3133 = and(_T_3113, _T_3132) @[el2_lsu_bus_buffer.scala 467:114] + node _T_3134 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 467:84] + node _T_3135 = and(_T_3134, buf_state_en[3]) @[el2_lsu_bus_buffer.scala 467:95] + node _T_3136 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 468:23] + node _T_3137 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 468:49] + node _T_3138 = or(_T_3136, _T_3137) @[el2_lsu_bus_buffer.scala 468:34] + node _T_3139 = eq(_T_3138, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 468:8] + node _T_3140 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 469:25] + node _T_3141 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 469:55] + node _T_3142 = and(_T_3140, _T_3141) @[el2_lsu_bus_buffer.scala 469:43] + node _T_3143 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 469:84] + node _T_3144 = and(_T_3142, _T_3143) @[el2_lsu_bus_buffer.scala 469:73] + node _T_3145 = eq(ibuf_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 469:103] + node _T_3146 = and(_T_3144, _T_3145) @[el2_lsu_bus_buffer.scala 469:92] + node _T_3147 = or(_T_3139, _T_3146) @[el2_lsu_bus_buffer.scala 468:61] + node _T_3148 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 470:19] + node _T_3149 = and(_T_3148, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 470:37] + node _T_3150 = eq(WrPtr1_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 470:65] + node _T_3151 = and(_T_3149, _T_3150) @[el2_lsu_bus_buffer.scala 470:54] + node _T_3152 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 470:84] + node _T_3153 = and(_T_3151, _T_3152) @[el2_lsu_bus_buffer.scala 470:73] + node _T_3154 = or(_T_3147, _T_3153) @[el2_lsu_bus_buffer.scala 469:112] + node _T_3155 = and(_T_3135, _T_3154) @[el2_lsu_bus_buffer.scala 467:114] + node _T_3156 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 467:84] + node _T_3157 = and(_T_3156, buf_state_en[3]) @[el2_lsu_bus_buffer.scala 467:95] + node _T_3158 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 468:23] + node _T_3159 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 468:49] + node _T_3160 = or(_T_3158, _T_3159) @[el2_lsu_bus_buffer.scala 468:34] + node _T_3161 = eq(_T_3160, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 468:8] + node _T_3162 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 469:25] + node _T_3163 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 469:55] + node _T_3164 = and(_T_3162, _T_3163) @[el2_lsu_bus_buffer.scala 469:43] + node _T_3165 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 469:84] + node _T_3166 = and(_T_3164, _T_3165) @[el2_lsu_bus_buffer.scala 469:73] + node _T_3167 = eq(ibuf_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 469:103] + node _T_3168 = and(_T_3166, _T_3167) @[el2_lsu_bus_buffer.scala 469:92] + node _T_3169 = or(_T_3161, _T_3168) @[el2_lsu_bus_buffer.scala 468:61] + node _T_3170 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 470:19] + node _T_3171 = and(_T_3170, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 470:37] + node _T_3172 = eq(WrPtr1_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 470:65] + node _T_3173 = and(_T_3171, _T_3172) @[el2_lsu_bus_buffer.scala 470:54] + node _T_3174 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 470:84] + node _T_3175 = and(_T_3173, _T_3174) @[el2_lsu_bus_buffer.scala 470:73] + node _T_3176 = or(_T_3169, _T_3175) @[el2_lsu_bus_buffer.scala 469:112] + node _T_3177 = and(_T_3157, _T_3176) @[el2_lsu_bus_buffer.scala 467:114] + node _T_3178 = cat(_T_3177, _T_3155) @[Cat.scala 29:58] + node _T_3179 = cat(_T_3178, _T_3133) @[Cat.scala 29:58] + node _T_3180 = cat(_T_3179, _T_3111) @[Cat.scala 29:58] + buf_rspage_set[0] <= _T_2907 @[el2_lsu_bus_buffer.scala 467:20] + buf_rspage_set[1] <= _T_2998 @[el2_lsu_bus_buffer.scala 467:20] + buf_rspage_set[2] <= _T_3089 @[el2_lsu_bus_buffer.scala 467:20] + buf_rspage_set[3] <= _T_3180 @[el2_lsu_bus_buffer.scala 467:20] + node _T_3181 = bits(buf_rspage_set[0], 0, 0) @[el2_lsu_bus_buffer.scala 471:86] + node _T_3182 = bits(buf_rspage[0], 0, 0) @[el2_lsu_bus_buffer.scala 471:105] + node _T_3183 = or(_T_3181, _T_3182) @[el2_lsu_bus_buffer.scala 471:90] + node _T_3184 = bits(buf_rspage_set[0], 1, 1) @[el2_lsu_bus_buffer.scala 471:86] + node _T_3185 = bits(buf_rspage[0], 1, 1) @[el2_lsu_bus_buffer.scala 471:105] + node _T_3186 = or(_T_3184, _T_3185) @[el2_lsu_bus_buffer.scala 471:90] + node _T_3187 = bits(buf_rspage_set[0], 2, 2) @[el2_lsu_bus_buffer.scala 471:86] + node _T_3188 = bits(buf_rspage[0], 2, 2) @[el2_lsu_bus_buffer.scala 471:105] + node _T_3189 = or(_T_3187, _T_3188) @[el2_lsu_bus_buffer.scala 471:90] + node _T_3190 = bits(buf_rspage_set[0], 3, 3) @[el2_lsu_bus_buffer.scala 471:86] + node _T_3191 = bits(buf_rspage[0], 3, 3) @[el2_lsu_bus_buffer.scala 471:105] + node _T_3192 = or(_T_3190, _T_3191) @[el2_lsu_bus_buffer.scala 471:90] + node _T_3193 = cat(_T_3192, _T_3189) @[Cat.scala 29:58] + node _T_3194 = cat(_T_3193, _T_3186) @[Cat.scala 29:58] + node _T_3195 = cat(_T_3194, _T_3183) @[Cat.scala 29:58] + node _T_3196 = bits(buf_rspage_set[1], 0, 0) @[el2_lsu_bus_buffer.scala 471:86] + node _T_3197 = bits(buf_rspage[1], 0, 0) @[el2_lsu_bus_buffer.scala 471:105] + node _T_3198 = or(_T_3196, _T_3197) @[el2_lsu_bus_buffer.scala 471:90] + node _T_3199 = bits(buf_rspage_set[1], 1, 1) @[el2_lsu_bus_buffer.scala 471:86] + node _T_3200 = bits(buf_rspage[1], 1, 1) @[el2_lsu_bus_buffer.scala 471:105] + node _T_3201 = or(_T_3199, _T_3200) @[el2_lsu_bus_buffer.scala 471:90] + node _T_3202 = bits(buf_rspage_set[1], 2, 2) @[el2_lsu_bus_buffer.scala 471:86] + node _T_3203 = bits(buf_rspage[1], 2, 2) @[el2_lsu_bus_buffer.scala 471:105] + node _T_3204 = or(_T_3202, _T_3203) @[el2_lsu_bus_buffer.scala 471:90] + node _T_3205 = bits(buf_rspage_set[1], 3, 3) @[el2_lsu_bus_buffer.scala 471:86] + node _T_3206 = bits(buf_rspage[1], 3, 3) @[el2_lsu_bus_buffer.scala 471:105] + node _T_3207 = or(_T_3205, _T_3206) @[el2_lsu_bus_buffer.scala 471:90] + node _T_3208 = cat(_T_3207, _T_3204) @[Cat.scala 29:58] + node _T_3209 = cat(_T_3208, _T_3201) @[Cat.scala 29:58] + node _T_3210 = cat(_T_3209, _T_3198) @[Cat.scala 29:58] + node _T_3211 = bits(buf_rspage_set[2], 0, 0) @[el2_lsu_bus_buffer.scala 471:86] + node _T_3212 = bits(buf_rspage[2], 0, 0) @[el2_lsu_bus_buffer.scala 471:105] + node _T_3213 = or(_T_3211, _T_3212) @[el2_lsu_bus_buffer.scala 471:90] + node _T_3214 = bits(buf_rspage_set[2], 1, 1) @[el2_lsu_bus_buffer.scala 471:86] + node _T_3215 = bits(buf_rspage[2], 1, 1) @[el2_lsu_bus_buffer.scala 471:105] + node _T_3216 = or(_T_3214, _T_3215) @[el2_lsu_bus_buffer.scala 471:90] + node _T_3217 = bits(buf_rspage_set[2], 2, 2) @[el2_lsu_bus_buffer.scala 471:86] + node _T_3218 = bits(buf_rspage[2], 2, 2) @[el2_lsu_bus_buffer.scala 471:105] + node _T_3219 = or(_T_3217, _T_3218) @[el2_lsu_bus_buffer.scala 471:90] + node _T_3220 = bits(buf_rspage_set[2], 3, 3) @[el2_lsu_bus_buffer.scala 471:86] + node _T_3221 = bits(buf_rspage[2], 3, 3) @[el2_lsu_bus_buffer.scala 471:105] + node _T_3222 = or(_T_3220, _T_3221) @[el2_lsu_bus_buffer.scala 471:90] + node _T_3223 = cat(_T_3222, _T_3219) @[Cat.scala 29:58] + node _T_3224 = cat(_T_3223, _T_3216) @[Cat.scala 29:58] + node _T_3225 = cat(_T_3224, _T_3213) @[Cat.scala 29:58] + node _T_3226 = bits(buf_rspage_set[3], 0, 0) @[el2_lsu_bus_buffer.scala 471:86] + node _T_3227 = bits(buf_rspage[3], 0, 0) @[el2_lsu_bus_buffer.scala 471:105] + node _T_3228 = or(_T_3226, _T_3227) @[el2_lsu_bus_buffer.scala 471:90] + node _T_3229 = bits(buf_rspage_set[3], 1, 1) @[el2_lsu_bus_buffer.scala 471:86] + node _T_3230 = bits(buf_rspage[3], 1, 1) @[el2_lsu_bus_buffer.scala 471:105] + node _T_3231 = or(_T_3229, _T_3230) @[el2_lsu_bus_buffer.scala 471:90] + node _T_3232 = bits(buf_rspage_set[3], 2, 2) @[el2_lsu_bus_buffer.scala 471:86] + node _T_3233 = bits(buf_rspage[3], 2, 2) @[el2_lsu_bus_buffer.scala 471:105] + node _T_3234 = or(_T_3232, _T_3233) @[el2_lsu_bus_buffer.scala 471:90] + node _T_3235 = bits(buf_rspage_set[3], 3, 3) @[el2_lsu_bus_buffer.scala 471:86] + node _T_3236 = bits(buf_rspage[3], 3, 3) @[el2_lsu_bus_buffer.scala 471:105] + node _T_3237 = or(_T_3235, _T_3236) @[el2_lsu_bus_buffer.scala 471:90] + node _T_3238 = cat(_T_3237, _T_3234) @[Cat.scala 29:58] + node _T_3239 = cat(_T_3238, _T_3231) @[Cat.scala 29:58] + node _T_3240 = cat(_T_3239, _T_3228) @[Cat.scala 29:58] + buf_rspage_in[0] <= _T_3195 @[el2_lsu_bus_buffer.scala 471:19] + buf_rspage_in[1] <= _T_3210 @[el2_lsu_bus_buffer.scala 471:19] + buf_rspage_in[2] <= _T_3225 @[el2_lsu_bus_buffer.scala 471:19] + buf_rspage_in[3] <= _T_3240 @[el2_lsu_bus_buffer.scala 471:19] + node _T_3241 = bits(buf_rspageQ[0], 0, 0) @[el2_lsu_bus_buffer.scala 472:80] + node _T_3242 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 472:101] + node _T_3243 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 472:127] + node _T_3244 = or(_T_3242, _T_3243) @[el2_lsu_bus_buffer.scala 472:112] + node _T_3245 = eq(_T_3244, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 472:86] + node _T_3246 = and(_T_3241, _T_3245) @[el2_lsu_bus_buffer.scala 472:84] + node _T_3247 = bits(buf_rspageQ[0], 1, 1) @[el2_lsu_bus_buffer.scala 472:80] + node _T_3248 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 472:101] + node _T_3249 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 472:127] + node _T_3250 = or(_T_3248, _T_3249) @[el2_lsu_bus_buffer.scala 472:112] + node _T_3251 = eq(_T_3250, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 472:86] + node _T_3252 = and(_T_3247, _T_3251) @[el2_lsu_bus_buffer.scala 472:84] + node _T_3253 = bits(buf_rspageQ[0], 2, 2) @[el2_lsu_bus_buffer.scala 472:80] + node _T_3254 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 472:101] + node _T_3255 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 472:127] + node _T_3256 = or(_T_3254, _T_3255) @[el2_lsu_bus_buffer.scala 472:112] + node _T_3257 = eq(_T_3256, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 472:86] + node _T_3258 = and(_T_3253, _T_3257) @[el2_lsu_bus_buffer.scala 472:84] + node _T_3259 = bits(buf_rspageQ[0], 3, 3) @[el2_lsu_bus_buffer.scala 472:80] + node _T_3260 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 472:101] + node _T_3261 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 472:127] + node _T_3262 = or(_T_3260, _T_3261) @[el2_lsu_bus_buffer.scala 472:112] + node _T_3263 = eq(_T_3262, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 472:86] + node _T_3264 = and(_T_3259, _T_3263) @[el2_lsu_bus_buffer.scala 472:84] + node _T_3265 = cat(_T_3264, _T_3258) @[Cat.scala 29:58] + node _T_3266 = cat(_T_3265, _T_3252) @[Cat.scala 29:58] + node _T_3267 = cat(_T_3266, _T_3246) @[Cat.scala 29:58] + node _T_3268 = bits(buf_rspageQ[1], 0, 0) @[el2_lsu_bus_buffer.scala 472:80] + node _T_3269 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 472:101] + node _T_3270 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 472:127] + node _T_3271 = or(_T_3269, _T_3270) @[el2_lsu_bus_buffer.scala 472:112] + node _T_3272 = eq(_T_3271, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 472:86] + node _T_3273 = and(_T_3268, _T_3272) @[el2_lsu_bus_buffer.scala 472:84] + node _T_3274 = bits(buf_rspageQ[1], 1, 1) @[el2_lsu_bus_buffer.scala 472:80] + node _T_3275 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 472:101] + node _T_3276 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 472:127] + node _T_3277 = or(_T_3275, _T_3276) @[el2_lsu_bus_buffer.scala 472:112] + node _T_3278 = eq(_T_3277, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 472:86] + node _T_3279 = and(_T_3274, _T_3278) @[el2_lsu_bus_buffer.scala 472:84] + node _T_3280 = bits(buf_rspageQ[1], 2, 2) @[el2_lsu_bus_buffer.scala 472:80] + node _T_3281 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 472:101] + node _T_3282 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 472:127] + node _T_3283 = or(_T_3281, _T_3282) @[el2_lsu_bus_buffer.scala 472:112] + node _T_3284 = eq(_T_3283, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 472:86] + node _T_3285 = and(_T_3280, _T_3284) @[el2_lsu_bus_buffer.scala 472:84] + node _T_3286 = bits(buf_rspageQ[1], 3, 3) @[el2_lsu_bus_buffer.scala 472:80] + node _T_3287 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 472:101] + node _T_3288 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 472:127] + node _T_3289 = or(_T_3287, _T_3288) @[el2_lsu_bus_buffer.scala 472:112] + node _T_3290 = eq(_T_3289, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 472:86] + node _T_3291 = and(_T_3286, _T_3290) @[el2_lsu_bus_buffer.scala 472:84] + node _T_3292 = cat(_T_3291, _T_3285) @[Cat.scala 29:58] + node _T_3293 = cat(_T_3292, _T_3279) @[Cat.scala 29:58] + node _T_3294 = cat(_T_3293, _T_3273) @[Cat.scala 29:58] + node _T_3295 = bits(buf_rspageQ[2], 0, 0) @[el2_lsu_bus_buffer.scala 472:80] + node _T_3296 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 472:101] + node _T_3297 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 472:127] + node _T_3298 = or(_T_3296, _T_3297) @[el2_lsu_bus_buffer.scala 472:112] + node _T_3299 = eq(_T_3298, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 472:86] + node _T_3300 = and(_T_3295, _T_3299) @[el2_lsu_bus_buffer.scala 472:84] + node _T_3301 = bits(buf_rspageQ[2], 1, 1) @[el2_lsu_bus_buffer.scala 472:80] + node _T_3302 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 472:101] + node _T_3303 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 472:127] + node _T_3304 = or(_T_3302, _T_3303) @[el2_lsu_bus_buffer.scala 472:112] + node _T_3305 = eq(_T_3304, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 472:86] + node _T_3306 = and(_T_3301, _T_3305) @[el2_lsu_bus_buffer.scala 472:84] + node _T_3307 = bits(buf_rspageQ[2], 2, 2) @[el2_lsu_bus_buffer.scala 472:80] + node _T_3308 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 472:101] + node _T_3309 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 472:127] + node _T_3310 = or(_T_3308, _T_3309) @[el2_lsu_bus_buffer.scala 472:112] + node _T_3311 = eq(_T_3310, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 472:86] + node _T_3312 = and(_T_3307, _T_3311) @[el2_lsu_bus_buffer.scala 472:84] + node _T_3313 = bits(buf_rspageQ[2], 3, 3) @[el2_lsu_bus_buffer.scala 472:80] + node _T_3314 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 472:101] + node _T_3315 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 472:127] + node _T_3316 = or(_T_3314, _T_3315) @[el2_lsu_bus_buffer.scala 472:112] + node _T_3317 = eq(_T_3316, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 472:86] + node _T_3318 = and(_T_3313, _T_3317) @[el2_lsu_bus_buffer.scala 472:84] + node _T_3319 = cat(_T_3318, _T_3312) @[Cat.scala 29:58] + node _T_3320 = cat(_T_3319, _T_3306) @[Cat.scala 29:58] + node _T_3321 = cat(_T_3320, _T_3300) @[Cat.scala 29:58] + node _T_3322 = bits(buf_rspageQ[3], 0, 0) @[el2_lsu_bus_buffer.scala 472:80] + node _T_3323 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 472:101] + node _T_3324 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 472:127] + node _T_3325 = or(_T_3323, _T_3324) @[el2_lsu_bus_buffer.scala 472:112] + node _T_3326 = eq(_T_3325, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 472:86] + node _T_3327 = and(_T_3322, _T_3326) @[el2_lsu_bus_buffer.scala 472:84] + node _T_3328 = bits(buf_rspageQ[3], 1, 1) @[el2_lsu_bus_buffer.scala 472:80] + node _T_3329 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 472:101] + node _T_3330 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 472:127] + node _T_3331 = or(_T_3329, _T_3330) @[el2_lsu_bus_buffer.scala 472:112] + node _T_3332 = eq(_T_3331, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 472:86] + node _T_3333 = and(_T_3328, _T_3332) @[el2_lsu_bus_buffer.scala 472:84] + node _T_3334 = bits(buf_rspageQ[3], 2, 2) @[el2_lsu_bus_buffer.scala 472:80] + node _T_3335 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 472:101] + node _T_3336 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 472:127] + node _T_3337 = or(_T_3335, _T_3336) @[el2_lsu_bus_buffer.scala 472:112] + node _T_3338 = eq(_T_3337, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 472:86] + node _T_3339 = and(_T_3334, _T_3338) @[el2_lsu_bus_buffer.scala 472:84] + node _T_3340 = bits(buf_rspageQ[3], 3, 3) @[el2_lsu_bus_buffer.scala 472:80] + node _T_3341 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 472:101] + node _T_3342 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 472:127] + node _T_3343 = or(_T_3341, _T_3342) @[el2_lsu_bus_buffer.scala 472:112] + node _T_3344 = eq(_T_3343, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 472:86] + node _T_3345 = and(_T_3340, _T_3344) @[el2_lsu_bus_buffer.scala 472:84] + node _T_3346 = cat(_T_3345, _T_3339) @[Cat.scala 29:58] + node _T_3347 = cat(_T_3346, _T_3333) @[Cat.scala 29:58] + node _T_3348 = cat(_T_3347, _T_3327) @[Cat.scala 29:58] + buf_rspage[0] <= _T_3267 @[el2_lsu_bus_buffer.scala 472:16] + buf_rspage[1] <= _T_3294 @[el2_lsu_bus_buffer.scala 472:16] + buf_rspage[2] <= _T_3321 @[el2_lsu_bus_buffer.scala 472:16] + buf_rspage[3] <= _T_3348 @[el2_lsu_bus_buffer.scala 472:16] + node _T_3349 = eq(ibuf_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 477:77] + node _T_3350 = and(ibuf_drain_vld, _T_3349) @[el2_lsu_bus_buffer.scala 477:65] + node _T_3351 = eq(ibuf_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 477:77] + node _T_3352 = and(ibuf_drain_vld, _T_3351) @[el2_lsu_bus_buffer.scala 477:65] + node _T_3353 = eq(ibuf_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 477:77] + node _T_3354 = and(ibuf_drain_vld, _T_3353) @[el2_lsu_bus_buffer.scala 477:65] + node _T_3355 = eq(ibuf_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 477:77] + node _T_3356 = and(ibuf_drain_vld, _T_3355) @[el2_lsu_bus_buffer.scala 477:65] + node _T_3357 = cat(_T_3356, _T_3354) @[Cat.scala 29:58] + node _T_3358 = cat(_T_3357, _T_3352) @[Cat.scala 29:58] + node _T_3359 = cat(_T_3358, _T_3350) @[Cat.scala 29:58] + ibuf_drainvec_vld <= _T_3359 @[el2_lsu_bus_buffer.scala 477:23] + node _T_3360 = bits(ibuf_drainvec_vld, 0, 0) @[el2_lsu_bus_buffer.scala 478:66] + node _T_3361 = bits(ibuf_byteen_out, 3, 0) @[el2_lsu_bus_buffer.scala 478:86] + node _T_3362 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 479:20] + node _T_3363 = eq(WrPtr1_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 479:48] + node _T_3364 = and(_T_3362, _T_3363) @[el2_lsu_bus_buffer.scala 479:37] + node _T_3365 = bits(ldst_byteen_hi_r, 3, 0) @[el2_lsu_bus_buffer.scala 479:73] + node _T_3366 = bits(ldst_byteen_lo_r, 3, 0) @[el2_lsu_bus_buffer.scala 479:96] + node _T_3367 = mux(_T_3364, _T_3365, _T_3366) @[el2_lsu_bus_buffer.scala 479:10] + node _T_3368 = mux(_T_3360, _T_3361, _T_3367) @[el2_lsu_bus_buffer.scala 478:48] + node _T_3369 = bits(ibuf_drainvec_vld, 1, 1) @[el2_lsu_bus_buffer.scala 478:66] + node _T_3370 = bits(ibuf_byteen_out, 3, 0) @[el2_lsu_bus_buffer.scala 478:86] + node _T_3371 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 479:20] + node _T_3372 = eq(WrPtr1_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 479:48] + node _T_3373 = and(_T_3371, _T_3372) @[el2_lsu_bus_buffer.scala 479:37] + node _T_3374 = bits(ldst_byteen_hi_r, 3, 0) @[el2_lsu_bus_buffer.scala 479:73] + node _T_3375 = bits(ldst_byteen_lo_r, 3, 0) @[el2_lsu_bus_buffer.scala 479:96] + node _T_3376 = mux(_T_3373, _T_3374, _T_3375) @[el2_lsu_bus_buffer.scala 479:10] + node _T_3377 = mux(_T_3369, _T_3370, _T_3376) @[el2_lsu_bus_buffer.scala 478:48] + node _T_3378 = bits(ibuf_drainvec_vld, 2, 2) @[el2_lsu_bus_buffer.scala 478:66] + node _T_3379 = bits(ibuf_byteen_out, 3, 0) @[el2_lsu_bus_buffer.scala 478:86] + node _T_3380 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 479:20] + node _T_3381 = eq(WrPtr1_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 479:48] + node _T_3382 = and(_T_3380, _T_3381) @[el2_lsu_bus_buffer.scala 479:37] + node _T_3383 = bits(ldst_byteen_hi_r, 3, 0) @[el2_lsu_bus_buffer.scala 479:73] + node _T_3384 = bits(ldst_byteen_lo_r, 3, 0) @[el2_lsu_bus_buffer.scala 479:96] + node _T_3385 = mux(_T_3382, _T_3383, _T_3384) @[el2_lsu_bus_buffer.scala 479:10] + node _T_3386 = mux(_T_3378, _T_3379, _T_3385) @[el2_lsu_bus_buffer.scala 478:48] + node _T_3387 = bits(ibuf_drainvec_vld, 3, 3) @[el2_lsu_bus_buffer.scala 478:66] + node _T_3388 = bits(ibuf_byteen_out, 3, 0) @[el2_lsu_bus_buffer.scala 478:86] + node _T_3389 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 479:20] + node _T_3390 = eq(WrPtr1_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 479:48] + node _T_3391 = and(_T_3389, _T_3390) @[el2_lsu_bus_buffer.scala 479:37] + node _T_3392 = bits(ldst_byteen_hi_r, 3, 0) @[el2_lsu_bus_buffer.scala 479:73] + node _T_3393 = bits(ldst_byteen_lo_r, 3, 0) @[el2_lsu_bus_buffer.scala 479:96] + node _T_3394 = mux(_T_3391, _T_3392, _T_3393) @[el2_lsu_bus_buffer.scala 479:10] + node _T_3395 = mux(_T_3387, _T_3388, _T_3394) @[el2_lsu_bus_buffer.scala 478:48] + buf_byteen_in[0] <= _T_3368 @[el2_lsu_bus_buffer.scala 478:19] + buf_byteen_in[1] <= _T_3377 @[el2_lsu_bus_buffer.scala 478:19] + buf_byteen_in[2] <= _T_3386 @[el2_lsu_bus_buffer.scala 478:19] + buf_byteen_in[3] <= _T_3395 @[el2_lsu_bus_buffer.scala 478:19] + node _T_3396 = bits(ibuf_drainvec_vld, 0, 0) @[el2_lsu_bus_buffer.scala 480:64] + node _T_3397 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 480:93] + node _T_3398 = eq(WrPtr1_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 480:121] + node _T_3399 = and(_T_3397, _T_3398) @[el2_lsu_bus_buffer.scala 480:110] + node _T_3400 = mux(_T_3399, io.end_addr_r, io.lsu_addr_r) @[el2_lsu_bus_buffer.scala 480:83] + node _T_3401 = mux(_T_3396, ibuf_addr, _T_3400) @[el2_lsu_bus_buffer.scala 480:46] + node _T_3402 = bits(ibuf_drainvec_vld, 1, 1) @[el2_lsu_bus_buffer.scala 480:64] + node _T_3403 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 480:93] + node _T_3404 = eq(WrPtr1_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 480:121] + node _T_3405 = and(_T_3403, _T_3404) @[el2_lsu_bus_buffer.scala 480:110] + node _T_3406 = mux(_T_3405, io.end_addr_r, io.lsu_addr_r) @[el2_lsu_bus_buffer.scala 480:83] + node _T_3407 = mux(_T_3402, ibuf_addr, _T_3406) @[el2_lsu_bus_buffer.scala 480:46] + node _T_3408 = bits(ibuf_drainvec_vld, 2, 2) @[el2_lsu_bus_buffer.scala 480:64] + node _T_3409 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 480:93] + node _T_3410 = eq(WrPtr1_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 480:121] + node _T_3411 = and(_T_3409, _T_3410) @[el2_lsu_bus_buffer.scala 480:110] + node _T_3412 = mux(_T_3411, io.end_addr_r, io.lsu_addr_r) @[el2_lsu_bus_buffer.scala 480:83] + node _T_3413 = mux(_T_3408, ibuf_addr, _T_3412) @[el2_lsu_bus_buffer.scala 480:46] + node _T_3414 = bits(ibuf_drainvec_vld, 3, 3) @[el2_lsu_bus_buffer.scala 480:64] + node _T_3415 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 480:93] + node _T_3416 = eq(WrPtr1_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 480:121] + node _T_3417 = and(_T_3415, _T_3416) @[el2_lsu_bus_buffer.scala 480:110] + node _T_3418 = mux(_T_3417, io.end_addr_r, io.lsu_addr_r) @[el2_lsu_bus_buffer.scala 480:83] + node _T_3419 = mux(_T_3414, ibuf_addr, _T_3418) @[el2_lsu_bus_buffer.scala 480:46] + buf_addr_in[0] <= _T_3401 @[el2_lsu_bus_buffer.scala 480:17] + buf_addr_in[1] <= _T_3407 @[el2_lsu_bus_buffer.scala 480:17] + buf_addr_in[2] <= _T_3413 @[el2_lsu_bus_buffer.scala 480:17] + buf_addr_in[3] <= _T_3419 @[el2_lsu_bus_buffer.scala 480:17] + node _T_3420 = bits(ibuf_drainvec_vld, 0, 0) @[el2_lsu_bus_buffer.scala 481:65] + node _T_3421 = mux(_T_3420, ibuf_dual, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 481:47] + node _T_3422 = bits(ibuf_drainvec_vld, 1, 1) @[el2_lsu_bus_buffer.scala 481:65] + node _T_3423 = mux(_T_3422, ibuf_dual, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 481:47] + node _T_3424 = bits(ibuf_drainvec_vld, 2, 2) @[el2_lsu_bus_buffer.scala 481:65] + node _T_3425 = mux(_T_3424, ibuf_dual, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 481:47] + node _T_3426 = bits(ibuf_drainvec_vld, 3, 3) @[el2_lsu_bus_buffer.scala 481:65] + node _T_3427 = mux(_T_3426, ibuf_dual, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 481:47] + node _T_3428 = cat(_T_3427, _T_3425) @[Cat.scala 29:58] + node _T_3429 = cat(_T_3428, _T_3423) @[Cat.scala 29:58] + node _T_3430 = cat(_T_3429, _T_3421) @[Cat.scala 29:58] + buf_dual_in <= _T_3430 @[el2_lsu_bus_buffer.scala 481:17] + node _T_3431 = bits(ibuf_drainvec_vld, 0, 0) @[el2_lsu_bus_buffer.scala 482:67] + node _T_3432 = mux(_T_3431, ibuf_samedw, ldst_samedw_r) @[el2_lsu_bus_buffer.scala 482:49] + node _T_3433 = bits(ibuf_drainvec_vld, 1, 1) @[el2_lsu_bus_buffer.scala 482:67] + node _T_3434 = mux(_T_3433, ibuf_samedw, ldst_samedw_r) @[el2_lsu_bus_buffer.scala 482:49] + node _T_3435 = bits(ibuf_drainvec_vld, 2, 2) @[el2_lsu_bus_buffer.scala 482:67] + node _T_3436 = mux(_T_3435, ibuf_samedw, ldst_samedw_r) @[el2_lsu_bus_buffer.scala 482:49] + node _T_3437 = bits(ibuf_drainvec_vld, 3, 3) @[el2_lsu_bus_buffer.scala 482:67] + node _T_3438 = mux(_T_3437, ibuf_samedw, ldst_samedw_r) @[el2_lsu_bus_buffer.scala 482:49] + node _T_3439 = cat(_T_3438, _T_3436) @[Cat.scala 29:58] + node _T_3440 = cat(_T_3439, _T_3434) @[Cat.scala 29:58] + node _T_3441 = cat(_T_3440, _T_3432) @[Cat.scala 29:58] + buf_samedw_in <= _T_3441 @[el2_lsu_bus_buffer.scala 482:19] + node _T_3442 = bits(ibuf_drainvec_vld, 0, 0) @[el2_lsu_bus_buffer.scala 483:68] + node _T_3443 = or(ibuf_nomerge, ibuf_force_drain) @[el2_lsu_bus_buffer.scala 483:86] + node _T_3444 = mux(_T_3442, _T_3443, io.no_dword_merge_r) @[el2_lsu_bus_buffer.scala 483:50] + node _T_3445 = bits(ibuf_drainvec_vld, 1, 1) @[el2_lsu_bus_buffer.scala 483:68] + node _T_3446 = or(ibuf_nomerge, ibuf_force_drain) @[el2_lsu_bus_buffer.scala 483:86] + node _T_3447 = mux(_T_3445, _T_3446, io.no_dword_merge_r) @[el2_lsu_bus_buffer.scala 483:50] + node _T_3448 = bits(ibuf_drainvec_vld, 2, 2) @[el2_lsu_bus_buffer.scala 483:68] + node _T_3449 = or(ibuf_nomerge, ibuf_force_drain) @[el2_lsu_bus_buffer.scala 483:86] + node _T_3450 = mux(_T_3448, _T_3449, io.no_dword_merge_r) @[el2_lsu_bus_buffer.scala 483:50] + node _T_3451 = bits(ibuf_drainvec_vld, 3, 3) @[el2_lsu_bus_buffer.scala 483:68] + node _T_3452 = or(ibuf_nomerge, ibuf_force_drain) @[el2_lsu_bus_buffer.scala 483:86] + node _T_3453 = mux(_T_3451, _T_3452, io.no_dword_merge_r) @[el2_lsu_bus_buffer.scala 483:50] + node _T_3454 = cat(_T_3453, _T_3450) @[Cat.scala 29:58] + node _T_3455 = cat(_T_3454, _T_3447) @[Cat.scala 29:58] + node _T_3456 = cat(_T_3455, _T_3444) @[Cat.scala 29:58] + buf_nomerge_in <= _T_3456 @[el2_lsu_bus_buffer.scala 483:20] + node _T_3457 = bits(ibuf_drainvec_vld, 0, 0) @[el2_lsu_bus_buffer.scala 484:67] + node _T_3458 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 484:92] + node _T_3459 = eq(WrPtr1_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 484:120] + node _T_3460 = and(_T_3458, _T_3459) @[el2_lsu_bus_buffer.scala 484:109] + node _T_3461 = mux(_T_3457, ibuf_dual, _T_3460) @[el2_lsu_bus_buffer.scala 484:49] + node _T_3462 = bits(ibuf_drainvec_vld, 1, 1) @[el2_lsu_bus_buffer.scala 484:67] + node _T_3463 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 484:92] + node _T_3464 = eq(WrPtr1_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 484:120] + node _T_3465 = and(_T_3463, _T_3464) @[el2_lsu_bus_buffer.scala 484:109] + node _T_3466 = mux(_T_3462, ibuf_dual, _T_3465) @[el2_lsu_bus_buffer.scala 484:49] + node _T_3467 = bits(ibuf_drainvec_vld, 2, 2) @[el2_lsu_bus_buffer.scala 484:67] + node _T_3468 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 484:92] + node _T_3469 = eq(WrPtr1_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 484:120] + node _T_3470 = and(_T_3468, _T_3469) @[el2_lsu_bus_buffer.scala 484:109] + node _T_3471 = mux(_T_3467, ibuf_dual, _T_3470) @[el2_lsu_bus_buffer.scala 484:49] + node _T_3472 = bits(ibuf_drainvec_vld, 3, 3) @[el2_lsu_bus_buffer.scala 484:67] + node _T_3473 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 484:92] + node _T_3474 = eq(WrPtr1_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 484:120] + node _T_3475 = and(_T_3473, _T_3474) @[el2_lsu_bus_buffer.scala 484:109] + node _T_3476 = mux(_T_3472, ibuf_dual, _T_3475) @[el2_lsu_bus_buffer.scala 484:49] + node _T_3477 = cat(_T_3476, _T_3471) @[Cat.scala 29:58] + node _T_3478 = cat(_T_3477, _T_3466) @[Cat.scala 29:58] + node _T_3479 = cat(_T_3478, _T_3461) @[Cat.scala 29:58] + buf_dualhi_in <= _T_3479 @[el2_lsu_bus_buffer.scala 484:19] + node _T_3480 = bits(ibuf_drainvec_vld, 0, 0) @[el2_lsu_bus_buffer.scala 485:67] + node _T_3481 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 485:99] + node _T_3482 = eq(WrPtr1_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 485:127] + node _T_3483 = and(_T_3481, _T_3482) @[el2_lsu_bus_buffer.scala 485:116] + node _T_3484 = mux(_T_3483, WrPtr0_r, WrPtr1_r) @[el2_lsu_bus_buffer.scala 485:89] + node _T_3485 = mux(_T_3480, ibuf_dualtag, _T_3484) @[el2_lsu_bus_buffer.scala 485:49] + node _T_3486 = bits(ibuf_drainvec_vld, 1, 1) @[el2_lsu_bus_buffer.scala 485:67] + node _T_3487 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 485:99] + node _T_3488 = eq(WrPtr1_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 485:127] + node _T_3489 = and(_T_3487, _T_3488) @[el2_lsu_bus_buffer.scala 485:116] + node _T_3490 = mux(_T_3489, WrPtr0_r, WrPtr1_r) @[el2_lsu_bus_buffer.scala 485:89] + node _T_3491 = mux(_T_3486, ibuf_dualtag, _T_3490) @[el2_lsu_bus_buffer.scala 485:49] + node _T_3492 = bits(ibuf_drainvec_vld, 2, 2) @[el2_lsu_bus_buffer.scala 485:67] + node _T_3493 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 485:99] + node _T_3494 = eq(WrPtr1_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 485:127] + node _T_3495 = and(_T_3493, _T_3494) @[el2_lsu_bus_buffer.scala 485:116] + node _T_3496 = mux(_T_3495, WrPtr0_r, WrPtr1_r) @[el2_lsu_bus_buffer.scala 485:89] + node _T_3497 = mux(_T_3492, ibuf_dualtag, _T_3496) @[el2_lsu_bus_buffer.scala 485:49] + node _T_3498 = bits(ibuf_drainvec_vld, 3, 3) @[el2_lsu_bus_buffer.scala 485:67] + node _T_3499 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 485:99] + node _T_3500 = eq(WrPtr1_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 485:127] + node _T_3501 = and(_T_3499, _T_3500) @[el2_lsu_bus_buffer.scala 485:116] + node _T_3502 = mux(_T_3501, WrPtr0_r, WrPtr1_r) @[el2_lsu_bus_buffer.scala 485:89] + node _T_3503 = mux(_T_3498, ibuf_dualtag, _T_3502) @[el2_lsu_bus_buffer.scala 485:49] + buf_dualtag_in[0] <= _T_3485 @[el2_lsu_bus_buffer.scala 485:20] + buf_dualtag_in[1] <= _T_3491 @[el2_lsu_bus_buffer.scala 485:20] + buf_dualtag_in[2] <= _T_3497 @[el2_lsu_bus_buffer.scala 485:20] + buf_dualtag_in[3] <= _T_3503 @[el2_lsu_bus_buffer.scala 485:20] + node _T_3504 = bits(ibuf_drainvec_vld, 0, 0) @[el2_lsu_bus_buffer.scala 486:71] + node _T_3505 = mux(_T_3504, ibuf_sideeffect, io.is_sideeffects_r) @[el2_lsu_bus_buffer.scala 486:53] + node _T_3506 = bits(ibuf_drainvec_vld, 1, 1) @[el2_lsu_bus_buffer.scala 486:71] + node _T_3507 = mux(_T_3506, ibuf_sideeffect, io.is_sideeffects_r) @[el2_lsu_bus_buffer.scala 486:53] + node _T_3508 = bits(ibuf_drainvec_vld, 2, 2) @[el2_lsu_bus_buffer.scala 486:71] + node _T_3509 = mux(_T_3508, ibuf_sideeffect, io.is_sideeffects_r) @[el2_lsu_bus_buffer.scala 486:53] + node _T_3510 = bits(ibuf_drainvec_vld, 3, 3) @[el2_lsu_bus_buffer.scala 486:71] + node _T_3511 = mux(_T_3510, ibuf_sideeffect, io.is_sideeffects_r) @[el2_lsu_bus_buffer.scala 486:53] + node _T_3512 = cat(_T_3511, _T_3509) @[Cat.scala 29:58] + node _T_3513 = cat(_T_3512, _T_3507) @[Cat.scala 29:58] + node _T_3514 = cat(_T_3513, _T_3505) @[Cat.scala 29:58] + buf_sideeffect_in <= _T_3514 @[el2_lsu_bus_buffer.scala 486:23] + node _T_3515 = bits(ibuf_drainvec_vld, 0, 0) @[el2_lsu_bus_buffer.scala 487:67] + node _T_3516 = mux(_T_3515, ibuf_unsign, io.lsu_pkt_r.unsign) @[el2_lsu_bus_buffer.scala 487:49] + node _T_3517 = bits(ibuf_drainvec_vld, 1, 1) @[el2_lsu_bus_buffer.scala 487:67] + node _T_3518 = mux(_T_3517, ibuf_unsign, io.lsu_pkt_r.unsign) @[el2_lsu_bus_buffer.scala 487:49] + node _T_3519 = bits(ibuf_drainvec_vld, 2, 2) @[el2_lsu_bus_buffer.scala 487:67] + node _T_3520 = mux(_T_3519, ibuf_unsign, io.lsu_pkt_r.unsign) @[el2_lsu_bus_buffer.scala 487:49] + node _T_3521 = bits(ibuf_drainvec_vld, 3, 3) @[el2_lsu_bus_buffer.scala 487:67] + node _T_3522 = mux(_T_3521, ibuf_unsign, io.lsu_pkt_r.unsign) @[el2_lsu_bus_buffer.scala 487:49] + node _T_3523 = cat(_T_3522, _T_3520) @[Cat.scala 29:58] + node _T_3524 = cat(_T_3523, _T_3518) @[Cat.scala 29:58] + node _T_3525 = cat(_T_3524, _T_3516) @[Cat.scala 29:58] + buf_unsign_in <= _T_3525 @[el2_lsu_bus_buffer.scala 487:19] + node _T_3526 = bits(ibuf_drainvec_vld, 0, 0) @[el2_lsu_bus_buffer.scala 488:62] + node _T_3527 = cat(io.lsu_pkt_r.word, io.lsu_pkt_r.half) @[Cat.scala 29:58] + node _T_3528 = mux(_T_3526, ibuf_sz, _T_3527) @[el2_lsu_bus_buffer.scala 488:44] + node _T_3529 = bits(ibuf_drainvec_vld, 1, 1) @[el2_lsu_bus_buffer.scala 488:62] + node _T_3530 = cat(io.lsu_pkt_r.word, io.lsu_pkt_r.half) @[Cat.scala 29:58] + node _T_3531 = mux(_T_3529, ibuf_sz, _T_3530) @[el2_lsu_bus_buffer.scala 488:44] + node _T_3532 = bits(ibuf_drainvec_vld, 2, 2) @[el2_lsu_bus_buffer.scala 488:62] + node _T_3533 = cat(io.lsu_pkt_r.word, io.lsu_pkt_r.half) @[Cat.scala 29:58] + node _T_3534 = mux(_T_3532, ibuf_sz, _T_3533) @[el2_lsu_bus_buffer.scala 488:44] + node _T_3535 = bits(ibuf_drainvec_vld, 3, 3) @[el2_lsu_bus_buffer.scala 488:62] + node _T_3536 = cat(io.lsu_pkt_r.word, io.lsu_pkt_r.half) @[Cat.scala 29:58] + node _T_3537 = mux(_T_3535, ibuf_sz, _T_3536) @[el2_lsu_bus_buffer.scala 488:44] + buf_sz_in[0] <= _T_3528 @[el2_lsu_bus_buffer.scala 488:15] + buf_sz_in[1] <= _T_3531 @[el2_lsu_bus_buffer.scala 488:15] + buf_sz_in[2] <= _T_3534 @[el2_lsu_bus_buffer.scala 488:15] + buf_sz_in[3] <= _T_3537 @[el2_lsu_bus_buffer.scala 488:15] + node _T_3538 = bits(ibuf_drainvec_vld, 0, 0) @[el2_lsu_bus_buffer.scala 489:66] + node _T_3539 = mux(_T_3538, ibuf_write, io.lsu_pkt_r.store) @[el2_lsu_bus_buffer.scala 489:48] + node _T_3540 = bits(ibuf_drainvec_vld, 1, 1) @[el2_lsu_bus_buffer.scala 489:66] + node _T_3541 = mux(_T_3540, ibuf_write, io.lsu_pkt_r.store) @[el2_lsu_bus_buffer.scala 489:48] + node _T_3542 = bits(ibuf_drainvec_vld, 2, 2) @[el2_lsu_bus_buffer.scala 489:66] + node _T_3543 = mux(_T_3542, ibuf_write, io.lsu_pkt_r.store) @[el2_lsu_bus_buffer.scala 489:48] + node _T_3544 = bits(ibuf_drainvec_vld, 3, 3) @[el2_lsu_bus_buffer.scala 489:66] + node _T_3545 = mux(_T_3544, ibuf_write, io.lsu_pkt_r.store) @[el2_lsu_bus_buffer.scala 489:48] + node _T_3546 = cat(_T_3545, _T_3543) @[Cat.scala 29:58] + node _T_3547 = cat(_T_3546, _T_3541) @[Cat.scala 29:58] + node _T_3548 = cat(_T_3547, _T_3539) @[Cat.scala 29:58] + buf_write_in <= _T_3548 @[el2_lsu_bus_buffer.scala 489:18] + node _T_3549 = eq(UInt<3>("h00"), buf_state[0]) @[Conditional.scala 37:30] + when _T_3549 : @[Conditional.scala 40:58] + node _T_3550 = bits(io.lsu_bus_clk_en, 0, 0) @[el2_lsu_bus_buffer.scala 494:56] + node _T_3551 = mux(_T_3550, UInt<3>("h02"), UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 494:31] + buf_nxtstate[0] <= _T_3551 @[el2_lsu_bus_buffer.scala 494:25] + node _T_3552 = and(io.lsu_busreq_r, io.lsu_commit_r) @[el2_lsu_bus_buffer.scala 495:45] + node _T_3553 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 495:77] + node _T_3554 = eq(ibuf_merge_en, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 495:97] + node _T_3555 = and(_T_3553, _T_3554) @[el2_lsu_bus_buffer.scala 495:95] + node _T_3556 = eq(UInt<1>("h00"), WrPtr0_r) @[el2_lsu_bus_buffer.scala 495:117] + node _T_3557 = and(_T_3555, _T_3556) @[el2_lsu_bus_buffer.scala 495:112] + node _T_3558 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 495:144] + node _T_3559 = eq(UInt<1>("h00"), WrPtr1_r) @[el2_lsu_bus_buffer.scala 495:166] + node _T_3560 = and(_T_3558, _T_3559) @[el2_lsu_bus_buffer.scala 495:161] + node _T_3561 = or(_T_3557, _T_3560) @[el2_lsu_bus_buffer.scala 495:132] + node _T_3562 = and(_T_3552, _T_3561) @[el2_lsu_bus_buffer.scala 495:63] + node _T_3563 = eq(UInt<1>("h00"), ibuf_tag) @[el2_lsu_bus_buffer.scala 495:206] + node _T_3564 = and(ibuf_drain_vld, _T_3563) @[el2_lsu_bus_buffer.scala 495:201] + node _T_3565 = or(_T_3562, _T_3564) @[el2_lsu_bus_buffer.scala 495:183] + buf_state_en[0] <= _T_3565 @[el2_lsu_bus_buffer.scala 495:25] + buf_wr_en[0] <= buf_state_en[0] @[el2_lsu_bus_buffer.scala 496:22] + buf_data_en[0] <= buf_state_en[0] @[el2_lsu_bus_buffer.scala 497:24] + node _T_3566 = eq(UInt<1>("h00"), ibuf_tag) @[el2_lsu_bus_buffer.scala 498:52] + node _T_3567 = and(ibuf_drain_vld, _T_3566) @[el2_lsu_bus_buffer.scala 498:47] + node _T_3568 = bits(_T_3567, 0, 0) @[el2_lsu_bus_buffer.scala 498:73] + node _T_3569 = bits(ibuf_data_out, 31, 0) @[el2_lsu_bus_buffer.scala 498:90] + node _T_3570 = bits(store_data_lo_r, 31, 0) @[el2_lsu_bus_buffer.scala 498:114] + node _T_3571 = mux(_T_3568, _T_3569, _T_3570) @[el2_lsu_bus_buffer.scala 498:30] + buf_data_in[0] <= _T_3571 @[el2_lsu_bus_buffer.scala 498:24] + skip @[Conditional.scala 40:58] + else : @[Conditional.scala 39:67] + node _T_3572 = eq(UInt<3>("h01"), buf_state[0]) @[Conditional.scala 37:30] + when _T_3572 : @[Conditional.scala 39:67] + node _T_3573 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 501:60] + node _T_3574 = mux(_T_3573, UInt<3>("h00"), UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 501:31] + buf_nxtstate[0] <= _T_3574 @[el2_lsu_bus_buffer.scala 501:25] + node _T_3575 = or(io.lsu_bus_clk_en, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 502:46] + buf_state_en[0] <= _T_3575 @[el2_lsu_bus_buffer.scala 502:25] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_3576 = eq(UInt<3>("h02"), buf_state[0]) @[Conditional.scala 37:30] + when _T_3576 : @[Conditional.scala 39:67] + node _T_3577 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 505:60] + node _T_3578 = and(obuf_nosend, bus_rsp_read) @[el2_lsu_bus_buffer.scala 505:89] + node _T_3579 = eq(bus_rsp_read_tag, obuf_rdrsp_tag) @[el2_lsu_bus_buffer.scala 505:124] + node _T_3580 = and(_T_3578, _T_3579) @[el2_lsu_bus_buffer.scala 505:104] + node _T_3581 = mux(_T_3580, UInt<3>("h05"), UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 505:75] + node _T_3582 = mux(_T_3577, UInt<3>("h00"), _T_3581) @[el2_lsu_bus_buffer.scala 505:31] + buf_nxtstate[0] <= _T_3582 @[el2_lsu_bus_buffer.scala 505:25] + node _T_3583 = eq(obuf_tag0, UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 506:48] + node _T_3584 = eq(obuf_tag1, UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 506:104] + node _T_3585 = and(obuf_merge, _T_3584) @[el2_lsu_bus_buffer.scala 506:91] + node _T_3586 = or(_T_3583, _T_3585) @[el2_lsu_bus_buffer.scala 506:77] + node _T_3587 = and(_T_3586, obuf_valid) @[el2_lsu_bus_buffer.scala 506:135] + node _T_3588 = and(_T_3587, obuf_wr_enQ) @[el2_lsu_bus_buffer.scala 506:148] + buf_cmd_state_bus_en[0] <= _T_3588 @[el2_lsu_bus_buffer.scala 506:33] + buf_state_bus_en[0] <= buf_cmd_state_bus_en[0] @[el2_lsu_bus_buffer.scala 507:29] + node _T_3589 = and(buf_state_bus_en[0], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 508:49] + node _T_3590 = or(_T_3589, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 508:70] + buf_state_en[0] <= _T_3590 @[el2_lsu_bus_buffer.scala 508:25] + buf_ldfwd_in[0] <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 509:25] + node _T_3591 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 510:56] + node _T_3592 = eq(_T_3591, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 510:46] + node _T_3593 = and(buf_state_en[0], _T_3592) @[el2_lsu_bus_buffer.scala 510:44] + node _T_3594 = and(_T_3593, obuf_nosend) @[el2_lsu_bus_buffer.scala 510:60] + node _T_3595 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 510:76] + node _T_3596 = and(_T_3594, _T_3595) @[el2_lsu_bus_buffer.scala 510:74] + buf_ldfwd_en[0] <= _T_3596 @[el2_lsu_bus_buffer.scala 510:25] + node _T_3597 = bits(obuf_rdrsp_tag, 1, 0) @[el2_lsu_bus_buffer.scala 511:46] + buf_ldfwdtag_in[0] <= _T_3597 @[el2_lsu_bus_buffer.scala 511:28] + node _T_3598 = and(buf_state_bus_en[0], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 512:47] + node _T_3599 = and(_T_3598, obuf_nosend) @[el2_lsu_bus_buffer.scala 512:67] + node _T_3600 = and(_T_3599, bus_rsp_read) @[el2_lsu_bus_buffer.scala 512:81] + buf_data_en[0] <= _T_3600 @[el2_lsu_bus_buffer.scala 512:24] + node _T_3601 = and(buf_state_bus_en[0], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 513:48] + node _T_3602 = and(_T_3601, obuf_nosend) @[el2_lsu_bus_buffer.scala 513:68] + node _T_3603 = and(_T_3602, bus_rsp_read_error) @[el2_lsu_bus_buffer.scala 513:82] + buf_error_en[0] <= _T_3603 @[el2_lsu_bus_buffer.scala 513:25] + node _T_3604 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 514:61] + node _T_3605 = bits(buf_addr[0], 2, 2) @[el2_lsu_bus_buffer.scala 514:85] + node _T_3606 = bits(bus_rsp_rdata, 63, 32) @[el2_lsu_bus_buffer.scala 514:103] + node _T_3607 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 514:126] + node _T_3608 = mux(_T_3605, _T_3606, _T_3607) @[el2_lsu_bus_buffer.scala 514:73] + node _T_3609 = mux(buf_error_en[0], _T_3604, _T_3608) @[el2_lsu_bus_buffer.scala 514:30] + buf_data_in[0] <= _T_3609 @[el2_lsu_bus_buffer.scala 514:24] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_3610 = eq(UInt<3>("h03"), buf_state[0]) @[Conditional.scala 37:30] + when _T_3610 : @[Conditional.scala 39:67] + node _T_3611 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 517:67] + node _T_3612 = and(UInt<1>("h01"), bus_rsp_write_error) @[el2_lsu_bus_buffer.scala 517:94] + node _T_3613 = eq(_T_3612, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 517:73] + node _T_3614 = and(_T_3611, _T_3613) @[el2_lsu_bus_buffer.scala 517:71] + node _T_3615 = or(io.dec_tlu_force_halt, _T_3614) @[el2_lsu_bus_buffer.scala 517:55] + node _T_3616 = bits(_T_3615, 0, 0) @[el2_lsu_bus_buffer.scala 517:125] + node _T_3617 = eq(buf_samedw[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 518:30] + node _T_3618 = and(buf_dual[0], _T_3617) @[el2_lsu_bus_buffer.scala 518:28] + node _T_3619 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 518:57] + node _T_3620 = eq(_T_3619, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 518:47] + node _T_3621 = and(_T_3618, _T_3620) @[el2_lsu_bus_buffer.scala 518:45] + node _T_3622 = neq(buf_state[buf_dualtag[0]], UInt<3>("h04")) @[el2_lsu_bus_buffer.scala 518:90] + node _T_3623 = and(_T_3621, _T_3622) @[el2_lsu_bus_buffer.scala 518:61] + node _T_3624 = bits(buf_ldfwd, 0, 0) @[el2_lsu_bus_buffer.scala 519:27] + node _T_3625 = or(_T_3624, any_done_wait_state) @[el2_lsu_bus_buffer.scala 519:31] + node _T_3626 = eq(buf_samedw[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 519:70] + node _T_3627 = and(buf_dual[0], _T_3626) @[el2_lsu_bus_buffer.scala 519:68] + node _T_3628 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 519:97] + node _T_3629 = eq(_T_3628, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 519:87] + node _T_3630 = and(_T_3627, _T_3629) @[el2_lsu_bus_buffer.scala 519:85] + node _T_3631 = eq(buf_dualtag[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_3632 = bits(buf_ldfwd, 0, 0) @[el2_lsu_bus_buffer.scala 109:129] + node _T_3633 = eq(buf_dualtag[0], UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_3634 = bits(buf_ldfwd, 1, 1) @[el2_lsu_bus_buffer.scala 109:129] + node _T_3635 = eq(buf_dualtag[0], UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_3636 = bits(buf_ldfwd, 2, 2) @[el2_lsu_bus_buffer.scala 109:129] + node _T_3637 = eq(buf_dualtag[0], UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_3638 = bits(buf_ldfwd, 3, 3) @[el2_lsu_bus_buffer.scala 109:129] + node _T_3639 = mux(_T_3631, _T_3632, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_3640 = mux(_T_3633, _T_3634, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_3641 = mux(_T_3635, _T_3636, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_3642 = mux(_T_3637, _T_3638, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_3643 = or(_T_3639, _T_3640) @[Mux.scala 27:72] + node _T_3644 = or(_T_3643, _T_3641) @[Mux.scala 27:72] + node _T_3645 = or(_T_3644, _T_3642) @[Mux.scala 27:72] + wire _T_3646 : UInt<1> @[Mux.scala 27:72] + _T_3646 <= _T_3645 @[Mux.scala 27:72] + node _T_3647 = and(_T_3630, _T_3646) @[el2_lsu_bus_buffer.scala 519:101] + node _T_3648 = eq(buf_state[buf_dualtag[0]], UInt<3>("h04")) @[el2_lsu_bus_buffer.scala 519:167] + node _T_3649 = and(_T_3647, _T_3648) @[el2_lsu_bus_buffer.scala 519:138] + node _T_3650 = and(_T_3649, any_done_wait_state) @[el2_lsu_bus_buffer.scala 519:187] + node _T_3651 = or(_T_3625, _T_3650) @[el2_lsu_bus_buffer.scala 519:53] + node _T_3652 = mux(_T_3651, UInt<3>("h05"), UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 519:16] + node _T_3653 = mux(_T_3623, UInt<3>("h04"), _T_3652) @[el2_lsu_bus_buffer.scala 518:14] + node _T_3654 = mux(_T_3616, UInt<3>("h00"), _T_3653) @[el2_lsu_bus_buffer.scala 517:31] + buf_nxtstate[0] <= _T_3654 @[el2_lsu_bus_buffer.scala 517:25] + node _T_3655 = eq(bus_rsp_write_tag, UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 520:73] + node _T_3656 = and(bus_rsp_write, _T_3655) @[el2_lsu_bus_buffer.scala 520:52] + node _T_3657 = eq(bus_rsp_read_tag, UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 521:46] + node _T_3658 = bits(buf_ldfwd, 0, 0) @[el2_lsu_bus_buffer.scala 522:23] + node _T_3659 = eq(bus_rsp_read_tag, buf_ldfwdtag[0]) @[el2_lsu_bus_buffer.scala 522:47] + node _T_3660 = and(_T_3658, _T_3659) @[el2_lsu_bus_buffer.scala 522:27] + node _T_3661 = or(_T_3657, _T_3660) @[el2_lsu_bus_buffer.scala 521:77] + node _T_3662 = and(buf_dual[0], buf_dualhi[0]) @[el2_lsu_bus_buffer.scala 523:26] + node _T_3663 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 523:54] + node _T_3664 = not(_T_3663) @[el2_lsu_bus_buffer.scala 523:44] + node _T_3665 = and(_T_3662, _T_3664) @[el2_lsu_bus_buffer.scala 523:42] + node _T_3666 = and(_T_3665, buf_samedw[0]) @[el2_lsu_bus_buffer.scala 523:58] + node _T_3667 = eq(bus_rsp_read_tag, buf_dualtag[0]) @[el2_lsu_bus_buffer.scala 523:94] + node _T_3668 = and(_T_3666, _T_3667) @[el2_lsu_bus_buffer.scala 523:74] + node _T_3669 = or(_T_3661, _T_3668) @[el2_lsu_bus_buffer.scala 522:71] + node _T_3670 = and(bus_rsp_read, _T_3669) @[el2_lsu_bus_buffer.scala 521:25] + node _T_3671 = or(_T_3656, _T_3670) @[el2_lsu_bus_buffer.scala 520:105] + buf_resp_state_bus_en[0] <= _T_3671 @[el2_lsu_bus_buffer.scala 520:34] + buf_state_bus_en[0] <= buf_resp_state_bus_en[0] @[el2_lsu_bus_buffer.scala 524:29] + node _T_3672 = and(buf_state_bus_en[0], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 525:49] + node _T_3673 = or(_T_3672, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 525:70] + buf_state_en[0] <= _T_3673 @[el2_lsu_bus_buffer.scala 525:25] + node _T_3674 = and(buf_state_bus_en[0], bus_rsp_read) @[el2_lsu_bus_buffer.scala 526:47] + node _T_3675 = and(_T_3674, io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 526:62] + buf_data_en[0] <= _T_3675 @[el2_lsu_bus_buffer.scala 526:24] + node _T_3676 = and(buf_state_bus_en[0], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 527:48] + node _T_3677 = eq(bus_rsp_read_tag, UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 527:111] + node _T_3678 = and(bus_rsp_read_error, _T_3677) @[el2_lsu_bus_buffer.scala 527:91] + node _T_3679 = bits(buf_ldfwd, 0, 0) @[el2_lsu_bus_buffer.scala 528:42] + node _T_3680 = and(bus_rsp_read_error, _T_3679) @[el2_lsu_bus_buffer.scala 528:31] + node _T_3681 = eq(bus_rsp_read_tag, buf_ldfwdtag[0]) @[el2_lsu_bus_buffer.scala 528:66] + node _T_3682 = and(_T_3680, _T_3681) @[el2_lsu_bus_buffer.scala 528:46] + node _T_3683 = or(_T_3678, _T_3682) @[el2_lsu_bus_buffer.scala 527:143] + node _T_3684 = and(bus_rsp_write_error, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 529:32] + node _T_3685 = eq(bus_rsp_write_tag, UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 529:74] + node _T_3686 = and(_T_3684, _T_3685) @[el2_lsu_bus_buffer.scala 529:53] + node _T_3687 = or(_T_3683, _T_3686) @[el2_lsu_bus_buffer.scala 528:88] + node _T_3688 = and(_T_3676, _T_3687) @[el2_lsu_bus_buffer.scala 527:68] + buf_error_en[0] <= _T_3688 @[el2_lsu_bus_buffer.scala 527:25] + node _T_3689 = eq(buf_error_en[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 530:50] + node _T_3690 = and(buf_state_en[0], _T_3689) @[el2_lsu_bus_buffer.scala 530:48] + node _T_3691 = bits(buf_addr[0], 2, 2) @[el2_lsu_bus_buffer.scala 530:84] + node _T_3692 = bits(bus_rsp_rdata, 63, 32) @[el2_lsu_bus_buffer.scala 530:102] + node _T_3693 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 530:125] + node _T_3694 = mux(_T_3691, _T_3692, _T_3693) @[el2_lsu_bus_buffer.scala 530:72] + node _T_3695 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 530:148] + node _T_3696 = mux(_T_3690, _T_3694, _T_3695) @[el2_lsu_bus_buffer.scala 530:30] + buf_data_in[0] <= _T_3696 @[el2_lsu_bus_buffer.scala 530:24] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_3697 = eq(UInt<3>("h04"), buf_state[0]) @[Conditional.scala 37:30] + when _T_3697 : @[Conditional.scala 39:67] + node _T_3698 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 533:60] + node _T_3699 = bits(buf_ldfwd, 0, 0) @[el2_lsu_bus_buffer.scala 533:86] + node _T_3700 = dshr(buf_ldfwd, buf_dualtag[0]) @[el2_lsu_bus_buffer.scala 533:101] + node _T_3701 = bits(_T_3700, 0, 0) @[el2_lsu_bus_buffer.scala 533:101] + node _T_3702 = or(_T_3699, _T_3701) @[el2_lsu_bus_buffer.scala 533:90] + node _T_3703 = or(_T_3702, any_done_wait_state) @[el2_lsu_bus_buffer.scala 533:118] + node _T_3704 = mux(_T_3703, UInt<3>("h05"), UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 533:75] + node _T_3705 = mux(_T_3698, UInt<3>("h00"), _T_3704) @[el2_lsu_bus_buffer.scala 533:31] + buf_nxtstate[0] <= _T_3705 @[el2_lsu_bus_buffer.scala 533:25] + node _T_3706 = eq(bus_rsp_read_tag, buf_dualtag[0]) @[el2_lsu_bus_buffer.scala 534:66] + node _T_3707 = dshr(buf_ldfwd, buf_dualtag[0]) @[el2_lsu_bus_buffer.scala 535:21] + node _T_3708 = bits(_T_3707, 0, 0) @[el2_lsu_bus_buffer.scala 535:21] + node _T_3709 = eq(bus_rsp_read_tag, buf_ldfwdtag[buf_dualtag[0]]) @[el2_lsu_bus_buffer.scala 535:58] + node _T_3710 = and(_T_3708, _T_3709) @[el2_lsu_bus_buffer.scala 535:38] + node _T_3711 = or(_T_3706, _T_3710) @[el2_lsu_bus_buffer.scala 534:95] + node _T_3712 = and(bus_rsp_read, _T_3711) @[el2_lsu_bus_buffer.scala 534:45] + buf_state_bus_en[0] <= _T_3712 @[el2_lsu_bus_buffer.scala 534:29] + node _T_3713 = and(buf_state_bus_en[0], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 536:49] + node _T_3714 = or(_T_3713, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 536:70] + buf_state_en[0] <= _T_3714 @[el2_lsu_bus_buffer.scala 536:25] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_3715 = eq(UInt<3>("h05"), buf_state[0]) @[Conditional.scala 37:30] + when _T_3715 : @[Conditional.scala 39:67] + node _T_3716 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 539:60] + node _T_3717 = mux(_T_3716, UInt<3>("h00"), UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 539:31] + buf_nxtstate[0] <= _T_3717 @[el2_lsu_bus_buffer.scala 539:25] + node _T_3718 = eq(RspPtr, UInt<2>("h00")) @[el2_lsu_bus_buffer.scala 540:37] + node _T_3719 = eq(buf_dualtag[0], RspPtr) @[el2_lsu_bus_buffer.scala 540:98] + node _T_3720 = and(buf_dual[0], _T_3719) @[el2_lsu_bus_buffer.scala 540:80] + node _T_3721 = or(_T_3718, _T_3720) @[el2_lsu_bus_buffer.scala 540:65] + node _T_3722 = or(_T_3721, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 540:112] + buf_state_en[0] <= _T_3722 @[el2_lsu_bus_buffer.scala 540:25] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_3723 = eq(UInt<3>("h06"), buf_state[0]) @[Conditional.scala 37:30] + when _T_3723 : @[Conditional.scala 39:67] + buf_nxtstate[0] <= UInt<3>("h00") @[el2_lsu_bus_buffer.scala 543:25] + buf_rst[0] <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 544:20] + buf_state_en[0] <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 545:25] + buf_ldfwd_in[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 546:25] + buf_ldfwd_en[0] <= buf_state_en[0] @[el2_lsu_bus_buffer.scala 547:25] + skip @[Conditional.scala 39:67] + node _T_3724 = bits(buf_state_en[0], 0, 0) @[el2_lsu_bus_buffer.scala 550:108] + reg _T_3725 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_3724 : @[Reg.scala 28:19] + _T_3725 <= buf_nxtstate[0] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_state[0] <= _T_3725 @[el2_lsu_bus_buffer.scala 550:18] + reg _T_3726 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 551:60] + _T_3726 <= buf_age_in_0 @[el2_lsu_bus_buffer.scala 551:60] + buf_ageQ[0] <= _T_3726 @[el2_lsu_bus_buffer.scala 551:17] + reg _T_3727 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 552:63] + _T_3727 <= buf_rspage_in[0] @[el2_lsu_bus_buffer.scala 552:63] + buf_rspageQ[0] <= _T_3727 @[el2_lsu_bus_buffer.scala 552:20] + node _T_3728 = bits(buf_wr_en[0], 0, 0) @[el2_lsu_bus_buffer.scala 553:109] + reg _T_3729 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_3728 : @[Reg.scala 28:19] + _T_3729 <= buf_dualtag_in[0] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_dualtag[0] <= _T_3729 @[el2_lsu_bus_buffer.scala 553:20] + node _T_3730 = bits(buf_dual_in, 0, 0) @[el2_lsu_bus_buffer.scala 554:74] + node _T_3731 = bits(buf_wr_en[0], 0, 0) @[el2_lsu_bus_buffer.scala 554:107] + reg _T_3732 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_3731 : @[Reg.scala 28:19] + _T_3732 <= _T_3730 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_dual[0] <= _T_3732 @[el2_lsu_bus_buffer.scala 554:17] + node _T_3733 = bits(buf_samedw_in, 0, 0) @[el2_lsu_bus_buffer.scala 555:78] + node _T_3734 = bits(buf_wr_en[0], 0, 0) @[el2_lsu_bus_buffer.scala 555:111] + reg _T_3735 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_3734 : @[Reg.scala 28:19] + _T_3735 <= _T_3733 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_samedw[0] <= _T_3735 @[el2_lsu_bus_buffer.scala 555:19] + node _T_3736 = bits(buf_nomerge_in, 0, 0) @[el2_lsu_bus_buffer.scala 556:80] + node _T_3737 = bits(buf_wr_en[0], 0, 0) @[el2_lsu_bus_buffer.scala 556:113] + reg _T_3738 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_3737 : @[Reg.scala 28:19] + _T_3738 <= _T_3736 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_nomerge[0] <= _T_3738 @[el2_lsu_bus_buffer.scala 556:20] + node _T_3739 = bits(buf_dualhi_in, 0, 0) @[el2_lsu_bus_buffer.scala 557:78] + node _T_3740 = bits(buf_wr_en[0], 0, 0) @[el2_lsu_bus_buffer.scala 557:111] + reg _T_3741 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_3740 : @[Reg.scala 28:19] + _T_3741 <= _T_3739 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_dualhi[0] <= _T_3741 @[el2_lsu_bus_buffer.scala 557:19] + node _T_3742 = eq(UInt<3>("h00"), buf_state[1]) @[Conditional.scala 37:30] + when _T_3742 : @[Conditional.scala 40:58] + node _T_3743 = bits(io.lsu_bus_clk_en, 0, 0) @[el2_lsu_bus_buffer.scala 494:56] + node _T_3744 = mux(_T_3743, UInt<3>("h02"), UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 494:31] + buf_nxtstate[1] <= _T_3744 @[el2_lsu_bus_buffer.scala 494:25] + node _T_3745 = and(io.lsu_busreq_r, io.lsu_commit_r) @[el2_lsu_bus_buffer.scala 495:45] + node _T_3746 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 495:77] + node _T_3747 = eq(ibuf_merge_en, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 495:97] + node _T_3748 = and(_T_3746, _T_3747) @[el2_lsu_bus_buffer.scala 495:95] + node _T_3749 = eq(UInt<1>("h01"), WrPtr0_r) @[el2_lsu_bus_buffer.scala 495:117] + node _T_3750 = and(_T_3748, _T_3749) @[el2_lsu_bus_buffer.scala 495:112] + node _T_3751 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 495:144] + node _T_3752 = eq(UInt<1>("h01"), WrPtr1_r) @[el2_lsu_bus_buffer.scala 495:166] + node _T_3753 = and(_T_3751, _T_3752) @[el2_lsu_bus_buffer.scala 495:161] + node _T_3754 = or(_T_3750, _T_3753) @[el2_lsu_bus_buffer.scala 495:132] + node _T_3755 = and(_T_3745, _T_3754) @[el2_lsu_bus_buffer.scala 495:63] + node _T_3756 = eq(UInt<1>("h01"), ibuf_tag) @[el2_lsu_bus_buffer.scala 495:206] + node _T_3757 = and(ibuf_drain_vld, _T_3756) @[el2_lsu_bus_buffer.scala 495:201] + node _T_3758 = or(_T_3755, _T_3757) @[el2_lsu_bus_buffer.scala 495:183] + buf_state_en[1] <= _T_3758 @[el2_lsu_bus_buffer.scala 495:25] + buf_wr_en[1] <= buf_state_en[1] @[el2_lsu_bus_buffer.scala 496:22] + buf_data_en[1] <= buf_state_en[1] @[el2_lsu_bus_buffer.scala 497:24] + node _T_3759 = eq(UInt<1>("h01"), ibuf_tag) @[el2_lsu_bus_buffer.scala 498:52] + node _T_3760 = and(ibuf_drain_vld, _T_3759) @[el2_lsu_bus_buffer.scala 498:47] + node _T_3761 = bits(_T_3760, 0, 0) @[el2_lsu_bus_buffer.scala 498:73] + node _T_3762 = bits(ibuf_data_out, 31, 0) @[el2_lsu_bus_buffer.scala 498:90] + node _T_3763 = bits(store_data_lo_r, 31, 0) @[el2_lsu_bus_buffer.scala 498:114] + node _T_3764 = mux(_T_3761, _T_3762, _T_3763) @[el2_lsu_bus_buffer.scala 498:30] + buf_data_in[1] <= _T_3764 @[el2_lsu_bus_buffer.scala 498:24] + skip @[Conditional.scala 40:58] + else : @[Conditional.scala 39:67] + node _T_3765 = eq(UInt<3>("h01"), buf_state[1]) @[Conditional.scala 37:30] + when _T_3765 : @[Conditional.scala 39:67] + node _T_3766 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 501:60] + node _T_3767 = mux(_T_3766, UInt<3>("h00"), UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 501:31] + buf_nxtstate[1] <= _T_3767 @[el2_lsu_bus_buffer.scala 501:25] + node _T_3768 = or(io.lsu_bus_clk_en, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 502:46] + buf_state_en[1] <= _T_3768 @[el2_lsu_bus_buffer.scala 502:25] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_3769 = eq(UInt<3>("h02"), buf_state[1]) @[Conditional.scala 37:30] + when _T_3769 : @[Conditional.scala 39:67] + node _T_3770 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 505:60] + node _T_3771 = and(obuf_nosend, bus_rsp_read) @[el2_lsu_bus_buffer.scala 505:89] + node _T_3772 = eq(bus_rsp_read_tag, obuf_rdrsp_tag) @[el2_lsu_bus_buffer.scala 505:124] + node _T_3773 = and(_T_3771, _T_3772) @[el2_lsu_bus_buffer.scala 505:104] + node _T_3774 = mux(_T_3773, UInt<3>("h05"), UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 505:75] + node _T_3775 = mux(_T_3770, UInt<3>("h00"), _T_3774) @[el2_lsu_bus_buffer.scala 505:31] + buf_nxtstate[1] <= _T_3775 @[el2_lsu_bus_buffer.scala 505:25] + node _T_3776 = eq(obuf_tag0, UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 506:48] + node _T_3777 = eq(obuf_tag1, UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 506:104] + node _T_3778 = and(obuf_merge, _T_3777) @[el2_lsu_bus_buffer.scala 506:91] + node _T_3779 = or(_T_3776, _T_3778) @[el2_lsu_bus_buffer.scala 506:77] + node _T_3780 = and(_T_3779, obuf_valid) @[el2_lsu_bus_buffer.scala 506:135] + node _T_3781 = and(_T_3780, obuf_wr_enQ) @[el2_lsu_bus_buffer.scala 506:148] + buf_cmd_state_bus_en[1] <= _T_3781 @[el2_lsu_bus_buffer.scala 506:33] + buf_state_bus_en[1] <= buf_cmd_state_bus_en[1] @[el2_lsu_bus_buffer.scala 507:29] + node _T_3782 = and(buf_state_bus_en[1], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 508:49] + node _T_3783 = or(_T_3782, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 508:70] + buf_state_en[1] <= _T_3783 @[el2_lsu_bus_buffer.scala 508:25] + buf_ldfwd_in[1] <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 509:25] + node _T_3784 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 510:56] + node _T_3785 = eq(_T_3784, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 510:46] + node _T_3786 = and(buf_state_en[1], _T_3785) @[el2_lsu_bus_buffer.scala 510:44] + node _T_3787 = and(_T_3786, obuf_nosend) @[el2_lsu_bus_buffer.scala 510:60] + node _T_3788 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 510:76] + node _T_3789 = and(_T_3787, _T_3788) @[el2_lsu_bus_buffer.scala 510:74] + buf_ldfwd_en[1] <= _T_3789 @[el2_lsu_bus_buffer.scala 510:25] + node _T_3790 = bits(obuf_rdrsp_tag, 1, 0) @[el2_lsu_bus_buffer.scala 511:46] + buf_ldfwdtag_in[1] <= _T_3790 @[el2_lsu_bus_buffer.scala 511:28] + node _T_3791 = and(buf_state_bus_en[1], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 512:47] + node _T_3792 = and(_T_3791, obuf_nosend) @[el2_lsu_bus_buffer.scala 512:67] + node _T_3793 = and(_T_3792, bus_rsp_read) @[el2_lsu_bus_buffer.scala 512:81] + buf_data_en[1] <= _T_3793 @[el2_lsu_bus_buffer.scala 512:24] + node _T_3794 = and(buf_state_bus_en[1], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 513:48] + node _T_3795 = and(_T_3794, obuf_nosend) @[el2_lsu_bus_buffer.scala 513:68] + node _T_3796 = and(_T_3795, bus_rsp_read_error) @[el2_lsu_bus_buffer.scala 513:82] + buf_error_en[1] <= _T_3796 @[el2_lsu_bus_buffer.scala 513:25] + node _T_3797 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 514:61] + node _T_3798 = bits(buf_addr[1], 2, 2) @[el2_lsu_bus_buffer.scala 514:85] + node _T_3799 = bits(bus_rsp_rdata, 63, 32) @[el2_lsu_bus_buffer.scala 514:103] + node _T_3800 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 514:126] + node _T_3801 = mux(_T_3798, _T_3799, _T_3800) @[el2_lsu_bus_buffer.scala 514:73] + node _T_3802 = mux(buf_error_en[1], _T_3797, _T_3801) @[el2_lsu_bus_buffer.scala 514:30] + buf_data_in[1] <= _T_3802 @[el2_lsu_bus_buffer.scala 514:24] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_3803 = eq(UInt<3>("h03"), buf_state[1]) @[Conditional.scala 37:30] + when _T_3803 : @[Conditional.scala 39:67] + node _T_3804 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 517:67] + node _T_3805 = and(UInt<1>("h01"), bus_rsp_write_error) @[el2_lsu_bus_buffer.scala 517:94] + node _T_3806 = eq(_T_3805, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 517:73] + node _T_3807 = and(_T_3804, _T_3806) @[el2_lsu_bus_buffer.scala 517:71] + node _T_3808 = or(io.dec_tlu_force_halt, _T_3807) @[el2_lsu_bus_buffer.scala 517:55] + node _T_3809 = bits(_T_3808, 0, 0) @[el2_lsu_bus_buffer.scala 517:125] + node _T_3810 = eq(buf_samedw[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 518:30] + node _T_3811 = and(buf_dual[1], _T_3810) @[el2_lsu_bus_buffer.scala 518:28] + node _T_3812 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 518:57] + node _T_3813 = eq(_T_3812, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 518:47] + node _T_3814 = and(_T_3811, _T_3813) @[el2_lsu_bus_buffer.scala 518:45] + node _T_3815 = neq(buf_state[buf_dualtag[1]], UInt<3>("h04")) @[el2_lsu_bus_buffer.scala 518:90] + node _T_3816 = and(_T_3814, _T_3815) @[el2_lsu_bus_buffer.scala 518:61] + node _T_3817 = bits(buf_ldfwd, 1, 1) @[el2_lsu_bus_buffer.scala 519:27] + node _T_3818 = or(_T_3817, any_done_wait_state) @[el2_lsu_bus_buffer.scala 519:31] + node _T_3819 = eq(buf_samedw[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 519:70] + node _T_3820 = and(buf_dual[1], _T_3819) @[el2_lsu_bus_buffer.scala 519:68] + node _T_3821 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 519:97] + node _T_3822 = eq(_T_3821, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 519:87] + node _T_3823 = and(_T_3820, _T_3822) @[el2_lsu_bus_buffer.scala 519:85] + node _T_3824 = eq(buf_dualtag[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_3825 = bits(buf_ldfwd, 0, 0) @[el2_lsu_bus_buffer.scala 109:129] + node _T_3826 = eq(buf_dualtag[1], UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_3827 = bits(buf_ldfwd, 1, 1) @[el2_lsu_bus_buffer.scala 109:129] + node _T_3828 = eq(buf_dualtag[1], UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_3829 = bits(buf_ldfwd, 2, 2) @[el2_lsu_bus_buffer.scala 109:129] + node _T_3830 = eq(buf_dualtag[1], UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_3831 = bits(buf_ldfwd, 3, 3) @[el2_lsu_bus_buffer.scala 109:129] + node _T_3832 = mux(_T_3824, _T_3825, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_3833 = mux(_T_3826, _T_3827, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_3834 = mux(_T_3828, _T_3829, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_3835 = mux(_T_3830, _T_3831, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_3836 = or(_T_3832, _T_3833) @[Mux.scala 27:72] + node _T_3837 = or(_T_3836, _T_3834) @[Mux.scala 27:72] + node _T_3838 = or(_T_3837, _T_3835) @[Mux.scala 27:72] + wire _T_3839 : UInt<1> @[Mux.scala 27:72] + _T_3839 <= _T_3838 @[Mux.scala 27:72] + node _T_3840 = and(_T_3823, _T_3839) @[el2_lsu_bus_buffer.scala 519:101] + node _T_3841 = eq(buf_state[buf_dualtag[1]], UInt<3>("h04")) @[el2_lsu_bus_buffer.scala 519:167] + node _T_3842 = and(_T_3840, _T_3841) @[el2_lsu_bus_buffer.scala 519:138] + node _T_3843 = and(_T_3842, any_done_wait_state) @[el2_lsu_bus_buffer.scala 519:187] + node _T_3844 = or(_T_3818, _T_3843) @[el2_lsu_bus_buffer.scala 519:53] + node _T_3845 = mux(_T_3844, UInt<3>("h05"), UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 519:16] + node _T_3846 = mux(_T_3816, UInt<3>("h04"), _T_3845) @[el2_lsu_bus_buffer.scala 518:14] + node _T_3847 = mux(_T_3809, UInt<3>("h00"), _T_3846) @[el2_lsu_bus_buffer.scala 517:31] + buf_nxtstate[1] <= _T_3847 @[el2_lsu_bus_buffer.scala 517:25] + node _T_3848 = eq(bus_rsp_write_tag, UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 520:73] + node _T_3849 = and(bus_rsp_write, _T_3848) @[el2_lsu_bus_buffer.scala 520:52] + node _T_3850 = eq(bus_rsp_read_tag, UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 521:46] + node _T_3851 = bits(buf_ldfwd, 1, 1) @[el2_lsu_bus_buffer.scala 522:23] + node _T_3852 = eq(bus_rsp_read_tag, buf_ldfwdtag[1]) @[el2_lsu_bus_buffer.scala 522:47] + node _T_3853 = and(_T_3851, _T_3852) @[el2_lsu_bus_buffer.scala 522:27] + node _T_3854 = or(_T_3850, _T_3853) @[el2_lsu_bus_buffer.scala 521:77] + node _T_3855 = and(buf_dual[1], buf_dualhi[1]) @[el2_lsu_bus_buffer.scala 523:26] + node _T_3856 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 523:54] + node _T_3857 = not(_T_3856) @[el2_lsu_bus_buffer.scala 523:44] + node _T_3858 = and(_T_3855, _T_3857) @[el2_lsu_bus_buffer.scala 523:42] + node _T_3859 = and(_T_3858, buf_samedw[1]) @[el2_lsu_bus_buffer.scala 523:58] + node _T_3860 = eq(bus_rsp_read_tag, buf_dualtag[1]) @[el2_lsu_bus_buffer.scala 523:94] + node _T_3861 = and(_T_3859, _T_3860) @[el2_lsu_bus_buffer.scala 523:74] + node _T_3862 = or(_T_3854, _T_3861) @[el2_lsu_bus_buffer.scala 522:71] + node _T_3863 = and(bus_rsp_read, _T_3862) @[el2_lsu_bus_buffer.scala 521:25] + node _T_3864 = or(_T_3849, _T_3863) @[el2_lsu_bus_buffer.scala 520:105] + buf_resp_state_bus_en[1] <= _T_3864 @[el2_lsu_bus_buffer.scala 520:34] + buf_state_bus_en[1] <= buf_resp_state_bus_en[1] @[el2_lsu_bus_buffer.scala 524:29] + node _T_3865 = and(buf_state_bus_en[1], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 525:49] + node _T_3866 = or(_T_3865, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 525:70] + buf_state_en[1] <= _T_3866 @[el2_lsu_bus_buffer.scala 525:25] + node _T_3867 = and(buf_state_bus_en[1], bus_rsp_read) @[el2_lsu_bus_buffer.scala 526:47] + node _T_3868 = and(_T_3867, io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 526:62] + buf_data_en[1] <= _T_3868 @[el2_lsu_bus_buffer.scala 526:24] + node _T_3869 = and(buf_state_bus_en[1], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 527:48] + node _T_3870 = eq(bus_rsp_read_tag, UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 527:111] + node _T_3871 = and(bus_rsp_read_error, _T_3870) @[el2_lsu_bus_buffer.scala 527:91] + node _T_3872 = bits(buf_ldfwd, 1, 1) @[el2_lsu_bus_buffer.scala 528:42] + node _T_3873 = and(bus_rsp_read_error, _T_3872) @[el2_lsu_bus_buffer.scala 528:31] + node _T_3874 = eq(bus_rsp_read_tag, buf_ldfwdtag[1]) @[el2_lsu_bus_buffer.scala 528:66] + node _T_3875 = and(_T_3873, _T_3874) @[el2_lsu_bus_buffer.scala 528:46] + node _T_3876 = or(_T_3871, _T_3875) @[el2_lsu_bus_buffer.scala 527:143] + node _T_3877 = and(bus_rsp_write_error, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 529:32] + node _T_3878 = eq(bus_rsp_write_tag, UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 529:74] + node _T_3879 = and(_T_3877, _T_3878) @[el2_lsu_bus_buffer.scala 529:53] + node _T_3880 = or(_T_3876, _T_3879) @[el2_lsu_bus_buffer.scala 528:88] + node _T_3881 = and(_T_3869, _T_3880) @[el2_lsu_bus_buffer.scala 527:68] + buf_error_en[1] <= _T_3881 @[el2_lsu_bus_buffer.scala 527:25] + node _T_3882 = eq(buf_error_en[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 530:50] + node _T_3883 = and(buf_state_en[1], _T_3882) @[el2_lsu_bus_buffer.scala 530:48] + node _T_3884 = bits(buf_addr[1], 2, 2) @[el2_lsu_bus_buffer.scala 530:84] + node _T_3885 = bits(bus_rsp_rdata, 63, 32) @[el2_lsu_bus_buffer.scala 530:102] + node _T_3886 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 530:125] + node _T_3887 = mux(_T_3884, _T_3885, _T_3886) @[el2_lsu_bus_buffer.scala 530:72] + node _T_3888 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 530:148] + node _T_3889 = mux(_T_3883, _T_3887, _T_3888) @[el2_lsu_bus_buffer.scala 530:30] + buf_data_in[1] <= _T_3889 @[el2_lsu_bus_buffer.scala 530:24] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_3890 = eq(UInt<3>("h04"), buf_state[1]) @[Conditional.scala 37:30] + when _T_3890 : @[Conditional.scala 39:67] + node _T_3891 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 533:60] + node _T_3892 = bits(buf_ldfwd, 1, 1) @[el2_lsu_bus_buffer.scala 533:86] + node _T_3893 = dshr(buf_ldfwd, buf_dualtag[1]) @[el2_lsu_bus_buffer.scala 533:101] + node _T_3894 = bits(_T_3893, 0, 0) @[el2_lsu_bus_buffer.scala 533:101] + node _T_3895 = or(_T_3892, _T_3894) @[el2_lsu_bus_buffer.scala 533:90] + node _T_3896 = or(_T_3895, any_done_wait_state) @[el2_lsu_bus_buffer.scala 533:118] + node _T_3897 = mux(_T_3896, UInt<3>("h05"), UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 533:75] + node _T_3898 = mux(_T_3891, UInt<3>("h00"), _T_3897) @[el2_lsu_bus_buffer.scala 533:31] + buf_nxtstate[1] <= _T_3898 @[el2_lsu_bus_buffer.scala 533:25] + node _T_3899 = eq(bus_rsp_read_tag, buf_dualtag[1]) @[el2_lsu_bus_buffer.scala 534:66] + node _T_3900 = dshr(buf_ldfwd, buf_dualtag[1]) @[el2_lsu_bus_buffer.scala 535:21] + node _T_3901 = bits(_T_3900, 0, 0) @[el2_lsu_bus_buffer.scala 535:21] + node _T_3902 = eq(bus_rsp_read_tag, buf_ldfwdtag[buf_dualtag[1]]) @[el2_lsu_bus_buffer.scala 535:58] + node _T_3903 = and(_T_3901, _T_3902) @[el2_lsu_bus_buffer.scala 535:38] + node _T_3904 = or(_T_3899, _T_3903) @[el2_lsu_bus_buffer.scala 534:95] + node _T_3905 = and(bus_rsp_read, _T_3904) @[el2_lsu_bus_buffer.scala 534:45] + buf_state_bus_en[1] <= _T_3905 @[el2_lsu_bus_buffer.scala 534:29] + node _T_3906 = and(buf_state_bus_en[1], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 536:49] + node _T_3907 = or(_T_3906, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 536:70] + buf_state_en[1] <= _T_3907 @[el2_lsu_bus_buffer.scala 536:25] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_3908 = eq(UInt<3>("h05"), buf_state[1]) @[Conditional.scala 37:30] + when _T_3908 : @[Conditional.scala 39:67] + node _T_3909 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 539:60] + node _T_3910 = mux(_T_3909, UInt<3>("h00"), UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 539:31] + buf_nxtstate[1] <= _T_3910 @[el2_lsu_bus_buffer.scala 539:25] + node _T_3911 = eq(RspPtr, UInt<2>("h01")) @[el2_lsu_bus_buffer.scala 540:37] + node _T_3912 = eq(buf_dualtag[1], RspPtr) @[el2_lsu_bus_buffer.scala 540:98] + node _T_3913 = and(buf_dual[1], _T_3912) @[el2_lsu_bus_buffer.scala 540:80] + node _T_3914 = or(_T_3911, _T_3913) @[el2_lsu_bus_buffer.scala 540:65] + node _T_3915 = or(_T_3914, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 540:112] + buf_state_en[1] <= _T_3915 @[el2_lsu_bus_buffer.scala 540:25] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_3916 = eq(UInt<3>("h06"), buf_state[1]) @[Conditional.scala 37:30] + when _T_3916 : @[Conditional.scala 39:67] + buf_nxtstate[1] <= UInt<3>("h00") @[el2_lsu_bus_buffer.scala 543:25] + buf_rst[1] <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 544:20] + buf_state_en[1] <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 545:25] + buf_ldfwd_in[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 546:25] + buf_ldfwd_en[1] <= buf_state_en[1] @[el2_lsu_bus_buffer.scala 547:25] + skip @[Conditional.scala 39:67] + node _T_3917 = bits(buf_state_en[1], 0, 0) @[el2_lsu_bus_buffer.scala 550:108] + reg _T_3918 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_3917 : @[Reg.scala 28:19] + _T_3918 <= buf_nxtstate[1] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_state[1] <= _T_3918 @[el2_lsu_bus_buffer.scala 550:18] + reg _T_3919 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 551:60] + _T_3919 <= buf_age_in_1 @[el2_lsu_bus_buffer.scala 551:60] + buf_ageQ[1] <= _T_3919 @[el2_lsu_bus_buffer.scala 551:17] + reg _T_3920 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 552:63] + _T_3920 <= buf_rspage_in[1] @[el2_lsu_bus_buffer.scala 552:63] + buf_rspageQ[1] <= _T_3920 @[el2_lsu_bus_buffer.scala 552:20] + node _T_3921 = bits(buf_wr_en[1], 0, 0) @[el2_lsu_bus_buffer.scala 553:109] + reg _T_3922 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_3921 : @[Reg.scala 28:19] + _T_3922 <= buf_dualtag_in[1] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_dualtag[1] <= _T_3922 @[el2_lsu_bus_buffer.scala 553:20] + node _T_3923 = bits(buf_dual_in, 1, 1) @[el2_lsu_bus_buffer.scala 554:74] + node _T_3924 = bits(buf_wr_en[1], 0, 0) @[el2_lsu_bus_buffer.scala 554:107] + reg _T_3925 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_3924 : @[Reg.scala 28:19] + _T_3925 <= _T_3923 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_dual[1] <= _T_3925 @[el2_lsu_bus_buffer.scala 554:17] + node _T_3926 = bits(buf_samedw_in, 1, 1) @[el2_lsu_bus_buffer.scala 555:78] + node _T_3927 = bits(buf_wr_en[1], 0, 0) @[el2_lsu_bus_buffer.scala 555:111] + reg _T_3928 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_3927 : @[Reg.scala 28:19] + _T_3928 <= _T_3926 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_samedw[1] <= _T_3928 @[el2_lsu_bus_buffer.scala 555:19] + node _T_3929 = bits(buf_nomerge_in, 1, 1) @[el2_lsu_bus_buffer.scala 556:80] + node _T_3930 = bits(buf_wr_en[1], 0, 0) @[el2_lsu_bus_buffer.scala 556:113] + reg _T_3931 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_3930 : @[Reg.scala 28:19] + _T_3931 <= _T_3929 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_nomerge[1] <= _T_3931 @[el2_lsu_bus_buffer.scala 556:20] + node _T_3932 = bits(buf_dualhi_in, 1, 1) @[el2_lsu_bus_buffer.scala 557:78] + node _T_3933 = bits(buf_wr_en[1], 0, 0) @[el2_lsu_bus_buffer.scala 557:111] + reg _T_3934 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_3933 : @[Reg.scala 28:19] + _T_3934 <= _T_3932 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_dualhi[1] <= _T_3934 @[el2_lsu_bus_buffer.scala 557:19] + node _T_3935 = eq(UInt<3>("h00"), buf_state[2]) @[Conditional.scala 37:30] + when _T_3935 : @[Conditional.scala 40:58] + node _T_3936 = bits(io.lsu_bus_clk_en, 0, 0) @[el2_lsu_bus_buffer.scala 494:56] + node _T_3937 = mux(_T_3936, UInt<3>("h02"), UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 494:31] + buf_nxtstate[2] <= _T_3937 @[el2_lsu_bus_buffer.scala 494:25] + node _T_3938 = and(io.lsu_busreq_r, io.lsu_commit_r) @[el2_lsu_bus_buffer.scala 495:45] + node _T_3939 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 495:77] + node _T_3940 = eq(ibuf_merge_en, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 495:97] + node _T_3941 = and(_T_3939, _T_3940) @[el2_lsu_bus_buffer.scala 495:95] + node _T_3942 = eq(UInt<2>("h02"), WrPtr0_r) @[el2_lsu_bus_buffer.scala 495:117] + node _T_3943 = and(_T_3941, _T_3942) @[el2_lsu_bus_buffer.scala 495:112] + node _T_3944 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 495:144] + node _T_3945 = eq(UInt<2>("h02"), WrPtr1_r) @[el2_lsu_bus_buffer.scala 495:166] + node _T_3946 = and(_T_3944, _T_3945) @[el2_lsu_bus_buffer.scala 495:161] + node _T_3947 = or(_T_3943, _T_3946) @[el2_lsu_bus_buffer.scala 495:132] + node _T_3948 = and(_T_3938, _T_3947) @[el2_lsu_bus_buffer.scala 495:63] + node _T_3949 = eq(UInt<2>("h02"), ibuf_tag) @[el2_lsu_bus_buffer.scala 495:206] + node _T_3950 = and(ibuf_drain_vld, _T_3949) @[el2_lsu_bus_buffer.scala 495:201] + node _T_3951 = or(_T_3948, _T_3950) @[el2_lsu_bus_buffer.scala 495:183] + buf_state_en[2] <= _T_3951 @[el2_lsu_bus_buffer.scala 495:25] + buf_wr_en[2] <= buf_state_en[2] @[el2_lsu_bus_buffer.scala 496:22] + buf_data_en[2] <= buf_state_en[2] @[el2_lsu_bus_buffer.scala 497:24] + node _T_3952 = eq(UInt<2>("h02"), ibuf_tag) @[el2_lsu_bus_buffer.scala 498:52] + node _T_3953 = and(ibuf_drain_vld, _T_3952) @[el2_lsu_bus_buffer.scala 498:47] + node _T_3954 = bits(_T_3953, 0, 0) @[el2_lsu_bus_buffer.scala 498:73] + node _T_3955 = bits(ibuf_data_out, 31, 0) @[el2_lsu_bus_buffer.scala 498:90] + node _T_3956 = bits(store_data_lo_r, 31, 0) @[el2_lsu_bus_buffer.scala 498:114] + node _T_3957 = mux(_T_3954, _T_3955, _T_3956) @[el2_lsu_bus_buffer.scala 498:30] + buf_data_in[2] <= _T_3957 @[el2_lsu_bus_buffer.scala 498:24] + skip @[Conditional.scala 40:58] + else : @[Conditional.scala 39:67] + node _T_3958 = eq(UInt<3>("h01"), buf_state[2]) @[Conditional.scala 37:30] + when _T_3958 : @[Conditional.scala 39:67] + node _T_3959 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 501:60] + node _T_3960 = mux(_T_3959, UInt<3>("h00"), UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 501:31] + buf_nxtstate[2] <= _T_3960 @[el2_lsu_bus_buffer.scala 501:25] + node _T_3961 = or(io.lsu_bus_clk_en, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 502:46] + buf_state_en[2] <= _T_3961 @[el2_lsu_bus_buffer.scala 502:25] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_3962 = eq(UInt<3>("h02"), buf_state[2]) @[Conditional.scala 37:30] + when _T_3962 : @[Conditional.scala 39:67] + node _T_3963 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 505:60] + node _T_3964 = and(obuf_nosend, bus_rsp_read) @[el2_lsu_bus_buffer.scala 505:89] + node _T_3965 = eq(bus_rsp_read_tag, obuf_rdrsp_tag) @[el2_lsu_bus_buffer.scala 505:124] + node _T_3966 = and(_T_3964, _T_3965) @[el2_lsu_bus_buffer.scala 505:104] + node _T_3967 = mux(_T_3966, UInt<3>("h05"), UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 505:75] + node _T_3968 = mux(_T_3963, UInt<3>("h00"), _T_3967) @[el2_lsu_bus_buffer.scala 505:31] + buf_nxtstate[2] <= _T_3968 @[el2_lsu_bus_buffer.scala 505:25] + node _T_3969 = eq(obuf_tag0, UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 506:48] + node _T_3970 = eq(obuf_tag1, UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 506:104] + node _T_3971 = and(obuf_merge, _T_3970) @[el2_lsu_bus_buffer.scala 506:91] + node _T_3972 = or(_T_3969, _T_3971) @[el2_lsu_bus_buffer.scala 506:77] + node _T_3973 = and(_T_3972, obuf_valid) @[el2_lsu_bus_buffer.scala 506:135] + node _T_3974 = and(_T_3973, obuf_wr_enQ) @[el2_lsu_bus_buffer.scala 506:148] + buf_cmd_state_bus_en[2] <= _T_3974 @[el2_lsu_bus_buffer.scala 506:33] + buf_state_bus_en[2] <= buf_cmd_state_bus_en[2] @[el2_lsu_bus_buffer.scala 507:29] + node _T_3975 = and(buf_state_bus_en[2], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 508:49] + node _T_3976 = or(_T_3975, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 508:70] + buf_state_en[2] <= _T_3976 @[el2_lsu_bus_buffer.scala 508:25] + buf_ldfwd_in[2] <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 509:25] + node _T_3977 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 510:56] + node _T_3978 = eq(_T_3977, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 510:46] + node _T_3979 = and(buf_state_en[2], _T_3978) @[el2_lsu_bus_buffer.scala 510:44] + node _T_3980 = and(_T_3979, obuf_nosend) @[el2_lsu_bus_buffer.scala 510:60] + node _T_3981 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 510:76] + node _T_3982 = and(_T_3980, _T_3981) @[el2_lsu_bus_buffer.scala 510:74] + buf_ldfwd_en[2] <= _T_3982 @[el2_lsu_bus_buffer.scala 510:25] + node _T_3983 = bits(obuf_rdrsp_tag, 1, 0) @[el2_lsu_bus_buffer.scala 511:46] + buf_ldfwdtag_in[2] <= _T_3983 @[el2_lsu_bus_buffer.scala 511:28] + node _T_3984 = and(buf_state_bus_en[2], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 512:47] + node _T_3985 = and(_T_3984, obuf_nosend) @[el2_lsu_bus_buffer.scala 512:67] + node _T_3986 = and(_T_3985, bus_rsp_read) @[el2_lsu_bus_buffer.scala 512:81] + buf_data_en[2] <= _T_3986 @[el2_lsu_bus_buffer.scala 512:24] + node _T_3987 = and(buf_state_bus_en[2], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 513:48] + node _T_3988 = and(_T_3987, obuf_nosend) @[el2_lsu_bus_buffer.scala 513:68] + node _T_3989 = and(_T_3988, bus_rsp_read_error) @[el2_lsu_bus_buffer.scala 513:82] + buf_error_en[2] <= _T_3989 @[el2_lsu_bus_buffer.scala 513:25] + node _T_3990 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 514:61] + node _T_3991 = bits(buf_addr[2], 2, 2) @[el2_lsu_bus_buffer.scala 514:85] + node _T_3992 = bits(bus_rsp_rdata, 63, 32) @[el2_lsu_bus_buffer.scala 514:103] + node _T_3993 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 514:126] + node _T_3994 = mux(_T_3991, _T_3992, _T_3993) @[el2_lsu_bus_buffer.scala 514:73] + node _T_3995 = mux(buf_error_en[2], _T_3990, _T_3994) @[el2_lsu_bus_buffer.scala 514:30] + buf_data_in[2] <= _T_3995 @[el2_lsu_bus_buffer.scala 514:24] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_3996 = eq(UInt<3>("h03"), buf_state[2]) @[Conditional.scala 37:30] + when _T_3996 : @[Conditional.scala 39:67] + node _T_3997 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 517:67] + node _T_3998 = and(UInt<1>("h01"), bus_rsp_write_error) @[el2_lsu_bus_buffer.scala 517:94] + node _T_3999 = eq(_T_3998, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 517:73] + node _T_4000 = and(_T_3997, _T_3999) @[el2_lsu_bus_buffer.scala 517:71] + node _T_4001 = or(io.dec_tlu_force_halt, _T_4000) @[el2_lsu_bus_buffer.scala 517:55] + node _T_4002 = bits(_T_4001, 0, 0) @[el2_lsu_bus_buffer.scala 517:125] + node _T_4003 = eq(buf_samedw[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 518:30] + node _T_4004 = and(buf_dual[2], _T_4003) @[el2_lsu_bus_buffer.scala 518:28] + node _T_4005 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 518:57] + node _T_4006 = eq(_T_4005, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 518:47] + node _T_4007 = and(_T_4004, _T_4006) @[el2_lsu_bus_buffer.scala 518:45] + node _T_4008 = neq(buf_state[buf_dualtag[2]], UInt<3>("h04")) @[el2_lsu_bus_buffer.scala 518:90] + node _T_4009 = and(_T_4007, _T_4008) @[el2_lsu_bus_buffer.scala 518:61] + node _T_4010 = bits(buf_ldfwd, 2, 2) @[el2_lsu_bus_buffer.scala 519:27] + node _T_4011 = or(_T_4010, any_done_wait_state) @[el2_lsu_bus_buffer.scala 519:31] + node _T_4012 = eq(buf_samedw[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 519:70] + node _T_4013 = and(buf_dual[2], _T_4012) @[el2_lsu_bus_buffer.scala 519:68] + node _T_4014 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 519:97] + node _T_4015 = eq(_T_4014, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 519:87] + node _T_4016 = and(_T_4013, _T_4015) @[el2_lsu_bus_buffer.scala 519:85] + node _T_4017 = eq(buf_dualtag[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_4018 = bits(buf_ldfwd, 0, 0) @[el2_lsu_bus_buffer.scala 109:129] + node _T_4019 = eq(buf_dualtag[2], UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_4020 = bits(buf_ldfwd, 1, 1) @[el2_lsu_bus_buffer.scala 109:129] + node _T_4021 = eq(buf_dualtag[2], UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_4022 = bits(buf_ldfwd, 2, 2) @[el2_lsu_bus_buffer.scala 109:129] + node _T_4023 = eq(buf_dualtag[2], UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_4024 = bits(buf_ldfwd, 3, 3) @[el2_lsu_bus_buffer.scala 109:129] + node _T_4025 = mux(_T_4017, _T_4018, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4026 = mux(_T_4019, _T_4020, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4027 = mux(_T_4021, _T_4022, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4028 = mux(_T_4023, _T_4024, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4029 = or(_T_4025, _T_4026) @[Mux.scala 27:72] + node _T_4030 = or(_T_4029, _T_4027) @[Mux.scala 27:72] + node _T_4031 = or(_T_4030, _T_4028) @[Mux.scala 27:72] + wire _T_4032 : UInt<1> @[Mux.scala 27:72] + _T_4032 <= _T_4031 @[Mux.scala 27:72] + node _T_4033 = and(_T_4016, _T_4032) @[el2_lsu_bus_buffer.scala 519:101] + node _T_4034 = eq(buf_state[buf_dualtag[2]], UInt<3>("h04")) @[el2_lsu_bus_buffer.scala 519:167] + node _T_4035 = and(_T_4033, _T_4034) @[el2_lsu_bus_buffer.scala 519:138] + node _T_4036 = and(_T_4035, any_done_wait_state) @[el2_lsu_bus_buffer.scala 519:187] + node _T_4037 = or(_T_4011, _T_4036) @[el2_lsu_bus_buffer.scala 519:53] + node _T_4038 = mux(_T_4037, UInt<3>("h05"), UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 519:16] + node _T_4039 = mux(_T_4009, UInt<3>("h04"), _T_4038) @[el2_lsu_bus_buffer.scala 518:14] + node _T_4040 = mux(_T_4002, UInt<3>("h00"), _T_4039) @[el2_lsu_bus_buffer.scala 517:31] + buf_nxtstate[2] <= _T_4040 @[el2_lsu_bus_buffer.scala 517:25] + node _T_4041 = eq(bus_rsp_write_tag, UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 520:73] + node _T_4042 = and(bus_rsp_write, _T_4041) @[el2_lsu_bus_buffer.scala 520:52] + node _T_4043 = eq(bus_rsp_read_tag, UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 521:46] + node _T_4044 = bits(buf_ldfwd, 2, 2) @[el2_lsu_bus_buffer.scala 522:23] + node _T_4045 = eq(bus_rsp_read_tag, buf_ldfwdtag[2]) @[el2_lsu_bus_buffer.scala 522:47] + node _T_4046 = and(_T_4044, _T_4045) @[el2_lsu_bus_buffer.scala 522:27] + node _T_4047 = or(_T_4043, _T_4046) @[el2_lsu_bus_buffer.scala 521:77] + node _T_4048 = and(buf_dual[2], buf_dualhi[2]) @[el2_lsu_bus_buffer.scala 523:26] + node _T_4049 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 523:54] + node _T_4050 = not(_T_4049) @[el2_lsu_bus_buffer.scala 523:44] + node _T_4051 = and(_T_4048, _T_4050) @[el2_lsu_bus_buffer.scala 523:42] + node _T_4052 = and(_T_4051, buf_samedw[2]) @[el2_lsu_bus_buffer.scala 523:58] + node _T_4053 = eq(bus_rsp_read_tag, buf_dualtag[2]) @[el2_lsu_bus_buffer.scala 523:94] + node _T_4054 = and(_T_4052, _T_4053) @[el2_lsu_bus_buffer.scala 523:74] + node _T_4055 = or(_T_4047, _T_4054) @[el2_lsu_bus_buffer.scala 522:71] + node _T_4056 = and(bus_rsp_read, _T_4055) @[el2_lsu_bus_buffer.scala 521:25] + node _T_4057 = or(_T_4042, _T_4056) @[el2_lsu_bus_buffer.scala 520:105] + buf_resp_state_bus_en[2] <= _T_4057 @[el2_lsu_bus_buffer.scala 520:34] + buf_state_bus_en[2] <= buf_resp_state_bus_en[2] @[el2_lsu_bus_buffer.scala 524:29] + node _T_4058 = and(buf_state_bus_en[2], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 525:49] + node _T_4059 = or(_T_4058, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 525:70] + buf_state_en[2] <= _T_4059 @[el2_lsu_bus_buffer.scala 525:25] + node _T_4060 = and(buf_state_bus_en[2], bus_rsp_read) @[el2_lsu_bus_buffer.scala 526:47] + node _T_4061 = and(_T_4060, io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 526:62] + buf_data_en[2] <= _T_4061 @[el2_lsu_bus_buffer.scala 526:24] + node _T_4062 = and(buf_state_bus_en[2], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 527:48] + node _T_4063 = eq(bus_rsp_read_tag, UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 527:111] + node _T_4064 = and(bus_rsp_read_error, _T_4063) @[el2_lsu_bus_buffer.scala 527:91] + node _T_4065 = bits(buf_ldfwd, 2, 2) @[el2_lsu_bus_buffer.scala 528:42] + node _T_4066 = and(bus_rsp_read_error, _T_4065) @[el2_lsu_bus_buffer.scala 528:31] + node _T_4067 = eq(bus_rsp_read_tag, buf_ldfwdtag[2]) @[el2_lsu_bus_buffer.scala 528:66] + node _T_4068 = and(_T_4066, _T_4067) @[el2_lsu_bus_buffer.scala 528:46] + node _T_4069 = or(_T_4064, _T_4068) @[el2_lsu_bus_buffer.scala 527:143] + node _T_4070 = and(bus_rsp_write_error, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 529:32] + node _T_4071 = eq(bus_rsp_write_tag, UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 529:74] + node _T_4072 = and(_T_4070, _T_4071) @[el2_lsu_bus_buffer.scala 529:53] + node _T_4073 = or(_T_4069, _T_4072) @[el2_lsu_bus_buffer.scala 528:88] + node _T_4074 = and(_T_4062, _T_4073) @[el2_lsu_bus_buffer.scala 527:68] + buf_error_en[2] <= _T_4074 @[el2_lsu_bus_buffer.scala 527:25] + node _T_4075 = eq(buf_error_en[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 530:50] + node _T_4076 = and(buf_state_en[2], _T_4075) @[el2_lsu_bus_buffer.scala 530:48] + node _T_4077 = bits(buf_addr[2], 2, 2) @[el2_lsu_bus_buffer.scala 530:84] + node _T_4078 = bits(bus_rsp_rdata, 63, 32) @[el2_lsu_bus_buffer.scala 530:102] + node _T_4079 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 530:125] + node _T_4080 = mux(_T_4077, _T_4078, _T_4079) @[el2_lsu_bus_buffer.scala 530:72] + node _T_4081 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 530:148] + node _T_4082 = mux(_T_4076, _T_4080, _T_4081) @[el2_lsu_bus_buffer.scala 530:30] + buf_data_in[2] <= _T_4082 @[el2_lsu_bus_buffer.scala 530:24] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_4083 = eq(UInt<3>("h04"), buf_state[2]) @[Conditional.scala 37:30] + when _T_4083 : @[Conditional.scala 39:67] + node _T_4084 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 533:60] + node _T_4085 = bits(buf_ldfwd, 2, 2) @[el2_lsu_bus_buffer.scala 533:86] + node _T_4086 = dshr(buf_ldfwd, buf_dualtag[2]) @[el2_lsu_bus_buffer.scala 533:101] + node _T_4087 = bits(_T_4086, 0, 0) @[el2_lsu_bus_buffer.scala 533:101] + node _T_4088 = or(_T_4085, _T_4087) @[el2_lsu_bus_buffer.scala 533:90] + node _T_4089 = or(_T_4088, any_done_wait_state) @[el2_lsu_bus_buffer.scala 533:118] + node _T_4090 = mux(_T_4089, UInt<3>("h05"), UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 533:75] + node _T_4091 = mux(_T_4084, UInt<3>("h00"), _T_4090) @[el2_lsu_bus_buffer.scala 533:31] + buf_nxtstate[2] <= _T_4091 @[el2_lsu_bus_buffer.scala 533:25] + node _T_4092 = eq(bus_rsp_read_tag, buf_dualtag[2]) @[el2_lsu_bus_buffer.scala 534:66] + node _T_4093 = dshr(buf_ldfwd, buf_dualtag[2]) @[el2_lsu_bus_buffer.scala 535:21] + node _T_4094 = bits(_T_4093, 0, 0) @[el2_lsu_bus_buffer.scala 535:21] + node _T_4095 = eq(bus_rsp_read_tag, buf_ldfwdtag[buf_dualtag[2]]) @[el2_lsu_bus_buffer.scala 535:58] + node _T_4096 = and(_T_4094, _T_4095) @[el2_lsu_bus_buffer.scala 535:38] + node _T_4097 = or(_T_4092, _T_4096) @[el2_lsu_bus_buffer.scala 534:95] + node _T_4098 = and(bus_rsp_read, _T_4097) @[el2_lsu_bus_buffer.scala 534:45] + buf_state_bus_en[2] <= _T_4098 @[el2_lsu_bus_buffer.scala 534:29] + node _T_4099 = and(buf_state_bus_en[2], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 536:49] + node _T_4100 = or(_T_4099, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 536:70] + buf_state_en[2] <= _T_4100 @[el2_lsu_bus_buffer.scala 536:25] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_4101 = eq(UInt<3>("h05"), buf_state[2]) @[Conditional.scala 37:30] + when _T_4101 : @[Conditional.scala 39:67] + node _T_4102 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 539:60] + node _T_4103 = mux(_T_4102, UInt<3>("h00"), UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 539:31] + buf_nxtstate[2] <= _T_4103 @[el2_lsu_bus_buffer.scala 539:25] + node _T_4104 = eq(RspPtr, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 540:37] + node _T_4105 = eq(buf_dualtag[2], RspPtr) @[el2_lsu_bus_buffer.scala 540:98] + node _T_4106 = and(buf_dual[2], _T_4105) @[el2_lsu_bus_buffer.scala 540:80] + node _T_4107 = or(_T_4104, _T_4106) @[el2_lsu_bus_buffer.scala 540:65] + node _T_4108 = or(_T_4107, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 540:112] + buf_state_en[2] <= _T_4108 @[el2_lsu_bus_buffer.scala 540:25] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_4109 = eq(UInt<3>("h06"), buf_state[2]) @[Conditional.scala 37:30] + when _T_4109 : @[Conditional.scala 39:67] + buf_nxtstate[2] <= UInt<3>("h00") @[el2_lsu_bus_buffer.scala 543:25] + buf_rst[2] <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 544:20] + buf_state_en[2] <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 545:25] + buf_ldfwd_in[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 546:25] + buf_ldfwd_en[2] <= buf_state_en[2] @[el2_lsu_bus_buffer.scala 547:25] + skip @[Conditional.scala 39:67] + node _T_4110 = bits(buf_state_en[2], 0, 0) @[el2_lsu_bus_buffer.scala 550:108] + reg _T_4111 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4110 : @[Reg.scala 28:19] + _T_4111 <= buf_nxtstate[2] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_state[2] <= _T_4111 @[el2_lsu_bus_buffer.scala 550:18] + reg _T_4112 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 551:60] + _T_4112 <= buf_age_in_2 @[el2_lsu_bus_buffer.scala 551:60] + buf_ageQ[2] <= _T_4112 @[el2_lsu_bus_buffer.scala 551:17] + reg _T_4113 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 552:63] + _T_4113 <= buf_rspage_in[2] @[el2_lsu_bus_buffer.scala 552:63] + buf_rspageQ[2] <= _T_4113 @[el2_lsu_bus_buffer.scala 552:20] + node _T_4114 = bits(buf_wr_en[2], 0, 0) @[el2_lsu_bus_buffer.scala 553:109] + reg _T_4115 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4114 : @[Reg.scala 28:19] + _T_4115 <= buf_dualtag_in[2] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_dualtag[2] <= _T_4115 @[el2_lsu_bus_buffer.scala 553:20] + node _T_4116 = bits(buf_dual_in, 2, 2) @[el2_lsu_bus_buffer.scala 554:74] + node _T_4117 = bits(buf_wr_en[2], 0, 0) @[el2_lsu_bus_buffer.scala 554:107] + reg _T_4118 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4117 : @[Reg.scala 28:19] + _T_4118 <= _T_4116 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_dual[2] <= _T_4118 @[el2_lsu_bus_buffer.scala 554:17] + node _T_4119 = bits(buf_samedw_in, 2, 2) @[el2_lsu_bus_buffer.scala 555:78] + node _T_4120 = bits(buf_wr_en[2], 0, 0) @[el2_lsu_bus_buffer.scala 555:111] + reg _T_4121 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4120 : @[Reg.scala 28:19] + _T_4121 <= _T_4119 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_samedw[2] <= _T_4121 @[el2_lsu_bus_buffer.scala 555:19] + node _T_4122 = bits(buf_nomerge_in, 2, 2) @[el2_lsu_bus_buffer.scala 556:80] + node _T_4123 = bits(buf_wr_en[2], 0, 0) @[el2_lsu_bus_buffer.scala 556:113] + reg _T_4124 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4123 : @[Reg.scala 28:19] + _T_4124 <= _T_4122 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_nomerge[2] <= _T_4124 @[el2_lsu_bus_buffer.scala 556:20] + node _T_4125 = bits(buf_dualhi_in, 2, 2) @[el2_lsu_bus_buffer.scala 557:78] + node _T_4126 = bits(buf_wr_en[2], 0, 0) @[el2_lsu_bus_buffer.scala 557:111] + reg _T_4127 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4126 : @[Reg.scala 28:19] + _T_4127 <= _T_4125 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_dualhi[2] <= _T_4127 @[el2_lsu_bus_buffer.scala 557:19] + node _T_4128 = eq(UInt<3>("h00"), buf_state[3]) @[Conditional.scala 37:30] + when _T_4128 : @[Conditional.scala 40:58] + node _T_4129 = bits(io.lsu_bus_clk_en, 0, 0) @[el2_lsu_bus_buffer.scala 494:56] + node _T_4130 = mux(_T_4129, UInt<3>("h02"), UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 494:31] + buf_nxtstate[3] <= _T_4130 @[el2_lsu_bus_buffer.scala 494:25] + node _T_4131 = and(io.lsu_busreq_r, io.lsu_commit_r) @[el2_lsu_bus_buffer.scala 495:45] + node _T_4132 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 495:77] + node _T_4133 = eq(ibuf_merge_en, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 495:97] + node _T_4134 = and(_T_4132, _T_4133) @[el2_lsu_bus_buffer.scala 495:95] + node _T_4135 = eq(UInt<2>("h03"), WrPtr0_r) @[el2_lsu_bus_buffer.scala 495:117] + node _T_4136 = and(_T_4134, _T_4135) @[el2_lsu_bus_buffer.scala 495:112] + node _T_4137 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 495:144] + node _T_4138 = eq(UInt<2>("h03"), WrPtr1_r) @[el2_lsu_bus_buffer.scala 495:166] + node _T_4139 = and(_T_4137, _T_4138) @[el2_lsu_bus_buffer.scala 495:161] + node _T_4140 = or(_T_4136, _T_4139) @[el2_lsu_bus_buffer.scala 495:132] + node _T_4141 = and(_T_4131, _T_4140) @[el2_lsu_bus_buffer.scala 495:63] + node _T_4142 = eq(UInt<2>("h03"), ibuf_tag) @[el2_lsu_bus_buffer.scala 495:206] + node _T_4143 = and(ibuf_drain_vld, _T_4142) @[el2_lsu_bus_buffer.scala 495:201] + node _T_4144 = or(_T_4141, _T_4143) @[el2_lsu_bus_buffer.scala 495:183] + buf_state_en[3] <= _T_4144 @[el2_lsu_bus_buffer.scala 495:25] + buf_wr_en[3] <= buf_state_en[3] @[el2_lsu_bus_buffer.scala 496:22] + buf_data_en[3] <= buf_state_en[3] @[el2_lsu_bus_buffer.scala 497:24] + node _T_4145 = eq(UInt<2>("h03"), ibuf_tag) @[el2_lsu_bus_buffer.scala 498:52] + node _T_4146 = and(ibuf_drain_vld, _T_4145) @[el2_lsu_bus_buffer.scala 498:47] + node _T_4147 = bits(_T_4146, 0, 0) @[el2_lsu_bus_buffer.scala 498:73] + node _T_4148 = bits(ibuf_data_out, 31, 0) @[el2_lsu_bus_buffer.scala 498:90] + node _T_4149 = bits(store_data_lo_r, 31, 0) @[el2_lsu_bus_buffer.scala 498:114] + node _T_4150 = mux(_T_4147, _T_4148, _T_4149) @[el2_lsu_bus_buffer.scala 498:30] + buf_data_in[3] <= _T_4150 @[el2_lsu_bus_buffer.scala 498:24] + skip @[Conditional.scala 40:58] + else : @[Conditional.scala 39:67] + node _T_4151 = eq(UInt<3>("h01"), buf_state[3]) @[Conditional.scala 37:30] + when _T_4151 : @[Conditional.scala 39:67] + node _T_4152 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 501:60] + node _T_4153 = mux(_T_4152, UInt<3>("h00"), UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 501:31] + buf_nxtstate[3] <= _T_4153 @[el2_lsu_bus_buffer.scala 501:25] + node _T_4154 = or(io.lsu_bus_clk_en, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 502:46] + buf_state_en[3] <= _T_4154 @[el2_lsu_bus_buffer.scala 502:25] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_4155 = eq(UInt<3>("h02"), buf_state[3]) @[Conditional.scala 37:30] + when _T_4155 : @[Conditional.scala 39:67] + node _T_4156 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 505:60] + node _T_4157 = and(obuf_nosend, bus_rsp_read) @[el2_lsu_bus_buffer.scala 505:89] + node _T_4158 = eq(bus_rsp_read_tag, obuf_rdrsp_tag) @[el2_lsu_bus_buffer.scala 505:124] + node _T_4159 = and(_T_4157, _T_4158) @[el2_lsu_bus_buffer.scala 505:104] + node _T_4160 = mux(_T_4159, UInt<3>("h05"), UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 505:75] + node _T_4161 = mux(_T_4156, UInt<3>("h00"), _T_4160) @[el2_lsu_bus_buffer.scala 505:31] + buf_nxtstate[3] <= _T_4161 @[el2_lsu_bus_buffer.scala 505:25] + node _T_4162 = eq(obuf_tag0, UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 506:48] + node _T_4163 = eq(obuf_tag1, UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 506:104] + node _T_4164 = and(obuf_merge, _T_4163) @[el2_lsu_bus_buffer.scala 506:91] + node _T_4165 = or(_T_4162, _T_4164) @[el2_lsu_bus_buffer.scala 506:77] + node _T_4166 = and(_T_4165, obuf_valid) @[el2_lsu_bus_buffer.scala 506:135] + node _T_4167 = and(_T_4166, obuf_wr_enQ) @[el2_lsu_bus_buffer.scala 506:148] + buf_cmd_state_bus_en[3] <= _T_4167 @[el2_lsu_bus_buffer.scala 506:33] + buf_state_bus_en[3] <= buf_cmd_state_bus_en[3] @[el2_lsu_bus_buffer.scala 507:29] + node _T_4168 = and(buf_state_bus_en[3], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 508:49] + node _T_4169 = or(_T_4168, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 508:70] + buf_state_en[3] <= _T_4169 @[el2_lsu_bus_buffer.scala 508:25] + buf_ldfwd_in[3] <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 509:25] + node _T_4170 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 510:56] + node _T_4171 = eq(_T_4170, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 510:46] + node _T_4172 = and(buf_state_en[3], _T_4171) @[el2_lsu_bus_buffer.scala 510:44] + node _T_4173 = and(_T_4172, obuf_nosend) @[el2_lsu_bus_buffer.scala 510:60] + node _T_4174 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 510:76] + node _T_4175 = and(_T_4173, _T_4174) @[el2_lsu_bus_buffer.scala 510:74] + buf_ldfwd_en[3] <= _T_4175 @[el2_lsu_bus_buffer.scala 510:25] + node _T_4176 = bits(obuf_rdrsp_tag, 1, 0) @[el2_lsu_bus_buffer.scala 511:46] + buf_ldfwdtag_in[3] <= _T_4176 @[el2_lsu_bus_buffer.scala 511:28] + node _T_4177 = and(buf_state_bus_en[3], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 512:47] + node _T_4178 = and(_T_4177, obuf_nosend) @[el2_lsu_bus_buffer.scala 512:67] + node _T_4179 = and(_T_4178, bus_rsp_read) @[el2_lsu_bus_buffer.scala 512:81] + buf_data_en[3] <= _T_4179 @[el2_lsu_bus_buffer.scala 512:24] + node _T_4180 = and(buf_state_bus_en[3], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 513:48] + node _T_4181 = and(_T_4180, obuf_nosend) @[el2_lsu_bus_buffer.scala 513:68] + node _T_4182 = and(_T_4181, bus_rsp_read_error) @[el2_lsu_bus_buffer.scala 513:82] + buf_error_en[3] <= _T_4182 @[el2_lsu_bus_buffer.scala 513:25] + node _T_4183 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 514:61] + node _T_4184 = bits(buf_addr[3], 2, 2) @[el2_lsu_bus_buffer.scala 514:85] + node _T_4185 = bits(bus_rsp_rdata, 63, 32) @[el2_lsu_bus_buffer.scala 514:103] + node _T_4186 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 514:126] + node _T_4187 = mux(_T_4184, _T_4185, _T_4186) @[el2_lsu_bus_buffer.scala 514:73] + node _T_4188 = mux(buf_error_en[3], _T_4183, _T_4187) @[el2_lsu_bus_buffer.scala 514:30] + buf_data_in[3] <= _T_4188 @[el2_lsu_bus_buffer.scala 514:24] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_4189 = eq(UInt<3>("h03"), buf_state[3]) @[Conditional.scala 37:30] + when _T_4189 : @[Conditional.scala 39:67] + node _T_4190 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 517:67] + node _T_4191 = and(UInt<1>("h01"), bus_rsp_write_error) @[el2_lsu_bus_buffer.scala 517:94] + node _T_4192 = eq(_T_4191, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 517:73] + node _T_4193 = and(_T_4190, _T_4192) @[el2_lsu_bus_buffer.scala 517:71] + node _T_4194 = or(io.dec_tlu_force_halt, _T_4193) @[el2_lsu_bus_buffer.scala 517:55] + node _T_4195 = bits(_T_4194, 0, 0) @[el2_lsu_bus_buffer.scala 517:125] + node _T_4196 = eq(buf_samedw[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 518:30] + node _T_4197 = and(buf_dual[3], _T_4196) @[el2_lsu_bus_buffer.scala 518:28] + node _T_4198 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 518:57] + node _T_4199 = eq(_T_4198, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 518:47] + node _T_4200 = and(_T_4197, _T_4199) @[el2_lsu_bus_buffer.scala 518:45] + node _T_4201 = neq(buf_state[buf_dualtag[3]], UInt<3>("h04")) @[el2_lsu_bus_buffer.scala 518:90] + node _T_4202 = and(_T_4200, _T_4201) @[el2_lsu_bus_buffer.scala 518:61] + node _T_4203 = bits(buf_ldfwd, 3, 3) @[el2_lsu_bus_buffer.scala 519:27] + node _T_4204 = or(_T_4203, any_done_wait_state) @[el2_lsu_bus_buffer.scala 519:31] + node _T_4205 = eq(buf_samedw[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 519:70] + node _T_4206 = and(buf_dual[3], _T_4205) @[el2_lsu_bus_buffer.scala 519:68] + node _T_4207 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 519:97] + node _T_4208 = eq(_T_4207, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 519:87] + node _T_4209 = and(_T_4206, _T_4208) @[el2_lsu_bus_buffer.scala 519:85] + node _T_4210 = eq(buf_dualtag[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_4211 = bits(buf_ldfwd, 0, 0) @[el2_lsu_bus_buffer.scala 109:129] + node _T_4212 = eq(buf_dualtag[3], UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_4213 = bits(buf_ldfwd, 1, 1) @[el2_lsu_bus_buffer.scala 109:129] + node _T_4214 = eq(buf_dualtag[3], UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_4215 = bits(buf_ldfwd, 2, 2) @[el2_lsu_bus_buffer.scala 109:129] + node _T_4216 = eq(buf_dualtag[3], UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_4217 = bits(buf_ldfwd, 3, 3) @[el2_lsu_bus_buffer.scala 109:129] + node _T_4218 = mux(_T_4210, _T_4211, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4219 = mux(_T_4212, _T_4213, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4220 = mux(_T_4214, _T_4215, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4221 = mux(_T_4216, _T_4217, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4222 = or(_T_4218, _T_4219) @[Mux.scala 27:72] + node _T_4223 = or(_T_4222, _T_4220) @[Mux.scala 27:72] + node _T_4224 = or(_T_4223, _T_4221) @[Mux.scala 27:72] + wire _T_4225 : UInt<1> @[Mux.scala 27:72] + _T_4225 <= _T_4224 @[Mux.scala 27:72] + node _T_4226 = and(_T_4209, _T_4225) @[el2_lsu_bus_buffer.scala 519:101] + node _T_4227 = eq(buf_state[buf_dualtag[3]], UInt<3>("h04")) @[el2_lsu_bus_buffer.scala 519:167] + node _T_4228 = and(_T_4226, _T_4227) @[el2_lsu_bus_buffer.scala 519:138] + node _T_4229 = and(_T_4228, any_done_wait_state) @[el2_lsu_bus_buffer.scala 519:187] + node _T_4230 = or(_T_4204, _T_4229) @[el2_lsu_bus_buffer.scala 519:53] + node _T_4231 = mux(_T_4230, UInt<3>("h05"), UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 519:16] + node _T_4232 = mux(_T_4202, UInt<3>("h04"), _T_4231) @[el2_lsu_bus_buffer.scala 518:14] + node _T_4233 = mux(_T_4195, UInt<3>("h00"), _T_4232) @[el2_lsu_bus_buffer.scala 517:31] + buf_nxtstate[3] <= _T_4233 @[el2_lsu_bus_buffer.scala 517:25] + node _T_4234 = eq(bus_rsp_write_tag, UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 520:73] + node _T_4235 = and(bus_rsp_write, _T_4234) @[el2_lsu_bus_buffer.scala 520:52] + node _T_4236 = eq(bus_rsp_read_tag, UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 521:46] + node _T_4237 = bits(buf_ldfwd, 3, 3) @[el2_lsu_bus_buffer.scala 522:23] + node _T_4238 = eq(bus_rsp_read_tag, buf_ldfwdtag[3]) @[el2_lsu_bus_buffer.scala 522:47] + node _T_4239 = and(_T_4237, _T_4238) @[el2_lsu_bus_buffer.scala 522:27] + node _T_4240 = or(_T_4236, _T_4239) @[el2_lsu_bus_buffer.scala 521:77] + node _T_4241 = and(buf_dual[3], buf_dualhi[3]) @[el2_lsu_bus_buffer.scala 523:26] + node _T_4242 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 523:54] + node _T_4243 = not(_T_4242) @[el2_lsu_bus_buffer.scala 523:44] + node _T_4244 = and(_T_4241, _T_4243) @[el2_lsu_bus_buffer.scala 523:42] + node _T_4245 = and(_T_4244, buf_samedw[3]) @[el2_lsu_bus_buffer.scala 523:58] + node _T_4246 = eq(bus_rsp_read_tag, buf_dualtag[3]) @[el2_lsu_bus_buffer.scala 523:94] + node _T_4247 = and(_T_4245, _T_4246) @[el2_lsu_bus_buffer.scala 523:74] + node _T_4248 = or(_T_4240, _T_4247) @[el2_lsu_bus_buffer.scala 522:71] + node _T_4249 = and(bus_rsp_read, _T_4248) @[el2_lsu_bus_buffer.scala 521:25] + node _T_4250 = or(_T_4235, _T_4249) @[el2_lsu_bus_buffer.scala 520:105] + buf_resp_state_bus_en[3] <= _T_4250 @[el2_lsu_bus_buffer.scala 520:34] + buf_state_bus_en[3] <= buf_resp_state_bus_en[3] @[el2_lsu_bus_buffer.scala 524:29] + node _T_4251 = and(buf_state_bus_en[3], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 525:49] + node _T_4252 = or(_T_4251, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 525:70] + buf_state_en[3] <= _T_4252 @[el2_lsu_bus_buffer.scala 525:25] + node _T_4253 = and(buf_state_bus_en[3], bus_rsp_read) @[el2_lsu_bus_buffer.scala 526:47] + node _T_4254 = and(_T_4253, io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 526:62] + buf_data_en[3] <= _T_4254 @[el2_lsu_bus_buffer.scala 526:24] + node _T_4255 = and(buf_state_bus_en[3], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 527:48] + node _T_4256 = eq(bus_rsp_read_tag, UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 527:111] + node _T_4257 = and(bus_rsp_read_error, _T_4256) @[el2_lsu_bus_buffer.scala 527:91] + node _T_4258 = bits(buf_ldfwd, 3, 3) @[el2_lsu_bus_buffer.scala 528:42] + node _T_4259 = and(bus_rsp_read_error, _T_4258) @[el2_lsu_bus_buffer.scala 528:31] + node _T_4260 = eq(bus_rsp_read_tag, buf_ldfwdtag[3]) @[el2_lsu_bus_buffer.scala 528:66] + node _T_4261 = and(_T_4259, _T_4260) @[el2_lsu_bus_buffer.scala 528:46] + node _T_4262 = or(_T_4257, _T_4261) @[el2_lsu_bus_buffer.scala 527:143] + node _T_4263 = and(bus_rsp_write_error, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 529:32] + node _T_4264 = eq(bus_rsp_write_tag, UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 529:74] + node _T_4265 = and(_T_4263, _T_4264) @[el2_lsu_bus_buffer.scala 529:53] + node _T_4266 = or(_T_4262, _T_4265) @[el2_lsu_bus_buffer.scala 528:88] + node _T_4267 = and(_T_4255, _T_4266) @[el2_lsu_bus_buffer.scala 527:68] + buf_error_en[3] <= _T_4267 @[el2_lsu_bus_buffer.scala 527:25] + node _T_4268 = eq(buf_error_en[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 530:50] + node _T_4269 = and(buf_state_en[3], _T_4268) @[el2_lsu_bus_buffer.scala 530:48] + node _T_4270 = bits(buf_addr[3], 2, 2) @[el2_lsu_bus_buffer.scala 530:84] + node _T_4271 = bits(bus_rsp_rdata, 63, 32) @[el2_lsu_bus_buffer.scala 530:102] + node _T_4272 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 530:125] + node _T_4273 = mux(_T_4270, _T_4271, _T_4272) @[el2_lsu_bus_buffer.scala 530:72] + node _T_4274 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 530:148] + node _T_4275 = mux(_T_4269, _T_4273, _T_4274) @[el2_lsu_bus_buffer.scala 530:30] + buf_data_in[3] <= _T_4275 @[el2_lsu_bus_buffer.scala 530:24] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_4276 = eq(UInt<3>("h04"), buf_state[3]) @[Conditional.scala 37:30] + when _T_4276 : @[Conditional.scala 39:67] + node _T_4277 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 533:60] + node _T_4278 = bits(buf_ldfwd, 3, 3) @[el2_lsu_bus_buffer.scala 533:86] + node _T_4279 = dshr(buf_ldfwd, buf_dualtag[3]) @[el2_lsu_bus_buffer.scala 533:101] + node _T_4280 = bits(_T_4279, 0, 0) @[el2_lsu_bus_buffer.scala 533:101] + node _T_4281 = or(_T_4278, _T_4280) @[el2_lsu_bus_buffer.scala 533:90] + node _T_4282 = or(_T_4281, any_done_wait_state) @[el2_lsu_bus_buffer.scala 533:118] + node _T_4283 = mux(_T_4282, UInt<3>("h05"), UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 533:75] + node _T_4284 = mux(_T_4277, UInt<3>("h00"), _T_4283) @[el2_lsu_bus_buffer.scala 533:31] + buf_nxtstate[3] <= _T_4284 @[el2_lsu_bus_buffer.scala 533:25] + node _T_4285 = eq(bus_rsp_read_tag, buf_dualtag[3]) @[el2_lsu_bus_buffer.scala 534:66] + node _T_4286 = dshr(buf_ldfwd, buf_dualtag[3]) @[el2_lsu_bus_buffer.scala 535:21] + node _T_4287 = bits(_T_4286, 0, 0) @[el2_lsu_bus_buffer.scala 535:21] + node _T_4288 = eq(bus_rsp_read_tag, buf_ldfwdtag[buf_dualtag[3]]) @[el2_lsu_bus_buffer.scala 535:58] + node _T_4289 = and(_T_4287, _T_4288) @[el2_lsu_bus_buffer.scala 535:38] + node _T_4290 = or(_T_4285, _T_4289) @[el2_lsu_bus_buffer.scala 534:95] + node _T_4291 = and(bus_rsp_read, _T_4290) @[el2_lsu_bus_buffer.scala 534:45] + buf_state_bus_en[3] <= _T_4291 @[el2_lsu_bus_buffer.scala 534:29] + node _T_4292 = and(buf_state_bus_en[3], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 536:49] + node _T_4293 = or(_T_4292, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 536:70] + buf_state_en[3] <= _T_4293 @[el2_lsu_bus_buffer.scala 536:25] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_4294 = eq(UInt<3>("h05"), buf_state[3]) @[Conditional.scala 37:30] + when _T_4294 : @[Conditional.scala 39:67] + node _T_4295 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 539:60] + node _T_4296 = mux(_T_4295, UInt<3>("h00"), UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 539:31] + buf_nxtstate[3] <= _T_4296 @[el2_lsu_bus_buffer.scala 539:25] + node _T_4297 = eq(RspPtr, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 540:37] + node _T_4298 = eq(buf_dualtag[3], RspPtr) @[el2_lsu_bus_buffer.scala 540:98] + node _T_4299 = and(buf_dual[3], _T_4298) @[el2_lsu_bus_buffer.scala 540:80] + node _T_4300 = or(_T_4297, _T_4299) @[el2_lsu_bus_buffer.scala 540:65] + node _T_4301 = or(_T_4300, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 540:112] + buf_state_en[3] <= _T_4301 @[el2_lsu_bus_buffer.scala 540:25] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_4302 = eq(UInt<3>("h06"), buf_state[3]) @[Conditional.scala 37:30] + when _T_4302 : @[Conditional.scala 39:67] + buf_nxtstate[3] <= UInt<3>("h00") @[el2_lsu_bus_buffer.scala 543:25] + buf_rst[3] <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 544:20] + buf_state_en[3] <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 545:25] + buf_ldfwd_in[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 546:25] + buf_ldfwd_en[3] <= buf_state_en[3] @[el2_lsu_bus_buffer.scala 547:25] + skip @[Conditional.scala 39:67] + node _T_4303 = bits(buf_state_en[3], 0, 0) @[el2_lsu_bus_buffer.scala 550:108] + reg _T_4304 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4303 : @[Reg.scala 28:19] + _T_4304 <= buf_nxtstate[3] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_state[3] <= _T_4304 @[el2_lsu_bus_buffer.scala 550:18] + reg _T_4305 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 551:60] + _T_4305 <= buf_age_in_3 @[el2_lsu_bus_buffer.scala 551:60] + buf_ageQ[3] <= _T_4305 @[el2_lsu_bus_buffer.scala 551:17] + reg _T_4306 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 552:63] + _T_4306 <= buf_rspage_in[3] @[el2_lsu_bus_buffer.scala 552:63] + buf_rspageQ[3] <= _T_4306 @[el2_lsu_bus_buffer.scala 552:20] + node _T_4307 = bits(buf_wr_en[3], 0, 0) @[el2_lsu_bus_buffer.scala 553:109] + reg _T_4308 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4307 : @[Reg.scala 28:19] + _T_4308 <= buf_dualtag_in[3] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_dualtag[3] <= _T_4308 @[el2_lsu_bus_buffer.scala 553:20] + node _T_4309 = bits(buf_dual_in, 3, 3) @[el2_lsu_bus_buffer.scala 554:74] + node _T_4310 = bits(buf_wr_en[3], 0, 0) @[el2_lsu_bus_buffer.scala 554:107] + reg _T_4311 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4310 : @[Reg.scala 28:19] + _T_4311 <= _T_4309 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_dual[3] <= _T_4311 @[el2_lsu_bus_buffer.scala 554:17] + node _T_4312 = bits(buf_samedw_in, 3, 3) @[el2_lsu_bus_buffer.scala 555:78] + node _T_4313 = bits(buf_wr_en[3], 0, 0) @[el2_lsu_bus_buffer.scala 555:111] + reg _T_4314 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4313 : @[Reg.scala 28:19] + _T_4314 <= _T_4312 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_samedw[3] <= _T_4314 @[el2_lsu_bus_buffer.scala 555:19] + node _T_4315 = bits(buf_nomerge_in, 3, 3) @[el2_lsu_bus_buffer.scala 556:80] + node _T_4316 = bits(buf_wr_en[3], 0, 0) @[el2_lsu_bus_buffer.scala 556:113] + reg _T_4317 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4316 : @[Reg.scala 28:19] + _T_4317 <= _T_4315 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_nomerge[3] <= _T_4317 @[el2_lsu_bus_buffer.scala 556:20] + node _T_4318 = bits(buf_dualhi_in, 3, 3) @[el2_lsu_bus_buffer.scala 557:78] + node _T_4319 = bits(buf_wr_en[3], 0, 0) @[el2_lsu_bus_buffer.scala 557:111] + reg _T_4320 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4319 : @[Reg.scala 28:19] + _T_4320 <= _T_4318 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_dualhi[3] <= _T_4320 @[el2_lsu_bus_buffer.scala 557:19] + node _T_4321 = bits(buf_ldfwd_en[0], 0, 0) @[el2_lsu_bus_buffer.scala 560:133] + reg _T_4322 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4321 : @[Reg.scala 28:19] + _T_4322 <= buf_ldfwd_in[0] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4323 = bits(buf_ldfwd_en[1], 0, 0) @[el2_lsu_bus_buffer.scala 560:133] + reg _T_4324 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4323 : @[Reg.scala 28:19] + _T_4324 <= buf_ldfwd_in[1] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4325 = bits(buf_ldfwd_en[2], 0, 0) @[el2_lsu_bus_buffer.scala 560:133] + reg _T_4326 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4325 : @[Reg.scala 28:19] + _T_4326 <= buf_ldfwd_in[2] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4327 = bits(buf_ldfwd_en[3], 0, 0) @[el2_lsu_bus_buffer.scala 560:133] + reg _T_4328 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4327 : @[Reg.scala 28:19] + _T_4328 <= buf_ldfwd_in[3] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4329 = cat(_T_4328, _T_4326) @[Cat.scala 29:58] + node _T_4330 = cat(_T_4329, _T_4324) @[Cat.scala 29:58] + node _T_4331 = cat(_T_4330, _T_4322) @[Cat.scala 29:58] + buf_ldfwd <= _T_4331 @[el2_lsu_bus_buffer.scala 560:15] + node _T_4332 = bits(buf_ldfwd_en[0], 0, 0) @[el2_lsu_bus_buffer.scala 561:134] + reg _T_4333 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4332 : @[Reg.scala 28:19] + _T_4333 <= buf_ldfwdtag_in[0] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4334 = bits(buf_ldfwd_en[1], 0, 0) @[el2_lsu_bus_buffer.scala 561:134] + reg _T_4335 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4334 : @[Reg.scala 28:19] + _T_4335 <= buf_ldfwdtag_in[1] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4336 = bits(buf_ldfwd_en[2], 0, 0) @[el2_lsu_bus_buffer.scala 561:134] + reg _T_4337 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4336 : @[Reg.scala 28:19] + _T_4337 <= buf_ldfwdtag_in[2] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4338 = bits(buf_ldfwd_en[3], 0, 0) @[el2_lsu_bus_buffer.scala 561:134] + reg _T_4339 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4338 : @[Reg.scala 28:19] + _T_4339 <= buf_ldfwdtag_in[3] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_ldfwdtag[0] <= _T_4333 @[el2_lsu_bus_buffer.scala 561:18] + buf_ldfwdtag[1] <= _T_4335 @[el2_lsu_bus_buffer.scala 561:18] + buf_ldfwdtag[2] <= _T_4337 @[el2_lsu_bus_buffer.scala 561:18] + buf_ldfwdtag[3] <= _T_4339 @[el2_lsu_bus_buffer.scala 561:18] + node _T_4340 = bits(buf_sideeffect_in, 0, 0) @[el2_lsu_bus_buffer.scala 562:107] + node _T_4341 = bits(buf_wr_en[0], 0, 0) @[el2_lsu_bus_buffer.scala 562:140] + reg _T_4342 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4341 : @[Reg.scala 28:19] + _T_4342 <= _T_4340 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4343 = bits(buf_sideeffect_in, 1, 1) @[el2_lsu_bus_buffer.scala 562:107] + node _T_4344 = bits(buf_wr_en[1], 0, 0) @[el2_lsu_bus_buffer.scala 562:140] + reg _T_4345 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4344 : @[Reg.scala 28:19] + _T_4345 <= _T_4343 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4346 = bits(buf_sideeffect_in, 2, 2) @[el2_lsu_bus_buffer.scala 562:107] + node _T_4347 = bits(buf_wr_en[2], 0, 0) @[el2_lsu_bus_buffer.scala 562:140] + reg _T_4348 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4347 : @[Reg.scala 28:19] + _T_4348 <= _T_4346 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4349 = bits(buf_sideeffect_in, 3, 3) @[el2_lsu_bus_buffer.scala 562:107] + node _T_4350 = bits(buf_wr_en[3], 0, 0) @[el2_lsu_bus_buffer.scala 562:140] + reg _T_4351 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4350 : @[Reg.scala 28:19] + _T_4351 <= _T_4349 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4352 = cat(_T_4351, _T_4348) @[Cat.scala 29:58] + node _T_4353 = cat(_T_4352, _T_4345) @[Cat.scala 29:58] + node _T_4354 = cat(_T_4353, _T_4342) @[Cat.scala 29:58] + buf_sideeffect <= _T_4354 @[el2_lsu_bus_buffer.scala 562:20] + node _T_4355 = bits(buf_unsign_in, 0, 0) @[el2_lsu_bus_buffer.scala 563:99] + node _T_4356 = bits(buf_wr_en[0], 0, 0) @[el2_lsu_bus_buffer.scala 563:132] + reg _T_4357 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4356 : @[Reg.scala 28:19] + _T_4357 <= _T_4355 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4358 = bits(buf_unsign_in, 1, 1) @[el2_lsu_bus_buffer.scala 563:99] + node _T_4359 = bits(buf_wr_en[1], 0, 0) @[el2_lsu_bus_buffer.scala 563:132] + reg _T_4360 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4359 : @[Reg.scala 28:19] + _T_4360 <= _T_4358 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4361 = bits(buf_unsign_in, 2, 2) @[el2_lsu_bus_buffer.scala 563:99] + node _T_4362 = bits(buf_wr_en[2], 0, 0) @[el2_lsu_bus_buffer.scala 563:132] + reg _T_4363 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4362 : @[Reg.scala 28:19] + _T_4363 <= _T_4361 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4364 = bits(buf_unsign_in, 3, 3) @[el2_lsu_bus_buffer.scala 563:99] + node _T_4365 = bits(buf_wr_en[3], 0, 0) @[el2_lsu_bus_buffer.scala 563:132] + reg _T_4366 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4365 : @[Reg.scala 28:19] + _T_4366 <= _T_4364 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4367 = cat(_T_4366, _T_4363) @[Cat.scala 29:58] + node _T_4368 = cat(_T_4367, _T_4360) @[Cat.scala 29:58] + node _T_4369 = cat(_T_4368, _T_4357) @[Cat.scala 29:58] + buf_unsign <= _T_4369 @[el2_lsu_bus_buffer.scala 563:16] + node _T_4370 = bits(buf_write_in, 0, 0) @[el2_lsu_bus_buffer.scala 564:97] + node _T_4371 = bits(buf_wr_en[0], 0, 0) @[el2_lsu_bus_buffer.scala 564:130] + reg _T_4372 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4371 : @[Reg.scala 28:19] + _T_4372 <= _T_4370 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4373 = bits(buf_write_in, 1, 1) @[el2_lsu_bus_buffer.scala 564:97] + node _T_4374 = bits(buf_wr_en[1], 0, 0) @[el2_lsu_bus_buffer.scala 564:130] + reg _T_4375 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4374 : @[Reg.scala 28:19] + _T_4375 <= _T_4373 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4376 = bits(buf_write_in, 2, 2) @[el2_lsu_bus_buffer.scala 564:97] + node _T_4377 = bits(buf_wr_en[2], 0, 0) @[el2_lsu_bus_buffer.scala 564:130] + reg _T_4378 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4377 : @[Reg.scala 28:19] + _T_4378 <= _T_4376 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4379 = bits(buf_write_in, 3, 3) @[el2_lsu_bus_buffer.scala 564:97] + node _T_4380 = bits(buf_wr_en[3], 0, 0) @[el2_lsu_bus_buffer.scala 564:130] + reg _T_4381 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4380 : @[Reg.scala 28:19] + _T_4381 <= _T_4379 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4382 = cat(_T_4381, _T_4378) @[Cat.scala 29:58] + node _T_4383 = cat(_T_4382, _T_4375) @[Cat.scala 29:58] + node _T_4384 = cat(_T_4383, _T_4372) @[Cat.scala 29:58] + buf_write <= _T_4384 @[el2_lsu_bus_buffer.scala 564:15] + node _T_4385 = bits(buf_wr_en[0], 0, 0) @[el2_lsu_bus_buffer.scala 565:119] + reg _T_4386 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4385 : @[Reg.scala 28:19] + _T_4386 <= buf_sz_in[0] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4387 = bits(buf_wr_en[1], 0, 0) @[el2_lsu_bus_buffer.scala 565:119] + reg _T_4388 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4387 : @[Reg.scala 28:19] + _T_4388 <= buf_sz_in[1] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4389 = bits(buf_wr_en[2], 0, 0) @[el2_lsu_bus_buffer.scala 565:119] + reg _T_4390 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4389 : @[Reg.scala 28:19] + _T_4390 <= buf_sz_in[2] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4391 = bits(buf_wr_en[3], 0, 0) @[el2_lsu_bus_buffer.scala 565:119] + reg _T_4392 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4391 : @[Reg.scala 28:19] + _T_4392 <= buf_sz_in[3] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_sz[0] <= _T_4386 @[el2_lsu_bus_buffer.scala 565:12] + buf_sz[1] <= _T_4388 @[el2_lsu_bus_buffer.scala 565:12] + buf_sz[2] <= _T_4390 @[el2_lsu_bus_buffer.scala 565:12] + buf_sz[3] <= _T_4392 @[el2_lsu_bus_buffer.scala 565:12] + node _T_4393 = bits(buf_wr_en[0], 0, 0) @[el2_lsu_bus_buffer.scala 566:82] + inst rvclkhdr_4 of rvclkhdr_28 @[el2_lib.scala 506:23] + rvclkhdr_4.clock <= clock + rvclkhdr_4.reset <= reset + rvclkhdr_4.io.clk <= clock @[el2_lib.scala 508:18] + rvclkhdr_4.io.en <= _T_4393 @[el2_lib.scala 509:17] + rvclkhdr_4.io.scan_mode <= io.scan_mode @[el2_lib.scala 510:24] + reg _T_4394 : UInt, rvclkhdr_4.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 512:16] + _T_4394 <= buf_addr_in[0] @[el2_lib.scala 512:16] + node _T_4395 = bits(buf_wr_en[1], 0, 0) @[el2_lsu_bus_buffer.scala 566:82] + inst rvclkhdr_5 of rvclkhdr_29 @[el2_lib.scala 506:23] + rvclkhdr_5.clock <= clock + rvclkhdr_5.reset <= reset + rvclkhdr_5.io.clk <= clock @[el2_lib.scala 508:18] + rvclkhdr_5.io.en <= _T_4395 @[el2_lib.scala 509:17] + rvclkhdr_5.io.scan_mode <= io.scan_mode @[el2_lib.scala 510:24] + reg _T_4396 : UInt, rvclkhdr_5.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 512:16] + _T_4396 <= buf_addr_in[1] @[el2_lib.scala 512:16] + node _T_4397 = bits(buf_wr_en[2], 0, 0) @[el2_lsu_bus_buffer.scala 566:82] + inst rvclkhdr_6 of rvclkhdr_30 @[el2_lib.scala 506:23] + rvclkhdr_6.clock <= clock + rvclkhdr_6.reset <= reset + rvclkhdr_6.io.clk <= clock @[el2_lib.scala 508:18] + rvclkhdr_6.io.en <= _T_4397 @[el2_lib.scala 509:17] + rvclkhdr_6.io.scan_mode <= io.scan_mode @[el2_lib.scala 510:24] + reg _T_4398 : UInt, rvclkhdr_6.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 512:16] + _T_4398 <= buf_addr_in[2] @[el2_lib.scala 512:16] + node _T_4399 = bits(buf_wr_en[3], 0, 0) @[el2_lsu_bus_buffer.scala 566:82] + inst rvclkhdr_7 of rvclkhdr_31 @[el2_lib.scala 506:23] + rvclkhdr_7.clock <= clock + rvclkhdr_7.reset <= reset + rvclkhdr_7.io.clk <= clock @[el2_lib.scala 508:18] + rvclkhdr_7.io.en <= _T_4399 @[el2_lib.scala 509:17] + rvclkhdr_7.io.scan_mode <= io.scan_mode @[el2_lib.scala 510:24] + reg _T_4400 : UInt, rvclkhdr_7.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 512:16] + _T_4400 <= buf_addr_in[3] @[el2_lib.scala 512:16] + buf_addr[0] <= _T_4394 @[el2_lsu_bus_buffer.scala 566:14] + buf_addr[1] <= _T_4396 @[el2_lsu_bus_buffer.scala 566:14] + buf_addr[2] <= _T_4398 @[el2_lsu_bus_buffer.scala 566:14] + buf_addr[3] <= _T_4400 @[el2_lsu_bus_buffer.scala 566:14] + node _T_4401 = bits(buf_wr_en[0], 0, 0) @[el2_lsu_bus_buffer.scala 567:127] + reg _T_4402 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4401 : @[Reg.scala 28:19] + _T_4402 <= buf_byteen_in[0] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4403 = bits(buf_wr_en[1], 0, 0) @[el2_lsu_bus_buffer.scala 567:127] + reg _T_4404 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4403 : @[Reg.scala 28:19] + _T_4404 <= buf_byteen_in[1] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4405 = bits(buf_wr_en[2], 0, 0) @[el2_lsu_bus_buffer.scala 567:127] + reg _T_4406 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4405 : @[Reg.scala 28:19] + _T_4406 <= buf_byteen_in[2] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4407 = bits(buf_wr_en[3], 0, 0) @[el2_lsu_bus_buffer.scala 567:127] + reg _T_4408 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4407 : @[Reg.scala 28:19] + _T_4408 <= buf_byteen_in[3] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_byteen[0] <= _T_4402 @[el2_lsu_bus_buffer.scala 567:16] + buf_byteen[1] <= _T_4404 @[el2_lsu_bus_buffer.scala 567:16] + buf_byteen[2] <= _T_4406 @[el2_lsu_bus_buffer.scala 567:16] + buf_byteen[3] <= _T_4408 @[el2_lsu_bus_buffer.scala 567:16] + inst rvclkhdr_8 of rvclkhdr_32 @[el2_lib.scala 506:23] + rvclkhdr_8.clock <= clock + rvclkhdr_8.reset <= reset + rvclkhdr_8.io.clk <= clock @[el2_lib.scala 508:18] + rvclkhdr_8.io.en <= buf_data_en[0] @[el2_lib.scala 509:17] + rvclkhdr_8.io.scan_mode <= io.scan_mode @[el2_lib.scala 510:24] + reg _T_4409 : UInt, rvclkhdr_8.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 512:16] + _T_4409 <= buf_data_in[0] @[el2_lib.scala 512:16] + inst rvclkhdr_9 of rvclkhdr_33 @[el2_lib.scala 506:23] + rvclkhdr_9.clock <= clock + rvclkhdr_9.reset <= reset + rvclkhdr_9.io.clk <= clock @[el2_lib.scala 508:18] + rvclkhdr_9.io.en <= buf_data_en[1] @[el2_lib.scala 509:17] + rvclkhdr_9.io.scan_mode <= io.scan_mode @[el2_lib.scala 510:24] + reg _T_4410 : UInt, rvclkhdr_9.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 512:16] + _T_4410 <= buf_data_in[1] @[el2_lib.scala 512:16] + inst rvclkhdr_10 of rvclkhdr_34 @[el2_lib.scala 506:23] + rvclkhdr_10.clock <= clock + rvclkhdr_10.reset <= reset + rvclkhdr_10.io.clk <= clock @[el2_lib.scala 508:18] + rvclkhdr_10.io.en <= buf_data_en[2] @[el2_lib.scala 509:17] + rvclkhdr_10.io.scan_mode <= io.scan_mode @[el2_lib.scala 510:24] + reg _T_4411 : UInt, rvclkhdr_10.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 512:16] + _T_4411 <= buf_data_in[2] @[el2_lib.scala 512:16] + inst rvclkhdr_11 of rvclkhdr_35 @[el2_lib.scala 506:23] + rvclkhdr_11.clock <= clock + rvclkhdr_11.reset <= reset + rvclkhdr_11.io.clk <= clock @[el2_lib.scala 508:18] + rvclkhdr_11.io.en <= buf_data_en[3] @[el2_lib.scala 509:17] + rvclkhdr_11.io.scan_mode <= io.scan_mode @[el2_lib.scala 510:24] + reg _T_4412 : UInt, rvclkhdr_11.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 512:16] + _T_4412 <= buf_data_in[3] @[el2_lib.scala 512:16] + buf_data[0] <= _T_4409 @[el2_lsu_bus_buffer.scala 568:14] + buf_data[1] <= _T_4410 @[el2_lsu_bus_buffer.scala 568:14] + buf_data[2] <= _T_4411 @[el2_lsu_bus_buffer.scala 568:14] + buf_data[3] <= _T_4412 @[el2_lsu_bus_buffer.scala 568:14] + node _T_4413 = bits(buf_error, 0, 0) @[el2_lsu_bus_buffer.scala 569:121] + node _T_4414 = mux(buf_error_en[0], UInt<1>("h01"), _T_4413) @[el2_lsu_bus_buffer.scala 569:86] + node _T_4415 = eq(buf_rst[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 569:128] + node _T_4416 = and(_T_4414, _T_4415) @[el2_lsu_bus_buffer.scala 569:126] + reg _T_4417 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 569:82] + _T_4417 <= _T_4416 @[el2_lsu_bus_buffer.scala 569:82] + node _T_4418 = bits(buf_error, 1, 1) @[el2_lsu_bus_buffer.scala 569:121] + node _T_4419 = mux(buf_error_en[1], UInt<1>("h01"), _T_4418) @[el2_lsu_bus_buffer.scala 569:86] + node _T_4420 = eq(buf_rst[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 569:128] + node _T_4421 = and(_T_4419, _T_4420) @[el2_lsu_bus_buffer.scala 569:126] + reg _T_4422 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 569:82] + _T_4422 <= _T_4421 @[el2_lsu_bus_buffer.scala 569:82] + node _T_4423 = bits(buf_error, 2, 2) @[el2_lsu_bus_buffer.scala 569:121] + node _T_4424 = mux(buf_error_en[2], UInt<1>("h01"), _T_4423) @[el2_lsu_bus_buffer.scala 569:86] + node _T_4425 = eq(buf_rst[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 569:128] + node _T_4426 = and(_T_4424, _T_4425) @[el2_lsu_bus_buffer.scala 569:126] + reg _T_4427 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 569:82] + _T_4427 <= _T_4426 @[el2_lsu_bus_buffer.scala 569:82] + node _T_4428 = bits(buf_error, 3, 3) @[el2_lsu_bus_buffer.scala 569:121] + node _T_4429 = mux(buf_error_en[3], UInt<1>("h01"), _T_4428) @[el2_lsu_bus_buffer.scala 569:86] + node _T_4430 = eq(buf_rst[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 569:128] + node _T_4431 = and(_T_4429, _T_4430) @[el2_lsu_bus_buffer.scala 569:126] + reg _T_4432 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 569:82] + _T_4432 <= _T_4431 @[el2_lsu_bus_buffer.scala 569:82] + node _T_4433 = cat(_T_4432, _T_4427) @[Cat.scala 29:58] + node _T_4434 = cat(_T_4433, _T_4422) @[Cat.scala 29:58] + node _T_4435 = cat(_T_4434, _T_4417) @[Cat.scala 29:58] + buf_error <= _T_4435 @[el2_lsu_bus_buffer.scala 569:15] + node _T_4436 = cat(io.lsu_busreq_m, UInt<1>("h00")) @[Cat.scala 29:58] + node _T_4437 = mux(io.ldst_dual_m, _T_4436, io.lsu_busreq_m) @[el2_lsu_bus_buffer.scala 572:28] + node _T_4438 = cat(io.lsu_busreq_r, UInt<1>("h00")) @[Cat.scala 29:58] + node _T_4439 = mux(io.ldst_dual_r, _T_4438, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 572:94] + node _T_4440 = add(_T_4437, _T_4439) @[el2_lsu_bus_buffer.scala 572:88] + node _T_4441 = add(_T_4440, ibuf_valid) @[el2_lsu_bus_buffer.scala 572:154] + node _T_4442 = neq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 572:190] + node _T_4443 = neq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 572:190] + node _T_4444 = neq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 572:190] + node _T_4445 = neq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 572:190] + node _T_4446 = add(_T_4442, _T_4443) @[el2_lsu_bus_buffer.scala 572:217] + node _T_4447 = add(_T_4446, _T_4444) @[el2_lsu_bus_buffer.scala 572:217] + node _T_4448 = add(_T_4447, _T_4445) @[el2_lsu_bus_buffer.scala 572:217] + node _T_4449 = add(_T_4441, _T_4448) @[el2_lsu_bus_buffer.scala 572:169] + node buf_numvld_any = tail(_T_4449, 1) @[el2_lsu_bus_buffer.scala 572:169] + node _T_4450 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 573:60] + node _T_4451 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 573:79] + node _T_4452 = and(_T_4450, _T_4451) @[el2_lsu_bus_buffer.scala 573:64] + node _T_4453 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 573:91] + node _T_4454 = and(_T_4452, _T_4453) @[el2_lsu_bus_buffer.scala 573:89] + node _T_4455 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 573:60] + node _T_4456 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 573:79] + node _T_4457 = and(_T_4455, _T_4456) @[el2_lsu_bus_buffer.scala 573:64] + node _T_4458 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 573:91] + node _T_4459 = and(_T_4457, _T_4458) @[el2_lsu_bus_buffer.scala 573:89] + node _T_4460 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 573:60] + node _T_4461 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 573:79] + node _T_4462 = and(_T_4460, _T_4461) @[el2_lsu_bus_buffer.scala 573:64] + node _T_4463 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 573:91] + node _T_4464 = and(_T_4462, _T_4463) @[el2_lsu_bus_buffer.scala 573:89] + node _T_4465 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 573:60] + node _T_4466 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 573:79] + node _T_4467 = and(_T_4465, _T_4466) @[el2_lsu_bus_buffer.scala 573:64] + node _T_4468 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 573:91] + node _T_4469 = and(_T_4467, _T_4468) @[el2_lsu_bus_buffer.scala 573:89] + node _T_4470 = add(_T_4469, _T_4464) @[el2_lsu_bus_buffer.scala 573:142] + node _T_4471 = add(_T_4470, _T_4459) @[el2_lsu_bus_buffer.scala 573:142] + node _T_4472 = add(_T_4471, _T_4454) @[el2_lsu_bus_buffer.scala 573:142] + buf_numvld_wrcmd_any <= _T_4472 @[el2_lsu_bus_buffer.scala 573:24] + node _T_4473 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 574:63] + node _T_4474 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 574:75] + node _T_4475 = and(_T_4473, _T_4474) @[el2_lsu_bus_buffer.scala 574:73] + node _T_4476 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 574:63] + node _T_4477 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 574:75] + node _T_4478 = and(_T_4476, _T_4477) @[el2_lsu_bus_buffer.scala 574:73] + node _T_4479 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 574:63] + node _T_4480 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 574:75] + node _T_4481 = and(_T_4479, _T_4480) @[el2_lsu_bus_buffer.scala 574:73] + node _T_4482 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 574:63] + node _T_4483 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 574:75] + node _T_4484 = and(_T_4482, _T_4483) @[el2_lsu_bus_buffer.scala 574:73] + node _T_4485 = add(_T_4484, _T_4481) @[el2_lsu_bus_buffer.scala 574:126] + node _T_4486 = add(_T_4485, _T_4478) @[el2_lsu_bus_buffer.scala 574:126] + node _T_4487 = add(_T_4486, _T_4475) @[el2_lsu_bus_buffer.scala 574:126] + buf_numvld_cmd_any <= _T_4487 @[el2_lsu_bus_buffer.scala 574:22] + node _T_4488 = eq(buf_state[0], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 575:63] + node _T_4489 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 575:90] + node _T_4490 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 575:102] + node _T_4491 = and(_T_4489, _T_4490) @[el2_lsu_bus_buffer.scala 575:100] + node _T_4492 = or(_T_4488, _T_4491) @[el2_lsu_bus_buffer.scala 575:74] + node _T_4493 = eq(buf_state[1], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 575:63] + node _T_4494 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 575:90] + node _T_4495 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 575:102] + node _T_4496 = and(_T_4494, _T_4495) @[el2_lsu_bus_buffer.scala 575:100] + node _T_4497 = or(_T_4493, _T_4496) @[el2_lsu_bus_buffer.scala 575:74] + node _T_4498 = eq(buf_state[2], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 575:63] + node _T_4499 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 575:90] + node _T_4500 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 575:102] + node _T_4501 = and(_T_4499, _T_4500) @[el2_lsu_bus_buffer.scala 575:100] + node _T_4502 = or(_T_4498, _T_4501) @[el2_lsu_bus_buffer.scala 575:74] + node _T_4503 = eq(buf_state[3], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 575:63] + node _T_4504 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 575:90] + node _T_4505 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 575:102] + node _T_4506 = and(_T_4504, _T_4505) @[el2_lsu_bus_buffer.scala 575:100] + node _T_4507 = or(_T_4503, _T_4506) @[el2_lsu_bus_buffer.scala 575:74] + node _T_4508 = add(_T_4507, _T_4502) @[el2_lsu_bus_buffer.scala 575:154] + node _T_4509 = add(_T_4508, _T_4497) @[el2_lsu_bus_buffer.scala 575:154] + node _T_4510 = add(_T_4509, _T_4492) @[el2_lsu_bus_buffer.scala 575:154] + buf_numvld_pend_any <= _T_4510 @[el2_lsu_bus_buffer.scala 575:23] + node _T_4511 = eq(buf_state[0], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 576:61] + node _T_4512 = eq(buf_state[1], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 576:61] + node _T_4513 = eq(buf_state[2], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 576:61] + node _T_4514 = eq(buf_state[3], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 576:61] + node _T_4515 = or(_T_4514, _T_4513) @[el2_lsu_bus_buffer.scala 576:93] + node _T_4516 = or(_T_4515, _T_4512) @[el2_lsu_bus_buffer.scala 576:93] + node _T_4517 = or(_T_4516, _T_4511) @[el2_lsu_bus_buffer.scala 576:93] + any_done_wait_state <= _T_4517 @[el2_lsu_bus_buffer.scala 576:23] + node _T_4518 = orr(buf_numvld_pend_any) @[el2_lsu_bus_buffer.scala 577:53] + io.lsu_bus_buffer_pend_any <= _T_4518 @[el2_lsu_bus_buffer.scala 577:30] + node _T_4519 = and(io.ldst_dual_d, io.dec_lsu_valid_raw_d) @[el2_lsu_bus_buffer.scala 578:52] + node _T_4520 = geq(buf_numvld_any, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 578:92] + node _T_4521 = eq(buf_numvld_any, UInt<3>("h04")) @[el2_lsu_bus_buffer.scala 578:121] + node _T_4522 = mux(_T_4519, _T_4520, _T_4521) @[el2_lsu_bus_buffer.scala 578:36] + io.lsu_bus_buffer_full_any <= _T_4522 @[el2_lsu_bus_buffer.scala 578:30] + node _T_4523 = orr(buf_state[0]) @[el2_lsu_bus_buffer.scala 579:52] + node _T_4524 = orr(buf_state[1]) @[el2_lsu_bus_buffer.scala 579:52] + node _T_4525 = orr(buf_state[2]) @[el2_lsu_bus_buffer.scala 579:52] + node _T_4526 = orr(buf_state[3]) @[el2_lsu_bus_buffer.scala 579:52] + node _T_4527 = or(_T_4523, _T_4524) @[el2_lsu_bus_buffer.scala 579:65] + node _T_4528 = or(_T_4527, _T_4525) @[el2_lsu_bus_buffer.scala 579:65] + node _T_4529 = or(_T_4528, _T_4526) @[el2_lsu_bus_buffer.scala 579:65] + node _T_4530 = eq(_T_4529, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 579:34] + node _T_4531 = eq(ibuf_valid, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 579:72] + node _T_4532 = and(_T_4530, _T_4531) @[el2_lsu_bus_buffer.scala 579:70] + node _T_4533 = eq(obuf_valid, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 579:86] + node _T_4534 = and(_T_4532, _T_4533) @[el2_lsu_bus_buffer.scala 579:84] + io.lsu_bus_buffer_empty_any <= _T_4534 @[el2_lsu_bus_buffer.scala 579:31] + node _T_4535 = and(io.lsu_busreq_m, io.lsu_pkt_m.valid) @[el2_lsu_bus_buffer.scala 581:51] + node _T_4536 = and(_T_4535, io.lsu_pkt_m.load) @[el2_lsu_bus_buffer.scala 581:72] + node _T_4537 = eq(io.flush_m_up, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 581:94] + node _T_4538 = and(_T_4536, _T_4537) @[el2_lsu_bus_buffer.scala 581:92] + node _T_4539 = eq(io.ld_full_hit_m, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 581:111] + node _T_4540 = and(_T_4538, _T_4539) @[el2_lsu_bus_buffer.scala 581:109] + io.lsu_nonblock_load_valid_m <= _T_4540 @[el2_lsu_bus_buffer.scala 581:32] + io.lsu_nonblock_load_tag_m <= WrPtr0_m @[el2_lsu_bus_buffer.scala 582:30] + wire lsu_nonblock_load_valid_r : UInt<1> + lsu_nonblock_load_valid_r <= UInt<1>("h00") + node _T_4541 = eq(io.lsu_commit_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 584:61] + node _T_4542 = and(lsu_nonblock_load_valid_r, _T_4541) @[el2_lsu_bus_buffer.scala 584:59] + io.lsu_nonblock_load_inv_r <= _T_4542 @[el2_lsu_bus_buffer.scala 584:30] + io.lsu_nonblock_load_inv_tag_r <= WrPtr0_r @[el2_lsu_bus_buffer.scala 585:34] + node _T_4543 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 586:80] + node _T_4544 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 586:127] + node _T_4545 = and(UInt<1>("h01"), _T_4544) @[el2_lsu_bus_buffer.scala 586:116] + node _T_4546 = eq(_T_4545, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 586:95] + node _T_4547 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 586:80] + node _T_4548 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 586:127] + node _T_4549 = and(UInt<1>("h01"), _T_4548) @[el2_lsu_bus_buffer.scala 586:116] + node _T_4550 = eq(_T_4549, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 586:95] + node _T_4551 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 586:80] + node _T_4552 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 586:127] + node _T_4553 = and(UInt<1>("h01"), _T_4552) @[el2_lsu_bus_buffer.scala 586:116] + node _T_4554 = eq(_T_4553, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 586:95] + node _T_4555 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 586:80] + node _T_4556 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 586:127] + node _T_4557 = and(UInt<1>("h01"), _T_4556) @[el2_lsu_bus_buffer.scala 586:116] + node _T_4558 = eq(_T_4557, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 586:95] + node _T_4559 = mux(_T_4543, _T_4546, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4560 = mux(_T_4547, _T_4550, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4561 = mux(_T_4551, _T_4554, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4562 = mux(_T_4555, _T_4558, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4563 = or(_T_4559, _T_4560) @[Mux.scala 27:72] + node _T_4564 = or(_T_4563, _T_4561) @[Mux.scala 27:72] + node _T_4565 = or(_T_4564, _T_4562) @[Mux.scala 27:72] + wire lsu_nonblock_load_data_ready : UInt<1> @[Mux.scala 27:72] + lsu_nonblock_load_data_ready <= _T_4565 @[Mux.scala 27:72] + node _T_4566 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 587:80] + node _T_4567 = bits(buf_error, 0, 0) @[el2_lsu_bus_buffer.scala 587:104] + node _T_4568 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 587:120] + node _T_4569 = eq(_T_4568, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 587:110] + node _T_4570 = and(_T_4567, _T_4569) @[el2_lsu_bus_buffer.scala 587:108] + node _T_4571 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 587:80] + node _T_4572 = bits(buf_error, 1, 1) @[el2_lsu_bus_buffer.scala 587:104] + node _T_4573 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 587:120] + node _T_4574 = eq(_T_4573, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 587:110] + node _T_4575 = and(_T_4572, _T_4574) @[el2_lsu_bus_buffer.scala 587:108] + node _T_4576 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 587:80] + node _T_4577 = bits(buf_error, 2, 2) @[el2_lsu_bus_buffer.scala 587:104] + node _T_4578 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 587:120] + node _T_4579 = eq(_T_4578, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 587:110] + node _T_4580 = and(_T_4577, _T_4579) @[el2_lsu_bus_buffer.scala 587:108] + node _T_4581 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 587:80] + node _T_4582 = bits(buf_error, 3, 3) @[el2_lsu_bus_buffer.scala 587:104] + node _T_4583 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 587:120] + node _T_4584 = eq(_T_4583, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 587:110] + node _T_4585 = and(_T_4582, _T_4584) @[el2_lsu_bus_buffer.scala 587:108] + node _T_4586 = mux(_T_4566, _T_4570, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4587 = mux(_T_4571, _T_4575, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4588 = mux(_T_4576, _T_4580, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4589 = mux(_T_4581, _T_4585, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4590 = or(_T_4586, _T_4587) @[Mux.scala 27:72] + node _T_4591 = or(_T_4590, _T_4588) @[Mux.scala 27:72] + node _T_4592 = or(_T_4591, _T_4589) @[Mux.scala 27:72] + wire _T_4593 : UInt<1> @[Mux.scala 27:72] + _T_4593 <= _T_4592 @[Mux.scala 27:72] + io.lsu_nonblock_load_data_error <= _T_4593 @[el2_lsu_bus_buffer.scala 587:35] + node _T_4594 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 588:79] + node _T_4595 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 588:102] + node _T_4596 = eq(_T_4595, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 588:92] + node _T_4597 = and(_T_4594, _T_4596) @[el2_lsu_bus_buffer.scala 588:90] + node _T_4598 = eq(buf_dual[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 588:109] + node _T_4599 = eq(buf_dualhi[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 588:124] + node _T_4600 = or(_T_4598, _T_4599) @[el2_lsu_bus_buffer.scala 588:122] + node _T_4601 = and(_T_4597, _T_4600) @[el2_lsu_bus_buffer.scala 588:106] + node _T_4602 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 588:79] + node _T_4603 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 588:102] + node _T_4604 = eq(_T_4603, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 588:92] + node _T_4605 = and(_T_4602, _T_4604) @[el2_lsu_bus_buffer.scala 588:90] + node _T_4606 = eq(buf_dual[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 588:109] + node _T_4607 = eq(buf_dualhi[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 588:124] + node _T_4608 = or(_T_4606, _T_4607) @[el2_lsu_bus_buffer.scala 588:122] + node _T_4609 = and(_T_4605, _T_4608) @[el2_lsu_bus_buffer.scala 588:106] + node _T_4610 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 588:79] + node _T_4611 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 588:102] + node _T_4612 = eq(_T_4611, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 588:92] + node _T_4613 = and(_T_4610, _T_4612) @[el2_lsu_bus_buffer.scala 588:90] + node _T_4614 = eq(buf_dual[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 588:109] + node _T_4615 = eq(buf_dualhi[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 588:124] + node _T_4616 = or(_T_4614, _T_4615) @[el2_lsu_bus_buffer.scala 588:122] + node _T_4617 = and(_T_4613, _T_4616) @[el2_lsu_bus_buffer.scala 588:106] + node _T_4618 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 588:79] + node _T_4619 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 588:102] + node _T_4620 = eq(_T_4619, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 588:92] + node _T_4621 = and(_T_4618, _T_4620) @[el2_lsu_bus_buffer.scala 588:90] + node _T_4622 = eq(buf_dual[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 588:109] + node _T_4623 = eq(buf_dualhi[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 588:124] + node _T_4624 = or(_T_4622, _T_4623) @[el2_lsu_bus_buffer.scala 588:122] + node _T_4625 = and(_T_4621, _T_4624) @[el2_lsu_bus_buffer.scala 588:106] + node _T_4626 = mux(_T_4601, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4627 = mux(_T_4609, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4628 = mux(_T_4617, UInt<2>("h02"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4629 = mux(_T_4625, UInt<2>("h03"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4630 = or(_T_4626, _T_4627) @[Mux.scala 27:72] + node _T_4631 = or(_T_4630, _T_4628) @[Mux.scala 27:72] + node _T_4632 = or(_T_4631, _T_4629) @[Mux.scala 27:72] + wire _T_4633 : UInt<2> @[Mux.scala 27:72] + _T_4633 <= _T_4632 @[Mux.scala 27:72] + io.lsu_nonblock_load_data_tag <= _T_4633 @[el2_lsu_bus_buffer.scala 588:33] + node _T_4634 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 589:78] + node _T_4635 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 589:101] + node _T_4636 = eq(_T_4635, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 589:91] + node _T_4637 = and(_T_4634, _T_4636) @[el2_lsu_bus_buffer.scala 589:89] + node _T_4638 = eq(buf_dual[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 589:108] + node _T_4639 = eq(buf_dualhi[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 589:123] + node _T_4640 = or(_T_4638, _T_4639) @[el2_lsu_bus_buffer.scala 589:121] + node _T_4641 = and(_T_4637, _T_4640) @[el2_lsu_bus_buffer.scala 589:105] + node _T_4642 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 589:78] + node _T_4643 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 589:101] + node _T_4644 = eq(_T_4643, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 589:91] + node _T_4645 = and(_T_4642, _T_4644) @[el2_lsu_bus_buffer.scala 589:89] + node _T_4646 = eq(buf_dual[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 589:108] + node _T_4647 = eq(buf_dualhi[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 589:123] + node _T_4648 = or(_T_4646, _T_4647) @[el2_lsu_bus_buffer.scala 589:121] + node _T_4649 = and(_T_4645, _T_4648) @[el2_lsu_bus_buffer.scala 589:105] + node _T_4650 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 589:78] + node _T_4651 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 589:101] + node _T_4652 = eq(_T_4651, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 589:91] + node _T_4653 = and(_T_4650, _T_4652) @[el2_lsu_bus_buffer.scala 589:89] + node _T_4654 = eq(buf_dual[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 589:108] + node _T_4655 = eq(buf_dualhi[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 589:123] + node _T_4656 = or(_T_4654, _T_4655) @[el2_lsu_bus_buffer.scala 589:121] + node _T_4657 = and(_T_4653, _T_4656) @[el2_lsu_bus_buffer.scala 589:105] + node _T_4658 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 589:78] + node _T_4659 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 589:101] + node _T_4660 = eq(_T_4659, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 589:91] + node _T_4661 = and(_T_4658, _T_4660) @[el2_lsu_bus_buffer.scala 589:89] + node _T_4662 = eq(buf_dual[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 589:108] + node _T_4663 = eq(buf_dualhi[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 589:123] + node _T_4664 = or(_T_4662, _T_4663) @[el2_lsu_bus_buffer.scala 589:121] + node _T_4665 = and(_T_4661, _T_4664) @[el2_lsu_bus_buffer.scala 589:105] + node _T_4666 = mux(_T_4641, buf_data[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4667 = mux(_T_4649, buf_data[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4668 = mux(_T_4657, buf_data[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4669 = mux(_T_4665, buf_data[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4670 = or(_T_4666, _T_4667) @[Mux.scala 27:72] + node _T_4671 = or(_T_4670, _T_4668) @[Mux.scala 27:72] + node _T_4672 = or(_T_4671, _T_4669) @[Mux.scala 27:72] + wire lsu_nonblock_load_data_lo : UInt<32> @[Mux.scala 27:72] + lsu_nonblock_load_data_lo <= _T_4672 @[Mux.scala 27:72] + node _T_4673 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 590:78] + node _T_4674 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 590:101] + node _T_4675 = eq(_T_4674, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 590:91] + node _T_4676 = and(_T_4673, _T_4675) @[el2_lsu_bus_buffer.scala 590:89] + node _T_4677 = or(buf_dual[0], buf_dualhi[0]) @[el2_lsu_bus_buffer.scala 590:120] + node _T_4678 = and(_T_4676, _T_4677) @[el2_lsu_bus_buffer.scala 590:105] + node _T_4679 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 590:78] + node _T_4680 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 590:101] + node _T_4681 = eq(_T_4680, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 590:91] + node _T_4682 = and(_T_4679, _T_4681) @[el2_lsu_bus_buffer.scala 590:89] + node _T_4683 = or(buf_dual[1], buf_dualhi[1]) @[el2_lsu_bus_buffer.scala 590:120] + node _T_4684 = and(_T_4682, _T_4683) @[el2_lsu_bus_buffer.scala 590:105] + node _T_4685 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 590:78] + node _T_4686 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 590:101] + node _T_4687 = eq(_T_4686, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 590:91] + node _T_4688 = and(_T_4685, _T_4687) @[el2_lsu_bus_buffer.scala 590:89] + node _T_4689 = or(buf_dual[2], buf_dualhi[2]) @[el2_lsu_bus_buffer.scala 590:120] + node _T_4690 = and(_T_4688, _T_4689) @[el2_lsu_bus_buffer.scala 590:105] + node _T_4691 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 590:78] + node _T_4692 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 590:101] + node _T_4693 = eq(_T_4692, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 590:91] + node _T_4694 = and(_T_4691, _T_4693) @[el2_lsu_bus_buffer.scala 590:89] + node _T_4695 = or(buf_dual[3], buf_dualhi[3]) @[el2_lsu_bus_buffer.scala 590:120] + node _T_4696 = and(_T_4694, _T_4695) @[el2_lsu_bus_buffer.scala 590:105] + node _T_4697 = mux(_T_4678, buf_data[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4698 = mux(_T_4684, buf_data[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4699 = mux(_T_4690, buf_data[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4700 = mux(_T_4696, buf_data[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4701 = or(_T_4697, _T_4698) @[Mux.scala 27:72] + node _T_4702 = or(_T_4701, _T_4699) @[Mux.scala 27:72] + node _T_4703 = or(_T_4702, _T_4700) @[Mux.scala 27:72] + wire lsu_nonblock_load_data_hi : UInt<32> @[Mux.scala 27:72] + lsu_nonblock_load_data_hi <= _T_4703 @[Mux.scala 27:72] + node _T_4704 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_4705 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_4706 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_4707 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_4708 = mux(_T_4704, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4709 = mux(_T_4705, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4710 = mux(_T_4706, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4711 = mux(_T_4707, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4712 = or(_T_4708, _T_4709) @[Mux.scala 27:72] + node _T_4713 = or(_T_4712, _T_4710) @[Mux.scala 27:72] + node _T_4714 = or(_T_4713, _T_4711) @[Mux.scala 27:72] + wire _T_4715 : UInt<32> @[Mux.scala 27:72] + _T_4715 <= _T_4714 @[Mux.scala 27:72] + node lsu_nonblock_addr_offset = bits(_T_4715, 1, 0) @[el2_lsu_bus_buffer.scala 591:83] + node _T_4716 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_4717 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_4718 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_4719 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_4720 = mux(_T_4716, buf_sz[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4721 = mux(_T_4717, buf_sz[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4722 = mux(_T_4718, buf_sz[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4723 = mux(_T_4719, buf_sz[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4724 = or(_T_4720, _T_4721) @[Mux.scala 27:72] + node _T_4725 = or(_T_4724, _T_4722) @[Mux.scala 27:72] + node _T_4726 = or(_T_4725, _T_4723) @[Mux.scala 27:72] + wire lsu_nonblock_sz : UInt<2> @[Mux.scala 27:72] + lsu_nonblock_sz <= _T_4726 @[Mux.scala 27:72] + node _T_4727 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_4728 = bits(buf_unsign, 0, 0) @[el2_lsu_bus_buffer.scala 109:129] + node _T_4729 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_4730 = bits(buf_unsign, 1, 1) @[el2_lsu_bus_buffer.scala 109:129] + node _T_4731 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_4732 = bits(buf_unsign, 2, 2) @[el2_lsu_bus_buffer.scala 109:129] + node _T_4733 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_4734 = bits(buf_unsign, 3, 3) @[el2_lsu_bus_buffer.scala 109:129] + node _T_4735 = mux(_T_4727, _T_4728, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4736 = mux(_T_4729, _T_4730, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4737 = mux(_T_4731, _T_4732, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4738 = mux(_T_4733, _T_4734, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4739 = or(_T_4735, _T_4736) @[Mux.scala 27:72] + node _T_4740 = or(_T_4739, _T_4737) @[Mux.scala 27:72] + node _T_4741 = or(_T_4740, _T_4738) @[Mux.scala 27:72] + wire lsu_nonblock_unsign : UInt<1> @[Mux.scala 27:72] + lsu_nonblock_unsign <= _T_4741 @[Mux.scala 27:72] + node _T_4742 = cat(buf_dual[3], buf_dual[2]) @[Cat.scala 29:58] + node _T_4743 = cat(_T_4742, buf_dual[1]) @[Cat.scala 29:58] + node _T_4744 = cat(_T_4743, buf_dual[0]) @[Cat.scala 29:58] + node _T_4745 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_4746 = bits(_T_4744, 0, 0) @[el2_lsu_bus_buffer.scala 109:129] + node _T_4747 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_4748 = bits(_T_4744, 1, 1) @[el2_lsu_bus_buffer.scala 109:129] + node _T_4749 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_4750 = bits(_T_4744, 2, 2) @[el2_lsu_bus_buffer.scala 109:129] + node _T_4751 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_4752 = bits(_T_4744, 3, 3) @[el2_lsu_bus_buffer.scala 109:129] + node _T_4753 = mux(_T_4745, _T_4746, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4754 = mux(_T_4747, _T_4748, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4755 = mux(_T_4749, _T_4750, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4756 = mux(_T_4751, _T_4752, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4757 = or(_T_4753, _T_4754) @[Mux.scala 27:72] + node _T_4758 = or(_T_4757, _T_4755) @[Mux.scala 27:72] + node _T_4759 = or(_T_4758, _T_4756) @[Mux.scala 27:72] + wire lsu_nonblock_dual : UInt<1> @[Mux.scala 27:72] + lsu_nonblock_dual <= _T_4759 @[Mux.scala 27:72] + node _T_4760 = cat(lsu_nonblock_load_data_hi, lsu_nonblock_load_data_lo) @[Cat.scala 29:58] + node _T_4761 = mul(lsu_nonblock_addr_offset, UInt<4>("h08")) @[el2_lsu_bus_buffer.scala 595:121] + node lsu_nonblock_data_unalgn = dshr(_T_4760, _T_4761) @[el2_lsu_bus_buffer.scala 595:92] + node _T_4762 = eq(io.lsu_nonblock_load_data_error, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 597:69] + node _T_4763 = and(lsu_nonblock_load_data_ready, _T_4762) @[el2_lsu_bus_buffer.scala 597:67] + io.lsu_nonblock_load_data_valid <= _T_4763 @[el2_lsu_bus_buffer.scala 597:35] + node _T_4764 = eq(lsu_nonblock_sz, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 598:81] + node _T_4765 = and(lsu_nonblock_unsign, _T_4764) @[el2_lsu_bus_buffer.scala 598:63] + node _T_4766 = bits(lsu_nonblock_data_unalgn, 7, 0) @[el2_lsu_bus_buffer.scala 598:131] + node _T_4767 = cat(UInt<24>("h00"), _T_4766) @[Cat.scala 29:58] + node _T_4768 = eq(lsu_nonblock_sz, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 599:45] + node _T_4769 = and(lsu_nonblock_unsign, _T_4768) @[el2_lsu_bus_buffer.scala 599:26] + node _T_4770 = bits(lsu_nonblock_data_unalgn, 15, 0) @[el2_lsu_bus_buffer.scala 599:95] + node _T_4771 = cat(UInt<16>("h00"), _T_4770) @[Cat.scala 29:58] + node _T_4772 = eq(lsu_nonblock_unsign, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 600:6] + node _T_4773 = eq(lsu_nonblock_sz, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 600:45] + node _T_4774 = and(_T_4772, _T_4773) @[el2_lsu_bus_buffer.scala 600:27] + node _T_4775 = bits(lsu_nonblock_data_unalgn, 7, 7) @[el2_lsu_bus_buffer.scala 600:93] + node _T_4776 = bits(_T_4775, 0, 0) @[Bitwise.scala 72:15] + node _T_4777 = mux(_T_4776, UInt<24>("h0ffffff"), UInt<24>("h00")) @[Bitwise.scala 72:12] + node _T_4778 = bits(lsu_nonblock_data_unalgn, 7, 0) @[el2_lsu_bus_buffer.scala 600:123] + node _T_4779 = cat(_T_4777, _T_4778) @[Cat.scala 29:58] + node _T_4780 = eq(lsu_nonblock_unsign, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 601:6] + node _T_4781 = eq(lsu_nonblock_sz, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 601:45] + node _T_4782 = and(_T_4780, _T_4781) @[el2_lsu_bus_buffer.scala 601:27] + node _T_4783 = bits(lsu_nonblock_data_unalgn, 15, 15) @[el2_lsu_bus_buffer.scala 601:93] + node _T_4784 = bits(_T_4783, 0, 0) @[Bitwise.scala 72:15] + node _T_4785 = mux(_T_4784, UInt<16>("h0ffff"), UInt<16>("h00")) @[Bitwise.scala 72:12] + node _T_4786 = bits(lsu_nonblock_data_unalgn, 15, 0) @[el2_lsu_bus_buffer.scala 601:124] + node _T_4787 = cat(_T_4785, _T_4786) @[Cat.scala 29:58] + node _T_4788 = eq(lsu_nonblock_sz, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 602:21] + node _T_4789 = mux(_T_4765, _T_4767, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4790 = mux(_T_4769, _T_4771, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4791 = mux(_T_4774, _T_4779, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4792 = mux(_T_4782, _T_4787, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4793 = mux(_T_4788, lsu_nonblock_data_unalgn, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4794 = or(_T_4789, _T_4790) @[Mux.scala 27:72] + node _T_4795 = or(_T_4794, _T_4791) @[Mux.scala 27:72] + node _T_4796 = or(_T_4795, _T_4792) @[Mux.scala 27:72] + node _T_4797 = or(_T_4796, _T_4793) @[Mux.scala 27:72] + wire _T_4798 : UInt<64> @[Mux.scala 27:72] + _T_4798 <= _T_4797 @[Mux.scala 27:72] + io.lsu_nonblock_load_data <= _T_4798 @[el2_lsu_bus_buffer.scala 598:29] + node _T_4799 = eq(buf_state[0], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 603:62] + node _T_4800 = bits(buf_sideeffect, 0, 0) @[el2_lsu_bus_buffer.scala 603:89] + node _T_4801 = and(_T_4799, _T_4800) @[el2_lsu_bus_buffer.scala 603:73] + node _T_4802 = and(_T_4801, io.dec_tlu_sideeffect_posted_disable) @[el2_lsu_bus_buffer.scala 603:93] + node _T_4803 = eq(buf_state[1], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 603:62] + node _T_4804 = bits(buf_sideeffect, 1, 1) @[el2_lsu_bus_buffer.scala 603:89] + node _T_4805 = and(_T_4803, _T_4804) @[el2_lsu_bus_buffer.scala 603:73] + node _T_4806 = and(_T_4805, io.dec_tlu_sideeffect_posted_disable) @[el2_lsu_bus_buffer.scala 603:93] + node _T_4807 = eq(buf_state[2], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 603:62] + node _T_4808 = bits(buf_sideeffect, 2, 2) @[el2_lsu_bus_buffer.scala 603:89] + node _T_4809 = and(_T_4807, _T_4808) @[el2_lsu_bus_buffer.scala 603:73] + node _T_4810 = and(_T_4809, io.dec_tlu_sideeffect_posted_disable) @[el2_lsu_bus_buffer.scala 603:93] + node _T_4811 = eq(buf_state[3], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 603:62] + node _T_4812 = bits(buf_sideeffect, 3, 3) @[el2_lsu_bus_buffer.scala 603:89] + node _T_4813 = and(_T_4811, _T_4812) @[el2_lsu_bus_buffer.scala 603:73] + node _T_4814 = and(_T_4813, io.dec_tlu_sideeffect_posted_disable) @[el2_lsu_bus_buffer.scala 603:93] + node _T_4815 = or(_T_4802, _T_4806) @[el2_lsu_bus_buffer.scala 603:141] + node _T_4816 = or(_T_4815, _T_4810) @[el2_lsu_bus_buffer.scala 603:141] + node _T_4817 = or(_T_4816, _T_4814) @[el2_lsu_bus_buffer.scala 603:141] + bus_sideeffect_pend <= _T_4817 @[el2_lsu_bus_buffer.scala 603:23] + node _T_4818 = eq(buf_state[0], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 604:71] + node _T_4819 = and(UInt<1>("h01"), obuf_valid) @[el2_lsu_bus_buffer.scala 605:25] + node _T_4820 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 605:50] + node _T_4821 = bits(buf_addr[0], 31, 3) @[el2_lsu_bus_buffer.scala 605:70] + node _T_4822 = eq(_T_4820, _T_4821) @[el2_lsu_bus_buffer.scala 605:56] + node _T_4823 = and(_T_4819, _T_4822) @[el2_lsu_bus_buffer.scala 605:38] + node _T_4824 = eq(obuf_tag0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 605:92] + node _T_4825 = eq(obuf_tag1, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 605:126] + node _T_4826 = and(obuf_merge, _T_4825) @[el2_lsu_bus_buffer.scala 605:114] + node _T_4827 = or(_T_4824, _T_4826) @[el2_lsu_bus_buffer.scala 605:100] + node _T_4828 = eq(_T_4827, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 605:80] + node _T_4829 = and(_T_4823, _T_4828) @[el2_lsu_bus_buffer.scala 605:78] + node _T_4830 = eq(buf_state[1], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 604:71] + node _T_4831 = and(UInt<1>("h01"), obuf_valid) @[el2_lsu_bus_buffer.scala 605:25] + node _T_4832 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 605:50] + node _T_4833 = bits(buf_addr[1], 31, 3) @[el2_lsu_bus_buffer.scala 605:70] + node _T_4834 = eq(_T_4832, _T_4833) @[el2_lsu_bus_buffer.scala 605:56] + node _T_4835 = and(_T_4831, _T_4834) @[el2_lsu_bus_buffer.scala 605:38] + node _T_4836 = eq(obuf_tag0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 605:92] + node _T_4837 = eq(obuf_tag1, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 605:126] + node _T_4838 = and(obuf_merge, _T_4837) @[el2_lsu_bus_buffer.scala 605:114] + node _T_4839 = or(_T_4836, _T_4838) @[el2_lsu_bus_buffer.scala 605:100] + node _T_4840 = eq(_T_4839, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 605:80] + node _T_4841 = and(_T_4835, _T_4840) @[el2_lsu_bus_buffer.scala 605:78] + node _T_4842 = eq(buf_state[2], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 604:71] + node _T_4843 = and(UInt<1>("h01"), obuf_valid) @[el2_lsu_bus_buffer.scala 605:25] + node _T_4844 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 605:50] + node _T_4845 = bits(buf_addr[2], 31, 3) @[el2_lsu_bus_buffer.scala 605:70] + node _T_4846 = eq(_T_4844, _T_4845) @[el2_lsu_bus_buffer.scala 605:56] + node _T_4847 = and(_T_4843, _T_4846) @[el2_lsu_bus_buffer.scala 605:38] + node _T_4848 = eq(obuf_tag0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 605:92] + node _T_4849 = eq(obuf_tag1, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 605:126] + node _T_4850 = and(obuf_merge, _T_4849) @[el2_lsu_bus_buffer.scala 605:114] + node _T_4851 = or(_T_4848, _T_4850) @[el2_lsu_bus_buffer.scala 605:100] + node _T_4852 = eq(_T_4851, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 605:80] + node _T_4853 = and(_T_4847, _T_4852) @[el2_lsu_bus_buffer.scala 605:78] + node _T_4854 = eq(buf_state[3], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 604:71] + node _T_4855 = and(UInt<1>("h01"), obuf_valid) @[el2_lsu_bus_buffer.scala 605:25] + node _T_4856 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 605:50] + node _T_4857 = bits(buf_addr[3], 31, 3) @[el2_lsu_bus_buffer.scala 605:70] + node _T_4858 = eq(_T_4856, _T_4857) @[el2_lsu_bus_buffer.scala 605:56] + node _T_4859 = and(_T_4855, _T_4858) @[el2_lsu_bus_buffer.scala 605:38] + node _T_4860 = eq(obuf_tag0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 605:92] + node _T_4861 = eq(obuf_tag1, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 605:126] + node _T_4862 = and(obuf_merge, _T_4861) @[el2_lsu_bus_buffer.scala 605:114] + node _T_4863 = or(_T_4860, _T_4862) @[el2_lsu_bus_buffer.scala 605:100] + node _T_4864 = eq(_T_4863, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 605:80] + node _T_4865 = and(_T_4859, _T_4864) @[el2_lsu_bus_buffer.scala 605:78] + node _T_4866 = mux(_T_4818, _T_4829, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4867 = mux(_T_4830, _T_4841, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4868 = mux(_T_4842, _T_4853, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4869 = mux(_T_4854, _T_4865, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4870 = or(_T_4866, _T_4867) @[Mux.scala 27:72] + node _T_4871 = or(_T_4870, _T_4868) @[Mux.scala 27:72] + node _T_4872 = or(_T_4871, _T_4869) @[Mux.scala 27:72] + wire _T_4873 : UInt<1> @[Mux.scala 27:72] + _T_4873 <= _T_4872 @[Mux.scala 27:72] + bus_addr_match_pending <= _T_4873 @[el2_lsu_bus_buffer.scala 604:26] + node _T_4874 = or(obuf_cmd_done, obuf_data_done) @[el2_lsu_bus_buffer.scala 607:54] + node _T_4875 = mux(obuf_cmd_done, io.lsu_axi_wready, io.lsu_axi_awready) @[el2_lsu_bus_buffer.scala 607:75] + node _T_4876 = and(io.lsu_axi_awready, io.lsu_axi_awready) @[el2_lsu_bus_buffer.scala 607:150] + node _T_4877 = mux(_T_4874, _T_4875, _T_4876) @[el2_lsu_bus_buffer.scala 607:39] + node _T_4878 = mux(obuf_write, _T_4877, io.lsu_axi_arready) @[el2_lsu_bus_buffer.scala 607:23] + bus_cmd_ready <= _T_4878 @[el2_lsu_bus_buffer.scala 607:17] + node _T_4879 = and(io.lsu_axi_awvalid, io.lsu_axi_awready) @[el2_lsu_bus_buffer.scala 608:39] + bus_wcmd_sent <= _T_4879 @[el2_lsu_bus_buffer.scala 608:17] + node _T_4880 = and(io.lsu_axi_wvalid, io.lsu_axi_wready) @[el2_lsu_bus_buffer.scala 609:39] + bus_wdata_sent <= _T_4880 @[el2_lsu_bus_buffer.scala 609:18] + node _T_4881 = or(obuf_cmd_done, bus_wcmd_sent) @[el2_lsu_bus_buffer.scala 610:35] + node _T_4882 = or(obuf_data_done, bus_wdata_sent) @[el2_lsu_bus_buffer.scala 610:70] + node _T_4883 = and(_T_4881, _T_4882) @[el2_lsu_bus_buffer.scala 610:52] + node _T_4884 = and(io.lsu_axi_arvalid, io.lsu_axi_arready) @[el2_lsu_bus_buffer.scala 610:111] + node _T_4885 = or(_T_4883, _T_4884) @[el2_lsu_bus_buffer.scala 610:89] + bus_cmd_sent <= _T_4885 @[el2_lsu_bus_buffer.scala 610:16] + node _T_4886 = and(io.lsu_axi_rvalid, io.lsu_axi_rready) @[el2_lsu_bus_buffer.scala 611:37] + bus_rsp_read <= _T_4886 @[el2_lsu_bus_buffer.scala 611:16] + node _T_4887 = and(io.lsu_axi_bvalid, io.lsu_axi_bready) @[el2_lsu_bus_buffer.scala 612:38] + bus_rsp_write <= _T_4887 @[el2_lsu_bus_buffer.scala 612:17] + bus_rsp_read_tag <= io.lsu_axi_rid @[el2_lsu_bus_buffer.scala 613:20] + bus_rsp_write_tag <= io.lsu_axi_bid @[el2_lsu_bus_buffer.scala 614:21] + node _T_4888 = neq(io.lsu_axi_bresp, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 615:60] + node _T_4889 = and(bus_rsp_write, _T_4888) @[el2_lsu_bus_buffer.scala 615:40] + bus_rsp_write_error <= _T_4889 @[el2_lsu_bus_buffer.scala 615:23] + node _T_4890 = neq(io.lsu_axi_bresp, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 616:58] + node _T_4891 = and(bus_rsp_read, _T_4890) @[el2_lsu_bus_buffer.scala 616:38] + bus_rsp_read_error <= _T_4891 @[el2_lsu_bus_buffer.scala 616:22] + bus_rsp_rdata <= io.lsu_axi_rdata @[el2_lsu_bus_buffer.scala 617:17] + node _T_4892 = and(obuf_valid, obuf_write) @[el2_lsu_bus_buffer.scala 620:36] + node _T_4893 = eq(obuf_cmd_done, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 620:51] + node _T_4894 = and(_T_4892, _T_4893) @[el2_lsu_bus_buffer.scala 620:49] + node _T_4895 = eq(bus_addr_match_pending, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 620:68] + node _T_4896 = and(_T_4894, _T_4895) @[el2_lsu_bus_buffer.scala 620:66] + io.lsu_axi_awvalid <= _T_4896 @[el2_lsu_bus_buffer.scala 620:22] + io.lsu_axi_awid <= obuf_tag0 @[el2_lsu_bus_buffer.scala 621:19] + node _T_4897 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 622:69] + node _T_4898 = cat(_T_4897, UInt<3>("h00")) @[Cat.scala 29:58] + node _T_4899 = mux(obuf_sideeffect, obuf_addr, _T_4898) @[el2_lsu_bus_buffer.scala 622:27] + io.lsu_axi_awaddr <= _T_4899 @[el2_lsu_bus_buffer.scala 622:21] + node _T_4900 = cat(UInt<1>("h00"), obuf_sz) @[Cat.scala 29:58] + node _T_4901 = mux(obuf_sideeffect, _T_4900, UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 623:27] + io.lsu_axi_awsize <= _T_4901 @[el2_lsu_bus_buffer.scala 623:21] + io.lsu_axi_awprot <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 624:21] + node _T_4902 = mux(obuf_sideeffect, UInt<1>("h00"), UInt<4>("h0f")) @[el2_lsu_bus_buffer.scala 625:28] + io.lsu_axi_awcache <= _T_4902 @[el2_lsu_bus_buffer.scala 625:22] + node _T_4903 = bits(obuf_addr, 31, 28) @[el2_lsu_bus_buffer.scala 626:35] + io.lsu_axi_awregion <= _T_4903 @[el2_lsu_bus_buffer.scala 626:23] + io.lsu_axi_awlen <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 627:20] + io.lsu_axi_awburst <= UInt<2>("h01") @[el2_lsu_bus_buffer.scala 628:22] + io.lsu_axi_awqos <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 629:20] + io.lsu_axi_awlock <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 630:21] + node _T_4904 = and(obuf_valid, obuf_write) @[el2_lsu_bus_buffer.scala 632:35] + node _T_4905 = eq(obuf_data_done, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 632:50] + node _T_4906 = and(_T_4904, _T_4905) @[el2_lsu_bus_buffer.scala 632:48] + node _T_4907 = eq(bus_addr_match_pending, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 632:68] + node _T_4908 = and(_T_4906, _T_4907) @[el2_lsu_bus_buffer.scala 632:66] + io.lsu_axi_wvalid <= _T_4908 @[el2_lsu_bus_buffer.scala 632:21] + node _T_4909 = bits(obuf_write, 0, 0) @[Bitwise.scala 72:15] + node _T_4910 = mux(_T_4909, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_4911 = and(obuf_byteen, _T_4910) @[el2_lsu_bus_buffer.scala 633:35] + io.lsu_axi_wstrb <= _T_4911 @[el2_lsu_bus_buffer.scala 633:20] + io.lsu_axi_wdata <= obuf_data @[el2_lsu_bus_buffer.scala 634:20] + io.lsu_axi_wlast <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 635:20] + node _T_4912 = eq(obuf_write, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 637:38] + node _T_4913 = and(obuf_valid, _T_4912) @[el2_lsu_bus_buffer.scala 637:36] + node _T_4914 = eq(obuf_nosend, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 637:52] + node _T_4915 = and(_T_4913, _T_4914) @[el2_lsu_bus_buffer.scala 637:50] + node _T_4916 = eq(bus_addr_match_pending, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 637:67] + node _T_4917 = and(_T_4915, _T_4916) @[el2_lsu_bus_buffer.scala 637:65] + io.lsu_axi_arvalid <= _T_4917 @[el2_lsu_bus_buffer.scala 637:22] + io.lsu_axi_arid <= obuf_tag0 @[el2_lsu_bus_buffer.scala 638:19] + node _T_4918 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 639:69] + node _T_4919 = cat(_T_4918, UInt<3>("h00")) @[Cat.scala 29:58] + node _T_4920 = mux(obuf_sideeffect, obuf_addr, _T_4919) @[el2_lsu_bus_buffer.scala 639:27] + io.lsu_axi_araddr <= _T_4920 @[el2_lsu_bus_buffer.scala 639:21] + node _T_4921 = cat(UInt<1>("h00"), obuf_sz) @[Cat.scala 29:58] + node _T_4922 = mux(obuf_sideeffect, _T_4921, UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 640:27] + io.lsu_axi_arsize <= _T_4922 @[el2_lsu_bus_buffer.scala 640:21] + io.lsu_axi_arprot <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 641:21] + node _T_4923 = mux(obuf_sideeffect, UInt<4>("h00"), UInt<4>("h0f")) @[el2_lsu_bus_buffer.scala 642:28] + io.lsu_axi_arcache <= _T_4923 @[el2_lsu_bus_buffer.scala 642:22] + node _T_4924 = bits(obuf_addr, 31, 28) @[el2_lsu_bus_buffer.scala 643:35] + io.lsu_axi_arregion <= _T_4924 @[el2_lsu_bus_buffer.scala 643:23] + io.lsu_axi_arlen <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 644:20] + io.lsu_axi_arburst <= UInt<2>("h01") @[el2_lsu_bus_buffer.scala 645:22] + io.lsu_axi_arqos <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 646:20] + io.lsu_axi_arlock <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 647:21] + io.lsu_axi_bready <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 648:21] + io.lsu_axi_rready <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 649:21] + node _T_4925 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 650:81] + node _T_4926 = bits(buf_error, 0, 0) @[el2_lsu_bus_buffer.scala 650:125] + node _T_4927 = and(io.lsu_bus_clk_en_q, _T_4926) @[el2_lsu_bus_buffer.scala 650:114] + node _T_4928 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 650:140] + node _T_4929 = and(_T_4927, _T_4928) @[el2_lsu_bus_buffer.scala 650:129] + node _T_4930 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 650:81] + node _T_4931 = bits(buf_error, 1, 1) @[el2_lsu_bus_buffer.scala 650:125] + node _T_4932 = and(io.lsu_bus_clk_en_q, _T_4931) @[el2_lsu_bus_buffer.scala 650:114] + node _T_4933 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 650:140] + node _T_4934 = and(_T_4932, _T_4933) @[el2_lsu_bus_buffer.scala 650:129] + node _T_4935 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 650:81] + node _T_4936 = bits(buf_error, 2, 2) @[el2_lsu_bus_buffer.scala 650:125] + node _T_4937 = and(io.lsu_bus_clk_en_q, _T_4936) @[el2_lsu_bus_buffer.scala 650:114] + node _T_4938 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 650:140] + node _T_4939 = and(_T_4937, _T_4938) @[el2_lsu_bus_buffer.scala 650:129] + node _T_4940 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 650:81] + node _T_4941 = bits(buf_error, 3, 3) @[el2_lsu_bus_buffer.scala 650:125] + node _T_4942 = and(io.lsu_bus_clk_en_q, _T_4941) @[el2_lsu_bus_buffer.scala 650:114] + node _T_4943 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 650:140] + node _T_4944 = and(_T_4942, _T_4943) @[el2_lsu_bus_buffer.scala 650:129] + node _T_4945 = mux(_T_4925, _T_4929, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4946 = mux(_T_4930, _T_4934, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4947 = mux(_T_4935, _T_4939, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4948 = mux(_T_4940, _T_4944, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4949 = or(_T_4945, _T_4946) @[Mux.scala 27:72] + node _T_4950 = or(_T_4949, _T_4947) @[Mux.scala 27:72] + node _T_4951 = or(_T_4950, _T_4948) @[Mux.scala 27:72] + wire _T_4952 : UInt<1> @[Mux.scala 27:72] + _T_4952 <= _T_4951 @[Mux.scala 27:72] + io.lsu_imprecise_error_store_any <= _T_4952 @[el2_lsu_bus_buffer.scala 650:36] + node _T_4953 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 651:87] + node _T_4954 = bits(buf_error, 0, 0) @[el2_lsu_bus_buffer.scala 651:109] + node _T_4955 = and(_T_4953, _T_4954) @[el2_lsu_bus_buffer.scala 651:98] + node _T_4956 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 651:124] + node _T_4957 = and(_T_4955, _T_4956) @[el2_lsu_bus_buffer.scala 651:113] + node _T_4958 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 651:87] + node _T_4959 = bits(buf_error, 1, 1) @[el2_lsu_bus_buffer.scala 651:109] + node _T_4960 = and(_T_4958, _T_4959) @[el2_lsu_bus_buffer.scala 651:98] + node _T_4961 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 651:124] + node _T_4962 = and(_T_4960, _T_4961) @[el2_lsu_bus_buffer.scala 651:113] + node _T_4963 = mux(_T_4957, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4964 = mux(_T_4962, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4965 = or(_T_4963, _T_4964) @[Mux.scala 27:72] + wire lsu_imprecise_error_store_tag : UInt<1> @[Mux.scala 27:72] + lsu_imprecise_error_store_tag <= _T_4965 @[Mux.scala 27:72] + node _T_4966 = eq(io.lsu_imprecise_error_store_any, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 653:72] + node _T_4967 = and(io.lsu_nonblock_load_data_error, _T_4966) @[el2_lsu_bus_buffer.scala 653:70] + io.lsu_imprecise_error_load_any <= _T_4967 @[el2_lsu_bus_buffer.scala 653:35] + node _T_4968 = eq(lsu_imprecise_error_store_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_4969 = eq(lsu_imprecise_error_store_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_4970 = mux(_T_4968, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4971 = mux(_T_4969, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4972 = or(_T_4970, _T_4971) @[Mux.scala 27:72] + wire _T_4973 : UInt<32> @[Mux.scala 27:72] + _T_4973 <= _T_4972 @[Mux.scala 27:72] + node _T_4974 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_4975 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_4976 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_4977 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_4978 = mux(_T_4974, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4979 = mux(_T_4975, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4980 = mux(_T_4976, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4981 = mux(_T_4977, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4982 = or(_T_4978, _T_4979) @[Mux.scala 27:72] + node _T_4983 = or(_T_4982, _T_4980) @[Mux.scala 27:72] + node _T_4984 = or(_T_4983, _T_4981) @[Mux.scala 27:72] + wire _T_4985 : UInt<32> @[Mux.scala 27:72] + _T_4985 <= _T_4984 @[Mux.scala 27:72] + node _T_4986 = mux(io.lsu_imprecise_error_store_any, _T_4973, _T_4985) @[el2_lsu_bus_buffer.scala 654:41] + io.lsu_imprecise_error_addr_any <= _T_4986 @[el2_lsu_bus_buffer.scala 654:35] + lsu_bus_cntr_overflow <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 655:25] + io.lsu_bus_idle_any <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 657:23] + node _T_4987 = and(io.lsu_axi_awvalid, io.lsu_axi_awready) @[el2_lsu_bus_buffer.scala 660:46] + node _T_4988 = and(io.lsu_axi_wvalid, io.lsu_axi_wready) @[el2_lsu_bus_buffer.scala 660:89] + node _T_4989 = or(_T_4987, _T_4988) @[el2_lsu_bus_buffer.scala 660:68] + node _T_4990 = and(io.lsu_axi_arvalid, io.lsu_axi_arready) @[el2_lsu_bus_buffer.scala 660:132] + node _T_4991 = or(_T_4989, _T_4990) @[el2_lsu_bus_buffer.scala 660:110] + io.lsu_pmu_bus_trxn <= _T_4991 @[el2_lsu_bus_buffer.scala 660:23] + node _T_4992 = and(io.lsu_busreq_r, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 661:48] + node _T_4993 = and(_T_4992, io.lsu_commit_r) @[el2_lsu_bus_buffer.scala 661:65] + io.lsu_pmu_bus_misaligned <= _T_4993 @[el2_lsu_bus_buffer.scala 661:29] + node _T_4994 = or(io.lsu_imprecise_error_load_any, io.lsu_imprecise_error_store_any) @[el2_lsu_bus_buffer.scala 662:59] + io.lsu_pmu_bus_error <= _T_4994 @[el2_lsu_bus_buffer.scala 662:24] + node _T_4995 = eq(io.lsu_axi_awready, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 664:48] + node _T_4996 = and(io.lsu_axi_awvalid, _T_4995) @[el2_lsu_bus_buffer.scala 664:46] + node _T_4997 = eq(io.lsu_axi_wready, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 664:92] + node _T_4998 = and(io.lsu_axi_wvalid, _T_4997) @[el2_lsu_bus_buffer.scala 664:90] + node _T_4999 = or(_T_4996, _T_4998) @[el2_lsu_bus_buffer.scala 664:69] + node _T_5000 = eq(io.lsu_axi_arready, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 664:136] + node _T_5001 = and(io.lsu_axi_arvalid, _T_5000) @[el2_lsu_bus_buffer.scala 664:134] + node _T_5002 = or(_T_4999, _T_5001) @[el2_lsu_bus_buffer.scala 664:112] + io.lsu_pmu_bus_busy <= _T_5002 @[el2_lsu_bus_buffer.scala 664:23] + reg _T_5003 : UInt, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 666:49] + _T_5003 <= WrPtr0_m @[el2_lsu_bus_buffer.scala 666:49] + WrPtr0_r <= _T_5003 @[el2_lsu_bus_buffer.scala 666:12] + reg _T_5004 : UInt, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 667:49] + _T_5004 <= WrPtr1_m @[el2_lsu_bus_buffer.scala 667:49] + WrPtr1_r <= _T_5004 @[el2_lsu_bus_buffer.scala 667:12] + node _T_5005 = eq(io.flush_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 668:75] + node _T_5006 = and(io.lsu_busreq_m, _T_5005) @[el2_lsu_bus_buffer.scala 668:73] + node _T_5007 = eq(io.ld_full_hit_m, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 668:89] + node _T_5008 = and(_T_5006, _T_5007) @[el2_lsu_bus_buffer.scala 668:87] + reg _T_5009 : UInt<1>, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 668:56] + _T_5009 <= _T_5008 @[el2_lsu_bus_buffer.scala 668:56] + io.lsu_busreq_r <= _T_5009 @[el2_lsu_bus_buffer.scala 668:19] + reg _T_5010 : UInt<1>, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 669:66] + _T_5010 <= io.lsu_nonblock_load_valid_m @[el2_lsu_bus_buffer.scala 669:66] + lsu_nonblock_load_valid_r <= _T_5010 @[el2_lsu_bus_buffer.scala 669:29] + + module el2_lsu_bus_intf : + input clock : Clock + input reset : AsyncReset + output io : {flip scan_mode : UInt<1>, flip dec_tlu_external_ldfwd_disable : UInt<1>, flip dec_tlu_wb_coalescing_disable : UInt<1>, flip dec_tlu_sideeffect_posted_disable : UInt<1>, flip lsu_c1_m_clk : Clock, flip lsu_c1_r_clk : Clock, flip lsu_c2_r_clk : Clock, flip lsu_bus_ibuf_c1_clk : Clock, flip lsu_bus_obuf_c1_clk : Clock, flip lsu_bus_buf_c1_clk : Clock, flip lsu_free_c2_clk : Clock, flip free_clk : Clock, flip lsu_busm_clk : Clock, flip dec_lsu_valid_raw_d : UInt<1>, flip lsu_busreq_m : UInt<1>, flip lsu_pkt_m : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip lsu_pkt_r : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip lsu_addr_d : UInt<32>, flip lsu_addr_m : UInt<32>, flip lsu_addr_r : UInt<32>, flip end_addr_d : UInt<32>, flip end_addr_m : UInt<32>, flip end_addr_r : UInt<32>, flip store_data_r : UInt<32>, flip dec_tlu_force_halt : UInt<1>, flip lsu_commit_r : UInt<1>, flip is_sideeffects_m : UInt<1>, flip flush_m_up : UInt<1>, flip flush_r : UInt<1>, flip lsu_axi_awready : UInt<1>, flip lsu_axi_wready : UInt<1>, flip lsu_axi_bvalid : UInt<1>, flip lsu_axi_bresp : UInt<2>, flip lsu_axi_bid : UInt<3>, flip lsu_axi_arready : UInt<1>, flip lsu_axi_rvalid : UInt<1>, flip lsu_axi_rid : UInt<3>, flip lsu_axi_rdata : UInt<64>, flip lsu_axi_rresp : UInt<2>, flip lsu_axi_rlast : UInt<1>, flip lsu_bus_clk_en : UInt<1>, lsu_busreq_r : UInt<1>, lsu_bus_buffer_pend_any : UInt<1>, lsu_bus_buffer_full_any : UInt<1>, lsu_bus_buffer_empty_any : UInt<1>, lsu_bus_idle_any : UInt<1>, bus_read_data_m : UInt<32>, lsu_imprecise_error_load_any : UInt<1>, lsu_imprecise_error_store_any : UInt<1>, lsu_imprecise_error_addr_any : UInt<32>, lsu_nonblock_load_valid_m : UInt<1>, lsu_nonblock_load_tag_m : UInt<2>, lsu_nonblock_load_inv_r : UInt<1>, lsu_nonblock_load_inv_tag_r : UInt<2>, lsu_nonblock_load_data_valid : UInt<1>, lsu_nonblock_load_data_error : UInt<1>, lsu_nonblock_load_data_tag : UInt<2>, lsu_nonblock_load_data : UInt<32>, lsu_pmu_bus_trxn : UInt<1>, lsu_pmu_bus_misaligned : UInt<1>, lsu_pmu_bus_error : UInt<1>, lsu_pmu_bus_busy : UInt<1>, lsu_axi_awvalid : UInt<1>, lsu_axi_awid : UInt<3>, lsu_axi_awaddr : UInt<32>, lsu_axi_awregion : UInt<4>, lsu_axi_awlen : UInt<8>, lsu_axi_awsize : UInt<3>, lsu_axi_awburst : UInt<2>, lsu_axi_awlock : UInt<1>, lsu_axi_awcache : UInt<4>, lsu_axi_awprot : UInt<3>, lsu_axi_awqos : UInt<4>, lsu_axi_wvalid : UInt<1>, lsu_axi_wdata : UInt<64>, lsu_axi_wstrb : UInt<8>, lsu_axi_wlast : UInt<1>, lsu_axi_bready : UInt<1>, lsu_axi_arvalid : UInt<1>, lsu_axi_arid : UInt<3>, lsu_axi_araddr : UInt<32>, lsu_axi_arregion : UInt<4>, lsu_axi_arlen : UInt<8>, lsu_axi_arsize : UInt<3>, lsu_axi_arburst : UInt<2>, lsu_axi_arlock : UInt<1>, lsu_axi_arcache : UInt<4>, lsu_axi_arprot : UInt<3>, lsu_axi_arqos : UInt<4>, lsu_axi_rready : UInt<1>} + + wire lsu_bus_clk_en_q : UInt<1> + lsu_bus_clk_en_q <= UInt<1>("h00") + wire ldst_dual_d : UInt<1> + ldst_dual_d <= UInt<1>("h00") + wire ldst_dual_m : UInt<1> + ldst_dual_m <= UInt<1>("h00") + wire ldst_dual_r : UInt<1> + ldst_dual_r <= UInt<1>("h00") + wire ldst_byteen_m : UInt<4> + ldst_byteen_m <= UInt<1>("h00") + wire ldst_byteen_r : UInt<4> + ldst_byteen_r <= UInt<1>("h00") + wire ldst_byteen_ext_m : UInt<8> + ldst_byteen_ext_m <= UInt<1>("h00") + wire ldst_byteen_ext_r : UInt<8> + ldst_byteen_ext_r <= UInt<1>("h00") + wire ldst_byteen_hi_m : UInt<4> + ldst_byteen_hi_m <= UInt<1>("h00") + wire ldst_byteen_hi_r : UInt<4> + ldst_byteen_hi_r <= UInt<1>("h00") + wire ldst_byteen_lo_m : UInt<4> + ldst_byteen_lo_m <= UInt<1>("h00") + wire ldst_byteen_lo_r : UInt<4> + ldst_byteen_lo_r <= UInt<1>("h00") + wire is_sideeffects_r : UInt<1> + is_sideeffects_r <= UInt<1>("h00") + wire store_data_ext_r : UInt<64> + store_data_ext_r <= UInt<1>("h00") + wire store_data_hi_r : UInt<32> + store_data_hi_r <= UInt<1>("h00") + wire store_data_lo_r : UInt<32> + store_data_lo_r <= UInt<1>("h00") + wire addr_match_dw_lo_r_m : UInt<1> + addr_match_dw_lo_r_m <= UInt<1>("h00") + wire addr_match_word_lo_r_m : UInt<1> + addr_match_word_lo_r_m <= UInt<1>("h00") + wire no_word_merge_r : UInt<1> + no_word_merge_r <= UInt<1>("h00") + wire no_dword_merge_r : UInt<1> + no_dword_merge_r <= UInt<1>("h00") + wire ld_addr_rhit_lo_lo : UInt<1> + ld_addr_rhit_lo_lo <= UInt<1>("h00") + wire ld_addr_rhit_hi_lo : UInt<1> + ld_addr_rhit_hi_lo <= UInt<1>("h00") + wire ld_addr_rhit_lo_hi : UInt<1> + ld_addr_rhit_lo_hi <= UInt<1>("h00") + wire ld_addr_rhit_hi_hi : UInt<1> + ld_addr_rhit_hi_hi <= UInt<1>("h00") + wire ld_byte_rhit_lo_lo : UInt<4> + ld_byte_rhit_lo_lo <= UInt<1>("h00") + wire ld_byte_rhit_hi_lo : UInt<4> + ld_byte_rhit_hi_lo <= UInt<1>("h00") + wire ld_byte_rhit_lo_hi : UInt<4> + ld_byte_rhit_lo_hi <= UInt<1>("h00") + wire ld_byte_rhit_hi_hi : UInt<4> + ld_byte_rhit_hi_hi <= UInt<1>("h00") + wire ld_byte_hit_lo : UInt<4> + ld_byte_hit_lo <= UInt<1>("h00") + wire ld_byte_rhit_lo : UInt<4> + ld_byte_rhit_lo <= UInt<1>("h00") + wire ld_byte_hit_hi : UInt<4> + ld_byte_hit_hi <= UInt<1>("h00") + wire ld_byte_rhit_hi : UInt<4> + ld_byte_rhit_hi <= UInt<1>("h00") + wire ld_fwddata_rpipe_lo : UInt<32> + ld_fwddata_rpipe_lo <= UInt<1>("h00") + wire ld_fwddata_rpipe_hi : UInt<32> + ld_fwddata_rpipe_hi <= UInt<1>("h00") + wire ld_byte_hit_buf_lo : UInt<4> + ld_byte_hit_buf_lo <= UInt<1>("h00") + wire ld_byte_hit_buf_hi : UInt<4> + ld_byte_hit_buf_hi <= UInt<1>("h00") + wire ld_fwddata_buf_lo : UInt<32> + ld_fwddata_buf_lo <= UInt<1>("h00") + wire ld_fwddata_buf_hi : UInt<32> + ld_fwddata_buf_hi <= UInt<1>("h00") + wire ld_fwddata_lo : UInt<64> + ld_fwddata_lo <= UInt<1>("h00") + wire ld_fwddata_hi : UInt<64> + ld_fwddata_hi <= UInt<1>("h00") + wire ld_fwddata_m : UInt<64> + ld_fwddata_m <= UInt<1>("h00") + wire ld_full_hit_hi_m : UInt<1> + ld_full_hit_hi_m <= UInt<1>("h01") + wire ld_full_hit_lo_m : UInt<1> + ld_full_hit_lo_m <= UInt<1>("h01") + wire ld_full_hit_m : UInt<1> + ld_full_hit_m <= UInt<1>("h00") + inst bus_buffer of el2_lsu_bus_buffer @[el2_lsu_bus_intf.scala 148:39] + bus_buffer.clock <= clock + bus_buffer.reset <= reset + bus_buffer.io.scan_mode <= io.scan_mode @[el2_lsu_bus_intf.scala 149:51] + bus_buffer.io.dec_tlu_external_ldfwd_disable <= io.dec_tlu_external_ldfwd_disable @[el2_lsu_bus_intf.scala 150:51] + bus_buffer.io.dec_tlu_wb_coalescing_disable <= io.dec_tlu_wb_coalescing_disable @[el2_lsu_bus_intf.scala 151:51] + bus_buffer.io.dec_tlu_sideeffect_posted_disable <= io.dec_tlu_sideeffect_posted_disable @[el2_lsu_bus_intf.scala 152:51] + bus_buffer.io.dec_tlu_force_halt <= io.dec_tlu_force_halt @[el2_lsu_bus_intf.scala 153:51] + bus_buffer.io.lsu_c2_r_clk <= io.lsu_c2_r_clk @[el2_lsu_bus_intf.scala 154:51] + bus_buffer.io.lsu_bus_ibuf_c1_clk <= io.lsu_bus_ibuf_c1_clk @[el2_lsu_bus_intf.scala 155:51] + bus_buffer.io.lsu_bus_obuf_c1_clk <= io.lsu_bus_obuf_c1_clk @[el2_lsu_bus_intf.scala 156:51] + bus_buffer.io.lsu_bus_buf_c1_clk <= io.lsu_bus_buf_c1_clk @[el2_lsu_bus_intf.scala 157:51] + bus_buffer.io.lsu_free_c2_clk <= io.lsu_free_c2_clk @[el2_lsu_bus_intf.scala 158:51] + bus_buffer.io.lsu_busm_clk <= io.lsu_busm_clk @[el2_lsu_bus_intf.scala 159:51] + bus_buffer.io.dec_lsu_valid_raw_d <= io.dec_lsu_valid_raw_d @[el2_lsu_bus_intf.scala 160:51] + bus_buffer.io.lsu_pkt_m.valid <= io.lsu_pkt_m.valid @[el2_lsu_bus_intf.scala 161:51] + bus_buffer.io.lsu_pkt_m.store_data_bypass_m <= io.lsu_pkt_m.store_data_bypass_m @[el2_lsu_bus_intf.scala 161:51] + bus_buffer.io.lsu_pkt_m.load_ldst_bypass_d <= io.lsu_pkt_m.load_ldst_bypass_d @[el2_lsu_bus_intf.scala 161:51] + bus_buffer.io.lsu_pkt_m.store_data_bypass_d <= io.lsu_pkt_m.store_data_bypass_d @[el2_lsu_bus_intf.scala 161:51] + bus_buffer.io.lsu_pkt_m.dma <= io.lsu_pkt_m.dma @[el2_lsu_bus_intf.scala 161:51] + bus_buffer.io.lsu_pkt_m.unsign <= io.lsu_pkt_m.unsign @[el2_lsu_bus_intf.scala 161:51] + bus_buffer.io.lsu_pkt_m.store <= io.lsu_pkt_m.store @[el2_lsu_bus_intf.scala 161:51] + bus_buffer.io.lsu_pkt_m.load <= io.lsu_pkt_m.load @[el2_lsu_bus_intf.scala 161:51] + bus_buffer.io.lsu_pkt_m.dword <= io.lsu_pkt_m.dword @[el2_lsu_bus_intf.scala 161:51] + bus_buffer.io.lsu_pkt_m.word <= io.lsu_pkt_m.word @[el2_lsu_bus_intf.scala 161:51] + bus_buffer.io.lsu_pkt_m.half <= io.lsu_pkt_m.half @[el2_lsu_bus_intf.scala 161:51] + bus_buffer.io.lsu_pkt_m.by <= io.lsu_pkt_m.by @[el2_lsu_bus_intf.scala 161:51] + bus_buffer.io.lsu_pkt_m.fast_int <= io.lsu_pkt_m.fast_int @[el2_lsu_bus_intf.scala 161:51] + bus_buffer.io.lsu_pkt_r.valid <= io.lsu_pkt_r.valid @[el2_lsu_bus_intf.scala 162:51] + bus_buffer.io.lsu_pkt_r.store_data_bypass_m <= io.lsu_pkt_r.store_data_bypass_m @[el2_lsu_bus_intf.scala 162:51] + bus_buffer.io.lsu_pkt_r.load_ldst_bypass_d <= io.lsu_pkt_r.load_ldst_bypass_d @[el2_lsu_bus_intf.scala 162:51] + bus_buffer.io.lsu_pkt_r.store_data_bypass_d <= io.lsu_pkt_r.store_data_bypass_d @[el2_lsu_bus_intf.scala 162:51] + bus_buffer.io.lsu_pkt_r.dma <= io.lsu_pkt_r.dma @[el2_lsu_bus_intf.scala 162:51] + bus_buffer.io.lsu_pkt_r.unsign <= io.lsu_pkt_r.unsign @[el2_lsu_bus_intf.scala 162:51] + bus_buffer.io.lsu_pkt_r.store <= io.lsu_pkt_r.store @[el2_lsu_bus_intf.scala 162:51] + bus_buffer.io.lsu_pkt_r.load <= io.lsu_pkt_r.load @[el2_lsu_bus_intf.scala 162:51] + bus_buffer.io.lsu_pkt_r.dword <= io.lsu_pkt_r.dword @[el2_lsu_bus_intf.scala 162:51] + bus_buffer.io.lsu_pkt_r.word <= io.lsu_pkt_r.word @[el2_lsu_bus_intf.scala 162:51] + bus_buffer.io.lsu_pkt_r.half <= io.lsu_pkt_r.half @[el2_lsu_bus_intf.scala 162:51] + bus_buffer.io.lsu_pkt_r.by <= io.lsu_pkt_r.by @[el2_lsu_bus_intf.scala 162:51] + bus_buffer.io.lsu_pkt_r.fast_int <= io.lsu_pkt_r.fast_int @[el2_lsu_bus_intf.scala 162:51] + bus_buffer.io.lsu_addr_m <= io.lsu_addr_m @[el2_lsu_bus_intf.scala 163:51] + bus_buffer.io.end_addr_m <= io.end_addr_m @[el2_lsu_bus_intf.scala 164:51] + bus_buffer.io.lsu_addr_r <= io.lsu_addr_r @[el2_lsu_bus_intf.scala 165:51] + bus_buffer.io.end_addr_r <= io.end_addr_r @[el2_lsu_bus_intf.scala 166:51] + bus_buffer.io.store_data_r <= io.store_data_r @[el2_lsu_bus_intf.scala 167:51] + bus_buffer.io.no_word_merge_r <= no_word_merge_r @[el2_lsu_bus_intf.scala 168:51] + bus_buffer.io.no_dword_merge_r <= no_dword_merge_r @[el2_lsu_bus_intf.scala 169:51] + bus_buffer.io.lsu_busreq_m <= io.lsu_busreq_m @[el2_lsu_bus_intf.scala 170:51] + bus_buffer.io.ld_full_hit_m <= ld_full_hit_m @[el2_lsu_bus_intf.scala 171:51] + bus_buffer.io.flush_m_up <= io.flush_m_up @[el2_lsu_bus_intf.scala 172:51] + bus_buffer.io.flush_r <= io.flush_r @[el2_lsu_bus_intf.scala 173:51] + bus_buffer.io.lsu_commit_r <= io.lsu_commit_r @[el2_lsu_bus_intf.scala 174:51] + bus_buffer.io.is_sideeffects_r <= is_sideeffects_r @[el2_lsu_bus_intf.scala 175:51] + bus_buffer.io.ldst_dual_d <= ldst_dual_d @[el2_lsu_bus_intf.scala 176:51] + bus_buffer.io.ldst_dual_m <= ldst_dual_m @[el2_lsu_bus_intf.scala 177:51] + bus_buffer.io.ldst_dual_r <= ldst_dual_r @[el2_lsu_bus_intf.scala 178:51] + bus_buffer.io.ldst_byteen_ext_m <= ldst_byteen_ext_m @[el2_lsu_bus_intf.scala 179:51] + bus_buffer.io.lsu_axi_awready <= io.lsu_axi_awready @[el2_lsu_bus_intf.scala 180:51] + bus_buffer.io.lsu_axi_wready <= io.lsu_axi_wready @[el2_lsu_bus_intf.scala 181:51] + bus_buffer.io.lsu_axi_bvalid <= io.lsu_axi_bvalid @[el2_lsu_bus_intf.scala 182:51] + bus_buffer.io.lsu_axi_bresp <= io.lsu_axi_bresp @[el2_lsu_bus_intf.scala 183:51] + bus_buffer.io.lsu_axi_bid <= io.lsu_axi_bid @[el2_lsu_bus_intf.scala 184:51] + bus_buffer.io.lsu_axi_arready <= io.lsu_axi_arready @[el2_lsu_bus_intf.scala 185:51] + bus_buffer.io.lsu_axi_rvalid <= io.lsu_axi_rvalid @[el2_lsu_bus_intf.scala 186:51] + bus_buffer.io.lsu_axi_rid <= io.lsu_axi_rid @[el2_lsu_bus_intf.scala 187:51] + bus_buffer.io.lsu_axi_rdata <= io.lsu_axi_rdata @[el2_lsu_bus_intf.scala 188:51] + bus_buffer.io.lsu_axi_rresp <= io.lsu_axi_rresp @[el2_lsu_bus_intf.scala 189:51] + bus_buffer.io.lsu_bus_clk_en <= io.lsu_bus_clk_en @[el2_lsu_bus_intf.scala 190:51] + bus_buffer.io.lsu_bus_clk_en_q <= lsu_bus_clk_en_q @[el2_lsu_bus_intf.scala 191:51] + io.lsu_busreq_r <= bus_buffer.io.lsu_busreq_r @[el2_lsu_bus_intf.scala 193:38] + io.lsu_bus_buffer_pend_any <= bus_buffer.io.lsu_bus_buffer_pend_any @[el2_lsu_bus_intf.scala 194:38] + io.lsu_bus_buffer_full_any <= bus_buffer.io.lsu_bus_buffer_full_any @[el2_lsu_bus_intf.scala 195:38] + io.lsu_bus_buffer_empty_any <= bus_buffer.io.lsu_bus_buffer_empty_any @[el2_lsu_bus_intf.scala 196:38] + io.lsu_bus_idle_any <= bus_buffer.io.lsu_bus_idle_any @[el2_lsu_bus_intf.scala 197:38] + ld_byte_hit_buf_lo <= bus_buffer.io.ld_byte_hit_buf_lo @[el2_lsu_bus_intf.scala 198:38] + ld_byte_hit_buf_hi <= bus_buffer.io.ld_byte_hit_buf_hi @[el2_lsu_bus_intf.scala 199:38] + ld_fwddata_buf_lo <= bus_buffer.io.ld_fwddata_buf_lo @[el2_lsu_bus_intf.scala 200:38] + ld_fwddata_buf_hi <= bus_buffer.io.ld_fwddata_buf_hi @[el2_lsu_bus_intf.scala 201:38] + io.lsu_imprecise_error_load_any <= bus_buffer.io.lsu_imprecise_error_load_any @[el2_lsu_bus_intf.scala 202:38] + io.lsu_imprecise_error_store_any <= bus_buffer.io.lsu_imprecise_error_store_any @[el2_lsu_bus_intf.scala 203:38] + io.lsu_imprecise_error_addr_any <= bus_buffer.io.lsu_imprecise_error_addr_any @[el2_lsu_bus_intf.scala 204:38] + io.lsu_nonblock_load_valid_m <= bus_buffer.io.lsu_nonblock_load_valid_m @[el2_lsu_bus_intf.scala 205:38] + io.lsu_nonblock_load_tag_m <= bus_buffer.io.lsu_nonblock_load_tag_m @[el2_lsu_bus_intf.scala 206:38] + io.lsu_nonblock_load_inv_r <= bus_buffer.io.lsu_nonblock_load_inv_r @[el2_lsu_bus_intf.scala 207:38] + io.lsu_nonblock_load_inv_tag_r <= bus_buffer.io.lsu_nonblock_load_inv_tag_r @[el2_lsu_bus_intf.scala 208:38] + io.lsu_nonblock_load_data_valid <= bus_buffer.io.lsu_nonblock_load_data_valid @[el2_lsu_bus_intf.scala 209:38] + io.lsu_nonblock_load_data_error <= bus_buffer.io.lsu_nonblock_load_data_error @[el2_lsu_bus_intf.scala 210:38] + io.lsu_nonblock_load_data_tag <= bus_buffer.io.lsu_nonblock_load_data_tag @[el2_lsu_bus_intf.scala 211:38] + io.lsu_nonblock_load_data <= bus_buffer.io.lsu_nonblock_load_data @[el2_lsu_bus_intf.scala 212:38] + io.lsu_pmu_bus_trxn <= bus_buffer.io.lsu_pmu_bus_trxn @[el2_lsu_bus_intf.scala 213:38] + io.lsu_pmu_bus_misaligned <= bus_buffer.io.lsu_pmu_bus_misaligned @[el2_lsu_bus_intf.scala 214:38] + io.lsu_pmu_bus_error <= bus_buffer.io.lsu_pmu_bus_error @[el2_lsu_bus_intf.scala 215:38] + io.lsu_pmu_bus_busy <= bus_buffer.io.lsu_pmu_bus_busy @[el2_lsu_bus_intf.scala 216:38] + io.lsu_axi_awvalid <= bus_buffer.io.lsu_axi_awvalid @[el2_lsu_bus_intf.scala 217:38] + io.lsu_axi_awid <= bus_buffer.io.lsu_axi_awid @[el2_lsu_bus_intf.scala 218:38] + io.lsu_axi_awaddr <= bus_buffer.io.lsu_axi_awaddr @[el2_lsu_bus_intf.scala 219:38] + io.lsu_axi_awregion <= bus_buffer.io.lsu_axi_awregion @[el2_lsu_bus_intf.scala 220:38] + io.lsu_axi_awlen <= bus_buffer.io.lsu_axi_awlen @[el2_lsu_bus_intf.scala 221:38] + io.lsu_axi_awsize <= bus_buffer.io.lsu_axi_awsize @[el2_lsu_bus_intf.scala 222:38] + io.lsu_axi_awburst <= bus_buffer.io.lsu_axi_awburst @[el2_lsu_bus_intf.scala 223:38] + io.lsu_axi_awlock <= bus_buffer.io.lsu_axi_awlock @[el2_lsu_bus_intf.scala 224:38] + io.lsu_axi_awcache <= bus_buffer.io.lsu_axi_awcache @[el2_lsu_bus_intf.scala 225:38] + io.lsu_axi_awprot <= bus_buffer.io.lsu_axi_awprot @[el2_lsu_bus_intf.scala 226:38] + io.lsu_axi_awqos <= bus_buffer.io.lsu_axi_awqos @[el2_lsu_bus_intf.scala 227:38] + io.lsu_axi_wvalid <= bus_buffer.io.lsu_axi_wvalid @[el2_lsu_bus_intf.scala 228:38] + io.lsu_axi_wdata <= bus_buffer.io.lsu_axi_wdata @[el2_lsu_bus_intf.scala 229:38] + io.lsu_axi_wstrb <= bus_buffer.io.lsu_axi_wstrb @[el2_lsu_bus_intf.scala 230:38] + io.lsu_axi_wlast <= bus_buffer.io.lsu_axi_wlast @[el2_lsu_bus_intf.scala 231:38] + io.lsu_axi_bready <= bus_buffer.io.lsu_axi_bready @[el2_lsu_bus_intf.scala 232:38] + io.lsu_axi_arvalid <= bus_buffer.io.lsu_axi_arvalid @[el2_lsu_bus_intf.scala 233:38] + io.lsu_axi_arid <= bus_buffer.io.lsu_axi_arid @[el2_lsu_bus_intf.scala 234:38] + io.lsu_axi_araddr <= bus_buffer.io.lsu_axi_araddr @[el2_lsu_bus_intf.scala 235:38] + io.lsu_axi_arregion <= bus_buffer.io.lsu_axi_arregion @[el2_lsu_bus_intf.scala 236:38] + io.lsu_axi_arlen <= bus_buffer.io.lsu_axi_arlen @[el2_lsu_bus_intf.scala 237:38] + io.lsu_axi_arsize <= bus_buffer.io.lsu_axi_arsize @[el2_lsu_bus_intf.scala 238:38] + io.lsu_axi_arburst <= bus_buffer.io.lsu_axi_arburst @[el2_lsu_bus_intf.scala 239:38] + io.lsu_axi_arlock <= bus_buffer.io.lsu_axi_arlock @[el2_lsu_bus_intf.scala 240:38] + io.lsu_axi_arcache <= bus_buffer.io.lsu_axi_arcache @[el2_lsu_bus_intf.scala 241:38] + io.lsu_axi_arprot <= bus_buffer.io.lsu_axi_arprot @[el2_lsu_bus_intf.scala 242:38] + io.lsu_axi_arqos <= bus_buffer.io.lsu_axi_arqos @[el2_lsu_bus_intf.scala 243:38] + io.lsu_axi_rready <= bus_buffer.io.lsu_axi_rready @[el2_lsu_bus_intf.scala 244:38] + node _T = bits(io.lsu_pkt_r.word, 0, 0) @[el2_lsu_bus_intf.scala 246:58] + node _T_1 = bits(io.lsu_pkt_r.half, 0, 0) @[el2_lsu_bus_intf.scala 246:97] + node _T_2 = bits(io.lsu_pkt_r.by, 0, 0) @[el2_lsu_bus_intf.scala 246:133] + node _T_3 = mux(_T, UInt<4>("h0f"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4 = mux(_T_1, UInt<4>("h03"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_5 = mux(_T_2, UInt<4>("h01"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_6 = or(_T_3, _T_4) @[Mux.scala 27:72] + node _T_7 = or(_T_6, _T_5) @[Mux.scala 27:72] + wire _T_8 : UInt<4> @[Mux.scala 27:72] + _T_8 <= _T_7 @[Mux.scala 27:72] + ldst_byteen_m <= _T_8 @[el2_lsu_bus_intf.scala 246:27] + node _T_9 = bits(io.lsu_addr_d, 2, 2) @[el2_lsu_bus_intf.scala 247:43] + node _T_10 = bits(io.end_addr_d, 2, 2) @[el2_lsu_bus_intf.scala 247:64] + node _T_11 = neq(_T_9, _T_10) @[el2_lsu_bus_intf.scala 247:47] + ldst_dual_d <= _T_11 @[el2_lsu_bus_intf.scala 247:27] + node _T_12 = bits(io.lsu_addr_r, 31, 3) @[el2_lsu_bus_intf.scala 248:44] + node _T_13 = bits(io.lsu_addr_m, 31, 3) @[el2_lsu_bus_intf.scala 248:68] + node _T_14 = eq(_T_12, _T_13) @[el2_lsu_bus_intf.scala 248:51] + addr_match_dw_lo_r_m <= _T_14 @[el2_lsu_bus_intf.scala 248:27] + node _T_15 = bits(io.lsu_addr_r, 2, 2) @[el2_lsu_bus_intf.scala 249:68] + node _T_16 = bits(io.lsu_addr_m, 2, 2) @[el2_lsu_bus_intf.scala 249:85] + node _T_17 = xor(_T_15, _T_16) @[el2_lsu_bus_intf.scala 249:71] + node _T_18 = eq(_T_17, UInt<1>("h00")) @[el2_lsu_bus_intf.scala 249:53] + node _T_19 = and(addr_match_dw_lo_r_m, _T_18) @[el2_lsu_bus_intf.scala 249:51] + addr_match_word_lo_r_m <= _T_19 @[el2_lsu_bus_intf.scala 249:27] + node _T_20 = eq(ldst_dual_r, UInt<1>("h00")) @[el2_lsu_bus_intf.scala 250:48] + node _T_21 = and(io.lsu_busreq_r, _T_20) @[el2_lsu_bus_intf.scala 250:46] + node _T_22 = and(_T_21, io.lsu_busreq_m) @[el2_lsu_bus_intf.scala 250:61] + node _T_23 = eq(addr_match_word_lo_r_m, UInt<1>("h00")) @[el2_lsu_bus_intf.scala 250:102] + node _T_24 = or(io.lsu_pkt_m.load, _T_23) @[el2_lsu_bus_intf.scala 250:100] + node _T_25 = and(_T_22, _T_24) @[el2_lsu_bus_intf.scala 250:79] + no_word_merge_r <= _T_25 @[el2_lsu_bus_intf.scala 250:27] + node _T_26 = eq(ldst_dual_r, UInt<1>("h00")) @[el2_lsu_bus_intf.scala 251:48] + node _T_27 = and(io.lsu_busreq_r, _T_26) @[el2_lsu_bus_intf.scala 251:46] + node _T_28 = and(_T_27, io.lsu_busreq_m) @[el2_lsu_bus_intf.scala 251:61] + node _T_29 = eq(addr_match_dw_lo_r_m, UInt<1>("h00")) @[el2_lsu_bus_intf.scala 251:102] + node _T_30 = or(io.lsu_pkt_m.load, _T_29) @[el2_lsu_bus_intf.scala 251:100] + node _T_31 = and(_T_28, _T_30) @[el2_lsu_bus_intf.scala 251:79] + no_dword_merge_r <= _T_31 @[el2_lsu_bus_intf.scala 251:27] + node _T_32 = bits(ldst_byteen_m, 3, 0) @[el2_lsu_bus_intf.scala 252:56] + node _T_33 = cat(UInt<4>("h00"), _T_32) @[Cat.scala 29:58] + node _T_34 = bits(io.lsu_addr_m, 1, 0) @[el2_lsu_bus_intf.scala 252:79] + node _T_35 = dshl(_T_33, _T_34) @[el2_lsu_bus_intf.scala 252:63] + ldst_byteen_ext_m <= _T_35 @[el2_lsu_bus_intf.scala 252:27] + node _T_36 = bits(ldst_byteen_r, 3, 0) @[el2_lsu_bus_intf.scala 253:56] + node _T_37 = cat(UInt<4>("h00"), _T_36) @[Cat.scala 29:58] + node _T_38 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_bus_intf.scala 253:79] + node _T_39 = dshl(_T_37, _T_38) @[el2_lsu_bus_intf.scala 253:63] + ldst_byteen_ext_r <= _T_39 @[el2_lsu_bus_intf.scala 253:27] + node _T_40 = bits(io.store_data_r, 31, 0) @[el2_lsu_bus_intf.scala 254:59] + node _T_41 = cat(UInt<32>("h00"), _T_40) @[Cat.scala 29:58] + node _T_42 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_bus_intf.scala 254:87] + node _T_43 = cat(_T_42, UInt<3>("h00")) @[Cat.scala 29:58] + node _T_44 = dshl(_T_41, _T_43) @[el2_lsu_bus_intf.scala 254:67] + store_data_ext_r <= _T_44 @[el2_lsu_bus_intf.scala 254:27] + node _T_45 = bits(ldst_byteen_ext_m, 7, 4) @[el2_lsu_bus_intf.scala 255:47] + ldst_byteen_hi_m <= _T_45 @[el2_lsu_bus_intf.scala 255:27] + node _T_46 = bits(ldst_byteen_ext_m, 3, 0) @[el2_lsu_bus_intf.scala 256:47] + ldst_byteen_lo_m <= _T_46 @[el2_lsu_bus_intf.scala 256:27] + node _T_47 = bits(ldst_byteen_ext_r, 7, 4) @[el2_lsu_bus_intf.scala 257:47] + ldst_byteen_hi_r <= _T_47 @[el2_lsu_bus_intf.scala 257:27] + node _T_48 = bits(ldst_byteen_ext_r, 3, 0) @[el2_lsu_bus_intf.scala 258:47] + ldst_byteen_lo_r <= _T_48 @[el2_lsu_bus_intf.scala 258:27] + node _T_49 = bits(store_data_ext_r, 63, 32) @[el2_lsu_bus_intf.scala 259:46] + store_data_hi_r <= _T_49 @[el2_lsu_bus_intf.scala 259:27] + node _T_50 = bits(store_data_ext_r, 31, 0) @[el2_lsu_bus_intf.scala 260:46] + store_data_lo_r <= _T_50 @[el2_lsu_bus_intf.scala 260:27] + node _T_51 = bits(io.lsu_addr_m, 31, 2) @[el2_lsu_bus_intf.scala 261:44] + node _T_52 = bits(io.lsu_addr_r, 31, 2) @[el2_lsu_bus_intf.scala 261:68] + node _T_53 = eq(_T_51, _T_52) @[el2_lsu_bus_intf.scala 261:51] + node _T_54 = and(_T_53, io.lsu_pkt_r.valid) @[el2_lsu_bus_intf.scala 261:76] + node _T_55 = and(_T_54, io.lsu_pkt_r.store) @[el2_lsu_bus_intf.scala 261:97] + node _T_56 = and(_T_55, io.lsu_busreq_m) @[el2_lsu_bus_intf.scala 261:118] + ld_addr_rhit_lo_lo <= _T_56 @[el2_lsu_bus_intf.scala 261:27] + node _T_57 = bits(io.end_addr_m, 31, 2) @[el2_lsu_bus_intf.scala 262:44] + node _T_58 = bits(io.lsu_addr_r, 31, 2) @[el2_lsu_bus_intf.scala 262:68] + node _T_59 = eq(_T_57, _T_58) @[el2_lsu_bus_intf.scala 262:51] + node _T_60 = and(_T_59, io.lsu_pkt_r.valid) @[el2_lsu_bus_intf.scala 262:76] + node _T_61 = and(_T_60, io.lsu_pkt_r.store) @[el2_lsu_bus_intf.scala 262:97] + node _T_62 = and(_T_61, io.lsu_busreq_m) @[el2_lsu_bus_intf.scala 262:118] + ld_addr_rhit_lo_hi <= _T_62 @[el2_lsu_bus_intf.scala 262:27] + node _T_63 = bits(io.lsu_addr_m, 31, 2) @[el2_lsu_bus_intf.scala 263:44] + node _T_64 = bits(io.end_addr_r, 31, 2) @[el2_lsu_bus_intf.scala 263:68] + node _T_65 = eq(_T_63, _T_64) @[el2_lsu_bus_intf.scala 263:51] + node _T_66 = and(_T_65, io.lsu_pkt_r.valid) @[el2_lsu_bus_intf.scala 263:76] + node _T_67 = and(_T_66, io.lsu_pkt_r.store) @[el2_lsu_bus_intf.scala 263:97] + node _T_68 = and(_T_67, io.lsu_busreq_m) @[el2_lsu_bus_intf.scala 263:118] + ld_addr_rhit_hi_lo <= _T_68 @[el2_lsu_bus_intf.scala 263:27] + node _T_69 = bits(io.end_addr_m, 31, 2) @[el2_lsu_bus_intf.scala 264:44] + node _T_70 = bits(io.end_addr_r, 31, 2) @[el2_lsu_bus_intf.scala 264:68] + node _T_71 = eq(_T_69, _T_70) @[el2_lsu_bus_intf.scala 264:51] + node _T_72 = and(_T_71, io.lsu_pkt_r.valid) @[el2_lsu_bus_intf.scala 264:76] + node _T_73 = and(_T_72, io.lsu_pkt_r.store) @[el2_lsu_bus_intf.scala 264:97] + node _T_74 = and(_T_73, io.lsu_busreq_m) @[el2_lsu_bus_intf.scala 264:118] + ld_addr_rhit_hi_hi <= _T_74 @[el2_lsu_bus_intf.scala 264:27] + node _T_75 = bits(ldst_byteen_lo_r, 0, 0) @[el2_lsu_bus_intf.scala 265:88] + node _T_76 = and(ld_addr_rhit_lo_lo, _T_75) @[el2_lsu_bus_intf.scala 265:70] + node _T_77 = bits(ldst_byteen_lo_m, 0, 0) @[el2_lsu_bus_intf.scala 265:110] + node _T_78 = and(_T_76, _T_77) @[el2_lsu_bus_intf.scala 265:92] + node _T_79 = bits(ldst_byteen_lo_r, 1, 1) @[el2_lsu_bus_intf.scala 265:88] + node _T_80 = and(ld_addr_rhit_lo_lo, _T_79) @[el2_lsu_bus_intf.scala 265:70] + node _T_81 = bits(ldst_byteen_lo_m, 1, 1) @[el2_lsu_bus_intf.scala 265:110] + node _T_82 = and(_T_80, _T_81) @[el2_lsu_bus_intf.scala 265:92] + node _T_83 = bits(ldst_byteen_lo_r, 2, 2) @[el2_lsu_bus_intf.scala 265:88] + node _T_84 = and(ld_addr_rhit_lo_lo, _T_83) @[el2_lsu_bus_intf.scala 265:70] + node _T_85 = bits(ldst_byteen_lo_m, 2, 2) @[el2_lsu_bus_intf.scala 265:110] + node _T_86 = and(_T_84, _T_85) @[el2_lsu_bus_intf.scala 265:92] + node _T_87 = bits(ldst_byteen_lo_r, 3, 3) @[el2_lsu_bus_intf.scala 265:88] + node _T_88 = and(ld_addr_rhit_lo_lo, _T_87) @[el2_lsu_bus_intf.scala 265:70] + node _T_89 = bits(ldst_byteen_lo_m, 3, 3) @[el2_lsu_bus_intf.scala 265:110] + node _T_90 = and(_T_88, _T_89) @[el2_lsu_bus_intf.scala 265:92] + node _T_91 = cat(_T_90, _T_86) @[Cat.scala 29:58] + node _T_92 = cat(_T_91, _T_82) @[Cat.scala 29:58] + node _T_93 = cat(_T_92, _T_78) @[Cat.scala 29:58] + ld_byte_rhit_lo_lo <= _T_93 @[el2_lsu_bus_intf.scala 265:27] + node _T_94 = bits(ldst_byteen_lo_r, 0, 0) @[el2_lsu_bus_intf.scala 266:88] + node _T_95 = and(ld_addr_rhit_lo_hi, _T_94) @[el2_lsu_bus_intf.scala 266:70] + node _T_96 = bits(ldst_byteen_hi_m, 0, 0) @[el2_lsu_bus_intf.scala 266:110] + node _T_97 = and(_T_95, _T_96) @[el2_lsu_bus_intf.scala 266:92] + node _T_98 = bits(ldst_byteen_lo_r, 1, 1) @[el2_lsu_bus_intf.scala 266:88] + node _T_99 = and(ld_addr_rhit_lo_hi, _T_98) @[el2_lsu_bus_intf.scala 266:70] + node _T_100 = bits(ldst_byteen_hi_m, 1, 1) @[el2_lsu_bus_intf.scala 266:110] + node _T_101 = and(_T_99, _T_100) @[el2_lsu_bus_intf.scala 266:92] + node _T_102 = bits(ldst_byteen_lo_r, 2, 2) @[el2_lsu_bus_intf.scala 266:88] + node _T_103 = and(ld_addr_rhit_lo_hi, _T_102) @[el2_lsu_bus_intf.scala 266:70] + node _T_104 = bits(ldst_byteen_hi_m, 2, 2) @[el2_lsu_bus_intf.scala 266:110] + node _T_105 = and(_T_103, _T_104) @[el2_lsu_bus_intf.scala 266:92] + node _T_106 = bits(ldst_byteen_lo_r, 3, 3) @[el2_lsu_bus_intf.scala 266:88] + node _T_107 = and(ld_addr_rhit_lo_hi, _T_106) @[el2_lsu_bus_intf.scala 266:70] + node _T_108 = bits(ldst_byteen_hi_m, 3, 3) @[el2_lsu_bus_intf.scala 266:110] + node _T_109 = and(_T_107, _T_108) @[el2_lsu_bus_intf.scala 266:92] + node _T_110 = cat(_T_109, _T_105) @[Cat.scala 29:58] + node _T_111 = cat(_T_110, _T_101) @[Cat.scala 29:58] + node _T_112 = cat(_T_111, _T_97) @[Cat.scala 29:58] + ld_byte_rhit_lo_hi <= _T_112 @[el2_lsu_bus_intf.scala 266:27] + node _T_113 = bits(ldst_byteen_hi_r, 0, 0) @[el2_lsu_bus_intf.scala 267:88] + node _T_114 = and(ld_addr_rhit_hi_lo, _T_113) @[el2_lsu_bus_intf.scala 267:70] + node _T_115 = bits(ldst_byteen_lo_m, 0, 0) @[el2_lsu_bus_intf.scala 267:110] + node _T_116 = and(_T_114, _T_115) @[el2_lsu_bus_intf.scala 267:92] + node _T_117 = bits(ldst_byteen_hi_r, 1, 1) @[el2_lsu_bus_intf.scala 267:88] + node _T_118 = and(ld_addr_rhit_hi_lo, _T_117) @[el2_lsu_bus_intf.scala 267:70] + node _T_119 = bits(ldst_byteen_lo_m, 1, 1) @[el2_lsu_bus_intf.scala 267:110] + node _T_120 = and(_T_118, _T_119) @[el2_lsu_bus_intf.scala 267:92] + node _T_121 = bits(ldst_byteen_hi_r, 2, 2) @[el2_lsu_bus_intf.scala 267:88] + node _T_122 = and(ld_addr_rhit_hi_lo, _T_121) @[el2_lsu_bus_intf.scala 267:70] + node _T_123 = bits(ldst_byteen_lo_m, 2, 2) @[el2_lsu_bus_intf.scala 267:110] + node _T_124 = and(_T_122, _T_123) @[el2_lsu_bus_intf.scala 267:92] + node _T_125 = bits(ldst_byteen_hi_r, 3, 3) @[el2_lsu_bus_intf.scala 267:88] + node _T_126 = and(ld_addr_rhit_hi_lo, _T_125) @[el2_lsu_bus_intf.scala 267:70] + node _T_127 = bits(ldst_byteen_lo_m, 3, 3) @[el2_lsu_bus_intf.scala 267:110] + node _T_128 = and(_T_126, _T_127) @[el2_lsu_bus_intf.scala 267:92] + node _T_129 = cat(_T_128, _T_124) @[Cat.scala 29:58] + node _T_130 = cat(_T_129, _T_120) @[Cat.scala 29:58] + node _T_131 = cat(_T_130, _T_116) @[Cat.scala 29:58] + ld_byte_rhit_hi_lo <= _T_131 @[el2_lsu_bus_intf.scala 267:27] + node _T_132 = bits(ldst_byteen_hi_r, 0, 0) @[el2_lsu_bus_intf.scala 268:88] + node _T_133 = and(ld_addr_rhit_hi_hi, _T_132) @[el2_lsu_bus_intf.scala 268:70] + node _T_134 = bits(ldst_byteen_hi_m, 0, 0) @[el2_lsu_bus_intf.scala 268:110] + node _T_135 = and(_T_133, _T_134) @[el2_lsu_bus_intf.scala 268:92] + node _T_136 = bits(ldst_byteen_hi_r, 1, 1) @[el2_lsu_bus_intf.scala 268:88] + node _T_137 = and(ld_addr_rhit_hi_hi, _T_136) @[el2_lsu_bus_intf.scala 268:70] + node _T_138 = bits(ldst_byteen_hi_m, 1, 1) @[el2_lsu_bus_intf.scala 268:110] + node _T_139 = and(_T_137, _T_138) @[el2_lsu_bus_intf.scala 268:92] + node _T_140 = bits(ldst_byteen_hi_r, 2, 2) @[el2_lsu_bus_intf.scala 268:88] + node _T_141 = and(ld_addr_rhit_hi_hi, _T_140) @[el2_lsu_bus_intf.scala 268:70] + node _T_142 = bits(ldst_byteen_hi_m, 2, 2) @[el2_lsu_bus_intf.scala 268:110] + node _T_143 = and(_T_141, _T_142) @[el2_lsu_bus_intf.scala 268:92] + node _T_144 = bits(ldst_byteen_hi_r, 3, 3) @[el2_lsu_bus_intf.scala 268:88] + node _T_145 = and(ld_addr_rhit_hi_hi, _T_144) @[el2_lsu_bus_intf.scala 268:70] + node _T_146 = bits(ldst_byteen_hi_m, 3, 3) @[el2_lsu_bus_intf.scala 268:110] + node _T_147 = and(_T_145, _T_146) @[el2_lsu_bus_intf.scala 268:92] + node _T_148 = cat(_T_147, _T_143) @[Cat.scala 29:58] + node _T_149 = cat(_T_148, _T_139) @[Cat.scala 29:58] + node _T_150 = cat(_T_149, _T_135) @[Cat.scala 29:58] + ld_byte_rhit_hi_hi <= _T_150 @[el2_lsu_bus_intf.scala 268:27] + node _T_151 = bits(ld_byte_rhit_lo_lo, 0, 0) @[el2_lsu_bus_intf.scala 269:69] + node _T_152 = bits(ld_byte_rhit_hi_lo, 0, 0) @[el2_lsu_bus_intf.scala 269:93] + node _T_153 = or(_T_151, _T_152) @[el2_lsu_bus_intf.scala 269:73] + node _T_154 = bits(ld_byte_hit_buf_lo, 0, 0) @[el2_lsu_bus_intf.scala 269:117] + node _T_155 = or(_T_153, _T_154) @[el2_lsu_bus_intf.scala 269:97] + node _T_156 = bits(ld_byte_rhit_lo_lo, 1, 1) @[el2_lsu_bus_intf.scala 269:69] + node _T_157 = bits(ld_byte_rhit_hi_lo, 1, 1) @[el2_lsu_bus_intf.scala 269:93] + node _T_158 = or(_T_156, _T_157) @[el2_lsu_bus_intf.scala 269:73] + node _T_159 = bits(ld_byte_hit_buf_lo, 1, 1) @[el2_lsu_bus_intf.scala 269:117] + node _T_160 = or(_T_158, _T_159) @[el2_lsu_bus_intf.scala 269:97] + node _T_161 = bits(ld_byte_rhit_lo_lo, 2, 2) @[el2_lsu_bus_intf.scala 269:69] + node _T_162 = bits(ld_byte_rhit_hi_lo, 2, 2) @[el2_lsu_bus_intf.scala 269:93] + node _T_163 = or(_T_161, _T_162) @[el2_lsu_bus_intf.scala 269:73] + node _T_164 = bits(ld_byte_hit_buf_lo, 2, 2) @[el2_lsu_bus_intf.scala 269:117] + node _T_165 = or(_T_163, _T_164) @[el2_lsu_bus_intf.scala 269:97] + node _T_166 = bits(ld_byte_rhit_lo_lo, 3, 3) @[el2_lsu_bus_intf.scala 269:69] + node _T_167 = bits(ld_byte_rhit_hi_lo, 3, 3) @[el2_lsu_bus_intf.scala 269:93] + node _T_168 = or(_T_166, _T_167) @[el2_lsu_bus_intf.scala 269:73] + node _T_169 = bits(ld_byte_hit_buf_lo, 3, 3) @[el2_lsu_bus_intf.scala 269:117] + node _T_170 = or(_T_168, _T_169) @[el2_lsu_bus_intf.scala 269:97] + node _T_171 = cat(_T_170, _T_165) @[Cat.scala 29:58] + node _T_172 = cat(_T_171, _T_160) @[Cat.scala 29:58] + node _T_173 = cat(_T_172, _T_155) @[Cat.scala 29:58] + ld_byte_hit_lo <= _T_173 @[el2_lsu_bus_intf.scala 269:27] + node _T_174 = bits(ld_byte_rhit_lo_hi, 0, 0) @[el2_lsu_bus_intf.scala 270:69] + node _T_175 = bits(ld_byte_rhit_hi_hi, 0, 0) @[el2_lsu_bus_intf.scala 270:93] + node _T_176 = or(_T_174, _T_175) @[el2_lsu_bus_intf.scala 270:73] + node _T_177 = bits(ld_byte_hit_buf_hi, 0, 0) @[el2_lsu_bus_intf.scala 270:117] + node _T_178 = or(_T_176, _T_177) @[el2_lsu_bus_intf.scala 270:97] + node _T_179 = bits(ld_byte_rhit_lo_hi, 1, 1) @[el2_lsu_bus_intf.scala 270:69] + node _T_180 = bits(ld_byte_rhit_hi_hi, 1, 1) @[el2_lsu_bus_intf.scala 270:93] + node _T_181 = or(_T_179, _T_180) @[el2_lsu_bus_intf.scala 270:73] + node _T_182 = bits(ld_byte_hit_buf_hi, 1, 1) @[el2_lsu_bus_intf.scala 270:117] + node _T_183 = or(_T_181, _T_182) @[el2_lsu_bus_intf.scala 270:97] + node _T_184 = bits(ld_byte_rhit_lo_hi, 2, 2) @[el2_lsu_bus_intf.scala 270:69] + node _T_185 = bits(ld_byte_rhit_hi_hi, 2, 2) @[el2_lsu_bus_intf.scala 270:93] + node _T_186 = or(_T_184, _T_185) @[el2_lsu_bus_intf.scala 270:73] + node _T_187 = bits(ld_byte_hit_buf_hi, 2, 2) @[el2_lsu_bus_intf.scala 270:117] + node _T_188 = or(_T_186, _T_187) @[el2_lsu_bus_intf.scala 270:97] + node _T_189 = bits(ld_byte_rhit_lo_hi, 3, 3) @[el2_lsu_bus_intf.scala 270:69] + node _T_190 = bits(ld_byte_rhit_hi_hi, 3, 3) @[el2_lsu_bus_intf.scala 270:93] + node _T_191 = or(_T_189, _T_190) @[el2_lsu_bus_intf.scala 270:73] + node _T_192 = bits(ld_byte_hit_buf_hi, 3, 3) @[el2_lsu_bus_intf.scala 270:117] + node _T_193 = or(_T_191, _T_192) @[el2_lsu_bus_intf.scala 270:97] + node _T_194 = cat(_T_193, _T_188) @[Cat.scala 29:58] + node _T_195 = cat(_T_194, _T_183) @[Cat.scala 29:58] + node _T_196 = cat(_T_195, _T_178) @[Cat.scala 29:58] + ld_byte_hit_hi <= _T_196 @[el2_lsu_bus_intf.scala 270:27] + node _T_197 = bits(ld_byte_rhit_lo_lo, 0, 0) @[el2_lsu_bus_intf.scala 271:69] + node _T_198 = bits(ld_byte_rhit_hi_lo, 0, 0) @[el2_lsu_bus_intf.scala 271:93] + node _T_199 = or(_T_197, _T_198) @[el2_lsu_bus_intf.scala 271:73] + node _T_200 = bits(ld_byte_rhit_lo_lo, 1, 1) @[el2_lsu_bus_intf.scala 271:69] + node _T_201 = bits(ld_byte_rhit_hi_lo, 1, 1) @[el2_lsu_bus_intf.scala 271:93] + node _T_202 = or(_T_200, _T_201) @[el2_lsu_bus_intf.scala 271:73] + node _T_203 = bits(ld_byte_rhit_lo_lo, 2, 2) @[el2_lsu_bus_intf.scala 271:69] + node _T_204 = bits(ld_byte_rhit_hi_lo, 2, 2) @[el2_lsu_bus_intf.scala 271:93] + node _T_205 = or(_T_203, _T_204) @[el2_lsu_bus_intf.scala 271:73] + node _T_206 = bits(ld_byte_rhit_lo_lo, 3, 3) @[el2_lsu_bus_intf.scala 271:69] + node _T_207 = bits(ld_byte_rhit_hi_lo, 3, 3) @[el2_lsu_bus_intf.scala 271:93] + node _T_208 = or(_T_206, _T_207) @[el2_lsu_bus_intf.scala 271:73] + node _T_209 = cat(_T_208, _T_205) @[Cat.scala 29:58] + node _T_210 = cat(_T_209, _T_202) @[Cat.scala 29:58] + node _T_211 = cat(_T_210, _T_199) @[Cat.scala 29:58] + ld_byte_rhit_lo <= _T_211 @[el2_lsu_bus_intf.scala 271:27] + node _T_212 = bits(ld_byte_rhit_lo_hi, 0, 0) @[el2_lsu_bus_intf.scala 272:69] + node _T_213 = bits(ld_byte_rhit_hi_hi, 0, 0) @[el2_lsu_bus_intf.scala 272:93] + node _T_214 = or(_T_212, _T_213) @[el2_lsu_bus_intf.scala 272:73] + node _T_215 = bits(ld_byte_rhit_lo_hi, 1, 1) @[el2_lsu_bus_intf.scala 272:69] + node _T_216 = bits(ld_byte_rhit_hi_hi, 1, 1) @[el2_lsu_bus_intf.scala 272:93] + node _T_217 = or(_T_215, _T_216) @[el2_lsu_bus_intf.scala 272:73] + node _T_218 = bits(ld_byte_rhit_lo_hi, 2, 2) @[el2_lsu_bus_intf.scala 272:69] + node _T_219 = bits(ld_byte_rhit_hi_hi, 2, 2) @[el2_lsu_bus_intf.scala 272:93] + node _T_220 = or(_T_218, _T_219) @[el2_lsu_bus_intf.scala 272:73] + node _T_221 = bits(ld_byte_rhit_lo_hi, 3, 3) @[el2_lsu_bus_intf.scala 272:69] + node _T_222 = bits(ld_byte_rhit_hi_hi, 3, 3) @[el2_lsu_bus_intf.scala 272:93] + node _T_223 = or(_T_221, _T_222) @[el2_lsu_bus_intf.scala 272:73] + node _T_224 = cat(_T_223, _T_220) @[Cat.scala 29:58] + node _T_225 = cat(_T_224, _T_217) @[Cat.scala 29:58] + node _T_226 = cat(_T_225, _T_214) @[Cat.scala 29:58] + ld_byte_rhit_hi <= _T_226 @[el2_lsu_bus_intf.scala 272:27] + node _T_227 = bits(ld_byte_rhit_lo_lo, 0, 0) @[el2_lsu_bus_intf.scala 273:79] + node _T_228 = bits(store_data_lo_r, 7, 0) @[el2_lsu_bus_intf.scala 273:101] + node _T_229 = bits(ld_byte_rhit_hi_lo, 0, 0) @[el2_lsu_bus_intf.scala 273:136] + node _T_230 = bits(store_data_hi_r, 7, 0) @[el2_lsu_bus_intf.scala 273:158] + node _T_231 = mux(_T_227, _T_228, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_232 = mux(_T_229, _T_230, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_233 = or(_T_231, _T_232) @[Mux.scala 27:72] + wire _T_234 : UInt<8> @[Mux.scala 27:72] + _T_234 <= _T_233 @[Mux.scala 27:72] + node _T_235 = bits(ld_byte_rhit_lo_lo, 1, 1) @[el2_lsu_bus_intf.scala 273:79] + node _T_236 = bits(store_data_lo_r, 15, 8) @[el2_lsu_bus_intf.scala 273:101] + node _T_237 = bits(ld_byte_rhit_hi_lo, 1, 1) @[el2_lsu_bus_intf.scala 273:136] + node _T_238 = bits(store_data_hi_r, 15, 8) @[el2_lsu_bus_intf.scala 273:158] + node _T_239 = mux(_T_235, _T_236, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_240 = mux(_T_237, _T_238, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_241 = or(_T_239, _T_240) @[Mux.scala 27:72] + wire _T_242 : UInt<8> @[Mux.scala 27:72] + _T_242 <= _T_241 @[Mux.scala 27:72] + node _T_243 = bits(ld_byte_rhit_lo_lo, 2, 2) @[el2_lsu_bus_intf.scala 273:79] + node _T_244 = bits(store_data_lo_r, 23, 16) @[el2_lsu_bus_intf.scala 273:101] + node _T_245 = bits(ld_byte_rhit_hi_lo, 2, 2) @[el2_lsu_bus_intf.scala 273:136] + node _T_246 = bits(store_data_hi_r, 23, 16) @[el2_lsu_bus_intf.scala 273:158] + node _T_247 = mux(_T_243, _T_244, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_248 = mux(_T_245, _T_246, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_249 = or(_T_247, _T_248) @[Mux.scala 27:72] + wire _T_250 : UInt<8> @[Mux.scala 27:72] + _T_250 <= _T_249 @[Mux.scala 27:72] + node _T_251 = bits(ld_byte_rhit_lo_lo, 3, 3) @[el2_lsu_bus_intf.scala 273:79] + node _T_252 = bits(store_data_lo_r, 31, 24) @[el2_lsu_bus_intf.scala 273:101] + node _T_253 = bits(ld_byte_rhit_hi_lo, 3, 3) @[el2_lsu_bus_intf.scala 273:136] + node _T_254 = bits(store_data_hi_r, 31, 24) @[el2_lsu_bus_intf.scala 273:158] + node _T_255 = mux(_T_251, _T_252, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_256 = mux(_T_253, _T_254, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_257 = or(_T_255, _T_256) @[Mux.scala 27:72] + wire _T_258 : UInt<8> @[Mux.scala 27:72] + _T_258 <= _T_257 @[Mux.scala 27:72] + node _T_259 = cat(_T_258, _T_250) @[Cat.scala 29:58] + node _T_260 = cat(_T_259, _T_242) @[Cat.scala 29:58] + node _T_261 = cat(_T_260, _T_234) @[Cat.scala 29:58] + ld_fwddata_rpipe_lo <= _T_261 @[el2_lsu_bus_intf.scala 273:27] + node _T_262 = bits(ld_byte_rhit_lo_hi, 0, 0) @[el2_lsu_bus_intf.scala 274:79] + node _T_263 = bits(store_data_lo_r, 7, 0) @[el2_lsu_bus_intf.scala 274:101] + node _T_264 = bits(ld_byte_rhit_hi_hi, 0, 0) @[el2_lsu_bus_intf.scala 274:136] + node _T_265 = bits(store_data_hi_r, 7, 0) @[el2_lsu_bus_intf.scala 274:158] + node _T_266 = mux(_T_262, _T_263, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_267 = mux(_T_264, _T_265, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_268 = or(_T_266, _T_267) @[Mux.scala 27:72] + wire _T_269 : UInt<8> @[Mux.scala 27:72] + _T_269 <= _T_268 @[Mux.scala 27:72] + node _T_270 = bits(ld_byte_rhit_lo_hi, 1, 1) @[el2_lsu_bus_intf.scala 274:79] + node _T_271 = bits(store_data_lo_r, 15, 8) @[el2_lsu_bus_intf.scala 274:101] + node _T_272 = bits(ld_byte_rhit_hi_hi, 1, 1) @[el2_lsu_bus_intf.scala 274:136] + node _T_273 = bits(store_data_hi_r, 15, 8) @[el2_lsu_bus_intf.scala 274:158] + node _T_274 = mux(_T_270, _T_271, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_275 = mux(_T_272, _T_273, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_276 = or(_T_274, _T_275) @[Mux.scala 27:72] + wire _T_277 : UInt<8> @[Mux.scala 27:72] + _T_277 <= _T_276 @[Mux.scala 27:72] + node _T_278 = bits(ld_byte_rhit_lo_hi, 2, 2) @[el2_lsu_bus_intf.scala 274:79] + node _T_279 = bits(store_data_lo_r, 23, 16) @[el2_lsu_bus_intf.scala 274:101] + node _T_280 = bits(ld_byte_rhit_hi_hi, 2, 2) @[el2_lsu_bus_intf.scala 274:136] + node _T_281 = bits(store_data_hi_r, 23, 16) @[el2_lsu_bus_intf.scala 274:158] + node _T_282 = mux(_T_278, _T_279, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_283 = mux(_T_280, _T_281, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_284 = or(_T_282, _T_283) @[Mux.scala 27:72] + wire _T_285 : UInt<8> @[Mux.scala 27:72] + _T_285 <= _T_284 @[Mux.scala 27:72] + node _T_286 = bits(ld_byte_rhit_lo_hi, 3, 3) @[el2_lsu_bus_intf.scala 274:79] + node _T_287 = bits(store_data_lo_r, 31, 24) @[el2_lsu_bus_intf.scala 274:101] + node _T_288 = bits(ld_byte_rhit_hi_hi, 3, 3) @[el2_lsu_bus_intf.scala 274:136] + node _T_289 = bits(store_data_hi_r, 31, 24) @[el2_lsu_bus_intf.scala 274:158] + node _T_290 = mux(_T_286, _T_287, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_291 = mux(_T_288, _T_289, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_292 = or(_T_290, _T_291) @[Mux.scala 27:72] + wire _T_293 : UInt<8> @[Mux.scala 27:72] + _T_293 <= _T_292 @[Mux.scala 27:72] + node _T_294 = cat(_T_293, _T_285) @[Cat.scala 29:58] + node _T_295 = cat(_T_294, _T_277) @[Cat.scala 29:58] + node _T_296 = cat(_T_295, _T_269) @[Cat.scala 29:58] + ld_fwddata_rpipe_hi <= _T_296 @[el2_lsu_bus_intf.scala 274:27] + node _T_297 = bits(ld_byte_rhit_lo, 0, 0) @[el2_lsu_bus_intf.scala 275:70] + node _T_298 = bits(ld_fwddata_rpipe_lo, 7, 0) @[el2_lsu_bus_intf.scala 275:94] + node _T_299 = bits(ld_fwddata_buf_lo, 7, 0) @[el2_lsu_bus_intf.scala 275:128] + node _T_300 = mux(_T_297, _T_298, _T_299) @[el2_lsu_bus_intf.scala 275:54] + node _T_301 = bits(ld_byte_rhit_lo, 1, 1) @[el2_lsu_bus_intf.scala 275:70] + node _T_302 = bits(ld_fwddata_rpipe_lo, 15, 8) @[el2_lsu_bus_intf.scala 275:94] + node _T_303 = bits(ld_fwddata_buf_lo, 15, 8) @[el2_lsu_bus_intf.scala 275:128] + node _T_304 = mux(_T_301, _T_302, _T_303) @[el2_lsu_bus_intf.scala 275:54] + node _T_305 = bits(ld_byte_rhit_lo, 2, 2) @[el2_lsu_bus_intf.scala 275:70] + node _T_306 = bits(ld_fwddata_rpipe_lo, 23, 16) @[el2_lsu_bus_intf.scala 275:94] + node _T_307 = bits(ld_fwddata_buf_lo, 23, 16) @[el2_lsu_bus_intf.scala 275:128] + node _T_308 = mux(_T_305, _T_306, _T_307) @[el2_lsu_bus_intf.scala 275:54] + node _T_309 = bits(ld_byte_rhit_lo, 3, 3) @[el2_lsu_bus_intf.scala 275:70] + node _T_310 = bits(ld_fwddata_rpipe_lo, 31, 24) @[el2_lsu_bus_intf.scala 275:94] + node _T_311 = bits(ld_fwddata_buf_lo, 31, 24) @[el2_lsu_bus_intf.scala 275:128] + node _T_312 = mux(_T_309, _T_310, _T_311) @[el2_lsu_bus_intf.scala 275:54] + node _T_313 = cat(_T_312, _T_308) @[Cat.scala 29:58] + node _T_314 = cat(_T_313, _T_304) @[Cat.scala 29:58] + node _T_315 = cat(_T_314, _T_300) @[Cat.scala 29:58] + ld_fwddata_lo <= _T_315 @[el2_lsu_bus_intf.scala 275:27] + node _T_316 = bits(ld_byte_rhit_hi, 0, 0) @[el2_lsu_bus_intf.scala 276:70] + node _T_317 = bits(ld_fwddata_rpipe_hi, 7, 0) @[el2_lsu_bus_intf.scala 276:94] + node _T_318 = bits(ld_fwddata_buf_hi, 7, 0) @[el2_lsu_bus_intf.scala 276:128] + node _T_319 = mux(_T_316, _T_317, _T_318) @[el2_lsu_bus_intf.scala 276:54] + node _T_320 = bits(ld_byte_rhit_hi, 1, 1) @[el2_lsu_bus_intf.scala 276:70] + node _T_321 = bits(ld_fwddata_rpipe_hi, 15, 8) @[el2_lsu_bus_intf.scala 276:94] + node _T_322 = bits(ld_fwddata_buf_hi, 15, 8) @[el2_lsu_bus_intf.scala 276:128] + node _T_323 = mux(_T_320, _T_321, _T_322) @[el2_lsu_bus_intf.scala 276:54] + node _T_324 = bits(ld_byte_rhit_hi, 2, 2) @[el2_lsu_bus_intf.scala 276:70] + node _T_325 = bits(ld_fwddata_rpipe_hi, 23, 16) @[el2_lsu_bus_intf.scala 276:94] + node _T_326 = bits(ld_fwddata_buf_hi, 23, 16) @[el2_lsu_bus_intf.scala 276:128] + node _T_327 = mux(_T_324, _T_325, _T_326) @[el2_lsu_bus_intf.scala 276:54] + node _T_328 = bits(ld_byte_rhit_hi, 3, 3) @[el2_lsu_bus_intf.scala 276:70] + node _T_329 = bits(ld_fwddata_rpipe_hi, 31, 24) @[el2_lsu_bus_intf.scala 276:94] + node _T_330 = bits(ld_fwddata_buf_hi, 31, 24) @[el2_lsu_bus_intf.scala 276:128] + node _T_331 = mux(_T_328, _T_329, _T_330) @[el2_lsu_bus_intf.scala 276:54] + node _T_332 = cat(_T_331, _T_327) @[Cat.scala 29:58] + node _T_333 = cat(_T_332, _T_323) @[Cat.scala 29:58] + node _T_334 = cat(_T_333, _T_319) @[Cat.scala 29:58] + ld_fwddata_hi <= _T_334 @[el2_lsu_bus_intf.scala 276:27] + node _T_335 = bits(ld_byte_hit_lo, 0, 0) @[el2_lsu_bus_intf.scala 277:66] + node _T_336 = bits(ldst_byteen_lo_m, 0, 0) @[el2_lsu_bus_intf.scala 277:89] + node _T_337 = eq(_T_336, UInt<1>("h00")) @[el2_lsu_bus_intf.scala 277:72] + node _T_338 = or(_T_335, _T_337) @[el2_lsu_bus_intf.scala 277:70] + node _T_339 = bits(ld_byte_hit_lo, 1, 1) @[el2_lsu_bus_intf.scala 277:66] + node _T_340 = bits(ldst_byteen_lo_m, 1, 1) @[el2_lsu_bus_intf.scala 277:89] + node _T_341 = eq(_T_340, UInt<1>("h00")) @[el2_lsu_bus_intf.scala 277:72] + node _T_342 = or(_T_339, _T_341) @[el2_lsu_bus_intf.scala 277:70] + node _T_343 = bits(ld_byte_hit_lo, 2, 2) @[el2_lsu_bus_intf.scala 277:66] + node _T_344 = bits(ldst_byteen_lo_m, 2, 2) @[el2_lsu_bus_intf.scala 277:89] + node _T_345 = eq(_T_344, UInt<1>("h00")) @[el2_lsu_bus_intf.scala 277:72] + node _T_346 = or(_T_343, _T_345) @[el2_lsu_bus_intf.scala 277:70] + node _T_347 = bits(ld_byte_hit_lo, 3, 3) @[el2_lsu_bus_intf.scala 277:66] + node _T_348 = bits(ldst_byteen_lo_m, 3, 3) @[el2_lsu_bus_intf.scala 277:89] + node _T_349 = eq(_T_348, UInt<1>("h00")) @[el2_lsu_bus_intf.scala 277:72] + node _T_350 = or(_T_347, _T_349) @[el2_lsu_bus_intf.scala 277:70] + node _T_351 = and(_T_338, _T_342) @[el2_lsu_bus_intf.scala 277:111] + node _T_352 = and(_T_351, _T_346) @[el2_lsu_bus_intf.scala 277:111] + node _T_353 = and(_T_352, _T_350) @[el2_lsu_bus_intf.scala 277:111] + ld_full_hit_lo_m <= _T_353 @[el2_lsu_bus_intf.scala 277:27] + node _T_354 = bits(ld_byte_hit_hi, 0, 0) @[el2_lsu_bus_intf.scala 278:66] + node _T_355 = bits(ldst_byteen_hi_m, 0, 0) @[el2_lsu_bus_intf.scala 278:89] + node _T_356 = eq(_T_355, UInt<1>("h00")) @[el2_lsu_bus_intf.scala 278:72] + node _T_357 = or(_T_354, _T_356) @[el2_lsu_bus_intf.scala 278:70] + node _T_358 = bits(ld_byte_hit_hi, 1, 1) @[el2_lsu_bus_intf.scala 278:66] + node _T_359 = bits(ldst_byteen_hi_m, 1, 1) @[el2_lsu_bus_intf.scala 278:89] + node _T_360 = eq(_T_359, UInt<1>("h00")) @[el2_lsu_bus_intf.scala 278:72] + node _T_361 = or(_T_358, _T_360) @[el2_lsu_bus_intf.scala 278:70] + node _T_362 = bits(ld_byte_hit_hi, 2, 2) @[el2_lsu_bus_intf.scala 278:66] + node _T_363 = bits(ldst_byteen_hi_m, 2, 2) @[el2_lsu_bus_intf.scala 278:89] + node _T_364 = eq(_T_363, UInt<1>("h00")) @[el2_lsu_bus_intf.scala 278:72] + node _T_365 = or(_T_362, _T_364) @[el2_lsu_bus_intf.scala 278:70] + node _T_366 = bits(ld_byte_hit_hi, 3, 3) @[el2_lsu_bus_intf.scala 278:66] + node _T_367 = bits(ldst_byteen_hi_m, 3, 3) @[el2_lsu_bus_intf.scala 278:89] + node _T_368 = eq(_T_367, UInt<1>("h00")) @[el2_lsu_bus_intf.scala 278:72] + node _T_369 = or(_T_366, _T_368) @[el2_lsu_bus_intf.scala 278:70] + node _T_370 = and(_T_357, _T_361) @[el2_lsu_bus_intf.scala 278:111] + node _T_371 = and(_T_370, _T_365) @[el2_lsu_bus_intf.scala 278:111] + node _T_372 = and(_T_371, _T_369) @[el2_lsu_bus_intf.scala 278:111] + ld_full_hit_hi_m <= _T_372 @[el2_lsu_bus_intf.scala 278:27] + node _T_373 = and(ld_full_hit_lo_m, ld_full_hit_hi_m) @[el2_lsu_bus_intf.scala 279:47] + node _T_374 = and(_T_373, io.lsu_busreq_m) @[el2_lsu_bus_intf.scala 279:66] + node _T_375 = and(_T_374, io.lsu_pkt_m.load) @[el2_lsu_bus_intf.scala 279:84] + node _T_376 = eq(io.is_sideeffects_m, UInt<1>("h00")) @[el2_lsu_bus_intf.scala 279:106] + node _T_377 = and(_T_375, _T_376) @[el2_lsu_bus_intf.scala 279:104] + ld_full_hit_m <= _T_377 @[el2_lsu_bus_intf.scala 279:27] + node _T_378 = bits(ld_fwddata_hi, 31, 0) @[el2_lsu_bus_intf.scala 280:47] + node _T_379 = bits(ld_fwddata_lo, 31, 0) @[el2_lsu_bus_intf.scala 280:68] + node _T_380 = cat(_T_378, _T_379) @[Cat.scala 29:58] + node _T_381 = bits(io.lsu_addr_m, 1, 0) @[el2_lsu_bus_intf.scala 280:97] + node _T_382 = mul(UInt<4>("h08"), _T_381) @[el2_lsu_bus_intf.scala 280:83] + node _T_383 = dshr(_T_380, _T_382) @[el2_lsu_bus_intf.scala 280:76] + ld_fwddata_m <= _T_383 @[el2_lsu_bus_intf.scala 280:27] + node _T_384 = bits(ld_fwddata_m, 31, 0) @[el2_lsu_bus_intf.scala 281:42] + io.bus_read_data_m <= _T_384 @[el2_lsu_bus_intf.scala 281:27] + reg _T_385 : UInt<1>, io.free_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_intf.scala 284:32] + _T_385 <= io.lsu_bus_clk_en @[el2_lsu_bus_intf.scala 284:32] + lsu_bus_clk_en_q <= _T_385 @[el2_lsu_bus_intf.scala 284:22] + reg _T_386 : UInt<1>, io.lsu_c1_m_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_intf.scala 287:27] + _T_386 <= io.lsu_bus_clk_en @[el2_lsu_bus_intf.scala 287:27] + ldst_dual_m <= _T_386 @[el2_lsu_bus_intf.scala 287:17] + reg _T_387 : UInt<1>, io.lsu_c1_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_intf.scala 290:33] + _T_387 <= io.lsu_bus_clk_en @[el2_lsu_bus_intf.scala 290:33] + ldst_dual_r <= _T_387 @[el2_lsu_bus_intf.scala 290:23] + reg _T_388 : UInt<1>, io.lsu_c1_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_intf.scala 291:33] + _T_388 <= io.lsu_bus_clk_en @[el2_lsu_bus_intf.scala 291:33] + is_sideeffects_r <= _T_388 @[el2_lsu_bus_intf.scala 291:23] + reg _T_389 : UInt<1>, io.lsu_c1_r_clk with : (reset => (reset, UInt<4>("h00"))) @[el2_lsu_bus_intf.scala 292:33] + _T_389 <= io.lsu_bus_clk_en @[el2_lsu_bus_intf.scala 292:33] + ldst_byteen_r <= _T_389 @[el2_lsu_bus_intf.scala 292:23] + + module el2_lsu : + input clock : Clock + input reset : AsyncReset + output io : {flip clk_override : UInt<1>, flip dec_tlu_flush_lower_r : UInt<1>, flip dec_tlu_i0_kill_writeb_r : UInt<1>, flip dec_tlu_force_halt : UInt<1>, flip dec_tlu_external_ldfwd_disable : UInt<1>, flip dec_tlu_wb_coalescing_disable : UInt<1>, flip dec_tlu_sideeffect_posted_disable : UInt<1>, flip dec_tlu_core_ecc_disable : UInt<1>, flip exu_lsu_rs1_d : UInt<32>, flip exu_lsu_rs2_d : UInt<32>, flip dec_lsu_offset_d : UInt<12>, flip lsu_p : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip trigger_pkt_any : {select : UInt<1>, match_ : UInt<1>, store : UInt<1>, load : UInt<1>, execute : UInt<1>, m : UInt<1>, tdata2 : UInt<32>}[4], flip dec_lsu_valid_raw_d : UInt<1>, flip dec_tlu_mrac_ff : UInt<32>, lsu_load_stall_any : UInt<1>, lsu_store_stall_any : UInt<1>, lsu_fastint_stall_any : UInt<1>, lsu_idle_any : UInt<1>, lsu_fir_addr : UInt<32>, lsu_fir_error : UInt<2>, lsu_single_ecc_error_incr : UInt<1>, lsu_error_pkt_r : {exc_valid : UInt<1>, single_ecc_error : UInt<1>, inst_type : UInt<1>, exc_type : UInt<1>, mscause : UInt<1>, addr : UInt<1>}, lsu_imprecise_error_load_any : UInt<1>, lsu_imprecise_error_store_any : UInt<1>, lsu_imprecise_error_addr_any : UInt<32>, lsu_nonblock_load_valid_m : UInt<1>, lsu_nonblock_load_tag_m : UInt<2>, lsu_nonblock_load_inv_r : UInt<1>, lsu_nonblock_load_inv_tag_r : UInt<2>, lsu_nonblock_load_data_valid : UInt<1>, lsu_nonblock_load_data_error : UInt<1>, lsu_nonblock_load_data_tag : UInt<2>, lsu_nonblock_load_data : UInt<32>, lsu_pmu_load_external_m : UInt<1>, lsu_pmu_store_external_m : UInt<1>, lsu_pmu_misaligned_m : UInt<1>, lsu_pmu_bus_trxn : UInt<1>, lsu_pmu_bus_misaligned : UInt<1>, lsu_pmu_bus_error : UInt<1>, lsu_pmu_bus_busy : UInt<1>, lsu_trigger_match_m : UInt<4>, dccm_wren : UInt<1>, dccm_rden : UInt<1>, dccm_wr_addr_lo : UInt<16>, dccm_wr_addr_hi : UInt<16>, dccm_rd_addr_lo : UInt<16>, dccm_rd_addr_hi : UInt<16>, dccm_wr_data_lo : UInt<39>, dccm_wr_data_hi : UInt<39>, flip dccm_rd_data_lo : UInt<39>, flip dccm_rd_data_hi : UInt<39>, picm_wren : UInt<1>, picm_rden : UInt<1>, picm_mken : UInt<1>, picm_rdaddr : UInt<32>, picm_wraddr : UInt<32>, picm_wr_data : UInt<32>, flip picm_rd_data : UInt<32>, lsu_axi_awvalid : UInt<1>, lsu_axi_awlock : UInt<1>, flip lsu_axi_awready : UInt<1>, lsu_axi_awid : UInt<3>, lsu_axi_awaddr : UInt<32>, lsu_axi_awregion : UInt<4>, lsu_axi_awlen : UInt<8>, lsu_axi_awsize : UInt<3>, lsu_axi_awburst : UInt<2>, lsu_axi_awcache : UInt<4>, lsu_axi_awprot : UInt<3>, lsu_axi_awqos : UInt<4>, lsu_axi_wvalid : UInt<1>, flip lsu_axi_wready : UInt<1>, lsu_axi_wdata : UInt<64>, lsu_axi_wstrb : UInt<8>, lsu_axi_wlast : UInt<1>, flip lsu_axi_bvalid : UInt<1>, lsu_axi_bready : UInt<1>, flip lsu_axi_bresp : UInt<2>, flip lsu_axi_bid : UInt<3>, lsu_axi_arvalid : UInt<1>, lsu_axi_arlock : UInt<1>, flip lsu_axi_arready : UInt<1>, lsu_axi_arid : UInt<3>, lsu_axi_araddr : UInt<32>, lsu_axi_arregion : UInt<4>, lsu_axi_arlen : UInt<8>, lsu_axi_arsize : UInt<3>, lsu_axi_arburst : UInt<2>, lsu_axi_arcache : UInt<4>, lsu_axi_arprot : UInt<3>, lsu_axi_arqos : UInt<4>, flip lsu_axi_rvalid : UInt<1>, lsu_axi_rready : UInt<1>, flip lsu_axi_rdata : UInt<64>, flip lsu_axi_rlast : UInt<1>, flip lsu_axi_rresp : UInt<2>, flip lsu_axi_rid : UInt<3>, flip lsu_bus_clk_en : UInt<1>, flip dma_dccm_req : UInt<1>, flip dma_mem_write : UInt<1>, dccm_dma_rvalid : UInt<1>, dccm_dma_ecc_error : UInt<1>, flip dma_mem_tag : UInt<3>, flip dma_mem_addr : UInt<32>, flip dma_mem_sz : UInt<3>, flip dma_mem_wdata : UInt<64>, dccm_dma_rtag : UInt<3>, dccm_dma_rdata : UInt<64>, dccm_ready : UInt<1>, flip scan_mode : UInt<1>, flip free_clk : Clock} + + wire dma_dccm_wdata : UInt<64> + dma_dccm_wdata <= UInt<64>("h00") + wire dma_dccm_wdata_lo : UInt<32> + dma_dccm_wdata_lo <= UInt<32>("h00") + wire dma_dccm_wdata_hi : UInt<32> + dma_dccm_wdata_hi <= UInt<32>("h00") + wire dma_mem_tag_m : UInt<32> + dma_mem_tag_m <= UInt<32>("h00") + wire lsu_raw_fwd_lo_r : UInt<1> + lsu_raw_fwd_lo_r <= UInt<1>("h00") + wire lsu_raw_fwd_hi_r : UInt<1> + lsu_raw_fwd_hi_r <= UInt<1>("h00") + inst lsu_lsc_ctl of el2_lsu_lsc_ctl @[el2_lsu.scala 154:30] + lsu_lsc_ctl.clock <= clock + lsu_lsc_ctl.reset <= reset + inst dccm_ctl of el2_lsu_dccm_ctl @[el2_lsu.scala 155:30] + dccm_ctl.clock <= clock + dccm_ctl.reset <= reset + inst stbuf of el2_lsu_stbuf @[el2_lsu.scala 156:30] + stbuf.clock <= clock + stbuf.reset <= reset + inst ecc of el2_lsu_ecc @[el2_lsu.scala 157:30] + ecc.clock <= clock + ecc.reset <= reset + inst trigger of el2_lsu_trigger @[el2_lsu.scala 158:30] + trigger.clock <= clock + trigger.reset <= reset + inst clkdomain of el2_lsu_clkdomain @[el2_lsu.scala 159:30] + clkdomain.clock <= clock + clkdomain.reset <= reset + inst bus_intf of el2_lsu_bus_intf @[el2_lsu.scala 160:30] + bus_intf.clock <= clock + bus_intf.reset <= reset + node lsu_raw_fwd_lo_m = orr(stbuf.io.stbuf_fwdbyteen_lo_m) @[el2_lsu.scala 162:56] + node lsu_raw_fwd_hi_m = orr(stbuf.io.stbuf_fwdbyteen_hi_m) @[el2_lsu.scala 163:56] + node _T = or(stbuf.io.lsu_stbuf_full_any, bus_intf.io.lsu_bus_buffer_full_any) @[el2_lsu.scala 166:57] + node _T_1 = or(_T, dccm_ctl.io.ld_single_ecc_error_r_ff) @[el2_lsu.scala 166:95] + io.lsu_store_stall_any <= _T_1 @[el2_lsu.scala 166:26] + node _T_2 = or(bus_intf.io.lsu_bus_buffer_full_any, dccm_ctl.io.ld_single_ecc_error_r_ff) @[el2_lsu.scala 167:64] + io.lsu_load_stall_any <= _T_2 @[el2_lsu.scala 167:25] + io.lsu_fastint_stall_any <= dccm_ctl.io.ld_single_ecc_error_r @[el2_lsu.scala 168:28] + node _T_3 = eq(lsu_lsc_ctl.io.lsu_pkt_m.dma, UInt<1>("h00")) @[el2_lsu.scala 173:58] + node _T_4 = and(lsu_lsc_ctl.io.lsu_pkt_m.valid, _T_3) @[el2_lsu.scala 173:56] + node _T_5 = or(lsu_lsc_ctl.io.addr_in_dccm_m, lsu_lsc_ctl.io.addr_in_pic_m) @[el2_lsu.scala 173:121] + node _T_6 = and(_T_4, _T_5) @[el2_lsu.scala 173:88] + node ldst_nodma_mtor = and(_T_6, lsu_lsc_ctl.io.lsu_pkt_m.store) @[el2_lsu.scala 173:153] + node _T_7 = or(io.dec_lsu_valid_raw_d, ldst_nodma_mtor) @[el2_lsu.scala 174:45] + node _T_8 = or(_T_7, dccm_ctl.io.ld_single_ecc_error_r_ff) @[el2_lsu.scala 174:63] + node _T_9 = eq(_T_8, UInt<1>("h00")) @[el2_lsu.scala 174:20] + io.dccm_ready <= _T_9 @[el2_lsu.scala 174:17] + node _T_10 = and(io.dma_dccm_req, io.dma_mem_write) @[el2_lsu.scala 175:38] + node dma_dccm_wen = and(_T_10, lsu_lsc_ctl.io.addr_in_dccm_d) @[el2_lsu.scala 175:57] + node _T_11 = and(io.dma_dccm_req, io.dma_mem_write) @[el2_lsu.scala 176:38] + node dma_pic_wen = and(_T_11, lsu_lsc_ctl.io.addr_in_pic_d) @[el2_lsu.scala 176:57] + node _T_12 = bits(io.dma_mem_addr, 2, 0) @[el2_lsu.scala 177:60] + node _T_13 = cat(_T_12, UInt<3>("h00")) @[Cat.scala 29:58] + node _T_14 = dshr(io.dma_mem_wdata, _T_13) @[el2_lsu.scala 177:38] + dma_dccm_wdata <= _T_14 @[el2_lsu.scala 177:18] + node _T_15 = bits(dma_dccm_wdata, 63, 32) @[el2_lsu.scala 178:38] + dma_dccm_wdata_hi <= _T_15 @[el2_lsu.scala 178:21] + node _T_16 = bits(dma_dccm_wdata, 31, 0) @[el2_lsu.scala 179:38] + dma_dccm_wdata_lo <= _T_16 @[el2_lsu.scala 179:21] + node _T_17 = eq(lsu_lsc_ctl.io.lsu_pkt_m.dma, UInt<1>("h00")) @[el2_lsu.scala 188:58] + node _T_18 = and(lsu_lsc_ctl.io.lsu_pkt_m.valid, _T_17) @[el2_lsu.scala 188:56] + node _T_19 = eq(lsu_lsc_ctl.io.lsu_pkt_r.dma, UInt<1>("h00")) @[el2_lsu.scala 188:125] + node _T_20 = and(lsu_lsc_ctl.io.lsu_pkt_r.valid, _T_19) @[el2_lsu.scala 188:123] + node _T_21 = or(_T_18, _T_20) @[el2_lsu.scala 188:89] + node _T_22 = eq(_T_21, UInt<1>("h00")) @[el2_lsu.scala 188:22] + node _T_23 = and(_T_22, bus_intf.io.lsu_bus_buffer_empty_any) @[el2_lsu.scala 188:157] + node _T_24 = and(_T_23, bus_intf.io.lsu_bus_idle_any) @[el2_lsu.scala 188:196] + io.lsu_idle_any <= _T_24 @[el2_lsu.scala 188:19] + node _T_25 = and(lsu_lsc_ctl.io.lsu_pkt_r.valid, lsu_lsc_ctl.io.lsu_pkt_r.store) @[el2_lsu.scala 190:61] + node _T_26 = and(_T_25, lsu_lsc_ctl.io.addr_in_dccm_r) @[el2_lsu.scala 190:94] + node _T_27 = eq(io.dec_tlu_i0_kill_writeb_r, UInt<1>("h00")) @[el2_lsu.scala 190:128] + node _T_28 = and(_T_26, _T_27) @[el2_lsu.scala 190:126] + node _T_29 = eq(lsu_lsc_ctl.io.lsu_pkt_r.dma, UInt<1>("h00")) @[el2_lsu.scala 190:139] + node store_stbuf_reqvld_r = and(_T_28, _T_29) @[el2_lsu.scala 190:137] + node _T_30 = or(lsu_lsc_ctl.io.lsu_pkt_m.load, lsu_lsc_ctl.io.lsu_pkt_m.store) @[el2_lsu.scala 192:85] + node _T_31 = and(lsu_lsc_ctl.io.lsu_pkt_m.valid, _T_30) @[el2_lsu.scala 192:52] + node _T_32 = or(lsu_lsc_ctl.io.addr_in_dccm_m, lsu_lsc_ctl.io.addr_in_pic_m) @[el2_lsu.scala 192:152] + node lsu_cmpen_m = and(_T_31, _T_32) @[el2_lsu.scala 192:119] + node _T_33 = or(lsu_lsc_ctl.io.lsu_pkt_m.load, lsu_lsc_ctl.io.lsu_pkt_m.store) @[el2_lsu.scala 194:87] + node _T_34 = and(_T_33, lsu_lsc_ctl.io.addr_external_m) @[el2_lsu.scala 194:121] + node _T_35 = and(lsu_lsc_ctl.io.lsu_pkt_m.valid, _T_34) @[el2_lsu.scala 194:53] + node _T_36 = eq(io.dec_tlu_flush_lower_r, UInt<1>("h00")) @[el2_lsu.scala 194:157] + node _T_37 = and(_T_35, _T_36) @[el2_lsu.scala 194:155] + node _T_38 = eq(lsu_lsc_ctl.io.lsu_exc_m, UInt<1>("h00")) @[el2_lsu.scala 194:171] + node _T_39 = and(_T_37, _T_38) @[el2_lsu.scala 194:169] + node _T_40 = eq(lsu_lsc_ctl.io.lsu_pkt_m.fast_int, UInt<1>("h00")) @[el2_lsu.scala 194:199] + node lsu_busreq_m = and(_T_39, _T_40) @[el2_lsu.scala 194:197] + node _T_41 = bits(lsu_lsc_ctl.io.lsu_addr_m, 0, 0) @[el2_lsu.scala 196:122] + node _T_42 = and(lsu_lsc_ctl.io.lsu_pkt_m.half, _T_41) @[el2_lsu.scala 196:95] + node _T_43 = bits(lsu_lsc_ctl.io.lsu_addr_m, 1, 0) @[el2_lsu.scala 196:187] + node _T_44 = orr(_T_43) @[el2_lsu.scala 196:193] + node _T_45 = and(lsu_lsc_ctl.io.lsu_pkt_m.word, _T_44) @[el2_lsu.scala 196:160] + node _T_46 = or(_T_42, _T_45) @[el2_lsu.scala 196:127] + node _T_47 = and(lsu_lsc_ctl.io.lsu_pkt_m.valid, _T_46) @[el2_lsu.scala 196:61] + io.lsu_pmu_misaligned_m <= _T_47 @[el2_lsu.scala 196:27] + node _T_48 = and(lsu_lsc_ctl.io.lsu_pkt_m.valid, lsu_lsc_ctl.io.lsu_pkt_m.load) @[el2_lsu.scala 197:65] + node _T_49 = and(_T_48, lsu_lsc_ctl.io.addr_external_m) @[el2_lsu.scala 197:97] + io.lsu_pmu_load_external_m <= _T_49 @[el2_lsu.scala 197:31] + node _T_50 = and(lsu_lsc_ctl.io.lsu_pkt_m.valid, lsu_lsc_ctl.io.lsu_pkt_m.store) @[el2_lsu.scala 198:65] + node _T_51 = and(_T_50, lsu_lsc_ctl.io.addr_external_m) @[el2_lsu.scala 198:98] + io.lsu_pmu_store_external_m <= _T_51 @[el2_lsu.scala 198:31] + lsu_lsc_ctl.io.lsu_c1_m_clk <= clkdomain.io.lsu_c1_m_clk @[el2_lsu.scala 202:46] + lsu_lsc_ctl.io.lsu_c1_r_clk <= clkdomain.io.lsu_c1_r_clk @[el2_lsu.scala 203:46] + lsu_lsc_ctl.io.lsu_c2_m_clk <= clkdomain.io.lsu_c2_m_clk @[el2_lsu.scala 204:46] + lsu_lsc_ctl.io.lsu_c2_r_clk <= clkdomain.io.lsu_c2_r_clk @[el2_lsu.scala 205:46] + lsu_lsc_ctl.io.lsu_store_c1_m_clk <= clkdomain.io.lsu_store_c1_m_clk @[el2_lsu.scala 206:46] + lsu_lsc_ctl.io.lsu_ld_data_r <= dccm_ctl.io.lsu_ld_data_r @[el2_lsu.scala 207:46] + lsu_lsc_ctl.io.lsu_ld_data_corr_r <= dccm_ctl.io.lsu_ld_data_corr_r @[el2_lsu.scala 208:46] + lsu_lsc_ctl.io.lsu_single_ecc_error_r <= ecc.io.lsu_single_ecc_error_r @[el2_lsu.scala 209:46] + lsu_lsc_ctl.io.lsu_double_ecc_error_r <= ecc.io.lsu_double_ecc_error_r @[el2_lsu.scala 210:46] + lsu_lsc_ctl.io.lsu_ld_data_m <= dccm_ctl.io.lsu_ld_data_m @[el2_lsu.scala 211:46] + lsu_lsc_ctl.io.lsu_single_ecc_error_m <= ecc.io.lsu_single_ecc_error_m @[el2_lsu.scala 212:46] + lsu_lsc_ctl.io.lsu_double_ecc_error_m <= ecc.io.lsu_double_ecc_error_m @[el2_lsu.scala 213:46] + lsu_lsc_ctl.io.flush_m_up <= io.dec_tlu_flush_lower_r @[el2_lsu.scala 214:46] + lsu_lsc_ctl.io.flush_r <= io.dec_tlu_i0_kill_writeb_r @[el2_lsu.scala 215:46] + lsu_lsc_ctl.io.exu_lsu_rs1_d <= io.exu_lsu_rs1_d @[el2_lsu.scala 216:46] + lsu_lsc_ctl.io.exu_lsu_rs2_d <= io.exu_lsu_rs2_d @[el2_lsu.scala 217:46] + lsu_lsc_ctl.io.lsu_p.valid <= io.lsu_p.valid @[el2_lsu.scala 218:46] + lsu_lsc_ctl.io.lsu_p.store_data_bypass_m <= io.lsu_p.store_data_bypass_m @[el2_lsu.scala 218:46] + lsu_lsc_ctl.io.lsu_p.load_ldst_bypass_d <= io.lsu_p.load_ldst_bypass_d @[el2_lsu.scala 218:46] + lsu_lsc_ctl.io.lsu_p.store_data_bypass_d <= io.lsu_p.store_data_bypass_d @[el2_lsu.scala 218:46] + lsu_lsc_ctl.io.lsu_p.dma <= io.lsu_p.dma @[el2_lsu.scala 218:46] + lsu_lsc_ctl.io.lsu_p.unsign <= io.lsu_p.unsign @[el2_lsu.scala 218:46] + lsu_lsc_ctl.io.lsu_p.store <= io.lsu_p.store @[el2_lsu.scala 218:46] + lsu_lsc_ctl.io.lsu_p.load <= io.lsu_p.load @[el2_lsu.scala 218:46] + lsu_lsc_ctl.io.lsu_p.dword <= io.lsu_p.dword @[el2_lsu.scala 218:46] + lsu_lsc_ctl.io.lsu_p.word <= io.lsu_p.word @[el2_lsu.scala 218:46] + lsu_lsc_ctl.io.lsu_p.half <= io.lsu_p.half @[el2_lsu.scala 218:46] + lsu_lsc_ctl.io.lsu_p.by <= io.lsu_p.by @[el2_lsu.scala 218:46] + lsu_lsc_ctl.io.lsu_p.fast_int <= io.lsu_p.fast_int @[el2_lsu.scala 218:46] + lsu_lsc_ctl.io.dec_lsu_valid_raw_d <= io.dec_lsu_valid_raw_d @[el2_lsu.scala 219:46] + lsu_lsc_ctl.io.dec_lsu_offset_d <= io.dec_lsu_offset_d @[el2_lsu.scala 220:46] + lsu_lsc_ctl.io.picm_mask_data_m <= dccm_ctl.io.picm_mask_data_m @[el2_lsu.scala 221:46] + lsu_lsc_ctl.io.bus_read_data_m <= bus_intf.io.bus_read_data_m @[el2_lsu.scala 222:46] + lsu_lsc_ctl.io.dma_dccm_req <= io.dma_dccm_req @[el2_lsu.scala 223:46] + lsu_lsc_ctl.io.dma_mem_addr <= io.dma_mem_addr @[el2_lsu.scala 224:46] + lsu_lsc_ctl.io.dma_mem_sz <= io.dma_mem_sz @[el2_lsu.scala 225:46] + lsu_lsc_ctl.io.dma_mem_write <= io.dma_mem_write @[el2_lsu.scala 226:46] + lsu_lsc_ctl.io.dma_mem_wdata <= io.dma_mem_wdata @[el2_lsu.scala 227:46] + lsu_lsc_ctl.io.dec_tlu_mrac_ff <= io.dec_tlu_mrac_ff @[el2_lsu.scala 228:46] + lsu_lsc_ctl.io.scan_mode <= io.scan_mode @[el2_lsu.scala 229:46] + io.lsu_single_ecc_error_incr <= lsu_lsc_ctl.io.lsu_single_ecc_error_incr @[el2_lsu.scala 232:49] + io.lsu_error_pkt_r.addr <= lsu_lsc_ctl.io.lsu_error_pkt_r.addr @[el2_lsu.scala 233:49] + io.lsu_error_pkt_r.mscause <= lsu_lsc_ctl.io.lsu_error_pkt_r.mscause @[el2_lsu.scala 233:49] + io.lsu_error_pkt_r.exc_type <= lsu_lsc_ctl.io.lsu_error_pkt_r.exc_type @[el2_lsu.scala 233:49] + io.lsu_error_pkt_r.inst_type <= lsu_lsc_ctl.io.lsu_error_pkt_r.inst_type @[el2_lsu.scala 233:49] + io.lsu_error_pkt_r.single_ecc_error <= lsu_lsc_ctl.io.lsu_error_pkt_r.single_ecc_error @[el2_lsu.scala 233:49] + io.lsu_error_pkt_r.exc_valid <= lsu_lsc_ctl.io.lsu_error_pkt_r.exc_valid @[el2_lsu.scala 233:49] + io.lsu_fir_addr <= lsu_lsc_ctl.io.lsu_fir_addr @[el2_lsu.scala 234:49] + io.lsu_fir_error <= lsu_lsc_ctl.io.lsu_fir_error @[el2_lsu.scala 235:49] + dccm_ctl.io.lsu_c2_m_clk <= clkdomain.io.lsu_c2_m_clk @[el2_lsu.scala 238:46] + dccm_ctl.io.lsu_c2_r_clk <= clkdomain.io.lsu_c2_m_clk @[el2_lsu.scala 239:46] + dccm_ctl.io.lsu_free_c2_clk <= clkdomain.io.lsu_c2_r_clk @[el2_lsu.scala 240:46] + dccm_ctl.io.lsu_c1_r_clk <= clkdomain.io.lsu_free_c2_clk @[el2_lsu.scala 241:46] + dccm_ctl.io.lsu_store_c1_r_clk <= clkdomain.io.lsu_c1_r_clk @[el2_lsu.scala 242:46] + dccm_ctl.io.lsu_pkt_d.valid <= lsu_lsc_ctl.io.lsu_pkt_d.valid @[el2_lsu.scala 244:46] + dccm_ctl.io.lsu_pkt_d.store_data_bypass_m <= lsu_lsc_ctl.io.lsu_pkt_d.store_data_bypass_m @[el2_lsu.scala 244:46] + dccm_ctl.io.lsu_pkt_d.load_ldst_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_d.load_ldst_bypass_d @[el2_lsu.scala 244:46] + dccm_ctl.io.lsu_pkt_d.store_data_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_d.store_data_bypass_d @[el2_lsu.scala 244:46] + dccm_ctl.io.lsu_pkt_d.dma <= lsu_lsc_ctl.io.lsu_pkt_d.dma @[el2_lsu.scala 244:46] + dccm_ctl.io.lsu_pkt_d.unsign <= lsu_lsc_ctl.io.lsu_pkt_d.unsign @[el2_lsu.scala 244:46] + dccm_ctl.io.lsu_pkt_d.store <= lsu_lsc_ctl.io.lsu_pkt_d.store @[el2_lsu.scala 244:46] + dccm_ctl.io.lsu_pkt_d.load <= lsu_lsc_ctl.io.lsu_pkt_d.load @[el2_lsu.scala 244:46] + dccm_ctl.io.lsu_pkt_d.dword <= lsu_lsc_ctl.io.lsu_pkt_d.dword @[el2_lsu.scala 244:46] + dccm_ctl.io.lsu_pkt_d.word <= lsu_lsc_ctl.io.lsu_pkt_d.word @[el2_lsu.scala 244:46] + dccm_ctl.io.lsu_pkt_d.half <= lsu_lsc_ctl.io.lsu_pkt_d.half @[el2_lsu.scala 244:46] + dccm_ctl.io.lsu_pkt_d.by <= lsu_lsc_ctl.io.lsu_pkt_d.by @[el2_lsu.scala 244:46] + dccm_ctl.io.lsu_pkt_d.fast_int <= lsu_lsc_ctl.io.lsu_pkt_d.fast_int @[el2_lsu.scala 244:46] + dccm_ctl.io.lsu_pkt_m.valid <= lsu_lsc_ctl.io.lsu_pkt_m.valid @[el2_lsu.scala 245:46] + dccm_ctl.io.lsu_pkt_m.store_data_bypass_m <= lsu_lsc_ctl.io.lsu_pkt_m.store_data_bypass_m @[el2_lsu.scala 245:46] + dccm_ctl.io.lsu_pkt_m.load_ldst_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_m.load_ldst_bypass_d @[el2_lsu.scala 245:46] + dccm_ctl.io.lsu_pkt_m.store_data_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_m.store_data_bypass_d @[el2_lsu.scala 245:46] + dccm_ctl.io.lsu_pkt_m.dma <= lsu_lsc_ctl.io.lsu_pkt_m.dma @[el2_lsu.scala 245:46] + dccm_ctl.io.lsu_pkt_m.unsign <= lsu_lsc_ctl.io.lsu_pkt_m.unsign @[el2_lsu.scala 245:46] + dccm_ctl.io.lsu_pkt_m.store <= lsu_lsc_ctl.io.lsu_pkt_m.store @[el2_lsu.scala 245:46] + dccm_ctl.io.lsu_pkt_m.load <= lsu_lsc_ctl.io.lsu_pkt_m.load @[el2_lsu.scala 245:46] + dccm_ctl.io.lsu_pkt_m.dword <= lsu_lsc_ctl.io.lsu_pkt_m.dword @[el2_lsu.scala 245:46] + dccm_ctl.io.lsu_pkt_m.word <= lsu_lsc_ctl.io.lsu_pkt_m.word @[el2_lsu.scala 245:46] + dccm_ctl.io.lsu_pkt_m.half <= lsu_lsc_ctl.io.lsu_pkt_m.half @[el2_lsu.scala 245:46] + dccm_ctl.io.lsu_pkt_m.by <= lsu_lsc_ctl.io.lsu_pkt_m.by @[el2_lsu.scala 245:46] + dccm_ctl.io.lsu_pkt_m.fast_int <= lsu_lsc_ctl.io.lsu_pkt_m.fast_int @[el2_lsu.scala 245:46] + dccm_ctl.io.lsu_pkt_r.valid <= lsu_lsc_ctl.io.lsu_pkt_r.valid @[el2_lsu.scala 246:46] + dccm_ctl.io.lsu_pkt_r.store_data_bypass_m <= lsu_lsc_ctl.io.lsu_pkt_r.store_data_bypass_m @[el2_lsu.scala 246:46] + dccm_ctl.io.lsu_pkt_r.load_ldst_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_r.load_ldst_bypass_d @[el2_lsu.scala 246:46] + dccm_ctl.io.lsu_pkt_r.store_data_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_r.store_data_bypass_d @[el2_lsu.scala 246:46] + dccm_ctl.io.lsu_pkt_r.dma <= lsu_lsc_ctl.io.lsu_pkt_r.dma @[el2_lsu.scala 246:46] + dccm_ctl.io.lsu_pkt_r.unsign <= lsu_lsc_ctl.io.lsu_pkt_r.unsign @[el2_lsu.scala 246:46] + dccm_ctl.io.lsu_pkt_r.store <= lsu_lsc_ctl.io.lsu_pkt_r.store @[el2_lsu.scala 246:46] + dccm_ctl.io.lsu_pkt_r.load <= lsu_lsc_ctl.io.lsu_pkt_r.load @[el2_lsu.scala 246:46] + dccm_ctl.io.lsu_pkt_r.dword <= lsu_lsc_ctl.io.lsu_pkt_r.dword @[el2_lsu.scala 246:46] + dccm_ctl.io.lsu_pkt_r.word <= lsu_lsc_ctl.io.lsu_pkt_r.word @[el2_lsu.scala 246:46] + dccm_ctl.io.lsu_pkt_r.half <= lsu_lsc_ctl.io.lsu_pkt_r.half @[el2_lsu.scala 246:46] + dccm_ctl.io.lsu_pkt_r.by <= lsu_lsc_ctl.io.lsu_pkt_r.by @[el2_lsu.scala 246:46] + dccm_ctl.io.lsu_pkt_r.fast_int <= lsu_lsc_ctl.io.lsu_pkt_r.fast_int @[el2_lsu.scala 246:46] + dccm_ctl.io.addr_in_dccm_d <= lsu_lsc_ctl.io.addr_in_dccm_d @[el2_lsu.scala 247:46] + dccm_ctl.io.addr_in_dccm_m <= lsu_lsc_ctl.io.addr_in_dccm_m @[el2_lsu.scala 248:46] + dccm_ctl.io.addr_in_dccm_r <= lsu_lsc_ctl.io.addr_in_dccm_r @[el2_lsu.scala 249:46] + dccm_ctl.io.addr_in_pic_d <= lsu_lsc_ctl.io.addr_in_pic_d @[el2_lsu.scala 250:46] + dccm_ctl.io.addr_in_pic_m <= lsu_lsc_ctl.io.addr_in_pic_m @[el2_lsu.scala 251:46] + dccm_ctl.io.addr_in_pic_r <= lsu_lsc_ctl.io.addr_in_pic_r @[el2_lsu.scala 252:46] + dccm_ctl.io.lsu_raw_fwd_lo_r <= lsu_raw_fwd_lo_r @[el2_lsu.scala 253:46] + dccm_ctl.io.lsu_raw_fwd_hi_r <= lsu_raw_fwd_hi_r @[el2_lsu.scala 254:46] + dccm_ctl.io.lsu_commit_r <= lsu_lsc_ctl.io.lsu_commit_r @[el2_lsu.scala 255:46] + dccm_ctl.io.lsu_addr_d <= lsu_lsc_ctl.io.lsu_addr_d @[el2_lsu.scala 256:46] + dccm_ctl.io.lsu_addr_m <= lsu_lsc_ctl.io.lsu_addr_m @[el2_lsu.scala 257:46] + dccm_ctl.io.lsu_addr_r <= lsu_lsc_ctl.io.lsu_addr_r @[el2_lsu.scala 258:46] + dccm_ctl.io.end_addr_d <= lsu_lsc_ctl.io.end_addr_d @[el2_lsu.scala 259:46] + dccm_ctl.io.end_addr_m <= lsu_lsc_ctl.io.end_addr_m @[el2_lsu.scala 260:46] + dccm_ctl.io.end_addr_r <= lsu_lsc_ctl.io.end_addr_r @[el2_lsu.scala 261:46] + dccm_ctl.io.stbuf_reqvld_any <= stbuf.io.stbuf_reqvld_any @[el2_lsu.scala 262:46] + dccm_ctl.io.stbuf_addr_any <= stbuf.io.stbuf_addr_any @[el2_lsu.scala 263:46] + dccm_ctl.io.stbuf_data_any <= stbuf.io.stbuf_data_any @[el2_lsu.scala 264:46] + dccm_ctl.io.stbuf_ecc_any <= ecc.io.stbuf_ecc_any @[el2_lsu.scala 265:46] + dccm_ctl.io.stbuf_fwddata_hi_m <= stbuf.io.stbuf_fwddata_hi_m @[el2_lsu.scala 266:46] + dccm_ctl.io.stbuf_fwddata_lo_m <= stbuf.io.stbuf_fwddata_lo_m @[el2_lsu.scala 267:46] + dccm_ctl.io.stbuf_fwdbyteen_lo_m <= stbuf.io.stbuf_fwdbyteen_lo_m @[el2_lsu.scala 268:46] + dccm_ctl.io.stbuf_fwdbyteen_hi_m <= stbuf.io.stbuf_fwdbyteen_hi_m @[el2_lsu.scala 269:46] + dccm_ctl.io.lsu_double_ecc_error_r <= ecc.io.lsu_double_ecc_error_r @[el2_lsu.scala 270:46] + dccm_ctl.io.single_ecc_error_hi_r <= ecc.io.single_ecc_error_hi_r @[el2_lsu.scala 271:46] + dccm_ctl.io.single_ecc_error_lo_r <= ecc.io.single_ecc_error_lo_r @[el2_lsu.scala 272:46] + dccm_ctl.io.sec_data_hi_r <= ecc.io.sec_data_hi_r @[el2_lsu.scala 273:46] + dccm_ctl.io.sec_data_lo_r <= ecc.io.sec_data_lo_r @[el2_lsu.scala 274:46] + dccm_ctl.io.sec_data_hi_r_ff <= ecc.io.sec_data_hi_r_ff @[el2_lsu.scala 275:46] + dccm_ctl.io.sec_data_lo_r_ff <= ecc.io.sec_data_lo_r_ff @[el2_lsu.scala 276:46] + dccm_ctl.io.sec_data_ecc_hi_r_ff <= ecc.io.sec_data_ecc_hi_r_ff @[el2_lsu.scala 277:46] + dccm_ctl.io.sec_data_ecc_lo_r_ff <= ecc.io.sec_data_ecc_lo_r_ff @[el2_lsu.scala 278:46] + dccm_ctl.io.lsu_double_ecc_error_m <= ecc.io.lsu_double_ecc_error_m @[el2_lsu.scala 279:46] + dccm_ctl.io.sec_data_hi_m <= ecc.io.sec_data_hi_m @[el2_lsu.scala 280:46] + dccm_ctl.io.sec_data_lo_m <= ecc.io.sec_data_lo_m @[el2_lsu.scala 281:46] + dccm_ctl.io.store_data_m <= lsu_lsc_ctl.io.store_data_m @[el2_lsu.scala 282:46] + dccm_ctl.io.dma_dccm_wen <= dma_dccm_wen @[el2_lsu.scala 283:46] + dccm_ctl.io.dma_pic_wen <= dma_pic_wen @[el2_lsu.scala 284:46] + dccm_ctl.io.dma_mem_tag_m <= dma_mem_tag_m @[el2_lsu.scala 285:46] + dccm_ctl.io.dma_mem_addr <= io.dma_mem_addr @[el2_lsu.scala 286:46] + dccm_ctl.io.dma_mem_wdata <= io.dma_mem_wdata @[el2_lsu.scala 287:46] + dccm_ctl.io.dma_dccm_wdata_lo <= dma_dccm_wdata_lo @[el2_lsu.scala 288:46] + dccm_ctl.io.dma_dccm_wdata_hi <= dma_dccm_wdata_hi @[el2_lsu.scala 289:46] + dccm_ctl.io.dma_dccm_wdata_ecc_hi <= ecc.io.dma_dccm_wdata_ecc_hi @[el2_lsu.scala 290:46] + dccm_ctl.io.dma_dccm_wdata_ecc_lo <= ecc.io.dma_dccm_wdata_ecc_lo @[el2_lsu.scala 291:46] + dccm_ctl.io.dccm_rd_data_lo <= io.dccm_rd_data_lo @[el2_lsu.scala 292:46] + dccm_ctl.io.dccm_rd_data_hi <= io.dccm_rd_data_hi @[el2_lsu.scala 293:46] + dccm_ctl.io.picm_rd_data <= io.picm_rd_data @[el2_lsu.scala 294:46] + dccm_ctl.io.scan_mode <= io.scan_mode @[el2_lsu.scala 295:46] + io.dccm_dma_rvalid <= dccm_ctl.io.dccm_dma_rvalid @[el2_lsu.scala 297:49] + io.dccm_dma_ecc_error <= dccm_ctl.io.dccm_dma_ecc_error @[el2_lsu.scala 298:49] + io.dccm_dma_rtag <= dccm_ctl.io.dccm_dma_rtag @[el2_lsu.scala 299:49] + io.dccm_dma_rdata <= dccm_ctl.io.dccm_dma_rdata @[el2_lsu.scala 300:49] + io.dccm_wren <= dccm_ctl.io.dccm_wren @[el2_lsu.scala 301:49] + io.dccm_rden <= dccm_ctl.io.dccm_rden @[el2_lsu.scala 302:49] + io.dccm_wr_addr_lo <= dccm_ctl.io.dccm_wr_addr_lo @[el2_lsu.scala 303:49] + io.dccm_wr_data_lo <= dccm_ctl.io.dccm_wr_data_lo @[el2_lsu.scala 304:49] + io.dccm_rd_addr_lo <= dccm_ctl.io.dccm_rd_addr_lo @[el2_lsu.scala 305:49] + io.dccm_wr_addr_hi <= dccm_ctl.io.dccm_wr_addr_hi @[el2_lsu.scala 306:49] + io.dccm_wr_data_hi <= dccm_ctl.io.dccm_wr_data_hi @[el2_lsu.scala 307:49] + io.dccm_rd_addr_hi <= dccm_ctl.io.dccm_rd_addr_hi @[el2_lsu.scala 308:49] + io.picm_wren <= dccm_ctl.io.picm_wren @[el2_lsu.scala 309:49] + io.picm_rden <= dccm_ctl.io.picm_rden @[el2_lsu.scala 310:49] + io.picm_mken <= dccm_ctl.io.picm_mken @[el2_lsu.scala 311:49] + io.picm_rdaddr <= dccm_ctl.io.picm_rdaddr @[el2_lsu.scala 312:49] + io.picm_wraddr <= dccm_ctl.io.picm_wraddr @[el2_lsu.scala 313:49] + io.picm_wr_data <= dccm_ctl.io.picm_wr_data @[el2_lsu.scala 314:49] + stbuf.io.lsu_c1_m_clk <= clkdomain.io.lsu_c1_m_clk @[el2_lsu.scala 317:49] + stbuf.io.lsu_c1_r_clk <= clkdomain.io.lsu_c1_m_clk @[el2_lsu.scala 318:48] + stbuf.io.lsu_stbuf_c1_clk <= clkdomain.io.lsu_stbuf_c1_clk @[el2_lsu.scala 319:54] + stbuf.io.lsu_free_c2_clk <= clkdomain.io.lsu_free_c2_clk @[el2_lsu.scala 320:54] + stbuf.io.lsu_pkt_m.valid <= lsu_lsc_ctl.io.lsu_pkt_m.valid @[el2_lsu.scala 321:48] + stbuf.io.lsu_pkt_m.store_data_bypass_m <= lsu_lsc_ctl.io.lsu_pkt_m.store_data_bypass_m @[el2_lsu.scala 321:48] + stbuf.io.lsu_pkt_m.load_ldst_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_m.load_ldst_bypass_d @[el2_lsu.scala 321:48] + stbuf.io.lsu_pkt_m.store_data_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_m.store_data_bypass_d @[el2_lsu.scala 321:48] + stbuf.io.lsu_pkt_m.dma <= lsu_lsc_ctl.io.lsu_pkt_m.dma @[el2_lsu.scala 321:48] + stbuf.io.lsu_pkt_m.unsign <= lsu_lsc_ctl.io.lsu_pkt_m.unsign @[el2_lsu.scala 321:48] + stbuf.io.lsu_pkt_m.store <= lsu_lsc_ctl.io.lsu_pkt_m.store @[el2_lsu.scala 321:48] + stbuf.io.lsu_pkt_m.load <= lsu_lsc_ctl.io.lsu_pkt_m.load @[el2_lsu.scala 321:48] + stbuf.io.lsu_pkt_m.dword <= lsu_lsc_ctl.io.lsu_pkt_m.dword @[el2_lsu.scala 321:48] + stbuf.io.lsu_pkt_m.word <= lsu_lsc_ctl.io.lsu_pkt_m.word @[el2_lsu.scala 321:48] + stbuf.io.lsu_pkt_m.half <= lsu_lsc_ctl.io.lsu_pkt_m.half @[el2_lsu.scala 321:48] + stbuf.io.lsu_pkt_m.by <= lsu_lsc_ctl.io.lsu_pkt_m.by @[el2_lsu.scala 321:48] + stbuf.io.lsu_pkt_m.fast_int <= lsu_lsc_ctl.io.lsu_pkt_m.fast_int @[el2_lsu.scala 321:48] + stbuf.io.lsu_pkt_r.valid <= lsu_lsc_ctl.io.lsu_pkt_r.valid @[el2_lsu.scala 322:48] + stbuf.io.lsu_pkt_r.store_data_bypass_m <= lsu_lsc_ctl.io.lsu_pkt_r.store_data_bypass_m @[el2_lsu.scala 322:48] + stbuf.io.lsu_pkt_r.load_ldst_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_r.load_ldst_bypass_d @[el2_lsu.scala 322:48] + stbuf.io.lsu_pkt_r.store_data_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_r.store_data_bypass_d @[el2_lsu.scala 322:48] + stbuf.io.lsu_pkt_r.dma <= lsu_lsc_ctl.io.lsu_pkt_r.dma @[el2_lsu.scala 322:48] + stbuf.io.lsu_pkt_r.unsign <= lsu_lsc_ctl.io.lsu_pkt_r.unsign @[el2_lsu.scala 322:48] + stbuf.io.lsu_pkt_r.store <= lsu_lsc_ctl.io.lsu_pkt_r.store @[el2_lsu.scala 322:48] + stbuf.io.lsu_pkt_r.load <= lsu_lsc_ctl.io.lsu_pkt_r.load @[el2_lsu.scala 322:48] + stbuf.io.lsu_pkt_r.dword <= lsu_lsc_ctl.io.lsu_pkt_r.dword @[el2_lsu.scala 322:48] + stbuf.io.lsu_pkt_r.word <= lsu_lsc_ctl.io.lsu_pkt_r.word @[el2_lsu.scala 322:48] + stbuf.io.lsu_pkt_r.half <= lsu_lsc_ctl.io.lsu_pkt_r.half @[el2_lsu.scala 322:48] + stbuf.io.lsu_pkt_r.by <= lsu_lsc_ctl.io.lsu_pkt_r.by @[el2_lsu.scala 322:48] + stbuf.io.lsu_pkt_r.fast_int <= lsu_lsc_ctl.io.lsu_pkt_r.fast_int @[el2_lsu.scala 322:48] + stbuf.io.store_stbuf_reqvld_r <= store_stbuf_reqvld_r @[el2_lsu.scala 323:48] + stbuf.io.lsu_commit_r <= lsu_lsc_ctl.io.lsu_commit_r @[el2_lsu.scala 324:49] + stbuf.io.dec_lsu_valid_raw_d <= io.dec_lsu_valid_raw_d @[el2_lsu.scala 325:49] + stbuf.io.store_data_hi_r <= dccm_ctl.io.store_data_hi_r @[el2_lsu.scala 326:62] + stbuf.io.store_data_lo_r <= dccm_ctl.io.store_data_lo_r @[el2_lsu.scala 327:62] + stbuf.io.store_datafn_hi_r <= dccm_ctl.io.store_datafn_hi_r @[el2_lsu.scala 328:49] + stbuf.io.store_datafn_lo_r <= dccm_ctl.io.store_datafn_lo_r @[el2_lsu.scala 329:56] + stbuf.io.lsu_stbuf_commit_any <= dccm_ctl.io.lsu_stbuf_commit_any @[el2_lsu.scala 330:52] + stbuf.io.lsu_addr_d <= lsu_lsc_ctl.io.lsu_addr_d @[el2_lsu.scala 331:64] + stbuf.io.lsu_addr_m <= lsu_lsc_ctl.io.lsu_addr_m @[el2_lsu.scala 332:64] + stbuf.io.lsu_addr_r <= lsu_lsc_ctl.io.lsu_addr_r @[el2_lsu.scala 333:64] + stbuf.io.end_addr_d <= lsu_lsc_ctl.io.end_addr_d @[el2_lsu.scala 334:64] + stbuf.io.end_addr_m <= lsu_lsc_ctl.io.end_addr_m @[el2_lsu.scala 335:64] + stbuf.io.end_addr_r <= lsu_lsc_ctl.io.end_addr_r @[el2_lsu.scala 336:64] + stbuf.io.addr_in_dccm_m <= lsu_lsc_ctl.io.addr_in_dccm_m @[el2_lsu.scala 337:49] + stbuf.io.addr_in_dccm_r <= lsu_lsc_ctl.io.addr_in_dccm_r @[el2_lsu.scala 338:56] + stbuf.io.lsu_cmpen_m <= lsu_cmpen_m @[el2_lsu.scala 339:54] + stbuf.io.scan_mode <= io.scan_mode @[el2_lsu.scala 340:49] + ecc.io.lsu_c2_r_clk <= clkdomain.io.lsu_c2_r_clk @[el2_lsu.scala 344:52] + ecc.io.lsu_pkt_m.valid <= lsu_lsc_ctl.io.lsu_pkt_m.valid @[el2_lsu.scala 345:52] + ecc.io.lsu_pkt_m.store_data_bypass_m <= lsu_lsc_ctl.io.lsu_pkt_m.store_data_bypass_m @[el2_lsu.scala 345:52] + ecc.io.lsu_pkt_m.load_ldst_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_m.load_ldst_bypass_d @[el2_lsu.scala 345:52] + ecc.io.lsu_pkt_m.store_data_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_m.store_data_bypass_d @[el2_lsu.scala 345:52] + ecc.io.lsu_pkt_m.dma <= lsu_lsc_ctl.io.lsu_pkt_m.dma @[el2_lsu.scala 345:52] + ecc.io.lsu_pkt_m.unsign <= lsu_lsc_ctl.io.lsu_pkt_m.unsign @[el2_lsu.scala 345:52] + ecc.io.lsu_pkt_m.store <= lsu_lsc_ctl.io.lsu_pkt_m.store @[el2_lsu.scala 345:52] + ecc.io.lsu_pkt_m.load <= lsu_lsc_ctl.io.lsu_pkt_m.load @[el2_lsu.scala 345:52] + ecc.io.lsu_pkt_m.dword <= lsu_lsc_ctl.io.lsu_pkt_m.dword @[el2_lsu.scala 345:52] + ecc.io.lsu_pkt_m.word <= lsu_lsc_ctl.io.lsu_pkt_m.word @[el2_lsu.scala 345:52] + ecc.io.lsu_pkt_m.half <= lsu_lsc_ctl.io.lsu_pkt_m.half @[el2_lsu.scala 345:52] + ecc.io.lsu_pkt_m.by <= lsu_lsc_ctl.io.lsu_pkt_m.by @[el2_lsu.scala 345:52] + ecc.io.lsu_pkt_m.fast_int <= lsu_lsc_ctl.io.lsu_pkt_m.fast_int @[el2_lsu.scala 345:52] + ecc.io.lsu_pkt_r.valid <= lsu_lsc_ctl.io.lsu_pkt_r.valid @[el2_lsu.scala 346:52] + ecc.io.lsu_pkt_r.store_data_bypass_m <= lsu_lsc_ctl.io.lsu_pkt_r.store_data_bypass_m @[el2_lsu.scala 346:52] + ecc.io.lsu_pkt_r.load_ldst_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_r.load_ldst_bypass_d @[el2_lsu.scala 346:52] + ecc.io.lsu_pkt_r.store_data_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_r.store_data_bypass_d @[el2_lsu.scala 346:52] + ecc.io.lsu_pkt_r.dma <= lsu_lsc_ctl.io.lsu_pkt_r.dma @[el2_lsu.scala 346:52] + ecc.io.lsu_pkt_r.unsign <= lsu_lsc_ctl.io.lsu_pkt_r.unsign @[el2_lsu.scala 346:52] + ecc.io.lsu_pkt_r.store <= lsu_lsc_ctl.io.lsu_pkt_r.store @[el2_lsu.scala 346:52] + ecc.io.lsu_pkt_r.load <= lsu_lsc_ctl.io.lsu_pkt_r.load @[el2_lsu.scala 346:52] + ecc.io.lsu_pkt_r.dword <= lsu_lsc_ctl.io.lsu_pkt_r.dword @[el2_lsu.scala 346:52] + ecc.io.lsu_pkt_r.word <= lsu_lsc_ctl.io.lsu_pkt_r.word @[el2_lsu.scala 346:52] + ecc.io.lsu_pkt_r.half <= lsu_lsc_ctl.io.lsu_pkt_r.half @[el2_lsu.scala 346:52] + ecc.io.lsu_pkt_r.by <= lsu_lsc_ctl.io.lsu_pkt_r.by @[el2_lsu.scala 346:52] + ecc.io.lsu_pkt_r.fast_int <= lsu_lsc_ctl.io.lsu_pkt_r.fast_int @[el2_lsu.scala 346:52] + ecc.io.stbuf_data_any <= stbuf.io.stbuf_data_any @[el2_lsu.scala 347:54] + ecc.io.dec_tlu_core_ecc_disable <= io.dec_tlu_core_ecc_disable @[el2_lsu.scala 348:50] + ecc.io.lsu_dccm_rden_r <= dccm_ctl.io.lsu_dccm_rden_r @[el2_lsu.scala 349:56] + ecc.io.addr_in_dccm_r <= lsu_lsc_ctl.io.addr_in_dccm_r @[el2_lsu.scala 350:50] + ecc.io.lsu_addr_r <= lsu_lsc_ctl.io.lsu_addr_r @[el2_lsu.scala 351:58] + ecc.io.end_addr_r <= lsu_lsc_ctl.io.end_addr_r @[el2_lsu.scala 352:58] + ecc.io.lsu_addr_m <= lsu_lsc_ctl.io.lsu_addr_m @[el2_lsu.scala 353:58] + ecc.io.end_addr_m <= lsu_lsc_ctl.io.end_addr_m @[el2_lsu.scala 354:58] + ecc.io.dccm_rdata_hi_r <= dccm_ctl.io.dccm_rdata_hi_r @[el2_lsu.scala 355:54] + ecc.io.dccm_rdata_lo_r <= dccm_ctl.io.dccm_rdata_lo_r @[el2_lsu.scala 356:54] + ecc.io.dccm_rdata_hi_m <= dccm_ctl.io.dccm_rdata_hi_m @[el2_lsu.scala 357:54] + ecc.io.dccm_rdata_lo_m <= dccm_ctl.io.dccm_rdata_lo_m @[el2_lsu.scala 358:54] + ecc.io.dccm_data_ecc_hi_r <= dccm_ctl.io.dccm_data_ecc_hi_r @[el2_lsu.scala 359:50] + ecc.io.dccm_data_ecc_lo_r <= dccm_ctl.io.dccm_data_ecc_lo_r @[el2_lsu.scala 360:50] + ecc.io.dccm_data_ecc_hi_m <= dccm_ctl.io.dccm_data_ecc_hi_m @[el2_lsu.scala 361:50] + ecc.io.dccm_data_ecc_lo_m <= dccm_ctl.io.dccm_data_ecc_lo_m @[el2_lsu.scala 362:50] + ecc.io.ld_single_ecc_error_r <= dccm_ctl.io.ld_single_ecc_error_r @[el2_lsu.scala 363:50] + ecc.io.ld_single_ecc_error_r_ff <= dccm_ctl.io.ld_single_ecc_error_r_ff @[el2_lsu.scala 364:50] + ecc.io.lsu_dccm_rden_m <= dccm_ctl.io.lsu_dccm_rden_m @[el2_lsu.scala 365:50] + ecc.io.addr_in_dccm_m <= lsu_lsc_ctl.io.addr_in_dccm_m @[el2_lsu.scala 366:50] + ecc.io.dma_dccm_wen <= dma_dccm_wen @[el2_lsu.scala 367:50] + ecc.io.dma_dccm_wdata_lo <= dma_dccm_wdata_lo @[el2_lsu.scala 368:50] + ecc.io.dma_dccm_wdata_hi <= dma_dccm_wdata_hi @[el2_lsu.scala 369:50] + ecc.io.scan_mode <= io.scan_mode @[el2_lsu.scala 370:50] + trigger.io.trigger_pkt_any[0].tdata2 <= io.trigger_pkt_any[0].tdata2 @[el2_lsu.scala 374:50] + trigger.io.trigger_pkt_any[0].m <= io.trigger_pkt_any[0].m @[el2_lsu.scala 374:50] + trigger.io.trigger_pkt_any[0].execute <= io.trigger_pkt_any[0].execute @[el2_lsu.scala 374:50] + trigger.io.trigger_pkt_any[0].load <= io.trigger_pkt_any[0].load @[el2_lsu.scala 374:50] + trigger.io.trigger_pkt_any[0].store <= io.trigger_pkt_any[0].store @[el2_lsu.scala 374:50] + trigger.io.trigger_pkt_any[0].match_ <= io.trigger_pkt_any[0].match_ @[el2_lsu.scala 374:50] + trigger.io.trigger_pkt_any[0].select <= io.trigger_pkt_any[0].select @[el2_lsu.scala 374:50] + trigger.io.trigger_pkt_any[1].tdata2 <= io.trigger_pkt_any[1].tdata2 @[el2_lsu.scala 374:50] + trigger.io.trigger_pkt_any[1].m <= io.trigger_pkt_any[1].m @[el2_lsu.scala 374:50] + trigger.io.trigger_pkt_any[1].execute <= io.trigger_pkt_any[1].execute @[el2_lsu.scala 374:50] + trigger.io.trigger_pkt_any[1].load <= io.trigger_pkt_any[1].load @[el2_lsu.scala 374:50] + trigger.io.trigger_pkt_any[1].store <= io.trigger_pkt_any[1].store @[el2_lsu.scala 374:50] + trigger.io.trigger_pkt_any[1].match_ <= io.trigger_pkt_any[1].match_ @[el2_lsu.scala 374:50] + trigger.io.trigger_pkt_any[1].select <= io.trigger_pkt_any[1].select @[el2_lsu.scala 374:50] + trigger.io.trigger_pkt_any[2].tdata2 <= io.trigger_pkt_any[2].tdata2 @[el2_lsu.scala 374:50] + trigger.io.trigger_pkt_any[2].m <= io.trigger_pkt_any[2].m @[el2_lsu.scala 374:50] + trigger.io.trigger_pkt_any[2].execute <= io.trigger_pkt_any[2].execute @[el2_lsu.scala 374:50] + trigger.io.trigger_pkt_any[2].load <= io.trigger_pkt_any[2].load @[el2_lsu.scala 374:50] + trigger.io.trigger_pkt_any[2].store <= io.trigger_pkt_any[2].store @[el2_lsu.scala 374:50] + trigger.io.trigger_pkt_any[2].match_ <= io.trigger_pkt_any[2].match_ @[el2_lsu.scala 374:50] + trigger.io.trigger_pkt_any[2].select <= io.trigger_pkt_any[2].select @[el2_lsu.scala 374:50] + trigger.io.trigger_pkt_any[3].tdata2 <= io.trigger_pkt_any[3].tdata2 @[el2_lsu.scala 374:50] + trigger.io.trigger_pkt_any[3].m <= io.trigger_pkt_any[3].m @[el2_lsu.scala 374:50] + trigger.io.trigger_pkt_any[3].execute <= io.trigger_pkt_any[3].execute @[el2_lsu.scala 374:50] + trigger.io.trigger_pkt_any[3].load <= io.trigger_pkt_any[3].load @[el2_lsu.scala 374:50] + trigger.io.trigger_pkt_any[3].store <= io.trigger_pkt_any[3].store @[el2_lsu.scala 374:50] + trigger.io.trigger_pkt_any[3].match_ <= io.trigger_pkt_any[3].match_ @[el2_lsu.scala 374:50] + trigger.io.trigger_pkt_any[3].select <= io.trigger_pkt_any[3].select @[el2_lsu.scala 374:50] + trigger.io.lsu_pkt_m.valid <= lsu_lsc_ctl.io.lsu_pkt_m.valid @[el2_lsu.scala 375:50] + trigger.io.lsu_pkt_m.store_data_bypass_m <= lsu_lsc_ctl.io.lsu_pkt_m.store_data_bypass_m @[el2_lsu.scala 375:50] + trigger.io.lsu_pkt_m.load_ldst_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_m.load_ldst_bypass_d @[el2_lsu.scala 375:50] + trigger.io.lsu_pkt_m.store_data_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_m.store_data_bypass_d @[el2_lsu.scala 375:50] + trigger.io.lsu_pkt_m.dma <= lsu_lsc_ctl.io.lsu_pkt_m.dma @[el2_lsu.scala 375:50] + trigger.io.lsu_pkt_m.unsign <= lsu_lsc_ctl.io.lsu_pkt_m.unsign @[el2_lsu.scala 375:50] + trigger.io.lsu_pkt_m.store <= lsu_lsc_ctl.io.lsu_pkt_m.store @[el2_lsu.scala 375:50] + trigger.io.lsu_pkt_m.load <= lsu_lsc_ctl.io.lsu_pkt_m.load @[el2_lsu.scala 375:50] + trigger.io.lsu_pkt_m.dword <= lsu_lsc_ctl.io.lsu_pkt_m.dword @[el2_lsu.scala 375:50] + trigger.io.lsu_pkt_m.word <= lsu_lsc_ctl.io.lsu_pkt_m.word @[el2_lsu.scala 375:50] + trigger.io.lsu_pkt_m.half <= lsu_lsc_ctl.io.lsu_pkt_m.half @[el2_lsu.scala 375:50] + trigger.io.lsu_pkt_m.by <= lsu_lsc_ctl.io.lsu_pkt_m.by @[el2_lsu.scala 375:50] + trigger.io.lsu_pkt_m.fast_int <= lsu_lsc_ctl.io.lsu_pkt_m.fast_int @[el2_lsu.scala 375:50] + trigger.io.lsu_addr_m <= lsu_lsc_ctl.io.lsu_addr_m @[el2_lsu.scala 376:50] + trigger.io.store_data_m <= lsu_lsc_ctl.io.store_data_m @[el2_lsu.scala 377:50] + io.lsu_trigger_match_m <= trigger.io.lsu_trigger_match_m @[el2_lsu.scala 379:50] + clkdomain.io.free_clk <= io.free_clk @[el2_lsu.scala 383:50] + clkdomain.io.clk_override <= io.clk_override @[el2_lsu.scala 384:50] + clkdomain.io.addr_in_dccm_m <= lsu_lsc_ctl.io.addr_in_dccm_m @[el2_lsu.scala 385:50] + clkdomain.io.dma_dccm_req <= io.dma_dccm_req @[el2_lsu.scala 386:50] + clkdomain.io.ldst_stbuf_reqvld_r <= stbuf.io.ldst_stbuf_reqvld_r @[el2_lsu.scala 387:50] + clkdomain.io.stbuf_reqvld_any <= stbuf.io.stbuf_reqvld_any @[el2_lsu.scala 388:50] + clkdomain.io.stbuf_reqvld_flushed_any <= stbuf.io.stbuf_reqvld_flushed_any @[el2_lsu.scala 389:50] + clkdomain.io.lsu_busreq_r <= bus_intf.io.lsu_busreq_r @[el2_lsu.scala 390:50] + clkdomain.io.lsu_bus_buffer_pend_any <= bus_intf.io.lsu_bus_buffer_pend_any @[el2_lsu.scala 391:50] + clkdomain.io.lsu_bus_buffer_empty_any <= bus_intf.io.lsu_bus_buffer_empty_any @[el2_lsu.scala 392:50] + clkdomain.io.lsu_stbuf_empty_any <= stbuf.io.lsu_stbuf_empty_any @[el2_lsu.scala 393:50] + clkdomain.io.lsu_bus_clk_en <= io.lsu_bus_clk_en @[el2_lsu.scala 394:50] + clkdomain.io.lsu_p.valid <= io.lsu_p.valid @[el2_lsu.scala 395:50] + clkdomain.io.lsu_p.store_data_bypass_m <= io.lsu_p.store_data_bypass_m @[el2_lsu.scala 395:50] + clkdomain.io.lsu_p.load_ldst_bypass_d <= io.lsu_p.load_ldst_bypass_d @[el2_lsu.scala 395:50] + clkdomain.io.lsu_p.store_data_bypass_d <= io.lsu_p.store_data_bypass_d @[el2_lsu.scala 395:50] + clkdomain.io.lsu_p.dma <= io.lsu_p.dma @[el2_lsu.scala 395:50] + clkdomain.io.lsu_p.unsign <= io.lsu_p.unsign @[el2_lsu.scala 395:50] + clkdomain.io.lsu_p.store <= io.lsu_p.store @[el2_lsu.scala 395:50] + clkdomain.io.lsu_p.load <= io.lsu_p.load @[el2_lsu.scala 395:50] + clkdomain.io.lsu_p.dword <= io.lsu_p.dword @[el2_lsu.scala 395:50] + clkdomain.io.lsu_p.word <= io.lsu_p.word @[el2_lsu.scala 395:50] + clkdomain.io.lsu_p.half <= io.lsu_p.half @[el2_lsu.scala 395:50] + clkdomain.io.lsu_p.by <= io.lsu_p.by @[el2_lsu.scala 395:50] + clkdomain.io.lsu_p.fast_int <= io.lsu_p.fast_int @[el2_lsu.scala 395:50] + clkdomain.io.lsu_pkt_d.valid <= lsu_lsc_ctl.io.lsu_pkt_d.valid @[el2_lsu.scala 396:50] + clkdomain.io.lsu_pkt_d.store_data_bypass_m <= lsu_lsc_ctl.io.lsu_pkt_d.store_data_bypass_m @[el2_lsu.scala 396:50] + clkdomain.io.lsu_pkt_d.load_ldst_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_d.load_ldst_bypass_d @[el2_lsu.scala 396:50] + clkdomain.io.lsu_pkt_d.store_data_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_d.store_data_bypass_d @[el2_lsu.scala 396:50] + clkdomain.io.lsu_pkt_d.dma <= lsu_lsc_ctl.io.lsu_pkt_d.dma @[el2_lsu.scala 396:50] + clkdomain.io.lsu_pkt_d.unsign <= lsu_lsc_ctl.io.lsu_pkt_d.unsign @[el2_lsu.scala 396:50] + clkdomain.io.lsu_pkt_d.store <= lsu_lsc_ctl.io.lsu_pkt_d.store @[el2_lsu.scala 396:50] + clkdomain.io.lsu_pkt_d.load <= lsu_lsc_ctl.io.lsu_pkt_d.load @[el2_lsu.scala 396:50] + clkdomain.io.lsu_pkt_d.dword <= lsu_lsc_ctl.io.lsu_pkt_d.dword @[el2_lsu.scala 396:50] + clkdomain.io.lsu_pkt_d.word <= lsu_lsc_ctl.io.lsu_pkt_d.word @[el2_lsu.scala 396:50] + clkdomain.io.lsu_pkt_d.half <= lsu_lsc_ctl.io.lsu_pkt_d.half @[el2_lsu.scala 396:50] + clkdomain.io.lsu_pkt_d.by <= lsu_lsc_ctl.io.lsu_pkt_d.by @[el2_lsu.scala 396:50] + clkdomain.io.lsu_pkt_d.fast_int <= lsu_lsc_ctl.io.lsu_pkt_d.fast_int @[el2_lsu.scala 396:50] + clkdomain.io.lsu_pkt_m.valid <= lsu_lsc_ctl.io.lsu_pkt_m.valid @[el2_lsu.scala 397:50] + clkdomain.io.lsu_pkt_m.store_data_bypass_m <= lsu_lsc_ctl.io.lsu_pkt_m.store_data_bypass_m @[el2_lsu.scala 397:50] + clkdomain.io.lsu_pkt_m.load_ldst_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_m.load_ldst_bypass_d @[el2_lsu.scala 397:50] + clkdomain.io.lsu_pkt_m.store_data_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_m.store_data_bypass_d @[el2_lsu.scala 397:50] + clkdomain.io.lsu_pkt_m.dma <= lsu_lsc_ctl.io.lsu_pkt_m.dma @[el2_lsu.scala 397:50] + clkdomain.io.lsu_pkt_m.unsign <= lsu_lsc_ctl.io.lsu_pkt_m.unsign @[el2_lsu.scala 397:50] + clkdomain.io.lsu_pkt_m.store <= lsu_lsc_ctl.io.lsu_pkt_m.store @[el2_lsu.scala 397:50] + clkdomain.io.lsu_pkt_m.load <= lsu_lsc_ctl.io.lsu_pkt_m.load @[el2_lsu.scala 397:50] + clkdomain.io.lsu_pkt_m.dword <= lsu_lsc_ctl.io.lsu_pkt_m.dword @[el2_lsu.scala 397:50] + clkdomain.io.lsu_pkt_m.word <= lsu_lsc_ctl.io.lsu_pkt_m.word @[el2_lsu.scala 397:50] + clkdomain.io.lsu_pkt_m.half <= lsu_lsc_ctl.io.lsu_pkt_m.half @[el2_lsu.scala 397:50] + clkdomain.io.lsu_pkt_m.by <= lsu_lsc_ctl.io.lsu_pkt_m.by @[el2_lsu.scala 397:50] + clkdomain.io.lsu_pkt_m.fast_int <= lsu_lsc_ctl.io.lsu_pkt_m.fast_int @[el2_lsu.scala 397:50] + clkdomain.io.lsu_pkt_r.valid <= lsu_lsc_ctl.io.lsu_pkt_r.valid @[el2_lsu.scala 398:50] + clkdomain.io.lsu_pkt_r.store_data_bypass_m <= lsu_lsc_ctl.io.lsu_pkt_r.store_data_bypass_m @[el2_lsu.scala 398:50] + clkdomain.io.lsu_pkt_r.load_ldst_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_r.load_ldst_bypass_d @[el2_lsu.scala 398:50] + clkdomain.io.lsu_pkt_r.store_data_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_r.store_data_bypass_d @[el2_lsu.scala 398:50] + clkdomain.io.lsu_pkt_r.dma <= lsu_lsc_ctl.io.lsu_pkt_r.dma @[el2_lsu.scala 398:50] + clkdomain.io.lsu_pkt_r.unsign <= lsu_lsc_ctl.io.lsu_pkt_r.unsign @[el2_lsu.scala 398:50] + clkdomain.io.lsu_pkt_r.store <= lsu_lsc_ctl.io.lsu_pkt_r.store @[el2_lsu.scala 398:50] + clkdomain.io.lsu_pkt_r.load <= lsu_lsc_ctl.io.lsu_pkt_r.load @[el2_lsu.scala 398:50] + clkdomain.io.lsu_pkt_r.dword <= lsu_lsc_ctl.io.lsu_pkt_r.dword @[el2_lsu.scala 398:50] + clkdomain.io.lsu_pkt_r.word <= lsu_lsc_ctl.io.lsu_pkt_r.word @[el2_lsu.scala 398:50] + clkdomain.io.lsu_pkt_r.half <= lsu_lsc_ctl.io.lsu_pkt_r.half @[el2_lsu.scala 398:50] + clkdomain.io.lsu_pkt_r.by <= lsu_lsc_ctl.io.lsu_pkt_r.by @[el2_lsu.scala 398:50] + clkdomain.io.lsu_pkt_r.fast_int <= lsu_lsc_ctl.io.lsu_pkt_r.fast_int @[el2_lsu.scala 398:50] + clkdomain.io.scan_mode <= io.scan_mode @[el2_lsu.scala 399:50] + bus_intf.io.scan_mode <= io.scan_mode @[el2_lsu.scala 403:49] + bus_intf.io.dec_tlu_external_ldfwd_disable <= io.dec_tlu_external_ldfwd_disable @[el2_lsu.scala 404:49] + bus_intf.io.dec_tlu_wb_coalescing_disable <= io.dec_tlu_wb_coalescing_disable @[el2_lsu.scala 405:49] + bus_intf.io.dec_tlu_sideeffect_posted_disable <= io.dec_tlu_sideeffect_posted_disable @[el2_lsu.scala 406:49] + bus_intf.io.lsu_c1_m_clk <= clkdomain.io.lsu_c1_m_clk @[el2_lsu.scala 407:49] + bus_intf.io.lsu_c1_r_clk <= clkdomain.io.lsu_c1_r_clk @[el2_lsu.scala 408:49] + bus_intf.io.lsu_c2_r_clk <= clkdomain.io.lsu_c2_r_clk @[el2_lsu.scala 409:49] + bus_intf.io.lsu_bus_ibuf_c1_clk <= clkdomain.io.lsu_bus_ibuf_c1_clk @[el2_lsu.scala 410:49] + bus_intf.io.lsu_bus_obuf_c1_clk <= clkdomain.io.lsu_bus_obuf_c1_clk @[el2_lsu.scala 411:49] + bus_intf.io.lsu_bus_buf_c1_clk <= clkdomain.io.lsu_bus_buf_c1_clk @[el2_lsu.scala 412:49] + bus_intf.io.lsu_free_c2_clk <= clkdomain.io.lsu_free_c2_clk @[el2_lsu.scala 413:49] + bus_intf.io.free_clk <= io.free_clk @[el2_lsu.scala 414:49] + bus_intf.io.lsu_busm_clk <= clkdomain.io.lsu_busm_clk @[el2_lsu.scala 415:49] + bus_intf.io.dec_lsu_valid_raw_d <= io.dec_lsu_valid_raw_d @[el2_lsu.scala 416:49] + bus_intf.io.lsu_busreq_m <= lsu_busreq_m @[el2_lsu.scala 417:49] + bus_intf.io.lsu_addr_d <= lsu_lsc_ctl.io.lsu_addr_d @[el2_lsu.scala 418:49] + bus_intf.io.lsu_addr_m <= lsu_lsc_ctl.io.lsu_addr_m @[el2_lsu.scala 419:49] + bus_intf.io.lsu_addr_r <= lsu_lsc_ctl.io.lsu_addr_r @[el2_lsu.scala 420:49] + bus_intf.io.end_addr_d <= lsu_lsc_ctl.io.end_addr_d @[el2_lsu.scala 421:49] + bus_intf.io.end_addr_m <= lsu_lsc_ctl.io.end_addr_m @[el2_lsu.scala 422:49] + bus_intf.io.end_addr_r <= lsu_lsc_ctl.io.end_addr_r @[el2_lsu.scala 423:49] + bus_intf.io.store_data_r <= dccm_ctl.io.store_data_r @[el2_lsu.scala 424:52] + bus_intf.io.lsu_pkt_m.valid <= lsu_lsc_ctl.io.lsu_pkt_m.valid @[el2_lsu.scala 425:50] + bus_intf.io.lsu_pkt_m.store_data_bypass_m <= lsu_lsc_ctl.io.lsu_pkt_m.store_data_bypass_m @[el2_lsu.scala 425:50] + bus_intf.io.lsu_pkt_m.load_ldst_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_m.load_ldst_bypass_d @[el2_lsu.scala 425:50] + bus_intf.io.lsu_pkt_m.store_data_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_m.store_data_bypass_d @[el2_lsu.scala 425:50] + bus_intf.io.lsu_pkt_m.dma <= lsu_lsc_ctl.io.lsu_pkt_m.dma @[el2_lsu.scala 425:50] + bus_intf.io.lsu_pkt_m.unsign <= lsu_lsc_ctl.io.lsu_pkt_m.unsign @[el2_lsu.scala 425:50] + bus_intf.io.lsu_pkt_m.store <= lsu_lsc_ctl.io.lsu_pkt_m.store @[el2_lsu.scala 425:50] + bus_intf.io.lsu_pkt_m.load <= lsu_lsc_ctl.io.lsu_pkt_m.load @[el2_lsu.scala 425:50] + bus_intf.io.lsu_pkt_m.dword <= lsu_lsc_ctl.io.lsu_pkt_m.dword @[el2_lsu.scala 425:50] + bus_intf.io.lsu_pkt_m.word <= lsu_lsc_ctl.io.lsu_pkt_m.word @[el2_lsu.scala 425:50] + bus_intf.io.lsu_pkt_m.half <= lsu_lsc_ctl.io.lsu_pkt_m.half @[el2_lsu.scala 425:50] + bus_intf.io.lsu_pkt_m.by <= lsu_lsc_ctl.io.lsu_pkt_m.by @[el2_lsu.scala 425:50] + bus_intf.io.lsu_pkt_m.fast_int <= lsu_lsc_ctl.io.lsu_pkt_m.fast_int @[el2_lsu.scala 425:50] + bus_intf.io.lsu_pkt_r.valid <= lsu_lsc_ctl.io.lsu_pkt_r.valid @[el2_lsu.scala 426:50] + bus_intf.io.lsu_pkt_r.store_data_bypass_m <= lsu_lsc_ctl.io.lsu_pkt_r.store_data_bypass_m @[el2_lsu.scala 426:50] + bus_intf.io.lsu_pkt_r.load_ldst_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_r.load_ldst_bypass_d @[el2_lsu.scala 426:50] + bus_intf.io.lsu_pkt_r.store_data_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_r.store_data_bypass_d @[el2_lsu.scala 426:50] + bus_intf.io.lsu_pkt_r.dma <= lsu_lsc_ctl.io.lsu_pkt_r.dma @[el2_lsu.scala 426:50] + bus_intf.io.lsu_pkt_r.unsign <= lsu_lsc_ctl.io.lsu_pkt_r.unsign @[el2_lsu.scala 426:50] + bus_intf.io.lsu_pkt_r.store <= lsu_lsc_ctl.io.lsu_pkt_r.store @[el2_lsu.scala 426:50] + bus_intf.io.lsu_pkt_r.load <= lsu_lsc_ctl.io.lsu_pkt_r.load @[el2_lsu.scala 426:50] + bus_intf.io.lsu_pkt_r.dword <= lsu_lsc_ctl.io.lsu_pkt_r.dword @[el2_lsu.scala 426:50] + bus_intf.io.lsu_pkt_r.word <= lsu_lsc_ctl.io.lsu_pkt_r.word @[el2_lsu.scala 426:50] + bus_intf.io.lsu_pkt_r.half <= lsu_lsc_ctl.io.lsu_pkt_r.half @[el2_lsu.scala 426:50] + bus_intf.io.lsu_pkt_r.by <= lsu_lsc_ctl.io.lsu_pkt_r.by @[el2_lsu.scala 426:50] + bus_intf.io.lsu_pkt_r.fast_int <= lsu_lsc_ctl.io.lsu_pkt_r.fast_int @[el2_lsu.scala 426:50] + bus_intf.io.dec_tlu_force_halt <= io.dec_tlu_force_halt @[el2_lsu.scala 427:49] + bus_intf.io.lsu_commit_r <= lsu_lsc_ctl.io.lsu_commit_r @[el2_lsu.scala 428:49] + bus_intf.io.is_sideeffects_m <= lsu_lsc_ctl.io.is_sideeffects_m @[el2_lsu.scala 429:49] + bus_intf.io.flush_m_up <= io.dec_tlu_flush_lower_r @[el2_lsu.scala 430:49] + bus_intf.io.flush_r <= io.dec_tlu_i0_kill_writeb_r @[el2_lsu.scala 431:49] + io.lsu_imprecise_error_load_any <= bus_intf.io.lsu_imprecise_error_load_any @[el2_lsu.scala 434:49] + io.lsu_imprecise_error_store_any <= bus_intf.io.lsu_imprecise_error_store_any @[el2_lsu.scala 435:49] + io.lsu_imprecise_error_addr_any <= bus_intf.io.lsu_imprecise_error_addr_any @[el2_lsu.scala 436:49] + io.lsu_nonblock_load_valid_m <= bus_intf.io.lsu_nonblock_load_valid_m @[el2_lsu.scala 437:49] + io.lsu_nonblock_load_tag_m <= bus_intf.io.lsu_nonblock_load_tag_m @[el2_lsu.scala 438:49] + io.lsu_nonblock_load_inv_r <= bus_intf.io.lsu_nonblock_load_inv_r @[el2_lsu.scala 439:49] + io.lsu_nonblock_load_inv_tag_r <= bus_intf.io.lsu_nonblock_load_inv_tag_r @[el2_lsu.scala 440:49] + io.lsu_nonblock_load_data_valid <= bus_intf.io.lsu_nonblock_load_data_valid @[el2_lsu.scala 441:49] + io.lsu_nonblock_load_data_error <= bus_intf.io.lsu_nonblock_load_data_error @[el2_lsu.scala 442:49] + io.lsu_nonblock_load_data_tag <= bus_intf.io.lsu_nonblock_load_data_tag @[el2_lsu.scala 443:49] + io.lsu_nonblock_load_data <= bus_intf.io.lsu_nonblock_load_data @[el2_lsu.scala 444:49] + io.lsu_pmu_bus_trxn <= bus_intf.io.lsu_pmu_bus_trxn @[el2_lsu.scala 445:49] + io.lsu_pmu_bus_misaligned <= bus_intf.io.lsu_pmu_bus_misaligned @[el2_lsu.scala 446:49] + io.lsu_pmu_bus_error <= bus_intf.io.lsu_pmu_bus_error @[el2_lsu.scala 447:49] + io.lsu_pmu_bus_busy <= bus_intf.io.lsu_pmu_bus_busy @[el2_lsu.scala 448:49] + io.lsu_axi_awvalid <= bus_intf.io.lsu_axi_awvalid @[el2_lsu.scala 449:49] + bus_intf.io.lsu_axi_awready <= io.lsu_axi_awready @[el2_lsu.scala 450:49] + io.lsu_axi_awid <= bus_intf.io.lsu_axi_awid @[el2_lsu.scala 451:49] + io.lsu_axi_awaddr <= bus_intf.io.lsu_axi_awaddr @[el2_lsu.scala 452:49] + io.lsu_axi_awregion <= bus_intf.io.lsu_axi_awregion @[el2_lsu.scala 453:49] + io.lsu_axi_awlen <= bus_intf.io.lsu_axi_awlen @[el2_lsu.scala 454:49] + io.lsu_axi_awsize <= bus_intf.io.lsu_axi_awsize @[el2_lsu.scala 455:49] + io.lsu_axi_awburst <= bus_intf.io.lsu_axi_awburst @[el2_lsu.scala 456:49] + io.lsu_axi_awlock <= bus_intf.io.lsu_axi_awlock @[el2_lsu.scala 457:49] + io.lsu_axi_awcache <= bus_intf.io.lsu_axi_awcache @[el2_lsu.scala 458:49] + io.lsu_axi_awprot <= bus_intf.io.lsu_axi_awprot @[el2_lsu.scala 459:49] + io.lsu_axi_awqos <= bus_intf.io.lsu_axi_awqos @[el2_lsu.scala 460:49] + io.lsu_axi_wvalid <= bus_intf.io.lsu_axi_wvalid @[el2_lsu.scala 461:49] + bus_intf.io.lsu_axi_wready <= io.lsu_axi_wready @[el2_lsu.scala 462:49] + io.lsu_axi_wdata <= bus_intf.io.lsu_axi_wdata @[el2_lsu.scala 463:49] + io.lsu_axi_wstrb <= bus_intf.io.lsu_axi_wstrb @[el2_lsu.scala 464:49] + io.lsu_axi_wlast <= bus_intf.io.lsu_axi_wlast @[el2_lsu.scala 465:49] + bus_intf.io.lsu_axi_bvalid <= io.lsu_axi_bvalid @[el2_lsu.scala 466:49] + io.lsu_axi_bready <= bus_intf.io.lsu_axi_bready @[el2_lsu.scala 467:49] + bus_intf.io.lsu_axi_bresp <= io.lsu_axi_bresp @[el2_lsu.scala 468:49] + bus_intf.io.lsu_axi_bid <= io.lsu_axi_bid @[el2_lsu.scala 469:49] + io.lsu_axi_arvalid <= bus_intf.io.lsu_axi_arvalid @[el2_lsu.scala 470:49] + bus_intf.io.lsu_axi_arready <= io.lsu_axi_arready @[el2_lsu.scala 471:49] + io.lsu_axi_arid <= bus_intf.io.lsu_axi_arid @[el2_lsu.scala 472:49] + io.lsu_axi_araddr <= bus_intf.io.lsu_axi_araddr @[el2_lsu.scala 473:49] + io.lsu_axi_arregion <= bus_intf.io.lsu_axi_arregion @[el2_lsu.scala 474:49] + io.lsu_axi_arlen <= bus_intf.io.lsu_axi_arlen @[el2_lsu.scala 475:49] + io.lsu_axi_arsize <= bus_intf.io.lsu_axi_arsize @[el2_lsu.scala 476:49] + io.lsu_axi_arburst <= bus_intf.io.lsu_axi_arburst @[el2_lsu.scala 477:49] + io.lsu_axi_arlock <= bus_intf.io.lsu_axi_arlock @[el2_lsu.scala 478:49] + io.lsu_axi_arcache <= bus_intf.io.lsu_axi_arcache @[el2_lsu.scala 479:49] + io.lsu_axi_arprot <= bus_intf.io.lsu_axi_arprot @[el2_lsu.scala 480:49] + io.lsu_axi_arqos <= bus_intf.io.lsu_axi_arqos @[el2_lsu.scala 481:49] + bus_intf.io.lsu_axi_rvalid <= io.lsu_axi_rvalid @[el2_lsu.scala 482:49] + io.lsu_axi_rready <= bus_intf.io.lsu_axi_rready @[el2_lsu.scala 483:49] + bus_intf.io.lsu_axi_rid <= io.lsu_axi_rid @[el2_lsu.scala 484:49] + bus_intf.io.lsu_axi_rdata <= io.lsu_axi_rdata @[el2_lsu.scala 485:49] + bus_intf.io.lsu_axi_rresp <= io.lsu_axi_rresp @[el2_lsu.scala 486:49] + bus_intf.io.lsu_axi_rlast <= io.lsu_axi_rlast @[el2_lsu.scala 487:49] + bus_intf.io.lsu_bus_clk_en <= io.lsu_bus_clk_en @[el2_lsu.scala 488:49] + reg _T_52 : UInt, clkdomain.io.lsu_c1_m_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu.scala 490:67] + _T_52 <= io.dma_mem_tag @[el2_lsu.scala 490:67] + dma_mem_tag_m <= _T_52 @[el2_lsu.scala 490:57] + reg _T_53 : UInt<1>, clkdomain.io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu.scala 491:67] + _T_53 <= lsu_raw_fwd_hi_m @[el2_lsu.scala 491:67] + lsu_raw_fwd_hi_r <= _T_53 @[el2_lsu.scala 491:57] + reg _T_54 : UInt<1>, clkdomain.io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu.scala 492:67] + _T_54 <= lsu_raw_fwd_lo_m @[el2_lsu.scala 492:67] + lsu_raw_fwd_lo_r <= _T_54 @[el2_lsu.scala 492:57] + diff --git a/el2_lsu.v b/el2_lsu.v new file mode 100644 index 00000000..65f04bdb --- /dev/null +++ b/el2_lsu.v @@ -0,0 +1,11709 @@ +module el2_lsu_addrcheck( + input reset, + input io_lsu_c2_m_clk, + input [31:0] io_start_addr_d, + input [31:0] io_end_addr_d, + input io_lsu_pkt_d_fast_int, + input io_lsu_pkt_d_by, + input io_lsu_pkt_d_half, + input io_lsu_pkt_d_word, + input io_lsu_pkt_d_load, + input io_lsu_pkt_d_store, + input io_lsu_pkt_d_dma, + input io_lsu_pkt_d_valid, + input [31:0] io_dec_tlu_mrac_ff, + input [3:0] io_rs1_region_d, + output io_is_sideeffects_m, + output io_addr_in_dccm_d, + output io_addr_in_pic_d, + output io_addr_external_d, + output io_access_fault_d, + output io_misaligned_fault_d, + output [3:0] io_exc_mscause_d, + output io_fir_dccm_access_error_d, + output io_fir_nondccm_access_error_d +); +`ifdef RANDOMIZE_REG_INIT + reg [31:0] _RAND_0; +`endif // RANDOMIZE_REG_INIT + wire start_addr_in_dccm_region_d = io_start_addr_d[31:28] == 4'hf; // @[el2_lib.scala 494:49] + wire start_addr_in_dccm_d = io_start_addr_d[31:16] == 16'hf004; // @[el2_lib.scala 499:39] + wire end_addr_in_dccm_region_d = io_end_addr_d[31:28] == 4'hf; // @[el2_lib.scala 494:49] + wire end_addr_in_dccm_d = io_end_addr_d[31:16] == 16'hf004; // @[el2_lib.scala 499:39] + wire addr_in_iccm = io_start_addr_d[31:28] == 4'he; // @[el2_lsu_addrcheck.scala 42:45] + wire start_addr_in_pic_d = io_start_addr_d[31:15] == 17'h1e018; // @[el2_lib.scala 499:39] + wire end_addr_in_pic_d = io_end_addr_d[31:15] == 17'h1e018; // @[el2_lib.scala 499:39] + wire start_addr_dccm_or_pic = start_addr_in_dccm_region_d | start_addr_in_dccm_region_d; // @[el2_lsu_addrcheck.scala 54:60] + wire _T_17 = io_rs1_region_d == 4'hf; // @[el2_lsu_addrcheck.scala 55:54] + wire base_reg_dccm_or_pic = _T_17 | _T_17; // @[el2_lsu_addrcheck.scala 55:73] + wire [4:0] csr_idx = {io_start_addr_d[31:28],1'h1}; // @[Cat.scala 29:58] + wire [31:0] _T_25 = io_dec_tlu_mrac_ff >> csr_idx; // @[el2_lsu_addrcheck.scala 61:50] + wire _T_28 = start_addr_dccm_or_pic | addr_in_iccm; // @[el2_lsu_addrcheck.scala 61:121] + wire _T_29 = ~_T_28; // @[el2_lsu_addrcheck.scala 61:62] + wire _T_30 = _T_25[0] & _T_29; // @[el2_lsu_addrcheck.scala 61:60] + wire _T_31 = _T_30 & io_lsu_pkt_d_valid; // @[el2_lsu_addrcheck.scala 61:137] + wire _T_32 = io_lsu_pkt_d_store | io_lsu_pkt_d_load; // @[el2_lsu_addrcheck.scala 61:180] + wire is_sideeffects_d = _T_31 & _T_32; // @[el2_lsu_addrcheck.scala 61:158] + wire _T_34 = io_start_addr_d[1:0] == 2'h0; // @[el2_lsu_addrcheck.scala 62:75] + wire _T_35 = io_lsu_pkt_d_word & _T_34; // @[el2_lsu_addrcheck.scala 62:51] + wire _T_37 = ~io_start_addr_d[0]; // @[el2_lsu_addrcheck.scala 62:128] + wire _T_38 = io_lsu_pkt_d_half & _T_37; // @[el2_lsu_addrcheck.scala 62:106] + wire _T_39 = _T_35 | _T_38; // @[el2_lsu_addrcheck.scala 62:85] + wire is_aligned_d = _T_39 | io_lsu_pkt_d_by; // @[el2_lsu_addrcheck.scala 62:138] + wire [31:0] _T_50 = io_start_addr_d | 32'h7fffffff; // @[el2_lsu_addrcheck.scala 67:56] + wire _T_52 = _T_50 == 32'h7fffffff; // @[el2_lsu_addrcheck.scala 67:80] + wire [31:0] _T_55 = io_start_addr_d | 32'h3fffffff; // @[el2_lsu_addrcheck.scala 68:56] + wire _T_57 = _T_55 == 32'hffffffff; // @[el2_lsu_addrcheck.scala 68:80] + wire _T_59 = _T_52 | _T_57; // @[el2_lsu_addrcheck.scala 67:129] + wire [31:0] _T_61 = io_start_addr_d | 32'h1fffffff; // @[el2_lsu_addrcheck.scala 69:56] + wire _T_63 = _T_61 == 32'hbfffffff; // @[el2_lsu_addrcheck.scala 69:80] + wire _T_65 = _T_59 | _T_63; // @[el2_lsu_addrcheck.scala 68:129] + wire [31:0] _T_67 = io_start_addr_d | 32'hfffffff; // @[el2_lsu_addrcheck.scala 70:56] + wire _T_69 = _T_67 == 32'h8fffffff; // @[el2_lsu_addrcheck.scala 70:80] + wire _T_71 = _T_65 | _T_69; // @[el2_lsu_addrcheck.scala 69:129] + wire [31:0] _T_97 = io_end_addr_d | 32'h7fffffff; // @[el2_lsu_addrcheck.scala 76:57] + wire _T_99 = _T_97 == 32'h7fffffff; // @[el2_lsu_addrcheck.scala 76:81] + wire [31:0] _T_102 = io_end_addr_d | 32'h3fffffff; // @[el2_lsu_addrcheck.scala 77:58] + wire _T_104 = _T_102 == 32'hffffffff; // @[el2_lsu_addrcheck.scala 77:82] + wire _T_106 = _T_99 | _T_104; // @[el2_lsu_addrcheck.scala 76:130] + wire [31:0] _T_108 = io_end_addr_d | 32'h1fffffff; // @[el2_lsu_addrcheck.scala 78:58] + wire _T_110 = _T_108 == 32'hbfffffff; // @[el2_lsu_addrcheck.scala 78:82] + wire _T_112 = _T_106 | _T_110; // @[el2_lsu_addrcheck.scala 77:131] + wire [31:0] _T_114 = io_end_addr_d | 32'hfffffff; // @[el2_lsu_addrcheck.scala 79:58] + wire _T_116 = _T_114 == 32'h8fffffff; // @[el2_lsu_addrcheck.scala 79:82] + wire _T_118 = _T_112 | _T_116; // @[el2_lsu_addrcheck.scala 78:131] + wire non_dccm_access_ok = _T_71 & _T_118; // @[el2_lsu_addrcheck.scala 75:7] + wire regpred_access_fault_d = start_addr_dccm_or_pic ^ base_reg_dccm_or_pic; // @[el2_lsu_addrcheck.scala 85:57] + wire _T_145 = io_start_addr_d[1:0] != 2'h0; // @[el2_lsu_addrcheck.scala 86:76] + wire _T_146 = ~io_lsu_pkt_d_word; // @[el2_lsu_addrcheck.scala 86:92] + wire _T_147 = _T_145 | _T_146; // @[el2_lsu_addrcheck.scala 86:90] + wire picm_access_fault_d = io_addr_in_pic_d & _T_147; // @[el2_lsu_addrcheck.scala 86:51] + wire _T_148 = start_addr_in_dccm_d | start_addr_in_pic_d; // @[el2_lsu_addrcheck.scala 91:87] + wire _T_149 = ~_T_148; // @[el2_lsu_addrcheck.scala 91:64] + wire _T_150 = start_addr_in_dccm_region_d & _T_149; // @[el2_lsu_addrcheck.scala 91:62] + wire _T_151 = end_addr_in_dccm_d | end_addr_in_pic_d; // @[el2_lsu_addrcheck.scala 93:57] + wire _T_152 = ~_T_151; // @[el2_lsu_addrcheck.scala 93:36] + wire _T_153 = end_addr_in_dccm_region_d & _T_152; // @[el2_lsu_addrcheck.scala 93:34] + wire _T_154 = _T_150 | _T_153; // @[el2_lsu_addrcheck.scala 91:112] + wire _T_155 = start_addr_in_dccm_d & end_addr_in_pic_d; // @[el2_lsu_addrcheck.scala 95:29] + wire _T_156 = _T_154 | _T_155; // @[el2_lsu_addrcheck.scala 93:85] + wire _T_157 = start_addr_in_pic_d & end_addr_in_dccm_d; // @[el2_lsu_addrcheck.scala 97:29] + wire unmapped_access_fault_d = _T_156 | _T_157; // @[el2_lsu_addrcheck.scala 95:85] + wire _T_159 = ~start_addr_in_dccm_region_d; // @[el2_lsu_addrcheck.scala 99:33] + wire _T_160 = ~non_dccm_access_ok; // @[el2_lsu_addrcheck.scala 99:64] + wire mpu_access_fault_d = _T_159 & _T_160; // @[el2_lsu_addrcheck.scala 99:62] + wire _T_162 = unmapped_access_fault_d | mpu_access_fault_d; // @[el2_lsu_addrcheck.scala 111:49] + wire _T_163 = _T_162 | picm_access_fault_d; // @[el2_lsu_addrcheck.scala 111:70] + wire _T_164 = _T_163 | regpred_access_fault_d; // @[el2_lsu_addrcheck.scala 111:92] + wire _T_165 = _T_164 & io_lsu_pkt_d_valid; // @[el2_lsu_addrcheck.scala 111:118] + wire _T_166 = ~io_lsu_pkt_d_dma; // @[el2_lsu_addrcheck.scala 111:141] + wire [3:0] _T_172 = picm_access_fault_d ? 4'h6 : 4'h0; // @[el2_lsu_addrcheck.scala 112:164] + wire [3:0] _T_173 = regpred_access_fault_d ? 4'h5 : _T_172; // @[el2_lsu_addrcheck.scala 112:120] + wire [3:0] _T_174 = mpu_access_fault_d ? 4'h3 : _T_173; // @[el2_lsu_addrcheck.scala 112:80] + wire [3:0] access_fault_mscause_d = unmapped_access_fault_d ? 4'h2 : _T_174; // @[el2_lsu_addrcheck.scala 112:35] + wire regcross_misaligned_fault_d = io_start_addr_d[31:28] != io_end_addr_d[31:28]; // @[el2_lsu_addrcheck.scala 113:61] + wire _T_177 = ~is_aligned_d; // @[el2_lsu_addrcheck.scala 114:59] + wire sideeffect_misaligned_fault_d = is_sideeffects_d & _T_177; // @[el2_lsu_addrcheck.scala 114:57] + wire _T_178 = sideeffect_misaligned_fault_d & io_addr_external_d; // @[el2_lsu_addrcheck.scala 115:90] + wire _T_179 = regcross_misaligned_fault_d | _T_178; // @[el2_lsu_addrcheck.scala 115:57] + wire _T_180 = _T_179 & io_lsu_pkt_d_valid; // @[el2_lsu_addrcheck.scala 115:113] + wire [3:0] _T_184 = sideeffect_misaligned_fault_d ? 4'h1 : 4'h0; // @[el2_lsu_addrcheck.scala 116:80] + wire [3:0] misaligned_fault_mscause_d = regcross_misaligned_fault_d ? 4'h2 : _T_184; // @[el2_lsu_addrcheck.scala 116:39] + wire _T_189 = ~start_addr_in_dccm_d; // @[el2_lsu_addrcheck.scala 118:66] + wire _T_190 = start_addr_in_dccm_region_d & _T_189; // @[el2_lsu_addrcheck.scala 118:64] + wire _T_191 = ~end_addr_in_dccm_d; // @[el2_lsu_addrcheck.scala 118:120] + wire _T_192 = end_addr_in_dccm_region_d & _T_191; // @[el2_lsu_addrcheck.scala 118:118] + wire _T_193 = _T_190 | _T_192; // @[el2_lsu_addrcheck.scala 118:88] + wire _T_194 = _T_193 & io_lsu_pkt_d_valid; // @[el2_lsu_addrcheck.scala 118:142] + wire _T_196 = start_addr_in_dccm_region_d & end_addr_in_dccm_region_d; // @[el2_lsu_addrcheck.scala 119:66] + wire _T_197 = ~_T_196; // @[el2_lsu_addrcheck.scala 119:36] + wire _T_198 = _T_197 & io_lsu_pkt_d_valid; // @[el2_lsu_addrcheck.scala 119:95] + reg _T_200; // @[el2_lsu_addrcheck.scala 121:60] + assign io_is_sideeffects_m = _T_200; // @[el2_lsu_addrcheck.scala 121:50] + assign io_addr_in_dccm_d = start_addr_in_dccm_d & end_addr_in_dccm_d; // @[el2_lsu_addrcheck.scala 56:32] + assign io_addr_in_pic_d = start_addr_in_pic_d & end_addr_in_pic_d; // @[el2_lsu_addrcheck.scala 57:32] + assign io_addr_external_d = ~start_addr_dccm_or_pic; // @[el2_lsu_addrcheck.scala 59:30] + assign io_access_fault_d = _T_165 & _T_166; // @[el2_lsu_addrcheck.scala 111:21] + assign io_misaligned_fault_d = _T_180 & _T_166; // @[el2_lsu_addrcheck.scala 115:25] + assign io_exc_mscause_d = io_misaligned_fault_d ? misaligned_fault_mscause_d : access_fault_mscause_d; // @[el2_lsu_addrcheck.scala 117:21] + assign io_fir_dccm_access_error_d = _T_194 & io_lsu_pkt_d_fast_int; // @[el2_lsu_addrcheck.scala 118:31] + assign io_fir_nondccm_access_error_d = _T_198 & io_lsu_pkt_d_fast_int; // @[el2_lsu_addrcheck.scala 119:33] +`ifdef RANDOMIZE_GARBAGE_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_INVALID_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_REG_INIT +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_MEM_INIT +`define RANDOMIZE +`endif +`ifndef RANDOM +`define RANDOM $random +`endif +`ifdef RANDOMIZE_MEM_INIT + integer initvar; +`endif +`ifndef SYNTHESIS +`ifdef FIRRTL_BEFORE_INITIAL +`FIRRTL_BEFORE_INITIAL +`endif +initial begin + `ifdef RANDOMIZE + `ifdef INIT_RANDOM + `INIT_RANDOM + `endif + `ifndef VERILATOR + `ifdef RANDOMIZE_DELAY + #`RANDOMIZE_DELAY begin end + `else + #0.002 begin end + `endif + `endif +`ifdef RANDOMIZE_REG_INIT + _RAND_0 = {1{`RANDOM}}; + _T_200 = _RAND_0[0:0]; +`endif // RANDOMIZE_REG_INIT + if (reset) begin + _T_200 = 1'h0; + end + `endif // RANDOMIZE +end // initial +`ifdef FIRRTL_AFTER_INITIAL +`FIRRTL_AFTER_INITIAL +`endif +`endif // SYNTHESIS + always @(posedge io_lsu_c2_m_clk or posedge reset) begin + if (reset) begin + _T_200 <= 1'h0; + end else begin + _T_200 <= _T_31 & _T_32; + end + end +endmodule +module el2_lsu_lsc_ctl( + input reset, + input io_lsu_c1_m_clk, + input io_lsu_c1_r_clk, + input io_lsu_c2_m_clk, + input io_lsu_c2_r_clk, + input io_lsu_store_c1_m_clk, + input [31:0] io_lsu_ld_data_corr_r, + input io_lsu_single_ecc_error_r, + input io_lsu_double_ecc_error_r, + input [31:0] io_lsu_ld_data_m, + input io_lsu_single_ecc_error_m, + input io_lsu_double_ecc_error_m, + input io_flush_m_up, + input io_flush_r, + input [31:0] io_exu_lsu_rs1_d, + input [31:0] io_exu_lsu_rs2_d, + input io_lsu_p_fast_int, + input io_lsu_p_by, + input io_lsu_p_half, + input io_lsu_p_word, + input io_lsu_p_dword, + input io_lsu_p_load, + input io_lsu_p_store, + input io_lsu_p_unsign, + input io_lsu_p_dma, + input io_lsu_p_store_data_bypass_d, + input io_lsu_p_load_ldst_bypass_d, + input io_lsu_p_store_data_bypass_m, + input io_lsu_p_valid, + input io_dec_lsu_valid_raw_d, + input [11:0] io_dec_lsu_offset_d, + input [31:0] io_picm_mask_data_m, + input [31:0] io_bus_read_data_m, + output [31:0] io_lsu_result_m, + output [31:0] io_lsu_addr_d, + output [31:0] io_lsu_addr_m, + output [31:0] io_lsu_addr_r, + output [31:0] io_end_addr_d, + output [31:0] io_end_addr_m, + output [31:0] io_end_addr_r, + output [31:0] io_store_data_m, + input [31:0] io_dec_tlu_mrac_ff, + output io_lsu_exc_m, + output io_is_sideeffects_m, + output io_lsu_commit_r, + output io_lsu_single_ecc_error_incr, + output io_lsu_error_pkt_r_exc_valid, + output io_lsu_error_pkt_r_single_ecc_error, + output io_lsu_error_pkt_r_inst_type, + output io_lsu_error_pkt_r_exc_type, + output io_lsu_error_pkt_r_mscause, + output io_lsu_error_pkt_r_addr, + output [30:0] io_lsu_fir_addr, + output [1:0] io_lsu_fir_error, + output io_addr_in_dccm_d, + output io_addr_in_dccm_m, + output io_addr_in_dccm_r, + output io_addr_in_pic_d, + output io_addr_in_pic_m, + output io_addr_in_pic_r, + output io_addr_external_m, + input io_dma_dccm_req, + input [31:0] io_dma_mem_addr, + input [2:0] io_dma_mem_sz, + input io_dma_mem_write, + input [63:0] io_dma_mem_wdata, + output io_lsu_pkt_d_fast_int, + output io_lsu_pkt_d_by, + output io_lsu_pkt_d_half, + output io_lsu_pkt_d_word, + output io_lsu_pkt_d_dword, + output io_lsu_pkt_d_load, + output io_lsu_pkt_d_store, + output io_lsu_pkt_d_unsign, + output io_lsu_pkt_d_dma, + output io_lsu_pkt_d_store_data_bypass_d, + output io_lsu_pkt_d_load_ldst_bypass_d, + output io_lsu_pkt_d_store_data_bypass_m, + output io_lsu_pkt_d_valid, + output io_lsu_pkt_m_fast_int, + output io_lsu_pkt_m_by, + output io_lsu_pkt_m_half, + output io_lsu_pkt_m_word, + output io_lsu_pkt_m_dword, + output io_lsu_pkt_m_load, + output io_lsu_pkt_m_store, + output io_lsu_pkt_m_unsign, + output io_lsu_pkt_m_dma, + output io_lsu_pkt_m_store_data_bypass_m, + output io_lsu_pkt_m_valid, + output io_lsu_pkt_r_by, + output io_lsu_pkt_r_half, + output io_lsu_pkt_r_word, + output io_lsu_pkt_r_dword, + output io_lsu_pkt_r_load, + output io_lsu_pkt_r_store, + output io_lsu_pkt_r_unsign, + output io_lsu_pkt_r_dma, + output io_lsu_pkt_r_valid +); +`ifdef RANDOMIZE_REG_INIT + reg [31:0] _RAND_0; + reg [31:0] _RAND_1; + reg [31:0] _RAND_2; + reg [31:0] _RAND_3; + reg [31:0] _RAND_4; + reg [31:0] _RAND_5; + reg [31:0] _RAND_6; + reg [31:0] _RAND_7; + reg [31:0] _RAND_8; + reg [31:0] _RAND_9; + reg [31:0] _RAND_10; + reg [31:0] _RAND_11; + reg [31:0] _RAND_12; + reg [31:0] _RAND_13; + reg [31:0] _RAND_14; + reg [31:0] _RAND_15; + reg [31:0] _RAND_16; + reg [31:0] _RAND_17; + reg [31:0] _RAND_18; + reg [31:0] _RAND_19; + reg [31:0] _RAND_20; + reg [31:0] _RAND_21; + reg [31:0] _RAND_22; + reg [31:0] _RAND_23; + reg [31:0] _RAND_24; + reg [31:0] _RAND_25; + reg [31:0] _RAND_26; + reg [31:0] _RAND_27; + reg [31:0] _RAND_28; + reg [31:0] _RAND_29; + reg [31:0] _RAND_30; + reg [31:0] _RAND_31; + reg [31:0] _RAND_32; + reg [31:0] _RAND_33; + reg [31:0] _RAND_34; + reg [31:0] _RAND_35; + reg [31:0] _RAND_36; + reg [31:0] _RAND_37; + reg [31:0] _RAND_38; + reg [31:0] _RAND_39; + reg [31:0] _RAND_40; + reg [31:0] _RAND_41; +`endif // RANDOMIZE_REG_INIT + wire addrcheck_reset; // @[el2_lsu_lsc_ctl.scala 119:25] + wire addrcheck_io_lsu_c2_m_clk; // @[el2_lsu_lsc_ctl.scala 119:25] + wire [31:0] addrcheck_io_start_addr_d; // @[el2_lsu_lsc_ctl.scala 119:25] + wire [31:0] addrcheck_io_end_addr_d; // @[el2_lsu_lsc_ctl.scala 119:25] + wire addrcheck_io_lsu_pkt_d_fast_int; // @[el2_lsu_lsc_ctl.scala 119:25] + wire addrcheck_io_lsu_pkt_d_by; // @[el2_lsu_lsc_ctl.scala 119:25] + wire addrcheck_io_lsu_pkt_d_half; // @[el2_lsu_lsc_ctl.scala 119:25] + wire addrcheck_io_lsu_pkt_d_word; // @[el2_lsu_lsc_ctl.scala 119:25] + wire addrcheck_io_lsu_pkt_d_load; // @[el2_lsu_lsc_ctl.scala 119:25] + wire addrcheck_io_lsu_pkt_d_store; // @[el2_lsu_lsc_ctl.scala 119:25] + wire addrcheck_io_lsu_pkt_d_dma; // @[el2_lsu_lsc_ctl.scala 119:25] + wire addrcheck_io_lsu_pkt_d_valid; // @[el2_lsu_lsc_ctl.scala 119:25] + wire [31:0] addrcheck_io_dec_tlu_mrac_ff; // @[el2_lsu_lsc_ctl.scala 119:25] + wire [3:0] addrcheck_io_rs1_region_d; // @[el2_lsu_lsc_ctl.scala 119:25] + wire addrcheck_io_is_sideeffects_m; // @[el2_lsu_lsc_ctl.scala 119:25] + wire addrcheck_io_addr_in_dccm_d; // @[el2_lsu_lsc_ctl.scala 119:25] + wire addrcheck_io_addr_in_pic_d; // @[el2_lsu_lsc_ctl.scala 119:25] + wire addrcheck_io_addr_external_d; // @[el2_lsu_lsc_ctl.scala 119:25] + wire addrcheck_io_access_fault_d; // @[el2_lsu_lsc_ctl.scala 119:25] + wire addrcheck_io_misaligned_fault_d; // @[el2_lsu_lsc_ctl.scala 119:25] + wire [3:0] addrcheck_io_exc_mscause_d; // @[el2_lsu_lsc_ctl.scala 119:25] + wire addrcheck_io_fir_dccm_access_error_d; // @[el2_lsu_lsc_ctl.scala 119:25] + wire addrcheck_io_fir_nondccm_access_error_d; // @[el2_lsu_lsc_ctl.scala 119:25] + wire [31:0] lsu_rs1_d = io_dec_lsu_valid_raw_d ? io_exu_lsu_rs1_d : io_dma_mem_addr; // @[el2_lsu_lsc_ctl.scala 101:28] + wire [11:0] _T_3 = io_dec_lsu_valid_raw_d ? 12'hfff : 12'h0; // @[Bitwise.scala 72:12] + wire [11:0] lsu_offset_d = io_dec_lsu_offset_d & _T_3; // @[el2_lsu_lsc_ctl.scala 102:51] + wire [31:0] rs1_d = io_lsu_pkt_d_load_ldst_bypass_d ? io_lsu_result_m : lsu_rs1_d; // @[el2_lsu_lsc_ctl.scala 105:28] + wire [12:0] _T_6 = {1'h0,rs1_d[11:0]}; // @[Cat.scala 29:58] + wire [12:0] _T_8 = {1'h0,lsu_offset_d}; // @[Cat.scala 29:58] + wire [12:0] _T_10 = _T_6 + _T_8; // @[el2_lib.scala 230:39] + wire _T_13 = lsu_offset_d[11] ^ _T_10[12]; // @[el2_lib.scala 231:46] + wire _T_14 = ~_T_13; // @[el2_lib.scala 231:33] + wire [19:0] _T_16 = _T_14 ? 20'hfffff : 20'h0; // @[Bitwise.scala 72:12] + wire [19:0] _T_18 = _T_16 & rs1_d[31:12]; // @[el2_lib.scala 231:58] + wire _T_20 = ~lsu_offset_d[11]; // @[el2_lib.scala 232:18] + wire _T_22 = _T_20 & _T_10[12]; // @[el2_lib.scala 232:30] + wire [19:0] _T_24 = _T_22 ? 20'hfffff : 20'h0; // @[Bitwise.scala 72:12] + wire [19:0] _T_27 = rs1_d[31:12] + 20'h1; // @[el2_lib.scala 232:54] + wire [19:0] _T_28 = _T_24 & _T_27; // @[el2_lib.scala 232:41] + wire [19:0] _T_29 = _T_18 | _T_28; // @[el2_lib.scala 231:72] + wire _T_32 = ~_T_10[12]; // @[el2_lib.scala 233:31] + wire _T_33 = lsu_offset_d[11] & _T_32; // @[el2_lib.scala 233:29] + wire [19:0] _T_35 = _T_33 ? 20'hfffff : 20'h0; // @[Bitwise.scala 72:12] + wire [19:0] _T_38 = rs1_d[31:12] - 20'h1; // @[el2_lib.scala 233:54] + wire [19:0] _T_39 = _T_35 & _T_38; // @[el2_lib.scala 233:41] + wire [19:0] _T_40 = _T_29 | _T_39; // @[el2_lib.scala 232:61] + wire [2:0] _T_43 = io_lsu_pkt_d_half ? 3'h7 : 3'h0; // @[Bitwise.scala 72:12] + wire [2:0] _T_44 = _T_43 & 3'h1; // @[el2_lsu_lsc_ctl.scala 110:53] + wire [2:0] _T_46 = io_lsu_pkt_d_word ? 3'h7 : 3'h0; // @[Bitwise.scala 72:12] + wire [2:0] _T_47 = _T_46 & 3'h3; // @[el2_lsu_lsc_ctl.scala 111:35] + wire [2:0] _T_48 = _T_44 | _T_47; // @[el2_lsu_lsc_ctl.scala 110:65] + wire [2:0] _T_50 = io_lsu_pkt_d_dword ? 3'h7 : 3'h0; // @[Bitwise.scala 72:12] + wire [2:0] addr_offset_d = _T_48 | _T_50; // @[el2_lsu_lsc_ctl.scala 111:47] + wire [12:0] _T_54 = {lsu_offset_d[11],lsu_offset_d}; // @[Cat.scala 29:58] + wire [11:0] _T_57 = {9'h0,addr_offset_d}; // @[Cat.scala 29:58] + wire [12:0] _GEN_0 = {{1'd0}, _T_57}; // @[el2_lsu_lsc_ctl.scala 114:60] + wire [12:0] end_addr_offset_d = _T_54 + _GEN_0; // @[el2_lsu_lsc_ctl.scala 114:60] + wire [18:0] _T_62 = end_addr_offset_d[12] ? 19'h7ffff : 19'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_64 = {_T_62,end_addr_offset_d}; // @[Cat.scala 29:58] + reg access_fault_m; // @[el2_lsu_lsc_ctl.scala 150:75] + reg misaligned_fault_m; // @[el2_lsu_lsc_ctl.scala 151:75] + reg [3:0] exc_mscause_m; // @[el2_lsu_lsc_ctl.scala 152:75] + reg fir_dccm_access_error_m; // @[el2_lsu_lsc_ctl.scala 153:75] + reg fir_nondccm_access_error_m; // @[el2_lsu_lsc_ctl.scala 154:75] + wire _T_69 = access_fault_m | misaligned_fault_m; // @[el2_lsu_lsc_ctl.scala 156:34] + wire _T_70 = ~io_lsu_double_ecc_error_r; // @[el2_lsu_lsc_ctl.scala 157:64] + wire _T_71 = io_lsu_single_ecc_error_r & _T_70; // @[el2_lsu_lsc_ctl.scala 157:62] + wire _T_72 = io_lsu_commit_r | io_lsu_pkt_r_dma; // @[el2_lsu_lsc_ctl.scala 157:111] + wire _T_73 = _T_71 & _T_72; // @[el2_lsu_lsc_ctl.scala 157:92] + wire _T_76 = _T_69 | io_lsu_double_ecc_error_m; // @[el2_lsu_lsc_ctl.scala 179:71] + wire _T_77 = _T_76 & io_lsu_pkt_m_valid; // @[el2_lsu_lsc_ctl.scala 179:100] + wire _T_78 = ~io_lsu_pkt_m_dma; // @[el2_lsu_lsc_ctl.scala 179:123] + wire _T_79 = _T_77 & _T_78; // @[el2_lsu_lsc_ctl.scala 179:121] + wire _T_80 = ~io_lsu_pkt_m_fast_int; // @[el2_lsu_lsc_ctl.scala 179:143] + wire _T_81 = _T_79 & _T_80; // @[el2_lsu_lsc_ctl.scala 179:141] + wire _T_82 = ~io_flush_m_up; // @[el2_lsu_lsc_ctl.scala 179:168] + wire lsu_error_pkt_m_exc_valid = _T_81 & _T_82; // @[el2_lsu_lsc_ctl.scala 179:166] + wire _T_84 = ~lsu_error_pkt_m_exc_valid; // @[el2_lsu_lsc_ctl.scala 180:70] + wire _T_85 = io_lsu_single_ecc_error_m & _T_84; // @[el2_lsu_lsc_ctl.scala 180:68] + wire lsu_error_pkt_m_exc_type = ~misaligned_fault_m; // @[el2_lsu_lsc_ctl.scala 182:41] + wire _T_90 = io_lsu_double_ecc_error_m & lsu_error_pkt_m_exc_type; // @[el2_lsu_lsc_ctl.scala 183:73] + wire _T_91 = ~access_fault_m; // @[el2_lsu_lsc_ctl.scala 183:97] + wire _T_92 = _T_90 & _T_91; // @[el2_lsu_lsc_ctl.scala 183:95] + wire [3:0] _T_95 = _T_92 ? 4'h1 : exc_mscause_m; // @[el2_lsu_lsc_ctl.scala 183:44] + wire _T_99 = io_lsu_pkt_m_fast_int & io_lsu_double_ecc_error_m; // @[el2_lsu_lsc_ctl.scala 185:161] + reg _T_105_exc_valid; // @[el2_lsu_lsc_ctl.scala 186:75] + reg _T_105_single_ecc_error; // @[el2_lsu_lsc_ctl.scala 186:75] + reg _T_105_inst_type; // @[el2_lsu_lsc_ctl.scala 186:75] + reg _T_105_exc_type; // @[el2_lsu_lsc_ctl.scala 186:75] + reg _T_105_mscause; // @[el2_lsu_lsc_ctl.scala 186:75] + reg _T_105_addr; // @[el2_lsu_lsc_ctl.scala 186:75] + reg [1:0] _T_106; // @[el2_lsu_lsc_ctl.scala 187:75] + wire dma_pkt_d_load = ~io_dma_mem_write; // @[el2_lsu_lsc_ctl.scala 194:25] + wire dma_pkt_d_by = io_dma_mem_sz == 3'h0; // @[el2_lsu_lsc_ctl.scala 195:45] + wire dma_pkt_d_half = io_dma_mem_sz == 3'h1; // @[el2_lsu_lsc_ctl.scala 196:45] + wire dma_pkt_d_word = io_dma_mem_sz == 3'h2; // @[el2_lsu_lsc_ctl.scala 197:45] + wire dma_pkt_d_dword = io_dma_mem_sz == 3'h3; // @[el2_lsu_lsc_ctl.scala 198:45] + wire _T_118 = ~io_lsu_p_fast_int; // @[el2_lsu_lsc_ctl.scala 211:64] + wire _T_119 = io_flush_m_up & _T_118; // @[el2_lsu_lsc_ctl.scala 211:61] + wire _T_120 = ~_T_119; // @[el2_lsu_lsc_ctl.scala 211:45] + wire _T_121 = io_lsu_p_valid & _T_120; // @[el2_lsu_lsc_ctl.scala 211:43] + wire _T_123 = ~io_lsu_pkt_d_dma; // @[el2_lsu_lsc_ctl.scala 212:68] + wire _T_124 = io_flush_m_up & _T_123; // @[el2_lsu_lsc_ctl.scala 212:65] + wire _T_125 = ~_T_124; // @[el2_lsu_lsc_ctl.scala 212:49] + wire _T_128 = io_flush_m_up & _T_78; // @[el2_lsu_lsc_ctl.scala 213:65] + wire _T_129 = ~_T_128; // @[el2_lsu_lsc_ctl.scala 213:49] + reg _T_132_fast_int; // @[el2_lsu_lsc_ctl.scala 215:65] + reg _T_132_by; // @[el2_lsu_lsc_ctl.scala 215:65] + reg _T_132_half; // @[el2_lsu_lsc_ctl.scala 215:65] + reg _T_132_word; // @[el2_lsu_lsc_ctl.scala 215:65] + reg _T_132_dword; // @[el2_lsu_lsc_ctl.scala 215:65] + reg _T_132_load; // @[el2_lsu_lsc_ctl.scala 215:65] + reg _T_132_store; // @[el2_lsu_lsc_ctl.scala 215:65] + reg _T_132_unsign; // @[el2_lsu_lsc_ctl.scala 215:65] + reg _T_132_dma; // @[el2_lsu_lsc_ctl.scala 215:65] + reg _T_132_store_data_bypass_m; // @[el2_lsu_lsc_ctl.scala 215:65] + reg _T_134_by; // @[el2_lsu_lsc_ctl.scala 216:65] + reg _T_134_half; // @[el2_lsu_lsc_ctl.scala 216:65] + reg _T_134_word; // @[el2_lsu_lsc_ctl.scala 216:65] + reg _T_134_dword; // @[el2_lsu_lsc_ctl.scala 216:65] + reg _T_134_load; // @[el2_lsu_lsc_ctl.scala 216:65] + reg _T_134_store; // @[el2_lsu_lsc_ctl.scala 216:65] + reg _T_134_unsign; // @[el2_lsu_lsc_ctl.scala 216:65] + reg _T_134_dma; // @[el2_lsu_lsc_ctl.scala 216:65] + reg _T_135; // @[el2_lsu_lsc_ctl.scala 217:65] + reg _T_136; // @[el2_lsu_lsc_ctl.scala 218:65] + wire [5:0] _T_139 = {io_dma_mem_addr[2:0],3'h0}; // @[Cat.scala 29:58] + wire [63:0] dma_mem_wdata_shifted = io_dma_mem_wdata >> _T_139; // @[el2_lsu_lsc_ctl.scala 220:54] + reg [31:0] store_data_pre_m; // @[el2_lsu_lsc_ctl.scala 224:72] + reg [31:0] _T_146; // @[el2_lsu_lsc_ctl.scala 225:62] + reg [31:0] _T_147; // @[el2_lsu_lsc_ctl.scala 226:62] + reg [31:0] _T_148; // @[el2_lsu_lsc_ctl.scala 227:62] + reg [31:0] _T_149; // @[el2_lsu_lsc_ctl.scala 228:62] + reg _T_150; // @[el2_lsu_lsc_ctl.scala 229:62] + reg _T_151; // @[el2_lsu_lsc_ctl.scala 230:62] + reg _T_152; // @[el2_lsu_lsc_ctl.scala 231:62] + reg _T_153; // @[el2_lsu_lsc_ctl.scala 232:62] + reg _T_154; // @[el2_lsu_lsc_ctl.scala 233:62] + wire _T_156 = io_lsu_pkt_r_store | io_lsu_pkt_r_load; // @[el2_lsu_lsc_ctl.scala 241:63] + wire _T_157 = io_lsu_pkt_r_valid & _T_156; // @[el2_lsu_lsc_ctl.scala 241:41] + wire _T_158 = ~io_flush_r; // @[el2_lsu_lsc_ctl.scala 241:86] + wire _T_159 = _T_157 & _T_158; // @[el2_lsu_lsc_ctl.scala 241:84] + wire _T_160 = ~io_lsu_pkt_r_dma; // @[el2_lsu_lsc_ctl.scala 241:100] + wire _T_163 = ~io_addr_in_pic_m; // @[el2_lsu_lsc_ctl.scala 242:69] + wire [31:0] _T_165 = _T_163 ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_166 = io_picm_mask_data_m | _T_165; // @[el2_lsu_lsc_ctl.scala 242:59] + wire [31:0] _T_168 = io_lsu_pkt_m_store_data_bypass_m ? io_lsu_result_m : store_data_pre_m; // @[el2_lsu_lsc_ctl.scala 242:94] + wire [31:0] lsu_ld_datafn_m = io_addr_external_m ? io_bus_read_data_m : io_lsu_ld_data_m; // @[el2_lsu_lsc_ctl.scala 263:33] + wire _T_174 = io_lsu_pkt_m_unsign & io_lsu_pkt_m_by; // @[el2_lsu_lsc_ctl.scala 265:61] + wire [31:0] _T_176 = _T_174 ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_178 = {24'h0,lsu_ld_datafn_m[7:0]}; // @[Cat.scala 29:58] + wire [31:0] _T_179 = _T_176 & _T_178; // @[el2_lsu_lsc_ctl.scala 265:84] + wire _T_180 = io_lsu_pkt_m_unsign & io_lsu_pkt_m_half; // @[el2_lsu_lsc_ctl.scala 266:38] + wire [31:0] _T_182 = _T_180 ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_184 = {16'h0,lsu_ld_datafn_m[15:0]}; // @[Cat.scala 29:58] + wire [31:0] _T_185 = _T_182 & _T_184; // @[el2_lsu_lsc_ctl.scala 266:61] + wire [31:0] _T_186 = _T_179 | _T_185; // @[el2_lsu_lsc_ctl.scala 265:123] + wire _T_187 = ~io_lsu_pkt_m_unsign; // @[el2_lsu_lsc_ctl.scala 267:17] + wire _T_188 = _T_187 & io_lsu_pkt_m_by; // @[el2_lsu_lsc_ctl.scala 267:38] + wire [31:0] _T_190 = _T_188 ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] + wire [23:0] _T_193 = lsu_ld_datafn_m[7] ? 24'hffffff : 24'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_195 = {_T_193,lsu_ld_datafn_m[7:0]}; // @[Cat.scala 29:58] + wire [31:0] _T_196 = _T_190 & _T_195; // @[el2_lsu_lsc_ctl.scala 267:61] + wire [31:0] _T_197 = _T_186 | _T_196; // @[el2_lsu_lsc_ctl.scala 266:104] + wire _T_199 = _T_187 & io_lsu_pkt_m_half; // @[el2_lsu_lsc_ctl.scala 268:38] + wire [31:0] _T_201 = _T_199 ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] + wire [15:0] _T_204 = lsu_ld_datafn_m[15] ? 16'hffff : 16'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_206 = {_T_204,lsu_ld_datafn_m[15:0]}; // @[Cat.scala 29:58] + wire [31:0] _T_207 = _T_201 & _T_206; // @[el2_lsu_lsc_ctl.scala 268:61] + wire [31:0] _T_208 = _T_197 | _T_207; // @[el2_lsu_lsc_ctl.scala 267:124] + wire [31:0] _T_210 = io_lsu_pkt_m_word ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_212 = _T_210 & lsu_ld_datafn_m; // @[el2_lsu_lsc_ctl.scala 269:38] + el2_lsu_addrcheck addrcheck ( // @[el2_lsu_lsc_ctl.scala 119:25] + .reset(addrcheck_reset), + .io_lsu_c2_m_clk(addrcheck_io_lsu_c2_m_clk), + .io_start_addr_d(addrcheck_io_start_addr_d), + .io_end_addr_d(addrcheck_io_end_addr_d), + .io_lsu_pkt_d_fast_int(addrcheck_io_lsu_pkt_d_fast_int), + .io_lsu_pkt_d_by(addrcheck_io_lsu_pkt_d_by), + .io_lsu_pkt_d_half(addrcheck_io_lsu_pkt_d_half), + .io_lsu_pkt_d_word(addrcheck_io_lsu_pkt_d_word), + .io_lsu_pkt_d_load(addrcheck_io_lsu_pkt_d_load), + .io_lsu_pkt_d_store(addrcheck_io_lsu_pkt_d_store), + .io_lsu_pkt_d_dma(addrcheck_io_lsu_pkt_d_dma), + .io_lsu_pkt_d_valid(addrcheck_io_lsu_pkt_d_valid), + .io_dec_tlu_mrac_ff(addrcheck_io_dec_tlu_mrac_ff), + .io_rs1_region_d(addrcheck_io_rs1_region_d), + .io_is_sideeffects_m(addrcheck_io_is_sideeffects_m), + .io_addr_in_dccm_d(addrcheck_io_addr_in_dccm_d), + .io_addr_in_pic_d(addrcheck_io_addr_in_pic_d), + .io_addr_external_d(addrcheck_io_addr_external_d), + .io_access_fault_d(addrcheck_io_access_fault_d), + .io_misaligned_fault_d(addrcheck_io_misaligned_fault_d), + .io_exc_mscause_d(addrcheck_io_exc_mscause_d), + .io_fir_dccm_access_error_d(addrcheck_io_fir_dccm_access_error_d), + .io_fir_nondccm_access_error_d(addrcheck_io_fir_nondccm_access_error_d) + ); + assign io_lsu_result_m = _T_208 | _T_212; // @[el2_lsu_lsc_ctl.scala 265:27] + assign io_lsu_addr_d = {_T_40,_T_10[11:0]}; // @[el2_lsu_lsc_ctl.scala 239:28] + assign io_lsu_addr_m = _T_146; // @[el2_lsu_lsc_ctl.scala 225:24] + assign io_lsu_addr_r = _T_147; // @[el2_lsu_lsc_ctl.scala 226:24] + assign io_end_addr_d = rs1_d + _T_64; // @[el2_lsu_lsc_ctl.scala 116:24] + assign io_end_addr_m = _T_148; // @[el2_lsu_lsc_ctl.scala 227:24] + assign io_end_addr_r = _T_149; // @[el2_lsu_lsc_ctl.scala 228:24] + assign io_store_data_m = _T_166 & _T_168; // @[el2_lsu_lsc_ctl.scala 242:29] + assign io_lsu_exc_m = access_fault_m | misaligned_fault_m; // @[el2_lsu_lsc_ctl.scala 156:16] + assign io_is_sideeffects_m = addrcheck_io_is_sideeffects_m; // @[el2_lsu_lsc_ctl.scala 129:42] + assign io_lsu_commit_r = _T_159 & _T_160; // @[el2_lsu_lsc_ctl.scala 241:19] + assign io_lsu_single_ecc_error_incr = _T_73 & io_lsu_pkt_r_valid; // @[el2_lsu_lsc_ctl.scala 157:32] + assign io_lsu_error_pkt_r_exc_valid = _T_105_exc_valid; // @[el2_lsu_lsc_ctl.scala 186:38] + assign io_lsu_error_pkt_r_single_ecc_error = _T_105_single_ecc_error; // @[el2_lsu_lsc_ctl.scala 186:38] + assign io_lsu_error_pkt_r_inst_type = _T_105_inst_type; // @[el2_lsu_lsc_ctl.scala 186:38] + assign io_lsu_error_pkt_r_exc_type = _T_105_exc_type; // @[el2_lsu_lsc_ctl.scala 186:38] + assign io_lsu_error_pkt_r_mscause = _T_105_mscause; // @[el2_lsu_lsc_ctl.scala 186:38] + assign io_lsu_error_pkt_r_addr = _T_105_addr; // @[el2_lsu_lsc_ctl.scala 186:38] + assign io_lsu_fir_addr = io_lsu_ld_data_corr_r[31:1]; // @[el2_lsu_lsc_ctl.scala 237:28] + assign io_lsu_fir_error = _T_106; // @[el2_lsu_lsc_ctl.scala 187:38] + assign io_addr_in_dccm_d = addrcheck_io_addr_in_dccm_d; // @[el2_lsu_lsc_ctl.scala 130:42] + assign io_addr_in_dccm_m = _T_150; // @[el2_lsu_lsc_ctl.scala 229:24] + assign io_addr_in_dccm_r = _T_151; // @[el2_lsu_lsc_ctl.scala 230:24] + assign io_addr_in_pic_d = addrcheck_io_addr_in_pic_d; // @[el2_lsu_lsc_ctl.scala 131:42] + assign io_addr_in_pic_m = _T_152; // @[el2_lsu_lsc_ctl.scala 231:24] + assign io_addr_in_pic_r = _T_153; // @[el2_lsu_lsc_ctl.scala 232:24] + assign io_addr_external_m = _T_154; // @[el2_lsu_lsc_ctl.scala 233:24] + assign io_lsu_pkt_d_fast_int = io_dec_lsu_valid_raw_d & io_lsu_p_fast_int; // @[el2_lsu_lsc_ctl.scala 207:20] + assign io_lsu_pkt_d_by = io_dec_lsu_valid_raw_d ? io_lsu_p_by : dma_pkt_d_by; // @[el2_lsu_lsc_ctl.scala 207:20] + assign io_lsu_pkt_d_half = io_dec_lsu_valid_raw_d ? io_lsu_p_half : dma_pkt_d_half; // @[el2_lsu_lsc_ctl.scala 207:20] + assign io_lsu_pkt_d_word = io_dec_lsu_valid_raw_d ? io_lsu_p_word : dma_pkt_d_word; // @[el2_lsu_lsc_ctl.scala 207:20] + assign io_lsu_pkt_d_dword = io_dec_lsu_valid_raw_d ? io_lsu_p_dword : dma_pkt_d_dword; // @[el2_lsu_lsc_ctl.scala 207:20] + assign io_lsu_pkt_d_load = io_dec_lsu_valid_raw_d ? io_lsu_p_load : dma_pkt_d_load; // @[el2_lsu_lsc_ctl.scala 207:20] + assign io_lsu_pkt_d_store = io_dec_lsu_valid_raw_d ? io_lsu_p_store : io_dma_mem_write; // @[el2_lsu_lsc_ctl.scala 207:20] + assign io_lsu_pkt_d_unsign = io_dec_lsu_valid_raw_d & io_lsu_p_unsign; // @[el2_lsu_lsc_ctl.scala 207:20] + assign io_lsu_pkt_d_dma = io_dec_lsu_valid_raw_d ? io_lsu_p_dma : 1'h1; // @[el2_lsu_lsc_ctl.scala 207:20] + assign io_lsu_pkt_d_store_data_bypass_d = io_dec_lsu_valid_raw_d & io_lsu_p_store_data_bypass_d; // @[el2_lsu_lsc_ctl.scala 207:20] + assign io_lsu_pkt_d_load_ldst_bypass_d = io_dec_lsu_valid_raw_d & io_lsu_p_load_ldst_bypass_d; // @[el2_lsu_lsc_ctl.scala 207:20] + assign io_lsu_pkt_d_store_data_bypass_m = io_dec_lsu_valid_raw_d & io_lsu_p_store_data_bypass_m; // @[el2_lsu_lsc_ctl.scala 207:20] + assign io_lsu_pkt_d_valid = _T_121 | io_dma_dccm_req; // @[el2_lsu_lsc_ctl.scala 207:20 el2_lsu_lsc_ctl.scala 211:24] + assign io_lsu_pkt_m_fast_int = _T_132_fast_int; // @[el2_lsu_lsc_ctl.scala 215:28] + assign io_lsu_pkt_m_by = _T_132_by; // @[el2_lsu_lsc_ctl.scala 215:28] + assign io_lsu_pkt_m_half = _T_132_half; // @[el2_lsu_lsc_ctl.scala 215:28] + assign io_lsu_pkt_m_word = _T_132_word; // @[el2_lsu_lsc_ctl.scala 215:28] + assign io_lsu_pkt_m_dword = _T_132_dword; // @[el2_lsu_lsc_ctl.scala 215:28] + assign io_lsu_pkt_m_load = _T_132_load; // @[el2_lsu_lsc_ctl.scala 215:28] + assign io_lsu_pkt_m_store = _T_132_store; // @[el2_lsu_lsc_ctl.scala 215:28] + assign io_lsu_pkt_m_unsign = _T_132_unsign; // @[el2_lsu_lsc_ctl.scala 215:28] + assign io_lsu_pkt_m_dma = _T_132_dma; // @[el2_lsu_lsc_ctl.scala 215:28] + assign io_lsu_pkt_m_store_data_bypass_m = _T_132_store_data_bypass_m; // @[el2_lsu_lsc_ctl.scala 215:28] + assign io_lsu_pkt_m_valid = _T_135; // @[el2_lsu_lsc_ctl.scala 215:28 el2_lsu_lsc_ctl.scala 217:28] + assign io_lsu_pkt_r_by = _T_134_by; // @[el2_lsu_lsc_ctl.scala 216:28] + assign io_lsu_pkt_r_half = _T_134_half; // @[el2_lsu_lsc_ctl.scala 216:28] + assign io_lsu_pkt_r_word = _T_134_word; // @[el2_lsu_lsc_ctl.scala 216:28] + assign io_lsu_pkt_r_dword = _T_134_dword; // @[el2_lsu_lsc_ctl.scala 216:28] + assign io_lsu_pkt_r_load = _T_134_load; // @[el2_lsu_lsc_ctl.scala 216:28] + assign io_lsu_pkt_r_store = _T_134_store; // @[el2_lsu_lsc_ctl.scala 216:28] + assign io_lsu_pkt_r_unsign = _T_134_unsign; // @[el2_lsu_lsc_ctl.scala 216:28] + assign io_lsu_pkt_r_dma = _T_134_dma; // @[el2_lsu_lsc_ctl.scala 216:28] + assign io_lsu_pkt_r_valid = _T_136; // @[el2_lsu_lsc_ctl.scala 216:28 el2_lsu_lsc_ctl.scala 218:28] + assign addrcheck_reset = reset; + assign addrcheck_io_lsu_c2_m_clk = io_lsu_c2_m_clk; // @[el2_lsu_lsc_ctl.scala 121:42] + assign addrcheck_io_start_addr_d = {_T_40,_T_10[11:0]}; // @[el2_lsu_lsc_ctl.scala 123:42] + assign addrcheck_io_end_addr_d = rs1_d + _T_64; // @[el2_lsu_lsc_ctl.scala 124:42] + assign addrcheck_io_lsu_pkt_d_fast_int = io_lsu_pkt_d_fast_int; // @[el2_lsu_lsc_ctl.scala 125:42] + assign addrcheck_io_lsu_pkt_d_by = io_lsu_pkt_d_by; // @[el2_lsu_lsc_ctl.scala 125:42] + assign addrcheck_io_lsu_pkt_d_half = io_lsu_pkt_d_half; // @[el2_lsu_lsc_ctl.scala 125:42] + assign addrcheck_io_lsu_pkt_d_word = io_lsu_pkt_d_word; // @[el2_lsu_lsc_ctl.scala 125:42] + assign addrcheck_io_lsu_pkt_d_load = io_lsu_pkt_d_load; // @[el2_lsu_lsc_ctl.scala 125:42] + assign addrcheck_io_lsu_pkt_d_store = io_lsu_pkt_d_store; // @[el2_lsu_lsc_ctl.scala 125:42] + assign addrcheck_io_lsu_pkt_d_dma = io_lsu_pkt_d_dma; // @[el2_lsu_lsc_ctl.scala 125:42] + assign addrcheck_io_lsu_pkt_d_valid = io_lsu_pkt_d_valid; // @[el2_lsu_lsc_ctl.scala 125:42] + assign addrcheck_io_dec_tlu_mrac_ff = io_dec_tlu_mrac_ff; // @[el2_lsu_lsc_ctl.scala 126:42] + assign addrcheck_io_rs1_region_d = rs1_d[31:28]; // @[el2_lsu_lsc_ctl.scala 127:42] +`ifdef RANDOMIZE_GARBAGE_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_INVALID_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_REG_INIT +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_MEM_INIT +`define RANDOMIZE +`endif +`ifndef RANDOM +`define RANDOM $random +`endif +`ifdef RANDOMIZE_MEM_INIT + integer initvar; +`endif +`ifndef SYNTHESIS +`ifdef FIRRTL_BEFORE_INITIAL +`FIRRTL_BEFORE_INITIAL +`endif +initial begin + `ifdef RANDOMIZE + `ifdef INIT_RANDOM + `INIT_RANDOM + `endif + `ifndef VERILATOR + `ifdef RANDOMIZE_DELAY + #`RANDOMIZE_DELAY begin end + `else + #0.002 begin end + `endif + `endif +`ifdef RANDOMIZE_REG_INIT + _RAND_0 = {1{`RANDOM}}; + access_fault_m = _RAND_0[0:0]; + _RAND_1 = {1{`RANDOM}}; + misaligned_fault_m = _RAND_1[0:0]; + _RAND_2 = {1{`RANDOM}}; + exc_mscause_m = _RAND_2[3:0]; + _RAND_3 = {1{`RANDOM}}; + fir_dccm_access_error_m = _RAND_3[0:0]; + _RAND_4 = {1{`RANDOM}}; + fir_nondccm_access_error_m = _RAND_4[0:0]; + _RAND_5 = {1{`RANDOM}}; + _T_105_exc_valid = _RAND_5[0:0]; + _RAND_6 = {1{`RANDOM}}; + _T_105_single_ecc_error = _RAND_6[0:0]; + _RAND_7 = {1{`RANDOM}}; + _T_105_inst_type = _RAND_7[0:0]; + _RAND_8 = {1{`RANDOM}}; + _T_105_exc_type = _RAND_8[0:0]; + _RAND_9 = {1{`RANDOM}}; + _T_105_mscause = _RAND_9[0:0]; + _RAND_10 = {1{`RANDOM}}; + _T_105_addr = _RAND_10[0:0]; + _RAND_11 = {1{`RANDOM}}; + _T_106 = _RAND_11[1:0]; + _RAND_12 = {1{`RANDOM}}; + _T_132_fast_int = _RAND_12[0:0]; + _RAND_13 = {1{`RANDOM}}; + _T_132_by = _RAND_13[0:0]; + _RAND_14 = {1{`RANDOM}}; + _T_132_half = _RAND_14[0:0]; + _RAND_15 = {1{`RANDOM}}; + _T_132_word = _RAND_15[0:0]; + _RAND_16 = {1{`RANDOM}}; + _T_132_dword = _RAND_16[0:0]; + _RAND_17 = {1{`RANDOM}}; + _T_132_load = _RAND_17[0:0]; + _RAND_18 = {1{`RANDOM}}; + _T_132_store = _RAND_18[0:0]; + _RAND_19 = {1{`RANDOM}}; + _T_132_unsign = _RAND_19[0:0]; + _RAND_20 = {1{`RANDOM}}; + _T_132_dma = _RAND_20[0:0]; + _RAND_21 = {1{`RANDOM}}; + _T_132_store_data_bypass_m = _RAND_21[0:0]; + _RAND_22 = {1{`RANDOM}}; + _T_134_by = _RAND_22[0:0]; + _RAND_23 = {1{`RANDOM}}; + _T_134_half = _RAND_23[0:0]; + _RAND_24 = {1{`RANDOM}}; + _T_134_word = _RAND_24[0:0]; + _RAND_25 = {1{`RANDOM}}; + _T_134_dword = _RAND_25[0:0]; + _RAND_26 = {1{`RANDOM}}; + _T_134_load = _RAND_26[0:0]; + _RAND_27 = {1{`RANDOM}}; + _T_134_store = _RAND_27[0:0]; + _RAND_28 = {1{`RANDOM}}; + _T_134_unsign = _RAND_28[0:0]; + _RAND_29 = {1{`RANDOM}}; + _T_134_dma = _RAND_29[0:0]; + _RAND_30 = {1{`RANDOM}}; + _T_135 = _RAND_30[0:0]; + _RAND_31 = {1{`RANDOM}}; + _T_136 = _RAND_31[0:0]; + _RAND_32 = {1{`RANDOM}}; + store_data_pre_m = _RAND_32[31:0]; + _RAND_33 = {1{`RANDOM}}; + _T_146 = _RAND_33[31:0]; + _RAND_34 = {1{`RANDOM}}; + _T_147 = _RAND_34[31:0]; + _RAND_35 = {1{`RANDOM}}; + _T_148 = _RAND_35[31:0]; + _RAND_36 = {1{`RANDOM}}; + _T_149 = _RAND_36[31:0]; + _RAND_37 = {1{`RANDOM}}; + _T_150 = _RAND_37[0:0]; + _RAND_38 = {1{`RANDOM}}; + _T_151 = _RAND_38[0:0]; + _RAND_39 = {1{`RANDOM}}; + _T_152 = _RAND_39[0:0]; + _RAND_40 = {1{`RANDOM}}; + _T_153 = _RAND_40[0:0]; + _RAND_41 = {1{`RANDOM}}; + _T_154 = _RAND_41[0:0]; +`endif // RANDOMIZE_REG_INIT + if (reset) begin + access_fault_m = 1'h0; + end + if (reset) begin + misaligned_fault_m = 1'h0; + end + if (reset) begin + exc_mscause_m = 4'h0; + end + if (reset) begin + fir_dccm_access_error_m = 1'h0; + end + if (reset) begin + fir_nondccm_access_error_m = 1'h0; + end + if (reset) begin + _T_105_exc_valid = 1'h0; + end + if (reset) begin + _T_105_single_ecc_error = 1'h0; + end + if (reset) begin + _T_105_inst_type = 1'h0; + end + if (reset) begin + _T_105_exc_type = 1'h0; + end + if (reset) begin + _T_105_mscause = 1'h0; + end + if (reset) begin + _T_105_addr = 1'h0; + end + if (reset) begin + _T_106 = 2'h0; + end + if (reset) begin + _T_132_fast_int = 1'h0; + end + if (reset) begin + _T_132_by = 1'h0; + end + if (reset) begin + _T_132_half = 1'h0; + end + if (reset) begin + _T_132_word = 1'h0; + end + if (reset) begin + _T_132_dword = 1'h0; + end + if (reset) begin + _T_132_load = 1'h0; + end + if (reset) begin + _T_132_store = 1'h0; + end + if (reset) begin + _T_132_unsign = 1'h0; + end + if (reset) begin + _T_132_dma = 1'h0; + end + if (reset) begin + _T_132_store_data_bypass_m = 1'h0; + end + if (reset) begin + _T_134_by = 1'h0; + end + if (reset) begin + _T_134_half = 1'h0; + end + if (reset) begin + _T_134_word = 1'h0; + end + if (reset) begin + _T_134_dword = 1'h0; + end + if (reset) begin + _T_134_load = 1'h0; + end + if (reset) begin + _T_134_store = 1'h0; + end + if (reset) begin + _T_134_unsign = 1'h0; + end + if (reset) begin + _T_134_dma = 1'h0; + end + if (reset) begin + _T_135 = 1'h0; + end + if (reset) begin + _T_136 = 1'h0; + end + if (reset) begin + store_data_pre_m = 32'h0; + end + if (reset) begin + _T_146 = 32'h0; + end + if (reset) begin + _T_147 = 32'h0; + end + if (reset) begin + _T_148 = 32'h0; + end + if (reset) begin + _T_149 = 32'h0; + end + if (reset) begin + _T_150 = 1'h0; + end + if (reset) begin + _T_151 = 1'h0; + end + if (reset) begin + _T_152 = 1'h0; + end + if (reset) begin + _T_153 = 1'h0; + end + if (reset) begin + _T_154 = 1'h0; + end + `endif // RANDOMIZE +end // initial +`ifdef FIRRTL_AFTER_INITIAL +`FIRRTL_AFTER_INITIAL +`endif +`endif // SYNTHESIS + always @(posedge io_lsu_c1_m_clk or posedge reset) begin + if (reset) begin + access_fault_m <= 1'h0; + end else begin + access_fault_m <= addrcheck_io_access_fault_d; + end + end + always @(posedge io_lsu_c1_m_clk or posedge reset) begin + if (reset) begin + misaligned_fault_m <= 1'h0; + end else begin + misaligned_fault_m <= addrcheck_io_misaligned_fault_d; + end + end + always @(posedge io_lsu_c1_m_clk or posedge reset) begin + if (reset) begin + exc_mscause_m <= 4'h0; + end else begin + exc_mscause_m <= addrcheck_io_exc_mscause_d; + end + end + always @(posedge io_lsu_c1_m_clk or posedge reset) begin + if (reset) begin + fir_dccm_access_error_m <= 1'h0; + end else begin + fir_dccm_access_error_m <= addrcheck_io_fir_dccm_access_error_d; + end + end + always @(posedge io_lsu_c1_m_clk or posedge reset) begin + if (reset) begin + fir_nondccm_access_error_m <= 1'h0; + end else begin + fir_nondccm_access_error_m <= addrcheck_io_fir_nondccm_access_error_d; + end + end + always @(posedge io_lsu_c2_r_clk or posedge reset) begin + if (reset) begin + _T_105_exc_valid <= 1'h0; + end else begin + _T_105_exc_valid <= _T_81 & _T_82; + end + end + always @(posedge io_lsu_c2_r_clk or posedge reset) begin + if (reset) begin + _T_105_single_ecc_error <= 1'h0; + end else begin + _T_105_single_ecc_error <= _T_85 & _T_78; + end + end + always @(posedge io_lsu_c2_r_clk or posedge reset) begin + if (reset) begin + _T_105_inst_type <= 1'h0; + end else begin + _T_105_inst_type <= io_lsu_pkt_m_store; + end + end + always @(posedge io_lsu_c2_r_clk or posedge reset) begin + if (reset) begin + _T_105_exc_type <= 1'h0; + end else begin + _T_105_exc_type <= ~misaligned_fault_m; + end + end + always @(posedge io_lsu_c2_r_clk or posedge reset) begin + if (reset) begin + _T_105_mscause <= 1'h0; + end else begin + _T_105_mscause <= _T_95[0]; + end + end + always @(posedge io_lsu_c2_r_clk or posedge reset) begin + if (reset) begin + _T_105_addr <= 1'h0; + end else begin + _T_105_addr <= io_lsu_addr_m[0]; + end + end + always @(posedge io_lsu_c2_r_clk or posedge reset) begin + if (reset) begin + _T_106 <= 2'h0; + end else if (fir_nondccm_access_error_m) begin + _T_106 <= 2'h3; + end else if (fir_dccm_access_error_m) begin + _T_106 <= 2'h2; + end else if (_T_99) begin + _T_106 <= 2'h1; + end else begin + _T_106 <= 2'h0; + end + end + always @(posedge io_lsu_c1_m_clk or posedge reset) begin + if (reset) begin + _T_132_fast_int <= 1'h0; + end else begin + _T_132_fast_int <= io_lsu_pkt_d_fast_int; + end + end + always @(posedge io_lsu_c1_m_clk or posedge reset) begin + if (reset) begin + _T_132_by <= 1'h0; + end else begin + _T_132_by <= io_lsu_pkt_d_by; + end + end + always @(posedge io_lsu_c1_m_clk or posedge reset) begin + if (reset) begin + _T_132_half <= 1'h0; + end else begin + _T_132_half <= io_lsu_pkt_d_half; + end + end + always @(posedge io_lsu_c1_m_clk or posedge reset) begin + if (reset) begin + _T_132_word <= 1'h0; + end else begin + _T_132_word <= io_lsu_pkt_d_word; + end + end + always @(posedge io_lsu_c1_m_clk or posedge reset) begin + if (reset) begin + _T_132_dword <= 1'h0; + end else begin + _T_132_dword <= io_lsu_pkt_d_dword; + end + end + always @(posedge io_lsu_c1_m_clk or posedge reset) begin + if (reset) begin + _T_132_load <= 1'h0; + end else begin + _T_132_load <= io_lsu_pkt_d_load; + end + end + always @(posedge io_lsu_c1_m_clk or posedge reset) begin + if (reset) begin + _T_132_store <= 1'h0; + end else begin + _T_132_store <= io_lsu_pkt_d_store; + end + end + always @(posedge io_lsu_c1_m_clk or posedge reset) begin + if (reset) begin + _T_132_unsign <= 1'h0; + end else begin + _T_132_unsign <= io_lsu_pkt_d_unsign; + end + end + always @(posedge io_lsu_c1_m_clk or posedge reset) begin + if (reset) begin + _T_132_dma <= 1'h0; + end else begin + _T_132_dma <= io_lsu_pkt_d_dma; + end + end + always @(posedge io_lsu_c1_m_clk or posedge reset) begin + if (reset) begin + _T_132_store_data_bypass_m <= 1'h0; + end else begin + _T_132_store_data_bypass_m <= io_lsu_pkt_d_store_data_bypass_m; + end + end + always @(posedge io_lsu_c1_r_clk or posedge reset) begin + if (reset) begin + _T_134_by <= 1'h0; + end else begin + _T_134_by <= io_lsu_pkt_m_by; + end + end + always @(posedge io_lsu_c1_r_clk or posedge reset) begin + if (reset) begin + _T_134_half <= 1'h0; + end else begin + _T_134_half <= io_lsu_pkt_m_half; + end + end + always @(posedge io_lsu_c1_r_clk or posedge reset) begin + if (reset) begin + _T_134_word <= 1'h0; + end else begin + _T_134_word <= io_lsu_pkt_m_word; + end + end + always @(posedge io_lsu_c1_r_clk or posedge reset) begin + if (reset) begin + _T_134_dword <= 1'h0; + end else begin + _T_134_dword <= io_lsu_pkt_m_dword; + end + end + always @(posedge io_lsu_c1_r_clk or posedge reset) begin + if (reset) begin + _T_134_load <= 1'h0; + end else begin + _T_134_load <= io_lsu_pkt_m_load; + end + end + always @(posedge io_lsu_c1_r_clk or posedge reset) begin + if (reset) begin + _T_134_store <= 1'h0; + end else begin + _T_134_store <= io_lsu_pkt_m_store; + end + end + always @(posedge io_lsu_c1_r_clk or posedge reset) begin + if (reset) begin + _T_134_unsign <= 1'h0; + end else begin + _T_134_unsign <= io_lsu_pkt_m_unsign; + end + end + always @(posedge io_lsu_c1_r_clk or posedge reset) begin + if (reset) begin + _T_134_dma <= 1'h0; + end else begin + _T_134_dma <= io_lsu_pkt_m_dma; + end + end + always @(posedge io_lsu_c2_m_clk or posedge reset) begin + if (reset) begin + _T_135 <= 1'h0; + end else begin + _T_135 <= io_lsu_pkt_d_valid & _T_125; + end + end + always @(posedge io_lsu_c2_r_clk or posedge reset) begin + if (reset) begin + _T_136 <= 1'h0; + end else begin + _T_136 <= io_lsu_pkt_m_valid & _T_129; + end + end + always @(posedge io_lsu_store_c1_m_clk or posedge reset) begin + if (reset) begin + store_data_pre_m <= 32'h0; + end else if (io_lsu_pkt_d_store_data_bypass_d) begin + store_data_pre_m <= io_lsu_result_m; + end else if (io_dma_dccm_req) begin + store_data_pre_m <= dma_mem_wdata_shifted[31:0]; + end else begin + store_data_pre_m <= io_exu_lsu_rs2_d; + end + end + always @(posedge io_lsu_c1_m_clk or posedge reset) begin + if (reset) begin + _T_146 <= 32'h0; + end else begin + _T_146 <= io_lsu_addr_d; + end + end + always @(posedge io_lsu_c1_r_clk or posedge reset) begin + if (reset) begin + _T_147 <= 32'h0; + end else begin + _T_147 <= io_lsu_addr_m; + end + end + always @(posedge io_lsu_c1_m_clk or posedge reset) begin + if (reset) begin + _T_148 <= 32'h0; + end else begin + _T_148 <= io_end_addr_d; + end + end + always @(posedge io_lsu_c1_r_clk or posedge reset) begin + if (reset) begin + _T_149 <= 32'h0; + end else begin + _T_149 <= io_end_addr_m; + end + end + always @(posedge io_lsu_c1_m_clk or posedge reset) begin + if (reset) begin + _T_150 <= 1'h0; + end else begin + _T_150 <= io_addr_in_dccm_d; + end + end + always @(posedge io_lsu_c1_r_clk or posedge reset) begin + if (reset) begin + _T_151 <= 1'h0; + end else begin + _T_151 <= io_addr_in_dccm_m; + end + end + always @(posedge io_lsu_c1_m_clk or posedge reset) begin + if (reset) begin + _T_152 <= 1'h0; + end else begin + _T_152 <= io_addr_in_pic_d; + end + end + always @(posedge io_lsu_c1_r_clk or posedge reset) begin + if (reset) begin + _T_153 <= 1'h0; + end else begin + _T_153 <= io_addr_in_pic_m; + end + end + always @(posedge io_lsu_c1_m_clk or posedge reset) begin + if (reset) begin + _T_154 <= 1'h0; + end else begin + _T_154 <= addrcheck_io_addr_external_d; + end + end +endmodule +module rvclkhdr( + output io_l1clk, + input io_clk, + input io_en, + input io_scan_mode +); + wire clkhdr_Q; // @[el2_lib.scala 472:26] + wire clkhdr_CK; // @[el2_lib.scala 472:26] + wire clkhdr_EN; // @[el2_lib.scala 472:26] + wire clkhdr_SE; // @[el2_lib.scala 472:26] + TEC_RV_ICG clkhdr ( // @[el2_lib.scala 472:26] + .Q(clkhdr_Q), + .CK(clkhdr_CK), + .EN(clkhdr_EN), + .SE(clkhdr_SE) + ); + assign io_l1clk = clkhdr_Q; // @[el2_lib.scala 473:14] + assign clkhdr_CK = io_clk; // @[el2_lib.scala 474:18] + assign clkhdr_EN = io_en; // @[el2_lib.scala 475:18] + assign clkhdr_SE = io_scan_mode; // @[el2_lib.scala 476:18] +endmodule +module el2_lsu_dccm_ctl( + input clock, + input reset, + input io_lsu_c2_m_clk, + input io_lsu_c2_r_clk, + input io_lsu_free_c2_clk, + input io_lsu_store_c1_r_clk, + input io_lsu_pkt_d_word, + input io_lsu_pkt_d_dword, + input io_lsu_pkt_d_load, + input io_lsu_pkt_d_store, + input io_lsu_pkt_d_dma, + input io_lsu_pkt_d_valid, + input io_lsu_pkt_m_by, + input io_lsu_pkt_m_half, + input io_lsu_pkt_m_word, + input io_lsu_pkt_m_load, + input io_lsu_pkt_m_store, + input io_lsu_pkt_m_dma, + input io_lsu_pkt_m_valid, + input io_lsu_pkt_r_by, + input io_lsu_pkt_r_half, + input io_lsu_pkt_r_word, + input io_lsu_pkt_r_load, + input io_lsu_pkt_r_store, + input io_lsu_pkt_r_dma, + input io_lsu_pkt_r_valid, + input io_addr_in_dccm_d, + input io_addr_in_dccm_m, + input io_addr_in_dccm_r, + input io_addr_in_pic_d, + input io_addr_in_pic_m, + input io_addr_in_pic_r, + input io_lsu_raw_fwd_lo_r, + input io_lsu_raw_fwd_hi_r, + input io_lsu_commit_r, + input [31:0] io_lsu_addr_d, + input [15:0] io_lsu_addr_m, + input [31:0] io_lsu_addr_r, + input [15:0] io_end_addr_d, + input [15:0] io_end_addr_m, + input [15:0] io_end_addr_r, + input io_stbuf_reqvld_any, + input [15:0] io_stbuf_addr_any, + input [31:0] io_stbuf_data_any, + input [6:0] io_stbuf_ecc_any, + input [31:0] io_stbuf_fwddata_hi_m, + input [31:0] io_stbuf_fwddata_lo_m, + input [3:0] io_stbuf_fwdbyteen_lo_m, + input [3:0] io_stbuf_fwdbyteen_hi_m, + output [31:0] io_lsu_ld_data_corr_r, + input io_lsu_double_ecc_error_r, + input io_single_ecc_error_hi_r, + input io_single_ecc_error_lo_r, + input [31:0] io_sec_data_hi_r_ff, + input [31:0] io_sec_data_lo_r_ff, + input [6:0] io_sec_data_ecc_hi_r_ff, + input [6:0] io_sec_data_ecc_lo_r_ff, + output [31:0] io_dccm_rdata_hi_m, + output [31:0] io_dccm_rdata_lo_m, + output [6:0] io_dccm_data_ecc_hi_m, + output [6:0] io_dccm_data_ecc_lo_m, + output [31:0] io_lsu_ld_data_m, + input io_lsu_double_ecc_error_m, + input [31:0] io_sec_data_hi_m, + input [31:0] io_sec_data_lo_m, + input [31:0] io_store_data_m, + input io_dma_dccm_wen, + input io_dma_pic_wen, + input [2:0] io_dma_mem_tag_m, + input [31:0] io_dma_mem_addr, + input [63:0] io_dma_mem_wdata, + input [31:0] io_dma_dccm_wdata_lo, + input [31:0] io_dma_dccm_wdata_hi, + input [6:0] io_dma_dccm_wdata_ecc_hi, + input [6:0] io_dma_dccm_wdata_ecc_lo, + output [31:0] io_store_data_hi_r, + output [31:0] io_store_data_lo_r, + output [31:0] io_store_datafn_hi_r, + output [31:0] io_store_datafn_lo_r, + output [31:0] io_store_data_r, + output io_ld_single_ecc_error_r, + output io_ld_single_ecc_error_r_ff, + output [31:0] io_picm_mask_data_m, + output io_lsu_stbuf_commit_any, + output io_lsu_dccm_rden_m, + output io_dccm_dma_rvalid, + output io_dccm_dma_ecc_error, + output [2:0] io_dccm_dma_rtag, + output [63:0] io_dccm_dma_rdata, + output io_dccm_wren, + output io_dccm_rden, + output [15:0] io_dccm_wr_addr_lo, + output [38:0] io_dccm_wr_data_lo, + output [15:0] io_dccm_rd_addr_lo, + input [38:0] io_dccm_rd_data_lo, + output [15:0] io_dccm_wr_addr_hi, + output [38:0] io_dccm_wr_data_hi, + output [15:0] io_dccm_rd_addr_hi, + input [38:0] io_dccm_rd_data_hi, + output io_picm_wren, + output io_picm_rden, + output io_picm_mken, + output [31:0] io_picm_rdaddr, + output [31:0] io_picm_wraddr, + output [31:0] io_picm_wr_data, + input [31:0] io_picm_rd_data, + input io_scan_mode +); +`ifdef RANDOMIZE_REG_INIT + reg [63:0] _RAND_0; + reg [31:0] _RAND_1; + reg [31:0] _RAND_2; + reg [31:0] _RAND_3; + reg [31:0] _RAND_4; + reg [31:0] _RAND_5; + reg [31:0] _RAND_6; + reg [31:0] _RAND_7; + reg [31:0] _RAND_8; +`endif // RANDOMIZE_REG_INIT + wire rvclkhdr_io_l1clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_io_clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_io_en; // @[el2_lib.scala 506:23] + wire rvclkhdr_io_scan_mode; // @[el2_lib.scala 506:23] + wire rvclkhdr_1_io_l1clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_1_io_clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_1_io_en; // @[el2_lib.scala 506:23] + wire rvclkhdr_1_io_scan_mode; // @[el2_lib.scala 506:23] + wire [63:0] picm_rd_data_m = {io_picm_rd_data,io_picm_rd_data}; // @[Cat.scala 29:58] + wire [63:0] dccm_rdata_corr_m = {io_sec_data_hi_m,io_sec_data_lo_m}; // @[Cat.scala 29:58] + wire [63:0] dccm_rdata_m = {io_dccm_rdata_hi_m,io_dccm_rdata_lo_m}; // @[Cat.scala 29:58] + wire _T = io_lsu_pkt_m_valid & io_lsu_pkt_m_load; // @[el2_lsu_dccm_ctl.scala 161:50] + reg [63:0] _T_2; // @[el2_lsu_dccm_ctl.scala 171:65] + wire [7:0] _T_3 = {io_stbuf_fwdbyteen_hi_m,io_stbuf_fwdbyteen_lo_m}; // @[Cat.scala 29:58] + wire [63:0] _T_6 = {io_stbuf_fwddata_hi_m,io_stbuf_fwddata_lo_m}; // @[Cat.scala 29:58] + wire [7:0] _T_11 = io_addr_in_pic_m ? picm_rd_data_m[7:0] : dccm_rdata_corr_m[7:0]; // @[el2_lsu_dccm_ctl.scala 172:213] + wire [7:0] _T_12 = _T_3[0] ? _T_6[7:0] : _T_11; // @[el2_lsu_dccm_ctl.scala 172:78] + wire [7:0] _T_16 = {{4'd0}, _T_12[7:4]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_18 = {_T_12[3:0], 4'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_20 = _T_18 & 8'hf0; // @[Bitwise.scala 103:75] + wire [7:0] _T_21 = _T_16 | _T_20; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_0 = {{2'd0}, _T_21[7:2]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_26 = _GEN_0 & 8'h33; // @[Bitwise.scala 103:31] + wire [7:0] _T_28 = {_T_21[5:0], 2'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_30 = _T_28 & 8'hcc; // @[Bitwise.scala 103:75] + wire [7:0] _T_31 = _T_26 | _T_30; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_1 = {{1'd0}, _T_31[7:1]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_36 = _GEN_1 & 8'h55; // @[Bitwise.scala 103:31] + wire [7:0] _T_38 = {_T_31[6:0], 1'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_40 = _T_38 & 8'haa; // @[Bitwise.scala 103:75] + wire [7:0] _T_41 = _T_36 | _T_40; // @[Bitwise.scala 103:39] + wire [7:0] _T_50 = io_addr_in_pic_m ? picm_rd_data_m[15:8] : dccm_rdata_corr_m[15:8]; // @[el2_lsu_dccm_ctl.scala 172:213] + wire [7:0] _T_51 = _T_3[1] ? _T_6[15:8] : _T_50; // @[el2_lsu_dccm_ctl.scala 172:78] + wire [7:0] _T_55 = {{4'd0}, _T_51[7:4]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_57 = {_T_51[3:0], 4'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_59 = _T_57 & 8'hf0; // @[Bitwise.scala 103:75] + wire [7:0] _T_60 = _T_55 | _T_59; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_2 = {{2'd0}, _T_60[7:2]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_65 = _GEN_2 & 8'h33; // @[Bitwise.scala 103:31] + wire [7:0] _T_67 = {_T_60[5:0], 2'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_69 = _T_67 & 8'hcc; // @[Bitwise.scala 103:75] + wire [7:0] _T_70 = _T_65 | _T_69; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_3 = {{1'd0}, _T_70[7:1]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_75 = _GEN_3 & 8'h55; // @[Bitwise.scala 103:31] + wire [7:0] _T_77 = {_T_70[6:0], 1'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_79 = _T_77 & 8'haa; // @[Bitwise.scala 103:75] + wire [7:0] _T_80 = _T_75 | _T_79; // @[Bitwise.scala 103:39] + wire [7:0] _T_89 = io_addr_in_pic_m ? picm_rd_data_m[23:16] : dccm_rdata_corr_m[23:16]; // @[el2_lsu_dccm_ctl.scala 172:213] + wire [7:0] _T_90 = _T_3[2] ? _T_6[23:16] : _T_89; // @[el2_lsu_dccm_ctl.scala 172:78] + wire [7:0] _T_94 = {{4'd0}, _T_90[7:4]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_96 = {_T_90[3:0], 4'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_98 = _T_96 & 8'hf0; // @[Bitwise.scala 103:75] + wire [7:0] _T_99 = _T_94 | _T_98; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_4 = {{2'd0}, _T_99[7:2]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_104 = _GEN_4 & 8'h33; // @[Bitwise.scala 103:31] + wire [7:0] _T_106 = {_T_99[5:0], 2'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_108 = _T_106 & 8'hcc; // @[Bitwise.scala 103:75] + wire [7:0] _T_109 = _T_104 | _T_108; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_5 = {{1'd0}, _T_109[7:1]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_114 = _GEN_5 & 8'h55; // @[Bitwise.scala 103:31] + wire [7:0] _T_116 = {_T_109[6:0], 1'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_118 = _T_116 & 8'haa; // @[Bitwise.scala 103:75] + wire [7:0] _T_119 = _T_114 | _T_118; // @[Bitwise.scala 103:39] + wire [7:0] _T_128 = io_addr_in_pic_m ? picm_rd_data_m[31:24] : dccm_rdata_corr_m[31:24]; // @[el2_lsu_dccm_ctl.scala 172:213] + wire [7:0] _T_129 = _T_3[3] ? _T_6[31:24] : _T_128; // @[el2_lsu_dccm_ctl.scala 172:78] + wire [7:0] _T_133 = {{4'd0}, _T_129[7:4]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_135 = {_T_129[3:0], 4'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_137 = _T_135 & 8'hf0; // @[Bitwise.scala 103:75] + wire [7:0] _T_138 = _T_133 | _T_137; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_6 = {{2'd0}, _T_138[7:2]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_143 = _GEN_6 & 8'h33; // @[Bitwise.scala 103:31] + wire [7:0] _T_145 = {_T_138[5:0], 2'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_147 = _T_145 & 8'hcc; // @[Bitwise.scala 103:75] + wire [7:0] _T_148 = _T_143 | _T_147; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_7 = {{1'd0}, _T_148[7:1]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_153 = _GEN_7 & 8'h55; // @[Bitwise.scala 103:31] + wire [7:0] _T_155 = {_T_148[6:0], 1'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_157 = _T_155 & 8'haa; // @[Bitwise.scala 103:75] + wire [7:0] _T_158 = _T_153 | _T_157; // @[Bitwise.scala 103:39] + wire [7:0] _T_167 = io_addr_in_pic_m ? picm_rd_data_m[39:32] : dccm_rdata_corr_m[39:32]; // @[el2_lsu_dccm_ctl.scala 172:213] + wire [7:0] _T_168 = _T_3[4] ? _T_6[39:32] : _T_167; // @[el2_lsu_dccm_ctl.scala 172:78] + wire [7:0] _T_172 = {{4'd0}, _T_168[7:4]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_174 = {_T_168[3:0], 4'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_176 = _T_174 & 8'hf0; // @[Bitwise.scala 103:75] + wire [7:0] _T_177 = _T_172 | _T_176; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_8 = {{2'd0}, _T_177[7:2]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_182 = _GEN_8 & 8'h33; // @[Bitwise.scala 103:31] + wire [7:0] _T_184 = {_T_177[5:0], 2'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_186 = _T_184 & 8'hcc; // @[Bitwise.scala 103:75] + wire [7:0] _T_187 = _T_182 | _T_186; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_9 = {{1'd0}, _T_187[7:1]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_192 = _GEN_9 & 8'h55; // @[Bitwise.scala 103:31] + wire [7:0] _T_194 = {_T_187[6:0], 1'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_196 = _T_194 & 8'haa; // @[Bitwise.scala 103:75] + wire [7:0] _T_197 = _T_192 | _T_196; // @[Bitwise.scala 103:39] + wire [7:0] _T_206 = io_addr_in_pic_m ? picm_rd_data_m[47:40] : dccm_rdata_corr_m[47:40]; // @[el2_lsu_dccm_ctl.scala 172:213] + wire [7:0] _T_207 = _T_3[5] ? _T_6[47:40] : _T_206; // @[el2_lsu_dccm_ctl.scala 172:78] + wire [7:0] _T_211 = {{4'd0}, _T_207[7:4]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_213 = {_T_207[3:0], 4'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_215 = _T_213 & 8'hf0; // @[Bitwise.scala 103:75] + wire [7:0] _T_216 = _T_211 | _T_215; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_10 = {{2'd0}, _T_216[7:2]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_221 = _GEN_10 & 8'h33; // @[Bitwise.scala 103:31] + wire [7:0] _T_223 = {_T_216[5:0], 2'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_225 = _T_223 & 8'hcc; // @[Bitwise.scala 103:75] + wire [7:0] _T_226 = _T_221 | _T_225; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_11 = {{1'd0}, _T_226[7:1]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_231 = _GEN_11 & 8'h55; // @[Bitwise.scala 103:31] + wire [7:0] _T_233 = {_T_226[6:0], 1'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_235 = _T_233 & 8'haa; // @[Bitwise.scala 103:75] + wire [7:0] _T_236 = _T_231 | _T_235; // @[Bitwise.scala 103:39] + wire [7:0] _T_245 = io_addr_in_pic_m ? picm_rd_data_m[55:48] : dccm_rdata_corr_m[55:48]; // @[el2_lsu_dccm_ctl.scala 172:213] + wire [7:0] _T_246 = _T_3[6] ? _T_6[55:48] : _T_245; // @[el2_lsu_dccm_ctl.scala 172:78] + wire [7:0] _T_250 = {{4'd0}, _T_246[7:4]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_252 = {_T_246[3:0], 4'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_254 = _T_252 & 8'hf0; // @[Bitwise.scala 103:75] + wire [7:0] _T_255 = _T_250 | _T_254; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_12 = {{2'd0}, _T_255[7:2]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_260 = _GEN_12 & 8'h33; // @[Bitwise.scala 103:31] + wire [7:0] _T_262 = {_T_255[5:0], 2'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_264 = _T_262 & 8'hcc; // @[Bitwise.scala 103:75] + wire [7:0] _T_265 = _T_260 | _T_264; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_13 = {{1'd0}, _T_265[7:1]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_270 = _GEN_13 & 8'h55; // @[Bitwise.scala 103:31] + wire [7:0] _T_272 = {_T_265[6:0], 1'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_274 = _T_272 & 8'haa; // @[Bitwise.scala 103:75] + wire [7:0] _T_275 = _T_270 | _T_274; // @[Bitwise.scala 103:39] + wire [7:0] _T_284 = io_addr_in_pic_m ? picm_rd_data_m[63:56] : dccm_rdata_corr_m[63:56]; // @[el2_lsu_dccm_ctl.scala 172:213] + wire [7:0] _T_285 = _T_3[7] ? _T_6[63:56] : _T_284; // @[el2_lsu_dccm_ctl.scala 172:78] + wire [7:0] _T_289 = {{4'd0}, _T_285[7:4]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_291 = {_T_285[3:0], 4'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_293 = _T_291 & 8'hf0; // @[Bitwise.scala 103:75] + wire [7:0] _T_294 = _T_289 | _T_293; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_14 = {{2'd0}, _T_294[7:2]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_299 = _GEN_14 & 8'h33; // @[Bitwise.scala 103:31] + wire [7:0] _T_301 = {_T_294[5:0], 2'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_303 = _T_301 & 8'hcc; // @[Bitwise.scala 103:75] + wire [7:0] _T_304 = _T_299 | _T_303; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_15 = {{1'd0}, _T_304[7:1]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_309 = _GEN_15 & 8'h55; // @[Bitwise.scala 103:31] + wire [7:0] _T_311 = {_T_304[6:0], 1'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_313 = _T_311 & 8'haa; // @[Bitwise.scala 103:75] + wire [7:0] _T_314 = _T_309 | _T_313; // @[Bitwise.scala 103:39] + wire [63:0] _T_322 = {_T_41,_T_80,_T_119,_T_158,_T_197,_T_236,_T_275,_T_314}; // @[Cat.scala 29:58] + wire [63:0] _T_326 = {{32'd0}, _T_322[63:32]}; // @[Bitwise.scala 103:31] + wire [63:0] _T_328 = {_T_322[31:0], 32'h0}; // @[Bitwise.scala 103:65] + wire [63:0] _T_330 = _T_328 & 64'hffffffff00000000; // @[Bitwise.scala 103:75] + wire [63:0] _T_331 = _T_326 | _T_330; // @[Bitwise.scala 103:39] + wire [63:0] _GEN_16 = {{16'd0}, _T_331[63:16]}; // @[Bitwise.scala 103:31] + wire [63:0] _T_336 = _GEN_16 & 64'hffff0000ffff; // @[Bitwise.scala 103:31] + wire [63:0] _T_338 = {_T_331[47:0], 16'h0}; // @[Bitwise.scala 103:65] + wire [63:0] _T_340 = _T_338 & 64'hffff0000ffff0000; // @[Bitwise.scala 103:75] + wire [63:0] _T_341 = _T_336 | _T_340; // @[Bitwise.scala 103:39] + wire [63:0] _GEN_17 = {{8'd0}, _T_341[63:8]}; // @[Bitwise.scala 103:31] + wire [63:0] _T_346 = _GEN_17 & 64'hff00ff00ff00ff; // @[Bitwise.scala 103:31] + wire [63:0] _T_348 = {_T_341[55:0], 8'h0}; // @[Bitwise.scala 103:65] + wire [63:0] _T_350 = _T_348 & 64'hff00ff00ff00ff00; // @[Bitwise.scala 103:75] + wire [63:0] _T_351 = _T_346 | _T_350; // @[Bitwise.scala 103:39] + wire [63:0] _GEN_18 = {{4'd0}, _T_351[63:4]}; // @[Bitwise.scala 103:31] + wire [63:0] _T_356 = _GEN_18 & 64'hf0f0f0f0f0f0f0f; // @[Bitwise.scala 103:31] + wire [63:0] _T_358 = {_T_351[59:0], 4'h0}; // @[Bitwise.scala 103:65] + wire [63:0] _T_360 = _T_358 & 64'hf0f0f0f0f0f0f0f0; // @[Bitwise.scala 103:75] + wire [63:0] _T_361 = _T_356 | _T_360; // @[Bitwise.scala 103:39] + wire [63:0] _GEN_19 = {{2'd0}, _T_361[63:2]}; // @[Bitwise.scala 103:31] + wire [63:0] _T_366 = _GEN_19 & 64'h3333333333333333; // @[Bitwise.scala 103:31] + wire [63:0] _T_368 = {_T_361[61:0], 2'h0}; // @[Bitwise.scala 103:65] + wire [63:0] _T_370 = _T_368 & 64'hcccccccccccccccc; // @[Bitwise.scala 103:75] + wire [63:0] _T_371 = _T_366 | _T_370; // @[Bitwise.scala 103:39] + wire [63:0] _GEN_20 = {{1'd0}, _T_371[63:1]}; // @[Bitwise.scala 103:31] + wire [63:0] _T_376 = _GEN_20 & 64'h5555555555555555; // @[Bitwise.scala 103:31] + wire [63:0] _T_378 = {_T_371[62:0], 1'h0}; // @[Bitwise.scala 103:65] + wire [63:0] _T_380 = _T_378 & 64'haaaaaaaaaaaaaaaa; // @[Bitwise.scala 103:75] + wire [63:0] lsu_rdata_corr_m = _T_376 | _T_380; // @[Bitwise.scala 103:39] + wire [7:0] _T_390 = io_addr_in_pic_m ? picm_rd_data_m[7:0] : dccm_rdata_m[7:0]; // @[el2_lsu_dccm_ctl.scala 173:213] + wire [7:0] _T_391 = _T_3[0] ? _T_6[7:0] : _T_390; // @[el2_lsu_dccm_ctl.scala 173:78] + wire [7:0] _T_395 = {{4'd0}, _T_391[7:4]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_397 = {_T_391[3:0], 4'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_399 = _T_397 & 8'hf0; // @[Bitwise.scala 103:75] + wire [7:0] _T_400 = _T_395 | _T_399; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_21 = {{2'd0}, _T_400[7:2]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_405 = _GEN_21 & 8'h33; // @[Bitwise.scala 103:31] + wire [7:0] _T_407 = {_T_400[5:0], 2'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_409 = _T_407 & 8'hcc; // @[Bitwise.scala 103:75] + wire [7:0] _T_410 = _T_405 | _T_409; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_22 = {{1'd0}, _T_410[7:1]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_415 = _GEN_22 & 8'h55; // @[Bitwise.scala 103:31] + wire [7:0] _T_417 = {_T_410[6:0], 1'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_419 = _T_417 & 8'haa; // @[Bitwise.scala 103:75] + wire [7:0] _T_420 = _T_415 | _T_419; // @[Bitwise.scala 103:39] + wire [7:0] _T_429 = io_addr_in_pic_m ? picm_rd_data_m[15:8] : dccm_rdata_m[15:8]; // @[el2_lsu_dccm_ctl.scala 173:213] + wire [7:0] _T_430 = _T_3[1] ? _T_6[15:8] : _T_429; // @[el2_lsu_dccm_ctl.scala 173:78] + wire [7:0] _T_434 = {{4'd0}, _T_430[7:4]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_436 = {_T_430[3:0], 4'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_438 = _T_436 & 8'hf0; // @[Bitwise.scala 103:75] + wire [7:0] _T_439 = _T_434 | _T_438; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_23 = {{2'd0}, _T_439[7:2]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_444 = _GEN_23 & 8'h33; // @[Bitwise.scala 103:31] + wire [7:0] _T_446 = {_T_439[5:0], 2'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_448 = _T_446 & 8'hcc; // @[Bitwise.scala 103:75] + wire [7:0] _T_449 = _T_444 | _T_448; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_24 = {{1'd0}, _T_449[7:1]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_454 = _GEN_24 & 8'h55; // @[Bitwise.scala 103:31] + wire [7:0] _T_456 = {_T_449[6:0], 1'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_458 = _T_456 & 8'haa; // @[Bitwise.scala 103:75] + wire [7:0] _T_459 = _T_454 | _T_458; // @[Bitwise.scala 103:39] + wire [7:0] _T_468 = io_addr_in_pic_m ? picm_rd_data_m[23:16] : dccm_rdata_m[23:16]; // @[el2_lsu_dccm_ctl.scala 173:213] + wire [7:0] _T_469 = _T_3[2] ? _T_6[23:16] : _T_468; // @[el2_lsu_dccm_ctl.scala 173:78] + wire [7:0] _T_473 = {{4'd0}, _T_469[7:4]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_475 = {_T_469[3:0], 4'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_477 = _T_475 & 8'hf0; // @[Bitwise.scala 103:75] + wire [7:0] _T_478 = _T_473 | _T_477; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_25 = {{2'd0}, _T_478[7:2]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_483 = _GEN_25 & 8'h33; // @[Bitwise.scala 103:31] + wire [7:0] _T_485 = {_T_478[5:0], 2'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_487 = _T_485 & 8'hcc; // @[Bitwise.scala 103:75] + wire [7:0] _T_488 = _T_483 | _T_487; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_26 = {{1'd0}, _T_488[7:1]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_493 = _GEN_26 & 8'h55; // @[Bitwise.scala 103:31] + wire [7:0] _T_495 = {_T_488[6:0], 1'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_497 = _T_495 & 8'haa; // @[Bitwise.scala 103:75] + wire [7:0] _T_498 = _T_493 | _T_497; // @[Bitwise.scala 103:39] + wire [7:0] _T_507 = io_addr_in_pic_m ? picm_rd_data_m[31:24] : dccm_rdata_m[31:24]; // @[el2_lsu_dccm_ctl.scala 173:213] + wire [7:0] _T_508 = _T_3[3] ? _T_6[31:24] : _T_507; // @[el2_lsu_dccm_ctl.scala 173:78] + wire [7:0] _T_512 = {{4'd0}, _T_508[7:4]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_514 = {_T_508[3:0], 4'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_516 = _T_514 & 8'hf0; // @[Bitwise.scala 103:75] + wire [7:0] _T_517 = _T_512 | _T_516; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_27 = {{2'd0}, _T_517[7:2]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_522 = _GEN_27 & 8'h33; // @[Bitwise.scala 103:31] + wire [7:0] _T_524 = {_T_517[5:0], 2'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_526 = _T_524 & 8'hcc; // @[Bitwise.scala 103:75] + wire [7:0] _T_527 = _T_522 | _T_526; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_28 = {{1'd0}, _T_527[7:1]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_532 = _GEN_28 & 8'h55; // @[Bitwise.scala 103:31] + wire [7:0] _T_534 = {_T_527[6:0], 1'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_536 = _T_534 & 8'haa; // @[Bitwise.scala 103:75] + wire [7:0] _T_537 = _T_532 | _T_536; // @[Bitwise.scala 103:39] + wire [7:0] _T_546 = io_addr_in_pic_m ? picm_rd_data_m[39:32] : dccm_rdata_m[39:32]; // @[el2_lsu_dccm_ctl.scala 173:213] + wire [7:0] _T_547 = _T_3[4] ? _T_6[39:32] : _T_546; // @[el2_lsu_dccm_ctl.scala 173:78] + wire [7:0] _T_551 = {{4'd0}, _T_547[7:4]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_553 = {_T_547[3:0], 4'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_555 = _T_553 & 8'hf0; // @[Bitwise.scala 103:75] + wire [7:0] _T_556 = _T_551 | _T_555; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_29 = {{2'd0}, _T_556[7:2]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_561 = _GEN_29 & 8'h33; // @[Bitwise.scala 103:31] + wire [7:0] _T_563 = {_T_556[5:0], 2'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_565 = _T_563 & 8'hcc; // @[Bitwise.scala 103:75] + wire [7:0] _T_566 = _T_561 | _T_565; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_30 = {{1'd0}, _T_566[7:1]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_571 = _GEN_30 & 8'h55; // @[Bitwise.scala 103:31] + wire [7:0] _T_573 = {_T_566[6:0], 1'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_575 = _T_573 & 8'haa; // @[Bitwise.scala 103:75] + wire [7:0] _T_576 = _T_571 | _T_575; // @[Bitwise.scala 103:39] + wire [7:0] _T_585 = io_addr_in_pic_m ? picm_rd_data_m[47:40] : dccm_rdata_m[47:40]; // @[el2_lsu_dccm_ctl.scala 173:213] + wire [7:0] _T_586 = _T_3[5] ? _T_6[47:40] : _T_585; // @[el2_lsu_dccm_ctl.scala 173:78] + wire [7:0] _T_590 = {{4'd0}, _T_586[7:4]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_592 = {_T_586[3:0], 4'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_594 = _T_592 & 8'hf0; // @[Bitwise.scala 103:75] + wire [7:0] _T_595 = _T_590 | _T_594; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_31 = {{2'd0}, _T_595[7:2]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_600 = _GEN_31 & 8'h33; // @[Bitwise.scala 103:31] + wire [7:0] _T_602 = {_T_595[5:0], 2'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_604 = _T_602 & 8'hcc; // @[Bitwise.scala 103:75] + wire [7:0] _T_605 = _T_600 | _T_604; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_32 = {{1'd0}, _T_605[7:1]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_610 = _GEN_32 & 8'h55; // @[Bitwise.scala 103:31] + wire [7:0] _T_612 = {_T_605[6:0], 1'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_614 = _T_612 & 8'haa; // @[Bitwise.scala 103:75] + wire [7:0] _T_615 = _T_610 | _T_614; // @[Bitwise.scala 103:39] + wire [7:0] _T_624 = io_addr_in_pic_m ? picm_rd_data_m[55:48] : dccm_rdata_m[55:48]; // @[el2_lsu_dccm_ctl.scala 173:213] + wire [7:0] _T_625 = _T_3[6] ? _T_6[55:48] : _T_624; // @[el2_lsu_dccm_ctl.scala 173:78] + wire [7:0] _T_629 = {{4'd0}, _T_625[7:4]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_631 = {_T_625[3:0], 4'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_633 = _T_631 & 8'hf0; // @[Bitwise.scala 103:75] + wire [7:0] _T_634 = _T_629 | _T_633; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_33 = {{2'd0}, _T_634[7:2]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_639 = _GEN_33 & 8'h33; // @[Bitwise.scala 103:31] + wire [7:0] _T_641 = {_T_634[5:0], 2'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_643 = _T_641 & 8'hcc; // @[Bitwise.scala 103:75] + wire [7:0] _T_644 = _T_639 | _T_643; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_34 = {{1'd0}, _T_644[7:1]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_649 = _GEN_34 & 8'h55; // @[Bitwise.scala 103:31] + wire [7:0] _T_651 = {_T_644[6:0], 1'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_653 = _T_651 & 8'haa; // @[Bitwise.scala 103:75] + wire [7:0] _T_654 = _T_649 | _T_653; // @[Bitwise.scala 103:39] + wire [7:0] _T_663 = io_addr_in_pic_m ? picm_rd_data_m[63:56] : dccm_rdata_m[63:56]; // @[el2_lsu_dccm_ctl.scala 173:213] + wire [7:0] _T_664 = _T_3[7] ? _T_6[63:56] : _T_663; // @[el2_lsu_dccm_ctl.scala 173:78] + wire [7:0] _T_668 = {{4'd0}, _T_664[7:4]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_670 = {_T_664[3:0], 4'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_672 = _T_670 & 8'hf0; // @[Bitwise.scala 103:75] + wire [7:0] _T_673 = _T_668 | _T_672; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_35 = {{2'd0}, _T_673[7:2]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_678 = _GEN_35 & 8'h33; // @[Bitwise.scala 103:31] + wire [7:0] _T_680 = {_T_673[5:0], 2'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_682 = _T_680 & 8'hcc; // @[Bitwise.scala 103:75] + wire [7:0] _T_683 = _T_678 | _T_682; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_36 = {{1'd0}, _T_683[7:1]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_688 = _GEN_36 & 8'h55; // @[Bitwise.scala 103:31] + wire [7:0] _T_690 = {_T_683[6:0], 1'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_692 = _T_690 & 8'haa; // @[Bitwise.scala 103:75] + wire [7:0] _T_693 = _T_688 | _T_692; // @[Bitwise.scala 103:39] + wire [63:0] _T_701 = {_T_420,_T_459,_T_498,_T_537,_T_576,_T_615,_T_654,_T_693}; // @[Cat.scala 29:58] + wire [63:0] _T_705 = {{32'd0}, _T_701[63:32]}; // @[Bitwise.scala 103:31] + wire [63:0] _T_707 = {_T_701[31:0], 32'h0}; // @[Bitwise.scala 103:65] + wire [63:0] _T_709 = _T_707 & 64'hffffffff00000000; // @[Bitwise.scala 103:75] + wire [63:0] _T_710 = _T_705 | _T_709; // @[Bitwise.scala 103:39] + wire [63:0] _GEN_37 = {{16'd0}, _T_710[63:16]}; // @[Bitwise.scala 103:31] + wire [63:0] _T_715 = _GEN_37 & 64'hffff0000ffff; // @[Bitwise.scala 103:31] + wire [63:0] _T_717 = {_T_710[47:0], 16'h0}; // @[Bitwise.scala 103:65] + wire [63:0] _T_719 = _T_717 & 64'hffff0000ffff0000; // @[Bitwise.scala 103:75] + wire [63:0] _T_720 = _T_715 | _T_719; // @[Bitwise.scala 103:39] + wire [63:0] _GEN_38 = {{8'd0}, _T_720[63:8]}; // @[Bitwise.scala 103:31] + wire [63:0] _T_725 = _GEN_38 & 64'hff00ff00ff00ff; // @[Bitwise.scala 103:31] + wire [63:0] _T_727 = {_T_720[55:0], 8'h0}; // @[Bitwise.scala 103:65] + wire [63:0] _T_729 = _T_727 & 64'hff00ff00ff00ff00; // @[Bitwise.scala 103:75] + wire [63:0] _T_730 = _T_725 | _T_729; // @[Bitwise.scala 103:39] + wire [63:0] _GEN_39 = {{4'd0}, _T_730[63:4]}; // @[Bitwise.scala 103:31] + wire [63:0] _T_735 = _GEN_39 & 64'hf0f0f0f0f0f0f0f; // @[Bitwise.scala 103:31] + wire [63:0] _T_737 = {_T_730[59:0], 4'h0}; // @[Bitwise.scala 103:65] + wire [63:0] _T_739 = _T_737 & 64'hf0f0f0f0f0f0f0f0; // @[Bitwise.scala 103:75] + wire [63:0] _T_740 = _T_735 | _T_739; // @[Bitwise.scala 103:39] + wire [63:0] _GEN_40 = {{2'd0}, _T_740[63:2]}; // @[Bitwise.scala 103:31] + wire [63:0] _T_745 = _GEN_40 & 64'h3333333333333333; // @[Bitwise.scala 103:31] + wire [63:0] _T_747 = {_T_740[61:0], 2'h0}; // @[Bitwise.scala 103:65] + wire [63:0] _T_749 = _T_747 & 64'hcccccccccccccccc; // @[Bitwise.scala 103:75] + wire [63:0] _T_750 = _T_745 | _T_749; // @[Bitwise.scala 103:39] + wire [63:0] _GEN_41 = {{1'd0}, _T_750[63:1]}; // @[Bitwise.scala 103:31] + wire [63:0] _T_755 = _GEN_41 & 64'h5555555555555555; // @[Bitwise.scala 103:31] + wire [63:0] _T_757 = {_T_750[62:0], 1'h0}; // @[Bitwise.scala 103:65] + wire [63:0] _T_759 = _T_757 & 64'haaaaaaaaaaaaaaaa; // @[Bitwise.scala 103:75] + wire [63:0] lsu_rdata_m = _T_755 | _T_759; // @[Bitwise.scala 103:39] + wire [3:0] _GEN_42 = {{2'd0}, io_lsu_addr_m[1:0]}; // @[el2_lsu_dccm_ctl.scala 174:49] + wire [5:0] _T_762 = 4'h8 * _GEN_42; // @[el2_lsu_dccm_ctl.scala 174:49] + wire [63:0] _T_763 = lsu_rdata_m >> _T_762; // @[el2_lsu_dccm_ctl.scala 174:43] + wire _T_769 = io_lsu_addr_d[15:2] == io_lsu_addr_r[15:2]; // @[el2_lsu_dccm_ctl.scala 179:60] + wire _T_772 = io_end_addr_d[15:2] == io_lsu_addr_r[15:2]; // @[el2_lsu_dccm_ctl.scala 179:133] + wire _T_773 = _T_769 | _T_772; // @[el2_lsu_dccm_ctl.scala 179:101] + wire _T_774 = _T_773 & io_lsu_pkt_d_valid; // @[el2_lsu_dccm_ctl.scala 179:175] + wire _T_775 = _T_774 & io_lsu_pkt_d_store; // @[el2_lsu_dccm_ctl.scala 179:196] + wire _T_776 = _T_775 & io_lsu_pkt_d_dma; // @[el2_lsu_dccm_ctl.scala 179:217] + wire _T_777 = _T_776 & io_addr_in_dccm_d; // @[el2_lsu_dccm_ctl.scala 179:236] + wire _T_780 = io_lsu_addr_m[15:2] == io_lsu_addr_r[15:2]; // @[el2_lsu_dccm_ctl.scala 180:37] + wire _T_783 = io_end_addr_m[15:2] == io_lsu_addr_r[15:2]; // @[el2_lsu_dccm_ctl.scala 180:110] + wire _T_784 = _T_780 | _T_783; // @[el2_lsu_dccm_ctl.scala 180:78] + wire _T_785 = _T_784 & io_lsu_pkt_m_valid; // @[el2_lsu_dccm_ctl.scala 180:152] + wire _T_786 = _T_785 & io_lsu_pkt_m_store; // @[el2_lsu_dccm_ctl.scala 180:173] + wire _T_787 = _T_786 & io_lsu_pkt_m_dma; // @[el2_lsu_dccm_ctl.scala 180:194] + wire _T_788 = _T_787 & io_addr_in_dccm_m; // @[el2_lsu_dccm_ctl.scala 180:213] + wire kill_ecc_corr_lo_r = _T_777 | _T_788; // @[el2_lsu_dccm_ctl.scala 179:257] + wire _T_791 = io_lsu_addr_d[15:2] == io_end_addr_r[15:2]; // @[el2_lsu_dccm_ctl.scala 182:60] + wire _T_794 = io_end_addr_d[15:2] == io_end_addr_r[15:2]; // @[el2_lsu_dccm_ctl.scala 182:133] + wire _T_795 = _T_791 | _T_794; // @[el2_lsu_dccm_ctl.scala 182:101] + wire _T_796 = _T_795 & io_lsu_pkt_d_valid; // @[el2_lsu_dccm_ctl.scala 182:175] + wire _T_797 = _T_796 & io_lsu_pkt_d_store; // @[el2_lsu_dccm_ctl.scala 182:196] + wire _T_798 = _T_797 & io_lsu_pkt_d_dma; // @[el2_lsu_dccm_ctl.scala 182:217] + wire _T_799 = _T_798 & io_addr_in_dccm_d; // @[el2_lsu_dccm_ctl.scala 182:236] + wire _T_802 = io_lsu_addr_m[15:2] == io_end_addr_r[15:2]; // @[el2_lsu_dccm_ctl.scala 183:37] + wire _T_805 = io_end_addr_m[15:2] == io_end_addr_r[15:2]; // @[el2_lsu_dccm_ctl.scala 183:110] + wire _T_806 = _T_802 | _T_805; // @[el2_lsu_dccm_ctl.scala 183:78] + wire _T_807 = _T_806 & io_lsu_pkt_m_valid; // @[el2_lsu_dccm_ctl.scala 183:152] + wire _T_808 = _T_807 & io_lsu_pkt_m_store; // @[el2_lsu_dccm_ctl.scala 183:173] + wire _T_809 = _T_808 & io_lsu_pkt_m_dma; // @[el2_lsu_dccm_ctl.scala 183:194] + wire _T_810 = _T_809 & io_addr_in_dccm_m; // @[el2_lsu_dccm_ctl.scala 183:213] + wire kill_ecc_corr_hi_r = _T_799 | _T_810; // @[el2_lsu_dccm_ctl.scala 182:257] + wire _T_811 = io_lsu_pkt_r_load & io_single_ecc_error_lo_r; // @[el2_lsu_dccm_ctl.scala 185:55] + wire _T_812 = ~io_lsu_raw_fwd_lo_r; // @[el2_lsu_dccm_ctl.scala 185:84] + wire ld_single_ecc_error_lo_r = _T_811 & _T_812; // @[el2_lsu_dccm_ctl.scala 185:82] + wire _T_813 = io_lsu_pkt_r_load & io_single_ecc_error_hi_r; // @[el2_lsu_dccm_ctl.scala 186:55] + wire _T_814 = ~io_lsu_raw_fwd_hi_r; // @[el2_lsu_dccm_ctl.scala 186:84] + wire ld_single_ecc_error_hi_r = _T_813 & _T_814; // @[el2_lsu_dccm_ctl.scala 186:82] + wire _T_815 = ld_single_ecc_error_lo_r | ld_single_ecc_error_hi_r; // @[el2_lsu_dccm_ctl.scala 187:63] + wire _T_816 = ~io_lsu_double_ecc_error_r; // @[el2_lsu_dccm_ctl.scala 187:93] + wire _T_818 = io_lsu_commit_r | io_lsu_pkt_r_dma; // @[el2_lsu_dccm_ctl.scala 188:81] + wire _T_819 = ld_single_ecc_error_lo_r & _T_818; // @[el2_lsu_dccm_ctl.scala 188:62] + wire _T_820 = ~kill_ecc_corr_lo_r; // @[el2_lsu_dccm_ctl.scala 188:103] + wire _T_822 = ld_single_ecc_error_hi_r & _T_818; // @[el2_lsu_dccm_ctl.scala 189:62] + wire _T_823 = ~kill_ecc_corr_hi_r; // @[el2_lsu_dccm_ctl.scala 189:103] + reg lsu_double_ecc_error_r_ff; // @[el2_lsu_dccm_ctl.scala 191:74] + reg ld_single_ecc_error_hi_r_ff; // @[el2_lsu_dccm_ctl.scala 192:74] + reg ld_single_ecc_error_lo_r_ff; // @[el2_lsu_dccm_ctl.scala 193:74] + reg [15:0] ld_sec_addr_hi_r_ff; // @[el2_lib.scala 512:16] + reg [15:0] ld_sec_addr_lo_r_ff; // @[el2_lib.scala 512:16] + wire _T_830 = io_lsu_pkt_d_word | io_lsu_pkt_d_dword; // @[el2_lsu_dccm_ctl.scala 197:110] + wire _T_831 = ~_T_830; // @[el2_lsu_dccm_ctl.scala 197:90] + wire _T_833 = io_lsu_addr_d[1:0] != 2'h0; // @[el2_lsu_dccm_ctl.scala 197:154] + wire _T_834 = _T_831 | _T_833; // @[el2_lsu_dccm_ctl.scala 197:132] + wire _T_835 = io_lsu_pkt_d_store & _T_834; // @[el2_lsu_dccm_ctl.scala 197:87] + wire _T_836 = io_lsu_pkt_d_load | _T_835; // @[el2_lsu_dccm_ctl.scala 197:65] + wire _T_837 = io_lsu_pkt_d_valid & _T_836; // @[el2_lsu_dccm_ctl.scala 197:44] + wire lsu_dccm_rden_d = _T_837 & io_addr_in_dccm_d; // @[el2_lsu_dccm_ctl.scala 197:171] + wire _T_838 = ld_single_ecc_error_lo_r_ff | ld_single_ecc_error_hi_r_ff; // @[el2_lsu_dccm_ctl.scala 200:63] + wire _T_839 = ~lsu_double_ecc_error_r_ff; // @[el2_lsu_dccm_ctl.scala 200:96] + wire _T_841 = lsu_dccm_rden_d | io_dma_dccm_wen; // @[el2_lsu_dccm_ctl.scala 201:75] + wire _T_842 = _T_841 | io_ld_single_ecc_error_r_ff; // @[el2_lsu_dccm_ctl.scala 201:93] + wire _T_843 = ~_T_842; // @[el2_lsu_dccm_ctl.scala 201:57] + wire _T_846 = io_stbuf_addr_any[3:2] == io_lsu_addr_d[3:2]; // @[el2_lsu_dccm_ctl.scala 202:95] + wire _T_849 = io_stbuf_addr_any[3:2] == io_end_addr_d[3:2]; // @[el2_lsu_dccm_ctl.scala 203:76] + wire _T_850 = _T_846 | _T_849; // @[el2_lsu_dccm_ctl.scala 202:171] + wire _T_851 = ~_T_850; // @[el2_lsu_dccm_ctl.scala 202:24] + wire _T_852 = lsu_dccm_rden_d & _T_851; // @[el2_lsu_dccm_ctl.scala 202:22] + wire _T_853 = _T_843 | _T_852; // @[el2_lsu_dccm_ctl.scala 201:124] + wire _T_855 = io_dma_dccm_wen | io_lsu_stbuf_commit_any; // @[el2_lsu_dccm_ctl.scala 207:41] + wire [15:0] _T_862 = ld_single_ecc_error_lo_r_ff ? ld_sec_addr_lo_r_ff : ld_sec_addr_hi_r_ff; // @[el2_lsu_dccm_ctl.scala 211:8] + wire [15:0] _T_866 = io_dma_dccm_wen ? io_lsu_addr_d[15:0] : io_stbuf_addr_any; // @[el2_lsu_dccm_ctl.scala 212:8] + wire [15:0] _T_872 = ld_single_ecc_error_hi_r_ff ? ld_sec_addr_hi_r_ff : ld_sec_addr_lo_r_ff; // @[el2_lsu_dccm_ctl.scala 215:8] + wire [15:0] _T_876 = io_dma_dccm_wen ? io_end_addr_d : io_stbuf_addr_any; // @[el2_lsu_dccm_ctl.scala 216:8] + wire _T_881 = ~ld_single_ecc_error_lo_r_ff; // @[el2_lsu_dccm_ctl.scala 222:36] + wire [38:0] _T_884 = {io_sec_data_ecc_lo_r_ff,io_sec_data_lo_r_ff}; // @[Cat.scala 29:58] + wire [38:0] _T_887 = {io_sec_data_ecc_hi_r_ff,io_sec_data_hi_r_ff}; // @[Cat.scala 29:58] + wire [38:0] _T_888 = _T_881 ? _T_884 : _T_887; // @[el2_lsu_dccm_ctl.scala 222:8] + wire [38:0] _T_892 = {io_dma_dccm_wdata_ecc_lo,io_dma_dccm_wdata_lo}; // @[Cat.scala 29:58] + wire [38:0] _T_895 = {io_stbuf_ecc_any,io_stbuf_data_any}; // @[Cat.scala 29:58] + wire [38:0] _T_896 = io_dma_dccm_wen ? _T_892 : _T_895; // @[el2_lsu_dccm_ctl.scala 224:8] + wire _T_899 = ~ld_single_ecc_error_hi_r_ff; // @[el2_lsu_dccm_ctl.scala 228:36] + wire [38:0] _T_906 = _T_899 ? _T_887 : _T_884; // @[el2_lsu_dccm_ctl.scala 228:8] + wire [38:0] _T_910 = {io_dma_dccm_wdata_ecc_hi,io_dma_dccm_wdata_hi}; // @[Cat.scala 29:58] + wire [38:0] _T_914 = io_dma_dccm_wen ? _T_910 : _T_895; // @[el2_lsu_dccm_ctl.scala 230:8] + wire [3:0] _T_917 = io_lsu_pkt_m_store ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] + wire [3:0] _T_919 = io_lsu_pkt_m_by ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] + wire [3:0] _T_920 = _T_919 & 4'h1; // @[el2_lsu_dccm_ctl.scala 234:84] + wire [3:0] _T_922 = io_lsu_pkt_m_half ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] + wire [3:0] _T_923 = _T_922 & 4'h3; // @[el2_lsu_dccm_ctl.scala 235:33] + wire [3:0] _T_924 = _T_920 | _T_923; // @[el2_lsu_dccm_ctl.scala 234:97] + wire [3:0] _T_926 = io_lsu_pkt_m_word ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] + wire [3:0] _T_928 = _T_924 | _T_926; // @[el2_lsu_dccm_ctl.scala 235:46] + wire [3:0] store_byteen_m = _T_917 & _T_928; // @[el2_lsu_dccm_ctl.scala 234:53] + wire [3:0] _T_930 = io_lsu_pkt_r_store ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] + wire [3:0] _T_932 = io_lsu_pkt_r_by ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] + wire [3:0] _T_933 = _T_932 & 4'h1; // @[el2_lsu_dccm_ctl.scala 238:84] + wire [3:0] _T_935 = io_lsu_pkt_r_half ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] + wire [3:0] _T_936 = _T_935 & 4'h3; // @[el2_lsu_dccm_ctl.scala 239:33] + wire [3:0] _T_937 = _T_933 | _T_936; // @[el2_lsu_dccm_ctl.scala 238:97] + wire [3:0] _T_939 = io_lsu_pkt_r_word ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] + wire [3:0] _T_941 = _T_937 | _T_939; // @[el2_lsu_dccm_ctl.scala 239:46] + wire [3:0] store_byteen_r = _T_930 & _T_941; // @[el2_lsu_dccm_ctl.scala 238:53] + wire [6:0] _GEN_44 = {{3'd0}, store_byteen_m}; // @[el2_lsu_dccm_ctl.scala 242:45] + wire [6:0] _T_944 = _GEN_44 << io_lsu_addr_m[1:0]; // @[el2_lsu_dccm_ctl.scala 242:45] + wire [6:0] _GEN_45 = {{3'd0}, store_byteen_r}; // @[el2_lsu_dccm_ctl.scala 244:45] + wire [6:0] _T_947 = _GEN_45 << io_lsu_addr_r[1:0]; // @[el2_lsu_dccm_ctl.scala 244:45] + wire _T_950 = io_stbuf_addr_any[15:2] == io_lsu_addr_m[15:2]; // @[el2_lsu_dccm_ctl.scala 247:67] + wire dccm_wr_bypass_d_m_lo = _T_950 & io_addr_in_dccm_m; // @[el2_lsu_dccm_ctl.scala 247:101] + wire _T_953 = io_stbuf_addr_any[15:2] == io_end_addr_m[15:2]; // @[el2_lsu_dccm_ctl.scala 248:67] + wire dccm_wr_bypass_d_m_hi = _T_953 & io_addr_in_dccm_m; // @[el2_lsu_dccm_ctl.scala 248:101] + wire _T_956 = io_stbuf_addr_any[15:2] == io_lsu_addr_r[15:2]; // @[el2_lsu_dccm_ctl.scala 250:67] + wire dccm_wr_bypass_d_r_lo = _T_956 & io_addr_in_dccm_r; // @[el2_lsu_dccm_ctl.scala 250:101] + wire [63:0] _T_962 = {32'h0,io_store_data_m}; // @[Cat.scala 29:58] + wire [126:0] _GEN_47 = {{63'd0}, _T_962}; // @[el2_lsu_dccm_ctl.scala 280:72] + wire [126:0] _T_965 = _GEN_47 << _T_762; // @[el2_lsu_dccm_ctl.scala 280:72] + wire [63:0] store_data_pre_m = _T_965[63:0]; // @[el2_lsu_dccm_ctl.scala 280:29] + wire [31:0] store_data_hi_m = store_data_pre_m[63:32]; // @[el2_lsu_dccm_ctl.scala 281:48] + wire [31:0] store_data_lo_m = store_data_pre_m[31:0]; // @[el2_lsu_dccm_ctl.scala 282:48] + wire [7:0] store_byteen_ext_m = {{1'd0}, _T_944}; // @[el2_lsu_dccm_ctl.scala 242:22] + wire _T_971 = io_lsu_stbuf_commit_any & dccm_wr_bypass_d_m_lo; // @[el2_lsu_dccm_ctl.scala 283:211] + wire [7:0] _T_975 = _T_971 ? io_stbuf_data_any[7:0] : io_sec_data_lo_m[7:0]; // @[el2_lsu_dccm_ctl.scala 283:185] + wire [7:0] _T_976 = store_byteen_ext_m[0] ? store_data_lo_m[7:0] : _T_975; // @[el2_lsu_dccm_ctl.scala 283:120] + wire [7:0] _T_980 = {{4'd0}, _T_976[7:4]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_982 = {_T_976[3:0], 4'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_984 = _T_982 & 8'hf0; // @[Bitwise.scala 103:75] + wire [7:0] _T_985 = _T_980 | _T_984; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_48 = {{2'd0}, _T_985[7:2]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_990 = _GEN_48 & 8'h33; // @[Bitwise.scala 103:31] + wire [7:0] _T_992 = {_T_985[5:0], 2'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_994 = _T_992 & 8'hcc; // @[Bitwise.scala 103:75] + wire [7:0] _T_995 = _T_990 | _T_994; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_49 = {{1'd0}, _T_995[7:1]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_1000 = _GEN_49 & 8'h55; // @[Bitwise.scala 103:31] + wire [7:0] _T_1002 = {_T_995[6:0], 1'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_1004 = _T_1002 & 8'haa; // @[Bitwise.scala 103:75] + wire [7:0] _T_1005 = _T_1000 | _T_1004; // @[Bitwise.scala 103:39] + wire [7:0] _T_1013 = _T_971 ? io_stbuf_data_any[15:8] : io_sec_data_lo_m[15:8]; // @[el2_lsu_dccm_ctl.scala 283:185] + wire [7:0] _T_1014 = store_byteen_ext_m[1] ? store_data_lo_m[15:8] : _T_1013; // @[el2_lsu_dccm_ctl.scala 283:120] + wire [7:0] _T_1018 = {{4'd0}, _T_1014[7:4]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_1020 = {_T_1014[3:0], 4'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_1022 = _T_1020 & 8'hf0; // @[Bitwise.scala 103:75] + wire [7:0] _T_1023 = _T_1018 | _T_1022; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_50 = {{2'd0}, _T_1023[7:2]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_1028 = _GEN_50 & 8'h33; // @[Bitwise.scala 103:31] + wire [7:0] _T_1030 = {_T_1023[5:0], 2'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_1032 = _T_1030 & 8'hcc; // @[Bitwise.scala 103:75] + wire [7:0] _T_1033 = _T_1028 | _T_1032; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_51 = {{1'd0}, _T_1033[7:1]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_1038 = _GEN_51 & 8'h55; // @[Bitwise.scala 103:31] + wire [7:0] _T_1040 = {_T_1033[6:0], 1'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_1042 = _T_1040 & 8'haa; // @[Bitwise.scala 103:75] + wire [7:0] _T_1043 = _T_1038 | _T_1042; // @[Bitwise.scala 103:39] + wire [7:0] _T_1051 = _T_971 ? io_stbuf_data_any[23:16] : io_sec_data_lo_m[23:16]; // @[el2_lsu_dccm_ctl.scala 283:185] + wire [7:0] _T_1052 = store_byteen_ext_m[2] ? store_data_lo_m[23:16] : _T_1051; // @[el2_lsu_dccm_ctl.scala 283:120] + wire [7:0] _T_1056 = {{4'd0}, _T_1052[7:4]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_1058 = {_T_1052[3:0], 4'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_1060 = _T_1058 & 8'hf0; // @[Bitwise.scala 103:75] + wire [7:0] _T_1061 = _T_1056 | _T_1060; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_52 = {{2'd0}, _T_1061[7:2]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_1066 = _GEN_52 & 8'h33; // @[Bitwise.scala 103:31] + wire [7:0] _T_1068 = {_T_1061[5:0], 2'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_1070 = _T_1068 & 8'hcc; // @[Bitwise.scala 103:75] + wire [7:0] _T_1071 = _T_1066 | _T_1070; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_53 = {{1'd0}, _T_1071[7:1]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_1076 = _GEN_53 & 8'h55; // @[Bitwise.scala 103:31] + wire [7:0] _T_1078 = {_T_1071[6:0], 1'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_1080 = _T_1078 & 8'haa; // @[Bitwise.scala 103:75] + wire [7:0] _T_1081 = _T_1076 | _T_1080; // @[Bitwise.scala 103:39] + wire [7:0] _T_1089 = _T_971 ? io_stbuf_data_any[31:24] : io_sec_data_lo_m[31:24]; // @[el2_lsu_dccm_ctl.scala 283:185] + wire [7:0] _T_1090 = store_byteen_ext_m[3] ? store_data_lo_m[31:24] : _T_1089; // @[el2_lsu_dccm_ctl.scala 283:120] + wire [7:0] _T_1094 = {{4'd0}, _T_1090[7:4]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_1096 = {_T_1090[3:0], 4'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_1098 = _T_1096 & 8'hf0; // @[Bitwise.scala 103:75] + wire [7:0] _T_1099 = _T_1094 | _T_1098; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_54 = {{2'd0}, _T_1099[7:2]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_1104 = _GEN_54 & 8'h33; // @[Bitwise.scala 103:31] + wire [7:0] _T_1106 = {_T_1099[5:0], 2'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_1108 = _T_1106 & 8'hcc; // @[Bitwise.scala 103:75] + wire [7:0] _T_1109 = _T_1104 | _T_1108; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_55 = {{1'd0}, _T_1109[7:1]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_1114 = _GEN_55 & 8'h55; // @[Bitwise.scala 103:31] + wire [7:0] _T_1116 = {_T_1109[6:0], 1'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_1118 = _T_1116 & 8'haa; // @[Bitwise.scala 103:75] + wire [7:0] _T_1119 = _T_1114 | _T_1118; // @[Bitwise.scala 103:39] + wire [31:0] _T_1123 = {_T_1005,_T_1043,_T_1081,_T_1119}; // @[Cat.scala 29:58] + wire [31:0] _T_1127 = {{16'd0}, _T_1123[31:16]}; // @[Bitwise.scala 103:31] + wire [31:0] _T_1129 = {_T_1123[15:0], 16'h0}; // @[Bitwise.scala 103:65] + wire [31:0] _T_1131 = _T_1129 & 32'hffff0000; // @[Bitwise.scala 103:75] + wire [31:0] _T_1132 = _T_1127 | _T_1131; // @[Bitwise.scala 103:39] + wire [31:0] _GEN_56 = {{8'd0}, _T_1132[31:8]}; // @[Bitwise.scala 103:31] + wire [31:0] _T_1137 = _GEN_56 & 32'hff00ff; // @[Bitwise.scala 103:31] + wire [31:0] _T_1139 = {_T_1132[23:0], 8'h0}; // @[Bitwise.scala 103:65] + wire [31:0] _T_1141 = _T_1139 & 32'hff00ff00; // @[Bitwise.scala 103:75] + wire [31:0] _T_1142 = _T_1137 | _T_1141; // @[Bitwise.scala 103:39] + wire [31:0] _GEN_57 = {{4'd0}, _T_1142[31:4]}; // @[Bitwise.scala 103:31] + wire [31:0] _T_1147 = _GEN_57 & 32'hf0f0f0f; // @[Bitwise.scala 103:31] + wire [31:0] _T_1149 = {_T_1142[27:0], 4'h0}; // @[Bitwise.scala 103:65] + wire [31:0] _T_1151 = _T_1149 & 32'hf0f0f0f0; // @[Bitwise.scala 103:75] + wire [31:0] _T_1152 = _T_1147 | _T_1151; // @[Bitwise.scala 103:39] + wire [31:0] _GEN_58 = {{2'd0}, _T_1152[31:2]}; // @[Bitwise.scala 103:31] + wire [31:0] _T_1157 = _GEN_58 & 32'h33333333; // @[Bitwise.scala 103:31] + wire [31:0] _T_1159 = {_T_1152[29:0], 2'h0}; // @[Bitwise.scala 103:65] + wire [31:0] _T_1161 = _T_1159 & 32'hcccccccc; // @[Bitwise.scala 103:75] + wire [31:0] _T_1162 = _T_1157 | _T_1161; // @[Bitwise.scala 103:39] + wire [31:0] _GEN_59 = {{1'd0}, _T_1162[31:1]}; // @[Bitwise.scala 103:31] + wire [31:0] _T_1167 = _GEN_59 & 32'h55555555; // @[Bitwise.scala 103:31] + wire [31:0] _T_1169 = {_T_1162[30:0], 1'h0}; // @[Bitwise.scala 103:65] + wire [31:0] _T_1171 = _T_1169 & 32'haaaaaaaa; // @[Bitwise.scala 103:75] + reg [31:0] _T_1173; // @[el2_lsu_dccm_ctl.scala 283:72] + wire _T_1177 = io_lsu_stbuf_commit_any & dccm_wr_bypass_d_m_hi; // @[el2_lsu_dccm_ctl.scala 284:211] + wire [7:0] _T_1181 = _T_1177 ? io_stbuf_data_any[7:0] : io_sec_data_hi_m[7:0]; // @[el2_lsu_dccm_ctl.scala 284:185] + wire [7:0] _T_1182 = store_byteen_ext_m[4] ? store_data_hi_m[7:0] : _T_1181; // @[el2_lsu_dccm_ctl.scala 284:120] + wire [7:0] _T_1186 = {{4'd0}, _T_1182[7:4]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_1188 = {_T_1182[3:0], 4'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_1190 = _T_1188 & 8'hf0; // @[Bitwise.scala 103:75] + wire [7:0] _T_1191 = _T_1186 | _T_1190; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_60 = {{2'd0}, _T_1191[7:2]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_1196 = _GEN_60 & 8'h33; // @[Bitwise.scala 103:31] + wire [7:0] _T_1198 = {_T_1191[5:0], 2'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_1200 = _T_1198 & 8'hcc; // @[Bitwise.scala 103:75] + wire [7:0] _T_1201 = _T_1196 | _T_1200; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_61 = {{1'd0}, _T_1201[7:1]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_1206 = _GEN_61 & 8'h55; // @[Bitwise.scala 103:31] + wire [7:0] _T_1208 = {_T_1201[6:0], 1'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_1210 = _T_1208 & 8'haa; // @[Bitwise.scala 103:75] + wire [7:0] _T_1211 = _T_1206 | _T_1210; // @[Bitwise.scala 103:39] + wire [7:0] _T_1219 = _T_1177 ? io_stbuf_data_any[15:8] : io_sec_data_hi_m[15:8]; // @[el2_lsu_dccm_ctl.scala 284:185] + wire [7:0] _T_1220 = store_byteen_ext_m[5] ? store_data_hi_m[15:8] : _T_1219; // @[el2_lsu_dccm_ctl.scala 284:120] + wire [7:0] _T_1224 = {{4'd0}, _T_1220[7:4]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_1226 = {_T_1220[3:0], 4'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_1228 = _T_1226 & 8'hf0; // @[Bitwise.scala 103:75] + wire [7:0] _T_1229 = _T_1224 | _T_1228; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_62 = {{2'd0}, _T_1229[7:2]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_1234 = _GEN_62 & 8'h33; // @[Bitwise.scala 103:31] + wire [7:0] _T_1236 = {_T_1229[5:0], 2'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_1238 = _T_1236 & 8'hcc; // @[Bitwise.scala 103:75] + wire [7:0] _T_1239 = _T_1234 | _T_1238; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_63 = {{1'd0}, _T_1239[7:1]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_1244 = _GEN_63 & 8'h55; // @[Bitwise.scala 103:31] + wire [7:0] _T_1246 = {_T_1239[6:0], 1'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_1248 = _T_1246 & 8'haa; // @[Bitwise.scala 103:75] + wire [7:0] _T_1249 = _T_1244 | _T_1248; // @[Bitwise.scala 103:39] + wire [7:0] _T_1257 = _T_1177 ? io_stbuf_data_any[23:16] : io_sec_data_hi_m[23:16]; // @[el2_lsu_dccm_ctl.scala 284:185] + wire [7:0] _T_1258 = store_byteen_ext_m[6] ? store_data_hi_m[23:16] : _T_1257; // @[el2_lsu_dccm_ctl.scala 284:120] + wire [7:0] _T_1262 = {{4'd0}, _T_1258[7:4]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_1264 = {_T_1258[3:0], 4'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_1266 = _T_1264 & 8'hf0; // @[Bitwise.scala 103:75] + wire [7:0] _T_1267 = _T_1262 | _T_1266; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_64 = {{2'd0}, _T_1267[7:2]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_1272 = _GEN_64 & 8'h33; // @[Bitwise.scala 103:31] + wire [7:0] _T_1274 = {_T_1267[5:0], 2'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_1276 = _T_1274 & 8'hcc; // @[Bitwise.scala 103:75] + wire [7:0] _T_1277 = _T_1272 | _T_1276; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_65 = {{1'd0}, _T_1277[7:1]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_1282 = _GEN_65 & 8'h55; // @[Bitwise.scala 103:31] + wire [7:0] _T_1284 = {_T_1277[6:0], 1'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_1286 = _T_1284 & 8'haa; // @[Bitwise.scala 103:75] + wire [7:0] _T_1287 = _T_1282 | _T_1286; // @[Bitwise.scala 103:39] + wire [7:0] _T_1295 = _T_1177 ? io_stbuf_data_any[31:24] : io_sec_data_hi_m[31:24]; // @[el2_lsu_dccm_ctl.scala 284:185] + wire [7:0] _T_1296 = store_byteen_ext_m[7] ? store_data_hi_m[31:24] : _T_1295; // @[el2_lsu_dccm_ctl.scala 284:120] + wire [7:0] _T_1300 = {{4'd0}, _T_1296[7:4]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_1302 = {_T_1296[3:0], 4'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_1304 = _T_1302 & 8'hf0; // @[Bitwise.scala 103:75] + wire [7:0] _T_1305 = _T_1300 | _T_1304; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_66 = {{2'd0}, _T_1305[7:2]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_1310 = _GEN_66 & 8'h33; // @[Bitwise.scala 103:31] + wire [7:0] _T_1312 = {_T_1305[5:0], 2'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_1314 = _T_1312 & 8'hcc; // @[Bitwise.scala 103:75] + wire [7:0] _T_1315 = _T_1310 | _T_1314; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_67 = {{1'd0}, _T_1315[7:1]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_1320 = _GEN_67 & 8'h55; // @[Bitwise.scala 103:31] + wire [7:0] _T_1322 = {_T_1315[6:0], 1'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_1324 = _T_1322 & 8'haa; // @[Bitwise.scala 103:75] + wire [7:0] _T_1325 = _T_1320 | _T_1324; // @[Bitwise.scala 103:39] + wire [31:0] _T_1329 = {_T_1211,_T_1249,_T_1287,_T_1325}; // @[Cat.scala 29:58] + wire [31:0] _T_1333 = {{16'd0}, _T_1329[31:16]}; // @[Bitwise.scala 103:31] + wire [31:0] _T_1335 = {_T_1329[15:0], 16'h0}; // @[Bitwise.scala 103:65] + wire [31:0] _T_1337 = _T_1335 & 32'hffff0000; // @[Bitwise.scala 103:75] + wire [31:0] _T_1338 = _T_1333 | _T_1337; // @[Bitwise.scala 103:39] + wire [31:0] _GEN_68 = {{8'd0}, _T_1338[31:8]}; // @[Bitwise.scala 103:31] + wire [31:0] _T_1343 = _GEN_68 & 32'hff00ff; // @[Bitwise.scala 103:31] + wire [31:0] _T_1345 = {_T_1338[23:0], 8'h0}; // @[Bitwise.scala 103:65] + wire [31:0] _T_1347 = _T_1345 & 32'hff00ff00; // @[Bitwise.scala 103:75] + wire [31:0] _T_1348 = _T_1343 | _T_1347; // @[Bitwise.scala 103:39] + wire [31:0] _GEN_69 = {{4'd0}, _T_1348[31:4]}; // @[Bitwise.scala 103:31] + wire [31:0] _T_1353 = _GEN_69 & 32'hf0f0f0f; // @[Bitwise.scala 103:31] + wire [31:0] _T_1355 = {_T_1348[27:0], 4'h0}; // @[Bitwise.scala 103:65] + wire [31:0] _T_1357 = _T_1355 & 32'hf0f0f0f0; // @[Bitwise.scala 103:75] + wire [31:0] _T_1358 = _T_1353 | _T_1357; // @[Bitwise.scala 103:39] + wire [31:0] _GEN_70 = {{2'd0}, _T_1358[31:2]}; // @[Bitwise.scala 103:31] + wire [31:0] _T_1363 = _GEN_70 & 32'h33333333; // @[Bitwise.scala 103:31] + wire [31:0] _T_1365 = {_T_1358[29:0], 2'h0}; // @[Bitwise.scala 103:65] + wire [31:0] _T_1367 = _T_1365 & 32'hcccccccc; // @[Bitwise.scala 103:75] + wire [31:0] _T_1368 = _T_1363 | _T_1367; // @[Bitwise.scala 103:39] + wire [31:0] _GEN_71 = {{1'd0}, _T_1368[31:1]}; // @[Bitwise.scala 103:31] + wire [31:0] _T_1373 = _GEN_71 & 32'h55555555; // @[Bitwise.scala 103:31] + wire [31:0] _T_1375 = {_T_1368[30:0], 1'h0}; // @[Bitwise.scala 103:65] + wire [31:0] _T_1377 = _T_1375 & 32'haaaaaaaa; // @[Bitwise.scala 103:75] + reg [31:0] _T_1379; // @[el2_lsu_dccm_ctl.scala 284:72] + wire _T_1380 = io_lsu_stbuf_commit_any & dccm_wr_bypass_d_r_lo; // @[el2_lsu_dccm_ctl.scala 285:105] + wire [7:0] store_byteen_ext_r = {{1'd0}, _T_947}; // @[el2_lsu_dccm_ctl.scala 244:22] + wire _T_1382 = ~store_byteen_ext_r[0]; // @[el2_lsu_dccm_ctl.scala 285:131] + wire _T_1383 = _T_1380 & _T_1382; // @[el2_lsu_dccm_ctl.scala 285:129] + wire [7:0] _T_1387 = _T_1383 ? io_stbuf_data_any[7:0] : io_store_data_lo_r[7:0]; // @[el2_lsu_dccm_ctl.scala 285:79] + wire [7:0] _T_1391 = {{4'd0}, _T_1387[7:4]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_1393 = {_T_1387[3:0], 4'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_1395 = _T_1393 & 8'hf0; // @[Bitwise.scala 103:75] + wire [7:0] _T_1396 = _T_1391 | _T_1395; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_72 = {{2'd0}, _T_1396[7:2]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_1401 = _GEN_72 & 8'h33; // @[Bitwise.scala 103:31] + wire [7:0] _T_1403 = {_T_1396[5:0], 2'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_1405 = _T_1403 & 8'hcc; // @[Bitwise.scala 103:75] + wire [7:0] _T_1406 = _T_1401 | _T_1405; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_73 = {{1'd0}, _T_1406[7:1]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_1411 = _GEN_73 & 8'h55; // @[Bitwise.scala 103:31] + wire [7:0] _T_1413 = {_T_1406[6:0], 1'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_1415 = _T_1413 & 8'haa; // @[Bitwise.scala 103:75] + wire [7:0] _T_1416 = _T_1411 | _T_1415; // @[Bitwise.scala 103:39] + wire _T_1419 = ~store_byteen_ext_r[1]; // @[el2_lsu_dccm_ctl.scala 285:131] + wire _T_1420 = _T_1380 & _T_1419; // @[el2_lsu_dccm_ctl.scala 285:129] + wire [7:0] _T_1424 = _T_1420 ? io_stbuf_data_any[15:8] : io_store_data_lo_r[15:8]; // @[el2_lsu_dccm_ctl.scala 285:79] + wire [7:0] _T_1428 = {{4'd0}, _T_1424[7:4]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_1430 = {_T_1424[3:0], 4'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_1432 = _T_1430 & 8'hf0; // @[Bitwise.scala 103:75] + wire [7:0] _T_1433 = _T_1428 | _T_1432; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_74 = {{2'd0}, _T_1433[7:2]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_1438 = _GEN_74 & 8'h33; // @[Bitwise.scala 103:31] + wire [7:0] _T_1440 = {_T_1433[5:0], 2'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_1442 = _T_1440 & 8'hcc; // @[Bitwise.scala 103:75] + wire [7:0] _T_1443 = _T_1438 | _T_1442; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_75 = {{1'd0}, _T_1443[7:1]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_1448 = _GEN_75 & 8'h55; // @[Bitwise.scala 103:31] + wire [7:0] _T_1450 = {_T_1443[6:0], 1'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_1452 = _T_1450 & 8'haa; // @[Bitwise.scala 103:75] + wire [7:0] _T_1453 = _T_1448 | _T_1452; // @[Bitwise.scala 103:39] + wire _T_1456 = ~store_byteen_ext_r[2]; // @[el2_lsu_dccm_ctl.scala 285:131] + wire _T_1457 = _T_1380 & _T_1456; // @[el2_lsu_dccm_ctl.scala 285:129] + wire [7:0] _T_1461 = _T_1457 ? io_stbuf_data_any[23:16] : io_store_data_lo_r[23:16]; // @[el2_lsu_dccm_ctl.scala 285:79] + wire [7:0] _T_1465 = {{4'd0}, _T_1461[7:4]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_1467 = {_T_1461[3:0], 4'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_1469 = _T_1467 & 8'hf0; // @[Bitwise.scala 103:75] + wire [7:0] _T_1470 = _T_1465 | _T_1469; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_76 = {{2'd0}, _T_1470[7:2]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_1475 = _GEN_76 & 8'h33; // @[Bitwise.scala 103:31] + wire [7:0] _T_1477 = {_T_1470[5:0], 2'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_1479 = _T_1477 & 8'hcc; // @[Bitwise.scala 103:75] + wire [7:0] _T_1480 = _T_1475 | _T_1479; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_77 = {{1'd0}, _T_1480[7:1]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_1485 = _GEN_77 & 8'h55; // @[Bitwise.scala 103:31] + wire [7:0] _T_1487 = {_T_1480[6:0], 1'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_1489 = _T_1487 & 8'haa; // @[Bitwise.scala 103:75] + wire [7:0] _T_1490 = _T_1485 | _T_1489; // @[Bitwise.scala 103:39] + wire _T_1493 = ~store_byteen_ext_r[3]; // @[el2_lsu_dccm_ctl.scala 285:131] + wire _T_1494 = _T_1380 & _T_1493; // @[el2_lsu_dccm_ctl.scala 285:129] + wire [7:0] _T_1498 = _T_1494 ? io_stbuf_data_any[31:24] : io_store_data_lo_r[31:24]; // @[el2_lsu_dccm_ctl.scala 285:79] + wire [7:0] _T_1502 = {{4'd0}, _T_1498[7:4]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_1504 = {_T_1498[3:0], 4'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_1506 = _T_1504 & 8'hf0; // @[Bitwise.scala 103:75] + wire [7:0] _T_1507 = _T_1502 | _T_1506; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_78 = {{2'd0}, _T_1507[7:2]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_1512 = _GEN_78 & 8'h33; // @[Bitwise.scala 103:31] + wire [7:0] _T_1514 = {_T_1507[5:0], 2'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_1516 = _T_1514 & 8'hcc; // @[Bitwise.scala 103:75] + wire [7:0] _T_1517 = _T_1512 | _T_1516; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_79 = {{1'd0}, _T_1517[7:1]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_1522 = _GEN_79 & 8'h55; // @[Bitwise.scala 103:31] + wire [7:0] _T_1524 = {_T_1517[6:0], 1'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_1526 = _T_1524 & 8'haa; // @[Bitwise.scala 103:75] + wire [7:0] _T_1527 = _T_1522 | _T_1526; // @[Bitwise.scala 103:39] + wire [31:0] _T_1531 = {_T_1416,_T_1453,_T_1490,_T_1527}; // @[Cat.scala 29:58] + wire [31:0] _T_1535 = {{16'd0}, _T_1531[31:16]}; // @[Bitwise.scala 103:31] + wire [31:0] _T_1537 = {_T_1531[15:0], 16'h0}; // @[Bitwise.scala 103:65] + wire [31:0] _T_1539 = _T_1537 & 32'hffff0000; // @[Bitwise.scala 103:75] + wire [31:0] _T_1540 = _T_1535 | _T_1539; // @[Bitwise.scala 103:39] + wire [31:0] _GEN_80 = {{8'd0}, _T_1540[31:8]}; // @[Bitwise.scala 103:31] + wire [31:0] _T_1545 = _GEN_80 & 32'hff00ff; // @[Bitwise.scala 103:31] + wire [31:0] _T_1547 = {_T_1540[23:0], 8'h0}; // @[Bitwise.scala 103:65] + wire [31:0] _T_1549 = _T_1547 & 32'hff00ff00; // @[Bitwise.scala 103:75] + wire [31:0] _T_1550 = _T_1545 | _T_1549; // @[Bitwise.scala 103:39] + wire [31:0] _GEN_81 = {{4'd0}, _T_1550[31:4]}; // @[Bitwise.scala 103:31] + wire [31:0] _T_1555 = _GEN_81 & 32'hf0f0f0f; // @[Bitwise.scala 103:31] + wire [31:0] _T_1557 = {_T_1550[27:0], 4'h0}; // @[Bitwise.scala 103:65] + wire [31:0] _T_1559 = _T_1557 & 32'hf0f0f0f0; // @[Bitwise.scala 103:75] + wire [31:0] _T_1560 = _T_1555 | _T_1559; // @[Bitwise.scala 103:39] + wire [31:0] _GEN_82 = {{2'd0}, _T_1560[31:2]}; // @[Bitwise.scala 103:31] + wire [31:0] _T_1565 = _GEN_82 & 32'h33333333; // @[Bitwise.scala 103:31] + wire [31:0] _T_1567 = {_T_1560[29:0], 2'h0}; // @[Bitwise.scala 103:65] + wire [31:0] _T_1569 = _T_1567 & 32'hcccccccc; // @[Bitwise.scala 103:75] + wire [31:0] _T_1570 = _T_1565 | _T_1569; // @[Bitwise.scala 103:39] + wire [31:0] _GEN_83 = {{1'd0}, _T_1570[31:1]}; // @[Bitwise.scala 103:31] + wire [31:0] _T_1575 = _GEN_83 & 32'h55555555; // @[Bitwise.scala 103:31] + wire [31:0] _T_1577 = {_T_1570[30:0], 1'h0}; // @[Bitwise.scala 103:65] + wire [31:0] _T_1579 = _T_1577 & 32'haaaaaaaa; // @[Bitwise.scala 103:75] + wire [7:0] _T_1588 = _T_1383 ? io_stbuf_data_any[7:0] : io_store_data_hi_r[7:0]; // @[el2_lsu_dccm_ctl.scala 286:79] + wire [7:0] _T_1592 = {{4'd0}, _T_1588[7:4]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_1594 = {_T_1588[3:0], 4'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_1596 = _T_1594 & 8'hf0; // @[Bitwise.scala 103:75] + wire [7:0] _T_1597 = _T_1592 | _T_1596; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_84 = {{2'd0}, _T_1597[7:2]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_1602 = _GEN_84 & 8'h33; // @[Bitwise.scala 103:31] + wire [7:0] _T_1604 = {_T_1597[5:0], 2'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_1606 = _T_1604 & 8'hcc; // @[Bitwise.scala 103:75] + wire [7:0] _T_1607 = _T_1602 | _T_1606; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_85 = {{1'd0}, _T_1607[7:1]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_1612 = _GEN_85 & 8'h55; // @[Bitwise.scala 103:31] + wire [7:0] _T_1614 = {_T_1607[6:0], 1'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_1616 = _T_1614 & 8'haa; // @[Bitwise.scala 103:75] + wire [7:0] _T_1617 = _T_1612 | _T_1616; // @[Bitwise.scala 103:39] + wire [7:0] _T_1625 = _T_1420 ? io_stbuf_data_any[15:8] : io_store_data_hi_r[15:8]; // @[el2_lsu_dccm_ctl.scala 286:79] + wire [7:0] _T_1629 = {{4'd0}, _T_1625[7:4]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_1631 = {_T_1625[3:0], 4'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_1633 = _T_1631 & 8'hf0; // @[Bitwise.scala 103:75] + wire [7:0] _T_1634 = _T_1629 | _T_1633; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_86 = {{2'd0}, _T_1634[7:2]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_1639 = _GEN_86 & 8'h33; // @[Bitwise.scala 103:31] + wire [7:0] _T_1641 = {_T_1634[5:0], 2'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_1643 = _T_1641 & 8'hcc; // @[Bitwise.scala 103:75] + wire [7:0] _T_1644 = _T_1639 | _T_1643; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_87 = {{1'd0}, _T_1644[7:1]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_1649 = _GEN_87 & 8'h55; // @[Bitwise.scala 103:31] + wire [7:0] _T_1651 = {_T_1644[6:0], 1'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_1653 = _T_1651 & 8'haa; // @[Bitwise.scala 103:75] + wire [7:0] _T_1654 = _T_1649 | _T_1653; // @[Bitwise.scala 103:39] + wire [7:0] _T_1662 = _T_1457 ? io_stbuf_data_any[23:16] : io_store_data_hi_r[23:16]; // @[el2_lsu_dccm_ctl.scala 286:79] + wire [7:0] _T_1666 = {{4'd0}, _T_1662[7:4]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_1668 = {_T_1662[3:0], 4'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_1670 = _T_1668 & 8'hf0; // @[Bitwise.scala 103:75] + wire [7:0] _T_1671 = _T_1666 | _T_1670; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_88 = {{2'd0}, _T_1671[7:2]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_1676 = _GEN_88 & 8'h33; // @[Bitwise.scala 103:31] + wire [7:0] _T_1678 = {_T_1671[5:0], 2'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_1680 = _T_1678 & 8'hcc; // @[Bitwise.scala 103:75] + wire [7:0] _T_1681 = _T_1676 | _T_1680; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_89 = {{1'd0}, _T_1681[7:1]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_1686 = _GEN_89 & 8'h55; // @[Bitwise.scala 103:31] + wire [7:0] _T_1688 = {_T_1681[6:0], 1'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_1690 = _T_1688 & 8'haa; // @[Bitwise.scala 103:75] + wire [7:0] _T_1691 = _T_1686 | _T_1690; // @[Bitwise.scala 103:39] + wire [7:0] _T_1699 = _T_1494 ? io_stbuf_data_any[31:24] : io_store_data_hi_r[31:24]; // @[el2_lsu_dccm_ctl.scala 286:79] + wire [7:0] _T_1703 = {{4'd0}, _T_1699[7:4]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_1705 = {_T_1699[3:0], 4'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_1707 = _T_1705 & 8'hf0; // @[Bitwise.scala 103:75] + wire [7:0] _T_1708 = _T_1703 | _T_1707; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_90 = {{2'd0}, _T_1708[7:2]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_1713 = _GEN_90 & 8'h33; // @[Bitwise.scala 103:31] + wire [7:0] _T_1715 = {_T_1708[5:0], 2'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_1717 = _T_1715 & 8'hcc; // @[Bitwise.scala 103:75] + wire [7:0] _T_1718 = _T_1713 | _T_1717; // @[Bitwise.scala 103:39] + wire [7:0] _GEN_91 = {{1'd0}, _T_1718[7:1]}; // @[Bitwise.scala 103:31] + wire [7:0] _T_1723 = _GEN_91 & 8'h55; // @[Bitwise.scala 103:31] + wire [7:0] _T_1725 = {_T_1718[6:0], 1'h0}; // @[Bitwise.scala 103:65] + wire [7:0] _T_1727 = _T_1725 & 8'haa; // @[Bitwise.scala 103:75] + wire [7:0] _T_1728 = _T_1723 | _T_1727; // @[Bitwise.scala 103:39] + wire [31:0] _T_1732 = {_T_1617,_T_1654,_T_1691,_T_1728}; // @[Cat.scala 29:58] + wire [31:0] _T_1736 = {{16'd0}, _T_1732[31:16]}; // @[Bitwise.scala 103:31] + wire [31:0] _T_1738 = {_T_1732[15:0], 16'h0}; // @[Bitwise.scala 103:65] + wire [31:0] _T_1740 = _T_1738 & 32'hffff0000; // @[Bitwise.scala 103:75] + wire [31:0] _T_1741 = _T_1736 | _T_1740; // @[Bitwise.scala 103:39] + wire [31:0] _GEN_92 = {{8'd0}, _T_1741[31:8]}; // @[Bitwise.scala 103:31] + wire [31:0] _T_1746 = _GEN_92 & 32'hff00ff; // @[Bitwise.scala 103:31] + wire [31:0] _T_1748 = {_T_1741[23:0], 8'h0}; // @[Bitwise.scala 103:65] + wire [31:0] _T_1750 = _T_1748 & 32'hff00ff00; // @[Bitwise.scala 103:75] + wire [31:0] _T_1751 = _T_1746 | _T_1750; // @[Bitwise.scala 103:39] + wire [31:0] _GEN_93 = {{4'd0}, _T_1751[31:4]}; // @[Bitwise.scala 103:31] + wire [31:0] _T_1756 = _GEN_93 & 32'hf0f0f0f; // @[Bitwise.scala 103:31] + wire [31:0] _T_1758 = {_T_1751[27:0], 4'h0}; // @[Bitwise.scala 103:65] + wire [31:0] _T_1760 = _T_1758 & 32'hf0f0f0f0; // @[Bitwise.scala 103:75] + wire [31:0] _T_1761 = _T_1756 | _T_1760; // @[Bitwise.scala 103:39] + wire [31:0] _GEN_94 = {{2'd0}, _T_1761[31:2]}; // @[Bitwise.scala 103:31] + wire [31:0] _T_1766 = _GEN_94 & 32'h33333333; // @[Bitwise.scala 103:31] + wire [31:0] _T_1768 = {_T_1761[29:0], 2'h0}; // @[Bitwise.scala 103:65] + wire [31:0] _T_1770 = _T_1768 & 32'hcccccccc; // @[Bitwise.scala 103:75] + wire [31:0] _T_1771 = _T_1766 | _T_1770; // @[Bitwise.scala 103:39] + wire [31:0] _GEN_95 = {{1'd0}, _T_1771[31:1]}; // @[Bitwise.scala 103:31] + wire [31:0] _T_1776 = _GEN_95 & 32'h55555555; // @[Bitwise.scala 103:31] + wire [31:0] _T_1778 = {_T_1771[30:0], 1'h0}; // @[Bitwise.scala 103:65] + wire [31:0] _T_1780 = _T_1778 & 32'haaaaaaaa; // @[Bitwise.scala 103:75] + wire [63:0] _T_1784 = {io_store_data_hi_r,io_store_data_lo_r}; // @[Cat.scala 29:58] + wire [3:0] _GEN_96 = {{2'd0}, io_lsu_addr_r[1:0]}; // @[el2_lsu_dccm_ctl.scala 287:94] + wire [5:0] _T_1786 = 4'h8 * _GEN_96; // @[el2_lsu_dccm_ctl.scala 287:94] + wire [63:0] _T_1787 = _T_1784 >> _T_1786; // @[el2_lsu_dccm_ctl.scala 287:88] + wire [7:0] _T_1790 = store_byteen_r[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_1793 = store_byteen_r[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_1796 = store_byteen_r[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_1799 = store_byteen_r[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_1803 = {_T_1790,_T_1793,_T_1796,_T_1799}; // @[Cat.scala 29:58] + wire [31:0] _T_1807 = {{16'd0}, _T_1803[31:16]}; // @[Bitwise.scala 103:31] + wire [31:0] _T_1809 = {_T_1803[15:0], 16'h0}; // @[Bitwise.scala 103:65] + wire [31:0] _T_1811 = _T_1809 & 32'hffff0000; // @[Bitwise.scala 103:75] + wire [31:0] _T_1812 = _T_1807 | _T_1811; // @[Bitwise.scala 103:39] + wire [31:0] _GEN_97 = {{8'd0}, _T_1812[31:8]}; // @[Bitwise.scala 103:31] + wire [31:0] _T_1817 = _GEN_97 & 32'hff00ff; // @[Bitwise.scala 103:31] + wire [31:0] _T_1819 = {_T_1812[23:0], 8'h0}; // @[Bitwise.scala 103:65] + wire [31:0] _T_1821 = _T_1819 & 32'hff00ff00; // @[Bitwise.scala 103:75] + wire [31:0] _T_1822 = _T_1817 | _T_1821; // @[Bitwise.scala 103:39] + wire [31:0] _GEN_98 = {{4'd0}, _T_1822[31:4]}; // @[Bitwise.scala 103:31] + wire [31:0] _T_1827 = _GEN_98 & 32'hf0f0f0f; // @[Bitwise.scala 103:31] + wire [31:0] _T_1829 = {_T_1822[27:0], 4'h0}; // @[Bitwise.scala 103:65] + wire [31:0] _T_1831 = _T_1829 & 32'hf0f0f0f0; // @[Bitwise.scala 103:75] + wire [31:0] _T_1832 = _T_1827 | _T_1831; // @[Bitwise.scala 103:39] + wire [31:0] _GEN_99 = {{2'd0}, _T_1832[31:2]}; // @[Bitwise.scala 103:31] + wire [31:0] _T_1837 = _GEN_99 & 32'h33333333; // @[Bitwise.scala 103:31] + wire [31:0] _T_1839 = {_T_1832[29:0], 2'h0}; // @[Bitwise.scala 103:65] + wire [31:0] _T_1841 = _T_1839 & 32'hcccccccc; // @[Bitwise.scala 103:75] + wire [31:0] _T_1842 = _T_1837 | _T_1841; // @[Bitwise.scala 103:39] + wire [31:0] _GEN_100 = {{1'd0}, _T_1842[31:1]}; // @[Bitwise.scala 103:31] + wire [31:0] _T_1847 = _GEN_100 & 32'h55555555; // @[Bitwise.scala 103:31] + wire [31:0] _T_1849 = {_T_1842[30:0], 1'h0}; // @[Bitwise.scala 103:65] + wire [31:0] _T_1851 = _T_1849 & 32'haaaaaaaa; // @[Bitwise.scala 103:75] + wire [31:0] _T_1852 = _T_1847 | _T_1851; // @[Bitwise.scala 103:39] + wire [63:0] _GEN_101 = {{32'd0}, _T_1852}; // @[el2_lsu_dccm_ctl.scala 287:115] + wire [63:0] _T_1853 = _T_1787 & _GEN_101; // @[el2_lsu_dccm_ctl.scala 287:115] + wire _T_1858 = io_lsu_pkt_r_valid & io_lsu_pkt_r_store; // @[el2_lsu_dccm_ctl.scala 294:50] + wire _T_1859 = _T_1858 & io_addr_in_pic_r; // @[el2_lsu_dccm_ctl.scala 294:71] + wire _T_1860 = _T_1859 & io_lsu_commit_r; // @[el2_lsu_dccm_ctl.scala 294:90] + wire _T_1862 = io_lsu_pkt_d_valid & io_lsu_pkt_d_load; // @[el2_lsu_dccm_ctl.scala 295:50] + wire _T_1864 = io_lsu_pkt_d_valid & io_lsu_pkt_d_store; // @[el2_lsu_dccm_ctl.scala 296:50] + wire [31:0] _T_1868 = {17'h0,io_lsu_addr_d[14:0]}; // @[Cat.scala 29:58] + wire [14:0] _T_1874 = io_dma_pic_wen ? io_dma_mem_addr[14:0] : io_lsu_addr_r[14:0]; // @[el2_lsu_dccm_ctl.scala 298:77] + wire [31:0] _T_1875 = {17'h0,_T_1874}; // @[Cat.scala 29:58] + reg _T_1882; // @[el2_lsu_dccm_ctl.scala 303:61] + rvclkhdr rvclkhdr ( // @[el2_lib.scala 506:23] + .io_l1clk(rvclkhdr_io_l1clk), + .io_clk(rvclkhdr_io_clk), + .io_en(rvclkhdr_io_en), + .io_scan_mode(rvclkhdr_io_scan_mode) + ); + rvclkhdr rvclkhdr_1 ( // @[el2_lib.scala 506:23] + .io_l1clk(rvclkhdr_1_io_l1clk), + .io_clk(rvclkhdr_1_io_clk), + .io_en(rvclkhdr_1_io_en), + .io_scan_mode(rvclkhdr_1_io_scan_mode) + ); + assign io_lsu_ld_data_corr_r = _T_2[31:0]; // @[el2_lsu_dccm_ctl.scala 171:28] + assign io_dccm_rdata_hi_m = io_dccm_rd_data_hi[31:0]; // @[el2_lsu_dccm_ctl.scala 290:27] + assign io_dccm_rdata_lo_m = io_dccm_rd_data_lo[31:0]; // @[el2_lsu_dccm_ctl.scala 289:27] + assign io_dccm_data_ecc_hi_m = io_dccm_rd_data_hi[38:32]; // @[el2_lsu_dccm_ctl.scala 292:27] + assign io_dccm_data_ecc_lo_m = io_dccm_rd_data_lo[38:32]; // @[el2_lsu_dccm_ctl.scala 291:27] + assign io_lsu_ld_data_m = _T_763[31:0]; // @[el2_lsu_dccm_ctl.scala 174:28] + assign io_store_data_hi_r = _T_1379; // @[el2_lsu_dccm_ctl.scala 284:29] + assign io_store_data_lo_r = _T_1173; // @[el2_lsu_dccm_ctl.scala 283:29] + assign io_store_datafn_hi_r = _T_1776 | _T_1780; // @[el2_lsu_dccm_ctl.scala 286:29] + assign io_store_datafn_lo_r = _T_1575 | _T_1579; // @[el2_lsu_dccm_ctl.scala 285:29] + assign io_store_data_r = _T_1853[31:0]; // @[el2_lsu_dccm_ctl.scala 287:29] + assign io_ld_single_ecc_error_r = _T_815 & _T_816; // @[el2_lsu_dccm_ctl.scala 187:34] + assign io_ld_single_ecc_error_r_ff = _T_838 & _T_839; // @[el2_lsu_dccm_ctl.scala 200:31] + assign io_picm_mask_data_m = picm_rd_data_m[31:0]; // @[el2_lsu_dccm_ctl.scala 299:27] + assign io_lsu_stbuf_commit_any = io_stbuf_reqvld_any & _T_853; // @[el2_lsu_dccm_ctl.scala 201:31] + assign io_lsu_dccm_rden_m = _T_1882; // @[el2_lsu_dccm_ctl.scala 303:24] + assign io_dccm_dma_rvalid = _T & io_lsu_pkt_m_dma; // @[el2_lsu_dccm_ctl.scala 161:28] + assign io_dccm_dma_ecc_error = io_lsu_double_ecc_error_m; // @[el2_lsu_dccm_ctl.scala 162:28] + assign io_dccm_dma_rtag = io_dma_mem_tag_m; // @[el2_lsu_dccm_ctl.scala 164:28] + assign io_dccm_dma_rdata = _T_376 | _T_380; // @[el2_lsu_dccm_ctl.scala 163:28] + assign io_dccm_wren = _T_855 | io_ld_single_ecc_error_r_ff; // @[el2_lsu_dccm_ctl.scala 207:22] + assign io_dccm_rden = lsu_dccm_rden_d & io_addr_in_dccm_d; // @[el2_lsu_dccm_ctl.scala 208:22] + assign io_dccm_wr_addr_lo = io_ld_single_ecc_error_r_ff ? _T_862 : _T_866; // @[el2_lsu_dccm_ctl.scala 210:22] + assign io_dccm_wr_data_lo = io_ld_single_ecc_error_r_ff ? _T_888 : _T_896; // @[el2_lsu_dccm_ctl.scala 221:22] + assign io_dccm_rd_addr_lo = io_lsu_addr_d[15:0]; // @[el2_lsu_dccm_ctl.scala 218:22] + assign io_dccm_wr_addr_hi = io_ld_single_ecc_error_r_ff ? _T_872 : _T_876; // @[el2_lsu_dccm_ctl.scala 214:22] + assign io_dccm_wr_data_hi = io_ld_single_ecc_error_r_ff ? _T_906 : _T_914; // @[el2_lsu_dccm_ctl.scala 227:22] + assign io_dccm_rd_addr_hi = io_end_addr_d; // @[el2_lsu_dccm_ctl.scala 219:22] + assign io_picm_wren = _T_1860 | io_dma_pic_wen; // @[el2_lsu_dccm_ctl.scala 294:27] + assign io_picm_rden = _T_1862 & io_addr_in_pic_d; // @[el2_lsu_dccm_ctl.scala 295:27] + assign io_picm_mken = _T_1864 & io_addr_in_pic_d; // @[el2_lsu_dccm_ctl.scala 296:27] + assign io_picm_rdaddr = 32'hf00c0000 | _T_1868; // @[el2_lsu_dccm_ctl.scala 297:27] + assign io_picm_wraddr = 32'hf00c0000 | _T_1875; // @[el2_lsu_dccm_ctl.scala 298:27] + assign io_picm_wr_data = io_dma_pic_wen ? io_dma_mem_wdata[31:0] : io_store_datafn_lo_r; // @[el2_lsu_dccm_ctl.scala 300:27] + assign rvclkhdr_io_clk = clock; // @[el2_lib.scala 508:18] + assign rvclkhdr_io_en = io_ld_single_ecc_error_r; // @[el2_lib.scala 509:17] + assign rvclkhdr_io_scan_mode = io_scan_mode; // @[el2_lib.scala 510:24] + assign rvclkhdr_1_io_clk = clock; // @[el2_lib.scala 508:18] + assign rvclkhdr_1_io_en = io_ld_single_ecc_error_r; // @[el2_lib.scala 509:17] + assign rvclkhdr_1_io_scan_mode = io_scan_mode; // @[el2_lib.scala 510:24] +`ifdef RANDOMIZE_GARBAGE_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_INVALID_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_REG_INIT +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_MEM_INIT +`define RANDOMIZE +`endif +`ifndef RANDOM +`define RANDOM $random +`endif +`ifdef RANDOMIZE_MEM_INIT + integer initvar; +`endif +`ifndef SYNTHESIS +`ifdef FIRRTL_BEFORE_INITIAL +`FIRRTL_BEFORE_INITIAL +`endif +initial begin + `ifdef RANDOMIZE + `ifdef INIT_RANDOM + `INIT_RANDOM + `endif + `ifndef VERILATOR + `ifdef RANDOMIZE_DELAY + #`RANDOMIZE_DELAY begin end + `else + #0.002 begin end + `endif + `endif +`ifdef RANDOMIZE_REG_INIT + _RAND_0 = {2{`RANDOM}}; + _T_2 = _RAND_0[63:0]; + _RAND_1 = {1{`RANDOM}}; + lsu_double_ecc_error_r_ff = _RAND_1[0:0]; + _RAND_2 = {1{`RANDOM}}; + ld_single_ecc_error_hi_r_ff = _RAND_2[0:0]; + _RAND_3 = {1{`RANDOM}}; + ld_single_ecc_error_lo_r_ff = _RAND_3[0:0]; + _RAND_4 = {1{`RANDOM}}; + ld_sec_addr_hi_r_ff = _RAND_4[15:0]; + _RAND_5 = {1{`RANDOM}}; + ld_sec_addr_lo_r_ff = _RAND_5[15:0]; + _RAND_6 = {1{`RANDOM}}; + _T_1173 = _RAND_6[31:0]; + _RAND_7 = {1{`RANDOM}}; + _T_1379 = _RAND_7[31:0]; + _RAND_8 = {1{`RANDOM}}; + _T_1882 = _RAND_8[0:0]; +`endif // RANDOMIZE_REG_INIT + if (reset) begin + _T_2 = 64'h0; + end + if (reset) begin + lsu_double_ecc_error_r_ff = 1'h0; + end + if (reset) begin + ld_single_ecc_error_hi_r_ff = 1'h0; + end + if (reset) begin + ld_single_ecc_error_lo_r_ff = 1'h0; + end + if (reset) begin + ld_sec_addr_hi_r_ff = 16'h0; + end + if (reset) begin + ld_sec_addr_lo_r_ff = 16'h0; + end + if (reset) begin + _T_1173 = 32'h0; + end + if (reset) begin + _T_1379 = 32'h0; + end + if (reset) begin + _T_1882 = 1'h0; + end + `endif // RANDOMIZE +end // initial +`ifdef FIRRTL_AFTER_INITIAL +`FIRRTL_AFTER_INITIAL +`endif +`endif // SYNTHESIS + always @(posedge io_lsu_c2_r_clk or posedge reset) begin + if (reset) begin + _T_2 <= 64'h0; + end else begin + _T_2 <= lsu_rdata_corr_m >> _T_762; + end + end + always @(posedge io_lsu_free_c2_clk or posedge reset) begin + if (reset) begin + lsu_double_ecc_error_r_ff <= 1'h0; + end else begin + lsu_double_ecc_error_r_ff <= io_lsu_double_ecc_error_r; + end + end + always @(posedge io_lsu_free_c2_clk or posedge reset) begin + if (reset) begin + ld_single_ecc_error_hi_r_ff <= 1'h0; + end else begin + ld_single_ecc_error_hi_r_ff <= _T_822 & _T_823; + end + end + always @(posedge io_lsu_free_c2_clk or posedge reset) begin + if (reset) begin + ld_single_ecc_error_lo_r_ff <= 1'h0; + end else begin + ld_single_ecc_error_lo_r_ff <= _T_819 & _T_820; + end + end + always @(posedge rvclkhdr_io_l1clk or posedge reset) begin + if (reset) begin + ld_sec_addr_hi_r_ff <= 16'h0; + end else begin + ld_sec_addr_hi_r_ff <= io_end_addr_r; + end + end + always @(posedge rvclkhdr_1_io_l1clk or posedge reset) begin + if (reset) begin + ld_sec_addr_lo_r_ff <= 16'h0; + end else begin + ld_sec_addr_lo_r_ff <= io_lsu_addr_r[15:0]; + end + end + always @(posedge io_lsu_store_c1_r_clk or posedge reset) begin + if (reset) begin + _T_1173 <= 32'h0; + end else begin + _T_1173 <= _T_1167 | _T_1171; + end + end + always @(posedge io_lsu_store_c1_r_clk or posedge reset) begin + if (reset) begin + _T_1379 <= 32'h0; + end else begin + _T_1379 <= _T_1373 | _T_1377; + end + end + always @(posedge io_lsu_c2_m_clk or posedge reset) begin + if (reset) begin + _T_1882 <= 1'h0; + end else begin + _T_1882 <= _T_837 & io_addr_in_dccm_d; + end + end +endmodule +module el2_lsu_stbuf( + input clock, + input reset, + input io_lsu_c1_m_clk, + input io_lsu_c1_r_clk, + input io_lsu_stbuf_c1_clk, + input io_lsu_free_c2_clk, + input io_lsu_pkt_m_store, + input io_lsu_pkt_m_dma, + input io_lsu_pkt_m_valid, + input io_lsu_pkt_r_by, + input io_lsu_pkt_r_half, + input io_lsu_pkt_r_word, + input io_lsu_pkt_r_dword, + input io_lsu_pkt_r_store, + input io_lsu_pkt_r_dma, + input io_lsu_pkt_r_valid, + input io_store_stbuf_reqvld_r, + input io_lsu_commit_r, + input io_dec_lsu_valid_raw_d, + input [31:0] io_store_data_hi_r, + input [31:0] io_store_data_lo_r, + input [31:0] io_store_datafn_hi_r, + input [31:0] io_store_datafn_lo_r, + input io_lsu_stbuf_commit_any, + input [15:0] io_lsu_addr_d, + input [31:0] io_lsu_addr_m, + input [31:0] io_lsu_addr_r, + input [15:0] io_end_addr_d, + input [31:0] io_end_addr_m, + input [31:0] io_end_addr_r, + input io_addr_in_dccm_m, + input io_addr_in_dccm_r, + input io_scan_mode, + output io_stbuf_reqvld_any, + output io_stbuf_reqvld_flushed_any, + output [15:0] io_stbuf_addr_any, + output [31:0] io_stbuf_data_any, + output io_lsu_stbuf_full_any, + output io_lsu_stbuf_empty_any, + output io_ldst_stbuf_reqvld_r, + output [31:0] io_stbuf_fwddata_hi_m, + output [31:0] io_stbuf_fwddata_lo_m, + output [3:0] io_stbuf_fwdbyteen_hi_m, + output [3:0] io_stbuf_fwdbyteen_lo_m +); +`ifdef RANDOMIZE_REG_INIT + reg [31:0] _RAND_0; + reg [31:0] _RAND_1; + reg [31:0] _RAND_2; + reg [31:0] _RAND_3; + reg [31:0] _RAND_4; + reg [31:0] _RAND_5; + reg [31:0] _RAND_6; + reg [31:0] _RAND_7; + reg [31:0] _RAND_8; + reg [31:0] _RAND_9; + reg [31:0] _RAND_10; + reg [31:0] _RAND_11; + reg [31:0] _RAND_12; + reg [31:0] _RAND_13; + reg [31:0] _RAND_14; + reg [31:0] _RAND_15; + reg [31:0] _RAND_16; + reg [31:0] _RAND_17; + reg [31:0] _RAND_18; + reg [31:0] _RAND_19; + reg [31:0] _RAND_20; + reg [31:0] _RAND_21; + reg [31:0] _RAND_22; + reg [31:0] _RAND_23; +`endif // RANDOMIZE_REG_INIT + wire rvclkhdr_io_l1clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_io_clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_io_en; // @[el2_lib.scala 506:23] + wire rvclkhdr_io_scan_mode; // @[el2_lib.scala 506:23] + wire rvclkhdr_1_io_l1clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_1_io_clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_1_io_en; // @[el2_lib.scala 506:23] + wire rvclkhdr_1_io_scan_mode; // @[el2_lib.scala 506:23] + wire rvclkhdr_2_io_l1clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_2_io_clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_2_io_en; // @[el2_lib.scala 506:23] + wire rvclkhdr_2_io_scan_mode; // @[el2_lib.scala 506:23] + wire rvclkhdr_3_io_l1clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_3_io_clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_3_io_en; // @[el2_lib.scala 506:23] + wire rvclkhdr_3_io_scan_mode; // @[el2_lib.scala 506:23] + wire rvclkhdr_4_io_l1clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_4_io_clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_4_io_en; // @[el2_lib.scala 506:23] + wire rvclkhdr_4_io_scan_mode; // @[el2_lib.scala 506:23] + wire rvclkhdr_5_io_l1clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_5_io_clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_5_io_en; // @[el2_lib.scala 506:23] + wire rvclkhdr_5_io_scan_mode; // @[el2_lib.scala 506:23] + wire rvclkhdr_6_io_l1clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_6_io_clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_6_io_en; // @[el2_lib.scala 506:23] + wire rvclkhdr_6_io_scan_mode; // @[el2_lib.scala 506:23] + wire rvclkhdr_7_io_l1clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_7_io_clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_7_io_en; // @[el2_lib.scala 506:23] + wire rvclkhdr_7_io_scan_mode; // @[el2_lib.scala 506:23] + wire [1:0] _T_5 = io_lsu_pkt_r_half ? 2'h3 : 2'h0; // @[Mux.scala 27:72] + wire [3:0] _T_6 = io_lsu_pkt_r_word ? 4'hf : 4'h0; // @[Mux.scala 27:72] + wire [7:0] _T_7 = io_lsu_pkt_r_dword ? 8'hff : 8'h0; // @[Mux.scala 27:72] + wire [1:0] _GEN_10 = {{1'd0}, io_lsu_pkt_r_by}; // @[Mux.scala 27:72] + wire [1:0] _T_8 = _GEN_10 | _T_5; // @[Mux.scala 27:72] + wire [3:0] _GEN_11 = {{2'd0}, _T_8}; // @[Mux.scala 27:72] + wire [3:0] _T_9 = _GEN_11 | _T_6; // @[Mux.scala 27:72] + wire [7:0] _GEN_12 = {{4'd0}, _T_9}; // @[Mux.scala 27:72] + wire [7:0] ldst_byteen_r = _GEN_12 | _T_7; // @[Mux.scala 27:72] + wire ldst_dual_d = io_lsu_addr_d[2] != io_end_addr_d[2]; // @[el2_lsu_stbuf.scala 118:39] + reg ldst_dual_r; // @[el2_lsu_stbuf.scala 177:52] + wire dual_stbuf_write_r = ldst_dual_r & io_store_stbuf_reqvld_r; // @[el2_lsu_stbuf.scala 119:40] + wire [10:0] _GEN_13 = {{3'd0}, ldst_byteen_r}; // @[el2_lsu_stbuf.scala 121:39] + wire [10:0] _T_14 = _GEN_13 << io_lsu_addr_r[1:0]; // @[el2_lsu_stbuf.scala 121:39] + wire [7:0] store_byteen_ext_r = _T_14[7:0]; // @[el2_lsu_stbuf.scala 121:22] + wire [3:0] _T_17 = io_lsu_pkt_r_store ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] + wire [3:0] store_byteen_hi_r = store_byteen_ext_r[7:4] & _T_17; // @[el2_lsu_stbuf.scala 122:52] + wire [3:0] store_byteen_lo_r = store_byteen_ext_r[3:0] & _T_17; // @[el2_lsu_stbuf.scala 123:52] + reg [1:0] RdPtr; // @[Reg.scala 27:20] + wire [1:0] RdPtrPlus1 = RdPtr + 2'h1; // @[el2_lsu_stbuf.scala 125:26] + reg [1:0] WrPtr; // @[Reg.scala 27:20] + wire [1:0] WrPtrPlus1 = WrPtr + 2'h1; // @[el2_lsu_stbuf.scala 126:26] + wire [1:0] WrPtrPlus2 = WrPtr + 2'h2; // @[el2_lsu_stbuf.scala 127:26] + reg [15:0] stbuf_addr_0; // @[el2_lib.scala 512:16] + wire _T_27 = stbuf_addr_0[15:2] == io_lsu_addr_r[15:2]; // @[el2_lsu_stbuf.scala 131:120] + reg _T_588; // @[el2_lsu_stbuf.scala 164:88] + reg _T_580; // @[el2_lsu_stbuf.scala 164:88] + reg _T_572; // @[el2_lsu_stbuf.scala 164:88] + reg _T_564; // @[el2_lsu_stbuf.scala 164:88] + wire [3:0] stbuf_vld = {_T_588,_T_580,_T_572,_T_564}; // @[Cat.scala 29:58] + wire _T_29 = _T_27 & stbuf_vld[0]; // @[el2_lsu_stbuf.scala 131:179] + reg _T_623; // @[el2_lsu_stbuf.scala 166:92] + reg _T_615; // @[el2_lsu_stbuf.scala 166:92] + reg _T_607; // @[el2_lsu_stbuf.scala 166:92] + reg _T_599; // @[el2_lsu_stbuf.scala 166:92] + wire [3:0] stbuf_dma_kill = {_T_623,_T_615,_T_607,_T_599}; // @[Cat.scala 29:58] + wire _T_31 = ~stbuf_dma_kill[0]; // @[el2_lsu_stbuf.scala 131:197] + wire _T_32 = _T_29 & _T_31; // @[el2_lsu_stbuf.scala 131:195] + wire _T_212 = io_lsu_stbuf_commit_any | io_stbuf_reqvld_flushed_any; // @[el2_lsu_stbuf.scala 142:78] + wire _T_213 = 2'h3 == RdPtr; // @[el2_lsu_stbuf.scala 142:121] + wire _T_215 = _T_212 & _T_213; // @[el2_lsu_stbuf.scala 142:109] + wire _T_209 = 2'h2 == RdPtr; // @[el2_lsu_stbuf.scala 142:121] + wire _T_211 = _T_212 & _T_209; // @[el2_lsu_stbuf.scala 142:109] + wire _T_205 = 2'h1 == RdPtr; // @[el2_lsu_stbuf.scala 142:121] + wire _T_207 = _T_212 & _T_205; // @[el2_lsu_stbuf.scala 142:109] + wire _T_201 = 2'h0 == RdPtr; // @[el2_lsu_stbuf.scala 142:121] + wire _T_203 = _T_212 & _T_201; // @[el2_lsu_stbuf.scala 142:109] + wire [3:0] stbuf_reset = {_T_215,_T_211,_T_207,_T_203}; // @[Cat.scala 29:58] + wire _T_34 = ~stbuf_reset[0]; // @[el2_lsu_stbuf.scala 131:218] + wire _T_35 = _T_32 & _T_34; // @[el2_lsu_stbuf.scala 131:216] + reg [15:0] stbuf_addr_1; // @[el2_lib.scala 512:16] + wire _T_38 = stbuf_addr_1[15:2] == io_lsu_addr_r[15:2]; // @[el2_lsu_stbuf.scala 131:120] + wire _T_40 = _T_38 & stbuf_vld[1]; // @[el2_lsu_stbuf.scala 131:179] + wire _T_42 = ~stbuf_dma_kill[1]; // @[el2_lsu_stbuf.scala 131:197] + wire _T_43 = _T_40 & _T_42; // @[el2_lsu_stbuf.scala 131:195] + wire _T_45 = ~stbuf_reset[1]; // @[el2_lsu_stbuf.scala 131:218] + wire _T_46 = _T_43 & _T_45; // @[el2_lsu_stbuf.scala 131:216] + reg [15:0] stbuf_addr_2; // @[el2_lib.scala 512:16] + wire _T_49 = stbuf_addr_2[15:2] == io_lsu_addr_r[15:2]; // @[el2_lsu_stbuf.scala 131:120] + wire _T_51 = _T_49 & stbuf_vld[2]; // @[el2_lsu_stbuf.scala 131:179] + wire _T_53 = ~stbuf_dma_kill[2]; // @[el2_lsu_stbuf.scala 131:197] + wire _T_54 = _T_51 & _T_53; // @[el2_lsu_stbuf.scala 131:195] + wire _T_56 = ~stbuf_reset[2]; // @[el2_lsu_stbuf.scala 131:218] + wire _T_57 = _T_54 & _T_56; // @[el2_lsu_stbuf.scala 131:216] + reg [15:0] stbuf_addr_3; // @[el2_lib.scala 512:16] + wire _T_60 = stbuf_addr_3[15:2] == io_lsu_addr_r[15:2]; // @[el2_lsu_stbuf.scala 131:120] + wire _T_62 = _T_60 & stbuf_vld[3]; // @[el2_lsu_stbuf.scala 131:179] + wire _T_64 = ~stbuf_dma_kill[3]; // @[el2_lsu_stbuf.scala 131:197] + wire _T_65 = _T_62 & _T_64; // @[el2_lsu_stbuf.scala 131:195] + wire _T_67 = ~stbuf_reset[3]; // @[el2_lsu_stbuf.scala 131:218] + wire _T_68 = _T_65 & _T_67; // @[el2_lsu_stbuf.scala 131:216] + wire [3:0] store_matchvec_lo_r = {_T_68,_T_57,_T_46,_T_35}; // @[Cat.scala 29:58] + wire _T_73 = stbuf_addr_0[15:2] == io_end_addr_r[15:2]; // @[el2_lsu_stbuf.scala 132:120] + wire _T_75 = _T_73 & stbuf_vld[0]; // @[el2_lsu_stbuf.scala 132:179] + wire _T_78 = _T_75 & _T_31; // @[el2_lsu_stbuf.scala 132:194] + wire _T_79 = _T_78 & dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 132:215] + wire _T_82 = _T_79 & _T_34; // @[el2_lsu_stbuf.scala 132:236] + wire _T_85 = stbuf_addr_1[15:2] == io_end_addr_r[15:2]; // @[el2_lsu_stbuf.scala 132:120] + wire _T_87 = _T_85 & stbuf_vld[1]; // @[el2_lsu_stbuf.scala 132:179] + wire _T_90 = _T_87 & _T_42; // @[el2_lsu_stbuf.scala 132:194] + wire _T_91 = _T_90 & dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 132:215] + wire _T_94 = _T_91 & _T_45; // @[el2_lsu_stbuf.scala 132:236] + wire _T_97 = stbuf_addr_2[15:2] == io_end_addr_r[15:2]; // @[el2_lsu_stbuf.scala 132:120] + wire _T_99 = _T_97 & stbuf_vld[2]; // @[el2_lsu_stbuf.scala 132:179] + wire _T_102 = _T_99 & _T_53; // @[el2_lsu_stbuf.scala 132:194] + wire _T_103 = _T_102 & dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 132:215] + wire _T_106 = _T_103 & _T_56; // @[el2_lsu_stbuf.scala 132:236] + wire _T_109 = stbuf_addr_3[15:2] == io_end_addr_r[15:2]; // @[el2_lsu_stbuf.scala 132:120] + wire _T_111 = _T_109 & stbuf_vld[3]; // @[el2_lsu_stbuf.scala 132:179] + wire _T_114 = _T_111 & _T_64; // @[el2_lsu_stbuf.scala 132:194] + wire _T_115 = _T_114 & dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 132:215] + wire _T_118 = _T_115 & _T_67; // @[el2_lsu_stbuf.scala 132:236] + wire [3:0] store_matchvec_hi_r = {_T_118,_T_106,_T_94,_T_82}; // @[Cat.scala 29:58] + wire store_coalesce_lo_r = |store_matchvec_lo_r; // @[el2_lsu_stbuf.scala 134:49] + wire store_coalesce_hi_r = |store_matchvec_hi_r; // @[el2_lsu_stbuf.scala 135:49] + wire _T_121 = 2'h0 == WrPtr; // @[el2_lsu_stbuf.scala 138:16] + wire _T_122 = ~store_coalesce_lo_r; // @[el2_lsu_stbuf.scala 138:29] + wire _T_123 = _T_121 & _T_122; // @[el2_lsu_stbuf.scala 138:27] + wire _T_125 = _T_121 & dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 139:29] + wire _T_126 = ~store_coalesce_hi_r; // @[el2_lsu_stbuf.scala 139:52] + wire _T_127 = _T_125 & _T_126; // @[el2_lsu_stbuf.scala 139:50] + wire _T_128 = _T_123 | _T_127; // @[el2_lsu_stbuf.scala 138:51] + wire _T_129 = 2'h0 == WrPtrPlus1; // @[el2_lsu_stbuf.scala 140:18] + wire _T_130 = _T_129 & dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 140:34] + wire _T_131 = store_coalesce_lo_r | store_coalesce_hi_r; // @[el2_lsu_stbuf.scala 140:79] + wire _T_132 = ~_T_131; // @[el2_lsu_stbuf.scala 140:57] + wire _T_133 = _T_130 & _T_132; // @[el2_lsu_stbuf.scala 140:55] + wire _T_134 = _T_128 | _T_133; // @[el2_lsu_stbuf.scala 139:74] + wire _T_136 = _T_134 | store_matchvec_lo_r[0]; // @[el2_lsu_stbuf.scala 140:103] + wire _T_138 = _T_136 | store_matchvec_hi_r[0]; // @[el2_lsu_stbuf.scala 141:30] + wire _T_139 = io_ldst_stbuf_reqvld_r & _T_138; // @[el2_lsu_stbuf.scala 137:76] + wire _T_140 = 2'h1 == WrPtr; // @[el2_lsu_stbuf.scala 138:16] + wire _T_142 = _T_140 & _T_122; // @[el2_lsu_stbuf.scala 138:27] + wire _T_144 = _T_140 & dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 139:29] + wire _T_146 = _T_144 & _T_126; // @[el2_lsu_stbuf.scala 139:50] + wire _T_147 = _T_142 | _T_146; // @[el2_lsu_stbuf.scala 138:51] + wire _T_148 = 2'h1 == WrPtrPlus1; // @[el2_lsu_stbuf.scala 140:18] + wire _T_149 = _T_148 & dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 140:34] + wire _T_152 = _T_149 & _T_132; // @[el2_lsu_stbuf.scala 140:55] + wire _T_153 = _T_147 | _T_152; // @[el2_lsu_stbuf.scala 139:74] + wire _T_155 = _T_153 | store_matchvec_lo_r[1]; // @[el2_lsu_stbuf.scala 140:103] + wire _T_157 = _T_155 | store_matchvec_hi_r[1]; // @[el2_lsu_stbuf.scala 141:30] + wire _T_158 = io_ldst_stbuf_reqvld_r & _T_157; // @[el2_lsu_stbuf.scala 137:76] + wire _T_159 = 2'h2 == WrPtr; // @[el2_lsu_stbuf.scala 138:16] + wire _T_161 = _T_159 & _T_122; // @[el2_lsu_stbuf.scala 138:27] + wire _T_163 = _T_159 & dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 139:29] + wire _T_165 = _T_163 & _T_126; // @[el2_lsu_stbuf.scala 139:50] + wire _T_166 = _T_161 | _T_165; // @[el2_lsu_stbuf.scala 138:51] + wire _T_167 = 2'h2 == WrPtrPlus1; // @[el2_lsu_stbuf.scala 140:18] + wire _T_168 = _T_167 & dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 140:34] + wire _T_171 = _T_168 & _T_132; // @[el2_lsu_stbuf.scala 140:55] + wire _T_172 = _T_166 | _T_171; // @[el2_lsu_stbuf.scala 139:74] + wire _T_174 = _T_172 | store_matchvec_lo_r[2]; // @[el2_lsu_stbuf.scala 140:103] + wire _T_176 = _T_174 | store_matchvec_hi_r[2]; // @[el2_lsu_stbuf.scala 141:30] + wire _T_177 = io_ldst_stbuf_reqvld_r & _T_176; // @[el2_lsu_stbuf.scala 137:76] + wire _T_178 = 2'h3 == WrPtr; // @[el2_lsu_stbuf.scala 138:16] + wire _T_180 = _T_178 & _T_122; // @[el2_lsu_stbuf.scala 138:27] + wire _T_182 = _T_178 & dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 139:29] + wire _T_184 = _T_182 & _T_126; // @[el2_lsu_stbuf.scala 139:50] + wire _T_185 = _T_180 | _T_184; // @[el2_lsu_stbuf.scala 138:51] + wire _T_186 = 2'h3 == WrPtrPlus1; // @[el2_lsu_stbuf.scala 140:18] + wire _T_187 = _T_186 & dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 140:34] + wire _T_190 = _T_187 & _T_132; // @[el2_lsu_stbuf.scala 140:55] + wire _T_191 = _T_185 | _T_190; // @[el2_lsu_stbuf.scala 139:74] + wire _T_193 = _T_191 | store_matchvec_lo_r[3]; // @[el2_lsu_stbuf.scala 140:103] + wire _T_195 = _T_193 | store_matchvec_hi_r[3]; // @[el2_lsu_stbuf.scala 141:30] + wire _T_196 = io_ldst_stbuf_reqvld_r & _T_195; // @[el2_lsu_stbuf.scala 137:76] + wire [3:0] stbuf_wr_en = {_T_196,_T_177,_T_158,_T_139}; // @[Cat.scala 29:58] + wire _T_219 = ~ldst_dual_r; // @[el2_lsu_stbuf.scala 143:53] + wire _T_220 = _T_219 | io_store_stbuf_reqvld_r; // @[el2_lsu_stbuf.scala 143:66] + wire _T_223 = _T_220 & _T_121; // @[el2_lsu_stbuf.scala 143:93] + wire _T_225 = _T_223 & _T_122; // @[el2_lsu_stbuf.scala 143:123] + wire _T_227 = _T_225 | store_matchvec_lo_r[0]; // @[el2_lsu_stbuf.scala 143:147] + wire _T_232 = _T_220 & _T_140; // @[el2_lsu_stbuf.scala 143:93] + wire _T_234 = _T_232 & _T_122; // @[el2_lsu_stbuf.scala 143:123] + wire _T_236 = _T_234 | store_matchvec_lo_r[1]; // @[el2_lsu_stbuf.scala 143:147] + wire _T_241 = _T_220 & _T_159; // @[el2_lsu_stbuf.scala 143:93] + wire _T_243 = _T_241 & _T_122; // @[el2_lsu_stbuf.scala 143:123] + wire _T_245 = _T_243 | store_matchvec_lo_r[2]; // @[el2_lsu_stbuf.scala 143:147] + wire _T_250 = _T_220 & _T_178; // @[el2_lsu_stbuf.scala 143:93] + wire _T_252 = _T_250 & _T_122; // @[el2_lsu_stbuf.scala 143:123] + wire _T_254 = _T_252 | store_matchvec_lo_r[3]; // @[el2_lsu_stbuf.scala 143:147] + wire [3:0] sel_lo = {_T_254,_T_245,_T_236,_T_227}; // @[Cat.scala 29:58] + reg [3:0] stbuf_byteen_0; // @[el2_lsu_stbuf.scala 167:92] + wire [3:0] _T_274 = stbuf_byteen_0 | store_byteen_lo_r; // @[el2_lsu_stbuf.scala 146:86] + wire [3:0] _T_275 = stbuf_byteen_0 | store_byteen_hi_r; // @[el2_lsu_stbuf.scala 146:123] + wire [3:0] stbuf_byteenin_0 = sel_lo[0] ? _T_274 : _T_275; // @[el2_lsu_stbuf.scala 146:58] + reg [3:0] stbuf_byteen_1; // @[el2_lsu_stbuf.scala 167:92] + wire [3:0] _T_278 = stbuf_byteen_1 | store_byteen_lo_r; // @[el2_lsu_stbuf.scala 146:86] + wire [3:0] _T_279 = stbuf_byteen_1 | store_byteen_hi_r; // @[el2_lsu_stbuf.scala 146:123] + wire [3:0] stbuf_byteenin_1 = sel_lo[1] ? _T_278 : _T_279; // @[el2_lsu_stbuf.scala 146:58] + reg [3:0] stbuf_byteen_2; // @[el2_lsu_stbuf.scala 167:92] + wire [3:0] _T_282 = stbuf_byteen_2 | store_byteen_lo_r; // @[el2_lsu_stbuf.scala 146:86] + wire [3:0] _T_283 = stbuf_byteen_2 | store_byteen_hi_r; // @[el2_lsu_stbuf.scala 146:123] + wire [3:0] stbuf_byteenin_2 = sel_lo[2] ? _T_282 : _T_283; // @[el2_lsu_stbuf.scala 146:58] + reg [3:0] stbuf_byteen_3; // @[el2_lsu_stbuf.scala 167:92] + wire [3:0] _T_286 = stbuf_byteen_3 | store_byteen_lo_r; // @[el2_lsu_stbuf.scala 146:86] + wire [3:0] _T_287 = stbuf_byteen_3 | store_byteen_hi_r; // @[el2_lsu_stbuf.scala 146:123] + wire [3:0] stbuf_byteenin_3 = sel_lo[3] ? _T_286 : _T_287; // @[el2_lsu_stbuf.scala 146:58] + wire _T_291 = ~stbuf_byteen_0[0]; // @[el2_lsu_stbuf.scala 148:67] + wire _T_293 = _T_291 | store_byteen_lo_r[0]; // @[el2_lsu_stbuf.scala 148:87] + reg [31:0] stbuf_data_0; // @[el2_lib.scala 512:16] + wire [7:0] _T_296 = _T_293 ? io_store_datafn_lo_r[7:0] : stbuf_data_0[7:0]; // @[el2_lsu_stbuf.scala 148:66] + wire _T_300 = _T_291 | store_byteen_hi_r[0]; // @[el2_lsu_stbuf.scala 149:29] + wire [7:0] _T_303 = _T_300 ? io_store_datafn_hi_r[7:0] : stbuf_data_0[7:0]; // @[el2_lsu_stbuf.scala 149:8] + wire [7:0] datain1_0 = sel_lo[0] ? _T_296 : _T_303; // @[el2_lsu_stbuf.scala 148:51] + wire _T_307 = ~stbuf_byteen_1[0]; // @[el2_lsu_stbuf.scala 148:67] + wire _T_309 = _T_307 | store_byteen_lo_r[0]; // @[el2_lsu_stbuf.scala 148:87] + reg [31:0] stbuf_data_1; // @[el2_lib.scala 512:16] + wire [7:0] _T_312 = _T_309 ? io_store_datafn_lo_r[7:0] : stbuf_data_1[7:0]; // @[el2_lsu_stbuf.scala 148:66] + wire _T_316 = _T_307 | store_byteen_hi_r[0]; // @[el2_lsu_stbuf.scala 149:29] + wire [7:0] _T_319 = _T_316 ? io_store_datafn_hi_r[7:0] : stbuf_data_1[7:0]; // @[el2_lsu_stbuf.scala 149:8] + wire [7:0] datain1_1 = sel_lo[1] ? _T_312 : _T_319; // @[el2_lsu_stbuf.scala 148:51] + wire _T_323 = ~stbuf_byteen_2[0]; // @[el2_lsu_stbuf.scala 148:67] + wire _T_325 = _T_323 | store_byteen_lo_r[0]; // @[el2_lsu_stbuf.scala 148:87] + reg [31:0] stbuf_data_2; // @[el2_lib.scala 512:16] + wire [7:0] _T_328 = _T_325 ? io_store_datafn_lo_r[7:0] : stbuf_data_2[7:0]; // @[el2_lsu_stbuf.scala 148:66] + wire _T_332 = _T_323 | store_byteen_hi_r[0]; // @[el2_lsu_stbuf.scala 149:29] + wire [7:0] _T_335 = _T_332 ? io_store_datafn_hi_r[7:0] : stbuf_data_2[7:0]; // @[el2_lsu_stbuf.scala 149:8] + wire [7:0] datain1_2 = sel_lo[2] ? _T_328 : _T_335; // @[el2_lsu_stbuf.scala 148:51] + wire _T_339 = ~stbuf_byteen_3[0]; // @[el2_lsu_stbuf.scala 148:67] + wire _T_341 = _T_339 | store_byteen_lo_r[0]; // @[el2_lsu_stbuf.scala 148:87] + reg [31:0] stbuf_data_3; // @[el2_lib.scala 512:16] + wire [7:0] _T_344 = _T_341 ? io_store_datafn_lo_r[7:0] : stbuf_data_3[7:0]; // @[el2_lsu_stbuf.scala 148:66] + wire _T_348 = _T_339 | store_byteen_hi_r[0]; // @[el2_lsu_stbuf.scala 149:29] + wire [7:0] _T_351 = _T_348 ? io_store_datafn_hi_r[7:0] : stbuf_data_3[7:0]; // @[el2_lsu_stbuf.scala 149:8] + wire [7:0] datain1_3 = sel_lo[3] ? _T_344 : _T_351; // @[el2_lsu_stbuf.scala 148:51] + wire _T_355 = ~stbuf_byteen_0[1]; // @[el2_lsu_stbuf.scala 151:68] + wire _T_357 = _T_355 | store_byteen_lo_r[1]; // @[el2_lsu_stbuf.scala 151:88] + wire [7:0] _T_360 = _T_357 ? io_store_datafn_lo_r[15:8] : stbuf_data_0[15:8]; // @[el2_lsu_stbuf.scala 151:67] + wire _T_364 = _T_355 | store_byteen_hi_r[1]; // @[el2_lsu_stbuf.scala 152:29] + wire [7:0] _T_367 = _T_364 ? io_store_datafn_hi_r[15:8] : stbuf_data_0[15:8]; // @[el2_lsu_stbuf.scala 152:8] + wire [7:0] datain2_0 = sel_lo[0] ? _T_360 : _T_367; // @[el2_lsu_stbuf.scala 151:52] + wire _T_371 = ~stbuf_byteen_1[1]; // @[el2_lsu_stbuf.scala 151:68] + wire _T_373 = _T_371 | store_byteen_lo_r[1]; // @[el2_lsu_stbuf.scala 151:88] + wire [7:0] _T_376 = _T_373 ? io_store_datafn_lo_r[15:8] : stbuf_data_1[15:8]; // @[el2_lsu_stbuf.scala 151:67] + wire _T_380 = _T_371 | store_byteen_hi_r[1]; // @[el2_lsu_stbuf.scala 152:29] + wire [7:0] _T_383 = _T_380 ? io_store_datafn_hi_r[15:8] : stbuf_data_1[15:8]; // @[el2_lsu_stbuf.scala 152:8] + wire [7:0] datain2_1 = sel_lo[1] ? _T_376 : _T_383; // @[el2_lsu_stbuf.scala 151:52] + wire _T_387 = ~stbuf_byteen_2[1]; // @[el2_lsu_stbuf.scala 151:68] + wire _T_389 = _T_387 | store_byteen_lo_r[1]; // @[el2_lsu_stbuf.scala 151:88] + wire [7:0] _T_392 = _T_389 ? io_store_datafn_lo_r[15:8] : stbuf_data_2[15:8]; // @[el2_lsu_stbuf.scala 151:67] + wire _T_396 = _T_387 | store_byteen_hi_r[1]; // @[el2_lsu_stbuf.scala 152:29] + wire [7:0] _T_399 = _T_396 ? io_store_datafn_hi_r[15:8] : stbuf_data_2[15:8]; // @[el2_lsu_stbuf.scala 152:8] + wire [7:0] datain2_2 = sel_lo[2] ? _T_392 : _T_399; // @[el2_lsu_stbuf.scala 151:52] + wire _T_403 = ~stbuf_byteen_3[1]; // @[el2_lsu_stbuf.scala 151:68] + wire _T_405 = _T_403 | store_byteen_lo_r[1]; // @[el2_lsu_stbuf.scala 151:88] + wire [7:0] _T_408 = _T_405 ? io_store_datafn_lo_r[15:8] : stbuf_data_3[15:8]; // @[el2_lsu_stbuf.scala 151:67] + wire _T_412 = _T_403 | store_byteen_hi_r[1]; // @[el2_lsu_stbuf.scala 152:29] + wire [7:0] _T_415 = _T_412 ? io_store_datafn_hi_r[15:8] : stbuf_data_3[15:8]; // @[el2_lsu_stbuf.scala 152:8] + wire [7:0] datain2_3 = sel_lo[3] ? _T_408 : _T_415; // @[el2_lsu_stbuf.scala 151:52] + wire _T_419 = ~stbuf_byteen_0[2]; // @[el2_lsu_stbuf.scala 154:68] + wire _T_421 = _T_419 | store_byteen_lo_r[2]; // @[el2_lsu_stbuf.scala 154:88] + wire [7:0] _T_424 = _T_421 ? io_store_datafn_lo_r[23:16] : stbuf_data_0[23:16]; // @[el2_lsu_stbuf.scala 154:67] + wire _T_428 = _T_419 | store_byteen_hi_r[2]; // @[el2_lsu_stbuf.scala 155:29] + wire [7:0] _T_431 = _T_428 ? io_store_datafn_hi_r[23:16] : stbuf_data_0[23:16]; // @[el2_lsu_stbuf.scala 155:8] + wire [7:0] datain3_0 = sel_lo[0] ? _T_424 : _T_431; // @[el2_lsu_stbuf.scala 154:52] + wire _T_435 = ~stbuf_byteen_1[2]; // @[el2_lsu_stbuf.scala 154:68] + wire _T_437 = _T_435 | store_byteen_lo_r[2]; // @[el2_lsu_stbuf.scala 154:88] + wire [7:0] _T_440 = _T_437 ? io_store_datafn_lo_r[23:16] : stbuf_data_1[23:16]; // @[el2_lsu_stbuf.scala 154:67] + wire _T_444 = _T_435 | store_byteen_hi_r[2]; // @[el2_lsu_stbuf.scala 155:29] + wire [7:0] _T_447 = _T_444 ? io_store_datafn_hi_r[23:16] : stbuf_data_1[23:16]; // @[el2_lsu_stbuf.scala 155:8] + wire [7:0] datain3_1 = sel_lo[1] ? _T_440 : _T_447; // @[el2_lsu_stbuf.scala 154:52] + wire _T_451 = ~stbuf_byteen_2[2]; // @[el2_lsu_stbuf.scala 154:68] + wire _T_453 = _T_451 | store_byteen_lo_r[2]; // @[el2_lsu_stbuf.scala 154:88] + wire [7:0] _T_456 = _T_453 ? io_store_datafn_lo_r[23:16] : stbuf_data_2[23:16]; // @[el2_lsu_stbuf.scala 154:67] + wire _T_460 = _T_451 | store_byteen_hi_r[2]; // @[el2_lsu_stbuf.scala 155:29] + wire [7:0] _T_463 = _T_460 ? io_store_datafn_hi_r[23:16] : stbuf_data_2[23:16]; // @[el2_lsu_stbuf.scala 155:8] + wire [7:0] datain3_2 = sel_lo[2] ? _T_456 : _T_463; // @[el2_lsu_stbuf.scala 154:52] + wire _T_467 = ~stbuf_byteen_3[2]; // @[el2_lsu_stbuf.scala 154:68] + wire _T_469 = _T_467 | store_byteen_lo_r[2]; // @[el2_lsu_stbuf.scala 154:88] + wire [7:0] _T_472 = _T_469 ? io_store_datafn_lo_r[23:16] : stbuf_data_3[23:16]; // @[el2_lsu_stbuf.scala 154:67] + wire _T_476 = _T_467 | store_byteen_hi_r[2]; // @[el2_lsu_stbuf.scala 155:29] + wire [7:0] _T_479 = _T_476 ? io_store_datafn_hi_r[23:16] : stbuf_data_3[23:16]; // @[el2_lsu_stbuf.scala 155:8] + wire [7:0] datain3_3 = sel_lo[3] ? _T_472 : _T_479; // @[el2_lsu_stbuf.scala 154:52] + wire _T_483 = ~stbuf_byteen_0[3]; // @[el2_lsu_stbuf.scala 157:68] + wire _T_485 = _T_483 | store_byteen_lo_r[3]; // @[el2_lsu_stbuf.scala 157:88] + wire [7:0] _T_488 = _T_485 ? io_store_datafn_lo_r[31:24] : stbuf_data_0[31:24]; // @[el2_lsu_stbuf.scala 157:67] + wire _T_492 = _T_483 | store_byteen_hi_r[3]; // @[el2_lsu_stbuf.scala 158:29] + wire [7:0] _T_495 = _T_492 ? io_store_datafn_hi_r[31:24] : stbuf_data_0[31:24]; // @[el2_lsu_stbuf.scala 158:8] + wire [7:0] datain4_0 = sel_lo[0] ? _T_488 : _T_495; // @[el2_lsu_stbuf.scala 157:52] + wire _T_499 = ~stbuf_byteen_1[3]; // @[el2_lsu_stbuf.scala 157:68] + wire _T_501 = _T_499 | store_byteen_lo_r[3]; // @[el2_lsu_stbuf.scala 157:88] + wire [7:0] _T_504 = _T_501 ? io_store_datafn_lo_r[31:24] : stbuf_data_1[31:24]; // @[el2_lsu_stbuf.scala 157:67] + wire _T_508 = _T_499 | store_byteen_hi_r[3]; // @[el2_lsu_stbuf.scala 158:29] + wire [7:0] _T_511 = _T_508 ? io_store_datafn_hi_r[31:24] : stbuf_data_1[31:24]; // @[el2_lsu_stbuf.scala 158:8] + wire [7:0] datain4_1 = sel_lo[1] ? _T_504 : _T_511; // @[el2_lsu_stbuf.scala 157:52] + wire _T_515 = ~stbuf_byteen_2[3]; // @[el2_lsu_stbuf.scala 157:68] + wire _T_517 = _T_515 | store_byteen_lo_r[3]; // @[el2_lsu_stbuf.scala 157:88] + wire [7:0] _T_520 = _T_517 ? io_store_datafn_lo_r[31:24] : stbuf_data_2[31:24]; // @[el2_lsu_stbuf.scala 157:67] + wire _T_524 = _T_515 | store_byteen_hi_r[3]; // @[el2_lsu_stbuf.scala 158:29] + wire [7:0] _T_527 = _T_524 ? io_store_datafn_hi_r[31:24] : stbuf_data_2[31:24]; // @[el2_lsu_stbuf.scala 158:8] + wire [7:0] datain4_2 = sel_lo[2] ? _T_520 : _T_527; // @[el2_lsu_stbuf.scala 157:52] + wire _T_531 = ~stbuf_byteen_3[3]; // @[el2_lsu_stbuf.scala 157:68] + wire _T_533 = _T_531 | store_byteen_lo_r[3]; // @[el2_lsu_stbuf.scala 157:88] + wire [7:0] _T_536 = _T_533 ? io_store_datafn_lo_r[31:24] : stbuf_data_3[31:24]; // @[el2_lsu_stbuf.scala 157:67] + wire _T_540 = _T_531 | store_byteen_hi_r[3]; // @[el2_lsu_stbuf.scala 158:29] + wire [7:0] _T_543 = _T_540 ? io_store_datafn_hi_r[31:24] : stbuf_data_3[31:24]; // @[el2_lsu_stbuf.scala 158:8] + wire [7:0] datain4_3 = sel_lo[3] ? _T_536 : _T_543; // @[el2_lsu_stbuf.scala 157:52] + wire [15:0] _T_545 = {datain2_0,datain1_0}; // @[Cat.scala 29:58] + wire [15:0] _T_546 = {datain4_0,datain3_0}; // @[Cat.scala 29:58] + wire [15:0] _T_548 = {datain2_1,datain1_1}; // @[Cat.scala 29:58] + wire [15:0] _T_549 = {datain4_1,datain3_1}; // @[Cat.scala 29:58] + wire [15:0] _T_551 = {datain2_2,datain1_2}; // @[Cat.scala 29:58] + wire [15:0] _T_552 = {datain4_2,datain3_2}; // @[Cat.scala 29:58] + wire [15:0] _T_554 = {datain2_3,datain1_3}; // @[Cat.scala 29:58] + wire [15:0] _T_555 = {datain4_3,datain3_3}; // @[Cat.scala 29:58] + wire _T_560 = stbuf_wr_en[0] | stbuf_vld[0]; // @[el2_lsu_stbuf.scala 164:92] + wire _T_568 = stbuf_wr_en[1] | stbuf_vld[1]; // @[el2_lsu_stbuf.scala 164:92] + wire _T_576 = stbuf_wr_en[2] | stbuf_vld[2]; // @[el2_lsu_stbuf.scala 164:92] + wire _T_584 = stbuf_wr_en[3] | stbuf_vld[3]; // @[el2_lsu_stbuf.scala 164:92] + wire [15:0] cmpaddr_hi_m = {{2'd0}, io_end_addr_m[15:2]}; // @[el2_lsu_stbuf.scala 206:16] + wire _T_789 = stbuf_addr_3[15:2] == cmpaddr_hi_m[13:0]; // @[el2_lsu_stbuf.scala 212:115] + wire _T_791 = _T_789 & stbuf_vld[3]; // @[el2_lsu_stbuf.scala 212:139] + wire _T_794 = _T_791 & _T_64; // @[el2_lsu_stbuf.scala 212:154] + wire _T_795 = _T_794 & io_addr_in_dccm_m; // @[el2_lsu_stbuf.scala 212:175] + wire _T_780 = stbuf_addr_2[15:2] == cmpaddr_hi_m[13:0]; // @[el2_lsu_stbuf.scala 212:115] + wire _T_782 = _T_780 & stbuf_vld[2]; // @[el2_lsu_stbuf.scala 212:139] + wire _T_785 = _T_782 & _T_53; // @[el2_lsu_stbuf.scala 212:154] + wire _T_786 = _T_785 & io_addr_in_dccm_m; // @[el2_lsu_stbuf.scala 212:175] + wire _T_771 = stbuf_addr_1[15:2] == cmpaddr_hi_m[13:0]; // @[el2_lsu_stbuf.scala 212:115] + wire _T_773 = _T_771 & stbuf_vld[1]; // @[el2_lsu_stbuf.scala 212:139] + wire _T_776 = _T_773 & _T_42; // @[el2_lsu_stbuf.scala 212:154] + wire _T_777 = _T_776 & io_addr_in_dccm_m; // @[el2_lsu_stbuf.scala 212:175] + wire _T_762 = stbuf_addr_0[15:2] == cmpaddr_hi_m[13:0]; // @[el2_lsu_stbuf.scala 212:115] + wire _T_764 = _T_762 & stbuf_vld[0]; // @[el2_lsu_stbuf.scala 212:139] + wire _T_767 = _T_764 & _T_31; // @[el2_lsu_stbuf.scala 212:154] + wire _T_768 = _T_767 & io_addr_in_dccm_m; // @[el2_lsu_stbuf.scala 212:175] + wire [3:0] stbuf_match_hi = {_T_795,_T_786,_T_777,_T_768}; // @[Cat.scala 29:58] + wire [15:0] cmpaddr_lo_m = {{2'd0}, io_lsu_addr_m[15:2]}; // @[el2_lsu_stbuf.scala 209:17] + wire _T_827 = stbuf_addr_3[15:2] == cmpaddr_lo_m[13:0]; // @[el2_lsu_stbuf.scala 213:115] + wire _T_829 = _T_827 & stbuf_vld[3]; // @[el2_lsu_stbuf.scala 213:139] + wire _T_832 = _T_829 & _T_64; // @[el2_lsu_stbuf.scala 213:154] + wire _T_833 = _T_832 & io_addr_in_dccm_m; // @[el2_lsu_stbuf.scala 213:175] + wire _T_818 = stbuf_addr_2[15:2] == cmpaddr_lo_m[13:0]; // @[el2_lsu_stbuf.scala 213:115] + wire _T_820 = _T_818 & stbuf_vld[2]; // @[el2_lsu_stbuf.scala 213:139] + wire _T_823 = _T_820 & _T_53; // @[el2_lsu_stbuf.scala 213:154] + wire _T_824 = _T_823 & io_addr_in_dccm_m; // @[el2_lsu_stbuf.scala 213:175] + wire _T_809 = stbuf_addr_1[15:2] == cmpaddr_lo_m[13:0]; // @[el2_lsu_stbuf.scala 213:115] + wire _T_811 = _T_809 & stbuf_vld[1]; // @[el2_lsu_stbuf.scala 213:139] + wire _T_814 = _T_811 & _T_42; // @[el2_lsu_stbuf.scala 213:154] + wire _T_815 = _T_814 & io_addr_in_dccm_m; // @[el2_lsu_stbuf.scala 213:175] + wire _T_800 = stbuf_addr_0[15:2] == cmpaddr_lo_m[13:0]; // @[el2_lsu_stbuf.scala 213:115] + wire _T_802 = _T_800 & stbuf_vld[0]; // @[el2_lsu_stbuf.scala 213:139] + wire _T_805 = _T_802 & _T_31; // @[el2_lsu_stbuf.scala 213:154] + wire _T_806 = _T_805 & io_addr_in_dccm_m; // @[el2_lsu_stbuf.scala 213:175] + wire [3:0] stbuf_match_lo = {_T_833,_T_824,_T_815,_T_806}; // @[Cat.scala 29:58] + wire _T_856 = stbuf_match_hi[3] | stbuf_match_lo[3]; // @[el2_lsu_stbuf.scala 214:78] + wire _T_857 = _T_856 & io_lsu_pkt_m_valid; // @[el2_lsu_stbuf.scala 214:99] + wire _T_858 = _T_857 & io_lsu_pkt_m_dma; // @[el2_lsu_stbuf.scala 214:120] + wire _T_859 = _T_858 & io_lsu_pkt_m_store; // @[el2_lsu_stbuf.scala 214:139] + wire _T_850 = stbuf_match_hi[2] | stbuf_match_lo[2]; // @[el2_lsu_stbuf.scala 214:78] + wire _T_851 = _T_850 & io_lsu_pkt_m_valid; // @[el2_lsu_stbuf.scala 214:99] + wire _T_852 = _T_851 & io_lsu_pkt_m_dma; // @[el2_lsu_stbuf.scala 214:120] + wire _T_853 = _T_852 & io_lsu_pkt_m_store; // @[el2_lsu_stbuf.scala 214:139] + wire _T_844 = stbuf_match_hi[1] | stbuf_match_lo[1]; // @[el2_lsu_stbuf.scala 214:78] + wire _T_845 = _T_844 & io_lsu_pkt_m_valid; // @[el2_lsu_stbuf.scala 214:99] + wire _T_846 = _T_845 & io_lsu_pkt_m_dma; // @[el2_lsu_stbuf.scala 214:120] + wire _T_847 = _T_846 & io_lsu_pkt_m_store; // @[el2_lsu_stbuf.scala 214:139] + wire _T_838 = stbuf_match_hi[0] | stbuf_match_lo[0]; // @[el2_lsu_stbuf.scala 214:78] + wire _T_839 = _T_838 & io_lsu_pkt_m_valid; // @[el2_lsu_stbuf.scala 214:99] + wire _T_840 = _T_839 & io_lsu_pkt_m_dma; // @[el2_lsu_stbuf.scala 214:120] + wire _T_841 = _T_840 & io_lsu_pkt_m_store; // @[el2_lsu_stbuf.scala 214:139] + wire [3:0] stbuf_dma_kill_en = {_T_859,_T_853,_T_847,_T_841}; // @[Cat.scala 29:58] + wire _T_595 = stbuf_dma_kill_en[0] | stbuf_dma_kill[0]; // @[el2_lsu_stbuf.scala 166:96] + wire _T_603 = stbuf_dma_kill_en[1] | stbuf_dma_kill[1]; // @[el2_lsu_stbuf.scala 166:96] + wire _T_611 = stbuf_dma_kill_en[2] | stbuf_dma_kill[2]; // @[el2_lsu_stbuf.scala 166:96] + wire _T_619 = stbuf_dma_kill_en[3] | stbuf_dma_kill[3]; // @[el2_lsu_stbuf.scala 166:96] + wire [3:0] _T_629 = stbuf_wr_en[0] ? stbuf_byteenin_0 : stbuf_byteen_0; // @[el2_lsu_stbuf.scala 167:96] + wire [3:0] _T_633 = _T_34 ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] + wire [3:0] _T_638 = stbuf_wr_en[1] ? stbuf_byteenin_1 : stbuf_byteen_1; // @[el2_lsu_stbuf.scala 167:96] + wire [3:0] _T_642 = _T_45 ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] + wire [3:0] _T_647 = stbuf_wr_en[2] ? stbuf_byteenin_2 : stbuf_byteen_2; // @[el2_lsu_stbuf.scala 167:96] + wire [3:0] _T_651 = _T_56 ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] + wire [3:0] _T_656 = stbuf_wr_en[3] ? stbuf_byteenin_3 : stbuf_byteen_3; // @[el2_lsu_stbuf.scala 167:96] + wire [3:0] _T_660 = _T_67 ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] + reg ldst_dual_m; // @[el2_lsu_stbuf.scala 176:52] + wire [3:0] _T_689 = stbuf_vld >> RdPtr; // @[el2_lsu_stbuf.scala 180:43] + wire [3:0] _T_691 = stbuf_dma_kill >> RdPtr; // @[el2_lsu_stbuf.scala 180:67] + wire _T_698 = ~_T_691[0]; // @[el2_lsu_stbuf.scala 181:46] + wire _T_699 = _T_689[0] & _T_698; // @[el2_lsu_stbuf.scala 181:44] + wire _T_700 = |stbuf_dma_kill_en; // @[el2_lsu_stbuf.scala 181:91] + wire _T_701 = ~_T_700; // @[el2_lsu_stbuf.scala 181:71] + wire [15:0] _GEN_1 = 2'h1 == RdPtr ? stbuf_addr_1 : stbuf_addr_0; // @[el2_lsu_stbuf.scala 182:22] + wire [15:0] _GEN_2 = 2'h2 == RdPtr ? stbuf_addr_2 : _GEN_1; // @[el2_lsu_stbuf.scala 182:22] + wire [31:0] _GEN_5 = 2'h1 == RdPtr ? stbuf_data_1 : stbuf_data_0; // @[el2_lsu_stbuf.scala 183:22] + wire [31:0] _GEN_6 = 2'h2 == RdPtr ? stbuf_data_2 : _GEN_5; // @[el2_lsu_stbuf.scala 183:22] + wire _T_703 = ~dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 185:44] + wire _T_704 = io_ldst_stbuf_reqvld_r & _T_703; // @[el2_lsu_stbuf.scala 185:42] + wire _T_705 = store_coalesce_hi_r | store_coalesce_lo_r; // @[el2_lsu_stbuf.scala 185:88] + wire _T_706 = ~_T_705; // @[el2_lsu_stbuf.scala 185:66] + wire _T_707 = _T_704 & _T_706; // @[el2_lsu_stbuf.scala 185:64] + wire _T_708 = io_ldst_stbuf_reqvld_r & dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 186:30] + wire _T_709 = store_coalesce_hi_r & store_coalesce_lo_r; // @[el2_lsu_stbuf.scala 186:76] + wire _T_710 = ~_T_709; // @[el2_lsu_stbuf.scala 186:54] + wire _T_711 = _T_708 & _T_710; // @[el2_lsu_stbuf.scala 186:52] + wire WrPtrEn = _T_707 | _T_711; // @[el2_lsu_stbuf.scala 185:113] + wire _T_716 = _T_708 & _T_706; // @[el2_lsu_stbuf.scala 187:67] + wire [3:0] _T_721 = {3'h0,stbuf_vld[0]}; // @[Cat.scala 29:58] + wire [3:0] _T_723 = {3'h0,stbuf_vld[1]}; // @[Cat.scala 29:58] + wire [3:0] _T_725 = {3'h0,stbuf_vld[2]}; // @[Cat.scala 29:58] + wire [3:0] _T_727 = {3'h0,stbuf_vld[3]}; // @[Cat.scala 29:58] + wire [3:0] _T_730 = _T_721 + _T_723; // @[el2_lsu_stbuf.scala 194:101] + wire [3:0] _T_732 = _T_730 + _T_725; // @[el2_lsu_stbuf.scala 194:101] + wire [3:0] stbuf_numvld_any = _T_732 + _T_727; // @[el2_lsu_stbuf.scala 194:101] + wire _T_734 = io_lsu_pkt_m_valid & io_lsu_pkt_m_store; // @[el2_lsu_stbuf.scala 195:39] + wire _T_735 = _T_734 & io_addr_in_dccm_m; // @[el2_lsu_stbuf.scala 195:60] + wire _T_736 = ~io_lsu_pkt_m_dma; // @[el2_lsu_stbuf.scala 195:82] + wire isdccmst_m = _T_735 & _T_736; // @[el2_lsu_stbuf.scala 195:80] + wire _T_737 = io_lsu_pkt_r_valid & io_lsu_pkt_r_store; // @[el2_lsu_stbuf.scala 196:39] + wire _T_738 = _T_737 & io_addr_in_dccm_r; // @[el2_lsu_stbuf.scala 196:60] + wire _T_739 = ~io_lsu_pkt_r_dma; // @[el2_lsu_stbuf.scala 196:82] + wire isdccmst_r = _T_738 & _T_739; // @[el2_lsu_stbuf.scala 196:80] + wire [1:0] _T_740 = {1'h0,isdccmst_m}; // @[Cat.scala 29:58] + wire _T_741 = isdccmst_m & ldst_dual_m; // @[el2_lsu_stbuf.scala 198:62] + wire [2:0] _GEN_14 = {{1'd0}, _T_740}; // @[el2_lsu_stbuf.scala 198:47] + wire [2:0] _T_742 = _GEN_14 << _T_741; // @[el2_lsu_stbuf.scala 198:47] + wire [1:0] _T_743 = {1'h0,isdccmst_r}; // @[Cat.scala 29:58] + wire _T_744 = isdccmst_r & ldst_dual_r; // @[el2_lsu_stbuf.scala 199:62] + wire [2:0] _GEN_15 = {{1'd0}, _T_743}; // @[el2_lsu_stbuf.scala 199:47] + wire [2:0] _T_745 = _GEN_15 << _T_744; // @[el2_lsu_stbuf.scala 199:47] + wire [1:0] stbuf_specvld_m = _T_742[1:0]; // @[el2_lsu_stbuf.scala 198:19] + wire [3:0] _T_746 = {2'h0,stbuf_specvld_m}; // @[Cat.scala 29:58] + wire [3:0] _T_748 = stbuf_numvld_any + _T_746; // @[el2_lsu_stbuf.scala 200:44] + wire [1:0] stbuf_specvld_r = _T_745[1:0]; // @[el2_lsu_stbuf.scala 199:19] + wire [3:0] _T_749 = {2'h0,stbuf_specvld_r}; // @[Cat.scala 29:58] + wire [3:0] stbuf_specvld_any = _T_748 + _T_749; // @[el2_lsu_stbuf.scala 200:78] + wire _T_751 = ~ldst_dual_d; // @[el2_lsu_stbuf.scala 202:34] + wire _T_752 = _T_751 & io_dec_lsu_valid_raw_d; // @[el2_lsu_stbuf.scala 202:47] + wire _T_754 = stbuf_specvld_any >= 4'h4; // @[el2_lsu_stbuf.scala 202:99] + wire _T_755 = stbuf_specvld_any >= 4'h3; // @[el2_lsu_stbuf.scala 202:140] + wire _T_865 = stbuf_match_hi[0] & stbuf_byteen_0[0]; // @[el2_lsu_stbuf.scala 217:116] + wire stbuf_fwdbyteenvec_hi_0_0 = _T_865 & stbuf_vld[0]; // @[el2_lsu_stbuf.scala 217:137] + wire _T_869 = stbuf_match_hi[0] & stbuf_byteen_0[1]; // @[el2_lsu_stbuf.scala 217:116] + wire stbuf_fwdbyteenvec_hi_0_1 = _T_869 & stbuf_vld[0]; // @[el2_lsu_stbuf.scala 217:137] + wire _T_873 = stbuf_match_hi[0] & stbuf_byteen_0[2]; // @[el2_lsu_stbuf.scala 217:116] + wire stbuf_fwdbyteenvec_hi_0_2 = _T_873 & stbuf_vld[0]; // @[el2_lsu_stbuf.scala 217:137] + wire _T_877 = stbuf_match_hi[0] & stbuf_byteen_0[3]; // @[el2_lsu_stbuf.scala 217:116] + wire stbuf_fwdbyteenvec_hi_0_3 = _T_877 & stbuf_vld[0]; // @[el2_lsu_stbuf.scala 217:137] + wire _T_881 = stbuf_match_hi[1] & stbuf_byteen_1[0]; // @[el2_lsu_stbuf.scala 217:116] + wire stbuf_fwdbyteenvec_hi_1_0 = _T_881 & stbuf_vld[1]; // @[el2_lsu_stbuf.scala 217:137] + wire _T_885 = stbuf_match_hi[1] & stbuf_byteen_1[1]; // @[el2_lsu_stbuf.scala 217:116] + wire stbuf_fwdbyteenvec_hi_1_1 = _T_885 & stbuf_vld[1]; // @[el2_lsu_stbuf.scala 217:137] + wire _T_889 = stbuf_match_hi[1] & stbuf_byteen_1[2]; // @[el2_lsu_stbuf.scala 217:116] + wire stbuf_fwdbyteenvec_hi_1_2 = _T_889 & stbuf_vld[1]; // @[el2_lsu_stbuf.scala 217:137] + wire _T_893 = stbuf_match_hi[1] & stbuf_byteen_1[3]; // @[el2_lsu_stbuf.scala 217:116] + wire stbuf_fwdbyteenvec_hi_1_3 = _T_893 & stbuf_vld[1]; // @[el2_lsu_stbuf.scala 217:137] + wire _T_897 = stbuf_match_hi[2] & stbuf_byteen_2[0]; // @[el2_lsu_stbuf.scala 217:116] + wire stbuf_fwdbyteenvec_hi_2_0 = _T_897 & stbuf_vld[2]; // @[el2_lsu_stbuf.scala 217:137] + wire _T_901 = stbuf_match_hi[2] & stbuf_byteen_2[1]; // @[el2_lsu_stbuf.scala 217:116] + wire stbuf_fwdbyteenvec_hi_2_1 = _T_901 & stbuf_vld[2]; // @[el2_lsu_stbuf.scala 217:137] + wire _T_905 = stbuf_match_hi[2] & stbuf_byteen_2[2]; // @[el2_lsu_stbuf.scala 217:116] + wire stbuf_fwdbyteenvec_hi_2_2 = _T_905 & stbuf_vld[2]; // @[el2_lsu_stbuf.scala 217:137] + wire _T_909 = stbuf_match_hi[2] & stbuf_byteen_2[3]; // @[el2_lsu_stbuf.scala 217:116] + wire stbuf_fwdbyteenvec_hi_2_3 = _T_909 & stbuf_vld[2]; // @[el2_lsu_stbuf.scala 217:137] + wire _T_913 = stbuf_match_hi[3] & stbuf_byteen_3[0]; // @[el2_lsu_stbuf.scala 217:116] + wire stbuf_fwdbyteenvec_hi_3_0 = _T_913 & stbuf_vld[3]; // @[el2_lsu_stbuf.scala 217:137] + wire _T_917 = stbuf_match_hi[3] & stbuf_byteen_3[1]; // @[el2_lsu_stbuf.scala 217:116] + wire stbuf_fwdbyteenvec_hi_3_1 = _T_917 & stbuf_vld[3]; // @[el2_lsu_stbuf.scala 217:137] + wire _T_921 = stbuf_match_hi[3] & stbuf_byteen_3[2]; // @[el2_lsu_stbuf.scala 217:116] + wire stbuf_fwdbyteenvec_hi_3_2 = _T_921 & stbuf_vld[3]; // @[el2_lsu_stbuf.scala 217:137] + wire _T_925 = stbuf_match_hi[3] & stbuf_byteen_3[3]; // @[el2_lsu_stbuf.scala 217:116] + wire stbuf_fwdbyteenvec_hi_3_3 = _T_925 & stbuf_vld[3]; // @[el2_lsu_stbuf.scala 217:137] + wire _T_929 = stbuf_match_lo[0] & stbuf_byteen_0[0]; // @[el2_lsu_stbuf.scala 218:116] + wire stbuf_fwdbyteenvec_lo_0_0 = _T_929 & stbuf_vld[0]; // @[el2_lsu_stbuf.scala 218:137] + wire _T_933 = stbuf_match_lo[0] & stbuf_byteen_0[1]; // @[el2_lsu_stbuf.scala 218:116] + wire stbuf_fwdbyteenvec_lo_0_1 = _T_933 & stbuf_vld[0]; // @[el2_lsu_stbuf.scala 218:137] + wire _T_937 = stbuf_match_lo[0] & stbuf_byteen_0[2]; // @[el2_lsu_stbuf.scala 218:116] + wire stbuf_fwdbyteenvec_lo_0_2 = _T_937 & stbuf_vld[0]; // @[el2_lsu_stbuf.scala 218:137] + wire _T_941 = stbuf_match_lo[0] & stbuf_byteen_0[3]; // @[el2_lsu_stbuf.scala 218:116] + wire stbuf_fwdbyteenvec_lo_0_3 = _T_941 & stbuf_vld[0]; // @[el2_lsu_stbuf.scala 218:137] + wire _T_945 = stbuf_match_lo[1] & stbuf_byteen_1[0]; // @[el2_lsu_stbuf.scala 218:116] + wire stbuf_fwdbyteenvec_lo_1_0 = _T_945 & stbuf_vld[1]; // @[el2_lsu_stbuf.scala 218:137] + wire _T_949 = stbuf_match_lo[1] & stbuf_byteen_1[1]; // @[el2_lsu_stbuf.scala 218:116] + wire stbuf_fwdbyteenvec_lo_1_1 = _T_949 & stbuf_vld[1]; // @[el2_lsu_stbuf.scala 218:137] + wire _T_953 = stbuf_match_lo[1] & stbuf_byteen_1[2]; // @[el2_lsu_stbuf.scala 218:116] + wire stbuf_fwdbyteenvec_lo_1_2 = _T_953 & stbuf_vld[1]; // @[el2_lsu_stbuf.scala 218:137] + wire _T_957 = stbuf_match_lo[1] & stbuf_byteen_1[3]; // @[el2_lsu_stbuf.scala 218:116] + wire stbuf_fwdbyteenvec_lo_1_3 = _T_957 & stbuf_vld[1]; // @[el2_lsu_stbuf.scala 218:137] + wire _T_961 = stbuf_match_lo[2] & stbuf_byteen_2[0]; // @[el2_lsu_stbuf.scala 218:116] + wire stbuf_fwdbyteenvec_lo_2_0 = _T_961 & stbuf_vld[2]; // @[el2_lsu_stbuf.scala 218:137] + wire _T_965 = stbuf_match_lo[2] & stbuf_byteen_2[1]; // @[el2_lsu_stbuf.scala 218:116] + wire stbuf_fwdbyteenvec_lo_2_1 = _T_965 & stbuf_vld[2]; // @[el2_lsu_stbuf.scala 218:137] + wire _T_969 = stbuf_match_lo[2] & stbuf_byteen_2[2]; // @[el2_lsu_stbuf.scala 218:116] + wire stbuf_fwdbyteenvec_lo_2_2 = _T_969 & stbuf_vld[2]; // @[el2_lsu_stbuf.scala 218:137] + wire _T_973 = stbuf_match_lo[2] & stbuf_byteen_2[3]; // @[el2_lsu_stbuf.scala 218:116] + wire stbuf_fwdbyteenvec_lo_2_3 = _T_973 & stbuf_vld[2]; // @[el2_lsu_stbuf.scala 218:137] + wire _T_977 = stbuf_match_lo[3] & stbuf_byteen_3[0]; // @[el2_lsu_stbuf.scala 218:116] + wire stbuf_fwdbyteenvec_lo_3_0 = _T_977 & stbuf_vld[3]; // @[el2_lsu_stbuf.scala 218:137] + wire _T_981 = stbuf_match_lo[3] & stbuf_byteen_3[1]; // @[el2_lsu_stbuf.scala 218:116] + wire stbuf_fwdbyteenvec_lo_3_1 = _T_981 & stbuf_vld[3]; // @[el2_lsu_stbuf.scala 218:137] + wire _T_985 = stbuf_match_lo[3] & stbuf_byteen_3[2]; // @[el2_lsu_stbuf.scala 218:116] + wire stbuf_fwdbyteenvec_lo_3_2 = _T_985 & stbuf_vld[3]; // @[el2_lsu_stbuf.scala 218:137] + wire _T_989 = stbuf_match_lo[3] & stbuf_byteen_3[3]; // @[el2_lsu_stbuf.scala 218:116] + wire stbuf_fwdbyteenvec_lo_3_3 = _T_989 & stbuf_vld[3]; // @[el2_lsu_stbuf.scala 218:137] + wire _T_991 = stbuf_fwdbyteenvec_hi_0_0 | stbuf_fwdbyteenvec_hi_1_0; // @[el2_lsu_stbuf.scala 219:147] + wire _T_992 = _T_991 | stbuf_fwdbyteenvec_hi_2_0; // @[el2_lsu_stbuf.scala 219:147] + wire stbuf_fwdbyteen_hi_pre_m_0 = _T_992 | stbuf_fwdbyteenvec_hi_3_0; // @[el2_lsu_stbuf.scala 219:147] + wire _T_993 = stbuf_fwdbyteenvec_hi_0_1 | stbuf_fwdbyteenvec_hi_1_1; // @[el2_lsu_stbuf.scala 219:147] + wire _T_994 = _T_993 | stbuf_fwdbyteenvec_hi_2_1; // @[el2_lsu_stbuf.scala 219:147] + wire stbuf_fwdbyteen_hi_pre_m_1 = _T_994 | stbuf_fwdbyteenvec_hi_3_1; // @[el2_lsu_stbuf.scala 219:147] + wire _T_995 = stbuf_fwdbyteenvec_hi_0_2 | stbuf_fwdbyteenvec_hi_1_2; // @[el2_lsu_stbuf.scala 219:147] + wire _T_996 = _T_995 | stbuf_fwdbyteenvec_hi_2_2; // @[el2_lsu_stbuf.scala 219:147] + wire stbuf_fwdbyteen_hi_pre_m_2 = _T_996 | stbuf_fwdbyteenvec_hi_3_2; // @[el2_lsu_stbuf.scala 219:147] + wire _T_997 = stbuf_fwdbyteenvec_hi_0_3 | stbuf_fwdbyteenvec_hi_1_3; // @[el2_lsu_stbuf.scala 219:147] + wire _T_998 = _T_997 | stbuf_fwdbyteenvec_hi_2_3; // @[el2_lsu_stbuf.scala 219:147] + wire stbuf_fwdbyteen_hi_pre_m_3 = _T_998 | stbuf_fwdbyteenvec_hi_3_3; // @[el2_lsu_stbuf.scala 219:147] + wire _T_999 = stbuf_fwdbyteenvec_lo_0_0 | stbuf_fwdbyteenvec_lo_1_0; // @[el2_lsu_stbuf.scala 220:147] + wire _T_1000 = _T_999 | stbuf_fwdbyteenvec_lo_2_0; // @[el2_lsu_stbuf.scala 220:147] + wire stbuf_fwdbyteen_lo_pre_m_0 = _T_1000 | stbuf_fwdbyteenvec_lo_3_0; // @[el2_lsu_stbuf.scala 220:147] + wire _T_1001 = stbuf_fwdbyteenvec_lo_0_1 | stbuf_fwdbyteenvec_lo_1_1; // @[el2_lsu_stbuf.scala 220:147] + wire _T_1002 = _T_1001 | stbuf_fwdbyteenvec_lo_2_1; // @[el2_lsu_stbuf.scala 220:147] + wire stbuf_fwdbyteen_lo_pre_m_1 = _T_1002 | stbuf_fwdbyteenvec_lo_3_1; // @[el2_lsu_stbuf.scala 220:147] + wire _T_1003 = stbuf_fwdbyteenvec_lo_0_2 | stbuf_fwdbyteenvec_lo_1_2; // @[el2_lsu_stbuf.scala 220:147] + wire _T_1004 = _T_1003 | stbuf_fwdbyteenvec_lo_2_2; // @[el2_lsu_stbuf.scala 220:147] + wire stbuf_fwdbyteen_lo_pre_m_2 = _T_1004 | stbuf_fwdbyteenvec_lo_3_2; // @[el2_lsu_stbuf.scala 220:147] + wire _T_1005 = stbuf_fwdbyteenvec_lo_0_3 | stbuf_fwdbyteenvec_lo_1_3; // @[el2_lsu_stbuf.scala 220:147] + wire _T_1006 = _T_1005 | stbuf_fwdbyteenvec_lo_2_3; // @[el2_lsu_stbuf.scala 220:147] + wire stbuf_fwdbyteen_lo_pre_m_3 = _T_1006 | stbuf_fwdbyteenvec_lo_3_3; // @[el2_lsu_stbuf.scala 220:147] + wire [31:0] _T_1009 = stbuf_match_hi[0] ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_1010 = _T_1009 & stbuf_data_0; // @[el2_lsu_stbuf.scala 222:97] + wire [31:0] _T_1013 = stbuf_match_hi[1] ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_1014 = _T_1013 & stbuf_data_1; // @[el2_lsu_stbuf.scala 222:97] + wire [31:0] _T_1017 = stbuf_match_hi[2] ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_1018 = _T_1017 & stbuf_data_2; // @[el2_lsu_stbuf.scala 222:97] + wire [31:0] _T_1021 = stbuf_match_hi[3] ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_1022 = _T_1021 & stbuf_data_3; // @[el2_lsu_stbuf.scala 222:97] + wire [31:0] _T_1024 = _T_1022 | _T_1018; // @[el2_lsu_stbuf.scala 222:130] + wire [31:0] _T_1025 = _T_1024 | _T_1014; // @[el2_lsu_stbuf.scala 222:130] + wire [31:0] stbuf_fwddata_hi_pre_m = _T_1025 | _T_1010; // @[el2_lsu_stbuf.scala 222:130] + wire [31:0] _T_1028 = stbuf_match_lo[0] ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_1029 = _T_1028 & stbuf_data_0; // @[el2_lsu_stbuf.scala 223:97] + wire [31:0] _T_1032 = stbuf_match_lo[1] ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_1033 = _T_1032 & stbuf_data_1; // @[el2_lsu_stbuf.scala 223:97] + wire [31:0] _T_1036 = stbuf_match_lo[2] ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_1037 = _T_1036 & stbuf_data_2; // @[el2_lsu_stbuf.scala 223:97] + wire [31:0] _T_1040 = stbuf_match_lo[3] ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_1041 = _T_1040 & stbuf_data_3; // @[el2_lsu_stbuf.scala 223:97] + wire [31:0] _T_1043 = _T_1041 | _T_1037; // @[el2_lsu_stbuf.scala 223:130] + wire [31:0] _T_1044 = _T_1043 | _T_1033; // @[el2_lsu_stbuf.scala 223:130] + wire [31:0] stbuf_fwddata_lo_pre_m = _T_1044 | _T_1029; // @[el2_lsu_stbuf.scala 223:130] + wire _T_1049 = io_lsu_addr_m[31:2] == io_lsu_addr_r[31:2]; // @[el2_lsu_stbuf.scala 230:49] + wire _T_1050 = _T_1049 & io_lsu_pkt_r_valid; // @[el2_lsu_stbuf.scala 230:74] + wire _T_1051 = _T_1050 & io_lsu_pkt_r_store; // @[el2_lsu_stbuf.scala 230:95] + wire ld_addr_rhit_lo_lo = _T_1051 & _T_739; // @[el2_lsu_stbuf.scala 230:116] + wire _T_1055 = io_end_addr_m[31:2] == io_lsu_addr_r[31:2]; // @[el2_lsu_stbuf.scala 231:49] + wire _T_1056 = _T_1055 & io_lsu_pkt_r_valid; // @[el2_lsu_stbuf.scala 231:74] + wire _T_1057 = _T_1056 & io_lsu_pkt_r_store; // @[el2_lsu_stbuf.scala 231:95] + wire ld_addr_rhit_lo_hi = _T_1057 & _T_739; // @[el2_lsu_stbuf.scala 231:116] + wire _T_1061 = io_lsu_addr_m[31:2] == io_end_addr_r[31:2]; // @[el2_lsu_stbuf.scala 232:49] + wire _T_1062 = _T_1061 & io_lsu_pkt_r_valid; // @[el2_lsu_stbuf.scala 232:74] + wire _T_1063 = _T_1062 & io_lsu_pkt_r_store; // @[el2_lsu_stbuf.scala 232:95] + wire _T_1065 = _T_1063 & _T_739; // @[el2_lsu_stbuf.scala 232:116] + wire ld_addr_rhit_hi_lo = _T_1065 & dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 232:136] + wire _T_1068 = io_end_addr_m[31:2] == io_end_addr_r[31:2]; // @[el2_lsu_stbuf.scala 233:49] + wire _T_1069 = _T_1068 & io_lsu_pkt_r_valid; // @[el2_lsu_stbuf.scala 233:74] + wire _T_1070 = _T_1069 & io_lsu_pkt_r_store; // @[el2_lsu_stbuf.scala 233:95] + wire _T_1072 = _T_1070 & _T_739; // @[el2_lsu_stbuf.scala 233:116] + wire ld_addr_rhit_hi_hi = _T_1072 & dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 233:136] + wire _T_1074 = ld_addr_rhit_lo_lo & store_byteen_ext_r[0]; // @[el2_lsu_stbuf.scala 235:79] + wire _T_1076 = ld_addr_rhit_lo_lo & store_byteen_ext_r[1]; // @[el2_lsu_stbuf.scala 235:79] + wire _T_1078 = ld_addr_rhit_lo_lo & store_byteen_ext_r[2]; // @[el2_lsu_stbuf.scala 235:79] + wire _T_1080 = ld_addr_rhit_lo_lo & store_byteen_ext_r[3]; // @[el2_lsu_stbuf.scala 235:79] + wire [3:0] ld_byte_rhit_lo_lo = {_T_1080,_T_1078,_T_1076,_T_1074}; // @[Cat.scala 29:58] + wire _T_1085 = ld_addr_rhit_lo_hi & store_byteen_ext_r[0]; // @[el2_lsu_stbuf.scala 236:79] + wire _T_1087 = ld_addr_rhit_lo_hi & store_byteen_ext_r[1]; // @[el2_lsu_stbuf.scala 236:79] + wire _T_1089 = ld_addr_rhit_lo_hi & store_byteen_ext_r[2]; // @[el2_lsu_stbuf.scala 236:79] + wire _T_1091 = ld_addr_rhit_lo_hi & store_byteen_ext_r[3]; // @[el2_lsu_stbuf.scala 236:79] + wire [3:0] ld_byte_rhit_lo_hi = {_T_1091,_T_1089,_T_1087,_T_1085}; // @[Cat.scala 29:58] + wire _T_1096 = ld_addr_rhit_hi_lo & store_byteen_ext_r[4]; // @[el2_lsu_stbuf.scala 237:79] + wire _T_1098 = ld_addr_rhit_hi_lo & store_byteen_ext_r[5]; // @[el2_lsu_stbuf.scala 237:79] + wire _T_1100 = ld_addr_rhit_hi_lo & store_byteen_ext_r[6]; // @[el2_lsu_stbuf.scala 237:79] + wire _T_1102 = ld_addr_rhit_hi_lo & store_byteen_ext_r[7]; // @[el2_lsu_stbuf.scala 237:79] + wire [3:0] ld_byte_rhit_hi_lo = {_T_1102,_T_1100,_T_1098,_T_1096}; // @[Cat.scala 29:58] + wire _T_1107 = ld_addr_rhit_hi_hi & store_byteen_ext_r[4]; // @[el2_lsu_stbuf.scala 238:79] + wire _T_1109 = ld_addr_rhit_hi_hi & store_byteen_ext_r[5]; // @[el2_lsu_stbuf.scala 238:79] + wire _T_1111 = ld_addr_rhit_hi_hi & store_byteen_ext_r[6]; // @[el2_lsu_stbuf.scala 238:79] + wire _T_1113 = ld_addr_rhit_hi_hi & store_byteen_ext_r[7]; // @[el2_lsu_stbuf.scala 238:79] + wire [3:0] ld_byte_rhit_hi_hi = {_T_1113,_T_1111,_T_1109,_T_1107}; // @[Cat.scala 29:58] + wire _T_1119 = ld_byte_rhit_lo_lo[0] | ld_byte_rhit_hi_lo[0]; // @[el2_lsu_stbuf.scala 240:79] + wire _T_1122 = ld_byte_rhit_lo_lo[1] | ld_byte_rhit_hi_lo[1]; // @[el2_lsu_stbuf.scala 240:79] + wire _T_1125 = ld_byte_rhit_lo_lo[2] | ld_byte_rhit_hi_lo[2]; // @[el2_lsu_stbuf.scala 240:79] + wire _T_1128 = ld_byte_rhit_lo_lo[3] | ld_byte_rhit_hi_lo[3]; // @[el2_lsu_stbuf.scala 240:79] + wire [3:0] ld_byte_rhit_lo = {_T_1128,_T_1125,_T_1122,_T_1119}; // @[Cat.scala 29:58] + wire _T_1134 = ld_byte_rhit_lo_hi[0] | ld_byte_rhit_hi_hi[0]; // @[el2_lsu_stbuf.scala 241:79] + wire _T_1137 = ld_byte_rhit_lo_hi[1] | ld_byte_rhit_hi_hi[1]; // @[el2_lsu_stbuf.scala 241:79] + wire _T_1140 = ld_byte_rhit_lo_hi[2] | ld_byte_rhit_hi_hi[2]; // @[el2_lsu_stbuf.scala 241:79] + wire _T_1143 = ld_byte_rhit_lo_hi[3] | ld_byte_rhit_hi_hi[3]; // @[el2_lsu_stbuf.scala 241:79] + wire [3:0] ld_byte_rhit_hi = {_T_1143,_T_1140,_T_1137,_T_1134}; // @[Cat.scala 29:58] + wire [7:0] _T_1149 = ld_byte_rhit_lo_lo[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_1151 = _T_1149 & io_store_data_lo_r[7:0]; // @[el2_lsu_stbuf.scala 243:53] + wire [7:0] _T_1154 = ld_byte_rhit_hi_lo[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_1156 = _T_1154 & io_store_data_hi_r[7:0]; // @[el2_lsu_stbuf.scala 243:114] + wire [7:0] fwdpipe1_lo = _T_1151 | _T_1156; // @[el2_lsu_stbuf.scala 243:80] + wire [7:0] _T_1159 = ld_byte_rhit_lo_lo[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_1161 = _T_1159 & io_store_data_lo_r[15:8]; // @[el2_lsu_stbuf.scala 244:53] + wire [7:0] _T_1164 = ld_byte_rhit_hi_lo[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_1166 = _T_1164 & io_store_data_hi_r[15:8]; // @[el2_lsu_stbuf.scala 244:115] + wire [7:0] fwdpipe2_lo = _T_1161 | _T_1166; // @[el2_lsu_stbuf.scala 244:81] + wire [7:0] _T_1169 = ld_byte_rhit_lo_lo[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_1171 = _T_1169 & io_store_data_lo_r[23:16]; // @[el2_lsu_stbuf.scala 245:53] + wire [7:0] _T_1174 = ld_byte_rhit_hi_lo[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_1176 = _T_1174 & io_store_data_hi_r[23:16]; // @[el2_lsu_stbuf.scala 245:116] + wire [7:0] fwdpipe3_lo = _T_1171 | _T_1176; // @[el2_lsu_stbuf.scala 245:82] + wire [7:0] _T_1179 = ld_byte_rhit_lo_lo[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_1181 = _T_1179 & io_store_data_lo_r[31:24]; // @[el2_lsu_stbuf.scala 246:53] + wire [7:0] _T_1184 = ld_byte_rhit_hi_lo[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_1186 = _T_1184 & io_store_data_hi_r[31:24]; // @[el2_lsu_stbuf.scala 246:116] + wire [7:0] fwdpipe4_lo = _T_1181 | _T_1186; // @[el2_lsu_stbuf.scala 246:82] + wire [31:0] ld_fwddata_rpipe_lo = {fwdpipe4_lo,fwdpipe3_lo,fwdpipe2_lo,fwdpipe1_lo}; // @[Cat.scala 29:58] + wire [7:0] _T_1192 = ld_byte_rhit_lo_hi[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_1194 = _T_1192 & io_store_data_lo_r[7:0]; // @[el2_lsu_stbuf.scala 249:53] + wire [7:0] _T_1197 = ld_byte_rhit_hi_hi[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_1199 = _T_1197 & io_store_data_hi_r[7:0]; // @[el2_lsu_stbuf.scala 249:114] + wire [7:0] fwdpipe1_hi = _T_1194 | _T_1199; // @[el2_lsu_stbuf.scala 249:80] + wire [7:0] _T_1202 = ld_byte_rhit_lo_hi[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_1204 = _T_1202 & io_store_data_lo_r[15:8]; // @[el2_lsu_stbuf.scala 250:53] + wire [7:0] _T_1207 = ld_byte_rhit_hi_hi[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_1209 = _T_1207 & io_store_data_hi_r[15:8]; // @[el2_lsu_stbuf.scala 250:115] + wire [7:0] fwdpipe2_hi = _T_1204 | _T_1209; // @[el2_lsu_stbuf.scala 250:81] + wire [7:0] _T_1212 = ld_byte_rhit_lo_hi[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_1214 = _T_1212 & io_store_data_lo_r[23:16]; // @[el2_lsu_stbuf.scala 251:53] + wire [7:0] _T_1217 = ld_byte_rhit_hi_hi[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_1219 = _T_1217 & io_store_data_hi_r[23:16]; // @[el2_lsu_stbuf.scala 251:116] + wire [7:0] fwdpipe3_hi = _T_1214 | _T_1219; // @[el2_lsu_stbuf.scala 251:82] + wire [7:0] _T_1222 = ld_byte_rhit_lo_hi[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_1224 = _T_1222 & io_store_data_lo_r[31:24]; // @[el2_lsu_stbuf.scala 252:53] + wire [7:0] _T_1227 = ld_byte_rhit_hi_hi[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_1229 = _T_1227 & io_store_data_hi_r[31:24]; // @[el2_lsu_stbuf.scala 252:116] + wire [7:0] fwdpipe4_hi = _T_1224 | _T_1229; // @[el2_lsu_stbuf.scala 252:82] + wire [31:0] ld_fwddata_rpipe_hi = {fwdpipe4_hi,fwdpipe3_hi,fwdpipe2_hi,fwdpipe1_hi}; // @[Cat.scala 29:58] + wire _T_1264 = ld_byte_rhit_hi[0] | stbuf_fwdbyteen_hi_pre_m_0; // @[el2_lsu_stbuf.scala 258:83] + wire _T_1266 = ld_byte_rhit_hi[1] | stbuf_fwdbyteen_hi_pre_m_1; // @[el2_lsu_stbuf.scala 258:83] + wire _T_1268 = ld_byte_rhit_hi[2] | stbuf_fwdbyteen_hi_pre_m_2; // @[el2_lsu_stbuf.scala 258:83] + wire _T_1270 = ld_byte_rhit_hi[3] | stbuf_fwdbyteen_hi_pre_m_3; // @[el2_lsu_stbuf.scala 258:83] + wire [2:0] _T_1272 = {_T_1270,_T_1268,_T_1266}; // @[Cat.scala 29:58] + wire _T_1275 = ld_byte_rhit_lo[0] | stbuf_fwdbyteen_lo_pre_m_0; // @[el2_lsu_stbuf.scala 259:83] + wire _T_1277 = ld_byte_rhit_lo[1] | stbuf_fwdbyteen_lo_pre_m_1; // @[el2_lsu_stbuf.scala 259:83] + wire _T_1279 = ld_byte_rhit_lo[2] | stbuf_fwdbyteen_lo_pre_m_2; // @[el2_lsu_stbuf.scala 259:83] + wire _T_1281 = ld_byte_rhit_lo[3] | stbuf_fwdbyteen_lo_pre_m_3; // @[el2_lsu_stbuf.scala 259:83] + wire [2:0] _T_1283 = {_T_1281,_T_1279,_T_1277}; // @[Cat.scala 29:58] + wire [7:0] stbuf_fwdpipe1_lo = ld_byte_rhit_lo[0] ? ld_fwddata_rpipe_lo[7:0] : stbuf_fwddata_lo_pre_m[7:0]; // @[el2_lsu_stbuf.scala 262:30] + wire [7:0] stbuf_fwdpipe2_lo = ld_byte_rhit_lo[1] ? ld_fwddata_rpipe_lo[15:8] : stbuf_fwddata_lo_pre_m[15:8]; // @[el2_lsu_stbuf.scala 263:30] + wire [7:0] stbuf_fwdpipe3_lo = ld_byte_rhit_lo[2] ? ld_fwddata_rpipe_lo[23:16] : stbuf_fwddata_lo_pre_m[23:16]; // @[el2_lsu_stbuf.scala 264:30] + wire [7:0] stbuf_fwdpipe4_lo = ld_byte_rhit_lo[3] ? ld_fwddata_rpipe_lo[31:24] : stbuf_fwddata_lo_pre_m[31:24]; // @[el2_lsu_stbuf.scala 265:30] + wire [15:0] _T_1297 = {stbuf_fwdpipe2_lo,stbuf_fwdpipe1_lo}; // @[Cat.scala 29:58] + wire [15:0] _T_1298 = {stbuf_fwdpipe4_lo,stbuf_fwdpipe3_lo}; // @[Cat.scala 29:58] + wire [7:0] stbuf_fwdpipe1_hi = ld_byte_rhit_hi[0] ? ld_fwddata_rpipe_hi[7:0] : stbuf_fwddata_hi_pre_m[7:0]; // @[el2_lsu_stbuf.scala 268:30] + wire [7:0] stbuf_fwdpipe2_hi = ld_byte_rhit_hi[1] ? ld_fwddata_rpipe_hi[15:8] : stbuf_fwddata_hi_pre_m[15:8]; // @[el2_lsu_stbuf.scala 269:30] + wire [7:0] stbuf_fwdpipe3_hi = ld_byte_rhit_hi[2] ? ld_fwddata_rpipe_hi[23:16] : stbuf_fwddata_hi_pre_m[23:16]; // @[el2_lsu_stbuf.scala 270:30] + wire [7:0] stbuf_fwdpipe4_hi = ld_byte_rhit_hi[3] ? ld_fwddata_rpipe_hi[31:24] : stbuf_fwddata_hi_pre_m[31:24]; // @[el2_lsu_stbuf.scala 271:30] + wire [15:0] _T_1312 = {stbuf_fwdpipe2_hi,stbuf_fwdpipe1_hi}; // @[Cat.scala 29:58] + wire [15:0] _T_1313 = {stbuf_fwdpipe4_hi,stbuf_fwdpipe3_hi}; // @[Cat.scala 29:58] + rvclkhdr rvclkhdr ( // @[el2_lib.scala 506:23] + .io_l1clk(rvclkhdr_io_l1clk), + .io_clk(rvclkhdr_io_clk), + .io_en(rvclkhdr_io_en), + .io_scan_mode(rvclkhdr_io_scan_mode) + ); + rvclkhdr rvclkhdr_1 ( // @[el2_lib.scala 506:23] + .io_l1clk(rvclkhdr_1_io_l1clk), + .io_clk(rvclkhdr_1_io_clk), + .io_en(rvclkhdr_1_io_en), + .io_scan_mode(rvclkhdr_1_io_scan_mode) + ); + rvclkhdr rvclkhdr_2 ( // @[el2_lib.scala 506:23] + .io_l1clk(rvclkhdr_2_io_l1clk), + .io_clk(rvclkhdr_2_io_clk), + .io_en(rvclkhdr_2_io_en), + .io_scan_mode(rvclkhdr_2_io_scan_mode) + ); + rvclkhdr rvclkhdr_3 ( // @[el2_lib.scala 506:23] + .io_l1clk(rvclkhdr_3_io_l1clk), + .io_clk(rvclkhdr_3_io_clk), + .io_en(rvclkhdr_3_io_en), + .io_scan_mode(rvclkhdr_3_io_scan_mode) + ); + rvclkhdr rvclkhdr_4 ( // @[el2_lib.scala 506:23] + .io_l1clk(rvclkhdr_4_io_l1clk), + .io_clk(rvclkhdr_4_io_clk), + .io_en(rvclkhdr_4_io_en), + .io_scan_mode(rvclkhdr_4_io_scan_mode) + ); + rvclkhdr rvclkhdr_5 ( // @[el2_lib.scala 506:23] + .io_l1clk(rvclkhdr_5_io_l1clk), + .io_clk(rvclkhdr_5_io_clk), + .io_en(rvclkhdr_5_io_en), + .io_scan_mode(rvclkhdr_5_io_scan_mode) + ); + rvclkhdr rvclkhdr_6 ( // @[el2_lib.scala 506:23] + .io_l1clk(rvclkhdr_6_io_l1clk), + .io_clk(rvclkhdr_6_io_clk), + .io_en(rvclkhdr_6_io_en), + .io_scan_mode(rvclkhdr_6_io_scan_mode) + ); + rvclkhdr rvclkhdr_7 ( // @[el2_lib.scala 506:23] + .io_l1clk(rvclkhdr_7_io_l1clk), + .io_clk(rvclkhdr_7_io_clk), + .io_en(rvclkhdr_7_io_en), + .io_scan_mode(rvclkhdr_7_io_scan_mode) + ); + assign io_stbuf_reqvld_any = _T_699 & _T_701; // @[el2_lsu_stbuf.scala 52:47 el2_lsu_stbuf.scala 181:24] + assign io_stbuf_reqvld_flushed_any = _T_689[0] & _T_691[0]; // @[el2_lsu_stbuf.scala 53:35 el2_lsu_stbuf.scala 180:31] + assign io_stbuf_addr_any = 2'h3 == RdPtr ? stbuf_addr_3 : _GEN_2; // @[el2_lsu_stbuf.scala 54:35 el2_lsu_stbuf.scala 182:22] + assign io_stbuf_data_any = 2'h3 == RdPtr ? stbuf_data_3 : _GEN_6; // @[el2_lsu_stbuf.scala 55:35 el2_lsu_stbuf.scala 183:22] + assign io_lsu_stbuf_full_any = _T_752 ? _T_754 : _T_755; // @[el2_lsu_stbuf.scala 56:43 el2_lsu_stbuf.scala 202:26] + assign io_lsu_stbuf_empty_any = stbuf_numvld_any == 4'h0; // @[el2_lsu_stbuf.scala 57:43 el2_lsu_stbuf.scala 203:26] + assign io_ldst_stbuf_reqvld_r = io_lsu_commit_r & io_store_stbuf_reqvld_r; // @[el2_lsu_stbuf.scala 58:43 el2_lsu_stbuf.scala 129:26] + assign io_stbuf_fwddata_hi_m = {_T_1313,_T_1312}; // @[el2_lsu_stbuf.scala 59:43 el2_lsu_stbuf.scala 272:25] + assign io_stbuf_fwddata_lo_m = {_T_1298,_T_1297}; // @[el2_lsu_stbuf.scala 60:43 el2_lsu_stbuf.scala 266:25] + assign io_stbuf_fwdbyteen_hi_m = {_T_1272,_T_1264}; // @[el2_lsu_stbuf.scala 61:37 el2_lsu_stbuf.scala 258:27] + assign io_stbuf_fwdbyteen_lo_m = {_T_1283,_T_1275}; // @[el2_lsu_stbuf.scala 62:37 el2_lsu_stbuf.scala 259:27] + assign rvclkhdr_io_clk = clock; // @[el2_lib.scala 508:18] + assign rvclkhdr_io_en = stbuf_wr_en[0]; // @[el2_lib.scala 509:17] + assign rvclkhdr_io_scan_mode = io_scan_mode; // @[el2_lib.scala 510:24] + assign rvclkhdr_1_io_clk = clock; // @[el2_lib.scala 508:18] + assign rvclkhdr_1_io_en = stbuf_wr_en[0]; // @[el2_lib.scala 509:17] + assign rvclkhdr_1_io_scan_mode = io_scan_mode; // @[el2_lib.scala 510:24] + assign rvclkhdr_2_io_clk = clock; // @[el2_lib.scala 508:18] + assign rvclkhdr_2_io_en = stbuf_wr_en[1]; // @[el2_lib.scala 509:17] + assign rvclkhdr_2_io_scan_mode = io_scan_mode; // @[el2_lib.scala 510:24] + assign rvclkhdr_3_io_clk = clock; // @[el2_lib.scala 508:18] + assign rvclkhdr_3_io_en = stbuf_wr_en[1]; // @[el2_lib.scala 509:17] + assign rvclkhdr_3_io_scan_mode = io_scan_mode; // @[el2_lib.scala 510:24] + assign rvclkhdr_4_io_clk = clock; // @[el2_lib.scala 508:18] + assign rvclkhdr_4_io_en = stbuf_wr_en[2]; // @[el2_lib.scala 509:17] + assign rvclkhdr_4_io_scan_mode = io_scan_mode; // @[el2_lib.scala 510:24] + assign rvclkhdr_5_io_clk = clock; // @[el2_lib.scala 508:18] + assign rvclkhdr_5_io_en = stbuf_wr_en[2]; // @[el2_lib.scala 509:17] + assign rvclkhdr_5_io_scan_mode = io_scan_mode; // @[el2_lib.scala 510:24] + assign rvclkhdr_6_io_clk = clock; // @[el2_lib.scala 508:18] + assign rvclkhdr_6_io_en = stbuf_wr_en[3]; // @[el2_lib.scala 509:17] + assign rvclkhdr_6_io_scan_mode = io_scan_mode; // @[el2_lib.scala 510:24] + assign rvclkhdr_7_io_clk = clock; // @[el2_lib.scala 508:18] + assign rvclkhdr_7_io_en = stbuf_wr_en[3]; // @[el2_lib.scala 509:17] + assign rvclkhdr_7_io_scan_mode = io_scan_mode; // @[el2_lib.scala 510:24] +`ifdef RANDOMIZE_GARBAGE_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_INVALID_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_REG_INIT +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_MEM_INIT +`define RANDOMIZE +`endif +`ifndef RANDOM +`define RANDOM $random +`endif +`ifdef RANDOMIZE_MEM_INIT + integer initvar; +`endif +`ifndef SYNTHESIS +`ifdef FIRRTL_BEFORE_INITIAL +`FIRRTL_BEFORE_INITIAL +`endif +initial begin + `ifdef RANDOMIZE + `ifdef INIT_RANDOM + `INIT_RANDOM + `endif + `ifndef VERILATOR + `ifdef RANDOMIZE_DELAY + #`RANDOMIZE_DELAY begin end + `else + #0.002 begin end + `endif + `endif +`ifdef RANDOMIZE_REG_INIT + _RAND_0 = {1{`RANDOM}}; + ldst_dual_r = _RAND_0[0:0]; + _RAND_1 = {1{`RANDOM}}; + RdPtr = _RAND_1[1:0]; + _RAND_2 = {1{`RANDOM}}; + WrPtr = _RAND_2[1:0]; + _RAND_3 = {1{`RANDOM}}; + stbuf_addr_0 = _RAND_3[15:0]; + _RAND_4 = {1{`RANDOM}}; + _T_588 = _RAND_4[0:0]; + _RAND_5 = {1{`RANDOM}}; + _T_580 = _RAND_5[0:0]; + _RAND_6 = {1{`RANDOM}}; + _T_572 = _RAND_6[0:0]; + _RAND_7 = {1{`RANDOM}}; + _T_564 = _RAND_7[0:0]; + _RAND_8 = {1{`RANDOM}}; + _T_623 = _RAND_8[0:0]; + _RAND_9 = {1{`RANDOM}}; + _T_615 = _RAND_9[0:0]; + _RAND_10 = {1{`RANDOM}}; + _T_607 = _RAND_10[0:0]; + _RAND_11 = {1{`RANDOM}}; + _T_599 = _RAND_11[0:0]; + _RAND_12 = {1{`RANDOM}}; + stbuf_addr_1 = _RAND_12[15:0]; + _RAND_13 = {1{`RANDOM}}; + stbuf_addr_2 = _RAND_13[15:0]; + _RAND_14 = {1{`RANDOM}}; + stbuf_addr_3 = _RAND_14[15:0]; + _RAND_15 = {1{`RANDOM}}; + stbuf_byteen_0 = _RAND_15[3:0]; + _RAND_16 = {1{`RANDOM}}; + stbuf_byteen_1 = _RAND_16[3:0]; + _RAND_17 = {1{`RANDOM}}; + stbuf_byteen_2 = _RAND_17[3:0]; + _RAND_18 = {1{`RANDOM}}; + stbuf_byteen_3 = _RAND_18[3:0]; + _RAND_19 = {1{`RANDOM}}; + stbuf_data_0 = _RAND_19[31:0]; + _RAND_20 = {1{`RANDOM}}; + stbuf_data_1 = _RAND_20[31:0]; + _RAND_21 = {1{`RANDOM}}; + stbuf_data_2 = _RAND_21[31:0]; + _RAND_22 = {1{`RANDOM}}; + stbuf_data_3 = _RAND_22[31:0]; + _RAND_23 = {1{`RANDOM}}; + ldst_dual_m = _RAND_23[0:0]; +`endif // RANDOMIZE_REG_INIT + if (reset) begin + ldst_dual_r = 1'h0; + end + if (reset) begin + RdPtr = 2'h0; + end + if (reset) begin + WrPtr = 2'h0; + end + if (reset) begin + stbuf_addr_0 = 16'h0; + end + if (reset) begin + _T_588 = 1'h0; + end + if (reset) begin + _T_580 = 1'h0; + end + if (reset) begin + _T_572 = 1'h0; + end + if (reset) begin + _T_564 = 1'h0; + end + if (reset) begin + _T_623 = 1'h0; + end + if (reset) begin + _T_615 = 1'h0; + end + if (reset) begin + _T_607 = 1'h0; + end + if (reset) begin + _T_599 = 1'h0; + end + if (reset) begin + stbuf_addr_1 = 16'h0; + end + if (reset) begin + stbuf_addr_2 = 16'h0; + end + if (reset) begin + stbuf_addr_3 = 16'h0; + end + if (reset) begin + stbuf_byteen_0 = 4'h0; + end + if (reset) begin + stbuf_byteen_1 = 4'h0; + end + if (reset) begin + stbuf_byteen_2 = 4'h0; + end + if (reset) begin + stbuf_byteen_3 = 4'h0; + end + if (reset) begin + stbuf_data_0 = 32'h0; + end + if (reset) begin + stbuf_data_1 = 32'h0; + end + if (reset) begin + stbuf_data_2 = 32'h0; + end + if (reset) begin + stbuf_data_3 = 32'h0; + end + if (reset) begin + ldst_dual_m = 1'h0; + end + `endif // RANDOMIZE +end // initial +`ifdef FIRRTL_AFTER_INITIAL +`FIRRTL_AFTER_INITIAL +`endif +`endif // SYNTHESIS + always @(posedge io_lsu_c1_r_clk or posedge reset) begin + if (reset) begin + ldst_dual_r <= 1'h0; + end else begin + ldst_dual_r <= ldst_dual_m; + end + end + always @(posedge io_lsu_stbuf_c1_clk or posedge reset) begin + if (reset) begin + RdPtr <= 2'h0; + end else if (_T_212) begin + RdPtr <= RdPtrPlus1; + end + end + always @(posedge io_lsu_stbuf_c1_clk or posedge reset) begin + if (reset) begin + WrPtr <= 2'h0; + end else if (WrPtrEn) begin + if (_T_716) begin + WrPtr <= WrPtrPlus2; + end else begin + WrPtr <= WrPtrPlus1; + end + end + end + always @(posedge rvclkhdr_io_l1clk or posedge reset) begin + if (reset) begin + stbuf_addr_0 <= 16'h0; + end else if (sel_lo[0]) begin + stbuf_addr_0 <= io_lsu_addr_r[15:0]; + end else begin + stbuf_addr_0 <= io_end_addr_r[15:0]; + end + end + always @(posedge io_lsu_free_c2_clk or posedge reset) begin + if (reset) begin + _T_588 <= 1'h0; + end else begin + _T_588 <= _T_584 & _T_67; + end + end + always @(posedge io_lsu_free_c2_clk or posedge reset) begin + if (reset) begin + _T_580 <= 1'h0; + end else begin + _T_580 <= _T_576 & _T_56; + end + end + always @(posedge io_lsu_free_c2_clk or posedge reset) begin + if (reset) begin + _T_572 <= 1'h0; + end else begin + _T_572 <= _T_568 & _T_45; + end + end + always @(posedge io_lsu_free_c2_clk or posedge reset) begin + if (reset) begin + _T_564 <= 1'h0; + end else begin + _T_564 <= _T_560 & _T_34; + end + end + always @(posedge io_lsu_free_c2_clk or posedge reset) begin + if (reset) begin + _T_623 <= 1'h0; + end else begin + _T_623 <= _T_619 & _T_67; + end + end + always @(posedge io_lsu_free_c2_clk or posedge reset) begin + if (reset) begin + _T_615 <= 1'h0; + end else begin + _T_615 <= _T_611 & _T_56; + end + end + always @(posedge io_lsu_free_c2_clk or posedge reset) begin + if (reset) begin + _T_607 <= 1'h0; + end else begin + _T_607 <= _T_603 & _T_45; + end + end + always @(posedge io_lsu_free_c2_clk or posedge reset) begin + if (reset) begin + _T_599 <= 1'h0; + end else begin + _T_599 <= _T_595 & _T_34; + end + end + always @(posedge rvclkhdr_2_io_l1clk or posedge reset) begin + if (reset) begin + stbuf_addr_1 <= 16'h0; + end else if (sel_lo[1]) begin + stbuf_addr_1 <= io_lsu_addr_r[15:0]; + end else begin + stbuf_addr_1 <= io_end_addr_r[15:0]; + end + end + always @(posedge rvclkhdr_4_io_l1clk or posedge reset) begin + if (reset) begin + stbuf_addr_2 <= 16'h0; + end else if (sel_lo[2]) begin + stbuf_addr_2 <= io_lsu_addr_r[15:0]; + end else begin + stbuf_addr_2 <= io_end_addr_r[15:0]; + end + end + always @(posedge rvclkhdr_6_io_l1clk or posedge reset) begin + if (reset) begin + stbuf_addr_3 <= 16'h0; + end else if (sel_lo[3]) begin + stbuf_addr_3 <= io_lsu_addr_r[15:0]; + end else begin + stbuf_addr_3 <= io_end_addr_r[15:0]; + end + end + always @(posedge io_lsu_stbuf_c1_clk or posedge reset) begin + if (reset) begin + stbuf_byteen_0 <= 4'h0; + end else begin + stbuf_byteen_0 <= _T_629 & _T_633; + end + end + always @(posedge io_lsu_stbuf_c1_clk or posedge reset) begin + if (reset) begin + stbuf_byteen_1 <= 4'h0; + end else begin + stbuf_byteen_1 <= _T_638 & _T_642; + end + end + always @(posedge io_lsu_stbuf_c1_clk or posedge reset) begin + if (reset) begin + stbuf_byteen_2 <= 4'h0; + end else begin + stbuf_byteen_2 <= _T_647 & _T_651; + end + end + always @(posedge io_lsu_stbuf_c1_clk or posedge reset) begin + if (reset) begin + stbuf_byteen_3 <= 4'h0; + end else begin + stbuf_byteen_3 <= _T_656 & _T_660; + end + end + always @(posedge rvclkhdr_1_io_l1clk or posedge reset) begin + if (reset) begin + stbuf_data_0 <= 32'h0; + end else begin + stbuf_data_0 <= {_T_546,_T_545}; + end + end + always @(posedge rvclkhdr_3_io_l1clk or posedge reset) begin + if (reset) begin + stbuf_data_1 <= 32'h0; + end else begin + stbuf_data_1 <= {_T_549,_T_548}; + end + end + always @(posedge rvclkhdr_5_io_l1clk or posedge reset) begin + if (reset) begin + stbuf_data_2 <= 32'h0; + end else begin + stbuf_data_2 <= {_T_552,_T_551}; + end + end + always @(posedge rvclkhdr_7_io_l1clk or posedge reset) begin + if (reset) begin + stbuf_data_3 <= 32'h0; + end else begin + stbuf_data_3 <= {_T_555,_T_554}; + end + end + always @(posedge io_lsu_c1_m_clk or posedge reset) begin + if (reset) begin + ldst_dual_m <= 1'h0; + end else begin + ldst_dual_m <= io_lsu_addr_d[2] != io_end_addr_d[2]; + end + end +endmodule +module el2_lsu_ecc( + input clock, + input reset, + input io_lsu_c2_r_clk, + input io_lsu_pkt_m_load, + input io_lsu_pkt_m_store, + input io_lsu_pkt_m_dma, + input io_lsu_pkt_m_valid, + input [31:0] io_stbuf_data_any, + input io_dec_tlu_core_ecc_disable, + input [15:0] io_lsu_addr_m, + input [15:0] io_end_addr_m, + input [31:0] io_dccm_rdata_hi_m, + input [31:0] io_dccm_rdata_lo_m, + input [6:0] io_dccm_data_ecc_hi_m, + input [6:0] io_dccm_data_ecc_lo_m, + input io_ld_single_ecc_error_r, + input io_ld_single_ecc_error_r_ff, + input io_lsu_dccm_rden_m, + input io_addr_in_dccm_m, + input io_dma_dccm_wen, + input [31:0] io_dma_dccm_wdata_lo, + input [31:0] io_dma_dccm_wdata_hi, + input io_scan_mode, + output [31:0] io_sec_data_hi_r, + output [31:0] io_sec_data_lo_r, + output [31:0] io_sec_data_hi_m, + output [31:0] io_sec_data_lo_m, + output [31:0] io_sec_data_hi_r_ff, + output [31:0] io_sec_data_lo_r_ff, + output [6:0] io_dma_dccm_wdata_ecc_hi, + output [6:0] io_dma_dccm_wdata_ecc_lo, + output [6:0] io_stbuf_ecc_any, + output [6:0] io_sec_data_ecc_hi_r_ff, + output [6:0] io_sec_data_ecc_lo_r_ff, + output io_single_ecc_error_hi_r, + output io_single_ecc_error_lo_r, + output io_lsu_single_ecc_error_r, + output io_lsu_double_ecc_error_r, + output io_lsu_single_ecc_error_m, + output io_lsu_double_ecc_error_m +); +`ifdef RANDOMIZE_REG_INIT + reg [31:0] _RAND_0; + reg [31:0] _RAND_1; + reg [31:0] _RAND_2; + reg [31:0] _RAND_3; + reg [31:0] _RAND_4; + reg [31:0] _RAND_5; + reg [31:0] _RAND_6; + reg [31:0] _RAND_7; +`endif // RANDOMIZE_REG_INIT + wire rvclkhdr_io_l1clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_io_clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_io_en; // @[el2_lib.scala 506:23] + wire rvclkhdr_io_scan_mode; // @[el2_lib.scala 506:23] + wire rvclkhdr_1_io_l1clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_1_io_clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_1_io_en; // @[el2_lib.scala 506:23] + wire rvclkhdr_1_io_scan_mode; // @[el2_lib.scala 506:23] + wire _T_96 = ^io_dccm_rdata_hi_m; // @[el2_lib.scala 331:30] + wire _T_97 = ^io_dccm_data_ecc_hi_m; // @[el2_lib.scala 331:44] + wire _T_98 = _T_96 ^ _T_97; // @[el2_lib.scala 331:35] + wire [5:0] _T_106 = {io_dccm_rdata_hi_m[31],io_dccm_rdata_hi_m[30],io_dccm_rdata_hi_m[29],io_dccm_rdata_hi_m[28],io_dccm_rdata_hi_m[27],io_dccm_rdata_hi_m[26]}; // @[el2_lib.scala 331:76] + wire _T_107 = ^_T_106; // @[el2_lib.scala 331:83] + wire _T_108 = io_dccm_data_ecc_hi_m[5] ^ _T_107; // @[el2_lib.scala 331:71] + wire [6:0] _T_115 = {io_dccm_rdata_hi_m[17],io_dccm_rdata_hi_m[16],io_dccm_rdata_hi_m[15],io_dccm_rdata_hi_m[14],io_dccm_rdata_hi_m[13],io_dccm_rdata_hi_m[12],io_dccm_rdata_hi_m[11]}; // @[el2_lib.scala 331:103] + wire [14:0] _T_123 = {io_dccm_rdata_hi_m[25],io_dccm_rdata_hi_m[24],io_dccm_rdata_hi_m[23],io_dccm_rdata_hi_m[22],io_dccm_rdata_hi_m[21],io_dccm_rdata_hi_m[20],io_dccm_rdata_hi_m[19],io_dccm_rdata_hi_m[18],_T_115}; // @[el2_lib.scala 331:103] + wire _T_124 = ^_T_123; // @[el2_lib.scala 331:110] + wire _T_125 = io_dccm_data_ecc_hi_m[4] ^ _T_124; // @[el2_lib.scala 331:98] + wire [6:0] _T_132 = {io_dccm_rdata_hi_m[10],io_dccm_rdata_hi_m[9],io_dccm_rdata_hi_m[8],io_dccm_rdata_hi_m[7],io_dccm_rdata_hi_m[6],io_dccm_rdata_hi_m[5],io_dccm_rdata_hi_m[4]}; // @[el2_lib.scala 331:130] + wire [14:0] _T_140 = {io_dccm_rdata_hi_m[25],io_dccm_rdata_hi_m[24],io_dccm_rdata_hi_m[23],io_dccm_rdata_hi_m[22],io_dccm_rdata_hi_m[21],io_dccm_rdata_hi_m[20],io_dccm_rdata_hi_m[19],io_dccm_rdata_hi_m[18],_T_132}; // @[el2_lib.scala 331:130] + wire _T_141 = ^_T_140; // @[el2_lib.scala 331:137] + wire _T_142 = io_dccm_data_ecc_hi_m[3] ^ _T_141; // @[el2_lib.scala 331:125] + wire [8:0] _T_151 = {io_dccm_rdata_hi_m[15],io_dccm_rdata_hi_m[14],io_dccm_rdata_hi_m[10],io_dccm_rdata_hi_m[9],io_dccm_rdata_hi_m[8],io_dccm_rdata_hi_m[7],io_dccm_rdata_hi_m[3],io_dccm_rdata_hi_m[2],io_dccm_rdata_hi_m[1]}; // @[el2_lib.scala 331:157] + wire [17:0] _T_160 = {io_dccm_rdata_hi_m[31],io_dccm_rdata_hi_m[30],io_dccm_rdata_hi_m[29],io_dccm_rdata_hi_m[25],io_dccm_rdata_hi_m[24],io_dccm_rdata_hi_m[23],io_dccm_rdata_hi_m[22],io_dccm_rdata_hi_m[17],io_dccm_rdata_hi_m[16],_T_151}; // @[el2_lib.scala 331:157] + wire _T_161 = ^_T_160; // @[el2_lib.scala 331:164] + wire _T_162 = io_dccm_data_ecc_hi_m[2] ^ _T_161; // @[el2_lib.scala 331:152] + wire [8:0] _T_171 = {io_dccm_rdata_hi_m[13],io_dccm_rdata_hi_m[12],io_dccm_rdata_hi_m[10],io_dccm_rdata_hi_m[9],io_dccm_rdata_hi_m[6],io_dccm_rdata_hi_m[5],io_dccm_rdata_hi_m[3],io_dccm_rdata_hi_m[2],io_dccm_rdata_hi_m[0]}; // @[el2_lib.scala 331:184] + wire [17:0] _T_180 = {io_dccm_rdata_hi_m[31],io_dccm_rdata_hi_m[28],io_dccm_rdata_hi_m[27],io_dccm_rdata_hi_m[25],io_dccm_rdata_hi_m[24],io_dccm_rdata_hi_m[21],io_dccm_rdata_hi_m[20],io_dccm_rdata_hi_m[17],io_dccm_rdata_hi_m[16],_T_171}; // @[el2_lib.scala 331:184] + wire _T_181 = ^_T_180; // @[el2_lib.scala 331:191] + wire _T_182 = io_dccm_data_ecc_hi_m[1] ^ _T_181; // @[el2_lib.scala 331:179] + wire [8:0] _T_191 = {io_dccm_rdata_hi_m[13],io_dccm_rdata_hi_m[11],io_dccm_rdata_hi_m[10],io_dccm_rdata_hi_m[8],io_dccm_rdata_hi_m[6],io_dccm_rdata_hi_m[4],io_dccm_rdata_hi_m[3],io_dccm_rdata_hi_m[1],io_dccm_rdata_hi_m[0]}; // @[el2_lib.scala 331:211] + wire [17:0] _T_200 = {io_dccm_rdata_hi_m[30],io_dccm_rdata_hi_m[28],io_dccm_rdata_hi_m[26],io_dccm_rdata_hi_m[25],io_dccm_rdata_hi_m[23],io_dccm_rdata_hi_m[21],io_dccm_rdata_hi_m[19],io_dccm_rdata_hi_m[17],io_dccm_rdata_hi_m[15],_T_191}; // @[el2_lib.scala 331:211] + wire _T_201 = ^_T_200; // @[el2_lib.scala 331:218] + wire _T_202 = io_dccm_data_ecc_hi_m[0] ^ _T_201; // @[el2_lib.scala 331:206] + wire [6:0] _T_208 = {_T_98,_T_108,_T_125,_T_142,_T_162,_T_182,_T_202}; // @[Cat.scala 29:58] + wire _T_209 = _T_208 != 7'h0; // @[el2_lib.scala 332:44] + wire _T_1131 = ~io_dec_tlu_core_ecc_disable; // @[el2_lsu_ecc.scala 107:68] + wire _T_1138 = io_lsu_pkt_m_load | io_lsu_pkt_m_store; // @[el2_lsu_ecc.scala 125:60] + wire _T_1139 = io_lsu_pkt_m_valid & _T_1138; // @[el2_lsu_ecc.scala 125:39] + wire _T_1140 = _T_1139 & io_addr_in_dccm_m; // @[el2_lsu_ecc.scala 125:82] + wire is_ldst_m = _T_1140 & io_lsu_dccm_rden_m; // @[el2_lsu_ecc.scala 125:102] + wire ldst_dual_m = io_lsu_addr_m[2] != io_end_addr_m[2]; // @[el2_lsu_ecc.scala 124:39] + wire _T_1144 = ldst_dual_m | io_lsu_pkt_m_dma; // @[el2_lsu_ecc.scala 127:48] + wire _T_1145 = is_ldst_m & _T_1144; // @[el2_lsu_ecc.scala 127:33] + wire is_ldst_hi_m = _T_1145 & _T_1131; // @[el2_lsu_ecc.scala 127:68] + wire _T_210 = is_ldst_hi_m & _T_209; // @[el2_lib.scala 332:32] + wire single_ecc_error_hi_any = _T_210 & _T_208[6]; // @[el2_lib.scala 332:53] + wire _T_215 = ~_T_208[6]; // @[el2_lib.scala 333:55] + wire double_ecc_error_hi_any = _T_210 & _T_215; // @[el2_lib.scala 333:53] + wire _T_218 = _T_208[5:0] == 6'h1; // @[el2_lib.scala 337:41] + wire _T_220 = _T_208[5:0] == 6'h2; // @[el2_lib.scala 337:41] + wire _T_222 = _T_208[5:0] == 6'h3; // @[el2_lib.scala 337:41] + wire _T_224 = _T_208[5:0] == 6'h4; // @[el2_lib.scala 337:41] + wire _T_226 = _T_208[5:0] == 6'h5; // @[el2_lib.scala 337:41] + wire _T_228 = _T_208[5:0] == 6'h6; // @[el2_lib.scala 337:41] + wire _T_230 = _T_208[5:0] == 6'h7; // @[el2_lib.scala 337:41] + wire _T_232 = _T_208[5:0] == 6'h8; // @[el2_lib.scala 337:41] + wire _T_234 = _T_208[5:0] == 6'h9; // @[el2_lib.scala 337:41] + wire _T_236 = _T_208[5:0] == 6'ha; // @[el2_lib.scala 337:41] + wire _T_238 = _T_208[5:0] == 6'hb; // @[el2_lib.scala 337:41] + wire _T_240 = _T_208[5:0] == 6'hc; // @[el2_lib.scala 337:41] + wire _T_242 = _T_208[5:0] == 6'hd; // @[el2_lib.scala 337:41] + wire _T_244 = _T_208[5:0] == 6'he; // @[el2_lib.scala 337:41] + wire _T_246 = _T_208[5:0] == 6'hf; // @[el2_lib.scala 337:41] + wire _T_248 = _T_208[5:0] == 6'h10; // @[el2_lib.scala 337:41] + wire _T_250 = _T_208[5:0] == 6'h11; // @[el2_lib.scala 337:41] + wire _T_252 = _T_208[5:0] == 6'h12; // @[el2_lib.scala 337:41] + wire _T_254 = _T_208[5:0] == 6'h13; // @[el2_lib.scala 337:41] + wire _T_256 = _T_208[5:0] == 6'h14; // @[el2_lib.scala 337:41] + wire _T_258 = _T_208[5:0] == 6'h15; // @[el2_lib.scala 337:41] + wire _T_260 = _T_208[5:0] == 6'h16; // @[el2_lib.scala 337:41] + wire _T_262 = _T_208[5:0] == 6'h17; // @[el2_lib.scala 337:41] + wire _T_264 = _T_208[5:0] == 6'h18; // @[el2_lib.scala 337:41] + wire _T_266 = _T_208[5:0] == 6'h19; // @[el2_lib.scala 337:41] + wire _T_268 = _T_208[5:0] == 6'h1a; // @[el2_lib.scala 337:41] + wire _T_270 = _T_208[5:0] == 6'h1b; // @[el2_lib.scala 337:41] + wire _T_272 = _T_208[5:0] == 6'h1c; // @[el2_lib.scala 337:41] + wire _T_274 = _T_208[5:0] == 6'h1d; // @[el2_lib.scala 337:41] + wire _T_276 = _T_208[5:0] == 6'h1e; // @[el2_lib.scala 337:41] + wire _T_278 = _T_208[5:0] == 6'h1f; // @[el2_lib.scala 337:41] + wire _T_280 = _T_208[5:0] == 6'h20; // @[el2_lib.scala 337:41] + wire _T_282 = _T_208[5:0] == 6'h21; // @[el2_lib.scala 337:41] + wire _T_284 = _T_208[5:0] == 6'h22; // @[el2_lib.scala 337:41] + wire _T_286 = _T_208[5:0] == 6'h23; // @[el2_lib.scala 337:41] + wire _T_288 = _T_208[5:0] == 6'h24; // @[el2_lib.scala 337:41] + wire _T_290 = _T_208[5:0] == 6'h25; // @[el2_lib.scala 337:41] + wire _T_292 = _T_208[5:0] == 6'h26; // @[el2_lib.scala 337:41] + wire _T_294 = _T_208[5:0] == 6'h27; // @[el2_lib.scala 337:41] + wire [7:0] _T_309 = {io_dccm_data_ecc_hi_m[3],io_dccm_rdata_hi_m[3:1],io_dccm_data_ecc_hi_m[2],io_dccm_rdata_hi_m[0],io_dccm_data_ecc_hi_m[1:0]}; // @[Cat.scala 29:58] + wire [38:0] _T_315 = {io_dccm_data_ecc_hi_m[6],io_dccm_rdata_hi_m[31:26],io_dccm_data_ecc_hi_m[5],io_dccm_rdata_hi_m[25:11],io_dccm_data_ecc_hi_m[4],io_dccm_rdata_hi_m[10:4],_T_309}; // @[Cat.scala 29:58] + wire [9:0] _T_333 = {_T_254,_T_252,_T_250,_T_248,_T_246,_T_244,_T_242,_T_240,_T_238,_T_236}; // @[el2_lib.scala 340:69] + wire [18:0] _T_334 = {_T_333,_T_234,_T_232,_T_230,_T_228,_T_226,_T_224,_T_222,_T_220,_T_218}; // @[el2_lib.scala 340:69] + wire [9:0] _T_343 = {_T_274,_T_272,_T_270,_T_268,_T_266,_T_264,_T_262,_T_260,_T_258,_T_256}; // @[el2_lib.scala 340:69] + wire [9:0] _T_352 = {_T_294,_T_292,_T_290,_T_288,_T_286,_T_284,_T_282,_T_280,_T_278,_T_276}; // @[el2_lib.scala 340:69] + wire [38:0] _T_354 = {_T_352,_T_343,_T_334}; // @[el2_lib.scala 340:69] + wire [38:0] _T_355 = _T_354 ^ _T_315; // @[el2_lib.scala 340:76] + wire [38:0] _T_356 = single_ecc_error_hi_any ? _T_355 : _T_315; // @[el2_lib.scala 340:31] + wire [3:0] _T_362 = {_T_356[6:4],_T_356[2]}; // @[Cat.scala 29:58] + wire [27:0] _T_364 = {_T_356[37:32],_T_356[30:16],_T_356[14:8]}; // @[Cat.scala 29:58] + wire _T_474 = ^io_dccm_rdata_lo_m; // @[el2_lib.scala 331:30] + wire _T_475 = ^io_dccm_data_ecc_lo_m; // @[el2_lib.scala 331:44] + wire _T_476 = _T_474 ^ _T_475; // @[el2_lib.scala 331:35] + wire [5:0] _T_484 = {io_dccm_rdata_lo_m[31],io_dccm_rdata_lo_m[30],io_dccm_rdata_lo_m[29],io_dccm_rdata_lo_m[28],io_dccm_rdata_lo_m[27],io_dccm_rdata_lo_m[26]}; // @[el2_lib.scala 331:76] + wire _T_485 = ^_T_484; // @[el2_lib.scala 331:83] + wire _T_486 = io_dccm_data_ecc_lo_m[5] ^ _T_485; // @[el2_lib.scala 331:71] + wire [6:0] _T_493 = {io_dccm_rdata_lo_m[17],io_dccm_rdata_lo_m[16],io_dccm_rdata_lo_m[15],io_dccm_rdata_lo_m[14],io_dccm_rdata_lo_m[13],io_dccm_rdata_lo_m[12],io_dccm_rdata_lo_m[11]}; // @[el2_lib.scala 331:103] + wire [14:0] _T_501 = {io_dccm_rdata_lo_m[25],io_dccm_rdata_lo_m[24],io_dccm_rdata_lo_m[23],io_dccm_rdata_lo_m[22],io_dccm_rdata_lo_m[21],io_dccm_rdata_lo_m[20],io_dccm_rdata_lo_m[19],io_dccm_rdata_lo_m[18],_T_493}; // @[el2_lib.scala 331:103] + wire _T_502 = ^_T_501; // @[el2_lib.scala 331:110] + wire _T_503 = io_dccm_data_ecc_lo_m[4] ^ _T_502; // @[el2_lib.scala 331:98] + wire [6:0] _T_510 = {io_dccm_rdata_lo_m[10],io_dccm_rdata_lo_m[9],io_dccm_rdata_lo_m[8],io_dccm_rdata_lo_m[7],io_dccm_rdata_lo_m[6],io_dccm_rdata_lo_m[5],io_dccm_rdata_lo_m[4]}; // @[el2_lib.scala 331:130] + wire [14:0] _T_518 = {io_dccm_rdata_lo_m[25],io_dccm_rdata_lo_m[24],io_dccm_rdata_lo_m[23],io_dccm_rdata_lo_m[22],io_dccm_rdata_lo_m[21],io_dccm_rdata_lo_m[20],io_dccm_rdata_lo_m[19],io_dccm_rdata_lo_m[18],_T_510}; // @[el2_lib.scala 331:130] + wire _T_519 = ^_T_518; // @[el2_lib.scala 331:137] + wire _T_520 = io_dccm_data_ecc_lo_m[3] ^ _T_519; // @[el2_lib.scala 331:125] + wire [8:0] _T_529 = {io_dccm_rdata_lo_m[15],io_dccm_rdata_lo_m[14],io_dccm_rdata_lo_m[10],io_dccm_rdata_lo_m[9],io_dccm_rdata_lo_m[8],io_dccm_rdata_lo_m[7],io_dccm_rdata_lo_m[3],io_dccm_rdata_lo_m[2],io_dccm_rdata_lo_m[1]}; // @[el2_lib.scala 331:157] + wire [17:0] _T_538 = {io_dccm_rdata_lo_m[31],io_dccm_rdata_lo_m[30],io_dccm_rdata_lo_m[29],io_dccm_rdata_lo_m[25],io_dccm_rdata_lo_m[24],io_dccm_rdata_lo_m[23],io_dccm_rdata_lo_m[22],io_dccm_rdata_lo_m[17],io_dccm_rdata_lo_m[16],_T_529}; // @[el2_lib.scala 331:157] + wire _T_539 = ^_T_538; // @[el2_lib.scala 331:164] + wire _T_540 = io_dccm_data_ecc_lo_m[2] ^ _T_539; // @[el2_lib.scala 331:152] + wire [8:0] _T_549 = {io_dccm_rdata_lo_m[13],io_dccm_rdata_lo_m[12],io_dccm_rdata_lo_m[10],io_dccm_rdata_lo_m[9],io_dccm_rdata_lo_m[6],io_dccm_rdata_lo_m[5],io_dccm_rdata_lo_m[3],io_dccm_rdata_lo_m[2],io_dccm_rdata_lo_m[0]}; // @[el2_lib.scala 331:184] + wire [17:0] _T_558 = {io_dccm_rdata_lo_m[31],io_dccm_rdata_lo_m[28],io_dccm_rdata_lo_m[27],io_dccm_rdata_lo_m[25],io_dccm_rdata_lo_m[24],io_dccm_rdata_lo_m[21],io_dccm_rdata_lo_m[20],io_dccm_rdata_lo_m[17],io_dccm_rdata_lo_m[16],_T_549}; // @[el2_lib.scala 331:184] + wire _T_559 = ^_T_558; // @[el2_lib.scala 331:191] + wire _T_560 = io_dccm_data_ecc_lo_m[1] ^ _T_559; // @[el2_lib.scala 331:179] + wire [8:0] _T_569 = {io_dccm_rdata_lo_m[13],io_dccm_rdata_lo_m[11],io_dccm_rdata_lo_m[10],io_dccm_rdata_lo_m[8],io_dccm_rdata_lo_m[6],io_dccm_rdata_lo_m[4],io_dccm_rdata_lo_m[3],io_dccm_rdata_lo_m[1],io_dccm_rdata_lo_m[0]}; // @[el2_lib.scala 331:211] + wire [17:0] _T_578 = {io_dccm_rdata_lo_m[30],io_dccm_rdata_lo_m[28],io_dccm_rdata_lo_m[26],io_dccm_rdata_lo_m[25],io_dccm_rdata_lo_m[23],io_dccm_rdata_lo_m[21],io_dccm_rdata_lo_m[19],io_dccm_rdata_lo_m[17],io_dccm_rdata_lo_m[15],_T_569}; // @[el2_lib.scala 331:211] + wire _T_579 = ^_T_578; // @[el2_lib.scala 331:218] + wire _T_580 = io_dccm_data_ecc_lo_m[0] ^ _T_579; // @[el2_lib.scala 331:206] + wire [6:0] _T_586 = {_T_476,_T_486,_T_503,_T_520,_T_540,_T_560,_T_580}; // @[Cat.scala 29:58] + wire _T_587 = _T_586 != 7'h0; // @[el2_lib.scala 332:44] + wire is_ldst_lo_m = is_ldst_m & _T_1131; // @[el2_lsu_ecc.scala 126:33] + wire _T_588 = is_ldst_lo_m & _T_587; // @[el2_lib.scala 332:32] + wire single_ecc_error_lo_any = _T_588 & _T_586[6]; // @[el2_lib.scala 332:53] + wire _T_593 = ~_T_586[6]; // @[el2_lib.scala 333:55] + wire double_ecc_error_lo_any = _T_588 & _T_593; // @[el2_lib.scala 333:53] + wire _T_596 = _T_586[5:0] == 6'h1; // @[el2_lib.scala 337:41] + wire _T_598 = _T_586[5:0] == 6'h2; // @[el2_lib.scala 337:41] + wire _T_600 = _T_586[5:0] == 6'h3; // @[el2_lib.scala 337:41] + wire _T_602 = _T_586[5:0] == 6'h4; // @[el2_lib.scala 337:41] + wire _T_604 = _T_586[5:0] == 6'h5; // @[el2_lib.scala 337:41] + wire _T_606 = _T_586[5:0] == 6'h6; // @[el2_lib.scala 337:41] + wire _T_608 = _T_586[5:0] == 6'h7; // @[el2_lib.scala 337:41] + wire _T_610 = _T_586[5:0] == 6'h8; // @[el2_lib.scala 337:41] + wire _T_612 = _T_586[5:0] == 6'h9; // @[el2_lib.scala 337:41] + wire _T_614 = _T_586[5:0] == 6'ha; // @[el2_lib.scala 337:41] + wire _T_616 = _T_586[5:0] == 6'hb; // @[el2_lib.scala 337:41] + wire _T_618 = _T_586[5:0] == 6'hc; // @[el2_lib.scala 337:41] + wire _T_620 = _T_586[5:0] == 6'hd; // @[el2_lib.scala 337:41] + wire _T_622 = _T_586[5:0] == 6'he; // @[el2_lib.scala 337:41] + wire _T_624 = _T_586[5:0] == 6'hf; // @[el2_lib.scala 337:41] + wire _T_626 = _T_586[5:0] == 6'h10; // @[el2_lib.scala 337:41] + wire _T_628 = _T_586[5:0] == 6'h11; // @[el2_lib.scala 337:41] + wire _T_630 = _T_586[5:0] == 6'h12; // @[el2_lib.scala 337:41] + wire _T_632 = _T_586[5:0] == 6'h13; // @[el2_lib.scala 337:41] + wire _T_634 = _T_586[5:0] == 6'h14; // @[el2_lib.scala 337:41] + wire _T_636 = _T_586[5:0] == 6'h15; // @[el2_lib.scala 337:41] + wire _T_638 = _T_586[5:0] == 6'h16; // @[el2_lib.scala 337:41] + wire _T_640 = _T_586[5:0] == 6'h17; // @[el2_lib.scala 337:41] + wire _T_642 = _T_586[5:0] == 6'h18; // @[el2_lib.scala 337:41] + wire _T_644 = _T_586[5:0] == 6'h19; // @[el2_lib.scala 337:41] + wire _T_646 = _T_586[5:0] == 6'h1a; // @[el2_lib.scala 337:41] + wire _T_648 = _T_586[5:0] == 6'h1b; // @[el2_lib.scala 337:41] + wire _T_650 = _T_586[5:0] == 6'h1c; // @[el2_lib.scala 337:41] + wire _T_652 = _T_586[5:0] == 6'h1d; // @[el2_lib.scala 337:41] + wire _T_654 = _T_586[5:0] == 6'h1e; // @[el2_lib.scala 337:41] + wire _T_656 = _T_586[5:0] == 6'h1f; // @[el2_lib.scala 337:41] + wire _T_658 = _T_586[5:0] == 6'h20; // @[el2_lib.scala 337:41] + wire _T_660 = _T_586[5:0] == 6'h21; // @[el2_lib.scala 337:41] + wire _T_662 = _T_586[5:0] == 6'h22; // @[el2_lib.scala 337:41] + wire _T_664 = _T_586[5:0] == 6'h23; // @[el2_lib.scala 337:41] + wire _T_666 = _T_586[5:0] == 6'h24; // @[el2_lib.scala 337:41] + wire _T_668 = _T_586[5:0] == 6'h25; // @[el2_lib.scala 337:41] + wire _T_670 = _T_586[5:0] == 6'h26; // @[el2_lib.scala 337:41] + wire _T_672 = _T_586[5:0] == 6'h27; // @[el2_lib.scala 337:41] + wire [7:0] _T_687 = {io_dccm_data_ecc_lo_m[3],io_dccm_rdata_lo_m[3:1],io_dccm_data_ecc_lo_m[2],io_dccm_rdata_lo_m[0],io_dccm_data_ecc_lo_m[1:0]}; // @[Cat.scala 29:58] + wire [38:0] _T_693 = {io_dccm_data_ecc_lo_m[6],io_dccm_rdata_lo_m[31:26],io_dccm_data_ecc_lo_m[5],io_dccm_rdata_lo_m[25:11],io_dccm_data_ecc_lo_m[4],io_dccm_rdata_lo_m[10:4],_T_687}; // @[Cat.scala 29:58] + wire [9:0] _T_711 = {_T_632,_T_630,_T_628,_T_626,_T_624,_T_622,_T_620,_T_618,_T_616,_T_614}; // @[el2_lib.scala 340:69] + wire [18:0] _T_712 = {_T_711,_T_612,_T_610,_T_608,_T_606,_T_604,_T_602,_T_600,_T_598,_T_596}; // @[el2_lib.scala 340:69] + wire [9:0] _T_721 = {_T_652,_T_650,_T_648,_T_646,_T_644,_T_642,_T_640,_T_638,_T_636,_T_634}; // @[el2_lib.scala 340:69] + wire [9:0] _T_730 = {_T_672,_T_670,_T_668,_T_666,_T_664,_T_662,_T_660,_T_658,_T_656,_T_654}; // @[el2_lib.scala 340:69] + wire [38:0] _T_732 = {_T_730,_T_721,_T_712}; // @[el2_lib.scala 340:69] + wire [38:0] _T_733 = _T_732 ^ _T_693; // @[el2_lib.scala 340:76] + wire [38:0] _T_734 = single_ecc_error_lo_any ? _T_733 : _T_693; // @[el2_lib.scala 340:31] + wire [3:0] _T_740 = {_T_734[6:4],_T_734[2]}; // @[Cat.scala 29:58] + wire [27:0] _T_742 = {_T_734[37:32],_T_734[30:16],_T_734[14:8]}; // @[Cat.scala 29:58] + wire [31:0] _T_1158 = io_dma_dccm_wen ? io_dma_dccm_wdata_lo : io_stbuf_data_any; // @[el2_lsu_ecc.scala 149:87] + wire [31:0] dccm_wdata_lo_any = io_ld_single_ecc_error_r_ff ? io_sec_data_lo_r_ff : _T_1158; // @[el2_lsu_ecc.scala 149:27] + wire _T_774 = dccm_wdata_lo_any[0] ^ dccm_wdata_lo_any[1]; // @[el2_lib.scala 257:74] + wire _T_775 = _T_774 ^ dccm_wdata_lo_any[3]; // @[el2_lib.scala 257:74] + wire _T_776 = _T_775 ^ dccm_wdata_lo_any[4]; // @[el2_lib.scala 257:74] + wire _T_777 = _T_776 ^ dccm_wdata_lo_any[6]; // @[el2_lib.scala 257:74] + wire _T_778 = _T_777 ^ dccm_wdata_lo_any[8]; // @[el2_lib.scala 257:74] + wire _T_779 = _T_778 ^ dccm_wdata_lo_any[10]; // @[el2_lib.scala 257:74] + wire _T_780 = _T_779 ^ dccm_wdata_lo_any[11]; // @[el2_lib.scala 257:74] + wire _T_781 = _T_780 ^ dccm_wdata_lo_any[13]; // @[el2_lib.scala 257:74] + wire _T_782 = _T_781 ^ dccm_wdata_lo_any[15]; // @[el2_lib.scala 257:74] + wire _T_783 = _T_782 ^ dccm_wdata_lo_any[17]; // @[el2_lib.scala 257:74] + wire _T_784 = _T_783 ^ dccm_wdata_lo_any[19]; // @[el2_lib.scala 257:74] + wire _T_785 = _T_784 ^ dccm_wdata_lo_any[21]; // @[el2_lib.scala 257:74] + wire _T_786 = _T_785 ^ dccm_wdata_lo_any[23]; // @[el2_lib.scala 257:74] + wire _T_787 = _T_786 ^ dccm_wdata_lo_any[25]; // @[el2_lib.scala 257:74] + wire _T_788 = _T_787 ^ dccm_wdata_lo_any[26]; // @[el2_lib.scala 257:74] + wire _T_789 = _T_788 ^ dccm_wdata_lo_any[28]; // @[el2_lib.scala 257:74] + wire _T_790 = _T_789 ^ dccm_wdata_lo_any[30]; // @[el2_lib.scala 257:74] + wire _T_809 = dccm_wdata_lo_any[0] ^ dccm_wdata_lo_any[2]; // @[el2_lib.scala 257:74] + wire _T_810 = _T_809 ^ dccm_wdata_lo_any[3]; // @[el2_lib.scala 257:74] + wire _T_811 = _T_810 ^ dccm_wdata_lo_any[5]; // @[el2_lib.scala 257:74] + wire _T_812 = _T_811 ^ dccm_wdata_lo_any[6]; // @[el2_lib.scala 257:74] + wire _T_813 = _T_812 ^ dccm_wdata_lo_any[9]; // @[el2_lib.scala 257:74] + wire _T_814 = _T_813 ^ dccm_wdata_lo_any[10]; // @[el2_lib.scala 257:74] + wire _T_815 = _T_814 ^ dccm_wdata_lo_any[12]; // @[el2_lib.scala 257:74] + wire _T_816 = _T_815 ^ dccm_wdata_lo_any[13]; // @[el2_lib.scala 257:74] + wire _T_817 = _T_816 ^ dccm_wdata_lo_any[16]; // @[el2_lib.scala 257:74] + wire _T_818 = _T_817 ^ dccm_wdata_lo_any[17]; // @[el2_lib.scala 257:74] + wire _T_819 = _T_818 ^ dccm_wdata_lo_any[20]; // @[el2_lib.scala 257:74] + wire _T_820 = _T_819 ^ dccm_wdata_lo_any[21]; // @[el2_lib.scala 257:74] + wire _T_821 = _T_820 ^ dccm_wdata_lo_any[24]; // @[el2_lib.scala 257:74] + wire _T_822 = _T_821 ^ dccm_wdata_lo_any[25]; // @[el2_lib.scala 257:74] + wire _T_823 = _T_822 ^ dccm_wdata_lo_any[27]; // @[el2_lib.scala 257:74] + wire _T_824 = _T_823 ^ dccm_wdata_lo_any[28]; // @[el2_lib.scala 257:74] + wire _T_825 = _T_824 ^ dccm_wdata_lo_any[31]; // @[el2_lib.scala 257:74] + wire _T_844 = dccm_wdata_lo_any[1] ^ dccm_wdata_lo_any[2]; // @[el2_lib.scala 257:74] + wire _T_845 = _T_844 ^ dccm_wdata_lo_any[3]; // @[el2_lib.scala 257:74] + wire _T_846 = _T_845 ^ dccm_wdata_lo_any[7]; // @[el2_lib.scala 257:74] + wire _T_847 = _T_846 ^ dccm_wdata_lo_any[8]; // @[el2_lib.scala 257:74] + wire _T_848 = _T_847 ^ dccm_wdata_lo_any[9]; // @[el2_lib.scala 257:74] + wire _T_849 = _T_848 ^ dccm_wdata_lo_any[10]; // @[el2_lib.scala 257:74] + wire _T_850 = _T_849 ^ dccm_wdata_lo_any[14]; // @[el2_lib.scala 257:74] + wire _T_851 = _T_850 ^ dccm_wdata_lo_any[15]; // @[el2_lib.scala 257:74] + wire _T_852 = _T_851 ^ dccm_wdata_lo_any[16]; // @[el2_lib.scala 257:74] + wire _T_853 = _T_852 ^ dccm_wdata_lo_any[17]; // @[el2_lib.scala 257:74] + wire _T_854 = _T_853 ^ dccm_wdata_lo_any[22]; // @[el2_lib.scala 257:74] + wire _T_855 = _T_854 ^ dccm_wdata_lo_any[23]; // @[el2_lib.scala 257:74] + wire _T_856 = _T_855 ^ dccm_wdata_lo_any[24]; // @[el2_lib.scala 257:74] + wire _T_857 = _T_856 ^ dccm_wdata_lo_any[25]; // @[el2_lib.scala 257:74] + wire _T_858 = _T_857 ^ dccm_wdata_lo_any[29]; // @[el2_lib.scala 257:74] + wire _T_859 = _T_858 ^ dccm_wdata_lo_any[30]; // @[el2_lib.scala 257:74] + wire _T_860 = _T_859 ^ dccm_wdata_lo_any[31]; // @[el2_lib.scala 257:74] + wire _T_876 = dccm_wdata_lo_any[4] ^ dccm_wdata_lo_any[5]; // @[el2_lib.scala 257:74] + wire _T_877 = _T_876 ^ dccm_wdata_lo_any[6]; // @[el2_lib.scala 257:74] + wire _T_878 = _T_877 ^ dccm_wdata_lo_any[7]; // @[el2_lib.scala 257:74] + wire _T_879 = _T_878 ^ dccm_wdata_lo_any[8]; // @[el2_lib.scala 257:74] + wire _T_880 = _T_879 ^ dccm_wdata_lo_any[9]; // @[el2_lib.scala 257:74] + wire _T_881 = _T_880 ^ dccm_wdata_lo_any[10]; // @[el2_lib.scala 257:74] + wire _T_882 = _T_881 ^ dccm_wdata_lo_any[18]; // @[el2_lib.scala 257:74] + wire _T_883 = _T_882 ^ dccm_wdata_lo_any[19]; // @[el2_lib.scala 257:74] + wire _T_884 = _T_883 ^ dccm_wdata_lo_any[20]; // @[el2_lib.scala 257:74] + wire _T_885 = _T_884 ^ dccm_wdata_lo_any[21]; // @[el2_lib.scala 257:74] + wire _T_886 = _T_885 ^ dccm_wdata_lo_any[22]; // @[el2_lib.scala 257:74] + wire _T_887 = _T_886 ^ dccm_wdata_lo_any[23]; // @[el2_lib.scala 257:74] + wire _T_888 = _T_887 ^ dccm_wdata_lo_any[24]; // @[el2_lib.scala 257:74] + wire _T_889 = _T_888 ^ dccm_wdata_lo_any[25]; // @[el2_lib.scala 257:74] + wire _T_905 = dccm_wdata_lo_any[11] ^ dccm_wdata_lo_any[12]; // @[el2_lib.scala 257:74] + wire _T_906 = _T_905 ^ dccm_wdata_lo_any[13]; // @[el2_lib.scala 257:74] + wire _T_907 = _T_906 ^ dccm_wdata_lo_any[14]; // @[el2_lib.scala 257:74] + wire _T_908 = _T_907 ^ dccm_wdata_lo_any[15]; // @[el2_lib.scala 257:74] + wire _T_909 = _T_908 ^ dccm_wdata_lo_any[16]; // @[el2_lib.scala 257:74] + wire _T_910 = _T_909 ^ dccm_wdata_lo_any[17]; // @[el2_lib.scala 257:74] + wire _T_911 = _T_910 ^ dccm_wdata_lo_any[18]; // @[el2_lib.scala 257:74] + wire _T_912 = _T_911 ^ dccm_wdata_lo_any[19]; // @[el2_lib.scala 257:74] + wire _T_913 = _T_912 ^ dccm_wdata_lo_any[20]; // @[el2_lib.scala 257:74] + wire _T_914 = _T_913 ^ dccm_wdata_lo_any[21]; // @[el2_lib.scala 257:74] + wire _T_915 = _T_914 ^ dccm_wdata_lo_any[22]; // @[el2_lib.scala 257:74] + wire _T_916 = _T_915 ^ dccm_wdata_lo_any[23]; // @[el2_lib.scala 257:74] + wire _T_917 = _T_916 ^ dccm_wdata_lo_any[24]; // @[el2_lib.scala 257:74] + wire _T_918 = _T_917 ^ dccm_wdata_lo_any[25]; // @[el2_lib.scala 257:74] + wire _T_925 = dccm_wdata_lo_any[26] ^ dccm_wdata_lo_any[27]; // @[el2_lib.scala 257:74] + wire _T_926 = _T_925 ^ dccm_wdata_lo_any[28]; // @[el2_lib.scala 257:74] + wire _T_927 = _T_926 ^ dccm_wdata_lo_any[29]; // @[el2_lib.scala 257:74] + wire _T_928 = _T_927 ^ dccm_wdata_lo_any[30]; // @[el2_lib.scala 257:74] + wire _T_929 = _T_928 ^ dccm_wdata_lo_any[31]; // @[el2_lib.scala 257:74] + wire [5:0] _T_934 = {_T_929,_T_918,_T_889,_T_860,_T_825,_T_790}; // @[Cat.scala 29:58] + wire _T_935 = ^dccm_wdata_lo_any; // @[el2_lib.scala 265:13] + wire _T_936 = ^_T_934; // @[el2_lib.scala 265:23] + wire _T_937 = _T_935 ^ _T_936; // @[el2_lib.scala 265:18] + wire [31:0] _T_1162 = io_dma_dccm_wen ? io_dma_dccm_wdata_hi : io_stbuf_data_any; // @[el2_lsu_ecc.scala 150:87] + wire [31:0] dccm_wdata_hi_any = io_ld_single_ecc_error_r_ff ? io_sec_data_hi_r_ff : _T_1162; // @[el2_lsu_ecc.scala 150:27] + wire _T_956 = dccm_wdata_hi_any[0] ^ dccm_wdata_hi_any[1]; // @[el2_lib.scala 257:74] + wire _T_957 = _T_956 ^ dccm_wdata_hi_any[3]; // @[el2_lib.scala 257:74] + wire _T_958 = _T_957 ^ dccm_wdata_hi_any[4]; // @[el2_lib.scala 257:74] + wire _T_959 = _T_958 ^ dccm_wdata_hi_any[6]; // @[el2_lib.scala 257:74] + wire _T_960 = _T_959 ^ dccm_wdata_hi_any[8]; // @[el2_lib.scala 257:74] + wire _T_961 = _T_960 ^ dccm_wdata_hi_any[10]; // @[el2_lib.scala 257:74] + wire _T_962 = _T_961 ^ dccm_wdata_hi_any[11]; // @[el2_lib.scala 257:74] + wire _T_963 = _T_962 ^ dccm_wdata_hi_any[13]; // @[el2_lib.scala 257:74] + wire _T_964 = _T_963 ^ dccm_wdata_hi_any[15]; // @[el2_lib.scala 257:74] + wire _T_965 = _T_964 ^ dccm_wdata_hi_any[17]; // @[el2_lib.scala 257:74] + wire _T_966 = _T_965 ^ dccm_wdata_hi_any[19]; // @[el2_lib.scala 257:74] + wire _T_967 = _T_966 ^ dccm_wdata_hi_any[21]; // @[el2_lib.scala 257:74] + wire _T_968 = _T_967 ^ dccm_wdata_hi_any[23]; // @[el2_lib.scala 257:74] + wire _T_969 = _T_968 ^ dccm_wdata_hi_any[25]; // @[el2_lib.scala 257:74] + wire _T_970 = _T_969 ^ dccm_wdata_hi_any[26]; // @[el2_lib.scala 257:74] + wire _T_971 = _T_970 ^ dccm_wdata_hi_any[28]; // @[el2_lib.scala 257:74] + wire _T_972 = _T_971 ^ dccm_wdata_hi_any[30]; // @[el2_lib.scala 257:74] + wire _T_991 = dccm_wdata_hi_any[0] ^ dccm_wdata_hi_any[2]; // @[el2_lib.scala 257:74] + wire _T_992 = _T_991 ^ dccm_wdata_hi_any[3]; // @[el2_lib.scala 257:74] + wire _T_993 = _T_992 ^ dccm_wdata_hi_any[5]; // @[el2_lib.scala 257:74] + wire _T_994 = _T_993 ^ dccm_wdata_hi_any[6]; // @[el2_lib.scala 257:74] + wire _T_995 = _T_994 ^ dccm_wdata_hi_any[9]; // @[el2_lib.scala 257:74] + wire _T_996 = _T_995 ^ dccm_wdata_hi_any[10]; // @[el2_lib.scala 257:74] + wire _T_997 = _T_996 ^ dccm_wdata_hi_any[12]; // @[el2_lib.scala 257:74] + wire _T_998 = _T_997 ^ dccm_wdata_hi_any[13]; // @[el2_lib.scala 257:74] + wire _T_999 = _T_998 ^ dccm_wdata_hi_any[16]; // @[el2_lib.scala 257:74] + wire _T_1000 = _T_999 ^ dccm_wdata_hi_any[17]; // @[el2_lib.scala 257:74] + wire _T_1001 = _T_1000 ^ dccm_wdata_hi_any[20]; // @[el2_lib.scala 257:74] + wire _T_1002 = _T_1001 ^ dccm_wdata_hi_any[21]; // @[el2_lib.scala 257:74] + wire _T_1003 = _T_1002 ^ dccm_wdata_hi_any[24]; // @[el2_lib.scala 257:74] + wire _T_1004 = _T_1003 ^ dccm_wdata_hi_any[25]; // @[el2_lib.scala 257:74] + wire _T_1005 = _T_1004 ^ dccm_wdata_hi_any[27]; // @[el2_lib.scala 257:74] + wire _T_1006 = _T_1005 ^ dccm_wdata_hi_any[28]; // @[el2_lib.scala 257:74] + wire _T_1007 = _T_1006 ^ dccm_wdata_hi_any[31]; // @[el2_lib.scala 257:74] + wire _T_1026 = dccm_wdata_hi_any[1] ^ dccm_wdata_hi_any[2]; // @[el2_lib.scala 257:74] + wire _T_1027 = _T_1026 ^ dccm_wdata_hi_any[3]; // @[el2_lib.scala 257:74] + wire _T_1028 = _T_1027 ^ dccm_wdata_hi_any[7]; // @[el2_lib.scala 257:74] + wire _T_1029 = _T_1028 ^ dccm_wdata_hi_any[8]; // @[el2_lib.scala 257:74] + wire _T_1030 = _T_1029 ^ dccm_wdata_hi_any[9]; // @[el2_lib.scala 257:74] + wire _T_1031 = _T_1030 ^ dccm_wdata_hi_any[10]; // @[el2_lib.scala 257:74] + wire _T_1032 = _T_1031 ^ dccm_wdata_hi_any[14]; // @[el2_lib.scala 257:74] + wire _T_1033 = _T_1032 ^ dccm_wdata_hi_any[15]; // @[el2_lib.scala 257:74] + wire _T_1034 = _T_1033 ^ dccm_wdata_hi_any[16]; // @[el2_lib.scala 257:74] + wire _T_1035 = _T_1034 ^ dccm_wdata_hi_any[17]; // @[el2_lib.scala 257:74] + wire _T_1036 = _T_1035 ^ dccm_wdata_hi_any[22]; // @[el2_lib.scala 257:74] + wire _T_1037 = _T_1036 ^ dccm_wdata_hi_any[23]; // @[el2_lib.scala 257:74] + wire _T_1038 = _T_1037 ^ dccm_wdata_hi_any[24]; // @[el2_lib.scala 257:74] + wire _T_1039 = _T_1038 ^ dccm_wdata_hi_any[25]; // @[el2_lib.scala 257:74] + wire _T_1040 = _T_1039 ^ dccm_wdata_hi_any[29]; // @[el2_lib.scala 257:74] + wire _T_1041 = _T_1040 ^ dccm_wdata_hi_any[30]; // @[el2_lib.scala 257:74] + wire _T_1042 = _T_1041 ^ dccm_wdata_hi_any[31]; // @[el2_lib.scala 257:74] + wire _T_1058 = dccm_wdata_hi_any[4] ^ dccm_wdata_hi_any[5]; // @[el2_lib.scala 257:74] + wire _T_1059 = _T_1058 ^ dccm_wdata_hi_any[6]; // @[el2_lib.scala 257:74] + wire _T_1060 = _T_1059 ^ dccm_wdata_hi_any[7]; // @[el2_lib.scala 257:74] + wire _T_1061 = _T_1060 ^ dccm_wdata_hi_any[8]; // @[el2_lib.scala 257:74] + wire _T_1062 = _T_1061 ^ dccm_wdata_hi_any[9]; // @[el2_lib.scala 257:74] + wire _T_1063 = _T_1062 ^ dccm_wdata_hi_any[10]; // @[el2_lib.scala 257:74] + wire _T_1064 = _T_1063 ^ dccm_wdata_hi_any[18]; // @[el2_lib.scala 257:74] + wire _T_1065 = _T_1064 ^ dccm_wdata_hi_any[19]; // @[el2_lib.scala 257:74] + wire _T_1066 = _T_1065 ^ dccm_wdata_hi_any[20]; // @[el2_lib.scala 257:74] + wire _T_1067 = _T_1066 ^ dccm_wdata_hi_any[21]; // @[el2_lib.scala 257:74] + wire _T_1068 = _T_1067 ^ dccm_wdata_hi_any[22]; // @[el2_lib.scala 257:74] + wire _T_1069 = _T_1068 ^ dccm_wdata_hi_any[23]; // @[el2_lib.scala 257:74] + wire _T_1070 = _T_1069 ^ dccm_wdata_hi_any[24]; // @[el2_lib.scala 257:74] + wire _T_1071 = _T_1070 ^ dccm_wdata_hi_any[25]; // @[el2_lib.scala 257:74] + wire _T_1087 = dccm_wdata_hi_any[11] ^ dccm_wdata_hi_any[12]; // @[el2_lib.scala 257:74] + wire _T_1088 = _T_1087 ^ dccm_wdata_hi_any[13]; // @[el2_lib.scala 257:74] + wire _T_1089 = _T_1088 ^ dccm_wdata_hi_any[14]; // @[el2_lib.scala 257:74] + wire _T_1090 = _T_1089 ^ dccm_wdata_hi_any[15]; // @[el2_lib.scala 257:74] + wire _T_1091 = _T_1090 ^ dccm_wdata_hi_any[16]; // @[el2_lib.scala 257:74] + wire _T_1092 = _T_1091 ^ dccm_wdata_hi_any[17]; // @[el2_lib.scala 257:74] + wire _T_1093 = _T_1092 ^ dccm_wdata_hi_any[18]; // @[el2_lib.scala 257:74] + wire _T_1094 = _T_1093 ^ dccm_wdata_hi_any[19]; // @[el2_lib.scala 257:74] + wire _T_1095 = _T_1094 ^ dccm_wdata_hi_any[20]; // @[el2_lib.scala 257:74] + wire _T_1096 = _T_1095 ^ dccm_wdata_hi_any[21]; // @[el2_lib.scala 257:74] + wire _T_1097 = _T_1096 ^ dccm_wdata_hi_any[22]; // @[el2_lib.scala 257:74] + wire _T_1098 = _T_1097 ^ dccm_wdata_hi_any[23]; // @[el2_lib.scala 257:74] + wire _T_1099 = _T_1098 ^ dccm_wdata_hi_any[24]; // @[el2_lib.scala 257:74] + wire _T_1100 = _T_1099 ^ dccm_wdata_hi_any[25]; // @[el2_lib.scala 257:74] + wire _T_1107 = dccm_wdata_hi_any[26] ^ dccm_wdata_hi_any[27]; // @[el2_lib.scala 257:74] + wire _T_1108 = _T_1107 ^ dccm_wdata_hi_any[28]; // @[el2_lib.scala 257:74] + wire _T_1109 = _T_1108 ^ dccm_wdata_hi_any[29]; // @[el2_lib.scala 257:74] + wire _T_1110 = _T_1109 ^ dccm_wdata_hi_any[30]; // @[el2_lib.scala 257:74] + wire _T_1111 = _T_1110 ^ dccm_wdata_hi_any[31]; // @[el2_lib.scala 257:74] + wire [5:0] _T_1116 = {_T_1111,_T_1100,_T_1071,_T_1042,_T_1007,_T_972}; // @[Cat.scala 29:58] + wire _T_1117 = ^dccm_wdata_hi_any; // @[el2_lib.scala 265:13] + wire _T_1118 = ^_T_1116; // @[el2_lib.scala 265:23] + wire _T_1119 = _T_1117 ^ _T_1118; // @[el2_lib.scala 265:18] + reg _T_1150; // @[el2_lsu_ecc.scala 141:72] + reg _T_1151; // @[el2_lsu_ecc.scala 142:72] + reg _T_1152; // @[el2_lsu_ecc.scala 143:72] + reg _T_1153; // @[el2_lsu_ecc.scala 144:72] + reg [31:0] _T_1154; // @[el2_lsu_ecc.scala 145:72] + reg [31:0] _T_1155; // @[el2_lsu_ecc.scala 146:72] + reg [31:0] _T_1164; // @[el2_lib.scala 512:16] + reg [31:0] _T_1165; // @[el2_lib.scala 512:16] + rvclkhdr rvclkhdr ( // @[el2_lib.scala 506:23] + .io_l1clk(rvclkhdr_io_l1clk), + .io_clk(rvclkhdr_io_clk), + .io_en(rvclkhdr_io_en), + .io_scan_mode(rvclkhdr_io_scan_mode) + ); + rvclkhdr rvclkhdr_1 ( // @[el2_lib.scala 506:23] + .io_l1clk(rvclkhdr_1_io_l1clk), + .io_clk(rvclkhdr_1_io_clk), + .io_en(rvclkhdr_1_io_en), + .io_scan_mode(rvclkhdr_1_io_scan_mode) + ); + assign io_sec_data_hi_r = _T_1154; // @[el2_lsu_ecc.scala 114:22 el2_lsu_ecc.scala 145:62] + assign io_sec_data_lo_r = _T_1155; // @[el2_lsu_ecc.scala 117:25 el2_lsu_ecc.scala 146:62] + assign io_sec_data_hi_m = {_T_364,_T_362}; // @[el2_lsu_ecc.scala 90:32 el2_lsu_ecc.scala 134:27] + assign io_sec_data_lo_m = {_T_742,_T_740}; // @[el2_lsu_ecc.scala 91:32 el2_lsu_ecc.scala 136:27] + assign io_sec_data_hi_r_ff = _T_1164; // @[el2_lsu_ecc.scala 157:23] + assign io_sec_data_lo_r_ff = _T_1165; // @[el2_lsu_ecc.scala 158:23] + assign io_dma_dccm_wdata_ecc_hi = {_T_1119,_T_1116}; // @[el2_lsu_ecc.scala 154:28] + assign io_dma_dccm_wdata_ecc_lo = {_T_937,_T_934}; // @[el2_lsu_ecc.scala 155:28] + assign io_stbuf_ecc_any = {_T_937,_T_934}; // @[el2_lsu_ecc.scala 153:28] + assign io_sec_data_ecc_hi_r_ff = {_T_1119,_T_1116}; // @[el2_lsu_ecc.scala 151:28] + assign io_sec_data_ecc_lo_r_ff = {_T_937,_T_934}; // @[el2_lsu_ecc.scala 152:28] + assign io_single_ecc_error_hi_r = _T_1153; // @[el2_lsu_ecc.scala 115:31 el2_lsu_ecc.scala 144:62] + assign io_single_ecc_error_lo_r = _T_1152; // @[el2_lsu_ecc.scala 118:31 el2_lsu_ecc.scala 143:62] + assign io_lsu_single_ecc_error_r = _T_1150; // @[el2_lsu_ecc.scala 120:31 el2_lsu_ecc.scala 141:62] + assign io_lsu_double_ecc_error_r = _T_1151; // @[el2_lsu_ecc.scala 121:31 el2_lsu_ecc.scala 142:62] + assign io_lsu_single_ecc_error_m = single_ecc_error_hi_any | single_ecc_error_lo_any; // @[el2_lsu_ecc.scala 92:30 el2_lsu_ecc.scala 138:33] + assign io_lsu_double_ecc_error_m = double_ecc_error_hi_any | double_ecc_error_lo_any; // @[el2_lsu_ecc.scala 93:30 el2_lsu_ecc.scala 139:33] + assign rvclkhdr_io_clk = clock; // @[el2_lib.scala 508:18] + assign rvclkhdr_io_en = io_ld_single_ecc_error_r; // @[el2_lib.scala 509:17] + assign rvclkhdr_io_scan_mode = io_scan_mode; // @[el2_lib.scala 510:24] + assign rvclkhdr_1_io_clk = clock; // @[el2_lib.scala 508:18] + assign rvclkhdr_1_io_en = io_ld_single_ecc_error_r; // @[el2_lib.scala 509:17] + assign rvclkhdr_1_io_scan_mode = io_scan_mode; // @[el2_lib.scala 510:24] +`ifdef RANDOMIZE_GARBAGE_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_INVALID_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_REG_INIT +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_MEM_INIT +`define RANDOMIZE +`endif +`ifndef RANDOM +`define RANDOM $random +`endif +`ifdef RANDOMIZE_MEM_INIT + integer initvar; +`endif +`ifndef SYNTHESIS +`ifdef FIRRTL_BEFORE_INITIAL +`FIRRTL_BEFORE_INITIAL +`endif +initial begin + `ifdef RANDOMIZE + `ifdef INIT_RANDOM + `INIT_RANDOM + `endif + `ifndef VERILATOR + `ifdef RANDOMIZE_DELAY + #`RANDOMIZE_DELAY begin end + `else + #0.002 begin end + `endif + `endif +`ifdef RANDOMIZE_REG_INIT + _RAND_0 = {1{`RANDOM}}; + _T_1150 = _RAND_0[0:0]; + _RAND_1 = {1{`RANDOM}}; + _T_1151 = _RAND_1[0:0]; + _RAND_2 = {1{`RANDOM}}; + _T_1152 = _RAND_2[0:0]; + _RAND_3 = {1{`RANDOM}}; + _T_1153 = _RAND_3[0:0]; + _RAND_4 = {1{`RANDOM}}; + _T_1154 = _RAND_4[31:0]; + _RAND_5 = {1{`RANDOM}}; + _T_1155 = _RAND_5[31:0]; + _RAND_6 = {1{`RANDOM}}; + _T_1164 = _RAND_6[31:0]; + _RAND_7 = {1{`RANDOM}}; + _T_1165 = _RAND_7[31:0]; +`endif // RANDOMIZE_REG_INIT + if (reset) begin + _T_1150 = 1'h0; + end + if (reset) begin + _T_1151 = 1'h0; + end + if (reset) begin + _T_1152 = 1'h0; + end + if (reset) begin + _T_1153 = 1'h0; + end + if (reset) begin + _T_1154 = 32'h0; + end + if (reset) begin + _T_1155 = 32'h0; + end + if (reset) begin + _T_1164 = 32'h0; + end + if (reset) begin + _T_1165 = 32'h0; + end + `endif // RANDOMIZE +end // initial +`ifdef FIRRTL_AFTER_INITIAL +`FIRRTL_AFTER_INITIAL +`endif +`endif // SYNTHESIS + always @(posedge io_lsu_c2_r_clk or posedge reset) begin + if (reset) begin + _T_1150 <= 1'h0; + end else begin + _T_1150 <= io_lsu_single_ecc_error_m; + end + end + always @(posedge io_lsu_c2_r_clk or posedge reset) begin + if (reset) begin + _T_1151 <= 1'h0; + end else begin + _T_1151 <= io_lsu_double_ecc_error_m; + end + end + always @(posedge io_lsu_c2_r_clk or posedge reset) begin + if (reset) begin + _T_1152 <= 1'h0; + end else begin + _T_1152 <= _T_588 & _T_586[6]; + end + end + always @(posedge io_lsu_c2_r_clk or posedge reset) begin + if (reset) begin + _T_1153 <= 1'h0; + end else begin + _T_1153 <= _T_210 & _T_208[6]; + end + end + always @(posedge io_lsu_c2_r_clk or posedge reset) begin + if (reset) begin + _T_1154 <= 32'h0; + end else begin + _T_1154 <= io_sec_data_hi_m; + end + end + always @(posedge io_lsu_c2_r_clk or posedge reset) begin + if (reset) begin + _T_1155 <= 32'h0; + end else begin + _T_1155 <= io_sec_data_lo_m; + end + end + always @(posedge rvclkhdr_io_l1clk or posedge reset) begin + if (reset) begin + _T_1164 <= 32'h0; + end else begin + _T_1164 <= io_sec_data_hi_r; + end + end + always @(posedge rvclkhdr_1_io_l1clk or posedge reset) begin + if (reset) begin + _T_1165 <= 32'h0; + end else begin + _T_1165 <= io_sec_data_lo_r; + end + end +endmodule +module el2_lsu_trigger( + input io_trigger_pkt_any_0_select, + input io_trigger_pkt_any_0_match_, + input io_trigger_pkt_any_0_store, + input io_trigger_pkt_any_0_load, + input [31:0] io_trigger_pkt_any_0_tdata2, + input io_trigger_pkt_any_1_select, + input io_trigger_pkt_any_1_match_, + input io_trigger_pkt_any_1_store, + input io_trigger_pkt_any_1_load, + input [31:0] io_trigger_pkt_any_1_tdata2, + input io_trigger_pkt_any_2_select, + input io_trigger_pkt_any_2_match_, + input io_trigger_pkt_any_2_store, + input io_trigger_pkt_any_2_load, + input [31:0] io_trigger_pkt_any_2_tdata2, + input io_trigger_pkt_any_3_select, + input io_trigger_pkt_any_3_match_, + input io_trigger_pkt_any_3_store, + input io_trigger_pkt_any_3_load, + input [31:0] io_trigger_pkt_any_3_tdata2, + input io_lsu_pkt_m_half, + input io_lsu_pkt_m_word, + input io_lsu_pkt_m_load, + input io_lsu_pkt_m_store, + input io_lsu_pkt_m_dma, + input io_lsu_pkt_m_valid, + input [31:0] io_lsu_addr_m, + input [31:0] io_store_data_m, + output [3:0] io_lsu_trigger_match_m +); + wire [15:0] _T_1 = io_lsu_pkt_m_word ? 16'hffff : 16'h0; // @[Bitwise.scala 72:12] + wire [15:0] _T_3 = _T_1 & io_store_data_m[31:16]; // @[el2_lsu_trigger.scala 16:61] + wire _T_4 = io_lsu_pkt_m_half | io_lsu_pkt_m_word; // @[el2_lsu_trigger.scala 16:114] + wire [7:0] _T_6 = _T_4 ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_8 = _T_6 & io_store_data_m[15:8]; // @[el2_lsu_trigger.scala 16:136] + wire [31:0] store_data_trigger_m = {_T_3,_T_8,io_store_data_m[7:0]}; // @[Cat.scala 29:58] + wire _T_12 = ~io_trigger_pkt_any_0_select; // @[el2_lsu_trigger.scala 17:53] + wire _T_13 = io_trigger_pkt_any_0_select & io_trigger_pkt_any_0_store; // @[el2_lsu_trigger.scala 17:136] + wire [31:0] _T_15 = _T_12 ? io_lsu_addr_m : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_16 = _T_13 ? store_data_trigger_m : 32'h0; // @[Mux.scala 27:72] + wire [31:0] lsu_match_data_0 = _T_15 | _T_16; // @[Mux.scala 27:72] + wire _T_19 = ~io_trigger_pkt_any_1_select; // @[el2_lsu_trigger.scala 17:53] + wire _T_20 = io_trigger_pkt_any_1_select & io_trigger_pkt_any_1_store; // @[el2_lsu_trigger.scala 17:136] + wire [31:0] _T_22 = _T_19 ? io_lsu_addr_m : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_23 = _T_20 ? store_data_trigger_m : 32'h0; // @[Mux.scala 27:72] + wire [31:0] lsu_match_data_1 = _T_22 | _T_23; // @[Mux.scala 27:72] + wire _T_26 = ~io_trigger_pkt_any_2_select; // @[el2_lsu_trigger.scala 17:53] + wire _T_27 = io_trigger_pkt_any_2_select & io_trigger_pkt_any_2_store; // @[el2_lsu_trigger.scala 17:136] + wire [31:0] _T_29 = _T_26 ? io_lsu_addr_m : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_30 = _T_27 ? store_data_trigger_m : 32'h0; // @[Mux.scala 27:72] + wire [31:0] lsu_match_data_2 = _T_29 | _T_30; // @[Mux.scala 27:72] + wire _T_33 = ~io_trigger_pkt_any_3_select; // @[el2_lsu_trigger.scala 17:53] + wire _T_34 = io_trigger_pkt_any_3_select & io_trigger_pkt_any_3_store; // @[el2_lsu_trigger.scala 17:136] + wire [31:0] _T_36 = _T_33 ? io_lsu_addr_m : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_37 = _T_34 ? store_data_trigger_m : 32'h0; // @[Mux.scala 27:72] + wire [31:0] lsu_match_data_3 = _T_36 | _T_37; // @[Mux.scala 27:72] + wire _T_39 = ~io_lsu_pkt_m_dma; // @[el2_lsu_trigger.scala 18:71] + wire _T_40 = io_lsu_pkt_m_valid & _T_39; // @[el2_lsu_trigger.scala 18:69] + wire _T_41 = io_trigger_pkt_any_0_store & io_lsu_pkt_m_store; // @[el2_lsu_trigger.scala 18:121] + wire _T_42 = io_trigger_pkt_any_0_load & io_lsu_pkt_m_load; // @[el2_lsu_trigger.scala 19:33] + wire _T_44 = _T_42 & _T_12; // @[el2_lsu_trigger.scala 19:53] + wire _T_45 = _T_41 | _T_44; // @[el2_lsu_trigger.scala 18:142] + wire _T_46 = _T_40 & _T_45; // @[el2_lsu_trigger.scala 18:89] + wire _T_49 = &io_trigger_pkt_any_0_tdata2; // @[el2_lib.scala 239:45] + wire _T_50 = ~_T_49; // @[el2_lib.scala 239:39] + wire _T_51 = io_trigger_pkt_any_0_match_ & _T_50; // @[el2_lib.scala 239:37] + wire _T_54 = io_trigger_pkt_any_0_tdata2[0] == lsu_match_data_0[0]; // @[el2_lib.scala 240:52] + wire _T_55 = _T_51 | _T_54; // @[el2_lib.scala 240:41] + wire _T_57 = &io_trigger_pkt_any_0_tdata2[0]; // @[el2_lib.scala 242:36] + wire _T_58 = _T_57 & _T_51; // @[el2_lib.scala 242:41] + wire _T_61 = io_trigger_pkt_any_0_tdata2[1] == lsu_match_data_0[1]; // @[el2_lib.scala 242:78] + wire _T_62 = _T_58 | _T_61; // @[el2_lib.scala 242:23] + wire _T_64 = &io_trigger_pkt_any_0_tdata2[1:0]; // @[el2_lib.scala 242:36] + wire _T_65 = _T_64 & _T_51; // @[el2_lib.scala 242:41] + wire _T_68 = io_trigger_pkt_any_0_tdata2[2] == lsu_match_data_0[2]; // @[el2_lib.scala 242:78] + wire _T_69 = _T_65 | _T_68; // @[el2_lib.scala 242:23] + wire _T_71 = &io_trigger_pkt_any_0_tdata2[2:0]; // @[el2_lib.scala 242:36] + wire _T_72 = _T_71 & _T_51; // @[el2_lib.scala 242:41] + wire _T_75 = io_trigger_pkt_any_0_tdata2[3] == lsu_match_data_0[3]; // @[el2_lib.scala 242:78] + wire _T_76 = _T_72 | _T_75; // @[el2_lib.scala 242:23] + wire _T_78 = &io_trigger_pkt_any_0_tdata2[3:0]; // @[el2_lib.scala 242:36] + wire _T_79 = _T_78 & _T_51; // @[el2_lib.scala 242:41] + wire _T_82 = io_trigger_pkt_any_0_tdata2[4] == lsu_match_data_0[4]; // @[el2_lib.scala 242:78] + wire _T_83 = _T_79 | _T_82; // @[el2_lib.scala 242:23] + wire _T_85 = &io_trigger_pkt_any_0_tdata2[4:0]; // @[el2_lib.scala 242:36] + wire _T_86 = _T_85 & _T_51; // @[el2_lib.scala 242:41] + wire _T_89 = io_trigger_pkt_any_0_tdata2[5] == lsu_match_data_0[5]; // @[el2_lib.scala 242:78] + wire _T_90 = _T_86 | _T_89; // @[el2_lib.scala 242:23] + wire _T_92 = &io_trigger_pkt_any_0_tdata2[5:0]; // @[el2_lib.scala 242:36] + wire _T_93 = _T_92 & _T_51; // @[el2_lib.scala 242:41] + wire _T_96 = io_trigger_pkt_any_0_tdata2[6] == lsu_match_data_0[6]; // @[el2_lib.scala 242:78] + wire _T_97 = _T_93 | _T_96; // @[el2_lib.scala 242:23] + wire _T_99 = &io_trigger_pkt_any_0_tdata2[6:0]; // @[el2_lib.scala 242:36] + wire _T_100 = _T_99 & _T_51; // @[el2_lib.scala 242:41] + wire _T_103 = io_trigger_pkt_any_0_tdata2[7] == lsu_match_data_0[7]; // @[el2_lib.scala 242:78] + wire _T_104 = _T_100 | _T_103; // @[el2_lib.scala 242:23] + wire _T_106 = &io_trigger_pkt_any_0_tdata2[7:0]; // @[el2_lib.scala 242:36] + wire _T_107 = _T_106 & _T_51; // @[el2_lib.scala 242:41] + wire _T_110 = io_trigger_pkt_any_0_tdata2[8] == lsu_match_data_0[8]; // @[el2_lib.scala 242:78] + wire _T_111 = _T_107 | _T_110; // @[el2_lib.scala 242:23] + wire _T_113 = &io_trigger_pkt_any_0_tdata2[8:0]; // @[el2_lib.scala 242:36] + wire _T_114 = _T_113 & _T_51; // @[el2_lib.scala 242:41] + wire _T_117 = io_trigger_pkt_any_0_tdata2[9] == lsu_match_data_0[9]; // @[el2_lib.scala 242:78] + wire _T_118 = _T_114 | _T_117; // @[el2_lib.scala 242:23] + wire _T_120 = &io_trigger_pkt_any_0_tdata2[9:0]; // @[el2_lib.scala 242:36] + wire _T_121 = _T_120 & _T_51; // @[el2_lib.scala 242:41] + wire _T_124 = io_trigger_pkt_any_0_tdata2[10] == lsu_match_data_0[10]; // @[el2_lib.scala 242:78] + wire _T_125 = _T_121 | _T_124; // @[el2_lib.scala 242:23] + wire _T_127 = &io_trigger_pkt_any_0_tdata2[10:0]; // @[el2_lib.scala 242:36] + wire _T_128 = _T_127 & _T_51; // @[el2_lib.scala 242:41] + wire _T_131 = io_trigger_pkt_any_0_tdata2[11] == lsu_match_data_0[11]; // @[el2_lib.scala 242:78] + wire _T_132 = _T_128 | _T_131; // @[el2_lib.scala 242:23] + wire _T_134 = &io_trigger_pkt_any_0_tdata2[11:0]; // @[el2_lib.scala 242:36] + wire _T_135 = _T_134 & _T_51; // @[el2_lib.scala 242:41] + wire _T_138 = io_trigger_pkt_any_0_tdata2[12] == lsu_match_data_0[12]; // @[el2_lib.scala 242:78] + wire _T_139 = _T_135 | _T_138; // @[el2_lib.scala 242:23] + wire _T_141 = &io_trigger_pkt_any_0_tdata2[12:0]; // @[el2_lib.scala 242:36] + wire _T_142 = _T_141 & _T_51; // @[el2_lib.scala 242:41] + wire _T_145 = io_trigger_pkt_any_0_tdata2[13] == lsu_match_data_0[13]; // @[el2_lib.scala 242:78] + wire _T_146 = _T_142 | _T_145; // @[el2_lib.scala 242:23] + wire _T_148 = &io_trigger_pkt_any_0_tdata2[13:0]; // @[el2_lib.scala 242:36] + wire _T_149 = _T_148 & _T_51; // @[el2_lib.scala 242:41] + wire _T_152 = io_trigger_pkt_any_0_tdata2[14] == lsu_match_data_0[14]; // @[el2_lib.scala 242:78] + wire _T_153 = _T_149 | _T_152; // @[el2_lib.scala 242:23] + wire _T_155 = &io_trigger_pkt_any_0_tdata2[14:0]; // @[el2_lib.scala 242:36] + wire _T_156 = _T_155 & _T_51; // @[el2_lib.scala 242:41] + wire _T_159 = io_trigger_pkt_any_0_tdata2[15] == lsu_match_data_0[15]; // @[el2_lib.scala 242:78] + wire _T_160 = _T_156 | _T_159; // @[el2_lib.scala 242:23] + wire _T_162 = &io_trigger_pkt_any_0_tdata2[15:0]; // @[el2_lib.scala 242:36] + wire _T_163 = _T_162 & _T_51; // @[el2_lib.scala 242:41] + wire _T_166 = io_trigger_pkt_any_0_tdata2[16] == lsu_match_data_0[16]; // @[el2_lib.scala 242:78] + wire _T_167 = _T_163 | _T_166; // @[el2_lib.scala 242:23] + wire _T_169 = &io_trigger_pkt_any_0_tdata2[16:0]; // @[el2_lib.scala 242:36] + wire _T_170 = _T_169 & _T_51; // @[el2_lib.scala 242:41] + wire _T_173 = io_trigger_pkt_any_0_tdata2[17] == lsu_match_data_0[17]; // @[el2_lib.scala 242:78] + wire _T_174 = _T_170 | _T_173; // @[el2_lib.scala 242:23] + wire _T_176 = &io_trigger_pkt_any_0_tdata2[17:0]; // @[el2_lib.scala 242:36] + wire _T_177 = _T_176 & _T_51; // @[el2_lib.scala 242:41] + wire _T_180 = io_trigger_pkt_any_0_tdata2[18] == lsu_match_data_0[18]; // @[el2_lib.scala 242:78] + wire _T_181 = _T_177 | _T_180; // @[el2_lib.scala 242:23] + wire _T_183 = &io_trigger_pkt_any_0_tdata2[18:0]; // @[el2_lib.scala 242:36] + wire _T_184 = _T_183 & _T_51; // @[el2_lib.scala 242:41] + wire _T_187 = io_trigger_pkt_any_0_tdata2[19] == lsu_match_data_0[19]; // @[el2_lib.scala 242:78] + wire _T_188 = _T_184 | _T_187; // @[el2_lib.scala 242:23] + wire _T_190 = &io_trigger_pkt_any_0_tdata2[19:0]; // @[el2_lib.scala 242:36] + wire _T_191 = _T_190 & _T_51; // @[el2_lib.scala 242:41] + wire _T_194 = io_trigger_pkt_any_0_tdata2[20] == lsu_match_data_0[20]; // @[el2_lib.scala 242:78] + wire _T_195 = _T_191 | _T_194; // @[el2_lib.scala 242:23] + wire _T_197 = &io_trigger_pkt_any_0_tdata2[20:0]; // @[el2_lib.scala 242:36] + wire _T_198 = _T_197 & _T_51; // @[el2_lib.scala 242:41] + wire _T_201 = io_trigger_pkt_any_0_tdata2[21] == lsu_match_data_0[21]; // @[el2_lib.scala 242:78] + wire _T_202 = _T_198 | _T_201; // @[el2_lib.scala 242:23] + wire _T_204 = &io_trigger_pkt_any_0_tdata2[21:0]; // @[el2_lib.scala 242:36] + wire _T_205 = _T_204 & _T_51; // @[el2_lib.scala 242:41] + wire _T_208 = io_trigger_pkt_any_0_tdata2[22] == lsu_match_data_0[22]; // @[el2_lib.scala 242:78] + wire _T_209 = _T_205 | _T_208; // @[el2_lib.scala 242:23] + wire _T_211 = &io_trigger_pkt_any_0_tdata2[22:0]; // @[el2_lib.scala 242:36] + wire _T_212 = _T_211 & _T_51; // @[el2_lib.scala 242:41] + wire _T_215 = io_trigger_pkt_any_0_tdata2[23] == lsu_match_data_0[23]; // @[el2_lib.scala 242:78] + wire _T_216 = _T_212 | _T_215; // @[el2_lib.scala 242:23] + wire _T_218 = &io_trigger_pkt_any_0_tdata2[23:0]; // @[el2_lib.scala 242:36] + wire _T_219 = _T_218 & _T_51; // @[el2_lib.scala 242:41] + wire _T_222 = io_trigger_pkt_any_0_tdata2[24] == lsu_match_data_0[24]; // @[el2_lib.scala 242:78] + wire _T_223 = _T_219 | _T_222; // @[el2_lib.scala 242:23] + wire _T_225 = &io_trigger_pkt_any_0_tdata2[24:0]; // @[el2_lib.scala 242:36] + wire _T_226 = _T_225 & _T_51; // @[el2_lib.scala 242:41] + wire _T_229 = io_trigger_pkt_any_0_tdata2[25] == lsu_match_data_0[25]; // @[el2_lib.scala 242:78] + wire _T_230 = _T_226 | _T_229; // @[el2_lib.scala 242:23] + wire _T_232 = &io_trigger_pkt_any_0_tdata2[25:0]; // @[el2_lib.scala 242:36] + wire _T_233 = _T_232 & _T_51; // @[el2_lib.scala 242:41] + wire _T_236 = io_trigger_pkt_any_0_tdata2[26] == lsu_match_data_0[26]; // @[el2_lib.scala 242:78] + wire _T_237 = _T_233 | _T_236; // @[el2_lib.scala 242:23] + wire _T_239 = &io_trigger_pkt_any_0_tdata2[26:0]; // @[el2_lib.scala 242:36] + wire _T_240 = _T_239 & _T_51; // @[el2_lib.scala 242:41] + wire _T_243 = io_trigger_pkt_any_0_tdata2[27] == lsu_match_data_0[27]; // @[el2_lib.scala 242:78] + wire _T_244 = _T_240 | _T_243; // @[el2_lib.scala 242:23] + wire _T_246 = &io_trigger_pkt_any_0_tdata2[27:0]; // @[el2_lib.scala 242:36] + wire _T_247 = _T_246 & _T_51; // @[el2_lib.scala 242:41] + wire _T_250 = io_trigger_pkt_any_0_tdata2[28] == lsu_match_data_0[28]; // @[el2_lib.scala 242:78] + wire _T_251 = _T_247 | _T_250; // @[el2_lib.scala 242:23] + wire _T_253 = &io_trigger_pkt_any_0_tdata2[28:0]; // @[el2_lib.scala 242:36] + wire _T_254 = _T_253 & _T_51; // @[el2_lib.scala 242:41] + wire _T_257 = io_trigger_pkt_any_0_tdata2[29] == lsu_match_data_0[29]; // @[el2_lib.scala 242:78] + wire _T_258 = _T_254 | _T_257; // @[el2_lib.scala 242:23] + wire _T_260 = &io_trigger_pkt_any_0_tdata2[29:0]; // @[el2_lib.scala 242:36] + wire _T_261 = _T_260 & _T_51; // @[el2_lib.scala 242:41] + wire _T_264 = io_trigger_pkt_any_0_tdata2[30] == lsu_match_data_0[30]; // @[el2_lib.scala 242:78] + wire _T_265 = _T_261 | _T_264; // @[el2_lib.scala 242:23] + wire _T_267 = &io_trigger_pkt_any_0_tdata2[30:0]; // @[el2_lib.scala 242:36] + wire _T_268 = _T_267 & _T_51; // @[el2_lib.scala 242:41] + wire _T_271 = io_trigger_pkt_any_0_tdata2[31] == lsu_match_data_0[31]; // @[el2_lib.scala 242:78] + wire _T_272 = _T_268 | _T_271; // @[el2_lib.scala 242:23] + wire [7:0] _T_279 = {_T_104,_T_97,_T_90,_T_83,_T_76,_T_69,_T_62,_T_55}; // @[el2_lib.scala 243:14] + wire [15:0] _T_287 = {_T_160,_T_153,_T_146,_T_139,_T_132,_T_125,_T_118,_T_111,_T_279}; // @[el2_lib.scala 243:14] + wire [7:0] _T_294 = {_T_216,_T_209,_T_202,_T_195,_T_188,_T_181,_T_174,_T_167}; // @[el2_lib.scala 243:14] + wire [31:0] _T_303 = {_T_272,_T_265,_T_258,_T_251,_T_244,_T_237,_T_230,_T_223,_T_294,_T_287}; // @[el2_lib.scala 243:14] + wire [31:0] _GEN_0 = {{31'd0}, _T_46}; // @[el2_lsu_trigger.scala 19:87] + wire [31:0] _T_304 = _GEN_0 & _T_303; // @[el2_lsu_trigger.scala 19:87] + wire _T_307 = io_trigger_pkt_any_1_store & io_lsu_pkt_m_store; // @[el2_lsu_trigger.scala 18:121] + wire _T_308 = io_trigger_pkt_any_1_load & io_lsu_pkt_m_load; // @[el2_lsu_trigger.scala 19:33] + wire _T_310 = _T_308 & _T_19; // @[el2_lsu_trigger.scala 19:53] + wire _T_311 = _T_307 | _T_310; // @[el2_lsu_trigger.scala 18:142] + wire _T_312 = _T_40 & _T_311; // @[el2_lsu_trigger.scala 18:89] + wire _T_315 = &io_trigger_pkt_any_1_tdata2; // @[el2_lib.scala 239:45] + wire _T_316 = ~_T_315; // @[el2_lib.scala 239:39] + wire _T_317 = io_trigger_pkt_any_1_match_ & _T_316; // @[el2_lib.scala 239:37] + wire _T_320 = io_trigger_pkt_any_1_tdata2[0] == lsu_match_data_1[0]; // @[el2_lib.scala 240:52] + wire _T_321 = _T_317 | _T_320; // @[el2_lib.scala 240:41] + wire _T_323 = &io_trigger_pkt_any_1_tdata2[0]; // @[el2_lib.scala 242:36] + wire _T_324 = _T_323 & _T_317; // @[el2_lib.scala 242:41] + wire _T_327 = io_trigger_pkt_any_1_tdata2[1] == lsu_match_data_1[1]; // @[el2_lib.scala 242:78] + wire _T_328 = _T_324 | _T_327; // @[el2_lib.scala 242:23] + wire _T_330 = &io_trigger_pkt_any_1_tdata2[1:0]; // @[el2_lib.scala 242:36] + wire _T_331 = _T_330 & _T_317; // @[el2_lib.scala 242:41] + wire _T_334 = io_trigger_pkt_any_1_tdata2[2] == lsu_match_data_1[2]; // @[el2_lib.scala 242:78] + wire _T_335 = _T_331 | _T_334; // @[el2_lib.scala 242:23] + wire _T_337 = &io_trigger_pkt_any_1_tdata2[2:0]; // @[el2_lib.scala 242:36] + wire _T_338 = _T_337 & _T_317; // @[el2_lib.scala 242:41] + wire _T_341 = io_trigger_pkt_any_1_tdata2[3] == lsu_match_data_1[3]; // @[el2_lib.scala 242:78] + wire _T_342 = _T_338 | _T_341; // @[el2_lib.scala 242:23] + wire _T_344 = &io_trigger_pkt_any_1_tdata2[3:0]; // @[el2_lib.scala 242:36] + wire _T_345 = _T_344 & _T_317; // @[el2_lib.scala 242:41] + wire _T_348 = io_trigger_pkt_any_1_tdata2[4] == lsu_match_data_1[4]; // @[el2_lib.scala 242:78] + wire _T_349 = _T_345 | _T_348; // @[el2_lib.scala 242:23] + wire _T_351 = &io_trigger_pkt_any_1_tdata2[4:0]; // @[el2_lib.scala 242:36] + wire _T_352 = _T_351 & _T_317; // @[el2_lib.scala 242:41] + wire _T_355 = io_trigger_pkt_any_1_tdata2[5] == lsu_match_data_1[5]; // @[el2_lib.scala 242:78] + wire _T_356 = _T_352 | _T_355; // @[el2_lib.scala 242:23] + wire _T_358 = &io_trigger_pkt_any_1_tdata2[5:0]; // @[el2_lib.scala 242:36] + wire _T_359 = _T_358 & _T_317; // @[el2_lib.scala 242:41] + wire _T_362 = io_trigger_pkt_any_1_tdata2[6] == lsu_match_data_1[6]; // @[el2_lib.scala 242:78] + wire _T_363 = _T_359 | _T_362; // @[el2_lib.scala 242:23] + wire _T_365 = &io_trigger_pkt_any_1_tdata2[6:0]; // @[el2_lib.scala 242:36] + wire _T_366 = _T_365 & _T_317; // @[el2_lib.scala 242:41] + wire _T_369 = io_trigger_pkt_any_1_tdata2[7] == lsu_match_data_1[7]; // @[el2_lib.scala 242:78] + wire _T_370 = _T_366 | _T_369; // @[el2_lib.scala 242:23] + wire _T_372 = &io_trigger_pkt_any_1_tdata2[7:0]; // @[el2_lib.scala 242:36] + wire _T_373 = _T_372 & _T_317; // @[el2_lib.scala 242:41] + wire _T_376 = io_trigger_pkt_any_1_tdata2[8] == lsu_match_data_1[8]; // @[el2_lib.scala 242:78] + wire _T_377 = _T_373 | _T_376; // @[el2_lib.scala 242:23] + wire _T_379 = &io_trigger_pkt_any_1_tdata2[8:0]; // @[el2_lib.scala 242:36] + wire _T_380 = _T_379 & _T_317; // @[el2_lib.scala 242:41] + wire _T_383 = io_trigger_pkt_any_1_tdata2[9] == lsu_match_data_1[9]; // @[el2_lib.scala 242:78] + wire _T_384 = _T_380 | _T_383; // @[el2_lib.scala 242:23] + wire _T_386 = &io_trigger_pkt_any_1_tdata2[9:0]; // @[el2_lib.scala 242:36] + wire _T_387 = _T_386 & _T_317; // @[el2_lib.scala 242:41] + wire _T_390 = io_trigger_pkt_any_1_tdata2[10] == lsu_match_data_1[10]; // @[el2_lib.scala 242:78] + wire _T_391 = _T_387 | _T_390; // @[el2_lib.scala 242:23] + wire _T_393 = &io_trigger_pkt_any_1_tdata2[10:0]; // @[el2_lib.scala 242:36] + wire _T_394 = _T_393 & _T_317; // @[el2_lib.scala 242:41] + wire _T_397 = io_trigger_pkt_any_1_tdata2[11] == lsu_match_data_1[11]; // @[el2_lib.scala 242:78] + wire _T_398 = _T_394 | _T_397; // @[el2_lib.scala 242:23] + wire _T_400 = &io_trigger_pkt_any_1_tdata2[11:0]; // @[el2_lib.scala 242:36] + wire _T_401 = _T_400 & _T_317; // @[el2_lib.scala 242:41] + wire _T_404 = io_trigger_pkt_any_1_tdata2[12] == lsu_match_data_1[12]; // @[el2_lib.scala 242:78] + wire _T_405 = _T_401 | _T_404; // @[el2_lib.scala 242:23] + wire _T_407 = &io_trigger_pkt_any_1_tdata2[12:0]; // @[el2_lib.scala 242:36] + wire _T_408 = _T_407 & _T_317; // @[el2_lib.scala 242:41] + wire _T_411 = io_trigger_pkt_any_1_tdata2[13] == lsu_match_data_1[13]; // @[el2_lib.scala 242:78] + wire _T_412 = _T_408 | _T_411; // @[el2_lib.scala 242:23] + wire _T_414 = &io_trigger_pkt_any_1_tdata2[13:0]; // @[el2_lib.scala 242:36] + wire _T_415 = _T_414 & _T_317; // @[el2_lib.scala 242:41] + wire _T_418 = io_trigger_pkt_any_1_tdata2[14] == lsu_match_data_1[14]; // @[el2_lib.scala 242:78] + wire _T_419 = _T_415 | _T_418; // @[el2_lib.scala 242:23] + wire _T_421 = &io_trigger_pkt_any_1_tdata2[14:0]; // @[el2_lib.scala 242:36] + wire _T_422 = _T_421 & _T_317; // @[el2_lib.scala 242:41] + wire _T_425 = io_trigger_pkt_any_1_tdata2[15] == lsu_match_data_1[15]; // @[el2_lib.scala 242:78] + wire _T_426 = _T_422 | _T_425; // @[el2_lib.scala 242:23] + wire _T_428 = &io_trigger_pkt_any_1_tdata2[15:0]; // @[el2_lib.scala 242:36] + wire _T_429 = _T_428 & _T_317; // @[el2_lib.scala 242:41] + wire _T_432 = io_trigger_pkt_any_1_tdata2[16] == lsu_match_data_1[16]; // @[el2_lib.scala 242:78] + wire _T_433 = _T_429 | _T_432; // @[el2_lib.scala 242:23] + wire _T_435 = &io_trigger_pkt_any_1_tdata2[16:0]; // @[el2_lib.scala 242:36] + wire _T_436 = _T_435 & _T_317; // @[el2_lib.scala 242:41] + wire _T_439 = io_trigger_pkt_any_1_tdata2[17] == lsu_match_data_1[17]; // @[el2_lib.scala 242:78] + wire _T_440 = _T_436 | _T_439; // @[el2_lib.scala 242:23] + wire _T_442 = &io_trigger_pkt_any_1_tdata2[17:0]; // @[el2_lib.scala 242:36] + wire _T_443 = _T_442 & _T_317; // @[el2_lib.scala 242:41] + wire _T_446 = io_trigger_pkt_any_1_tdata2[18] == lsu_match_data_1[18]; // @[el2_lib.scala 242:78] + wire _T_447 = _T_443 | _T_446; // @[el2_lib.scala 242:23] + wire _T_449 = &io_trigger_pkt_any_1_tdata2[18:0]; // @[el2_lib.scala 242:36] + wire _T_450 = _T_449 & _T_317; // @[el2_lib.scala 242:41] + wire _T_453 = io_trigger_pkt_any_1_tdata2[19] == lsu_match_data_1[19]; // @[el2_lib.scala 242:78] + wire _T_454 = _T_450 | _T_453; // @[el2_lib.scala 242:23] + wire _T_456 = &io_trigger_pkt_any_1_tdata2[19:0]; // @[el2_lib.scala 242:36] + wire _T_457 = _T_456 & _T_317; // @[el2_lib.scala 242:41] + wire _T_460 = io_trigger_pkt_any_1_tdata2[20] == lsu_match_data_1[20]; // @[el2_lib.scala 242:78] + wire _T_461 = _T_457 | _T_460; // @[el2_lib.scala 242:23] + wire _T_463 = &io_trigger_pkt_any_1_tdata2[20:0]; // @[el2_lib.scala 242:36] + wire _T_464 = _T_463 & _T_317; // @[el2_lib.scala 242:41] + wire _T_467 = io_trigger_pkt_any_1_tdata2[21] == lsu_match_data_1[21]; // @[el2_lib.scala 242:78] + wire _T_468 = _T_464 | _T_467; // @[el2_lib.scala 242:23] + wire _T_470 = &io_trigger_pkt_any_1_tdata2[21:0]; // @[el2_lib.scala 242:36] + wire _T_471 = _T_470 & _T_317; // @[el2_lib.scala 242:41] + wire _T_474 = io_trigger_pkt_any_1_tdata2[22] == lsu_match_data_1[22]; // @[el2_lib.scala 242:78] + wire _T_475 = _T_471 | _T_474; // @[el2_lib.scala 242:23] + wire _T_477 = &io_trigger_pkt_any_1_tdata2[22:0]; // @[el2_lib.scala 242:36] + wire _T_478 = _T_477 & _T_317; // @[el2_lib.scala 242:41] + wire _T_481 = io_trigger_pkt_any_1_tdata2[23] == lsu_match_data_1[23]; // @[el2_lib.scala 242:78] + wire _T_482 = _T_478 | _T_481; // @[el2_lib.scala 242:23] + wire _T_484 = &io_trigger_pkt_any_1_tdata2[23:0]; // @[el2_lib.scala 242:36] + wire _T_485 = _T_484 & _T_317; // @[el2_lib.scala 242:41] + wire _T_488 = io_trigger_pkt_any_1_tdata2[24] == lsu_match_data_1[24]; // @[el2_lib.scala 242:78] + wire _T_489 = _T_485 | _T_488; // @[el2_lib.scala 242:23] + wire _T_491 = &io_trigger_pkt_any_1_tdata2[24:0]; // @[el2_lib.scala 242:36] + wire _T_492 = _T_491 & _T_317; // @[el2_lib.scala 242:41] + wire _T_495 = io_trigger_pkt_any_1_tdata2[25] == lsu_match_data_1[25]; // @[el2_lib.scala 242:78] + wire _T_496 = _T_492 | _T_495; // @[el2_lib.scala 242:23] + wire _T_498 = &io_trigger_pkt_any_1_tdata2[25:0]; // @[el2_lib.scala 242:36] + wire _T_499 = _T_498 & _T_317; // @[el2_lib.scala 242:41] + wire _T_502 = io_trigger_pkt_any_1_tdata2[26] == lsu_match_data_1[26]; // @[el2_lib.scala 242:78] + wire _T_503 = _T_499 | _T_502; // @[el2_lib.scala 242:23] + wire _T_505 = &io_trigger_pkt_any_1_tdata2[26:0]; // @[el2_lib.scala 242:36] + wire _T_506 = _T_505 & _T_317; // @[el2_lib.scala 242:41] + wire _T_509 = io_trigger_pkt_any_1_tdata2[27] == lsu_match_data_1[27]; // @[el2_lib.scala 242:78] + wire _T_510 = _T_506 | _T_509; // @[el2_lib.scala 242:23] + wire _T_512 = &io_trigger_pkt_any_1_tdata2[27:0]; // @[el2_lib.scala 242:36] + wire _T_513 = _T_512 & _T_317; // @[el2_lib.scala 242:41] + wire _T_516 = io_trigger_pkt_any_1_tdata2[28] == lsu_match_data_1[28]; // @[el2_lib.scala 242:78] + wire _T_517 = _T_513 | _T_516; // @[el2_lib.scala 242:23] + wire _T_519 = &io_trigger_pkt_any_1_tdata2[28:0]; // @[el2_lib.scala 242:36] + wire _T_520 = _T_519 & _T_317; // @[el2_lib.scala 242:41] + wire _T_523 = io_trigger_pkt_any_1_tdata2[29] == lsu_match_data_1[29]; // @[el2_lib.scala 242:78] + wire _T_524 = _T_520 | _T_523; // @[el2_lib.scala 242:23] + wire _T_526 = &io_trigger_pkt_any_1_tdata2[29:0]; // @[el2_lib.scala 242:36] + wire _T_527 = _T_526 & _T_317; // @[el2_lib.scala 242:41] + wire _T_530 = io_trigger_pkt_any_1_tdata2[30] == lsu_match_data_1[30]; // @[el2_lib.scala 242:78] + wire _T_531 = _T_527 | _T_530; // @[el2_lib.scala 242:23] + wire _T_533 = &io_trigger_pkt_any_1_tdata2[30:0]; // @[el2_lib.scala 242:36] + wire _T_534 = _T_533 & _T_317; // @[el2_lib.scala 242:41] + wire _T_537 = io_trigger_pkt_any_1_tdata2[31] == lsu_match_data_1[31]; // @[el2_lib.scala 242:78] + wire _T_538 = _T_534 | _T_537; // @[el2_lib.scala 242:23] + wire [7:0] _T_545 = {_T_370,_T_363,_T_356,_T_349,_T_342,_T_335,_T_328,_T_321}; // @[el2_lib.scala 243:14] + wire [15:0] _T_553 = {_T_426,_T_419,_T_412,_T_405,_T_398,_T_391,_T_384,_T_377,_T_545}; // @[el2_lib.scala 243:14] + wire [7:0] _T_560 = {_T_482,_T_475,_T_468,_T_461,_T_454,_T_447,_T_440,_T_433}; // @[el2_lib.scala 243:14] + wire [31:0] _T_569 = {_T_538,_T_531,_T_524,_T_517,_T_510,_T_503,_T_496,_T_489,_T_560,_T_553}; // @[el2_lib.scala 243:14] + wire [31:0] _GEN_1 = {{31'd0}, _T_312}; // @[el2_lsu_trigger.scala 19:87] + wire [31:0] _T_570 = _GEN_1 & _T_569; // @[el2_lsu_trigger.scala 19:87] + wire _T_573 = io_trigger_pkt_any_2_store & io_lsu_pkt_m_store; // @[el2_lsu_trigger.scala 18:121] + wire _T_574 = io_trigger_pkt_any_2_load & io_lsu_pkt_m_load; // @[el2_lsu_trigger.scala 19:33] + wire _T_576 = _T_574 & _T_26; // @[el2_lsu_trigger.scala 19:53] + wire _T_577 = _T_573 | _T_576; // @[el2_lsu_trigger.scala 18:142] + wire _T_578 = _T_40 & _T_577; // @[el2_lsu_trigger.scala 18:89] + wire _T_581 = &io_trigger_pkt_any_2_tdata2; // @[el2_lib.scala 239:45] + wire _T_582 = ~_T_581; // @[el2_lib.scala 239:39] + wire _T_583 = io_trigger_pkt_any_2_match_ & _T_582; // @[el2_lib.scala 239:37] + wire _T_586 = io_trigger_pkt_any_2_tdata2[0] == lsu_match_data_2[0]; // @[el2_lib.scala 240:52] + wire _T_587 = _T_583 | _T_586; // @[el2_lib.scala 240:41] + wire _T_589 = &io_trigger_pkt_any_2_tdata2[0]; // @[el2_lib.scala 242:36] + wire _T_590 = _T_589 & _T_583; // @[el2_lib.scala 242:41] + wire _T_593 = io_trigger_pkt_any_2_tdata2[1] == lsu_match_data_2[1]; // @[el2_lib.scala 242:78] + wire _T_594 = _T_590 | _T_593; // @[el2_lib.scala 242:23] + wire _T_596 = &io_trigger_pkt_any_2_tdata2[1:0]; // @[el2_lib.scala 242:36] + wire _T_597 = _T_596 & _T_583; // @[el2_lib.scala 242:41] + wire _T_600 = io_trigger_pkt_any_2_tdata2[2] == lsu_match_data_2[2]; // @[el2_lib.scala 242:78] + wire _T_601 = _T_597 | _T_600; // @[el2_lib.scala 242:23] + wire _T_603 = &io_trigger_pkt_any_2_tdata2[2:0]; // @[el2_lib.scala 242:36] + wire _T_604 = _T_603 & _T_583; // @[el2_lib.scala 242:41] + wire _T_607 = io_trigger_pkt_any_2_tdata2[3] == lsu_match_data_2[3]; // @[el2_lib.scala 242:78] + wire _T_608 = _T_604 | _T_607; // @[el2_lib.scala 242:23] + wire _T_610 = &io_trigger_pkt_any_2_tdata2[3:0]; // @[el2_lib.scala 242:36] + wire _T_611 = _T_610 & _T_583; // @[el2_lib.scala 242:41] + wire _T_614 = io_trigger_pkt_any_2_tdata2[4] == lsu_match_data_2[4]; // @[el2_lib.scala 242:78] + wire _T_615 = _T_611 | _T_614; // @[el2_lib.scala 242:23] + wire _T_617 = &io_trigger_pkt_any_2_tdata2[4:0]; // @[el2_lib.scala 242:36] + wire _T_618 = _T_617 & _T_583; // @[el2_lib.scala 242:41] + wire _T_621 = io_trigger_pkt_any_2_tdata2[5] == lsu_match_data_2[5]; // @[el2_lib.scala 242:78] + wire _T_622 = _T_618 | _T_621; // @[el2_lib.scala 242:23] + wire _T_624 = &io_trigger_pkt_any_2_tdata2[5:0]; // @[el2_lib.scala 242:36] + wire _T_625 = _T_624 & _T_583; // @[el2_lib.scala 242:41] + wire _T_628 = io_trigger_pkt_any_2_tdata2[6] == lsu_match_data_2[6]; // @[el2_lib.scala 242:78] + wire _T_629 = _T_625 | _T_628; // @[el2_lib.scala 242:23] + wire _T_631 = &io_trigger_pkt_any_2_tdata2[6:0]; // @[el2_lib.scala 242:36] + wire _T_632 = _T_631 & _T_583; // @[el2_lib.scala 242:41] + wire _T_635 = io_trigger_pkt_any_2_tdata2[7] == lsu_match_data_2[7]; // @[el2_lib.scala 242:78] + wire _T_636 = _T_632 | _T_635; // @[el2_lib.scala 242:23] + wire _T_638 = &io_trigger_pkt_any_2_tdata2[7:0]; // @[el2_lib.scala 242:36] + wire _T_639 = _T_638 & _T_583; // @[el2_lib.scala 242:41] + wire _T_642 = io_trigger_pkt_any_2_tdata2[8] == lsu_match_data_2[8]; // @[el2_lib.scala 242:78] + wire _T_643 = _T_639 | _T_642; // @[el2_lib.scala 242:23] + wire _T_645 = &io_trigger_pkt_any_2_tdata2[8:0]; // @[el2_lib.scala 242:36] + wire _T_646 = _T_645 & _T_583; // @[el2_lib.scala 242:41] + wire _T_649 = io_trigger_pkt_any_2_tdata2[9] == lsu_match_data_2[9]; // @[el2_lib.scala 242:78] + wire _T_650 = _T_646 | _T_649; // @[el2_lib.scala 242:23] + wire _T_652 = &io_trigger_pkt_any_2_tdata2[9:0]; // @[el2_lib.scala 242:36] + wire _T_653 = _T_652 & _T_583; // @[el2_lib.scala 242:41] + wire _T_656 = io_trigger_pkt_any_2_tdata2[10] == lsu_match_data_2[10]; // @[el2_lib.scala 242:78] + wire _T_657 = _T_653 | _T_656; // @[el2_lib.scala 242:23] + wire _T_659 = &io_trigger_pkt_any_2_tdata2[10:0]; // @[el2_lib.scala 242:36] + wire _T_660 = _T_659 & _T_583; // @[el2_lib.scala 242:41] + wire _T_663 = io_trigger_pkt_any_2_tdata2[11] == lsu_match_data_2[11]; // @[el2_lib.scala 242:78] + wire _T_664 = _T_660 | _T_663; // @[el2_lib.scala 242:23] + wire _T_666 = &io_trigger_pkt_any_2_tdata2[11:0]; // @[el2_lib.scala 242:36] + wire _T_667 = _T_666 & _T_583; // @[el2_lib.scala 242:41] + wire _T_670 = io_trigger_pkt_any_2_tdata2[12] == lsu_match_data_2[12]; // @[el2_lib.scala 242:78] + wire _T_671 = _T_667 | _T_670; // @[el2_lib.scala 242:23] + wire _T_673 = &io_trigger_pkt_any_2_tdata2[12:0]; // @[el2_lib.scala 242:36] + wire _T_674 = _T_673 & _T_583; // @[el2_lib.scala 242:41] + wire _T_677 = io_trigger_pkt_any_2_tdata2[13] == lsu_match_data_2[13]; // @[el2_lib.scala 242:78] + wire _T_678 = _T_674 | _T_677; // @[el2_lib.scala 242:23] + wire _T_680 = &io_trigger_pkt_any_2_tdata2[13:0]; // @[el2_lib.scala 242:36] + wire _T_681 = _T_680 & _T_583; // @[el2_lib.scala 242:41] + wire _T_684 = io_trigger_pkt_any_2_tdata2[14] == lsu_match_data_2[14]; // @[el2_lib.scala 242:78] + wire _T_685 = _T_681 | _T_684; // @[el2_lib.scala 242:23] + wire _T_687 = &io_trigger_pkt_any_2_tdata2[14:0]; // @[el2_lib.scala 242:36] + wire _T_688 = _T_687 & _T_583; // @[el2_lib.scala 242:41] + wire _T_691 = io_trigger_pkt_any_2_tdata2[15] == lsu_match_data_2[15]; // @[el2_lib.scala 242:78] + wire _T_692 = _T_688 | _T_691; // @[el2_lib.scala 242:23] + wire _T_694 = &io_trigger_pkt_any_2_tdata2[15:0]; // @[el2_lib.scala 242:36] + wire _T_695 = _T_694 & _T_583; // @[el2_lib.scala 242:41] + wire _T_698 = io_trigger_pkt_any_2_tdata2[16] == lsu_match_data_2[16]; // @[el2_lib.scala 242:78] + wire _T_699 = _T_695 | _T_698; // @[el2_lib.scala 242:23] + wire _T_701 = &io_trigger_pkt_any_2_tdata2[16:0]; // @[el2_lib.scala 242:36] + wire _T_702 = _T_701 & _T_583; // @[el2_lib.scala 242:41] + wire _T_705 = io_trigger_pkt_any_2_tdata2[17] == lsu_match_data_2[17]; // @[el2_lib.scala 242:78] + wire _T_706 = _T_702 | _T_705; // @[el2_lib.scala 242:23] + wire _T_708 = &io_trigger_pkt_any_2_tdata2[17:0]; // @[el2_lib.scala 242:36] + wire _T_709 = _T_708 & _T_583; // @[el2_lib.scala 242:41] + wire _T_712 = io_trigger_pkt_any_2_tdata2[18] == lsu_match_data_2[18]; // @[el2_lib.scala 242:78] + wire _T_713 = _T_709 | _T_712; // @[el2_lib.scala 242:23] + wire _T_715 = &io_trigger_pkt_any_2_tdata2[18:0]; // @[el2_lib.scala 242:36] + wire _T_716 = _T_715 & _T_583; // @[el2_lib.scala 242:41] + wire _T_719 = io_trigger_pkt_any_2_tdata2[19] == lsu_match_data_2[19]; // @[el2_lib.scala 242:78] + wire _T_720 = _T_716 | _T_719; // @[el2_lib.scala 242:23] + wire _T_722 = &io_trigger_pkt_any_2_tdata2[19:0]; // @[el2_lib.scala 242:36] + wire _T_723 = _T_722 & _T_583; // @[el2_lib.scala 242:41] + wire _T_726 = io_trigger_pkt_any_2_tdata2[20] == lsu_match_data_2[20]; // @[el2_lib.scala 242:78] + wire _T_727 = _T_723 | _T_726; // @[el2_lib.scala 242:23] + wire _T_729 = &io_trigger_pkt_any_2_tdata2[20:0]; // @[el2_lib.scala 242:36] + wire _T_730 = _T_729 & _T_583; // @[el2_lib.scala 242:41] + wire _T_733 = io_trigger_pkt_any_2_tdata2[21] == lsu_match_data_2[21]; // @[el2_lib.scala 242:78] + wire _T_734 = _T_730 | _T_733; // @[el2_lib.scala 242:23] + wire _T_736 = &io_trigger_pkt_any_2_tdata2[21:0]; // @[el2_lib.scala 242:36] + wire _T_737 = _T_736 & _T_583; // @[el2_lib.scala 242:41] + wire _T_740 = io_trigger_pkt_any_2_tdata2[22] == lsu_match_data_2[22]; // @[el2_lib.scala 242:78] + wire _T_741 = _T_737 | _T_740; // @[el2_lib.scala 242:23] + wire _T_743 = &io_trigger_pkt_any_2_tdata2[22:0]; // @[el2_lib.scala 242:36] + wire _T_744 = _T_743 & _T_583; // @[el2_lib.scala 242:41] + wire _T_747 = io_trigger_pkt_any_2_tdata2[23] == lsu_match_data_2[23]; // @[el2_lib.scala 242:78] + wire _T_748 = _T_744 | _T_747; // @[el2_lib.scala 242:23] + wire _T_750 = &io_trigger_pkt_any_2_tdata2[23:0]; // @[el2_lib.scala 242:36] + wire _T_751 = _T_750 & _T_583; // @[el2_lib.scala 242:41] + wire _T_754 = io_trigger_pkt_any_2_tdata2[24] == lsu_match_data_2[24]; // @[el2_lib.scala 242:78] + wire _T_755 = _T_751 | _T_754; // @[el2_lib.scala 242:23] + wire _T_757 = &io_trigger_pkt_any_2_tdata2[24:0]; // @[el2_lib.scala 242:36] + wire _T_758 = _T_757 & _T_583; // @[el2_lib.scala 242:41] + wire _T_761 = io_trigger_pkt_any_2_tdata2[25] == lsu_match_data_2[25]; // @[el2_lib.scala 242:78] + wire _T_762 = _T_758 | _T_761; // @[el2_lib.scala 242:23] + wire _T_764 = &io_trigger_pkt_any_2_tdata2[25:0]; // @[el2_lib.scala 242:36] + wire _T_765 = _T_764 & _T_583; // @[el2_lib.scala 242:41] + wire _T_768 = io_trigger_pkt_any_2_tdata2[26] == lsu_match_data_2[26]; // @[el2_lib.scala 242:78] + wire _T_769 = _T_765 | _T_768; // @[el2_lib.scala 242:23] + wire _T_771 = &io_trigger_pkt_any_2_tdata2[26:0]; // @[el2_lib.scala 242:36] + wire _T_772 = _T_771 & _T_583; // @[el2_lib.scala 242:41] + wire _T_775 = io_trigger_pkt_any_2_tdata2[27] == lsu_match_data_2[27]; // @[el2_lib.scala 242:78] + wire _T_776 = _T_772 | _T_775; // @[el2_lib.scala 242:23] + wire _T_778 = &io_trigger_pkt_any_2_tdata2[27:0]; // @[el2_lib.scala 242:36] + wire _T_779 = _T_778 & _T_583; // @[el2_lib.scala 242:41] + wire _T_782 = io_trigger_pkt_any_2_tdata2[28] == lsu_match_data_2[28]; // @[el2_lib.scala 242:78] + wire _T_783 = _T_779 | _T_782; // @[el2_lib.scala 242:23] + wire _T_785 = &io_trigger_pkt_any_2_tdata2[28:0]; // @[el2_lib.scala 242:36] + wire _T_786 = _T_785 & _T_583; // @[el2_lib.scala 242:41] + wire _T_789 = io_trigger_pkt_any_2_tdata2[29] == lsu_match_data_2[29]; // @[el2_lib.scala 242:78] + wire _T_790 = _T_786 | _T_789; // @[el2_lib.scala 242:23] + wire _T_792 = &io_trigger_pkt_any_2_tdata2[29:0]; // @[el2_lib.scala 242:36] + wire _T_793 = _T_792 & _T_583; // @[el2_lib.scala 242:41] + wire _T_796 = io_trigger_pkt_any_2_tdata2[30] == lsu_match_data_2[30]; // @[el2_lib.scala 242:78] + wire _T_797 = _T_793 | _T_796; // @[el2_lib.scala 242:23] + wire _T_799 = &io_trigger_pkt_any_2_tdata2[30:0]; // @[el2_lib.scala 242:36] + wire _T_800 = _T_799 & _T_583; // @[el2_lib.scala 242:41] + wire _T_803 = io_trigger_pkt_any_2_tdata2[31] == lsu_match_data_2[31]; // @[el2_lib.scala 242:78] + wire _T_804 = _T_800 | _T_803; // @[el2_lib.scala 242:23] + wire [7:0] _T_811 = {_T_636,_T_629,_T_622,_T_615,_T_608,_T_601,_T_594,_T_587}; // @[el2_lib.scala 243:14] + wire [15:0] _T_819 = {_T_692,_T_685,_T_678,_T_671,_T_664,_T_657,_T_650,_T_643,_T_811}; // @[el2_lib.scala 243:14] + wire [7:0] _T_826 = {_T_748,_T_741,_T_734,_T_727,_T_720,_T_713,_T_706,_T_699}; // @[el2_lib.scala 243:14] + wire [31:0] _T_835 = {_T_804,_T_797,_T_790,_T_783,_T_776,_T_769,_T_762,_T_755,_T_826,_T_819}; // @[el2_lib.scala 243:14] + wire [31:0] _GEN_2 = {{31'd0}, _T_578}; // @[el2_lsu_trigger.scala 19:87] + wire [31:0] _T_836 = _GEN_2 & _T_835; // @[el2_lsu_trigger.scala 19:87] + wire _T_839 = io_trigger_pkt_any_3_store & io_lsu_pkt_m_store; // @[el2_lsu_trigger.scala 18:121] + wire _T_840 = io_trigger_pkt_any_3_load & io_lsu_pkt_m_load; // @[el2_lsu_trigger.scala 19:33] + wire _T_842 = _T_840 & _T_33; // @[el2_lsu_trigger.scala 19:53] + wire _T_843 = _T_839 | _T_842; // @[el2_lsu_trigger.scala 18:142] + wire _T_844 = _T_40 & _T_843; // @[el2_lsu_trigger.scala 18:89] + wire _T_847 = &io_trigger_pkt_any_3_tdata2; // @[el2_lib.scala 239:45] + wire _T_848 = ~_T_847; // @[el2_lib.scala 239:39] + wire _T_849 = io_trigger_pkt_any_3_match_ & _T_848; // @[el2_lib.scala 239:37] + wire _T_852 = io_trigger_pkt_any_3_tdata2[0] == lsu_match_data_3[0]; // @[el2_lib.scala 240:52] + wire _T_853 = _T_849 | _T_852; // @[el2_lib.scala 240:41] + wire _T_855 = &io_trigger_pkt_any_3_tdata2[0]; // @[el2_lib.scala 242:36] + wire _T_856 = _T_855 & _T_849; // @[el2_lib.scala 242:41] + wire _T_859 = io_trigger_pkt_any_3_tdata2[1] == lsu_match_data_3[1]; // @[el2_lib.scala 242:78] + wire _T_860 = _T_856 | _T_859; // @[el2_lib.scala 242:23] + wire _T_862 = &io_trigger_pkt_any_3_tdata2[1:0]; // @[el2_lib.scala 242:36] + wire _T_863 = _T_862 & _T_849; // @[el2_lib.scala 242:41] + wire _T_866 = io_trigger_pkt_any_3_tdata2[2] == lsu_match_data_3[2]; // @[el2_lib.scala 242:78] + wire _T_867 = _T_863 | _T_866; // @[el2_lib.scala 242:23] + wire _T_869 = &io_trigger_pkt_any_3_tdata2[2:0]; // @[el2_lib.scala 242:36] + wire _T_870 = _T_869 & _T_849; // @[el2_lib.scala 242:41] + wire _T_873 = io_trigger_pkt_any_3_tdata2[3] == lsu_match_data_3[3]; // @[el2_lib.scala 242:78] + wire _T_874 = _T_870 | _T_873; // @[el2_lib.scala 242:23] + wire _T_876 = &io_trigger_pkt_any_3_tdata2[3:0]; // @[el2_lib.scala 242:36] + wire _T_877 = _T_876 & _T_849; // @[el2_lib.scala 242:41] + wire _T_880 = io_trigger_pkt_any_3_tdata2[4] == lsu_match_data_3[4]; // @[el2_lib.scala 242:78] + wire _T_881 = _T_877 | _T_880; // @[el2_lib.scala 242:23] + wire _T_883 = &io_trigger_pkt_any_3_tdata2[4:0]; // @[el2_lib.scala 242:36] + wire _T_884 = _T_883 & _T_849; // @[el2_lib.scala 242:41] + wire _T_887 = io_trigger_pkt_any_3_tdata2[5] == lsu_match_data_3[5]; // @[el2_lib.scala 242:78] + wire _T_888 = _T_884 | _T_887; // @[el2_lib.scala 242:23] + wire _T_890 = &io_trigger_pkt_any_3_tdata2[5:0]; // @[el2_lib.scala 242:36] + wire _T_891 = _T_890 & _T_849; // @[el2_lib.scala 242:41] + wire _T_894 = io_trigger_pkt_any_3_tdata2[6] == lsu_match_data_3[6]; // @[el2_lib.scala 242:78] + wire _T_895 = _T_891 | _T_894; // @[el2_lib.scala 242:23] + wire _T_897 = &io_trigger_pkt_any_3_tdata2[6:0]; // @[el2_lib.scala 242:36] + wire _T_898 = _T_897 & _T_849; // @[el2_lib.scala 242:41] + wire _T_901 = io_trigger_pkt_any_3_tdata2[7] == lsu_match_data_3[7]; // @[el2_lib.scala 242:78] + wire _T_902 = _T_898 | _T_901; // @[el2_lib.scala 242:23] + wire _T_904 = &io_trigger_pkt_any_3_tdata2[7:0]; // @[el2_lib.scala 242:36] + wire _T_905 = _T_904 & _T_849; // @[el2_lib.scala 242:41] + wire _T_908 = io_trigger_pkt_any_3_tdata2[8] == lsu_match_data_3[8]; // @[el2_lib.scala 242:78] + wire _T_909 = _T_905 | _T_908; // @[el2_lib.scala 242:23] + wire _T_911 = &io_trigger_pkt_any_3_tdata2[8:0]; // @[el2_lib.scala 242:36] + wire _T_912 = _T_911 & _T_849; // @[el2_lib.scala 242:41] + wire _T_915 = io_trigger_pkt_any_3_tdata2[9] == lsu_match_data_3[9]; // @[el2_lib.scala 242:78] + wire _T_916 = _T_912 | _T_915; // @[el2_lib.scala 242:23] + wire _T_918 = &io_trigger_pkt_any_3_tdata2[9:0]; // @[el2_lib.scala 242:36] + wire _T_919 = _T_918 & _T_849; // @[el2_lib.scala 242:41] + wire _T_922 = io_trigger_pkt_any_3_tdata2[10] == lsu_match_data_3[10]; // @[el2_lib.scala 242:78] + wire _T_923 = _T_919 | _T_922; // @[el2_lib.scala 242:23] + wire _T_925 = &io_trigger_pkt_any_3_tdata2[10:0]; // @[el2_lib.scala 242:36] + wire _T_926 = _T_925 & _T_849; // @[el2_lib.scala 242:41] + wire _T_929 = io_trigger_pkt_any_3_tdata2[11] == lsu_match_data_3[11]; // @[el2_lib.scala 242:78] + wire _T_930 = _T_926 | _T_929; // @[el2_lib.scala 242:23] + wire _T_932 = &io_trigger_pkt_any_3_tdata2[11:0]; // @[el2_lib.scala 242:36] + wire _T_933 = _T_932 & _T_849; // @[el2_lib.scala 242:41] + wire _T_936 = io_trigger_pkt_any_3_tdata2[12] == lsu_match_data_3[12]; // @[el2_lib.scala 242:78] + wire _T_937 = _T_933 | _T_936; // @[el2_lib.scala 242:23] + wire _T_939 = &io_trigger_pkt_any_3_tdata2[12:0]; // @[el2_lib.scala 242:36] + wire _T_940 = _T_939 & _T_849; // @[el2_lib.scala 242:41] + wire _T_943 = io_trigger_pkt_any_3_tdata2[13] == lsu_match_data_3[13]; // @[el2_lib.scala 242:78] + wire _T_944 = _T_940 | _T_943; // @[el2_lib.scala 242:23] + wire _T_946 = &io_trigger_pkt_any_3_tdata2[13:0]; // @[el2_lib.scala 242:36] + wire _T_947 = _T_946 & _T_849; // @[el2_lib.scala 242:41] + wire _T_950 = io_trigger_pkt_any_3_tdata2[14] == lsu_match_data_3[14]; // @[el2_lib.scala 242:78] + wire _T_951 = _T_947 | _T_950; // @[el2_lib.scala 242:23] + wire _T_953 = &io_trigger_pkt_any_3_tdata2[14:0]; // @[el2_lib.scala 242:36] + wire _T_954 = _T_953 & _T_849; // @[el2_lib.scala 242:41] + wire _T_957 = io_trigger_pkt_any_3_tdata2[15] == lsu_match_data_3[15]; // @[el2_lib.scala 242:78] + wire _T_958 = _T_954 | _T_957; // @[el2_lib.scala 242:23] + wire _T_960 = &io_trigger_pkt_any_3_tdata2[15:0]; // @[el2_lib.scala 242:36] + wire _T_961 = _T_960 & _T_849; // @[el2_lib.scala 242:41] + wire _T_964 = io_trigger_pkt_any_3_tdata2[16] == lsu_match_data_3[16]; // @[el2_lib.scala 242:78] + wire _T_965 = _T_961 | _T_964; // @[el2_lib.scala 242:23] + wire _T_967 = &io_trigger_pkt_any_3_tdata2[16:0]; // @[el2_lib.scala 242:36] + wire _T_968 = _T_967 & _T_849; // @[el2_lib.scala 242:41] + wire _T_971 = io_trigger_pkt_any_3_tdata2[17] == lsu_match_data_3[17]; // @[el2_lib.scala 242:78] + wire _T_972 = _T_968 | _T_971; // @[el2_lib.scala 242:23] + wire _T_974 = &io_trigger_pkt_any_3_tdata2[17:0]; // @[el2_lib.scala 242:36] + wire _T_975 = _T_974 & _T_849; // @[el2_lib.scala 242:41] + wire _T_978 = io_trigger_pkt_any_3_tdata2[18] == lsu_match_data_3[18]; // @[el2_lib.scala 242:78] + wire _T_979 = _T_975 | _T_978; // @[el2_lib.scala 242:23] + wire _T_981 = &io_trigger_pkt_any_3_tdata2[18:0]; // @[el2_lib.scala 242:36] + wire _T_982 = _T_981 & _T_849; // @[el2_lib.scala 242:41] + wire _T_985 = io_trigger_pkt_any_3_tdata2[19] == lsu_match_data_3[19]; // @[el2_lib.scala 242:78] + wire _T_986 = _T_982 | _T_985; // @[el2_lib.scala 242:23] + wire _T_988 = &io_trigger_pkt_any_3_tdata2[19:0]; // @[el2_lib.scala 242:36] + wire _T_989 = _T_988 & _T_849; // @[el2_lib.scala 242:41] + wire _T_992 = io_trigger_pkt_any_3_tdata2[20] == lsu_match_data_3[20]; // @[el2_lib.scala 242:78] + wire _T_993 = _T_989 | _T_992; // @[el2_lib.scala 242:23] + wire _T_995 = &io_trigger_pkt_any_3_tdata2[20:0]; // @[el2_lib.scala 242:36] + wire _T_996 = _T_995 & _T_849; // @[el2_lib.scala 242:41] + wire _T_999 = io_trigger_pkt_any_3_tdata2[21] == lsu_match_data_3[21]; // @[el2_lib.scala 242:78] + wire _T_1000 = _T_996 | _T_999; // @[el2_lib.scala 242:23] + wire _T_1002 = &io_trigger_pkt_any_3_tdata2[21:0]; // @[el2_lib.scala 242:36] + wire _T_1003 = _T_1002 & _T_849; // @[el2_lib.scala 242:41] + wire _T_1006 = io_trigger_pkt_any_3_tdata2[22] == lsu_match_data_3[22]; // @[el2_lib.scala 242:78] + wire _T_1007 = _T_1003 | _T_1006; // @[el2_lib.scala 242:23] + wire _T_1009 = &io_trigger_pkt_any_3_tdata2[22:0]; // @[el2_lib.scala 242:36] + wire _T_1010 = _T_1009 & _T_849; // @[el2_lib.scala 242:41] + wire _T_1013 = io_trigger_pkt_any_3_tdata2[23] == lsu_match_data_3[23]; // @[el2_lib.scala 242:78] + wire _T_1014 = _T_1010 | _T_1013; // @[el2_lib.scala 242:23] + wire _T_1016 = &io_trigger_pkt_any_3_tdata2[23:0]; // @[el2_lib.scala 242:36] + wire _T_1017 = _T_1016 & _T_849; // @[el2_lib.scala 242:41] + wire _T_1020 = io_trigger_pkt_any_3_tdata2[24] == lsu_match_data_3[24]; // @[el2_lib.scala 242:78] + wire _T_1021 = _T_1017 | _T_1020; // @[el2_lib.scala 242:23] + wire _T_1023 = &io_trigger_pkt_any_3_tdata2[24:0]; // @[el2_lib.scala 242:36] + wire _T_1024 = _T_1023 & _T_849; // @[el2_lib.scala 242:41] + wire _T_1027 = io_trigger_pkt_any_3_tdata2[25] == lsu_match_data_3[25]; // @[el2_lib.scala 242:78] + wire _T_1028 = _T_1024 | _T_1027; // @[el2_lib.scala 242:23] + wire _T_1030 = &io_trigger_pkt_any_3_tdata2[25:0]; // @[el2_lib.scala 242:36] + wire _T_1031 = _T_1030 & _T_849; // @[el2_lib.scala 242:41] + wire _T_1034 = io_trigger_pkt_any_3_tdata2[26] == lsu_match_data_3[26]; // @[el2_lib.scala 242:78] + wire _T_1035 = _T_1031 | _T_1034; // @[el2_lib.scala 242:23] + wire _T_1037 = &io_trigger_pkt_any_3_tdata2[26:0]; // @[el2_lib.scala 242:36] + wire _T_1038 = _T_1037 & _T_849; // @[el2_lib.scala 242:41] + wire _T_1041 = io_trigger_pkt_any_3_tdata2[27] == lsu_match_data_3[27]; // @[el2_lib.scala 242:78] + wire _T_1042 = _T_1038 | _T_1041; // @[el2_lib.scala 242:23] + wire _T_1044 = &io_trigger_pkt_any_3_tdata2[27:0]; // @[el2_lib.scala 242:36] + wire _T_1045 = _T_1044 & _T_849; // @[el2_lib.scala 242:41] + wire _T_1048 = io_trigger_pkt_any_3_tdata2[28] == lsu_match_data_3[28]; // @[el2_lib.scala 242:78] + wire _T_1049 = _T_1045 | _T_1048; // @[el2_lib.scala 242:23] + wire _T_1051 = &io_trigger_pkt_any_3_tdata2[28:0]; // @[el2_lib.scala 242:36] + wire _T_1052 = _T_1051 & _T_849; // @[el2_lib.scala 242:41] + wire _T_1055 = io_trigger_pkt_any_3_tdata2[29] == lsu_match_data_3[29]; // @[el2_lib.scala 242:78] + wire _T_1056 = _T_1052 | _T_1055; // @[el2_lib.scala 242:23] + wire _T_1058 = &io_trigger_pkt_any_3_tdata2[29:0]; // @[el2_lib.scala 242:36] + wire _T_1059 = _T_1058 & _T_849; // @[el2_lib.scala 242:41] + wire _T_1062 = io_trigger_pkt_any_3_tdata2[30] == lsu_match_data_3[30]; // @[el2_lib.scala 242:78] + wire _T_1063 = _T_1059 | _T_1062; // @[el2_lib.scala 242:23] + wire _T_1065 = &io_trigger_pkt_any_3_tdata2[30:0]; // @[el2_lib.scala 242:36] + wire _T_1066 = _T_1065 & _T_849; // @[el2_lib.scala 242:41] + wire _T_1069 = io_trigger_pkt_any_3_tdata2[31] == lsu_match_data_3[31]; // @[el2_lib.scala 242:78] + wire _T_1070 = _T_1066 | _T_1069; // @[el2_lib.scala 242:23] + wire [7:0] _T_1077 = {_T_902,_T_895,_T_888,_T_881,_T_874,_T_867,_T_860,_T_853}; // @[el2_lib.scala 243:14] + wire [15:0] _T_1085 = {_T_958,_T_951,_T_944,_T_937,_T_930,_T_923,_T_916,_T_909,_T_1077}; // @[el2_lib.scala 243:14] + wire [7:0] _T_1092 = {_T_1014,_T_1007,_T_1000,_T_993,_T_986,_T_979,_T_972,_T_965}; // @[el2_lib.scala 243:14] + wire [31:0] _T_1101 = {_T_1070,_T_1063,_T_1056,_T_1049,_T_1042,_T_1035,_T_1028,_T_1021,_T_1092,_T_1085}; // @[el2_lib.scala 243:14] + wire [31:0] _GEN_3 = {{31'd0}, _T_844}; // @[el2_lsu_trigger.scala 19:87] + wire [31:0] _T_1102 = _GEN_3 & _T_1101; // @[el2_lsu_trigger.scala 19:87] + wire [127:0] _T_1105 = {_T_1102,_T_836,_T_570,_T_304}; // @[Cat.scala 29:58] + assign io_lsu_trigger_match_m = _T_1105[3:0]; // @[el2_lsu_trigger.scala 18:26] +endmodule +module el2_lsu_clkdomain( + input clock, + input reset, + input io_free_clk, + input io_clk_override, + input io_dma_dccm_req, + input io_ldst_stbuf_reqvld_r, + input io_stbuf_reqvld_any, + input io_stbuf_reqvld_flushed_any, + input io_lsu_busreq_r, + input io_lsu_bus_buffer_pend_any, + input io_lsu_bus_buffer_empty_any, + input io_lsu_stbuf_empty_any, + input io_lsu_bus_clk_en, + input io_lsu_p_valid, + input io_lsu_pkt_d_store, + input io_lsu_pkt_d_valid, + input io_lsu_pkt_m_store, + input io_lsu_pkt_m_valid, + input io_lsu_pkt_r_valid, + output io_lsu_c1_m_clk, + output io_lsu_c1_r_clk, + output io_lsu_c2_m_clk, + output io_lsu_c2_r_clk, + output io_lsu_store_c1_m_clk, + output io_lsu_stbuf_c1_clk, + output io_lsu_bus_ibuf_c1_clk, + output io_lsu_bus_buf_c1_clk, + output io_lsu_busm_clk, + output io_lsu_free_c2_clk, + input io_scan_mode +); +`ifdef RANDOMIZE_REG_INIT + reg [31:0] _RAND_0; + reg [31:0] _RAND_1; + reg [31:0] _RAND_2; + reg [31:0] _RAND_3; +`endif // RANDOMIZE_REG_INIT + wire rvclkhdr_io_l1clk; // @[el2_lib.scala 481:22] + wire rvclkhdr_io_clk; // @[el2_lib.scala 481:22] + wire rvclkhdr_io_en; // @[el2_lib.scala 481:22] + wire rvclkhdr_io_scan_mode; // @[el2_lib.scala 481:22] + wire rvclkhdr_1_io_l1clk; // @[el2_lib.scala 481:22] + wire rvclkhdr_1_io_clk; // @[el2_lib.scala 481:22] + wire rvclkhdr_1_io_en; // @[el2_lib.scala 481:22] + wire rvclkhdr_1_io_scan_mode; // @[el2_lib.scala 481:22] + wire rvclkhdr_2_io_l1clk; // @[el2_lib.scala 481:22] + wire rvclkhdr_2_io_clk; // @[el2_lib.scala 481:22] + wire rvclkhdr_2_io_en; // @[el2_lib.scala 481:22] + wire rvclkhdr_2_io_scan_mode; // @[el2_lib.scala 481:22] + wire rvclkhdr_3_io_l1clk; // @[el2_lib.scala 481:22] + wire rvclkhdr_3_io_clk; // @[el2_lib.scala 481:22] + wire rvclkhdr_3_io_en; // @[el2_lib.scala 481:22] + wire rvclkhdr_3_io_scan_mode; // @[el2_lib.scala 481:22] + wire rvclkhdr_4_io_l1clk; // @[el2_lib.scala 481:22] + wire rvclkhdr_4_io_clk; // @[el2_lib.scala 481:22] + wire rvclkhdr_4_io_en; // @[el2_lib.scala 481:22] + wire rvclkhdr_4_io_scan_mode; // @[el2_lib.scala 481:22] + wire rvclkhdr_5_io_l1clk; // @[el2_lib.scala 481:22] + wire rvclkhdr_5_io_clk; // @[el2_lib.scala 481:22] + wire rvclkhdr_5_io_en; // @[el2_lib.scala 481:22] + wire rvclkhdr_5_io_scan_mode; // @[el2_lib.scala 481:22] + wire rvclkhdr_6_io_l1clk; // @[el2_lib.scala 481:22] + wire rvclkhdr_6_io_clk; // @[el2_lib.scala 481:22] + wire rvclkhdr_6_io_en; // @[el2_lib.scala 481:22] + wire rvclkhdr_6_io_scan_mode; // @[el2_lib.scala 481:22] + wire rvclkhdr_7_io_l1clk; // @[el2_lib.scala 481:22] + wire rvclkhdr_7_io_clk; // @[el2_lib.scala 481:22] + wire rvclkhdr_7_io_en; // @[el2_lib.scala 481:22] + wire rvclkhdr_7_io_scan_mode; // @[el2_lib.scala 481:22] + wire rvclkhdr_8_io_l1clk; // @[el2_lib.scala 481:22] + wire rvclkhdr_8_io_clk; // @[el2_lib.scala 481:22] + wire rvclkhdr_8_io_en; // @[el2_lib.scala 481:22] + wire rvclkhdr_8_io_scan_mode; // @[el2_lib.scala 481:22] + wire rvclkhdr_9_io_l1clk; // @[el2_lib.scala 481:22] + wire rvclkhdr_9_io_clk; // @[el2_lib.scala 481:22] + wire rvclkhdr_9_io_en; // @[el2_lib.scala 481:22] + wire rvclkhdr_9_io_scan_mode; // @[el2_lib.scala 481:22] + wire rvclkhdr_10_io_l1clk; // @[el2_lib.scala 481:22] + wire rvclkhdr_10_io_clk; // @[el2_lib.scala 481:22] + wire rvclkhdr_10_io_en; // @[el2_lib.scala 481:22] + wire rvclkhdr_10_io_scan_mode; // @[el2_lib.scala 481:22] + wire rvclkhdr_11_io_l1clk; // @[el2_lib.scala 481:22] + wire rvclkhdr_11_io_clk; // @[el2_lib.scala 481:22] + wire rvclkhdr_11_io_en; // @[el2_lib.scala 481:22] + wire rvclkhdr_11_io_scan_mode; // @[el2_lib.scala 481:22] + wire _T = io_lsu_p_valid | io_dma_dccm_req; // @[el2_lsu_clkdomain.scala 63:51] + reg lsu_c1_d_clken_q; // @[el2_lsu_clkdomain.scala 82:67] + wire _T_1 = io_lsu_pkt_d_valid | lsu_c1_d_clken_q; // @[el2_lsu_clkdomain.scala 64:51] + wire lsu_c1_m_clken = _T_1 | io_clk_override; // @[el2_lsu_clkdomain.scala 64:70] + reg lsu_c1_m_clken_q; // @[el2_lsu_clkdomain.scala 83:67] + wire _T_2 = io_lsu_pkt_m_valid | lsu_c1_m_clken_q; // @[el2_lsu_clkdomain.scala 65:51] + wire lsu_c1_r_clken = _T_2 | io_clk_override; // @[el2_lsu_clkdomain.scala 65:70] + wire _T_3 = lsu_c1_m_clken | lsu_c1_m_clken_q; // @[el2_lsu_clkdomain.scala 67:47] + reg lsu_c1_r_clken_q; // @[el2_lsu_clkdomain.scala 84:67] + wire _T_4 = lsu_c1_r_clken | lsu_c1_r_clken_q; // @[el2_lsu_clkdomain.scala 68:47] + wire _T_5 = lsu_c1_m_clken & io_lsu_pkt_d_store; // @[el2_lsu_clkdomain.scala 70:49] + wire _T_6 = lsu_c1_r_clken & io_lsu_pkt_m_store; // @[el2_lsu_clkdomain.scala 71:49] + wire _T_7 = io_ldst_stbuf_reqvld_r | io_stbuf_reqvld_any; // @[el2_lsu_clkdomain.scala 72:55] + wire _T_8 = _T_7 | io_stbuf_reqvld_flushed_any; // @[el2_lsu_clkdomain.scala 72:77] + wire _T_9 = io_lsu_bus_buffer_pend_any | io_lsu_busreq_r; // @[el2_lsu_clkdomain.scala 74:61] + wire _T_10 = _T_9 | io_clk_override; // @[el2_lsu_clkdomain.scala 74:79] + wire _T_11 = ~io_lsu_bus_buffer_empty_any; // @[el2_lsu_clkdomain.scala 75:33] + wire _T_12 = _T_11 | io_lsu_busreq_r; // @[el2_lsu_clkdomain.scala 75:62] + wire _T_14 = io_lsu_p_valid | io_lsu_pkt_d_valid; // @[el2_lsu_clkdomain.scala 77:48] + wire _T_15 = _T_14 | io_lsu_pkt_m_valid; // @[el2_lsu_clkdomain.scala 77:69] + wire _T_16 = _T_15 | io_lsu_pkt_r_valid; // @[el2_lsu_clkdomain.scala 77:90] + wire _T_18 = _T_16 | _T_11; // @[el2_lsu_clkdomain.scala 77:112] + wire _T_19 = ~io_lsu_stbuf_empty_any; // @[el2_lsu_clkdomain.scala 77:145] + wire _T_20 = _T_18 | _T_19; // @[el2_lsu_clkdomain.scala 77:143] + wire lsu_free_c1_clken = _T_20 | io_clk_override; // @[el2_lsu_clkdomain.scala 77:169] + reg lsu_free_c1_clken_q; // @[el2_lsu_clkdomain.scala 81:60] + wire _T_21 = lsu_free_c1_clken | lsu_free_c1_clken_q; // @[el2_lsu_clkdomain.scala 78:50] + rvclkhdr rvclkhdr ( // @[el2_lib.scala 481:22] + .io_l1clk(rvclkhdr_io_l1clk), + .io_clk(rvclkhdr_io_clk), + .io_en(rvclkhdr_io_en), + .io_scan_mode(rvclkhdr_io_scan_mode) + ); + rvclkhdr rvclkhdr_1 ( // @[el2_lib.scala 481:22] + .io_l1clk(rvclkhdr_1_io_l1clk), + .io_clk(rvclkhdr_1_io_clk), + .io_en(rvclkhdr_1_io_en), + .io_scan_mode(rvclkhdr_1_io_scan_mode) + ); + rvclkhdr rvclkhdr_2 ( // @[el2_lib.scala 481:22] + .io_l1clk(rvclkhdr_2_io_l1clk), + .io_clk(rvclkhdr_2_io_clk), + .io_en(rvclkhdr_2_io_en), + .io_scan_mode(rvclkhdr_2_io_scan_mode) + ); + rvclkhdr rvclkhdr_3 ( // @[el2_lib.scala 481:22] + .io_l1clk(rvclkhdr_3_io_l1clk), + .io_clk(rvclkhdr_3_io_clk), + .io_en(rvclkhdr_3_io_en), + .io_scan_mode(rvclkhdr_3_io_scan_mode) + ); + rvclkhdr rvclkhdr_4 ( // @[el2_lib.scala 481:22] + .io_l1clk(rvclkhdr_4_io_l1clk), + .io_clk(rvclkhdr_4_io_clk), + .io_en(rvclkhdr_4_io_en), + .io_scan_mode(rvclkhdr_4_io_scan_mode) + ); + rvclkhdr rvclkhdr_5 ( // @[el2_lib.scala 481:22] + .io_l1clk(rvclkhdr_5_io_l1clk), + .io_clk(rvclkhdr_5_io_clk), + .io_en(rvclkhdr_5_io_en), + .io_scan_mode(rvclkhdr_5_io_scan_mode) + ); + rvclkhdr rvclkhdr_6 ( // @[el2_lib.scala 481:22] + .io_l1clk(rvclkhdr_6_io_l1clk), + .io_clk(rvclkhdr_6_io_clk), + .io_en(rvclkhdr_6_io_en), + .io_scan_mode(rvclkhdr_6_io_scan_mode) + ); + rvclkhdr rvclkhdr_7 ( // @[el2_lib.scala 481:22] + .io_l1clk(rvclkhdr_7_io_l1clk), + .io_clk(rvclkhdr_7_io_clk), + .io_en(rvclkhdr_7_io_en), + .io_scan_mode(rvclkhdr_7_io_scan_mode) + ); + rvclkhdr rvclkhdr_8 ( // @[el2_lib.scala 481:22] + .io_l1clk(rvclkhdr_8_io_l1clk), + .io_clk(rvclkhdr_8_io_clk), + .io_en(rvclkhdr_8_io_en), + .io_scan_mode(rvclkhdr_8_io_scan_mode) + ); + rvclkhdr rvclkhdr_9 ( // @[el2_lib.scala 481:22] + .io_l1clk(rvclkhdr_9_io_l1clk), + .io_clk(rvclkhdr_9_io_clk), + .io_en(rvclkhdr_9_io_en), + .io_scan_mode(rvclkhdr_9_io_scan_mode) + ); + rvclkhdr rvclkhdr_10 ( // @[el2_lib.scala 481:22] + .io_l1clk(rvclkhdr_10_io_l1clk), + .io_clk(rvclkhdr_10_io_clk), + .io_en(rvclkhdr_10_io_en), + .io_scan_mode(rvclkhdr_10_io_scan_mode) + ); + rvclkhdr rvclkhdr_11 ( // @[el2_lib.scala 481:22] + .io_l1clk(rvclkhdr_11_io_l1clk), + .io_clk(rvclkhdr_11_io_clk), + .io_en(rvclkhdr_11_io_en), + .io_scan_mode(rvclkhdr_11_io_scan_mode) + ); + assign io_lsu_c1_m_clk = rvclkhdr_io_l1clk; // @[el2_lsu_clkdomain.scala 86:26] + assign io_lsu_c1_r_clk = rvclkhdr_1_io_l1clk; // @[el2_lsu_clkdomain.scala 87:26] + assign io_lsu_c2_m_clk = rvclkhdr_2_io_l1clk; // @[el2_lsu_clkdomain.scala 88:26] + assign io_lsu_c2_r_clk = rvclkhdr_3_io_l1clk; // @[el2_lsu_clkdomain.scala 89:26] + assign io_lsu_store_c1_m_clk = rvclkhdr_4_io_l1clk; // @[el2_lsu_clkdomain.scala 90:26] + assign io_lsu_stbuf_c1_clk = rvclkhdr_6_io_l1clk; // @[el2_lsu_clkdomain.scala 92:26] + assign io_lsu_bus_ibuf_c1_clk = rvclkhdr_7_io_l1clk; // @[el2_lsu_clkdomain.scala 93:26] + assign io_lsu_bus_buf_c1_clk = rvclkhdr_9_io_l1clk; // @[el2_lsu_clkdomain.scala 95:26] + assign io_lsu_busm_clk = rvclkhdr_10_io_l1clk; // @[el2_lsu_clkdomain.scala 96:26] + assign io_lsu_free_c2_clk = rvclkhdr_11_io_l1clk; // @[el2_lsu_clkdomain.scala 97:26] + assign rvclkhdr_io_clk = clock; // @[el2_lib.scala 482:17] + assign rvclkhdr_io_en = _T_1 | io_clk_override; // @[el2_lib.scala 483:16] + assign rvclkhdr_io_scan_mode = io_scan_mode; // @[el2_lib.scala 484:23] + assign rvclkhdr_1_io_clk = clock; // @[el2_lib.scala 482:17] + assign rvclkhdr_1_io_en = _T_2 | io_clk_override; // @[el2_lib.scala 483:16] + assign rvclkhdr_1_io_scan_mode = io_scan_mode; // @[el2_lib.scala 484:23] + assign rvclkhdr_2_io_clk = clock; // @[el2_lib.scala 482:17] + assign rvclkhdr_2_io_en = _T_3 | io_clk_override; // @[el2_lib.scala 483:16] + assign rvclkhdr_2_io_scan_mode = io_scan_mode; // @[el2_lib.scala 484:23] + assign rvclkhdr_3_io_clk = clock; // @[el2_lib.scala 482:17] + assign rvclkhdr_3_io_en = _T_4 | io_clk_override; // @[el2_lib.scala 483:16] + assign rvclkhdr_3_io_scan_mode = io_scan_mode; // @[el2_lib.scala 484:23] + assign rvclkhdr_4_io_clk = clock; // @[el2_lib.scala 482:17] + assign rvclkhdr_4_io_en = _T_5 | io_clk_override; // @[el2_lib.scala 483:16] + assign rvclkhdr_4_io_scan_mode = io_scan_mode; // @[el2_lib.scala 484:23] + assign rvclkhdr_5_io_clk = clock; // @[el2_lib.scala 482:17] + assign rvclkhdr_5_io_en = _T_6 | io_clk_override; // @[el2_lib.scala 483:16] + assign rvclkhdr_5_io_scan_mode = io_scan_mode; // @[el2_lib.scala 484:23] + assign rvclkhdr_6_io_clk = clock; // @[el2_lib.scala 482:17] + assign rvclkhdr_6_io_en = _T_8 | io_clk_override; // @[el2_lib.scala 483:16] + assign rvclkhdr_6_io_scan_mode = io_scan_mode; // @[el2_lib.scala 484:23] + assign rvclkhdr_7_io_clk = clock; // @[el2_lib.scala 482:17] + assign rvclkhdr_7_io_en = io_lsu_busreq_r | io_clk_override; // @[el2_lib.scala 483:16] + assign rvclkhdr_7_io_scan_mode = io_scan_mode; // @[el2_lib.scala 484:23] + assign rvclkhdr_8_io_clk = clock; // @[el2_lib.scala 482:17] + assign rvclkhdr_8_io_en = _T_10 & io_lsu_bus_clk_en; // @[el2_lib.scala 483:16] + assign rvclkhdr_8_io_scan_mode = io_scan_mode; // @[el2_lib.scala 484:23] + assign rvclkhdr_9_io_clk = clock; // @[el2_lib.scala 482:17] + assign rvclkhdr_9_io_en = _T_12 | io_clk_override; // @[el2_lib.scala 483:16] + assign rvclkhdr_9_io_scan_mode = io_scan_mode; // @[el2_lib.scala 484:23] + assign rvclkhdr_10_io_clk = clock; // @[el2_lib.scala 482:17] + assign rvclkhdr_10_io_en = io_lsu_bus_clk_en; // @[el2_lib.scala 483:16] + assign rvclkhdr_10_io_scan_mode = io_scan_mode; // @[el2_lib.scala 484:23] + assign rvclkhdr_11_io_clk = clock; // @[el2_lib.scala 482:17] + assign rvclkhdr_11_io_en = _T_21 | io_clk_override; // @[el2_lib.scala 483:16] + assign rvclkhdr_11_io_scan_mode = io_scan_mode; // @[el2_lib.scala 484:23] +`ifdef RANDOMIZE_GARBAGE_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_INVALID_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_REG_INIT +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_MEM_INIT +`define RANDOMIZE +`endif +`ifndef RANDOM +`define RANDOM $random +`endif +`ifdef RANDOMIZE_MEM_INIT + integer initvar; +`endif +`ifndef SYNTHESIS +`ifdef FIRRTL_BEFORE_INITIAL +`FIRRTL_BEFORE_INITIAL +`endif +initial begin + `ifdef RANDOMIZE + `ifdef INIT_RANDOM + `INIT_RANDOM + `endif + `ifndef VERILATOR + `ifdef RANDOMIZE_DELAY + #`RANDOMIZE_DELAY begin end + `else + #0.002 begin end + `endif + `endif +`ifdef RANDOMIZE_REG_INIT + _RAND_0 = {1{`RANDOM}}; + lsu_c1_d_clken_q = _RAND_0[0:0]; + _RAND_1 = {1{`RANDOM}}; + lsu_c1_m_clken_q = _RAND_1[0:0]; + _RAND_2 = {1{`RANDOM}}; + lsu_c1_r_clken_q = _RAND_2[0:0]; + _RAND_3 = {1{`RANDOM}}; + lsu_free_c1_clken_q = _RAND_3[0:0]; +`endif // RANDOMIZE_REG_INIT + if (reset) begin + lsu_c1_d_clken_q = 1'h0; + end + if (reset) begin + lsu_c1_m_clken_q = 1'h0; + end + if (reset) begin + lsu_c1_r_clken_q = 1'h0; + end + if (reset) begin + lsu_free_c1_clken_q = 1'h0; + end + `endif // RANDOMIZE +end // initial +`ifdef FIRRTL_AFTER_INITIAL +`FIRRTL_AFTER_INITIAL +`endif +`endif // SYNTHESIS + always @(posedge io_lsu_free_c2_clk or posedge reset) begin + if (reset) begin + lsu_c1_d_clken_q <= 1'h0; + end else begin + lsu_c1_d_clken_q <= _T | io_clk_override; + end + end + always @(posedge io_lsu_free_c2_clk or posedge reset) begin + if (reset) begin + lsu_c1_m_clken_q <= 1'h0; + end else begin + lsu_c1_m_clken_q <= _T_1 | io_clk_override; + end + end + always @(posedge io_lsu_free_c2_clk or posedge reset) begin + if (reset) begin + lsu_c1_r_clken_q <= 1'h0; + end else begin + lsu_c1_r_clken_q <= _T_2 | io_clk_override; + end + end + always @(posedge io_free_clk or posedge reset) begin + if (reset) begin + lsu_free_c1_clken_q <= 1'h0; + end else begin + lsu_free_c1_clken_q <= _T_20 | io_clk_override; + end + end +endmodule +module el2_lsu_bus_buffer( + input clock, + input reset, + input io_scan_mode, + input io_dec_tlu_external_ldfwd_disable, + input io_dec_tlu_wb_coalescing_disable, + input io_dec_tlu_sideeffect_posted_disable, + input io_dec_tlu_force_halt, + input io_lsu_c2_r_clk, + input io_lsu_bus_ibuf_c1_clk, + input io_lsu_bus_buf_c1_clk, + input io_lsu_free_c2_clk, + input io_lsu_busm_clk, + input io_dec_lsu_valid_raw_d, + input io_lsu_pkt_m_load, + input io_lsu_pkt_m_valid, + input io_lsu_pkt_r_by, + input io_lsu_pkt_r_half, + input io_lsu_pkt_r_word, + input io_lsu_pkt_r_load, + input io_lsu_pkt_r_store, + input io_lsu_pkt_r_unsign, + input [31:0] io_lsu_addr_m, + input [31:0] io_end_addr_m, + input [31:0] io_lsu_addr_r, + input [31:0] io_end_addr_r, + input [31:0] io_store_data_r, + input io_no_word_merge_r, + input io_no_dword_merge_r, + input io_lsu_busreq_m, + input io_ld_full_hit_m, + input io_flush_m_up, + input io_flush_r, + input io_lsu_commit_r, + input io_is_sideeffects_r, + input io_ldst_dual_d, + input io_ldst_dual_m, + input io_ldst_dual_r, + input [7:0] io_ldst_byteen_ext_m, + input io_lsu_axi_awready, + input io_lsu_axi_wready, + input io_lsu_axi_bvalid, + input [1:0] io_lsu_axi_bresp, + input [2:0] io_lsu_axi_bid, + input io_lsu_axi_arready, + input io_lsu_axi_rvalid, + input [2:0] io_lsu_axi_rid, + input [63:0] io_lsu_axi_rdata, + input io_lsu_bus_clk_en, + input io_lsu_bus_clk_en_q, + output io_lsu_busreq_r, + output io_lsu_bus_buffer_pend_any, + output io_lsu_bus_buffer_full_any, + output io_lsu_bus_buffer_empty_any, + output [3:0] io_ld_byte_hit_buf_lo, + output [3:0] io_ld_byte_hit_buf_hi, + output [31:0] io_ld_fwddata_buf_lo, + output [31:0] io_ld_fwddata_buf_hi, + output io_lsu_imprecise_error_load_any, + output io_lsu_imprecise_error_store_any, + output [31:0] io_lsu_imprecise_error_addr_any, + output io_lsu_nonblock_load_valid_m, + output [1:0] io_lsu_nonblock_load_tag_m, + output io_lsu_nonblock_load_inv_r, + output [1:0] io_lsu_nonblock_load_inv_tag_r, + output io_lsu_nonblock_load_data_valid, + output io_lsu_nonblock_load_data_error, + output [1:0] io_lsu_nonblock_load_data_tag, + output [31:0] io_lsu_nonblock_load_data, + output io_lsu_pmu_bus_trxn, + output io_lsu_pmu_bus_misaligned, + output io_lsu_pmu_bus_error, + output io_lsu_pmu_bus_busy, + output io_lsu_axi_awvalid, + output [2:0] io_lsu_axi_awid, + output [31:0] io_lsu_axi_awaddr, + output [3:0] io_lsu_axi_awregion, + output [2:0] io_lsu_axi_awsize, + output [3:0] io_lsu_axi_awcache, + output io_lsu_axi_wvalid, + output [63:0] io_lsu_axi_wdata, + output [7:0] io_lsu_axi_wstrb, + output io_lsu_axi_bready, + output io_lsu_axi_arvalid, + output [2:0] io_lsu_axi_arid, + output [31:0] io_lsu_axi_araddr, + output [3:0] io_lsu_axi_arregion, + output [2:0] io_lsu_axi_arsize, + output [3:0] io_lsu_axi_arcache, + output io_lsu_axi_rready +); +`ifdef RANDOMIZE_REG_INIT + reg [31:0] _RAND_0; + reg [31:0] _RAND_1; + reg [31:0] _RAND_2; + reg [31:0] _RAND_3; + reg [31:0] _RAND_4; + reg [31:0] _RAND_5; + reg [31:0] _RAND_6; + reg [31:0] _RAND_7; + reg [31:0] _RAND_8; + reg [31:0] _RAND_9; + reg [31:0] _RAND_10; + reg [31:0] _RAND_11; + reg [31:0] _RAND_12; + reg [31:0] _RAND_13; + reg [31:0] _RAND_14; + reg [31:0] _RAND_15; + reg [31:0] _RAND_16; + reg [31:0] _RAND_17; + reg [31:0] _RAND_18; + reg [31:0] _RAND_19; + reg [31:0] _RAND_20; + reg [31:0] _RAND_21; + reg [31:0] _RAND_22; + reg [31:0] _RAND_23; + reg [31:0] _RAND_24; + reg [31:0] _RAND_25; + reg [31:0] _RAND_26; + reg [31:0] _RAND_27; + reg [31:0] _RAND_28; + reg [31:0] _RAND_29; + reg [31:0] _RAND_30; + reg [31:0] _RAND_31; + reg [31:0] _RAND_32; + reg [31:0] _RAND_33; + reg [31:0] _RAND_34; + reg [31:0] _RAND_35; + reg [31:0] _RAND_36; + reg [31:0] _RAND_37; + reg [31:0] _RAND_38; + reg [31:0] _RAND_39; + reg [31:0] _RAND_40; + reg [31:0] _RAND_41; + reg [31:0] _RAND_42; + reg [31:0] _RAND_43; + reg [31:0] _RAND_44; + reg [31:0] _RAND_45; + reg [31:0] _RAND_46; + reg [31:0] _RAND_47; + reg [31:0] _RAND_48; + reg [31:0] _RAND_49; + reg [31:0] _RAND_50; + reg [31:0] _RAND_51; + reg [31:0] _RAND_52; + reg [31:0] _RAND_53; + reg [31:0] _RAND_54; + reg [31:0] _RAND_55; + reg [31:0] _RAND_56; + reg [31:0] _RAND_57; + reg [31:0] _RAND_58; + reg [31:0] _RAND_59; + reg [31:0] _RAND_60; + reg [31:0] _RAND_61; + reg [31:0] _RAND_62; + reg [31:0] _RAND_63; + reg [31:0] _RAND_64; + reg [31:0] _RAND_65; + reg [31:0] _RAND_66; + reg [31:0] _RAND_67; + reg [31:0] _RAND_68; + reg [31:0] _RAND_69; + reg [31:0] _RAND_70; + reg [31:0] _RAND_71; + reg [31:0] _RAND_72; + reg [31:0] _RAND_73; + reg [31:0] _RAND_74; + reg [31:0] _RAND_75; + reg [31:0] _RAND_76; + reg [31:0] _RAND_77; + reg [31:0] _RAND_78; + reg [31:0] _RAND_79; + reg [63:0] _RAND_80; + reg [31:0] _RAND_81; + reg [31:0] _RAND_82; + reg [31:0] _RAND_83; + reg [31:0] _RAND_84; + reg [31:0] _RAND_85; + reg [31:0] _RAND_86; + reg [31:0] _RAND_87; + reg [31:0] _RAND_88; + reg [31:0] _RAND_89; + reg [31:0] _RAND_90; + reg [31:0] _RAND_91; + reg [31:0] _RAND_92; + reg [31:0] _RAND_93; + reg [31:0] _RAND_94; + reg [31:0] _RAND_95; + reg [31:0] _RAND_96; + reg [31:0] _RAND_97; + reg [31:0] _RAND_98; + reg [31:0] _RAND_99; + reg [31:0] _RAND_100; + reg [31:0] _RAND_101; + reg [31:0] _RAND_102; + reg [31:0] _RAND_103; + reg [31:0] _RAND_104; + reg [31:0] _RAND_105; + reg [31:0] _RAND_106; +`endif // RANDOMIZE_REG_INIT + wire rvclkhdr_io_l1clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_io_clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_io_en; // @[el2_lib.scala 506:23] + wire rvclkhdr_io_scan_mode; // @[el2_lib.scala 506:23] + wire rvclkhdr_1_io_l1clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_1_io_clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_1_io_en; // @[el2_lib.scala 506:23] + wire rvclkhdr_1_io_scan_mode; // @[el2_lib.scala 506:23] + wire rvclkhdr_2_io_l1clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_2_io_clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_2_io_en; // @[el2_lib.scala 506:23] + wire rvclkhdr_2_io_scan_mode; // @[el2_lib.scala 506:23] + wire rvclkhdr_3_io_l1clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_3_io_clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_3_io_en; // @[el2_lib.scala 506:23] + wire rvclkhdr_3_io_scan_mode; // @[el2_lib.scala 506:23] + wire rvclkhdr_4_io_l1clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_4_io_clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_4_io_en; // @[el2_lib.scala 506:23] + wire rvclkhdr_4_io_scan_mode; // @[el2_lib.scala 506:23] + wire rvclkhdr_5_io_l1clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_5_io_clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_5_io_en; // @[el2_lib.scala 506:23] + wire rvclkhdr_5_io_scan_mode; // @[el2_lib.scala 506:23] + wire rvclkhdr_6_io_l1clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_6_io_clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_6_io_en; // @[el2_lib.scala 506:23] + wire rvclkhdr_6_io_scan_mode; // @[el2_lib.scala 506:23] + wire rvclkhdr_7_io_l1clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_7_io_clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_7_io_en; // @[el2_lib.scala 506:23] + wire rvclkhdr_7_io_scan_mode; // @[el2_lib.scala 506:23] + wire rvclkhdr_8_io_l1clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_8_io_clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_8_io_en; // @[el2_lib.scala 506:23] + wire rvclkhdr_8_io_scan_mode; // @[el2_lib.scala 506:23] + wire rvclkhdr_9_io_l1clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_9_io_clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_9_io_en; // @[el2_lib.scala 506:23] + wire rvclkhdr_9_io_scan_mode; // @[el2_lib.scala 506:23] + wire rvclkhdr_10_io_l1clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_10_io_clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_10_io_en; // @[el2_lib.scala 506:23] + wire rvclkhdr_10_io_scan_mode; // @[el2_lib.scala 506:23] + wire rvclkhdr_11_io_l1clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_11_io_clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_11_io_en; // @[el2_lib.scala 506:23] + wire rvclkhdr_11_io_scan_mode; // @[el2_lib.scala 506:23] + wire [3:0] ldst_byteen_hi_m = io_ldst_byteen_ext_m[7:4]; // @[el2_lsu_bus_buffer.scala 125:46] + wire [3:0] ldst_byteen_lo_m = io_ldst_byteen_ext_m[3:0]; // @[el2_lsu_bus_buffer.scala 126:46] + reg [31:0] buf_addr_0; // @[el2_lib.scala 512:16] + wire _T_2 = io_lsu_addr_m[31:2] == buf_addr_0[31:2]; // @[el2_lsu_bus_buffer.scala 128:74] + reg _T_4381; // @[Reg.scala 27:20] + reg _T_4378; // @[Reg.scala 27:20] + reg _T_4375; // @[Reg.scala 27:20] + reg _T_4372; // @[Reg.scala 27:20] + wire [3:0] buf_write = {_T_4381,_T_4378,_T_4375,_T_4372}; // @[Cat.scala 29:58] + wire _T_4 = _T_2 & buf_write[0]; // @[el2_lsu_bus_buffer.scala 128:98] + reg [2:0] buf_state_0; // @[Reg.scala 27:20] + wire _T_5 = buf_state_0 != 3'h0; // @[el2_lsu_bus_buffer.scala 128:129] + wire _T_6 = _T_4 & _T_5; // @[el2_lsu_bus_buffer.scala 128:113] + wire ld_addr_hitvec_lo_0 = _T_6 & io_lsu_busreq_m; // @[el2_lsu_bus_buffer.scala 128:141] + reg [31:0] buf_addr_1; // @[el2_lib.scala 512:16] + wire _T_9 = io_lsu_addr_m[31:2] == buf_addr_1[31:2]; // @[el2_lsu_bus_buffer.scala 128:74] + wire _T_11 = _T_9 & buf_write[1]; // @[el2_lsu_bus_buffer.scala 128:98] + reg [2:0] buf_state_1; // @[Reg.scala 27:20] + wire _T_12 = buf_state_1 != 3'h0; // @[el2_lsu_bus_buffer.scala 128:129] + wire _T_13 = _T_11 & _T_12; // @[el2_lsu_bus_buffer.scala 128:113] + wire ld_addr_hitvec_lo_1 = _T_13 & io_lsu_busreq_m; // @[el2_lsu_bus_buffer.scala 128:141] + reg [31:0] buf_addr_2; // @[el2_lib.scala 512:16] + wire _T_16 = io_lsu_addr_m[31:2] == buf_addr_2[31:2]; // @[el2_lsu_bus_buffer.scala 128:74] + wire _T_18 = _T_16 & buf_write[2]; // @[el2_lsu_bus_buffer.scala 128:98] + reg [2:0] buf_state_2; // @[Reg.scala 27:20] + wire _T_19 = buf_state_2 != 3'h0; // @[el2_lsu_bus_buffer.scala 128:129] + wire _T_20 = _T_18 & _T_19; // @[el2_lsu_bus_buffer.scala 128:113] + wire ld_addr_hitvec_lo_2 = _T_20 & io_lsu_busreq_m; // @[el2_lsu_bus_buffer.scala 128:141] + reg [31:0] buf_addr_3; // @[el2_lib.scala 512:16] + wire _T_23 = io_lsu_addr_m[31:2] == buf_addr_3[31:2]; // @[el2_lsu_bus_buffer.scala 128:74] + wire _T_25 = _T_23 & buf_write[3]; // @[el2_lsu_bus_buffer.scala 128:98] + reg [2:0] buf_state_3; // @[Reg.scala 27:20] + wire _T_26 = buf_state_3 != 3'h0; // @[el2_lsu_bus_buffer.scala 128:129] + wire _T_27 = _T_25 & _T_26; // @[el2_lsu_bus_buffer.scala 128:113] + wire ld_addr_hitvec_lo_3 = _T_27 & io_lsu_busreq_m; // @[el2_lsu_bus_buffer.scala 128:141] + wire _T_30 = io_end_addr_m[31:2] == buf_addr_0[31:2]; // @[el2_lsu_bus_buffer.scala 129:74] + wire _T_32 = _T_30 & buf_write[0]; // @[el2_lsu_bus_buffer.scala 129:98] + wire _T_34 = _T_32 & _T_5; // @[el2_lsu_bus_buffer.scala 129:113] + wire ld_addr_hitvec_hi_0 = _T_34 & io_lsu_busreq_m; // @[el2_lsu_bus_buffer.scala 129:141] + wire _T_37 = io_end_addr_m[31:2] == buf_addr_1[31:2]; // @[el2_lsu_bus_buffer.scala 129:74] + wire _T_39 = _T_37 & buf_write[1]; // @[el2_lsu_bus_buffer.scala 129:98] + wire _T_41 = _T_39 & _T_12; // @[el2_lsu_bus_buffer.scala 129:113] + wire ld_addr_hitvec_hi_1 = _T_41 & io_lsu_busreq_m; // @[el2_lsu_bus_buffer.scala 129:141] + wire _T_44 = io_end_addr_m[31:2] == buf_addr_2[31:2]; // @[el2_lsu_bus_buffer.scala 129:74] + wire _T_46 = _T_44 & buf_write[2]; // @[el2_lsu_bus_buffer.scala 129:98] + wire _T_48 = _T_46 & _T_19; // @[el2_lsu_bus_buffer.scala 129:113] + wire ld_addr_hitvec_hi_2 = _T_48 & io_lsu_busreq_m; // @[el2_lsu_bus_buffer.scala 129:141] + wire _T_51 = io_end_addr_m[31:2] == buf_addr_3[31:2]; // @[el2_lsu_bus_buffer.scala 129:74] + wire _T_53 = _T_51 & buf_write[3]; // @[el2_lsu_bus_buffer.scala 129:98] + wire _T_55 = _T_53 & _T_26; // @[el2_lsu_bus_buffer.scala 129:113] + wire ld_addr_hitvec_hi_3 = _T_55 & io_lsu_busreq_m; // @[el2_lsu_bus_buffer.scala 129:141] + reg [3:0] buf_byteen_3; // @[Reg.scala 27:20] + wire _T_99 = ld_addr_hitvec_lo_3 & buf_byteen_3[0]; // @[el2_lsu_bus_buffer.scala 192:95] + wire _T_101 = _T_99 & ldst_byteen_lo_m[0]; // @[el2_lsu_bus_buffer.scala 192:114] + reg [3:0] buf_byteen_2; // @[Reg.scala 27:20] + wire _T_95 = ld_addr_hitvec_lo_2 & buf_byteen_2[0]; // @[el2_lsu_bus_buffer.scala 192:95] + wire _T_97 = _T_95 & ldst_byteen_lo_m[0]; // @[el2_lsu_bus_buffer.scala 192:114] + reg [3:0] buf_byteen_1; // @[Reg.scala 27:20] + wire _T_91 = ld_addr_hitvec_lo_1 & buf_byteen_1[0]; // @[el2_lsu_bus_buffer.scala 192:95] + wire _T_93 = _T_91 & ldst_byteen_lo_m[0]; // @[el2_lsu_bus_buffer.scala 192:114] + reg [3:0] buf_byteen_0; // @[Reg.scala 27:20] + wire _T_87 = ld_addr_hitvec_lo_0 & buf_byteen_0[0]; // @[el2_lsu_bus_buffer.scala 192:95] + wire _T_89 = _T_87 & ldst_byteen_lo_m[0]; // @[el2_lsu_bus_buffer.scala 192:114] + wire [3:0] ld_byte_hitvec_lo_0 = {_T_101,_T_97,_T_93,_T_89}; // @[Cat.scala 29:58] + reg [3:0] buf_ageQ_3; // @[el2_lsu_bus_buffer.scala 551:60] + wire _T_2642 = buf_state_3 == 3'h2; // @[el2_lsu_bus_buffer.scala 463:95] + wire _T_4128 = 3'h0 == buf_state_3; // @[Conditional.scala 37:30] + wire _T_4151 = 3'h1 == buf_state_3; // @[Conditional.scala 37:30] + wire _T_4155 = 3'h2 == buf_state_3; // @[Conditional.scala 37:30] + reg [1:0] _T_1869; // @[Reg.scala 27:20] + wire [2:0] obuf_tag0 = {{1'd0}, _T_1869}; // @[el2_lsu_bus_buffer.scala 403:13] + wire _T_4162 = obuf_tag0 == 3'h3; // @[el2_lsu_bus_buffer.scala 506:48] + reg obuf_merge; // @[Reg.scala 27:20] + reg [1:0] obuf_tag1; // @[Reg.scala 27:20] + wire [2:0] _GEN_350 = {{1'd0}, obuf_tag1}; // @[el2_lsu_bus_buffer.scala 506:104] + wire _T_4163 = _GEN_350 == 3'h3; // @[el2_lsu_bus_buffer.scala 506:104] + wire _T_4164 = obuf_merge & _T_4163; // @[el2_lsu_bus_buffer.scala 506:91] + wire _T_4165 = _T_4162 | _T_4164; // @[el2_lsu_bus_buffer.scala 506:77] + reg obuf_valid; // @[el2_lsu_bus_buffer.scala 397:54] + wire _T_4166 = _T_4165 & obuf_valid; // @[el2_lsu_bus_buffer.scala 506:135] + reg obuf_wr_enQ; // @[el2_lsu_bus_buffer.scala 396:55] + wire _T_4167 = _T_4166 & obuf_wr_enQ; // @[el2_lsu_bus_buffer.scala 506:148] + wire _GEN_280 = _T_4155 & _T_4167; // @[Conditional.scala 39:67] + wire _GEN_293 = _T_4151 ? 1'h0 : _GEN_280; // @[Conditional.scala 39:67] + wire buf_cmd_state_bus_en_3 = _T_4128 ? 1'h0 : _GEN_293; // @[Conditional.scala 40:58] + wire _T_2643 = _T_2642 & buf_cmd_state_bus_en_3; // @[el2_lsu_bus_buffer.scala 463:105] + wire _T_2644 = ~_T_2643; // @[el2_lsu_bus_buffer.scala 463:80] + wire _T_2645 = buf_ageQ_3[3] & _T_2644; // @[el2_lsu_bus_buffer.scala 463:78] + wire _T_2637 = buf_state_2 == 3'h2; // @[el2_lsu_bus_buffer.scala 463:95] + wire _T_3935 = 3'h0 == buf_state_2; // @[Conditional.scala 37:30] + wire _T_3958 = 3'h1 == buf_state_2; // @[Conditional.scala 37:30] + wire _T_3962 = 3'h2 == buf_state_2; // @[Conditional.scala 37:30] + wire _T_3969 = obuf_tag0 == 3'h2; // @[el2_lsu_bus_buffer.scala 506:48] + wire _T_3970 = _GEN_350 == 3'h2; // @[el2_lsu_bus_buffer.scala 506:104] + wire _T_3971 = obuf_merge & _T_3970; // @[el2_lsu_bus_buffer.scala 506:91] + wire _T_3972 = _T_3969 | _T_3971; // @[el2_lsu_bus_buffer.scala 506:77] + wire _T_3973 = _T_3972 & obuf_valid; // @[el2_lsu_bus_buffer.scala 506:135] + wire _T_3974 = _T_3973 & obuf_wr_enQ; // @[el2_lsu_bus_buffer.scala 506:148] + wire _GEN_204 = _T_3962 & _T_3974; // @[Conditional.scala 39:67] + wire _GEN_217 = _T_3958 ? 1'h0 : _GEN_204; // @[Conditional.scala 39:67] + wire buf_cmd_state_bus_en_2 = _T_3935 ? 1'h0 : _GEN_217; // @[Conditional.scala 40:58] + wire _T_2638 = _T_2637 & buf_cmd_state_bus_en_2; // @[el2_lsu_bus_buffer.scala 463:105] + wire _T_2639 = ~_T_2638; // @[el2_lsu_bus_buffer.scala 463:80] + wire _T_2640 = buf_ageQ_3[2] & _T_2639; // @[el2_lsu_bus_buffer.scala 463:78] + wire _T_2632 = buf_state_1 == 3'h2; // @[el2_lsu_bus_buffer.scala 463:95] + wire _T_3742 = 3'h0 == buf_state_1; // @[Conditional.scala 37:30] + wire _T_3765 = 3'h1 == buf_state_1; // @[Conditional.scala 37:30] + wire _T_3769 = 3'h2 == buf_state_1; // @[Conditional.scala 37:30] + wire _T_3776 = obuf_tag0 == 3'h1; // @[el2_lsu_bus_buffer.scala 506:48] + wire _T_3777 = _GEN_350 == 3'h1; // @[el2_lsu_bus_buffer.scala 506:104] + wire _T_3778 = obuf_merge & _T_3777; // @[el2_lsu_bus_buffer.scala 506:91] + wire _T_3779 = _T_3776 | _T_3778; // @[el2_lsu_bus_buffer.scala 506:77] + wire _T_3780 = _T_3779 & obuf_valid; // @[el2_lsu_bus_buffer.scala 506:135] + wire _T_3781 = _T_3780 & obuf_wr_enQ; // @[el2_lsu_bus_buffer.scala 506:148] + wire _GEN_128 = _T_3769 & _T_3781; // @[Conditional.scala 39:67] + wire _GEN_141 = _T_3765 ? 1'h0 : _GEN_128; // @[Conditional.scala 39:67] + wire buf_cmd_state_bus_en_1 = _T_3742 ? 1'h0 : _GEN_141; // @[Conditional.scala 40:58] + wire _T_2633 = _T_2632 & buf_cmd_state_bus_en_1; // @[el2_lsu_bus_buffer.scala 463:105] + wire _T_2634 = ~_T_2633; // @[el2_lsu_bus_buffer.scala 463:80] + wire _T_2635 = buf_ageQ_3[1] & _T_2634; // @[el2_lsu_bus_buffer.scala 463:78] + wire _T_2627 = buf_state_0 == 3'h2; // @[el2_lsu_bus_buffer.scala 463:95] + wire _T_3549 = 3'h0 == buf_state_0; // @[Conditional.scala 37:30] + wire _T_3572 = 3'h1 == buf_state_0; // @[Conditional.scala 37:30] + wire _T_3576 = 3'h2 == buf_state_0; // @[Conditional.scala 37:30] + wire _T_3583 = obuf_tag0 == 3'h0; // @[el2_lsu_bus_buffer.scala 506:48] + wire _T_3584 = _GEN_350 == 3'h0; // @[el2_lsu_bus_buffer.scala 506:104] + wire _T_3585 = obuf_merge & _T_3584; // @[el2_lsu_bus_buffer.scala 506:91] + wire _T_3586 = _T_3583 | _T_3585; // @[el2_lsu_bus_buffer.scala 506:77] + wire _T_3587 = _T_3586 & obuf_valid; // @[el2_lsu_bus_buffer.scala 506:135] + wire _T_3588 = _T_3587 & obuf_wr_enQ; // @[el2_lsu_bus_buffer.scala 506:148] + wire _GEN_52 = _T_3576 & _T_3588; // @[Conditional.scala 39:67] + wire _GEN_65 = _T_3572 ? 1'h0 : _GEN_52; // @[Conditional.scala 39:67] + wire buf_cmd_state_bus_en_0 = _T_3549 ? 1'h0 : _GEN_65; // @[Conditional.scala 40:58] + wire _T_2628 = _T_2627 & buf_cmd_state_bus_en_0; // @[el2_lsu_bus_buffer.scala 463:105] + wire _T_2629 = ~_T_2628; // @[el2_lsu_bus_buffer.scala 463:80] + wire _T_2630 = buf_ageQ_3[0] & _T_2629; // @[el2_lsu_bus_buffer.scala 463:78] + wire [3:0] buf_age_3 = {_T_2645,_T_2640,_T_2635,_T_2630}; // @[Cat.scala 29:58] + wire _T_2744 = ~buf_age_3[2]; // @[el2_lsu_bus_buffer.scala 464:91] + wire _T_2746 = _T_2744 & _T_19; // @[el2_lsu_bus_buffer.scala 464:106] + wire _T_2738 = ~buf_age_3[1]; // @[el2_lsu_bus_buffer.scala 464:91] + wire _T_2740 = _T_2738 & _T_12; // @[el2_lsu_bus_buffer.scala 464:106] + wire _T_2732 = ~buf_age_3[0]; // @[el2_lsu_bus_buffer.scala 464:91] + wire _T_2734 = _T_2732 & _T_5; // @[el2_lsu_bus_buffer.scala 464:106] + wire [3:0] buf_age_younger_3 = {1'h0,_T_2746,_T_2740,_T_2734}; // @[Cat.scala 29:58] + wire [3:0] _T_255 = ld_byte_hitvec_lo_0 & buf_age_younger_3; // @[el2_lsu_bus_buffer.scala 197:122] + wire _T_256 = |_T_255; // @[el2_lsu_bus_buffer.scala 197:144] + wire _T_257 = ~_T_256; // @[el2_lsu_bus_buffer.scala 197:99] + wire _T_258 = ld_byte_hitvec_lo_0[3] & _T_257; // @[el2_lsu_bus_buffer.scala 197:97] + reg [31:0] ibuf_addr; // @[el2_lib.scala 512:16] + wire _T_512 = io_lsu_addr_m[31:2] == ibuf_addr[31:2]; // @[el2_lsu_bus_buffer.scala 203:51] + reg ibuf_write; // @[Reg.scala 27:20] + wire _T_513 = _T_512 & ibuf_write; // @[el2_lsu_bus_buffer.scala 203:73] + reg ibuf_valid; // @[el2_lsu_bus_buffer.scala 290:24] + wire _T_514 = _T_513 & ibuf_valid; // @[el2_lsu_bus_buffer.scala 203:86] + wire ld_addr_ibuf_hit_lo = _T_514 & io_lsu_busreq_m; // @[el2_lsu_bus_buffer.scala 203:99] + wire [3:0] _T_521 = ld_addr_ibuf_hit_lo ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] + reg [3:0] ibuf_byteen; // @[Reg.scala 27:20] + wire [3:0] _T_522 = _T_521 & ibuf_byteen; // @[el2_lsu_bus_buffer.scala 208:55] + wire [3:0] ld_byte_ibuf_hit_lo = _T_522 & ldst_byteen_lo_m; // @[el2_lsu_bus_buffer.scala 208:69] + wire _T_260 = ~ld_byte_ibuf_hit_lo[0]; // @[el2_lsu_bus_buffer.scala 197:150] + wire _T_261 = _T_258 & _T_260; // @[el2_lsu_bus_buffer.scala 197:148] + reg [3:0] buf_ageQ_2; // @[el2_lsu_bus_buffer.scala 551:60] + wire _T_2622 = buf_ageQ_2[3] & _T_2644; // @[el2_lsu_bus_buffer.scala 463:78] + wire _T_2617 = buf_ageQ_2[2] & _T_2639; // @[el2_lsu_bus_buffer.scala 463:78] + wire _T_2612 = buf_ageQ_2[1] & _T_2634; // @[el2_lsu_bus_buffer.scala 463:78] + wire _T_2607 = buf_ageQ_2[0] & _T_2629; // @[el2_lsu_bus_buffer.scala 463:78] + wire [3:0] buf_age_2 = {_T_2622,_T_2617,_T_2612,_T_2607}; // @[Cat.scala 29:58] + wire _T_2723 = ~buf_age_2[3]; // @[el2_lsu_bus_buffer.scala 464:91] + wire _T_2725 = _T_2723 & _T_26; // @[el2_lsu_bus_buffer.scala 464:106] + wire _T_2711 = ~buf_age_2[1]; // @[el2_lsu_bus_buffer.scala 464:91] + wire _T_2713 = _T_2711 & _T_12; // @[el2_lsu_bus_buffer.scala 464:106] + wire _T_2705 = ~buf_age_2[0]; // @[el2_lsu_bus_buffer.scala 464:91] + wire _T_2707 = _T_2705 & _T_5; // @[el2_lsu_bus_buffer.scala 464:106] + wire [3:0] buf_age_younger_2 = {_T_2725,1'h0,_T_2713,_T_2707}; // @[Cat.scala 29:58] + wire [3:0] _T_247 = ld_byte_hitvec_lo_0 & buf_age_younger_2; // @[el2_lsu_bus_buffer.scala 197:122] + wire _T_248 = |_T_247; // @[el2_lsu_bus_buffer.scala 197:144] + wire _T_249 = ~_T_248; // @[el2_lsu_bus_buffer.scala 197:99] + wire _T_250 = ld_byte_hitvec_lo_0[2] & _T_249; // @[el2_lsu_bus_buffer.scala 197:97] + wire _T_253 = _T_250 & _T_260; // @[el2_lsu_bus_buffer.scala 197:148] + reg [3:0] buf_ageQ_1; // @[el2_lsu_bus_buffer.scala 551:60] + wire _T_2599 = buf_ageQ_1[3] & _T_2644; // @[el2_lsu_bus_buffer.scala 463:78] + wire _T_2594 = buf_ageQ_1[2] & _T_2639; // @[el2_lsu_bus_buffer.scala 463:78] + wire _T_2589 = buf_ageQ_1[1] & _T_2634; // @[el2_lsu_bus_buffer.scala 463:78] + wire _T_2584 = buf_ageQ_1[0] & _T_2629; // @[el2_lsu_bus_buffer.scala 463:78] + wire [3:0] buf_age_1 = {_T_2599,_T_2594,_T_2589,_T_2584}; // @[Cat.scala 29:58] + wire _T_2696 = ~buf_age_1[3]; // @[el2_lsu_bus_buffer.scala 464:91] + wire _T_2698 = _T_2696 & _T_26; // @[el2_lsu_bus_buffer.scala 464:106] + wire _T_2690 = ~buf_age_1[2]; // @[el2_lsu_bus_buffer.scala 464:91] + wire _T_2692 = _T_2690 & _T_19; // @[el2_lsu_bus_buffer.scala 464:106] + wire _T_2678 = ~buf_age_1[0]; // @[el2_lsu_bus_buffer.scala 464:91] + wire _T_2680 = _T_2678 & _T_5; // @[el2_lsu_bus_buffer.scala 464:106] + wire [3:0] buf_age_younger_1 = {_T_2698,_T_2692,1'h0,_T_2680}; // @[Cat.scala 29:58] + wire [3:0] _T_239 = ld_byte_hitvec_lo_0 & buf_age_younger_1; // @[el2_lsu_bus_buffer.scala 197:122] + wire _T_240 = |_T_239; // @[el2_lsu_bus_buffer.scala 197:144] + wire _T_241 = ~_T_240; // @[el2_lsu_bus_buffer.scala 197:99] + wire _T_242 = ld_byte_hitvec_lo_0[1] & _T_241; // @[el2_lsu_bus_buffer.scala 197:97] + wire _T_245 = _T_242 & _T_260; // @[el2_lsu_bus_buffer.scala 197:148] + reg [3:0] buf_ageQ_0; // @[el2_lsu_bus_buffer.scala 551:60] + wire _T_2576 = buf_ageQ_0[3] & _T_2644; // @[el2_lsu_bus_buffer.scala 463:78] + wire _T_2571 = buf_ageQ_0[2] & _T_2639; // @[el2_lsu_bus_buffer.scala 463:78] + wire _T_2566 = buf_ageQ_0[1] & _T_2634; // @[el2_lsu_bus_buffer.scala 463:78] + wire _T_2561 = buf_ageQ_0[0] & _T_2629; // @[el2_lsu_bus_buffer.scala 463:78] + wire [3:0] buf_age_0 = {_T_2576,_T_2571,_T_2566,_T_2561}; // @[Cat.scala 29:58] + wire _T_2669 = ~buf_age_0[3]; // @[el2_lsu_bus_buffer.scala 464:91] + wire _T_2671 = _T_2669 & _T_26; // @[el2_lsu_bus_buffer.scala 464:106] + wire _T_2663 = ~buf_age_0[2]; // @[el2_lsu_bus_buffer.scala 464:91] + wire _T_2665 = _T_2663 & _T_19; // @[el2_lsu_bus_buffer.scala 464:106] + wire _T_2657 = ~buf_age_0[1]; // @[el2_lsu_bus_buffer.scala 464:91] + wire _T_2659 = _T_2657 & _T_12; // @[el2_lsu_bus_buffer.scala 464:106] + wire [3:0] buf_age_younger_0 = {_T_2671,_T_2665,_T_2659,1'h0}; // @[Cat.scala 29:58] + wire [3:0] _T_231 = ld_byte_hitvec_lo_0 & buf_age_younger_0; // @[el2_lsu_bus_buffer.scala 197:122] + wire _T_232 = |_T_231; // @[el2_lsu_bus_buffer.scala 197:144] + wire _T_233 = ~_T_232; // @[el2_lsu_bus_buffer.scala 197:99] + wire _T_234 = ld_byte_hitvec_lo_0[0] & _T_233; // @[el2_lsu_bus_buffer.scala 197:97] + wire _T_237 = _T_234 & _T_260; // @[el2_lsu_bus_buffer.scala 197:148] + wire [3:0] ld_byte_hitvecfn_lo_0 = {_T_261,_T_253,_T_245,_T_237}; // @[Cat.scala 29:58] + wire _T_56 = |ld_byte_hitvecfn_lo_0; // @[el2_lsu_bus_buffer.scala 189:73] + wire _T_58 = _T_56 | ld_byte_ibuf_hit_lo[0]; // @[el2_lsu_bus_buffer.scala 189:77] + wire _T_117 = ld_addr_hitvec_lo_3 & buf_byteen_3[1]; // @[el2_lsu_bus_buffer.scala 192:95] + wire _T_119 = _T_117 & ldst_byteen_lo_m[1]; // @[el2_lsu_bus_buffer.scala 192:114] + wire _T_113 = ld_addr_hitvec_lo_2 & buf_byteen_2[1]; // @[el2_lsu_bus_buffer.scala 192:95] + wire _T_115 = _T_113 & ldst_byteen_lo_m[1]; // @[el2_lsu_bus_buffer.scala 192:114] + wire _T_109 = ld_addr_hitvec_lo_1 & buf_byteen_1[1]; // @[el2_lsu_bus_buffer.scala 192:95] + wire _T_111 = _T_109 & ldst_byteen_lo_m[1]; // @[el2_lsu_bus_buffer.scala 192:114] + wire _T_105 = ld_addr_hitvec_lo_0 & buf_byteen_0[1]; // @[el2_lsu_bus_buffer.scala 192:95] + wire _T_107 = _T_105 & ldst_byteen_lo_m[1]; // @[el2_lsu_bus_buffer.scala 192:114] + wire [3:0] ld_byte_hitvec_lo_1 = {_T_119,_T_115,_T_111,_T_107}; // @[Cat.scala 29:58] + wire [3:0] _T_290 = ld_byte_hitvec_lo_1 & buf_age_younger_3; // @[el2_lsu_bus_buffer.scala 197:122] + wire _T_291 = |_T_290; // @[el2_lsu_bus_buffer.scala 197:144] + wire _T_292 = ~_T_291; // @[el2_lsu_bus_buffer.scala 197:99] + wire _T_293 = ld_byte_hitvec_lo_1[3] & _T_292; // @[el2_lsu_bus_buffer.scala 197:97] + wire _T_295 = ~ld_byte_ibuf_hit_lo[1]; // @[el2_lsu_bus_buffer.scala 197:150] + wire _T_296 = _T_293 & _T_295; // @[el2_lsu_bus_buffer.scala 197:148] + wire [3:0] _T_282 = ld_byte_hitvec_lo_1 & buf_age_younger_2; // @[el2_lsu_bus_buffer.scala 197:122] + wire _T_283 = |_T_282; // @[el2_lsu_bus_buffer.scala 197:144] + wire _T_284 = ~_T_283; // @[el2_lsu_bus_buffer.scala 197:99] + wire _T_285 = ld_byte_hitvec_lo_1[2] & _T_284; // @[el2_lsu_bus_buffer.scala 197:97] + wire _T_288 = _T_285 & _T_295; // @[el2_lsu_bus_buffer.scala 197:148] + wire [3:0] _T_274 = ld_byte_hitvec_lo_1 & buf_age_younger_1; // @[el2_lsu_bus_buffer.scala 197:122] + wire _T_275 = |_T_274; // @[el2_lsu_bus_buffer.scala 197:144] + wire _T_276 = ~_T_275; // @[el2_lsu_bus_buffer.scala 197:99] + wire _T_277 = ld_byte_hitvec_lo_1[1] & _T_276; // @[el2_lsu_bus_buffer.scala 197:97] + wire _T_280 = _T_277 & _T_295; // @[el2_lsu_bus_buffer.scala 197:148] + wire [3:0] _T_266 = ld_byte_hitvec_lo_1 & buf_age_younger_0; // @[el2_lsu_bus_buffer.scala 197:122] + wire _T_267 = |_T_266; // @[el2_lsu_bus_buffer.scala 197:144] + wire _T_268 = ~_T_267; // @[el2_lsu_bus_buffer.scala 197:99] + wire _T_269 = ld_byte_hitvec_lo_1[0] & _T_268; // @[el2_lsu_bus_buffer.scala 197:97] + wire _T_272 = _T_269 & _T_295; // @[el2_lsu_bus_buffer.scala 197:148] + wire [3:0] ld_byte_hitvecfn_lo_1 = {_T_296,_T_288,_T_280,_T_272}; // @[Cat.scala 29:58] + wire _T_59 = |ld_byte_hitvecfn_lo_1; // @[el2_lsu_bus_buffer.scala 189:73] + wire _T_61 = _T_59 | ld_byte_ibuf_hit_lo[1]; // @[el2_lsu_bus_buffer.scala 189:77] + wire _T_135 = ld_addr_hitvec_lo_3 & buf_byteen_3[2]; // @[el2_lsu_bus_buffer.scala 192:95] + wire _T_137 = _T_135 & ldst_byteen_lo_m[2]; // @[el2_lsu_bus_buffer.scala 192:114] + wire _T_131 = ld_addr_hitvec_lo_2 & buf_byteen_2[2]; // @[el2_lsu_bus_buffer.scala 192:95] + wire _T_133 = _T_131 & ldst_byteen_lo_m[2]; // @[el2_lsu_bus_buffer.scala 192:114] + wire _T_127 = ld_addr_hitvec_lo_1 & buf_byteen_1[2]; // @[el2_lsu_bus_buffer.scala 192:95] + wire _T_129 = _T_127 & ldst_byteen_lo_m[2]; // @[el2_lsu_bus_buffer.scala 192:114] + wire _T_123 = ld_addr_hitvec_lo_0 & buf_byteen_0[2]; // @[el2_lsu_bus_buffer.scala 192:95] + wire _T_125 = _T_123 & ldst_byteen_lo_m[2]; // @[el2_lsu_bus_buffer.scala 192:114] + wire [3:0] ld_byte_hitvec_lo_2 = {_T_137,_T_133,_T_129,_T_125}; // @[Cat.scala 29:58] + wire [3:0] _T_325 = ld_byte_hitvec_lo_2 & buf_age_younger_3; // @[el2_lsu_bus_buffer.scala 197:122] + wire _T_326 = |_T_325; // @[el2_lsu_bus_buffer.scala 197:144] + wire _T_327 = ~_T_326; // @[el2_lsu_bus_buffer.scala 197:99] + wire _T_328 = ld_byte_hitvec_lo_2[3] & _T_327; // @[el2_lsu_bus_buffer.scala 197:97] + wire _T_330 = ~ld_byte_ibuf_hit_lo[2]; // @[el2_lsu_bus_buffer.scala 197:150] + wire _T_331 = _T_328 & _T_330; // @[el2_lsu_bus_buffer.scala 197:148] + wire [3:0] _T_317 = ld_byte_hitvec_lo_2 & buf_age_younger_2; // @[el2_lsu_bus_buffer.scala 197:122] + wire _T_318 = |_T_317; // @[el2_lsu_bus_buffer.scala 197:144] + wire _T_319 = ~_T_318; // @[el2_lsu_bus_buffer.scala 197:99] + wire _T_320 = ld_byte_hitvec_lo_2[2] & _T_319; // @[el2_lsu_bus_buffer.scala 197:97] + wire _T_323 = _T_320 & _T_330; // @[el2_lsu_bus_buffer.scala 197:148] + wire [3:0] _T_309 = ld_byte_hitvec_lo_2 & buf_age_younger_1; // @[el2_lsu_bus_buffer.scala 197:122] + wire _T_310 = |_T_309; // @[el2_lsu_bus_buffer.scala 197:144] + wire _T_311 = ~_T_310; // @[el2_lsu_bus_buffer.scala 197:99] + wire _T_312 = ld_byte_hitvec_lo_2[1] & _T_311; // @[el2_lsu_bus_buffer.scala 197:97] + wire _T_315 = _T_312 & _T_330; // @[el2_lsu_bus_buffer.scala 197:148] + wire [3:0] _T_301 = ld_byte_hitvec_lo_2 & buf_age_younger_0; // @[el2_lsu_bus_buffer.scala 197:122] + wire _T_302 = |_T_301; // @[el2_lsu_bus_buffer.scala 197:144] + wire _T_303 = ~_T_302; // @[el2_lsu_bus_buffer.scala 197:99] + wire _T_304 = ld_byte_hitvec_lo_2[0] & _T_303; // @[el2_lsu_bus_buffer.scala 197:97] + wire _T_307 = _T_304 & _T_330; // @[el2_lsu_bus_buffer.scala 197:148] + wire [3:0] ld_byte_hitvecfn_lo_2 = {_T_331,_T_323,_T_315,_T_307}; // @[Cat.scala 29:58] + wire _T_62 = |ld_byte_hitvecfn_lo_2; // @[el2_lsu_bus_buffer.scala 189:73] + wire _T_64 = _T_62 | ld_byte_ibuf_hit_lo[2]; // @[el2_lsu_bus_buffer.scala 189:77] + wire _T_153 = ld_addr_hitvec_lo_3 & buf_byteen_3[3]; // @[el2_lsu_bus_buffer.scala 192:95] + wire _T_155 = _T_153 & ldst_byteen_lo_m[3]; // @[el2_lsu_bus_buffer.scala 192:114] + wire _T_149 = ld_addr_hitvec_lo_2 & buf_byteen_2[3]; // @[el2_lsu_bus_buffer.scala 192:95] + wire _T_151 = _T_149 & ldst_byteen_lo_m[3]; // @[el2_lsu_bus_buffer.scala 192:114] + wire _T_145 = ld_addr_hitvec_lo_1 & buf_byteen_1[3]; // @[el2_lsu_bus_buffer.scala 192:95] + wire _T_147 = _T_145 & ldst_byteen_lo_m[3]; // @[el2_lsu_bus_buffer.scala 192:114] + wire _T_141 = ld_addr_hitvec_lo_0 & buf_byteen_0[3]; // @[el2_lsu_bus_buffer.scala 192:95] + wire _T_143 = _T_141 & ldst_byteen_lo_m[3]; // @[el2_lsu_bus_buffer.scala 192:114] + wire [3:0] ld_byte_hitvec_lo_3 = {_T_155,_T_151,_T_147,_T_143}; // @[Cat.scala 29:58] + wire [3:0] _T_360 = ld_byte_hitvec_lo_3 & buf_age_younger_3; // @[el2_lsu_bus_buffer.scala 197:122] + wire _T_361 = |_T_360; // @[el2_lsu_bus_buffer.scala 197:144] + wire _T_362 = ~_T_361; // @[el2_lsu_bus_buffer.scala 197:99] + wire _T_363 = ld_byte_hitvec_lo_3[3] & _T_362; // @[el2_lsu_bus_buffer.scala 197:97] + wire _T_365 = ~ld_byte_ibuf_hit_lo[3]; // @[el2_lsu_bus_buffer.scala 197:150] + wire _T_366 = _T_363 & _T_365; // @[el2_lsu_bus_buffer.scala 197:148] + wire [3:0] _T_352 = ld_byte_hitvec_lo_3 & buf_age_younger_2; // @[el2_lsu_bus_buffer.scala 197:122] + wire _T_353 = |_T_352; // @[el2_lsu_bus_buffer.scala 197:144] + wire _T_354 = ~_T_353; // @[el2_lsu_bus_buffer.scala 197:99] + wire _T_355 = ld_byte_hitvec_lo_3[2] & _T_354; // @[el2_lsu_bus_buffer.scala 197:97] + wire _T_358 = _T_355 & _T_365; // @[el2_lsu_bus_buffer.scala 197:148] + wire [3:0] _T_344 = ld_byte_hitvec_lo_3 & buf_age_younger_1; // @[el2_lsu_bus_buffer.scala 197:122] + wire _T_345 = |_T_344; // @[el2_lsu_bus_buffer.scala 197:144] + wire _T_346 = ~_T_345; // @[el2_lsu_bus_buffer.scala 197:99] + wire _T_347 = ld_byte_hitvec_lo_3[1] & _T_346; // @[el2_lsu_bus_buffer.scala 197:97] + wire _T_350 = _T_347 & _T_365; // @[el2_lsu_bus_buffer.scala 197:148] + wire [3:0] _T_336 = ld_byte_hitvec_lo_3 & buf_age_younger_0; // @[el2_lsu_bus_buffer.scala 197:122] + wire _T_337 = |_T_336; // @[el2_lsu_bus_buffer.scala 197:144] + wire _T_338 = ~_T_337; // @[el2_lsu_bus_buffer.scala 197:99] + wire _T_339 = ld_byte_hitvec_lo_3[0] & _T_338; // @[el2_lsu_bus_buffer.scala 197:97] + wire _T_342 = _T_339 & _T_365; // @[el2_lsu_bus_buffer.scala 197:148] + wire [3:0] ld_byte_hitvecfn_lo_3 = {_T_366,_T_358,_T_350,_T_342}; // @[Cat.scala 29:58] + wire _T_65 = |ld_byte_hitvecfn_lo_3; // @[el2_lsu_bus_buffer.scala 189:73] + wire _T_67 = _T_65 | ld_byte_ibuf_hit_lo[3]; // @[el2_lsu_bus_buffer.scala 189:77] + wire [2:0] _T_69 = {_T_67,_T_64,_T_61}; // @[Cat.scala 29:58] + wire _T_171 = ld_addr_hitvec_hi_3 & buf_byteen_3[0]; // @[el2_lsu_bus_buffer.scala 193:95] + wire _T_173 = _T_171 & ldst_byteen_hi_m[0]; // @[el2_lsu_bus_buffer.scala 193:114] + wire _T_167 = ld_addr_hitvec_hi_2 & buf_byteen_2[0]; // @[el2_lsu_bus_buffer.scala 193:95] + wire _T_169 = _T_167 & ldst_byteen_hi_m[0]; // @[el2_lsu_bus_buffer.scala 193:114] + wire _T_163 = ld_addr_hitvec_hi_1 & buf_byteen_1[0]; // @[el2_lsu_bus_buffer.scala 193:95] + wire _T_165 = _T_163 & ldst_byteen_hi_m[0]; // @[el2_lsu_bus_buffer.scala 193:114] + wire _T_159 = ld_addr_hitvec_hi_0 & buf_byteen_0[0]; // @[el2_lsu_bus_buffer.scala 193:95] + wire _T_161 = _T_159 & ldst_byteen_hi_m[0]; // @[el2_lsu_bus_buffer.scala 193:114] + wire [3:0] ld_byte_hitvec_hi_0 = {_T_173,_T_169,_T_165,_T_161}; // @[Cat.scala 29:58] + wire [3:0] _T_395 = ld_byte_hitvec_hi_0 & buf_age_younger_3; // @[el2_lsu_bus_buffer.scala 198:122] + wire _T_396 = |_T_395; // @[el2_lsu_bus_buffer.scala 198:144] + wire _T_397 = ~_T_396; // @[el2_lsu_bus_buffer.scala 198:99] + wire _T_398 = ld_byte_hitvec_hi_0[3] & _T_397; // @[el2_lsu_bus_buffer.scala 198:97] + wire _T_517 = io_end_addr_m[31:2] == ibuf_addr[31:2]; // @[el2_lsu_bus_buffer.scala 204:51] + wire _T_518 = _T_517 & ibuf_write; // @[el2_lsu_bus_buffer.scala 204:73] + wire _T_519 = _T_518 & ibuf_valid; // @[el2_lsu_bus_buffer.scala 204:86] + wire ld_addr_ibuf_hit_hi = _T_519 & io_lsu_busreq_m; // @[el2_lsu_bus_buffer.scala 204:99] + wire [3:0] _T_525 = ld_addr_ibuf_hit_hi ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] + wire [3:0] _T_526 = _T_525 & ibuf_byteen; // @[el2_lsu_bus_buffer.scala 209:55] + wire [3:0] ld_byte_ibuf_hit_hi = _T_526 & ldst_byteen_hi_m; // @[el2_lsu_bus_buffer.scala 209:69] + wire _T_400 = ~ld_byte_ibuf_hit_hi[0]; // @[el2_lsu_bus_buffer.scala 198:150] + wire _T_401 = _T_398 & _T_400; // @[el2_lsu_bus_buffer.scala 198:148] + wire [3:0] _T_387 = ld_byte_hitvec_hi_0 & buf_age_younger_2; // @[el2_lsu_bus_buffer.scala 198:122] + wire _T_388 = |_T_387; // @[el2_lsu_bus_buffer.scala 198:144] + wire _T_389 = ~_T_388; // @[el2_lsu_bus_buffer.scala 198:99] + wire _T_390 = ld_byte_hitvec_hi_0[2] & _T_389; // @[el2_lsu_bus_buffer.scala 198:97] + wire _T_393 = _T_390 & _T_400; // @[el2_lsu_bus_buffer.scala 198:148] + wire [3:0] _T_379 = ld_byte_hitvec_hi_0 & buf_age_younger_1; // @[el2_lsu_bus_buffer.scala 198:122] + wire _T_380 = |_T_379; // @[el2_lsu_bus_buffer.scala 198:144] + wire _T_381 = ~_T_380; // @[el2_lsu_bus_buffer.scala 198:99] + wire _T_382 = ld_byte_hitvec_hi_0[1] & _T_381; // @[el2_lsu_bus_buffer.scala 198:97] + wire _T_385 = _T_382 & _T_400; // @[el2_lsu_bus_buffer.scala 198:148] + wire [3:0] _T_371 = ld_byte_hitvec_hi_0 & buf_age_younger_0; // @[el2_lsu_bus_buffer.scala 198:122] + wire _T_372 = |_T_371; // @[el2_lsu_bus_buffer.scala 198:144] + wire _T_373 = ~_T_372; // @[el2_lsu_bus_buffer.scala 198:99] + wire _T_374 = ld_byte_hitvec_hi_0[0] & _T_373; // @[el2_lsu_bus_buffer.scala 198:97] + wire _T_377 = _T_374 & _T_400; // @[el2_lsu_bus_buffer.scala 198:148] + wire [3:0] ld_byte_hitvecfn_hi_0 = {_T_401,_T_393,_T_385,_T_377}; // @[Cat.scala 29:58] + wire _T_71 = |ld_byte_hitvecfn_hi_0; // @[el2_lsu_bus_buffer.scala 190:73] + wire _T_73 = _T_71 | ld_byte_ibuf_hit_hi[0]; // @[el2_lsu_bus_buffer.scala 190:77] + wire _T_189 = ld_addr_hitvec_hi_3 & buf_byteen_3[1]; // @[el2_lsu_bus_buffer.scala 193:95] + wire _T_191 = _T_189 & ldst_byteen_hi_m[1]; // @[el2_lsu_bus_buffer.scala 193:114] + wire _T_185 = ld_addr_hitvec_hi_2 & buf_byteen_2[1]; // @[el2_lsu_bus_buffer.scala 193:95] + wire _T_187 = _T_185 & ldst_byteen_hi_m[1]; // @[el2_lsu_bus_buffer.scala 193:114] + wire _T_181 = ld_addr_hitvec_hi_1 & buf_byteen_1[1]; // @[el2_lsu_bus_buffer.scala 193:95] + wire _T_183 = _T_181 & ldst_byteen_hi_m[1]; // @[el2_lsu_bus_buffer.scala 193:114] + wire _T_177 = ld_addr_hitvec_hi_0 & buf_byteen_0[1]; // @[el2_lsu_bus_buffer.scala 193:95] + wire _T_179 = _T_177 & ldst_byteen_hi_m[1]; // @[el2_lsu_bus_buffer.scala 193:114] + wire [3:0] ld_byte_hitvec_hi_1 = {_T_191,_T_187,_T_183,_T_179}; // @[Cat.scala 29:58] + wire [3:0] _T_430 = ld_byte_hitvec_hi_1 & buf_age_younger_3; // @[el2_lsu_bus_buffer.scala 198:122] + wire _T_431 = |_T_430; // @[el2_lsu_bus_buffer.scala 198:144] + wire _T_432 = ~_T_431; // @[el2_lsu_bus_buffer.scala 198:99] + wire _T_433 = ld_byte_hitvec_hi_1[3] & _T_432; // @[el2_lsu_bus_buffer.scala 198:97] + wire _T_435 = ~ld_byte_ibuf_hit_hi[1]; // @[el2_lsu_bus_buffer.scala 198:150] + wire _T_436 = _T_433 & _T_435; // @[el2_lsu_bus_buffer.scala 198:148] + wire [3:0] _T_422 = ld_byte_hitvec_hi_1 & buf_age_younger_2; // @[el2_lsu_bus_buffer.scala 198:122] + wire _T_423 = |_T_422; // @[el2_lsu_bus_buffer.scala 198:144] + wire _T_424 = ~_T_423; // @[el2_lsu_bus_buffer.scala 198:99] + wire _T_425 = ld_byte_hitvec_hi_1[2] & _T_424; // @[el2_lsu_bus_buffer.scala 198:97] + wire _T_428 = _T_425 & _T_435; // @[el2_lsu_bus_buffer.scala 198:148] + wire [3:0] _T_414 = ld_byte_hitvec_hi_1 & buf_age_younger_1; // @[el2_lsu_bus_buffer.scala 198:122] + wire _T_415 = |_T_414; // @[el2_lsu_bus_buffer.scala 198:144] + wire _T_416 = ~_T_415; // @[el2_lsu_bus_buffer.scala 198:99] + wire _T_417 = ld_byte_hitvec_hi_1[1] & _T_416; // @[el2_lsu_bus_buffer.scala 198:97] + wire _T_420 = _T_417 & _T_435; // @[el2_lsu_bus_buffer.scala 198:148] + wire [3:0] _T_406 = ld_byte_hitvec_hi_1 & buf_age_younger_0; // @[el2_lsu_bus_buffer.scala 198:122] + wire _T_407 = |_T_406; // @[el2_lsu_bus_buffer.scala 198:144] + wire _T_408 = ~_T_407; // @[el2_lsu_bus_buffer.scala 198:99] + wire _T_409 = ld_byte_hitvec_hi_1[0] & _T_408; // @[el2_lsu_bus_buffer.scala 198:97] + wire _T_412 = _T_409 & _T_435; // @[el2_lsu_bus_buffer.scala 198:148] + wire [3:0] ld_byte_hitvecfn_hi_1 = {_T_436,_T_428,_T_420,_T_412}; // @[Cat.scala 29:58] + wire _T_74 = |ld_byte_hitvecfn_hi_1; // @[el2_lsu_bus_buffer.scala 190:73] + wire _T_76 = _T_74 | ld_byte_ibuf_hit_hi[1]; // @[el2_lsu_bus_buffer.scala 190:77] + wire _T_207 = ld_addr_hitvec_hi_3 & buf_byteen_3[2]; // @[el2_lsu_bus_buffer.scala 193:95] + wire _T_209 = _T_207 & ldst_byteen_hi_m[2]; // @[el2_lsu_bus_buffer.scala 193:114] + wire _T_203 = ld_addr_hitvec_hi_2 & buf_byteen_2[2]; // @[el2_lsu_bus_buffer.scala 193:95] + wire _T_205 = _T_203 & ldst_byteen_hi_m[2]; // @[el2_lsu_bus_buffer.scala 193:114] + wire _T_199 = ld_addr_hitvec_hi_1 & buf_byteen_1[2]; // @[el2_lsu_bus_buffer.scala 193:95] + wire _T_201 = _T_199 & ldst_byteen_hi_m[2]; // @[el2_lsu_bus_buffer.scala 193:114] + wire _T_195 = ld_addr_hitvec_hi_0 & buf_byteen_0[2]; // @[el2_lsu_bus_buffer.scala 193:95] + wire _T_197 = _T_195 & ldst_byteen_hi_m[2]; // @[el2_lsu_bus_buffer.scala 193:114] + wire [3:0] ld_byte_hitvec_hi_2 = {_T_209,_T_205,_T_201,_T_197}; // @[Cat.scala 29:58] + wire [3:0] _T_465 = ld_byte_hitvec_hi_2 & buf_age_younger_3; // @[el2_lsu_bus_buffer.scala 198:122] + wire _T_466 = |_T_465; // @[el2_lsu_bus_buffer.scala 198:144] + wire _T_467 = ~_T_466; // @[el2_lsu_bus_buffer.scala 198:99] + wire _T_468 = ld_byte_hitvec_hi_2[3] & _T_467; // @[el2_lsu_bus_buffer.scala 198:97] + wire _T_470 = ~ld_byte_ibuf_hit_hi[2]; // @[el2_lsu_bus_buffer.scala 198:150] + wire _T_471 = _T_468 & _T_470; // @[el2_lsu_bus_buffer.scala 198:148] + wire [3:0] _T_457 = ld_byte_hitvec_hi_2 & buf_age_younger_2; // @[el2_lsu_bus_buffer.scala 198:122] + wire _T_458 = |_T_457; // @[el2_lsu_bus_buffer.scala 198:144] + wire _T_459 = ~_T_458; // @[el2_lsu_bus_buffer.scala 198:99] + wire _T_460 = ld_byte_hitvec_hi_2[2] & _T_459; // @[el2_lsu_bus_buffer.scala 198:97] + wire _T_463 = _T_460 & _T_470; // @[el2_lsu_bus_buffer.scala 198:148] + wire [3:0] _T_449 = ld_byte_hitvec_hi_2 & buf_age_younger_1; // @[el2_lsu_bus_buffer.scala 198:122] + wire _T_450 = |_T_449; // @[el2_lsu_bus_buffer.scala 198:144] + wire _T_451 = ~_T_450; // @[el2_lsu_bus_buffer.scala 198:99] + wire _T_452 = ld_byte_hitvec_hi_2[1] & _T_451; // @[el2_lsu_bus_buffer.scala 198:97] + wire _T_455 = _T_452 & _T_470; // @[el2_lsu_bus_buffer.scala 198:148] + wire [3:0] _T_441 = ld_byte_hitvec_hi_2 & buf_age_younger_0; // @[el2_lsu_bus_buffer.scala 198:122] + wire _T_442 = |_T_441; // @[el2_lsu_bus_buffer.scala 198:144] + wire _T_443 = ~_T_442; // @[el2_lsu_bus_buffer.scala 198:99] + wire _T_444 = ld_byte_hitvec_hi_2[0] & _T_443; // @[el2_lsu_bus_buffer.scala 198:97] + wire _T_447 = _T_444 & _T_470; // @[el2_lsu_bus_buffer.scala 198:148] + wire [3:0] ld_byte_hitvecfn_hi_2 = {_T_471,_T_463,_T_455,_T_447}; // @[Cat.scala 29:58] + wire _T_77 = |ld_byte_hitvecfn_hi_2; // @[el2_lsu_bus_buffer.scala 190:73] + wire _T_79 = _T_77 | ld_byte_ibuf_hit_hi[2]; // @[el2_lsu_bus_buffer.scala 190:77] + wire _T_225 = ld_addr_hitvec_hi_3 & buf_byteen_3[3]; // @[el2_lsu_bus_buffer.scala 193:95] + wire _T_227 = _T_225 & ldst_byteen_hi_m[3]; // @[el2_lsu_bus_buffer.scala 193:114] + wire _T_221 = ld_addr_hitvec_hi_2 & buf_byteen_2[3]; // @[el2_lsu_bus_buffer.scala 193:95] + wire _T_223 = _T_221 & ldst_byteen_hi_m[3]; // @[el2_lsu_bus_buffer.scala 193:114] + wire _T_217 = ld_addr_hitvec_hi_1 & buf_byteen_1[3]; // @[el2_lsu_bus_buffer.scala 193:95] + wire _T_219 = _T_217 & ldst_byteen_hi_m[3]; // @[el2_lsu_bus_buffer.scala 193:114] + wire _T_213 = ld_addr_hitvec_hi_0 & buf_byteen_0[3]; // @[el2_lsu_bus_buffer.scala 193:95] + wire _T_215 = _T_213 & ldst_byteen_hi_m[3]; // @[el2_lsu_bus_buffer.scala 193:114] + wire [3:0] ld_byte_hitvec_hi_3 = {_T_227,_T_223,_T_219,_T_215}; // @[Cat.scala 29:58] + wire [3:0] _T_500 = ld_byte_hitvec_hi_3 & buf_age_younger_3; // @[el2_lsu_bus_buffer.scala 198:122] + wire _T_501 = |_T_500; // @[el2_lsu_bus_buffer.scala 198:144] + wire _T_502 = ~_T_501; // @[el2_lsu_bus_buffer.scala 198:99] + wire _T_503 = ld_byte_hitvec_hi_3[3] & _T_502; // @[el2_lsu_bus_buffer.scala 198:97] + wire _T_505 = ~ld_byte_ibuf_hit_hi[3]; // @[el2_lsu_bus_buffer.scala 198:150] + wire _T_506 = _T_503 & _T_505; // @[el2_lsu_bus_buffer.scala 198:148] + wire [3:0] _T_492 = ld_byte_hitvec_hi_3 & buf_age_younger_2; // @[el2_lsu_bus_buffer.scala 198:122] + wire _T_493 = |_T_492; // @[el2_lsu_bus_buffer.scala 198:144] + wire _T_494 = ~_T_493; // @[el2_lsu_bus_buffer.scala 198:99] + wire _T_495 = ld_byte_hitvec_hi_3[2] & _T_494; // @[el2_lsu_bus_buffer.scala 198:97] + wire _T_498 = _T_495 & _T_505; // @[el2_lsu_bus_buffer.scala 198:148] + wire [3:0] _T_484 = ld_byte_hitvec_hi_3 & buf_age_younger_1; // @[el2_lsu_bus_buffer.scala 198:122] + wire _T_485 = |_T_484; // @[el2_lsu_bus_buffer.scala 198:144] + wire _T_486 = ~_T_485; // @[el2_lsu_bus_buffer.scala 198:99] + wire _T_487 = ld_byte_hitvec_hi_3[1] & _T_486; // @[el2_lsu_bus_buffer.scala 198:97] + wire _T_490 = _T_487 & _T_505; // @[el2_lsu_bus_buffer.scala 198:148] + wire [3:0] _T_476 = ld_byte_hitvec_hi_3 & buf_age_younger_0; // @[el2_lsu_bus_buffer.scala 198:122] + wire _T_477 = |_T_476; // @[el2_lsu_bus_buffer.scala 198:144] + wire _T_478 = ~_T_477; // @[el2_lsu_bus_buffer.scala 198:99] + wire _T_479 = ld_byte_hitvec_hi_3[0] & _T_478; // @[el2_lsu_bus_buffer.scala 198:97] + wire _T_482 = _T_479 & _T_505; // @[el2_lsu_bus_buffer.scala 198:148] + wire [3:0] ld_byte_hitvecfn_hi_3 = {_T_506,_T_498,_T_490,_T_482}; // @[Cat.scala 29:58] + wire _T_80 = |ld_byte_hitvecfn_hi_3; // @[el2_lsu_bus_buffer.scala 190:73] + wire _T_82 = _T_80 | ld_byte_ibuf_hit_hi[3]; // @[el2_lsu_bus_buffer.scala 190:77] + wire [2:0] _T_84 = {_T_82,_T_79,_T_76}; // @[Cat.scala 29:58] + wire [7:0] _T_530 = ld_byte_ibuf_hit_lo[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_533 = ld_byte_ibuf_hit_lo[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_536 = ld_byte_ibuf_hit_lo[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_539 = ld_byte_ibuf_hit_lo[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [31:0] ld_fwddata_buf_lo_initial = {_T_539,_T_536,_T_533,_T_530}; // @[Cat.scala 29:58] + wire [7:0] _T_544 = ld_byte_ibuf_hit_hi[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_547 = ld_byte_ibuf_hit_hi[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_550 = ld_byte_ibuf_hit_hi[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_553 = ld_byte_ibuf_hit_hi[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [31:0] ld_fwddata_buf_hi_initial = {_T_553,_T_550,_T_547,_T_544}; // @[Cat.scala 29:58] + wire [7:0] _T_558 = ld_byte_hitvecfn_lo_3[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + reg [31:0] buf_data_0; // @[el2_lib.scala 512:16] + wire [7:0] _T_560 = _T_558 & buf_data_0[31:24]; // @[el2_lsu_bus_buffer.scala 216:91] + wire [7:0] _T_563 = ld_byte_hitvecfn_lo_3[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + reg [31:0] buf_data_1; // @[el2_lib.scala 512:16] + wire [7:0] _T_565 = _T_563 & buf_data_1[31:24]; // @[el2_lsu_bus_buffer.scala 216:91] + wire [7:0] _T_568 = ld_byte_hitvecfn_lo_3[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + reg [31:0] buf_data_2; // @[el2_lib.scala 512:16] + wire [7:0] _T_570 = _T_568 & buf_data_2[31:24]; // @[el2_lsu_bus_buffer.scala 216:91] + wire [7:0] _T_573 = ld_byte_hitvecfn_lo_3[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + reg [31:0] buf_data_3; // @[el2_lib.scala 512:16] + wire [7:0] _T_575 = _T_573 & buf_data_3[31:24]; // @[el2_lsu_bus_buffer.scala 216:91] + wire [7:0] _T_576 = _T_560 | _T_565; // @[el2_lsu_bus_buffer.scala 216:123] + wire [7:0] _T_577 = _T_576 | _T_570; // @[el2_lsu_bus_buffer.scala 216:123] + wire [7:0] _T_578 = _T_577 | _T_575; // @[el2_lsu_bus_buffer.scala 216:123] + wire [7:0] _T_581 = ld_byte_hitvecfn_lo_2[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_583 = _T_581 & buf_data_0[23:16]; // @[el2_lsu_bus_buffer.scala 217:91] + wire [7:0] _T_586 = ld_byte_hitvecfn_lo_2[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_588 = _T_586 & buf_data_1[23:16]; // @[el2_lsu_bus_buffer.scala 217:91] + wire [7:0] _T_591 = ld_byte_hitvecfn_lo_2[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_593 = _T_591 & buf_data_2[23:16]; // @[el2_lsu_bus_buffer.scala 217:91] + wire [7:0] _T_596 = ld_byte_hitvecfn_lo_2[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_598 = _T_596 & buf_data_3[23:16]; // @[el2_lsu_bus_buffer.scala 217:91] + wire [7:0] _T_599 = _T_583 | _T_588; // @[el2_lsu_bus_buffer.scala 217:123] + wire [7:0] _T_600 = _T_599 | _T_593; // @[el2_lsu_bus_buffer.scala 217:123] + wire [7:0] _T_601 = _T_600 | _T_598; // @[el2_lsu_bus_buffer.scala 217:123] + wire [7:0] _T_604 = ld_byte_hitvecfn_lo_1[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_606 = _T_604 & buf_data_0[15:8]; // @[el2_lsu_bus_buffer.scala 218:91] + wire [7:0] _T_609 = ld_byte_hitvecfn_lo_1[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_611 = _T_609 & buf_data_1[15:8]; // @[el2_lsu_bus_buffer.scala 218:91] + wire [7:0] _T_614 = ld_byte_hitvecfn_lo_1[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_616 = _T_614 & buf_data_2[15:8]; // @[el2_lsu_bus_buffer.scala 218:91] + wire [7:0] _T_619 = ld_byte_hitvecfn_lo_1[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_621 = _T_619 & buf_data_3[15:8]; // @[el2_lsu_bus_buffer.scala 218:91] + wire [7:0] _T_622 = _T_606 | _T_611; // @[el2_lsu_bus_buffer.scala 218:123] + wire [7:0] _T_623 = _T_622 | _T_616; // @[el2_lsu_bus_buffer.scala 218:123] + wire [7:0] _T_624 = _T_623 | _T_621; // @[el2_lsu_bus_buffer.scala 218:123] + wire [7:0] _T_627 = ld_byte_hitvecfn_lo_0[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_629 = _T_627 & buf_data_0[7:0]; // @[el2_lsu_bus_buffer.scala 219:91] + wire [7:0] _T_632 = ld_byte_hitvecfn_lo_0[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_634 = _T_632 & buf_data_1[7:0]; // @[el2_lsu_bus_buffer.scala 219:91] + wire [7:0] _T_637 = ld_byte_hitvecfn_lo_0[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_639 = _T_637 & buf_data_2[7:0]; // @[el2_lsu_bus_buffer.scala 219:91] + wire [7:0] _T_642 = ld_byte_hitvecfn_lo_0[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_644 = _T_642 & buf_data_3[7:0]; // @[el2_lsu_bus_buffer.scala 219:91] + wire [7:0] _T_645 = _T_629 | _T_634; // @[el2_lsu_bus_buffer.scala 219:123] + wire [7:0] _T_646 = _T_645 | _T_639; // @[el2_lsu_bus_buffer.scala 219:123] + wire [7:0] _T_647 = _T_646 | _T_644; // @[el2_lsu_bus_buffer.scala 219:123] + wire [31:0] _T_650 = {_T_578,_T_601,_T_624,_T_647}; // @[Cat.scala 29:58] + reg [31:0] ibuf_data; // @[el2_lib.scala 512:16] + wire [31:0] _T_651 = ld_fwddata_buf_lo_initial & ibuf_data; // @[el2_lsu_bus_buffer.scala 220:32] + wire [7:0] _T_655 = ld_byte_hitvecfn_hi_3[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_657 = _T_655 & buf_data_0[31:24]; // @[el2_lsu_bus_buffer.scala 222:91] + wire [7:0] _T_660 = ld_byte_hitvecfn_hi_3[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_662 = _T_660 & buf_data_1[31:24]; // @[el2_lsu_bus_buffer.scala 222:91] + wire [7:0] _T_665 = ld_byte_hitvecfn_hi_3[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_667 = _T_665 & buf_data_2[31:24]; // @[el2_lsu_bus_buffer.scala 222:91] + wire [7:0] _T_670 = ld_byte_hitvecfn_hi_3[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_672 = _T_670 & buf_data_3[31:24]; // @[el2_lsu_bus_buffer.scala 222:91] + wire [7:0] _T_673 = _T_657 | _T_662; // @[el2_lsu_bus_buffer.scala 222:123] + wire [7:0] _T_674 = _T_673 | _T_667; // @[el2_lsu_bus_buffer.scala 222:123] + wire [7:0] _T_675 = _T_674 | _T_672; // @[el2_lsu_bus_buffer.scala 222:123] + wire [7:0] _T_678 = ld_byte_hitvecfn_hi_2[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_680 = _T_678 & buf_data_0[23:16]; // @[el2_lsu_bus_buffer.scala 223:91] + wire [7:0] _T_683 = ld_byte_hitvecfn_hi_2[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_685 = _T_683 & buf_data_1[23:16]; // @[el2_lsu_bus_buffer.scala 223:91] + wire [7:0] _T_688 = ld_byte_hitvecfn_hi_2[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_690 = _T_688 & buf_data_2[23:16]; // @[el2_lsu_bus_buffer.scala 223:91] + wire [7:0] _T_693 = ld_byte_hitvecfn_hi_2[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_695 = _T_693 & buf_data_3[23:16]; // @[el2_lsu_bus_buffer.scala 223:91] + wire [7:0] _T_696 = _T_680 | _T_685; // @[el2_lsu_bus_buffer.scala 223:123] + wire [7:0] _T_697 = _T_696 | _T_690; // @[el2_lsu_bus_buffer.scala 223:123] + wire [7:0] _T_698 = _T_697 | _T_695; // @[el2_lsu_bus_buffer.scala 223:123] + wire [7:0] _T_701 = ld_byte_hitvecfn_hi_1[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_703 = _T_701 & buf_data_0[15:8]; // @[el2_lsu_bus_buffer.scala 224:91] + wire [7:0] _T_706 = ld_byte_hitvecfn_hi_1[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_708 = _T_706 & buf_data_1[15:8]; // @[el2_lsu_bus_buffer.scala 224:91] + wire [7:0] _T_711 = ld_byte_hitvecfn_hi_1[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_713 = _T_711 & buf_data_2[15:8]; // @[el2_lsu_bus_buffer.scala 224:91] + wire [7:0] _T_716 = ld_byte_hitvecfn_hi_1[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_718 = _T_716 & buf_data_3[15:8]; // @[el2_lsu_bus_buffer.scala 224:91] + wire [7:0] _T_719 = _T_703 | _T_708; // @[el2_lsu_bus_buffer.scala 224:123] + wire [7:0] _T_720 = _T_719 | _T_713; // @[el2_lsu_bus_buffer.scala 224:123] + wire [7:0] _T_721 = _T_720 | _T_718; // @[el2_lsu_bus_buffer.scala 224:123] + wire [7:0] _T_724 = ld_byte_hitvecfn_hi_0[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_726 = _T_724 & buf_data_0[7:0]; // @[el2_lsu_bus_buffer.scala 225:91] + wire [7:0] _T_729 = ld_byte_hitvecfn_hi_0[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_731 = _T_729 & buf_data_1[7:0]; // @[el2_lsu_bus_buffer.scala 225:91] + wire [7:0] _T_734 = ld_byte_hitvecfn_hi_0[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_736 = _T_734 & buf_data_2[7:0]; // @[el2_lsu_bus_buffer.scala 225:91] + wire [7:0] _T_739 = ld_byte_hitvecfn_hi_0[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_741 = _T_739 & buf_data_3[7:0]; // @[el2_lsu_bus_buffer.scala 225:91] + wire [7:0] _T_742 = _T_726 | _T_731; // @[el2_lsu_bus_buffer.scala 225:123] + wire [7:0] _T_743 = _T_742 | _T_736; // @[el2_lsu_bus_buffer.scala 225:123] + wire [7:0] _T_744 = _T_743 | _T_741; // @[el2_lsu_bus_buffer.scala 225:123] + wire [31:0] _T_747 = {_T_675,_T_698,_T_721,_T_744}; // @[Cat.scala 29:58] + wire [31:0] _T_748 = ld_fwddata_buf_hi_initial & ibuf_data; // @[el2_lsu_bus_buffer.scala 226:32] + wire [3:0] _T_750 = io_lsu_pkt_r_by ? 4'h1 : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_751 = io_lsu_pkt_r_half ? 4'h3 : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_752 = io_lsu_pkt_r_word ? 4'hf : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_753 = _T_750 | _T_751; // @[Mux.scala 27:72] + wire [3:0] ldst_byteen_r = _T_753 | _T_752; // @[Mux.scala 27:72] + wire _T_756 = io_lsu_addr_r[1:0] == 2'h0; // @[el2_lsu_bus_buffer.scala 233:55] + wire _T_758 = io_lsu_addr_r[1:0] == 2'h1; // @[el2_lsu_bus_buffer.scala 234:55] + wire [3:0] _T_760 = {3'h0,ldst_byteen_r[3]}; // @[Cat.scala 29:58] + wire _T_762 = io_lsu_addr_r[1:0] == 2'h2; // @[el2_lsu_bus_buffer.scala 235:55] + wire [3:0] _T_764 = {2'h0,ldst_byteen_r[3:2]}; // @[Cat.scala 29:58] + wire _T_766 = io_lsu_addr_r[1:0] == 2'h3; // @[el2_lsu_bus_buffer.scala 236:55] + wire [3:0] _T_768 = {1'h0,ldst_byteen_r[3:1]}; // @[Cat.scala 29:58] + wire [3:0] _T_770 = _T_758 ? _T_760 : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_771 = _T_762 ? _T_764 : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_772 = _T_766 ? _T_768 : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_774 = _T_770 | _T_771; // @[Mux.scala 27:72] + wire [3:0] ldst_byteen_hi_r = _T_774 | _T_772; // @[Mux.scala 27:72] + wire [3:0] _T_781 = {ldst_byteen_r[2:0],1'h0}; // @[Cat.scala 29:58] + wire [3:0] _T_785 = {ldst_byteen_r[1:0],2'h0}; // @[Cat.scala 29:58] + wire [3:0] _T_789 = {ldst_byteen_r[0],3'h0}; // @[Cat.scala 29:58] + wire [3:0] _T_790 = _T_756 ? ldst_byteen_r : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_791 = _T_758 ? _T_781 : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_792 = _T_762 ? _T_785 : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_793 = _T_766 ? _T_789 : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_794 = _T_790 | _T_791; // @[Mux.scala 27:72] + wire [3:0] _T_795 = _T_794 | _T_792; // @[Mux.scala 27:72] + wire [3:0] ldst_byteen_lo_r = _T_795 | _T_793; // @[Mux.scala 27:72] + wire [31:0] _T_802 = {8'h0,io_store_data_r[31:8]}; // @[Cat.scala 29:58] + wire [31:0] _T_806 = {16'h0,io_store_data_r[31:16]}; // @[Cat.scala 29:58] + wire [31:0] _T_810 = {24'h0,io_store_data_r[31:24]}; // @[Cat.scala 29:58] + wire [31:0] _T_812 = _T_758 ? _T_802 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_813 = _T_762 ? _T_806 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_814 = _T_766 ? _T_810 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_816 = _T_812 | _T_813; // @[Mux.scala 27:72] + wire [31:0] store_data_hi_r = _T_816 | _T_814; // @[Mux.scala 27:72] + wire [31:0] _T_823 = {io_store_data_r[23:0],8'h0}; // @[Cat.scala 29:58] + wire [31:0] _T_827 = {io_store_data_r[15:0],16'h0}; // @[Cat.scala 29:58] + wire [31:0] _T_831 = {io_store_data_r[7:0],24'h0}; // @[Cat.scala 29:58] + wire [31:0] _T_832 = _T_756 ? io_store_data_r : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_833 = _T_758 ? _T_823 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_834 = _T_762 ? _T_827 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_835 = _T_766 ? _T_831 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_836 = _T_832 | _T_833; // @[Mux.scala 27:72] + wire [31:0] _T_837 = _T_836 | _T_834; // @[Mux.scala 27:72] + wire [31:0] store_data_lo_r = _T_837 | _T_835; // @[Mux.scala 27:72] + wire ldst_samedw_r = io_lsu_addr_r[3] == io_end_addr_r[3]; // @[el2_lsu_bus_buffer.scala 253:40] + wire _T_844 = ~io_lsu_addr_r[0]; // @[el2_lsu_bus_buffer.scala 255:26] + wire _T_845 = io_lsu_pkt_r_word & _T_756; // @[Mux.scala 27:72] + wire _T_846 = io_lsu_pkt_r_half & _T_844; // @[Mux.scala 27:72] + wire _T_848 = _T_845 | _T_846; // @[Mux.scala 27:72] + wire is_aligned_r = _T_848 | io_lsu_pkt_r_by; // @[Mux.scala 27:72] + wire _T_850 = io_lsu_pkt_r_load | io_no_word_merge_r; // @[el2_lsu_bus_buffer.scala 257:55] + wire _T_851 = io_lsu_busreq_r & _T_850; // @[el2_lsu_bus_buffer.scala 257:34] + wire _T_852 = ~ibuf_valid; // @[el2_lsu_bus_buffer.scala 257:79] + wire ibuf_byp = _T_851 & _T_852; // @[el2_lsu_bus_buffer.scala 257:77] + wire _T_853 = io_lsu_busreq_r & io_lsu_commit_r; // @[el2_lsu_bus_buffer.scala 258:36] + wire _T_854 = ~ibuf_byp; // @[el2_lsu_bus_buffer.scala 258:56] + wire ibuf_wr_en = _T_853 & _T_854; // @[el2_lsu_bus_buffer.scala 258:54] + wire _T_855 = ~ibuf_wr_en; // @[el2_lsu_bus_buffer.scala 260:36] + reg [2:0] ibuf_timer; // @[el2_lsu_bus_buffer.scala 303:59] + wire _T_864 = ibuf_timer == 3'h7; // @[el2_lsu_bus_buffer.scala 266:62] + wire _T_865 = ibuf_wr_en | _T_864; // @[el2_lsu_bus_buffer.scala 266:48] + wire _T_929 = _T_853 & io_lsu_pkt_r_store; // @[el2_lsu_bus_buffer.scala 285:54] + wire _T_930 = _T_929 & ibuf_valid; // @[el2_lsu_bus_buffer.scala 285:75] + wire _T_931 = _T_930 & ibuf_write; // @[el2_lsu_bus_buffer.scala 285:88] + wire _T_934 = io_lsu_addr_r[31:2] == ibuf_addr[31:2]; // @[el2_lsu_bus_buffer.scala 285:124] + wire _T_935 = _T_931 & _T_934; // @[el2_lsu_bus_buffer.scala 285:101] + wire _T_936 = ~io_is_sideeffects_r; // @[el2_lsu_bus_buffer.scala 285:147] + wire _T_937 = _T_935 & _T_936; // @[el2_lsu_bus_buffer.scala 285:145] + wire _T_938 = ~io_dec_tlu_wb_coalescing_disable; // @[el2_lsu_bus_buffer.scala 285:170] + wire ibuf_merge_en = _T_937 & _T_938; // @[el2_lsu_bus_buffer.scala 285:168] + wire ibuf_merge_in = ~io_ldst_dual_r; // @[el2_lsu_bus_buffer.scala 286:20] + wire _T_866 = ibuf_merge_en & ibuf_merge_in; // @[el2_lsu_bus_buffer.scala 266:98] + wire _T_867 = ~_T_866; // @[el2_lsu_bus_buffer.scala 266:82] + wire _T_868 = _T_865 & _T_867; // @[el2_lsu_bus_buffer.scala 266:80] + wire _T_869 = _T_868 | ibuf_byp; // @[el2_lsu_bus_buffer.scala 267:5] + wire _T_857 = ~io_lsu_busreq_r; // @[el2_lsu_bus_buffer.scala 261:44] + wire _T_858 = io_lsu_busreq_m & _T_857; // @[el2_lsu_bus_buffer.scala 261:42] + wire _T_859 = _T_858 & ibuf_valid; // @[el2_lsu_bus_buffer.scala 261:61] + wire _T_862 = ibuf_addr[31:2] != io_lsu_addr_m[31:2]; // @[el2_lsu_bus_buffer.scala 261:115] + wire _T_863 = io_lsu_pkt_m_load | _T_862; // @[el2_lsu_bus_buffer.scala 261:95] + wire ibuf_force_drain = _T_859 & _T_863; // @[el2_lsu_bus_buffer.scala 261:74] + wire _T_870 = _T_869 | ibuf_force_drain; // @[el2_lsu_bus_buffer.scala 267:16] + reg ibuf_sideeffect; // @[Reg.scala 27:20] + wire _T_871 = _T_870 | ibuf_sideeffect; // @[el2_lsu_bus_buffer.scala 267:35] + wire _T_872 = ~ibuf_write; // @[el2_lsu_bus_buffer.scala 267:55] + wire _T_873 = _T_871 | _T_872; // @[el2_lsu_bus_buffer.scala 267:53] + wire _T_874 = _T_873 | io_dec_tlu_wb_coalescing_disable; // @[el2_lsu_bus_buffer.scala 267:67] + wire ibuf_drain_vld = ibuf_valid & _T_874; // @[el2_lsu_bus_buffer.scala 266:32] + wire _T_856 = ibuf_drain_vld & _T_855; // @[el2_lsu_bus_buffer.scala 260:34] + wire ibuf_rst = _T_856 | io_dec_tlu_force_halt; // @[el2_lsu_bus_buffer.scala 260:49] + reg [1:0] WrPtr1_r; // @[el2_lsu_bus_buffer.scala 667:49] + reg [1:0] WrPtr0_r; // @[el2_lsu_bus_buffer.scala 666:49] + reg [1:0] ibuf_tag; // @[Reg.scala 27:20] + wire [1:0] ibuf_sz_in = {io_lsu_pkt_r_word,io_lsu_pkt_r_half}; // @[Cat.scala 29:58] + wire [3:0] _T_881 = ibuf_byteen | ldst_byteen_lo_r; // @[el2_lsu_bus_buffer.scala 276:77] + wire [7:0] _T_889 = ldst_byteen_lo_r[0] ? store_data_lo_r[7:0] : ibuf_data[7:0]; // @[el2_lsu_bus_buffer.scala 281:8] + wire [7:0] _T_892 = io_ldst_dual_r ? store_data_hi_r[7:0] : store_data_lo_r[7:0]; // @[el2_lsu_bus_buffer.scala 282:8] + wire [7:0] _T_893 = _T_866 ? _T_889 : _T_892; // @[el2_lsu_bus_buffer.scala 280:46] + wire [7:0] _T_898 = ldst_byteen_lo_r[1] ? store_data_lo_r[15:8] : ibuf_data[15:8]; // @[el2_lsu_bus_buffer.scala 281:8] + wire [7:0] _T_901 = io_ldst_dual_r ? store_data_hi_r[15:8] : store_data_lo_r[15:8]; // @[el2_lsu_bus_buffer.scala 282:8] + wire [7:0] _T_902 = _T_866 ? _T_898 : _T_901; // @[el2_lsu_bus_buffer.scala 280:46] + wire [7:0] _T_907 = ldst_byteen_lo_r[2] ? store_data_lo_r[23:16] : ibuf_data[23:16]; // @[el2_lsu_bus_buffer.scala 281:8] + wire [7:0] _T_910 = io_ldst_dual_r ? store_data_hi_r[23:16] : store_data_lo_r[23:16]; // @[el2_lsu_bus_buffer.scala 282:8] + wire [7:0] _T_911 = _T_866 ? _T_907 : _T_910; // @[el2_lsu_bus_buffer.scala 280:46] + wire [7:0] _T_916 = ldst_byteen_lo_r[3] ? store_data_lo_r[31:24] : ibuf_data[31:24]; // @[el2_lsu_bus_buffer.scala 281:8] + wire [7:0] _T_919 = io_ldst_dual_r ? store_data_hi_r[31:24] : store_data_lo_r[31:24]; // @[el2_lsu_bus_buffer.scala 282:8] + wire [7:0] _T_920 = _T_866 ? _T_916 : _T_919; // @[el2_lsu_bus_buffer.scala 280:46] + wire [23:0] _T_922 = {_T_920,_T_911,_T_902}; // @[Cat.scala 29:58] + wire _T_923 = ibuf_timer < 3'h7; // @[el2_lsu_bus_buffer.scala 283:59] + wire [2:0] _T_926 = ibuf_timer + 3'h1; // @[el2_lsu_bus_buffer.scala 283:93] + wire _T_941 = ~ibuf_merge_in; // @[el2_lsu_bus_buffer.scala 287:65] + wire _T_942 = ibuf_merge_en & _T_941; // @[el2_lsu_bus_buffer.scala 287:63] + wire _T_945 = ibuf_byteen[0] | ldst_byteen_lo_r[0]; // @[el2_lsu_bus_buffer.scala 287:96] + wire _T_947 = _T_942 ? _T_945 : ibuf_byteen[0]; // @[el2_lsu_bus_buffer.scala 287:48] + wire _T_952 = ibuf_byteen[1] | ldst_byteen_lo_r[1]; // @[el2_lsu_bus_buffer.scala 287:96] + wire _T_954 = _T_942 ? _T_952 : ibuf_byteen[1]; // @[el2_lsu_bus_buffer.scala 287:48] + wire _T_959 = ibuf_byteen[2] | ldst_byteen_lo_r[2]; // @[el2_lsu_bus_buffer.scala 287:96] + wire _T_961 = _T_942 ? _T_959 : ibuf_byteen[2]; // @[el2_lsu_bus_buffer.scala 287:48] + wire _T_966 = ibuf_byteen[3] | ldst_byteen_lo_r[3]; // @[el2_lsu_bus_buffer.scala 287:96] + wire _T_968 = _T_942 ? _T_966 : ibuf_byteen[3]; // @[el2_lsu_bus_buffer.scala 287:48] + wire [3:0] ibuf_byteen_out = {_T_968,_T_961,_T_954,_T_947}; // @[Cat.scala 29:58] + wire [7:0] _T_978 = _T_942 ? _T_889 : ibuf_data[7:0]; // @[el2_lsu_bus_buffer.scala 288:45] + wire [7:0] _T_986 = _T_942 ? _T_898 : ibuf_data[15:8]; // @[el2_lsu_bus_buffer.scala 288:45] + wire [7:0] _T_994 = _T_942 ? _T_907 : ibuf_data[23:16]; // @[el2_lsu_bus_buffer.scala 288:45] + wire [7:0] _T_1002 = _T_942 ? _T_916 : ibuf_data[31:24]; // @[el2_lsu_bus_buffer.scala 288:45] + wire [31:0] ibuf_data_out = {_T_1002,_T_994,_T_986,_T_978}; // @[Cat.scala 29:58] + wire _T_1005 = ibuf_wr_en | ibuf_valid; // @[el2_lsu_bus_buffer.scala 290:28] + wire _T_1006 = ~ibuf_rst; // @[el2_lsu_bus_buffer.scala 290:63] + wire _T_1011 = ibuf_wr_en & io_lsu_bus_ibuf_c1_clk; // @[el2_lsu_bus_buffer.scala 291:89] + reg [1:0] ibuf_dualtag; // @[Reg.scala 27:20] + reg ibuf_dual; // @[Reg.scala 27:20] + reg ibuf_samedw; // @[Reg.scala 27:20] + reg ibuf_nomerge; // @[Reg.scala 27:20] + reg ibuf_unsign; // @[Reg.scala 27:20] + reg [1:0] ibuf_sz; // @[Reg.scala 27:20] + wire _T_4467 = buf_write[3] & _T_2642; // @[el2_lsu_bus_buffer.scala 573:64] + wire _T_4468 = ~buf_cmd_state_bus_en_3; // @[el2_lsu_bus_buffer.scala 573:91] + wire _T_4469 = _T_4467 & _T_4468; // @[el2_lsu_bus_buffer.scala 573:89] + wire _T_4462 = buf_write[2] & _T_2637; // @[el2_lsu_bus_buffer.scala 573:64] + wire _T_4463 = ~buf_cmd_state_bus_en_2; // @[el2_lsu_bus_buffer.scala 573:91] + wire _T_4464 = _T_4462 & _T_4463; // @[el2_lsu_bus_buffer.scala 573:89] + wire [1:0] _T_4470 = _T_4469 + _T_4464; // @[el2_lsu_bus_buffer.scala 573:142] + wire _T_4457 = buf_write[1] & _T_2632; // @[el2_lsu_bus_buffer.scala 573:64] + wire _T_4458 = ~buf_cmd_state_bus_en_1; // @[el2_lsu_bus_buffer.scala 573:91] + wire _T_4459 = _T_4457 & _T_4458; // @[el2_lsu_bus_buffer.scala 573:89] + wire [1:0] _GEN_354 = {{1'd0}, _T_4459}; // @[el2_lsu_bus_buffer.scala 573:142] + wire [2:0] _T_4471 = _T_4470 + _GEN_354; // @[el2_lsu_bus_buffer.scala 573:142] + wire _T_4452 = buf_write[0] & _T_2627; // @[el2_lsu_bus_buffer.scala 573:64] + wire _T_4453 = ~buf_cmd_state_bus_en_0; // @[el2_lsu_bus_buffer.scala 573:91] + wire _T_4454 = _T_4452 & _T_4453; // @[el2_lsu_bus_buffer.scala 573:89] + wire [2:0] _GEN_355 = {{2'd0}, _T_4454}; // @[el2_lsu_bus_buffer.scala 573:142] + wire [3:0] buf_numvld_wrcmd_any = _T_4471 + _GEN_355; // @[el2_lsu_bus_buffer.scala 573:142] + wire _T_1037 = buf_numvld_wrcmd_any == 4'h1; // @[el2_lsu_bus_buffer.scala 313:43] + wire _T_4484 = _T_2642 & _T_4468; // @[el2_lsu_bus_buffer.scala 574:73] + wire _T_4481 = _T_2637 & _T_4463; // @[el2_lsu_bus_buffer.scala 574:73] + wire [1:0] _T_4485 = _T_4484 + _T_4481; // @[el2_lsu_bus_buffer.scala 574:126] + wire _T_4478 = _T_2632 & _T_4458; // @[el2_lsu_bus_buffer.scala 574:73] + wire [1:0] _GEN_356 = {{1'd0}, _T_4478}; // @[el2_lsu_bus_buffer.scala 574:126] + wire [2:0] _T_4486 = _T_4485 + _GEN_356; // @[el2_lsu_bus_buffer.scala 574:126] + wire _T_4475 = _T_2627 & _T_4453; // @[el2_lsu_bus_buffer.scala 574:73] + wire [2:0] _GEN_357 = {{2'd0}, _T_4475}; // @[el2_lsu_bus_buffer.scala 574:126] + wire [3:0] buf_numvld_cmd_any = _T_4486 + _GEN_357; // @[el2_lsu_bus_buffer.scala 574:126] + wire _T_1038 = buf_numvld_cmd_any == 4'h1; // @[el2_lsu_bus_buffer.scala 313:72] + wire _T_1039 = _T_1037 & _T_1038; // @[el2_lsu_bus_buffer.scala 313:51] + reg [2:0] obuf_wr_timer; // @[el2_lsu_bus_buffer.scala 412:54] + wire _T_1040 = obuf_wr_timer != 3'h7; // @[el2_lsu_bus_buffer.scala 313:97] + wire _T_1041 = _T_1039 & _T_1040; // @[el2_lsu_bus_buffer.scala 313:80] + wire _T_1043 = _T_1041 & _T_938; // @[el2_lsu_bus_buffer.scala 313:114] + wire _T_2000 = |buf_age_3; // @[el2_lsu_bus_buffer.scala 429:58] + wire _T_2001 = ~_T_2000; // @[el2_lsu_bus_buffer.scala 429:45] + wire _T_2003 = _T_2001 & _T_2642; // @[el2_lsu_bus_buffer.scala 429:63] + wire _T_2005 = _T_2003 & _T_4468; // @[el2_lsu_bus_buffer.scala 429:88] + wire _T_1994 = |buf_age_2; // @[el2_lsu_bus_buffer.scala 429:58] + wire _T_1995 = ~_T_1994; // @[el2_lsu_bus_buffer.scala 429:45] + wire _T_1997 = _T_1995 & _T_2637; // @[el2_lsu_bus_buffer.scala 429:63] + wire _T_1999 = _T_1997 & _T_4463; // @[el2_lsu_bus_buffer.scala 429:88] + wire _T_1988 = |buf_age_1; // @[el2_lsu_bus_buffer.scala 429:58] + wire _T_1989 = ~_T_1988; // @[el2_lsu_bus_buffer.scala 429:45] + wire _T_1991 = _T_1989 & _T_2632; // @[el2_lsu_bus_buffer.scala 429:63] + wire _T_1993 = _T_1991 & _T_4458; // @[el2_lsu_bus_buffer.scala 429:88] + wire _T_1982 = |buf_age_0; // @[el2_lsu_bus_buffer.scala 429:58] + wire _T_1983 = ~_T_1982; // @[el2_lsu_bus_buffer.scala 429:45] + wire _T_1985 = _T_1983 & _T_2627; // @[el2_lsu_bus_buffer.scala 429:63] + wire _T_1987 = _T_1985 & _T_4453; // @[el2_lsu_bus_buffer.scala 429:88] + wire [3:0] CmdPtr0Dec = {_T_2005,_T_1999,_T_1993,_T_1987}; // @[Cat.scala 29:58] + wire [7:0] _T_2075 = {4'h0,_T_2005,_T_1999,_T_1993,_T_1987}; // @[Cat.scala 29:58] + wire _T_2078 = _T_2075[4] | _T_2075[5]; // @[el2_lsu_bus_buffer.scala 437:42] + wire _T_2080 = _T_2078 | _T_2075[6]; // @[el2_lsu_bus_buffer.scala 437:48] + wire _T_2082 = _T_2080 | _T_2075[7]; // @[el2_lsu_bus_buffer.scala 437:54] + wire _T_2085 = _T_2075[2] | _T_2075[3]; // @[el2_lsu_bus_buffer.scala 437:67] + wire _T_2087 = _T_2085 | _T_2075[6]; // @[el2_lsu_bus_buffer.scala 437:73] + wire _T_2089 = _T_2087 | _T_2075[7]; // @[el2_lsu_bus_buffer.scala 437:79] + wire _T_2092 = _T_2075[1] | _T_2075[3]; // @[el2_lsu_bus_buffer.scala 437:92] + wire _T_2094 = _T_2092 | _T_2075[5]; // @[el2_lsu_bus_buffer.scala 437:98] + wire _T_2096 = _T_2094 | _T_2075[7]; // @[el2_lsu_bus_buffer.scala 437:104] + wire [2:0] _T_2098 = {_T_2082,_T_2089,_T_2096}; // @[Cat.scala 29:58] + wire [1:0] CmdPtr0 = _T_2098[1:0]; // @[el2_lsu_bus_buffer.scala 442:11] + wire _T_1044 = CmdPtr0 == 2'h0; // @[el2_lsu_bus_buffer.scala 314:114] + wire _T_1045 = CmdPtr0 == 2'h1; // @[el2_lsu_bus_buffer.scala 314:114] + wire _T_1046 = CmdPtr0 == 2'h2; // @[el2_lsu_bus_buffer.scala 314:114] + wire _T_1047 = CmdPtr0 == 2'h3; // @[el2_lsu_bus_buffer.scala 314:114] + reg buf_nomerge_0; // @[Reg.scala 27:20] + wire _T_1048 = _T_1044 & buf_nomerge_0; // @[Mux.scala 27:72] + reg buf_nomerge_1; // @[Reg.scala 27:20] + wire _T_1049 = _T_1045 & buf_nomerge_1; // @[Mux.scala 27:72] + reg buf_nomerge_2; // @[Reg.scala 27:20] + wire _T_1050 = _T_1046 & buf_nomerge_2; // @[Mux.scala 27:72] + reg buf_nomerge_3; // @[Reg.scala 27:20] + wire _T_1051 = _T_1047 & buf_nomerge_3; // @[Mux.scala 27:72] + wire _T_1052 = _T_1048 | _T_1049; // @[Mux.scala 27:72] + wire _T_1053 = _T_1052 | _T_1050; // @[Mux.scala 27:72] + wire _T_1054 = _T_1053 | _T_1051; // @[Mux.scala 27:72] + wire _T_1056 = ~_T_1054; // @[el2_lsu_bus_buffer.scala 314:31] + wire _T_1057 = _T_1043 & _T_1056; // @[el2_lsu_bus_buffer.scala 314:29] + reg _T_4351; // @[Reg.scala 27:20] + reg _T_4348; // @[Reg.scala 27:20] + reg _T_4345; // @[Reg.scala 27:20] + reg _T_4342; // @[Reg.scala 27:20] + wire [3:0] buf_sideeffect = {_T_4351,_T_4348,_T_4345,_T_4342}; // @[Cat.scala 29:58] + wire _T_1066 = _T_1044 & buf_sideeffect[0]; // @[Mux.scala 27:72] + wire _T_1067 = _T_1045 & buf_sideeffect[1]; // @[Mux.scala 27:72] + wire _T_1068 = _T_1046 & buf_sideeffect[2]; // @[Mux.scala 27:72] + wire _T_1069 = _T_1047 & buf_sideeffect[3]; // @[Mux.scala 27:72] + wire _T_1070 = _T_1066 | _T_1067; // @[Mux.scala 27:72] + wire _T_1071 = _T_1070 | _T_1068; // @[Mux.scala 27:72] + wire _T_1072 = _T_1071 | _T_1069; // @[Mux.scala 27:72] + wire _T_1074 = ~_T_1072; // @[el2_lsu_bus_buffer.scala 315:5] + wire _T_1075 = _T_1057 & _T_1074; // @[el2_lsu_bus_buffer.scala 314:140] + wire _T_1086 = _T_858 & _T_852; // @[el2_lsu_bus_buffer.scala 317:58] + wire _T_1088 = _T_1086 & _T_1038; // @[el2_lsu_bus_buffer.scala 317:72] + wire [29:0] _T_1098 = _T_1044 ? buf_addr_0[31:2] : 30'h0; // @[Mux.scala 27:72] + wire [29:0] _T_1099 = _T_1045 ? buf_addr_1[31:2] : 30'h0; // @[Mux.scala 27:72] + wire [29:0] _T_1102 = _T_1098 | _T_1099; // @[Mux.scala 27:72] + wire [29:0] _T_1100 = _T_1046 ? buf_addr_2[31:2] : 30'h0; // @[Mux.scala 27:72] + wire [29:0] _T_1103 = _T_1102 | _T_1100; // @[Mux.scala 27:72] + wire [29:0] _T_1101 = _T_1047 ? buf_addr_3[31:2] : 30'h0; // @[Mux.scala 27:72] + wire [29:0] _T_1104 = _T_1103 | _T_1101; // @[Mux.scala 27:72] + wire _T_1106 = io_lsu_addr_m[31:2] != _T_1104; // @[el2_lsu_bus_buffer.scala 317:123] + wire obuf_force_wr_en = _T_1088 & _T_1106; // @[el2_lsu_bus_buffer.scala 317:101] + wire _T_1076 = ~obuf_force_wr_en; // @[el2_lsu_bus_buffer.scala 315:119] + wire obuf_wr_wait = _T_1075 & _T_1076; // @[el2_lsu_bus_buffer.scala 315:117] + wire _T_1077 = |buf_numvld_cmd_any; // @[el2_lsu_bus_buffer.scala 316:75] + wire _T_1078 = obuf_wr_timer < 3'h7; // @[el2_lsu_bus_buffer.scala 316:95] + wire _T_1079 = _T_1077 & _T_1078; // @[el2_lsu_bus_buffer.scala 316:79] + wire [2:0] _T_1081 = obuf_wr_timer + 3'h1; // @[el2_lsu_bus_buffer.scala 316:121] + wire _T_4503 = buf_state_3 == 3'h1; // @[el2_lsu_bus_buffer.scala 575:63] + wire _T_4507 = _T_4503 | _T_4484; // @[el2_lsu_bus_buffer.scala 575:74] + wire _T_4498 = buf_state_2 == 3'h1; // @[el2_lsu_bus_buffer.scala 575:63] + wire _T_4502 = _T_4498 | _T_4481; // @[el2_lsu_bus_buffer.scala 575:74] + wire [1:0] _T_4508 = _T_4507 + _T_4502; // @[el2_lsu_bus_buffer.scala 575:154] + wire _T_4493 = buf_state_1 == 3'h1; // @[el2_lsu_bus_buffer.scala 575:63] + wire _T_4497 = _T_4493 | _T_4478; // @[el2_lsu_bus_buffer.scala 575:74] + wire [1:0] _GEN_358 = {{1'd0}, _T_4497}; // @[el2_lsu_bus_buffer.scala 575:154] + wire [2:0] _T_4509 = _T_4508 + _GEN_358; // @[el2_lsu_bus_buffer.scala 575:154] + wire _T_4488 = buf_state_0 == 3'h1; // @[el2_lsu_bus_buffer.scala 575:63] + wire _T_4492 = _T_4488 | _T_4475; // @[el2_lsu_bus_buffer.scala 575:74] + wire [2:0] _GEN_359 = {{2'd0}, _T_4492}; // @[el2_lsu_bus_buffer.scala 575:154] + wire [3:0] buf_numvld_pend_any = _T_4509 + _GEN_359; // @[el2_lsu_bus_buffer.scala 575:154] + wire _T_1108 = buf_numvld_pend_any == 4'h0; // @[el2_lsu_bus_buffer.scala 319:53] + wire _T_1109 = ibuf_byp & _T_1108; // @[el2_lsu_bus_buffer.scala 319:31] + wire _T_1110 = ~io_lsu_pkt_r_store; // @[el2_lsu_bus_buffer.scala 319:64] + wire _T_1111 = _T_1110 | io_no_dword_merge_r; // @[el2_lsu_bus_buffer.scala 319:84] + wire ibuf_buf_byp = _T_1109 & _T_1111; // @[el2_lsu_bus_buffer.scala 319:61] + wire _T_1112 = ibuf_buf_byp & io_lsu_commit_r; // @[el2_lsu_bus_buffer.scala 334:32] + wire _T_4799 = buf_state_0 == 3'h3; // @[el2_lsu_bus_buffer.scala 603:62] + wire _T_4801 = _T_4799 & buf_sideeffect[0]; // @[el2_lsu_bus_buffer.scala 603:73] + wire _T_4802 = _T_4801 & io_dec_tlu_sideeffect_posted_disable; // @[el2_lsu_bus_buffer.scala 603:93] + wire _T_4803 = buf_state_1 == 3'h3; // @[el2_lsu_bus_buffer.scala 603:62] + wire _T_4805 = _T_4803 & buf_sideeffect[1]; // @[el2_lsu_bus_buffer.scala 603:73] + wire _T_4806 = _T_4805 & io_dec_tlu_sideeffect_posted_disable; // @[el2_lsu_bus_buffer.scala 603:93] + wire _T_4815 = _T_4802 | _T_4806; // @[el2_lsu_bus_buffer.scala 603:141] + wire _T_4807 = buf_state_2 == 3'h3; // @[el2_lsu_bus_buffer.scala 603:62] + wire _T_4809 = _T_4807 & buf_sideeffect[2]; // @[el2_lsu_bus_buffer.scala 603:73] + wire _T_4810 = _T_4809 & io_dec_tlu_sideeffect_posted_disable; // @[el2_lsu_bus_buffer.scala 603:93] + wire _T_4816 = _T_4815 | _T_4810; // @[el2_lsu_bus_buffer.scala 603:141] + wire _T_4811 = buf_state_3 == 3'h3; // @[el2_lsu_bus_buffer.scala 603:62] + wire _T_4813 = _T_4811 & buf_sideeffect[3]; // @[el2_lsu_bus_buffer.scala 603:73] + wire _T_4814 = _T_4813 & io_dec_tlu_sideeffect_posted_disable; // @[el2_lsu_bus_buffer.scala 603:93] + wire bus_sideeffect_pend = _T_4816 | _T_4814; // @[el2_lsu_bus_buffer.scala 603:141] + wire _T_1113 = io_is_sideeffects_r & bus_sideeffect_pend; // @[el2_lsu_bus_buffer.scala 334:74] + wire _T_1114 = ~_T_1113; // @[el2_lsu_bus_buffer.scala 334:52] + wire _T_1115 = _T_1112 & _T_1114; // @[el2_lsu_bus_buffer.scala 334:50] + wire [2:0] _T_1120 = _T_1044 ? buf_state_0 : 3'h0; // @[Mux.scala 27:72] + wire [2:0] _T_1121 = _T_1045 ? buf_state_1 : 3'h0; // @[Mux.scala 27:72] + wire [2:0] _T_1124 = _T_1120 | _T_1121; // @[Mux.scala 27:72] + wire [2:0] _T_1122 = _T_1046 ? buf_state_2 : 3'h0; // @[Mux.scala 27:72] + wire [2:0] _T_1125 = _T_1124 | _T_1122; // @[Mux.scala 27:72] + wire [2:0] _T_1123 = _T_1047 ? buf_state_3 : 3'h0; // @[Mux.scala 27:72] + wire [2:0] _T_1126 = _T_1125 | _T_1123; // @[Mux.scala 27:72] + wire _T_1128 = _T_1126 == 3'h2; // @[el2_lsu_bus_buffer.scala 335:36] + wire found_cmdptr0 = |CmdPtr0Dec; // @[el2_lsu_bus_buffer.scala 434:31] + wire _T_1129 = _T_1128 & found_cmdptr0; // @[el2_lsu_bus_buffer.scala 335:47] + wire [3:0] _T_1132 = {buf_cmd_state_bus_en_3,buf_cmd_state_bus_en_2,buf_cmd_state_bus_en_1,buf_cmd_state_bus_en_0}; // @[Cat.scala 29:58] + wire _T_1141 = _T_1044 & _T_1132[0]; // @[Mux.scala 27:72] + wire _T_1142 = _T_1045 & _T_1132[1]; // @[Mux.scala 27:72] + wire _T_1145 = _T_1141 | _T_1142; // @[Mux.scala 27:72] + wire _T_1143 = _T_1046 & _T_1132[2]; // @[Mux.scala 27:72] + wire _T_1146 = _T_1145 | _T_1143; // @[Mux.scala 27:72] + wire _T_1144 = _T_1047 & _T_1132[3]; // @[Mux.scala 27:72] + wire _T_1147 = _T_1146 | _T_1144; // @[Mux.scala 27:72] + wire _T_1149 = ~_T_1147; // @[el2_lsu_bus_buffer.scala 336:23] + wire _T_1150 = _T_1129 & _T_1149; // @[el2_lsu_bus_buffer.scala 336:21] + wire _T_1167 = _T_1072 & bus_sideeffect_pend; // @[el2_lsu_bus_buffer.scala 336:141] + wire _T_1168 = ~_T_1167; // @[el2_lsu_bus_buffer.scala 336:105] + wire _T_1169 = _T_1150 & _T_1168; // @[el2_lsu_bus_buffer.scala 336:103] + reg buf_dual_3; // @[Reg.scala 27:20] + reg buf_dual_2; // @[Reg.scala 27:20] + reg buf_dual_1; // @[Reg.scala 27:20] + reg buf_dual_0; // @[Reg.scala 27:20] + wire [3:0] _T_1172 = {buf_dual_3,buf_dual_2,buf_dual_1,buf_dual_0}; // @[Cat.scala 29:58] + wire _T_1181 = _T_1044 & _T_1172[0]; // @[Mux.scala 27:72] + wire _T_1182 = _T_1045 & _T_1172[1]; // @[Mux.scala 27:72] + wire _T_1185 = _T_1181 | _T_1182; // @[Mux.scala 27:72] + wire _T_1183 = _T_1046 & _T_1172[2]; // @[Mux.scala 27:72] + wire _T_1186 = _T_1185 | _T_1183; // @[Mux.scala 27:72] + wire _T_1184 = _T_1047 & _T_1172[3]; // @[Mux.scala 27:72] + wire _T_1187 = _T_1186 | _T_1184; // @[Mux.scala 27:72] + reg buf_samedw_3; // @[Reg.scala 27:20] + reg buf_samedw_2; // @[Reg.scala 27:20] + reg buf_samedw_1; // @[Reg.scala 27:20] + reg buf_samedw_0; // @[Reg.scala 27:20] + wire [3:0] _T_1191 = {buf_samedw_3,buf_samedw_2,buf_samedw_1,buf_samedw_0}; // @[Cat.scala 29:58] + wire _T_1200 = _T_1044 & _T_1191[0]; // @[Mux.scala 27:72] + wire _T_1201 = _T_1045 & _T_1191[1]; // @[Mux.scala 27:72] + wire _T_1204 = _T_1200 | _T_1201; // @[Mux.scala 27:72] + wire _T_1202 = _T_1046 & _T_1191[2]; // @[Mux.scala 27:72] + wire _T_1205 = _T_1204 | _T_1202; // @[Mux.scala 27:72] + wire _T_1203 = _T_1047 & _T_1191[3]; // @[Mux.scala 27:72] + wire _T_1206 = _T_1205 | _T_1203; // @[Mux.scala 27:72] + wire _T_1208 = _T_1187 & _T_1206; // @[el2_lsu_bus_buffer.scala 337:77] + wire _T_1217 = _T_1044 & buf_write[0]; // @[Mux.scala 27:72] + wire _T_1218 = _T_1045 & buf_write[1]; // @[Mux.scala 27:72] + wire _T_1221 = _T_1217 | _T_1218; // @[Mux.scala 27:72] + wire _T_1219 = _T_1046 & buf_write[2]; // @[Mux.scala 27:72] + wire _T_1222 = _T_1221 | _T_1219; // @[Mux.scala 27:72] + wire _T_1220 = _T_1047 & buf_write[3]; // @[Mux.scala 27:72] + wire _T_1223 = _T_1222 | _T_1220; // @[Mux.scala 27:72] + wire _T_1225 = ~_T_1223; // @[el2_lsu_bus_buffer.scala 337:150] + wire _T_1226 = _T_1208 & _T_1225; // @[el2_lsu_bus_buffer.scala 337:148] + wire _T_1227 = ~_T_1226; // @[el2_lsu_bus_buffer.scala 337:8] + wire [3:0] _T_2041 = ~CmdPtr0Dec; // @[el2_lsu_bus_buffer.scala 430:62] + wire [3:0] _T_2042 = buf_age_3 & _T_2041; // @[el2_lsu_bus_buffer.scala 430:59] + wire _T_2043 = |_T_2042; // @[el2_lsu_bus_buffer.scala 430:76] + wire _T_2044 = ~_T_2043; // @[el2_lsu_bus_buffer.scala 430:45] + wire _T_2046 = ~CmdPtr0Dec[3]; // @[el2_lsu_bus_buffer.scala 430:83] + wire _T_2047 = _T_2044 & _T_2046; // @[el2_lsu_bus_buffer.scala 430:81] + wire _T_2049 = _T_2047 & _T_2642; // @[el2_lsu_bus_buffer.scala 430:98] + wire _T_2051 = _T_2049 & _T_4468; // @[el2_lsu_bus_buffer.scala 430:123] + wire [3:0] _T_2031 = buf_age_2 & _T_2041; // @[el2_lsu_bus_buffer.scala 430:59] + wire _T_2032 = |_T_2031; // @[el2_lsu_bus_buffer.scala 430:76] + wire _T_2033 = ~_T_2032; // @[el2_lsu_bus_buffer.scala 430:45] + wire _T_2035 = ~CmdPtr0Dec[2]; // @[el2_lsu_bus_buffer.scala 430:83] + wire _T_2036 = _T_2033 & _T_2035; // @[el2_lsu_bus_buffer.scala 430:81] + wire _T_2038 = _T_2036 & _T_2637; // @[el2_lsu_bus_buffer.scala 430:98] + wire _T_2040 = _T_2038 & _T_4463; // @[el2_lsu_bus_buffer.scala 430:123] + wire [3:0] _T_2020 = buf_age_1 & _T_2041; // @[el2_lsu_bus_buffer.scala 430:59] + wire _T_2021 = |_T_2020; // @[el2_lsu_bus_buffer.scala 430:76] + wire _T_2022 = ~_T_2021; // @[el2_lsu_bus_buffer.scala 430:45] + wire _T_2024 = ~CmdPtr0Dec[1]; // @[el2_lsu_bus_buffer.scala 430:83] + wire _T_2025 = _T_2022 & _T_2024; // @[el2_lsu_bus_buffer.scala 430:81] + wire _T_2027 = _T_2025 & _T_2632; // @[el2_lsu_bus_buffer.scala 430:98] + wire _T_2029 = _T_2027 & _T_4458; // @[el2_lsu_bus_buffer.scala 430:123] + wire [3:0] _T_2009 = buf_age_0 & _T_2041; // @[el2_lsu_bus_buffer.scala 430:59] + wire _T_2010 = |_T_2009; // @[el2_lsu_bus_buffer.scala 430:76] + wire _T_2011 = ~_T_2010; // @[el2_lsu_bus_buffer.scala 430:45] + wire _T_2013 = ~CmdPtr0Dec[0]; // @[el2_lsu_bus_buffer.scala 430:83] + wire _T_2014 = _T_2011 & _T_2013; // @[el2_lsu_bus_buffer.scala 430:81] + wire _T_2016 = _T_2014 & _T_2627; // @[el2_lsu_bus_buffer.scala 430:98] + wire _T_2018 = _T_2016 & _T_4453; // @[el2_lsu_bus_buffer.scala 430:123] + wire [3:0] CmdPtr1Dec = {_T_2051,_T_2040,_T_2029,_T_2018}; // @[Cat.scala 29:58] + wire found_cmdptr1 = |CmdPtr1Dec; // @[el2_lsu_bus_buffer.scala 435:31] + wire _T_1228 = _T_1227 | found_cmdptr1; // @[el2_lsu_bus_buffer.scala 337:181] + wire [3:0] _T_1231 = {buf_nomerge_3,buf_nomerge_2,buf_nomerge_1,buf_nomerge_0}; // @[Cat.scala 29:58] + wire _T_1240 = _T_1044 & _T_1231[0]; // @[Mux.scala 27:72] + wire _T_1241 = _T_1045 & _T_1231[1]; // @[Mux.scala 27:72] + wire _T_1244 = _T_1240 | _T_1241; // @[Mux.scala 27:72] + wire _T_1242 = _T_1046 & _T_1231[2]; // @[Mux.scala 27:72] + wire _T_1245 = _T_1244 | _T_1242; // @[Mux.scala 27:72] + wire _T_1243 = _T_1047 & _T_1231[3]; // @[Mux.scala 27:72] + wire _T_1246 = _T_1245 | _T_1243; // @[Mux.scala 27:72] + wire _T_1248 = _T_1228 | _T_1246; // @[el2_lsu_bus_buffer.scala 337:197] + wire _T_1249 = _T_1248 | obuf_force_wr_en; // @[el2_lsu_bus_buffer.scala 337:269] + wire _T_1250 = _T_1169 & _T_1249; // @[el2_lsu_bus_buffer.scala 336:164] + wire _T_1251 = _T_1115 | _T_1250; // @[el2_lsu_bus_buffer.scala 334:98] + reg obuf_write; // @[Reg.scala 27:20] + reg obuf_cmd_done; // @[el2_lsu_bus_buffer.scala 399:54] + reg obuf_data_done; // @[el2_lsu_bus_buffer.scala 400:55] + wire _T_4874 = obuf_cmd_done | obuf_data_done; // @[el2_lsu_bus_buffer.scala 607:54] + wire _T_4875 = obuf_cmd_done ? io_lsu_axi_wready : io_lsu_axi_awready; // @[el2_lsu_bus_buffer.scala 607:75] + wire _T_4877 = _T_4874 ? _T_4875 : io_lsu_axi_awready; // @[el2_lsu_bus_buffer.scala 607:39] + wire bus_cmd_ready = obuf_write ? _T_4877 : io_lsu_axi_arready; // @[el2_lsu_bus_buffer.scala 607:23] + wire _T_1252 = ~obuf_valid; // @[el2_lsu_bus_buffer.scala 338:48] + wire _T_1253 = bus_cmd_ready | _T_1252; // @[el2_lsu_bus_buffer.scala 338:46] + reg obuf_nosend; // @[Reg.scala 27:20] + wire _T_1254 = _T_1253 | obuf_nosend; // @[el2_lsu_bus_buffer.scala 338:60] + wire _T_1255 = _T_1251 & _T_1254; // @[el2_lsu_bus_buffer.scala 338:29] + wire _T_1256 = ~obuf_wr_wait; // @[el2_lsu_bus_buffer.scala 338:77] + wire _T_1257 = _T_1255 & _T_1256; // @[el2_lsu_bus_buffer.scala 338:75] + reg [31:0] obuf_addr; // @[el2_lib.scala 512:16] + wire _T_4822 = obuf_addr[31:3] == buf_addr_0[31:3]; // @[el2_lsu_bus_buffer.scala 605:56] + wire _T_4823 = obuf_valid & _T_4822; // @[el2_lsu_bus_buffer.scala 605:38] + wire _T_4825 = obuf_tag1 == 2'h0; // @[el2_lsu_bus_buffer.scala 605:126] + wire _T_4826 = obuf_merge & _T_4825; // @[el2_lsu_bus_buffer.scala 605:114] + wire _T_4827 = _T_3583 | _T_4826; // @[el2_lsu_bus_buffer.scala 605:100] + wire _T_4828 = ~_T_4827; // @[el2_lsu_bus_buffer.scala 605:80] + wire _T_4829 = _T_4823 & _T_4828; // @[el2_lsu_bus_buffer.scala 605:78] + wire _T_4866 = _T_4799 & _T_4829; // @[Mux.scala 27:72] + wire _T_4834 = obuf_addr[31:3] == buf_addr_1[31:3]; // @[el2_lsu_bus_buffer.scala 605:56] + wire _T_4835 = obuf_valid & _T_4834; // @[el2_lsu_bus_buffer.scala 605:38] + wire _T_4837 = obuf_tag1 == 2'h1; // @[el2_lsu_bus_buffer.scala 605:126] + wire _T_4838 = obuf_merge & _T_4837; // @[el2_lsu_bus_buffer.scala 605:114] + wire _T_4839 = _T_3776 | _T_4838; // @[el2_lsu_bus_buffer.scala 605:100] + wire _T_4840 = ~_T_4839; // @[el2_lsu_bus_buffer.scala 605:80] + wire _T_4841 = _T_4835 & _T_4840; // @[el2_lsu_bus_buffer.scala 605:78] + wire _T_4867 = _T_4803 & _T_4841; // @[Mux.scala 27:72] + wire _T_4870 = _T_4866 | _T_4867; // @[Mux.scala 27:72] + wire _T_4846 = obuf_addr[31:3] == buf_addr_2[31:3]; // @[el2_lsu_bus_buffer.scala 605:56] + wire _T_4847 = obuf_valid & _T_4846; // @[el2_lsu_bus_buffer.scala 605:38] + wire _T_4849 = obuf_tag1 == 2'h2; // @[el2_lsu_bus_buffer.scala 605:126] + wire _T_4850 = obuf_merge & _T_4849; // @[el2_lsu_bus_buffer.scala 605:114] + wire _T_4851 = _T_3969 | _T_4850; // @[el2_lsu_bus_buffer.scala 605:100] + wire _T_4852 = ~_T_4851; // @[el2_lsu_bus_buffer.scala 605:80] + wire _T_4853 = _T_4847 & _T_4852; // @[el2_lsu_bus_buffer.scala 605:78] + wire _T_4868 = _T_4807 & _T_4853; // @[Mux.scala 27:72] + wire _T_4871 = _T_4870 | _T_4868; // @[Mux.scala 27:72] + wire _T_4858 = obuf_addr[31:3] == buf_addr_3[31:3]; // @[el2_lsu_bus_buffer.scala 605:56] + wire _T_4859 = obuf_valid & _T_4858; // @[el2_lsu_bus_buffer.scala 605:38] + wire _T_4861 = obuf_tag1 == 2'h3; // @[el2_lsu_bus_buffer.scala 605:126] + wire _T_4862 = obuf_merge & _T_4861; // @[el2_lsu_bus_buffer.scala 605:114] + wire _T_4863 = _T_4162 | _T_4862; // @[el2_lsu_bus_buffer.scala 605:100] + wire _T_4864 = ~_T_4863; // @[el2_lsu_bus_buffer.scala 605:80] + wire _T_4865 = _T_4859 & _T_4864; // @[el2_lsu_bus_buffer.scala 605:78] + wire _T_4869 = _T_4811 & _T_4865; // @[Mux.scala 27:72] + wire bus_addr_match_pending = _T_4871 | _T_4869; // @[Mux.scala 27:72] + wire _T_1260 = ~bus_addr_match_pending; // @[el2_lsu_bus_buffer.scala 338:118] + wire _T_1261 = _T_1257 & _T_1260; // @[el2_lsu_bus_buffer.scala 338:116] + wire obuf_wr_en = _T_1261 & io_lsu_bus_clk_en; // @[el2_lsu_bus_buffer.scala 338:142] + wire _T_1263 = obuf_valid & obuf_nosend; // @[el2_lsu_bus_buffer.scala 340:47] + wire bus_wcmd_sent = io_lsu_axi_awvalid & io_lsu_axi_awready; // @[el2_lsu_bus_buffer.scala 608:39] + wire _T_4881 = obuf_cmd_done | bus_wcmd_sent; // @[el2_lsu_bus_buffer.scala 610:35] + wire bus_wdata_sent = io_lsu_axi_wvalid & io_lsu_axi_wready; // @[el2_lsu_bus_buffer.scala 609:39] + wire _T_4882 = obuf_data_done | bus_wdata_sent; // @[el2_lsu_bus_buffer.scala 610:70] + wire _T_4883 = _T_4881 & _T_4882; // @[el2_lsu_bus_buffer.scala 610:52] + wire _T_4884 = io_lsu_axi_arvalid & io_lsu_axi_arready; // @[el2_lsu_bus_buffer.scala 610:111] + wire bus_cmd_sent = _T_4883 | _T_4884; // @[el2_lsu_bus_buffer.scala 610:89] + wire _T_1264 = bus_cmd_sent | _T_1263; // @[el2_lsu_bus_buffer.scala 340:33] + wire _T_1265 = ~obuf_wr_en; // @[el2_lsu_bus_buffer.scala 340:65] + wire _T_1266 = _T_1264 & _T_1265; // @[el2_lsu_bus_buffer.scala 340:63] + wire _T_1267 = _T_1266 & io_lsu_bus_clk_en; // @[el2_lsu_bus_buffer.scala 340:77] + wire obuf_rst = _T_1267 | io_dec_tlu_force_halt; // @[el2_lsu_bus_buffer.scala 340:98] + wire obuf_write_in = ibuf_buf_byp ? io_lsu_pkt_r_store : _T_1223; // @[el2_lsu_bus_buffer.scala 341:26] + wire [31:0] _T_1304 = _T_1044 ? buf_addr_0 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_1305 = _T_1045 ? buf_addr_1 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_1306 = _T_1046 ? buf_addr_2 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_1307 = _T_1047 ? buf_addr_3 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_1308 = _T_1304 | _T_1305; // @[Mux.scala 27:72] + wire [31:0] _T_1309 = _T_1308 | _T_1306; // @[Mux.scala 27:72] + wire [31:0] _T_1310 = _T_1309 | _T_1307; // @[Mux.scala 27:72] + wire [31:0] obuf_addr_in = ibuf_buf_byp ? io_lsu_addr_r : _T_1310; // @[el2_lsu_bus_buffer.scala 343:25] + reg [1:0] buf_sz_0; // @[Reg.scala 27:20] + wire [1:0] _T_1317 = _T_1044 ? buf_sz_0 : 2'h0; // @[Mux.scala 27:72] + reg [1:0] buf_sz_1; // @[Reg.scala 27:20] + wire [1:0] _T_1318 = _T_1045 ? buf_sz_1 : 2'h0; // @[Mux.scala 27:72] + reg [1:0] buf_sz_2; // @[Reg.scala 27:20] + wire [1:0] _T_1319 = _T_1046 ? buf_sz_2 : 2'h0; // @[Mux.scala 27:72] + reg [1:0] buf_sz_3; // @[Reg.scala 27:20] + wire [1:0] _T_1320 = _T_1047 ? buf_sz_3 : 2'h0; // @[Mux.scala 27:72] + wire [1:0] _T_1321 = _T_1317 | _T_1318; // @[Mux.scala 27:72] + wire [1:0] _T_1322 = _T_1321 | _T_1319; // @[Mux.scala 27:72] + wire [1:0] _T_1323 = _T_1322 | _T_1320; // @[Mux.scala 27:72] + wire [1:0] obuf_sz_in = ibuf_buf_byp ? ibuf_sz_in : _T_1323; // @[el2_lsu_bus_buffer.scala 346:23] + wire _T_1325 = obuf_wr_en | obuf_rst; // @[el2_lsu_bus_buffer.scala 355:39] + wire _T_1326 = ~_T_1325; // @[el2_lsu_bus_buffer.scala 355:26] + wire _T_1332 = obuf_sz_in == 2'h0; // @[el2_lsu_bus_buffer.scala 359:72] + wire _T_1335 = ~obuf_addr_in[0]; // @[el2_lsu_bus_buffer.scala 359:98] + wire _T_1336 = obuf_sz_in[0] & _T_1335; // @[el2_lsu_bus_buffer.scala 359:96] + wire _T_1337 = _T_1332 | _T_1336; // @[el2_lsu_bus_buffer.scala 359:79] + wire _T_1340 = |obuf_addr_in[1:0]; // @[el2_lsu_bus_buffer.scala 359:153] + wire _T_1341 = ~_T_1340; // @[el2_lsu_bus_buffer.scala 359:134] + wire _T_1342 = obuf_sz_in[1] & _T_1341; // @[el2_lsu_bus_buffer.scala 359:132] + wire _T_1343 = _T_1337 | _T_1342; // @[el2_lsu_bus_buffer.scala 359:116] + wire obuf_aligned_in = ibuf_buf_byp ? is_aligned_r : _T_1343; // @[el2_lsu_bus_buffer.scala 359:28] + wire _T_1360 = obuf_addr_in[31:3] == obuf_addr[31:3]; // @[el2_lsu_bus_buffer.scala 373:40] + wire _T_1361 = _T_1360 & obuf_aligned_in; // @[el2_lsu_bus_buffer.scala 373:60] + reg obuf_sideeffect; // @[Reg.scala 27:20] + wire _T_1362 = ~obuf_sideeffect; // @[el2_lsu_bus_buffer.scala 373:80] + wire _T_1363 = _T_1361 & _T_1362; // @[el2_lsu_bus_buffer.scala 373:78] + wire _T_1364 = ~obuf_write; // @[el2_lsu_bus_buffer.scala 373:99] + wire _T_1365 = _T_1363 & _T_1364; // @[el2_lsu_bus_buffer.scala 373:97] + wire _T_1366 = ~obuf_write_in; // @[el2_lsu_bus_buffer.scala 373:113] + wire _T_1367 = _T_1365 & _T_1366; // @[el2_lsu_bus_buffer.scala 373:111] + wire _T_1368 = ~io_dec_tlu_external_ldfwd_disable; // @[el2_lsu_bus_buffer.scala 373:130] + wire _T_1369 = _T_1367 & _T_1368; // @[el2_lsu_bus_buffer.scala 373:128] + wire _T_1370 = ~obuf_nosend; // @[el2_lsu_bus_buffer.scala 374:20] + wire _T_1371 = obuf_valid & _T_1370; // @[el2_lsu_bus_buffer.scala 374:18] + reg obuf_rdrsp_pend; // @[el2_lsu_bus_buffer.scala 401:56] + wire bus_rsp_read = io_lsu_axi_rvalid & io_lsu_axi_rready; // @[el2_lsu_bus_buffer.scala 611:37] + reg [2:0] obuf_rdrsp_tag; // @[el2_lsu_bus_buffer.scala 402:55] + wire _T_1372 = io_lsu_axi_rid == obuf_rdrsp_tag; // @[el2_lsu_bus_buffer.scala 374:90] + wire _T_1373 = bus_rsp_read & _T_1372; // @[el2_lsu_bus_buffer.scala 374:70] + wire _T_1374 = ~_T_1373; // @[el2_lsu_bus_buffer.scala 374:55] + wire _T_1375 = obuf_rdrsp_pend & _T_1374; // @[el2_lsu_bus_buffer.scala 374:53] + wire _T_1376 = _T_1371 | _T_1375; // @[el2_lsu_bus_buffer.scala 374:34] + wire obuf_nosend_in = _T_1369 & _T_1376; // @[el2_lsu_bus_buffer.scala 373:165] + wire _T_1344 = ~obuf_nosend_in; // @[el2_lsu_bus_buffer.scala 367:44] + wire _T_1345 = obuf_wr_en & _T_1344; // @[el2_lsu_bus_buffer.scala 367:42] + wire _T_1346 = ~_T_1345; // @[el2_lsu_bus_buffer.scala 367:29] + wire _T_1347 = _T_1346 & obuf_rdrsp_pend; // @[el2_lsu_bus_buffer.scala 367:61] + wire _T_1351 = _T_1347 & _T_1374; // @[el2_lsu_bus_buffer.scala 367:79] + wire _T_1353 = bus_cmd_sent & _T_1364; // @[el2_lsu_bus_buffer.scala 368:20] + wire _T_1354 = ~io_dec_tlu_force_halt; // @[el2_lsu_bus_buffer.scala 368:37] + wire _T_1355 = _T_1353 & _T_1354; // @[el2_lsu_bus_buffer.scala 368:35] + wire _T_1357 = bus_cmd_sent | _T_1364; // @[el2_lsu_bus_buffer.scala 370:44] + wire [7:0] _T_1379 = {ldst_byteen_lo_r,4'h0}; // @[Cat.scala 29:58] + wire [7:0] _T_1380 = {4'h0,ldst_byteen_lo_r}; // @[Cat.scala 29:58] + wire [7:0] _T_1381 = io_lsu_addr_r[2] ? _T_1379 : _T_1380; // @[el2_lsu_bus_buffer.scala 375:46] + wire [3:0] _T_1400 = _T_1044 ? buf_byteen_0 : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_1401 = _T_1045 ? buf_byteen_1 : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_1402 = _T_1046 ? buf_byteen_2 : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_1403 = _T_1047 ? buf_byteen_3 : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_1404 = _T_1400 | _T_1401; // @[Mux.scala 27:72] + wire [3:0] _T_1405 = _T_1404 | _T_1402; // @[Mux.scala 27:72] + wire [3:0] _T_1406 = _T_1405 | _T_1403; // @[Mux.scala 27:72] + wire [7:0] _T_1408 = {_T_1406,4'h0}; // @[Cat.scala 29:58] + wire [7:0] _T_1421 = {4'h0,_T_1406}; // @[Cat.scala 29:58] + wire [7:0] _T_1422 = _T_1310[2] ? _T_1408 : _T_1421; // @[el2_lsu_bus_buffer.scala 376:8] + wire [7:0] obuf_byteen0_in = ibuf_buf_byp ? _T_1381 : _T_1422; // @[el2_lsu_bus_buffer.scala 375:28] + wire [7:0] _T_1424 = {ldst_byteen_hi_r,4'h0}; // @[Cat.scala 29:58] + wire [7:0] _T_1425 = {4'h0,ldst_byteen_hi_r}; // @[Cat.scala 29:58] + wire [7:0] _T_1426 = io_end_addr_r[2] ? _T_1424 : _T_1425; // @[el2_lsu_bus_buffer.scala 377:46] + wire [7:0] _T_1453 = {buf_byteen_0,4'h0}; // @[Cat.scala 29:58] + wire [7:0] _T_1466 = {4'h0,buf_byteen_0}; // @[Cat.scala 29:58] + wire [7:0] _T_1467 = buf_addr_0[2] ? _T_1453 : _T_1466; // @[el2_lsu_bus_buffer.scala 378:8] + wire [7:0] obuf_byteen1_in = ibuf_buf_byp ? _T_1426 : _T_1467; // @[el2_lsu_bus_buffer.scala 377:28] + wire [63:0] _T_1469 = {store_data_lo_r,32'h0}; // @[Cat.scala 29:58] + wire [63:0] _T_1470 = {32'h0,store_data_lo_r}; // @[Cat.scala 29:58] + wire [63:0] _T_1471 = io_lsu_addr_r[2] ? _T_1469 : _T_1470; // @[el2_lsu_bus_buffer.scala 380:44] + wire [31:0] _T_1490 = _T_1044 ? buf_data_0 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_1491 = _T_1045 ? buf_data_1 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_1492 = _T_1046 ? buf_data_2 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_1493 = _T_1047 ? buf_data_3 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_1494 = _T_1490 | _T_1491; // @[Mux.scala 27:72] + wire [31:0] _T_1495 = _T_1494 | _T_1492; // @[Mux.scala 27:72] + wire [31:0] _T_1496 = _T_1495 | _T_1493; // @[Mux.scala 27:72] + wire [63:0] _T_1498 = {_T_1496,32'h0}; // @[Cat.scala 29:58] + wire [63:0] _T_1511 = {32'h0,_T_1496}; // @[Cat.scala 29:58] + wire [63:0] _T_1512 = _T_1310[2] ? _T_1498 : _T_1511; // @[el2_lsu_bus_buffer.scala 381:8] + wire [63:0] obuf_data0_in = ibuf_buf_byp ? _T_1471 : _T_1512; // @[el2_lsu_bus_buffer.scala 380:26] + wire [63:0] _T_1514 = {store_data_hi_r,32'h0}; // @[Cat.scala 29:58] + wire [63:0] _T_1515 = {32'h0,store_data_hi_r}; // @[Cat.scala 29:58] + wire [63:0] _T_1516 = io_lsu_addr_r[2] ? _T_1514 : _T_1515; // @[el2_lsu_bus_buffer.scala 382:44] + wire [63:0] _T_1543 = {buf_data_0,32'h0}; // @[Cat.scala 29:58] + wire [63:0] _T_1556 = {32'h0,buf_data_0}; // @[Cat.scala 29:58] + wire [63:0] _T_1557 = buf_addr_0[2] ? _T_1543 : _T_1556; // @[el2_lsu_bus_buffer.scala 383:8] + wire [63:0] obuf_data1_in = ibuf_buf_byp ? _T_1516 : _T_1557; // @[el2_lsu_bus_buffer.scala 382:26] + wire _T_1642 = CmdPtr0 != 2'h0; // @[el2_lsu_bus_buffer.scala 389:30] + wire _T_1643 = _T_1642 & found_cmdptr0; // @[el2_lsu_bus_buffer.scala 389:43] + wire _T_1644 = _T_1643 & found_cmdptr1; // @[el2_lsu_bus_buffer.scala 389:59] + wire _T_1658 = _T_1644 & _T_1128; // @[el2_lsu_bus_buffer.scala 389:75] + wire _T_1672 = _T_1658 & _T_2627; // @[el2_lsu_bus_buffer.scala 389:118] + wire _T_1693 = _T_1672 & _T_1149; // @[el2_lsu_bus_buffer.scala 389:161] + wire _T_1711 = _T_1693 & _T_1074; // @[el2_lsu_bus_buffer.scala 390:83] + wire _T_1813 = _T_1225 & _T_1187; // @[el2_lsu_bus_buffer.scala 393:36] + reg buf_dualhi_3; // @[Reg.scala 27:20] + reg buf_dualhi_2; // @[Reg.scala 27:20] + reg buf_dualhi_1; // @[Reg.scala 27:20] + reg buf_dualhi_0; // @[Reg.scala 27:20] + wire [3:0] _T_1816 = {buf_dualhi_3,buf_dualhi_2,buf_dualhi_1,buf_dualhi_0}; // @[Cat.scala 29:58] + wire _T_1825 = _T_1044 & _T_1816[0]; // @[Mux.scala 27:72] + wire _T_1826 = _T_1045 & _T_1816[1]; // @[Mux.scala 27:72] + wire _T_1829 = _T_1825 | _T_1826; // @[Mux.scala 27:72] + wire _T_1827 = _T_1046 & _T_1816[2]; // @[Mux.scala 27:72] + wire _T_1830 = _T_1829 | _T_1827; // @[Mux.scala 27:72] + wire _T_1828 = _T_1047 & _T_1816[3]; // @[Mux.scala 27:72] + wire _T_1831 = _T_1830 | _T_1828; // @[Mux.scala 27:72] + wire _T_1833 = ~_T_1831; // @[el2_lsu_bus_buffer.scala 393:107] + wire _T_1834 = _T_1813 & _T_1833; // @[el2_lsu_bus_buffer.scala 393:105] + wire _T_1854 = _T_1834 & _T_1206; // @[el2_lsu_bus_buffer.scala 393:177] + wire _T_1856 = _T_1711 & _T_1854; // @[el2_lsu_bus_buffer.scala 390:120] + wire _T_1857 = ibuf_buf_byp & ldst_samedw_r; // @[el2_lsu_bus_buffer.scala 394:19] + wire _T_1858 = _T_1857 & io_ldst_dual_r; // @[el2_lsu_bus_buffer.scala 394:35] + wire obuf_merge_en = _T_1856 | _T_1858; // @[el2_lsu_bus_buffer.scala 393:251] + wire _T_1560 = obuf_merge_en & obuf_byteen1_in[0]; // @[el2_lsu_bus_buffer.scala 384:80] + wire _T_1561 = obuf_byteen0_in[0] | _T_1560; // @[el2_lsu_bus_buffer.scala 384:63] + wire _T_1564 = obuf_merge_en & obuf_byteen1_in[1]; // @[el2_lsu_bus_buffer.scala 384:80] + wire _T_1565 = obuf_byteen0_in[1] | _T_1564; // @[el2_lsu_bus_buffer.scala 384:63] + wire _T_1568 = obuf_merge_en & obuf_byteen1_in[2]; // @[el2_lsu_bus_buffer.scala 384:80] + wire _T_1569 = obuf_byteen0_in[2] | _T_1568; // @[el2_lsu_bus_buffer.scala 384:63] + wire _T_1572 = obuf_merge_en & obuf_byteen1_in[3]; // @[el2_lsu_bus_buffer.scala 384:80] + wire _T_1573 = obuf_byteen0_in[3] | _T_1572; // @[el2_lsu_bus_buffer.scala 384:63] + wire _T_1576 = obuf_merge_en & obuf_byteen1_in[4]; // @[el2_lsu_bus_buffer.scala 384:80] + wire _T_1577 = obuf_byteen0_in[4] | _T_1576; // @[el2_lsu_bus_buffer.scala 384:63] + wire _T_1580 = obuf_merge_en & obuf_byteen1_in[5]; // @[el2_lsu_bus_buffer.scala 384:80] + wire _T_1581 = obuf_byteen0_in[5] | _T_1580; // @[el2_lsu_bus_buffer.scala 384:63] + wire _T_1584 = obuf_merge_en & obuf_byteen1_in[6]; // @[el2_lsu_bus_buffer.scala 384:80] + wire _T_1585 = obuf_byteen0_in[6] | _T_1584; // @[el2_lsu_bus_buffer.scala 384:63] + wire _T_1588 = obuf_merge_en & obuf_byteen1_in[7]; // @[el2_lsu_bus_buffer.scala 384:80] + wire _T_1589 = obuf_byteen0_in[7] | _T_1588; // @[el2_lsu_bus_buffer.scala 384:63] + wire [7:0] obuf_byteen_in = {_T_1589,_T_1585,_T_1581,_T_1577,_T_1573,_T_1569,_T_1565,_T_1561}; // @[Cat.scala 29:58] + wire [7:0] _T_1600 = _T_1560 ? obuf_data1_in[7:0] : obuf_data0_in[7:0]; // @[el2_lsu_bus_buffer.scala 385:44] + wire [7:0] _T_1605 = _T_1564 ? obuf_data1_in[15:8] : obuf_data0_in[15:8]; // @[el2_lsu_bus_buffer.scala 385:44] + wire [7:0] _T_1610 = _T_1568 ? obuf_data1_in[23:16] : obuf_data0_in[23:16]; // @[el2_lsu_bus_buffer.scala 385:44] + wire [7:0] _T_1615 = _T_1572 ? obuf_data1_in[31:24] : obuf_data0_in[31:24]; // @[el2_lsu_bus_buffer.scala 385:44] + wire [7:0] _T_1620 = _T_1576 ? obuf_data1_in[39:32] : obuf_data0_in[39:32]; // @[el2_lsu_bus_buffer.scala 385:44] + wire [7:0] _T_1625 = _T_1580 ? obuf_data1_in[47:40] : obuf_data0_in[47:40]; // @[el2_lsu_bus_buffer.scala 385:44] + wire [7:0] _T_1630 = _T_1584 ? obuf_data1_in[55:48] : obuf_data0_in[55:48]; // @[el2_lsu_bus_buffer.scala 385:44] + wire [7:0] _T_1635 = _T_1588 ? obuf_data1_in[63:56] : obuf_data0_in[63:56]; // @[el2_lsu_bus_buffer.scala 385:44] + wire [55:0] _T_1641 = {_T_1635,_T_1630,_T_1625,_T_1620,_T_1615,_T_1610,_T_1605}; // @[Cat.scala 29:58] + wire _T_1860 = obuf_wr_en | obuf_valid; // @[el2_lsu_bus_buffer.scala 397:58] + wire _T_1861 = ~obuf_rst; // @[el2_lsu_bus_buffer.scala 397:93] + reg [1:0] obuf_sz; // @[Reg.scala 27:20] + reg [7:0] obuf_byteen; // @[Reg.scala 27:20] + reg [63:0] obuf_data; // @[el2_lib.scala 512:16] + wire _T_1874 = buf_state_0 == 3'h0; // @[el2_lsu_bus_buffer.scala 415:65] + wire _T_1875 = ibuf_tag == 2'h0; // @[el2_lsu_bus_buffer.scala 416:30] + wire _T_1876 = ibuf_valid & _T_1875; // @[el2_lsu_bus_buffer.scala 416:19] + wire _T_1877 = WrPtr0_r == 2'h0; // @[el2_lsu_bus_buffer.scala 417:18] + wire _T_1878 = WrPtr1_r == 2'h0; // @[el2_lsu_bus_buffer.scala 417:57] + wire _T_1879 = io_ldst_dual_r & _T_1878; // @[el2_lsu_bus_buffer.scala 417:45] + wire _T_1880 = _T_1877 | _T_1879; // @[el2_lsu_bus_buffer.scala 417:27] + wire _T_1881 = io_lsu_busreq_r & _T_1880; // @[el2_lsu_bus_buffer.scala 416:58] + wire _T_1882 = _T_1876 | _T_1881; // @[el2_lsu_bus_buffer.scala 416:39] + wire _T_1883 = ~_T_1882; // @[el2_lsu_bus_buffer.scala 416:5] + wire _T_1884 = _T_1874 & _T_1883; // @[el2_lsu_bus_buffer.scala 415:76] + wire _T_1885 = buf_state_1 == 3'h0; // @[el2_lsu_bus_buffer.scala 415:65] + wire _T_1886 = ibuf_tag == 2'h1; // @[el2_lsu_bus_buffer.scala 416:30] + wire _T_1887 = ibuf_valid & _T_1886; // @[el2_lsu_bus_buffer.scala 416:19] + wire _T_1888 = WrPtr0_r == 2'h1; // @[el2_lsu_bus_buffer.scala 417:18] + wire _T_1889 = WrPtr1_r == 2'h1; // @[el2_lsu_bus_buffer.scala 417:57] + wire _T_1890 = io_ldst_dual_r & _T_1889; // @[el2_lsu_bus_buffer.scala 417:45] + wire _T_1891 = _T_1888 | _T_1890; // @[el2_lsu_bus_buffer.scala 417:27] + wire _T_1892 = io_lsu_busreq_r & _T_1891; // @[el2_lsu_bus_buffer.scala 416:58] + wire _T_1893 = _T_1887 | _T_1892; // @[el2_lsu_bus_buffer.scala 416:39] + wire _T_1894 = ~_T_1893; // @[el2_lsu_bus_buffer.scala 416:5] + wire _T_1895 = _T_1885 & _T_1894; // @[el2_lsu_bus_buffer.scala 415:76] + wire _T_1896 = buf_state_2 == 3'h0; // @[el2_lsu_bus_buffer.scala 415:65] + wire _T_1897 = ibuf_tag == 2'h2; // @[el2_lsu_bus_buffer.scala 416:30] + wire _T_1898 = ibuf_valid & _T_1897; // @[el2_lsu_bus_buffer.scala 416:19] + wire _T_1899 = WrPtr0_r == 2'h2; // @[el2_lsu_bus_buffer.scala 417:18] + wire _T_1900 = WrPtr1_r == 2'h2; // @[el2_lsu_bus_buffer.scala 417:57] + wire _T_1901 = io_ldst_dual_r & _T_1900; // @[el2_lsu_bus_buffer.scala 417:45] + wire _T_1902 = _T_1899 | _T_1901; // @[el2_lsu_bus_buffer.scala 417:27] + wire _T_1903 = io_lsu_busreq_r & _T_1902; // @[el2_lsu_bus_buffer.scala 416:58] + wire _T_1904 = _T_1898 | _T_1903; // @[el2_lsu_bus_buffer.scala 416:39] + wire _T_1905 = ~_T_1904; // @[el2_lsu_bus_buffer.scala 416:5] + wire _T_1906 = _T_1896 & _T_1905; // @[el2_lsu_bus_buffer.scala 415:76] + wire _T_1907 = buf_state_3 == 3'h0; // @[el2_lsu_bus_buffer.scala 415:65] + wire _T_1908 = ibuf_tag == 2'h3; // @[el2_lsu_bus_buffer.scala 416:30] + wire _T_1910 = WrPtr0_r == 2'h3; // @[el2_lsu_bus_buffer.scala 417:18] + wire _T_1911 = WrPtr1_r == 2'h3; // @[el2_lsu_bus_buffer.scala 417:57] + wire [1:0] _T_1919 = _T_1906 ? 2'h2 : 2'h3; // @[Mux.scala 98:16] + wire [1:0] _T_1920 = _T_1895 ? 2'h1 : _T_1919; // @[Mux.scala 98:16] + wire [1:0] WrPtr0_m = _T_1884 ? 2'h0 : _T_1920; // @[Mux.scala 98:16] + wire _T_1925 = WrPtr0_m == 2'h0; // @[el2_lsu_bus_buffer.scala 422:33] + wire _T_1926 = io_lsu_busreq_m & _T_1925; // @[el2_lsu_bus_buffer.scala 422:22] + wire _T_1927 = _T_1876 | _T_1926; // @[el2_lsu_bus_buffer.scala 421:112] + wire _T_1933 = _T_1927 | _T_1881; // @[el2_lsu_bus_buffer.scala 422:42] + wire _T_1934 = ~_T_1933; // @[el2_lsu_bus_buffer.scala 421:78] + wire _T_1935 = _T_1874 & _T_1934; // @[el2_lsu_bus_buffer.scala 421:76] + wire _T_1939 = WrPtr0_m == 2'h1; // @[el2_lsu_bus_buffer.scala 422:33] + wire _T_1940 = io_lsu_busreq_m & _T_1939; // @[el2_lsu_bus_buffer.scala 422:22] + wire _T_1941 = _T_1887 | _T_1940; // @[el2_lsu_bus_buffer.scala 421:112] + wire _T_1947 = _T_1941 | _T_1892; // @[el2_lsu_bus_buffer.scala 422:42] + wire _T_1948 = ~_T_1947; // @[el2_lsu_bus_buffer.scala 421:78] + wire _T_1949 = _T_1885 & _T_1948; // @[el2_lsu_bus_buffer.scala 421:76] + wire _T_1953 = WrPtr0_m == 2'h2; // @[el2_lsu_bus_buffer.scala 422:33] + wire _T_1954 = io_lsu_busreq_m & _T_1953; // @[el2_lsu_bus_buffer.scala 422:22] + wire _T_1955 = _T_1898 | _T_1954; // @[el2_lsu_bus_buffer.scala 421:112] + wire _T_1961 = _T_1955 | _T_1903; // @[el2_lsu_bus_buffer.scala 422:42] + wire _T_1962 = ~_T_1961; // @[el2_lsu_bus_buffer.scala 421:78] + wire _T_1963 = _T_1896 & _T_1962; // @[el2_lsu_bus_buffer.scala 421:76] + reg [3:0] buf_rspageQ_0; // @[el2_lsu_bus_buffer.scala 552:63] + wire _T_2767 = buf_state_3 == 3'h5; // @[el2_lsu_bus_buffer.scala 465:104] + wire _T_2768 = buf_rspageQ_0[3] & _T_2767; // @[el2_lsu_bus_buffer.scala 465:89] + wire _T_2764 = buf_state_2 == 3'h5; // @[el2_lsu_bus_buffer.scala 465:104] + wire _T_2765 = buf_rspageQ_0[2] & _T_2764; // @[el2_lsu_bus_buffer.scala 465:89] + wire _T_2761 = buf_state_1 == 3'h5; // @[el2_lsu_bus_buffer.scala 465:104] + wire _T_2762 = buf_rspageQ_0[1] & _T_2761; // @[el2_lsu_bus_buffer.scala 465:89] + wire _T_2758 = buf_state_0 == 3'h5; // @[el2_lsu_bus_buffer.scala 465:104] + wire _T_2759 = buf_rspageQ_0[0] & _T_2758; // @[el2_lsu_bus_buffer.scala 465:89] + wire [3:0] buf_rsp_pickage_0 = {_T_2768,_T_2765,_T_2762,_T_2759}; // @[Cat.scala 29:58] + wire _T_2054 = |buf_rsp_pickage_0; // @[el2_lsu_bus_buffer.scala 433:65] + wire _T_2055 = ~_T_2054; // @[el2_lsu_bus_buffer.scala 433:44] + wire _T_2057 = _T_2055 & _T_2758; // @[el2_lsu_bus_buffer.scala 433:70] + reg [3:0] buf_rspageQ_1; // @[el2_lsu_bus_buffer.scala 552:63] + wire _T_2783 = buf_rspageQ_1[3] & _T_2767; // @[el2_lsu_bus_buffer.scala 465:89] + wire _T_2780 = buf_rspageQ_1[2] & _T_2764; // @[el2_lsu_bus_buffer.scala 465:89] + wire _T_2777 = buf_rspageQ_1[1] & _T_2761; // @[el2_lsu_bus_buffer.scala 465:89] + wire _T_2774 = buf_rspageQ_1[0] & _T_2758; // @[el2_lsu_bus_buffer.scala 465:89] + wire [3:0] buf_rsp_pickage_1 = {_T_2783,_T_2780,_T_2777,_T_2774}; // @[Cat.scala 29:58] + wire _T_2058 = |buf_rsp_pickage_1; // @[el2_lsu_bus_buffer.scala 433:65] + wire _T_2059 = ~_T_2058; // @[el2_lsu_bus_buffer.scala 433:44] + wire _T_2061 = _T_2059 & _T_2761; // @[el2_lsu_bus_buffer.scala 433:70] + reg [3:0] buf_rspageQ_2; // @[el2_lsu_bus_buffer.scala 552:63] + wire _T_2798 = buf_rspageQ_2[3] & _T_2767; // @[el2_lsu_bus_buffer.scala 465:89] + wire _T_2795 = buf_rspageQ_2[2] & _T_2764; // @[el2_lsu_bus_buffer.scala 465:89] + wire _T_2792 = buf_rspageQ_2[1] & _T_2761; // @[el2_lsu_bus_buffer.scala 465:89] + wire _T_2789 = buf_rspageQ_2[0] & _T_2758; // @[el2_lsu_bus_buffer.scala 465:89] + wire [3:0] buf_rsp_pickage_2 = {_T_2798,_T_2795,_T_2792,_T_2789}; // @[Cat.scala 29:58] + wire _T_2062 = |buf_rsp_pickage_2; // @[el2_lsu_bus_buffer.scala 433:65] + wire _T_2063 = ~_T_2062; // @[el2_lsu_bus_buffer.scala 433:44] + wire _T_2065 = _T_2063 & _T_2764; // @[el2_lsu_bus_buffer.scala 433:70] + reg [3:0] buf_rspageQ_3; // @[el2_lsu_bus_buffer.scala 552:63] + wire _T_2813 = buf_rspageQ_3[3] & _T_2767; // @[el2_lsu_bus_buffer.scala 465:89] + wire _T_2810 = buf_rspageQ_3[2] & _T_2764; // @[el2_lsu_bus_buffer.scala 465:89] + wire _T_2807 = buf_rspageQ_3[1] & _T_2761; // @[el2_lsu_bus_buffer.scala 465:89] + wire _T_2804 = buf_rspageQ_3[0] & _T_2758; // @[el2_lsu_bus_buffer.scala 465:89] + wire [3:0] buf_rsp_pickage_3 = {_T_2813,_T_2810,_T_2807,_T_2804}; // @[Cat.scala 29:58] + wire _T_2066 = |buf_rsp_pickage_3; // @[el2_lsu_bus_buffer.scala 433:65] + wire _T_2067 = ~_T_2066; // @[el2_lsu_bus_buffer.scala 433:44] + wire _T_2069 = _T_2067 & _T_2767; // @[el2_lsu_bus_buffer.scala 433:70] + wire [7:0] _T_2125 = {4'h0,_T_2069,_T_2065,_T_2061,_T_2057}; // @[Cat.scala 29:58] + wire _T_2128 = _T_2125[4] | _T_2125[5]; // @[el2_lsu_bus_buffer.scala 437:42] + wire _T_2130 = _T_2128 | _T_2125[6]; // @[el2_lsu_bus_buffer.scala 437:48] + wire _T_2132 = _T_2130 | _T_2125[7]; // @[el2_lsu_bus_buffer.scala 437:54] + wire _T_2135 = _T_2125[2] | _T_2125[3]; // @[el2_lsu_bus_buffer.scala 437:67] + wire _T_2137 = _T_2135 | _T_2125[6]; // @[el2_lsu_bus_buffer.scala 437:73] + wire _T_2139 = _T_2137 | _T_2125[7]; // @[el2_lsu_bus_buffer.scala 437:79] + wire _T_2142 = _T_2125[1] | _T_2125[3]; // @[el2_lsu_bus_buffer.scala 437:92] + wire _T_2144 = _T_2142 | _T_2125[5]; // @[el2_lsu_bus_buffer.scala 437:98] + wire _T_2146 = _T_2144 | _T_2125[7]; // @[el2_lsu_bus_buffer.scala 437:104] + wire [2:0] _T_2148 = {_T_2132,_T_2139,_T_2146}; // @[Cat.scala 29:58] + wire _T_3553 = ibuf_byp | io_ldst_dual_r; // @[el2_lsu_bus_buffer.scala 495:77] + wire _T_3554 = ~ibuf_merge_en; // @[el2_lsu_bus_buffer.scala 495:97] + wire _T_3555 = _T_3553 & _T_3554; // @[el2_lsu_bus_buffer.scala 495:95] + wire _T_3556 = 2'h0 == WrPtr0_r; // @[el2_lsu_bus_buffer.scala 495:117] + wire _T_3557 = _T_3555 & _T_3556; // @[el2_lsu_bus_buffer.scala 495:112] + wire _T_3558 = ibuf_byp & io_ldst_dual_r; // @[el2_lsu_bus_buffer.scala 495:144] + wire _T_3559 = 2'h0 == WrPtr1_r; // @[el2_lsu_bus_buffer.scala 495:166] + wire _T_3560 = _T_3558 & _T_3559; // @[el2_lsu_bus_buffer.scala 495:161] + wire _T_3561 = _T_3557 | _T_3560; // @[el2_lsu_bus_buffer.scala 495:132] + wire _T_3562 = _T_853 & _T_3561; // @[el2_lsu_bus_buffer.scala 495:63] + wire _T_3563 = 2'h0 == ibuf_tag; // @[el2_lsu_bus_buffer.scala 495:206] + wire _T_3564 = ibuf_drain_vld & _T_3563; // @[el2_lsu_bus_buffer.scala 495:201] + wire _T_3565 = _T_3562 | _T_3564; // @[el2_lsu_bus_buffer.scala 495:183] + wire _T_3575 = io_lsu_bus_clk_en | io_dec_tlu_force_halt; // @[el2_lsu_bus_buffer.scala 502:46] + wire _T_3610 = 3'h3 == buf_state_0; // @[Conditional.scala 37:30] + wire bus_rsp_write = io_lsu_axi_bvalid & io_lsu_axi_bready; // @[el2_lsu_bus_buffer.scala 612:38] + wire _T_3655 = io_lsu_axi_bid == 3'h0; // @[el2_lsu_bus_buffer.scala 520:73] + wire _T_3656 = bus_rsp_write & _T_3655; // @[el2_lsu_bus_buffer.scala 520:52] + wire _T_3657 = io_lsu_axi_rid == 3'h0; // @[el2_lsu_bus_buffer.scala 521:46] + reg _T_4328; // @[Reg.scala 27:20] + reg _T_4326; // @[Reg.scala 27:20] + reg _T_4324; // @[Reg.scala 27:20] + reg _T_4322; // @[Reg.scala 27:20] + wire [3:0] buf_ldfwd = {_T_4328,_T_4326,_T_4324,_T_4322}; // @[Cat.scala 29:58] + reg [1:0] buf_ldfwdtag_0; // @[Reg.scala 27:20] + wire [2:0] _GEN_360 = {{1'd0}, buf_ldfwdtag_0}; // @[el2_lsu_bus_buffer.scala 522:47] + wire _T_3659 = io_lsu_axi_rid == _GEN_360; // @[el2_lsu_bus_buffer.scala 522:47] + wire _T_3660 = buf_ldfwd[0] & _T_3659; // @[el2_lsu_bus_buffer.scala 522:27] + wire _T_3661 = _T_3657 | _T_3660; // @[el2_lsu_bus_buffer.scala 521:77] + wire _T_3662 = buf_dual_0 & buf_dualhi_0; // @[el2_lsu_bus_buffer.scala 523:26] + wire _T_3664 = ~buf_write[0]; // @[el2_lsu_bus_buffer.scala 523:44] + wire _T_3665 = _T_3662 & _T_3664; // @[el2_lsu_bus_buffer.scala 523:42] + wire _T_3666 = _T_3665 & buf_samedw_0; // @[el2_lsu_bus_buffer.scala 523:58] + reg [1:0] buf_dualtag_0; // @[Reg.scala 27:20] + wire [2:0] _GEN_361 = {{1'd0}, buf_dualtag_0}; // @[el2_lsu_bus_buffer.scala 523:94] + wire _T_3667 = io_lsu_axi_rid == _GEN_361; // @[el2_lsu_bus_buffer.scala 523:94] + wire _T_3668 = _T_3666 & _T_3667; // @[el2_lsu_bus_buffer.scala 523:74] + wire _T_3669 = _T_3661 | _T_3668; // @[el2_lsu_bus_buffer.scala 522:71] + wire _T_3670 = bus_rsp_read & _T_3669; // @[el2_lsu_bus_buffer.scala 521:25] + wire _T_3671 = _T_3656 | _T_3670; // @[el2_lsu_bus_buffer.scala 520:105] + wire _GEN_42 = _T_3610 & _T_3671; // @[Conditional.scala 39:67] + wire _GEN_61 = _T_3576 ? 1'h0 : _GEN_42; // @[Conditional.scala 39:67] + wire _GEN_73 = _T_3572 ? 1'h0 : _GEN_61; // @[Conditional.scala 39:67] + wire buf_resp_state_bus_en_0 = _T_3549 ? 1'h0 : _GEN_73; // @[Conditional.scala 40:58] + wire _T_3697 = 3'h4 == buf_state_0; // @[Conditional.scala 37:30] + wire [3:0] _T_3707 = buf_ldfwd >> buf_dualtag_0; // @[el2_lsu_bus_buffer.scala 535:21] + reg [1:0] buf_ldfwdtag_3; // @[Reg.scala 27:20] + reg [1:0] buf_ldfwdtag_2; // @[Reg.scala 27:20] + reg [1:0] buf_ldfwdtag_1; // @[Reg.scala 27:20] + wire [1:0] _GEN_23 = 2'h1 == buf_dualtag_0 ? buf_ldfwdtag_1 : buf_ldfwdtag_0; // @[el2_lsu_bus_buffer.scala 535:58] + wire [1:0] _GEN_24 = 2'h2 == buf_dualtag_0 ? buf_ldfwdtag_2 : _GEN_23; // @[el2_lsu_bus_buffer.scala 535:58] + wire [1:0] _GEN_25 = 2'h3 == buf_dualtag_0 ? buf_ldfwdtag_3 : _GEN_24; // @[el2_lsu_bus_buffer.scala 535:58] + wire [2:0] _GEN_363 = {{1'd0}, _GEN_25}; // @[el2_lsu_bus_buffer.scala 535:58] + wire _T_3709 = io_lsu_axi_rid == _GEN_363; // @[el2_lsu_bus_buffer.scala 535:58] + wire _T_3710 = _T_3707[0] & _T_3709; // @[el2_lsu_bus_buffer.scala 535:38] + wire _T_3711 = _T_3667 | _T_3710; // @[el2_lsu_bus_buffer.scala 534:95] + wire _T_3712 = bus_rsp_read & _T_3711; // @[el2_lsu_bus_buffer.scala 534:45] + wire _GEN_36 = _T_3697 & _T_3712; // @[Conditional.scala 39:67] + wire _GEN_43 = _T_3610 ? buf_resp_state_bus_en_0 : _GEN_36; // @[Conditional.scala 39:67] + wire _GEN_53 = _T_3576 ? buf_cmd_state_bus_en_0 : _GEN_43; // @[Conditional.scala 39:67] + wire _GEN_66 = _T_3572 ? 1'h0 : _GEN_53; // @[Conditional.scala 39:67] + wire buf_state_bus_en_0 = _T_3549 ? 1'h0 : _GEN_66; // @[Conditional.scala 40:58] + wire _T_3589 = buf_state_bus_en_0 & io_lsu_bus_clk_en; // @[el2_lsu_bus_buffer.scala 508:49] + wire _T_3590 = _T_3589 | io_dec_tlu_force_halt; // @[el2_lsu_bus_buffer.scala 508:70] + wire _T_3715 = 3'h5 == buf_state_0; // @[Conditional.scala 37:30] + wire [1:0] RspPtr = _T_2148[1:0]; // @[el2_lsu_bus_buffer.scala 445:10] + wire _T_3718 = RspPtr == 2'h0; // @[el2_lsu_bus_buffer.scala 540:37] + wire _T_3719 = buf_dualtag_0 == RspPtr; // @[el2_lsu_bus_buffer.scala 540:98] + wire _T_3720 = buf_dual_0 & _T_3719; // @[el2_lsu_bus_buffer.scala 540:80] + wire _T_3721 = _T_3718 | _T_3720; // @[el2_lsu_bus_buffer.scala 540:65] + wire _T_3722 = _T_3721 | io_dec_tlu_force_halt; // @[el2_lsu_bus_buffer.scala 540:112] + wire _T_3723 = 3'h6 == buf_state_0; // @[Conditional.scala 37:30] + wire _GEN_31 = _T_3715 ? _T_3722 : _T_3723; // @[Conditional.scala 39:67] + wire _GEN_37 = _T_3697 ? _T_3590 : _GEN_31; // @[Conditional.scala 39:67] + wire _GEN_44 = _T_3610 ? _T_3590 : _GEN_37; // @[Conditional.scala 39:67] + wire _GEN_54 = _T_3576 ? _T_3590 : _GEN_44; // @[Conditional.scala 39:67] + wire _GEN_64 = _T_3572 ? _T_3575 : _GEN_54; // @[Conditional.scala 39:67] + wire buf_state_en_0 = _T_3549 ? _T_3565 : _GEN_64; // @[Conditional.scala 40:58] + wire _T_2150 = _T_1874 & buf_state_en_0; // @[el2_lsu_bus_buffer.scala 457:94] + wire _T_2156 = ibuf_drain_vld & io_lsu_busreq_r; // @[el2_lsu_bus_buffer.scala 459:23] + wire _T_2158 = _T_2156 & _T_3553; // @[el2_lsu_bus_buffer.scala 459:41] + wire _T_2160 = _T_2158 & _T_1877; // @[el2_lsu_bus_buffer.scala 459:71] + wire _T_2162 = _T_2160 & _T_1875; // @[el2_lsu_bus_buffer.scala 459:92] + wire _T_2163 = _T_4492 | _T_2162; // @[el2_lsu_bus_buffer.scala 458:86] + wire _T_2164 = ibuf_byp & io_lsu_busreq_r; // @[el2_lsu_bus_buffer.scala 460:17] + wire _T_2165 = _T_2164 & io_ldst_dual_r; // @[el2_lsu_bus_buffer.scala 460:35] + wire _T_2167 = _T_2165 & _T_1878; // @[el2_lsu_bus_buffer.scala 460:52] + wire _T_2169 = _T_2167 & _T_1877; // @[el2_lsu_bus_buffer.scala 460:73] + wire _T_2170 = _T_2163 | _T_2169; // @[el2_lsu_bus_buffer.scala 459:114] + wire _T_2171 = _T_2150 & _T_2170; // @[el2_lsu_bus_buffer.scala 457:113] + wire _T_2173 = _T_2171 | buf_age_0[0]; // @[el2_lsu_bus_buffer.scala 460:97] + wire _T_2187 = _T_2160 & _T_1886; // @[el2_lsu_bus_buffer.scala 459:92] + wire _T_2188 = _T_4497 | _T_2187; // @[el2_lsu_bus_buffer.scala 458:86] + wire _T_2194 = _T_2167 & _T_1888; // @[el2_lsu_bus_buffer.scala 460:73] + wire _T_2195 = _T_2188 | _T_2194; // @[el2_lsu_bus_buffer.scala 459:114] + wire _T_2196 = _T_2150 & _T_2195; // @[el2_lsu_bus_buffer.scala 457:113] + wire _T_2198 = _T_2196 | buf_age_0[1]; // @[el2_lsu_bus_buffer.scala 460:97] + wire _T_2212 = _T_2160 & _T_1897; // @[el2_lsu_bus_buffer.scala 459:92] + wire _T_2213 = _T_4502 | _T_2212; // @[el2_lsu_bus_buffer.scala 458:86] + wire _T_2219 = _T_2167 & _T_1899; // @[el2_lsu_bus_buffer.scala 460:73] + wire _T_2220 = _T_2213 | _T_2219; // @[el2_lsu_bus_buffer.scala 459:114] + wire _T_2221 = _T_2150 & _T_2220; // @[el2_lsu_bus_buffer.scala 457:113] + wire _T_2223 = _T_2221 | buf_age_0[2]; // @[el2_lsu_bus_buffer.scala 460:97] + wire _T_2237 = _T_2160 & _T_1908; // @[el2_lsu_bus_buffer.scala 459:92] + wire _T_2238 = _T_4507 | _T_2237; // @[el2_lsu_bus_buffer.scala 458:86] + wire _T_2244 = _T_2167 & _T_1910; // @[el2_lsu_bus_buffer.scala 460:73] + wire _T_2245 = _T_2238 | _T_2244; // @[el2_lsu_bus_buffer.scala 459:114] + wire _T_2246 = _T_2150 & _T_2245; // @[el2_lsu_bus_buffer.scala 457:113] + wire _T_2248 = _T_2246 | buf_age_0[3]; // @[el2_lsu_bus_buffer.scala 460:97] + wire [2:0] _T_2250 = {_T_2248,_T_2223,_T_2198}; // @[Cat.scala 29:58] + wire _T_3749 = 2'h1 == WrPtr0_r; // @[el2_lsu_bus_buffer.scala 495:117] + wire _T_3750 = _T_3555 & _T_3749; // @[el2_lsu_bus_buffer.scala 495:112] + wire _T_3752 = 2'h1 == WrPtr1_r; // @[el2_lsu_bus_buffer.scala 495:166] + wire _T_3753 = _T_3558 & _T_3752; // @[el2_lsu_bus_buffer.scala 495:161] + wire _T_3754 = _T_3750 | _T_3753; // @[el2_lsu_bus_buffer.scala 495:132] + wire _T_3755 = _T_853 & _T_3754; // @[el2_lsu_bus_buffer.scala 495:63] + wire _T_3756 = 2'h1 == ibuf_tag; // @[el2_lsu_bus_buffer.scala 495:206] + wire _T_3757 = ibuf_drain_vld & _T_3756; // @[el2_lsu_bus_buffer.scala 495:201] + wire _T_3758 = _T_3755 | _T_3757; // @[el2_lsu_bus_buffer.scala 495:183] + wire _T_3803 = 3'h3 == buf_state_1; // @[Conditional.scala 37:30] + wire _T_3848 = io_lsu_axi_bid == 3'h1; // @[el2_lsu_bus_buffer.scala 520:73] + wire _T_3849 = bus_rsp_write & _T_3848; // @[el2_lsu_bus_buffer.scala 520:52] + wire _T_3850 = io_lsu_axi_rid == 3'h1; // @[el2_lsu_bus_buffer.scala 521:46] + wire [2:0] _GEN_364 = {{1'd0}, buf_ldfwdtag_1}; // @[el2_lsu_bus_buffer.scala 522:47] + wire _T_3852 = io_lsu_axi_rid == _GEN_364; // @[el2_lsu_bus_buffer.scala 522:47] + wire _T_3853 = buf_ldfwd[1] & _T_3852; // @[el2_lsu_bus_buffer.scala 522:27] + wire _T_3854 = _T_3850 | _T_3853; // @[el2_lsu_bus_buffer.scala 521:77] + wire _T_3855 = buf_dual_1 & buf_dualhi_1; // @[el2_lsu_bus_buffer.scala 523:26] + wire _T_3857 = ~buf_write[1]; // @[el2_lsu_bus_buffer.scala 523:44] + wire _T_3858 = _T_3855 & _T_3857; // @[el2_lsu_bus_buffer.scala 523:42] + wire _T_3859 = _T_3858 & buf_samedw_1; // @[el2_lsu_bus_buffer.scala 523:58] + reg [1:0] buf_dualtag_1; // @[Reg.scala 27:20] + wire [2:0] _GEN_365 = {{1'd0}, buf_dualtag_1}; // @[el2_lsu_bus_buffer.scala 523:94] + wire _T_3860 = io_lsu_axi_rid == _GEN_365; // @[el2_lsu_bus_buffer.scala 523:94] + wire _T_3861 = _T_3859 & _T_3860; // @[el2_lsu_bus_buffer.scala 523:74] + wire _T_3862 = _T_3854 | _T_3861; // @[el2_lsu_bus_buffer.scala 522:71] + wire _T_3863 = bus_rsp_read & _T_3862; // @[el2_lsu_bus_buffer.scala 521:25] + wire _T_3864 = _T_3849 | _T_3863; // @[el2_lsu_bus_buffer.scala 520:105] + wire _GEN_118 = _T_3803 & _T_3864; // @[Conditional.scala 39:67] + wire _GEN_137 = _T_3769 ? 1'h0 : _GEN_118; // @[Conditional.scala 39:67] + wire _GEN_149 = _T_3765 ? 1'h0 : _GEN_137; // @[Conditional.scala 39:67] + wire buf_resp_state_bus_en_1 = _T_3742 ? 1'h0 : _GEN_149; // @[Conditional.scala 40:58] + wire _T_3890 = 3'h4 == buf_state_1; // @[Conditional.scala 37:30] + wire [3:0] _T_3900 = buf_ldfwd >> buf_dualtag_1; // @[el2_lsu_bus_buffer.scala 535:21] + wire [1:0] _GEN_99 = 2'h1 == buf_dualtag_1 ? buf_ldfwdtag_1 : buf_ldfwdtag_0; // @[el2_lsu_bus_buffer.scala 535:58] + wire [1:0] _GEN_100 = 2'h2 == buf_dualtag_1 ? buf_ldfwdtag_2 : _GEN_99; // @[el2_lsu_bus_buffer.scala 535:58] + wire [1:0] _GEN_101 = 2'h3 == buf_dualtag_1 ? buf_ldfwdtag_3 : _GEN_100; // @[el2_lsu_bus_buffer.scala 535:58] + wire [2:0] _GEN_367 = {{1'd0}, _GEN_101}; // @[el2_lsu_bus_buffer.scala 535:58] + wire _T_3902 = io_lsu_axi_rid == _GEN_367; // @[el2_lsu_bus_buffer.scala 535:58] + wire _T_3903 = _T_3900[0] & _T_3902; // @[el2_lsu_bus_buffer.scala 535:38] + wire _T_3904 = _T_3860 | _T_3903; // @[el2_lsu_bus_buffer.scala 534:95] + wire _T_3905 = bus_rsp_read & _T_3904; // @[el2_lsu_bus_buffer.scala 534:45] + wire _GEN_112 = _T_3890 & _T_3905; // @[Conditional.scala 39:67] + wire _GEN_119 = _T_3803 ? buf_resp_state_bus_en_1 : _GEN_112; // @[Conditional.scala 39:67] + wire _GEN_129 = _T_3769 ? buf_cmd_state_bus_en_1 : _GEN_119; // @[Conditional.scala 39:67] + wire _GEN_142 = _T_3765 ? 1'h0 : _GEN_129; // @[Conditional.scala 39:67] + wire buf_state_bus_en_1 = _T_3742 ? 1'h0 : _GEN_142; // @[Conditional.scala 40:58] + wire _T_3782 = buf_state_bus_en_1 & io_lsu_bus_clk_en; // @[el2_lsu_bus_buffer.scala 508:49] + wire _T_3783 = _T_3782 | io_dec_tlu_force_halt; // @[el2_lsu_bus_buffer.scala 508:70] + wire _T_3908 = 3'h5 == buf_state_1; // @[Conditional.scala 37:30] + wire _T_3911 = RspPtr == 2'h1; // @[el2_lsu_bus_buffer.scala 540:37] + wire _T_3912 = buf_dualtag_1 == RspPtr; // @[el2_lsu_bus_buffer.scala 540:98] + wire _T_3913 = buf_dual_1 & _T_3912; // @[el2_lsu_bus_buffer.scala 540:80] + wire _T_3914 = _T_3911 | _T_3913; // @[el2_lsu_bus_buffer.scala 540:65] + wire _T_3915 = _T_3914 | io_dec_tlu_force_halt; // @[el2_lsu_bus_buffer.scala 540:112] + wire _T_3916 = 3'h6 == buf_state_1; // @[Conditional.scala 37:30] + wire _GEN_107 = _T_3908 ? _T_3915 : _T_3916; // @[Conditional.scala 39:67] + wire _GEN_113 = _T_3890 ? _T_3783 : _GEN_107; // @[Conditional.scala 39:67] + wire _GEN_120 = _T_3803 ? _T_3783 : _GEN_113; // @[Conditional.scala 39:67] + wire _GEN_130 = _T_3769 ? _T_3783 : _GEN_120; // @[Conditional.scala 39:67] + wire _GEN_140 = _T_3765 ? _T_3575 : _GEN_130; // @[Conditional.scala 39:67] + wire buf_state_en_1 = _T_3742 ? _T_3758 : _GEN_140; // @[Conditional.scala 40:58] + wire _T_2252 = _T_1885 & buf_state_en_1; // @[el2_lsu_bus_buffer.scala 457:94] + wire _T_2262 = _T_2158 & _T_1888; // @[el2_lsu_bus_buffer.scala 459:71] + wire _T_2264 = _T_2262 & _T_1875; // @[el2_lsu_bus_buffer.scala 459:92] + wire _T_2265 = _T_4492 | _T_2264; // @[el2_lsu_bus_buffer.scala 458:86] + wire _T_2269 = _T_2165 & _T_1889; // @[el2_lsu_bus_buffer.scala 460:52] + wire _T_2271 = _T_2269 & _T_1877; // @[el2_lsu_bus_buffer.scala 460:73] + wire _T_2272 = _T_2265 | _T_2271; // @[el2_lsu_bus_buffer.scala 459:114] + wire _T_2273 = _T_2252 & _T_2272; // @[el2_lsu_bus_buffer.scala 457:113] + wire _T_2275 = _T_2273 | buf_age_1[0]; // @[el2_lsu_bus_buffer.scala 460:97] + wire _T_2289 = _T_2262 & _T_1886; // @[el2_lsu_bus_buffer.scala 459:92] + wire _T_2290 = _T_4497 | _T_2289; // @[el2_lsu_bus_buffer.scala 458:86] + wire _T_2296 = _T_2269 & _T_1888; // @[el2_lsu_bus_buffer.scala 460:73] + wire _T_2297 = _T_2290 | _T_2296; // @[el2_lsu_bus_buffer.scala 459:114] + wire _T_2298 = _T_2252 & _T_2297; // @[el2_lsu_bus_buffer.scala 457:113] + wire _T_2300 = _T_2298 | buf_age_1[1]; // @[el2_lsu_bus_buffer.scala 460:97] + wire _T_2314 = _T_2262 & _T_1897; // @[el2_lsu_bus_buffer.scala 459:92] + wire _T_2315 = _T_4502 | _T_2314; // @[el2_lsu_bus_buffer.scala 458:86] + wire _T_2321 = _T_2269 & _T_1899; // @[el2_lsu_bus_buffer.scala 460:73] + wire _T_2322 = _T_2315 | _T_2321; // @[el2_lsu_bus_buffer.scala 459:114] + wire _T_2323 = _T_2252 & _T_2322; // @[el2_lsu_bus_buffer.scala 457:113] + wire _T_2325 = _T_2323 | buf_age_1[2]; // @[el2_lsu_bus_buffer.scala 460:97] + wire _T_2339 = _T_2262 & _T_1908; // @[el2_lsu_bus_buffer.scala 459:92] + wire _T_2340 = _T_4507 | _T_2339; // @[el2_lsu_bus_buffer.scala 458:86] + wire _T_2346 = _T_2269 & _T_1910; // @[el2_lsu_bus_buffer.scala 460:73] + wire _T_2347 = _T_2340 | _T_2346; // @[el2_lsu_bus_buffer.scala 459:114] + wire _T_2348 = _T_2252 & _T_2347; // @[el2_lsu_bus_buffer.scala 457:113] + wire _T_2350 = _T_2348 | buf_age_1[3]; // @[el2_lsu_bus_buffer.scala 460:97] + wire [2:0] _T_2352 = {_T_2350,_T_2325,_T_2300}; // @[Cat.scala 29:58] + wire _T_3942 = 2'h2 == WrPtr0_r; // @[el2_lsu_bus_buffer.scala 495:117] + wire _T_3943 = _T_3555 & _T_3942; // @[el2_lsu_bus_buffer.scala 495:112] + wire _T_3945 = 2'h2 == WrPtr1_r; // @[el2_lsu_bus_buffer.scala 495:166] + wire _T_3946 = _T_3558 & _T_3945; // @[el2_lsu_bus_buffer.scala 495:161] + wire _T_3947 = _T_3943 | _T_3946; // @[el2_lsu_bus_buffer.scala 495:132] + wire _T_3948 = _T_853 & _T_3947; // @[el2_lsu_bus_buffer.scala 495:63] + wire _T_3949 = 2'h2 == ibuf_tag; // @[el2_lsu_bus_buffer.scala 495:206] + wire _T_3950 = ibuf_drain_vld & _T_3949; // @[el2_lsu_bus_buffer.scala 495:201] + wire _T_3951 = _T_3948 | _T_3950; // @[el2_lsu_bus_buffer.scala 495:183] + wire _T_3996 = 3'h3 == buf_state_2; // @[Conditional.scala 37:30] + wire _T_4041 = io_lsu_axi_bid == 3'h2; // @[el2_lsu_bus_buffer.scala 520:73] + wire _T_4042 = bus_rsp_write & _T_4041; // @[el2_lsu_bus_buffer.scala 520:52] + wire _T_4043 = io_lsu_axi_rid == 3'h2; // @[el2_lsu_bus_buffer.scala 521:46] + wire [2:0] _GEN_368 = {{1'd0}, buf_ldfwdtag_2}; // @[el2_lsu_bus_buffer.scala 522:47] + wire _T_4045 = io_lsu_axi_rid == _GEN_368; // @[el2_lsu_bus_buffer.scala 522:47] + wire _T_4046 = buf_ldfwd[2] & _T_4045; // @[el2_lsu_bus_buffer.scala 522:27] + wire _T_4047 = _T_4043 | _T_4046; // @[el2_lsu_bus_buffer.scala 521:77] + wire _T_4048 = buf_dual_2 & buf_dualhi_2; // @[el2_lsu_bus_buffer.scala 523:26] + wire _T_4050 = ~buf_write[2]; // @[el2_lsu_bus_buffer.scala 523:44] + wire _T_4051 = _T_4048 & _T_4050; // @[el2_lsu_bus_buffer.scala 523:42] + wire _T_4052 = _T_4051 & buf_samedw_2; // @[el2_lsu_bus_buffer.scala 523:58] + reg [1:0] buf_dualtag_2; // @[Reg.scala 27:20] + wire [2:0] _GEN_369 = {{1'd0}, buf_dualtag_2}; // @[el2_lsu_bus_buffer.scala 523:94] + wire _T_4053 = io_lsu_axi_rid == _GEN_369; // @[el2_lsu_bus_buffer.scala 523:94] + wire _T_4054 = _T_4052 & _T_4053; // @[el2_lsu_bus_buffer.scala 523:74] + wire _T_4055 = _T_4047 | _T_4054; // @[el2_lsu_bus_buffer.scala 522:71] + wire _T_4056 = bus_rsp_read & _T_4055; // @[el2_lsu_bus_buffer.scala 521:25] + wire _T_4057 = _T_4042 | _T_4056; // @[el2_lsu_bus_buffer.scala 520:105] + wire _GEN_194 = _T_3996 & _T_4057; // @[Conditional.scala 39:67] + wire _GEN_213 = _T_3962 ? 1'h0 : _GEN_194; // @[Conditional.scala 39:67] + wire _GEN_225 = _T_3958 ? 1'h0 : _GEN_213; // @[Conditional.scala 39:67] + wire buf_resp_state_bus_en_2 = _T_3935 ? 1'h0 : _GEN_225; // @[Conditional.scala 40:58] + wire _T_4083 = 3'h4 == buf_state_2; // @[Conditional.scala 37:30] + wire [3:0] _T_4093 = buf_ldfwd >> buf_dualtag_2; // @[el2_lsu_bus_buffer.scala 535:21] + wire [1:0] _GEN_175 = 2'h1 == buf_dualtag_2 ? buf_ldfwdtag_1 : buf_ldfwdtag_0; // @[el2_lsu_bus_buffer.scala 535:58] + wire [1:0] _GEN_176 = 2'h2 == buf_dualtag_2 ? buf_ldfwdtag_2 : _GEN_175; // @[el2_lsu_bus_buffer.scala 535:58] + wire [1:0] _GEN_177 = 2'h3 == buf_dualtag_2 ? buf_ldfwdtag_3 : _GEN_176; // @[el2_lsu_bus_buffer.scala 535:58] + wire [2:0] _GEN_371 = {{1'd0}, _GEN_177}; // @[el2_lsu_bus_buffer.scala 535:58] + wire _T_4095 = io_lsu_axi_rid == _GEN_371; // @[el2_lsu_bus_buffer.scala 535:58] + wire _T_4096 = _T_4093[0] & _T_4095; // @[el2_lsu_bus_buffer.scala 535:38] + wire _T_4097 = _T_4053 | _T_4096; // @[el2_lsu_bus_buffer.scala 534:95] + wire _T_4098 = bus_rsp_read & _T_4097; // @[el2_lsu_bus_buffer.scala 534:45] + wire _GEN_188 = _T_4083 & _T_4098; // @[Conditional.scala 39:67] + wire _GEN_195 = _T_3996 ? buf_resp_state_bus_en_2 : _GEN_188; // @[Conditional.scala 39:67] + wire _GEN_205 = _T_3962 ? buf_cmd_state_bus_en_2 : _GEN_195; // @[Conditional.scala 39:67] + wire _GEN_218 = _T_3958 ? 1'h0 : _GEN_205; // @[Conditional.scala 39:67] + wire buf_state_bus_en_2 = _T_3935 ? 1'h0 : _GEN_218; // @[Conditional.scala 40:58] + wire _T_3975 = buf_state_bus_en_2 & io_lsu_bus_clk_en; // @[el2_lsu_bus_buffer.scala 508:49] + wire _T_3976 = _T_3975 | io_dec_tlu_force_halt; // @[el2_lsu_bus_buffer.scala 508:70] + wire _T_4101 = 3'h5 == buf_state_2; // @[Conditional.scala 37:30] + wire _T_4104 = RspPtr == 2'h2; // @[el2_lsu_bus_buffer.scala 540:37] + wire _T_4105 = buf_dualtag_2 == RspPtr; // @[el2_lsu_bus_buffer.scala 540:98] + wire _T_4106 = buf_dual_2 & _T_4105; // @[el2_lsu_bus_buffer.scala 540:80] + wire _T_4107 = _T_4104 | _T_4106; // @[el2_lsu_bus_buffer.scala 540:65] + wire _T_4108 = _T_4107 | io_dec_tlu_force_halt; // @[el2_lsu_bus_buffer.scala 540:112] + wire _T_4109 = 3'h6 == buf_state_2; // @[Conditional.scala 37:30] + wire _GEN_183 = _T_4101 ? _T_4108 : _T_4109; // @[Conditional.scala 39:67] + wire _GEN_189 = _T_4083 ? _T_3976 : _GEN_183; // @[Conditional.scala 39:67] + wire _GEN_196 = _T_3996 ? _T_3976 : _GEN_189; // @[Conditional.scala 39:67] + wire _GEN_206 = _T_3962 ? _T_3976 : _GEN_196; // @[Conditional.scala 39:67] + wire _GEN_216 = _T_3958 ? _T_3575 : _GEN_206; // @[Conditional.scala 39:67] + wire buf_state_en_2 = _T_3935 ? _T_3951 : _GEN_216; // @[Conditional.scala 40:58] + wire _T_2354 = _T_1896 & buf_state_en_2; // @[el2_lsu_bus_buffer.scala 457:94] + wire _T_2364 = _T_2158 & _T_1899; // @[el2_lsu_bus_buffer.scala 459:71] + wire _T_2366 = _T_2364 & _T_1875; // @[el2_lsu_bus_buffer.scala 459:92] + wire _T_2367 = _T_4492 | _T_2366; // @[el2_lsu_bus_buffer.scala 458:86] + wire _T_2371 = _T_2165 & _T_1900; // @[el2_lsu_bus_buffer.scala 460:52] + wire _T_2373 = _T_2371 & _T_1877; // @[el2_lsu_bus_buffer.scala 460:73] + wire _T_2374 = _T_2367 | _T_2373; // @[el2_lsu_bus_buffer.scala 459:114] + wire _T_2375 = _T_2354 & _T_2374; // @[el2_lsu_bus_buffer.scala 457:113] + wire _T_2377 = _T_2375 | buf_age_2[0]; // @[el2_lsu_bus_buffer.scala 460:97] + wire _T_2391 = _T_2364 & _T_1886; // @[el2_lsu_bus_buffer.scala 459:92] + wire _T_2392 = _T_4497 | _T_2391; // @[el2_lsu_bus_buffer.scala 458:86] + wire _T_2398 = _T_2371 & _T_1888; // @[el2_lsu_bus_buffer.scala 460:73] + wire _T_2399 = _T_2392 | _T_2398; // @[el2_lsu_bus_buffer.scala 459:114] + wire _T_2400 = _T_2354 & _T_2399; // @[el2_lsu_bus_buffer.scala 457:113] + wire _T_2402 = _T_2400 | buf_age_2[1]; // @[el2_lsu_bus_buffer.scala 460:97] + wire _T_2416 = _T_2364 & _T_1897; // @[el2_lsu_bus_buffer.scala 459:92] + wire _T_2417 = _T_4502 | _T_2416; // @[el2_lsu_bus_buffer.scala 458:86] + wire _T_2423 = _T_2371 & _T_1899; // @[el2_lsu_bus_buffer.scala 460:73] + wire _T_2424 = _T_2417 | _T_2423; // @[el2_lsu_bus_buffer.scala 459:114] + wire _T_2425 = _T_2354 & _T_2424; // @[el2_lsu_bus_buffer.scala 457:113] + wire _T_2427 = _T_2425 | buf_age_2[2]; // @[el2_lsu_bus_buffer.scala 460:97] + wire _T_2441 = _T_2364 & _T_1908; // @[el2_lsu_bus_buffer.scala 459:92] + wire _T_2442 = _T_4507 | _T_2441; // @[el2_lsu_bus_buffer.scala 458:86] + wire _T_2448 = _T_2371 & _T_1910; // @[el2_lsu_bus_buffer.scala 460:73] + wire _T_2449 = _T_2442 | _T_2448; // @[el2_lsu_bus_buffer.scala 459:114] + wire _T_2450 = _T_2354 & _T_2449; // @[el2_lsu_bus_buffer.scala 457:113] + wire _T_2452 = _T_2450 | buf_age_2[3]; // @[el2_lsu_bus_buffer.scala 460:97] + wire [2:0] _T_2454 = {_T_2452,_T_2427,_T_2402}; // @[Cat.scala 29:58] + wire _T_4135 = 2'h3 == WrPtr0_r; // @[el2_lsu_bus_buffer.scala 495:117] + wire _T_4136 = _T_3555 & _T_4135; // @[el2_lsu_bus_buffer.scala 495:112] + wire _T_4138 = 2'h3 == WrPtr1_r; // @[el2_lsu_bus_buffer.scala 495:166] + wire _T_4139 = _T_3558 & _T_4138; // @[el2_lsu_bus_buffer.scala 495:161] + wire _T_4140 = _T_4136 | _T_4139; // @[el2_lsu_bus_buffer.scala 495:132] + wire _T_4141 = _T_853 & _T_4140; // @[el2_lsu_bus_buffer.scala 495:63] + wire _T_4142 = 2'h3 == ibuf_tag; // @[el2_lsu_bus_buffer.scala 495:206] + wire _T_4143 = ibuf_drain_vld & _T_4142; // @[el2_lsu_bus_buffer.scala 495:201] + wire _T_4144 = _T_4141 | _T_4143; // @[el2_lsu_bus_buffer.scala 495:183] + wire _T_4189 = 3'h3 == buf_state_3; // @[Conditional.scala 37:30] + wire _T_4234 = io_lsu_axi_bid == 3'h3; // @[el2_lsu_bus_buffer.scala 520:73] + wire _T_4235 = bus_rsp_write & _T_4234; // @[el2_lsu_bus_buffer.scala 520:52] + wire _T_4236 = io_lsu_axi_rid == 3'h3; // @[el2_lsu_bus_buffer.scala 521:46] + wire [2:0] _GEN_372 = {{1'd0}, buf_ldfwdtag_3}; // @[el2_lsu_bus_buffer.scala 522:47] + wire _T_4238 = io_lsu_axi_rid == _GEN_372; // @[el2_lsu_bus_buffer.scala 522:47] + wire _T_4239 = buf_ldfwd[3] & _T_4238; // @[el2_lsu_bus_buffer.scala 522:27] + wire _T_4240 = _T_4236 | _T_4239; // @[el2_lsu_bus_buffer.scala 521:77] + wire _T_4241 = buf_dual_3 & buf_dualhi_3; // @[el2_lsu_bus_buffer.scala 523:26] + wire _T_4243 = ~buf_write[3]; // @[el2_lsu_bus_buffer.scala 523:44] + wire _T_4244 = _T_4241 & _T_4243; // @[el2_lsu_bus_buffer.scala 523:42] + wire _T_4245 = _T_4244 & buf_samedw_3; // @[el2_lsu_bus_buffer.scala 523:58] + reg [1:0] buf_dualtag_3; // @[Reg.scala 27:20] + wire [2:0] _GEN_373 = {{1'd0}, buf_dualtag_3}; // @[el2_lsu_bus_buffer.scala 523:94] + wire _T_4246 = io_lsu_axi_rid == _GEN_373; // @[el2_lsu_bus_buffer.scala 523:94] + wire _T_4247 = _T_4245 & _T_4246; // @[el2_lsu_bus_buffer.scala 523:74] + wire _T_4248 = _T_4240 | _T_4247; // @[el2_lsu_bus_buffer.scala 522:71] + wire _T_4249 = bus_rsp_read & _T_4248; // @[el2_lsu_bus_buffer.scala 521:25] + wire _T_4250 = _T_4235 | _T_4249; // @[el2_lsu_bus_buffer.scala 520:105] + wire _GEN_270 = _T_4189 & _T_4250; // @[Conditional.scala 39:67] + wire _GEN_289 = _T_4155 ? 1'h0 : _GEN_270; // @[Conditional.scala 39:67] + wire _GEN_301 = _T_4151 ? 1'h0 : _GEN_289; // @[Conditional.scala 39:67] + wire buf_resp_state_bus_en_3 = _T_4128 ? 1'h0 : _GEN_301; // @[Conditional.scala 40:58] + wire _T_4276 = 3'h4 == buf_state_3; // @[Conditional.scala 37:30] + wire [3:0] _T_4286 = buf_ldfwd >> buf_dualtag_3; // @[el2_lsu_bus_buffer.scala 535:21] + wire [1:0] _GEN_251 = 2'h1 == buf_dualtag_3 ? buf_ldfwdtag_1 : buf_ldfwdtag_0; // @[el2_lsu_bus_buffer.scala 535:58] + wire [1:0] _GEN_252 = 2'h2 == buf_dualtag_3 ? buf_ldfwdtag_2 : _GEN_251; // @[el2_lsu_bus_buffer.scala 535:58] + wire [1:0] _GEN_253 = 2'h3 == buf_dualtag_3 ? buf_ldfwdtag_3 : _GEN_252; // @[el2_lsu_bus_buffer.scala 535:58] + wire [2:0] _GEN_375 = {{1'd0}, _GEN_253}; // @[el2_lsu_bus_buffer.scala 535:58] + wire _T_4288 = io_lsu_axi_rid == _GEN_375; // @[el2_lsu_bus_buffer.scala 535:58] + wire _T_4289 = _T_4286[0] & _T_4288; // @[el2_lsu_bus_buffer.scala 535:38] + wire _T_4290 = _T_4246 | _T_4289; // @[el2_lsu_bus_buffer.scala 534:95] + wire _T_4291 = bus_rsp_read & _T_4290; // @[el2_lsu_bus_buffer.scala 534:45] + wire _GEN_264 = _T_4276 & _T_4291; // @[Conditional.scala 39:67] + wire _GEN_271 = _T_4189 ? buf_resp_state_bus_en_3 : _GEN_264; // @[Conditional.scala 39:67] + wire _GEN_281 = _T_4155 ? buf_cmd_state_bus_en_3 : _GEN_271; // @[Conditional.scala 39:67] + wire _GEN_294 = _T_4151 ? 1'h0 : _GEN_281; // @[Conditional.scala 39:67] + wire buf_state_bus_en_3 = _T_4128 ? 1'h0 : _GEN_294; // @[Conditional.scala 40:58] + wire _T_4168 = buf_state_bus_en_3 & io_lsu_bus_clk_en; // @[el2_lsu_bus_buffer.scala 508:49] + wire _T_4169 = _T_4168 | io_dec_tlu_force_halt; // @[el2_lsu_bus_buffer.scala 508:70] + wire _T_4294 = 3'h5 == buf_state_3; // @[Conditional.scala 37:30] + wire _T_4297 = RspPtr == 2'h3; // @[el2_lsu_bus_buffer.scala 540:37] + wire _T_4298 = buf_dualtag_3 == RspPtr; // @[el2_lsu_bus_buffer.scala 540:98] + wire _T_4299 = buf_dual_3 & _T_4298; // @[el2_lsu_bus_buffer.scala 540:80] + wire _T_4300 = _T_4297 | _T_4299; // @[el2_lsu_bus_buffer.scala 540:65] + wire _T_4301 = _T_4300 | io_dec_tlu_force_halt; // @[el2_lsu_bus_buffer.scala 540:112] + wire _T_4302 = 3'h6 == buf_state_3; // @[Conditional.scala 37:30] + wire _GEN_259 = _T_4294 ? _T_4301 : _T_4302; // @[Conditional.scala 39:67] + wire _GEN_265 = _T_4276 ? _T_4169 : _GEN_259; // @[Conditional.scala 39:67] + wire _GEN_272 = _T_4189 ? _T_4169 : _GEN_265; // @[Conditional.scala 39:67] + wire _GEN_282 = _T_4155 ? _T_4169 : _GEN_272; // @[Conditional.scala 39:67] + wire _GEN_292 = _T_4151 ? _T_3575 : _GEN_282; // @[Conditional.scala 39:67] + wire buf_state_en_3 = _T_4128 ? _T_4144 : _GEN_292; // @[Conditional.scala 40:58] + wire _T_2456 = _T_1907 & buf_state_en_3; // @[el2_lsu_bus_buffer.scala 457:94] + wire _T_2466 = _T_2158 & _T_1910; // @[el2_lsu_bus_buffer.scala 459:71] + wire _T_2468 = _T_2466 & _T_1875; // @[el2_lsu_bus_buffer.scala 459:92] + wire _T_2469 = _T_4492 | _T_2468; // @[el2_lsu_bus_buffer.scala 458:86] + wire _T_2473 = _T_2165 & _T_1911; // @[el2_lsu_bus_buffer.scala 460:52] + wire _T_2475 = _T_2473 & _T_1877; // @[el2_lsu_bus_buffer.scala 460:73] + wire _T_2476 = _T_2469 | _T_2475; // @[el2_lsu_bus_buffer.scala 459:114] + wire _T_2477 = _T_2456 & _T_2476; // @[el2_lsu_bus_buffer.scala 457:113] + wire _T_2479 = _T_2477 | buf_age_3[0]; // @[el2_lsu_bus_buffer.scala 460:97] + wire _T_2493 = _T_2466 & _T_1886; // @[el2_lsu_bus_buffer.scala 459:92] + wire _T_2494 = _T_4497 | _T_2493; // @[el2_lsu_bus_buffer.scala 458:86] + wire _T_2500 = _T_2473 & _T_1888; // @[el2_lsu_bus_buffer.scala 460:73] + wire _T_2501 = _T_2494 | _T_2500; // @[el2_lsu_bus_buffer.scala 459:114] + wire _T_2502 = _T_2456 & _T_2501; // @[el2_lsu_bus_buffer.scala 457:113] + wire _T_2504 = _T_2502 | buf_age_3[1]; // @[el2_lsu_bus_buffer.scala 460:97] + wire _T_2518 = _T_2466 & _T_1897; // @[el2_lsu_bus_buffer.scala 459:92] + wire _T_2519 = _T_4502 | _T_2518; // @[el2_lsu_bus_buffer.scala 458:86] + wire _T_2525 = _T_2473 & _T_1899; // @[el2_lsu_bus_buffer.scala 460:73] + wire _T_2526 = _T_2519 | _T_2525; // @[el2_lsu_bus_buffer.scala 459:114] + wire _T_2527 = _T_2456 & _T_2526; // @[el2_lsu_bus_buffer.scala 457:113] + wire _T_2529 = _T_2527 | buf_age_3[2]; // @[el2_lsu_bus_buffer.scala 460:97] + wire _T_2543 = _T_2466 & _T_1908; // @[el2_lsu_bus_buffer.scala 459:92] + wire _T_2544 = _T_4507 | _T_2543; // @[el2_lsu_bus_buffer.scala 458:86] + wire _T_2550 = _T_2473 & _T_1910; // @[el2_lsu_bus_buffer.scala 460:73] + wire _T_2551 = _T_2544 | _T_2550; // @[el2_lsu_bus_buffer.scala 459:114] + wire _T_2552 = _T_2456 & _T_2551; // @[el2_lsu_bus_buffer.scala 457:113] + wire _T_2554 = _T_2552 | buf_age_3[3]; // @[el2_lsu_bus_buffer.scala 460:97] + wire [2:0] _T_2556 = {_T_2554,_T_2529,_T_2504}; // @[Cat.scala 29:58] + wire _T_2820 = buf_state_0 == 3'h6; // @[el2_lsu_bus_buffer.scala 468:49] + wire _T_2821 = _T_1874 | _T_2820; // @[el2_lsu_bus_buffer.scala 468:34] + wire _T_2822 = ~_T_2821; // @[el2_lsu_bus_buffer.scala 468:8] + wire _T_2830 = _T_2822 | _T_2162; // @[el2_lsu_bus_buffer.scala 468:61] + wire _T_2837 = _T_2830 | _T_2169; // @[el2_lsu_bus_buffer.scala 469:112] + wire _T_2838 = _T_2150 & _T_2837; // @[el2_lsu_bus_buffer.scala 467:114] + wire _T_2842 = buf_state_1 == 3'h6; // @[el2_lsu_bus_buffer.scala 468:49] + wire _T_2843 = _T_1885 | _T_2842; // @[el2_lsu_bus_buffer.scala 468:34] + wire _T_2844 = ~_T_2843; // @[el2_lsu_bus_buffer.scala 468:8] + wire _T_2852 = _T_2844 | _T_2187; // @[el2_lsu_bus_buffer.scala 468:61] + wire _T_2859 = _T_2852 | _T_2194; // @[el2_lsu_bus_buffer.scala 469:112] + wire _T_2860 = _T_2150 & _T_2859; // @[el2_lsu_bus_buffer.scala 467:114] + wire _T_2864 = buf_state_2 == 3'h6; // @[el2_lsu_bus_buffer.scala 468:49] + wire _T_2865 = _T_1896 | _T_2864; // @[el2_lsu_bus_buffer.scala 468:34] + wire _T_2866 = ~_T_2865; // @[el2_lsu_bus_buffer.scala 468:8] + wire _T_2874 = _T_2866 | _T_2212; // @[el2_lsu_bus_buffer.scala 468:61] + wire _T_2881 = _T_2874 | _T_2219; // @[el2_lsu_bus_buffer.scala 469:112] + wire _T_2882 = _T_2150 & _T_2881; // @[el2_lsu_bus_buffer.scala 467:114] + wire _T_2886 = buf_state_3 == 3'h6; // @[el2_lsu_bus_buffer.scala 468:49] + wire _T_2887 = _T_1907 | _T_2886; // @[el2_lsu_bus_buffer.scala 468:34] + wire _T_2888 = ~_T_2887; // @[el2_lsu_bus_buffer.scala 468:8] + wire _T_2896 = _T_2888 | _T_2237; // @[el2_lsu_bus_buffer.scala 468:61] + wire _T_2903 = _T_2896 | _T_2244; // @[el2_lsu_bus_buffer.scala 469:112] + wire _T_2904 = _T_2150 & _T_2903; // @[el2_lsu_bus_buffer.scala 467:114] + wire [3:0] buf_rspage_set_0 = {_T_2904,_T_2882,_T_2860,_T_2838}; // @[Cat.scala 29:58] + wire _T_2921 = _T_2822 | _T_2264; // @[el2_lsu_bus_buffer.scala 468:61] + wire _T_2928 = _T_2921 | _T_2271; // @[el2_lsu_bus_buffer.scala 469:112] + wire _T_2929 = _T_2252 & _T_2928; // @[el2_lsu_bus_buffer.scala 467:114] + wire _T_2943 = _T_2844 | _T_2289; // @[el2_lsu_bus_buffer.scala 468:61] + wire _T_2950 = _T_2943 | _T_2296; // @[el2_lsu_bus_buffer.scala 469:112] + wire _T_2951 = _T_2252 & _T_2950; // @[el2_lsu_bus_buffer.scala 467:114] + wire _T_2965 = _T_2866 | _T_2314; // @[el2_lsu_bus_buffer.scala 468:61] + wire _T_2972 = _T_2965 | _T_2321; // @[el2_lsu_bus_buffer.scala 469:112] + wire _T_2973 = _T_2252 & _T_2972; // @[el2_lsu_bus_buffer.scala 467:114] + wire _T_2987 = _T_2888 | _T_2339; // @[el2_lsu_bus_buffer.scala 468:61] + wire _T_2994 = _T_2987 | _T_2346; // @[el2_lsu_bus_buffer.scala 469:112] + wire _T_2995 = _T_2252 & _T_2994; // @[el2_lsu_bus_buffer.scala 467:114] + wire [3:0] buf_rspage_set_1 = {_T_2995,_T_2973,_T_2951,_T_2929}; // @[Cat.scala 29:58] + wire _T_3012 = _T_2822 | _T_2366; // @[el2_lsu_bus_buffer.scala 468:61] + wire _T_3019 = _T_3012 | _T_2373; // @[el2_lsu_bus_buffer.scala 469:112] + wire _T_3020 = _T_2354 & _T_3019; // @[el2_lsu_bus_buffer.scala 467:114] + wire _T_3034 = _T_2844 | _T_2391; // @[el2_lsu_bus_buffer.scala 468:61] + wire _T_3041 = _T_3034 | _T_2398; // @[el2_lsu_bus_buffer.scala 469:112] + wire _T_3042 = _T_2354 & _T_3041; // @[el2_lsu_bus_buffer.scala 467:114] + wire _T_3056 = _T_2866 | _T_2416; // @[el2_lsu_bus_buffer.scala 468:61] + wire _T_3063 = _T_3056 | _T_2423; // @[el2_lsu_bus_buffer.scala 469:112] + wire _T_3064 = _T_2354 & _T_3063; // @[el2_lsu_bus_buffer.scala 467:114] + wire _T_3078 = _T_2888 | _T_2441; // @[el2_lsu_bus_buffer.scala 468:61] + wire _T_3085 = _T_3078 | _T_2448; // @[el2_lsu_bus_buffer.scala 469:112] + wire _T_3086 = _T_2354 & _T_3085; // @[el2_lsu_bus_buffer.scala 467:114] + wire [3:0] buf_rspage_set_2 = {_T_3086,_T_3064,_T_3042,_T_3020}; // @[Cat.scala 29:58] + wire _T_3103 = _T_2822 | _T_2468; // @[el2_lsu_bus_buffer.scala 468:61] + wire _T_3110 = _T_3103 | _T_2475; // @[el2_lsu_bus_buffer.scala 469:112] + wire _T_3111 = _T_2456 & _T_3110; // @[el2_lsu_bus_buffer.scala 467:114] + wire _T_3125 = _T_2844 | _T_2493; // @[el2_lsu_bus_buffer.scala 468:61] + wire _T_3132 = _T_3125 | _T_2500; // @[el2_lsu_bus_buffer.scala 469:112] + wire _T_3133 = _T_2456 & _T_3132; // @[el2_lsu_bus_buffer.scala 467:114] + wire _T_3147 = _T_2866 | _T_2518; // @[el2_lsu_bus_buffer.scala 468:61] + wire _T_3154 = _T_3147 | _T_2525; // @[el2_lsu_bus_buffer.scala 469:112] + wire _T_3155 = _T_2456 & _T_3154; // @[el2_lsu_bus_buffer.scala 467:114] + wire _T_3169 = _T_2888 | _T_2543; // @[el2_lsu_bus_buffer.scala 468:61] + wire _T_3176 = _T_3169 | _T_2550; // @[el2_lsu_bus_buffer.scala 469:112] + wire _T_3177 = _T_2456 & _T_3176; // @[el2_lsu_bus_buffer.scala 467:114] + wire [3:0] buf_rspage_set_3 = {_T_3177,_T_3155,_T_3133,_T_3111}; // @[Cat.scala 29:58] + wire _T_3262 = _T_2886 | _T_1907; // @[el2_lsu_bus_buffer.scala 472:112] + wire _T_3263 = ~_T_3262; // @[el2_lsu_bus_buffer.scala 472:86] + wire _T_3264 = buf_rspageQ_0[3] & _T_3263; // @[el2_lsu_bus_buffer.scala 472:84] + wire _T_3256 = _T_2864 | _T_1896; // @[el2_lsu_bus_buffer.scala 472:112] + wire _T_3257 = ~_T_3256; // @[el2_lsu_bus_buffer.scala 472:86] + wire _T_3258 = buf_rspageQ_0[2] & _T_3257; // @[el2_lsu_bus_buffer.scala 472:84] + wire _T_3250 = _T_2842 | _T_1885; // @[el2_lsu_bus_buffer.scala 472:112] + wire _T_3251 = ~_T_3250; // @[el2_lsu_bus_buffer.scala 472:86] + wire _T_3252 = buf_rspageQ_0[1] & _T_3251; // @[el2_lsu_bus_buffer.scala 472:84] + wire _T_3244 = _T_2820 | _T_1874; // @[el2_lsu_bus_buffer.scala 472:112] + wire _T_3245 = ~_T_3244; // @[el2_lsu_bus_buffer.scala 472:86] + wire _T_3246 = buf_rspageQ_0[0] & _T_3245; // @[el2_lsu_bus_buffer.scala 472:84] + wire [3:0] buf_rspage_0 = {_T_3264,_T_3258,_T_3252,_T_3246}; // @[Cat.scala 29:58] + wire _T_3183 = buf_rspage_set_0[0] | buf_rspage_0[0]; // @[el2_lsu_bus_buffer.scala 471:90] + wire _T_3186 = buf_rspage_set_0[1] | buf_rspage_0[1]; // @[el2_lsu_bus_buffer.scala 471:90] + wire _T_3189 = buf_rspage_set_0[2] | buf_rspage_0[2]; // @[el2_lsu_bus_buffer.scala 471:90] + wire _T_3192 = buf_rspage_set_0[3] | buf_rspage_0[3]; // @[el2_lsu_bus_buffer.scala 471:90] + wire [2:0] _T_3194 = {_T_3192,_T_3189,_T_3186}; // @[Cat.scala 29:58] + wire _T_3291 = buf_rspageQ_1[3] & _T_3263; // @[el2_lsu_bus_buffer.scala 472:84] + wire _T_3285 = buf_rspageQ_1[2] & _T_3257; // @[el2_lsu_bus_buffer.scala 472:84] + wire _T_3279 = buf_rspageQ_1[1] & _T_3251; // @[el2_lsu_bus_buffer.scala 472:84] + wire _T_3273 = buf_rspageQ_1[0] & _T_3245; // @[el2_lsu_bus_buffer.scala 472:84] + wire [3:0] buf_rspage_1 = {_T_3291,_T_3285,_T_3279,_T_3273}; // @[Cat.scala 29:58] + wire _T_3198 = buf_rspage_set_1[0] | buf_rspage_1[0]; // @[el2_lsu_bus_buffer.scala 471:90] + wire _T_3201 = buf_rspage_set_1[1] | buf_rspage_1[1]; // @[el2_lsu_bus_buffer.scala 471:90] + wire _T_3204 = buf_rspage_set_1[2] | buf_rspage_1[2]; // @[el2_lsu_bus_buffer.scala 471:90] + wire _T_3207 = buf_rspage_set_1[3] | buf_rspage_1[3]; // @[el2_lsu_bus_buffer.scala 471:90] + wire [2:0] _T_3209 = {_T_3207,_T_3204,_T_3201}; // @[Cat.scala 29:58] + wire _T_3318 = buf_rspageQ_2[3] & _T_3263; // @[el2_lsu_bus_buffer.scala 472:84] + wire _T_3312 = buf_rspageQ_2[2] & _T_3257; // @[el2_lsu_bus_buffer.scala 472:84] + wire _T_3306 = buf_rspageQ_2[1] & _T_3251; // @[el2_lsu_bus_buffer.scala 472:84] + wire _T_3300 = buf_rspageQ_2[0] & _T_3245; // @[el2_lsu_bus_buffer.scala 472:84] + wire [3:0] buf_rspage_2 = {_T_3318,_T_3312,_T_3306,_T_3300}; // @[Cat.scala 29:58] + wire _T_3213 = buf_rspage_set_2[0] | buf_rspage_2[0]; // @[el2_lsu_bus_buffer.scala 471:90] + wire _T_3216 = buf_rspage_set_2[1] | buf_rspage_2[1]; // @[el2_lsu_bus_buffer.scala 471:90] + wire _T_3219 = buf_rspage_set_2[2] | buf_rspage_2[2]; // @[el2_lsu_bus_buffer.scala 471:90] + wire _T_3222 = buf_rspage_set_2[3] | buf_rspage_2[3]; // @[el2_lsu_bus_buffer.scala 471:90] + wire [2:0] _T_3224 = {_T_3222,_T_3219,_T_3216}; // @[Cat.scala 29:58] + wire _T_3345 = buf_rspageQ_3[3] & _T_3263; // @[el2_lsu_bus_buffer.scala 472:84] + wire _T_3339 = buf_rspageQ_3[2] & _T_3257; // @[el2_lsu_bus_buffer.scala 472:84] + wire _T_3333 = buf_rspageQ_3[1] & _T_3251; // @[el2_lsu_bus_buffer.scala 472:84] + wire _T_3327 = buf_rspageQ_3[0] & _T_3245; // @[el2_lsu_bus_buffer.scala 472:84] + wire [3:0] buf_rspage_3 = {_T_3345,_T_3339,_T_3333,_T_3327}; // @[Cat.scala 29:58] + wire _T_3228 = buf_rspage_set_3[0] | buf_rspage_3[0]; // @[el2_lsu_bus_buffer.scala 471:90] + wire _T_3231 = buf_rspage_set_3[1] | buf_rspage_3[1]; // @[el2_lsu_bus_buffer.scala 471:90] + wire _T_3234 = buf_rspage_set_3[2] | buf_rspage_3[2]; // @[el2_lsu_bus_buffer.scala 471:90] + wire _T_3237 = buf_rspage_set_3[3] | buf_rspage_3[3]; // @[el2_lsu_bus_buffer.scala 471:90] + wire [2:0] _T_3239 = {_T_3237,_T_3234,_T_3231}; // @[Cat.scala 29:58] + wire _T_3350 = ibuf_drain_vld & _T_1875; // @[el2_lsu_bus_buffer.scala 477:65] + wire _T_3352 = ibuf_drain_vld & _T_1886; // @[el2_lsu_bus_buffer.scala 477:65] + wire _T_3354 = ibuf_drain_vld & _T_1897; // @[el2_lsu_bus_buffer.scala 477:65] + wire _T_3356 = ibuf_drain_vld & _T_1908; // @[el2_lsu_bus_buffer.scala 477:65] + wire [3:0] ibuf_drainvec_vld = {_T_3356,_T_3354,_T_3352,_T_3350}; // @[Cat.scala 29:58] + wire _T_3364 = _T_3558 & _T_1878; // @[el2_lsu_bus_buffer.scala 479:37] + wire _T_3373 = _T_3558 & _T_1889; // @[el2_lsu_bus_buffer.scala 479:37] + wire _T_3382 = _T_3558 & _T_1900; // @[el2_lsu_bus_buffer.scala 479:37] + wire _T_3391 = _T_3558 & _T_1911; // @[el2_lsu_bus_buffer.scala 479:37] + wire _T_3421 = ibuf_drainvec_vld[0] ? ibuf_dual : io_ldst_dual_r; // @[el2_lsu_bus_buffer.scala 481:47] + wire _T_3423 = ibuf_drainvec_vld[1] ? ibuf_dual : io_ldst_dual_r; // @[el2_lsu_bus_buffer.scala 481:47] + wire _T_3425 = ibuf_drainvec_vld[2] ? ibuf_dual : io_ldst_dual_r; // @[el2_lsu_bus_buffer.scala 481:47] + wire _T_3427 = ibuf_drainvec_vld[3] ? ibuf_dual : io_ldst_dual_r; // @[el2_lsu_bus_buffer.scala 481:47] + wire [3:0] buf_dual_in = {_T_3427,_T_3425,_T_3423,_T_3421}; // @[Cat.scala 29:58] + wire _T_3432 = ibuf_drainvec_vld[0] ? ibuf_samedw : ldst_samedw_r; // @[el2_lsu_bus_buffer.scala 482:49] + wire _T_3434 = ibuf_drainvec_vld[1] ? ibuf_samedw : ldst_samedw_r; // @[el2_lsu_bus_buffer.scala 482:49] + wire _T_3436 = ibuf_drainvec_vld[2] ? ibuf_samedw : ldst_samedw_r; // @[el2_lsu_bus_buffer.scala 482:49] + wire _T_3438 = ibuf_drainvec_vld[3] ? ibuf_samedw : ldst_samedw_r; // @[el2_lsu_bus_buffer.scala 482:49] + wire [3:0] buf_samedw_in = {_T_3438,_T_3436,_T_3434,_T_3432}; // @[Cat.scala 29:58] + wire _T_3443 = ibuf_nomerge | ibuf_force_drain; // @[el2_lsu_bus_buffer.scala 483:86] + wire _T_3444 = ibuf_drainvec_vld[0] ? _T_3443 : io_no_dword_merge_r; // @[el2_lsu_bus_buffer.scala 483:50] + wire _T_3447 = ibuf_drainvec_vld[1] ? _T_3443 : io_no_dword_merge_r; // @[el2_lsu_bus_buffer.scala 483:50] + wire _T_3450 = ibuf_drainvec_vld[2] ? _T_3443 : io_no_dword_merge_r; // @[el2_lsu_bus_buffer.scala 483:50] + wire _T_3453 = ibuf_drainvec_vld[3] ? _T_3443 : io_no_dword_merge_r; // @[el2_lsu_bus_buffer.scala 483:50] + wire [3:0] buf_nomerge_in = {_T_3453,_T_3450,_T_3447,_T_3444}; // @[Cat.scala 29:58] + wire _T_3461 = ibuf_drainvec_vld[0] ? ibuf_dual : _T_3364; // @[el2_lsu_bus_buffer.scala 484:49] + wire _T_3466 = ibuf_drainvec_vld[1] ? ibuf_dual : _T_3373; // @[el2_lsu_bus_buffer.scala 484:49] + wire _T_3471 = ibuf_drainvec_vld[2] ? ibuf_dual : _T_3382; // @[el2_lsu_bus_buffer.scala 484:49] + wire _T_3476 = ibuf_drainvec_vld[3] ? ibuf_dual : _T_3391; // @[el2_lsu_bus_buffer.scala 484:49] + wire [3:0] buf_dualhi_in = {_T_3476,_T_3471,_T_3466,_T_3461}; // @[Cat.scala 29:58] + wire _T_3505 = ibuf_drainvec_vld[0] ? ibuf_sideeffect : io_is_sideeffects_r; // @[el2_lsu_bus_buffer.scala 486:53] + wire _T_3507 = ibuf_drainvec_vld[1] ? ibuf_sideeffect : io_is_sideeffects_r; // @[el2_lsu_bus_buffer.scala 486:53] + wire _T_3509 = ibuf_drainvec_vld[2] ? ibuf_sideeffect : io_is_sideeffects_r; // @[el2_lsu_bus_buffer.scala 486:53] + wire _T_3511 = ibuf_drainvec_vld[3] ? ibuf_sideeffect : io_is_sideeffects_r; // @[el2_lsu_bus_buffer.scala 486:53] + wire [3:0] buf_sideeffect_in = {_T_3511,_T_3509,_T_3507,_T_3505}; // @[Cat.scala 29:58] + wire _T_3516 = ibuf_drainvec_vld[0] ? ibuf_unsign : io_lsu_pkt_r_unsign; // @[el2_lsu_bus_buffer.scala 487:49] + wire _T_3518 = ibuf_drainvec_vld[1] ? ibuf_unsign : io_lsu_pkt_r_unsign; // @[el2_lsu_bus_buffer.scala 487:49] + wire _T_3520 = ibuf_drainvec_vld[2] ? ibuf_unsign : io_lsu_pkt_r_unsign; // @[el2_lsu_bus_buffer.scala 487:49] + wire _T_3522 = ibuf_drainvec_vld[3] ? ibuf_unsign : io_lsu_pkt_r_unsign; // @[el2_lsu_bus_buffer.scala 487:49] + wire [3:0] buf_unsign_in = {_T_3522,_T_3520,_T_3518,_T_3516}; // @[Cat.scala 29:58] + wire _T_3539 = ibuf_drainvec_vld[0] ? ibuf_write : io_lsu_pkt_r_store; // @[el2_lsu_bus_buffer.scala 489:48] + wire _T_3541 = ibuf_drainvec_vld[1] ? ibuf_write : io_lsu_pkt_r_store; // @[el2_lsu_bus_buffer.scala 489:48] + wire _T_3543 = ibuf_drainvec_vld[2] ? ibuf_write : io_lsu_pkt_r_store; // @[el2_lsu_bus_buffer.scala 489:48] + wire _T_3545 = ibuf_drainvec_vld[3] ? ibuf_write : io_lsu_pkt_r_store; // @[el2_lsu_bus_buffer.scala 489:48] + wire [3:0] buf_write_in = {_T_3545,_T_3543,_T_3541,_T_3539}; // @[Cat.scala 29:58] + wire _T_3578 = obuf_nosend & bus_rsp_read; // @[el2_lsu_bus_buffer.scala 505:89] + wire _T_3580 = _T_3578 & _T_1372; // @[el2_lsu_bus_buffer.scala 505:104] + wire _T_3593 = buf_state_en_0 & _T_3664; // @[el2_lsu_bus_buffer.scala 510:44] + wire _T_3594 = _T_3593 & obuf_nosend; // @[el2_lsu_bus_buffer.scala 510:60] + wire _T_3596 = _T_3594 & _T_1354; // @[el2_lsu_bus_buffer.scala 510:74] + wire _T_3599 = _T_3589 & obuf_nosend; // @[el2_lsu_bus_buffer.scala 512:67] + wire _T_3600 = _T_3599 & bus_rsp_read; // @[el2_lsu_bus_buffer.scala 512:81] + wire _T_4890 = io_lsu_axi_bresp != 2'h0; // @[el2_lsu_bus_buffer.scala 616:58] + wire bus_rsp_read_error = bus_rsp_read & _T_4890; // @[el2_lsu_bus_buffer.scala 616:38] + wire _T_3603 = _T_3599 & bus_rsp_read_error; // @[el2_lsu_bus_buffer.scala 513:82] + wire _T_3678 = bus_rsp_read_error & _T_3657; // @[el2_lsu_bus_buffer.scala 527:91] + wire _T_3680 = bus_rsp_read_error & buf_ldfwd[0]; // @[el2_lsu_bus_buffer.scala 528:31] + wire _T_3682 = _T_3680 & _T_3659; // @[el2_lsu_bus_buffer.scala 528:46] + wire _T_3683 = _T_3678 | _T_3682; // @[el2_lsu_bus_buffer.scala 527:143] + wire bus_rsp_write_error = bus_rsp_write & _T_4890; // @[el2_lsu_bus_buffer.scala 615:40] + wire _T_3686 = bus_rsp_write_error & _T_3655; // @[el2_lsu_bus_buffer.scala 529:53] + wire _T_3687 = _T_3683 | _T_3686; // @[el2_lsu_bus_buffer.scala 528:88] + wire _T_3688 = _T_3589 & _T_3687; // @[el2_lsu_bus_buffer.scala 527:68] + wire _GEN_46 = _T_3610 & _T_3688; // @[Conditional.scala 39:67] + wire _GEN_59 = _T_3576 ? _T_3603 : _GEN_46; // @[Conditional.scala 39:67] + wire _GEN_71 = _T_3572 ? 1'h0 : _GEN_59; // @[Conditional.scala 39:67] + wire buf_error_en_0 = _T_3549 ? 1'h0 : _GEN_71; // @[Conditional.scala 40:58] + wire _T_3613 = ~bus_rsp_write_error; // @[el2_lsu_bus_buffer.scala 517:73] + wire _T_3614 = buf_write[0] & _T_3613; // @[el2_lsu_bus_buffer.scala 517:71] + wire _T_3615 = io_dec_tlu_force_halt | _T_3614; // @[el2_lsu_bus_buffer.scala 517:55] + wire _T_3617 = ~buf_samedw_0; // @[el2_lsu_bus_buffer.scala 518:30] + wire _T_3618 = buf_dual_0 & _T_3617; // @[el2_lsu_bus_buffer.scala 518:28] + wire _T_3621 = _T_3618 & _T_3664; // @[el2_lsu_bus_buffer.scala 518:45] + wire [2:0] _GEN_19 = 2'h1 == buf_dualtag_0 ? buf_state_1 : buf_state_0; // @[el2_lsu_bus_buffer.scala 518:90] + wire [2:0] _GEN_20 = 2'h2 == buf_dualtag_0 ? buf_state_2 : _GEN_19; // @[el2_lsu_bus_buffer.scala 518:90] + wire [2:0] _GEN_21 = 2'h3 == buf_dualtag_0 ? buf_state_3 : _GEN_20; // @[el2_lsu_bus_buffer.scala 518:90] + wire _T_3622 = _GEN_21 != 3'h4; // @[el2_lsu_bus_buffer.scala 518:90] + wire _T_3623 = _T_3621 & _T_3622; // @[el2_lsu_bus_buffer.scala 518:61] + wire _T_4515 = _T_2767 | _T_2764; // @[el2_lsu_bus_buffer.scala 576:93] + wire _T_4516 = _T_4515 | _T_2761; // @[el2_lsu_bus_buffer.scala 576:93] + wire any_done_wait_state = _T_4516 | _T_2758; // @[el2_lsu_bus_buffer.scala 576:93] + wire _T_3625 = buf_ldfwd[0] | any_done_wait_state; // @[el2_lsu_bus_buffer.scala 519:31] + wire _T_3631 = buf_dualtag_0 == 2'h0; // @[el2_lsu_bus_buffer.scala 109:118] + wire _T_3633 = buf_dualtag_0 == 2'h1; // @[el2_lsu_bus_buffer.scala 109:118] + wire _T_3635 = buf_dualtag_0 == 2'h2; // @[el2_lsu_bus_buffer.scala 109:118] + wire _T_3637 = buf_dualtag_0 == 2'h3; // @[el2_lsu_bus_buffer.scala 109:118] + wire _T_3639 = _T_3631 & buf_ldfwd[0]; // @[Mux.scala 27:72] + wire _T_3640 = _T_3633 & buf_ldfwd[1]; // @[Mux.scala 27:72] + wire _T_3641 = _T_3635 & buf_ldfwd[2]; // @[Mux.scala 27:72] + wire _T_3642 = _T_3637 & buf_ldfwd[3]; // @[Mux.scala 27:72] + wire _T_3643 = _T_3639 | _T_3640; // @[Mux.scala 27:72] + wire _T_3644 = _T_3643 | _T_3641; // @[Mux.scala 27:72] + wire _T_3645 = _T_3644 | _T_3642; // @[Mux.scala 27:72] + wire _T_3647 = _T_3621 & _T_3645; // @[el2_lsu_bus_buffer.scala 519:101] + wire _T_3648 = _GEN_21 == 3'h4; // @[el2_lsu_bus_buffer.scala 519:167] + wire _T_3649 = _T_3647 & _T_3648; // @[el2_lsu_bus_buffer.scala 519:138] + wire _T_3650 = _T_3649 & any_done_wait_state; // @[el2_lsu_bus_buffer.scala 519:187] + wire _T_3651 = _T_3625 | _T_3650; // @[el2_lsu_bus_buffer.scala 519:53] + wire _T_3674 = buf_state_bus_en_0 & bus_rsp_read; // @[el2_lsu_bus_buffer.scala 526:47] + wire _T_3675 = _T_3674 & io_lsu_bus_clk_en; // @[el2_lsu_bus_buffer.scala 526:62] + wire _T_3689 = ~buf_error_en_0; // @[el2_lsu_bus_buffer.scala 530:50] + wire _T_3690 = buf_state_en_0 & _T_3689; // @[el2_lsu_bus_buffer.scala 530:48] + wire _T_3702 = buf_ldfwd[0] | _T_3707[0]; // @[el2_lsu_bus_buffer.scala 533:90] + wire _T_3703 = _T_3702 | any_done_wait_state; // @[el2_lsu_bus_buffer.scala 533:118] + wire _GEN_29 = _T_3723 & buf_state_en_0; // @[Conditional.scala 39:67] + wire _GEN_32 = _T_3715 ? 1'h0 : _T_3723; // @[Conditional.scala 39:67] + wire _GEN_34 = _T_3715 ? 1'h0 : _GEN_29; // @[Conditional.scala 39:67] + wire _GEN_38 = _T_3697 ? 1'h0 : _GEN_32; // @[Conditional.scala 39:67] + wire _GEN_40 = _T_3697 ? 1'h0 : _GEN_34; // @[Conditional.scala 39:67] + wire _GEN_45 = _T_3610 & _T_3675; // @[Conditional.scala 39:67] + wire _GEN_48 = _T_3610 ? 1'h0 : _GEN_38; // @[Conditional.scala 39:67] + wire _GEN_50 = _T_3610 ? 1'h0 : _GEN_40; // @[Conditional.scala 39:67] + wire _GEN_56 = _T_3576 ? _T_3596 : _GEN_50; // @[Conditional.scala 39:67] + wire _GEN_58 = _T_3576 ? _T_3600 : _GEN_45; // @[Conditional.scala 39:67] + wire _GEN_62 = _T_3576 ? 1'h0 : _GEN_48; // @[Conditional.scala 39:67] + wire _GEN_68 = _T_3572 ? 1'h0 : _GEN_56; // @[Conditional.scala 39:67] + wire _GEN_70 = _T_3572 ? 1'h0 : _GEN_58; // @[Conditional.scala 39:67] + wire _GEN_74 = _T_3572 ? 1'h0 : _GEN_62; // @[Conditional.scala 39:67] + wire buf_wr_en_0 = _T_3549 & buf_state_en_0; // @[Conditional.scala 40:58] + wire buf_ldfwd_en_0 = _T_3549 ? 1'h0 : _GEN_68; // @[Conditional.scala 40:58] + wire buf_rst_0 = _T_3549 ? 1'h0 : _GEN_74; // @[Conditional.scala 40:58] + wire _T_3786 = buf_state_en_1 & _T_3857; // @[el2_lsu_bus_buffer.scala 510:44] + wire _T_3787 = _T_3786 & obuf_nosend; // @[el2_lsu_bus_buffer.scala 510:60] + wire _T_3789 = _T_3787 & _T_1354; // @[el2_lsu_bus_buffer.scala 510:74] + wire _T_3792 = _T_3782 & obuf_nosend; // @[el2_lsu_bus_buffer.scala 512:67] + wire _T_3793 = _T_3792 & bus_rsp_read; // @[el2_lsu_bus_buffer.scala 512:81] + wire _T_3796 = _T_3792 & bus_rsp_read_error; // @[el2_lsu_bus_buffer.scala 513:82] + wire _T_3871 = bus_rsp_read_error & _T_3850; // @[el2_lsu_bus_buffer.scala 527:91] + wire _T_3873 = bus_rsp_read_error & buf_ldfwd[1]; // @[el2_lsu_bus_buffer.scala 528:31] + wire _T_3875 = _T_3873 & _T_3852; // @[el2_lsu_bus_buffer.scala 528:46] + wire _T_3876 = _T_3871 | _T_3875; // @[el2_lsu_bus_buffer.scala 527:143] + wire _T_3879 = bus_rsp_write_error & _T_3848; // @[el2_lsu_bus_buffer.scala 529:53] + wire _T_3880 = _T_3876 | _T_3879; // @[el2_lsu_bus_buffer.scala 528:88] + wire _T_3881 = _T_3782 & _T_3880; // @[el2_lsu_bus_buffer.scala 527:68] + wire _GEN_122 = _T_3803 & _T_3881; // @[Conditional.scala 39:67] + wire _GEN_135 = _T_3769 ? _T_3796 : _GEN_122; // @[Conditional.scala 39:67] + wire _GEN_147 = _T_3765 ? 1'h0 : _GEN_135; // @[Conditional.scala 39:67] + wire buf_error_en_1 = _T_3742 ? 1'h0 : _GEN_147; // @[Conditional.scala 40:58] + wire _T_3807 = buf_write[1] & _T_3613; // @[el2_lsu_bus_buffer.scala 517:71] + wire _T_3808 = io_dec_tlu_force_halt | _T_3807; // @[el2_lsu_bus_buffer.scala 517:55] + wire _T_3810 = ~buf_samedw_1; // @[el2_lsu_bus_buffer.scala 518:30] + wire _T_3811 = buf_dual_1 & _T_3810; // @[el2_lsu_bus_buffer.scala 518:28] + wire _T_3814 = _T_3811 & _T_3857; // @[el2_lsu_bus_buffer.scala 518:45] + wire [2:0] _GEN_95 = 2'h1 == buf_dualtag_1 ? buf_state_1 : buf_state_0; // @[el2_lsu_bus_buffer.scala 518:90] + wire [2:0] _GEN_96 = 2'h2 == buf_dualtag_1 ? buf_state_2 : _GEN_95; // @[el2_lsu_bus_buffer.scala 518:90] + wire [2:0] _GEN_97 = 2'h3 == buf_dualtag_1 ? buf_state_3 : _GEN_96; // @[el2_lsu_bus_buffer.scala 518:90] + wire _T_3815 = _GEN_97 != 3'h4; // @[el2_lsu_bus_buffer.scala 518:90] + wire _T_3816 = _T_3814 & _T_3815; // @[el2_lsu_bus_buffer.scala 518:61] + wire _T_3818 = buf_ldfwd[1] | any_done_wait_state; // @[el2_lsu_bus_buffer.scala 519:31] + wire _T_3824 = buf_dualtag_1 == 2'h0; // @[el2_lsu_bus_buffer.scala 109:118] + wire _T_3826 = buf_dualtag_1 == 2'h1; // @[el2_lsu_bus_buffer.scala 109:118] + wire _T_3828 = buf_dualtag_1 == 2'h2; // @[el2_lsu_bus_buffer.scala 109:118] + wire _T_3830 = buf_dualtag_1 == 2'h3; // @[el2_lsu_bus_buffer.scala 109:118] + wire _T_3832 = _T_3824 & buf_ldfwd[0]; // @[Mux.scala 27:72] + wire _T_3833 = _T_3826 & buf_ldfwd[1]; // @[Mux.scala 27:72] + wire _T_3834 = _T_3828 & buf_ldfwd[2]; // @[Mux.scala 27:72] + wire _T_3835 = _T_3830 & buf_ldfwd[3]; // @[Mux.scala 27:72] + wire _T_3836 = _T_3832 | _T_3833; // @[Mux.scala 27:72] + wire _T_3837 = _T_3836 | _T_3834; // @[Mux.scala 27:72] + wire _T_3838 = _T_3837 | _T_3835; // @[Mux.scala 27:72] + wire _T_3840 = _T_3814 & _T_3838; // @[el2_lsu_bus_buffer.scala 519:101] + wire _T_3841 = _GEN_97 == 3'h4; // @[el2_lsu_bus_buffer.scala 519:167] + wire _T_3842 = _T_3840 & _T_3841; // @[el2_lsu_bus_buffer.scala 519:138] + wire _T_3843 = _T_3842 & any_done_wait_state; // @[el2_lsu_bus_buffer.scala 519:187] + wire _T_3844 = _T_3818 | _T_3843; // @[el2_lsu_bus_buffer.scala 519:53] + wire _T_3867 = buf_state_bus_en_1 & bus_rsp_read; // @[el2_lsu_bus_buffer.scala 526:47] + wire _T_3868 = _T_3867 & io_lsu_bus_clk_en; // @[el2_lsu_bus_buffer.scala 526:62] + wire _T_3882 = ~buf_error_en_1; // @[el2_lsu_bus_buffer.scala 530:50] + wire _T_3883 = buf_state_en_1 & _T_3882; // @[el2_lsu_bus_buffer.scala 530:48] + wire _T_3895 = buf_ldfwd[1] | _T_3900[0]; // @[el2_lsu_bus_buffer.scala 533:90] + wire _T_3896 = _T_3895 | any_done_wait_state; // @[el2_lsu_bus_buffer.scala 533:118] + wire _GEN_105 = _T_3916 & buf_state_en_1; // @[Conditional.scala 39:67] + wire _GEN_108 = _T_3908 ? 1'h0 : _T_3916; // @[Conditional.scala 39:67] + wire _GEN_110 = _T_3908 ? 1'h0 : _GEN_105; // @[Conditional.scala 39:67] + wire _GEN_114 = _T_3890 ? 1'h0 : _GEN_108; // @[Conditional.scala 39:67] + wire _GEN_116 = _T_3890 ? 1'h0 : _GEN_110; // @[Conditional.scala 39:67] + wire _GEN_121 = _T_3803 & _T_3868; // @[Conditional.scala 39:67] + wire _GEN_124 = _T_3803 ? 1'h0 : _GEN_114; // @[Conditional.scala 39:67] + wire _GEN_126 = _T_3803 ? 1'h0 : _GEN_116; // @[Conditional.scala 39:67] + wire _GEN_132 = _T_3769 ? _T_3789 : _GEN_126; // @[Conditional.scala 39:67] + wire _GEN_134 = _T_3769 ? _T_3793 : _GEN_121; // @[Conditional.scala 39:67] + wire _GEN_138 = _T_3769 ? 1'h0 : _GEN_124; // @[Conditional.scala 39:67] + wire _GEN_144 = _T_3765 ? 1'h0 : _GEN_132; // @[Conditional.scala 39:67] + wire _GEN_146 = _T_3765 ? 1'h0 : _GEN_134; // @[Conditional.scala 39:67] + wire _GEN_150 = _T_3765 ? 1'h0 : _GEN_138; // @[Conditional.scala 39:67] + wire buf_wr_en_1 = _T_3742 & buf_state_en_1; // @[Conditional.scala 40:58] + wire buf_ldfwd_en_1 = _T_3742 ? 1'h0 : _GEN_144; // @[Conditional.scala 40:58] + wire buf_rst_1 = _T_3742 ? 1'h0 : _GEN_150; // @[Conditional.scala 40:58] + wire _T_3979 = buf_state_en_2 & _T_4050; // @[el2_lsu_bus_buffer.scala 510:44] + wire _T_3980 = _T_3979 & obuf_nosend; // @[el2_lsu_bus_buffer.scala 510:60] + wire _T_3982 = _T_3980 & _T_1354; // @[el2_lsu_bus_buffer.scala 510:74] + wire _T_3985 = _T_3975 & obuf_nosend; // @[el2_lsu_bus_buffer.scala 512:67] + wire _T_3986 = _T_3985 & bus_rsp_read; // @[el2_lsu_bus_buffer.scala 512:81] + wire _T_3989 = _T_3985 & bus_rsp_read_error; // @[el2_lsu_bus_buffer.scala 513:82] + wire _T_4064 = bus_rsp_read_error & _T_4043; // @[el2_lsu_bus_buffer.scala 527:91] + wire _T_4066 = bus_rsp_read_error & buf_ldfwd[2]; // @[el2_lsu_bus_buffer.scala 528:31] + wire _T_4068 = _T_4066 & _T_4045; // @[el2_lsu_bus_buffer.scala 528:46] + wire _T_4069 = _T_4064 | _T_4068; // @[el2_lsu_bus_buffer.scala 527:143] + wire _T_4072 = bus_rsp_write_error & _T_4041; // @[el2_lsu_bus_buffer.scala 529:53] + wire _T_4073 = _T_4069 | _T_4072; // @[el2_lsu_bus_buffer.scala 528:88] + wire _T_4074 = _T_3975 & _T_4073; // @[el2_lsu_bus_buffer.scala 527:68] + wire _GEN_198 = _T_3996 & _T_4074; // @[Conditional.scala 39:67] + wire _GEN_211 = _T_3962 ? _T_3989 : _GEN_198; // @[Conditional.scala 39:67] + wire _GEN_223 = _T_3958 ? 1'h0 : _GEN_211; // @[Conditional.scala 39:67] + wire buf_error_en_2 = _T_3935 ? 1'h0 : _GEN_223; // @[Conditional.scala 40:58] + wire _T_4000 = buf_write[2] & _T_3613; // @[el2_lsu_bus_buffer.scala 517:71] + wire _T_4001 = io_dec_tlu_force_halt | _T_4000; // @[el2_lsu_bus_buffer.scala 517:55] + wire _T_4003 = ~buf_samedw_2; // @[el2_lsu_bus_buffer.scala 518:30] + wire _T_4004 = buf_dual_2 & _T_4003; // @[el2_lsu_bus_buffer.scala 518:28] + wire _T_4007 = _T_4004 & _T_4050; // @[el2_lsu_bus_buffer.scala 518:45] + wire [2:0] _GEN_171 = 2'h1 == buf_dualtag_2 ? buf_state_1 : buf_state_0; // @[el2_lsu_bus_buffer.scala 518:90] + wire [2:0] _GEN_172 = 2'h2 == buf_dualtag_2 ? buf_state_2 : _GEN_171; // @[el2_lsu_bus_buffer.scala 518:90] + wire [2:0] _GEN_173 = 2'h3 == buf_dualtag_2 ? buf_state_3 : _GEN_172; // @[el2_lsu_bus_buffer.scala 518:90] + wire _T_4008 = _GEN_173 != 3'h4; // @[el2_lsu_bus_buffer.scala 518:90] + wire _T_4009 = _T_4007 & _T_4008; // @[el2_lsu_bus_buffer.scala 518:61] + wire _T_4011 = buf_ldfwd[2] | any_done_wait_state; // @[el2_lsu_bus_buffer.scala 519:31] + wire _T_4017 = buf_dualtag_2 == 2'h0; // @[el2_lsu_bus_buffer.scala 109:118] + wire _T_4019 = buf_dualtag_2 == 2'h1; // @[el2_lsu_bus_buffer.scala 109:118] + wire _T_4021 = buf_dualtag_2 == 2'h2; // @[el2_lsu_bus_buffer.scala 109:118] + wire _T_4023 = buf_dualtag_2 == 2'h3; // @[el2_lsu_bus_buffer.scala 109:118] + wire _T_4025 = _T_4017 & buf_ldfwd[0]; // @[Mux.scala 27:72] + wire _T_4026 = _T_4019 & buf_ldfwd[1]; // @[Mux.scala 27:72] + wire _T_4027 = _T_4021 & buf_ldfwd[2]; // @[Mux.scala 27:72] + wire _T_4028 = _T_4023 & buf_ldfwd[3]; // @[Mux.scala 27:72] + wire _T_4029 = _T_4025 | _T_4026; // @[Mux.scala 27:72] + wire _T_4030 = _T_4029 | _T_4027; // @[Mux.scala 27:72] + wire _T_4031 = _T_4030 | _T_4028; // @[Mux.scala 27:72] + wire _T_4033 = _T_4007 & _T_4031; // @[el2_lsu_bus_buffer.scala 519:101] + wire _T_4034 = _GEN_173 == 3'h4; // @[el2_lsu_bus_buffer.scala 519:167] + wire _T_4035 = _T_4033 & _T_4034; // @[el2_lsu_bus_buffer.scala 519:138] + wire _T_4036 = _T_4035 & any_done_wait_state; // @[el2_lsu_bus_buffer.scala 519:187] + wire _T_4037 = _T_4011 | _T_4036; // @[el2_lsu_bus_buffer.scala 519:53] + wire _T_4060 = buf_state_bus_en_2 & bus_rsp_read; // @[el2_lsu_bus_buffer.scala 526:47] + wire _T_4061 = _T_4060 & io_lsu_bus_clk_en; // @[el2_lsu_bus_buffer.scala 526:62] + wire _T_4075 = ~buf_error_en_2; // @[el2_lsu_bus_buffer.scala 530:50] + wire _T_4076 = buf_state_en_2 & _T_4075; // @[el2_lsu_bus_buffer.scala 530:48] + wire _T_4088 = buf_ldfwd[2] | _T_4093[0]; // @[el2_lsu_bus_buffer.scala 533:90] + wire _T_4089 = _T_4088 | any_done_wait_state; // @[el2_lsu_bus_buffer.scala 533:118] + wire _GEN_181 = _T_4109 & buf_state_en_2; // @[Conditional.scala 39:67] + wire _GEN_184 = _T_4101 ? 1'h0 : _T_4109; // @[Conditional.scala 39:67] + wire _GEN_186 = _T_4101 ? 1'h0 : _GEN_181; // @[Conditional.scala 39:67] + wire _GEN_190 = _T_4083 ? 1'h0 : _GEN_184; // @[Conditional.scala 39:67] + wire _GEN_192 = _T_4083 ? 1'h0 : _GEN_186; // @[Conditional.scala 39:67] + wire _GEN_197 = _T_3996 & _T_4061; // @[Conditional.scala 39:67] + wire _GEN_200 = _T_3996 ? 1'h0 : _GEN_190; // @[Conditional.scala 39:67] + wire _GEN_202 = _T_3996 ? 1'h0 : _GEN_192; // @[Conditional.scala 39:67] + wire _GEN_208 = _T_3962 ? _T_3982 : _GEN_202; // @[Conditional.scala 39:67] + wire _GEN_210 = _T_3962 ? _T_3986 : _GEN_197; // @[Conditional.scala 39:67] + wire _GEN_214 = _T_3962 ? 1'h0 : _GEN_200; // @[Conditional.scala 39:67] + wire _GEN_220 = _T_3958 ? 1'h0 : _GEN_208; // @[Conditional.scala 39:67] + wire _GEN_222 = _T_3958 ? 1'h0 : _GEN_210; // @[Conditional.scala 39:67] + wire _GEN_226 = _T_3958 ? 1'h0 : _GEN_214; // @[Conditional.scala 39:67] + wire buf_wr_en_2 = _T_3935 & buf_state_en_2; // @[Conditional.scala 40:58] + wire buf_ldfwd_en_2 = _T_3935 ? 1'h0 : _GEN_220; // @[Conditional.scala 40:58] + wire buf_rst_2 = _T_3935 ? 1'h0 : _GEN_226; // @[Conditional.scala 40:58] + wire _T_4172 = buf_state_en_3 & _T_4243; // @[el2_lsu_bus_buffer.scala 510:44] + wire _T_4173 = _T_4172 & obuf_nosend; // @[el2_lsu_bus_buffer.scala 510:60] + wire _T_4175 = _T_4173 & _T_1354; // @[el2_lsu_bus_buffer.scala 510:74] + wire _T_4178 = _T_4168 & obuf_nosend; // @[el2_lsu_bus_buffer.scala 512:67] + wire _T_4179 = _T_4178 & bus_rsp_read; // @[el2_lsu_bus_buffer.scala 512:81] + wire _T_4182 = _T_4178 & bus_rsp_read_error; // @[el2_lsu_bus_buffer.scala 513:82] + wire _T_4257 = bus_rsp_read_error & _T_4236; // @[el2_lsu_bus_buffer.scala 527:91] + wire _T_4259 = bus_rsp_read_error & buf_ldfwd[3]; // @[el2_lsu_bus_buffer.scala 528:31] + wire _T_4261 = _T_4259 & _T_4238; // @[el2_lsu_bus_buffer.scala 528:46] + wire _T_4262 = _T_4257 | _T_4261; // @[el2_lsu_bus_buffer.scala 527:143] + wire _T_4265 = bus_rsp_write_error & _T_4234; // @[el2_lsu_bus_buffer.scala 529:53] + wire _T_4266 = _T_4262 | _T_4265; // @[el2_lsu_bus_buffer.scala 528:88] + wire _T_4267 = _T_4168 & _T_4266; // @[el2_lsu_bus_buffer.scala 527:68] + wire _GEN_274 = _T_4189 & _T_4267; // @[Conditional.scala 39:67] + wire _GEN_287 = _T_4155 ? _T_4182 : _GEN_274; // @[Conditional.scala 39:67] + wire _GEN_299 = _T_4151 ? 1'h0 : _GEN_287; // @[Conditional.scala 39:67] + wire buf_error_en_3 = _T_4128 ? 1'h0 : _GEN_299; // @[Conditional.scala 40:58] + wire _T_4193 = buf_write[3] & _T_3613; // @[el2_lsu_bus_buffer.scala 517:71] + wire _T_4194 = io_dec_tlu_force_halt | _T_4193; // @[el2_lsu_bus_buffer.scala 517:55] + wire _T_4196 = ~buf_samedw_3; // @[el2_lsu_bus_buffer.scala 518:30] + wire _T_4197 = buf_dual_3 & _T_4196; // @[el2_lsu_bus_buffer.scala 518:28] + wire _T_4200 = _T_4197 & _T_4243; // @[el2_lsu_bus_buffer.scala 518:45] + wire [2:0] _GEN_247 = 2'h1 == buf_dualtag_3 ? buf_state_1 : buf_state_0; // @[el2_lsu_bus_buffer.scala 518:90] + wire [2:0] _GEN_248 = 2'h2 == buf_dualtag_3 ? buf_state_2 : _GEN_247; // @[el2_lsu_bus_buffer.scala 518:90] + wire [2:0] _GEN_249 = 2'h3 == buf_dualtag_3 ? buf_state_3 : _GEN_248; // @[el2_lsu_bus_buffer.scala 518:90] + wire _T_4201 = _GEN_249 != 3'h4; // @[el2_lsu_bus_buffer.scala 518:90] + wire _T_4202 = _T_4200 & _T_4201; // @[el2_lsu_bus_buffer.scala 518:61] + wire _T_4204 = buf_ldfwd[3] | any_done_wait_state; // @[el2_lsu_bus_buffer.scala 519:31] + wire _T_4210 = buf_dualtag_3 == 2'h0; // @[el2_lsu_bus_buffer.scala 109:118] + wire _T_4212 = buf_dualtag_3 == 2'h1; // @[el2_lsu_bus_buffer.scala 109:118] + wire _T_4214 = buf_dualtag_3 == 2'h2; // @[el2_lsu_bus_buffer.scala 109:118] + wire _T_4216 = buf_dualtag_3 == 2'h3; // @[el2_lsu_bus_buffer.scala 109:118] + wire _T_4218 = _T_4210 & buf_ldfwd[0]; // @[Mux.scala 27:72] + wire _T_4219 = _T_4212 & buf_ldfwd[1]; // @[Mux.scala 27:72] + wire _T_4220 = _T_4214 & buf_ldfwd[2]; // @[Mux.scala 27:72] + wire _T_4221 = _T_4216 & buf_ldfwd[3]; // @[Mux.scala 27:72] + wire _T_4222 = _T_4218 | _T_4219; // @[Mux.scala 27:72] + wire _T_4223 = _T_4222 | _T_4220; // @[Mux.scala 27:72] + wire _T_4224 = _T_4223 | _T_4221; // @[Mux.scala 27:72] + wire _T_4226 = _T_4200 & _T_4224; // @[el2_lsu_bus_buffer.scala 519:101] + wire _T_4227 = _GEN_249 == 3'h4; // @[el2_lsu_bus_buffer.scala 519:167] + wire _T_4228 = _T_4226 & _T_4227; // @[el2_lsu_bus_buffer.scala 519:138] + wire _T_4229 = _T_4228 & any_done_wait_state; // @[el2_lsu_bus_buffer.scala 519:187] + wire _T_4230 = _T_4204 | _T_4229; // @[el2_lsu_bus_buffer.scala 519:53] + wire _T_4253 = buf_state_bus_en_3 & bus_rsp_read; // @[el2_lsu_bus_buffer.scala 526:47] + wire _T_4254 = _T_4253 & io_lsu_bus_clk_en; // @[el2_lsu_bus_buffer.scala 526:62] + wire _T_4268 = ~buf_error_en_3; // @[el2_lsu_bus_buffer.scala 530:50] + wire _T_4269 = buf_state_en_3 & _T_4268; // @[el2_lsu_bus_buffer.scala 530:48] + wire _T_4281 = buf_ldfwd[3] | _T_4286[0]; // @[el2_lsu_bus_buffer.scala 533:90] + wire _T_4282 = _T_4281 | any_done_wait_state; // @[el2_lsu_bus_buffer.scala 533:118] + wire _GEN_257 = _T_4302 & buf_state_en_3; // @[Conditional.scala 39:67] + wire _GEN_260 = _T_4294 ? 1'h0 : _T_4302; // @[Conditional.scala 39:67] + wire _GEN_262 = _T_4294 ? 1'h0 : _GEN_257; // @[Conditional.scala 39:67] + wire _GEN_266 = _T_4276 ? 1'h0 : _GEN_260; // @[Conditional.scala 39:67] + wire _GEN_268 = _T_4276 ? 1'h0 : _GEN_262; // @[Conditional.scala 39:67] + wire _GEN_273 = _T_4189 & _T_4254; // @[Conditional.scala 39:67] + wire _GEN_276 = _T_4189 ? 1'h0 : _GEN_266; // @[Conditional.scala 39:67] + wire _GEN_278 = _T_4189 ? 1'h0 : _GEN_268; // @[Conditional.scala 39:67] + wire _GEN_284 = _T_4155 ? _T_4175 : _GEN_278; // @[Conditional.scala 39:67] + wire _GEN_286 = _T_4155 ? _T_4179 : _GEN_273; // @[Conditional.scala 39:67] + wire _GEN_290 = _T_4155 ? 1'h0 : _GEN_276; // @[Conditional.scala 39:67] + wire _GEN_296 = _T_4151 ? 1'h0 : _GEN_284; // @[Conditional.scala 39:67] + wire _GEN_298 = _T_4151 ? 1'h0 : _GEN_286; // @[Conditional.scala 39:67] + wire _GEN_302 = _T_4151 ? 1'h0 : _GEN_290; // @[Conditional.scala 39:67] + wire buf_wr_en_3 = _T_4128 & buf_state_en_3; // @[Conditional.scala 40:58] + wire buf_ldfwd_en_3 = _T_4128 ? 1'h0 : _GEN_296; // @[Conditional.scala 40:58] + wire buf_rst_3 = _T_4128 ? 1'h0 : _GEN_302; // @[Conditional.scala 40:58] + reg _T_4357; // @[Reg.scala 27:20] + reg _T_4360; // @[Reg.scala 27:20] + reg _T_4363; // @[Reg.scala 27:20] + reg _T_4366; // @[Reg.scala 27:20] + wire [3:0] buf_unsign = {_T_4366,_T_4363,_T_4360,_T_4357}; // @[Cat.scala 29:58] + reg _T_4432; // @[el2_lsu_bus_buffer.scala 569:82] + reg _T_4427; // @[el2_lsu_bus_buffer.scala 569:82] + reg _T_4422; // @[el2_lsu_bus_buffer.scala 569:82] + reg _T_4417; // @[el2_lsu_bus_buffer.scala 569:82] + wire [3:0] buf_error = {_T_4432,_T_4427,_T_4422,_T_4417}; // @[Cat.scala 29:58] + wire _T_4414 = buf_error_en_0 | buf_error[0]; // @[el2_lsu_bus_buffer.scala 569:86] + wire _T_4415 = ~buf_rst_0; // @[el2_lsu_bus_buffer.scala 569:128] + wire _T_4419 = buf_error_en_1 | buf_error[1]; // @[el2_lsu_bus_buffer.scala 569:86] + wire _T_4420 = ~buf_rst_1; // @[el2_lsu_bus_buffer.scala 569:128] + wire _T_4424 = buf_error_en_2 | buf_error[2]; // @[el2_lsu_bus_buffer.scala 569:86] + wire _T_4425 = ~buf_rst_2; // @[el2_lsu_bus_buffer.scala 569:128] + wire _T_4429 = buf_error_en_3 | buf_error[3]; // @[el2_lsu_bus_buffer.scala 569:86] + wire _T_4430 = ~buf_rst_3; // @[el2_lsu_bus_buffer.scala 569:128] + wire [1:0] _T_4436 = {io_lsu_busreq_m,1'h0}; // @[Cat.scala 29:58] + wire [1:0] _T_4437 = io_ldst_dual_m ? _T_4436 : {{1'd0}, io_lsu_busreq_m}; // @[el2_lsu_bus_buffer.scala 572:28] + wire [1:0] _T_4438 = {io_lsu_busreq_r,1'h0}; // @[Cat.scala 29:58] + wire [1:0] _T_4439 = io_ldst_dual_r ? _T_4438 : {{1'd0}, io_lsu_busreq_r}; // @[el2_lsu_bus_buffer.scala 572:94] + wire [2:0] _T_4440 = _T_4437 + _T_4439; // @[el2_lsu_bus_buffer.scala 572:88] + wire [2:0] _GEN_380 = {{2'd0}, ibuf_valid}; // @[el2_lsu_bus_buffer.scala 572:154] + wire [3:0] _T_4441 = _T_4440 + _GEN_380; // @[el2_lsu_bus_buffer.scala 572:154] + wire [1:0] _T_4446 = _T_5 + _T_12; // @[el2_lsu_bus_buffer.scala 572:217] + wire [1:0] _GEN_381 = {{1'd0}, _T_19}; // @[el2_lsu_bus_buffer.scala 572:217] + wire [2:0] _T_4447 = _T_4446 + _GEN_381; // @[el2_lsu_bus_buffer.scala 572:217] + wire [2:0] _GEN_382 = {{2'd0}, _T_26}; // @[el2_lsu_bus_buffer.scala 572:217] + wire [3:0] _T_4448 = _T_4447 + _GEN_382; // @[el2_lsu_bus_buffer.scala 572:217] + wire [3:0] buf_numvld_any = _T_4441 + _T_4448; // @[el2_lsu_bus_buffer.scala 572:169] + wire _T_4519 = io_ldst_dual_d & io_dec_lsu_valid_raw_d; // @[el2_lsu_bus_buffer.scala 578:52] + wire _T_4520 = buf_numvld_any >= 4'h3; // @[el2_lsu_bus_buffer.scala 578:92] + wire _T_4521 = buf_numvld_any == 4'h4; // @[el2_lsu_bus_buffer.scala 578:121] + wire _T_4523 = |buf_state_0; // @[el2_lsu_bus_buffer.scala 579:52] + wire _T_4524 = |buf_state_1; // @[el2_lsu_bus_buffer.scala 579:52] + wire _T_4525 = |buf_state_2; // @[el2_lsu_bus_buffer.scala 579:52] + wire _T_4526 = |buf_state_3; // @[el2_lsu_bus_buffer.scala 579:52] + wire _T_4527 = _T_4523 | _T_4524; // @[el2_lsu_bus_buffer.scala 579:65] + wire _T_4528 = _T_4527 | _T_4525; // @[el2_lsu_bus_buffer.scala 579:65] + wire _T_4529 = _T_4528 | _T_4526; // @[el2_lsu_bus_buffer.scala 579:65] + wire _T_4530 = ~_T_4529; // @[el2_lsu_bus_buffer.scala 579:34] + wire _T_4532 = _T_4530 & _T_852; // @[el2_lsu_bus_buffer.scala 579:70] + wire _T_4535 = io_lsu_busreq_m & io_lsu_pkt_m_valid; // @[el2_lsu_bus_buffer.scala 581:51] + wire _T_4536 = _T_4535 & io_lsu_pkt_m_load; // @[el2_lsu_bus_buffer.scala 581:72] + wire _T_4537 = ~io_flush_m_up; // @[el2_lsu_bus_buffer.scala 581:94] + wire _T_4538 = _T_4536 & _T_4537; // @[el2_lsu_bus_buffer.scala 581:92] + wire _T_4539 = ~io_ld_full_hit_m; // @[el2_lsu_bus_buffer.scala 581:111] + wire _T_4541 = ~io_lsu_commit_r; // @[el2_lsu_bus_buffer.scala 584:61] + reg lsu_nonblock_load_valid_r; // @[el2_lsu_bus_buffer.scala 669:66] + wire _T_4559 = _T_2820 & _T_3664; // @[Mux.scala 27:72] + wire _T_4560 = _T_2842 & _T_3857; // @[Mux.scala 27:72] + wire _T_4561 = _T_2864 & _T_4050; // @[Mux.scala 27:72] + wire _T_4562 = _T_2886 & _T_4243; // @[Mux.scala 27:72] + wire _T_4563 = _T_4559 | _T_4560; // @[Mux.scala 27:72] + wire _T_4564 = _T_4563 | _T_4561; // @[Mux.scala 27:72] + wire lsu_nonblock_load_data_ready = _T_4564 | _T_4562; // @[Mux.scala 27:72] + wire _T_4570 = buf_error[0] & _T_3664; // @[el2_lsu_bus_buffer.scala 587:108] + wire _T_4575 = buf_error[1] & _T_3857; // @[el2_lsu_bus_buffer.scala 587:108] + wire _T_4580 = buf_error[2] & _T_4050; // @[el2_lsu_bus_buffer.scala 587:108] + wire _T_4585 = buf_error[3] & _T_4243; // @[el2_lsu_bus_buffer.scala 587:108] + wire _T_4586 = _T_2820 & _T_4570; // @[Mux.scala 27:72] + wire _T_4587 = _T_2842 & _T_4575; // @[Mux.scala 27:72] + wire _T_4588 = _T_2864 & _T_4580; // @[Mux.scala 27:72] + wire _T_4589 = _T_2886 & _T_4585; // @[Mux.scala 27:72] + wire _T_4590 = _T_4586 | _T_4587; // @[Mux.scala 27:72] + wire _T_4591 = _T_4590 | _T_4588; // @[Mux.scala 27:72] + wire _T_4598 = ~buf_dual_0; // @[el2_lsu_bus_buffer.scala 588:109] + wire _T_4599 = ~buf_dualhi_0; // @[el2_lsu_bus_buffer.scala 588:124] + wire _T_4600 = _T_4598 | _T_4599; // @[el2_lsu_bus_buffer.scala 588:122] + wire _T_4601 = _T_4559 & _T_4600; // @[el2_lsu_bus_buffer.scala 588:106] + wire _T_4606 = ~buf_dual_1; // @[el2_lsu_bus_buffer.scala 588:109] + wire _T_4607 = ~buf_dualhi_1; // @[el2_lsu_bus_buffer.scala 588:124] + wire _T_4608 = _T_4606 | _T_4607; // @[el2_lsu_bus_buffer.scala 588:122] + wire _T_4609 = _T_4560 & _T_4608; // @[el2_lsu_bus_buffer.scala 588:106] + wire _T_4614 = ~buf_dual_2; // @[el2_lsu_bus_buffer.scala 588:109] + wire _T_4615 = ~buf_dualhi_2; // @[el2_lsu_bus_buffer.scala 588:124] + wire _T_4616 = _T_4614 | _T_4615; // @[el2_lsu_bus_buffer.scala 588:122] + wire _T_4617 = _T_4561 & _T_4616; // @[el2_lsu_bus_buffer.scala 588:106] + wire _T_4622 = ~buf_dual_3; // @[el2_lsu_bus_buffer.scala 588:109] + wire _T_4623 = ~buf_dualhi_3; // @[el2_lsu_bus_buffer.scala 588:124] + wire _T_4624 = _T_4622 | _T_4623; // @[el2_lsu_bus_buffer.scala 588:122] + wire _T_4625 = _T_4562 & _T_4624; // @[el2_lsu_bus_buffer.scala 588:106] + wire [1:0] _T_4628 = _T_4617 ? 2'h2 : 2'h0; // @[Mux.scala 27:72] + wire [1:0] _T_4629 = _T_4625 ? 2'h3 : 2'h0; // @[Mux.scala 27:72] + wire [1:0] _GEN_383 = {{1'd0}, _T_4609}; // @[Mux.scala 27:72] + wire [1:0] _T_4631 = _GEN_383 | _T_4628; // @[Mux.scala 27:72] + wire [31:0] _T_4666 = _T_4601 ? buf_data_0 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4667 = _T_4609 ? buf_data_1 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4668 = _T_4617 ? buf_data_2 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4669 = _T_4625 ? buf_data_3 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4670 = _T_4666 | _T_4667; // @[Mux.scala 27:72] + wire [31:0] _T_4671 = _T_4670 | _T_4668; // @[Mux.scala 27:72] + wire [31:0] lsu_nonblock_load_data_lo = _T_4671 | _T_4669; // @[Mux.scala 27:72] + wire _T_4677 = buf_dual_0 | buf_dualhi_0; // @[el2_lsu_bus_buffer.scala 590:120] + wire _T_4678 = _T_4559 & _T_4677; // @[el2_lsu_bus_buffer.scala 590:105] + wire _T_4683 = buf_dual_1 | buf_dualhi_1; // @[el2_lsu_bus_buffer.scala 590:120] + wire _T_4684 = _T_4560 & _T_4683; // @[el2_lsu_bus_buffer.scala 590:105] + wire _T_4689 = buf_dual_2 | buf_dualhi_2; // @[el2_lsu_bus_buffer.scala 590:120] + wire _T_4690 = _T_4561 & _T_4689; // @[el2_lsu_bus_buffer.scala 590:105] + wire _T_4695 = buf_dual_3 | buf_dualhi_3; // @[el2_lsu_bus_buffer.scala 590:120] + wire _T_4696 = _T_4562 & _T_4695; // @[el2_lsu_bus_buffer.scala 590:105] + wire [31:0] _T_4697 = _T_4678 ? buf_data_0 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4698 = _T_4684 ? buf_data_1 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4699 = _T_4690 ? buf_data_2 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4700 = _T_4696 ? buf_data_3 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4701 = _T_4697 | _T_4698; // @[Mux.scala 27:72] + wire [31:0] _T_4702 = _T_4701 | _T_4699; // @[Mux.scala 27:72] + wire [31:0] lsu_nonblock_load_data_hi = _T_4702 | _T_4700; // @[Mux.scala 27:72] + wire _T_4704 = io_lsu_nonblock_load_data_tag == 2'h0; // @[el2_lsu_bus_buffer.scala 110:123] + wire _T_4705 = io_lsu_nonblock_load_data_tag == 2'h1; // @[el2_lsu_bus_buffer.scala 110:123] + wire _T_4706 = io_lsu_nonblock_load_data_tag == 2'h2; // @[el2_lsu_bus_buffer.scala 110:123] + wire _T_4707 = io_lsu_nonblock_load_data_tag == 2'h3; // @[el2_lsu_bus_buffer.scala 110:123] + wire [31:0] _T_4708 = _T_4704 ? buf_addr_0 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4709 = _T_4705 ? buf_addr_1 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4710 = _T_4706 ? buf_addr_2 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4711 = _T_4707 ? buf_addr_3 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4712 = _T_4708 | _T_4709; // @[Mux.scala 27:72] + wire [31:0] _T_4713 = _T_4712 | _T_4710; // @[Mux.scala 27:72] + wire [31:0] _T_4714 = _T_4713 | _T_4711; // @[Mux.scala 27:72] + wire [1:0] lsu_nonblock_addr_offset = _T_4714[1:0]; // @[el2_lsu_bus_buffer.scala 591:83] + wire [1:0] _T_4720 = _T_4704 ? buf_sz_0 : 2'h0; // @[Mux.scala 27:72] + wire [1:0] _T_4721 = _T_4705 ? buf_sz_1 : 2'h0; // @[Mux.scala 27:72] + wire [1:0] _T_4722 = _T_4706 ? buf_sz_2 : 2'h0; // @[Mux.scala 27:72] + wire [1:0] _T_4723 = _T_4707 ? buf_sz_3 : 2'h0; // @[Mux.scala 27:72] + wire [1:0] _T_4724 = _T_4720 | _T_4721; // @[Mux.scala 27:72] + wire [1:0] _T_4725 = _T_4724 | _T_4722; // @[Mux.scala 27:72] + wire [1:0] lsu_nonblock_sz = _T_4725 | _T_4723; // @[Mux.scala 27:72] + wire _T_4735 = _T_4704 & buf_unsign[0]; // @[Mux.scala 27:72] + wire _T_4736 = _T_4705 & buf_unsign[1]; // @[Mux.scala 27:72] + wire _T_4737 = _T_4706 & buf_unsign[2]; // @[Mux.scala 27:72] + wire _T_4738 = _T_4707 & buf_unsign[3]; // @[Mux.scala 27:72] + wire _T_4739 = _T_4735 | _T_4736; // @[Mux.scala 27:72] + wire _T_4740 = _T_4739 | _T_4737; // @[Mux.scala 27:72] + wire lsu_nonblock_unsign = _T_4740 | _T_4738; // @[Mux.scala 27:72] + wire [63:0] _T_4760 = {lsu_nonblock_load_data_hi,lsu_nonblock_load_data_lo}; // @[Cat.scala 29:58] + wire [3:0] _GEN_384 = {{2'd0}, lsu_nonblock_addr_offset}; // @[el2_lsu_bus_buffer.scala 595:121] + wire [5:0] _T_4761 = _GEN_384 * 4'h8; // @[el2_lsu_bus_buffer.scala 595:121] + wire [63:0] lsu_nonblock_data_unalgn = _T_4760 >> _T_4761; // @[el2_lsu_bus_buffer.scala 595:92] + wire _T_4762 = ~io_lsu_nonblock_load_data_error; // @[el2_lsu_bus_buffer.scala 597:69] + wire _T_4764 = lsu_nonblock_sz == 2'h0; // @[el2_lsu_bus_buffer.scala 598:81] + wire _T_4765 = lsu_nonblock_unsign & _T_4764; // @[el2_lsu_bus_buffer.scala 598:63] + wire [31:0] _T_4767 = {24'h0,lsu_nonblock_data_unalgn[7:0]}; // @[Cat.scala 29:58] + wire _T_4768 = lsu_nonblock_sz == 2'h1; // @[el2_lsu_bus_buffer.scala 599:45] + wire _T_4769 = lsu_nonblock_unsign & _T_4768; // @[el2_lsu_bus_buffer.scala 599:26] + wire [31:0] _T_4771 = {16'h0,lsu_nonblock_data_unalgn[15:0]}; // @[Cat.scala 29:58] + wire _T_4772 = ~lsu_nonblock_unsign; // @[el2_lsu_bus_buffer.scala 600:6] + wire _T_4774 = _T_4772 & _T_4764; // @[el2_lsu_bus_buffer.scala 600:27] + wire [23:0] _T_4777 = lsu_nonblock_data_unalgn[7] ? 24'hffffff : 24'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_4779 = {_T_4777,lsu_nonblock_data_unalgn[7:0]}; // @[Cat.scala 29:58] + wire _T_4782 = _T_4772 & _T_4768; // @[el2_lsu_bus_buffer.scala 601:27] + wire [15:0] _T_4785 = lsu_nonblock_data_unalgn[15] ? 16'hffff : 16'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_4787 = {_T_4785,lsu_nonblock_data_unalgn[15:0]}; // @[Cat.scala 29:58] + wire _T_4788 = lsu_nonblock_sz == 2'h2; // @[el2_lsu_bus_buffer.scala 602:21] + wire [31:0] _T_4789 = _T_4765 ? _T_4767 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4790 = _T_4769 ? _T_4771 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4791 = _T_4774 ? _T_4779 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4792 = _T_4782 ? _T_4787 : 32'h0; // @[Mux.scala 27:72] + wire [63:0] _T_4793 = _T_4788 ? lsu_nonblock_data_unalgn : 64'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4794 = _T_4789 | _T_4790; // @[Mux.scala 27:72] + wire [31:0] _T_4795 = _T_4794 | _T_4791; // @[Mux.scala 27:72] + wire [31:0] _T_4796 = _T_4795 | _T_4792; // @[Mux.scala 27:72] + wire [63:0] _GEN_385 = {{32'd0}, _T_4796}; // @[Mux.scala 27:72] + wire [63:0] _T_4797 = _GEN_385 | _T_4793; // @[Mux.scala 27:72] + wire _T_4892 = obuf_valid & obuf_write; // @[el2_lsu_bus_buffer.scala 620:36] + wire _T_4893 = ~obuf_cmd_done; // @[el2_lsu_bus_buffer.scala 620:51] + wire _T_4894 = _T_4892 & _T_4893; // @[el2_lsu_bus_buffer.scala 620:49] + wire [31:0] _T_4898 = {obuf_addr[31:3],3'h0}; // @[Cat.scala 29:58] + wire [2:0] _T_4900 = {1'h0,obuf_sz}; // @[Cat.scala 29:58] + wire _T_4905 = ~obuf_data_done; // @[el2_lsu_bus_buffer.scala 632:50] + wire _T_4906 = _T_4892 & _T_4905; // @[el2_lsu_bus_buffer.scala 632:48] + wire [7:0] _T_4910 = obuf_write ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire _T_4913 = obuf_valid & _T_1364; // @[el2_lsu_bus_buffer.scala 637:36] + wire _T_4915 = _T_4913 & _T_1370; // @[el2_lsu_bus_buffer.scala 637:50] + wire _T_4927 = io_lsu_bus_clk_en_q & buf_error[0]; // @[el2_lsu_bus_buffer.scala 650:114] + wire _T_4929 = _T_4927 & buf_write[0]; // @[el2_lsu_bus_buffer.scala 650:129] + wire _T_4932 = io_lsu_bus_clk_en_q & buf_error[1]; // @[el2_lsu_bus_buffer.scala 650:114] + wire _T_4934 = _T_4932 & buf_write[1]; // @[el2_lsu_bus_buffer.scala 650:129] + wire _T_4937 = io_lsu_bus_clk_en_q & buf_error[2]; // @[el2_lsu_bus_buffer.scala 650:114] + wire _T_4939 = _T_4937 & buf_write[2]; // @[el2_lsu_bus_buffer.scala 650:129] + wire _T_4942 = io_lsu_bus_clk_en_q & buf_error[3]; // @[el2_lsu_bus_buffer.scala 650:114] + wire _T_4944 = _T_4942 & buf_write[3]; // @[el2_lsu_bus_buffer.scala 650:129] + wire _T_4945 = _T_2820 & _T_4929; // @[Mux.scala 27:72] + wire _T_4946 = _T_2842 & _T_4934; // @[Mux.scala 27:72] + wire _T_4947 = _T_2864 & _T_4939; // @[Mux.scala 27:72] + wire _T_4948 = _T_2886 & _T_4944; // @[Mux.scala 27:72] + wire _T_4949 = _T_4945 | _T_4946; // @[Mux.scala 27:72] + wire _T_4950 = _T_4949 | _T_4947; // @[Mux.scala 27:72] + wire _T_4960 = _T_2842 & buf_error[1]; // @[el2_lsu_bus_buffer.scala 651:98] + wire lsu_imprecise_error_store_tag = _T_4960 & buf_write[1]; // @[el2_lsu_bus_buffer.scala 651:113] + wire _T_4966 = ~io_lsu_imprecise_error_store_any; // @[el2_lsu_bus_buffer.scala 653:72] + wire _T_4968 = ~lsu_imprecise_error_store_tag; // @[el2_lsu_bus_buffer.scala 110:123] + wire [31:0] _T_4970 = _T_4968 ? buf_addr_0 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4971 = lsu_imprecise_error_store_tag ? buf_addr_1 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4972 = _T_4970 | _T_4971; // @[Mux.scala 27:72] + wire _T_4989 = bus_wcmd_sent | bus_wdata_sent; // @[el2_lsu_bus_buffer.scala 660:68] + wire _T_4992 = io_lsu_busreq_r & io_ldst_dual_r; // @[el2_lsu_bus_buffer.scala 661:48] + wire _T_4995 = ~io_lsu_axi_awready; // @[el2_lsu_bus_buffer.scala 664:48] + wire _T_4996 = io_lsu_axi_awvalid & _T_4995; // @[el2_lsu_bus_buffer.scala 664:46] + wire _T_4997 = ~io_lsu_axi_wready; // @[el2_lsu_bus_buffer.scala 664:92] + wire _T_4998 = io_lsu_axi_wvalid & _T_4997; // @[el2_lsu_bus_buffer.scala 664:90] + wire _T_4999 = _T_4996 | _T_4998; // @[el2_lsu_bus_buffer.scala 664:69] + wire _T_5000 = ~io_lsu_axi_arready; // @[el2_lsu_bus_buffer.scala 664:136] + wire _T_5001 = io_lsu_axi_arvalid & _T_5000; // @[el2_lsu_bus_buffer.scala 664:134] + wire _T_5005 = ~io_flush_r; // @[el2_lsu_bus_buffer.scala 668:75] + wire _T_5006 = io_lsu_busreq_m & _T_5005; // @[el2_lsu_bus_buffer.scala 668:73] + reg _T_5009; // @[el2_lsu_bus_buffer.scala 668:56] + rvclkhdr rvclkhdr ( // @[el2_lib.scala 506:23] + .io_l1clk(rvclkhdr_io_l1clk), + .io_clk(rvclkhdr_io_clk), + .io_en(rvclkhdr_io_en), + .io_scan_mode(rvclkhdr_io_scan_mode) + ); + rvclkhdr rvclkhdr_1 ( // @[el2_lib.scala 506:23] + .io_l1clk(rvclkhdr_1_io_l1clk), + .io_clk(rvclkhdr_1_io_clk), + .io_en(rvclkhdr_1_io_en), + .io_scan_mode(rvclkhdr_1_io_scan_mode) + ); + rvclkhdr rvclkhdr_2 ( // @[el2_lib.scala 506:23] + .io_l1clk(rvclkhdr_2_io_l1clk), + .io_clk(rvclkhdr_2_io_clk), + .io_en(rvclkhdr_2_io_en), + .io_scan_mode(rvclkhdr_2_io_scan_mode) + ); + rvclkhdr rvclkhdr_3 ( // @[el2_lib.scala 506:23] + .io_l1clk(rvclkhdr_3_io_l1clk), + .io_clk(rvclkhdr_3_io_clk), + .io_en(rvclkhdr_3_io_en), + .io_scan_mode(rvclkhdr_3_io_scan_mode) + ); + rvclkhdr rvclkhdr_4 ( // @[el2_lib.scala 506:23] + .io_l1clk(rvclkhdr_4_io_l1clk), + .io_clk(rvclkhdr_4_io_clk), + .io_en(rvclkhdr_4_io_en), + .io_scan_mode(rvclkhdr_4_io_scan_mode) + ); + rvclkhdr rvclkhdr_5 ( // @[el2_lib.scala 506:23] + .io_l1clk(rvclkhdr_5_io_l1clk), + .io_clk(rvclkhdr_5_io_clk), + .io_en(rvclkhdr_5_io_en), + .io_scan_mode(rvclkhdr_5_io_scan_mode) + ); + rvclkhdr rvclkhdr_6 ( // @[el2_lib.scala 506:23] + .io_l1clk(rvclkhdr_6_io_l1clk), + .io_clk(rvclkhdr_6_io_clk), + .io_en(rvclkhdr_6_io_en), + .io_scan_mode(rvclkhdr_6_io_scan_mode) + ); + rvclkhdr rvclkhdr_7 ( // @[el2_lib.scala 506:23] + .io_l1clk(rvclkhdr_7_io_l1clk), + .io_clk(rvclkhdr_7_io_clk), + .io_en(rvclkhdr_7_io_en), + .io_scan_mode(rvclkhdr_7_io_scan_mode) + ); + rvclkhdr rvclkhdr_8 ( // @[el2_lib.scala 506:23] + .io_l1clk(rvclkhdr_8_io_l1clk), + .io_clk(rvclkhdr_8_io_clk), + .io_en(rvclkhdr_8_io_en), + .io_scan_mode(rvclkhdr_8_io_scan_mode) + ); + rvclkhdr rvclkhdr_9 ( // @[el2_lib.scala 506:23] + .io_l1clk(rvclkhdr_9_io_l1clk), + .io_clk(rvclkhdr_9_io_clk), + .io_en(rvclkhdr_9_io_en), + .io_scan_mode(rvclkhdr_9_io_scan_mode) + ); + rvclkhdr rvclkhdr_10 ( // @[el2_lib.scala 506:23] + .io_l1clk(rvclkhdr_10_io_l1clk), + .io_clk(rvclkhdr_10_io_clk), + .io_en(rvclkhdr_10_io_en), + .io_scan_mode(rvclkhdr_10_io_scan_mode) + ); + rvclkhdr rvclkhdr_11 ( // @[el2_lib.scala 506:23] + .io_l1clk(rvclkhdr_11_io_l1clk), + .io_clk(rvclkhdr_11_io_clk), + .io_en(rvclkhdr_11_io_en), + .io_scan_mode(rvclkhdr_11_io_scan_mode) + ); + assign io_lsu_busreq_r = _T_5009; // @[el2_lsu_bus_buffer.scala 668:19] + assign io_lsu_bus_buffer_pend_any = |buf_numvld_pend_any; // @[el2_lsu_bus_buffer.scala 577:30] + assign io_lsu_bus_buffer_full_any = _T_4519 ? _T_4520 : _T_4521; // @[el2_lsu_bus_buffer.scala 578:30] + assign io_lsu_bus_buffer_empty_any = _T_4532 & _T_1252; // @[el2_lsu_bus_buffer.scala 579:31] + assign io_ld_byte_hit_buf_lo = {_T_69,_T_58}; // @[el2_lsu_bus_buffer.scala 189:25] + assign io_ld_byte_hit_buf_hi = {_T_84,_T_73}; // @[el2_lsu_bus_buffer.scala 190:25] + assign io_ld_fwddata_buf_lo = _T_650 | _T_651; // @[el2_lsu_bus_buffer.scala 216:24] + assign io_ld_fwddata_buf_hi = _T_747 | _T_748; // @[el2_lsu_bus_buffer.scala 222:24] + assign io_lsu_imprecise_error_load_any = io_lsu_nonblock_load_data_error & _T_4966; // @[el2_lsu_bus_buffer.scala 653:35] + assign io_lsu_imprecise_error_store_any = _T_4950 | _T_4948; // @[el2_lsu_bus_buffer.scala 650:36] + assign io_lsu_imprecise_error_addr_any = io_lsu_imprecise_error_store_any ? _T_4972 : _T_4714; // @[el2_lsu_bus_buffer.scala 654:35] + assign io_lsu_nonblock_load_valid_m = _T_4538 & _T_4539; // @[el2_lsu_bus_buffer.scala 581:32] + assign io_lsu_nonblock_load_tag_m = _T_1884 ? 2'h0 : _T_1920; // @[el2_lsu_bus_buffer.scala 582:30] + assign io_lsu_nonblock_load_inv_r = lsu_nonblock_load_valid_r & _T_4541; // @[el2_lsu_bus_buffer.scala 584:30] + assign io_lsu_nonblock_load_inv_tag_r = WrPtr0_r; // @[el2_lsu_bus_buffer.scala 585:34] + assign io_lsu_nonblock_load_data_valid = lsu_nonblock_load_data_ready & _T_4762; // @[el2_lsu_bus_buffer.scala 597:35] + assign io_lsu_nonblock_load_data_error = _T_4591 | _T_4589; // @[el2_lsu_bus_buffer.scala 587:35] + assign io_lsu_nonblock_load_data_tag = _T_4631 | _T_4629; // @[el2_lsu_bus_buffer.scala 588:33] + assign io_lsu_nonblock_load_data = _T_4797[31:0]; // @[el2_lsu_bus_buffer.scala 598:29] + assign io_lsu_pmu_bus_trxn = _T_4989 | _T_4884; // @[el2_lsu_bus_buffer.scala 660:23] + assign io_lsu_pmu_bus_misaligned = _T_4992 & io_lsu_commit_r; // @[el2_lsu_bus_buffer.scala 661:29] + assign io_lsu_pmu_bus_error = io_lsu_imprecise_error_load_any | io_lsu_imprecise_error_store_any; // @[el2_lsu_bus_buffer.scala 662:24] + assign io_lsu_pmu_bus_busy = _T_4999 | _T_5001; // @[el2_lsu_bus_buffer.scala 664:23] + assign io_lsu_axi_awvalid = _T_4894 & _T_1260; // @[el2_lsu_bus_buffer.scala 620:22] + assign io_lsu_axi_awid = {{1'd0}, _T_1869}; // @[el2_lsu_bus_buffer.scala 621:19] + assign io_lsu_axi_awaddr = obuf_sideeffect ? obuf_addr : _T_4898; // @[el2_lsu_bus_buffer.scala 622:21] + assign io_lsu_axi_awregion = obuf_addr[31:28]; // @[el2_lsu_bus_buffer.scala 626:23] + assign io_lsu_axi_awsize = obuf_sideeffect ? _T_4900 : 3'h3; // @[el2_lsu_bus_buffer.scala 623:21] + assign io_lsu_axi_awcache = obuf_sideeffect ? 4'h0 : 4'hf; // @[el2_lsu_bus_buffer.scala 625:22] + assign io_lsu_axi_wvalid = _T_4906 & _T_1260; // @[el2_lsu_bus_buffer.scala 632:21] + assign io_lsu_axi_wdata = obuf_data; // @[el2_lsu_bus_buffer.scala 634:20] + assign io_lsu_axi_wstrb = obuf_byteen & _T_4910; // @[el2_lsu_bus_buffer.scala 633:20] + assign io_lsu_axi_bready = 1'h1; // @[el2_lsu_bus_buffer.scala 648:21] + assign io_lsu_axi_arvalid = _T_4915 & _T_1260; // @[el2_lsu_bus_buffer.scala 637:22] + assign io_lsu_axi_arid = {{1'd0}, _T_1869}; // @[el2_lsu_bus_buffer.scala 638:19] + assign io_lsu_axi_araddr = obuf_sideeffect ? obuf_addr : _T_4898; // @[el2_lsu_bus_buffer.scala 639:21] + assign io_lsu_axi_arregion = obuf_addr[31:28]; // @[el2_lsu_bus_buffer.scala 643:23] + assign io_lsu_axi_arsize = obuf_sideeffect ? _T_4900 : 3'h3; // @[el2_lsu_bus_buffer.scala 640:21] + assign io_lsu_axi_arcache = obuf_sideeffect ? 4'h0 : 4'hf; // @[el2_lsu_bus_buffer.scala 642:22] + assign io_lsu_axi_rready = 1'h1; // @[el2_lsu_bus_buffer.scala 649:21] + assign rvclkhdr_io_clk = clock; // @[el2_lib.scala 508:18] + assign rvclkhdr_io_en = _T_853 & _T_854; // @[el2_lib.scala 509:17] + assign rvclkhdr_io_scan_mode = io_scan_mode; // @[el2_lib.scala 510:24] + assign rvclkhdr_1_io_clk = clock; // @[el2_lib.scala 508:18] + assign rvclkhdr_1_io_en = _T_853 & _T_854; // @[el2_lib.scala 509:17] + assign rvclkhdr_1_io_scan_mode = io_scan_mode; // @[el2_lib.scala 510:24] + assign rvclkhdr_2_io_clk = io_lsu_busm_clk; // @[el2_lib.scala 508:18] + assign rvclkhdr_2_io_en = _T_1261 & io_lsu_bus_clk_en; // @[el2_lib.scala 509:17] + assign rvclkhdr_2_io_scan_mode = io_scan_mode; // @[el2_lib.scala 510:24] + assign rvclkhdr_3_io_clk = io_lsu_busm_clk; // @[el2_lib.scala 508:18] + assign rvclkhdr_3_io_en = _T_1261 & io_lsu_bus_clk_en; // @[el2_lib.scala 509:17] + assign rvclkhdr_3_io_scan_mode = io_scan_mode; // @[el2_lib.scala 510:24] + assign rvclkhdr_4_io_clk = clock; // @[el2_lib.scala 508:18] + assign rvclkhdr_4_io_en = _T_3549 & buf_state_en_0; // @[el2_lib.scala 509:17] + assign rvclkhdr_4_io_scan_mode = io_scan_mode; // @[el2_lib.scala 510:24] + assign rvclkhdr_5_io_clk = clock; // @[el2_lib.scala 508:18] + assign rvclkhdr_5_io_en = _T_3742 & buf_state_en_1; // @[el2_lib.scala 509:17] + assign rvclkhdr_5_io_scan_mode = io_scan_mode; // @[el2_lib.scala 510:24] + assign rvclkhdr_6_io_clk = clock; // @[el2_lib.scala 508:18] + assign rvclkhdr_6_io_en = _T_3935 & buf_state_en_2; // @[el2_lib.scala 509:17] + assign rvclkhdr_6_io_scan_mode = io_scan_mode; // @[el2_lib.scala 510:24] + assign rvclkhdr_7_io_clk = clock; // @[el2_lib.scala 508:18] + assign rvclkhdr_7_io_en = _T_4128 & buf_state_en_3; // @[el2_lib.scala 509:17] + assign rvclkhdr_7_io_scan_mode = io_scan_mode; // @[el2_lib.scala 510:24] + assign rvclkhdr_8_io_clk = clock; // @[el2_lib.scala 508:18] + assign rvclkhdr_8_io_en = _T_3549 ? buf_state_en_0 : _GEN_70; // @[el2_lib.scala 509:17] + assign rvclkhdr_8_io_scan_mode = io_scan_mode; // @[el2_lib.scala 510:24] + assign rvclkhdr_9_io_clk = clock; // @[el2_lib.scala 508:18] + assign rvclkhdr_9_io_en = _T_3742 ? buf_state_en_1 : _GEN_146; // @[el2_lib.scala 509:17] + assign rvclkhdr_9_io_scan_mode = io_scan_mode; // @[el2_lib.scala 510:24] + assign rvclkhdr_10_io_clk = clock; // @[el2_lib.scala 508:18] + assign rvclkhdr_10_io_en = _T_3935 ? buf_state_en_2 : _GEN_222; // @[el2_lib.scala 509:17] + assign rvclkhdr_10_io_scan_mode = io_scan_mode; // @[el2_lib.scala 510:24] + assign rvclkhdr_11_io_clk = clock; // @[el2_lib.scala 508:18] + assign rvclkhdr_11_io_en = _T_4128 ? buf_state_en_3 : _GEN_298; // @[el2_lib.scala 509:17] + assign rvclkhdr_11_io_scan_mode = io_scan_mode; // @[el2_lib.scala 510:24] +`ifdef RANDOMIZE_GARBAGE_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_INVALID_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_REG_INIT +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_MEM_INIT +`define RANDOMIZE +`endif +`ifndef RANDOM +`define RANDOM $random +`endif +`ifdef RANDOMIZE_MEM_INIT + integer initvar; +`endif +`ifndef SYNTHESIS +`ifdef FIRRTL_BEFORE_INITIAL +`FIRRTL_BEFORE_INITIAL +`endif +initial begin + `ifdef RANDOMIZE + `ifdef INIT_RANDOM + `INIT_RANDOM + `endif + `ifndef VERILATOR + `ifdef RANDOMIZE_DELAY + #`RANDOMIZE_DELAY begin end + `else + #0.002 begin end + `endif + `endif +`ifdef RANDOMIZE_REG_INIT + _RAND_0 = {1{`RANDOM}}; + buf_addr_0 = _RAND_0[31:0]; + _RAND_1 = {1{`RANDOM}}; + _T_4381 = _RAND_1[0:0]; + _RAND_2 = {1{`RANDOM}}; + _T_4378 = _RAND_2[0:0]; + _RAND_3 = {1{`RANDOM}}; + _T_4375 = _RAND_3[0:0]; + _RAND_4 = {1{`RANDOM}}; + _T_4372 = _RAND_4[0:0]; + _RAND_5 = {1{`RANDOM}}; + buf_state_0 = _RAND_5[2:0]; + _RAND_6 = {1{`RANDOM}}; + buf_addr_1 = _RAND_6[31:0]; + _RAND_7 = {1{`RANDOM}}; + buf_state_1 = _RAND_7[2:0]; + _RAND_8 = {1{`RANDOM}}; + buf_addr_2 = _RAND_8[31:0]; + _RAND_9 = {1{`RANDOM}}; + buf_state_2 = _RAND_9[2:0]; + _RAND_10 = {1{`RANDOM}}; + buf_addr_3 = _RAND_10[31:0]; + _RAND_11 = {1{`RANDOM}}; + buf_state_3 = _RAND_11[2:0]; + _RAND_12 = {1{`RANDOM}}; + buf_byteen_3 = _RAND_12[3:0]; + _RAND_13 = {1{`RANDOM}}; + buf_byteen_2 = _RAND_13[3:0]; + _RAND_14 = {1{`RANDOM}}; + buf_byteen_1 = _RAND_14[3:0]; + _RAND_15 = {1{`RANDOM}}; + buf_byteen_0 = _RAND_15[3:0]; + _RAND_16 = {1{`RANDOM}}; + buf_ageQ_3 = _RAND_16[3:0]; + _RAND_17 = {1{`RANDOM}}; + _T_1869 = _RAND_17[1:0]; + _RAND_18 = {1{`RANDOM}}; + obuf_merge = _RAND_18[0:0]; + _RAND_19 = {1{`RANDOM}}; + obuf_tag1 = _RAND_19[1:0]; + _RAND_20 = {1{`RANDOM}}; + obuf_valid = _RAND_20[0:0]; + _RAND_21 = {1{`RANDOM}}; + obuf_wr_enQ = _RAND_21[0:0]; + _RAND_22 = {1{`RANDOM}}; + ibuf_addr = _RAND_22[31:0]; + _RAND_23 = {1{`RANDOM}}; + ibuf_write = _RAND_23[0:0]; + _RAND_24 = {1{`RANDOM}}; + ibuf_valid = _RAND_24[0:0]; + _RAND_25 = {1{`RANDOM}}; + ibuf_byteen = _RAND_25[3:0]; + _RAND_26 = {1{`RANDOM}}; + buf_ageQ_2 = _RAND_26[3:0]; + _RAND_27 = {1{`RANDOM}}; + buf_ageQ_1 = _RAND_27[3:0]; + _RAND_28 = {1{`RANDOM}}; + buf_ageQ_0 = _RAND_28[3:0]; + _RAND_29 = {1{`RANDOM}}; + buf_data_0 = _RAND_29[31:0]; + _RAND_30 = {1{`RANDOM}}; + buf_data_1 = _RAND_30[31:0]; + _RAND_31 = {1{`RANDOM}}; + buf_data_2 = _RAND_31[31:0]; + _RAND_32 = {1{`RANDOM}}; + buf_data_3 = _RAND_32[31:0]; + _RAND_33 = {1{`RANDOM}}; + ibuf_data = _RAND_33[31:0]; + _RAND_34 = {1{`RANDOM}}; + ibuf_timer = _RAND_34[2:0]; + _RAND_35 = {1{`RANDOM}}; + ibuf_sideeffect = _RAND_35[0:0]; + _RAND_36 = {1{`RANDOM}}; + WrPtr1_r = _RAND_36[1:0]; + _RAND_37 = {1{`RANDOM}}; + WrPtr0_r = _RAND_37[1:0]; + _RAND_38 = {1{`RANDOM}}; + ibuf_tag = _RAND_38[1:0]; + _RAND_39 = {1{`RANDOM}}; + ibuf_dualtag = _RAND_39[1:0]; + _RAND_40 = {1{`RANDOM}}; + ibuf_dual = _RAND_40[0:0]; + _RAND_41 = {1{`RANDOM}}; + ibuf_samedw = _RAND_41[0:0]; + _RAND_42 = {1{`RANDOM}}; + ibuf_nomerge = _RAND_42[0:0]; + _RAND_43 = {1{`RANDOM}}; + ibuf_unsign = _RAND_43[0:0]; + _RAND_44 = {1{`RANDOM}}; + ibuf_sz = _RAND_44[1:0]; + _RAND_45 = {1{`RANDOM}}; + obuf_wr_timer = _RAND_45[2:0]; + _RAND_46 = {1{`RANDOM}}; + buf_nomerge_0 = _RAND_46[0:0]; + _RAND_47 = {1{`RANDOM}}; + buf_nomerge_1 = _RAND_47[0:0]; + _RAND_48 = {1{`RANDOM}}; + buf_nomerge_2 = _RAND_48[0:0]; + _RAND_49 = {1{`RANDOM}}; + buf_nomerge_3 = _RAND_49[0:0]; + _RAND_50 = {1{`RANDOM}}; + _T_4351 = _RAND_50[0:0]; + _RAND_51 = {1{`RANDOM}}; + _T_4348 = _RAND_51[0:0]; + _RAND_52 = {1{`RANDOM}}; + _T_4345 = _RAND_52[0:0]; + _RAND_53 = {1{`RANDOM}}; + _T_4342 = _RAND_53[0:0]; + _RAND_54 = {1{`RANDOM}}; + buf_dual_3 = _RAND_54[0:0]; + _RAND_55 = {1{`RANDOM}}; + buf_dual_2 = _RAND_55[0:0]; + _RAND_56 = {1{`RANDOM}}; + buf_dual_1 = _RAND_56[0:0]; + _RAND_57 = {1{`RANDOM}}; + buf_dual_0 = _RAND_57[0:0]; + _RAND_58 = {1{`RANDOM}}; + buf_samedw_3 = _RAND_58[0:0]; + _RAND_59 = {1{`RANDOM}}; + buf_samedw_2 = _RAND_59[0:0]; + _RAND_60 = {1{`RANDOM}}; + buf_samedw_1 = _RAND_60[0:0]; + _RAND_61 = {1{`RANDOM}}; + buf_samedw_0 = _RAND_61[0:0]; + _RAND_62 = {1{`RANDOM}}; + obuf_write = _RAND_62[0:0]; + _RAND_63 = {1{`RANDOM}}; + obuf_cmd_done = _RAND_63[0:0]; + _RAND_64 = {1{`RANDOM}}; + obuf_data_done = _RAND_64[0:0]; + _RAND_65 = {1{`RANDOM}}; + obuf_nosend = _RAND_65[0:0]; + _RAND_66 = {1{`RANDOM}}; + obuf_addr = _RAND_66[31:0]; + _RAND_67 = {1{`RANDOM}}; + buf_sz_0 = _RAND_67[1:0]; + _RAND_68 = {1{`RANDOM}}; + buf_sz_1 = _RAND_68[1:0]; + _RAND_69 = {1{`RANDOM}}; + buf_sz_2 = _RAND_69[1:0]; + _RAND_70 = {1{`RANDOM}}; + buf_sz_3 = _RAND_70[1:0]; + _RAND_71 = {1{`RANDOM}}; + obuf_sideeffect = _RAND_71[0:0]; + _RAND_72 = {1{`RANDOM}}; + obuf_rdrsp_pend = _RAND_72[0:0]; + _RAND_73 = {1{`RANDOM}}; + obuf_rdrsp_tag = _RAND_73[2:0]; + _RAND_74 = {1{`RANDOM}}; + buf_dualhi_3 = _RAND_74[0:0]; + _RAND_75 = {1{`RANDOM}}; + buf_dualhi_2 = _RAND_75[0:0]; + _RAND_76 = {1{`RANDOM}}; + buf_dualhi_1 = _RAND_76[0:0]; + _RAND_77 = {1{`RANDOM}}; + buf_dualhi_0 = _RAND_77[0:0]; + _RAND_78 = {1{`RANDOM}}; + obuf_sz = _RAND_78[1:0]; + _RAND_79 = {1{`RANDOM}}; + obuf_byteen = _RAND_79[7:0]; + _RAND_80 = {2{`RANDOM}}; + obuf_data = _RAND_80[63:0]; + _RAND_81 = {1{`RANDOM}}; + buf_rspageQ_0 = _RAND_81[3:0]; + _RAND_82 = {1{`RANDOM}}; + buf_rspageQ_1 = _RAND_82[3:0]; + _RAND_83 = {1{`RANDOM}}; + buf_rspageQ_2 = _RAND_83[3:0]; + _RAND_84 = {1{`RANDOM}}; + buf_rspageQ_3 = _RAND_84[3:0]; + _RAND_85 = {1{`RANDOM}}; + _T_4328 = _RAND_85[0:0]; + _RAND_86 = {1{`RANDOM}}; + _T_4326 = _RAND_86[0:0]; + _RAND_87 = {1{`RANDOM}}; + _T_4324 = _RAND_87[0:0]; + _RAND_88 = {1{`RANDOM}}; + _T_4322 = _RAND_88[0:0]; + _RAND_89 = {1{`RANDOM}}; + buf_ldfwdtag_0 = _RAND_89[1:0]; + _RAND_90 = {1{`RANDOM}}; + buf_dualtag_0 = _RAND_90[1:0]; + _RAND_91 = {1{`RANDOM}}; + buf_ldfwdtag_3 = _RAND_91[1:0]; + _RAND_92 = {1{`RANDOM}}; + buf_ldfwdtag_2 = _RAND_92[1:0]; + _RAND_93 = {1{`RANDOM}}; + buf_ldfwdtag_1 = _RAND_93[1:0]; + _RAND_94 = {1{`RANDOM}}; + buf_dualtag_1 = _RAND_94[1:0]; + _RAND_95 = {1{`RANDOM}}; + buf_dualtag_2 = _RAND_95[1:0]; + _RAND_96 = {1{`RANDOM}}; + buf_dualtag_3 = _RAND_96[1:0]; + _RAND_97 = {1{`RANDOM}}; + _T_4357 = _RAND_97[0:0]; + _RAND_98 = {1{`RANDOM}}; + _T_4360 = _RAND_98[0:0]; + _RAND_99 = {1{`RANDOM}}; + _T_4363 = _RAND_99[0:0]; + _RAND_100 = {1{`RANDOM}}; + _T_4366 = _RAND_100[0:0]; + _RAND_101 = {1{`RANDOM}}; + _T_4432 = _RAND_101[0:0]; + _RAND_102 = {1{`RANDOM}}; + _T_4427 = _RAND_102[0:0]; + _RAND_103 = {1{`RANDOM}}; + _T_4422 = _RAND_103[0:0]; + _RAND_104 = {1{`RANDOM}}; + _T_4417 = _RAND_104[0:0]; + _RAND_105 = {1{`RANDOM}}; + lsu_nonblock_load_valid_r = _RAND_105[0:0]; + _RAND_106 = {1{`RANDOM}}; + _T_5009 = _RAND_106[0:0]; +`endif // RANDOMIZE_REG_INIT + if (reset) begin + buf_addr_0 = 32'h0; + end + if (reset) begin + _T_4381 = 1'h0; + end + if (reset) begin + _T_4378 = 1'h0; + end + if (reset) begin + _T_4375 = 1'h0; + end + if (reset) begin + _T_4372 = 1'h0; + end + if (reset) begin + buf_state_0 = 3'h0; + end + if (reset) begin + buf_addr_1 = 32'h0; + end + if (reset) begin + buf_state_1 = 3'h0; + end + if (reset) begin + buf_addr_2 = 32'h0; + end + if (reset) begin + buf_state_2 = 3'h0; + end + if (reset) begin + buf_addr_3 = 32'h0; + end + if (reset) begin + buf_state_3 = 3'h0; + end + if (reset) begin + buf_byteen_3 = 4'h0; + end + if (reset) begin + buf_byteen_2 = 4'h0; + end + if (reset) begin + buf_byteen_1 = 4'h0; + end + if (reset) begin + buf_byteen_0 = 4'h0; + end + if (reset) begin + buf_ageQ_3 = 4'h0; + end + if (reset) begin + _T_1869 = 2'h0; + end + if (reset) begin + obuf_merge = 1'h0; + end + if (reset) begin + obuf_tag1 = 2'h0; + end + if (reset) begin + obuf_valid = 1'h0; + end + if (reset) begin + obuf_wr_enQ = 1'h0; + end + if (reset) begin + ibuf_addr = 32'h0; + end + if (reset) begin + ibuf_write = 1'h0; + end + if (reset) begin + ibuf_valid = 1'h0; + end + if (reset) begin + ibuf_byteen = 4'h0; + end + if (reset) begin + buf_ageQ_2 = 4'h0; + end + if (reset) begin + buf_ageQ_1 = 4'h0; + end + if (reset) begin + buf_ageQ_0 = 4'h0; + end + if (reset) begin + buf_data_0 = 32'h0; + end + if (reset) begin + buf_data_1 = 32'h0; + end + if (reset) begin + buf_data_2 = 32'h0; + end + if (reset) begin + buf_data_3 = 32'h0; + end + if (reset) begin + ibuf_data = 32'h0; + end + if (reset) begin + ibuf_timer = 3'h0; + end + if (reset) begin + ibuf_sideeffect = 1'h0; + end + if (reset) begin + WrPtr1_r = 2'h0; + end + if (reset) begin + WrPtr0_r = 2'h0; + end + if (reset) begin + ibuf_tag = 2'h0; + end + if (reset) begin + ibuf_dualtag = 2'h0; + end + if (reset) begin + ibuf_dual = 1'h0; + end + if (reset) begin + ibuf_samedw = 1'h0; + end + if (reset) begin + ibuf_nomerge = 1'h0; + end + if (reset) begin + ibuf_unsign = 1'h0; + end + if (reset) begin + ibuf_sz = 2'h0; + end + if (reset) begin + obuf_wr_timer = 3'h0; + end + if (reset) begin + buf_nomerge_0 = 1'h0; + end + if (reset) begin + buf_nomerge_1 = 1'h0; + end + if (reset) begin + buf_nomerge_2 = 1'h0; + end + if (reset) begin + buf_nomerge_3 = 1'h0; + end + if (reset) begin + _T_4351 = 1'h0; + end + if (reset) begin + _T_4348 = 1'h0; + end + if (reset) begin + _T_4345 = 1'h0; + end + if (reset) begin + _T_4342 = 1'h0; + end + if (reset) begin + buf_dual_3 = 1'h0; + end + if (reset) begin + buf_dual_2 = 1'h0; + end + if (reset) begin + buf_dual_1 = 1'h0; + end + if (reset) begin + buf_dual_0 = 1'h0; + end + if (reset) begin + buf_samedw_3 = 1'h0; + end + if (reset) begin + buf_samedw_2 = 1'h0; + end + if (reset) begin + buf_samedw_1 = 1'h0; + end + if (reset) begin + buf_samedw_0 = 1'h0; + end + if (reset) begin + obuf_write = 1'h0; + end + if (reset) begin + obuf_cmd_done = 1'h0; + end + if (reset) begin + obuf_data_done = 1'h0; + end + if (reset) begin + obuf_nosend = 1'h0; + end + if (reset) begin + obuf_addr = 32'h0; + end + if (reset) begin + buf_sz_0 = 2'h0; + end + if (reset) begin + buf_sz_1 = 2'h0; + end + if (reset) begin + buf_sz_2 = 2'h0; + end + if (reset) begin + buf_sz_3 = 2'h0; + end + if (reset) begin + obuf_sideeffect = 1'h0; + end + if (reset) begin + obuf_rdrsp_pend = 1'h0; + end + if (reset) begin + obuf_rdrsp_tag = 3'h0; + end + if (reset) begin + buf_dualhi_3 = 1'h0; + end + if (reset) begin + buf_dualhi_2 = 1'h0; + end + if (reset) begin + buf_dualhi_1 = 1'h0; + end + if (reset) begin + buf_dualhi_0 = 1'h0; + end + if (reset) begin + obuf_sz = 2'h0; + end + if (reset) begin + obuf_byteen = 8'h0; + end + if (reset) begin + obuf_data = 64'h0; + end + if (reset) begin + buf_rspageQ_0 = 4'h0; + end + if (reset) begin + buf_rspageQ_1 = 4'h0; + end + if (reset) begin + buf_rspageQ_2 = 4'h0; + end + if (reset) begin + buf_rspageQ_3 = 4'h0; + end + if (reset) begin + _T_4328 = 1'h0; + end + if (reset) begin + _T_4326 = 1'h0; + end + if (reset) begin + _T_4324 = 1'h0; + end + if (reset) begin + _T_4322 = 1'h0; + end + if (reset) begin + buf_ldfwdtag_0 = 2'h0; + end + if (reset) begin + buf_dualtag_0 = 2'h0; + end + if (reset) begin + buf_ldfwdtag_3 = 2'h0; + end + if (reset) begin + buf_ldfwdtag_2 = 2'h0; + end + if (reset) begin + buf_ldfwdtag_1 = 2'h0; + end + if (reset) begin + buf_dualtag_1 = 2'h0; + end + if (reset) begin + buf_dualtag_2 = 2'h0; + end + if (reset) begin + buf_dualtag_3 = 2'h0; + end + if (reset) begin + _T_4357 = 1'h0; + end + if (reset) begin + _T_4360 = 1'h0; + end + if (reset) begin + _T_4363 = 1'h0; + end + if (reset) begin + _T_4366 = 1'h0; + end + if (reset) begin + _T_4432 = 1'h0; + end + if (reset) begin + _T_4427 = 1'h0; + end + if (reset) begin + _T_4422 = 1'h0; + end + if (reset) begin + _T_4417 = 1'h0; + end + if (reset) begin + lsu_nonblock_load_valid_r = 1'h0; + end + if (reset) begin + _T_5009 = 1'h0; + end + `endif // RANDOMIZE +end // initial +`ifdef FIRRTL_AFTER_INITIAL +`FIRRTL_AFTER_INITIAL +`endif +`endif // SYNTHESIS + always @(posedge rvclkhdr_4_io_l1clk or posedge reset) begin + if (reset) begin + buf_addr_0 <= 32'h0; + end else if (ibuf_drainvec_vld[0]) begin + buf_addr_0 <= ibuf_addr; + end else if (_T_3364) begin + buf_addr_0 <= io_end_addr_r; + end else begin + buf_addr_0 <= io_lsu_addr_r; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4381 <= 1'h0; + end else if (buf_wr_en_3) begin + _T_4381 <= buf_write_in[3]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4378 <= 1'h0; + end else if (buf_wr_en_2) begin + _T_4378 <= buf_write_in[2]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4375 <= 1'h0; + end else if (buf_wr_en_1) begin + _T_4375 <= buf_write_in[1]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4372 <= 1'h0; + end else if (buf_wr_en_0) begin + _T_4372 <= buf_write_in[0]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_state_0 <= 3'h0; + end else if (buf_state_en_0) begin + if (_T_3549) begin + if (io_lsu_bus_clk_en) begin + buf_state_0 <= 3'h2; + end else begin + buf_state_0 <= 3'h1; + end + end else if (_T_3572) begin + if (io_dec_tlu_force_halt) begin + buf_state_0 <= 3'h0; + end else begin + buf_state_0 <= 3'h2; + end + end else if (_T_3576) begin + if (io_dec_tlu_force_halt) begin + buf_state_0 <= 3'h0; + end else if (_T_3580) begin + buf_state_0 <= 3'h5; + end else begin + buf_state_0 <= 3'h3; + end + end else if (_T_3610) begin + if (_T_3615) begin + buf_state_0 <= 3'h0; + end else if (_T_3623) begin + buf_state_0 <= 3'h4; + end else if (_T_3651) begin + buf_state_0 <= 3'h5; + end else begin + buf_state_0 <= 3'h6; + end + end else if (_T_3697) begin + if (io_dec_tlu_force_halt) begin + buf_state_0 <= 3'h0; + end else if (_T_3703) begin + buf_state_0 <= 3'h5; + end else begin + buf_state_0 <= 3'h6; + end + end else if (_T_3715) begin + if (io_dec_tlu_force_halt) begin + buf_state_0 <= 3'h0; + end else begin + buf_state_0 <= 3'h6; + end + end else begin + buf_state_0 <= 3'h0; + end + end + end + always @(posedge rvclkhdr_5_io_l1clk or posedge reset) begin + if (reset) begin + buf_addr_1 <= 32'h0; + end else if (ibuf_drainvec_vld[1]) begin + buf_addr_1 <= ibuf_addr; + end else if (_T_3373) begin + buf_addr_1 <= io_end_addr_r; + end else begin + buf_addr_1 <= io_lsu_addr_r; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_state_1 <= 3'h0; + end else if (buf_state_en_1) begin + if (_T_3742) begin + if (io_lsu_bus_clk_en) begin + buf_state_1 <= 3'h2; + end else begin + buf_state_1 <= 3'h1; + end + end else if (_T_3765) begin + if (io_dec_tlu_force_halt) begin + buf_state_1 <= 3'h0; + end else begin + buf_state_1 <= 3'h2; + end + end else if (_T_3769) begin + if (io_dec_tlu_force_halt) begin + buf_state_1 <= 3'h0; + end else if (_T_3580) begin + buf_state_1 <= 3'h5; + end else begin + buf_state_1 <= 3'h3; + end + end else if (_T_3803) begin + if (_T_3808) begin + buf_state_1 <= 3'h0; + end else if (_T_3816) begin + buf_state_1 <= 3'h4; + end else if (_T_3844) begin + buf_state_1 <= 3'h5; + end else begin + buf_state_1 <= 3'h6; + end + end else if (_T_3890) begin + if (io_dec_tlu_force_halt) begin + buf_state_1 <= 3'h0; + end else if (_T_3896) begin + buf_state_1 <= 3'h5; + end else begin + buf_state_1 <= 3'h6; + end + end else if (_T_3908) begin + if (io_dec_tlu_force_halt) begin + buf_state_1 <= 3'h0; + end else begin + buf_state_1 <= 3'h6; + end + end else begin + buf_state_1 <= 3'h0; + end + end + end + always @(posedge rvclkhdr_6_io_l1clk or posedge reset) begin + if (reset) begin + buf_addr_2 <= 32'h0; + end else if (ibuf_drainvec_vld[2]) begin + buf_addr_2 <= ibuf_addr; + end else if (_T_3382) begin + buf_addr_2 <= io_end_addr_r; + end else begin + buf_addr_2 <= io_lsu_addr_r; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_state_2 <= 3'h0; + end else if (buf_state_en_2) begin + if (_T_3935) begin + if (io_lsu_bus_clk_en) begin + buf_state_2 <= 3'h2; + end else begin + buf_state_2 <= 3'h1; + end + end else if (_T_3958) begin + if (io_dec_tlu_force_halt) begin + buf_state_2 <= 3'h0; + end else begin + buf_state_2 <= 3'h2; + end + end else if (_T_3962) begin + if (io_dec_tlu_force_halt) begin + buf_state_2 <= 3'h0; + end else if (_T_3580) begin + buf_state_2 <= 3'h5; + end else begin + buf_state_2 <= 3'h3; + end + end else if (_T_3996) begin + if (_T_4001) begin + buf_state_2 <= 3'h0; + end else if (_T_4009) begin + buf_state_2 <= 3'h4; + end else if (_T_4037) begin + buf_state_2 <= 3'h5; + end else begin + buf_state_2 <= 3'h6; + end + end else if (_T_4083) begin + if (io_dec_tlu_force_halt) begin + buf_state_2 <= 3'h0; + end else if (_T_4089) begin + buf_state_2 <= 3'h5; + end else begin + buf_state_2 <= 3'h6; + end + end else if (_T_4101) begin + if (io_dec_tlu_force_halt) begin + buf_state_2 <= 3'h0; + end else begin + buf_state_2 <= 3'h6; + end + end else begin + buf_state_2 <= 3'h0; + end + end + end + always @(posedge rvclkhdr_7_io_l1clk or posedge reset) begin + if (reset) begin + buf_addr_3 <= 32'h0; + end else if (ibuf_drainvec_vld[3]) begin + buf_addr_3 <= ibuf_addr; + end else if (_T_3391) begin + buf_addr_3 <= io_end_addr_r; + end else begin + buf_addr_3 <= io_lsu_addr_r; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_state_3 <= 3'h0; + end else if (buf_state_en_3) begin + if (_T_4128) begin + if (io_lsu_bus_clk_en) begin + buf_state_3 <= 3'h2; + end else begin + buf_state_3 <= 3'h1; + end + end else if (_T_4151) begin + if (io_dec_tlu_force_halt) begin + buf_state_3 <= 3'h0; + end else begin + buf_state_3 <= 3'h2; + end + end else if (_T_4155) begin + if (io_dec_tlu_force_halt) begin + buf_state_3 <= 3'h0; + end else if (_T_3580) begin + buf_state_3 <= 3'h5; + end else begin + buf_state_3 <= 3'h3; + end + end else if (_T_4189) begin + if (_T_4194) begin + buf_state_3 <= 3'h0; + end else if (_T_4202) begin + buf_state_3 <= 3'h4; + end else if (_T_4230) begin + buf_state_3 <= 3'h5; + end else begin + buf_state_3 <= 3'h6; + end + end else if (_T_4276) begin + if (io_dec_tlu_force_halt) begin + buf_state_3 <= 3'h0; + end else if (_T_4282) begin + buf_state_3 <= 3'h5; + end else begin + buf_state_3 <= 3'h6; + end + end else if (_T_4294) begin + if (io_dec_tlu_force_halt) begin + buf_state_3 <= 3'h0; + end else begin + buf_state_3 <= 3'h6; + end + end else begin + buf_state_3 <= 3'h0; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_byteen_3 <= 4'h0; + end else if (buf_wr_en_3) begin + if (ibuf_drainvec_vld[3]) begin + buf_byteen_3 <= ibuf_byteen_out; + end else if (_T_3391) begin + buf_byteen_3 <= ldst_byteen_hi_r; + end else begin + buf_byteen_3 <= ldst_byteen_lo_r; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_byteen_2 <= 4'h0; + end else if (buf_wr_en_2) begin + if (ibuf_drainvec_vld[2]) begin + buf_byteen_2 <= ibuf_byteen_out; + end else if (_T_3382) begin + buf_byteen_2 <= ldst_byteen_hi_r; + end else begin + buf_byteen_2 <= ldst_byteen_lo_r; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_byteen_1 <= 4'h0; + end else if (buf_wr_en_1) begin + if (ibuf_drainvec_vld[1]) begin + buf_byteen_1 <= ibuf_byteen_out; + end else if (_T_3373) begin + buf_byteen_1 <= ldst_byteen_hi_r; + end else begin + buf_byteen_1 <= ldst_byteen_lo_r; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_byteen_0 <= 4'h0; + end else if (buf_wr_en_0) begin + if (ibuf_drainvec_vld[0]) begin + buf_byteen_0 <= ibuf_byteen_out; + end else if (_T_3364) begin + buf_byteen_0 <= ldst_byteen_hi_r; + end else begin + buf_byteen_0 <= ldst_byteen_lo_r; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_ageQ_3 <= 4'h0; + end else begin + buf_ageQ_3 <= {_T_2556,_T_2479}; + end + end + always @(posedge io_lsu_busm_clk or posedge reset) begin + if (reset) begin + _T_1869 <= 2'h0; + end else if (obuf_wr_en) begin + if (ibuf_buf_byp) begin + _T_1869 <= WrPtr0_r; + end else begin + _T_1869 <= CmdPtr0; + end + end + end + always @(posedge io_lsu_busm_clk or posedge reset) begin + if (reset) begin + obuf_merge <= 1'h0; + end else if (obuf_wr_en) begin + obuf_merge <= obuf_merge_en; + end + end + always @(posedge io_lsu_busm_clk or posedge reset) begin + if (reset) begin + obuf_tag1 <= 2'h0; + end else if (obuf_wr_en) begin + if (ibuf_buf_byp) begin + obuf_tag1 <= WrPtr1_r; + end else begin + obuf_tag1 <= 2'h0; + end + end + end + always @(posedge io_lsu_free_c2_clk or posedge reset) begin + if (reset) begin + obuf_valid <= 1'h0; + end else begin + obuf_valid <= _T_1860 & _T_1861; + end + end + always @(posedge io_lsu_busm_clk or posedge reset) begin + if (reset) begin + obuf_wr_enQ <= 1'h0; + end else begin + obuf_wr_enQ <= _T_1261 & io_lsu_bus_clk_en; + end + end + always @(posedge rvclkhdr_io_l1clk or posedge reset) begin + if (reset) begin + ibuf_addr <= 32'h0; + end else if (io_ldst_dual_r) begin + ibuf_addr <= io_end_addr_r; + end else begin + ibuf_addr <= io_lsu_addr_r; + end + end + always @(posedge io_lsu_bus_ibuf_c1_clk or posedge reset) begin + if (reset) begin + ibuf_write <= 1'h0; + end else if (ibuf_wr_en) begin + ibuf_write <= io_lsu_pkt_r_store; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + ibuf_valid <= 1'h0; + end else begin + ibuf_valid <= _T_1005 & _T_1006; + end + end + always @(posedge io_lsu_bus_ibuf_c1_clk or posedge reset) begin + if (reset) begin + ibuf_byteen <= 4'h0; + end else if (ibuf_wr_en) begin + if (_T_866) begin + ibuf_byteen <= _T_881; + end else if (io_ldst_dual_r) begin + ibuf_byteen <= ldst_byteen_hi_r; + end else begin + ibuf_byteen <= ldst_byteen_lo_r; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_ageQ_2 <= 4'h0; + end else begin + buf_ageQ_2 <= {_T_2454,_T_2377}; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_ageQ_1 <= 4'h0; + end else begin + buf_ageQ_1 <= {_T_2352,_T_2275}; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_ageQ_0 <= 4'h0; + end else begin + buf_ageQ_0 <= {_T_2250,_T_2173}; + end + end + always @(posedge rvclkhdr_8_io_l1clk or posedge reset) begin + if (reset) begin + buf_data_0 <= 32'h0; + end else if (_T_3549) begin + if (_T_3564) begin + buf_data_0 <= ibuf_data_out; + end else begin + buf_data_0 <= store_data_lo_r; + end + end else if (_T_3572) begin + buf_data_0 <= 32'h0; + end else if (_T_3576) begin + if (buf_error_en_0) begin + buf_data_0 <= io_lsu_axi_rdata[31:0]; + end else if (buf_addr_0[2]) begin + buf_data_0 <= io_lsu_axi_rdata[63:32]; + end else begin + buf_data_0 <= io_lsu_axi_rdata[31:0]; + end + end else if (_T_3610) begin + if (_T_3690) begin + if (buf_addr_0[2]) begin + buf_data_0 <= io_lsu_axi_rdata[63:32]; + end else begin + buf_data_0 <= io_lsu_axi_rdata[31:0]; + end + end else begin + buf_data_0 <= io_lsu_axi_rdata[31:0]; + end + end else begin + buf_data_0 <= 32'h0; + end + end + always @(posedge rvclkhdr_9_io_l1clk or posedge reset) begin + if (reset) begin + buf_data_1 <= 32'h0; + end else if (_T_3742) begin + if (_T_3757) begin + buf_data_1 <= ibuf_data_out; + end else begin + buf_data_1 <= store_data_lo_r; + end + end else if (_T_3765) begin + buf_data_1 <= 32'h0; + end else if (_T_3769) begin + if (buf_error_en_1) begin + buf_data_1 <= io_lsu_axi_rdata[31:0]; + end else if (buf_addr_1[2]) begin + buf_data_1 <= io_lsu_axi_rdata[63:32]; + end else begin + buf_data_1 <= io_lsu_axi_rdata[31:0]; + end + end else if (_T_3803) begin + if (_T_3883) begin + if (buf_addr_1[2]) begin + buf_data_1 <= io_lsu_axi_rdata[63:32]; + end else begin + buf_data_1 <= io_lsu_axi_rdata[31:0]; + end + end else begin + buf_data_1 <= io_lsu_axi_rdata[31:0]; + end + end else begin + buf_data_1 <= 32'h0; + end + end + always @(posedge rvclkhdr_10_io_l1clk or posedge reset) begin + if (reset) begin + buf_data_2 <= 32'h0; + end else if (_T_3935) begin + if (_T_3950) begin + buf_data_2 <= ibuf_data_out; + end else begin + buf_data_2 <= store_data_lo_r; + end + end else if (_T_3958) begin + buf_data_2 <= 32'h0; + end else if (_T_3962) begin + if (buf_error_en_2) begin + buf_data_2 <= io_lsu_axi_rdata[31:0]; + end else if (buf_addr_2[2]) begin + buf_data_2 <= io_lsu_axi_rdata[63:32]; + end else begin + buf_data_2 <= io_lsu_axi_rdata[31:0]; + end + end else if (_T_3996) begin + if (_T_4076) begin + if (buf_addr_2[2]) begin + buf_data_2 <= io_lsu_axi_rdata[63:32]; + end else begin + buf_data_2 <= io_lsu_axi_rdata[31:0]; + end + end else begin + buf_data_2 <= io_lsu_axi_rdata[31:0]; + end + end else begin + buf_data_2 <= 32'h0; + end + end + always @(posedge rvclkhdr_11_io_l1clk or posedge reset) begin + if (reset) begin + buf_data_3 <= 32'h0; + end else if (_T_4128) begin + if (_T_4143) begin + buf_data_3 <= ibuf_data_out; + end else begin + buf_data_3 <= store_data_lo_r; + end + end else if (_T_4151) begin + buf_data_3 <= 32'h0; + end else if (_T_4155) begin + if (buf_error_en_3) begin + buf_data_3 <= io_lsu_axi_rdata[31:0]; + end else if (buf_addr_3[2]) begin + buf_data_3 <= io_lsu_axi_rdata[63:32]; + end else begin + buf_data_3 <= io_lsu_axi_rdata[31:0]; + end + end else if (_T_4189) begin + if (_T_4269) begin + if (buf_addr_3[2]) begin + buf_data_3 <= io_lsu_axi_rdata[63:32]; + end else begin + buf_data_3 <= io_lsu_axi_rdata[31:0]; + end + end else begin + buf_data_3 <= io_lsu_axi_rdata[31:0]; + end + end else begin + buf_data_3 <= 32'h0; + end + end + always @(posedge rvclkhdr_1_io_l1clk or posedge reset) begin + if (reset) begin + ibuf_data <= 32'h0; + end else begin + ibuf_data <= {_T_922,_T_893}; + end + end + always @(posedge io_lsu_bus_ibuf_c1_clk or posedge reset) begin + if (reset) begin + ibuf_timer <= 3'h0; + end else if (ibuf_wr_en) begin + ibuf_timer <= 3'h0; + end else if (_T_923) begin + ibuf_timer <= _T_926; + end + end + always @(posedge io_lsu_bus_ibuf_c1_clk or posedge reset) begin + if (reset) begin + ibuf_sideeffect <= 1'h0; + end else if (_T_1011) begin + ibuf_sideeffect <= io_is_sideeffects_r; + end + end + always @(posedge io_lsu_c2_r_clk or posedge reset) begin + if (reset) begin + WrPtr1_r <= 2'h0; + end else if (_T_1935) begin + WrPtr1_r <= 2'h0; + end else if (_T_1949) begin + WrPtr1_r <= 2'h1; + end else if (_T_1963) begin + WrPtr1_r <= 2'h2; + end else begin + WrPtr1_r <= 2'h3; + end + end + always @(posedge io_lsu_c2_r_clk or posedge reset) begin + if (reset) begin + WrPtr0_r <= 2'h0; + end else if (_T_1884) begin + WrPtr0_r <= 2'h0; + end else if (_T_1895) begin + WrPtr0_r <= 2'h1; + end else if (_T_1906) begin + WrPtr0_r <= 2'h2; + end else begin + WrPtr0_r <= 2'h3; + end + end + always @(posedge io_lsu_bus_ibuf_c1_clk or posedge reset) begin + if (reset) begin + ibuf_tag <= 2'h0; + end else if (_T_1011) begin + if (!(_T_866)) begin + if (io_ldst_dual_r) begin + ibuf_tag <= WrPtr1_r; + end else begin + ibuf_tag <= WrPtr0_r; + end + end + end + end + always @(posedge io_lsu_bus_ibuf_c1_clk or posedge reset) begin + if (reset) begin + ibuf_dualtag <= 2'h0; + end else if (_T_1011) begin + ibuf_dualtag <= WrPtr0_r; + end + end + always @(posedge io_lsu_bus_ibuf_c1_clk or posedge reset) begin + if (reset) begin + ibuf_dual <= 1'h0; + end else if (_T_1011) begin + ibuf_dual <= io_ldst_dual_r; + end + end + always @(posedge io_lsu_bus_ibuf_c1_clk or posedge reset) begin + if (reset) begin + ibuf_samedw <= 1'h0; + end else if (_T_1011) begin + ibuf_samedw <= ldst_samedw_r; + end + end + always @(posedge io_lsu_bus_ibuf_c1_clk or posedge reset) begin + if (reset) begin + ibuf_nomerge <= 1'h0; + end else if (_T_1011) begin + ibuf_nomerge <= io_no_dword_merge_r; + end + end + always @(posedge io_lsu_bus_ibuf_c1_clk or posedge reset) begin + if (reset) begin + ibuf_unsign <= 1'h0; + end else if (_T_1011) begin + ibuf_unsign <= io_lsu_pkt_r_unsign; + end + end + always @(posedge io_lsu_bus_ibuf_c1_clk or posedge reset) begin + if (reset) begin + ibuf_sz <= 2'h0; + end else if (ibuf_wr_en) begin + ibuf_sz <= ibuf_sz_in; + end + end + always @(posedge io_lsu_busm_clk or posedge reset) begin + if (reset) begin + obuf_wr_timer <= 3'h0; + end else if (obuf_wr_en) begin + obuf_wr_timer <= 3'h0; + end else if (_T_1079) begin + obuf_wr_timer <= _T_1081; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_nomerge_0 <= 1'h0; + end else if (buf_wr_en_0) begin + buf_nomerge_0 <= buf_nomerge_in[0]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_nomerge_1 <= 1'h0; + end else if (buf_wr_en_1) begin + buf_nomerge_1 <= buf_nomerge_in[1]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_nomerge_2 <= 1'h0; + end else if (buf_wr_en_2) begin + buf_nomerge_2 <= buf_nomerge_in[2]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_nomerge_3 <= 1'h0; + end else if (buf_wr_en_3) begin + buf_nomerge_3 <= buf_nomerge_in[3]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4351 <= 1'h0; + end else if (buf_wr_en_3) begin + _T_4351 <= buf_sideeffect_in[3]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4348 <= 1'h0; + end else if (buf_wr_en_2) begin + _T_4348 <= buf_sideeffect_in[2]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4345 <= 1'h0; + end else if (buf_wr_en_1) begin + _T_4345 <= buf_sideeffect_in[1]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4342 <= 1'h0; + end else if (buf_wr_en_0) begin + _T_4342 <= buf_sideeffect_in[0]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_dual_3 <= 1'h0; + end else if (buf_wr_en_3) begin + buf_dual_3 <= buf_dual_in[3]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_dual_2 <= 1'h0; + end else if (buf_wr_en_2) begin + buf_dual_2 <= buf_dual_in[2]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_dual_1 <= 1'h0; + end else if (buf_wr_en_1) begin + buf_dual_1 <= buf_dual_in[1]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_dual_0 <= 1'h0; + end else if (buf_wr_en_0) begin + buf_dual_0 <= buf_dual_in[0]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_samedw_3 <= 1'h0; + end else if (buf_wr_en_3) begin + buf_samedw_3 <= buf_samedw_in[3]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_samedw_2 <= 1'h0; + end else if (buf_wr_en_2) begin + buf_samedw_2 <= buf_samedw_in[2]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_samedw_1 <= 1'h0; + end else if (buf_wr_en_1) begin + buf_samedw_1 <= buf_samedw_in[1]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_samedw_0 <= 1'h0; + end else if (buf_wr_en_0) begin + buf_samedw_0 <= buf_samedw_in[0]; + end + end + always @(posedge io_lsu_busm_clk or posedge reset) begin + if (reset) begin + obuf_write <= 1'h0; + end else if (obuf_wr_en) begin + if (ibuf_buf_byp) begin + obuf_write <= io_lsu_pkt_r_store; + end else begin + obuf_write <= _T_1223; + end + end + end + always @(posedge io_lsu_busm_clk or posedge reset) begin + if (reset) begin + obuf_cmd_done <= 1'h0; + end else begin + obuf_cmd_done <= _T_1326 & _T_4881; + end + end + always @(posedge io_lsu_busm_clk or posedge reset) begin + if (reset) begin + obuf_data_done <= 1'h0; + end else begin + obuf_data_done <= _T_1326 & _T_4882; + end + end + always @(posedge io_lsu_free_c2_clk or posedge reset) begin + if (reset) begin + obuf_nosend <= 1'h0; + end else if (obuf_wr_en) begin + obuf_nosend <= obuf_nosend_in; + end + end + always @(posedge rvclkhdr_2_io_l1clk or posedge reset) begin + if (reset) begin + obuf_addr <= 32'h0; + end else if (ibuf_buf_byp) begin + obuf_addr <= io_lsu_addr_r; + end else begin + obuf_addr <= _T_1310; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_sz_0 <= 2'h0; + end else if (buf_wr_en_0) begin + if (ibuf_drainvec_vld[0]) begin + buf_sz_0 <= ibuf_sz; + end else begin + buf_sz_0 <= ibuf_sz_in; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_sz_1 <= 2'h0; + end else if (buf_wr_en_1) begin + if (ibuf_drainvec_vld[1]) begin + buf_sz_1 <= ibuf_sz; + end else begin + buf_sz_1 <= ibuf_sz_in; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_sz_2 <= 2'h0; + end else if (buf_wr_en_2) begin + if (ibuf_drainvec_vld[2]) begin + buf_sz_2 <= ibuf_sz; + end else begin + buf_sz_2 <= ibuf_sz_in; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_sz_3 <= 2'h0; + end else if (buf_wr_en_3) begin + if (ibuf_drainvec_vld[3]) begin + buf_sz_3 <= ibuf_sz; + end else begin + buf_sz_3 <= ibuf_sz_in; + end + end + end + always @(posedge io_lsu_busm_clk or posedge reset) begin + if (reset) begin + obuf_sideeffect <= 1'h0; + end else if (obuf_wr_en) begin + if (ibuf_buf_byp) begin + obuf_sideeffect <= io_is_sideeffects_r; + end else begin + obuf_sideeffect <= _T_1072; + end + end + end + always @(posedge io_lsu_busm_clk or posedge reset) begin + if (reset) begin + obuf_rdrsp_pend <= 1'h0; + end else begin + obuf_rdrsp_pend <= _T_1351 | _T_1355; + end + end + always @(posedge io_lsu_busm_clk or posedge reset) begin + if (reset) begin + obuf_rdrsp_tag <= 3'h0; + end else if (_T_1357) begin + obuf_rdrsp_tag <= obuf_tag0; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_dualhi_3 <= 1'h0; + end else if (buf_wr_en_3) begin + buf_dualhi_3 <= buf_dualhi_in[3]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_dualhi_2 <= 1'h0; + end else if (buf_wr_en_2) begin + buf_dualhi_2 <= buf_dualhi_in[2]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_dualhi_1 <= 1'h0; + end else if (buf_wr_en_1) begin + buf_dualhi_1 <= buf_dualhi_in[1]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_dualhi_0 <= 1'h0; + end else if (buf_wr_en_0) begin + buf_dualhi_0 <= buf_dualhi_in[0]; + end + end + always @(posedge io_lsu_busm_clk or posedge reset) begin + if (reset) begin + obuf_sz <= 2'h0; + end else if (obuf_wr_en) begin + if (ibuf_buf_byp) begin + obuf_sz <= ibuf_sz_in; + end else begin + obuf_sz <= _T_1323; + end + end + end + always @(posedge io_lsu_busm_clk or posedge reset) begin + if (reset) begin + obuf_byteen <= 8'h0; + end else if (obuf_wr_en) begin + obuf_byteen <= obuf_byteen_in; + end + end + always @(posedge rvclkhdr_3_io_l1clk or posedge reset) begin + if (reset) begin + obuf_data <= 64'h0; + end else begin + obuf_data <= {_T_1641,_T_1600}; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_rspageQ_0 <= 4'h0; + end else begin + buf_rspageQ_0 <= {_T_3194,_T_3183}; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_rspageQ_1 <= 4'h0; + end else begin + buf_rspageQ_1 <= {_T_3209,_T_3198}; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_rspageQ_2 <= 4'h0; + end else begin + buf_rspageQ_2 <= {_T_3224,_T_3213}; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_rspageQ_3 <= 4'h0; + end else begin + buf_rspageQ_3 <= {_T_3239,_T_3228}; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4328 <= 1'h0; + end else if (buf_ldfwd_en_3) begin + if (_T_4128) begin + _T_4328 <= 1'h0; + end else if (_T_4151) begin + _T_4328 <= 1'h0; + end else begin + _T_4328 <= _T_4155; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4326 <= 1'h0; + end else if (buf_ldfwd_en_2) begin + if (_T_3935) begin + _T_4326 <= 1'h0; + end else if (_T_3958) begin + _T_4326 <= 1'h0; + end else begin + _T_4326 <= _T_3962; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4324 <= 1'h0; + end else if (buf_ldfwd_en_1) begin + if (_T_3742) begin + _T_4324 <= 1'h0; + end else if (_T_3765) begin + _T_4324 <= 1'h0; + end else begin + _T_4324 <= _T_3769; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4322 <= 1'h0; + end else if (buf_ldfwd_en_0) begin + if (_T_3549) begin + _T_4322 <= 1'h0; + end else if (_T_3572) begin + _T_4322 <= 1'h0; + end else begin + _T_4322 <= _T_3576; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_ldfwdtag_0 <= 2'h0; + end else if (buf_ldfwd_en_0) begin + if (_T_3549) begin + buf_ldfwdtag_0 <= 2'h0; + end else if (_T_3572) begin + buf_ldfwdtag_0 <= 2'h0; + end else if (_T_3576) begin + buf_ldfwdtag_0 <= obuf_rdrsp_tag[1:0]; + end else begin + buf_ldfwdtag_0 <= 2'h0; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_dualtag_0 <= 2'h0; + end else if (buf_wr_en_0) begin + if (ibuf_drainvec_vld[0]) begin + buf_dualtag_0 <= ibuf_dualtag; + end else if (_T_3364) begin + buf_dualtag_0 <= WrPtr0_r; + end else begin + buf_dualtag_0 <= WrPtr1_r; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_ldfwdtag_3 <= 2'h0; + end else if (buf_ldfwd_en_3) begin + if (_T_4128) begin + buf_ldfwdtag_3 <= 2'h0; + end else if (_T_4151) begin + buf_ldfwdtag_3 <= 2'h0; + end else if (_T_4155) begin + buf_ldfwdtag_3 <= obuf_rdrsp_tag[1:0]; + end else begin + buf_ldfwdtag_3 <= 2'h0; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_ldfwdtag_2 <= 2'h0; + end else if (buf_ldfwd_en_2) begin + if (_T_3935) begin + buf_ldfwdtag_2 <= 2'h0; + end else if (_T_3958) begin + buf_ldfwdtag_2 <= 2'h0; + end else if (_T_3962) begin + buf_ldfwdtag_2 <= obuf_rdrsp_tag[1:0]; + end else begin + buf_ldfwdtag_2 <= 2'h0; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_ldfwdtag_1 <= 2'h0; + end else if (buf_ldfwd_en_1) begin + if (_T_3742) begin + buf_ldfwdtag_1 <= 2'h0; + end else if (_T_3765) begin + buf_ldfwdtag_1 <= 2'h0; + end else if (_T_3769) begin + buf_ldfwdtag_1 <= obuf_rdrsp_tag[1:0]; + end else begin + buf_ldfwdtag_1 <= 2'h0; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_dualtag_1 <= 2'h0; + end else if (buf_wr_en_1) begin + if (ibuf_drainvec_vld[1]) begin + buf_dualtag_1 <= ibuf_dualtag; + end else if (_T_3373) begin + buf_dualtag_1 <= WrPtr0_r; + end else begin + buf_dualtag_1 <= WrPtr1_r; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_dualtag_2 <= 2'h0; + end else if (buf_wr_en_2) begin + if (ibuf_drainvec_vld[2]) begin + buf_dualtag_2 <= ibuf_dualtag; + end else if (_T_3382) begin + buf_dualtag_2 <= WrPtr0_r; + end else begin + buf_dualtag_2 <= WrPtr1_r; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_dualtag_3 <= 2'h0; + end else if (buf_wr_en_3) begin + if (ibuf_drainvec_vld[3]) begin + buf_dualtag_3 <= ibuf_dualtag; + end else if (_T_3391) begin + buf_dualtag_3 <= WrPtr0_r; + end else begin + buf_dualtag_3 <= WrPtr1_r; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4357 <= 1'h0; + end else if (buf_wr_en_0) begin + _T_4357 <= buf_unsign_in[0]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4360 <= 1'h0; + end else if (buf_wr_en_1) begin + _T_4360 <= buf_unsign_in[1]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4363 <= 1'h0; + end else if (buf_wr_en_2) begin + _T_4363 <= buf_unsign_in[2]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4366 <= 1'h0; + end else if (buf_wr_en_3) begin + _T_4366 <= buf_unsign_in[3]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4432 <= 1'h0; + end else begin + _T_4432 <= _T_4429 & _T_4430; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4427 <= 1'h0; + end else begin + _T_4427 <= _T_4424 & _T_4425; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4422 <= 1'h0; + end else begin + _T_4422 <= _T_4419 & _T_4420; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4417 <= 1'h0; + end else begin + _T_4417 <= _T_4414 & _T_4415; + end + end + always @(posedge io_lsu_c2_r_clk or posedge reset) begin + if (reset) begin + lsu_nonblock_load_valid_r <= 1'h0; + end else begin + lsu_nonblock_load_valid_r <= io_lsu_nonblock_load_valid_m; + end + end + always @(posedge io_lsu_c2_r_clk or posedge reset) begin + if (reset) begin + _T_5009 <= 1'h0; + end else begin + _T_5009 <= _T_5006 & _T_4539; + end + end +endmodule +module el2_lsu_bus_intf( + input clock, + input reset, + input io_scan_mode, + input io_dec_tlu_external_ldfwd_disable, + input io_dec_tlu_wb_coalescing_disable, + input io_dec_tlu_sideeffect_posted_disable, + input io_lsu_c1_m_clk, + input io_lsu_c1_r_clk, + input io_lsu_c2_r_clk, + input io_lsu_bus_ibuf_c1_clk, + input io_lsu_bus_buf_c1_clk, + input io_lsu_free_c2_clk, + input io_free_clk, + input io_lsu_busm_clk, + input io_dec_lsu_valid_raw_d, + input io_lsu_busreq_m, + input io_lsu_pkt_m_load, + input io_lsu_pkt_m_valid, + input io_lsu_pkt_r_by, + input io_lsu_pkt_r_half, + input io_lsu_pkt_r_word, + input io_lsu_pkt_r_load, + input io_lsu_pkt_r_store, + input io_lsu_pkt_r_unsign, + input io_lsu_pkt_r_valid, + input [31:0] io_lsu_addr_d, + input [31:0] io_lsu_addr_m, + input [31:0] io_lsu_addr_r, + input [31:0] io_end_addr_d, + input [31:0] io_end_addr_m, + input [31:0] io_end_addr_r, + input [31:0] io_store_data_r, + input io_dec_tlu_force_halt, + input io_lsu_commit_r, + input io_is_sideeffects_m, + input io_flush_m_up, + input io_flush_r, + input io_lsu_axi_awready, + input io_lsu_axi_wready, + input io_lsu_axi_bvalid, + input [1:0] io_lsu_axi_bresp, + input [2:0] io_lsu_axi_bid, + input io_lsu_axi_arready, + input io_lsu_axi_rvalid, + input [2:0] io_lsu_axi_rid, + input [63:0] io_lsu_axi_rdata, + input io_lsu_bus_clk_en, + output io_lsu_busreq_r, + output io_lsu_bus_buffer_pend_any, + output io_lsu_bus_buffer_full_any, + output io_lsu_bus_buffer_empty_any, + output [31:0] io_bus_read_data_m, + output io_lsu_imprecise_error_load_any, + output io_lsu_imprecise_error_store_any, + output [31:0] io_lsu_imprecise_error_addr_any, + output io_lsu_nonblock_load_valid_m, + output [1:0] io_lsu_nonblock_load_tag_m, + output io_lsu_nonblock_load_inv_r, + output [1:0] io_lsu_nonblock_load_inv_tag_r, + output io_lsu_nonblock_load_data_valid, + output io_lsu_nonblock_load_data_error, + output [1:0] io_lsu_nonblock_load_data_tag, + output [31:0] io_lsu_nonblock_load_data, + output io_lsu_pmu_bus_trxn, + output io_lsu_pmu_bus_misaligned, + output io_lsu_pmu_bus_error, + output io_lsu_pmu_bus_busy, + output io_lsu_axi_awvalid, + output [2:0] io_lsu_axi_awid, + output [31:0] io_lsu_axi_awaddr, + output [3:0] io_lsu_axi_awregion, + output [2:0] io_lsu_axi_awsize, + output [3:0] io_lsu_axi_awcache, + output io_lsu_axi_wvalid, + output [63:0] io_lsu_axi_wdata, + output [7:0] io_lsu_axi_wstrb, + output io_lsu_axi_arvalid, + output [2:0] io_lsu_axi_arid, + output [31:0] io_lsu_axi_araddr, + output [3:0] io_lsu_axi_arregion, + output [2:0] io_lsu_axi_arsize, + output [3:0] io_lsu_axi_arcache +); +`ifdef RANDOMIZE_REG_INIT + reg [31:0] _RAND_0; + reg [31:0] _RAND_1; + reg [31:0] _RAND_2; + reg [31:0] _RAND_3; + reg [31:0] _RAND_4; +`endif // RANDOMIZE_REG_INIT + wire bus_buffer_clock; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_reset; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_scan_mode; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_dec_tlu_external_ldfwd_disable; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_dec_tlu_wb_coalescing_disable; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_dec_tlu_sideeffect_posted_disable; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_dec_tlu_force_halt; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_c2_r_clk; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_bus_ibuf_c1_clk; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_bus_buf_c1_clk; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_free_c2_clk; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_busm_clk; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_dec_lsu_valid_raw_d; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_pkt_m_load; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_pkt_m_valid; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_pkt_r_by; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_pkt_r_half; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_pkt_r_word; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_pkt_r_load; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_pkt_r_store; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_pkt_r_unsign; // @[el2_lsu_bus_intf.scala 148:39] + wire [31:0] bus_buffer_io_lsu_addr_m; // @[el2_lsu_bus_intf.scala 148:39] + wire [31:0] bus_buffer_io_end_addr_m; // @[el2_lsu_bus_intf.scala 148:39] + wire [31:0] bus_buffer_io_lsu_addr_r; // @[el2_lsu_bus_intf.scala 148:39] + wire [31:0] bus_buffer_io_end_addr_r; // @[el2_lsu_bus_intf.scala 148:39] + wire [31:0] bus_buffer_io_store_data_r; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_no_word_merge_r; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_no_dword_merge_r; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_busreq_m; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_ld_full_hit_m; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_flush_m_up; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_flush_r; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_commit_r; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_is_sideeffects_r; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_ldst_dual_d; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_ldst_dual_m; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_ldst_dual_r; // @[el2_lsu_bus_intf.scala 148:39] + wire [7:0] bus_buffer_io_ldst_byteen_ext_m; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_axi_awready; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_axi_wready; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_axi_bvalid; // @[el2_lsu_bus_intf.scala 148:39] + wire [1:0] bus_buffer_io_lsu_axi_bresp; // @[el2_lsu_bus_intf.scala 148:39] + wire [2:0] bus_buffer_io_lsu_axi_bid; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_axi_arready; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_axi_rvalid; // @[el2_lsu_bus_intf.scala 148:39] + wire [2:0] bus_buffer_io_lsu_axi_rid; // @[el2_lsu_bus_intf.scala 148:39] + wire [63:0] bus_buffer_io_lsu_axi_rdata; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_bus_clk_en; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_bus_clk_en_q; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_busreq_r; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_bus_buffer_pend_any; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_bus_buffer_full_any; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_bus_buffer_empty_any; // @[el2_lsu_bus_intf.scala 148:39] + wire [3:0] bus_buffer_io_ld_byte_hit_buf_lo; // @[el2_lsu_bus_intf.scala 148:39] + wire [3:0] bus_buffer_io_ld_byte_hit_buf_hi; // @[el2_lsu_bus_intf.scala 148:39] + wire [31:0] bus_buffer_io_ld_fwddata_buf_lo; // @[el2_lsu_bus_intf.scala 148:39] + wire [31:0] bus_buffer_io_ld_fwddata_buf_hi; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_imprecise_error_load_any; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_imprecise_error_store_any; // @[el2_lsu_bus_intf.scala 148:39] + wire [31:0] bus_buffer_io_lsu_imprecise_error_addr_any; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_nonblock_load_valid_m; // @[el2_lsu_bus_intf.scala 148:39] + wire [1:0] bus_buffer_io_lsu_nonblock_load_tag_m; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_nonblock_load_inv_r; // @[el2_lsu_bus_intf.scala 148:39] + wire [1:0] bus_buffer_io_lsu_nonblock_load_inv_tag_r; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_nonblock_load_data_valid; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_nonblock_load_data_error; // @[el2_lsu_bus_intf.scala 148:39] + wire [1:0] bus_buffer_io_lsu_nonblock_load_data_tag; // @[el2_lsu_bus_intf.scala 148:39] + wire [31:0] bus_buffer_io_lsu_nonblock_load_data; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_pmu_bus_trxn; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_pmu_bus_misaligned; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_pmu_bus_error; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_pmu_bus_busy; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_axi_awvalid; // @[el2_lsu_bus_intf.scala 148:39] + wire [2:0] bus_buffer_io_lsu_axi_awid; // @[el2_lsu_bus_intf.scala 148:39] + wire [31:0] bus_buffer_io_lsu_axi_awaddr; // @[el2_lsu_bus_intf.scala 148:39] + wire [3:0] bus_buffer_io_lsu_axi_awregion; // @[el2_lsu_bus_intf.scala 148:39] + wire [2:0] bus_buffer_io_lsu_axi_awsize; // @[el2_lsu_bus_intf.scala 148:39] + wire [3:0] bus_buffer_io_lsu_axi_awcache; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_axi_wvalid; // @[el2_lsu_bus_intf.scala 148:39] + wire [63:0] bus_buffer_io_lsu_axi_wdata; // @[el2_lsu_bus_intf.scala 148:39] + wire [7:0] bus_buffer_io_lsu_axi_wstrb; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_axi_bready; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_axi_arvalid; // @[el2_lsu_bus_intf.scala 148:39] + wire [2:0] bus_buffer_io_lsu_axi_arid; // @[el2_lsu_bus_intf.scala 148:39] + wire [31:0] bus_buffer_io_lsu_axi_araddr; // @[el2_lsu_bus_intf.scala 148:39] + wire [3:0] bus_buffer_io_lsu_axi_arregion; // @[el2_lsu_bus_intf.scala 148:39] + wire [2:0] bus_buffer_io_lsu_axi_arsize; // @[el2_lsu_bus_intf.scala 148:39] + wire [3:0] bus_buffer_io_lsu_axi_arcache; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_axi_rready; // @[el2_lsu_bus_intf.scala 148:39] + wire [3:0] _T_3 = io_lsu_pkt_r_word ? 4'hf : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_4 = io_lsu_pkt_r_half ? 4'h3 : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_5 = io_lsu_pkt_r_by ? 4'h1 : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_6 = _T_3 | _T_4; // @[Mux.scala 27:72] + wire [3:0] ldst_byteen_m = _T_6 | _T_5; // @[Mux.scala 27:72] + wire addr_match_dw_lo_r_m = io_lsu_addr_r[31:3] == io_lsu_addr_m[31:3]; // @[el2_lsu_bus_intf.scala 248:51] + wire _T_17 = io_lsu_addr_r[2] ^ io_lsu_addr_m[2]; // @[el2_lsu_bus_intf.scala 249:71] + wire _T_18 = ~_T_17; // @[el2_lsu_bus_intf.scala 249:53] + wire addr_match_word_lo_r_m = addr_match_dw_lo_r_m & _T_18; // @[el2_lsu_bus_intf.scala 249:51] + reg ldst_dual_r; // @[el2_lsu_bus_intf.scala 290:33] + wire _T_20 = ~ldst_dual_r; // @[el2_lsu_bus_intf.scala 250:48] + wire _T_21 = io_lsu_busreq_r & _T_20; // @[el2_lsu_bus_intf.scala 250:46] + wire _T_22 = _T_21 & io_lsu_busreq_m; // @[el2_lsu_bus_intf.scala 250:61] + wire _T_23 = ~addr_match_word_lo_r_m; // @[el2_lsu_bus_intf.scala 250:102] + wire _T_24 = io_lsu_pkt_m_load | _T_23; // @[el2_lsu_bus_intf.scala 250:100] + wire _T_29 = ~addr_match_dw_lo_r_m; // @[el2_lsu_bus_intf.scala 251:102] + wire _T_30 = io_lsu_pkt_m_load | _T_29; // @[el2_lsu_bus_intf.scala 251:100] + wire [7:0] _T_33 = {4'h0,ldst_byteen_m}; // @[Cat.scala 29:58] + wire [10:0] _GEN_0 = {{3'd0}, _T_33}; // @[el2_lsu_bus_intf.scala 252:63] + wire [10:0] _T_35 = _GEN_0 << io_lsu_addr_m[1:0]; // @[el2_lsu_bus_intf.scala 252:63] + reg _T_389; // @[el2_lsu_bus_intf.scala 292:33] + wire [3:0] ldst_byteen_r = {{3'd0}, _T_389}; // @[el2_lsu_bus_intf.scala 292:23] + wire [7:0] _T_37 = {4'h0,ldst_byteen_r}; // @[Cat.scala 29:58] + wire [10:0] _GEN_1 = {{3'd0}, _T_37}; // @[el2_lsu_bus_intf.scala 253:63] + wire [10:0] _T_39 = _GEN_1 << io_lsu_addr_r[1:0]; // @[el2_lsu_bus_intf.scala 253:63] + wire [63:0] _T_41 = {32'h0,io_store_data_r}; // @[Cat.scala 29:58] + wire [4:0] _T_43 = {io_lsu_addr_r[1:0],3'h0}; // @[Cat.scala 29:58] + wire [94:0] _GEN_2 = {{31'd0}, _T_41}; // @[el2_lsu_bus_intf.scala 254:67] + wire [94:0] _T_44 = _GEN_2 << _T_43; // @[el2_lsu_bus_intf.scala 254:67] + wire [7:0] ldst_byteen_ext_m = _T_35[7:0]; // @[el2_lsu_bus_intf.scala 252:27] + wire [3:0] ldst_byteen_hi_m = ldst_byteen_ext_m[7:4]; // @[el2_lsu_bus_intf.scala 255:47] + wire [3:0] ldst_byteen_lo_m = ldst_byteen_ext_m[3:0]; // @[el2_lsu_bus_intf.scala 256:47] + wire [7:0] ldst_byteen_ext_r = _T_39[7:0]; // @[el2_lsu_bus_intf.scala 253:27] + wire [3:0] ldst_byteen_hi_r = ldst_byteen_ext_r[7:4]; // @[el2_lsu_bus_intf.scala 257:47] + wire [3:0] ldst_byteen_lo_r = ldst_byteen_ext_r[3:0]; // @[el2_lsu_bus_intf.scala 258:47] + wire [63:0] store_data_ext_r = _T_44[63:0]; // @[el2_lsu_bus_intf.scala 254:27] + wire [31:0] store_data_hi_r = store_data_ext_r[63:32]; // @[el2_lsu_bus_intf.scala 259:46] + wire [31:0] store_data_lo_r = store_data_ext_r[31:0]; // @[el2_lsu_bus_intf.scala 260:46] + wire _T_53 = io_lsu_addr_m[31:2] == io_lsu_addr_r[31:2]; // @[el2_lsu_bus_intf.scala 261:51] + wire _T_54 = _T_53 & io_lsu_pkt_r_valid; // @[el2_lsu_bus_intf.scala 261:76] + wire _T_55 = _T_54 & io_lsu_pkt_r_store; // @[el2_lsu_bus_intf.scala 261:97] + wire ld_addr_rhit_lo_lo = _T_55 & io_lsu_busreq_m; // @[el2_lsu_bus_intf.scala 261:118] + wire _T_59 = io_end_addr_m[31:2] == io_lsu_addr_r[31:2]; // @[el2_lsu_bus_intf.scala 262:51] + wire _T_60 = _T_59 & io_lsu_pkt_r_valid; // @[el2_lsu_bus_intf.scala 262:76] + wire _T_61 = _T_60 & io_lsu_pkt_r_store; // @[el2_lsu_bus_intf.scala 262:97] + wire ld_addr_rhit_lo_hi = _T_61 & io_lsu_busreq_m; // @[el2_lsu_bus_intf.scala 262:118] + wire _T_65 = io_lsu_addr_m[31:2] == io_end_addr_r[31:2]; // @[el2_lsu_bus_intf.scala 263:51] + wire _T_66 = _T_65 & io_lsu_pkt_r_valid; // @[el2_lsu_bus_intf.scala 263:76] + wire _T_67 = _T_66 & io_lsu_pkt_r_store; // @[el2_lsu_bus_intf.scala 263:97] + wire ld_addr_rhit_hi_lo = _T_67 & io_lsu_busreq_m; // @[el2_lsu_bus_intf.scala 263:118] + wire _T_71 = io_end_addr_m[31:2] == io_end_addr_r[31:2]; // @[el2_lsu_bus_intf.scala 264:51] + wire _T_72 = _T_71 & io_lsu_pkt_r_valid; // @[el2_lsu_bus_intf.scala 264:76] + wire _T_73 = _T_72 & io_lsu_pkt_r_store; // @[el2_lsu_bus_intf.scala 264:97] + wire ld_addr_rhit_hi_hi = _T_73 & io_lsu_busreq_m; // @[el2_lsu_bus_intf.scala 264:118] + wire _T_76 = ld_addr_rhit_lo_lo & ldst_byteen_lo_r[0]; // @[el2_lsu_bus_intf.scala 265:70] + wire _T_78 = _T_76 & ldst_byteen_lo_m[0]; // @[el2_lsu_bus_intf.scala 265:92] + wire _T_80 = ld_addr_rhit_lo_lo & ldst_byteen_lo_r[1]; // @[el2_lsu_bus_intf.scala 265:70] + wire _T_82 = _T_80 & ldst_byteen_lo_m[1]; // @[el2_lsu_bus_intf.scala 265:92] + wire _T_84 = ld_addr_rhit_lo_lo & ldst_byteen_lo_r[2]; // @[el2_lsu_bus_intf.scala 265:70] + wire _T_86 = _T_84 & ldst_byteen_lo_m[2]; // @[el2_lsu_bus_intf.scala 265:92] + wire _T_88 = ld_addr_rhit_lo_lo & ldst_byteen_lo_r[3]; // @[el2_lsu_bus_intf.scala 265:70] + wire _T_90 = _T_88 & ldst_byteen_lo_m[3]; // @[el2_lsu_bus_intf.scala 265:92] + wire [3:0] ld_byte_rhit_lo_lo = {_T_90,_T_86,_T_82,_T_78}; // @[Cat.scala 29:58] + wire _T_95 = ld_addr_rhit_lo_hi & ldst_byteen_lo_r[0]; // @[el2_lsu_bus_intf.scala 266:70] + wire _T_97 = _T_95 & ldst_byteen_hi_m[0]; // @[el2_lsu_bus_intf.scala 266:92] + wire _T_99 = ld_addr_rhit_lo_hi & ldst_byteen_lo_r[1]; // @[el2_lsu_bus_intf.scala 266:70] + wire _T_101 = _T_99 & ldst_byteen_hi_m[1]; // @[el2_lsu_bus_intf.scala 266:92] + wire _T_103 = ld_addr_rhit_lo_hi & ldst_byteen_lo_r[2]; // @[el2_lsu_bus_intf.scala 266:70] + wire _T_105 = _T_103 & ldst_byteen_hi_m[2]; // @[el2_lsu_bus_intf.scala 266:92] + wire _T_107 = ld_addr_rhit_lo_hi & ldst_byteen_lo_r[3]; // @[el2_lsu_bus_intf.scala 266:70] + wire _T_109 = _T_107 & ldst_byteen_hi_m[3]; // @[el2_lsu_bus_intf.scala 266:92] + wire [3:0] ld_byte_rhit_lo_hi = {_T_109,_T_105,_T_101,_T_97}; // @[Cat.scala 29:58] + wire _T_114 = ld_addr_rhit_hi_lo & ldst_byteen_hi_r[0]; // @[el2_lsu_bus_intf.scala 267:70] + wire _T_116 = _T_114 & ldst_byteen_lo_m[0]; // @[el2_lsu_bus_intf.scala 267:92] + wire _T_118 = ld_addr_rhit_hi_lo & ldst_byteen_hi_r[1]; // @[el2_lsu_bus_intf.scala 267:70] + wire _T_120 = _T_118 & ldst_byteen_lo_m[1]; // @[el2_lsu_bus_intf.scala 267:92] + wire _T_122 = ld_addr_rhit_hi_lo & ldst_byteen_hi_r[2]; // @[el2_lsu_bus_intf.scala 267:70] + wire _T_124 = _T_122 & ldst_byteen_lo_m[2]; // @[el2_lsu_bus_intf.scala 267:92] + wire _T_126 = ld_addr_rhit_hi_lo & ldst_byteen_hi_r[3]; // @[el2_lsu_bus_intf.scala 267:70] + wire _T_128 = _T_126 & ldst_byteen_lo_m[3]; // @[el2_lsu_bus_intf.scala 267:92] + wire [3:0] ld_byte_rhit_hi_lo = {_T_128,_T_124,_T_120,_T_116}; // @[Cat.scala 29:58] + wire _T_133 = ld_addr_rhit_hi_hi & ldst_byteen_hi_r[0]; // @[el2_lsu_bus_intf.scala 268:70] + wire _T_135 = _T_133 & ldst_byteen_hi_m[0]; // @[el2_lsu_bus_intf.scala 268:92] + wire _T_137 = ld_addr_rhit_hi_hi & ldst_byteen_hi_r[1]; // @[el2_lsu_bus_intf.scala 268:70] + wire _T_139 = _T_137 & ldst_byteen_hi_m[1]; // @[el2_lsu_bus_intf.scala 268:92] + wire _T_141 = ld_addr_rhit_hi_hi & ldst_byteen_hi_r[2]; // @[el2_lsu_bus_intf.scala 268:70] + wire _T_143 = _T_141 & ldst_byteen_hi_m[2]; // @[el2_lsu_bus_intf.scala 268:92] + wire _T_145 = ld_addr_rhit_hi_hi & ldst_byteen_hi_r[3]; // @[el2_lsu_bus_intf.scala 268:70] + wire _T_147 = _T_145 & ldst_byteen_hi_m[3]; // @[el2_lsu_bus_intf.scala 268:92] + wire [3:0] ld_byte_rhit_hi_hi = {_T_147,_T_143,_T_139,_T_135}; // @[Cat.scala 29:58] + wire _T_153 = ld_byte_rhit_lo_lo[0] | ld_byte_rhit_hi_lo[0]; // @[el2_lsu_bus_intf.scala 269:73] + wire [3:0] ld_byte_hit_buf_lo = bus_buffer_io_ld_byte_hit_buf_lo; // @[el2_lsu_bus_intf.scala 198:38] + wire _T_155 = _T_153 | ld_byte_hit_buf_lo[0]; // @[el2_lsu_bus_intf.scala 269:97] + wire _T_158 = ld_byte_rhit_lo_lo[1] | ld_byte_rhit_hi_lo[1]; // @[el2_lsu_bus_intf.scala 269:73] + wire _T_160 = _T_158 | ld_byte_hit_buf_lo[1]; // @[el2_lsu_bus_intf.scala 269:97] + wire _T_163 = ld_byte_rhit_lo_lo[2] | ld_byte_rhit_hi_lo[2]; // @[el2_lsu_bus_intf.scala 269:73] + wire _T_165 = _T_163 | ld_byte_hit_buf_lo[2]; // @[el2_lsu_bus_intf.scala 269:97] + wire _T_168 = ld_byte_rhit_lo_lo[3] | ld_byte_rhit_hi_lo[3]; // @[el2_lsu_bus_intf.scala 269:73] + wire _T_170 = _T_168 | ld_byte_hit_buf_lo[3]; // @[el2_lsu_bus_intf.scala 269:97] + wire [3:0] ld_byte_hit_lo = {_T_170,_T_165,_T_160,_T_155}; // @[Cat.scala 29:58] + wire _T_176 = ld_byte_rhit_lo_hi[0] | ld_byte_rhit_hi_hi[0]; // @[el2_lsu_bus_intf.scala 270:73] + wire [3:0] ld_byte_hit_buf_hi = bus_buffer_io_ld_byte_hit_buf_hi; // @[el2_lsu_bus_intf.scala 199:38] + wire _T_178 = _T_176 | ld_byte_hit_buf_hi[0]; // @[el2_lsu_bus_intf.scala 270:97] + wire _T_181 = ld_byte_rhit_lo_hi[1] | ld_byte_rhit_hi_hi[1]; // @[el2_lsu_bus_intf.scala 270:73] + wire _T_183 = _T_181 | ld_byte_hit_buf_hi[1]; // @[el2_lsu_bus_intf.scala 270:97] + wire _T_186 = ld_byte_rhit_lo_hi[2] | ld_byte_rhit_hi_hi[2]; // @[el2_lsu_bus_intf.scala 270:73] + wire _T_188 = _T_186 | ld_byte_hit_buf_hi[2]; // @[el2_lsu_bus_intf.scala 270:97] + wire _T_191 = ld_byte_rhit_lo_hi[3] | ld_byte_rhit_hi_hi[3]; // @[el2_lsu_bus_intf.scala 270:73] + wire _T_193 = _T_191 | ld_byte_hit_buf_hi[3]; // @[el2_lsu_bus_intf.scala 270:97] + wire [3:0] ld_byte_hit_hi = {_T_193,_T_188,_T_183,_T_178}; // @[Cat.scala 29:58] + wire [3:0] ld_byte_rhit_lo = {_T_168,_T_163,_T_158,_T_153}; // @[Cat.scala 29:58] + wire [3:0] ld_byte_rhit_hi = {_T_191,_T_186,_T_181,_T_176}; // @[Cat.scala 29:58] + wire [7:0] _T_231 = ld_byte_rhit_lo_lo[0] ? store_data_lo_r[7:0] : 8'h0; // @[Mux.scala 27:72] + wire [7:0] _T_232 = ld_byte_rhit_hi_lo[0] ? store_data_hi_r[7:0] : 8'h0; // @[Mux.scala 27:72] + wire [7:0] _T_233 = _T_231 | _T_232; // @[Mux.scala 27:72] + wire [7:0] _T_239 = ld_byte_rhit_lo_lo[1] ? store_data_lo_r[15:8] : 8'h0; // @[Mux.scala 27:72] + wire [7:0] _T_240 = ld_byte_rhit_hi_lo[1] ? store_data_hi_r[15:8] : 8'h0; // @[Mux.scala 27:72] + wire [7:0] _T_241 = _T_239 | _T_240; // @[Mux.scala 27:72] + wire [7:0] _T_247 = ld_byte_rhit_lo_lo[2] ? store_data_lo_r[23:16] : 8'h0; // @[Mux.scala 27:72] + wire [7:0] _T_248 = ld_byte_rhit_hi_lo[2] ? store_data_hi_r[23:16] : 8'h0; // @[Mux.scala 27:72] + wire [7:0] _T_249 = _T_247 | _T_248; // @[Mux.scala 27:72] + wire [7:0] _T_255 = ld_byte_rhit_lo_lo[3] ? store_data_lo_r[31:24] : 8'h0; // @[Mux.scala 27:72] + wire [7:0] _T_256 = ld_byte_rhit_hi_lo[3] ? store_data_hi_r[31:24] : 8'h0; // @[Mux.scala 27:72] + wire [7:0] _T_257 = _T_255 | _T_256; // @[Mux.scala 27:72] + wire [31:0] ld_fwddata_rpipe_lo = {_T_257,_T_249,_T_241,_T_233}; // @[Cat.scala 29:58] + wire [7:0] _T_266 = ld_byte_rhit_lo_hi[0] ? store_data_lo_r[7:0] : 8'h0; // @[Mux.scala 27:72] + wire [7:0] _T_267 = ld_byte_rhit_hi_hi[0] ? store_data_hi_r[7:0] : 8'h0; // @[Mux.scala 27:72] + wire [7:0] _T_268 = _T_266 | _T_267; // @[Mux.scala 27:72] + wire [7:0] _T_274 = ld_byte_rhit_lo_hi[1] ? store_data_lo_r[15:8] : 8'h0; // @[Mux.scala 27:72] + wire [7:0] _T_275 = ld_byte_rhit_hi_hi[1] ? store_data_hi_r[15:8] : 8'h0; // @[Mux.scala 27:72] + wire [7:0] _T_276 = _T_274 | _T_275; // @[Mux.scala 27:72] + wire [7:0] _T_282 = ld_byte_rhit_lo_hi[2] ? store_data_lo_r[23:16] : 8'h0; // @[Mux.scala 27:72] + wire [7:0] _T_283 = ld_byte_rhit_hi_hi[2] ? store_data_hi_r[23:16] : 8'h0; // @[Mux.scala 27:72] + wire [7:0] _T_284 = _T_282 | _T_283; // @[Mux.scala 27:72] + wire [7:0] _T_290 = ld_byte_rhit_lo_hi[3] ? store_data_lo_r[31:24] : 8'h0; // @[Mux.scala 27:72] + wire [7:0] _T_291 = ld_byte_rhit_hi_hi[3] ? store_data_hi_r[31:24] : 8'h0; // @[Mux.scala 27:72] + wire [7:0] _T_292 = _T_290 | _T_291; // @[Mux.scala 27:72] + wire [31:0] ld_fwddata_rpipe_hi = {_T_292,_T_284,_T_276,_T_268}; // @[Cat.scala 29:58] + wire [31:0] ld_fwddata_buf_lo = bus_buffer_io_ld_fwddata_buf_lo; // @[el2_lsu_bus_intf.scala 200:38] + wire [7:0] _T_300 = ld_byte_rhit_lo[0] ? ld_fwddata_rpipe_lo[7:0] : ld_fwddata_buf_lo[7:0]; // @[el2_lsu_bus_intf.scala 275:54] + wire [7:0] _T_304 = ld_byte_rhit_lo[1] ? ld_fwddata_rpipe_lo[15:8] : ld_fwddata_buf_lo[15:8]; // @[el2_lsu_bus_intf.scala 275:54] + wire [7:0] _T_308 = ld_byte_rhit_lo[2] ? ld_fwddata_rpipe_lo[23:16] : ld_fwddata_buf_lo[23:16]; // @[el2_lsu_bus_intf.scala 275:54] + wire [7:0] _T_312 = ld_byte_rhit_lo[3] ? ld_fwddata_rpipe_lo[31:24] : ld_fwddata_buf_lo[31:24]; // @[el2_lsu_bus_intf.scala 275:54] + wire [31:0] _T_315 = {_T_312,_T_308,_T_304,_T_300}; // @[Cat.scala 29:58] + wire [31:0] ld_fwddata_buf_hi = bus_buffer_io_ld_fwddata_buf_hi; // @[el2_lsu_bus_intf.scala 201:38] + wire [7:0] _T_319 = ld_byte_rhit_hi[0] ? ld_fwddata_rpipe_hi[7:0] : ld_fwddata_buf_hi[7:0]; // @[el2_lsu_bus_intf.scala 276:54] + wire [7:0] _T_323 = ld_byte_rhit_hi[1] ? ld_fwddata_rpipe_hi[15:8] : ld_fwddata_buf_hi[15:8]; // @[el2_lsu_bus_intf.scala 276:54] + wire [7:0] _T_327 = ld_byte_rhit_hi[2] ? ld_fwddata_rpipe_hi[23:16] : ld_fwddata_buf_hi[23:16]; // @[el2_lsu_bus_intf.scala 276:54] + wire [7:0] _T_331 = ld_byte_rhit_hi[3] ? ld_fwddata_rpipe_hi[31:24] : ld_fwddata_buf_hi[31:24]; // @[el2_lsu_bus_intf.scala 276:54] + wire [31:0] _T_334 = {_T_331,_T_327,_T_323,_T_319}; // @[Cat.scala 29:58] + wire _T_337 = ~ldst_byteen_lo_m[0]; // @[el2_lsu_bus_intf.scala 277:72] + wire _T_338 = ld_byte_hit_lo[0] | _T_337; // @[el2_lsu_bus_intf.scala 277:70] + wire _T_341 = ~ldst_byteen_lo_m[1]; // @[el2_lsu_bus_intf.scala 277:72] + wire _T_342 = ld_byte_hit_lo[1] | _T_341; // @[el2_lsu_bus_intf.scala 277:70] + wire _T_345 = ~ldst_byteen_lo_m[2]; // @[el2_lsu_bus_intf.scala 277:72] + wire _T_346 = ld_byte_hit_lo[2] | _T_345; // @[el2_lsu_bus_intf.scala 277:70] + wire _T_349 = ~ldst_byteen_lo_m[3]; // @[el2_lsu_bus_intf.scala 277:72] + wire _T_350 = ld_byte_hit_lo[3] | _T_349; // @[el2_lsu_bus_intf.scala 277:70] + wire _T_351 = _T_338 & _T_342; // @[el2_lsu_bus_intf.scala 277:111] + wire _T_352 = _T_351 & _T_346; // @[el2_lsu_bus_intf.scala 277:111] + wire ld_full_hit_lo_m = _T_352 & _T_350; // @[el2_lsu_bus_intf.scala 277:111] + wire _T_356 = ~ldst_byteen_hi_m[0]; // @[el2_lsu_bus_intf.scala 278:72] + wire _T_357 = ld_byte_hit_hi[0] | _T_356; // @[el2_lsu_bus_intf.scala 278:70] + wire _T_360 = ~ldst_byteen_hi_m[1]; // @[el2_lsu_bus_intf.scala 278:72] + wire _T_361 = ld_byte_hit_hi[1] | _T_360; // @[el2_lsu_bus_intf.scala 278:70] + wire _T_364 = ~ldst_byteen_hi_m[2]; // @[el2_lsu_bus_intf.scala 278:72] + wire _T_365 = ld_byte_hit_hi[2] | _T_364; // @[el2_lsu_bus_intf.scala 278:70] + wire _T_368 = ~ldst_byteen_hi_m[3]; // @[el2_lsu_bus_intf.scala 278:72] + wire _T_369 = ld_byte_hit_hi[3] | _T_368; // @[el2_lsu_bus_intf.scala 278:70] + wire _T_370 = _T_357 & _T_361; // @[el2_lsu_bus_intf.scala 278:111] + wire _T_371 = _T_370 & _T_365; // @[el2_lsu_bus_intf.scala 278:111] + wire ld_full_hit_hi_m = _T_371 & _T_369; // @[el2_lsu_bus_intf.scala 278:111] + wire _T_373 = ld_full_hit_lo_m & ld_full_hit_hi_m; // @[el2_lsu_bus_intf.scala 279:47] + wire _T_374 = _T_373 & io_lsu_busreq_m; // @[el2_lsu_bus_intf.scala 279:66] + wire _T_375 = _T_374 & io_lsu_pkt_m_load; // @[el2_lsu_bus_intf.scala 279:84] + wire _T_376 = ~io_is_sideeffects_m; // @[el2_lsu_bus_intf.scala 279:106] + wire [63:0] ld_fwddata_hi = {{32'd0}, _T_334}; // @[el2_lsu_bus_intf.scala 276:27] + wire [63:0] ld_fwddata_lo = {{32'd0}, _T_315}; // @[el2_lsu_bus_intf.scala 275:27] + wire [63:0] _T_380 = {ld_fwddata_hi[31:0],ld_fwddata_lo[31:0]}; // @[Cat.scala 29:58] + wire [3:0] _GEN_3 = {{2'd0}, io_lsu_addr_m[1:0]}; // @[el2_lsu_bus_intf.scala 280:83] + wire [5:0] _T_382 = 4'h8 * _GEN_3; // @[el2_lsu_bus_intf.scala 280:83] + wire [63:0] ld_fwddata_m = _T_380 >> _T_382; // @[el2_lsu_bus_intf.scala 280:76] + reg lsu_bus_clk_en_q; // @[el2_lsu_bus_intf.scala 284:32] + reg ldst_dual_m; // @[el2_lsu_bus_intf.scala 287:27] + reg is_sideeffects_r; // @[el2_lsu_bus_intf.scala 291:33] + el2_lsu_bus_buffer bus_buffer ( // @[el2_lsu_bus_intf.scala 148:39] + .clock(bus_buffer_clock), + .reset(bus_buffer_reset), + .io_scan_mode(bus_buffer_io_scan_mode), + .io_dec_tlu_external_ldfwd_disable(bus_buffer_io_dec_tlu_external_ldfwd_disable), + .io_dec_tlu_wb_coalescing_disable(bus_buffer_io_dec_tlu_wb_coalescing_disable), + .io_dec_tlu_sideeffect_posted_disable(bus_buffer_io_dec_tlu_sideeffect_posted_disable), + .io_dec_tlu_force_halt(bus_buffer_io_dec_tlu_force_halt), + .io_lsu_c2_r_clk(bus_buffer_io_lsu_c2_r_clk), + .io_lsu_bus_ibuf_c1_clk(bus_buffer_io_lsu_bus_ibuf_c1_clk), + .io_lsu_bus_buf_c1_clk(bus_buffer_io_lsu_bus_buf_c1_clk), + .io_lsu_free_c2_clk(bus_buffer_io_lsu_free_c2_clk), + .io_lsu_busm_clk(bus_buffer_io_lsu_busm_clk), + .io_dec_lsu_valid_raw_d(bus_buffer_io_dec_lsu_valid_raw_d), + .io_lsu_pkt_m_load(bus_buffer_io_lsu_pkt_m_load), + .io_lsu_pkt_m_valid(bus_buffer_io_lsu_pkt_m_valid), + .io_lsu_pkt_r_by(bus_buffer_io_lsu_pkt_r_by), + .io_lsu_pkt_r_half(bus_buffer_io_lsu_pkt_r_half), + .io_lsu_pkt_r_word(bus_buffer_io_lsu_pkt_r_word), + .io_lsu_pkt_r_load(bus_buffer_io_lsu_pkt_r_load), + .io_lsu_pkt_r_store(bus_buffer_io_lsu_pkt_r_store), + .io_lsu_pkt_r_unsign(bus_buffer_io_lsu_pkt_r_unsign), + .io_lsu_addr_m(bus_buffer_io_lsu_addr_m), + .io_end_addr_m(bus_buffer_io_end_addr_m), + .io_lsu_addr_r(bus_buffer_io_lsu_addr_r), + .io_end_addr_r(bus_buffer_io_end_addr_r), + .io_store_data_r(bus_buffer_io_store_data_r), + .io_no_word_merge_r(bus_buffer_io_no_word_merge_r), + .io_no_dword_merge_r(bus_buffer_io_no_dword_merge_r), + .io_lsu_busreq_m(bus_buffer_io_lsu_busreq_m), + .io_ld_full_hit_m(bus_buffer_io_ld_full_hit_m), + .io_flush_m_up(bus_buffer_io_flush_m_up), + .io_flush_r(bus_buffer_io_flush_r), + .io_lsu_commit_r(bus_buffer_io_lsu_commit_r), + .io_is_sideeffects_r(bus_buffer_io_is_sideeffects_r), + .io_ldst_dual_d(bus_buffer_io_ldst_dual_d), + .io_ldst_dual_m(bus_buffer_io_ldst_dual_m), + .io_ldst_dual_r(bus_buffer_io_ldst_dual_r), + .io_ldst_byteen_ext_m(bus_buffer_io_ldst_byteen_ext_m), + .io_lsu_axi_awready(bus_buffer_io_lsu_axi_awready), + .io_lsu_axi_wready(bus_buffer_io_lsu_axi_wready), + .io_lsu_axi_bvalid(bus_buffer_io_lsu_axi_bvalid), + .io_lsu_axi_bresp(bus_buffer_io_lsu_axi_bresp), + .io_lsu_axi_bid(bus_buffer_io_lsu_axi_bid), + .io_lsu_axi_arready(bus_buffer_io_lsu_axi_arready), + .io_lsu_axi_rvalid(bus_buffer_io_lsu_axi_rvalid), + .io_lsu_axi_rid(bus_buffer_io_lsu_axi_rid), + .io_lsu_axi_rdata(bus_buffer_io_lsu_axi_rdata), + .io_lsu_bus_clk_en(bus_buffer_io_lsu_bus_clk_en), + .io_lsu_bus_clk_en_q(bus_buffer_io_lsu_bus_clk_en_q), + .io_lsu_busreq_r(bus_buffer_io_lsu_busreq_r), + .io_lsu_bus_buffer_pend_any(bus_buffer_io_lsu_bus_buffer_pend_any), + .io_lsu_bus_buffer_full_any(bus_buffer_io_lsu_bus_buffer_full_any), + .io_lsu_bus_buffer_empty_any(bus_buffer_io_lsu_bus_buffer_empty_any), + .io_ld_byte_hit_buf_lo(bus_buffer_io_ld_byte_hit_buf_lo), + .io_ld_byte_hit_buf_hi(bus_buffer_io_ld_byte_hit_buf_hi), + .io_ld_fwddata_buf_lo(bus_buffer_io_ld_fwddata_buf_lo), + .io_ld_fwddata_buf_hi(bus_buffer_io_ld_fwddata_buf_hi), + .io_lsu_imprecise_error_load_any(bus_buffer_io_lsu_imprecise_error_load_any), + .io_lsu_imprecise_error_store_any(bus_buffer_io_lsu_imprecise_error_store_any), + .io_lsu_imprecise_error_addr_any(bus_buffer_io_lsu_imprecise_error_addr_any), + .io_lsu_nonblock_load_valid_m(bus_buffer_io_lsu_nonblock_load_valid_m), + .io_lsu_nonblock_load_tag_m(bus_buffer_io_lsu_nonblock_load_tag_m), + .io_lsu_nonblock_load_inv_r(bus_buffer_io_lsu_nonblock_load_inv_r), + .io_lsu_nonblock_load_inv_tag_r(bus_buffer_io_lsu_nonblock_load_inv_tag_r), + .io_lsu_nonblock_load_data_valid(bus_buffer_io_lsu_nonblock_load_data_valid), + .io_lsu_nonblock_load_data_error(bus_buffer_io_lsu_nonblock_load_data_error), + .io_lsu_nonblock_load_data_tag(bus_buffer_io_lsu_nonblock_load_data_tag), + .io_lsu_nonblock_load_data(bus_buffer_io_lsu_nonblock_load_data), + .io_lsu_pmu_bus_trxn(bus_buffer_io_lsu_pmu_bus_trxn), + .io_lsu_pmu_bus_misaligned(bus_buffer_io_lsu_pmu_bus_misaligned), + .io_lsu_pmu_bus_error(bus_buffer_io_lsu_pmu_bus_error), + .io_lsu_pmu_bus_busy(bus_buffer_io_lsu_pmu_bus_busy), + .io_lsu_axi_awvalid(bus_buffer_io_lsu_axi_awvalid), + .io_lsu_axi_awid(bus_buffer_io_lsu_axi_awid), + .io_lsu_axi_awaddr(bus_buffer_io_lsu_axi_awaddr), + .io_lsu_axi_awregion(bus_buffer_io_lsu_axi_awregion), + .io_lsu_axi_awsize(bus_buffer_io_lsu_axi_awsize), + .io_lsu_axi_awcache(bus_buffer_io_lsu_axi_awcache), + .io_lsu_axi_wvalid(bus_buffer_io_lsu_axi_wvalid), + .io_lsu_axi_wdata(bus_buffer_io_lsu_axi_wdata), + .io_lsu_axi_wstrb(bus_buffer_io_lsu_axi_wstrb), + .io_lsu_axi_bready(bus_buffer_io_lsu_axi_bready), + .io_lsu_axi_arvalid(bus_buffer_io_lsu_axi_arvalid), + .io_lsu_axi_arid(bus_buffer_io_lsu_axi_arid), + .io_lsu_axi_araddr(bus_buffer_io_lsu_axi_araddr), + .io_lsu_axi_arregion(bus_buffer_io_lsu_axi_arregion), + .io_lsu_axi_arsize(bus_buffer_io_lsu_axi_arsize), + .io_lsu_axi_arcache(bus_buffer_io_lsu_axi_arcache), + .io_lsu_axi_rready(bus_buffer_io_lsu_axi_rready) + ); + assign io_lsu_busreq_r = bus_buffer_io_lsu_busreq_r; // @[el2_lsu_bus_intf.scala 193:38] + assign io_lsu_bus_buffer_pend_any = bus_buffer_io_lsu_bus_buffer_pend_any; // @[el2_lsu_bus_intf.scala 194:38] + assign io_lsu_bus_buffer_full_any = bus_buffer_io_lsu_bus_buffer_full_any; // @[el2_lsu_bus_intf.scala 195:38] + assign io_lsu_bus_buffer_empty_any = bus_buffer_io_lsu_bus_buffer_empty_any; // @[el2_lsu_bus_intf.scala 196:38] + assign io_bus_read_data_m = ld_fwddata_m[31:0]; // @[el2_lsu_bus_intf.scala 281:27] + assign io_lsu_imprecise_error_load_any = bus_buffer_io_lsu_imprecise_error_load_any; // @[el2_lsu_bus_intf.scala 202:38] + assign io_lsu_imprecise_error_store_any = bus_buffer_io_lsu_imprecise_error_store_any; // @[el2_lsu_bus_intf.scala 203:38] + assign io_lsu_imprecise_error_addr_any = bus_buffer_io_lsu_imprecise_error_addr_any; // @[el2_lsu_bus_intf.scala 204:38] + assign io_lsu_nonblock_load_valid_m = bus_buffer_io_lsu_nonblock_load_valid_m; // @[el2_lsu_bus_intf.scala 205:38] + assign io_lsu_nonblock_load_tag_m = bus_buffer_io_lsu_nonblock_load_tag_m; // @[el2_lsu_bus_intf.scala 206:38] + assign io_lsu_nonblock_load_inv_r = bus_buffer_io_lsu_nonblock_load_inv_r; // @[el2_lsu_bus_intf.scala 207:38] + assign io_lsu_nonblock_load_inv_tag_r = bus_buffer_io_lsu_nonblock_load_inv_tag_r; // @[el2_lsu_bus_intf.scala 208:38] + assign io_lsu_nonblock_load_data_valid = bus_buffer_io_lsu_nonblock_load_data_valid; // @[el2_lsu_bus_intf.scala 209:38] + assign io_lsu_nonblock_load_data_error = bus_buffer_io_lsu_nonblock_load_data_error; // @[el2_lsu_bus_intf.scala 210:38] + assign io_lsu_nonblock_load_data_tag = bus_buffer_io_lsu_nonblock_load_data_tag; // @[el2_lsu_bus_intf.scala 211:38] + assign io_lsu_nonblock_load_data = bus_buffer_io_lsu_nonblock_load_data; // @[el2_lsu_bus_intf.scala 212:38] + assign io_lsu_pmu_bus_trxn = bus_buffer_io_lsu_pmu_bus_trxn; // @[el2_lsu_bus_intf.scala 213:38] + assign io_lsu_pmu_bus_misaligned = bus_buffer_io_lsu_pmu_bus_misaligned; // @[el2_lsu_bus_intf.scala 214:38] + assign io_lsu_pmu_bus_error = bus_buffer_io_lsu_pmu_bus_error; // @[el2_lsu_bus_intf.scala 215:38] + assign io_lsu_pmu_bus_busy = bus_buffer_io_lsu_pmu_bus_busy; // @[el2_lsu_bus_intf.scala 216:38] + assign io_lsu_axi_awvalid = bus_buffer_io_lsu_axi_awvalid; // @[el2_lsu_bus_intf.scala 217:38] + assign io_lsu_axi_awid = bus_buffer_io_lsu_axi_awid; // @[el2_lsu_bus_intf.scala 218:38] + assign io_lsu_axi_awaddr = bus_buffer_io_lsu_axi_awaddr; // @[el2_lsu_bus_intf.scala 219:38] + assign io_lsu_axi_awregion = bus_buffer_io_lsu_axi_awregion; // @[el2_lsu_bus_intf.scala 220:38] + assign io_lsu_axi_awsize = bus_buffer_io_lsu_axi_awsize; // @[el2_lsu_bus_intf.scala 222:38] + assign io_lsu_axi_awcache = bus_buffer_io_lsu_axi_awcache; // @[el2_lsu_bus_intf.scala 225:38] + assign io_lsu_axi_wvalid = bus_buffer_io_lsu_axi_wvalid; // @[el2_lsu_bus_intf.scala 228:38] + assign io_lsu_axi_wdata = bus_buffer_io_lsu_axi_wdata; // @[el2_lsu_bus_intf.scala 229:38] + assign io_lsu_axi_wstrb = bus_buffer_io_lsu_axi_wstrb; // @[el2_lsu_bus_intf.scala 230:38] + assign io_lsu_axi_arvalid = bus_buffer_io_lsu_axi_arvalid; // @[el2_lsu_bus_intf.scala 233:38] + assign io_lsu_axi_arid = bus_buffer_io_lsu_axi_arid; // @[el2_lsu_bus_intf.scala 234:38] + assign io_lsu_axi_araddr = bus_buffer_io_lsu_axi_araddr; // @[el2_lsu_bus_intf.scala 235:38] + assign io_lsu_axi_arregion = bus_buffer_io_lsu_axi_arregion; // @[el2_lsu_bus_intf.scala 236:38] + assign io_lsu_axi_arsize = bus_buffer_io_lsu_axi_arsize; // @[el2_lsu_bus_intf.scala 238:38] + assign io_lsu_axi_arcache = bus_buffer_io_lsu_axi_arcache; // @[el2_lsu_bus_intf.scala 241:38] + assign bus_buffer_clock = clock; + assign bus_buffer_reset = reset; + assign bus_buffer_io_scan_mode = io_scan_mode; // @[el2_lsu_bus_intf.scala 149:51] + assign bus_buffer_io_dec_tlu_external_ldfwd_disable = io_dec_tlu_external_ldfwd_disable; // @[el2_lsu_bus_intf.scala 150:51] + assign bus_buffer_io_dec_tlu_wb_coalescing_disable = io_dec_tlu_wb_coalescing_disable; // @[el2_lsu_bus_intf.scala 151:51] + assign bus_buffer_io_dec_tlu_sideeffect_posted_disable = io_dec_tlu_sideeffect_posted_disable; // @[el2_lsu_bus_intf.scala 152:51] + assign bus_buffer_io_dec_tlu_force_halt = io_dec_tlu_force_halt; // @[el2_lsu_bus_intf.scala 153:51] + assign bus_buffer_io_lsu_c2_r_clk = io_lsu_c2_r_clk; // @[el2_lsu_bus_intf.scala 154:51] + assign bus_buffer_io_lsu_bus_ibuf_c1_clk = io_lsu_bus_ibuf_c1_clk; // @[el2_lsu_bus_intf.scala 155:51] + assign bus_buffer_io_lsu_bus_buf_c1_clk = io_lsu_bus_buf_c1_clk; // @[el2_lsu_bus_intf.scala 157:51] + assign bus_buffer_io_lsu_free_c2_clk = io_lsu_free_c2_clk; // @[el2_lsu_bus_intf.scala 158:51] + assign bus_buffer_io_lsu_busm_clk = io_lsu_busm_clk; // @[el2_lsu_bus_intf.scala 159:51] + assign bus_buffer_io_dec_lsu_valid_raw_d = io_dec_lsu_valid_raw_d; // @[el2_lsu_bus_intf.scala 160:51] + assign bus_buffer_io_lsu_pkt_m_load = io_lsu_pkt_m_load; // @[el2_lsu_bus_intf.scala 161:51] + assign bus_buffer_io_lsu_pkt_m_valid = io_lsu_pkt_m_valid; // @[el2_lsu_bus_intf.scala 161:51] + assign bus_buffer_io_lsu_pkt_r_by = io_lsu_pkt_r_by; // @[el2_lsu_bus_intf.scala 162:51] + assign bus_buffer_io_lsu_pkt_r_half = io_lsu_pkt_r_half; // @[el2_lsu_bus_intf.scala 162:51] + assign bus_buffer_io_lsu_pkt_r_word = io_lsu_pkt_r_word; // @[el2_lsu_bus_intf.scala 162:51] + assign bus_buffer_io_lsu_pkt_r_load = io_lsu_pkt_r_load; // @[el2_lsu_bus_intf.scala 162:51] + assign bus_buffer_io_lsu_pkt_r_store = io_lsu_pkt_r_store; // @[el2_lsu_bus_intf.scala 162:51] + assign bus_buffer_io_lsu_pkt_r_unsign = io_lsu_pkt_r_unsign; // @[el2_lsu_bus_intf.scala 162:51] + assign bus_buffer_io_lsu_addr_m = io_lsu_addr_m; // @[el2_lsu_bus_intf.scala 163:51] + assign bus_buffer_io_end_addr_m = io_end_addr_m; // @[el2_lsu_bus_intf.scala 164:51] + assign bus_buffer_io_lsu_addr_r = io_lsu_addr_r; // @[el2_lsu_bus_intf.scala 165:51] + assign bus_buffer_io_end_addr_r = io_end_addr_r; // @[el2_lsu_bus_intf.scala 166:51] + assign bus_buffer_io_store_data_r = io_store_data_r; // @[el2_lsu_bus_intf.scala 167:51] + assign bus_buffer_io_no_word_merge_r = _T_22 & _T_24; // @[el2_lsu_bus_intf.scala 168:51] + assign bus_buffer_io_no_dword_merge_r = _T_22 & _T_30; // @[el2_lsu_bus_intf.scala 169:51] + assign bus_buffer_io_lsu_busreq_m = io_lsu_busreq_m; // @[el2_lsu_bus_intf.scala 170:51] + assign bus_buffer_io_ld_full_hit_m = _T_375 & _T_376; // @[el2_lsu_bus_intf.scala 171:51] + assign bus_buffer_io_flush_m_up = io_flush_m_up; // @[el2_lsu_bus_intf.scala 172:51] + assign bus_buffer_io_flush_r = io_flush_r; // @[el2_lsu_bus_intf.scala 173:51] + assign bus_buffer_io_lsu_commit_r = io_lsu_commit_r; // @[el2_lsu_bus_intf.scala 174:51] + assign bus_buffer_io_is_sideeffects_r = is_sideeffects_r; // @[el2_lsu_bus_intf.scala 175:51] + assign bus_buffer_io_ldst_dual_d = io_lsu_addr_d[2] != io_end_addr_d[2]; // @[el2_lsu_bus_intf.scala 176:51] + assign bus_buffer_io_ldst_dual_m = ldst_dual_m; // @[el2_lsu_bus_intf.scala 177:51] + assign bus_buffer_io_ldst_dual_r = ldst_dual_r; // @[el2_lsu_bus_intf.scala 178:51] + assign bus_buffer_io_ldst_byteen_ext_m = _T_35[7:0]; // @[el2_lsu_bus_intf.scala 179:51] + assign bus_buffer_io_lsu_axi_awready = io_lsu_axi_awready; // @[el2_lsu_bus_intf.scala 180:51] + assign bus_buffer_io_lsu_axi_wready = io_lsu_axi_wready; // @[el2_lsu_bus_intf.scala 181:51] + assign bus_buffer_io_lsu_axi_bvalid = io_lsu_axi_bvalid; // @[el2_lsu_bus_intf.scala 182:51] + assign bus_buffer_io_lsu_axi_bresp = io_lsu_axi_bresp; // @[el2_lsu_bus_intf.scala 183:51] + assign bus_buffer_io_lsu_axi_bid = io_lsu_axi_bid; // @[el2_lsu_bus_intf.scala 184:51] + assign bus_buffer_io_lsu_axi_arready = io_lsu_axi_arready; // @[el2_lsu_bus_intf.scala 185:51] + assign bus_buffer_io_lsu_axi_rvalid = io_lsu_axi_rvalid; // @[el2_lsu_bus_intf.scala 186:51] + assign bus_buffer_io_lsu_axi_rid = io_lsu_axi_rid; // @[el2_lsu_bus_intf.scala 187:51] + assign bus_buffer_io_lsu_axi_rdata = io_lsu_axi_rdata; // @[el2_lsu_bus_intf.scala 188:51] + assign bus_buffer_io_lsu_bus_clk_en = io_lsu_bus_clk_en; // @[el2_lsu_bus_intf.scala 190:51] + assign bus_buffer_io_lsu_bus_clk_en_q = lsu_bus_clk_en_q; // @[el2_lsu_bus_intf.scala 191:51] +`ifdef RANDOMIZE_GARBAGE_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_INVALID_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_REG_INIT +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_MEM_INIT +`define RANDOMIZE +`endif +`ifndef RANDOM +`define RANDOM $random +`endif +`ifdef RANDOMIZE_MEM_INIT + integer initvar; +`endif +`ifndef SYNTHESIS +`ifdef FIRRTL_BEFORE_INITIAL +`FIRRTL_BEFORE_INITIAL +`endif +initial begin + `ifdef RANDOMIZE + `ifdef INIT_RANDOM + `INIT_RANDOM + `endif + `ifndef VERILATOR + `ifdef RANDOMIZE_DELAY + #`RANDOMIZE_DELAY begin end + `else + #0.002 begin end + `endif + `endif +`ifdef RANDOMIZE_REG_INIT + _RAND_0 = {1{`RANDOM}}; + ldst_dual_r = _RAND_0[0:0]; + _RAND_1 = {1{`RANDOM}}; + _T_389 = _RAND_1[0:0]; + _RAND_2 = {1{`RANDOM}}; + lsu_bus_clk_en_q = _RAND_2[0:0]; + _RAND_3 = {1{`RANDOM}}; + ldst_dual_m = _RAND_3[0:0]; + _RAND_4 = {1{`RANDOM}}; + is_sideeffects_r = _RAND_4[0:0]; +`endif // RANDOMIZE_REG_INIT + if (reset) begin + ldst_dual_r = 1'h0; + end + if (reset) begin + _T_389 = 1'h0; + end + if (reset) begin + lsu_bus_clk_en_q = 1'h0; + end + if (reset) begin + ldst_dual_m = 1'h0; + end + if (reset) begin + is_sideeffects_r = 1'h0; + end + `endif // RANDOMIZE +end // initial +`ifdef FIRRTL_AFTER_INITIAL +`FIRRTL_AFTER_INITIAL +`endif +`endif // SYNTHESIS + always @(posedge io_lsu_c1_r_clk or posedge reset) begin + if (reset) begin + ldst_dual_r <= 1'h0; + end else begin + ldst_dual_r <= io_lsu_bus_clk_en; + end + end + always @(posedge io_lsu_c1_r_clk or posedge reset) begin + if (reset) begin + _T_389 <= 1'h0; + end else begin + _T_389 <= io_lsu_bus_clk_en; + end + end + always @(posedge io_free_clk or posedge reset) begin + if (reset) begin + lsu_bus_clk_en_q <= 1'h0; + end else begin + lsu_bus_clk_en_q <= io_lsu_bus_clk_en; + end + end + always @(posedge io_lsu_c1_m_clk or posedge reset) begin + if (reset) begin + ldst_dual_m <= 1'h0; + end else begin + ldst_dual_m <= io_lsu_bus_clk_en; + end + end + always @(posedge io_lsu_c1_r_clk or posedge reset) begin + if (reset) begin + is_sideeffects_r <= 1'h0; + end else begin + is_sideeffects_r <= io_lsu_bus_clk_en; + end + end +endmodule +module el2_lsu( + input clock, + input reset, + input io_clk_override, + input io_dec_tlu_flush_lower_r, + input io_dec_tlu_i0_kill_writeb_r, + input io_dec_tlu_force_halt, + input io_dec_tlu_external_ldfwd_disable, + input io_dec_tlu_wb_coalescing_disable, + input io_dec_tlu_sideeffect_posted_disable, + input io_dec_tlu_core_ecc_disable, + input [31:0] io_exu_lsu_rs1_d, + input [31:0] io_exu_lsu_rs2_d, + input [11:0] io_dec_lsu_offset_d, + input io_lsu_p_fast_int, + input io_lsu_p_by, + input io_lsu_p_half, + input io_lsu_p_word, + input io_lsu_p_dword, + input io_lsu_p_load, + input io_lsu_p_store, + input io_lsu_p_unsign, + input io_lsu_p_dma, + input io_lsu_p_store_data_bypass_d, + input io_lsu_p_load_ldst_bypass_d, + input io_lsu_p_store_data_bypass_m, + input io_lsu_p_valid, + input io_trigger_pkt_any_0_select, + input io_trigger_pkt_any_0_match_, + input io_trigger_pkt_any_0_store, + input io_trigger_pkt_any_0_load, + input io_trigger_pkt_any_0_execute, + input io_trigger_pkt_any_0_m, + input [31:0] io_trigger_pkt_any_0_tdata2, + input io_trigger_pkt_any_1_select, + input io_trigger_pkt_any_1_match_, + input io_trigger_pkt_any_1_store, + input io_trigger_pkt_any_1_load, + input io_trigger_pkt_any_1_execute, + input io_trigger_pkt_any_1_m, + input [31:0] io_trigger_pkt_any_1_tdata2, + input io_trigger_pkt_any_2_select, + input io_trigger_pkt_any_2_match_, + input io_trigger_pkt_any_2_store, + input io_trigger_pkt_any_2_load, + input io_trigger_pkt_any_2_execute, + input io_trigger_pkt_any_2_m, + input [31:0] io_trigger_pkt_any_2_tdata2, + input io_trigger_pkt_any_3_select, + input io_trigger_pkt_any_3_match_, + input io_trigger_pkt_any_3_store, + input io_trigger_pkt_any_3_load, + input io_trigger_pkt_any_3_execute, + input io_trigger_pkt_any_3_m, + input [31:0] io_trigger_pkt_any_3_tdata2, + input io_dec_lsu_valid_raw_d, + input [31:0] io_dec_tlu_mrac_ff, + output io_lsu_load_stall_any, + output io_lsu_store_stall_any, + output io_lsu_fastint_stall_any, + output io_lsu_idle_any, + output [31:0] io_lsu_fir_addr, + output [1:0] io_lsu_fir_error, + output io_lsu_single_ecc_error_incr, + output io_lsu_error_pkt_r_exc_valid, + output io_lsu_error_pkt_r_single_ecc_error, + output io_lsu_error_pkt_r_inst_type, + output io_lsu_error_pkt_r_exc_type, + output io_lsu_error_pkt_r_mscause, + output io_lsu_error_pkt_r_addr, + output io_lsu_imprecise_error_load_any, + output io_lsu_imprecise_error_store_any, + output [31:0] io_lsu_imprecise_error_addr_any, + output io_lsu_nonblock_load_valid_m, + output [1:0] io_lsu_nonblock_load_tag_m, + output io_lsu_nonblock_load_inv_r, + output [1:0] io_lsu_nonblock_load_inv_tag_r, + output io_lsu_nonblock_load_data_valid, + output io_lsu_nonblock_load_data_error, + output [1:0] io_lsu_nonblock_load_data_tag, + output [31:0] io_lsu_nonblock_load_data, + output io_lsu_pmu_load_external_m, + output io_lsu_pmu_store_external_m, + output io_lsu_pmu_misaligned_m, + output io_lsu_pmu_bus_trxn, + output io_lsu_pmu_bus_misaligned, + output io_lsu_pmu_bus_error, + output io_lsu_pmu_bus_busy, + output [3:0] io_lsu_trigger_match_m, + output io_dccm_wren, + output io_dccm_rden, + output [15:0] io_dccm_wr_addr_lo, + output [15:0] io_dccm_wr_addr_hi, + output [15:0] io_dccm_rd_addr_lo, + output [15:0] io_dccm_rd_addr_hi, + output [38:0] io_dccm_wr_data_lo, + output [38:0] io_dccm_wr_data_hi, + input [38:0] io_dccm_rd_data_lo, + input [38:0] io_dccm_rd_data_hi, + output io_picm_wren, + output io_picm_rden, + output io_picm_mken, + output [31:0] io_picm_rdaddr, + output [31:0] io_picm_wraddr, + output [31:0] io_picm_wr_data, + input [31:0] io_picm_rd_data, + output io_lsu_axi_awvalid, + output io_lsu_axi_awlock, + input io_lsu_axi_awready, + output [2:0] io_lsu_axi_awid, + output [31:0] io_lsu_axi_awaddr, + output [3:0] io_lsu_axi_awregion, + output [7:0] io_lsu_axi_awlen, + output [2:0] io_lsu_axi_awsize, + output [1:0] io_lsu_axi_awburst, + output [3:0] io_lsu_axi_awcache, + output [2:0] io_lsu_axi_awprot, + output [3:0] io_lsu_axi_awqos, + output io_lsu_axi_wvalid, + input io_lsu_axi_wready, + output [63:0] io_lsu_axi_wdata, + output [7:0] io_lsu_axi_wstrb, + output io_lsu_axi_wlast, + input io_lsu_axi_bvalid, + output io_lsu_axi_bready, + input [1:0] io_lsu_axi_bresp, + input [2:0] io_lsu_axi_bid, + output io_lsu_axi_arvalid, + output io_lsu_axi_arlock, + input io_lsu_axi_arready, + output [2:0] io_lsu_axi_arid, + output [31:0] io_lsu_axi_araddr, + output [3:0] io_lsu_axi_arregion, + output [7:0] io_lsu_axi_arlen, + output [2:0] io_lsu_axi_arsize, + output [1:0] io_lsu_axi_arburst, + output [3:0] io_lsu_axi_arcache, + output [2:0] io_lsu_axi_arprot, + output [3:0] io_lsu_axi_arqos, + input io_lsu_axi_rvalid, + output io_lsu_axi_rready, + input [63:0] io_lsu_axi_rdata, + input io_lsu_axi_rlast, + input [1:0] io_lsu_axi_rresp, + input [2:0] io_lsu_axi_rid, + input io_lsu_bus_clk_en, + input io_dma_dccm_req, + input io_dma_mem_write, + output io_dccm_dma_rvalid, + output io_dccm_dma_ecc_error, + input [2:0] io_dma_mem_tag, + input [31:0] io_dma_mem_addr, + input [2:0] io_dma_mem_sz, + input [63:0] io_dma_mem_wdata, + output [2:0] io_dccm_dma_rtag, + output [63:0] io_dccm_dma_rdata, + output io_dccm_ready, + input io_scan_mode, + input io_free_clk +); +`ifdef RANDOMIZE_REG_INIT + reg [31:0] _RAND_0; + reg [31:0] _RAND_1; + reg [31:0] _RAND_2; +`endif // RANDOMIZE_REG_INIT + wire lsu_lsc_ctl_reset; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_c1_m_clk; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_c1_r_clk; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_c2_m_clk; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_c2_r_clk; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_store_c1_m_clk; // @[el2_lsu.scala 154:30] + wire [31:0] lsu_lsc_ctl_io_lsu_ld_data_corr_r; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_single_ecc_error_r; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_double_ecc_error_r; // @[el2_lsu.scala 154:30] + wire [31:0] lsu_lsc_ctl_io_lsu_ld_data_m; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_single_ecc_error_m; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_double_ecc_error_m; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_flush_m_up; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_flush_r; // @[el2_lsu.scala 154:30] + wire [31:0] lsu_lsc_ctl_io_exu_lsu_rs1_d; // @[el2_lsu.scala 154:30] + wire [31:0] lsu_lsc_ctl_io_exu_lsu_rs2_d; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_p_fast_int; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_p_by; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_p_half; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_p_word; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_p_dword; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_p_load; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_p_store; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_p_unsign; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_p_dma; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_p_store_data_bypass_d; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_p_load_ldst_bypass_d; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_p_store_data_bypass_m; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_p_valid; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_dec_lsu_valid_raw_d; // @[el2_lsu.scala 154:30] + wire [11:0] lsu_lsc_ctl_io_dec_lsu_offset_d; // @[el2_lsu.scala 154:30] + wire [31:0] lsu_lsc_ctl_io_picm_mask_data_m; // @[el2_lsu.scala 154:30] + wire [31:0] lsu_lsc_ctl_io_bus_read_data_m; // @[el2_lsu.scala 154:30] + wire [31:0] lsu_lsc_ctl_io_lsu_result_m; // @[el2_lsu.scala 154:30] + wire [31:0] lsu_lsc_ctl_io_lsu_addr_d; // @[el2_lsu.scala 154:30] + wire [31:0] lsu_lsc_ctl_io_lsu_addr_m; // @[el2_lsu.scala 154:30] + wire [31:0] lsu_lsc_ctl_io_lsu_addr_r; // @[el2_lsu.scala 154:30] + wire [31:0] lsu_lsc_ctl_io_end_addr_d; // @[el2_lsu.scala 154:30] + wire [31:0] lsu_lsc_ctl_io_end_addr_m; // @[el2_lsu.scala 154:30] + wire [31:0] lsu_lsc_ctl_io_end_addr_r; // @[el2_lsu.scala 154:30] + wire [31:0] lsu_lsc_ctl_io_store_data_m; // @[el2_lsu.scala 154:30] + wire [31:0] lsu_lsc_ctl_io_dec_tlu_mrac_ff; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_exc_m; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_is_sideeffects_m; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_commit_r; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_single_ecc_error_incr; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_error_pkt_r_exc_valid; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_error_pkt_r_single_ecc_error; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_error_pkt_r_inst_type; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_error_pkt_r_exc_type; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_error_pkt_r_mscause; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_error_pkt_r_addr; // @[el2_lsu.scala 154:30] + wire [30:0] lsu_lsc_ctl_io_lsu_fir_addr; // @[el2_lsu.scala 154:30] + wire [1:0] lsu_lsc_ctl_io_lsu_fir_error; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_addr_in_dccm_d; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_addr_in_dccm_m; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_addr_in_dccm_r; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_addr_in_pic_d; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_addr_in_pic_m; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_addr_in_pic_r; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_addr_external_m; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_dma_dccm_req; // @[el2_lsu.scala 154:30] + wire [31:0] lsu_lsc_ctl_io_dma_mem_addr; // @[el2_lsu.scala 154:30] + wire [2:0] lsu_lsc_ctl_io_dma_mem_sz; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_dma_mem_write; // @[el2_lsu.scala 154:30] + wire [63:0] lsu_lsc_ctl_io_dma_mem_wdata; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_pkt_d_fast_int; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_pkt_d_by; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_pkt_d_half; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_pkt_d_word; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_pkt_d_dword; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_pkt_d_load; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_pkt_d_store; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_pkt_d_unsign; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_pkt_d_dma; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_pkt_d_store_data_bypass_d; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_pkt_d_load_ldst_bypass_d; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_pkt_d_store_data_bypass_m; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_pkt_d_valid; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_pkt_m_fast_int; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_pkt_m_by; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_pkt_m_half; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_pkt_m_word; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_pkt_m_dword; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_pkt_m_load; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_pkt_m_store; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_pkt_m_unsign; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_pkt_m_dma; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_pkt_m_store_data_bypass_m; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_pkt_m_valid; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_pkt_r_by; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_pkt_r_half; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_pkt_r_word; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_pkt_r_dword; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_pkt_r_load; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_pkt_r_store; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_pkt_r_unsign; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_pkt_r_dma; // @[el2_lsu.scala 154:30] + wire lsu_lsc_ctl_io_lsu_pkt_r_valid; // @[el2_lsu.scala 154:30] + wire dccm_ctl_clock; // @[el2_lsu.scala 155:30] + wire dccm_ctl_reset; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_lsu_c2_m_clk; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_lsu_c2_r_clk; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_lsu_free_c2_clk; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_lsu_store_c1_r_clk; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_lsu_pkt_d_word; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_lsu_pkt_d_dword; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_lsu_pkt_d_load; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_lsu_pkt_d_store; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_lsu_pkt_d_dma; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_lsu_pkt_d_valid; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_lsu_pkt_m_by; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_lsu_pkt_m_half; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_lsu_pkt_m_word; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_lsu_pkt_m_load; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_lsu_pkt_m_store; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_lsu_pkt_m_dma; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_lsu_pkt_m_valid; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_lsu_pkt_r_by; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_lsu_pkt_r_half; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_lsu_pkt_r_word; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_lsu_pkt_r_load; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_lsu_pkt_r_store; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_lsu_pkt_r_dma; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_lsu_pkt_r_valid; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_addr_in_dccm_d; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_addr_in_dccm_m; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_addr_in_dccm_r; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_addr_in_pic_d; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_addr_in_pic_m; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_addr_in_pic_r; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_lsu_raw_fwd_lo_r; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_lsu_raw_fwd_hi_r; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_lsu_commit_r; // @[el2_lsu.scala 155:30] + wire [31:0] dccm_ctl_io_lsu_addr_d; // @[el2_lsu.scala 155:30] + wire [15:0] dccm_ctl_io_lsu_addr_m; // @[el2_lsu.scala 155:30] + wire [31:0] dccm_ctl_io_lsu_addr_r; // @[el2_lsu.scala 155:30] + wire [15:0] dccm_ctl_io_end_addr_d; // @[el2_lsu.scala 155:30] + wire [15:0] dccm_ctl_io_end_addr_m; // @[el2_lsu.scala 155:30] + wire [15:0] dccm_ctl_io_end_addr_r; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_stbuf_reqvld_any; // @[el2_lsu.scala 155:30] + wire [15:0] dccm_ctl_io_stbuf_addr_any; // @[el2_lsu.scala 155:30] + wire [31:0] dccm_ctl_io_stbuf_data_any; // @[el2_lsu.scala 155:30] + wire [6:0] dccm_ctl_io_stbuf_ecc_any; // @[el2_lsu.scala 155:30] + wire [31:0] dccm_ctl_io_stbuf_fwddata_hi_m; // @[el2_lsu.scala 155:30] + wire [31:0] dccm_ctl_io_stbuf_fwddata_lo_m; // @[el2_lsu.scala 155:30] + wire [3:0] dccm_ctl_io_stbuf_fwdbyteen_lo_m; // @[el2_lsu.scala 155:30] + wire [3:0] dccm_ctl_io_stbuf_fwdbyteen_hi_m; // @[el2_lsu.scala 155:30] + wire [31:0] dccm_ctl_io_lsu_ld_data_corr_r; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_lsu_double_ecc_error_r; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_single_ecc_error_hi_r; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_single_ecc_error_lo_r; // @[el2_lsu.scala 155:30] + wire [31:0] dccm_ctl_io_sec_data_hi_r_ff; // @[el2_lsu.scala 155:30] + wire [31:0] dccm_ctl_io_sec_data_lo_r_ff; // @[el2_lsu.scala 155:30] + wire [6:0] dccm_ctl_io_sec_data_ecc_hi_r_ff; // @[el2_lsu.scala 155:30] + wire [6:0] dccm_ctl_io_sec_data_ecc_lo_r_ff; // @[el2_lsu.scala 155:30] + wire [31:0] dccm_ctl_io_dccm_rdata_hi_m; // @[el2_lsu.scala 155:30] + wire [31:0] dccm_ctl_io_dccm_rdata_lo_m; // @[el2_lsu.scala 155:30] + wire [6:0] dccm_ctl_io_dccm_data_ecc_hi_m; // @[el2_lsu.scala 155:30] + wire [6:0] dccm_ctl_io_dccm_data_ecc_lo_m; // @[el2_lsu.scala 155:30] + wire [31:0] dccm_ctl_io_lsu_ld_data_m; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_lsu_double_ecc_error_m; // @[el2_lsu.scala 155:30] + wire [31:0] dccm_ctl_io_sec_data_hi_m; // @[el2_lsu.scala 155:30] + wire [31:0] dccm_ctl_io_sec_data_lo_m; // @[el2_lsu.scala 155:30] + wire [31:0] dccm_ctl_io_store_data_m; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_dma_dccm_wen; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_dma_pic_wen; // @[el2_lsu.scala 155:30] + wire [2:0] dccm_ctl_io_dma_mem_tag_m; // @[el2_lsu.scala 155:30] + wire [31:0] dccm_ctl_io_dma_mem_addr; // @[el2_lsu.scala 155:30] + wire [63:0] dccm_ctl_io_dma_mem_wdata; // @[el2_lsu.scala 155:30] + wire [31:0] dccm_ctl_io_dma_dccm_wdata_lo; // @[el2_lsu.scala 155:30] + wire [31:0] dccm_ctl_io_dma_dccm_wdata_hi; // @[el2_lsu.scala 155:30] + wire [6:0] dccm_ctl_io_dma_dccm_wdata_ecc_hi; // @[el2_lsu.scala 155:30] + wire [6:0] dccm_ctl_io_dma_dccm_wdata_ecc_lo; // @[el2_lsu.scala 155:30] + wire [31:0] dccm_ctl_io_store_data_hi_r; // @[el2_lsu.scala 155:30] + wire [31:0] dccm_ctl_io_store_data_lo_r; // @[el2_lsu.scala 155:30] + wire [31:0] dccm_ctl_io_store_datafn_hi_r; // @[el2_lsu.scala 155:30] + wire [31:0] dccm_ctl_io_store_datafn_lo_r; // @[el2_lsu.scala 155:30] + wire [31:0] dccm_ctl_io_store_data_r; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_ld_single_ecc_error_r; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_ld_single_ecc_error_r_ff; // @[el2_lsu.scala 155:30] + wire [31:0] dccm_ctl_io_picm_mask_data_m; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_lsu_stbuf_commit_any; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_lsu_dccm_rden_m; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_dccm_dma_rvalid; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_dccm_dma_ecc_error; // @[el2_lsu.scala 155:30] + wire [2:0] dccm_ctl_io_dccm_dma_rtag; // @[el2_lsu.scala 155:30] + wire [63:0] dccm_ctl_io_dccm_dma_rdata; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_dccm_wren; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_dccm_rden; // @[el2_lsu.scala 155:30] + wire [15:0] dccm_ctl_io_dccm_wr_addr_lo; // @[el2_lsu.scala 155:30] + wire [38:0] dccm_ctl_io_dccm_wr_data_lo; // @[el2_lsu.scala 155:30] + wire [15:0] dccm_ctl_io_dccm_rd_addr_lo; // @[el2_lsu.scala 155:30] + wire [38:0] dccm_ctl_io_dccm_rd_data_lo; // @[el2_lsu.scala 155:30] + wire [15:0] dccm_ctl_io_dccm_wr_addr_hi; // @[el2_lsu.scala 155:30] + wire [38:0] dccm_ctl_io_dccm_wr_data_hi; // @[el2_lsu.scala 155:30] + wire [15:0] dccm_ctl_io_dccm_rd_addr_hi; // @[el2_lsu.scala 155:30] + wire [38:0] dccm_ctl_io_dccm_rd_data_hi; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_picm_wren; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_picm_rden; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_picm_mken; // @[el2_lsu.scala 155:30] + wire [31:0] dccm_ctl_io_picm_rdaddr; // @[el2_lsu.scala 155:30] + wire [31:0] dccm_ctl_io_picm_wraddr; // @[el2_lsu.scala 155:30] + wire [31:0] dccm_ctl_io_picm_wr_data; // @[el2_lsu.scala 155:30] + wire [31:0] dccm_ctl_io_picm_rd_data; // @[el2_lsu.scala 155:30] + wire dccm_ctl_io_scan_mode; // @[el2_lsu.scala 155:30] + wire stbuf_clock; // @[el2_lsu.scala 156:30] + wire stbuf_reset; // @[el2_lsu.scala 156:30] + wire stbuf_io_lsu_c1_m_clk; // @[el2_lsu.scala 156:30] + wire stbuf_io_lsu_c1_r_clk; // @[el2_lsu.scala 156:30] + wire stbuf_io_lsu_stbuf_c1_clk; // @[el2_lsu.scala 156:30] + wire stbuf_io_lsu_free_c2_clk; // @[el2_lsu.scala 156:30] + wire stbuf_io_lsu_pkt_m_store; // @[el2_lsu.scala 156:30] + wire stbuf_io_lsu_pkt_m_dma; // @[el2_lsu.scala 156:30] + wire stbuf_io_lsu_pkt_m_valid; // @[el2_lsu.scala 156:30] + wire stbuf_io_lsu_pkt_r_by; // @[el2_lsu.scala 156:30] + wire stbuf_io_lsu_pkt_r_half; // @[el2_lsu.scala 156:30] + wire stbuf_io_lsu_pkt_r_word; // @[el2_lsu.scala 156:30] + wire stbuf_io_lsu_pkt_r_dword; // @[el2_lsu.scala 156:30] + wire stbuf_io_lsu_pkt_r_store; // @[el2_lsu.scala 156:30] + wire stbuf_io_lsu_pkt_r_dma; // @[el2_lsu.scala 156:30] + wire stbuf_io_lsu_pkt_r_valid; // @[el2_lsu.scala 156:30] + wire stbuf_io_store_stbuf_reqvld_r; // @[el2_lsu.scala 156:30] + wire stbuf_io_lsu_commit_r; // @[el2_lsu.scala 156:30] + wire stbuf_io_dec_lsu_valid_raw_d; // @[el2_lsu.scala 156:30] + wire [31:0] stbuf_io_store_data_hi_r; // @[el2_lsu.scala 156:30] + wire [31:0] stbuf_io_store_data_lo_r; // @[el2_lsu.scala 156:30] + wire [31:0] stbuf_io_store_datafn_hi_r; // @[el2_lsu.scala 156:30] + wire [31:0] stbuf_io_store_datafn_lo_r; // @[el2_lsu.scala 156:30] + wire stbuf_io_lsu_stbuf_commit_any; // @[el2_lsu.scala 156:30] + wire [15:0] stbuf_io_lsu_addr_d; // @[el2_lsu.scala 156:30] + wire [31:0] stbuf_io_lsu_addr_m; // @[el2_lsu.scala 156:30] + wire [31:0] stbuf_io_lsu_addr_r; // @[el2_lsu.scala 156:30] + wire [15:0] stbuf_io_end_addr_d; // @[el2_lsu.scala 156:30] + wire [31:0] stbuf_io_end_addr_m; // @[el2_lsu.scala 156:30] + wire [31:0] stbuf_io_end_addr_r; // @[el2_lsu.scala 156:30] + wire stbuf_io_addr_in_dccm_m; // @[el2_lsu.scala 156:30] + wire stbuf_io_addr_in_dccm_r; // @[el2_lsu.scala 156:30] + wire stbuf_io_scan_mode; // @[el2_lsu.scala 156:30] + wire stbuf_io_stbuf_reqvld_any; // @[el2_lsu.scala 156:30] + wire stbuf_io_stbuf_reqvld_flushed_any; // @[el2_lsu.scala 156:30] + wire [15:0] stbuf_io_stbuf_addr_any; // @[el2_lsu.scala 156:30] + wire [31:0] stbuf_io_stbuf_data_any; // @[el2_lsu.scala 156:30] + wire stbuf_io_lsu_stbuf_full_any; // @[el2_lsu.scala 156:30] + wire stbuf_io_lsu_stbuf_empty_any; // @[el2_lsu.scala 156:30] + wire stbuf_io_ldst_stbuf_reqvld_r; // @[el2_lsu.scala 156:30] + wire [31:0] stbuf_io_stbuf_fwddata_hi_m; // @[el2_lsu.scala 156:30] + wire [31:0] stbuf_io_stbuf_fwddata_lo_m; // @[el2_lsu.scala 156:30] + wire [3:0] stbuf_io_stbuf_fwdbyteen_hi_m; // @[el2_lsu.scala 156:30] + wire [3:0] stbuf_io_stbuf_fwdbyteen_lo_m; // @[el2_lsu.scala 156:30] + wire ecc_clock; // @[el2_lsu.scala 157:30] + wire ecc_reset; // @[el2_lsu.scala 157:30] + wire ecc_io_lsu_c2_r_clk; // @[el2_lsu.scala 157:30] + wire ecc_io_lsu_pkt_m_load; // @[el2_lsu.scala 157:30] + wire ecc_io_lsu_pkt_m_store; // @[el2_lsu.scala 157:30] + wire ecc_io_lsu_pkt_m_dma; // @[el2_lsu.scala 157:30] + wire ecc_io_lsu_pkt_m_valid; // @[el2_lsu.scala 157:30] + wire [31:0] ecc_io_stbuf_data_any; // @[el2_lsu.scala 157:30] + wire ecc_io_dec_tlu_core_ecc_disable; // @[el2_lsu.scala 157:30] + wire [15:0] ecc_io_lsu_addr_m; // @[el2_lsu.scala 157:30] + wire [15:0] ecc_io_end_addr_m; // @[el2_lsu.scala 157:30] + wire [31:0] ecc_io_dccm_rdata_hi_m; // @[el2_lsu.scala 157:30] + wire [31:0] ecc_io_dccm_rdata_lo_m; // @[el2_lsu.scala 157:30] + wire [6:0] ecc_io_dccm_data_ecc_hi_m; // @[el2_lsu.scala 157:30] + wire [6:0] ecc_io_dccm_data_ecc_lo_m; // @[el2_lsu.scala 157:30] + wire ecc_io_ld_single_ecc_error_r; // @[el2_lsu.scala 157:30] + wire ecc_io_ld_single_ecc_error_r_ff; // @[el2_lsu.scala 157:30] + wire ecc_io_lsu_dccm_rden_m; // @[el2_lsu.scala 157:30] + wire ecc_io_addr_in_dccm_m; // @[el2_lsu.scala 157:30] + wire ecc_io_dma_dccm_wen; // @[el2_lsu.scala 157:30] + wire [31:0] ecc_io_dma_dccm_wdata_lo; // @[el2_lsu.scala 157:30] + wire [31:0] ecc_io_dma_dccm_wdata_hi; // @[el2_lsu.scala 157:30] + wire ecc_io_scan_mode; // @[el2_lsu.scala 157:30] + wire [31:0] ecc_io_sec_data_hi_r; // @[el2_lsu.scala 157:30] + wire [31:0] ecc_io_sec_data_lo_r; // @[el2_lsu.scala 157:30] + wire [31:0] ecc_io_sec_data_hi_m; // @[el2_lsu.scala 157:30] + wire [31:0] ecc_io_sec_data_lo_m; // @[el2_lsu.scala 157:30] + wire [31:0] ecc_io_sec_data_hi_r_ff; // @[el2_lsu.scala 157:30] + wire [31:0] ecc_io_sec_data_lo_r_ff; // @[el2_lsu.scala 157:30] + wire [6:0] ecc_io_dma_dccm_wdata_ecc_hi; // @[el2_lsu.scala 157:30] + wire [6:0] ecc_io_dma_dccm_wdata_ecc_lo; // @[el2_lsu.scala 157:30] + wire [6:0] ecc_io_stbuf_ecc_any; // @[el2_lsu.scala 157:30] + wire [6:0] ecc_io_sec_data_ecc_hi_r_ff; // @[el2_lsu.scala 157:30] + wire [6:0] ecc_io_sec_data_ecc_lo_r_ff; // @[el2_lsu.scala 157:30] + wire ecc_io_single_ecc_error_hi_r; // @[el2_lsu.scala 157:30] + wire ecc_io_single_ecc_error_lo_r; // @[el2_lsu.scala 157:30] + wire ecc_io_lsu_single_ecc_error_r; // @[el2_lsu.scala 157:30] + wire ecc_io_lsu_double_ecc_error_r; // @[el2_lsu.scala 157:30] + wire ecc_io_lsu_single_ecc_error_m; // @[el2_lsu.scala 157:30] + wire ecc_io_lsu_double_ecc_error_m; // @[el2_lsu.scala 157:30] + wire trigger_io_trigger_pkt_any_0_select; // @[el2_lsu.scala 158:30] + wire trigger_io_trigger_pkt_any_0_match_; // @[el2_lsu.scala 158:30] + wire trigger_io_trigger_pkt_any_0_store; // @[el2_lsu.scala 158:30] + wire trigger_io_trigger_pkt_any_0_load; // @[el2_lsu.scala 158:30] + wire [31:0] trigger_io_trigger_pkt_any_0_tdata2; // @[el2_lsu.scala 158:30] + wire trigger_io_trigger_pkt_any_1_select; // @[el2_lsu.scala 158:30] + wire trigger_io_trigger_pkt_any_1_match_; // @[el2_lsu.scala 158:30] + wire trigger_io_trigger_pkt_any_1_store; // @[el2_lsu.scala 158:30] + wire trigger_io_trigger_pkt_any_1_load; // @[el2_lsu.scala 158:30] + wire [31:0] trigger_io_trigger_pkt_any_1_tdata2; // @[el2_lsu.scala 158:30] + wire trigger_io_trigger_pkt_any_2_select; // @[el2_lsu.scala 158:30] + wire trigger_io_trigger_pkt_any_2_match_; // @[el2_lsu.scala 158:30] + wire trigger_io_trigger_pkt_any_2_store; // @[el2_lsu.scala 158:30] + wire trigger_io_trigger_pkt_any_2_load; // @[el2_lsu.scala 158:30] + wire [31:0] trigger_io_trigger_pkt_any_2_tdata2; // @[el2_lsu.scala 158:30] + wire trigger_io_trigger_pkt_any_3_select; // @[el2_lsu.scala 158:30] + wire trigger_io_trigger_pkt_any_3_match_; // @[el2_lsu.scala 158:30] + wire trigger_io_trigger_pkt_any_3_store; // @[el2_lsu.scala 158:30] + wire trigger_io_trigger_pkt_any_3_load; // @[el2_lsu.scala 158:30] + wire [31:0] trigger_io_trigger_pkt_any_3_tdata2; // @[el2_lsu.scala 158:30] + wire trigger_io_lsu_pkt_m_half; // @[el2_lsu.scala 158:30] + wire trigger_io_lsu_pkt_m_word; // @[el2_lsu.scala 158:30] + wire trigger_io_lsu_pkt_m_load; // @[el2_lsu.scala 158:30] + wire trigger_io_lsu_pkt_m_store; // @[el2_lsu.scala 158:30] + wire trigger_io_lsu_pkt_m_dma; // @[el2_lsu.scala 158:30] + wire trigger_io_lsu_pkt_m_valid; // @[el2_lsu.scala 158:30] + wire [31:0] trigger_io_lsu_addr_m; // @[el2_lsu.scala 158:30] + wire [31:0] trigger_io_store_data_m; // @[el2_lsu.scala 158:30] + wire [3:0] trigger_io_lsu_trigger_match_m; // @[el2_lsu.scala 158:30] + wire clkdomain_clock; // @[el2_lsu.scala 159:30] + wire clkdomain_reset; // @[el2_lsu.scala 159:30] + wire clkdomain_io_free_clk; // @[el2_lsu.scala 159:30] + wire clkdomain_io_clk_override; // @[el2_lsu.scala 159:30] + wire clkdomain_io_dma_dccm_req; // @[el2_lsu.scala 159:30] + wire clkdomain_io_ldst_stbuf_reqvld_r; // @[el2_lsu.scala 159:30] + wire clkdomain_io_stbuf_reqvld_any; // @[el2_lsu.scala 159:30] + wire clkdomain_io_stbuf_reqvld_flushed_any; // @[el2_lsu.scala 159:30] + wire clkdomain_io_lsu_busreq_r; // @[el2_lsu.scala 159:30] + wire clkdomain_io_lsu_bus_buffer_pend_any; // @[el2_lsu.scala 159:30] + wire clkdomain_io_lsu_bus_buffer_empty_any; // @[el2_lsu.scala 159:30] + wire clkdomain_io_lsu_stbuf_empty_any; // @[el2_lsu.scala 159:30] + wire clkdomain_io_lsu_bus_clk_en; // @[el2_lsu.scala 159:30] + wire clkdomain_io_lsu_p_valid; // @[el2_lsu.scala 159:30] + wire clkdomain_io_lsu_pkt_d_store; // @[el2_lsu.scala 159:30] + wire clkdomain_io_lsu_pkt_d_valid; // @[el2_lsu.scala 159:30] + wire clkdomain_io_lsu_pkt_m_store; // @[el2_lsu.scala 159:30] + wire clkdomain_io_lsu_pkt_m_valid; // @[el2_lsu.scala 159:30] + wire clkdomain_io_lsu_pkt_r_valid; // @[el2_lsu.scala 159:30] + wire clkdomain_io_lsu_c1_m_clk; // @[el2_lsu.scala 159:30] + wire clkdomain_io_lsu_c1_r_clk; // @[el2_lsu.scala 159:30] + wire clkdomain_io_lsu_c2_m_clk; // @[el2_lsu.scala 159:30] + wire clkdomain_io_lsu_c2_r_clk; // @[el2_lsu.scala 159:30] + wire clkdomain_io_lsu_store_c1_m_clk; // @[el2_lsu.scala 159:30] + wire clkdomain_io_lsu_stbuf_c1_clk; // @[el2_lsu.scala 159:30] + wire clkdomain_io_lsu_bus_ibuf_c1_clk; // @[el2_lsu.scala 159:30] + wire clkdomain_io_lsu_bus_buf_c1_clk; // @[el2_lsu.scala 159:30] + wire clkdomain_io_lsu_busm_clk; // @[el2_lsu.scala 159:30] + wire clkdomain_io_lsu_free_c2_clk; // @[el2_lsu.scala 159:30] + wire clkdomain_io_scan_mode; // @[el2_lsu.scala 159:30] + wire bus_intf_clock; // @[el2_lsu.scala 160:30] + wire bus_intf_reset; // @[el2_lsu.scala 160:30] + wire bus_intf_io_scan_mode; // @[el2_lsu.scala 160:30] + wire bus_intf_io_dec_tlu_external_ldfwd_disable; // @[el2_lsu.scala 160:30] + wire bus_intf_io_dec_tlu_wb_coalescing_disable; // @[el2_lsu.scala 160:30] + wire bus_intf_io_dec_tlu_sideeffect_posted_disable; // @[el2_lsu.scala 160:30] + wire bus_intf_io_lsu_c1_m_clk; // @[el2_lsu.scala 160:30] + wire bus_intf_io_lsu_c1_r_clk; // @[el2_lsu.scala 160:30] + wire bus_intf_io_lsu_c2_r_clk; // @[el2_lsu.scala 160:30] + wire bus_intf_io_lsu_bus_ibuf_c1_clk; // @[el2_lsu.scala 160:30] + wire bus_intf_io_lsu_bus_buf_c1_clk; // @[el2_lsu.scala 160:30] + wire bus_intf_io_lsu_free_c2_clk; // @[el2_lsu.scala 160:30] + wire bus_intf_io_free_clk; // @[el2_lsu.scala 160:30] + wire bus_intf_io_lsu_busm_clk; // @[el2_lsu.scala 160:30] + wire bus_intf_io_dec_lsu_valid_raw_d; // @[el2_lsu.scala 160:30] + wire bus_intf_io_lsu_busreq_m; // @[el2_lsu.scala 160:30] + wire bus_intf_io_lsu_pkt_m_load; // @[el2_lsu.scala 160:30] + wire bus_intf_io_lsu_pkt_m_valid; // @[el2_lsu.scala 160:30] + wire bus_intf_io_lsu_pkt_r_by; // @[el2_lsu.scala 160:30] + wire bus_intf_io_lsu_pkt_r_half; // @[el2_lsu.scala 160:30] + wire bus_intf_io_lsu_pkt_r_word; // @[el2_lsu.scala 160:30] + wire bus_intf_io_lsu_pkt_r_load; // @[el2_lsu.scala 160:30] + wire bus_intf_io_lsu_pkt_r_store; // @[el2_lsu.scala 160:30] + wire bus_intf_io_lsu_pkt_r_unsign; // @[el2_lsu.scala 160:30] + wire bus_intf_io_lsu_pkt_r_valid; // @[el2_lsu.scala 160:30] + wire [31:0] bus_intf_io_lsu_addr_d; // @[el2_lsu.scala 160:30] + wire [31:0] bus_intf_io_lsu_addr_m; // @[el2_lsu.scala 160:30] + wire [31:0] bus_intf_io_lsu_addr_r; // @[el2_lsu.scala 160:30] + wire [31:0] bus_intf_io_end_addr_d; // @[el2_lsu.scala 160:30] + wire [31:0] bus_intf_io_end_addr_m; // @[el2_lsu.scala 160:30] + wire [31:0] bus_intf_io_end_addr_r; // @[el2_lsu.scala 160:30] + wire [31:0] bus_intf_io_store_data_r; // @[el2_lsu.scala 160:30] + wire bus_intf_io_dec_tlu_force_halt; // @[el2_lsu.scala 160:30] + wire bus_intf_io_lsu_commit_r; // @[el2_lsu.scala 160:30] + wire bus_intf_io_is_sideeffects_m; // @[el2_lsu.scala 160:30] + wire bus_intf_io_flush_m_up; // @[el2_lsu.scala 160:30] + wire bus_intf_io_flush_r; // @[el2_lsu.scala 160:30] + wire bus_intf_io_lsu_axi_awready; // @[el2_lsu.scala 160:30] + wire bus_intf_io_lsu_axi_wready; // @[el2_lsu.scala 160:30] + wire bus_intf_io_lsu_axi_bvalid; // @[el2_lsu.scala 160:30] + wire [1:0] bus_intf_io_lsu_axi_bresp; // @[el2_lsu.scala 160:30] + wire [2:0] bus_intf_io_lsu_axi_bid; // @[el2_lsu.scala 160:30] + wire bus_intf_io_lsu_axi_arready; // @[el2_lsu.scala 160:30] + wire bus_intf_io_lsu_axi_rvalid; // @[el2_lsu.scala 160:30] + wire [2:0] bus_intf_io_lsu_axi_rid; // @[el2_lsu.scala 160:30] + wire [63:0] bus_intf_io_lsu_axi_rdata; // @[el2_lsu.scala 160:30] + wire bus_intf_io_lsu_bus_clk_en; // @[el2_lsu.scala 160:30] + wire bus_intf_io_lsu_busreq_r; // @[el2_lsu.scala 160:30] + wire bus_intf_io_lsu_bus_buffer_pend_any; // @[el2_lsu.scala 160:30] + wire bus_intf_io_lsu_bus_buffer_full_any; // @[el2_lsu.scala 160:30] + wire bus_intf_io_lsu_bus_buffer_empty_any; // @[el2_lsu.scala 160:30] + wire [31:0] bus_intf_io_bus_read_data_m; // @[el2_lsu.scala 160:30] + wire bus_intf_io_lsu_imprecise_error_load_any; // @[el2_lsu.scala 160:30] + wire bus_intf_io_lsu_imprecise_error_store_any; // @[el2_lsu.scala 160:30] + wire [31:0] bus_intf_io_lsu_imprecise_error_addr_any; // @[el2_lsu.scala 160:30] + wire bus_intf_io_lsu_nonblock_load_valid_m; // @[el2_lsu.scala 160:30] + wire [1:0] bus_intf_io_lsu_nonblock_load_tag_m; // @[el2_lsu.scala 160:30] + wire bus_intf_io_lsu_nonblock_load_inv_r; // @[el2_lsu.scala 160:30] + wire [1:0] bus_intf_io_lsu_nonblock_load_inv_tag_r; // @[el2_lsu.scala 160:30] + wire bus_intf_io_lsu_nonblock_load_data_valid; // @[el2_lsu.scala 160:30] + wire bus_intf_io_lsu_nonblock_load_data_error; // @[el2_lsu.scala 160:30] + wire [1:0] bus_intf_io_lsu_nonblock_load_data_tag; // @[el2_lsu.scala 160:30] + wire [31:0] bus_intf_io_lsu_nonblock_load_data; // @[el2_lsu.scala 160:30] + wire bus_intf_io_lsu_pmu_bus_trxn; // @[el2_lsu.scala 160:30] + wire bus_intf_io_lsu_pmu_bus_misaligned; // @[el2_lsu.scala 160:30] + wire bus_intf_io_lsu_pmu_bus_error; // @[el2_lsu.scala 160:30] + wire bus_intf_io_lsu_pmu_bus_busy; // @[el2_lsu.scala 160:30] + wire bus_intf_io_lsu_axi_awvalid; // @[el2_lsu.scala 160:30] + wire [2:0] bus_intf_io_lsu_axi_awid; // @[el2_lsu.scala 160:30] + wire [31:0] bus_intf_io_lsu_axi_awaddr; // @[el2_lsu.scala 160:30] + wire [3:0] bus_intf_io_lsu_axi_awregion; // @[el2_lsu.scala 160:30] + wire [2:0] bus_intf_io_lsu_axi_awsize; // @[el2_lsu.scala 160:30] + wire [3:0] bus_intf_io_lsu_axi_awcache; // @[el2_lsu.scala 160:30] + wire bus_intf_io_lsu_axi_wvalid; // @[el2_lsu.scala 160:30] + wire [63:0] bus_intf_io_lsu_axi_wdata; // @[el2_lsu.scala 160:30] + wire [7:0] bus_intf_io_lsu_axi_wstrb; // @[el2_lsu.scala 160:30] + wire bus_intf_io_lsu_axi_arvalid; // @[el2_lsu.scala 160:30] + wire [2:0] bus_intf_io_lsu_axi_arid; // @[el2_lsu.scala 160:30] + wire [31:0] bus_intf_io_lsu_axi_araddr; // @[el2_lsu.scala 160:30] + wire [3:0] bus_intf_io_lsu_axi_arregion; // @[el2_lsu.scala 160:30] + wire [2:0] bus_intf_io_lsu_axi_arsize; // @[el2_lsu.scala 160:30] + wire [3:0] bus_intf_io_lsu_axi_arcache; // @[el2_lsu.scala 160:30] + wire _T = stbuf_io_lsu_stbuf_full_any | bus_intf_io_lsu_bus_buffer_full_any; // @[el2_lsu.scala 166:57] + wire _T_3 = ~lsu_lsc_ctl_io_lsu_pkt_m_dma; // @[el2_lsu.scala 173:58] + wire _T_4 = lsu_lsc_ctl_io_lsu_pkt_m_valid & _T_3; // @[el2_lsu.scala 173:56] + wire _T_5 = lsu_lsc_ctl_io_addr_in_dccm_m | lsu_lsc_ctl_io_addr_in_pic_m; // @[el2_lsu.scala 173:121] + wire _T_6 = _T_4 & _T_5; // @[el2_lsu.scala 173:88] + wire ldst_nodma_mtor = _T_6 & lsu_lsc_ctl_io_lsu_pkt_m_store; // @[el2_lsu.scala 173:153] + wire _T_7 = io_dec_lsu_valid_raw_d | ldst_nodma_mtor; // @[el2_lsu.scala 174:45] + wire _T_8 = _T_7 | dccm_ctl_io_ld_single_ecc_error_r_ff; // @[el2_lsu.scala 174:63] + wire _T_10 = io_dma_dccm_req & io_dma_mem_write; // @[el2_lsu.scala 175:38] + wire [5:0] _T_13 = {io_dma_mem_addr[2:0],3'h0}; // @[Cat.scala 29:58] + wire [63:0] dma_dccm_wdata = io_dma_mem_wdata >> _T_13; // @[el2_lsu.scala 177:38] + wire _T_19 = ~lsu_lsc_ctl_io_lsu_pkt_r_dma; // @[el2_lsu.scala 188:125] + wire _T_20 = lsu_lsc_ctl_io_lsu_pkt_r_valid & _T_19; // @[el2_lsu.scala 188:123] + wire _T_21 = _T_4 | _T_20; // @[el2_lsu.scala 188:89] + wire _T_22 = ~_T_21; // @[el2_lsu.scala 188:22] + wire _T_25 = lsu_lsc_ctl_io_lsu_pkt_r_valid & lsu_lsc_ctl_io_lsu_pkt_r_store; // @[el2_lsu.scala 190:61] + wire _T_26 = _T_25 & lsu_lsc_ctl_io_addr_in_dccm_r; // @[el2_lsu.scala 190:94] + wire _T_27 = ~io_dec_tlu_i0_kill_writeb_r; // @[el2_lsu.scala 190:128] + wire _T_28 = _T_26 & _T_27; // @[el2_lsu.scala 190:126] + wire _T_30 = lsu_lsc_ctl_io_lsu_pkt_m_load | lsu_lsc_ctl_io_lsu_pkt_m_store; // @[el2_lsu.scala 192:85] + wire _T_34 = _T_30 & lsu_lsc_ctl_io_addr_external_m; // @[el2_lsu.scala 194:121] + wire _T_35 = lsu_lsc_ctl_io_lsu_pkt_m_valid & _T_34; // @[el2_lsu.scala 194:53] + wire _T_36 = ~io_dec_tlu_flush_lower_r; // @[el2_lsu.scala 194:157] + wire _T_37 = _T_35 & _T_36; // @[el2_lsu.scala 194:155] + wire _T_38 = ~lsu_lsc_ctl_io_lsu_exc_m; // @[el2_lsu.scala 194:171] + wire _T_39 = _T_37 & _T_38; // @[el2_lsu.scala 194:169] + wire _T_40 = ~lsu_lsc_ctl_io_lsu_pkt_m_fast_int; // @[el2_lsu.scala 194:199] + wire _T_42 = lsu_lsc_ctl_io_lsu_pkt_m_half & lsu_lsc_ctl_io_lsu_addr_m[0]; // @[el2_lsu.scala 196:95] + wire _T_44 = |lsu_lsc_ctl_io_lsu_addr_m[1:0]; // @[el2_lsu.scala 196:193] + wire _T_45 = lsu_lsc_ctl_io_lsu_pkt_m_word & _T_44; // @[el2_lsu.scala 196:160] + wire _T_46 = _T_42 | _T_45; // @[el2_lsu.scala 196:127] + wire _T_48 = lsu_lsc_ctl_io_lsu_pkt_m_valid & lsu_lsc_ctl_io_lsu_pkt_m_load; // @[el2_lsu.scala 197:65] + wire _T_50 = lsu_lsc_ctl_io_lsu_pkt_m_valid & lsu_lsc_ctl_io_lsu_pkt_m_store; // @[el2_lsu.scala 198:65] + reg [2:0] _T_52; // @[el2_lsu.scala 490:67] + reg lsu_raw_fwd_hi_r; // @[el2_lsu.scala 491:67] + reg lsu_raw_fwd_lo_r; // @[el2_lsu.scala 492:67] + wire [31:0] dma_mem_tag_m = {{29'd0}, _T_52}; // @[el2_lsu.scala 490:57] + el2_lsu_lsc_ctl lsu_lsc_ctl ( // @[el2_lsu.scala 154:30] + .reset(lsu_lsc_ctl_reset), + .io_lsu_c1_m_clk(lsu_lsc_ctl_io_lsu_c1_m_clk), + .io_lsu_c1_r_clk(lsu_lsc_ctl_io_lsu_c1_r_clk), + .io_lsu_c2_m_clk(lsu_lsc_ctl_io_lsu_c2_m_clk), + .io_lsu_c2_r_clk(lsu_lsc_ctl_io_lsu_c2_r_clk), + .io_lsu_store_c1_m_clk(lsu_lsc_ctl_io_lsu_store_c1_m_clk), + .io_lsu_ld_data_corr_r(lsu_lsc_ctl_io_lsu_ld_data_corr_r), + .io_lsu_single_ecc_error_r(lsu_lsc_ctl_io_lsu_single_ecc_error_r), + .io_lsu_double_ecc_error_r(lsu_lsc_ctl_io_lsu_double_ecc_error_r), + .io_lsu_ld_data_m(lsu_lsc_ctl_io_lsu_ld_data_m), + .io_lsu_single_ecc_error_m(lsu_lsc_ctl_io_lsu_single_ecc_error_m), + .io_lsu_double_ecc_error_m(lsu_lsc_ctl_io_lsu_double_ecc_error_m), + .io_flush_m_up(lsu_lsc_ctl_io_flush_m_up), + .io_flush_r(lsu_lsc_ctl_io_flush_r), + .io_exu_lsu_rs1_d(lsu_lsc_ctl_io_exu_lsu_rs1_d), + .io_exu_lsu_rs2_d(lsu_lsc_ctl_io_exu_lsu_rs2_d), + .io_lsu_p_fast_int(lsu_lsc_ctl_io_lsu_p_fast_int), + .io_lsu_p_by(lsu_lsc_ctl_io_lsu_p_by), + .io_lsu_p_half(lsu_lsc_ctl_io_lsu_p_half), + .io_lsu_p_word(lsu_lsc_ctl_io_lsu_p_word), + .io_lsu_p_dword(lsu_lsc_ctl_io_lsu_p_dword), + .io_lsu_p_load(lsu_lsc_ctl_io_lsu_p_load), + .io_lsu_p_store(lsu_lsc_ctl_io_lsu_p_store), + .io_lsu_p_unsign(lsu_lsc_ctl_io_lsu_p_unsign), + .io_lsu_p_dma(lsu_lsc_ctl_io_lsu_p_dma), + .io_lsu_p_store_data_bypass_d(lsu_lsc_ctl_io_lsu_p_store_data_bypass_d), + .io_lsu_p_load_ldst_bypass_d(lsu_lsc_ctl_io_lsu_p_load_ldst_bypass_d), + .io_lsu_p_store_data_bypass_m(lsu_lsc_ctl_io_lsu_p_store_data_bypass_m), + .io_lsu_p_valid(lsu_lsc_ctl_io_lsu_p_valid), + .io_dec_lsu_valid_raw_d(lsu_lsc_ctl_io_dec_lsu_valid_raw_d), + .io_dec_lsu_offset_d(lsu_lsc_ctl_io_dec_lsu_offset_d), + .io_picm_mask_data_m(lsu_lsc_ctl_io_picm_mask_data_m), + .io_bus_read_data_m(lsu_lsc_ctl_io_bus_read_data_m), + .io_lsu_result_m(lsu_lsc_ctl_io_lsu_result_m), + .io_lsu_addr_d(lsu_lsc_ctl_io_lsu_addr_d), + .io_lsu_addr_m(lsu_lsc_ctl_io_lsu_addr_m), + .io_lsu_addr_r(lsu_lsc_ctl_io_lsu_addr_r), + .io_end_addr_d(lsu_lsc_ctl_io_end_addr_d), + .io_end_addr_m(lsu_lsc_ctl_io_end_addr_m), + .io_end_addr_r(lsu_lsc_ctl_io_end_addr_r), + .io_store_data_m(lsu_lsc_ctl_io_store_data_m), + .io_dec_tlu_mrac_ff(lsu_lsc_ctl_io_dec_tlu_mrac_ff), + .io_lsu_exc_m(lsu_lsc_ctl_io_lsu_exc_m), + .io_is_sideeffects_m(lsu_lsc_ctl_io_is_sideeffects_m), + .io_lsu_commit_r(lsu_lsc_ctl_io_lsu_commit_r), + .io_lsu_single_ecc_error_incr(lsu_lsc_ctl_io_lsu_single_ecc_error_incr), + .io_lsu_error_pkt_r_exc_valid(lsu_lsc_ctl_io_lsu_error_pkt_r_exc_valid), + .io_lsu_error_pkt_r_single_ecc_error(lsu_lsc_ctl_io_lsu_error_pkt_r_single_ecc_error), + .io_lsu_error_pkt_r_inst_type(lsu_lsc_ctl_io_lsu_error_pkt_r_inst_type), + .io_lsu_error_pkt_r_exc_type(lsu_lsc_ctl_io_lsu_error_pkt_r_exc_type), + .io_lsu_error_pkt_r_mscause(lsu_lsc_ctl_io_lsu_error_pkt_r_mscause), + .io_lsu_error_pkt_r_addr(lsu_lsc_ctl_io_lsu_error_pkt_r_addr), + .io_lsu_fir_addr(lsu_lsc_ctl_io_lsu_fir_addr), + .io_lsu_fir_error(lsu_lsc_ctl_io_lsu_fir_error), + .io_addr_in_dccm_d(lsu_lsc_ctl_io_addr_in_dccm_d), + .io_addr_in_dccm_m(lsu_lsc_ctl_io_addr_in_dccm_m), + .io_addr_in_dccm_r(lsu_lsc_ctl_io_addr_in_dccm_r), + .io_addr_in_pic_d(lsu_lsc_ctl_io_addr_in_pic_d), + .io_addr_in_pic_m(lsu_lsc_ctl_io_addr_in_pic_m), + .io_addr_in_pic_r(lsu_lsc_ctl_io_addr_in_pic_r), + .io_addr_external_m(lsu_lsc_ctl_io_addr_external_m), + .io_dma_dccm_req(lsu_lsc_ctl_io_dma_dccm_req), + .io_dma_mem_addr(lsu_lsc_ctl_io_dma_mem_addr), + .io_dma_mem_sz(lsu_lsc_ctl_io_dma_mem_sz), + .io_dma_mem_write(lsu_lsc_ctl_io_dma_mem_write), + .io_dma_mem_wdata(lsu_lsc_ctl_io_dma_mem_wdata), + .io_lsu_pkt_d_fast_int(lsu_lsc_ctl_io_lsu_pkt_d_fast_int), + .io_lsu_pkt_d_by(lsu_lsc_ctl_io_lsu_pkt_d_by), + .io_lsu_pkt_d_half(lsu_lsc_ctl_io_lsu_pkt_d_half), + .io_lsu_pkt_d_word(lsu_lsc_ctl_io_lsu_pkt_d_word), + .io_lsu_pkt_d_dword(lsu_lsc_ctl_io_lsu_pkt_d_dword), + .io_lsu_pkt_d_load(lsu_lsc_ctl_io_lsu_pkt_d_load), + .io_lsu_pkt_d_store(lsu_lsc_ctl_io_lsu_pkt_d_store), + .io_lsu_pkt_d_unsign(lsu_lsc_ctl_io_lsu_pkt_d_unsign), + .io_lsu_pkt_d_dma(lsu_lsc_ctl_io_lsu_pkt_d_dma), + .io_lsu_pkt_d_store_data_bypass_d(lsu_lsc_ctl_io_lsu_pkt_d_store_data_bypass_d), + .io_lsu_pkt_d_load_ldst_bypass_d(lsu_lsc_ctl_io_lsu_pkt_d_load_ldst_bypass_d), + .io_lsu_pkt_d_store_data_bypass_m(lsu_lsc_ctl_io_lsu_pkt_d_store_data_bypass_m), + .io_lsu_pkt_d_valid(lsu_lsc_ctl_io_lsu_pkt_d_valid), + .io_lsu_pkt_m_fast_int(lsu_lsc_ctl_io_lsu_pkt_m_fast_int), + .io_lsu_pkt_m_by(lsu_lsc_ctl_io_lsu_pkt_m_by), + .io_lsu_pkt_m_half(lsu_lsc_ctl_io_lsu_pkt_m_half), + .io_lsu_pkt_m_word(lsu_lsc_ctl_io_lsu_pkt_m_word), + .io_lsu_pkt_m_dword(lsu_lsc_ctl_io_lsu_pkt_m_dword), + .io_lsu_pkt_m_load(lsu_lsc_ctl_io_lsu_pkt_m_load), + .io_lsu_pkt_m_store(lsu_lsc_ctl_io_lsu_pkt_m_store), + .io_lsu_pkt_m_unsign(lsu_lsc_ctl_io_lsu_pkt_m_unsign), + .io_lsu_pkt_m_dma(lsu_lsc_ctl_io_lsu_pkt_m_dma), + .io_lsu_pkt_m_store_data_bypass_m(lsu_lsc_ctl_io_lsu_pkt_m_store_data_bypass_m), + .io_lsu_pkt_m_valid(lsu_lsc_ctl_io_lsu_pkt_m_valid), + .io_lsu_pkt_r_by(lsu_lsc_ctl_io_lsu_pkt_r_by), + .io_lsu_pkt_r_half(lsu_lsc_ctl_io_lsu_pkt_r_half), + .io_lsu_pkt_r_word(lsu_lsc_ctl_io_lsu_pkt_r_word), + .io_lsu_pkt_r_dword(lsu_lsc_ctl_io_lsu_pkt_r_dword), + .io_lsu_pkt_r_load(lsu_lsc_ctl_io_lsu_pkt_r_load), + .io_lsu_pkt_r_store(lsu_lsc_ctl_io_lsu_pkt_r_store), + .io_lsu_pkt_r_unsign(lsu_lsc_ctl_io_lsu_pkt_r_unsign), + .io_lsu_pkt_r_dma(lsu_lsc_ctl_io_lsu_pkt_r_dma), + .io_lsu_pkt_r_valid(lsu_lsc_ctl_io_lsu_pkt_r_valid) + ); + el2_lsu_dccm_ctl dccm_ctl ( // @[el2_lsu.scala 155:30] + .clock(dccm_ctl_clock), + .reset(dccm_ctl_reset), + .io_lsu_c2_m_clk(dccm_ctl_io_lsu_c2_m_clk), + .io_lsu_c2_r_clk(dccm_ctl_io_lsu_c2_r_clk), + .io_lsu_free_c2_clk(dccm_ctl_io_lsu_free_c2_clk), + .io_lsu_store_c1_r_clk(dccm_ctl_io_lsu_store_c1_r_clk), + .io_lsu_pkt_d_word(dccm_ctl_io_lsu_pkt_d_word), + .io_lsu_pkt_d_dword(dccm_ctl_io_lsu_pkt_d_dword), + .io_lsu_pkt_d_load(dccm_ctl_io_lsu_pkt_d_load), + .io_lsu_pkt_d_store(dccm_ctl_io_lsu_pkt_d_store), + .io_lsu_pkt_d_dma(dccm_ctl_io_lsu_pkt_d_dma), + .io_lsu_pkt_d_valid(dccm_ctl_io_lsu_pkt_d_valid), + .io_lsu_pkt_m_by(dccm_ctl_io_lsu_pkt_m_by), + .io_lsu_pkt_m_half(dccm_ctl_io_lsu_pkt_m_half), + .io_lsu_pkt_m_word(dccm_ctl_io_lsu_pkt_m_word), + .io_lsu_pkt_m_load(dccm_ctl_io_lsu_pkt_m_load), + .io_lsu_pkt_m_store(dccm_ctl_io_lsu_pkt_m_store), + .io_lsu_pkt_m_dma(dccm_ctl_io_lsu_pkt_m_dma), + .io_lsu_pkt_m_valid(dccm_ctl_io_lsu_pkt_m_valid), + .io_lsu_pkt_r_by(dccm_ctl_io_lsu_pkt_r_by), + .io_lsu_pkt_r_half(dccm_ctl_io_lsu_pkt_r_half), + .io_lsu_pkt_r_word(dccm_ctl_io_lsu_pkt_r_word), + .io_lsu_pkt_r_load(dccm_ctl_io_lsu_pkt_r_load), + .io_lsu_pkt_r_store(dccm_ctl_io_lsu_pkt_r_store), + .io_lsu_pkt_r_dma(dccm_ctl_io_lsu_pkt_r_dma), + .io_lsu_pkt_r_valid(dccm_ctl_io_lsu_pkt_r_valid), + .io_addr_in_dccm_d(dccm_ctl_io_addr_in_dccm_d), + .io_addr_in_dccm_m(dccm_ctl_io_addr_in_dccm_m), + .io_addr_in_dccm_r(dccm_ctl_io_addr_in_dccm_r), + .io_addr_in_pic_d(dccm_ctl_io_addr_in_pic_d), + .io_addr_in_pic_m(dccm_ctl_io_addr_in_pic_m), + .io_addr_in_pic_r(dccm_ctl_io_addr_in_pic_r), + .io_lsu_raw_fwd_lo_r(dccm_ctl_io_lsu_raw_fwd_lo_r), + .io_lsu_raw_fwd_hi_r(dccm_ctl_io_lsu_raw_fwd_hi_r), + .io_lsu_commit_r(dccm_ctl_io_lsu_commit_r), + .io_lsu_addr_d(dccm_ctl_io_lsu_addr_d), + .io_lsu_addr_m(dccm_ctl_io_lsu_addr_m), + .io_lsu_addr_r(dccm_ctl_io_lsu_addr_r), + .io_end_addr_d(dccm_ctl_io_end_addr_d), + .io_end_addr_m(dccm_ctl_io_end_addr_m), + .io_end_addr_r(dccm_ctl_io_end_addr_r), + .io_stbuf_reqvld_any(dccm_ctl_io_stbuf_reqvld_any), + .io_stbuf_addr_any(dccm_ctl_io_stbuf_addr_any), + .io_stbuf_data_any(dccm_ctl_io_stbuf_data_any), + .io_stbuf_ecc_any(dccm_ctl_io_stbuf_ecc_any), + .io_stbuf_fwddata_hi_m(dccm_ctl_io_stbuf_fwddata_hi_m), + .io_stbuf_fwddata_lo_m(dccm_ctl_io_stbuf_fwddata_lo_m), + .io_stbuf_fwdbyteen_lo_m(dccm_ctl_io_stbuf_fwdbyteen_lo_m), + .io_stbuf_fwdbyteen_hi_m(dccm_ctl_io_stbuf_fwdbyteen_hi_m), + .io_lsu_ld_data_corr_r(dccm_ctl_io_lsu_ld_data_corr_r), + .io_lsu_double_ecc_error_r(dccm_ctl_io_lsu_double_ecc_error_r), + .io_single_ecc_error_hi_r(dccm_ctl_io_single_ecc_error_hi_r), + .io_single_ecc_error_lo_r(dccm_ctl_io_single_ecc_error_lo_r), + .io_sec_data_hi_r_ff(dccm_ctl_io_sec_data_hi_r_ff), + .io_sec_data_lo_r_ff(dccm_ctl_io_sec_data_lo_r_ff), + .io_sec_data_ecc_hi_r_ff(dccm_ctl_io_sec_data_ecc_hi_r_ff), + .io_sec_data_ecc_lo_r_ff(dccm_ctl_io_sec_data_ecc_lo_r_ff), + .io_dccm_rdata_hi_m(dccm_ctl_io_dccm_rdata_hi_m), + .io_dccm_rdata_lo_m(dccm_ctl_io_dccm_rdata_lo_m), + .io_dccm_data_ecc_hi_m(dccm_ctl_io_dccm_data_ecc_hi_m), + .io_dccm_data_ecc_lo_m(dccm_ctl_io_dccm_data_ecc_lo_m), + .io_lsu_ld_data_m(dccm_ctl_io_lsu_ld_data_m), + .io_lsu_double_ecc_error_m(dccm_ctl_io_lsu_double_ecc_error_m), + .io_sec_data_hi_m(dccm_ctl_io_sec_data_hi_m), + .io_sec_data_lo_m(dccm_ctl_io_sec_data_lo_m), + .io_store_data_m(dccm_ctl_io_store_data_m), + .io_dma_dccm_wen(dccm_ctl_io_dma_dccm_wen), + .io_dma_pic_wen(dccm_ctl_io_dma_pic_wen), + .io_dma_mem_tag_m(dccm_ctl_io_dma_mem_tag_m), + .io_dma_mem_addr(dccm_ctl_io_dma_mem_addr), + .io_dma_mem_wdata(dccm_ctl_io_dma_mem_wdata), + .io_dma_dccm_wdata_lo(dccm_ctl_io_dma_dccm_wdata_lo), + .io_dma_dccm_wdata_hi(dccm_ctl_io_dma_dccm_wdata_hi), + .io_dma_dccm_wdata_ecc_hi(dccm_ctl_io_dma_dccm_wdata_ecc_hi), + .io_dma_dccm_wdata_ecc_lo(dccm_ctl_io_dma_dccm_wdata_ecc_lo), + .io_store_data_hi_r(dccm_ctl_io_store_data_hi_r), + .io_store_data_lo_r(dccm_ctl_io_store_data_lo_r), + .io_store_datafn_hi_r(dccm_ctl_io_store_datafn_hi_r), + .io_store_datafn_lo_r(dccm_ctl_io_store_datafn_lo_r), + .io_store_data_r(dccm_ctl_io_store_data_r), + .io_ld_single_ecc_error_r(dccm_ctl_io_ld_single_ecc_error_r), + .io_ld_single_ecc_error_r_ff(dccm_ctl_io_ld_single_ecc_error_r_ff), + .io_picm_mask_data_m(dccm_ctl_io_picm_mask_data_m), + .io_lsu_stbuf_commit_any(dccm_ctl_io_lsu_stbuf_commit_any), + .io_lsu_dccm_rden_m(dccm_ctl_io_lsu_dccm_rden_m), + .io_dccm_dma_rvalid(dccm_ctl_io_dccm_dma_rvalid), + .io_dccm_dma_ecc_error(dccm_ctl_io_dccm_dma_ecc_error), + .io_dccm_dma_rtag(dccm_ctl_io_dccm_dma_rtag), + .io_dccm_dma_rdata(dccm_ctl_io_dccm_dma_rdata), + .io_dccm_wren(dccm_ctl_io_dccm_wren), + .io_dccm_rden(dccm_ctl_io_dccm_rden), + .io_dccm_wr_addr_lo(dccm_ctl_io_dccm_wr_addr_lo), + .io_dccm_wr_data_lo(dccm_ctl_io_dccm_wr_data_lo), + .io_dccm_rd_addr_lo(dccm_ctl_io_dccm_rd_addr_lo), + .io_dccm_rd_data_lo(dccm_ctl_io_dccm_rd_data_lo), + .io_dccm_wr_addr_hi(dccm_ctl_io_dccm_wr_addr_hi), + .io_dccm_wr_data_hi(dccm_ctl_io_dccm_wr_data_hi), + .io_dccm_rd_addr_hi(dccm_ctl_io_dccm_rd_addr_hi), + .io_dccm_rd_data_hi(dccm_ctl_io_dccm_rd_data_hi), + .io_picm_wren(dccm_ctl_io_picm_wren), + .io_picm_rden(dccm_ctl_io_picm_rden), + .io_picm_mken(dccm_ctl_io_picm_mken), + .io_picm_rdaddr(dccm_ctl_io_picm_rdaddr), + .io_picm_wraddr(dccm_ctl_io_picm_wraddr), + .io_picm_wr_data(dccm_ctl_io_picm_wr_data), + .io_picm_rd_data(dccm_ctl_io_picm_rd_data), + .io_scan_mode(dccm_ctl_io_scan_mode) + ); + el2_lsu_stbuf stbuf ( // @[el2_lsu.scala 156:30] + .clock(stbuf_clock), + .reset(stbuf_reset), + .io_lsu_c1_m_clk(stbuf_io_lsu_c1_m_clk), + .io_lsu_c1_r_clk(stbuf_io_lsu_c1_r_clk), + .io_lsu_stbuf_c1_clk(stbuf_io_lsu_stbuf_c1_clk), + .io_lsu_free_c2_clk(stbuf_io_lsu_free_c2_clk), + .io_lsu_pkt_m_store(stbuf_io_lsu_pkt_m_store), + .io_lsu_pkt_m_dma(stbuf_io_lsu_pkt_m_dma), + .io_lsu_pkt_m_valid(stbuf_io_lsu_pkt_m_valid), + .io_lsu_pkt_r_by(stbuf_io_lsu_pkt_r_by), + .io_lsu_pkt_r_half(stbuf_io_lsu_pkt_r_half), + .io_lsu_pkt_r_word(stbuf_io_lsu_pkt_r_word), + .io_lsu_pkt_r_dword(stbuf_io_lsu_pkt_r_dword), + .io_lsu_pkt_r_store(stbuf_io_lsu_pkt_r_store), + .io_lsu_pkt_r_dma(stbuf_io_lsu_pkt_r_dma), + .io_lsu_pkt_r_valid(stbuf_io_lsu_pkt_r_valid), + .io_store_stbuf_reqvld_r(stbuf_io_store_stbuf_reqvld_r), + .io_lsu_commit_r(stbuf_io_lsu_commit_r), + .io_dec_lsu_valid_raw_d(stbuf_io_dec_lsu_valid_raw_d), + .io_store_data_hi_r(stbuf_io_store_data_hi_r), + .io_store_data_lo_r(stbuf_io_store_data_lo_r), + .io_store_datafn_hi_r(stbuf_io_store_datafn_hi_r), + .io_store_datafn_lo_r(stbuf_io_store_datafn_lo_r), + .io_lsu_stbuf_commit_any(stbuf_io_lsu_stbuf_commit_any), + .io_lsu_addr_d(stbuf_io_lsu_addr_d), + .io_lsu_addr_m(stbuf_io_lsu_addr_m), + .io_lsu_addr_r(stbuf_io_lsu_addr_r), + .io_end_addr_d(stbuf_io_end_addr_d), + .io_end_addr_m(stbuf_io_end_addr_m), + .io_end_addr_r(stbuf_io_end_addr_r), + .io_addr_in_dccm_m(stbuf_io_addr_in_dccm_m), + .io_addr_in_dccm_r(stbuf_io_addr_in_dccm_r), + .io_scan_mode(stbuf_io_scan_mode), + .io_stbuf_reqvld_any(stbuf_io_stbuf_reqvld_any), + .io_stbuf_reqvld_flushed_any(stbuf_io_stbuf_reqvld_flushed_any), + .io_stbuf_addr_any(stbuf_io_stbuf_addr_any), + .io_stbuf_data_any(stbuf_io_stbuf_data_any), + .io_lsu_stbuf_full_any(stbuf_io_lsu_stbuf_full_any), + .io_lsu_stbuf_empty_any(stbuf_io_lsu_stbuf_empty_any), + .io_ldst_stbuf_reqvld_r(stbuf_io_ldst_stbuf_reqvld_r), + .io_stbuf_fwddata_hi_m(stbuf_io_stbuf_fwddata_hi_m), + .io_stbuf_fwddata_lo_m(stbuf_io_stbuf_fwddata_lo_m), + .io_stbuf_fwdbyteen_hi_m(stbuf_io_stbuf_fwdbyteen_hi_m), + .io_stbuf_fwdbyteen_lo_m(stbuf_io_stbuf_fwdbyteen_lo_m) + ); + el2_lsu_ecc ecc ( // @[el2_lsu.scala 157:30] + .clock(ecc_clock), + .reset(ecc_reset), + .io_lsu_c2_r_clk(ecc_io_lsu_c2_r_clk), + .io_lsu_pkt_m_load(ecc_io_lsu_pkt_m_load), + .io_lsu_pkt_m_store(ecc_io_lsu_pkt_m_store), + .io_lsu_pkt_m_dma(ecc_io_lsu_pkt_m_dma), + .io_lsu_pkt_m_valid(ecc_io_lsu_pkt_m_valid), + .io_stbuf_data_any(ecc_io_stbuf_data_any), + .io_dec_tlu_core_ecc_disable(ecc_io_dec_tlu_core_ecc_disable), + .io_lsu_addr_m(ecc_io_lsu_addr_m), + .io_end_addr_m(ecc_io_end_addr_m), + .io_dccm_rdata_hi_m(ecc_io_dccm_rdata_hi_m), + .io_dccm_rdata_lo_m(ecc_io_dccm_rdata_lo_m), + .io_dccm_data_ecc_hi_m(ecc_io_dccm_data_ecc_hi_m), + .io_dccm_data_ecc_lo_m(ecc_io_dccm_data_ecc_lo_m), + .io_ld_single_ecc_error_r(ecc_io_ld_single_ecc_error_r), + .io_ld_single_ecc_error_r_ff(ecc_io_ld_single_ecc_error_r_ff), + .io_lsu_dccm_rden_m(ecc_io_lsu_dccm_rden_m), + .io_addr_in_dccm_m(ecc_io_addr_in_dccm_m), + .io_dma_dccm_wen(ecc_io_dma_dccm_wen), + .io_dma_dccm_wdata_lo(ecc_io_dma_dccm_wdata_lo), + .io_dma_dccm_wdata_hi(ecc_io_dma_dccm_wdata_hi), + .io_scan_mode(ecc_io_scan_mode), + .io_sec_data_hi_r(ecc_io_sec_data_hi_r), + .io_sec_data_lo_r(ecc_io_sec_data_lo_r), + .io_sec_data_hi_m(ecc_io_sec_data_hi_m), + .io_sec_data_lo_m(ecc_io_sec_data_lo_m), + .io_sec_data_hi_r_ff(ecc_io_sec_data_hi_r_ff), + .io_sec_data_lo_r_ff(ecc_io_sec_data_lo_r_ff), + .io_dma_dccm_wdata_ecc_hi(ecc_io_dma_dccm_wdata_ecc_hi), + .io_dma_dccm_wdata_ecc_lo(ecc_io_dma_dccm_wdata_ecc_lo), + .io_stbuf_ecc_any(ecc_io_stbuf_ecc_any), + .io_sec_data_ecc_hi_r_ff(ecc_io_sec_data_ecc_hi_r_ff), + .io_sec_data_ecc_lo_r_ff(ecc_io_sec_data_ecc_lo_r_ff), + .io_single_ecc_error_hi_r(ecc_io_single_ecc_error_hi_r), + .io_single_ecc_error_lo_r(ecc_io_single_ecc_error_lo_r), + .io_lsu_single_ecc_error_r(ecc_io_lsu_single_ecc_error_r), + .io_lsu_double_ecc_error_r(ecc_io_lsu_double_ecc_error_r), + .io_lsu_single_ecc_error_m(ecc_io_lsu_single_ecc_error_m), + .io_lsu_double_ecc_error_m(ecc_io_lsu_double_ecc_error_m) + ); + el2_lsu_trigger trigger ( // @[el2_lsu.scala 158:30] + .io_trigger_pkt_any_0_select(trigger_io_trigger_pkt_any_0_select), + .io_trigger_pkt_any_0_match_(trigger_io_trigger_pkt_any_0_match_), + .io_trigger_pkt_any_0_store(trigger_io_trigger_pkt_any_0_store), + .io_trigger_pkt_any_0_load(trigger_io_trigger_pkt_any_0_load), + .io_trigger_pkt_any_0_tdata2(trigger_io_trigger_pkt_any_0_tdata2), + .io_trigger_pkt_any_1_select(trigger_io_trigger_pkt_any_1_select), + .io_trigger_pkt_any_1_match_(trigger_io_trigger_pkt_any_1_match_), + .io_trigger_pkt_any_1_store(trigger_io_trigger_pkt_any_1_store), + .io_trigger_pkt_any_1_load(trigger_io_trigger_pkt_any_1_load), + .io_trigger_pkt_any_1_tdata2(trigger_io_trigger_pkt_any_1_tdata2), + .io_trigger_pkt_any_2_select(trigger_io_trigger_pkt_any_2_select), + .io_trigger_pkt_any_2_match_(trigger_io_trigger_pkt_any_2_match_), + .io_trigger_pkt_any_2_store(trigger_io_trigger_pkt_any_2_store), + .io_trigger_pkt_any_2_load(trigger_io_trigger_pkt_any_2_load), + .io_trigger_pkt_any_2_tdata2(trigger_io_trigger_pkt_any_2_tdata2), + .io_trigger_pkt_any_3_select(trigger_io_trigger_pkt_any_3_select), + .io_trigger_pkt_any_3_match_(trigger_io_trigger_pkt_any_3_match_), + .io_trigger_pkt_any_3_store(trigger_io_trigger_pkt_any_3_store), + .io_trigger_pkt_any_3_load(trigger_io_trigger_pkt_any_3_load), + .io_trigger_pkt_any_3_tdata2(trigger_io_trigger_pkt_any_3_tdata2), + .io_lsu_pkt_m_half(trigger_io_lsu_pkt_m_half), + .io_lsu_pkt_m_word(trigger_io_lsu_pkt_m_word), + .io_lsu_pkt_m_load(trigger_io_lsu_pkt_m_load), + .io_lsu_pkt_m_store(trigger_io_lsu_pkt_m_store), + .io_lsu_pkt_m_dma(trigger_io_lsu_pkt_m_dma), + .io_lsu_pkt_m_valid(trigger_io_lsu_pkt_m_valid), + .io_lsu_addr_m(trigger_io_lsu_addr_m), + .io_store_data_m(trigger_io_store_data_m), + .io_lsu_trigger_match_m(trigger_io_lsu_trigger_match_m) + ); + el2_lsu_clkdomain clkdomain ( // @[el2_lsu.scala 159:30] + .clock(clkdomain_clock), + .reset(clkdomain_reset), + .io_free_clk(clkdomain_io_free_clk), + .io_clk_override(clkdomain_io_clk_override), + .io_dma_dccm_req(clkdomain_io_dma_dccm_req), + .io_ldst_stbuf_reqvld_r(clkdomain_io_ldst_stbuf_reqvld_r), + .io_stbuf_reqvld_any(clkdomain_io_stbuf_reqvld_any), + .io_stbuf_reqvld_flushed_any(clkdomain_io_stbuf_reqvld_flushed_any), + .io_lsu_busreq_r(clkdomain_io_lsu_busreq_r), + .io_lsu_bus_buffer_pend_any(clkdomain_io_lsu_bus_buffer_pend_any), + .io_lsu_bus_buffer_empty_any(clkdomain_io_lsu_bus_buffer_empty_any), + .io_lsu_stbuf_empty_any(clkdomain_io_lsu_stbuf_empty_any), + .io_lsu_bus_clk_en(clkdomain_io_lsu_bus_clk_en), + .io_lsu_p_valid(clkdomain_io_lsu_p_valid), + .io_lsu_pkt_d_store(clkdomain_io_lsu_pkt_d_store), + .io_lsu_pkt_d_valid(clkdomain_io_lsu_pkt_d_valid), + .io_lsu_pkt_m_store(clkdomain_io_lsu_pkt_m_store), + .io_lsu_pkt_m_valid(clkdomain_io_lsu_pkt_m_valid), + .io_lsu_pkt_r_valid(clkdomain_io_lsu_pkt_r_valid), + .io_lsu_c1_m_clk(clkdomain_io_lsu_c1_m_clk), + .io_lsu_c1_r_clk(clkdomain_io_lsu_c1_r_clk), + .io_lsu_c2_m_clk(clkdomain_io_lsu_c2_m_clk), + .io_lsu_c2_r_clk(clkdomain_io_lsu_c2_r_clk), + .io_lsu_store_c1_m_clk(clkdomain_io_lsu_store_c1_m_clk), + .io_lsu_stbuf_c1_clk(clkdomain_io_lsu_stbuf_c1_clk), + .io_lsu_bus_ibuf_c1_clk(clkdomain_io_lsu_bus_ibuf_c1_clk), + .io_lsu_bus_buf_c1_clk(clkdomain_io_lsu_bus_buf_c1_clk), + .io_lsu_busm_clk(clkdomain_io_lsu_busm_clk), + .io_lsu_free_c2_clk(clkdomain_io_lsu_free_c2_clk), + .io_scan_mode(clkdomain_io_scan_mode) + ); + el2_lsu_bus_intf bus_intf ( // @[el2_lsu.scala 160:30] + .clock(bus_intf_clock), + .reset(bus_intf_reset), + .io_scan_mode(bus_intf_io_scan_mode), + .io_dec_tlu_external_ldfwd_disable(bus_intf_io_dec_tlu_external_ldfwd_disable), + .io_dec_tlu_wb_coalescing_disable(bus_intf_io_dec_tlu_wb_coalescing_disable), + .io_dec_tlu_sideeffect_posted_disable(bus_intf_io_dec_tlu_sideeffect_posted_disable), + .io_lsu_c1_m_clk(bus_intf_io_lsu_c1_m_clk), + .io_lsu_c1_r_clk(bus_intf_io_lsu_c1_r_clk), + .io_lsu_c2_r_clk(bus_intf_io_lsu_c2_r_clk), + .io_lsu_bus_ibuf_c1_clk(bus_intf_io_lsu_bus_ibuf_c1_clk), + .io_lsu_bus_buf_c1_clk(bus_intf_io_lsu_bus_buf_c1_clk), + .io_lsu_free_c2_clk(bus_intf_io_lsu_free_c2_clk), + .io_free_clk(bus_intf_io_free_clk), + .io_lsu_busm_clk(bus_intf_io_lsu_busm_clk), + .io_dec_lsu_valid_raw_d(bus_intf_io_dec_lsu_valid_raw_d), + .io_lsu_busreq_m(bus_intf_io_lsu_busreq_m), + .io_lsu_pkt_m_load(bus_intf_io_lsu_pkt_m_load), + .io_lsu_pkt_m_valid(bus_intf_io_lsu_pkt_m_valid), + .io_lsu_pkt_r_by(bus_intf_io_lsu_pkt_r_by), + .io_lsu_pkt_r_half(bus_intf_io_lsu_pkt_r_half), + .io_lsu_pkt_r_word(bus_intf_io_lsu_pkt_r_word), + .io_lsu_pkt_r_load(bus_intf_io_lsu_pkt_r_load), + .io_lsu_pkt_r_store(bus_intf_io_lsu_pkt_r_store), + .io_lsu_pkt_r_unsign(bus_intf_io_lsu_pkt_r_unsign), + .io_lsu_pkt_r_valid(bus_intf_io_lsu_pkt_r_valid), + .io_lsu_addr_d(bus_intf_io_lsu_addr_d), + .io_lsu_addr_m(bus_intf_io_lsu_addr_m), + .io_lsu_addr_r(bus_intf_io_lsu_addr_r), + .io_end_addr_d(bus_intf_io_end_addr_d), + .io_end_addr_m(bus_intf_io_end_addr_m), + .io_end_addr_r(bus_intf_io_end_addr_r), + .io_store_data_r(bus_intf_io_store_data_r), + .io_dec_tlu_force_halt(bus_intf_io_dec_tlu_force_halt), + .io_lsu_commit_r(bus_intf_io_lsu_commit_r), + .io_is_sideeffects_m(bus_intf_io_is_sideeffects_m), + .io_flush_m_up(bus_intf_io_flush_m_up), + .io_flush_r(bus_intf_io_flush_r), + .io_lsu_axi_awready(bus_intf_io_lsu_axi_awready), + .io_lsu_axi_wready(bus_intf_io_lsu_axi_wready), + .io_lsu_axi_bvalid(bus_intf_io_lsu_axi_bvalid), + .io_lsu_axi_bresp(bus_intf_io_lsu_axi_bresp), + .io_lsu_axi_bid(bus_intf_io_lsu_axi_bid), + .io_lsu_axi_arready(bus_intf_io_lsu_axi_arready), + .io_lsu_axi_rvalid(bus_intf_io_lsu_axi_rvalid), + .io_lsu_axi_rid(bus_intf_io_lsu_axi_rid), + .io_lsu_axi_rdata(bus_intf_io_lsu_axi_rdata), + .io_lsu_bus_clk_en(bus_intf_io_lsu_bus_clk_en), + .io_lsu_busreq_r(bus_intf_io_lsu_busreq_r), + .io_lsu_bus_buffer_pend_any(bus_intf_io_lsu_bus_buffer_pend_any), + .io_lsu_bus_buffer_full_any(bus_intf_io_lsu_bus_buffer_full_any), + .io_lsu_bus_buffer_empty_any(bus_intf_io_lsu_bus_buffer_empty_any), + .io_bus_read_data_m(bus_intf_io_bus_read_data_m), + .io_lsu_imprecise_error_load_any(bus_intf_io_lsu_imprecise_error_load_any), + .io_lsu_imprecise_error_store_any(bus_intf_io_lsu_imprecise_error_store_any), + .io_lsu_imprecise_error_addr_any(bus_intf_io_lsu_imprecise_error_addr_any), + .io_lsu_nonblock_load_valid_m(bus_intf_io_lsu_nonblock_load_valid_m), + .io_lsu_nonblock_load_tag_m(bus_intf_io_lsu_nonblock_load_tag_m), + .io_lsu_nonblock_load_inv_r(bus_intf_io_lsu_nonblock_load_inv_r), + .io_lsu_nonblock_load_inv_tag_r(bus_intf_io_lsu_nonblock_load_inv_tag_r), + .io_lsu_nonblock_load_data_valid(bus_intf_io_lsu_nonblock_load_data_valid), + .io_lsu_nonblock_load_data_error(bus_intf_io_lsu_nonblock_load_data_error), + .io_lsu_nonblock_load_data_tag(bus_intf_io_lsu_nonblock_load_data_tag), + .io_lsu_nonblock_load_data(bus_intf_io_lsu_nonblock_load_data), + .io_lsu_pmu_bus_trxn(bus_intf_io_lsu_pmu_bus_trxn), + .io_lsu_pmu_bus_misaligned(bus_intf_io_lsu_pmu_bus_misaligned), + .io_lsu_pmu_bus_error(bus_intf_io_lsu_pmu_bus_error), + .io_lsu_pmu_bus_busy(bus_intf_io_lsu_pmu_bus_busy), + .io_lsu_axi_awvalid(bus_intf_io_lsu_axi_awvalid), + .io_lsu_axi_awid(bus_intf_io_lsu_axi_awid), + .io_lsu_axi_awaddr(bus_intf_io_lsu_axi_awaddr), + .io_lsu_axi_awregion(bus_intf_io_lsu_axi_awregion), + .io_lsu_axi_awsize(bus_intf_io_lsu_axi_awsize), + .io_lsu_axi_awcache(bus_intf_io_lsu_axi_awcache), + .io_lsu_axi_wvalid(bus_intf_io_lsu_axi_wvalid), + .io_lsu_axi_wdata(bus_intf_io_lsu_axi_wdata), + .io_lsu_axi_wstrb(bus_intf_io_lsu_axi_wstrb), + .io_lsu_axi_arvalid(bus_intf_io_lsu_axi_arvalid), + .io_lsu_axi_arid(bus_intf_io_lsu_axi_arid), + .io_lsu_axi_araddr(bus_intf_io_lsu_axi_araddr), + .io_lsu_axi_arregion(bus_intf_io_lsu_axi_arregion), + .io_lsu_axi_arsize(bus_intf_io_lsu_axi_arsize), + .io_lsu_axi_arcache(bus_intf_io_lsu_axi_arcache) + ); + assign io_lsu_load_stall_any = bus_intf_io_lsu_bus_buffer_full_any | dccm_ctl_io_ld_single_ecc_error_r_ff; // @[el2_lsu.scala 167:25] + assign io_lsu_store_stall_any = _T | dccm_ctl_io_ld_single_ecc_error_r_ff; // @[el2_lsu.scala 166:26] + assign io_lsu_fastint_stall_any = dccm_ctl_io_ld_single_ecc_error_r; // @[el2_lsu.scala 168:28] + assign io_lsu_idle_any = _T_22 & bus_intf_io_lsu_bus_buffer_empty_any; // @[el2_lsu.scala 188:19] + assign io_lsu_fir_addr = {{1'd0}, lsu_lsc_ctl_io_lsu_fir_addr}; // @[el2_lsu.scala 234:49] + assign io_lsu_fir_error = lsu_lsc_ctl_io_lsu_fir_error; // @[el2_lsu.scala 235:49] + assign io_lsu_single_ecc_error_incr = lsu_lsc_ctl_io_lsu_single_ecc_error_incr; // @[el2_lsu.scala 232:49] + assign io_lsu_error_pkt_r_exc_valid = lsu_lsc_ctl_io_lsu_error_pkt_r_exc_valid; // @[el2_lsu.scala 233:49] + assign io_lsu_error_pkt_r_single_ecc_error = lsu_lsc_ctl_io_lsu_error_pkt_r_single_ecc_error; // @[el2_lsu.scala 233:49] + assign io_lsu_error_pkt_r_inst_type = lsu_lsc_ctl_io_lsu_error_pkt_r_inst_type; // @[el2_lsu.scala 233:49] + assign io_lsu_error_pkt_r_exc_type = lsu_lsc_ctl_io_lsu_error_pkt_r_exc_type; // @[el2_lsu.scala 233:49] + assign io_lsu_error_pkt_r_mscause = lsu_lsc_ctl_io_lsu_error_pkt_r_mscause; // @[el2_lsu.scala 233:49] + assign io_lsu_error_pkt_r_addr = lsu_lsc_ctl_io_lsu_error_pkt_r_addr; // @[el2_lsu.scala 233:49] + assign io_lsu_imprecise_error_load_any = bus_intf_io_lsu_imprecise_error_load_any; // @[el2_lsu.scala 434:49] + assign io_lsu_imprecise_error_store_any = bus_intf_io_lsu_imprecise_error_store_any; // @[el2_lsu.scala 435:49] + assign io_lsu_imprecise_error_addr_any = bus_intf_io_lsu_imprecise_error_addr_any; // @[el2_lsu.scala 436:49] + assign io_lsu_nonblock_load_valid_m = bus_intf_io_lsu_nonblock_load_valid_m; // @[el2_lsu.scala 437:49] + assign io_lsu_nonblock_load_tag_m = bus_intf_io_lsu_nonblock_load_tag_m; // @[el2_lsu.scala 438:49] + assign io_lsu_nonblock_load_inv_r = bus_intf_io_lsu_nonblock_load_inv_r; // @[el2_lsu.scala 439:49] + assign io_lsu_nonblock_load_inv_tag_r = bus_intf_io_lsu_nonblock_load_inv_tag_r; // @[el2_lsu.scala 440:49] + assign io_lsu_nonblock_load_data_valid = bus_intf_io_lsu_nonblock_load_data_valid; // @[el2_lsu.scala 441:49] + assign io_lsu_nonblock_load_data_error = bus_intf_io_lsu_nonblock_load_data_error; // @[el2_lsu.scala 442:49] + assign io_lsu_nonblock_load_data_tag = bus_intf_io_lsu_nonblock_load_data_tag; // @[el2_lsu.scala 443:49] + assign io_lsu_nonblock_load_data = bus_intf_io_lsu_nonblock_load_data; // @[el2_lsu.scala 444:49] + assign io_lsu_pmu_load_external_m = _T_48 & lsu_lsc_ctl_io_addr_external_m; // @[el2_lsu.scala 197:31] + assign io_lsu_pmu_store_external_m = _T_50 & lsu_lsc_ctl_io_addr_external_m; // @[el2_lsu.scala 198:31] + assign io_lsu_pmu_misaligned_m = lsu_lsc_ctl_io_lsu_pkt_m_valid & _T_46; // @[el2_lsu.scala 196:27] + assign io_lsu_pmu_bus_trxn = bus_intf_io_lsu_pmu_bus_trxn; // @[el2_lsu.scala 445:49] + assign io_lsu_pmu_bus_misaligned = bus_intf_io_lsu_pmu_bus_misaligned; // @[el2_lsu.scala 446:49] + assign io_lsu_pmu_bus_error = bus_intf_io_lsu_pmu_bus_error; // @[el2_lsu.scala 447:49] + assign io_lsu_pmu_bus_busy = bus_intf_io_lsu_pmu_bus_busy; // @[el2_lsu.scala 448:49] + assign io_lsu_trigger_match_m = trigger_io_lsu_trigger_match_m; // @[el2_lsu.scala 379:50] + assign io_dccm_wren = dccm_ctl_io_dccm_wren; // @[el2_lsu.scala 301:49] + assign io_dccm_rden = dccm_ctl_io_dccm_rden; // @[el2_lsu.scala 302:49] + assign io_dccm_wr_addr_lo = dccm_ctl_io_dccm_wr_addr_lo; // @[el2_lsu.scala 303:49] + assign io_dccm_wr_addr_hi = dccm_ctl_io_dccm_wr_addr_hi; // @[el2_lsu.scala 306:49] + assign io_dccm_rd_addr_lo = dccm_ctl_io_dccm_rd_addr_lo; // @[el2_lsu.scala 305:49] + assign io_dccm_rd_addr_hi = dccm_ctl_io_dccm_rd_addr_hi; // @[el2_lsu.scala 308:49] + assign io_dccm_wr_data_lo = dccm_ctl_io_dccm_wr_data_lo; // @[el2_lsu.scala 304:49] + assign io_dccm_wr_data_hi = dccm_ctl_io_dccm_wr_data_hi; // @[el2_lsu.scala 307:49] + assign io_picm_wren = dccm_ctl_io_picm_wren; // @[el2_lsu.scala 309:49] + assign io_picm_rden = dccm_ctl_io_picm_rden; // @[el2_lsu.scala 310:49] + assign io_picm_mken = dccm_ctl_io_picm_mken; // @[el2_lsu.scala 311:49] + assign io_picm_rdaddr = dccm_ctl_io_picm_rdaddr; // @[el2_lsu.scala 312:49] + assign io_picm_wraddr = dccm_ctl_io_picm_wraddr; // @[el2_lsu.scala 313:49] + assign io_picm_wr_data = dccm_ctl_io_picm_wr_data; // @[el2_lsu.scala 314:49] + assign io_lsu_axi_awvalid = bus_intf_io_lsu_axi_awvalid; // @[el2_lsu.scala 449:49] + assign io_lsu_axi_awlock = 1'h0; // @[el2_lsu.scala 457:49] + assign io_lsu_axi_awid = bus_intf_io_lsu_axi_awid; // @[el2_lsu.scala 451:49] + assign io_lsu_axi_awaddr = bus_intf_io_lsu_axi_awaddr; // @[el2_lsu.scala 452:49] + assign io_lsu_axi_awregion = bus_intf_io_lsu_axi_awregion; // @[el2_lsu.scala 453:49] + assign io_lsu_axi_awlen = 8'h0; // @[el2_lsu.scala 454:49] + assign io_lsu_axi_awsize = bus_intf_io_lsu_axi_awsize; // @[el2_lsu.scala 455:49] + assign io_lsu_axi_awburst = 2'h1; // @[el2_lsu.scala 456:49] + assign io_lsu_axi_awcache = bus_intf_io_lsu_axi_awcache; // @[el2_lsu.scala 458:49] + assign io_lsu_axi_awprot = 3'h0; // @[el2_lsu.scala 459:49] + assign io_lsu_axi_awqos = 4'h0; // @[el2_lsu.scala 460:49] + assign io_lsu_axi_wvalid = bus_intf_io_lsu_axi_wvalid; // @[el2_lsu.scala 461:49] + assign io_lsu_axi_wdata = bus_intf_io_lsu_axi_wdata; // @[el2_lsu.scala 463:49] + assign io_lsu_axi_wstrb = bus_intf_io_lsu_axi_wstrb; // @[el2_lsu.scala 464:49] + assign io_lsu_axi_wlast = 1'h1; // @[el2_lsu.scala 465:49] + assign io_lsu_axi_bready = 1'h1; // @[el2_lsu.scala 467:49] + assign io_lsu_axi_arvalid = bus_intf_io_lsu_axi_arvalid; // @[el2_lsu.scala 470:49] + assign io_lsu_axi_arlock = 1'h0; // @[el2_lsu.scala 478:49] + assign io_lsu_axi_arid = bus_intf_io_lsu_axi_arid; // @[el2_lsu.scala 472:49] + assign io_lsu_axi_araddr = bus_intf_io_lsu_axi_araddr; // @[el2_lsu.scala 473:49] + assign io_lsu_axi_arregion = bus_intf_io_lsu_axi_arregion; // @[el2_lsu.scala 474:49] + assign io_lsu_axi_arlen = 8'h0; // @[el2_lsu.scala 475:49] + assign io_lsu_axi_arsize = bus_intf_io_lsu_axi_arsize; // @[el2_lsu.scala 476:49] + assign io_lsu_axi_arburst = 2'h1; // @[el2_lsu.scala 477:49] + assign io_lsu_axi_arcache = bus_intf_io_lsu_axi_arcache; // @[el2_lsu.scala 479:49] + assign io_lsu_axi_arprot = 3'h0; // @[el2_lsu.scala 480:49] + assign io_lsu_axi_arqos = 4'h0; // @[el2_lsu.scala 481:49] + assign io_lsu_axi_rready = 1'h1; // @[el2_lsu.scala 483:49] + assign io_dccm_dma_rvalid = dccm_ctl_io_dccm_dma_rvalid; // @[el2_lsu.scala 297:49] + assign io_dccm_dma_ecc_error = dccm_ctl_io_dccm_dma_ecc_error; // @[el2_lsu.scala 298:49] + assign io_dccm_dma_rtag = dccm_ctl_io_dccm_dma_rtag; // @[el2_lsu.scala 299:49] + assign io_dccm_dma_rdata = dccm_ctl_io_dccm_dma_rdata; // @[el2_lsu.scala 300:49] + assign io_dccm_ready = ~_T_8; // @[el2_lsu.scala 174:17] + assign lsu_lsc_ctl_reset = reset; + assign lsu_lsc_ctl_io_lsu_c1_m_clk = clkdomain_io_lsu_c1_m_clk; // @[el2_lsu.scala 202:46] + assign lsu_lsc_ctl_io_lsu_c1_r_clk = clkdomain_io_lsu_c1_r_clk; // @[el2_lsu.scala 203:46] + assign lsu_lsc_ctl_io_lsu_c2_m_clk = clkdomain_io_lsu_c2_m_clk; // @[el2_lsu.scala 204:46] + assign lsu_lsc_ctl_io_lsu_c2_r_clk = clkdomain_io_lsu_c2_r_clk; // @[el2_lsu.scala 205:46] + assign lsu_lsc_ctl_io_lsu_store_c1_m_clk = clkdomain_io_lsu_store_c1_m_clk; // @[el2_lsu.scala 206:46] + assign lsu_lsc_ctl_io_lsu_ld_data_corr_r = dccm_ctl_io_lsu_ld_data_corr_r; // @[el2_lsu.scala 208:46] + assign lsu_lsc_ctl_io_lsu_single_ecc_error_r = ecc_io_lsu_single_ecc_error_r; // @[el2_lsu.scala 209:46] + assign lsu_lsc_ctl_io_lsu_double_ecc_error_r = ecc_io_lsu_double_ecc_error_r; // @[el2_lsu.scala 210:46] + assign lsu_lsc_ctl_io_lsu_ld_data_m = dccm_ctl_io_lsu_ld_data_m; // @[el2_lsu.scala 211:46] + assign lsu_lsc_ctl_io_lsu_single_ecc_error_m = ecc_io_lsu_single_ecc_error_m; // @[el2_lsu.scala 212:46] + assign lsu_lsc_ctl_io_lsu_double_ecc_error_m = ecc_io_lsu_double_ecc_error_m; // @[el2_lsu.scala 213:46] + assign lsu_lsc_ctl_io_flush_m_up = io_dec_tlu_flush_lower_r; // @[el2_lsu.scala 214:46] + assign lsu_lsc_ctl_io_flush_r = io_dec_tlu_i0_kill_writeb_r; // @[el2_lsu.scala 215:46] + assign lsu_lsc_ctl_io_exu_lsu_rs1_d = io_exu_lsu_rs1_d; // @[el2_lsu.scala 216:46] + assign lsu_lsc_ctl_io_exu_lsu_rs2_d = io_exu_lsu_rs2_d; // @[el2_lsu.scala 217:46] + assign lsu_lsc_ctl_io_lsu_p_fast_int = io_lsu_p_fast_int; // @[el2_lsu.scala 218:46] + assign lsu_lsc_ctl_io_lsu_p_by = io_lsu_p_by; // @[el2_lsu.scala 218:46] + assign lsu_lsc_ctl_io_lsu_p_half = io_lsu_p_half; // @[el2_lsu.scala 218:46] + assign lsu_lsc_ctl_io_lsu_p_word = io_lsu_p_word; // @[el2_lsu.scala 218:46] + assign lsu_lsc_ctl_io_lsu_p_dword = io_lsu_p_dword; // @[el2_lsu.scala 218:46] + assign lsu_lsc_ctl_io_lsu_p_load = io_lsu_p_load; // @[el2_lsu.scala 218:46] + assign lsu_lsc_ctl_io_lsu_p_store = io_lsu_p_store; // @[el2_lsu.scala 218:46] + assign lsu_lsc_ctl_io_lsu_p_unsign = io_lsu_p_unsign; // @[el2_lsu.scala 218:46] + assign lsu_lsc_ctl_io_lsu_p_dma = io_lsu_p_dma; // @[el2_lsu.scala 218:46] + assign lsu_lsc_ctl_io_lsu_p_store_data_bypass_d = io_lsu_p_store_data_bypass_d; // @[el2_lsu.scala 218:46] + assign lsu_lsc_ctl_io_lsu_p_load_ldst_bypass_d = io_lsu_p_load_ldst_bypass_d; // @[el2_lsu.scala 218:46] + assign lsu_lsc_ctl_io_lsu_p_store_data_bypass_m = io_lsu_p_store_data_bypass_m; // @[el2_lsu.scala 218:46] + assign lsu_lsc_ctl_io_lsu_p_valid = io_lsu_p_valid; // @[el2_lsu.scala 218:46] + assign lsu_lsc_ctl_io_dec_lsu_valid_raw_d = io_dec_lsu_valid_raw_d; // @[el2_lsu.scala 219:46] + assign lsu_lsc_ctl_io_dec_lsu_offset_d = io_dec_lsu_offset_d; // @[el2_lsu.scala 220:46] + assign lsu_lsc_ctl_io_picm_mask_data_m = dccm_ctl_io_picm_mask_data_m; // @[el2_lsu.scala 221:46] + assign lsu_lsc_ctl_io_bus_read_data_m = bus_intf_io_bus_read_data_m; // @[el2_lsu.scala 222:46] + assign lsu_lsc_ctl_io_dec_tlu_mrac_ff = io_dec_tlu_mrac_ff; // @[el2_lsu.scala 228:46] + assign lsu_lsc_ctl_io_dma_dccm_req = io_dma_dccm_req; // @[el2_lsu.scala 223:46] + assign lsu_lsc_ctl_io_dma_mem_addr = io_dma_mem_addr; // @[el2_lsu.scala 224:46] + assign lsu_lsc_ctl_io_dma_mem_sz = io_dma_mem_sz; // @[el2_lsu.scala 225:46] + assign lsu_lsc_ctl_io_dma_mem_write = io_dma_mem_write; // @[el2_lsu.scala 226:46] + assign lsu_lsc_ctl_io_dma_mem_wdata = io_dma_mem_wdata; // @[el2_lsu.scala 227:46] + assign dccm_ctl_clock = clock; + assign dccm_ctl_reset = reset; + assign dccm_ctl_io_lsu_c2_m_clk = clkdomain_io_lsu_c2_m_clk; // @[el2_lsu.scala 238:46] + assign dccm_ctl_io_lsu_c2_r_clk = clkdomain_io_lsu_c2_m_clk; // @[el2_lsu.scala 239:46] + assign dccm_ctl_io_lsu_free_c2_clk = clkdomain_io_lsu_c2_r_clk; // @[el2_lsu.scala 240:46] + assign dccm_ctl_io_lsu_store_c1_r_clk = clkdomain_io_lsu_c1_r_clk; // @[el2_lsu.scala 242:46] + assign dccm_ctl_io_lsu_pkt_d_word = lsu_lsc_ctl_io_lsu_pkt_d_word; // @[el2_lsu.scala 244:46] + assign dccm_ctl_io_lsu_pkt_d_dword = lsu_lsc_ctl_io_lsu_pkt_d_dword; // @[el2_lsu.scala 244:46] + assign dccm_ctl_io_lsu_pkt_d_load = lsu_lsc_ctl_io_lsu_pkt_d_load; // @[el2_lsu.scala 244:46] + assign dccm_ctl_io_lsu_pkt_d_store = lsu_lsc_ctl_io_lsu_pkt_d_store; // @[el2_lsu.scala 244:46] + assign dccm_ctl_io_lsu_pkt_d_dma = lsu_lsc_ctl_io_lsu_pkt_d_dma; // @[el2_lsu.scala 244:46] + assign dccm_ctl_io_lsu_pkt_d_valid = lsu_lsc_ctl_io_lsu_pkt_d_valid; // @[el2_lsu.scala 244:46] + assign dccm_ctl_io_lsu_pkt_m_by = lsu_lsc_ctl_io_lsu_pkt_m_by; // @[el2_lsu.scala 245:46] + assign dccm_ctl_io_lsu_pkt_m_half = lsu_lsc_ctl_io_lsu_pkt_m_half; // @[el2_lsu.scala 245:46] + assign dccm_ctl_io_lsu_pkt_m_word = lsu_lsc_ctl_io_lsu_pkt_m_word; // @[el2_lsu.scala 245:46] + assign dccm_ctl_io_lsu_pkt_m_load = lsu_lsc_ctl_io_lsu_pkt_m_load; // @[el2_lsu.scala 245:46] + assign dccm_ctl_io_lsu_pkt_m_store = lsu_lsc_ctl_io_lsu_pkt_m_store; // @[el2_lsu.scala 245:46] + assign dccm_ctl_io_lsu_pkt_m_dma = lsu_lsc_ctl_io_lsu_pkt_m_dma; // @[el2_lsu.scala 245:46] + assign dccm_ctl_io_lsu_pkt_m_valid = lsu_lsc_ctl_io_lsu_pkt_m_valid; // @[el2_lsu.scala 245:46] + assign dccm_ctl_io_lsu_pkt_r_by = lsu_lsc_ctl_io_lsu_pkt_r_by; // @[el2_lsu.scala 246:46] + assign dccm_ctl_io_lsu_pkt_r_half = lsu_lsc_ctl_io_lsu_pkt_r_half; // @[el2_lsu.scala 246:46] + assign dccm_ctl_io_lsu_pkt_r_word = lsu_lsc_ctl_io_lsu_pkt_r_word; // @[el2_lsu.scala 246:46] + assign dccm_ctl_io_lsu_pkt_r_load = lsu_lsc_ctl_io_lsu_pkt_r_load; // @[el2_lsu.scala 246:46] + assign dccm_ctl_io_lsu_pkt_r_store = lsu_lsc_ctl_io_lsu_pkt_r_store; // @[el2_lsu.scala 246:46] + assign dccm_ctl_io_lsu_pkt_r_dma = lsu_lsc_ctl_io_lsu_pkt_r_dma; // @[el2_lsu.scala 246:46] + assign dccm_ctl_io_lsu_pkt_r_valid = lsu_lsc_ctl_io_lsu_pkt_r_valid; // @[el2_lsu.scala 246:46] + assign dccm_ctl_io_addr_in_dccm_d = lsu_lsc_ctl_io_addr_in_dccm_d; // @[el2_lsu.scala 247:46] + assign dccm_ctl_io_addr_in_dccm_m = lsu_lsc_ctl_io_addr_in_dccm_m; // @[el2_lsu.scala 248:46] + assign dccm_ctl_io_addr_in_dccm_r = lsu_lsc_ctl_io_addr_in_dccm_r; // @[el2_lsu.scala 249:46] + assign dccm_ctl_io_addr_in_pic_d = lsu_lsc_ctl_io_addr_in_pic_d; // @[el2_lsu.scala 250:46] + assign dccm_ctl_io_addr_in_pic_m = lsu_lsc_ctl_io_addr_in_pic_m; // @[el2_lsu.scala 251:46] + assign dccm_ctl_io_addr_in_pic_r = lsu_lsc_ctl_io_addr_in_pic_r; // @[el2_lsu.scala 252:46] + assign dccm_ctl_io_lsu_raw_fwd_lo_r = lsu_raw_fwd_lo_r; // @[el2_lsu.scala 253:46] + assign dccm_ctl_io_lsu_raw_fwd_hi_r = lsu_raw_fwd_hi_r; // @[el2_lsu.scala 254:46] + assign dccm_ctl_io_lsu_commit_r = lsu_lsc_ctl_io_lsu_commit_r; // @[el2_lsu.scala 255:46] + assign dccm_ctl_io_lsu_addr_d = lsu_lsc_ctl_io_lsu_addr_d; // @[el2_lsu.scala 256:46] + assign dccm_ctl_io_lsu_addr_m = lsu_lsc_ctl_io_lsu_addr_m[15:0]; // @[el2_lsu.scala 257:46] + assign dccm_ctl_io_lsu_addr_r = lsu_lsc_ctl_io_lsu_addr_r; // @[el2_lsu.scala 258:46] + assign dccm_ctl_io_end_addr_d = lsu_lsc_ctl_io_end_addr_d[15:0]; // @[el2_lsu.scala 259:46] + assign dccm_ctl_io_end_addr_m = lsu_lsc_ctl_io_end_addr_m[15:0]; // @[el2_lsu.scala 260:46] + assign dccm_ctl_io_end_addr_r = lsu_lsc_ctl_io_end_addr_r[15:0]; // @[el2_lsu.scala 261:46] + assign dccm_ctl_io_stbuf_reqvld_any = stbuf_io_stbuf_reqvld_any; // @[el2_lsu.scala 262:46] + assign dccm_ctl_io_stbuf_addr_any = stbuf_io_stbuf_addr_any; // @[el2_lsu.scala 263:46] + assign dccm_ctl_io_stbuf_data_any = stbuf_io_stbuf_data_any; // @[el2_lsu.scala 264:46] + assign dccm_ctl_io_stbuf_ecc_any = ecc_io_stbuf_ecc_any; // @[el2_lsu.scala 265:46] + assign dccm_ctl_io_stbuf_fwddata_hi_m = stbuf_io_stbuf_fwddata_hi_m; // @[el2_lsu.scala 266:46] + assign dccm_ctl_io_stbuf_fwddata_lo_m = stbuf_io_stbuf_fwddata_lo_m; // @[el2_lsu.scala 267:46] + assign dccm_ctl_io_stbuf_fwdbyteen_lo_m = stbuf_io_stbuf_fwdbyteen_lo_m; // @[el2_lsu.scala 268:46] + assign dccm_ctl_io_stbuf_fwdbyteen_hi_m = stbuf_io_stbuf_fwdbyteen_hi_m; // @[el2_lsu.scala 269:46] + assign dccm_ctl_io_lsu_double_ecc_error_r = ecc_io_lsu_double_ecc_error_r; // @[el2_lsu.scala 270:46] + assign dccm_ctl_io_single_ecc_error_hi_r = ecc_io_single_ecc_error_hi_r; // @[el2_lsu.scala 271:46] + assign dccm_ctl_io_single_ecc_error_lo_r = ecc_io_single_ecc_error_lo_r; // @[el2_lsu.scala 272:46] + assign dccm_ctl_io_sec_data_hi_r_ff = ecc_io_sec_data_hi_r_ff; // @[el2_lsu.scala 275:46] + assign dccm_ctl_io_sec_data_lo_r_ff = ecc_io_sec_data_lo_r_ff; // @[el2_lsu.scala 276:46] + assign dccm_ctl_io_sec_data_ecc_hi_r_ff = ecc_io_sec_data_ecc_hi_r_ff; // @[el2_lsu.scala 277:46] + assign dccm_ctl_io_sec_data_ecc_lo_r_ff = ecc_io_sec_data_ecc_lo_r_ff; // @[el2_lsu.scala 278:46] + assign dccm_ctl_io_lsu_double_ecc_error_m = ecc_io_lsu_double_ecc_error_m; // @[el2_lsu.scala 279:46] + assign dccm_ctl_io_sec_data_hi_m = ecc_io_sec_data_hi_m; // @[el2_lsu.scala 280:46] + assign dccm_ctl_io_sec_data_lo_m = ecc_io_sec_data_lo_m; // @[el2_lsu.scala 281:46] + assign dccm_ctl_io_store_data_m = lsu_lsc_ctl_io_store_data_m; // @[el2_lsu.scala 282:46] + assign dccm_ctl_io_dma_dccm_wen = _T_10 & lsu_lsc_ctl_io_addr_in_dccm_d; // @[el2_lsu.scala 283:46] + assign dccm_ctl_io_dma_pic_wen = _T_10 & lsu_lsc_ctl_io_addr_in_pic_d; // @[el2_lsu.scala 284:46] + assign dccm_ctl_io_dma_mem_tag_m = dma_mem_tag_m[2:0]; // @[el2_lsu.scala 285:46] + assign dccm_ctl_io_dma_mem_addr = io_dma_mem_addr; // @[el2_lsu.scala 286:46] + assign dccm_ctl_io_dma_mem_wdata = io_dma_mem_wdata; // @[el2_lsu.scala 287:46] + assign dccm_ctl_io_dma_dccm_wdata_lo = dma_dccm_wdata[31:0]; // @[el2_lsu.scala 288:46] + assign dccm_ctl_io_dma_dccm_wdata_hi = dma_dccm_wdata[63:32]; // @[el2_lsu.scala 289:46] + assign dccm_ctl_io_dma_dccm_wdata_ecc_hi = ecc_io_dma_dccm_wdata_ecc_hi; // @[el2_lsu.scala 290:46] + assign dccm_ctl_io_dma_dccm_wdata_ecc_lo = ecc_io_dma_dccm_wdata_ecc_lo; // @[el2_lsu.scala 291:46] + assign dccm_ctl_io_dccm_rd_data_lo = io_dccm_rd_data_lo; // @[el2_lsu.scala 292:46] + assign dccm_ctl_io_dccm_rd_data_hi = io_dccm_rd_data_hi; // @[el2_lsu.scala 293:46] + assign dccm_ctl_io_picm_rd_data = io_picm_rd_data; // @[el2_lsu.scala 294:46] + assign dccm_ctl_io_scan_mode = io_scan_mode; // @[el2_lsu.scala 295:46] + assign stbuf_clock = clock; + assign stbuf_reset = reset; + assign stbuf_io_lsu_c1_m_clk = clkdomain_io_lsu_c1_m_clk; // @[el2_lsu.scala 317:49] + assign stbuf_io_lsu_c1_r_clk = clkdomain_io_lsu_c1_m_clk; // @[el2_lsu.scala 318:48] + assign stbuf_io_lsu_stbuf_c1_clk = clkdomain_io_lsu_stbuf_c1_clk; // @[el2_lsu.scala 319:54] + assign stbuf_io_lsu_free_c2_clk = clkdomain_io_lsu_free_c2_clk; // @[el2_lsu.scala 320:54] + assign stbuf_io_lsu_pkt_m_store = lsu_lsc_ctl_io_lsu_pkt_m_store; // @[el2_lsu.scala 321:48] + assign stbuf_io_lsu_pkt_m_dma = lsu_lsc_ctl_io_lsu_pkt_m_dma; // @[el2_lsu.scala 321:48] + assign stbuf_io_lsu_pkt_m_valid = lsu_lsc_ctl_io_lsu_pkt_m_valid; // @[el2_lsu.scala 321:48] + assign stbuf_io_lsu_pkt_r_by = lsu_lsc_ctl_io_lsu_pkt_r_by; // @[el2_lsu.scala 322:48] + assign stbuf_io_lsu_pkt_r_half = lsu_lsc_ctl_io_lsu_pkt_r_half; // @[el2_lsu.scala 322:48] + assign stbuf_io_lsu_pkt_r_word = lsu_lsc_ctl_io_lsu_pkt_r_word; // @[el2_lsu.scala 322:48] + assign stbuf_io_lsu_pkt_r_dword = lsu_lsc_ctl_io_lsu_pkt_r_dword; // @[el2_lsu.scala 322:48] + assign stbuf_io_lsu_pkt_r_store = lsu_lsc_ctl_io_lsu_pkt_r_store; // @[el2_lsu.scala 322:48] + assign stbuf_io_lsu_pkt_r_dma = lsu_lsc_ctl_io_lsu_pkt_r_dma; // @[el2_lsu.scala 322:48] + assign stbuf_io_lsu_pkt_r_valid = lsu_lsc_ctl_io_lsu_pkt_r_valid; // @[el2_lsu.scala 322:48] + assign stbuf_io_store_stbuf_reqvld_r = _T_28 & _T_19; // @[el2_lsu.scala 323:48] + assign stbuf_io_lsu_commit_r = lsu_lsc_ctl_io_lsu_commit_r; // @[el2_lsu.scala 324:49] + assign stbuf_io_dec_lsu_valid_raw_d = io_dec_lsu_valid_raw_d; // @[el2_lsu.scala 325:49] + assign stbuf_io_store_data_hi_r = dccm_ctl_io_store_data_hi_r; // @[el2_lsu.scala 326:62] + assign stbuf_io_store_data_lo_r = dccm_ctl_io_store_data_lo_r; // @[el2_lsu.scala 327:62] + assign stbuf_io_store_datafn_hi_r = dccm_ctl_io_store_datafn_hi_r; // @[el2_lsu.scala 328:49] + assign stbuf_io_store_datafn_lo_r = dccm_ctl_io_store_datafn_lo_r; // @[el2_lsu.scala 329:56] + assign stbuf_io_lsu_stbuf_commit_any = dccm_ctl_io_lsu_stbuf_commit_any; // @[el2_lsu.scala 330:52] + assign stbuf_io_lsu_addr_d = lsu_lsc_ctl_io_lsu_addr_d[15:0]; // @[el2_lsu.scala 331:64] + assign stbuf_io_lsu_addr_m = lsu_lsc_ctl_io_lsu_addr_m; // @[el2_lsu.scala 332:64] + assign stbuf_io_lsu_addr_r = lsu_lsc_ctl_io_lsu_addr_r; // @[el2_lsu.scala 333:64] + assign stbuf_io_end_addr_d = lsu_lsc_ctl_io_end_addr_d[15:0]; // @[el2_lsu.scala 334:64] + assign stbuf_io_end_addr_m = lsu_lsc_ctl_io_end_addr_m; // @[el2_lsu.scala 335:64] + assign stbuf_io_end_addr_r = lsu_lsc_ctl_io_end_addr_r; // @[el2_lsu.scala 336:64] + assign stbuf_io_addr_in_dccm_m = lsu_lsc_ctl_io_addr_in_dccm_m; // @[el2_lsu.scala 337:49] + assign stbuf_io_addr_in_dccm_r = lsu_lsc_ctl_io_addr_in_dccm_r; // @[el2_lsu.scala 338:56] + assign stbuf_io_scan_mode = io_scan_mode; // @[el2_lsu.scala 340:49] + assign ecc_clock = clock; + assign ecc_reset = reset; + assign ecc_io_lsu_c2_r_clk = clkdomain_io_lsu_c2_r_clk; // @[el2_lsu.scala 344:52] + assign ecc_io_lsu_pkt_m_load = lsu_lsc_ctl_io_lsu_pkt_m_load; // @[el2_lsu.scala 345:52] + assign ecc_io_lsu_pkt_m_store = lsu_lsc_ctl_io_lsu_pkt_m_store; // @[el2_lsu.scala 345:52] + assign ecc_io_lsu_pkt_m_dma = lsu_lsc_ctl_io_lsu_pkt_m_dma; // @[el2_lsu.scala 345:52] + assign ecc_io_lsu_pkt_m_valid = lsu_lsc_ctl_io_lsu_pkt_m_valid; // @[el2_lsu.scala 345:52] + assign ecc_io_stbuf_data_any = stbuf_io_stbuf_data_any; // @[el2_lsu.scala 347:54] + assign ecc_io_dec_tlu_core_ecc_disable = io_dec_tlu_core_ecc_disable; // @[el2_lsu.scala 348:50] + assign ecc_io_lsu_addr_m = lsu_lsc_ctl_io_lsu_addr_m[15:0]; // @[el2_lsu.scala 353:58] + assign ecc_io_end_addr_m = lsu_lsc_ctl_io_end_addr_m[15:0]; // @[el2_lsu.scala 354:58] + assign ecc_io_dccm_rdata_hi_m = dccm_ctl_io_dccm_rdata_hi_m; // @[el2_lsu.scala 357:54] + assign ecc_io_dccm_rdata_lo_m = dccm_ctl_io_dccm_rdata_lo_m; // @[el2_lsu.scala 358:54] + assign ecc_io_dccm_data_ecc_hi_m = dccm_ctl_io_dccm_data_ecc_hi_m; // @[el2_lsu.scala 361:50] + assign ecc_io_dccm_data_ecc_lo_m = dccm_ctl_io_dccm_data_ecc_lo_m; // @[el2_lsu.scala 362:50] + assign ecc_io_ld_single_ecc_error_r = dccm_ctl_io_ld_single_ecc_error_r; // @[el2_lsu.scala 363:50] + assign ecc_io_ld_single_ecc_error_r_ff = dccm_ctl_io_ld_single_ecc_error_r_ff; // @[el2_lsu.scala 364:50] + assign ecc_io_lsu_dccm_rden_m = dccm_ctl_io_lsu_dccm_rden_m; // @[el2_lsu.scala 365:50] + assign ecc_io_addr_in_dccm_m = lsu_lsc_ctl_io_addr_in_dccm_m; // @[el2_lsu.scala 366:50] + assign ecc_io_dma_dccm_wen = _T_10 & lsu_lsc_ctl_io_addr_in_dccm_d; // @[el2_lsu.scala 367:50] + assign ecc_io_dma_dccm_wdata_lo = dma_dccm_wdata[31:0]; // @[el2_lsu.scala 368:50] + assign ecc_io_dma_dccm_wdata_hi = dma_dccm_wdata[63:32]; // @[el2_lsu.scala 369:50] + assign ecc_io_scan_mode = io_scan_mode; // @[el2_lsu.scala 370:50] + assign trigger_io_trigger_pkt_any_0_select = io_trigger_pkt_any_0_select; // @[el2_lsu.scala 374:50] + assign trigger_io_trigger_pkt_any_0_match_ = io_trigger_pkt_any_0_match_; // @[el2_lsu.scala 374:50] + assign trigger_io_trigger_pkt_any_0_store = io_trigger_pkt_any_0_store; // @[el2_lsu.scala 374:50] + assign trigger_io_trigger_pkt_any_0_load = io_trigger_pkt_any_0_load; // @[el2_lsu.scala 374:50] + assign trigger_io_trigger_pkt_any_0_tdata2 = io_trigger_pkt_any_0_tdata2; // @[el2_lsu.scala 374:50] + assign trigger_io_trigger_pkt_any_1_select = io_trigger_pkt_any_1_select; // @[el2_lsu.scala 374:50] + assign trigger_io_trigger_pkt_any_1_match_ = io_trigger_pkt_any_1_match_; // @[el2_lsu.scala 374:50] + assign trigger_io_trigger_pkt_any_1_store = io_trigger_pkt_any_1_store; // @[el2_lsu.scala 374:50] + assign trigger_io_trigger_pkt_any_1_load = io_trigger_pkt_any_1_load; // @[el2_lsu.scala 374:50] + assign trigger_io_trigger_pkt_any_1_tdata2 = io_trigger_pkt_any_1_tdata2; // @[el2_lsu.scala 374:50] + assign trigger_io_trigger_pkt_any_2_select = io_trigger_pkt_any_2_select; // @[el2_lsu.scala 374:50] + assign trigger_io_trigger_pkt_any_2_match_ = io_trigger_pkt_any_2_match_; // @[el2_lsu.scala 374:50] + assign trigger_io_trigger_pkt_any_2_store = io_trigger_pkt_any_2_store; // @[el2_lsu.scala 374:50] + assign trigger_io_trigger_pkt_any_2_load = io_trigger_pkt_any_2_load; // @[el2_lsu.scala 374:50] + assign trigger_io_trigger_pkt_any_2_tdata2 = io_trigger_pkt_any_2_tdata2; // @[el2_lsu.scala 374:50] + assign trigger_io_trigger_pkt_any_3_select = io_trigger_pkt_any_3_select; // @[el2_lsu.scala 374:50] + assign trigger_io_trigger_pkt_any_3_match_ = io_trigger_pkt_any_3_match_; // @[el2_lsu.scala 374:50] + assign trigger_io_trigger_pkt_any_3_store = io_trigger_pkt_any_3_store; // @[el2_lsu.scala 374:50] + assign trigger_io_trigger_pkt_any_3_load = io_trigger_pkt_any_3_load; // @[el2_lsu.scala 374:50] + assign trigger_io_trigger_pkt_any_3_tdata2 = io_trigger_pkt_any_3_tdata2; // @[el2_lsu.scala 374:50] + assign trigger_io_lsu_pkt_m_half = lsu_lsc_ctl_io_lsu_pkt_m_half; // @[el2_lsu.scala 375:50] + assign trigger_io_lsu_pkt_m_word = lsu_lsc_ctl_io_lsu_pkt_m_word; // @[el2_lsu.scala 375:50] + assign trigger_io_lsu_pkt_m_load = lsu_lsc_ctl_io_lsu_pkt_m_load; // @[el2_lsu.scala 375:50] + assign trigger_io_lsu_pkt_m_store = lsu_lsc_ctl_io_lsu_pkt_m_store; // @[el2_lsu.scala 375:50] + assign trigger_io_lsu_pkt_m_dma = lsu_lsc_ctl_io_lsu_pkt_m_dma; // @[el2_lsu.scala 375:50] + assign trigger_io_lsu_pkt_m_valid = lsu_lsc_ctl_io_lsu_pkt_m_valid; // @[el2_lsu.scala 375:50] + assign trigger_io_lsu_addr_m = lsu_lsc_ctl_io_lsu_addr_m; // @[el2_lsu.scala 376:50] + assign trigger_io_store_data_m = lsu_lsc_ctl_io_store_data_m; // @[el2_lsu.scala 377:50] + assign clkdomain_clock = clock; + assign clkdomain_reset = reset; + assign clkdomain_io_free_clk = io_free_clk; // @[el2_lsu.scala 383:50] + assign clkdomain_io_clk_override = io_clk_override; // @[el2_lsu.scala 384:50] + assign clkdomain_io_dma_dccm_req = io_dma_dccm_req; // @[el2_lsu.scala 386:50] + assign clkdomain_io_ldst_stbuf_reqvld_r = stbuf_io_ldst_stbuf_reqvld_r; // @[el2_lsu.scala 387:50] + assign clkdomain_io_stbuf_reqvld_any = stbuf_io_stbuf_reqvld_any; // @[el2_lsu.scala 388:50] + assign clkdomain_io_stbuf_reqvld_flushed_any = stbuf_io_stbuf_reqvld_flushed_any; // @[el2_lsu.scala 389:50] + assign clkdomain_io_lsu_busreq_r = bus_intf_io_lsu_busreq_r; // @[el2_lsu.scala 390:50] + assign clkdomain_io_lsu_bus_buffer_pend_any = bus_intf_io_lsu_bus_buffer_pend_any; // @[el2_lsu.scala 391:50] + assign clkdomain_io_lsu_bus_buffer_empty_any = bus_intf_io_lsu_bus_buffer_empty_any; // @[el2_lsu.scala 392:50] + assign clkdomain_io_lsu_stbuf_empty_any = stbuf_io_lsu_stbuf_empty_any; // @[el2_lsu.scala 393:50] + assign clkdomain_io_lsu_bus_clk_en = io_lsu_bus_clk_en; // @[el2_lsu.scala 394:50] + assign clkdomain_io_lsu_p_valid = io_lsu_p_valid; // @[el2_lsu.scala 395:50] + assign clkdomain_io_lsu_pkt_d_store = lsu_lsc_ctl_io_lsu_pkt_d_store; // @[el2_lsu.scala 396:50] + assign clkdomain_io_lsu_pkt_d_valid = lsu_lsc_ctl_io_lsu_pkt_d_valid; // @[el2_lsu.scala 396:50] + assign clkdomain_io_lsu_pkt_m_store = lsu_lsc_ctl_io_lsu_pkt_m_store; // @[el2_lsu.scala 397:50] + assign clkdomain_io_lsu_pkt_m_valid = lsu_lsc_ctl_io_lsu_pkt_m_valid; // @[el2_lsu.scala 397:50] + assign clkdomain_io_lsu_pkt_r_valid = lsu_lsc_ctl_io_lsu_pkt_r_valid; // @[el2_lsu.scala 398:50] + assign clkdomain_io_scan_mode = io_scan_mode; // @[el2_lsu.scala 399:50] + assign bus_intf_clock = clock; + assign bus_intf_reset = reset; + assign bus_intf_io_scan_mode = io_scan_mode; // @[el2_lsu.scala 403:49] + assign bus_intf_io_dec_tlu_external_ldfwd_disable = io_dec_tlu_external_ldfwd_disable; // @[el2_lsu.scala 404:49] + assign bus_intf_io_dec_tlu_wb_coalescing_disable = io_dec_tlu_wb_coalescing_disable; // @[el2_lsu.scala 405:49] + assign bus_intf_io_dec_tlu_sideeffect_posted_disable = io_dec_tlu_sideeffect_posted_disable; // @[el2_lsu.scala 406:49] + assign bus_intf_io_lsu_c1_m_clk = clkdomain_io_lsu_c1_m_clk; // @[el2_lsu.scala 407:49] + assign bus_intf_io_lsu_c1_r_clk = clkdomain_io_lsu_c1_r_clk; // @[el2_lsu.scala 408:49] + assign bus_intf_io_lsu_c2_r_clk = clkdomain_io_lsu_c2_r_clk; // @[el2_lsu.scala 409:49] + assign bus_intf_io_lsu_bus_ibuf_c1_clk = clkdomain_io_lsu_bus_ibuf_c1_clk; // @[el2_lsu.scala 410:49] + assign bus_intf_io_lsu_bus_buf_c1_clk = clkdomain_io_lsu_bus_buf_c1_clk; // @[el2_lsu.scala 412:49] + assign bus_intf_io_lsu_free_c2_clk = clkdomain_io_lsu_free_c2_clk; // @[el2_lsu.scala 413:49] + assign bus_intf_io_free_clk = io_free_clk; // @[el2_lsu.scala 414:49] + assign bus_intf_io_lsu_busm_clk = clkdomain_io_lsu_busm_clk; // @[el2_lsu.scala 415:49] + assign bus_intf_io_dec_lsu_valid_raw_d = io_dec_lsu_valid_raw_d; // @[el2_lsu.scala 416:49] + assign bus_intf_io_lsu_busreq_m = _T_39 & _T_40; // @[el2_lsu.scala 417:49] + assign bus_intf_io_lsu_pkt_m_load = lsu_lsc_ctl_io_lsu_pkt_m_load; // @[el2_lsu.scala 425:50] + assign bus_intf_io_lsu_pkt_m_valid = lsu_lsc_ctl_io_lsu_pkt_m_valid; // @[el2_lsu.scala 425:50] + assign bus_intf_io_lsu_pkt_r_by = lsu_lsc_ctl_io_lsu_pkt_r_by; // @[el2_lsu.scala 426:50] + assign bus_intf_io_lsu_pkt_r_half = lsu_lsc_ctl_io_lsu_pkt_r_half; // @[el2_lsu.scala 426:50] + assign bus_intf_io_lsu_pkt_r_word = lsu_lsc_ctl_io_lsu_pkt_r_word; // @[el2_lsu.scala 426:50] + assign bus_intf_io_lsu_pkt_r_load = lsu_lsc_ctl_io_lsu_pkt_r_load; // @[el2_lsu.scala 426:50] + assign bus_intf_io_lsu_pkt_r_store = lsu_lsc_ctl_io_lsu_pkt_r_store; // @[el2_lsu.scala 426:50] + assign bus_intf_io_lsu_pkt_r_unsign = lsu_lsc_ctl_io_lsu_pkt_r_unsign; // @[el2_lsu.scala 426:50] + assign bus_intf_io_lsu_pkt_r_valid = lsu_lsc_ctl_io_lsu_pkt_r_valid; // @[el2_lsu.scala 426:50] + assign bus_intf_io_lsu_addr_d = lsu_lsc_ctl_io_lsu_addr_d; // @[el2_lsu.scala 418:49] + assign bus_intf_io_lsu_addr_m = lsu_lsc_ctl_io_lsu_addr_m; // @[el2_lsu.scala 419:49] + assign bus_intf_io_lsu_addr_r = lsu_lsc_ctl_io_lsu_addr_r; // @[el2_lsu.scala 420:49] + assign bus_intf_io_end_addr_d = lsu_lsc_ctl_io_end_addr_d; // @[el2_lsu.scala 421:49] + assign bus_intf_io_end_addr_m = lsu_lsc_ctl_io_end_addr_m; // @[el2_lsu.scala 422:49] + assign bus_intf_io_end_addr_r = lsu_lsc_ctl_io_end_addr_r; // @[el2_lsu.scala 423:49] + assign bus_intf_io_store_data_r = dccm_ctl_io_store_data_r; // @[el2_lsu.scala 424:52] + assign bus_intf_io_dec_tlu_force_halt = io_dec_tlu_force_halt; // @[el2_lsu.scala 427:49] + assign bus_intf_io_lsu_commit_r = lsu_lsc_ctl_io_lsu_commit_r; // @[el2_lsu.scala 428:49] + assign bus_intf_io_is_sideeffects_m = lsu_lsc_ctl_io_is_sideeffects_m; // @[el2_lsu.scala 429:49] + assign bus_intf_io_flush_m_up = io_dec_tlu_flush_lower_r; // @[el2_lsu.scala 430:49] + assign bus_intf_io_flush_r = io_dec_tlu_i0_kill_writeb_r; // @[el2_lsu.scala 431:49] + assign bus_intf_io_lsu_axi_awready = io_lsu_axi_awready; // @[el2_lsu.scala 450:49] + assign bus_intf_io_lsu_axi_wready = io_lsu_axi_wready; // @[el2_lsu.scala 462:49] + assign bus_intf_io_lsu_axi_bvalid = io_lsu_axi_bvalid; // @[el2_lsu.scala 466:49] + assign bus_intf_io_lsu_axi_bresp = io_lsu_axi_bresp; // @[el2_lsu.scala 468:49] + assign bus_intf_io_lsu_axi_bid = io_lsu_axi_bid; // @[el2_lsu.scala 469:49] + assign bus_intf_io_lsu_axi_arready = io_lsu_axi_arready; // @[el2_lsu.scala 471:49] + assign bus_intf_io_lsu_axi_rvalid = io_lsu_axi_rvalid; // @[el2_lsu.scala 482:49] + assign bus_intf_io_lsu_axi_rid = io_lsu_axi_rid; // @[el2_lsu.scala 484:49] + assign bus_intf_io_lsu_axi_rdata = io_lsu_axi_rdata; // @[el2_lsu.scala 485:49] + assign bus_intf_io_lsu_bus_clk_en = io_lsu_bus_clk_en; // @[el2_lsu.scala 488:49] +`ifdef RANDOMIZE_GARBAGE_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_INVALID_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_REG_INIT +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_MEM_INIT +`define RANDOMIZE +`endif +`ifndef RANDOM +`define RANDOM $random +`endif +`ifdef RANDOMIZE_MEM_INIT + integer initvar; +`endif +`ifndef SYNTHESIS +`ifdef FIRRTL_BEFORE_INITIAL +`FIRRTL_BEFORE_INITIAL +`endif +initial begin + `ifdef RANDOMIZE + `ifdef INIT_RANDOM + `INIT_RANDOM + `endif + `ifndef VERILATOR + `ifdef RANDOMIZE_DELAY + #`RANDOMIZE_DELAY begin end + `else + #0.002 begin end + `endif + `endif +`ifdef RANDOMIZE_REG_INIT + _RAND_0 = {1{`RANDOM}}; + _T_52 = _RAND_0[2:0]; + _RAND_1 = {1{`RANDOM}}; + lsu_raw_fwd_hi_r = _RAND_1[0:0]; + _RAND_2 = {1{`RANDOM}}; + lsu_raw_fwd_lo_r = _RAND_2[0:0]; +`endif // RANDOMIZE_REG_INIT + if (reset) begin + _T_52 = 3'h0; + end + if (reset) begin + lsu_raw_fwd_hi_r = 1'h0; + end + if (reset) begin + lsu_raw_fwd_lo_r = 1'h0; + end + `endif // RANDOMIZE +end // initial +`ifdef FIRRTL_AFTER_INITIAL +`FIRRTL_AFTER_INITIAL +`endif +`endif // SYNTHESIS + always @(posedge clkdomain_io_lsu_c1_m_clk or posedge reset) begin + if (reset) begin + _T_52 <= 3'h0; + end else begin + _T_52 <= io_dma_mem_tag; + end + end + always @(posedge clkdomain_io_lsu_c2_r_clk or posedge reset) begin + if (reset) begin + lsu_raw_fwd_hi_r <= 1'h0; + end else begin + lsu_raw_fwd_hi_r <= |stbuf_io_stbuf_fwdbyteen_hi_m; + end + end + always @(posedge clkdomain_io_lsu_c2_r_clk or posedge reset) begin + if (reset) begin + lsu_raw_fwd_lo_r <= 1'h0; + end else begin + lsu_raw_fwd_lo_r <= |stbuf_io_stbuf_fwdbyteen_lo_m; + end + end +endmodule diff --git a/el2_lsu_bus_intf.anno.json b/el2_lsu_bus_intf.anno.json new file mode 100644 index 00000000..6c17e6ff --- /dev/null +++ b/el2_lsu_bus_intf.anno.json @@ -0,0 +1,102 @@ +[ + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_bus_intf|el2_lsu_bus_intf>io_lsu_pmu_bus_misaligned", + "sources":[ + "~el2_lsu_bus_intf|el2_lsu_bus_intf>io_lsu_commit_r" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_bus_intf|el2_lsu_bus_intf>io_bus_read_data_m", + "sources":[ + "~el2_lsu_bus_intf|el2_lsu_bus_intf>io_lsu_addr_m", + "~el2_lsu_bus_intf|el2_lsu_bus_intf>io_lsu_busreq_m", + "~el2_lsu_bus_intf|el2_lsu_bus_intf>io_end_addr_m", + "~el2_lsu_bus_intf|el2_lsu_bus_intf>io_lsu_pkt_r_store", + "~el2_lsu_bus_intf|el2_lsu_bus_intf>io_lsu_pkt_r_valid", + "~el2_lsu_bus_intf|el2_lsu_bus_intf>io_store_data_r", + "~el2_lsu_bus_intf|el2_lsu_bus_intf>io_lsu_addr_r", + "~el2_lsu_bus_intf|el2_lsu_bus_intf>io_lsu_pkt_r_by", + "~el2_lsu_bus_intf|el2_lsu_bus_intf>io_lsu_pkt_r_word", + "~el2_lsu_bus_intf|el2_lsu_bus_intf>io_lsu_pkt_r_half", + "~el2_lsu_bus_intf|el2_lsu_bus_intf>io_end_addr_r" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_bus_intf|el2_lsu_bus_intf>io_lsu_nonblock_load_inv_r", + "sources":[ + "~el2_lsu_bus_intf|el2_lsu_bus_intf>io_lsu_commit_r" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_bus_intf|el2_lsu_bus_intf>io_lsu_pmu_bus_trxn", + "sources":[ + "~el2_lsu_bus_intf|el2_lsu_bus_intf>io_lsu_axi_arready", + "~el2_lsu_bus_intf|el2_lsu_bus_intf>io_lsu_axi_awready", + "~el2_lsu_bus_intf|el2_lsu_bus_intf>io_lsu_axi_wready" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_bus_intf|el2_lsu_bus_intf>io_lsu_pmu_bus_busy", + "sources":[ + "~el2_lsu_bus_intf|el2_lsu_bus_intf>io_lsu_axi_arready", + "~el2_lsu_bus_intf|el2_lsu_bus_intf>io_lsu_axi_awready", + "~el2_lsu_bus_intf|el2_lsu_bus_intf>io_lsu_axi_wready" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_bus_intf|el2_lsu_bus_intf>io_lsu_nonblock_load_valid_m", + "sources":[ + "~el2_lsu_bus_intf|el2_lsu_bus_intf>io_lsu_pkt_m_load", + "~el2_lsu_bus_intf|el2_lsu_bus_intf>io_flush_m_up", + "~el2_lsu_bus_intf|el2_lsu_bus_intf>io_lsu_busreq_m", + "~el2_lsu_bus_intf|el2_lsu_bus_intf>io_lsu_pkt_m_valid", + "~el2_lsu_bus_intf|el2_lsu_bus_intf>io_is_sideeffects_m", + "~el2_lsu_bus_intf|el2_lsu_bus_intf>io_lsu_addr_m", + "~el2_lsu_bus_intf|el2_lsu_bus_intf>io_end_addr_m", + "~el2_lsu_bus_intf|el2_lsu_bus_intf>io_lsu_pkt_r_store", + "~el2_lsu_bus_intf|el2_lsu_bus_intf>io_lsu_pkt_r_by", + "~el2_lsu_bus_intf|el2_lsu_bus_intf>io_lsu_pkt_r_valid", + "~el2_lsu_bus_intf|el2_lsu_bus_intf>io_lsu_pkt_r_word", + "~el2_lsu_bus_intf|el2_lsu_bus_intf>io_lsu_pkt_r_half", + "~el2_lsu_bus_intf|el2_lsu_bus_intf>io_lsu_addr_r", + "~el2_lsu_bus_intf|el2_lsu_bus_intf>io_end_addr_r" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_bus_intf|el2_lsu_bus_intf>io_lsu_bus_buffer_full_any", + "sources":[ + "~el2_lsu_bus_intf|el2_lsu_bus_intf>io_dec_lsu_valid_raw_d", + "~el2_lsu_bus_intf|el2_lsu_bus_intf>io_lsu_busreq_m", + "~el2_lsu_bus_intf|el2_lsu_bus_intf>io_lsu_addr_d", + "~el2_lsu_bus_intf|el2_lsu_bus_intf>io_end_addr_d" + ] + }, + { + "class":"firrtl.EmitCircuitAnnotation", + "emitter":"firrtl.VerilogEmitter" + }, + { + "class":"firrtl.transforms.BlackBoxResourceAnno", + "target":"el2_lsu_bus_intf.TEC_RV_ICG", + "resourceId":"/vsrc/TEC_RV_ICG.v" + }, + { + "class":"firrtl.options.TargetDirAnnotation", + "directory":"." + }, + { + "class":"firrtl.options.OutputAnnotationFileAnnotation", + "file":"el2_lsu_bus_intf" + }, + { + "class":"firrtl.transforms.BlackBoxTargetDirAnno", + "targetDir":"." + } +] \ No newline at end of file diff --git a/el2_lsu_bus_intf.fir b/el2_lsu_bus_intf.fir new file mode 100644 index 00000000..d1877955 --- /dev/null +++ b/el2_lsu_bus_intf.fir @@ -0,0 +1,7195 @@ +;buildInfoPackage: chisel3, version: 3.3.1, scalaVersion: 2.12.11, sbtVersion: 1.3.10 +circuit el2_lsu_bus_intf : + extmodule TEC_RV_ICG : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + extmodule TEC_RV_ICG_1 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_1 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_1 @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + extmodule TEC_RV_ICG_2 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_2 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_2 @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + extmodule TEC_RV_ICG_3 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_3 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_3 @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + extmodule TEC_RV_ICG_4 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_4 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_4 @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + extmodule TEC_RV_ICG_5 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_5 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_5 @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + extmodule TEC_RV_ICG_6 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_6 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_6 @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + extmodule TEC_RV_ICG_7 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_7 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_7 @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + extmodule TEC_RV_ICG_8 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_8 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_8 @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + extmodule TEC_RV_ICG_9 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_9 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_9 @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + extmodule TEC_RV_ICG_10 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_10 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_10 @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + extmodule TEC_RV_ICG_11 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_11 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_11 @[el2_lib.scala 472:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[el2_lib.scala 473:14] + clkhdr.CK <= io.clk @[el2_lib.scala 474:18] + clkhdr.EN <= io.en @[el2_lib.scala 475:18] + clkhdr.SE <= io.scan_mode @[el2_lib.scala 476:18] + + module el2_lsu_bus_buffer : + input clock : Clock + input reset : AsyncReset + output io : {flip scan_mode : UInt<1>, flip dec_tlu_external_ldfwd_disable : UInt<1>, flip dec_tlu_wb_coalescing_disable : UInt<1>, flip dec_tlu_sideeffect_posted_disable : UInt<1>, flip dec_tlu_force_halt : UInt<1>, flip lsu_c2_r_clk : Clock, flip lsu_bus_ibuf_c1_clk : Clock, flip lsu_bus_obuf_c1_clk : Clock, flip lsu_bus_buf_c1_clk : Clock, flip lsu_free_c2_clk : Clock, flip lsu_busm_clk : Clock, flip dec_lsu_valid_raw_d : UInt<1>, flip lsu_pkt_m : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip lsu_pkt_r : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip lsu_addr_m : UInt<32>, flip end_addr_m : UInt<32>, flip lsu_addr_r : UInt<32>, flip end_addr_r : UInt<32>, flip store_data_r : UInt<32>, flip no_word_merge_r : UInt<1>, flip no_dword_merge_r : UInt<1>, flip lsu_busreq_m : UInt<1>, flip ld_full_hit_m : UInt<1>, flip flush_m_up : UInt<1>, flip flush_r : UInt<1>, flip lsu_commit_r : UInt<1>, flip is_sideeffects_r : UInt<1>, flip ldst_dual_d : UInt<1>, flip ldst_dual_m : UInt<1>, flip ldst_dual_r : UInt<1>, flip ldst_byteen_ext_m : UInt<8>, flip lsu_axi_awready : UInt<1>, flip lsu_axi_wready : UInt<1>, flip lsu_axi_bvalid : UInt<1>, flip lsu_axi_bresp : UInt<2>, flip lsu_axi_bid : UInt<3>, flip lsu_axi_arready : UInt<1>, flip lsu_axi_rvalid : UInt<1>, flip lsu_axi_rid : UInt<3>, flip lsu_axi_rdata : UInt<64>, flip lsu_axi_rresp : UInt<2>, flip lsu_bus_clk_en : UInt<1>, flip lsu_bus_clk_en_q : UInt<1>, lsu_busreq_r : UInt<1>, lsu_bus_buffer_pend_any : UInt<1>, lsu_bus_buffer_full_any : UInt<1>, lsu_bus_buffer_empty_any : UInt<1>, lsu_bus_idle_any : UInt<1>, ld_byte_hit_buf_lo : UInt<4>, ld_byte_hit_buf_hi : UInt<4>, ld_fwddata_buf_lo : UInt<32>, ld_fwddata_buf_hi : UInt<32>, lsu_imprecise_error_load_any : UInt<1>, lsu_imprecise_error_store_any : UInt<1>, lsu_imprecise_error_addr_any : UInt<32>, lsu_nonblock_load_valid_m : UInt<1>, lsu_nonblock_load_tag_m : UInt<2>, lsu_nonblock_load_inv_r : UInt<1>, lsu_nonblock_load_inv_tag_r : UInt<2>, lsu_nonblock_load_data_valid : UInt<1>, lsu_nonblock_load_data_error : UInt<1>, lsu_nonblock_load_data_tag : UInt<2>, lsu_nonblock_load_data : UInt<32>, lsu_pmu_bus_trxn : UInt<1>, lsu_pmu_bus_misaligned : UInt<1>, lsu_pmu_bus_error : UInt<1>, lsu_pmu_bus_busy : UInt<1>, lsu_axi_awvalid : UInt<1>, lsu_axi_awid : UInt<3>, lsu_axi_awaddr : UInt<32>, lsu_axi_awregion : UInt<4>, lsu_axi_awlen : UInt<8>, lsu_axi_awsize : UInt<3>, lsu_axi_awburst : UInt<2>, lsu_axi_awlock : UInt<1>, lsu_axi_awcache : UInt<4>, lsu_axi_awprot : UInt<3>, lsu_axi_awqos : UInt<4>, lsu_axi_wvalid : UInt<1>, lsu_axi_wdata : UInt<64>, lsu_axi_wstrb : UInt<8>, lsu_axi_wlast : UInt<1>, lsu_axi_bready : UInt<1>, lsu_axi_arvalid : UInt<1>, lsu_axi_arid : UInt<3>, lsu_axi_araddr : UInt<32>, lsu_axi_arregion : UInt<4>, lsu_axi_arlen : UInt<8>, lsu_axi_arsize : UInt<3>, lsu_axi_arburst : UInt<2>, lsu_axi_arlock : UInt<1>, lsu_axi_arcache : UInt<4>, lsu_axi_arprot : UInt<3>, lsu_axi_arqos : UInt<4>, lsu_axi_rready : UInt<1>} + + wire buf_addr : UInt<32>[4] @[el2_lsu_bus_buffer.scala 119:22] + wire buf_state : UInt<3>[4] @[el2_lsu_bus_buffer.scala 120:23] + wire buf_write : UInt<4> + buf_write <= UInt<1>("h00") + wire CmdPtr0 : UInt<2> + CmdPtr0 <= UInt<1>("h00") + node ldst_byteen_hi_m = bits(io.ldst_byteen_ext_m, 7, 4) @[el2_lsu_bus_buffer.scala 125:46] + node ldst_byteen_lo_m = bits(io.ldst_byteen_ext_m, 3, 0) @[el2_lsu_bus_buffer.scala 126:46] + node _T = bits(io.lsu_addr_m, 31, 2) @[el2_lsu_bus_buffer.scala 128:66] + node _T_1 = bits(buf_addr[0], 31, 2) @[el2_lsu_bus_buffer.scala 128:89] + node _T_2 = eq(_T, _T_1) @[el2_lsu_bus_buffer.scala 128:74] + node _T_3 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 128:109] + node _T_4 = and(_T_2, _T_3) @[el2_lsu_bus_buffer.scala 128:98] + node _T_5 = neq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 128:129] + node _T_6 = and(_T_4, _T_5) @[el2_lsu_bus_buffer.scala 128:113] + node ld_addr_hitvec_lo_0 = and(_T_6, io.lsu_busreq_m) @[el2_lsu_bus_buffer.scala 128:141] + node _T_7 = bits(io.lsu_addr_m, 31, 2) @[el2_lsu_bus_buffer.scala 128:66] + node _T_8 = bits(buf_addr[1], 31, 2) @[el2_lsu_bus_buffer.scala 128:89] + node _T_9 = eq(_T_7, _T_8) @[el2_lsu_bus_buffer.scala 128:74] + node _T_10 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 128:109] + node _T_11 = and(_T_9, _T_10) @[el2_lsu_bus_buffer.scala 128:98] + node _T_12 = neq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 128:129] + node _T_13 = and(_T_11, _T_12) @[el2_lsu_bus_buffer.scala 128:113] + node ld_addr_hitvec_lo_1 = and(_T_13, io.lsu_busreq_m) @[el2_lsu_bus_buffer.scala 128:141] + node _T_14 = bits(io.lsu_addr_m, 31, 2) @[el2_lsu_bus_buffer.scala 128:66] + node _T_15 = bits(buf_addr[2], 31, 2) @[el2_lsu_bus_buffer.scala 128:89] + node _T_16 = eq(_T_14, _T_15) @[el2_lsu_bus_buffer.scala 128:74] + node _T_17 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 128:109] + node _T_18 = and(_T_16, _T_17) @[el2_lsu_bus_buffer.scala 128:98] + node _T_19 = neq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 128:129] + node _T_20 = and(_T_18, _T_19) @[el2_lsu_bus_buffer.scala 128:113] + node ld_addr_hitvec_lo_2 = and(_T_20, io.lsu_busreq_m) @[el2_lsu_bus_buffer.scala 128:141] + node _T_21 = bits(io.lsu_addr_m, 31, 2) @[el2_lsu_bus_buffer.scala 128:66] + node _T_22 = bits(buf_addr[3], 31, 2) @[el2_lsu_bus_buffer.scala 128:89] + node _T_23 = eq(_T_21, _T_22) @[el2_lsu_bus_buffer.scala 128:74] + node _T_24 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 128:109] + node _T_25 = and(_T_23, _T_24) @[el2_lsu_bus_buffer.scala 128:98] + node _T_26 = neq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 128:129] + node _T_27 = and(_T_25, _T_26) @[el2_lsu_bus_buffer.scala 128:113] + node ld_addr_hitvec_lo_3 = and(_T_27, io.lsu_busreq_m) @[el2_lsu_bus_buffer.scala 128:141] + node _T_28 = bits(io.end_addr_m, 31, 2) @[el2_lsu_bus_buffer.scala 129:66] + node _T_29 = bits(buf_addr[0], 31, 2) @[el2_lsu_bus_buffer.scala 129:89] + node _T_30 = eq(_T_28, _T_29) @[el2_lsu_bus_buffer.scala 129:74] + node _T_31 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 129:109] + node _T_32 = and(_T_30, _T_31) @[el2_lsu_bus_buffer.scala 129:98] + node _T_33 = neq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 129:129] + node _T_34 = and(_T_32, _T_33) @[el2_lsu_bus_buffer.scala 129:113] + node ld_addr_hitvec_hi_0 = and(_T_34, io.lsu_busreq_m) @[el2_lsu_bus_buffer.scala 129:141] + node _T_35 = bits(io.end_addr_m, 31, 2) @[el2_lsu_bus_buffer.scala 129:66] + node _T_36 = bits(buf_addr[1], 31, 2) @[el2_lsu_bus_buffer.scala 129:89] + node _T_37 = eq(_T_35, _T_36) @[el2_lsu_bus_buffer.scala 129:74] + node _T_38 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 129:109] + node _T_39 = and(_T_37, _T_38) @[el2_lsu_bus_buffer.scala 129:98] + node _T_40 = neq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 129:129] + node _T_41 = and(_T_39, _T_40) @[el2_lsu_bus_buffer.scala 129:113] + node ld_addr_hitvec_hi_1 = and(_T_41, io.lsu_busreq_m) @[el2_lsu_bus_buffer.scala 129:141] + node _T_42 = bits(io.end_addr_m, 31, 2) @[el2_lsu_bus_buffer.scala 129:66] + node _T_43 = bits(buf_addr[2], 31, 2) @[el2_lsu_bus_buffer.scala 129:89] + node _T_44 = eq(_T_42, _T_43) @[el2_lsu_bus_buffer.scala 129:74] + node _T_45 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 129:109] + node _T_46 = and(_T_44, _T_45) @[el2_lsu_bus_buffer.scala 129:98] + node _T_47 = neq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 129:129] + node _T_48 = and(_T_46, _T_47) @[el2_lsu_bus_buffer.scala 129:113] + node ld_addr_hitvec_hi_2 = and(_T_48, io.lsu_busreq_m) @[el2_lsu_bus_buffer.scala 129:141] + node _T_49 = bits(io.end_addr_m, 31, 2) @[el2_lsu_bus_buffer.scala 129:66] + node _T_50 = bits(buf_addr[3], 31, 2) @[el2_lsu_bus_buffer.scala 129:89] + node _T_51 = eq(_T_49, _T_50) @[el2_lsu_bus_buffer.scala 129:74] + node _T_52 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 129:109] + node _T_53 = and(_T_51, _T_52) @[el2_lsu_bus_buffer.scala 129:98] + node _T_54 = neq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 129:129] + node _T_55 = and(_T_53, _T_54) @[el2_lsu_bus_buffer.scala 129:113] + node ld_addr_hitvec_hi_3 = and(_T_55, io.lsu_busreq_m) @[el2_lsu_bus_buffer.scala 129:141] + wire ld_byte_hitvecfn_lo : UInt<4>[4] @[el2_lsu_bus_buffer.scala 130:33] + wire ld_byte_ibuf_hit_lo : UInt<4> + ld_byte_ibuf_hit_lo <= UInt<1>("h00") + wire ld_byte_hitvecfn_hi : UInt<4>[4] @[el2_lsu_bus_buffer.scala 132:33] + wire ld_byte_ibuf_hit_hi : UInt<4> + ld_byte_ibuf_hit_hi <= UInt<1>("h00") + wire buf_byteen : UInt<4>[4] @[el2_lsu_bus_buffer.scala 134:24] + buf_byteen[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 135:14] + buf_byteen[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 135:14] + buf_byteen[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 135:14] + buf_byteen[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 135:14] + wire buf_nxtstate : UInt<3>[4] @[el2_lsu_bus_buffer.scala 136:26] + buf_nxtstate[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 137:16] + buf_nxtstate[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 137:16] + buf_nxtstate[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 137:16] + buf_nxtstate[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 137:16] + wire buf_wr_en : UInt<1>[4] @[el2_lsu_bus_buffer.scala 138:23] + buf_wr_en[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 139:13] + buf_wr_en[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 139:13] + buf_wr_en[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 139:13] + buf_wr_en[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 139:13] + wire buf_data_en : UInt<1>[4] @[el2_lsu_bus_buffer.scala 140:25] + buf_data_en[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 141:15] + buf_data_en[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 141:15] + buf_data_en[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 141:15] + buf_data_en[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 141:15] + wire buf_state_bus_en : UInt<1>[4] @[el2_lsu_bus_buffer.scala 142:30] + buf_state_bus_en[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 143:20] + buf_state_bus_en[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 143:20] + buf_state_bus_en[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 143:20] + buf_state_bus_en[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 143:20] + wire buf_ldfwd_in : UInt<1>[4] @[el2_lsu_bus_buffer.scala 144:26] + buf_ldfwd_in[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 145:16] + buf_ldfwd_in[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 145:16] + buf_ldfwd_in[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 145:16] + buf_ldfwd_in[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 145:16] + wire buf_ldfwd_en : UInt<1>[4] @[el2_lsu_bus_buffer.scala 146:26] + buf_ldfwd_en[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 147:16] + buf_ldfwd_en[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 147:16] + buf_ldfwd_en[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 147:16] + buf_ldfwd_en[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 147:16] + wire buf_data_in : UInt<32>[4] @[el2_lsu_bus_buffer.scala 148:25] + buf_data_in[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 149:15] + buf_data_in[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 149:15] + buf_data_in[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 149:15] + buf_data_in[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 149:15] + wire buf_ldfwdtag_in : UInt<2>[4] @[el2_lsu_bus_buffer.scala 150:29] + buf_ldfwdtag_in[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 151:19] + buf_ldfwdtag_in[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 151:19] + buf_ldfwdtag_in[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 151:19] + buf_ldfwdtag_in[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 151:19] + wire buf_error_en : UInt<1>[4] @[el2_lsu_bus_buffer.scala 152:26] + buf_error_en[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 153:16] + buf_error_en[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 153:16] + buf_error_en[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 153:16] + buf_error_en[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 153:16] + wire bus_rsp_read_error : UInt<1> + bus_rsp_read_error <= UInt<1>("h00") + wire bus_rsp_rdata : UInt<64> + bus_rsp_rdata <= UInt<1>("h00") + wire bus_rsp_write_error : UInt<1> + bus_rsp_write_error <= UInt<1>("h00") + wire buf_dualtag : UInt<2>[4] @[el2_lsu_bus_buffer.scala 157:25] + buf_dualtag[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 158:15] + buf_dualtag[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 158:15] + buf_dualtag[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 158:15] + buf_dualtag[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 158:15] + wire buf_ldfwd : UInt<4> + buf_ldfwd <= UInt<1>("h00") + wire buf_resp_state_bus_en : UInt<1>[4] @[el2_lsu_bus_buffer.scala 160:35] + buf_resp_state_bus_en[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 161:25] + buf_resp_state_bus_en[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 161:25] + buf_resp_state_bus_en[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 161:25] + buf_resp_state_bus_en[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 161:25] + wire any_done_wait_state : UInt<1> + any_done_wait_state <= UInt<1>("h00") + wire bus_rsp_write : UInt<1> + bus_rsp_write <= UInt<1>("h00") + wire bus_rsp_write_tag : UInt<3> + bus_rsp_write_tag <= UInt<1>("h00") + wire buf_ldfwdtag : UInt<2>[4] @[el2_lsu_bus_buffer.scala 165:26] + buf_ldfwdtag[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 166:16] + buf_ldfwdtag[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 166:16] + buf_ldfwdtag[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 166:16] + buf_ldfwdtag[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 166:16] + wire buf_rst : UInt<1>[4] @[el2_lsu_bus_buffer.scala 167:21] + buf_rst[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 168:11] + buf_rst[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 168:11] + buf_rst[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 168:11] + buf_rst[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 168:11] + wire ibuf_drainvec_vld : UInt<4> + ibuf_drainvec_vld <= UInt<1>("h00") + wire buf_byteen_in : UInt<4>[4] @[el2_lsu_bus_buffer.scala 170:27] + buf_byteen_in[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 171:17] + buf_byteen_in[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 171:17] + buf_byteen_in[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 171:17] + buf_byteen_in[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 171:17] + wire buf_addr_in : UInt<32>[4] @[el2_lsu_bus_buffer.scala 172:25] + buf_addr_in[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 173:15] + buf_addr_in[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 173:15] + buf_addr_in[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 173:15] + buf_addr_in[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 173:15] + wire buf_dual_in : UInt<4> + buf_dual_in <= UInt<1>("h00") + wire buf_samedw_in : UInt<4> + buf_samedw_in <= UInt<1>("h00") + wire buf_nomerge_in : UInt<4> + buf_nomerge_in <= UInt<1>("h00") + wire buf_dualhi_in : UInt<4> + buf_dualhi_in <= UInt<1>("h00") + wire buf_dualtag_in : UInt<2>[4] @[el2_lsu_bus_buffer.scala 178:28] + buf_dualtag_in[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 179:18] + buf_dualtag_in[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 179:18] + buf_dualtag_in[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 179:18] + buf_dualtag_in[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 179:18] + wire buf_sideeffect_in : UInt<4> + buf_sideeffect_in <= UInt<1>("h00") + wire buf_unsign_in : UInt<4> + buf_unsign_in <= UInt<1>("h00") + wire buf_sz_in : UInt<2>[4] @[el2_lsu_bus_buffer.scala 182:23] + buf_sz_in[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 183:13] + buf_sz_in[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 183:13] + buf_sz_in[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 183:13] + buf_sz_in[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 183:13] + wire buf_write_in : UInt<4> + buf_write_in <= UInt<1>("h00") + wire buf_unsign : UInt<4> + buf_unsign <= UInt<1>("h00") + wire buf_error : UInt<4> + buf_error <= UInt<1>("h00") + wire ibuf_data : UInt<32> + ibuf_data <= UInt<1>("h00") + node _T_56 = orr(ld_byte_hitvecfn_lo[0]) @[el2_lsu_bus_buffer.scala 189:73] + node _T_57 = bits(ld_byte_ibuf_hit_lo, 0, 0) @[el2_lsu_bus_buffer.scala 189:98] + node _T_58 = or(_T_56, _T_57) @[el2_lsu_bus_buffer.scala 189:77] + node _T_59 = orr(ld_byte_hitvecfn_lo[1]) @[el2_lsu_bus_buffer.scala 189:73] + node _T_60 = bits(ld_byte_ibuf_hit_lo, 1, 1) @[el2_lsu_bus_buffer.scala 189:98] + node _T_61 = or(_T_59, _T_60) @[el2_lsu_bus_buffer.scala 189:77] + node _T_62 = orr(ld_byte_hitvecfn_lo[2]) @[el2_lsu_bus_buffer.scala 189:73] + node _T_63 = bits(ld_byte_ibuf_hit_lo, 2, 2) @[el2_lsu_bus_buffer.scala 189:98] + node _T_64 = or(_T_62, _T_63) @[el2_lsu_bus_buffer.scala 189:77] + node _T_65 = orr(ld_byte_hitvecfn_lo[3]) @[el2_lsu_bus_buffer.scala 189:73] + node _T_66 = bits(ld_byte_ibuf_hit_lo, 3, 3) @[el2_lsu_bus_buffer.scala 189:98] + node _T_67 = or(_T_65, _T_66) @[el2_lsu_bus_buffer.scala 189:77] + node _T_68 = cat(_T_67, _T_64) @[Cat.scala 29:58] + node _T_69 = cat(_T_68, _T_61) @[Cat.scala 29:58] + node _T_70 = cat(_T_69, _T_58) @[Cat.scala 29:58] + io.ld_byte_hit_buf_lo <= _T_70 @[el2_lsu_bus_buffer.scala 189:25] + node _T_71 = orr(ld_byte_hitvecfn_hi[0]) @[el2_lsu_bus_buffer.scala 190:73] + node _T_72 = bits(ld_byte_ibuf_hit_hi, 0, 0) @[el2_lsu_bus_buffer.scala 190:98] + node _T_73 = or(_T_71, _T_72) @[el2_lsu_bus_buffer.scala 190:77] + node _T_74 = orr(ld_byte_hitvecfn_hi[1]) @[el2_lsu_bus_buffer.scala 190:73] + node _T_75 = bits(ld_byte_ibuf_hit_hi, 1, 1) @[el2_lsu_bus_buffer.scala 190:98] + node _T_76 = or(_T_74, _T_75) @[el2_lsu_bus_buffer.scala 190:77] + node _T_77 = orr(ld_byte_hitvecfn_hi[2]) @[el2_lsu_bus_buffer.scala 190:73] + node _T_78 = bits(ld_byte_ibuf_hit_hi, 2, 2) @[el2_lsu_bus_buffer.scala 190:98] + node _T_79 = or(_T_77, _T_78) @[el2_lsu_bus_buffer.scala 190:77] + node _T_80 = orr(ld_byte_hitvecfn_hi[3]) @[el2_lsu_bus_buffer.scala 190:73] + node _T_81 = bits(ld_byte_ibuf_hit_hi, 3, 3) @[el2_lsu_bus_buffer.scala 190:98] + node _T_82 = or(_T_80, _T_81) @[el2_lsu_bus_buffer.scala 190:77] + node _T_83 = cat(_T_82, _T_79) @[Cat.scala 29:58] + node _T_84 = cat(_T_83, _T_76) @[Cat.scala 29:58] + node _T_85 = cat(_T_84, _T_73) @[Cat.scala 29:58] + io.ld_byte_hit_buf_hi <= _T_85 @[el2_lsu_bus_buffer.scala 190:25] + node _T_86 = bits(buf_byteen[0], 0, 0) @[el2_lsu_bus_buffer.scala 192:110] + node _T_87 = and(ld_addr_hitvec_lo_0, _T_86) @[el2_lsu_bus_buffer.scala 192:95] + node _T_88 = bits(ldst_byteen_lo_m, 0, 0) @[el2_lsu_bus_buffer.scala 192:132] + node _T_89 = and(_T_87, _T_88) @[el2_lsu_bus_buffer.scala 192:114] + node _T_90 = bits(buf_byteen[1], 0, 0) @[el2_lsu_bus_buffer.scala 192:110] + node _T_91 = and(ld_addr_hitvec_lo_1, _T_90) @[el2_lsu_bus_buffer.scala 192:95] + node _T_92 = bits(ldst_byteen_lo_m, 0, 0) @[el2_lsu_bus_buffer.scala 192:132] + node _T_93 = and(_T_91, _T_92) @[el2_lsu_bus_buffer.scala 192:114] + node _T_94 = bits(buf_byteen[2], 0, 0) @[el2_lsu_bus_buffer.scala 192:110] + node _T_95 = and(ld_addr_hitvec_lo_2, _T_94) @[el2_lsu_bus_buffer.scala 192:95] + node _T_96 = bits(ldst_byteen_lo_m, 0, 0) @[el2_lsu_bus_buffer.scala 192:132] + node _T_97 = and(_T_95, _T_96) @[el2_lsu_bus_buffer.scala 192:114] + node _T_98 = bits(buf_byteen[3], 0, 0) @[el2_lsu_bus_buffer.scala 192:110] + node _T_99 = and(ld_addr_hitvec_lo_3, _T_98) @[el2_lsu_bus_buffer.scala 192:95] + node _T_100 = bits(ldst_byteen_lo_m, 0, 0) @[el2_lsu_bus_buffer.scala 192:132] + node _T_101 = and(_T_99, _T_100) @[el2_lsu_bus_buffer.scala 192:114] + node _T_102 = cat(_T_101, _T_97) @[Cat.scala 29:58] + node _T_103 = cat(_T_102, _T_93) @[Cat.scala 29:58] + node ld_byte_hitvec_lo_0 = cat(_T_103, _T_89) @[Cat.scala 29:58] + node _T_104 = bits(buf_byteen[0], 1, 1) @[el2_lsu_bus_buffer.scala 192:110] + node _T_105 = and(ld_addr_hitvec_lo_0, _T_104) @[el2_lsu_bus_buffer.scala 192:95] + node _T_106 = bits(ldst_byteen_lo_m, 1, 1) @[el2_lsu_bus_buffer.scala 192:132] + node _T_107 = and(_T_105, _T_106) @[el2_lsu_bus_buffer.scala 192:114] + node _T_108 = bits(buf_byteen[1], 1, 1) @[el2_lsu_bus_buffer.scala 192:110] + node _T_109 = and(ld_addr_hitvec_lo_1, _T_108) @[el2_lsu_bus_buffer.scala 192:95] + node _T_110 = bits(ldst_byteen_lo_m, 1, 1) @[el2_lsu_bus_buffer.scala 192:132] + node _T_111 = and(_T_109, _T_110) @[el2_lsu_bus_buffer.scala 192:114] + node _T_112 = bits(buf_byteen[2], 1, 1) @[el2_lsu_bus_buffer.scala 192:110] + node _T_113 = and(ld_addr_hitvec_lo_2, _T_112) @[el2_lsu_bus_buffer.scala 192:95] + node _T_114 = bits(ldst_byteen_lo_m, 1, 1) @[el2_lsu_bus_buffer.scala 192:132] + node _T_115 = and(_T_113, _T_114) @[el2_lsu_bus_buffer.scala 192:114] + node _T_116 = bits(buf_byteen[3], 1, 1) @[el2_lsu_bus_buffer.scala 192:110] + node _T_117 = and(ld_addr_hitvec_lo_3, _T_116) @[el2_lsu_bus_buffer.scala 192:95] + node _T_118 = bits(ldst_byteen_lo_m, 1, 1) @[el2_lsu_bus_buffer.scala 192:132] + node _T_119 = and(_T_117, _T_118) @[el2_lsu_bus_buffer.scala 192:114] + node _T_120 = cat(_T_119, _T_115) @[Cat.scala 29:58] + node _T_121 = cat(_T_120, _T_111) @[Cat.scala 29:58] + node ld_byte_hitvec_lo_1 = cat(_T_121, _T_107) @[Cat.scala 29:58] + node _T_122 = bits(buf_byteen[0], 2, 2) @[el2_lsu_bus_buffer.scala 192:110] + node _T_123 = and(ld_addr_hitvec_lo_0, _T_122) @[el2_lsu_bus_buffer.scala 192:95] + node _T_124 = bits(ldst_byteen_lo_m, 2, 2) @[el2_lsu_bus_buffer.scala 192:132] + node _T_125 = and(_T_123, _T_124) @[el2_lsu_bus_buffer.scala 192:114] + node _T_126 = bits(buf_byteen[1], 2, 2) @[el2_lsu_bus_buffer.scala 192:110] + node _T_127 = and(ld_addr_hitvec_lo_1, _T_126) @[el2_lsu_bus_buffer.scala 192:95] + node _T_128 = bits(ldst_byteen_lo_m, 2, 2) @[el2_lsu_bus_buffer.scala 192:132] + node _T_129 = and(_T_127, _T_128) @[el2_lsu_bus_buffer.scala 192:114] + node _T_130 = bits(buf_byteen[2], 2, 2) @[el2_lsu_bus_buffer.scala 192:110] + node _T_131 = and(ld_addr_hitvec_lo_2, _T_130) @[el2_lsu_bus_buffer.scala 192:95] + node _T_132 = bits(ldst_byteen_lo_m, 2, 2) @[el2_lsu_bus_buffer.scala 192:132] + node _T_133 = and(_T_131, _T_132) @[el2_lsu_bus_buffer.scala 192:114] + node _T_134 = bits(buf_byteen[3], 2, 2) @[el2_lsu_bus_buffer.scala 192:110] + node _T_135 = and(ld_addr_hitvec_lo_3, _T_134) @[el2_lsu_bus_buffer.scala 192:95] + node _T_136 = bits(ldst_byteen_lo_m, 2, 2) @[el2_lsu_bus_buffer.scala 192:132] + node _T_137 = and(_T_135, _T_136) @[el2_lsu_bus_buffer.scala 192:114] + node _T_138 = cat(_T_137, _T_133) @[Cat.scala 29:58] + node _T_139 = cat(_T_138, _T_129) @[Cat.scala 29:58] + node ld_byte_hitvec_lo_2 = cat(_T_139, _T_125) @[Cat.scala 29:58] + node _T_140 = bits(buf_byteen[0], 3, 3) @[el2_lsu_bus_buffer.scala 192:110] + node _T_141 = and(ld_addr_hitvec_lo_0, _T_140) @[el2_lsu_bus_buffer.scala 192:95] + node _T_142 = bits(ldst_byteen_lo_m, 3, 3) @[el2_lsu_bus_buffer.scala 192:132] + node _T_143 = and(_T_141, _T_142) @[el2_lsu_bus_buffer.scala 192:114] + node _T_144 = bits(buf_byteen[1], 3, 3) @[el2_lsu_bus_buffer.scala 192:110] + node _T_145 = and(ld_addr_hitvec_lo_1, _T_144) @[el2_lsu_bus_buffer.scala 192:95] + node _T_146 = bits(ldst_byteen_lo_m, 3, 3) @[el2_lsu_bus_buffer.scala 192:132] + node _T_147 = and(_T_145, _T_146) @[el2_lsu_bus_buffer.scala 192:114] + node _T_148 = bits(buf_byteen[2], 3, 3) @[el2_lsu_bus_buffer.scala 192:110] + node _T_149 = and(ld_addr_hitvec_lo_2, _T_148) @[el2_lsu_bus_buffer.scala 192:95] + node _T_150 = bits(ldst_byteen_lo_m, 3, 3) @[el2_lsu_bus_buffer.scala 192:132] + node _T_151 = and(_T_149, _T_150) @[el2_lsu_bus_buffer.scala 192:114] + node _T_152 = bits(buf_byteen[3], 3, 3) @[el2_lsu_bus_buffer.scala 192:110] + node _T_153 = and(ld_addr_hitvec_lo_3, _T_152) @[el2_lsu_bus_buffer.scala 192:95] + node _T_154 = bits(ldst_byteen_lo_m, 3, 3) @[el2_lsu_bus_buffer.scala 192:132] + node _T_155 = and(_T_153, _T_154) @[el2_lsu_bus_buffer.scala 192:114] + node _T_156 = cat(_T_155, _T_151) @[Cat.scala 29:58] + node _T_157 = cat(_T_156, _T_147) @[Cat.scala 29:58] + node ld_byte_hitvec_lo_3 = cat(_T_157, _T_143) @[Cat.scala 29:58] + node _T_158 = bits(buf_byteen[0], 0, 0) @[el2_lsu_bus_buffer.scala 193:110] + node _T_159 = and(ld_addr_hitvec_hi_0, _T_158) @[el2_lsu_bus_buffer.scala 193:95] + node _T_160 = bits(ldst_byteen_hi_m, 0, 0) @[el2_lsu_bus_buffer.scala 193:132] + node _T_161 = and(_T_159, _T_160) @[el2_lsu_bus_buffer.scala 193:114] + node _T_162 = bits(buf_byteen[1], 0, 0) @[el2_lsu_bus_buffer.scala 193:110] + node _T_163 = and(ld_addr_hitvec_hi_1, _T_162) @[el2_lsu_bus_buffer.scala 193:95] + node _T_164 = bits(ldst_byteen_hi_m, 0, 0) @[el2_lsu_bus_buffer.scala 193:132] + node _T_165 = and(_T_163, _T_164) @[el2_lsu_bus_buffer.scala 193:114] + node _T_166 = bits(buf_byteen[2], 0, 0) @[el2_lsu_bus_buffer.scala 193:110] + node _T_167 = and(ld_addr_hitvec_hi_2, _T_166) @[el2_lsu_bus_buffer.scala 193:95] + node _T_168 = bits(ldst_byteen_hi_m, 0, 0) @[el2_lsu_bus_buffer.scala 193:132] + node _T_169 = and(_T_167, _T_168) @[el2_lsu_bus_buffer.scala 193:114] + node _T_170 = bits(buf_byteen[3], 0, 0) @[el2_lsu_bus_buffer.scala 193:110] + node _T_171 = and(ld_addr_hitvec_hi_3, _T_170) @[el2_lsu_bus_buffer.scala 193:95] + node _T_172 = bits(ldst_byteen_hi_m, 0, 0) @[el2_lsu_bus_buffer.scala 193:132] + node _T_173 = and(_T_171, _T_172) @[el2_lsu_bus_buffer.scala 193:114] + node _T_174 = cat(_T_173, _T_169) @[Cat.scala 29:58] + node _T_175 = cat(_T_174, _T_165) @[Cat.scala 29:58] + node ld_byte_hitvec_hi_0 = cat(_T_175, _T_161) @[Cat.scala 29:58] + node _T_176 = bits(buf_byteen[0], 1, 1) @[el2_lsu_bus_buffer.scala 193:110] + node _T_177 = and(ld_addr_hitvec_hi_0, _T_176) @[el2_lsu_bus_buffer.scala 193:95] + node _T_178 = bits(ldst_byteen_hi_m, 1, 1) @[el2_lsu_bus_buffer.scala 193:132] + node _T_179 = and(_T_177, _T_178) @[el2_lsu_bus_buffer.scala 193:114] + node _T_180 = bits(buf_byteen[1], 1, 1) @[el2_lsu_bus_buffer.scala 193:110] + node _T_181 = and(ld_addr_hitvec_hi_1, _T_180) @[el2_lsu_bus_buffer.scala 193:95] + node _T_182 = bits(ldst_byteen_hi_m, 1, 1) @[el2_lsu_bus_buffer.scala 193:132] + node _T_183 = and(_T_181, _T_182) @[el2_lsu_bus_buffer.scala 193:114] + node _T_184 = bits(buf_byteen[2], 1, 1) @[el2_lsu_bus_buffer.scala 193:110] + node _T_185 = and(ld_addr_hitvec_hi_2, _T_184) @[el2_lsu_bus_buffer.scala 193:95] + node _T_186 = bits(ldst_byteen_hi_m, 1, 1) @[el2_lsu_bus_buffer.scala 193:132] + node _T_187 = and(_T_185, _T_186) @[el2_lsu_bus_buffer.scala 193:114] + node _T_188 = bits(buf_byteen[3], 1, 1) @[el2_lsu_bus_buffer.scala 193:110] + node _T_189 = and(ld_addr_hitvec_hi_3, _T_188) @[el2_lsu_bus_buffer.scala 193:95] + node _T_190 = bits(ldst_byteen_hi_m, 1, 1) @[el2_lsu_bus_buffer.scala 193:132] + node _T_191 = and(_T_189, _T_190) @[el2_lsu_bus_buffer.scala 193:114] + node _T_192 = cat(_T_191, _T_187) @[Cat.scala 29:58] + node _T_193 = cat(_T_192, _T_183) @[Cat.scala 29:58] + node ld_byte_hitvec_hi_1 = cat(_T_193, _T_179) @[Cat.scala 29:58] + node _T_194 = bits(buf_byteen[0], 2, 2) @[el2_lsu_bus_buffer.scala 193:110] + node _T_195 = and(ld_addr_hitvec_hi_0, _T_194) @[el2_lsu_bus_buffer.scala 193:95] + node _T_196 = bits(ldst_byteen_hi_m, 2, 2) @[el2_lsu_bus_buffer.scala 193:132] + node _T_197 = and(_T_195, _T_196) @[el2_lsu_bus_buffer.scala 193:114] + node _T_198 = bits(buf_byteen[1], 2, 2) @[el2_lsu_bus_buffer.scala 193:110] + node _T_199 = and(ld_addr_hitvec_hi_1, _T_198) @[el2_lsu_bus_buffer.scala 193:95] + node _T_200 = bits(ldst_byteen_hi_m, 2, 2) @[el2_lsu_bus_buffer.scala 193:132] + node _T_201 = and(_T_199, _T_200) @[el2_lsu_bus_buffer.scala 193:114] + node _T_202 = bits(buf_byteen[2], 2, 2) @[el2_lsu_bus_buffer.scala 193:110] + node _T_203 = and(ld_addr_hitvec_hi_2, _T_202) @[el2_lsu_bus_buffer.scala 193:95] + node _T_204 = bits(ldst_byteen_hi_m, 2, 2) @[el2_lsu_bus_buffer.scala 193:132] + node _T_205 = and(_T_203, _T_204) @[el2_lsu_bus_buffer.scala 193:114] + node _T_206 = bits(buf_byteen[3], 2, 2) @[el2_lsu_bus_buffer.scala 193:110] + node _T_207 = and(ld_addr_hitvec_hi_3, _T_206) @[el2_lsu_bus_buffer.scala 193:95] + node _T_208 = bits(ldst_byteen_hi_m, 2, 2) @[el2_lsu_bus_buffer.scala 193:132] + node _T_209 = and(_T_207, _T_208) @[el2_lsu_bus_buffer.scala 193:114] + node _T_210 = cat(_T_209, _T_205) @[Cat.scala 29:58] + node _T_211 = cat(_T_210, _T_201) @[Cat.scala 29:58] + node ld_byte_hitvec_hi_2 = cat(_T_211, _T_197) @[Cat.scala 29:58] + node _T_212 = bits(buf_byteen[0], 3, 3) @[el2_lsu_bus_buffer.scala 193:110] + node _T_213 = and(ld_addr_hitvec_hi_0, _T_212) @[el2_lsu_bus_buffer.scala 193:95] + node _T_214 = bits(ldst_byteen_hi_m, 3, 3) @[el2_lsu_bus_buffer.scala 193:132] + node _T_215 = and(_T_213, _T_214) @[el2_lsu_bus_buffer.scala 193:114] + node _T_216 = bits(buf_byteen[1], 3, 3) @[el2_lsu_bus_buffer.scala 193:110] + node _T_217 = and(ld_addr_hitvec_hi_1, _T_216) @[el2_lsu_bus_buffer.scala 193:95] + node _T_218 = bits(ldst_byteen_hi_m, 3, 3) @[el2_lsu_bus_buffer.scala 193:132] + node _T_219 = and(_T_217, _T_218) @[el2_lsu_bus_buffer.scala 193:114] + node _T_220 = bits(buf_byteen[2], 3, 3) @[el2_lsu_bus_buffer.scala 193:110] + node _T_221 = and(ld_addr_hitvec_hi_2, _T_220) @[el2_lsu_bus_buffer.scala 193:95] + node _T_222 = bits(ldst_byteen_hi_m, 3, 3) @[el2_lsu_bus_buffer.scala 193:132] + node _T_223 = and(_T_221, _T_222) @[el2_lsu_bus_buffer.scala 193:114] + node _T_224 = bits(buf_byteen[3], 3, 3) @[el2_lsu_bus_buffer.scala 193:110] + node _T_225 = and(ld_addr_hitvec_hi_3, _T_224) @[el2_lsu_bus_buffer.scala 193:95] + node _T_226 = bits(ldst_byteen_hi_m, 3, 3) @[el2_lsu_bus_buffer.scala 193:132] + node _T_227 = and(_T_225, _T_226) @[el2_lsu_bus_buffer.scala 193:114] + node _T_228 = cat(_T_227, _T_223) @[Cat.scala 29:58] + node _T_229 = cat(_T_228, _T_219) @[Cat.scala 29:58] + node ld_byte_hitvec_hi_3 = cat(_T_229, _T_215) @[Cat.scala 29:58] + wire buf_age_younger : UInt<4>[4] @[el2_lsu_bus_buffer.scala 195:29] + buf_age_younger[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 196:19] + buf_age_younger[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 196:19] + buf_age_younger[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 196:19] + buf_age_younger[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 196:19] + node _T_230 = bits(ld_byte_hitvec_lo_0, 0, 0) @[el2_lsu_bus_buffer.scala 197:93] + node _T_231 = and(ld_byte_hitvec_lo_0, buf_age_younger[0]) @[el2_lsu_bus_buffer.scala 197:122] + node _T_232 = orr(_T_231) @[el2_lsu_bus_buffer.scala 197:144] + node _T_233 = eq(_T_232, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99] + node _T_234 = and(_T_230, _T_233) @[el2_lsu_bus_buffer.scala 197:97] + node _T_235 = bits(ld_byte_ibuf_hit_lo, 0, 0) @[el2_lsu_bus_buffer.scala 197:170] + node _T_236 = eq(_T_235, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150] + node _T_237 = and(_T_234, _T_236) @[el2_lsu_bus_buffer.scala 197:148] + node _T_238 = bits(ld_byte_hitvec_lo_0, 1, 1) @[el2_lsu_bus_buffer.scala 197:93] + node _T_239 = and(ld_byte_hitvec_lo_0, buf_age_younger[1]) @[el2_lsu_bus_buffer.scala 197:122] + node _T_240 = orr(_T_239) @[el2_lsu_bus_buffer.scala 197:144] + node _T_241 = eq(_T_240, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99] + node _T_242 = and(_T_238, _T_241) @[el2_lsu_bus_buffer.scala 197:97] + node _T_243 = bits(ld_byte_ibuf_hit_lo, 0, 0) @[el2_lsu_bus_buffer.scala 197:170] + node _T_244 = eq(_T_243, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150] + node _T_245 = and(_T_242, _T_244) @[el2_lsu_bus_buffer.scala 197:148] + node _T_246 = bits(ld_byte_hitvec_lo_0, 2, 2) @[el2_lsu_bus_buffer.scala 197:93] + node _T_247 = and(ld_byte_hitvec_lo_0, buf_age_younger[2]) @[el2_lsu_bus_buffer.scala 197:122] + node _T_248 = orr(_T_247) @[el2_lsu_bus_buffer.scala 197:144] + node _T_249 = eq(_T_248, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99] + node _T_250 = and(_T_246, _T_249) @[el2_lsu_bus_buffer.scala 197:97] + node _T_251 = bits(ld_byte_ibuf_hit_lo, 0, 0) @[el2_lsu_bus_buffer.scala 197:170] + node _T_252 = eq(_T_251, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150] + node _T_253 = and(_T_250, _T_252) @[el2_lsu_bus_buffer.scala 197:148] + node _T_254 = bits(ld_byte_hitvec_lo_0, 3, 3) @[el2_lsu_bus_buffer.scala 197:93] + node _T_255 = and(ld_byte_hitvec_lo_0, buf_age_younger[3]) @[el2_lsu_bus_buffer.scala 197:122] + node _T_256 = orr(_T_255) @[el2_lsu_bus_buffer.scala 197:144] + node _T_257 = eq(_T_256, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99] + node _T_258 = and(_T_254, _T_257) @[el2_lsu_bus_buffer.scala 197:97] + node _T_259 = bits(ld_byte_ibuf_hit_lo, 0, 0) @[el2_lsu_bus_buffer.scala 197:170] + node _T_260 = eq(_T_259, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150] + node _T_261 = and(_T_258, _T_260) @[el2_lsu_bus_buffer.scala 197:148] + node _T_262 = cat(_T_261, _T_253) @[Cat.scala 29:58] + node _T_263 = cat(_T_262, _T_245) @[Cat.scala 29:58] + node _T_264 = cat(_T_263, _T_237) @[Cat.scala 29:58] + node _T_265 = bits(ld_byte_hitvec_lo_1, 0, 0) @[el2_lsu_bus_buffer.scala 197:93] + node _T_266 = and(ld_byte_hitvec_lo_1, buf_age_younger[0]) @[el2_lsu_bus_buffer.scala 197:122] + node _T_267 = orr(_T_266) @[el2_lsu_bus_buffer.scala 197:144] + node _T_268 = eq(_T_267, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99] + node _T_269 = and(_T_265, _T_268) @[el2_lsu_bus_buffer.scala 197:97] + node _T_270 = bits(ld_byte_ibuf_hit_lo, 1, 1) @[el2_lsu_bus_buffer.scala 197:170] + node _T_271 = eq(_T_270, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150] + node _T_272 = and(_T_269, _T_271) @[el2_lsu_bus_buffer.scala 197:148] + node _T_273 = bits(ld_byte_hitvec_lo_1, 1, 1) @[el2_lsu_bus_buffer.scala 197:93] + node _T_274 = and(ld_byte_hitvec_lo_1, buf_age_younger[1]) @[el2_lsu_bus_buffer.scala 197:122] + node _T_275 = orr(_T_274) @[el2_lsu_bus_buffer.scala 197:144] + node _T_276 = eq(_T_275, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99] + node _T_277 = and(_T_273, _T_276) @[el2_lsu_bus_buffer.scala 197:97] + node _T_278 = bits(ld_byte_ibuf_hit_lo, 1, 1) @[el2_lsu_bus_buffer.scala 197:170] + node _T_279 = eq(_T_278, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150] + node _T_280 = and(_T_277, _T_279) @[el2_lsu_bus_buffer.scala 197:148] + node _T_281 = bits(ld_byte_hitvec_lo_1, 2, 2) @[el2_lsu_bus_buffer.scala 197:93] + node _T_282 = and(ld_byte_hitvec_lo_1, buf_age_younger[2]) @[el2_lsu_bus_buffer.scala 197:122] + node _T_283 = orr(_T_282) @[el2_lsu_bus_buffer.scala 197:144] + node _T_284 = eq(_T_283, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99] + node _T_285 = and(_T_281, _T_284) @[el2_lsu_bus_buffer.scala 197:97] + node _T_286 = bits(ld_byte_ibuf_hit_lo, 1, 1) @[el2_lsu_bus_buffer.scala 197:170] + node _T_287 = eq(_T_286, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150] + node _T_288 = and(_T_285, _T_287) @[el2_lsu_bus_buffer.scala 197:148] + node _T_289 = bits(ld_byte_hitvec_lo_1, 3, 3) @[el2_lsu_bus_buffer.scala 197:93] + node _T_290 = and(ld_byte_hitvec_lo_1, buf_age_younger[3]) @[el2_lsu_bus_buffer.scala 197:122] + node _T_291 = orr(_T_290) @[el2_lsu_bus_buffer.scala 197:144] + node _T_292 = eq(_T_291, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99] + node _T_293 = and(_T_289, _T_292) @[el2_lsu_bus_buffer.scala 197:97] + node _T_294 = bits(ld_byte_ibuf_hit_lo, 1, 1) @[el2_lsu_bus_buffer.scala 197:170] + node _T_295 = eq(_T_294, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150] + node _T_296 = and(_T_293, _T_295) @[el2_lsu_bus_buffer.scala 197:148] + node _T_297 = cat(_T_296, _T_288) @[Cat.scala 29:58] + node _T_298 = cat(_T_297, _T_280) @[Cat.scala 29:58] + node _T_299 = cat(_T_298, _T_272) @[Cat.scala 29:58] + node _T_300 = bits(ld_byte_hitvec_lo_2, 0, 0) @[el2_lsu_bus_buffer.scala 197:93] + node _T_301 = and(ld_byte_hitvec_lo_2, buf_age_younger[0]) @[el2_lsu_bus_buffer.scala 197:122] + node _T_302 = orr(_T_301) @[el2_lsu_bus_buffer.scala 197:144] + node _T_303 = eq(_T_302, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99] + node _T_304 = and(_T_300, _T_303) @[el2_lsu_bus_buffer.scala 197:97] + node _T_305 = bits(ld_byte_ibuf_hit_lo, 2, 2) @[el2_lsu_bus_buffer.scala 197:170] + node _T_306 = eq(_T_305, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150] + node _T_307 = and(_T_304, _T_306) @[el2_lsu_bus_buffer.scala 197:148] + node _T_308 = bits(ld_byte_hitvec_lo_2, 1, 1) @[el2_lsu_bus_buffer.scala 197:93] + node _T_309 = and(ld_byte_hitvec_lo_2, buf_age_younger[1]) @[el2_lsu_bus_buffer.scala 197:122] + node _T_310 = orr(_T_309) @[el2_lsu_bus_buffer.scala 197:144] + node _T_311 = eq(_T_310, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99] + node _T_312 = and(_T_308, _T_311) @[el2_lsu_bus_buffer.scala 197:97] + node _T_313 = bits(ld_byte_ibuf_hit_lo, 2, 2) @[el2_lsu_bus_buffer.scala 197:170] + node _T_314 = eq(_T_313, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150] + node _T_315 = and(_T_312, _T_314) @[el2_lsu_bus_buffer.scala 197:148] + node _T_316 = bits(ld_byte_hitvec_lo_2, 2, 2) @[el2_lsu_bus_buffer.scala 197:93] + node _T_317 = and(ld_byte_hitvec_lo_2, buf_age_younger[2]) @[el2_lsu_bus_buffer.scala 197:122] + node _T_318 = orr(_T_317) @[el2_lsu_bus_buffer.scala 197:144] + node _T_319 = eq(_T_318, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99] + node _T_320 = and(_T_316, _T_319) @[el2_lsu_bus_buffer.scala 197:97] + node _T_321 = bits(ld_byte_ibuf_hit_lo, 2, 2) @[el2_lsu_bus_buffer.scala 197:170] + node _T_322 = eq(_T_321, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150] + node _T_323 = and(_T_320, _T_322) @[el2_lsu_bus_buffer.scala 197:148] + node _T_324 = bits(ld_byte_hitvec_lo_2, 3, 3) @[el2_lsu_bus_buffer.scala 197:93] + node _T_325 = and(ld_byte_hitvec_lo_2, buf_age_younger[3]) @[el2_lsu_bus_buffer.scala 197:122] + node _T_326 = orr(_T_325) @[el2_lsu_bus_buffer.scala 197:144] + node _T_327 = eq(_T_326, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99] + node _T_328 = and(_T_324, _T_327) @[el2_lsu_bus_buffer.scala 197:97] + node _T_329 = bits(ld_byte_ibuf_hit_lo, 2, 2) @[el2_lsu_bus_buffer.scala 197:170] + node _T_330 = eq(_T_329, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150] + node _T_331 = and(_T_328, _T_330) @[el2_lsu_bus_buffer.scala 197:148] + node _T_332 = cat(_T_331, _T_323) @[Cat.scala 29:58] + node _T_333 = cat(_T_332, _T_315) @[Cat.scala 29:58] + node _T_334 = cat(_T_333, _T_307) @[Cat.scala 29:58] + node _T_335 = bits(ld_byte_hitvec_lo_3, 0, 0) @[el2_lsu_bus_buffer.scala 197:93] + node _T_336 = and(ld_byte_hitvec_lo_3, buf_age_younger[0]) @[el2_lsu_bus_buffer.scala 197:122] + node _T_337 = orr(_T_336) @[el2_lsu_bus_buffer.scala 197:144] + node _T_338 = eq(_T_337, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99] + node _T_339 = and(_T_335, _T_338) @[el2_lsu_bus_buffer.scala 197:97] + node _T_340 = bits(ld_byte_ibuf_hit_lo, 3, 3) @[el2_lsu_bus_buffer.scala 197:170] + node _T_341 = eq(_T_340, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150] + node _T_342 = and(_T_339, _T_341) @[el2_lsu_bus_buffer.scala 197:148] + node _T_343 = bits(ld_byte_hitvec_lo_3, 1, 1) @[el2_lsu_bus_buffer.scala 197:93] + node _T_344 = and(ld_byte_hitvec_lo_3, buf_age_younger[1]) @[el2_lsu_bus_buffer.scala 197:122] + node _T_345 = orr(_T_344) @[el2_lsu_bus_buffer.scala 197:144] + node _T_346 = eq(_T_345, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99] + node _T_347 = and(_T_343, _T_346) @[el2_lsu_bus_buffer.scala 197:97] + node _T_348 = bits(ld_byte_ibuf_hit_lo, 3, 3) @[el2_lsu_bus_buffer.scala 197:170] + node _T_349 = eq(_T_348, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150] + node _T_350 = and(_T_347, _T_349) @[el2_lsu_bus_buffer.scala 197:148] + node _T_351 = bits(ld_byte_hitvec_lo_3, 2, 2) @[el2_lsu_bus_buffer.scala 197:93] + node _T_352 = and(ld_byte_hitvec_lo_3, buf_age_younger[2]) @[el2_lsu_bus_buffer.scala 197:122] + node _T_353 = orr(_T_352) @[el2_lsu_bus_buffer.scala 197:144] + node _T_354 = eq(_T_353, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99] + node _T_355 = and(_T_351, _T_354) @[el2_lsu_bus_buffer.scala 197:97] + node _T_356 = bits(ld_byte_ibuf_hit_lo, 3, 3) @[el2_lsu_bus_buffer.scala 197:170] + node _T_357 = eq(_T_356, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150] + node _T_358 = and(_T_355, _T_357) @[el2_lsu_bus_buffer.scala 197:148] + node _T_359 = bits(ld_byte_hitvec_lo_3, 3, 3) @[el2_lsu_bus_buffer.scala 197:93] + node _T_360 = and(ld_byte_hitvec_lo_3, buf_age_younger[3]) @[el2_lsu_bus_buffer.scala 197:122] + node _T_361 = orr(_T_360) @[el2_lsu_bus_buffer.scala 197:144] + node _T_362 = eq(_T_361, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99] + node _T_363 = and(_T_359, _T_362) @[el2_lsu_bus_buffer.scala 197:97] + node _T_364 = bits(ld_byte_ibuf_hit_lo, 3, 3) @[el2_lsu_bus_buffer.scala 197:170] + node _T_365 = eq(_T_364, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150] + node _T_366 = and(_T_363, _T_365) @[el2_lsu_bus_buffer.scala 197:148] + node _T_367 = cat(_T_366, _T_358) @[Cat.scala 29:58] + node _T_368 = cat(_T_367, _T_350) @[Cat.scala 29:58] + node _T_369 = cat(_T_368, _T_342) @[Cat.scala 29:58] + ld_byte_hitvecfn_lo[0] <= _T_264 @[el2_lsu_bus_buffer.scala 197:23] + ld_byte_hitvecfn_lo[1] <= _T_299 @[el2_lsu_bus_buffer.scala 197:23] + ld_byte_hitvecfn_lo[2] <= _T_334 @[el2_lsu_bus_buffer.scala 197:23] + ld_byte_hitvecfn_lo[3] <= _T_369 @[el2_lsu_bus_buffer.scala 197:23] + node _T_370 = bits(ld_byte_hitvec_hi_0, 0, 0) @[el2_lsu_bus_buffer.scala 198:93] + node _T_371 = and(ld_byte_hitvec_hi_0, buf_age_younger[0]) @[el2_lsu_bus_buffer.scala 198:122] + node _T_372 = orr(_T_371) @[el2_lsu_bus_buffer.scala 198:144] + node _T_373 = eq(_T_372, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:99] + node _T_374 = and(_T_370, _T_373) @[el2_lsu_bus_buffer.scala 198:97] + node _T_375 = bits(ld_byte_ibuf_hit_hi, 0, 0) @[el2_lsu_bus_buffer.scala 198:170] + node _T_376 = eq(_T_375, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:150] + node _T_377 = and(_T_374, _T_376) @[el2_lsu_bus_buffer.scala 198:148] + node _T_378 = bits(ld_byte_hitvec_hi_0, 1, 1) @[el2_lsu_bus_buffer.scala 198:93] + node _T_379 = and(ld_byte_hitvec_hi_0, buf_age_younger[1]) @[el2_lsu_bus_buffer.scala 198:122] + node _T_380 = orr(_T_379) @[el2_lsu_bus_buffer.scala 198:144] + node _T_381 = eq(_T_380, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:99] + node _T_382 = and(_T_378, _T_381) @[el2_lsu_bus_buffer.scala 198:97] + node _T_383 = bits(ld_byte_ibuf_hit_hi, 0, 0) @[el2_lsu_bus_buffer.scala 198:170] + node _T_384 = eq(_T_383, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:150] + node _T_385 = and(_T_382, _T_384) @[el2_lsu_bus_buffer.scala 198:148] + node _T_386 = bits(ld_byte_hitvec_hi_0, 2, 2) @[el2_lsu_bus_buffer.scala 198:93] + node _T_387 = and(ld_byte_hitvec_hi_0, buf_age_younger[2]) @[el2_lsu_bus_buffer.scala 198:122] + node _T_388 = orr(_T_387) @[el2_lsu_bus_buffer.scala 198:144] + node _T_389 = eq(_T_388, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:99] + node _T_390 = and(_T_386, _T_389) @[el2_lsu_bus_buffer.scala 198:97] + node _T_391 = bits(ld_byte_ibuf_hit_hi, 0, 0) @[el2_lsu_bus_buffer.scala 198:170] + node _T_392 = eq(_T_391, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:150] + node _T_393 = and(_T_390, _T_392) @[el2_lsu_bus_buffer.scala 198:148] + node _T_394 = bits(ld_byte_hitvec_hi_0, 3, 3) @[el2_lsu_bus_buffer.scala 198:93] + node _T_395 = and(ld_byte_hitvec_hi_0, buf_age_younger[3]) @[el2_lsu_bus_buffer.scala 198:122] + node _T_396 = orr(_T_395) @[el2_lsu_bus_buffer.scala 198:144] + node _T_397 = eq(_T_396, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:99] + node _T_398 = and(_T_394, _T_397) @[el2_lsu_bus_buffer.scala 198:97] + node _T_399 = bits(ld_byte_ibuf_hit_hi, 0, 0) @[el2_lsu_bus_buffer.scala 198:170] + node _T_400 = eq(_T_399, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:150] + node _T_401 = and(_T_398, _T_400) @[el2_lsu_bus_buffer.scala 198:148] + node _T_402 = cat(_T_401, _T_393) @[Cat.scala 29:58] + node _T_403 = cat(_T_402, _T_385) @[Cat.scala 29:58] + node _T_404 = cat(_T_403, _T_377) @[Cat.scala 29:58] + node _T_405 = bits(ld_byte_hitvec_hi_1, 0, 0) @[el2_lsu_bus_buffer.scala 198:93] + node _T_406 = and(ld_byte_hitvec_hi_1, buf_age_younger[0]) @[el2_lsu_bus_buffer.scala 198:122] + node _T_407 = orr(_T_406) @[el2_lsu_bus_buffer.scala 198:144] + node _T_408 = eq(_T_407, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:99] + node _T_409 = and(_T_405, _T_408) @[el2_lsu_bus_buffer.scala 198:97] + node _T_410 = bits(ld_byte_ibuf_hit_hi, 1, 1) @[el2_lsu_bus_buffer.scala 198:170] + node _T_411 = eq(_T_410, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:150] + node _T_412 = and(_T_409, _T_411) @[el2_lsu_bus_buffer.scala 198:148] + node _T_413 = bits(ld_byte_hitvec_hi_1, 1, 1) @[el2_lsu_bus_buffer.scala 198:93] + node _T_414 = and(ld_byte_hitvec_hi_1, buf_age_younger[1]) @[el2_lsu_bus_buffer.scala 198:122] + node _T_415 = orr(_T_414) @[el2_lsu_bus_buffer.scala 198:144] + node _T_416 = eq(_T_415, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:99] + node _T_417 = and(_T_413, _T_416) @[el2_lsu_bus_buffer.scala 198:97] + node _T_418 = bits(ld_byte_ibuf_hit_hi, 1, 1) @[el2_lsu_bus_buffer.scala 198:170] + node _T_419 = eq(_T_418, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:150] + node _T_420 = and(_T_417, _T_419) @[el2_lsu_bus_buffer.scala 198:148] + node _T_421 = bits(ld_byte_hitvec_hi_1, 2, 2) @[el2_lsu_bus_buffer.scala 198:93] + node _T_422 = and(ld_byte_hitvec_hi_1, buf_age_younger[2]) @[el2_lsu_bus_buffer.scala 198:122] + node _T_423 = orr(_T_422) @[el2_lsu_bus_buffer.scala 198:144] + node _T_424 = eq(_T_423, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:99] + node _T_425 = and(_T_421, _T_424) @[el2_lsu_bus_buffer.scala 198:97] + node _T_426 = bits(ld_byte_ibuf_hit_hi, 1, 1) @[el2_lsu_bus_buffer.scala 198:170] + node _T_427 = eq(_T_426, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:150] + node _T_428 = and(_T_425, _T_427) @[el2_lsu_bus_buffer.scala 198:148] + node _T_429 = bits(ld_byte_hitvec_hi_1, 3, 3) @[el2_lsu_bus_buffer.scala 198:93] + node _T_430 = and(ld_byte_hitvec_hi_1, buf_age_younger[3]) @[el2_lsu_bus_buffer.scala 198:122] + node _T_431 = orr(_T_430) @[el2_lsu_bus_buffer.scala 198:144] + node _T_432 = eq(_T_431, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:99] + node _T_433 = and(_T_429, _T_432) @[el2_lsu_bus_buffer.scala 198:97] + node _T_434 = bits(ld_byte_ibuf_hit_hi, 1, 1) @[el2_lsu_bus_buffer.scala 198:170] + node _T_435 = eq(_T_434, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:150] + node _T_436 = and(_T_433, _T_435) @[el2_lsu_bus_buffer.scala 198:148] + node _T_437 = cat(_T_436, _T_428) @[Cat.scala 29:58] + node _T_438 = cat(_T_437, _T_420) @[Cat.scala 29:58] + node _T_439 = cat(_T_438, _T_412) @[Cat.scala 29:58] + node _T_440 = bits(ld_byte_hitvec_hi_2, 0, 0) @[el2_lsu_bus_buffer.scala 198:93] + node _T_441 = and(ld_byte_hitvec_hi_2, buf_age_younger[0]) @[el2_lsu_bus_buffer.scala 198:122] + node _T_442 = orr(_T_441) @[el2_lsu_bus_buffer.scala 198:144] + node _T_443 = eq(_T_442, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:99] + node _T_444 = and(_T_440, _T_443) @[el2_lsu_bus_buffer.scala 198:97] + node _T_445 = bits(ld_byte_ibuf_hit_hi, 2, 2) @[el2_lsu_bus_buffer.scala 198:170] + node _T_446 = eq(_T_445, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:150] + node _T_447 = and(_T_444, _T_446) @[el2_lsu_bus_buffer.scala 198:148] + node _T_448 = bits(ld_byte_hitvec_hi_2, 1, 1) @[el2_lsu_bus_buffer.scala 198:93] + node _T_449 = and(ld_byte_hitvec_hi_2, buf_age_younger[1]) @[el2_lsu_bus_buffer.scala 198:122] + node _T_450 = orr(_T_449) @[el2_lsu_bus_buffer.scala 198:144] + node _T_451 = eq(_T_450, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:99] + node _T_452 = and(_T_448, _T_451) @[el2_lsu_bus_buffer.scala 198:97] + node _T_453 = bits(ld_byte_ibuf_hit_hi, 2, 2) @[el2_lsu_bus_buffer.scala 198:170] + node _T_454 = eq(_T_453, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:150] + node _T_455 = and(_T_452, _T_454) @[el2_lsu_bus_buffer.scala 198:148] + node _T_456 = bits(ld_byte_hitvec_hi_2, 2, 2) @[el2_lsu_bus_buffer.scala 198:93] + node _T_457 = and(ld_byte_hitvec_hi_2, buf_age_younger[2]) @[el2_lsu_bus_buffer.scala 198:122] + node _T_458 = orr(_T_457) @[el2_lsu_bus_buffer.scala 198:144] + node _T_459 = eq(_T_458, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:99] + node _T_460 = and(_T_456, _T_459) @[el2_lsu_bus_buffer.scala 198:97] + node _T_461 = bits(ld_byte_ibuf_hit_hi, 2, 2) @[el2_lsu_bus_buffer.scala 198:170] + node _T_462 = eq(_T_461, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:150] + node _T_463 = and(_T_460, _T_462) @[el2_lsu_bus_buffer.scala 198:148] + node _T_464 = bits(ld_byte_hitvec_hi_2, 3, 3) @[el2_lsu_bus_buffer.scala 198:93] + node _T_465 = and(ld_byte_hitvec_hi_2, buf_age_younger[3]) @[el2_lsu_bus_buffer.scala 198:122] + node _T_466 = orr(_T_465) @[el2_lsu_bus_buffer.scala 198:144] + node _T_467 = eq(_T_466, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:99] + node _T_468 = and(_T_464, _T_467) @[el2_lsu_bus_buffer.scala 198:97] + node _T_469 = bits(ld_byte_ibuf_hit_hi, 2, 2) @[el2_lsu_bus_buffer.scala 198:170] + node _T_470 = eq(_T_469, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:150] + node _T_471 = and(_T_468, _T_470) @[el2_lsu_bus_buffer.scala 198:148] + node _T_472 = cat(_T_471, _T_463) @[Cat.scala 29:58] + node _T_473 = cat(_T_472, _T_455) @[Cat.scala 29:58] + node _T_474 = cat(_T_473, _T_447) @[Cat.scala 29:58] + node _T_475 = bits(ld_byte_hitvec_hi_3, 0, 0) @[el2_lsu_bus_buffer.scala 198:93] + node _T_476 = and(ld_byte_hitvec_hi_3, buf_age_younger[0]) @[el2_lsu_bus_buffer.scala 198:122] + node _T_477 = orr(_T_476) @[el2_lsu_bus_buffer.scala 198:144] + node _T_478 = eq(_T_477, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:99] + node _T_479 = and(_T_475, _T_478) @[el2_lsu_bus_buffer.scala 198:97] + node _T_480 = bits(ld_byte_ibuf_hit_hi, 3, 3) @[el2_lsu_bus_buffer.scala 198:170] + node _T_481 = eq(_T_480, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:150] + node _T_482 = and(_T_479, _T_481) @[el2_lsu_bus_buffer.scala 198:148] + node _T_483 = bits(ld_byte_hitvec_hi_3, 1, 1) @[el2_lsu_bus_buffer.scala 198:93] + node _T_484 = and(ld_byte_hitvec_hi_3, buf_age_younger[1]) @[el2_lsu_bus_buffer.scala 198:122] + node _T_485 = orr(_T_484) @[el2_lsu_bus_buffer.scala 198:144] + node _T_486 = eq(_T_485, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:99] + node _T_487 = and(_T_483, _T_486) @[el2_lsu_bus_buffer.scala 198:97] + node _T_488 = bits(ld_byte_ibuf_hit_hi, 3, 3) @[el2_lsu_bus_buffer.scala 198:170] + node _T_489 = eq(_T_488, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:150] + node _T_490 = and(_T_487, _T_489) @[el2_lsu_bus_buffer.scala 198:148] + node _T_491 = bits(ld_byte_hitvec_hi_3, 2, 2) @[el2_lsu_bus_buffer.scala 198:93] + node _T_492 = and(ld_byte_hitvec_hi_3, buf_age_younger[2]) @[el2_lsu_bus_buffer.scala 198:122] + node _T_493 = orr(_T_492) @[el2_lsu_bus_buffer.scala 198:144] + node _T_494 = eq(_T_493, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:99] + node _T_495 = and(_T_491, _T_494) @[el2_lsu_bus_buffer.scala 198:97] + node _T_496 = bits(ld_byte_ibuf_hit_hi, 3, 3) @[el2_lsu_bus_buffer.scala 198:170] + node _T_497 = eq(_T_496, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:150] + node _T_498 = and(_T_495, _T_497) @[el2_lsu_bus_buffer.scala 198:148] + node _T_499 = bits(ld_byte_hitvec_hi_3, 3, 3) @[el2_lsu_bus_buffer.scala 198:93] + node _T_500 = and(ld_byte_hitvec_hi_3, buf_age_younger[3]) @[el2_lsu_bus_buffer.scala 198:122] + node _T_501 = orr(_T_500) @[el2_lsu_bus_buffer.scala 198:144] + node _T_502 = eq(_T_501, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:99] + node _T_503 = and(_T_499, _T_502) @[el2_lsu_bus_buffer.scala 198:97] + node _T_504 = bits(ld_byte_ibuf_hit_hi, 3, 3) @[el2_lsu_bus_buffer.scala 198:170] + node _T_505 = eq(_T_504, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 198:150] + node _T_506 = and(_T_503, _T_505) @[el2_lsu_bus_buffer.scala 198:148] + node _T_507 = cat(_T_506, _T_498) @[Cat.scala 29:58] + node _T_508 = cat(_T_507, _T_490) @[Cat.scala 29:58] + node _T_509 = cat(_T_508, _T_482) @[Cat.scala 29:58] + ld_byte_hitvecfn_hi[0] <= _T_404 @[el2_lsu_bus_buffer.scala 198:23] + ld_byte_hitvecfn_hi[1] <= _T_439 @[el2_lsu_bus_buffer.scala 198:23] + ld_byte_hitvecfn_hi[2] <= _T_474 @[el2_lsu_bus_buffer.scala 198:23] + ld_byte_hitvecfn_hi[3] <= _T_509 @[el2_lsu_bus_buffer.scala 198:23] + wire ibuf_addr : UInt<32> + ibuf_addr <= UInt<1>("h00") + wire ibuf_write : UInt<1> + ibuf_write <= UInt<1>("h00") + wire ibuf_valid : UInt<1> + ibuf_valid <= UInt<1>("h00") + node _T_510 = bits(io.lsu_addr_m, 31, 2) @[el2_lsu_bus_buffer.scala 203:43] + node _T_511 = bits(ibuf_addr, 31, 2) @[el2_lsu_bus_buffer.scala 203:64] + node _T_512 = eq(_T_510, _T_511) @[el2_lsu_bus_buffer.scala 203:51] + node _T_513 = and(_T_512, ibuf_write) @[el2_lsu_bus_buffer.scala 203:73] + node _T_514 = and(_T_513, ibuf_valid) @[el2_lsu_bus_buffer.scala 203:86] + node ld_addr_ibuf_hit_lo = and(_T_514, io.lsu_busreq_m) @[el2_lsu_bus_buffer.scala 203:99] + node _T_515 = bits(io.end_addr_m, 31, 2) @[el2_lsu_bus_buffer.scala 204:43] + node _T_516 = bits(ibuf_addr, 31, 2) @[el2_lsu_bus_buffer.scala 204:64] + node _T_517 = eq(_T_515, _T_516) @[el2_lsu_bus_buffer.scala 204:51] + node _T_518 = and(_T_517, ibuf_write) @[el2_lsu_bus_buffer.scala 204:73] + node _T_519 = and(_T_518, ibuf_valid) @[el2_lsu_bus_buffer.scala 204:86] + node ld_addr_ibuf_hit_hi = and(_T_519, io.lsu_busreq_m) @[el2_lsu_bus_buffer.scala 204:99] + wire ibuf_byteen : UInt<4> + ibuf_byteen <= UInt<1>("h00") + node _T_520 = bits(ld_addr_ibuf_hit_lo, 0, 0) @[Bitwise.scala 72:15] + node _T_521 = mux(_T_520, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_522 = and(_T_521, ibuf_byteen) @[el2_lsu_bus_buffer.scala 208:55] + node _T_523 = and(_T_522, ldst_byteen_lo_m) @[el2_lsu_bus_buffer.scala 208:69] + ld_byte_ibuf_hit_lo <= _T_523 @[el2_lsu_bus_buffer.scala 208:23] + node _T_524 = bits(ld_addr_ibuf_hit_hi, 0, 0) @[Bitwise.scala 72:15] + node _T_525 = mux(_T_524, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_526 = and(_T_525, ibuf_byteen) @[el2_lsu_bus_buffer.scala 209:55] + node _T_527 = and(_T_526, ldst_byteen_hi_m) @[el2_lsu_bus_buffer.scala 209:69] + ld_byte_ibuf_hit_hi <= _T_527 @[el2_lsu_bus_buffer.scala 209:23] + wire buf_data : UInt<32>[4] @[el2_lsu_bus_buffer.scala 211:22] + buf_data[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 212:12] + buf_data[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 212:12] + buf_data[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 212:12] + buf_data[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 212:12] + wire fwd_data : UInt<32> + fwd_data <= UInt<1>("h00") + node _T_528 = bits(ld_byte_ibuf_hit_lo, 0, 0) @[el2_lsu_bus_buffer.scala 214:81] + node _T_529 = bits(_T_528, 0, 0) @[Bitwise.scala 72:15] + node _T_530 = mux(_T_529, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_531 = bits(ld_byte_ibuf_hit_lo, 1, 1) @[el2_lsu_bus_buffer.scala 214:81] + node _T_532 = bits(_T_531, 0, 0) @[Bitwise.scala 72:15] + node _T_533 = mux(_T_532, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_534 = bits(ld_byte_ibuf_hit_lo, 2, 2) @[el2_lsu_bus_buffer.scala 214:81] + node _T_535 = bits(_T_534, 0, 0) @[Bitwise.scala 72:15] + node _T_536 = mux(_T_535, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_537 = bits(ld_byte_ibuf_hit_lo, 3, 3) @[el2_lsu_bus_buffer.scala 214:81] + node _T_538 = bits(_T_537, 0, 0) @[Bitwise.scala 72:15] + node _T_539 = mux(_T_538, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_540 = cat(_T_539, _T_536) @[Cat.scala 29:58] + node _T_541 = cat(_T_540, _T_533) @[Cat.scala 29:58] + node ld_fwddata_buf_lo_initial = cat(_T_541, _T_530) @[Cat.scala 29:58] + node _T_542 = bits(ld_byte_ibuf_hit_hi, 0, 0) @[el2_lsu_bus_buffer.scala 215:81] + node _T_543 = bits(_T_542, 0, 0) @[Bitwise.scala 72:15] + node _T_544 = mux(_T_543, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_545 = bits(ld_byte_ibuf_hit_hi, 1, 1) @[el2_lsu_bus_buffer.scala 215:81] + node _T_546 = bits(_T_545, 0, 0) @[Bitwise.scala 72:15] + node _T_547 = mux(_T_546, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_548 = bits(ld_byte_ibuf_hit_hi, 2, 2) @[el2_lsu_bus_buffer.scala 215:81] + node _T_549 = bits(_T_548, 0, 0) @[Bitwise.scala 72:15] + node _T_550 = mux(_T_549, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_551 = bits(ld_byte_ibuf_hit_hi, 3, 3) @[el2_lsu_bus_buffer.scala 215:81] + node _T_552 = bits(_T_551, 0, 0) @[Bitwise.scala 72:15] + node _T_553 = mux(_T_552, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_554 = cat(_T_553, _T_550) @[Cat.scala 29:58] + node _T_555 = cat(_T_554, _T_547) @[Cat.scala 29:58] + node ld_fwddata_buf_hi_initial = cat(_T_555, _T_544) @[Cat.scala 29:58] + node _T_556 = bits(ld_byte_hitvecfn_lo[3], 0, 0) @[el2_lsu_bus_buffer.scala 216:86] + node _T_557 = bits(_T_556, 0, 0) @[Bitwise.scala 72:15] + node _T_558 = mux(_T_557, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_559 = bits(buf_data[0], 31, 24) @[el2_lsu_bus_buffer.scala 216:104] + node _T_560 = and(_T_558, _T_559) @[el2_lsu_bus_buffer.scala 216:91] + node _T_561 = bits(ld_byte_hitvecfn_lo[3], 1, 1) @[el2_lsu_bus_buffer.scala 216:86] + node _T_562 = bits(_T_561, 0, 0) @[Bitwise.scala 72:15] + node _T_563 = mux(_T_562, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_564 = bits(buf_data[1], 31, 24) @[el2_lsu_bus_buffer.scala 216:104] + node _T_565 = and(_T_563, _T_564) @[el2_lsu_bus_buffer.scala 216:91] + node _T_566 = bits(ld_byte_hitvecfn_lo[3], 2, 2) @[el2_lsu_bus_buffer.scala 216:86] + node _T_567 = bits(_T_566, 0, 0) @[Bitwise.scala 72:15] + node _T_568 = mux(_T_567, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_569 = bits(buf_data[2], 31, 24) @[el2_lsu_bus_buffer.scala 216:104] + node _T_570 = and(_T_568, _T_569) @[el2_lsu_bus_buffer.scala 216:91] + node _T_571 = bits(ld_byte_hitvecfn_lo[3], 3, 3) @[el2_lsu_bus_buffer.scala 216:86] + node _T_572 = bits(_T_571, 0, 0) @[Bitwise.scala 72:15] + node _T_573 = mux(_T_572, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_574 = bits(buf_data[3], 31, 24) @[el2_lsu_bus_buffer.scala 216:104] + node _T_575 = and(_T_573, _T_574) @[el2_lsu_bus_buffer.scala 216:91] + node _T_576 = or(_T_560, _T_565) @[el2_lsu_bus_buffer.scala 216:123] + node _T_577 = or(_T_576, _T_570) @[el2_lsu_bus_buffer.scala 216:123] + node _T_578 = or(_T_577, _T_575) @[el2_lsu_bus_buffer.scala 216:123] + node _T_579 = bits(ld_byte_hitvecfn_lo[2], 0, 0) @[el2_lsu_bus_buffer.scala 217:86] + node _T_580 = bits(_T_579, 0, 0) @[Bitwise.scala 72:15] + node _T_581 = mux(_T_580, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_582 = bits(buf_data[0], 23, 16) @[el2_lsu_bus_buffer.scala 217:104] + node _T_583 = and(_T_581, _T_582) @[el2_lsu_bus_buffer.scala 217:91] + node _T_584 = bits(ld_byte_hitvecfn_lo[2], 1, 1) @[el2_lsu_bus_buffer.scala 217:86] + node _T_585 = bits(_T_584, 0, 0) @[Bitwise.scala 72:15] + node _T_586 = mux(_T_585, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_587 = bits(buf_data[1], 23, 16) @[el2_lsu_bus_buffer.scala 217:104] + node _T_588 = and(_T_586, _T_587) @[el2_lsu_bus_buffer.scala 217:91] + node _T_589 = bits(ld_byte_hitvecfn_lo[2], 2, 2) @[el2_lsu_bus_buffer.scala 217:86] + node _T_590 = bits(_T_589, 0, 0) @[Bitwise.scala 72:15] + node _T_591 = mux(_T_590, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_592 = bits(buf_data[2], 23, 16) @[el2_lsu_bus_buffer.scala 217:104] + node _T_593 = and(_T_591, _T_592) @[el2_lsu_bus_buffer.scala 217:91] + node _T_594 = bits(ld_byte_hitvecfn_lo[2], 3, 3) @[el2_lsu_bus_buffer.scala 217:86] + node _T_595 = bits(_T_594, 0, 0) @[Bitwise.scala 72:15] + node _T_596 = mux(_T_595, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_597 = bits(buf_data[3], 23, 16) @[el2_lsu_bus_buffer.scala 217:104] + node _T_598 = and(_T_596, _T_597) @[el2_lsu_bus_buffer.scala 217:91] + node _T_599 = or(_T_583, _T_588) @[el2_lsu_bus_buffer.scala 217:123] + node _T_600 = or(_T_599, _T_593) @[el2_lsu_bus_buffer.scala 217:123] + node _T_601 = or(_T_600, _T_598) @[el2_lsu_bus_buffer.scala 217:123] + node _T_602 = bits(ld_byte_hitvecfn_lo[1], 0, 0) @[el2_lsu_bus_buffer.scala 218:86] + node _T_603 = bits(_T_602, 0, 0) @[Bitwise.scala 72:15] + node _T_604 = mux(_T_603, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_605 = bits(buf_data[0], 15, 8) @[el2_lsu_bus_buffer.scala 218:104] + node _T_606 = and(_T_604, _T_605) @[el2_lsu_bus_buffer.scala 218:91] + node _T_607 = bits(ld_byte_hitvecfn_lo[1], 1, 1) @[el2_lsu_bus_buffer.scala 218:86] + node _T_608 = bits(_T_607, 0, 0) @[Bitwise.scala 72:15] + node _T_609 = mux(_T_608, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_610 = bits(buf_data[1], 15, 8) @[el2_lsu_bus_buffer.scala 218:104] + node _T_611 = and(_T_609, _T_610) @[el2_lsu_bus_buffer.scala 218:91] + node _T_612 = bits(ld_byte_hitvecfn_lo[1], 2, 2) @[el2_lsu_bus_buffer.scala 218:86] + node _T_613 = bits(_T_612, 0, 0) @[Bitwise.scala 72:15] + node _T_614 = mux(_T_613, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_615 = bits(buf_data[2], 15, 8) @[el2_lsu_bus_buffer.scala 218:104] + node _T_616 = and(_T_614, _T_615) @[el2_lsu_bus_buffer.scala 218:91] + node _T_617 = bits(ld_byte_hitvecfn_lo[1], 3, 3) @[el2_lsu_bus_buffer.scala 218:86] + node _T_618 = bits(_T_617, 0, 0) @[Bitwise.scala 72:15] + node _T_619 = mux(_T_618, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_620 = bits(buf_data[3], 15, 8) @[el2_lsu_bus_buffer.scala 218:104] + node _T_621 = and(_T_619, _T_620) @[el2_lsu_bus_buffer.scala 218:91] + node _T_622 = or(_T_606, _T_611) @[el2_lsu_bus_buffer.scala 218:123] + node _T_623 = or(_T_622, _T_616) @[el2_lsu_bus_buffer.scala 218:123] + node _T_624 = or(_T_623, _T_621) @[el2_lsu_bus_buffer.scala 218:123] + node _T_625 = bits(ld_byte_hitvecfn_lo[0], 0, 0) @[el2_lsu_bus_buffer.scala 219:86] + node _T_626 = bits(_T_625, 0, 0) @[Bitwise.scala 72:15] + node _T_627 = mux(_T_626, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_628 = bits(buf_data[0], 7, 0) @[el2_lsu_bus_buffer.scala 219:104] + node _T_629 = and(_T_627, _T_628) @[el2_lsu_bus_buffer.scala 219:91] + node _T_630 = bits(ld_byte_hitvecfn_lo[0], 1, 1) @[el2_lsu_bus_buffer.scala 219:86] + node _T_631 = bits(_T_630, 0, 0) @[Bitwise.scala 72:15] + node _T_632 = mux(_T_631, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_633 = bits(buf_data[1], 7, 0) @[el2_lsu_bus_buffer.scala 219:104] + node _T_634 = and(_T_632, _T_633) @[el2_lsu_bus_buffer.scala 219:91] + node _T_635 = bits(ld_byte_hitvecfn_lo[0], 2, 2) @[el2_lsu_bus_buffer.scala 219:86] + node _T_636 = bits(_T_635, 0, 0) @[Bitwise.scala 72:15] + node _T_637 = mux(_T_636, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_638 = bits(buf_data[2], 7, 0) @[el2_lsu_bus_buffer.scala 219:104] + node _T_639 = and(_T_637, _T_638) @[el2_lsu_bus_buffer.scala 219:91] + node _T_640 = bits(ld_byte_hitvecfn_lo[0], 3, 3) @[el2_lsu_bus_buffer.scala 219:86] + node _T_641 = bits(_T_640, 0, 0) @[Bitwise.scala 72:15] + node _T_642 = mux(_T_641, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_643 = bits(buf_data[3], 7, 0) @[el2_lsu_bus_buffer.scala 219:104] + node _T_644 = and(_T_642, _T_643) @[el2_lsu_bus_buffer.scala 219:91] + node _T_645 = or(_T_629, _T_634) @[el2_lsu_bus_buffer.scala 219:123] + node _T_646 = or(_T_645, _T_639) @[el2_lsu_bus_buffer.scala 219:123] + node _T_647 = or(_T_646, _T_644) @[el2_lsu_bus_buffer.scala 219:123] + node _T_648 = cat(_T_624, _T_647) @[Cat.scala 29:58] + node _T_649 = cat(_T_578, _T_601) @[Cat.scala 29:58] + node _T_650 = cat(_T_649, _T_648) @[Cat.scala 29:58] + node _T_651 = and(ld_fwddata_buf_lo_initial, ibuf_data) @[el2_lsu_bus_buffer.scala 220:32] + node _T_652 = or(_T_650, _T_651) @[el2_lsu_bus_buffer.scala 219:129] + io.ld_fwddata_buf_lo <= _T_652 @[el2_lsu_bus_buffer.scala 216:24] + node _T_653 = bits(ld_byte_hitvecfn_hi[3], 0, 0) @[el2_lsu_bus_buffer.scala 222:86] + node _T_654 = bits(_T_653, 0, 0) @[Bitwise.scala 72:15] + node _T_655 = mux(_T_654, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_656 = bits(buf_data[0], 31, 24) @[el2_lsu_bus_buffer.scala 222:104] + node _T_657 = and(_T_655, _T_656) @[el2_lsu_bus_buffer.scala 222:91] + node _T_658 = bits(ld_byte_hitvecfn_hi[3], 1, 1) @[el2_lsu_bus_buffer.scala 222:86] + node _T_659 = bits(_T_658, 0, 0) @[Bitwise.scala 72:15] + node _T_660 = mux(_T_659, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_661 = bits(buf_data[1], 31, 24) @[el2_lsu_bus_buffer.scala 222:104] + node _T_662 = and(_T_660, _T_661) @[el2_lsu_bus_buffer.scala 222:91] + node _T_663 = bits(ld_byte_hitvecfn_hi[3], 2, 2) @[el2_lsu_bus_buffer.scala 222:86] + node _T_664 = bits(_T_663, 0, 0) @[Bitwise.scala 72:15] + node _T_665 = mux(_T_664, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_666 = bits(buf_data[2], 31, 24) @[el2_lsu_bus_buffer.scala 222:104] + node _T_667 = and(_T_665, _T_666) @[el2_lsu_bus_buffer.scala 222:91] + node _T_668 = bits(ld_byte_hitvecfn_hi[3], 3, 3) @[el2_lsu_bus_buffer.scala 222:86] + node _T_669 = bits(_T_668, 0, 0) @[Bitwise.scala 72:15] + node _T_670 = mux(_T_669, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_671 = bits(buf_data[3], 31, 24) @[el2_lsu_bus_buffer.scala 222:104] + node _T_672 = and(_T_670, _T_671) @[el2_lsu_bus_buffer.scala 222:91] + node _T_673 = or(_T_657, _T_662) @[el2_lsu_bus_buffer.scala 222:123] + node _T_674 = or(_T_673, _T_667) @[el2_lsu_bus_buffer.scala 222:123] + node _T_675 = or(_T_674, _T_672) @[el2_lsu_bus_buffer.scala 222:123] + node _T_676 = bits(ld_byte_hitvecfn_hi[2], 0, 0) @[el2_lsu_bus_buffer.scala 223:86] + node _T_677 = bits(_T_676, 0, 0) @[Bitwise.scala 72:15] + node _T_678 = mux(_T_677, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_679 = bits(buf_data[0], 23, 16) @[el2_lsu_bus_buffer.scala 223:104] + node _T_680 = and(_T_678, _T_679) @[el2_lsu_bus_buffer.scala 223:91] + node _T_681 = bits(ld_byte_hitvecfn_hi[2], 1, 1) @[el2_lsu_bus_buffer.scala 223:86] + node _T_682 = bits(_T_681, 0, 0) @[Bitwise.scala 72:15] + node _T_683 = mux(_T_682, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_684 = bits(buf_data[1], 23, 16) @[el2_lsu_bus_buffer.scala 223:104] + node _T_685 = and(_T_683, _T_684) @[el2_lsu_bus_buffer.scala 223:91] + node _T_686 = bits(ld_byte_hitvecfn_hi[2], 2, 2) @[el2_lsu_bus_buffer.scala 223:86] + node _T_687 = bits(_T_686, 0, 0) @[Bitwise.scala 72:15] + node _T_688 = mux(_T_687, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_689 = bits(buf_data[2], 23, 16) @[el2_lsu_bus_buffer.scala 223:104] + node _T_690 = and(_T_688, _T_689) @[el2_lsu_bus_buffer.scala 223:91] + node _T_691 = bits(ld_byte_hitvecfn_hi[2], 3, 3) @[el2_lsu_bus_buffer.scala 223:86] + node _T_692 = bits(_T_691, 0, 0) @[Bitwise.scala 72:15] + node _T_693 = mux(_T_692, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_694 = bits(buf_data[3], 23, 16) @[el2_lsu_bus_buffer.scala 223:104] + node _T_695 = and(_T_693, _T_694) @[el2_lsu_bus_buffer.scala 223:91] + node _T_696 = or(_T_680, _T_685) @[el2_lsu_bus_buffer.scala 223:123] + node _T_697 = or(_T_696, _T_690) @[el2_lsu_bus_buffer.scala 223:123] + node _T_698 = or(_T_697, _T_695) @[el2_lsu_bus_buffer.scala 223:123] + node _T_699 = bits(ld_byte_hitvecfn_hi[1], 0, 0) @[el2_lsu_bus_buffer.scala 224:86] + node _T_700 = bits(_T_699, 0, 0) @[Bitwise.scala 72:15] + node _T_701 = mux(_T_700, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_702 = bits(buf_data[0], 15, 8) @[el2_lsu_bus_buffer.scala 224:104] + node _T_703 = and(_T_701, _T_702) @[el2_lsu_bus_buffer.scala 224:91] + node _T_704 = bits(ld_byte_hitvecfn_hi[1], 1, 1) @[el2_lsu_bus_buffer.scala 224:86] + node _T_705 = bits(_T_704, 0, 0) @[Bitwise.scala 72:15] + node _T_706 = mux(_T_705, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_707 = bits(buf_data[1], 15, 8) @[el2_lsu_bus_buffer.scala 224:104] + node _T_708 = and(_T_706, _T_707) @[el2_lsu_bus_buffer.scala 224:91] + node _T_709 = bits(ld_byte_hitvecfn_hi[1], 2, 2) @[el2_lsu_bus_buffer.scala 224:86] + node _T_710 = bits(_T_709, 0, 0) @[Bitwise.scala 72:15] + node _T_711 = mux(_T_710, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_712 = bits(buf_data[2], 15, 8) @[el2_lsu_bus_buffer.scala 224:104] + node _T_713 = and(_T_711, _T_712) @[el2_lsu_bus_buffer.scala 224:91] + node _T_714 = bits(ld_byte_hitvecfn_hi[1], 3, 3) @[el2_lsu_bus_buffer.scala 224:86] + node _T_715 = bits(_T_714, 0, 0) @[Bitwise.scala 72:15] + node _T_716 = mux(_T_715, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_717 = bits(buf_data[3], 15, 8) @[el2_lsu_bus_buffer.scala 224:104] + node _T_718 = and(_T_716, _T_717) @[el2_lsu_bus_buffer.scala 224:91] + node _T_719 = or(_T_703, _T_708) @[el2_lsu_bus_buffer.scala 224:123] + node _T_720 = or(_T_719, _T_713) @[el2_lsu_bus_buffer.scala 224:123] + node _T_721 = or(_T_720, _T_718) @[el2_lsu_bus_buffer.scala 224:123] + node _T_722 = bits(ld_byte_hitvecfn_hi[0], 0, 0) @[el2_lsu_bus_buffer.scala 225:86] + node _T_723 = bits(_T_722, 0, 0) @[Bitwise.scala 72:15] + node _T_724 = mux(_T_723, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_725 = bits(buf_data[0], 7, 0) @[el2_lsu_bus_buffer.scala 225:104] + node _T_726 = and(_T_724, _T_725) @[el2_lsu_bus_buffer.scala 225:91] + node _T_727 = bits(ld_byte_hitvecfn_hi[0], 1, 1) @[el2_lsu_bus_buffer.scala 225:86] + node _T_728 = bits(_T_727, 0, 0) @[Bitwise.scala 72:15] + node _T_729 = mux(_T_728, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_730 = bits(buf_data[1], 7, 0) @[el2_lsu_bus_buffer.scala 225:104] + node _T_731 = and(_T_729, _T_730) @[el2_lsu_bus_buffer.scala 225:91] + node _T_732 = bits(ld_byte_hitvecfn_hi[0], 2, 2) @[el2_lsu_bus_buffer.scala 225:86] + node _T_733 = bits(_T_732, 0, 0) @[Bitwise.scala 72:15] + node _T_734 = mux(_T_733, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_735 = bits(buf_data[2], 7, 0) @[el2_lsu_bus_buffer.scala 225:104] + node _T_736 = and(_T_734, _T_735) @[el2_lsu_bus_buffer.scala 225:91] + node _T_737 = bits(ld_byte_hitvecfn_hi[0], 3, 3) @[el2_lsu_bus_buffer.scala 225:86] + node _T_738 = bits(_T_737, 0, 0) @[Bitwise.scala 72:15] + node _T_739 = mux(_T_738, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_740 = bits(buf_data[3], 7, 0) @[el2_lsu_bus_buffer.scala 225:104] + node _T_741 = and(_T_739, _T_740) @[el2_lsu_bus_buffer.scala 225:91] + node _T_742 = or(_T_726, _T_731) @[el2_lsu_bus_buffer.scala 225:123] + node _T_743 = or(_T_742, _T_736) @[el2_lsu_bus_buffer.scala 225:123] + node _T_744 = or(_T_743, _T_741) @[el2_lsu_bus_buffer.scala 225:123] + node _T_745 = cat(_T_721, _T_744) @[Cat.scala 29:58] + node _T_746 = cat(_T_675, _T_698) @[Cat.scala 29:58] + node _T_747 = cat(_T_746, _T_745) @[Cat.scala 29:58] + node _T_748 = and(ld_fwddata_buf_hi_initial, ibuf_data) @[el2_lsu_bus_buffer.scala 226:32] + node _T_749 = or(_T_747, _T_748) @[el2_lsu_bus_buffer.scala 225:129] + io.ld_fwddata_buf_hi <= _T_749 @[el2_lsu_bus_buffer.scala 222:24] + node bus_coalescing_disable = or(io.dec_tlu_wb_coalescing_disable, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 228:65] + node _T_750 = mux(io.lsu_pkt_r.by, UInt<4>("h01"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_751 = mux(io.lsu_pkt_r.half, UInt<4>("h03"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_752 = mux(io.lsu_pkt_r.word, UInt<4>("h0f"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_753 = or(_T_750, _T_751) @[Mux.scala 27:72] + node _T_754 = or(_T_753, _T_752) @[Mux.scala 27:72] + wire ldst_byteen_r : UInt<4> @[Mux.scala 27:72] + ldst_byteen_r <= _T_754 @[Mux.scala 27:72] + node _T_755 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_bus_buffer.scala 233:50] + node _T_756 = eq(_T_755, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 233:55] + node _T_757 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_bus_buffer.scala 234:50] + node _T_758 = eq(_T_757, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 234:55] + node _T_759 = bits(ldst_byteen_r, 3, 3) @[el2_lsu_bus_buffer.scala 234:91] + node _T_760 = cat(UInt<3>("h00"), _T_759) @[Cat.scala 29:58] + node _T_761 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_bus_buffer.scala 235:50] + node _T_762 = eq(_T_761, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 235:55] + node _T_763 = bits(ldst_byteen_r, 3, 2) @[el2_lsu_bus_buffer.scala 235:91] + node _T_764 = cat(UInt<2>("h00"), _T_763) @[Cat.scala 29:58] + node _T_765 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_bus_buffer.scala 236:50] + node _T_766 = eq(_T_765, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 236:55] + node _T_767 = bits(ldst_byteen_r, 3, 1) @[el2_lsu_bus_buffer.scala 236:91] + node _T_768 = cat(UInt<1>("h00"), _T_767) @[Cat.scala 29:58] + node _T_769 = mux(_T_756, UInt<4>("h00"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_770 = mux(_T_758, _T_760, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_771 = mux(_T_762, _T_764, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_772 = mux(_T_766, _T_768, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_773 = or(_T_769, _T_770) @[Mux.scala 27:72] + node _T_774 = or(_T_773, _T_771) @[Mux.scala 27:72] + node _T_775 = or(_T_774, _T_772) @[Mux.scala 27:72] + wire ldst_byteen_hi_r : UInt<4> @[Mux.scala 27:72] + ldst_byteen_hi_r <= _T_775 @[Mux.scala 27:72] + node _T_776 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_bus_buffer.scala 237:50] + node _T_777 = eq(_T_776, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 237:55] + node _T_778 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_bus_buffer.scala 238:50] + node _T_779 = eq(_T_778, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 238:55] + node _T_780 = bits(ldst_byteen_r, 2, 0) @[el2_lsu_bus_buffer.scala 238:81] + node _T_781 = cat(_T_780, UInt<1>("h00")) @[Cat.scala 29:58] + node _T_782 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_bus_buffer.scala 239:50] + node _T_783 = eq(_T_782, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 239:55] + node _T_784 = bits(ldst_byteen_r, 1, 0) @[el2_lsu_bus_buffer.scala 239:81] + node _T_785 = cat(_T_784, UInt<2>("h00")) @[Cat.scala 29:58] + node _T_786 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_bus_buffer.scala 240:50] + node _T_787 = eq(_T_786, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 240:55] + node _T_788 = bits(ldst_byteen_r, 0, 0) @[el2_lsu_bus_buffer.scala 240:81] + node _T_789 = cat(_T_788, UInt<3>("h00")) @[Cat.scala 29:58] + node _T_790 = mux(_T_777, ldst_byteen_r, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_791 = mux(_T_779, _T_781, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_792 = mux(_T_783, _T_785, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_793 = mux(_T_787, _T_789, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_794 = or(_T_790, _T_791) @[Mux.scala 27:72] + node _T_795 = or(_T_794, _T_792) @[Mux.scala 27:72] + node _T_796 = or(_T_795, _T_793) @[Mux.scala 27:72] + wire ldst_byteen_lo_r : UInt<4> @[Mux.scala 27:72] + ldst_byteen_lo_r <= _T_796 @[Mux.scala 27:72] + node _T_797 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_bus_buffer.scala 242:49] + node _T_798 = eq(_T_797, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 242:54] + node _T_799 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_bus_buffer.scala 243:49] + node _T_800 = eq(_T_799, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 243:54] + node _T_801 = bits(io.store_data_r, 31, 8) @[el2_lsu_bus_buffer.scala 243:93] + node _T_802 = cat(UInt<8>("h00"), _T_801) @[Cat.scala 29:58] + node _T_803 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_bus_buffer.scala 244:49] + node _T_804 = eq(_T_803, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 244:54] + node _T_805 = bits(io.store_data_r, 31, 16) @[el2_lsu_bus_buffer.scala 244:93] + node _T_806 = cat(UInt<16>("h00"), _T_805) @[Cat.scala 29:58] + node _T_807 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_bus_buffer.scala 245:49] + node _T_808 = eq(_T_807, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 245:54] + node _T_809 = bits(io.store_data_r, 31, 24) @[el2_lsu_bus_buffer.scala 245:93] + node _T_810 = cat(UInt<24>("h00"), _T_809) @[Cat.scala 29:58] + node _T_811 = mux(_T_798, UInt<32>("h00"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_812 = mux(_T_800, _T_802, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_813 = mux(_T_804, _T_806, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_814 = mux(_T_808, _T_810, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_815 = or(_T_811, _T_812) @[Mux.scala 27:72] + node _T_816 = or(_T_815, _T_813) @[Mux.scala 27:72] + node _T_817 = or(_T_816, _T_814) @[Mux.scala 27:72] + wire store_data_hi_r : UInt<32> @[Mux.scala 27:72] + store_data_hi_r <= _T_817 @[Mux.scala 27:72] + node _T_818 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_bus_buffer.scala 247:49] + node _T_819 = eq(_T_818, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 247:54] + node _T_820 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_bus_buffer.scala 248:49] + node _T_821 = eq(_T_820, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 248:54] + node _T_822 = bits(io.store_data_r, 23, 0) @[el2_lsu_bus_buffer.scala 248:82] + node _T_823 = cat(_T_822, UInt<8>("h00")) @[Cat.scala 29:58] + node _T_824 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_bus_buffer.scala 249:49] + node _T_825 = eq(_T_824, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 249:54] + node _T_826 = bits(io.store_data_r, 15, 0) @[el2_lsu_bus_buffer.scala 249:82] + node _T_827 = cat(_T_826, UInt<16>("h00")) @[Cat.scala 29:58] + node _T_828 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_bus_buffer.scala 250:49] + node _T_829 = eq(_T_828, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 250:54] + node _T_830 = bits(io.store_data_r, 7, 0) @[el2_lsu_bus_buffer.scala 250:82] + node _T_831 = cat(_T_830, UInt<24>("h00")) @[Cat.scala 29:58] + node _T_832 = mux(_T_819, io.store_data_r, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_833 = mux(_T_821, _T_823, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_834 = mux(_T_825, _T_827, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_835 = mux(_T_829, _T_831, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_836 = or(_T_832, _T_833) @[Mux.scala 27:72] + node _T_837 = or(_T_836, _T_834) @[Mux.scala 27:72] + node _T_838 = or(_T_837, _T_835) @[Mux.scala 27:72] + wire store_data_lo_r : UInt<32> @[Mux.scala 27:72] + store_data_lo_r <= _T_838 @[Mux.scala 27:72] + node _T_839 = bits(io.lsu_addr_r, 3, 3) @[el2_lsu_bus_buffer.scala 253:36] + node _T_840 = bits(io.end_addr_r, 3, 3) @[el2_lsu_bus_buffer.scala 253:57] + node ldst_samedw_r = eq(_T_839, _T_840) @[el2_lsu_bus_buffer.scala 253:40] + node _T_841 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_bus_buffer.scala 254:67] + node _T_842 = eq(_T_841, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 254:74] + node _T_843 = bits(io.lsu_addr_r, 0, 0) @[el2_lsu_bus_buffer.scala 255:40] + node _T_844 = eq(_T_843, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 255:26] + node _T_845 = mux(io.lsu_pkt_r.word, _T_842, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_846 = mux(io.lsu_pkt_r.half, _T_844, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_847 = mux(io.lsu_pkt_r.by, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_848 = or(_T_845, _T_846) @[Mux.scala 27:72] + node _T_849 = or(_T_848, _T_847) @[Mux.scala 27:72] + wire is_aligned_r : UInt<1> @[Mux.scala 27:72] + is_aligned_r <= _T_849 @[Mux.scala 27:72] + node _T_850 = or(io.lsu_pkt_r.load, io.no_word_merge_r) @[el2_lsu_bus_buffer.scala 257:55] + node _T_851 = and(io.lsu_busreq_r, _T_850) @[el2_lsu_bus_buffer.scala 257:34] + node _T_852 = eq(ibuf_valid, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 257:79] + node ibuf_byp = and(_T_851, _T_852) @[el2_lsu_bus_buffer.scala 257:77] + node _T_853 = and(io.lsu_busreq_r, io.lsu_commit_r) @[el2_lsu_bus_buffer.scala 258:36] + node _T_854 = eq(ibuf_byp, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 258:56] + node ibuf_wr_en = and(_T_853, _T_854) @[el2_lsu_bus_buffer.scala 258:54] + wire ibuf_drain_vld : UInt<1> + ibuf_drain_vld <= UInt<1>("h00") + node _T_855 = eq(ibuf_wr_en, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 260:36] + node _T_856 = and(ibuf_drain_vld, _T_855) @[el2_lsu_bus_buffer.scala 260:34] + node ibuf_rst = or(_T_856, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 260:49] + node _T_857 = eq(io.lsu_busreq_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 261:44] + node _T_858 = and(io.lsu_busreq_m, _T_857) @[el2_lsu_bus_buffer.scala 261:42] + node _T_859 = and(_T_858, ibuf_valid) @[el2_lsu_bus_buffer.scala 261:61] + node _T_860 = bits(ibuf_addr, 31, 2) @[el2_lsu_bus_buffer.scala 261:107] + node _T_861 = bits(io.lsu_addr_m, 31, 2) @[el2_lsu_bus_buffer.scala 261:132] + node _T_862 = neq(_T_860, _T_861) @[el2_lsu_bus_buffer.scala 261:115] + node _T_863 = or(io.lsu_pkt_m.load, _T_862) @[el2_lsu_bus_buffer.scala 261:95] + node ibuf_force_drain = and(_T_859, _T_863) @[el2_lsu_bus_buffer.scala 261:74] + wire ibuf_sideeffect : UInt<1> + ibuf_sideeffect <= UInt<1>("h00") + wire ibuf_timer : UInt<3> + ibuf_timer <= UInt<1>("h00") + wire ibuf_merge_en : UInt<1> + ibuf_merge_en <= UInt<1>("h00") + wire ibuf_merge_in : UInt<1> + ibuf_merge_in <= UInt<1>("h00") + node _T_864 = eq(ibuf_timer, UInt<3>("h07")) @[el2_lsu_bus_buffer.scala 266:62] + node _T_865 = or(ibuf_wr_en, _T_864) @[el2_lsu_bus_buffer.scala 266:48] + node _T_866 = and(ibuf_merge_en, ibuf_merge_in) @[el2_lsu_bus_buffer.scala 266:98] + node _T_867 = eq(_T_866, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 266:82] + node _T_868 = and(_T_865, _T_867) @[el2_lsu_bus_buffer.scala 266:80] + node _T_869 = or(_T_868, ibuf_byp) @[el2_lsu_bus_buffer.scala 267:5] + node _T_870 = or(_T_869, ibuf_force_drain) @[el2_lsu_bus_buffer.scala 267:16] + node _T_871 = or(_T_870, ibuf_sideeffect) @[el2_lsu_bus_buffer.scala 267:35] + node _T_872 = eq(ibuf_write, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 267:55] + node _T_873 = or(_T_871, _T_872) @[el2_lsu_bus_buffer.scala 267:53] + node _T_874 = or(_T_873, bus_coalescing_disable) @[el2_lsu_bus_buffer.scala 267:67] + node _T_875 = and(ibuf_valid, _T_874) @[el2_lsu_bus_buffer.scala 266:32] + ibuf_drain_vld <= _T_875 @[el2_lsu_bus_buffer.scala 266:18] + wire ibuf_tag : UInt<2> + ibuf_tag <= UInt<1>("h00") + wire WrPtr1_r : UInt<2> + WrPtr1_r <= UInt<1>("h00") + wire WrPtr0_r : UInt<2> + WrPtr0_r <= UInt<1>("h00") + node _T_876 = and(ibuf_merge_en, ibuf_merge_in) @[el2_lsu_bus_buffer.scala 272:39] + node _T_877 = mux(io.ldst_dual_r, WrPtr1_r, WrPtr0_r) @[el2_lsu_bus_buffer.scala 272:69] + node ibuf_tag_in = mux(_T_876, ibuf_tag, _T_877) @[el2_lsu_bus_buffer.scala 272:24] + node ibuf_sz_in = cat(io.lsu_pkt_r.word, io.lsu_pkt_r.half) @[Cat.scala 29:58] + node ibuf_addr_in = mux(io.ldst_dual_r, io.end_addr_r, io.lsu_addr_r) @[el2_lsu_bus_buffer.scala 275:25] + node _T_878 = and(ibuf_merge_en, ibuf_merge_in) @[el2_lsu_bus_buffer.scala 276:42] + node _T_879 = bits(ibuf_byteen, 3, 0) @[el2_lsu_bus_buffer.scala 276:70] + node _T_880 = bits(ldst_byteen_lo_r, 3, 0) @[el2_lsu_bus_buffer.scala 276:95] + node _T_881 = or(_T_879, _T_880) @[el2_lsu_bus_buffer.scala 276:77] + node _T_882 = bits(ldst_byteen_hi_r, 3, 0) @[el2_lsu_bus_buffer.scala 277:41] + node _T_883 = bits(ldst_byteen_lo_r, 3, 0) @[el2_lsu_bus_buffer.scala 277:65] + node _T_884 = mux(io.ldst_dual_r, _T_882, _T_883) @[el2_lsu_bus_buffer.scala 277:8] + node ibuf_byteen_in = mux(_T_878, _T_881, _T_884) @[el2_lsu_bus_buffer.scala 276:27] + node _T_885 = and(ibuf_merge_en, ibuf_merge_in) @[el2_lsu_bus_buffer.scala 280:61] + node _T_886 = bits(ldst_byteen_lo_r, 0, 0) @[el2_lsu_bus_buffer.scala 281:25] + node _T_887 = bits(store_data_lo_r, 7, 0) @[el2_lsu_bus_buffer.scala 281:45] + node _T_888 = bits(ibuf_data, 7, 0) @[el2_lsu_bus_buffer.scala 281:76] + node _T_889 = mux(_T_886, _T_887, _T_888) @[el2_lsu_bus_buffer.scala 281:8] + node _T_890 = bits(store_data_hi_r, 7, 0) @[el2_lsu_bus_buffer.scala 282:40] + node _T_891 = bits(store_data_lo_r, 7, 0) @[el2_lsu_bus_buffer.scala 282:77] + node _T_892 = mux(io.ldst_dual_r, _T_890, _T_891) @[el2_lsu_bus_buffer.scala 282:8] + node _T_893 = mux(_T_885, _T_889, _T_892) @[el2_lsu_bus_buffer.scala 280:46] + node _T_894 = and(ibuf_merge_en, ibuf_merge_in) @[el2_lsu_bus_buffer.scala 280:61] + node _T_895 = bits(ldst_byteen_lo_r, 1, 1) @[el2_lsu_bus_buffer.scala 281:25] + node _T_896 = bits(store_data_lo_r, 15, 8) @[el2_lsu_bus_buffer.scala 281:45] + node _T_897 = bits(ibuf_data, 15, 8) @[el2_lsu_bus_buffer.scala 281:76] + node _T_898 = mux(_T_895, _T_896, _T_897) @[el2_lsu_bus_buffer.scala 281:8] + node _T_899 = bits(store_data_hi_r, 15, 8) @[el2_lsu_bus_buffer.scala 282:40] + node _T_900 = bits(store_data_lo_r, 15, 8) @[el2_lsu_bus_buffer.scala 282:77] + node _T_901 = mux(io.ldst_dual_r, _T_899, _T_900) @[el2_lsu_bus_buffer.scala 282:8] + node _T_902 = mux(_T_894, _T_898, _T_901) @[el2_lsu_bus_buffer.scala 280:46] + node _T_903 = and(ibuf_merge_en, ibuf_merge_in) @[el2_lsu_bus_buffer.scala 280:61] + node _T_904 = bits(ldst_byteen_lo_r, 2, 2) @[el2_lsu_bus_buffer.scala 281:25] + node _T_905 = bits(store_data_lo_r, 23, 16) @[el2_lsu_bus_buffer.scala 281:45] + node _T_906 = bits(ibuf_data, 23, 16) @[el2_lsu_bus_buffer.scala 281:76] + node _T_907 = mux(_T_904, _T_905, _T_906) @[el2_lsu_bus_buffer.scala 281:8] + node _T_908 = bits(store_data_hi_r, 23, 16) @[el2_lsu_bus_buffer.scala 282:40] + node _T_909 = bits(store_data_lo_r, 23, 16) @[el2_lsu_bus_buffer.scala 282:77] + node _T_910 = mux(io.ldst_dual_r, _T_908, _T_909) @[el2_lsu_bus_buffer.scala 282:8] + node _T_911 = mux(_T_903, _T_907, _T_910) @[el2_lsu_bus_buffer.scala 280:46] + node _T_912 = and(ibuf_merge_en, ibuf_merge_in) @[el2_lsu_bus_buffer.scala 280:61] + node _T_913 = bits(ldst_byteen_lo_r, 3, 3) @[el2_lsu_bus_buffer.scala 281:25] + node _T_914 = bits(store_data_lo_r, 31, 24) @[el2_lsu_bus_buffer.scala 281:45] + node _T_915 = bits(ibuf_data, 31, 24) @[el2_lsu_bus_buffer.scala 281:76] + node _T_916 = mux(_T_913, _T_914, _T_915) @[el2_lsu_bus_buffer.scala 281:8] + node _T_917 = bits(store_data_hi_r, 31, 24) @[el2_lsu_bus_buffer.scala 282:40] + node _T_918 = bits(store_data_lo_r, 31, 24) @[el2_lsu_bus_buffer.scala 282:77] + node _T_919 = mux(io.ldst_dual_r, _T_917, _T_918) @[el2_lsu_bus_buffer.scala 282:8] + node _T_920 = mux(_T_912, _T_916, _T_919) @[el2_lsu_bus_buffer.scala 280:46] + node _T_921 = cat(_T_920, _T_911) @[Cat.scala 29:58] + node _T_922 = cat(_T_921, _T_902) @[Cat.scala 29:58] + node ibuf_data_in = cat(_T_922, _T_893) @[Cat.scala 29:58] + node _T_923 = lt(ibuf_timer, UInt<3>("h07")) @[el2_lsu_bus_buffer.scala 283:59] + node _T_924 = bits(_T_923, 0, 0) @[el2_lsu_bus_buffer.scala 283:79] + node _T_925 = add(ibuf_timer, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 283:93] + node _T_926 = tail(_T_925, 1) @[el2_lsu_bus_buffer.scala 283:93] + node _T_927 = mux(_T_924, _T_926, ibuf_timer) @[el2_lsu_bus_buffer.scala 283:47] + node ibuf_timer_in = mux(ibuf_wr_en, UInt<1>("h00"), _T_927) @[el2_lsu_bus_buffer.scala 283:26] + node _T_928 = and(io.lsu_busreq_r, io.lsu_commit_r) @[el2_lsu_bus_buffer.scala 285:36] + node _T_929 = and(_T_928, io.lsu_pkt_r.store) @[el2_lsu_bus_buffer.scala 285:54] + node _T_930 = and(_T_929, ibuf_valid) @[el2_lsu_bus_buffer.scala 285:75] + node _T_931 = and(_T_930, ibuf_write) @[el2_lsu_bus_buffer.scala 285:88] + node _T_932 = bits(io.lsu_addr_r, 31, 2) @[el2_lsu_bus_buffer.scala 285:117] + node _T_933 = bits(ibuf_addr, 31, 2) @[el2_lsu_bus_buffer.scala 285:137] + node _T_934 = eq(_T_932, _T_933) @[el2_lsu_bus_buffer.scala 285:124] + node _T_935 = and(_T_931, _T_934) @[el2_lsu_bus_buffer.scala 285:101] + node _T_936 = eq(io.is_sideeffects_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 285:147] + node _T_937 = and(_T_935, _T_936) @[el2_lsu_bus_buffer.scala 285:145] + node _T_938 = eq(bus_coalescing_disable, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 285:170] + node _T_939 = and(_T_937, _T_938) @[el2_lsu_bus_buffer.scala 285:168] + ibuf_merge_en <= _T_939 @[el2_lsu_bus_buffer.scala 285:17] + node _T_940 = eq(io.ldst_dual_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 286:20] + ibuf_merge_in <= _T_940 @[el2_lsu_bus_buffer.scala 286:17] + node _T_941 = eq(ibuf_merge_in, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 287:65] + node _T_942 = and(ibuf_merge_en, _T_941) @[el2_lsu_bus_buffer.scala 287:63] + node _T_943 = bits(ibuf_byteen, 0, 0) @[el2_lsu_bus_buffer.scala 287:92] + node _T_944 = bits(ldst_byteen_lo_r, 0, 0) @[el2_lsu_bus_buffer.scala 287:114] + node _T_945 = or(_T_943, _T_944) @[el2_lsu_bus_buffer.scala 287:96] + node _T_946 = bits(ibuf_byteen, 0, 0) @[el2_lsu_bus_buffer.scala 287:130] + node _T_947 = mux(_T_942, _T_945, _T_946) @[el2_lsu_bus_buffer.scala 287:48] + node _T_948 = eq(ibuf_merge_in, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 287:65] + node _T_949 = and(ibuf_merge_en, _T_948) @[el2_lsu_bus_buffer.scala 287:63] + node _T_950 = bits(ibuf_byteen, 1, 1) @[el2_lsu_bus_buffer.scala 287:92] + node _T_951 = bits(ldst_byteen_lo_r, 1, 1) @[el2_lsu_bus_buffer.scala 287:114] + node _T_952 = or(_T_950, _T_951) @[el2_lsu_bus_buffer.scala 287:96] + node _T_953 = bits(ibuf_byteen, 1, 1) @[el2_lsu_bus_buffer.scala 287:130] + node _T_954 = mux(_T_949, _T_952, _T_953) @[el2_lsu_bus_buffer.scala 287:48] + node _T_955 = eq(ibuf_merge_in, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 287:65] + node _T_956 = and(ibuf_merge_en, _T_955) @[el2_lsu_bus_buffer.scala 287:63] + node _T_957 = bits(ibuf_byteen, 2, 2) @[el2_lsu_bus_buffer.scala 287:92] + node _T_958 = bits(ldst_byteen_lo_r, 2, 2) @[el2_lsu_bus_buffer.scala 287:114] + node _T_959 = or(_T_957, _T_958) @[el2_lsu_bus_buffer.scala 287:96] + node _T_960 = bits(ibuf_byteen, 2, 2) @[el2_lsu_bus_buffer.scala 287:130] + node _T_961 = mux(_T_956, _T_959, _T_960) @[el2_lsu_bus_buffer.scala 287:48] + node _T_962 = eq(ibuf_merge_in, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 287:65] + node _T_963 = and(ibuf_merge_en, _T_962) @[el2_lsu_bus_buffer.scala 287:63] + node _T_964 = bits(ibuf_byteen, 3, 3) @[el2_lsu_bus_buffer.scala 287:92] + node _T_965 = bits(ldst_byteen_lo_r, 3, 3) @[el2_lsu_bus_buffer.scala 287:114] + node _T_966 = or(_T_964, _T_965) @[el2_lsu_bus_buffer.scala 287:96] + node _T_967 = bits(ibuf_byteen, 3, 3) @[el2_lsu_bus_buffer.scala 287:130] + node _T_968 = mux(_T_963, _T_966, _T_967) @[el2_lsu_bus_buffer.scala 287:48] + node _T_969 = cat(_T_968, _T_961) @[Cat.scala 29:58] + node _T_970 = cat(_T_969, _T_954) @[Cat.scala 29:58] + node ibuf_byteen_out = cat(_T_970, _T_947) @[Cat.scala 29:58] + node _T_971 = eq(ibuf_merge_in, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 288:62] + node _T_972 = and(ibuf_merge_en, _T_971) @[el2_lsu_bus_buffer.scala 288:60] + node _T_973 = bits(ldst_byteen_lo_r, 0, 0) @[el2_lsu_bus_buffer.scala 288:98] + node _T_974 = bits(store_data_lo_r, 7, 0) @[el2_lsu_bus_buffer.scala 288:118] + node _T_975 = bits(ibuf_data, 7, 0) @[el2_lsu_bus_buffer.scala 288:143] + node _T_976 = mux(_T_973, _T_974, _T_975) @[el2_lsu_bus_buffer.scala 288:81] + node _T_977 = bits(ibuf_data, 7, 0) @[el2_lsu_bus_buffer.scala 288:169] + node _T_978 = mux(_T_972, _T_976, _T_977) @[el2_lsu_bus_buffer.scala 288:45] + node _T_979 = eq(ibuf_merge_in, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 288:62] + node _T_980 = and(ibuf_merge_en, _T_979) @[el2_lsu_bus_buffer.scala 288:60] + node _T_981 = bits(ldst_byteen_lo_r, 1, 1) @[el2_lsu_bus_buffer.scala 288:98] + node _T_982 = bits(store_data_lo_r, 15, 8) @[el2_lsu_bus_buffer.scala 288:118] + node _T_983 = bits(ibuf_data, 15, 8) @[el2_lsu_bus_buffer.scala 288:143] + node _T_984 = mux(_T_981, _T_982, _T_983) @[el2_lsu_bus_buffer.scala 288:81] + node _T_985 = bits(ibuf_data, 15, 8) @[el2_lsu_bus_buffer.scala 288:169] + node _T_986 = mux(_T_980, _T_984, _T_985) @[el2_lsu_bus_buffer.scala 288:45] + node _T_987 = eq(ibuf_merge_in, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 288:62] + node _T_988 = and(ibuf_merge_en, _T_987) @[el2_lsu_bus_buffer.scala 288:60] + node _T_989 = bits(ldst_byteen_lo_r, 2, 2) @[el2_lsu_bus_buffer.scala 288:98] + node _T_990 = bits(store_data_lo_r, 23, 16) @[el2_lsu_bus_buffer.scala 288:118] + node _T_991 = bits(ibuf_data, 23, 16) @[el2_lsu_bus_buffer.scala 288:143] + node _T_992 = mux(_T_989, _T_990, _T_991) @[el2_lsu_bus_buffer.scala 288:81] + node _T_993 = bits(ibuf_data, 23, 16) @[el2_lsu_bus_buffer.scala 288:169] + node _T_994 = mux(_T_988, _T_992, _T_993) @[el2_lsu_bus_buffer.scala 288:45] + node _T_995 = eq(ibuf_merge_in, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 288:62] + node _T_996 = and(ibuf_merge_en, _T_995) @[el2_lsu_bus_buffer.scala 288:60] + node _T_997 = bits(ldst_byteen_lo_r, 3, 3) @[el2_lsu_bus_buffer.scala 288:98] + node _T_998 = bits(store_data_lo_r, 31, 24) @[el2_lsu_bus_buffer.scala 288:118] + node _T_999 = bits(ibuf_data, 31, 24) @[el2_lsu_bus_buffer.scala 288:143] + node _T_1000 = mux(_T_997, _T_998, _T_999) @[el2_lsu_bus_buffer.scala 288:81] + node _T_1001 = bits(ibuf_data, 31, 24) @[el2_lsu_bus_buffer.scala 288:169] + node _T_1002 = mux(_T_996, _T_1000, _T_1001) @[el2_lsu_bus_buffer.scala 288:45] + node _T_1003 = cat(_T_1002, _T_994) @[Cat.scala 29:58] + node _T_1004 = cat(_T_1003, _T_986) @[Cat.scala 29:58] + node ibuf_data_out = cat(_T_1004, _T_978) @[Cat.scala 29:58] + node _T_1005 = mux(ibuf_wr_en, UInt<1>("h01"), ibuf_valid) @[el2_lsu_bus_buffer.scala 290:28] + node _T_1006 = eq(ibuf_rst, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 290:63] + node _T_1007 = and(_T_1005, _T_1006) @[el2_lsu_bus_buffer.scala 290:61] + reg _T_1008 : UInt<1>, clock with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 290:24] + _T_1008 <= _T_1007 @[el2_lsu_bus_buffer.scala 290:24] + ibuf_valid <= _T_1008 @[el2_lsu_bus_buffer.scala 290:14] + node _T_1009 = asUInt(io.lsu_bus_ibuf_c1_clk) @[el2_lsu_bus_buffer.scala 291:120] + node _T_1010 = bits(_T_1009, 0, 0) @[el2_lsu_bus_buffer.scala 291:120] + node _T_1011 = and(ibuf_wr_en, _T_1010) @[el2_lsu_bus_buffer.scala 291:89] + reg _T_1012 : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1011 : @[Reg.scala 28:19] + _T_1012 <= ibuf_tag_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + ibuf_tag <= _T_1012 @[el2_lsu_bus_buffer.scala 291:12] + node _T_1013 = asUInt(io.lsu_bus_ibuf_c1_clk) @[el2_lsu_bus_buffer.scala 292:131] + node _T_1014 = bits(_T_1013, 0, 0) @[el2_lsu_bus_buffer.scala 292:131] + node _T_1015 = and(ibuf_wr_en, _T_1014) @[el2_lsu_bus_buffer.scala 292:100] + reg ibuf_dualtag : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1015 : @[Reg.scala 28:19] + ibuf_dualtag <= WrPtr0_r @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_1016 = asUInt(io.lsu_bus_ibuf_c1_clk) @[el2_lsu_bus_buffer.scala 293:127] + node _T_1017 = bits(_T_1016, 0, 0) @[el2_lsu_bus_buffer.scala 293:127] + node _T_1018 = and(ibuf_wr_en, _T_1017) @[el2_lsu_bus_buffer.scala 293:96] + reg ibuf_dual : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1018 : @[Reg.scala 28:19] + ibuf_dual <= io.ldst_dual_r @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_1019 = asUInt(io.lsu_bus_ibuf_c1_clk) @[el2_lsu_bus_buffer.scala 294:128] + node _T_1020 = bits(_T_1019, 0, 0) @[el2_lsu_bus_buffer.scala 294:128] + node _T_1021 = and(ibuf_wr_en, _T_1020) @[el2_lsu_bus_buffer.scala 294:97] + reg ibuf_samedw : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1021 : @[Reg.scala 28:19] + ibuf_samedw <= ldst_samedw_r @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_1022 = asUInt(io.lsu_bus_ibuf_c1_clk) @[el2_lsu_bus_buffer.scala 295:135] + node _T_1023 = bits(_T_1022, 0, 0) @[el2_lsu_bus_buffer.scala 295:135] + node _T_1024 = and(ibuf_wr_en, _T_1023) @[el2_lsu_bus_buffer.scala 295:104] + reg ibuf_nomerge : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1024 : @[Reg.scala 28:19] + ibuf_nomerge <= io.no_dword_merge_r @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_1025 = asUInt(io.lsu_bus_ibuf_c1_clk) @[el2_lsu_bus_buffer.scala 296:135] + node _T_1026 = bits(_T_1025, 0, 0) @[el2_lsu_bus_buffer.scala 296:135] + node _T_1027 = and(ibuf_wr_en, _T_1026) @[el2_lsu_bus_buffer.scala 296:104] + reg _T_1028 : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1027 : @[Reg.scala 28:19] + _T_1028 <= io.is_sideeffects_r @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + ibuf_sideeffect <= _T_1028 @[el2_lsu_bus_buffer.scala 296:19] + node _T_1029 = asUInt(io.lsu_bus_ibuf_c1_clk) @[el2_lsu_bus_buffer.scala 297:134] + node _T_1030 = bits(_T_1029, 0, 0) @[el2_lsu_bus_buffer.scala 297:134] + node _T_1031 = and(ibuf_wr_en, _T_1030) @[el2_lsu_bus_buffer.scala 297:103] + reg ibuf_unsign : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1031 : @[Reg.scala 28:19] + ibuf_unsign <= io.lsu_pkt_r.unsign @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + reg _T_1032 : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when ibuf_wr_en : @[Reg.scala 28:19] + _T_1032 <= io.lsu_pkt_r.store @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + ibuf_write <= _T_1032 @[el2_lsu_bus_buffer.scala 298:14] + reg ibuf_sz : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when ibuf_wr_en : @[Reg.scala 28:19] + ibuf_sz <= ibuf_sz_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + inst rvclkhdr of rvclkhdr @[el2_lib.scala 506:23] + rvclkhdr.clock <= clock + rvclkhdr.reset <= reset + rvclkhdr.io.clk <= clock @[el2_lib.scala 508:18] + rvclkhdr.io.en <= ibuf_wr_en @[el2_lib.scala 509:17] + rvclkhdr.io.scan_mode <= io.scan_mode @[el2_lib.scala 510:24] + reg _T_1033 : UInt, rvclkhdr.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 512:16] + _T_1033 <= ibuf_addr_in @[el2_lib.scala 512:16] + ibuf_addr <= _T_1033 @[el2_lsu_bus_buffer.scala 300:13] + reg _T_1034 : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when ibuf_wr_en : @[Reg.scala 28:19] + _T_1034 <= ibuf_byteen_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + ibuf_byteen <= _T_1034 @[el2_lsu_bus_buffer.scala 301:15] + inst rvclkhdr_1 of rvclkhdr_1 @[el2_lib.scala 506:23] + rvclkhdr_1.clock <= clock + rvclkhdr_1.reset <= reset + rvclkhdr_1.io.clk <= clock @[el2_lib.scala 508:18] + rvclkhdr_1.io.en <= ibuf_wr_en @[el2_lib.scala 509:17] + rvclkhdr_1.io.scan_mode <= io.scan_mode @[el2_lib.scala 510:24] + reg _T_1035 : UInt, rvclkhdr_1.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 512:16] + _T_1035 <= ibuf_data_in @[el2_lib.scala 512:16] + ibuf_data <= _T_1035 @[el2_lsu_bus_buffer.scala 302:13] + reg _T_1036 : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 303:59] + _T_1036 <= ibuf_timer_in @[el2_lsu_bus_buffer.scala 303:59] + ibuf_timer <= _T_1036 @[el2_lsu_bus_buffer.scala 303:14] + wire buf_numvld_wrcmd_any : UInt<4> + buf_numvld_wrcmd_any <= UInt<1>("h00") + wire buf_numvld_cmd_any : UInt<4> + buf_numvld_cmd_any <= UInt<1>("h00") + wire obuf_wr_timer : UInt<3> + obuf_wr_timer <= UInt<1>("h00") + wire buf_nomerge : UInt<1>[4] @[el2_lsu_bus_buffer.scala 307:25] + buf_nomerge[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 308:15] + buf_nomerge[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 308:15] + buf_nomerge[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 308:15] + buf_nomerge[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 308:15] + wire buf_sideeffect : UInt<4> + buf_sideeffect <= UInt<1>("h00") + wire obuf_force_wr_en : UInt<1> + obuf_force_wr_en <= UInt<1>("h00") + wire obuf_wr_en : UInt<1> + obuf_wr_en <= UInt<1>("h00") + node _T_1037 = eq(buf_numvld_wrcmd_any, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 313:43] + node _T_1038 = eq(buf_numvld_cmd_any, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 313:72] + node _T_1039 = and(_T_1037, _T_1038) @[el2_lsu_bus_buffer.scala 313:51] + node _T_1040 = neq(obuf_wr_timer, UInt<3>("h07")) @[el2_lsu_bus_buffer.scala 313:97] + node _T_1041 = and(_T_1039, _T_1040) @[el2_lsu_bus_buffer.scala 313:80] + node _T_1042 = eq(bus_coalescing_disable, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 314:5] + node _T_1043 = and(_T_1041, _T_1042) @[el2_lsu_bus_buffer.scala 313:114] + node _T_1044 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 314:114] + node _T_1045 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 314:114] + node _T_1046 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 314:114] + node _T_1047 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 314:114] + node _T_1048 = mux(_T_1044, buf_nomerge[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1049 = mux(_T_1045, buf_nomerge[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1050 = mux(_T_1046, buf_nomerge[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1051 = mux(_T_1047, buf_nomerge[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1052 = or(_T_1048, _T_1049) @[Mux.scala 27:72] + node _T_1053 = or(_T_1052, _T_1050) @[Mux.scala 27:72] + node _T_1054 = or(_T_1053, _T_1051) @[Mux.scala 27:72] + wire _T_1055 : UInt<1> @[Mux.scala 27:72] + _T_1055 <= _T_1054 @[Mux.scala 27:72] + node _T_1056 = eq(_T_1055, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 314:31] + node _T_1057 = and(_T_1043, _T_1056) @[el2_lsu_bus_buffer.scala 314:29] + node _T_1058 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 315:88] + node _T_1059 = bits(buf_sideeffect, 0, 0) @[el2_lsu_bus_buffer.scala 315:111] + node _T_1060 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 315:88] + node _T_1061 = bits(buf_sideeffect, 1, 1) @[el2_lsu_bus_buffer.scala 315:111] + node _T_1062 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 315:88] + node _T_1063 = bits(buf_sideeffect, 2, 2) @[el2_lsu_bus_buffer.scala 315:111] + node _T_1064 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 315:88] + node _T_1065 = bits(buf_sideeffect, 3, 3) @[el2_lsu_bus_buffer.scala 315:111] + node _T_1066 = mux(_T_1058, _T_1059, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1067 = mux(_T_1060, _T_1061, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1068 = mux(_T_1062, _T_1063, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1069 = mux(_T_1064, _T_1065, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1070 = or(_T_1066, _T_1067) @[Mux.scala 27:72] + node _T_1071 = or(_T_1070, _T_1068) @[Mux.scala 27:72] + node _T_1072 = or(_T_1071, _T_1069) @[Mux.scala 27:72] + wire _T_1073 : UInt<1> @[Mux.scala 27:72] + _T_1073 <= _T_1072 @[Mux.scala 27:72] + node _T_1074 = eq(_T_1073, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 315:5] + node _T_1075 = and(_T_1057, _T_1074) @[el2_lsu_bus_buffer.scala 314:140] + node _T_1076 = eq(obuf_force_wr_en, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 315:119] + node obuf_wr_wait = and(_T_1075, _T_1076) @[el2_lsu_bus_buffer.scala 315:117] + node _T_1077 = orr(buf_numvld_cmd_any) @[el2_lsu_bus_buffer.scala 316:75] + node _T_1078 = lt(obuf_wr_timer, UInt<3>("h07")) @[el2_lsu_bus_buffer.scala 316:95] + node _T_1079 = and(_T_1077, _T_1078) @[el2_lsu_bus_buffer.scala 316:79] + node _T_1080 = add(obuf_wr_timer, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 316:121] + node _T_1081 = tail(_T_1080, 1) @[el2_lsu_bus_buffer.scala 316:121] + node _T_1082 = mux(_T_1079, _T_1081, obuf_wr_timer) @[el2_lsu_bus_buffer.scala 316:55] + node obuf_wr_timer_in = mux(obuf_wr_en, UInt<3>("h00"), _T_1082) @[el2_lsu_bus_buffer.scala 316:29] + node _T_1083 = eq(io.lsu_busreq_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 317:41] + node _T_1084 = and(io.lsu_busreq_m, _T_1083) @[el2_lsu_bus_buffer.scala 317:39] + node _T_1085 = eq(ibuf_valid, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 317:60] + node _T_1086 = and(_T_1084, _T_1085) @[el2_lsu_bus_buffer.scala 317:58] + node _T_1087 = eq(buf_numvld_cmd_any, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 317:93] + node _T_1088 = and(_T_1086, _T_1087) @[el2_lsu_bus_buffer.scala 317:72] + node _T_1089 = bits(io.lsu_addr_m, 31, 2) @[el2_lsu_bus_buffer.scala 317:117] + node _T_1090 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 317:208] + node _T_1091 = bits(buf_addr[0], 31, 2) @[el2_lsu_bus_buffer.scala 317:228] + node _T_1092 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 317:208] + node _T_1093 = bits(buf_addr[1], 31, 2) @[el2_lsu_bus_buffer.scala 317:228] + node _T_1094 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 317:208] + node _T_1095 = bits(buf_addr[2], 31, 2) @[el2_lsu_bus_buffer.scala 317:228] + node _T_1096 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 317:208] + node _T_1097 = bits(buf_addr[3], 31, 2) @[el2_lsu_bus_buffer.scala 317:228] + node _T_1098 = mux(_T_1090, _T_1091, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1099 = mux(_T_1092, _T_1093, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1100 = mux(_T_1094, _T_1095, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1101 = mux(_T_1096, _T_1097, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1102 = or(_T_1098, _T_1099) @[Mux.scala 27:72] + node _T_1103 = or(_T_1102, _T_1100) @[Mux.scala 27:72] + node _T_1104 = or(_T_1103, _T_1101) @[Mux.scala 27:72] + wire _T_1105 : UInt<30> @[Mux.scala 27:72] + _T_1105 <= _T_1104 @[Mux.scala 27:72] + node _T_1106 = neq(_T_1089, _T_1105) @[el2_lsu_bus_buffer.scala 317:123] + node _T_1107 = and(_T_1088, _T_1106) @[el2_lsu_bus_buffer.scala 317:101] + obuf_force_wr_en <= _T_1107 @[el2_lsu_bus_buffer.scala 317:20] + wire buf_numvld_pend_any : UInt<4> + buf_numvld_pend_any <= UInt<1>("h00") + node _T_1108 = eq(buf_numvld_pend_any, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 319:53] + node _T_1109 = and(ibuf_byp, _T_1108) @[el2_lsu_bus_buffer.scala 319:31] + node _T_1110 = eq(io.lsu_pkt_r.store, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 319:64] + node _T_1111 = or(_T_1110, io.no_dword_merge_r) @[el2_lsu_bus_buffer.scala 319:84] + node ibuf_buf_byp = and(_T_1109, _T_1111) @[el2_lsu_bus_buffer.scala 319:61] + wire bus_sideeffect_pend : UInt<1> + bus_sideeffect_pend <= UInt<1>("h00") + wire found_cmdptr0 : UInt<1> + found_cmdptr0 <= UInt<1>("h00") + wire buf_cmd_state_bus_en : UInt<1>[4] @[el2_lsu_bus_buffer.scala 322:34] + buf_cmd_state_bus_en[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 323:24] + buf_cmd_state_bus_en[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 323:24] + buf_cmd_state_bus_en[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 323:24] + buf_cmd_state_bus_en[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 323:24] + wire buf_dual : UInt<1>[4] @[el2_lsu_bus_buffer.scala 324:22] + buf_dual[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 325:12] + buf_dual[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 325:12] + buf_dual[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 325:12] + buf_dual[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 325:12] + wire buf_samedw : UInt<1>[4] @[el2_lsu_bus_buffer.scala 326:24] + buf_samedw[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 327:14] + buf_samedw[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 327:14] + buf_samedw[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 327:14] + buf_samedw[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 327:14] + wire found_cmdptr1 : UInt<1> + found_cmdptr1 <= UInt<1>("h00") + wire bus_cmd_ready : UInt<1> + bus_cmd_ready <= UInt<1>("h00") + wire obuf_valid : UInt<1> + obuf_valid <= UInt<1>("h00") + wire obuf_nosend : UInt<1> + obuf_nosend <= UInt<1>("h00") + wire lsu_bus_cntr_overflow : UInt<1> + lsu_bus_cntr_overflow <= UInt<1>("h00") + wire bus_addr_match_pending : UInt<1> + bus_addr_match_pending <= UInt<1>("h00") + node _T_1112 = and(ibuf_buf_byp, io.lsu_commit_r) @[el2_lsu_bus_buffer.scala 334:32] + node _T_1113 = and(io.is_sideeffects_r, bus_sideeffect_pend) @[el2_lsu_bus_buffer.scala 334:74] + node _T_1114 = eq(_T_1113, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 334:52] + node _T_1115 = and(_T_1112, _T_1114) @[el2_lsu_bus_buffer.scala 334:50] + node _T_1116 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1117 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1118 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1119 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1120 = mux(_T_1116, buf_state[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1121 = mux(_T_1117, buf_state[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1122 = mux(_T_1118, buf_state[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1123 = mux(_T_1119, buf_state[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1124 = or(_T_1120, _T_1121) @[Mux.scala 27:72] + node _T_1125 = or(_T_1124, _T_1122) @[Mux.scala 27:72] + node _T_1126 = or(_T_1125, _T_1123) @[Mux.scala 27:72] + wire _T_1127 : UInt<3> @[Mux.scala 27:72] + _T_1127 <= _T_1126 @[Mux.scala 27:72] + node _T_1128 = eq(_T_1127, UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 335:36] + node _T_1129 = and(_T_1128, found_cmdptr0) @[el2_lsu_bus_buffer.scala 335:47] + node _T_1130 = cat(buf_cmd_state_bus_en[3], buf_cmd_state_bus_en[2]) @[Cat.scala 29:58] + node _T_1131 = cat(_T_1130, buf_cmd_state_bus_en[1]) @[Cat.scala 29:58] + node _T_1132 = cat(_T_1131, buf_cmd_state_bus_en[0]) @[Cat.scala 29:58] + node _T_1133 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1134 = bits(_T_1132, 0, 0) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1135 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1136 = bits(_T_1132, 1, 1) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1137 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1138 = bits(_T_1132, 2, 2) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1139 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1140 = bits(_T_1132, 3, 3) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1141 = mux(_T_1133, _T_1134, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1142 = mux(_T_1135, _T_1136, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1143 = mux(_T_1137, _T_1138, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1144 = mux(_T_1139, _T_1140, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1145 = or(_T_1141, _T_1142) @[Mux.scala 27:72] + node _T_1146 = or(_T_1145, _T_1143) @[Mux.scala 27:72] + node _T_1147 = or(_T_1146, _T_1144) @[Mux.scala 27:72] + wire _T_1148 : UInt<1> @[Mux.scala 27:72] + _T_1148 <= _T_1147 @[Mux.scala 27:72] + node _T_1149 = eq(_T_1148, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 336:23] + node _T_1150 = and(_T_1129, _T_1149) @[el2_lsu_bus_buffer.scala 336:21] + node _T_1151 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1152 = bits(buf_sideeffect, 0, 0) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1153 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1154 = bits(buf_sideeffect, 1, 1) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1155 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1156 = bits(buf_sideeffect, 2, 2) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1157 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1158 = bits(buf_sideeffect, 3, 3) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1159 = mux(_T_1151, _T_1152, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1160 = mux(_T_1153, _T_1154, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1161 = mux(_T_1155, _T_1156, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1162 = mux(_T_1157, _T_1158, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1163 = or(_T_1159, _T_1160) @[Mux.scala 27:72] + node _T_1164 = or(_T_1163, _T_1161) @[Mux.scala 27:72] + node _T_1165 = or(_T_1164, _T_1162) @[Mux.scala 27:72] + wire _T_1166 : UInt<1> @[Mux.scala 27:72] + _T_1166 <= _T_1165 @[Mux.scala 27:72] + node _T_1167 = and(_T_1166, bus_sideeffect_pend) @[el2_lsu_bus_buffer.scala 336:141] + node _T_1168 = eq(_T_1167, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 336:105] + node _T_1169 = and(_T_1150, _T_1168) @[el2_lsu_bus_buffer.scala 336:103] + node _T_1170 = cat(buf_dual[3], buf_dual[2]) @[Cat.scala 29:58] + node _T_1171 = cat(_T_1170, buf_dual[1]) @[Cat.scala 29:58] + node _T_1172 = cat(_T_1171, buf_dual[0]) @[Cat.scala 29:58] + node _T_1173 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1174 = bits(_T_1172, 0, 0) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1175 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1176 = bits(_T_1172, 1, 1) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1177 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1178 = bits(_T_1172, 2, 2) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1179 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1180 = bits(_T_1172, 3, 3) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1181 = mux(_T_1173, _T_1174, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1182 = mux(_T_1175, _T_1176, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1183 = mux(_T_1177, _T_1178, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1184 = mux(_T_1179, _T_1180, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1185 = or(_T_1181, _T_1182) @[Mux.scala 27:72] + node _T_1186 = or(_T_1185, _T_1183) @[Mux.scala 27:72] + node _T_1187 = or(_T_1186, _T_1184) @[Mux.scala 27:72] + wire _T_1188 : UInt<1> @[Mux.scala 27:72] + _T_1188 <= _T_1187 @[Mux.scala 27:72] + node _T_1189 = cat(buf_samedw[3], buf_samedw[2]) @[Cat.scala 29:58] + node _T_1190 = cat(_T_1189, buf_samedw[1]) @[Cat.scala 29:58] + node _T_1191 = cat(_T_1190, buf_samedw[0]) @[Cat.scala 29:58] + node _T_1192 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1193 = bits(_T_1191, 0, 0) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1194 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1195 = bits(_T_1191, 1, 1) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1196 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1197 = bits(_T_1191, 2, 2) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1198 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1199 = bits(_T_1191, 3, 3) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1200 = mux(_T_1192, _T_1193, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1201 = mux(_T_1194, _T_1195, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1202 = mux(_T_1196, _T_1197, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1203 = mux(_T_1198, _T_1199, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1204 = or(_T_1200, _T_1201) @[Mux.scala 27:72] + node _T_1205 = or(_T_1204, _T_1202) @[Mux.scala 27:72] + node _T_1206 = or(_T_1205, _T_1203) @[Mux.scala 27:72] + wire _T_1207 : UInt<1> @[Mux.scala 27:72] + _T_1207 <= _T_1206 @[Mux.scala 27:72] + node _T_1208 = and(_T_1188, _T_1207) @[el2_lsu_bus_buffer.scala 337:77] + node _T_1209 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1210 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1211 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1212 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1213 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1214 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1215 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1216 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1217 = mux(_T_1209, _T_1210, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1218 = mux(_T_1211, _T_1212, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1219 = mux(_T_1213, _T_1214, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1220 = mux(_T_1215, _T_1216, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1221 = or(_T_1217, _T_1218) @[Mux.scala 27:72] + node _T_1222 = or(_T_1221, _T_1219) @[Mux.scala 27:72] + node _T_1223 = or(_T_1222, _T_1220) @[Mux.scala 27:72] + wire _T_1224 : UInt<1> @[Mux.scala 27:72] + _T_1224 <= _T_1223 @[Mux.scala 27:72] + node _T_1225 = eq(_T_1224, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 337:150] + node _T_1226 = and(_T_1208, _T_1225) @[el2_lsu_bus_buffer.scala 337:148] + node _T_1227 = eq(_T_1226, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 337:8] + node _T_1228 = or(_T_1227, found_cmdptr1) @[el2_lsu_bus_buffer.scala 337:181] + node _T_1229 = cat(buf_nomerge[3], buf_nomerge[2]) @[Cat.scala 29:58] + node _T_1230 = cat(_T_1229, buf_nomerge[1]) @[Cat.scala 29:58] + node _T_1231 = cat(_T_1230, buf_nomerge[0]) @[Cat.scala 29:58] + node _T_1232 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1233 = bits(_T_1231, 0, 0) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1234 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1235 = bits(_T_1231, 1, 1) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1236 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1237 = bits(_T_1231, 2, 2) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1238 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1239 = bits(_T_1231, 3, 3) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1240 = mux(_T_1232, _T_1233, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1241 = mux(_T_1234, _T_1235, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1242 = mux(_T_1236, _T_1237, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1243 = mux(_T_1238, _T_1239, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1244 = or(_T_1240, _T_1241) @[Mux.scala 27:72] + node _T_1245 = or(_T_1244, _T_1242) @[Mux.scala 27:72] + node _T_1246 = or(_T_1245, _T_1243) @[Mux.scala 27:72] + wire _T_1247 : UInt<1> @[Mux.scala 27:72] + _T_1247 <= _T_1246 @[Mux.scala 27:72] + node _T_1248 = or(_T_1228, _T_1247) @[el2_lsu_bus_buffer.scala 337:197] + node _T_1249 = or(_T_1248, obuf_force_wr_en) @[el2_lsu_bus_buffer.scala 337:269] + node _T_1250 = and(_T_1169, _T_1249) @[el2_lsu_bus_buffer.scala 336:164] + node _T_1251 = or(_T_1115, _T_1250) @[el2_lsu_bus_buffer.scala 334:98] + node _T_1252 = eq(obuf_valid, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 338:48] + node _T_1253 = or(bus_cmd_ready, _T_1252) @[el2_lsu_bus_buffer.scala 338:46] + node _T_1254 = or(_T_1253, obuf_nosend) @[el2_lsu_bus_buffer.scala 338:60] + node _T_1255 = and(_T_1251, _T_1254) @[el2_lsu_bus_buffer.scala 338:29] + node _T_1256 = eq(obuf_wr_wait, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 338:77] + node _T_1257 = and(_T_1255, _T_1256) @[el2_lsu_bus_buffer.scala 338:75] + node _T_1258 = eq(lsu_bus_cntr_overflow, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 338:93] + node _T_1259 = and(_T_1257, _T_1258) @[el2_lsu_bus_buffer.scala 338:91] + node _T_1260 = eq(bus_addr_match_pending, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 338:118] + node _T_1261 = and(_T_1259, _T_1260) @[el2_lsu_bus_buffer.scala 338:116] + node _T_1262 = and(_T_1261, io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 338:142] + obuf_wr_en <= _T_1262 @[el2_lsu_bus_buffer.scala 334:14] + wire bus_cmd_sent : UInt<1> + bus_cmd_sent <= UInt<1>("h00") + node _T_1263 = and(obuf_valid, obuf_nosend) @[el2_lsu_bus_buffer.scala 340:47] + node _T_1264 = or(bus_cmd_sent, _T_1263) @[el2_lsu_bus_buffer.scala 340:33] + node _T_1265 = eq(obuf_wr_en, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 340:65] + node _T_1266 = and(_T_1264, _T_1265) @[el2_lsu_bus_buffer.scala 340:63] + node _T_1267 = and(_T_1266, io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 340:77] + node obuf_rst = or(_T_1267, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 340:98] + node _T_1268 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1269 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1270 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1271 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1272 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1273 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1274 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1275 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1276 = mux(_T_1268, _T_1269, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1277 = mux(_T_1270, _T_1271, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1278 = mux(_T_1272, _T_1273, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1279 = mux(_T_1274, _T_1275, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1280 = or(_T_1276, _T_1277) @[Mux.scala 27:72] + node _T_1281 = or(_T_1280, _T_1278) @[Mux.scala 27:72] + node _T_1282 = or(_T_1281, _T_1279) @[Mux.scala 27:72] + wire _T_1283 : UInt<1> @[Mux.scala 27:72] + _T_1283 <= _T_1282 @[Mux.scala 27:72] + node obuf_write_in = mux(ibuf_buf_byp, io.lsu_pkt_r.store, _T_1283) @[el2_lsu_bus_buffer.scala 341:26] + node _T_1284 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1285 = bits(buf_sideeffect, 0, 0) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1286 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1287 = bits(buf_sideeffect, 1, 1) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1288 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1289 = bits(buf_sideeffect, 2, 2) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1290 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1291 = bits(buf_sideeffect, 3, 3) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1292 = mux(_T_1284, _T_1285, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1293 = mux(_T_1286, _T_1287, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1294 = mux(_T_1288, _T_1289, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1295 = mux(_T_1290, _T_1291, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1296 = or(_T_1292, _T_1293) @[Mux.scala 27:72] + node _T_1297 = or(_T_1296, _T_1294) @[Mux.scala 27:72] + node _T_1298 = or(_T_1297, _T_1295) @[Mux.scala 27:72] + wire _T_1299 : UInt<1> @[Mux.scala 27:72] + _T_1299 <= _T_1298 @[Mux.scala 27:72] + node obuf_sideeffect_in = mux(ibuf_buf_byp, io.is_sideeffects_r, _T_1299) @[el2_lsu_bus_buffer.scala 342:31] + node _T_1300 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1301 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1302 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1303 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1304 = mux(_T_1300, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1305 = mux(_T_1301, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1306 = mux(_T_1302, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1307 = mux(_T_1303, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1308 = or(_T_1304, _T_1305) @[Mux.scala 27:72] + node _T_1309 = or(_T_1308, _T_1306) @[Mux.scala 27:72] + node _T_1310 = or(_T_1309, _T_1307) @[Mux.scala 27:72] + wire _T_1311 : UInt<32> @[Mux.scala 27:72] + _T_1311 <= _T_1310 @[Mux.scala 27:72] + node obuf_addr_in = mux(ibuf_buf_byp, io.lsu_addr_r, _T_1311) @[el2_lsu_bus_buffer.scala 343:25] + wire buf_sz : UInt<2>[4] @[el2_lsu_bus_buffer.scala 344:20] + buf_sz[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 345:10] + buf_sz[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 345:10] + buf_sz[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 345:10] + buf_sz[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 345:10] + node _T_1312 = cat(io.lsu_pkt_r.word, io.lsu_pkt_r.half) @[Cat.scala 29:58] + node _T_1313 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1314 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1315 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1316 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1317 = mux(_T_1313, buf_sz[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1318 = mux(_T_1314, buf_sz[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1319 = mux(_T_1315, buf_sz[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1320 = mux(_T_1316, buf_sz[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1321 = or(_T_1317, _T_1318) @[Mux.scala 27:72] + node _T_1322 = or(_T_1321, _T_1319) @[Mux.scala 27:72] + node _T_1323 = or(_T_1322, _T_1320) @[Mux.scala 27:72] + wire _T_1324 : UInt<2> @[Mux.scala 27:72] + _T_1324 <= _T_1323 @[Mux.scala 27:72] + node obuf_sz_in = mux(ibuf_buf_byp, _T_1312, _T_1324) @[el2_lsu_bus_buffer.scala 346:23] + wire obuf_merge_en : UInt<1> + obuf_merge_en <= UInt<1>("h00") + node obuf_tag0_in = mux(ibuf_buf_byp, WrPtr0_r, CmdPtr0) @[el2_lsu_bus_buffer.scala 349:25] + wire Cmdptr1 : UInt<2> + Cmdptr1 <= UInt<1>("h00") + node obuf_tag1_in = mux(ibuf_buf_byp, WrPtr1_r, Cmdptr1) @[el2_lsu_bus_buffer.scala 352:25] + wire obuf_cmd_done : UInt<1> + obuf_cmd_done <= UInt<1>("h00") + wire bus_wcmd_sent : UInt<1> + bus_wcmd_sent <= UInt<1>("h00") + node _T_1325 = or(obuf_wr_en, obuf_rst) @[el2_lsu_bus_buffer.scala 355:39] + node _T_1326 = eq(_T_1325, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 355:26] + node _T_1327 = or(obuf_cmd_done, bus_wcmd_sent) @[el2_lsu_bus_buffer.scala 355:68] + node obuf_cmd_done_in = and(_T_1326, _T_1327) @[el2_lsu_bus_buffer.scala 355:51] + wire obuf_data_done : UInt<1> + obuf_data_done <= UInt<1>("h00") + wire bus_wdata_sent : UInt<1> + bus_wdata_sent <= UInt<1>("h00") + node _T_1328 = or(obuf_wr_en, obuf_rst) @[el2_lsu_bus_buffer.scala 358:40] + node _T_1329 = eq(_T_1328, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 358:27] + node _T_1330 = or(obuf_data_done, bus_wdata_sent) @[el2_lsu_bus_buffer.scala 358:70] + node obuf_data_done_in = and(_T_1329, _T_1330) @[el2_lsu_bus_buffer.scala 358:52] + node _T_1331 = bits(obuf_sz_in, 1, 0) @[el2_lsu_bus_buffer.scala 359:67] + node _T_1332 = eq(_T_1331, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 359:72] + node _T_1333 = bits(obuf_sz_in, 0, 0) @[el2_lsu_bus_buffer.scala 359:92] + node _T_1334 = bits(obuf_addr_in, 0, 0) @[el2_lsu_bus_buffer.scala 359:111] + node _T_1335 = eq(_T_1334, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 359:98] + node _T_1336 = and(_T_1333, _T_1335) @[el2_lsu_bus_buffer.scala 359:96] + node _T_1337 = or(_T_1332, _T_1336) @[el2_lsu_bus_buffer.scala 359:79] + node _T_1338 = bits(obuf_sz_in, 1, 1) @[el2_lsu_bus_buffer.scala 359:129] + node _T_1339 = bits(obuf_addr_in, 1, 0) @[el2_lsu_bus_buffer.scala 359:147] + node _T_1340 = orr(_T_1339) @[el2_lsu_bus_buffer.scala 359:153] + node _T_1341 = eq(_T_1340, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 359:134] + node _T_1342 = and(_T_1338, _T_1341) @[el2_lsu_bus_buffer.scala 359:132] + node _T_1343 = or(_T_1337, _T_1342) @[el2_lsu_bus_buffer.scala 359:116] + node obuf_aligned_in = mux(ibuf_buf_byp, is_aligned_r, _T_1343) @[el2_lsu_bus_buffer.scala 359:28] + wire obuf_nosend_in : UInt<1> + obuf_nosend_in <= UInt<1>("h00") + wire obuf_rdrsp_pend : UInt<1> + obuf_rdrsp_pend <= UInt<1>("h00") + wire bus_rsp_read : UInt<1> + bus_rsp_read <= UInt<1>("h00") + wire bus_rsp_read_tag : UInt<3> + bus_rsp_read_tag <= UInt<1>("h00") + wire obuf_rdrsp_tag : UInt<3> + obuf_rdrsp_tag <= UInt<1>("h00") + wire obuf_write : UInt<1> + obuf_write <= UInt<1>("h00") + node _T_1344 = eq(obuf_nosend_in, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 367:44] + node _T_1345 = and(obuf_wr_en, _T_1344) @[el2_lsu_bus_buffer.scala 367:42] + node _T_1346 = eq(_T_1345, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 367:29] + node _T_1347 = and(_T_1346, obuf_rdrsp_pend) @[el2_lsu_bus_buffer.scala 367:61] + node _T_1348 = eq(bus_rsp_read_tag, obuf_rdrsp_tag) @[el2_lsu_bus_buffer.scala 367:116] + node _T_1349 = and(bus_rsp_read, _T_1348) @[el2_lsu_bus_buffer.scala 367:96] + node _T_1350 = eq(_T_1349, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 367:81] + node _T_1351 = and(_T_1347, _T_1350) @[el2_lsu_bus_buffer.scala 367:79] + node _T_1352 = eq(obuf_write, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 368:22] + node _T_1353 = and(bus_cmd_sent, _T_1352) @[el2_lsu_bus_buffer.scala 368:20] + node _T_1354 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 368:37] + node _T_1355 = and(_T_1353, _T_1354) @[el2_lsu_bus_buffer.scala 368:35] + node obuf_rdrsp_pend_in = or(_T_1351, _T_1355) @[el2_lsu_bus_buffer.scala 367:138] + wire obuf_tag0 : UInt<3> + obuf_tag0 <= UInt<1>("h00") + node _T_1356 = eq(obuf_write, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 370:46] + node _T_1357 = or(bus_cmd_sent, _T_1356) @[el2_lsu_bus_buffer.scala 370:44] + node obuf_rdrsp_tag_in = mux(_T_1357, obuf_tag0, obuf_rdrsp_tag) @[el2_lsu_bus_buffer.scala 370:30] + wire obuf_addr : UInt<32> + obuf_addr <= UInt<1>("h00") + wire obuf_sideeffect : UInt<1> + obuf_sideeffect <= UInt<1>("h00") + node _T_1358 = bits(obuf_addr_in, 31, 3) @[el2_lsu_bus_buffer.scala 373:34] + node _T_1359 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 373:52] + node _T_1360 = eq(_T_1358, _T_1359) @[el2_lsu_bus_buffer.scala 373:40] + node _T_1361 = and(_T_1360, obuf_aligned_in) @[el2_lsu_bus_buffer.scala 373:60] + node _T_1362 = eq(obuf_sideeffect, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 373:80] + node _T_1363 = and(_T_1361, _T_1362) @[el2_lsu_bus_buffer.scala 373:78] + node _T_1364 = eq(obuf_write, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 373:99] + node _T_1365 = and(_T_1363, _T_1364) @[el2_lsu_bus_buffer.scala 373:97] + node _T_1366 = eq(obuf_write_in, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 373:113] + node _T_1367 = and(_T_1365, _T_1366) @[el2_lsu_bus_buffer.scala 373:111] + node _T_1368 = eq(io.dec_tlu_external_ldfwd_disable, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 373:130] + node _T_1369 = and(_T_1367, _T_1368) @[el2_lsu_bus_buffer.scala 373:128] + node _T_1370 = eq(obuf_nosend, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 374:20] + node _T_1371 = and(obuf_valid, _T_1370) @[el2_lsu_bus_buffer.scala 374:18] + node _T_1372 = eq(bus_rsp_read_tag, obuf_rdrsp_tag) @[el2_lsu_bus_buffer.scala 374:90] + node _T_1373 = and(bus_rsp_read, _T_1372) @[el2_lsu_bus_buffer.scala 374:70] + node _T_1374 = eq(_T_1373, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 374:55] + node _T_1375 = and(obuf_rdrsp_pend, _T_1374) @[el2_lsu_bus_buffer.scala 374:53] + node _T_1376 = or(_T_1371, _T_1375) @[el2_lsu_bus_buffer.scala 374:34] + node _T_1377 = and(_T_1369, _T_1376) @[el2_lsu_bus_buffer.scala 373:165] + obuf_nosend_in <= _T_1377 @[el2_lsu_bus_buffer.scala 373:18] + node _T_1378 = bits(io.lsu_addr_r, 2, 2) @[el2_lsu_bus_buffer.scala 375:60] + node _T_1379 = cat(ldst_byteen_lo_r, UInt<4>("h00")) @[Cat.scala 29:58] + node _T_1380 = cat(UInt<4>("h00"), ldst_byteen_lo_r) @[Cat.scala 29:58] + node _T_1381 = mux(_T_1378, _T_1379, _T_1380) @[el2_lsu_bus_buffer.scala 375:46] + node _T_1382 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1383 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1384 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1385 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1386 = mux(_T_1382, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1387 = mux(_T_1383, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1388 = mux(_T_1384, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1389 = mux(_T_1385, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1390 = or(_T_1386, _T_1387) @[Mux.scala 27:72] + node _T_1391 = or(_T_1390, _T_1388) @[Mux.scala 27:72] + node _T_1392 = or(_T_1391, _T_1389) @[Mux.scala 27:72] + wire _T_1393 : UInt<32> @[Mux.scala 27:72] + _T_1393 <= _T_1392 @[Mux.scala 27:72] + node _T_1394 = bits(_T_1393, 2, 2) @[el2_lsu_bus_buffer.scala 376:36] + node _T_1395 = bits(_T_1394, 0, 0) @[el2_lsu_bus_buffer.scala 376:46] + node _T_1396 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1397 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1398 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1399 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1400 = mux(_T_1396, buf_byteen[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1401 = mux(_T_1397, buf_byteen[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1402 = mux(_T_1398, buf_byteen[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1403 = mux(_T_1399, buf_byteen[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1404 = or(_T_1400, _T_1401) @[Mux.scala 27:72] + node _T_1405 = or(_T_1404, _T_1402) @[Mux.scala 27:72] + node _T_1406 = or(_T_1405, _T_1403) @[Mux.scala 27:72] + wire _T_1407 : UInt<4> @[Mux.scala 27:72] + _T_1407 <= _T_1406 @[Mux.scala 27:72] + node _T_1408 = cat(_T_1407, UInt<4>("h00")) @[Cat.scala 29:58] + node _T_1409 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1410 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1411 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1412 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1413 = mux(_T_1409, buf_byteen[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1414 = mux(_T_1410, buf_byteen[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1415 = mux(_T_1411, buf_byteen[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1416 = mux(_T_1412, buf_byteen[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1417 = or(_T_1413, _T_1414) @[Mux.scala 27:72] + node _T_1418 = or(_T_1417, _T_1415) @[Mux.scala 27:72] + node _T_1419 = or(_T_1418, _T_1416) @[Mux.scala 27:72] + wire _T_1420 : UInt<4> @[Mux.scala 27:72] + _T_1420 <= _T_1419 @[Mux.scala 27:72] + node _T_1421 = cat(UInt<4>("h00"), _T_1420) @[Cat.scala 29:58] + node _T_1422 = mux(_T_1395, _T_1408, _T_1421) @[el2_lsu_bus_buffer.scala 376:8] + node obuf_byteen0_in = mux(ibuf_buf_byp, _T_1381, _T_1422) @[el2_lsu_bus_buffer.scala 375:28] + node _T_1423 = bits(io.end_addr_r, 2, 2) @[el2_lsu_bus_buffer.scala 377:60] + node _T_1424 = cat(ldst_byteen_hi_r, UInt<4>("h00")) @[Cat.scala 29:58] + node _T_1425 = cat(UInt<4>("h00"), ldst_byteen_hi_r) @[Cat.scala 29:58] + node _T_1426 = mux(_T_1423, _T_1424, _T_1425) @[el2_lsu_bus_buffer.scala 377:46] + node _T_1427 = eq(Cmdptr1, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1428 = eq(Cmdptr1, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1429 = eq(Cmdptr1, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1430 = eq(Cmdptr1, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1431 = mux(_T_1427, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1432 = mux(_T_1428, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1433 = mux(_T_1429, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1434 = mux(_T_1430, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1435 = or(_T_1431, _T_1432) @[Mux.scala 27:72] + node _T_1436 = or(_T_1435, _T_1433) @[Mux.scala 27:72] + node _T_1437 = or(_T_1436, _T_1434) @[Mux.scala 27:72] + wire _T_1438 : UInt<32> @[Mux.scala 27:72] + _T_1438 <= _T_1437 @[Mux.scala 27:72] + node _T_1439 = bits(_T_1438, 2, 2) @[el2_lsu_bus_buffer.scala 378:36] + node _T_1440 = bits(_T_1439, 0, 0) @[el2_lsu_bus_buffer.scala 378:46] + node _T_1441 = eq(Cmdptr1, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1442 = eq(Cmdptr1, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1443 = eq(Cmdptr1, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1444 = eq(Cmdptr1, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1445 = mux(_T_1441, buf_byteen[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1446 = mux(_T_1442, buf_byteen[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1447 = mux(_T_1443, buf_byteen[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1448 = mux(_T_1444, buf_byteen[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1449 = or(_T_1445, _T_1446) @[Mux.scala 27:72] + node _T_1450 = or(_T_1449, _T_1447) @[Mux.scala 27:72] + node _T_1451 = or(_T_1450, _T_1448) @[Mux.scala 27:72] + wire _T_1452 : UInt<4> @[Mux.scala 27:72] + _T_1452 <= _T_1451 @[Mux.scala 27:72] + node _T_1453 = cat(_T_1452, UInt<4>("h00")) @[Cat.scala 29:58] + node _T_1454 = eq(Cmdptr1, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1455 = eq(Cmdptr1, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1456 = eq(Cmdptr1, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1457 = eq(Cmdptr1, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1458 = mux(_T_1454, buf_byteen[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1459 = mux(_T_1455, buf_byteen[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1460 = mux(_T_1456, buf_byteen[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1461 = mux(_T_1457, buf_byteen[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1462 = or(_T_1458, _T_1459) @[Mux.scala 27:72] + node _T_1463 = or(_T_1462, _T_1460) @[Mux.scala 27:72] + node _T_1464 = or(_T_1463, _T_1461) @[Mux.scala 27:72] + wire _T_1465 : UInt<4> @[Mux.scala 27:72] + _T_1465 <= _T_1464 @[Mux.scala 27:72] + node _T_1466 = cat(UInt<4>("h00"), _T_1465) @[Cat.scala 29:58] + node _T_1467 = mux(_T_1440, _T_1453, _T_1466) @[el2_lsu_bus_buffer.scala 378:8] + node obuf_byteen1_in = mux(ibuf_buf_byp, _T_1426, _T_1467) @[el2_lsu_bus_buffer.scala 377:28] + node _T_1468 = bits(io.lsu_addr_r, 2, 2) @[el2_lsu_bus_buffer.scala 380:58] + node _T_1469 = cat(store_data_lo_r, UInt<32>("h00")) @[Cat.scala 29:58] + node _T_1470 = cat(UInt<32>("h00"), store_data_lo_r) @[Cat.scala 29:58] + node _T_1471 = mux(_T_1468, _T_1469, _T_1470) @[el2_lsu_bus_buffer.scala 380:44] + node _T_1472 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1473 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1474 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1475 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1476 = mux(_T_1472, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1477 = mux(_T_1473, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1478 = mux(_T_1474, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1479 = mux(_T_1475, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1480 = or(_T_1476, _T_1477) @[Mux.scala 27:72] + node _T_1481 = or(_T_1480, _T_1478) @[Mux.scala 27:72] + node _T_1482 = or(_T_1481, _T_1479) @[Mux.scala 27:72] + wire _T_1483 : UInt<32> @[Mux.scala 27:72] + _T_1483 <= _T_1482 @[Mux.scala 27:72] + node _T_1484 = bits(_T_1483, 2, 2) @[el2_lsu_bus_buffer.scala 381:36] + node _T_1485 = bits(_T_1484, 0, 0) @[el2_lsu_bus_buffer.scala 381:46] + node _T_1486 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1487 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1488 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1489 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1490 = mux(_T_1486, buf_data[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1491 = mux(_T_1487, buf_data[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1492 = mux(_T_1488, buf_data[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1493 = mux(_T_1489, buf_data[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1494 = or(_T_1490, _T_1491) @[Mux.scala 27:72] + node _T_1495 = or(_T_1494, _T_1492) @[Mux.scala 27:72] + node _T_1496 = or(_T_1495, _T_1493) @[Mux.scala 27:72] + wire _T_1497 : UInt<32> @[Mux.scala 27:72] + _T_1497 <= _T_1496 @[Mux.scala 27:72] + node _T_1498 = cat(_T_1497, UInt<32>("h00")) @[Cat.scala 29:58] + node _T_1499 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1500 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1501 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1502 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1503 = mux(_T_1499, buf_data[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1504 = mux(_T_1500, buf_data[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1505 = mux(_T_1501, buf_data[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1506 = mux(_T_1502, buf_data[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1507 = or(_T_1503, _T_1504) @[Mux.scala 27:72] + node _T_1508 = or(_T_1507, _T_1505) @[Mux.scala 27:72] + node _T_1509 = or(_T_1508, _T_1506) @[Mux.scala 27:72] + wire _T_1510 : UInt<32> @[Mux.scala 27:72] + _T_1510 <= _T_1509 @[Mux.scala 27:72] + node _T_1511 = cat(UInt<32>("h00"), _T_1510) @[Cat.scala 29:58] + node _T_1512 = mux(_T_1485, _T_1498, _T_1511) @[el2_lsu_bus_buffer.scala 381:8] + node obuf_data0_in = mux(ibuf_buf_byp, _T_1471, _T_1512) @[el2_lsu_bus_buffer.scala 380:26] + node _T_1513 = bits(io.lsu_addr_r, 2, 2) @[el2_lsu_bus_buffer.scala 382:58] + node _T_1514 = cat(store_data_hi_r, UInt<32>("h00")) @[Cat.scala 29:58] + node _T_1515 = cat(UInt<32>("h00"), store_data_hi_r) @[Cat.scala 29:58] + node _T_1516 = mux(_T_1513, _T_1514, _T_1515) @[el2_lsu_bus_buffer.scala 382:44] + node _T_1517 = eq(Cmdptr1, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1518 = eq(Cmdptr1, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1519 = eq(Cmdptr1, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1520 = eq(Cmdptr1, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1521 = mux(_T_1517, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1522 = mux(_T_1518, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1523 = mux(_T_1519, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1524 = mux(_T_1520, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1525 = or(_T_1521, _T_1522) @[Mux.scala 27:72] + node _T_1526 = or(_T_1525, _T_1523) @[Mux.scala 27:72] + node _T_1527 = or(_T_1526, _T_1524) @[Mux.scala 27:72] + wire _T_1528 : UInt<32> @[Mux.scala 27:72] + _T_1528 <= _T_1527 @[Mux.scala 27:72] + node _T_1529 = bits(_T_1528, 2, 2) @[el2_lsu_bus_buffer.scala 383:36] + node _T_1530 = bits(_T_1529, 0, 0) @[el2_lsu_bus_buffer.scala 383:46] + node _T_1531 = eq(Cmdptr1, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1532 = eq(Cmdptr1, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1533 = eq(Cmdptr1, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1534 = eq(Cmdptr1, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1535 = mux(_T_1531, buf_data[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1536 = mux(_T_1532, buf_data[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1537 = mux(_T_1533, buf_data[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1538 = mux(_T_1534, buf_data[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1539 = or(_T_1535, _T_1536) @[Mux.scala 27:72] + node _T_1540 = or(_T_1539, _T_1537) @[Mux.scala 27:72] + node _T_1541 = or(_T_1540, _T_1538) @[Mux.scala 27:72] + wire _T_1542 : UInt<32> @[Mux.scala 27:72] + _T_1542 <= _T_1541 @[Mux.scala 27:72] + node _T_1543 = cat(_T_1542, UInt<32>("h00")) @[Cat.scala 29:58] + node _T_1544 = eq(Cmdptr1, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1545 = eq(Cmdptr1, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1546 = eq(Cmdptr1, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1547 = eq(Cmdptr1, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1548 = mux(_T_1544, buf_data[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1549 = mux(_T_1545, buf_data[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1550 = mux(_T_1546, buf_data[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1551 = mux(_T_1547, buf_data[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1552 = or(_T_1548, _T_1549) @[Mux.scala 27:72] + node _T_1553 = or(_T_1552, _T_1550) @[Mux.scala 27:72] + node _T_1554 = or(_T_1553, _T_1551) @[Mux.scala 27:72] + wire _T_1555 : UInt<32> @[Mux.scala 27:72] + _T_1555 <= _T_1554 @[Mux.scala 27:72] + node _T_1556 = cat(UInt<32>("h00"), _T_1555) @[Cat.scala 29:58] + node _T_1557 = mux(_T_1530, _T_1543, _T_1556) @[el2_lsu_bus_buffer.scala 383:8] + node obuf_data1_in = mux(ibuf_buf_byp, _T_1516, _T_1557) @[el2_lsu_bus_buffer.scala 382:26] + node _T_1558 = bits(obuf_byteen0_in, 0, 0) @[el2_lsu_bus_buffer.scala 384:59] + node _T_1559 = bits(obuf_byteen1_in, 0, 0) @[el2_lsu_bus_buffer.scala 384:97] + node _T_1560 = and(obuf_merge_en, _T_1559) @[el2_lsu_bus_buffer.scala 384:80] + node _T_1561 = or(_T_1558, _T_1560) @[el2_lsu_bus_buffer.scala 384:63] + node _T_1562 = bits(obuf_byteen0_in, 1, 1) @[el2_lsu_bus_buffer.scala 384:59] + node _T_1563 = bits(obuf_byteen1_in, 1, 1) @[el2_lsu_bus_buffer.scala 384:97] + node _T_1564 = and(obuf_merge_en, _T_1563) @[el2_lsu_bus_buffer.scala 384:80] + node _T_1565 = or(_T_1562, _T_1564) @[el2_lsu_bus_buffer.scala 384:63] + node _T_1566 = bits(obuf_byteen0_in, 2, 2) @[el2_lsu_bus_buffer.scala 384:59] + node _T_1567 = bits(obuf_byteen1_in, 2, 2) @[el2_lsu_bus_buffer.scala 384:97] + node _T_1568 = and(obuf_merge_en, _T_1567) @[el2_lsu_bus_buffer.scala 384:80] + node _T_1569 = or(_T_1566, _T_1568) @[el2_lsu_bus_buffer.scala 384:63] + node _T_1570 = bits(obuf_byteen0_in, 3, 3) @[el2_lsu_bus_buffer.scala 384:59] + node _T_1571 = bits(obuf_byteen1_in, 3, 3) @[el2_lsu_bus_buffer.scala 384:97] + node _T_1572 = and(obuf_merge_en, _T_1571) @[el2_lsu_bus_buffer.scala 384:80] + node _T_1573 = or(_T_1570, _T_1572) @[el2_lsu_bus_buffer.scala 384:63] + node _T_1574 = bits(obuf_byteen0_in, 4, 4) @[el2_lsu_bus_buffer.scala 384:59] + node _T_1575 = bits(obuf_byteen1_in, 4, 4) @[el2_lsu_bus_buffer.scala 384:97] + node _T_1576 = and(obuf_merge_en, _T_1575) @[el2_lsu_bus_buffer.scala 384:80] + node _T_1577 = or(_T_1574, _T_1576) @[el2_lsu_bus_buffer.scala 384:63] + node _T_1578 = bits(obuf_byteen0_in, 5, 5) @[el2_lsu_bus_buffer.scala 384:59] + node _T_1579 = bits(obuf_byteen1_in, 5, 5) @[el2_lsu_bus_buffer.scala 384:97] + node _T_1580 = and(obuf_merge_en, _T_1579) @[el2_lsu_bus_buffer.scala 384:80] + node _T_1581 = or(_T_1578, _T_1580) @[el2_lsu_bus_buffer.scala 384:63] + node _T_1582 = bits(obuf_byteen0_in, 6, 6) @[el2_lsu_bus_buffer.scala 384:59] + node _T_1583 = bits(obuf_byteen1_in, 6, 6) @[el2_lsu_bus_buffer.scala 384:97] + node _T_1584 = and(obuf_merge_en, _T_1583) @[el2_lsu_bus_buffer.scala 384:80] + node _T_1585 = or(_T_1582, _T_1584) @[el2_lsu_bus_buffer.scala 384:63] + node _T_1586 = bits(obuf_byteen0_in, 7, 7) @[el2_lsu_bus_buffer.scala 384:59] + node _T_1587 = bits(obuf_byteen1_in, 7, 7) @[el2_lsu_bus_buffer.scala 384:97] + node _T_1588 = and(obuf_merge_en, _T_1587) @[el2_lsu_bus_buffer.scala 384:80] + node _T_1589 = or(_T_1586, _T_1588) @[el2_lsu_bus_buffer.scala 384:63] + node _T_1590 = cat(_T_1589, _T_1585) @[Cat.scala 29:58] + node _T_1591 = cat(_T_1590, _T_1581) @[Cat.scala 29:58] + node _T_1592 = cat(_T_1591, _T_1577) @[Cat.scala 29:58] + node _T_1593 = cat(_T_1592, _T_1573) @[Cat.scala 29:58] + node _T_1594 = cat(_T_1593, _T_1569) @[Cat.scala 29:58] + node _T_1595 = cat(_T_1594, _T_1565) @[Cat.scala 29:58] + node obuf_byteen_in = cat(_T_1595, _T_1561) @[Cat.scala 29:58] + node _T_1596 = bits(obuf_byteen1_in, 0, 0) @[el2_lsu_bus_buffer.scala 385:76] + node _T_1597 = and(obuf_merge_en, _T_1596) @[el2_lsu_bus_buffer.scala 385:59] + node _T_1598 = bits(obuf_data1_in, 7, 0) @[el2_lsu_bus_buffer.scala 385:94] + node _T_1599 = bits(obuf_data0_in, 7, 0) @[el2_lsu_bus_buffer.scala 385:123] + node _T_1600 = mux(_T_1597, _T_1598, _T_1599) @[el2_lsu_bus_buffer.scala 385:44] + node _T_1601 = bits(obuf_byteen1_in, 1, 1) @[el2_lsu_bus_buffer.scala 385:76] + node _T_1602 = and(obuf_merge_en, _T_1601) @[el2_lsu_bus_buffer.scala 385:59] + node _T_1603 = bits(obuf_data1_in, 15, 8) @[el2_lsu_bus_buffer.scala 385:94] + node _T_1604 = bits(obuf_data0_in, 15, 8) @[el2_lsu_bus_buffer.scala 385:123] + node _T_1605 = mux(_T_1602, _T_1603, _T_1604) @[el2_lsu_bus_buffer.scala 385:44] + node _T_1606 = bits(obuf_byteen1_in, 2, 2) @[el2_lsu_bus_buffer.scala 385:76] + node _T_1607 = and(obuf_merge_en, _T_1606) @[el2_lsu_bus_buffer.scala 385:59] + node _T_1608 = bits(obuf_data1_in, 23, 16) @[el2_lsu_bus_buffer.scala 385:94] + node _T_1609 = bits(obuf_data0_in, 23, 16) @[el2_lsu_bus_buffer.scala 385:123] + node _T_1610 = mux(_T_1607, _T_1608, _T_1609) @[el2_lsu_bus_buffer.scala 385:44] + node _T_1611 = bits(obuf_byteen1_in, 3, 3) @[el2_lsu_bus_buffer.scala 385:76] + node _T_1612 = and(obuf_merge_en, _T_1611) @[el2_lsu_bus_buffer.scala 385:59] + node _T_1613 = bits(obuf_data1_in, 31, 24) @[el2_lsu_bus_buffer.scala 385:94] + node _T_1614 = bits(obuf_data0_in, 31, 24) @[el2_lsu_bus_buffer.scala 385:123] + node _T_1615 = mux(_T_1612, _T_1613, _T_1614) @[el2_lsu_bus_buffer.scala 385:44] + node _T_1616 = bits(obuf_byteen1_in, 4, 4) @[el2_lsu_bus_buffer.scala 385:76] + node _T_1617 = and(obuf_merge_en, _T_1616) @[el2_lsu_bus_buffer.scala 385:59] + node _T_1618 = bits(obuf_data1_in, 39, 32) @[el2_lsu_bus_buffer.scala 385:94] + node _T_1619 = bits(obuf_data0_in, 39, 32) @[el2_lsu_bus_buffer.scala 385:123] + node _T_1620 = mux(_T_1617, _T_1618, _T_1619) @[el2_lsu_bus_buffer.scala 385:44] + node _T_1621 = bits(obuf_byteen1_in, 5, 5) @[el2_lsu_bus_buffer.scala 385:76] + node _T_1622 = and(obuf_merge_en, _T_1621) @[el2_lsu_bus_buffer.scala 385:59] + node _T_1623 = bits(obuf_data1_in, 47, 40) @[el2_lsu_bus_buffer.scala 385:94] + node _T_1624 = bits(obuf_data0_in, 47, 40) @[el2_lsu_bus_buffer.scala 385:123] + node _T_1625 = mux(_T_1622, _T_1623, _T_1624) @[el2_lsu_bus_buffer.scala 385:44] + node _T_1626 = bits(obuf_byteen1_in, 6, 6) @[el2_lsu_bus_buffer.scala 385:76] + node _T_1627 = and(obuf_merge_en, _T_1626) @[el2_lsu_bus_buffer.scala 385:59] + node _T_1628 = bits(obuf_data1_in, 55, 48) @[el2_lsu_bus_buffer.scala 385:94] + node _T_1629 = bits(obuf_data0_in, 55, 48) @[el2_lsu_bus_buffer.scala 385:123] + node _T_1630 = mux(_T_1627, _T_1628, _T_1629) @[el2_lsu_bus_buffer.scala 385:44] + node _T_1631 = bits(obuf_byteen1_in, 7, 7) @[el2_lsu_bus_buffer.scala 385:76] + node _T_1632 = and(obuf_merge_en, _T_1631) @[el2_lsu_bus_buffer.scala 385:59] + node _T_1633 = bits(obuf_data1_in, 63, 56) @[el2_lsu_bus_buffer.scala 385:94] + node _T_1634 = bits(obuf_data0_in, 63, 56) @[el2_lsu_bus_buffer.scala 385:123] + node _T_1635 = mux(_T_1632, _T_1633, _T_1634) @[el2_lsu_bus_buffer.scala 385:44] + node _T_1636 = cat(_T_1635, _T_1630) @[Cat.scala 29:58] + node _T_1637 = cat(_T_1636, _T_1625) @[Cat.scala 29:58] + node _T_1638 = cat(_T_1637, _T_1620) @[Cat.scala 29:58] + node _T_1639 = cat(_T_1638, _T_1615) @[Cat.scala 29:58] + node _T_1640 = cat(_T_1639, _T_1610) @[Cat.scala 29:58] + node _T_1641 = cat(_T_1640, _T_1605) @[Cat.scala 29:58] + node obuf_data_in = cat(_T_1641, _T_1600) @[Cat.scala 29:58] + wire buf_dualhi : UInt<1>[4] @[el2_lsu_bus_buffer.scala 387:24] + buf_dualhi[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 388:14] + buf_dualhi[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 388:14] + buf_dualhi[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 388:14] + buf_dualhi[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 388:14] + node _T_1642 = neq(CmdPtr0, Cmdptr1) @[el2_lsu_bus_buffer.scala 389:30] + node _T_1643 = and(_T_1642, found_cmdptr0) @[el2_lsu_bus_buffer.scala 389:43] + node _T_1644 = and(_T_1643, found_cmdptr1) @[el2_lsu_bus_buffer.scala 389:59] + node _T_1645 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1646 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1647 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1648 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1649 = mux(_T_1645, buf_state[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1650 = mux(_T_1646, buf_state[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1651 = mux(_T_1647, buf_state[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1652 = mux(_T_1648, buf_state[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1653 = or(_T_1649, _T_1650) @[Mux.scala 27:72] + node _T_1654 = or(_T_1653, _T_1651) @[Mux.scala 27:72] + node _T_1655 = or(_T_1654, _T_1652) @[Mux.scala 27:72] + wire _T_1656 : UInt<3> @[Mux.scala 27:72] + _T_1656 <= _T_1655 @[Mux.scala 27:72] + node _T_1657 = eq(_T_1656, UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 389:107] + node _T_1658 = and(_T_1644, _T_1657) @[el2_lsu_bus_buffer.scala 389:75] + node _T_1659 = eq(Cmdptr1, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1660 = eq(Cmdptr1, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1661 = eq(Cmdptr1, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1662 = eq(Cmdptr1, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1663 = mux(_T_1659, buf_state[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1664 = mux(_T_1660, buf_state[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1665 = mux(_T_1661, buf_state[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1666 = mux(_T_1662, buf_state[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1667 = or(_T_1663, _T_1664) @[Mux.scala 27:72] + node _T_1668 = or(_T_1667, _T_1665) @[Mux.scala 27:72] + node _T_1669 = or(_T_1668, _T_1666) @[Mux.scala 27:72] + wire _T_1670 : UInt<3> @[Mux.scala 27:72] + _T_1670 <= _T_1669 @[Mux.scala 27:72] + node _T_1671 = eq(_T_1670, UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 389:150] + node _T_1672 = and(_T_1658, _T_1671) @[el2_lsu_bus_buffer.scala 389:118] + node _T_1673 = cat(buf_cmd_state_bus_en[3], buf_cmd_state_bus_en[2]) @[Cat.scala 29:58] + node _T_1674 = cat(_T_1673, buf_cmd_state_bus_en[1]) @[Cat.scala 29:58] + node _T_1675 = cat(_T_1674, buf_cmd_state_bus_en[0]) @[Cat.scala 29:58] + node _T_1676 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1677 = bits(_T_1675, 0, 0) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1678 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1679 = bits(_T_1675, 1, 1) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1680 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1681 = bits(_T_1675, 2, 2) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1682 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1683 = bits(_T_1675, 3, 3) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1684 = mux(_T_1676, _T_1677, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1685 = mux(_T_1678, _T_1679, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1686 = mux(_T_1680, _T_1681, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1687 = mux(_T_1682, _T_1683, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1688 = or(_T_1684, _T_1685) @[Mux.scala 27:72] + node _T_1689 = or(_T_1688, _T_1686) @[Mux.scala 27:72] + node _T_1690 = or(_T_1689, _T_1687) @[Mux.scala 27:72] + wire _T_1691 : UInt<1> @[Mux.scala 27:72] + _T_1691 <= _T_1690 @[Mux.scala 27:72] + node _T_1692 = eq(_T_1691, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 390:3] + node _T_1693 = and(_T_1672, _T_1692) @[el2_lsu_bus_buffer.scala 389:161] + node _T_1694 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1695 = bits(buf_sideeffect, 0, 0) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1696 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1697 = bits(buf_sideeffect, 1, 1) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1698 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1699 = bits(buf_sideeffect, 2, 2) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1700 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1701 = bits(buf_sideeffect, 3, 3) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1702 = mux(_T_1694, _T_1695, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1703 = mux(_T_1696, _T_1697, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1704 = mux(_T_1698, _T_1699, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1705 = mux(_T_1700, _T_1701, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1706 = or(_T_1702, _T_1703) @[Mux.scala 27:72] + node _T_1707 = or(_T_1706, _T_1704) @[Mux.scala 27:72] + node _T_1708 = or(_T_1707, _T_1705) @[Mux.scala 27:72] + wire _T_1709 : UInt<1> @[Mux.scala 27:72] + _T_1709 <= _T_1708 @[Mux.scala 27:72] + node _T_1710 = eq(_T_1709, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 390:85] + node _T_1711 = and(_T_1693, _T_1710) @[el2_lsu_bus_buffer.scala 390:83] + node _T_1712 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1713 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1714 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1715 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1716 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1717 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1718 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1719 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1720 = mux(_T_1712, _T_1713, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1721 = mux(_T_1714, _T_1715, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1722 = mux(_T_1716, _T_1717, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1723 = mux(_T_1718, _T_1719, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1724 = or(_T_1720, _T_1721) @[Mux.scala 27:72] + node _T_1725 = or(_T_1724, _T_1722) @[Mux.scala 27:72] + node _T_1726 = or(_T_1725, _T_1723) @[Mux.scala 27:72] + wire _T_1727 : UInt<1> @[Mux.scala 27:72] + _T_1727 <= _T_1726 @[Mux.scala 27:72] + node _T_1728 = eq(Cmdptr1, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1729 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1730 = eq(Cmdptr1, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1731 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1732 = eq(Cmdptr1, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1733 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1734 = eq(Cmdptr1, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1735 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1736 = mux(_T_1728, _T_1729, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1737 = mux(_T_1730, _T_1731, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1738 = mux(_T_1732, _T_1733, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1739 = mux(_T_1734, _T_1735, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1740 = or(_T_1736, _T_1737) @[Mux.scala 27:72] + node _T_1741 = or(_T_1740, _T_1738) @[Mux.scala 27:72] + node _T_1742 = or(_T_1741, _T_1739) @[Mux.scala 27:72] + wire _T_1743 : UInt<1> @[Mux.scala 27:72] + _T_1743 <= _T_1742 @[Mux.scala 27:72] + node _T_1744 = and(_T_1727, _T_1743) @[el2_lsu_bus_buffer.scala 391:36] + node _T_1745 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1746 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1747 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1748 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1749 = mux(_T_1745, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1750 = mux(_T_1746, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1751 = mux(_T_1747, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1752 = mux(_T_1748, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1753 = or(_T_1749, _T_1750) @[Mux.scala 27:72] + node _T_1754 = or(_T_1753, _T_1751) @[Mux.scala 27:72] + node _T_1755 = or(_T_1754, _T_1752) @[Mux.scala 27:72] + wire _T_1756 : UInt<32> @[Mux.scala 27:72] + _T_1756 <= _T_1755 @[Mux.scala 27:72] + node _T_1757 = bits(_T_1756, 31, 3) @[el2_lsu_bus_buffer.scala 392:33] + node _T_1758 = eq(Cmdptr1, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1759 = eq(Cmdptr1, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1760 = eq(Cmdptr1, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1761 = eq(Cmdptr1, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_1762 = mux(_T_1758, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1763 = mux(_T_1759, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1764 = mux(_T_1760, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1765 = mux(_T_1761, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1766 = or(_T_1762, _T_1763) @[Mux.scala 27:72] + node _T_1767 = or(_T_1766, _T_1764) @[Mux.scala 27:72] + node _T_1768 = or(_T_1767, _T_1765) @[Mux.scala 27:72] + wire _T_1769 : UInt<32> @[Mux.scala 27:72] + _T_1769 <= _T_1768 @[Mux.scala 27:72] + node _T_1770 = bits(_T_1769, 31, 3) @[el2_lsu_bus_buffer.scala 392:69] + node _T_1771 = eq(_T_1757, _T_1770) @[el2_lsu_bus_buffer.scala 392:39] + node _T_1772 = and(_T_1744, _T_1771) @[el2_lsu_bus_buffer.scala 391:67] + node _T_1773 = eq(bus_coalescing_disable, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 392:79] + node _T_1774 = and(_T_1772, _T_1773) @[el2_lsu_bus_buffer.scala 392:77] + node _T_1775 = eq(UInt<1>("h01"), UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 392:105] + node _T_1776 = and(_T_1774, _T_1775) @[el2_lsu_bus_buffer.scala 392:103] + node _T_1777 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1778 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1779 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1780 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1781 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1782 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1783 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1784 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1785 = mux(_T_1777, _T_1778, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1786 = mux(_T_1779, _T_1780, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1787 = mux(_T_1781, _T_1782, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1788 = mux(_T_1783, _T_1784, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1789 = or(_T_1785, _T_1786) @[Mux.scala 27:72] + node _T_1790 = or(_T_1789, _T_1787) @[Mux.scala 27:72] + node _T_1791 = or(_T_1790, _T_1788) @[Mux.scala 27:72] + wire _T_1792 : UInt<1> @[Mux.scala 27:72] + _T_1792 <= _T_1791 @[Mux.scala 27:72] + node _T_1793 = eq(_T_1792, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 393:6] + node _T_1794 = cat(buf_dual[3], buf_dual[2]) @[Cat.scala 29:58] + node _T_1795 = cat(_T_1794, buf_dual[1]) @[Cat.scala 29:58] + node _T_1796 = cat(_T_1795, buf_dual[0]) @[Cat.scala 29:58] + node _T_1797 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1798 = bits(_T_1796, 0, 0) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1799 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1800 = bits(_T_1796, 1, 1) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1801 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1802 = bits(_T_1796, 2, 2) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1803 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1804 = bits(_T_1796, 3, 3) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1805 = mux(_T_1797, _T_1798, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1806 = mux(_T_1799, _T_1800, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1807 = mux(_T_1801, _T_1802, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1808 = mux(_T_1803, _T_1804, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1809 = or(_T_1805, _T_1806) @[Mux.scala 27:72] + node _T_1810 = or(_T_1809, _T_1807) @[Mux.scala 27:72] + node _T_1811 = or(_T_1810, _T_1808) @[Mux.scala 27:72] + wire _T_1812 : UInt<1> @[Mux.scala 27:72] + _T_1812 <= _T_1811 @[Mux.scala 27:72] + node _T_1813 = and(_T_1793, _T_1812) @[el2_lsu_bus_buffer.scala 393:36] + node _T_1814 = cat(buf_dualhi[3], buf_dualhi[2]) @[Cat.scala 29:58] + node _T_1815 = cat(_T_1814, buf_dualhi[1]) @[Cat.scala 29:58] + node _T_1816 = cat(_T_1815, buf_dualhi[0]) @[Cat.scala 29:58] + node _T_1817 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1818 = bits(_T_1816, 0, 0) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1819 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1820 = bits(_T_1816, 1, 1) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1821 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1822 = bits(_T_1816, 2, 2) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1823 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1824 = bits(_T_1816, 3, 3) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1825 = mux(_T_1817, _T_1818, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1826 = mux(_T_1819, _T_1820, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1827 = mux(_T_1821, _T_1822, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1828 = mux(_T_1823, _T_1824, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1829 = or(_T_1825, _T_1826) @[Mux.scala 27:72] + node _T_1830 = or(_T_1829, _T_1827) @[Mux.scala 27:72] + node _T_1831 = or(_T_1830, _T_1828) @[Mux.scala 27:72] + wire _T_1832 : UInt<1> @[Mux.scala 27:72] + _T_1832 <= _T_1831 @[Mux.scala 27:72] + node _T_1833 = eq(_T_1832, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 393:107] + node _T_1834 = and(_T_1813, _T_1833) @[el2_lsu_bus_buffer.scala 393:105] + node _T_1835 = cat(buf_samedw[3], buf_samedw[2]) @[Cat.scala 29:58] + node _T_1836 = cat(_T_1835, buf_samedw[1]) @[Cat.scala 29:58] + node _T_1837 = cat(_T_1836, buf_samedw[0]) @[Cat.scala 29:58] + node _T_1838 = eq(CmdPtr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1839 = bits(_T_1837, 0, 0) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1840 = eq(CmdPtr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1841 = bits(_T_1837, 1, 1) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1842 = eq(CmdPtr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1843 = bits(_T_1837, 2, 2) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1844 = eq(CmdPtr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_1845 = bits(_T_1837, 3, 3) @[el2_lsu_bus_buffer.scala 109:129] + node _T_1846 = mux(_T_1838, _T_1839, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1847 = mux(_T_1840, _T_1841, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1848 = mux(_T_1842, _T_1843, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1849 = mux(_T_1844, _T_1845, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1850 = or(_T_1846, _T_1847) @[Mux.scala 27:72] + node _T_1851 = or(_T_1850, _T_1848) @[Mux.scala 27:72] + node _T_1852 = or(_T_1851, _T_1849) @[Mux.scala 27:72] + wire _T_1853 : UInt<1> @[Mux.scala 27:72] + _T_1853 <= _T_1852 @[Mux.scala 27:72] + node _T_1854 = and(_T_1834, _T_1853) @[el2_lsu_bus_buffer.scala 393:177] + node _T_1855 = or(_T_1776, _T_1854) @[el2_lsu_bus_buffer.scala 392:126] + node _T_1856 = and(_T_1711, _T_1855) @[el2_lsu_bus_buffer.scala 390:120] + node _T_1857 = and(ibuf_buf_byp, ldst_samedw_r) @[el2_lsu_bus_buffer.scala 394:19] + node _T_1858 = and(_T_1857, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 394:35] + node _T_1859 = or(_T_1856, _T_1858) @[el2_lsu_bus_buffer.scala 393:251] + obuf_merge_en <= _T_1859 @[el2_lsu_bus_buffer.scala 389:17] + reg obuf_wr_enQ : UInt<1>, io.lsu_busm_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 396:55] + obuf_wr_enQ <= obuf_wr_en @[el2_lsu_bus_buffer.scala 396:55] + node _T_1860 = mux(obuf_wr_en, UInt<1>("h01"), obuf_valid) @[el2_lsu_bus_buffer.scala 397:58] + node _T_1861 = eq(obuf_rst, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 397:93] + node _T_1862 = and(_T_1860, _T_1861) @[el2_lsu_bus_buffer.scala 397:91] + reg _T_1863 : UInt<1>, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 397:54] + _T_1863 <= _T_1862 @[el2_lsu_bus_buffer.scala 397:54] + obuf_valid <= _T_1863 @[el2_lsu_bus_buffer.scala 397:14] + reg _T_1864 : UInt<1>, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when obuf_wr_en : @[Reg.scala 28:19] + _T_1864 <= obuf_nosend_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + obuf_nosend <= _T_1864 @[el2_lsu_bus_buffer.scala 398:15] + reg _T_1865 : UInt<1>, io.lsu_busm_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 399:54] + _T_1865 <= obuf_cmd_done_in @[el2_lsu_bus_buffer.scala 399:54] + obuf_cmd_done <= _T_1865 @[el2_lsu_bus_buffer.scala 399:17] + reg _T_1866 : UInt<1>, io.lsu_busm_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 400:55] + _T_1866 <= obuf_data_done_in @[el2_lsu_bus_buffer.scala 400:55] + obuf_data_done <= _T_1866 @[el2_lsu_bus_buffer.scala 400:18] + reg _T_1867 : UInt<1>, io.lsu_busm_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 401:56] + _T_1867 <= obuf_rdrsp_pend_in @[el2_lsu_bus_buffer.scala 401:56] + obuf_rdrsp_pend <= _T_1867 @[el2_lsu_bus_buffer.scala 401:19] + reg _T_1868 : UInt, io.lsu_busm_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 402:55] + _T_1868 <= obuf_rdrsp_tag_in @[el2_lsu_bus_buffer.scala 402:55] + obuf_rdrsp_tag <= _T_1868 @[el2_lsu_bus_buffer.scala 402:18] + reg _T_1869 : UInt, io.lsu_busm_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when obuf_wr_en : @[Reg.scala 28:19] + _T_1869 <= obuf_tag0_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + obuf_tag0 <= _T_1869 @[el2_lsu_bus_buffer.scala 403:13] + reg obuf_tag1 : UInt, io.lsu_busm_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when obuf_wr_en : @[Reg.scala 28:19] + obuf_tag1 <= obuf_tag1_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + reg obuf_merge : UInt<1>, io.lsu_busm_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when obuf_wr_en : @[Reg.scala 28:19] + obuf_merge <= obuf_merge_en @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + reg _T_1870 : UInt<1>, io.lsu_busm_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when obuf_wr_en : @[Reg.scala 28:19] + _T_1870 <= obuf_write_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + obuf_write <= _T_1870 @[el2_lsu_bus_buffer.scala 406:14] + reg _T_1871 : UInt<1>, io.lsu_busm_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when obuf_wr_en : @[Reg.scala 28:19] + _T_1871 <= obuf_sideeffect_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + obuf_sideeffect <= _T_1871 @[el2_lsu_bus_buffer.scala 407:19] + reg obuf_sz : UInt, io.lsu_busm_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when obuf_wr_en : @[Reg.scala 28:19] + obuf_sz <= obuf_sz_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + inst rvclkhdr_2 of rvclkhdr_2 @[el2_lib.scala 506:23] + rvclkhdr_2.clock <= clock + rvclkhdr_2.reset <= reset + rvclkhdr_2.io.clk <= io.lsu_busm_clk @[el2_lib.scala 508:18] + rvclkhdr_2.io.en <= obuf_wr_en @[el2_lib.scala 509:17] + rvclkhdr_2.io.scan_mode <= io.scan_mode @[el2_lib.scala 510:24] + reg _T_1872 : UInt, rvclkhdr_2.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 512:16] + _T_1872 <= obuf_addr_in @[el2_lib.scala 512:16] + obuf_addr <= _T_1872 @[el2_lsu_bus_buffer.scala 409:13] + reg obuf_byteen : UInt, io.lsu_busm_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when obuf_wr_en : @[Reg.scala 28:19] + obuf_byteen <= obuf_byteen_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + inst rvclkhdr_3 of rvclkhdr_3 @[el2_lib.scala 506:23] + rvclkhdr_3.clock <= clock + rvclkhdr_3.reset <= reset + rvclkhdr_3.io.clk <= io.lsu_busm_clk @[el2_lib.scala 508:18] + rvclkhdr_3.io.en <= obuf_wr_en @[el2_lib.scala 509:17] + rvclkhdr_3.io.scan_mode <= io.scan_mode @[el2_lib.scala 510:24] + reg obuf_data : UInt, rvclkhdr_3.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 512:16] + obuf_data <= obuf_data_in @[el2_lib.scala 512:16] + reg _T_1873 : UInt, io.lsu_busm_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 412:54] + _T_1873 <= obuf_wr_timer_in @[el2_lsu_bus_buffer.scala 412:54] + obuf_wr_timer <= _T_1873 @[el2_lsu_bus_buffer.scala 412:17] + wire WrPtr0_m : UInt<2> + WrPtr0_m <= UInt<1>("h00") + node _T_1874 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 415:65] + node _T_1875 = eq(ibuf_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 416:30] + node _T_1876 = and(ibuf_valid, _T_1875) @[el2_lsu_bus_buffer.scala 416:19] + node _T_1877 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 417:18] + node _T_1878 = eq(WrPtr1_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 417:57] + node _T_1879 = and(io.ldst_dual_r, _T_1878) @[el2_lsu_bus_buffer.scala 417:45] + node _T_1880 = or(_T_1877, _T_1879) @[el2_lsu_bus_buffer.scala 417:27] + node _T_1881 = and(io.lsu_busreq_r, _T_1880) @[el2_lsu_bus_buffer.scala 416:58] + node _T_1882 = or(_T_1876, _T_1881) @[el2_lsu_bus_buffer.scala 416:39] + node _T_1883 = eq(_T_1882, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 416:5] + node _T_1884 = and(_T_1874, _T_1883) @[el2_lsu_bus_buffer.scala 415:76] + node _T_1885 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 415:65] + node _T_1886 = eq(ibuf_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 416:30] + node _T_1887 = and(ibuf_valid, _T_1886) @[el2_lsu_bus_buffer.scala 416:19] + node _T_1888 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 417:18] + node _T_1889 = eq(WrPtr1_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 417:57] + node _T_1890 = and(io.ldst_dual_r, _T_1889) @[el2_lsu_bus_buffer.scala 417:45] + node _T_1891 = or(_T_1888, _T_1890) @[el2_lsu_bus_buffer.scala 417:27] + node _T_1892 = and(io.lsu_busreq_r, _T_1891) @[el2_lsu_bus_buffer.scala 416:58] + node _T_1893 = or(_T_1887, _T_1892) @[el2_lsu_bus_buffer.scala 416:39] + node _T_1894 = eq(_T_1893, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 416:5] + node _T_1895 = and(_T_1885, _T_1894) @[el2_lsu_bus_buffer.scala 415:76] + node _T_1896 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 415:65] + node _T_1897 = eq(ibuf_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 416:30] + node _T_1898 = and(ibuf_valid, _T_1897) @[el2_lsu_bus_buffer.scala 416:19] + node _T_1899 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 417:18] + node _T_1900 = eq(WrPtr1_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 417:57] + node _T_1901 = and(io.ldst_dual_r, _T_1900) @[el2_lsu_bus_buffer.scala 417:45] + node _T_1902 = or(_T_1899, _T_1901) @[el2_lsu_bus_buffer.scala 417:27] + node _T_1903 = and(io.lsu_busreq_r, _T_1902) @[el2_lsu_bus_buffer.scala 416:58] + node _T_1904 = or(_T_1898, _T_1903) @[el2_lsu_bus_buffer.scala 416:39] + node _T_1905 = eq(_T_1904, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 416:5] + node _T_1906 = and(_T_1896, _T_1905) @[el2_lsu_bus_buffer.scala 415:76] + node _T_1907 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 415:65] + node _T_1908 = eq(ibuf_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 416:30] + node _T_1909 = and(ibuf_valid, _T_1908) @[el2_lsu_bus_buffer.scala 416:19] + node _T_1910 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 417:18] + node _T_1911 = eq(WrPtr1_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 417:57] + node _T_1912 = and(io.ldst_dual_r, _T_1911) @[el2_lsu_bus_buffer.scala 417:45] + node _T_1913 = or(_T_1910, _T_1912) @[el2_lsu_bus_buffer.scala 417:27] + node _T_1914 = and(io.lsu_busreq_r, _T_1913) @[el2_lsu_bus_buffer.scala 416:58] + node _T_1915 = or(_T_1909, _T_1914) @[el2_lsu_bus_buffer.scala 416:39] + node _T_1916 = eq(_T_1915, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 416:5] + node _T_1917 = and(_T_1907, _T_1916) @[el2_lsu_bus_buffer.scala 415:76] + node _T_1918 = mux(_T_1917, UInt<2>("h03"), UInt<2>("h03")) @[Mux.scala 98:16] + node _T_1919 = mux(_T_1906, UInt<2>("h02"), _T_1918) @[Mux.scala 98:16] + node _T_1920 = mux(_T_1895, UInt<1>("h01"), _T_1919) @[Mux.scala 98:16] + node _T_1921 = mux(_T_1884, UInt<1>("h00"), _T_1920) @[Mux.scala 98:16] + WrPtr0_m <= _T_1921 @[el2_lsu_bus_buffer.scala 415:12] + wire WrPtr1_m : UInt<2> + WrPtr1_m <= UInt<1>("h00") + node _T_1922 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 421:65] + node _T_1923 = eq(ibuf_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 421:103] + node _T_1924 = and(ibuf_valid, _T_1923) @[el2_lsu_bus_buffer.scala 421:92] + node _T_1925 = eq(WrPtr0_m, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 422:33] + node _T_1926 = and(io.lsu_busreq_m, _T_1925) @[el2_lsu_bus_buffer.scala 422:22] + node _T_1927 = or(_T_1924, _T_1926) @[el2_lsu_bus_buffer.scala 421:112] + node _T_1928 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 423:36] + node _T_1929 = eq(WrPtr1_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 424:34] + node _T_1930 = and(io.ldst_dual_r, _T_1929) @[el2_lsu_bus_buffer.scala 424:23] + node _T_1931 = or(_T_1928, _T_1930) @[el2_lsu_bus_buffer.scala 423:46] + node _T_1932 = and(io.lsu_busreq_r, _T_1931) @[el2_lsu_bus_buffer.scala 423:22] + node _T_1933 = or(_T_1927, _T_1932) @[el2_lsu_bus_buffer.scala 422:42] + node _T_1934 = eq(_T_1933, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 421:78] + node _T_1935 = and(_T_1922, _T_1934) @[el2_lsu_bus_buffer.scala 421:76] + node _T_1936 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 421:65] + node _T_1937 = eq(ibuf_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 421:103] + node _T_1938 = and(ibuf_valid, _T_1937) @[el2_lsu_bus_buffer.scala 421:92] + node _T_1939 = eq(WrPtr0_m, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 422:33] + node _T_1940 = and(io.lsu_busreq_m, _T_1939) @[el2_lsu_bus_buffer.scala 422:22] + node _T_1941 = or(_T_1938, _T_1940) @[el2_lsu_bus_buffer.scala 421:112] + node _T_1942 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 423:36] + node _T_1943 = eq(WrPtr1_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 424:34] + node _T_1944 = and(io.ldst_dual_r, _T_1943) @[el2_lsu_bus_buffer.scala 424:23] + node _T_1945 = or(_T_1942, _T_1944) @[el2_lsu_bus_buffer.scala 423:46] + node _T_1946 = and(io.lsu_busreq_r, _T_1945) @[el2_lsu_bus_buffer.scala 423:22] + node _T_1947 = or(_T_1941, _T_1946) @[el2_lsu_bus_buffer.scala 422:42] + node _T_1948 = eq(_T_1947, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 421:78] + node _T_1949 = and(_T_1936, _T_1948) @[el2_lsu_bus_buffer.scala 421:76] + node _T_1950 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 421:65] + node _T_1951 = eq(ibuf_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 421:103] + node _T_1952 = and(ibuf_valid, _T_1951) @[el2_lsu_bus_buffer.scala 421:92] + node _T_1953 = eq(WrPtr0_m, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 422:33] + node _T_1954 = and(io.lsu_busreq_m, _T_1953) @[el2_lsu_bus_buffer.scala 422:22] + node _T_1955 = or(_T_1952, _T_1954) @[el2_lsu_bus_buffer.scala 421:112] + node _T_1956 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 423:36] + node _T_1957 = eq(WrPtr1_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 424:34] + node _T_1958 = and(io.ldst_dual_r, _T_1957) @[el2_lsu_bus_buffer.scala 424:23] + node _T_1959 = or(_T_1956, _T_1958) @[el2_lsu_bus_buffer.scala 423:46] + node _T_1960 = and(io.lsu_busreq_r, _T_1959) @[el2_lsu_bus_buffer.scala 423:22] + node _T_1961 = or(_T_1955, _T_1960) @[el2_lsu_bus_buffer.scala 422:42] + node _T_1962 = eq(_T_1961, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 421:78] + node _T_1963 = and(_T_1950, _T_1962) @[el2_lsu_bus_buffer.scala 421:76] + node _T_1964 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 421:65] + node _T_1965 = eq(ibuf_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 421:103] + node _T_1966 = and(ibuf_valid, _T_1965) @[el2_lsu_bus_buffer.scala 421:92] + node _T_1967 = eq(WrPtr0_m, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 422:33] + node _T_1968 = and(io.lsu_busreq_m, _T_1967) @[el2_lsu_bus_buffer.scala 422:22] + node _T_1969 = or(_T_1966, _T_1968) @[el2_lsu_bus_buffer.scala 421:112] + node _T_1970 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 423:36] + node _T_1971 = eq(WrPtr1_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 424:34] + node _T_1972 = and(io.ldst_dual_r, _T_1971) @[el2_lsu_bus_buffer.scala 424:23] + node _T_1973 = or(_T_1970, _T_1972) @[el2_lsu_bus_buffer.scala 423:46] + node _T_1974 = and(io.lsu_busreq_r, _T_1973) @[el2_lsu_bus_buffer.scala 423:22] + node _T_1975 = or(_T_1969, _T_1974) @[el2_lsu_bus_buffer.scala 422:42] + node _T_1976 = eq(_T_1975, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 421:78] + node _T_1977 = and(_T_1964, _T_1976) @[el2_lsu_bus_buffer.scala 421:76] + node _T_1978 = mux(_T_1977, UInt<2>("h03"), UInt<2>("h03")) @[Mux.scala 98:16] + node _T_1979 = mux(_T_1963, UInt<2>("h02"), _T_1978) @[Mux.scala 98:16] + node _T_1980 = mux(_T_1949, UInt<1>("h01"), _T_1979) @[Mux.scala 98:16] + node _T_1981 = mux(_T_1935, UInt<1>("h00"), _T_1980) @[Mux.scala 98:16] + WrPtr1_m <= _T_1981 @[el2_lsu_bus_buffer.scala 421:12] + wire buf_age : UInt<4>[4] @[el2_lsu_bus_buffer.scala 426:21] + buf_age[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 427:11] + buf_age[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 427:11] + buf_age[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 427:11] + buf_age[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 427:11] + node _T_1982 = orr(buf_age[0]) @[el2_lsu_bus_buffer.scala 429:58] + node _T_1983 = eq(_T_1982, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 429:45] + node _T_1984 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 429:78] + node _T_1985 = and(_T_1983, _T_1984) @[el2_lsu_bus_buffer.scala 429:63] + node _T_1986 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 429:90] + node _T_1987 = and(_T_1985, _T_1986) @[el2_lsu_bus_buffer.scala 429:88] + node _T_1988 = orr(buf_age[1]) @[el2_lsu_bus_buffer.scala 429:58] + node _T_1989 = eq(_T_1988, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 429:45] + node _T_1990 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 429:78] + node _T_1991 = and(_T_1989, _T_1990) @[el2_lsu_bus_buffer.scala 429:63] + node _T_1992 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 429:90] + node _T_1993 = and(_T_1991, _T_1992) @[el2_lsu_bus_buffer.scala 429:88] + node _T_1994 = orr(buf_age[2]) @[el2_lsu_bus_buffer.scala 429:58] + node _T_1995 = eq(_T_1994, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 429:45] + node _T_1996 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 429:78] + node _T_1997 = and(_T_1995, _T_1996) @[el2_lsu_bus_buffer.scala 429:63] + node _T_1998 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 429:90] + node _T_1999 = and(_T_1997, _T_1998) @[el2_lsu_bus_buffer.scala 429:88] + node _T_2000 = orr(buf_age[3]) @[el2_lsu_bus_buffer.scala 429:58] + node _T_2001 = eq(_T_2000, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 429:45] + node _T_2002 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 429:78] + node _T_2003 = and(_T_2001, _T_2002) @[el2_lsu_bus_buffer.scala 429:63] + node _T_2004 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 429:90] + node _T_2005 = and(_T_2003, _T_2004) @[el2_lsu_bus_buffer.scala 429:88] + node _T_2006 = cat(_T_2005, _T_1999) @[Cat.scala 29:58] + node _T_2007 = cat(_T_2006, _T_1993) @[Cat.scala 29:58] + node CmdPtr0Dec = cat(_T_2007, _T_1987) @[Cat.scala 29:58] + node _T_2008 = not(CmdPtr0Dec) @[el2_lsu_bus_buffer.scala 430:62] + node _T_2009 = and(buf_age[0], _T_2008) @[el2_lsu_bus_buffer.scala 430:59] + node _T_2010 = orr(_T_2009) @[el2_lsu_bus_buffer.scala 430:76] + node _T_2011 = eq(_T_2010, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 430:45] + node _T_2012 = bits(CmdPtr0Dec, 0, 0) @[el2_lsu_bus_buffer.scala 430:94] + node _T_2013 = eq(_T_2012, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 430:83] + node _T_2014 = and(_T_2011, _T_2013) @[el2_lsu_bus_buffer.scala 430:81] + node _T_2015 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 430:113] + node _T_2016 = and(_T_2014, _T_2015) @[el2_lsu_bus_buffer.scala 430:98] + node _T_2017 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 430:125] + node _T_2018 = and(_T_2016, _T_2017) @[el2_lsu_bus_buffer.scala 430:123] + node _T_2019 = not(CmdPtr0Dec) @[el2_lsu_bus_buffer.scala 430:62] + node _T_2020 = and(buf_age[1], _T_2019) @[el2_lsu_bus_buffer.scala 430:59] + node _T_2021 = orr(_T_2020) @[el2_lsu_bus_buffer.scala 430:76] + node _T_2022 = eq(_T_2021, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 430:45] + node _T_2023 = bits(CmdPtr0Dec, 1, 1) @[el2_lsu_bus_buffer.scala 430:94] + node _T_2024 = eq(_T_2023, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 430:83] + node _T_2025 = and(_T_2022, _T_2024) @[el2_lsu_bus_buffer.scala 430:81] + node _T_2026 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 430:113] + node _T_2027 = and(_T_2025, _T_2026) @[el2_lsu_bus_buffer.scala 430:98] + node _T_2028 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 430:125] + node _T_2029 = and(_T_2027, _T_2028) @[el2_lsu_bus_buffer.scala 430:123] + node _T_2030 = not(CmdPtr0Dec) @[el2_lsu_bus_buffer.scala 430:62] + node _T_2031 = and(buf_age[2], _T_2030) @[el2_lsu_bus_buffer.scala 430:59] + node _T_2032 = orr(_T_2031) @[el2_lsu_bus_buffer.scala 430:76] + node _T_2033 = eq(_T_2032, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 430:45] + node _T_2034 = bits(CmdPtr0Dec, 2, 2) @[el2_lsu_bus_buffer.scala 430:94] + node _T_2035 = eq(_T_2034, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 430:83] + node _T_2036 = and(_T_2033, _T_2035) @[el2_lsu_bus_buffer.scala 430:81] + node _T_2037 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 430:113] + node _T_2038 = and(_T_2036, _T_2037) @[el2_lsu_bus_buffer.scala 430:98] + node _T_2039 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 430:125] + node _T_2040 = and(_T_2038, _T_2039) @[el2_lsu_bus_buffer.scala 430:123] + node _T_2041 = not(CmdPtr0Dec) @[el2_lsu_bus_buffer.scala 430:62] + node _T_2042 = and(buf_age[3], _T_2041) @[el2_lsu_bus_buffer.scala 430:59] + node _T_2043 = orr(_T_2042) @[el2_lsu_bus_buffer.scala 430:76] + node _T_2044 = eq(_T_2043, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 430:45] + node _T_2045 = bits(CmdPtr0Dec, 3, 3) @[el2_lsu_bus_buffer.scala 430:94] + node _T_2046 = eq(_T_2045, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 430:83] + node _T_2047 = and(_T_2044, _T_2046) @[el2_lsu_bus_buffer.scala 430:81] + node _T_2048 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 430:113] + node _T_2049 = and(_T_2047, _T_2048) @[el2_lsu_bus_buffer.scala 430:98] + node _T_2050 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 430:125] + node _T_2051 = and(_T_2049, _T_2050) @[el2_lsu_bus_buffer.scala 430:123] + node _T_2052 = cat(_T_2051, _T_2040) @[Cat.scala 29:58] + node _T_2053 = cat(_T_2052, _T_2029) @[Cat.scala 29:58] + node CmdPtr1Dec = cat(_T_2053, _T_2018) @[Cat.scala 29:58] + wire buf_rsp_pickage : UInt<4>[4] @[el2_lsu_bus_buffer.scala 431:29] + buf_rsp_pickage[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 432:19] + buf_rsp_pickage[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 432:19] + buf_rsp_pickage[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 432:19] + buf_rsp_pickage[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 432:19] + node _T_2054 = orr(buf_rsp_pickage[0]) @[el2_lsu_bus_buffer.scala 433:65] + node _T_2055 = eq(_T_2054, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 433:44] + node _T_2056 = eq(buf_state[0], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 433:85] + node _T_2057 = and(_T_2055, _T_2056) @[el2_lsu_bus_buffer.scala 433:70] + node _T_2058 = orr(buf_rsp_pickage[1]) @[el2_lsu_bus_buffer.scala 433:65] + node _T_2059 = eq(_T_2058, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 433:44] + node _T_2060 = eq(buf_state[1], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 433:85] + node _T_2061 = and(_T_2059, _T_2060) @[el2_lsu_bus_buffer.scala 433:70] + node _T_2062 = orr(buf_rsp_pickage[2]) @[el2_lsu_bus_buffer.scala 433:65] + node _T_2063 = eq(_T_2062, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 433:44] + node _T_2064 = eq(buf_state[2], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 433:85] + node _T_2065 = and(_T_2063, _T_2064) @[el2_lsu_bus_buffer.scala 433:70] + node _T_2066 = orr(buf_rsp_pickage[3]) @[el2_lsu_bus_buffer.scala 433:65] + node _T_2067 = eq(_T_2066, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 433:44] + node _T_2068 = eq(buf_state[3], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 433:85] + node _T_2069 = and(_T_2067, _T_2068) @[el2_lsu_bus_buffer.scala 433:70] + node _T_2070 = cat(_T_2069, _T_2065) @[Cat.scala 29:58] + node _T_2071 = cat(_T_2070, _T_2061) @[Cat.scala 29:58] + node RspPtrDec = cat(_T_2071, _T_2057) @[Cat.scala 29:58] + node _T_2072 = orr(CmdPtr0Dec) @[el2_lsu_bus_buffer.scala 434:31] + found_cmdptr0 <= _T_2072 @[el2_lsu_bus_buffer.scala 434:17] + node _T_2073 = orr(CmdPtr1Dec) @[el2_lsu_bus_buffer.scala 435:31] + found_cmdptr1 <= _T_2073 @[el2_lsu_bus_buffer.scala 435:17] + wire CmdPtr1 : UInt<2> + CmdPtr1 <= UInt<1>("h00") + wire RspPtr : UInt<2> + RspPtr <= UInt<1>("h00") + node _T_2074 = mux(UInt<1>("h00"), UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_2075 = cat(_T_2074, CmdPtr0Dec) @[Cat.scala 29:58] + node _T_2076 = bits(_T_2075, 4, 4) @[el2_lsu_bus_buffer.scala 437:39] + node _T_2077 = bits(_T_2075, 5, 5) @[el2_lsu_bus_buffer.scala 437:45] + node _T_2078 = or(_T_2076, _T_2077) @[el2_lsu_bus_buffer.scala 437:42] + node _T_2079 = bits(_T_2075, 6, 6) @[el2_lsu_bus_buffer.scala 437:51] + node _T_2080 = or(_T_2078, _T_2079) @[el2_lsu_bus_buffer.scala 437:48] + node _T_2081 = bits(_T_2075, 7, 7) @[el2_lsu_bus_buffer.scala 437:57] + node _T_2082 = or(_T_2080, _T_2081) @[el2_lsu_bus_buffer.scala 437:54] + node _T_2083 = bits(_T_2075, 2, 2) @[el2_lsu_bus_buffer.scala 437:64] + node _T_2084 = bits(_T_2075, 3, 3) @[el2_lsu_bus_buffer.scala 437:70] + node _T_2085 = or(_T_2083, _T_2084) @[el2_lsu_bus_buffer.scala 437:67] + node _T_2086 = bits(_T_2075, 6, 6) @[el2_lsu_bus_buffer.scala 437:76] + node _T_2087 = or(_T_2085, _T_2086) @[el2_lsu_bus_buffer.scala 437:73] + node _T_2088 = bits(_T_2075, 7, 7) @[el2_lsu_bus_buffer.scala 437:82] + node _T_2089 = or(_T_2087, _T_2088) @[el2_lsu_bus_buffer.scala 437:79] + node _T_2090 = bits(_T_2075, 1, 1) @[el2_lsu_bus_buffer.scala 437:89] + node _T_2091 = bits(_T_2075, 3, 3) @[el2_lsu_bus_buffer.scala 437:95] + node _T_2092 = or(_T_2090, _T_2091) @[el2_lsu_bus_buffer.scala 437:92] + node _T_2093 = bits(_T_2075, 5, 5) @[el2_lsu_bus_buffer.scala 437:101] + node _T_2094 = or(_T_2092, _T_2093) @[el2_lsu_bus_buffer.scala 437:98] + node _T_2095 = bits(_T_2075, 7, 7) @[el2_lsu_bus_buffer.scala 437:107] + node _T_2096 = or(_T_2094, _T_2095) @[el2_lsu_bus_buffer.scala 437:104] + node _T_2097 = cat(_T_2082, _T_2089) @[Cat.scala 29:58] + node _T_2098 = cat(_T_2097, _T_2096) @[Cat.scala 29:58] + CmdPtr0 <= _T_2098 @[el2_lsu_bus_buffer.scala 442:11] + node _T_2099 = mux(UInt<1>("h00"), UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_2100 = cat(_T_2099, CmdPtr1Dec) @[Cat.scala 29:58] + node _T_2101 = bits(_T_2100, 4, 4) @[el2_lsu_bus_buffer.scala 437:39] + node _T_2102 = bits(_T_2100, 5, 5) @[el2_lsu_bus_buffer.scala 437:45] + node _T_2103 = or(_T_2101, _T_2102) @[el2_lsu_bus_buffer.scala 437:42] + node _T_2104 = bits(_T_2100, 6, 6) @[el2_lsu_bus_buffer.scala 437:51] + node _T_2105 = or(_T_2103, _T_2104) @[el2_lsu_bus_buffer.scala 437:48] + node _T_2106 = bits(_T_2100, 7, 7) @[el2_lsu_bus_buffer.scala 437:57] + node _T_2107 = or(_T_2105, _T_2106) @[el2_lsu_bus_buffer.scala 437:54] + node _T_2108 = bits(_T_2100, 2, 2) @[el2_lsu_bus_buffer.scala 437:64] + node _T_2109 = bits(_T_2100, 3, 3) @[el2_lsu_bus_buffer.scala 437:70] + node _T_2110 = or(_T_2108, _T_2109) @[el2_lsu_bus_buffer.scala 437:67] + node _T_2111 = bits(_T_2100, 6, 6) @[el2_lsu_bus_buffer.scala 437:76] + node _T_2112 = or(_T_2110, _T_2111) @[el2_lsu_bus_buffer.scala 437:73] + node _T_2113 = bits(_T_2100, 7, 7) @[el2_lsu_bus_buffer.scala 437:82] + node _T_2114 = or(_T_2112, _T_2113) @[el2_lsu_bus_buffer.scala 437:79] + node _T_2115 = bits(_T_2100, 1, 1) @[el2_lsu_bus_buffer.scala 437:89] + node _T_2116 = bits(_T_2100, 3, 3) @[el2_lsu_bus_buffer.scala 437:95] + node _T_2117 = or(_T_2115, _T_2116) @[el2_lsu_bus_buffer.scala 437:92] + node _T_2118 = bits(_T_2100, 5, 5) @[el2_lsu_bus_buffer.scala 437:101] + node _T_2119 = or(_T_2117, _T_2118) @[el2_lsu_bus_buffer.scala 437:98] + node _T_2120 = bits(_T_2100, 7, 7) @[el2_lsu_bus_buffer.scala 437:107] + node _T_2121 = or(_T_2119, _T_2120) @[el2_lsu_bus_buffer.scala 437:104] + node _T_2122 = cat(_T_2107, _T_2114) @[Cat.scala 29:58] + node _T_2123 = cat(_T_2122, _T_2121) @[Cat.scala 29:58] + CmdPtr1 <= _T_2123 @[el2_lsu_bus_buffer.scala 444:11] + node _T_2124 = mux(UInt<1>("h00"), UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_2125 = cat(_T_2124, RspPtrDec) @[Cat.scala 29:58] + node _T_2126 = bits(_T_2125, 4, 4) @[el2_lsu_bus_buffer.scala 437:39] + node _T_2127 = bits(_T_2125, 5, 5) @[el2_lsu_bus_buffer.scala 437:45] + node _T_2128 = or(_T_2126, _T_2127) @[el2_lsu_bus_buffer.scala 437:42] + node _T_2129 = bits(_T_2125, 6, 6) @[el2_lsu_bus_buffer.scala 437:51] + node _T_2130 = or(_T_2128, _T_2129) @[el2_lsu_bus_buffer.scala 437:48] + node _T_2131 = bits(_T_2125, 7, 7) @[el2_lsu_bus_buffer.scala 437:57] + node _T_2132 = or(_T_2130, _T_2131) @[el2_lsu_bus_buffer.scala 437:54] + node _T_2133 = bits(_T_2125, 2, 2) @[el2_lsu_bus_buffer.scala 437:64] + node _T_2134 = bits(_T_2125, 3, 3) @[el2_lsu_bus_buffer.scala 437:70] + node _T_2135 = or(_T_2133, _T_2134) @[el2_lsu_bus_buffer.scala 437:67] + node _T_2136 = bits(_T_2125, 6, 6) @[el2_lsu_bus_buffer.scala 437:76] + node _T_2137 = or(_T_2135, _T_2136) @[el2_lsu_bus_buffer.scala 437:73] + node _T_2138 = bits(_T_2125, 7, 7) @[el2_lsu_bus_buffer.scala 437:82] + node _T_2139 = or(_T_2137, _T_2138) @[el2_lsu_bus_buffer.scala 437:79] + node _T_2140 = bits(_T_2125, 1, 1) @[el2_lsu_bus_buffer.scala 437:89] + node _T_2141 = bits(_T_2125, 3, 3) @[el2_lsu_bus_buffer.scala 437:95] + node _T_2142 = or(_T_2140, _T_2141) @[el2_lsu_bus_buffer.scala 437:92] + node _T_2143 = bits(_T_2125, 5, 5) @[el2_lsu_bus_buffer.scala 437:101] + node _T_2144 = or(_T_2142, _T_2143) @[el2_lsu_bus_buffer.scala 437:98] + node _T_2145 = bits(_T_2125, 7, 7) @[el2_lsu_bus_buffer.scala 437:107] + node _T_2146 = or(_T_2144, _T_2145) @[el2_lsu_bus_buffer.scala 437:104] + node _T_2147 = cat(_T_2132, _T_2139) @[Cat.scala 29:58] + node _T_2148 = cat(_T_2147, _T_2146) @[Cat.scala 29:58] + RspPtr <= _T_2148 @[el2_lsu_bus_buffer.scala 445:10] + wire buf_state_en : UInt<1>[4] @[el2_lsu_bus_buffer.scala 446:26] + buf_state_en[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 447:16] + buf_state_en[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 447:16] + buf_state_en[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 447:16] + buf_state_en[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 447:16] + wire buf_rspageQ : UInt<4>[4] @[el2_lsu_bus_buffer.scala 448:25] + buf_rspageQ[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 449:15] + buf_rspageQ[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 449:15] + buf_rspageQ[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 449:15] + buf_rspageQ[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 449:15] + wire buf_rspage_set : UInt<4>[4] @[el2_lsu_bus_buffer.scala 450:28] + buf_rspage_set[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 451:18] + buf_rspage_set[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 451:18] + buf_rspage_set[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 451:18] + buf_rspage_set[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 451:18] + wire buf_rspage_in : UInt<4>[4] @[el2_lsu_bus_buffer.scala 452:27] + buf_rspage_in[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 453:17] + buf_rspage_in[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 453:17] + buf_rspage_in[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 453:17] + buf_rspage_in[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 453:17] + wire buf_rspage : UInt<4>[4] @[el2_lsu_bus_buffer.scala 454:24] + buf_rspage[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 455:14] + buf_rspage[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 455:14] + buf_rspage[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 455:14] + buf_rspage[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 455:14] + node _T_2149 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 457:83] + node _T_2150 = and(_T_2149, buf_state_en[0]) @[el2_lsu_bus_buffer.scala 457:94] + node _T_2151 = eq(buf_state[0], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 458:20] + node _T_2152 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 458:47] + node _T_2153 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 458:59] + node _T_2154 = and(_T_2152, _T_2153) @[el2_lsu_bus_buffer.scala 458:57] + node _T_2155 = or(_T_2151, _T_2154) @[el2_lsu_bus_buffer.scala 458:31] + node _T_2156 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 459:23] + node _T_2157 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 459:53] + node _T_2158 = and(_T_2156, _T_2157) @[el2_lsu_bus_buffer.scala 459:41] + node _T_2159 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 459:83] + node _T_2160 = and(_T_2158, _T_2159) @[el2_lsu_bus_buffer.scala 459:71] + node _T_2161 = eq(ibuf_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 459:104] + node _T_2162 = and(_T_2160, _T_2161) @[el2_lsu_bus_buffer.scala 459:92] + node _T_2163 = or(_T_2155, _T_2162) @[el2_lsu_bus_buffer.scala 458:86] + node _T_2164 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 460:17] + node _T_2165 = and(_T_2164, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 460:35] + node _T_2166 = eq(WrPtr1_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 460:64] + node _T_2167 = and(_T_2165, _T_2166) @[el2_lsu_bus_buffer.scala 460:52] + node _T_2168 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 460:85] + node _T_2169 = and(_T_2167, _T_2168) @[el2_lsu_bus_buffer.scala 460:73] + node _T_2170 = or(_T_2163, _T_2169) @[el2_lsu_bus_buffer.scala 459:114] + node _T_2171 = and(_T_2150, _T_2170) @[el2_lsu_bus_buffer.scala 457:113] + node _T_2172 = bits(buf_age[0], 0, 0) @[el2_lsu_bus_buffer.scala 460:109] + node _T_2173 = or(_T_2171, _T_2172) @[el2_lsu_bus_buffer.scala 460:97] + node _T_2174 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 457:83] + node _T_2175 = and(_T_2174, buf_state_en[0]) @[el2_lsu_bus_buffer.scala 457:94] + node _T_2176 = eq(buf_state[1], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 458:20] + node _T_2177 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 458:47] + node _T_2178 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 458:59] + node _T_2179 = and(_T_2177, _T_2178) @[el2_lsu_bus_buffer.scala 458:57] + node _T_2180 = or(_T_2176, _T_2179) @[el2_lsu_bus_buffer.scala 458:31] + node _T_2181 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 459:23] + node _T_2182 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 459:53] + node _T_2183 = and(_T_2181, _T_2182) @[el2_lsu_bus_buffer.scala 459:41] + node _T_2184 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 459:83] + node _T_2185 = and(_T_2183, _T_2184) @[el2_lsu_bus_buffer.scala 459:71] + node _T_2186 = eq(ibuf_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 459:104] + node _T_2187 = and(_T_2185, _T_2186) @[el2_lsu_bus_buffer.scala 459:92] + node _T_2188 = or(_T_2180, _T_2187) @[el2_lsu_bus_buffer.scala 458:86] + node _T_2189 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 460:17] + node _T_2190 = and(_T_2189, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 460:35] + node _T_2191 = eq(WrPtr1_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 460:64] + node _T_2192 = and(_T_2190, _T_2191) @[el2_lsu_bus_buffer.scala 460:52] + node _T_2193 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 460:85] + node _T_2194 = and(_T_2192, _T_2193) @[el2_lsu_bus_buffer.scala 460:73] + node _T_2195 = or(_T_2188, _T_2194) @[el2_lsu_bus_buffer.scala 459:114] + node _T_2196 = and(_T_2175, _T_2195) @[el2_lsu_bus_buffer.scala 457:113] + node _T_2197 = bits(buf_age[0], 1, 1) @[el2_lsu_bus_buffer.scala 460:109] + node _T_2198 = or(_T_2196, _T_2197) @[el2_lsu_bus_buffer.scala 460:97] + node _T_2199 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 457:83] + node _T_2200 = and(_T_2199, buf_state_en[0]) @[el2_lsu_bus_buffer.scala 457:94] + node _T_2201 = eq(buf_state[2], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 458:20] + node _T_2202 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 458:47] + node _T_2203 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 458:59] + node _T_2204 = and(_T_2202, _T_2203) @[el2_lsu_bus_buffer.scala 458:57] + node _T_2205 = or(_T_2201, _T_2204) @[el2_lsu_bus_buffer.scala 458:31] + node _T_2206 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 459:23] + node _T_2207 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 459:53] + node _T_2208 = and(_T_2206, _T_2207) @[el2_lsu_bus_buffer.scala 459:41] + node _T_2209 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 459:83] + node _T_2210 = and(_T_2208, _T_2209) @[el2_lsu_bus_buffer.scala 459:71] + node _T_2211 = eq(ibuf_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 459:104] + node _T_2212 = and(_T_2210, _T_2211) @[el2_lsu_bus_buffer.scala 459:92] + node _T_2213 = or(_T_2205, _T_2212) @[el2_lsu_bus_buffer.scala 458:86] + node _T_2214 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 460:17] + node _T_2215 = and(_T_2214, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 460:35] + node _T_2216 = eq(WrPtr1_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 460:64] + node _T_2217 = and(_T_2215, _T_2216) @[el2_lsu_bus_buffer.scala 460:52] + node _T_2218 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 460:85] + node _T_2219 = and(_T_2217, _T_2218) @[el2_lsu_bus_buffer.scala 460:73] + node _T_2220 = or(_T_2213, _T_2219) @[el2_lsu_bus_buffer.scala 459:114] + node _T_2221 = and(_T_2200, _T_2220) @[el2_lsu_bus_buffer.scala 457:113] + node _T_2222 = bits(buf_age[0], 2, 2) @[el2_lsu_bus_buffer.scala 460:109] + node _T_2223 = or(_T_2221, _T_2222) @[el2_lsu_bus_buffer.scala 460:97] + node _T_2224 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 457:83] + node _T_2225 = and(_T_2224, buf_state_en[0]) @[el2_lsu_bus_buffer.scala 457:94] + node _T_2226 = eq(buf_state[3], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 458:20] + node _T_2227 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 458:47] + node _T_2228 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 458:59] + node _T_2229 = and(_T_2227, _T_2228) @[el2_lsu_bus_buffer.scala 458:57] + node _T_2230 = or(_T_2226, _T_2229) @[el2_lsu_bus_buffer.scala 458:31] + node _T_2231 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 459:23] + node _T_2232 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 459:53] + node _T_2233 = and(_T_2231, _T_2232) @[el2_lsu_bus_buffer.scala 459:41] + node _T_2234 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 459:83] + node _T_2235 = and(_T_2233, _T_2234) @[el2_lsu_bus_buffer.scala 459:71] + node _T_2236 = eq(ibuf_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 459:104] + node _T_2237 = and(_T_2235, _T_2236) @[el2_lsu_bus_buffer.scala 459:92] + node _T_2238 = or(_T_2230, _T_2237) @[el2_lsu_bus_buffer.scala 458:86] + node _T_2239 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 460:17] + node _T_2240 = and(_T_2239, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 460:35] + node _T_2241 = eq(WrPtr1_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 460:64] + node _T_2242 = and(_T_2240, _T_2241) @[el2_lsu_bus_buffer.scala 460:52] + node _T_2243 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 460:85] + node _T_2244 = and(_T_2242, _T_2243) @[el2_lsu_bus_buffer.scala 460:73] + node _T_2245 = or(_T_2238, _T_2244) @[el2_lsu_bus_buffer.scala 459:114] + node _T_2246 = and(_T_2225, _T_2245) @[el2_lsu_bus_buffer.scala 457:113] + node _T_2247 = bits(buf_age[0], 3, 3) @[el2_lsu_bus_buffer.scala 460:109] + node _T_2248 = or(_T_2246, _T_2247) @[el2_lsu_bus_buffer.scala 460:97] + node _T_2249 = cat(_T_2248, _T_2223) @[Cat.scala 29:58] + node _T_2250 = cat(_T_2249, _T_2198) @[Cat.scala 29:58] + node buf_age_in_0 = cat(_T_2250, _T_2173) @[Cat.scala 29:58] + node _T_2251 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 457:83] + node _T_2252 = and(_T_2251, buf_state_en[1]) @[el2_lsu_bus_buffer.scala 457:94] + node _T_2253 = eq(buf_state[0], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 458:20] + node _T_2254 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 458:47] + node _T_2255 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 458:59] + node _T_2256 = and(_T_2254, _T_2255) @[el2_lsu_bus_buffer.scala 458:57] + node _T_2257 = or(_T_2253, _T_2256) @[el2_lsu_bus_buffer.scala 458:31] + node _T_2258 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 459:23] + node _T_2259 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 459:53] + node _T_2260 = and(_T_2258, _T_2259) @[el2_lsu_bus_buffer.scala 459:41] + node _T_2261 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 459:83] + node _T_2262 = and(_T_2260, _T_2261) @[el2_lsu_bus_buffer.scala 459:71] + node _T_2263 = eq(ibuf_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 459:104] + node _T_2264 = and(_T_2262, _T_2263) @[el2_lsu_bus_buffer.scala 459:92] + node _T_2265 = or(_T_2257, _T_2264) @[el2_lsu_bus_buffer.scala 458:86] + node _T_2266 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 460:17] + node _T_2267 = and(_T_2266, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 460:35] + node _T_2268 = eq(WrPtr1_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 460:64] + node _T_2269 = and(_T_2267, _T_2268) @[el2_lsu_bus_buffer.scala 460:52] + node _T_2270 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 460:85] + node _T_2271 = and(_T_2269, _T_2270) @[el2_lsu_bus_buffer.scala 460:73] + node _T_2272 = or(_T_2265, _T_2271) @[el2_lsu_bus_buffer.scala 459:114] + node _T_2273 = and(_T_2252, _T_2272) @[el2_lsu_bus_buffer.scala 457:113] + node _T_2274 = bits(buf_age[1], 0, 0) @[el2_lsu_bus_buffer.scala 460:109] + node _T_2275 = or(_T_2273, _T_2274) @[el2_lsu_bus_buffer.scala 460:97] + node _T_2276 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 457:83] + node _T_2277 = and(_T_2276, buf_state_en[1]) @[el2_lsu_bus_buffer.scala 457:94] + node _T_2278 = eq(buf_state[1], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 458:20] + node _T_2279 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 458:47] + node _T_2280 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 458:59] + node _T_2281 = and(_T_2279, _T_2280) @[el2_lsu_bus_buffer.scala 458:57] + node _T_2282 = or(_T_2278, _T_2281) @[el2_lsu_bus_buffer.scala 458:31] + node _T_2283 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 459:23] + node _T_2284 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 459:53] + node _T_2285 = and(_T_2283, _T_2284) @[el2_lsu_bus_buffer.scala 459:41] + node _T_2286 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 459:83] + node _T_2287 = and(_T_2285, _T_2286) @[el2_lsu_bus_buffer.scala 459:71] + node _T_2288 = eq(ibuf_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 459:104] + node _T_2289 = and(_T_2287, _T_2288) @[el2_lsu_bus_buffer.scala 459:92] + node _T_2290 = or(_T_2282, _T_2289) @[el2_lsu_bus_buffer.scala 458:86] + node _T_2291 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 460:17] + node _T_2292 = and(_T_2291, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 460:35] + node _T_2293 = eq(WrPtr1_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 460:64] + node _T_2294 = and(_T_2292, _T_2293) @[el2_lsu_bus_buffer.scala 460:52] + node _T_2295 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 460:85] + node _T_2296 = and(_T_2294, _T_2295) @[el2_lsu_bus_buffer.scala 460:73] + node _T_2297 = or(_T_2290, _T_2296) @[el2_lsu_bus_buffer.scala 459:114] + node _T_2298 = and(_T_2277, _T_2297) @[el2_lsu_bus_buffer.scala 457:113] + node _T_2299 = bits(buf_age[1], 1, 1) @[el2_lsu_bus_buffer.scala 460:109] + node _T_2300 = or(_T_2298, _T_2299) @[el2_lsu_bus_buffer.scala 460:97] + node _T_2301 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 457:83] + node _T_2302 = and(_T_2301, buf_state_en[1]) @[el2_lsu_bus_buffer.scala 457:94] + node _T_2303 = eq(buf_state[2], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 458:20] + node _T_2304 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 458:47] + node _T_2305 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 458:59] + node _T_2306 = and(_T_2304, _T_2305) @[el2_lsu_bus_buffer.scala 458:57] + node _T_2307 = or(_T_2303, _T_2306) @[el2_lsu_bus_buffer.scala 458:31] + node _T_2308 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 459:23] + node _T_2309 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 459:53] + node _T_2310 = and(_T_2308, _T_2309) @[el2_lsu_bus_buffer.scala 459:41] + node _T_2311 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 459:83] + node _T_2312 = and(_T_2310, _T_2311) @[el2_lsu_bus_buffer.scala 459:71] + node _T_2313 = eq(ibuf_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 459:104] + node _T_2314 = and(_T_2312, _T_2313) @[el2_lsu_bus_buffer.scala 459:92] + node _T_2315 = or(_T_2307, _T_2314) @[el2_lsu_bus_buffer.scala 458:86] + node _T_2316 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 460:17] + node _T_2317 = and(_T_2316, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 460:35] + node _T_2318 = eq(WrPtr1_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 460:64] + node _T_2319 = and(_T_2317, _T_2318) @[el2_lsu_bus_buffer.scala 460:52] + node _T_2320 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 460:85] + node _T_2321 = and(_T_2319, _T_2320) @[el2_lsu_bus_buffer.scala 460:73] + node _T_2322 = or(_T_2315, _T_2321) @[el2_lsu_bus_buffer.scala 459:114] + node _T_2323 = and(_T_2302, _T_2322) @[el2_lsu_bus_buffer.scala 457:113] + node _T_2324 = bits(buf_age[1], 2, 2) @[el2_lsu_bus_buffer.scala 460:109] + node _T_2325 = or(_T_2323, _T_2324) @[el2_lsu_bus_buffer.scala 460:97] + node _T_2326 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 457:83] + node _T_2327 = and(_T_2326, buf_state_en[1]) @[el2_lsu_bus_buffer.scala 457:94] + node _T_2328 = eq(buf_state[3], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 458:20] + node _T_2329 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 458:47] + node _T_2330 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 458:59] + node _T_2331 = and(_T_2329, _T_2330) @[el2_lsu_bus_buffer.scala 458:57] + node _T_2332 = or(_T_2328, _T_2331) @[el2_lsu_bus_buffer.scala 458:31] + node _T_2333 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 459:23] + node _T_2334 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 459:53] + node _T_2335 = and(_T_2333, _T_2334) @[el2_lsu_bus_buffer.scala 459:41] + node _T_2336 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 459:83] + node _T_2337 = and(_T_2335, _T_2336) @[el2_lsu_bus_buffer.scala 459:71] + node _T_2338 = eq(ibuf_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 459:104] + node _T_2339 = and(_T_2337, _T_2338) @[el2_lsu_bus_buffer.scala 459:92] + node _T_2340 = or(_T_2332, _T_2339) @[el2_lsu_bus_buffer.scala 458:86] + node _T_2341 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 460:17] + node _T_2342 = and(_T_2341, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 460:35] + node _T_2343 = eq(WrPtr1_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 460:64] + node _T_2344 = and(_T_2342, _T_2343) @[el2_lsu_bus_buffer.scala 460:52] + node _T_2345 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 460:85] + node _T_2346 = and(_T_2344, _T_2345) @[el2_lsu_bus_buffer.scala 460:73] + node _T_2347 = or(_T_2340, _T_2346) @[el2_lsu_bus_buffer.scala 459:114] + node _T_2348 = and(_T_2327, _T_2347) @[el2_lsu_bus_buffer.scala 457:113] + node _T_2349 = bits(buf_age[1], 3, 3) @[el2_lsu_bus_buffer.scala 460:109] + node _T_2350 = or(_T_2348, _T_2349) @[el2_lsu_bus_buffer.scala 460:97] + node _T_2351 = cat(_T_2350, _T_2325) @[Cat.scala 29:58] + node _T_2352 = cat(_T_2351, _T_2300) @[Cat.scala 29:58] + node buf_age_in_1 = cat(_T_2352, _T_2275) @[Cat.scala 29:58] + node _T_2353 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 457:83] + node _T_2354 = and(_T_2353, buf_state_en[2]) @[el2_lsu_bus_buffer.scala 457:94] + node _T_2355 = eq(buf_state[0], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 458:20] + node _T_2356 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 458:47] + node _T_2357 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 458:59] + node _T_2358 = and(_T_2356, _T_2357) @[el2_lsu_bus_buffer.scala 458:57] + node _T_2359 = or(_T_2355, _T_2358) @[el2_lsu_bus_buffer.scala 458:31] + node _T_2360 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 459:23] + node _T_2361 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 459:53] + node _T_2362 = and(_T_2360, _T_2361) @[el2_lsu_bus_buffer.scala 459:41] + node _T_2363 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 459:83] + node _T_2364 = and(_T_2362, _T_2363) @[el2_lsu_bus_buffer.scala 459:71] + node _T_2365 = eq(ibuf_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 459:104] + node _T_2366 = and(_T_2364, _T_2365) @[el2_lsu_bus_buffer.scala 459:92] + node _T_2367 = or(_T_2359, _T_2366) @[el2_lsu_bus_buffer.scala 458:86] + node _T_2368 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 460:17] + node _T_2369 = and(_T_2368, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 460:35] + node _T_2370 = eq(WrPtr1_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 460:64] + node _T_2371 = and(_T_2369, _T_2370) @[el2_lsu_bus_buffer.scala 460:52] + node _T_2372 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 460:85] + node _T_2373 = and(_T_2371, _T_2372) @[el2_lsu_bus_buffer.scala 460:73] + node _T_2374 = or(_T_2367, _T_2373) @[el2_lsu_bus_buffer.scala 459:114] + node _T_2375 = and(_T_2354, _T_2374) @[el2_lsu_bus_buffer.scala 457:113] + node _T_2376 = bits(buf_age[2], 0, 0) @[el2_lsu_bus_buffer.scala 460:109] + node _T_2377 = or(_T_2375, _T_2376) @[el2_lsu_bus_buffer.scala 460:97] + node _T_2378 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 457:83] + node _T_2379 = and(_T_2378, buf_state_en[2]) @[el2_lsu_bus_buffer.scala 457:94] + node _T_2380 = eq(buf_state[1], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 458:20] + node _T_2381 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 458:47] + node _T_2382 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 458:59] + node _T_2383 = and(_T_2381, _T_2382) @[el2_lsu_bus_buffer.scala 458:57] + node _T_2384 = or(_T_2380, _T_2383) @[el2_lsu_bus_buffer.scala 458:31] + node _T_2385 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 459:23] + node _T_2386 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 459:53] + node _T_2387 = and(_T_2385, _T_2386) @[el2_lsu_bus_buffer.scala 459:41] + node _T_2388 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 459:83] + node _T_2389 = and(_T_2387, _T_2388) @[el2_lsu_bus_buffer.scala 459:71] + node _T_2390 = eq(ibuf_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 459:104] + node _T_2391 = and(_T_2389, _T_2390) @[el2_lsu_bus_buffer.scala 459:92] + node _T_2392 = or(_T_2384, _T_2391) @[el2_lsu_bus_buffer.scala 458:86] + node _T_2393 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 460:17] + node _T_2394 = and(_T_2393, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 460:35] + node _T_2395 = eq(WrPtr1_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 460:64] + node _T_2396 = and(_T_2394, _T_2395) @[el2_lsu_bus_buffer.scala 460:52] + node _T_2397 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 460:85] + node _T_2398 = and(_T_2396, _T_2397) @[el2_lsu_bus_buffer.scala 460:73] + node _T_2399 = or(_T_2392, _T_2398) @[el2_lsu_bus_buffer.scala 459:114] + node _T_2400 = and(_T_2379, _T_2399) @[el2_lsu_bus_buffer.scala 457:113] + node _T_2401 = bits(buf_age[2], 1, 1) @[el2_lsu_bus_buffer.scala 460:109] + node _T_2402 = or(_T_2400, _T_2401) @[el2_lsu_bus_buffer.scala 460:97] + node _T_2403 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 457:83] + node _T_2404 = and(_T_2403, buf_state_en[2]) @[el2_lsu_bus_buffer.scala 457:94] + node _T_2405 = eq(buf_state[2], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 458:20] + node _T_2406 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 458:47] + node _T_2407 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 458:59] + node _T_2408 = and(_T_2406, _T_2407) @[el2_lsu_bus_buffer.scala 458:57] + node _T_2409 = or(_T_2405, _T_2408) @[el2_lsu_bus_buffer.scala 458:31] + node _T_2410 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 459:23] + node _T_2411 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 459:53] + node _T_2412 = and(_T_2410, _T_2411) @[el2_lsu_bus_buffer.scala 459:41] + node _T_2413 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 459:83] + node _T_2414 = and(_T_2412, _T_2413) @[el2_lsu_bus_buffer.scala 459:71] + node _T_2415 = eq(ibuf_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 459:104] + node _T_2416 = and(_T_2414, _T_2415) @[el2_lsu_bus_buffer.scala 459:92] + node _T_2417 = or(_T_2409, _T_2416) @[el2_lsu_bus_buffer.scala 458:86] + node _T_2418 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 460:17] + node _T_2419 = and(_T_2418, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 460:35] + node _T_2420 = eq(WrPtr1_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 460:64] + node _T_2421 = and(_T_2419, _T_2420) @[el2_lsu_bus_buffer.scala 460:52] + node _T_2422 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 460:85] + node _T_2423 = and(_T_2421, _T_2422) @[el2_lsu_bus_buffer.scala 460:73] + node _T_2424 = or(_T_2417, _T_2423) @[el2_lsu_bus_buffer.scala 459:114] + node _T_2425 = and(_T_2404, _T_2424) @[el2_lsu_bus_buffer.scala 457:113] + node _T_2426 = bits(buf_age[2], 2, 2) @[el2_lsu_bus_buffer.scala 460:109] + node _T_2427 = or(_T_2425, _T_2426) @[el2_lsu_bus_buffer.scala 460:97] + node _T_2428 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 457:83] + node _T_2429 = and(_T_2428, buf_state_en[2]) @[el2_lsu_bus_buffer.scala 457:94] + node _T_2430 = eq(buf_state[3], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 458:20] + node _T_2431 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 458:47] + node _T_2432 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 458:59] + node _T_2433 = and(_T_2431, _T_2432) @[el2_lsu_bus_buffer.scala 458:57] + node _T_2434 = or(_T_2430, _T_2433) @[el2_lsu_bus_buffer.scala 458:31] + node _T_2435 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 459:23] + node _T_2436 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 459:53] + node _T_2437 = and(_T_2435, _T_2436) @[el2_lsu_bus_buffer.scala 459:41] + node _T_2438 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 459:83] + node _T_2439 = and(_T_2437, _T_2438) @[el2_lsu_bus_buffer.scala 459:71] + node _T_2440 = eq(ibuf_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 459:104] + node _T_2441 = and(_T_2439, _T_2440) @[el2_lsu_bus_buffer.scala 459:92] + node _T_2442 = or(_T_2434, _T_2441) @[el2_lsu_bus_buffer.scala 458:86] + node _T_2443 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 460:17] + node _T_2444 = and(_T_2443, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 460:35] + node _T_2445 = eq(WrPtr1_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 460:64] + node _T_2446 = and(_T_2444, _T_2445) @[el2_lsu_bus_buffer.scala 460:52] + node _T_2447 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 460:85] + node _T_2448 = and(_T_2446, _T_2447) @[el2_lsu_bus_buffer.scala 460:73] + node _T_2449 = or(_T_2442, _T_2448) @[el2_lsu_bus_buffer.scala 459:114] + node _T_2450 = and(_T_2429, _T_2449) @[el2_lsu_bus_buffer.scala 457:113] + node _T_2451 = bits(buf_age[2], 3, 3) @[el2_lsu_bus_buffer.scala 460:109] + node _T_2452 = or(_T_2450, _T_2451) @[el2_lsu_bus_buffer.scala 460:97] + node _T_2453 = cat(_T_2452, _T_2427) @[Cat.scala 29:58] + node _T_2454 = cat(_T_2453, _T_2402) @[Cat.scala 29:58] + node buf_age_in_2 = cat(_T_2454, _T_2377) @[Cat.scala 29:58] + node _T_2455 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 457:83] + node _T_2456 = and(_T_2455, buf_state_en[3]) @[el2_lsu_bus_buffer.scala 457:94] + node _T_2457 = eq(buf_state[0], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 458:20] + node _T_2458 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 458:47] + node _T_2459 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 458:59] + node _T_2460 = and(_T_2458, _T_2459) @[el2_lsu_bus_buffer.scala 458:57] + node _T_2461 = or(_T_2457, _T_2460) @[el2_lsu_bus_buffer.scala 458:31] + node _T_2462 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 459:23] + node _T_2463 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 459:53] + node _T_2464 = and(_T_2462, _T_2463) @[el2_lsu_bus_buffer.scala 459:41] + node _T_2465 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 459:83] + node _T_2466 = and(_T_2464, _T_2465) @[el2_lsu_bus_buffer.scala 459:71] + node _T_2467 = eq(ibuf_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 459:104] + node _T_2468 = and(_T_2466, _T_2467) @[el2_lsu_bus_buffer.scala 459:92] + node _T_2469 = or(_T_2461, _T_2468) @[el2_lsu_bus_buffer.scala 458:86] + node _T_2470 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 460:17] + node _T_2471 = and(_T_2470, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 460:35] + node _T_2472 = eq(WrPtr1_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 460:64] + node _T_2473 = and(_T_2471, _T_2472) @[el2_lsu_bus_buffer.scala 460:52] + node _T_2474 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 460:85] + node _T_2475 = and(_T_2473, _T_2474) @[el2_lsu_bus_buffer.scala 460:73] + node _T_2476 = or(_T_2469, _T_2475) @[el2_lsu_bus_buffer.scala 459:114] + node _T_2477 = and(_T_2456, _T_2476) @[el2_lsu_bus_buffer.scala 457:113] + node _T_2478 = bits(buf_age[3], 0, 0) @[el2_lsu_bus_buffer.scala 460:109] + node _T_2479 = or(_T_2477, _T_2478) @[el2_lsu_bus_buffer.scala 460:97] + node _T_2480 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 457:83] + node _T_2481 = and(_T_2480, buf_state_en[3]) @[el2_lsu_bus_buffer.scala 457:94] + node _T_2482 = eq(buf_state[1], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 458:20] + node _T_2483 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 458:47] + node _T_2484 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 458:59] + node _T_2485 = and(_T_2483, _T_2484) @[el2_lsu_bus_buffer.scala 458:57] + node _T_2486 = or(_T_2482, _T_2485) @[el2_lsu_bus_buffer.scala 458:31] + node _T_2487 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 459:23] + node _T_2488 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 459:53] + node _T_2489 = and(_T_2487, _T_2488) @[el2_lsu_bus_buffer.scala 459:41] + node _T_2490 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 459:83] + node _T_2491 = and(_T_2489, _T_2490) @[el2_lsu_bus_buffer.scala 459:71] + node _T_2492 = eq(ibuf_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 459:104] + node _T_2493 = and(_T_2491, _T_2492) @[el2_lsu_bus_buffer.scala 459:92] + node _T_2494 = or(_T_2486, _T_2493) @[el2_lsu_bus_buffer.scala 458:86] + node _T_2495 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 460:17] + node _T_2496 = and(_T_2495, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 460:35] + node _T_2497 = eq(WrPtr1_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 460:64] + node _T_2498 = and(_T_2496, _T_2497) @[el2_lsu_bus_buffer.scala 460:52] + node _T_2499 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 460:85] + node _T_2500 = and(_T_2498, _T_2499) @[el2_lsu_bus_buffer.scala 460:73] + node _T_2501 = or(_T_2494, _T_2500) @[el2_lsu_bus_buffer.scala 459:114] + node _T_2502 = and(_T_2481, _T_2501) @[el2_lsu_bus_buffer.scala 457:113] + node _T_2503 = bits(buf_age[3], 1, 1) @[el2_lsu_bus_buffer.scala 460:109] + node _T_2504 = or(_T_2502, _T_2503) @[el2_lsu_bus_buffer.scala 460:97] + node _T_2505 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 457:83] + node _T_2506 = and(_T_2505, buf_state_en[3]) @[el2_lsu_bus_buffer.scala 457:94] + node _T_2507 = eq(buf_state[2], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 458:20] + node _T_2508 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 458:47] + node _T_2509 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 458:59] + node _T_2510 = and(_T_2508, _T_2509) @[el2_lsu_bus_buffer.scala 458:57] + node _T_2511 = or(_T_2507, _T_2510) @[el2_lsu_bus_buffer.scala 458:31] + node _T_2512 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 459:23] + node _T_2513 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 459:53] + node _T_2514 = and(_T_2512, _T_2513) @[el2_lsu_bus_buffer.scala 459:41] + node _T_2515 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 459:83] + node _T_2516 = and(_T_2514, _T_2515) @[el2_lsu_bus_buffer.scala 459:71] + node _T_2517 = eq(ibuf_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 459:104] + node _T_2518 = and(_T_2516, _T_2517) @[el2_lsu_bus_buffer.scala 459:92] + node _T_2519 = or(_T_2511, _T_2518) @[el2_lsu_bus_buffer.scala 458:86] + node _T_2520 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 460:17] + node _T_2521 = and(_T_2520, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 460:35] + node _T_2522 = eq(WrPtr1_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 460:64] + node _T_2523 = and(_T_2521, _T_2522) @[el2_lsu_bus_buffer.scala 460:52] + node _T_2524 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 460:85] + node _T_2525 = and(_T_2523, _T_2524) @[el2_lsu_bus_buffer.scala 460:73] + node _T_2526 = or(_T_2519, _T_2525) @[el2_lsu_bus_buffer.scala 459:114] + node _T_2527 = and(_T_2506, _T_2526) @[el2_lsu_bus_buffer.scala 457:113] + node _T_2528 = bits(buf_age[3], 2, 2) @[el2_lsu_bus_buffer.scala 460:109] + node _T_2529 = or(_T_2527, _T_2528) @[el2_lsu_bus_buffer.scala 460:97] + node _T_2530 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 457:83] + node _T_2531 = and(_T_2530, buf_state_en[3]) @[el2_lsu_bus_buffer.scala 457:94] + node _T_2532 = eq(buf_state[3], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 458:20] + node _T_2533 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 458:47] + node _T_2534 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 458:59] + node _T_2535 = and(_T_2533, _T_2534) @[el2_lsu_bus_buffer.scala 458:57] + node _T_2536 = or(_T_2532, _T_2535) @[el2_lsu_bus_buffer.scala 458:31] + node _T_2537 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 459:23] + node _T_2538 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 459:53] + node _T_2539 = and(_T_2537, _T_2538) @[el2_lsu_bus_buffer.scala 459:41] + node _T_2540 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 459:83] + node _T_2541 = and(_T_2539, _T_2540) @[el2_lsu_bus_buffer.scala 459:71] + node _T_2542 = eq(ibuf_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 459:104] + node _T_2543 = and(_T_2541, _T_2542) @[el2_lsu_bus_buffer.scala 459:92] + node _T_2544 = or(_T_2536, _T_2543) @[el2_lsu_bus_buffer.scala 458:86] + node _T_2545 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 460:17] + node _T_2546 = and(_T_2545, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 460:35] + node _T_2547 = eq(WrPtr1_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 460:64] + node _T_2548 = and(_T_2546, _T_2547) @[el2_lsu_bus_buffer.scala 460:52] + node _T_2549 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 460:85] + node _T_2550 = and(_T_2548, _T_2549) @[el2_lsu_bus_buffer.scala 460:73] + node _T_2551 = or(_T_2544, _T_2550) @[el2_lsu_bus_buffer.scala 459:114] + node _T_2552 = and(_T_2531, _T_2551) @[el2_lsu_bus_buffer.scala 457:113] + node _T_2553 = bits(buf_age[3], 3, 3) @[el2_lsu_bus_buffer.scala 460:109] + node _T_2554 = or(_T_2552, _T_2553) @[el2_lsu_bus_buffer.scala 460:97] + node _T_2555 = cat(_T_2554, _T_2529) @[Cat.scala 29:58] + node _T_2556 = cat(_T_2555, _T_2504) @[Cat.scala 29:58] + node buf_age_in_3 = cat(_T_2556, _T_2479) @[Cat.scala 29:58] + wire buf_ageQ : UInt<4>[4] @[el2_lsu_bus_buffer.scala 461:22] + buf_ageQ[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 462:12] + buf_ageQ[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 462:12] + buf_ageQ[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 462:12] + buf_ageQ[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 462:12] + node _T_2557 = bits(buf_ageQ[0], 0, 0) @[el2_lsu_bus_buffer.scala 463:74] + node _T_2558 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 463:95] + node _T_2559 = and(_T_2558, buf_cmd_state_bus_en[0]) @[el2_lsu_bus_buffer.scala 463:105] + node _T_2560 = eq(_T_2559, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 463:80] + node _T_2561 = and(_T_2557, _T_2560) @[el2_lsu_bus_buffer.scala 463:78] + node _T_2562 = bits(buf_ageQ[0], 1, 1) @[el2_lsu_bus_buffer.scala 463:74] + node _T_2563 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 463:95] + node _T_2564 = and(_T_2563, buf_cmd_state_bus_en[1]) @[el2_lsu_bus_buffer.scala 463:105] + node _T_2565 = eq(_T_2564, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 463:80] + node _T_2566 = and(_T_2562, _T_2565) @[el2_lsu_bus_buffer.scala 463:78] + node _T_2567 = bits(buf_ageQ[0], 2, 2) @[el2_lsu_bus_buffer.scala 463:74] + node _T_2568 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 463:95] + node _T_2569 = and(_T_2568, buf_cmd_state_bus_en[2]) @[el2_lsu_bus_buffer.scala 463:105] + node _T_2570 = eq(_T_2569, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 463:80] + node _T_2571 = and(_T_2567, _T_2570) @[el2_lsu_bus_buffer.scala 463:78] + node _T_2572 = bits(buf_ageQ[0], 3, 3) @[el2_lsu_bus_buffer.scala 463:74] + node _T_2573 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 463:95] + node _T_2574 = and(_T_2573, buf_cmd_state_bus_en[3]) @[el2_lsu_bus_buffer.scala 463:105] + node _T_2575 = eq(_T_2574, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 463:80] + node _T_2576 = and(_T_2572, _T_2575) @[el2_lsu_bus_buffer.scala 463:78] + node _T_2577 = cat(_T_2576, _T_2571) @[Cat.scala 29:58] + node _T_2578 = cat(_T_2577, _T_2566) @[Cat.scala 29:58] + node _T_2579 = cat(_T_2578, _T_2561) @[Cat.scala 29:58] + node _T_2580 = bits(buf_ageQ[1], 0, 0) @[el2_lsu_bus_buffer.scala 463:74] + node _T_2581 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 463:95] + node _T_2582 = and(_T_2581, buf_cmd_state_bus_en[0]) @[el2_lsu_bus_buffer.scala 463:105] + node _T_2583 = eq(_T_2582, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 463:80] + node _T_2584 = and(_T_2580, _T_2583) @[el2_lsu_bus_buffer.scala 463:78] + node _T_2585 = bits(buf_ageQ[1], 1, 1) @[el2_lsu_bus_buffer.scala 463:74] + node _T_2586 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 463:95] + node _T_2587 = and(_T_2586, buf_cmd_state_bus_en[1]) @[el2_lsu_bus_buffer.scala 463:105] + node _T_2588 = eq(_T_2587, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 463:80] + node _T_2589 = and(_T_2585, _T_2588) @[el2_lsu_bus_buffer.scala 463:78] + node _T_2590 = bits(buf_ageQ[1], 2, 2) @[el2_lsu_bus_buffer.scala 463:74] + node _T_2591 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 463:95] + node _T_2592 = and(_T_2591, buf_cmd_state_bus_en[2]) @[el2_lsu_bus_buffer.scala 463:105] + node _T_2593 = eq(_T_2592, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 463:80] + node _T_2594 = and(_T_2590, _T_2593) @[el2_lsu_bus_buffer.scala 463:78] + node _T_2595 = bits(buf_ageQ[1], 3, 3) @[el2_lsu_bus_buffer.scala 463:74] + node _T_2596 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 463:95] + node _T_2597 = and(_T_2596, buf_cmd_state_bus_en[3]) @[el2_lsu_bus_buffer.scala 463:105] + node _T_2598 = eq(_T_2597, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 463:80] + node _T_2599 = and(_T_2595, _T_2598) @[el2_lsu_bus_buffer.scala 463:78] + node _T_2600 = cat(_T_2599, _T_2594) @[Cat.scala 29:58] + node _T_2601 = cat(_T_2600, _T_2589) @[Cat.scala 29:58] + node _T_2602 = cat(_T_2601, _T_2584) @[Cat.scala 29:58] + node _T_2603 = bits(buf_ageQ[2], 0, 0) @[el2_lsu_bus_buffer.scala 463:74] + node _T_2604 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 463:95] + node _T_2605 = and(_T_2604, buf_cmd_state_bus_en[0]) @[el2_lsu_bus_buffer.scala 463:105] + node _T_2606 = eq(_T_2605, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 463:80] + node _T_2607 = and(_T_2603, _T_2606) @[el2_lsu_bus_buffer.scala 463:78] + node _T_2608 = bits(buf_ageQ[2], 1, 1) @[el2_lsu_bus_buffer.scala 463:74] + node _T_2609 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 463:95] + node _T_2610 = and(_T_2609, buf_cmd_state_bus_en[1]) @[el2_lsu_bus_buffer.scala 463:105] + node _T_2611 = eq(_T_2610, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 463:80] + node _T_2612 = and(_T_2608, _T_2611) @[el2_lsu_bus_buffer.scala 463:78] + node _T_2613 = bits(buf_ageQ[2], 2, 2) @[el2_lsu_bus_buffer.scala 463:74] + node _T_2614 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 463:95] + node _T_2615 = and(_T_2614, buf_cmd_state_bus_en[2]) @[el2_lsu_bus_buffer.scala 463:105] + node _T_2616 = eq(_T_2615, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 463:80] + node _T_2617 = and(_T_2613, _T_2616) @[el2_lsu_bus_buffer.scala 463:78] + node _T_2618 = bits(buf_ageQ[2], 3, 3) @[el2_lsu_bus_buffer.scala 463:74] + node _T_2619 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 463:95] + node _T_2620 = and(_T_2619, buf_cmd_state_bus_en[3]) @[el2_lsu_bus_buffer.scala 463:105] + node _T_2621 = eq(_T_2620, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 463:80] + node _T_2622 = and(_T_2618, _T_2621) @[el2_lsu_bus_buffer.scala 463:78] + node _T_2623 = cat(_T_2622, _T_2617) @[Cat.scala 29:58] + node _T_2624 = cat(_T_2623, _T_2612) @[Cat.scala 29:58] + node _T_2625 = cat(_T_2624, _T_2607) @[Cat.scala 29:58] + node _T_2626 = bits(buf_ageQ[3], 0, 0) @[el2_lsu_bus_buffer.scala 463:74] + node _T_2627 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 463:95] + node _T_2628 = and(_T_2627, buf_cmd_state_bus_en[0]) @[el2_lsu_bus_buffer.scala 463:105] + node _T_2629 = eq(_T_2628, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 463:80] + node _T_2630 = and(_T_2626, _T_2629) @[el2_lsu_bus_buffer.scala 463:78] + node _T_2631 = bits(buf_ageQ[3], 1, 1) @[el2_lsu_bus_buffer.scala 463:74] + node _T_2632 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 463:95] + node _T_2633 = and(_T_2632, buf_cmd_state_bus_en[1]) @[el2_lsu_bus_buffer.scala 463:105] + node _T_2634 = eq(_T_2633, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 463:80] + node _T_2635 = and(_T_2631, _T_2634) @[el2_lsu_bus_buffer.scala 463:78] + node _T_2636 = bits(buf_ageQ[3], 2, 2) @[el2_lsu_bus_buffer.scala 463:74] + node _T_2637 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 463:95] + node _T_2638 = and(_T_2637, buf_cmd_state_bus_en[2]) @[el2_lsu_bus_buffer.scala 463:105] + node _T_2639 = eq(_T_2638, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 463:80] + node _T_2640 = and(_T_2636, _T_2639) @[el2_lsu_bus_buffer.scala 463:78] + node _T_2641 = bits(buf_ageQ[3], 3, 3) @[el2_lsu_bus_buffer.scala 463:74] + node _T_2642 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 463:95] + node _T_2643 = and(_T_2642, buf_cmd_state_bus_en[3]) @[el2_lsu_bus_buffer.scala 463:105] + node _T_2644 = eq(_T_2643, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 463:80] + node _T_2645 = and(_T_2641, _T_2644) @[el2_lsu_bus_buffer.scala 463:78] + node _T_2646 = cat(_T_2645, _T_2640) @[Cat.scala 29:58] + node _T_2647 = cat(_T_2646, _T_2635) @[Cat.scala 29:58] + node _T_2648 = cat(_T_2647, _T_2630) @[Cat.scala 29:58] + buf_age[0] <= _T_2579 @[el2_lsu_bus_buffer.scala 463:13] + buf_age[1] <= _T_2602 @[el2_lsu_bus_buffer.scala 463:13] + buf_age[2] <= _T_2625 @[el2_lsu_bus_buffer.scala 463:13] + buf_age[3] <= _T_2648 @[el2_lsu_bus_buffer.scala 463:13] + node _T_2649 = eq(UInt<1>("h00"), UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 464:78] + node _T_2650 = bits(buf_age[0], 0, 0) @[el2_lsu_bus_buffer.scala 464:102] + node _T_2651 = eq(_T_2650, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 464:91] + node _T_2652 = neq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 464:121] + node _T_2653 = and(_T_2651, _T_2652) @[el2_lsu_bus_buffer.scala 464:106] + node _T_2654 = mux(_T_2649, UInt<1>("h00"), _T_2653) @[el2_lsu_bus_buffer.scala 464:74] + node _T_2655 = eq(UInt<1>("h00"), UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 464:78] + node _T_2656 = bits(buf_age[0], 1, 1) @[el2_lsu_bus_buffer.scala 464:102] + node _T_2657 = eq(_T_2656, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 464:91] + node _T_2658 = neq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 464:121] + node _T_2659 = and(_T_2657, _T_2658) @[el2_lsu_bus_buffer.scala 464:106] + node _T_2660 = mux(_T_2655, UInt<1>("h00"), _T_2659) @[el2_lsu_bus_buffer.scala 464:74] + node _T_2661 = eq(UInt<1>("h00"), UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 464:78] + node _T_2662 = bits(buf_age[0], 2, 2) @[el2_lsu_bus_buffer.scala 464:102] + node _T_2663 = eq(_T_2662, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 464:91] + node _T_2664 = neq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 464:121] + node _T_2665 = and(_T_2663, _T_2664) @[el2_lsu_bus_buffer.scala 464:106] + node _T_2666 = mux(_T_2661, UInt<1>("h00"), _T_2665) @[el2_lsu_bus_buffer.scala 464:74] + node _T_2667 = eq(UInt<1>("h00"), UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 464:78] + node _T_2668 = bits(buf_age[0], 3, 3) @[el2_lsu_bus_buffer.scala 464:102] + node _T_2669 = eq(_T_2668, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 464:91] + node _T_2670 = neq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 464:121] + node _T_2671 = and(_T_2669, _T_2670) @[el2_lsu_bus_buffer.scala 464:106] + node _T_2672 = mux(_T_2667, UInt<1>("h00"), _T_2671) @[el2_lsu_bus_buffer.scala 464:74] + node _T_2673 = cat(_T_2672, _T_2666) @[Cat.scala 29:58] + node _T_2674 = cat(_T_2673, _T_2660) @[Cat.scala 29:58] + node _T_2675 = cat(_T_2674, _T_2654) @[Cat.scala 29:58] + node _T_2676 = eq(UInt<1>("h01"), UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 464:78] + node _T_2677 = bits(buf_age[1], 0, 0) @[el2_lsu_bus_buffer.scala 464:102] + node _T_2678 = eq(_T_2677, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 464:91] + node _T_2679 = neq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 464:121] + node _T_2680 = and(_T_2678, _T_2679) @[el2_lsu_bus_buffer.scala 464:106] + node _T_2681 = mux(_T_2676, UInt<1>("h00"), _T_2680) @[el2_lsu_bus_buffer.scala 464:74] + node _T_2682 = eq(UInt<1>("h01"), UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 464:78] + node _T_2683 = bits(buf_age[1], 1, 1) @[el2_lsu_bus_buffer.scala 464:102] + node _T_2684 = eq(_T_2683, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 464:91] + node _T_2685 = neq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 464:121] + node _T_2686 = and(_T_2684, _T_2685) @[el2_lsu_bus_buffer.scala 464:106] + node _T_2687 = mux(_T_2682, UInt<1>("h00"), _T_2686) @[el2_lsu_bus_buffer.scala 464:74] + node _T_2688 = eq(UInt<1>("h01"), UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 464:78] + node _T_2689 = bits(buf_age[1], 2, 2) @[el2_lsu_bus_buffer.scala 464:102] + node _T_2690 = eq(_T_2689, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 464:91] + node _T_2691 = neq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 464:121] + node _T_2692 = and(_T_2690, _T_2691) @[el2_lsu_bus_buffer.scala 464:106] + node _T_2693 = mux(_T_2688, UInt<1>("h00"), _T_2692) @[el2_lsu_bus_buffer.scala 464:74] + node _T_2694 = eq(UInt<1>("h01"), UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 464:78] + node _T_2695 = bits(buf_age[1], 3, 3) @[el2_lsu_bus_buffer.scala 464:102] + node _T_2696 = eq(_T_2695, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 464:91] + node _T_2697 = neq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 464:121] + node _T_2698 = and(_T_2696, _T_2697) @[el2_lsu_bus_buffer.scala 464:106] + node _T_2699 = mux(_T_2694, UInt<1>("h00"), _T_2698) @[el2_lsu_bus_buffer.scala 464:74] + node _T_2700 = cat(_T_2699, _T_2693) @[Cat.scala 29:58] + node _T_2701 = cat(_T_2700, _T_2687) @[Cat.scala 29:58] + node _T_2702 = cat(_T_2701, _T_2681) @[Cat.scala 29:58] + node _T_2703 = eq(UInt<2>("h02"), UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 464:78] + node _T_2704 = bits(buf_age[2], 0, 0) @[el2_lsu_bus_buffer.scala 464:102] + node _T_2705 = eq(_T_2704, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 464:91] + node _T_2706 = neq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 464:121] + node _T_2707 = and(_T_2705, _T_2706) @[el2_lsu_bus_buffer.scala 464:106] + node _T_2708 = mux(_T_2703, UInt<1>("h00"), _T_2707) @[el2_lsu_bus_buffer.scala 464:74] + node _T_2709 = eq(UInt<2>("h02"), UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 464:78] + node _T_2710 = bits(buf_age[2], 1, 1) @[el2_lsu_bus_buffer.scala 464:102] + node _T_2711 = eq(_T_2710, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 464:91] + node _T_2712 = neq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 464:121] + node _T_2713 = and(_T_2711, _T_2712) @[el2_lsu_bus_buffer.scala 464:106] + node _T_2714 = mux(_T_2709, UInt<1>("h00"), _T_2713) @[el2_lsu_bus_buffer.scala 464:74] + node _T_2715 = eq(UInt<2>("h02"), UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 464:78] + node _T_2716 = bits(buf_age[2], 2, 2) @[el2_lsu_bus_buffer.scala 464:102] + node _T_2717 = eq(_T_2716, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 464:91] + node _T_2718 = neq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 464:121] + node _T_2719 = and(_T_2717, _T_2718) @[el2_lsu_bus_buffer.scala 464:106] + node _T_2720 = mux(_T_2715, UInt<1>("h00"), _T_2719) @[el2_lsu_bus_buffer.scala 464:74] + node _T_2721 = eq(UInt<2>("h02"), UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 464:78] + node _T_2722 = bits(buf_age[2], 3, 3) @[el2_lsu_bus_buffer.scala 464:102] + node _T_2723 = eq(_T_2722, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 464:91] + node _T_2724 = neq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 464:121] + node _T_2725 = and(_T_2723, _T_2724) @[el2_lsu_bus_buffer.scala 464:106] + node _T_2726 = mux(_T_2721, UInt<1>("h00"), _T_2725) @[el2_lsu_bus_buffer.scala 464:74] + node _T_2727 = cat(_T_2726, _T_2720) @[Cat.scala 29:58] + node _T_2728 = cat(_T_2727, _T_2714) @[Cat.scala 29:58] + node _T_2729 = cat(_T_2728, _T_2708) @[Cat.scala 29:58] + node _T_2730 = eq(UInt<2>("h03"), UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 464:78] + node _T_2731 = bits(buf_age[3], 0, 0) @[el2_lsu_bus_buffer.scala 464:102] + node _T_2732 = eq(_T_2731, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 464:91] + node _T_2733 = neq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 464:121] + node _T_2734 = and(_T_2732, _T_2733) @[el2_lsu_bus_buffer.scala 464:106] + node _T_2735 = mux(_T_2730, UInt<1>("h00"), _T_2734) @[el2_lsu_bus_buffer.scala 464:74] + node _T_2736 = eq(UInt<2>("h03"), UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 464:78] + node _T_2737 = bits(buf_age[3], 1, 1) @[el2_lsu_bus_buffer.scala 464:102] + node _T_2738 = eq(_T_2737, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 464:91] + node _T_2739 = neq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 464:121] + node _T_2740 = and(_T_2738, _T_2739) @[el2_lsu_bus_buffer.scala 464:106] + node _T_2741 = mux(_T_2736, UInt<1>("h00"), _T_2740) @[el2_lsu_bus_buffer.scala 464:74] + node _T_2742 = eq(UInt<2>("h03"), UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 464:78] + node _T_2743 = bits(buf_age[3], 2, 2) @[el2_lsu_bus_buffer.scala 464:102] + node _T_2744 = eq(_T_2743, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 464:91] + node _T_2745 = neq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 464:121] + node _T_2746 = and(_T_2744, _T_2745) @[el2_lsu_bus_buffer.scala 464:106] + node _T_2747 = mux(_T_2742, UInt<1>("h00"), _T_2746) @[el2_lsu_bus_buffer.scala 464:74] + node _T_2748 = eq(UInt<2>("h03"), UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 464:78] + node _T_2749 = bits(buf_age[3], 3, 3) @[el2_lsu_bus_buffer.scala 464:102] + node _T_2750 = eq(_T_2749, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 464:91] + node _T_2751 = neq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 464:121] + node _T_2752 = and(_T_2750, _T_2751) @[el2_lsu_bus_buffer.scala 464:106] + node _T_2753 = mux(_T_2748, UInt<1>("h00"), _T_2752) @[el2_lsu_bus_buffer.scala 464:74] + node _T_2754 = cat(_T_2753, _T_2747) @[Cat.scala 29:58] + node _T_2755 = cat(_T_2754, _T_2741) @[Cat.scala 29:58] + node _T_2756 = cat(_T_2755, _T_2735) @[Cat.scala 29:58] + buf_age_younger[0] <= _T_2675 @[el2_lsu_bus_buffer.scala 464:21] + buf_age_younger[1] <= _T_2702 @[el2_lsu_bus_buffer.scala 464:21] + buf_age_younger[2] <= _T_2729 @[el2_lsu_bus_buffer.scala 464:21] + buf_age_younger[3] <= _T_2756 @[el2_lsu_bus_buffer.scala 464:21] + node _T_2757 = bits(buf_rspageQ[0], 0, 0) @[el2_lsu_bus_buffer.scala 465:85] + node _T_2758 = eq(buf_state[0], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 465:104] + node _T_2759 = and(_T_2757, _T_2758) @[el2_lsu_bus_buffer.scala 465:89] + node _T_2760 = bits(buf_rspageQ[0], 1, 1) @[el2_lsu_bus_buffer.scala 465:85] + node _T_2761 = eq(buf_state[1], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 465:104] + node _T_2762 = and(_T_2760, _T_2761) @[el2_lsu_bus_buffer.scala 465:89] + node _T_2763 = bits(buf_rspageQ[0], 2, 2) @[el2_lsu_bus_buffer.scala 465:85] + node _T_2764 = eq(buf_state[2], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 465:104] + node _T_2765 = and(_T_2763, _T_2764) @[el2_lsu_bus_buffer.scala 465:89] + node _T_2766 = bits(buf_rspageQ[0], 3, 3) @[el2_lsu_bus_buffer.scala 465:85] + node _T_2767 = eq(buf_state[3], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 465:104] + node _T_2768 = and(_T_2766, _T_2767) @[el2_lsu_bus_buffer.scala 465:89] + node _T_2769 = cat(_T_2768, _T_2765) @[Cat.scala 29:58] + node _T_2770 = cat(_T_2769, _T_2762) @[Cat.scala 29:58] + node _T_2771 = cat(_T_2770, _T_2759) @[Cat.scala 29:58] + node _T_2772 = bits(buf_rspageQ[1], 0, 0) @[el2_lsu_bus_buffer.scala 465:85] + node _T_2773 = eq(buf_state[0], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 465:104] + node _T_2774 = and(_T_2772, _T_2773) @[el2_lsu_bus_buffer.scala 465:89] + node _T_2775 = bits(buf_rspageQ[1], 1, 1) @[el2_lsu_bus_buffer.scala 465:85] + node _T_2776 = eq(buf_state[1], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 465:104] + node _T_2777 = and(_T_2775, _T_2776) @[el2_lsu_bus_buffer.scala 465:89] + node _T_2778 = bits(buf_rspageQ[1], 2, 2) @[el2_lsu_bus_buffer.scala 465:85] + node _T_2779 = eq(buf_state[2], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 465:104] + node _T_2780 = and(_T_2778, _T_2779) @[el2_lsu_bus_buffer.scala 465:89] + node _T_2781 = bits(buf_rspageQ[1], 3, 3) @[el2_lsu_bus_buffer.scala 465:85] + node _T_2782 = eq(buf_state[3], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 465:104] + node _T_2783 = and(_T_2781, _T_2782) @[el2_lsu_bus_buffer.scala 465:89] + node _T_2784 = cat(_T_2783, _T_2780) @[Cat.scala 29:58] + node _T_2785 = cat(_T_2784, _T_2777) @[Cat.scala 29:58] + node _T_2786 = cat(_T_2785, _T_2774) @[Cat.scala 29:58] + node _T_2787 = bits(buf_rspageQ[2], 0, 0) @[el2_lsu_bus_buffer.scala 465:85] + node _T_2788 = eq(buf_state[0], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 465:104] + node _T_2789 = and(_T_2787, _T_2788) @[el2_lsu_bus_buffer.scala 465:89] + node _T_2790 = bits(buf_rspageQ[2], 1, 1) @[el2_lsu_bus_buffer.scala 465:85] + node _T_2791 = eq(buf_state[1], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 465:104] + node _T_2792 = and(_T_2790, _T_2791) @[el2_lsu_bus_buffer.scala 465:89] + node _T_2793 = bits(buf_rspageQ[2], 2, 2) @[el2_lsu_bus_buffer.scala 465:85] + node _T_2794 = eq(buf_state[2], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 465:104] + node _T_2795 = and(_T_2793, _T_2794) @[el2_lsu_bus_buffer.scala 465:89] + node _T_2796 = bits(buf_rspageQ[2], 3, 3) @[el2_lsu_bus_buffer.scala 465:85] + node _T_2797 = eq(buf_state[3], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 465:104] + node _T_2798 = and(_T_2796, _T_2797) @[el2_lsu_bus_buffer.scala 465:89] + node _T_2799 = cat(_T_2798, _T_2795) @[Cat.scala 29:58] + node _T_2800 = cat(_T_2799, _T_2792) @[Cat.scala 29:58] + node _T_2801 = cat(_T_2800, _T_2789) @[Cat.scala 29:58] + node _T_2802 = bits(buf_rspageQ[3], 0, 0) @[el2_lsu_bus_buffer.scala 465:85] + node _T_2803 = eq(buf_state[0], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 465:104] + node _T_2804 = and(_T_2802, _T_2803) @[el2_lsu_bus_buffer.scala 465:89] + node _T_2805 = bits(buf_rspageQ[3], 1, 1) @[el2_lsu_bus_buffer.scala 465:85] + node _T_2806 = eq(buf_state[1], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 465:104] + node _T_2807 = and(_T_2805, _T_2806) @[el2_lsu_bus_buffer.scala 465:89] + node _T_2808 = bits(buf_rspageQ[3], 2, 2) @[el2_lsu_bus_buffer.scala 465:85] + node _T_2809 = eq(buf_state[2], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 465:104] + node _T_2810 = and(_T_2808, _T_2809) @[el2_lsu_bus_buffer.scala 465:89] + node _T_2811 = bits(buf_rspageQ[3], 3, 3) @[el2_lsu_bus_buffer.scala 465:85] + node _T_2812 = eq(buf_state[3], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 465:104] + node _T_2813 = and(_T_2811, _T_2812) @[el2_lsu_bus_buffer.scala 465:89] + node _T_2814 = cat(_T_2813, _T_2810) @[Cat.scala 29:58] + node _T_2815 = cat(_T_2814, _T_2807) @[Cat.scala 29:58] + node _T_2816 = cat(_T_2815, _T_2804) @[Cat.scala 29:58] + buf_rsp_pickage[0] <= _T_2771 @[el2_lsu_bus_buffer.scala 465:21] + buf_rsp_pickage[1] <= _T_2786 @[el2_lsu_bus_buffer.scala 465:21] + buf_rsp_pickage[2] <= _T_2801 @[el2_lsu_bus_buffer.scala 465:21] + buf_rsp_pickage[3] <= _T_2816 @[el2_lsu_bus_buffer.scala 465:21] + node _T_2817 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 467:84] + node _T_2818 = and(_T_2817, buf_state_en[0]) @[el2_lsu_bus_buffer.scala 467:95] + node _T_2819 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 468:23] + node _T_2820 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 468:49] + node _T_2821 = or(_T_2819, _T_2820) @[el2_lsu_bus_buffer.scala 468:34] + node _T_2822 = eq(_T_2821, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 468:8] + node _T_2823 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 469:25] + node _T_2824 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 469:55] + node _T_2825 = and(_T_2823, _T_2824) @[el2_lsu_bus_buffer.scala 469:43] + node _T_2826 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 469:84] + node _T_2827 = and(_T_2825, _T_2826) @[el2_lsu_bus_buffer.scala 469:73] + node _T_2828 = eq(ibuf_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 469:103] + node _T_2829 = and(_T_2827, _T_2828) @[el2_lsu_bus_buffer.scala 469:92] + node _T_2830 = or(_T_2822, _T_2829) @[el2_lsu_bus_buffer.scala 468:61] + node _T_2831 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 470:19] + node _T_2832 = and(_T_2831, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 470:37] + node _T_2833 = eq(WrPtr1_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 470:65] + node _T_2834 = and(_T_2832, _T_2833) @[el2_lsu_bus_buffer.scala 470:54] + node _T_2835 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 470:84] + node _T_2836 = and(_T_2834, _T_2835) @[el2_lsu_bus_buffer.scala 470:73] + node _T_2837 = or(_T_2830, _T_2836) @[el2_lsu_bus_buffer.scala 469:112] + node _T_2838 = and(_T_2818, _T_2837) @[el2_lsu_bus_buffer.scala 467:114] + node _T_2839 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 467:84] + node _T_2840 = and(_T_2839, buf_state_en[0]) @[el2_lsu_bus_buffer.scala 467:95] + node _T_2841 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 468:23] + node _T_2842 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 468:49] + node _T_2843 = or(_T_2841, _T_2842) @[el2_lsu_bus_buffer.scala 468:34] + node _T_2844 = eq(_T_2843, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 468:8] + node _T_2845 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 469:25] + node _T_2846 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 469:55] + node _T_2847 = and(_T_2845, _T_2846) @[el2_lsu_bus_buffer.scala 469:43] + node _T_2848 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 469:84] + node _T_2849 = and(_T_2847, _T_2848) @[el2_lsu_bus_buffer.scala 469:73] + node _T_2850 = eq(ibuf_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 469:103] + node _T_2851 = and(_T_2849, _T_2850) @[el2_lsu_bus_buffer.scala 469:92] + node _T_2852 = or(_T_2844, _T_2851) @[el2_lsu_bus_buffer.scala 468:61] + node _T_2853 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 470:19] + node _T_2854 = and(_T_2853, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 470:37] + node _T_2855 = eq(WrPtr1_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 470:65] + node _T_2856 = and(_T_2854, _T_2855) @[el2_lsu_bus_buffer.scala 470:54] + node _T_2857 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 470:84] + node _T_2858 = and(_T_2856, _T_2857) @[el2_lsu_bus_buffer.scala 470:73] + node _T_2859 = or(_T_2852, _T_2858) @[el2_lsu_bus_buffer.scala 469:112] + node _T_2860 = and(_T_2840, _T_2859) @[el2_lsu_bus_buffer.scala 467:114] + node _T_2861 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 467:84] + node _T_2862 = and(_T_2861, buf_state_en[0]) @[el2_lsu_bus_buffer.scala 467:95] + node _T_2863 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 468:23] + node _T_2864 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 468:49] + node _T_2865 = or(_T_2863, _T_2864) @[el2_lsu_bus_buffer.scala 468:34] + node _T_2866 = eq(_T_2865, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 468:8] + node _T_2867 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 469:25] + node _T_2868 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 469:55] + node _T_2869 = and(_T_2867, _T_2868) @[el2_lsu_bus_buffer.scala 469:43] + node _T_2870 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 469:84] + node _T_2871 = and(_T_2869, _T_2870) @[el2_lsu_bus_buffer.scala 469:73] + node _T_2872 = eq(ibuf_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 469:103] + node _T_2873 = and(_T_2871, _T_2872) @[el2_lsu_bus_buffer.scala 469:92] + node _T_2874 = or(_T_2866, _T_2873) @[el2_lsu_bus_buffer.scala 468:61] + node _T_2875 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 470:19] + node _T_2876 = and(_T_2875, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 470:37] + node _T_2877 = eq(WrPtr1_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 470:65] + node _T_2878 = and(_T_2876, _T_2877) @[el2_lsu_bus_buffer.scala 470:54] + node _T_2879 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 470:84] + node _T_2880 = and(_T_2878, _T_2879) @[el2_lsu_bus_buffer.scala 470:73] + node _T_2881 = or(_T_2874, _T_2880) @[el2_lsu_bus_buffer.scala 469:112] + node _T_2882 = and(_T_2862, _T_2881) @[el2_lsu_bus_buffer.scala 467:114] + node _T_2883 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 467:84] + node _T_2884 = and(_T_2883, buf_state_en[0]) @[el2_lsu_bus_buffer.scala 467:95] + node _T_2885 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 468:23] + node _T_2886 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 468:49] + node _T_2887 = or(_T_2885, _T_2886) @[el2_lsu_bus_buffer.scala 468:34] + node _T_2888 = eq(_T_2887, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 468:8] + node _T_2889 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 469:25] + node _T_2890 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 469:55] + node _T_2891 = and(_T_2889, _T_2890) @[el2_lsu_bus_buffer.scala 469:43] + node _T_2892 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 469:84] + node _T_2893 = and(_T_2891, _T_2892) @[el2_lsu_bus_buffer.scala 469:73] + node _T_2894 = eq(ibuf_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 469:103] + node _T_2895 = and(_T_2893, _T_2894) @[el2_lsu_bus_buffer.scala 469:92] + node _T_2896 = or(_T_2888, _T_2895) @[el2_lsu_bus_buffer.scala 468:61] + node _T_2897 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 470:19] + node _T_2898 = and(_T_2897, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 470:37] + node _T_2899 = eq(WrPtr1_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 470:65] + node _T_2900 = and(_T_2898, _T_2899) @[el2_lsu_bus_buffer.scala 470:54] + node _T_2901 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 470:84] + node _T_2902 = and(_T_2900, _T_2901) @[el2_lsu_bus_buffer.scala 470:73] + node _T_2903 = or(_T_2896, _T_2902) @[el2_lsu_bus_buffer.scala 469:112] + node _T_2904 = and(_T_2884, _T_2903) @[el2_lsu_bus_buffer.scala 467:114] + node _T_2905 = cat(_T_2904, _T_2882) @[Cat.scala 29:58] + node _T_2906 = cat(_T_2905, _T_2860) @[Cat.scala 29:58] + node _T_2907 = cat(_T_2906, _T_2838) @[Cat.scala 29:58] + node _T_2908 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 467:84] + node _T_2909 = and(_T_2908, buf_state_en[1]) @[el2_lsu_bus_buffer.scala 467:95] + node _T_2910 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 468:23] + node _T_2911 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 468:49] + node _T_2912 = or(_T_2910, _T_2911) @[el2_lsu_bus_buffer.scala 468:34] + node _T_2913 = eq(_T_2912, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 468:8] + node _T_2914 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 469:25] + node _T_2915 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 469:55] + node _T_2916 = and(_T_2914, _T_2915) @[el2_lsu_bus_buffer.scala 469:43] + node _T_2917 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 469:84] + node _T_2918 = and(_T_2916, _T_2917) @[el2_lsu_bus_buffer.scala 469:73] + node _T_2919 = eq(ibuf_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 469:103] + node _T_2920 = and(_T_2918, _T_2919) @[el2_lsu_bus_buffer.scala 469:92] + node _T_2921 = or(_T_2913, _T_2920) @[el2_lsu_bus_buffer.scala 468:61] + node _T_2922 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 470:19] + node _T_2923 = and(_T_2922, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 470:37] + node _T_2924 = eq(WrPtr1_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 470:65] + node _T_2925 = and(_T_2923, _T_2924) @[el2_lsu_bus_buffer.scala 470:54] + node _T_2926 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 470:84] + node _T_2927 = and(_T_2925, _T_2926) @[el2_lsu_bus_buffer.scala 470:73] + node _T_2928 = or(_T_2921, _T_2927) @[el2_lsu_bus_buffer.scala 469:112] + node _T_2929 = and(_T_2909, _T_2928) @[el2_lsu_bus_buffer.scala 467:114] + node _T_2930 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 467:84] + node _T_2931 = and(_T_2930, buf_state_en[1]) @[el2_lsu_bus_buffer.scala 467:95] + node _T_2932 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 468:23] + node _T_2933 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 468:49] + node _T_2934 = or(_T_2932, _T_2933) @[el2_lsu_bus_buffer.scala 468:34] + node _T_2935 = eq(_T_2934, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 468:8] + node _T_2936 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 469:25] + node _T_2937 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 469:55] + node _T_2938 = and(_T_2936, _T_2937) @[el2_lsu_bus_buffer.scala 469:43] + node _T_2939 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 469:84] + node _T_2940 = and(_T_2938, _T_2939) @[el2_lsu_bus_buffer.scala 469:73] + node _T_2941 = eq(ibuf_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 469:103] + node _T_2942 = and(_T_2940, _T_2941) @[el2_lsu_bus_buffer.scala 469:92] + node _T_2943 = or(_T_2935, _T_2942) @[el2_lsu_bus_buffer.scala 468:61] + node _T_2944 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 470:19] + node _T_2945 = and(_T_2944, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 470:37] + node _T_2946 = eq(WrPtr1_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 470:65] + node _T_2947 = and(_T_2945, _T_2946) @[el2_lsu_bus_buffer.scala 470:54] + node _T_2948 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 470:84] + node _T_2949 = and(_T_2947, _T_2948) @[el2_lsu_bus_buffer.scala 470:73] + node _T_2950 = or(_T_2943, _T_2949) @[el2_lsu_bus_buffer.scala 469:112] + node _T_2951 = and(_T_2931, _T_2950) @[el2_lsu_bus_buffer.scala 467:114] + node _T_2952 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 467:84] + node _T_2953 = and(_T_2952, buf_state_en[1]) @[el2_lsu_bus_buffer.scala 467:95] + node _T_2954 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 468:23] + node _T_2955 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 468:49] + node _T_2956 = or(_T_2954, _T_2955) @[el2_lsu_bus_buffer.scala 468:34] + node _T_2957 = eq(_T_2956, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 468:8] + node _T_2958 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 469:25] + node _T_2959 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 469:55] + node _T_2960 = and(_T_2958, _T_2959) @[el2_lsu_bus_buffer.scala 469:43] + node _T_2961 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 469:84] + node _T_2962 = and(_T_2960, _T_2961) @[el2_lsu_bus_buffer.scala 469:73] + node _T_2963 = eq(ibuf_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 469:103] + node _T_2964 = and(_T_2962, _T_2963) @[el2_lsu_bus_buffer.scala 469:92] + node _T_2965 = or(_T_2957, _T_2964) @[el2_lsu_bus_buffer.scala 468:61] + node _T_2966 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 470:19] + node _T_2967 = and(_T_2966, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 470:37] + node _T_2968 = eq(WrPtr1_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 470:65] + node _T_2969 = and(_T_2967, _T_2968) @[el2_lsu_bus_buffer.scala 470:54] + node _T_2970 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 470:84] + node _T_2971 = and(_T_2969, _T_2970) @[el2_lsu_bus_buffer.scala 470:73] + node _T_2972 = or(_T_2965, _T_2971) @[el2_lsu_bus_buffer.scala 469:112] + node _T_2973 = and(_T_2953, _T_2972) @[el2_lsu_bus_buffer.scala 467:114] + node _T_2974 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 467:84] + node _T_2975 = and(_T_2974, buf_state_en[1]) @[el2_lsu_bus_buffer.scala 467:95] + node _T_2976 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 468:23] + node _T_2977 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 468:49] + node _T_2978 = or(_T_2976, _T_2977) @[el2_lsu_bus_buffer.scala 468:34] + node _T_2979 = eq(_T_2978, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 468:8] + node _T_2980 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 469:25] + node _T_2981 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 469:55] + node _T_2982 = and(_T_2980, _T_2981) @[el2_lsu_bus_buffer.scala 469:43] + node _T_2983 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 469:84] + node _T_2984 = and(_T_2982, _T_2983) @[el2_lsu_bus_buffer.scala 469:73] + node _T_2985 = eq(ibuf_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 469:103] + node _T_2986 = and(_T_2984, _T_2985) @[el2_lsu_bus_buffer.scala 469:92] + node _T_2987 = or(_T_2979, _T_2986) @[el2_lsu_bus_buffer.scala 468:61] + node _T_2988 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 470:19] + node _T_2989 = and(_T_2988, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 470:37] + node _T_2990 = eq(WrPtr1_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 470:65] + node _T_2991 = and(_T_2989, _T_2990) @[el2_lsu_bus_buffer.scala 470:54] + node _T_2992 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 470:84] + node _T_2993 = and(_T_2991, _T_2992) @[el2_lsu_bus_buffer.scala 470:73] + node _T_2994 = or(_T_2987, _T_2993) @[el2_lsu_bus_buffer.scala 469:112] + node _T_2995 = and(_T_2975, _T_2994) @[el2_lsu_bus_buffer.scala 467:114] + node _T_2996 = cat(_T_2995, _T_2973) @[Cat.scala 29:58] + node _T_2997 = cat(_T_2996, _T_2951) @[Cat.scala 29:58] + node _T_2998 = cat(_T_2997, _T_2929) @[Cat.scala 29:58] + node _T_2999 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 467:84] + node _T_3000 = and(_T_2999, buf_state_en[2]) @[el2_lsu_bus_buffer.scala 467:95] + node _T_3001 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 468:23] + node _T_3002 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 468:49] + node _T_3003 = or(_T_3001, _T_3002) @[el2_lsu_bus_buffer.scala 468:34] + node _T_3004 = eq(_T_3003, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 468:8] + node _T_3005 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 469:25] + node _T_3006 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 469:55] + node _T_3007 = and(_T_3005, _T_3006) @[el2_lsu_bus_buffer.scala 469:43] + node _T_3008 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 469:84] + node _T_3009 = and(_T_3007, _T_3008) @[el2_lsu_bus_buffer.scala 469:73] + node _T_3010 = eq(ibuf_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 469:103] + node _T_3011 = and(_T_3009, _T_3010) @[el2_lsu_bus_buffer.scala 469:92] + node _T_3012 = or(_T_3004, _T_3011) @[el2_lsu_bus_buffer.scala 468:61] + node _T_3013 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 470:19] + node _T_3014 = and(_T_3013, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 470:37] + node _T_3015 = eq(WrPtr1_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 470:65] + node _T_3016 = and(_T_3014, _T_3015) @[el2_lsu_bus_buffer.scala 470:54] + node _T_3017 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 470:84] + node _T_3018 = and(_T_3016, _T_3017) @[el2_lsu_bus_buffer.scala 470:73] + node _T_3019 = or(_T_3012, _T_3018) @[el2_lsu_bus_buffer.scala 469:112] + node _T_3020 = and(_T_3000, _T_3019) @[el2_lsu_bus_buffer.scala 467:114] + node _T_3021 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 467:84] + node _T_3022 = and(_T_3021, buf_state_en[2]) @[el2_lsu_bus_buffer.scala 467:95] + node _T_3023 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 468:23] + node _T_3024 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 468:49] + node _T_3025 = or(_T_3023, _T_3024) @[el2_lsu_bus_buffer.scala 468:34] + node _T_3026 = eq(_T_3025, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 468:8] + node _T_3027 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 469:25] + node _T_3028 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 469:55] + node _T_3029 = and(_T_3027, _T_3028) @[el2_lsu_bus_buffer.scala 469:43] + node _T_3030 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 469:84] + node _T_3031 = and(_T_3029, _T_3030) @[el2_lsu_bus_buffer.scala 469:73] + node _T_3032 = eq(ibuf_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 469:103] + node _T_3033 = and(_T_3031, _T_3032) @[el2_lsu_bus_buffer.scala 469:92] + node _T_3034 = or(_T_3026, _T_3033) @[el2_lsu_bus_buffer.scala 468:61] + node _T_3035 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 470:19] + node _T_3036 = and(_T_3035, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 470:37] + node _T_3037 = eq(WrPtr1_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 470:65] + node _T_3038 = and(_T_3036, _T_3037) @[el2_lsu_bus_buffer.scala 470:54] + node _T_3039 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 470:84] + node _T_3040 = and(_T_3038, _T_3039) @[el2_lsu_bus_buffer.scala 470:73] + node _T_3041 = or(_T_3034, _T_3040) @[el2_lsu_bus_buffer.scala 469:112] + node _T_3042 = and(_T_3022, _T_3041) @[el2_lsu_bus_buffer.scala 467:114] + node _T_3043 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 467:84] + node _T_3044 = and(_T_3043, buf_state_en[2]) @[el2_lsu_bus_buffer.scala 467:95] + node _T_3045 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 468:23] + node _T_3046 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 468:49] + node _T_3047 = or(_T_3045, _T_3046) @[el2_lsu_bus_buffer.scala 468:34] + node _T_3048 = eq(_T_3047, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 468:8] + node _T_3049 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 469:25] + node _T_3050 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 469:55] + node _T_3051 = and(_T_3049, _T_3050) @[el2_lsu_bus_buffer.scala 469:43] + node _T_3052 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 469:84] + node _T_3053 = and(_T_3051, _T_3052) @[el2_lsu_bus_buffer.scala 469:73] + node _T_3054 = eq(ibuf_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 469:103] + node _T_3055 = and(_T_3053, _T_3054) @[el2_lsu_bus_buffer.scala 469:92] + node _T_3056 = or(_T_3048, _T_3055) @[el2_lsu_bus_buffer.scala 468:61] + node _T_3057 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 470:19] + node _T_3058 = and(_T_3057, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 470:37] + node _T_3059 = eq(WrPtr1_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 470:65] + node _T_3060 = and(_T_3058, _T_3059) @[el2_lsu_bus_buffer.scala 470:54] + node _T_3061 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 470:84] + node _T_3062 = and(_T_3060, _T_3061) @[el2_lsu_bus_buffer.scala 470:73] + node _T_3063 = or(_T_3056, _T_3062) @[el2_lsu_bus_buffer.scala 469:112] + node _T_3064 = and(_T_3044, _T_3063) @[el2_lsu_bus_buffer.scala 467:114] + node _T_3065 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 467:84] + node _T_3066 = and(_T_3065, buf_state_en[2]) @[el2_lsu_bus_buffer.scala 467:95] + node _T_3067 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 468:23] + node _T_3068 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 468:49] + node _T_3069 = or(_T_3067, _T_3068) @[el2_lsu_bus_buffer.scala 468:34] + node _T_3070 = eq(_T_3069, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 468:8] + node _T_3071 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 469:25] + node _T_3072 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 469:55] + node _T_3073 = and(_T_3071, _T_3072) @[el2_lsu_bus_buffer.scala 469:43] + node _T_3074 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 469:84] + node _T_3075 = and(_T_3073, _T_3074) @[el2_lsu_bus_buffer.scala 469:73] + node _T_3076 = eq(ibuf_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 469:103] + node _T_3077 = and(_T_3075, _T_3076) @[el2_lsu_bus_buffer.scala 469:92] + node _T_3078 = or(_T_3070, _T_3077) @[el2_lsu_bus_buffer.scala 468:61] + node _T_3079 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 470:19] + node _T_3080 = and(_T_3079, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 470:37] + node _T_3081 = eq(WrPtr1_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 470:65] + node _T_3082 = and(_T_3080, _T_3081) @[el2_lsu_bus_buffer.scala 470:54] + node _T_3083 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 470:84] + node _T_3084 = and(_T_3082, _T_3083) @[el2_lsu_bus_buffer.scala 470:73] + node _T_3085 = or(_T_3078, _T_3084) @[el2_lsu_bus_buffer.scala 469:112] + node _T_3086 = and(_T_3066, _T_3085) @[el2_lsu_bus_buffer.scala 467:114] + node _T_3087 = cat(_T_3086, _T_3064) @[Cat.scala 29:58] + node _T_3088 = cat(_T_3087, _T_3042) @[Cat.scala 29:58] + node _T_3089 = cat(_T_3088, _T_3020) @[Cat.scala 29:58] + node _T_3090 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 467:84] + node _T_3091 = and(_T_3090, buf_state_en[3]) @[el2_lsu_bus_buffer.scala 467:95] + node _T_3092 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 468:23] + node _T_3093 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 468:49] + node _T_3094 = or(_T_3092, _T_3093) @[el2_lsu_bus_buffer.scala 468:34] + node _T_3095 = eq(_T_3094, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 468:8] + node _T_3096 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 469:25] + node _T_3097 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 469:55] + node _T_3098 = and(_T_3096, _T_3097) @[el2_lsu_bus_buffer.scala 469:43] + node _T_3099 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 469:84] + node _T_3100 = and(_T_3098, _T_3099) @[el2_lsu_bus_buffer.scala 469:73] + node _T_3101 = eq(ibuf_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 469:103] + node _T_3102 = and(_T_3100, _T_3101) @[el2_lsu_bus_buffer.scala 469:92] + node _T_3103 = or(_T_3095, _T_3102) @[el2_lsu_bus_buffer.scala 468:61] + node _T_3104 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 470:19] + node _T_3105 = and(_T_3104, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 470:37] + node _T_3106 = eq(WrPtr1_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 470:65] + node _T_3107 = and(_T_3105, _T_3106) @[el2_lsu_bus_buffer.scala 470:54] + node _T_3108 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 470:84] + node _T_3109 = and(_T_3107, _T_3108) @[el2_lsu_bus_buffer.scala 470:73] + node _T_3110 = or(_T_3103, _T_3109) @[el2_lsu_bus_buffer.scala 469:112] + node _T_3111 = and(_T_3091, _T_3110) @[el2_lsu_bus_buffer.scala 467:114] + node _T_3112 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 467:84] + node _T_3113 = and(_T_3112, buf_state_en[3]) @[el2_lsu_bus_buffer.scala 467:95] + node _T_3114 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 468:23] + node _T_3115 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 468:49] + node _T_3116 = or(_T_3114, _T_3115) @[el2_lsu_bus_buffer.scala 468:34] + node _T_3117 = eq(_T_3116, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 468:8] + node _T_3118 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 469:25] + node _T_3119 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 469:55] + node _T_3120 = and(_T_3118, _T_3119) @[el2_lsu_bus_buffer.scala 469:43] + node _T_3121 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 469:84] + node _T_3122 = and(_T_3120, _T_3121) @[el2_lsu_bus_buffer.scala 469:73] + node _T_3123 = eq(ibuf_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 469:103] + node _T_3124 = and(_T_3122, _T_3123) @[el2_lsu_bus_buffer.scala 469:92] + node _T_3125 = or(_T_3117, _T_3124) @[el2_lsu_bus_buffer.scala 468:61] + node _T_3126 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 470:19] + node _T_3127 = and(_T_3126, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 470:37] + node _T_3128 = eq(WrPtr1_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 470:65] + node _T_3129 = and(_T_3127, _T_3128) @[el2_lsu_bus_buffer.scala 470:54] + node _T_3130 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 470:84] + node _T_3131 = and(_T_3129, _T_3130) @[el2_lsu_bus_buffer.scala 470:73] + node _T_3132 = or(_T_3125, _T_3131) @[el2_lsu_bus_buffer.scala 469:112] + node _T_3133 = and(_T_3113, _T_3132) @[el2_lsu_bus_buffer.scala 467:114] + node _T_3134 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 467:84] + node _T_3135 = and(_T_3134, buf_state_en[3]) @[el2_lsu_bus_buffer.scala 467:95] + node _T_3136 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 468:23] + node _T_3137 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 468:49] + node _T_3138 = or(_T_3136, _T_3137) @[el2_lsu_bus_buffer.scala 468:34] + node _T_3139 = eq(_T_3138, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 468:8] + node _T_3140 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 469:25] + node _T_3141 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 469:55] + node _T_3142 = and(_T_3140, _T_3141) @[el2_lsu_bus_buffer.scala 469:43] + node _T_3143 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 469:84] + node _T_3144 = and(_T_3142, _T_3143) @[el2_lsu_bus_buffer.scala 469:73] + node _T_3145 = eq(ibuf_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 469:103] + node _T_3146 = and(_T_3144, _T_3145) @[el2_lsu_bus_buffer.scala 469:92] + node _T_3147 = or(_T_3139, _T_3146) @[el2_lsu_bus_buffer.scala 468:61] + node _T_3148 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 470:19] + node _T_3149 = and(_T_3148, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 470:37] + node _T_3150 = eq(WrPtr1_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 470:65] + node _T_3151 = and(_T_3149, _T_3150) @[el2_lsu_bus_buffer.scala 470:54] + node _T_3152 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 470:84] + node _T_3153 = and(_T_3151, _T_3152) @[el2_lsu_bus_buffer.scala 470:73] + node _T_3154 = or(_T_3147, _T_3153) @[el2_lsu_bus_buffer.scala 469:112] + node _T_3155 = and(_T_3135, _T_3154) @[el2_lsu_bus_buffer.scala 467:114] + node _T_3156 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 467:84] + node _T_3157 = and(_T_3156, buf_state_en[3]) @[el2_lsu_bus_buffer.scala 467:95] + node _T_3158 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 468:23] + node _T_3159 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 468:49] + node _T_3160 = or(_T_3158, _T_3159) @[el2_lsu_bus_buffer.scala 468:34] + node _T_3161 = eq(_T_3160, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 468:8] + node _T_3162 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 469:25] + node _T_3163 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 469:55] + node _T_3164 = and(_T_3162, _T_3163) @[el2_lsu_bus_buffer.scala 469:43] + node _T_3165 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 469:84] + node _T_3166 = and(_T_3164, _T_3165) @[el2_lsu_bus_buffer.scala 469:73] + node _T_3167 = eq(ibuf_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 469:103] + node _T_3168 = and(_T_3166, _T_3167) @[el2_lsu_bus_buffer.scala 469:92] + node _T_3169 = or(_T_3161, _T_3168) @[el2_lsu_bus_buffer.scala 468:61] + node _T_3170 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 470:19] + node _T_3171 = and(_T_3170, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 470:37] + node _T_3172 = eq(WrPtr1_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 470:65] + node _T_3173 = and(_T_3171, _T_3172) @[el2_lsu_bus_buffer.scala 470:54] + node _T_3174 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 470:84] + node _T_3175 = and(_T_3173, _T_3174) @[el2_lsu_bus_buffer.scala 470:73] + node _T_3176 = or(_T_3169, _T_3175) @[el2_lsu_bus_buffer.scala 469:112] + node _T_3177 = and(_T_3157, _T_3176) @[el2_lsu_bus_buffer.scala 467:114] + node _T_3178 = cat(_T_3177, _T_3155) @[Cat.scala 29:58] + node _T_3179 = cat(_T_3178, _T_3133) @[Cat.scala 29:58] + node _T_3180 = cat(_T_3179, _T_3111) @[Cat.scala 29:58] + buf_rspage_set[0] <= _T_2907 @[el2_lsu_bus_buffer.scala 467:20] + buf_rspage_set[1] <= _T_2998 @[el2_lsu_bus_buffer.scala 467:20] + buf_rspage_set[2] <= _T_3089 @[el2_lsu_bus_buffer.scala 467:20] + buf_rspage_set[3] <= _T_3180 @[el2_lsu_bus_buffer.scala 467:20] + node _T_3181 = bits(buf_rspage_set[0], 0, 0) @[el2_lsu_bus_buffer.scala 471:86] + node _T_3182 = bits(buf_rspage[0], 0, 0) @[el2_lsu_bus_buffer.scala 471:105] + node _T_3183 = or(_T_3181, _T_3182) @[el2_lsu_bus_buffer.scala 471:90] + node _T_3184 = bits(buf_rspage_set[0], 1, 1) @[el2_lsu_bus_buffer.scala 471:86] + node _T_3185 = bits(buf_rspage[0], 1, 1) @[el2_lsu_bus_buffer.scala 471:105] + node _T_3186 = or(_T_3184, _T_3185) @[el2_lsu_bus_buffer.scala 471:90] + node _T_3187 = bits(buf_rspage_set[0], 2, 2) @[el2_lsu_bus_buffer.scala 471:86] + node _T_3188 = bits(buf_rspage[0], 2, 2) @[el2_lsu_bus_buffer.scala 471:105] + node _T_3189 = or(_T_3187, _T_3188) @[el2_lsu_bus_buffer.scala 471:90] + node _T_3190 = bits(buf_rspage_set[0], 3, 3) @[el2_lsu_bus_buffer.scala 471:86] + node _T_3191 = bits(buf_rspage[0], 3, 3) @[el2_lsu_bus_buffer.scala 471:105] + node _T_3192 = or(_T_3190, _T_3191) @[el2_lsu_bus_buffer.scala 471:90] + node _T_3193 = cat(_T_3192, _T_3189) @[Cat.scala 29:58] + node _T_3194 = cat(_T_3193, _T_3186) @[Cat.scala 29:58] + node _T_3195 = cat(_T_3194, _T_3183) @[Cat.scala 29:58] + node _T_3196 = bits(buf_rspage_set[1], 0, 0) @[el2_lsu_bus_buffer.scala 471:86] + node _T_3197 = bits(buf_rspage[1], 0, 0) @[el2_lsu_bus_buffer.scala 471:105] + node _T_3198 = or(_T_3196, _T_3197) @[el2_lsu_bus_buffer.scala 471:90] + node _T_3199 = bits(buf_rspage_set[1], 1, 1) @[el2_lsu_bus_buffer.scala 471:86] + node _T_3200 = bits(buf_rspage[1], 1, 1) @[el2_lsu_bus_buffer.scala 471:105] + node _T_3201 = or(_T_3199, _T_3200) @[el2_lsu_bus_buffer.scala 471:90] + node _T_3202 = bits(buf_rspage_set[1], 2, 2) @[el2_lsu_bus_buffer.scala 471:86] + node _T_3203 = bits(buf_rspage[1], 2, 2) @[el2_lsu_bus_buffer.scala 471:105] + node _T_3204 = or(_T_3202, _T_3203) @[el2_lsu_bus_buffer.scala 471:90] + node _T_3205 = bits(buf_rspage_set[1], 3, 3) @[el2_lsu_bus_buffer.scala 471:86] + node _T_3206 = bits(buf_rspage[1], 3, 3) @[el2_lsu_bus_buffer.scala 471:105] + node _T_3207 = or(_T_3205, _T_3206) @[el2_lsu_bus_buffer.scala 471:90] + node _T_3208 = cat(_T_3207, _T_3204) @[Cat.scala 29:58] + node _T_3209 = cat(_T_3208, _T_3201) @[Cat.scala 29:58] + node _T_3210 = cat(_T_3209, _T_3198) @[Cat.scala 29:58] + node _T_3211 = bits(buf_rspage_set[2], 0, 0) @[el2_lsu_bus_buffer.scala 471:86] + node _T_3212 = bits(buf_rspage[2], 0, 0) @[el2_lsu_bus_buffer.scala 471:105] + node _T_3213 = or(_T_3211, _T_3212) @[el2_lsu_bus_buffer.scala 471:90] + node _T_3214 = bits(buf_rspage_set[2], 1, 1) @[el2_lsu_bus_buffer.scala 471:86] + node _T_3215 = bits(buf_rspage[2], 1, 1) @[el2_lsu_bus_buffer.scala 471:105] + node _T_3216 = or(_T_3214, _T_3215) @[el2_lsu_bus_buffer.scala 471:90] + node _T_3217 = bits(buf_rspage_set[2], 2, 2) @[el2_lsu_bus_buffer.scala 471:86] + node _T_3218 = bits(buf_rspage[2], 2, 2) @[el2_lsu_bus_buffer.scala 471:105] + node _T_3219 = or(_T_3217, _T_3218) @[el2_lsu_bus_buffer.scala 471:90] + node _T_3220 = bits(buf_rspage_set[2], 3, 3) @[el2_lsu_bus_buffer.scala 471:86] + node _T_3221 = bits(buf_rspage[2], 3, 3) @[el2_lsu_bus_buffer.scala 471:105] + node _T_3222 = or(_T_3220, _T_3221) @[el2_lsu_bus_buffer.scala 471:90] + node _T_3223 = cat(_T_3222, _T_3219) @[Cat.scala 29:58] + node _T_3224 = cat(_T_3223, _T_3216) @[Cat.scala 29:58] + node _T_3225 = cat(_T_3224, _T_3213) @[Cat.scala 29:58] + node _T_3226 = bits(buf_rspage_set[3], 0, 0) @[el2_lsu_bus_buffer.scala 471:86] + node _T_3227 = bits(buf_rspage[3], 0, 0) @[el2_lsu_bus_buffer.scala 471:105] + node _T_3228 = or(_T_3226, _T_3227) @[el2_lsu_bus_buffer.scala 471:90] + node _T_3229 = bits(buf_rspage_set[3], 1, 1) @[el2_lsu_bus_buffer.scala 471:86] + node _T_3230 = bits(buf_rspage[3], 1, 1) @[el2_lsu_bus_buffer.scala 471:105] + node _T_3231 = or(_T_3229, _T_3230) @[el2_lsu_bus_buffer.scala 471:90] + node _T_3232 = bits(buf_rspage_set[3], 2, 2) @[el2_lsu_bus_buffer.scala 471:86] + node _T_3233 = bits(buf_rspage[3], 2, 2) @[el2_lsu_bus_buffer.scala 471:105] + node _T_3234 = or(_T_3232, _T_3233) @[el2_lsu_bus_buffer.scala 471:90] + node _T_3235 = bits(buf_rspage_set[3], 3, 3) @[el2_lsu_bus_buffer.scala 471:86] + node _T_3236 = bits(buf_rspage[3], 3, 3) @[el2_lsu_bus_buffer.scala 471:105] + node _T_3237 = or(_T_3235, _T_3236) @[el2_lsu_bus_buffer.scala 471:90] + node _T_3238 = cat(_T_3237, _T_3234) @[Cat.scala 29:58] + node _T_3239 = cat(_T_3238, _T_3231) @[Cat.scala 29:58] + node _T_3240 = cat(_T_3239, _T_3228) @[Cat.scala 29:58] + buf_rspage_in[0] <= _T_3195 @[el2_lsu_bus_buffer.scala 471:19] + buf_rspage_in[1] <= _T_3210 @[el2_lsu_bus_buffer.scala 471:19] + buf_rspage_in[2] <= _T_3225 @[el2_lsu_bus_buffer.scala 471:19] + buf_rspage_in[3] <= _T_3240 @[el2_lsu_bus_buffer.scala 471:19] + node _T_3241 = bits(buf_rspageQ[0], 0, 0) @[el2_lsu_bus_buffer.scala 472:80] + node _T_3242 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 472:101] + node _T_3243 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 472:127] + node _T_3244 = or(_T_3242, _T_3243) @[el2_lsu_bus_buffer.scala 472:112] + node _T_3245 = eq(_T_3244, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 472:86] + node _T_3246 = and(_T_3241, _T_3245) @[el2_lsu_bus_buffer.scala 472:84] + node _T_3247 = bits(buf_rspageQ[0], 1, 1) @[el2_lsu_bus_buffer.scala 472:80] + node _T_3248 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 472:101] + node _T_3249 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 472:127] + node _T_3250 = or(_T_3248, _T_3249) @[el2_lsu_bus_buffer.scala 472:112] + node _T_3251 = eq(_T_3250, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 472:86] + node _T_3252 = and(_T_3247, _T_3251) @[el2_lsu_bus_buffer.scala 472:84] + node _T_3253 = bits(buf_rspageQ[0], 2, 2) @[el2_lsu_bus_buffer.scala 472:80] + node _T_3254 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 472:101] + node _T_3255 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 472:127] + node _T_3256 = or(_T_3254, _T_3255) @[el2_lsu_bus_buffer.scala 472:112] + node _T_3257 = eq(_T_3256, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 472:86] + node _T_3258 = and(_T_3253, _T_3257) @[el2_lsu_bus_buffer.scala 472:84] + node _T_3259 = bits(buf_rspageQ[0], 3, 3) @[el2_lsu_bus_buffer.scala 472:80] + node _T_3260 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 472:101] + node _T_3261 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 472:127] + node _T_3262 = or(_T_3260, _T_3261) @[el2_lsu_bus_buffer.scala 472:112] + node _T_3263 = eq(_T_3262, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 472:86] + node _T_3264 = and(_T_3259, _T_3263) @[el2_lsu_bus_buffer.scala 472:84] + node _T_3265 = cat(_T_3264, _T_3258) @[Cat.scala 29:58] + node _T_3266 = cat(_T_3265, _T_3252) @[Cat.scala 29:58] + node _T_3267 = cat(_T_3266, _T_3246) @[Cat.scala 29:58] + node _T_3268 = bits(buf_rspageQ[1], 0, 0) @[el2_lsu_bus_buffer.scala 472:80] + node _T_3269 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 472:101] + node _T_3270 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 472:127] + node _T_3271 = or(_T_3269, _T_3270) @[el2_lsu_bus_buffer.scala 472:112] + node _T_3272 = eq(_T_3271, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 472:86] + node _T_3273 = and(_T_3268, _T_3272) @[el2_lsu_bus_buffer.scala 472:84] + node _T_3274 = bits(buf_rspageQ[1], 1, 1) @[el2_lsu_bus_buffer.scala 472:80] + node _T_3275 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 472:101] + node _T_3276 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 472:127] + node _T_3277 = or(_T_3275, _T_3276) @[el2_lsu_bus_buffer.scala 472:112] + node _T_3278 = eq(_T_3277, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 472:86] + node _T_3279 = and(_T_3274, _T_3278) @[el2_lsu_bus_buffer.scala 472:84] + node _T_3280 = bits(buf_rspageQ[1], 2, 2) @[el2_lsu_bus_buffer.scala 472:80] + node _T_3281 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 472:101] + node _T_3282 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 472:127] + node _T_3283 = or(_T_3281, _T_3282) @[el2_lsu_bus_buffer.scala 472:112] + node _T_3284 = eq(_T_3283, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 472:86] + node _T_3285 = and(_T_3280, _T_3284) @[el2_lsu_bus_buffer.scala 472:84] + node _T_3286 = bits(buf_rspageQ[1], 3, 3) @[el2_lsu_bus_buffer.scala 472:80] + node _T_3287 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 472:101] + node _T_3288 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 472:127] + node _T_3289 = or(_T_3287, _T_3288) @[el2_lsu_bus_buffer.scala 472:112] + node _T_3290 = eq(_T_3289, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 472:86] + node _T_3291 = and(_T_3286, _T_3290) @[el2_lsu_bus_buffer.scala 472:84] + node _T_3292 = cat(_T_3291, _T_3285) @[Cat.scala 29:58] + node _T_3293 = cat(_T_3292, _T_3279) @[Cat.scala 29:58] + node _T_3294 = cat(_T_3293, _T_3273) @[Cat.scala 29:58] + node _T_3295 = bits(buf_rspageQ[2], 0, 0) @[el2_lsu_bus_buffer.scala 472:80] + node _T_3296 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 472:101] + node _T_3297 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 472:127] + node _T_3298 = or(_T_3296, _T_3297) @[el2_lsu_bus_buffer.scala 472:112] + node _T_3299 = eq(_T_3298, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 472:86] + node _T_3300 = and(_T_3295, _T_3299) @[el2_lsu_bus_buffer.scala 472:84] + node _T_3301 = bits(buf_rspageQ[2], 1, 1) @[el2_lsu_bus_buffer.scala 472:80] + node _T_3302 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 472:101] + node _T_3303 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 472:127] + node _T_3304 = or(_T_3302, _T_3303) @[el2_lsu_bus_buffer.scala 472:112] + node _T_3305 = eq(_T_3304, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 472:86] + node _T_3306 = and(_T_3301, _T_3305) @[el2_lsu_bus_buffer.scala 472:84] + node _T_3307 = bits(buf_rspageQ[2], 2, 2) @[el2_lsu_bus_buffer.scala 472:80] + node _T_3308 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 472:101] + node _T_3309 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 472:127] + node _T_3310 = or(_T_3308, _T_3309) @[el2_lsu_bus_buffer.scala 472:112] + node _T_3311 = eq(_T_3310, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 472:86] + node _T_3312 = and(_T_3307, _T_3311) @[el2_lsu_bus_buffer.scala 472:84] + node _T_3313 = bits(buf_rspageQ[2], 3, 3) @[el2_lsu_bus_buffer.scala 472:80] + node _T_3314 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 472:101] + node _T_3315 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 472:127] + node _T_3316 = or(_T_3314, _T_3315) @[el2_lsu_bus_buffer.scala 472:112] + node _T_3317 = eq(_T_3316, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 472:86] + node _T_3318 = and(_T_3313, _T_3317) @[el2_lsu_bus_buffer.scala 472:84] + node _T_3319 = cat(_T_3318, _T_3312) @[Cat.scala 29:58] + node _T_3320 = cat(_T_3319, _T_3306) @[Cat.scala 29:58] + node _T_3321 = cat(_T_3320, _T_3300) @[Cat.scala 29:58] + node _T_3322 = bits(buf_rspageQ[3], 0, 0) @[el2_lsu_bus_buffer.scala 472:80] + node _T_3323 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 472:101] + node _T_3324 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 472:127] + node _T_3325 = or(_T_3323, _T_3324) @[el2_lsu_bus_buffer.scala 472:112] + node _T_3326 = eq(_T_3325, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 472:86] + node _T_3327 = and(_T_3322, _T_3326) @[el2_lsu_bus_buffer.scala 472:84] + node _T_3328 = bits(buf_rspageQ[3], 1, 1) @[el2_lsu_bus_buffer.scala 472:80] + node _T_3329 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 472:101] + node _T_3330 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 472:127] + node _T_3331 = or(_T_3329, _T_3330) @[el2_lsu_bus_buffer.scala 472:112] + node _T_3332 = eq(_T_3331, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 472:86] + node _T_3333 = and(_T_3328, _T_3332) @[el2_lsu_bus_buffer.scala 472:84] + node _T_3334 = bits(buf_rspageQ[3], 2, 2) @[el2_lsu_bus_buffer.scala 472:80] + node _T_3335 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 472:101] + node _T_3336 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 472:127] + node _T_3337 = or(_T_3335, _T_3336) @[el2_lsu_bus_buffer.scala 472:112] + node _T_3338 = eq(_T_3337, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 472:86] + node _T_3339 = and(_T_3334, _T_3338) @[el2_lsu_bus_buffer.scala 472:84] + node _T_3340 = bits(buf_rspageQ[3], 3, 3) @[el2_lsu_bus_buffer.scala 472:80] + node _T_3341 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 472:101] + node _T_3342 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 472:127] + node _T_3343 = or(_T_3341, _T_3342) @[el2_lsu_bus_buffer.scala 472:112] + node _T_3344 = eq(_T_3343, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 472:86] + node _T_3345 = and(_T_3340, _T_3344) @[el2_lsu_bus_buffer.scala 472:84] + node _T_3346 = cat(_T_3345, _T_3339) @[Cat.scala 29:58] + node _T_3347 = cat(_T_3346, _T_3333) @[Cat.scala 29:58] + node _T_3348 = cat(_T_3347, _T_3327) @[Cat.scala 29:58] + buf_rspage[0] <= _T_3267 @[el2_lsu_bus_buffer.scala 472:16] + buf_rspage[1] <= _T_3294 @[el2_lsu_bus_buffer.scala 472:16] + buf_rspage[2] <= _T_3321 @[el2_lsu_bus_buffer.scala 472:16] + buf_rspage[3] <= _T_3348 @[el2_lsu_bus_buffer.scala 472:16] + node _T_3349 = eq(ibuf_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 477:77] + node _T_3350 = and(ibuf_drain_vld, _T_3349) @[el2_lsu_bus_buffer.scala 477:65] + node _T_3351 = eq(ibuf_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 477:77] + node _T_3352 = and(ibuf_drain_vld, _T_3351) @[el2_lsu_bus_buffer.scala 477:65] + node _T_3353 = eq(ibuf_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 477:77] + node _T_3354 = and(ibuf_drain_vld, _T_3353) @[el2_lsu_bus_buffer.scala 477:65] + node _T_3355 = eq(ibuf_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 477:77] + node _T_3356 = and(ibuf_drain_vld, _T_3355) @[el2_lsu_bus_buffer.scala 477:65] + node _T_3357 = cat(_T_3356, _T_3354) @[Cat.scala 29:58] + node _T_3358 = cat(_T_3357, _T_3352) @[Cat.scala 29:58] + node _T_3359 = cat(_T_3358, _T_3350) @[Cat.scala 29:58] + ibuf_drainvec_vld <= _T_3359 @[el2_lsu_bus_buffer.scala 477:23] + node _T_3360 = bits(ibuf_drainvec_vld, 0, 0) @[el2_lsu_bus_buffer.scala 478:66] + node _T_3361 = bits(ibuf_byteen_out, 3, 0) @[el2_lsu_bus_buffer.scala 478:86] + node _T_3362 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 479:20] + node _T_3363 = eq(WrPtr1_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 479:48] + node _T_3364 = and(_T_3362, _T_3363) @[el2_lsu_bus_buffer.scala 479:37] + node _T_3365 = bits(ldst_byteen_hi_r, 3, 0) @[el2_lsu_bus_buffer.scala 479:73] + node _T_3366 = bits(ldst_byteen_lo_r, 3, 0) @[el2_lsu_bus_buffer.scala 479:96] + node _T_3367 = mux(_T_3364, _T_3365, _T_3366) @[el2_lsu_bus_buffer.scala 479:10] + node _T_3368 = mux(_T_3360, _T_3361, _T_3367) @[el2_lsu_bus_buffer.scala 478:48] + node _T_3369 = bits(ibuf_drainvec_vld, 1, 1) @[el2_lsu_bus_buffer.scala 478:66] + node _T_3370 = bits(ibuf_byteen_out, 3, 0) @[el2_lsu_bus_buffer.scala 478:86] + node _T_3371 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 479:20] + node _T_3372 = eq(WrPtr1_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 479:48] + node _T_3373 = and(_T_3371, _T_3372) @[el2_lsu_bus_buffer.scala 479:37] + node _T_3374 = bits(ldst_byteen_hi_r, 3, 0) @[el2_lsu_bus_buffer.scala 479:73] + node _T_3375 = bits(ldst_byteen_lo_r, 3, 0) @[el2_lsu_bus_buffer.scala 479:96] + node _T_3376 = mux(_T_3373, _T_3374, _T_3375) @[el2_lsu_bus_buffer.scala 479:10] + node _T_3377 = mux(_T_3369, _T_3370, _T_3376) @[el2_lsu_bus_buffer.scala 478:48] + node _T_3378 = bits(ibuf_drainvec_vld, 2, 2) @[el2_lsu_bus_buffer.scala 478:66] + node _T_3379 = bits(ibuf_byteen_out, 3, 0) @[el2_lsu_bus_buffer.scala 478:86] + node _T_3380 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 479:20] + node _T_3381 = eq(WrPtr1_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 479:48] + node _T_3382 = and(_T_3380, _T_3381) @[el2_lsu_bus_buffer.scala 479:37] + node _T_3383 = bits(ldst_byteen_hi_r, 3, 0) @[el2_lsu_bus_buffer.scala 479:73] + node _T_3384 = bits(ldst_byteen_lo_r, 3, 0) @[el2_lsu_bus_buffer.scala 479:96] + node _T_3385 = mux(_T_3382, _T_3383, _T_3384) @[el2_lsu_bus_buffer.scala 479:10] + node _T_3386 = mux(_T_3378, _T_3379, _T_3385) @[el2_lsu_bus_buffer.scala 478:48] + node _T_3387 = bits(ibuf_drainvec_vld, 3, 3) @[el2_lsu_bus_buffer.scala 478:66] + node _T_3388 = bits(ibuf_byteen_out, 3, 0) @[el2_lsu_bus_buffer.scala 478:86] + node _T_3389 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 479:20] + node _T_3390 = eq(WrPtr1_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 479:48] + node _T_3391 = and(_T_3389, _T_3390) @[el2_lsu_bus_buffer.scala 479:37] + node _T_3392 = bits(ldst_byteen_hi_r, 3, 0) @[el2_lsu_bus_buffer.scala 479:73] + node _T_3393 = bits(ldst_byteen_lo_r, 3, 0) @[el2_lsu_bus_buffer.scala 479:96] + node _T_3394 = mux(_T_3391, _T_3392, _T_3393) @[el2_lsu_bus_buffer.scala 479:10] + node _T_3395 = mux(_T_3387, _T_3388, _T_3394) @[el2_lsu_bus_buffer.scala 478:48] + buf_byteen_in[0] <= _T_3368 @[el2_lsu_bus_buffer.scala 478:19] + buf_byteen_in[1] <= _T_3377 @[el2_lsu_bus_buffer.scala 478:19] + buf_byteen_in[2] <= _T_3386 @[el2_lsu_bus_buffer.scala 478:19] + buf_byteen_in[3] <= _T_3395 @[el2_lsu_bus_buffer.scala 478:19] + node _T_3396 = bits(ibuf_drainvec_vld, 0, 0) @[el2_lsu_bus_buffer.scala 480:64] + node _T_3397 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 480:93] + node _T_3398 = eq(WrPtr1_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 480:121] + node _T_3399 = and(_T_3397, _T_3398) @[el2_lsu_bus_buffer.scala 480:110] + node _T_3400 = mux(_T_3399, io.end_addr_r, io.lsu_addr_r) @[el2_lsu_bus_buffer.scala 480:83] + node _T_3401 = mux(_T_3396, ibuf_addr, _T_3400) @[el2_lsu_bus_buffer.scala 480:46] + node _T_3402 = bits(ibuf_drainvec_vld, 1, 1) @[el2_lsu_bus_buffer.scala 480:64] + node _T_3403 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 480:93] + node _T_3404 = eq(WrPtr1_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 480:121] + node _T_3405 = and(_T_3403, _T_3404) @[el2_lsu_bus_buffer.scala 480:110] + node _T_3406 = mux(_T_3405, io.end_addr_r, io.lsu_addr_r) @[el2_lsu_bus_buffer.scala 480:83] + node _T_3407 = mux(_T_3402, ibuf_addr, _T_3406) @[el2_lsu_bus_buffer.scala 480:46] + node _T_3408 = bits(ibuf_drainvec_vld, 2, 2) @[el2_lsu_bus_buffer.scala 480:64] + node _T_3409 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 480:93] + node _T_3410 = eq(WrPtr1_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 480:121] + node _T_3411 = and(_T_3409, _T_3410) @[el2_lsu_bus_buffer.scala 480:110] + node _T_3412 = mux(_T_3411, io.end_addr_r, io.lsu_addr_r) @[el2_lsu_bus_buffer.scala 480:83] + node _T_3413 = mux(_T_3408, ibuf_addr, _T_3412) @[el2_lsu_bus_buffer.scala 480:46] + node _T_3414 = bits(ibuf_drainvec_vld, 3, 3) @[el2_lsu_bus_buffer.scala 480:64] + node _T_3415 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 480:93] + node _T_3416 = eq(WrPtr1_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 480:121] + node _T_3417 = and(_T_3415, _T_3416) @[el2_lsu_bus_buffer.scala 480:110] + node _T_3418 = mux(_T_3417, io.end_addr_r, io.lsu_addr_r) @[el2_lsu_bus_buffer.scala 480:83] + node _T_3419 = mux(_T_3414, ibuf_addr, _T_3418) @[el2_lsu_bus_buffer.scala 480:46] + buf_addr_in[0] <= _T_3401 @[el2_lsu_bus_buffer.scala 480:17] + buf_addr_in[1] <= _T_3407 @[el2_lsu_bus_buffer.scala 480:17] + buf_addr_in[2] <= _T_3413 @[el2_lsu_bus_buffer.scala 480:17] + buf_addr_in[3] <= _T_3419 @[el2_lsu_bus_buffer.scala 480:17] + node _T_3420 = bits(ibuf_drainvec_vld, 0, 0) @[el2_lsu_bus_buffer.scala 481:65] + node _T_3421 = mux(_T_3420, ibuf_dual, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 481:47] + node _T_3422 = bits(ibuf_drainvec_vld, 1, 1) @[el2_lsu_bus_buffer.scala 481:65] + node _T_3423 = mux(_T_3422, ibuf_dual, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 481:47] + node _T_3424 = bits(ibuf_drainvec_vld, 2, 2) @[el2_lsu_bus_buffer.scala 481:65] + node _T_3425 = mux(_T_3424, ibuf_dual, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 481:47] + node _T_3426 = bits(ibuf_drainvec_vld, 3, 3) @[el2_lsu_bus_buffer.scala 481:65] + node _T_3427 = mux(_T_3426, ibuf_dual, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 481:47] + node _T_3428 = cat(_T_3427, _T_3425) @[Cat.scala 29:58] + node _T_3429 = cat(_T_3428, _T_3423) @[Cat.scala 29:58] + node _T_3430 = cat(_T_3429, _T_3421) @[Cat.scala 29:58] + buf_dual_in <= _T_3430 @[el2_lsu_bus_buffer.scala 481:17] + node _T_3431 = bits(ibuf_drainvec_vld, 0, 0) @[el2_lsu_bus_buffer.scala 482:67] + node _T_3432 = mux(_T_3431, ibuf_samedw, ldst_samedw_r) @[el2_lsu_bus_buffer.scala 482:49] + node _T_3433 = bits(ibuf_drainvec_vld, 1, 1) @[el2_lsu_bus_buffer.scala 482:67] + node _T_3434 = mux(_T_3433, ibuf_samedw, ldst_samedw_r) @[el2_lsu_bus_buffer.scala 482:49] + node _T_3435 = bits(ibuf_drainvec_vld, 2, 2) @[el2_lsu_bus_buffer.scala 482:67] + node _T_3436 = mux(_T_3435, ibuf_samedw, ldst_samedw_r) @[el2_lsu_bus_buffer.scala 482:49] + node _T_3437 = bits(ibuf_drainvec_vld, 3, 3) @[el2_lsu_bus_buffer.scala 482:67] + node _T_3438 = mux(_T_3437, ibuf_samedw, ldst_samedw_r) @[el2_lsu_bus_buffer.scala 482:49] + node _T_3439 = cat(_T_3438, _T_3436) @[Cat.scala 29:58] + node _T_3440 = cat(_T_3439, _T_3434) @[Cat.scala 29:58] + node _T_3441 = cat(_T_3440, _T_3432) @[Cat.scala 29:58] + buf_samedw_in <= _T_3441 @[el2_lsu_bus_buffer.scala 482:19] + node _T_3442 = bits(ibuf_drainvec_vld, 0, 0) @[el2_lsu_bus_buffer.scala 483:68] + node _T_3443 = or(ibuf_nomerge, ibuf_force_drain) @[el2_lsu_bus_buffer.scala 483:86] + node _T_3444 = mux(_T_3442, _T_3443, io.no_dword_merge_r) @[el2_lsu_bus_buffer.scala 483:50] + node _T_3445 = bits(ibuf_drainvec_vld, 1, 1) @[el2_lsu_bus_buffer.scala 483:68] + node _T_3446 = or(ibuf_nomerge, ibuf_force_drain) @[el2_lsu_bus_buffer.scala 483:86] + node _T_3447 = mux(_T_3445, _T_3446, io.no_dword_merge_r) @[el2_lsu_bus_buffer.scala 483:50] + node _T_3448 = bits(ibuf_drainvec_vld, 2, 2) @[el2_lsu_bus_buffer.scala 483:68] + node _T_3449 = or(ibuf_nomerge, ibuf_force_drain) @[el2_lsu_bus_buffer.scala 483:86] + node _T_3450 = mux(_T_3448, _T_3449, io.no_dword_merge_r) @[el2_lsu_bus_buffer.scala 483:50] + node _T_3451 = bits(ibuf_drainvec_vld, 3, 3) @[el2_lsu_bus_buffer.scala 483:68] + node _T_3452 = or(ibuf_nomerge, ibuf_force_drain) @[el2_lsu_bus_buffer.scala 483:86] + node _T_3453 = mux(_T_3451, _T_3452, io.no_dword_merge_r) @[el2_lsu_bus_buffer.scala 483:50] + node _T_3454 = cat(_T_3453, _T_3450) @[Cat.scala 29:58] + node _T_3455 = cat(_T_3454, _T_3447) @[Cat.scala 29:58] + node _T_3456 = cat(_T_3455, _T_3444) @[Cat.scala 29:58] + buf_nomerge_in <= _T_3456 @[el2_lsu_bus_buffer.scala 483:20] + node _T_3457 = bits(ibuf_drainvec_vld, 0, 0) @[el2_lsu_bus_buffer.scala 484:67] + node _T_3458 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 484:92] + node _T_3459 = eq(WrPtr1_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 484:120] + node _T_3460 = and(_T_3458, _T_3459) @[el2_lsu_bus_buffer.scala 484:109] + node _T_3461 = mux(_T_3457, ibuf_dual, _T_3460) @[el2_lsu_bus_buffer.scala 484:49] + node _T_3462 = bits(ibuf_drainvec_vld, 1, 1) @[el2_lsu_bus_buffer.scala 484:67] + node _T_3463 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 484:92] + node _T_3464 = eq(WrPtr1_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 484:120] + node _T_3465 = and(_T_3463, _T_3464) @[el2_lsu_bus_buffer.scala 484:109] + node _T_3466 = mux(_T_3462, ibuf_dual, _T_3465) @[el2_lsu_bus_buffer.scala 484:49] + node _T_3467 = bits(ibuf_drainvec_vld, 2, 2) @[el2_lsu_bus_buffer.scala 484:67] + node _T_3468 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 484:92] + node _T_3469 = eq(WrPtr1_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 484:120] + node _T_3470 = and(_T_3468, _T_3469) @[el2_lsu_bus_buffer.scala 484:109] + node _T_3471 = mux(_T_3467, ibuf_dual, _T_3470) @[el2_lsu_bus_buffer.scala 484:49] + node _T_3472 = bits(ibuf_drainvec_vld, 3, 3) @[el2_lsu_bus_buffer.scala 484:67] + node _T_3473 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 484:92] + node _T_3474 = eq(WrPtr1_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 484:120] + node _T_3475 = and(_T_3473, _T_3474) @[el2_lsu_bus_buffer.scala 484:109] + node _T_3476 = mux(_T_3472, ibuf_dual, _T_3475) @[el2_lsu_bus_buffer.scala 484:49] + node _T_3477 = cat(_T_3476, _T_3471) @[Cat.scala 29:58] + node _T_3478 = cat(_T_3477, _T_3466) @[Cat.scala 29:58] + node _T_3479 = cat(_T_3478, _T_3461) @[Cat.scala 29:58] + buf_dualhi_in <= _T_3479 @[el2_lsu_bus_buffer.scala 484:19] + node _T_3480 = bits(ibuf_drainvec_vld, 0, 0) @[el2_lsu_bus_buffer.scala 485:67] + node _T_3481 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 485:99] + node _T_3482 = eq(WrPtr1_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 485:127] + node _T_3483 = and(_T_3481, _T_3482) @[el2_lsu_bus_buffer.scala 485:116] + node _T_3484 = mux(_T_3483, WrPtr0_r, WrPtr1_r) @[el2_lsu_bus_buffer.scala 485:89] + node _T_3485 = mux(_T_3480, ibuf_dualtag, _T_3484) @[el2_lsu_bus_buffer.scala 485:49] + node _T_3486 = bits(ibuf_drainvec_vld, 1, 1) @[el2_lsu_bus_buffer.scala 485:67] + node _T_3487 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 485:99] + node _T_3488 = eq(WrPtr1_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 485:127] + node _T_3489 = and(_T_3487, _T_3488) @[el2_lsu_bus_buffer.scala 485:116] + node _T_3490 = mux(_T_3489, WrPtr0_r, WrPtr1_r) @[el2_lsu_bus_buffer.scala 485:89] + node _T_3491 = mux(_T_3486, ibuf_dualtag, _T_3490) @[el2_lsu_bus_buffer.scala 485:49] + node _T_3492 = bits(ibuf_drainvec_vld, 2, 2) @[el2_lsu_bus_buffer.scala 485:67] + node _T_3493 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 485:99] + node _T_3494 = eq(WrPtr1_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 485:127] + node _T_3495 = and(_T_3493, _T_3494) @[el2_lsu_bus_buffer.scala 485:116] + node _T_3496 = mux(_T_3495, WrPtr0_r, WrPtr1_r) @[el2_lsu_bus_buffer.scala 485:89] + node _T_3497 = mux(_T_3492, ibuf_dualtag, _T_3496) @[el2_lsu_bus_buffer.scala 485:49] + node _T_3498 = bits(ibuf_drainvec_vld, 3, 3) @[el2_lsu_bus_buffer.scala 485:67] + node _T_3499 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 485:99] + node _T_3500 = eq(WrPtr1_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 485:127] + node _T_3501 = and(_T_3499, _T_3500) @[el2_lsu_bus_buffer.scala 485:116] + node _T_3502 = mux(_T_3501, WrPtr0_r, WrPtr1_r) @[el2_lsu_bus_buffer.scala 485:89] + node _T_3503 = mux(_T_3498, ibuf_dualtag, _T_3502) @[el2_lsu_bus_buffer.scala 485:49] + buf_dualtag_in[0] <= _T_3485 @[el2_lsu_bus_buffer.scala 485:20] + buf_dualtag_in[1] <= _T_3491 @[el2_lsu_bus_buffer.scala 485:20] + buf_dualtag_in[2] <= _T_3497 @[el2_lsu_bus_buffer.scala 485:20] + buf_dualtag_in[3] <= _T_3503 @[el2_lsu_bus_buffer.scala 485:20] + node _T_3504 = bits(ibuf_drainvec_vld, 0, 0) @[el2_lsu_bus_buffer.scala 486:71] + node _T_3505 = mux(_T_3504, ibuf_sideeffect, io.is_sideeffects_r) @[el2_lsu_bus_buffer.scala 486:53] + node _T_3506 = bits(ibuf_drainvec_vld, 1, 1) @[el2_lsu_bus_buffer.scala 486:71] + node _T_3507 = mux(_T_3506, ibuf_sideeffect, io.is_sideeffects_r) @[el2_lsu_bus_buffer.scala 486:53] + node _T_3508 = bits(ibuf_drainvec_vld, 2, 2) @[el2_lsu_bus_buffer.scala 486:71] + node _T_3509 = mux(_T_3508, ibuf_sideeffect, io.is_sideeffects_r) @[el2_lsu_bus_buffer.scala 486:53] + node _T_3510 = bits(ibuf_drainvec_vld, 3, 3) @[el2_lsu_bus_buffer.scala 486:71] + node _T_3511 = mux(_T_3510, ibuf_sideeffect, io.is_sideeffects_r) @[el2_lsu_bus_buffer.scala 486:53] + node _T_3512 = cat(_T_3511, _T_3509) @[Cat.scala 29:58] + node _T_3513 = cat(_T_3512, _T_3507) @[Cat.scala 29:58] + node _T_3514 = cat(_T_3513, _T_3505) @[Cat.scala 29:58] + buf_sideeffect_in <= _T_3514 @[el2_lsu_bus_buffer.scala 486:23] + node _T_3515 = bits(ibuf_drainvec_vld, 0, 0) @[el2_lsu_bus_buffer.scala 487:67] + node _T_3516 = mux(_T_3515, ibuf_unsign, io.lsu_pkt_r.unsign) @[el2_lsu_bus_buffer.scala 487:49] + node _T_3517 = bits(ibuf_drainvec_vld, 1, 1) @[el2_lsu_bus_buffer.scala 487:67] + node _T_3518 = mux(_T_3517, ibuf_unsign, io.lsu_pkt_r.unsign) @[el2_lsu_bus_buffer.scala 487:49] + node _T_3519 = bits(ibuf_drainvec_vld, 2, 2) @[el2_lsu_bus_buffer.scala 487:67] + node _T_3520 = mux(_T_3519, ibuf_unsign, io.lsu_pkt_r.unsign) @[el2_lsu_bus_buffer.scala 487:49] + node _T_3521 = bits(ibuf_drainvec_vld, 3, 3) @[el2_lsu_bus_buffer.scala 487:67] + node _T_3522 = mux(_T_3521, ibuf_unsign, io.lsu_pkt_r.unsign) @[el2_lsu_bus_buffer.scala 487:49] + node _T_3523 = cat(_T_3522, _T_3520) @[Cat.scala 29:58] + node _T_3524 = cat(_T_3523, _T_3518) @[Cat.scala 29:58] + node _T_3525 = cat(_T_3524, _T_3516) @[Cat.scala 29:58] + buf_unsign_in <= _T_3525 @[el2_lsu_bus_buffer.scala 487:19] + node _T_3526 = bits(ibuf_drainvec_vld, 0, 0) @[el2_lsu_bus_buffer.scala 488:62] + node _T_3527 = cat(io.lsu_pkt_r.word, io.lsu_pkt_r.half) @[Cat.scala 29:58] + node _T_3528 = mux(_T_3526, ibuf_sz, _T_3527) @[el2_lsu_bus_buffer.scala 488:44] + node _T_3529 = bits(ibuf_drainvec_vld, 1, 1) @[el2_lsu_bus_buffer.scala 488:62] + node _T_3530 = cat(io.lsu_pkt_r.word, io.lsu_pkt_r.half) @[Cat.scala 29:58] + node _T_3531 = mux(_T_3529, ibuf_sz, _T_3530) @[el2_lsu_bus_buffer.scala 488:44] + node _T_3532 = bits(ibuf_drainvec_vld, 2, 2) @[el2_lsu_bus_buffer.scala 488:62] + node _T_3533 = cat(io.lsu_pkt_r.word, io.lsu_pkt_r.half) @[Cat.scala 29:58] + node _T_3534 = mux(_T_3532, ibuf_sz, _T_3533) @[el2_lsu_bus_buffer.scala 488:44] + node _T_3535 = bits(ibuf_drainvec_vld, 3, 3) @[el2_lsu_bus_buffer.scala 488:62] + node _T_3536 = cat(io.lsu_pkt_r.word, io.lsu_pkt_r.half) @[Cat.scala 29:58] + node _T_3537 = mux(_T_3535, ibuf_sz, _T_3536) @[el2_lsu_bus_buffer.scala 488:44] + buf_sz_in[0] <= _T_3528 @[el2_lsu_bus_buffer.scala 488:15] + buf_sz_in[1] <= _T_3531 @[el2_lsu_bus_buffer.scala 488:15] + buf_sz_in[2] <= _T_3534 @[el2_lsu_bus_buffer.scala 488:15] + buf_sz_in[3] <= _T_3537 @[el2_lsu_bus_buffer.scala 488:15] + node _T_3538 = bits(ibuf_drainvec_vld, 0, 0) @[el2_lsu_bus_buffer.scala 489:66] + node _T_3539 = mux(_T_3538, ibuf_write, io.lsu_pkt_r.store) @[el2_lsu_bus_buffer.scala 489:48] + node _T_3540 = bits(ibuf_drainvec_vld, 1, 1) @[el2_lsu_bus_buffer.scala 489:66] + node _T_3541 = mux(_T_3540, ibuf_write, io.lsu_pkt_r.store) @[el2_lsu_bus_buffer.scala 489:48] + node _T_3542 = bits(ibuf_drainvec_vld, 2, 2) @[el2_lsu_bus_buffer.scala 489:66] + node _T_3543 = mux(_T_3542, ibuf_write, io.lsu_pkt_r.store) @[el2_lsu_bus_buffer.scala 489:48] + node _T_3544 = bits(ibuf_drainvec_vld, 3, 3) @[el2_lsu_bus_buffer.scala 489:66] + node _T_3545 = mux(_T_3544, ibuf_write, io.lsu_pkt_r.store) @[el2_lsu_bus_buffer.scala 489:48] + node _T_3546 = cat(_T_3545, _T_3543) @[Cat.scala 29:58] + node _T_3547 = cat(_T_3546, _T_3541) @[Cat.scala 29:58] + node _T_3548 = cat(_T_3547, _T_3539) @[Cat.scala 29:58] + buf_write_in <= _T_3548 @[el2_lsu_bus_buffer.scala 489:18] + node _T_3549 = eq(UInt<3>("h00"), buf_state[0]) @[Conditional.scala 37:30] + when _T_3549 : @[Conditional.scala 40:58] + node _T_3550 = bits(io.lsu_bus_clk_en, 0, 0) @[el2_lsu_bus_buffer.scala 494:56] + node _T_3551 = mux(_T_3550, UInt<3>("h02"), UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 494:31] + buf_nxtstate[0] <= _T_3551 @[el2_lsu_bus_buffer.scala 494:25] + node _T_3552 = and(io.lsu_busreq_r, io.lsu_commit_r) @[el2_lsu_bus_buffer.scala 495:45] + node _T_3553 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 495:77] + node _T_3554 = eq(ibuf_merge_en, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 495:97] + node _T_3555 = and(_T_3553, _T_3554) @[el2_lsu_bus_buffer.scala 495:95] + node _T_3556 = eq(UInt<1>("h00"), WrPtr0_r) @[el2_lsu_bus_buffer.scala 495:117] + node _T_3557 = and(_T_3555, _T_3556) @[el2_lsu_bus_buffer.scala 495:112] + node _T_3558 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 495:144] + node _T_3559 = eq(UInt<1>("h00"), WrPtr1_r) @[el2_lsu_bus_buffer.scala 495:166] + node _T_3560 = and(_T_3558, _T_3559) @[el2_lsu_bus_buffer.scala 495:161] + node _T_3561 = or(_T_3557, _T_3560) @[el2_lsu_bus_buffer.scala 495:132] + node _T_3562 = and(_T_3552, _T_3561) @[el2_lsu_bus_buffer.scala 495:63] + node _T_3563 = eq(UInt<1>("h00"), ibuf_tag) @[el2_lsu_bus_buffer.scala 495:206] + node _T_3564 = and(ibuf_drain_vld, _T_3563) @[el2_lsu_bus_buffer.scala 495:201] + node _T_3565 = or(_T_3562, _T_3564) @[el2_lsu_bus_buffer.scala 495:183] + buf_state_en[0] <= _T_3565 @[el2_lsu_bus_buffer.scala 495:25] + buf_wr_en[0] <= buf_state_en[0] @[el2_lsu_bus_buffer.scala 496:22] + buf_data_en[0] <= buf_state_en[0] @[el2_lsu_bus_buffer.scala 497:24] + node _T_3566 = eq(UInt<1>("h00"), ibuf_tag) @[el2_lsu_bus_buffer.scala 498:52] + node _T_3567 = and(ibuf_drain_vld, _T_3566) @[el2_lsu_bus_buffer.scala 498:47] + node _T_3568 = bits(_T_3567, 0, 0) @[el2_lsu_bus_buffer.scala 498:73] + node _T_3569 = bits(ibuf_data_out, 31, 0) @[el2_lsu_bus_buffer.scala 498:90] + node _T_3570 = bits(store_data_lo_r, 31, 0) @[el2_lsu_bus_buffer.scala 498:114] + node _T_3571 = mux(_T_3568, _T_3569, _T_3570) @[el2_lsu_bus_buffer.scala 498:30] + buf_data_in[0] <= _T_3571 @[el2_lsu_bus_buffer.scala 498:24] + skip @[Conditional.scala 40:58] + else : @[Conditional.scala 39:67] + node _T_3572 = eq(UInt<3>("h01"), buf_state[0]) @[Conditional.scala 37:30] + when _T_3572 : @[Conditional.scala 39:67] + node _T_3573 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 501:60] + node _T_3574 = mux(_T_3573, UInt<3>("h00"), UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 501:31] + buf_nxtstate[0] <= _T_3574 @[el2_lsu_bus_buffer.scala 501:25] + node _T_3575 = or(io.lsu_bus_clk_en, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 502:46] + buf_state_en[0] <= _T_3575 @[el2_lsu_bus_buffer.scala 502:25] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_3576 = eq(UInt<3>("h02"), buf_state[0]) @[Conditional.scala 37:30] + when _T_3576 : @[Conditional.scala 39:67] + node _T_3577 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 505:60] + node _T_3578 = and(obuf_nosend, bus_rsp_read) @[el2_lsu_bus_buffer.scala 505:89] + node _T_3579 = eq(bus_rsp_read_tag, obuf_rdrsp_tag) @[el2_lsu_bus_buffer.scala 505:124] + node _T_3580 = and(_T_3578, _T_3579) @[el2_lsu_bus_buffer.scala 505:104] + node _T_3581 = mux(_T_3580, UInt<3>("h05"), UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 505:75] + node _T_3582 = mux(_T_3577, UInt<3>("h00"), _T_3581) @[el2_lsu_bus_buffer.scala 505:31] + buf_nxtstate[0] <= _T_3582 @[el2_lsu_bus_buffer.scala 505:25] + node _T_3583 = eq(obuf_tag0, UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 506:48] + node _T_3584 = eq(obuf_tag1, UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 506:104] + node _T_3585 = and(obuf_merge, _T_3584) @[el2_lsu_bus_buffer.scala 506:91] + node _T_3586 = or(_T_3583, _T_3585) @[el2_lsu_bus_buffer.scala 506:77] + node _T_3587 = and(_T_3586, obuf_valid) @[el2_lsu_bus_buffer.scala 506:135] + node _T_3588 = and(_T_3587, obuf_wr_enQ) @[el2_lsu_bus_buffer.scala 506:148] + buf_cmd_state_bus_en[0] <= _T_3588 @[el2_lsu_bus_buffer.scala 506:33] + buf_state_bus_en[0] <= buf_cmd_state_bus_en[0] @[el2_lsu_bus_buffer.scala 507:29] + node _T_3589 = and(buf_state_bus_en[0], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 508:49] + node _T_3590 = or(_T_3589, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 508:70] + buf_state_en[0] <= _T_3590 @[el2_lsu_bus_buffer.scala 508:25] + buf_ldfwd_in[0] <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 509:25] + node _T_3591 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 510:56] + node _T_3592 = eq(_T_3591, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 510:46] + node _T_3593 = and(buf_state_en[0], _T_3592) @[el2_lsu_bus_buffer.scala 510:44] + node _T_3594 = and(_T_3593, obuf_nosend) @[el2_lsu_bus_buffer.scala 510:60] + node _T_3595 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 510:76] + node _T_3596 = and(_T_3594, _T_3595) @[el2_lsu_bus_buffer.scala 510:74] + buf_ldfwd_en[0] <= _T_3596 @[el2_lsu_bus_buffer.scala 510:25] + node _T_3597 = bits(obuf_rdrsp_tag, 1, 0) @[el2_lsu_bus_buffer.scala 511:46] + buf_ldfwdtag_in[0] <= _T_3597 @[el2_lsu_bus_buffer.scala 511:28] + node _T_3598 = and(buf_state_bus_en[0], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 512:47] + node _T_3599 = and(_T_3598, obuf_nosend) @[el2_lsu_bus_buffer.scala 512:67] + node _T_3600 = and(_T_3599, bus_rsp_read) @[el2_lsu_bus_buffer.scala 512:81] + buf_data_en[0] <= _T_3600 @[el2_lsu_bus_buffer.scala 512:24] + node _T_3601 = and(buf_state_bus_en[0], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 513:48] + node _T_3602 = and(_T_3601, obuf_nosend) @[el2_lsu_bus_buffer.scala 513:68] + node _T_3603 = and(_T_3602, bus_rsp_read_error) @[el2_lsu_bus_buffer.scala 513:82] + buf_error_en[0] <= _T_3603 @[el2_lsu_bus_buffer.scala 513:25] + node _T_3604 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 514:61] + node _T_3605 = bits(buf_addr[0], 2, 2) @[el2_lsu_bus_buffer.scala 514:85] + node _T_3606 = bits(bus_rsp_rdata, 63, 32) @[el2_lsu_bus_buffer.scala 514:103] + node _T_3607 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 514:126] + node _T_3608 = mux(_T_3605, _T_3606, _T_3607) @[el2_lsu_bus_buffer.scala 514:73] + node _T_3609 = mux(buf_error_en[0], _T_3604, _T_3608) @[el2_lsu_bus_buffer.scala 514:30] + buf_data_in[0] <= _T_3609 @[el2_lsu_bus_buffer.scala 514:24] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_3610 = eq(UInt<3>("h03"), buf_state[0]) @[Conditional.scala 37:30] + when _T_3610 : @[Conditional.scala 39:67] + node _T_3611 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 517:67] + node _T_3612 = and(UInt<1>("h01"), bus_rsp_write_error) @[el2_lsu_bus_buffer.scala 517:94] + node _T_3613 = eq(_T_3612, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 517:73] + node _T_3614 = and(_T_3611, _T_3613) @[el2_lsu_bus_buffer.scala 517:71] + node _T_3615 = or(io.dec_tlu_force_halt, _T_3614) @[el2_lsu_bus_buffer.scala 517:55] + node _T_3616 = bits(_T_3615, 0, 0) @[el2_lsu_bus_buffer.scala 517:125] + node _T_3617 = eq(buf_samedw[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 518:30] + node _T_3618 = and(buf_dual[0], _T_3617) @[el2_lsu_bus_buffer.scala 518:28] + node _T_3619 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 518:57] + node _T_3620 = eq(_T_3619, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 518:47] + node _T_3621 = and(_T_3618, _T_3620) @[el2_lsu_bus_buffer.scala 518:45] + node _T_3622 = neq(buf_state[buf_dualtag[0]], UInt<3>("h04")) @[el2_lsu_bus_buffer.scala 518:90] + node _T_3623 = and(_T_3621, _T_3622) @[el2_lsu_bus_buffer.scala 518:61] + node _T_3624 = bits(buf_ldfwd, 0, 0) @[el2_lsu_bus_buffer.scala 519:27] + node _T_3625 = or(_T_3624, any_done_wait_state) @[el2_lsu_bus_buffer.scala 519:31] + node _T_3626 = eq(buf_samedw[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 519:70] + node _T_3627 = and(buf_dual[0], _T_3626) @[el2_lsu_bus_buffer.scala 519:68] + node _T_3628 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 519:97] + node _T_3629 = eq(_T_3628, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 519:87] + node _T_3630 = and(_T_3627, _T_3629) @[el2_lsu_bus_buffer.scala 519:85] + node _T_3631 = eq(buf_dualtag[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_3632 = bits(buf_ldfwd, 0, 0) @[el2_lsu_bus_buffer.scala 109:129] + node _T_3633 = eq(buf_dualtag[0], UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_3634 = bits(buf_ldfwd, 1, 1) @[el2_lsu_bus_buffer.scala 109:129] + node _T_3635 = eq(buf_dualtag[0], UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_3636 = bits(buf_ldfwd, 2, 2) @[el2_lsu_bus_buffer.scala 109:129] + node _T_3637 = eq(buf_dualtag[0], UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_3638 = bits(buf_ldfwd, 3, 3) @[el2_lsu_bus_buffer.scala 109:129] + node _T_3639 = mux(_T_3631, _T_3632, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_3640 = mux(_T_3633, _T_3634, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_3641 = mux(_T_3635, _T_3636, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_3642 = mux(_T_3637, _T_3638, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_3643 = or(_T_3639, _T_3640) @[Mux.scala 27:72] + node _T_3644 = or(_T_3643, _T_3641) @[Mux.scala 27:72] + node _T_3645 = or(_T_3644, _T_3642) @[Mux.scala 27:72] + wire _T_3646 : UInt<1> @[Mux.scala 27:72] + _T_3646 <= _T_3645 @[Mux.scala 27:72] + node _T_3647 = and(_T_3630, _T_3646) @[el2_lsu_bus_buffer.scala 519:101] + node _T_3648 = eq(buf_state[buf_dualtag[0]], UInt<3>("h04")) @[el2_lsu_bus_buffer.scala 519:167] + node _T_3649 = and(_T_3647, _T_3648) @[el2_lsu_bus_buffer.scala 519:138] + node _T_3650 = and(_T_3649, any_done_wait_state) @[el2_lsu_bus_buffer.scala 519:187] + node _T_3651 = or(_T_3625, _T_3650) @[el2_lsu_bus_buffer.scala 519:53] + node _T_3652 = mux(_T_3651, UInt<3>("h05"), UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 519:16] + node _T_3653 = mux(_T_3623, UInt<3>("h04"), _T_3652) @[el2_lsu_bus_buffer.scala 518:14] + node _T_3654 = mux(_T_3616, UInt<3>("h00"), _T_3653) @[el2_lsu_bus_buffer.scala 517:31] + buf_nxtstate[0] <= _T_3654 @[el2_lsu_bus_buffer.scala 517:25] + node _T_3655 = eq(bus_rsp_write_tag, UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 520:73] + node _T_3656 = and(bus_rsp_write, _T_3655) @[el2_lsu_bus_buffer.scala 520:52] + node _T_3657 = eq(bus_rsp_read_tag, UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 521:46] + node _T_3658 = bits(buf_ldfwd, 0, 0) @[el2_lsu_bus_buffer.scala 522:23] + node _T_3659 = eq(bus_rsp_read_tag, buf_ldfwdtag[0]) @[el2_lsu_bus_buffer.scala 522:47] + node _T_3660 = and(_T_3658, _T_3659) @[el2_lsu_bus_buffer.scala 522:27] + node _T_3661 = or(_T_3657, _T_3660) @[el2_lsu_bus_buffer.scala 521:77] + node _T_3662 = and(buf_dual[0], buf_dualhi[0]) @[el2_lsu_bus_buffer.scala 523:26] + node _T_3663 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 523:54] + node _T_3664 = not(_T_3663) @[el2_lsu_bus_buffer.scala 523:44] + node _T_3665 = and(_T_3662, _T_3664) @[el2_lsu_bus_buffer.scala 523:42] + node _T_3666 = and(_T_3665, buf_samedw[0]) @[el2_lsu_bus_buffer.scala 523:58] + node _T_3667 = eq(bus_rsp_read_tag, buf_dualtag[0]) @[el2_lsu_bus_buffer.scala 523:94] + node _T_3668 = and(_T_3666, _T_3667) @[el2_lsu_bus_buffer.scala 523:74] + node _T_3669 = or(_T_3661, _T_3668) @[el2_lsu_bus_buffer.scala 522:71] + node _T_3670 = and(bus_rsp_read, _T_3669) @[el2_lsu_bus_buffer.scala 521:25] + node _T_3671 = or(_T_3656, _T_3670) @[el2_lsu_bus_buffer.scala 520:105] + buf_resp_state_bus_en[0] <= _T_3671 @[el2_lsu_bus_buffer.scala 520:34] + buf_state_bus_en[0] <= buf_resp_state_bus_en[0] @[el2_lsu_bus_buffer.scala 524:29] + node _T_3672 = and(buf_state_bus_en[0], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 525:49] + node _T_3673 = or(_T_3672, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 525:70] + buf_state_en[0] <= _T_3673 @[el2_lsu_bus_buffer.scala 525:25] + node _T_3674 = and(buf_state_bus_en[0], bus_rsp_read) @[el2_lsu_bus_buffer.scala 526:47] + node _T_3675 = and(_T_3674, io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 526:62] + buf_data_en[0] <= _T_3675 @[el2_lsu_bus_buffer.scala 526:24] + node _T_3676 = and(buf_state_bus_en[0], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 527:48] + node _T_3677 = eq(bus_rsp_read_tag, UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 527:111] + node _T_3678 = and(bus_rsp_read_error, _T_3677) @[el2_lsu_bus_buffer.scala 527:91] + node _T_3679 = bits(buf_ldfwd, 0, 0) @[el2_lsu_bus_buffer.scala 528:42] + node _T_3680 = and(bus_rsp_read_error, _T_3679) @[el2_lsu_bus_buffer.scala 528:31] + node _T_3681 = eq(bus_rsp_read_tag, buf_ldfwdtag[0]) @[el2_lsu_bus_buffer.scala 528:66] + node _T_3682 = and(_T_3680, _T_3681) @[el2_lsu_bus_buffer.scala 528:46] + node _T_3683 = or(_T_3678, _T_3682) @[el2_lsu_bus_buffer.scala 527:143] + node _T_3684 = and(bus_rsp_write_error, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 529:32] + node _T_3685 = eq(bus_rsp_write_tag, UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 529:74] + node _T_3686 = and(_T_3684, _T_3685) @[el2_lsu_bus_buffer.scala 529:53] + node _T_3687 = or(_T_3683, _T_3686) @[el2_lsu_bus_buffer.scala 528:88] + node _T_3688 = and(_T_3676, _T_3687) @[el2_lsu_bus_buffer.scala 527:68] + buf_error_en[0] <= _T_3688 @[el2_lsu_bus_buffer.scala 527:25] + node _T_3689 = eq(buf_error_en[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 530:50] + node _T_3690 = and(buf_state_en[0], _T_3689) @[el2_lsu_bus_buffer.scala 530:48] + node _T_3691 = bits(buf_addr[0], 2, 2) @[el2_lsu_bus_buffer.scala 530:84] + node _T_3692 = bits(bus_rsp_rdata, 63, 32) @[el2_lsu_bus_buffer.scala 530:102] + node _T_3693 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 530:125] + node _T_3694 = mux(_T_3691, _T_3692, _T_3693) @[el2_lsu_bus_buffer.scala 530:72] + node _T_3695 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 530:148] + node _T_3696 = mux(_T_3690, _T_3694, _T_3695) @[el2_lsu_bus_buffer.scala 530:30] + buf_data_in[0] <= _T_3696 @[el2_lsu_bus_buffer.scala 530:24] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_3697 = eq(UInt<3>("h04"), buf_state[0]) @[Conditional.scala 37:30] + when _T_3697 : @[Conditional.scala 39:67] + node _T_3698 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 533:60] + node _T_3699 = bits(buf_ldfwd, 0, 0) @[el2_lsu_bus_buffer.scala 533:86] + node _T_3700 = dshr(buf_ldfwd, buf_dualtag[0]) @[el2_lsu_bus_buffer.scala 533:101] + node _T_3701 = bits(_T_3700, 0, 0) @[el2_lsu_bus_buffer.scala 533:101] + node _T_3702 = or(_T_3699, _T_3701) @[el2_lsu_bus_buffer.scala 533:90] + node _T_3703 = or(_T_3702, any_done_wait_state) @[el2_lsu_bus_buffer.scala 533:118] + node _T_3704 = mux(_T_3703, UInt<3>("h05"), UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 533:75] + node _T_3705 = mux(_T_3698, UInt<3>("h00"), _T_3704) @[el2_lsu_bus_buffer.scala 533:31] + buf_nxtstate[0] <= _T_3705 @[el2_lsu_bus_buffer.scala 533:25] + node _T_3706 = eq(bus_rsp_read_tag, buf_dualtag[0]) @[el2_lsu_bus_buffer.scala 534:66] + node _T_3707 = dshr(buf_ldfwd, buf_dualtag[0]) @[el2_lsu_bus_buffer.scala 535:21] + node _T_3708 = bits(_T_3707, 0, 0) @[el2_lsu_bus_buffer.scala 535:21] + node _T_3709 = eq(bus_rsp_read_tag, buf_ldfwdtag[buf_dualtag[0]]) @[el2_lsu_bus_buffer.scala 535:58] + node _T_3710 = and(_T_3708, _T_3709) @[el2_lsu_bus_buffer.scala 535:38] + node _T_3711 = or(_T_3706, _T_3710) @[el2_lsu_bus_buffer.scala 534:95] + node _T_3712 = and(bus_rsp_read, _T_3711) @[el2_lsu_bus_buffer.scala 534:45] + buf_state_bus_en[0] <= _T_3712 @[el2_lsu_bus_buffer.scala 534:29] + node _T_3713 = and(buf_state_bus_en[0], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 536:49] + node _T_3714 = or(_T_3713, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 536:70] + buf_state_en[0] <= _T_3714 @[el2_lsu_bus_buffer.scala 536:25] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_3715 = eq(UInt<3>("h05"), buf_state[0]) @[Conditional.scala 37:30] + when _T_3715 : @[Conditional.scala 39:67] + node _T_3716 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 539:60] + node _T_3717 = mux(_T_3716, UInt<3>("h00"), UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 539:31] + buf_nxtstate[0] <= _T_3717 @[el2_lsu_bus_buffer.scala 539:25] + node _T_3718 = eq(RspPtr, UInt<2>("h00")) @[el2_lsu_bus_buffer.scala 540:37] + node _T_3719 = eq(buf_dualtag[0], RspPtr) @[el2_lsu_bus_buffer.scala 540:98] + node _T_3720 = and(buf_dual[0], _T_3719) @[el2_lsu_bus_buffer.scala 540:80] + node _T_3721 = or(_T_3718, _T_3720) @[el2_lsu_bus_buffer.scala 540:65] + node _T_3722 = or(_T_3721, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 540:112] + buf_state_en[0] <= _T_3722 @[el2_lsu_bus_buffer.scala 540:25] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_3723 = eq(UInt<3>("h06"), buf_state[0]) @[Conditional.scala 37:30] + when _T_3723 : @[Conditional.scala 39:67] + buf_nxtstate[0] <= UInt<3>("h00") @[el2_lsu_bus_buffer.scala 543:25] + buf_rst[0] <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 544:20] + buf_state_en[0] <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 545:25] + buf_ldfwd_in[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 546:25] + buf_ldfwd_en[0] <= buf_state_en[0] @[el2_lsu_bus_buffer.scala 547:25] + skip @[Conditional.scala 39:67] + node _T_3724 = bits(buf_state_en[0], 0, 0) @[el2_lsu_bus_buffer.scala 550:108] + reg _T_3725 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_3724 : @[Reg.scala 28:19] + _T_3725 <= buf_nxtstate[0] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_state[0] <= _T_3725 @[el2_lsu_bus_buffer.scala 550:18] + reg _T_3726 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 551:60] + _T_3726 <= buf_age_in_0 @[el2_lsu_bus_buffer.scala 551:60] + buf_ageQ[0] <= _T_3726 @[el2_lsu_bus_buffer.scala 551:17] + reg _T_3727 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 552:63] + _T_3727 <= buf_rspage_in[0] @[el2_lsu_bus_buffer.scala 552:63] + buf_rspageQ[0] <= _T_3727 @[el2_lsu_bus_buffer.scala 552:20] + node _T_3728 = bits(buf_wr_en[0], 0, 0) @[el2_lsu_bus_buffer.scala 553:109] + reg _T_3729 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_3728 : @[Reg.scala 28:19] + _T_3729 <= buf_dualtag_in[0] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_dualtag[0] <= _T_3729 @[el2_lsu_bus_buffer.scala 553:20] + node _T_3730 = bits(buf_dual_in, 0, 0) @[el2_lsu_bus_buffer.scala 554:74] + node _T_3731 = bits(buf_wr_en[0], 0, 0) @[el2_lsu_bus_buffer.scala 554:107] + reg _T_3732 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_3731 : @[Reg.scala 28:19] + _T_3732 <= _T_3730 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_dual[0] <= _T_3732 @[el2_lsu_bus_buffer.scala 554:17] + node _T_3733 = bits(buf_samedw_in, 0, 0) @[el2_lsu_bus_buffer.scala 555:78] + node _T_3734 = bits(buf_wr_en[0], 0, 0) @[el2_lsu_bus_buffer.scala 555:111] + reg _T_3735 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_3734 : @[Reg.scala 28:19] + _T_3735 <= _T_3733 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_samedw[0] <= _T_3735 @[el2_lsu_bus_buffer.scala 555:19] + node _T_3736 = bits(buf_nomerge_in, 0, 0) @[el2_lsu_bus_buffer.scala 556:80] + node _T_3737 = bits(buf_wr_en[0], 0, 0) @[el2_lsu_bus_buffer.scala 556:113] + reg _T_3738 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_3737 : @[Reg.scala 28:19] + _T_3738 <= _T_3736 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_nomerge[0] <= _T_3738 @[el2_lsu_bus_buffer.scala 556:20] + node _T_3739 = bits(buf_dualhi_in, 0, 0) @[el2_lsu_bus_buffer.scala 557:78] + node _T_3740 = bits(buf_wr_en[0], 0, 0) @[el2_lsu_bus_buffer.scala 557:111] + reg _T_3741 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_3740 : @[Reg.scala 28:19] + _T_3741 <= _T_3739 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_dualhi[0] <= _T_3741 @[el2_lsu_bus_buffer.scala 557:19] + node _T_3742 = eq(UInt<3>("h00"), buf_state[1]) @[Conditional.scala 37:30] + when _T_3742 : @[Conditional.scala 40:58] + node _T_3743 = bits(io.lsu_bus_clk_en, 0, 0) @[el2_lsu_bus_buffer.scala 494:56] + node _T_3744 = mux(_T_3743, UInt<3>("h02"), UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 494:31] + buf_nxtstate[1] <= _T_3744 @[el2_lsu_bus_buffer.scala 494:25] + node _T_3745 = and(io.lsu_busreq_r, io.lsu_commit_r) @[el2_lsu_bus_buffer.scala 495:45] + node _T_3746 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 495:77] + node _T_3747 = eq(ibuf_merge_en, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 495:97] + node _T_3748 = and(_T_3746, _T_3747) @[el2_lsu_bus_buffer.scala 495:95] + node _T_3749 = eq(UInt<1>("h01"), WrPtr0_r) @[el2_lsu_bus_buffer.scala 495:117] + node _T_3750 = and(_T_3748, _T_3749) @[el2_lsu_bus_buffer.scala 495:112] + node _T_3751 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 495:144] + node _T_3752 = eq(UInt<1>("h01"), WrPtr1_r) @[el2_lsu_bus_buffer.scala 495:166] + node _T_3753 = and(_T_3751, _T_3752) @[el2_lsu_bus_buffer.scala 495:161] + node _T_3754 = or(_T_3750, _T_3753) @[el2_lsu_bus_buffer.scala 495:132] + node _T_3755 = and(_T_3745, _T_3754) @[el2_lsu_bus_buffer.scala 495:63] + node _T_3756 = eq(UInt<1>("h01"), ibuf_tag) @[el2_lsu_bus_buffer.scala 495:206] + node _T_3757 = and(ibuf_drain_vld, _T_3756) @[el2_lsu_bus_buffer.scala 495:201] + node _T_3758 = or(_T_3755, _T_3757) @[el2_lsu_bus_buffer.scala 495:183] + buf_state_en[1] <= _T_3758 @[el2_lsu_bus_buffer.scala 495:25] + buf_wr_en[1] <= buf_state_en[1] @[el2_lsu_bus_buffer.scala 496:22] + buf_data_en[1] <= buf_state_en[1] @[el2_lsu_bus_buffer.scala 497:24] + node _T_3759 = eq(UInt<1>("h01"), ibuf_tag) @[el2_lsu_bus_buffer.scala 498:52] + node _T_3760 = and(ibuf_drain_vld, _T_3759) @[el2_lsu_bus_buffer.scala 498:47] + node _T_3761 = bits(_T_3760, 0, 0) @[el2_lsu_bus_buffer.scala 498:73] + node _T_3762 = bits(ibuf_data_out, 31, 0) @[el2_lsu_bus_buffer.scala 498:90] + node _T_3763 = bits(store_data_lo_r, 31, 0) @[el2_lsu_bus_buffer.scala 498:114] + node _T_3764 = mux(_T_3761, _T_3762, _T_3763) @[el2_lsu_bus_buffer.scala 498:30] + buf_data_in[1] <= _T_3764 @[el2_lsu_bus_buffer.scala 498:24] + skip @[Conditional.scala 40:58] + else : @[Conditional.scala 39:67] + node _T_3765 = eq(UInt<3>("h01"), buf_state[1]) @[Conditional.scala 37:30] + when _T_3765 : @[Conditional.scala 39:67] + node _T_3766 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 501:60] + node _T_3767 = mux(_T_3766, UInt<3>("h00"), UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 501:31] + buf_nxtstate[1] <= _T_3767 @[el2_lsu_bus_buffer.scala 501:25] + node _T_3768 = or(io.lsu_bus_clk_en, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 502:46] + buf_state_en[1] <= _T_3768 @[el2_lsu_bus_buffer.scala 502:25] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_3769 = eq(UInt<3>("h02"), buf_state[1]) @[Conditional.scala 37:30] + when _T_3769 : @[Conditional.scala 39:67] + node _T_3770 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 505:60] + node _T_3771 = and(obuf_nosend, bus_rsp_read) @[el2_lsu_bus_buffer.scala 505:89] + node _T_3772 = eq(bus_rsp_read_tag, obuf_rdrsp_tag) @[el2_lsu_bus_buffer.scala 505:124] + node _T_3773 = and(_T_3771, _T_3772) @[el2_lsu_bus_buffer.scala 505:104] + node _T_3774 = mux(_T_3773, UInt<3>("h05"), UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 505:75] + node _T_3775 = mux(_T_3770, UInt<3>("h00"), _T_3774) @[el2_lsu_bus_buffer.scala 505:31] + buf_nxtstate[1] <= _T_3775 @[el2_lsu_bus_buffer.scala 505:25] + node _T_3776 = eq(obuf_tag0, UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 506:48] + node _T_3777 = eq(obuf_tag1, UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 506:104] + node _T_3778 = and(obuf_merge, _T_3777) @[el2_lsu_bus_buffer.scala 506:91] + node _T_3779 = or(_T_3776, _T_3778) @[el2_lsu_bus_buffer.scala 506:77] + node _T_3780 = and(_T_3779, obuf_valid) @[el2_lsu_bus_buffer.scala 506:135] + node _T_3781 = and(_T_3780, obuf_wr_enQ) @[el2_lsu_bus_buffer.scala 506:148] + buf_cmd_state_bus_en[1] <= _T_3781 @[el2_lsu_bus_buffer.scala 506:33] + buf_state_bus_en[1] <= buf_cmd_state_bus_en[1] @[el2_lsu_bus_buffer.scala 507:29] + node _T_3782 = and(buf_state_bus_en[1], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 508:49] + node _T_3783 = or(_T_3782, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 508:70] + buf_state_en[1] <= _T_3783 @[el2_lsu_bus_buffer.scala 508:25] + buf_ldfwd_in[1] <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 509:25] + node _T_3784 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 510:56] + node _T_3785 = eq(_T_3784, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 510:46] + node _T_3786 = and(buf_state_en[1], _T_3785) @[el2_lsu_bus_buffer.scala 510:44] + node _T_3787 = and(_T_3786, obuf_nosend) @[el2_lsu_bus_buffer.scala 510:60] + node _T_3788 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 510:76] + node _T_3789 = and(_T_3787, _T_3788) @[el2_lsu_bus_buffer.scala 510:74] + buf_ldfwd_en[1] <= _T_3789 @[el2_lsu_bus_buffer.scala 510:25] + node _T_3790 = bits(obuf_rdrsp_tag, 1, 0) @[el2_lsu_bus_buffer.scala 511:46] + buf_ldfwdtag_in[1] <= _T_3790 @[el2_lsu_bus_buffer.scala 511:28] + node _T_3791 = and(buf_state_bus_en[1], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 512:47] + node _T_3792 = and(_T_3791, obuf_nosend) @[el2_lsu_bus_buffer.scala 512:67] + node _T_3793 = and(_T_3792, bus_rsp_read) @[el2_lsu_bus_buffer.scala 512:81] + buf_data_en[1] <= _T_3793 @[el2_lsu_bus_buffer.scala 512:24] + node _T_3794 = and(buf_state_bus_en[1], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 513:48] + node _T_3795 = and(_T_3794, obuf_nosend) @[el2_lsu_bus_buffer.scala 513:68] + node _T_3796 = and(_T_3795, bus_rsp_read_error) @[el2_lsu_bus_buffer.scala 513:82] + buf_error_en[1] <= _T_3796 @[el2_lsu_bus_buffer.scala 513:25] + node _T_3797 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 514:61] + node _T_3798 = bits(buf_addr[1], 2, 2) @[el2_lsu_bus_buffer.scala 514:85] + node _T_3799 = bits(bus_rsp_rdata, 63, 32) @[el2_lsu_bus_buffer.scala 514:103] + node _T_3800 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 514:126] + node _T_3801 = mux(_T_3798, _T_3799, _T_3800) @[el2_lsu_bus_buffer.scala 514:73] + node _T_3802 = mux(buf_error_en[1], _T_3797, _T_3801) @[el2_lsu_bus_buffer.scala 514:30] + buf_data_in[1] <= _T_3802 @[el2_lsu_bus_buffer.scala 514:24] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_3803 = eq(UInt<3>("h03"), buf_state[1]) @[Conditional.scala 37:30] + when _T_3803 : @[Conditional.scala 39:67] + node _T_3804 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 517:67] + node _T_3805 = and(UInt<1>("h01"), bus_rsp_write_error) @[el2_lsu_bus_buffer.scala 517:94] + node _T_3806 = eq(_T_3805, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 517:73] + node _T_3807 = and(_T_3804, _T_3806) @[el2_lsu_bus_buffer.scala 517:71] + node _T_3808 = or(io.dec_tlu_force_halt, _T_3807) @[el2_lsu_bus_buffer.scala 517:55] + node _T_3809 = bits(_T_3808, 0, 0) @[el2_lsu_bus_buffer.scala 517:125] + node _T_3810 = eq(buf_samedw[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 518:30] + node _T_3811 = and(buf_dual[1], _T_3810) @[el2_lsu_bus_buffer.scala 518:28] + node _T_3812 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 518:57] + node _T_3813 = eq(_T_3812, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 518:47] + node _T_3814 = and(_T_3811, _T_3813) @[el2_lsu_bus_buffer.scala 518:45] + node _T_3815 = neq(buf_state[buf_dualtag[1]], UInt<3>("h04")) @[el2_lsu_bus_buffer.scala 518:90] + node _T_3816 = and(_T_3814, _T_3815) @[el2_lsu_bus_buffer.scala 518:61] + node _T_3817 = bits(buf_ldfwd, 1, 1) @[el2_lsu_bus_buffer.scala 519:27] + node _T_3818 = or(_T_3817, any_done_wait_state) @[el2_lsu_bus_buffer.scala 519:31] + node _T_3819 = eq(buf_samedw[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 519:70] + node _T_3820 = and(buf_dual[1], _T_3819) @[el2_lsu_bus_buffer.scala 519:68] + node _T_3821 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 519:97] + node _T_3822 = eq(_T_3821, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 519:87] + node _T_3823 = and(_T_3820, _T_3822) @[el2_lsu_bus_buffer.scala 519:85] + node _T_3824 = eq(buf_dualtag[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_3825 = bits(buf_ldfwd, 0, 0) @[el2_lsu_bus_buffer.scala 109:129] + node _T_3826 = eq(buf_dualtag[1], UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_3827 = bits(buf_ldfwd, 1, 1) @[el2_lsu_bus_buffer.scala 109:129] + node _T_3828 = eq(buf_dualtag[1], UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_3829 = bits(buf_ldfwd, 2, 2) @[el2_lsu_bus_buffer.scala 109:129] + node _T_3830 = eq(buf_dualtag[1], UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_3831 = bits(buf_ldfwd, 3, 3) @[el2_lsu_bus_buffer.scala 109:129] + node _T_3832 = mux(_T_3824, _T_3825, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_3833 = mux(_T_3826, _T_3827, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_3834 = mux(_T_3828, _T_3829, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_3835 = mux(_T_3830, _T_3831, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_3836 = or(_T_3832, _T_3833) @[Mux.scala 27:72] + node _T_3837 = or(_T_3836, _T_3834) @[Mux.scala 27:72] + node _T_3838 = or(_T_3837, _T_3835) @[Mux.scala 27:72] + wire _T_3839 : UInt<1> @[Mux.scala 27:72] + _T_3839 <= _T_3838 @[Mux.scala 27:72] + node _T_3840 = and(_T_3823, _T_3839) @[el2_lsu_bus_buffer.scala 519:101] + node _T_3841 = eq(buf_state[buf_dualtag[1]], UInt<3>("h04")) @[el2_lsu_bus_buffer.scala 519:167] + node _T_3842 = and(_T_3840, _T_3841) @[el2_lsu_bus_buffer.scala 519:138] + node _T_3843 = and(_T_3842, any_done_wait_state) @[el2_lsu_bus_buffer.scala 519:187] + node _T_3844 = or(_T_3818, _T_3843) @[el2_lsu_bus_buffer.scala 519:53] + node _T_3845 = mux(_T_3844, UInt<3>("h05"), UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 519:16] + node _T_3846 = mux(_T_3816, UInt<3>("h04"), _T_3845) @[el2_lsu_bus_buffer.scala 518:14] + node _T_3847 = mux(_T_3809, UInt<3>("h00"), _T_3846) @[el2_lsu_bus_buffer.scala 517:31] + buf_nxtstate[1] <= _T_3847 @[el2_lsu_bus_buffer.scala 517:25] + node _T_3848 = eq(bus_rsp_write_tag, UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 520:73] + node _T_3849 = and(bus_rsp_write, _T_3848) @[el2_lsu_bus_buffer.scala 520:52] + node _T_3850 = eq(bus_rsp_read_tag, UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 521:46] + node _T_3851 = bits(buf_ldfwd, 1, 1) @[el2_lsu_bus_buffer.scala 522:23] + node _T_3852 = eq(bus_rsp_read_tag, buf_ldfwdtag[1]) @[el2_lsu_bus_buffer.scala 522:47] + node _T_3853 = and(_T_3851, _T_3852) @[el2_lsu_bus_buffer.scala 522:27] + node _T_3854 = or(_T_3850, _T_3853) @[el2_lsu_bus_buffer.scala 521:77] + node _T_3855 = and(buf_dual[1], buf_dualhi[1]) @[el2_lsu_bus_buffer.scala 523:26] + node _T_3856 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 523:54] + node _T_3857 = not(_T_3856) @[el2_lsu_bus_buffer.scala 523:44] + node _T_3858 = and(_T_3855, _T_3857) @[el2_lsu_bus_buffer.scala 523:42] + node _T_3859 = and(_T_3858, buf_samedw[1]) @[el2_lsu_bus_buffer.scala 523:58] + node _T_3860 = eq(bus_rsp_read_tag, buf_dualtag[1]) @[el2_lsu_bus_buffer.scala 523:94] + node _T_3861 = and(_T_3859, _T_3860) @[el2_lsu_bus_buffer.scala 523:74] + node _T_3862 = or(_T_3854, _T_3861) @[el2_lsu_bus_buffer.scala 522:71] + node _T_3863 = and(bus_rsp_read, _T_3862) @[el2_lsu_bus_buffer.scala 521:25] + node _T_3864 = or(_T_3849, _T_3863) @[el2_lsu_bus_buffer.scala 520:105] + buf_resp_state_bus_en[1] <= _T_3864 @[el2_lsu_bus_buffer.scala 520:34] + buf_state_bus_en[1] <= buf_resp_state_bus_en[1] @[el2_lsu_bus_buffer.scala 524:29] + node _T_3865 = and(buf_state_bus_en[1], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 525:49] + node _T_3866 = or(_T_3865, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 525:70] + buf_state_en[1] <= _T_3866 @[el2_lsu_bus_buffer.scala 525:25] + node _T_3867 = and(buf_state_bus_en[1], bus_rsp_read) @[el2_lsu_bus_buffer.scala 526:47] + node _T_3868 = and(_T_3867, io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 526:62] + buf_data_en[1] <= _T_3868 @[el2_lsu_bus_buffer.scala 526:24] + node _T_3869 = and(buf_state_bus_en[1], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 527:48] + node _T_3870 = eq(bus_rsp_read_tag, UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 527:111] + node _T_3871 = and(bus_rsp_read_error, _T_3870) @[el2_lsu_bus_buffer.scala 527:91] + node _T_3872 = bits(buf_ldfwd, 1, 1) @[el2_lsu_bus_buffer.scala 528:42] + node _T_3873 = and(bus_rsp_read_error, _T_3872) @[el2_lsu_bus_buffer.scala 528:31] + node _T_3874 = eq(bus_rsp_read_tag, buf_ldfwdtag[1]) @[el2_lsu_bus_buffer.scala 528:66] + node _T_3875 = and(_T_3873, _T_3874) @[el2_lsu_bus_buffer.scala 528:46] + node _T_3876 = or(_T_3871, _T_3875) @[el2_lsu_bus_buffer.scala 527:143] + node _T_3877 = and(bus_rsp_write_error, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 529:32] + node _T_3878 = eq(bus_rsp_write_tag, UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 529:74] + node _T_3879 = and(_T_3877, _T_3878) @[el2_lsu_bus_buffer.scala 529:53] + node _T_3880 = or(_T_3876, _T_3879) @[el2_lsu_bus_buffer.scala 528:88] + node _T_3881 = and(_T_3869, _T_3880) @[el2_lsu_bus_buffer.scala 527:68] + buf_error_en[1] <= _T_3881 @[el2_lsu_bus_buffer.scala 527:25] + node _T_3882 = eq(buf_error_en[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 530:50] + node _T_3883 = and(buf_state_en[1], _T_3882) @[el2_lsu_bus_buffer.scala 530:48] + node _T_3884 = bits(buf_addr[1], 2, 2) @[el2_lsu_bus_buffer.scala 530:84] + node _T_3885 = bits(bus_rsp_rdata, 63, 32) @[el2_lsu_bus_buffer.scala 530:102] + node _T_3886 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 530:125] + node _T_3887 = mux(_T_3884, _T_3885, _T_3886) @[el2_lsu_bus_buffer.scala 530:72] + node _T_3888 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 530:148] + node _T_3889 = mux(_T_3883, _T_3887, _T_3888) @[el2_lsu_bus_buffer.scala 530:30] + buf_data_in[1] <= _T_3889 @[el2_lsu_bus_buffer.scala 530:24] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_3890 = eq(UInt<3>("h04"), buf_state[1]) @[Conditional.scala 37:30] + when _T_3890 : @[Conditional.scala 39:67] + node _T_3891 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 533:60] + node _T_3892 = bits(buf_ldfwd, 1, 1) @[el2_lsu_bus_buffer.scala 533:86] + node _T_3893 = dshr(buf_ldfwd, buf_dualtag[1]) @[el2_lsu_bus_buffer.scala 533:101] + node _T_3894 = bits(_T_3893, 0, 0) @[el2_lsu_bus_buffer.scala 533:101] + node _T_3895 = or(_T_3892, _T_3894) @[el2_lsu_bus_buffer.scala 533:90] + node _T_3896 = or(_T_3895, any_done_wait_state) @[el2_lsu_bus_buffer.scala 533:118] + node _T_3897 = mux(_T_3896, UInt<3>("h05"), UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 533:75] + node _T_3898 = mux(_T_3891, UInt<3>("h00"), _T_3897) @[el2_lsu_bus_buffer.scala 533:31] + buf_nxtstate[1] <= _T_3898 @[el2_lsu_bus_buffer.scala 533:25] + node _T_3899 = eq(bus_rsp_read_tag, buf_dualtag[1]) @[el2_lsu_bus_buffer.scala 534:66] + node _T_3900 = dshr(buf_ldfwd, buf_dualtag[1]) @[el2_lsu_bus_buffer.scala 535:21] + node _T_3901 = bits(_T_3900, 0, 0) @[el2_lsu_bus_buffer.scala 535:21] + node _T_3902 = eq(bus_rsp_read_tag, buf_ldfwdtag[buf_dualtag[1]]) @[el2_lsu_bus_buffer.scala 535:58] + node _T_3903 = and(_T_3901, _T_3902) @[el2_lsu_bus_buffer.scala 535:38] + node _T_3904 = or(_T_3899, _T_3903) @[el2_lsu_bus_buffer.scala 534:95] + node _T_3905 = and(bus_rsp_read, _T_3904) @[el2_lsu_bus_buffer.scala 534:45] + buf_state_bus_en[1] <= _T_3905 @[el2_lsu_bus_buffer.scala 534:29] + node _T_3906 = and(buf_state_bus_en[1], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 536:49] + node _T_3907 = or(_T_3906, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 536:70] + buf_state_en[1] <= _T_3907 @[el2_lsu_bus_buffer.scala 536:25] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_3908 = eq(UInt<3>("h05"), buf_state[1]) @[Conditional.scala 37:30] + when _T_3908 : @[Conditional.scala 39:67] + node _T_3909 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 539:60] + node _T_3910 = mux(_T_3909, UInt<3>("h00"), UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 539:31] + buf_nxtstate[1] <= _T_3910 @[el2_lsu_bus_buffer.scala 539:25] + node _T_3911 = eq(RspPtr, UInt<2>("h01")) @[el2_lsu_bus_buffer.scala 540:37] + node _T_3912 = eq(buf_dualtag[1], RspPtr) @[el2_lsu_bus_buffer.scala 540:98] + node _T_3913 = and(buf_dual[1], _T_3912) @[el2_lsu_bus_buffer.scala 540:80] + node _T_3914 = or(_T_3911, _T_3913) @[el2_lsu_bus_buffer.scala 540:65] + node _T_3915 = or(_T_3914, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 540:112] + buf_state_en[1] <= _T_3915 @[el2_lsu_bus_buffer.scala 540:25] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_3916 = eq(UInt<3>("h06"), buf_state[1]) @[Conditional.scala 37:30] + when _T_3916 : @[Conditional.scala 39:67] + buf_nxtstate[1] <= UInt<3>("h00") @[el2_lsu_bus_buffer.scala 543:25] + buf_rst[1] <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 544:20] + buf_state_en[1] <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 545:25] + buf_ldfwd_in[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 546:25] + buf_ldfwd_en[1] <= buf_state_en[1] @[el2_lsu_bus_buffer.scala 547:25] + skip @[Conditional.scala 39:67] + node _T_3917 = bits(buf_state_en[1], 0, 0) @[el2_lsu_bus_buffer.scala 550:108] + reg _T_3918 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_3917 : @[Reg.scala 28:19] + _T_3918 <= buf_nxtstate[1] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_state[1] <= _T_3918 @[el2_lsu_bus_buffer.scala 550:18] + reg _T_3919 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 551:60] + _T_3919 <= buf_age_in_1 @[el2_lsu_bus_buffer.scala 551:60] + buf_ageQ[1] <= _T_3919 @[el2_lsu_bus_buffer.scala 551:17] + reg _T_3920 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 552:63] + _T_3920 <= buf_rspage_in[1] @[el2_lsu_bus_buffer.scala 552:63] + buf_rspageQ[1] <= _T_3920 @[el2_lsu_bus_buffer.scala 552:20] + node _T_3921 = bits(buf_wr_en[1], 0, 0) @[el2_lsu_bus_buffer.scala 553:109] + reg _T_3922 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_3921 : @[Reg.scala 28:19] + _T_3922 <= buf_dualtag_in[1] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_dualtag[1] <= _T_3922 @[el2_lsu_bus_buffer.scala 553:20] + node _T_3923 = bits(buf_dual_in, 1, 1) @[el2_lsu_bus_buffer.scala 554:74] + node _T_3924 = bits(buf_wr_en[1], 0, 0) @[el2_lsu_bus_buffer.scala 554:107] + reg _T_3925 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_3924 : @[Reg.scala 28:19] + _T_3925 <= _T_3923 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_dual[1] <= _T_3925 @[el2_lsu_bus_buffer.scala 554:17] + node _T_3926 = bits(buf_samedw_in, 1, 1) @[el2_lsu_bus_buffer.scala 555:78] + node _T_3927 = bits(buf_wr_en[1], 0, 0) @[el2_lsu_bus_buffer.scala 555:111] + reg _T_3928 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_3927 : @[Reg.scala 28:19] + _T_3928 <= _T_3926 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_samedw[1] <= _T_3928 @[el2_lsu_bus_buffer.scala 555:19] + node _T_3929 = bits(buf_nomerge_in, 1, 1) @[el2_lsu_bus_buffer.scala 556:80] + node _T_3930 = bits(buf_wr_en[1], 0, 0) @[el2_lsu_bus_buffer.scala 556:113] + reg _T_3931 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_3930 : @[Reg.scala 28:19] + _T_3931 <= _T_3929 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_nomerge[1] <= _T_3931 @[el2_lsu_bus_buffer.scala 556:20] + node _T_3932 = bits(buf_dualhi_in, 1, 1) @[el2_lsu_bus_buffer.scala 557:78] + node _T_3933 = bits(buf_wr_en[1], 0, 0) @[el2_lsu_bus_buffer.scala 557:111] + reg _T_3934 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_3933 : @[Reg.scala 28:19] + _T_3934 <= _T_3932 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_dualhi[1] <= _T_3934 @[el2_lsu_bus_buffer.scala 557:19] + node _T_3935 = eq(UInt<3>("h00"), buf_state[2]) @[Conditional.scala 37:30] + when _T_3935 : @[Conditional.scala 40:58] + node _T_3936 = bits(io.lsu_bus_clk_en, 0, 0) @[el2_lsu_bus_buffer.scala 494:56] + node _T_3937 = mux(_T_3936, UInt<3>("h02"), UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 494:31] + buf_nxtstate[2] <= _T_3937 @[el2_lsu_bus_buffer.scala 494:25] + node _T_3938 = and(io.lsu_busreq_r, io.lsu_commit_r) @[el2_lsu_bus_buffer.scala 495:45] + node _T_3939 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 495:77] + node _T_3940 = eq(ibuf_merge_en, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 495:97] + node _T_3941 = and(_T_3939, _T_3940) @[el2_lsu_bus_buffer.scala 495:95] + node _T_3942 = eq(UInt<2>("h02"), WrPtr0_r) @[el2_lsu_bus_buffer.scala 495:117] + node _T_3943 = and(_T_3941, _T_3942) @[el2_lsu_bus_buffer.scala 495:112] + node _T_3944 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 495:144] + node _T_3945 = eq(UInt<2>("h02"), WrPtr1_r) @[el2_lsu_bus_buffer.scala 495:166] + node _T_3946 = and(_T_3944, _T_3945) @[el2_lsu_bus_buffer.scala 495:161] + node _T_3947 = or(_T_3943, _T_3946) @[el2_lsu_bus_buffer.scala 495:132] + node _T_3948 = and(_T_3938, _T_3947) @[el2_lsu_bus_buffer.scala 495:63] + node _T_3949 = eq(UInt<2>("h02"), ibuf_tag) @[el2_lsu_bus_buffer.scala 495:206] + node _T_3950 = and(ibuf_drain_vld, _T_3949) @[el2_lsu_bus_buffer.scala 495:201] + node _T_3951 = or(_T_3948, _T_3950) @[el2_lsu_bus_buffer.scala 495:183] + buf_state_en[2] <= _T_3951 @[el2_lsu_bus_buffer.scala 495:25] + buf_wr_en[2] <= buf_state_en[2] @[el2_lsu_bus_buffer.scala 496:22] + buf_data_en[2] <= buf_state_en[2] @[el2_lsu_bus_buffer.scala 497:24] + node _T_3952 = eq(UInt<2>("h02"), ibuf_tag) @[el2_lsu_bus_buffer.scala 498:52] + node _T_3953 = and(ibuf_drain_vld, _T_3952) @[el2_lsu_bus_buffer.scala 498:47] + node _T_3954 = bits(_T_3953, 0, 0) @[el2_lsu_bus_buffer.scala 498:73] + node _T_3955 = bits(ibuf_data_out, 31, 0) @[el2_lsu_bus_buffer.scala 498:90] + node _T_3956 = bits(store_data_lo_r, 31, 0) @[el2_lsu_bus_buffer.scala 498:114] + node _T_3957 = mux(_T_3954, _T_3955, _T_3956) @[el2_lsu_bus_buffer.scala 498:30] + buf_data_in[2] <= _T_3957 @[el2_lsu_bus_buffer.scala 498:24] + skip @[Conditional.scala 40:58] + else : @[Conditional.scala 39:67] + node _T_3958 = eq(UInt<3>("h01"), buf_state[2]) @[Conditional.scala 37:30] + when _T_3958 : @[Conditional.scala 39:67] + node _T_3959 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 501:60] + node _T_3960 = mux(_T_3959, UInt<3>("h00"), UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 501:31] + buf_nxtstate[2] <= _T_3960 @[el2_lsu_bus_buffer.scala 501:25] + node _T_3961 = or(io.lsu_bus_clk_en, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 502:46] + buf_state_en[2] <= _T_3961 @[el2_lsu_bus_buffer.scala 502:25] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_3962 = eq(UInt<3>("h02"), buf_state[2]) @[Conditional.scala 37:30] + when _T_3962 : @[Conditional.scala 39:67] + node _T_3963 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 505:60] + node _T_3964 = and(obuf_nosend, bus_rsp_read) @[el2_lsu_bus_buffer.scala 505:89] + node _T_3965 = eq(bus_rsp_read_tag, obuf_rdrsp_tag) @[el2_lsu_bus_buffer.scala 505:124] + node _T_3966 = and(_T_3964, _T_3965) @[el2_lsu_bus_buffer.scala 505:104] + node _T_3967 = mux(_T_3966, UInt<3>("h05"), UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 505:75] + node _T_3968 = mux(_T_3963, UInt<3>("h00"), _T_3967) @[el2_lsu_bus_buffer.scala 505:31] + buf_nxtstate[2] <= _T_3968 @[el2_lsu_bus_buffer.scala 505:25] + node _T_3969 = eq(obuf_tag0, UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 506:48] + node _T_3970 = eq(obuf_tag1, UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 506:104] + node _T_3971 = and(obuf_merge, _T_3970) @[el2_lsu_bus_buffer.scala 506:91] + node _T_3972 = or(_T_3969, _T_3971) @[el2_lsu_bus_buffer.scala 506:77] + node _T_3973 = and(_T_3972, obuf_valid) @[el2_lsu_bus_buffer.scala 506:135] + node _T_3974 = and(_T_3973, obuf_wr_enQ) @[el2_lsu_bus_buffer.scala 506:148] + buf_cmd_state_bus_en[2] <= _T_3974 @[el2_lsu_bus_buffer.scala 506:33] + buf_state_bus_en[2] <= buf_cmd_state_bus_en[2] @[el2_lsu_bus_buffer.scala 507:29] + node _T_3975 = and(buf_state_bus_en[2], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 508:49] + node _T_3976 = or(_T_3975, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 508:70] + buf_state_en[2] <= _T_3976 @[el2_lsu_bus_buffer.scala 508:25] + buf_ldfwd_in[2] <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 509:25] + node _T_3977 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 510:56] + node _T_3978 = eq(_T_3977, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 510:46] + node _T_3979 = and(buf_state_en[2], _T_3978) @[el2_lsu_bus_buffer.scala 510:44] + node _T_3980 = and(_T_3979, obuf_nosend) @[el2_lsu_bus_buffer.scala 510:60] + node _T_3981 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 510:76] + node _T_3982 = and(_T_3980, _T_3981) @[el2_lsu_bus_buffer.scala 510:74] + buf_ldfwd_en[2] <= _T_3982 @[el2_lsu_bus_buffer.scala 510:25] + node _T_3983 = bits(obuf_rdrsp_tag, 1, 0) @[el2_lsu_bus_buffer.scala 511:46] + buf_ldfwdtag_in[2] <= _T_3983 @[el2_lsu_bus_buffer.scala 511:28] + node _T_3984 = and(buf_state_bus_en[2], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 512:47] + node _T_3985 = and(_T_3984, obuf_nosend) @[el2_lsu_bus_buffer.scala 512:67] + node _T_3986 = and(_T_3985, bus_rsp_read) @[el2_lsu_bus_buffer.scala 512:81] + buf_data_en[2] <= _T_3986 @[el2_lsu_bus_buffer.scala 512:24] + node _T_3987 = and(buf_state_bus_en[2], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 513:48] + node _T_3988 = and(_T_3987, obuf_nosend) @[el2_lsu_bus_buffer.scala 513:68] + node _T_3989 = and(_T_3988, bus_rsp_read_error) @[el2_lsu_bus_buffer.scala 513:82] + buf_error_en[2] <= _T_3989 @[el2_lsu_bus_buffer.scala 513:25] + node _T_3990 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 514:61] + node _T_3991 = bits(buf_addr[2], 2, 2) @[el2_lsu_bus_buffer.scala 514:85] + node _T_3992 = bits(bus_rsp_rdata, 63, 32) @[el2_lsu_bus_buffer.scala 514:103] + node _T_3993 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 514:126] + node _T_3994 = mux(_T_3991, _T_3992, _T_3993) @[el2_lsu_bus_buffer.scala 514:73] + node _T_3995 = mux(buf_error_en[2], _T_3990, _T_3994) @[el2_lsu_bus_buffer.scala 514:30] + buf_data_in[2] <= _T_3995 @[el2_lsu_bus_buffer.scala 514:24] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_3996 = eq(UInt<3>("h03"), buf_state[2]) @[Conditional.scala 37:30] + when _T_3996 : @[Conditional.scala 39:67] + node _T_3997 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 517:67] + node _T_3998 = and(UInt<1>("h01"), bus_rsp_write_error) @[el2_lsu_bus_buffer.scala 517:94] + node _T_3999 = eq(_T_3998, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 517:73] + node _T_4000 = and(_T_3997, _T_3999) @[el2_lsu_bus_buffer.scala 517:71] + node _T_4001 = or(io.dec_tlu_force_halt, _T_4000) @[el2_lsu_bus_buffer.scala 517:55] + node _T_4002 = bits(_T_4001, 0, 0) @[el2_lsu_bus_buffer.scala 517:125] + node _T_4003 = eq(buf_samedw[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 518:30] + node _T_4004 = and(buf_dual[2], _T_4003) @[el2_lsu_bus_buffer.scala 518:28] + node _T_4005 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 518:57] + node _T_4006 = eq(_T_4005, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 518:47] + node _T_4007 = and(_T_4004, _T_4006) @[el2_lsu_bus_buffer.scala 518:45] + node _T_4008 = neq(buf_state[buf_dualtag[2]], UInt<3>("h04")) @[el2_lsu_bus_buffer.scala 518:90] + node _T_4009 = and(_T_4007, _T_4008) @[el2_lsu_bus_buffer.scala 518:61] + node _T_4010 = bits(buf_ldfwd, 2, 2) @[el2_lsu_bus_buffer.scala 519:27] + node _T_4011 = or(_T_4010, any_done_wait_state) @[el2_lsu_bus_buffer.scala 519:31] + node _T_4012 = eq(buf_samedw[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 519:70] + node _T_4013 = and(buf_dual[2], _T_4012) @[el2_lsu_bus_buffer.scala 519:68] + node _T_4014 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 519:97] + node _T_4015 = eq(_T_4014, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 519:87] + node _T_4016 = and(_T_4013, _T_4015) @[el2_lsu_bus_buffer.scala 519:85] + node _T_4017 = eq(buf_dualtag[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_4018 = bits(buf_ldfwd, 0, 0) @[el2_lsu_bus_buffer.scala 109:129] + node _T_4019 = eq(buf_dualtag[2], UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_4020 = bits(buf_ldfwd, 1, 1) @[el2_lsu_bus_buffer.scala 109:129] + node _T_4021 = eq(buf_dualtag[2], UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_4022 = bits(buf_ldfwd, 2, 2) @[el2_lsu_bus_buffer.scala 109:129] + node _T_4023 = eq(buf_dualtag[2], UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_4024 = bits(buf_ldfwd, 3, 3) @[el2_lsu_bus_buffer.scala 109:129] + node _T_4025 = mux(_T_4017, _T_4018, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4026 = mux(_T_4019, _T_4020, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4027 = mux(_T_4021, _T_4022, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4028 = mux(_T_4023, _T_4024, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4029 = or(_T_4025, _T_4026) @[Mux.scala 27:72] + node _T_4030 = or(_T_4029, _T_4027) @[Mux.scala 27:72] + node _T_4031 = or(_T_4030, _T_4028) @[Mux.scala 27:72] + wire _T_4032 : UInt<1> @[Mux.scala 27:72] + _T_4032 <= _T_4031 @[Mux.scala 27:72] + node _T_4033 = and(_T_4016, _T_4032) @[el2_lsu_bus_buffer.scala 519:101] + node _T_4034 = eq(buf_state[buf_dualtag[2]], UInt<3>("h04")) @[el2_lsu_bus_buffer.scala 519:167] + node _T_4035 = and(_T_4033, _T_4034) @[el2_lsu_bus_buffer.scala 519:138] + node _T_4036 = and(_T_4035, any_done_wait_state) @[el2_lsu_bus_buffer.scala 519:187] + node _T_4037 = or(_T_4011, _T_4036) @[el2_lsu_bus_buffer.scala 519:53] + node _T_4038 = mux(_T_4037, UInt<3>("h05"), UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 519:16] + node _T_4039 = mux(_T_4009, UInt<3>("h04"), _T_4038) @[el2_lsu_bus_buffer.scala 518:14] + node _T_4040 = mux(_T_4002, UInt<3>("h00"), _T_4039) @[el2_lsu_bus_buffer.scala 517:31] + buf_nxtstate[2] <= _T_4040 @[el2_lsu_bus_buffer.scala 517:25] + node _T_4041 = eq(bus_rsp_write_tag, UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 520:73] + node _T_4042 = and(bus_rsp_write, _T_4041) @[el2_lsu_bus_buffer.scala 520:52] + node _T_4043 = eq(bus_rsp_read_tag, UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 521:46] + node _T_4044 = bits(buf_ldfwd, 2, 2) @[el2_lsu_bus_buffer.scala 522:23] + node _T_4045 = eq(bus_rsp_read_tag, buf_ldfwdtag[2]) @[el2_lsu_bus_buffer.scala 522:47] + node _T_4046 = and(_T_4044, _T_4045) @[el2_lsu_bus_buffer.scala 522:27] + node _T_4047 = or(_T_4043, _T_4046) @[el2_lsu_bus_buffer.scala 521:77] + node _T_4048 = and(buf_dual[2], buf_dualhi[2]) @[el2_lsu_bus_buffer.scala 523:26] + node _T_4049 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 523:54] + node _T_4050 = not(_T_4049) @[el2_lsu_bus_buffer.scala 523:44] + node _T_4051 = and(_T_4048, _T_4050) @[el2_lsu_bus_buffer.scala 523:42] + node _T_4052 = and(_T_4051, buf_samedw[2]) @[el2_lsu_bus_buffer.scala 523:58] + node _T_4053 = eq(bus_rsp_read_tag, buf_dualtag[2]) @[el2_lsu_bus_buffer.scala 523:94] + node _T_4054 = and(_T_4052, _T_4053) @[el2_lsu_bus_buffer.scala 523:74] + node _T_4055 = or(_T_4047, _T_4054) @[el2_lsu_bus_buffer.scala 522:71] + node _T_4056 = and(bus_rsp_read, _T_4055) @[el2_lsu_bus_buffer.scala 521:25] + node _T_4057 = or(_T_4042, _T_4056) @[el2_lsu_bus_buffer.scala 520:105] + buf_resp_state_bus_en[2] <= _T_4057 @[el2_lsu_bus_buffer.scala 520:34] + buf_state_bus_en[2] <= buf_resp_state_bus_en[2] @[el2_lsu_bus_buffer.scala 524:29] + node _T_4058 = and(buf_state_bus_en[2], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 525:49] + node _T_4059 = or(_T_4058, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 525:70] + buf_state_en[2] <= _T_4059 @[el2_lsu_bus_buffer.scala 525:25] + node _T_4060 = and(buf_state_bus_en[2], bus_rsp_read) @[el2_lsu_bus_buffer.scala 526:47] + node _T_4061 = and(_T_4060, io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 526:62] + buf_data_en[2] <= _T_4061 @[el2_lsu_bus_buffer.scala 526:24] + node _T_4062 = and(buf_state_bus_en[2], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 527:48] + node _T_4063 = eq(bus_rsp_read_tag, UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 527:111] + node _T_4064 = and(bus_rsp_read_error, _T_4063) @[el2_lsu_bus_buffer.scala 527:91] + node _T_4065 = bits(buf_ldfwd, 2, 2) @[el2_lsu_bus_buffer.scala 528:42] + node _T_4066 = and(bus_rsp_read_error, _T_4065) @[el2_lsu_bus_buffer.scala 528:31] + node _T_4067 = eq(bus_rsp_read_tag, buf_ldfwdtag[2]) @[el2_lsu_bus_buffer.scala 528:66] + node _T_4068 = and(_T_4066, _T_4067) @[el2_lsu_bus_buffer.scala 528:46] + node _T_4069 = or(_T_4064, _T_4068) @[el2_lsu_bus_buffer.scala 527:143] + node _T_4070 = and(bus_rsp_write_error, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 529:32] + node _T_4071 = eq(bus_rsp_write_tag, UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 529:74] + node _T_4072 = and(_T_4070, _T_4071) @[el2_lsu_bus_buffer.scala 529:53] + node _T_4073 = or(_T_4069, _T_4072) @[el2_lsu_bus_buffer.scala 528:88] + node _T_4074 = and(_T_4062, _T_4073) @[el2_lsu_bus_buffer.scala 527:68] + buf_error_en[2] <= _T_4074 @[el2_lsu_bus_buffer.scala 527:25] + node _T_4075 = eq(buf_error_en[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 530:50] + node _T_4076 = and(buf_state_en[2], _T_4075) @[el2_lsu_bus_buffer.scala 530:48] + node _T_4077 = bits(buf_addr[2], 2, 2) @[el2_lsu_bus_buffer.scala 530:84] + node _T_4078 = bits(bus_rsp_rdata, 63, 32) @[el2_lsu_bus_buffer.scala 530:102] + node _T_4079 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 530:125] + node _T_4080 = mux(_T_4077, _T_4078, _T_4079) @[el2_lsu_bus_buffer.scala 530:72] + node _T_4081 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 530:148] + node _T_4082 = mux(_T_4076, _T_4080, _T_4081) @[el2_lsu_bus_buffer.scala 530:30] + buf_data_in[2] <= _T_4082 @[el2_lsu_bus_buffer.scala 530:24] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_4083 = eq(UInt<3>("h04"), buf_state[2]) @[Conditional.scala 37:30] + when _T_4083 : @[Conditional.scala 39:67] + node _T_4084 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 533:60] + node _T_4085 = bits(buf_ldfwd, 2, 2) @[el2_lsu_bus_buffer.scala 533:86] + node _T_4086 = dshr(buf_ldfwd, buf_dualtag[2]) @[el2_lsu_bus_buffer.scala 533:101] + node _T_4087 = bits(_T_4086, 0, 0) @[el2_lsu_bus_buffer.scala 533:101] + node _T_4088 = or(_T_4085, _T_4087) @[el2_lsu_bus_buffer.scala 533:90] + node _T_4089 = or(_T_4088, any_done_wait_state) @[el2_lsu_bus_buffer.scala 533:118] + node _T_4090 = mux(_T_4089, UInt<3>("h05"), UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 533:75] + node _T_4091 = mux(_T_4084, UInt<3>("h00"), _T_4090) @[el2_lsu_bus_buffer.scala 533:31] + buf_nxtstate[2] <= _T_4091 @[el2_lsu_bus_buffer.scala 533:25] + node _T_4092 = eq(bus_rsp_read_tag, buf_dualtag[2]) @[el2_lsu_bus_buffer.scala 534:66] + node _T_4093 = dshr(buf_ldfwd, buf_dualtag[2]) @[el2_lsu_bus_buffer.scala 535:21] + node _T_4094 = bits(_T_4093, 0, 0) @[el2_lsu_bus_buffer.scala 535:21] + node _T_4095 = eq(bus_rsp_read_tag, buf_ldfwdtag[buf_dualtag[2]]) @[el2_lsu_bus_buffer.scala 535:58] + node _T_4096 = and(_T_4094, _T_4095) @[el2_lsu_bus_buffer.scala 535:38] + node _T_4097 = or(_T_4092, _T_4096) @[el2_lsu_bus_buffer.scala 534:95] + node _T_4098 = and(bus_rsp_read, _T_4097) @[el2_lsu_bus_buffer.scala 534:45] + buf_state_bus_en[2] <= _T_4098 @[el2_lsu_bus_buffer.scala 534:29] + node _T_4099 = and(buf_state_bus_en[2], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 536:49] + node _T_4100 = or(_T_4099, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 536:70] + buf_state_en[2] <= _T_4100 @[el2_lsu_bus_buffer.scala 536:25] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_4101 = eq(UInt<3>("h05"), buf_state[2]) @[Conditional.scala 37:30] + when _T_4101 : @[Conditional.scala 39:67] + node _T_4102 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 539:60] + node _T_4103 = mux(_T_4102, UInt<3>("h00"), UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 539:31] + buf_nxtstate[2] <= _T_4103 @[el2_lsu_bus_buffer.scala 539:25] + node _T_4104 = eq(RspPtr, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 540:37] + node _T_4105 = eq(buf_dualtag[2], RspPtr) @[el2_lsu_bus_buffer.scala 540:98] + node _T_4106 = and(buf_dual[2], _T_4105) @[el2_lsu_bus_buffer.scala 540:80] + node _T_4107 = or(_T_4104, _T_4106) @[el2_lsu_bus_buffer.scala 540:65] + node _T_4108 = or(_T_4107, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 540:112] + buf_state_en[2] <= _T_4108 @[el2_lsu_bus_buffer.scala 540:25] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_4109 = eq(UInt<3>("h06"), buf_state[2]) @[Conditional.scala 37:30] + when _T_4109 : @[Conditional.scala 39:67] + buf_nxtstate[2] <= UInt<3>("h00") @[el2_lsu_bus_buffer.scala 543:25] + buf_rst[2] <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 544:20] + buf_state_en[2] <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 545:25] + buf_ldfwd_in[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 546:25] + buf_ldfwd_en[2] <= buf_state_en[2] @[el2_lsu_bus_buffer.scala 547:25] + skip @[Conditional.scala 39:67] + node _T_4110 = bits(buf_state_en[2], 0, 0) @[el2_lsu_bus_buffer.scala 550:108] + reg _T_4111 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4110 : @[Reg.scala 28:19] + _T_4111 <= buf_nxtstate[2] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_state[2] <= _T_4111 @[el2_lsu_bus_buffer.scala 550:18] + reg _T_4112 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 551:60] + _T_4112 <= buf_age_in_2 @[el2_lsu_bus_buffer.scala 551:60] + buf_ageQ[2] <= _T_4112 @[el2_lsu_bus_buffer.scala 551:17] + reg _T_4113 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 552:63] + _T_4113 <= buf_rspage_in[2] @[el2_lsu_bus_buffer.scala 552:63] + buf_rspageQ[2] <= _T_4113 @[el2_lsu_bus_buffer.scala 552:20] + node _T_4114 = bits(buf_wr_en[2], 0, 0) @[el2_lsu_bus_buffer.scala 553:109] + reg _T_4115 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4114 : @[Reg.scala 28:19] + _T_4115 <= buf_dualtag_in[2] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_dualtag[2] <= _T_4115 @[el2_lsu_bus_buffer.scala 553:20] + node _T_4116 = bits(buf_dual_in, 2, 2) @[el2_lsu_bus_buffer.scala 554:74] + node _T_4117 = bits(buf_wr_en[2], 0, 0) @[el2_lsu_bus_buffer.scala 554:107] + reg _T_4118 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4117 : @[Reg.scala 28:19] + _T_4118 <= _T_4116 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_dual[2] <= _T_4118 @[el2_lsu_bus_buffer.scala 554:17] + node _T_4119 = bits(buf_samedw_in, 2, 2) @[el2_lsu_bus_buffer.scala 555:78] + node _T_4120 = bits(buf_wr_en[2], 0, 0) @[el2_lsu_bus_buffer.scala 555:111] + reg _T_4121 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4120 : @[Reg.scala 28:19] + _T_4121 <= _T_4119 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_samedw[2] <= _T_4121 @[el2_lsu_bus_buffer.scala 555:19] + node _T_4122 = bits(buf_nomerge_in, 2, 2) @[el2_lsu_bus_buffer.scala 556:80] + node _T_4123 = bits(buf_wr_en[2], 0, 0) @[el2_lsu_bus_buffer.scala 556:113] + reg _T_4124 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4123 : @[Reg.scala 28:19] + _T_4124 <= _T_4122 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_nomerge[2] <= _T_4124 @[el2_lsu_bus_buffer.scala 556:20] + node _T_4125 = bits(buf_dualhi_in, 2, 2) @[el2_lsu_bus_buffer.scala 557:78] + node _T_4126 = bits(buf_wr_en[2], 0, 0) @[el2_lsu_bus_buffer.scala 557:111] + reg _T_4127 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4126 : @[Reg.scala 28:19] + _T_4127 <= _T_4125 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_dualhi[2] <= _T_4127 @[el2_lsu_bus_buffer.scala 557:19] + node _T_4128 = eq(UInt<3>("h00"), buf_state[3]) @[Conditional.scala 37:30] + when _T_4128 : @[Conditional.scala 40:58] + node _T_4129 = bits(io.lsu_bus_clk_en, 0, 0) @[el2_lsu_bus_buffer.scala 494:56] + node _T_4130 = mux(_T_4129, UInt<3>("h02"), UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 494:31] + buf_nxtstate[3] <= _T_4130 @[el2_lsu_bus_buffer.scala 494:25] + node _T_4131 = and(io.lsu_busreq_r, io.lsu_commit_r) @[el2_lsu_bus_buffer.scala 495:45] + node _T_4132 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 495:77] + node _T_4133 = eq(ibuf_merge_en, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 495:97] + node _T_4134 = and(_T_4132, _T_4133) @[el2_lsu_bus_buffer.scala 495:95] + node _T_4135 = eq(UInt<2>("h03"), WrPtr0_r) @[el2_lsu_bus_buffer.scala 495:117] + node _T_4136 = and(_T_4134, _T_4135) @[el2_lsu_bus_buffer.scala 495:112] + node _T_4137 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 495:144] + node _T_4138 = eq(UInt<2>("h03"), WrPtr1_r) @[el2_lsu_bus_buffer.scala 495:166] + node _T_4139 = and(_T_4137, _T_4138) @[el2_lsu_bus_buffer.scala 495:161] + node _T_4140 = or(_T_4136, _T_4139) @[el2_lsu_bus_buffer.scala 495:132] + node _T_4141 = and(_T_4131, _T_4140) @[el2_lsu_bus_buffer.scala 495:63] + node _T_4142 = eq(UInt<2>("h03"), ibuf_tag) @[el2_lsu_bus_buffer.scala 495:206] + node _T_4143 = and(ibuf_drain_vld, _T_4142) @[el2_lsu_bus_buffer.scala 495:201] + node _T_4144 = or(_T_4141, _T_4143) @[el2_lsu_bus_buffer.scala 495:183] + buf_state_en[3] <= _T_4144 @[el2_lsu_bus_buffer.scala 495:25] + buf_wr_en[3] <= buf_state_en[3] @[el2_lsu_bus_buffer.scala 496:22] + buf_data_en[3] <= buf_state_en[3] @[el2_lsu_bus_buffer.scala 497:24] + node _T_4145 = eq(UInt<2>("h03"), ibuf_tag) @[el2_lsu_bus_buffer.scala 498:52] + node _T_4146 = and(ibuf_drain_vld, _T_4145) @[el2_lsu_bus_buffer.scala 498:47] + node _T_4147 = bits(_T_4146, 0, 0) @[el2_lsu_bus_buffer.scala 498:73] + node _T_4148 = bits(ibuf_data_out, 31, 0) @[el2_lsu_bus_buffer.scala 498:90] + node _T_4149 = bits(store_data_lo_r, 31, 0) @[el2_lsu_bus_buffer.scala 498:114] + node _T_4150 = mux(_T_4147, _T_4148, _T_4149) @[el2_lsu_bus_buffer.scala 498:30] + buf_data_in[3] <= _T_4150 @[el2_lsu_bus_buffer.scala 498:24] + skip @[Conditional.scala 40:58] + else : @[Conditional.scala 39:67] + node _T_4151 = eq(UInt<3>("h01"), buf_state[3]) @[Conditional.scala 37:30] + when _T_4151 : @[Conditional.scala 39:67] + node _T_4152 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 501:60] + node _T_4153 = mux(_T_4152, UInt<3>("h00"), UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 501:31] + buf_nxtstate[3] <= _T_4153 @[el2_lsu_bus_buffer.scala 501:25] + node _T_4154 = or(io.lsu_bus_clk_en, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 502:46] + buf_state_en[3] <= _T_4154 @[el2_lsu_bus_buffer.scala 502:25] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_4155 = eq(UInt<3>("h02"), buf_state[3]) @[Conditional.scala 37:30] + when _T_4155 : @[Conditional.scala 39:67] + node _T_4156 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 505:60] + node _T_4157 = and(obuf_nosend, bus_rsp_read) @[el2_lsu_bus_buffer.scala 505:89] + node _T_4158 = eq(bus_rsp_read_tag, obuf_rdrsp_tag) @[el2_lsu_bus_buffer.scala 505:124] + node _T_4159 = and(_T_4157, _T_4158) @[el2_lsu_bus_buffer.scala 505:104] + node _T_4160 = mux(_T_4159, UInt<3>("h05"), UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 505:75] + node _T_4161 = mux(_T_4156, UInt<3>("h00"), _T_4160) @[el2_lsu_bus_buffer.scala 505:31] + buf_nxtstate[3] <= _T_4161 @[el2_lsu_bus_buffer.scala 505:25] + node _T_4162 = eq(obuf_tag0, UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 506:48] + node _T_4163 = eq(obuf_tag1, UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 506:104] + node _T_4164 = and(obuf_merge, _T_4163) @[el2_lsu_bus_buffer.scala 506:91] + node _T_4165 = or(_T_4162, _T_4164) @[el2_lsu_bus_buffer.scala 506:77] + node _T_4166 = and(_T_4165, obuf_valid) @[el2_lsu_bus_buffer.scala 506:135] + node _T_4167 = and(_T_4166, obuf_wr_enQ) @[el2_lsu_bus_buffer.scala 506:148] + buf_cmd_state_bus_en[3] <= _T_4167 @[el2_lsu_bus_buffer.scala 506:33] + buf_state_bus_en[3] <= buf_cmd_state_bus_en[3] @[el2_lsu_bus_buffer.scala 507:29] + node _T_4168 = and(buf_state_bus_en[3], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 508:49] + node _T_4169 = or(_T_4168, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 508:70] + buf_state_en[3] <= _T_4169 @[el2_lsu_bus_buffer.scala 508:25] + buf_ldfwd_in[3] <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 509:25] + node _T_4170 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 510:56] + node _T_4171 = eq(_T_4170, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 510:46] + node _T_4172 = and(buf_state_en[3], _T_4171) @[el2_lsu_bus_buffer.scala 510:44] + node _T_4173 = and(_T_4172, obuf_nosend) @[el2_lsu_bus_buffer.scala 510:60] + node _T_4174 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 510:76] + node _T_4175 = and(_T_4173, _T_4174) @[el2_lsu_bus_buffer.scala 510:74] + buf_ldfwd_en[3] <= _T_4175 @[el2_lsu_bus_buffer.scala 510:25] + node _T_4176 = bits(obuf_rdrsp_tag, 1, 0) @[el2_lsu_bus_buffer.scala 511:46] + buf_ldfwdtag_in[3] <= _T_4176 @[el2_lsu_bus_buffer.scala 511:28] + node _T_4177 = and(buf_state_bus_en[3], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 512:47] + node _T_4178 = and(_T_4177, obuf_nosend) @[el2_lsu_bus_buffer.scala 512:67] + node _T_4179 = and(_T_4178, bus_rsp_read) @[el2_lsu_bus_buffer.scala 512:81] + buf_data_en[3] <= _T_4179 @[el2_lsu_bus_buffer.scala 512:24] + node _T_4180 = and(buf_state_bus_en[3], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 513:48] + node _T_4181 = and(_T_4180, obuf_nosend) @[el2_lsu_bus_buffer.scala 513:68] + node _T_4182 = and(_T_4181, bus_rsp_read_error) @[el2_lsu_bus_buffer.scala 513:82] + buf_error_en[3] <= _T_4182 @[el2_lsu_bus_buffer.scala 513:25] + node _T_4183 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 514:61] + node _T_4184 = bits(buf_addr[3], 2, 2) @[el2_lsu_bus_buffer.scala 514:85] + node _T_4185 = bits(bus_rsp_rdata, 63, 32) @[el2_lsu_bus_buffer.scala 514:103] + node _T_4186 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 514:126] + node _T_4187 = mux(_T_4184, _T_4185, _T_4186) @[el2_lsu_bus_buffer.scala 514:73] + node _T_4188 = mux(buf_error_en[3], _T_4183, _T_4187) @[el2_lsu_bus_buffer.scala 514:30] + buf_data_in[3] <= _T_4188 @[el2_lsu_bus_buffer.scala 514:24] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_4189 = eq(UInt<3>("h03"), buf_state[3]) @[Conditional.scala 37:30] + when _T_4189 : @[Conditional.scala 39:67] + node _T_4190 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 517:67] + node _T_4191 = and(UInt<1>("h01"), bus_rsp_write_error) @[el2_lsu_bus_buffer.scala 517:94] + node _T_4192 = eq(_T_4191, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 517:73] + node _T_4193 = and(_T_4190, _T_4192) @[el2_lsu_bus_buffer.scala 517:71] + node _T_4194 = or(io.dec_tlu_force_halt, _T_4193) @[el2_lsu_bus_buffer.scala 517:55] + node _T_4195 = bits(_T_4194, 0, 0) @[el2_lsu_bus_buffer.scala 517:125] + node _T_4196 = eq(buf_samedw[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 518:30] + node _T_4197 = and(buf_dual[3], _T_4196) @[el2_lsu_bus_buffer.scala 518:28] + node _T_4198 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 518:57] + node _T_4199 = eq(_T_4198, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 518:47] + node _T_4200 = and(_T_4197, _T_4199) @[el2_lsu_bus_buffer.scala 518:45] + node _T_4201 = neq(buf_state[buf_dualtag[3]], UInt<3>("h04")) @[el2_lsu_bus_buffer.scala 518:90] + node _T_4202 = and(_T_4200, _T_4201) @[el2_lsu_bus_buffer.scala 518:61] + node _T_4203 = bits(buf_ldfwd, 3, 3) @[el2_lsu_bus_buffer.scala 519:27] + node _T_4204 = or(_T_4203, any_done_wait_state) @[el2_lsu_bus_buffer.scala 519:31] + node _T_4205 = eq(buf_samedw[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 519:70] + node _T_4206 = and(buf_dual[3], _T_4205) @[el2_lsu_bus_buffer.scala 519:68] + node _T_4207 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 519:97] + node _T_4208 = eq(_T_4207, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 519:87] + node _T_4209 = and(_T_4206, _T_4208) @[el2_lsu_bus_buffer.scala 519:85] + node _T_4210 = eq(buf_dualtag[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_4211 = bits(buf_ldfwd, 0, 0) @[el2_lsu_bus_buffer.scala 109:129] + node _T_4212 = eq(buf_dualtag[3], UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_4213 = bits(buf_ldfwd, 1, 1) @[el2_lsu_bus_buffer.scala 109:129] + node _T_4214 = eq(buf_dualtag[3], UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_4215 = bits(buf_ldfwd, 2, 2) @[el2_lsu_bus_buffer.scala 109:129] + node _T_4216 = eq(buf_dualtag[3], UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_4217 = bits(buf_ldfwd, 3, 3) @[el2_lsu_bus_buffer.scala 109:129] + node _T_4218 = mux(_T_4210, _T_4211, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4219 = mux(_T_4212, _T_4213, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4220 = mux(_T_4214, _T_4215, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4221 = mux(_T_4216, _T_4217, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4222 = or(_T_4218, _T_4219) @[Mux.scala 27:72] + node _T_4223 = or(_T_4222, _T_4220) @[Mux.scala 27:72] + node _T_4224 = or(_T_4223, _T_4221) @[Mux.scala 27:72] + wire _T_4225 : UInt<1> @[Mux.scala 27:72] + _T_4225 <= _T_4224 @[Mux.scala 27:72] + node _T_4226 = and(_T_4209, _T_4225) @[el2_lsu_bus_buffer.scala 519:101] + node _T_4227 = eq(buf_state[buf_dualtag[3]], UInt<3>("h04")) @[el2_lsu_bus_buffer.scala 519:167] + node _T_4228 = and(_T_4226, _T_4227) @[el2_lsu_bus_buffer.scala 519:138] + node _T_4229 = and(_T_4228, any_done_wait_state) @[el2_lsu_bus_buffer.scala 519:187] + node _T_4230 = or(_T_4204, _T_4229) @[el2_lsu_bus_buffer.scala 519:53] + node _T_4231 = mux(_T_4230, UInt<3>("h05"), UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 519:16] + node _T_4232 = mux(_T_4202, UInt<3>("h04"), _T_4231) @[el2_lsu_bus_buffer.scala 518:14] + node _T_4233 = mux(_T_4195, UInt<3>("h00"), _T_4232) @[el2_lsu_bus_buffer.scala 517:31] + buf_nxtstate[3] <= _T_4233 @[el2_lsu_bus_buffer.scala 517:25] + node _T_4234 = eq(bus_rsp_write_tag, UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 520:73] + node _T_4235 = and(bus_rsp_write, _T_4234) @[el2_lsu_bus_buffer.scala 520:52] + node _T_4236 = eq(bus_rsp_read_tag, UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 521:46] + node _T_4237 = bits(buf_ldfwd, 3, 3) @[el2_lsu_bus_buffer.scala 522:23] + node _T_4238 = eq(bus_rsp_read_tag, buf_ldfwdtag[3]) @[el2_lsu_bus_buffer.scala 522:47] + node _T_4239 = and(_T_4237, _T_4238) @[el2_lsu_bus_buffer.scala 522:27] + node _T_4240 = or(_T_4236, _T_4239) @[el2_lsu_bus_buffer.scala 521:77] + node _T_4241 = and(buf_dual[3], buf_dualhi[3]) @[el2_lsu_bus_buffer.scala 523:26] + node _T_4242 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 523:54] + node _T_4243 = not(_T_4242) @[el2_lsu_bus_buffer.scala 523:44] + node _T_4244 = and(_T_4241, _T_4243) @[el2_lsu_bus_buffer.scala 523:42] + node _T_4245 = and(_T_4244, buf_samedw[3]) @[el2_lsu_bus_buffer.scala 523:58] + node _T_4246 = eq(bus_rsp_read_tag, buf_dualtag[3]) @[el2_lsu_bus_buffer.scala 523:94] + node _T_4247 = and(_T_4245, _T_4246) @[el2_lsu_bus_buffer.scala 523:74] + node _T_4248 = or(_T_4240, _T_4247) @[el2_lsu_bus_buffer.scala 522:71] + node _T_4249 = and(bus_rsp_read, _T_4248) @[el2_lsu_bus_buffer.scala 521:25] + node _T_4250 = or(_T_4235, _T_4249) @[el2_lsu_bus_buffer.scala 520:105] + buf_resp_state_bus_en[3] <= _T_4250 @[el2_lsu_bus_buffer.scala 520:34] + buf_state_bus_en[3] <= buf_resp_state_bus_en[3] @[el2_lsu_bus_buffer.scala 524:29] + node _T_4251 = and(buf_state_bus_en[3], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 525:49] + node _T_4252 = or(_T_4251, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 525:70] + buf_state_en[3] <= _T_4252 @[el2_lsu_bus_buffer.scala 525:25] + node _T_4253 = and(buf_state_bus_en[3], bus_rsp_read) @[el2_lsu_bus_buffer.scala 526:47] + node _T_4254 = and(_T_4253, io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 526:62] + buf_data_en[3] <= _T_4254 @[el2_lsu_bus_buffer.scala 526:24] + node _T_4255 = and(buf_state_bus_en[3], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 527:48] + node _T_4256 = eq(bus_rsp_read_tag, UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 527:111] + node _T_4257 = and(bus_rsp_read_error, _T_4256) @[el2_lsu_bus_buffer.scala 527:91] + node _T_4258 = bits(buf_ldfwd, 3, 3) @[el2_lsu_bus_buffer.scala 528:42] + node _T_4259 = and(bus_rsp_read_error, _T_4258) @[el2_lsu_bus_buffer.scala 528:31] + node _T_4260 = eq(bus_rsp_read_tag, buf_ldfwdtag[3]) @[el2_lsu_bus_buffer.scala 528:66] + node _T_4261 = and(_T_4259, _T_4260) @[el2_lsu_bus_buffer.scala 528:46] + node _T_4262 = or(_T_4257, _T_4261) @[el2_lsu_bus_buffer.scala 527:143] + node _T_4263 = and(bus_rsp_write_error, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 529:32] + node _T_4264 = eq(bus_rsp_write_tag, UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 529:74] + node _T_4265 = and(_T_4263, _T_4264) @[el2_lsu_bus_buffer.scala 529:53] + node _T_4266 = or(_T_4262, _T_4265) @[el2_lsu_bus_buffer.scala 528:88] + node _T_4267 = and(_T_4255, _T_4266) @[el2_lsu_bus_buffer.scala 527:68] + buf_error_en[3] <= _T_4267 @[el2_lsu_bus_buffer.scala 527:25] + node _T_4268 = eq(buf_error_en[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 530:50] + node _T_4269 = and(buf_state_en[3], _T_4268) @[el2_lsu_bus_buffer.scala 530:48] + node _T_4270 = bits(buf_addr[3], 2, 2) @[el2_lsu_bus_buffer.scala 530:84] + node _T_4271 = bits(bus_rsp_rdata, 63, 32) @[el2_lsu_bus_buffer.scala 530:102] + node _T_4272 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 530:125] + node _T_4273 = mux(_T_4270, _T_4271, _T_4272) @[el2_lsu_bus_buffer.scala 530:72] + node _T_4274 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 530:148] + node _T_4275 = mux(_T_4269, _T_4273, _T_4274) @[el2_lsu_bus_buffer.scala 530:30] + buf_data_in[3] <= _T_4275 @[el2_lsu_bus_buffer.scala 530:24] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_4276 = eq(UInt<3>("h04"), buf_state[3]) @[Conditional.scala 37:30] + when _T_4276 : @[Conditional.scala 39:67] + node _T_4277 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 533:60] + node _T_4278 = bits(buf_ldfwd, 3, 3) @[el2_lsu_bus_buffer.scala 533:86] + node _T_4279 = dshr(buf_ldfwd, buf_dualtag[3]) @[el2_lsu_bus_buffer.scala 533:101] + node _T_4280 = bits(_T_4279, 0, 0) @[el2_lsu_bus_buffer.scala 533:101] + node _T_4281 = or(_T_4278, _T_4280) @[el2_lsu_bus_buffer.scala 533:90] + node _T_4282 = or(_T_4281, any_done_wait_state) @[el2_lsu_bus_buffer.scala 533:118] + node _T_4283 = mux(_T_4282, UInt<3>("h05"), UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 533:75] + node _T_4284 = mux(_T_4277, UInt<3>("h00"), _T_4283) @[el2_lsu_bus_buffer.scala 533:31] + buf_nxtstate[3] <= _T_4284 @[el2_lsu_bus_buffer.scala 533:25] + node _T_4285 = eq(bus_rsp_read_tag, buf_dualtag[3]) @[el2_lsu_bus_buffer.scala 534:66] + node _T_4286 = dshr(buf_ldfwd, buf_dualtag[3]) @[el2_lsu_bus_buffer.scala 535:21] + node _T_4287 = bits(_T_4286, 0, 0) @[el2_lsu_bus_buffer.scala 535:21] + node _T_4288 = eq(bus_rsp_read_tag, buf_ldfwdtag[buf_dualtag[3]]) @[el2_lsu_bus_buffer.scala 535:58] + node _T_4289 = and(_T_4287, _T_4288) @[el2_lsu_bus_buffer.scala 535:38] + node _T_4290 = or(_T_4285, _T_4289) @[el2_lsu_bus_buffer.scala 534:95] + node _T_4291 = and(bus_rsp_read, _T_4290) @[el2_lsu_bus_buffer.scala 534:45] + buf_state_bus_en[3] <= _T_4291 @[el2_lsu_bus_buffer.scala 534:29] + node _T_4292 = and(buf_state_bus_en[3], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 536:49] + node _T_4293 = or(_T_4292, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 536:70] + buf_state_en[3] <= _T_4293 @[el2_lsu_bus_buffer.scala 536:25] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_4294 = eq(UInt<3>("h05"), buf_state[3]) @[Conditional.scala 37:30] + when _T_4294 : @[Conditional.scala 39:67] + node _T_4295 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 539:60] + node _T_4296 = mux(_T_4295, UInt<3>("h00"), UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 539:31] + buf_nxtstate[3] <= _T_4296 @[el2_lsu_bus_buffer.scala 539:25] + node _T_4297 = eq(RspPtr, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 540:37] + node _T_4298 = eq(buf_dualtag[3], RspPtr) @[el2_lsu_bus_buffer.scala 540:98] + node _T_4299 = and(buf_dual[3], _T_4298) @[el2_lsu_bus_buffer.scala 540:80] + node _T_4300 = or(_T_4297, _T_4299) @[el2_lsu_bus_buffer.scala 540:65] + node _T_4301 = or(_T_4300, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 540:112] + buf_state_en[3] <= _T_4301 @[el2_lsu_bus_buffer.scala 540:25] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_4302 = eq(UInt<3>("h06"), buf_state[3]) @[Conditional.scala 37:30] + when _T_4302 : @[Conditional.scala 39:67] + buf_nxtstate[3] <= UInt<3>("h00") @[el2_lsu_bus_buffer.scala 543:25] + buf_rst[3] <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 544:20] + buf_state_en[3] <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 545:25] + buf_ldfwd_in[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 546:25] + buf_ldfwd_en[3] <= buf_state_en[3] @[el2_lsu_bus_buffer.scala 547:25] + skip @[Conditional.scala 39:67] + node _T_4303 = bits(buf_state_en[3], 0, 0) @[el2_lsu_bus_buffer.scala 550:108] + reg _T_4304 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4303 : @[Reg.scala 28:19] + _T_4304 <= buf_nxtstate[3] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_state[3] <= _T_4304 @[el2_lsu_bus_buffer.scala 550:18] + reg _T_4305 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 551:60] + _T_4305 <= buf_age_in_3 @[el2_lsu_bus_buffer.scala 551:60] + buf_ageQ[3] <= _T_4305 @[el2_lsu_bus_buffer.scala 551:17] + reg _T_4306 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 552:63] + _T_4306 <= buf_rspage_in[3] @[el2_lsu_bus_buffer.scala 552:63] + buf_rspageQ[3] <= _T_4306 @[el2_lsu_bus_buffer.scala 552:20] + node _T_4307 = bits(buf_wr_en[3], 0, 0) @[el2_lsu_bus_buffer.scala 553:109] + reg _T_4308 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4307 : @[Reg.scala 28:19] + _T_4308 <= buf_dualtag_in[3] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_dualtag[3] <= _T_4308 @[el2_lsu_bus_buffer.scala 553:20] + node _T_4309 = bits(buf_dual_in, 3, 3) @[el2_lsu_bus_buffer.scala 554:74] + node _T_4310 = bits(buf_wr_en[3], 0, 0) @[el2_lsu_bus_buffer.scala 554:107] + reg _T_4311 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4310 : @[Reg.scala 28:19] + _T_4311 <= _T_4309 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_dual[3] <= _T_4311 @[el2_lsu_bus_buffer.scala 554:17] + node _T_4312 = bits(buf_samedw_in, 3, 3) @[el2_lsu_bus_buffer.scala 555:78] + node _T_4313 = bits(buf_wr_en[3], 0, 0) @[el2_lsu_bus_buffer.scala 555:111] + reg _T_4314 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4313 : @[Reg.scala 28:19] + _T_4314 <= _T_4312 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_samedw[3] <= _T_4314 @[el2_lsu_bus_buffer.scala 555:19] + node _T_4315 = bits(buf_nomerge_in, 3, 3) @[el2_lsu_bus_buffer.scala 556:80] + node _T_4316 = bits(buf_wr_en[3], 0, 0) @[el2_lsu_bus_buffer.scala 556:113] + reg _T_4317 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4316 : @[Reg.scala 28:19] + _T_4317 <= _T_4315 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_nomerge[3] <= _T_4317 @[el2_lsu_bus_buffer.scala 556:20] + node _T_4318 = bits(buf_dualhi_in, 3, 3) @[el2_lsu_bus_buffer.scala 557:78] + node _T_4319 = bits(buf_wr_en[3], 0, 0) @[el2_lsu_bus_buffer.scala 557:111] + reg _T_4320 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4319 : @[Reg.scala 28:19] + _T_4320 <= _T_4318 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_dualhi[3] <= _T_4320 @[el2_lsu_bus_buffer.scala 557:19] + node _T_4321 = bits(buf_ldfwd_en[0], 0, 0) @[el2_lsu_bus_buffer.scala 560:133] + reg _T_4322 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4321 : @[Reg.scala 28:19] + _T_4322 <= buf_ldfwd_in[0] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4323 = bits(buf_ldfwd_en[1], 0, 0) @[el2_lsu_bus_buffer.scala 560:133] + reg _T_4324 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4323 : @[Reg.scala 28:19] + _T_4324 <= buf_ldfwd_in[1] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4325 = bits(buf_ldfwd_en[2], 0, 0) @[el2_lsu_bus_buffer.scala 560:133] + reg _T_4326 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4325 : @[Reg.scala 28:19] + _T_4326 <= buf_ldfwd_in[2] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4327 = bits(buf_ldfwd_en[3], 0, 0) @[el2_lsu_bus_buffer.scala 560:133] + reg _T_4328 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4327 : @[Reg.scala 28:19] + _T_4328 <= buf_ldfwd_in[3] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4329 = cat(_T_4328, _T_4326) @[Cat.scala 29:58] + node _T_4330 = cat(_T_4329, _T_4324) @[Cat.scala 29:58] + node _T_4331 = cat(_T_4330, _T_4322) @[Cat.scala 29:58] + buf_ldfwd <= _T_4331 @[el2_lsu_bus_buffer.scala 560:15] + node _T_4332 = bits(buf_ldfwd_en[0], 0, 0) @[el2_lsu_bus_buffer.scala 561:134] + reg _T_4333 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4332 : @[Reg.scala 28:19] + _T_4333 <= buf_ldfwdtag_in[0] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4334 = bits(buf_ldfwd_en[1], 0, 0) @[el2_lsu_bus_buffer.scala 561:134] + reg _T_4335 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4334 : @[Reg.scala 28:19] + _T_4335 <= buf_ldfwdtag_in[1] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4336 = bits(buf_ldfwd_en[2], 0, 0) @[el2_lsu_bus_buffer.scala 561:134] + reg _T_4337 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4336 : @[Reg.scala 28:19] + _T_4337 <= buf_ldfwdtag_in[2] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4338 = bits(buf_ldfwd_en[3], 0, 0) @[el2_lsu_bus_buffer.scala 561:134] + reg _T_4339 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4338 : @[Reg.scala 28:19] + _T_4339 <= buf_ldfwdtag_in[3] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_ldfwdtag[0] <= _T_4333 @[el2_lsu_bus_buffer.scala 561:18] + buf_ldfwdtag[1] <= _T_4335 @[el2_lsu_bus_buffer.scala 561:18] + buf_ldfwdtag[2] <= _T_4337 @[el2_lsu_bus_buffer.scala 561:18] + buf_ldfwdtag[3] <= _T_4339 @[el2_lsu_bus_buffer.scala 561:18] + node _T_4340 = bits(buf_sideeffect_in, 0, 0) @[el2_lsu_bus_buffer.scala 562:107] + node _T_4341 = bits(buf_wr_en[0], 0, 0) @[el2_lsu_bus_buffer.scala 562:140] + reg _T_4342 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4341 : @[Reg.scala 28:19] + _T_4342 <= _T_4340 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4343 = bits(buf_sideeffect_in, 1, 1) @[el2_lsu_bus_buffer.scala 562:107] + node _T_4344 = bits(buf_wr_en[1], 0, 0) @[el2_lsu_bus_buffer.scala 562:140] + reg _T_4345 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4344 : @[Reg.scala 28:19] + _T_4345 <= _T_4343 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4346 = bits(buf_sideeffect_in, 2, 2) @[el2_lsu_bus_buffer.scala 562:107] + node _T_4347 = bits(buf_wr_en[2], 0, 0) @[el2_lsu_bus_buffer.scala 562:140] + reg _T_4348 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4347 : @[Reg.scala 28:19] + _T_4348 <= _T_4346 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4349 = bits(buf_sideeffect_in, 3, 3) @[el2_lsu_bus_buffer.scala 562:107] + node _T_4350 = bits(buf_wr_en[3], 0, 0) @[el2_lsu_bus_buffer.scala 562:140] + reg _T_4351 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4350 : @[Reg.scala 28:19] + _T_4351 <= _T_4349 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4352 = cat(_T_4351, _T_4348) @[Cat.scala 29:58] + node _T_4353 = cat(_T_4352, _T_4345) @[Cat.scala 29:58] + node _T_4354 = cat(_T_4353, _T_4342) @[Cat.scala 29:58] + buf_sideeffect <= _T_4354 @[el2_lsu_bus_buffer.scala 562:20] + node _T_4355 = bits(buf_unsign_in, 0, 0) @[el2_lsu_bus_buffer.scala 563:99] + node _T_4356 = bits(buf_wr_en[0], 0, 0) @[el2_lsu_bus_buffer.scala 563:132] + reg _T_4357 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4356 : @[Reg.scala 28:19] + _T_4357 <= _T_4355 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4358 = bits(buf_unsign_in, 1, 1) @[el2_lsu_bus_buffer.scala 563:99] + node _T_4359 = bits(buf_wr_en[1], 0, 0) @[el2_lsu_bus_buffer.scala 563:132] + reg _T_4360 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4359 : @[Reg.scala 28:19] + _T_4360 <= _T_4358 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4361 = bits(buf_unsign_in, 2, 2) @[el2_lsu_bus_buffer.scala 563:99] + node _T_4362 = bits(buf_wr_en[2], 0, 0) @[el2_lsu_bus_buffer.scala 563:132] + reg _T_4363 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4362 : @[Reg.scala 28:19] + _T_4363 <= _T_4361 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4364 = bits(buf_unsign_in, 3, 3) @[el2_lsu_bus_buffer.scala 563:99] + node _T_4365 = bits(buf_wr_en[3], 0, 0) @[el2_lsu_bus_buffer.scala 563:132] + reg _T_4366 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4365 : @[Reg.scala 28:19] + _T_4366 <= _T_4364 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4367 = cat(_T_4366, _T_4363) @[Cat.scala 29:58] + node _T_4368 = cat(_T_4367, _T_4360) @[Cat.scala 29:58] + node _T_4369 = cat(_T_4368, _T_4357) @[Cat.scala 29:58] + buf_unsign <= _T_4369 @[el2_lsu_bus_buffer.scala 563:16] + node _T_4370 = bits(buf_write_in, 0, 0) @[el2_lsu_bus_buffer.scala 564:97] + node _T_4371 = bits(buf_wr_en[0], 0, 0) @[el2_lsu_bus_buffer.scala 564:130] + reg _T_4372 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4371 : @[Reg.scala 28:19] + _T_4372 <= _T_4370 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4373 = bits(buf_write_in, 1, 1) @[el2_lsu_bus_buffer.scala 564:97] + node _T_4374 = bits(buf_wr_en[1], 0, 0) @[el2_lsu_bus_buffer.scala 564:130] + reg _T_4375 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4374 : @[Reg.scala 28:19] + _T_4375 <= _T_4373 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4376 = bits(buf_write_in, 2, 2) @[el2_lsu_bus_buffer.scala 564:97] + node _T_4377 = bits(buf_wr_en[2], 0, 0) @[el2_lsu_bus_buffer.scala 564:130] + reg _T_4378 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4377 : @[Reg.scala 28:19] + _T_4378 <= _T_4376 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4379 = bits(buf_write_in, 3, 3) @[el2_lsu_bus_buffer.scala 564:97] + node _T_4380 = bits(buf_wr_en[3], 0, 0) @[el2_lsu_bus_buffer.scala 564:130] + reg _T_4381 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4380 : @[Reg.scala 28:19] + _T_4381 <= _T_4379 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4382 = cat(_T_4381, _T_4378) @[Cat.scala 29:58] + node _T_4383 = cat(_T_4382, _T_4375) @[Cat.scala 29:58] + node _T_4384 = cat(_T_4383, _T_4372) @[Cat.scala 29:58] + buf_write <= _T_4384 @[el2_lsu_bus_buffer.scala 564:15] + node _T_4385 = bits(buf_wr_en[0], 0, 0) @[el2_lsu_bus_buffer.scala 565:119] + reg _T_4386 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4385 : @[Reg.scala 28:19] + _T_4386 <= buf_sz_in[0] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4387 = bits(buf_wr_en[1], 0, 0) @[el2_lsu_bus_buffer.scala 565:119] + reg _T_4388 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4387 : @[Reg.scala 28:19] + _T_4388 <= buf_sz_in[1] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4389 = bits(buf_wr_en[2], 0, 0) @[el2_lsu_bus_buffer.scala 565:119] + reg _T_4390 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4389 : @[Reg.scala 28:19] + _T_4390 <= buf_sz_in[2] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4391 = bits(buf_wr_en[3], 0, 0) @[el2_lsu_bus_buffer.scala 565:119] + reg _T_4392 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4391 : @[Reg.scala 28:19] + _T_4392 <= buf_sz_in[3] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_sz[0] <= _T_4386 @[el2_lsu_bus_buffer.scala 565:12] + buf_sz[1] <= _T_4388 @[el2_lsu_bus_buffer.scala 565:12] + buf_sz[2] <= _T_4390 @[el2_lsu_bus_buffer.scala 565:12] + buf_sz[3] <= _T_4392 @[el2_lsu_bus_buffer.scala 565:12] + node _T_4393 = bits(buf_wr_en[0], 0, 0) @[el2_lsu_bus_buffer.scala 566:82] + inst rvclkhdr_4 of rvclkhdr_4 @[el2_lib.scala 506:23] + rvclkhdr_4.clock <= clock + rvclkhdr_4.reset <= reset + rvclkhdr_4.io.clk <= clock @[el2_lib.scala 508:18] + rvclkhdr_4.io.en <= _T_4393 @[el2_lib.scala 509:17] + rvclkhdr_4.io.scan_mode <= io.scan_mode @[el2_lib.scala 510:24] + reg _T_4394 : UInt, rvclkhdr_4.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 512:16] + _T_4394 <= buf_addr_in[0] @[el2_lib.scala 512:16] + node _T_4395 = bits(buf_wr_en[1], 0, 0) @[el2_lsu_bus_buffer.scala 566:82] + inst rvclkhdr_5 of rvclkhdr_5 @[el2_lib.scala 506:23] + rvclkhdr_5.clock <= clock + rvclkhdr_5.reset <= reset + rvclkhdr_5.io.clk <= clock @[el2_lib.scala 508:18] + rvclkhdr_5.io.en <= _T_4395 @[el2_lib.scala 509:17] + rvclkhdr_5.io.scan_mode <= io.scan_mode @[el2_lib.scala 510:24] + reg _T_4396 : UInt, rvclkhdr_5.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 512:16] + _T_4396 <= buf_addr_in[1] @[el2_lib.scala 512:16] + node _T_4397 = bits(buf_wr_en[2], 0, 0) @[el2_lsu_bus_buffer.scala 566:82] + inst rvclkhdr_6 of rvclkhdr_6 @[el2_lib.scala 506:23] + rvclkhdr_6.clock <= clock + rvclkhdr_6.reset <= reset + rvclkhdr_6.io.clk <= clock @[el2_lib.scala 508:18] + rvclkhdr_6.io.en <= _T_4397 @[el2_lib.scala 509:17] + rvclkhdr_6.io.scan_mode <= io.scan_mode @[el2_lib.scala 510:24] + reg _T_4398 : UInt, rvclkhdr_6.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 512:16] + _T_4398 <= buf_addr_in[2] @[el2_lib.scala 512:16] + node _T_4399 = bits(buf_wr_en[3], 0, 0) @[el2_lsu_bus_buffer.scala 566:82] + inst rvclkhdr_7 of rvclkhdr_7 @[el2_lib.scala 506:23] + rvclkhdr_7.clock <= clock + rvclkhdr_7.reset <= reset + rvclkhdr_7.io.clk <= clock @[el2_lib.scala 508:18] + rvclkhdr_7.io.en <= _T_4399 @[el2_lib.scala 509:17] + rvclkhdr_7.io.scan_mode <= io.scan_mode @[el2_lib.scala 510:24] + reg _T_4400 : UInt, rvclkhdr_7.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 512:16] + _T_4400 <= buf_addr_in[3] @[el2_lib.scala 512:16] + buf_addr[0] <= _T_4394 @[el2_lsu_bus_buffer.scala 566:14] + buf_addr[1] <= _T_4396 @[el2_lsu_bus_buffer.scala 566:14] + buf_addr[2] <= _T_4398 @[el2_lsu_bus_buffer.scala 566:14] + buf_addr[3] <= _T_4400 @[el2_lsu_bus_buffer.scala 566:14] + node _T_4401 = bits(buf_wr_en[0], 0, 0) @[el2_lsu_bus_buffer.scala 567:127] + reg _T_4402 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4401 : @[Reg.scala 28:19] + _T_4402 <= buf_byteen_in[0] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4403 = bits(buf_wr_en[1], 0, 0) @[el2_lsu_bus_buffer.scala 567:127] + reg _T_4404 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4403 : @[Reg.scala 28:19] + _T_4404 <= buf_byteen_in[1] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4405 = bits(buf_wr_en[2], 0, 0) @[el2_lsu_bus_buffer.scala 567:127] + reg _T_4406 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4405 : @[Reg.scala 28:19] + _T_4406 <= buf_byteen_in[2] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4407 = bits(buf_wr_en[3], 0, 0) @[el2_lsu_bus_buffer.scala 567:127] + reg _T_4408 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4407 : @[Reg.scala 28:19] + _T_4408 <= buf_byteen_in[3] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_byteen[0] <= _T_4402 @[el2_lsu_bus_buffer.scala 567:16] + buf_byteen[1] <= _T_4404 @[el2_lsu_bus_buffer.scala 567:16] + buf_byteen[2] <= _T_4406 @[el2_lsu_bus_buffer.scala 567:16] + buf_byteen[3] <= _T_4408 @[el2_lsu_bus_buffer.scala 567:16] + inst rvclkhdr_8 of rvclkhdr_8 @[el2_lib.scala 506:23] + rvclkhdr_8.clock <= clock + rvclkhdr_8.reset <= reset + rvclkhdr_8.io.clk <= clock @[el2_lib.scala 508:18] + rvclkhdr_8.io.en <= buf_data_en[0] @[el2_lib.scala 509:17] + rvclkhdr_8.io.scan_mode <= io.scan_mode @[el2_lib.scala 510:24] + reg _T_4409 : UInt, rvclkhdr_8.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 512:16] + _T_4409 <= buf_data_in[0] @[el2_lib.scala 512:16] + inst rvclkhdr_9 of rvclkhdr_9 @[el2_lib.scala 506:23] + rvclkhdr_9.clock <= clock + rvclkhdr_9.reset <= reset + rvclkhdr_9.io.clk <= clock @[el2_lib.scala 508:18] + rvclkhdr_9.io.en <= buf_data_en[1] @[el2_lib.scala 509:17] + rvclkhdr_9.io.scan_mode <= io.scan_mode @[el2_lib.scala 510:24] + reg _T_4410 : UInt, rvclkhdr_9.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 512:16] + _T_4410 <= buf_data_in[1] @[el2_lib.scala 512:16] + inst rvclkhdr_10 of rvclkhdr_10 @[el2_lib.scala 506:23] + rvclkhdr_10.clock <= clock + rvclkhdr_10.reset <= reset + rvclkhdr_10.io.clk <= clock @[el2_lib.scala 508:18] + rvclkhdr_10.io.en <= buf_data_en[2] @[el2_lib.scala 509:17] + rvclkhdr_10.io.scan_mode <= io.scan_mode @[el2_lib.scala 510:24] + reg _T_4411 : UInt, rvclkhdr_10.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 512:16] + _T_4411 <= buf_data_in[2] @[el2_lib.scala 512:16] + inst rvclkhdr_11 of rvclkhdr_11 @[el2_lib.scala 506:23] + rvclkhdr_11.clock <= clock + rvclkhdr_11.reset <= reset + rvclkhdr_11.io.clk <= clock @[el2_lib.scala 508:18] + rvclkhdr_11.io.en <= buf_data_en[3] @[el2_lib.scala 509:17] + rvclkhdr_11.io.scan_mode <= io.scan_mode @[el2_lib.scala 510:24] + reg _T_4412 : UInt, rvclkhdr_11.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 512:16] + _T_4412 <= buf_data_in[3] @[el2_lib.scala 512:16] + buf_data[0] <= _T_4409 @[el2_lsu_bus_buffer.scala 568:14] + buf_data[1] <= _T_4410 @[el2_lsu_bus_buffer.scala 568:14] + buf_data[2] <= _T_4411 @[el2_lsu_bus_buffer.scala 568:14] + buf_data[3] <= _T_4412 @[el2_lsu_bus_buffer.scala 568:14] + node _T_4413 = bits(buf_error, 0, 0) @[el2_lsu_bus_buffer.scala 569:121] + node _T_4414 = mux(buf_error_en[0], UInt<1>("h01"), _T_4413) @[el2_lsu_bus_buffer.scala 569:86] + node _T_4415 = eq(buf_rst[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 569:128] + node _T_4416 = and(_T_4414, _T_4415) @[el2_lsu_bus_buffer.scala 569:126] + reg _T_4417 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 569:82] + _T_4417 <= _T_4416 @[el2_lsu_bus_buffer.scala 569:82] + node _T_4418 = bits(buf_error, 1, 1) @[el2_lsu_bus_buffer.scala 569:121] + node _T_4419 = mux(buf_error_en[1], UInt<1>("h01"), _T_4418) @[el2_lsu_bus_buffer.scala 569:86] + node _T_4420 = eq(buf_rst[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 569:128] + node _T_4421 = and(_T_4419, _T_4420) @[el2_lsu_bus_buffer.scala 569:126] + reg _T_4422 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 569:82] + _T_4422 <= _T_4421 @[el2_lsu_bus_buffer.scala 569:82] + node _T_4423 = bits(buf_error, 2, 2) @[el2_lsu_bus_buffer.scala 569:121] + node _T_4424 = mux(buf_error_en[2], UInt<1>("h01"), _T_4423) @[el2_lsu_bus_buffer.scala 569:86] + node _T_4425 = eq(buf_rst[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 569:128] + node _T_4426 = and(_T_4424, _T_4425) @[el2_lsu_bus_buffer.scala 569:126] + reg _T_4427 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 569:82] + _T_4427 <= _T_4426 @[el2_lsu_bus_buffer.scala 569:82] + node _T_4428 = bits(buf_error, 3, 3) @[el2_lsu_bus_buffer.scala 569:121] + node _T_4429 = mux(buf_error_en[3], UInt<1>("h01"), _T_4428) @[el2_lsu_bus_buffer.scala 569:86] + node _T_4430 = eq(buf_rst[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 569:128] + node _T_4431 = and(_T_4429, _T_4430) @[el2_lsu_bus_buffer.scala 569:126] + reg _T_4432 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 569:82] + _T_4432 <= _T_4431 @[el2_lsu_bus_buffer.scala 569:82] + node _T_4433 = cat(_T_4432, _T_4427) @[Cat.scala 29:58] + node _T_4434 = cat(_T_4433, _T_4422) @[Cat.scala 29:58] + node _T_4435 = cat(_T_4434, _T_4417) @[Cat.scala 29:58] + buf_error <= _T_4435 @[el2_lsu_bus_buffer.scala 569:15] + node _T_4436 = cat(io.lsu_busreq_m, UInt<1>("h00")) @[Cat.scala 29:58] + node _T_4437 = mux(io.ldst_dual_m, _T_4436, io.lsu_busreq_m) @[el2_lsu_bus_buffer.scala 572:28] + node _T_4438 = cat(io.lsu_busreq_r, UInt<1>("h00")) @[Cat.scala 29:58] + node _T_4439 = mux(io.ldst_dual_r, _T_4438, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 572:94] + node _T_4440 = add(_T_4437, _T_4439) @[el2_lsu_bus_buffer.scala 572:88] + node _T_4441 = add(_T_4440, ibuf_valid) @[el2_lsu_bus_buffer.scala 572:154] + node _T_4442 = neq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 572:190] + node _T_4443 = neq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 572:190] + node _T_4444 = neq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 572:190] + node _T_4445 = neq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 572:190] + node _T_4446 = add(_T_4442, _T_4443) @[el2_lsu_bus_buffer.scala 572:217] + node _T_4447 = add(_T_4446, _T_4444) @[el2_lsu_bus_buffer.scala 572:217] + node _T_4448 = add(_T_4447, _T_4445) @[el2_lsu_bus_buffer.scala 572:217] + node _T_4449 = add(_T_4441, _T_4448) @[el2_lsu_bus_buffer.scala 572:169] + node buf_numvld_any = tail(_T_4449, 1) @[el2_lsu_bus_buffer.scala 572:169] + node _T_4450 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 573:60] + node _T_4451 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 573:79] + node _T_4452 = and(_T_4450, _T_4451) @[el2_lsu_bus_buffer.scala 573:64] + node _T_4453 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 573:91] + node _T_4454 = and(_T_4452, _T_4453) @[el2_lsu_bus_buffer.scala 573:89] + node _T_4455 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 573:60] + node _T_4456 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 573:79] + node _T_4457 = and(_T_4455, _T_4456) @[el2_lsu_bus_buffer.scala 573:64] + node _T_4458 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 573:91] + node _T_4459 = and(_T_4457, _T_4458) @[el2_lsu_bus_buffer.scala 573:89] + node _T_4460 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 573:60] + node _T_4461 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 573:79] + node _T_4462 = and(_T_4460, _T_4461) @[el2_lsu_bus_buffer.scala 573:64] + node _T_4463 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 573:91] + node _T_4464 = and(_T_4462, _T_4463) @[el2_lsu_bus_buffer.scala 573:89] + node _T_4465 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 573:60] + node _T_4466 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 573:79] + node _T_4467 = and(_T_4465, _T_4466) @[el2_lsu_bus_buffer.scala 573:64] + node _T_4468 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 573:91] + node _T_4469 = and(_T_4467, _T_4468) @[el2_lsu_bus_buffer.scala 573:89] + node _T_4470 = add(_T_4469, _T_4464) @[el2_lsu_bus_buffer.scala 573:142] + node _T_4471 = add(_T_4470, _T_4459) @[el2_lsu_bus_buffer.scala 573:142] + node _T_4472 = add(_T_4471, _T_4454) @[el2_lsu_bus_buffer.scala 573:142] + buf_numvld_wrcmd_any <= _T_4472 @[el2_lsu_bus_buffer.scala 573:24] + node _T_4473 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 574:63] + node _T_4474 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 574:75] + node _T_4475 = and(_T_4473, _T_4474) @[el2_lsu_bus_buffer.scala 574:73] + node _T_4476 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 574:63] + node _T_4477 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 574:75] + node _T_4478 = and(_T_4476, _T_4477) @[el2_lsu_bus_buffer.scala 574:73] + node _T_4479 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 574:63] + node _T_4480 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 574:75] + node _T_4481 = and(_T_4479, _T_4480) @[el2_lsu_bus_buffer.scala 574:73] + node _T_4482 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 574:63] + node _T_4483 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 574:75] + node _T_4484 = and(_T_4482, _T_4483) @[el2_lsu_bus_buffer.scala 574:73] + node _T_4485 = add(_T_4484, _T_4481) @[el2_lsu_bus_buffer.scala 574:126] + node _T_4486 = add(_T_4485, _T_4478) @[el2_lsu_bus_buffer.scala 574:126] + node _T_4487 = add(_T_4486, _T_4475) @[el2_lsu_bus_buffer.scala 574:126] + buf_numvld_cmd_any <= _T_4487 @[el2_lsu_bus_buffer.scala 574:22] + node _T_4488 = eq(buf_state[0], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 575:63] + node _T_4489 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 575:90] + node _T_4490 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 575:102] + node _T_4491 = and(_T_4489, _T_4490) @[el2_lsu_bus_buffer.scala 575:100] + node _T_4492 = or(_T_4488, _T_4491) @[el2_lsu_bus_buffer.scala 575:74] + node _T_4493 = eq(buf_state[1], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 575:63] + node _T_4494 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 575:90] + node _T_4495 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 575:102] + node _T_4496 = and(_T_4494, _T_4495) @[el2_lsu_bus_buffer.scala 575:100] + node _T_4497 = or(_T_4493, _T_4496) @[el2_lsu_bus_buffer.scala 575:74] + node _T_4498 = eq(buf_state[2], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 575:63] + node _T_4499 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 575:90] + node _T_4500 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 575:102] + node _T_4501 = and(_T_4499, _T_4500) @[el2_lsu_bus_buffer.scala 575:100] + node _T_4502 = or(_T_4498, _T_4501) @[el2_lsu_bus_buffer.scala 575:74] + node _T_4503 = eq(buf_state[3], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 575:63] + node _T_4504 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 575:90] + node _T_4505 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 575:102] + node _T_4506 = and(_T_4504, _T_4505) @[el2_lsu_bus_buffer.scala 575:100] + node _T_4507 = or(_T_4503, _T_4506) @[el2_lsu_bus_buffer.scala 575:74] + node _T_4508 = add(_T_4507, _T_4502) @[el2_lsu_bus_buffer.scala 575:154] + node _T_4509 = add(_T_4508, _T_4497) @[el2_lsu_bus_buffer.scala 575:154] + node _T_4510 = add(_T_4509, _T_4492) @[el2_lsu_bus_buffer.scala 575:154] + buf_numvld_pend_any <= _T_4510 @[el2_lsu_bus_buffer.scala 575:23] + node _T_4511 = eq(buf_state[0], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 576:61] + node _T_4512 = eq(buf_state[1], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 576:61] + node _T_4513 = eq(buf_state[2], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 576:61] + node _T_4514 = eq(buf_state[3], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 576:61] + node _T_4515 = or(_T_4514, _T_4513) @[el2_lsu_bus_buffer.scala 576:93] + node _T_4516 = or(_T_4515, _T_4512) @[el2_lsu_bus_buffer.scala 576:93] + node _T_4517 = or(_T_4516, _T_4511) @[el2_lsu_bus_buffer.scala 576:93] + any_done_wait_state <= _T_4517 @[el2_lsu_bus_buffer.scala 576:23] + node _T_4518 = orr(buf_numvld_pend_any) @[el2_lsu_bus_buffer.scala 577:53] + io.lsu_bus_buffer_pend_any <= _T_4518 @[el2_lsu_bus_buffer.scala 577:30] + node _T_4519 = and(io.ldst_dual_d, io.dec_lsu_valid_raw_d) @[el2_lsu_bus_buffer.scala 578:52] + node _T_4520 = geq(buf_numvld_any, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 578:92] + node _T_4521 = eq(buf_numvld_any, UInt<3>("h04")) @[el2_lsu_bus_buffer.scala 578:121] + node _T_4522 = mux(_T_4519, _T_4520, _T_4521) @[el2_lsu_bus_buffer.scala 578:36] + io.lsu_bus_buffer_full_any <= _T_4522 @[el2_lsu_bus_buffer.scala 578:30] + node _T_4523 = orr(buf_state[0]) @[el2_lsu_bus_buffer.scala 579:52] + node _T_4524 = orr(buf_state[1]) @[el2_lsu_bus_buffer.scala 579:52] + node _T_4525 = orr(buf_state[2]) @[el2_lsu_bus_buffer.scala 579:52] + node _T_4526 = orr(buf_state[3]) @[el2_lsu_bus_buffer.scala 579:52] + node _T_4527 = or(_T_4523, _T_4524) @[el2_lsu_bus_buffer.scala 579:65] + node _T_4528 = or(_T_4527, _T_4525) @[el2_lsu_bus_buffer.scala 579:65] + node _T_4529 = or(_T_4528, _T_4526) @[el2_lsu_bus_buffer.scala 579:65] + node _T_4530 = eq(_T_4529, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 579:34] + node _T_4531 = eq(ibuf_valid, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 579:72] + node _T_4532 = and(_T_4530, _T_4531) @[el2_lsu_bus_buffer.scala 579:70] + node _T_4533 = eq(obuf_valid, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 579:86] + node _T_4534 = and(_T_4532, _T_4533) @[el2_lsu_bus_buffer.scala 579:84] + io.lsu_bus_buffer_empty_any <= _T_4534 @[el2_lsu_bus_buffer.scala 579:31] + node _T_4535 = and(io.lsu_busreq_m, io.lsu_pkt_m.valid) @[el2_lsu_bus_buffer.scala 581:51] + node _T_4536 = and(_T_4535, io.lsu_pkt_m.load) @[el2_lsu_bus_buffer.scala 581:72] + node _T_4537 = eq(io.flush_m_up, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 581:94] + node _T_4538 = and(_T_4536, _T_4537) @[el2_lsu_bus_buffer.scala 581:92] + node _T_4539 = eq(io.ld_full_hit_m, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 581:111] + node _T_4540 = and(_T_4538, _T_4539) @[el2_lsu_bus_buffer.scala 581:109] + io.lsu_nonblock_load_valid_m <= _T_4540 @[el2_lsu_bus_buffer.scala 581:32] + io.lsu_nonblock_load_tag_m <= WrPtr0_m @[el2_lsu_bus_buffer.scala 582:30] + wire lsu_nonblock_load_valid_r : UInt<1> + lsu_nonblock_load_valid_r <= UInt<1>("h00") + node _T_4541 = eq(io.lsu_commit_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 584:61] + node _T_4542 = and(lsu_nonblock_load_valid_r, _T_4541) @[el2_lsu_bus_buffer.scala 584:59] + io.lsu_nonblock_load_inv_r <= _T_4542 @[el2_lsu_bus_buffer.scala 584:30] + io.lsu_nonblock_load_inv_tag_r <= WrPtr0_r @[el2_lsu_bus_buffer.scala 585:34] + node _T_4543 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 586:80] + node _T_4544 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 586:127] + node _T_4545 = and(UInt<1>("h01"), _T_4544) @[el2_lsu_bus_buffer.scala 586:116] + node _T_4546 = eq(_T_4545, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 586:95] + node _T_4547 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 586:80] + node _T_4548 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 586:127] + node _T_4549 = and(UInt<1>("h01"), _T_4548) @[el2_lsu_bus_buffer.scala 586:116] + node _T_4550 = eq(_T_4549, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 586:95] + node _T_4551 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 586:80] + node _T_4552 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 586:127] + node _T_4553 = and(UInt<1>("h01"), _T_4552) @[el2_lsu_bus_buffer.scala 586:116] + node _T_4554 = eq(_T_4553, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 586:95] + node _T_4555 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 586:80] + node _T_4556 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 586:127] + node _T_4557 = and(UInt<1>("h01"), _T_4556) @[el2_lsu_bus_buffer.scala 586:116] + node _T_4558 = eq(_T_4557, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 586:95] + node _T_4559 = mux(_T_4543, _T_4546, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4560 = mux(_T_4547, _T_4550, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4561 = mux(_T_4551, _T_4554, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4562 = mux(_T_4555, _T_4558, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4563 = or(_T_4559, _T_4560) @[Mux.scala 27:72] + node _T_4564 = or(_T_4563, _T_4561) @[Mux.scala 27:72] + node _T_4565 = or(_T_4564, _T_4562) @[Mux.scala 27:72] + wire lsu_nonblock_load_data_ready : UInt<1> @[Mux.scala 27:72] + lsu_nonblock_load_data_ready <= _T_4565 @[Mux.scala 27:72] + node _T_4566 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 587:80] + node _T_4567 = bits(buf_error, 0, 0) @[el2_lsu_bus_buffer.scala 587:104] + node _T_4568 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 587:120] + node _T_4569 = eq(_T_4568, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 587:110] + node _T_4570 = and(_T_4567, _T_4569) @[el2_lsu_bus_buffer.scala 587:108] + node _T_4571 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 587:80] + node _T_4572 = bits(buf_error, 1, 1) @[el2_lsu_bus_buffer.scala 587:104] + node _T_4573 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 587:120] + node _T_4574 = eq(_T_4573, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 587:110] + node _T_4575 = and(_T_4572, _T_4574) @[el2_lsu_bus_buffer.scala 587:108] + node _T_4576 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 587:80] + node _T_4577 = bits(buf_error, 2, 2) @[el2_lsu_bus_buffer.scala 587:104] + node _T_4578 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 587:120] + node _T_4579 = eq(_T_4578, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 587:110] + node _T_4580 = and(_T_4577, _T_4579) @[el2_lsu_bus_buffer.scala 587:108] + node _T_4581 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 587:80] + node _T_4582 = bits(buf_error, 3, 3) @[el2_lsu_bus_buffer.scala 587:104] + node _T_4583 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 587:120] + node _T_4584 = eq(_T_4583, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 587:110] + node _T_4585 = and(_T_4582, _T_4584) @[el2_lsu_bus_buffer.scala 587:108] + node _T_4586 = mux(_T_4566, _T_4570, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4587 = mux(_T_4571, _T_4575, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4588 = mux(_T_4576, _T_4580, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4589 = mux(_T_4581, _T_4585, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4590 = or(_T_4586, _T_4587) @[Mux.scala 27:72] + node _T_4591 = or(_T_4590, _T_4588) @[Mux.scala 27:72] + node _T_4592 = or(_T_4591, _T_4589) @[Mux.scala 27:72] + wire _T_4593 : UInt<1> @[Mux.scala 27:72] + _T_4593 <= _T_4592 @[Mux.scala 27:72] + io.lsu_nonblock_load_data_error <= _T_4593 @[el2_lsu_bus_buffer.scala 587:35] + node _T_4594 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 588:79] + node _T_4595 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 588:102] + node _T_4596 = eq(_T_4595, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 588:92] + node _T_4597 = and(_T_4594, _T_4596) @[el2_lsu_bus_buffer.scala 588:90] + node _T_4598 = eq(buf_dual[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 588:109] + node _T_4599 = eq(buf_dualhi[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 588:124] + node _T_4600 = or(_T_4598, _T_4599) @[el2_lsu_bus_buffer.scala 588:122] + node _T_4601 = and(_T_4597, _T_4600) @[el2_lsu_bus_buffer.scala 588:106] + node _T_4602 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 588:79] + node _T_4603 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 588:102] + node _T_4604 = eq(_T_4603, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 588:92] + node _T_4605 = and(_T_4602, _T_4604) @[el2_lsu_bus_buffer.scala 588:90] + node _T_4606 = eq(buf_dual[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 588:109] + node _T_4607 = eq(buf_dualhi[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 588:124] + node _T_4608 = or(_T_4606, _T_4607) @[el2_lsu_bus_buffer.scala 588:122] + node _T_4609 = and(_T_4605, _T_4608) @[el2_lsu_bus_buffer.scala 588:106] + node _T_4610 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 588:79] + node _T_4611 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 588:102] + node _T_4612 = eq(_T_4611, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 588:92] + node _T_4613 = and(_T_4610, _T_4612) @[el2_lsu_bus_buffer.scala 588:90] + node _T_4614 = eq(buf_dual[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 588:109] + node _T_4615 = eq(buf_dualhi[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 588:124] + node _T_4616 = or(_T_4614, _T_4615) @[el2_lsu_bus_buffer.scala 588:122] + node _T_4617 = and(_T_4613, _T_4616) @[el2_lsu_bus_buffer.scala 588:106] + node _T_4618 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 588:79] + node _T_4619 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 588:102] + node _T_4620 = eq(_T_4619, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 588:92] + node _T_4621 = and(_T_4618, _T_4620) @[el2_lsu_bus_buffer.scala 588:90] + node _T_4622 = eq(buf_dual[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 588:109] + node _T_4623 = eq(buf_dualhi[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 588:124] + node _T_4624 = or(_T_4622, _T_4623) @[el2_lsu_bus_buffer.scala 588:122] + node _T_4625 = and(_T_4621, _T_4624) @[el2_lsu_bus_buffer.scala 588:106] + node _T_4626 = mux(_T_4601, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4627 = mux(_T_4609, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4628 = mux(_T_4617, UInt<2>("h02"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4629 = mux(_T_4625, UInt<2>("h03"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4630 = or(_T_4626, _T_4627) @[Mux.scala 27:72] + node _T_4631 = or(_T_4630, _T_4628) @[Mux.scala 27:72] + node _T_4632 = or(_T_4631, _T_4629) @[Mux.scala 27:72] + wire _T_4633 : UInt<2> @[Mux.scala 27:72] + _T_4633 <= _T_4632 @[Mux.scala 27:72] + io.lsu_nonblock_load_data_tag <= _T_4633 @[el2_lsu_bus_buffer.scala 588:33] + node _T_4634 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 589:78] + node _T_4635 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 589:101] + node _T_4636 = eq(_T_4635, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 589:91] + node _T_4637 = and(_T_4634, _T_4636) @[el2_lsu_bus_buffer.scala 589:89] + node _T_4638 = eq(buf_dual[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 589:108] + node _T_4639 = eq(buf_dualhi[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 589:123] + node _T_4640 = or(_T_4638, _T_4639) @[el2_lsu_bus_buffer.scala 589:121] + node _T_4641 = and(_T_4637, _T_4640) @[el2_lsu_bus_buffer.scala 589:105] + node _T_4642 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 589:78] + node _T_4643 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 589:101] + node _T_4644 = eq(_T_4643, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 589:91] + node _T_4645 = and(_T_4642, _T_4644) @[el2_lsu_bus_buffer.scala 589:89] + node _T_4646 = eq(buf_dual[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 589:108] + node _T_4647 = eq(buf_dualhi[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 589:123] + node _T_4648 = or(_T_4646, _T_4647) @[el2_lsu_bus_buffer.scala 589:121] + node _T_4649 = and(_T_4645, _T_4648) @[el2_lsu_bus_buffer.scala 589:105] + node _T_4650 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 589:78] + node _T_4651 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 589:101] + node _T_4652 = eq(_T_4651, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 589:91] + node _T_4653 = and(_T_4650, _T_4652) @[el2_lsu_bus_buffer.scala 589:89] + node _T_4654 = eq(buf_dual[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 589:108] + node _T_4655 = eq(buf_dualhi[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 589:123] + node _T_4656 = or(_T_4654, _T_4655) @[el2_lsu_bus_buffer.scala 589:121] + node _T_4657 = and(_T_4653, _T_4656) @[el2_lsu_bus_buffer.scala 589:105] + node _T_4658 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 589:78] + node _T_4659 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 589:101] + node _T_4660 = eq(_T_4659, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 589:91] + node _T_4661 = and(_T_4658, _T_4660) @[el2_lsu_bus_buffer.scala 589:89] + node _T_4662 = eq(buf_dual[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 589:108] + node _T_4663 = eq(buf_dualhi[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 589:123] + node _T_4664 = or(_T_4662, _T_4663) @[el2_lsu_bus_buffer.scala 589:121] + node _T_4665 = and(_T_4661, _T_4664) @[el2_lsu_bus_buffer.scala 589:105] + node _T_4666 = mux(_T_4641, buf_data[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4667 = mux(_T_4649, buf_data[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4668 = mux(_T_4657, buf_data[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4669 = mux(_T_4665, buf_data[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4670 = or(_T_4666, _T_4667) @[Mux.scala 27:72] + node _T_4671 = or(_T_4670, _T_4668) @[Mux.scala 27:72] + node _T_4672 = or(_T_4671, _T_4669) @[Mux.scala 27:72] + wire lsu_nonblock_load_data_lo : UInt<32> @[Mux.scala 27:72] + lsu_nonblock_load_data_lo <= _T_4672 @[Mux.scala 27:72] + node _T_4673 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 590:78] + node _T_4674 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 590:101] + node _T_4675 = eq(_T_4674, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 590:91] + node _T_4676 = and(_T_4673, _T_4675) @[el2_lsu_bus_buffer.scala 590:89] + node _T_4677 = or(buf_dual[0], buf_dualhi[0]) @[el2_lsu_bus_buffer.scala 590:120] + node _T_4678 = and(_T_4676, _T_4677) @[el2_lsu_bus_buffer.scala 590:105] + node _T_4679 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 590:78] + node _T_4680 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 590:101] + node _T_4681 = eq(_T_4680, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 590:91] + node _T_4682 = and(_T_4679, _T_4681) @[el2_lsu_bus_buffer.scala 590:89] + node _T_4683 = or(buf_dual[1], buf_dualhi[1]) @[el2_lsu_bus_buffer.scala 590:120] + node _T_4684 = and(_T_4682, _T_4683) @[el2_lsu_bus_buffer.scala 590:105] + node _T_4685 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 590:78] + node _T_4686 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 590:101] + node _T_4687 = eq(_T_4686, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 590:91] + node _T_4688 = and(_T_4685, _T_4687) @[el2_lsu_bus_buffer.scala 590:89] + node _T_4689 = or(buf_dual[2], buf_dualhi[2]) @[el2_lsu_bus_buffer.scala 590:120] + node _T_4690 = and(_T_4688, _T_4689) @[el2_lsu_bus_buffer.scala 590:105] + node _T_4691 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 590:78] + node _T_4692 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 590:101] + node _T_4693 = eq(_T_4692, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 590:91] + node _T_4694 = and(_T_4691, _T_4693) @[el2_lsu_bus_buffer.scala 590:89] + node _T_4695 = or(buf_dual[3], buf_dualhi[3]) @[el2_lsu_bus_buffer.scala 590:120] + node _T_4696 = and(_T_4694, _T_4695) @[el2_lsu_bus_buffer.scala 590:105] + node _T_4697 = mux(_T_4678, buf_data[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4698 = mux(_T_4684, buf_data[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4699 = mux(_T_4690, buf_data[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4700 = mux(_T_4696, buf_data[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4701 = or(_T_4697, _T_4698) @[Mux.scala 27:72] + node _T_4702 = or(_T_4701, _T_4699) @[Mux.scala 27:72] + node _T_4703 = or(_T_4702, _T_4700) @[Mux.scala 27:72] + wire lsu_nonblock_load_data_hi : UInt<32> @[Mux.scala 27:72] + lsu_nonblock_load_data_hi <= _T_4703 @[Mux.scala 27:72] + node _T_4704 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_4705 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_4706 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_4707 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_4708 = mux(_T_4704, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4709 = mux(_T_4705, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4710 = mux(_T_4706, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4711 = mux(_T_4707, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4712 = or(_T_4708, _T_4709) @[Mux.scala 27:72] + node _T_4713 = or(_T_4712, _T_4710) @[Mux.scala 27:72] + node _T_4714 = or(_T_4713, _T_4711) @[Mux.scala 27:72] + wire _T_4715 : UInt<32> @[Mux.scala 27:72] + _T_4715 <= _T_4714 @[Mux.scala 27:72] + node lsu_nonblock_addr_offset = bits(_T_4715, 1, 0) @[el2_lsu_bus_buffer.scala 591:83] + node _T_4716 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_4717 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_4718 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_4719 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_4720 = mux(_T_4716, buf_sz[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4721 = mux(_T_4717, buf_sz[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4722 = mux(_T_4718, buf_sz[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4723 = mux(_T_4719, buf_sz[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4724 = or(_T_4720, _T_4721) @[Mux.scala 27:72] + node _T_4725 = or(_T_4724, _T_4722) @[Mux.scala 27:72] + node _T_4726 = or(_T_4725, _T_4723) @[Mux.scala 27:72] + wire lsu_nonblock_sz : UInt<2> @[Mux.scala 27:72] + lsu_nonblock_sz <= _T_4726 @[Mux.scala 27:72] + node _T_4727 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_4728 = bits(buf_unsign, 0, 0) @[el2_lsu_bus_buffer.scala 109:129] + node _T_4729 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_4730 = bits(buf_unsign, 1, 1) @[el2_lsu_bus_buffer.scala 109:129] + node _T_4731 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_4732 = bits(buf_unsign, 2, 2) @[el2_lsu_bus_buffer.scala 109:129] + node _T_4733 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_4734 = bits(buf_unsign, 3, 3) @[el2_lsu_bus_buffer.scala 109:129] + node _T_4735 = mux(_T_4727, _T_4728, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4736 = mux(_T_4729, _T_4730, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4737 = mux(_T_4731, _T_4732, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4738 = mux(_T_4733, _T_4734, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4739 = or(_T_4735, _T_4736) @[Mux.scala 27:72] + node _T_4740 = or(_T_4739, _T_4737) @[Mux.scala 27:72] + node _T_4741 = or(_T_4740, _T_4738) @[Mux.scala 27:72] + wire lsu_nonblock_unsign : UInt<1> @[Mux.scala 27:72] + lsu_nonblock_unsign <= _T_4741 @[Mux.scala 27:72] + node _T_4742 = cat(buf_dual[3], buf_dual[2]) @[Cat.scala 29:58] + node _T_4743 = cat(_T_4742, buf_dual[1]) @[Cat.scala 29:58] + node _T_4744 = cat(_T_4743, buf_dual[0]) @[Cat.scala 29:58] + node _T_4745 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_4746 = bits(_T_4744, 0, 0) @[el2_lsu_bus_buffer.scala 109:129] + node _T_4747 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_4748 = bits(_T_4744, 1, 1) @[el2_lsu_bus_buffer.scala 109:129] + node _T_4749 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_4750 = bits(_T_4744, 2, 2) @[el2_lsu_bus_buffer.scala 109:129] + node _T_4751 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 109:118] + node _T_4752 = bits(_T_4744, 3, 3) @[el2_lsu_bus_buffer.scala 109:129] + node _T_4753 = mux(_T_4745, _T_4746, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4754 = mux(_T_4747, _T_4748, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4755 = mux(_T_4749, _T_4750, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4756 = mux(_T_4751, _T_4752, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4757 = or(_T_4753, _T_4754) @[Mux.scala 27:72] + node _T_4758 = or(_T_4757, _T_4755) @[Mux.scala 27:72] + node _T_4759 = or(_T_4758, _T_4756) @[Mux.scala 27:72] + wire lsu_nonblock_dual : UInt<1> @[Mux.scala 27:72] + lsu_nonblock_dual <= _T_4759 @[Mux.scala 27:72] + node _T_4760 = cat(lsu_nonblock_load_data_hi, lsu_nonblock_load_data_lo) @[Cat.scala 29:58] + node _T_4761 = mul(lsu_nonblock_addr_offset, UInt<4>("h08")) @[el2_lsu_bus_buffer.scala 595:121] + node lsu_nonblock_data_unalgn = dshr(_T_4760, _T_4761) @[el2_lsu_bus_buffer.scala 595:92] + node _T_4762 = eq(io.lsu_nonblock_load_data_error, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 597:69] + node _T_4763 = and(lsu_nonblock_load_data_ready, _T_4762) @[el2_lsu_bus_buffer.scala 597:67] + io.lsu_nonblock_load_data_valid <= _T_4763 @[el2_lsu_bus_buffer.scala 597:35] + node _T_4764 = eq(lsu_nonblock_sz, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 598:81] + node _T_4765 = and(lsu_nonblock_unsign, _T_4764) @[el2_lsu_bus_buffer.scala 598:63] + node _T_4766 = bits(lsu_nonblock_data_unalgn, 7, 0) @[el2_lsu_bus_buffer.scala 598:131] + node _T_4767 = cat(UInt<24>("h00"), _T_4766) @[Cat.scala 29:58] + node _T_4768 = eq(lsu_nonblock_sz, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 599:45] + node _T_4769 = and(lsu_nonblock_unsign, _T_4768) @[el2_lsu_bus_buffer.scala 599:26] + node _T_4770 = bits(lsu_nonblock_data_unalgn, 15, 0) @[el2_lsu_bus_buffer.scala 599:95] + node _T_4771 = cat(UInt<16>("h00"), _T_4770) @[Cat.scala 29:58] + node _T_4772 = eq(lsu_nonblock_unsign, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 600:6] + node _T_4773 = eq(lsu_nonblock_sz, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 600:45] + node _T_4774 = and(_T_4772, _T_4773) @[el2_lsu_bus_buffer.scala 600:27] + node _T_4775 = bits(lsu_nonblock_data_unalgn, 7, 7) @[el2_lsu_bus_buffer.scala 600:93] + node _T_4776 = bits(_T_4775, 0, 0) @[Bitwise.scala 72:15] + node _T_4777 = mux(_T_4776, UInt<24>("h0ffffff"), UInt<24>("h00")) @[Bitwise.scala 72:12] + node _T_4778 = bits(lsu_nonblock_data_unalgn, 7, 0) @[el2_lsu_bus_buffer.scala 600:123] + node _T_4779 = cat(_T_4777, _T_4778) @[Cat.scala 29:58] + node _T_4780 = eq(lsu_nonblock_unsign, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 601:6] + node _T_4781 = eq(lsu_nonblock_sz, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 601:45] + node _T_4782 = and(_T_4780, _T_4781) @[el2_lsu_bus_buffer.scala 601:27] + node _T_4783 = bits(lsu_nonblock_data_unalgn, 15, 15) @[el2_lsu_bus_buffer.scala 601:93] + node _T_4784 = bits(_T_4783, 0, 0) @[Bitwise.scala 72:15] + node _T_4785 = mux(_T_4784, UInt<16>("h0ffff"), UInt<16>("h00")) @[Bitwise.scala 72:12] + node _T_4786 = bits(lsu_nonblock_data_unalgn, 15, 0) @[el2_lsu_bus_buffer.scala 601:124] + node _T_4787 = cat(_T_4785, _T_4786) @[Cat.scala 29:58] + node _T_4788 = eq(lsu_nonblock_sz, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 602:21] + node _T_4789 = mux(_T_4765, _T_4767, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4790 = mux(_T_4769, _T_4771, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4791 = mux(_T_4774, _T_4779, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4792 = mux(_T_4782, _T_4787, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4793 = mux(_T_4788, lsu_nonblock_data_unalgn, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4794 = or(_T_4789, _T_4790) @[Mux.scala 27:72] + node _T_4795 = or(_T_4794, _T_4791) @[Mux.scala 27:72] + node _T_4796 = or(_T_4795, _T_4792) @[Mux.scala 27:72] + node _T_4797 = or(_T_4796, _T_4793) @[Mux.scala 27:72] + wire _T_4798 : UInt<64> @[Mux.scala 27:72] + _T_4798 <= _T_4797 @[Mux.scala 27:72] + io.lsu_nonblock_load_data <= _T_4798 @[el2_lsu_bus_buffer.scala 598:29] + node _T_4799 = eq(buf_state[0], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 603:62] + node _T_4800 = bits(buf_sideeffect, 0, 0) @[el2_lsu_bus_buffer.scala 603:89] + node _T_4801 = and(_T_4799, _T_4800) @[el2_lsu_bus_buffer.scala 603:73] + node _T_4802 = and(_T_4801, io.dec_tlu_sideeffect_posted_disable) @[el2_lsu_bus_buffer.scala 603:93] + node _T_4803 = eq(buf_state[1], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 603:62] + node _T_4804 = bits(buf_sideeffect, 1, 1) @[el2_lsu_bus_buffer.scala 603:89] + node _T_4805 = and(_T_4803, _T_4804) @[el2_lsu_bus_buffer.scala 603:73] + node _T_4806 = and(_T_4805, io.dec_tlu_sideeffect_posted_disable) @[el2_lsu_bus_buffer.scala 603:93] + node _T_4807 = eq(buf_state[2], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 603:62] + node _T_4808 = bits(buf_sideeffect, 2, 2) @[el2_lsu_bus_buffer.scala 603:89] + node _T_4809 = and(_T_4807, _T_4808) @[el2_lsu_bus_buffer.scala 603:73] + node _T_4810 = and(_T_4809, io.dec_tlu_sideeffect_posted_disable) @[el2_lsu_bus_buffer.scala 603:93] + node _T_4811 = eq(buf_state[3], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 603:62] + node _T_4812 = bits(buf_sideeffect, 3, 3) @[el2_lsu_bus_buffer.scala 603:89] + node _T_4813 = and(_T_4811, _T_4812) @[el2_lsu_bus_buffer.scala 603:73] + node _T_4814 = and(_T_4813, io.dec_tlu_sideeffect_posted_disable) @[el2_lsu_bus_buffer.scala 603:93] + node _T_4815 = or(_T_4802, _T_4806) @[el2_lsu_bus_buffer.scala 603:141] + node _T_4816 = or(_T_4815, _T_4810) @[el2_lsu_bus_buffer.scala 603:141] + node _T_4817 = or(_T_4816, _T_4814) @[el2_lsu_bus_buffer.scala 603:141] + bus_sideeffect_pend <= _T_4817 @[el2_lsu_bus_buffer.scala 603:23] + node _T_4818 = eq(buf_state[0], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 604:71] + node _T_4819 = and(UInt<1>("h01"), obuf_valid) @[el2_lsu_bus_buffer.scala 605:25] + node _T_4820 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 605:50] + node _T_4821 = bits(buf_addr[0], 31, 3) @[el2_lsu_bus_buffer.scala 605:70] + node _T_4822 = eq(_T_4820, _T_4821) @[el2_lsu_bus_buffer.scala 605:56] + node _T_4823 = and(_T_4819, _T_4822) @[el2_lsu_bus_buffer.scala 605:38] + node _T_4824 = eq(obuf_tag0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 605:92] + node _T_4825 = eq(obuf_tag1, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 605:126] + node _T_4826 = and(obuf_merge, _T_4825) @[el2_lsu_bus_buffer.scala 605:114] + node _T_4827 = or(_T_4824, _T_4826) @[el2_lsu_bus_buffer.scala 605:100] + node _T_4828 = eq(_T_4827, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 605:80] + node _T_4829 = and(_T_4823, _T_4828) @[el2_lsu_bus_buffer.scala 605:78] + node _T_4830 = eq(buf_state[1], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 604:71] + node _T_4831 = and(UInt<1>("h01"), obuf_valid) @[el2_lsu_bus_buffer.scala 605:25] + node _T_4832 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 605:50] + node _T_4833 = bits(buf_addr[1], 31, 3) @[el2_lsu_bus_buffer.scala 605:70] + node _T_4834 = eq(_T_4832, _T_4833) @[el2_lsu_bus_buffer.scala 605:56] + node _T_4835 = and(_T_4831, _T_4834) @[el2_lsu_bus_buffer.scala 605:38] + node _T_4836 = eq(obuf_tag0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 605:92] + node _T_4837 = eq(obuf_tag1, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 605:126] + node _T_4838 = and(obuf_merge, _T_4837) @[el2_lsu_bus_buffer.scala 605:114] + node _T_4839 = or(_T_4836, _T_4838) @[el2_lsu_bus_buffer.scala 605:100] + node _T_4840 = eq(_T_4839, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 605:80] + node _T_4841 = and(_T_4835, _T_4840) @[el2_lsu_bus_buffer.scala 605:78] + node _T_4842 = eq(buf_state[2], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 604:71] + node _T_4843 = and(UInt<1>("h01"), obuf_valid) @[el2_lsu_bus_buffer.scala 605:25] + node _T_4844 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 605:50] + node _T_4845 = bits(buf_addr[2], 31, 3) @[el2_lsu_bus_buffer.scala 605:70] + node _T_4846 = eq(_T_4844, _T_4845) @[el2_lsu_bus_buffer.scala 605:56] + node _T_4847 = and(_T_4843, _T_4846) @[el2_lsu_bus_buffer.scala 605:38] + node _T_4848 = eq(obuf_tag0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 605:92] + node _T_4849 = eq(obuf_tag1, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 605:126] + node _T_4850 = and(obuf_merge, _T_4849) @[el2_lsu_bus_buffer.scala 605:114] + node _T_4851 = or(_T_4848, _T_4850) @[el2_lsu_bus_buffer.scala 605:100] + node _T_4852 = eq(_T_4851, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 605:80] + node _T_4853 = and(_T_4847, _T_4852) @[el2_lsu_bus_buffer.scala 605:78] + node _T_4854 = eq(buf_state[3], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 604:71] + node _T_4855 = and(UInt<1>("h01"), obuf_valid) @[el2_lsu_bus_buffer.scala 605:25] + node _T_4856 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 605:50] + node _T_4857 = bits(buf_addr[3], 31, 3) @[el2_lsu_bus_buffer.scala 605:70] + node _T_4858 = eq(_T_4856, _T_4857) @[el2_lsu_bus_buffer.scala 605:56] + node _T_4859 = and(_T_4855, _T_4858) @[el2_lsu_bus_buffer.scala 605:38] + node _T_4860 = eq(obuf_tag0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 605:92] + node _T_4861 = eq(obuf_tag1, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 605:126] + node _T_4862 = and(obuf_merge, _T_4861) @[el2_lsu_bus_buffer.scala 605:114] + node _T_4863 = or(_T_4860, _T_4862) @[el2_lsu_bus_buffer.scala 605:100] + node _T_4864 = eq(_T_4863, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 605:80] + node _T_4865 = and(_T_4859, _T_4864) @[el2_lsu_bus_buffer.scala 605:78] + node _T_4866 = mux(_T_4818, _T_4829, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4867 = mux(_T_4830, _T_4841, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4868 = mux(_T_4842, _T_4853, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4869 = mux(_T_4854, _T_4865, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4870 = or(_T_4866, _T_4867) @[Mux.scala 27:72] + node _T_4871 = or(_T_4870, _T_4868) @[Mux.scala 27:72] + node _T_4872 = or(_T_4871, _T_4869) @[Mux.scala 27:72] + wire _T_4873 : UInt<1> @[Mux.scala 27:72] + _T_4873 <= _T_4872 @[Mux.scala 27:72] + bus_addr_match_pending <= _T_4873 @[el2_lsu_bus_buffer.scala 604:26] + node _T_4874 = or(obuf_cmd_done, obuf_data_done) @[el2_lsu_bus_buffer.scala 607:54] + node _T_4875 = mux(obuf_cmd_done, io.lsu_axi_wready, io.lsu_axi_awready) @[el2_lsu_bus_buffer.scala 607:75] + node _T_4876 = and(io.lsu_axi_awready, io.lsu_axi_awready) @[el2_lsu_bus_buffer.scala 607:150] + node _T_4877 = mux(_T_4874, _T_4875, _T_4876) @[el2_lsu_bus_buffer.scala 607:39] + node _T_4878 = mux(obuf_write, _T_4877, io.lsu_axi_arready) @[el2_lsu_bus_buffer.scala 607:23] + bus_cmd_ready <= _T_4878 @[el2_lsu_bus_buffer.scala 607:17] + node _T_4879 = and(io.lsu_axi_awvalid, io.lsu_axi_awready) @[el2_lsu_bus_buffer.scala 608:39] + bus_wcmd_sent <= _T_4879 @[el2_lsu_bus_buffer.scala 608:17] + node _T_4880 = and(io.lsu_axi_wvalid, io.lsu_axi_wready) @[el2_lsu_bus_buffer.scala 609:39] + bus_wdata_sent <= _T_4880 @[el2_lsu_bus_buffer.scala 609:18] + node _T_4881 = or(obuf_cmd_done, bus_wcmd_sent) @[el2_lsu_bus_buffer.scala 610:35] + node _T_4882 = or(obuf_data_done, bus_wdata_sent) @[el2_lsu_bus_buffer.scala 610:70] + node _T_4883 = and(_T_4881, _T_4882) @[el2_lsu_bus_buffer.scala 610:52] + node _T_4884 = and(io.lsu_axi_arvalid, io.lsu_axi_arready) @[el2_lsu_bus_buffer.scala 610:111] + node _T_4885 = or(_T_4883, _T_4884) @[el2_lsu_bus_buffer.scala 610:89] + bus_cmd_sent <= _T_4885 @[el2_lsu_bus_buffer.scala 610:16] + node _T_4886 = and(io.lsu_axi_rvalid, io.lsu_axi_rready) @[el2_lsu_bus_buffer.scala 611:37] + bus_rsp_read <= _T_4886 @[el2_lsu_bus_buffer.scala 611:16] + node _T_4887 = and(io.lsu_axi_bvalid, io.lsu_axi_bready) @[el2_lsu_bus_buffer.scala 612:38] + bus_rsp_write <= _T_4887 @[el2_lsu_bus_buffer.scala 612:17] + bus_rsp_read_tag <= io.lsu_axi_rid @[el2_lsu_bus_buffer.scala 613:20] + bus_rsp_write_tag <= io.lsu_axi_bid @[el2_lsu_bus_buffer.scala 614:21] + node _T_4888 = neq(io.lsu_axi_bresp, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 615:60] + node _T_4889 = and(bus_rsp_write, _T_4888) @[el2_lsu_bus_buffer.scala 615:40] + bus_rsp_write_error <= _T_4889 @[el2_lsu_bus_buffer.scala 615:23] + node _T_4890 = neq(io.lsu_axi_bresp, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 616:58] + node _T_4891 = and(bus_rsp_read, _T_4890) @[el2_lsu_bus_buffer.scala 616:38] + bus_rsp_read_error <= _T_4891 @[el2_lsu_bus_buffer.scala 616:22] + bus_rsp_rdata <= io.lsu_axi_rdata @[el2_lsu_bus_buffer.scala 617:17] + node _T_4892 = and(obuf_valid, obuf_write) @[el2_lsu_bus_buffer.scala 620:36] + node _T_4893 = eq(obuf_cmd_done, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 620:51] + node _T_4894 = and(_T_4892, _T_4893) @[el2_lsu_bus_buffer.scala 620:49] + node _T_4895 = eq(bus_addr_match_pending, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 620:68] + node _T_4896 = and(_T_4894, _T_4895) @[el2_lsu_bus_buffer.scala 620:66] + io.lsu_axi_awvalid <= _T_4896 @[el2_lsu_bus_buffer.scala 620:22] + io.lsu_axi_awid <= obuf_tag0 @[el2_lsu_bus_buffer.scala 621:19] + node _T_4897 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 622:69] + node _T_4898 = cat(_T_4897, UInt<3>("h00")) @[Cat.scala 29:58] + node _T_4899 = mux(obuf_sideeffect, obuf_addr, _T_4898) @[el2_lsu_bus_buffer.scala 622:27] + io.lsu_axi_awaddr <= _T_4899 @[el2_lsu_bus_buffer.scala 622:21] + node _T_4900 = cat(UInt<1>("h00"), obuf_sz) @[Cat.scala 29:58] + node _T_4901 = mux(obuf_sideeffect, _T_4900, UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 623:27] + io.lsu_axi_awsize <= _T_4901 @[el2_lsu_bus_buffer.scala 623:21] + io.lsu_axi_awprot <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 624:21] + node _T_4902 = mux(obuf_sideeffect, UInt<1>("h00"), UInt<4>("h0f")) @[el2_lsu_bus_buffer.scala 625:28] + io.lsu_axi_awcache <= _T_4902 @[el2_lsu_bus_buffer.scala 625:22] + node _T_4903 = bits(obuf_addr, 31, 28) @[el2_lsu_bus_buffer.scala 626:35] + io.lsu_axi_awregion <= _T_4903 @[el2_lsu_bus_buffer.scala 626:23] + io.lsu_axi_awlen <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 627:20] + io.lsu_axi_awburst <= UInt<2>("h01") @[el2_lsu_bus_buffer.scala 628:22] + io.lsu_axi_awqos <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 629:20] + io.lsu_axi_awlock <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 630:21] + node _T_4904 = and(obuf_valid, obuf_write) @[el2_lsu_bus_buffer.scala 632:35] + node _T_4905 = eq(obuf_data_done, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 632:50] + node _T_4906 = and(_T_4904, _T_4905) @[el2_lsu_bus_buffer.scala 632:48] + node _T_4907 = eq(bus_addr_match_pending, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 632:68] + node _T_4908 = and(_T_4906, _T_4907) @[el2_lsu_bus_buffer.scala 632:66] + io.lsu_axi_wvalid <= _T_4908 @[el2_lsu_bus_buffer.scala 632:21] + node _T_4909 = bits(obuf_write, 0, 0) @[Bitwise.scala 72:15] + node _T_4910 = mux(_T_4909, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_4911 = and(obuf_byteen, _T_4910) @[el2_lsu_bus_buffer.scala 633:35] + io.lsu_axi_wstrb <= _T_4911 @[el2_lsu_bus_buffer.scala 633:20] + io.lsu_axi_wdata <= obuf_data @[el2_lsu_bus_buffer.scala 634:20] + io.lsu_axi_wlast <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 635:20] + node _T_4912 = eq(obuf_write, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 637:38] + node _T_4913 = and(obuf_valid, _T_4912) @[el2_lsu_bus_buffer.scala 637:36] + node _T_4914 = eq(obuf_nosend, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 637:52] + node _T_4915 = and(_T_4913, _T_4914) @[el2_lsu_bus_buffer.scala 637:50] + node _T_4916 = eq(bus_addr_match_pending, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 637:67] + node _T_4917 = and(_T_4915, _T_4916) @[el2_lsu_bus_buffer.scala 637:65] + io.lsu_axi_arvalid <= _T_4917 @[el2_lsu_bus_buffer.scala 637:22] + io.lsu_axi_arid <= obuf_tag0 @[el2_lsu_bus_buffer.scala 638:19] + node _T_4918 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 639:69] + node _T_4919 = cat(_T_4918, UInt<3>("h00")) @[Cat.scala 29:58] + node _T_4920 = mux(obuf_sideeffect, obuf_addr, _T_4919) @[el2_lsu_bus_buffer.scala 639:27] + io.lsu_axi_araddr <= _T_4920 @[el2_lsu_bus_buffer.scala 639:21] + node _T_4921 = cat(UInt<1>("h00"), obuf_sz) @[Cat.scala 29:58] + node _T_4922 = mux(obuf_sideeffect, _T_4921, UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 640:27] + io.lsu_axi_arsize <= _T_4922 @[el2_lsu_bus_buffer.scala 640:21] + io.lsu_axi_arprot <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 641:21] + node _T_4923 = mux(obuf_sideeffect, UInt<4>("h00"), UInt<4>("h0f")) @[el2_lsu_bus_buffer.scala 642:28] + io.lsu_axi_arcache <= _T_4923 @[el2_lsu_bus_buffer.scala 642:22] + node _T_4924 = bits(obuf_addr, 31, 28) @[el2_lsu_bus_buffer.scala 643:35] + io.lsu_axi_arregion <= _T_4924 @[el2_lsu_bus_buffer.scala 643:23] + io.lsu_axi_arlen <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 644:20] + io.lsu_axi_arburst <= UInt<2>("h01") @[el2_lsu_bus_buffer.scala 645:22] + io.lsu_axi_arqos <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 646:20] + io.lsu_axi_arlock <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 647:21] + io.lsu_axi_bready <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 648:21] + io.lsu_axi_rready <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 649:21] + node _T_4925 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 650:81] + node _T_4926 = bits(buf_error, 0, 0) @[el2_lsu_bus_buffer.scala 650:125] + node _T_4927 = and(io.lsu_bus_clk_en_q, _T_4926) @[el2_lsu_bus_buffer.scala 650:114] + node _T_4928 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 650:140] + node _T_4929 = and(_T_4927, _T_4928) @[el2_lsu_bus_buffer.scala 650:129] + node _T_4930 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 650:81] + node _T_4931 = bits(buf_error, 1, 1) @[el2_lsu_bus_buffer.scala 650:125] + node _T_4932 = and(io.lsu_bus_clk_en_q, _T_4931) @[el2_lsu_bus_buffer.scala 650:114] + node _T_4933 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 650:140] + node _T_4934 = and(_T_4932, _T_4933) @[el2_lsu_bus_buffer.scala 650:129] + node _T_4935 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 650:81] + node _T_4936 = bits(buf_error, 2, 2) @[el2_lsu_bus_buffer.scala 650:125] + node _T_4937 = and(io.lsu_bus_clk_en_q, _T_4936) @[el2_lsu_bus_buffer.scala 650:114] + node _T_4938 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 650:140] + node _T_4939 = and(_T_4937, _T_4938) @[el2_lsu_bus_buffer.scala 650:129] + node _T_4940 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 650:81] + node _T_4941 = bits(buf_error, 3, 3) @[el2_lsu_bus_buffer.scala 650:125] + node _T_4942 = and(io.lsu_bus_clk_en_q, _T_4941) @[el2_lsu_bus_buffer.scala 650:114] + node _T_4943 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 650:140] + node _T_4944 = and(_T_4942, _T_4943) @[el2_lsu_bus_buffer.scala 650:129] + node _T_4945 = mux(_T_4925, _T_4929, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4946 = mux(_T_4930, _T_4934, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4947 = mux(_T_4935, _T_4939, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4948 = mux(_T_4940, _T_4944, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4949 = or(_T_4945, _T_4946) @[Mux.scala 27:72] + node _T_4950 = or(_T_4949, _T_4947) @[Mux.scala 27:72] + node _T_4951 = or(_T_4950, _T_4948) @[Mux.scala 27:72] + wire _T_4952 : UInt<1> @[Mux.scala 27:72] + _T_4952 <= _T_4951 @[Mux.scala 27:72] + io.lsu_imprecise_error_store_any <= _T_4952 @[el2_lsu_bus_buffer.scala 650:36] + node _T_4953 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 651:87] + node _T_4954 = bits(buf_error, 0, 0) @[el2_lsu_bus_buffer.scala 651:109] + node _T_4955 = and(_T_4953, _T_4954) @[el2_lsu_bus_buffer.scala 651:98] + node _T_4956 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 651:124] + node _T_4957 = and(_T_4955, _T_4956) @[el2_lsu_bus_buffer.scala 651:113] + node _T_4958 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 651:87] + node _T_4959 = bits(buf_error, 1, 1) @[el2_lsu_bus_buffer.scala 651:109] + node _T_4960 = and(_T_4958, _T_4959) @[el2_lsu_bus_buffer.scala 651:98] + node _T_4961 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 651:124] + node _T_4962 = and(_T_4960, _T_4961) @[el2_lsu_bus_buffer.scala 651:113] + node _T_4963 = mux(_T_4957, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4964 = mux(_T_4962, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4965 = or(_T_4963, _T_4964) @[Mux.scala 27:72] + wire lsu_imprecise_error_store_tag : UInt<1> @[Mux.scala 27:72] + lsu_imprecise_error_store_tag <= _T_4965 @[Mux.scala 27:72] + node _T_4966 = eq(io.lsu_imprecise_error_store_any, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 653:72] + node _T_4967 = and(io.lsu_nonblock_load_data_error, _T_4966) @[el2_lsu_bus_buffer.scala 653:70] + io.lsu_imprecise_error_load_any <= _T_4967 @[el2_lsu_bus_buffer.scala 653:35] + node _T_4968 = eq(lsu_imprecise_error_store_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_4969 = eq(lsu_imprecise_error_store_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_4970 = mux(_T_4968, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4971 = mux(_T_4969, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4972 = or(_T_4970, _T_4971) @[Mux.scala 27:72] + wire _T_4973 : UInt<32> @[Mux.scala 27:72] + _T_4973 <= _T_4972 @[Mux.scala 27:72] + node _T_4974 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_4975 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_4976 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_4977 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:123] + node _T_4978 = mux(_T_4974, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4979 = mux(_T_4975, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4980 = mux(_T_4976, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4981 = mux(_T_4977, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4982 = or(_T_4978, _T_4979) @[Mux.scala 27:72] + node _T_4983 = or(_T_4982, _T_4980) @[Mux.scala 27:72] + node _T_4984 = or(_T_4983, _T_4981) @[Mux.scala 27:72] + wire _T_4985 : UInt<32> @[Mux.scala 27:72] + _T_4985 <= _T_4984 @[Mux.scala 27:72] + node _T_4986 = mux(io.lsu_imprecise_error_store_any, _T_4973, _T_4985) @[el2_lsu_bus_buffer.scala 654:41] + io.lsu_imprecise_error_addr_any <= _T_4986 @[el2_lsu_bus_buffer.scala 654:35] + lsu_bus_cntr_overflow <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 655:25] + io.lsu_bus_idle_any <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 657:23] + node _T_4987 = and(io.lsu_axi_awvalid, io.lsu_axi_awready) @[el2_lsu_bus_buffer.scala 660:46] + node _T_4988 = and(io.lsu_axi_wvalid, io.lsu_axi_wready) @[el2_lsu_bus_buffer.scala 660:89] + node _T_4989 = or(_T_4987, _T_4988) @[el2_lsu_bus_buffer.scala 660:68] + node _T_4990 = and(io.lsu_axi_arvalid, io.lsu_axi_arready) @[el2_lsu_bus_buffer.scala 660:132] + node _T_4991 = or(_T_4989, _T_4990) @[el2_lsu_bus_buffer.scala 660:110] + io.lsu_pmu_bus_trxn <= _T_4991 @[el2_lsu_bus_buffer.scala 660:23] + node _T_4992 = and(io.lsu_busreq_r, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 661:48] + node _T_4993 = and(_T_4992, io.lsu_commit_r) @[el2_lsu_bus_buffer.scala 661:65] + io.lsu_pmu_bus_misaligned <= _T_4993 @[el2_lsu_bus_buffer.scala 661:29] + node _T_4994 = or(io.lsu_imprecise_error_load_any, io.lsu_imprecise_error_store_any) @[el2_lsu_bus_buffer.scala 662:59] + io.lsu_pmu_bus_error <= _T_4994 @[el2_lsu_bus_buffer.scala 662:24] + node _T_4995 = eq(io.lsu_axi_awready, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 664:48] + node _T_4996 = and(io.lsu_axi_awvalid, _T_4995) @[el2_lsu_bus_buffer.scala 664:46] + node _T_4997 = eq(io.lsu_axi_wready, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 664:92] + node _T_4998 = and(io.lsu_axi_wvalid, _T_4997) @[el2_lsu_bus_buffer.scala 664:90] + node _T_4999 = or(_T_4996, _T_4998) @[el2_lsu_bus_buffer.scala 664:69] + node _T_5000 = eq(io.lsu_axi_arready, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 664:136] + node _T_5001 = and(io.lsu_axi_arvalid, _T_5000) @[el2_lsu_bus_buffer.scala 664:134] + node _T_5002 = or(_T_4999, _T_5001) @[el2_lsu_bus_buffer.scala 664:112] + io.lsu_pmu_bus_busy <= _T_5002 @[el2_lsu_bus_buffer.scala 664:23] + reg _T_5003 : UInt, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 666:49] + _T_5003 <= WrPtr0_m @[el2_lsu_bus_buffer.scala 666:49] + WrPtr0_r <= _T_5003 @[el2_lsu_bus_buffer.scala 666:12] + reg _T_5004 : UInt, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 667:49] + _T_5004 <= WrPtr1_m @[el2_lsu_bus_buffer.scala 667:49] + WrPtr1_r <= _T_5004 @[el2_lsu_bus_buffer.scala 667:12] + node _T_5005 = eq(io.flush_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 668:75] + node _T_5006 = and(io.lsu_busreq_m, _T_5005) @[el2_lsu_bus_buffer.scala 668:73] + node _T_5007 = eq(io.ld_full_hit_m, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 668:89] + node _T_5008 = and(_T_5006, _T_5007) @[el2_lsu_bus_buffer.scala 668:87] + reg _T_5009 : UInt<1>, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 668:56] + _T_5009 <= _T_5008 @[el2_lsu_bus_buffer.scala 668:56] + io.lsu_busreq_r <= _T_5009 @[el2_lsu_bus_buffer.scala 668:19] + reg _T_5010 : UInt<1>, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 669:66] + _T_5010 <= io.lsu_nonblock_load_valid_m @[el2_lsu_bus_buffer.scala 669:66] + lsu_nonblock_load_valid_r <= _T_5010 @[el2_lsu_bus_buffer.scala 669:29] + + module el2_lsu_bus_intf : + input clock : Clock + input reset : AsyncReset + output io : {flip scan_mode : UInt<1>, flip dec_tlu_external_ldfwd_disable : UInt<1>, flip dec_tlu_wb_coalescing_disable : UInt<1>, flip dec_tlu_sideeffect_posted_disable : UInt<1>, flip lsu_c1_m_clk : Clock, flip lsu_c1_r_clk : Clock, flip lsu_c2_r_clk : Clock, flip lsu_bus_ibuf_c1_clk : Clock, flip lsu_bus_obuf_c1_clk : Clock, flip lsu_bus_buf_c1_clk : Clock, flip lsu_free_c2_clk : Clock, flip free_clk : Clock, flip lsu_busm_clk : Clock, flip dec_lsu_valid_raw_d : UInt<1>, flip lsu_busreq_m : UInt<1>, flip lsu_pkt_m : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip lsu_pkt_r : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip lsu_addr_d : UInt<32>, flip lsu_addr_m : UInt<32>, flip lsu_addr_r : UInt<32>, flip end_addr_d : UInt<32>, flip end_addr_m : UInt<32>, flip end_addr_r : UInt<32>, flip store_data_r : UInt<32>, flip dec_tlu_force_halt : UInt<1>, flip lsu_commit_r : UInt<1>, flip is_sideeffects_m : UInt<1>, flip flush_m_up : UInt<1>, flip flush_r : UInt<1>, flip lsu_axi_awready : UInt<1>, flip lsu_axi_wready : UInt<1>, flip lsu_axi_bvalid : UInt<1>, flip lsu_axi_bresp : UInt<2>, flip lsu_axi_bid : UInt<3>, flip lsu_axi_arready : UInt<1>, flip lsu_axi_rvalid : UInt<1>, flip lsu_axi_rid : UInt<3>, flip lsu_axi_rdata : UInt<64>, flip lsu_axi_rresp : UInt<2>, flip lsu_axi_rlast : UInt<1>, flip lsu_bus_clk_en : UInt<1>, lsu_busreq_r : UInt<1>, lsu_bus_buffer_pend_any : UInt<1>, lsu_bus_buffer_full_any : UInt<1>, lsu_bus_buffer_empty_any : UInt<1>, lsu_bus_idle_any : UInt<1>, bus_read_data_m : UInt<32>, lsu_imprecise_error_load_any : UInt<1>, lsu_imprecise_error_store_any : UInt<1>, lsu_imprecise_error_addr_any : UInt<32>, lsu_nonblock_load_valid_m : UInt<1>, lsu_nonblock_load_tag_m : UInt<2>, lsu_nonblock_load_inv_r : UInt<1>, lsu_nonblock_load_inv_tag_r : UInt<2>, lsu_nonblock_load_data_valid : UInt<1>, lsu_nonblock_load_data_error : UInt<1>, lsu_nonblock_load_data_tag : UInt<2>, lsu_nonblock_load_data : UInt<32>, lsu_pmu_bus_trxn : UInt<1>, lsu_pmu_bus_misaligned : UInt<1>, lsu_pmu_bus_error : UInt<1>, lsu_pmu_bus_busy : UInt<1>, lsu_axi_awvalid : UInt<1>, lsu_axi_awid : UInt<3>, lsu_axi_awaddr : UInt<32>, lsu_axi_awregion : UInt<4>, lsu_axi_awlen : UInt<8>, lsu_axi_awsize : UInt<3>, lsu_axi_awburst : UInt<2>, lsu_axi_awlock : UInt<1>, lsu_axi_awcache : UInt<4>, lsu_axi_awprot : UInt<3>, lsu_axi_awqos : UInt<4>, lsu_axi_wvalid : UInt<1>, lsu_axi_wdata : UInt<64>, lsu_axi_wstrb : UInt<8>, lsu_axi_wlast : UInt<1>, lsu_axi_bready : UInt<1>, lsu_axi_arvalid : UInt<1>, lsu_axi_arid : UInt<3>, lsu_axi_araddr : UInt<32>, lsu_axi_arregion : UInt<4>, lsu_axi_arlen : UInt<8>, lsu_axi_arsize : UInt<3>, lsu_axi_arburst : UInt<2>, lsu_axi_arlock : UInt<1>, lsu_axi_arcache : UInt<4>, lsu_axi_arprot : UInt<3>, lsu_axi_arqos : UInt<4>, lsu_axi_rready : UInt<1>} + + wire lsu_bus_clk_en_q : UInt<1> + lsu_bus_clk_en_q <= UInt<1>("h00") + wire ldst_dual_d : UInt<1> + ldst_dual_d <= UInt<1>("h00") + wire ldst_dual_m : UInt<1> + ldst_dual_m <= UInt<1>("h00") + wire ldst_dual_r : UInt<1> + ldst_dual_r <= UInt<1>("h00") + wire ldst_byteen_m : UInt<4> + ldst_byteen_m <= UInt<1>("h00") + wire ldst_byteen_r : UInt<4> + ldst_byteen_r <= UInt<1>("h00") + wire ldst_byteen_ext_m : UInt<8> + ldst_byteen_ext_m <= UInt<1>("h00") + wire ldst_byteen_ext_r : UInt<8> + ldst_byteen_ext_r <= UInt<1>("h00") + wire ldst_byteen_hi_m : UInt<4> + ldst_byteen_hi_m <= UInt<1>("h00") + wire ldst_byteen_hi_r : UInt<4> + ldst_byteen_hi_r <= UInt<1>("h00") + wire ldst_byteen_lo_m : UInt<4> + ldst_byteen_lo_m <= UInt<1>("h00") + wire ldst_byteen_lo_r : UInt<4> + ldst_byteen_lo_r <= UInt<1>("h00") + wire is_sideeffects_r : UInt<1> + is_sideeffects_r <= UInt<1>("h00") + wire store_data_ext_r : UInt<64> + store_data_ext_r <= UInt<1>("h00") + wire store_data_hi_r : UInt<32> + store_data_hi_r <= UInt<1>("h00") + wire store_data_lo_r : UInt<32> + store_data_lo_r <= UInt<1>("h00") + wire addr_match_dw_lo_r_m : UInt<1> + addr_match_dw_lo_r_m <= UInt<1>("h00") + wire addr_match_word_lo_r_m : UInt<1> + addr_match_word_lo_r_m <= UInt<1>("h00") + wire no_word_merge_r : UInt<1> + no_word_merge_r <= UInt<1>("h00") + wire no_dword_merge_r : UInt<1> + no_dword_merge_r <= UInt<1>("h00") + wire ld_addr_rhit_lo_lo : UInt<1> + ld_addr_rhit_lo_lo <= UInt<1>("h00") + wire ld_addr_rhit_hi_lo : UInt<1> + ld_addr_rhit_hi_lo <= UInt<1>("h00") + wire ld_addr_rhit_lo_hi : UInt<1> + ld_addr_rhit_lo_hi <= UInt<1>("h00") + wire ld_addr_rhit_hi_hi : UInt<1> + ld_addr_rhit_hi_hi <= UInt<1>("h00") + wire ld_byte_rhit_lo_lo : UInt<4> + ld_byte_rhit_lo_lo <= UInt<1>("h00") + wire ld_byte_rhit_hi_lo : UInt<4> + ld_byte_rhit_hi_lo <= UInt<1>("h00") + wire ld_byte_rhit_lo_hi : UInt<4> + ld_byte_rhit_lo_hi <= UInt<1>("h00") + wire ld_byte_rhit_hi_hi : UInt<4> + ld_byte_rhit_hi_hi <= UInt<1>("h00") + wire ld_byte_hit_lo : UInt<4> + ld_byte_hit_lo <= UInt<1>("h00") + wire ld_byte_rhit_lo : UInt<4> + ld_byte_rhit_lo <= UInt<1>("h00") + wire ld_byte_hit_hi : UInt<4> + ld_byte_hit_hi <= UInt<1>("h00") + wire ld_byte_rhit_hi : UInt<4> + ld_byte_rhit_hi <= UInt<1>("h00") + wire ld_fwddata_rpipe_lo : UInt<32> + ld_fwddata_rpipe_lo <= UInt<1>("h00") + wire ld_fwddata_rpipe_hi : UInt<32> + ld_fwddata_rpipe_hi <= UInt<1>("h00") + wire ld_byte_hit_buf_lo : UInt<4> + ld_byte_hit_buf_lo <= UInt<1>("h00") + wire ld_byte_hit_buf_hi : UInt<4> + ld_byte_hit_buf_hi <= UInt<1>("h00") + wire ld_fwddata_buf_lo : UInt<32> + ld_fwddata_buf_lo <= UInt<1>("h00") + wire ld_fwddata_buf_hi : UInt<32> + ld_fwddata_buf_hi <= UInt<1>("h00") + wire ld_fwddata_lo : UInt<64> + ld_fwddata_lo <= UInt<1>("h00") + wire ld_fwddata_hi : UInt<64> + ld_fwddata_hi <= UInt<1>("h00") + wire ld_fwddata_m : UInt<64> + ld_fwddata_m <= UInt<1>("h00") + wire ld_full_hit_hi_m : UInt<1> + ld_full_hit_hi_m <= UInt<1>("h01") + wire ld_full_hit_lo_m : UInt<1> + ld_full_hit_lo_m <= UInt<1>("h01") + wire ld_full_hit_m : UInt<1> + ld_full_hit_m <= UInt<1>("h00") + inst bus_buffer of el2_lsu_bus_buffer @[el2_lsu_bus_intf.scala 148:39] + bus_buffer.clock <= clock + bus_buffer.reset <= reset + bus_buffer.io.scan_mode <= io.scan_mode @[el2_lsu_bus_intf.scala 149:51] + bus_buffer.io.dec_tlu_external_ldfwd_disable <= io.dec_tlu_external_ldfwd_disable @[el2_lsu_bus_intf.scala 150:51] + bus_buffer.io.dec_tlu_wb_coalescing_disable <= io.dec_tlu_wb_coalescing_disable @[el2_lsu_bus_intf.scala 151:51] + bus_buffer.io.dec_tlu_sideeffect_posted_disable <= io.dec_tlu_sideeffect_posted_disable @[el2_lsu_bus_intf.scala 152:51] + bus_buffer.io.dec_tlu_force_halt <= io.dec_tlu_force_halt @[el2_lsu_bus_intf.scala 153:51] + bus_buffer.io.lsu_c2_r_clk <= io.lsu_c2_r_clk @[el2_lsu_bus_intf.scala 154:51] + bus_buffer.io.lsu_bus_ibuf_c1_clk <= io.lsu_bus_ibuf_c1_clk @[el2_lsu_bus_intf.scala 155:51] + bus_buffer.io.lsu_bus_obuf_c1_clk <= io.lsu_bus_obuf_c1_clk @[el2_lsu_bus_intf.scala 156:51] + bus_buffer.io.lsu_bus_buf_c1_clk <= io.lsu_bus_buf_c1_clk @[el2_lsu_bus_intf.scala 157:51] + bus_buffer.io.lsu_free_c2_clk <= io.lsu_free_c2_clk @[el2_lsu_bus_intf.scala 158:51] + bus_buffer.io.lsu_busm_clk <= io.lsu_busm_clk @[el2_lsu_bus_intf.scala 159:51] + bus_buffer.io.dec_lsu_valid_raw_d <= io.dec_lsu_valid_raw_d @[el2_lsu_bus_intf.scala 160:51] + bus_buffer.io.lsu_pkt_m.valid <= io.lsu_pkt_m.valid @[el2_lsu_bus_intf.scala 161:51] + bus_buffer.io.lsu_pkt_m.store_data_bypass_m <= io.lsu_pkt_m.store_data_bypass_m @[el2_lsu_bus_intf.scala 161:51] + bus_buffer.io.lsu_pkt_m.load_ldst_bypass_d <= io.lsu_pkt_m.load_ldst_bypass_d @[el2_lsu_bus_intf.scala 161:51] + bus_buffer.io.lsu_pkt_m.store_data_bypass_d <= io.lsu_pkt_m.store_data_bypass_d @[el2_lsu_bus_intf.scala 161:51] + bus_buffer.io.lsu_pkt_m.dma <= io.lsu_pkt_m.dma @[el2_lsu_bus_intf.scala 161:51] + bus_buffer.io.lsu_pkt_m.unsign <= io.lsu_pkt_m.unsign @[el2_lsu_bus_intf.scala 161:51] + bus_buffer.io.lsu_pkt_m.store <= io.lsu_pkt_m.store @[el2_lsu_bus_intf.scala 161:51] + bus_buffer.io.lsu_pkt_m.load <= io.lsu_pkt_m.load @[el2_lsu_bus_intf.scala 161:51] + bus_buffer.io.lsu_pkt_m.dword <= io.lsu_pkt_m.dword @[el2_lsu_bus_intf.scala 161:51] + bus_buffer.io.lsu_pkt_m.word <= io.lsu_pkt_m.word @[el2_lsu_bus_intf.scala 161:51] + bus_buffer.io.lsu_pkt_m.half <= io.lsu_pkt_m.half @[el2_lsu_bus_intf.scala 161:51] + bus_buffer.io.lsu_pkt_m.by <= io.lsu_pkt_m.by @[el2_lsu_bus_intf.scala 161:51] + bus_buffer.io.lsu_pkt_m.fast_int <= io.lsu_pkt_m.fast_int @[el2_lsu_bus_intf.scala 161:51] + bus_buffer.io.lsu_pkt_r.valid <= io.lsu_pkt_r.valid @[el2_lsu_bus_intf.scala 162:51] + bus_buffer.io.lsu_pkt_r.store_data_bypass_m <= io.lsu_pkt_r.store_data_bypass_m @[el2_lsu_bus_intf.scala 162:51] + bus_buffer.io.lsu_pkt_r.load_ldst_bypass_d <= io.lsu_pkt_r.load_ldst_bypass_d @[el2_lsu_bus_intf.scala 162:51] + bus_buffer.io.lsu_pkt_r.store_data_bypass_d <= io.lsu_pkt_r.store_data_bypass_d @[el2_lsu_bus_intf.scala 162:51] + bus_buffer.io.lsu_pkt_r.dma <= io.lsu_pkt_r.dma @[el2_lsu_bus_intf.scala 162:51] + bus_buffer.io.lsu_pkt_r.unsign <= io.lsu_pkt_r.unsign @[el2_lsu_bus_intf.scala 162:51] + bus_buffer.io.lsu_pkt_r.store <= io.lsu_pkt_r.store @[el2_lsu_bus_intf.scala 162:51] + bus_buffer.io.lsu_pkt_r.load <= io.lsu_pkt_r.load @[el2_lsu_bus_intf.scala 162:51] + bus_buffer.io.lsu_pkt_r.dword <= io.lsu_pkt_r.dword @[el2_lsu_bus_intf.scala 162:51] + bus_buffer.io.lsu_pkt_r.word <= io.lsu_pkt_r.word @[el2_lsu_bus_intf.scala 162:51] + bus_buffer.io.lsu_pkt_r.half <= io.lsu_pkt_r.half @[el2_lsu_bus_intf.scala 162:51] + bus_buffer.io.lsu_pkt_r.by <= io.lsu_pkt_r.by @[el2_lsu_bus_intf.scala 162:51] + bus_buffer.io.lsu_pkt_r.fast_int <= io.lsu_pkt_r.fast_int @[el2_lsu_bus_intf.scala 162:51] + bus_buffer.io.lsu_addr_m <= io.lsu_addr_m @[el2_lsu_bus_intf.scala 163:51] + bus_buffer.io.end_addr_m <= io.end_addr_m @[el2_lsu_bus_intf.scala 164:51] + bus_buffer.io.lsu_addr_r <= io.lsu_addr_r @[el2_lsu_bus_intf.scala 165:51] + bus_buffer.io.end_addr_r <= io.end_addr_r @[el2_lsu_bus_intf.scala 166:51] + bus_buffer.io.store_data_r <= io.store_data_r @[el2_lsu_bus_intf.scala 167:51] + bus_buffer.io.no_word_merge_r <= no_word_merge_r @[el2_lsu_bus_intf.scala 168:51] + bus_buffer.io.no_dword_merge_r <= no_dword_merge_r @[el2_lsu_bus_intf.scala 169:51] + bus_buffer.io.lsu_busreq_m <= io.lsu_busreq_m @[el2_lsu_bus_intf.scala 170:51] + bus_buffer.io.ld_full_hit_m <= ld_full_hit_m @[el2_lsu_bus_intf.scala 171:51] + bus_buffer.io.flush_m_up <= io.flush_m_up @[el2_lsu_bus_intf.scala 172:51] + bus_buffer.io.flush_r <= io.flush_r @[el2_lsu_bus_intf.scala 173:51] + bus_buffer.io.lsu_commit_r <= io.lsu_commit_r @[el2_lsu_bus_intf.scala 174:51] + bus_buffer.io.is_sideeffects_r <= is_sideeffects_r @[el2_lsu_bus_intf.scala 175:51] + bus_buffer.io.ldst_dual_d <= ldst_dual_d @[el2_lsu_bus_intf.scala 176:51] + bus_buffer.io.ldst_dual_m <= ldst_dual_m @[el2_lsu_bus_intf.scala 177:51] + bus_buffer.io.ldst_dual_r <= ldst_dual_r @[el2_lsu_bus_intf.scala 178:51] + bus_buffer.io.ldst_byteen_ext_m <= ldst_byteen_ext_m @[el2_lsu_bus_intf.scala 179:51] + bus_buffer.io.lsu_axi_awready <= io.lsu_axi_awready @[el2_lsu_bus_intf.scala 180:51] + bus_buffer.io.lsu_axi_wready <= io.lsu_axi_wready @[el2_lsu_bus_intf.scala 181:51] + bus_buffer.io.lsu_axi_bvalid <= io.lsu_axi_bvalid @[el2_lsu_bus_intf.scala 182:51] + bus_buffer.io.lsu_axi_bresp <= io.lsu_axi_bresp @[el2_lsu_bus_intf.scala 183:51] + bus_buffer.io.lsu_axi_bid <= io.lsu_axi_bid @[el2_lsu_bus_intf.scala 184:51] + bus_buffer.io.lsu_axi_arready <= io.lsu_axi_arready @[el2_lsu_bus_intf.scala 185:51] + bus_buffer.io.lsu_axi_rvalid <= io.lsu_axi_rvalid @[el2_lsu_bus_intf.scala 186:51] + bus_buffer.io.lsu_axi_rid <= io.lsu_axi_rid @[el2_lsu_bus_intf.scala 187:51] + bus_buffer.io.lsu_axi_rdata <= io.lsu_axi_rdata @[el2_lsu_bus_intf.scala 188:51] + bus_buffer.io.lsu_axi_rresp <= io.lsu_axi_rresp @[el2_lsu_bus_intf.scala 189:51] + bus_buffer.io.lsu_bus_clk_en <= io.lsu_bus_clk_en @[el2_lsu_bus_intf.scala 190:51] + bus_buffer.io.lsu_bus_clk_en_q <= lsu_bus_clk_en_q @[el2_lsu_bus_intf.scala 191:51] + io.lsu_busreq_r <= bus_buffer.io.lsu_busreq_r @[el2_lsu_bus_intf.scala 193:38] + io.lsu_bus_buffer_pend_any <= bus_buffer.io.lsu_bus_buffer_pend_any @[el2_lsu_bus_intf.scala 194:38] + io.lsu_bus_buffer_full_any <= bus_buffer.io.lsu_bus_buffer_full_any @[el2_lsu_bus_intf.scala 195:38] + io.lsu_bus_buffer_empty_any <= bus_buffer.io.lsu_bus_buffer_empty_any @[el2_lsu_bus_intf.scala 196:38] + io.lsu_bus_idle_any <= bus_buffer.io.lsu_bus_idle_any @[el2_lsu_bus_intf.scala 197:38] + ld_byte_hit_buf_lo <= bus_buffer.io.ld_byte_hit_buf_lo @[el2_lsu_bus_intf.scala 198:38] + ld_byte_hit_buf_hi <= bus_buffer.io.ld_byte_hit_buf_hi @[el2_lsu_bus_intf.scala 199:38] + ld_fwddata_buf_lo <= bus_buffer.io.ld_fwddata_buf_lo @[el2_lsu_bus_intf.scala 200:38] + ld_fwddata_buf_hi <= bus_buffer.io.ld_fwddata_buf_hi @[el2_lsu_bus_intf.scala 201:38] + io.lsu_imprecise_error_load_any <= bus_buffer.io.lsu_imprecise_error_load_any @[el2_lsu_bus_intf.scala 202:38] + io.lsu_imprecise_error_store_any <= bus_buffer.io.lsu_imprecise_error_store_any @[el2_lsu_bus_intf.scala 203:38] + io.lsu_imprecise_error_addr_any <= bus_buffer.io.lsu_imprecise_error_addr_any @[el2_lsu_bus_intf.scala 204:38] + io.lsu_nonblock_load_valid_m <= bus_buffer.io.lsu_nonblock_load_valid_m @[el2_lsu_bus_intf.scala 205:38] + io.lsu_nonblock_load_tag_m <= bus_buffer.io.lsu_nonblock_load_tag_m @[el2_lsu_bus_intf.scala 206:38] + io.lsu_nonblock_load_inv_r <= bus_buffer.io.lsu_nonblock_load_inv_r @[el2_lsu_bus_intf.scala 207:38] + io.lsu_nonblock_load_inv_tag_r <= bus_buffer.io.lsu_nonblock_load_inv_tag_r @[el2_lsu_bus_intf.scala 208:38] + io.lsu_nonblock_load_data_valid <= bus_buffer.io.lsu_nonblock_load_data_valid @[el2_lsu_bus_intf.scala 209:38] + io.lsu_nonblock_load_data_error <= bus_buffer.io.lsu_nonblock_load_data_error @[el2_lsu_bus_intf.scala 210:38] + io.lsu_nonblock_load_data_tag <= bus_buffer.io.lsu_nonblock_load_data_tag @[el2_lsu_bus_intf.scala 211:38] + io.lsu_nonblock_load_data <= bus_buffer.io.lsu_nonblock_load_data @[el2_lsu_bus_intf.scala 212:38] + io.lsu_pmu_bus_trxn <= bus_buffer.io.lsu_pmu_bus_trxn @[el2_lsu_bus_intf.scala 213:38] + io.lsu_pmu_bus_misaligned <= bus_buffer.io.lsu_pmu_bus_misaligned @[el2_lsu_bus_intf.scala 214:38] + io.lsu_pmu_bus_error <= bus_buffer.io.lsu_pmu_bus_error @[el2_lsu_bus_intf.scala 215:38] + io.lsu_pmu_bus_busy <= bus_buffer.io.lsu_pmu_bus_busy @[el2_lsu_bus_intf.scala 216:38] + io.lsu_axi_awvalid <= bus_buffer.io.lsu_axi_awvalid @[el2_lsu_bus_intf.scala 217:38] + io.lsu_axi_awid <= bus_buffer.io.lsu_axi_awid @[el2_lsu_bus_intf.scala 218:38] + io.lsu_axi_awaddr <= bus_buffer.io.lsu_axi_awaddr @[el2_lsu_bus_intf.scala 219:38] + io.lsu_axi_awregion <= bus_buffer.io.lsu_axi_awregion @[el2_lsu_bus_intf.scala 220:38] + io.lsu_axi_awlen <= bus_buffer.io.lsu_axi_awlen @[el2_lsu_bus_intf.scala 221:38] + io.lsu_axi_awsize <= bus_buffer.io.lsu_axi_awsize @[el2_lsu_bus_intf.scala 222:38] + io.lsu_axi_awburst <= bus_buffer.io.lsu_axi_awburst @[el2_lsu_bus_intf.scala 223:38] + io.lsu_axi_awlock <= bus_buffer.io.lsu_axi_awlock @[el2_lsu_bus_intf.scala 224:38] + io.lsu_axi_awcache <= bus_buffer.io.lsu_axi_awcache @[el2_lsu_bus_intf.scala 225:38] + io.lsu_axi_awprot <= bus_buffer.io.lsu_axi_awprot @[el2_lsu_bus_intf.scala 226:38] + io.lsu_axi_awqos <= bus_buffer.io.lsu_axi_awqos @[el2_lsu_bus_intf.scala 227:38] + io.lsu_axi_wvalid <= bus_buffer.io.lsu_axi_wvalid @[el2_lsu_bus_intf.scala 228:38] + io.lsu_axi_wdata <= bus_buffer.io.lsu_axi_wdata @[el2_lsu_bus_intf.scala 229:38] + io.lsu_axi_wstrb <= bus_buffer.io.lsu_axi_wstrb @[el2_lsu_bus_intf.scala 230:38] + io.lsu_axi_wlast <= bus_buffer.io.lsu_axi_wlast @[el2_lsu_bus_intf.scala 231:38] + io.lsu_axi_bready <= bus_buffer.io.lsu_axi_bready @[el2_lsu_bus_intf.scala 232:38] + io.lsu_axi_arvalid <= bus_buffer.io.lsu_axi_arvalid @[el2_lsu_bus_intf.scala 233:38] + io.lsu_axi_arid <= bus_buffer.io.lsu_axi_arid @[el2_lsu_bus_intf.scala 234:38] + io.lsu_axi_araddr <= bus_buffer.io.lsu_axi_araddr @[el2_lsu_bus_intf.scala 235:38] + io.lsu_axi_arregion <= bus_buffer.io.lsu_axi_arregion @[el2_lsu_bus_intf.scala 236:38] + io.lsu_axi_arlen <= bus_buffer.io.lsu_axi_arlen @[el2_lsu_bus_intf.scala 237:38] + io.lsu_axi_arsize <= bus_buffer.io.lsu_axi_arsize @[el2_lsu_bus_intf.scala 238:38] + io.lsu_axi_arburst <= bus_buffer.io.lsu_axi_arburst @[el2_lsu_bus_intf.scala 239:38] + io.lsu_axi_arlock <= bus_buffer.io.lsu_axi_arlock @[el2_lsu_bus_intf.scala 240:38] + io.lsu_axi_arcache <= bus_buffer.io.lsu_axi_arcache @[el2_lsu_bus_intf.scala 241:38] + io.lsu_axi_arprot <= bus_buffer.io.lsu_axi_arprot @[el2_lsu_bus_intf.scala 242:38] + io.lsu_axi_arqos <= bus_buffer.io.lsu_axi_arqos @[el2_lsu_bus_intf.scala 243:38] + io.lsu_axi_rready <= bus_buffer.io.lsu_axi_rready @[el2_lsu_bus_intf.scala 244:38] + node _T = bits(io.lsu_pkt_r.word, 0, 0) @[el2_lsu_bus_intf.scala 246:58] + node _T_1 = bits(io.lsu_pkt_r.half, 0, 0) @[el2_lsu_bus_intf.scala 246:97] + node _T_2 = bits(io.lsu_pkt_r.by, 0, 0) @[el2_lsu_bus_intf.scala 246:133] + node _T_3 = mux(_T, UInt<4>("h0f"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4 = mux(_T_1, UInt<4>("h03"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_5 = mux(_T_2, UInt<4>("h01"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_6 = or(_T_3, _T_4) @[Mux.scala 27:72] + node _T_7 = or(_T_6, _T_5) @[Mux.scala 27:72] + wire _T_8 : UInt<4> @[Mux.scala 27:72] + _T_8 <= _T_7 @[Mux.scala 27:72] + ldst_byteen_m <= _T_8 @[el2_lsu_bus_intf.scala 246:27] + node _T_9 = bits(io.lsu_addr_d, 2, 2) @[el2_lsu_bus_intf.scala 247:43] + node _T_10 = bits(io.end_addr_d, 2, 2) @[el2_lsu_bus_intf.scala 247:64] + node _T_11 = neq(_T_9, _T_10) @[el2_lsu_bus_intf.scala 247:47] + ldst_dual_d <= _T_11 @[el2_lsu_bus_intf.scala 247:27] + node _T_12 = bits(io.lsu_addr_r, 31, 3) @[el2_lsu_bus_intf.scala 248:44] + node _T_13 = bits(io.lsu_addr_m, 31, 3) @[el2_lsu_bus_intf.scala 248:68] + node _T_14 = eq(_T_12, _T_13) @[el2_lsu_bus_intf.scala 248:51] + addr_match_dw_lo_r_m <= _T_14 @[el2_lsu_bus_intf.scala 248:27] + node _T_15 = bits(io.lsu_addr_r, 2, 2) @[el2_lsu_bus_intf.scala 249:68] + node _T_16 = bits(io.lsu_addr_m, 2, 2) @[el2_lsu_bus_intf.scala 249:85] + node _T_17 = xor(_T_15, _T_16) @[el2_lsu_bus_intf.scala 249:71] + node _T_18 = eq(_T_17, UInt<1>("h00")) @[el2_lsu_bus_intf.scala 249:53] + node _T_19 = and(addr_match_dw_lo_r_m, _T_18) @[el2_lsu_bus_intf.scala 249:51] + addr_match_word_lo_r_m <= _T_19 @[el2_lsu_bus_intf.scala 249:27] + node _T_20 = eq(ldst_dual_r, UInt<1>("h00")) @[el2_lsu_bus_intf.scala 250:48] + node _T_21 = and(io.lsu_busreq_r, _T_20) @[el2_lsu_bus_intf.scala 250:46] + node _T_22 = and(_T_21, io.lsu_busreq_m) @[el2_lsu_bus_intf.scala 250:61] + node _T_23 = eq(addr_match_word_lo_r_m, UInt<1>("h00")) @[el2_lsu_bus_intf.scala 250:102] + node _T_24 = or(io.lsu_pkt_m.load, _T_23) @[el2_lsu_bus_intf.scala 250:100] + node _T_25 = and(_T_22, _T_24) @[el2_lsu_bus_intf.scala 250:79] + no_word_merge_r <= _T_25 @[el2_lsu_bus_intf.scala 250:27] + node _T_26 = eq(ldst_dual_r, UInt<1>("h00")) @[el2_lsu_bus_intf.scala 251:48] + node _T_27 = and(io.lsu_busreq_r, _T_26) @[el2_lsu_bus_intf.scala 251:46] + node _T_28 = and(_T_27, io.lsu_busreq_m) @[el2_lsu_bus_intf.scala 251:61] + node _T_29 = eq(addr_match_dw_lo_r_m, UInt<1>("h00")) @[el2_lsu_bus_intf.scala 251:102] + node _T_30 = or(io.lsu_pkt_m.load, _T_29) @[el2_lsu_bus_intf.scala 251:100] + node _T_31 = and(_T_28, _T_30) @[el2_lsu_bus_intf.scala 251:79] + no_dword_merge_r <= _T_31 @[el2_lsu_bus_intf.scala 251:27] + node _T_32 = bits(ldst_byteen_m, 3, 0) @[el2_lsu_bus_intf.scala 252:56] + node _T_33 = cat(UInt<4>("h00"), _T_32) @[Cat.scala 29:58] + node _T_34 = bits(io.lsu_addr_m, 1, 0) @[el2_lsu_bus_intf.scala 252:79] + node _T_35 = dshl(_T_33, _T_34) @[el2_lsu_bus_intf.scala 252:63] + ldst_byteen_ext_m <= _T_35 @[el2_lsu_bus_intf.scala 252:27] + node _T_36 = bits(ldst_byteen_r, 3, 0) @[el2_lsu_bus_intf.scala 253:56] + node _T_37 = cat(UInt<4>("h00"), _T_36) @[Cat.scala 29:58] + node _T_38 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_bus_intf.scala 253:79] + node _T_39 = dshl(_T_37, _T_38) @[el2_lsu_bus_intf.scala 253:63] + ldst_byteen_ext_r <= _T_39 @[el2_lsu_bus_intf.scala 253:27] + node _T_40 = bits(io.store_data_r, 31, 0) @[el2_lsu_bus_intf.scala 254:59] + node _T_41 = cat(UInt<32>("h00"), _T_40) @[Cat.scala 29:58] + node _T_42 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_bus_intf.scala 254:87] + node _T_43 = cat(_T_42, UInt<3>("h00")) @[Cat.scala 29:58] + node _T_44 = dshl(_T_41, _T_43) @[el2_lsu_bus_intf.scala 254:67] + store_data_ext_r <= _T_44 @[el2_lsu_bus_intf.scala 254:27] + node _T_45 = bits(ldst_byteen_ext_m, 7, 4) @[el2_lsu_bus_intf.scala 255:47] + ldst_byteen_hi_m <= _T_45 @[el2_lsu_bus_intf.scala 255:27] + node _T_46 = bits(ldst_byteen_ext_m, 3, 0) @[el2_lsu_bus_intf.scala 256:47] + ldst_byteen_lo_m <= _T_46 @[el2_lsu_bus_intf.scala 256:27] + node _T_47 = bits(ldst_byteen_ext_r, 7, 4) @[el2_lsu_bus_intf.scala 257:47] + ldst_byteen_hi_r <= _T_47 @[el2_lsu_bus_intf.scala 257:27] + node _T_48 = bits(ldst_byteen_ext_r, 3, 0) @[el2_lsu_bus_intf.scala 258:47] + ldst_byteen_lo_r <= _T_48 @[el2_lsu_bus_intf.scala 258:27] + node _T_49 = bits(store_data_ext_r, 63, 32) @[el2_lsu_bus_intf.scala 259:46] + store_data_hi_r <= _T_49 @[el2_lsu_bus_intf.scala 259:27] + node _T_50 = bits(store_data_ext_r, 31, 0) @[el2_lsu_bus_intf.scala 260:46] + store_data_lo_r <= _T_50 @[el2_lsu_bus_intf.scala 260:27] + node _T_51 = bits(io.lsu_addr_m, 31, 2) @[el2_lsu_bus_intf.scala 261:44] + node _T_52 = bits(io.lsu_addr_r, 31, 2) @[el2_lsu_bus_intf.scala 261:68] + node _T_53 = eq(_T_51, _T_52) @[el2_lsu_bus_intf.scala 261:51] + node _T_54 = and(_T_53, io.lsu_pkt_r.valid) @[el2_lsu_bus_intf.scala 261:76] + node _T_55 = and(_T_54, io.lsu_pkt_r.store) @[el2_lsu_bus_intf.scala 261:97] + node _T_56 = and(_T_55, io.lsu_busreq_m) @[el2_lsu_bus_intf.scala 261:118] + ld_addr_rhit_lo_lo <= _T_56 @[el2_lsu_bus_intf.scala 261:27] + node _T_57 = bits(io.end_addr_m, 31, 2) @[el2_lsu_bus_intf.scala 262:44] + node _T_58 = bits(io.lsu_addr_r, 31, 2) @[el2_lsu_bus_intf.scala 262:68] + node _T_59 = eq(_T_57, _T_58) @[el2_lsu_bus_intf.scala 262:51] + node _T_60 = and(_T_59, io.lsu_pkt_r.valid) @[el2_lsu_bus_intf.scala 262:76] + node _T_61 = and(_T_60, io.lsu_pkt_r.store) @[el2_lsu_bus_intf.scala 262:97] + node _T_62 = and(_T_61, io.lsu_busreq_m) @[el2_lsu_bus_intf.scala 262:118] + ld_addr_rhit_lo_hi <= _T_62 @[el2_lsu_bus_intf.scala 262:27] + node _T_63 = bits(io.lsu_addr_m, 31, 2) @[el2_lsu_bus_intf.scala 263:44] + node _T_64 = bits(io.end_addr_r, 31, 2) @[el2_lsu_bus_intf.scala 263:68] + node _T_65 = eq(_T_63, _T_64) @[el2_lsu_bus_intf.scala 263:51] + node _T_66 = and(_T_65, io.lsu_pkt_r.valid) @[el2_lsu_bus_intf.scala 263:76] + node _T_67 = and(_T_66, io.lsu_pkt_r.store) @[el2_lsu_bus_intf.scala 263:97] + node _T_68 = and(_T_67, io.lsu_busreq_m) @[el2_lsu_bus_intf.scala 263:118] + ld_addr_rhit_hi_lo <= _T_68 @[el2_lsu_bus_intf.scala 263:27] + node _T_69 = bits(io.end_addr_m, 31, 2) @[el2_lsu_bus_intf.scala 264:44] + node _T_70 = bits(io.end_addr_r, 31, 2) @[el2_lsu_bus_intf.scala 264:68] + node _T_71 = eq(_T_69, _T_70) @[el2_lsu_bus_intf.scala 264:51] + node _T_72 = and(_T_71, io.lsu_pkt_r.valid) @[el2_lsu_bus_intf.scala 264:76] + node _T_73 = and(_T_72, io.lsu_pkt_r.store) @[el2_lsu_bus_intf.scala 264:97] + node _T_74 = and(_T_73, io.lsu_busreq_m) @[el2_lsu_bus_intf.scala 264:118] + ld_addr_rhit_hi_hi <= _T_74 @[el2_lsu_bus_intf.scala 264:27] + node _T_75 = bits(ldst_byteen_lo_r, 0, 0) @[el2_lsu_bus_intf.scala 265:88] + node _T_76 = and(ld_addr_rhit_lo_lo, _T_75) @[el2_lsu_bus_intf.scala 265:70] + node _T_77 = bits(ldst_byteen_lo_m, 0, 0) @[el2_lsu_bus_intf.scala 265:110] + node _T_78 = and(_T_76, _T_77) @[el2_lsu_bus_intf.scala 265:92] + node _T_79 = bits(ldst_byteen_lo_r, 1, 1) @[el2_lsu_bus_intf.scala 265:88] + node _T_80 = and(ld_addr_rhit_lo_lo, _T_79) @[el2_lsu_bus_intf.scala 265:70] + node _T_81 = bits(ldst_byteen_lo_m, 1, 1) @[el2_lsu_bus_intf.scala 265:110] + node _T_82 = and(_T_80, _T_81) @[el2_lsu_bus_intf.scala 265:92] + node _T_83 = bits(ldst_byteen_lo_r, 2, 2) @[el2_lsu_bus_intf.scala 265:88] + node _T_84 = and(ld_addr_rhit_lo_lo, _T_83) @[el2_lsu_bus_intf.scala 265:70] + node _T_85 = bits(ldst_byteen_lo_m, 2, 2) @[el2_lsu_bus_intf.scala 265:110] + node _T_86 = and(_T_84, _T_85) @[el2_lsu_bus_intf.scala 265:92] + node _T_87 = bits(ldst_byteen_lo_r, 3, 3) @[el2_lsu_bus_intf.scala 265:88] + node _T_88 = and(ld_addr_rhit_lo_lo, _T_87) @[el2_lsu_bus_intf.scala 265:70] + node _T_89 = bits(ldst_byteen_lo_m, 3, 3) @[el2_lsu_bus_intf.scala 265:110] + node _T_90 = and(_T_88, _T_89) @[el2_lsu_bus_intf.scala 265:92] + node _T_91 = cat(_T_90, _T_86) @[Cat.scala 29:58] + node _T_92 = cat(_T_91, _T_82) @[Cat.scala 29:58] + node _T_93 = cat(_T_92, _T_78) @[Cat.scala 29:58] + ld_byte_rhit_lo_lo <= _T_93 @[el2_lsu_bus_intf.scala 265:27] + node _T_94 = bits(ldst_byteen_lo_r, 0, 0) @[el2_lsu_bus_intf.scala 266:88] + node _T_95 = and(ld_addr_rhit_lo_hi, _T_94) @[el2_lsu_bus_intf.scala 266:70] + node _T_96 = bits(ldst_byteen_hi_m, 0, 0) @[el2_lsu_bus_intf.scala 266:110] + node _T_97 = and(_T_95, _T_96) @[el2_lsu_bus_intf.scala 266:92] + node _T_98 = bits(ldst_byteen_lo_r, 1, 1) @[el2_lsu_bus_intf.scala 266:88] + node _T_99 = and(ld_addr_rhit_lo_hi, _T_98) @[el2_lsu_bus_intf.scala 266:70] + node _T_100 = bits(ldst_byteen_hi_m, 1, 1) @[el2_lsu_bus_intf.scala 266:110] + node _T_101 = and(_T_99, _T_100) @[el2_lsu_bus_intf.scala 266:92] + node _T_102 = bits(ldst_byteen_lo_r, 2, 2) @[el2_lsu_bus_intf.scala 266:88] + node _T_103 = and(ld_addr_rhit_lo_hi, _T_102) @[el2_lsu_bus_intf.scala 266:70] + node _T_104 = bits(ldst_byteen_hi_m, 2, 2) @[el2_lsu_bus_intf.scala 266:110] + node _T_105 = and(_T_103, _T_104) @[el2_lsu_bus_intf.scala 266:92] + node _T_106 = bits(ldst_byteen_lo_r, 3, 3) @[el2_lsu_bus_intf.scala 266:88] + node _T_107 = and(ld_addr_rhit_lo_hi, _T_106) @[el2_lsu_bus_intf.scala 266:70] + node _T_108 = bits(ldst_byteen_hi_m, 3, 3) @[el2_lsu_bus_intf.scala 266:110] + node _T_109 = and(_T_107, _T_108) @[el2_lsu_bus_intf.scala 266:92] + node _T_110 = cat(_T_109, _T_105) @[Cat.scala 29:58] + node _T_111 = cat(_T_110, _T_101) @[Cat.scala 29:58] + node _T_112 = cat(_T_111, _T_97) @[Cat.scala 29:58] + ld_byte_rhit_lo_hi <= _T_112 @[el2_lsu_bus_intf.scala 266:27] + node _T_113 = bits(ldst_byteen_hi_r, 0, 0) @[el2_lsu_bus_intf.scala 267:88] + node _T_114 = and(ld_addr_rhit_hi_lo, _T_113) @[el2_lsu_bus_intf.scala 267:70] + node _T_115 = bits(ldst_byteen_lo_m, 0, 0) @[el2_lsu_bus_intf.scala 267:110] + node _T_116 = and(_T_114, _T_115) @[el2_lsu_bus_intf.scala 267:92] + node _T_117 = bits(ldst_byteen_hi_r, 1, 1) @[el2_lsu_bus_intf.scala 267:88] + node _T_118 = and(ld_addr_rhit_hi_lo, _T_117) @[el2_lsu_bus_intf.scala 267:70] + node _T_119 = bits(ldst_byteen_lo_m, 1, 1) @[el2_lsu_bus_intf.scala 267:110] + node _T_120 = and(_T_118, _T_119) @[el2_lsu_bus_intf.scala 267:92] + node _T_121 = bits(ldst_byteen_hi_r, 2, 2) @[el2_lsu_bus_intf.scala 267:88] + node _T_122 = and(ld_addr_rhit_hi_lo, _T_121) @[el2_lsu_bus_intf.scala 267:70] + node _T_123 = bits(ldst_byteen_lo_m, 2, 2) @[el2_lsu_bus_intf.scala 267:110] + node _T_124 = and(_T_122, _T_123) @[el2_lsu_bus_intf.scala 267:92] + node _T_125 = bits(ldst_byteen_hi_r, 3, 3) @[el2_lsu_bus_intf.scala 267:88] + node _T_126 = and(ld_addr_rhit_hi_lo, _T_125) @[el2_lsu_bus_intf.scala 267:70] + node _T_127 = bits(ldst_byteen_lo_m, 3, 3) @[el2_lsu_bus_intf.scala 267:110] + node _T_128 = and(_T_126, _T_127) @[el2_lsu_bus_intf.scala 267:92] + node _T_129 = cat(_T_128, _T_124) @[Cat.scala 29:58] + node _T_130 = cat(_T_129, _T_120) @[Cat.scala 29:58] + node _T_131 = cat(_T_130, _T_116) @[Cat.scala 29:58] + ld_byte_rhit_hi_lo <= _T_131 @[el2_lsu_bus_intf.scala 267:27] + node _T_132 = bits(ldst_byteen_hi_r, 0, 0) @[el2_lsu_bus_intf.scala 268:88] + node _T_133 = and(ld_addr_rhit_hi_hi, _T_132) @[el2_lsu_bus_intf.scala 268:70] + node _T_134 = bits(ldst_byteen_hi_m, 0, 0) @[el2_lsu_bus_intf.scala 268:110] + node _T_135 = and(_T_133, _T_134) @[el2_lsu_bus_intf.scala 268:92] + node _T_136 = bits(ldst_byteen_hi_r, 1, 1) @[el2_lsu_bus_intf.scala 268:88] + node _T_137 = and(ld_addr_rhit_hi_hi, _T_136) @[el2_lsu_bus_intf.scala 268:70] + node _T_138 = bits(ldst_byteen_hi_m, 1, 1) @[el2_lsu_bus_intf.scala 268:110] + node _T_139 = and(_T_137, _T_138) @[el2_lsu_bus_intf.scala 268:92] + node _T_140 = bits(ldst_byteen_hi_r, 2, 2) @[el2_lsu_bus_intf.scala 268:88] + node _T_141 = and(ld_addr_rhit_hi_hi, _T_140) @[el2_lsu_bus_intf.scala 268:70] + node _T_142 = bits(ldst_byteen_hi_m, 2, 2) @[el2_lsu_bus_intf.scala 268:110] + node _T_143 = and(_T_141, _T_142) @[el2_lsu_bus_intf.scala 268:92] + node _T_144 = bits(ldst_byteen_hi_r, 3, 3) @[el2_lsu_bus_intf.scala 268:88] + node _T_145 = and(ld_addr_rhit_hi_hi, _T_144) @[el2_lsu_bus_intf.scala 268:70] + node _T_146 = bits(ldst_byteen_hi_m, 3, 3) @[el2_lsu_bus_intf.scala 268:110] + node _T_147 = and(_T_145, _T_146) @[el2_lsu_bus_intf.scala 268:92] + node _T_148 = cat(_T_147, _T_143) @[Cat.scala 29:58] + node _T_149 = cat(_T_148, _T_139) @[Cat.scala 29:58] + node _T_150 = cat(_T_149, _T_135) @[Cat.scala 29:58] + ld_byte_rhit_hi_hi <= _T_150 @[el2_lsu_bus_intf.scala 268:27] + node _T_151 = bits(ld_byte_rhit_lo_lo, 0, 0) @[el2_lsu_bus_intf.scala 269:69] + node _T_152 = bits(ld_byte_rhit_hi_lo, 0, 0) @[el2_lsu_bus_intf.scala 269:93] + node _T_153 = or(_T_151, _T_152) @[el2_lsu_bus_intf.scala 269:73] + node _T_154 = bits(ld_byte_hit_buf_lo, 0, 0) @[el2_lsu_bus_intf.scala 269:117] + node _T_155 = or(_T_153, _T_154) @[el2_lsu_bus_intf.scala 269:97] + node _T_156 = bits(ld_byte_rhit_lo_lo, 1, 1) @[el2_lsu_bus_intf.scala 269:69] + node _T_157 = bits(ld_byte_rhit_hi_lo, 1, 1) @[el2_lsu_bus_intf.scala 269:93] + node _T_158 = or(_T_156, _T_157) @[el2_lsu_bus_intf.scala 269:73] + node _T_159 = bits(ld_byte_hit_buf_lo, 1, 1) @[el2_lsu_bus_intf.scala 269:117] + node _T_160 = or(_T_158, _T_159) @[el2_lsu_bus_intf.scala 269:97] + node _T_161 = bits(ld_byte_rhit_lo_lo, 2, 2) @[el2_lsu_bus_intf.scala 269:69] + node _T_162 = bits(ld_byte_rhit_hi_lo, 2, 2) @[el2_lsu_bus_intf.scala 269:93] + node _T_163 = or(_T_161, _T_162) @[el2_lsu_bus_intf.scala 269:73] + node _T_164 = bits(ld_byte_hit_buf_lo, 2, 2) @[el2_lsu_bus_intf.scala 269:117] + node _T_165 = or(_T_163, _T_164) @[el2_lsu_bus_intf.scala 269:97] + node _T_166 = bits(ld_byte_rhit_lo_lo, 3, 3) @[el2_lsu_bus_intf.scala 269:69] + node _T_167 = bits(ld_byte_rhit_hi_lo, 3, 3) @[el2_lsu_bus_intf.scala 269:93] + node _T_168 = or(_T_166, _T_167) @[el2_lsu_bus_intf.scala 269:73] + node _T_169 = bits(ld_byte_hit_buf_lo, 3, 3) @[el2_lsu_bus_intf.scala 269:117] + node _T_170 = or(_T_168, _T_169) @[el2_lsu_bus_intf.scala 269:97] + node _T_171 = cat(_T_170, _T_165) @[Cat.scala 29:58] + node _T_172 = cat(_T_171, _T_160) @[Cat.scala 29:58] + node _T_173 = cat(_T_172, _T_155) @[Cat.scala 29:58] + ld_byte_hit_lo <= _T_173 @[el2_lsu_bus_intf.scala 269:27] + node _T_174 = bits(ld_byte_rhit_lo_hi, 0, 0) @[el2_lsu_bus_intf.scala 270:69] + node _T_175 = bits(ld_byte_rhit_hi_hi, 0, 0) @[el2_lsu_bus_intf.scala 270:93] + node _T_176 = or(_T_174, _T_175) @[el2_lsu_bus_intf.scala 270:73] + node _T_177 = bits(ld_byte_hit_buf_hi, 0, 0) @[el2_lsu_bus_intf.scala 270:117] + node _T_178 = or(_T_176, _T_177) @[el2_lsu_bus_intf.scala 270:97] + node _T_179 = bits(ld_byte_rhit_lo_hi, 1, 1) @[el2_lsu_bus_intf.scala 270:69] + node _T_180 = bits(ld_byte_rhit_hi_hi, 1, 1) @[el2_lsu_bus_intf.scala 270:93] + node _T_181 = or(_T_179, _T_180) @[el2_lsu_bus_intf.scala 270:73] + node _T_182 = bits(ld_byte_hit_buf_hi, 1, 1) @[el2_lsu_bus_intf.scala 270:117] + node _T_183 = or(_T_181, _T_182) @[el2_lsu_bus_intf.scala 270:97] + node _T_184 = bits(ld_byte_rhit_lo_hi, 2, 2) @[el2_lsu_bus_intf.scala 270:69] + node _T_185 = bits(ld_byte_rhit_hi_hi, 2, 2) @[el2_lsu_bus_intf.scala 270:93] + node _T_186 = or(_T_184, _T_185) @[el2_lsu_bus_intf.scala 270:73] + node _T_187 = bits(ld_byte_hit_buf_hi, 2, 2) @[el2_lsu_bus_intf.scala 270:117] + node _T_188 = or(_T_186, _T_187) @[el2_lsu_bus_intf.scala 270:97] + node _T_189 = bits(ld_byte_rhit_lo_hi, 3, 3) @[el2_lsu_bus_intf.scala 270:69] + node _T_190 = bits(ld_byte_rhit_hi_hi, 3, 3) @[el2_lsu_bus_intf.scala 270:93] + node _T_191 = or(_T_189, _T_190) @[el2_lsu_bus_intf.scala 270:73] + node _T_192 = bits(ld_byte_hit_buf_hi, 3, 3) @[el2_lsu_bus_intf.scala 270:117] + node _T_193 = or(_T_191, _T_192) @[el2_lsu_bus_intf.scala 270:97] + node _T_194 = cat(_T_193, _T_188) @[Cat.scala 29:58] + node _T_195 = cat(_T_194, _T_183) @[Cat.scala 29:58] + node _T_196 = cat(_T_195, _T_178) @[Cat.scala 29:58] + ld_byte_hit_hi <= _T_196 @[el2_lsu_bus_intf.scala 270:27] + node _T_197 = bits(ld_byte_rhit_lo_lo, 0, 0) @[el2_lsu_bus_intf.scala 271:69] + node _T_198 = bits(ld_byte_rhit_hi_lo, 0, 0) @[el2_lsu_bus_intf.scala 271:93] + node _T_199 = or(_T_197, _T_198) @[el2_lsu_bus_intf.scala 271:73] + node _T_200 = bits(ld_byte_rhit_lo_lo, 1, 1) @[el2_lsu_bus_intf.scala 271:69] + node _T_201 = bits(ld_byte_rhit_hi_lo, 1, 1) @[el2_lsu_bus_intf.scala 271:93] + node _T_202 = or(_T_200, _T_201) @[el2_lsu_bus_intf.scala 271:73] + node _T_203 = bits(ld_byte_rhit_lo_lo, 2, 2) @[el2_lsu_bus_intf.scala 271:69] + node _T_204 = bits(ld_byte_rhit_hi_lo, 2, 2) @[el2_lsu_bus_intf.scala 271:93] + node _T_205 = or(_T_203, _T_204) @[el2_lsu_bus_intf.scala 271:73] + node _T_206 = bits(ld_byte_rhit_lo_lo, 3, 3) @[el2_lsu_bus_intf.scala 271:69] + node _T_207 = bits(ld_byte_rhit_hi_lo, 3, 3) @[el2_lsu_bus_intf.scala 271:93] + node _T_208 = or(_T_206, _T_207) @[el2_lsu_bus_intf.scala 271:73] + node _T_209 = cat(_T_208, _T_205) @[Cat.scala 29:58] + node _T_210 = cat(_T_209, _T_202) @[Cat.scala 29:58] + node _T_211 = cat(_T_210, _T_199) @[Cat.scala 29:58] + ld_byte_rhit_lo <= _T_211 @[el2_lsu_bus_intf.scala 271:27] + node _T_212 = bits(ld_byte_rhit_lo_hi, 0, 0) @[el2_lsu_bus_intf.scala 272:69] + node _T_213 = bits(ld_byte_rhit_hi_hi, 0, 0) @[el2_lsu_bus_intf.scala 272:93] + node _T_214 = or(_T_212, _T_213) @[el2_lsu_bus_intf.scala 272:73] + node _T_215 = bits(ld_byte_rhit_lo_hi, 1, 1) @[el2_lsu_bus_intf.scala 272:69] + node _T_216 = bits(ld_byte_rhit_hi_hi, 1, 1) @[el2_lsu_bus_intf.scala 272:93] + node _T_217 = or(_T_215, _T_216) @[el2_lsu_bus_intf.scala 272:73] + node _T_218 = bits(ld_byte_rhit_lo_hi, 2, 2) @[el2_lsu_bus_intf.scala 272:69] + node _T_219 = bits(ld_byte_rhit_hi_hi, 2, 2) @[el2_lsu_bus_intf.scala 272:93] + node _T_220 = or(_T_218, _T_219) @[el2_lsu_bus_intf.scala 272:73] + node _T_221 = bits(ld_byte_rhit_lo_hi, 3, 3) @[el2_lsu_bus_intf.scala 272:69] + node _T_222 = bits(ld_byte_rhit_hi_hi, 3, 3) @[el2_lsu_bus_intf.scala 272:93] + node _T_223 = or(_T_221, _T_222) @[el2_lsu_bus_intf.scala 272:73] + node _T_224 = cat(_T_223, _T_220) @[Cat.scala 29:58] + node _T_225 = cat(_T_224, _T_217) @[Cat.scala 29:58] + node _T_226 = cat(_T_225, _T_214) @[Cat.scala 29:58] + ld_byte_rhit_hi <= _T_226 @[el2_lsu_bus_intf.scala 272:27] + node _T_227 = bits(ld_byte_rhit_lo_lo, 0, 0) @[el2_lsu_bus_intf.scala 273:79] + node _T_228 = bits(store_data_lo_r, 7, 0) @[el2_lsu_bus_intf.scala 273:101] + node _T_229 = bits(ld_byte_rhit_hi_lo, 0, 0) @[el2_lsu_bus_intf.scala 273:136] + node _T_230 = bits(store_data_hi_r, 7, 0) @[el2_lsu_bus_intf.scala 273:158] + node _T_231 = mux(_T_227, _T_228, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_232 = mux(_T_229, _T_230, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_233 = or(_T_231, _T_232) @[Mux.scala 27:72] + wire _T_234 : UInt<8> @[Mux.scala 27:72] + _T_234 <= _T_233 @[Mux.scala 27:72] + node _T_235 = bits(ld_byte_rhit_lo_lo, 1, 1) @[el2_lsu_bus_intf.scala 273:79] + node _T_236 = bits(store_data_lo_r, 15, 8) @[el2_lsu_bus_intf.scala 273:101] + node _T_237 = bits(ld_byte_rhit_hi_lo, 1, 1) @[el2_lsu_bus_intf.scala 273:136] + node _T_238 = bits(store_data_hi_r, 15, 8) @[el2_lsu_bus_intf.scala 273:158] + node _T_239 = mux(_T_235, _T_236, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_240 = mux(_T_237, _T_238, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_241 = or(_T_239, _T_240) @[Mux.scala 27:72] + wire _T_242 : UInt<8> @[Mux.scala 27:72] + _T_242 <= _T_241 @[Mux.scala 27:72] + node _T_243 = bits(ld_byte_rhit_lo_lo, 2, 2) @[el2_lsu_bus_intf.scala 273:79] + node _T_244 = bits(store_data_lo_r, 23, 16) @[el2_lsu_bus_intf.scala 273:101] + node _T_245 = bits(ld_byte_rhit_hi_lo, 2, 2) @[el2_lsu_bus_intf.scala 273:136] + node _T_246 = bits(store_data_hi_r, 23, 16) @[el2_lsu_bus_intf.scala 273:158] + node _T_247 = mux(_T_243, _T_244, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_248 = mux(_T_245, _T_246, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_249 = or(_T_247, _T_248) @[Mux.scala 27:72] + wire _T_250 : UInt<8> @[Mux.scala 27:72] + _T_250 <= _T_249 @[Mux.scala 27:72] + node _T_251 = bits(ld_byte_rhit_lo_lo, 3, 3) @[el2_lsu_bus_intf.scala 273:79] + node _T_252 = bits(store_data_lo_r, 31, 24) @[el2_lsu_bus_intf.scala 273:101] + node _T_253 = bits(ld_byte_rhit_hi_lo, 3, 3) @[el2_lsu_bus_intf.scala 273:136] + node _T_254 = bits(store_data_hi_r, 31, 24) @[el2_lsu_bus_intf.scala 273:158] + node _T_255 = mux(_T_251, _T_252, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_256 = mux(_T_253, _T_254, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_257 = or(_T_255, _T_256) @[Mux.scala 27:72] + wire _T_258 : UInt<8> @[Mux.scala 27:72] + _T_258 <= _T_257 @[Mux.scala 27:72] + node _T_259 = cat(_T_258, _T_250) @[Cat.scala 29:58] + node _T_260 = cat(_T_259, _T_242) @[Cat.scala 29:58] + node _T_261 = cat(_T_260, _T_234) @[Cat.scala 29:58] + ld_fwddata_rpipe_lo <= _T_261 @[el2_lsu_bus_intf.scala 273:27] + node _T_262 = bits(ld_byte_rhit_lo_hi, 0, 0) @[el2_lsu_bus_intf.scala 274:79] + node _T_263 = bits(store_data_lo_r, 7, 0) @[el2_lsu_bus_intf.scala 274:101] + node _T_264 = bits(ld_byte_rhit_hi_hi, 0, 0) @[el2_lsu_bus_intf.scala 274:136] + node _T_265 = bits(store_data_hi_r, 7, 0) @[el2_lsu_bus_intf.scala 274:158] + node _T_266 = mux(_T_262, _T_263, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_267 = mux(_T_264, _T_265, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_268 = or(_T_266, _T_267) @[Mux.scala 27:72] + wire _T_269 : UInt<8> @[Mux.scala 27:72] + _T_269 <= _T_268 @[Mux.scala 27:72] + node _T_270 = bits(ld_byte_rhit_lo_hi, 1, 1) @[el2_lsu_bus_intf.scala 274:79] + node _T_271 = bits(store_data_lo_r, 15, 8) @[el2_lsu_bus_intf.scala 274:101] + node _T_272 = bits(ld_byte_rhit_hi_hi, 1, 1) @[el2_lsu_bus_intf.scala 274:136] + node _T_273 = bits(store_data_hi_r, 15, 8) @[el2_lsu_bus_intf.scala 274:158] + node _T_274 = mux(_T_270, _T_271, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_275 = mux(_T_272, _T_273, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_276 = or(_T_274, _T_275) @[Mux.scala 27:72] + wire _T_277 : UInt<8> @[Mux.scala 27:72] + _T_277 <= _T_276 @[Mux.scala 27:72] + node _T_278 = bits(ld_byte_rhit_lo_hi, 2, 2) @[el2_lsu_bus_intf.scala 274:79] + node _T_279 = bits(store_data_lo_r, 23, 16) @[el2_lsu_bus_intf.scala 274:101] + node _T_280 = bits(ld_byte_rhit_hi_hi, 2, 2) @[el2_lsu_bus_intf.scala 274:136] + node _T_281 = bits(store_data_hi_r, 23, 16) @[el2_lsu_bus_intf.scala 274:158] + node _T_282 = mux(_T_278, _T_279, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_283 = mux(_T_280, _T_281, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_284 = or(_T_282, _T_283) @[Mux.scala 27:72] + wire _T_285 : UInt<8> @[Mux.scala 27:72] + _T_285 <= _T_284 @[Mux.scala 27:72] + node _T_286 = bits(ld_byte_rhit_lo_hi, 3, 3) @[el2_lsu_bus_intf.scala 274:79] + node _T_287 = bits(store_data_lo_r, 31, 24) @[el2_lsu_bus_intf.scala 274:101] + node _T_288 = bits(ld_byte_rhit_hi_hi, 3, 3) @[el2_lsu_bus_intf.scala 274:136] + node _T_289 = bits(store_data_hi_r, 31, 24) @[el2_lsu_bus_intf.scala 274:158] + node _T_290 = mux(_T_286, _T_287, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_291 = mux(_T_288, _T_289, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_292 = or(_T_290, _T_291) @[Mux.scala 27:72] + wire _T_293 : UInt<8> @[Mux.scala 27:72] + _T_293 <= _T_292 @[Mux.scala 27:72] + node _T_294 = cat(_T_293, _T_285) @[Cat.scala 29:58] + node _T_295 = cat(_T_294, _T_277) @[Cat.scala 29:58] + node _T_296 = cat(_T_295, _T_269) @[Cat.scala 29:58] + ld_fwddata_rpipe_hi <= _T_296 @[el2_lsu_bus_intf.scala 274:27] + node _T_297 = bits(ld_byte_rhit_lo, 0, 0) @[el2_lsu_bus_intf.scala 275:70] + node _T_298 = bits(ld_fwddata_rpipe_lo, 7, 0) @[el2_lsu_bus_intf.scala 275:94] + node _T_299 = bits(ld_fwddata_buf_lo, 7, 0) @[el2_lsu_bus_intf.scala 275:128] + node _T_300 = mux(_T_297, _T_298, _T_299) @[el2_lsu_bus_intf.scala 275:54] + node _T_301 = bits(ld_byte_rhit_lo, 1, 1) @[el2_lsu_bus_intf.scala 275:70] + node _T_302 = bits(ld_fwddata_rpipe_lo, 15, 8) @[el2_lsu_bus_intf.scala 275:94] + node _T_303 = bits(ld_fwddata_buf_lo, 15, 8) @[el2_lsu_bus_intf.scala 275:128] + node _T_304 = mux(_T_301, _T_302, _T_303) @[el2_lsu_bus_intf.scala 275:54] + node _T_305 = bits(ld_byte_rhit_lo, 2, 2) @[el2_lsu_bus_intf.scala 275:70] + node _T_306 = bits(ld_fwddata_rpipe_lo, 23, 16) @[el2_lsu_bus_intf.scala 275:94] + node _T_307 = bits(ld_fwddata_buf_lo, 23, 16) @[el2_lsu_bus_intf.scala 275:128] + node _T_308 = mux(_T_305, _T_306, _T_307) @[el2_lsu_bus_intf.scala 275:54] + node _T_309 = bits(ld_byte_rhit_lo, 3, 3) @[el2_lsu_bus_intf.scala 275:70] + node _T_310 = bits(ld_fwddata_rpipe_lo, 31, 24) @[el2_lsu_bus_intf.scala 275:94] + node _T_311 = bits(ld_fwddata_buf_lo, 31, 24) @[el2_lsu_bus_intf.scala 275:128] + node _T_312 = mux(_T_309, _T_310, _T_311) @[el2_lsu_bus_intf.scala 275:54] + node _T_313 = cat(_T_312, _T_308) @[Cat.scala 29:58] + node _T_314 = cat(_T_313, _T_304) @[Cat.scala 29:58] + node _T_315 = cat(_T_314, _T_300) @[Cat.scala 29:58] + ld_fwddata_lo <= _T_315 @[el2_lsu_bus_intf.scala 275:27] + node _T_316 = bits(ld_byte_rhit_hi, 0, 0) @[el2_lsu_bus_intf.scala 276:70] + node _T_317 = bits(ld_fwddata_rpipe_hi, 7, 0) @[el2_lsu_bus_intf.scala 276:94] + node _T_318 = bits(ld_fwddata_buf_hi, 7, 0) @[el2_lsu_bus_intf.scala 276:128] + node _T_319 = mux(_T_316, _T_317, _T_318) @[el2_lsu_bus_intf.scala 276:54] + node _T_320 = bits(ld_byte_rhit_hi, 1, 1) @[el2_lsu_bus_intf.scala 276:70] + node _T_321 = bits(ld_fwddata_rpipe_hi, 15, 8) @[el2_lsu_bus_intf.scala 276:94] + node _T_322 = bits(ld_fwddata_buf_hi, 15, 8) @[el2_lsu_bus_intf.scala 276:128] + node _T_323 = mux(_T_320, _T_321, _T_322) @[el2_lsu_bus_intf.scala 276:54] + node _T_324 = bits(ld_byte_rhit_hi, 2, 2) @[el2_lsu_bus_intf.scala 276:70] + node _T_325 = bits(ld_fwddata_rpipe_hi, 23, 16) @[el2_lsu_bus_intf.scala 276:94] + node _T_326 = bits(ld_fwddata_buf_hi, 23, 16) @[el2_lsu_bus_intf.scala 276:128] + node _T_327 = mux(_T_324, _T_325, _T_326) @[el2_lsu_bus_intf.scala 276:54] + node _T_328 = bits(ld_byte_rhit_hi, 3, 3) @[el2_lsu_bus_intf.scala 276:70] + node _T_329 = bits(ld_fwddata_rpipe_hi, 31, 24) @[el2_lsu_bus_intf.scala 276:94] + node _T_330 = bits(ld_fwddata_buf_hi, 31, 24) @[el2_lsu_bus_intf.scala 276:128] + node _T_331 = mux(_T_328, _T_329, _T_330) @[el2_lsu_bus_intf.scala 276:54] + node _T_332 = cat(_T_331, _T_327) @[Cat.scala 29:58] + node _T_333 = cat(_T_332, _T_323) @[Cat.scala 29:58] + node _T_334 = cat(_T_333, _T_319) @[Cat.scala 29:58] + ld_fwddata_hi <= _T_334 @[el2_lsu_bus_intf.scala 276:27] + node _T_335 = bits(ld_byte_hit_lo, 0, 0) @[el2_lsu_bus_intf.scala 277:66] + node _T_336 = bits(ldst_byteen_lo_m, 0, 0) @[el2_lsu_bus_intf.scala 277:89] + node _T_337 = eq(_T_336, UInt<1>("h00")) @[el2_lsu_bus_intf.scala 277:72] + node _T_338 = or(_T_335, _T_337) @[el2_lsu_bus_intf.scala 277:70] + node _T_339 = bits(ld_byte_hit_lo, 1, 1) @[el2_lsu_bus_intf.scala 277:66] + node _T_340 = bits(ldst_byteen_lo_m, 1, 1) @[el2_lsu_bus_intf.scala 277:89] + node _T_341 = eq(_T_340, UInt<1>("h00")) @[el2_lsu_bus_intf.scala 277:72] + node _T_342 = or(_T_339, _T_341) @[el2_lsu_bus_intf.scala 277:70] + node _T_343 = bits(ld_byte_hit_lo, 2, 2) @[el2_lsu_bus_intf.scala 277:66] + node _T_344 = bits(ldst_byteen_lo_m, 2, 2) @[el2_lsu_bus_intf.scala 277:89] + node _T_345 = eq(_T_344, UInt<1>("h00")) @[el2_lsu_bus_intf.scala 277:72] + node _T_346 = or(_T_343, _T_345) @[el2_lsu_bus_intf.scala 277:70] + node _T_347 = bits(ld_byte_hit_lo, 3, 3) @[el2_lsu_bus_intf.scala 277:66] + node _T_348 = bits(ldst_byteen_lo_m, 3, 3) @[el2_lsu_bus_intf.scala 277:89] + node _T_349 = eq(_T_348, UInt<1>("h00")) @[el2_lsu_bus_intf.scala 277:72] + node _T_350 = or(_T_347, _T_349) @[el2_lsu_bus_intf.scala 277:70] + node _T_351 = and(_T_338, _T_342) @[el2_lsu_bus_intf.scala 277:111] + node _T_352 = and(_T_351, _T_346) @[el2_lsu_bus_intf.scala 277:111] + node _T_353 = and(_T_352, _T_350) @[el2_lsu_bus_intf.scala 277:111] + ld_full_hit_lo_m <= _T_353 @[el2_lsu_bus_intf.scala 277:27] + node _T_354 = bits(ld_byte_hit_hi, 0, 0) @[el2_lsu_bus_intf.scala 278:66] + node _T_355 = bits(ldst_byteen_hi_m, 0, 0) @[el2_lsu_bus_intf.scala 278:89] + node _T_356 = eq(_T_355, UInt<1>("h00")) @[el2_lsu_bus_intf.scala 278:72] + node _T_357 = or(_T_354, _T_356) @[el2_lsu_bus_intf.scala 278:70] + node _T_358 = bits(ld_byte_hit_hi, 1, 1) @[el2_lsu_bus_intf.scala 278:66] + node _T_359 = bits(ldst_byteen_hi_m, 1, 1) @[el2_lsu_bus_intf.scala 278:89] + node _T_360 = eq(_T_359, UInt<1>("h00")) @[el2_lsu_bus_intf.scala 278:72] + node _T_361 = or(_T_358, _T_360) @[el2_lsu_bus_intf.scala 278:70] + node _T_362 = bits(ld_byte_hit_hi, 2, 2) @[el2_lsu_bus_intf.scala 278:66] + node _T_363 = bits(ldst_byteen_hi_m, 2, 2) @[el2_lsu_bus_intf.scala 278:89] + node _T_364 = eq(_T_363, UInt<1>("h00")) @[el2_lsu_bus_intf.scala 278:72] + node _T_365 = or(_T_362, _T_364) @[el2_lsu_bus_intf.scala 278:70] + node _T_366 = bits(ld_byte_hit_hi, 3, 3) @[el2_lsu_bus_intf.scala 278:66] + node _T_367 = bits(ldst_byteen_hi_m, 3, 3) @[el2_lsu_bus_intf.scala 278:89] + node _T_368 = eq(_T_367, UInt<1>("h00")) @[el2_lsu_bus_intf.scala 278:72] + node _T_369 = or(_T_366, _T_368) @[el2_lsu_bus_intf.scala 278:70] + node _T_370 = and(_T_357, _T_361) @[el2_lsu_bus_intf.scala 278:111] + node _T_371 = and(_T_370, _T_365) @[el2_lsu_bus_intf.scala 278:111] + node _T_372 = and(_T_371, _T_369) @[el2_lsu_bus_intf.scala 278:111] + ld_full_hit_hi_m <= _T_372 @[el2_lsu_bus_intf.scala 278:27] + node _T_373 = and(ld_full_hit_lo_m, ld_full_hit_hi_m) @[el2_lsu_bus_intf.scala 279:47] + node _T_374 = and(_T_373, io.lsu_busreq_m) @[el2_lsu_bus_intf.scala 279:66] + node _T_375 = and(_T_374, io.lsu_pkt_m.load) @[el2_lsu_bus_intf.scala 279:84] + node _T_376 = eq(io.is_sideeffects_m, UInt<1>("h00")) @[el2_lsu_bus_intf.scala 279:106] + node _T_377 = and(_T_375, _T_376) @[el2_lsu_bus_intf.scala 279:104] + ld_full_hit_m <= _T_377 @[el2_lsu_bus_intf.scala 279:27] + node _T_378 = bits(ld_fwddata_hi, 31, 0) @[el2_lsu_bus_intf.scala 280:47] + node _T_379 = bits(ld_fwddata_lo, 31, 0) @[el2_lsu_bus_intf.scala 280:68] + node _T_380 = cat(_T_378, _T_379) @[Cat.scala 29:58] + node _T_381 = bits(io.lsu_addr_m, 1, 0) @[el2_lsu_bus_intf.scala 280:97] + node _T_382 = mul(UInt<4>("h08"), _T_381) @[el2_lsu_bus_intf.scala 280:83] + node _T_383 = dshr(_T_380, _T_382) @[el2_lsu_bus_intf.scala 280:76] + ld_fwddata_m <= _T_383 @[el2_lsu_bus_intf.scala 280:27] + node _T_384 = bits(ld_fwddata_m, 31, 0) @[el2_lsu_bus_intf.scala 281:42] + io.bus_read_data_m <= _T_384 @[el2_lsu_bus_intf.scala 281:27] + reg _T_385 : UInt<1>, io.free_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_intf.scala 284:32] + _T_385 <= io.lsu_bus_clk_en @[el2_lsu_bus_intf.scala 284:32] + lsu_bus_clk_en_q <= _T_385 @[el2_lsu_bus_intf.scala 284:22] + reg _T_386 : UInt<1>, io.lsu_c1_m_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_intf.scala 287:27] + _T_386 <= io.lsu_bus_clk_en @[el2_lsu_bus_intf.scala 287:27] + ldst_dual_m <= _T_386 @[el2_lsu_bus_intf.scala 287:17] + reg _T_387 : UInt<1>, io.lsu_c1_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_intf.scala 290:33] + _T_387 <= io.lsu_bus_clk_en @[el2_lsu_bus_intf.scala 290:33] + ldst_dual_r <= _T_387 @[el2_lsu_bus_intf.scala 290:23] + reg _T_388 : UInt<1>, io.lsu_c1_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_intf.scala 291:33] + _T_388 <= io.lsu_bus_clk_en @[el2_lsu_bus_intf.scala 291:33] + is_sideeffects_r <= _T_388 @[el2_lsu_bus_intf.scala 291:23] + reg _T_389 : UInt<1>, io.lsu_c1_r_clk with : (reset => (reset, UInt<4>("h00"))) @[el2_lsu_bus_intf.scala 292:33] + _T_389 <= io.lsu_bus_clk_en @[el2_lsu_bus_intf.scala 292:33] + ldst_byteen_r <= _T_389 @[el2_lsu_bus_intf.scala 292:23] + diff --git a/el2_lsu_bus_intf.v b/el2_lsu_bus_intf.v new file mode 100644 index 00000000..8178a0fe --- /dev/null +++ b/el2_lsu_bus_intf.v @@ -0,0 +1,5220 @@ +module rvclkhdr( + output io_l1clk, + input io_clk, + input io_en, + input io_scan_mode +); + wire clkhdr_Q; // @[el2_lib.scala 472:26] + wire clkhdr_CK; // @[el2_lib.scala 472:26] + wire clkhdr_EN; // @[el2_lib.scala 472:26] + wire clkhdr_SE; // @[el2_lib.scala 472:26] + TEC_RV_ICG clkhdr ( // @[el2_lib.scala 472:26] + .Q(clkhdr_Q), + .CK(clkhdr_CK), + .EN(clkhdr_EN), + .SE(clkhdr_SE) + ); + assign io_l1clk = clkhdr_Q; // @[el2_lib.scala 473:14] + assign clkhdr_CK = io_clk; // @[el2_lib.scala 474:18] + assign clkhdr_EN = io_en; // @[el2_lib.scala 475:18] + assign clkhdr_SE = io_scan_mode; // @[el2_lib.scala 476:18] +endmodule +module el2_lsu_bus_buffer( + input clock, + input reset, + input io_scan_mode, + input io_dec_tlu_external_ldfwd_disable, + input io_dec_tlu_wb_coalescing_disable, + input io_dec_tlu_sideeffect_posted_disable, + input io_dec_tlu_force_halt, + input io_lsu_c2_r_clk, + input io_lsu_bus_ibuf_c1_clk, + input io_lsu_bus_buf_c1_clk, + input io_lsu_free_c2_clk, + input io_lsu_busm_clk, + input io_dec_lsu_valid_raw_d, + input io_lsu_pkt_m_load, + input io_lsu_pkt_m_valid, + input io_lsu_pkt_r_by, + input io_lsu_pkt_r_half, + input io_lsu_pkt_r_word, + input io_lsu_pkt_r_load, + input io_lsu_pkt_r_store, + input io_lsu_pkt_r_unsign, + input [31:0] io_lsu_addr_m, + input [31:0] io_end_addr_m, + input [31:0] io_lsu_addr_r, + input [31:0] io_end_addr_r, + input [31:0] io_store_data_r, + input io_no_word_merge_r, + input io_no_dword_merge_r, + input io_lsu_busreq_m, + input io_ld_full_hit_m, + input io_flush_m_up, + input io_flush_r, + input io_lsu_commit_r, + input io_is_sideeffects_r, + input io_ldst_dual_d, + input io_ldst_dual_m, + input io_ldst_dual_r, + input [7:0] io_ldst_byteen_ext_m, + input io_lsu_axi_awready, + input io_lsu_axi_wready, + input io_lsu_axi_bvalid, + input [1:0] io_lsu_axi_bresp, + input [2:0] io_lsu_axi_bid, + input io_lsu_axi_arready, + input io_lsu_axi_rvalid, + input [2:0] io_lsu_axi_rid, + input [63:0] io_lsu_axi_rdata, + input io_lsu_bus_clk_en, + input io_lsu_bus_clk_en_q, + output io_lsu_busreq_r, + output io_lsu_bus_buffer_pend_any, + output io_lsu_bus_buffer_full_any, + output io_lsu_bus_buffer_empty_any, + output [3:0] io_ld_byte_hit_buf_lo, + output [3:0] io_ld_byte_hit_buf_hi, + output [31:0] io_ld_fwddata_buf_lo, + output [31:0] io_ld_fwddata_buf_hi, + output io_lsu_imprecise_error_load_any, + output io_lsu_imprecise_error_store_any, + output [31:0] io_lsu_imprecise_error_addr_any, + output io_lsu_nonblock_load_valid_m, + output [1:0] io_lsu_nonblock_load_tag_m, + output io_lsu_nonblock_load_inv_r, + output [1:0] io_lsu_nonblock_load_inv_tag_r, + output io_lsu_nonblock_load_data_valid, + output io_lsu_nonblock_load_data_error, + output [1:0] io_lsu_nonblock_load_data_tag, + output [31:0] io_lsu_nonblock_load_data, + output io_lsu_pmu_bus_trxn, + output io_lsu_pmu_bus_misaligned, + output io_lsu_pmu_bus_error, + output io_lsu_pmu_bus_busy, + output io_lsu_axi_awvalid, + output [2:0] io_lsu_axi_awid, + output [31:0] io_lsu_axi_awaddr, + output [3:0] io_lsu_axi_awregion, + output [2:0] io_lsu_axi_awsize, + output [3:0] io_lsu_axi_awcache, + output io_lsu_axi_wvalid, + output [63:0] io_lsu_axi_wdata, + output [7:0] io_lsu_axi_wstrb, + output io_lsu_axi_bready, + output io_lsu_axi_arvalid, + output [2:0] io_lsu_axi_arid, + output [31:0] io_lsu_axi_araddr, + output [3:0] io_lsu_axi_arregion, + output [2:0] io_lsu_axi_arsize, + output [3:0] io_lsu_axi_arcache, + output io_lsu_axi_rready +); +`ifdef RANDOMIZE_REG_INIT + reg [31:0] _RAND_0; + reg [31:0] _RAND_1; + reg [31:0] _RAND_2; + reg [31:0] _RAND_3; + reg [31:0] _RAND_4; + reg [31:0] _RAND_5; + reg [31:0] _RAND_6; + reg [31:0] _RAND_7; + reg [31:0] _RAND_8; + reg [31:0] _RAND_9; + reg [31:0] _RAND_10; + reg [31:0] _RAND_11; + reg [31:0] _RAND_12; + reg [31:0] _RAND_13; + reg [31:0] _RAND_14; + reg [31:0] _RAND_15; + reg [31:0] _RAND_16; + reg [31:0] _RAND_17; + reg [31:0] _RAND_18; + reg [31:0] _RAND_19; + reg [31:0] _RAND_20; + reg [31:0] _RAND_21; + reg [31:0] _RAND_22; + reg [31:0] _RAND_23; + reg [31:0] _RAND_24; + reg [31:0] _RAND_25; + reg [31:0] _RAND_26; + reg [31:0] _RAND_27; + reg [31:0] _RAND_28; + reg [31:0] _RAND_29; + reg [31:0] _RAND_30; + reg [31:0] _RAND_31; + reg [31:0] _RAND_32; + reg [31:0] _RAND_33; + reg [31:0] _RAND_34; + reg [31:0] _RAND_35; + reg [31:0] _RAND_36; + reg [31:0] _RAND_37; + reg [31:0] _RAND_38; + reg [31:0] _RAND_39; + reg [31:0] _RAND_40; + reg [31:0] _RAND_41; + reg [31:0] _RAND_42; + reg [31:0] _RAND_43; + reg [31:0] _RAND_44; + reg [31:0] _RAND_45; + reg [31:0] _RAND_46; + reg [31:0] _RAND_47; + reg [31:0] _RAND_48; + reg [31:0] _RAND_49; + reg [31:0] _RAND_50; + reg [31:0] _RAND_51; + reg [31:0] _RAND_52; + reg [31:0] _RAND_53; + reg [31:0] _RAND_54; + reg [31:0] _RAND_55; + reg [31:0] _RAND_56; + reg [31:0] _RAND_57; + reg [31:0] _RAND_58; + reg [31:0] _RAND_59; + reg [31:0] _RAND_60; + reg [31:0] _RAND_61; + reg [31:0] _RAND_62; + reg [31:0] _RAND_63; + reg [31:0] _RAND_64; + reg [31:0] _RAND_65; + reg [31:0] _RAND_66; + reg [31:0] _RAND_67; + reg [31:0] _RAND_68; + reg [31:0] _RAND_69; + reg [31:0] _RAND_70; + reg [31:0] _RAND_71; + reg [31:0] _RAND_72; + reg [31:0] _RAND_73; + reg [31:0] _RAND_74; + reg [31:0] _RAND_75; + reg [31:0] _RAND_76; + reg [31:0] _RAND_77; + reg [31:0] _RAND_78; + reg [31:0] _RAND_79; + reg [63:0] _RAND_80; + reg [31:0] _RAND_81; + reg [31:0] _RAND_82; + reg [31:0] _RAND_83; + reg [31:0] _RAND_84; + reg [31:0] _RAND_85; + reg [31:0] _RAND_86; + reg [31:0] _RAND_87; + reg [31:0] _RAND_88; + reg [31:0] _RAND_89; + reg [31:0] _RAND_90; + reg [31:0] _RAND_91; + reg [31:0] _RAND_92; + reg [31:0] _RAND_93; + reg [31:0] _RAND_94; + reg [31:0] _RAND_95; + reg [31:0] _RAND_96; + reg [31:0] _RAND_97; + reg [31:0] _RAND_98; + reg [31:0] _RAND_99; + reg [31:0] _RAND_100; + reg [31:0] _RAND_101; + reg [31:0] _RAND_102; + reg [31:0] _RAND_103; + reg [31:0] _RAND_104; + reg [31:0] _RAND_105; + reg [31:0] _RAND_106; +`endif // RANDOMIZE_REG_INIT + wire rvclkhdr_io_l1clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_io_clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_io_en; // @[el2_lib.scala 506:23] + wire rvclkhdr_io_scan_mode; // @[el2_lib.scala 506:23] + wire rvclkhdr_1_io_l1clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_1_io_clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_1_io_en; // @[el2_lib.scala 506:23] + wire rvclkhdr_1_io_scan_mode; // @[el2_lib.scala 506:23] + wire rvclkhdr_2_io_l1clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_2_io_clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_2_io_en; // @[el2_lib.scala 506:23] + wire rvclkhdr_2_io_scan_mode; // @[el2_lib.scala 506:23] + wire rvclkhdr_3_io_l1clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_3_io_clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_3_io_en; // @[el2_lib.scala 506:23] + wire rvclkhdr_3_io_scan_mode; // @[el2_lib.scala 506:23] + wire rvclkhdr_4_io_l1clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_4_io_clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_4_io_en; // @[el2_lib.scala 506:23] + wire rvclkhdr_4_io_scan_mode; // @[el2_lib.scala 506:23] + wire rvclkhdr_5_io_l1clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_5_io_clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_5_io_en; // @[el2_lib.scala 506:23] + wire rvclkhdr_5_io_scan_mode; // @[el2_lib.scala 506:23] + wire rvclkhdr_6_io_l1clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_6_io_clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_6_io_en; // @[el2_lib.scala 506:23] + wire rvclkhdr_6_io_scan_mode; // @[el2_lib.scala 506:23] + wire rvclkhdr_7_io_l1clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_7_io_clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_7_io_en; // @[el2_lib.scala 506:23] + wire rvclkhdr_7_io_scan_mode; // @[el2_lib.scala 506:23] + wire rvclkhdr_8_io_l1clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_8_io_clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_8_io_en; // @[el2_lib.scala 506:23] + wire rvclkhdr_8_io_scan_mode; // @[el2_lib.scala 506:23] + wire rvclkhdr_9_io_l1clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_9_io_clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_9_io_en; // @[el2_lib.scala 506:23] + wire rvclkhdr_9_io_scan_mode; // @[el2_lib.scala 506:23] + wire rvclkhdr_10_io_l1clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_10_io_clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_10_io_en; // @[el2_lib.scala 506:23] + wire rvclkhdr_10_io_scan_mode; // @[el2_lib.scala 506:23] + wire rvclkhdr_11_io_l1clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_11_io_clk; // @[el2_lib.scala 506:23] + wire rvclkhdr_11_io_en; // @[el2_lib.scala 506:23] + wire rvclkhdr_11_io_scan_mode; // @[el2_lib.scala 506:23] + wire [3:0] ldst_byteen_hi_m = io_ldst_byteen_ext_m[7:4]; // @[el2_lsu_bus_buffer.scala 125:46] + wire [3:0] ldst_byteen_lo_m = io_ldst_byteen_ext_m[3:0]; // @[el2_lsu_bus_buffer.scala 126:46] + reg [31:0] buf_addr_0; // @[el2_lib.scala 512:16] + wire _T_2 = io_lsu_addr_m[31:2] == buf_addr_0[31:2]; // @[el2_lsu_bus_buffer.scala 128:74] + reg _T_4381; // @[Reg.scala 27:20] + reg _T_4378; // @[Reg.scala 27:20] + reg _T_4375; // @[Reg.scala 27:20] + reg _T_4372; // @[Reg.scala 27:20] + wire [3:0] buf_write = {_T_4381,_T_4378,_T_4375,_T_4372}; // @[Cat.scala 29:58] + wire _T_4 = _T_2 & buf_write[0]; // @[el2_lsu_bus_buffer.scala 128:98] + reg [2:0] buf_state_0; // @[Reg.scala 27:20] + wire _T_5 = buf_state_0 != 3'h0; // @[el2_lsu_bus_buffer.scala 128:129] + wire _T_6 = _T_4 & _T_5; // @[el2_lsu_bus_buffer.scala 128:113] + wire ld_addr_hitvec_lo_0 = _T_6 & io_lsu_busreq_m; // @[el2_lsu_bus_buffer.scala 128:141] + reg [31:0] buf_addr_1; // @[el2_lib.scala 512:16] + wire _T_9 = io_lsu_addr_m[31:2] == buf_addr_1[31:2]; // @[el2_lsu_bus_buffer.scala 128:74] + wire _T_11 = _T_9 & buf_write[1]; // @[el2_lsu_bus_buffer.scala 128:98] + reg [2:0] buf_state_1; // @[Reg.scala 27:20] + wire _T_12 = buf_state_1 != 3'h0; // @[el2_lsu_bus_buffer.scala 128:129] + wire _T_13 = _T_11 & _T_12; // @[el2_lsu_bus_buffer.scala 128:113] + wire ld_addr_hitvec_lo_1 = _T_13 & io_lsu_busreq_m; // @[el2_lsu_bus_buffer.scala 128:141] + reg [31:0] buf_addr_2; // @[el2_lib.scala 512:16] + wire _T_16 = io_lsu_addr_m[31:2] == buf_addr_2[31:2]; // @[el2_lsu_bus_buffer.scala 128:74] + wire _T_18 = _T_16 & buf_write[2]; // @[el2_lsu_bus_buffer.scala 128:98] + reg [2:0] buf_state_2; // @[Reg.scala 27:20] + wire _T_19 = buf_state_2 != 3'h0; // @[el2_lsu_bus_buffer.scala 128:129] + wire _T_20 = _T_18 & _T_19; // @[el2_lsu_bus_buffer.scala 128:113] + wire ld_addr_hitvec_lo_2 = _T_20 & io_lsu_busreq_m; // @[el2_lsu_bus_buffer.scala 128:141] + reg [31:0] buf_addr_3; // @[el2_lib.scala 512:16] + wire _T_23 = io_lsu_addr_m[31:2] == buf_addr_3[31:2]; // @[el2_lsu_bus_buffer.scala 128:74] + wire _T_25 = _T_23 & buf_write[3]; // @[el2_lsu_bus_buffer.scala 128:98] + reg [2:0] buf_state_3; // @[Reg.scala 27:20] + wire _T_26 = buf_state_3 != 3'h0; // @[el2_lsu_bus_buffer.scala 128:129] + wire _T_27 = _T_25 & _T_26; // @[el2_lsu_bus_buffer.scala 128:113] + wire ld_addr_hitvec_lo_3 = _T_27 & io_lsu_busreq_m; // @[el2_lsu_bus_buffer.scala 128:141] + wire _T_30 = io_end_addr_m[31:2] == buf_addr_0[31:2]; // @[el2_lsu_bus_buffer.scala 129:74] + wire _T_32 = _T_30 & buf_write[0]; // @[el2_lsu_bus_buffer.scala 129:98] + wire _T_34 = _T_32 & _T_5; // @[el2_lsu_bus_buffer.scala 129:113] + wire ld_addr_hitvec_hi_0 = _T_34 & io_lsu_busreq_m; // @[el2_lsu_bus_buffer.scala 129:141] + wire _T_37 = io_end_addr_m[31:2] == buf_addr_1[31:2]; // @[el2_lsu_bus_buffer.scala 129:74] + wire _T_39 = _T_37 & buf_write[1]; // @[el2_lsu_bus_buffer.scala 129:98] + wire _T_41 = _T_39 & _T_12; // @[el2_lsu_bus_buffer.scala 129:113] + wire ld_addr_hitvec_hi_1 = _T_41 & io_lsu_busreq_m; // @[el2_lsu_bus_buffer.scala 129:141] + wire _T_44 = io_end_addr_m[31:2] == buf_addr_2[31:2]; // @[el2_lsu_bus_buffer.scala 129:74] + wire _T_46 = _T_44 & buf_write[2]; // @[el2_lsu_bus_buffer.scala 129:98] + wire _T_48 = _T_46 & _T_19; // @[el2_lsu_bus_buffer.scala 129:113] + wire ld_addr_hitvec_hi_2 = _T_48 & io_lsu_busreq_m; // @[el2_lsu_bus_buffer.scala 129:141] + wire _T_51 = io_end_addr_m[31:2] == buf_addr_3[31:2]; // @[el2_lsu_bus_buffer.scala 129:74] + wire _T_53 = _T_51 & buf_write[3]; // @[el2_lsu_bus_buffer.scala 129:98] + wire _T_55 = _T_53 & _T_26; // @[el2_lsu_bus_buffer.scala 129:113] + wire ld_addr_hitvec_hi_3 = _T_55 & io_lsu_busreq_m; // @[el2_lsu_bus_buffer.scala 129:141] + reg [3:0] buf_byteen_3; // @[Reg.scala 27:20] + wire _T_99 = ld_addr_hitvec_lo_3 & buf_byteen_3[0]; // @[el2_lsu_bus_buffer.scala 192:95] + wire _T_101 = _T_99 & ldst_byteen_lo_m[0]; // @[el2_lsu_bus_buffer.scala 192:114] + reg [3:0] buf_byteen_2; // @[Reg.scala 27:20] + wire _T_95 = ld_addr_hitvec_lo_2 & buf_byteen_2[0]; // @[el2_lsu_bus_buffer.scala 192:95] + wire _T_97 = _T_95 & ldst_byteen_lo_m[0]; // @[el2_lsu_bus_buffer.scala 192:114] + reg [3:0] buf_byteen_1; // @[Reg.scala 27:20] + wire _T_91 = ld_addr_hitvec_lo_1 & buf_byteen_1[0]; // @[el2_lsu_bus_buffer.scala 192:95] + wire _T_93 = _T_91 & ldst_byteen_lo_m[0]; // @[el2_lsu_bus_buffer.scala 192:114] + reg [3:0] buf_byteen_0; // @[Reg.scala 27:20] + wire _T_87 = ld_addr_hitvec_lo_0 & buf_byteen_0[0]; // @[el2_lsu_bus_buffer.scala 192:95] + wire _T_89 = _T_87 & ldst_byteen_lo_m[0]; // @[el2_lsu_bus_buffer.scala 192:114] + wire [3:0] ld_byte_hitvec_lo_0 = {_T_101,_T_97,_T_93,_T_89}; // @[Cat.scala 29:58] + reg [3:0] buf_ageQ_3; // @[el2_lsu_bus_buffer.scala 551:60] + wire _T_2642 = buf_state_3 == 3'h2; // @[el2_lsu_bus_buffer.scala 463:95] + wire _T_4128 = 3'h0 == buf_state_3; // @[Conditional.scala 37:30] + wire _T_4151 = 3'h1 == buf_state_3; // @[Conditional.scala 37:30] + wire _T_4155 = 3'h2 == buf_state_3; // @[Conditional.scala 37:30] + reg [1:0] _T_1869; // @[Reg.scala 27:20] + wire [2:0] obuf_tag0 = {{1'd0}, _T_1869}; // @[el2_lsu_bus_buffer.scala 403:13] + wire _T_4162 = obuf_tag0 == 3'h3; // @[el2_lsu_bus_buffer.scala 506:48] + reg obuf_merge; // @[Reg.scala 27:20] + reg [1:0] obuf_tag1; // @[Reg.scala 27:20] + wire [2:0] _GEN_350 = {{1'd0}, obuf_tag1}; // @[el2_lsu_bus_buffer.scala 506:104] + wire _T_4163 = _GEN_350 == 3'h3; // @[el2_lsu_bus_buffer.scala 506:104] + wire _T_4164 = obuf_merge & _T_4163; // @[el2_lsu_bus_buffer.scala 506:91] + wire _T_4165 = _T_4162 | _T_4164; // @[el2_lsu_bus_buffer.scala 506:77] + reg obuf_valid; // @[el2_lsu_bus_buffer.scala 397:54] + wire _T_4166 = _T_4165 & obuf_valid; // @[el2_lsu_bus_buffer.scala 506:135] + reg obuf_wr_enQ; // @[el2_lsu_bus_buffer.scala 396:55] + wire _T_4167 = _T_4166 & obuf_wr_enQ; // @[el2_lsu_bus_buffer.scala 506:148] + wire _GEN_280 = _T_4155 & _T_4167; // @[Conditional.scala 39:67] + wire _GEN_293 = _T_4151 ? 1'h0 : _GEN_280; // @[Conditional.scala 39:67] + wire buf_cmd_state_bus_en_3 = _T_4128 ? 1'h0 : _GEN_293; // @[Conditional.scala 40:58] + wire _T_2643 = _T_2642 & buf_cmd_state_bus_en_3; // @[el2_lsu_bus_buffer.scala 463:105] + wire _T_2644 = ~_T_2643; // @[el2_lsu_bus_buffer.scala 463:80] + wire _T_2645 = buf_ageQ_3[3] & _T_2644; // @[el2_lsu_bus_buffer.scala 463:78] + wire _T_2637 = buf_state_2 == 3'h2; // @[el2_lsu_bus_buffer.scala 463:95] + wire _T_3935 = 3'h0 == buf_state_2; // @[Conditional.scala 37:30] + wire _T_3958 = 3'h1 == buf_state_2; // @[Conditional.scala 37:30] + wire _T_3962 = 3'h2 == buf_state_2; // @[Conditional.scala 37:30] + wire _T_3969 = obuf_tag0 == 3'h2; // @[el2_lsu_bus_buffer.scala 506:48] + wire _T_3970 = _GEN_350 == 3'h2; // @[el2_lsu_bus_buffer.scala 506:104] + wire _T_3971 = obuf_merge & _T_3970; // @[el2_lsu_bus_buffer.scala 506:91] + wire _T_3972 = _T_3969 | _T_3971; // @[el2_lsu_bus_buffer.scala 506:77] + wire _T_3973 = _T_3972 & obuf_valid; // @[el2_lsu_bus_buffer.scala 506:135] + wire _T_3974 = _T_3973 & obuf_wr_enQ; // @[el2_lsu_bus_buffer.scala 506:148] + wire _GEN_204 = _T_3962 & _T_3974; // @[Conditional.scala 39:67] + wire _GEN_217 = _T_3958 ? 1'h0 : _GEN_204; // @[Conditional.scala 39:67] + wire buf_cmd_state_bus_en_2 = _T_3935 ? 1'h0 : _GEN_217; // @[Conditional.scala 40:58] + wire _T_2638 = _T_2637 & buf_cmd_state_bus_en_2; // @[el2_lsu_bus_buffer.scala 463:105] + wire _T_2639 = ~_T_2638; // @[el2_lsu_bus_buffer.scala 463:80] + wire _T_2640 = buf_ageQ_3[2] & _T_2639; // @[el2_lsu_bus_buffer.scala 463:78] + wire _T_2632 = buf_state_1 == 3'h2; // @[el2_lsu_bus_buffer.scala 463:95] + wire _T_3742 = 3'h0 == buf_state_1; // @[Conditional.scala 37:30] + wire _T_3765 = 3'h1 == buf_state_1; // @[Conditional.scala 37:30] + wire _T_3769 = 3'h2 == buf_state_1; // @[Conditional.scala 37:30] + wire _T_3776 = obuf_tag0 == 3'h1; // @[el2_lsu_bus_buffer.scala 506:48] + wire _T_3777 = _GEN_350 == 3'h1; // @[el2_lsu_bus_buffer.scala 506:104] + wire _T_3778 = obuf_merge & _T_3777; // @[el2_lsu_bus_buffer.scala 506:91] + wire _T_3779 = _T_3776 | _T_3778; // @[el2_lsu_bus_buffer.scala 506:77] + wire _T_3780 = _T_3779 & obuf_valid; // @[el2_lsu_bus_buffer.scala 506:135] + wire _T_3781 = _T_3780 & obuf_wr_enQ; // @[el2_lsu_bus_buffer.scala 506:148] + wire _GEN_128 = _T_3769 & _T_3781; // @[Conditional.scala 39:67] + wire _GEN_141 = _T_3765 ? 1'h0 : _GEN_128; // @[Conditional.scala 39:67] + wire buf_cmd_state_bus_en_1 = _T_3742 ? 1'h0 : _GEN_141; // @[Conditional.scala 40:58] + wire _T_2633 = _T_2632 & buf_cmd_state_bus_en_1; // @[el2_lsu_bus_buffer.scala 463:105] + wire _T_2634 = ~_T_2633; // @[el2_lsu_bus_buffer.scala 463:80] + wire _T_2635 = buf_ageQ_3[1] & _T_2634; // @[el2_lsu_bus_buffer.scala 463:78] + wire _T_2627 = buf_state_0 == 3'h2; // @[el2_lsu_bus_buffer.scala 463:95] + wire _T_3549 = 3'h0 == buf_state_0; // @[Conditional.scala 37:30] + wire _T_3572 = 3'h1 == buf_state_0; // @[Conditional.scala 37:30] + wire _T_3576 = 3'h2 == buf_state_0; // @[Conditional.scala 37:30] + wire _T_3583 = obuf_tag0 == 3'h0; // @[el2_lsu_bus_buffer.scala 506:48] + wire _T_3584 = _GEN_350 == 3'h0; // @[el2_lsu_bus_buffer.scala 506:104] + wire _T_3585 = obuf_merge & _T_3584; // @[el2_lsu_bus_buffer.scala 506:91] + wire _T_3586 = _T_3583 | _T_3585; // @[el2_lsu_bus_buffer.scala 506:77] + wire _T_3587 = _T_3586 & obuf_valid; // @[el2_lsu_bus_buffer.scala 506:135] + wire _T_3588 = _T_3587 & obuf_wr_enQ; // @[el2_lsu_bus_buffer.scala 506:148] + wire _GEN_52 = _T_3576 & _T_3588; // @[Conditional.scala 39:67] + wire _GEN_65 = _T_3572 ? 1'h0 : _GEN_52; // @[Conditional.scala 39:67] + wire buf_cmd_state_bus_en_0 = _T_3549 ? 1'h0 : _GEN_65; // @[Conditional.scala 40:58] + wire _T_2628 = _T_2627 & buf_cmd_state_bus_en_0; // @[el2_lsu_bus_buffer.scala 463:105] + wire _T_2629 = ~_T_2628; // @[el2_lsu_bus_buffer.scala 463:80] + wire _T_2630 = buf_ageQ_3[0] & _T_2629; // @[el2_lsu_bus_buffer.scala 463:78] + wire [3:0] buf_age_3 = {_T_2645,_T_2640,_T_2635,_T_2630}; // @[Cat.scala 29:58] + wire _T_2744 = ~buf_age_3[2]; // @[el2_lsu_bus_buffer.scala 464:91] + wire _T_2746 = _T_2744 & _T_19; // @[el2_lsu_bus_buffer.scala 464:106] + wire _T_2738 = ~buf_age_3[1]; // @[el2_lsu_bus_buffer.scala 464:91] + wire _T_2740 = _T_2738 & _T_12; // @[el2_lsu_bus_buffer.scala 464:106] + wire _T_2732 = ~buf_age_3[0]; // @[el2_lsu_bus_buffer.scala 464:91] + wire _T_2734 = _T_2732 & _T_5; // @[el2_lsu_bus_buffer.scala 464:106] + wire [3:0] buf_age_younger_3 = {1'h0,_T_2746,_T_2740,_T_2734}; // @[Cat.scala 29:58] + wire [3:0] _T_255 = ld_byte_hitvec_lo_0 & buf_age_younger_3; // @[el2_lsu_bus_buffer.scala 197:122] + wire _T_256 = |_T_255; // @[el2_lsu_bus_buffer.scala 197:144] + wire _T_257 = ~_T_256; // @[el2_lsu_bus_buffer.scala 197:99] + wire _T_258 = ld_byte_hitvec_lo_0[3] & _T_257; // @[el2_lsu_bus_buffer.scala 197:97] + reg [31:0] ibuf_addr; // @[el2_lib.scala 512:16] + wire _T_512 = io_lsu_addr_m[31:2] == ibuf_addr[31:2]; // @[el2_lsu_bus_buffer.scala 203:51] + reg ibuf_write; // @[Reg.scala 27:20] + wire _T_513 = _T_512 & ibuf_write; // @[el2_lsu_bus_buffer.scala 203:73] + reg ibuf_valid; // @[el2_lsu_bus_buffer.scala 290:24] + wire _T_514 = _T_513 & ibuf_valid; // @[el2_lsu_bus_buffer.scala 203:86] + wire ld_addr_ibuf_hit_lo = _T_514 & io_lsu_busreq_m; // @[el2_lsu_bus_buffer.scala 203:99] + wire [3:0] _T_521 = ld_addr_ibuf_hit_lo ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] + reg [3:0] ibuf_byteen; // @[Reg.scala 27:20] + wire [3:0] _T_522 = _T_521 & ibuf_byteen; // @[el2_lsu_bus_buffer.scala 208:55] + wire [3:0] ld_byte_ibuf_hit_lo = _T_522 & ldst_byteen_lo_m; // @[el2_lsu_bus_buffer.scala 208:69] + wire _T_260 = ~ld_byte_ibuf_hit_lo[0]; // @[el2_lsu_bus_buffer.scala 197:150] + wire _T_261 = _T_258 & _T_260; // @[el2_lsu_bus_buffer.scala 197:148] + reg [3:0] buf_ageQ_2; // @[el2_lsu_bus_buffer.scala 551:60] + wire _T_2622 = buf_ageQ_2[3] & _T_2644; // @[el2_lsu_bus_buffer.scala 463:78] + wire _T_2617 = buf_ageQ_2[2] & _T_2639; // @[el2_lsu_bus_buffer.scala 463:78] + wire _T_2612 = buf_ageQ_2[1] & _T_2634; // @[el2_lsu_bus_buffer.scala 463:78] + wire _T_2607 = buf_ageQ_2[0] & _T_2629; // @[el2_lsu_bus_buffer.scala 463:78] + wire [3:0] buf_age_2 = {_T_2622,_T_2617,_T_2612,_T_2607}; // @[Cat.scala 29:58] + wire _T_2723 = ~buf_age_2[3]; // @[el2_lsu_bus_buffer.scala 464:91] + wire _T_2725 = _T_2723 & _T_26; // @[el2_lsu_bus_buffer.scala 464:106] + wire _T_2711 = ~buf_age_2[1]; // @[el2_lsu_bus_buffer.scala 464:91] + wire _T_2713 = _T_2711 & _T_12; // @[el2_lsu_bus_buffer.scala 464:106] + wire _T_2705 = ~buf_age_2[0]; // @[el2_lsu_bus_buffer.scala 464:91] + wire _T_2707 = _T_2705 & _T_5; // @[el2_lsu_bus_buffer.scala 464:106] + wire [3:0] buf_age_younger_2 = {_T_2725,1'h0,_T_2713,_T_2707}; // @[Cat.scala 29:58] + wire [3:0] _T_247 = ld_byte_hitvec_lo_0 & buf_age_younger_2; // @[el2_lsu_bus_buffer.scala 197:122] + wire _T_248 = |_T_247; // @[el2_lsu_bus_buffer.scala 197:144] + wire _T_249 = ~_T_248; // @[el2_lsu_bus_buffer.scala 197:99] + wire _T_250 = ld_byte_hitvec_lo_0[2] & _T_249; // @[el2_lsu_bus_buffer.scala 197:97] + wire _T_253 = _T_250 & _T_260; // @[el2_lsu_bus_buffer.scala 197:148] + reg [3:0] buf_ageQ_1; // @[el2_lsu_bus_buffer.scala 551:60] + wire _T_2599 = buf_ageQ_1[3] & _T_2644; // @[el2_lsu_bus_buffer.scala 463:78] + wire _T_2594 = buf_ageQ_1[2] & _T_2639; // @[el2_lsu_bus_buffer.scala 463:78] + wire _T_2589 = buf_ageQ_1[1] & _T_2634; // @[el2_lsu_bus_buffer.scala 463:78] + wire _T_2584 = buf_ageQ_1[0] & _T_2629; // @[el2_lsu_bus_buffer.scala 463:78] + wire [3:0] buf_age_1 = {_T_2599,_T_2594,_T_2589,_T_2584}; // @[Cat.scala 29:58] + wire _T_2696 = ~buf_age_1[3]; // @[el2_lsu_bus_buffer.scala 464:91] + wire _T_2698 = _T_2696 & _T_26; // @[el2_lsu_bus_buffer.scala 464:106] + wire _T_2690 = ~buf_age_1[2]; // @[el2_lsu_bus_buffer.scala 464:91] + wire _T_2692 = _T_2690 & _T_19; // @[el2_lsu_bus_buffer.scala 464:106] + wire _T_2678 = ~buf_age_1[0]; // @[el2_lsu_bus_buffer.scala 464:91] + wire _T_2680 = _T_2678 & _T_5; // @[el2_lsu_bus_buffer.scala 464:106] + wire [3:0] buf_age_younger_1 = {_T_2698,_T_2692,1'h0,_T_2680}; // @[Cat.scala 29:58] + wire [3:0] _T_239 = ld_byte_hitvec_lo_0 & buf_age_younger_1; // @[el2_lsu_bus_buffer.scala 197:122] + wire _T_240 = |_T_239; // @[el2_lsu_bus_buffer.scala 197:144] + wire _T_241 = ~_T_240; // @[el2_lsu_bus_buffer.scala 197:99] + wire _T_242 = ld_byte_hitvec_lo_0[1] & _T_241; // @[el2_lsu_bus_buffer.scala 197:97] + wire _T_245 = _T_242 & _T_260; // @[el2_lsu_bus_buffer.scala 197:148] + reg [3:0] buf_ageQ_0; // @[el2_lsu_bus_buffer.scala 551:60] + wire _T_2576 = buf_ageQ_0[3] & _T_2644; // @[el2_lsu_bus_buffer.scala 463:78] + wire _T_2571 = buf_ageQ_0[2] & _T_2639; // @[el2_lsu_bus_buffer.scala 463:78] + wire _T_2566 = buf_ageQ_0[1] & _T_2634; // @[el2_lsu_bus_buffer.scala 463:78] + wire _T_2561 = buf_ageQ_0[0] & _T_2629; // @[el2_lsu_bus_buffer.scala 463:78] + wire [3:0] buf_age_0 = {_T_2576,_T_2571,_T_2566,_T_2561}; // @[Cat.scala 29:58] + wire _T_2669 = ~buf_age_0[3]; // @[el2_lsu_bus_buffer.scala 464:91] + wire _T_2671 = _T_2669 & _T_26; // @[el2_lsu_bus_buffer.scala 464:106] + wire _T_2663 = ~buf_age_0[2]; // @[el2_lsu_bus_buffer.scala 464:91] + wire _T_2665 = _T_2663 & _T_19; // @[el2_lsu_bus_buffer.scala 464:106] + wire _T_2657 = ~buf_age_0[1]; // @[el2_lsu_bus_buffer.scala 464:91] + wire _T_2659 = _T_2657 & _T_12; // @[el2_lsu_bus_buffer.scala 464:106] + wire [3:0] buf_age_younger_0 = {_T_2671,_T_2665,_T_2659,1'h0}; // @[Cat.scala 29:58] + wire [3:0] _T_231 = ld_byte_hitvec_lo_0 & buf_age_younger_0; // @[el2_lsu_bus_buffer.scala 197:122] + wire _T_232 = |_T_231; // @[el2_lsu_bus_buffer.scala 197:144] + wire _T_233 = ~_T_232; // @[el2_lsu_bus_buffer.scala 197:99] + wire _T_234 = ld_byte_hitvec_lo_0[0] & _T_233; // @[el2_lsu_bus_buffer.scala 197:97] + wire _T_237 = _T_234 & _T_260; // @[el2_lsu_bus_buffer.scala 197:148] + wire [3:0] ld_byte_hitvecfn_lo_0 = {_T_261,_T_253,_T_245,_T_237}; // @[Cat.scala 29:58] + wire _T_56 = |ld_byte_hitvecfn_lo_0; // @[el2_lsu_bus_buffer.scala 189:73] + wire _T_58 = _T_56 | ld_byte_ibuf_hit_lo[0]; // @[el2_lsu_bus_buffer.scala 189:77] + wire _T_117 = ld_addr_hitvec_lo_3 & buf_byteen_3[1]; // @[el2_lsu_bus_buffer.scala 192:95] + wire _T_119 = _T_117 & ldst_byteen_lo_m[1]; // @[el2_lsu_bus_buffer.scala 192:114] + wire _T_113 = ld_addr_hitvec_lo_2 & buf_byteen_2[1]; // @[el2_lsu_bus_buffer.scala 192:95] + wire _T_115 = _T_113 & ldst_byteen_lo_m[1]; // @[el2_lsu_bus_buffer.scala 192:114] + wire _T_109 = ld_addr_hitvec_lo_1 & buf_byteen_1[1]; // @[el2_lsu_bus_buffer.scala 192:95] + wire _T_111 = _T_109 & ldst_byteen_lo_m[1]; // @[el2_lsu_bus_buffer.scala 192:114] + wire _T_105 = ld_addr_hitvec_lo_0 & buf_byteen_0[1]; // @[el2_lsu_bus_buffer.scala 192:95] + wire _T_107 = _T_105 & ldst_byteen_lo_m[1]; // @[el2_lsu_bus_buffer.scala 192:114] + wire [3:0] ld_byte_hitvec_lo_1 = {_T_119,_T_115,_T_111,_T_107}; // @[Cat.scala 29:58] + wire [3:0] _T_290 = ld_byte_hitvec_lo_1 & buf_age_younger_3; // @[el2_lsu_bus_buffer.scala 197:122] + wire _T_291 = |_T_290; // @[el2_lsu_bus_buffer.scala 197:144] + wire _T_292 = ~_T_291; // @[el2_lsu_bus_buffer.scala 197:99] + wire _T_293 = ld_byte_hitvec_lo_1[3] & _T_292; // @[el2_lsu_bus_buffer.scala 197:97] + wire _T_295 = ~ld_byte_ibuf_hit_lo[1]; // @[el2_lsu_bus_buffer.scala 197:150] + wire _T_296 = _T_293 & _T_295; // @[el2_lsu_bus_buffer.scala 197:148] + wire [3:0] _T_282 = ld_byte_hitvec_lo_1 & buf_age_younger_2; // @[el2_lsu_bus_buffer.scala 197:122] + wire _T_283 = |_T_282; // @[el2_lsu_bus_buffer.scala 197:144] + wire _T_284 = ~_T_283; // @[el2_lsu_bus_buffer.scala 197:99] + wire _T_285 = ld_byte_hitvec_lo_1[2] & _T_284; // @[el2_lsu_bus_buffer.scala 197:97] + wire _T_288 = _T_285 & _T_295; // @[el2_lsu_bus_buffer.scala 197:148] + wire [3:0] _T_274 = ld_byte_hitvec_lo_1 & buf_age_younger_1; // @[el2_lsu_bus_buffer.scala 197:122] + wire _T_275 = |_T_274; // @[el2_lsu_bus_buffer.scala 197:144] + wire _T_276 = ~_T_275; // @[el2_lsu_bus_buffer.scala 197:99] + wire _T_277 = ld_byte_hitvec_lo_1[1] & _T_276; // @[el2_lsu_bus_buffer.scala 197:97] + wire _T_280 = _T_277 & _T_295; // @[el2_lsu_bus_buffer.scala 197:148] + wire [3:0] _T_266 = ld_byte_hitvec_lo_1 & buf_age_younger_0; // @[el2_lsu_bus_buffer.scala 197:122] + wire _T_267 = |_T_266; // @[el2_lsu_bus_buffer.scala 197:144] + wire _T_268 = ~_T_267; // @[el2_lsu_bus_buffer.scala 197:99] + wire _T_269 = ld_byte_hitvec_lo_1[0] & _T_268; // @[el2_lsu_bus_buffer.scala 197:97] + wire _T_272 = _T_269 & _T_295; // @[el2_lsu_bus_buffer.scala 197:148] + wire [3:0] ld_byte_hitvecfn_lo_1 = {_T_296,_T_288,_T_280,_T_272}; // @[Cat.scala 29:58] + wire _T_59 = |ld_byte_hitvecfn_lo_1; // @[el2_lsu_bus_buffer.scala 189:73] + wire _T_61 = _T_59 | ld_byte_ibuf_hit_lo[1]; // @[el2_lsu_bus_buffer.scala 189:77] + wire _T_135 = ld_addr_hitvec_lo_3 & buf_byteen_3[2]; // @[el2_lsu_bus_buffer.scala 192:95] + wire _T_137 = _T_135 & ldst_byteen_lo_m[2]; // @[el2_lsu_bus_buffer.scala 192:114] + wire _T_131 = ld_addr_hitvec_lo_2 & buf_byteen_2[2]; // @[el2_lsu_bus_buffer.scala 192:95] + wire _T_133 = _T_131 & ldst_byteen_lo_m[2]; // @[el2_lsu_bus_buffer.scala 192:114] + wire _T_127 = ld_addr_hitvec_lo_1 & buf_byteen_1[2]; // @[el2_lsu_bus_buffer.scala 192:95] + wire _T_129 = _T_127 & ldst_byteen_lo_m[2]; // @[el2_lsu_bus_buffer.scala 192:114] + wire _T_123 = ld_addr_hitvec_lo_0 & buf_byteen_0[2]; // @[el2_lsu_bus_buffer.scala 192:95] + wire _T_125 = _T_123 & ldst_byteen_lo_m[2]; // @[el2_lsu_bus_buffer.scala 192:114] + wire [3:0] ld_byte_hitvec_lo_2 = {_T_137,_T_133,_T_129,_T_125}; // @[Cat.scala 29:58] + wire [3:0] _T_325 = ld_byte_hitvec_lo_2 & buf_age_younger_3; // @[el2_lsu_bus_buffer.scala 197:122] + wire _T_326 = |_T_325; // @[el2_lsu_bus_buffer.scala 197:144] + wire _T_327 = ~_T_326; // @[el2_lsu_bus_buffer.scala 197:99] + wire _T_328 = ld_byte_hitvec_lo_2[3] & _T_327; // @[el2_lsu_bus_buffer.scala 197:97] + wire _T_330 = ~ld_byte_ibuf_hit_lo[2]; // @[el2_lsu_bus_buffer.scala 197:150] + wire _T_331 = _T_328 & _T_330; // @[el2_lsu_bus_buffer.scala 197:148] + wire [3:0] _T_317 = ld_byte_hitvec_lo_2 & buf_age_younger_2; // @[el2_lsu_bus_buffer.scala 197:122] + wire _T_318 = |_T_317; // @[el2_lsu_bus_buffer.scala 197:144] + wire _T_319 = ~_T_318; // @[el2_lsu_bus_buffer.scala 197:99] + wire _T_320 = ld_byte_hitvec_lo_2[2] & _T_319; // @[el2_lsu_bus_buffer.scala 197:97] + wire _T_323 = _T_320 & _T_330; // @[el2_lsu_bus_buffer.scala 197:148] + wire [3:0] _T_309 = ld_byte_hitvec_lo_2 & buf_age_younger_1; // @[el2_lsu_bus_buffer.scala 197:122] + wire _T_310 = |_T_309; // @[el2_lsu_bus_buffer.scala 197:144] + wire _T_311 = ~_T_310; // @[el2_lsu_bus_buffer.scala 197:99] + wire _T_312 = ld_byte_hitvec_lo_2[1] & _T_311; // @[el2_lsu_bus_buffer.scala 197:97] + wire _T_315 = _T_312 & _T_330; // @[el2_lsu_bus_buffer.scala 197:148] + wire [3:0] _T_301 = ld_byte_hitvec_lo_2 & buf_age_younger_0; // @[el2_lsu_bus_buffer.scala 197:122] + wire _T_302 = |_T_301; // @[el2_lsu_bus_buffer.scala 197:144] + wire _T_303 = ~_T_302; // @[el2_lsu_bus_buffer.scala 197:99] + wire _T_304 = ld_byte_hitvec_lo_2[0] & _T_303; // @[el2_lsu_bus_buffer.scala 197:97] + wire _T_307 = _T_304 & _T_330; // @[el2_lsu_bus_buffer.scala 197:148] + wire [3:0] ld_byte_hitvecfn_lo_2 = {_T_331,_T_323,_T_315,_T_307}; // @[Cat.scala 29:58] + wire _T_62 = |ld_byte_hitvecfn_lo_2; // @[el2_lsu_bus_buffer.scala 189:73] + wire _T_64 = _T_62 | ld_byte_ibuf_hit_lo[2]; // @[el2_lsu_bus_buffer.scala 189:77] + wire _T_153 = ld_addr_hitvec_lo_3 & buf_byteen_3[3]; // @[el2_lsu_bus_buffer.scala 192:95] + wire _T_155 = _T_153 & ldst_byteen_lo_m[3]; // @[el2_lsu_bus_buffer.scala 192:114] + wire _T_149 = ld_addr_hitvec_lo_2 & buf_byteen_2[3]; // @[el2_lsu_bus_buffer.scala 192:95] + wire _T_151 = _T_149 & ldst_byteen_lo_m[3]; // @[el2_lsu_bus_buffer.scala 192:114] + wire _T_145 = ld_addr_hitvec_lo_1 & buf_byteen_1[3]; // @[el2_lsu_bus_buffer.scala 192:95] + wire _T_147 = _T_145 & ldst_byteen_lo_m[3]; // @[el2_lsu_bus_buffer.scala 192:114] + wire _T_141 = ld_addr_hitvec_lo_0 & buf_byteen_0[3]; // @[el2_lsu_bus_buffer.scala 192:95] + wire _T_143 = _T_141 & ldst_byteen_lo_m[3]; // @[el2_lsu_bus_buffer.scala 192:114] + wire [3:0] ld_byte_hitvec_lo_3 = {_T_155,_T_151,_T_147,_T_143}; // @[Cat.scala 29:58] + wire [3:0] _T_360 = ld_byte_hitvec_lo_3 & buf_age_younger_3; // @[el2_lsu_bus_buffer.scala 197:122] + wire _T_361 = |_T_360; // @[el2_lsu_bus_buffer.scala 197:144] + wire _T_362 = ~_T_361; // @[el2_lsu_bus_buffer.scala 197:99] + wire _T_363 = ld_byte_hitvec_lo_3[3] & _T_362; // @[el2_lsu_bus_buffer.scala 197:97] + wire _T_365 = ~ld_byte_ibuf_hit_lo[3]; // @[el2_lsu_bus_buffer.scala 197:150] + wire _T_366 = _T_363 & _T_365; // @[el2_lsu_bus_buffer.scala 197:148] + wire [3:0] _T_352 = ld_byte_hitvec_lo_3 & buf_age_younger_2; // @[el2_lsu_bus_buffer.scala 197:122] + wire _T_353 = |_T_352; // @[el2_lsu_bus_buffer.scala 197:144] + wire _T_354 = ~_T_353; // @[el2_lsu_bus_buffer.scala 197:99] + wire _T_355 = ld_byte_hitvec_lo_3[2] & _T_354; // @[el2_lsu_bus_buffer.scala 197:97] + wire _T_358 = _T_355 & _T_365; // @[el2_lsu_bus_buffer.scala 197:148] + wire [3:0] _T_344 = ld_byte_hitvec_lo_3 & buf_age_younger_1; // @[el2_lsu_bus_buffer.scala 197:122] + wire _T_345 = |_T_344; // @[el2_lsu_bus_buffer.scala 197:144] + wire _T_346 = ~_T_345; // @[el2_lsu_bus_buffer.scala 197:99] + wire _T_347 = ld_byte_hitvec_lo_3[1] & _T_346; // @[el2_lsu_bus_buffer.scala 197:97] + wire _T_350 = _T_347 & _T_365; // @[el2_lsu_bus_buffer.scala 197:148] + wire [3:0] _T_336 = ld_byte_hitvec_lo_3 & buf_age_younger_0; // @[el2_lsu_bus_buffer.scala 197:122] + wire _T_337 = |_T_336; // @[el2_lsu_bus_buffer.scala 197:144] + wire _T_338 = ~_T_337; // @[el2_lsu_bus_buffer.scala 197:99] + wire _T_339 = ld_byte_hitvec_lo_3[0] & _T_338; // @[el2_lsu_bus_buffer.scala 197:97] + wire _T_342 = _T_339 & _T_365; // @[el2_lsu_bus_buffer.scala 197:148] + wire [3:0] ld_byte_hitvecfn_lo_3 = {_T_366,_T_358,_T_350,_T_342}; // @[Cat.scala 29:58] + wire _T_65 = |ld_byte_hitvecfn_lo_3; // @[el2_lsu_bus_buffer.scala 189:73] + wire _T_67 = _T_65 | ld_byte_ibuf_hit_lo[3]; // @[el2_lsu_bus_buffer.scala 189:77] + wire [2:0] _T_69 = {_T_67,_T_64,_T_61}; // @[Cat.scala 29:58] + wire _T_171 = ld_addr_hitvec_hi_3 & buf_byteen_3[0]; // @[el2_lsu_bus_buffer.scala 193:95] + wire _T_173 = _T_171 & ldst_byteen_hi_m[0]; // @[el2_lsu_bus_buffer.scala 193:114] + wire _T_167 = ld_addr_hitvec_hi_2 & buf_byteen_2[0]; // @[el2_lsu_bus_buffer.scala 193:95] + wire _T_169 = _T_167 & ldst_byteen_hi_m[0]; // @[el2_lsu_bus_buffer.scala 193:114] + wire _T_163 = ld_addr_hitvec_hi_1 & buf_byteen_1[0]; // @[el2_lsu_bus_buffer.scala 193:95] + wire _T_165 = _T_163 & ldst_byteen_hi_m[0]; // @[el2_lsu_bus_buffer.scala 193:114] + wire _T_159 = ld_addr_hitvec_hi_0 & buf_byteen_0[0]; // @[el2_lsu_bus_buffer.scala 193:95] + wire _T_161 = _T_159 & ldst_byteen_hi_m[0]; // @[el2_lsu_bus_buffer.scala 193:114] + wire [3:0] ld_byte_hitvec_hi_0 = {_T_173,_T_169,_T_165,_T_161}; // @[Cat.scala 29:58] + wire [3:0] _T_395 = ld_byte_hitvec_hi_0 & buf_age_younger_3; // @[el2_lsu_bus_buffer.scala 198:122] + wire _T_396 = |_T_395; // @[el2_lsu_bus_buffer.scala 198:144] + wire _T_397 = ~_T_396; // @[el2_lsu_bus_buffer.scala 198:99] + wire _T_398 = ld_byte_hitvec_hi_0[3] & _T_397; // @[el2_lsu_bus_buffer.scala 198:97] + wire _T_517 = io_end_addr_m[31:2] == ibuf_addr[31:2]; // @[el2_lsu_bus_buffer.scala 204:51] + wire _T_518 = _T_517 & ibuf_write; // @[el2_lsu_bus_buffer.scala 204:73] + wire _T_519 = _T_518 & ibuf_valid; // @[el2_lsu_bus_buffer.scala 204:86] + wire ld_addr_ibuf_hit_hi = _T_519 & io_lsu_busreq_m; // @[el2_lsu_bus_buffer.scala 204:99] + wire [3:0] _T_525 = ld_addr_ibuf_hit_hi ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] + wire [3:0] _T_526 = _T_525 & ibuf_byteen; // @[el2_lsu_bus_buffer.scala 209:55] + wire [3:0] ld_byte_ibuf_hit_hi = _T_526 & ldst_byteen_hi_m; // @[el2_lsu_bus_buffer.scala 209:69] + wire _T_400 = ~ld_byte_ibuf_hit_hi[0]; // @[el2_lsu_bus_buffer.scala 198:150] + wire _T_401 = _T_398 & _T_400; // @[el2_lsu_bus_buffer.scala 198:148] + wire [3:0] _T_387 = ld_byte_hitvec_hi_0 & buf_age_younger_2; // @[el2_lsu_bus_buffer.scala 198:122] + wire _T_388 = |_T_387; // @[el2_lsu_bus_buffer.scala 198:144] + wire _T_389 = ~_T_388; // @[el2_lsu_bus_buffer.scala 198:99] + wire _T_390 = ld_byte_hitvec_hi_0[2] & _T_389; // @[el2_lsu_bus_buffer.scala 198:97] + wire _T_393 = _T_390 & _T_400; // @[el2_lsu_bus_buffer.scala 198:148] + wire [3:0] _T_379 = ld_byte_hitvec_hi_0 & buf_age_younger_1; // @[el2_lsu_bus_buffer.scala 198:122] + wire _T_380 = |_T_379; // @[el2_lsu_bus_buffer.scala 198:144] + wire _T_381 = ~_T_380; // @[el2_lsu_bus_buffer.scala 198:99] + wire _T_382 = ld_byte_hitvec_hi_0[1] & _T_381; // @[el2_lsu_bus_buffer.scala 198:97] + wire _T_385 = _T_382 & _T_400; // @[el2_lsu_bus_buffer.scala 198:148] + wire [3:0] _T_371 = ld_byte_hitvec_hi_0 & buf_age_younger_0; // @[el2_lsu_bus_buffer.scala 198:122] + wire _T_372 = |_T_371; // @[el2_lsu_bus_buffer.scala 198:144] + wire _T_373 = ~_T_372; // @[el2_lsu_bus_buffer.scala 198:99] + wire _T_374 = ld_byte_hitvec_hi_0[0] & _T_373; // @[el2_lsu_bus_buffer.scala 198:97] + wire _T_377 = _T_374 & _T_400; // @[el2_lsu_bus_buffer.scala 198:148] + wire [3:0] ld_byte_hitvecfn_hi_0 = {_T_401,_T_393,_T_385,_T_377}; // @[Cat.scala 29:58] + wire _T_71 = |ld_byte_hitvecfn_hi_0; // @[el2_lsu_bus_buffer.scala 190:73] + wire _T_73 = _T_71 | ld_byte_ibuf_hit_hi[0]; // @[el2_lsu_bus_buffer.scala 190:77] + wire _T_189 = ld_addr_hitvec_hi_3 & buf_byteen_3[1]; // @[el2_lsu_bus_buffer.scala 193:95] + wire _T_191 = _T_189 & ldst_byteen_hi_m[1]; // @[el2_lsu_bus_buffer.scala 193:114] + wire _T_185 = ld_addr_hitvec_hi_2 & buf_byteen_2[1]; // @[el2_lsu_bus_buffer.scala 193:95] + wire _T_187 = _T_185 & ldst_byteen_hi_m[1]; // @[el2_lsu_bus_buffer.scala 193:114] + wire _T_181 = ld_addr_hitvec_hi_1 & buf_byteen_1[1]; // @[el2_lsu_bus_buffer.scala 193:95] + wire _T_183 = _T_181 & ldst_byteen_hi_m[1]; // @[el2_lsu_bus_buffer.scala 193:114] + wire _T_177 = ld_addr_hitvec_hi_0 & buf_byteen_0[1]; // @[el2_lsu_bus_buffer.scala 193:95] + wire _T_179 = _T_177 & ldst_byteen_hi_m[1]; // @[el2_lsu_bus_buffer.scala 193:114] + wire [3:0] ld_byte_hitvec_hi_1 = {_T_191,_T_187,_T_183,_T_179}; // @[Cat.scala 29:58] + wire [3:0] _T_430 = ld_byte_hitvec_hi_1 & buf_age_younger_3; // @[el2_lsu_bus_buffer.scala 198:122] + wire _T_431 = |_T_430; // @[el2_lsu_bus_buffer.scala 198:144] + wire _T_432 = ~_T_431; // @[el2_lsu_bus_buffer.scala 198:99] + wire _T_433 = ld_byte_hitvec_hi_1[3] & _T_432; // @[el2_lsu_bus_buffer.scala 198:97] + wire _T_435 = ~ld_byte_ibuf_hit_hi[1]; // @[el2_lsu_bus_buffer.scala 198:150] + wire _T_436 = _T_433 & _T_435; // @[el2_lsu_bus_buffer.scala 198:148] + wire [3:0] _T_422 = ld_byte_hitvec_hi_1 & buf_age_younger_2; // @[el2_lsu_bus_buffer.scala 198:122] + wire _T_423 = |_T_422; // @[el2_lsu_bus_buffer.scala 198:144] + wire _T_424 = ~_T_423; // @[el2_lsu_bus_buffer.scala 198:99] + wire _T_425 = ld_byte_hitvec_hi_1[2] & _T_424; // @[el2_lsu_bus_buffer.scala 198:97] + wire _T_428 = _T_425 & _T_435; // @[el2_lsu_bus_buffer.scala 198:148] + wire [3:0] _T_414 = ld_byte_hitvec_hi_1 & buf_age_younger_1; // @[el2_lsu_bus_buffer.scala 198:122] + wire _T_415 = |_T_414; // @[el2_lsu_bus_buffer.scala 198:144] + wire _T_416 = ~_T_415; // @[el2_lsu_bus_buffer.scala 198:99] + wire _T_417 = ld_byte_hitvec_hi_1[1] & _T_416; // @[el2_lsu_bus_buffer.scala 198:97] + wire _T_420 = _T_417 & _T_435; // @[el2_lsu_bus_buffer.scala 198:148] + wire [3:0] _T_406 = ld_byte_hitvec_hi_1 & buf_age_younger_0; // @[el2_lsu_bus_buffer.scala 198:122] + wire _T_407 = |_T_406; // @[el2_lsu_bus_buffer.scala 198:144] + wire _T_408 = ~_T_407; // @[el2_lsu_bus_buffer.scala 198:99] + wire _T_409 = ld_byte_hitvec_hi_1[0] & _T_408; // @[el2_lsu_bus_buffer.scala 198:97] + wire _T_412 = _T_409 & _T_435; // @[el2_lsu_bus_buffer.scala 198:148] + wire [3:0] ld_byte_hitvecfn_hi_1 = {_T_436,_T_428,_T_420,_T_412}; // @[Cat.scala 29:58] + wire _T_74 = |ld_byte_hitvecfn_hi_1; // @[el2_lsu_bus_buffer.scala 190:73] + wire _T_76 = _T_74 | ld_byte_ibuf_hit_hi[1]; // @[el2_lsu_bus_buffer.scala 190:77] + wire _T_207 = ld_addr_hitvec_hi_3 & buf_byteen_3[2]; // @[el2_lsu_bus_buffer.scala 193:95] + wire _T_209 = _T_207 & ldst_byteen_hi_m[2]; // @[el2_lsu_bus_buffer.scala 193:114] + wire _T_203 = ld_addr_hitvec_hi_2 & buf_byteen_2[2]; // @[el2_lsu_bus_buffer.scala 193:95] + wire _T_205 = _T_203 & ldst_byteen_hi_m[2]; // @[el2_lsu_bus_buffer.scala 193:114] + wire _T_199 = ld_addr_hitvec_hi_1 & buf_byteen_1[2]; // @[el2_lsu_bus_buffer.scala 193:95] + wire _T_201 = _T_199 & ldst_byteen_hi_m[2]; // @[el2_lsu_bus_buffer.scala 193:114] + wire _T_195 = ld_addr_hitvec_hi_0 & buf_byteen_0[2]; // @[el2_lsu_bus_buffer.scala 193:95] + wire _T_197 = _T_195 & ldst_byteen_hi_m[2]; // @[el2_lsu_bus_buffer.scala 193:114] + wire [3:0] ld_byte_hitvec_hi_2 = {_T_209,_T_205,_T_201,_T_197}; // @[Cat.scala 29:58] + wire [3:0] _T_465 = ld_byte_hitvec_hi_2 & buf_age_younger_3; // @[el2_lsu_bus_buffer.scala 198:122] + wire _T_466 = |_T_465; // @[el2_lsu_bus_buffer.scala 198:144] + wire _T_467 = ~_T_466; // @[el2_lsu_bus_buffer.scala 198:99] + wire _T_468 = ld_byte_hitvec_hi_2[3] & _T_467; // @[el2_lsu_bus_buffer.scala 198:97] + wire _T_470 = ~ld_byte_ibuf_hit_hi[2]; // @[el2_lsu_bus_buffer.scala 198:150] + wire _T_471 = _T_468 & _T_470; // @[el2_lsu_bus_buffer.scala 198:148] + wire [3:0] _T_457 = ld_byte_hitvec_hi_2 & buf_age_younger_2; // @[el2_lsu_bus_buffer.scala 198:122] + wire _T_458 = |_T_457; // @[el2_lsu_bus_buffer.scala 198:144] + wire _T_459 = ~_T_458; // @[el2_lsu_bus_buffer.scala 198:99] + wire _T_460 = ld_byte_hitvec_hi_2[2] & _T_459; // @[el2_lsu_bus_buffer.scala 198:97] + wire _T_463 = _T_460 & _T_470; // @[el2_lsu_bus_buffer.scala 198:148] + wire [3:0] _T_449 = ld_byte_hitvec_hi_2 & buf_age_younger_1; // @[el2_lsu_bus_buffer.scala 198:122] + wire _T_450 = |_T_449; // @[el2_lsu_bus_buffer.scala 198:144] + wire _T_451 = ~_T_450; // @[el2_lsu_bus_buffer.scala 198:99] + wire _T_452 = ld_byte_hitvec_hi_2[1] & _T_451; // @[el2_lsu_bus_buffer.scala 198:97] + wire _T_455 = _T_452 & _T_470; // @[el2_lsu_bus_buffer.scala 198:148] + wire [3:0] _T_441 = ld_byte_hitvec_hi_2 & buf_age_younger_0; // @[el2_lsu_bus_buffer.scala 198:122] + wire _T_442 = |_T_441; // @[el2_lsu_bus_buffer.scala 198:144] + wire _T_443 = ~_T_442; // @[el2_lsu_bus_buffer.scala 198:99] + wire _T_444 = ld_byte_hitvec_hi_2[0] & _T_443; // @[el2_lsu_bus_buffer.scala 198:97] + wire _T_447 = _T_444 & _T_470; // @[el2_lsu_bus_buffer.scala 198:148] + wire [3:0] ld_byte_hitvecfn_hi_2 = {_T_471,_T_463,_T_455,_T_447}; // @[Cat.scala 29:58] + wire _T_77 = |ld_byte_hitvecfn_hi_2; // @[el2_lsu_bus_buffer.scala 190:73] + wire _T_79 = _T_77 | ld_byte_ibuf_hit_hi[2]; // @[el2_lsu_bus_buffer.scala 190:77] + wire _T_225 = ld_addr_hitvec_hi_3 & buf_byteen_3[3]; // @[el2_lsu_bus_buffer.scala 193:95] + wire _T_227 = _T_225 & ldst_byteen_hi_m[3]; // @[el2_lsu_bus_buffer.scala 193:114] + wire _T_221 = ld_addr_hitvec_hi_2 & buf_byteen_2[3]; // @[el2_lsu_bus_buffer.scala 193:95] + wire _T_223 = _T_221 & ldst_byteen_hi_m[3]; // @[el2_lsu_bus_buffer.scala 193:114] + wire _T_217 = ld_addr_hitvec_hi_1 & buf_byteen_1[3]; // @[el2_lsu_bus_buffer.scala 193:95] + wire _T_219 = _T_217 & ldst_byteen_hi_m[3]; // @[el2_lsu_bus_buffer.scala 193:114] + wire _T_213 = ld_addr_hitvec_hi_0 & buf_byteen_0[3]; // @[el2_lsu_bus_buffer.scala 193:95] + wire _T_215 = _T_213 & ldst_byteen_hi_m[3]; // @[el2_lsu_bus_buffer.scala 193:114] + wire [3:0] ld_byte_hitvec_hi_3 = {_T_227,_T_223,_T_219,_T_215}; // @[Cat.scala 29:58] + wire [3:0] _T_500 = ld_byte_hitvec_hi_3 & buf_age_younger_3; // @[el2_lsu_bus_buffer.scala 198:122] + wire _T_501 = |_T_500; // @[el2_lsu_bus_buffer.scala 198:144] + wire _T_502 = ~_T_501; // @[el2_lsu_bus_buffer.scala 198:99] + wire _T_503 = ld_byte_hitvec_hi_3[3] & _T_502; // @[el2_lsu_bus_buffer.scala 198:97] + wire _T_505 = ~ld_byte_ibuf_hit_hi[3]; // @[el2_lsu_bus_buffer.scala 198:150] + wire _T_506 = _T_503 & _T_505; // @[el2_lsu_bus_buffer.scala 198:148] + wire [3:0] _T_492 = ld_byte_hitvec_hi_3 & buf_age_younger_2; // @[el2_lsu_bus_buffer.scala 198:122] + wire _T_493 = |_T_492; // @[el2_lsu_bus_buffer.scala 198:144] + wire _T_494 = ~_T_493; // @[el2_lsu_bus_buffer.scala 198:99] + wire _T_495 = ld_byte_hitvec_hi_3[2] & _T_494; // @[el2_lsu_bus_buffer.scala 198:97] + wire _T_498 = _T_495 & _T_505; // @[el2_lsu_bus_buffer.scala 198:148] + wire [3:0] _T_484 = ld_byte_hitvec_hi_3 & buf_age_younger_1; // @[el2_lsu_bus_buffer.scala 198:122] + wire _T_485 = |_T_484; // @[el2_lsu_bus_buffer.scala 198:144] + wire _T_486 = ~_T_485; // @[el2_lsu_bus_buffer.scala 198:99] + wire _T_487 = ld_byte_hitvec_hi_3[1] & _T_486; // @[el2_lsu_bus_buffer.scala 198:97] + wire _T_490 = _T_487 & _T_505; // @[el2_lsu_bus_buffer.scala 198:148] + wire [3:0] _T_476 = ld_byte_hitvec_hi_3 & buf_age_younger_0; // @[el2_lsu_bus_buffer.scala 198:122] + wire _T_477 = |_T_476; // @[el2_lsu_bus_buffer.scala 198:144] + wire _T_478 = ~_T_477; // @[el2_lsu_bus_buffer.scala 198:99] + wire _T_479 = ld_byte_hitvec_hi_3[0] & _T_478; // @[el2_lsu_bus_buffer.scala 198:97] + wire _T_482 = _T_479 & _T_505; // @[el2_lsu_bus_buffer.scala 198:148] + wire [3:0] ld_byte_hitvecfn_hi_3 = {_T_506,_T_498,_T_490,_T_482}; // @[Cat.scala 29:58] + wire _T_80 = |ld_byte_hitvecfn_hi_3; // @[el2_lsu_bus_buffer.scala 190:73] + wire _T_82 = _T_80 | ld_byte_ibuf_hit_hi[3]; // @[el2_lsu_bus_buffer.scala 190:77] + wire [2:0] _T_84 = {_T_82,_T_79,_T_76}; // @[Cat.scala 29:58] + wire [7:0] _T_530 = ld_byte_ibuf_hit_lo[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_533 = ld_byte_ibuf_hit_lo[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_536 = ld_byte_ibuf_hit_lo[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_539 = ld_byte_ibuf_hit_lo[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [31:0] ld_fwddata_buf_lo_initial = {_T_539,_T_536,_T_533,_T_530}; // @[Cat.scala 29:58] + wire [7:0] _T_544 = ld_byte_ibuf_hit_hi[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_547 = ld_byte_ibuf_hit_hi[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_550 = ld_byte_ibuf_hit_hi[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_553 = ld_byte_ibuf_hit_hi[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [31:0] ld_fwddata_buf_hi_initial = {_T_553,_T_550,_T_547,_T_544}; // @[Cat.scala 29:58] + wire [7:0] _T_558 = ld_byte_hitvecfn_lo_3[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + reg [31:0] buf_data_0; // @[el2_lib.scala 512:16] + wire [7:0] _T_560 = _T_558 & buf_data_0[31:24]; // @[el2_lsu_bus_buffer.scala 216:91] + wire [7:0] _T_563 = ld_byte_hitvecfn_lo_3[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + reg [31:0] buf_data_1; // @[el2_lib.scala 512:16] + wire [7:0] _T_565 = _T_563 & buf_data_1[31:24]; // @[el2_lsu_bus_buffer.scala 216:91] + wire [7:0] _T_568 = ld_byte_hitvecfn_lo_3[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + reg [31:0] buf_data_2; // @[el2_lib.scala 512:16] + wire [7:0] _T_570 = _T_568 & buf_data_2[31:24]; // @[el2_lsu_bus_buffer.scala 216:91] + wire [7:0] _T_573 = ld_byte_hitvecfn_lo_3[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + reg [31:0] buf_data_3; // @[el2_lib.scala 512:16] + wire [7:0] _T_575 = _T_573 & buf_data_3[31:24]; // @[el2_lsu_bus_buffer.scala 216:91] + wire [7:0] _T_576 = _T_560 | _T_565; // @[el2_lsu_bus_buffer.scala 216:123] + wire [7:0] _T_577 = _T_576 | _T_570; // @[el2_lsu_bus_buffer.scala 216:123] + wire [7:0] _T_578 = _T_577 | _T_575; // @[el2_lsu_bus_buffer.scala 216:123] + wire [7:0] _T_581 = ld_byte_hitvecfn_lo_2[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_583 = _T_581 & buf_data_0[23:16]; // @[el2_lsu_bus_buffer.scala 217:91] + wire [7:0] _T_586 = ld_byte_hitvecfn_lo_2[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_588 = _T_586 & buf_data_1[23:16]; // @[el2_lsu_bus_buffer.scala 217:91] + wire [7:0] _T_591 = ld_byte_hitvecfn_lo_2[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_593 = _T_591 & buf_data_2[23:16]; // @[el2_lsu_bus_buffer.scala 217:91] + wire [7:0] _T_596 = ld_byte_hitvecfn_lo_2[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_598 = _T_596 & buf_data_3[23:16]; // @[el2_lsu_bus_buffer.scala 217:91] + wire [7:0] _T_599 = _T_583 | _T_588; // @[el2_lsu_bus_buffer.scala 217:123] + wire [7:0] _T_600 = _T_599 | _T_593; // @[el2_lsu_bus_buffer.scala 217:123] + wire [7:0] _T_601 = _T_600 | _T_598; // @[el2_lsu_bus_buffer.scala 217:123] + wire [7:0] _T_604 = ld_byte_hitvecfn_lo_1[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_606 = _T_604 & buf_data_0[15:8]; // @[el2_lsu_bus_buffer.scala 218:91] + wire [7:0] _T_609 = ld_byte_hitvecfn_lo_1[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_611 = _T_609 & buf_data_1[15:8]; // @[el2_lsu_bus_buffer.scala 218:91] + wire [7:0] _T_614 = ld_byte_hitvecfn_lo_1[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_616 = _T_614 & buf_data_2[15:8]; // @[el2_lsu_bus_buffer.scala 218:91] + wire [7:0] _T_619 = ld_byte_hitvecfn_lo_1[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_621 = _T_619 & buf_data_3[15:8]; // @[el2_lsu_bus_buffer.scala 218:91] + wire [7:0] _T_622 = _T_606 | _T_611; // @[el2_lsu_bus_buffer.scala 218:123] + wire [7:0] _T_623 = _T_622 | _T_616; // @[el2_lsu_bus_buffer.scala 218:123] + wire [7:0] _T_624 = _T_623 | _T_621; // @[el2_lsu_bus_buffer.scala 218:123] + wire [7:0] _T_627 = ld_byte_hitvecfn_lo_0[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_629 = _T_627 & buf_data_0[7:0]; // @[el2_lsu_bus_buffer.scala 219:91] + wire [7:0] _T_632 = ld_byte_hitvecfn_lo_0[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_634 = _T_632 & buf_data_1[7:0]; // @[el2_lsu_bus_buffer.scala 219:91] + wire [7:0] _T_637 = ld_byte_hitvecfn_lo_0[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_639 = _T_637 & buf_data_2[7:0]; // @[el2_lsu_bus_buffer.scala 219:91] + wire [7:0] _T_642 = ld_byte_hitvecfn_lo_0[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_644 = _T_642 & buf_data_3[7:0]; // @[el2_lsu_bus_buffer.scala 219:91] + wire [7:0] _T_645 = _T_629 | _T_634; // @[el2_lsu_bus_buffer.scala 219:123] + wire [7:0] _T_646 = _T_645 | _T_639; // @[el2_lsu_bus_buffer.scala 219:123] + wire [7:0] _T_647 = _T_646 | _T_644; // @[el2_lsu_bus_buffer.scala 219:123] + wire [31:0] _T_650 = {_T_578,_T_601,_T_624,_T_647}; // @[Cat.scala 29:58] + reg [31:0] ibuf_data; // @[el2_lib.scala 512:16] + wire [31:0] _T_651 = ld_fwddata_buf_lo_initial & ibuf_data; // @[el2_lsu_bus_buffer.scala 220:32] + wire [7:0] _T_655 = ld_byte_hitvecfn_hi_3[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_657 = _T_655 & buf_data_0[31:24]; // @[el2_lsu_bus_buffer.scala 222:91] + wire [7:0] _T_660 = ld_byte_hitvecfn_hi_3[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_662 = _T_660 & buf_data_1[31:24]; // @[el2_lsu_bus_buffer.scala 222:91] + wire [7:0] _T_665 = ld_byte_hitvecfn_hi_3[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_667 = _T_665 & buf_data_2[31:24]; // @[el2_lsu_bus_buffer.scala 222:91] + wire [7:0] _T_670 = ld_byte_hitvecfn_hi_3[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_672 = _T_670 & buf_data_3[31:24]; // @[el2_lsu_bus_buffer.scala 222:91] + wire [7:0] _T_673 = _T_657 | _T_662; // @[el2_lsu_bus_buffer.scala 222:123] + wire [7:0] _T_674 = _T_673 | _T_667; // @[el2_lsu_bus_buffer.scala 222:123] + wire [7:0] _T_675 = _T_674 | _T_672; // @[el2_lsu_bus_buffer.scala 222:123] + wire [7:0] _T_678 = ld_byte_hitvecfn_hi_2[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_680 = _T_678 & buf_data_0[23:16]; // @[el2_lsu_bus_buffer.scala 223:91] + wire [7:0] _T_683 = ld_byte_hitvecfn_hi_2[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_685 = _T_683 & buf_data_1[23:16]; // @[el2_lsu_bus_buffer.scala 223:91] + wire [7:0] _T_688 = ld_byte_hitvecfn_hi_2[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_690 = _T_688 & buf_data_2[23:16]; // @[el2_lsu_bus_buffer.scala 223:91] + wire [7:0] _T_693 = ld_byte_hitvecfn_hi_2[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_695 = _T_693 & buf_data_3[23:16]; // @[el2_lsu_bus_buffer.scala 223:91] + wire [7:0] _T_696 = _T_680 | _T_685; // @[el2_lsu_bus_buffer.scala 223:123] + wire [7:0] _T_697 = _T_696 | _T_690; // @[el2_lsu_bus_buffer.scala 223:123] + wire [7:0] _T_698 = _T_697 | _T_695; // @[el2_lsu_bus_buffer.scala 223:123] + wire [7:0] _T_701 = ld_byte_hitvecfn_hi_1[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_703 = _T_701 & buf_data_0[15:8]; // @[el2_lsu_bus_buffer.scala 224:91] + wire [7:0] _T_706 = ld_byte_hitvecfn_hi_1[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_708 = _T_706 & buf_data_1[15:8]; // @[el2_lsu_bus_buffer.scala 224:91] + wire [7:0] _T_711 = ld_byte_hitvecfn_hi_1[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_713 = _T_711 & buf_data_2[15:8]; // @[el2_lsu_bus_buffer.scala 224:91] + wire [7:0] _T_716 = ld_byte_hitvecfn_hi_1[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_718 = _T_716 & buf_data_3[15:8]; // @[el2_lsu_bus_buffer.scala 224:91] + wire [7:0] _T_719 = _T_703 | _T_708; // @[el2_lsu_bus_buffer.scala 224:123] + wire [7:0] _T_720 = _T_719 | _T_713; // @[el2_lsu_bus_buffer.scala 224:123] + wire [7:0] _T_721 = _T_720 | _T_718; // @[el2_lsu_bus_buffer.scala 224:123] + wire [7:0] _T_724 = ld_byte_hitvecfn_hi_0[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_726 = _T_724 & buf_data_0[7:0]; // @[el2_lsu_bus_buffer.scala 225:91] + wire [7:0] _T_729 = ld_byte_hitvecfn_hi_0[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_731 = _T_729 & buf_data_1[7:0]; // @[el2_lsu_bus_buffer.scala 225:91] + wire [7:0] _T_734 = ld_byte_hitvecfn_hi_0[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_736 = _T_734 & buf_data_2[7:0]; // @[el2_lsu_bus_buffer.scala 225:91] + wire [7:0] _T_739 = ld_byte_hitvecfn_hi_0[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_741 = _T_739 & buf_data_3[7:0]; // @[el2_lsu_bus_buffer.scala 225:91] + wire [7:0] _T_742 = _T_726 | _T_731; // @[el2_lsu_bus_buffer.scala 225:123] + wire [7:0] _T_743 = _T_742 | _T_736; // @[el2_lsu_bus_buffer.scala 225:123] + wire [7:0] _T_744 = _T_743 | _T_741; // @[el2_lsu_bus_buffer.scala 225:123] + wire [31:0] _T_747 = {_T_675,_T_698,_T_721,_T_744}; // @[Cat.scala 29:58] + wire [31:0] _T_748 = ld_fwddata_buf_hi_initial & ibuf_data; // @[el2_lsu_bus_buffer.scala 226:32] + wire [3:0] _T_750 = io_lsu_pkt_r_by ? 4'h1 : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_751 = io_lsu_pkt_r_half ? 4'h3 : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_752 = io_lsu_pkt_r_word ? 4'hf : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_753 = _T_750 | _T_751; // @[Mux.scala 27:72] + wire [3:0] ldst_byteen_r = _T_753 | _T_752; // @[Mux.scala 27:72] + wire _T_756 = io_lsu_addr_r[1:0] == 2'h0; // @[el2_lsu_bus_buffer.scala 233:55] + wire _T_758 = io_lsu_addr_r[1:0] == 2'h1; // @[el2_lsu_bus_buffer.scala 234:55] + wire [3:0] _T_760 = {3'h0,ldst_byteen_r[3]}; // @[Cat.scala 29:58] + wire _T_762 = io_lsu_addr_r[1:0] == 2'h2; // @[el2_lsu_bus_buffer.scala 235:55] + wire [3:0] _T_764 = {2'h0,ldst_byteen_r[3:2]}; // @[Cat.scala 29:58] + wire _T_766 = io_lsu_addr_r[1:0] == 2'h3; // @[el2_lsu_bus_buffer.scala 236:55] + wire [3:0] _T_768 = {1'h0,ldst_byteen_r[3:1]}; // @[Cat.scala 29:58] + wire [3:0] _T_770 = _T_758 ? _T_760 : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_771 = _T_762 ? _T_764 : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_772 = _T_766 ? _T_768 : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_774 = _T_770 | _T_771; // @[Mux.scala 27:72] + wire [3:0] ldst_byteen_hi_r = _T_774 | _T_772; // @[Mux.scala 27:72] + wire [3:0] _T_781 = {ldst_byteen_r[2:0],1'h0}; // @[Cat.scala 29:58] + wire [3:0] _T_785 = {ldst_byteen_r[1:0],2'h0}; // @[Cat.scala 29:58] + wire [3:0] _T_789 = {ldst_byteen_r[0],3'h0}; // @[Cat.scala 29:58] + wire [3:0] _T_790 = _T_756 ? ldst_byteen_r : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_791 = _T_758 ? _T_781 : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_792 = _T_762 ? _T_785 : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_793 = _T_766 ? _T_789 : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_794 = _T_790 | _T_791; // @[Mux.scala 27:72] + wire [3:0] _T_795 = _T_794 | _T_792; // @[Mux.scala 27:72] + wire [3:0] ldst_byteen_lo_r = _T_795 | _T_793; // @[Mux.scala 27:72] + wire [31:0] _T_802 = {8'h0,io_store_data_r[31:8]}; // @[Cat.scala 29:58] + wire [31:0] _T_806 = {16'h0,io_store_data_r[31:16]}; // @[Cat.scala 29:58] + wire [31:0] _T_810 = {24'h0,io_store_data_r[31:24]}; // @[Cat.scala 29:58] + wire [31:0] _T_812 = _T_758 ? _T_802 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_813 = _T_762 ? _T_806 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_814 = _T_766 ? _T_810 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_816 = _T_812 | _T_813; // @[Mux.scala 27:72] + wire [31:0] store_data_hi_r = _T_816 | _T_814; // @[Mux.scala 27:72] + wire [31:0] _T_823 = {io_store_data_r[23:0],8'h0}; // @[Cat.scala 29:58] + wire [31:0] _T_827 = {io_store_data_r[15:0],16'h0}; // @[Cat.scala 29:58] + wire [31:0] _T_831 = {io_store_data_r[7:0],24'h0}; // @[Cat.scala 29:58] + wire [31:0] _T_832 = _T_756 ? io_store_data_r : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_833 = _T_758 ? _T_823 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_834 = _T_762 ? _T_827 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_835 = _T_766 ? _T_831 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_836 = _T_832 | _T_833; // @[Mux.scala 27:72] + wire [31:0] _T_837 = _T_836 | _T_834; // @[Mux.scala 27:72] + wire [31:0] store_data_lo_r = _T_837 | _T_835; // @[Mux.scala 27:72] + wire ldst_samedw_r = io_lsu_addr_r[3] == io_end_addr_r[3]; // @[el2_lsu_bus_buffer.scala 253:40] + wire _T_844 = ~io_lsu_addr_r[0]; // @[el2_lsu_bus_buffer.scala 255:26] + wire _T_845 = io_lsu_pkt_r_word & _T_756; // @[Mux.scala 27:72] + wire _T_846 = io_lsu_pkt_r_half & _T_844; // @[Mux.scala 27:72] + wire _T_848 = _T_845 | _T_846; // @[Mux.scala 27:72] + wire is_aligned_r = _T_848 | io_lsu_pkt_r_by; // @[Mux.scala 27:72] + wire _T_850 = io_lsu_pkt_r_load | io_no_word_merge_r; // @[el2_lsu_bus_buffer.scala 257:55] + wire _T_851 = io_lsu_busreq_r & _T_850; // @[el2_lsu_bus_buffer.scala 257:34] + wire _T_852 = ~ibuf_valid; // @[el2_lsu_bus_buffer.scala 257:79] + wire ibuf_byp = _T_851 & _T_852; // @[el2_lsu_bus_buffer.scala 257:77] + wire _T_853 = io_lsu_busreq_r & io_lsu_commit_r; // @[el2_lsu_bus_buffer.scala 258:36] + wire _T_854 = ~ibuf_byp; // @[el2_lsu_bus_buffer.scala 258:56] + wire ibuf_wr_en = _T_853 & _T_854; // @[el2_lsu_bus_buffer.scala 258:54] + wire _T_855 = ~ibuf_wr_en; // @[el2_lsu_bus_buffer.scala 260:36] + reg [2:0] ibuf_timer; // @[el2_lsu_bus_buffer.scala 303:59] + wire _T_864 = ibuf_timer == 3'h7; // @[el2_lsu_bus_buffer.scala 266:62] + wire _T_865 = ibuf_wr_en | _T_864; // @[el2_lsu_bus_buffer.scala 266:48] + wire _T_929 = _T_853 & io_lsu_pkt_r_store; // @[el2_lsu_bus_buffer.scala 285:54] + wire _T_930 = _T_929 & ibuf_valid; // @[el2_lsu_bus_buffer.scala 285:75] + wire _T_931 = _T_930 & ibuf_write; // @[el2_lsu_bus_buffer.scala 285:88] + wire _T_934 = io_lsu_addr_r[31:2] == ibuf_addr[31:2]; // @[el2_lsu_bus_buffer.scala 285:124] + wire _T_935 = _T_931 & _T_934; // @[el2_lsu_bus_buffer.scala 285:101] + wire _T_936 = ~io_is_sideeffects_r; // @[el2_lsu_bus_buffer.scala 285:147] + wire _T_937 = _T_935 & _T_936; // @[el2_lsu_bus_buffer.scala 285:145] + wire _T_938 = ~io_dec_tlu_wb_coalescing_disable; // @[el2_lsu_bus_buffer.scala 285:170] + wire ibuf_merge_en = _T_937 & _T_938; // @[el2_lsu_bus_buffer.scala 285:168] + wire ibuf_merge_in = ~io_ldst_dual_r; // @[el2_lsu_bus_buffer.scala 286:20] + wire _T_866 = ibuf_merge_en & ibuf_merge_in; // @[el2_lsu_bus_buffer.scala 266:98] + wire _T_867 = ~_T_866; // @[el2_lsu_bus_buffer.scala 266:82] + wire _T_868 = _T_865 & _T_867; // @[el2_lsu_bus_buffer.scala 266:80] + wire _T_869 = _T_868 | ibuf_byp; // @[el2_lsu_bus_buffer.scala 267:5] + wire _T_857 = ~io_lsu_busreq_r; // @[el2_lsu_bus_buffer.scala 261:44] + wire _T_858 = io_lsu_busreq_m & _T_857; // @[el2_lsu_bus_buffer.scala 261:42] + wire _T_859 = _T_858 & ibuf_valid; // @[el2_lsu_bus_buffer.scala 261:61] + wire _T_862 = ibuf_addr[31:2] != io_lsu_addr_m[31:2]; // @[el2_lsu_bus_buffer.scala 261:115] + wire _T_863 = io_lsu_pkt_m_load | _T_862; // @[el2_lsu_bus_buffer.scala 261:95] + wire ibuf_force_drain = _T_859 & _T_863; // @[el2_lsu_bus_buffer.scala 261:74] + wire _T_870 = _T_869 | ibuf_force_drain; // @[el2_lsu_bus_buffer.scala 267:16] + reg ibuf_sideeffect; // @[Reg.scala 27:20] + wire _T_871 = _T_870 | ibuf_sideeffect; // @[el2_lsu_bus_buffer.scala 267:35] + wire _T_872 = ~ibuf_write; // @[el2_lsu_bus_buffer.scala 267:55] + wire _T_873 = _T_871 | _T_872; // @[el2_lsu_bus_buffer.scala 267:53] + wire _T_874 = _T_873 | io_dec_tlu_wb_coalescing_disable; // @[el2_lsu_bus_buffer.scala 267:67] + wire ibuf_drain_vld = ibuf_valid & _T_874; // @[el2_lsu_bus_buffer.scala 266:32] + wire _T_856 = ibuf_drain_vld & _T_855; // @[el2_lsu_bus_buffer.scala 260:34] + wire ibuf_rst = _T_856 | io_dec_tlu_force_halt; // @[el2_lsu_bus_buffer.scala 260:49] + reg [1:0] WrPtr1_r; // @[el2_lsu_bus_buffer.scala 667:49] + reg [1:0] WrPtr0_r; // @[el2_lsu_bus_buffer.scala 666:49] + reg [1:0] ibuf_tag; // @[Reg.scala 27:20] + wire [1:0] ibuf_sz_in = {io_lsu_pkt_r_word,io_lsu_pkt_r_half}; // @[Cat.scala 29:58] + wire [3:0] _T_881 = ibuf_byteen | ldst_byteen_lo_r; // @[el2_lsu_bus_buffer.scala 276:77] + wire [7:0] _T_889 = ldst_byteen_lo_r[0] ? store_data_lo_r[7:0] : ibuf_data[7:0]; // @[el2_lsu_bus_buffer.scala 281:8] + wire [7:0] _T_892 = io_ldst_dual_r ? store_data_hi_r[7:0] : store_data_lo_r[7:0]; // @[el2_lsu_bus_buffer.scala 282:8] + wire [7:0] _T_893 = _T_866 ? _T_889 : _T_892; // @[el2_lsu_bus_buffer.scala 280:46] + wire [7:0] _T_898 = ldst_byteen_lo_r[1] ? store_data_lo_r[15:8] : ibuf_data[15:8]; // @[el2_lsu_bus_buffer.scala 281:8] + wire [7:0] _T_901 = io_ldst_dual_r ? store_data_hi_r[15:8] : store_data_lo_r[15:8]; // @[el2_lsu_bus_buffer.scala 282:8] + wire [7:0] _T_902 = _T_866 ? _T_898 : _T_901; // @[el2_lsu_bus_buffer.scala 280:46] + wire [7:0] _T_907 = ldst_byteen_lo_r[2] ? store_data_lo_r[23:16] : ibuf_data[23:16]; // @[el2_lsu_bus_buffer.scala 281:8] + wire [7:0] _T_910 = io_ldst_dual_r ? store_data_hi_r[23:16] : store_data_lo_r[23:16]; // @[el2_lsu_bus_buffer.scala 282:8] + wire [7:0] _T_911 = _T_866 ? _T_907 : _T_910; // @[el2_lsu_bus_buffer.scala 280:46] + wire [7:0] _T_916 = ldst_byteen_lo_r[3] ? store_data_lo_r[31:24] : ibuf_data[31:24]; // @[el2_lsu_bus_buffer.scala 281:8] + wire [7:0] _T_919 = io_ldst_dual_r ? store_data_hi_r[31:24] : store_data_lo_r[31:24]; // @[el2_lsu_bus_buffer.scala 282:8] + wire [7:0] _T_920 = _T_866 ? _T_916 : _T_919; // @[el2_lsu_bus_buffer.scala 280:46] + wire [23:0] _T_922 = {_T_920,_T_911,_T_902}; // @[Cat.scala 29:58] + wire _T_923 = ibuf_timer < 3'h7; // @[el2_lsu_bus_buffer.scala 283:59] + wire [2:0] _T_926 = ibuf_timer + 3'h1; // @[el2_lsu_bus_buffer.scala 283:93] + wire _T_941 = ~ibuf_merge_in; // @[el2_lsu_bus_buffer.scala 287:65] + wire _T_942 = ibuf_merge_en & _T_941; // @[el2_lsu_bus_buffer.scala 287:63] + wire _T_945 = ibuf_byteen[0] | ldst_byteen_lo_r[0]; // @[el2_lsu_bus_buffer.scala 287:96] + wire _T_947 = _T_942 ? _T_945 : ibuf_byteen[0]; // @[el2_lsu_bus_buffer.scala 287:48] + wire _T_952 = ibuf_byteen[1] | ldst_byteen_lo_r[1]; // @[el2_lsu_bus_buffer.scala 287:96] + wire _T_954 = _T_942 ? _T_952 : ibuf_byteen[1]; // @[el2_lsu_bus_buffer.scala 287:48] + wire _T_959 = ibuf_byteen[2] | ldst_byteen_lo_r[2]; // @[el2_lsu_bus_buffer.scala 287:96] + wire _T_961 = _T_942 ? _T_959 : ibuf_byteen[2]; // @[el2_lsu_bus_buffer.scala 287:48] + wire _T_966 = ibuf_byteen[3] | ldst_byteen_lo_r[3]; // @[el2_lsu_bus_buffer.scala 287:96] + wire _T_968 = _T_942 ? _T_966 : ibuf_byteen[3]; // @[el2_lsu_bus_buffer.scala 287:48] + wire [3:0] ibuf_byteen_out = {_T_968,_T_961,_T_954,_T_947}; // @[Cat.scala 29:58] + wire [7:0] _T_978 = _T_942 ? _T_889 : ibuf_data[7:0]; // @[el2_lsu_bus_buffer.scala 288:45] + wire [7:0] _T_986 = _T_942 ? _T_898 : ibuf_data[15:8]; // @[el2_lsu_bus_buffer.scala 288:45] + wire [7:0] _T_994 = _T_942 ? _T_907 : ibuf_data[23:16]; // @[el2_lsu_bus_buffer.scala 288:45] + wire [7:0] _T_1002 = _T_942 ? _T_916 : ibuf_data[31:24]; // @[el2_lsu_bus_buffer.scala 288:45] + wire [31:0] ibuf_data_out = {_T_1002,_T_994,_T_986,_T_978}; // @[Cat.scala 29:58] + wire _T_1005 = ibuf_wr_en | ibuf_valid; // @[el2_lsu_bus_buffer.scala 290:28] + wire _T_1006 = ~ibuf_rst; // @[el2_lsu_bus_buffer.scala 290:63] + wire _T_1011 = ibuf_wr_en & io_lsu_bus_ibuf_c1_clk; // @[el2_lsu_bus_buffer.scala 291:89] + reg [1:0] ibuf_dualtag; // @[Reg.scala 27:20] + reg ibuf_dual; // @[Reg.scala 27:20] + reg ibuf_samedw; // @[Reg.scala 27:20] + reg ibuf_nomerge; // @[Reg.scala 27:20] + reg ibuf_unsign; // @[Reg.scala 27:20] + reg [1:0] ibuf_sz; // @[Reg.scala 27:20] + wire _T_4467 = buf_write[3] & _T_2642; // @[el2_lsu_bus_buffer.scala 573:64] + wire _T_4468 = ~buf_cmd_state_bus_en_3; // @[el2_lsu_bus_buffer.scala 573:91] + wire _T_4469 = _T_4467 & _T_4468; // @[el2_lsu_bus_buffer.scala 573:89] + wire _T_4462 = buf_write[2] & _T_2637; // @[el2_lsu_bus_buffer.scala 573:64] + wire _T_4463 = ~buf_cmd_state_bus_en_2; // @[el2_lsu_bus_buffer.scala 573:91] + wire _T_4464 = _T_4462 & _T_4463; // @[el2_lsu_bus_buffer.scala 573:89] + wire [1:0] _T_4470 = _T_4469 + _T_4464; // @[el2_lsu_bus_buffer.scala 573:142] + wire _T_4457 = buf_write[1] & _T_2632; // @[el2_lsu_bus_buffer.scala 573:64] + wire _T_4458 = ~buf_cmd_state_bus_en_1; // @[el2_lsu_bus_buffer.scala 573:91] + wire _T_4459 = _T_4457 & _T_4458; // @[el2_lsu_bus_buffer.scala 573:89] + wire [1:0] _GEN_354 = {{1'd0}, _T_4459}; // @[el2_lsu_bus_buffer.scala 573:142] + wire [2:0] _T_4471 = _T_4470 + _GEN_354; // @[el2_lsu_bus_buffer.scala 573:142] + wire _T_4452 = buf_write[0] & _T_2627; // @[el2_lsu_bus_buffer.scala 573:64] + wire _T_4453 = ~buf_cmd_state_bus_en_0; // @[el2_lsu_bus_buffer.scala 573:91] + wire _T_4454 = _T_4452 & _T_4453; // @[el2_lsu_bus_buffer.scala 573:89] + wire [2:0] _GEN_355 = {{2'd0}, _T_4454}; // @[el2_lsu_bus_buffer.scala 573:142] + wire [3:0] buf_numvld_wrcmd_any = _T_4471 + _GEN_355; // @[el2_lsu_bus_buffer.scala 573:142] + wire _T_1037 = buf_numvld_wrcmd_any == 4'h1; // @[el2_lsu_bus_buffer.scala 313:43] + wire _T_4484 = _T_2642 & _T_4468; // @[el2_lsu_bus_buffer.scala 574:73] + wire _T_4481 = _T_2637 & _T_4463; // @[el2_lsu_bus_buffer.scala 574:73] + wire [1:0] _T_4485 = _T_4484 + _T_4481; // @[el2_lsu_bus_buffer.scala 574:126] + wire _T_4478 = _T_2632 & _T_4458; // @[el2_lsu_bus_buffer.scala 574:73] + wire [1:0] _GEN_356 = {{1'd0}, _T_4478}; // @[el2_lsu_bus_buffer.scala 574:126] + wire [2:0] _T_4486 = _T_4485 + _GEN_356; // @[el2_lsu_bus_buffer.scala 574:126] + wire _T_4475 = _T_2627 & _T_4453; // @[el2_lsu_bus_buffer.scala 574:73] + wire [2:0] _GEN_357 = {{2'd0}, _T_4475}; // @[el2_lsu_bus_buffer.scala 574:126] + wire [3:0] buf_numvld_cmd_any = _T_4486 + _GEN_357; // @[el2_lsu_bus_buffer.scala 574:126] + wire _T_1038 = buf_numvld_cmd_any == 4'h1; // @[el2_lsu_bus_buffer.scala 313:72] + wire _T_1039 = _T_1037 & _T_1038; // @[el2_lsu_bus_buffer.scala 313:51] + reg [2:0] obuf_wr_timer; // @[el2_lsu_bus_buffer.scala 412:54] + wire _T_1040 = obuf_wr_timer != 3'h7; // @[el2_lsu_bus_buffer.scala 313:97] + wire _T_1041 = _T_1039 & _T_1040; // @[el2_lsu_bus_buffer.scala 313:80] + wire _T_1043 = _T_1041 & _T_938; // @[el2_lsu_bus_buffer.scala 313:114] + wire _T_2000 = |buf_age_3; // @[el2_lsu_bus_buffer.scala 429:58] + wire _T_2001 = ~_T_2000; // @[el2_lsu_bus_buffer.scala 429:45] + wire _T_2003 = _T_2001 & _T_2642; // @[el2_lsu_bus_buffer.scala 429:63] + wire _T_2005 = _T_2003 & _T_4468; // @[el2_lsu_bus_buffer.scala 429:88] + wire _T_1994 = |buf_age_2; // @[el2_lsu_bus_buffer.scala 429:58] + wire _T_1995 = ~_T_1994; // @[el2_lsu_bus_buffer.scala 429:45] + wire _T_1997 = _T_1995 & _T_2637; // @[el2_lsu_bus_buffer.scala 429:63] + wire _T_1999 = _T_1997 & _T_4463; // @[el2_lsu_bus_buffer.scala 429:88] + wire _T_1988 = |buf_age_1; // @[el2_lsu_bus_buffer.scala 429:58] + wire _T_1989 = ~_T_1988; // @[el2_lsu_bus_buffer.scala 429:45] + wire _T_1991 = _T_1989 & _T_2632; // @[el2_lsu_bus_buffer.scala 429:63] + wire _T_1993 = _T_1991 & _T_4458; // @[el2_lsu_bus_buffer.scala 429:88] + wire _T_1982 = |buf_age_0; // @[el2_lsu_bus_buffer.scala 429:58] + wire _T_1983 = ~_T_1982; // @[el2_lsu_bus_buffer.scala 429:45] + wire _T_1985 = _T_1983 & _T_2627; // @[el2_lsu_bus_buffer.scala 429:63] + wire _T_1987 = _T_1985 & _T_4453; // @[el2_lsu_bus_buffer.scala 429:88] + wire [3:0] CmdPtr0Dec = {_T_2005,_T_1999,_T_1993,_T_1987}; // @[Cat.scala 29:58] + wire [7:0] _T_2075 = {4'h0,_T_2005,_T_1999,_T_1993,_T_1987}; // @[Cat.scala 29:58] + wire _T_2078 = _T_2075[4] | _T_2075[5]; // @[el2_lsu_bus_buffer.scala 437:42] + wire _T_2080 = _T_2078 | _T_2075[6]; // @[el2_lsu_bus_buffer.scala 437:48] + wire _T_2082 = _T_2080 | _T_2075[7]; // @[el2_lsu_bus_buffer.scala 437:54] + wire _T_2085 = _T_2075[2] | _T_2075[3]; // @[el2_lsu_bus_buffer.scala 437:67] + wire _T_2087 = _T_2085 | _T_2075[6]; // @[el2_lsu_bus_buffer.scala 437:73] + wire _T_2089 = _T_2087 | _T_2075[7]; // @[el2_lsu_bus_buffer.scala 437:79] + wire _T_2092 = _T_2075[1] | _T_2075[3]; // @[el2_lsu_bus_buffer.scala 437:92] + wire _T_2094 = _T_2092 | _T_2075[5]; // @[el2_lsu_bus_buffer.scala 437:98] + wire _T_2096 = _T_2094 | _T_2075[7]; // @[el2_lsu_bus_buffer.scala 437:104] + wire [2:0] _T_2098 = {_T_2082,_T_2089,_T_2096}; // @[Cat.scala 29:58] + wire [1:0] CmdPtr0 = _T_2098[1:0]; // @[el2_lsu_bus_buffer.scala 442:11] + wire _T_1044 = CmdPtr0 == 2'h0; // @[el2_lsu_bus_buffer.scala 314:114] + wire _T_1045 = CmdPtr0 == 2'h1; // @[el2_lsu_bus_buffer.scala 314:114] + wire _T_1046 = CmdPtr0 == 2'h2; // @[el2_lsu_bus_buffer.scala 314:114] + wire _T_1047 = CmdPtr0 == 2'h3; // @[el2_lsu_bus_buffer.scala 314:114] + reg buf_nomerge_0; // @[Reg.scala 27:20] + wire _T_1048 = _T_1044 & buf_nomerge_0; // @[Mux.scala 27:72] + reg buf_nomerge_1; // @[Reg.scala 27:20] + wire _T_1049 = _T_1045 & buf_nomerge_1; // @[Mux.scala 27:72] + reg buf_nomerge_2; // @[Reg.scala 27:20] + wire _T_1050 = _T_1046 & buf_nomerge_2; // @[Mux.scala 27:72] + reg buf_nomerge_3; // @[Reg.scala 27:20] + wire _T_1051 = _T_1047 & buf_nomerge_3; // @[Mux.scala 27:72] + wire _T_1052 = _T_1048 | _T_1049; // @[Mux.scala 27:72] + wire _T_1053 = _T_1052 | _T_1050; // @[Mux.scala 27:72] + wire _T_1054 = _T_1053 | _T_1051; // @[Mux.scala 27:72] + wire _T_1056 = ~_T_1054; // @[el2_lsu_bus_buffer.scala 314:31] + wire _T_1057 = _T_1043 & _T_1056; // @[el2_lsu_bus_buffer.scala 314:29] + reg _T_4351; // @[Reg.scala 27:20] + reg _T_4348; // @[Reg.scala 27:20] + reg _T_4345; // @[Reg.scala 27:20] + reg _T_4342; // @[Reg.scala 27:20] + wire [3:0] buf_sideeffect = {_T_4351,_T_4348,_T_4345,_T_4342}; // @[Cat.scala 29:58] + wire _T_1066 = _T_1044 & buf_sideeffect[0]; // @[Mux.scala 27:72] + wire _T_1067 = _T_1045 & buf_sideeffect[1]; // @[Mux.scala 27:72] + wire _T_1068 = _T_1046 & buf_sideeffect[2]; // @[Mux.scala 27:72] + wire _T_1069 = _T_1047 & buf_sideeffect[3]; // @[Mux.scala 27:72] + wire _T_1070 = _T_1066 | _T_1067; // @[Mux.scala 27:72] + wire _T_1071 = _T_1070 | _T_1068; // @[Mux.scala 27:72] + wire _T_1072 = _T_1071 | _T_1069; // @[Mux.scala 27:72] + wire _T_1074 = ~_T_1072; // @[el2_lsu_bus_buffer.scala 315:5] + wire _T_1075 = _T_1057 & _T_1074; // @[el2_lsu_bus_buffer.scala 314:140] + wire _T_1086 = _T_858 & _T_852; // @[el2_lsu_bus_buffer.scala 317:58] + wire _T_1088 = _T_1086 & _T_1038; // @[el2_lsu_bus_buffer.scala 317:72] + wire [29:0] _T_1098 = _T_1044 ? buf_addr_0[31:2] : 30'h0; // @[Mux.scala 27:72] + wire [29:0] _T_1099 = _T_1045 ? buf_addr_1[31:2] : 30'h0; // @[Mux.scala 27:72] + wire [29:0] _T_1102 = _T_1098 | _T_1099; // @[Mux.scala 27:72] + wire [29:0] _T_1100 = _T_1046 ? buf_addr_2[31:2] : 30'h0; // @[Mux.scala 27:72] + wire [29:0] _T_1103 = _T_1102 | _T_1100; // @[Mux.scala 27:72] + wire [29:0] _T_1101 = _T_1047 ? buf_addr_3[31:2] : 30'h0; // @[Mux.scala 27:72] + wire [29:0] _T_1104 = _T_1103 | _T_1101; // @[Mux.scala 27:72] + wire _T_1106 = io_lsu_addr_m[31:2] != _T_1104; // @[el2_lsu_bus_buffer.scala 317:123] + wire obuf_force_wr_en = _T_1088 & _T_1106; // @[el2_lsu_bus_buffer.scala 317:101] + wire _T_1076 = ~obuf_force_wr_en; // @[el2_lsu_bus_buffer.scala 315:119] + wire obuf_wr_wait = _T_1075 & _T_1076; // @[el2_lsu_bus_buffer.scala 315:117] + wire _T_1077 = |buf_numvld_cmd_any; // @[el2_lsu_bus_buffer.scala 316:75] + wire _T_1078 = obuf_wr_timer < 3'h7; // @[el2_lsu_bus_buffer.scala 316:95] + wire _T_1079 = _T_1077 & _T_1078; // @[el2_lsu_bus_buffer.scala 316:79] + wire [2:0] _T_1081 = obuf_wr_timer + 3'h1; // @[el2_lsu_bus_buffer.scala 316:121] + wire _T_4503 = buf_state_3 == 3'h1; // @[el2_lsu_bus_buffer.scala 575:63] + wire _T_4507 = _T_4503 | _T_4484; // @[el2_lsu_bus_buffer.scala 575:74] + wire _T_4498 = buf_state_2 == 3'h1; // @[el2_lsu_bus_buffer.scala 575:63] + wire _T_4502 = _T_4498 | _T_4481; // @[el2_lsu_bus_buffer.scala 575:74] + wire [1:0] _T_4508 = _T_4507 + _T_4502; // @[el2_lsu_bus_buffer.scala 575:154] + wire _T_4493 = buf_state_1 == 3'h1; // @[el2_lsu_bus_buffer.scala 575:63] + wire _T_4497 = _T_4493 | _T_4478; // @[el2_lsu_bus_buffer.scala 575:74] + wire [1:0] _GEN_358 = {{1'd0}, _T_4497}; // @[el2_lsu_bus_buffer.scala 575:154] + wire [2:0] _T_4509 = _T_4508 + _GEN_358; // @[el2_lsu_bus_buffer.scala 575:154] + wire _T_4488 = buf_state_0 == 3'h1; // @[el2_lsu_bus_buffer.scala 575:63] + wire _T_4492 = _T_4488 | _T_4475; // @[el2_lsu_bus_buffer.scala 575:74] + wire [2:0] _GEN_359 = {{2'd0}, _T_4492}; // @[el2_lsu_bus_buffer.scala 575:154] + wire [3:0] buf_numvld_pend_any = _T_4509 + _GEN_359; // @[el2_lsu_bus_buffer.scala 575:154] + wire _T_1108 = buf_numvld_pend_any == 4'h0; // @[el2_lsu_bus_buffer.scala 319:53] + wire _T_1109 = ibuf_byp & _T_1108; // @[el2_lsu_bus_buffer.scala 319:31] + wire _T_1110 = ~io_lsu_pkt_r_store; // @[el2_lsu_bus_buffer.scala 319:64] + wire _T_1111 = _T_1110 | io_no_dword_merge_r; // @[el2_lsu_bus_buffer.scala 319:84] + wire ibuf_buf_byp = _T_1109 & _T_1111; // @[el2_lsu_bus_buffer.scala 319:61] + wire _T_1112 = ibuf_buf_byp & io_lsu_commit_r; // @[el2_lsu_bus_buffer.scala 334:32] + wire _T_4799 = buf_state_0 == 3'h3; // @[el2_lsu_bus_buffer.scala 603:62] + wire _T_4801 = _T_4799 & buf_sideeffect[0]; // @[el2_lsu_bus_buffer.scala 603:73] + wire _T_4802 = _T_4801 & io_dec_tlu_sideeffect_posted_disable; // @[el2_lsu_bus_buffer.scala 603:93] + wire _T_4803 = buf_state_1 == 3'h3; // @[el2_lsu_bus_buffer.scala 603:62] + wire _T_4805 = _T_4803 & buf_sideeffect[1]; // @[el2_lsu_bus_buffer.scala 603:73] + wire _T_4806 = _T_4805 & io_dec_tlu_sideeffect_posted_disable; // @[el2_lsu_bus_buffer.scala 603:93] + wire _T_4815 = _T_4802 | _T_4806; // @[el2_lsu_bus_buffer.scala 603:141] + wire _T_4807 = buf_state_2 == 3'h3; // @[el2_lsu_bus_buffer.scala 603:62] + wire _T_4809 = _T_4807 & buf_sideeffect[2]; // @[el2_lsu_bus_buffer.scala 603:73] + wire _T_4810 = _T_4809 & io_dec_tlu_sideeffect_posted_disable; // @[el2_lsu_bus_buffer.scala 603:93] + wire _T_4816 = _T_4815 | _T_4810; // @[el2_lsu_bus_buffer.scala 603:141] + wire _T_4811 = buf_state_3 == 3'h3; // @[el2_lsu_bus_buffer.scala 603:62] + wire _T_4813 = _T_4811 & buf_sideeffect[3]; // @[el2_lsu_bus_buffer.scala 603:73] + wire _T_4814 = _T_4813 & io_dec_tlu_sideeffect_posted_disable; // @[el2_lsu_bus_buffer.scala 603:93] + wire bus_sideeffect_pend = _T_4816 | _T_4814; // @[el2_lsu_bus_buffer.scala 603:141] + wire _T_1113 = io_is_sideeffects_r & bus_sideeffect_pend; // @[el2_lsu_bus_buffer.scala 334:74] + wire _T_1114 = ~_T_1113; // @[el2_lsu_bus_buffer.scala 334:52] + wire _T_1115 = _T_1112 & _T_1114; // @[el2_lsu_bus_buffer.scala 334:50] + wire [2:0] _T_1120 = _T_1044 ? buf_state_0 : 3'h0; // @[Mux.scala 27:72] + wire [2:0] _T_1121 = _T_1045 ? buf_state_1 : 3'h0; // @[Mux.scala 27:72] + wire [2:0] _T_1124 = _T_1120 | _T_1121; // @[Mux.scala 27:72] + wire [2:0] _T_1122 = _T_1046 ? buf_state_2 : 3'h0; // @[Mux.scala 27:72] + wire [2:0] _T_1125 = _T_1124 | _T_1122; // @[Mux.scala 27:72] + wire [2:0] _T_1123 = _T_1047 ? buf_state_3 : 3'h0; // @[Mux.scala 27:72] + wire [2:0] _T_1126 = _T_1125 | _T_1123; // @[Mux.scala 27:72] + wire _T_1128 = _T_1126 == 3'h2; // @[el2_lsu_bus_buffer.scala 335:36] + wire found_cmdptr0 = |CmdPtr0Dec; // @[el2_lsu_bus_buffer.scala 434:31] + wire _T_1129 = _T_1128 & found_cmdptr0; // @[el2_lsu_bus_buffer.scala 335:47] + wire [3:0] _T_1132 = {buf_cmd_state_bus_en_3,buf_cmd_state_bus_en_2,buf_cmd_state_bus_en_1,buf_cmd_state_bus_en_0}; // @[Cat.scala 29:58] + wire _T_1141 = _T_1044 & _T_1132[0]; // @[Mux.scala 27:72] + wire _T_1142 = _T_1045 & _T_1132[1]; // @[Mux.scala 27:72] + wire _T_1145 = _T_1141 | _T_1142; // @[Mux.scala 27:72] + wire _T_1143 = _T_1046 & _T_1132[2]; // @[Mux.scala 27:72] + wire _T_1146 = _T_1145 | _T_1143; // @[Mux.scala 27:72] + wire _T_1144 = _T_1047 & _T_1132[3]; // @[Mux.scala 27:72] + wire _T_1147 = _T_1146 | _T_1144; // @[Mux.scala 27:72] + wire _T_1149 = ~_T_1147; // @[el2_lsu_bus_buffer.scala 336:23] + wire _T_1150 = _T_1129 & _T_1149; // @[el2_lsu_bus_buffer.scala 336:21] + wire _T_1167 = _T_1072 & bus_sideeffect_pend; // @[el2_lsu_bus_buffer.scala 336:141] + wire _T_1168 = ~_T_1167; // @[el2_lsu_bus_buffer.scala 336:105] + wire _T_1169 = _T_1150 & _T_1168; // @[el2_lsu_bus_buffer.scala 336:103] + reg buf_dual_3; // @[Reg.scala 27:20] + reg buf_dual_2; // @[Reg.scala 27:20] + reg buf_dual_1; // @[Reg.scala 27:20] + reg buf_dual_0; // @[Reg.scala 27:20] + wire [3:0] _T_1172 = {buf_dual_3,buf_dual_2,buf_dual_1,buf_dual_0}; // @[Cat.scala 29:58] + wire _T_1181 = _T_1044 & _T_1172[0]; // @[Mux.scala 27:72] + wire _T_1182 = _T_1045 & _T_1172[1]; // @[Mux.scala 27:72] + wire _T_1185 = _T_1181 | _T_1182; // @[Mux.scala 27:72] + wire _T_1183 = _T_1046 & _T_1172[2]; // @[Mux.scala 27:72] + wire _T_1186 = _T_1185 | _T_1183; // @[Mux.scala 27:72] + wire _T_1184 = _T_1047 & _T_1172[3]; // @[Mux.scala 27:72] + wire _T_1187 = _T_1186 | _T_1184; // @[Mux.scala 27:72] + reg buf_samedw_3; // @[Reg.scala 27:20] + reg buf_samedw_2; // @[Reg.scala 27:20] + reg buf_samedw_1; // @[Reg.scala 27:20] + reg buf_samedw_0; // @[Reg.scala 27:20] + wire [3:0] _T_1191 = {buf_samedw_3,buf_samedw_2,buf_samedw_1,buf_samedw_0}; // @[Cat.scala 29:58] + wire _T_1200 = _T_1044 & _T_1191[0]; // @[Mux.scala 27:72] + wire _T_1201 = _T_1045 & _T_1191[1]; // @[Mux.scala 27:72] + wire _T_1204 = _T_1200 | _T_1201; // @[Mux.scala 27:72] + wire _T_1202 = _T_1046 & _T_1191[2]; // @[Mux.scala 27:72] + wire _T_1205 = _T_1204 | _T_1202; // @[Mux.scala 27:72] + wire _T_1203 = _T_1047 & _T_1191[3]; // @[Mux.scala 27:72] + wire _T_1206 = _T_1205 | _T_1203; // @[Mux.scala 27:72] + wire _T_1208 = _T_1187 & _T_1206; // @[el2_lsu_bus_buffer.scala 337:77] + wire _T_1217 = _T_1044 & buf_write[0]; // @[Mux.scala 27:72] + wire _T_1218 = _T_1045 & buf_write[1]; // @[Mux.scala 27:72] + wire _T_1221 = _T_1217 | _T_1218; // @[Mux.scala 27:72] + wire _T_1219 = _T_1046 & buf_write[2]; // @[Mux.scala 27:72] + wire _T_1222 = _T_1221 | _T_1219; // @[Mux.scala 27:72] + wire _T_1220 = _T_1047 & buf_write[3]; // @[Mux.scala 27:72] + wire _T_1223 = _T_1222 | _T_1220; // @[Mux.scala 27:72] + wire _T_1225 = ~_T_1223; // @[el2_lsu_bus_buffer.scala 337:150] + wire _T_1226 = _T_1208 & _T_1225; // @[el2_lsu_bus_buffer.scala 337:148] + wire _T_1227 = ~_T_1226; // @[el2_lsu_bus_buffer.scala 337:8] + wire [3:0] _T_2041 = ~CmdPtr0Dec; // @[el2_lsu_bus_buffer.scala 430:62] + wire [3:0] _T_2042 = buf_age_3 & _T_2041; // @[el2_lsu_bus_buffer.scala 430:59] + wire _T_2043 = |_T_2042; // @[el2_lsu_bus_buffer.scala 430:76] + wire _T_2044 = ~_T_2043; // @[el2_lsu_bus_buffer.scala 430:45] + wire _T_2046 = ~CmdPtr0Dec[3]; // @[el2_lsu_bus_buffer.scala 430:83] + wire _T_2047 = _T_2044 & _T_2046; // @[el2_lsu_bus_buffer.scala 430:81] + wire _T_2049 = _T_2047 & _T_2642; // @[el2_lsu_bus_buffer.scala 430:98] + wire _T_2051 = _T_2049 & _T_4468; // @[el2_lsu_bus_buffer.scala 430:123] + wire [3:0] _T_2031 = buf_age_2 & _T_2041; // @[el2_lsu_bus_buffer.scala 430:59] + wire _T_2032 = |_T_2031; // @[el2_lsu_bus_buffer.scala 430:76] + wire _T_2033 = ~_T_2032; // @[el2_lsu_bus_buffer.scala 430:45] + wire _T_2035 = ~CmdPtr0Dec[2]; // @[el2_lsu_bus_buffer.scala 430:83] + wire _T_2036 = _T_2033 & _T_2035; // @[el2_lsu_bus_buffer.scala 430:81] + wire _T_2038 = _T_2036 & _T_2637; // @[el2_lsu_bus_buffer.scala 430:98] + wire _T_2040 = _T_2038 & _T_4463; // @[el2_lsu_bus_buffer.scala 430:123] + wire [3:0] _T_2020 = buf_age_1 & _T_2041; // @[el2_lsu_bus_buffer.scala 430:59] + wire _T_2021 = |_T_2020; // @[el2_lsu_bus_buffer.scala 430:76] + wire _T_2022 = ~_T_2021; // @[el2_lsu_bus_buffer.scala 430:45] + wire _T_2024 = ~CmdPtr0Dec[1]; // @[el2_lsu_bus_buffer.scala 430:83] + wire _T_2025 = _T_2022 & _T_2024; // @[el2_lsu_bus_buffer.scala 430:81] + wire _T_2027 = _T_2025 & _T_2632; // @[el2_lsu_bus_buffer.scala 430:98] + wire _T_2029 = _T_2027 & _T_4458; // @[el2_lsu_bus_buffer.scala 430:123] + wire [3:0] _T_2009 = buf_age_0 & _T_2041; // @[el2_lsu_bus_buffer.scala 430:59] + wire _T_2010 = |_T_2009; // @[el2_lsu_bus_buffer.scala 430:76] + wire _T_2011 = ~_T_2010; // @[el2_lsu_bus_buffer.scala 430:45] + wire _T_2013 = ~CmdPtr0Dec[0]; // @[el2_lsu_bus_buffer.scala 430:83] + wire _T_2014 = _T_2011 & _T_2013; // @[el2_lsu_bus_buffer.scala 430:81] + wire _T_2016 = _T_2014 & _T_2627; // @[el2_lsu_bus_buffer.scala 430:98] + wire _T_2018 = _T_2016 & _T_4453; // @[el2_lsu_bus_buffer.scala 430:123] + wire [3:0] CmdPtr1Dec = {_T_2051,_T_2040,_T_2029,_T_2018}; // @[Cat.scala 29:58] + wire found_cmdptr1 = |CmdPtr1Dec; // @[el2_lsu_bus_buffer.scala 435:31] + wire _T_1228 = _T_1227 | found_cmdptr1; // @[el2_lsu_bus_buffer.scala 337:181] + wire [3:0] _T_1231 = {buf_nomerge_3,buf_nomerge_2,buf_nomerge_1,buf_nomerge_0}; // @[Cat.scala 29:58] + wire _T_1240 = _T_1044 & _T_1231[0]; // @[Mux.scala 27:72] + wire _T_1241 = _T_1045 & _T_1231[1]; // @[Mux.scala 27:72] + wire _T_1244 = _T_1240 | _T_1241; // @[Mux.scala 27:72] + wire _T_1242 = _T_1046 & _T_1231[2]; // @[Mux.scala 27:72] + wire _T_1245 = _T_1244 | _T_1242; // @[Mux.scala 27:72] + wire _T_1243 = _T_1047 & _T_1231[3]; // @[Mux.scala 27:72] + wire _T_1246 = _T_1245 | _T_1243; // @[Mux.scala 27:72] + wire _T_1248 = _T_1228 | _T_1246; // @[el2_lsu_bus_buffer.scala 337:197] + wire _T_1249 = _T_1248 | obuf_force_wr_en; // @[el2_lsu_bus_buffer.scala 337:269] + wire _T_1250 = _T_1169 & _T_1249; // @[el2_lsu_bus_buffer.scala 336:164] + wire _T_1251 = _T_1115 | _T_1250; // @[el2_lsu_bus_buffer.scala 334:98] + reg obuf_write; // @[Reg.scala 27:20] + reg obuf_cmd_done; // @[el2_lsu_bus_buffer.scala 399:54] + reg obuf_data_done; // @[el2_lsu_bus_buffer.scala 400:55] + wire _T_4874 = obuf_cmd_done | obuf_data_done; // @[el2_lsu_bus_buffer.scala 607:54] + wire _T_4875 = obuf_cmd_done ? io_lsu_axi_wready : io_lsu_axi_awready; // @[el2_lsu_bus_buffer.scala 607:75] + wire _T_4877 = _T_4874 ? _T_4875 : io_lsu_axi_awready; // @[el2_lsu_bus_buffer.scala 607:39] + wire bus_cmd_ready = obuf_write ? _T_4877 : io_lsu_axi_arready; // @[el2_lsu_bus_buffer.scala 607:23] + wire _T_1252 = ~obuf_valid; // @[el2_lsu_bus_buffer.scala 338:48] + wire _T_1253 = bus_cmd_ready | _T_1252; // @[el2_lsu_bus_buffer.scala 338:46] + reg obuf_nosend; // @[Reg.scala 27:20] + wire _T_1254 = _T_1253 | obuf_nosend; // @[el2_lsu_bus_buffer.scala 338:60] + wire _T_1255 = _T_1251 & _T_1254; // @[el2_lsu_bus_buffer.scala 338:29] + wire _T_1256 = ~obuf_wr_wait; // @[el2_lsu_bus_buffer.scala 338:77] + wire _T_1257 = _T_1255 & _T_1256; // @[el2_lsu_bus_buffer.scala 338:75] + reg [31:0] obuf_addr; // @[el2_lib.scala 512:16] + wire _T_4822 = obuf_addr[31:3] == buf_addr_0[31:3]; // @[el2_lsu_bus_buffer.scala 605:56] + wire _T_4823 = obuf_valid & _T_4822; // @[el2_lsu_bus_buffer.scala 605:38] + wire _T_4825 = obuf_tag1 == 2'h0; // @[el2_lsu_bus_buffer.scala 605:126] + wire _T_4826 = obuf_merge & _T_4825; // @[el2_lsu_bus_buffer.scala 605:114] + wire _T_4827 = _T_3583 | _T_4826; // @[el2_lsu_bus_buffer.scala 605:100] + wire _T_4828 = ~_T_4827; // @[el2_lsu_bus_buffer.scala 605:80] + wire _T_4829 = _T_4823 & _T_4828; // @[el2_lsu_bus_buffer.scala 605:78] + wire _T_4866 = _T_4799 & _T_4829; // @[Mux.scala 27:72] + wire _T_4834 = obuf_addr[31:3] == buf_addr_1[31:3]; // @[el2_lsu_bus_buffer.scala 605:56] + wire _T_4835 = obuf_valid & _T_4834; // @[el2_lsu_bus_buffer.scala 605:38] + wire _T_4837 = obuf_tag1 == 2'h1; // @[el2_lsu_bus_buffer.scala 605:126] + wire _T_4838 = obuf_merge & _T_4837; // @[el2_lsu_bus_buffer.scala 605:114] + wire _T_4839 = _T_3776 | _T_4838; // @[el2_lsu_bus_buffer.scala 605:100] + wire _T_4840 = ~_T_4839; // @[el2_lsu_bus_buffer.scala 605:80] + wire _T_4841 = _T_4835 & _T_4840; // @[el2_lsu_bus_buffer.scala 605:78] + wire _T_4867 = _T_4803 & _T_4841; // @[Mux.scala 27:72] + wire _T_4870 = _T_4866 | _T_4867; // @[Mux.scala 27:72] + wire _T_4846 = obuf_addr[31:3] == buf_addr_2[31:3]; // @[el2_lsu_bus_buffer.scala 605:56] + wire _T_4847 = obuf_valid & _T_4846; // @[el2_lsu_bus_buffer.scala 605:38] + wire _T_4849 = obuf_tag1 == 2'h2; // @[el2_lsu_bus_buffer.scala 605:126] + wire _T_4850 = obuf_merge & _T_4849; // @[el2_lsu_bus_buffer.scala 605:114] + wire _T_4851 = _T_3969 | _T_4850; // @[el2_lsu_bus_buffer.scala 605:100] + wire _T_4852 = ~_T_4851; // @[el2_lsu_bus_buffer.scala 605:80] + wire _T_4853 = _T_4847 & _T_4852; // @[el2_lsu_bus_buffer.scala 605:78] + wire _T_4868 = _T_4807 & _T_4853; // @[Mux.scala 27:72] + wire _T_4871 = _T_4870 | _T_4868; // @[Mux.scala 27:72] + wire _T_4858 = obuf_addr[31:3] == buf_addr_3[31:3]; // @[el2_lsu_bus_buffer.scala 605:56] + wire _T_4859 = obuf_valid & _T_4858; // @[el2_lsu_bus_buffer.scala 605:38] + wire _T_4861 = obuf_tag1 == 2'h3; // @[el2_lsu_bus_buffer.scala 605:126] + wire _T_4862 = obuf_merge & _T_4861; // @[el2_lsu_bus_buffer.scala 605:114] + wire _T_4863 = _T_4162 | _T_4862; // @[el2_lsu_bus_buffer.scala 605:100] + wire _T_4864 = ~_T_4863; // @[el2_lsu_bus_buffer.scala 605:80] + wire _T_4865 = _T_4859 & _T_4864; // @[el2_lsu_bus_buffer.scala 605:78] + wire _T_4869 = _T_4811 & _T_4865; // @[Mux.scala 27:72] + wire bus_addr_match_pending = _T_4871 | _T_4869; // @[Mux.scala 27:72] + wire _T_1260 = ~bus_addr_match_pending; // @[el2_lsu_bus_buffer.scala 338:118] + wire _T_1261 = _T_1257 & _T_1260; // @[el2_lsu_bus_buffer.scala 338:116] + wire obuf_wr_en = _T_1261 & io_lsu_bus_clk_en; // @[el2_lsu_bus_buffer.scala 338:142] + wire _T_1263 = obuf_valid & obuf_nosend; // @[el2_lsu_bus_buffer.scala 340:47] + wire bus_wcmd_sent = io_lsu_axi_awvalid & io_lsu_axi_awready; // @[el2_lsu_bus_buffer.scala 608:39] + wire _T_4881 = obuf_cmd_done | bus_wcmd_sent; // @[el2_lsu_bus_buffer.scala 610:35] + wire bus_wdata_sent = io_lsu_axi_wvalid & io_lsu_axi_wready; // @[el2_lsu_bus_buffer.scala 609:39] + wire _T_4882 = obuf_data_done | bus_wdata_sent; // @[el2_lsu_bus_buffer.scala 610:70] + wire _T_4883 = _T_4881 & _T_4882; // @[el2_lsu_bus_buffer.scala 610:52] + wire _T_4884 = io_lsu_axi_arvalid & io_lsu_axi_arready; // @[el2_lsu_bus_buffer.scala 610:111] + wire bus_cmd_sent = _T_4883 | _T_4884; // @[el2_lsu_bus_buffer.scala 610:89] + wire _T_1264 = bus_cmd_sent | _T_1263; // @[el2_lsu_bus_buffer.scala 340:33] + wire _T_1265 = ~obuf_wr_en; // @[el2_lsu_bus_buffer.scala 340:65] + wire _T_1266 = _T_1264 & _T_1265; // @[el2_lsu_bus_buffer.scala 340:63] + wire _T_1267 = _T_1266 & io_lsu_bus_clk_en; // @[el2_lsu_bus_buffer.scala 340:77] + wire obuf_rst = _T_1267 | io_dec_tlu_force_halt; // @[el2_lsu_bus_buffer.scala 340:98] + wire obuf_write_in = ibuf_buf_byp ? io_lsu_pkt_r_store : _T_1223; // @[el2_lsu_bus_buffer.scala 341:26] + wire [31:0] _T_1304 = _T_1044 ? buf_addr_0 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_1305 = _T_1045 ? buf_addr_1 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_1306 = _T_1046 ? buf_addr_2 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_1307 = _T_1047 ? buf_addr_3 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_1308 = _T_1304 | _T_1305; // @[Mux.scala 27:72] + wire [31:0] _T_1309 = _T_1308 | _T_1306; // @[Mux.scala 27:72] + wire [31:0] _T_1310 = _T_1309 | _T_1307; // @[Mux.scala 27:72] + wire [31:0] obuf_addr_in = ibuf_buf_byp ? io_lsu_addr_r : _T_1310; // @[el2_lsu_bus_buffer.scala 343:25] + reg [1:0] buf_sz_0; // @[Reg.scala 27:20] + wire [1:0] _T_1317 = _T_1044 ? buf_sz_0 : 2'h0; // @[Mux.scala 27:72] + reg [1:0] buf_sz_1; // @[Reg.scala 27:20] + wire [1:0] _T_1318 = _T_1045 ? buf_sz_1 : 2'h0; // @[Mux.scala 27:72] + reg [1:0] buf_sz_2; // @[Reg.scala 27:20] + wire [1:0] _T_1319 = _T_1046 ? buf_sz_2 : 2'h0; // @[Mux.scala 27:72] + reg [1:0] buf_sz_3; // @[Reg.scala 27:20] + wire [1:0] _T_1320 = _T_1047 ? buf_sz_3 : 2'h0; // @[Mux.scala 27:72] + wire [1:0] _T_1321 = _T_1317 | _T_1318; // @[Mux.scala 27:72] + wire [1:0] _T_1322 = _T_1321 | _T_1319; // @[Mux.scala 27:72] + wire [1:0] _T_1323 = _T_1322 | _T_1320; // @[Mux.scala 27:72] + wire [1:0] obuf_sz_in = ibuf_buf_byp ? ibuf_sz_in : _T_1323; // @[el2_lsu_bus_buffer.scala 346:23] + wire _T_1325 = obuf_wr_en | obuf_rst; // @[el2_lsu_bus_buffer.scala 355:39] + wire _T_1326 = ~_T_1325; // @[el2_lsu_bus_buffer.scala 355:26] + wire _T_1332 = obuf_sz_in == 2'h0; // @[el2_lsu_bus_buffer.scala 359:72] + wire _T_1335 = ~obuf_addr_in[0]; // @[el2_lsu_bus_buffer.scala 359:98] + wire _T_1336 = obuf_sz_in[0] & _T_1335; // @[el2_lsu_bus_buffer.scala 359:96] + wire _T_1337 = _T_1332 | _T_1336; // @[el2_lsu_bus_buffer.scala 359:79] + wire _T_1340 = |obuf_addr_in[1:0]; // @[el2_lsu_bus_buffer.scala 359:153] + wire _T_1341 = ~_T_1340; // @[el2_lsu_bus_buffer.scala 359:134] + wire _T_1342 = obuf_sz_in[1] & _T_1341; // @[el2_lsu_bus_buffer.scala 359:132] + wire _T_1343 = _T_1337 | _T_1342; // @[el2_lsu_bus_buffer.scala 359:116] + wire obuf_aligned_in = ibuf_buf_byp ? is_aligned_r : _T_1343; // @[el2_lsu_bus_buffer.scala 359:28] + wire _T_1360 = obuf_addr_in[31:3] == obuf_addr[31:3]; // @[el2_lsu_bus_buffer.scala 373:40] + wire _T_1361 = _T_1360 & obuf_aligned_in; // @[el2_lsu_bus_buffer.scala 373:60] + reg obuf_sideeffect; // @[Reg.scala 27:20] + wire _T_1362 = ~obuf_sideeffect; // @[el2_lsu_bus_buffer.scala 373:80] + wire _T_1363 = _T_1361 & _T_1362; // @[el2_lsu_bus_buffer.scala 373:78] + wire _T_1364 = ~obuf_write; // @[el2_lsu_bus_buffer.scala 373:99] + wire _T_1365 = _T_1363 & _T_1364; // @[el2_lsu_bus_buffer.scala 373:97] + wire _T_1366 = ~obuf_write_in; // @[el2_lsu_bus_buffer.scala 373:113] + wire _T_1367 = _T_1365 & _T_1366; // @[el2_lsu_bus_buffer.scala 373:111] + wire _T_1368 = ~io_dec_tlu_external_ldfwd_disable; // @[el2_lsu_bus_buffer.scala 373:130] + wire _T_1369 = _T_1367 & _T_1368; // @[el2_lsu_bus_buffer.scala 373:128] + wire _T_1370 = ~obuf_nosend; // @[el2_lsu_bus_buffer.scala 374:20] + wire _T_1371 = obuf_valid & _T_1370; // @[el2_lsu_bus_buffer.scala 374:18] + reg obuf_rdrsp_pend; // @[el2_lsu_bus_buffer.scala 401:56] + wire bus_rsp_read = io_lsu_axi_rvalid & io_lsu_axi_rready; // @[el2_lsu_bus_buffer.scala 611:37] + reg [2:0] obuf_rdrsp_tag; // @[el2_lsu_bus_buffer.scala 402:55] + wire _T_1372 = io_lsu_axi_rid == obuf_rdrsp_tag; // @[el2_lsu_bus_buffer.scala 374:90] + wire _T_1373 = bus_rsp_read & _T_1372; // @[el2_lsu_bus_buffer.scala 374:70] + wire _T_1374 = ~_T_1373; // @[el2_lsu_bus_buffer.scala 374:55] + wire _T_1375 = obuf_rdrsp_pend & _T_1374; // @[el2_lsu_bus_buffer.scala 374:53] + wire _T_1376 = _T_1371 | _T_1375; // @[el2_lsu_bus_buffer.scala 374:34] + wire obuf_nosend_in = _T_1369 & _T_1376; // @[el2_lsu_bus_buffer.scala 373:165] + wire _T_1344 = ~obuf_nosend_in; // @[el2_lsu_bus_buffer.scala 367:44] + wire _T_1345 = obuf_wr_en & _T_1344; // @[el2_lsu_bus_buffer.scala 367:42] + wire _T_1346 = ~_T_1345; // @[el2_lsu_bus_buffer.scala 367:29] + wire _T_1347 = _T_1346 & obuf_rdrsp_pend; // @[el2_lsu_bus_buffer.scala 367:61] + wire _T_1351 = _T_1347 & _T_1374; // @[el2_lsu_bus_buffer.scala 367:79] + wire _T_1353 = bus_cmd_sent & _T_1364; // @[el2_lsu_bus_buffer.scala 368:20] + wire _T_1354 = ~io_dec_tlu_force_halt; // @[el2_lsu_bus_buffer.scala 368:37] + wire _T_1355 = _T_1353 & _T_1354; // @[el2_lsu_bus_buffer.scala 368:35] + wire _T_1357 = bus_cmd_sent | _T_1364; // @[el2_lsu_bus_buffer.scala 370:44] + wire [7:0] _T_1379 = {ldst_byteen_lo_r,4'h0}; // @[Cat.scala 29:58] + wire [7:0] _T_1380 = {4'h0,ldst_byteen_lo_r}; // @[Cat.scala 29:58] + wire [7:0] _T_1381 = io_lsu_addr_r[2] ? _T_1379 : _T_1380; // @[el2_lsu_bus_buffer.scala 375:46] + wire [3:0] _T_1400 = _T_1044 ? buf_byteen_0 : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_1401 = _T_1045 ? buf_byteen_1 : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_1402 = _T_1046 ? buf_byteen_2 : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_1403 = _T_1047 ? buf_byteen_3 : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_1404 = _T_1400 | _T_1401; // @[Mux.scala 27:72] + wire [3:0] _T_1405 = _T_1404 | _T_1402; // @[Mux.scala 27:72] + wire [3:0] _T_1406 = _T_1405 | _T_1403; // @[Mux.scala 27:72] + wire [7:0] _T_1408 = {_T_1406,4'h0}; // @[Cat.scala 29:58] + wire [7:0] _T_1421 = {4'h0,_T_1406}; // @[Cat.scala 29:58] + wire [7:0] _T_1422 = _T_1310[2] ? _T_1408 : _T_1421; // @[el2_lsu_bus_buffer.scala 376:8] + wire [7:0] obuf_byteen0_in = ibuf_buf_byp ? _T_1381 : _T_1422; // @[el2_lsu_bus_buffer.scala 375:28] + wire [7:0] _T_1424 = {ldst_byteen_hi_r,4'h0}; // @[Cat.scala 29:58] + wire [7:0] _T_1425 = {4'h0,ldst_byteen_hi_r}; // @[Cat.scala 29:58] + wire [7:0] _T_1426 = io_end_addr_r[2] ? _T_1424 : _T_1425; // @[el2_lsu_bus_buffer.scala 377:46] + wire [7:0] _T_1453 = {buf_byteen_0,4'h0}; // @[Cat.scala 29:58] + wire [7:0] _T_1466 = {4'h0,buf_byteen_0}; // @[Cat.scala 29:58] + wire [7:0] _T_1467 = buf_addr_0[2] ? _T_1453 : _T_1466; // @[el2_lsu_bus_buffer.scala 378:8] + wire [7:0] obuf_byteen1_in = ibuf_buf_byp ? _T_1426 : _T_1467; // @[el2_lsu_bus_buffer.scala 377:28] + wire [63:0] _T_1469 = {store_data_lo_r,32'h0}; // @[Cat.scala 29:58] + wire [63:0] _T_1470 = {32'h0,store_data_lo_r}; // @[Cat.scala 29:58] + wire [63:0] _T_1471 = io_lsu_addr_r[2] ? _T_1469 : _T_1470; // @[el2_lsu_bus_buffer.scala 380:44] + wire [31:0] _T_1490 = _T_1044 ? buf_data_0 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_1491 = _T_1045 ? buf_data_1 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_1492 = _T_1046 ? buf_data_2 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_1493 = _T_1047 ? buf_data_3 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_1494 = _T_1490 | _T_1491; // @[Mux.scala 27:72] + wire [31:0] _T_1495 = _T_1494 | _T_1492; // @[Mux.scala 27:72] + wire [31:0] _T_1496 = _T_1495 | _T_1493; // @[Mux.scala 27:72] + wire [63:0] _T_1498 = {_T_1496,32'h0}; // @[Cat.scala 29:58] + wire [63:0] _T_1511 = {32'h0,_T_1496}; // @[Cat.scala 29:58] + wire [63:0] _T_1512 = _T_1310[2] ? _T_1498 : _T_1511; // @[el2_lsu_bus_buffer.scala 381:8] + wire [63:0] obuf_data0_in = ibuf_buf_byp ? _T_1471 : _T_1512; // @[el2_lsu_bus_buffer.scala 380:26] + wire [63:0] _T_1514 = {store_data_hi_r,32'h0}; // @[Cat.scala 29:58] + wire [63:0] _T_1515 = {32'h0,store_data_hi_r}; // @[Cat.scala 29:58] + wire [63:0] _T_1516 = io_lsu_addr_r[2] ? _T_1514 : _T_1515; // @[el2_lsu_bus_buffer.scala 382:44] + wire [63:0] _T_1543 = {buf_data_0,32'h0}; // @[Cat.scala 29:58] + wire [63:0] _T_1556 = {32'h0,buf_data_0}; // @[Cat.scala 29:58] + wire [63:0] _T_1557 = buf_addr_0[2] ? _T_1543 : _T_1556; // @[el2_lsu_bus_buffer.scala 383:8] + wire [63:0] obuf_data1_in = ibuf_buf_byp ? _T_1516 : _T_1557; // @[el2_lsu_bus_buffer.scala 382:26] + wire _T_1642 = CmdPtr0 != 2'h0; // @[el2_lsu_bus_buffer.scala 389:30] + wire _T_1643 = _T_1642 & found_cmdptr0; // @[el2_lsu_bus_buffer.scala 389:43] + wire _T_1644 = _T_1643 & found_cmdptr1; // @[el2_lsu_bus_buffer.scala 389:59] + wire _T_1658 = _T_1644 & _T_1128; // @[el2_lsu_bus_buffer.scala 389:75] + wire _T_1672 = _T_1658 & _T_2627; // @[el2_lsu_bus_buffer.scala 389:118] + wire _T_1693 = _T_1672 & _T_1149; // @[el2_lsu_bus_buffer.scala 389:161] + wire _T_1711 = _T_1693 & _T_1074; // @[el2_lsu_bus_buffer.scala 390:83] + wire _T_1813 = _T_1225 & _T_1187; // @[el2_lsu_bus_buffer.scala 393:36] + reg buf_dualhi_3; // @[Reg.scala 27:20] + reg buf_dualhi_2; // @[Reg.scala 27:20] + reg buf_dualhi_1; // @[Reg.scala 27:20] + reg buf_dualhi_0; // @[Reg.scala 27:20] + wire [3:0] _T_1816 = {buf_dualhi_3,buf_dualhi_2,buf_dualhi_1,buf_dualhi_0}; // @[Cat.scala 29:58] + wire _T_1825 = _T_1044 & _T_1816[0]; // @[Mux.scala 27:72] + wire _T_1826 = _T_1045 & _T_1816[1]; // @[Mux.scala 27:72] + wire _T_1829 = _T_1825 | _T_1826; // @[Mux.scala 27:72] + wire _T_1827 = _T_1046 & _T_1816[2]; // @[Mux.scala 27:72] + wire _T_1830 = _T_1829 | _T_1827; // @[Mux.scala 27:72] + wire _T_1828 = _T_1047 & _T_1816[3]; // @[Mux.scala 27:72] + wire _T_1831 = _T_1830 | _T_1828; // @[Mux.scala 27:72] + wire _T_1833 = ~_T_1831; // @[el2_lsu_bus_buffer.scala 393:107] + wire _T_1834 = _T_1813 & _T_1833; // @[el2_lsu_bus_buffer.scala 393:105] + wire _T_1854 = _T_1834 & _T_1206; // @[el2_lsu_bus_buffer.scala 393:177] + wire _T_1856 = _T_1711 & _T_1854; // @[el2_lsu_bus_buffer.scala 390:120] + wire _T_1857 = ibuf_buf_byp & ldst_samedw_r; // @[el2_lsu_bus_buffer.scala 394:19] + wire _T_1858 = _T_1857 & io_ldst_dual_r; // @[el2_lsu_bus_buffer.scala 394:35] + wire obuf_merge_en = _T_1856 | _T_1858; // @[el2_lsu_bus_buffer.scala 393:251] + wire _T_1560 = obuf_merge_en & obuf_byteen1_in[0]; // @[el2_lsu_bus_buffer.scala 384:80] + wire _T_1561 = obuf_byteen0_in[0] | _T_1560; // @[el2_lsu_bus_buffer.scala 384:63] + wire _T_1564 = obuf_merge_en & obuf_byteen1_in[1]; // @[el2_lsu_bus_buffer.scala 384:80] + wire _T_1565 = obuf_byteen0_in[1] | _T_1564; // @[el2_lsu_bus_buffer.scala 384:63] + wire _T_1568 = obuf_merge_en & obuf_byteen1_in[2]; // @[el2_lsu_bus_buffer.scala 384:80] + wire _T_1569 = obuf_byteen0_in[2] | _T_1568; // @[el2_lsu_bus_buffer.scala 384:63] + wire _T_1572 = obuf_merge_en & obuf_byteen1_in[3]; // @[el2_lsu_bus_buffer.scala 384:80] + wire _T_1573 = obuf_byteen0_in[3] | _T_1572; // @[el2_lsu_bus_buffer.scala 384:63] + wire _T_1576 = obuf_merge_en & obuf_byteen1_in[4]; // @[el2_lsu_bus_buffer.scala 384:80] + wire _T_1577 = obuf_byteen0_in[4] | _T_1576; // @[el2_lsu_bus_buffer.scala 384:63] + wire _T_1580 = obuf_merge_en & obuf_byteen1_in[5]; // @[el2_lsu_bus_buffer.scala 384:80] + wire _T_1581 = obuf_byteen0_in[5] | _T_1580; // @[el2_lsu_bus_buffer.scala 384:63] + wire _T_1584 = obuf_merge_en & obuf_byteen1_in[6]; // @[el2_lsu_bus_buffer.scala 384:80] + wire _T_1585 = obuf_byteen0_in[6] | _T_1584; // @[el2_lsu_bus_buffer.scala 384:63] + wire _T_1588 = obuf_merge_en & obuf_byteen1_in[7]; // @[el2_lsu_bus_buffer.scala 384:80] + wire _T_1589 = obuf_byteen0_in[7] | _T_1588; // @[el2_lsu_bus_buffer.scala 384:63] + wire [7:0] obuf_byteen_in = {_T_1589,_T_1585,_T_1581,_T_1577,_T_1573,_T_1569,_T_1565,_T_1561}; // @[Cat.scala 29:58] + wire [7:0] _T_1600 = _T_1560 ? obuf_data1_in[7:0] : obuf_data0_in[7:0]; // @[el2_lsu_bus_buffer.scala 385:44] + wire [7:0] _T_1605 = _T_1564 ? obuf_data1_in[15:8] : obuf_data0_in[15:8]; // @[el2_lsu_bus_buffer.scala 385:44] + wire [7:0] _T_1610 = _T_1568 ? obuf_data1_in[23:16] : obuf_data0_in[23:16]; // @[el2_lsu_bus_buffer.scala 385:44] + wire [7:0] _T_1615 = _T_1572 ? obuf_data1_in[31:24] : obuf_data0_in[31:24]; // @[el2_lsu_bus_buffer.scala 385:44] + wire [7:0] _T_1620 = _T_1576 ? obuf_data1_in[39:32] : obuf_data0_in[39:32]; // @[el2_lsu_bus_buffer.scala 385:44] + wire [7:0] _T_1625 = _T_1580 ? obuf_data1_in[47:40] : obuf_data0_in[47:40]; // @[el2_lsu_bus_buffer.scala 385:44] + wire [7:0] _T_1630 = _T_1584 ? obuf_data1_in[55:48] : obuf_data0_in[55:48]; // @[el2_lsu_bus_buffer.scala 385:44] + wire [7:0] _T_1635 = _T_1588 ? obuf_data1_in[63:56] : obuf_data0_in[63:56]; // @[el2_lsu_bus_buffer.scala 385:44] + wire [55:0] _T_1641 = {_T_1635,_T_1630,_T_1625,_T_1620,_T_1615,_T_1610,_T_1605}; // @[Cat.scala 29:58] + wire _T_1860 = obuf_wr_en | obuf_valid; // @[el2_lsu_bus_buffer.scala 397:58] + wire _T_1861 = ~obuf_rst; // @[el2_lsu_bus_buffer.scala 397:93] + reg [1:0] obuf_sz; // @[Reg.scala 27:20] + reg [7:0] obuf_byteen; // @[Reg.scala 27:20] + reg [63:0] obuf_data; // @[el2_lib.scala 512:16] + wire _T_1874 = buf_state_0 == 3'h0; // @[el2_lsu_bus_buffer.scala 415:65] + wire _T_1875 = ibuf_tag == 2'h0; // @[el2_lsu_bus_buffer.scala 416:30] + wire _T_1876 = ibuf_valid & _T_1875; // @[el2_lsu_bus_buffer.scala 416:19] + wire _T_1877 = WrPtr0_r == 2'h0; // @[el2_lsu_bus_buffer.scala 417:18] + wire _T_1878 = WrPtr1_r == 2'h0; // @[el2_lsu_bus_buffer.scala 417:57] + wire _T_1879 = io_ldst_dual_r & _T_1878; // @[el2_lsu_bus_buffer.scala 417:45] + wire _T_1880 = _T_1877 | _T_1879; // @[el2_lsu_bus_buffer.scala 417:27] + wire _T_1881 = io_lsu_busreq_r & _T_1880; // @[el2_lsu_bus_buffer.scala 416:58] + wire _T_1882 = _T_1876 | _T_1881; // @[el2_lsu_bus_buffer.scala 416:39] + wire _T_1883 = ~_T_1882; // @[el2_lsu_bus_buffer.scala 416:5] + wire _T_1884 = _T_1874 & _T_1883; // @[el2_lsu_bus_buffer.scala 415:76] + wire _T_1885 = buf_state_1 == 3'h0; // @[el2_lsu_bus_buffer.scala 415:65] + wire _T_1886 = ibuf_tag == 2'h1; // @[el2_lsu_bus_buffer.scala 416:30] + wire _T_1887 = ibuf_valid & _T_1886; // @[el2_lsu_bus_buffer.scala 416:19] + wire _T_1888 = WrPtr0_r == 2'h1; // @[el2_lsu_bus_buffer.scala 417:18] + wire _T_1889 = WrPtr1_r == 2'h1; // @[el2_lsu_bus_buffer.scala 417:57] + wire _T_1890 = io_ldst_dual_r & _T_1889; // @[el2_lsu_bus_buffer.scala 417:45] + wire _T_1891 = _T_1888 | _T_1890; // @[el2_lsu_bus_buffer.scala 417:27] + wire _T_1892 = io_lsu_busreq_r & _T_1891; // @[el2_lsu_bus_buffer.scala 416:58] + wire _T_1893 = _T_1887 | _T_1892; // @[el2_lsu_bus_buffer.scala 416:39] + wire _T_1894 = ~_T_1893; // @[el2_lsu_bus_buffer.scala 416:5] + wire _T_1895 = _T_1885 & _T_1894; // @[el2_lsu_bus_buffer.scala 415:76] + wire _T_1896 = buf_state_2 == 3'h0; // @[el2_lsu_bus_buffer.scala 415:65] + wire _T_1897 = ibuf_tag == 2'h2; // @[el2_lsu_bus_buffer.scala 416:30] + wire _T_1898 = ibuf_valid & _T_1897; // @[el2_lsu_bus_buffer.scala 416:19] + wire _T_1899 = WrPtr0_r == 2'h2; // @[el2_lsu_bus_buffer.scala 417:18] + wire _T_1900 = WrPtr1_r == 2'h2; // @[el2_lsu_bus_buffer.scala 417:57] + wire _T_1901 = io_ldst_dual_r & _T_1900; // @[el2_lsu_bus_buffer.scala 417:45] + wire _T_1902 = _T_1899 | _T_1901; // @[el2_lsu_bus_buffer.scala 417:27] + wire _T_1903 = io_lsu_busreq_r & _T_1902; // @[el2_lsu_bus_buffer.scala 416:58] + wire _T_1904 = _T_1898 | _T_1903; // @[el2_lsu_bus_buffer.scala 416:39] + wire _T_1905 = ~_T_1904; // @[el2_lsu_bus_buffer.scala 416:5] + wire _T_1906 = _T_1896 & _T_1905; // @[el2_lsu_bus_buffer.scala 415:76] + wire _T_1907 = buf_state_3 == 3'h0; // @[el2_lsu_bus_buffer.scala 415:65] + wire _T_1908 = ibuf_tag == 2'h3; // @[el2_lsu_bus_buffer.scala 416:30] + wire _T_1910 = WrPtr0_r == 2'h3; // @[el2_lsu_bus_buffer.scala 417:18] + wire _T_1911 = WrPtr1_r == 2'h3; // @[el2_lsu_bus_buffer.scala 417:57] + wire [1:0] _T_1919 = _T_1906 ? 2'h2 : 2'h3; // @[Mux.scala 98:16] + wire [1:0] _T_1920 = _T_1895 ? 2'h1 : _T_1919; // @[Mux.scala 98:16] + wire [1:0] WrPtr0_m = _T_1884 ? 2'h0 : _T_1920; // @[Mux.scala 98:16] + wire _T_1925 = WrPtr0_m == 2'h0; // @[el2_lsu_bus_buffer.scala 422:33] + wire _T_1926 = io_lsu_busreq_m & _T_1925; // @[el2_lsu_bus_buffer.scala 422:22] + wire _T_1927 = _T_1876 | _T_1926; // @[el2_lsu_bus_buffer.scala 421:112] + wire _T_1933 = _T_1927 | _T_1881; // @[el2_lsu_bus_buffer.scala 422:42] + wire _T_1934 = ~_T_1933; // @[el2_lsu_bus_buffer.scala 421:78] + wire _T_1935 = _T_1874 & _T_1934; // @[el2_lsu_bus_buffer.scala 421:76] + wire _T_1939 = WrPtr0_m == 2'h1; // @[el2_lsu_bus_buffer.scala 422:33] + wire _T_1940 = io_lsu_busreq_m & _T_1939; // @[el2_lsu_bus_buffer.scala 422:22] + wire _T_1941 = _T_1887 | _T_1940; // @[el2_lsu_bus_buffer.scala 421:112] + wire _T_1947 = _T_1941 | _T_1892; // @[el2_lsu_bus_buffer.scala 422:42] + wire _T_1948 = ~_T_1947; // @[el2_lsu_bus_buffer.scala 421:78] + wire _T_1949 = _T_1885 & _T_1948; // @[el2_lsu_bus_buffer.scala 421:76] + wire _T_1953 = WrPtr0_m == 2'h2; // @[el2_lsu_bus_buffer.scala 422:33] + wire _T_1954 = io_lsu_busreq_m & _T_1953; // @[el2_lsu_bus_buffer.scala 422:22] + wire _T_1955 = _T_1898 | _T_1954; // @[el2_lsu_bus_buffer.scala 421:112] + wire _T_1961 = _T_1955 | _T_1903; // @[el2_lsu_bus_buffer.scala 422:42] + wire _T_1962 = ~_T_1961; // @[el2_lsu_bus_buffer.scala 421:78] + wire _T_1963 = _T_1896 & _T_1962; // @[el2_lsu_bus_buffer.scala 421:76] + reg [3:0] buf_rspageQ_0; // @[el2_lsu_bus_buffer.scala 552:63] + wire _T_2767 = buf_state_3 == 3'h5; // @[el2_lsu_bus_buffer.scala 465:104] + wire _T_2768 = buf_rspageQ_0[3] & _T_2767; // @[el2_lsu_bus_buffer.scala 465:89] + wire _T_2764 = buf_state_2 == 3'h5; // @[el2_lsu_bus_buffer.scala 465:104] + wire _T_2765 = buf_rspageQ_0[2] & _T_2764; // @[el2_lsu_bus_buffer.scala 465:89] + wire _T_2761 = buf_state_1 == 3'h5; // @[el2_lsu_bus_buffer.scala 465:104] + wire _T_2762 = buf_rspageQ_0[1] & _T_2761; // @[el2_lsu_bus_buffer.scala 465:89] + wire _T_2758 = buf_state_0 == 3'h5; // @[el2_lsu_bus_buffer.scala 465:104] + wire _T_2759 = buf_rspageQ_0[0] & _T_2758; // @[el2_lsu_bus_buffer.scala 465:89] + wire [3:0] buf_rsp_pickage_0 = {_T_2768,_T_2765,_T_2762,_T_2759}; // @[Cat.scala 29:58] + wire _T_2054 = |buf_rsp_pickage_0; // @[el2_lsu_bus_buffer.scala 433:65] + wire _T_2055 = ~_T_2054; // @[el2_lsu_bus_buffer.scala 433:44] + wire _T_2057 = _T_2055 & _T_2758; // @[el2_lsu_bus_buffer.scala 433:70] + reg [3:0] buf_rspageQ_1; // @[el2_lsu_bus_buffer.scala 552:63] + wire _T_2783 = buf_rspageQ_1[3] & _T_2767; // @[el2_lsu_bus_buffer.scala 465:89] + wire _T_2780 = buf_rspageQ_1[2] & _T_2764; // @[el2_lsu_bus_buffer.scala 465:89] + wire _T_2777 = buf_rspageQ_1[1] & _T_2761; // @[el2_lsu_bus_buffer.scala 465:89] + wire _T_2774 = buf_rspageQ_1[0] & _T_2758; // @[el2_lsu_bus_buffer.scala 465:89] + wire [3:0] buf_rsp_pickage_1 = {_T_2783,_T_2780,_T_2777,_T_2774}; // @[Cat.scala 29:58] + wire _T_2058 = |buf_rsp_pickage_1; // @[el2_lsu_bus_buffer.scala 433:65] + wire _T_2059 = ~_T_2058; // @[el2_lsu_bus_buffer.scala 433:44] + wire _T_2061 = _T_2059 & _T_2761; // @[el2_lsu_bus_buffer.scala 433:70] + reg [3:0] buf_rspageQ_2; // @[el2_lsu_bus_buffer.scala 552:63] + wire _T_2798 = buf_rspageQ_2[3] & _T_2767; // @[el2_lsu_bus_buffer.scala 465:89] + wire _T_2795 = buf_rspageQ_2[2] & _T_2764; // @[el2_lsu_bus_buffer.scala 465:89] + wire _T_2792 = buf_rspageQ_2[1] & _T_2761; // @[el2_lsu_bus_buffer.scala 465:89] + wire _T_2789 = buf_rspageQ_2[0] & _T_2758; // @[el2_lsu_bus_buffer.scala 465:89] + wire [3:0] buf_rsp_pickage_2 = {_T_2798,_T_2795,_T_2792,_T_2789}; // @[Cat.scala 29:58] + wire _T_2062 = |buf_rsp_pickage_2; // @[el2_lsu_bus_buffer.scala 433:65] + wire _T_2063 = ~_T_2062; // @[el2_lsu_bus_buffer.scala 433:44] + wire _T_2065 = _T_2063 & _T_2764; // @[el2_lsu_bus_buffer.scala 433:70] + reg [3:0] buf_rspageQ_3; // @[el2_lsu_bus_buffer.scala 552:63] + wire _T_2813 = buf_rspageQ_3[3] & _T_2767; // @[el2_lsu_bus_buffer.scala 465:89] + wire _T_2810 = buf_rspageQ_3[2] & _T_2764; // @[el2_lsu_bus_buffer.scala 465:89] + wire _T_2807 = buf_rspageQ_3[1] & _T_2761; // @[el2_lsu_bus_buffer.scala 465:89] + wire _T_2804 = buf_rspageQ_3[0] & _T_2758; // @[el2_lsu_bus_buffer.scala 465:89] + wire [3:0] buf_rsp_pickage_3 = {_T_2813,_T_2810,_T_2807,_T_2804}; // @[Cat.scala 29:58] + wire _T_2066 = |buf_rsp_pickage_3; // @[el2_lsu_bus_buffer.scala 433:65] + wire _T_2067 = ~_T_2066; // @[el2_lsu_bus_buffer.scala 433:44] + wire _T_2069 = _T_2067 & _T_2767; // @[el2_lsu_bus_buffer.scala 433:70] + wire [7:0] _T_2125 = {4'h0,_T_2069,_T_2065,_T_2061,_T_2057}; // @[Cat.scala 29:58] + wire _T_2128 = _T_2125[4] | _T_2125[5]; // @[el2_lsu_bus_buffer.scala 437:42] + wire _T_2130 = _T_2128 | _T_2125[6]; // @[el2_lsu_bus_buffer.scala 437:48] + wire _T_2132 = _T_2130 | _T_2125[7]; // @[el2_lsu_bus_buffer.scala 437:54] + wire _T_2135 = _T_2125[2] | _T_2125[3]; // @[el2_lsu_bus_buffer.scala 437:67] + wire _T_2137 = _T_2135 | _T_2125[6]; // @[el2_lsu_bus_buffer.scala 437:73] + wire _T_2139 = _T_2137 | _T_2125[7]; // @[el2_lsu_bus_buffer.scala 437:79] + wire _T_2142 = _T_2125[1] | _T_2125[3]; // @[el2_lsu_bus_buffer.scala 437:92] + wire _T_2144 = _T_2142 | _T_2125[5]; // @[el2_lsu_bus_buffer.scala 437:98] + wire _T_2146 = _T_2144 | _T_2125[7]; // @[el2_lsu_bus_buffer.scala 437:104] + wire [2:0] _T_2148 = {_T_2132,_T_2139,_T_2146}; // @[Cat.scala 29:58] + wire _T_3553 = ibuf_byp | io_ldst_dual_r; // @[el2_lsu_bus_buffer.scala 495:77] + wire _T_3554 = ~ibuf_merge_en; // @[el2_lsu_bus_buffer.scala 495:97] + wire _T_3555 = _T_3553 & _T_3554; // @[el2_lsu_bus_buffer.scala 495:95] + wire _T_3556 = 2'h0 == WrPtr0_r; // @[el2_lsu_bus_buffer.scala 495:117] + wire _T_3557 = _T_3555 & _T_3556; // @[el2_lsu_bus_buffer.scala 495:112] + wire _T_3558 = ibuf_byp & io_ldst_dual_r; // @[el2_lsu_bus_buffer.scala 495:144] + wire _T_3559 = 2'h0 == WrPtr1_r; // @[el2_lsu_bus_buffer.scala 495:166] + wire _T_3560 = _T_3558 & _T_3559; // @[el2_lsu_bus_buffer.scala 495:161] + wire _T_3561 = _T_3557 | _T_3560; // @[el2_lsu_bus_buffer.scala 495:132] + wire _T_3562 = _T_853 & _T_3561; // @[el2_lsu_bus_buffer.scala 495:63] + wire _T_3563 = 2'h0 == ibuf_tag; // @[el2_lsu_bus_buffer.scala 495:206] + wire _T_3564 = ibuf_drain_vld & _T_3563; // @[el2_lsu_bus_buffer.scala 495:201] + wire _T_3565 = _T_3562 | _T_3564; // @[el2_lsu_bus_buffer.scala 495:183] + wire _T_3575 = io_lsu_bus_clk_en | io_dec_tlu_force_halt; // @[el2_lsu_bus_buffer.scala 502:46] + wire _T_3610 = 3'h3 == buf_state_0; // @[Conditional.scala 37:30] + wire bus_rsp_write = io_lsu_axi_bvalid & io_lsu_axi_bready; // @[el2_lsu_bus_buffer.scala 612:38] + wire _T_3655 = io_lsu_axi_bid == 3'h0; // @[el2_lsu_bus_buffer.scala 520:73] + wire _T_3656 = bus_rsp_write & _T_3655; // @[el2_lsu_bus_buffer.scala 520:52] + wire _T_3657 = io_lsu_axi_rid == 3'h0; // @[el2_lsu_bus_buffer.scala 521:46] + reg _T_4328; // @[Reg.scala 27:20] + reg _T_4326; // @[Reg.scala 27:20] + reg _T_4324; // @[Reg.scala 27:20] + reg _T_4322; // @[Reg.scala 27:20] + wire [3:0] buf_ldfwd = {_T_4328,_T_4326,_T_4324,_T_4322}; // @[Cat.scala 29:58] + reg [1:0] buf_ldfwdtag_0; // @[Reg.scala 27:20] + wire [2:0] _GEN_360 = {{1'd0}, buf_ldfwdtag_0}; // @[el2_lsu_bus_buffer.scala 522:47] + wire _T_3659 = io_lsu_axi_rid == _GEN_360; // @[el2_lsu_bus_buffer.scala 522:47] + wire _T_3660 = buf_ldfwd[0] & _T_3659; // @[el2_lsu_bus_buffer.scala 522:27] + wire _T_3661 = _T_3657 | _T_3660; // @[el2_lsu_bus_buffer.scala 521:77] + wire _T_3662 = buf_dual_0 & buf_dualhi_0; // @[el2_lsu_bus_buffer.scala 523:26] + wire _T_3664 = ~buf_write[0]; // @[el2_lsu_bus_buffer.scala 523:44] + wire _T_3665 = _T_3662 & _T_3664; // @[el2_lsu_bus_buffer.scala 523:42] + wire _T_3666 = _T_3665 & buf_samedw_0; // @[el2_lsu_bus_buffer.scala 523:58] + reg [1:0] buf_dualtag_0; // @[Reg.scala 27:20] + wire [2:0] _GEN_361 = {{1'd0}, buf_dualtag_0}; // @[el2_lsu_bus_buffer.scala 523:94] + wire _T_3667 = io_lsu_axi_rid == _GEN_361; // @[el2_lsu_bus_buffer.scala 523:94] + wire _T_3668 = _T_3666 & _T_3667; // @[el2_lsu_bus_buffer.scala 523:74] + wire _T_3669 = _T_3661 | _T_3668; // @[el2_lsu_bus_buffer.scala 522:71] + wire _T_3670 = bus_rsp_read & _T_3669; // @[el2_lsu_bus_buffer.scala 521:25] + wire _T_3671 = _T_3656 | _T_3670; // @[el2_lsu_bus_buffer.scala 520:105] + wire _GEN_42 = _T_3610 & _T_3671; // @[Conditional.scala 39:67] + wire _GEN_61 = _T_3576 ? 1'h0 : _GEN_42; // @[Conditional.scala 39:67] + wire _GEN_73 = _T_3572 ? 1'h0 : _GEN_61; // @[Conditional.scala 39:67] + wire buf_resp_state_bus_en_0 = _T_3549 ? 1'h0 : _GEN_73; // @[Conditional.scala 40:58] + wire _T_3697 = 3'h4 == buf_state_0; // @[Conditional.scala 37:30] + wire [3:0] _T_3707 = buf_ldfwd >> buf_dualtag_0; // @[el2_lsu_bus_buffer.scala 535:21] + reg [1:0] buf_ldfwdtag_3; // @[Reg.scala 27:20] + reg [1:0] buf_ldfwdtag_2; // @[Reg.scala 27:20] + reg [1:0] buf_ldfwdtag_1; // @[Reg.scala 27:20] + wire [1:0] _GEN_23 = 2'h1 == buf_dualtag_0 ? buf_ldfwdtag_1 : buf_ldfwdtag_0; // @[el2_lsu_bus_buffer.scala 535:58] + wire [1:0] _GEN_24 = 2'h2 == buf_dualtag_0 ? buf_ldfwdtag_2 : _GEN_23; // @[el2_lsu_bus_buffer.scala 535:58] + wire [1:0] _GEN_25 = 2'h3 == buf_dualtag_0 ? buf_ldfwdtag_3 : _GEN_24; // @[el2_lsu_bus_buffer.scala 535:58] + wire [2:0] _GEN_363 = {{1'd0}, _GEN_25}; // @[el2_lsu_bus_buffer.scala 535:58] + wire _T_3709 = io_lsu_axi_rid == _GEN_363; // @[el2_lsu_bus_buffer.scala 535:58] + wire _T_3710 = _T_3707[0] & _T_3709; // @[el2_lsu_bus_buffer.scala 535:38] + wire _T_3711 = _T_3667 | _T_3710; // @[el2_lsu_bus_buffer.scala 534:95] + wire _T_3712 = bus_rsp_read & _T_3711; // @[el2_lsu_bus_buffer.scala 534:45] + wire _GEN_36 = _T_3697 & _T_3712; // @[Conditional.scala 39:67] + wire _GEN_43 = _T_3610 ? buf_resp_state_bus_en_0 : _GEN_36; // @[Conditional.scala 39:67] + wire _GEN_53 = _T_3576 ? buf_cmd_state_bus_en_0 : _GEN_43; // @[Conditional.scala 39:67] + wire _GEN_66 = _T_3572 ? 1'h0 : _GEN_53; // @[Conditional.scala 39:67] + wire buf_state_bus_en_0 = _T_3549 ? 1'h0 : _GEN_66; // @[Conditional.scala 40:58] + wire _T_3589 = buf_state_bus_en_0 & io_lsu_bus_clk_en; // @[el2_lsu_bus_buffer.scala 508:49] + wire _T_3590 = _T_3589 | io_dec_tlu_force_halt; // @[el2_lsu_bus_buffer.scala 508:70] + wire _T_3715 = 3'h5 == buf_state_0; // @[Conditional.scala 37:30] + wire [1:0] RspPtr = _T_2148[1:0]; // @[el2_lsu_bus_buffer.scala 445:10] + wire _T_3718 = RspPtr == 2'h0; // @[el2_lsu_bus_buffer.scala 540:37] + wire _T_3719 = buf_dualtag_0 == RspPtr; // @[el2_lsu_bus_buffer.scala 540:98] + wire _T_3720 = buf_dual_0 & _T_3719; // @[el2_lsu_bus_buffer.scala 540:80] + wire _T_3721 = _T_3718 | _T_3720; // @[el2_lsu_bus_buffer.scala 540:65] + wire _T_3722 = _T_3721 | io_dec_tlu_force_halt; // @[el2_lsu_bus_buffer.scala 540:112] + wire _T_3723 = 3'h6 == buf_state_0; // @[Conditional.scala 37:30] + wire _GEN_31 = _T_3715 ? _T_3722 : _T_3723; // @[Conditional.scala 39:67] + wire _GEN_37 = _T_3697 ? _T_3590 : _GEN_31; // @[Conditional.scala 39:67] + wire _GEN_44 = _T_3610 ? _T_3590 : _GEN_37; // @[Conditional.scala 39:67] + wire _GEN_54 = _T_3576 ? _T_3590 : _GEN_44; // @[Conditional.scala 39:67] + wire _GEN_64 = _T_3572 ? _T_3575 : _GEN_54; // @[Conditional.scala 39:67] + wire buf_state_en_0 = _T_3549 ? _T_3565 : _GEN_64; // @[Conditional.scala 40:58] + wire _T_2150 = _T_1874 & buf_state_en_0; // @[el2_lsu_bus_buffer.scala 457:94] + wire _T_2156 = ibuf_drain_vld & io_lsu_busreq_r; // @[el2_lsu_bus_buffer.scala 459:23] + wire _T_2158 = _T_2156 & _T_3553; // @[el2_lsu_bus_buffer.scala 459:41] + wire _T_2160 = _T_2158 & _T_1877; // @[el2_lsu_bus_buffer.scala 459:71] + wire _T_2162 = _T_2160 & _T_1875; // @[el2_lsu_bus_buffer.scala 459:92] + wire _T_2163 = _T_4492 | _T_2162; // @[el2_lsu_bus_buffer.scala 458:86] + wire _T_2164 = ibuf_byp & io_lsu_busreq_r; // @[el2_lsu_bus_buffer.scala 460:17] + wire _T_2165 = _T_2164 & io_ldst_dual_r; // @[el2_lsu_bus_buffer.scala 460:35] + wire _T_2167 = _T_2165 & _T_1878; // @[el2_lsu_bus_buffer.scala 460:52] + wire _T_2169 = _T_2167 & _T_1877; // @[el2_lsu_bus_buffer.scala 460:73] + wire _T_2170 = _T_2163 | _T_2169; // @[el2_lsu_bus_buffer.scala 459:114] + wire _T_2171 = _T_2150 & _T_2170; // @[el2_lsu_bus_buffer.scala 457:113] + wire _T_2173 = _T_2171 | buf_age_0[0]; // @[el2_lsu_bus_buffer.scala 460:97] + wire _T_2187 = _T_2160 & _T_1886; // @[el2_lsu_bus_buffer.scala 459:92] + wire _T_2188 = _T_4497 | _T_2187; // @[el2_lsu_bus_buffer.scala 458:86] + wire _T_2194 = _T_2167 & _T_1888; // @[el2_lsu_bus_buffer.scala 460:73] + wire _T_2195 = _T_2188 | _T_2194; // @[el2_lsu_bus_buffer.scala 459:114] + wire _T_2196 = _T_2150 & _T_2195; // @[el2_lsu_bus_buffer.scala 457:113] + wire _T_2198 = _T_2196 | buf_age_0[1]; // @[el2_lsu_bus_buffer.scala 460:97] + wire _T_2212 = _T_2160 & _T_1897; // @[el2_lsu_bus_buffer.scala 459:92] + wire _T_2213 = _T_4502 | _T_2212; // @[el2_lsu_bus_buffer.scala 458:86] + wire _T_2219 = _T_2167 & _T_1899; // @[el2_lsu_bus_buffer.scala 460:73] + wire _T_2220 = _T_2213 | _T_2219; // @[el2_lsu_bus_buffer.scala 459:114] + wire _T_2221 = _T_2150 & _T_2220; // @[el2_lsu_bus_buffer.scala 457:113] + wire _T_2223 = _T_2221 | buf_age_0[2]; // @[el2_lsu_bus_buffer.scala 460:97] + wire _T_2237 = _T_2160 & _T_1908; // @[el2_lsu_bus_buffer.scala 459:92] + wire _T_2238 = _T_4507 | _T_2237; // @[el2_lsu_bus_buffer.scala 458:86] + wire _T_2244 = _T_2167 & _T_1910; // @[el2_lsu_bus_buffer.scala 460:73] + wire _T_2245 = _T_2238 | _T_2244; // @[el2_lsu_bus_buffer.scala 459:114] + wire _T_2246 = _T_2150 & _T_2245; // @[el2_lsu_bus_buffer.scala 457:113] + wire _T_2248 = _T_2246 | buf_age_0[3]; // @[el2_lsu_bus_buffer.scala 460:97] + wire [2:0] _T_2250 = {_T_2248,_T_2223,_T_2198}; // @[Cat.scala 29:58] + wire _T_3749 = 2'h1 == WrPtr0_r; // @[el2_lsu_bus_buffer.scala 495:117] + wire _T_3750 = _T_3555 & _T_3749; // @[el2_lsu_bus_buffer.scala 495:112] + wire _T_3752 = 2'h1 == WrPtr1_r; // @[el2_lsu_bus_buffer.scala 495:166] + wire _T_3753 = _T_3558 & _T_3752; // @[el2_lsu_bus_buffer.scala 495:161] + wire _T_3754 = _T_3750 | _T_3753; // @[el2_lsu_bus_buffer.scala 495:132] + wire _T_3755 = _T_853 & _T_3754; // @[el2_lsu_bus_buffer.scala 495:63] + wire _T_3756 = 2'h1 == ibuf_tag; // @[el2_lsu_bus_buffer.scala 495:206] + wire _T_3757 = ibuf_drain_vld & _T_3756; // @[el2_lsu_bus_buffer.scala 495:201] + wire _T_3758 = _T_3755 | _T_3757; // @[el2_lsu_bus_buffer.scala 495:183] + wire _T_3803 = 3'h3 == buf_state_1; // @[Conditional.scala 37:30] + wire _T_3848 = io_lsu_axi_bid == 3'h1; // @[el2_lsu_bus_buffer.scala 520:73] + wire _T_3849 = bus_rsp_write & _T_3848; // @[el2_lsu_bus_buffer.scala 520:52] + wire _T_3850 = io_lsu_axi_rid == 3'h1; // @[el2_lsu_bus_buffer.scala 521:46] + wire [2:0] _GEN_364 = {{1'd0}, buf_ldfwdtag_1}; // @[el2_lsu_bus_buffer.scala 522:47] + wire _T_3852 = io_lsu_axi_rid == _GEN_364; // @[el2_lsu_bus_buffer.scala 522:47] + wire _T_3853 = buf_ldfwd[1] & _T_3852; // @[el2_lsu_bus_buffer.scala 522:27] + wire _T_3854 = _T_3850 | _T_3853; // @[el2_lsu_bus_buffer.scala 521:77] + wire _T_3855 = buf_dual_1 & buf_dualhi_1; // @[el2_lsu_bus_buffer.scala 523:26] + wire _T_3857 = ~buf_write[1]; // @[el2_lsu_bus_buffer.scala 523:44] + wire _T_3858 = _T_3855 & _T_3857; // @[el2_lsu_bus_buffer.scala 523:42] + wire _T_3859 = _T_3858 & buf_samedw_1; // @[el2_lsu_bus_buffer.scala 523:58] + reg [1:0] buf_dualtag_1; // @[Reg.scala 27:20] + wire [2:0] _GEN_365 = {{1'd0}, buf_dualtag_1}; // @[el2_lsu_bus_buffer.scala 523:94] + wire _T_3860 = io_lsu_axi_rid == _GEN_365; // @[el2_lsu_bus_buffer.scala 523:94] + wire _T_3861 = _T_3859 & _T_3860; // @[el2_lsu_bus_buffer.scala 523:74] + wire _T_3862 = _T_3854 | _T_3861; // @[el2_lsu_bus_buffer.scala 522:71] + wire _T_3863 = bus_rsp_read & _T_3862; // @[el2_lsu_bus_buffer.scala 521:25] + wire _T_3864 = _T_3849 | _T_3863; // @[el2_lsu_bus_buffer.scala 520:105] + wire _GEN_118 = _T_3803 & _T_3864; // @[Conditional.scala 39:67] + wire _GEN_137 = _T_3769 ? 1'h0 : _GEN_118; // @[Conditional.scala 39:67] + wire _GEN_149 = _T_3765 ? 1'h0 : _GEN_137; // @[Conditional.scala 39:67] + wire buf_resp_state_bus_en_1 = _T_3742 ? 1'h0 : _GEN_149; // @[Conditional.scala 40:58] + wire _T_3890 = 3'h4 == buf_state_1; // @[Conditional.scala 37:30] + wire [3:0] _T_3900 = buf_ldfwd >> buf_dualtag_1; // @[el2_lsu_bus_buffer.scala 535:21] + wire [1:0] _GEN_99 = 2'h1 == buf_dualtag_1 ? buf_ldfwdtag_1 : buf_ldfwdtag_0; // @[el2_lsu_bus_buffer.scala 535:58] + wire [1:0] _GEN_100 = 2'h2 == buf_dualtag_1 ? buf_ldfwdtag_2 : _GEN_99; // @[el2_lsu_bus_buffer.scala 535:58] + wire [1:0] _GEN_101 = 2'h3 == buf_dualtag_1 ? buf_ldfwdtag_3 : _GEN_100; // @[el2_lsu_bus_buffer.scala 535:58] + wire [2:0] _GEN_367 = {{1'd0}, _GEN_101}; // @[el2_lsu_bus_buffer.scala 535:58] + wire _T_3902 = io_lsu_axi_rid == _GEN_367; // @[el2_lsu_bus_buffer.scala 535:58] + wire _T_3903 = _T_3900[0] & _T_3902; // @[el2_lsu_bus_buffer.scala 535:38] + wire _T_3904 = _T_3860 | _T_3903; // @[el2_lsu_bus_buffer.scala 534:95] + wire _T_3905 = bus_rsp_read & _T_3904; // @[el2_lsu_bus_buffer.scala 534:45] + wire _GEN_112 = _T_3890 & _T_3905; // @[Conditional.scala 39:67] + wire _GEN_119 = _T_3803 ? buf_resp_state_bus_en_1 : _GEN_112; // @[Conditional.scala 39:67] + wire _GEN_129 = _T_3769 ? buf_cmd_state_bus_en_1 : _GEN_119; // @[Conditional.scala 39:67] + wire _GEN_142 = _T_3765 ? 1'h0 : _GEN_129; // @[Conditional.scala 39:67] + wire buf_state_bus_en_1 = _T_3742 ? 1'h0 : _GEN_142; // @[Conditional.scala 40:58] + wire _T_3782 = buf_state_bus_en_1 & io_lsu_bus_clk_en; // @[el2_lsu_bus_buffer.scala 508:49] + wire _T_3783 = _T_3782 | io_dec_tlu_force_halt; // @[el2_lsu_bus_buffer.scala 508:70] + wire _T_3908 = 3'h5 == buf_state_1; // @[Conditional.scala 37:30] + wire _T_3911 = RspPtr == 2'h1; // @[el2_lsu_bus_buffer.scala 540:37] + wire _T_3912 = buf_dualtag_1 == RspPtr; // @[el2_lsu_bus_buffer.scala 540:98] + wire _T_3913 = buf_dual_1 & _T_3912; // @[el2_lsu_bus_buffer.scala 540:80] + wire _T_3914 = _T_3911 | _T_3913; // @[el2_lsu_bus_buffer.scala 540:65] + wire _T_3915 = _T_3914 | io_dec_tlu_force_halt; // @[el2_lsu_bus_buffer.scala 540:112] + wire _T_3916 = 3'h6 == buf_state_1; // @[Conditional.scala 37:30] + wire _GEN_107 = _T_3908 ? _T_3915 : _T_3916; // @[Conditional.scala 39:67] + wire _GEN_113 = _T_3890 ? _T_3783 : _GEN_107; // @[Conditional.scala 39:67] + wire _GEN_120 = _T_3803 ? _T_3783 : _GEN_113; // @[Conditional.scala 39:67] + wire _GEN_130 = _T_3769 ? _T_3783 : _GEN_120; // @[Conditional.scala 39:67] + wire _GEN_140 = _T_3765 ? _T_3575 : _GEN_130; // @[Conditional.scala 39:67] + wire buf_state_en_1 = _T_3742 ? _T_3758 : _GEN_140; // @[Conditional.scala 40:58] + wire _T_2252 = _T_1885 & buf_state_en_1; // @[el2_lsu_bus_buffer.scala 457:94] + wire _T_2262 = _T_2158 & _T_1888; // @[el2_lsu_bus_buffer.scala 459:71] + wire _T_2264 = _T_2262 & _T_1875; // @[el2_lsu_bus_buffer.scala 459:92] + wire _T_2265 = _T_4492 | _T_2264; // @[el2_lsu_bus_buffer.scala 458:86] + wire _T_2269 = _T_2165 & _T_1889; // @[el2_lsu_bus_buffer.scala 460:52] + wire _T_2271 = _T_2269 & _T_1877; // @[el2_lsu_bus_buffer.scala 460:73] + wire _T_2272 = _T_2265 | _T_2271; // @[el2_lsu_bus_buffer.scala 459:114] + wire _T_2273 = _T_2252 & _T_2272; // @[el2_lsu_bus_buffer.scala 457:113] + wire _T_2275 = _T_2273 | buf_age_1[0]; // @[el2_lsu_bus_buffer.scala 460:97] + wire _T_2289 = _T_2262 & _T_1886; // @[el2_lsu_bus_buffer.scala 459:92] + wire _T_2290 = _T_4497 | _T_2289; // @[el2_lsu_bus_buffer.scala 458:86] + wire _T_2296 = _T_2269 & _T_1888; // @[el2_lsu_bus_buffer.scala 460:73] + wire _T_2297 = _T_2290 | _T_2296; // @[el2_lsu_bus_buffer.scala 459:114] + wire _T_2298 = _T_2252 & _T_2297; // @[el2_lsu_bus_buffer.scala 457:113] + wire _T_2300 = _T_2298 | buf_age_1[1]; // @[el2_lsu_bus_buffer.scala 460:97] + wire _T_2314 = _T_2262 & _T_1897; // @[el2_lsu_bus_buffer.scala 459:92] + wire _T_2315 = _T_4502 | _T_2314; // @[el2_lsu_bus_buffer.scala 458:86] + wire _T_2321 = _T_2269 & _T_1899; // @[el2_lsu_bus_buffer.scala 460:73] + wire _T_2322 = _T_2315 | _T_2321; // @[el2_lsu_bus_buffer.scala 459:114] + wire _T_2323 = _T_2252 & _T_2322; // @[el2_lsu_bus_buffer.scala 457:113] + wire _T_2325 = _T_2323 | buf_age_1[2]; // @[el2_lsu_bus_buffer.scala 460:97] + wire _T_2339 = _T_2262 & _T_1908; // @[el2_lsu_bus_buffer.scala 459:92] + wire _T_2340 = _T_4507 | _T_2339; // @[el2_lsu_bus_buffer.scala 458:86] + wire _T_2346 = _T_2269 & _T_1910; // @[el2_lsu_bus_buffer.scala 460:73] + wire _T_2347 = _T_2340 | _T_2346; // @[el2_lsu_bus_buffer.scala 459:114] + wire _T_2348 = _T_2252 & _T_2347; // @[el2_lsu_bus_buffer.scala 457:113] + wire _T_2350 = _T_2348 | buf_age_1[3]; // @[el2_lsu_bus_buffer.scala 460:97] + wire [2:0] _T_2352 = {_T_2350,_T_2325,_T_2300}; // @[Cat.scala 29:58] + wire _T_3942 = 2'h2 == WrPtr0_r; // @[el2_lsu_bus_buffer.scala 495:117] + wire _T_3943 = _T_3555 & _T_3942; // @[el2_lsu_bus_buffer.scala 495:112] + wire _T_3945 = 2'h2 == WrPtr1_r; // @[el2_lsu_bus_buffer.scala 495:166] + wire _T_3946 = _T_3558 & _T_3945; // @[el2_lsu_bus_buffer.scala 495:161] + wire _T_3947 = _T_3943 | _T_3946; // @[el2_lsu_bus_buffer.scala 495:132] + wire _T_3948 = _T_853 & _T_3947; // @[el2_lsu_bus_buffer.scala 495:63] + wire _T_3949 = 2'h2 == ibuf_tag; // @[el2_lsu_bus_buffer.scala 495:206] + wire _T_3950 = ibuf_drain_vld & _T_3949; // @[el2_lsu_bus_buffer.scala 495:201] + wire _T_3951 = _T_3948 | _T_3950; // @[el2_lsu_bus_buffer.scala 495:183] + wire _T_3996 = 3'h3 == buf_state_2; // @[Conditional.scala 37:30] + wire _T_4041 = io_lsu_axi_bid == 3'h2; // @[el2_lsu_bus_buffer.scala 520:73] + wire _T_4042 = bus_rsp_write & _T_4041; // @[el2_lsu_bus_buffer.scala 520:52] + wire _T_4043 = io_lsu_axi_rid == 3'h2; // @[el2_lsu_bus_buffer.scala 521:46] + wire [2:0] _GEN_368 = {{1'd0}, buf_ldfwdtag_2}; // @[el2_lsu_bus_buffer.scala 522:47] + wire _T_4045 = io_lsu_axi_rid == _GEN_368; // @[el2_lsu_bus_buffer.scala 522:47] + wire _T_4046 = buf_ldfwd[2] & _T_4045; // @[el2_lsu_bus_buffer.scala 522:27] + wire _T_4047 = _T_4043 | _T_4046; // @[el2_lsu_bus_buffer.scala 521:77] + wire _T_4048 = buf_dual_2 & buf_dualhi_2; // @[el2_lsu_bus_buffer.scala 523:26] + wire _T_4050 = ~buf_write[2]; // @[el2_lsu_bus_buffer.scala 523:44] + wire _T_4051 = _T_4048 & _T_4050; // @[el2_lsu_bus_buffer.scala 523:42] + wire _T_4052 = _T_4051 & buf_samedw_2; // @[el2_lsu_bus_buffer.scala 523:58] + reg [1:0] buf_dualtag_2; // @[Reg.scala 27:20] + wire [2:0] _GEN_369 = {{1'd0}, buf_dualtag_2}; // @[el2_lsu_bus_buffer.scala 523:94] + wire _T_4053 = io_lsu_axi_rid == _GEN_369; // @[el2_lsu_bus_buffer.scala 523:94] + wire _T_4054 = _T_4052 & _T_4053; // @[el2_lsu_bus_buffer.scala 523:74] + wire _T_4055 = _T_4047 | _T_4054; // @[el2_lsu_bus_buffer.scala 522:71] + wire _T_4056 = bus_rsp_read & _T_4055; // @[el2_lsu_bus_buffer.scala 521:25] + wire _T_4057 = _T_4042 | _T_4056; // @[el2_lsu_bus_buffer.scala 520:105] + wire _GEN_194 = _T_3996 & _T_4057; // @[Conditional.scala 39:67] + wire _GEN_213 = _T_3962 ? 1'h0 : _GEN_194; // @[Conditional.scala 39:67] + wire _GEN_225 = _T_3958 ? 1'h0 : _GEN_213; // @[Conditional.scala 39:67] + wire buf_resp_state_bus_en_2 = _T_3935 ? 1'h0 : _GEN_225; // @[Conditional.scala 40:58] + wire _T_4083 = 3'h4 == buf_state_2; // @[Conditional.scala 37:30] + wire [3:0] _T_4093 = buf_ldfwd >> buf_dualtag_2; // @[el2_lsu_bus_buffer.scala 535:21] + wire [1:0] _GEN_175 = 2'h1 == buf_dualtag_2 ? buf_ldfwdtag_1 : buf_ldfwdtag_0; // @[el2_lsu_bus_buffer.scala 535:58] + wire [1:0] _GEN_176 = 2'h2 == buf_dualtag_2 ? buf_ldfwdtag_2 : _GEN_175; // @[el2_lsu_bus_buffer.scala 535:58] + wire [1:0] _GEN_177 = 2'h3 == buf_dualtag_2 ? buf_ldfwdtag_3 : _GEN_176; // @[el2_lsu_bus_buffer.scala 535:58] + wire [2:0] _GEN_371 = {{1'd0}, _GEN_177}; // @[el2_lsu_bus_buffer.scala 535:58] + wire _T_4095 = io_lsu_axi_rid == _GEN_371; // @[el2_lsu_bus_buffer.scala 535:58] + wire _T_4096 = _T_4093[0] & _T_4095; // @[el2_lsu_bus_buffer.scala 535:38] + wire _T_4097 = _T_4053 | _T_4096; // @[el2_lsu_bus_buffer.scala 534:95] + wire _T_4098 = bus_rsp_read & _T_4097; // @[el2_lsu_bus_buffer.scala 534:45] + wire _GEN_188 = _T_4083 & _T_4098; // @[Conditional.scala 39:67] + wire _GEN_195 = _T_3996 ? buf_resp_state_bus_en_2 : _GEN_188; // @[Conditional.scala 39:67] + wire _GEN_205 = _T_3962 ? buf_cmd_state_bus_en_2 : _GEN_195; // @[Conditional.scala 39:67] + wire _GEN_218 = _T_3958 ? 1'h0 : _GEN_205; // @[Conditional.scala 39:67] + wire buf_state_bus_en_2 = _T_3935 ? 1'h0 : _GEN_218; // @[Conditional.scala 40:58] + wire _T_3975 = buf_state_bus_en_2 & io_lsu_bus_clk_en; // @[el2_lsu_bus_buffer.scala 508:49] + wire _T_3976 = _T_3975 | io_dec_tlu_force_halt; // @[el2_lsu_bus_buffer.scala 508:70] + wire _T_4101 = 3'h5 == buf_state_2; // @[Conditional.scala 37:30] + wire _T_4104 = RspPtr == 2'h2; // @[el2_lsu_bus_buffer.scala 540:37] + wire _T_4105 = buf_dualtag_2 == RspPtr; // @[el2_lsu_bus_buffer.scala 540:98] + wire _T_4106 = buf_dual_2 & _T_4105; // @[el2_lsu_bus_buffer.scala 540:80] + wire _T_4107 = _T_4104 | _T_4106; // @[el2_lsu_bus_buffer.scala 540:65] + wire _T_4108 = _T_4107 | io_dec_tlu_force_halt; // @[el2_lsu_bus_buffer.scala 540:112] + wire _T_4109 = 3'h6 == buf_state_2; // @[Conditional.scala 37:30] + wire _GEN_183 = _T_4101 ? _T_4108 : _T_4109; // @[Conditional.scala 39:67] + wire _GEN_189 = _T_4083 ? _T_3976 : _GEN_183; // @[Conditional.scala 39:67] + wire _GEN_196 = _T_3996 ? _T_3976 : _GEN_189; // @[Conditional.scala 39:67] + wire _GEN_206 = _T_3962 ? _T_3976 : _GEN_196; // @[Conditional.scala 39:67] + wire _GEN_216 = _T_3958 ? _T_3575 : _GEN_206; // @[Conditional.scala 39:67] + wire buf_state_en_2 = _T_3935 ? _T_3951 : _GEN_216; // @[Conditional.scala 40:58] + wire _T_2354 = _T_1896 & buf_state_en_2; // @[el2_lsu_bus_buffer.scala 457:94] + wire _T_2364 = _T_2158 & _T_1899; // @[el2_lsu_bus_buffer.scala 459:71] + wire _T_2366 = _T_2364 & _T_1875; // @[el2_lsu_bus_buffer.scala 459:92] + wire _T_2367 = _T_4492 | _T_2366; // @[el2_lsu_bus_buffer.scala 458:86] + wire _T_2371 = _T_2165 & _T_1900; // @[el2_lsu_bus_buffer.scala 460:52] + wire _T_2373 = _T_2371 & _T_1877; // @[el2_lsu_bus_buffer.scala 460:73] + wire _T_2374 = _T_2367 | _T_2373; // @[el2_lsu_bus_buffer.scala 459:114] + wire _T_2375 = _T_2354 & _T_2374; // @[el2_lsu_bus_buffer.scala 457:113] + wire _T_2377 = _T_2375 | buf_age_2[0]; // @[el2_lsu_bus_buffer.scala 460:97] + wire _T_2391 = _T_2364 & _T_1886; // @[el2_lsu_bus_buffer.scala 459:92] + wire _T_2392 = _T_4497 | _T_2391; // @[el2_lsu_bus_buffer.scala 458:86] + wire _T_2398 = _T_2371 & _T_1888; // @[el2_lsu_bus_buffer.scala 460:73] + wire _T_2399 = _T_2392 | _T_2398; // @[el2_lsu_bus_buffer.scala 459:114] + wire _T_2400 = _T_2354 & _T_2399; // @[el2_lsu_bus_buffer.scala 457:113] + wire _T_2402 = _T_2400 | buf_age_2[1]; // @[el2_lsu_bus_buffer.scala 460:97] + wire _T_2416 = _T_2364 & _T_1897; // @[el2_lsu_bus_buffer.scala 459:92] + wire _T_2417 = _T_4502 | _T_2416; // @[el2_lsu_bus_buffer.scala 458:86] + wire _T_2423 = _T_2371 & _T_1899; // @[el2_lsu_bus_buffer.scala 460:73] + wire _T_2424 = _T_2417 | _T_2423; // @[el2_lsu_bus_buffer.scala 459:114] + wire _T_2425 = _T_2354 & _T_2424; // @[el2_lsu_bus_buffer.scala 457:113] + wire _T_2427 = _T_2425 | buf_age_2[2]; // @[el2_lsu_bus_buffer.scala 460:97] + wire _T_2441 = _T_2364 & _T_1908; // @[el2_lsu_bus_buffer.scala 459:92] + wire _T_2442 = _T_4507 | _T_2441; // @[el2_lsu_bus_buffer.scala 458:86] + wire _T_2448 = _T_2371 & _T_1910; // @[el2_lsu_bus_buffer.scala 460:73] + wire _T_2449 = _T_2442 | _T_2448; // @[el2_lsu_bus_buffer.scala 459:114] + wire _T_2450 = _T_2354 & _T_2449; // @[el2_lsu_bus_buffer.scala 457:113] + wire _T_2452 = _T_2450 | buf_age_2[3]; // @[el2_lsu_bus_buffer.scala 460:97] + wire [2:0] _T_2454 = {_T_2452,_T_2427,_T_2402}; // @[Cat.scala 29:58] + wire _T_4135 = 2'h3 == WrPtr0_r; // @[el2_lsu_bus_buffer.scala 495:117] + wire _T_4136 = _T_3555 & _T_4135; // @[el2_lsu_bus_buffer.scala 495:112] + wire _T_4138 = 2'h3 == WrPtr1_r; // @[el2_lsu_bus_buffer.scala 495:166] + wire _T_4139 = _T_3558 & _T_4138; // @[el2_lsu_bus_buffer.scala 495:161] + wire _T_4140 = _T_4136 | _T_4139; // @[el2_lsu_bus_buffer.scala 495:132] + wire _T_4141 = _T_853 & _T_4140; // @[el2_lsu_bus_buffer.scala 495:63] + wire _T_4142 = 2'h3 == ibuf_tag; // @[el2_lsu_bus_buffer.scala 495:206] + wire _T_4143 = ibuf_drain_vld & _T_4142; // @[el2_lsu_bus_buffer.scala 495:201] + wire _T_4144 = _T_4141 | _T_4143; // @[el2_lsu_bus_buffer.scala 495:183] + wire _T_4189 = 3'h3 == buf_state_3; // @[Conditional.scala 37:30] + wire _T_4234 = io_lsu_axi_bid == 3'h3; // @[el2_lsu_bus_buffer.scala 520:73] + wire _T_4235 = bus_rsp_write & _T_4234; // @[el2_lsu_bus_buffer.scala 520:52] + wire _T_4236 = io_lsu_axi_rid == 3'h3; // @[el2_lsu_bus_buffer.scala 521:46] + wire [2:0] _GEN_372 = {{1'd0}, buf_ldfwdtag_3}; // @[el2_lsu_bus_buffer.scala 522:47] + wire _T_4238 = io_lsu_axi_rid == _GEN_372; // @[el2_lsu_bus_buffer.scala 522:47] + wire _T_4239 = buf_ldfwd[3] & _T_4238; // @[el2_lsu_bus_buffer.scala 522:27] + wire _T_4240 = _T_4236 | _T_4239; // @[el2_lsu_bus_buffer.scala 521:77] + wire _T_4241 = buf_dual_3 & buf_dualhi_3; // @[el2_lsu_bus_buffer.scala 523:26] + wire _T_4243 = ~buf_write[3]; // @[el2_lsu_bus_buffer.scala 523:44] + wire _T_4244 = _T_4241 & _T_4243; // @[el2_lsu_bus_buffer.scala 523:42] + wire _T_4245 = _T_4244 & buf_samedw_3; // @[el2_lsu_bus_buffer.scala 523:58] + reg [1:0] buf_dualtag_3; // @[Reg.scala 27:20] + wire [2:0] _GEN_373 = {{1'd0}, buf_dualtag_3}; // @[el2_lsu_bus_buffer.scala 523:94] + wire _T_4246 = io_lsu_axi_rid == _GEN_373; // @[el2_lsu_bus_buffer.scala 523:94] + wire _T_4247 = _T_4245 & _T_4246; // @[el2_lsu_bus_buffer.scala 523:74] + wire _T_4248 = _T_4240 | _T_4247; // @[el2_lsu_bus_buffer.scala 522:71] + wire _T_4249 = bus_rsp_read & _T_4248; // @[el2_lsu_bus_buffer.scala 521:25] + wire _T_4250 = _T_4235 | _T_4249; // @[el2_lsu_bus_buffer.scala 520:105] + wire _GEN_270 = _T_4189 & _T_4250; // @[Conditional.scala 39:67] + wire _GEN_289 = _T_4155 ? 1'h0 : _GEN_270; // @[Conditional.scala 39:67] + wire _GEN_301 = _T_4151 ? 1'h0 : _GEN_289; // @[Conditional.scala 39:67] + wire buf_resp_state_bus_en_3 = _T_4128 ? 1'h0 : _GEN_301; // @[Conditional.scala 40:58] + wire _T_4276 = 3'h4 == buf_state_3; // @[Conditional.scala 37:30] + wire [3:0] _T_4286 = buf_ldfwd >> buf_dualtag_3; // @[el2_lsu_bus_buffer.scala 535:21] + wire [1:0] _GEN_251 = 2'h1 == buf_dualtag_3 ? buf_ldfwdtag_1 : buf_ldfwdtag_0; // @[el2_lsu_bus_buffer.scala 535:58] + wire [1:0] _GEN_252 = 2'h2 == buf_dualtag_3 ? buf_ldfwdtag_2 : _GEN_251; // @[el2_lsu_bus_buffer.scala 535:58] + wire [1:0] _GEN_253 = 2'h3 == buf_dualtag_3 ? buf_ldfwdtag_3 : _GEN_252; // @[el2_lsu_bus_buffer.scala 535:58] + wire [2:0] _GEN_375 = {{1'd0}, _GEN_253}; // @[el2_lsu_bus_buffer.scala 535:58] + wire _T_4288 = io_lsu_axi_rid == _GEN_375; // @[el2_lsu_bus_buffer.scala 535:58] + wire _T_4289 = _T_4286[0] & _T_4288; // @[el2_lsu_bus_buffer.scala 535:38] + wire _T_4290 = _T_4246 | _T_4289; // @[el2_lsu_bus_buffer.scala 534:95] + wire _T_4291 = bus_rsp_read & _T_4290; // @[el2_lsu_bus_buffer.scala 534:45] + wire _GEN_264 = _T_4276 & _T_4291; // @[Conditional.scala 39:67] + wire _GEN_271 = _T_4189 ? buf_resp_state_bus_en_3 : _GEN_264; // @[Conditional.scala 39:67] + wire _GEN_281 = _T_4155 ? buf_cmd_state_bus_en_3 : _GEN_271; // @[Conditional.scala 39:67] + wire _GEN_294 = _T_4151 ? 1'h0 : _GEN_281; // @[Conditional.scala 39:67] + wire buf_state_bus_en_3 = _T_4128 ? 1'h0 : _GEN_294; // @[Conditional.scala 40:58] + wire _T_4168 = buf_state_bus_en_3 & io_lsu_bus_clk_en; // @[el2_lsu_bus_buffer.scala 508:49] + wire _T_4169 = _T_4168 | io_dec_tlu_force_halt; // @[el2_lsu_bus_buffer.scala 508:70] + wire _T_4294 = 3'h5 == buf_state_3; // @[Conditional.scala 37:30] + wire _T_4297 = RspPtr == 2'h3; // @[el2_lsu_bus_buffer.scala 540:37] + wire _T_4298 = buf_dualtag_3 == RspPtr; // @[el2_lsu_bus_buffer.scala 540:98] + wire _T_4299 = buf_dual_3 & _T_4298; // @[el2_lsu_bus_buffer.scala 540:80] + wire _T_4300 = _T_4297 | _T_4299; // @[el2_lsu_bus_buffer.scala 540:65] + wire _T_4301 = _T_4300 | io_dec_tlu_force_halt; // @[el2_lsu_bus_buffer.scala 540:112] + wire _T_4302 = 3'h6 == buf_state_3; // @[Conditional.scala 37:30] + wire _GEN_259 = _T_4294 ? _T_4301 : _T_4302; // @[Conditional.scala 39:67] + wire _GEN_265 = _T_4276 ? _T_4169 : _GEN_259; // @[Conditional.scala 39:67] + wire _GEN_272 = _T_4189 ? _T_4169 : _GEN_265; // @[Conditional.scala 39:67] + wire _GEN_282 = _T_4155 ? _T_4169 : _GEN_272; // @[Conditional.scala 39:67] + wire _GEN_292 = _T_4151 ? _T_3575 : _GEN_282; // @[Conditional.scala 39:67] + wire buf_state_en_3 = _T_4128 ? _T_4144 : _GEN_292; // @[Conditional.scala 40:58] + wire _T_2456 = _T_1907 & buf_state_en_3; // @[el2_lsu_bus_buffer.scala 457:94] + wire _T_2466 = _T_2158 & _T_1910; // @[el2_lsu_bus_buffer.scala 459:71] + wire _T_2468 = _T_2466 & _T_1875; // @[el2_lsu_bus_buffer.scala 459:92] + wire _T_2469 = _T_4492 | _T_2468; // @[el2_lsu_bus_buffer.scala 458:86] + wire _T_2473 = _T_2165 & _T_1911; // @[el2_lsu_bus_buffer.scala 460:52] + wire _T_2475 = _T_2473 & _T_1877; // @[el2_lsu_bus_buffer.scala 460:73] + wire _T_2476 = _T_2469 | _T_2475; // @[el2_lsu_bus_buffer.scala 459:114] + wire _T_2477 = _T_2456 & _T_2476; // @[el2_lsu_bus_buffer.scala 457:113] + wire _T_2479 = _T_2477 | buf_age_3[0]; // @[el2_lsu_bus_buffer.scala 460:97] + wire _T_2493 = _T_2466 & _T_1886; // @[el2_lsu_bus_buffer.scala 459:92] + wire _T_2494 = _T_4497 | _T_2493; // @[el2_lsu_bus_buffer.scala 458:86] + wire _T_2500 = _T_2473 & _T_1888; // @[el2_lsu_bus_buffer.scala 460:73] + wire _T_2501 = _T_2494 | _T_2500; // @[el2_lsu_bus_buffer.scala 459:114] + wire _T_2502 = _T_2456 & _T_2501; // @[el2_lsu_bus_buffer.scala 457:113] + wire _T_2504 = _T_2502 | buf_age_3[1]; // @[el2_lsu_bus_buffer.scala 460:97] + wire _T_2518 = _T_2466 & _T_1897; // @[el2_lsu_bus_buffer.scala 459:92] + wire _T_2519 = _T_4502 | _T_2518; // @[el2_lsu_bus_buffer.scala 458:86] + wire _T_2525 = _T_2473 & _T_1899; // @[el2_lsu_bus_buffer.scala 460:73] + wire _T_2526 = _T_2519 | _T_2525; // @[el2_lsu_bus_buffer.scala 459:114] + wire _T_2527 = _T_2456 & _T_2526; // @[el2_lsu_bus_buffer.scala 457:113] + wire _T_2529 = _T_2527 | buf_age_3[2]; // @[el2_lsu_bus_buffer.scala 460:97] + wire _T_2543 = _T_2466 & _T_1908; // @[el2_lsu_bus_buffer.scala 459:92] + wire _T_2544 = _T_4507 | _T_2543; // @[el2_lsu_bus_buffer.scala 458:86] + wire _T_2550 = _T_2473 & _T_1910; // @[el2_lsu_bus_buffer.scala 460:73] + wire _T_2551 = _T_2544 | _T_2550; // @[el2_lsu_bus_buffer.scala 459:114] + wire _T_2552 = _T_2456 & _T_2551; // @[el2_lsu_bus_buffer.scala 457:113] + wire _T_2554 = _T_2552 | buf_age_3[3]; // @[el2_lsu_bus_buffer.scala 460:97] + wire [2:0] _T_2556 = {_T_2554,_T_2529,_T_2504}; // @[Cat.scala 29:58] + wire _T_2820 = buf_state_0 == 3'h6; // @[el2_lsu_bus_buffer.scala 468:49] + wire _T_2821 = _T_1874 | _T_2820; // @[el2_lsu_bus_buffer.scala 468:34] + wire _T_2822 = ~_T_2821; // @[el2_lsu_bus_buffer.scala 468:8] + wire _T_2830 = _T_2822 | _T_2162; // @[el2_lsu_bus_buffer.scala 468:61] + wire _T_2837 = _T_2830 | _T_2169; // @[el2_lsu_bus_buffer.scala 469:112] + wire _T_2838 = _T_2150 & _T_2837; // @[el2_lsu_bus_buffer.scala 467:114] + wire _T_2842 = buf_state_1 == 3'h6; // @[el2_lsu_bus_buffer.scala 468:49] + wire _T_2843 = _T_1885 | _T_2842; // @[el2_lsu_bus_buffer.scala 468:34] + wire _T_2844 = ~_T_2843; // @[el2_lsu_bus_buffer.scala 468:8] + wire _T_2852 = _T_2844 | _T_2187; // @[el2_lsu_bus_buffer.scala 468:61] + wire _T_2859 = _T_2852 | _T_2194; // @[el2_lsu_bus_buffer.scala 469:112] + wire _T_2860 = _T_2150 & _T_2859; // @[el2_lsu_bus_buffer.scala 467:114] + wire _T_2864 = buf_state_2 == 3'h6; // @[el2_lsu_bus_buffer.scala 468:49] + wire _T_2865 = _T_1896 | _T_2864; // @[el2_lsu_bus_buffer.scala 468:34] + wire _T_2866 = ~_T_2865; // @[el2_lsu_bus_buffer.scala 468:8] + wire _T_2874 = _T_2866 | _T_2212; // @[el2_lsu_bus_buffer.scala 468:61] + wire _T_2881 = _T_2874 | _T_2219; // @[el2_lsu_bus_buffer.scala 469:112] + wire _T_2882 = _T_2150 & _T_2881; // @[el2_lsu_bus_buffer.scala 467:114] + wire _T_2886 = buf_state_3 == 3'h6; // @[el2_lsu_bus_buffer.scala 468:49] + wire _T_2887 = _T_1907 | _T_2886; // @[el2_lsu_bus_buffer.scala 468:34] + wire _T_2888 = ~_T_2887; // @[el2_lsu_bus_buffer.scala 468:8] + wire _T_2896 = _T_2888 | _T_2237; // @[el2_lsu_bus_buffer.scala 468:61] + wire _T_2903 = _T_2896 | _T_2244; // @[el2_lsu_bus_buffer.scala 469:112] + wire _T_2904 = _T_2150 & _T_2903; // @[el2_lsu_bus_buffer.scala 467:114] + wire [3:0] buf_rspage_set_0 = {_T_2904,_T_2882,_T_2860,_T_2838}; // @[Cat.scala 29:58] + wire _T_2921 = _T_2822 | _T_2264; // @[el2_lsu_bus_buffer.scala 468:61] + wire _T_2928 = _T_2921 | _T_2271; // @[el2_lsu_bus_buffer.scala 469:112] + wire _T_2929 = _T_2252 & _T_2928; // @[el2_lsu_bus_buffer.scala 467:114] + wire _T_2943 = _T_2844 | _T_2289; // @[el2_lsu_bus_buffer.scala 468:61] + wire _T_2950 = _T_2943 | _T_2296; // @[el2_lsu_bus_buffer.scala 469:112] + wire _T_2951 = _T_2252 & _T_2950; // @[el2_lsu_bus_buffer.scala 467:114] + wire _T_2965 = _T_2866 | _T_2314; // @[el2_lsu_bus_buffer.scala 468:61] + wire _T_2972 = _T_2965 | _T_2321; // @[el2_lsu_bus_buffer.scala 469:112] + wire _T_2973 = _T_2252 & _T_2972; // @[el2_lsu_bus_buffer.scala 467:114] + wire _T_2987 = _T_2888 | _T_2339; // @[el2_lsu_bus_buffer.scala 468:61] + wire _T_2994 = _T_2987 | _T_2346; // @[el2_lsu_bus_buffer.scala 469:112] + wire _T_2995 = _T_2252 & _T_2994; // @[el2_lsu_bus_buffer.scala 467:114] + wire [3:0] buf_rspage_set_1 = {_T_2995,_T_2973,_T_2951,_T_2929}; // @[Cat.scala 29:58] + wire _T_3012 = _T_2822 | _T_2366; // @[el2_lsu_bus_buffer.scala 468:61] + wire _T_3019 = _T_3012 | _T_2373; // @[el2_lsu_bus_buffer.scala 469:112] + wire _T_3020 = _T_2354 & _T_3019; // @[el2_lsu_bus_buffer.scala 467:114] + wire _T_3034 = _T_2844 | _T_2391; // @[el2_lsu_bus_buffer.scala 468:61] + wire _T_3041 = _T_3034 | _T_2398; // @[el2_lsu_bus_buffer.scala 469:112] + wire _T_3042 = _T_2354 & _T_3041; // @[el2_lsu_bus_buffer.scala 467:114] + wire _T_3056 = _T_2866 | _T_2416; // @[el2_lsu_bus_buffer.scala 468:61] + wire _T_3063 = _T_3056 | _T_2423; // @[el2_lsu_bus_buffer.scala 469:112] + wire _T_3064 = _T_2354 & _T_3063; // @[el2_lsu_bus_buffer.scala 467:114] + wire _T_3078 = _T_2888 | _T_2441; // @[el2_lsu_bus_buffer.scala 468:61] + wire _T_3085 = _T_3078 | _T_2448; // @[el2_lsu_bus_buffer.scala 469:112] + wire _T_3086 = _T_2354 & _T_3085; // @[el2_lsu_bus_buffer.scala 467:114] + wire [3:0] buf_rspage_set_2 = {_T_3086,_T_3064,_T_3042,_T_3020}; // @[Cat.scala 29:58] + wire _T_3103 = _T_2822 | _T_2468; // @[el2_lsu_bus_buffer.scala 468:61] + wire _T_3110 = _T_3103 | _T_2475; // @[el2_lsu_bus_buffer.scala 469:112] + wire _T_3111 = _T_2456 & _T_3110; // @[el2_lsu_bus_buffer.scala 467:114] + wire _T_3125 = _T_2844 | _T_2493; // @[el2_lsu_bus_buffer.scala 468:61] + wire _T_3132 = _T_3125 | _T_2500; // @[el2_lsu_bus_buffer.scala 469:112] + wire _T_3133 = _T_2456 & _T_3132; // @[el2_lsu_bus_buffer.scala 467:114] + wire _T_3147 = _T_2866 | _T_2518; // @[el2_lsu_bus_buffer.scala 468:61] + wire _T_3154 = _T_3147 | _T_2525; // @[el2_lsu_bus_buffer.scala 469:112] + wire _T_3155 = _T_2456 & _T_3154; // @[el2_lsu_bus_buffer.scala 467:114] + wire _T_3169 = _T_2888 | _T_2543; // @[el2_lsu_bus_buffer.scala 468:61] + wire _T_3176 = _T_3169 | _T_2550; // @[el2_lsu_bus_buffer.scala 469:112] + wire _T_3177 = _T_2456 & _T_3176; // @[el2_lsu_bus_buffer.scala 467:114] + wire [3:0] buf_rspage_set_3 = {_T_3177,_T_3155,_T_3133,_T_3111}; // @[Cat.scala 29:58] + wire _T_3262 = _T_2886 | _T_1907; // @[el2_lsu_bus_buffer.scala 472:112] + wire _T_3263 = ~_T_3262; // @[el2_lsu_bus_buffer.scala 472:86] + wire _T_3264 = buf_rspageQ_0[3] & _T_3263; // @[el2_lsu_bus_buffer.scala 472:84] + wire _T_3256 = _T_2864 | _T_1896; // @[el2_lsu_bus_buffer.scala 472:112] + wire _T_3257 = ~_T_3256; // @[el2_lsu_bus_buffer.scala 472:86] + wire _T_3258 = buf_rspageQ_0[2] & _T_3257; // @[el2_lsu_bus_buffer.scala 472:84] + wire _T_3250 = _T_2842 | _T_1885; // @[el2_lsu_bus_buffer.scala 472:112] + wire _T_3251 = ~_T_3250; // @[el2_lsu_bus_buffer.scala 472:86] + wire _T_3252 = buf_rspageQ_0[1] & _T_3251; // @[el2_lsu_bus_buffer.scala 472:84] + wire _T_3244 = _T_2820 | _T_1874; // @[el2_lsu_bus_buffer.scala 472:112] + wire _T_3245 = ~_T_3244; // @[el2_lsu_bus_buffer.scala 472:86] + wire _T_3246 = buf_rspageQ_0[0] & _T_3245; // @[el2_lsu_bus_buffer.scala 472:84] + wire [3:0] buf_rspage_0 = {_T_3264,_T_3258,_T_3252,_T_3246}; // @[Cat.scala 29:58] + wire _T_3183 = buf_rspage_set_0[0] | buf_rspage_0[0]; // @[el2_lsu_bus_buffer.scala 471:90] + wire _T_3186 = buf_rspage_set_0[1] | buf_rspage_0[1]; // @[el2_lsu_bus_buffer.scala 471:90] + wire _T_3189 = buf_rspage_set_0[2] | buf_rspage_0[2]; // @[el2_lsu_bus_buffer.scala 471:90] + wire _T_3192 = buf_rspage_set_0[3] | buf_rspage_0[3]; // @[el2_lsu_bus_buffer.scala 471:90] + wire [2:0] _T_3194 = {_T_3192,_T_3189,_T_3186}; // @[Cat.scala 29:58] + wire _T_3291 = buf_rspageQ_1[3] & _T_3263; // @[el2_lsu_bus_buffer.scala 472:84] + wire _T_3285 = buf_rspageQ_1[2] & _T_3257; // @[el2_lsu_bus_buffer.scala 472:84] + wire _T_3279 = buf_rspageQ_1[1] & _T_3251; // @[el2_lsu_bus_buffer.scala 472:84] + wire _T_3273 = buf_rspageQ_1[0] & _T_3245; // @[el2_lsu_bus_buffer.scala 472:84] + wire [3:0] buf_rspage_1 = {_T_3291,_T_3285,_T_3279,_T_3273}; // @[Cat.scala 29:58] + wire _T_3198 = buf_rspage_set_1[0] | buf_rspage_1[0]; // @[el2_lsu_bus_buffer.scala 471:90] + wire _T_3201 = buf_rspage_set_1[1] | buf_rspage_1[1]; // @[el2_lsu_bus_buffer.scala 471:90] + wire _T_3204 = buf_rspage_set_1[2] | buf_rspage_1[2]; // @[el2_lsu_bus_buffer.scala 471:90] + wire _T_3207 = buf_rspage_set_1[3] | buf_rspage_1[3]; // @[el2_lsu_bus_buffer.scala 471:90] + wire [2:0] _T_3209 = {_T_3207,_T_3204,_T_3201}; // @[Cat.scala 29:58] + wire _T_3318 = buf_rspageQ_2[3] & _T_3263; // @[el2_lsu_bus_buffer.scala 472:84] + wire _T_3312 = buf_rspageQ_2[2] & _T_3257; // @[el2_lsu_bus_buffer.scala 472:84] + wire _T_3306 = buf_rspageQ_2[1] & _T_3251; // @[el2_lsu_bus_buffer.scala 472:84] + wire _T_3300 = buf_rspageQ_2[0] & _T_3245; // @[el2_lsu_bus_buffer.scala 472:84] + wire [3:0] buf_rspage_2 = {_T_3318,_T_3312,_T_3306,_T_3300}; // @[Cat.scala 29:58] + wire _T_3213 = buf_rspage_set_2[0] | buf_rspage_2[0]; // @[el2_lsu_bus_buffer.scala 471:90] + wire _T_3216 = buf_rspage_set_2[1] | buf_rspage_2[1]; // @[el2_lsu_bus_buffer.scala 471:90] + wire _T_3219 = buf_rspage_set_2[2] | buf_rspage_2[2]; // @[el2_lsu_bus_buffer.scala 471:90] + wire _T_3222 = buf_rspage_set_2[3] | buf_rspage_2[3]; // @[el2_lsu_bus_buffer.scala 471:90] + wire [2:0] _T_3224 = {_T_3222,_T_3219,_T_3216}; // @[Cat.scala 29:58] + wire _T_3345 = buf_rspageQ_3[3] & _T_3263; // @[el2_lsu_bus_buffer.scala 472:84] + wire _T_3339 = buf_rspageQ_3[2] & _T_3257; // @[el2_lsu_bus_buffer.scala 472:84] + wire _T_3333 = buf_rspageQ_3[1] & _T_3251; // @[el2_lsu_bus_buffer.scala 472:84] + wire _T_3327 = buf_rspageQ_3[0] & _T_3245; // @[el2_lsu_bus_buffer.scala 472:84] + wire [3:0] buf_rspage_3 = {_T_3345,_T_3339,_T_3333,_T_3327}; // @[Cat.scala 29:58] + wire _T_3228 = buf_rspage_set_3[0] | buf_rspage_3[0]; // @[el2_lsu_bus_buffer.scala 471:90] + wire _T_3231 = buf_rspage_set_3[1] | buf_rspage_3[1]; // @[el2_lsu_bus_buffer.scala 471:90] + wire _T_3234 = buf_rspage_set_3[2] | buf_rspage_3[2]; // @[el2_lsu_bus_buffer.scala 471:90] + wire _T_3237 = buf_rspage_set_3[3] | buf_rspage_3[3]; // @[el2_lsu_bus_buffer.scala 471:90] + wire [2:0] _T_3239 = {_T_3237,_T_3234,_T_3231}; // @[Cat.scala 29:58] + wire _T_3350 = ibuf_drain_vld & _T_1875; // @[el2_lsu_bus_buffer.scala 477:65] + wire _T_3352 = ibuf_drain_vld & _T_1886; // @[el2_lsu_bus_buffer.scala 477:65] + wire _T_3354 = ibuf_drain_vld & _T_1897; // @[el2_lsu_bus_buffer.scala 477:65] + wire _T_3356 = ibuf_drain_vld & _T_1908; // @[el2_lsu_bus_buffer.scala 477:65] + wire [3:0] ibuf_drainvec_vld = {_T_3356,_T_3354,_T_3352,_T_3350}; // @[Cat.scala 29:58] + wire _T_3364 = _T_3558 & _T_1878; // @[el2_lsu_bus_buffer.scala 479:37] + wire _T_3373 = _T_3558 & _T_1889; // @[el2_lsu_bus_buffer.scala 479:37] + wire _T_3382 = _T_3558 & _T_1900; // @[el2_lsu_bus_buffer.scala 479:37] + wire _T_3391 = _T_3558 & _T_1911; // @[el2_lsu_bus_buffer.scala 479:37] + wire _T_3421 = ibuf_drainvec_vld[0] ? ibuf_dual : io_ldst_dual_r; // @[el2_lsu_bus_buffer.scala 481:47] + wire _T_3423 = ibuf_drainvec_vld[1] ? ibuf_dual : io_ldst_dual_r; // @[el2_lsu_bus_buffer.scala 481:47] + wire _T_3425 = ibuf_drainvec_vld[2] ? ibuf_dual : io_ldst_dual_r; // @[el2_lsu_bus_buffer.scala 481:47] + wire _T_3427 = ibuf_drainvec_vld[3] ? ibuf_dual : io_ldst_dual_r; // @[el2_lsu_bus_buffer.scala 481:47] + wire [3:0] buf_dual_in = {_T_3427,_T_3425,_T_3423,_T_3421}; // @[Cat.scala 29:58] + wire _T_3432 = ibuf_drainvec_vld[0] ? ibuf_samedw : ldst_samedw_r; // @[el2_lsu_bus_buffer.scala 482:49] + wire _T_3434 = ibuf_drainvec_vld[1] ? ibuf_samedw : ldst_samedw_r; // @[el2_lsu_bus_buffer.scala 482:49] + wire _T_3436 = ibuf_drainvec_vld[2] ? ibuf_samedw : ldst_samedw_r; // @[el2_lsu_bus_buffer.scala 482:49] + wire _T_3438 = ibuf_drainvec_vld[3] ? ibuf_samedw : ldst_samedw_r; // @[el2_lsu_bus_buffer.scala 482:49] + wire [3:0] buf_samedw_in = {_T_3438,_T_3436,_T_3434,_T_3432}; // @[Cat.scala 29:58] + wire _T_3443 = ibuf_nomerge | ibuf_force_drain; // @[el2_lsu_bus_buffer.scala 483:86] + wire _T_3444 = ibuf_drainvec_vld[0] ? _T_3443 : io_no_dword_merge_r; // @[el2_lsu_bus_buffer.scala 483:50] + wire _T_3447 = ibuf_drainvec_vld[1] ? _T_3443 : io_no_dword_merge_r; // @[el2_lsu_bus_buffer.scala 483:50] + wire _T_3450 = ibuf_drainvec_vld[2] ? _T_3443 : io_no_dword_merge_r; // @[el2_lsu_bus_buffer.scala 483:50] + wire _T_3453 = ibuf_drainvec_vld[3] ? _T_3443 : io_no_dword_merge_r; // @[el2_lsu_bus_buffer.scala 483:50] + wire [3:0] buf_nomerge_in = {_T_3453,_T_3450,_T_3447,_T_3444}; // @[Cat.scala 29:58] + wire _T_3461 = ibuf_drainvec_vld[0] ? ibuf_dual : _T_3364; // @[el2_lsu_bus_buffer.scala 484:49] + wire _T_3466 = ibuf_drainvec_vld[1] ? ibuf_dual : _T_3373; // @[el2_lsu_bus_buffer.scala 484:49] + wire _T_3471 = ibuf_drainvec_vld[2] ? ibuf_dual : _T_3382; // @[el2_lsu_bus_buffer.scala 484:49] + wire _T_3476 = ibuf_drainvec_vld[3] ? ibuf_dual : _T_3391; // @[el2_lsu_bus_buffer.scala 484:49] + wire [3:0] buf_dualhi_in = {_T_3476,_T_3471,_T_3466,_T_3461}; // @[Cat.scala 29:58] + wire _T_3505 = ibuf_drainvec_vld[0] ? ibuf_sideeffect : io_is_sideeffects_r; // @[el2_lsu_bus_buffer.scala 486:53] + wire _T_3507 = ibuf_drainvec_vld[1] ? ibuf_sideeffect : io_is_sideeffects_r; // @[el2_lsu_bus_buffer.scala 486:53] + wire _T_3509 = ibuf_drainvec_vld[2] ? ibuf_sideeffect : io_is_sideeffects_r; // @[el2_lsu_bus_buffer.scala 486:53] + wire _T_3511 = ibuf_drainvec_vld[3] ? ibuf_sideeffect : io_is_sideeffects_r; // @[el2_lsu_bus_buffer.scala 486:53] + wire [3:0] buf_sideeffect_in = {_T_3511,_T_3509,_T_3507,_T_3505}; // @[Cat.scala 29:58] + wire _T_3516 = ibuf_drainvec_vld[0] ? ibuf_unsign : io_lsu_pkt_r_unsign; // @[el2_lsu_bus_buffer.scala 487:49] + wire _T_3518 = ibuf_drainvec_vld[1] ? ibuf_unsign : io_lsu_pkt_r_unsign; // @[el2_lsu_bus_buffer.scala 487:49] + wire _T_3520 = ibuf_drainvec_vld[2] ? ibuf_unsign : io_lsu_pkt_r_unsign; // @[el2_lsu_bus_buffer.scala 487:49] + wire _T_3522 = ibuf_drainvec_vld[3] ? ibuf_unsign : io_lsu_pkt_r_unsign; // @[el2_lsu_bus_buffer.scala 487:49] + wire [3:0] buf_unsign_in = {_T_3522,_T_3520,_T_3518,_T_3516}; // @[Cat.scala 29:58] + wire _T_3539 = ibuf_drainvec_vld[0] ? ibuf_write : io_lsu_pkt_r_store; // @[el2_lsu_bus_buffer.scala 489:48] + wire _T_3541 = ibuf_drainvec_vld[1] ? ibuf_write : io_lsu_pkt_r_store; // @[el2_lsu_bus_buffer.scala 489:48] + wire _T_3543 = ibuf_drainvec_vld[2] ? ibuf_write : io_lsu_pkt_r_store; // @[el2_lsu_bus_buffer.scala 489:48] + wire _T_3545 = ibuf_drainvec_vld[3] ? ibuf_write : io_lsu_pkt_r_store; // @[el2_lsu_bus_buffer.scala 489:48] + wire [3:0] buf_write_in = {_T_3545,_T_3543,_T_3541,_T_3539}; // @[Cat.scala 29:58] + wire _T_3578 = obuf_nosend & bus_rsp_read; // @[el2_lsu_bus_buffer.scala 505:89] + wire _T_3580 = _T_3578 & _T_1372; // @[el2_lsu_bus_buffer.scala 505:104] + wire _T_3593 = buf_state_en_0 & _T_3664; // @[el2_lsu_bus_buffer.scala 510:44] + wire _T_3594 = _T_3593 & obuf_nosend; // @[el2_lsu_bus_buffer.scala 510:60] + wire _T_3596 = _T_3594 & _T_1354; // @[el2_lsu_bus_buffer.scala 510:74] + wire _T_3599 = _T_3589 & obuf_nosend; // @[el2_lsu_bus_buffer.scala 512:67] + wire _T_3600 = _T_3599 & bus_rsp_read; // @[el2_lsu_bus_buffer.scala 512:81] + wire _T_4890 = io_lsu_axi_bresp != 2'h0; // @[el2_lsu_bus_buffer.scala 616:58] + wire bus_rsp_read_error = bus_rsp_read & _T_4890; // @[el2_lsu_bus_buffer.scala 616:38] + wire _T_3603 = _T_3599 & bus_rsp_read_error; // @[el2_lsu_bus_buffer.scala 513:82] + wire _T_3678 = bus_rsp_read_error & _T_3657; // @[el2_lsu_bus_buffer.scala 527:91] + wire _T_3680 = bus_rsp_read_error & buf_ldfwd[0]; // @[el2_lsu_bus_buffer.scala 528:31] + wire _T_3682 = _T_3680 & _T_3659; // @[el2_lsu_bus_buffer.scala 528:46] + wire _T_3683 = _T_3678 | _T_3682; // @[el2_lsu_bus_buffer.scala 527:143] + wire bus_rsp_write_error = bus_rsp_write & _T_4890; // @[el2_lsu_bus_buffer.scala 615:40] + wire _T_3686 = bus_rsp_write_error & _T_3655; // @[el2_lsu_bus_buffer.scala 529:53] + wire _T_3687 = _T_3683 | _T_3686; // @[el2_lsu_bus_buffer.scala 528:88] + wire _T_3688 = _T_3589 & _T_3687; // @[el2_lsu_bus_buffer.scala 527:68] + wire _GEN_46 = _T_3610 & _T_3688; // @[Conditional.scala 39:67] + wire _GEN_59 = _T_3576 ? _T_3603 : _GEN_46; // @[Conditional.scala 39:67] + wire _GEN_71 = _T_3572 ? 1'h0 : _GEN_59; // @[Conditional.scala 39:67] + wire buf_error_en_0 = _T_3549 ? 1'h0 : _GEN_71; // @[Conditional.scala 40:58] + wire _T_3613 = ~bus_rsp_write_error; // @[el2_lsu_bus_buffer.scala 517:73] + wire _T_3614 = buf_write[0] & _T_3613; // @[el2_lsu_bus_buffer.scala 517:71] + wire _T_3615 = io_dec_tlu_force_halt | _T_3614; // @[el2_lsu_bus_buffer.scala 517:55] + wire _T_3617 = ~buf_samedw_0; // @[el2_lsu_bus_buffer.scala 518:30] + wire _T_3618 = buf_dual_0 & _T_3617; // @[el2_lsu_bus_buffer.scala 518:28] + wire _T_3621 = _T_3618 & _T_3664; // @[el2_lsu_bus_buffer.scala 518:45] + wire [2:0] _GEN_19 = 2'h1 == buf_dualtag_0 ? buf_state_1 : buf_state_0; // @[el2_lsu_bus_buffer.scala 518:90] + wire [2:0] _GEN_20 = 2'h2 == buf_dualtag_0 ? buf_state_2 : _GEN_19; // @[el2_lsu_bus_buffer.scala 518:90] + wire [2:0] _GEN_21 = 2'h3 == buf_dualtag_0 ? buf_state_3 : _GEN_20; // @[el2_lsu_bus_buffer.scala 518:90] + wire _T_3622 = _GEN_21 != 3'h4; // @[el2_lsu_bus_buffer.scala 518:90] + wire _T_3623 = _T_3621 & _T_3622; // @[el2_lsu_bus_buffer.scala 518:61] + wire _T_4515 = _T_2767 | _T_2764; // @[el2_lsu_bus_buffer.scala 576:93] + wire _T_4516 = _T_4515 | _T_2761; // @[el2_lsu_bus_buffer.scala 576:93] + wire any_done_wait_state = _T_4516 | _T_2758; // @[el2_lsu_bus_buffer.scala 576:93] + wire _T_3625 = buf_ldfwd[0] | any_done_wait_state; // @[el2_lsu_bus_buffer.scala 519:31] + wire _T_3631 = buf_dualtag_0 == 2'h0; // @[el2_lsu_bus_buffer.scala 109:118] + wire _T_3633 = buf_dualtag_0 == 2'h1; // @[el2_lsu_bus_buffer.scala 109:118] + wire _T_3635 = buf_dualtag_0 == 2'h2; // @[el2_lsu_bus_buffer.scala 109:118] + wire _T_3637 = buf_dualtag_0 == 2'h3; // @[el2_lsu_bus_buffer.scala 109:118] + wire _T_3639 = _T_3631 & buf_ldfwd[0]; // @[Mux.scala 27:72] + wire _T_3640 = _T_3633 & buf_ldfwd[1]; // @[Mux.scala 27:72] + wire _T_3641 = _T_3635 & buf_ldfwd[2]; // @[Mux.scala 27:72] + wire _T_3642 = _T_3637 & buf_ldfwd[3]; // @[Mux.scala 27:72] + wire _T_3643 = _T_3639 | _T_3640; // @[Mux.scala 27:72] + wire _T_3644 = _T_3643 | _T_3641; // @[Mux.scala 27:72] + wire _T_3645 = _T_3644 | _T_3642; // @[Mux.scala 27:72] + wire _T_3647 = _T_3621 & _T_3645; // @[el2_lsu_bus_buffer.scala 519:101] + wire _T_3648 = _GEN_21 == 3'h4; // @[el2_lsu_bus_buffer.scala 519:167] + wire _T_3649 = _T_3647 & _T_3648; // @[el2_lsu_bus_buffer.scala 519:138] + wire _T_3650 = _T_3649 & any_done_wait_state; // @[el2_lsu_bus_buffer.scala 519:187] + wire _T_3651 = _T_3625 | _T_3650; // @[el2_lsu_bus_buffer.scala 519:53] + wire _T_3674 = buf_state_bus_en_0 & bus_rsp_read; // @[el2_lsu_bus_buffer.scala 526:47] + wire _T_3675 = _T_3674 & io_lsu_bus_clk_en; // @[el2_lsu_bus_buffer.scala 526:62] + wire _T_3689 = ~buf_error_en_0; // @[el2_lsu_bus_buffer.scala 530:50] + wire _T_3690 = buf_state_en_0 & _T_3689; // @[el2_lsu_bus_buffer.scala 530:48] + wire _T_3702 = buf_ldfwd[0] | _T_3707[0]; // @[el2_lsu_bus_buffer.scala 533:90] + wire _T_3703 = _T_3702 | any_done_wait_state; // @[el2_lsu_bus_buffer.scala 533:118] + wire _GEN_29 = _T_3723 & buf_state_en_0; // @[Conditional.scala 39:67] + wire _GEN_32 = _T_3715 ? 1'h0 : _T_3723; // @[Conditional.scala 39:67] + wire _GEN_34 = _T_3715 ? 1'h0 : _GEN_29; // @[Conditional.scala 39:67] + wire _GEN_38 = _T_3697 ? 1'h0 : _GEN_32; // @[Conditional.scala 39:67] + wire _GEN_40 = _T_3697 ? 1'h0 : _GEN_34; // @[Conditional.scala 39:67] + wire _GEN_45 = _T_3610 & _T_3675; // @[Conditional.scala 39:67] + wire _GEN_48 = _T_3610 ? 1'h0 : _GEN_38; // @[Conditional.scala 39:67] + wire _GEN_50 = _T_3610 ? 1'h0 : _GEN_40; // @[Conditional.scala 39:67] + wire _GEN_56 = _T_3576 ? _T_3596 : _GEN_50; // @[Conditional.scala 39:67] + wire _GEN_58 = _T_3576 ? _T_3600 : _GEN_45; // @[Conditional.scala 39:67] + wire _GEN_62 = _T_3576 ? 1'h0 : _GEN_48; // @[Conditional.scala 39:67] + wire _GEN_68 = _T_3572 ? 1'h0 : _GEN_56; // @[Conditional.scala 39:67] + wire _GEN_70 = _T_3572 ? 1'h0 : _GEN_58; // @[Conditional.scala 39:67] + wire _GEN_74 = _T_3572 ? 1'h0 : _GEN_62; // @[Conditional.scala 39:67] + wire buf_wr_en_0 = _T_3549 & buf_state_en_0; // @[Conditional.scala 40:58] + wire buf_ldfwd_en_0 = _T_3549 ? 1'h0 : _GEN_68; // @[Conditional.scala 40:58] + wire buf_rst_0 = _T_3549 ? 1'h0 : _GEN_74; // @[Conditional.scala 40:58] + wire _T_3786 = buf_state_en_1 & _T_3857; // @[el2_lsu_bus_buffer.scala 510:44] + wire _T_3787 = _T_3786 & obuf_nosend; // @[el2_lsu_bus_buffer.scala 510:60] + wire _T_3789 = _T_3787 & _T_1354; // @[el2_lsu_bus_buffer.scala 510:74] + wire _T_3792 = _T_3782 & obuf_nosend; // @[el2_lsu_bus_buffer.scala 512:67] + wire _T_3793 = _T_3792 & bus_rsp_read; // @[el2_lsu_bus_buffer.scala 512:81] + wire _T_3796 = _T_3792 & bus_rsp_read_error; // @[el2_lsu_bus_buffer.scala 513:82] + wire _T_3871 = bus_rsp_read_error & _T_3850; // @[el2_lsu_bus_buffer.scala 527:91] + wire _T_3873 = bus_rsp_read_error & buf_ldfwd[1]; // @[el2_lsu_bus_buffer.scala 528:31] + wire _T_3875 = _T_3873 & _T_3852; // @[el2_lsu_bus_buffer.scala 528:46] + wire _T_3876 = _T_3871 | _T_3875; // @[el2_lsu_bus_buffer.scala 527:143] + wire _T_3879 = bus_rsp_write_error & _T_3848; // @[el2_lsu_bus_buffer.scala 529:53] + wire _T_3880 = _T_3876 | _T_3879; // @[el2_lsu_bus_buffer.scala 528:88] + wire _T_3881 = _T_3782 & _T_3880; // @[el2_lsu_bus_buffer.scala 527:68] + wire _GEN_122 = _T_3803 & _T_3881; // @[Conditional.scala 39:67] + wire _GEN_135 = _T_3769 ? _T_3796 : _GEN_122; // @[Conditional.scala 39:67] + wire _GEN_147 = _T_3765 ? 1'h0 : _GEN_135; // @[Conditional.scala 39:67] + wire buf_error_en_1 = _T_3742 ? 1'h0 : _GEN_147; // @[Conditional.scala 40:58] + wire _T_3807 = buf_write[1] & _T_3613; // @[el2_lsu_bus_buffer.scala 517:71] + wire _T_3808 = io_dec_tlu_force_halt | _T_3807; // @[el2_lsu_bus_buffer.scala 517:55] + wire _T_3810 = ~buf_samedw_1; // @[el2_lsu_bus_buffer.scala 518:30] + wire _T_3811 = buf_dual_1 & _T_3810; // @[el2_lsu_bus_buffer.scala 518:28] + wire _T_3814 = _T_3811 & _T_3857; // @[el2_lsu_bus_buffer.scala 518:45] + wire [2:0] _GEN_95 = 2'h1 == buf_dualtag_1 ? buf_state_1 : buf_state_0; // @[el2_lsu_bus_buffer.scala 518:90] + wire [2:0] _GEN_96 = 2'h2 == buf_dualtag_1 ? buf_state_2 : _GEN_95; // @[el2_lsu_bus_buffer.scala 518:90] + wire [2:0] _GEN_97 = 2'h3 == buf_dualtag_1 ? buf_state_3 : _GEN_96; // @[el2_lsu_bus_buffer.scala 518:90] + wire _T_3815 = _GEN_97 != 3'h4; // @[el2_lsu_bus_buffer.scala 518:90] + wire _T_3816 = _T_3814 & _T_3815; // @[el2_lsu_bus_buffer.scala 518:61] + wire _T_3818 = buf_ldfwd[1] | any_done_wait_state; // @[el2_lsu_bus_buffer.scala 519:31] + wire _T_3824 = buf_dualtag_1 == 2'h0; // @[el2_lsu_bus_buffer.scala 109:118] + wire _T_3826 = buf_dualtag_1 == 2'h1; // @[el2_lsu_bus_buffer.scala 109:118] + wire _T_3828 = buf_dualtag_1 == 2'h2; // @[el2_lsu_bus_buffer.scala 109:118] + wire _T_3830 = buf_dualtag_1 == 2'h3; // @[el2_lsu_bus_buffer.scala 109:118] + wire _T_3832 = _T_3824 & buf_ldfwd[0]; // @[Mux.scala 27:72] + wire _T_3833 = _T_3826 & buf_ldfwd[1]; // @[Mux.scala 27:72] + wire _T_3834 = _T_3828 & buf_ldfwd[2]; // @[Mux.scala 27:72] + wire _T_3835 = _T_3830 & buf_ldfwd[3]; // @[Mux.scala 27:72] + wire _T_3836 = _T_3832 | _T_3833; // @[Mux.scala 27:72] + wire _T_3837 = _T_3836 | _T_3834; // @[Mux.scala 27:72] + wire _T_3838 = _T_3837 | _T_3835; // @[Mux.scala 27:72] + wire _T_3840 = _T_3814 & _T_3838; // @[el2_lsu_bus_buffer.scala 519:101] + wire _T_3841 = _GEN_97 == 3'h4; // @[el2_lsu_bus_buffer.scala 519:167] + wire _T_3842 = _T_3840 & _T_3841; // @[el2_lsu_bus_buffer.scala 519:138] + wire _T_3843 = _T_3842 & any_done_wait_state; // @[el2_lsu_bus_buffer.scala 519:187] + wire _T_3844 = _T_3818 | _T_3843; // @[el2_lsu_bus_buffer.scala 519:53] + wire _T_3867 = buf_state_bus_en_1 & bus_rsp_read; // @[el2_lsu_bus_buffer.scala 526:47] + wire _T_3868 = _T_3867 & io_lsu_bus_clk_en; // @[el2_lsu_bus_buffer.scala 526:62] + wire _T_3882 = ~buf_error_en_1; // @[el2_lsu_bus_buffer.scala 530:50] + wire _T_3883 = buf_state_en_1 & _T_3882; // @[el2_lsu_bus_buffer.scala 530:48] + wire _T_3895 = buf_ldfwd[1] | _T_3900[0]; // @[el2_lsu_bus_buffer.scala 533:90] + wire _T_3896 = _T_3895 | any_done_wait_state; // @[el2_lsu_bus_buffer.scala 533:118] + wire _GEN_105 = _T_3916 & buf_state_en_1; // @[Conditional.scala 39:67] + wire _GEN_108 = _T_3908 ? 1'h0 : _T_3916; // @[Conditional.scala 39:67] + wire _GEN_110 = _T_3908 ? 1'h0 : _GEN_105; // @[Conditional.scala 39:67] + wire _GEN_114 = _T_3890 ? 1'h0 : _GEN_108; // @[Conditional.scala 39:67] + wire _GEN_116 = _T_3890 ? 1'h0 : _GEN_110; // @[Conditional.scala 39:67] + wire _GEN_121 = _T_3803 & _T_3868; // @[Conditional.scala 39:67] + wire _GEN_124 = _T_3803 ? 1'h0 : _GEN_114; // @[Conditional.scala 39:67] + wire _GEN_126 = _T_3803 ? 1'h0 : _GEN_116; // @[Conditional.scala 39:67] + wire _GEN_132 = _T_3769 ? _T_3789 : _GEN_126; // @[Conditional.scala 39:67] + wire _GEN_134 = _T_3769 ? _T_3793 : _GEN_121; // @[Conditional.scala 39:67] + wire _GEN_138 = _T_3769 ? 1'h0 : _GEN_124; // @[Conditional.scala 39:67] + wire _GEN_144 = _T_3765 ? 1'h0 : _GEN_132; // @[Conditional.scala 39:67] + wire _GEN_146 = _T_3765 ? 1'h0 : _GEN_134; // @[Conditional.scala 39:67] + wire _GEN_150 = _T_3765 ? 1'h0 : _GEN_138; // @[Conditional.scala 39:67] + wire buf_wr_en_1 = _T_3742 & buf_state_en_1; // @[Conditional.scala 40:58] + wire buf_ldfwd_en_1 = _T_3742 ? 1'h0 : _GEN_144; // @[Conditional.scala 40:58] + wire buf_rst_1 = _T_3742 ? 1'h0 : _GEN_150; // @[Conditional.scala 40:58] + wire _T_3979 = buf_state_en_2 & _T_4050; // @[el2_lsu_bus_buffer.scala 510:44] + wire _T_3980 = _T_3979 & obuf_nosend; // @[el2_lsu_bus_buffer.scala 510:60] + wire _T_3982 = _T_3980 & _T_1354; // @[el2_lsu_bus_buffer.scala 510:74] + wire _T_3985 = _T_3975 & obuf_nosend; // @[el2_lsu_bus_buffer.scala 512:67] + wire _T_3986 = _T_3985 & bus_rsp_read; // @[el2_lsu_bus_buffer.scala 512:81] + wire _T_3989 = _T_3985 & bus_rsp_read_error; // @[el2_lsu_bus_buffer.scala 513:82] + wire _T_4064 = bus_rsp_read_error & _T_4043; // @[el2_lsu_bus_buffer.scala 527:91] + wire _T_4066 = bus_rsp_read_error & buf_ldfwd[2]; // @[el2_lsu_bus_buffer.scala 528:31] + wire _T_4068 = _T_4066 & _T_4045; // @[el2_lsu_bus_buffer.scala 528:46] + wire _T_4069 = _T_4064 | _T_4068; // @[el2_lsu_bus_buffer.scala 527:143] + wire _T_4072 = bus_rsp_write_error & _T_4041; // @[el2_lsu_bus_buffer.scala 529:53] + wire _T_4073 = _T_4069 | _T_4072; // @[el2_lsu_bus_buffer.scala 528:88] + wire _T_4074 = _T_3975 & _T_4073; // @[el2_lsu_bus_buffer.scala 527:68] + wire _GEN_198 = _T_3996 & _T_4074; // @[Conditional.scala 39:67] + wire _GEN_211 = _T_3962 ? _T_3989 : _GEN_198; // @[Conditional.scala 39:67] + wire _GEN_223 = _T_3958 ? 1'h0 : _GEN_211; // @[Conditional.scala 39:67] + wire buf_error_en_2 = _T_3935 ? 1'h0 : _GEN_223; // @[Conditional.scala 40:58] + wire _T_4000 = buf_write[2] & _T_3613; // @[el2_lsu_bus_buffer.scala 517:71] + wire _T_4001 = io_dec_tlu_force_halt | _T_4000; // @[el2_lsu_bus_buffer.scala 517:55] + wire _T_4003 = ~buf_samedw_2; // @[el2_lsu_bus_buffer.scala 518:30] + wire _T_4004 = buf_dual_2 & _T_4003; // @[el2_lsu_bus_buffer.scala 518:28] + wire _T_4007 = _T_4004 & _T_4050; // @[el2_lsu_bus_buffer.scala 518:45] + wire [2:0] _GEN_171 = 2'h1 == buf_dualtag_2 ? buf_state_1 : buf_state_0; // @[el2_lsu_bus_buffer.scala 518:90] + wire [2:0] _GEN_172 = 2'h2 == buf_dualtag_2 ? buf_state_2 : _GEN_171; // @[el2_lsu_bus_buffer.scala 518:90] + wire [2:0] _GEN_173 = 2'h3 == buf_dualtag_2 ? buf_state_3 : _GEN_172; // @[el2_lsu_bus_buffer.scala 518:90] + wire _T_4008 = _GEN_173 != 3'h4; // @[el2_lsu_bus_buffer.scala 518:90] + wire _T_4009 = _T_4007 & _T_4008; // @[el2_lsu_bus_buffer.scala 518:61] + wire _T_4011 = buf_ldfwd[2] | any_done_wait_state; // @[el2_lsu_bus_buffer.scala 519:31] + wire _T_4017 = buf_dualtag_2 == 2'h0; // @[el2_lsu_bus_buffer.scala 109:118] + wire _T_4019 = buf_dualtag_2 == 2'h1; // @[el2_lsu_bus_buffer.scala 109:118] + wire _T_4021 = buf_dualtag_2 == 2'h2; // @[el2_lsu_bus_buffer.scala 109:118] + wire _T_4023 = buf_dualtag_2 == 2'h3; // @[el2_lsu_bus_buffer.scala 109:118] + wire _T_4025 = _T_4017 & buf_ldfwd[0]; // @[Mux.scala 27:72] + wire _T_4026 = _T_4019 & buf_ldfwd[1]; // @[Mux.scala 27:72] + wire _T_4027 = _T_4021 & buf_ldfwd[2]; // @[Mux.scala 27:72] + wire _T_4028 = _T_4023 & buf_ldfwd[3]; // @[Mux.scala 27:72] + wire _T_4029 = _T_4025 | _T_4026; // @[Mux.scala 27:72] + wire _T_4030 = _T_4029 | _T_4027; // @[Mux.scala 27:72] + wire _T_4031 = _T_4030 | _T_4028; // @[Mux.scala 27:72] + wire _T_4033 = _T_4007 & _T_4031; // @[el2_lsu_bus_buffer.scala 519:101] + wire _T_4034 = _GEN_173 == 3'h4; // @[el2_lsu_bus_buffer.scala 519:167] + wire _T_4035 = _T_4033 & _T_4034; // @[el2_lsu_bus_buffer.scala 519:138] + wire _T_4036 = _T_4035 & any_done_wait_state; // @[el2_lsu_bus_buffer.scala 519:187] + wire _T_4037 = _T_4011 | _T_4036; // @[el2_lsu_bus_buffer.scala 519:53] + wire _T_4060 = buf_state_bus_en_2 & bus_rsp_read; // @[el2_lsu_bus_buffer.scala 526:47] + wire _T_4061 = _T_4060 & io_lsu_bus_clk_en; // @[el2_lsu_bus_buffer.scala 526:62] + wire _T_4075 = ~buf_error_en_2; // @[el2_lsu_bus_buffer.scala 530:50] + wire _T_4076 = buf_state_en_2 & _T_4075; // @[el2_lsu_bus_buffer.scala 530:48] + wire _T_4088 = buf_ldfwd[2] | _T_4093[0]; // @[el2_lsu_bus_buffer.scala 533:90] + wire _T_4089 = _T_4088 | any_done_wait_state; // @[el2_lsu_bus_buffer.scala 533:118] + wire _GEN_181 = _T_4109 & buf_state_en_2; // @[Conditional.scala 39:67] + wire _GEN_184 = _T_4101 ? 1'h0 : _T_4109; // @[Conditional.scala 39:67] + wire _GEN_186 = _T_4101 ? 1'h0 : _GEN_181; // @[Conditional.scala 39:67] + wire _GEN_190 = _T_4083 ? 1'h0 : _GEN_184; // @[Conditional.scala 39:67] + wire _GEN_192 = _T_4083 ? 1'h0 : _GEN_186; // @[Conditional.scala 39:67] + wire _GEN_197 = _T_3996 & _T_4061; // @[Conditional.scala 39:67] + wire _GEN_200 = _T_3996 ? 1'h0 : _GEN_190; // @[Conditional.scala 39:67] + wire _GEN_202 = _T_3996 ? 1'h0 : _GEN_192; // @[Conditional.scala 39:67] + wire _GEN_208 = _T_3962 ? _T_3982 : _GEN_202; // @[Conditional.scala 39:67] + wire _GEN_210 = _T_3962 ? _T_3986 : _GEN_197; // @[Conditional.scala 39:67] + wire _GEN_214 = _T_3962 ? 1'h0 : _GEN_200; // @[Conditional.scala 39:67] + wire _GEN_220 = _T_3958 ? 1'h0 : _GEN_208; // @[Conditional.scala 39:67] + wire _GEN_222 = _T_3958 ? 1'h0 : _GEN_210; // @[Conditional.scala 39:67] + wire _GEN_226 = _T_3958 ? 1'h0 : _GEN_214; // @[Conditional.scala 39:67] + wire buf_wr_en_2 = _T_3935 & buf_state_en_2; // @[Conditional.scala 40:58] + wire buf_ldfwd_en_2 = _T_3935 ? 1'h0 : _GEN_220; // @[Conditional.scala 40:58] + wire buf_rst_2 = _T_3935 ? 1'h0 : _GEN_226; // @[Conditional.scala 40:58] + wire _T_4172 = buf_state_en_3 & _T_4243; // @[el2_lsu_bus_buffer.scala 510:44] + wire _T_4173 = _T_4172 & obuf_nosend; // @[el2_lsu_bus_buffer.scala 510:60] + wire _T_4175 = _T_4173 & _T_1354; // @[el2_lsu_bus_buffer.scala 510:74] + wire _T_4178 = _T_4168 & obuf_nosend; // @[el2_lsu_bus_buffer.scala 512:67] + wire _T_4179 = _T_4178 & bus_rsp_read; // @[el2_lsu_bus_buffer.scala 512:81] + wire _T_4182 = _T_4178 & bus_rsp_read_error; // @[el2_lsu_bus_buffer.scala 513:82] + wire _T_4257 = bus_rsp_read_error & _T_4236; // @[el2_lsu_bus_buffer.scala 527:91] + wire _T_4259 = bus_rsp_read_error & buf_ldfwd[3]; // @[el2_lsu_bus_buffer.scala 528:31] + wire _T_4261 = _T_4259 & _T_4238; // @[el2_lsu_bus_buffer.scala 528:46] + wire _T_4262 = _T_4257 | _T_4261; // @[el2_lsu_bus_buffer.scala 527:143] + wire _T_4265 = bus_rsp_write_error & _T_4234; // @[el2_lsu_bus_buffer.scala 529:53] + wire _T_4266 = _T_4262 | _T_4265; // @[el2_lsu_bus_buffer.scala 528:88] + wire _T_4267 = _T_4168 & _T_4266; // @[el2_lsu_bus_buffer.scala 527:68] + wire _GEN_274 = _T_4189 & _T_4267; // @[Conditional.scala 39:67] + wire _GEN_287 = _T_4155 ? _T_4182 : _GEN_274; // @[Conditional.scala 39:67] + wire _GEN_299 = _T_4151 ? 1'h0 : _GEN_287; // @[Conditional.scala 39:67] + wire buf_error_en_3 = _T_4128 ? 1'h0 : _GEN_299; // @[Conditional.scala 40:58] + wire _T_4193 = buf_write[3] & _T_3613; // @[el2_lsu_bus_buffer.scala 517:71] + wire _T_4194 = io_dec_tlu_force_halt | _T_4193; // @[el2_lsu_bus_buffer.scala 517:55] + wire _T_4196 = ~buf_samedw_3; // @[el2_lsu_bus_buffer.scala 518:30] + wire _T_4197 = buf_dual_3 & _T_4196; // @[el2_lsu_bus_buffer.scala 518:28] + wire _T_4200 = _T_4197 & _T_4243; // @[el2_lsu_bus_buffer.scala 518:45] + wire [2:0] _GEN_247 = 2'h1 == buf_dualtag_3 ? buf_state_1 : buf_state_0; // @[el2_lsu_bus_buffer.scala 518:90] + wire [2:0] _GEN_248 = 2'h2 == buf_dualtag_3 ? buf_state_2 : _GEN_247; // @[el2_lsu_bus_buffer.scala 518:90] + wire [2:0] _GEN_249 = 2'h3 == buf_dualtag_3 ? buf_state_3 : _GEN_248; // @[el2_lsu_bus_buffer.scala 518:90] + wire _T_4201 = _GEN_249 != 3'h4; // @[el2_lsu_bus_buffer.scala 518:90] + wire _T_4202 = _T_4200 & _T_4201; // @[el2_lsu_bus_buffer.scala 518:61] + wire _T_4204 = buf_ldfwd[3] | any_done_wait_state; // @[el2_lsu_bus_buffer.scala 519:31] + wire _T_4210 = buf_dualtag_3 == 2'h0; // @[el2_lsu_bus_buffer.scala 109:118] + wire _T_4212 = buf_dualtag_3 == 2'h1; // @[el2_lsu_bus_buffer.scala 109:118] + wire _T_4214 = buf_dualtag_3 == 2'h2; // @[el2_lsu_bus_buffer.scala 109:118] + wire _T_4216 = buf_dualtag_3 == 2'h3; // @[el2_lsu_bus_buffer.scala 109:118] + wire _T_4218 = _T_4210 & buf_ldfwd[0]; // @[Mux.scala 27:72] + wire _T_4219 = _T_4212 & buf_ldfwd[1]; // @[Mux.scala 27:72] + wire _T_4220 = _T_4214 & buf_ldfwd[2]; // @[Mux.scala 27:72] + wire _T_4221 = _T_4216 & buf_ldfwd[3]; // @[Mux.scala 27:72] + wire _T_4222 = _T_4218 | _T_4219; // @[Mux.scala 27:72] + wire _T_4223 = _T_4222 | _T_4220; // @[Mux.scala 27:72] + wire _T_4224 = _T_4223 | _T_4221; // @[Mux.scala 27:72] + wire _T_4226 = _T_4200 & _T_4224; // @[el2_lsu_bus_buffer.scala 519:101] + wire _T_4227 = _GEN_249 == 3'h4; // @[el2_lsu_bus_buffer.scala 519:167] + wire _T_4228 = _T_4226 & _T_4227; // @[el2_lsu_bus_buffer.scala 519:138] + wire _T_4229 = _T_4228 & any_done_wait_state; // @[el2_lsu_bus_buffer.scala 519:187] + wire _T_4230 = _T_4204 | _T_4229; // @[el2_lsu_bus_buffer.scala 519:53] + wire _T_4253 = buf_state_bus_en_3 & bus_rsp_read; // @[el2_lsu_bus_buffer.scala 526:47] + wire _T_4254 = _T_4253 & io_lsu_bus_clk_en; // @[el2_lsu_bus_buffer.scala 526:62] + wire _T_4268 = ~buf_error_en_3; // @[el2_lsu_bus_buffer.scala 530:50] + wire _T_4269 = buf_state_en_3 & _T_4268; // @[el2_lsu_bus_buffer.scala 530:48] + wire _T_4281 = buf_ldfwd[3] | _T_4286[0]; // @[el2_lsu_bus_buffer.scala 533:90] + wire _T_4282 = _T_4281 | any_done_wait_state; // @[el2_lsu_bus_buffer.scala 533:118] + wire _GEN_257 = _T_4302 & buf_state_en_3; // @[Conditional.scala 39:67] + wire _GEN_260 = _T_4294 ? 1'h0 : _T_4302; // @[Conditional.scala 39:67] + wire _GEN_262 = _T_4294 ? 1'h0 : _GEN_257; // @[Conditional.scala 39:67] + wire _GEN_266 = _T_4276 ? 1'h0 : _GEN_260; // @[Conditional.scala 39:67] + wire _GEN_268 = _T_4276 ? 1'h0 : _GEN_262; // @[Conditional.scala 39:67] + wire _GEN_273 = _T_4189 & _T_4254; // @[Conditional.scala 39:67] + wire _GEN_276 = _T_4189 ? 1'h0 : _GEN_266; // @[Conditional.scala 39:67] + wire _GEN_278 = _T_4189 ? 1'h0 : _GEN_268; // @[Conditional.scala 39:67] + wire _GEN_284 = _T_4155 ? _T_4175 : _GEN_278; // @[Conditional.scala 39:67] + wire _GEN_286 = _T_4155 ? _T_4179 : _GEN_273; // @[Conditional.scala 39:67] + wire _GEN_290 = _T_4155 ? 1'h0 : _GEN_276; // @[Conditional.scala 39:67] + wire _GEN_296 = _T_4151 ? 1'h0 : _GEN_284; // @[Conditional.scala 39:67] + wire _GEN_298 = _T_4151 ? 1'h0 : _GEN_286; // @[Conditional.scala 39:67] + wire _GEN_302 = _T_4151 ? 1'h0 : _GEN_290; // @[Conditional.scala 39:67] + wire buf_wr_en_3 = _T_4128 & buf_state_en_3; // @[Conditional.scala 40:58] + wire buf_ldfwd_en_3 = _T_4128 ? 1'h0 : _GEN_296; // @[Conditional.scala 40:58] + wire buf_rst_3 = _T_4128 ? 1'h0 : _GEN_302; // @[Conditional.scala 40:58] + reg _T_4357; // @[Reg.scala 27:20] + reg _T_4360; // @[Reg.scala 27:20] + reg _T_4363; // @[Reg.scala 27:20] + reg _T_4366; // @[Reg.scala 27:20] + wire [3:0] buf_unsign = {_T_4366,_T_4363,_T_4360,_T_4357}; // @[Cat.scala 29:58] + reg _T_4432; // @[el2_lsu_bus_buffer.scala 569:82] + reg _T_4427; // @[el2_lsu_bus_buffer.scala 569:82] + reg _T_4422; // @[el2_lsu_bus_buffer.scala 569:82] + reg _T_4417; // @[el2_lsu_bus_buffer.scala 569:82] + wire [3:0] buf_error = {_T_4432,_T_4427,_T_4422,_T_4417}; // @[Cat.scala 29:58] + wire _T_4414 = buf_error_en_0 | buf_error[0]; // @[el2_lsu_bus_buffer.scala 569:86] + wire _T_4415 = ~buf_rst_0; // @[el2_lsu_bus_buffer.scala 569:128] + wire _T_4419 = buf_error_en_1 | buf_error[1]; // @[el2_lsu_bus_buffer.scala 569:86] + wire _T_4420 = ~buf_rst_1; // @[el2_lsu_bus_buffer.scala 569:128] + wire _T_4424 = buf_error_en_2 | buf_error[2]; // @[el2_lsu_bus_buffer.scala 569:86] + wire _T_4425 = ~buf_rst_2; // @[el2_lsu_bus_buffer.scala 569:128] + wire _T_4429 = buf_error_en_3 | buf_error[3]; // @[el2_lsu_bus_buffer.scala 569:86] + wire _T_4430 = ~buf_rst_3; // @[el2_lsu_bus_buffer.scala 569:128] + wire [1:0] _T_4436 = {io_lsu_busreq_m,1'h0}; // @[Cat.scala 29:58] + wire [1:0] _T_4437 = io_ldst_dual_m ? _T_4436 : {{1'd0}, io_lsu_busreq_m}; // @[el2_lsu_bus_buffer.scala 572:28] + wire [1:0] _T_4438 = {io_lsu_busreq_r,1'h0}; // @[Cat.scala 29:58] + wire [1:0] _T_4439 = io_ldst_dual_r ? _T_4438 : {{1'd0}, io_lsu_busreq_r}; // @[el2_lsu_bus_buffer.scala 572:94] + wire [2:0] _T_4440 = _T_4437 + _T_4439; // @[el2_lsu_bus_buffer.scala 572:88] + wire [2:0] _GEN_380 = {{2'd0}, ibuf_valid}; // @[el2_lsu_bus_buffer.scala 572:154] + wire [3:0] _T_4441 = _T_4440 + _GEN_380; // @[el2_lsu_bus_buffer.scala 572:154] + wire [1:0] _T_4446 = _T_5 + _T_12; // @[el2_lsu_bus_buffer.scala 572:217] + wire [1:0] _GEN_381 = {{1'd0}, _T_19}; // @[el2_lsu_bus_buffer.scala 572:217] + wire [2:0] _T_4447 = _T_4446 + _GEN_381; // @[el2_lsu_bus_buffer.scala 572:217] + wire [2:0] _GEN_382 = {{2'd0}, _T_26}; // @[el2_lsu_bus_buffer.scala 572:217] + wire [3:0] _T_4448 = _T_4447 + _GEN_382; // @[el2_lsu_bus_buffer.scala 572:217] + wire [3:0] buf_numvld_any = _T_4441 + _T_4448; // @[el2_lsu_bus_buffer.scala 572:169] + wire _T_4519 = io_ldst_dual_d & io_dec_lsu_valid_raw_d; // @[el2_lsu_bus_buffer.scala 578:52] + wire _T_4520 = buf_numvld_any >= 4'h3; // @[el2_lsu_bus_buffer.scala 578:92] + wire _T_4521 = buf_numvld_any == 4'h4; // @[el2_lsu_bus_buffer.scala 578:121] + wire _T_4523 = |buf_state_0; // @[el2_lsu_bus_buffer.scala 579:52] + wire _T_4524 = |buf_state_1; // @[el2_lsu_bus_buffer.scala 579:52] + wire _T_4525 = |buf_state_2; // @[el2_lsu_bus_buffer.scala 579:52] + wire _T_4526 = |buf_state_3; // @[el2_lsu_bus_buffer.scala 579:52] + wire _T_4527 = _T_4523 | _T_4524; // @[el2_lsu_bus_buffer.scala 579:65] + wire _T_4528 = _T_4527 | _T_4525; // @[el2_lsu_bus_buffer.scala 579:65] + wire _T_4529 = _T_4528 | _T_4526; // @[el2_lsu_bus_buffer.scala 579:65] + wire _T_4530 = ~_T_4529; // @[el2_lsu_bus_buffer.scala 579:34] + wire _T_4532 = _T_4530 & _T_852; // @[el2_lsu_bus_buffer.scala 579:70] + wire _T_4535 = io_lsu_busreq_m & io_lsu_pkt_m_valid; // @[el2_lsu_bus_buffer.scala 581:51] + wire _T_4536 = _T_4535 & io_lsu_pkt_m_load; // @[el2_lsu_bus_buffer.scala 581:72] + wire _T_4537 = ~io_flush_m_up; // @[el2_lsu_bus_buffer.scala 581:94] + wire _T_4538 = _T_4536 & _T_4537; // @[el2_lsu_bus_buffer.scala 581:92] + wire _T_4539 = ~io_ld_full_hit_m; // @[el2_lsu_bus_buffer.scala 581:111] + wire _T_4541 = ~io_lsu_commit_r; // @[el2_lsu_bus_buffer.scala 584:61] + reg lsu_nonblock_load_valid_r; // @[el2_lsu_bus_buffer.scala 669:66] + wire _T_4559 = _T_2820 & _T_3664; // @[Mux.scala 27:72] + wire _T_4560 = _T_2842 & _T_3857; // @[Mux.scala 27:72] + wire _T_4561 = _T_2864 & _T_4050; // @[Mux.scala 27:72] + wire _T_4562 = _T_2886 & _T_4243; // @[Mux.scala 27:72] + wire _T_4563 = _T_4559 | _T_4560; // @[Mux.scala 27:72] + wire _T_4564 = _T_4563 | _T_4561; // @[Mux.scala 27:72] + wire lsu_nonblock_load_data_ready = _T_4564 | _T_4562; // @[Mux.scala 27:72] + wire _T_4570 = buf_error[0] & _T_3664; // @[el2_lsu_bus_buffer.scala 587:108] + wire _T_4575 = buf_error[1] & _T_3857; // @[el2_lsu_bus_buffer.scala 587:108] + wire _T_4580 = buf_error[2] & _T_4050; // @[el2_lsu_bus_buffer.scala 587:108] + wire _T_4585 = buf_error[3] & _T_4243; // @[el2_lsu_bus_buffer.scala 587:108] + wire _T_4586 = _T_2820 & _T_4570; // @[Mux.scala 27:72] + wire _T_4587 = _T_2842 & _T_4575; // @[Mux.scala 27:72] + wire _T_4588 = _T_2864 & _T_4580; // @[Mux.scala 27:72] + wire _T_4589 = _T_2886 & _T_4585; // @[Mux.scala 27:72] + wire _T_4590 = _T_4586 | _T_4587; // @[Mux.scala 27:72] + wire _T_4591 = _T_4590 | _T_4588; // @[Mux.scala 27:72] + wire _T_4598 = ~buf_dual_0; // @[el2_lsu_bus_buffer.scala 588:109] + wire _T_4599 = ~buf_dualhi_0; // @[el2_lsu_bus_buffer.scala 588:124] + wire _T_4600 = _T_4598 | _T_4599; // @[el2_lsu_bus_buffer.scala 588:122] + wire _T_4601 = _T_4559 & _T_4600; // @[el2_lsu_bus_buffer.scala 588:106] + wire _T_4606 = ~buf_dual_1; // @[el2_lsu_bus_buffer.scala 588:109] + wire _T_4607 = ~buf_dualhi_1; // @[el2_lsu_bus_buffer.scala 588:124] + wire _T_4608 = _T_4606 | _T_4607; // @[el2_lsu_bus_buffer.scala 588:122] + wire _T_4609 = _T_4560 & _T_4608; // @[el2_lsu_bus_buffer.scala 588:106] + wire _T_4614 = ~buf_dual_2; // @[el2_lsu_bus_buffer.scala 588:109] + wire _T_4615 = ~buf_dualhi_2; // @[el2_lsu_bus_buffer.scala 588:124] + wire _T_4616 = _T_4614 | _T_4615; // @[el2_lsu_bus_buffer.scala 588:122] + wire _T_4617 = _T_4561 & _T_4616; // @[el2_lsu_bus_buffer.scala 588:106] + wire _T_4622 = ~buf_dual_3; // @[el2_lsu_bus_buffer.scala 588:109] + wire _T_4623 = ~buf_dualhi_3; // @[el2_lsu_bus_buffer.scala 588:124] + wire _T_4624 = _T_4622 | _T_4623; // @[el2_lsu_bus_buffer.scala 588:122] + wire _T_4625 = _T_4562 & _T_4624; // @[el2_lsu_bus_buffer.scala 588:106] + wire [1:0] _T_4628 = _T_4617 ? 2'h2 : 2'h0; // @[Mux.scala 27:72] + wire [1:0] _T_4629 = _T_4625 ? 2'h3 : 2'h0; // @[Mux.scala 27:72] + wire [1:0] _GEN_383 = {{1'd0}, _T_4609}; // @[Mux.scala 27:72] + wire [1:0] _T_4631 = _GEN_383 | _T_4628; // @[Mux.scala 27:72] + wire [31:0] _T_4666 = _T_4601 ? buf_data_0 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4667 = _T_4609 ? buf_data_1 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4668 = _T_4617 ? buf_data_2 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4669 = _T_4625 ? buf_data_3 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4670 = _T_4666 | _T_4667; // @[Mux.scala 27:72] + wire [31:0] _T_4671 = _T_4670 | _T_4668; // @[Mux.scala 27:72] + wire [31:0] lsu_nonblock_load_data_lo = _T_4671 | _T_4669; // @[Mux.scala 27:72] + wire _T_4677 = buf_dual_0 | buf_dualhi_0; // @[el2_lsu_bus_buffer.scala 590:120] + wire _T_4678 = _T_4559 & _T_4677; // @[el2_lsu_bus_buffer.scala 590:105] + wire _T_4683 = buf_dual_1 | buf_dualhi_1; // @[el2_lsu_bus_buffer.scala 590:120] + wire _T_4684 = _T_4560 & _T_4683; // @[el2_lsu_bus_buffer.scala 590:105] + wire _T_4689 = buf_dual_2 | buf_dualhi_2; // @[el2_lsu_bus_buffer.scala 590:120] + wire _T_4690 = _T_4561 & _T_4689; // @[el2_lsu_bus_buffer.scala 590:105] + wire _T_4695 = buf_dual_3 | buf_dualhi_3; // @[el2_lsu_bus_buffer.scala 590:120] + wire _T_4696 = _T_4562 & _T_4695; // @[el2_lsu_bus_buffer.scala 590:105] + wire [31:0] _T_4697 = _T_4678 ? buf_data_0 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4698 = _T_4684 ? buf_data_1 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4699 = _T_4690 ? buf_data_2 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4700 = _T_4696 ? buf_data_3 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4701 = _T_4697 | _T_4698; // @[Mux.scala 27:72] + wire [31:0] _T_4702 = _T_4701 | _T_4699; // @[Mux.scala 27:72] + wire [31:0] lsu_nonblock_load_data_hi = _T_4702 | _T_4700; // @[Mux.scala 27:72] + wire _T_4704 = io_lsu_nonblock_load_data_tag == 2'h0; // @[el2_lsu_bus_buffer.scala 110:123] + wire _T_4705 = io_lsu_nonblock_load_data_tag == 2'h1; // @[el2_lsu_bus_buffer.scala 110:123] + wire _T_4706 = io_lsu_nonblock_load_data_tag == 2'h2; // @[el2_lsu_bus_buffer.scala 110:123] + wire _T_4707 = io_lsu_nonblock_load_data_tag == 2'h3; // @[el2_lsu_bus_buffer.scala 110:123] + wire [31:0] _T_4708 = _T_4704 ? buf_addr_0 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4709 = _T_4705 ? buf_addr_1 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4710 = _T_4706 ? buf_addr_2 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4711 = _T_4707 ? buf_addr_3 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4712 = _T_4708 | _T_4709; // @[Mux.scala 27:72] + wire [31:0] _T_4713 = _T_4712 | _T_4710; // @[Mux.scala 27:72] + wire [31:0] _T_4714 = _T_4713 | _T_4711; // @[Mux.scala 27:72] + wire [1:0] lsu_nonblock_addr_offset = _T_4714[1:0]; // @[el2_lsu_bus_buffer.scala 591:83] + wire [1:0] _T_4720 = _T_4704 ? buf_sz_0 : 2'h0; // @[Mux.scala 27:72] + wire [1:0] _T_4721 = _T_4705 ? buf_sz_1 : 2'h0; // @[Mux.scala 27:72] + wire [1:0] _T_4722 = _T_4706 ? buf_sz_2 : 2'h0; // @[Mux.scala 27:72] + wire [1:0] _T_4723 = _T_4707 ? buf_sz_3 : 2'h0; // @[Mux.scala 27:72] + wire [1:0] _T_4724 = _T_4720 | _T_4721; // @[Mux.scala 27:72] + wire [1:0] _T_4725 = _T_4724 | _T_4722; // @[Mux.scala 27:72] + wire [1:0] lsu_nonblock_sz = _T_4725 | _T_4723; // @[Mux.scala 27:72] + wire _T_4735 = _T_4704 & buf_unsign[0]; // @[Mux.scala 27:72] + wire _T_4736 = _T_4705 & buf_unsign[1]; // @[Mux.scala 27:72] + wire _T_4737 = _T_4706 & buf_unsign[2]; // @[Mux.scala 27:72] + wire _T_4738 = _T_4707 & buf_unsign[3]; // @[Mux.scala 27:72] + wire _T_4739 = _T_4735 | _T_4736; // @[Mux.scala 27:72] + wire _T_4740 = _T_4739 | _T_4737; // @[Mux.scala 27:72] + wire lsu_nonblock_unsign = _T_4740 | _T_4738; // @[Mux.scala 27:72] + wire [63:0] _T_4760 = {lsu_nonblock_load_data_hi,lsu_nonblock_load_data_lo}; // @[Cat.scala 29:58] + wire [3:0] _GEN_384 = {{2'd0}, lsu_nonblock_addr_offset}; // @[el2_lsu_bus_buffer.scala 595:121] + wire [5:0] _T_4761 = _GEN_384 * 4'h8; // @[el2_lsu_bus_buffer.scala 595:121] + wire [63:0] lsu_nonblock_data_unalgn = _T_4760 >> _T_4761; // @[el2_lsu_bus_buffer.scala 595:92] + wire _T_4762 = ~io_lsu_nonblock_load_data_error; // @[el2_lsu_bus_buffer.scala 597:69] + wire _T_4764 = lsu_nonblock_sz == 2'h0; // @[el2_lsu_bus_buffer.scala 598:81] + wire _T_4765 = lsu_nonblock_unsign & _T_4764; // @[el2_lsu_bus_buffer.scala 598:63] + wire [31:0] _T_4767 = {24'h0,lsu_nonblock_data_unalgn[7:0]}; // @[Cat.scala 29:58] + wire _T_4768 = lsu_nonblock_sz == 2'h1; // @[el2_lsu_bus_buffer.scala 599:45] + wire _T_4769 = lsu_nonblock_unsign & _T_4768; // @[el2_lsu_bus_buffer.scala 599:26] + wire [31:0] _T_4771 = {16'h0,lsu_nonblock_data_unalgn[15:0]}; // @[Cat.scala 29:58] + wire _T_4772 = ~lsu_nonblock_unsign; // @[el2_lsu_bus_buffer.scala 600:6] + wire _T_4774 = _T_4772 & _T_4764; // @[el2_lsu_bus_buffer.scala 600:27] + wire [23:0] _T_4777 = lsu_nonblock_data_unalgn[7] ? 24'hffffff : 24'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_4779 = {_T_4777,lsu_nonblock_data_unalgn[7:0]}; // @[Cat.scala 29:58] + wire _T_4782 = _T_4772 & _T_4768; // @[el2_lsu_bus_buffer.scala 601:27] + wire [15:0] _T_4785 = lsu_nonblock_data_unalgn[15] ? 16'hffff : 16'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_4787 = {_T_4785,lsu_nonblock_data_unalgn[15:0]}; // @[Cat.scala 29:58] + wire _T_4788 = lsu_nonblock_sz == 2'h2; // @[el2_lsu_bus_buffer.scala 602:21] + wire [31:0] _T_4789 = _T_4765 ? _T_4767 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4790 = _T_4769 ? _T_4771 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4791 = _T_4774 ? _T_4779 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4792 = _T_4782 ? _T_4787 : 32'h0; // @[Mux.scala 27:72] + wire [63:0] _T_4793 = _T_4788 ? lsu_nonblock_data_unalgn : 64'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4794 = _T_4789 | _T_4790; // @[Mux.scala 27:72] + wire [31:0] _T_4795 = _T_4794 | _T_4791; // @[Mux.scala 27:72] + wire [31:0] _T_4796 = _T_4795 | _T_4792; // @[Mux.scala 27:72] + wire [63:0] _GEN_385 = {{32'd0}, _T_4796}; // @[Mux.scala 27:72] + wire [63:0] _T_4797 = _GEN_385 | _T_4793; // @[Mux.scala 27:72] + wire _T_4892 = obuf_valid & obuf_write; // @[el2_lsu_bus_buffer.scala 620:36] + wire _T_4893 = ~obuf_cmd_done; // @[el2_lsu_bus_buffer.scala 620:51] + wire _T_4894 = _T_4892 & _T_4893; // @[el2_lsu_bus_buffer.scala 620:49] + wire [31:0] _T_4898 = {obuf_addr[31:3],3'h0}; // @[Cat.scala 29:58] + wire [2:0] _T_4900 = {1'h0,obuf_sz}; // @[Cat.scala 29:58] + wire _T_4905 = ~obuf_data_done; // @[el2_lsu_bus_buffer.scala 632:50] + wire _T_4906 = _T_4892 & _T_4905; // @[el2_lsu_bus_buffer.scala 632:48] + wire [7:0] _T_4910 = obuf_write ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire _T_4913 = obuf_valid & _T_1364; // @[el2_lsu_bus_buffer.scala 637:36] + wire _T_4915 = _T_4913 & _T_1370; // @[el2_lsu_bus_buffer.scala 637:50] + wire _T_4927 = io_lsu_bus_clk_en_q & buf_error[0]; // @[el2_lsu_bus_buffer.scala 650:114] + wire _T_4929 = _T_4927 & buf_write[0]; // @[el2_lsu_bus_buffer.scala 650:129] + wire _T_4932 = io_lsu_bus_clk_en_q & buf_error[1]; // @[el2_lsu_bus_buffer.scala 650:114] + wire _T_4934 = _T_4932 & buf_write[1]; // @[el2_lsu_bus_buffer.scala 650:129] + wire _T_4937 = io_lsu_bus_clk_en_q & buf_error[2]; // @[el2_lsu_bus_buffer.scala 650:114] + wire _T_4939 = _T_4937 & buf_write[2]; // @[el2_lsu_bus_buffer.scala 650:129] + wire _T_4942 = io_lsu_bus_clk_en_q & buf_error[3]; // @[el2_lsu_bus_buffer.scala 650:114] + wire _T_4944 = _T_4942 & buf_write[3]; // @[el2_lsu_bus_buffer.scala 650:129] + wire _T_4945 = _T_2820 & _T_4929; // @[Mux.scala 27:72] + wire _T_4946 = _T_2842 & _T_4934; // @[Mux.scala 27:72] + wire _T_4947 = _T_2864 & _T_4939; // @[Mux.scala 27:72] + wire _T_4948 = _T_2886 & _T_4944; // @[Mux.scala 27:72] + wire _T_4949 = _T_4945 | _T_4946; // @[Mux.scala 27:72] + wire _T_4950 = _T_4949 | _T_4947; // @[Mux.scala 27:72] + wire _T_4960 = _T_2842 & buf_error[1]; // @[el2_lsu_bus_buffer.scala 651:98] + wire lsu_imprecise_error_store_tag = _T_4960 & buf_write[1]; // @[el2_lsu_bus_buffer.scala 651:113] + wire _T_4966 = ~io_lsu_imprecise_error_store_any; // @[el2_lsu_bus_buffer.scala 653:72] + wire _T_4968 = ~lsu_imprecise_error_store_tag; // @[el2_lsu_bus_buffer.scala 110:123] + wire [31:0] _T_4970 = _T_4968 ? buf_addr_0 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4971 = lsu_imprecise_error_store_tag ? buf_addr_1 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4972 = _T_4970 | _T_4971; // @[Mux.scala 27:72] + wire _T_4989 = bus_wcmd_sent | bus_wdata_sent; // @[el2_lsu_bus_buffer.scala 660:68] + wire _T_4992 = io_lsu_busreq_r & io_ldst_dual_r; // @[el2_lsu_bus_buffer.scala 661:48] + wire _T_4995 = ~io_lsu_axi_awready; // @[el2_lsu_bus_buffer.scala 664:48] + wire _T_4996 = io_lsu_axi_awvalid & _T_4995; // @[el2_lsu_bus_buffer.scala 664:46] + wire _T_4997 = ~io_lsu_axi_wready; // @[el2_lsu_bus_buffer.scala 664:92] + wire _T_4998 = io_lsu_axi_wvalid & _T_4997; // @[el2_lsu_bus_buffer.scala 664:90] + wire _T_4999 = _T_4996 | _T_4998; // @[el2_lsu_bus_buffer.scala 664:69] + wire _T_5000 = ~io_lsu_axi_arready; // @[el2_lsu_bus_buffer.scala 664:136] + wire _T_5001 = io_lsu_axi_arvalid & _T_5000; // @[el2_lsu_bus_buffer.scala 664:134] + wire _T_5005 = ~io_flush_r; // @[el2_lsu_bus_buffer.scala 668:75] + wire _T_5006 = io_lsu_busreq_m & _T_5005; // @[el2_lsu_bus_buffer.scala 668:73] + reg _T_5009; // @[el2_lsu_bus_buffer.scala 668:56] + rvclkhdr rvclkhdr ( // @[el2_lib.scala 506:23] + .io_l1clk(rvclkhdr_io_l1clk), + .io_clk(rvclkhdr_io_clk), + .io_en(rvclkhdr_io_en), + .io_scan_mode(rvclkhdr_io_scan_mode) + ); + rvclkhdr rvclkhdr_1 ( // @[el2_lib.scala 506:23] + .io_l1clk(rvclkhdr_1_io_l1clk), + .io_clk(rvclkhdr_1_io_clk), + .io_en(rvclkhdr_1_io_en), + .io_scan_mode(rvclkhdr_1_io_scan_mode) + ); + rvclkhdr rvclkhdr_2 ( // @[el2_lib.scala 506:23] + .io_l1clk(rvclkhdr_2_io_l1clk), + .io_clk(rvclkhdr_2_io_clk), + .io_en(rvclkhdr_2_io_en), + .io_scan_mode(rvclkhdr_2_io_scan_mode) + ); + rvclkhdr rvclkhdr_3 ( // @[el2_lib.scala 506:23] + .io_l1clk(rvclkhdr_3_io_l1clk), + .io_clk(rvclkhdr_3_io_clk), + .io_en(rvclkhdr_3_io_en), + .io_scan_mode(rvclkhdr_3_io_scan_mode) + ); + rvclkhdr rvclkhdr_4 ( // @[el2_lib.scala 506:23] + .io_l1clk(rvclkhdr_4_io_l1clk), + .io_clk(rvclkhdr_4_io_clk), + .io_en(rvclkhdr_4_io_en), + .io_scan_mode(rvclkhdr_4_io_scan_mode) + ); + rvclkhdr rvclkhdr_5 ( // @[el2_lib.scala 506:23] + .io_l1clk(rvclkhdr_5_io_l1clk), + .io_clk(rvclkhdr_5_io_clk), + .io_en(rvclkhdr_5_io_en), + .io_scan_mode(rvclkhdr_5_io_scan_mode) + ); + rvclkhdr rvclkhdr_6 ( // @[el2_lib.scala 506:23] + .io_l1clk(rvclkhdr_6_io_l1clk), + .io_clk(rvclkhdr_6_io_clk), + .io_en(rvclkhdr_6_io_en), + .io_scan_mode(rvclkhdr_6_io_scan_mode) + ); + rvclkhdr rvclkhdr_7 ( // @[el2_lib.scala 506:23] + .io_l1clk(rvclkhdr_7_io_l1clk), + .io_clk(rvclkhdr_7_io_clk), + .io_en(rvclkhdr_7_io_en), + .io_scan_mode(rvclkhdr_7_io_scan_mode) + ); + rvclkhdr rvclkhdr_8 ( // @[el2_lib.scala 506:23] + .io_l1clk(rvclkhdr_8_io_l1clk), + .io_clk(rvclkhdr_8_io_clk), + .io_en(rvclkhdr_8_io_en), + .io_scan_mode(rvclkhdr_8_io_scan_mode) + ); + rvclkhdr rvclkhdr_9 ( // @[el2_lib.scala 506:23] + .io_l1clk(rvclkhdr_9_io_l1clk), + .io_clk(rvclkhdr_9_io_clk), + .io_en(rvclkhdr_9_io_en), + .io_scan_mode(rvclkhdr_9_io_scan_mode) + ); + rvclkhdr rvclkhdr_10 ( // @[el2_lib.scala 506:23] + .io_l1clk(rvclkhdr_10_io_l1clk), + .io_clk(rvclkhdr_10_io_clk), + .io_en(rvclkhdr_10_io_en), + .io_scan_mode(rvclkhdr_10_io_scan_mode) + ); + rvclkhdr rvclkhdr_11 ( // @[el2_lib.scala 506:23] + .io_l1clk(rvclkhdr_11_io_l1clk), + .io_clk(rvclkhdr_11_io_clk), + .io_en(rvclkhdr_11_io_en), + .io_scan_mode(rvclkhdr_11_io_scan_mode) + ); + assign io_lsu_busreq_r = _T_5009; // @[el2_lsu_bus_buffer.scala 668:19] + assign io_lsu_bus_buffer_pend_any = |buf_numvld_pend_any; // @[el2_lsu_bus_buffer.scala 577:30] + assign io_lsu_bus_buffer_full_any = _T_4519 ? _T_4520 : _T_4521; // @[el2_lsu_bus_buffer.scala 578:30] + assign io_lsu_bus_buffer_empty_any = _T_4532 & _T_1252; // @[el2_lsu_bus_buffer.scala 579:31] + assign io_ld_byte_hit_buf_lo = {_T_69,_T_58}; // @[el2_lsu_bus_buffer.scala 189:25] + assign io_ld_byte_hit_buf_hi = {_T_84,_T_73}; // @[el2_lsu_bus_buffer.scala 190:25] + assign io_ld_fwddata_buf_lo = _T_650 | _T_651; // @[el2_lsu_bus_buffer.scala 216:24] + assign io_ld_fwddata_buf_hi = _T_747 | _T_748; // @[el2_lsu_bus_buffer.scala 222:24] + assign io_lsu_imprecise_error_load_any = io_lsu_nonblock_load_data_error & _T_4966; // @[el2_lsu_bus_buffer.scala 653:35] + assign io_lsu_imprecise_error_store_any = _T_4950 | _T_4948; // @[el2_lsu_bus_buffer.scala 650:36] + assign io_lsu_imprecise_error_addr_any = io_lsu_imprecise_error_store_any ? _T_4972 : _T_4714; // @[el2_lsu_bus_buffer.scala 654:35] + assign io_lsu_nonblock_load_valid_m = _T_4538 & _T_4539; // @[el2_lsu_bus_buffer.scala 581:32] + assign io_lsu_nonblock_load_tag_m = _T_1884 ? 2'h0 : _T_1920; // @[el2_lsu_bus_buffer.scala 582:30] + assign io_lsu_nonblock_load_inv_r = lsu_nonblock_load_valid_r & _T_4541; // @[el2_lsu_bus_buffer.scala 584:30] + assign io_lsu_nonblock_load_inv_tag_r = WrPtr0_r; // @[el2_lsu_bus_buffer.scala 585:34] + assign io_lsu_nonblock_load_data_valid = lsu_nonblock_load_data_ready & _T_4762; // @[el2_lsu_bus_buffer.scala 597:35] + assign io_lsu_nonblock_load_data_error = _T_4591 | _T_4589; // @[el2_lsu_bus_buffer.scala 587:35] + assign io_lsu_nonblock_load_data_tag = _T_4631 | _T_4629; // @[el2_lsu_bus_buffer.scala 588:33] + assign io_lsu_nonblock_load_data = _T_4797[31:0]; // @[el2_lsu_bus_buffer.scala 598:29] + assign io_lsu_pmu_bus_trxn = _T_4989 | _T_4884; // @[el2_lsu_bus_buffer.scala 660:23] + assign io_lsu_pmu_bus_misaligned = _T_4992 & io_lsu_commit_r; // @[el2_lsu_bus_buffer.scala 661:29] + assign io_lsu_pmu_bus_error = io_lsu_imprecise_error_load_any | io_lsu_imprecise_error_store_any; // @[el2_lsu_bus_buffer.scala 662:24] + assign io_lsu_pmu_bus_busy = _T_4999 | _T_5001; // @[el2_lsu_bus_buffer.scala 664:23] + assign io_lsu_axi_awvalid = _T_4894 & _T_1260; // @[el2_lsu_bus_buffer.scala 620:22] + assign io_lsu_axi_awid = {{1'd0}, _T_1869}; // @[el2_lsu_bus_buffer.scala 621:19] + assign io_lsu_axi_awaddr = obuf_sideeffect ? obuf_addr : _T_4898; // @[el2_lsu_bus_buffer.scala 622:21] + assign io_lsu_axi_awregion = obuf_addr[31:28]; // @[el2_lsu_bus_buffer.scala 626:23] + assign io_lsu_axi_awsize = obuf_sideeffect ? _T_4900 : 3'h3; // @[el2_lsu_bus_buffer.scala 623:21] + assign io_lsu_axi_awcache = obuf_sideeffect ? 4'h0 : 4'hf; // @[el2_lsu_bus_buffer.scala 625:22] + assign io_lsu_axi_wvalid = _T_4906 & _T_1260; // @[el2_lsu_bus_buffer.scala 632:21] + assign io_lsu_axi_wdata = obuf_data; // @[el2_lsu_bus_buffer.scala 634:20] + assign io_lsu_axi_wstrb = obuf_byteen & _T_4910; // @[el2_lsu_bus_buffer.scala 633:20] + assign io_lsu_axi_bready = 1'h1; // @[el2_lsu_bus_buffer.scala 648:21] + assign io_lsu_axi_arvalid = _T_4915 & _T_1260; // @[el2_lsu_bus_buffer.scala 637:22] + assign io_lsu_axi_arid = {{1'd0}, _T_1869}; // @[el2_lsu_bus_buffer.scala 638:19] + assign io_lsu_axi_araddr = obuf_sideeffect ? obuf_addr : _T_4898; // @[el2_lsu_bus_buffer.scala 639:21] + assign io_lsu_axi_arregion = obuf_addr[31:28]; // @[el2_lsu_bus_buffer.scala 643:23] + assign io_lsu_axi_arsize = obuf_sideeffect ? _T_4900 : 3'h3; // @[el2_lsu_bus_buffer.scala 640:21] + assign io_lsu_axi_arcache = obuf_sideeffect ? 4'h0 : 4'hf; // @[el2_lsu_bus_buffer.scala 642:22] + assign io_lsu_axi_rready = 1'h1; // @[el2_lsu_bus_buffer.scala 649:21] + assign rvclkhdr_io_clk = clock; // @[el2_lib.scala 508:18] + assign rvclkhdr_io_en = _T_853 & _T_854; // @[el2_lib.scala 509:17] + assign rvclkhdr_io_scan_mode = io_scan_mode; // @[el2_lib.scala 510:24] + assign rvclkhdr_1_io_clk = clock; // @[el2_lib.scala 508:18] + assign rvclkhdr_1_io_en = _T_853 & _T_854; // @[el2_lib.scala 509:17] + assign rvclkhdr_1_io_scan_mode = io_scan_mode; // @[el2_lib.scala 510:24] + assign rvclkhdr_2_io_clk = io_lsu_busm_clk; // @[el2_lib.scala 508:18] + assign rvclkhdr_2_io_en = _T_1261 & io_lsu_bus_clk_en; // @[el2_lib.scala 509:17] + assign rvclkhdr_2_io_scan_mode = io_scan_mode; // @[el2_lib.scala 510:24] + assign rvclkhdr_3_io_clk = io_lsu_busm_clk; // @[el2_lib.scala 508:18] + assign rvclkhdr_3_io_en = _T_1261 & io_lsu_bus_clk_en; // @[el2_lib.scala 509:17] + assign rvclkhdr_3_io_scan_mode = io_scan_mode; // @[el2_lib.scala 510:24] + assign rvclkhdr_4_io_clk = clock; // @[el2_lib.scala 508:18] + assign rvclkhdr_4_io_en = _T_3549 & buf_state_en_0; // @[el2_lib.scala 509:17] + assign rvclkhdr_4_io_scan_mode = io_scan_mode; // @[el2_lib.scala 510:24] + assign rvclkhdr_5_io_clk = clock; // @[el2_lib.scala 508:18] + assign rvclkhdr_5_io_en = _T_3742 & buf_state_en_1; // @[el2_lib.scala 509:17] + assign rvclkhdr_5_io_scan_mode = io_scan_mode; // @[el2_lib.scala 510:24] + assign rvclkhdr_6_io_clk = clock; // @[el2_lib.scala 508:18] + assign rvclkhdr_6_io_en = _T_3935 & buf_state_en_2; // @[el2_lib.scala 509:17] + assign rvclkhdr_6_io_scan_mode = io_scan_mode; // @[el2_lib.scala 510:24] + assign rvclkhdr_7_io_clk = clock; // @[el2_lib.scala 508:18] + assign rvclkhdr_7_io_en = _T_4128 & buf_state_en_3; // @[el2_lib.scala 509:17] + assign rvclkhdr_7_io_scan_mode = io_scan_mode; // @[el2_lib.scala 510:24] + assign rvclkhdr_8_io_clk = clock; // @[el2_lib.scala 508:18] + assign rvclkhdr_8_io_en = _T_3549 ? buf_state_en_0 : _GEN_70; // @[el2_lib.scala 509:17] + assign rvclkhdr_8_io_scan_mode = io_scan_mode; // @[el2_lib.scala 510:24] + assign rvclkhdr_9_io_clk = clock; // @[el2_lib.scala 508:18] + assign rvclkhdr_9_io_en = _T_3742 ? buf_state_en_1 : _GEN_146; // @[el2_lib.scala 509:17] + assign rvclkhdr_9_io_scan_mode = io_scan_mode; // @[el2_lib.scala 510:24] + assign rvclkhdr_10_io_clk = clock; // @[el2_lib.scala 508:18] + assign rvclkhdr_10_io_en = _T_3935 ? buf_state_en_2 : _GEN_222; // @[el2_lib.scala 509:17] + assign rvclkhdr_10_io_scan_mode = io_scan_mode; // @[el2_lib.scala 510:24] + assign rvclkhdr_11_io_clk = clock; // @[el2_lib.scala 508:18] + assign rvclkhdr_11_io_en = _T_4128 ? buf_state_en_3 : _GEN_298; // @[el2_lib.scala 509:17] + assign rvclkhdr_11_io_scan_mode = io_scan_mode; // @[el2_lib.scala 510:24] +`ifdef RANDOMIZE_GARBAGE_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_INVALID_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_REG_INIT +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_MEM_INIT +`define RANDOMIZE +`endif +`ifndef RANDOM +`define RANDOM $random +`endif +`ifdef RANDOMIZE_MEM_INIT + integer initvar; +`endif +`ifndef SYNTHESIS +`ifdef FIRRTL_BEFORE_INITIAL +`FIRRTL_BEFORE_INITIAL +`endif +initial begin + `ifdef RANDOMIZE + `ifdef INIT_RANDOM + `INIT_RANDOM + `endif + `ifndef VERILATOR + `ifdef RANDOMIZE_DELAY + #`RANDOMIZE_DELAY begin end + `else + #0.002 begin end + `endif + `endif +`ifdef RANDOMIZE_REG_INIT + _RAND_0 = {1{`RANDOM}}; + buf_addr_0 = _RAND_0[31:0]; + _RAND_1 = {1{`RANDOM}}; + _T_4381 = _RAND_1[0:0]; + _RAND_2 = {1{`RANDOM}}; + _T_4378 = _RAND_2[0:0]; + _RAND_3 = {1{`RANDOM}}; + _T_4375 = _RAND_3[0:0]; + _RAND_4 = {1{`RANDOM}}; + _T_4372 = _RAND_4[0:0]; + _RAND_5 = {1{`RANDOM}}; + buf_state_0 = _RAND_5[2:0]; + _RAND_6 = {1{`RANDOM}}; + buf_addr_1 = _RAND_6[31:0]; + _RAND_7 = {1{`RANDOM}}; + buf_state_1 = _RAND_7[2:0]; + _RAND_8 = {1{`RANDOM}}; + buf_addr_2 = _RAND_8[31:0]; + _RAND_9 = {1{`RANDOM}}; + buf_state_2 = _RAND_9[2:0]; + _RAND_10 = {1{`RANDOM}}; + buf_addr_3 = _RAND_10[31:0]; + _RAND_11 = {1{`RANDOM}}; + buf_state_3 = _RAND_11[2:0]; + _RAND_12 = {1{`RANDOM}}; + buf_byteen_3 = _RAND_12[3:0]; + _RAND_13 = {1{`RANDOM}}; + buf_byteen_2 = _RAND_13[3:0]; + _RAND_14 = {1{`RANDOM}}; + buf_byteen_1 = _RAND_14[3:0]; + _RAND_15 = {1{`RANDOM}}; + buf_byteen_0 = _RAND_15[3:0]; + _RAND_16 = {1{`RANDOM}}; + buf_ageQ_3 = _RAND_16[3:0]; + _RAND_17 = {1{`RANDOM}}; + _T_1869 = _RAND_17[1:0]; + _RAND_18 = {1{`RANDOM}}; + obuf_merge = _RAND_18[0:0]; + _RAND_19 = {1{`RANDOM}}; + obuf_tag1 = _RAND_19[1:0]; + _RAND_20 = {1{`RANDOM}}; + obuf_valid = _RAND_20[0:0]; + _RAND_21 = {1{`RANDOM}}; + obuf_wr_enQ = _RAND_21[0:0]; + _RAND_22 = {1{`RANDOM}}; + ibuf_addr = _RAND_22[31:0]; + _RAND_23 = {1{`RANDOM}}; + ibuf_write = _RAND_23[0:0]; + _RAND_24 = {1{`RANDOM}}; + ibuf_valid = _RAND_24[0:0]; + _RAND_25 = {1{`RANDOM}}; + ibuf_byteen = _RAND_25[3:0]; + _RAND_26 = {1{`RANDOM}}; + buf_ageQ_2 = _RAND_26[3:0]; + _RAND_27 = {1{`RANDOM}}; + buf_ageQ_1 = _RAND_27[3:0]; + _RAND_28 = {1{`RANDOM}}; + buf_ageQ_0 = _RAND_28[3:0]; + _RAND_29 = {1{`RANDOM}}; + buf_data_0 = _RAND_29[31:0]; + _RAND_30 = {1{`RANDOM}}; + buf_data_1 = _RAND_30[31:0]; + _RAND_31 = {1{`RANDOM}}; + buf_data_2 = _RAND_31[31:0]; + _RAND_32 = {1{`RANDOM}}; + buf_data_3 = _RAND_32[31:0]; + _RAND_33 = {1{`RANDOM}}; + ibuf_data = _RAND_33[31:0]; + _RAND_34 = {1{`RANDOM}}; + ibuf_timer = _RAND_34[2:0]; + _RAND_35 = {1{`RANDOM}}; + ibuf_sideeffect = _RAND_35[0:0]; + _RAND_36 = {1{`RANDOM}}; + WrPtr1_r = _RAND_36[1:0]; + _RAND_37 = {1{`RANDOM}}; + WrPtr0_r = _RAND_37[1:0]; + _RAND_38 = {1{`RANDOM}}; + ibuf_tag = _RAND_38[1:0]; + _RAND_39 = {1{`RANDOM}}; + ibuf_dualtag = _RAND_39[1:0]; + _RAND_40 = {1{`RANDOM}}; + ibuf_dual = _RAND_40[0:0]; + _RAND_41 = {1{`RANDOM}}; + ibuf_samedw = _RAND_41[0:0]; + _RAND_42 = {1{`RANDOM}}; + ibuf_nomerge = _RAND_42[0:0]; + _RAND_43 = {1{`RANDOM}}; + ibuf_unsign = _RAND_43[0:0]; + _RAND_44 = {1{`RANDOM}}; + ibuf_sz = _RAND_44[1:0]; + _RAND_45 = {1{`RANDOM}}; + obuf_wr_timer = _RAND_45[2:0]; + _RAND_46 = {1{`RANDOM}}; + buf_nomerge_0 = _RAND_46[0:0]; + _RAND_47 = {1{`RANDOM}}; + buf_nomerge_1 = _RAND_47[0:0]; + _RAND_48 = {1{`RANDOM}}; + buf_nomerge_2 = _RAND_48[0:0]; + _RAND_49 = {1{`RANDOM}}; + buf_nomerge_3 = _RAND_49[0:0]; + _RAND_50 = {1{`RANDOM}}; + _T_4351 = _RAND_50[0:0]; + _RAND_51 = {1{`RANDOM}}; + _T_4348 = _RAND_51[0:0]; + _RAND_52 = {1{`RANDOM}}; + _T_4345 = _RAND_52[0:0]; + _RAND_53 = {1{`RANDOM}}; + _T_4342 = _RAND_53[0:0]; + _RAND_54 = {1{`RANDOM}}; + buf_dual_3 = _RAND_54[0:0]; + _RAND_55 = {1{`RANDOM}}; + buf_dual_2 = _RAND_55[0:0]; + _RAND_56 = {1{`RANDOM}}; + buf_dual_1 = _RAND_56[0:0]; + _RAND_57 = {1{`RANDOM}}; + buf_dual_0 = _RAND_57[0:0]; + _RAND_58 = {1{`RANDOM}}; + buf_samedw_3 = _RAND_58[0:0]; + _RAND_59 = {1{`RANDOM}}; + buf_samedw_2 = _RAND_59[0:0]; + _RAND_60 = {1{`RANDOM}}; + buf_samedw_1 = _RAND_60[0:0]; + _RAND_61 = {1{`RANDOM}}; + buf_samedw_0 = _RAND_61[0:0]; + _RAND_62 = {1{`RANDOM}}; + obuf_write = _RAND_62[0:0]; + _RAND_63 = {1{`RANDOM}}; + obuf_cmd_done = _RAND_63[0:0]; + _RAND_64 = {1{`RANDOM}}; + obuf_data_done = _RAND_64[0:0]; + _RAND_65 = {1{`RANDOM}}; + obuf_nosend = _RAND_65[0:0]; + _RAND_66 = {1{`RANDOM}}; + obuf_addr = _RAND_66[31:0]; + _RAND_67 = {1{`RANDOM}}; + buf_sz_0 = _RAND_67[1:0]; + _RAND_68 = {1{`RANDOM}}; + buf_sz_1 = _RAND_68[1:0]; + _RAND_69 = {1{`RANDOM}}; + buf_sz_2 = _RAND_69[1:0]; + _RAND_70 = {1{`RANDOM}}; + buf_sz_3 = _RAND_70[1:0]; + _RAND_71 = {1{`RANDOM}}; + obuf_sideeffect = _RAND_71[0:0]; + _RAND_72 = {1{`RANDOM}}; + obuf_rdrsp_pend = _RAND_72[0:0]; + _RAND_73 = {1{`RANDOM}}; + obuf_rdrsp_tag = _RAND_73[2:0]; + _RAND_74 = {1{`RANDOM}}; + buf_dualhi_3 = _RAND_74[0:0]; + _RAND_75 = {1{`RANDOM}}; + buf_dualhi_2 = _RAND_75[0:0]; + _RAND_76 = {1{`RANDOM}}; + buf_dualhi_1 = _RAND_76[0:0]; + _RAND_77 = {1{`RANDOM}}; + buf_dualhi_0 = _RAND_77[0:0]; + _RAND_78 = {1{`RANDOM}}; + obuf_sz = _RAND_78[1:0]; + _RAND_79 = {1{`RANDOM}}; + obuf_byteen = _RAND_79[7:0]; + _RAND_80 = {2{`RANDOM}}; + obuf_data = _RAND_80[63:0]; + _RAND_81 = {1{`RANDOM}}; + buf_rspageQ_0 = _RAND_81[3:0]; + _RAND_82 = {1{`RANDOM}}; + buf_rspageQ_1 = _RAND_82[3:0]; + _RAND_83 = {1{`RANDOM}}; + buf_rspageQ_2 = _RAND_83[3:0]; + _RAND_84 = {1{`RANDOM}}; + buf_rspageQ_3 = _RAND_84[3:0]; + _RAND_85 = {1{`RANDOM}}; + _T_4328 = _RAND_85[0:0]; + _RAND_86 = {1{`RANDOM}}; + _T_4326 = _RAND_86[0:0]; + _RAND_87 = {1{`RANDOM}}; + _T_4324 = _RAND_87[0:0]; + _RAND_88 = {1{`RANDOM}}; + _T_4322 = _RAND_88[0:0]; + _RAND_89 = {1{`RANDOM}}; + buf_ldfwdtag_0 = _RAND_89[1:0]; + _RAND_90 = {1{`RANDOM}}; + buf_dualtag_0 = _RAND_90[1:0]; + _RAND_91 = {1{`RANDOM}}; + buf_ldfwdtag_3 = _RAND_91[1:0]; + _RAND_92 = {1{`RANDOM}}; + buf_ldfwdtag_2 = _RAND_92[1:0]; + _RAND_93 = {1{`RANDOM}}; + buf_ldfwdtag_1 = _RAND_93[1:0]; + _RAND_94 = {1{`RANDOM}}; + buf_dualtag_1 = _RAND_94[1:0]; + _RAND_95 = {1{`RANDOM}}; + buf_dualtag_2 = _RAND_95[1:0]; + _RAND_96 = {1{`RANDOM}}; + buf_dualtag_3 = _RAND_96[1:0]; + _RAND_97 = {1{`RANDOM}}; + _T_4357 = _RAND_97[0:0]; + _RAND_98 = {1{`RANDOM}}; + _T_4360 = _RAND_98[0:0]; + _RAND_99 = {1{`RANDOM}}; + _T_4363 = _RAND_99[0:0]; + _RAND_100 = {1{`RANDOM}}; + _T_4366 = _RAND_100[0:0]; + _RAND_101 = {1{`RANDOM}}; + _T_4432 = _RAND_101[0:0]; + _RAND_102 = {1{`RANDOM}}; + _T_4427 = _RAND_102[0:0]; + _RAND_103 = {1{`RANDOM}}; + _T_4422 = _RAND_103[0:0]; + _RAND_104 = {1{`RANDOM}}; + _T_4417 = _RAND_104[0:0]; + _RAND_105 = {1{`RANDOM}}; + lsu_nonblock_load_valid_r = _RAND_105[0:0]; + _RAND_106 = {1{`RANDOM}}; + _T_5009 = _RAND_106[0:0]; +`endif // RANDOMIZE_REG_INIT + if (reset) begin + buf_addr_0 = 32'h0; + end + if (reset) begin + _T_4381 = 1'h0; + end + if (reset) begin + _T_4378 = 1'h0; + end + if (reset) begin + _T_4375 = 1'h0; + end + if (reset) begin + _T_4372 = 1'h0; + end + if (reset) begin + buf_state_0 = 3'h0; + end + if (reset) begin + buf_addr_1 = 32'h0; + end + if (reset) begin + buf_state_1 = 3'h0; + end + if (reset) begin + buf_addr_2 = 32'h0; + end + if (reset) begin + buf_state_2 = 3'h0; + end + if (reset) begin + buf_addr_3 = 32'h0; + end + if (reset) begin + buf_state_3 = 3'h0; + end + if (reset) begin + buf_byteen_3 = 4'h0; + end + if (reset) begin + buf_byteen_2 = 4'h0; + end + if (reset) begin + buf_byteen_1 = 4'h0; + end + if (reset) begin + buf_byteen_0 = 4'h0; + end + if (reset) begin + buf_ageQ_3 = 4'h0; + end + if (reset) begin + _T_1869 = 2'h0; + end + if (reset) begin + obuf_merge = 1'h0; + end + if (reset) begin + obuf_tag1 = 2'h0; + end + if (reset) begin + obuf_valid = 1'h0; + end + if (reset) begin + obuf_wr_enQ = 1'h0; + end + if (reset) begin + ibuf_addr = 32'h0; + end + if (reset) begin + ibuf_write = 1'h0; + end + if (reset) begin + ibuf_valid = 1'h0; + end + if (reset) begin + ibuf_byteen = 4'h0; + end + if (reset) begin + buf_ageQ_2 = 4'h0; + end + if (reset) begin + buf_ageQ_1 = 4'h0; + end + if (reset) begin + buf_ageQ_0 = 4'h0; + end + if (reset) begin + buf_data_0 = 32'h0; + end + if (reset) begin + buf_data_1 = 32'h0; + end + if (reset) begin + buf_data_2 = 32'h0; + end + if (reset) begin + buf_data_3 = 32'h0; + end + if (reset) begin + ibuf_data = 32'h0; + end + if (reset) begin + ibuf_timer = 3'h0; + end + if (reset) begin + ibuf_sideeffect = 1'h0; + end + if (reset) begin + WrPtr1_r = 2'h0; + end + if (reset) begin + WrPtr0_r = 2'h0; + end + if (reset) begin + ibuf_tag = 2'h0; + end + if (reset) begin + ibuf_dualtag = 2'h0; + end + if (reset) begin + ibuf_dual = 1'h0; + end + if (reset) begin + ibuf_samedw = 1'h0; + end + if (reset) begin + ibuf_nomerge = 1'h0; + end + if (reset) begin + ibuf_unsign = 1'h0; + end + if (reset) begin + ibuf_sz = 2'h0; + end + if (reset) begin + obuf_wr_timer = 3'h0; + end + if (reset) begin + buf_nomerge_0 = 1'h0; + end + if (reset) begin + buf_nomerge_1 = 1'h0; + end + if (reset) begin + buf_nomerge_2 = 1'h0; + end + if (reset) begin + buf_nomerge_3 = 1'h0; + end + if (reset) begin + _T_4351 = 1'h0; + end + if (reset) begin + _T_4348 = 1'h0; + end + if (reset) begin + _T_4345 = 1'h0; + end + if (reset) begin + _T_4342 = 1'h0; + end + if (reset) begin + buf_dual_3 = 1'h0; + end + if (reset) begin + buf_dual_2 = 1'h0; + end + if (reset) begin + buf_dual_1 = 1'h0; + end + if (reset) begin + buf_dual_0 = 1'h0; + end + if (reset) begin + buf_samedw_3 = 1'h0; + end + if (reset) begin + buf_samedw_2 = 1'h0; + end + if (reset) begin + buf_samedw_1 = 1'h0; + end + if (reset) begin + buf_samedw_0 = 1'h0; + end + if (reset) begin + obuf_write = 1'h0; + end + if (reset) begin + obuf_cmd_done = 1'h0; + end + if (reset) begin + obuf_data_done = 1'h0; + end + if (reset) begin + obuf_nosend = 1'h0; + end + if (reset) begin + obuf_addr = 32'h0; + end + if (reset) begin + buf_sz_0 = 2'h0; + end + if (reset) begin + buf_sz_1 = 2'h0; + end + if (reset) begin + buf_sz_2 = 2'h0; + end + if (reset) begin + buf_sz_3 = 2'h0; + end + if (reset) begin + obuf_sideeffect = 1'h0; + end + if (reset) begin + obuf_rdrsp_pend = 1'h0; + end + if (reset) begin + obuf_rdrsp_tag = 3'h0; + end + if (reset) begin + buf_dualhi_3 = 1'h0; + end + if (reset) begin + buf_dualhi_2 = 1'h0; + end + if (reset) begin + buf_dualhi_1 = 1'h0; + end + if (reset) begin + buf_dualhi_0 = 1'h0; + end + if (reset) begin + obuf_sz = 2'h0; + end + if (reset) begin + obuf_byteen = 8'h0; + end + if (reset) begin + obuf_data = 64'h0; + end + if (reset) begin + buf_rspageQ_0 = 4'h0; + end + if (reset) begin + buf_rspageQ_1 = 4'h0; + end + if (reset) begin + buf_rspageQ_2 = 4'h0; + end + if (reset) begin + buf_rspageQ_3 = 4'h0; + end + if (reset) begin + _T_4328 = 1'h0; + end + if (reset) begin + _T_4326 = 1'h0; + end + if (reset) begin + _T_4324 = 1'h0; + end + if (reset) begin + _T_4322 = 1'h0; + end + if (reset) begin + buf_ldfwdtag_0 = 2'h0; + end + if (reset) begin + buf_dualtag_0 = 2'h0; + end + if (reset) begin + buf_ldfwdtag_3 = 2'h0; + end + if (reset) begin + buf_ldfwdtag_2 = 2'h0; + end + if (reset) begin + buf_ldfwdtag_1 = 2'h0; + end + if (reset) begin + buf_dualtag_1 = 2'h0; + end + if (reset) begin + buf_dualtag_2 = 2'h0; + end + if (reset) begin + buf_dualtag_3 = 2'h0; + end + if (reset) begin + _T_4357 = 1'h0; + end + if (reset) begin + _T_4360 = 1'h0; + end + if (reset) begin + _T_4363 = 1'h0; + end + if (reset) begin + _T_4366 = 1'h0; + end + if (reset) begin + _T_4432 = 1'h0; + end + if (reset) begin + _T_4427 = 1'h0; + end + if (reset) begin + _T_4422 = 1'h0; + end + if (reset) begin + _T_4417 = 1'h0; + end + if (reset) begin + lsu_nonblock_load_valid_r = 1'h0; + end + if (reset) begin + _T_5009 = 1'h0; + end + `endif // RANDOMIZE +end // initial +`ifdef FIRRTL_AFTER_INITIAL +`FIRRTL_AFTER_INITIAL +`endif +`endif // SYNTHESIS + always @(posedge rvclkhdr_4_io_l1clk or posedge reset) begin + if (reset) begin + buf_addr_0 <= 32'h0; + end else if (ibuf_drainvec_vld[0]) begin + buf_addr_0 <= ibuf_addr; + end else if (_T_3364) begin + buf_addr_0 <= io_end_addr_r; + end else begin + buf_addr_0 <= io_lsu_addr_r; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4381 <= 1'h0; + end else if (buf_wr_en_3) begin + _T_4381 <= buf_write_in[3]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4378 <= 1'h0; + end else if (buf_wr_en_2) begin + _T_4378 <= buf_write_in[2]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4375 <= 1'h0; + end else if (buf_wr_en_1) begin + _T_4375 <= buf_write_in[1]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4372 <= 1'h0; + end else if (buf_wr_en_0) begin + _T_4372 <= buf_write_in[0]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_state_0 <= 3'h0; + end else if (buf_state_en_0) begin + if (_T_3549) begin + if (io_lsu_bus_clk_en) begin + buf_state_0 <= 3'h2; + end else begin + buf_state_0 <= 3'h1; + end + end else if (_T_3572) begin + if (io_dec_tlu_force_halt) begin + buf_state_0 <= 3'h0; + end else begin + buf_state_0 <= 3'h2; + end + end else if (_T_3576) begin + if (io_dec_tlu_force_halt) begin + buf_state_0 <= 3'h0; + end else if (_T_3580) begin + buf_state_0 <= 3'h5; + end else begin + buf_state_0 <= 3'h3; + end + end else if (_T_3610) begin + if (_T_3615) begin + buf_state_0 <= 3'h0; + end else if (_T_3623) begin + buf_state_0 <= 3'h4; + end else if (_T_3651) begin + buf_state_0 <= 3'h5; + end else begin + buf_state_0 <= 3'h6; + end + end else if (_T_3697) begin + if (io_dec_tlu_force_halt) begin + buf_state_0 <= 3'h0; + end else if (_T_3703) begin + buf_state_0 <= 3'h5; + end else begin + buf_state_0 <= 3'h6; + end + end else if (_T_3715) begin + if (io_dec_tlu_force_halt) begin + buf_state_0 <= 3'h0; + end else begin + buf_state_0 <= 3'h6; + end + end else begin + buf_state_0 <= 3'h0; + end + end + end + always @(posedge rvclkhdr_5_io_l1clk or posedge reset) begin + if (reset) begin + buf_addr_1 <= 32'h0; + end else if (ibuf_drainvec_vld[1]) begin + buf_addr_1 <= ibuf_addr; + end else if (_T_3373) begin + buf_addr_1 <= io_end_addr_r; + end else begin + buf_addr_1 <= io_lsu_addr_r; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_state_1 <= 3'h0; + end else if (buf_state_en_1) begin + if (_T_3742) begin + if (io_lsu_bus_clk_en) begin + buf_state_1 <= 3'h2; + end else begin + buf_state_1 <= 3'h1; + end + end else if (_T_3765) begin + if (io_dec_tlu_force_halt) begin + buf_state_1 <= 3'h0; + end else begin + buf_state_1 <= 3'h2; + end + end else if (_T_3769) begin + if (io_dec_tlu_force_halt) begin + buf_state_1 <= 3'h0; + end else if (_T_3580) begin + buf_state_1 <= 3'h5; + end else begin + buf_state_1 <= 3'h3; + end + end else if (_T_3803) begin + if (_T_3808) begin + buf_state_1 <= 3'h0; + end else if (_T_3816) begin + buf_state_1 <= 3'h4; + end else if (_T_3844) begin + buf_state_1 <= 3'h5; + end else begin + buf_state_1 <= 3'h6; + end + end else if (_T_3890) begin + if (io_dec_tlu_force_halt) begin + buf_state_1 <= 3'h0; + end else if (_T_3896) begin + buf_state_1 <= 3'h5; + end else begin + buf_state_1 <= 3'h6; + end + end else if (_T_3908) begin + if (io_dec_tlu_force_halt) begin + buf_state_1 <= 3'h0; + end else begin + buf_state_1 <= 3'h6; + end + end else begin + buf_state_1 <= 3'h0; + end + end + end + always @(posedge rvclkhdr_6_io_l1clk or posedge reset) begin + if (reset) begin + buf_addr_2 <= 32'h0; + end else if (ibuf_drainvec_vld[2]) begin + buf_addr_2 <= ibuf_addr; + end else if (_T_3382) begin + buf_addr_2 <= io_end_addr_r; + end else begin + buf_addr_2 <= io_lsu_addr_r; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_state_2 <= 3'h0; + end else if (buf_state_en_2) begin + if (_T_3935) begin + if (io_lsu_bus_clk_en) begin + buf_state_2 <= 3'h2; + end else begin + buf_state_2 <= 3'h1; + end + end else if (_T_3958) begin + if (io_dec_tlu_force_halt) begin + buf_state_2 <= 3'h0; + end else begin + buf_state_2 <= 3'h2; + end + end else if (_T_3962) begin + if (io_dec_tlu_force_halt) begin + buf_state_2 <= 3'h0; + end else if (_T_3580) begin + buf_state_2 <= 3'h5; + end else begin + buf_state_2 <= 3'h3; + end + end else if (_T_3996) begin + if (_T_4001) begin + buf_state_2 <= 3'h0; + end else if (_T_4009) begin + buf_state_2 <= 3'h4; + end else if (_T_4037) begin + buf_state_2 <= 3'h5; + end else begin + buf_state_2 <= 3'h6; + end + end else if (_T_4083) begin + if (io_dec_tlu_force_halt) begin + buf_state_2 <= 3'h0; + end else if (_T_4089) begin + buf_state_2 <= 3'h5; + end else begin + buf_state_2 <= 3'h6; + end + end else if (_T_4101) begin + if (io_dec_tlu_force_halt) begin + buf_state_2 <= 3'h0; + end else begin + buf_state_2 <= 3'h6; + end + end else begin + buf_state_2 <= 3'h0; + end + end + end + always @(posedge rvclkhdr_7_io_l1clk or posedge reset) begin + if (reset) begin + buf_addr_3 <= 32'h0; + end else if (ibuf_drainvec_vld[3]) begin + buf_addr_3 <= ibuf_addr; + end else if (_T_3391) begin + buf_addr_3 <= io_end_addr_r; + end else begin + buf_addr_3 <= io_lsu_addr_r; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_state_3 <= 3'h0; + end else if (buf_state_en_3) begin + if (_T_4128) begin + if (io_lsu_bus_clk_en) begin + buf_state_3 <= 3'h2; + end else begin + buf_state_3 <= 3'h1; + end + end else if (_T_4151) begin + if (io_dec_tlu_force_halt) begin + buf_state_3 <= 3'h0; + end else begin + buf_state_3 <= 3'h2; + end + end else if (_T_4155) begin + if (io_dec_tlu_force_halt) begin + buf_state_3 <= 3'h0; + end else if (_T_3580) begin + buf_state_3 <= 3'h5; + end else begin + buf_state_3 <= 3'h3; + end + end else if (_T_4189) begin + if (_T_4194) begin + buf_state_3 <= 3'h0; + end else if (_T_4202) begin + buf_state_3 <= 3'h4; + end else if (_T_4230) begin + buf_state_3 <= 3'h5; + end else begin + buf_state_3 <= 3'h6; + end + end else if (_T_4276) begin + if (io_dec_tlu_force_halt) begin + buf_state_3 <= 3'h0; + end else if (_T_4282) begin + buf_state_3 <= 3'h5; + end else begin + buf_state_3 <= 3'h6; + end + end else if (_T_4294) begin + if (io_dec_tlu_force_halt) begin + buf_state_3 <= 3'h0; + end else begin + buf_state_3 <= 3'h6; + end + end else begin + buf_state_3 <= 3'h0; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_byteen_3 <= 4'h0; + end else if (buf_wr_en_3) begin + if (ibuf_drainvec_vld[3]) begin + buf_byteen_3 <= ibuf_byteen_out; + end else if (_T_3391) begin + buf_byteen_3 <= ldst_byteen_hi_r; + end else begin + buf_byteen_3 <= ldst_byteen_lo_r; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_byteen_2 <= 4'h0; + end else if (buf_wr_en_2) begin + if (ibuf_drainvec_vld[2]) begin + buf_byteen_2 <= ibuf_byteen_out; + end else if (_T_3382) begin + buf_byteen_2 <= ldst_byteen_hi_r; + end else begin + buf_byteen_2 <= ldst_byteen_lo_r; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_byteen_1 <= 4'h0; + end else if (buf_wr_en_1) begin + if (ibuf_drainvec_vld[1]) begin + buf_byteen_1 <= ibuf_byteen_out; + end else if (_T_3373) begin + buf_byteen_1 <= ldst_byteen_hi_r; + end else begin + buf_byteen_1 <= ldst_byteen_lo_r; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_byteen_0 <= 4'h0; + end else if (buf_wr_en_0) begin + if (ibuf_drainvec_vld[0]) begin + buf_byteen_0 <= ibuf_byteen_out; + end else if (_T_3364) begin + buf_byteen_0 <= ldst_byteen_hi_r; + end else begin + buf_byteen_0 <= ldst_byteen_lo_r; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_ageQ_3 <= 4'h0; + end else begin + buf_ageQ_3 <= {_T_2556,_T_2479}; + end + end + always @(posedge io_lsu_busm_clk or posedge reset) begin + if (reset) begin + _T_1869 <= 2'h0; + end else if (obuf_wr_en) begin + if (ibuf_buf_byp) begin + _T_1869 <= WrPtr0_r; + end else begin + _T_1869 <= CmdPtr0; + end + end + end + always @(posedge io_lsu_busm_clk or posedge reset) begin + if (reset) begin + obuf_merge <= 1'h0; + end else if (obuf_wr_en) begin + obuf_merge <= obuf_merge_en; + end + end + always @(posedge io_lsu_busm_clk or posedge reset) begin + if (reset) begin + obuf_tag1 <= 2'h0; + end else if (obuf_wr_en) begin + if (ibuf_buf_byp) begin + obuf_tag1 <= WrPtr1_r; + end else begin + obuf_tag1 <= 2'h0; + end + end + end + always @(posedge io_lsu_free_c2_clk or posedge reset) begin + if (reset) begin + obuf_valid <= 1'h0; + end else begin + obuf_valid <= _T_1860 & _T_1861; + end + end + always @(posedge io_lsu_busm_clk or posedge reset) begin + if (reset) begin + obuf_wr_enQ <= 1'h0; + end else begin + obuf_wr_enQ <= _T_1261 & io_lsu_bus_clk_en; + end + end + always @(posedge rvclkhdr_io_l1clk or posedge reset) begin + if (reset) begin + ibuf_addr <= 32'h0; + end else if (io_ldst_dual_r) begin + ibuf_addr <= io_end_addr_r; + end else begin + ibuf_addr <= io_lsu_addr_r; + end + end + always @(posedge io_lsu_bus_ibuf_c1_clk or posedge reset) begin + if (reset) begin + ibuf_write <= 1'h0; + end else if (ibuf_wr_en) begin + ibuf_write <= io_lsu_pkt_r_store; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + ibuf_valid <= 1'h0; + end else begin + ibuf_valid <= _T_1005 & _T_1006; + end + end + always @(posedge io_lsu_bus_ibuf_c1_clk or posedge reset) begin + if (reset) begin + ibuf_byteen <= 4'h0; + end else if (ibuf_wr_en) begin + if (_T_866) begin + ibuf_byteen <= _T_881; + end else if (io_ldst_dual_r) begin + ibuf_byteen <= ldst_byteen_hi_r; + end else begin + ibuf_byteen <= ldst_byteen_lo_r; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_ageQ_2 <= 4'h0; + end else begin + buf_ageQ_2 <= {_T_2454,_T_2377}; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_ageQ_1 <= 4'h0; + end else begin + buf_ageQ_1 <= {_T_2352,_T_2275}; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_ageQ_0 <= 4'h0; + end else begin + buf_ageQ_0 <= {_T_2250,_T_2173}; + end + end + always @(posedge rvclkhdr_8_io_l1clk or posedge reset) begin + if (reset) begin + buf_data_0 <= 32'h0; + end else if (_T_3549) begin + if (_T_3564) begin + buf_data_0 <= ibuf_data_out; + end else begin + buf_data_0 <= store_data_lo_r; + end + end else if (_T_3572) begin + buf_data_0 <= 32'h0; + end else if (_T_3576) begin + if (buf_error_en_0) begin + buf_data_0 <= io_lsu_axi_rdata[31:0]; + end else if (buf_addr_0[2]) begin + buf_data_0 <= io_lsu_axi_rdata[63:32]; + end else begin + buf_data_0 <= io_lsu_axi_rdata[31:0]; + end + end else if (_T_3610) begin + if (_T_3690) begin + if (buf_addr_0[2]) begin + buf_data_0 <= io_lsu_axi_rdata[63:32]; + end else begin + buf_data_0 <= io_lsu_axi_rdata[31:0]; + end + end else begin + buf_data_0 <= io_lsu_axi_rdata[31:0]; + end + end else begin + buf_data_0 <= 32'h0; + end + end + always @(posedge rvclkhdr_9_io_l1clk or posedge reset) begin + if (reset) begin + buf_data_1 <= 32'h0; + end else if (_T_3742) begin + if (_T_3757) begin + buf_data_1 <= ibuf_data_out; + end else begin + buf_data_1 <= store_data_lo_r; + end + end else if (_T_3765) begin + buf_data_1 <= 32'h0; + end else if (_T_3769) begin + if (buf_error_en_1) begin + buf_data_1 <= io_lsu_axi_rdata[31:0]; + end else if (buf_addr_1[2]) begin + buf_data_1 <= io_lsu_axi_rdata[63:32]; + end else begin + buf_data_1 <= io_lsu_axi_rdata[31:0]; + end + end else if (_T_3803) begin + if (_T_3883) begin + if (buf_addr_1[2]) begin + buf_data_1 <= io_lsu_axi_rdata[63:32]; + end else begin + buf_data_1 <= io_lsu_axi_rdata[31:0]; + end + end else begin + buf_data_1 <= io_lsu_axi_rdata[31:0]; + end + end else begin + buf_data_1 <= 32'h0; + end + end + always @(posedge rvclkhdr_10_io_l1clk or posedge reset) begin + if (reset) begin + buf_data_2 <= 32'h0; + end else if (_T_3935) begin + if (_T_3950) begin + buf_data_2 <= ibuf_data_out; + end else begin + buf_data_2 <= store_data_lo_r; + end + end else if (_T_3958) begin + buf_data_2 <= 32'h0; + end else if (_T_3962) begin + if (buf_error_en_2) begin + buf_data_2 <= io_lsu_axi_rdata[31:0]; + end else if (buf_addr_2[2]) begin + buf_data_2 <= io_lsu_axi_rdata[63:32]; + end else begin + buf_data_2 <= io_lsu_axi_rdata[31:0]; + end + end else if (_T_3996) begin + if (_T_4076) begin + if (buf_addr_2[2]) begin + buf_data_2 <= io_lsu_axi_rdata[63:32]; + end else begin + buf_data_2 <= io_lsu_axi_rdata[31:0]; + end + end else begin + buf_data_2 <= io_lsu_axi_rdata[31:0]; + end + end else begin + buf_data_2 <= 32'h0; + end + end + always @(posedge rvclkhdr_11_io_l1clk or posedge reset) begin + if (reset) begin + buf_data_3 <= 32'h0; + end else if (_T_4128) begin + if (_T_4143) begin + buf_data_3 <= ibuf_data_out; + end else begin + buf_data_3 <= store_data_lo_r; + end + end else if (_T_4151) begin + buf_data_3 <= 32'h0; + end else if (_T_4155) begin + if (buf_error_en_3) begin + buf_data_3 <= io_lsu_axi_rdata[31:0]; + end else if (buf_addr_3[2]) begin + buf_data_3 <= io_lsu_axi_rdata[63:32]; + end else begin + buf_data_3 <= io_lsu_axi_rdata[31:0]; + end + end else if (_T_4189) begin + if (_T_4269) begin + if (buf_addr_3[2]) begin + buf_data_3 <= io_lsu_axi_rdata[63:32]; + end else begin + buf_data_3 <= io_lsu_axi_rdata[31:0]; + end + end else begin + buf_data_3 <= io_lsu_axi_rdata[31:0]; + end + end else begin + buf_data_3 <= 32'h0; + end + end + always @(posedge rvclkhdr_1_io_l1clk or posedge reset) begin + if (reset) begin + ibuf_data <= 32'h0; + end else begin + ibuf_data <= {_T_922,_T_893}; + end + end + always @(posedge io_lsu_bus_ibuf_c1_clk or posedge reset) begin + if (reset) begin + ibuf_timer <= 3'h0; + end else if (ibuf_wr_en) begin + ibuf_timer <= 3'h0; + end else if (_T_923) begin + ibuf_timer <= _T_926; + end + end + always @(posedge io_lsu_bus_ibuf_c1_clk or posedge reset) begin + if (reset) begin + ibuf_sideeffect <= 1'h0; + end else if (_T_1011) begin + ibuf_sideeffect <= io_is_sideeffects_r; + end + end + always @(posedge io_lsu_c2_r_clk or posedge reset) begin + if (reset) begin + WrPtr1_r <= 2'h0; + end else if (_T_1935) begin + WrPtr1_r <= 2'h0; + end else if (_T_1949) begin + WrPtr1_r <= 2'h1; + end else if (_T_1963) begin + WrPtr1_r <= 2'h2; + end else begin + WrPtr1_r <= 2'h3; + end + end + always @(posedge io_lsu_c2_r_clk or posedge reset) begin + if (reset) begin + WrPtr0_r <= 2'h0; + end else if (_T_1884) begin + WrPtr0_r <= 2'h0; + end else if (_T_1895) begin + WrPtr0_r <= 2'h1; + end else if (_T_1906) begin + WrPtr0_r <= 2'h2; + end else begin + WrPtr0_r <= 2'h3; + end + end + always @(posedge io_lsu_bus_ibuf_c1_clk or posedge reset) begin + if (reset) begin + ibuf_tag <= 2'h0; + end else if (_T_1011) begin + if (!(_T_866)) begin + if (io_ldst_dual_r) begin + ibuf_tag <= WrPtr1_r; + end else begin + ibuf_tag <= WrPtr0_r; + end + end + end + end + always @(posedge io_lsu_bus_ibuf_c1_clk or posedge reset) begin + if (reset) begin + ibuf_dualtag <= 2'h0; + end else if (_T_1011) begin + ibuf_dualtag <= WrPtr0_r; + end + end + always @(posedge io_lsu_bus_ibuf_c1_clk or posedge reset) begin + if (reset) begin + ibuf_dual <= 1'h0; + end else if (_T_1011) begin + ibuf_dual <= io_ldst_dual_r; + end + end + always @(posedge io_lsu_bus_ibuf_c1_clk or posedge reset) begin + if (reset) begin + ibuf_samedw <= 1'h0; + end else if (_T_1011) begin + ibuf_samedw <= ldst_samedw_r; + end + end + always @(posedge io_lsu_bus_ibuf_c1_clk or posedge reset) begin + if (reset) begin + ibuf_nomerge <= 1'h0; + end else if (_T_1011) begin + ibuf_nomerge <= io_no_dword_merge_r; + end + end + always @(posedge io_lsu_bus_ibuf_c1_clk or posedge reset) begin + if (reset) begin + ibuf_unsign <= 1'h0; + end else if (_T_1011) begin + ibuf_unsign <= io_lsu_pkt_r_unsign; + end + end + always @(posedge io_lsu_bus_ibuf_c1_clk or posedge reset) begin + if (reset) begin + ibuf_sz <= 2'h0; + end else if (ibuf_wr_en) begin + ibuf_sz <= ibuf_sz_in; + end + end + always @(posedge io_lsu_busm_clk or posedge reset) begin + if (reset) begin + obuf_wr_timer <= 3'h0; + end else if (obuf_wr_en) begin + obuf_wr_timer <= 3'h0; + end else if (_T_1079) begin + obuf_wr_timer <= _T_1081; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_nomerge_0 <= 1'h0; + end else if (buf_wr_en_0) begin + buf_nomerge_0 <= buf_nomerge_in[0]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_nomerge_1 <= 1'h0; + end else if (buf_wr_en_1) begin + buf_nomerge_1 <= buf_nomerge_in[1]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_nomerge_2 <= 1'h0; + end else if (buf_wr_en_2) begin + buf_nomerge_2 <= buf_nomerge_in[2]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_nomerge_3 <= 1'h0; + end else if (buf_wr_en_3) begin + buf_nomerge_3 <= buf_nomerge_in[3]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4351 <= 1'h0; + end else if (buf_wr_en_3) begin + _T_4351 <= buf_sideeffect_in[3]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4348 <= 1'h0; + end else if (buf_wr_en_2) begin + _T_4348 <= buf_sideeffect_in[2]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4345 <= 1'h0; + end else if (buf_wr_en_1) begin + _T_4345 <= buf_sideeffect_in[1]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4342 <= 1'h0; + end else if (buf_wr_en_0) begin + _T_4342 <= buf_sideeffect_in[0]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_dual_3 <= 1'h0; + end else if (buf_wr_en_3) begin + buf_dual_3 <= buf_dual_in[3]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_dual_2 <= 1'h0; + end else if (buf_wr_en_2) begin + buf_dual_2 <= buf_dual_in[2]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_dual_1 <= 1'h0; + end else if (buf_wr_en_1) begin + buf_dual_1 <= buf_dual_in[1]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_dual_0 <= 1'h0; + end else if (buf_wr_en_0) begin + buf_dual_0 <= buf_dual_in[0]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_samedw_3 <= 1'h0; + end else if (buf_wr_en_3) begin + buf_samedw_3 <= buf_samedw_in[3]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_samedw_2 <= 1'h0; + end else if (buf_wr_en_2) begin + buf_samedw_2 <= buf_samedw_in[2]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_samedw_1 <= 1'h0; + end else if (buf_wr_en_1) begin + buf_samedw_1 <= buf_samedw_in[1]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_samedw_0 <= 1'h0; + end else if (buf_wr_en_0) begin + buf_samedw_0 <= buf_samedw_in[0]; + end + end + always @(posedge io_lsu_busm_clk or posedge reset) begin + if (reset) begin + obuf_write <= 1'h0; + end else if (obuf_wr_en) begin + if (ibuf_buf_byp) begin + obuf_write <= io_lsu_pkt_r_store; + end else begin + obuf_write <= _T_1223; + end + end + end + always @(posedge io_lsu_busm_clk or posedge reset) begin + if (reset) begin + obuf_cmd_done <= 1'h0; + end else begin + obuf_cmd_done <= _T_1326 & _T_4881; + end + end + always @(posedge io_lsu_busm_clk or posedge reset) begin + if (reset) begin + obuf_data_done <= 1'h0; + end else begin + obuf_data_done <= _T_1326 & _T_4882; + end + end + always @(posedge io_lsu_free_c2_clk or posedge reset) begin + if (reset) begin + obuf_nosend <= 1'h0; + end else if (obuf_wr_en) begin + obuf_nosend <= obuf_nosend_in; + end + end + always @(posedge rvclkhdr_2_io_l1clk or posedge reset) begin + if (reset) begin + obuf_addr <= 32'h0; + end else if (ibuf_buf_byp) begin + obuf_addr <= io_lsu_addr_r; + end else begin + obuf_addr <= _T_1310; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_sz_0 <= 2'h0; + end else if (buf_wr_en_0) begin + if (ibuf_drainvec_vld[0]) begin + buf_sz_0 <= ibuf_sz; + end else begin + buf_sz_0 <= ibuf_sz_in; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_sz_1 <= 2'h0; + end else if (buf_wr_en_1) begin + if (ibuf_drainvec_vld[1]) begin + buf_sz_1 <= ibuf_sz; + end else begin + buf_sz_1 <= ibuf_sz_in; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_sz_2 <= 2'h0; + end else if (buf_wr_en_2) begin + if (ibuf_drainvec_vld[2]) begin + buf_sz_2 <= ibuf_sz; + end else begin + buf_sz_2 <= ibuf_sz_in; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_sz_3 <= 2'h0; + end else if (buf_wr_en_3) begin + if (ibuf_drainvec_vld[3]) begin + buf_sz_3 <= ibuf_sz; + end else begin + buf_sz_3 <= ibuf_sz_in; + end + end + end + always @(posedge io_lsu_busm_clk or posedge reset) begin + if (reset) begin + obuf_sideeffect <= 1'h0; + end else if (obuf_wr_en) begin + if (ibuf_buf_byp) begin + obuf_sideeffect <= io_is_sideeffects_r; + end else begin + obuf_sideeffect <= _T_1072; + end + end + end + always @(posedge io_lsu_busm_clk or posedge reset) begin + if (reset) begin + obuf_rdrsp_pend <= 1'h0; + end else begin + obuf_rdrsp_pend <= _T_1351 | _T_1355; + end + end + always @(posedge io_lsu_busm_clk or posedge reset) begin + if (reset) begin + obuf_rdrsp_tag <= 3'h0; + end else if (_T_1357) begin + obuf_rdrsp_tag <= obuf_tag0; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_dualhi_3 <= 1'h0; + end else if (buf_wr_en_3) begin + buf_dualhi_3 <= buf_dualhi_in[3]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_dualhi_2 <= 1'h0; + end else if (buf_wr_en_2) begin + buf_dualhi_2 <= buf_dualhi_in[2]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_dualhi_1 <= 1'h0; + end else if (buf_wr_en_1) begin + buf_dualhi_1 <= buf_dualhi_in[1]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_dualhi_0 <= 1'h0; + end else if (buf_wr_en_0) begin + buf_dualhi_0 <= buf_dualhi_in[0]; + end + end + always @(posedge io_lsu_busm_clk or posedge reset) begin + if (reset) begin + obuf_sz <= 2'h0; + end else if (obuf_wr_en) begin + if (ibuf_buf_byp) begin + obuf_sz <= ibuf_sz_in; + end else begin + obuf_sz <= _T_1323; + end + end + end + always @(posedge io_lsu_busm_clk or posedge reset) begin + if (reset) begin + obuf_byteen <= 8'h0; + end else if (obuf_wr_en) begin + obuf_byteen <= obuf_byteen_in; + end + end + always @(posedge rvclkhdr_3_io_l1clk or posedge reset) begin + if (reset) begin + obuf_data <= 64'h0; + end else begin + obuf_data <= {_T_1641,_T_1600}; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_rspageQ_0 <= 4'h0; + end else begin + buf_rspageQ_0 <= {_T_3194,_T_3183}; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_rspageQ_1 <= 4'h0; + end else begin + buf_rspageQ_1 <= {_T_3209,_T_3198}; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_rspageQ_2 <= 4'h0; + end else begin + buf_rspageQ_2 <= {_T_3224,_T_3213}; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_rspageQ_3 <= 4'h0; + end else begin + buf_rspageQ_3 <= {_T_3239,_T_3228}; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4328 <= 1'h0; + end else if (buf_ldfwd_en_3) begin + if (_T_4128) begin + _T_4328 <= 1'h0; + end else if (_T_4151) begin + _T_4328 <= 1'h0; + end else begin + _T_4328 <= _T_4155; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4326 <= 1'h0; + end else if (buf_ldfwd_en_2) begin + if (_T_3935) begin + _T_4326 <= 1'h0; + end else if (_T_3958) begin + _T_4326 <= 1'h0; + end else begin + _T_4326 <= _T_3962; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4324 <= 1'h0; + end else if (buf_ldfwd_en_1) begin + if (_T_3742) begin + _T_4324 <= 1'h0; + end else if (_T_3765) begin + _T_4324 <= 1'h0; + end else begin + _T_4324 <= _T_3769; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4322 <= 1'h0; + end else if (buf_ldfwd_en_0) begin + if (_T_3549) begin + _T_4322 <= 1'h0; + end else if (_T_3572) begin + _T_4322 <= 1'h0; + end else begin + _T_4322 <= _T_3576; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_ldfwdtag_0 <= 2'h0; + end else if (buf_ldfwd_en_0) begin + if (_T_3549) begin + buf_ldfwdtag_0 <= 2'h0; + end else if (_T_3572) begin + buf_ldfwdtag_0 <= 2'h0; + end else if (_T_3576) begin + buf_ldfwdtag_0 <= obuf_rdrsp_tag[1:0]; + end else begin + buf_ldfwdtag_0 <= 2'h0; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_dualtag_0 <= 2'h0; + end else if (buf_wr_en_0) begin + if (ibuf_drainvec_vld[0]) begin + buf_dualtag_0 <= ibuf_dualtag; + end else if (_T_3364) begin + buf_dualtag_0 <= WrPtr0_r; + end else begin + buf_dualtag_0 <= WrPtr1_r; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_ldfwdtag_3 <= 2'h0; + end else if (buf_ldfwd_en_3) begin + if (_T_4128) begin + buf_ldfwdtag_3 <= 2'h0; + end else if (_T_4151) begin + buf_ldfwdtag_3 <= 2'h0; + end else if (_T_4155) begin + buf_ldfwdtag_3 <= obuf_rdrsp_tag[1:0]; + end else begin + buf_ldfwdtag_3 <= 2'h0; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_ldfwdtag_2 <= 2'h0; + end else if (buf_ldfwd_en_2) begin + if (_T_3935) begin + buf_ldfwdtag_2 <= 2'h0; + end else if (_T_3958) begin + buf_ldfwdtag_2 <= 2'h0; + end else if (_T_3962) begin + buf_ldfwdtag_2 <= obuf_rdrsp_tag[1:0]; + end else begin + buf_ldfwdtag_2 <= 2'h0; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_ldfwdtag_1 <= 2'h0; + end else if (buf_ldfwd_en_1) begin + if (_T_3742) begin + buf_ldfwdtag_1 <= 2'h0; + end else if (_T_3765) begin + buf_ldfwdtag_1 <= 2'h0; + end else if (_T_3769) begin + buf_ldfwdtag_1 <= obuf_rdrsp_tag[1:0]; + end else begin + buf_ldfwdtag_1 <= 2'h0; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_dualtag_1 <= 2'h0; + end else if (buf_wr_en_1) begin + if (ibuf_drainvec_vld[1]) begin + buf_dualtag_1 <= ibuf_dualtag; + end else if (_T_3373) begin + buf_dualtag_1 <= WrPtr0_r; + end else begin + buf_dualtag_1 <= WrPtr1_r; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_dualtag_2 <= 2'h0; + end else if (buf_wr_en_2) begin + if (ibuf_drainvec_vld[2]) begin + buf_dualtag_2 <= ibuf_dualtag; + end else if (_T_3382) begin + buf_dualtag_2 <= WrPtr0_r; + end else begin + buf_dualtag_2 <= WrPtr1_r; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_dualtag_3 <= 2'h0; + end else if (buf_wr_en_3) begin + if (ibuf_drainvec_vld[3]) begin + buf_dualtag_3 <= ibuf_dualtag; + end else if (_T_3391) begin + buf_dualtag_3 <= WrPtr0_r; + end else begin + buf_dualtag_3 <= WrPtr1_r; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4357 <= 1'h0; + end else if (buf_wr_en_0) begin + _T_4357 <= buf_unsign_in[0]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4360 <= 1'h0; + end else if (buf_wr_en_1) begin + _T_4360 <= buf_unsign_in[1]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4363 <= 1'h0; + end else if (buf_wr_en_2) begin + _T_4363 <= buf_unsign_in[2]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4366 <= 1'h0; + end else if (buf_wr_en_3) begin + _T_4366 <= buf_unsign_in[3]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4432 <= 1'h0; + end else begin + _T_4432 <= _T_4429 & _T_4430; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4427 <= 1'h0; + end else begin + _T_4427 <= _T_4424 & _T_4425; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4422 <= 1'h0; + end else begin + _T_4422 <= _T_4419 & _T_4420; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4417 <= 1'h0; + end else begin + _T_4417 <= _T_4414 & _T_4415; + end + end + always @(posedge io_lsu_c2_r_clk or posedge reset) begin + if (reset) begin + lsu_nonblock_load_valid_r <= 1'h0; + end else begin + lsu_nonblock_load_valid_r <= io_lsu_nonblock_load_valid_m; + end + end + always @(posedge io_lsu_c2_r_clk or posedge reset) begin + if (reset) begin + _T_5009 <= 1'h0; + end else begin + _T_5009 <= _T_5006 & _T_4539; + end + end +endmodule +module el2_lsu_bus_intf( + input clock, + input reset, + input io_scan_mode, + input io_dec_tlu_external_ldfwd_disable, + input io_dec_tlu_wb_coalescing_disable, + input io_dec_tlu_sideeffect_posted_disable, + input io_lsu_c1_m_clk, + input io_lsu_c1_r_clk, + input io_lsu_c2_r_clk, + input io_lsu_bus_ibuf_c1_clk, + input io_lsu_bus_obuf_c1_clk, + input io_lsu_bus_buf_c1_clk, + input io_lsu_free_c2_clk, + input io_free_clk, + input io_lsu_busm_clk, + input io_dec_lsu_valid_raw_d, + input io_lsu_busreq_m, + input io_lsu_pkt_m_fast_int, + input io_lsu_pkt_m_by, + input io_lsu_pkt_m_half, + input io_lsu_pkt_m_word, + input io_lsu_pkt_m_dword, + input io_lsu_pkt_m_load, + input io_lsu_pkt_m_store, + input io_lsu_pkt_m_unsign, + input io_lsu_pkt_m_dma, + input io_lsu_pkt_m_store_data_bypass_d, + input io_lsu_pkt_m_load_ldst_bypass_d, + input io_lsu_pkt_m_store_data_bypass_m, + input io_lsu_pkt_m_valid, + input io_lsu_pkt_r_fast_int, + input io_lsu_pkt_r_by, + input io_lsu_pkt_r_half, + input io_lsu_pkt_r_word, + input io_lsu_pkt_r_dword, + input io_lsu_pkt_r_load, + input io_lsu_pkt_r_store, + input io_lsu_pkt_r_unsign, + input io_lsu_pkt_r_dma, + input io_lsu_pkt_r_store_data_bypass_d, + input io_lsu_pkt_r_load_ldst_bypass_d, + input io_lsu_pkt_r_store_data_bypass_m, + input io_lsu_pkt_r_valid, + input [31:0] io_lsu_addr_d, + input [31:0] io_lsu_addr_m, + input [31:0] io_lsu_addr_r, + input [31:0] io_end_addr_d, + input [31:0] io_end_addr_m, + input [31:0] io_end_addr_r, + input [31:0] io_store_data_r, + input io_dec_tlu_force_halt, + input io_lsu_commit_r, + input io_is_sideeffects_m, + input io_flush_m_up, + input io_flush_r, + input io_lsu_axi_awready, + input io_lsu_axi_wready, + input io_lsu_axi_bvalid, + input [1:0] io_lsu_axi_bresp, + input [2:0] io_lsu_axi_bid, + input io_lsu_axi_arready, + input io_lsu_axi_rvalid, + input [2:0] io_lsu_axi_rid, + input [63:0] io_lsu_axi_rdata, + input [1:0] io_lsu_axi_rresp, + input io_lsu_axi_rlast, + input io_lsu_bus_clk_en, + output io_lsu_busreq_r, + output io_lsu_bus_buffer_pend_any, + output io_lsu_bus_buffer_full_any, + output io_lsu_bus_buffer_empty_any, + output io_lsu_bus_idle_any, + output [31:0] io_bus_read_data_m, + output io_lsu_imprecise_error_load_any, + output io_lsu_imprecise_error_store_any, + output [31:0] io_lsu_imprecise_error_addr_any, + output io_lsu_nonblock_load_valid_m, + output [1:0] io_lsu_nonblock_load_tag_m, + output io_lsu_nonblock_load_inv_r, + output [1:0] io_lsu_nonblock_load_inv_tag_r, + output io_lsu_nonblock_load_data_valid, + output io_lsu_nonblock_load_data_error, + output [1:0] io_lsu_nonblock_load_data_tag, + output [31:0] io_lsu_nonblock_load_data, + output io_lsu_pmu_bus_trxn, + output io_lsu_pmu_bus_misaligned, + output io_lsu_pmu_bus_error, + output io_lsu_pmu_bus_busy, + output io_lsu_axi_awvalid, + output [2:0] io_lsu_axi_awid, + output [31:0] io_lsu_axi_awaddr, + output [3:0] io_lsu_axi_awregion, + output [7:0] io_lsu_axi_awlen, + output [2:0] io_lsu_axi_awsize, + output [1:0] io_lsu_axi_awburst, + output io_lsu_axi_awlock, + output [3:0] io_lsu_axi_awcache, + output [2:0] io_lsu_axi_awprot, + output [3:0] io_lsu_axi_awqos, + output io_lsu_axi_wvalid, + output [63:0] io_lsu_axi_wdata, + output [7:0] io_lsu_axi_wstrb, + output io_lsu_axi_wlast, + output io_lsu_axi_bready, + output io_lsu_axi_arvalid, + output [2:0] io_lsu_axi_arid, + output [31:0] io_lsu_axi_araddr, + output [3:0] io_lsu_axi_arregion, + output [7:0] io_lsu_axi_arlen, + output [2:0] io_lsu_axi_arsize, + output [1:0] io_lsu_axi_arburst, + output io_lsu_axi_arlock, + output [3:0] io_lsu_axi_arcache, + output [2:0] io_lsu_axi_arprot, + output [3:0] io_lsu_axi_arqos, + output io_lsu_axi_rready +); +`ifdef RANDOMIZE_REG_INIT + reg [31:0] _RAND_0; + reg [31:0] _RAND_1; + reg [31:0] _RAND_2; + reg [31:0] _RAND_3; + reg [31:0] _RAND_4; +`endif // RANDOMIZE_REG_INIT + wire bus_buffer_clock; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_reset; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_scan_mode; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_dec_tlu_external_ldfwd_disable; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_dec_tlu_wb_coalescing_disable; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_dec_tlu_sideeffect_posted_disable; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_dec_tlu_force_halt; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_c2_r_clk; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_bus_ibuf_c1_clk; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_bus_buf_c1_clk; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_free_c2_clk; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_busm_clk; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_dec_lsu_valid_raw_d; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_pkt_m_load; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_pkt_m_valid; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_pkt_r_by; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_pkt_r_half; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_pkt_r_word; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_pkt_r_load; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_pkt_r_store; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_pkt_r_unsign; // @[el2_lsu_bus_intf.scala 148:39] + wire [31:0] bus_buffer_io_lsu_addr_m; // @[el2_lsu_bus_intf.scala 148:39] + wire [31:0] bus_buffer_io_end_addr_m; // @[el2_lsu_bus_intf.scala 148:39] + wire [31:0] bus_buffer_io_lsu_addr_r; // @[el2_lsu_bus_intf.scala 148:39] + wire [31:0] bus_buffer_io_end_addr_r; // @[el2_lsu_bus_intf.scala 148:39] + wire [31:0] bus_buffer_io_store_data_r; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_no_word_merge_r; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_no_dword_merge_r; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_busreq_m; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_ld_full_hit_m; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_flush_m_up; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_flush_r; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_commit_r; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_is_sideeffects_r; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_ldst_dual_d; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_ldst_dual_m; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_ldst_dual_r; // @[el2_lsu_bus_intf.scala 148:39] + wire [7:0] bus_buffer_io_ldst_byteen_ext_m; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_axi_awready; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_axi_wready; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_axi_bvalid; // @[el2_lsu_bus_intf.scala 148:39] + wire [1:0] bus_buffer_io_lsu_axi_bresp; // @[el2_lsu_bus_intf.scala 148:39] + wire [2:0] bus_buffer_io_lsu_axi_bid; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_axi_arready; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_axi_rvalid; // @[el2_lsu_bus_intf.scala 148:39] + wire [2:0] bus_buffer_io_lsu_axi_rid; // @[el2_lsu_bus_intf.scala 148:39] + wire [63:0] bus_buffer_io_lsu_axi_rdata; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_bus_clk_en; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_bus_clk_en_q; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_busreq_r; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_bus_buffer_pend_any; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_bus_buffer_full_any; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_bus_buffer_empty_any; // @[el2_lsu_bus_intf.scala 148:39] + wire [3:0] bus_buffer_io_ld_byte_hit_buf_lo; // @[el2_lsu_bus_intf.scala 148:39] + wire [3:0] bus_buffer_io_ld_byte_hit_buf_hi; // @[el2_lsu_bus_intf.scala 148:39] + wire [31:0] bus_buffer_io_ld_fwddata_buf_lo; // @[el2_lsu_bus_intf.scala 148:39] + wire [31:0] bus_buffer_io_ld_fwddata_buf_hi; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_imprecise_error_load_any; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_imprecise_error_store_any; // @[el2_lsu_bus_intf.scala 148:39] + wire [31:0] bus_buffer_io_lsu_imprecise_error_addr_any; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_nonblock_load_valid_m; // @[el2_lsu_bus_intf.scala 148:39] + wire [1:0] bus_buffer_io_lsu_nonblock_load_tag_m; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_nonblock_load_inv_r; // @[el2_lsu_bus_intf.scala 148:39] + wire [1:0] bus_buffer_io_lsu_nonblock_load_inv_tag_r; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_nonblock_load_data_valid; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_nonblock_load_data_error; // @[el2_lsu_bus_intf.scala 148:39] + wire [1:0] bus_buffer_io_lsu_nonblock_load_data_tag; // @[el2_lsu_bus_intf.scala 148:39] + wire [31:0] bus_buffer_io_lsu_nonblock_load_data; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_pmu_bus_trxn; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_pmu_bus_misaligned; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_pmu_bus_error; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_pmu_bus_busy; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_axi_awvalid; // @[el2_lsu_bus_intf.scala 148:39] + wire [2:0] bus_buffer_io_lsu_axi_awid; // @[el2_lsu_bus_intf.scala 148:39] + wire [31:0] bus_buffer_io_lsu_axi_awaddr; // @[el2_lsu_bus_intf.scala 148:39] + wire [3:0] bus_buffer_io_lsu_axi_awregion; // @[el2_lsu_bus_intf.scala 148:39] + wire [2:0] bus_buffer_io_lsu_axi_awsize; // @[el2_lsu_bus_intf.scala 148:39] + wire [3:0] bus_buffer_io_lsu_axi_awcache; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_axi_wvalid; // @[el2_lsu_bus_intf.scala 148:39] + wire [63:0] bus_buffer_io_lsu_axi_wdata; // @[el2_lsu_bus_intf.scala 148:39] + wire [7:0] bus_buffer_io_lsu_axi_wstrb; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_axi_bready; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_axi_arvalid; // @[el2_lsu_bus_intf.scala 148:39] + wire [2:0] bus_buffer_io_lsu_axi_arid; // @[el2_lsu_bus_intf.scala 148:39] + wire [31:0] bus_buffer_io_lsu_axi_araddr; // @[el2_lsu_bus_intf.scala 148:39] + wire [3:0] bus_buffer_io_lsu_axi_arregion; // @[el2_lsu_bus_intf.scala 148:39] + wire [2:0] bus_buffer_io_lsu_axi_arsize; // @[el2_lsu_bus_intf.scala 148:39] + wire [3:0] bus_buffer_io_lsu_axi_arcache; // @[el2_lsu_bus_intf.scala 148:39] + wire bus_buffer_io_lsu_axi_rready; // @[el2_lsu_bus_intf.scala 148:39] + wire [3:0] _T_3 = io_lsu_pkt_r_word ? 4'hf : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_4 = io_lsu_pkt_r_half ? 4'h3 : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_5 = io_lsu_pkt_r_by ? 4'h1 : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_6 = _T_3 | _T_4; // @[Mux.scala 27:72] + wire [3:0] ldst_byteen_m = _T_6 | _T_5; // @[Mux.scala 27:72] + wire addr_match_dw_lo_r_m = io_lsu_addr_r[31:3] == io_lsu_addr_m[31:3]; // @[el2_lsu_bus_intf.scala 248:51] + wire _T_17 = io_lsu_addr_r[2] ^ io_lsu_addr_m[2]; // @[el2_lsu_bus_intf.scala 249:71] + wire _T_18 = ~_T_17; // @[el2_lsu_bus_intf.scala 249:53] + wire addr_match_word_lo_r_m = addr_match_dw_lo_r_m & _T_18; // @[el2_lsu_bus_intf.scala 249:51] + reg ldst_dual_r; // @[el2_lsu_bus_intf.scala 290:33] + wire _T_20 = ~ldst_dual_r; // @[el2_lsu_bus_intf.scala 250:48] + wire _T_21 = io_lsu_busreq_r & _T_20; // @[el2_lsu_bus_intf.scala 250:46] + wire _T_22 = _T_21 & io_lsu_busreq_m; // @[el2_lsu_bus_intf.scala 250:61] + wire _T_23 = ~addr_match_word_lo_r_m; // @[el2_lsu_bus_intf.scala 250:102] + wire _T_24 = io_lsu_pkt_m_load | _T_23; // @[el2_lsu_bus_intf.scala 250:100] + wire _T_29 = ~addr_match_dw_lo_r_m; // @[el2_lsu_bus_intf.scala 251:102] + wire _T_30 = io_lsu_pkt_m_load | _T_29; // @[el2_lsu_bus_intf.scala 251:100] + wire [7:0] _T_33 = {4'h0,ldst_byteen_m}; // @[Cat.scala 29:58] + wire [10:0] _GEN_0 = {{3'd0}, _T_33}; // @[el2_lsu_bus_intf.scala 252:63] + wire [10:0] _T_35 = _GEN_0 << io_lsu_addr_m[1:0]; // @[el2_lsu_bus_intf.scala 252:63] + reg _T_389; // @[el2_lsu_bus_intf.scala 292:33] + wire [3:0] ldst_byteen_r = {{3'd0}, _T_389}; // @[el2_lsu_bus_intf.scala 292:23] + wire [7:0] _T_37 = {4'h0,ldst_byteen_r}; // @[Cat.scala 29:58] + wire [10:0] _GEN_1 = {{3'd0}, _T_37}; // @[el2_lsu_bus_intf.scala 253:63] + wire [10:0] _T_39 = _GEN_1 << io_lsu_addr_r[1:0]; // @[el2_lsu_bus_intf.scala 253:63] + wire [63:0] _T_41 = {32'h0,io_store_data_r}; // @[Cat.scala 29:58] + wire [4:0] _T_43 = {io_lsu_addr_r[1:0],3'h0}; // @[Cat.scala 29:58] + wire [94:0] _GEN_2 = {{31'd0}, _T_41}; // @[el2_lsu_bus_intf.scala 254:67] + wire [94:0] _T_44 = _GEN_2 << _T_43; // @[el2_lsu_bus_intf.scala 254:67] + wire [7:0] ldst_byteen_ext_m = _T_35[7:0]; // @[el2_lsu_bus_intf.scala 252:27] + wire [3:0] ldst_byteen_hi_m = ldst_byteen_ext_m[7:4]; // @[el2_lsu_bus_intf.scala 255:47] + wire [3:0] ldst_byteen_lo_m = ldst_byteen_ext_m[3:0]; // @[el2_lsu_bus_intf.scala 256:47] + wire [7:0] ldst_byteen_ext_r = _T_39[7:0]; // @[el2_lsu_bus_intf.scala 253:27] + wire [3:0] ldst_byteen_hi_r = ldst_byteen_ext_r[7:4]; // @[el2_lsu_bus_intf.scala 257:47] + wire [3:0] ldst_byteen_lo_r = ldst_byteen_ext_r[3:0]; // @[el2_lsu_bus_intf.scala 258:47] + wire [63:0] store_data_ext_r = _T_44[63:0]; // @[el2_lsu_bus_intf.scala 254:27] + wire [31:0] store_data_hi_r = store_data_ext_r[63:32]; // @[el2_lsu_bus_intf.scala 259:46] + wire [31:0] store_data_lo_r = store_data_ext_r[31:0]; // @[el2_lsu_bus_intf.scala 260:46] + wire _T_53 = io_lsu_addr_m[31:2] == io_lsu_addr_r[31:2]; // @[el2_lsu_bus_intf.scala 261:51] + wire _T_54 = _T_53 & io_lsu_pkt_r_valid; // @[el2_lsu_bus_intf.scala 261:76] + wire _T_55 = _T_54 & io_lsu_pkt_r_store; // @[el2_lsu_bus_intf.scala 261:97] + wire ld_addr_rhit_lo_lo = _T_55 & io_lsu_busreq_m; // @[el2_lsu_bus_intf.scala 261:118] + wire _T_59 = io_end_addr_m[31:2] == io_lsu_addr_r[31:2]; // @[el2_lsu_bus_intf.scala 262:51] + wire _T_60 = _T_59 & io_lsu_pkt_r_valid; // @[el2_lsu_bus_intf.scala 262:76] + wire _T_61 = _T_60 & io_lsu_pkt_r_store; // @[el2_lsu_bus_intf.scala 262:97] + wire ld_addr_rhit_lo_hi = _T_61 & io_lsu_busreq_m; // @[el2_lsu_bus_intf.scala 262:118] + wire _T_65 = io_lsu_addr_m[31:2] == io_end_addr_r[31:2]; // @[el2_lsu_bus_intf.scala 263:51] + wire _T_66 = _T_65 & io_lsu_pkt_r_valid; // @[el2_lsu_bus_intf.scala 263:76] + wire _T_67 = _T_66 & io_lsu_pkt_r_store; // @[el2_lsu_bus_intf.scala 263:97] + wire ld_addr_rhit_hi_lo = _T_67 & io_lsu_busreq_m; // @[el2_lsu_bus_intf.scala 263:118] + wire _T_71 = io_end_addr_m[31:2] == io_end_addr_r[31:2]; // @[el2_lsu_bus_intf.scala 264:51] + wire _T_72 = _T_71 & io_lsu_pkt_r_valid; // @[el2_lsu_bus_intf.scala 264:76] + wire _T_73 = _T_72 & io_lsu_pkt_r_store; // @[el2_lsu_bus_intf.scala 264:97] + wire ld_addr_rhit_hi_hi = _T_73 & io_lsu_busreq_m; // @[el2_lsu_bus_intf.scala 264:118] + wire _T_76 = ld_addr_rhit_lo_lo & ldst_byteen_lo_r[0]; // @[el2_lsu_bus_intf.scala 265:70] + wire _T_78 = _T_76 & ldst_byteen_lo_m[0]; // @[el2_lsu_bus_intf.scala 265:92] + wire _T_80 = ld_addr_rhit_lo_lo & ldst_byteen_lo_r[1]; // @[el2_lsu_bus_intf.scala 265:70] + wire _T_82 = _T_80 & ldst_byteen_lo_m[1]; // @[el2_lsu_bus_intf.scala 265:92] + wire _T_84 = ld_addr_rhit_lo_lo & ldst_byteen_lo_r[2]; // @[el2_lsu_bus_intf.scala 265:70] + wire _T_86 = _T_84 & ldst_byteen_lo_m[2]; // @[el2_lsu_bus_intf.scala 265:92] + wire _T_88 = ld_addr_rhit_lo_lo & ldst_byteen_lo_r[3]; // @[el2_lsu_bus_intf.scala 265:70] + wire _T_90 = _T_88 & ldst_byteen_lo_m[3]; // @[el2_lsu_bus_intf.scala 265:92] + wire [3:0] ld_byte_rhit_lo_lo = {_T_90,_T_86,_T_82,_T_78}; // @[Cat.scala 29:58] + wire _T_95 = ld_addr_rhit_lo_hi & ldst_byteen_lo_r[0]; // @[el2_lsu_bus_intf.scala 266:70] + wire _T_97 = _T_95 & ldst_byteen_hi_m[0]; // @[el2_lsu_bus_intf.scala 266:92] + wire _T_99 = ld_addr_rhit_lo_hi & ldst_byteen_lo_r[1]; // @[el2_lsu_bus_intf.scala 266:70] + wire _T_101 = _T_99 & ldst_byteen_hi_m[1]; // @[el2_lsu_bus_intf.scala 266:92] + wire _T_103 = ld_addr_rhit_lo_hi & ldst_byteen_lo_r[2]; // @[el2_lsu_bus_intf.scala 266:70] + wire _T_105 = _T_103 & ldst_byteen_hi_m[2]; // @[el2_lsu_bus_intf.scala 266:92] + wire _T_107 = ld_addr_rhit_lo_hi & ldst_byteen_lo_r[3]; // @[el2_lsu_bus_intf.scala 266:70] + wire _T_109 = _T_107 & ldst_byteen_hi_m[3]; // @[el2_lsu_bus_intf.scala 266:92] + wire [3:0] ld_byte_rhit_lo_hi = {_T_109,_T_105,_T_101,_T_97}; // @[Cat.scala 29:58] + wire _T_114 = ld_addr_rhit_hi_lo & ldst_byteen_hi_r[0]; // @[el2_lsu_bus_intf.scala 267:70] + wire _T_116 = _T_114 & ldst_byteen_lo_m[0]; // @[el2_lsu_bus_intf.scala 267:92] + wire _T_118 = ld_addr_rhit_hi_lo & ldst_byteen_hi_r[1]; // @[el2_lsu_bus_intf.scala 267:70] + wire _T_120 = _T_118 & ldst_byteen_lo_m[1]; // @[el2_lsu_bus_intf.scala 267:92] + wire _T_122 = ld_addr_rhit_hi_lo & ldst_byteen_hi_r[2]; // @[el2_lsu_bus_intf.scala 267:70] + wire _T_124 = _T_122 & ldst_byteen_lo_m[2]; // @[el2_lsu_bus_intf.scala 267:92] + wire _T_126 = ld_addr_rhit_hi_lo & ldst_byteen_hi_r[3]; // @[el2_lsu_bus_intf.scala 267:70] + wire _T_128 = _T_126 & ldst_byteen_lo_m[3]; // @[el2_lsu_bus_intf.scala 267:92] + wire [3:0] ld_byte_rhit_hi_lo = {_T_128,_T_124,_T_120,_T_116}; // @[Cat.scala 29:58] + wire _T_133 = ld_addr_rhit_hi_hi & ldst_byteen_hi_r[0]; // @[el2_lsu_bus_intf.scala 268:70] + wire _T_135 = _T_133 & ldst_byteen_hi_m[0]; // @[el2_lsu_bus_intf.scala 268:92] + wire _T_137 = ld_addr_rhit_hi_hi & ldst_byteen_hi_r[1]; // @[el2_lsu_bus_intf.scala 268:70] + wire _T_139 = _T_137 & ldst_byteen_hi_m[1]; // @[el2_lsu_bus_intf.scala 268:92] + wire _T_141 = ld_addr_rhit_hi_hi & ldst_byteen_hi_r[2]; // @[el2_lsu_bus_intf.scala 268:70] + wire _T_143 = _T_141 & ldst_byteen_hi_m[2]; // @[el2_lsu_bus_intf.scala 268:92] + wire _T_145 = ld_addr_rhit_hi_hi & ldst_byteen_hi_r[3]; // @[el2_lsu_bus_intf.scala 268:70] + wire _T_147 = _T_145 & ldst_byteen_hi_m[3]; // @[el2_lsu_bus_intf.scala 268:92] + wire [3:0] ld_byte_rhit_hi_hi = {_T_147,_T_143,_T_139,_T_135}; // @[Cat.scala 29:58] + wire _T_153 = ld_byte_rhit_lo_lo[0] | ld_byte_rhit_hi_lo[0]; // @[el2_lsu_bus_intf.scala 269:73] + wire [3:0] ld_byte_hit_buf_lo = bus_buffer_io_ld_byte_hit_buf_lo; // @[el2_lsu_bus_intf.scala 198:38] + wire _T_155 = _T_153 | ld_byte_hit_buf_lo[0]; // @[el2_lsu_bus_intf.scala 269:97] + wire _T_158 = ld_byte_rhit_lo_lo[1] | ld_byte_rhit_hi_lo[1]; // @[el2_lsu_bus_intf.scala 269:73] + wire _T_160 = _T_158 | ld_byte_hit_buf_lo[1]; // @[el2_lsu_bus_intf.scala 269:97] + wire _T_163 = ld_byte_rhit_lo_lo[2] | ld_byte_rhit_hi_lo[2]; // @[el2_lsu_bus_intf.scala 269:73] + wire _T_165 = _T_163 | ld_byte_hit_buf_lo[2]; // @[el2_lsu_bus_intf.scala 269:97] + wire _T_168 = ld_byte_rhit_lo_lo[3] | ld_byte_rhit_hi_lo[3]; // @[el2_lsu_bus_intf.scala 269:73] + wire _T_170 = _T_168 | ld_byte_hit_buf_lo[3]; // @[el2_lsu_bus_intf.scala 269:97] + wire [3:0] ld_byte_hit_lo = {_T_170,_T_165,_T_160,_T_155}; // @[Cat.scala 29:58] + wire _T_176 = ld_byte_rhit_lo_hi[0] | ld_byte_rhit_hi_hi[0]; // @[el2_lsu_bus_intf.scala 270:73] + wire [3:0] ld_byte_hit_buf_hi = bus_buffer_io_ld_byte_hit_buf_hi; // @[el2_lsu_bus_intf.scala 199:38] + wire _T_178 = _T_176 | ld_byte_hit_buf_hi[0]; // @[el2_lsu_bus_intf.scala 270:97] + wire _T_181 = ld_byte_rhit_lo_hi[1] | ld_byte_rhit_hi_hi[1]; // @[el2_lsu_bus_intf.scala 270:73] + wire _T_183 = _T_181 | ld_byte_hit_buf_hi[1]; // @[el2_lsu_bus_intf.scala 270:97] + wire _T_186 = ld_byte_rhit_lo_hi[2] | ld_byte_rhit_hi_hi[2]; // @[el2_lsu_bus_intf.scala 270:73] + wire _T_188 = _T_186 | ld_byte_hit_buf_hi[2]; // @[el2_lsu_bus_intf.scala 270:97] + wire _T_191 = ld_byte_rhit_lo_hi[3] | ld_byte_rhit_hi_hi[3]; // @[el2_lsu_bus_intf.scala 270:73] + wire _T_193 = _T_191 | ld_byte_hit_buf_hi[3]; // @[el2_lsu_bus_intf.scala 270:97] + wire [3:0] ld_byte_hit_hi = {_T_193,_T_188,_T_183,_T_178}; // @[Cat.scala 29:58] + wire [3:0] ld_byte_rhit_lo = {_T_168,_T_163,_T_158,_T_153}; // @[Cat.scala 29:58] + wire [3:0] ld_byte_rhit_hi = {_T_191,_T_186,_T_181,_T_176}; // @[Cat.scala 29:58] + wire [7:0] _T_231 = ld_byte_rhit_lo_lo[0] ? store_data_lo_r[7:0] : 8'h0; // @[Mux.scala 27:72] + wire [7:0] _T_232 = ld_byte_rhit_hi_lo[0] ? store_data_hi_r[7:0] : 8'h0; // @[Mux.scala 27:72] + wire [7:0] _T_233 = _T_231 | _T_232; // @[Mux.scala 27:72] + wire [7:0] _T_239 = ld_byte_rhit_lo_lo[1] ? store_data_lo_r[15:8] : 8'h0; // @[Mux.scala 27:72] + wire [7:0] _T_240 = ld_byte_rhit_hi_lo[1] ? store_data_hi_r[15:8] : 8'h0; // @[Mux.scala 27:72] + wire [7:0] _T_241 = _T_239 | _T_240; // @[Mux.scala 27:72] + wire [7:0] _T_247 = ld_byte_rhit_lo_lo[2] ? store_data_lo_r[23:16] : 8'h0; // @[Mux.scala 27:72] + wire [7:0] _T_248 = ld_byte_rhit_hi_lo[2] ? store_data_hi_r[23:16] : 8'h0; // @[Mux.scala 27:72] + wire [7:0] _T_249 = _T_247 | _T_248; // @[Mux.scala 27:72] + wire [7:0] _T_255 = ld_byte_rhit_lo_lo[3] ? store_data_lo_r[31:24] : 8'h0; // @[Mux.scala 27:72] + wire [7:0] _T_256 = ld_byte_rhit_hi_lo[3] ? store_data_hi_r[31:24] : 8'h0; // @[Mux.scala 27:72] + wire [7:0] _T_257 = _T_255 | _T_256; // @[Mux.scala 27:72] + wire [31:0] ld_fwddata_rpipe_lo = {_T_257,_T_249,_T_241,_T_233}; // @[Cat.scala 29:58] + wire [7:0] _T_266 = ld_byte_rhit_lo_hi[0] ? store_data_lo_r[7:0] : 8'h0; // @[Mux.scala 27:72] + wire [7:0] _T_267 = ld_byte_rhit_hi_hi[0] ? store_data_hi_r[7:0] : 8'h0; // @[Mux.scala 27:72] + wire [7:0] _T_268 = _T_266 | _T_267; // @[Mux.scala 27:72] + wire [7:0] _T_274 = ld_byte_rhit_lo_hi[1] ? store_data_lo_r[15:8] : 8'h0; // @[Mux.scala 27:72] + wire [7:0] _T_275 = ld_byte_rhit_hi_hi[1] ? store_data_hi_r[15:8] : 8'h0; // @[Mux.scala 27:72] + wire [7:0] _T_276 = _T_274 | _T_275; // @[Mux.scala 27:72] + wire [7:0] _T_282 = ld_byte_rhit_lo_hi[2] ? store_data_lo_r[23:16] : 8'h0; // @[Mux.scala 27:72] + wire [7:0] _T_283 = ld_byte_rhit_hi_hi[2] ? store_data_hi_r[23:16] : 8'h0; // @[Mux.scala 27:72] + wire [7:0] _T_284 = _T_282 | _T_283; // @[Mux.scala 27:72] + wire [7:0] _T_290 = ld_byte_rhit_lo_hi[3] ? store_data_lo_r[31:24] : 8'h0; // @[Mux.scala 27:72] + wire [7:0] _T_291 = ld_byte_rhit_hi_hi[3] ? store_data_hi_r[31:24] : 8'h0; // @[Mux.scala 27:72] + wire [7:0] _T_292 = _T_290 | _T_291; // @[Mux.scala 27:72] + wire [31:0] ld_fwddata_rpipe_hi = {_T_292,_T_284,_T_276,_T_268}; // @[Cat.scala 29:58] + wire [31:0] ld_fwddata_buf_lo = bus_buffer_io_ld_fwddata_buf_lo; // @[el2_lsu_bus_intf.scala 200:38] + wire [7:0] _T_300 = ld_byte_rhit_lo[0] ? ld_fwddata_rpipe_lo[7:0] : ld_fwddata_buf_lo[7:0]; // @[el2_lsu_bus_intf.scala 275:54] + wire [7:0] _T_304 = ld_byte_rhit_lo[1] ? ld_fwddata_rpipe_lo[15:8] : ld_fwddata_buf_lo[15:8]; // @[el2_lsu_bus_intf.scala 275:54] + wire [7:0] _T_308 = ld_byte_rhit_lo[2] ? ld_fwddata_rpipe_lo[23:16] : ld_fwddata_buf_lo[23:16]; // @[el2_lsu_bus_intf.scala 275:54] + wire [7:0] _T_312 = ld_byte_rhit_lo[3] ? ld_fwddata_rpipe_lo[31:24] : ld_fwddata_buf_lo[31:24]; // @[el2_lsu_bus_intf.scala 275:54] + wire [31:0] _T_315 = {_T_312,_T_308,_T_304,_T_300}; // @[Cat.scala 29:58] + wire [31:0] ld_fwddata_buf_hi = bus_buffer_io_ld_fwddata_buf_hi; // @[el2_lsu_bus_intf.scala 201:38] + wire [7:0] _T_319 = ld_byte_rhit_hi[0] ? ld_fwddata_rpipe_hi[7:0] : ld_fwddata_buf_hi[7:0]; // @[el2_lsu_bus_intf.scala 276:54] + wire [7:0] _T_323 = ld_byte_rhit_hi[1] ? ld_fwddata_rpipe_hi[15:8] : ld_fwddata_buf_hi[15:8]; // @[el2_lsu_bus_intf.scala 276:54] + wire [7:0] _T_327 = ld_byte_rhit_hi[2] ? ld_fwddata_rpipe_hi[23:16] : ld_fwddata_buf_hi[23:16]; // @[el2_lsu_bus_intf.scala 276:54] + wire [7:0] _T_331 = ld_byte_rhit_hi[3] ? ld_fwddata_rpipe_hi[31:24] : ld_fwddata_buf_hi[31:24]; // @[el2_lsu_bus_intf.scala 276:54] + wire [31:0] _T_334 = {_T_331,_T_327,_T_323,_T_319}; // @[Cat.scala 29:58] + wire _T_337 = ~ldst_byteen_lo_m[0]; // @[el2_lsu_bus_intf.scala 277:72] + wire _T_338 = ld_byte_hit_lo[0] | _T_337; // @[el2_lsu_bus_intf.scala 277:70] + wire _T_341 = ~ldst_byteen_lo_m[1]; // @[el2_lsu_bus_intf.scala 277:72] + wire _T_342 = ld_byte_hit_lo[1] | _T_341; // @[el2_lsu_bus_intf.scala 277:70] + wire _T_345 = ~ldst_byteen_lo_m[2]; // @[el2_lsu_bus_intf.scala 277:72] + wire _T_346 = ld_byte_hit_lo[2] | _T_345; // @[el2_lsu_bus_intf.scala 277:70] + wire _T_349 = ~ldst_byteen_lo_m[3]; // @[el2_lsu_bus_intf.scala 277:72] + wire _T_350 = ld_byte_hit_lo[3] | _T_349; // @[el2_lsu_bus_intf.scala 277:70] + wire _T_351 = _T_338 & _T_342; // @[el2_lsu_bus_intf.scala 277:111] + wire _T_352 = _T_351 & _T_346; // @[el2_lsu_bus_intf.scala 277:111] + wire ld_full_hit_lo_m = _T_352 & _T_350; // @[el2_lsu_bus_intf.scala 277:111] + wire _T_356 = ~ldst_byteen_hi_m[0]; // @[el2_lsu_bus_intf.scala 278:72] + wire _T_357 = ld_byte_hit_hi[0] | _T_356; // @[el2_lsu_bus_intf.scala 278:70] + wire _T_360 = ~ldst_byteen_hi_m[1]; // @[el2_lsu_bus_intf.scala 278:72] + wire _T_361 = ld_byte_hit_hi[1] | _T_360; // @[el2_lsu_bus_intf.scala 278:70] + wire _T_364 = ~ldst_byteen_hi_m[2]; // @[el2_lsu_bus_intf.scala 278:72] + wire _T_365 = ld_byte_hit_hi[2] | _T_364; // @[el2_lsu_bus_intf.scala 278:70] + wire _T_368 = ~ldst_byteen_hi_m[3]; // @[el2_lsu_bus_intf.scala 278:72] + wire _T_369 = ld_byte_hit_hi[3] | _T_368; // @[el2_lsu_bus_intf.scala 278:70] + wire _T_370 = _T_357 & _T_361; // @[el2_lsu_bus_intf.scala 278:111] + wire _T_371 = _T_370 & _T_365; // @[el2_lsu_bus_intf.scala 278:111] + wire ld_full_hit_hi_m = _T_371 & _T_369; // @[el2_lsu_bus_intf.scala 278:111] + wire _T_373 = ld_full_hit_lo_m & ld_full_hit_hi_m; // @[el2_lsu_bus_intf.scala 279:47] + wire _T_374 = _T_373 & io_lsu_busreq_m; // @[el2_lsu_bus_intf.scala 279:66] + wire _T_375 = _T_374 & io_lsu_pkt_m_load; // @[el2_lsu_bus_intf.scala 279:84] + wire _T_376 = ~io_is_sideeffects_m; // @[el2_lsu_bus_intf.scala 279:106] + wire [63:0] ld_fwddata_hi = {{32'd0}, _T_334}; // @[el2_lsu_bus_intf.scala 276:27] + wire [63:0] ld_fwddata_lo = {{32'd0}, _T_315}; // @[el2_lsu_bus_intf.scala 275:27] + wire [63:0] _T_380 = {ld_fwddata_hi[31:0],ld_fwddata_lo[31:0]}; // @[Cat.scala 29:58] + wire [3:0] _GEN_3 = {{2'd0}, io_lsu_addr_m[1:0]}; // @[el2_lsu_bus_intf.scala 280:83] + wire [5:0] _T_382 = 4'h8 * _GEN_3; // @[el2_lsu_bus_intf.scala 280:83] + wire [63:0] ld_fwddata_m = _T_380 >> _T_382; // @[el2_lsu_bus_intf.scala 280:76] + reg lsu_bus_clk_en_q; // @[el2_lsu_bus_intf.scala 284:32] + reg ldst_dual_m; // @[el2_lsu_bus_intf.scala 287:27] + reg is_sideeffects_r; // @[el2_lsu_bus_intf.scala 291:33] + el2_lsu_bus_buffer bus_buffer ( // @[el2_lsu_bus_intf.scala 148:39] + .clock(bus_buffer_clock), + .reset(bus_buffer_reset), + .io_scan_mode(bus_buffer_io_scan_mode), + .io_dec_tlu_external_ldfwd_disable(bus_buffer_io_dec_tlu_external_ldfwd_disable), + .io_dec_tlu_wb_coalescing_disable(bus_buffer_io_dec_tlu_wb_coalescing_disable), + .io_dec_tlu_sideeffect_posted_disable(bus_buffer_io_dec_tlu_sideeffect_posted_disable), + .io_dec_tlu_force_halt(bus_buffer_io_dec_tlu_force_halt), + .io_lsu_c2_r_clk(bus_buffer_io_lsu_c2_r_clk), + .io_lsu_bus_ibuf_c1_clk(bus_buffer_io_lsu_bus_ibuf_c1_clk), + .io_lsu_bus_buf_c1_clk(bus_buffer_io_lsu_bus_buf_c1_clk), + .io_lsu_free_c2_clk(bus_buffer_io_lsu_free_c2_clk), + .io_lsu_busm_clk(bus_buffer_io_lsu_busm_clk), + .io_dec_lsu_valid_raw_d(bus_buffer_io_dec_lsu_valid_raw_d), + .io_lsu_pkt_m_load(bus_buffer_io_lsu_pkt_m_load), + .io_lsu_pkt_m_valid(bus_buffer_io_lsu_pkt_m_valid), + .io_lsu_pkt_r_by(bus_buffer_io_lsu_pkt_r_by), + .io_lsu_pkt_r_half(bus_buffer_io_lsu_pkt_r_half), + .io_lsu_pkt_r_word(bus_buffer_io_lsu_pkt_r_word), + .io_lsu_pkt_r_load(bus_buffer_io_lsu_pkt_r_load), + .io_lsu_pkt_r_store(bus_buffer_io_lsu_pkt_r_store), + .io_lsu_pkt_r_unsign(bus_buffer_io_lsu_pkt_r_unsign), + .io_lsu_addr_m(bus_buffer_io_lsu_addr_m), + .io_end_addr_m(bus_buffer_io_end_addr_m), + .io_lsu_addr_r(bus_buffer_io_lsu_addr_r), + .io_end_addr_r(bus_buffer_io_end_addr_r), + .io_store_data_r(bus_buffer_io_store_data_r), + .io_no_word_merge_r(bus_buffer_io_no_word_merge_r), + .io_no_dword_merge_r(bus_buffer_io_no_dword_merge_r), + .io_lsu_busreq_m(bus_buffer_io_lsu_busreq_m), + .io_ld_full_hit_m(bus_buffer_io_ld_full_hit_m), + .io_flush_m_up(bus_buffer_io_flush_m_up), + .io_flush_r(bus_buffer_io_flush_r), + .io_lsu_commit_r(bus_buffer_io_lsu_commit_r), + .io_is_sideeffects_r(bus_buffer_io_is_sideeffects_r), + .io_ldst_dual_d(bus_buffer_io_ldst_dual_d), + .io_ldst_dual_m(bus_buffer_io_ldst_dual_m), + .io_ldst_dual_r(bus_buffer_io_ldst_dual_r), + .io_ldst_byteen_ext_m(bus_buffer_io_ldst_byteen_ext_m), + .io_lsu_axi_awready(bus_buffer_io_lsu_axi_awready), + .io_lsu_axi_wready(bus_buffer_io_lsu_axi_wready), + .io_lsu_axi_bvalid(bus_buffer_io_lsu_axi_bvalid), + .io_lsu_axi_bresp(bus_buffer_io_lsu_axi_bresp), + .io_lsu_axi_bid(bus_buffer_io_lsu_axi_bid), + .io_lsu_axi_arready(bus_buffer_io_lsu_axi_arready), + .io_lsu_axi_rvalid(bus_buffer_io_lsu_axi_rvalid), + .io_lsu_axi_rid(bus_buffer_io_lsu_axi_rid), + .io_lsu_axi_rdata(bus_buffer_io_lsu_axi_rdata), + .io_lsu_bus_clk_en(bus_buffer_io_lsu_bus_clk_en), + .io_lsu_bus_clk_en_q(bus_buffer_io_lsu_bus_clk_en_q), + .io_lsu_busreq_r(bus_buffer_io_lsu_busreq_r), + .io_lsu_bus_buffer_pend_any(bus_buffer_io_lsu_bus_buffer_pend_any), + .io_lsu_bus_buffer_full_any(bus_buffer_io_lsu_bus_buffer_full_any), + .io_lsu_bus_buffer_empty_any(bus_buffer_io_lsu_bus_buffer_empty_any), + .io_ld_byte_hit_buf_lo(bus_buffer_io_ld_byte_hit_buf_lo), + .io_ld_byte_hit_buf_hi(bus_buffer_io_ld_byte_hit_buf_hi), + .io_ld_fwddata_buf_lo(bus_buffer_io_ld_fwddata_buf_lo), + .io_ld_fwddata_buf_hi(bus_buffer_io_ld_fwddata_buf_hi), + .io_lsu_imprecise_error_load_any(bus_buffer_io_lsu_imprecise_error_load_any), + .io_lsu_imprecise_error_store_any(bus_buffer_io_lsu_imprecise_error_store_any), + .io_lsu_imprecise_error_addr_any(bus_buffer_io_lsu_imprecise_error_addr_any), + .io_lsu_nonblock_load_valid_m(bus_buffer_io_lsu_nonblock_load_valid_m), + .io_lsu_nonblock_load_tag_m(bus_buffer_io_lsu_nonblock_load_tag_m), + .io_lsu_nonblock_load_inv_r(bus_buffer_io_lsu_nonblock_load_inv_r), + .io_lsu_nonblock_load_inv_tag_r(bus_buffer_io_lsu_nonblock_load_inv_tag_r), + .io_lsu_nonblock_load_data_valid(bus_buffer_io_lsu_nonblock_load_data_valid), + .io_lsu_nonblock_load_data_error(bus_buffer_io_lsu_nonblock_load_data_error), + .io_lsu_nonblock_load_data_tag(bus_buffer_io_lsu_nonblock_load_data_tag), + .io_lsu_nonblock_load_data(bus_buffer_io_lsu_nonblock_load_data), + .io_lsu_pmu_bus_trxn(bus_buffer_io_lsu_pmu_bus_trxn), + .io_lsu_pmu_bus_misaligned(bus_buffer_io_lsu_pmu_bus_misaligned), + .io_lsu_pmu_bus_error(bus_buffer_io_lsu_pmu_bus_error), + .io_lsu_pmu_bus_busy(bus_buffer_io_lsu_pmu_bus_busy), + .io_lsu_axi_awvalid(bus_buffer_io_lsu_axi_awvalid), + .io_lsu_axi_awid(bus_buffer_io_lsu_axi_awid), + .io_lsu_axi_awaddr(bus_buffer_io_lsu_axi_awaddr), + .io_lsu_axi_awregion(bus_buffer_io_lsu_axi_awregion), + .io_lsu_axi_awsize(bus_buffer_io_lsu_axi_awsize), + .io_lsu_axi_awcache(bus_buffer_io_lsu_axi_awcache), + .io_lsu_axi_wvalid(bus_buffer_io_lsu_axi_wvalid), + .io_lsu_axi_wdata(bus_buffer_io_lsu_axi_wdata), + .io_lsu_axi_wstrb(bus_buffer_io_lsu_axi_wstrb), + .io_lsu_axi_bready(bus_buffer_io_lsu_axi_bready), + .io_lsu_axi_arvalid(bus_buffer_io_lsu_axi_arvalid), + .io_lsu_axi_arid(bus_buffer_io_lsu_axi_arid), + .io_lsu_axi_araddr(bus_buffer_io_lsu_axi_araddr), + .io_lsu_axi_arregion(bus_buffer_io_lsu_axi_arregion), + .io_lsu_axi_arsize(bus_buffer_io_lsu_axi_arsize), + .io_lsu_axi_arcache(bus_buffer_io_lsu_axi_arcache), + .io_lsu_axi_rready(bus_buffer_io_lsu_axi_rready) + ); + assign io_lsu_busreq_r = bus_buffer_io_lsu_busreq_r; // @[el2_lsu_bus_intf.scala 193:38] + assign io_lsu_bus_buffer_pend_any = bus_buffer_io_lsu_bus_buffer_pend_any; // @[el2_lsu_bus_intf.scala 194:38] + assign io_lsu_bus_buffer_full_any = bus_buffer_io_lsu_bus_buffer_full_any; // @[el2_lsu_bus_intf.scala 195:38] + assign io_lsu_bus_buffer_empty_any = bus_buffer_io_lsu_bus_buffer_empty_any; // @[el2_lsu_bus_intf.scala 196:38] + assign io_lsu_bus_idle_any = 1'h1; // @[el2_lsu_bus_intf.scala 197:38] + assign io_bus_read_data_m = ld_fwddata_m[31:0]; // @[el2_lsu_bus_intf.scala 281:27] + assign io_lsu_imprecise_error_load_any = bus_buffer_io_lsu_imprecise_error_load_any; // @[el2_lsu_bus_intf.scala 202:38] + assign io_lsu_imprecise_error_store_any = bus_buffer_io_lsu_imprecise_error_store_any; // @[el2_lsu_bus_intf.scala 203:38] + assign io_lsu_imprecise_error_addr_any = bus_buffer_io_lsu_imprecise_error_addr_any; // @[el2_lsu_bus_intf.scala 204:38] + assign io_lsu_nonblock_load_valid_m = bus_buffer_io_lsu_nonblock_load_valid_m; // @[el2_lsu_bus_intf.scala 205:38] + assign io_lsu_nonblock_load_tag_m = bus_buffer_io_lsu_nonblock_load_tag_m; // @[el2_lsu_bus_intf.scala 206:38] + assign io_lsu_nonblock_load_inv_r = bus_buffer_io_lsu_nonblock_load_inv_r; // @[el2_lsu_bus_intf.scala 207:38] + assign io_lsu_nonblock_load_inv_tag_r = bus_buffer_io_lsu_nonblock_load_inv_tag_r; // @[el2_lsu_bus_intf.scala 208:38] + assign io_lsu_nonblock_load_data_valid = bus_buffer_io_lsu_nonblock_load_data_valid; // @[el2_lsu_bus_intf.scala 209:38] + assign io_lsu_nonblock_load_data_error = bus_buffer_io_lsu_nonblock_load_data_error; // @[el2_lsu_bus_intf.scala 210:38] + assign io_lsu_nonblock_load_data_tag = bus_buffer_io_lsu_nonblock_load_data_tag; // @[el2_lsu_bus_intf.scala 211:38] + assign io_lsu_nonblock_load_data = bus_buffer_io_lsu_nonblock_load_data; // @[el2_lsu_bus_intf.scala 212:38] + assign io_lsu_pmu_bus_trxn = bus_buffer_io_lsu_pmu_bus_trxn; // @[el2_lsu_bus_intf.scala 213:38] + assign io_lsu_pmu_bus_misaligned = bus_buffer_io_lsu_pmu_bus_misaligned; // @[el2_lsu_bus_intf.scala 214:38] + assign io_lsu_pmu_bus_error = bus_buffer_io_lsu_pmu_bus_error; // @[el2_lsu_bus_intf.scala 215:38] + assign io_lsu_pmu_bus_busy = bus_buffer_io_lsu_pmu_bus_busy; // @[el2_lsu_bus_intf.scala 216:38] + assign io_lsu_axi_awvalid = bus_buffer_io_lsu_axi_awvalid; // @[el2_lsu_bus_intf.scala 217:38] + assign io_lsu_axi_awid = bus_buffer_io_lsu_axi_awid; // @[el2_lsu_bus_intf.scala 218:38] + assign io_lsu_axi_awaddr = bus_buffer_io_lsu_axi_awaddr; // @[el2_lsu_bus_intf.scala 219:38] + assign io_lsu_axi_awregion = bus_buffer_io_lsu_axi_awregion; // @[el2_lsu_bus_intf.scala 220:38] + assign io_lsu_axi_awlen = 8'h0; // @[el2_lsu_bus_intf.scala 221:38] + assign io_lsu_axi_awsize = bus_buffer_io_lsu_axi_awsize; // @[el2_lsu_bus_intf.scala 222:38] + assign io_lsu_axi_awburst = 2'h1; // @[el2_lsu_bus_intf.scala 223:38] + assign io_lsu_axi_awlock = 1'h0; // @[el2_lsu_bus_intf.scala 224:38] + assign io_lsu_axi_awcache = bus_buffer_io_lsu_axi_awcache; // @[el2_lsu_bus_intf.scala 225:38] + assign io_lsu_axi_awprot = 3'h0; // @[el2_lsu_bus_intf.scala 226:38] + assign io_lsu_axi_awqos = 4'h0; // @[el2_lsu_bus_intf.scala 227:38] + assign io_lsu_axi_wvalid = bus_buffer_io_lsu_axi_wvalid; // @[el2_lsu_bus_intf.scala 228:38] + assign io_lsu_axi_wdata = bus_buffer_io_lsu_axi_wdata; // @[el2_lsu_bus_intf.scala 229:38] + assign io_lsu_axi_wstrb = bus_buffer_io_lsu_axi_wstrb; // @[el2_lsu_bus_intf.scala 230:38] + assign io_lsu_axi_wlast = 1'h1; // @[el2_lsu_bus_intf.scala 231:38] + assign io_lsu_axi_bready = 1'h1; // @[el2_lsu_bus_intf.scala 232:38] + assign io_lsu_axi_arvalid = bus_buffer_io_lsu_axi_arvalid; // @[el2_lsu_bus_intf.scala 233:38] + assign io_lsu_axi_arid = bus_buffer_io_lsu_axi_arid; // @[el2_lsu_bus_intf.scala 234:38] + assign io_lsu_axi_araddr = bus_buffer_io_lsu_axi_araddr; // @[el2_lsu_bus_intf.scala 235:38] + assign io_lsu_axi_arregion = bus_buffer_io_lsu_axi_arregion; // @[el2_lsu_bus_intf.scala 236:38] + assign io_lsu_axi_arlen = 8'h0; // @[el2_lsu_bus_intf.scala 237:38] + assign io_lsu_axi_arsize = bus_buffer_io_lsu_axi_arsize; // @[el2_lsu_bus_intf.scala 238:38] + assign io_lsu_axi_arburst = 2'h1; // @[el2_lsu_bus_intf.scala 239:38] + assign io_lsu_axi_arlock = 1'h0; // @[el2_lsu_bus_intf.scala 240:38] + assign io_lsu_axi_arcache = bus_buffer_io_lsu_axi_arcache; // @[el2_lsu_bus_intf.scala 241:38] + assign io_lsu_axi_arprot = 3'h0; // @[el2_lsu_bus_intf.scala 242:38] + assign io_lsu_axi_arqos = 4'h0; // @[el2_lsu_bus_intf.scala 243:38] + assign io_lsu_axi_rready = 1'h1; // @[el2_lsu_bus_intf.scala 244:38] + assign bus_buffer_clock = clock; + assign bus_buffer_reset = reset; + assign bus_buffer_io_scan_mode = io_scan_mode; // @[el2_lsu_bus_intf.scala 149:51] + assign bus_buffer_io_dec_tlu_external_ldfwd_disable = io_dec_tlu_external_ldfwd_disable; // @[el2_lsu_bus_intf.scala 150:51] + assign bus_buffer_io_dec_tlu_wb_coalescing_disable = io_dec_tlu_wb_coalescing_disable; // @[el2_lsu_bus_intf.scala 151:51] + assign bus_buffer_io_dec_tlu_sideeffect_posted_disable = io_dec_tlu_sideeffect_posted_disable; // @[el2_lsu_bus_intf.scala 152:51] + assign bus_buffer_io_dec_tlu_force_halt = io_dec_tlu_force_halt; // @[el2_lsu_bus_intf.scala 153:51] + assign bus_buffer_io_lsu_c2_r_clk = io_lsu_c2_r_clk; // @[el2_lsu_bus_intf.scala 154:51] + assign bus_buffer_io_lsu_bus_ibuf_c1_clk = io_lsu_bus_ibuf_c1_clk; // @[el2_lsu_bus_intf.scala 155:51] + assign bus_buffer_io_lsu_bus_buf_c1_clk = io_lsu_bus_buf_c1_clk; // @[el2_lsu_bus_intf.scala 157:51] + assign bus_buffer_io_lsu_free_c2_clk = io_lsu_free_c2_clk; // @[el2_lsu_bus_intf.scala 158:51] + assign bus_buffer_io_lsu_busm_clk = io_lsu_busm_clk; // @[el2_lsu_bus_intf.scala 159:51] + assign bus_buffer_io_dec_lsu_valid_raw_d = io_dec_lsu_valid_raw_d; // @[el2_lsu_bus_intf.scala 160:51] + assign bus_buffer_io_lsu_pkt_m_load = io_lsu_pkt_m_load; // @[el2_lsu_bus_intf.scala 161:51] + assign bus_buffer_io_lsu_pkt_m_valid = io_lsu_pkt_m_valid; // @[el2_lsu_bus_intf.scala 161:51] + assign bus_buffer_io_lsu_pkt_r_by = io_lsu_pkt_r_by; // @[el2_lsu_bus_intf.scala 162:51] + assign bus_buffer_io_lsu_pkt_r_half = io_lsu_pkt_r_half; // @[el2_lsu_bus_intf.scala 162:51] + assign bus_buffer_io_lsu_pkt_r_word = io_lsu_pkt_r_word; // @[el2_lsu_bus_intf.scala 162:51] + assign bus_buffer_io_lsu_pkt_r_load = io_lsu_pkt_r_load; // @[el2_lsu_bus_intf.scala 162:51] + assign bus_buffer_io_lsu_pkt_r_store = io_lsu_pkt_r_store; // @[el2_lsu_bus_intf.scala 162:51] + assign bus_buffer_io_lsu_pkt_r_unsign = io_lsu_pkt_r_unsign; // @[el2_lsu_bus_intf.scala 162:51] + assign bus_buffer_io_lsu_addr_m = io_lsu_addr_m; // @[el2_lsu_bus_intf.scala 163:51] + assign bus_buffer_io_end_addr_m = io_end_addr_m; // @[el2_lsu_bus_intf.scala 164:51] + assign bus_buffer_io_lsu_addr_r = io_lsu_addr_r; // @[el2_lsu_bus_intf.scala 165:51] + assign bus_buffer_io_end_addr_r = io_end_addr_r; // @[el2_lsu_bus_intf.scala 166:51] + assign bus_buffer_io_store_data_r = io_store_data_r; // @[el2_lsu_bus_intf.scala 167:51] + assign bus_buffer_io_no_word_merge_r = _T_22 & _T_24; // @[el2_lsu_bus_intf.scala 168:51] + assign bus_buffer_io_no_dword_merge_r = _T_22 & _T_30; // @[el2_lsu_bus_intf.scala 169:51] + assign bus_buffer_io_lsu_busreq_m = io_lsu_busreq_m; // @[el2_lsu_bus_intf.scala 170:51] + assign bus_buffer_io_ld_full_hit_m = _T_375 & _T_376; // @[el2_lsu_bus_intf.scala 171:51] + assign bus_buffer_io_flush_m_up = io_flush_m_up; // @[el2_lsu_bus_intf.scala 172:51] + assign bus_buffer_io_flush_r = io_flush_r; // @[el2_lsu_bus_intf.scala 173:51] + assign bus_buffer_io_lsu_commit_r = io_lsu_commit_r; // @[el2_lsu_bus_intf.scala 174:51] + assign bus_buffer_io_is_sideeffects_r = is_sideeffects_r; // @[el2_lsu_bus_intf.scala 175:51] + assign bus_buffer_io_ldst_dual_d = io_lsu_addr_d[2] != io_end_addr_d[2]; // @[el2_lsu_bus_intf.scala 176:51] + assign bus_buffer_io_ldst_dual_m = ldst_dual_m; // @[el2_lsu_bus_intf.scala 177:51] + assign bus_buffer_io_ldst_dual_r = ldst_dual_r; // @[el2_lsu_bus_intf.scala 178:51] + assign bus_buffer_io_ldst_byteen_ext_m = _T_35[7:0]; // @[el2_lsu_bus_intf.scala 179:51] + assign bus_buffer_io_lsu_axi_awready = io_lsu_axi_awready; // @[el2_lsu_bus_intf.scala 180:51] + assign bus_buffer_io_lsu_axi_wready = io_lsu_axi_wready; // @[el2_lsu_bus_intf.scala 181:51] + assign bus_buffer_io_lsu_axi_bvalid = io_lsu_axi_bvalid; // @[el2_lsu_bus_intf.scala 182:51] + assign bus_buffer_io_lsu_axi_bresp = io_lsu_axi_bresp; // @[el2_lsu_bus_intf.scala 183:51] + assign bus_buffer_io_lsu_axi_bid = io_lsu_axi_bid; // @[el2_lsu_bus_intf.scala 184:51] + assign bus_buffer_io_lsu_axi_arready = io_lsu_axi_arready; // @[el2_lsu_bus_intf.scala 185:51] + assign bus_buffer_io_lsu_axi_rvalid = io_lsu_axi_rvalid; // @[el2_lsu_bus_intf.scala 186:51] + assign bus_buffer_io_lsu_axi_rid = io_lsu_axi_rid; // @[el2_lsu_bus_intf.scala 187:51] + assign bus_buffer_io_lsu_axi_rdata = io_lsu_axi_rdata; // @[el2_lsu_bus_intf.scala 188:51] + assign bus_buffer_io_lsu_bus_clk_en = io_lsu_bus_clk_en; // @[el2_lsu_bus_intf.scala 190:51] + assign bus_buffer_io_lsu_bus_clk_en_q = lsu_bus_clk_en_q; // @[el2_lsu_bus_intf.scala 191:51] +`ifdef RANDOMIZE_GARBAGE_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_INVALID_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_REG_INIT +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_MEM_INIT +`define RANDOMIZE +`endif +`ifndef RANDOM +`define RANDOM $random +`endif +`ifdef RANDOMIZE_MEM_INIT + integer initvar; +`endif +`ifndef SYNTHESIS +`ifdef FIRRTL_BEFORE_INITIAL +`FIRRTL_BEFORE_INITIAL +`endif +initial begin + `ifdef RANDOMIZE + `ifdef INIT_RANDOM + `INIT_RANDOM + `endif + `ifndef VERILATOR + `ifdef RANDOMIZE_DELAY + #`RANDOMIZE_DELAY begin end + `else + #0.002 begin end + `endif + `endif +`ifdef RANDOMIZE_REG_INIT + _RAND_0 = {1{`RANDOM}}; + ldst_dual_r = _RAND_0[0:0]; + _RAND_1 = {1{`RANDOM}}; + _T_389 = _RAND_1[0:0]; + _RAND_2 = {1{`RANDOM}}; + lsu_bus_clk_en_q = _RAND_2[0:0]; + _RAND_3 = {1{`RANDOM}}; + ldst_dual_m = _RAND_3[0:0]; + _RAND_4 = {1{`RANDOM}}; + is_sideeffects_r = _RAND_4[0:0]; +`endif // RANDOMIZE_REG_INIT + if (reset) begin + ldst_dual_r = 1'h0; + end + if (reset) begin + _T_389 = 1'h0; + end + if (reset) begin + lsu_bus_clk_en_q = 1'h0; + end + if (reset) begin + ldst_dual_m = 1'h0; + end + if (reset) begin + is_sideeffects_r = 1'h0; + end + `endif // RANDOMIZE +end // initial +`ifdef FIRRTL_AFTER_INITIAL +`FIRRTL_AFTER_INITIAL +`endif +`endif // SYNTHESIS + always @(posedge io_lsu_c1_r_clk or posedge reset) begin + if (reset) begin + ldst_dual_r <= 1'h0; + end else begin + ldst_dual_r <= io_lsu_bus_clk_en; + end + end + always @(posedge io_lsu_c1_r_clk or posedge reset) begin + if (reset) begin + _T_389 <= 1'h0; + end else begin + _T_389 <= io_lsu_bus_clk_en; + end + end + always @(posedge io_free_clk or posedge reset) begin + if (reset) begin + lsu_bus_clk_en_q <= 1'h0; + end else begin + lsu_bus_clk_en_q <= io_lsu_bus_clk_en; + end + end + always @(posedge io_lsu_c1_m_clk or posedge reset) begin + if (reset) begin + ldst_dual_m <= 1'h0; + end else begin + ldst_dual_m <= io_lsu_bus_clk_en; + end + end + always @(posedge io_lsu_c1_r_clk or posedge reset) begin + if (reset) begin + is_sideeffects_r <= 1'h0; + end else begin + is_sideeffects_r <= io_lsu_bus_clk_en; + end + end +endmodule diff --git a/src/main/scala/ifu/el2_ifu_ifc_ctl.scala b/src/main/scala/ifu/el2_ifu_ifc_ctl.scala index 64c9a8bf..390ff4e8 100644 --- a/src/main/scala/ifu/el2_ifu_ifc_ctl.scala +++ b/src/main/scala/ifu/el2_ifu_ifc_ctl.scala @@ -130,7 +130,6 @@ class el2_ifu_ifc_ctl extends Module with el2_lib with RequireAsyncReset { rvrangecheck(ICCM_SADR, ICCM_SIZE, Cat(io.ifc_fetch_addr_bf,0.U)) else (0.U, 0.U) io.ifc_iccm_access_bf := iccm_acc_in_range_bf - io.ifc_dma_access_ok := ( (!io.ifc_iccm_access_bf | (fb_full_f & !(io.ifu_fb_consume2 | io.ifu_fb_consume1)) | (wfm & !io.ifc_fetch_req_bf) | idle ) & !io.exu_flush_final) | dma_iccm_stall_any_f @@ -141,7 +140,7 @@ class el2_ifu_ifc_ctl extends Module with el2_lib with RequireAsyncReset { io.ifc_fetch_req_f := withClock(io.active_clk){RegNext(io.ifc_fetch_req_bf, init=0.U)} io.ifc_fetch_addr_f := rvdffe(io.ifc_fetch_addr_bf, io.exu_flush_final|io.ifc_fetch_req_f, clock, io.scan_mode) - + //rvdffe(io.ifc_fetch_addr_bf,(io.exu_flush_final|io.ifc_fetch_req_f).asBool,clock,io.scan_mode) } object ifu_ifc extends App { diff --git a/src/main/scala/lib/el2_lib.scala b/src/main/scala/lib/el2_lib.scala index d7f302cb..8a026cf8 100644 --- a/src/main/scala/lib/el2_lib.scala +++ b/src/main/scala/lib/el2_lib.scala @@ -59,7 +59,7 @@ trait param { val DCCM_INDEX_BITS = 0xC //.U(4.W) val DCCM_NUM_BANKS = 0x04 //.U(5.W) val DCCM_REGION = 15 //.U(4.W) - val DCCM_SADR = 0xF0040000 + val DCCM_SADR = 0xF0040000L val DCCM_SIZE = 0x040 val DCCM_WIDTH_BITS = 2 //.U(2.W) val DMA_BUF_DEPTH = 5 //.U(3.W) @@ -226,6 +226,13 @@ trait el2_lib extends param{ (in_region, in_range) } + def rvlsadder(rs1:UInt,offset:UInt) = { + val w1 = Cat(0.U(1.W),rs1(11,0)) + Cat(0.U(1.W),offset(11,0)) //w1[12] =cout offset[11]=sign + val dout_upper = ((Fill(20, ~(offset(11) ^ w1(12)))) & rs1(31,12)) | + ((Fill(20, ~offset(11) & w1(12))) & (rs1(31,12)+1.U)) | + ((Fill(20, offset(11) & ~w1(12))) & (rs1(31,12)-1.U)) + Cat(dout_upper,w1(11,0)) + } /////////////////////////////////////////////////////////////////// def rvmaskandmatch(mask:UInt, data:UInt, masken:Bool):UInt={ val matchvec = Wire(Vec(data.getWidth,UInt(1.W))) @@ -479,6 +486,20 @@ trait el2_lib extends param{ } } + def rvrangecheck_ch(addr:UInt,CCM_SADR:UInt, CCM_SIZE:Int=128) = { + val REGION_BITS = 4 + val MASK_BITS = 10 + log2Ceil(CCM_SIZE) + val start_addr = CCM_SADR + val region = start_addr(31,(32-REGION_BITS)) + val in_region = (addr(31,(32-REGION_BITS)) === region(REGION_BITS-1,0)).asUInt + val in_range = Wire(UInt(1.W)) + if(CCM_SIZE == 48) + in_range := (addr(31,MASK_BITS) === start_addr(31,MASK_BITS)).asUInt & ~(addr(MASK_BITS-1,MASK_BITS-2).andR.asUInt) + else + in_range := (addr(31,MASK_BITS) === start_addr(31,MASK_BITS)).asUInt + (in_range,in_region) + } + ////rvdffe /////////////////////////////////////////////////////////////////////// object rvdffe { def apply(din: UInt, en: Bool, clk: Clock, scan_mode: Bool): UInt = { diff --git a/src/main/scala/lsu/el2_lsu.scala b/src/main/scala/lsu/el2_lsu.scala new file mode 100644 index 00000000..917dc2eb --- /dev/null +++ b/src/main/scala/lsu/el2_lsu.scala @@ -0,0 +1,498 @@ +package lsu +import lib._ +import chisel3._ +import chisel3.util._ +import include._ + + +class el2_lsu extends Module with RequireAsyncReset with param with el2_lib { + val io = IO (new Bundle { + val clk_override = Input(Bool()) + val dec_tlu_flush_lower_r = Input(Bool()) + val dec_tlu_i0_kill_writeb_r = Input(Bool()) + val dec_tlu_force_halt = Input(Bool()) + // chicken signals + val dec_tlu_external_ldfwd_disable = Input(Bool()) + val dec_tlu_wb_coalescing_disable = Input(Bool()) + val dec_tlu_sideeffect_posted_disable = Input(Bool()) + val dec_tlu_core_ecc_disable = Input(Bool()) + + val exu_lsu_rs1_d = Input(UInt(32.W)) + val exu_lsu_rs2_d = Input(UInt(32.W)) + val dec_lsu_offset_d = Input(UInt(12.W)) + val lsu_p = Input(new el2_lsu_pkt_t) + val trigger_pkt_any = Input(Vec(4, new el2_trigger_pkt_t)) + + val dec_lsu_valid_raw_d = Input(Bool()) + val dec_tlu_mrac_ff = Input(UInt(32.W)) + + //Outputs + // val lsu_result_m = Output(UInt(32.W)) + // val lsu_result_corr_r = Output(UInt(32.W)) + val lsu_load_stall_any = Output(Bool()) + val lsu_store_stall_any = Output(Bool()) + val lsu_fastint_stall_any = Output(Bool()) + val lsu_idle_any = Output(Bool()) + val lsu_fir_addr = Output(UInt(32.W)) + val lsu_fir_error = Output(UInt(2.W)) + val lsu_single_ecc_error_incr = Output(Bool()) + val lsu_error_pkt_r = Output(new el2_lsu_error_pkt_t) + val lsu_imprecise_error_load_any = Output(Bool()) + val lsu_imprecise_error_store_any = Output(Bool()) + val lsu_imprecise_error_addr_any = Output(UInt(32.W)) + + // Non-blocking loads + val lsu_nonblock_load_valid_m = Output(Bool()) + val lsu_nonblock_load_tag_m = Output(UInt(LSU_NUM_NBLOAD_WIDTH.W)) + val lsu_nonblock_load_inv_r = Output(Bool()) + val lsu_nonblock_load_inv_tag_r = Output(UInt(LSU_NUM_NBLOAD_WIDTH.W)) + val lsu_nonblock_load_data_valid = Output(Bool()) + val lsu_nonblock_load_data_error = Output(Bool()) + val lsu_nonblock_load_data_tag = Output(UInt(LSU_NUM_NBLOAD_WIDTH.W)) + val lsu_nonblock_load_data = Output(UInt(32.W)) + + val lsu_pmu_load_external_m = Output(Bool()) + val lsu_pmu_store_external_m = Output(Bool()) + val lsu_pmu_misaligned_m = Output(Bool()) + val lsu_pmu_bus_trxn = Output(Bool()) + val lsu_pmu_bus_misaligned = Output(Bool()) + val lsu_pmu_bus_error = Output(Bool()) + val lsu_pmu_bus_busy = Output(Bool()) + + val lsu_trigger_match_m = Output(UInt(4.W)) + // DCCM ports + val dccm_wren = Output(Bool()) + val dccm_rden = Output(Bool()) + val dccm_wr_addr_lo = Output(UInt(DCCM_BITS.W)) + val dccm_wr_addr_hi = Output(UInt(DCCM_BITS.W)) + val dccm_rd_addr_lo = Output(UInt(DCCM_BITS.W)) + val dccm_rd_addr_hi = Output(UInt(DCCM_BITS.W)) + val dccm_wr_data_lo = Output(UInt(DCCM_FDATA_WIDTH.W)) + val dccm_wr_data_hi = Output(UInt(DCCM_FDATA_WIDTH.W)) + val dccm_rd_data_lo = Input(UInt(DCCM_FDATA_WIDTH.W)) + val dccm_rd_data_hi = Input(UInt(DCCM_FDATA_WIDTH.W)) + // PIC ports + val picm_wren = Output(Bool()) + val picm_rden = Output(Bool()) + val picm_mken = Output(Bool()) + val picm_rdaddr = Output(UInt(32.W)) + val picm_wraddr = Output(UInt(32.W)) + val picm_wr_data = Output(UInt(32.W)) + val picm_rd_data = Input(UInt(32.W)) + + // AXI Write Channels + + val lsu_axi_awvalid = Output(Bool()) + val lsu_axi_awlock = Output(Bool()) + val lsu_axi_awready = Input(Bool()) + val lsu_axi_awid = Output(UInt(LSU_BUS_TAG.W)) + val lsu_axi_awaddr = Output(UInt(32.W)) + val lsu_axi_awregion = Output(UInt(4.W)) + val lsu_axi_awlen = Output(UInt(8.W)) + val lsu_axi_awsize = Output(UInt(3.W)) + val lsu_axi_awburst = Output(UInt(2.W)) + val lsu_axi_awcache = Output(UInt(4.W)) + val lsu_axi_awprot = Output(UInt(3.W)) + val lsu_axi_awqos = Output(UInt(4.W)) + val lsu_axi_wvalid = Output(Bool()) + val lsu_axi_wready = Input(Bool()) + val lsu_axi_wdata = Output(UInt(64.W)) + val lsu_axi_wstrb = Output(UInt(8.W)) + val lsu_axi_wlast = Output(Bool()) + val lsu_axi_bvalid = Input(Bool()) + val lsu_axi_bready = Output(Bool()) + val lsu_axi_bresp = Input(UInt(2.W)) + val lsu_axi_bid = Input(UInt(LSU_BUS_TAG.W)) + + // AXI Read Channels + + val lsu_axi_arvalid = Output(Bool()) + val lsu_axi_arlock = Output(Bool()) + val lsu_axi_arready = Input(Bool()) + val lsu_axi_arid = Output(UInt(LSU_BUS_TAG.W)) + val lsu_axi_araddr = Output(UInt(32.W)) + val lsu_axi_arregion = Output(UInt(4.W)) + val lsu_axi_arlen = Output(UInt(8.W)) + val lsu_axi_arsize = Output(UInt(3.W)) + val lsu_axi_arburst = Output(UInt(2.W)) + val lsu_axi_arcache = Output(UInt(4.W)) + val lsu_axi_arprot = Output(UInt(3.W)) + val lsu_axi_arqos = Output(UInt(4.W)) + val lsu_axi_rvalid = Input(Bool()) + val lsu_axi_rready = Output(Bool()) + val lsu_axi_rdata = Input(UInt(64.W)) + val lsu_axi_rlast = Input(Bool()) + val lsu_axi_rresp = Input(UInt(2.W)) + val lsu_axi_rid = Input(UInt(LSU_BUS_TAG.W)) + + val lsu_bus_clk_en = Input(Bool()) + // DMA slave + + val dma_dccm_req = Input(Bool()) + val dma_mem_write = Input(Bool()) + val dccm_dma_rvalid = Output(Bool()) + val dccm_dma_ecc_error = Output(Bool()) + val dma_mem_tag = Input(UInt(3.W)) + val dma_mem_addr = Input(UInt(32.W)) + val dma_mem_sz = Input(UInt(3.W)) + val dma_mem_wdata = Input(UInt(64.W)) + val dccm_dma_rtag = Output(UInt(3.W)) + val dccm_dma_rdata = Output(UInt(64.W)) + val dccm_ready = Output(Bool()) + + val scan_mode = Input(Bool()) + val free_clk = Input(Clock()) + + }) + val dma_dccm_wdata = WireInit(0.U(64.W)) + val dma_dccm_wdata_lo = WireInit(0.U(32.W)) + val dma_dccm_wdata_hi = WireInit(0.U(32.W)) + val dma_mem_tag_m = WireInit(0.U(32.W)) + val lsu_raw_fwd_lo_r = WireInit(0.U(1.W)) + val lsu_raw_fwd_hi_r = WireInit(0.U(1.W)) + + val lsu_lsc_ctl = Module(new el2_lsu_lsc_ctl ) + val dccm_ctl = Module(new el2_lsu_dccm_ctl ) + val stbuf = Module(new el2_lsu_stbuf ) + val ecc = Module(new el2_lsu_ecc ) + val trigger = Module(new el2_lsu_trigger ) + val clkdomain = Module(new el2_lsu_clkdomain ) + val bus_intf = Module(new el2_lsu_bus_intf ) + + val lsu_raw_fwd_lo_m = stbuf.io.stbuf_fwdbyteen_lo_m.orR + val lsu_raw_fwd_hi_m = stbuf.io.stbuf_fwdbyteen_hi_m.orR + + // block stores in decode - for either bus or stbuf reasons + io.lsu_store_stall_any := stbuf.io.lsu_stbuf_full_any | bus_intf.io.lsu_bus_buffer_full_any | dccm_ctl.io.ld_single_ecc_error_r_ff + io.lsu_load_stall_any := bus_intf.io.lsu_bus_buffer_full_any | dccm_ctl.io.ld_single_ecc_error_r_ff + io.lsu_fastint_stall_any := dccm_ctl.io.ld_single_ecc_error_r // Stall the fastint in decode-1 stage + + // Ready to accept dma trxns + // There can't be any inpipe forwarding from non-dma packet to dma packet since they can be flushed so we can't have st in r when dma is in m + val dma_mem_tag_d = io.dma_mem_tag + val ldst_nodma_mtor = lsu_lsc_ctl.io.lsu_pkt_m.valid & !lsu_lsc_ctl.io.lsu_pkt_m.dma & (lsu_lsc_ctl.io.addr_in_dccm_m | lsu_lsc_ctl.io.addr_in_pic_m) & lsu_lsc_ctl.io.lsu_pkt_m.store + io.dccm_ready := !(io.dec_lsu_valid_raw_d | ldst_nodma_mtor | dccm_ctl.io.ld_single_ecc_error_r_ff) + val dma_dccm_wen = io.dma_dccm_req & io.dma_mem_write & lsu_lsc_ctl.io.addr_in_dccm_d + val dma_pic_wen = io.dma_dccm_req & io.dma_mem_write & lsu_lsc_ctl.io.addr_in_pic_d + dma_dccm_wdata := io.dma_mem_wdata >> Cat(io.dma_mem_addr(2,0), 0.U(3.W)) // Shift the dma data to lower bits to make it consistent to lsu stores + dma_dccm_wdata_hi := dma_dccm_wdata(63,32) + dma_dccm_wdata_lo := dma_dccm_wdata(31,0) + + val flush_m_up = io.dec_tlu_flush_lower_r + val flush_r = io.dec_tlu_i0_kill_writeb_r + + // lsu halt idle. This is used for entering the halt mode. Also, DMA accesses are allowed during fence. + // Indicates non-idle if there is a instruction valid in d-r or read/write buffers are non-empty since they can come with error + // Store buffer now have only non-dma dccm stores + // stbuf_empty not needed since it has only dccm stores + io.lsu_idle_any := !((lsu_lsc_ctl.io.lsu_pkt_m.valid & !lsu_lsc_ctl.io.lsu_pkt_m.dma) | (lsu_lsc_ctl.io.lsu_pkt_r.valid & !lsu_lsc_ctl.io.lsu_pkt_r.dma)) & bus_intf.io.lsu_bus_buffer_empty_any & bus_intf.io.lsu_bus_idle_any + // Instantiate the store buffer + val store_stbuf_reqvld_r = lsu_lsc_ctl.io.lsu_pkt_r.valid & lsu_lsc_ctl.io.lsu_pkt_r.store & lsu_lsc_ctl.io.addr_in_dccm_r & !flush_r & !lsu_lsc_ctl.io.lsu_pkt_r.dma + // Disable Forwarding for now + val lsu_cmpen_m = lsu_lsc_ctl.io.lsu_pkt_m.valid & (lsu_lsc_ctl.io.lsu_pkt_m.load | lsu_lsc_ctl.io.lsu_pkt_m.store) & (lsu_lsc_ctl.io.addr_in_dccm_m | lsu_lsc_ctl.io.addr_in_pic_m) + // Bus signals + val lsu_busreq_m = lsu_lsc_ctl.io.lsu_pkt_m.valid & ((lsu_lsc_ctl.io.lsu_pkt_m.load | lsu_lsc_ctl.io.lsu_pkt_m.store) & lsu_lsc_ctl.io.addr_external_m) & !flush_m_up & !lsu_lsc_ctl.io.lsu_exc_m & !lsu_lsc_ctl.io.lsu_pkt_m.fast_int + // PMU signals + io.lsu_pmu_misaligned_m := lsu_lsc_ctl.io.lsu_pkt_m.valid & ((lsu_lsc_ctl.io.lsu_pkt_m.half & lsu_lsc_ctl.io.lsu_addr_m(0)) | (lsu_lsc_ctl.io.lsu_pkt_m.word & lsu_lsc_ctl.io.lsu_addr_m(1,0).orR)) + io.lsu_pmu_load_external_m := lsu_lsc_ctl.io.lsu_pkt_m.valid & lsu_lsc_ctl.io.lsu_pkt_m.load & lsu_lsc_ctl.io.addr_external_m + io.lsu_pmu_store_external_m := lsu_lsc_ctl.io.lsu_pkt_m.valid & lsu_lsc_ctl.io.lsu_pkt_m.store & lsu_lsc_ctl.io.addr_external_m + + //LSU_LSC_Control + //Inputs + lsu_lsc_ctl.io.lsu_c1_m_clk := clkdomain.io.lsu_c1_m_clk + lsu_lsc_ctl.io.lsu_c1_r_clk := clkdomain.io.lsu_c1_r_clk + lsu_lsc_ctl.io.lsu_c2_m_clk := clkdomain.io.lsu_c2_m_clk + lsu_lsc_ctl.io.lsu_c2_r_clk := clkdomain.io.lsu_c2_r_clk + lsu_lsc_ctl.io.lsu_store_c1_m_clk := clkdomain.io.lsu_store_c1_m_clk + lsu_lsc_ctl.io.lsu_ld_data_r := dccm_ctl.io.lsu_ld_data_r + lsu_lsc_ctl.io.lsu_ld_data_corr_r := dccm_ctl.io.lsu_ld_data_corr_r + lsu_lsc_ctl.io.lsu_single_ecc_error_r := ecc.io.lsu_single_ecc_error_r + lsu_lsc_ctl.io.lsu_double_ecc_error_r := ecc.io.lsu_double_ecc_error_r + lsu_lsc_ctl.io.lsu_ld_data_m := dccm_ctl.io.lsu_ld_data_m + lsu_lsc_ctl.io.lsu_single_ecc_error_m := ecc.io.lsu_single_ecc_error_m + lsu_lsc_ctl.io.lsu_double_ecc_error_m := ecc.io.lsu_double_ecc_error_m + lsu_lsc_ctl.io.flush_m_up := flush_m_up + lsu_lsc_ctl.io.flush_r := flush_r + lsu_lsc_ctl.io.exu_lsu_rs1_d := io.exu_lsu_rs1_d + lsu_lsc_ctl.io.exu_lsu_rs2_d := io.exu_lsu_rs2_d + lsu_lsc_ctl.io.lsu_p := io.lsu_p + lsu_lsc_ctl.io.dec_lsu_valid_raw_d := io.dec_lsu_valid_raw_d + lsu_lsc_ctl.io.dec_lsu_offset_d := io.dec_lsu_offset_d + lsu_lsc_ctl.io.picm_mask_data_m := dccm_ctl.io.picm_mask_data_m + lsu_lsc_ctl.io.bus_read_data_m := bus_intf.io.bus_read_data_m + lsu_lsc_ctl.io.dma_dccm_req := io.dma_dccm_req + lsu_lsc_ctl.io.dma_mem_addr := io.dma_mem_addr + lsu_lsc_ctl.io.dma_mem_sz := io.dma_mem_sz + lsu_lsc_ctl.io.dma_mem_write := io.dma_mem_write + lsu_lsc_ctl.io.dma_mem_wdata := io.dma_mem_wdata + lsu_lsc_ctl.io.dec_tlu_mrac_ff := io.dec_tlu_mrac_ff + lsu_lsc_ctl.io.scan_mode := io.scan_mode + //Outputs + + io.lsu_single_ecc_error_incr := lsu_lsc_ctl.io.lsu_single_ecc_error_incr + io.lsu_error_pkt_r := lsu_lsc_ctl.io.lsu_error_pkt_r + io.lsu_fir_addr := lsu_lsc_ctl.io.lsu_fir_addr + io.lsu_fir_error := lsu_lsc_ctl.io.lsu_fir_error + // DCCM Control + //Inputs + dccm_ctl.io.lsu_c2_m_clk := clkdomain.io.lsu_c2_m_clk + dccm_ctl.io.lsu_c2_r_clk := clkdomain.io.lsu_c2_m_clk + dccm_ctl.io.lsu_free_c2_clk := clkdomain.io.lsu_c2_r_clk + dccm_ctl.io.lsu_c1_r_clk := clkdomain.io.lsu_free_c2_clk + dccm_ctl.io.lsu_store_c1_r_clk := clkdomain.io.lsu_c1_r_clk + //dccm_ctl.io.clk := clock + dccm_ctl.io.lsu_pkt_d := lsu_lsc_ctl.io.lsu_pkt_d + dccm_ctl.io.lsu_pkt_m := lsu_lsc_ctl.io.lsu_pkt_m + dccm_ctl.io.lsu_pkt_r := lsu_lsc_ctl.io.lsu_pkt_r + dccm_ctl.io.addr_in_dccm_d := lsu_lsc_ctl.io.addr_in_dccm_d + dccm_ctl.io.addr_in_dccm_m := lsu_lsc_ctl.io.addr_in_dccm_m + dccm_ctl.io.addr_in_dccm_r := lsu_lsc_ctl.io.addr_in_dccm_r + dccm_ctl.io.addr_in_pic_d := lsu_lsc_ctl.io.addr_in_pic_d + dccm_ctl.io.addr_in_pic_m := lsu_lsc_ctl.io.addr_in_pic_m + dccm_ctl.io.addr_in_pic_r := lsu_lsc_ctl.io.addr_in_pic_r + dccm_ctl.io.lsu_raw_fwd_lo_r := lsu_raw_fwd_lo_r + dccm_ctl.io.lsu_raw_fwd_hi_r := lsu_raw_fwd_hi_r + dccm_ctl.io.lsu_commit_r := lsu_lsc_ctl.io.lsu_commit_r + dccm_ctl.io.lsu_addr_d := lsu_lsc_ctl.io.lsu_addr_d + dccm_ctl.io.lsu_addr_m := lsu_lsc_ctl.io.lsu_addr_m + dccm_ctl.io.lsu_addr_r := lsu_lsc_ctl.io.lsu_addr_r + dccm_ctl.io.end_addr_d := lsu_lsc_ctl.io.end_addr_d + dccm_ctl.io.end_addr_m := lsu_lsc_ctl.io.end_addr_m + dccm_ctl.io.end_addr_r := lsu_lsc_ctl.io.end_addr_r + dccm_ctl.io.stbuf_reqvld_any := stbuf.io.stbuf_reqvld_any + dccm_ctl.io.stbuf_addr_any := stbuf.io.stbuf_addr_any + dccm_ctl.io.stbuf_data_any := stbuf.io.stbuf_data_any + dccm_ctl.io.stbuf_ecc_any := ecc.io.stbuf_ecc_any + dccm_ctl.io.stbuf_fwddata_hi_m := stbuf.io.stbuf_fwddata_hi_m + dccm_ctl.io.stbuf_fwddata_lo_m := stbuf.io.stbuf_fwddata_lo_m + dccm_ctl.io.stbuf_fwdbyteen_lo_m := stbuf.io.stbuf_fwdbyteen_lo_m + dccm_ctl.io.stbuf_fwdbyteen_hi_m := stbuf.io.stbuf_fwdbyteen_hi_m + dccm_ctl.io.lsu_double_ecc_error_r := ecc.io.lsu_double_ecc_error_r + dccm_ctl.io.single_ecc_error_hi_r := ecc.io.single_ecc_error_hi_r + dccm_ctl.io.single_ecc_error_lo_r := ecc.io.single_ecc_error_lo_r + dccm_ctl.io.sec_data_hi_r := ecc.io.sec_data_hi_r + dccm_ctl.io.sec_data_lo_r := ecc.io.sec_data_lo_r + dccm_ctl.io.sec_data_hi_r_ff := ecc.io.sec_data_hi_r_ff + dccm_ctl.io.sec_data_lo_r_ff := ecc.io.sec_data_lo_r_ff + dccm_ctl.io.sec_data_ecc_hi_r_ff := ecc.io.sec_data_ecc_hi_r_ff + dccm_ctl.io.sec_data_ecc_lo_r_ff := ecc.io.sec_data_ecc_lo_r_ff + dccm_ctl.io.lsu_double_ecc_error_m := ecc.io.lsu_double_ecc_error_m + dccm_ctl.io.sec_data_hi_m := ecc.io.sec_data_hi_m + dccm_ctl.io.sec_data_lo_m := ecc.io.sec_data_lo_m + dccm_ctl.io.store_data_m := lsu_lsc_ctl.io.store_data_m + dccm_ctl.io.dma_dccm_wen := dma_dccm_wen + dccm_ctl.io.dma_pic_wen := dma_pic_wen + dccm_ctl.io.dma_mem_tag_m := dma_mem_tag_m + dccm_ctl.io.dma_mem_addr := io.dma_mem_addr + dccm_ctl.io.dma_mem_wdata := io.dma_mem_wdata + dccm_ctl.io.dma_dccm_wdata_lo := dma_dccm_wdata_lo + dccm_ctl.io.dma_dccm_wdata_hi := dma_dccm_wdata_hi + dccm_ctl.io.dma_dccm_wdata_ecc_hi := ecc.io.dma_dccm_wdata_ecc_hi + dccm_ctl.io.dma_dccm_wdata_ecc_lo := ecc.io.dma_dccm_wdata_ecc_lo + dccm_ctl.io.dccm_rd_data_lo := io.dccm_rd_data_lo + dccm_ctl.io.dccm_rd_data_hi := io.dccm_rd_data_hi + dccm_ctl.io.picm_rd_data := io.picm_rd_data + dccm_ctl.io.scan_mode := io.scan_mode + //Outputs + io.dccm_dma_rvalid := dccm_ctl.io.dccm_dma_rvalid + io.dccm_dma_ecc_error := dccm_ctl.io.dccm_dma_ecc_error + io.dccm_dma_rtag := dccm_ctl.io.dccm_dma_rtag + io.dccm_dma_rdata := dccm_ctl.io.dccm_dma_rdata + io.dccm_wren := dccm_ctl.io.dccm_wren + io.dccm_rden := dccm_ctl.io.dccm_rden + io.dccm_wr_addr_lo := dccm_ctl.io.dccm_wr_addr_lo + io.dccm_wr_data_lo := dccm_ctl.io.dccm_wr_data_lo + io.dccm_rd_addr_lo := dccm_ctl.io.dccm_rd_addr_lo + io.dccm_wr_addr_hi := dccm_ctl.io.dccm_wr_addr_hi + io.dccm_wr_data_hi := dccm_ctl.io.dccm_wr_data_hi + io.dccm_rd_addr_hi := dccm_ctl.io.dccm_rd_addr_hi + io.picm_wren := dccm_ctl.io.picm_wren + io.picm_rden := dccm_ctl.io.picm_rden + io.picm_mken := dccm_ctl.io.picm_mken + io.picm_rdaddr := dccm_ctl.io.picm_rdaddr + io.picm_wraddr := dccm_ctl.io.picm_wraddr + io.picm_wr_data := dccm_ctl.io.picm_wr_data + //Store Buffer + //Inputs + stbuf.io.lsu_c1_m_clk := clkdomain.io.lsu_c1_m_clk + stbuf.io.lsu_c1_r_clk := clkdomain.io.lsu_c1_m_clk + stbuf.io.lsu_stbuf_c1_clk := clkdomain.io.lsu_stbuf_c1_clk + stbuf.io.lsu_free_c2_clk := clkdomain.io.lsu_free_c2_clk + stbuf.io.lsu_pkt_m := lsu_lsc_ctl.io.lsu_pkt_m + stbuf.io.lsu_pkt_r := lsu_lsc_ctl.io.lsu_pkt_r + stbuf.io.store_stbuf_reqvld_r := store_stbuf_reqvld_r + stbuf.io.lsu_commit_r := lsu_lsc_ctl.io.lsu_commit_r + stbuf.io.dec_lsu_valid_raw_d := io.dec_lsu_valid_raw_d + stbuf.io.store_data_hi_r := dccm_ctl.io.store_data_hi_r + stbuf.io.store_data_lo_r := dccm_ctl.io.store_data_lo_r + stbuf.io.store_datafn_hi_r := dccm_ctl.io.store_datafn_hi_r + stbuf.io.store_datafn_lo_r := dccm_ctl.io.store_datafn_lo_r + stbuf.io.lsu_stbuf_commit_any := dccm_ctl.io.lsu_stbuf_commit_any + stbuf.io.lsu_addr_d := lsu_lsc_ctl.io.lsu_addr_d + stbuf.io.lsu_addr_m := lsu_lsc_ctl.io.lsu_addr_m + stbuf.io.lsu_addr_r := lsu_lsc_ctl.io.lsu_addr_r + stbuf.io.end_addr_d := lsu_lsc_ctl.io.end_addr_d + stbuf.io.end_addr_m := lsu_lsc_ctl.io.end_addr_m + stbuf.io.end_addr_r := lsu_lsc_ctl.io.end_addr_r + stbuf.io.addr_in_dccm_m := lsu_lsc_ctl.io.addr_in_dccm_m + stbuf.io.addr_in_dccm_r := lsu_lsc_ctl.io.addr_in_dccm_r + stbuf.io.lsu_cmpen_m := lsu_cmpen_m + stbuf.io.scan_mode := io.scan_mode + + // ECC + //Inputs + ecc.io.lsu_c2_r_clk := clkdomain.io.lsu_c2_r_clk + ecc.io.lsu_pkt_m := lsu_lsc_ctl.io.lsu_pkt_m + ecc.io.lsu_pkt_r := lsu_lsc_ctl.io.lsu_pkt_r + ecc.io.stbuf_data_any := stbuf.io.stbuf_data_any + ecc.io.dec_tlu_core_ecc_disable := io.dec_tlu_core_ecc_disable + ecc.io.lsu_dccm_rden_r := dccm_ctl.io.lsu_dccm_rden_r + ecc.io.addr_in_dccm_r := lsu_lsc_ctl.io.addr_in_dccm_r + ecc.io.lsu_addr_r := lsu_lsc_ctl.io.lsu_addr_r + ecc.io.end_addr_r := lsu_lsc_ctl.io.end_addr_r + ecc.io.lsu_addr_m := lsu_lsc_ctl.io.lsu_addr_m + ecc.io.end_addr_m := lsu_lsc_ctl.io.end_addr_m + ecc.io.dccm_rdata_hi_r := dccm_ctl.io.dccm_rdata_hi_r + ecc.io.dccm_rdata_lo_r := dccm_ctl.io.dccm_rdata_lo_r + ecc.io.dccm_rdata_hi_m := dccm_ctl.io.dccm_rdata_hi_m + ecc.io.dccm_rdata_lo_m := dccm_ctl.io.dccm_rdata_lo_m + ecc.io.dccm_data_ecc_hi_r := dccm_ctl.io.dccm_data_ecc_hi_r + ecc.io.dccm_data_ecc_lo_r := dccm_ctl.io.dccm_data_ecc_lo_r + ecc.io.dccm_data_ecc_hi_m := dccm_ctl.io.dccm_data_ecc_hi_m + ecc.io.dccm_data_ecc_lo_m := dccm_ctl.io.dccm_data_ecc_lo_m + ecc.io.ld_single_ecc_error_r := dccm_ctl.io.ld_single_ecc_error_r + ecc.io.ld_single_ecc_error_r_ff := dccm_ctl.io.ld_single_ecc_error_r_ff + ecc.io.lsu_dccm_rden_m := dccm_ctl.io.lsu_dccm_rden_m + ecc.io.addr_in_dccm_m := lsu_lsc_ctl.io.addr_in_dccm_m + ecc.io.dma_dccm_wen := dma_dccm_wen + ecc.io.dma_dccm_wdata_lo := dma_dccm_wdata_lo + ecc.io.dma_dccm_wdata_hi := dma_dccm_wdata_hi + ecc.io.scan_mode := io.scan_mode + + //Trigger + //Inputs + trigger.io.trigger_pkt_any := io.trigger_pkt_any + trigger.io.lsu_pkt_m := lsu_lsc_ctl.io.lsu_pkt_m + trigger.io.lsu_addr_m := lsu_lsc_ctl.io.lsu_addr_m + trigger.io.store_data_m := lsu_lsc_ctl.io.store_data_m + //Outputs + io.lsu_trigger_match_m :=trigger.io.lsu_trigger_match_m + + //Clock Domain + //Inputs + clkdomain.io.free_clk := io.free_clk + clkdomain.io.clk_override := io.clk_override + clkdomain.io.addr_in_dccm_m := lsu_lsc_ctl.io.addr_in_dccm_m + clkdomain.io.dma_dccm_req := io.dma_dccm_req + clkdomain.io.ldst_stbuf_reqvld_r := stbuf.io.ldst_stbuf_reqvld_r + clkdomain.io.stbuf_reqvld_any := stbuf.io.stbuf_reqvld_any + clkdomain.io.stbuf_reqvld_flushed_any := stbuf.io.stbuf_reqvld_flushed_any + clkdomain.io.lsu_busreq_r := bus_intf.io.lsu_busreq_r + clkdomain.io.lsu_bus_buffer_pend_any := bus_intf.io.lsu_bus_buffer_pend_any + clkdomain.io.lsu_bus_buffer_empty_any := bus_intf.io.lsu_bus_buffer_empty_any + clkdomain.io.lsu_stbuf_empty_any := stbuf.io.lsu_stbuf_empty_any + clkdomain.io.lsu_bus_clk_en := io.lsu_bus_clk_en + clkdomain.io.lsu_p := io.lsu_p + clkdomain.io.lsu_pkt_d := lsu_lsc_ctl.io.lsu_pkt_d + clkdomain.io.lsu_pkt_m := lsu_lsc_ctl.io.lsu_pkt_m + clkdomain.io.lsu_pkt_r := lsu_lsc_ctl.io.lsu_pkt_r + clkdomain.io.scan_mode := io.scan_mode + + //Bus Interface + //Inputs + bus_intf.io.scan_mode := io.scan_mode + bus_intf.io.dec_tlu_external_ldfwd_disable := io.dec_tlu_external_ldfwd_disable + bus_intf.io.dec_tlu_wb_coalescing_disable := io.dec_tlu_wb_coalescing_disable + bus_intf.io.dec_tlu_sideeffect_posted_disable := io.dec_tlu_sideeffect_posted_disable + bus_intf.io.lsu_c1_m_clk := clkdomain.io.lsu_c1_m_clk + bus_intf.io.lsu_c1_r_clk := clkdomain.io.lsu_c1_r_clk + bus_intf.io.lsu_c2_r_clk := clkdomain.io.lsu_c2_r_clk + bus_intf.io.lsu_bus_ibuf_c1_clk := clkdomain.io.lsu_bus_ibuf_c1_clk + bus_intf.io.lsu_bus_obuf_c1_clk := clkdomain.io.lsu_bus_obuf_c1_clk + bus_intf.io.lsu_bus_buf_c1_clk := clkdomain.io.lsu_bus_buf_c1_clk + bus_intf.io.lsu_free_c2_clk := clkdomain.io.lsu_free_c2_clk + bus_intf.io.free_clk := io.free_clk + bus_intf.io.lsu_busm_clk := clkdomain.io.lsu_busm_clk + bus_intf.io.dec_lsu_valid_raw_d := io.dec_lsu_valid_raw_d + bus_intf.io.lsu_busreq_m := lsu_busreq_m + bus_intf.io.lsu_addr_d := lsu_lsc_ctl.io.lsu_addr_d + bus_intf.io.lsu_addr_m := lsu_lsc_ctl.io.lsu_addr_m + bus_intf.io.lsu_addr_r := lsu_lsc_ctl.io.lsu_addr_r + bus_intf.io.end_addr_d := lsu_lsc_ctl.io.end_addr_d + bus_intf.io.end_addr_m := lsu_lsc_ctl.io.end_addr_m + bus_intf.io.end_addr_r := lsu_lsc_ctl.io.end_addr_r + bus_intf.io.store_data_r := dccm_ctl.io.store_data_r + bus_intf.io.lsu_pkt_m <> lsu_lsc_ctl.io.lsu_pkt_m + bus_intf.io.lsu_pkt_r <> lsu_lsc_ctl.io.lsu_pkt_r + bus_intf.io.dec_tlu_force_halt := io.dec_tlu_force_halt + bus_intf.io.lsu_commit_r := lsu_lsc_ctl.io.lsu_commit_r + bus_intf.io.is_sideeffects_m := lsu_lsc_ctl.io.is_sideeffects_m + bus_intf.io.flush_m_up := flush_m_up + bus_intf.io.flush_r := flush_r + //Outputs + + io.lsu_imprecise_error_load_any := bus_intf.io.lsu_imprecise_error_load_any + io.lsu_imprecise_error_store_any := bus_intf.io.lsu_imprecise_error_store_any + io.lsu_imprecise_error_addr_any := bus_intf.io.lsu_imprecise_error_addr_any + io.lsu_nonblock_load_valid_m := bus_intf.io.lsu_nonblock_load_valid_m + io.lsu_nonblock_load_tag_m := bus_intf.io.lsu_nonblock_load_tag_m + io.lsu_nonblock_load_inv_r := bus_intf.io.lsu_nonblock_load_inv_r + io.lsu_nonblock_load_inv_tag_r := bus_intf.io.lsu_nonblock_load_inv_tag_r + io.lsu_nonblock_load_data_valid := bus_intf.io.lsu_nonblock_load_data_valid + io.lsu_nonblock_load_data_error := bus_intf.io.lsu_nonblock_load_data_error + io.lsu_nonblock_load_data_tag := bus_intf.io.lsu_nonblock_load_data_tag + io.lsu_nonblock_load_data := bus_intf.io.lsu_nonblock_load_data + io.lsu_pmu_bus_trxn := bus_intf.io.lsu_pmu_bus_trxn + io.lsu_pmu_bus_misaligned := bus_intf.io.lsu_pmu_bus_misaligned + io.lsu_pmu_bus_error := bus_intf.io.lsu_pmu_bus_error + io.lsu_pmu_bus_busy := bus_intf.io.lsu_pmu_bus_busy + io.lsu_axi_awvalid := bus_intf.io.lsu_axi_awvalid + bus_intf.io.lsu_axi_awready := io.lsu_axi_awready + io.lsu_axi_awid := bus_intf.io.lsu_axi_awid + io.lsu_axi_awaddr := bus_intf.io.lsu_axi_awaddr + io.lsu_axi_awregion := bus_intf.io.lsu_axi_awregion + io.lsu_axi_awlen := bus_intf.io.lsu_axi_awlen + io.lsu_axi_awsize := bus_intf.io.lsu_axi_awsize + io.lsu_axi_awburst := bus_intf.io.lsu_axi_awburst + io.lsu_axi_awlock := bus_intf.io.lsu_axi_awlock + io.lsu_axi_awcache := bus_intf.io.lsu_axi_awcache + io.lsu_axi_awprot := bus_intf.io.lsu_axi_awprot + io.lsu_axi_awqos := bus_intf.io.lsu_axi_awqos + io.lsu_axi_wvalid := bus_intf.io.lsu_axi_wvalid + bus_intf.io.lsu_axi_wready := io.lsu_axi_wready + io.lsu_axi_wdata := bus_intf.io.lsu_axi_wdata + io.lsu_axi_wstrb := bus_intf.io.lsu_axi_wstrb + io.lsu_axi_wlast := bus_intf.io.lsu_axi_wlast + bus_intf.io.lsu_axi_bvalid := io.lsu_axi_bvalid + io.lsu_axi_bready := bus_intf.io.lsu_axi_bready + bus_intf.io.lsu_axi_bresp := io.lsu_axi_bresp + bus_intf.io.lsu_axi_bid := io.lsu_axi_bid + io.lsu_axi_arvalid := bus_intf.io.lsu_axi_arvalid + bus_intf.io.lsu_axi_arready := io.lsu_axi_arready + io.lsu_axi_arid := bus_intf.io.lsu_axi_arid + io.lsu_axi_araddr := bus_intf.io.lsu_axi_araddr + io.lsu_axi_arregion := bus_intf.io.lsu_axi_arregion + io.lsu_axi_arlen := bus_intf.io.lsu_axi_arlen + io.lsu_axi_arsize := bus_intf.io.lsu_axi_arsize + io.lsu_axi_arburst := bus_intf.io.lsu_axi_arburst + io.lsu_axi_arlock := bus_intf.io.lsu_axi_arlock + io.lsu_axi_arcache := bus_intf.io.lsu_axi_arcache + io.lsu_axi_arprot := bus_intf.io.lsu_axi_arprot + io.lsu_axi_arqos := bus_intf.io.lsu_axi_arqos + bus_intf.io.lsu_axi_rvalid := io.lsu_axi_rvalid + io.lsu_axi_rready := bus_intf.io.lsu_axi_rready + bus_intf.io.lsu_axi_rid := io.lsu_axi_rid + bus_intf.io.lsu_axi_rdata := io.lsu_axi_rdata + bus_intf.io.lsu_axi_rresp := io.lsu_axi_rresp + bus_intf.io.lsu_axi_rlast := io.lsu_axi_rlast + bus_intf.io.lsu_bus_clk_en := io.lsu_bus_clk_en + + withClock(clkdomain.io.lsu_c1_m_clk){dma_mem_tag_m := RegNext(dma_mem_tag_d,0.U)} + withClock(clkdomain.io.lsu_c2_r_clk){lsu_raw_fwd_hi_r := RegNext(lsu_raw_fwd_hi_m,0.U)} + withClock(clkdomain.io.lsu_c2_r_clk){lsu_raw_fwd_lo_r := RegNext(lsu_raw_fwd_lo_m,0.U)} + +} +object main_lsu_top extends App{ + println("Generate Verilog") + println((new chisel3.stage.ChiselStage).emitVerilog(new el2_lsu)) +} diff --git a/src/main/scala/lsu/el2_lsu_addrcheck.scala b/src/main/scala/lsu/el2_lsu_addrcheck.scala new file mode 100644 index 00000000..19975968 --- /dev/null +++ b/src/main/scala/lsu/el2_lsu_addrcheck.scala @@ -0,0 +1,126 @@ +package lsu + +import include._ +import lib._ +import chisel3._ +import chisel3.util._ +import chisel3.experimental.chiselName + +@chiselName +class el2_lsu_addrcheck extends Module with RequireAsyncReset with el2_lib +{val io = IO(new Bundle{ + val lsu_c2_m_clk = Input(Clock()) + + val start_addr_d = Input(UInt(32.W)) + val end_addr_d = Input(UInt(32.W)) + val lsu_pkt_d = Input(new el2_lsu_pkt_t) + val dec_tlu_mrac_ff = Input(UInt(32.W)) + val rs1_region_d = Input(UInt(4.W)) + val rs1_d = Input(UInt(32.W)) + + + val is_sideeffects_m = Output(UInt(1.W)) + val addr_in_dccm_d = Output(UInt(1.W)) + val addr_in_pic_d = Output(UInt(1.W)) + val addr_external_d = Output(UInt(1.W)) + val access_fault_d = Output(UInt(1.W)) + val misaligned_fault_d = Output(UInt(1.W)) + val exc_mscause_d = Output(UInt(4.W)) + val fir_dccm_access_error_d = Output(UInt(1.W)) + val fir_nondccm_access_error_d = Output(UInt(1.W)) + val scan_mode = Input(UInt(1.W))}) + + //DCCM check + // Start address check + // Gen_dccm_enable + val (start_addr_in_dccm_d,start_addr_in_dccm_region_d) = if(DCCM_ENABLE) rvrangecheck_ch(io.start_addr_d,DCCM_SADR.U,DCCM_SIZE) else (0.U,0.U) + // End address check + val (end_addr_in_dccm_d ,end_addr_in_dccm_region_d) = if(DCCM_ENABLE) rvrangecheck_ch(io.end_addr_d,DCCM_SADR.U,DCCM_SIZE) else (0.U,0.U) + + val addr_in_iccm = WireInit(0.U(1.W)) + if(ICCM_ENABLE ){ //check_iccm + addr_in_iccm := (io.start_addr_d(31,28) === ICCM_REGION.U) + } + else{ + addr_in_iccm := 1.U + } + + //PIC memory check + //start address check + val (start_addr_in_pic_d,start_addr_in_pic_region_d) = rvrangecheck_ch(io.start_addr_d(31,0),PIC_BASE_ADDR.U,PIC_SIZE) + //End address check + val (end_addr_in_pic_d,end_addr_in_pic_region_d) = rvrangecheck_ch(io.end_addr_d(31,0),PIC_BASE_ADDR.U,PIC_SIZE) + + val start_addr_dccm_or_pic = start_addr_in_dccm_region_d | start_addr_in_pic_region_d + val base_reg_dccm_or_pic = (io.rs1_region_d(3,0) === DCCM_REGION.U) | (io.rs1_region_d(3,0) === PIC_REGION.U) //base region + io.addr_in_dccm_d := (start_addr_in_dccm_d & end_addr_in_dccm_d) + io.addr_in_pic_d := (start_addr_in_pic_d & end_addr_in_pic_d) + + io.addr_external_d := ~(start_addr_in_dccm_region_d | start_addr_in_pic_region_d); //if start address does not belong to dccm/pic + val csr_idx = Cat(io.start_addr_d(31,28),1.U) + val is_sideeffects_d = io.dec_tlu_mrac_ff(csr_idx) & !(start_addr_in_dccm_region_d | start_addr_in_pic_region_d | addr_in_iccm) & io.lsu_pkt_d.valid & (io.lsu_pkt_d.store | io.lsu_pkt_d.load) //every region has the 2 LSB indicating ( 1: sideeffects/no_side effects, and 0: cacheable ). Ignored in internal regions + val is_aligned_d = (io.lsu_pkt_d.word & (io.start_addr_d(1,0) === 0.U)) | (io.lsu_pkt_d.half & (io.start_addr_d(0) === 0.U)) | io.lsu_pkt_d.by + + + val non_dccm_access_ok = (!(Cat(DATA_ACCESS_ENABLE0.B ,DATA_ACCESS_ENABLE1.B,DATA_ACCESS_ENABLE2.B,DATA_ACCESS_ENABLE3.B, + DATA_ACCESS_ENABLE4.B,DATA_ACCESS_ENABLE5.B,DATA_ACCESS_ENABLE6.B,DATA_ACCESS_ENABLE7.B)).orR) | + (((DATA_ACCESS_ENABLE0.B & ((io.start_addr_d(31,0) | DATA_ACCESS_MASK0.U)) === (DATA_ACCESS_ADDR0.U | DATA_ACCESS_MASK0.U)) | //0111 + (DATA_ACCESS_ENABLE1.B & ((io.start_addr_d(31,0) | DATA_ACCESS_MASK1.U)) === (DATA_ACCESS_ADDR1.U | DATA_ACCESS_MASK1.U)) | //1111 + (DATA_ACCESS_ENABLE2.B & ((io.start_addr_d(31,0) | DATA_ACCESS_MASK2.U)) === (DATA_ACCESS_ADDR2.U | DATA_ACCESS_MASK2.U)) | //1011 + (DATA_ACCESS_ENABLE3.B & ((io.start_addr_d(31,0) | DATA_ACCESS_MASK3.U)) === (DATA_ACCESS_ADDR3.U | DATA_ACCESS_MASK3.U)) | //1000 + (DATA_ACCESS_ENABLE4.B & ((io.start_addr_d(31,0) | DATA_ACCESS_MASK4.U)) === (DATA_ACCESS_ADDR4.U | DATA_ACCESS_MASK4.U)) | + (DATA_ACCESS_ENABLE5.B & ((io.start_addr_d(31,0) | DATA_ACCESS_MASK5.U)) === (DATA_ACCESS_ADDR5.U | DATA_ACCESS_MASK5.U)) | + (DATA_ACCESS_ENABLE6.B & ((io.start_addr_d(31,0) | DATA_ACCESS_MASK6.U)) === (DATA_ACCESS_ADDR6.U | DATA_ACCESS_MASK6.U)) | + (DATA_ACCESS_ENABLE7.B & ((io.start_addr_d(31,0) | DATA_ACCESS_MASK7.U)) === (DATA_ACCESS_ADDR7.U | DATA_ACCESS_MASK7.U))) + & + ((DATA_ACCESS_ENABLE0.B & ((io.end_addr_d(31,0) | DATA_ACCESS_MASK0.U)) === (DATA_ACCESS_ADDR0.U | DATA_ACCESS_MASK0.U)) | + (DATA_ACCESS_ENABLE1.B & ((io.end_addr_d(31,0) | DATA_ACCESS_MASK1.U)) === (DATA_ACCESS_ADDR1.U | DATA_ACCESS_MASK1.U)) | + (DATA_ACCESS_ENABLE2.B & ((io.end_addr_d(31,0) | DATA_ACCESS_MASK2.U)) === (DATA_ACCESS_ADDR2.U | DATA_ACCESS_MASK2.U)) | + (DATA_ACCESS_ENABLE3.B & ((io.end_addr_d(31,0) | DATA_ACCESS_MASK3.U)) === (DATA_ACCESS_ADDR3.U | DATA_ACCESS_MASK3.U)) | + (DATA_ACCESS_ENABLE4.B & ((io.end_addr_d(31,0) | DATA_ACCESS_MASK4.U)) === (DATA_ACCESS_ADDR4.U | DATA_ACCESS_MASK4.U)) | + (DATA_ACCESS_ENABLE5.B & ((io.end_addr_d(31,0) | DATA_ACCESS_MASK5.U)) === (DATA_ACCESS_ADDR5.U | DATA_ACCESS_MASK5.U)) | + (DATA_ACCESS_ENABLE6.B & ((io.end_addr_d(31,0) | DATA_ACCESS_MASK6.U)) === (DATA_ACCESS_ADDR6.U | DATA_ACCESS_MASK6.U)) | + (DATA_ACCESS_ENABLE7.B & ((io.end_addr_d(31,0) | DATA_ACCESS_MASK7.U)) === (DATA_ACCESS_ADDR7.U | DATA_ACCESS_MASK7.U)))) + + val regpred_access_fault_d = (start_addr_dccm_or_pic ^ base_reg_dccm_or_pic) + val picm_access_fault_d = (io.addr_in_pic_d & ((io.start_addr_d(1,0) =/= 0.U(2.W)) | !io.lsu_pkt_d.word)) + + val unmapped_access_fault_d = WireInit(1.U(1.W)) + val mpu_access_fault_d = WireInit(1.U(1.W)) + if(DCCM_REGION == PIC_REGION){ + unmapped_access_fault_d := ((start_addr_in_dccm_region_d & !(start_addr_in_dccm_d | start_addr_in_pic_d)) | + // 0. Addr in dccm/pic region but not in dccm/pic offset + (end_addr_in_dccm_region_d & !(end_addr_in_dccm_d | end_addr_in_pic_d)) | + // 0. Addr in dccm/pic region but not in dccm/pic offset + (start_addr_in_dccm_d & end_addr_in_pic_d) | + // 0. DCCM -> PIC cross when DCCM/PIC in same region + (start_addr_in_pic_d & end_addr_in_dccm_d)) + // 0. DCCM -> PIC cross when DCCM/PIC in same region + mpu_access_fault_d := (!start_addr_in_dccm_region_d & !non_dccm_access_ok) + // 3. Address is not in a populated non-dccm region + } + + else{ + unmapped_access_fault_d := ((start_addr_in_dccm_region_d & !start_addr_in_dccm_d) | (end_addr_in_dccm_region_d & !end_addr_in_dccm_d) | + (start_addr_in_pic_region_d & !start_addr_in_pic_d) | (end_addr_in_pic_region_d & !end_addr_in_pic_d)) + mpu_access_fault_d := (!start_addr_in_pic_region_d & !start_addr_in_dccm_region_d & !non_dccm_access_ok); + // 3. Address is not in a populated non-dccm region + } + + //check width of access_fault_mscause_d + io.access_fault_d := (unmapped_access_fault_d | mpu_access_fault_d | picm_access_fault_d | regpred_access_fault_d) & io.lsu_pkt_d.valid & !io.lsu_pkt_d.dma + val access_fault_mscause_d = Mux(unmapped_access_fault_d.asBool,2.U(4.W), Mux(mpu_access_fault_d.asBool,3.U(4.W), Mux(regpred_access_fault_d.asBool,5.U(4.W), Mux(picm_access_fault_d.asBool,6.U(4.W),0.U(4.W))))) + val regcross_misaligned_fault_d = (io.start_addr_d(31,28) =/= io.end_addr_d(31,28)) + val sideeffect_misaligned_fault_d = (is_sideeffects_d & !is_aligned_d) + io.misaligned_fault_d := (regcross_misaligned_fault_d | (sideeffect_misaligned_fault_d & io.addr_external_d)) & io.lsu_pkt_d.valid & !io.lsu_pkt_d.dma + val misaligned_fault_mscause_d = Mux(regcross_misaligned_fault_d,2.U(4.W),Mux(sideeffect_misaligned_fault_d.asBool,1.U(4.W),0.U(4.W))) + io.exc_mscause_d := Mux(io.misaligned_fault_d.asBool, misaligned_fault_mscause_d(3,0), access_fault_mscause_d(3,0)) + io.fir_dccm_access_error_d := ((start_addr_in_dccm_region_d & !start_addr_in_dccm_d)|(end_addr_in_dccm_region_d & !end_addr_in_dccm_d)) & io.lsu_pkt_d.valid & io.lsu_pkt_d.fast_int + io.fir_nondccm_access_error_d := !(start_addr_in_dccm_region_d & end_addr_in_dccm_region_d) & io.lsu_pkt_d.valid & io.lsu_pkt_d.fast_int + + withClock(io.lsu_c2_m_clk){io.is_sideeffects_m := RegNext(is_sideeffects_d,0.U)} //TBD for clock and reset +} +object address_checker extends App{ + println("Generate Verilog") + println((new chisel3.stage.ChiselStage).emitVerilog(new el2_lsu_addrcheck())) +} diff --git a/src/main/scala/lsu/el2_lsu_bus_intf.scala b/src/main/scala/lsu/el2_lsu_bus_intf.scala new file mode 100644 index 00000000..3cf92e3d --- /dev/null +++ b/src/main/scala/lsu/el2_lsu_bus_intf.scala @@ -0,0 +1,299 @@ + +package lsu +import chisel3._ +import chisel3.util._ +import lib._ +import include._ +import snapshot._ +class el2_lsu_bus_intf extends Module with RequireAsyncReset with el2_lib { + val io = IO (new Bundle { + // val clk = Input(Clock()) //implicit + // val rst_l = Input(1.W) //implicit + val scan_mode = Input(Bool()) + val dec_tlu_external_ldfwd_disable = Input(Bool()) // disable load to load forwarding for externals + val dec_tlu_wb_coalescing_disable = Input(Bool()) // disable write buffer coalescing + val dec_tlu_sideeffect_posted_disable = Input(Bool()) // disable the posted sideeffect load store to the bus + val lsu_c1_m_clk = Input(Clock()) + val lsu_c1_r_clk = Input(Clock()) + val lsu_c2_r_clk = Input(Clock()) + val lsu_bus_ibuf_c1_clk = Input(Clock()) + val lsu_bus_obuf_c1_clk = Input(Clock()) + val lsu_bus_buf_c1_clk = Input(Clock()) + val lsu_free_c2_clk = Input(Clock()) + val free_clk = Input(Clock()) + val lsu_busm_clk = Input(Clock()) + val dec_lsu_valid_raw_d = Input(Bool()) + val lsu_busreq_m = Input(Bool()) + val lsu_pkt_m = Input(new el2_lsu_pkt_t) + val lsu_pkt_r = Input(new el2_lsu_pkt_t) + val lsu_addr_d = Input(UInt(32.W)) + val lsu_addr_m = Input(UInt(32.W)) + val lsu_addr_r = Input(UInt(32.W)) + val end_addr_d = Input(UInt(32.W)) + val end_addr_m = Input(UInt(32.W)) + val end_addr_r = Input(UInt(32.W)) + val store_data_r = Input(UInt(32.W)) + val dec_tlu_force_halt = Input(Bool()) + val lsu_commit_r = Input(Bool()) + val is_sideeffects_m = Input(Bool()) + val flush_m_up = Input(Bool()) + val flush_r = Input(Bool()) + val lsu_axi_awready = Input(Bool()) + val lsu_axi_wready = Input(Bool()) + val lsu_axi_bvalid = Input(Bool()) + val lsu_axi_bresp = Input(UInt(2.W)) + val lsu_axi_bid = Input(UInt(LSU_BUS_TAG.W)) + val lsu_axi_arready = Input(Bool()) + val lsu_axi_rvalid = Input(Bool()) + val lsu_axi_rid = Input(UInt(LSU_BUS_TAG.W)) + val lsu_axi_rdata = Input(UInt(64.W)) + val lsu_axi_rresp = Input(UInt(2.W)) + val lsu_axi_rlast = Input(Bool()) + val lsu_bus_clk_en = Input(Bool()) + val lsu_busreq_r = Output(Bool()) + val lsu_bus_buffer_pend_any = Output(Bool()) + val lsu_bus_buffer_full_any = Output(Bool()) + val lsu_bus_buffer_empty_any = Output(Bool()) + val lsu_bus_idle_any = Output(Bool()) + val bus_read_data_m = Output(UInt(32.W)) + val lsu_imprecise_error_load_any = Output(Bool()) + val lsu_imprecise_error_store_any = Output(Bool()) + val lsu_imprecise_error_addr_any = Output(UInt(32.W)) + val lsu_nonblock_load_valid_m = Output(Bool()) + val lsu_nonblock_load_tag_m = Output(UInt(LSU_NUM_NBLOAD_WIDTH.W)) + val lsu_nonblock_load_inv_r = Output(Bool()) + val lsu_nonblock_load_inv_tag_r = Output(UInt(LSU_NUM_NBLOAD_WIDTH.W)) + val lsu_nonblock_load_data_valid = Output(Bool()) + val lsu_nonblock_load_data_error = Output(Bool()) + val lsu_nonblock_load_data_tag = Output(UInt(LSU_NUM_NBLOAD_WIDTH.W)) + val lsu_nonblock_load_data = Output(UInt(32.W)) + val lsu_pmu_bus_trxn = Output(Bool()) + val lsu_pmu_bus_misaligned = Output(Bool()) + val lsu_pmu_bus_error = Output(Bool()) + val lsu_pmu_bus_busy = Output(Bool()) + val lsu_axi_awvalid = Output(Bool()) + val lsu_axi_awid = Output(UInt(LSU_BUS_TAG.W)) + val lsu_axi_awaddr = Output(UInt(32.W)) + val lsu_axi_awregion = Output(UInt(4.W)) + val lsu_axi_awlen = Output(UInt(8.W)) + val lsu_axi_awsize = Output(UInt(3.W)) + val lsu_axi_awburst = Output(UInt(2.W)) + val lsu_axi_awlock = Output(Bool()) + val lsu_axi_awcache = Output(UInt(4.W)) + val lsu_axi_awprot = Output(UInt(3.W)) + val lsu_axi_awqos = Output(UInt(4.W)) + val lsu_axi_wvalid = Output(Bool()) + val lsu_axi_wdata = Output(UInt(64.W)) + val lsu_axi_wstrb = Output(UInt(8.W)) + val lsu_axi_wlast = Output(Bool()) + val lsu_axi_bready = Output(Bool()) + val lsu_axi_arvalid = Output(Bool()) + val lsu_axi_arid = Output(UInt(LSU_BUS_TAG.W)) + val lsu_axi_araddr = Output(UInt(32.W)) + val lsu_axi_arregion = Output(UInt(4.W)) + val lsu_axi_arlen = Output(UInt(8.W)) + val lsu_axi_arsize = Output(UInt(3.W)) + val lsu_axi_arburst = Output(UInt(2.W)) + val lsu_axi_arlock = Output(Bool()) + val lsu_axi_arcache = Output(UInt(4.W)) + val lsu_axi_arprot = Output(UInt(3.W)) + val lsu_axi_arqos = Output(UInt(4.W)) + val lsu_axi_rready = Output(Bool()) + }) + + val lsu_bus_clk_en_q = WireInit(Bool(), init = false.B) + val ldst_dual_d = WireInit(Bool(), init = false.B) + val ldst_dual_m = WireInit(Bool(), init = false.B) + val ldst_dual_r = WireInit(Bool(), init = false.B) + val ldst_byteen_m = WireInit(UInt(4.W), init = 0.U) + val ldst_byteen_r = WireInit(UInt(4.W), init = 0.U) + val ldst_byteen_ext_m = WireInit(UInt(8.W), init = 0.U) + val ldst_byteen_ext_r = WireInit(UInt(8.W), init = 0.U) + val ldst_byteen_hi_m = WireInit(UInt(4.W), init = 0.U) + val ldst_byteen_hi_r = WireInit(UInt(4.W), init = 0.U) + val ldst_byteen_lo_m = WireInit(UInt(4.W), init = 0.U) + val ldst_byteen_lo_r = WireInit(UInt(4.W), init = 0.U) + val is_sideeffects_r = WireInit(Bool(), init = false.B) + val store_data_ext_r = WireInit(UInt(64.W), init = 0.U) + val store_data_hi_r = WireInit(UInt(32.W), init = 0.U) + val store_data_lo_r = WireInit(UInt(32.W), init = 0.U) + val addr_match_dw_lo_r_m = WireInit(Bool(), init = false.B) + val addr_match_word_lo_r_m = WireInit(Bool(), init = false.B) + val no_word_merge_r = WireInit(Bool(), init = false.B) + val no_dword_merge_r = WireInit(Bool(), init = false.B) + val ld_addr_rhit_lo_lo = WireInit(Bool(), init = false.B) + val ld_addr_rhit_hi_lo = WireInit(Bool(), init = false.B) + val ld_addr_rhit_lo_hi = WireInit(Bool(), init = false.B) + val ld_addr_rhit_hi_hi = WireInit(Bool(), init = false.B) + val ld_byte_rhit_lo_lo = WireInit(UInt(4.W), init = 0.U) + val ld_byte_rhit_hi_lo = WireInit(UInt(4.W), init = 0.U) + val ld_byte_rhit_lo_hi = WireInit(UInt(4.W), init = 0.U) + val ld_byte_rhit_hi_hi = WireInit(UInt(4.W), init = 0.U) + val ld_byte_hit_lo = WireInit(UInt(4.W), init = 0.U) + val ld_byte_rhit_lo = WireInit(UInt(4.W), init = 0.U) + val ld_byte_hit_hi = WireInit(UInt(4.W), init = 0.U) + val ld_byte_rhit_hi = WireInit(UInt(4.W), init = 0.U) + val ld_fwddata_rpipe_lo = WireInit(UInt(32.W), init = 0.U) + val ld_fwddata_rpipe_hi = WireInit(UInt(32.W), init = 0.U) + val ld_byte_hit_buf_lo = WireInit(UInt(4.W), init = 0.U) + val ld_byte_hit_buf_hi = WireInit(UInt(4.W), init = 0.U) + val ld_fwddata_buf_lo = WireInit(UInt(32.W), init = 0.U) + val ld_fwddata_buf_hi = WireInit(UInt(32.W), init = 0.U) + val ld_fwddata_lo = WireInit(UInt(64.W), init = 0.U) + val ld_fwddata_hi = WireInit(UInt(64.W), init = 0.U) + val ld_fwddata_m = WireInit(UInt(64.W), init = 0.U) + val ld_full_hit_hi_m = WireInit(Bool(), init = true.B) + val ld_full_hit_lo_m = WireInit(Bool(), init = true.B) + val ld_full_hit_m = WireInit(Bool(), init = false.B) + val bus_buffer = Module(new el2_lsu_bus_buffer) + bus_buffer.io.scan_mode := io.scan_mode + bus_buffer.io.dec_tlu_external_ldfwd_disable := io.dec_tlu_external_ldfwd_disable + bus_buffer.io.dec_tlu_wb_coalescing_disable := io.dec_tlu_wb_coalescing_disable + bus_buffer.io.dec_tlu_sideeffect_posted_disable := io.dec_tlu_sideeffect_posted_disable + bus_buffer.io.dec_tlu_force_halt := io.dec_tlu_force_halt + bus_buffer.io.lsu_c2_r_clk := io.lsu_c2_r_clk + bus_buffer.io.lsu_bus_ibuf_c1_clk := io.lsu_bus_ibuf_c1_clk + bus_buffer.io.lsu_bus_obuf_c1_clk := io.lsu_bus_obuf_c1_clk + bus_buffer.io.lsu_bus_buf_c1_clk := io.lsu_bus_buf_c1_clk + bus_buffer.io.lsu_free_c2_clk := io.lsu_free_c2_clk + bus_buffer.io.lsu_busm_clk := io.lsu_busm_clk + bus_buffer.io.dec_lsu_valid_raw_d := io.dec_lsu_valid_raw_d + bus_buffer.io.lsu_pkt_m := io.lsu_pkt_m + bus_buffer.io.lsu_pkt_r := io.lsu_pkt_r + bus_buffer.io.lsu_addr_m := io.lsu_addr_m + bus_buffer.io.end_addr_m := io.end_addr_m + bus_buffer.io.lsu_addr_r := io.lsu_addr_r + bus_buffer.io.end_addr_r := io.end_addr_r + bus_buffer.io.store_data_r := io.store_data_r + bus_buffer.io.no_word_merge_r := no_word_merge_r + bus_buffer.io.no_dword_merge_r := no_dword_merge_r + bus_buffer.io.lsu_busreq_m := io.lsu_busreq_m + bus_buffer.io.ld_full_hit_m := ld_full_hit_m + bus_buffer.io.flush_m_up := io.flush_m_up + bus_buffer.io.flush_r := io.flush_r + bus_buffer.io.lsu_commit_r := io.lsu_commit_r + bus_buffer.io.is_sideeffects_r := is_sideeffects_r + bus_buffer.io.ldst_dual_d := ldst_dual_d + bus_buffer.io.ldst_dual_m := ldst_dual_m + bus_buffer.io.ldst_dual_r := ldst_dual_r + bus_buffer.io.ldst_byteen_ext_m := ldst_byteen_ext_m + bus_buffer.io.lsu_axi_awready := io.lsu_axi_awready + bus_buffer.io.lsu_axi_wready := io.lsu_axi_wready + bus_buffer.io.lsu_axi_bvalid := io.lsu_axi_bvalid + bus_buffer.io.lsu_axi_bresp := io.lsu_axi_bresp + bus_buffer.io.lsu_axi_bid := io.lsu_axi_bid + bus_buffer.io.lsu_axi_arready := io.lsu_axi_arready + bus_buffer.io.lsu_axi_rvalid := io.lsu_axi_rvalid + bus_buffer.io.lsu_axi_rid := io.lsu_axi_rid + bus_buffer.io.lsu_axi_rdata := io.lsu_axi_rdata + bus_buffer.io.lsu_axi_rresp := io.lsu_axi_rresp + bus_buffer.io.lsu_bus_clk_en := io.lsu_bus_clk_en + bus_buffer.io.lsu_bus_clk_en_q := lsu_bus_clk_en_q + + io.lsu_busreq_r := bus_buffer.io.lsu_busreq_r + io.lsu_bus_buffer_pend_any := bus_buffer.io.lsu_bus_buffer_pend_any + io.lsu_bus_buffer_full_any := bus_buffer.io.lsu_bus_buffer_full_any + io.lsu_bus_buffer_empty_any := bus_buffer.io.lsu_bus_buffer_empty_any + io.lsu_bus_idle_any := bus_buffer.io.lsu_bus_idle_any + ld_byte_hit_buf_lo := bus_buffer.io.ld_byte_hit_buf_lo + ld_byte_hit_buf_hi := bus_buffer.io.ld_byte_hit_buf_hi + ld_fwddata_buf_lo := bus_buffer.io.ld_fwddata_buf_lo + ld_fwddata_buf_hi := bus_buffer.io.ld_fwddata_buf_hi + io.lsu_imprecise_error_load_any := bus_buffer.io.lsu_imprecise_error_load_any + io.lsu_imprecise_error_store_any := bus_buffer.io.lsu_imprecise_error_store_any + io.lsu_imprecise_error_addr_any := bus_buffer.io.lsu_imprecise_error_addr_any + io.lsu_nonblock_load_valid_m := bus_buffer.io.lsu_nonblock_load_valid_m + io.lsu_nonblock_load_tag_m := bus_buffer.io.lsu_nonblock_load_tag_m + io.lsu_nonblock_load_inv_r := bus_buffer.io.lsu_nonblock_load_inv_r + io.lsu_nonblock_load_inv_tag_r := bus_buffer.io.lsu_nonblock_load_inv_tag_r + io.lsu_nonblock_load_data_valid := bus_buffer.io.lsu_nonblock_load_data_valid + io.lsu_nonblock_load_data_error := bus_buffer.io.lsu_nonblock_load_data_error + io.lsu_nonblock_load_data_tag := bus_buffer.io.lsu_nonblock_load_data_tag + io.lsu_nonblock_load_data := bus_buffer.io.lsu_nonblock_load_data + io.lsu_pmu_bus_trxn := bus_buffer.io.lsu_pmu_bus_trxn + io.lsu_pmu_bus_misaligned := bus_buffer.io.lsu_pmu_bus_misaligned + io.lsu_pmu_bus_error := bus_buffer.io.lsu_pmu_bus_error + io.lsu_pmu_bus_busy := bus_buffer.io.lsu_pmu_bus_busy + io.lsu_axi_awvalid := bus_buffer.io.lsu_axi_awvalid + io.lsu_axi_awid := bus_buffer.io.lsu_axi_awid + io.lsu_axi_awaddr := bus_buffer.io.lsu_axi_awaddr + io.lsu_axi_awregion := bus_buffer.io.lsu_axi_awregion + io.lsu_axi_awlen := bus_buffer.io.lsu_axi_awlen + io.lsu_axi_awsize := bus_buffer.io.lsu_axi_awsize + io.lsu_axi_awburst := bus_buffer.io.lsu_axi_awburst + io.lsu_axi_awlock := bus_buffer.io.lsu_axi_awlock + io.lsu_axi_awcache := bus_buffer.io.lsu_axi_awcache + io.lsu_axi_awprot := bus_buffer.io.lsu_axi_awprot + io.lsu_axi_awqos := bus_buffer.io.lsu_axi_awqos + io.lsu_axi_wvalid := bus_buffer.io.lsu_axi_wvalid + io.lsu_axi_wdata := bus_buffer.io.lsu_axi_wdata + io.lsu_axi_wstrb := bus_buffer.io.lsu_axi_wstrb + io.lsu_axi_wlast := bus_buffer.io.lsu_axi_wlast + io.lsu_axi_bready := bus_buffer.io.lsu_axi_bready + io.lsu_axi_arvalid := bus_buffer.io.lsu_axi_arvalid + io.lsu_axi_arid := bus_buffer.io.lsu_axi_arid + io.lsu_axi_araddr := bus_buffer.io.lsu_axi_araddr + io.lsu_axi_arregion := bus_buffer.io.lsu_axi_arregion + io.lsu_axi_arlen := bus_buffer.io.lsu_axi_arlen + io.lsu_axi_arsize := bus_buffer.io.lsu_axi_arsize + io.lsu_axi_arburst := bus_buffer.io.lsu_axi_arburst + io.lsu_axi_arlock := bus_buffer.io.lsu_axi_arlock + io.lsu_axi_arcache := bus_buffer.io.lsu_axi_arcache + io.lsu_axi_arprot := bus_buffer.io.lsu_axi_arprot + io.lsu_axi_arqos := bus_buffer.io.lsu_axi_arqos + io.lsu_axi_rready := bus_buffer.io.lsu_axi_rready + + ldst_byteen_m := Mux1H(Seq(io.lsu_pkt_r.word.asBool -> 15.U(4.W), io.lsu_pkt_r.half.asBool -> 3.U(4.W), io.lsu_pkt_r.by.asBool -> 1.U(4.W))) + ldst_dual_d := io.lsu_addr_d(2) =/= io.end_addr_d(2) + addr_match_dw_lo_r_m := (io.lsu_addr_r(31,3) === io.lsu_addr_m(31,3)) + addr_match_word_lo_r_m := addr_match_dw_lo_r_m & !(io.lsu_addr_r(2)^io.lsu_addr_m(2)) + no_word_merge_r := io.lsu_busreq_r & !ldst_dual_r & io.lsu_busreq_m & (io.lsu_pkt_m.load | !addr_match_word_lo_r_m) + no_dword_merge_r := io.lsu_busreq_r & !ldst_dual_r & io.lsu_busreq_m & (io.lsu_pkt_m.load | !addr_match_dw_lo_r_m) + ldst_byteen_ext_m := Cat(0.U(4.W),ldst_byteen_m(3,0)) << io.lsu_addr_m(1,0) + ldst_byteen_ext_r := Cat(0.U(4.W),ldst_byteen_r(3,0)) << io.lsu_addr_r(1,0) + store_data_ext_r := Cat(0.U(32.W),io.store_data_r(31,0)) << Cat(io.lsu_addr_r(1,0),0.U(3.W)) + ldst_byteen_hi_m := ldst_byteen_ext_m(7,4) + ldst_byteen_lo_m := ldst_byteen_ext_m(3,0) + ldst_byteen_hi_r := ldst_byteen_ext_r(7,4) + ldst_byteen_lo_r := ldst_byteen_ext_r(3,0) + store_data_hi_r := store_data_ext_r(63,32) + store_data_lo_r := store_data_ext_r(31,0) + ld_addr_rhit_lo_lo := (io.lsu_addr_m(31,2) === io.lsu_addr_r(31,2)) & io.lsu_pkt_r.valid & io.lsu_pkt_r.store & io.lsu_busreq_m + ld_addr_rhit_lo_hi := (io.end_addr_m(31,2) === io.lsu_addr_r(31,2)) & io.lsu_pkt_r.valid & io.lsu_pkt_r.store & io.lsu_busreq_m + ld_addr_rhit_hi_lo := (io.lsu_addr_m(31,2) === io.end_addr_r(31,2)) & io.lsu_pkt_r.valid & io.lsu_pkt_r.store & io.lsu_busreq_m + ld_addr_rhit_hi_hi := (io.end_addr_m(31,2) === io.end_addr_r(31,2)) & io.lsu_pkt_r.valid & io.lsu_pkt_r.store & io.lsu_busreq_m + ld_byte_rhit_lo_lo := (0 until 4).map(i =>(ld_addr_rhit_lo_lo & ldst_byteen_lo_r(i) & ldst_byteen_lo_m(i)).asUInt).reverse.reduce(Cat(_,_)) + ld_byte_rhit_lo_hi := (0 until 4).map(i =>(ld_addr_rhit_lo_hi & ldst_byteen_lo_r(i) & ldst_byteen_hi_m(i)).asUInt).reverse.reduce(Cat(_,_)) + ld_byte_rhit_hi_lo := (0 until 4).map(i =>(ld_addr_rhit_hi_lo & ldst_byteen_hi_r(i) & ldst_byteen_lo_m(i)).asUInt).reverse.reduce(Cat(_,_)) + ld_byte_rhit_hi_hi := (0 until 4).map(i =>(ld_addr_rhit_hi_hi & ldst_byteen_hi_r(i) & ldst_byteen_hi_m(i)).asUInt).reverse.reduce(Cat(_,_)) + ld_byte_hit_lo := (0 until 4).map(i =>(ld_byte_rhit_lo_lo(i) | ld_byte_rhit_hi_lo(i) | ld_byte_hit_buf_lo(i)).asUInt).reverse.reduce(Cat(_,_)) + ld_byte_hit_hi := (0 until 4).map(i =>(ld_byte_rhit_lo_hi(i) | ld_byte_rhit_hi_hi(i) | ld_byte_hit_buf_hi(i)).asUInt).reverse.reduce(Cat(_,_)) + ld_byte_rhit_lo := (0 until 4).map(i =>(ld_byte_rhit_lo_lo(i) | ld_byte_rhit_hi_lo(i) ).asUInt).reverse.reduce(Cat(_,_)) + ld_byte_rhit_hi := (0 until 4).map(i =>(ld_byte_rhit_lo_hi(i) | ld_byte_rhit_hi_hi(i) ).asUInt).reverse.reduce(Cat(_,_)) + ld_fwddata_rpipe_lo := (0 until 4).map(i =>(Mux1H(Seq(ld_byte_rhit_lo_lo(i) -> store_data_lo_r((8*i)+7,(8*i)), ld_byte_rhit_hi_lo(i) -> store_data_hi_r((8*i)+7,(8*i))))).asUInt).reverse.reduce(Cat(_,_)) + ld_fwddata_rpipe_hi := (0 until 4).map(i =>(Mux1H(Seq(ld_byte_rhit_lo_hi(i) -> store_data_lo_r((8*i)+7,(8*i)), ld_byte_rhit_hi_hi(i) -> store_data_hi_r((8*i)+7,(8*i))))).asUInt).reverse.reduce(Cat(_,_)) + ld_fwddata_lo := (0 until 4).map(i =>(Mux(ld_byte_rhit_lo(i), ld_fwddata_rpipe_lo((8*i)+7,(8*i)), ld_fwddata_buf_lo((8*i)+7,(8*i)))).asUInt).reverse.reduce(Cat(_,_)) + ld_fwddata_hi := (0 until 4).map(i =>(Mux(ld_byte_rhit_hi(i), ld_fwddata_rpipe_hi((8*i)+7,(8*i)), ld_fwddata_buf_hi((8*i)+7,(8*i)))).asUInt).reverse.reduce(Cat(_,_)) + ld_full_hit_lo_m := (0 until 4).map(i =>((ld_byte_hit_lo(i) | !ldst_byteen_lo_m(i))).asUInt).reduce(_&_) + ld_full_hit_hi_m := (0 until 4).map(i =>((ld_byte_hit_hi(i) | !ldst_byteen_hi_m(i))).asUInt).reduce(_&_) + ld_full_hit_m := ld_full_hit_lo_m & ld_full_hit_hi_m & io.lsu_busreq_m & io.lsu_pkt_m.load & !io.is_sideeffects_m + ld_fwddata_m := Cat(ld_fwddata_hi(31,0), ld_fwddata_lo(31,0)) >> (8.U*io.lsu_addr_m(1,0)) + io.bus_read_data_m := ld_fwddata_m(31,0) + + withClock(io.free_clk) { + lsu_bus_clk_en_q := RegNext(io.lsu_bus_clk_en, init = 0.U) + } + withClock(io.lsu_c1_m_clk) { + ldst_dual_m := RegNext(io.lsu_bus_clk_en, init = 0.U) + } + withClock(io.lsu_c1_r_clk) { + ldst_dual_r := RegNext(io.lsu_bus_clk_en, init = 0.U) + is_sideeffects_r := RegNext(io.lsu_bus_clk_en, init = 0.U) + ldst_byteen_r := RegNext(io.lsu_bus_clk_en, init = 0.U(4.W)) + } +} + +object BusIntfMain extends App{ + println("Generate Verilog") + println((new chisel3.stage.ChiselStage).emitVerilog(new el2_lsu_bus_intf())) +} diff --git a/src/main/scala/lsu/el2_lsu_clkdomain.scala b/src/main/scala/lsu/el2_lsu_clkdomain.scala new file mode 100644 index 00000000..2ba5c449 --- /dev/null +++ b/src/main/scala/lsu/el2_lsu_clkdomain.scala @@ -0,0 +1,103 @@ +package lsu +import chisel3._ +import chisel3.experimental.chiselName +import chisel3.util._ +import lib._ +import include._ +import snapshot._ + +@chiselName +class el2_lsu_clkdomain extends Module with RequireAsyncReset with el2_lib{ + val io = IO (new Bundle { + + val free_clk = Input(Clock()) // clock + // Inputs + val clk_override = Input(Bool()) // chciken bit to turn off clock gating + val addr_in_dccm_m = Input(Bool()) // address in dccm + val dma_dccm_req = Input(Bool()) // dma is active + val ldst_stbuf_reqvld_r = Input(Bool()) // allocating in to the store queue + + val stbuf_reqvld_any = Input(Bool()) // stbuf is draining + val stbuf_reqvld_flushed_any = Input(Bool()) // instruction going to stbuf is flushed + val lsu_busreq_r = Input(Bool()) // busreq in r + val lsu_bus_buffer_pend_any = Input(Bool()) // bus buffer has a pending bus entry + val lsu_bus_buffer_empty_any = Input(Bool()) // external bus buffer is empty + val lsu_stbuf_empty_any = Input(Bool()) // stbuf is empty + + val lsu_bus_clk_en = Input(Bool()) // bus clock enable + + val lsu_p = Input(new el2_lsu_pkt_t) // lsu packet in decode + val lsu_pkt_d = Input(new el2_lsu_pkt_t) // lsu packet in d + val lsu_pkt_m = Input(new el2_lsu_pkt_t) // lsu packet in m + val lsu_pkt_r = Input(new el2_lsu_pkt_t) // lsu packet in r + + // Outputs + val lsu_c1_m_clk = Output(Clock()) // m pipe single pulse clock + val lsu_c1_r_clk = Output(Clock()) // r pipe single pulse clock + + val lsu_c2_m_clk = Output(Clock()) // m pipe double pulse clock + val lsu_c2_r_clk = Output(Clock()) // r pipe double pulse clock + + val lsu_store_c1_m_clk = Output(Clock()) // store in m + val lsu_store_c1_r_clk = Output(Clock()) // store in r + + val lsu_stbuf_c1_clk = Output(Clock()) + val lsu_bus_obuf_c1_clk = Output(Clock()) // ibuf clock + val lsu_bus_ibuf_c1_clk = Output(Clock()) // ibuf clock + val lsu_bus_buf_c1_clk = Output(Clock()) // ibuf clock + val lsu_busm_clk = Output(Clock()) // bus clock + + val lsu_free_c2_clk = Output(Clock()) + + val scan_mode = Input(Bool()) + }) + + //------------------------------------------------------------------------------------------- + // Clock Enable Logic + //------------------------------------------------------------------------------------------- + val lsu_c1_d_clken_q = Wire(Bool()) + val lsu_c1_m_clken_q = Wire(Bool()) + val lsu_c1_r_clken_q = Wire(Bool()) + val lsu_free_c1_clken_q = Wire(Bool()) + + val lsu_c1_d_clken = io.lsu_p.valid | io.dma_dccm_req | io.clk_override + val lsu_c1_m_clken = io.lsu_pkt_d.valid | lsu_c1_d_clken_q | io.clk_override + val lsu_c1_r_clken = io.lsu_pkt_m.valid | lsu_c1_m_clken_q | io.clk_override + + val lsu_c2_m_clken = lsu_c1_m_clken | lsu_c1_m_clken_q | io.clk_override + val lsu_c2_r_clken = lsu_c1_r_clken | lsu_c1_r_clken_q | io.clk_override + + val lsu_store_c1_m_clken = ((lsu_c1_m_clken & io.lsu_pkt_d.store) | io.clk_override) + val lsu_store_c1_r_clken = ((lsu_c1_r_clken & io.lsu_pkt_m.store) | io.clk_override) + val lsu_stbuf_c1_clken = io.ldst_stbuf_reqvld_r | io.stbuf_reqvld_any | io.stbuf_reqvld_flushed_any | io.clk_override + val lsu_bus_ibuf_c1_clken = io.lsu_busreq_r | io.clk_override + val lsu_bus_obuf_c1_clken = (io.lsu_bus_buffer_pend_any | io.lsu_busreq_r | io.clk_override) & io.lsu_bus_clk_en + val lsu_bus_buf_c1_clken = (!io.lsu_bus_buffer_empty_any | io.lsu_busreq_r | io.clk_override).asBool + + val lsu_free_c1_clken = (io.lsu_p.valid | io.lsu_pkt_d.valid | io.lsu_pkt_m.valid | io.lsu_pkt_r.valid) | ~io.lsu_bus_buffer_empty_any | ~io.lsu_stbuf_empty_any | io.clk_override + val lsu_free_c2_clken = lsu_free_c1_clken | lsu_free_c1_clken_q | io.clk_override + + + lsu_free_c1_clken_q := withClock(io.free_clk) {RegNext(lsu_free_c1_clken,0.U)} + lsu_c1_d_clken_q := withClock(io.lsu_free_c2_clk) {RegNext(lsu_c1_d_clken, 0.U)} + lsu_c1_m_clken_q := withClock(io.lsu_free_c2_clk) {RegNext(lsu_c1_m_clken, 0.U)} + lsu_c1_r_clken_q := withClock(io.lsu_free_c2_clk) {RegNext(lsu_c1_r_clken, 0.U)} + + io.lsu_c1_m_clk := rvclkhdr(clock,lsu_c1_m_clken.asBool,io.scan_mode) + io.lsu_c1_r_clk := rvclkhdr(clock,lsu_c1_r_clken.asBool,io.scan_mode) + io.lsu_c2_m_clk := rvclkhdr(clock,lsu_c2_m_clken.asBool,io.scan_mode) + io.lsu_c2_r_clk := rvclkhdr(clock,lsu_c2_r_clken.asBool,io.scan_mode) + io.lsu_store_c1_m_clk := rvclkhdr(clock,lsu_store_c1_m_clken.asBool,io.scan_mode) + io.lsu_store_c1_r_clk := rvclkhdr(clock,lsu_store_c1_r_clken.asBool,io.scan_mode) + io.lsu_stbuf_c1_clk := rvclkhdr(clock,lsu_stbuf_c1_clken.asBool,io.scan_mode) + io.lsu_bus_ibuf_c1_clk := rvclkhdr(clock,lsu_bus_ibuf_c1_clken.asBool,io.scan_mode) + io.lsu_bus_obuf_c1_clk := rvclkhdr(clock,lsu_bus_obuf_c1_clken.asBool,io.scan_mode) + io.lsu_bus_buf_c1_clk := rvclkhdr(clock,lsu_bus_buf_c1_clken.asBool,io.scan_mode) + io.lsu_busm_clk := rvclkhdr(clock,io.lsu_bus_clk_en.asBool,io.scan_mode) + io.lsu_free_c2_clk := rvclkhdr(clock,lsu_free_c2_clken.asBool,io.scan_mode) + +} +object cgcmain extends App{ + println("Generate Verilog") + println((new chisel3.stage.ChiselStage).emitVerilog(new el2_lsu_clkdomain())) +} diff --git a/src/main/scala/lsu/el2_lsu_dccm_ctl.scala b/src/main/scala/lsu/el2_lsu_dccm_ctl.scala new file mode 100644 index 00000000..90c211fa --- /dev/null +++ b/src/main/scala/lsu/el2_lsu_dccm_ctl.scala @@ -0,0 +1,316 @@ +package lsu +import include._ +import lib._ +import chisel3._ +import chisel3.util._ + + + +import chisel3.experimental.chiselName +@chiselName +class el2_lsu_dccm_ctl extends Module with RequireAsyncReset with el2_lib +{ + val io = IO(new Bundle{ + //val rst_l = IO(Input(1.W)) //implicit + val lsu_c2_m_clk = Input(Clock()) + val lsu_c2_r_clk = Input(Clock()) + val lsu_free_c2_clk = Input(Clock()) //tbd + val lsu_c1_r_clk = Input(Clock()) + val lsu_store_c1_r_clk = Input(Clock()) + // val clk = Input(Clock()) //tbd + + val lsu_pkt_d = Input(new el2_lsu_pkt_t()) + val lsu_pkt_m = Input(new el2_lsu_pkt_t()) + val lsu_pkt_r = Input(new el2_lsu_pkt_t()) + + val addr_in_dccm_d = Input(UInt(1.W)) + val addr_in_dccm_m = Input(UInt(1.W)) + val addr_in_dccm_r = Input(UInt(1.W)) + val addr_in_pic_d = Input(UInt(1.W)) + val addr_in_pic_m = Input(UInt(1.W)) + val addr_in_pic_r = Input(UInt(1.W)) + + val lsu_raw_fwd_lo_r = Input(UInt(1.W)) + val lsu_raw_fwd_hi_r = Input(UInt(1.W)) + val lsu_commit_r = Input(UInt(1.W)) + + // lsu address down the pipe + val lsu_addr_d = Input(UInt(32.W))//verify bits + val lsu_addr_m = Input(UInt(DCCM_BITS.W)) + val lsu_addr_r = Input(UInt(32.W)) + + // lsu address down the pipe - needed to check unaligned + val end_addr_d = Input(UInt(DCCM_BITS.W)) + val end_addr_m = Input(UInt(DCCM_BITS.W)) + val end_addr_r = Input(UInt(DCCM_BITS.W)) + + val stbuf_reqvld_any = Input(UInt(1.W)) + val stbuf_addr_any = Input(UInt(LSU_SB_BITS.W)) + val stbuf_data_any = Input(UInt(DCCM_DATA_WIDTH.W)) + val stbuf_ecc_any = Input(UInt(DCCM_ECC_WIDTH.W)) + val stbuf_fwddata_hi_m = Input(UInt(DCCM_DATA_WIDTH.W)) + val stbuf_fwddata_lo_m = Input(UInt(DCCM_DATA_WIDTH.W)) + val stbuf_fwdbyteen_lo_m = Input(UInt(DCCM_BYTE_WIDTH.W)) + val stbuf_fwdbyteen_hi_m = Input(UInt(DCCM_BYTE_WIDTH.W)) + val dccm_rdata_hi_r = Output(UInt(DCCM_DATA_WIDTH.W)) + val dccm_rdata_lo_r = Output(UInt(DCCM_DATA_WIDTH.W)) + val dccm_data_ecc_hi_r = Output(UInt(DCCM_ECC_WIDTH.W)) + val dccm_data_ecc_lo_r = Output(UInt(DCCM_ECC_WIDTH.W)) + val lsu_ld_data_r = Output(UInt(DCCM_DATA_WIDTH.W)) + val lsu_ld_data_corr_r = Output(UInt(DCCM_DATA_WIDTH.W)) + val lsu_double_ecc_error_r = Input(UInt(1.W)) + val single_ecc_error_hi_r = Input(UInt(1.W)) + val single_ecc_error_lo_r = Input(UInt(1.W)) + val sec_data_hi_r = Input(UInt(DCCM_DATA_WIDTH.W)) + val sec_data_lo_r = Input(UInt(DCCM_DATA_WIDTH.W)) + val sec_data_hi_r_ff = Input(UInt(DCCM_DATA_WIDTH.W)) + val sec_data_lo_r_ff = Input(UInt(DCCM_DATA_WIDTH.W)) + val sec_data_ecc_hi_r_ff = Input(UInt(DCCM_ECC_WIDTH.W)) + val sec_data_ecc_lo_r_ff = Input(UInt(DCCM_ECC_WIDTH.W)) + val dccm_rdata_hi_m = Output(UInt(DCCM_DATA_WIDTH.W)) + val dccm_rdata_lo_m = Output(UInt(DCCM_DATA_WIDTH.W)) + val dccm_data_ecc_hi_m = Output(UInt(DCCM_ECC_WIDTH.W)) + val dccm_data_ecc_lo_m = Output(UInt(DCCM_ECC_WIDTH.W)) + val lsu_ld_data_m = Output(UInt(DCCM_DATA_WIDTH.W)) + val lsu_double_ecc_error_m = Input(UInt(1.W)) + val sec_data_hi_m = Input(UInt(DCCM_DATA_WIDTH.W)) + val sec_data_lo_m = Input(UInt(DCCM_DATA_WIDTH.W)) + val store_data_m = Input(UInt(32.W)) + val dma_dccm_wen = Input(UInt(1.W)) + val dma_pic_wen = Input(UInt(1.W)) + val dma_mem_tag_m = Input(UInt(3.W)) + val dma_mem_addr = Input(UInt(32.W)) + val dma_mem_wdata = Input(UInt(64.W)) + val dma_dccm_wdata_lo = Input(UInt(32.W)) + val dma_dccm_wdata_hi = Input(UInt(32.W)) + val dma_dccm_wdata_ecc_hi = Input(UInt(DCCM_ECC_WIDTH.W)) + val dma_dccm_wdata_ecc_lo = Input(UInt(DCCM_ECC_WIDTH.W)) + val store_data_hi_r = Output(UInt(DCCM_DATA_WIDTH.W)) + val store_data_lo_r = Output(UInt(DCCM_DATA_WIDTH.W)) + val store_datafn_hi_r = Output(UInt(DCCM_DATA_WIDTH.W)) + val store_datafn_lo_r = Output(UInt(DCCM_DATA_WIDTH.W)) + val store_data_r = Output(UInt(32.W)) + val ld_single_ecc_error_r = Output(UInt(1.W)) + val ld_single_ecc_error_r_ff = Output(UInt(1.W)) + val picm_mask_data_m = Output(UInt(32.W)) + val lsu_stbuf_commit_any = Output(UInt(1.W)) + val lsu_dccm_rden_m = Output(UInt(1.W)) + val lsu_dccm_rden_r = Output(UInt(1.W)) + val dccm_dma_rvalid = Output(UInt(1.W)) + val dccm_dma_ecc_error = Output(UInt(1.W)) + val dccm_dma_rtag = Output(UInt(3.W)) + val dccm_dma_rdata = Output(UInt(64.W)) + val dccm_wren = Output(UInt(1.W)) + val dccm_rden = Output(UInt(1.W)) + val dccm_wr_addr_lo = Output(UInt(DCCM_BITS.W)) + val dccm_wr_data_lo = Output(UInt(DCCM_FDATA_WIDTH.W)) + val dccm_rd_addr_lo = Output(UInt(DCCM_BITS.W)) + val dccm_rd_data_lo = Input(UInt(DCCM_FDATA_WIDTH.W)) + val dccm_wr_addr_hi = Output(UInt(DCCM_BITS.W)) + val dccm_wr_data_hi = Output(UInt(DCCM_FDATA_WIDTH.W)) + val dccm_rd_addr_hi = Output(UInt(DCCM_BITS.W)) + val dccm_rd_data_hi = Input(UInt(DCCM_FDATA_WIDTH.W)) + val picm_wren = Output(UInt(1.W)) + val picm_rden = Output(UInt(1.W)) + val picm_mken = Output(UInt(1.W)) + val picm_rdaddr = Output(UInt(32.W)) + val picm_wraddr = Output(UInt(32.W)) + val picm_wr_data = Output(UInt(32.W)) + val picm_rd_data = Input(UInt(32.W)) + val scan_mode = Input(UInt(1.W)) + }) + val picm_rd_data_m = Cat(io.picm_rd_data,io.picm_rd_data) //used in both if and else + val dccm_rdata_corr_r = Cat(io.sec_data_hi_r,io.sec_data_lo_r) + val dccm_rdata_corr_m = Cat(io.sec_data_hi_m,io.sec_data_lo_m) + val dccm_rdata_r = Cat(io.dccm_rdata_hi_r,io.dccm_rdata_lo_r) + val dccm_rdata_m = Cat(io.dccm_rdata_hi_m,io.dccm_rdata_lo_m) + val lsu_rdata_r = WireInit(UInt(64.W),0.U) + val lsu_rdata_m = WireInit(UInt(64.W),0.U) + val lsu_rdata_corr_r = WireInit(UInt(64.W),0.U) + val lsu_rdata_corr_m = WireInit(UInt(64.W),0.U) + val stbuf_fwddata_r = WireInit(UInt(64.W),0.U) + val stbuf_fwdbyteen_r = WireInit(UInt(64.W),0.U) + val picm_rd_data_r_32 = WireInit(UInt(32.W),0.U) + val picm_rd_data_r = WireInit(UInt(64.W),0.U) + val lsu_ld_data_corr_m = WireInit(UInt(64.W),0.U) + + + //Forwarding stbuf + if (LOAD_TO_USE_PLUS1 == 1){ + io.dccm_dma_rvalid := io.lsu_pkt_r.valid & io.lsu_pkt_r.load & io.lsu_pkt_r.dma + io.dccm_dma_ecc_error := io.lsu_double_ecc_error_r //from ecc + io.dccm_dma_rdata := lsu_rdata_corr_r + //Registers + io.dccm_rdata_hi_r := rvdffe(io.dccm_rdata_hi_m,io.lsu_dccm_rden_m.asBool,clock,io.scan_mode.asBool) + io.dccm_rdata_lo_r := rvdffe(io.dccm_rdata_lo_m,io.lsu_dccm_rden_m.asBool,clock,io.scan_mode.asBool) + io.dccm_data_ecc_hi_r := rvdffe(io.dccm_data_ecc_hi_m,io.lsu_dccm_rden_m.asBool,clock,io.scan_mode.asBool) + io.dccm_data_ecc_lo_r := rvdffe(io.dccm_data_ecc_lo_m,io.lsu_dccm_rden_m.asBool,clock,io.scan_mode.asBool) + stbuf_fwdbyteen_r := withClock(io.lsu_c2_r_clk){RegNext(Cat(io.stbuf_fwdbyteen_hi_m,io.stbuf_fwdbyteen_lo_m),0.U)} + stbuf_fwddata_r := withClock(io.lsu_c2_r_clk){RegNext(Cat(io.stbuf_fwddata_hi_m ,io.stbuf_fwddata_lo_m ),0.U)} + picm_rd_data_r_32 := withClock(io.lsu_c2_r_clk){RegNext(picm_rd_data_m(31,0),0.U)} + picm_rd_data_r := Cat(picm_rd_data_r_32,picm_rd_data_r_32) + io.dccm_dma_rtag := withClock(io.lsu_c1_r_clk){RegNext(io.dma_mem_tag_m,0.U)} + + lsu_rdata_corr_r := Reverse(Cat(VecInit.tabulate(8)(i=> Reverse(Mux(stbuf_fwdbyteen_r(i).asBool,stbuf_fwddata_r((8*i)+7,8*i),Mux(io.addr_in_pic_r.asBool,picm_rd_data_r((8*i)+7,8*i),dccm_rdata_corr_r((8*i)+7,8*i))))))) + lsu_rdata_r := Reverse(Cat(VecInit.tabulate(8)(i=> Reverse(Mux(stbuf_fwdbyteen_r(i).asBool,stbuf_fwddata_r((8*i)+7,8*i),Mux(io.addr_in_pic_r.asBool,picm_rd_data_r((8*i)+7,8*i),dccm_rdata_r((8*i)+7,8*i))))))) + io.lsu_ld_data_r := lsu_rdata_r>> 8.U*io.lsu_addr_r(1,0) + io.lsu_ld_data_corr_r := lsu_rdata_corr_r >> 8.U*io.lsu_addr_r(1,0) + } + + else{ + io.dccm_dma_rvalid := io.lsu_pkt_m.valid & io.lsu_pkt_m.load & io.lsu_pkt_m.dma + io.dccm_dma_ecc_error := io.lsu_double_ecc_error_m //from ecc + io.dccm_dma_rdata := lsu_rdata_corr_m + io.dccm_dma_rtag := io.dma_mem_tag_m + io.dccm_rdata_lo_r := 0.U + io.dccm_rdata_hi_r := 0.U + io.dccm_data_ecc_hi_r := 0.U + io.dccm_data_ecc_lo_r := 0.U + io.lsu_ld_data_r := 0.U + //Registers + io.lsu_ld_data_corr_r := withClock(io.lsu_c2_r_clk){RegNext(lsu_ld_data_corr_m,0.U)} + lsu_rdata_corr_m := Reverse(Cat(VecInit.tabulate(8)(i=> Reverse(Mux(((Cat(io.stbuf_fwdbyteen_hi_m,io.stbuf_fwdbyteen_lo_m))(i)).asBool,(Cat(io.stbuf_fwddata_hi_m,io.stbuf_fwddata_lo_m))((8*i)+7,8*i),Mux(io.addr_in_pic_m.asBool,picm_rd_data_m((8*i)+7,8*i),dccm_rdata_corr_m((8*i)+7,8*i))))))) + lsu_rdata_m := Reverse(Cat(VecInit.tabulate(8)(i=> Reverse(Mux(((Cat(io.stbuf_fwdbyteen_hi_m,io.stbuf_fwdbyteen_lo_m))(i)).asBool,(Cat(io.stbuf_fwddata_hi_m,io.stbuf_fwddata_lo_m))((8*i)+7,8*i),Mux(io.addr_in_pic_m.asBool,picm_rd_data_m((8*i)+7,8*i),dccm_rdata_m((8*i)+7,8*i))))))) + io.lsu_ld_data_m := lsu_rdata_m >> 8.U*io.lsu_addr_m(1,0) + lsu_ld_data_corr_m := lsu_rdata_corr_m >> 8.U*io.lsu_addr_m(1,0) + } + + //Ecc error kill + val kill_ecc_corr_lo_r = (((io.lsu_addr_d(DCCM_BITS-1,2) === io.lsu_addr_r(DCCM_BITS-1,2)).asUInt | (io.end_addr_d(DCCM_BITS-1,2) === io.lsu_addr_r(DCCM_BITS-1,2)).asUInt) & io.lsu_pkt_d.valid & io.lsu_pkt_d.store & io.lsu_pkt_d.dma & io.addr_in_dccm_d) | + (((io.lsu_addr_m(DCCM_BITS-1,2) === io.lsu_addr_r(DCCM_BITS-1,2)).asUInt | (io.end_addr_m(DCCM_BITS-1,2) === io.lsu_addr_r(DCCM_BITS-1,2)).asUInt) & io.lsu_pkt_m.valid & io.lsu_pkt_m.store & io.lsu_pkt_m.dma & io.addr_in_dccm_m) + + val kill_ecc_corr_hi_r = (((io.lsu_addr_d(DCCM_BITS-1,2) === io.end_addr_r(DCCM_BITS-1,2)).asUInt | (io.end_addr_d(DCCM_BITS-1,2) === io.end_addr_r(DCCM_BITS-1,2)).asUInt) & io.lsu_pkt_d.valid & io.lsu_pkt_d.store & io.lsu_pkt_d.dma & io.addr_in_dccm_d) | + (((io.lsu_addr_m(DCCM_BITS-1,2) === io.end_addr_r(DCCM_BITS-1,2)).asUInt | (io.end_addr_m(DCCM_BITS-1,2) === io.end_addr_r(DCCM_BITS-1,2)).asUInt) & io.lsu_pkt_m.valid & io.lsu_pkt_m.store & io.lsu_pkt_m.dma & io.addr_in_dccm_m) + + val ld_single_ecc_error_lo_r = io.lsu_pkt_r.load & io.single_ecc_error_lo_r & !io.lsu_raw_fwd_lo_r + val ld_single_ecc_error_hi_r = io.lsu_pkt_r.load & io.single_ecc_error_hi_r & !io.lsu_raw_fwd_hi_r + io.ld_single_ecc_error_r := (ld_single_ecc_error_lo_r | ld_single_ecc_error_hi_r) & !io.lsu_double_ecc_error_r + val ld_single_ecc_error_lo_r_ns = ld_single_ecc_error_lo_r & (io.lsu_commit_r | io.lsu_pkt_r.dma) & !kill_ecc_corr_lo_r + val ld_single_ecc_error_hi_r_ns = ld_single_ecc_error_hi_r & (io.lsu_commit_r | io.lsu_pkt_r.dma) & !kill_ecc_corr_hi_r + + val lsu_double_ecc_error_r_ff = withClock(io.lsu_free_c2_clk){RegNext(io.lsu_double_ecc_error_r,0.U)} + val ld_single_ecc_error_hi_r_ff = withClock(io.lsu_free_c2_clk){RegNext(ld_single_ecc_error_hi_r_ns,0.U)} + val ld_single_ecc_error_lo_r_ff = withClock(io.lsu_free_c2_clk){RegNext(ld_single_ecc_error_lo_r_ns,0.U)} + + val ld_sec_addr_hi_r_ff = rvdffe(io.end_addr_r(DCCM_BITS-1,0),io.ld_single_ecc_error_r.asBool,clock,io.scan_mode.asBool) + val ld_sec_addr_lo_r_ff = rvdffe(io.lsu_addr_r(DCCM_BITS-1,0),io.ld_single_ecc_error_r.asBool,clock,io.scan_mode.asBool) + val lsu_dccm_rden_d = io.lsu_pkt_d.valid & (io.lsu_pkt_d.load | (io.lsu_pkt_d.store & (!(io.lsu_pkt_d.word | io.lsu_pkt_d.dword) | (io.lsu_addr_d(1,0) =/= 0.U(2.W))))) & io.addr_in_dccm_d + val lsu_dccm_wren_d = io.dma_dccm_wen + + io.ld_single_ecc_error_r_ff := (ld_single_ecc_error_lo_r_ff | ld_single_ecc_error_hi_r_ff) & !lsu_double_ecc_error_r_ff + io.lsu_stbuf_commit_any := io.stbuf_reqvld_any & (!(lsu_dccm_rden_d | lsu_dccm_wren_d | io.ld_single_ecc_error_r_ff) | + (lsu_dccm_rden_d & !((io.stbuf_addr_any(DCCM_WIDTH_BITS+DCCM_BANK_BITS-1,DCCM_WIDTH_BITS) === io.lsu_addr_d(DCCM_WIDTH_BITS+DCCM_BANK_BITS-1,DCCM_WIDTH_BITS)).asUInt | + (io.stbuf_addr_any(DCCM_WIDTH_BITS+DCCM_BANK_BITS-1,DCCM_WIDTH_BITS) === io.end_addr_d(DCCM_WIDTH_BITS+DCCM_BANK_BITS-1,DCCM_WIDTH_BITS)).asUInt))) + + + //DCCM inputs + io.dccm_wren := lsu_dccm_wren_d | io.lsu_stbuf_commit_any | io.ld_single_ecc_error_r_ff + io.dccm_rden := lsu_dccm_rden_d & io.addr_in_dccm_d + + io.dccm_wr_addr_lo := Mux(io.ld_single_ecc_error_r_ff.asBool, + Mux(ld_single_ecc_error_lo_r_ff===1.U,ld_sec_addr_lo_r_ff(DCCM_BITS-1,0),ld_sec_addr_hi_r_ff(DCCM_BITS-1,0)), + Mux(lsu_dccm_wren_d.asBool,io.lsu_addr_d(DCCM_BITS-1,0),io.stbuf_addr_any(DCCM_BITS-1,0))) + + io.dccm_wr_addr_hi := Mux(io.ld_single_ecc_error_r_ff.asBool, + Mux(ld_single_ecc_error_hi_r_ff===1.U, ld_sec_addr_hi_r_ff(DCCM_BITS-1,0), ld_sec_addr_lo_r_ff(DCCM_BITS-1,0)), + Mux(lsu_dccm_wren_d.asBool, io.end_addr_d(DCCM_BITS-1,0),io.stbuf_addr_any(DCCM_BITS-1,0))) + + io.dccm_rd_addr_lo := io.lsu_addr_d(DCCM_BITS-1,0) + io.dccm_rd_addr_hi := io.end_addr_d(DCCM_BITS-1,0) + + io.dccm_wr_data_lo := Mux(io.ld_single_ecc_error_r_ff.asBool, + Mux(ld_single_ecc_error_lo_r_ff===0.U,Cat(io.sec_data_ecc_lo_r_ff(DCCM_ECC_WIDTH-1,0),io.sec_data_lo_r_ff(DCCM_DATA_WIDTH-1,0)) , + Cat(io.sec_data_ecc_hi_r_ff(DCCM_ECC_WIDTH-1,0),io.sec_data_hi_r_ff(DCCM_DATA_WIDTH-1,0))) , + Mux(io.dma_dccm_wen.asBool,Cat(io.dma_dccm_wdata_ecc_lo(DCCM_ECC_WIDTH-1,0),io.dma_dccm_wdata_lo(DCCM_DATA_WIDTH-1,0)), + Cat(io.stbuf_ecc_any(DCCM_ECC_WIDTH-1,0),io.stbuf_data_any(DCCM_DATA_WIDTH-1,0)))) + + io.dccm_wr_data_hi := Mux(io.ld_single_ecc_error_r_ff.asBool, + Mux(ld_single_ecc_error_hi_r_ff===0.U, Cat(io.sec_data_ecc_hi_r_ff(DCCM_ECC_WIDTH-1,0),io.sec_data_hi_r_ff(DCCM_DATA_WIDTH-1,0)), + Cat(io.sec_data_ecc_lo_r_ff(DCCM_ECC_WIDTH-1,0),io.sec_data_lo_r_ff(DCCM_DATA_WIDTH-1,0))), + Mux(io.dma_dccm_wen.asBool, Cat(io.dma_dccm_wdata_ecc_hi(DCCM_ECC_WIDTH-1,0),io.dma_dccm_wdata_hi(DCCM_DATA_WIDTH-1,0)), + Cat(io.stbuf_ecc_any(DCCM_ECC_WIDTH-1,0),io.stbuf_data_any(DCCM_DATA_WIDTH-1,0)))) + //////////////////////////////////////////////////////////////////////////////////////////////////////////////// + // DCCM outputs + val store_byteen_m = (Fill(4,io.lsu_pkt_m.store)) & ((Fill(4,io.lsu_pkt_m.by) & 1.U(4.W)) | + (Fill(4,io.lsu_pkt_m.half) & 3.U(4.W)) | + (Fill(4,io.lsu_pkt_m.word) & 15.U(4.W))) + + val store_byteen_r = (Fill(4,io.lsu_pkt_r.store)) & ((Fill(4,io.lsu_pkt_r.by) & 1.U(4.W)) | + (Fill(4,io.lsu_pkt_r.half) & 3.U(4.W)) | + (Fill(4,io.lsu_pkt_r.word) & 15.U(4.W))) + val store_byteen_ext_m = WireInit(UInt(8.W),0.U) + store_byteen_ext_m := store_byteen_m(3,0) << io.lsu_addr_m(1,0) // The packet in m + val store_byteen_ext_r = WireInit(UInt(8.W),0.U) + store_byteen_ext_r := store_byteen_r(3,0) << io.lsu_addr_r(1,0) + + //LM: If store buffer addr matches with the address in the m-stage then there will be bypassed + val dccm_wr_bypass_d_m_lo = (io.stbuf_addr_any(DCCM_BITS-1,2) === io.lsu_addr_m(DCCM_BITS-1,2)) & io.addr_in_dccm_m + val dccm_wr_bypass_d_m_hi = (io.stbuf_addr_any(DCCM_BITS-1,2) === io.end_addr_m(DCCM_BITS-1,2)) & io.addr_in_dccm_m + + val dccm_wr_bypass_d_r_lo = (io.stbuf_addr_any(DCCM_BITS-1,2) === io.lsu_addr_r(DCCM_BITS-1,2)) & io.addr_in_dccm_r + val dccm_wr_bypass_d_r_hi = (io.stbuf_addr_any(DCCM_BITS-1,2) === io.end_addr_r(DCCM_BITS-1,2)) & io.addr_in_dccm_r + + val dccm_wr_bypass_d_m_hi_Q = WireInit(0.U(1.W)) + val dccm_wr_bypass_d_m_lo_Q = WireInit(0.U(1.W)) + val dccm_wren_Q = WireInit(0.U(1.W)) + val dccm_wr_data_Q = WireInit(0.U(32.W)) + val store_data_pre_r = WireInit(0.U(64.W)) + val store_data_pre_hi_r = WireInit(0.U(32.W)) + val store_data_pre_lo_r = WireInit(0.U(32.W)) + val store_data_pre_m = WireInit(0.U(64.W)) + val store_data_hi_m = WireInit(0.U(32.W)) + val store_data_lo_m = WireInit(0.U(32.W)) + + if(LOAD_TO_USE_PLUS1 == 1){ + store_data_pre_r := Cat(Fill(32,0.U),io.store_data_r(31,0)) << 8.U*io.lsu_addr_r(1,0) + store_data_pre_hi_r := store_data_pre_r(63,32) + store_data_pre_lo_r := store_data_pre_r(31, 0) + io.store_data_lo_r := Reverse(Cat(VecInit.tabulate(4)(i=> Reverse(Mux(store_byteen_ext_r(i).asBool, store_data_pre_lo_r((8*i)+7,8*i), Mux((dccm_wren_Q & dccm_wr_bypass_d_m_lo_Q).asBool, dccm_wr_data_Q((8*i)+7,8*i),io.sec_data_lo_r((8*i)+7,8*i))))))) + io.store_data_hi_r := Reverse(Cat(VecInit.tabulate(4)(i=> Reverse(Mux(store_byteen_ext_r(i+4).asBool,store_data_pre_hi_r((8*i)+7,8*i), Mux((dccm_wren_Q & dccm_wr_bypass_d_m_hi_Q).asBool, dccm_wr_data_Q((8*i)+7,8*i),io.sec_data_hi_r((8*i)+7,8*i))))))) + io.store_datafn_lo_r := Reverse(Cat(VecInit.tabulate(4)(i=> Reverse(Mux(store_byteen_ext_r(i).asBool, store_data_pre_lo_r((8*i)+7,8*i), Mux((io.lsu_stbuf_commit_any & dccm_wr_bypass_d_r_lo).asBool,io.stbuf_data_any((8*i)+7,(8*i)),Mux((dccm_wren_Q & dccm_wr_bypass_d_m_lo_Q).asBool, dccm_wr_data_Q((8*i)+7,8*i),io.sec_data_lo_r((8*i)+7,8*i)))))))) + io.store_datafn_hi_r := Reverse(Cat(VecInit.tabulate(4)(i=> Reverse(Mux(store_byteen_ext_r(i+4).asBool,store_data_pre_hi_r((8*i)+7,8*i), Mux((io.lsu_stbuf_commit_any & dccm_wr_bypass_d_r_lo).asBool,io.stbuf_data_any((8*i)+7,(8*i)),Mux((dccm_wren_Q & dccm_wr_bypass_d_m_hi_Q).asBool, dccm_wr_data_Q((8*i)+7,8*i),io.sec_data_hi_r((8*i)+7,8*i)))))))) + dccm_wren_Q := withClock(io.lsu_free_c2_clk){RegNext(io.lsu_stbuf_commit_any,0.U)} + dccm_wr_data_Q := rvdffe(io.stbuf_data_any,io.lsu_stbuf_commit_any.asBool,clock,io.scan_mode.asBool) + dccm_wr_bypass_d_m_lo_Q := withClock(io.lsu_free_c2_clk){RegNext(dccm_wr_bypass_d_m_lo,0.U)} + dccm_wr_bypass_d_m_hi_Q := withClock(io.lsu_free_c2_clk){RegNext(dccm_wr_bypass_d_m_hi,0.U)} + io.store_data_r := withClock(io.lsu_store_c1_r_clk){RegNext(io.store_data_m,0.U)} + } + else + { + store_data_pre_m := Cat(Fill(32,0.U),io.store_data_m(31,0)) << 8.U*io.lsu_addr_m(1,0) + store_data_hi_m := store_data_pre_m(63,32) + store_data_lo_m := store_data_pre_m(31, 0) + io.store_data_lo_r := withClock(io.lsu_store_c1_r_clk){RegNext(Reverse(Cat(VecInit.tabulate(4)(i=> Reverse(Mux(store_byteen_ext_m(i).asBool, store_data_lo_m((8*i)+7,8*i), Mux((io.lsu_stbuf_commit_any & dccm_wr_bypass_d_m_lo).asBool, io.stbuf_data_any((8*i)+7,8*i),io.sec_data_lo_m((8*i)+7,8*i))))))),0.U)} + io.store_data_hi_r := withClock(io.lsu_store_c1_r_clk){RegNext(Reverse(Cat(VecInit.tabulate(4)(i=> Reverse(Mux(store_byteen_ext_m(i+4).asBool,store_data_hi_m((8*i)+7,8*i), Mux((io.lsu_stbuf_commit_any & dccm_wr_bypass_d_m_hi).asBool, io.stbuf_data_any((8*i)+7,8*i),io.sec_data_hi_m((8*i)+7,8*i))))))),0.U)} + io.store_datafn_lo_r := Reverse(Cat(VecInit.tabulate(4)(i=> Reverse(Mux((io.lsu_stbuf_commit_any & dccm_wr_bypass_d_r_lo & !store_byteen_ext_r(i)).asBool,io.stbuf_data_any((8*i)+7,8*i),io.store_data_lo_r((8*i)+7,8*i)))))) + io.store_datafn_hi_r := Reverse(Cat(VecInit.tabulate(4)(i=> Reverse(Mux((io.lsu_stbuf_commit_any & dccm_wr_bypass_d_r_lo & !store_byteen_ext_r(i)).asBool,io.stbuf_data_any((8*i)+7,8*i),io.store_data_hi_r((8*i)+7,8*i)))))) + io.store_data_r := (Cat(io.store_data_hi_r(31,0),io.store_data_lo_r(31,0)) >> 8.U*io.lsu_addr_r(1,0)) & Reverse(Cat(VecInit.tabulate(4)(i=> Fill(8,store_byteen_r(i))))) + } + io.dccm_rdata_lo_m := io.dccm_rd_data_lo(DCCM_DATA_WIDTH-1,0) //4 lines + io.dccm_rdata_hi_m := io.dccm_rd_data_hi(DCCM_DATA_WIDTH-1,0) + io.dccm_data_ecc_lo_m := io.dccm_rd_data_lo(DCCM_FDATA_WIDTH-1,DCCM_DATA_WIDTH) + io.dccm_data_ecc_hi_m := io.dccm_rd_data_hi(DCCM_FDATA_WIDTH-1,DCCM_DATA_WIDTH) + + io.picm_wren := (io.lsu_pkt_r.valid & io.lsu_pkt_r.store & io.addr_in_pic_r & io.lsu_commit_r) | io.dma_pic_wen + io.picm_rden := io.lsu_pkt_d.valid & io.lsu_pkt_d.load & io.addr_in_pic_d + io.picm_mken := io.lsu_pkt_d.valid & io.lsu_pkt_d.store & io.addr_in_pic_d + io.picm_rdaddr := PIC_BASE_ADDR.U | Cat(Fill(32-PIC_BITS,0.U),io.lsu_addr_d(PIC_BITS-1,0)) + io.picm_wraddr := PIC_BASE_ADDR.U | Cat(Fill(32-PIC_BITS,0.U),Mux(io.dma_pic_wen.asBool,io.dma_mem_addr(PIC_BITS-1,0),io.lsu_addr_r(PIC_BITS-1,0))) + io.picm_mask_data_m := picm_rd_data_m(31,0) + io.picm_wr_data := Mux(io.dma_pic_wen.asBool,io.dma_mem_wdata(31,0),io.store_datafn_lo_r(31,0)) + + if(DCCM_ENABLE){ + io.lsu_dccm_rden_m := withClock(io.lsu_c2_m_clk){RegNext(lsu_dccm_rden_d,0.U)} + io.lsu_dccm_rden_r := withClock(io.lsu_c2_r_clk){RegNext(io.lsu_dccm_rden_m,0.U)} + } + else{ + io.lsu_dccm_rden_m := 0.U + io.lsu_dccm_rden_r := 0.U} + +} + +object dccm_ctl extends App{ + println("Generate Verilog") + println((new chisel3.stage.ChiselStage).emitVerilog(new el2_lsu_dccm_ctl())) +} + diff --git a/src/main/scala/lsu/el2_lsu_ecc.scala b/src/main/scala/lsu/el2_lsu_ecc.scala new file mode 100644 index 00000000..1e24c902 --- /dev/null +++ b/src/main/scala/lsu/el2_lsu_ecc.scala @@ -0,0 +1,164 @@ +package lsu +import chisel3._ +import chisel3.util._ +import chisel3.experimental.chiselName +import include._ +import lib._ + +@chiselName +class el2_lsu_ecc extends Module with el2_lib with RequireAsyncReset { + val io = IO(new Bundle{ + + val lsu_c2_r_clk = Input(Clock()) + val lsu_pkt_m = Input(new el2_lsu_pkt_t) + val lsu_pkt_r = Input(new el2_lsu_pkt_t) + val stbuf_data_any = Input(UInt(DCCM_DATA_WIDTH.W)) + val dec_tlu_core_ecc_disable = Input(Bool()) + val lsu_dccm_rden_r = Input(Bool()) + val addr_in_dccm_r = Input(Bool()) + + val lsu_addr_r = Input(UInt(DCCM_BITS.W)) + val end_addr_r = Input(UInt(DCCM_BITS.W)) + val lsu_addr_m = Input(UInt(DCCM_BITS.W)) + val end_addr_m = Input(UInt(DCCM_BITS.W)) + + val dccm_rdata_hi_r = Input(UInt(DCCM_DATA_WIDTH.W)) + val dccm_rdata_lo_r = Input(UInt(DCCM_DATA_WIDTH.W)) + val dccm_rdata_hi_m = Input(UInt(DCCM_DATA_WIDTH.W)) + val dccm_rdata_lo_m = Input(UInt(DCCM_DATA_WIDTH.W)) + + val dccm_data_ecc_hi_r = Input(UInt(DCCM_ECC_WIDTH.W)) + val dccm_data_ecc_lo_r = Input(UInt(DCCM_ECC_WIDTH.W)) + val dccm_data_ecc_hi_m = Input(UInt(DCCM_ECC_WIDTH.W)) + val dccm_data_ecc_lo_m = Input(UInt(DCCM_ECC_WIDTH.W)) + + val ld_single_ecc_error_r = Input(Bool()) + val ld_single_ecc_error_r_ff = Input(Bool()) + val lsu_dccm_rden_m = Input(Bool()) + val addr_in_dccm_m = Input(Bool()) + + val dma_dccm_wen = Input(Bool()) + val dma_dccm_wdata_lo = Input(UInt(32.W)) + val dma_dccm_wdata_hi = Input(UInt(32.W)) + + val scan_mode = Input(Bool()) + + //Outputs + val sec_data_hi_r = Output(UInt(DCCM_DATA_WIDTH.W)) + val sec_data_lo_r = Output(UInt(DCCM_DATA_WIDTH.W)) + val sec_data_hi_m = Output(UInt(DCCM_DATA_WIDTH.W)) + val sec_data_lo_m = Output(UInt(DCCM_DATA_WIDTH.W)) + val sec_data_hi_r_ff = Output(UInt(DCCM_DATA_WIDTH.W)) + val sec_data_lo_r_ff = Output(UInt(DCCM_DATA_WIDTH.W)) + + val dma_dccm_wdata_ecc_hi = Output(UInt(DCCM_ECC_WIDTH.W)) + val dma_dccm_wdata_ecc_lo = Output(UInt(DCCM_ECC_WIDTH.W)) + val stbuf_ecc_any = Output(UInt(DCCM_ECC_WIDTH.W)) + val sec_data_ecc_hi_r_ff = Output(UInt(DCCM_ECC_WIDTH.W)) + val sec_data_ecc_lo_r_ff = Output(UInt(DCCM_ECC_WIDTH.W)) + + val single_ecc_error_hi_r = Output(Bool()) + val single_ecc_error_lo_r = Output(Bool()) + val lsu_single_ecc_error_r = Output(Bool()) + val lsu_double_ecc_error_r = Output(Bool()) + val lsu_single_ecc_error_m = Output(Bool()) + val lsu_double_ecc_error_m = Output(Bool()) + }) + val is_ldst_r = WireInit(Bool(),init = 0.U) + val is_ldst_hi_any = WireInit(Bool(),init = 0.U) + val is_ldst_lo_any = WireInit(Bool(),init = 0.U) + val dccm_wdata_hi_any = WireInit(0.U(DCCM_DATA_WIDTH.W)) + val dccm_wdata_lo_any = WireInit(0.U(DCCM_DATA_WIDTH.W)) + val dccm_rdata_hi_any = WireInit(0.U(DCCM_DATA_WIDTH.W)) + val dccm_rdata_lo_any = WireInit(0.U(DCCM_DATA_WIDTH.W)) + // val dccm_wdata_ecc_hi_any = WireInit(0.U(DCCM_ECC_WIDTH.W)) + //val dccm_wdata_ecc_lo_any = WireInit(0.U(DCCM_ECC_WIDTH.W)) + val dccm_data_ecc_hi_any = WireInit(0.U(DCCM_ECC_WIDTH.W)) + val dccm_data_ecc_lo_any = WireInit(0.U(DCCM_ECC_WIDTH.W)) + val double_ecc_error_hi_m = WireInit(Bool(),init = 0.U) + val double_ecc_error_lo_m = WireInit(Bool(),init = 0.U) + val double_ecc_error_hi_r = WireInit(Bool(),init = 0.U) + val double_ecc_error_lo_r = WireInit(Bool(),init = 0.U) + val ldst_dual_m = WireInit(Bool(),init = 0.U) + val ldst_dual_r = WireInit(Bool(),init = 0.U) + val is_ldst_m = WireInit(Bool(),init = 0.U) + val is_ldst_hi_m = WireInit(Bool(),init = 0.U) + val is_ldst_lo_m = WireInit(Bool(),init = 0.U) + val is_ldst_hi_r = WireInit(Bool(),init = 0.U) + val is_ldst_lo_r = WireInit(Bool(),init = 0.U) + + io.sec_data_hi_m :=0.U + io.sec_data_lo_m :=0.U + io.lsu_single_ecc_error_m :=0.U + io.lsu_double_ecc_error_m :=0.U + + //////////////////////////////CODE STARTS HERE/////////////////////// + val (ecc_out_hi_nc, sec_data_hi_any, single_ecc_error_hi_any, double_ecc_error_hi_any) = if(DCCM_ENABLE) + rvecc_decode(is_ldst_hi_any, dccm_rdata_hi_any, dccm_data_ecc_hi_any, 0.U) else (0.U, 0.U, 0.U, 0.U) + val ( ecc_out_lo_nc, sec_data_lo_any, single_ecc_error_lo_any, double_ecc_error_lo_any) = if(DCCM_ENABLE) + rvecc_decode(is_ldst_lo_any, dccm_rdata_lo_any, dccm_data_ecc_lo_any, 0.U) else (0.U, 0.U, 0.U, 0.U) + val dccm_wdata_ecc_lo_any = if(DCCM_ENABLE) rvecc_encode(dccm_wdata_lo_any) else (0.U) + val dccm_wdata_ecc_hi_any = if(DCCM_ENABLE) rvecc_encode(dccm_wdata_hi_any) else (0.U) + + when (LOAD_TO_USE_PLUS1.B) { + ldst_dual_r := io.lsu_addr_r(2) =/= io.end_addr_r(2) + is_ldst_r := io.lsu_pkt_r.valid & (io.lsu_pkt_r.load | io.lsu_pkt_r.store) & io.addr_in_dccm_r & io.lsu_dccm_rden_r + is_ldst_lo_r := is_ldst_r & !io.dec_tlu_core_ecc_disable + is_ldst_hi_r := is_ldst_r & (ldst_dual_r | io.lsu_pkt_r.dma) & !io.dec_tlu_core_ecc_disable + is_ldst_hi_any := is_ldst_hi_r + dccm_rdata_hi_any := io.dccm_rdata_hi_r + dccm_data_ecc_hi_any := io.dccm_data_ecc_hi_r + is_ldst_lo_any := is_ldst_lo_r + dccm_rdata_lo_any := io.dccm_rdata_lo_r + dccm_data_ecc_lo_any := io.dccm_data_ecc_lo_r + io.sec_data_hi_r := sec_data_hi_any; + io.single_ecc_error_hi_r := single_ecc_error_hi_any + double_ecc_error_hi_r := double_ecc_error_hi_any + io.sec_data_lo_r := sec_data_lo_any + io.single_ecc_error_lo_r := single_ecc_error_lo_any + double_ecc_error_lo_r := double_ecc_error_lo_any + io.lsu_single_ecc_error_r := io.single_ecc_error_hi_r | io.single_ecc_error_lo_r; + io.lsu_double_ecc_error_r := double_ecc_error_hi_r | double_ecc_error_lo_r + } + .otherwise { + ldst_dual_m := io.lsu_addr_m(2) =/= io.end_addr_m(2) + is_ldst_m := io.lsu_pkt_m.valid & (io.lsu_pkt_m.load | io.lsu_pkt_m.store) & io.addr_in_dccm_m & io.lsu_dccm_rden_m + is_ldst_lo_m := is_ldst_m & !io.dec_tlu_core_ecc_disable + is_ldst_hi_m := is_ldst_m & (ldst_dual_m | io.lsu_pkt_m.dma) & !io.dec_tlu_core_ecc_disable + is_ldst_hi_any := is_ldst_hi_m + dccm_rdata_hi_any := io.dccm_rdata_hi_m + dccm_data_ecc_hi_any := io.dccm_data_ecc_hi_m + is_ldst_lo_any := is_ldst_lo_m + dccm_rdata_lo_any := io.dccm_rdata_lo_m + dccm_data_ecc_lo_any := io.dccm_data_ecc_lo_m + io.sec_data_hi_m := sec_data_hi_any + double_ecc_error_hi_m := double_ecc_error_hi_any + io.sec_data_lo_m := sec_data_lo_any + double_ecc_error_lo_m := double_ecc_error_lo_any + io.lsu_single_ecc_error_m := single_ecc_error_hi_any | single_ecc_error_lo_any; + io.lsu_double_ecc_error_m := double_ecc_error_hi_m | double_ecc_error_lo_m + + withClock(io.lsu_c2_r_clk) {io.lsu_single_ecc_error_r := RegNext(io.lsu_single_ecc_error_m,0.U)} + withClock(io.lsu_c2_r_clk) {io.lsu_double_ecc_error_r := RegNext(io.lsu_double_ecc_error_m,0.U)} + withClock(io.lsu_c2_r_clk) {io.single_ecc_error_lo_r := RegNext(single_ecc_error_lo_any,0.U)} + withClock(io.lsu_c2_r_clk) {io.single_ecc_error_hi_r := RegNext(single_ecc_error_hi_any,0.U)} + withClock(io.lsu_c2_r_clk) {io.sec_data_hi_r := RegNext(io.sec_data_hi_m,0.U)} + withClock(io.lsu_c2_r_clk) {io.sec_data_lo_r := RegNext(io.sec_data_lo_m,0.U)} + } + // Logic for ECC generation during write + dccm_wdata_lo_any := Mux(io.ld_single_ecc_error_r_ff.asBool, io.sec_data_lo_r_ff,Mux(io.dma_dccm_wen.asBool, io.dma_dccm_wdata_lo, io.stbuf_data_any)) + dccm_wdata_hi_any := Mux(io.ld_single_ecc_error_r_ff.asBool, io.sec_data_hi_r_ff,Mux(io.dma_dccm_wen.asBool, io.dma_dccm_wdata_hi, io.stbuf_data_any)) + io.sec_data_ecc_hi_r_ff := dccm_wdata_ecc_hi_any + io.sec_data_ecc_lo_r_ff := dccm_wdata_ecc_lo_any + io.stbuf_ecc_any := dccm_wdata_ecc_lo_any + io.dma_dccm_wdata_ecc_hi := dccm_wdata_ecc_hi_any + io.dma_dccm_wdata_ecc_lo := dccm_wdata_ecc_lo_any + + io.sec_data_hi_r_ff := rvdffe(io.sec_data_hi_r, io.ld_single_ecc_error_r,clock,io.scan_mode) + io.sec_data_lo_r_ff := rvdffe(io.sec_data_lo_r, io.ld_single_ecc_error_r,clock,io.scan_mode) + +} +object eccmain extends App{ + println("Generate Verilog") + println((new chisel3.stage.ChiselStage).emitVerilog(new el2_lsu_ecc())) +} diff --git a/src/main/scala/lsu/el2_lsu_lsc_ctl.scala b/src/main/scala/lsu/el2_lsu_lsc_ctl.scala new file mode 100644 index 00000000..5504b972 --- /dev/null +++ b/src/main/scala/lsu/el2_lsu_lsc_ctl.scala @@ -0,0 +1,281 @@ +package lsu +import include._ +import lib._ +import chisel3._ +import chisel3.util._ + + +import chisel3.experimental.chiselName +@chiselName +class el2_lsu_lsc_ctl extends Module with RequireAsyncReset with el2_lib +{ + val io = IO(new Bundle{ + //val rst_l = IO(Input(1.W)) //implicit + val lsu_c1_m_clk = Input(Clock()) + val lsu_c1_r_clk = Input(Clock()) + val lsu_c2_m_clk = Input(Clock()) + val lsu_c2_r_clk = Input(Clock()) + val lsu_store_c1_m_clk = Input(Clock()) + + val lsu_ld_data_r = Input(UInt(32.W)) //DCCM data + val lsu_ld_data_corr_r = Input(UInt(32.W)) // ECC corrected data + val lsu_single_ecc_error_r = Input(UInt(1.W)) + val lsu_double_ecc_error_r = Input(UInt(1.W)) + + val lsu_ld_data_m = Input(UInt(32.W)) + val lsu_single_ecc_error_m = Input(UInt(1.W)) + val lsu_double_ecc_error_m = Input(UInt(1.W)) + + val flush_m_up = Input(UInt(1.W)) + val flush_r = Input(UInt(1.W)) + + val exu_lsu_rs1_d = Input(UInt(32.W)) // address + val exu_lsu_rs2_d = Input(UInt(32.W)) // store data + + val lsu_p = Input(new el2_lsu_pkt_t()) // lsu control packet //coming from decode + val dec_lsu_valid_raw_d = Input(UInt(1.W)) // Raw valid for address computation + val dec_lsu_offset_d = Input(UInt(12.W)) + + val picm_mask_data_m = Input(UInt(32.W)) + val bus_read_data_m = Input(UInt(32.W)) //coming from bus interface + + val lsu_result_m = Output(UInt(32.W)) + val lsu_result_corr_r = Output(UInt(32.W)) // This is the ECC corrected data going to RF + + // lsu address down the pipe + val lsu_addr_d = Output(UInt(32.W)) + val lsu_addr_m = Output(UInt(32.W)) + val lsu_addr_r = Output(UInt(32.W)) + + // lsu address down the pipe - needed to check unaligned + val end_addr_d = Output(UInt(32.W)) + val end_addr_m = Output(UInt(32.W)) + val end_addr_r = Output(UInt(32.W)) + + // store data down the pipe + val store_data_m = Output(UInt(32.W)) + + val dec_tlu_mrac_ff = Input(UInt(32.W)) // CSR read + + val lsu_exc_m = Output(UInt(1.W)) + val is_sideeffects_m = Output(UInt(1.W)) + val lsu_commit_r = Output(UInt(1.W)) + val lsu_single_ecc_error_incr = Output(UInt(1.W)) + val lsu_error_pkt_r = Output(new el2_lsu_error_pkt_t()) + + val lsu_fir_addr = Output(UInt(31.W)) //(31:1) in sv // fast interrupt address TBD + val lsu_fir_error = Output(UInt(2.W)) // Error during fast interrupt lookup TBD + + // address in dccm/pic/external per pipe stage + val addr_in_dccm_d = Output(UInt(1.W)) + val addr_in_dccm_m = Output(UInt(1.W)) + val addr_in_dccm_r = Output(UInt(1.W)) + + val addr_in_pic_d = Output(UInt(1.W)) + val addr_in_pic_m = Output(UInt(1.W)) + val addr_in_pic_r = Output(UInt(1.W)) + + val addr_external_m = Output(UInt(1.W)) + + // DMA slave + val dma_dccm_req = Input(UInt(1.W)) + val dma_mem_addr = Input(UInt(32.W)) + val dma_mem_sz = Input(UInt(3.W)) + val dma_mem_write = Input(UInt(1.W)) + val dma_mem_wdata = Input(UInt(64.W)) + + // Store buffer related signals + val lsu_pkt_d = Output(new el2_lsu_pkt_t()) + val lsu_pkt_m = Output(new el2_lsu_pkt_t()) + val lsu_pkt_r = Output(new el2_lsu_pkt_t()) + + val scan_mode = Input(UInt(1.W)) + }) + + + val dma_pkt_d = Wire(new el2_lsu_pkt_t()) + val lsu_pkt_m_in = Wire(new el2_lsu_pkt_t()) + val lsu_pkt_r_in = Wire(new el2_lsu_pkt_t()) + val lsu_error_pkt_m = Wire(new el2_lsu_error_pkt_t()) + + val lsu_rs1_d = Mux(io.dec_lsu_valid_raw_d.asBool,io.exu_lsu_rs1_d,io.dma_mem_addr) + val lsu_offset_d = io.dec_lsu_offset_d(11,0) & Fill(12,io.dec_lsu_valid_raw_d) + val rs1_d_raw = lsu_rs1_d + val offset_d = lsu_offset_d + val rs1_d = Mux(io.lsu_pkt_d.load_ldst_bypass_d.asBool,io.lsu_result_m,rs1_d_raw) + + // generate the ls address + val full_addr_d = rvlsadder(rs1_d,offset_d) + + val addr_offset_d = ((Fill(3,io.lsu_pkt_d.half)) & 1.U(3.W)) | + ((Fill(3,io.lsu_pkt_d.word)) & 3.U(3.W)) | + ((Fill(3,io.lsu_pkt_d.dword)) & 7.U(3.W)) + + val end_addr_offset_d = Cat(offset_d(11),offset_d(11,0)) + Cat(Fill(9,0.U),addr_offset_d(2,0)) + val full_end_addr_d = rs1_d(31,0) + Cat(Fill(19,end_addr_offset_d(12)),end_addr_offset_d(12,0)) + io.end_addr_d := full_end_addr_d + + //optimize with bulk operator + val addrcheck = Module(new el2_lsu_addrcheck()) + + addrcheck.io.lsu_c2_m_clk := io.lsu_c2_m_clk + //val rst_l = IO(Input(1.W)) //implicit + addrcheck.io.start_addr_d := full_addr_d + addrcheck.io.end_addr_d := full_end_addr_d + addrcheck.io.lsu_pkt_d := io.lsu_pkt_d + addrcheck.io.dec_tlu_mrac_ff := io.dec_tlu_mrac_ff + addrcheck.io.rs1_region_d := rs1_d(31,28) + addrcheck.io.rs1_d := rs1_d + io.is_sideeffects_m := addrcheck.io.is_sideeffects_m + io.addr_in_dccm_d := addrcheck.io.addr_in_dccm_d + io.addr_in_pic_d := addrcheck.io.addr_in_pic_d + val addr_external_d = addrcheck.io.addr_external_d + val access_fault_d = addrcheck.io.access_fault_d + val misaligned_fault_d = addrcheck.io.misaligned_fault_d + val exc_mscause_d = addrcheck.io.exc_mscause_d + val fir_dccm_access_error_d = addrcheck.io.fir_dccm_access_error_d + val fir_nondccm_access_error_d = addrcheck.io.fir_nondccm_access_error_d + addrcheck.io.scan_mode := io.scan_mode + + + val exc_mscause_r = WireInit(0.U(4.W)) + val fir_dccm_access_error_r = WireInit(0.U(1.W)) + val fir_nondccm_access_error_r = WireInit(0.U(1.W)) + val access_fault_r = WireInit(0.U(1.W)) + val misaligned_fault_r = WireInit(0.U(1.W)) + val lsu_fir_error_m = WireInit(0.U(2.W)) + val fir_dccm_access_error_m = WireInit(0.U(1.W)) + val fir_nondccm_access_error_m = WireInit(0.U(1.W)) + + val access_fault_m = withClock(io.lsu_c1_m_clk){RegNext(access_fault_d,0.U)} + val misaligned_fault_m = withClock(io.lsu_c1_m_clk){RegNext(misaligned_fault_d,0.U)} + val exc_mscause_m = withClock(io.lsu_c1_m_clk){RegNext(exc_mscause_d,0.U)} + fir_dccm_access_error_m := withClock(io.lsu_c1_m_clk){RegNext(fir_dccm_access_error_d,0.U)} + fir_nondccm_access_error_m := withClock(io.lsu_c1_m_clk){RegNext(fir_nondccm_access_error_d,0.U)} + + io.lsu_exc_m := access_fault_m | misaligned_fault_m + io.lsu_single_ecc_error_incr := (io.lsu_single_ecc_error_r & !io.lsu_double_ecc_error_r) & (io.lsu_commit_r | io.lsu_pkt_r.dma) & io.lsu_pkt_r.valid + + if (LOAD_TO_USE_PLUS1 == 1){ + // Generate exception packet + io.lsu_error_pkt_r.exc_valid := (access_fault_r | misaligned_fault_r | io.lsu_double_ecc_error_r) & io.lsu_pkt_r.valid & !io.lsu_pkt_r.dma & !io.lsu_pkt_r.fast_int //TBD(lsu_pkt_r.fast_int) + io.lsu_error_pkt_r.single_ecc_error := io.lsu_single_ecc_error_r & !io.lsu_error_pkt_r.exc_valid & !io.lsu_pkt_r.dma + io.lsu_error_pkt_r.inst_type := io.lsu_pkt_r.store + io.lsu_error_pkt_r.exc_type := ~misaligned_fault_r + io.lsu_error_pkt_r.mscause := Mux((io.lsu_double_ecc_error_r & !misaligned_fault_r & !access_fault_r).asBool,1.U(4.W), exc_mscause_r(3,0)) + io.lsu_error_pkt_r.addr := io.lsu_addr_r(31,0)//lsu_addr_d->lsu_full_addr + io.lsu_fir_error := Mux(fir_nondccm_access_error_r.asBool,3.U(2.W), Mux(fir_dccm_access_error_r.asBool,2.U(2.W), Mux((io.lsu_pkt_r.fast_int & io.lsu_double_ecc_error_r).asBool,1.U(2.W),0.U(2.W)))) + + access_fault_r := withClock(io.lsu_c1_r_clk){RegNext(access_fault_m,0.U)} + exc_mscause_r := withClock(io.lsu_c1_r_clk){RegNext(exc_mscause_m,0.U)} + fir_dccm_access_error_r := withClock(io.lsu_c1_r_clk){RegNext(fir_dccm_access_error_m,0.U)} + fir_nondccm_access_error_r := withClock(io.lsu_c1_r_clk){RegNext(fir_nondccm_access_error_m,0.U)} + misaligned_fault_r := withClock(io.lsu_c1_r_clk){RegNext(misaligned_fault_m,0.U)} + } + + else //L2U_Plus1_0 + { + // Generate exception packet + lsu_error_pkt_m.exc_valid := (access_fault_m | misaligned_fault_m | io.lsu_double_ecc_error_m) & io.lsu_pkt_m.valid & !io.lsu_pkt_m.dma & !io.lsu_pkt_m.fast_int & !io.flush_m_up //TBD(lsu_pkt_r.fast_int) + lsu_error_pkt_m.single_ecc_error := io.lsu_single_ecc_error_m & !lsu_error_pkt_m.exc_valid & !io.lsu_pkt_m.dma + lsu_error_pkt_m.inst_type := io.lsu_pkt_m.store + lsu_error_pkt_m.exc_type := ~misaligned_fault_m + lsu_error_pkt_m.mscause := Mux(((io.lsu_double_ecc_error_m & !misaligned_fault_m & !access_fault_m)===1.U),1.U(4.W), exc_mscause_m(3,0)) + lsu_error_pkt_m.addr := io.lsu_addr_m(31,0)//lsu_addr_d->lsu_full_addr + lsu_fir_error_m := Mux(fir_nondccm_access_error_m.asBool,3.U(2.W), Mux(fir_dccm_access_error_m.asBool,2.U(2.W), Mux((io.lsu_pkt_m.fast_int & io.lsu_double_ecc_error_m).asBool,1.U(2.W),0.U(2.W)))) + io.lsu_error_pkt_r := withClock(io.lsu_c2_r_clk){RegNext(lsu_error_pkt_m,0.U.asTypeOf(lsu_error_pkt_m.cloneType))} + io.lsu_fir_error := withClock(io.lsu_c2_r_clk){RegNext(lsu_fir_error_m,0.U)} + } + dma_pkt_d.unsign := 0.U + dma_pkt_d.fast_int := 0.U + dma_pkt_d.valid := io.dma_dccm_req + dma_pkt_d.dma := 1.U + dma_pkt_d.store := io.dma_mem_write + dma_pkt_d.load := ~io.dma_mem_write + dma_pkt_d.by := (io.dma_mem_sz(2,0) === 0.U(3.W)) + dma_pkt_d.half := (io.dma_mem_sz(2,0) === 1.U(3.W)) + dma_pkt_d.word := (io.dma_mem_sz(2,0) === 2.U(3.W)) + dma_pkt_d.dword := (io.dma_mem_sz(2,0) === 3.U(3.W)) + dma_pkt_d.store_data_bypass_d := 0.U + dma_pkt_d.load_ldst_bypass_d := 0.U + dma_pkt_d.store_data_bypass_m := 0.U + + val lsu_ld_datafn_r = WireInit(0.U(32.W)) + val lsu_ld_datafn_corr_r = WireInit(0.U(32.W)) + val lsu_ld_datafn_m = WireInit(0.U(32.W)) + + io.lsu_pkt_d := Mux(io.dec_lsu_valid_raw_d.asBool,io.lsu_p,dma_pkt_d) + lsu_pkt_m_in := io.lsu_pkt_d + lsu_pkt_r_in := io.lsu_pkt_m + + io.lsu_pkt_d.valid := (io.lsu_p.valid & !(io.flush_m_up & !io.lsu_p.fast_int)) | io.dma_dccm_req + lsu_pkt_m_in.valid := io.lsu_pkt_d.valid & !(io.flush_m_up & !io.lsu_pkt_d.dma) + lsu_pkt_r_in.valid := io.lsu_pkt_m.valid & !(io.flush_m_up & !io.lsu_pkt_m.dma) + + io.lsu_pkt_m := withClock(io.lsu_c1_m_clk){RegNext(lsu_pkt_m_in,0.U.asTypeOf(lsu_pkt_m_in.cloneType))} + io.lsu_pkt_r := withClock(io.lsu_c1_r_clk){RegNext(lsu_pkt_r_in,0.U.asTypeOf(lsu_pkt_r_in.cloneType))} + io.lsu_pkt_m.valid := withClock(io.lsu_c2_m_clk){RegNext(lsu_pkt_m_in.valid,0.U)} + io.lsu_pkt_r.valid := withClock(io.lsu_c2_r_clk){RegNext(lsu_pkt_r_in.valid,0.U)} + + val dma_mem_wdata_shifted = io.dma_mem_wdata(63,0) >> Cat(io.dma_mem_addr(2,0), 0.U(3.W)) // Shift the dma data to lower bits to make it consistent to lsu stores + val store_data_d = Mux(io.dma_dccm_req.asBool,dma_mem_wdata_shifted(31,0),io.exu_lsu_rs2_d(31,0)) // Write to PIC still happens in r stage + val store_data_m_in = Mux(io.lsu_pkt_d.store_data_bypass_d.asBool,io.lsu_result_m(31,0),store_data_d(31,0)) + + val store_data_pre_m = withClock(io.lsu_store_c1_m_clk){RegNext(store_data_m_in,0.U)} + io.lsu_addr_m := withClock(io.lsu_c1_m_clk){RegNext(io.lsu_addr_d,0.U)} + io.lsu_addr_r := withClock(io.lsu_c1_r_clk){RegNext(io.lsu_addr_m,0.U)} + io.end_addr_m := withClock(io.lsu_c1_m_clk){RegNext(io.end_addr_d,0.U)} + io.end_addr_r := withClock(io.lsu_c1_r_clk){RegNext(io.end_addr_m,0.U)} + io.addr_in_dccm_m := withClock(io.lsu_c1_m_clk){RegNext(io.addr_in_dccm_d,0.U)} + io.addr_in_dccm_r := withClock(io.lsu_c1_r_clk){RegNext(io.addr_in_dccm_m,0.U)} + io.addr_in_pic_m := withClock(io.lsu_c1_m_clk){RegNext(io.addr_in_pic_d,0.U)} + io.addr_in_pic_r := withClock(io.lsu_c1_r_clk){RegNext(io.addr_in_pic_m,0.U)} + io.addr_external_m := withClock(io.lsu_c1_m_clk){RegNext(addr_external_d,0.U)} + val addr_external_r = withClock(io.lsu_c1_r_clk){RegNext(io.addr_external_m,0.U)} + val bus_read_data_r = withClock(io.lsu_c1_r_clk){RegNext(io.bus_read_data_m,0.U)} + // Fast interrupt address + io.lsu_fir_addr := io.lsu_ld_data_corr_r(31,1) //original (31,1) TBD + // absence load/store all 0's + io.lsu_addr_d := full_addr_d + // Interrupt as a flush source allows the WB to occur + io.lsu_commit_r := io.lsu_pkt_r.valid & (io.lsu_pkt_r.store | io.lsu_pkt_r.load) & !io.flush_r & !io.lsu_pkt_r.dma + io.store_data_m := (io.picm_mask_data_m(31,0) | Fill(32,!io.addr_in_pic_m)) & Mux(io.lsu_pkt_m.store_data_bypass_m.asBool,io.lsu_result_m,store_data_pre_m) + + if (LOAD_TO_USE_PLUS1 == 1){ + //bus_read_data_r coming from bus interface, lsu_ld_data_r -> coming from dccm_ctl + lsu_ld_datafn_r := Mux(addr_external_r.asBool, bus_read_data_r,io.lsu_ld_data_r) + lsu_ld_datafn_corr_r := Mux(addr_external_r.asBool, bus_read_data_r,io.lsu_ld_data_corr_r) + // this is really R stage but don't want to make all the changes to support M,R buses + io.lsu_result_m := ((Fill(32,io.lsu_pkt_r.unsign & io.lsu_pkt_r.by)) & Cat(0.U(24.W),lsu_ld_datafn_r(7,0))) | + ((Fill(32,io.lsu_pkt_r.unsign & io.lsu_pkt_r.half)) & Cat(0.U(16.W),lsu_ld_datafn_r(15,0))) | + ((Fill(32,!io.lsu_pkt_r.unsign & io.lsu_pkt_r.by)) & Cat((Fill(24, lsu_ld_datafn_r(7))) ,lsu_ld_datafn_r(7,0))) | + ((Fill(32,!io.lsu_pkt_r.unsign & io.lsu_pkt_r.half)) & Cat((Fill(16,lsu_ld_datafn_r(15))) ,lsu_ld_datafn_r(15,0))) | + ((Fill(32,io.lsu_pkt_r.word)) & lsu_ld_datafn_r(31,0)) + // this signal is used for gpr update + io.lsu_result_corr_r := ((Fill(32,io.lsu_pkt_r.unsign & io.lsu_pkt_r.by)) & Cat(0.U(24.W),lsu_ld_datafn_corr_r(7,0))) | + ((Fill(32,io.lsu_pkt_r.unsign & io.lsu_pkt_r.half)) & Cat(0.U(16.W),lsu_ld_datafn_corr_r(15,0))) | + ((Fill(32,!io.lsu_pkt_r.unsign & io.lsu_pkt_r.by)) & Cat((Fill(24, lsu_ld_datafn_corr_r(7))) ,lsu_ld_datafn_corr_r(7,0))) | + ((Fill(32,!io.lsu_pkt_r.unsign & io.lsu_pkt_r.half)) & Cat((Fill(16,lsu_ld_datafn_corr_r(15))) ,lsu_ld_datafn_corr_r(15,0))) | + ((Fill(32,io.lsu_pkt_r.word)) & lsu_ld_datafn_corr_r(31,0)) + } + + else { + lsu_ld_datafn_m := Mux(io.addr_external_m.asBool, io.bus_read_data_m,io.lsu_ld_data_m) + lsu_ld_datafn_corr_r := Mux(addr_external_r===1.U, bus_read_data_r,io.lsu_ld_data_corr_r) + io.lsu_result_m := ((Fill(32,io.lsu_pkt_m.unsign & io.lsu_pkt_m.by)) & Cat(0.U(24.W),lsu_ld_datafn_m(7,0))) | + ((Fill(32,io.lsu_pkt_m.unsign & io.lsu_pkt_m.half)) & Cat(0.U(16.W),lsu_ld_datafn_m(15,0))) | + ((Fill(32,!io.lsu_pkt_m.unsign & io.lsu_pkt_m.by)) & Cat((Fill(24, lsu_ld_datafn_m(7))) ,lsu_ld_datafn_m(7,0))) | + ((Fill(32,!io.lsu_pkt_m.unsign & io.lsu_pkt_m.half)) & Cat((Fill(16,lsu_ld_datafn_m(15))) ,lsu_ld_datafn_m(15,0))) | + ((Fill(32,io.lsu_pkt_m.word)) & lsu_ld_datafn_m(31,0)) + io.lsu_result_corr_r := ((Fill(32,io.lsu_pkt_r.unsign & io.lsu_pkt_r.by)) & Cat(0.U(24.W),lsu_ld_datafn_corr_r(7,0))) | + ((Fill(32,io.lsu_pkt_r.unsign & io.lsu_pkt_r.half)) & Cat(0.U(16.W),lsu_ld_datafn_corr_r(15,0))) | + ((Fill(32,!io.lsu_pkt_r.unsign & io.lsu_pkt_r.by)) & Cat((Fill(24, lsu_ld_datafn_corr_r(7))) ,lsu_ld_datafn_corr_r(7,0))) | + ((Fill(32,!io.lsu_pkt_r.unsign & io.lsu_pkt_r.half)) & Cat((Fill(16,lsu_ld_datafn_corr_r(15))) ,lsu_ld_datafn_corr_r(15,0))) | + ((Fill(32,io.lsu_pkt_r.word)) & lsu_ld_datafn_corr_r(31,0)) + } +} + +object lsu_lsc_ctl extends App{ + println("Generate Verilog") + println((new chisel3.stage.ChiselStage).emitVerilog(new el2_lsu_lsc_ctl())) +} diff --git a/src/main/scala/lsu/el2_lsu_stbuf.scala b/src/main/scala/lsu/el2_lsu_stbuf.scala new file mode 100644 index 00000000..bb3710ab --- /dev/null +++ b/src/main/scala/lsu/el2_lsu_stbuf.scala @@ -0,0 +1,280 @@ +package lsu +import lib._ +import chisel3._ +import chisel3.experimental.chiselName +import chisel3.util._ +import include._ + +@chiselName +class el2_lsu_stbuf extends Module with el2_lib with RequireAsyncReset { + val io = IO (new Bundle { + val lsu_c1_m_clk = Input(Clock()) + val lsu_c1_r_clk = Input(Clock()) + val lsu_stbuf_c1_clk = Input(Clock()) + val lsu_free_c2_clk = Input(Clock()) + val lsu_pkt_m = Input(new el2_lsu_pkt_t) + val lsu_pkt_r = Input(new el2_lsu_pkt_t) + val store_stbuf_reqvld_r = Input(Bool()) + val lsu_commit_r = Input(Bool()) + val dec_lsu_valid_raw_d = Input(Bool()) + val store_data_hi_r = Input(UInt(DCCM_DATA_WIDTH.W)) + val store_data_lo_r = Input(UInt(DCCM_DATA_WIDTH.W)) + val store_datafn_hi_r = Input(UInt(DCCM_DATA_WIDTH.W)) + val store_datafn_lo_r = Input(UInt(DCCM_DATA_WIDTH.W)) + val lsu_stbuf_commit_any = Input(Bool()) + val lsu_addr_d = Input(UInt(LSU_SB_BITS.W)) + val lsu_addr_m = Input(UInt(32.W)) + val lsu_addr_r = Input(UInt(32.W)) + val end_addr_d = Input(UInt(LSU_SB_BITS.W)) + val end_addr_m = Input(UInt(32.W)) + val end_addr_r = Input(UInt(32.W)) + + val addr_in_dccm_m = Input(Bool()) + val addr_in_dccm_r = Input(Bool()) + val lsu_cmpen_m = Input(Bool()) + val scan_mode = Input(Bool()) + + //Outputs + val stbuf_reqvld_any = Output(Bool()) + val stbuf_reqvld_flushed_any = Output(Bool()) + val stbuf_addr_any = Output(UInt(LSU_SB_BITS.W)) + val stbuf_data_any = Output(UInt(DCCM_DATA_WIDTH.W)) + val lsu_stbuf_full_any = Output(Bool()) + val lsu_stbuf_empty_any = Output(Bool()) + val ldst_stbuf_reqvld_r = Output(Bool()) + val stbuf_fwddata_hi_m = Output(UInt(DCCM_DATA_WIDTH.W)) + val stbuf_fwddata_lo_m = Output(UInt(DCCM_DATA_WIDTH.W)) + val stbuf_fwdbyteen_hi_m = Output(UInt(DCCM_BYTE_WIDTH.W)) + val stbuf_fwdbyteen_lo_m = Output(UInt(DCCM_BYTE_WIDTH.W)) + // val testout = Output(Vec(LSU_STBUF_DEPTH, UInt(8.W))) + }) + + io.stbuf_reqvld_any := 0.U + io.stbuf_reqvld_flushed_any := 0.U + io.stbuf_addr_any := 0.U + io.stbuf_data_any := 0.U + io.lsu_stbuf_full_any := 0.U + io.lsu_stbuf_empty_any := 0.U + io.ldst_stbuf_reqvld_r := 0.U + io.stbuf_fwddata_hi_m := 0.U + io.stbuf_fwddata_lo_m := 0.U + io.stbuf_fwdbyteen_hi_m := 0.U + io.stbuf_fwdbyteen_lo_m := 0.U + + + val stbuf_vld = WireInit(UInt(LSU_STBUF_DEPTH.W), init = 0.U) + val stbuf_wr_en = WireInit(UInt(LSU_STBUF_DEPTH.W), init = 0.U) + val stbuf_dma_kill_en = WireInit(UInt(LSU_STBUF_DEPTH.W), init = 0.U) + val stbuf_dma_kill = WireInit(UInt(LSU_STBUF_DEPTH.W), init = 0.U) + val stbuf_reset = WireInit(UInt(LSU_STBUF_DEPTH.W), init = 0.U) + val store_byteen_ext_r = WireInit(UInt(8.W), init= 0.U) + val stbuf_addr = Wire(Vec(LSU_STBUF_DEPTH,UInt(LSU_SB_BITS.W))) + stbuf_addr := (0 until LSU_STBUF_DEPTH).map(i => 0.U) + val stbuf_byteen = Wire(Vec(LSU_STBUF_DEPTH,UInt(DCCM_BYTE_WIDTH.W))) + stbuf_byteen := (0 until LSU_STBUF_DEPTH).map(i => 0.U) + val stbuf_data = Wire(Vec(LSU_STBUF_DEPTH,UInt(DCCM_DATA_WIDTH.W))) + stbuf_data := (0 until LSU_STBUF_DEPTH).map(i => 0.U) + val stbuf_addrin = Wire(Vec(LSU_STBUF_DEPTH,UInt(LSU_SB_BITS.W))) + stbuf_addrin := (0 until LSU_STBUF_DEPTH).map(i => 0.U) + val stbuf_datain = Wire(Vec(LSU_STBUF_DEPTH,UInt(DCCM_DATA_WIDTH.W))) + stbuf_datain := (0 until LSU_STBUF_DEPTH).map(i => 0.U) + val stbuf_byteenin = Wire(Vec(LSU_STBUF_DEPTH,UInt(DCCM_BYTE_WIDTH.W))) + stbuf_byteenin := (0 until LSU_STBUF_DEPTH).map(i => 0.U) + val WrPtr = WireInit(UInt(log2Ceil(LSU_STBUF_DEPTH).W),init = 0.U) + val RdPtr = WireInit(UInt(log2Ceil(LSU_STBUF_DEPTH).W),init = 0.U) + val ldst_dual_m = WireInit(Bool(),init = 0.U) + val ldst_dual_r = WireInit(Bool(),init = 0.U) + val cmpaddr_hi_m = WireInit(0.U(16.W)) + val stbuf_specvld_m = WireInit(0.U(2.W)) + val stbuf_specvld_r = WireInit(0.U(2.W)) + val cmpaddr_lo_m = WireInit(0.U(16.W)) + val stbuf_fwdata_hi_pre_m = WireInit(UInt(DCCM_DATA_WIDTH.W),init = 0.U) + val stbuf_fwdata_lo_pre_m = WireInit(UInt(DCCM_DATA_WIDTH.W),init = 0.U) + val ld_byte_rhit_lo_lo = WireInit(UInt(DCCM_BYTE_WIDTH.W),init = 0.U) + val ld_byte_rhit_hi_lo = WireInit(UInt(DCCM_BYTE_WIDTH.W),init = 0.U) + val ld_byte_rhit_lo_hi = WireInit(UInt(DCCM_BYTE_WIDTH.W),init = 0.U) + val ld_byte_rhit_hi_hi = WireInit(UInt(DCCM_BYTE_WIDTH.W),init = 0.U) + val ld_byte_hit_lo = WireInit(UInt(DCCM_BYTE_WIDTH.W),init = 0.U) + val ld_byte_rhit_lo = WireInit(UInt(DCCM_BYTE_WIDTH.W),init = 0.U) + val ld_byte_hit_hi = WireInit(UInt(DCCM_BYTE_WIDTH.W),init = 0.U) + val ld_byte_rhit_hi = WireInit(UInt(DCCM_BYTE_WIDTH.W),init = 0.U) + val ldst_byteen_ext_r = WireInit(UInt(8.W),init = 0.U) + val ld_fwddata_rpipe_lo = WireInit(UInt(32.W),init = 0.U) + val ld_fwddata_rpipe_hi = WireInit(UInt(32.W),init = 0.U) + + // + val datain1 = Wire(Vec(LSU_STBUF_DEPTH,UInt(8.W))) + val datain2 = Wire(Vec(LSU_STBUF_DEPTH,UInt(8.W))) + val datain3 = Wire(Vec(LSU_STBUF_DEPTH,UInt(8.W))) + val datain4 = Wire(Vec(LSU_STBUF_DEPTH,UInt(8.W))) + + //////////////////////////////////////Code Start here/////////////////////////////// + val ldst_byteen_r = Mux1H(Seq( + io.lsu_pkt_r.by.asBool -> "b00000001".U, + io.lsu_pkt_r.half.asBool ->"b00000011".U, + io.lsu_pkt_r.word.asBool -> "b00001111".U, + io.lsu_pkt_r.dword.asBool -> "b11111111".U + )) + val ldst_dual_d = io.lsu_addr_d (2) =/= io.end_addr_d(2) + val dual_stbuf_write_r = ldst_dual_r & io.store_stbuf_reqvld_r + + store_byteen_ext_r := ldst_byteen_r << io.lsu_addr_r(1,0) + val store_byteen_hi_r = store_byteen_ext_r (7,4) & Fill(4, io.lsu_pkt_r.store) + val store_byteen_lo_r = store_byteen_ext_r (3,0) & Fill(4, io.lsu_pkt_r.store) + + val RdPtrPlus1 = RdPtr + "b01".U + val WrPtrPlus1 = WrPtr + "b01".U + val WrPtrPlus2 = WrPtr + "b10".U + + io.ldst_stbuf_reqvld_r := io.lsu_commit_r & io.store_stbuf_reqvld_r + + val store_matchvec_lo_r = (0 until LSU_STBUF_DEPTH).map(i=> (stbuf_addr(i)(LSU_SB_BITS-1,log2Ceil(DCCM_BYTE_WIDTH)) === io.lsu_addr_r(LSU_SB_BITS-1,log2Ceil(DCCM_BYTE_WIDTH)) & stbuf_vld(i) & !stbuf_dma_kill(i) & !stbuf_reset(i)).asUInt).reverse.reduce(Cat(_,_)) + val store_matchvec_hi_r = (0 until LSU_STBUF_DEPTH).map(i=> (stbuf_addr(i)(LSU_SB_BITS-1,log2Ceil(DCCM_BYTE_WIDTH)) === io.end_addr_r(LSU_SB_BITS-1,log2Ceil(DCCM_BYTE_WIDTH)) & stbuf_vld(i) & !stbuf_dma_kill(i) & dual_stbuf_write_r & !stbuf_reset(i)).asUInt).reverse.reduce(Cat(_,_)) + + val store_coalesce_lo_r = store_matchvec_lo_r.orR + val store_coalesce_hi_r = store_matchvec_hi_r.orR + + stbuf_wr_en := (0 until LSU_STBUF_DEPTH).map(i=> (io.ldst_stbuf_reqvld_r & ( + ((i.asUInt === WrPtr) & !store_coalesce_lo_r) | + ((i.asUInt === WrPtr) & dual_stbuf_write_r & !store_coalesce_hi_r) | + ((i.asUInt === WrPtrPlus1) & dual_stbuf_write_r & !(store_coalesce_lo_r | store_coalesce_hi_r)) | + store_matchvec_lo_r(i) | store_matchvec_hi_r(i))).asUInt).reverse.reduce(Cat(_,_)) + stbuf_reset := (0 until LSU_STBUF_DEPTH).map(i=> ((io.lsu_stbuf_commit_any | io.stbuf_reqvld_flushed_any) & (i.asUInt === RdPtr).asBool).asUInt).reverse.reduce(Cat(_,_)) + val sel_lo = (0 until LSU_STBUF_DEPTH).map(i=> (((!ldst_dual_r | io.store_stbuf_reqvld_r) & (i.asUInt === WrPtr).asBool & !store_coalesce_lo_r) | store_matchvec_lo_r(i)).asUInt).reverse.reduce(Cat(_,_)) + + stbuf_addrin := (0 until LSU_STBUF_DEPTH).map(i=> Mux(sel_lo(i), io.lsu_addr_r(LSU_SB_BITS-1,0), io.end_addr_r(LSU_SB_BITS-1,0))) + stbuf_byteenin := (0 until LSU_STBUF_DEPTH).map(i=> Mux(sel_lo(i), stbuf_byteen(i) | store_byteen_lo_r, stbuf_byteen(i) | store_byteen_hi_r).asUInt) + + datain1 := (0 until LSU_STBUF_DEPTH).map(i=> Mux(sel_lo(i), Mux(!stbuf_byteen(i)(0) | store_byteen_lo_r(0), io.store_datafn_lo_r(7, 0), stbuf_data(i)(7, 0)), + Mux(!stbuf_byteen(i)(0) | store_byteen_hi_r(0), io.store_datafn_hi_r(7, 0), stbuf_data(i)(7, 0))).asUInt) + + datain2 := (0 until LSU_STBUF_DEPTH).map(i=> Mux(sel_lo(i), Mux(!stbuf_byteen(i)(1) | store_byteen_lo_r(1), io.store_datafn_lo_r(15, 8), stbuf_data(i)(15, 8)), + Mux(!stbuf_byteen(i)(1) | store_byteen_hi_r(1), io.store_datafn_hi_r(15, 8), stbuf_data(i)(15, 8))).asUInt) + + datain3 := (0 until LSU_STBUF_DEPTH).map(i=> Mux(sel_lo(i), Mux(!stbuf_byteen(i)(2) | store_byteen_lo_r(2), io.store_datafn_lo_r(23, 16), stbuf_data(i)(23, 16)), + Mux(!stbuf_byteen(i)(2) | store_byteen_hi_r(2), io.store_datafn_hi_r(23, 16), stbuf_data(i)(23, 16))).asUInt) + + datain4 := (0 until LSU_STBUF_DEPTH).map(i=> Mux(sel_lo(i), Mux(!stbuf_byteen(i)(3) | store_byteen_lo_r(3), io.store_datafn_lo_r(31, 24), stbuf_data(i)(31, 24)), + Mux(!stbuf_byteen(i)(3) | store_byteen_hi_r(3), io.store_datafn_hi_r(31, 24), stbuf_data(i)(31, 24))).asUInt) + + stbuf_datain := (0 until LSU_STBUF_DEPTH).map(i=>Cat(datain4(i), datain3(i), datain2(i), datain1(i))) + // io.testout := datain3 + + // for (i<- 0 until LSU_STBUF_DEPTH) { + stbuf_vld := (0 until LSU_STBUF_DEPTH).map(i=> withClock(io.lsu_free_c2_clk){ RegNext(Mux(stbuf_wr_en(i).asBool(),1.U ,stbuf_vld(i)) & !stbuf_reset(i), 0.U)}).reverse.reduce(Cat(_,_)) + // stbuf_addr := (0 until LSU_STBUF_DEPTH).map(i=> RegEnable(stbuf_addrin(i), 0.U, stbuf_wr_en(i).asBool())).reverse.reduce(Cat(_,_)) + stbuf_dma_kill := (0 until LSU_STBUF_DEPTH).map(i=> withClock(io.lsu_free_c2_clk){RegNext(Mux(stbuf_dma_kill_en(i).asBool,1.U ,stbuf_dma_kill(i)) & !stbuf_reset(i), 0.U)}).reverse.reduce(Cat(_,_)) + stbuf_byteen := (0 until LSU_STBUF_DEPTH).map(i=> withClock(io.lsu_stbuf_c1_clk){ RegNext(Mux(stbuf_wr_en(i).asBool(),stbuf_byteenin(i) , stbuf_byteen(i)) & Fill(stbuf_byteenin(i).getWidth , !stbuf_reset(i)), 0.U)}) + //stbuf_data := (0 until LSU_STBUF_DEPTH).map(i=> RegEnable(stbuf_datain(i), 0.U, stbuf_wr_en(i).asBool())).reverse.reduce(Cat(_,_)) + for (i<- 0 until LSU_STBUF_DEPTH) { + // withClock(io.lsu_free_c2_clk){ stbuf_dma_kill(i) := RegEnable(1.U & !stbuf_reset(i), 0.U, stbuf_dma_kill_en(i).asBool)} + + stbuf_addr(i) := rvdffe(stbuf_addrin(i),stbuf_wr_en(i).asBool(),clock,io.scan_mode) + // withClock(io.lsu_stbuf_c1_clk){ stbuf_byteen(i) := RegNext( stbuf_byteenin(i) & Fill(stbuf_byteenin(i).getWidth, !stbuf_reset(i)), 0.U, stbuf_wr_en(i).asBool())} + stbuf_data(i) := rvdffe(stbuf_datain(i),stbuf_wr_en(i).asBool(),clock,io.scan_mode) + } + withClock(io.lsu_c1_m_clk){ldst_dual_m := RegNext(ldst_dual_d,0.U)} + withClock(io.lsu_c1_r_clk){ldst_dual_r := RegNext(ldst_dual_m,0.U)} + + // Store Buffer drain logic + io.stbuf_reqvld_flushed_any := stbuf_vld(RdPtr) & stbuf_dma_kill(RdPtr) + io.stbuf_reqvld_any := stbuf_vld(RdPtr) & !stbuf_dma_kill(RdPtr) & !(stbuf_dma_kill_en.orR) + io.stbuf_addr_any := stbuf_addr(RdPtr) + io.stbuf_data_any := stbuf_data(RdPtr) + + val WrPtrEn = ((io.ldst_stbuf_reqvld_r & !dual_stbuf_write_r & !(store_coalesce_hi_r | store_coalesce_lo_r)) | + (io.ldst_stbuf_reqvld_r & dual_stbuf_write_r & !(store_coalesce_hi_r & store_coalesce_lo_r))).asBool + val NxtWrPtr = Mux((io.ldst_stbuf_reqvld_r & dual_stbuf_write_r & !(store_coalesce_hi_r | store_coalesce_lo_r)).asBool, WrPtrPlus2, WrPtrPlus1) + val RdPtrEn = io.lsu_stbuf_commit_any | io.stbuf_reqvld_flushed_any + val NxtRdPtr = RdPtrPlus1 + + withClock(io.lsu_stbuf_c1_clk){ WrPtr := RegEnable(NxtWrPtr, 0.U, WrPtrEn)} + withClock(io.lsu_stbuf_c1_clk){ RdPtr := RegEnable(NxtRdPtr, 0.U, RdPtrEn)} + + val stbuf_numvld_any = VecInit.tabulate(LSU_STBUF_DEPTH)(i=>Cat(0.U(3.W), stbuf_vld(i))).reduce (_+_) + val isdccmst_m = io.lsu_pkt_m.valid & io.lsu_pkt_m.store & io.addr_in_dccm_m & !io.lsu_pkt_m.dma + val isdccmst_r = io.lsu_pkt_r.valid & io.lsu_pkt_r.store & io.addr_in_dccm_r & !io.lsu_pkt_r.dma + + stbuf_specvld_m := Cat(0.U(1.W),isdccmst_m) << (isdccmst_m & ldst_dual_m) + stbuf_specvld_r := Cat(0.U(1.W),isdccmst_r) << (isdccmst_r & ldst_dual_r) + val stbuf_specvld_any = stbuf_numvld_any + Cat(0.U(2.W), stbuf_specvld_m) + Cat(0.U(2.W), stbuf_specvld_r) + + io.lsu_stbuf_full_any := Mux((!ldst_dual_d & io.dec_lsu_valid_raw_d).asBool,(stbuf_specvld_any >= LSU_STBUF_DEPTH.U),(stbuf_specvld_any >= (LSU_STBUF_DEPTH-1).U)) + io.lsu_stbuf_empty_any := stbuf_numvld_any === 0.U + + val cmpen_hi_m = io.lsu_cmpen_m & ldst_dual_m + cmpaddr_hi_m := io.end_addr_m(LSU_SB_BITS-1,log2Ceil(DCCM_BYTE_WIDTH)) + + val cmpen_lo_m = io.lsu_cmpen_m + cmpaddr_lo_m := io.lsu_addr_m(LSU_SB_BITS-1,log2Ceil(DCCM_BYTE_WIDTH)) + + + val stbuf_match_hi = (0 until LSU_STBUF_DEPTH).map(i=> ((stbuf_addr(i)(LSU_SB_BITS-1,log2Ceil(DCCM_BYTE_WIDTH)) === cmpaddr_hi_m(13,0)) & stbuf_vld(i) & !stbuf_dma_kill(i) & io.addr_in_dccm_m).asUInt).reverse.reduce(Cat(_,_)) + val stbuf_match_lo = (0 until LSU_STBUF_DEPTH).map(i=> ((stbuf_addr(i)(LSU_SB_BITS-1,log2Ceil(DCCM_BYTE_WIDTH)) === cmpaddr_lo_m(13,0)) & stbuf_vld(i) & !stbuf_dma_kill(i) & io.addr_in_dccm_m).asUInt).reverse.reduce(Cat(_,_)) + stbuf_dma_kill_en := (0 until LSU_STBUF_DEPTH).map(i=> ((stbuf_match_hi(i) | stbuf_match_lo(i)) & io.lsu_pkt_m.valid & io.lsu_pkt_m.dma & io.lsu_pkt_m.store).asUInt).reverse.reduce(Cat(_,_)) + + + val stbuf_fwdbyteenvec_hi = (0 until LSU_STBUF_DEPTH).map(i=>(0 until DCCM_BYTE_WIDTH).map(j=> stbuf_match_hi(i) & stbuf_byteen(i)(j) & stbuf_vld(i).asUInt())) + val stbuf_fwdbyteenvec_lo = (0 until LSU_STBUF_DEPTH).map(i=>(0 until DCCM_BYTE_WIDTH).map(j=> stbuf_match_lo(i) & stbuf_byteen(i)(j) & stbuf_vld(i).asUInt())) + val stbuf_fwdbyteen_hi_pre_m = (0 until LSU_STBUF_DEPTH).map(j=>(0 until DCCM_BYTE_WIDTH).map(i=> stbuf_fwdbyteenvec_hi(i)(j).asUInt()).reduce(_|_)) + val stbuf_fwdbyteen_lo_pre_m = (0 until LSU_STBUF_DEPTH).map(j=>(0 until DCCM_BYTE_WIDTH).map(i=> stbuf_fwdbyteenvec_lo(i)(j).asUInt()).reduce(_|_)) + + val stbuf_fwddata_hi_pre_m = VecInit.tabulate(LSU_STBUF_DEPTH)(i=> Fill(32,stbuf_match_hi(i)) & stbuf_data(i)).reverse.reduce(_|_) + val stbuf_fwddata_lo_pre_m = VecInit.tabulate(LSU_STBUF_DEPTH)(i=> Fill(32,stbuf_match_lo(i)) & stbuf_data(i)).reverse.reduce(_|_) + + + ldst_byteen_ext_r := ldst_byteen_r << io.lsu_addr_r(1,0) + val ldst_byteen_hi_r = ldst_byteen_ext_r(7,4) + val ldst_byteen_lo_r = ldst_byteen_ext_r(3,0) + + val ld_addr_rhit_lo_lo = (io.lsu_addr_m(31,2) === io.lsu_addr_r(31,2)) & io.lsu_pkt_r.valid & io.lsu_pkt_r.store & !io.lsu_pkt_r.dma + val ld_addr_rhit_lo_hi = (io.end_addr_m(31,2) === io.lsu_addr_r(31,2)) & io.lsu_pkt_r.valid & io.lsu_pkt_r.store & !io.lsu_pkt_r.dma + val ld_addr_rhit_hi_lo = (io.lsu_addr_m(31,2) === io.end_addr_r(31,2)) & io.lsu_pkt_r.valid & io.lsu_pkt_r.store & !io.lsu_pkt_r.dma & dual_stbuf_write_r + val ld_addr_rhit_hi_hi = (io.end_addr_m(31,2) === io.end_addr_r(31,2)) & io.lsu_pkt_r.valid & io.lsu_pkt_r.store & !io.lsu_pkt_r.dma & dual_stbuf_write_r + + ld_byte_rhit_lo_lo := (0 until DCCM_BYTE_WIDTH).map(i=> (ld_addr_rhit_lo_lo & ldst_byteen_lo_r(i)).asUInt).reverse.reduce(Cat(_,_)) + ld_byte_rhit_lo_hi := (0 until DCCM_BYTE_WIDTH).map(i=> (ld_addr_rhit_lo_hi & ldst_byteen_lo_r(i)).asUInt).reverse.reduce(Cat(_,_)) + ld_byte_rhit_hi_lo := (0 until DCCM_BYTE_WIDTH).map(i=> (ld_addr_rhit_hi_lo & ldst_byteen_hi_r(i)).asUInt).reverse.reduce(Cat(_,_)) + ld_byte_rhit_hi_hi := (0 until DCCM_BYTE_WIDTH).map(i=> (ld_addr_rhit_hi_hi & ldst_byteen_hi_r(i)).asUInt).reverse.reduce(Cat(_,_)) + + ld_byte_rhit_lo := (0 until DCCM_BYTE_WIDTH).map(i=> (ld_byte_rhit_lo_lo(i) | ld_byte_rhit_hi_lo(i)).asUInt).reverse.reduce(Cat(_,_)) + ld_byte_rhit_hi := (0 until DCCM_BYTE_WIDTH).map(i=> (ld_byte_rhit_lo_hi(i) | ld_byte_rhit_hi_hi(i)).asUInt).reverse.reduce(Cat(_,_)) + + val fwdpipe1_lo = (Fill(8, ld_byte_rhit_lo_lo(0)) & io.store_data_lo_r(7,0)) | (Fill(8, ld_byte_rhit_hi_lo(0)) & io.store_data_hi_r(7,0)) + val fwdpipe2_lo = (Fill(8, ld_byte_rhit_lo_lo(1)) & io.store_data_lo_r(15,8)) | (Fill(8, ld_byte_rhit_hi_lo(1)) & io.store_data_hi_r(15,8)) + val fwdpipe3_lo = (Fill(8, ld_byte_rhit_lo_lo(2)) & io.store_data_lo_r(23,16)) | (Fill(8, ld_byte_rhit_hi_lo(2)) & io.store_data_hi_r(23,16)) + val fwdpipe4_lo = (Fill(8, ld_byte_rhit_lo_lo(3)) & io.store_data_lo_r(31,24)) | (Fill(8, ld_byte_rhit_hi_lo(3)) & io.store_data_hi_r(31,24)) + ld_fwddata_rpipe_lo := Cat(fwdpipe4_lo,fwdpipe3_lo,fwdpipe2_lo,fwdpipe1_lo) + + val fwdpipe1_hi = (Fill(8, ld_byte_rhit_lo_hi(0)) & io.store_data_lo_r(7,0)) | (Fill(8, ld_byte_rhit_hi_hi(0)) & io.store_data_hi_r(7,0)) + val fwdpipe2_hi = (Fill(8, ld_byte_rhit_lo_hi(1)) & io.store_data_lo_r(15,8)) | (Fill(8, ld_byte_rhit_hi_hi(1)) & io.store_data_hi_r(15,8)) + val fwdpipe3_hi = (Fill(8, ld_byte_rhit_lo_hi(2)) & io.store_data_lo_r(23,16)) | (Fill(8, ld_byte_rhit_hi_hi(2)) & io.store_data_hi_r(23,16)) + val fwdpipe4_hi = (Fill(8, ld_byte_rhit_lo_hi(3)) & io.store_data_lo_r(31,24)) | (Fill(8, ld_byte_rhit_hi_hi(3)) & io.store_data_hi_r(31,24)) + ld_fwddata_rpipe_hi := Cat(fwdpipe4_hi,fwdpipe3_hi,fwdpipe2_hi,fwdpipe1_hi) + + ld_byte_hit_lo := (0 until DCCM_BYTE_WIDTH).map(i=> (ld_byte_rhit_lo_lo(i) | ld_byte_rhit_hi_lo(i)).asUInt).reverse.reduce(Cat(_,_)) + ld_byte_hit_hi := (0 until DCCM_BYTE_WIDTH).map(i=> (ld_byte_rhit_lo_hi(i) | ld_byte_rhit_hi_hi(i)).asUInt).reverse.reduce(Cat(_,_)) + + io.stbuf_fwdbyteen_hi_m := (0 until DCCM_BYTE_WIDTH).map(i=> (ld_byte_hit_hi(i) | stbuf_fwdbyteen_hi_pre_m(i)).asUInt).reverse.reduce(Cat(_,_)) + io.stbuf_fwdbyteen_lo_m := (0 until DCCM_BYTE_WIDTH).map(i=> (ld_byte_hit_lo(i) | stbuf_fwdbyteen_lo_pre_m(i)).asUInt).reverse.reduce(Cat(_,_)) + + // Pipe vs Store Queue priority + val stbuf_fwdpipe1_lo = Mux(ld_byte_rhit_lo(0),ld_fwddata_rpipe_lo(7,0),stbuf_fwddata_lo_pre_m(7,0)) + val stbuf_fwdpipe2_lo = Mux(ld_byte_rhit_lo(1),ld_fwddata_rpipe_lo(15,8),stbuf_fwddata_lo_pre_m(15,8)) + val stbuf_fwdpipe3_lo = Mux(ld_byte_rhit_lo(2),ld_fwddata_rpipe_lo(23,16),stbuf_fwddata_lo_pre_m(23,16)) + val stbuf_fwdpipe4_lo = Mux(ld_byte_rhit_lo(3),ld_fwddata_rpipe_lo(31,24),stbuf_fwddata_lo_pre_m(31,24)) + io.stbuf_fwddata_lo_m := Cat(stbuf_fwdpipe4_lo,stbuf_fwdpipe3_lo,stbuf_fwdpipe2_lo,stbuf_fwdpipe1_lo) + // Pipe vs Store Queue priority + val stbuf_fwdpipe1_hi = Mux(ld_byte_rhit_hi(0),ld_fwddata_rpipe_hi(7,0),stbuf_fwddata_hi_pre_m(7,0)) + val stbuf_fwdpipe2_hi = Mux(ld_byte_rhit_hi(1),ld_fwddata_rpipe_hi(15,8),stbuf_fwddata_hi_pre_m(15,8)) + val stbuf_fwdpipe3_hi = Mux(ld_byte_rhit_hi(2),ld_fwddata_rpipe_hi(23,16),stbuf_fwddata_hi_pre_m(23,16)) + val stbuf_fwdpipe4_hi = Mux(ld_byte_rhit_hi(3),ld_fwddata_rpipe_hi(31,24),stbuf_fwddata_hi_pre_m(31,24)) + io.stbuf_fwddata_hi_m := Cat(stbuf_fwdpipe4_hi,stbuf_fwdpipe3_hi,stbuf_fwdpipe2_hi,stbuf_fwdpipe1_hi) + + + +} +object stbmain extends App{ + println("Generate Verilog") + println((new chisel3.stage.ChiselStage).emitVerilog(new el2_lsu_stbuf())) +} diff --git a/src/main/scala/lsu/el2_lsu_trigger.scala b/src/main/scala/lsu/el2_lsu_trigger.scala new file mode 100644 index 00000000..cf93b830 --- /dev/null +++ b/src/main/scala/lsu/el2_lsu_trigger.scala @@ -0,0 +1,27 @@ +package lsu +import chisel3._ +import lib._ +import chisel3.util._ +import include._ +class el2_lsu_trigger extends Module with RequireAsyncReset with el2_lib { + val io = IO(new Bundle{ + val trigger_pkt_any = Input(Vec (4,(new el2_trigger_pkt_t))) + val lsu_pkt_m = Input(new el2_lsu_pkt_t) + val lsu_addr_m = Input(UInt(32.W)) + val store_data_m = Input(UInt(32.W)) + val lsu_trigger_match_m = Output(UInt(4.W)) + + }) + + val store_data_trigger_m= Cat((Fill(16,io.lsu_pkt_m.word) & io.store_data_m(31,16)),(Fill(8,(io.lsu_pkt_m.half | io.lsu_pkt_m.word)) & io.store_data_m(15,8)), io.store_data_m(7,0)) + val lsu_match_data = (0 until 4).map(i=>Mux1H(Seq(!io.trigger_pkt_any(i).select.asBool->io.lsu_addr_m, (io.trigger_pkt_any(i).select & io.trigger_pkt_any(i).store).asBool->store_data_trigger_m))) + io.lsu_trigger_match_m := (0 until 4).map(i =>io.lsu_pkt_m.valid & !io.lsu_pkt_m.dma & ((io.trigger_pkt_any(i).store & io.lsu_pkt_m.store)| + (io.trigger_pkt_any(i).load & io.lsu_pkt_m.load & !io.trigger_pkt_any(i).select) )& + rvmaskandmatch(io.trigger_pkt_any(i).tdata2, lsu_match_data(i), io.trigger_pkt_any(i).match_.asBool())).reverse.reduce(Cat(_,_)) + +} + +object main_trigger extends App{ + println("Generate Verilog") + println((new chisel3.stage.ChiselStage).emitVerilog(new el2_lsu_trigger())) +} \ No newline at end of file diff --git a/target/scala-2.12/classes/dbg/el2_dbg.class b/target/scala-2.12/classes/dbg/el2_dbg.class index 859f58a2..0406e8d2 100644 Binary files a/target/scala-2.12/classes/dbg/el2_dbg.class and b/target/scala-2.12/classes/dbg/el2_dbg.class differ diff --git a/target/scala-2.12/classes/dec/csr_tlu.class b/target/scala-2.12/classes/dec/csr_tlu.class index a03990a7..c546a6ee 100644 Binary files a/target/scala-2.12/classes/dec/csr_tlu.class and b/target/scala-2.12/classes/dec/csr_tlu.class differ diff --git a/target/scala-2.12/classes/dec/el2_CSR_IO.class b/target/scala-2.12/classes/dec/el2_CSR_IO.class index e436ebe1..00e660a2 100644 Binary files a/target/scala-2.12/classes/dec/el2_CSR_IO.class and b/target/scala-2.12/classes/dec/el2_CSR_IO.class differ diff --git a/target/scala-2.12/classes/dec/el2_dec.class b/target/scala-2.12/classes/dec/el2_dec.class index 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