IMC miss-state update
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el2_ifu_mem_ctl.fir
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el2_ifu_mem_ctl.fir
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el2_ifu_mem_ctl.v
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el2_ifu_mem_ctl.v
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@ -194,8 +194,9 @@ class el2_ifu_mem_ctl extends Module with el2_lib {
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is (idle_C){
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is (idle_C){
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miss_nxtstate := Mux((ic_act_miss_f & !io.exu_flush_final).asBool, crit_byp_ok_C, hit_u_miss_C)
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miss_nxtstate := Mux((ic_act_miss_f & !io.exu_flush_final).asBool, crit_byp_ok_C, hit_u_miss_C)
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miss_state_en := ic_act_miss_f & !io.dec_tlu_force_halt}
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miss_state_en := ic_act_miss_f & !io.dec_tlu_force_halt}
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is (crit_byp_ok_C){
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is (crit_byp_ok_C){
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miss_nxtstate := Mux((io.dec_tlu_force_halt | ic_byp_hit_f & (last_data_recieved_ff | (bus_ifu_wr_en_ff & last_beat)) & uncacheable_miss_ff).asBool, idle_C,
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miss_nxtstate := Mux((io.dec_tlu_force_halt | (ic_byp_hit_f & (last_data_recieved_ff | (bus_ifu_wr_en_ff & last_beat)) & uncacheable_miss_ff)).asBool, idle_C,
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Mux((ic_byp_hit_f & !last_data_recieved_ff & uncacheable_miss_ff).asBool, miss_wait_C,
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Mux((ic_byp_hit_f & !last_data_recieved_ff & uncacheable_miss_ff).asBool, miss_wait_C,
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Mux((!ic_byp_hit_f & !io.exu_flush_final & (bus_ifu_wr_en_ff & last_beat) & uncacheable_miss_ff).asBool, crit_byp_ok_C,
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Mux((!ic_byp_hit_f & !io.exu_flush_final & (bus_ifu_wr_en_ff & last_beat) & uncacheable_miss_ff).asBool, crit_byp_ok_C,
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Mux(((bus_ifu_wr_en_ff & last_beat) & !uncacheable_miss_ff).asBool, idle_C,
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Mux(((bus_ifu_wr_en_ff & last_beat) & !uncacheable_miss_ff).asBool, idle_C,
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