diff --git a/lsu_stbuf.fir b/lsu_stbuf.fir
index b45ddb49..cea61459 100644
--- a/lsu_stbuf.fir
+++ b/lsu_stbuf.fir
@@ -1024,7 +1024,7 @@ circuit lsu_stbuf :
     rvclkhdr.reset <= reset
     rvclkhdr.io.clk <= clock @[lib.scala 379:18]
     rvclkhdr.io.en <= _T_663 @[lib.scala 380:17]
-    rvclkhdr.io.scan_mode <= io.scan_mode @[lib.scala 381:24]
+    rvclkhdr.io.scan_mode <= UInt<1>("h00") @[lib.scala 381:24]
     reg _T_664 : UInt, rvclkhdr.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[lib.scala 383:16]
     _T_664 <= stbuf_addrin[0] @[lib.scala 383:16]
     stbuf_addr[0] <= _T_664 @[lsu_stbuf.scala 169:21]
@@ -1035,7 +1035,7 @@ circuit lsu_stbuf :
     rvclkhdr_1.reset <= reset
     rvclkhdr_1.io.clk <= clock @[lib.scala 379:18]
     rvclkhdr_1.io.en <= _T_666 @[lib.scala 380:17]
-    rvclkhdr_1.io.scan_mode <= io.scan_mode @[lib.scala 381:24]
+    rvclkhdr_1.io.scan_mode <= UInt<1>("h00") @[lib.scala 381:24]
     reg _T_667 : UInt, rvclkhdr_1.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[lib.scala 383:16]
     _T_667 <= stbuf_datain[0] @[lib.scala 383:16]
     stbuf_data[0] <= _T_667 @[lsu_stbuf.scala 170:21]
@@ -1046,7 +1046,7 @@ circuit lsu_stbuf :
     rvclkhdr_2.reset <= reset
     rvclkhdr_2.io.clk <= clock @[lib.scala 379:18]
     rvclkhdr_2.io.en <= _T_669 @[lib.scala 380:17]
-    rvclkhdr_2.io.scan_mode <= io.scan_mode @[lib.scala 381:24]
+    rvclkhdr_2.io.scan_mode <= UInt<1>("h00") @[lib.scala 381:24]
     reg _T_670 : UInt, rvclkhdr_2.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[lib.scala 383:16]
     _T_670 <= stbuf_addrin[1] @[lib.scala 383:16]
     stbuf_addr[1] <= _T_670 @[lsu_stbuf.scala 169:21]
@@ -1057,7 +1057,7 @@ circuit lsu_stbuf :
     rvclkhdr_3.reset <= reset
     rvclkhdr_3.io.clk <= clock @[lib.scala 379:18]
     rvclkhdr_3.io.en <= _T_672 @[lib.scala 380:17]
-    rvclkhdr_3.io.scan_mode <= io.scan_mode @[lib.scala 381:24]
+    rvclkhdr_3.io.scan_mode <= UInt<1>("h00") @[lib.scala 381:24]
     reg _T_673 : UInt, rvclkhdr_3.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[lib.scala 383:16]
     _T_673 <= stbuf_datain[1] @[lib.scala 383:16]
     stbuf_data[1] <= _T_673 @[lsu_stbuf.scala 170:21]
@@ -1068,7 +1068,7 @@ circuit lsu_stbuf :
     rvclkhdr_4.reset <= reset
     rvclkhdr_4.io.clk <= clock @[lib.scala 379:18]
     rvclkhdr_4.io.en <= _T_675 @[lib.scala 380:17]
-    rvclkhdr_4.io.scan_mode <= io.scan_mode @[lib.scala 381:24]
+    rvclkhdr_4.io.scan_mode <= UInt<1>("h00") @[lib.scala 381:24]
     reg _T_676 : UInt, rvclkhdr_4.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[lib.scala 383:16]
     _T_676 <= stbuf_addrin[2] @[lib.scala 383:16]
     stbuf_addr[2] <= _T_676 @[lsu_stbuf.scala 169:21]
@@ -1079,7 +1079,7 @@ circuit lsu_stbuf :
     rvclkhdr_5.reset <= reset
     rvclkhdr_5.io.clk <= clock @[lib.scala 379:18]
     rvclkhdr_5.io.en <= _T_678 @[lib.scala 380:17]
-    rvclkhdr_5.io.scan_mode <= io.scan_mode @[lib.scala 381:24]
+    rvclkhdr_5.io.scan_mode <= UInt<1>("h00") @[lib.scala 381:24]
     reg _T_679 : UInt, rvclkhdr_5.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[lib.scala 383:16]
     _T_679 <= stbuf_datain[2] @[lib.scala 383:16]
     stbuf_data[2] <= _T_679 @[lsu_stbuf.scala 170:21]
@@ -1090,7 +1090,7 @@ circuit lsu_stbuf :
     rvclkhdr_6.reset <= reset
     rvclkhdr_6.io.clk <= clock @[lib.scala 379:18]
     rvclkhdr_6.io.en <= _T_681 @[lib.scala 380:17]
-    rvclkhdr_6.io.scan_mode <= io.scan_mode @[lib.scala 381:24]
+    rvclkhdr_6.io.scan_mode <= UInt<1>("h00") @[lib.scala 381:24]
     reg _T_682 : UInt, rvclkhdr_6.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[lib.scala 383:16]
     _T_682 <= stbuf_addrin[3] @[lib.scala 383:16]
     stbuf_addr[3] <= _T_682 @[lsu_stbuf.scala 169:21]
@@ -1101,7 +1101,7 @@ circuit lsu_stbuf :
     rvclkhdr_7.reset <= reset
     rvclkhdr_7.io.clk <= clock @[lib.scala 379:18]
     rvclkhdr_7.io.en <= _T_684 @[lib.scala 380:17]
-    rvclkhdr_7.io.scan_mode <= io.scan_mode @[lib.scala 381:24]
+    rvclkhdr_7.io.scan_mode <= UInt<1>("h00") @[lib.scala 381:24]
     reg _T_685 : UInt, rvclkhdr_7.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[lib.scala 383:16]
     _T_685 <= stbuf_datain[3] @[lib.scala 383:16]
     stbuf_data[3] <= _T_685 @[lsu_stbuf.scala 170:21]
diff --git a/lsu_stbuf.v b/lsu_stbuf.v
index bf0e9c5b..ec7b875e 100644
--- a/lsu_stbuf.v
+++ b/lsu_stbuf.v
@@ -1,8 +1,7 @@
 module rvclkhdr(
   output  io_l1clk,
   input   io_clk,
-  input   io_en,
-  input   io_scan_mode
+  input   io_en
 );
   wire  clkhdr_Q; // @[lib.scala 334:26]
   wire  clkhdr_CK; // @[lib.scala 334:26]
@@ -17,7 +16,7 @@ module rvclkhdr(
   assign io_l1clk = clkhdr_Q; // @[lib.scala 335:14]
   assign clkhdr_CK = io_clk; // @[lib.scala 336:18]
   assign clkhdr_EN = io_en; // @[lib.scala 337:18]
-  assign clkhdr_SE = io_scan_mode; // @[lib.scala 338:18]
+  assign clkhdr_SE = 1'h0; // @[lib.scala 338:18]
 endmodule
 module lsu_stbuf(
   input         clock,
@@ -110,35 +109,27 @@ module lsu_stbuf(
   wire  rvclkhdr_io_l1clk; // @[lib.scala 377:23]
   wire  rvclkhdr_io_clk; // @[lib.scala 377:23]
   wire  rvclkhdr_io_en; // @[lib.scala 377:23]
-  wire  rvclkhdr_io_scan_mode; // @[lib.scala 377:23]
   wire  rvclkhdr_1_io_l1clk; // @[lib.scala 377:23]
   wire  rvclkhdr_1_io_clk; // @[lib.scala 377:23]
   wire  rvclkhdr_1_io_en; // @[lib.scala 377:23]
-  wire  rvclkhdr_1_io_scan_mode; // @[lib.scala 377:23]
   wire  rvclkhdr_2_io_l1clk; // @[lib.scala 377:23]
   wire  rvclkhdr_2_io_clk; // @[lib.scala 377:23]
   wire  rvclkhdr_2_io_en; // @[lib.scala 377:23]
-  wire  rvclkhdr_2_io_scan_mode; // @[lib.scala 377:23]
   wire  rvclkhdr_3_io_l1clk; // @[lib.scala 377:23]
   wire  rvclkhdr_3_io_clk; // @[lib.scala 377:23]
   wire  rvclkhdr_3_io_en; // @[lib.scala 377:23]
-  wire  rvclkhdr_3_io_scan_mode; // @[lib.scala 377:23]
   wire  rvclkhdr_4_io_l1clk; // @[lib.scala 377:23]
   wire  rvclkhdr_4_io_clk; // @[lib.scala 377:23]
   wire  rvclkhdr_4_io_en; // @[lib.scala 377:23]
-  wire  rvclkhdr_4_io_scan_mode; // @[lib.scala 377:23]
   wire  rvclkhdr_5_io_l1clk; // @[lib.scala 377:23]
   wire  rvclkhdr_5_io_clk; // @[lib.scala 377:23]
   wire  rvclkhdr_5_io_en; // @[lib.scala 377:23]
-  wire  rvclkhdr_5_io_scan_mode; // @[lib.scala 377:23]
   wire  rvclkhdr_6_io_l1clk; // @[lib.scala 377:23]
   wire  rvclkhdr_6_io_clk; // @[lib.scala 377:23]
   wire  rvclkhdr_6_io_en; // @[lib.scala 377:23]
-  wire  rvclkhdr_6_io_scan_mode; // @[lib.scala 377:23]
   wire  rvclkhdr_7_io_l1clk; // @[lib.scala 377:23]
   wire  rvclkhdr_7_io_clk; // @[lib.scala 377:23]
   wire  rvclkhdr_7_io_en; // @[lib.scala 377:23]
-  wire  rvclkhdr_7_io_scan_mode; // @[lib.scala 377:23]
   wire [1:0] _T_5 = io_lsu_pkt_r_bits_half ? 2'h3 : 2'h0; // @[Mux.scala 27:72]
   wire [3:0] _T_6 = io_lsu_pkt_r_bits_word ? 4'hf : 4'h0; // @[Mux.scala 27:72]
   wire [7:0] _T_7 = io_lsu_pkt_r_bits_dword ? 8'hff : 8'h0; // @[Mux.scala 27:72]
@@ -773,50 +764,42 @@ module lsu_stbuf(
   rvclkhdr rvclkhdr ( // @[lib.scala 377:23]
     .io_l1clk(rvclkhdr_io_l1clk),
     .io_clk(rvclkhdr_io_clk),
-    .io_en(rvclkhdr_io_en),
-    .io_scan_mode(rvclkhdr_io_scan_mode)
+    .io_en(rvclkhdr_io_en)
   );
   rvclkhdr rvclkhdr_1 ( // @[lib.scala 377:23]
     .io_l1clk(rvclkhdr_1_io_l1clk),
     .io_clk(rvclkhdr_1_io_clk),
-    .io_en(rvclkhdr_1_io_en),
-    .io_scan_mode(rvclkhdr_1_io_scan_mode)
+    .io_en(rvclkhdr_1_io_en)
   );
   rvclkhdr rvclkhdr_2 ( // @[lib.scala 377:23]
     .io_l1clk(rvclkhdr_2_io_l1clk),
     .io_clk(rvclkhdr_2_io_clk),
-    .io_en(rvclkhdr_2_io_en),
-    .io_scan_mode(rvclkhdr_2_io_scan_mode)
+    .io_en(rvclkhdr_2_io_en)
   );
   rvclkhdr rvclkhdr_3 ( // @[lib.scala 377:23]
     .io_l1clk(rvclkhdr_3_io_l1clk),
     .io_clk(rvclkhdr_3_io_clk),
-    .io_en(rvclkhdr_3_io_en),
-    .io_scan_mode(rvclkhdr_3_io_scan_mode)
+    .io_en(rvclkhdr_3_io_en)
   );
   rvclkhdr rvclkhdr_4 ( // @[lib.scala 377:23]
     .io_l1clk(rvclkhdr_4_io_l1clk),
     .io_clk(rvclkhdr_4_io_clk),
-    .io_en(rvclkhdr_4_io_en),
-    .io_scan_mode(rvclkhdr_4_io_scan_mode)
+    .io_en(rvclkhdr_4_io_en)
   );
   rvclkhdr rvclkhdr_5 ( // @[lib.scala 377:23]
     .io_l1clk(rvclkhdr_5_io_l1clk),
     .io_clk(rvclkhdr_5_io_clk),
-    .io_en(rvclkhdr_5_io_en),
-    .io_scan_mode(rvclkhdr_5_io_scan_mode)
+    .io_en(rvclkhdr_5_io_en)
   );
   rvclkhdr rvclkhdr_6 ( // @[lib.scala 377:23]
     .io_l1clk(rvclkhdr_6_io_l1clk),
     .io_clk(rvclkhdr_6_io_clk),
-    .io_en(rvclkhdr_6_io_en),
-    .io_scan_mode(rvclkhdr_6_io_scan_mode)
+    .io_en(rvclkhdr_6_io_en)
   );
   rvclkhdr rvclkhdr_7 ( // @[lib.scala 377:23]
     .io_l1clk(rvclkhdr_7_io_l1clk),
     .io_clk(rvclkhdr_7_io_clk),
-    .io_en(rvclkhdr_7_io_en),
-    .io_scan_mode(rvclkhdr_7_io_scan_mode)
+    .io_en(rvclkhdr_7_io_en)
   );
   assign io_stbuf_reqvld_any = _T_696 & _T_698; // @[lsu_stbuf.scala 51:47 lsu_stbuf.scala 184:24]
   assign io_stbuf_reqvld_flushed_any = _T_686[0] & _T_688[0]; // @[lsu_stbuf.scala 52:35 lsu_stbuf.scala 183:31]
@@ -831,28 +814,20 @@ module lsu_stbuf(
   assign io_stbuf_fwdbyteen_lo_m = {_T_1280,_T_1272}; // @[lsu_stbuf.scala 61:37 lsu_stbuf.scala 259:27]
   assign rvclkhdr_io_clk = clock; // @[lib.scala 379:18]
   assign rvclkhdr_io_en = stbuf_wr_en[0]; // @[lib.scala 380:17]
-  assign rvclkhdr_io_scan_mode = io_scan_mode; // @[lib.scala 381:24]
   assign rvclkhdr_1_io_clk = clock; // @[lib.scala 379:18]
   assign rvclkhdr_1_io_en = stbuf_wr_en[0]; // @[lib.scala 380:17]
-  assign rvclkhdr_1_io_scan_mode = io_scan_mode; // @[lib.scala 381:24]
   assign rvclkhdr_2_io_clk = clock; // @[lib.scala 379:18]
   assign rvclkhdr_2_io_en = stbuf_wr_en[1]; // @[lib.scala 380:17]
-  assign rvclkhdr_2_io_scan_mode = io_scan_mode; // @[lib.scala 381:24]
   assign rvclkhdr_3_io_clk = clock; // @[lib.scala 379:18]
   assign rvclkhdr_3_io_en = stbuf_wr_en[1]; // @[lib.scala 380:17]
-  assign rvclkhdr_3_io_scan_mode = io_scan_mode; // @[lib.scala 381:24]
   assign rvclkhdr_4_io_clk = clock; // @[lib.scala 379:18]
   assign rvclkhdr_4_io_en = stbuf_wr_en[2]; // @[lib.scala 380:17]
-  assign rvclkhdr_4_io_scan_mode = io_scan_mode; // @[lib.scala 381:24]
   assign rvclkhdr_5_io_clk = clock; // @[lib.scala 379:18]
   assign rvclkhdr_5_io_en = stbuf_wr_en[2]; // @[lib.scala 380:17]
-  assign rvclkhdr_5_io_scan_mode = io_scan_mode; // @[lib.scala 381:24]
   assign rvclkhdr_6_io_clk = clock; // @[lib.scala 379:18]
   assign rvclkhdr_6_io_en = stbuf_wr_en[3]; // @[lib.scala 380:17]
-  assign rvclkhdr_6_io_scan_mode = io_scan_mode; // @[lib.scala 381:24]
   assign rvclkhdr_7_io_clk = clock; // @[lib.scala 379:18]
   assign rvclkhdr_7_io_en = stbuf_wr_en[3]; // @[lib.scala 380:17]
-  assign rvclkhdr_7_io_scan_mode = io_scan_mode; // @[lib.scala 381:24]
 `ifdef RANDOMIZE_GARBAGE_ASSIGN
 `define RANDOMIZE
 `endif
diff --git a/src/main/scala/lib/lib.scala b/src/main/scala/lib/lib.scala
index 4d1f8c11..40c4ee54 100644
--- a/src/main/scala/lib/lib.scala
+++ b/src/main/scala/lib/lib.scala
@@ -378,7 +378,7 @@ trait lib extends param{
       val l1clk = obj.io.l1clk
       obj.io.clk := clk
       obj.io.en := en
-      obj.io.scan_mode := scan_mode
+      obj.io.scan_mode := 0.U
       withClock(l1clk) {
         RegNext(din, 0.U)
       }
@@ -388,7 +388,7 @@ trait lib extends param{
       val l1clk = obj.io.l1clk
       obj.io.clk := clk
       obj.io.en := en
-      obj.io.scan_mode := scan_mode
+      obj.io.scan_mode := 0.U
       withClock(l1clk) {
         RegNext(din,0.U.asTypeOf(din.cloneType))
       }
@@ -398,7 +398,7 @@ trait lib extends param{
       val l1clk = obj.io.l1clk
       obj.io.clk := clk
       obj.io.en := en
-      obj.io.scan_mode := scan_mode
+      obj.io.scan_mode := 0.U
       withClock(l1clk) {
         RegNext(din, 0.S)
       }
diff --git a/target/scala-2.12/classes/lib/lib$rvdffe$.class b/target/scala-2.12/classes/lib/lib$rvdffe$.class
index 52d01199..fd0cf076 100644
Binary files a/target/scala-2.12/classes/lib/lib$rvdffe$.class and b/target/scala-2.12/classes/lib/lib$rvdffe$.class differ