diff --git a/el2_ifu_aln_ctl.fir b/el2_ifu_aln_ctl.fir
index 768e4700..4bf59ea0 100644
--- a/el2_ifu_aln_ctl.fir
+++ b/el2_ifu_aln_ctl.fir
@@ -2438,8 +2438,8 @@ circuit el2_ifu_aln_ctl :
     node _T_224 = bits(misc0eff, 53, 53) @[el2_ifu_aln_ctl.scala 217:21]
     f0icaf <= _T_224 @[el2_ifu_aln_ctl.scala 217:10]
     node f0ictype = bits(misc0eff, 52, 51) @[el2_ifu_aln_ctl.scala 218:26]
-    node f0prett = bits(misc0eff, 50, 18) @[el2_ifu_aln_ctl.scala 219:25]
-    node f0poffset = bits(misc0eff, 17, 5) @[el2_ifu_aln_ctl.scala 220:27]
+    node f0prett = bits(misc0eff, 50, 20) @[el2_ifu_aln_ctl.scala 219:25]
+    node f0poffset = bits(misc0eff, 19, 8) @[el2_ifu_aln_ctl.scala 220:27]
     node f0fghr = bits(misc0eff, 7, 0) @[el2_ifu_aln_ctl.scala 221:24]
     node _T_225 = bits(io.ifu_bp_hist1_f, 1, 1) @[el2_ifu_aln_ctl.scala 223:37]
     node _T_226 = bits(io.ifu_bp_hist0_f, 1, 1) @[el2_ifu_aln_ctl.scala 223:58]
diff --git a/el2_ifu_aln_ctl.v b/el2_ifu_aln_ctl.v
index fd6d3ee6..75a88469 100644
--- a/el2_ifu_aln_ctl.v
+++ b/el2_ifu_aln_ctl.v
@@ -815,8 +815,8 @@ module el2_ifu_aln_ctl(
   wire  f0dbecc = misc0eff[54]; // @[el2_ifu_aln_ctl.scala 216:25]
   wire  f0icaf = misc0eff[53]; // @[el2_ifu_aln_ctl.scala 217:21]
   wire [1:0] f0ictype = misc0eff[52:51]; // @[el2_ifu_aln_ctl.scala 218:26]
-  wire [32:0] f0prett = misc0eff[50:18]; // @[el2_ifu_aln_ctl.scala 219:25]
-  wire [12:0] f0poffset = misc0eff[17:5]; // @[el2_ifu_aln_ctl.scala 220:27]
+  wire [30:0] f0prett = misc0eff[50:20]; // @[el2_ifu_aln_ctl.scala 219:25]
+  wire [11:0] f0poffset = misc0eff[19:8]; // @[el2_ifu_aln_ctl.scala 220:27]
   wire [7:0] f0fghr = misc0eff[7:0]; // @[el2_ifu_aln_ctl.scala 221:24]
   wire [23:0] _T_250 = {brdata1,brdata0}; // @[Cat.scala 29:58]
   wire [23:0] _T_253 = {brdata2,brdata1}; // @[Cat.scala 29:58]
@@ -962,8 +962,6 @@ module el2_ifu_aln_ctl(
   wire  _T_751 = first4B & alignhist0[1]; // @[el2_ifu_aln_ctl.scala 387:42]
   wire  _T_752 = _T_749 | _T_751; // @[el2_ifu_aln_ctl.scala 387:31]
   wire  i0_ends_f1 = first4B & _T_515; // @[el2_ifu_aln_ctl.scala 389:28]
-  wire [12:0] _T_755 = i0_ends_f1 ? {{1'd0}, f1poffset} : f0poffset; // @[el2_ifu_aln_ctl.scala 390:27]
-  wire [32:0] _T_757 = i0_ends_f1 ? {{2'd0}, f1prett} : f0prett; // @[el2_ifu_aln_ctl.scala 392:25]
   wire  _T_768 = io_i0_brp_valid & i0_brp_pc4; // @[el2_ifu_aln_ctl.scala 398:42]
   wire  _T_769 = _T_768 & first2B; // @[el2_ifu_aln_ctl.scala 398:56]
   wire  _T_770 = ~i0_brp_pc4; // @[el2_ifu_aln_ctl.scala 398:89]
@@ -989,12 +987,12 @@ module el2_ifu_aln_ctl(
   assign io_ifu_pmu_instr_aligned = io_dec_i0_decode_d & _T_785; // @[el2_ifu_aln_ctl.scala 60:28 el2_ifu_aln_ctl.scala 410:28]
   assign io_ifu_i0_cinst = aligndata[15:0]; // @[el2_ifu_aln_ctl.scala 61:19 el2_ifu_aln_ctl.scala 346:19]
   assign io_i0_brp_valid = _T_722 | _T_726; // @[el2_ifu_aln_ctl.scala 378:19]
-  assign io_i0_brp_toffset = _T_755[11:0]; // @[el2_ifu_aln_ctl.scala 390:21]
+  assign io_i0_brp_toffset = i0_ends_f1 ? f1poffset : f0poffset; // @[el2_ifu_aln_ctl.scala 390:21]
   assign io_i0_brp_hist = {_T_747,_T_752}; // @[el2_ifu_aln_ctl.scala 386:18]
   assign io_i0_brp_br_error = _T_769 | _T_772; // @[el2_ifu_aln_ctl.scala 398:22]
   assign io_i0_brp_br_start_error = _T_657 & alignbrend[0]; // @[el2_ifu_aln_ctl.scala 394:29]
   assign io_i0_brp_bank = _T_738 ? f0pc[1] : secondpc[1]; // @[el2_ifu_aln_ctl.scala 396:29]
-  assign io_i0_brp_prett = _T_757[30:0]; // @[el2_ifu_aln_ctl.scala 392:19]
+  assign io_i0_brp_prett = i0_ends_f1 ? f1prett : f0prett; // @[el2_ifu_aln_ctl.scala 392:19]
   assign io_i0_brp_way = _T_738 ? alignway[0] : alignway[1]; // @[el2_ifu_aln_ctl.scala 384:17]
   assign io_i0_brp_ret = _T_729 | _T_731; // @[el2_ifu_aln_ctl.scala 380:17]
   assign decompressed_io_din = aligndata[15:0]; // @[el2_ifu_aln_ctl.scala 406:23]
diff --git a/src/main/scala/ifu/el2_ifu_aln_ctl.scala b/src/main/scala/ifu/el2_ifu_aln_ctl.scala
index 913f4b09..e3002d69 100644
--- a/src/main/scala/ifu/el2_ifu_aln_ctl.scala
+++ b/src/main/scala/ifu/el2_ifu_aln_ctl.scala
@@ -213,11 +213,11 @@ class el2_ifu_aln_ctl extends Module with el2_lib with RequireAsyncReset {
   val f1poffset = misc1eff(BHT_GHR_SIZE+11, BHT_GHR_SIZE)
   val f1fghr = misc1eff(BHT_GHR_SIZE-1, 0)
 
-  val f0dbecc = misc0eff(MHI)
-  f0icaf := misc0eff(MHI-1)
-  val f0ictype = misc0eff(MHI-2, MHI-3)
-  val f0prett = misc0eff(MHI-4,MHI-36)
-  val f0poffset = misc0eff(MHI-37, MHI-49)
+  val f0dbecc = misc0eff(misc1eff.getWidth-1)
+  f0icaf := misc0eff(misc1eff.getWidth-2)
+  val f0ictype = misc0eff(misc1eff.getWidth-3,misc1eff.getWidth-4)
+  val f0prett = misc0eff(misc1eff.getWidth-5,misc1eff.getWidth-35)
+  val f0poffset = misc0eff(BHT_GHR_SIZE+11, BHT_GHR_SIZE)
   val f0fghr = misc0eff(BHT_GHR_SIZE-1, 0)
 
   brdata_in := Cat(io.ifu_bp_hist1_f(1),io.ifu_bp_hist0_f(1),io.ifu_bp_pc4_f(1),io.ifu_bp_way_f(1),io.ifu_bp_valid_f(1),
diff --git a/target/scala-2.12/classes/ifu/el2_ifu_aln_ctl.class b/target/scala-2.12/classes/ifu/el2_ifu_aln_ctl.class
index d1f394df..15f9010c 100644
Binary files a/target/scala-2.12/classes/ifu/el2_ifu_aln_ctl.class and b/target/scala-2.12/classes/ifu/el2_ifu_aln_ctl.class differ