From 40779e33e7b52b845b12d52db12479a3448d9eb9 Mon Sep 17 00:00:00 2001 From: Sarmad-paracha <67508400+Sarmad-paracha@users.noreply.github.com> Date: Fri, 25 Sep 2020 21:02:58 +0500 Subject: [PATCH] Update el2_ifu_ifc_ctrl.scala --- src/main/scala/ifu/el2_ifu_ifc_ctrl.scala | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/main/scala/ifu/el2_ifu_ifc_ctrl.scala b/src/main/scala/ifu/el2_ifu_ifc_ctrl.scala index f7f40e67..ca181602 100644 --- a/src/main/scala/ifu/el2_ifu_ifc_ctrl.scala +++ b/src/main/scala/ifu/el2_ifu_ifc_ctrl.scala @@ -154,7 +154,7 @@ val io = IO(new Bundle{ io.ifc_fetch_addr_f := RegEnable(io.ifc_fetch_addr_bf, init = 0.U, io.exu_flush_final|io.ifc_fetch_req_f) } - +/* object ifu_ifc extends App { println((new chisel3.stage.ChiselStage).emitVerilog(new el2_ifu_ifc_ctrl())) -} \ No newline at end of file +}*/