Bus-buffer testing start

2020-11-07 19:30:29 +05:00 · 2020-11-07 19:30:29 +05:00 · 4c12ae25e6
parent 9c0f27b876
commit 4c12ae25e6
4 changed files with 512 additions and 509 deletions
--- a/el2_lsu_bus_buffer.fir
+++ b/el2_lsu_bus_buffer.fir
@ -6042,375 +6042,376 @@ circuit el2_lsu_bus_buffer :
    node _T_4592 = or(_T_4588, _T_4589) @[Mux.scala 27:72]
    node _T_4593 = or(_T_4592, _T_4590) @[Mux.scala 27:72]
    node _T_4594 = or(_T_4593, _T_4591) @[Mux.scala 27:72]
-    wire lsu_nonblock_addr_offset : UInt<32> @[Mux.scala 27:72]
+    wire _T_4595 : UInt<32> @[Mux.scala 27:72]
-    lsu_nonblock_addr_offset <= _T_4594 @[Mux.scala 27:72]
+    _T_4595 <= _T_4594 @[Mux.scala 27:72]
-    node _T_4595 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 111:123]
+    node lsu_nonblock_addr_offset = bits(_T_4595, 1, 0) @[el2_lsu_bus_buffer.scala 562:83]
-    node _T_4596 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_4596 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 111:123]
-    node _T_4597 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_4597 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 111:123]
-    node _T_4598 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_4598 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 111:123]
-    node _T_4599 = mux(_T_4595, buf_sz[0], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4599 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 111:123]
-    node _T_4600 = mux(_T_4596, buf_sz[1], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4600 = mux(_T_4596, buf_sz[0], UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_4601 = mux(_T_4597, buf_sz[2], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4601 = mux(_T_4597, buf_sz[1], UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_4602 = mux(_T_4598, buf_sz[3], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4602 = mux(_T_4598, buf_sz[2], UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_4603 = or(_T_4599, _T_4600) @[Mux.scala 27:72]
+    node _T_4603 = mux(_T_4599, buf_sz[3], UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_4604 = or(_T_4603, _T_4601) @[Mux.scala 27:72]
+    node _T_4604 = or(_T_4600, _T_4601) @[Mux.scala 27:72]
    node _T_4605 = or(_T_4604, _T_4602) @[Mux.scala 27:72]
    node _T_4606 = or(_T_4605, _T_4603) @[Mux.scala 27:72]
    wire lsu_nonblock_sz : UInt<2> @[Mux.scala 27:72]
-    lsu_nonblock_sz <= _T_4605 @[Mux.scala 27:72]
+    lsu_nonblock_sz <= _T_4606 @[Mux.scala 27:72]
-    node _T_4606 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_4607 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:118]
-    node _T_4607 = bits(buf_unsign, 0, 0) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_4608 = bits(buf_unsign, 0, 0) @[el2_lsu_bus_buffer.scala 110:129]
-    node _T_4608 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_4609 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:118]
-    node _T_4609 = bits(buf_unsign, 1, 1) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_4610 = bits(buf_unsign, 1, 1) @[el2_lsu_bus_buffer.scala 110:129]
-    node _T_4610 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_4611 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:118]
-    node _T_4611 = bits(buf_unsign, 2, 2) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_4612 = bits(buf_unsign, 2, 2) @[el2_lsu_bus_buffer.scala 110:129]
-    node _T_4612 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_4613 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:118]
-    node _T_4613 = bits(buf_unsign, 3, 3) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_4614 = bits(buf_unsign, 3, 3) @[el2_lsu_bus_buffer.scala 110:129]
-    node _T_4614 = mux(_T_4606, _T_4607, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4615 = mux(_T_4607, _T_4608, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_4615 = mux(_T_4608, _T_4609, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4616 = mux(_T_4609, _T_4610, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_4616 = mux(_T_4610, _T_4611, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4617 = mux(_T_4611, _T_4612, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_4617 = mux(_T_4612, _T_4613, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4618 = mux(_T_4613, _T_4614, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_4618 = or(_T_4614, _T_4615) @[Mux.scala 27:72]
+    node _T_4619 = or(_T_4615, _T_4616) @[Mux.scala 27:72]
    node _T_4619 = or(_T_4618, _T_4616) @[Mux.scala 27:72]
    node _T_4620 = or(_T_4619, _T_4617) @[Mux.scala 27:72]
    node _T_4621 = or(_T_4620, _T_4618) @[Mux.scala 27:72]
    wire lsu_nonblock_unsign : UInt<1> @[Mux.scala 27:72]
-    lsu_nonblock_unsign <= _T_4620 @[Mux.scala 27:72]
+    lsu_nonblock_unsign <= _T_4621 @[Mux.scala 27:72]
-    node _T_4621 = cat(buf_dual[3], buf_dual[2]) @[Cat.scala 29:58]
+    node _T_4622 = cat(buf_dual[3], buf_dual[2]) @[Cat.scala 29:58]
-    node _T_4622 = cat(_T_4621, buf_dual[1]) @[Cat.scala 29:58]
+    node _T_4623 = cat(_T_4622, buf_dual[1]) @[Cat.scala 29:58]
-    node _T_4623 = cat(_T_4622, buf_dual[0]) @[Cat.scala 29:58]
+    node _T_4624 = cat(_T_4623, buf_dual[0]) @[Cat.scala 29:58]
-    node _T_4624 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_4625 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:118]
-    node _T_4625 = bits(_T_4623, 0, 0) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_4626 = bits(_T_4624, 0, 0) @[el2_lsu_bus_buffer.scala 110:129]
-    node _T_4626 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_4627 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:118]
-    node _T_4627 = bits(_T_4623, 1, 1) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_4628 = bits(_T_4624, 1, 1) @[el2_lsu_bus_buffer.scala 110:129]
-    node _T_4628 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_4629 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:118]
-    node _T_4629 = bits(_T_4623, 2, 2) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_4630 = bits(_T_4624, 2, 2) @[el2_lsu_bus_buffer.scala 110:129]
-    node _T_4630 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_4631 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:118]
-    node _T_4631 = bits(_T_4623, 3, 3) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_4632 = bits(_T_4624, 3, 3) @[el2_lsu_bus_buffer.scala 110:129]
-    node _T_4632 = mux(_T_4624, _T_4625, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4633 = mux(_T_4625, _T_4626, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_4633 = mux(_T_4626, _T_4627, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4634 = mux(_T_4627, _T_4628, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_4634 = mux(_T_4628, _T_4629, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4635 = mux(_T_4629, _T_4630, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_4635 = mux(_T_4630, _T_4631, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4636 = mux(_T_4631, _T_4632, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_4636 = or(_T_4632, _T_4633) @[Mux.scala 27:72]
+    node _T_4637 = or(_T_4633, _T_4634) @[Mux.scala 27:72]
    node _T_4637 = or(_T_4636, _T_4634) @[Mux.scala 27:72]
    node _T_4638 = or(_T_4637, _T_4635) @[Mux.scala 27:72]
    node _T_4639 = or(_T_4638, _T_4636) @[Mux.scala 27:72]
    wire lsu_nonblock_dual : UInt<1> @[Mux.scala 27:72]
-    lsu_nonblock_dual <= _T_4638 @[Mux.scala 27:72]
+    lsu_nonblock_dual <= _T_4639 @[Mux.scala 27:72]
-    node _T_4639 = cat(lsu_nonblock_load_data_hi, lsu_nonblock_load_data_lo) @[Cat.scala 29:58]
+    node _T_4640 = cat(lsu_nonblock_load_data_hi, lsu_nonblock_load_data_lo) @[Cat.scala 29:58]
-    node _T_4640 = mul(lsu_nonblock_addr_offset, UInt<4>("h08")) @[el2_lsu_bus_buffer.scala 566:121]
+    node _T_4641 = mul(lsu_nonblock_addr_offset, UInt<4>("h08")) @[el2_lsu_bus_buffer.scala 566:121]
-    node lsu_nonblock_data_unalgn = dshr(_T_4639, _T_4640) @[el2_lsu_bus_buffer.scala 566:92]
+    node lsu_nonblock_data_unalgn = dshr(_T_4640, _T_4641) @[el2_lsu_bus_buffer.scala 566:92]
-    node _T_4641 = eq(io.lsu_nonblock_load_data_error, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 567:69]
+    node _T_4642 = eq(io.lsu_nonblock_load_data_error, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 567:69]
-    node _T_4642 = and(lsu_nonblock_load_data_ready, _T_4641) @[el2_lsu_bus_buffer.scala 567:67]
+    node _T_4643 = and(lsu_nonblock_load_data_ready, _T_4642) @[el2_lsu_bus_buffer.scala 567:67]
-    io.lsu_nonblock_load_data_valid <= _T_4642 @[el2_lsu_bus_buffer.scala 567:35]
+    io.lsu_nonblock_load_data_valid <= _T_4643 @[el2_lsu_bus_buffer.scala 567:35]
-    node _T_4643 = eq(lsu_nonblock_sz, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 568:81]
+    node _T_4644 = eq(lsu_nonblock_sz, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 568:81]
-    node _T_4644 = and(lsu_nonblock_unsign, _T_4643) @[el2_lsu_bus_buffer.scala 568:63]
+    node _T_4645 = and(lsu_nonblock_unsign, _T_4644) @[el2_lsu_bus_buffer.scala 568:63]
-    node _T_4645 = bits(lsu_nonblock_data_unalgn, 7, 0) @[el2_lsu_bus_buffer.scala 568:131]
+    node _T_4646 = bits(lsu_nonblock_data_unalgn, 7, 0) @[el2_lsu_bus_buffer.scala 568:131]
-    node _T_4646 = cat(UInt<24>("h00"), _T_4645) @[Cat.scala 29:58]
+    node _T_4647 = cat(UInt<24>("h00"), _T_4646) @[Cat.scala 29:58]
-    node _T_4647 = eq(lsu_nonblock_sz, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 569:45]
+    node _T_4648 = eq(lsu_nonblock_sz, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 569:45]
-    node _T_4648 = and(lsu_nonblock_unsign, _T_4647) @[el2_lsu_bus_buffer.scala 569:26]
+    node _T_4649 = and(lsu_nonblock_unsign, _T_4648) @[el2_lsu_bus_buffer.scala 569:26]
-    node _T_4649 = bits(lsu_nonblock_data_unalgn, 15, 0) @[el2_lsu_bus_buffer.scala 569:95]
+    node _T_4650 = bits(lsu_nonblock_data_unalgn, 15, 0) @[el2_lsu_bus_buffer.scala 569:95]
-    node _T_4650 = cat(UInt<16>("h00"), _T_4649) @[Cat.scala 29:58]
+    node _T_4651 = cat(UInt<16>("h00"), _T_4650) @[Cat.scala 29:58]
-    node _T_4651 = eq(lsu_nonblock_unsign, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 570:6]
+    node _T_4652 = eq(lsu_nonblock_unsign, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 570:6]
-    node _T_4652 = eq(lsu_nonblock_sz, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 570:45]
+    node _T_4653 = eq(lsu_nonblock_sz, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 570:45]
-    node _T_4653 = and(_T_4651, _T_4652) @[el2_lsu_bus_buffer.scala 570:27]
+    node _T_4654 = and(_T_4652, _T_4653) @[el2_lsu_bus_buffer.scala 570:27]
-    node _T_4654 = bits(lsu_nonblock_data_unalgn, 7, 7) @[el2_lsu_bus_buffer.scala 570:93]
+    node _T_4655 = bits(lsu_nonblock_data_unalgn, 7, 7) @[el2_lsu_bus_buffer.scala 570:93]
-    node _T_4655 = bits(_T_4654, 0, 0) @[Bitwise.scala 72:15]
+    node _T_4656 = bits(_T_4655, 0, 0) @[Bitwise.scala 72:15]
-    node _T_4656 = mux(_T_4655, UInt<24>("h0ffffff"), UInt<24>("h00")) @[Bitwise.scala 72:12]
+    node _T_4657 = mux(_T_4656, UInt<24>("h0ffffff"), UInt<24>("h00")) @[Bitwise.scala 72:12]
-    node _T_4657 = bits(lsu_nonblock_data_unalgn, 7, 0) @[el2_lsu_bus_buffer.scala 570:123]
+    node _T_4658 = bits(lsu_nonblock_data_unalgn, 7, 0) @[el2_lsu_bus_buffer.scala 570:123]
-    node _T_4658 = cat(_T_4656, _T_4657) @[Cat.scala 29:58]
+    node _T_4659 = cat(_T_4657, _T_4658) @[Cat.scala 29:58]
-    node _T_4659 = eq(lsu_nonblock_unsign, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 571:6]
+    node _T_4660 = eq(lsu_nonblock_unsign, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 571:6]
-    node _T_4660 = eq(lsu_nonblock_sz, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 571:45]
+    node _T_4661 = eq(lsu_nonblock_sz, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 571:45]
-    node _T_4661 = and(_T_4659, _T_4660) @[el2_lsu_bus_buffer.scala 571:27]
+    node _T_4662 = and(_T_4660, _T_4661) @[el2_lsu_bus_buffer.scala 571:27]
-    node _T_4662 = bits(lsu_nonblock_data_unalgn, 15, 15) @[el2_lsu_bus_buffer.scala 571:93]
+    node _T_4663 = bits(lsu_nonblock_data_unalgn, 15, 15) @[el2_lsu_bus_buffer.scala 571:93]
-    node _T_4663 = bits(_T_4662, 0, 0) @[Bitwise.scala 72:15]
+    node _T_4664 = bits(_T_4663, 0, 0) @[Bitwise.scala 72:15]
-    node _T_4664 = mux(_T_4663, UInt<16>("h0ffff"), UInt<16>("h00")) @[Bitwise.scala 72:12]
+    node _T_4665 = mux(_T_4664, UInt<16>("h0ffff"), UInt<16>("h00")) @[Bitwise.scala 72:12]
-    node _T_4665 = bits(lsu_nonblock_data_unalgn, 15, 0) @[el2_lsu_bus_buffer.scala 571:124]
+    node _T_4666 = bits(lsu_nonblock_data_unalgn, 15, 0) @[el2_lsu_bus_buffer.scala 571:124]
-    node _T_4666 = cat(_T_4664, _T_4665) @[Cat.scala 29:58]
+    node _T_4667 = cat(_T_4665, _T_4666) @[Cat.scala 29:58]
-    node _T_4667 = eq(lsu_nonblock_sz, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 572:21]
+    node _T_4668 = eq(lsu_nonblock_sz, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 572:21]
-    node _T_4668 = mux(_T_4644, _T_4646, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4669 = mux(_T_4645, _T_4647, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_4669 = mux(_T_4648, _T_4650, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4670 = mux(_T_4649, _T_4651, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_4670 = mux(_T_4653, _T_4658, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4671 = mux(_T_4654, _T_4659, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_4671 = mux(_T_4661, _T_4666, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4672 = mux(_T_4662, _T_4667, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_4672 = mux(_T_4667, lsu_nonblock_data_unalgn, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4673 = mux(_T_4668, lsu_nonblock_data_unalgn, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_4673 = or(_T_4668, _T_4669) @[Mux.scala 27:72]
+    node _T_4674 = or(_T_4669, _T_4670) @[Mux.scala 27:72]
    node _T_4674 = or(_T_4673, _T_4670) @[Mux.scala 27:72]
    node _T_4675 = or(_T_4674, _T_4671) @[Mux.scala 27:72]
    node _T_4676 = or(_T_4675, _T_4672) @[Mux.scala 27:72]
-    wire _T_4677 : UInt<64> @[Mux.scala 27:72]
+    node _T_4677 = or(_T_4676, _T_4673) @[Mux.scala 27:72]
-    _T_4677 <= _T_4676 @[Mux.scala 27:72]
+    wire _T_4678 : UInt<64> @[Mux.scala 27:72]
-    io.lsu_nonblock_load_data <= _T_4677 @[el2_lsu_bus_buffer.scala 568:29]
+    _T_4678 <= _T_4677 @[Mux.scala 27:72]
-    node _T_4678 = eq(buf_state[0], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 573:62]
+    io.lsu_nonblock_load_data <= _T_4678 @[el2_lsu_bus_buffer.scala 568:29]
-    node _T_4679 = bits(buf_sideeffect, 0, 0) @[el2_lsu_bus_buffer.scala 573:89]
+    node _T_4679 = eq(buf_state[0], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 573:62]
-    node _T_4680 = and(_T_4678, _T_4679) @[el2_lsu_bus_buffer.scala 573:73]
+    node _T_4680 = bits(buf_sideeffect, 0, 0) @[el2_lsu_bus_buffer.scala 573:89]
-    node _T_4681 = and(_T_4680, io.dec_tlu_sideeffect_posted_disable) @[el2_lsu_bus_buffer.scala 573:93]
+    node _T_4681 = and(_T_4679, _T_4680) @[el2_lsu_bus_buffer.scala 573:73]
-    node _T_4682 = eq(buf_state[1], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 573:62]
+    node _T_4682 = and(_T_4681, io.dec_tlu_sideeffect_posted_disable) @[el2_lsu_bus_buffer.scala 573:93]
-    node _T_4683 = bits(buf_sideeffect, 1, 1) @[el2_lsu_bus_buffer.scala 573:89]
+    node _T_4683 = eq(buf_state[1], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 573:62]
-    node _T_4684 = and(_T_4682, _T_4683) @[el2_lsu_bus_buffer.scala 573:73]
+    node _T_4684 = bits(buf_sideeffect, 1, 1) @[el2_lsu_bus_buffer.scala 573:89]
-    node _T_4685 = and(_T_4684, io.dec_tlu_sideeffect_posted_disable) @[el2_lsu_bus_buffer.scala 573:93]
+    node _T_4685 = and(_T_4683, _T_4684) @[el2_lsu_bus_buffer.scala 573:73]
-    node _T_4686 = eq(buf_state[2], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 573:62]
+    node _T_4686 = and(_T_4685, io.dec_tlu_sideeffect_posted_disable) @[el2_lsu_bus_buffer.scala 573:93]
-    node _T_4687 = bits(buf_sideeffect, 2, 2) @[el2_lsu_bus_buffer.scala 573:89]
+    node _T_4687 = eq(buf_state[2], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 573:62]
-    node _T_4688 = and(_T_4686, _T_4687) @[el2_lsu_bus_buffer.scala 573:73]
+    node _T_4688 = bits(buf_sideeffect, 2, 2) @[el2_lsu_bus_buffer.scala 573:89]
-    node _T_4689 = and(_T_4688, io.dec_tlu_sideeffect_posted_disable) @[el2_lsu_bus_buffer.scala 573:93]
+    node _T_4689 = and(_T_4687, _T_4688) @[el2_lsu_bus_buffer.scala 573:73]
-    node _T_4690 = eq(buf_state[3], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 573:62]
+    node _T_4690 = and(_T_4689, io.dec_tlu_sideeffect_posted_disable) @[el2_lsu_bus_buffer.scala 573:93]
-    node _T_4691 = bits(buf_sideeffect, 3, 3) @[el2_lsu_bus_buffer.scala 573:89]
+    node _T_4691 = eq(buf_state[3], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 573:62]
-    node _T_4692 = and(_T_4690, _T_4691) @[el2_lsu_bus_buffer.scala 573:73]
+    node _T_4692 = bits(buf_sideeffect, 3, 3) @[el2_lsu_bus_buffer.scala 573:89]
-    node _T_4693 = and(_T_4692, io.dec_tlu_sideeffect_posted_disable) @[el2_lsu_bus_buffer.scala 573:93]
+    node _T_4693 = and(_T_4691, _T_4692) @[el2_lsu_bus_buffer.scala 573:73]
-    node _T_4694 = or(_T_4681, _T_4685) @[el2_lsu_bus_buffer.scala 573:141]
+    node _T_4694 = and(_T_4693, io.dec_tlu_sideeffect_posted_disable) @[el2_lsu_bus_buffer.scala 573:93]
-    node _T_4695 = or(_T_4694, _T_4689) @[el2_lsu_bus_buffer.scala 573:141]
+    node _T_4695 = or(_T_4682, _T_4686) @[el2_lsu_bus_buffer.scala 573:141]
-    node _T_4696 = or(_T_4695, _T_4693) @[el2_lsu_bus_buffer.scala 573:141]
+    node _T_4696 = or(_T_4695, _T_4690) @[el2_lsu_bus_buffer.scala 573:141]
-    bus_sideeffect_pend <= _T_4696 @[el2_lsu_bus_buffer.scala 573:23]
+    node _T_4697 = or(_T_4696, _T_4694) @[el2_lsu_bus_buffer.scala 573:141]
-    node _T_4697 = eq(buf_state[0], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 574:71]
+    bus_sideeffect_pend <= _T_4697 @[el2_lsu_bus_buffer.scala 573:23]
-    node _T_4698 = and(UInt<1>("h01"), obuf_valid) @[el2_lsu_bus_buffer.scala 575:25]
+    node _T_4698 = eq(buf_state[0], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 574:71]
-    node _T_4699 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 575:50]
+    node _T_4699 = and(UInt<1>("h01"), obuf_valid) @[el2_lsu_bus_buffer.scala 575:25]
-    node _T_4700 = bits(buf_addr[0], 31, 3) @[el2_lsu_bus_buffer.scala 575:70]
+    node _T_4700 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 575:50]
-    node _T_4701 = eq(_T_4699, _T_4700) @[el2_lsu_bus_buffer.scala 575:56]
+    node _T_4701 = bits(buf_addr[0], 31, 3) @[el2_lsu_bus_buffer.scala 575:70]
-    node _T_4702 = and(_T_4698, _T_4701) @[el2_lsu_bus_buffer.scala 575:38]
+    node _T_4702 = eq(_T_4700, _T_4701) @[el2_lsu_bus_buffer.scala 575:56]
-    node _T_4703 = eq(obuf_tag0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 575:92]
+    node _T_4703 = and(_T_4699, _T_4702) @[el2_lsu_bus_buffer.scala 575:38]
-    node _T_4704 = eq(obuf_tag1, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 575:126]
+    node _T_4704 = eq(obuf_tag0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 575:92]
-    node _T_4705 = and(obuf_merge, _T_4704) @[el2_lsu_bus_buffer.scala 575:114]
+    node _T_4705 = eq(obuf_tag1, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 575:126]
-    node _T_4706 = or(_T_4703, _T_4705) @[el2_lsu_bus_buffer.scala 575:100]
+    node _T_4706 = and(obuf_merge, _T_4705) @[el2_lsu_bus_buffer.scala 575:114]
-    node _T_4707 = eq(_T_4706, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 575:80]
+    node _T_4707 = or(_T_4704, _T_4706) @[el2_lsu_bus_buffer.scala 575:100]
-    node _T_4708 = and(_T_4702, _T_4707) @[el2_lsu_bus_buffer.scala 575:78]
+    node _T_4708 = eq(_T_4707, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 575:80]
-    node _T_4709 = eq(buf_state[1], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 574:71]
+    node _T_4709 = and(_T_4703, _T_4708) @[el2_lsu_bus_buffer.scala 575:78]
-    node _T_4710 = and(UInt<1>("h01"), obuf_valid) @[el2_lsu_bus_buffer.scala 575:25]
+    node _T_4710 = eq(buf_state[1], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 574:71]
-    node _T_4711 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 575:50]
+    node _T_4711 = and(UInt<1>("h01"), obuf_valid) @[el2_lsu_bus_buffer.scala 575:25]
-    node _T_4712 = bits(buf_addr[1], 31, 3) @[el2_lsu_bus_buffer.scala 575:70]
+    node _T_4712 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 575:50]
-    node _T_4713 = eq(_T_4711, _T_4712) @[el2_lsu_bus_buffer.scala 575:56]
+    node _T_4713 = bits(buf_addr[1], 31, 3) @[el2_lsu_bus_buffer.scala 575:70]
-    node _T_4714 = and(_T_4710, _T_4713) @[el2_lsu_bus_buffer.scala 575:38]
+    node _T_4714 = eq(_T_4712, _T_4713) @[el2_lsu_bus_buffer.scala 575:56]
-    node _T_4715 = eq(obuf_tag0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 575:92]
+    node _T_4715 = and(_T_4711, _T_4714) @[el2_lsu_bus_buffer.scala 575:38]
-    node _T_4716 = eq(obuf_tag1, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 575:126]
+    node _T_4716 = eq(obuf_tag0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 575:92]
-    node _T_4717 = and(obuf_merge, _T_4716) @[el2_lsu_bus_buffer.scala 575:114]
+    node _T_4717 = eq(obuf_tag1, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 575:126]
-    node _T_4718 = or(_T_4715, _T_4717) @[el2_lsu_bus_buffer.scala 575:100]
+    node _T_4718 = and(obuf_merge, _T_4717) @[el2_lsu_bus_buffer.scala 575:114]
-    node _T_4719 = eq(_T_4718, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 575:80]
+    node _T_4719 = or(_T_4716, _T_4718) @[el2_lsu_bus_buffer.scala 575:100]
-    node _T_4720 = and(_T_4714, _T_4719) @[el2_lsu_bus_buffer.scala 575:78]
+    node _T_4720 = eq(_T_4719, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 575:80]
-    node _T_4721 = eq(buf_state[2], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 574:71]
+    node _T_4721 = and(_T_4715, _T_4720) @[el2_lsu_bus_buffer.scala 575:78]
-    node _T_4722 = and(UInt<1>("h01"), obuf_valid) @[el2_lsu_bus_buffer.scala 575:25]
+    node _T_4722 = eq(buf_state[2], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 574:71]
-    node _T_4723 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 575:50]
+    node _T_4723 = and(UInt<1>("h01"), obuf_valid) @[el2_lsu_bus_buffer.scala 575:25]
-    node _T_4724 = bits(buf_addr[2], 31, 3) @[el2_lsu_bus_buffer.scala 575:70]
+    node _T_4724 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 575:50]
-    node _T_4725 = eq(_T_4723, _T_4724) @[el2_lsu_bus_buffer.scala 575:56]
+    node _T_4725 = bits(buf_addr[2], 31, 3) @[el2_lsu_bus_buffer.scala 575:70]
-    node _T_4726 = and(_T_4722, _T_4725) @[el2_lsu_bus_buffer.scala 575:38]
+    node _T_4726 = eq(_T_4724, _T_4725) @[el2_lsu_bus_buffer.scala 575:56]
-    node _T_4727 = eq(obuf_tag0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 575:92]
+    node _T_4727 = and(_T_4723, _T_4726) @[el2_lsu_bus_buffer.scala 575:38]
-    node _T_4728 = eq(obuf_tag1, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 575:126]
+    node _T_4728 = eq(obuf_tag0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 575:92]
-    node _T_4729 = and(obuf_merge, _T_4728) @[el2_lsu_bus_buffer.scala 575:114]
+    node _T_4729 = eq(obuf_tag1, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 575:126]
-    node _T_4730 = or(_T_4727, _T_4729) @[el2_lsu_bus_buffer.scala 575:100]
+    node _T_4730 = and(obuf_merge, _T_4729) @[el2_lsu_bus_buffer.scala 575:114]
-    node _T_4731 = eq(_T_4730, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 575:80]
+    node _T_4731 = or(_T_4728, _T_4730) @[el2_lsu_bus_buffer.scala 575:100]
-    node _T_4732 = and(_T_4726, _T_4731) @[el2_lsu_bus_buffer.scala 575:78]
+    node _T_4732 = eq(_T_4731, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 575:80]
-    node _T_4733 = eq(buf_state[3], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 574:71]
+    node _T_4733 = and(_T_4727, _T_4732) @[el2_lsu_bus_buffer.scala 575:78]
-    node _T_4734 = and(UInt<1>("h01"), obuf_valid) @[el2_lsu_bus_buffer.scala 575:25]
+    node _T_4734 = eq(buf_state[3], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 574:71]
-    node _T_4735 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 575:50]
+    node _T_4735 = and(UInt<1>("h01"), obuf_valid) @[el2_lsu_bus_buffer.scala 575:25]
-    node _T_4736 = bits(buf_addr[3], 31, 3) @[el2_lsu_bus_buffer.scala 575:70]
+    node _T_4736 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 575:50]
-    node _T_4737 = eq(_T_4735, _T_4736) @[el2_lsu_bus_buffer.scala 575:56]
+    node _T_4737 = bits(buf_addr[3], 31, 3) @[el2_lsu_bus_buffer.scala 575:70]
-    node _T_4738 = and(_T_4734, _T_4737) @[el2_lsu_bus_buffer.scala 575:38]
+    node _T_4738 = eq(_T_4736, _T_4737) @[el2_lsu_bus_buffer.scala 575:56]
-    node _T_4739 = eq(obuf_tag0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 575:92]
+    node _T_4739 = and(_T_4735, _T_4738) @[el2_lsu_bus_buffer.scala 575:38]
-    node _T_4740 = eq(obuf_tag1, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 575:126]
+    node _T_4740 = eq(obuf_tag0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 575:92]
-    node _T_4741 = and(obuf_merge, _T_4740) @[el2_lsu_bus_buffer.scala 575:114]
+    node _T_4741 = eq(obuf_tag1, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 575:126]
-    node _T_4742 = or(_T_4739, _T_4741) @[el2_lsu_bus_buffer.scala 575:100]
+    node _T_4742 = and(obuf_merge, _T_4741) @[el2_lsu_bus_buffer.scala 575:114]
-    node _T_4743 = eq(_T_4742, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 575:80]
+    node _T_4743 = or(_T_4740, _T_4742) @[el2_lsu_bus_buffer.scala 575:100]
-    node _T_4744 = and(_T_4738, _T_4743) @[el2_lsu_bus_buffer.scala 575:78]
+    node _T_4744 = eq(_T_4743, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 575:80]
-    node _T_4745 = mux(_T_4697, _T_4708, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4745 = and(_T_4739, _T_4744) @[el2_lsu_bus_buffer.scala 575:78]
-    node _T_4746 = mux(_T_4709, _T_4720, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4746 = mux(_T_4698, _T_4709, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_4747 = mux(_T_4721, _T_4732, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4747 = mux(_T_4710, _T_4721, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_4748 = mux(_T_4733, _T_4744, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4748 = mux(_T_4722, _T_4733, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_4749 = or(_T_4745, _T_4746) @[Mux.scala 27:72]
+    node _T_4749 = mux(_T_4734, _T_4745, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_4750 = or(_T_4749, _T_4747) @[Mux.scala 27:72]
+    node _T_4750 = or(_T_4746, _T_4747) @[Mux.scala 27:72]
    node _T_4751 = or(_T_4750, _T_4748) @[Mux.scala 27:72]
-    wire _T_4752 : UInt<1> @[Mux.scala 27:72]
+    node _T_4752 = or(_T_4751, _T_4749) @[Mux.scala 27:72]
-    _T_4752 <= _T_4751 @[Mux.scala 27:72]
+    wire _T_4753 : UInt<1> @[Mux.scala 27:72]
-    bus_addr_match_pending <= _T_4752 @[el2_lsu_bus_buffer.scala 574:26]
+    _T_4753 <= _T_4752 @[Mux.scala 27:72]
-    node _T_4753 = or(obuf_cmd_done, obuf_data_done) @[el2_lsu_bus_buffer.scala 577:54]
+    bus_addr_match_pending <= _T_4753 @[el2_lsu_bus_buffer.scala 574:26]
-    node _T_4754 = mux(obuf_cmd_done, io.lsu_axi_wready, io.lsu_axi_awready) @[el2_lsu_bus_buffer.scala 577:75]
+    node _T_4754 = or(obuf_cmd_done, obuf_data_done) @[el2_lsu_bus_buffer.scala 577:54]
-    node _T_4755 = and(io.lsu_axi_awready, io.lsu_axi_awready) @[el2_lsu_bus_buffer.scala 577:150]
+    node _T_4755 = mux(obuf_cmd_done, io.lsu_axi_wready, io.lsu_axi_awready) @[el2_lsu_bus_buffer.scala 577:75]
-    node _T_4756 = mux(_T_4753, _T_4754, _T_4755) @[el2_lsu_bus_buffer.scala 577:39]
+    node _T_4756 = and(io.lsu_axi_awready, io.lsu_axi_awready) @[el2_lsu_bus_buffer.scala 577:150]
-    node _T_4757 = mux(obuf_write, _T_4756, io.lsu_axi_arready) @[el2_lsu_bus_buffer.scala 577:23]
+    node _T_4757 = mux(_T_4754, _T_4755, _T_4756) @[el2_lsu_bus_buffer.scala 577:39]
-    bus_cmd_ready <= _T_4757 @[el2_lsu_bus_buffer.scala 577:17]
+    node _T_4758 = mux(obuf_write, _T_4757, io.lsu_axi_arready) @[el2_lsu_bus_buffer.scala 577:23]
-    node _T_4758 = and(io.lsu_axi_awvalid, io.lsu_axi_awready) @[el2_lsu_bus_buffer.scala 578:39]
+    bus_cmd_ready <= _T_4758 @[el2_lsu_bus_buffer.scala 577:17]
-    bus_wcmd_sent <= _T_4758 @[el2_lsu_bus_buffer.scala 578:17]
+    node _T_4759 = and(io.lsu_axi_awvalid, io.lsu_axi_awready) @[el2_lsu_bus_buffer.scala 578:39]
-    node _T_4759 = and(io.lsu_axi_wvalid, io.lsu_axi_wready) @[el2_lsu_bus_buffer.scala 579:39]
+    bus_wcmd_sent <= _T_4759 @[el2_lsu_bus_buffer.scala 578:17]
-    bus_wdata_sent <= _T_4759 @[el2_lsu_bus_buffer.scala 579:18]
+    node _T_4760 = and(io.lsu_axi_wvalid, io.lsu_axi_wready) @[el2_lsu_bus_buffer.scala 579:39]
-    node _T_4760 = or(obuf_cmd_done, bus_wcmd_sent) @[el2_lsu_bus_buffer.scala 580:35]
+    bus_wdata_sent <= _T_4760 @[el2_lsu_bus_buffer.scala 579:18]
-    node _T_4761 = or(obuf_data_done, bus_wdata_sent) @[el2_lsu_bus_buffer.scala 580:70]
+    node _T_4761 = or(obuf_cmd_done, bus_wcmd_sent) @[el2_lsu_bus_buffer.scala 580:35]
-    node _T_4762 = and(_T_4760, _T_4761) @[el2_lsu_bus_buffer.scala 580:52]
+    node _T_4762 = or(obuf_data_done, bus_wdata_sent) @[el2_lsu_bus_buffer.scala 580:70]
-    node _T_4763 = and(io.lsu_axi_arvalid, io.lsu_axi_arready) @[el2_lsu_bus_buffer.scala 580:111]
+    node _T_4763 = and(_T_4761, _T_4762) @[el2_lsu_bus_buffer.scala 580:52]
-    node _T_4764 = or(_T_4762, _T_4763) @[el2_lsu_bus_buffer.scala 580:89]
+    node _T_4764 = and(io.lsu_axi_arvalid, io.lsu_axi_arready) @[el2_lsu_bus_buffer.scala 580:111]
-    bus_cmd_sent <= _T_4764 @[el2_lsu_bus_buffer.scala 580:16]
+    node _T_4765 = or(_T_4763, _T_4764) @[el2_lsu_bus_buffer.scala 580:89]
-    node _T_4765 = and(io.lsu_axi_rvalid, io.lsu_axi_rready) @[el2_lsu_bus_buffer.scala 581:37]
+    bus_cmd_sent <= _T_4765 @[el2_lsu_bus_buffer.scala 580:16]
-    bus_rsp_read <= _T_4765 @[el2_lsu_bus_buffer.scala 581:16]
+    node _T_4766 = and(io.lsu_axi_rvalid, io.lsu_axi_rready) @[el2_lsu_bus_buffer.scala 581:37]
-    node _T_4766 = and(io.lsu_axi_bvalid, io.lsu_axi_bready) @[el2_lsu_bus_buffer.scala 582:38]
+    bus_rsp_read <= _T_4766 @[el2_lsu_bus_buffer.scala 581:16]
-    bus_rsp_write <= _T_4766 @[el2_lsu_bus_buffer.scala 582:17]
+    node _T_4767 = and(io.lsu_axi_bvalid, io.lsu_axi_bready) @[el2_lsu_bus_buffer.scala 582:38]
    bus_rsp_write <= _T_4767 @[el2_lsu_bus_buffer.scala 582:17]
    bus_rsp_read_tag <= io.lsu_axi_rid @[el2_lsu_bus_buffer.scala 583:20]
    bus_rsp_write_tag <= io.lsu_axi_bid @[el2_lsu_bus_buffer.scala 584:21]
-    node _T_4767 = neq(io.lsu_axi_bresp, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 585:60]
+    node _T_4768 = neq(io.lsu_axi_bresp, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 585:60]
-    node _T_4768 = and(bus_rsp_write, _T_4767) @[el2_lsu_bus_buffer.scala 585:40]
+    node _T_4769 = and(bus_rsp_write, _T_4768) @[el2_lsu_bus_buffer.scala 585:40]
-    bus_rsp_write_error <= _T_4768 @[el2_lsu_bus_buffer.scala 585:23]
+    bus_rsp_write_error <= _T_4769 @[el2_lsu_bus_buffer.scala 585:23]
-    node _T_4769 = neq(io.lsu_axi_bresp, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 586:58]
+    node _T_4770 = neq(io.lsu_axi_bresp, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 586:58]
-    node _T_4770 = and(bus_rsp_read, _T_4769) @[el2_lsu_bus_buffer.scala 586:38]
+    node _T_4771 = and(bus_rsp_read, _T_4770) @[el2_lsu_bus_buffer.scala 586:38]
-    bus_rsp_read_error <= _T_4770 @[el2_lsu_bus_buffer.scala 586:22]
+    bus_rsp_read_error <= _T_4771 @[el2_lsu_bus_buffer.scala 586:22]
    bus_rsp_rdata <= io.lsu_axi_rdata @[el2_lsu_bus_buffer.scala 587:17]
-    node _T_4771 = and(obuf_valid, obuf_write) @[el2_lsu_bus_buffer.scala 590:36]
+    node _T_4772 = and(obuf_valid, obuf_write) @[el2_lsu_bus_buffer.scala 590:36]
-    node _T_4772 = eq(obuf_cmd_done, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 590:51]
+    node _T_4773 = eq(obuf_cmd_done, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 590:51]
-    node _T_4773 = and(_T_4771, _T_4772) @[el2_lsu_bus_buffer.scala 590:49]
+    node _T_4774 = and(_T_4772, _T_4773) @[el2_lsu_bus_buffer.scala 590:49]
-    node _T_4774 = eq(bus_addr_match_pending, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 590:68]
+    node _T_4775 = eq(bus_addr_match_pending, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 590:68]
-    node _T_4775 = and(_T_4773, _T_4774) @[el2_lsu_bus_buffer.scala 590:66]
+    node _T_4776 = and(_T_4774, _T_4775) @[el2_lsu_bus_buffer.scala 590:66]
-    io.lsu_axi_awvalid <= _T_4775 @[el2_lsu_bus_buffer.scala 590:22]
+    io.lsu_axi_awvalid <= _T_4776 @[el2_lsu_bus_buffer.scala 590:22]
    io.lsu_axi_awid <= obuf_tag0 @[el2_lsu_bus_buffer.scala 591:19]
-    node _T_4776 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 592:69]
+    node _T_4777 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 592:69]
-    node _T_4777 = cat(_T_4776, UInt<3>("h00")) @[Cat.scala 29:58]
+    node _T_4778 = cat(_T_4777, UInt<3>("h00")) @[Cat.scala 29:58]
-    node _T_4778 = mux(obuf_sideeffect, obuf_addr, _T_4777) @[el2_lsu_bus_buffer.scala 592:27]
+    node _T_4779 = mux(obuf_sideeffect, obuf_addr, _T_4778) @[el2_lsu_bus_buffer.scala 592:27]
-    io.lsu_axi_awaddr <= _T_4778 @[el2_lsu_bus_buffer.scala 592:21]
+    io.lsu_axi_awaddr <= _T_4779 @[el2_lsu_bus_buffer.scala 592:21]
-    node _T_4779 = cat(UInt<1>("h00"), obuf_sz) @[Cat.scala 29:58]
+    node _T_4780 = cat(UInt<1>("h00"), obuf_sz) @[Cat.scala 29:58]
-    node _T_4780 = mux(obuf_sideeffect, _T_4779, UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 593:27]
+    node _T_4781 = mux(obuf_sideeffect, _T_4780, UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 593:27]
-    io.lsu_axi_awsize <= _T_4780 @[el2_lsu_bus_buffer.scala 593:21]
+    io.lsu_axi_awsize <= _T_4781 @[el2_lsu_bus_buffer.scala 593:21]
    io.lsu_axi_awprot <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 594:21]
-    node _T_4781 = mux(obuf_sideeffect, UInt<1>("h00"), UInt<4>("h0f")) @[el2_lsu_bus_buffer.scala 595:28]
+    node _T_4782 = mux(obuf_sideeffect, UInt<1>("h00"), UInt<4>("h0f")) @[el2_lsu_bus_buffer.scala 595:28]
-    io.lsu_axi_awcache <= _T_4781 @[el2_lsu_bus_buffer.scala 595:22]
+    io.lsu_axi_awcache <= _T_4782 @[el2_lsu_bus_buffer.scala 595:22]
-    node _T_4782 = bits(obuf_addr, 31, 28) @[el2_lsu_bus_buffer.scala 596:35]
+    node _T_4783 = bits(obuf_addr, 31, 28) @[el2_lsu_bus_buffer.scala 596:35]
-    io.lsu_axi_awregion <= _T_4782 @[el2_lsu_bus_buffer.scala 596:23]
+    io.lsu_axi_awregion <= _T_4783 @[el2_lsu_bus_buffer.scala 596:23]
    io.lsu_axi_awlen <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 597:20]
    io.lsu_axi_awburst <= UInt<2>("h01") @[el2_lsu_bus_buffer.scala 598:22]
    io.lsu_axi_awqos <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 599:20]
    io.lsu_axi_awlock <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 600:21]
-    node _T_4783 = and(obuf_valid, obuf_write) @[el2_lsu_bus_buffer.scala 602:35]
+    node _T_4784 = and(obuf_valid, obuf_write) @[el2_lsu_bus_buffer.scala 602:35]
-    node _T_4784 = eq(obuf_data_done, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 602:50]
+    node _T_4785 = eq(obuf_data_done, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 602:50]
-    node _T_4785 = and(_T_4783, _T_4784) @[el2_lsu_bus_buffer.scala 602:48]
+    node _T_4786 = and(_T_4784, _T_4785) @[el2_lsu_bus_buffer.scala 602:48]
-    node _T_4786 = eq(bus_addr_match_pending, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 602:68]
+    node _T_4787 = eq(bus_addr_match_pending, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 602:68]
-    node _T_4787 = and(_T_4785, _T_4786) @[el2_lsu_bus_buffer.scala 602:66]
+    node _T_4788 = and(_T_4786, _T_4787) @[el2_lsu_bus_buffer.scala 602:66]
-    io.lsu_axi_wvalid <= _T_4787 @[el2_lsu_bus_buffer.scala 602:21]
+    io.lsu_axi_wvalid <= _T_4788 @[el2_lsu_bus_buffer.scala 602:21]
-    node _T_4788 = bits(obuf_write, 0, 0) @[Bitwise.scala 72:15]
+    node _T_4789 = bits(obuf_write, 0, 0) @[Bitwise.scala 72:15]
-    node _T_4789 = mux(_T_4788, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
+    node _T_4790 = mux(_T_4789, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
-    node _T_4790 = and(obuf_byteen, _T_4789) @[el2_lsu_bus_buffer.scala 603:35]
+    node _T_4791 = and(obuf_byteen, _T_4790) @[el2_lsu_bus_buffer.scala 603:35]
-    io.lsu_axi_wstrb <= _T_4790 @[el2_lsu_bus_buffer.scala 603:20]
+    io.lsu_axi_wstrb <= _T_4791 @[el2_lsu_bus_buffer.scala 603:20]
    io.lsu_axi_wdata <= obuf_data @[el2_lsu_bus_buffer.scala 604:20]
    io.lsu_axi_wlast <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 605:20]
-    node _T_4791 = eq(obuf_write, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 607:38]
+    node _T_4792 = eq(obuf_write, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 607:38]
-    node _T_4792 = and(obuf_valid, _T_4791) @[el2_lsu_bus_buffer.scala 607:36]
+    node _T_4793 = and(obuf_valid, _T_4792) @[el2_lsu_bus_buffer.scala 607:36]
-    node _T_4793 = eq(obuf_nosend, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 607:52]
+    node _T_4794 = eq(obuf_nosend, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 607:52]
-    node _T_4794 = and(_T_4792, _T_4793) @[el2_lsu_bus_buffer.scala 607:50]
+    node _T_4795 = and(_T_4793, _T_4794) @[el2_lsu_bus_buffer.scala 607:50]
-    node _T_4795 = eq(bus_addr_match_pending, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 607:67]
+    node _T_4796 = eq(bus_addr_match_pending, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 607:67]
-    node _T_4796 = and(_T_4794, _T_4795) @[el2_lsu_bus_buffer.scala 607:65]
+    node _T_4797 = and(_T_4795, _T_4796) @[el2_lsu_bus_buffer.scala 607:65]
-    io.lsu_axi_arvalid <= _T_4796 @[el2_lsu_bus_buffer.scala 607:22]
+    io.lsu_axi_arvalid <= _T_4797 @[el2_lsu_bus_buffer.scala 607:22]
    io.lsu_axi_arid <= obuf_tag0 @[el2_lsu_bus_buffer.scala 608:19]
-    node _T_4797 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 609:69]
+    node _T_4798 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 609:69]
-    node _T_4798 = cat(_T_4797, UInt<3>("h00")) @[Cat.scala 29:58]
+    node _T_4799 = cat(_T_4798, UInt<3>("h00")) @[Cat.scala 29:58]
-    node _T_4799 = mux(obuf_sideeffect, obuf_addr, _T_4798) @[el2_lsu_bus_buffer.scala 609:27]
+    node _T_4800 = mux(obuf_sideeffect, obuf_addr, _T_4799) @[el2_lsu_bus_buffer.scala 609:27]
-    io.lsu_axi_araddr <= _T_4799 @[el2_lsu_bus_buffer.scala 609:21]
+    io.lsu_axi_araddr <= _T_4800 @[el2_lsu_bus_buffer.scala 609:21]
-    node _T_4800 = cat(UInt<1>("h00"), obuf_sz) @[Cat.scala 29:58]
+    node _T_4801 = cat(UInt<1>("h00"), obuf_sz) @[Cat.scala 29:58]
-    node _T_4801 = mux(obuf_sideeffect, _T_4800, UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 610:27]
+    node _T_4802 = mux(obuf_sideeffect, _T_4801, UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 610:27]
-    io.lsu_axi_arsize <= _T_4801 @[el2_lsu_bus_buffer.scala 610:21]
+    io.lsu_axi_arsize <= _T_4802 @[el2_lsu_bus_buffer.scala 610:21]
    io.lsu_axi_arprot <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 611:21]
-    node _T_4802 = mux(obuf_sideeffect, UInt<4>("h00"), UInt<4>("h0f")) @[el2_lsu_bus_buffer.scala 612:28]
+    node _T_4803 = mux(obuf_sideeffect, UInt<4>("h00"), UInt<4>("h0f")) @[el2_lsu_bus_buffer.scala 612:28]
-    io.lsu_axi_arcache <= _T_4802 @[el2_lsu_bus_buffer.scala 612:22]
+    io.lsu_axi_arcache <= _T_4803 @[el2_lsu_bus_buffer.scala 612:22]
-    node _T_4803 = bits(obuf_addr, 31, 28) @[el2_lsu_bus_buffer.scala 613:35]
+    node _T_4804 = bits(obuf_addr, 31, 28) @[el2_lsu_bus_buffer.scala 613:35]
-    io.lsu_axi_arregion <= _T_4803 @[el2_lsu_bus_buffer.scala 613:23]
+    io.lsu_axi_arregion <= _T_4804 @[el2_lsu_bus_buffer.scala 613:23]
    io.lsu_axi_arlen <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 614:20]
    io.lsu_axi_arburst <= UInt<2>("h01") @[el2_lsu_bus_buffer.scala 615:22]
    io.lsu_axi_arqos <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 616:20]
    io.lsu_axi_arlock <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 617:21]
    io.lsu_axi_bready <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 618:21]
    io.lsu_axi_rready <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 619:21]
-    node _T_4804 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 620:81]
+    node _T_4805 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 620:81]
-    node _T_4805 = bits(buf_error, 0, 0) @[el2_lsu_bus_buffer.scala 620:125]
+    node _T_4806 = bits(buf_error, 0, 0) @[el2_lsu_bus_buffer.scala 620:125]
-    node _T_4806 = and(io.lsu_bus_clk_en_q, _T_4805) @[el2_lsu_bus_buffer.scala 620:114]
+    node _T_4807 = and(io.lsu_bus_clk_en_q, _T_4806) @[el2_lsu_bus_buffer.scala 620:114]
-    node _T_4807 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 620:140]
+    node _T_4808 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 620:140]
-    node _T_4808 = and(_T_4806, _T_4807) @[el2_lsu_bus_buffer.scala 620:129]
+    node _T_4809 = and(_T_4807, _T_4808) @[el2_lsu_bus_buffer.scala 620:129]
-    node _T_4809 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 620:81]
+    node _T_4810 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 620:81]
-    node _T_4810 = bits(buf_error, 1, 1) @[el2_lsu_bus_buffer.scala 620:125]
+    node _T_4811 = bits(buf_error, 1, 1) @[el2_lsu_bus_buffer.scala 620:125]
-    node _T_4811 = and(io.lsu_bus_clk_en_q, _T_4810) @[el2_lsu_bus_buffer.scala 620:114]
+    node _T_4812 = and(io.lsu_bus_clk_en_q, _T_4811) @[el2_lsu_bus_buffer.scala 620:114]
-    node _T_4812 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 620:140]
+    node _T_4813 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 620:140]
-    node _T_4813 = and(_T_4811, _T_4812) @[el2_lsu_bus_buffer.scala 620:129]
+    node _T_4814 = and(_T_4812, _T_4813) @[el2_lsu_bus_buffer.scala 620:129]
-    node _T_4814 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 620:81]
+    node _T_4815 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 620:81]
-    node _T_4815 = bits(buf_error, 2, 2) @[el2_lsu_bus_buffer.scala 620:125]
+    node _T_4816 = bits(buf_error, 2, 2) @[el2_lsu_bus_buffer.scala 620:125]
-    node _T_4816 = and(io.lsu_bus_clk_en_q, _T_4815) @[el2_lsu_bus_buffer.scala 620:114]
+    node _T_4817 = and(io.lsu_bus_clk_en_q, _T_4816) @[el2_lsu_bus_buffer.scala 620:114]
-    node _T_4817 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 620:140]
+    node _T_4818 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 620:140]
-    node _T_4818 = and(_T_4816, _T_4817) @[el2_lsu_bus_buffer.scala 620:129]
+    node _T_4819 = and(_T_4817, _T_4818) @[el2_lsu_bus_buffer.scala 620:129]
-    node _T_4819 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 620:81]
+    node _T_4820 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 620:81]
-    node _T_4820 = bits(buf_error, 3, 3) @[el2_lsu_bus_buffer.scala 620:125]
+    node _T_4821 = bits(buf_error, 3, 3) @[el2_lsu_bus_buffer.scala 620:125]
-    node _T_4821 = and(io.lsu_bus_clk_en_q, _T_4820) @[el2_lsu_bus_buffer.scala 620:114]
+    node _T_4822 = and(io.lsu_bus_clk_en_q, _T_4821) @[el2_lsu_bus_buffer.scala 620:114]
-    node _T_4822 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 620:140]
+    node _T_4823 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 620:140]
-    node _T_4823 = and(_T_4821, _T_4822) @[el2_lsu_bus_buffer.scala 620:129]
+    node _T_4824 = and(_T_4822, _T_4823) @[el2_lsu_bus_buffer.scala 620:129]
-    node _T_4824 = mux(_T_4804, _T_4808, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4825 = mux(_T_4805, _T_4809, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_4825 = mux(_T_4809, _T_4813, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4826 = mux(_T_4810, _T_4814, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_4826 = mux(_T_4814, _T_4818, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4827 = mux(_T_4815, _T_4819, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_4827 = mux(_T_4819, _T_4823, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4828 = mux(_T_4820, _T_4824, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_4828 = or(_T_4824, _T_4825) @[Mux.scala 27:72]
+    node _T_4829 = or(_T_4825, _T_4826) @[Mux.scala 27:72]
    node _T_4829 = or(_T_4828, _T_4826) @[Mux.scala 27:72]
    node _T_4830 = or(_T_4829, _T_4827) @[Mux.scala 27:72]
-    wire _T_4831 : UInt<1> @[Mux.scala 27:72]
+    node _T_4831 = or(_T_4830, _T_4828) @[Mux.scala 27:72]
-    _T_4831 <= _T_4830 @[Mux.scala 27:72]
+    wire _T_4832 : UInt<1> @[Mux.scala 27:72]
-    io.lsu_imprecise_error_store_any <= _T_4831 @[el2_lsu_bus_buffer.scala 620:36]
+    _T_4832 <= _T_4831 @[Mux.scala 27:72]
-    node _T_4832 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 621:87]
+    io.lsu_imprecise_error_store_any <= _T_4832 @[el2_lsu_bus_buffer.scala 620:36]
-    node _T_4833 = bits(buf_error, 0, 0) @[el2_lsu_bus_buffer.scala 621:109]
+    node _T_4833 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 621:87]
-    node _T_4834 = and(_T_4832, _T_4833) @[el2_lsu_bus_buffer.scala 621:98]
+    node _T_4834 = bits(buf_error, 0, 0) @[el2_lsu_bus_buffer.scala 621:109]
-    node _T_4835 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 621:124]
+    node _T_4835 = and(_T_4833, _T_4834) @[el2_lsu_bus_buffer.scala 621:98]
-    node _T_4836 = and(_T_4834, _T_4835) @[el2_lsu_bus_buffer.scala 621:113]
+    node _T_4836 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 621:124]
-    node _T_4837 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 621:87]
+    node _T_4837 = and(_T_4835, _T_4836) @[el2_lsu_bus_buffer.scala 621:113]
-    node _T_4838 = bits(buf_error, 1, 1) @[el2_lsu_bus_buffer.scala 621:109]
+    node _T_4838 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 621:87]
-    node _T_4839 = and(_T_4837, _T_4838) @[el2_lsu_bus_buffer.scala 621:98]
+    node _T_4839 = bits(buf_error, 1, 1) @[el2_lsu_bus_buffer.scala 621:109]
-    node _T_4840 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 621:124]
+    node _T_4840 = and(_T_4838, _T_4839) @[el2_lsu_bus_buffer.scala 621:98]
-    node _T_4841 = and(_T_4839, _T_4840) @[el2_lsu_bus_buffer.scala 621:113]
+    node _T_4841 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 621:124]
-    node _T_4842 = mux(_T_4836, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4842 = and(_T_4840, _T_4841) @[el2_lsu_bus_buffer.scala 621:113]
-    node _T_4843 = mux(_T_4841, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4843 = mux(_T_4837, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_4844 = or(_T_4842, _T_4843) @[Mux.scala 27:72]
+    node _T_4844 = mux(_T_4842, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72]
    node _T_4845 = or(_T_4843, _T_4844) @[Mux.scala 27:72]
    wire lsu_imprecise_error_store_tag : UInt<1> @[Mux.scala 27:72]
-    lsu_imprecise_error_store_tag <= _T_4844 @[Mux.scala 27:72]
+    lsu_imprecise_error_store_tag <= _T_4845 @[Mux.scala 27:72]
-    node _T_4845 = eq(io.lsu_imprecise_error_store_any, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 623:72]
+    node _T_4846 = eq(io.lsu_imprecise_error_store_any, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 623:72]
-    node _T_4846 = and(io.lsu_nonblock_load_data_error, _T_4845) @[el2_lsu_bus_buffer.scala 623:70]
+    node _T_4847 = and(io.lsu_nonblock_load_data_error, _T_4846) @[el2_lsu_bus_buffer.scala 623:70]
-    io.lsu_imprecise_error_load_any <= _T_4846 @[el2_lsu_bus_buffer.scala 623:35]
+    io.lsu_imprecise_error_load_any <= _T_4847 @[el2_lsu_bus_buffer.scala 623:35]
-    node _T_4847 = eq(lsu_imprecise_error_store_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_4848 = eq(lsu_imprecise_error_store_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 111:123]
-    node _T_4848 = eq(lsu_imprecise_error_store_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_4849 = eq(lsu_imprecise_error_store_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 111:123]
-    node _T_4849 = mux(_T_4847, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4850 = mux(_T_4848, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_4850 = mux(_T_4848, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4851 = mux(_T_4849, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_4851 = or(_T_4849, _T_4850) @[Mux.scala 27:72]
+    node _T_4852 = or(_T_4850, _T_4851) @[Mux.scala 27:72]
-    wire _T_4852 : UInt<32> @[Mux.scala 27:72]
+    wire _T_4853 : UInt<32> @[Mux.scala 27:72]
-    _T_4852 <= _T_4851 @[Mux.scala 27:72]
+    _T_4853 <= _T_4852 @[Mux.scala 27:72]
-    node _T_4853 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_4854 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 111:123]
-    node _T_4854 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_4855 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 111:123]
-    node _T_4855 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_4856 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 111:123]
-    node _T_4856 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_4857 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 111:123]
-    node _T_4857 = mux(_T_4853, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4858 = mux(_T_4854, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_4858 = mux(_T_4854, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4859 = mux(_T_4855, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_4859 = mux(_T_4855, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4860 = mux(_T_4856, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_4860 = mux(_T_4856, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4861 = mux(_T_4857, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_4861 = or(_T_4857, _T_4858) @[Mux.scala 27:72]
+    node _T_4862 = or(_T_4858, _T_4859) @[Mux.scala 27:72]
    node _T_4862 = or(_T_4861, _T_4859) @[Mux.scala 27:72]
    node _T_4863 = or(_T_4862, _T_4860) @[Mux.scala 27:72]
-    wire _T_4864 : UInt<32> @[Mux.scala 27:72]
+    node _T_4864 = or(_T_4863, _T_4861) @[Mux.scala 27:72]
-    _T_4864 <= _T_4863 @[Mux.scala 27:72]
+    wire _T_4865 : UInt<32> @[Mux.scala 27:72]
-    node _T_4865 = mux(io.lsu_imprecise_error_store_any, _T_4852, _T_4864) @[el2_lsu_bus_buffer.scala 624:41]
+    _T_4865 <= _T_4864 @[Mux.scala 27:72]
-    io.lsu_imprecise_error_addr_any <= _T_4865 @[el2_lsu_bus_buffer.scala 624:35]
+    node _T_4866 = mux(io.lsu_imprecise_error_store_any, _T_4853, _T_4865) @[el2_lsu_bus_buffer.scala 624:41]
    io.lsu_imprecise_error_addr_any <= _T_4866 @[el2_lsu_bus_buffer.scala 624:35]
    lsu_bus_cntr_overflow <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 625:25]
    io.lsu_bus_idle_any <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 627:23]
-    node _T_4866 = and(io.lsu_axi_awvalid, io.lsu_axi_awready) @[el2_lsu_bus_buffer.scala 630:46]
+    node _T_4867 = and(io.lsu_axi_awvalid, io.lsu_axi_awready) @[el2_lsu_bus_buffer.scala 630:46]
-    node _T_4867 = and(io.lsu_axi_wvalid, io.lsu_axi_wready) @[el2_lsu_bus_buffer.scala 630:89]
+    node _T_4868 = and(io.lsu_axi_wvalid, io.lsu_axi_wready) @[el2_lsu_bus_buffer.scala 630:89]
-    node _T_4868 = or(_T_4866, _T_4867) @[el2_lsu_bus_buffer.scala 630:68]
+    node _T_4869 = or(_T_4867, _T_4868) @[el2_lsu_bus_buffer.scala 630:68]
-    node _T_4869 = and(io.lsu_axi_arvalid, io.lsu_axi_arready) @[el2_lsu_bus_buffer.scala 630:132]
+    node _T_4870 = and(io.lsu_axi_arvalid, io.lsu_axi_arready) @[el2_lsu_bus_buffer.scala 630:132]
-    node _T_4870 = or(_T_4868, _T_4869) @[el2_lsu_bus_buffer.scala 630:110]
+    node _T_4871 = or(_T_4869, _T_4870) @[el2_lsu_bus_buffer.scala 630:110]
-    io.lsu_pmu_bus_trxn <= _T_4870 @[el2_lsu_bus_buffer.scala 630:23]
+    io.lsu_pmu_bus_trxn <= _T_4871 @[el2_lsu_bus_buffer.scala 630:23]
-    node _T_4871 = and(io.lsu_busreq_r, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 631:48]
+    node _T_4872 = and(io.lsu_busreq_r, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 631:48]
-    node _T_4872 = and(_T_4871, io.lsu_commit_r) @[el2_lsu_bus_buffer.scala 631:65]
+    node _T_4873 = and(_T_4872, io.lsu_commit_r) @[el2_lsu_bus_buffer.scala 631:65]
-    io.lsu_pmu_bus_misaligned <= _T_4872 @[el2_lsu_bus_buffer.scala 631:29]
+    io.lsu_pmu_bus_misaligned <= _T_4873 @[el2_lsu_bus_buffer.scala 631:29]
-    node _T_4873 = or(io.lsu_imprecise_error_load_any, io.lsu_imprecise_error_store_any) @[el2_lsu_bus_buffer.scala 632:59]
+    node _T_4874 = or(io.lsu_imprecise_error_load_any, io.lsu_imprecise_error_store_any) @[el2_lsu_bus_buffer.scala 632:59]
-    io.lsu_pmu_bus_error <= _T_4873 @[el2_lsu_bus_buffer.scala 632:24]
+    io.lsu_pmu_bus_error <= _T_4874 @[el2_lsu_bus_buffer.scala 632:24]
-    node _T_4874 = eq(io.lsu_axi_awready, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 634:48]
+    node _T_4875 = eq(io.lsu_axi_awready, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 634:48]
-    node _T_4875 = and(io.lsu_axi_awvalid, _T_4874) @[el2_lsu_bus_buffer.scala 634:46]
+    node _T_4876 = and(io.lsu_axi_awvalid, _T_4875) @[el2_lsu_bus_buffer.scala 634:46]
-    node _T_4876 = eq(io.lsu_axi_wready, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 634:92]
+    node _T_4877 = eq(io.lsu_axi_wready, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 634:92]
-    node _T_4877 = and(io.lsu_axi_wvalid, _T_4876) @[el2_lsu_bus_buffer.scala 634:90]
+    node _T_4878 = and(io.lsu_axi_wvalid, _T_4877) @[el2_lsu_bus_buffer.scala 634:90]
-    node _T_4878 = or(_T_4875, _T_4877) @[el2_lsu_bus_buffer.scala 634:69]
+    node _T_4879 = or(_T_4876, _T_4878) @[el2_lsu_bus_buffer.scala 634:69]
-    node _T_4879 = eq(io.lsu_axi_arready, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 634:136]
+    node _T_4880 = eq(io.lsu_axi_arready, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 634:136]
-    node _T_4880 = and(io.lsu_axi_arvalid, _T_4879) @[el2_lsu_bus_buffer.scala 634:134]
+    node _T_4881 = and(io.lsu_axi_arvalid, _T_4880) @[el2_lsu_bus_buffer.scala 634:134]
-    node _T_4881 = or(_T_4878, _T_4880) @[el2_lsu_bus_buffer.scala 634:112]
+    node _T_4882 = or(_T_4879, _T_4881) @[el2_lsu_bus_buffer.scala 634:112]
-    io.lsu_pmu_bus_busy <= _T_4881 @[el2_lsu_bus_buffer.scala 634:23]
+    io.lsu_pmu_bus_busy <= _T_4882 @[el2_lsu_bus_buffer.scala 634:23]
-    reg _T_4882 : UInt, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 636:49]
+    reg _T_4883 : UInt, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 636:49]
-    _T_4882 <= WrPtr0_m @[el2_lsu_bus_buffer.scala 636:49]
+    _T_4883 <= WrPtr0_m @[el2_lsu_bus_buffer.scala 636:49]
-    WrPtr0_r <= _T_4882 @[el2_lsu_bus_buffer.scala 636:12]
+    WrPtr0_r <= _T_4883 @[el2_lsu_bus_buffer.scala 636:12]
-    reg _T_4883 : UInt, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 637:49]
+    reg _T_4884 : UInt, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 637:49]
-    _T_4883 <= WrPtr1_m @[el2_lsu_bus_buffer.scala 637:49]
+    _T_4884 <= WrPtr1_m @[el2_lsu_bus_buffer.scala 637:49]
-    WrPtr1_r <= _T_4883 @[el2_lsu_bus_buffer.scala 637:12]
+    WrPtr1_r <= _T_4884 @[el2_lsu_bus_buffer.scala 637:12]
-    node _T_4884 = eq(io.flush_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 638:75]
+    node _T_4885 = eq(io.flush_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 638:75]
-    node _T_4885 = and(io.lsu_busreq_m, _T_4884) @[el2_lsu_bus_buffer.scala 638:73]
+    node _T_4886 = and(io.lsu_busreq_m, _T_4885) @[el2_lsu_bus_buffer.scala 638:73]
-    node _T_4886 = eq(io.ld_full_hit_m, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 638:89]
+    node _T_4887 = eq(io.ld_full_hit_m, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 638:89]
-    node _T_4887 = and(_T_4885, _T_4886) @[el2_lsu_bus_buffer.scala 638:87]
+    node _T_4888 = and(_T_4886, _T_4887) @[el2_lsu_bus_buffer.scala 638:87]
-    reg _T_4888 : UInt<1>, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 638:56]
+    reg _T_4889 : UInt<1>, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 638:56]
-    _T_4888 <= _T_4887 @[el2_lsu_bus_buffer.scala 638:56]
+    _T_4889 <= _T_4888 @[el2_lsu_bus_buffer.scala 638:56]
-    io.lsu_busreq_r <= _T_4888 @[el2_lsu_bus_buffer.scala 638:19]
+    io.lsu_busreq_r <= _T_4889 @[el2_lsu_bus_buffer.scala 638:19]
-    reg _T_4889 : UInt<1>, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 639:66]
+    reg _T_4890 : UInt<1>, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 639:66]
-    _T_4889 <= io.lsu_nonblock_load_valid_m @[el2_lsu_bus_buffer.scala 639:66]
+    _T_4890 <= io.lsu_nonblock_load_valid_m @[el2_lsu_bus_buffer.scala 639:66]
-    lsu_nonblock_load_valid_r <= _T_4889 @[el2_lsu_bus_buffer.scala 639:29]
+    lsu_nonblock_load_valid_r <= _T_4890 @[el2_lsu_bus_buffer.scala 639:29]
--- a/el2_lsu_bus_buffer.v
+++ b/el2_lsu_bus_buffer.v
@ -1045,21 +1045,21 @@ module el2_lsu_bus_buffer(
  wire  _T_1016 = _T_1015 | io_no_dword_merge_r; // @[el2_lsu_bus_buffer.scala 299:84]
  wire  ibuf_buf_byp = _T_1014 & _T_1016; // @[el2_lsu_bus_buffer.scala 299:61]
  wire  _T_1017 = ibuf_buf_byp & io_lsu_commit_r; // @[el2_lsu_bus_buffer.scala 314:32]
-  wire  _T_4678 = buf_state_0 == 3'h3; // @[el2_lsu_bus_buffer.scala 573:62]
+  wire  _T_4679 = buf_state_0 == 3'h3; // @[el2_lsu_bus_buffer.scala 573:62]
-  wire  _T_4680 = _T_4678 & buf_sideeffect[0]; // @[el2_lsu_bus_buffer.scala 573:73]
+  wire  _T_4681 = _T_4679 & buf_sideeffect[0]; // @[el2_lsu_bus_buffer.scala 573:73]
-  wire  _T_4681 = _T_4680 & io_dec_tlu_sideeffect_posted_disable; // @[el2_lsu_bus_buffer.scala 573:93]
+  wire  _T_4682 = _T_4681 & io_dec_tlu_sideeffect_posted_disable; // @[el2_lsu_bus_buffer.scala 573:93]
-  wire  _T_4682 = buf_state_1 == 3'h3; // @[el2_lsu_bus_buffer.scala 573:62]
+  wire  _T_4683 = buf_state_1 == 3'h3; // @[el2_lsu_bus_buffer.scala 573:62]
-  wire  _T_4684 = _T_4682 & buf_sideeffect[1]; // @[el2_lsu_bus_buffer.scala 573:73]
+  wire  _T_4685 = _T_4683 & buf_sideeffect[1]; // @[el2_lsu_bus_buffer.scala 573:73]
-  wire  _T_4685 = _T_4684 & io_dec_tlu_sideeffect_posted_disable; // @[el2_lsu_bus_buffer.scala 573:93]
+  wire  _T_4686 = _T_4685 & io_dec_tlu_sideeffect_posted_disable; // @[el2_lsu_bus_buffer.scala 573:93]
-  wire  _T_4694 = _T_4681 | _T_4685; // @[el2_lsu_bus_buffer.scala 573:141]
+  wire  _T_4695 = _T_4682 | _T_4686; // @[el2_lsu_bus_buffer.scala 573:141]
-  wire  _T_4686 = buf_state_2 == 3'h3; // @[el2_lsu_bus_buffer.scala 573:62]
+  wire  _T_4687 = buf_state_2 == 3'h3; // @[el2_lsu_bus_buffer.scala 573:62]
-  wire  _T_4688 = _T_4686 & buf_sideeffect[2]; // @[el2_lsu_bus_buffer.scala 573:73]
+  wire  _T_4689 = _T_4687 & buf_sideeffect[2]; // @[el2_lsu_bus_buffer.scala 573:73]
-  wire  _T_4689 = _T_4688 & io_dec_tlu_sideeffect_posted_disable; // @[el2_lsu_bus_buffer.scala 573:93]
+  wire  _T_4690 = _T_4689 & io_dec_tlu_sideeffect_posted_disable; // @[el2_lsu_bus_buffer.scala 573:93]
-  wire  _T_4695 = _T_4694 | _T_4689; // @[el2_lsu_bus_buffer.scala 573:141]
+  wire  _T_4696 = _T_4695 | _T_4690; // @[el2_lsu_bus_buffer.scala 573:141]
-  wire  _T_4690 = buf_state_3 == 3'h3; // @[el2_lsu_bus_buffer.scala 573:62]
+  wire  _T_4691 = buf_state_3 == 3'h3; // @[el2_lsu_bus_buffer.scala 573:62]
-  wire  _T_4692 = _T_4690 & buf_sideeffect[3]; // @[el2_lsu_bus_buffer.scala 573:73]
+  wire  _T_4693 = _T_4691 & buf_sideeffect[3]; // @[el2_lsu_bus_buffer.scala 573:73]
-  wire  _T_4693 = _T_4692 & io_dec_tlu_sideeffect_posted_disable; // @[el2_lsu_bus_buffer.scala 573:93]
+  wire  _T_4694 = _T_4693 & io_dec_tlu_sideeffect_posted_disable; // @[el2_lsu_bus_buffer.scala 573:93]
-  wire  bus_sideeffect_pend = _T_4695 | _T_4693; // @[el2_lsu_bus_buffer.scala 573:141]
+  wire  bus_sideeffect_pend = _T_4696 | _T_4694; // @[el2_lsu_bus_buffer.scala 573:141]
  wire  _T_1018 = io_is_sideeffects_r & bus_sideeffect_pend; // @[el2_lsu_bus_buffer.scala 314:74]
  wire  _T_1019 = ~_T_1018; // @[el2_lsu_bus_buffer.scala 314:52]
  wire  _T_1020 = _T_1017 & _T_1019; // @[el2_lsu_bus_buffer.scala 314:50]
@ -1142,10 +1142,10 @@ module el2_lsu_bus_buffer(
  reg  obuf_write; // @[Reg.scala 27:20]
  reg  obuf_cmd_done; // @[el2_lsu_bus_buffer.scala 377:54]
  reg  obuf_data_done; // @[el2_lsu_bus_buffer.scala 378:55]
-  wire  _T_4753 = obuf_cmd_done | obuf_data_done; // @[el2_lsu_bus_buffer.scala 577:54]
+  wire  _T_4754 = obuf_cmd_done | obuf_data_done; // @[el2_lsu_bus_buffer.scala 577:54]
-  wire  _T_4754 = obuf_cmd_done ? io_lsu_axi_wready : io_lsu_axi_awready; // @[el2_lsu_bus_buffer.scala 577:75]
+  wire  _T_4755 = obuf_cmd_done ? io_lsu_axi_wready : io_lsu_axi_awready; // @[el2_lsu_bus_buffer.scala 577:75]
-  wire  _T_4756 = _T_4753 ? _T_4754 : io_lsu_axi_awready; // @[el2_lsu_bus_buffer.scala 577:39]
+  wire  _T_4757 = _T_4754 ? _T_4755 : io_lsu_axi_awready; // @[el2_lsu_bus_buffer.scala 577:39]
-  wire  bus_cmd_ready = obuf_write ? _T_4756 : io_lsu_axi_arready; // @[el2_lsu_bus_buffer.scala 577:23]
+  wire  bus_cmd_ready = obuf_write ? _T_4757 : io_lsu_axi_arready; // @[el2_lsu_bus_buffer.scala 577:23]
  wire  _T_1157 = ~obuf_valid; // @[el2_lsu_bus_buffer.scala 318:48]
  wire  _T_1158 = bus_cmd_ready | _T_1157; // @[el2_lsu_bus_buffer.scala 318:46]
  reg  obuf_nosend; // @[Reg.scala 27:20]
@ -1154,52 +1154,52 @@ module el2_lsu_bus_buffer(
  wire  _T_1161 = ~obuf_wr_wait; // @[el2_lsu_bus_buffer.scala 318:77]
  wire  _T_1162 = _T_1160 & _T_1161; // @[el2_lsu_bus_buffer.scala 318:75]
  reg [31:0] obuf_addr; // @[el2_lib.scala 491:16]
-  wire  _T_4701 = obuf_addr[31:3] == buf_addr_0[31:3]; // @[el2_lsu_bus_buffer.scala 575:56]
+  wire  _T_4702 = obuf_addr[31:3] == buf_addr_0[31:3]; // @[el2_lsu_bus_buffer.scala 575:56]
-  wire  _T_4702 = obuf_valid & _T_4701; // @[el2_lsu_bus_buffer.scala 575:38]
+  wire  _T_4703 = obuf_valid & _T_4702; // @[el2_lsu_bus_buffer.scala 575:38]
-  wire  _T_4704 = obuf_tag1 == 2'h0; // @[el2_lsu_bus_buffer.scala 575:126]
+  wire  _T_4705 = obuf_tag1 == 2'h0; // @[el2_lsu_bus_buffer.scala 575:126]
-  wire  _T_4705 = obuf_merge & _T_4704; // @[el2_lsu_bus_buffer.scala 575:114]
+  wire  _T_4706 = obuf_merge & _T_4705; // @[el2_lsu_bus_buffer.scala 575:114]
-  wire  _T_4706 = _T_3471 | _T_4705; // @[el2_lsu_bus_buffer.scala 575:100]
+  wire  _T_4707 = _T_3471 | _T_4706; // @[el2_lsu_bus_buffer.scala 575:100]
-  wire  _T_4707 = ~_T_4706; // @[el2_lsu_bus_buffer.scala 575:80]
+  wire  _T_4708 = ~_T_4707; // @[el2_lsu_bus_buffer.scala 575:80]
-  wire  _T_4708 = _T_4702 & _T_4707; // @[el2_lsu_bus_buffer.scala 575:78]
+  wire  _T_4709 = _T_4703 & _T_4708; // @[el2_lsu_bus_buffer.scala 575:78]
-  wire  _T_4745 = _T_4678 & _T_4708; // @[Mux.scala 27:72]
+  wire  _T_4746 = _T_4679 & _T_4709; // @[Mux.scala 27:72]
-  wire  _T_4713 = obuf_addr[31:3] == buf_addr_1[31:3]; // @[el2_lsu_bus_buffer.scala 575:56]
+  wire  _T_4714 = obuf_addr[31:3] == buf_addr_1[31:3]; // @[el2_lsu_bus_buffer.scala 575:56]
-  wire  _T_4714 = obuf_valid & _T_4713; // @[el2_lsu_bus_buffer.scala 575:38]
+  wire  _T_4715 = obuf_valid & _T_4714; // @[el2_lsu_bus_buffer.scala 575:38]
-  wire  _T_4716 = obuf_tag1 == 2'h1; // @[el2_lsu_bus_buffer.scala 575:126]
+  wire  _T_4717 = obuf_tag1 == 2'h1; // @[el2_lsu_bus_buffer.scala 575:126]
-  wire  _T_4717 = obuf_merge & _T_4716; // @[el2_lsu_bus_buffer.scala 575:114]
+  wire  _T_4718 = obuf_merge & _T_4717; // @[el2_lsu_bus_buffer.scala 575:114]
-  wire  _T_4718 = _T_3664 | _T_4717; // @[el2_lsu_bus_buffer.scala 575:100]
+  wire  _T_4719 = _T_3664 | _T_4718; // @[el2_lsu_bus_buffer.scala 575:100]
-  wire  _T_4719 = ~_T_4718; // @[el2_lsu_bus_buffer.scala 575:80]
+  wire  _T_4720 = ~_T_4719; // @[el2_lsu_bus_buffer.scala 575:80]
-  wire  _T_4720 = _T_4714 & _T_4719; // @[el2_lsu_bus_buffer.scala 575:78]
+  wire  _T_4721 = _T_4715 & _T_4720; // @[el2_lsu_bus_buffer.scala 575:78]
-  wire  _T_4746 = _T_4682 & _T_4720; // @[Mux.scala 27:72]
+  wire  _T_4747 = _T_4683 & _T_4721; // @[Mux.scala 27:72]
-  wire  _T_4749 = _T_4745 | _T_4746; // @[Mux.scala 27:72]
+  wire  _T_4750 = _T_4746 | _T_4747; // @[Mux.scala 27:72]
-  wire  _T_4725 = obuf_addr[31:3] == buf_addr_2[31:3]; // @[el2_lsu_bus_buffer.scala 575:56]
+  wire  _T_4726 = obuf_addr[31:3] == buf_addr_2[31:3]; // @[el2_lsu_bus_buffer.scala 575:56]
-  wire  _T_4726 = obuf_valid & _T_4725; // @[el2_lsu_bus_buffer.scala 575:38]
+  wire  _T_4727 = obuf_valid & _T_4726; // @[el2_lsu_bus_buffer.scala 575:38]
-  wire  _T_4728 = obuf_tag1 == 2'h2; // @[el2_lsu_bus_buffer.scala 575:126]
+  wire  _T_4729 = obuf_tag1 == 2'h2; // @[el2_lsu_bus_buffer.scala 575:126]
-  wire  _T_4729 = obuf_merge & _T_4728; // @[el2_lsu_bus_buffer.scala 575:114]
+  wire  _T_4730 = obuf_merge & _T_4729; // @[el2_lsu_bus_buffer.scala 575:114]
-  wire  _T_4730 = _T_3857 | _T_4729; // @[el2_lsu_bus_buffer.scala 575:100]
+  wire  _T_4731 = _T_3857 | _T_4730; // @[el2_lsu_bus_buffer.scala 575:100]
-  wire  _T_4731 = ~_T_4730; // @[el2_lsu_bus_buffer.scala 575:80]
+  wire  _T_4732 = ~_T_4731; // @[el2_lsu_bus_buffer.scala 575:80]
-  wire  _T_4732 = _T_4726 & _T_4731; // @[el2_lsu_bus_buffer.scala 575:78]
+  wire  _T_4733 = _T_4727 & _T_4732; // @[el2_lsu_bus_buffer.scala 575:78]
-  wire  _T_4747 = _T_4686 & _T_4732; // @[Mux.scala 27:72]
+  wire  _T_4748 = _T_4687 & _T_4733; // @[Mux.scala 27:72]
-  wire  _T_4750 = _T_4749 | _T_4747; // @[Mux.scala 27:72]
+  wire  _T_4751 = _T_4750 | _T_4748; // @[Mux.scala 27:72]
-  wire  _T_4737 = obuf_addr[31:3] == buf_addr_3[31:3]; // @[el2_lsu_bus_buffer.scala 575:56]
+  wire  _T_4738 = obuf_addr[31:3] == buf_addr_3[31:3]; // @[el2_lsu_bus_buffer.scala 575:56]
-  wire  _T_4738 = obuf_valid & _T_4737; // @[el2_lsu_bus_buffer.scala 575:38]
+  wire  _T_4739 = obuf_valid & _T_4738; // @[el2_lsu_bus_buffer.scala 575:38]
-  wire  _T_4740 = obuf_tag1 == 2'h3; // @[el2_lsu_bus_buffer.scala 575:126]
+  wire  _T_4741 = obuf_tag1 == 2'h3; // @[el2_lsu_bus_buffer.scala 575:126]
-  wire  _T_4741 = obuf_merge & _T_4740; // @[el2_lsu_bus_buffer.scala 575:114]
+  wire  _T_4742 = obuf_merge & _T_4741; // @[el2_lsu_bus_buffer.scala 575:114]
-  wire  _T_4742 = _T_4050 | _T_4741; // @[el2_lsu_bus_buffer.scala 575:100]
+  wire  _T_4743 = _T_4050 | _T_4742; // @[el2_lsu_bus_buffer.scala 575:100]
-  wire  _T_4743 = ~_T_4742; // @[el2_lsu_bus_buffer.scala 575:80]
+  wire  _T_4744 = ~_T_4743; // @[el2_lsu_bus_buffer.scala 575:80]
-  wire  _T_4744 = _T_4738 & _T_4743; // @[el2_lsu_bus_buffer.scala 575:78]
+  wire  _T_4745 = _T_4739 & _T_4744; // @[el2_lsu_bus_buffer.scala 575:78]
-  wire  _T_4748 = _T_4690 & _T_4744; // @[Mux.scala 27:72]
+  wire  _T_4749 = _T_4691 & _T_4745; // @[Mux.scala 27:72]
-  wire  bus_addr_match_pending = _T_4750 | _T_4748; // @[Mux.scala 27:72]
+  wire  bus_addr_match_pending = _T_4751 | _T_4749; // @[Mux.scala 27:72]
  wire  _T_1165 = ~bus_addr_match_pending; // @[el2_lsu_bus_buffer.scala 318:118]
  wire  _T_1166 = _T_1162 & _T_1165; // @[el2_lsu_bus_buffer.scala 318:116]
  wire  obuf_wr_en = _T_1166 & io_lsu_bus_clk_en; // @[el2_lsu_bus_buffer.scala 318:142]
  wire  _T_1168 = obuf_valid & obuf_nosend; // @[el2_lsu_bus_buffer.scala 320:47]
  wire  bus_wcmd_sent = io_lsu_axi_awvalid & io_lsu_axi_awready; // @[el2_lsu_bus_buffer.scala 578:39]
-  wire  _T_4760 = obuf_cmd_done | bus_wcmd_sent; // @[el2_lsu_bus_buffer.scala 580:35]
+  wire  _T_4761 = obuf_cmd_done | bus_wcmd_sent; // @[el2_lsu_bus_buffer.scala 580:35]
  wire  bus_wdata_sent = io_lsu_axi_wvalid & io_lsu_axi_wready; // @[el2_lsu_bus_buffer.scala 579:39]
-  wire  _T_4761 = obuf_data_done | bus_wdata_sent; // @[el2_lsu_bus_buffer.scala 580:70]
+  wire  _T_4762 = obuf_data_done | bus_wdata_sent; // @[el2_lsu_bus_buffer.scala 580:70]
-  wire  _T_4762 = _T_4760 & _T_4761; // @[el2_lsu_bus_buffer.scala 580:52]
+  wire  _T_4763 = _T_4761 & _T_4762; // @[el2_lsu_bus_buffer.scala 580:52]
-  wire  _T_4763 = io_lsu_axi_arvalid & io_lsu_axi_arready; // @[el2_lsu_bus_buffer.scala 580:111]
+  wire  _T_4764 = io_lsu_axi_arvalid & io_lsu_axi_arready; // @[el2_lsu_bus_buffer.scala 580:111]
-  wire  bus_cmd_sent = _T_4762 | _T_4763; // @[el2_lsu_bus_buffer.scala 580:89]
+  wire  bus_cmd_sent = _T_4763 | _T_4764; // @[el2_lsu_bus_buffer.scala 580:89]
  wire  _T_1169 = bus_cmd_sent | _T_1168; // @[el2_lsu_bus_buffer.scala 320:33]
  wire  _T_1170 = ~obuf_wr_en; // @[el2_lsu_bus_buffer.scala 320:65]
  wire  _T_1171 = _T_1169 & _T_1170; // @[el2_lsu_bus_buffer.scala 320:63]
@ -1999,15 +1999,15 @@ module el2_lsu_bus_buffer(
  wire  _T_3484 = _T_3482 & _T_1259; // @[el2_lsu_bus_buffer.scala 482:74]
  wire  _T_3487 = _T_3477 & obuf_nosend; // @[el2_lsu_bus_buffer.scala 484:67]
  wire  _T_3488 = _T_3487 & bus_rsp_read; // @[el2_lsu_bus_buffer.scala 484:81]
-  wire  _T_4769 = io_lsu_axi_bresp != 2'h0; // @[el2_lsu_bus_buffer.scala 586:58]
+  wire  _T_4770 = io_lsu_axi_bresp != 2'h0; // @[el2_lsu_bus_buffer.scala 586:58]
-  wire  bus_rsp_read_error = bus_rsp_read & _T_4769; // @[el2_lsu_bus_buffer.scala 586:38]
+  wire  bus_rsp_read_error = bus_rsp_read & _T_4770; // @[el2_lsu_bus_buffer.scala 586:38]
  wire  _T_3491 = _T_3487 & bus_rsp_read_error; // @[el2_lsu_bus_buffer.scala 485:82]
  wire [31:0] _T_3496 = buf_addr_0[2] ? io_lsu_axi_rdata[63:32] : io_lsu_axi_rdata[31:0]; // @[el2_lsu_bus_buffer.scala 486:73]
  wire  _T_3566 = bus_rsp_read_error & _T_3545; // @[el2_lsu_bus_buffer.scala 499:91]
  wire  _T_3568 = bus_rsp_read_error & buf_ldfwd[0]; // @[el2_lsu_bus_buffer.scala 500:31]
  wire  _T_3570 = _T_3568 & _T_3547; // @[el2_lsu_bus_buffer.scala 500:46]
  wire  _T_3571 = _T_3566 | _T_3570; // @[el2_lsu_bus_buffer.scala 499:143]
-  wire  bus_rsp_write_error = bus_rsp_write & _T_4769; // @[el2_lsu_bus_buffer.scala 585:40]
+  wire  bus_rsp_write_error = bus_rsp_write & _T_4770; // @[el2_lsu_bus_buffer.scala 585:40]
  wire  _T_3574 = bus_rsp_write_error & _T_3543; // @[el2_lsu_bus_buffer.scala 501:53]
  wire  _T_3575 = _T_3571 | _T_3574; // @[el2_lsu_bus_buffer.scala 500:88]
  wire  _T_3576 = _T_3477 & _T_3575; // @[el2_lsu_bus_buffer.scala 499:68]
@ -2415,92 +2415,94 @@ module el2_lsu_bus_buffer(
  wire [31:0] _T_4591 = _T_4587 ? buf_addr_3 : 32'h0; // @[Mux.scala 27:72]
  wire [31:0] _T_4592 = _T_4588 | _T_4589; // @[Mux.scala 27:72]
  wire [31:0] _T_4593 = _T_4592 | _T_4590; // @[Mux.scala 27:72]
-  wire [31:0] lsu_nonblock_addr_offset = _T_4593 | _T_4591; // @[Mux.scala 27:72]
+  wire [31:0] _T_4594 = _T_4593 | _T_4591; // @[Mux.scala 27:72]
-  wire [1:0] _T_4599 = _T_4584 ? buf_sz_0 : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] lsu_nonblock_addr_offset = _T_4594[1:0]; // @[el2_lsu_bus_buffer.scala 562:83]
-  wire [1:0] _T_4600 = _T_4585 ? buf_sz_1 : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] _T_4600 = _T_4584 ? buf_sz_0 : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] _T_4601 = _T_4586 ? buf_sz_2 : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] _T_4601 = _T_4585 ? buf_sz_1 : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] _T_4602 = _T_4587 ? buf_sz_3 : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] _T_4602 = _T_4586 ? buf_sz_2 : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] _T_4603 = _T_4599 | _T_4600; // @[Mux.scala 27:72]
+  wire [1:0] _T_4603 = _T_4587 ? buf_sz_3 : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] _T_4604 = _T_4603 | _T_4601; // @[Mux.scala 27:72]
+  wire [1:0] _T_4604 = _T_4600 | _T_4601; // @[Mux.scala 27:72]
-  wire [1:0] lsu_nonblock_sz = _T_4604 | _T_4602; // @[Mux.scala 27:72]
+  wire [1:0] _T_4605 = _T_4604 | _T_4602; // @[Mux.scala 27:72]
-  wire  _T_4614 = _T_4584 & buf_unsign[0]; // @[Mux.scala 27:72]
+  wire [1:0] lsu_nonblock_sz = _T_4605 | _T_4603; // @[Mux.scala 27:72]
-  wire  _T_4615 = _T_4585 & buf_unsign[1]; // @[Mux.scala 27:72]
+  wire  _T_4615 = _T_4584 & buf_unsign[0]; // @[Mux.scala 27:72]
-  wire  _T_4616 = _T_4586 & buf_unsign[2]; // @[Mux.scala 27:72]
+  wire  _T_4616 = _T_4585 & buf_unsign[1]; // @[Mux.scala 27:72]
-  wire  _T_4617 = _T_4587 & buf_unsign[3]; // @[Mux.scala 27:72]
+  wire  _T_4617 = _T_4586 & buf_unsign[2]; // @[Mux.scala 27:72]
-  wire  _T_4618 = _T_4614 | _T_4615; // @[Mux.scala 27:72]
+  wire  _T_4618 = _T_4587 & buf_unsign[3]; // @[Mux.scala 27:72]
-  wire  _T_4619 = _T_4618 | _T_4616; // @[Mux.scala 27:72]
+  wire  _T_4619 = _T_4615 | _T_4616; // @[Mux.scala 27:72]
-  wire  lsu_nonblock_unsign = _T_4619 | _T_4617; // @[Mux.scala 27:72]
+  wire  _T_4620 = _T_4619 | _T_4617; // @[Mux.scala 27:72]
-  wire [63:0] _T_4639 = {lsu_nonblock_load_data_hi,lsu_nonblock_load_data_lo}; // @[Cat.scala 29:58]
+  wire  lsu_nonblock_unsign = _T_4620 | _T_4618; // @[Mux.scala 27:72]
-  wire [35:0] _T_4640 = lsu_nonblock_addr_offset * 32'h8; // @[el2_lsu_bus_buffer.scala 566:121]
+  wire [63:0] _T_4640 = {lsu_nonblock_load_data_hi,lsu_nonblock_load_data_lo}; // @[Cat.scala 29:58]
-  wire [63:0] lsu_nonblock_data_unalgn = _T_4639 >> _T_4640; // @[el2_lsu_bus_buffer.scala 566:92]
+  wire [3:0] _GEN_394 = {{2'd0}, lsu_nonblock_addr_offset}; // @[el2_lsu_bus_buffer.scala 566:121]
-  wire  _T_4641 = ~io_lsu_nonblock_load_data_error; // @[el2_lsu_bus_buffer.scala 567:69]
+  wire [5:0] _T_4641 = _GEN_394 * 4'h8; // @[el2_lsu_bus_buffer.scala 566:121]
-  wire  _T_4643 = lsu_nonblock_sz == 2'h0; // @[el2_lsu_bus_buffer.scala 568:81]
+  wire [63:0] lsu_nonblock_data_unalgn = _T_4640 >> _T_4641; // @[el2_lsu_bus_buffer.scala 566:92]
-  wire  _T_4644 = lsu_nonblock_unsign & _T_4643; // @[el2_lsu_bus_buffer.scala 568:63]
+  wire  _T_4642 = ~io_lsu_nonblock_load_data_error; // @[el2_lsu_bus_buffer.scala 567:69]
-  wire [31:0] _T_4646 = {24'h0,lsu_nonblock_data_unalgn[7:0]}; // @[Cat.scala 29:58]
+  wire  _T_4644 = lsu_nonblock_sz == 2'h0; // @[el2_lsu_bus_buffer.scala 568:81]
-  wire  _T_4647 = lsu_nonblock_sz == 2'h1; // @[el2_lsu_bus_buffer.scala 569:45]
+  wire  _T_4645 = lsu_nonblock_unsign & _T_4644; // @[el2_lsu_bus_buffer.scala 568:63]
-  wire  _T_4648 = lsu_nonblock_unsign & _T_4647; // @[el2_lsu_bus_buffer.scala 569:26]
+  wire [31:0] _T_4647 = {24'h0,lsu_nonblock_data_unalgn[7:0]}; // @[Cat.scala 29:58]
-  wire [31:0] _T_4650 = {16'h0,lsu_nonblock_data_unalgn[15:0]}; // @[Cat.scala 29:58]
+  wire  _T_4648 = lsu_nonblock_sz == 2'h1; // @[el2_lsu_bus_buffer.scala 569:45]
-  wire  _T_4651 = ~lsu_nonblock_unsign; // @[el2_lsu_bus_buffer.scala 570:6]
+  wire  _T_4649 = lsu_nonblock_unsign & _T_4648; // @[el2_lsu_bus_buffer.scala 569:26]
-  wire  _T_4653 = _T_4651 & _T_4643; // @[el2_lsu_bus_buffer.scala 570:27]
+  wire [31:0] _T_4651 = {16'h0,lsu_nonblock_data_unalgn[15:0]}; // @[Cat.scala 29:58]
-  wire [23:0] _T_4656 = lsu_nonblock_data_unalgn[7] ? 24'hffffff : 24'h0; // @[Bitwise.scala 72:12]
+  wire  _T_4652 = ~lsu_nonblock_unsign; // @[el2_lsu_bus_buffer.scala 570:6]
-  wire [31:0] _T_4658 = {_T_4656,lsu_nonblock_data_unalgn[7:0]}; // @[Cat.scala 29:58]
+  wire  _T_4654 = _T_4652 & _T_4644; // @[el2_lsu_bus_buffer.scala 570:27]
-  wire  _T_4661 = _T_4651 & _T_4647; // @[el2_lsu_bus_buffer.scala 571:27]
+  wire [23:0] _T_4657 = lsu_nonblock_data_unalgn[7] ? 24'hffffff : 24'h0; // @[Bitwise.scala 72:12]
-  wire [15:0] _T_4664 = lsu_nonblock_data_unalgn[15] ? 16'hffff : 16'h0; // @[Bitwise.scala 72:12]
+  wire [31:0] _T_4659 = {_T_4657,lsu_nonblock_data_unalgn[7:0]}; // @[Cat.scala 29:58]
-  wire [31:0] _T_4666 = {_T_4664,lsu_nonblock_data_unalgn[15:0]}; // @[Cat.scala 29:58]
+  wire  _T_4662 = _T_4652 & _T_4648; // @[el2_lsu_bus_buffer.scala 571:27]
-  wire  _T_4667 = lsu_nonblock_sz == 2'h2; // @[el2_lsu_bus_buffer.scala 572:21]
+  wire [15:0] _T_4665 = lsu_nonblock_data_unalgn[15] ? 16'hffff : 16'h0; // @[Bitwise.scala 72:12]
-  wire [31:0] _T_4668 = _T_4644 ? _T_4646 : 32'h0; // @[Mux.scala 27:72]
+  wire [31:0] _T_4667 = {_T_4665,lsu_nonblock_data_unalgn[15:0]}; // @[Cat.scala 29:58]
-  wire [31:0] _T_4669 = _T_4648 ? _T_4650 : 32'h0; // @[Mux.scala 27:72]
+  wire  _T_4668 = lsu_nonblock_sz == 2'h2; // @[el2_lsu_bus_buffer.scala 572:21]
-  wire [31:0] _T_4670 = _T_4653 ? _T_4658 : 32'h0; // @[Mux.scala 27:72]
+  wire [31:0] _T_4669 = _T_4645 ? _T_4647 : 32'h0; // @[Mux.scala 27:72]
-  wire [31:0] _T_4671 = _T_4661 ? _T_4666 : 32'h0; // @[Mux.scala 27:72]
+  wire [31:0] _T_4670 = _T_4649 ? _T_4651 : 32'h0; // @[Mux.scala 27:72]
-  wire [63:0] _T_4672 = _T_4667 ? lsu_nonblock_data_unalgn : 64'h0; // @[Mux.scala 27:72]
+  wire [31:0] _T_4671 = _T_4654 ? _T_4659 : 32'h0; // @[Mux.scala 27:72]
-  wire [31:0] _T_4673 = _T_4668 | _T_4669; // @[Mux.scala 27:72]
+  wire [31:0] _T_4672 = _T_4662 ? _T_4667 : 32'h0; // @[Mux.scala 27:72]
-  wire [31:0] _T_4674 = _T_4673 | _T_4670; // @[Mux.scala 27:72]
+  wire [63:0] _T_4673 = _T_4668 ? lsu_nonblock_data_unalgn : 64'h0; // @[Mux.scala 27:72]
  wire [31:0] _T_4674 = _T_4669 | _T_4670; // @[Mux.scala 27:72]
  wire [31:0] _T_4675 = _T_4674 | _T_4671; // @[Mux.scala 27:72]
-  wire [63:0] _GEN_394 = {{32'd0}, _T_4675}; // @[Mux.scala 27:72]
+  wire [31:0] _T_4676 = _T_4675 | _T_4672; // @[Mux.scala 27:72]
-  wire [63:0] _T_4676 = _GEN_394 | _T_4672; // @[Mux.scala 27:72]
+  wire [63:0] _GEN_395 = {{32'd0}, _T_4676}; // @[Mux.scala 27:72]
-  wire  _T_4771 = obuf_valid & obuf_write; // @[el2_lsu_bus_buffer.scala 590:36]
+  wire [63:0] _T_4677 = _GEN_395 | _T_4673; // @[Mux.scala 27:72]
-  wire  _T_4772 = ~obuf_cmd_done; // @[el2_lsu_bus_buffer.scala 590:51]
+  wire  _T_4772 = obuf_valid & obuf_write; // @[el2_lsu_bus_buffer.scala 590:36]
-  wire  _T_4773 = _T_4771 & _T_4772; // @[el2_lsu_bus_buffer.scala 590:49]
+  wire  _T_4773 = ~obuf_cmd_done; // @[el2_lsu_bus_buffer.scala 590:51]
-  wire [31:0] _T_4777 = {obuf_addr[31:3],3'h0}; // @[Cat.scala 29:58]
+  wire  _T_4774 = _T_4772 & _T_4773; // @[el2_lsu_bus_buffer.scala 590:49]
-  wire [2:0] _T_4779 = {1'h0,obuf_sz}; // @[Cat.scala 29:58]
+  wire [31:0] _T_4778 = {obuf_addr[31:3],3'h0}; // @[Cat.scala 29:58]
-  wire  _T_4784 = ~obuf_data_done; // @[el2_lsu_bus_buffer.scala 602:50]
+  wire [2:0] _T_4780 = {1'h0,obuf_sz}; // @[Cat.scala 29:58]
-  wire  _T_4785 = _T_4771 & _T_4784; // @[el2_lsu_bus_buffer.scala 602:48]
+  wire  _T_4785 = ~obuf_data_done; // @[el2_lsu_bus_buffer.scala 602:50]
-  wire [7:0] _T_4789 = obuf_write ? 8'hff : 8'h0; // @[Bitwise.scala 72:12]
+  wire  _T_4786 = _T_4772 & _T_4785; // @[el2_lsu_bus_buffer.scala 602:48]
-  wire  _T_4792 = obuf_valid & _T_1269; // @[el2_lsu_bus_buffer.scala 607:36]
+  wire [7:0] _T_4790 = obuf_write ? 8'hff : 8'h0; // @[Bitwise.scala 72:12]
-  wire  _T_4794 = _T_4792 & _T_1275; // @[el2_lsu_bus_buffer.scala 607:50]
+  wire  _T_4793 = obuf_valid & _T_1269; // @[el2_lsu_bus_buffer.scala 607:36]
-  wire  _T_4806 = io_lsu_bus_clk_en_q & buf_error[0]; // @[el2_lsu_bus_buffer.scala 620:114]
+  wire  _T_4795 = _T_4793 & _T_1275; // @[el2_lsu_bus_buffer.scala 607:50]
-  wire  _T_4808 = _T_4806 & buf_write[0]; // @[el2_lsu_bus_buffer.scala 620:129]
+  wire  _T_4807 = io_lsu_bus_clk_en_q & buf_error[0]; // @[el2_lsu_bus_buffer.scala 620:114]
-  wire  _T_4811 = io_lsu_bus_clk_en_q & buf_error[1]; // @[el2_lsu_bus_buffer.scala 620:114]
+  wire  _T_4809 = _T_4807 & buf_write[0]; // @[el2_lsu_bus_buffer.scala 620:129]
-  wire  _T_4813 = _T_4811 & buf_write[1]; // @[el2_lsu_bus_buffer.scala 620:129]
+  wire  _T_4812 = io_lsu_bus_clk_en_q & buf_error[1]; // @[el2_lsu_bus_buffer.scala 620:114]
-  wire  _T_4816 = io_lsu_bus_clk_en_q & buf_error[2]; // @[el2_lsu_bus_buffer.scala 620:114]
+  wire  _T_4814 = _T_4812 & buf_write[1]; // @[el2_lsu_bus_buffer.scala 620:129]
-  wire  _T_4818 = _T_4816 & buf_write[2]; // @[el2_lsu_bus_buffer.scala 620:129]
+  wire  _T_4817 = io_lsu_bus_clk_en_q & buf_error[2]; // @[el2_lsu_bus_buffer.scala 620:114]
-  wire  _T_4821 = io_lsu_bus_clk_en_q & buf_error[3]; // @[el2_lsu_bus_buffer.scala 620:114]
+  wire  _T_4819 = _T_4817 & buf_write[2]; // @[el2_lsu_bus_buffer.scala 620:129]
-  wire  _T_4823 = _T_4821 & buf_write[3]; // @[el2_lsu_bus_buffer.scala 620:129]
+  wire  _T_4822 = io_lsu_bus_clk_en_q & buf_error[3]; // @[el2_lsu_bus_buffer.scala 620:114]
-  wire  _T_4824 = _T_2708 & _T_4808; // @[Mux.scala 27:72]
+  wire  _T_4824 = _T_4822 & buf_write[3]; // @[el2_lsu_bus_buffer.scala 620:129]
-  wire  _T_4825 = _T_2730 & _T_4813; // @[Mux.scala 27:72]
+  wire  _T_4825 = _T_2708 & _T_4809; // @[Mux.scala 27:72]
-  wire  _T_4826 = _T_2752 & _T_4818; // @[Mux.scala 27:72]
+  wire  _T_4826 = _T_2730 & _T_4814; // @[Mux.scala 27:72]
-  wire  _T_4827 = _T_2774 & _T_4823; // @[Mux.scala 27:72]
+  wire  _T_4827 = _T_2752 & _T_4819; // @[Mux.scala 27:72]
-  wire  _T_4828 = _T_4824 | _T_4825; // @[Mux.scala 27:72]
+  wire  _T_4828 = _T_2774 & _T_4824; // @[Mux.scala 27:72]
-  wire  _T_4829 = _T_4828 | _T_4826; // @[Mux.scala 27:72]
+  wire  _T_4829 = _T_4825 | _T_4826; // @[Mux.scala 27:72]
-  wire  _T_4839 = _T_2730 & buf_error[1]; // @[el2_lsu_bus_buffer.scala 621:98]
+  wire  _T_4830 = _T_4829 | _T_4827; // @[Mux.scala 27:72]
-  wire  lsu_imprecise_error_store_tag = _T_4839 & buf_write[1]; // @[el2_lsu_bus_buffer.scala 621:113]
+  wire  _T_4840 = _T_2730 & buf_error[1]; // @[el2_lsu_bus_buffer.scala 621:98]
-  wire  _T_4845 = ~io_lsu_imprecise_error_store_any; // @[el2_lsu_bus_buffer.scala 623:72]
+  wire  lsu_imprecise_error_store_tag = _T_4840 & buf_write[1]; // @[el2_lsu_bus_buffer.scala 621:113]
-  wire  _T_4847 = ~lsu_imprecise_error_store_tag; // @[el2_lsu_bus_buffer.scala 111:123]
+  wire  _T_4846 = ~io_lsu_imprecise_error_store_any; // @[el2_lsu_bus_buffer.scala 623:72]
-  wire [31:0] _T_4849 = _T_4847 ? buf_addr_0 : 32'h0; // @[Mux.scala 27:72]
+  wire  _T_4848 = ~lsu_imprecise_error_store_tag; // @[el2_lsu_bus_buffer.scala 111:123]
-  wire [31:0] _T_4850 = lsu_imprecise_error_store_tag ? buf_addr_1 : 32'h0; // @[Mux.scala 27:72]
+  wire [31:0] _T_4850 = _T_4848 ? buf_addr_0 : 32'h0; // @[Mux.scala 27:72]
-  wire [31:0] _T_4851 = _T_4849 | _T_4850; // @[Mux.scala 27:72]
+  wire [31:0] _T_4851 = lsu_imprecise_error_store_tag ? buf_addr_1 : 32'h0; // @[Mux.scala 27:72]
-  wire  _T_4868 = bus_wcmd_sent | bus_wdata_sent; // @[el2_lsu_bus_buffer.scala 630:68]
+  wire [31:0] _T_4852 = _T_4850 | _T_4851; // @[Mux.scala 27:72]
-  wire  _T_4871 = io_lsu_busreq_r & io_ldst_dual_r; // @[el2_lsu_bus_buffer.scala 631:48]
+  wire  _T_4869 = bus_wcmd_sent | bus_wdata_sent; // @[el2_lsu_bus_buffer.scala 630:68]
-  wire  _T_4874 = ~io_lsu_axi_awready; // @[el2_lsu_bus_buffer.scala 634:48]
+  wire  _T_4872 = io_lsu_busreq_r & io_ldst_dual_r; // @[el2_lsu_bus_buffer.scala 631:48]
-  wire  _T_4875 = io_lsu_axi_awvalid & _T_4874; // @[el2_lsu_bus_buffer.scala 634:46]
+  wire  _T_4875 = ~io_lsu_axi_awready; // @[el2_lsu_bus_buffer.scala 634:48]
-  wire  _T_4876 = ~io_lsu_axi_wready; // @[el2_lsu_bus_buffer.scala 634:92]
+  wire  _T_4876 = io_lsu_axi_awvalid & _T_4875; // @[el2_lsu_bus_buffer.scala 634:46]
-  wire  _T_4877 = io_lsu_axi_wvalid & _T_4876; // @[el2_lsu_bus_buffer.scala 634:90]
+  wire  _T_4877 = ~io_lsu_axi_wready; // @[el2_lsu_bus_buffer.scala 634:92]
-  wire  _T_4878 = _T_4875 | _T_4877; // @[el2_lsu_bus_buffer.scala 634:69]
+  wire  _T_4878 = io_lsu_axi_wvalid & _T_4877; // @[el2_lsu_bus_buffer.scala 634:90]
-  wire  _T_4879 = ~io_lsu_axi_arready; // @[el2_lsu_bus_buffer.scala 634:136]
+  wire  _T_4879 = _T_4876 | _T_4878; // @[el2_lsu_bus_buffer.scala 634:69]
-  wire  _T_4880 = io_lsu_axi_arvalid & _T_4879; // @[el2_lsu_bus_buffer.scala 634:134]
+  wire  _T_4880 = ~io_lsu_axi_arready; // @[el2_lsu_bus_buffer.scala 634:136]
-  wire  _T_4884 = ~io_flush_r; // @[el2_lsu_bus_buffer.scala 638:75]
+  wire  _T_4881 = io_lsu_axi_arvalid & _T_4880; // @[el2_lsu_bus_buffer.scala 634:134]
-  wire  _T_4885 = io_lsu_busreq_m & _T_4884; // @[el2_lsu_bus_buffer.scala 638:73]
+  wire  _T_4885 = ~io_flush_r; // @[el2_lsu_bus_buffer.scala 638:75]
-  reg  _T_4888; // @[el2_lsu_bus_buffer.scala 638:56]
+  wire  _T_4886 = io_lsu_busreq_m & _T_4885; // @[el2_lsu_bus_buffer.scala 638:73]
  reg  _T_4889; // @[el2_lsu_bus_buffer.scala 638:56]
  rvclkhdr rvclkhdr ( // @[el2_lib.scala 485:23]
    .io_l1clk(rvclkhdr_io_l1clk),
    .io_clk(rvclkhdr_io_clk),
@ -2573,7 +2575,7 @@ module el2_lsu_bus_buffer(
    .io_en(rvclkhdr_11_io_en),
    .io_scan_mode(rvclkhdr_11_io_scan_mode)
  );
-  assign io_lsu_busreq_r = _T_4888; // @[el2_lsu_bus_buffer.scala 638:19]
+  assign io_lsu_busreq_r = _T_4889; // @[el2_lsu_bus_buffer.scala 638:19]
  assign io_lsu_bus_buffer_pend_any = |buf_numvld_pend_any; // @[el2_lsu_bus_buffer.scala 548:30]
  assign io_lsu_bus_buffer_full_any = _T_4399 ? _T_4400 : _T_4401; // @[el2_lsu_bus_buffer.scala 549:30]
  assign io_lsu_bus_buffer_empty_any = _T_4412 & _T_1157; // @[el2_lsu_bus_buffer.scala 550:31]
@ -2582,43 +2584,43 @@ module el2_lsu_bus_buffer(
  assign io_ld_byte_hit_buf_hi = {_T_84,_T_73}; // @[el2_lsu_bus_buffer.scala 189:25]
  assign io_ld_fwddata_buf_lo = _T_646[31:0]; // @[el2_lsu_bus_buffer.scala 214:24]
  assign io_ld_fwddata_buf_hi = _T_741[31:0]; // @[el2_lsu_bus_buffer.scala 219:24]
-  assign io_lsu_imprecise_error_load_any = io_lsu_nonblock_load_data_error & _T_4845; // @[el2_lsu_bus_buffer.scala 623:35]
+  assign io_lsu_imprecise_error_load_any = io_lsu_nonblock_load_data_error & _T_4846; // @[el2_lsu_bus_buffer.scala 623:35]
-  assign io_lsu_imprecise_error_store_any = _T_4829 | _T_4827; // @[el2_lsu_bus_buffer.scala 620:36]
+  assign io_lsu_imprecise_error_store_any = _T_4830 | _T_4828; // @[el2_lsu_bus_buffer.scala 620:36]
-  assign io_lsu_imprecise_error_addr_any = io_lsu_imprecise_error_store_any ? _T_4851 : lsu_nonblock_addr_offset; // @[el2_lsu_bus_buffer.scala 624:35]
+  assign io_lsu_imprecise_error_addr_any = io_lsu_imprecise_error_store_any ? _T_4852 : _T_4594; // @[el2_lsu_bus_buffer.scala 624:35]
  assign io_lsu_nonblock_load_valid_m = _T_4418 & _T_4419; // @[el2_lsu_bus_buffer.scala 552:32]
  assign io_lsu_nonblock_load_tag_m = _T_1789 ? 2'h0 : _T_1825; // @[el2_lsu_bus_buffer.scala 553:30]
  assign io_lsu_nonblock_load_inv_r = lsu_nonblock_load_valid_r & _T_4421; // @[el2_lsu_bus_buffer.scala 555:30]
  assign io_lsu_nonblock_load_inv_tag_r = WrPtr0_r; // @[el2_lsu_bus_buffer.scala 556:34]
-  assign io_lsu_nonblock_load_data_valid = lsu_nonblock_load_data_ready & _T_4641; // @[el2_lsu_bus_buffer.scala 567:35]
+  assign io_lsu_nonblock_load_data_valid = lsu_nonblock_load_data_ready & _T_4642; // @[el2_lsu_bus_buffer.scala 567:35]
  assign io_lsu_nonblock_load_data_error = _T_4471 | _T_4469; // @[el2_lsu_bus_buffer.scala 558:35]
  assign io_lsu_nonblock_load_data_tag = _T_4511 | _T_4509; // @[el2_lsu_bus_buffer.scala 559:33]
-  assign io_lsu_nonblock_load_data = _T_4676[31:0]; // @[el2_lsu_bus_buffer.scala 568:29]
+  assign io_lsu_nonblock_load_data = _T_4677[31:0]; // @[el2_lsu_bus_buffer.scala 568:29]
-  assign io_lsu_pmu_bus_trxn = _T_4868 | _T_4763; // @[el2_lsu_bus_buffer.scala 630:23]
+  assign io_lsu_pmu_bus_trxn = _T_4869 | _T_4764; // @[el2_lsu_bus_buffer.scala 630:23]
-  assign io_lsu_pmu_bus_misaligned = _T_4871 & io_lsu_commit_r; // @[el2_lsu_bus_buffer.scala 631:29]
+  assign io_lsu_pmu_bus_misaligned = _T_4872 & io_lsu_commit_r; // @[el2_lsu_bus_buffer.scala 631:29]
  assign io_lsu_pmu_bus_error = io_lsu_imprecise_error_load_any | io_lsu_imprecise_error_store_any; // @[el2_lsu_bus_buffer.scala 632:24]
-  assign io_lsu_pmu_bus_busy = _T_4878 | _T_4880; // @[el2_lsu_bus_buffer.scala 634:23]
+  assign io_lsu_pmu_bus_busy = _T_4879 | _T_4881; // @[el2_lsu_bus_buffer.scala 634:23]
-  assign io_lsu_axi_awvalid = _T_4773 & _T_1165; // @[el2_lsu_bus_buffer.scala 590:22]
+  assign io_lsu_axi_awvalid = _T_4774 & _T_1165; // @[el2_lsu_bus_buffer.scala 590:22]
  assign io_lsu_axi_awid = {{1'd0}, _T_1774}; // @[el2_lsu_bus_buffer.scala 591:19]
-  assign io_lsu_axi_awaddr = obuf_sideeffect ? obuf_addr : _T_4777; // @[el2_lsu_bus_buffer.scala 592:21]
+  assign io_lsu_axi_awaddr = obuf_sideeffect ? obuf_addr : _T_4778; // @[el2_lsu_bus_buffer.scala 592:21]
  assign io_lsu_axi_awregion = obuf_addr[31:28]; // @[el2_lsu_bus_buffer.scala 596:23]
  assign io_lsu_axi_awlen = 8'h0; // @[el2_lsu_bus_buffer.scala 597:20]
-  assign io_lsu_axi_awsize = obuf_sideeffect ? _T_4779 : 3'h3; // @[el2_lsu_bus_buffer.scala 593:21]
+  assign io_lsu_axi_awsize = obuf_sideeffect ? _T_4780 : 3'h3; // @[el2_lsu_bus_buffer.scala 593:21]
  assign io_lsu_axi_awburst = 2'h1; // @[el2_lsu_bus_buffer.scala 598:22]
  assign io_lsu_axi_awlock = 1'h0; // @[el2_lsu_bus_buffer.scala 600:21]
  assign io_lsu_axi_awcache = obuf_sideeffect ? 4'h0 : 4'hf; // @[el2_lsu_bus_buffer.scala 595:22]
  assign io_lsu_axi_awprot = 3'h0; // @[el2_lsu_bus_buffer.scala 594:21]
  assign io_lsu_axi_awqos = 4'h0; // @[el2_lsu_bus_buffer.scala 599:20]
-  assign io_lsu_axi_wvalid = _T_4785 & _T_1165; // @[el2_lsu_bus_buffer.scala 602:21]
+  assign io_lsu_axi_wvalid = _T_4786 & _T_1165; // @[el2_lsu_bus_buffer.scala 602:21]
  assign io_lsu_axi_wdata = obuf_data; // @[el2_lsu_bus_buffer.scala 604:20]
-  assign io_lsu_axi_wstrb = obuf_byteen & _T_4789; // @[el2_lsu_bus_buffer.scala 603:20]
+  assign io_lsu_axi_wstrb = obuf_byteen & _T_4790; // @[el2_lsu_bus_buffer.scala 603:20]
  assign io_lsu_axi_wlast = 1'h1; // @[el2_lsu_bus_buffer.scala 605:20]
  assign io_lsu_axi_bready = 1'h1; // @[el2_lsu_bus_buffer.scala 618:21]
-  assign io_lsu_axi_arvalid = _T_4794 & _T_1165; // @[el2_lsu_bus_buffer.scala 607:22]
+  assign io_lsu_axi_arvalid = _T_4795 & _T_1165; // @[el2_lsu_bus_buffer.scala 607:22]
  assign io_lsu_axi_arid = {{1'd0}, _T_1774}; // @[el2_lsu_bus_buffer.scala 608:19]
-  assign io_lsu_axi_araddr = obuf_sideeffect ? obuf_addr : _T_4777; // @[el2_lsu_bus_buffer.scala 609:21]
+  assign io_lsu_axi_araddr = obuf_sideeffect ? obuf_addr : _T_4778; // @[el2_lsu_bus_buffer.scala 609:21]
  assign io_lsu_axi_arregion = obuf_addr[31:28]; // @[el2_lsu_bus_buffer.scala 613:23]
  assign io_lsu_axi_arlen = 8'h0; // @[el2_lsu_bus_buffer.scala 614:20]
-  assign io_lsu_axi_arsize = obuf_sideeffect ? _T_4779 : 3'h3; // @[el2_lsu_bus_buffer.scala 610:21]
+  assign io_lsu_axi_arsize = obuf_sideeffect ? _T_4780 : 3'h3; // @[el2_lsu_bus_buffer.scala 610:21]
  assign io_lsu_axi_arburst = 2'h1; // @[el2_lsu_bus_buffer.scala 615:22]
  assign io_lsu_axi_arlock = 1'h0; // @[el2_lsu_bus_buffer.scala 617:21]
  assign io_lsu_axi_arcache = obuf_sideeffect ? 4'h0 : 4'hf; // @[el2_lsu_bus_buffer.scala 612:22]
@ -2910,7 +2912,7 @@ initial begin
  _RAND_105 = {1{`RANDOM}};
  lsu_nonblock_load_valid_r = _RAND_105[0:0];
  _RAND_106 = {1{`RANDOM}};
-  _T_4888 = _RAND_106[0:0];
+  _T_4889 = _RAND_106[0:0];
 `endif // RANDOMIZE_REG_INIT
  if (reset) begin
    buf_addr_0 = 32'h0;
@ -3231,7 +3233,7 @@ initial begin
    lsu_nonblock_load_valid_r = 1'h0;
  end
  if (reset) begin
-    _T_4888 = 1'h0;
+    _T_4889 = 1'h0;
  end
  `endif // RANDOMIZE
 end // initial
@ -3930,14 +3932,14 @@ end // initial
    if (reset) begin
      obuf_cmd_done <= 1'h0;
    end else begin
-      obuf_cmd_done <= _T_1231 & _T_4760;
+      obuf_cmd_done <= _T_1231 & _T_4761;
    end
  end
  always @(posedge io_lsu_busm_clk or posedge reset) begin
    if (reset) begin
      obuf_data_done <= 1'h0;
    end else begin
-      obuf_data_done <= _T_1231 & _T_4761;
+      obuf_data_done <= _T_1231 & _T_4762;
    end
  end
  always @(posedge io_lsu_free_c2_clk or posedge reset) begin
@ -4335,9 +4337,9 @@ end // initial
  end
  always @(posedge io_lsu_c2_r_clk or posedge reset) begin
    if (reset) begin
-      _T_4888 <= 1'h0;
+      _T_4889 <= 1'h0;
    end else begin
-      _T_4888 <= _T_4885 & _T_4419;
+      _T_4889 <= _T_4886 & _T_4419;
    end
  end
 endmodule
--- a/src/main/scala/lsu/el2_lsu_bus_buffer.scala
+++ b/src/main/scala/lsu/el2_lsu_bus_buffer.scala
@ -559,7 +559,7 @@ class  el2_lsu_bus_buffer extends Module with RequireAsyncReset with el2_lib {
  io.lsu_nonblock_load_data_tag := Mux1H((0 until DEPTH).map(i=>((buf_state(i)===done_C) & !buf_write(i) & (!buf_dual(i) | !buf_dualhi(i))) -> i.U))
  val lsu_nonblock_load_data_lo = Mux1H((0 until DEPTH).map(i=>((buf_state(i)===done_C) & !buf_write(i) & (!buf_dual(i) | !buf_dualhi(i))) -> buf_data(i)))
  val lsu_nonblock_load_data_hi = Mux1H((0 until DEPTH).map(i=>((buf_state(i)===done_C) & !buf_write(i) & (buf_dual(i) | buf_dualhi(i))) -> buf_data(i)))
-  val lsu_nonblock_addr_offset = indexing(buf_addr, io.lsu_nonblock_load_data_tag)
+  val lsu_nonblock_addr_offset = indexing(buf_addr, io.lsu_nonblock_load_data_tag)(1,0)
  val lsu_nonblock_sz = indexing(buf_sz, io.lsu_nonblock_load_data_tag)
  val lsu_nonblock_unsign = indexing(buf_unsign, io.lsu_nonblock_load_data_tag)
  val lsu_nonblock_dual = indexing(buf_dual.map(_.asUInt).reverse.reduce(Cat(_,_)), io.lsu_nonblock_load_data_tag)
--- a/target/scala-2.12/classes/lsu/el2_lsu_bus_buffer.class
+++ b/target/scala-2.12/classes/lsu/el2_lsu_bus_buffer.class