From 4e107cc6400392ef5159ed577327292ea1e2ead1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=E2=80=8Blaraibkhan119?= <​laraibnasir119@gmail.com> Date: Thu, 22 Oct 2020 14:52:47 +0500 Subject: [PATCH] lsu updated --- TEC_RV_ICG.v | 15 + dmi_jtag_to_core_sync.anno.json | 18 + dmi_jtag_to_core_sync.fir | 35 + dmi_jtag_to_core_sync.v | 87 + dmi_wrapper.anno.json | 18 + dmi_wrapper.fir | 88 + dmi_wrapper.v | 122 + el2_dec_trigger.anno.json | 45 + el2_dec_trigger.fir | 1457 ++++ el2_dec_trigger.v | 717 ++ el2_exu_alu_ctl.anno.json | 239 + el2_exu_alu_ctl.fir | 474 ++ el2_exu_alu_ctl.v | 301 + el2_exu_div_ctl.anno.json | 25 + el2_exu_div_ctl.fir | 1782 ++++ el2_exu_div_ctl.v | 790 ++ el2_exu_mul_ctl.anno.json | 18 + el2_exu_mul_ctl.fir | 55 + el2_exu_mul_ctl.v | 123 + el2_lsu.anno.json | 424 + el2_lsu.fir | 7528 +++++++++++++++++ el2_lsu.v | 5102 +++++++++++ el2_lsu_addrcheck.anno.json | 111 + el2_lsu_addrcheck.fir | 304 + el2_lsu_addrcheck.v | 243 + el2_lsu_clkdomain.anno.json | 23 + el2_lsu_clkdomain.fir | 430 + el2_lsu_clkdomain.v | 379 + el2_lsu_dccm_ctl.anno.json | 382 + el2_lsu_dccm_ctl.fir | 845 ++ el2_lsu_dccm_ctl.v | 621 ++ el2_lsu_ecc.anno.json | 343 + el2_lsu_ecc.fir | 1755 ++++ el2_lsu_ecc.v | 466 + el2_lsu_lsc_ctl.anno.json | 304 + el2_lsu_lsc_ctl.fir | 1020 +++ el2_lsu_lsc_ctl.v | 1230 +++ el2_lsu_stbuf.anno.json | 36 +- el2_lsu_stbuf.fir | 3047 +++---- el2_lsu_stbuf.v | 1514 ++-- el2_lsu_trigger.anno.json | 8 +- el2_lsu_trigger.fir | 2489 +++--- el2_lsu_trigger.v | 1184 ++- el2_pic_ctrl.anno.json | 30 + el2_pic_ctrl.fir | 372 + el2_pic_ctrl.v | 388 + firrtl_black_box_resource_files.f | 2 +- ...10$.class => $054a75095a86b64d3a11$.class} | Bin 4330 -> 4334 bytes ...1610.cache => $054a75095a86b64d3a11.cache} | 0 .../$054a75095a86b64d3a11.class | Bin 0 -> 609 bytes ...59$.class => $53ee03a357389737b8c9$.class} | Bin 2576 -> 2565 bytes ...9359.cache => $53ee03a357389737b8c9.cache} | 0 .../$53ee03a357389737b8c9.class | Bin 0 -> 656 bytes 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$d5f88a6aa75b9ea562e4$.class} | Bin 2386 -> 2375 bytes ...bed4.cache => $d5f88a6aa75b9ea562e4.cache} | 0 .../$d5f88a6aa75b9ea562e4.class | Bin 0 -> 646 bytes ...2a$.class => $e2ecfd54f056de6acec3$.class} | Bin 3262 -> 3251 bytes ...2eb6.cache => $e2ecfd54f056de6acec3.cache} | 0 .../$e2ecfd54f056de6acec3.class | Bin 0 -> 646 bytes ...56$.class => $e9847b4dc08004e7ae96$.class} | Bin 2985 -> 2974 bytes ...7fbd.cache => $e9847b4dc08004e7ae96.cache} | 0 .../$e9847b4dc08004e7ae96.class | Bin 0 -> 646 bytes .../$ea8b489c9f4dfe332eb6.class | Bin 657 -> 0 bytes .../$f7cc14b2623d339d7fbd.class | Bin 600 -> 0 bytes .../sbt-1.0/update/update_cache_2.12/inputs | 2 +- .../sbt-1.0/update/update_cache_2.12/output | 2 +- .../streams/update_cache_2.12/output_dsp | 2 +- .../_global/update/_global/streams/out | 4 +- .../_global/compileBinaryFileInputs/previous | 2 +- .../_global/_global/compileOutputs/previous | 2 +- .../_global/dependencyClasspathFiles/previous | 2 +- .../_global/streams/export | 2 +- .../exportedProducts/_global/streams/export | 2 +- .../_global/streams/export | 2 +- .../managedClasspath/_global/streams/export | 2 +- .../_global/streams/export | 2 +- .../exportedProducts/_global/streams/export | 2 +- .../_global/streams/export | 2 +- .../fullClasspath/_global/streams/export | 2 +- .../_global/streams/export | 2 +- .../managedClasspath/_global/streams/export | 2 +- rvjtag_tap.anno.json | 18 + rvjtag_tap.fir | 221 + rvjtag_tap.v | 30 + src/main/scala/dbg/el2_dbg.scala | 5 - .../scala/dmi/dmi_jtag_to_core_sync.scala | 5 - src/main/scala/dmi/dmi_wrapper.scala | 5 - src/main/scala/dmi/rvjtag_tap.scala | 5 - src/main/scala/exu/el2_exu.scala | 296 +- src/main/scala/exu/el2_exu_alu_ctl.scala | 133 + src/main/scala/exu/el2_exu_div_ctl.scala | 226 + src/main/scala/exu/el2_exu_mul_ctl.scala | 37 + src/main/scala/include/el2_bundle.scala | 101 +- src/main/scala/lib/GCD.scala | 123 - src/main/scala/lib/beh_ib_func.scala | 67 +- src/main/scala/lib/beh_lib.scala | 580 +- src/main/scala/lib/el2_lib.scala | 282 +- src/main/scala/lsu/el2_lsu.scala | 493 +- src/main/scala/lsu/el2_lsu_addrcheck.scala | 163 + src/main/scala/lsu/el2_lsu_bus_buffer.scala | 819 ++ src/main/scala/lsu/el2_lsu_bus_intf.scala | 299 + src/main/scala/lsu/el2_lsu_clkdomain.scala | 120 + src/main/scala/lsu/el2_lsu_dccm_ctl.scala | 367 + src/main/scala/lsu/el2_lsu_dccm_mem.scala | 99 + src/main/scala/lsu/el2_lsu_ecc.scala | 164 + src/main/scala/lsu/el2_lsu_lsc_ctl.scala | 292 + src/main/scala/lsu/el2_lsu_stbuf.scala | 128 +- src/main/scala/lsu/el2_lsu_trigger.scala | 14 +- src/main/scala/snapshot/el2_param.scala | 2 +- .../chisel-module-template_2.12-3.3.0.jar | Bin 125241 -> 279218 bytes target/scala-2.12/classes/dbg/el2_dbg.class | Bin 500 -> 0 bytes .../classes/dmi/dmi_jtag_to_core_sync.class | Bin 558 -> 0 bytes .../scala-2.12/classes/dmi/dmi_wrapper.class | Bin 516 -> 0 bytes .../scala-2.12/classes/dmi/rvjtag_tap.class | Bin 512 -> 0 bytes target/scala-2.12/classes/exu/alu$.class | Bin 0 -> 3542 bytes .../classes/exu/alu$delayedInit$body.class | Bin 0 -> 712 bytes target/scala-2.12/classes/exu/alu.class | Bin 0 -> 759 bytes target/scala-2.12/classes/exu/div_main$.class | Bin 0 -> 3915 bytes .../exu/div_main$delayedInit$body.class | Bin 0 -> 742 bytes target/scala-2.12/classes/exu/div_main.class | Bin 0 -> 785 bytes target/scala-2.12/classes/exu/el2_exu.class | Bin 500 -> 81030 bytes .../scala-2.12/classes/exu/el2_exu_IO.class | Bin 0 -> 50203 bytes .../classes/exu/el2_exu_alu_ctl$$anon$1.class | Bin 0 -> 4331 bytes .../classes/exu/el2_exu_alu_ctl.class | Bin 0 -> 136300 bytes .../classes/exu/el2_exu_div_ctl$$anon$1.class | Bin 0 -> 2606 bytes .../classes/exu/el2_exu_div_ctl.class | Bin 0 -> 101560 bytes .../classes/exu/el2_exu_mul_ctl$$anon$1.class | Bin 0 -> 2343 bytes .../classes/exu/el2_exu_mul_ctl.class | Bin 0 -> 52611 bytes target/scala-2.12/classes/exu/exu_gen$.class | Bin 0 -> 3592 bytes .../exu/exu_gen$delayedInit$body.class | Bin 0 -> 728 bytes target/scala-2.12/classes/exu/exu_gen.class | Bin 0 -> 772 bytes target/scala-2.12/classes/exu/mul_main$.class | Bin 0 -> 3914 bytes .../exu/mul_main$delayedInit$body.class | Bin 0 -> 742 bytes target/scala-2.12/classes/exu/mul_main.class | Bin 0 -> 785 bytes .../classes/include/el2_alu_pkt_t.class | Bin 4186 -> 4186 bytes .../classes/include/el2_br_pkt_t.class | Bin 2718 -> 2718 bytes .../classes/include/el2_br_tlu_pkt_t.class | Bin 2278 -> 2278 bytes .../include/el2_cache_debug_pkt_t.class | Bin 2082 -> 2082 bytes .../include/el2_ccm_ext_in_pkt_t.class | Bin 2666 -> 2666 bytes .../classes/include/el2_class_pkt_t.class | Bin 1767 -> 1767 bytes .../include/el2_dccm_ext_in_pkt_t.class | Bin 2669 -> 2669 bytes .../classes/include/el2_dec_pkt_t.class | Bin 8978 -> 8216 bytes .../classes/include/el2_dest_pkt_t.class | Bin 2727 -> 2727 bytes .../classes/include/el2_div_pkt_t.class | Bin 1774 -> 1774 bytes .../include/el2_ic_data_ext_in_pkt_t.class | Bin 2678 -> 2678 bytes .../include/el2_ic_tag_ext_in_pkt_t.class | Bin 2675 -> 2675 bytes .../classes/include/el2_inst_pkt_t$.class | Bin 3027 -> 3027 bytes .../classes/include/el2_load_cam_pkt_t.class | Bin 1920 -> 1920 bytes .../classes/include/el2_lsu_error_pkt_t.class | Bin 2331 -> 2331 bytes .../classes/include/el2_lsu_pkt_t.class | Bin 3425 -> 3425 bytes .../classes/include/el2_mul_pkt_t.class | Bin 4271 -> 4271 bytes .../classes/include/el2_predict_pkt_t.class | Bin 3497 -> 3497 bytes .../classes/include/el2_reg_pkt_t.class | Bin 1755 -> 1755 bytes .../classes/include/el2_rets_pkt_t.class | Bin 1804 -> 1804 bytes .../classes/include/el2_trap_pkt_t.class | Bin 3118 -> 3118 bytes .../classes/include/el2_trigger_pkt_t.class | Bin 2401 -> 2401 bytes .../classes/lib/TEC_RV_ICG$$anon$14.class | Bin 1749 -> 1749 bytes .../scala-2.12/classes/lib/TEC_RV_ICG.class | Bin 2207 -> 2207 bytes .../scala-2.12/classes/lib/beh_ib_func$.class | Bin 38843 -> 0 bytes .../scala-2.12/classes/lib/beh_ib_func.class | Bin 4664 -> 0 bytes .../lib/el2_lib$rvecc_decode$$anon$1.class | Bin 2585 -> 0 bytes .../classes/lib/el2_lib$rvecc_decode.class | Bin 33409 -> 0 bytes target/scala-2.12/classes/lib/el2_lib.class | Bin 19804 -> 50941 bytes target/scala-2.12/classes/lib/param.class | Bin 23382 -> 23424 bytes ...$$anon$4.class => rvbradder$$anon$4.class} | Bin 1810 -> 1810 bytes target/scala-2.12/classes/lib/rvbradder.class | Bin 0 -> 9570 bytes target/scala-2.12/classes/lib/rvbsadder.class | Bin 9477 -> 0 bytes .../classes/lib/rvclkhdr$$anon$15.class | Bin 1751 -> 1751 bytes target/scala-2.12/classes/lib/rvclkhdr$.class | Bin 5269 -> 5269 bytes target/scala-2.12/classes/lib/rvclkhdr.class | Bin 7772 -> 7772 bytes .../classes/lib/rvdff$$anon$1.class | Bin 1695 -> 1695 bytes target/scala-2.12/classes/lib/rvdff$.class | Bin 573 -> 573 bytes target/scala-2.12/classes/lib/rvdff.class | Bin 5627 -> 5627 bytes target/scala-2.12/classes/lib/rvdffe$.class | Bin 6170 -> 8513 bytes target/scala-2.12/classes/lib/rvdffe.class | Bin 737 -> 953 bytes .../classes/lib/rvecc_decode$$anon$11.class | Bin 2507 -> 2507 bytes .../scala-2.12/classes/lib/rvecc_decode.class | Bin 34905 -> 31105 bytes .../lib/rvecc_decode_64$$anon$13.class | Bin 1975 -> 1975 bytes .../classes/lib/rvecc_decode_64.class | Bin 21746 -> 21746 bytes .../classes/lib/rvecc_encode$$anon$10.class | Bin 1698 -> 1698 bytes .../scala-2.12/classes/lib/rvecc_encode.class | Bin 15267 -> 15267 bytes .../lib/rvecc_encode_64$$anon$12.class | Bin 1713 -> 1713 bytes .../classes/lib/rvecc_encode_64.class | Bin 17043 -> 17022 bytes .../lib/rveven_paritycheck$$anon$9.class | Bin 1915 -> 1915 bytes .../classes/lib/rveven_paritycheck$.class | Bin 507 -> 507 bytes .../classes/lib/rveven_paritycheck.class | Bin 5313 -> 5313 bytes .../lib/rveven_paritygen$$anon$8.class | Bin 1768 -> 1768 bytes .../classes/lib/rveven_paritygen$.class | Bin 503 -> 503 bytes .../classes/lib/rveven_paritygen.class | Bin 4746 -> 4746 bytes .../classes/lib/rvlsadder$$anon$3.class | Bin 1811 -> 1811 bytes target/scala-2.12/classes/lib/rvlsadder.class | Bin 9474 -> 9572 bytes .../classes/lib/rvmaskandmatch$$anon$6.class | Bin 2017 -> 2017 bytes .../classes/lib/rvmaskandmatch$.class | Bin 499 -> 499 bytes .../classes/lib/rvmaskandmatch.class | Bin 11289 -> 11289 bytes ...$7.class => rvrangecheck_ch$$anon$7.class} | Bin 1832 -> 1847 bytes ...ngecheck$.class => rvrangecheck_ch$.class} | Bin 496 -> 502 bytes ...rangecheck.class => rvrangecheck_ch.class} | Bin 8532 -> 8557 bytes .../classes/lib/rvsyncss$$anon$2.class | Bin 1713 -> 1948 bytes target/scala-2.12/classes/lib/rvsyncss$.class | Bin 581 -> 581 bytes target/scala-2.12/classes/lib/rvsyncss.class | Bin 5867 -> 7725 bytes .../classes/lib/rvtwoscomp$$anon$5.class | Bin 1725 -> 1725 bytes .../scala-2.12/classes/lib/rvtwoscomp$.class | Bin 491 -> 491 bytes .../scala-2.12/classes/lib/rvtwoscomp.class | Bin 9200 -> 9040 bytes .../scala-2.12/classes/lsu/BusBufmain$.class | Bin 0 -> 3934 bytes .../lsu/BusBufmain$delayedInit$body.class | Bin 0 -> 757 bytes .../scala-2.12/classes/lsu/BusBufmain.class | Bin 0 -> 799 bytes .../scala-2.12/classes/lsu/BusIntfMain$.class | Bin 0 -> 3933 bytes .../lsu/BusIntfMain$delayedInit$body.class | Bin 0 -> 761 bytes .../scala-2.12/classes/lsu/BusIntfMain.class | Bin 0 -> 802 bytes target/scala-2.12/classes/lsu/DCCM$.class | Bin 0 -> 3675 bytes .../classes/lsu/DCCM$delayedInit$body.class | Bin 0 -> 719 bytes target/scala-2.12/classes/lsu/DCCM.class | Bin 0 -> 765 bytes .../classes/lsu/address_checker$.class | Bin 0 -> 3733 bytes .../address_checker$delayedInit$body.class | Bin 0 -> 786 bytes .../classes/lsu/address_checker.class | Bin 0 -> 824 bytes target/scala-2.12/classes/lsu/cgcmain$.class | Bin 0 -> 3915 bytes .../lsu/cgcmain$delayedInit$body.class | Bin 0 -> 738 bytes target/scala-2.12/classes/lsu/cgcmain.class | Bin 0 -> 782 bytes target/scala-2.12/classes/lsu/dccm_ctl$.class | Bin 0 -> 3696 bytes .../lsu/dccm_ctl$delayedInit$body.class | Bin 0 -> 743 bytes target/scala-2.12/classes/lsu/dccm_ctl.class | Bin 0 -> 786 bytes target/scala-2.12/classes/lsu/eccmain$.class | Bin 0 -> 3898 bytes .../lsu/eccmain$delayedInit$body.class | Bin 0 -> 732 bytes target/scala-2.12/classes/lsu/eccmain.class | Bin 0 -> 776 bytes .../classes/lsu/el2_lsu$$anon$1.class | Bin 0 -> 17878 bytes target/scala-2.12/classes/lsu/el2_lsu.class | Bin 500 -> 1251203 bytes .../lsu/el2_lsu_addrcheck$$anon$1.class | Bin 0 -> 4043 bytes .../classes/lsu/el2_lsu_addrcheck.class | Bin 0 -> 66651 bytes .../lsu/el2_lsu_bus_buffer$$anon$1.class | Bin 0 -> 14947 bytes .../classes/lsu/el2_lsu_bus_buffer$.class | Bin 0 -> 422 bytes .../lsu/el2_lsu_bus_buffer$State$.class | Bin 0 -> 1489 bytes .../classes/lsu/el2_lsu_bus_buffer.class | Bin 0 -> 369915 bytes .../lsu/el2_lsu_bus_intf$$anon$1.class | Bin 0 -> 14235 bytes .../classes/lsu/el2_lsu_bus_intf.class | Bin 0 -> 287973 bytes .../lsu/el2_lsu_clkdomain$$anon$1.class | Bin 0 -> 5207 bytes .../classes/lsu/el2_lsu_clkdomain.class | Bin 0 -> 130165 bytes .../lsu/el2_lsu_dccm_ctl$$anon$1.class | Bin 0 -> 15680 bytes .../classes/lsu/el2_lsu_dccm_ctl.class | Bin 0 -> 349507 bytes .../lsu/el2_lsu_dccm_mem$$anon$1.class | Bin 0 -> 3276 bytes .../classes/lsu/el2_lsu_dccm_mem.class | Bin 0 -> 26528 bytes .../classes/lsu/el2_lsu_ecc$$anon$1.class | Bin 0 -> 8017 bytes .../scala-2.12/classes/lsu/el2_lsu_ecc.class | Bin 0 -> 97586 bytes .../classes/lsu/el2_lsu_lsc_ctl$$anon$1.class | Bin 0 -> 9224 bytes .../classes/lsu/el2_lsu_lsc_ctl.class | Bin 0 -> 251221 bytes .../classes/lsu/el2_lsu_stbuf$$anon$1.class | Bin 6663 -> 6663 bytes .../classes/lsu/el2_lsu_stbuf.class | Bin 178719 -> 185120 bytes .../classes/lsu/el2_lsu_trigger.class | Bin 54907 -> 57598 bytes .../scala-2.12/classes/lsu/lsu_lsc_ctl$.class | Bin 0 -> 3708 bytes .../lsu/lsu_lsc_ctl$delayedInit$body.class | Bin 0 -> 760 bytes .../scala-2.12/classes/lsu/lsu_lsc_ctl.class | Bin 0 -> 801 bytes .../classes/lsu/main_lsu_top$.class | Bin 0 -> 3910 bytes .../lsu/main_lsu_top$delayedInit$body.class | Bin 0 -> 758 bytes .../scala-2.12/classes/lsu/main_lsu_top.class | Bin 0 -> 799 bytes .../classes/lsu/main_trigger$.class | Bin 3934 -> 3934 bytes .../lsu/main_trigger$delayedInit$body.class | Bin 766 -> 766 bytes target/scala-2.12/classes/lsu/stbmain$.class | Bin 3904 -> 3904 bytes .../lsu/stbmain$delayedInit$body.class | Bin 734 -> 734 bytes target/scala-2.12/classes/snapshot/pt1$.class | Bin 17459 -> 17460 bytes .../update/update_cache_2.12/inputs | 2 +- .../update/update_cache_2.12/output | 2 +- .../_global/inputFileStamps/previous | 2 +- .../streams/update_cache_2.12/output_dsp | 2 +- .../_global/update/_global/streams/out | 6 +- .../_global/compileBinaryFileInputs/previous | 2 +- .../_global/_global/compileOutputs/previous | 2 +- .../_global/compileSourceFileInputs/previous | 2 +- .../_global/dependencyClasspathFiles/previous | 2 +- .../_global/discoveredMainClasses/data | 2 +- .../streams/compile/bgRun/_global/streams/out | 21 + .../compile/compile/_global/streams/out | 4 +- .../_global/streams/inc_compile_2.12.zip | Bin 28059 -> 65922 bytes .../compileIncremental/_global/streams/export | 2 +- .../compileIncremental/_global/streams/out | 31 +- .../_global/streams/copy-resources | 2 +- .../compile/copyResources/_global/streams/out | 2 +- .../_global/streams/export | 2 +- .../_global/streams/export | 2 +- .../exportedProducts/_global/streams/export | 2 +- .../_global/streams/export | 2 +- .../managedClasspath/_global/streams/export | 2 +- .../compile/packageBin/_global/streams/inputs | 2 +- .../compile/packageBin/_global/streams/out | 124 +- .../compile/packageBin/_global/streams/output | 2 +- .../_global/streams/export | 2 +- .../_global/streams/export | 2 +- .../_global/streams/export | 2 +- .../_global/streams/export | 2 +- .../_global/streams/export | 2 +- .../managedClasspath/_global/streams/export | 2 +- 324 files changed, 37522 insertions(+), 4833 deletions(-) create mode 100644 TEC_RV_ICG.v create mode 100644 dmi_jtag_to_core_sync.anno.json create mode 100644 dmi_jtag_to_core_sync.fir create mode 100644 dmi_jtag_to_core_sync.v create mode 100644 dmi_wrapper.anno.json create mode 100644 dmi_wrapper.fir create mode 100644 dmi_wrapper.v create mode 100644 el2_dec_trigger.anno.json create mode 100644 el2_dec_trigger.fir create mode 100644 el2_dec_trigger.v create mode 100644 el2_exu_alu_ctl.anno.json create mode 100644 el2_exu_alu_ctl.fir create mode 100644 el2_exu_alu_ctl.v create mode 100644 el2_exu_div_ctl.anno.json create mode 100644 el2_exu_div_ctl.fir create mode 100644 el2_exu_div_ctl.v create mode 100644 el2_exu_mul_ctl.anno.json create mode 100644 el2_exu_mul_ctl.fir create mode 100644 el2_exu_mul_ctl.v create mode 100644 el2_lsu.anno.json create mode 100644 el2_lsu.fir create mode 100644 el2_lsu.v create mode 100644 el2_lsu_addrcheck.anno.json create mode 100644 el2_lsu_addrcheck.fir create mode 100644 el2_lsu_addrcheck.v create mode 100644 el2_lsu_clkdomain.anno.json create mode 100644 el2_lsu_clkdomain.fir create mode 100644 el2_lsu_clkdomain.v create mode 100644 el2_lsu_dccm_ctl.anno.json create mode 100644 el2_lsu_dccm_ctl.fir create mode 100644 el2_lsu_dccm_ctl.v create mode 100644 el2_lsu_ecc.anno.json create mode 100644 el2_lsu_ecc.fir create mode 100644 el2_lsu_ecc.v create mode 100644 el2_lsu_lsc_ctl.anno.json create mode 100644 el2_lsu_lsc_ctl.fir create mode 100644 el2_lsu_lsc_ctl.v create mode 100644 el2_pic_ctrl.anno.json create mode 100644 el2_pic_ctrl.fir create mode 100644 el2_pic_ctrl.v rename project/project/target/config-classes/{$94e99f320330b1991610$.class => $054a75095a86b64d3a11$.class} (90%) rename project/project/target/config-classes/{$94e99f320330b1991610.cache => $054a75095a86b64d3a11.cache} (100%) create mode 100644 project/project/target/config-classes/$054a75095a86b64d3a11.class rename project/project/target/config-classes/{$eafbdd71b574e8cd9359$.class => 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project/target/config-classes/$38ef62f5d46efbdabf0c.class delete mode 100644 project/target/config-classes/$4f19f1de0b25842d4b56.class rename project/target/config-classes/{$386ffda3165ce1b06f64$.class => $4fd7fe208d58528b40ba$.class} (68%) rename project/target/config-classes/{$0a755ecc10248e88106a.cache => $4fd7fe208d58528b40ba.cache} (100%) create mode 100644 project/target/config-classes/$4fd7fe208d58528b40ba.class rename project/target/config-classes/{$ea8b489c9f4dfe332eb6$.class => $510bfc6f2b421dc9d9bd$.class} (91%) rename project/target/config-classes/{$10a47d6a93eb9631b32c.cache => $510bfc6f2b421dc9d9bd.cache} (100%) create mode 100644 project/target/config-classes/$510bfc6f2b421dc9d9bd.class rename project/target/config-classes/{$edf3167b6c8f845d1a80$.class => $7df26a62558d2ef1b728$.class} (94%) create mode 100644 project/target/config-classes/$7df26a62558d2ef1b728.cache rename project/target/config-classes/{$edf3167b6c8f845d1a80.class => $7df26a62558d2ef1b728.class} (73%) rename project/target/config-classes/{$0a755ecc10248e88106a$.class => $94b7820066ee5817fa77$.class} (86%) rename project/target/config-classes/{$317bb9a97d30486e882a.cache => $94b7820066ee5817fa77.cache} (100%) create mode 100644 project/target/config-classes/$94b7820066ee5817fa77.class rename project/target/config-classes/{$10a47d6a93eb9631b32c$.class => $94df65fbaa0419208930$.class} (83%) rename project/target/config-classes/{$361d26f09486e1589b2f.cache => $94df65fbaa0419208930.cache} (100%) create mode 100644 project/target/config-classes/$94df65fbaa0419208930.class delete mode 100644 project/target/config-classes/$9600fa16bd8e54b1bed4.class rename project/target/config-classes/{$361d26f09486e1589b2f$.class => $96f8089e47c25478abae$.class} (85%) rename project/target/config-classes/{$386ffda3165ce1b06f64.cache => $96f8089e47c25478abae.cache} (100%) create mode 100644 project/target/config-classes/$96f8089e47c25478abae.class rename project/target/config-classes/{$f7cc14b2623d339d7fbd$.class => $982689ab0f47fbe5844d$.class} (92%) rename project/target/config-classes/{$38ef62f5d46efbdabf0c.cache => $982689ab0f47fbe5844d.cache} (100%) create mode 100644 project/target/config-classes/$982689ab0f47fbe5844d.class rename project/target/config-classes/{$9600fa16bd8e54b1bed4$.class => $a84bc212485a63cb3108$.class} (83%) rename project/target/config-classes/{$4f19f1de0b25842d4b56.cache => $a84bc212485a63cb3108.cache} (100%) create mode 100644 project/target/config-classes/$a84bc212485a63cb3108.class rename project/target/config-classes/{$38ef62f5d46efbdabf0c$.class => $d5f88a6aa75b9ea562e4$.class} (83%) rename project/target/config-classes/{$9600fa16bd8e54b1bed4.cache => $d5f88a6aa75b9ea562e4.cache} (100%) create mode 100644 project/target/config-classes/$d5f88a6aa75b9ea562e4.class rename project/target/config-classes/{$317bb9a97d30486e882a$.class => $e2ecfd54f056de6acec3$.class} (89%) rename project/target/config-classes/{$ea8b489c9f4dfe332eb6.cache => $e2ecfd54f056de6acec3.cache} (100%) create mode 100644 project/target/config-classes/$e2ecfd54f056de6acec3.class rename project/target/config-classes/{$4f19f1de0b25842d4b56$.class => $e9847b4dc08004e7ae96$.class} (85%) rename project/target/config-classes/{$f7cc14b2623d339d7fbd.cache => $e9847b4dc08004e7ae96.cache} (100%) create mode 100644 project/target/config-classes/$e9847b4dc08004e7ae96.class delete mode 100644 project/target/config-classes/$ea8b489c9f4dfe332eb6.class delete mode 100644 project/target/config-classes/$f7cc14b2623d339d7fbd.class create mode 100644 rvjtag_tap.anno.json create mode 100644 rvjtag_tap.fir create mode 100644 rvjtag_tap.v delete mode 100644 src/main/scala/dbg/el2_dbg.scala delete mode 100644 src/main/scala/dmi/dmi_jtag_to_core_sync.scala delete mode 100644 src/main/scala/dmi/dmi_wrapper.scala delete mode 100644 src/main/scala/dmi/rvjtag_tap.scala create mode 100644 src/main/scala/exu/el2_exu_alu_ctl.scala create mode 100644 src/main/scala/exu/el2_exu_div_ctl.scala create mode 100644 src/main/scala/exu/el2_exu_mul_ctl.scala delete mode 100644 src/main/scala/lib/GCD.scala create mode 100644 src/main/scala/lsu/el2_lsu_addrcheck.scala create mode 100644 src/main/scala/lsu/el2_lsu_bus_buffer.scala create mode 100644 src/main/scala/lsu/el2_lsu_bus_intf.scala create mode 100644 src/main/scala/lsu/el2_lsu_clkdomain.scala create mode 100644 src/main/scala/lsu/el2_lsu_dccm_ctl.scala create mode 100644 src/main/scala/lsu/el2_lsu_dccm_mem.scala create mode 100644 src/main/scala/lsu/el2_lsu_ecc.scala create mode 100644 src/main/scala/lsu/el2_lsu_lsc_ctl.scala delete mode 100644 target/scala-2.12/classes/dbg/el2_dbg.class delete mode 100644 target/scala-2.12/classes/dmi/dmi_jtag_to_core_sync.class delete mode 100644 target/scala-2.12/classes/dmi/dmi_wrapper.class delete mode 100644 target/scala-2.12/classes/dmi/rvjtag_tap.class create mode 100644 target/scala-2.12/classes/exu/alu$.class create mode 100644 target/scala-2.12/classes/exu/alu$delayedInit$body.class create mode 100644 target/scala-2.12/classes/exu/alu.class create mode 100644 target/scala-2.12/classes/exu/div_main$.class create mode 100644 target/scala-2.12/classes/exu/div_main$delayedInit$body.class create mode 100644 target/scala-2.12/classes/exu/div_main.class create mode 100644 target/scala-2.12/classes/exu/el2_exu_IO.class create mode 100644 target/scala-2.12/classes/exu/el2_exu_alu_ctl$$anon$1.class create mode 100644 target/scala-2.12/classes/exu/el2_exu_alu_ctl.class create mode 100644 target/scala-2.12/classes/exu/el2_exu_div_ctl$$anon$1.class create mode 100644 target/scala-2.12/classes/exu/el2_exu_div_ctl.class create mode 100644 target/scala-2.12/classes/exu/el2_exu_mul_ctl$$anon$1.class create mode 100644 target/scala-2.12/classes/exu/el2_exu_mul_ctl.class create mode 100644 target/scala-2.12/classes/exu/exu_gen$.class create mode 100644 target/scala-2.12/classes/exu/exu_gen$delayedInit$body.class create mode 100644 target/scala-2.12/classes/exu/exu_gen.class create mode 100644 target/scala-2.12/classes/exu/mul_main$.class create mode 100644 target/scala-2.12/classes/exu/mul_main$delayedInit$body.class create mode 100644 target/scala-2.12/classes/exu/mul_main.class delete mode 100644 target/scala-2.12/classes/lib/beh_ib_func$.class delete mode 100644 target/scala-2.12/classes/lib/beh_ib_func.class delete mode 100644 target/scala-2.12/classes/lib/el2_lib$rvecc_decode$$anon$1.class delete mode 100644 target/scala-2.12/classes/lib/el2_lib$rvecc_decode.class rename target/scala-2.12/classes/lib/{rvbsadder$$anon$4.class => rvbradder$$anon$4.class} (58%) create mode 100644 target/scala-2.12/classes/lib/rvbradder.class delete mode 100644 target/scala-2.12/classes/lib/rvbsadder.class rename target/scala-2.12/classes/lib/{rvrangecheck$$anon$7.class => rvrangecheck_ch$$anon$7.class} (50%) rename target/scala-2.12/classes/lib/{rvrangecheck$.class => rvrangecheck_ch$.class} (52%) rename target/scala-2.12/classes/lib/{rvrangecheck.class => rvrangecheck_ch.class} (53%) create mode 100644 target/scala-2.12/classes/lsu/BusBufmain$.class create mode 100644 target/scala-2.12/classes/lsu/BusBufmain$delayedInit$body.class create mode 100644 target/scala-2.12/classes/lsu/BusBufmain.class create mode 100644 target/scala-2.12/classes/lsu/BusIntfMain$.class create mode 100644 target/scala-2.12/classes/lsu/BusIntfMain$delayedInit$body.class create mode 100644 target/scala-2.12/classes/lsu/BusIntfMain.class create mode 100644 target/scala-2.12/classes/lsu/DCCM$.class create mode 100644 target/scala-2.12/classes/lsu/DCCM$delayedInit$body.class create mode 100644 target/scala-2.12/classes/lsu/DCCM.class create mode 100644 target/scala-2.12/classes/lsu/address_checker$.class create mode 100644 target/scala-2.12/classes/lsu/address_checker$delayedInit$body.class create mode 100644 target/scala-2.12/classes/lsu/address_checker.class create mode 100644 target/scala-2.12/classes/lsu/cgcmain$.class create mode 100644 target/scala-2.12/classes/lsu/cgcmain$delayedInit$body.class create mode 100644 target/scala-2.12/classes/lsu/cgcmain.class create mode 100644 target/scala-2.12/classes/lsu/dccm_ctl$.class create mode 100644 target/scala-2.12/classes/lsu/dccm_ctl$delayedInit$body.class create mode 100644 target/scala-2.12/classes/lsu/dccm_ctl.class create mode 100644 target/scala-2.12/classes/lsu/eccmain$.class create mode 100644 target/scala-2.12/classes/lsu/eccmain$delayedInit$body.class create mode 100644 target/scala-2.12/classes/lsu/eccmain.class create mode 100644 target/scala-2.12/classes/lsu/el2_lsu$$anon$1.class create mode 100644 target/scala-2.12/classes/lsu/el2_lsu_addrcheck$$anon$1.class create mode 100644 target/scala-2.12/classes/lsu/el2_lsu_addrcheck.class create mode 100644 target/scala-2.12/classes/lsu/el2_lsu_bus_buffer$$anon$1.class create mode 100644 target/scala-2.12/classes/lsu/el2_lsu_bus_buffer$.class create mode 100644 target/scala-2.12/classes/lsu/el2_lsu_bus_buffer$State$.class create mode 100644 target/scala-2.12/classes/lsu/el2_lsu_bus_buffer.class create mode 100644 target/scala-2.12/classes/lsu/el2_lsu_bus_intf$$anon$1.class create mode 100644 target/scala-2.12/classes/lsu/el2_lsu_bus_intf.class create mode 100644 target/scala-2.12/classes/lsu/el2_lsu_clkdomain$$anon$1.class create mode 100644 target/scala-2.12/classes/lsu/el2_lsu_clkdomain.class create mode 100644 target/scala-2.12/classes/lsu/el2_lsu_dccm_ctl$$anon$1.class create mode 100644 target/scala-2.12/classes/lsu/el2_lsu_dccm_ctl.class create mode 100644 target/scala-2.12/classes/lsu/el2_lsu_dccm_mem$$anon$1.class create mode 100644 target/scala-2.12/classes/lsu/el2_lsu_dccm_mem.class create mode 100644 target/scala-2.12/classes/lsu/el2_lsu_ecc$$anon$1.class create mode 100644 target/scala-2.12/classes/lsu/el2_lsu_ecc.class create mode 100644 target/scala-2.12/classes/lsu/el2_lsu_lsc_ctl$$anon$1.class create mode 100644 target/scala-2.12/classes/lsu/el2_lsu_lsc_ctl.class create mode 100644 target/scala-2.12/classes/lsu/lsu_lsc_ctl$.class create mode 100644 target/scala-2.12/classes/lsu/lsu_lsc_ctl$delayedInit$body.class create mode 100644 target/scala-2.12/classes/lsu/lsu_lsc_ctl.class create mode 100644 target/scala-2.12/classes/lsu/main_lsu_top$.class create mode 100644 target/scala-2.12/classes/lsu/main_lsu_top$delayedInit$body.class create mode 100644 target/scala-2.12/classes/lsu/main_lsu_top.class create mode 100644 target/streams/compile/bgRun/_global/streams/out diff --git a/TEC_RV_ICG.v b/TEC_RV_ICG.v new file mode 100644 index 00000000..aebabbef --- /dev/null +++ b/TEC_RV_ICG.v @@ -0,0 +1,15 @@ + +module TEC_RV_ICG( + ( + input logic SE, EN, CK, + output Q + ); + logic en_ff; + logic enable; + assign enable = EN | SE; + always @(CK, enable) begin + if(!CK) + en_ff = enable; + end + assign Q = CK & en_ff; +endmodule diff --git a/dmi_jtag_to_core_sync.anno.json b/dmi_jtag_to_core_sync.anno.json new file mode 100644 index 00000000..9d46a227 --- /dev/null +++ b/dmi_jtag_to_core_sync.anno.json @@ -0,0 +1,18 @@ +[ + { + "class":"firrtl.EmitCircuitAnnotation", + "emitter":"firrtl.VerilogEmitter" + }, + { + "class":"firrtl.options.TargetDirAnnotation", + "directory":"." + }, + { + "class":"firrtl.options.OutputAnnotationFileAnnotation", + "file":"dmi_jtag_to_core_sync" + }, + { + "class":"firrtl.transforms.BlackBoxTargetDirAnno", + "targetDir":"." + } +] \ No newline at end of file diff --git a/dmi_jtag_to_core_sync.fir b/dmi_jtag_to_core_sync.fir new file mode 100644 index 00000000..f7785832 --- /dev/null +++ b/dmi_jtag_to_core_sync.fir @@ -0,0 +1,35 @@ +;buildInfoPackage: chisel3, version: 3.3.1, scalaVersion: 2.12.11, sbtVersion: 1.3.10 +circuit dmi_jtag_to_core_sync : + module dmi_jtag_to_core_sync : + input clock : Clock + input reset : AsyncReset + output io : {flip rd_en : UInt<1>, flip wr_en : UInt<1>, reg_en : UInt<1>, reg_wr_en : UInt<1>} + + io.reg_en <= UInt<1>("h00") @[dmi_jtag_to_core_sync.scala 19:16] + io.reg_wr_en <= UInt<1>("h00") @[dmi_jtag_to_core_sync.scala 20:16] + wire rden : UInt<3> + rden <= UInt<1>("h00") + wire wren : UInt<3> + wren <= UInt<1>("h00") + node _T = bits(rden, 1, 0) @[dmi_jtag_to_core_sync.scala 25:27] + node _T_1 = cat(_T, io.rd_en) @[Cat.scala 29:58] + reg _T_2 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[dmi_jtag_to_core_sync.scala 25:18] + _T_2 <= _T_1 @[dmi_jtag_to_core_sync.scala 25:18] + rden <= _T_2 @[dmi_jtag_to_core_sync.scala 25:8] + node _T_3 = bits(wren, 1, 0) @[dmi_jtag_to_core_sync.scala 26:27] + node _T_4 = cat(_T_3, io.wr_en) @[Cat.scala 29:58] + reg _T_5 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[dmi_jtag_to_core_sync.scala 26:18] + _T_5 <= _T_4 @[dmi_jtag_to_core_sync.scala 26:18] + wren <= _T_5 @[dmi_jtag_to_core_sync.scala 26:8] + node _T_6 = bits(rden, 1, 1) @[dmi_jtag_to_core_sync.scala 28:21] + node _T_7 = bits(rden, 2, 2) @[dmi_jtag_to_core_sync.scala 28:32] + node _T_8 = eq(_T_7, UInt<1>("h00")) @[dmi_jtag_to_core_sync.scala 28:27] + node c_rd_en = and(_T_6, _T_8) @[dmi_jtag_to_core_sync.scala 28:25] + node _T_9 = bits(wren, 1, 1) @[dmi_jtag_to_core_sync.scala 29:21] + node _T_10 = bits(wren, 2, 2) @[dmi_jtag_to_core_sync.scala 29:32] + node _T_11 = eq(_T_10, UInt<1>("h00")) @[dmi_jtag_to_core_sync.scala 29:27] + node c_wr_en = and(_T_9, _T_11) @[dmi_jtag_to_core_sync.scala 29:25] + node _T_12 = or(c_wr_en, c_rd_en) @[dmi_jtag_to_core_sync.scala 31:24] + io.reg_en <= _T_12 @[dmi_jtag_to_core_sync.scala 31:13] + io.reg_wr_en <= c_wr_en @[dmi_jtag_to_core_sync.scala 32:16] + diff --git a/dmi_jtag_to_core_sync.v b/dmi_jtag_to_core_sync.v new file mode 100644 index 00000000..2cfdca14 --- /dev/null +++ b/dmi_jtag_to_core_sync.v @@ -0,0 +1,87 @@ +module dmi_jtag_to_core_sync( + input clock, + input reset, + input io_rd_en, + input io_wr_en, + output io_reg_en, + output io_reg_wr_en +); +`ifdef RANDOMIZE_REG_INIT + reg [31:0] _RAND_0; + reg [31:0] _RAND_1; +`endif // RANDOMIZE_REG_INIT + reg [2:0] rden; // @[dmi_jtag_to_core_sync.scala 25:18] + reg [2:0] wren; // @[dmi_jtag_to_core_sync.scala 26:18] + wire _T_8 = ~rden[2]; // @[dmi_jtag_to_core_sync.scala 28:27] + wire c_rd_en = rden[1] & _T_8; // @[dmi_jtag_to_core_sync.scala 28:25] + wire _T_11 = ~wren[2]; // @[dmi_jtag_to_core_sync.scala 29:27] + wire c_wr_en = wren[1] & _T_11; // @[dmi_jtag_to_core_sync.scala 29:25] + assign io_reg_en = c_wr_en | c_rd_en; // @[dmi_jtag_to_core_sync.scala 19:16 dmi_jtag_to_core_sync.scala 31:13] + assign io_reg_wr_en = wren[1] & _T_11; // @[dmi_jtag_to_core_sync.scala 20:16 dmi_jtag_to_core_sync.scala 32:16] +`ifdef RANDOMIZE_GARBAGE_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_INVALID_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_REG_INIT +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_MEM_INIT +`define RANDOMIZE +`endif +`ifndef RANDOM +`define RANDOM $random +`endif +`ifdef RANDOMIZE_MEM_INIT + integer initvar; +`endif +`ifndef SYNTHESIS +`ifdef FIRRTL_BEFORE_INITIAL +`FIRRTL_BEFORE_INITIAL +`endif +initial begin + `ifdef RANDOMIZE + `ifdef INIT_RANDOM + `INIT_RANDOM + `endif + `ifndef VERILATOR + `ifdef RANDOMIZE_DELAY + #`RANDOMIZE_DELAY begin end + `else + #0.002 begin end + `endif + `endif +`ifdef RANDOMIZE_REG_INIT + _RAND_0 = {1{`RANDOM}}; + rden = _RAND_0[2:0]; + _RAND_1 = {1{`RANDOM}}; + wren = _RAND_1[2:0]; +`endif // RANDOMIZE_REG_INIT + if (reset) begin + rden = 3'h0; + end + if (reset) begin + wren = 3'h0; + end + `endif // RANDOMIZE +end // initial +`ifdef FIRRTL_AFTER_INITIAL +`FIRRTL_AFTER_INITIAL +`endif +`endif // SYNTHESIS + always @(posedge clock or posedge reset) begin + if (reset) begin + rden <= 3'h0; + end else begin + rden <= {rden[1:0],io_rd_en}; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + wren <= 3'h0; + end else begin + wren <= {wren[1:0],io_wr_en}; + end + end +endmodule diff --git a/dmi_wrapper.anno.json b/dmi_wrapper.anno.json new file mode 100644 index 00000000..a82cb7f9 --- /dev/null +++ b/dmi_wrapper.anno.json @@ -0,0 +1,18 @@ +[ + { + "class":"firrtl.EmitCircuitAnnotation", + "emitter":"firrtl.VerilogEmitter" + }, + { + "class":"firrtl.options.TargetDirAnnotation", + "directory":"." + }, + { + "class":"firrtl.options.OutputAnnotationFileAnnotation", + "file":"dmi_wrapper" + }, + { + "class":"firrtl.transforms.BlackBoxTargetDirAnno", + "targetDir":"." + } +] \ No newline at end of file diff --git a/dmi_wrapper.fir b/dmi_wrapper.fir new file mode 100644 index 00000000..bb2aef3c --- /dev/null +++ b/dmi_wrapper.fir @@ -0,0 +1,88 @@ +;buildInfoPackage: chisel3, version: 3.3.1, scalaVersion: 2.12.11, sbtVersion: 1.3.10 +circuit dmi_wrapper : + module rvjtag_tap : + input clock : Clock + input reset : AsyncReset + output io : {flip tck : Clock, flip tms : UInt<1>, flip tdi : UInt<1>, flip rd_data : UInt<32>, flip rd_status : UInt<2>, flip idle : UInt<3>, flip dmi_stat : UInt<2>, flip jtag_id : UInt<32>, flip version : UInt<4>, tdo : UInt<1>, tdoEnable : UInt<1>, wr_data : UInt<32>, wr_addr : UInt<7>, wr_en : UInt<1>, rd_en : UInt<1>, dmi_reset : UInt<1>, dmi_hard_reset : UInt<1>} + + io.tdo <= UInt<1>("h00") @[rvjtag_tap.scala 31:21] + io.tdoEnable <= UInt<1>("h00") @[rvjtag_tap.scala 32:21] + io.wr_data <= UInt<1>("h00") @[rvjtag_tap.scala 33:21] + io.wr_addr <= UInt<1>("h00") @[rvjtag_tap.scala 34:21] + io.wr_en <= UInt<1>("h00") @[rvjtag_tap.scala 35:21] + io.rd_en <= UInt<1>("h00") @[rvjtag_tap.scala 36:21] + io.dmi_reset <= UInt<1>("h00") @[rvjtag_tap.scala 37:21] + io.dmi_hard_reset <= UInt<1>("h00") @[rvjtag_tap.scala 38:21] + + module dmi_jtag_to_core_sync : + input clock : Clock + input reset : AsyncReset + output io : {flip rd_en : UInt<1>, flip wr_en : UInt<1>, reg_en : UInt<1>, reg_wr_en : UInt<1>} + + io.reg_en <= UInt<1>("h00") @[dmi_jtag_to_core_sync.scala 19:16] + io.reg_wr_en <= UInt<1>("h00") @[dmi_jtag_to_core_sync.scala 20:16] + wire rden : UInt<3> + rden <= UInt<1>("h00") + wire wren : UInt<3> + wren <= UInt<1>("h00") + node _T = bits(rden, 1, 0) @[dmi_jtag_to_core_sync.scala 25:27] + node _T_1 = cat(_T, io.rd_en) @[Cat.scala 29:58] + reg _T_2 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[dmi_jtag_to_core_sync.scala 25:18] + _T_2 <= _T_1 @[dmi_jtag_to_core_sync.scala 25:18] + rden <= _T_2 @[dmi_jtag_to_core_sync.scala 25:8] + node _T_3 = bits(wren, 1, 0) @[dmi_jtag_to_core_sync.scala 26:27] + node _T_4 = cat(_T_3, io.wr_en) @[Cat.scala 29:58] + reg _T_5 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[dmi_jtag_to_core_sync.scala 26:18] + _T_5 <= _T_4 @[dmi_jtag_to_core_sync.scala 26:18] + wren <= _T_5 @[dmi_jtag_to_core_sync.scala 26:8] + node _T_6 = bits(rden, 1, 1) @[dmi_jtag_to_core_sync.scala 28:21] + node _T_7 = bits(rden, 2, 2) @[dmi_jtag_to_core_sync.scala 28:32] + node _T_8 = eq(_T_7, UInt<1>("h00")) @[dmi_jtag_to_core_sync.scala 28:27] + node c_rd_en = and(_T_6, _T_8) @[dmi_jtag_to_core_sync.scala 28:25] + node _T_9 = bits(wren, 1, 1) @[dmi_jtag_to_core_sync.scala 29:21] + node _T_10 = bits(wren, 2, 2) @[dmi_jtag_to_core_sync.scala 29:32] + node _T_11 = eq(_T_10, UInt<1>("h00")) @[dmi_jtag_to_core_sync.scala 29:27] + node c_wr_en = and(_T_9, _T_11) @[dmi_jtag_to_core_sync.scala 29:25] + node _T_12 = or(c_wr_en, c_rd_en) @[dmi_jtag_to_core_sync.scala 31:24] + io.reg_en <= _T_12 @[dmi_jtag_to_core_sync.scala 31:13] + io.reg_wr_en <= c_wr_en @[dmi_jtag_to_core_sync.scala 32:16] + + module dmi_wrapper : + input clock : Clock + input reset : AsyncReset + output io : {flip tck : Clock, flip tms : UInt<1>, flip tdi : UInt<1>, tdo : UInt<1>, tdoEnable : UInt<1>, flip core_clk : Clock, flip jtag_id : UInt<32>, flip rd_data : UInt<32>, reg_wr_data : UInt<32>, reg_wr_addr : UInt<7>, reg_en : UInt<1>, reg_wr_en : UInt<1>, dmi_hard_reset : UInt<1>} + + wire rd_en : UInt<1> + rd_en <= UInt<1>("h00") + wire wr_en : UInt<1> + wr_en <= UInt<1>("h00") + wire dmireset : UInt<1> + dmireset <= UInt<1>("h00") + inst i_jtag_tap of rvjtag_tap @[dmi_wrapper.scala 33:27] + i_jtag_tap.clock <= clock + i_jtag_tap.reset <= reset + i_jtag_tap.io.tck <= io.tck @[dmi_wrapper.scala 36:27] + i_jtag_tap.io.tms <= io.tms @[dmi_wrapper.scala 37:27] + i_jtag_tap.io.tdi <= io.tdi @[dmi_wrapper.scala 38:27] + i_jtag_tap.io.rd_data <= io.rd_data @[dmi_wrapper.scala 39:27] + i_jtag_tap.io.rd_status <= UInt<2>("h00") @[dmi_wrapper.scala 40:27] + i_jtag_tap.io.idle <= UInt<3>("h00") @[dmi_wrapper.scala 41:27] + i_jtag_tap.io.dmi_stat <= UInt<2>("h00") @[dmi_wrapper.scala 42:27] + i_jtag_tap.io.jtag_id <= io.jtag_id @[dmi_wrapper.scala 43:27] + i_jtag_tap.io.version <= UInt<1>("h01") @[dmi_wrapper.scala 44:27] + io.tdo <= i_jtag_tap.io.tdo @[dmi_wrapper.scala 46:27] + io.tdoEnable <= i_jtag_tap.io.tdoEnable @[dmi_wrapper.scala 47:27] + io.reg_wr_data <= i_jtag_tap.io.wr_data @[dmi_wrapper.scala 48:27] + io.reg_wr_addr <= i_jtag_tap.io.wr_addr @[dmi_wrapper.scala 49:27] + rd_en <= i_jtag_tap.io.rd_en @[dmi_wrapper.scala 50:27] + wr_en <= i_jtag_tap.io.wr_en @[dmi_wrapper.scala 51:27] + io.dmi_hard_reset <= i_jtag_tap.io.dmi_hard_reset @[dmi_wrapper.scala 52:27] + dmireset <= i_jtag_tap.io.dmi_reset @[dmi_wrapper.scala 53:27] + inst i_dmi_jtag_to_core_sync of dmi_jtag_to_core_sync @[dmi_wrapper.scala 56:40] + i_dmi_jtag_to_core_sync.clock <= clock + i_dmi_jtag_to_core_sync.reset <= reset + i_dmi_jtag_to_core_sync.io.wr_en <= wr_en @[dmi_wrapper.scala 57:39] + i_dmi_jtag_to_core_sync.io.rd_en <= rd_en @[dmi_wrapper.scala 58:39] + io.reg_en <= i_dmi_jtag_to_core_sync.io.reg_en @[dmi_wrapper.scala 59:39] + io.reg_wr_en <= i_dmi_jtag_to_core_sync.io.reg_wr_en @[dmi_wrapper.scala 60:39] + diff --git a/dmi_wrapper.v b/dmi_wrapper.v new file mode 100644 index 00000000..c91defd8 --- /dev/null +++ b/dmi_wrapper.v @@ -0,0 +1,122 @@ +module dmi_jtag_to_core_sync( + input clock, + input reset, + output io_reg_en, + output io_reg_wr_en +); +`ifdef RANDOMIZE_REG_INIT + reg [31:0] _RAND_0; + reg [31:0] _RAND_1; +`endif // RANDOMIZE_REG_INIT + reg [2:0] rden; // @[dmi_jtag_to_core_sync.scala 25:18] + reg [2:0] wren; // @[dmi_jtag_to_core_sync.scala 26:18] + wire _T_8 = ~rden[2]; // @[dmi_jtag_to_core_sync.scala 28:27] + wire c_rd_en = rden[1] & _T_8; // @[dmi_jtag_to_core_sync.scala 28:25] + wire _T_11 = ~wren[2]; // @[dmi_jtag_to_core_sync.scala 29:27] + wire c_wr_en = wren[1] & _T_11; // @[dmi_jtag_to_core_sync.scala 29:25] + assign io_reg_en = c_wr_en | c_rd_en; // @[dmi_jtag_to_core_sync.scala 19:16 dmi_jtag_to_core_sync.scala 31:13] + assign io_reg_wr_en = wren[1] & _T_11; // @[dmi_jtag_to_core_sync.scala 20:16 dmi_jtag_to_core_sync.scala 32:16] +`ifdef RANDOMIZE_GARBAGE_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_INVALID_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_REG_INIT +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_MEM_INIT +`define RANDOMIZE +`endif +`ifndef RANDOM +`define RANDOM $random +`endif +`ifdef RANDOMIZE_MEM_INIT + integer initvar; +`endif +`ifndef SYNTHESIS +`ifdef FIRRTL_BEFORE_INITIAL +`FIRRTL_BEFORE_INITIAL +`endif +initial begin + `ifdef RANDOMIZE + `ifdef INIT_RANDOM + `INIT_RANDOM + `endif + `ifndef VERILATOR + `ifdef RANDOMIZE_DELAY + #`RANDOMIZE_DELAY begin end + `else + #0.002 begin end + `endif + `endif +`ifdef RANDOMIZE_REG_INIT + _RAND_0 = {1{`RANDOM}}; + rden = _RAND_0[2:0]; + _RAND_1 = {1{`RANDOM}}; + wren = _RAND_1[2:0]; +`endif // RANDOMIZE_REG_INIT + if (reset) begin + rden = 3'h0; + end + if (reset) begin + wren = 3'h0; + end + `endif // RANDOMIZE +end // initial +`ifdef FIRRTL_AFTER_INITIAL +`FIRRTL_AFTER_INITIAL +`endif +`endif // SYNTHESIS + always @(posedge clock or posedge reset) begin + if (reset) begin + rden <= 3'h0; + end else begin + rden <= {rden[1:0],1'h0}; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + wren <= 3'h0; + end else begin + wren <= {wren[1:0],1'h0}; + end + end +endmodule +module dmi_wrapper( + input clock, + input reset, + input io_tck, + input io_tms, + input io_tdi, + output io_tdo, + output io_tdoEnable, + input io_core_clk, + input [31:0] io_jtag_id, + input [31:0] io_rd_data, + output [31:0] io_reg_wr_data, + output [6:0] io_reg_wr_addr, + output io_reg_en, + output io_reg_wr_en, + output io_dmi_hard_reset +); + wire i_dmi_jtag_to_core_sync_clock; // @[dmi_wrapper.scala 56:40] + wire i_dmi_jtag_to_core_sync_reset; // @[dmi_wrapper.scala 56:40] + wire i_dmi_jtag_to_core_sync_io_reg_en; // @[dmi_wrapper.scala 56:40] + wire i_dmi_jtag_to_core_sync_io_reg_wr_en; // @[dmi_wrapper.scala 56:40] + dmi_jtag_to_core_sync i_dmi_jtag_to_core_sync ( // @[dmi_wrapper.scala 56:40] + .clock(i_dmi_jtag_to_core_sync_clock), + .reset(i_dmi_jtag_to_core_sync_reset), + .io_reg_en(i_dmi_jtag_to_core_sync_io_reg_en), + .io_reg_wr_en(i_dmi_jtag_to_core_sync_io_reg_wr_en) + ); + assign io_tdo = 1'h0; // @[dmi_wrapper.scala 46:27] + assign io_tdoEnable = 1'h0; // @[dmi_wrapper.scala 47:27] + assign io_reg_wr_data = 32'h0; // @[dmi_wrapper.scala 48:27] + assign io_reg_wr_addr = 7'h0; // @[dmi_wrapper.scala 49:27] + assign io_reg_en = i_dmi_jtag_to_core_sync_io_reg_en; // @[dmi_wrapper.scala 59:39] + assign io_reg_wr_en = i_dmi_jtag_to_core_sync_io_reg_wr_en; // @[dmi_wrapper.scala 60:39] + assign io_dmi_hard_reset = 1'h0; // @[dmi_wrapper.scala 52:27] + assign i_dmi_jtag_to_core_sync_clock = clock; + assign i_dmi_jtag_to_core_sync_reset = reset; +endmodule diff --git a/el2_dec_trigger.anno.json b/el2_dec_trigger.anno.json new file mode 100644 index 00000000..b46322b8 --- /dev/null +++ b/el2_dec_trigger.anno.json @@ -0,0 +1,45 @@ +[ + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_dec_trigger|el2_dec_trigger>io_dec_i0_trigger_match_d", + "sources":[ + "~el2_dec_trigger|el2_dec_trigger>io_trigger_pkt_any_0_execute", + "~el2_dec_trigger|el2_dec_trigger>io_trigger_pkt_any_0_m", + "~el2_dec_trigger|el2_dec_trigger>io_trigger_pkt_any_1_execute", + "~el2_dec_trigger|el2_dec_trigger>io_trigger_pkt_any_1_m", + "~el2_dec_trigger|el2_dec_trigger>io_trigger_pkt_any_3_execute", + "~el2_dec_trigger|el2_dec_trigger>io_trigger_pkt_any_3_m", + "~el2_dec_trigger|el2_dec_trigger>io_trigger_pkt_any_2_execute", + "~el2_dec_trigger|el2_dec_trigger>io_trigger_pkt_any_2_m", + "~el2_dec_trigger|el2_dec_trigger>io_trigger_pkt_any_0_tdata2", + "~el2_dec_trigger|el2_dec_trigger>io_trigger_pkt_any_1_tdata2", + "~el2_dec_trigger|el2_dec_trigger>io_trigger_pkt_any_0_match_", + "~el2_dec_trigger|el2_dec_trigger>io_trigger_pkt_any_3_tdata2", + "~el2_dec_trigger|el2_dec_trigger>io_trigger_pkt_any_2_tdata2", + "~el2_dec_trigger|el2_dec_trigger>io_trigger_pkt_any_1_match_", + "~el2_dec_trigger|el2_dec_trigger>io_trigger_pkt_any_3_match_", + "~el2_dec_trigger|el2_dec_trigger>io_trigger_pkt_any_2_match_", + "~el2_dec_trigger|el2_dec_trigger>io_dec_i0_pc_d", + "~el2_dec_trigger|el2_dec_trigger>io_trigger_pkt_any_0_select", + "~el2_dec_trigger|el2_dec_trigger>io_trigger_pkt_any_1_select", + "~el2_dec_trigger|el2_dec_trigger>io_trigger_pkt_any_3_select", + "~el2_dec_trigger|el2_dec_trigger>io_trigger_pkt_any_2_select" + ] + }, + { + "class":"firrtl.EmitCircuitAnnotation", + "emitter":"firrtl.VerilogEmitter" + }, + { + "class":"firrtl.options.TargetDirAnnotation", + "directory":"." + }, + { + "class":"firrtl.options.OutputAnnotationFileAnnotation", + "file":"el2_dec_trigger" + }, + { + "class":"firrtl.transforms.BlackBoxTargetDirAnno", + "targetDir":"." + } +] \ No newline at end of file diff --git a/el2_dec_trigger.fir b/el2_dec_trigger.fir new file mode 100644 index 00000000..26647ae8 --- /dev/null +++ b/el2_dec_trigger.fir @@ -0,0 +1,1457 @@ +;buildInfoPackage: chisel3, version: 3.3.1, scalaVersion: 2.12.11, sbtVersion: 1.3.10 +circuit el2_dec_trigger : + module el2_dec_trigger : + input clock : Clock + input reset : UInt<1> + output io : {flip trigger_pkt_any : {select : UInt<1>, match_ : UInt<1>, store : UInt<1>, load : UInt<1>, execute : UInt<1>, m : UInt<1>, tdata2 : UInt<32>}[4], flip dec_i0_pc_d : UInt<31>, dec_i0_trigger_match_d : UInt<4>} + + node _T = eq(io.trigger_pkt_any[0].select, UInt<1>("h00")) @[el2_lsu_trigger.scala 15:63] + node _T_1 = and(_T, io.trigger_pkt_any[0].execute) @[el2_lsu_trigger.scala 15:93] + wire _T_2 : UInt<1>[32] @[el2_lib.scala 177:24] + _T_2[0] <= _T_1 @[el2_lib.scala 177:24] + _T_2[1] <= _T_1 @[el2_lib.scala 177:24] + _T_2[2] <= _T_1 @[el2_lib.scala 177:24] + _T_2[3] <= _T_1 @[el2_lib.scala 177:24] + _T_2[4] <= _T_1 @[el2_lib.scala 177:24] + _T_2[5] <= _T_1 @[el2_lib.scala 177:24] + _T_2[6] <= _T_1 @[el2_lib.scala 177:24] + _T_2[7] <= _T_1 @[el2_lib.scala 177:24] + _T_2[8] <= _T_1 @[el2_lib.scala 177:24] + _T_2[9] <= _T_1 @[el2_lib.scala 177:24] + _T_2[10] <= _T_1 @[el2_lib.scala 177:24] + _T_2[11] <= _T_1 @[el2_lib.scala 177:24] + _T_2[12] <= _T_1 @[el2_lib.scala 177:24] + _T_2[13] <= _T_1 @[el2_lib.scala 177:24] + _T_2[14] <= _T_1 @[el2_lib.scala 177:24] + _T_2[15] <= _T_1 @[el2_lib.scala 177:24] + _T_2[16] <= _T_1 @[el2_lib.scala 177:24] + _T_2[17] <= _T_1 @[el2_lib.scala 177:24] + _T_2[18] <= _T_1 @[el2_lib.scala 177:24] + _T_2[19] <= _T_1 @[el2_lib.scala 177:24] + _T_2[20] <= _T_1 @[el2_lib.scala 177:24] + _T_2[21] <= _T_1 @[el2_lib.scala 177:24] + _T_2[22] <= _T_1 @[el2_lib.scala 177:24] + _T_2[23] <= _T_1 @[el2_lib.scala 177:24] + _T_2[24] <= _T_1 @[el2_lib.scala 177:24] + _T_2[25] <= _T_1 @[el2_lib.scala 177:24] + _T_2[26] <= _T_1 @[el2_lib.scala 177:24] + _T_2[27] <= _T_1 @[el2_lib.scala 177:24] + _T_2[28] <= _T_1 @[el2_lib.scala 177:24] + _T_2[29] <= _T_1 @[el2_lib.scala 177:24] + _T_2[30] <= _T_1 @[el2_lib.scala 177:24] + _T_2[31] <= _T_1 @[el2_lib.scala 177:24] + node _T_3 = cat(_T_2[0], _T_2[1]) @[Cat.scala 29:58] + node _T_4 = cat(_T_3, _T_2[2]) @[Cat.scala 29:58] + node _T_5 = cat(_T_4, _T_2[3]) @[Cat.scala 29:58] + node _T_6 = cat(_T_5, _T_2[4]) @[Cat.scala 29:58] + node _T_7 = cat(_T_6, _T_2[5]) @[Cat.scala 29:58] + node _T_8 = cat(_T_7, _T_2[6]) @[Cat.scala 29:58] + node _T_9 = cat(_T_8, _T_2[7]) @[Cat.scala 29:58] + node _T_10 = cat(_T_9, _T_2[8]) @[Cat.scala 29:58] + node _T_11 = cat(_T_10, _T_2[9]) @[Cat.scala 29:58] + node _T_12 = cat(_T_11, _T_2[10]) @[Cat.scala 29:58] + node _T_13 = cat(_T_12, _T_2[11]) @[Cat.scala 29:58] + node _T_14 = cat(_T_13, _T_2[12]) @[Cat.scala 29:58] + node _T_15 = cat(_T_14, _T_2[13]) @[Cat.scala 29:58] + node _T_16 = cat(_T_15, _T_2[14]) @[Cat.scala 29:58] + node _T_17 = cat(_T_16, _T_2[15]) @[Cat.scala 29:58] + node _T_18 = cat(_T_17, _T_2[16]) @[Cat.scala 29:58] + node _T_19 = cat(_T_18, _T_2[17]) @[Cat.scala 29:58] + node _T_20 = cat(_T_19, _T_2[18]) @[Cat.scala 29:58] + node _T_21 = cat(_T_20, _T_2[19]) @[Cat.scala 29:58] + node _T_22 = cat(_T_21, _T_2[20]) @[Cat.scala 29:58] + node _T_23 = cat(_T_22, _T_2[21]) @[Cat.scala 29:58] + node _T_24 = cat(_T_23, _T_2[22]) @[Cat.scala 29:58] + node _T_25 = cat(_T_24, _T_2[23]) @[Cat.scala 29:58] + node _T_26 = cat(_T_25, _T_2[24]) @[Cat.scala 29:58] + node _T_27 = cat(_T_26, _T_2[25]) @[Cat.scala 29:58] + node _T_28 = cat(_T_27, _T_2[26]) @[Cat.scala 29:58] + node _T_29 = cat(_T_28, _T_2[27]) @[Cat.scala 29:58] + node _T_30 = cat(_T_29, _T_2[28]) @[Cat.scala 29:58] + node _T_31 = cat(_T_30, _T_2[29]) @[Cat.scala 29:58] + node _T_32 = cat(_T_31, _T_2[30]) @[Cat.scala 29:58] + node _T_33 = cat(_T_32, _T_2[31]) @[Cat.scala 29:58] + node _T_34 = bits(io.trigger_pkt_any[0].tdata2, 0, 0) @[el2_lsu_trigger.scala 15:177] + node _T_35 = cat(io.dec_i0_pc_d, _T_34) @[Cat.scala 29:58] + node _T_36 = and(_T_33, _T_35) @[el2_lsu_trigger.scala 15:127] + node _T_37 = eq(io.trigger_pkt_any[1].select, UInt<1>("h00")) @[el2_lsu_trigger.scala 15:63] + node _T_38 = and(_T_37, io.trigger_pkt_any[1].execute) @[el2_lsu_trigger.scala 15:93] + wire _T_39 : UInt<1>[32] @[el2_lib.scala 177:24] + _T_39[0] <= _T_38 @[el2_lib.scala 177:24] + _T_39[1] <= _T_38 @[el2_lib.scala 177:24] + _T_39[2] <= _T_38 @[el2_lib.scala 177:24] + _T_39[3] <= _T_38 @[el2_lib.scala 177:24] + _T_39[4] <= _T_38 @[el2_lib.scala 177:24] + _T_39[5] <= _T_38 @[el2_lib.scala 177:24] + _T_39[6] <= _T_38 @[el2_lib.scala 177:24] + _T_39[7] <= _T_38 @[el2_lib.scala 177:24] + _T_39[8] <= _T_38 @[el2_lib.scala 177:24] + _T_39[9] <= _T_38 @[el2_lib.scala 177:24] + _T_39[10] <= _T_38 @[el2_lib.scala 177:24] + _T_39[11] <= _T_38 @[el2_lib.scala 177:24] + _T_39[12] <= _T_38 @[el2_lib.scala 177:24] + _T_39[13] <= _T_38 @[el2_lib.scala 177:24] + _T_39[14] <= _T_38 @[el2_lib.scala 177:24] + _T_39[15] <= _T_38 @[el2_lib.scala 177:24] + _T_39[16] <= _T_38 @[el2_lib.scala 177:24] + _T_39[17] <= _T_38 @[el2_lib.scala 177:24] + _T_39[18] <= _T_38 @[el2_lib.scala 177:24] + _T_39[19] <= _T_38 @[el2_lib.scala 177:24] + _T_39[20] <= _T_38 @[el2_lib.scala 177:24] + _T_39[21] <= _T_38 @[el2_lib.scala 177:24] + _T_39[22] <= _T_38 @[el2_lib.scala 177:24] + _T_39[23] <= _T_38 @[el2_lib.scala 177:24] + _T_39[24] <= _T_38 @[el2_lib.scala 177:24] + _T_39[25] <= _T_38 @[el2_lib.scala 177:24] + _T_39[26] <= _T_38 @[el2_lib.scala 177:24] + _T_39[27] <= _T_38 @[el2_lib.scala 177:24] + _T_39[28] <= _T_38 @[el2_lib.scala 177:24] + _T_39[29] <= _T_38 @[el2_lib.scala 177:24] + _T_39[30] <= _T_38 @[el2_lib.scala 177:24] + _T_39[31] <= _T_38 @[el2_lib.scala 177:24] + node _T_40 = cat(_T_39[0], _T_39[1]) @[Cat.scala 29:58] + node _T_41 = cat(_T_40, _T_39[2]) @[Cat.scala 29:58] + node _T_42 = cat(_T_41, _T_39[3]) @[Cat.scala 29:58] + node _T_43 = cat(_T_42, _T_39[4]) @[Cat.scala 29:58] + node _T_44 = cat(_T_43, _T_39[5]) @[Cat.scala 29:58] + node _T_45 = cat(_T_44, _T_39[6]) @[Cat.scala 29:58] + node _T_46 = cat(_T_45, _T_39[7]) @[Cat.scala 29:58] + node _T_47 = cat(_T_46, _T_39[8]) @[Cat.scala 29:58] + node _T_48 = cat(_T_47, _T_39[9]) @[Cat.scala 29:58] + node _T_49 = cat(_T_48, _T_39[10]) @[Cat.scala 29:58] + node _T_50 = cat(_T_49, _T_39[11]) @[Cat.scala 29:58] + node _T_51 = cat(_T_50, _T_39[12]) @[Cat.scala 29:58] + node _T_52 = cat(_T_51, _T_39[13]) @[Cat.scala 29:58] + node _T_53 = cat(_T_52, _T_39[14]) @[Cat.scala 29:58] + node _T_54 = cat(_T_53, _T_39[15]) @[Cat.scala 29:58] + node _T_55 = cat(_T_54, _T_39[16]) @[Cat.scala 29:58] + node _T_56 = cat(_T_55, _T_39[17]) @[Cat.scala 29:58] + node _T_57 = cat(_T_56, _T_39[18]) @[Cat.scala 29:58] + node _T_58 = cat(_T_57, _T_39[19]) @[Cat.scala 29:58] + node _T_59 = cat(_T_58, _T_39[20]) @[Cat.scala 29:58] + node _T_60 = cat(_T_59, _T_39[21]) @[Cat.scala 29:58] + node _T_61 = cat(_T_60, _T_39[22]) @[Cat.scala 29:58] + node _T_62 = cat(_T_61, _T_39[23]) @[Cat.scala 29:58] + node _T_63 = cat(_T_62, _T_39[24]) @[Cat.scala 29:58] + node _T_64 = cat(_T_63, _T_39[25]) @[Cat.scala 29:58] + node _T_65 = cat(_T_64, _T_39[26]) @[Cat.scala 29:58] + node _T_66 = cat(_T_65, _T_39[27]) @[Cat.scala 29:58] + node _T_67 = cat(_T_66, _T_39[28]) @[Cat.scala 29:58] + node _T_68 = cat(_T_67, _T_39[29]) @[Cat.scala 29:58] + node _T_69 = cat(_T_68, _T_39[30]) @[Cat.scala 29:58] + node _T_70 = cat(_T_69, _T_39[31]) @[Cat.scala 29:58] + node _T_71 = bits(io.trigger_pkt_any[1].tdata2, 0, 0) @[el2_lsu_trigger.scala 15:177] + node _T_72 = cat(io.dec_i0_pc_d, _T_71) @[Cat.scala 29:58] + node _T_73 = and(_T_70, _T_72) @[el2_lsu_trigger.scala 15:127] + node _T_74 = eq(io.trigger_pkt_any[2].select, UInt<1>("h00")) @[el2_lsu_trigger.scala 15:63] + node _T_75 = and(_T_74, io.trigger_pkt_any[2].execute) @[el2_lsu_trigger.scala 15:93] + wire _T_76 : UInt<1>[32] @[el2_lib.scala 177:24] + _T_76[0] <= _T_75 @[el2_lib.scala 177:24] + _T_76[1] <= _T_75 @[el2_lib.scala 177:24] + _T_76[2] <= _T_75 @[el2_lib.scala 177:24] + _T_76[3] <= _T_75 @[el2_lib.scala 177:24] + _T_76[4] <= _T_75 @[el2_lib.scala 177:24] + _T_76[5] <= _T_75 @[el2_lib.scala 177:24] + _T_76[6] <= _T_75 @[el2_lib.scala 177:24] + _T_76[7] <= _T_75 @[el2_lib.scala 177:24] + _T_76[8] <= _T_75 @[el2_lib.scala 177:24] + _T_76[9] <= _T_75 @[el2_lib.scala 177:24] + _T_76[10] <= _T_75 @[el2_lib.scala 177:24] + _T_76[11] <= _T_75 @[el2_lib.scala 177:24] + _T_76[12] <= _T_75 @[el2_lib.scala 177:24] + _T_76[13] <= _T_75 @[el2_lib.scala 177:24] + _T_76[14] <= _T_75 @[el2_lib.scala 177:24] + _T_76[15] <= _T_75 @[el2_lib.scala 177:24] + _T_76[16] <= _T_75 @[el2_lib.scala 177:24] + _T_76[17] <= _T_75 @[el2_lib.scala 177:24] + _T_76[18] <= _T_75 @[el2_lib.scala 177:24] + _T_76[19] <= _T_75 @[el2_lib.scala 177:24] + _T_76[20] <= _T_75 @[el2_lib.scala 177:24] + _T_76[21] <= _T_75 @[el2_lib.scala 177:24] + _T_76[22] <= _T_75 @[el2_lib.scala 177:24] + _T_76[23] <= _T_75 @[el2_lib.scala 177:24] + _T_76[24] <= _T_75 @[el2_lib.scala 177:24] + _T_76[25] <= _T_75 @[el2_lib.scala 177:24] + _T_76[26] <= _T_75 @[el2_lib.scala 177:24] + _T_76[27] <= _T_75 @[el2_lib.scala 177:24] + _T_76[28] <= _T_75 @[el2_lib.scala 177:24] + _T_76[29] <= _T_75 @[el2_lib.scala 177:24] + _T_76[30] <= _T_75 @[el2_lib.scala 177:24] + _T_76[31] <= _T_75 @[el2_lib.scala 177:24] + node _T_77 = cat(_T_76[0], _T_76[1]) @[Cat.scala 29:58] + node _T_78 = cat(_T_77, _T_76[2]) @[Cat.scala 29:58] + node _T_79 = cat(_T_78, _T_76[3]) @[Cat.scala 29:58] + node _T_80 = cat(_T_79, _T_76[4]) @[Cat.scala 29:58] + node _T_81 = cat(_T_80, _T_76[5]) @[Cat.scala 29:58] + node _T_82 = cat(_T_81, _T_76[6]) @[Cat.scala 29:58] + node _T_83 = cat(_T_82, _T_76[7]) @[Cat.scala 29:58] + node _T_84 = cat(_T_83, _T_76[8]) @[Cat.scala 29:58] + node _T_85 = cat(_T_84, _T_76[9]) @[Cat.scala 29:58] + node _T_86 = cat(_T_85, _T_76[10]) @[Cat.scala 29:58] + node _T_87 = cat(_T_86, _T_76[11]) @[Cat.scala 29:58] + node _T_88 = cat(_T_87, _T_76[12]) @[Cat.scala 29:58] + node _T_89 = cat(_T_88, _T_76[13]) @[Cat.scala 29:58] + node _T_90 = cat(_T_89, _T_76[14]) @[Cat.scala 29:58] + node _T_91 = cat(_T_90, _T_76[15]) @[Cat.scala 29:58] + node _T_92 = cat(_T_91, _T_76[16]) @[Cat.scala 29:58] + node _T_93 = cat(_T_92, _T_76[17]) @[Cat.scala 29:58] + node _T_94 = cat(_T_93, _T_76[18]) @[Cat.scala 29:58] + node _T_95 = cat(_T_94, _T_76[19]) @[Cat.scala 29:58] + node _T_96 = cat(_T_95, _T_76[20]) @[Cat.scala 29:58] + node _T_97 = cat(_T_96, _T_76[21]) @[Cat.scala 29:58] + node _T_98 = cat(_T_97, _T_76[22]) @[Cat.scala 29:58] + node _T_99 = cat(_T_98, _T_76[23]) @[Cat.scala 29:58] + node _T_100 = cat(_T_99, _T_76[24]) @[Cat.scala 29:58] + node _T_101 = cat(_T_100, _T_76[25]) @[Cat.scala 29:58] + node _T_102 = cat(_T_101, _T_76[26]) @[Cat.scala 29:58] + node _T_103 = cat(_T_102, _T_76[27]) @[Cat.scala 29:58] + node _T_104 = cat(_T_103, _T_76[28]) @[Cat.scala 29:58] + node _T_105 = cat(_T_104, _T_76[29]) @[Cat.scala 29:58] + node _T_106 = cat(_T_105, _T_76[30]) @[Cat.scala 29:58] + node _T_107 = cat(_T_106, _T_76[31]) @[Cat.scala 29:58] + node _T_108 = bits(io.trigger_pkt_any[2].tdata2, 0, 0) @[el2_lsu_trigger.scala 15:177] + node _T_109 = cat(io.dec_i0_pc_d, _T_108) @[Cat.scala 29:58] + node _T_110 = and(_T_107, _T_109) @[el2_lsu_trigger.scala 15:127] + node _T_111 = eq(io.trigger_pkt_any[3].select, UInt<1>("h00")) @[el2_lsu_trigger.scala 15:63] + node _T_112 = and(_T_111, io.trigger_pkt_any[3].execute) @[el2_lsu_trigger.scala 15:93] + wire _T_113 : UInt<1>[32] @[el2_lib.scala 177:24] + _T_113[0] <= _T_112 @[el2_lib.scala 177:24] + _T_113[1] <= _T_112 @[el2_lib.scala 177:24] + _T_113[2] <= _T_112 @[el2_lib.scala 177:24] + _T_113[3] <= _T_112 @[el2_lib.scala 177:24] + _T_113[4] <= _T_112 @[el2_lib.scala 177:24] + _T_113[5] <= _T_112 @[el2_lib.scala 177:24] + _T_113[6] <= _T_112 @[el2_lib.scala 177:24] + _T_113[7] <= _T_112 @[el2_lib.scala 177:24] + _T_113[8] <= _T_112 @[el2_lib.scala 177:24] + _T_113[9] <= _T_112 @[el2_lib.scala 177:24] + _T_113[10] <= _T_112 @[el2_lib.scala 177:24] + _T_113[11] <= _T_112 @[el2_lib.scala 177:24] + _T_113[12] <= _T_112 @[el2_lib.scala 177:24] + _T_113[13] <= _T_112 @[el2_lib.scala 177:24] + _T_113[14] <= _T_112 @[el2_lib.scala 177:24] + _T_113[15] <= _T_112 @[el2_lib.scala 177:24] + _T_113[16] <= _T_112 @[el2_lib.scala 177:24] + _T_113[17] <= _T_112 @[el2_lib.scala 177:24] + _T_113[18] <= _T_112 @[el2_lib.scala 177:24] + _T_113[19] <= _T_112 @[el2_lib.scala 177:24] + _T_113[20] <= _T_112 @[el2_lib.scala 177:24] + _T_113[21] <= _T_112 @[el2_lib.scala 177:24] + _T_113[22] <= _T_112 @[el2_lib.scala 177:24] + _T_113[23] <= _T_112 @[el2_lib.scala 177:24] + _T_113[24] <= _T_112 @[el2_lib.scala 177:24] + _T_113[25] <= _T_112 @[el2_lib.scala 177:24] + _T_113[26] <= _T_112 @[el2_lib.scala 177:24] + _T_113[27] <= _T_112 @[el2_lib.scala 177:24] + _T_113[28] <= _T_112 @[el2_lib.scala 177:24] + _T_113[29] <= _T_112 @[el2_lib.scala 177:24] + _T_113[30] <= _T_112 @[el2_lib.scala 177:24] + _T_113[31] <= _T_112 @[el2_lib.scala 177:24] + node _T_114 = cat(_T_113[0], _T_113[1]) @[Cat.scala 29:58] + node _T_115 = cat(_T_114, _T_113[2]) @[Cat.scala 29:58] + node _T_116 = cat(_T_115, _T_113[3]) @[Cat.scala 29:58] + node _T_117 = cat(_T_116, _T_113[4]) @[Cat.scala 29:58] + node _T_118 = cat(_T_117, _T_113[5]) @[Cat.scala 29:58] + node _T_119 = cat(_T_118, _T_113[6]) @[Cat.scala 29:58] + node _T_120 = cat(_T_119, _T_113[7]) @[Cat.scala 29:58] + node _T_121 = cat(_T_120, _T_113[8]) @[Cat.scala 29:58] + node _T_122 = cat(_T_121, _T_113[9]) @[Cat.scala 29:58] + node _T_123 = cat(_T_122, _T_113[10]) @[Cat.scala 29:58] + node _T_124 = cat(_T_123, _T_113[11]) @[Cat.scala 29:58] + node _T_125 = cat(_T_124, _T_113[12]) @[Cat.scala 29:58] + node _T_126 = cat(_T_125, _T_113[13]) @[Cat.scala 29:58] + node _T_127 = cat(_T_126, _T_113[14]) @[Cat.scala 29:58] + node _T_128 = cat(_T_127, _T_113[15]) @[Cat.scala 29:58] + node _T_129 = cat(_T_128, _T_113[16]) @[Cat.scala 29:58] + node _T_130 = cat(_T_129, _T_113[17]) @[Cat.scala 29:58] + node _T_131 = cat(_T_130, _T_113[18]) @[Cat.scala 29:58] + node _T_132 = cat(_T_131, _T_113[19]) @[Cat.scala 29:58] + node _T_133 = cat(_T_132, _T_113[20]) @[Cat.scala 29:58] + node _T_134 = cat(_T_133, _T_113[21]) @[Cat.scala 29:58] + node _T_135 = cat(_T_134, _T_113[22]) @[Cat.scala 29:58] + node _T_136 = cat(_T_135, _T_113[23]) @[Cat.scala 29:58] + node _T_137 = cat(_T_136, _T_113[24]) @[Cat.scala 29:58] + node _T_138 = cat(_T_137, _T_113[25]) @[Cat.scala 29:58] + node _T_139 = cat(_T_138, _T_113[26]) @[Cat.scala 29:58] + node _T_140 = cat(_T_139, _T_113[27]) @[Cat.scala 29:58] + node _T_141 = cat(_T_140, _T_113[28]) @[Cat.scala 29:58] + node _T_142 = cat(_T_141, _T_113[29]) @[Cat.scala 29:58] + node _T_143 = cat(_T_142, _T_113[30]) @[Cat.scala 29:58] + node _T_144 = cat(_T_143, _T_113[31]) @[Cat.scala 29:58] + node _T_145 = bits(io.trigger_pkt_any[3].tdata2, 0, 0) @[el2_lsu_trigger.scala 15:177] + node _T_146 = cat(io.dec_i0_pc_d, _T_145) @[Cat.scala 29:58] + node _T_147 = and(_T_144, _T_146) @[el2_lsu_trigger.scala 15:127] + wire dec_i0_match_data : UInt<32>[4] @[el2_lsu_trigger.scala 15:46] + dec_i0_match_data[0] <= _T_36 @[el2_lsu_trigger.scala 15:46] + dec_i0_match_data[1] <= _T_73 @[el2_lsu_trigger.scala 15:46] + dec_i0_match_data[2] <= _T_110 @[el2_lsu_trigger.scala 15:46] + dec_i0_match_data[3] <= _T_147 @[el2_lsu_trigger.scala 15:46] + node _T_148 = and(io.trigger_pkt_any[0].execute, io.trigger_pkt_any[0].m) @[el2_lsu_trigger.scala 16:83] + node _T_149 = bits(io.trigger_pkt_any[0].match_, 0, 0) @[el2_lsu_trigger.scala 16:213] + wire _T_150 : UInt<1>[32] @[el2_lib.scala 193:24] + node _T_151 = andr(io.trigger_pkt_any[0].tdata2) @[el2_lib.scala 194:45] + node _T_152 = not(_T_151) @[el2_lib.scala 194:39] + node _T_153 = and(_T_149, _T_152) @[el2_lib.scala 194:37] + node _T_154 = bits(io.trigger_pkt_any[0].tdata2, 0, 0) @[el2_lib.scala 195:48] + node _T_155 = bits(dec_i0_match_data[0], 0, 0) @[el2_lib.scala 195:60] + node _T_156 = eq(_T_154, _T_155) @[el2_lib.scala 195:52] + node _T_157 = or(_T_153, _T_156) @[el2_lib.scala 195:41] + _T_150[0] <= _T_157 @[el2_lib.scala 195:18] + node _T_158 = bits(io.trigger_pkt_any[0].tdata2, 0, 0) @[el2_lib.scala 197:30] + node _T_159 = andr(_T_158) @[el2_lib.scala 197:38] + node _T_160 = and(_T_159, _T_153) @[el2_lib.scala 197:43] + node _T_161 = bits(io.trigger_pkt_any[0].tdata2, 1, 1) @[el2_lib.scala 197:76] + node _T_162 = bits(dec_i0_match_data[0], 1, 1) @[el2_lib.scala 197:88] + node _T_163 = eq(_T_161, _T_162) @[el2_lib.scala 197:80] + node _T_164 = mux(_T_160, UInt<1>("h01"), _T_163) @[el2_lib.scala 197:25] + _T_150[1] <= _T_164 @[el2_lib.scala 197:19] + node _T_165 = bits(io.trigger_pkt_any[0].tdata2, 1, 0) @[el2_lib.scala 197:30] + node _T_166 = andr(_T_165) @[el2_lib.scala 197:38] + node _T_167 = and(_T_166, _T_153) @[el2_lib.scala 197:43] + node _T_168 = bits(io.trigger_pkt_any[0].tdata2, 2, 2) @[el2_lib.scala 197:76] + node _T_169 = bits(dec_i0_match_data[0], 2, 2) @[el2_lib.scala 197:88] + node _T_170 = eq(_T_168, _T_169) @[el2_lib.scala 197:80] + node _T_171 = mux(_T_167, UInt<1>("h01"), _T_170) @[el2_lib.scala 197:25] + _T_150[2] <= _T_171 @[el2_lib.scala 197:19] + node _T_172 = bits(io.trigger_pkt_any[0].tdata2, 2, 0) @[el2_lib.scala 197:30] + node _T_173 = andr(_T_172) @[el2_lib.scala 197:38] + node _T_174 = and(_T_173, _T_153) @[el2_lib.scala 197:43] + node _T_175 = bits(io.trigger_pkt_any[0].tdata2, 3, 3) @[el2_lib.scala 197:76] + node _T_176 = bits(dec_i0_match_data[0], 3, 3) @[el2_lib.scala 197:88] + node _T_177 = eq(_T_175, _T_176) @[el2_lib.scala 197:80] + node _T_178 = mux(_T_174, UInt<1>("h01"), _T_177) @[el2_lib.scala 197:25] + _T_150[3] <= _T_178 @[el2_lib.scala 197:19] + node _T_179 = bits(io.trigger_pkt_any[0].tdata2, 3, 0) @[el2_lib.scala 197:30] + node _T_180 = andr(_T_179) @[el2_lib.scala 197:38] + node _T_181 = and(_T_180, _T_153) @[el2_lib.scala 197:43] + node _T_182 = bits(io.trigger_pkt_any[0].tdata2, 4, 4) @[el2_lib.scala 197:76] + node _T_183 = bits(dec_i0_match_data[0], 4, 4) @[el2_lib.scala 197:88] + node _T_184 = eq(_T_182, _T_183) @[el2_lib.scala 197:80] + node _T_185 = mux(_T_181, UInt<1>("h01"), _T_184) @[el2_lib.scala 197:25] + _T_150[4] <= _T_185 @[el2_lib.scala 197:19] + node _T_186 = bits(io.trigger_pkt_any[0].tdata2, 4, 0) @[el2_lib.scala 197:30] + node _T_187 = andr(_T_186) @[el2_lib.scala 197:38] + node _T_188 = and(_T_187, _T_153) @[el2_lib.scala 197:43] + node _T_189 = bits(io.trigger_pkt_any[0].tdata2, 5, 5) @[el2_lib.scala 197:76] + node _T_190 = bits(dec_i0_match_data[0], 5, 5) @[el2_lib.scala 197:88] + node _T_191 = eq(_T_189, _T_190) @[el2_lib.scala 197:80] + node _T_192 = mux(_T_188, UInt<1>("h01"), _T_191) @[el2_lib.scala 197:25] + _T_150[5] <= _T_192 @[el2_lib.scala 197:19] + node _T_193 = bits(io.trigger_pkt_any[0].tdata2, 5, 0) @[el2_lib.scala 197:30] + node _T_194 = andr(_T_193) @[el2_lib.scala 197:38] + node _T_195 = and(_T_194, _T_153) @[el2_lib.scala 197:43] + node _T_196 = bits(io.trigger_pkt_any[0].tdata2, 6, 6) @[el2_lib.scala 197:76] + node _T_197 = bits(dec_i0_match_data[0], 6, 6) @[el2_lib.scala 197:88] + node _T_198 = eq(_T_196, _T_197) @[el2_lib.scala 197:80] + node _T_199 = mux(_T_195, UInt<1>("h01"), _T_198) @[el2_lib.scala 197:25] + _T_150[6] <= _T_199 @[el2_lib.scala 197:19] + node _T_200 = bits(io.trigger_pkt_any[0].tdata2, 6, 0) @[el2_lib.scala 197:30] + node _T_201 = andr(_T_200) @[el2_lib.scala 197:38] + node _T_202 = and(_T_201, _T_153) @[el2_lib.scala 197:43] + node _T_203 = bits(io.trigger_pkt_any[0].tdata2, 7, 7) @[el2_lib.scala 197:76] + node _T_204 = bits(dec_i0_match_data[0], 7, 7) @[el2_lib.scala 197:88] + node _T_205 = eq(_T_203, _T_204) @[el2_lib.scala 197:80] + node _T_206 = mux(_T_202, UInt<1>("h01"), _T_205) @[el2_lib.scala 197:25] + _T_150[7] <= _T_206 @[el2_lib.scala 197:19] + node _T_207 = bits(io.trigger_pkt_any[0].tdata2, 7, 0) @[el2_lib.scala 197:30] + node _T_208 = andr(_T_207) @[el2_lib.scala 197:38] + node _T_209 = and(_T_208, _T_153) @[el2_lib.scala 197:43] + node _T_210 = bits(io.trigger_pkt_any[0].tdata2, 8, 8) @[el2_lib.scala 197:76] + node _T_211 = bits(dec_i0_match_data[0], 8, 8) @[el2_lib.scala 197:88] + node _T_212 = eq(_T_210, _T_211) @[el2_lib.scala 197:80] + node _T_213 = mux(_T_209, UInt<1>("h01"), _T_212) @[el2_lib.scala 197:25] + _T_150[8] <= _T_213 @[el2_lib.scala 197:19] + node _T_214 = bits(io.trigger_pkt_any[0].tdata2, 8, 0) @[el2_lib.scala 197:30] + node _T_215 = andr(_T_214) @[el2_lib.scala 197:38] + node _T_216 = and(_T_215, _T_153) @[el2_lib.scala 197:43] + node _T_217 = bits(io.trigger_pkt_any[0].tdata2, 9, 9) @[el2_lib.scala 197:76] + node _T_218 = bits(dec_i0_match_data[0], 9, 9) @[el2_lib.scala 197:88] + node _T_219 = eq(_T_217, _T_218) @[el2_lib.scala 197:80] + node _T_220 = mux(_T_216, UInt<1>("h01"), _T_219) @[el2_lib.scala 197:25] + _T_150[9] <= _T_220 @[el2_lib.scala 197:19] + node _T_221 = bits(io.trigger_pkt_any[0].tdata2, 9, 0) @[el2_lib.scala 197:30] + node _T_222 = andr(_T_221) @[el2_lib.scala 197:38] + node _T_223 = and(_T_222, _T_153) @[el2_lib.scala 197:43] + node _T_224 = bits(io.trigger_pkt_any[0].tdata2, 10, 10) @[el2_lib.scala 197:76] + node _T_225 = bits(dec_i0_match_data[0], 10, 10) @[el2_lib.scala 197:88] + node _T_226 = eq(_T_224, _T_225) @[el2_lib.scala 197:80] + node _T_227 = mux(_T_223, UInt<1>("h01"), _T_226) @[el2_lib.scala 197:25] + _T_150[10] <= _T_227 @[el2_lib.scala 197:19] + node _T_228 = bits(io.trigger_pkt_any[0].tdata2, 10, 0) @[el2_lib.scala 197:30] + node _T_229 = andr(_T_228) @[el2_lib.scala 197:38] + node _T_230 = and(_T_229, _T_153) @[el2_lib.scala 197:43] + node _T_231 = bits(io.trigger_pkt_any[0].tdata2, 11, 11) @[el2_lib.scala 197:76] + node _T_232 = bits(dec_i0_match_data[0], 11, 11) @[el2_lib.scala 197:88] + node _T_233 = eq(_T_231, _T_232) @[el2_lib.scala 197:80] + node _T_234 = mux(_T_230, UInt<1>("h01"), _T_233) @[el2_lib.scala 197:25] + _T_150[11] <= _T_234 @[el2_lib.scala 197:19] + node _T_235 = bits(io.trigger_pkt_any[0].tdata2, 11, 0) @[el2_lib.scala 197:30] + node _T_236 = andr(_T_235) @[el2_lib.scala 197:38] + node _T_237 = and(_T_236, _T_153) @[el2_lib.scala 197:43] + node _T_238 = bits(io.trigger_pkt_any[0].tdata2, 12, 12) @[el2_lib.scala 197:76] + node _T_239 = bits(dec_i0_match_data[0], 12, 12) @[el2_lib.scala 197:88] + node _T_240 = eq(_T_238, _T_239) @[el2_lib.scala 197:80] + node _T_241 = mux(_T_237, UInt<1>("h01"), _T_240) @[el2_lib.scala 197:25] + _T_150[12] <= _T_241 @[el2_lib.scala 197:19] + node _T_242 = bits(io.trigger_pkt_any[0].tdata2, 12, 0) @[el2_lib.scala 197:30] + node _T_243 = andr(_T_242) @[el2_lib.scala 197:38] + node _T_244 = and(_T_243, _T_153) @[el2_lib.scala 197:43] + node _T_245 = bits(io.trigger_pkt_any[0].tdata2, 13, 13) @[el2_lib.scala 197:76] + node _T_246 = bits(dec_i0_match_data[0], 13, 13) @[el2_lib.scala 197:88] + node _T_247 = eq(_T_245, _T_246) @[el2_lib.scala 197:80] + node _T_248 = mux(_T_244, UInt<1>("h01"), _T_247) @[el2_lib.scala 197:25] + _T_150[13] <= _T_248 @[el2_lib.scala 197:19] + node _T_249 = bits(io.trigger_pkt_any[0].tdata2, 13, 0) @[el2_lib.scala 197:30] + node _T_250 = andr(_T_249) @[el2_lib.scala 197:38] + node _T_251 = and(_T_250, _T_153) @[el2_lib.scala 197:43] + node _T_252 = bits(io.trigger_pkt_any[0].tdata2, 14, 14) @[el2_lib.scala 197:76] + node _T_253 = bits(dec_i0_match_data[0], 14, 14) @[el2_lib.scala 197:88] + node _T_254 = eq(_T_252, _T_253) @[el2_lib.scala 197:80] + node _T_255 = mux(_T_251, UInt<1>("h01"), _T_254) @[el2_lib.scala 197:25] + _T_150[14] <= _T_255 @[el2_lib.scala 197:19] + node _T_256 = bits(io.trigger_pkt_any[0].tdata2, 14, 0) @[el2_lib.scala 197:30] + node _T_257 = andr(_T_256) @[el2_lib.scala 197:38] + node _T_258 = and(_T_257, _T_153) @[el2_lib.scala 197:43] + node _T_259 = bits(io.trigger_pkt_any[0].tdata2, 15, 15) @[el2_lib.scala 197:76] + node _T_260 = bits(dec_i0_match_data[0], 15, 15) @[el2_lib.scala 197:88] + node _T_261 = eq(_T_259, _T_260) @[el2_lib.scala 197:80] + node _T_262 = mux(_T_258, UInt<1>("h01"), _T_261) @[el2_lib.scala 197:25] + _T_150[15] <= _T_262 @[el2_lib.scala 197:19] + node _T_263 = bits(io.trigger_pkt_any[0].tdata2, 15, 0) @[el2_lib.scala 197:30] + node _T_264 = andr(_T_263) @[el2_lib.scala 197:38] + node _T_265 = and(_T_264, _T_153) @[el2_lib.scala 197:43] + node _T_266 = bits(io.trigger_pkt_any[0].tdata2, 16, 16) @[el2_lib.scala 197:76] + node _T_267 = bits(dec_i0_match_data[0], 16, 16) @[el2_lib.scala 197:88] + node _T_268 = eq(_T_266, _T_267) @[el2_lib.scala 197:80] + node _T_269 = mux(_T_265, UInt<1>("h01"), _T_268) @[el2_lib.scala 197:25] + _T_150[16] <= _T_269 @[el2_lib.scala 197:19] + node _T_270 = bits(io.trigger_pkt_any[0].tdata2, 16, 0) @[el2_lib.scala 197:30] + node _T_271 = andr(_T_270) @[el2_lib.scala 197:38] + node _T_272 = and(_T_271, _T_153) @[el2_lib.scala 197:43] + node _T_273 = bits(io.trigger_pkt_any[0].tdata2, 17, 17) @[el2_lib.scala 197:76] + node _T_274 = bits(dec_i0_match_data[0], 17, 17) @[el2_lib.scala 197:88] + node _T_275 = eq(_T_273, _T_274) @[el2_lib.scala 197:80] + node _T_276 = mux(_T_272, UInt<1>("h01"), _T_275) @[el2_lib.scala 197:25] + _T_150[17] <= _T_276 @[el2_lib.scala 197:19] + node _T_277 = bits(io.trigger_pkt_any[0].tdata2, 17, 0) @[el2_lib.scala 197:30] + node _T_278 = andr(_T_277) @[el2_lib.scala 197:38] + node _T_279 = and(_T_278, _T_153) @[el2_lib.scala 197:43] + node _T_280 = bits(io.trigger_pkt_any[0].tdata2, 18, 18) @[el2_lib.scala 197:76] + node _T_281 = bits(dec_i0_match_data[0], 18, 18) @[el2_lib.scala 197:88] + node _T_282 = eq(_T_280, _T_281) @[el2_lib.scala 197:80] + node _T_283 = mux(_T_279, UInt<1>("h01"), _T_282) @[el2_lib.scala 197:25] + _T_150[18] <= _T_283 @[el2_lib.scala 197:19] + node _T_284 = bits(io.trigger_pkt_any[0].tdata2, 18, 0) @[el2_lib.scala 197:30] + node _T_285 = andr(_T_284) @[el2_lib.scala 197:38] + node _T_286 = and(_T_285, _T_153) @[el2_lib.scala 197:43] + node _T_287 = bits(io.trigger_pkt_any[0].tdata2, 19, 19) @[el2_lib.scala 197:76] + node _T_288 = bits(dec_i0_match_data[0], 19, 19) @[el2_lib.scala 197:88] + node _T_289 = eq(_T_287, _T_288) @[el2_lib.scala 197:80] + node _T_290 = mux(_T_286, UInt<1>("h01"), _T_289) @[el2_lib.scala 197:25] + _T_150[19] <= _T_290 @[el2_lib.scala 197:19] + node _T_291 = bits(io.trigger_pkt_any[0].tdata2, 19, 0) @[el2_lib.scala 197:30] + node _T_292 = andr(_T_291) @[el2_lib.scala 197:38] + node _T_293 = and(_T_292, _T_153) @[el2_lib.scala 197:43] + node _T_294 = bits(io.trigger_pkt_any[0].tdata2, 20, 20) @[el2_lib.scala 197:76] + node _T_295 = bits(dec_i0_match_data[0], 20, 20) @[el2_lib.scala 197:88] + node _T_296 = eq(_T_294, _T_295) @[el2_lib.scala 197:80] + node _T_297 = mux(_T_293, UInt<1>("h01"), _T_296) @[el2_lib.scala 197:25] + _T_150[20] <= _T_297 @[el2_lib.scala 197:19] + node _T_298 = bits(io.trigger_pkt_any[0].tdata2, 20, 0) @[el2_lib.scala 197:30] + node _T_299 = andr(_T_298) @[el2_lib.scala 197:38] + node _T_300 = and(_T_299, _T_153) @[el2_lib.scala 197:43] + node _T_301 = bits(io.trigger_pkt_any[0].tdata2, 21, 21) @[el2_lib.scala 197:76] + node _T_302 = bits(dec_i0_match_data[0], 21, 21) @[el2_lib.scala 197:88] + node _T_303 = eq(_T_301, _T_302) @[el2_lib.scala 197:80] + node _T_304 = mux(_T_300, UInt<1>("h01"), _T_303) @[el2_lib.scala 197:25] + _T_150[21] <= _T_304 @[el2_lib.scala 197:19] + node _T_305 = bits(io.trigger_pkt_any[0].tdata2, 21, 0) @[el2_lib.scala 197:30] + node _T_306 = andr(_T_305) @[el2_lib.scala 197:38] + node _T_307 = and(_T_306, _T_153) @[el2_lib.scala 197:43] + node _T_308 = bits(io.trigger_pkt_any[0].tdata2, 22, 22) @[el2_lib.scala 197:76] + node _T_309 = bits(dec_i0_match_data[0], 22, 22) @[el2_lib.scala 197:88] + node _T_310 = eq(_T_308, _T_309) @[el2_lib.scala 197:80] + node _T_311 = mux(_T_307, UInt<1>("h01"), _T_310) @[el2_lib.scala 197:25] + _T_150[22] <= _T_311 @[el2_lib.scala 197:19] + node _T_312 = bits(io.trigger_pkt_any[0].tdata2, 22, 0) @[el2_lib.scala 197:30] + node _T_313 = andr(_T_312) @[el2_lib.scala 197:38] + node _T_314 = and(_T_313, _T_153) @[el2_lib.scala 197:43] + node _T_315 = bits(io.trigger_pkt_any[0].tdata2, 23, 23) @[el2_lib.scala 197:76] + node _T_316 = bits(dec_i0_match_data[0], 23, 23) @[el2_lib.scala 197:88] + node _T_317 = eq(_T_315, _T_316) @[el2_lib.scala 197:80] + node _T_318 = mux(_T_314, UInt<1>("h01"), _T_317) @[el2_lib.scala 197:25] + _T_150[23] <= _T_318 @[el2_lib.scala 197:19] + node _T_319 = bits(io.trigger_pkt_any[0].tdata2, 23, 0) @[el2_lib.scala 197:30] + node _T_320 = andr(_T_319) @[el2_lib.scala 197:38] + node _T_321 = and(_T_320, _T_153) @[el2_lib.scala 197:43] + node _T_322 = bits(io.trigger_pkt_any[0].tdata2, 24, 24) @[el2_lib.scala 197:76] + node _T_323 = bits(dec_i0_match_data[0], 24, 24) @[el2_lib.scala 197:88] + node _T_324 = eq(_T_322, _T_323) @[el2_lib.scala 197:80] + node _T_325 = mux(_T_321, UInt<1>("h01"), _T_324) @[el2_lib.scala 197:25] + _T_150[24] <= _T_325 @[el2_lib.scala 197:19] + node _T_326 = bits(io.trigger_pkt_any[0].tdata2, 24, 0) @[el2_lib.scala 197:30] + node _T_327 = andr(_T_326) @[el2_lib.scala 197:38] + node _T_328 = and(_T_327, _T_153) @[el2_lib.scala 197:43] + node _T_329 = bits(io.trigger_pkt_any[0].tdata2, 25, 25) @[el2_lib.scala 197:76] + node _T_330 = bits(dec_i0_match_data[0], 25, 25) @[el2_lib.scala 197:88] + node _T_331 = eq(_T_329, _T_330) @[el2_lib.scala 197:80] + node _T_332 = mux(_T_328, UInt<1>("h01"), _T_331) @[el2_lib.scala 197:25] + _T_150[25] <= _T_332 @[el2_lib.scala 197:19] + node _T_333 = bits(io.trigger_pkt_any[0].tdata2, 25, 0) @[el2_lib.scala 197:30] + node _T_334 = andr(_T_333) @[el2_lib.scala 197:38] + node _T_335 = and(_T_334, _T_153) @[el2_lib.scala 197:43] + node _T_336 = bits(io.trigger_pkt_any[0].tdata2, 26, 26) @[el2_lib.scala 197:76] + node _T_337 = bits(dec_i0_match_data[0], 26, 26) @[el2_lib.scala 197:88] + node _T_338 = eq(_T_336, _T_337) @[el2_lib.scala 197:80] + node _T_339 = mux(_T_335, UInt<1>("h01"), _T_338) @[el2_lib.scala 197:25] + _T_150[26] <= _T_339 @[el2_lib.scala 197:19] + node _T_340 = bits(io.trigger_pkt_any[0].tdata2, 26, 0) @[el2_lib.scala 197:30] + node _T_341 = andr(_T_340) @[el2_lib.scala 197:38] + node _T_342 = and(_T_341, _T_153) @[el2_lib.scala 197:43] + node _T_343 = bits(io.trigger_pkt_any[0].tdata2, 27, 27) @[el2_lib.scala 197:76] + node _T_344 = bits(dec_i0_match_data[0], 27, 27) @[el2_lib.scala 197:88] + node _T_345 = eq(_T_343, _T_344) @[el2_lib.scala 197:80] + node _T_346 = mux(_T_342, UInt<1>("h01"), _T_345) @[el2_lib.scala 197:25] + _T_150[27] <= _T_346 @[el2_lib.scala 197:19] + node _T_347 = bits(io.trigger_pkt_any[0].tdata2, 27, 0) @[el2_lib.scala 197:30] + node _T_348 = andr(_T_347) @[el2_lib.scala 197:38] + node _T_349 = and(_T_348, _T_153) @[el2_lib.scala 197:43] + node _T_350 = bits(io.trigger_pkt_any[0].tdata2, 28, 28) @[el2_lib.scala 197:76] + node _T_351 = bits(dec_i0_match_data[0], 28, 28) @[el2_lib.scala 197:88] + node _T_352 = eq(_T_350, _T_351) @[el2_lib.scala 197:80] + node _T_353 = mux(_T_349, UInt<1>("h01"), _T_352) @[el2_lib.scala 197:25] + _T_150[28] <= _T_353 @[el2_lib.scala 197:19] + node _T_354 = bits(io.trigger_pkt_any[0].tdata2, 28, 0) @[el2_lib.scala 197:30] + node _T_355 = andr(_T_354) @[el2_lib.scala 197:38] + node _T_356 = and(_T_355, _T_153) @[el2_lib.scala 197:43] + node _T_357 = bits(io.trigger_pkt_any[0].tdata2, 29, 29) @[el2_lib.scala 197:76] + node _T_358 = bits(dec_i0_match_data[0], 29, 29) @[el2_lib.scala 197:88] + node _T_359 = eq(_T_357, _T_358) @[el2_lib.scala 197:80] + node _T_360 = mux(_T_356, UInt<1>("h01"), _T_359) @[el2_lib.scala 197:25] + _T_150[29] <= _T_360 @[el2_lib.scala 197:19] + node _T_361 = bits(io.trigger_pkt_any[0].tdata2, 29, 0) @[el2_lib.scala 197:30] + node _T_362 = andr(_T_361) @[el2_lib.scala 197:38] + node _T_363 = and(_T_362, _T_153) @[el2_lib.scala 197:43] + node _T_364 = bits(io.trigger_pkt_any[0].tdata2, 30, 30) @[el2_lib.scala 197:76] + node _T_365 = bits(dec_i0_match_data[0], 30, 30) @[el2_lib.scala 197:88] + node _T_366 = eq(_T_364, _T_365) @[el2_lib.scala 197:80] + node _T_367 = mux(_T_363, UInt<1>("h01"), _T_366) @[el2_lib.scala 197:25] + _T_150[30] <= _T_367 @[el2_lib.scala 197:19] + node _T_368 = bits(io.trigger_pkt_any[0].tdata2, 30, 0) @[el2_lib.scala 197:30] + node _T_369 = andr(_T_368) @[el2_lib.scala 197:38] + node _T_370 = and(_T_369, _T_153) @[el2_lib.scala 197:43] + node _T_371 = bits(io.trigger_pkt_any[0].tdata2, 31, 31) @[el2_lib.scala 197:76] + node _T_372 = bits(dec_i0_match_data[0], 31, 31) @[el2_lib.scala 197:88] + node _T_373 = eq(_T_371, _T_372) @[el2_lib.scala 197:80] + node _T_374 = mux(_T_370, UInt<1>("h01"), _T_373) @[el2_lib.scala 197:25] + _T_150[31] <= _T_374 @[el2_lib.scala 197:19] + node _T_375 = and(_T_150[0], _T_150[1]) @[el2_lib.scala 198:22] + node _T_376 = and(_T_375, _T_150[2]) @[el2_lib.scala 198:22] + node _T_377 = and(_T_376, _T_150[3]) @[el2_lib.scala 198:22] + node _T_378 = and(_T_377, _T_150[4]) @[el2_lib.scala 198:22] + node _T_379 = and(_T_378, _T_150[5]) @[el2_lib.scala 198:22] + node _T_380 = and(_T_379, _T_150[6]) @[el2_lib.scala 198:22] + node _T_381 = and(_T_380, _T_150[7]) @[el2_lib.scala 198:22] + node _T_382 = and(_T_381, _T_150[8]) @[el2_lib.scala 198:22] + node _T_383 = and(_T_382, _T_150[9]) @[el2_lib.scala 198:22] + node _T_384 = and(_T_383, _T_150[10]) @[el2_lib.scala 198:22] + node _T_385 = and(_T_384, _T_150[11]) @[el2_lib.scala 198:22] + node _T_386 = and(_T_385, _T_150[12]) @[el2_lib.scala 198:22] + node _T_387 = and(_T_386, _T_150[13]) @[el2_lib.scala 198:22] + node _T_388 = and(_T_387, _T_150[14]) @[el2_lib.scala 198:22] + node _T_389 = and(_T_388, _T_150[15]) @[el2_lib.scala 198:22] + node _T_390 = and(_T_389, _T_150[16]) @[el2_lib.scala 198:22] + node _T_391 = and(_T_390, _T_150[17]) @[el2_lib.scala 198:22] + node _T_392 = and(_T_391, _T_150[18]) @[el2_lib.scala 198:22] + node _T_393 = and(_T_392, _T_150[19]) @[el2_lib.scala 198:22] + node _T_394 = and(_T_393, _T_150[20]) @[el2_lib.scala 198:22] + node _T_395 = and(_T_394, _T_150[21]) @[el2_lib.scala 198:22] + node _T_396 = and(_T_395, _T_150[22]) @[el2_lib.scala 198:22] + node _T_397 = and(_T_396, _T_150[23]) @[el2_lib.scala 198:22] + node _T_398 = and(_T_397, _T_150[24]) @[el2_lib.scala 198:22] + node _T_399 = and(_T_398, _T_150[25]) @[el2_lib.scala 198:22] + node _T_400 = and(_T_399, _T_150[26]) @[el2_lib.scala 198:22] + node _T_401 = and(_T_400, _T_150[27]) @[el2_lib.scala 198:22] + node _T_402 = and(_T_401, _T_150[28]) @[el2_lib.scala 198:22] + node _T_403 = and(_T_402, _T_150[29]) @[el2_lib.scala 198:22] + node _T_404 = and(_T_403, _T_150[30]) @[el2_lib.scala 198:22] + node _T_405 = and(_T_404, _T_150[31]) @[el2_lib.scala 198:22] + node _T_406 = and(_T_148, _T_405) @[el2_lsu_trigger.scala 16:109] + node _T_407 = and(io.trigger_pkt_any[1].execute, io.trigger_pkt_any[1].m) @[el2_lsu_trigger.scala 16:83] + node _T_408 = bits(io.trigger_pkt_any[1].match_, 0, 0) @[el2_lsu_trigger.scala 16:213] + wire _T_409 : UInt<1>[32] @[el2_lib.scala 193:24] + node _T_410 = andr(io.trigger_pkt_any[1].tdata2) @[el2_lib.scala 194:45] + node _T_411 = not(_T_410) @[el2_lib.scala 194:39] + node _T_412 = and(_T_408, _T_411) @[el2_lib.scala 194:37] + node _T_413 = bits(io.trigger_pkt_any[1].tdata2, 0, 0) @[el2_lib.scala 195:48] + node _T_414 = bits(dec_i0_match_data[1], 0, 0) @[el2_lib.scala 195:60] + node _T_415 = eq(_T_413, _T_414) @[el2_lib.scala 195:52] + node _T_416 = or(_T_412, _T_415) @[el2_lib.scala 195:41] + _T_409[0] <= _T_416 @[el2_lib.scala 195:18] + node _T_417 = bits(io.trigger_pkt_any[1].tdata2, 0, 0) @[el2_lib.scala 197:30] + node _T_418 = andr(_T_417) @[el2_lib.scala 197:38] + node _T_419 = and(_T_418, _T_412) @[el2_lib.scala 197:43] + node _T_420 = bits(io.trigger_pkt_any[1].tdata2, 1, 1) @[el2_lib.scala 197:76] + node _T_421 = bits(dec_i0_match_data[1], 1, 1) @[el2_lib.scala 197:88] + node _T_422 = eq(_T_420, _T_421) @[el2_lib.scala 197:80] + node _T_423 = mux(_T_419, UInt<1>("h01"), _T_422) @[el2_lib.scala 197:25] + _T_409[1] <= _T_423 @[el2_lib.scala 197:19] + node _T_424 = bits(io.trigger_pkt_any[1].tdata2, 1, 0) @[el2_lib.scala 197:30] + node _T_425 = andr(_T_424) @[el2_lib.scala 197:38] + node _T_426 = and(_T_425, _T_412) @[el2_lib.scala 197:43] + node _T_427 = bits(io.trigger_pkt_any[1].tdata2, 2, 2) @[el2_lib.scala 197:76] + node _T_428 = bits(dec_i0_match_data[1], 2, 2) @[el2_lib.scala 197:88] + node _T_429 = eq(_T_427, _T_428) @[el2_lib.scala 197:80] + node _T_430 = mux(_T_426, UInt<1>("h01"), _T_429) @[el2_lib.scala 197:25] + _T_409[2] <= _T_430 @[el2_lib.scala 197:19] + node _T_431 = bits(io.trigger_pkt_any[1].tdata2, 2, 0) @[el2_lib.scala 197:30] + node _T_432 = andr(_T_431) @[el2_lib.scala 197:38] + node _T_433 = and(_T_432, _T_412) @[el2_lib.scala 197:43] + node _T_434 = bits(io.trigger_pkt_any[1].tdata2, 3, 3) @[el2_lib.scala 197:76] + node _T_435 = bits(dec_i0_match_data[1], 3, 3) @[el2_lib.scala 197:88] + node _T_436 = eq(_T_434, _T_435) @[el2_lib.scala 197:80] + node _T_437 = mux(_T_433, UInt<1>("h01"), _T_436) @[el2_lib.scala 197:25] + _T_409[3] <= _T_437 @[el2_lib.scala 197:19] + node _T_438 = bits(io.trigger_pkt_any[1].tdata2, 3, 0) @[el2_lib.scala 197:30] + node _T_439 = andr(_T_438) @[el2_lib.scala 197:38] + node _T_440 = and(_T_439, _T_412) @[el2_lib.scala 197:43] + node _T_441 = bits(io.trigger_pkt_any[1].tdata2, 4, 4) @[el2_lib.scala 197:76] + node _T_442 = bits(dec_i0_match_data[1], 4, 4) @[el2_lib.scala 197:88] + node _T_443 = eq(_T_441, _T_442) @[el2_lib.scala 197:80] + node _T_444 = mux(_T_440, UInt<1>("h01"), _T_443) @[el2_lib.scala 197:25] + _T_409[4] <= _T_444 @[el2_lib.scala 197:19] + node _T_445 = bits(io.trigger_pkt_any[1].tdata2, 4, 0) @[el2_lib.scala 197:30] + node _T_446 = andr(_T_445) @[el2_lib.scala 197:38] + node _T_447 = and(_T_446, _T_412) @[el2_lib.scala 197:43] + node _T_448 = bits(io.trigger_pkt_any[1].tdata2, 5, 5) @[el2_lib.scala 197:76] + node _T_449 = bits(dec_i0_match_data[1], 5, 5) @[el2_lib.scala 197:88] + node _T_450 = eq(_T_448, _T_449) @[el2_lib.scala 197:80] + node _T_451 = mux(_T_447, UInt<1>("h01"), _T_450) @[el2_lib.scala 197:25] + _T_409[5] <= _T_451 @[el2_lib.scala 197:19] + node _T_452 = bits(io.trigger_pkt_any[1].tdata2, 5, 0) @[el2_lib.scala 197:30] + node _T_453 = andr(_T_452) @[el2_lib.scala 197:38] + node _T_454 = and(_T_453, _T_412) @[el2_lib.scala 197:43] + node _T_455 = bits(io.trigger_pkt_any[1].tdata2, 6, 6) @[el2_lib.scala 197:76] + node _T_456 = bits(dec_i0_match_data[1], 6, 6) @[el2_lib.scala 197:88] + node _T_457 = eq(_T_455, _T_456) @[el2_lib.scala 197:80] + node _T_458 = mux(_T_454, UInt<1>("h01"), _T_457) @[el2_lib.scala 197:25] + _T_409[6] <= _T_458 @[el2_lib.scala 197:19] + node _T_459 = bits(io.trigger_pkt_any[1].tdata2, 6, 0) @[el2_lib.scala 197:30] + node _T_460 = andr(_T_459) @[el2_lib.scala 197:38] + node _T_461 = and(_T_460, _T_412) @[el2_lib.scala 197:43] + node _T_462 = bits(io.trigger_pkt_any[1].tdata2, 7, 7) @[el2_lib.scala 197:76] + node _T_463 = bits(dec_i0_match_data[1], 7, 7) @[el2_lib.scala 197:88] + node _T_464 = eq(_T_462, _T_463) @[el2_lib.scala 197:80] + node _T_465 = mux(_T_461, UInt<1>("h01"), _T_464) @[el2_lib.scala 197:25] + _T_409[7] <= _T_465 @[el2_lib.scala 197:19] + node _T_466 = bits(io.trigger_pkt_any[1].tdata2, 7, 0) @[el2_lib.scala 197:30] + node _T_467 = andr(_T_466) @[el2_lib.scala 197:38] + node _T_468 = and(_T_467, _T_412) @[el2_lib.scala 197:43] + node _T_469 = bits(io.trigger_pkt_any[1].tdata2, 8, 8) @[el2_lib.scala 197:76] + node _T_470 = bits(dec_i0_match_data[1], 8, 8) @[el2_lib.scala 197:88] + node _T_471 = eq(_T_469, _T_470) @[el2_lib.scala 197:80] + node _T_472 = mux(_T_468, UInt<1>("h01"), _T_471) @[el2_lib.scala 197:25] + _T_409[8] <= _T_472 @[el2_lib.scala 197:19] + node _T_473 = bits(io.trigger_pkt_any[1].tdata2, 8, 0) @[el2_lib.scala 197:30] + node _T_474 = andr(_T_473) @[el2_lib.scala 197:38] + node _T_475 = and(_T_474, _T_412) @[el2_lib.scala 197:43] + node _T_476 = bits(io.trigger_pkt_any[1].tdata2, 9, 9) @[el2_lib.scala 197:76] + node _T_477 = bits(dec_i0_match_data[1], 9, 9) @[el2_lib.scala 197:88] + node _T_478 = eq(_T_476, _T_477) @[el2_lib.scala 197:80] + node _T_479 = mux(_T_475, UInt<1>("h01"), _T_478) @[el2_lib.scala 197:25] + _T_409[9] <= _T_479 @[el2_lib.scala 197:19] + node _T_480 = bits(io.trigger_pkt_any[1].tdata2, 9, 0) @[el2_lib.scala 197:30] + node _T_481 = andr(_T_480) @[el2_lib.scala 197:38] + node _T_482 = and(_T_481, _T_412) @[el2_lib.scala 197:43] + node _T_483 = bits(io.trigger_pkt_any[1].tdata2, 10, 10) @[el2_lib.scala 197:76] + node _T_484 = bits(dec_i0_match_data[1], 10, 10) @[el2_lib.scala 197:88] + node _T_485 = eq(_T_483, _T_484) @[el2_lib.scala 197:80] + node _T_486 = mux(_T_482, UInt<1>("h01"), _T_485) @[el2_lib.scala 197:25] + _T_409[10] <= _T_486 @[el2_lib.scala 197:19] + node _T_487 = bits(io.trigger_pkt_any[1].tdata2, 10, 0) @[el2_lib.scala 197:30] + node _T_488 = andr(_T_487) @[el2_lib.scala 197:38] + node _T_489 = and(_T_488, _T_412) @[el2_lib.scala 197:43] + node _T_490 = bits(io.trigger_pkt_any[1].tdata2, 11, 11) @[el2_lib.scala 197:76] + node _T_491 = bits(dec_i0_match_data[1], 11, 11) @[el2_lib.scala 197:88] + node _T_492 = eq(_T_490, _T_491) @[el2_lib.scala 197:80] + node _T_493 = mux(_T_489, UInt<1>("h01"), _T_492) @[el2_lib.scala 197:25] + _T_409[11] <= _T_493 @[el2_lib.scala 197:19] + node _T_494 = bits(io.trigger_pkt_any[1].tdata2, 11, 0) @[el2_lib.scala 197:30] + node _T_495 = andr(_T_494) @[el2_lib.scala 197:38] + node _T_496 = and(_T_495, _T_412) @[el2_lib.scala 197:43] + node _T_497 = bits(io.trigger_pkt_any[1].tdata2, 12, 12) @[el2_lib.scala 197:76] + node _T_498 = bits(dec_i0_match_data[1], 12, 12) @[el2_lib.scala 197:88] + node _T_499 = eq(_T_497, _T_498) @[el2_lib.scala 197:80] + node _T_500 = mux(_T_496, UInt<1>("h01"), _T_499) @[el2_lib.scala 197:25] + _T_409[12] <= _T_500 @[el2_lib.scala 197:19] + node _T_501 = bits(io.trigger_pkt_any[1].tdata2, 12, 0) @[el2_lib.scala 197:30] + node _T_502 = andr(_T_501) @[el2_lib.scala 197:38] + node _T_503 = and(_T_502, _T_412) @[el2_lib.scala 197:43] + node _T_504 = bits(io.trigger_pkt_any[1].tdata2, 13, 13) @[el2_lib.scala 197:76] + node _T_505 = bits(dec_i0_match_data[1], 13, 13) @[el2_lib.scala 197:88] + node _T_506 = eq(_T_504, _T_505) @[el2_lib.scala 197:80] + node _T_507 = mux(_T_503, UInt<1>("h01"), _T_506) @[el2_lib.scala 197:25] + _T_409[13] <= _T_507 @[el2_lib.scala 197:19] + node _T_508 = bits(io.trigger_pkt_any[1].tdata2, 13, 0) @[el2_lib.scala 197:30] + node _T_509 = andr(_T_508) @[el2_lib.scala 197:38] + node _T_510 = and(_T_509, _T_412) @[el2_lib.scala 197:43] + node _T_511 = bits(io.trigger_pkt_any[1].tdata2, 14, 14) @[el2_lib.scala 197:76] + node _T_512 = bits(dec_i0_match_data[1], 14, 14) @[el2_lib.scala 197:88] + node _T_513 = eq(_T_511, _T_512) @[el2_lib.scala 197:80] + node _T_514 = mux(_T_510, UInt<1>("h01"), _T_513) @[el2_lib.scala 197:25] + _T_409[14] <= _T_514 @[el2_lib.scala 197:19] + node _T_515 = bits(io.trigger_pkt_any[1].tdata2, 14, 0) @[el2_lib.scala 197:30] + node _T_516 = andr(_T_515) @[el2_lib.scala 197:38] + node _T_517 = and(_T_516, _T_412) @[el2_lib.scala 197:43] + node _T_518 = bits(io.trigger_pkt_any[1].tdata2, 15, 15) @[el2_lib.scala 197:76] + node _T_519 = bits(dec_i0_match_data[1], 15, 15) @[el2_lib.scala 197:88] + node _T_520 = eq(_T_518, _T_519) @[el2_lib.scala 197:80] + node _T_521 = mux(_T_517, UInt<1>("h01"), _T_520) @[el2_lib.scala 197:25] + _T_409[15] <= _T_521 @[el2_lib.scala 197:19] + node _T_522 = bits(io.trigger_pkt_any[1].tdata2, 15, 0) @[el2_lib.scala 197:30] + node _T_523 = andr(_T_522) @[el2_lib.scala 197:38] + node _T_524 = and(_T_523, _T_412) @[el2_lib.scala 197:43] + node _T_525 = bits(io.trigger_pkt_any[1].tdata2, 16, 16) @[el2_lib.scala 197:76] + node _T_526 = bits(dec_i0_match_data[1], 16, 16) @[el2_lib.scala 197:88] + node _T_527 = eq(_T_525, _T_526) @[el2_lib.scala 197:80] + node _T_528 = mux(_T_524, UInt<1>("h01"), _T_527) @[el2_lib.scala 197:25] + _T_409[16] <= _T_528 @[el2_lib.scala 197:19] + node _T_529 = bits(io.trigger_pkt_any[1].tdata2, 16, 0) @[el2_lib.scala 197:30] + node _T_530 = andr(_T_529) @[el2_lib.scala 197:38] + node _T_531 = and(_T_530, _T_412) @[el2_lib.scala 197:43] + node _T_532 = bits(io.trigger_pkt_any[1].tdata2, 17, 17) @[el2_lib.scala 197:76] + node _T_533 = bits(dec_i0_match_data[1], 17, 17) @[el2_lib.scala 197:88] + node _T_534 = eq(_T_532, _T_533) @[el2_lib.scala 197:80] + node _T_535 = mux(_T_531, UInt<1>("h01"), _T_534) @[el2_lib.scala 197:25] + _T_409[17] <= _T_535 @[el2_lib.scala 197:19] + node _T_536 = bits(io.trigger_pkt_any[1].tdata2, 17, 0) @[el2_lib.scala 197:30] + node _T_537 = andr(_T_536) @[el2_lib.scala 197:38] + node _T_538 = and(_T_537, _T_412) @[el2_lib.scala 197:43] + node _T_539 = bits(io.trigger_pkt_any[1].tdata2, 18, 18) @[el2_lib.scala 197:76] + node _T_540 = bits(dec_i0_match_data[1], 18, 18) @[el2_lib.scala 197:88] + node _T_541 = eq(_T_539, _T_540) @[el2_lib.scala 197:80] + node _T_542 = mux(_T_538, UInt<1>("h01"), _T_541) @[el2_lib.scala 197:25] + _T_409[18] <= _T_542 @[el2_lib.scala 197:19] + node _T_543 = bits(io.trigger_pkt_any[1].tdata2, 18, 0) @[el2_lib.scala 197:30] + node _T_544 = andr(_T_543) @[el2_lib.scala 197:38] + node _T_545 = and(_T_544, _T_412) @[el2_lib.scala 197:43] + node _T_546 = bits(io.trigger_pkt_any[1].tdata2, 19, 19) @[el2_lib.scala 197:76] + node _T_547 = bits(dec_i0_match_data[1], 19, 19) @[el2_lib.scala 197:88] + node _T_548 = eq(_T_546, _T_547) @[el2_lib.scala 197:80] + node _T_549 = mux(_T_545, UInt<1>("h01"), _T_548) @[el2_lib.scala 197:25] + _T_409[19] <= _T_549 @[el2_lib.scala 197:19] + node _T_550 = bits(io.trigger_pkt_any[1].tdata2, 19, 0) @[el2_lib.scala 197:30] + node _T_551 = andr(_T_550) @[el2_lib.scala 197:38] + node _T_552 = and(_T_551, _T_412) @[el2_lib.scala 197:43] + node _T_553 = bits(io.trigger_pkt_any[1].tdata2, 20, 20) @[el2_lib.scala 197:76] + node _T_554 = bits(dec_i0_match_data[1], 20, 20) @[el2_lib.scala 197:88] + node _T_555 = eq(_T_553, _T_554) @[el2_lib.scala 197:80] + node _T_556 = mux(_T_552, UInt<1>("h01"), _T_555) @[el2_lib.scala 197:25] + _T_409[20] <= _T_556 @[el2_lib.scala 197:19] + node _T_557 = bits(io.trigger_pkt_any[1].tdata2, 20, 0) @[el2_lib.scala 197:30] + node _T_558 = andr(_T_557) @[el2_lib.scala 197:38] + node _T_559 = and(_T_558, _T_412) @[el2_lib.scala 197:43] + node _T_560 = bits(io.trigger_pkt_any[1].tdata2, 21, 21) @[el2_lib.scala 197:76] + node _T_561 = bits(dec_i0_match_data[1], 21, 21) @[el2_lib.scala 197:88] + node _T_562 = eq(_T_560, _T_561) @[el2_lib.scala 197:80] + node _T_563 = mux(_T_559, UInt<1>("h01"), _T_562) @[el2_lib.scala 197:25] + _T_409[21] <= _T_563 @[el2_lib.scala 197:19] + node _T_564 = bits(io.trigger_pkt_any[1].tdata2, 21, 0) @[el2_lib.scala 197:30] + node _T_565 = andr(_T_564) @[el2_lib.scala 197:38] + node _T_566 = and(_T_565, _T_412) @[el2_lib.scala 197:43] + node _T_567 = bits(io.trigger_pkt_any[1].tdata2, 22, 22) @[el2_lib.scala 197:76] + node _T_568 = bits(dec_i0_match_data[1], 22, 22) @[el2_lib.scala 197:88] + node _T_569 = eq(_T_567, _T_568) @[el2_lib.scala 197:80] + node _T_570 = mux(_T_566, UInt<1>("h01"), _T_569) @[el2_lib.scala 197:25] + _T_409[22] <= _T_570 @[el2_lib.scala 197:19] + node _T_571 = bits(io.trigger_pkt_any[1].tdata2, 22, 0) @[el2_lib.scala 197:30] + node _T_572 = andr(_T_571) @[el2_lib.scala 197:38] + node _T_573 = and(_T_572, _T_412) @[el2_lib.scala 197:43] + node _T_574 = bits(io.trigger_pkt_any[1].tdata2, 23, 23) @[el2_lib.scala 197:76] + node _T_575 = bits(dec_i0_match_data[1], 23, 23) @[el2_lib.scala 197:88] + node _T_576 = eq(_T_574, _T_575) @[el2_lib.scala 197:80] + node _T_577 = mux(_T_573, UInt<1>("h01"), _T_576) @[el2_lib.scala 197:25] + _T_409[23] <= _T_577 @[el2_lib.scala 197:19] + node _T_578 = bits(io.trigger_pkt_any[1].tdata2, 23, 0) @[el2_lib.scala 197:30] + node _T_579 = andr(_T_578) @[el2_lib.scala 197:38] + node _T_580 = and(_T_579, _T_412) @[el2_lib.scala 197:43] + node _T_581 = bits(io.trigger_pkt_any[1].tdata2, 24, 24) @[el2_lib.scala 197:76] + node _T_582 = bits(dec_i0_match_data[1], 24, 24) @[el2_lib.scala 197:88] + node _T_583 = eq(_T_581, _T_582) @[el2_lib.scala 197:80] + node _T_584 = mux(_T_580, UInt<1>("h01"), _T_583) @[el2_lib.scala 197:25] + _T_409[24] <= _T_584 @[el2_lib.scala 197:19] + node _T_585 = bits(io.trigger_pkt_any[1].tdata2, 24, 0) @[el2_lib.scala 197:30] + node _T_586 = andr(_T_585) @[el2_lib.scala 197:38] + node _T_587 = and(_T_586, _T_412) @[el2_lib.scala 197:43] + node _T_588 = bits(io.trigger_pkt_any[1].tdata2, 25, 25) @[el2_lib.scala 197:76] + node _T_589 = bits(dec_i0_match_data[1], 25, 25) @[el2_lib.scala 197:88] + node _T_590 = eq(_T_588, _T_589) @[el2_lib.scala 197:80] + node _T_591 = mux(_T_587, UInt<1>("h01"), _T_590) @[el2_lib.scala 197:25] + _T_409[25] <= _T_591 @[el2_lib.scala 197:19] + node _T_592 = bits(io.trigger_pkt_any[1].tdata2, 25, 0) @[el2_lib.scala 197:30] + node _T_593 = andr(_T_592) @[el2_lib.scala 197:38] + node _T_594 = and(_T_593, _T_412) @[el2_lib.scala 197:43] + node _T_595 = bits(io.trigger_pkt_any[1].tdata2, 26, 26) @[el2_lib.scala 197:76] + node _T_596 = bits(dec_i0_match_data[1], 26, 26) @[el2_lib.scala 197:88] + node _T_597 = eq(_T_595, _T_596) @[el2_lib.scala 197:80] + node _T_598 = mux(_T_594, UInt<1>("h01"), _T_597) @[el2_lib.scala 197:25] + _T_409[26] <= _T_598 @[el2_lib.scala 197:19] + node _T_599 = bits(io.trigger_pkt_any[1].tdata2, 26, 0) @[el2_lib.scala 197:30] + node _T_600 = andr(_T_599) @[el2_lib.scala 197:38] + node _T_601 = and(_T_600, _T_412) @[el2_lib.scala 197:43] + node _T_602 = bits(io.trigger_pkt_any[1].tdata2, 27, 27) @[el2_lib.scala 197:76] + node _T_603 = bits(dec_i0_match_data[1], 27, 27) @[el2_lib.scala 197:88] + node _T_604 = eq(_T_602, _T_603) @[el2_lib.scala 197:80] + node _T_605 = mux(_T_601, UInt<1>("h01"), _T_604) @[el2_lib.scala 197:25] + _T_409[27] <= _T_605 @[el2_lib.scala 197:19] + node _T_606 = bits(io.trigger_pkt_any[1].tdata2, 27, 0) @[el2_lib.scala 197:30] + node _T_607 = andr(_T_606) @[el2_lib.scala 197:38] + node _T_608 = and(_T_607, _T_412) @[el2_lib.scala 197:43] + node _T_609 = bits(io.trigger_pkt_any[1].tdata2, 28, 28) @[el2_lib.scala 197:76] + node _T_610 = bits(dec_i0_match_data[1], 28, 28) @[el2_lib.scala 197:88] + node _T_611 = eq(_T_609, _T_610) @[el2_lib.scala 197:80] + node _T_612 = mux(_T_608, UInt<1>("h01"), _T_611) @[el2_lib.scala 197:25] + _T_409[28] <= _T_612 @[el2_lib.scala 197:19] + node _T_613 = bits(io.trigger_pkt_any[1].tdata2, 28, 0) @[el2_lib.scala 197:30] + node _T_614 = andr(_T_613) @[el2_lib.scala 197:38] + node _T_615 = and(_T_614, _T_412) @[el2_lib.scala 197:43] + node _T_616 = bits(io.trigger_pkt_any[1].tdata2, 29, 29) @[el2_lib.scala 197:76] + node _T_617 = bits(dec_i0_match_data[1], 29, 29) @[el2_lib.scala 197:88] + node _T_618 = eq(_T_616, _T_617) @[el2_lib.scala 197:80] + node _T_619 = mux(_T_615, UInt<1>("h01"), _T_618) @[el2_lib.scala 197:25] + _T_409[29] <= _T_619 @[el2_lib.scala 197:19] + node _T_620 = bits(io.trigger_pkt_any[1].tdata2, 29, 0) @[el2_lib.scala 197:30] + node _T_621 = andr(_T_620) @[el2_lib.scala 197:38] + node _T_622 = and(_T_621, _T_412) @[el2_lib.scala 197:43] + node _T_623 = bits(io.trigger_pkt_any[1].tdata2, 30, 30) @[el2_lib.scala 197:76] + node _T_624 = bits(dec_i0_match_data[1], 30, 30) @[el2_lib.scala 197:88] + node _T_625 = eq(_T_623, _T_624) @[el2_lib.scala 197:80] + node _T_626 = mux(_T_622, UInt<1>("h01"), _T_625) @[el2_lib.scala 197:25] + _T_409[30] <= _T_626 @[el2_lib.scala 197:19] + node _T_627 = bits(io.trigger_pkt_any[1].tdata2, 30, 0) @[el2_lib.scala 197:30] + node _T_628 = andr(_T_627) @[el2_lib.scala 197:38] + node _T_629 = and(_T_628, _T_412) @[el2_lib.scala 197:43] + node _T_630 = bits(io.trigger_pkt_any[1].tdata2, 31, 31) @[el2_lib.scala 197:76] + node _T_631 = bits(dec_i0_match_data[1], 31, 31) @[el2_lib.scala 197:88] + node _T_632 = eq(_T_630, _T_631) @[el2_lib.scala 197:80] + node _T_633 = mux(_T_629, UInt<1>("h01"), _T_632) @[el2_lib.scala 197:25] + _T_409[31] <= _T_633 @[el2_lib.scala 197:19] + node _T_634 = and(_T_409[0], _T_409[1]) @[el2_lib.scala 198:22] + node _T_635 = and(_T_634, _T_409[2]) @[el2_lib.scala 198:22] + node _T_636 = and(_T_635, _T_409[3]) @[el2_lib.scala 198:22] + node _T_637 = and(_T_636, _T_409[4]) @[el2_lib.scala 198:22] + node _T_638 = and(_T_637, _T_409[5]) @[el2_lib.scala 198:22] + node _T_639 = and(_T_638, _T_409[6]) @[el2_lib.scala 198:22] + node _T_640 = and(_T_639, _T_409[7]) @[el2_lib.scala 198:22] + node _T_641 = and(_T_640, _T_409[8]) @[el2_lib.scala 198:22] + node _T_642 = and(_T_641, _T_409[9]) @[el2_lib.scala 198:22] + node _T_643 = and(_T_642, _T_409[10]) @[el2_lib.scala 198:22] + node _T_644 = and(_T_643, _T_409[11]) @[el2_lib.scala 198:22] + node _T_645 = and(_T_644, _T_409[12]) @[el2_lib.scala 198:22] + node _T_646 = and(_T_645, _T_409[13]) @[el2_lib.scala 198:22] + node _T_647 = and(_T_646, _T_409[14]) @[el2_lib.scala 198:22] + node _T_648 = and(_T_647, _T_409[15]) @[el2_lib.scala 198:22] + node _T_649 = and(_T_648, _T_409[16]) @[el2_lib.scala 198:22] + node _T_650 = and(_T_649, _T_409[17]) @[el2_lib.scala 198:22] + node _T_651 = and(_T_650, _T_409[18]) @[el2_lib.scala 198:22] + node _T_652 = and(_T_651, _T_409[19]) @[el2_lib.scala 198:22] + node _T_653 = and(_T_652, _T_409[20]) @[el2_lib.scala 198:22] + node _T_654 = and(_T_653, _T_409[21]) @[el2_lib.scala 198:22] + node _T_655 = and(_T_654, _T_409[22]) @[el2_lib.scala 198:22] + node _T_656 = and(_T_655, _T_409[23]) @[el2_lib.scala 198:22] + node _T_657 = and(_T_656, _T_409[24]) @[el2_lib.scala 198:22] + node _T_658 = and(_T_657, _T_409[25]) @[el2_lib.scala 198:22] + node _T_659 = and(_T_658, _T_409[26]) @[el2_lib.scala 198:22] + node _T_660 = and(_T_659, _T_409[27]) @[el2_lib.scala 198:22] + node _T_661 = and(_T_660, _T_409[28]) @[el2_lib.scala 198:22] + node _T_662 = and(_T_661, _T_409[29]) @[el2_lib.scala 198:22] + node _T_663 = and(_T_662, _T_409[30]) @[el2_lib.scala 198:22] + node _T_664 = and(_T_663, _T_409[31]) @[el2_lib.scala 198:22] + node _T_665 = and(_T_407, _T_664) @[el2_lsu_trigger.scala 16:109] + node _T_666 = and(io.trigger_pkt_any[2].execute, io.trigger_pkt_any[2].m) @[el2_lsu_trigger.scala 16:83] + node _T_667 = bits(io.trigger_pkt_any[2].match_, 0, 0) @[el2_lsu_trigger.scala 16:213] + wire _T_668 : UInt<1>[32] @[el2_lib.scala 193:24] + node _T_669 = andr(io.trigger_pkt_any[2].tdata2) @[el2_lib.scala 194:45] + node _T_670 = not(_T_669) @[el2_lib.scala 194:39] + node _T_671 = and(_T_667, _T_670) @[el2_lib.scala 194:37] + node _T_672 = bits(io.trigger_pkt_any[2].tdata2, 0, 0) @[el2_lib.scala 195:48] + node _T_673 = bits(dec_i0_match_data[2], 0, 0) @[el2_lib.scala 195:60] + node _T_674 = eq(_T_672, _T_673) @[el2_lib.scala 195:52] + node _T_675 = or(_T_671, _T_674) @[el2_lib.scala 195:41] + _T_668[0] <= _T_675 @[el2_lib.scala 195:18] + node _T_676 = bits(io.trigger_pkt_any[2].tdata2, 0, 0) @[el2_lib.scala 197:30] + node _T_677 = andr(_T_676) @[el2_lib.scala 197:38] + node _T_678 = and(_T_677, _T_671) @[el2_lib.scala 197:43] + node _T_679 = bits(io.trigger_pkt_any[2].tdata2, 1, 1) @[el2_lib.scala 197:76] + node _T_680 = bits(dec_i0_match_data[2], 1, 1) @[el2_lib.scala 197:88] + node _T_681 = eq(_T_679, _T_680) @[el2_lib.scala 197:80] + node _T_682 = mux(_T_678, UInt<1>("h01"), _T_681) @[el2_lib.scala 197:25] + _T_668[1] <= _T_682 @[el2_lib.scala 197:19] + node _T_683 = bits(io.trigger_pkt_any[2].tdata2, 1, 0) @[el2_lib.scala 197:30] + node _T_684 = andr(_T_683) @[el2_lib.scala 197:38] + node _T_685 = and(_T_684, _T_671) @[el2_lib.scala 197:43] + node _T_686 = bits(io.trigger_pkt_any[2].tdata2, 2, 2) @[el2_lib.scala 197:76] + node _T_687 = bits(dec_i0_match_data[2], 2, 2) @[el2_lib.scala 197:88] + node _T_688 = eq(_T_686, _T_687) @[el2_lib.scala 197:80] + node _T_689 = mux(_T_685, UInt<1>("h01"), _T_688) @[el2_lib.scala 197:25] + _T_668[2] <= _T_689 @[el2_lib.scala 197:19] + node _T_690 = bits(io.trigger_pkt_any[2].tdata2, 2, 0) @[el2_lib.scala 197:30] + node _T_691 = andr(_T_690) @[el2_lib.scala 197:38] + node _T_692 = and(_T_691, _T_671) @[el2_lib.scala 197:43] + node _T_693 = bits(io.trigger_pkt_any[2].tdata2, 3, 3) @[el2_lib.scala 197:76] + node _T_694 = bits(dec_i0_match_data[2], 3, 3) @[el2_lib.scala 197:88] + node _T_695 = eq(_T_693, _T_694) @[el2_lib.scala 197:80] + node _T_696 = mux(_T_692, UInt<1>("h01"), _T_695) @[el2_lib.scala 197:25] + _T_668[3] <= _T_696 @[el2_lib.scala 197:19] + node _T_697 = bits(io.trigger_pkt_any[2].tdata2, 3, 0) @[el2_lib.scala 197:30] + node _T_698 = andr(_T_697) @[el2_lib.scala 197:38] + node _T_699 = and(_T_698, _T_671) @[el2_lib.scala 197:43] + node _T_700 = bits(io.trigger_pkt_any[2].tdata2, 4, 4) @[el2_lib.scala 197:76] + node _T_701 = bits(dec_i0_match_data[2], 4, 4) @[el2_lib.scala 197:88] + node _T_702 = eq(_T_700, _T_701) @[el2_lib.scala 197:80] + node _T_703 = mux(_T_699, UInt<1>("h01"), _T_702) @[el2_lib.scala 197:25] + _T_668[4] <= _T_703 @[el2_lib.scala 197:19] + node _T_704 = bits(io.trigger_pkt_any[2].tdata2, 4, 0) @[el2_lib.scala 197:30] + node _T_705 = andr(_T_704) @[el2_lib.scala 197:38] + node _T_706 = and(_T_705, _T_671) @[el2_lib.scala 197:43] + node _T_707 = bits(io.trigger_pkt_any[2].tdata2, 5, 5) @[el2_lib.scala 197:76] + node _T_708 = bits(dec_i0_match_data[2], 5, 5) @[el2_lib.scala 197:88] + node _T_709 = eq(_T_707, _T_708) @[el2_lib.scala 197:80] + node _T_710 = mux(_T_706, UInt<1>("h01"), _T_709) @[el2_lib.scala 197:25] + _T_668[5] <= _T_710 @[el2_lib.scala 197:19] + node _T_711 = bits(io.trigger_pkt_any[2].tdata2, 5, 0) @[el2_lib.scala 197:30] + node _T_712 = andr(_T_711) @[el2_lib.scala 197:38] + node _T_713 = and(_T_712, _T_671) @[el2_lib.scala 197:43] + node _T_714 = bits(io.trigger_pkt_any[2].tdata2, 6, 6) @[el2_lib.scala 197:76] + node _T_715 = bits(dec_i0_match_data[2], 6, 6) @[el2_lib.scala 197:88] + node _T_716 = eq(_T_714, _T_715) @[el2_lib.scala 197:80] + node _T_717 = mux(_T_713, UInt<1>("h01"), _T_716) @[el2_lib.scala 197:25] + _T_668[6] <= _T_717 @[el2_lib.scala 197:19] + node _T_718 = bits(io.trigger_pkt_any[2].tdata2, 6, 0) @[el2_lib.scala 197:30] + node _T_719 = andr(_T_718) @[el2_lib.scala 197:38] + node _T_720 = and(_T_719, _T_671) @[el2_lib.scala 197:43] + node _T_721 = bits(io.trigger_pkt_any[2].tdata2, 7, 7) @[el2_lib.scala 197:76] + node _T_722 = bits(dec_i0_match_data[2], 7, 7) @[el2_lib.scala 197:88] + node _T_723 = eq(_T_721, _T_722) @[el2_lib.scala 197:80] + node _T_724 = mux(_T_720, UInt<1>("h01"), _T_723) @[el2_lib.scala 197:25] + _T_668[7] <= _T_724 @[el2_lib.scala 197:19] + node _T_725 = bits(io.trigger_pkt_any[2].tdata2, 7, 0) @[el2_lib.scala 197:30] + node _T_726 = andr(_T_725) @[el2_lib.scala 197:38] + node _T_727 = and(_T_726, _T_671) @[el2_lib.scala 197:43] + node _T_728 = bits(io.trigger_pkt_any[2].tdata2, 8, 8) @[el2_lib.scala 197:76] + node _T_729 = bits(dec_i0_match_data[2], 8, 8) @[el2_lib.scala 197:88] + node _T_730 = eq(_T_728, _T_729) @[el2_lib.scala 197:80] + node _T_731 = mux(_T_727, UInt<1>("h01"), _T_730) @[el2_lib.scala 197:25] + _T_668[8] <= _T_731 @[el2_lib.scala 197:19] + node _T_732 = bits(io.trigger_pkt_any[2].tdata2, 8, 0) @[el2_lib.scala 197:30] + node _T_733 = andr(_T_732) @[el2_lib.scala 197:38] + node _T_734 = and(_T_733, _T_671) @[el2_lib.scala 197:43] + node _T_735 = bits(io.trigger_pkt_any[2].tdata2, 9, 9) @[el2_lib.scala 197:76] + node _T_736 = bits(dec_i0_match_data[2], 9, 9) @[el2_lib.scala 197:88] + node _T_737 = eq(_T_735, _T_736) @[el2_lib.scala 197:80] + node _T_738 = mux(_T_734, UInt<1>("h01"), _T_737) @[el2_lib.scala 197:25] + _T_668[9] <= _T_738 @[el2_lib.scala 197:19] + node _T_739 = bits(io.trigger_pkt_any[2].tdata2, 9, 0) @[el2_lib.scala 197:30] + node _T_740 = andr(_T_739) @[el2_lib.scala 197:38] + node _T_741 = and(_T_740, _T_671) @[el2_lib.scala 197:43] + node _T_742 = bits(io.trigger_pkt_any[2].tdata2, 10, 10) @[el2_lib.scala 197:76] + node _T_743 = bits(dec_i0_match_data[2], 10, 10) @[el2_lib.scala 197:88] + node _T_744 = eq(_T_742, _T_743) @[el2_lib.scala 197:80] + node _T_745 = mux(_T_741, UInt<1>("h01"), _T_744) @[el2_lib.scala 197:25] + _T_668[10] <= _T_745 @[el2_lib.scala 197:19] + node _T_746 = bits(io.trigger_pkt_any[2].tdata2, 10, 0) @[el2_lib.scala 197:30] + node _T_747 = andr(_T_746) @[el2_lib.scala 197:38] + node _T_748 = and(_T_747, _T_671) @[el2_lib.scala 197:43] + node _T_749 = bits(io.trigger_pkt_any[2].tdata2, 11, 11) @[el2_lib.scala 197:76] + node _T_750 = bits(dec_i0_match_data[2], 11, 11) @[el2_lib.scala 197:88] + node _T_751 = eq(_T_749, _T_750) @[el2_lib.scala 197:80] + node _T_752 = mux(_T_748, UInt<1>("h01"), _T_751) @[el2_lib.scala 197:25] + _T_668[11] <= _T_752 @[el2_lib.scala 197:19] + node _T_753 = bits(io.trigger_pkt_any[2].tdata2, 11, 0) @[el2_lib.scala 197:30] + node _T_754 = andr(_T_753) @[el2_lib.scala 197:38] + node _T_755 = and(_T_754, _T_671) @[el2_lib.scala 197:43] + node _T_756 = bits(io.trigger_pkt_any[2].tdata2, 12, 12) @[el2_lib.scala 197:76] + node _T_757 = bits(dec_i0_match_data[2], 12, 12) @[el2_lib.scala 197:88] + node _T_758 = eq(_T_756, _T_757) @[el2_lib.scala 197:80] + node _T_759 = mux(_T_755, UInt<1>("h01"), _T_758) @[el2_lib.scala 197:25] + _T_668[12] <= _T_759 @[el2_lib.scala 197:19] + node _T_760 = bits(io.trigger_pkt_any[2].tdata2, 12, 0) @[el2_lib.scala 197:30] + node _T_761 = andr(_T_760) @[el2_lib.scala 197:38] + node _T_762 = and(_T_761, _T_671) @[el2_lib.scala 197:43] + node _T_763 = bits(io.trigger_pkt_any[2].tdata2, 13, 13) @[el2_lib.scala 197:76] + node _T_764 = bits(dec_i0_match_data[2], 13, 13) @[el2_lib.scala 197:88] + node _T_765 = eq(_T_763, _T_764) @[el2_lib.scala 197:80] + node _T_766 = mux(_T_762, UInt<1>("h01"), _T_765) @[el2_lib.scala 197:25] + _T_668[13] <= _T_766 @[el2_lib.scala 197:19] + node _T_767 = bits(io.trigger_pkt_any[2].tdata2, 13, 0) @[el2_lib.scala 197:30] + node _T_768 = andr(_T_767) @[el2_lib.scala 197:38] + node _T_769 = and(_T_768, _T_671) @[el2_lib.scala 197:43] + node _T_770 = bits(io.trigger_pkt_any[2].tdata2, 14, 14) @[el2_lib.scala 197:76] + node _T_771 = bits(dec_i0_match_data[2], 14, 14) @[el2_lib.scala 197:88] + node _T_772 = eq(_T_770, _T_771) @[el2_lib.scala 197:80] + node _T_773 = mux(_T_769, UInt<1>("h01"), _T_772) @[el2_lib.scala 197:25] + _T_668[14] <= _T_773 @[el2_lib.scala 197:19] + node _T_774 = bits(io.trigger_pkt_any[2].tdata2, 14, 0) @[el2_lib.scala 197:30] + node _T_775 = andr(_T_774) @[el2_lib.scala 197:38] + node _T_776 = and(_T_775, _T_671) @[el2_lib.scala 197:43] + node _T_777 = bits(io.trigger_pkt_any[2].tdata2, 15, 15) @[el2_lib.scala 197:76] + node _T_778 = bits(dec_i0_match_data[2], 15, 15) @[el2_lib.scala 197:88] + node _T_779 = eq(_T_777, _T_778) @[el2_lib.scala 197:80] + node _T_780 = mux(_T_776, UInt<1>("h01"), _T_779) @[el2_lib.scala 197:25] + _T_668[15] <= _T_780 @[el2_lib.scala 197:19] + node _T_781 = bits(io.trigger_pkt_any[2].tdata2, 15, 0) @[el2_lib.scala 197:30] + node _T_782 = andr(_T_781) @[el2_lib.scala 197:38] + node _T_783 = and(_T_782, _T_671) @[el2_lib.scala 197:43] + node _T_784 = bits(io.trigger_pkt_any[2].tdata2, 16, 16) @[el2_lib.scala 197:76] + node _T_785 = bits(dec_i0_match_data[2], 16, 16) @[el2_lib.scala 197:88] + node _T_786 = eq(_T_784, _T_785) @[el2_lib.scala 197:80] + node _T_787 = mux(_T_783, UInt<1>("h01"), _T_786) @[el2_lib.scala 197:25] + _T_668[16] <= _T_787 @[el2_lib.scala 197:19] + node _T_788 = bits(io.trigger_pkt_any[2].tdata2, 16, 0) @[el2_lib.scala 197:30] + node _T_789 = andr(_T_788) @[el2_lib.scala 197:38] + node _T_790 = and(_T_789, _T_671) @[el2_lib.scala 197:43] + node _T_791 = bits(io.trigger_pkt_any[2].tdata2, 17, 17) @[el2_lib.scala 197:76] + node _T_792 = bits(dec_i0_match_data[2], 17, 17) @[el2_lib.scala 197:88] + node _T_793 = eq(_T_791, _T_792) @[el2_lib.scala 197:80] + node _T_794 = mux(_T_790, UInt<1>("h01"), _T_793) @[el2_lib.scala 197:25] + _T_668[17] <= _T_794 @[el2_lib.scala 197:19] + node _T_795 = bits(io.trigger_pkt_any[2].tdata2, 17, 0) @[el2_lib.scala 197:30] + node _T_796 = andr(_T_795) @[el2_lib.scala 197:38] + node _T_797 = and(_T_796, _T_671) @[el2_lib.scala 197:43] + node _T_798 = bits(io.trigger_pkt_any[2].tdata2, 18, 18) @[el2_lib.scala 197:76] + node _T_799 = bits(dec_i0_match_data[2], 18, 18) @[el2_lib.scala 197:88] + node _T_800 = eq(_T_798, _T_799) @[el2_lib.scala 197:80] + node _T_801 = mux(_T_797, UInt<1>("h01"), _T_800) @[el2_lib.scala 197:25] + _T_668[18] <= _T_801 @[el2_lib.scala 197:19] + node _T_802 = bits(io.trigger_pkt_any[2].tdata2, 18, 0) @[el2_lib.scala 197:30] + node _T_803 = andr(_T_802) @[el2_lib.scala 197:38] + node _T_804 = and(_T_803, _T_671) @[el2_lib.scala 197:43] + node _T_805 = bits(io.trigger_pkt_any[2].tdata2, 19, 19) @[el2_lib.scala 197:76] + node _T_806 = bits(dec_i0_match_data[2], 19, 19) @[el2_lib.scala 197:88] + node _T_807 = eq(_T_805, _T_806) @[el2_lib.scala 197:80] + node _T_808 = mux(_T_804, UInt<1>("h01"), _T_807) @[el2_lib.scala 197:25] + _T_668[19] <= _T_808 @[el2_lib.scala 197:19] + node _T_809 = bits(io.trigger_pkt_any[2].tdata2, 19, 0) @[el2_lib.scala 197:30] + node _T_810 = andr(_T_809) @[el2_lib.scala 197:38] + node _T_811 = and(_T_810, _T_671) @[el2_lib.scala 197:43] + node _T_812 = bits(io.trigger_pkt_any[2].tdata2, 20, 20) @[el2_lib.scala 197:76] + node _T_813 = bits(dec_i0_match_data[2], 20, 20) @[el2_lib.scala 197:88] + node _T_814 = eq(_T_812, _T_813) @[el2_lib.scala 197:80] + node _T_815 = mux(_T_811, UInt<1>("h01"), _T_814) @[el2_lib.scala 197:25] + _T_668[20] <= _T_815 @[el2_lib.scala 197:19] + node _T_816 = bits(io.trigger_pkt_any[2].tdata2, 20, 0) @[el2_lib.scala 197:30] + node _T_817 = andr(_T_816) @[el2_lib.scala 197:38] + node _T_818 = and(_T_817, _T_671) @[el2_lib.scala 197:43] + node _T_819 = bits(io.trigger_pkt_any[2].tdata2, 21, 21) @[el2_lib.scala 197:76] + node _T_820 = bits(dec_i0_match_data[2], 21, 21) @[el2_lib.scala 197:88] + node _T_821 = eq(_T_819, _T_820) @[el2_lib.scala 197:80] + node _T_822 = mux(_T_818, UInt<1>("h01"), _T_821) @[el2_lib.scala 197:25] + _T_668[21] <= _T_822 @[el2_lib.scala 197:19] + node _T_823 = bits(io.trigger_pkt_any[2].tdata2, 21, 0) @[el2_lib.scala 197:30] + node _T_824 = andr(_T_823) @[el2_lib.scala 197:38] + node _T_825 = and(_T_824, _T_671) @[el2_lib.scala 197:43] + node _T_826 = bits(io.trigger_pkt_any[2].tdata2, 22, 22) @[el2_lib.scala 197:76] + node _T_827 = bits(dec_i0_match_data[2], 22, 22) @[el2_lib.scala 197:88] + node _T_828 = eq(_T_826, _T_827) @[el2_lib.scala 197:80] + node _T_829 = mux(_T_825, UInt<1>("h01"), _T_828) @[el2_lib.scala 197:25] + _T_668[22] <= _T_829 @[el2_lib.scala 197:19] + node _T_830 = bits(io.trigger_pkt_any[2].tdata2, 22, 0) @[el2_lib.scala 197:30] + node _T_831 = andr(_T_830) @[el2_lib.scala 197:38] + node _T_832 = and(_T_831, _T_671) @[el2_lib.scala 197:43] + node _T_833 = bits(io.trigger_pkt_any[2].tdata2, 23, 23) @[el2_lib.scala 197:76] + node _T_834 = bits(dec_i0_match_data[2], 23, 23) @[el2_lib.scala 197:88] + node _T_835 = eq(_T_833, _T_834) @[el2_lib.scala 197:80] + node _T_836 = mux(_T_832, UInt<1>("h01"), _T_835) @[el2_lib.scala 197:25] + _T_668[23] <= _T_836 @[el2_lib.scala 197:19] + node _T_837 = bits(io.trigger_pkt_any[2].tdata2, 23, 0) @[el2_lib.scala 197:30] + node _T_838 = andr(_T_837) @[el2_lib.scala 197:38] + node _T_839 = and(_T_838, _T_671) @[el2_lib.scala 197:43] + node _T_840 = bits(io.trigger_pkt_any[2].tdata2, 24, 24) @[el2_lib.scala 197:76] + node _T_841 = bits(dec_i0_match_data[2], 24, 24) @[el2_lib.scala 197:88] + node _T_842 = eq(_T_840, _T_841) @[el2_lib.scala 197:80] + node _T_843 = mux(_T_839, UInt<1>("h01"), _T_842) @[el2_lib.scala 197:25] + _T_668[24] <= _T_843 @[el2_lib.scala 197:19] + node _T_844 = bits(io.trigger_pkt_any[2].tdata2, 24, 0) @[el2_lib.scala 197:30] + node _T_845 = andr(_T_844) @[el2_lib.scala 197:38] + node _T_846 = and(_T_845, _T_671) @[el2_lib.scala 197:43] + node _T_847 = bits(io.trigger_pkt_any[2].tdata2, 25, 25) @[el2_lib.scala 197:76] + node _T_848 = bits(dec_i0_match_data[2], 25, 25) @[el2_lib.scala 197:88] + node _T_849 = eq(_T_847, _T_848) @[el2_lib.scala 197:80] + node _T_850 = mux(_T_846, UInt<1>("h01"), _T_849) @[el2_lib.scala 197:25] + _T_668[25] <= _T_850 @[el2_lib.scala 197:19] + node _T_851 = bits(io.trigger_pkt_any[2].tdata2, 25, 0) @[el2_lib.scala 197:30] + node _T_852 = andr(_T_851) @[el2_lib.scala 197:38] + node _T_853 = and(_T_852, _T_671) @[el2_lib.scala 197:43] + node _T_854 = bits(io.trigger_pkt_any[2].tdata2, 26, 26) @[el2_lib.scala 197:76] + node _T_855 = bits(dec_i0_match_data[2], 26, 26) @[el2_lib.scala 197:88] + node _T_856 = eq(_T_854, _T_855) @[el2_lib.scala 197:80] + node _T_857 = mux(_T_853, UInt<1>("h01"), _T_856) @[el2_lib.scala 197:25] + _T_668[26] <= _T_857 @[el2_lib.scala 197:19] + node _T_858 = bits(io.trigger_pkt_any[2].tdata2, 26, 0) @[el2_lib.scala 197:30] + node _T_859 = andr(_T_858) @[el2_lib.scala 197:38] + node _T_860 = and(_T_859, _T_671) @[el2_lib.scala 197:43] + node _T_861 = bits(io.trigger_pkt_any[2].tdata2, 27, 27) @[el2_lib.scala 197:76] + node _T_862 = bits(dec_i0_match_data[2], 27, 27) @[el2_lib.scala 197:88] + node _T_863 = eq(_T_861, _T_862) @[el2_lib.scala 197:80] + node _T_864 = mux(_T_860, UInt<1>("h01"), _T_863) @[el2_lib.scala 197:25] + _T_668[27] <= _T_864 @[el2_lib.scala 197:19] + node _T_865 = bits(io.trigger_pkt_any[2].tdata2, 27, 0) @[el2_lib.scala 197:30] + node _T_866 = andr(_T_865) @[el2_lib.scala 197:38] + node _T_867 = and(_T_866, _T_671) @[el2_lib.scala 197:43] + node _T_868 = bits(io.trigger_pkt_any[2].tdata2, 28, 28) @[el2_lib.scala 197:76] + node _T_869 = bits(dec_i0_match_data[2], 28, 28) @[el2_lib.scala 197:88] + node _T_870 = eq(_T_868, _T_869) @[el2_lib.scala 197:80] + node _T_871 = mux(_T_867, UInt<1>("h01"), _T_870) @[el2_lib.scala 197:25] + _T_668[28] <= _T_871 @[el2_lib.scala 197:19] + node _T_872 = bits(io.trigger_pkt_any[2].tdata2, 28, 0) @[el2_lib.scala 197:30] + node _T_873 = andr(_T_872) @[el2_lib.scala 197:38] + node _T_874 = and(_T_873, _T_671) @[el2_lib.scala 197:43] + node _T_875 = bits(io.trigger_pkt_any[2].tdata2, 29, 29) @[el2_lib.scala 197:76] + node _T_876 = bits(dec_i0_match_data[2], 29, 29) @[el2_lib.scala 197:88] + node _T_877 = eq(_T_875, _T_876) @[el2_lib.scala 197:80] + node _T_878 = mux(_T_874, UInt<1>("h01"), _T_877) @[el2_lib.scala 197:25] + _T_668[29] <= _T_878 @[el2_lib.scala 197:19] + node _T_879 = bits(io.trigger_pkt_any[2].tdata2, 29, 0) @[el2_lib.scala 197:30] + node _T_880 = andr(_T_879) @[el2_lib.scala 197:38] + node _T_881 = and(_T_880, _T_671) @[el2_lib.scala 197:43] + node _T_882 = bits(io.trigger_pkt_any[2].tdata2, 30, 30) @[el2_lib.scala 197:76] + node _T_883 = bits(dec_i0_match_data[2], 30, 30) @[el2_lib.scala 197:88] + node _T_884 = eq(_T_882, _T_883) @[el2_lib.scala 197:80] + node _T_885 = mux(_T_881, UInt<1>("h01"), _T_884) @[el2_lib.scala 197:25] + _T_668[30] <= _T_885 @[el2_lib.scala 197:19] + node _T_886 = bits(io.trigger_pkt_any[2].tdata2, 30, 0) @[el2_lib.scala 197:30] + node _T_887 = andr(_T_886) @[el2_lib.scala 197:38] + node _T_888 = and(_T_887, _T_671) @[el2_lib.scala 197:43] + node _T_889 = bits(io.trigger_pkt_any[2].tdata2, 31, 31) @[el2_lib.scala 197:76] + node _T_890 = bits(dec_i0_match_data[2], 31, 31) @[el2_lib.scala 197:88] + node _T_891 = eq(_T_889, _T_890) @[el2_lib.scala 197:80] + node _T_892 = mux(_T_888, UInt<1>("h01"), _T_891) @[el2_lib.scala 197:25] + _T_668[31] <= _T_892 @[el2_lib.scala 197:19] + node _T_893 = and(_T_668[0], _T_668[1]) @[el2_lib.scala 198:22] + node _T_894 = and(_T_893, _T_668[2]) @[el2_lib.scala 198:22] + node _T_895 = and(_T_894, _T_668[3]) @[el2_lib.scala 198:22] + node _T_896 = and(_T_895, _T_668[4]) @[el2_lib.scala 198:22] + node _T_897 = and(_T_896, _T_668[5]) @[el2_lib.scala 198:22] + node _T_898 = and(_T_897, _T_668[6]) @[el2_lib.scala 198:22] + node _T_899 = and(_T_898, _T_668[7]) @[el2_lib.scala 198:22] + node _T_900 = and(_T_899, _T_668[8]) @[el2_lib.scala 198:22] + node _T_901 = and(_T_900, _T_668[9]) @[el2_lib.scala 198:22] + node _T_902 = and(_T_901, _T_668[10]) @[el2_lib.scala 198:22] + node _T_903 = and(_T_902, _T_668[11]) @[el2_lib.scala 198:22] + node _T_904 = and(_T_903, _T_668[12]) @[el2_lib.scala 198:22] + node _T_905 = and(_T_904, _T_668[13]) @[el2_lib.scala 198:22] + node _T_906 = and(_T_905, _T_668[14]) @[el2_lib.scala 198:22] + node _T_907 = and(_T_906, _T_668[15]) @[el2_lib.scala 198:22] + node _T_908 = and(_T_907, _T_668[16]) @[el2_lib.scala 198:22] + node _T_909 = and(_T_908, _T_668[17]) @[el2_lib.scala 198:22] + node _T_910 = and(_T_909, _T_668[18]) @[el2_lib.scala 198:22] + node _T_911 = and(_T_910, _T_668[19]) @[el2_lib.scala 198:22] + node _T_912 = and(_T_911, _T_668[20]) @[el2_lib.scala 198:22] + node _T_913 = and(_T_912, _T_668[21]) @[el2_lib.scala 198:22] + node _T_914 = and(_T_913, _T_668[22]) @[el2_lib.scala 198:22] + node _T_915 = and(_T_914, _T_668[23]) @[el2_lib.scala 198:22] + node _T_916 = and(_T_915, _T_668[24]) @[el2_lib.scala 198:22] + node _T_917 = and(_T_916, _T_668[25]) @[el2_lib.scala 198:22] + node _T_918 = and(_T_917, _T_668[26]) @[el2_lib.scala 198:22] + node _T_919 = and(_T_918, _T_668[27]) @[el2_lib.scala 198:22] + node _T_920 = and(_T_919, _T_668[28]) @[el2_lib.scala 198:22] + node _T_921 = and(_T_920, _T_668[29]) @[el2_lib.scala 198:22] + node _T_922 = and(_T_921, _T_668[30]) @[el2_lib.scala 198:22] + node _T_923 = and(_T_922, _T_668[31]) @[el2_lib.scala 198:22] + node _T_924 = and(_T_666, _T_923) @[el2_lsu_trigger.scala 16:109] + node _T_925 = and(io.trigger_pkt_any[3].execute, io.trigger_pkt_any[3].m) @[el2_lsu_trigger.scala 16:83] + node _T_926 = bits(io.trigger_pkt_any[3].match_, 0, 0) @[el2_lsu_trigger.scala 16:213] + wire _T_927 : UInt<1>[32] @[el2_lib.scala 193:24] + node _T_928 = andr(io.trigger_pkt_any[3].tdata2) @[el2_lib.scala 194:45] + node _T_929 = not(_T_928) @[el2_lib.scala 194:39] + node _T_930 = and(_T_926, _T_929) @[el2_lib.scala 194:37] + node _T_931 = bits(io.trigger_pkt_any[3].tdata2, 0, 0) @[el2_lib.scala 195:48] + node _T_932 = bits(dec_i0_match_data[3], 0, 0) @[el2_lib.scala 195:60] + node _T_933 = eq(_T_931, _T_932) @[el2_lib.scala 195:52] + node _T_934 = or(_T_930, _T_933) @[el2_lib.scala 195:41] + _T_927[0] <= _T_934 @[el2_lib.scala 195:18] + node _T_935 = bits(io.trigger_pkt_any[3].tdata2, 0, 0) @[el2_lib.scala 197:30] + node _T_936 = andr(_T_935) @[el2_lib.scala 197:38] + node _T_937 = and(_T_936, _T_930) @[el2_lib.scala 197:43] + node _T_938 = bits(io.trigger_pkt_any[3].tdata2, 1, 1) @[el2_lib.scala 197:76] + node _T_939 = bits(dec_i0_match_data[3], 1, 1) @[el2_lib.scala 197:88] + node _T_940 = eq(_T_938, _T_939) @[el2_lib.scala 197:80] + node _T_941 = mux(_T_937, UInt<1>("h01"), _T_940) @[el2_lib.scala 197:25] + _T_927[1] <= _T_941 @[el2_lib.scala 197:19] + node _T_942 = bits(io.trigger_pkt_any[3].tdata2, 1, 0) @[el2_lib.scala 197:30] + node _T_943 = andr(_T_942) @[el2_lib.scala 197:38] + node _T_944 = and(_T_943, _T_930) @[el2_lib.scala 197:43] + node _T_945 = bits(io.trigger_pkt_any[3].tdata2, 2, 2) @[el2_lib.scala 197:76] + node _T_946 = bits(dec_i0_match_data[3], 2, 2) @[el2_lib.scala 197:88] + node _T_947 = eq(_T_945, _T_946) @[el2_lib.scala 197:80] + node _T_948 = mux(_T_944, UInt<1>("h01"), _T_947) @[el2_lib.scala 197:25] + _T_927[2] <= _T_948 @[el2_lib.scala 197:19] + node _T_949 = bits(io.trigger_pkt_any[3].tdata2, 2, 0) @[el2_lib.scala 197:30] + node _T_950 = andr(_T_949) @[el2_lib.scala 197:38] + node _T_951 = and(_T_950, _T_930) @[el2_lib.scala 197:43] + node _T_952 = bits(io.trigger_pkt_any[3].tdata2, 3, 3) @[el2_lib.scala 197:76] + node _T_953 = bits(dec_i0_match_data[3], 3, 3) @[el2_lib.scala 197:88] + node _T_954 = eq(_T_952, _T_953) @[el2_lib.scala 197:80] + node _T_955 = mux(_T_951, UInt<1>("h01"), _T_954) @[el2_lib.scala 197:25] + _T_927[3] <= _T_955 @[el2_lib.scala 197:19] + node _T_956 = bits(io.trigger_pkt_any[3].tdata2, 3, 0) @[el2_lib.scala 197:30] + node _T_957 = andr(_T_956) @[el2_lib.scala 197:38] + node _T_958 = and(_T_957, _T_930) @[el2_lib.scala 197:43] + node _T_959 = bits(io.trigger_pkt_any[3].tdata2, 4, 4) @[el2_lib.scala 197:76] + node _T_960 = bits(dec_i0_match_data[3], 4, 4) @[el2_lib.scala 197:88] + node _T_961 = eq(_T_959, _T_960) @[el2_lib.scala 197:80] + node _T_962 = mux(_T_958, UInt<1>("h01"), _T_961) @[el2_lib.scala 197:25] + _T_927[4] <= _T_962 @[el2_lib.scala 197:19] + node _T_963 = bits(io.trigger_pkt_any[3].tdata2, 4, 0) @[el2_lib.scala 197:30] + node _T_964 = andr(_T_963) @[el2_lib.scala 197:38] + node _T_965 = and(_T_964, _T_930) @[el2_lib.scala 197:43] + node _T_966 = bits(io.trigger_pkt_any[3].tdata2, 5, 5) @[el2_lib.scala 197:76] + node _T_967 = bits(dec_i0_match_data[3], 5, 5) @[el2_lib.scala 197:88] + node _T_968 = eq(_T_966, _T_967) @[el2_lib.scala 197:80] + node _T_969 = mux(_T_965, UInt<1>("h01"), _T_968) @[el2_lib.scala 197:25] + _T_927[5] <= _T_969 @[el2_lib.scala 197:19] + node _T_970 = bits(io.trigger_pkt_any[3].tdata2, 5, 0) @[el2_lib.scala 197:30] + node _T_971 = andr(_T_970) @[el2_lib.scala 197:38] + node _T_972 = and(_T_971, _T_930) @[el2_lib.scala 197:43] + node _T_973 = bits(io.trigger_pkt_any[3].tdata2, 6, 6) @[el2_lib.scala 197:76] + node _T_974 = bits(dec_i0_match_data[3], 6, 6) @[el2_lib.scala 197:88] + node _T_975 = eq(_T_973, _T_974) @[el2_lib.scala 197:80] + node _T_976 = mux(_T_972, UInt<1>("h01"), _T_975) @[el2_lib.scala 197:25] + _T_927[6] <= _T_976 @[el2_lib.scala 197:19] + node _T_977 = bits(io.trigger_pkt_any[3].tdata2, 6, 0) @[el2_lib.scala 197:30] + node _T_978 = andr(_T_977) @[el2_lib.scala 197:38] + node _T_979 = and(_T_978, _T_930) @[el2_lib.scala 197:43] + node _T_980 = bits(io.trigger_pkt_any[3].tdata2, 7, 7) @[el2_lib.scala 197:76] + node _T_981 = bits(dec_i0_match_data[3], 7, 7) @[el2_lib.scala 197:88] + node _T_982 = eq(_T_980, _T_981) @[el2_lib.scala 197:80] + node _T_983 = mux(_T_979, UInt<1>("h01"), _T_982) @[el2_lib.scala 197:25] + _T_927[7] <= _T_983 @[el2_lib.scala 197:19] + node _T_984 = bits(io.trigger_pkt_any[3].tdata2, 7, 0) @[el2_lib.scala 197:30] + node _T_985 = andr(_T_984) @[el2_lib.scala 197:38] + node _T_986 = and(_T_985, _T_930) @[el2_lib.scala 197:43] + node _T_987 = bits(io.trigger_pkt_any[3].tdata2, 8, 8) @[el2_lib.scala 197:76] + node _T_988 = bits(dec_i0_match_data[3], 8, 8) @[el2_lib.scala 197:88] + node _T_989 = eq(_T_987, _T_988) @[el2_lib.scala 197:80] + node _T_990 = mux(_T_986, UInt<1>("h01"), _T_989) @[el2_lib.scala 197:25] + _T_927[8] <= _T_990 @[el2_lib.scala 197:19] + node _T_991 = bits(io.trigger_pkt_any[3].tdata2, 8, 0) @[el2_lib.scala 197:30] + node _T_992 = andr(_T_991) @[el2_lib.scala 197:38] + node _T_993 = and(_T_992, _T_930) @[el2_lib.scala 197:43] + node _T_994 = bits(io.trigger_pkt_any[3].tdata2, 9, 9) @[el2_lib.scala 197:76] + node _T_995 = bits(dec_i0_match_data[3], 9, 9) @[el2_lib.scala 197:88] + node _T_996 = eq(_T_994, _T_995) @[el2_lib.scala 197:80] + node _T_997 = mux(_T_993, UInt<1>("h01"), _T_996) @[el2_lib.scala 197:25] + _T_927[9] <= _T_997 @[el2_lib.scala 197:19] + node _T_998 = bits(io.trigger_pkt_any[3].tdata2, 9, 0) @[el2_lib.scala 197:30] + node _T_999 = andr(_T_998) @[el2_lib.scala 197:38] + node _T_1000 = and(_T_999, _T_930) @[el2_lib.scala 197:43] + node _T_1001 = bits(io.trigger_pkt_any[3].tdata2, 10, 10) @[el2_lib.scala 197:76] + node _T_1002 = bits(dec_i0_match_data[3], 10, 10) @[el2_lib.scala 197:88] + node _T_1003 = eq(_T_1001, _T_1002) @[el2_lib.scala 197:80] + node _T_1004 = mux(_T_1000, UInt<1>("h01"), _T_1003) @[el2_lib.scala 197:25] + _T_927[10] <= _T_1004 @[el2_lib.scala 197:19] + node _T_1005 = bits(io.trigger_pkt_any[3].tdata2, 10, 0) @[el2_lib.scala 197:30] + node _T_1006 = andr(_T_1005) @[el2_lib.scala 197:38] + node _T_1007 = and(_T_1006, _T_930) @[el2_lib.scala 197:43] + node _T_1008 = bits(io.trigger_pkt_any[3].tdata2, 11, 11) @[el2_lib.scala 197:76] + node _T_1009 = bits(dec_i0_match_data[3], 11, 11) @[el2_lib.scala 197:88] + node _T_1010 = eq(_T_1008, _T_1009) @[el2_lib.scala 197:80] + node _T_1011 = mux(_T_1007, UInt<1>("h01"), _T_1010) @[el2_lib.scala 197:25] + _T_927[11] <= _T_1011 @[el2_lib.scala 197:19] + node _T_1012 = bits(io.trigger_pkt_any[3].tdata2, 11, 0) @[el2_lib.scala 197:30] + node _T_1013 = andr(_T_1012) @[el2_lib.scala 197:38] + node _T_1014 = and(_T_1013, _T_930) @[el2_lib.scala 197:43] + node _T_1015 = bits(io.trigger_pkt_any[3].tdata2, 12, 12) @[el2_lib.scala 197:76] + node _T_1016 = bits(dec_i0_match_data[3], 12, 12) @[el2_lib.scala 197:88] + node _T_1017 = eq(_T_1015, _T_1016) @[el2_lib.scala 197:80] + node _T_1018 = mux(_T_1014, UInt<1>("h01"), _T_1017) @[el2_lib.scala 197:25] + _T_927[12] <= _T_1018 @[el2_lib.scala 197:19] + node _T_1019 = bits(io.trigger_pkt_any[3].tdata2, 12, 0) @[el2_lib.scala 197:30] + node _T_1020 = andr(_T_1019) @[el2_lib.scala 197:38] + node _T_1021 = and(_T_1020, _T_930) @[el2_lib.scala 197:43] + node _T_1022 = bits(io.trigger_pkt_any[3].tdata2, 13, 13) @[el2_lib.scala 197:76] + node _T_1023 = bits(dec_i0_match_data[3], 13, 13) @[el2_lib.scala 197:88] + node _T_1024 = eq(_T_1022, _T_1023) @[el2_lib.scala 197:80] + node _T_1025 = mux(_T_1021, UInt<1>("h01"), _T_1024) @[el2_lib.scala 197:25] + _T_927[13] <= _T_1025 @[el2_lib.scala 197:19] + node _T_1026 = bits(io.trigger_pkt_any[3].tdata2, 13, 0) @[el2_lib.scala 197:30] + node _T_1027 = andr(_T_1026) @[el2_lib.scala 197:38] + node _T_1028 = and(_T_1027, _T_930) @[el2_lib.scala 197:43] + node _T_1029 = bits(io.trigger_pkt_any[3].tdata2, 14, 14) @[el2_lib.scala 197:76] + node _T_1030 = bits(dec_i0_match_data[3], 14, 14) @[el2_lib.scala 197:88] + node _T_1031 = eq(_T_1029, _T_1030) @[el2_lib.scala 197:80] + node _T_1032 = mux(_T_1028, UInt<1>("h01"), _T_1031) @[el2_lib.scala 197:25] + _T_927[14] <= _T_1032 @[el2_lib.scala 197:19] + node _T_1033 = bits(io.trigger_pkt_any[3].tdata2, 14, 0) @[el2_lib.scala 197:30] + node _T_1034 = andr(_T_1033) @[el2_lib.scala 197:38] + node _T_1035 = and(_T_1034, _T_930) @[el2_lib.scala 197:43] + node _T_1036 = bits(io.trigger_pkt_any[3].tdata2, 15, 15) @[el2_lib.scala 197:76] + node _T_1037 = bits(dec_i0_match_data[3], 15, 15) @[el2_lib.scala 197:88] + node _T_1038 = eq(_T_1036, _T_1037) @[el2_lib.scala 197:80] + node _T_1039 = mux(_T_1035, UInt<1>("h01"), _T_1038) @[el2_lib.scala 197:25] + _T_927[15] <= _T_1039 @[el2_lib.scala 197:19] + node _T_1040 = bits(io.trigger_pkt_any[3].tdata2, 15, 0) @[el2_lib.scala 197:30] + node _T_1041 = andr(_T_1040) @[el2_lib.scala 197:38] + node _T_1042 = and(_T_1041, _T_930) @[el2_lib.scala 197:43] + node _T_1043 = bits(io.trigger_pkt_any[3].tdata2, 16, 16) @[el2_lib.scala 197:76] + node _T_1044 = bits(dec_i0_match_data[3], 16, 16) @[el2_lib.scala 197:88] + node _T_1045 = eq(_T_1043, _T_1044) @[el2_lib.scala 197:80] + node _T_1046 = mux(_T_1042, UInt<1>("h01"), _T_1045) @[el2_lib.scala 197:25] + _T_927[16] <= _T_1046 @[el2_lib.scala 197:19] + node _T_1047 = bits(io.trigger_pkt_any[3].tdata2, 16, 0) @[el2_lib.scala 197:30] + node _T_1048 = andr(_T_1047) @[el2_lib.scala 197:38] + node _T_1049 = and(_T_1048, _T_930) @[el2_lib.scala 197:43] + node _T_1050 = bits(io.trigger_pkt_any[3].tdata2, 17, 17) @[el2_lib.scala 197:76] + node _T_1051 = bits(dec_i0_match_data[3], 17, 17) @[el2_lib.scala 197:88] + node _T_1052 = eq(_T_1050, _T_1051) @[el2_lib.scala 197:80] + node _T_1053 = mux(_T_1049, UInt<1>("h01"), _T_1052) @[el2_lib.scala 197:25] + _T_927[17] <= _T_1053 @[el2_lib.scala 197:19] + node _T_1054 = bits(io.trigger_pkt_any[3].tdata2, 17, 0) @[el2_lib.scala 197:30] + node _T_1055 = andr(_T_1054) @[el2_lib.scala 197:38] + node _T_1056 = and(_T_1055, _T_930) @[el2_lib.scala 197:43] + node _T_1057 = bits(io.trigger_pkt_any[3].tdata2, 18, 18) @[el2_lib.scala 197:76] + node _T_1058 = bits(dec_i0_match_data[3], 18, 18) @[el2_lib.scala 197:88] + node _T_1059 = eq(_T_1057, _T_1058) @[el2_lib.scala 197:80] + node _T_1060 = mux(_T_1056, UInt<1>("h01"), _T_1059) @[el2_lib.scala 197:25] + _T_927[18] <= _T_1060 @[el2_lib.scala 197:19] + node _T_1061 = bits(io.trigger_pkt_any[3].tdata2, 18, 0) @[el2_lib.scala 197:30] + node _T_1062 = andr(_T_1061) @[el2_lib.scala 197:38] + node _T_1063 = and(_T_1062, _T_930) @[el2_lib.scala 197:43] + node _T_1064 = bits(io.trigger_pkt_any[3].tdata2, 19, 19) @[el2_lib.scala 197:76] + node _T_1065 = bits(dec_i0_match_data[3], 19, 19) @[el2_lib.scala 197:88] + node _T_1066 = eq(_T_1064, _T_1065) @[el2_lib.scala 197:80] + node _T_1067 = mux(_T_1063, UInt<1>("h01"), _T_1066) @[el2_lib.scala 197:25] + _T_927[19] <= _T_1067 @[el2_lib.scala 197:19] + node _T_1068 = bits(io.trigger_pkt_any[3].tdata2, 19, 0) @[el2_lib.scala 197:30] + node _T_1069 = andr(_T_1068) @[el2_lib.scala 197:38] + node _T_1070 = and(_T_1069, _T_930) @[el2_lib.scala 197:43] + node _T_1071 = bits(io.trigger_pkt_any[3].tdata2, 20, 20) @[el2_lib.scala 197:76] + node _T_1072 = bits(dec_i0_match_data[3], 20, 20) @[el2_lib.scala 197:88] + node _T_1073 = eq(_T_1071, _T_1072) @[el2_lib.scala 197:80] + node _T_1074 = mux(_T_1070, UInt<1>("h01"), _T_1073) @[el2_lib.scala 197:25] + _T_927[20] <= _T_1074 @[el2_lib.scala 197:19] + node _T_1075 = bits(io.trigger_pkt_any[3].tdata2, 20, 0) @[el2_lib.scala 197:30] + node _T_1076 = andr(_T_1075) @[el2_lib.scala 197:38] + node _T_1077 = and(_T_1076, _T_930) @[el2_lib.scala 197:43] + node _T_1078 = bits(io.trigger_pkt_any[3].tdata2, 21, 21) @[el2_lib.scala 197:76] + node _T_1079 = bits(dec_i0_match_data[3], 21, 21) @[el2_lib.scala 197:88] + node _T_1080 = eq(_T_1078, _T_1079) @[el2_lib.scala 197:80] + node _T_1081 = mux(_T_1077, UInt<1>("h01"), _T_1080) @[el2_lib.scala 197:25] + _T_927[21] <= _T_1081 @[el2_lib.scala 197:19] + node _T_1082 = bits(io.trigger_pkt_any[3].tdata2, 21, 0) @[el2_lib.scala 197:30] + node _T_1083 = andr(_T_1082) @[el2_lib.scala 197:38] + node _T_1084 = and(_T_1083, _T_930) @[el2_lib.scala 197:43] + node _T_1085 = bits(io.trigger_pkt_any[3].tdata2, 22, 22) @[el2_lib.scala 197:76] + node _T_1086 = bits(dec_i0_match_data[3], 22, 22) @[el2_lib.scala 197:88] + node _T_1087 = eq(_T_1085, _T_1086) @[el2_lib.scala 197:80] + node _T_1088 = mux(_T_1084, UInt<1>("h01"), _T_1087) @[el2_lib.scala 197:25] + _T_927[22] <= _T_1088 @[el2_lib.scala 197:19] + node _T_1089 = bits(io.trigger_pkt_any[3].tdata2, 22, 0) @[el2_lib.scala 197:30] + node _T_1090 = andr(_T_1089) @[el2_lib.scala 197:38] + node _T_1091 = and(_T_1090, _T_930) @[el2_lib.scala 197:43] + node _T_1092 = bits(io.trigger_pkt_any[3].tdata2, 23, 23) @[el2_lib.scala 197:76] + node _T_1093 = bits(dec_i0_match_data[3], 23, 23) @[el2_lib.scala 197:88] + node _T_1094 = eq(_T_1092, _T_1093) @[el2_lib.scala 197:80] + node _T_1095 = mux(_T_1091, UInt<1>("h01"), _T_1094) @[el2_lib.scala 197:25] + _T_927[23] <= _T_1095 @[el2_lib.scala 197:19] + node _T_1096 = bits(io.trigger_pkt_any[3].tdata2, 23, 0) @[el2_lib.scala 197:30] + node _T_1097 = andr(_T_1096) @[el2_lib.scala 197:38] + node _T_1098 = and(_T_1097, _T_930) @[el2_lib.scala 197:43] + node _T_1099 = bits(io.trigger_pkt_any[3].tdata2, 24, 24) @[el2_lib.scala 197:76] + node _T_1100 = bits(dec_i0_match_data[3], 24, 24) @[el2_lib.scala 197:88] + node _T_1101 = eq(_T_1099, _T_1100) @[el2_lib.scala 197:80] + node _T_1102 = mux(_T_1098, UInt<1>("h01"), _T_1101) @[el2_lib.scala 197:25] + _T_927[24] <= _T_1102 @[el2_lib.scala 197:19] + node _T_1103 = bits(io.trigger_pkt_any[3].tdata2, 24, 0) @[el2_lib.scala 197:30] + node _T_1104 = andr(_T_1103) @[el2_lib.scala 197:38] + node _T_1105 = and(_T_1104, _T_930) @[el2_lib.scala 197:43] + node _T_1106 = bits(io.trigger_pkt_any[3].tdata2, 25, 25) @[el2_lib.scala 197:76] + node _T_1107 = bits(dec_i0_match_data[3], 25, 25) @[el2_lib.scala 197:88] + node _T_1108 = eq(_T_1106, _T_1107) @[el2_lib.scala 197:80] + node _T_1109 = mux(_T_1105, UInt<1>("h01"), _T_1108) @[el2_lib.scala 197:25] + _T_927[25] <= _T_1109 @[el2_lib.scala 197:19] + node _T_1110 = bits(io.trigger_pkt_any[3].tdata2, 25, 0) @[el2_lib.scala 197:30] + node _T_1111 = andr(_T_1110) @[el2_lib.scala 197:38] + node _T_1112 = and(_T_1111, _T_930) @[el2_lib.scala 197:43] + node _T_1113 = bits(io.trigger_pkt_any[3].tdata2, 26, 26) @[el2_lib.scala 197:76] + node _T_1114 = bits(dec_i0_match_data[3], 26, 26) @[el2_lib.scala 197:88] + node _T_1115 = eq(_T_1113, _T_1114) @[el2_lib.scala 197:80] + node _T_1116 = mux(_T_1112, UInt<1>("h01"), _T_1115) @[el2_lib.scala 197:25] + _T_927[26] <= _T_1116 @[el2_lib.scala 197:19] + node _T_1117 = bits(io.trigger_pkt_any[3].tdata2, 26, 0) @[el2_lib.scala 197:30] + node _T_1118 = andr(_T_1117) @[el2_lib.scala 197:38] + node _T_1119 = and(_T_1118, _T_930) @[el2_lib.scala 197:43] + node _T_1120 = bits(io.trigger_pkt_any[3].tdata2, 27, 27) @[el2_lib.scala 197:76] + node _T_1121 = bits(dec_i0_match_data[3], 27, 27) @[el2_lib.scala 197:88] + node _T_1122 = eq(_T_1120, _T_1121) @[el2_lib.scala 197:80] + node _T_1123 = mux(_T_1119, UInt<1>("h01"), _T_1122) @[el2_lib.scala 197:25] + _T_927[27] <= _T_1123 @[el2_lib.scala 197:19] + node _T_1124 = bits(io.trigger_pkt_any[3].tdata2, 27, 0) @[el2_lib.scala 197:30] + node _T_1125 = andr(_T_1124) @[el2_lib.scala 197:38] + node _T_1126 = and(_T_1125, _T_930) @[el2_lib.scala 197:43] + node _T_1127 = bits(io.trigger_pkt_any[3].tdata2, 28, 28) @[el2_lib.scala 197:76] + node _T_1128 = bits(dec_i0_match_data[3], 28, 28) @[el2_lib.scala 197:88] + node _T_1129 = eq(_T_1127, _T_1128) @[el2_lib.scala 197:80] + node _T_1130 = mux(_T_1126, UInt<1>("h01"), _T_1129) @[el2_lib.scala 197:25] + _T_927[28] <= _T_1130 @[el2_lib.scala 197:19] + node _T_1131 = bits(io.trigger_pkt_any[3].tdata2, 28, 0) @[el2_lib.scala 197:30] + node _T_1132 = andr(_T_1131) @[el2_lib.scala 197:38] + node _T_1133 = and(_T_1132, _T_930) @[el2_lib.scala 197:43] + node _T_1134 = bits(io.trigger_pkt_any[3].tdata2, 29, 29) @[el2_lib.scala 197:76] + node _T_1135 = bits(dec_i0_match_data[3], 29, 29) @[el2_lib.scala 197:88] + node _T_1136 = eq(_T_1134, _T_1135) @[el2_lib.scala 197:80] + node _T_1137 = mux(_T_1133, UInt<1>("h01"), _T_1136) @[el2_lib.scala 197:25] + _T_927[29] <= _T_1137 @[el2_lib.scala 197:19] + node _T_1138 = bits(io.trigger_pkt_any[3].tdata2, 29, 0) @[el2_lib.scala 197:30] + node _T_1139 = andr(_T_1138) @[el2_lib.scala 197:38] + node _T_1140 = and(_T_1139, _T_930) @[el2_lib.scala 197:43] + node _T_1141 = bits(io.trigger_pkt_any[3].tdata2, 30, 30) @[el2_lib.scala 197:76] + node _T_1142 = bits(dec_i0_match_data[3], 30, 30) @[el2_lib.scala 197:88] + node _T_1143 = eq(_T_1141, _T_1142) @[el2_lib.scala 197:80] + node _T_1144 = mux(_T_1140, UInt<1>("h01"), _T_1143) @[el2_lib.scala 197:25] + _T_927[30] <= _T_1144 @[el2_lib.scala 197:19] + node _T_1145 = bits(io.trigger_pkt_any[3].tdata2, 30, 0) @[el2_lib.scala 197:30] + node _T_1146 = andr(_T_1145) @[el2_lib.scala 197:38] + node _T_1147 = and(_T_1146, _T_930) @[el2_lib.scala 197:43] + node _T_1148 = bits(io.trigger_pkt_any[3].tdata2, 31, 31) @[el2_lib.scala 197:76] + node _T_1149 = bits(dec_i0_match_data[3], 31, 31) @[el2_lib.scala 197:88] + node _T_1150 = eq(_T_1148, _T_1149) @[el2_lib.scala 197:80] + node _T_1151 = mux(_T_1147, UInt<1>("h01"), _T_1150) @[el2_lib.scala 197:25] + _T_927[31] <= _T_1151 @[el2_lib.scala 197:19] + node _T_1152 = and(_T_927[0], _T_927[1]) @[el2_lib.scala 198:22] + node _T_1153 = and(_T_1152, _T_927[2]) @[el2_lib.scala 198:22] + node _T_1154 = and(_T_1153, _T_927[3]) @[el2_lib.scala 198:22] + node _T_1155 = and(_T_1154, _T_927[4]) @[el2_lib.scala 198:22] + node _T_1156 = and(_T_1155, _T_927[5]) @[el2_lib.scala 198:22] + node _T_1157 = and(_T_1156, _T_927[6]) @[el2_lib.scala 198:22] + node _T_1158 = and(_T_1157, _T_927[7]) @[el2_lib.scala 198:22] + node _T_1159 = and(_T_1158, _T_927[8]) @[el2_lib.scala 198:22] + node _T_1160 = and(_T_1159, _T_927[9]) @[el2_lib.scala 198:22] + node _T_1161 = and(_T_1160, _T_927[10]) @[el2_lib.scala 198:22] + node _T_1162 = and(_T_1161, _T_927[11]) @[el2_lib.scala 198:22] + node _T_1163 = and(_T_1162, _T_927[12]) @[el2_lib.scala 198:22] + node _T_1164 = and(_T_1163, _T_927[13]) @[el2_lib.scala 198:22] + node _T_1165 = and(_T_1164, _T_927[14]) @[el2_lib.scala 198:22] + node _T_1166 = and(_T_1165, _T_927[15]) @[el2_lib.scala 198:22] + node _T_1167 = and(_T_1166, _T_927[16]) @[el2_lib.scala 198:22] + node _T_1168 = and(_T_1167, _T_927[17]) @[el2_lib.scala 198:22] + node _T_1169 = and(_T_1168, _T_927[18]) @[el2_lib.scala 198:22] + node _T_1170 = and(_T_1169, _T_927[19]) @[el2_lib.scala 198:22] + node _T_1171 = and(_T_1170, _T_927[20]) @[el2_lib.scala 198:22] + node _T_1172 = and(_T_1171, _T_927[21]) @[el2_lib.scala 198:22] + node _T_1173 = and(_T_1172, _T_927[22]) @[el2_lib.scala 198:22] + node _T_1174 = and(_T_1173, _T_927[23]) @[el2_lib.scala 198:22] + node _T_1175 = and(_T_1174, _T_927[24]) @[el2_lib.scala 198:22] + node _T_1176 = and(_T_1175, _T_927[25]) @[el2_lib.scala 198:22] + node _T_1177 = and(_T_1176, _T_927[26]) @[el2_lib.scala 198:22] + node _T_1178 = and(_T_1177, _T_927[27]) @[el2_lib.scala 198:22] + node _T_1179 = and(_T_1178, _T_927[28]) @[el2_lib.scala 198:22] + node _T_1180 = and(_T_1179, _T_927[29]) @[el2_lib.scala 198:22] + node _T_1181 = and(_T_1180, _T_927[30]) @[el2_lib.scala 198:22] + node _T_1182 = and(_T_1181, _T_927[31]) @[el2_lib.scala 198:22] + node _T_1183 = and(_T_925, _T_1182) @[el2_lsu_trigger.scala 16:109] + node _T_1184 = cat(_T_1183, _T_924) @[Cat.scala 29:58] + node _T_1185 = cat(_T_1184, _T_665) @[Cat.scala 29:58] + node _T_1186 = cat(_T_1185, _T_406) @[Cat.scala 29:58] + io.dec_i0_trigger_match_d <= _T_1186 @[el2_lsu_trigger.scala 16:29] + diff --git a/el2_dec_trigger.v b/el2_dec_trigger.v new file mode 100644 index 00000000..b97ba28e --- /dev/null +++ b/el2_dec_trigger.v @@ -0,0 +1,717 @@ +module el2_dec_trigger( + input clock, + input reset, + input io_trigger_pkt_any_0_select, + input io_trigger_pkt_any_0_match_, + input io_trigger_pkt_any_0_store, + input io_trigger_pkt_any_0_load, + input io_trigger_pkt_any_0_execute, + input io_trigger_pkt_any_0_m, + input [31:0] io_trigger_pkt_any_0_tdata2, + input io_trigger_pkt_any_1_select, + input io_trigger_pkt_any_1_match_, + input io_trigger_pkt_any_1_store, + input io_trigger_pkt_any_1_load, + input io_trigger_pkt_any_1_execute, + input io_trigger_pkt_any_1_m, + input [31:0] io_trigger_pkt_any_1_tdata2, + input io_trigger_pkt_any_2_select, + input io_trigger_pkt_any_2_match_, + input io_trigger_pkt_any_2_store, + input io_trigger_pkt_any_2_load, + input io_trigger_pkt_any_2_execute, + input io_trigger_pkt_any_2_m, + input [31:0] io_trigger_pkt_any_2_tdata2, + input io_trigger_pkt_any_3_select, + input io_trigger_pkt_any_3_match_, + input io_trigger_pkt_any_3_store, + input io_trigger_pkt_any_3_load, + input io_trigger_pkt_any_3_execute, + input io_trigger_pkt_any_3_m, + input [31:0] io_trigger_pkt_any_3_tdata2, + input [30:0] io_dec_i0_pc_d, + output [3:0] io_dec_i0_trigger_match_d +); + wire _T = ~io_trigger_pkt_any_0_select; // @[el2_lsu_trigger.scala 15:63] + wire _T_1 = _T & io_trigger_pkt_any_0_execute; // @[el2_lsu_trigger.scala 15:93] + wire [9:0] _T_11 = {_T_1,_T_1,_T_1,_T_1,_T_1,_T_1,_T_1,_T_1,_T_1,_T_1}; // @[Cat.scala 29:58] + wire [18:0] _T_20 = {_T_11,_T_1,_T_1,_T_1,_T_1,_T_1,_T_1,_T_1,_T_1,_T_1}; // @[Cat.scala 29:58] + wire [27:0] _T_29 = {_T_20,_T_1,_T_1,_T_1,_T_1,_T_1,_T_1,_T_1,_T_1,_T_1}; // @[Cat.scala 29:58] + wire [31:0] _T_33 = {_T_29,_T_1,_T_1,_T_1,_T_1}; // @[Cat.scala 29:58] + wire [31:0] _T_35 = {io_dec_i0_pc_d,io_trigger_pkt_any_0_tdata2[0]}; // @[Cat.scala 29:58] + wire [31:0] dec_i0_match_data_0 = _T_33 & _T_35; // @[el2_lsu_trigger.scala 15:127] + wire _T_37 = ~io_trigger_pkt_any_1_select; // @[el2_lsu_trigger.scala 15:63] + wire _T_38 = _T_37 & io_trigger_pkt_any_1_execute; // @[el2_lsu_trigger.scala 15:93] + wire [9:0] _T_48 = {_T_38,_T_38,_T_38,_T_38,_T_38,_T_38,_T_38,_T_38,_T_38,_T_38}; // @[Cat.scala 29:58] + wire [18:0] _T_57 = {_T_48,_T_38,_T_38,_T_38,_T_38,_T_38,_T_38,_T_38,_T_38,_T_38}; // @[Cat.scala 29:58] + wire [27:0] _T_66 = {_T_57,_T_38,_T_38,_T_38,_T_38,_T_38,_T_38,_T_38,_T_38,_T_38}; // @[Cat.scala 29:58] + wire [31:0] _T_70 = {_T_66,_T_38,_T_38,_T_38,_T_38}; // @[Cat.scala 29:58] + wire [31:0] _T_72 = {io_dec_i0_pc_d,io_trigger_pkt_any_1_tdata2[0]}; // @[Cat.scala 29:58] + wire [31:0] dec_i0_match_data_1 = _T_70 & _T_72; // @[el2_lsu_trigger.scala 15:127] + wire _T_74 = ~io_trigger_pkt_any_2_select; // @[el2_lsu_trigger.scala 15:63] + wire _T_75 = _T_74 & io_trigger_pkt_any_2_execute; // @[el2_lsu_trigger.scala 15:93] + wire [9:0] _T_85 = {_T_75,_T_75,_T_75,_T_75,_T_75,_T_75,_T_75,_T_75,_T_75,_T_75}; // @[Cat.scala 29:58] + wire [18:0] _T_94 = {_T_85,_T_75,_T_75,_T_75,_T_75,_T_75,_T_75,_T_75,_T_75,_T_75}; // @[Cat.scala 29:58] + wire [27:0] _T_103 = {_T_94,_T_75,_T_75,_T_75,_T_75,_T_75,_T_75,_T_75,_T_75,_T_75}; // @[Cat.scala 29:58] + wire [31:0] _T_107 = {_T_103,_T_75,_T_75,_T_75,_T_75}; // @[Cat.scala 29:58] + wire [31:0] _T_109 = {io_dec_i0_pc_d,io_trigger_pkt_any_2_tdata2[0]}; // @[Cat.scala 29:58] + wire [31:0] dec_i0_match_data_2 = _T_107 & _T_109; // @[el2_lsu_trigger.scala 15:127] + wire _T_111 = ~io_trigger_pkt_any_3_select; // @[el2_lsu_trigger.scala 15:63] + wire _T_112 = _T_111 & io_trigger_pkt_any_3_execute; // @[el2_lsu_trigger.scala 15:93] + wire [9:0] _T_122 = {_T_112,_T_112,_T_112,_T_112,_T_112,_T_112,_T_112,_T_112,_T_112,_T_112}; // @[Cat.scala 29:58] + wire [18:0] _T_131 = {_T_122,_T_112,_T_112,_T_112,_T_112,_T_112,_T_112,_T_112,_T_112,_T_112}; // @[Cat.scala 29:58] + wire [27:0] _T_140 = {_T_131,_T_112,_T_112,_T_112,_T_112,_T_112,_T_112,_T_112,_T_112,_T_112}; // @[Cat.scala 29:58] + wire [31:0] _T_144 = {_T_140,_T_112,_T_112,_T_112,_T_112}; // @[Cat.scala 29:58] + wire [31:0] _T_146 = {io_dec_i0_pc_d,io_trigger_pkt_any_3_tdata2[0]}; // @[Cat.scala 29:58] + wire [31:0] dec_i0_match_data_3 = _T_144 & _T_146; // @[el2_lsu_trigger.scala 15:127] + wire _T_148 = io_trigger_pkt_any_0_execute & io_trigger_pkt_any_0_m; // @[el2_lsu_trigger.scala 16:83] + wire _T_151 = &io_trigger_pkt_any_0_tdata2; // @[el2_lib.scala 194:45] + wire _T_152 = ~_T_151; // @[el2_lib.scala 194:39] + wire _T_153 = io_trigger_pkt_any_0_match_ & _T_152; // @[el2_lib.scala 194:37] + wire _T_156 = io_trigger_pkt_any_0_tdata2[0] == dec_i0_match_data_0[0]; // @[el2_lib.scala 195:52] + wire _T_157 = _T_153 | _T_156; // @[el2_lib.scala 195:41] + wire _T_159 = &io_trigger_pkt_any_0_tdata2[0]; // @[el2_lib.scala 197:38] + wire _T_160 = _T_159 & _T_153; // @[el2_lib.scala 197:43] + wire _T_163 = io_trigger_pkt_any_0_tdata2[1] == dec_i0_match_data_0[1]; // @[el2_lib.scala 197:80] + wire _T_164 = _T_160 | _T_163; // @[el2_lib.scala 197:25] + wire _T_166 = &io_trigger_pkt_any_0_tdata2[1:0]; // @[el2_lib.scala 197:38] + wire _T_167 = _T_166 & _T_153; // @[el2_lib.scala 197:43] + wire _T_170 = io_trigger_pkt_any_0_tdata2[2] == dec_i0_match_data_0[2]; // @[el2_lib.scala 197:80] + wire _T_171 = _T_167 | _T_170; // @[el2_lib.scala 197:25] + wire _T_173 = &io_trigger_pkt_any_0_tdata2[2:0]; // @[el2_lib.scala 197:38] + wire _T_174 = _T_173 & _T_153; // @[el2_lib.scala 197:43] + wire _T_177 = io_trigger_pkt_any_0_tdata2[3] == dec_i0_match_data_0[3]; // @[el2_lib.scala 197:80] + wire _T_178 = _T_174 | _T_177; // @[el2_lib.scala 197:25] + wire _T_180 = &io_trigger_pkt_any_0_tdata2[3:0]; // @[el2_lib.scala 197:38] + wire _T_181 = _T_180 & _T_153; // @[el2_lib.scala 197:43] + wire _T_184 = io_trigger_pkt_any_0_tdata2[4] == dec_i0_match_data_0[4]; // @[el2_lib.scala 197:80] + wire _T_185 = _T_181 | _T_184; // @[el2_lib.scala 197:25] + wire _T_187 = &io_trigger_pkt_any_0_tdata2[4:0]; // @[el2_lib.scala 197:38] + wire _T_188 = _T_187 & _T_153; // @[el2_lib.scala 197:43] + wire _T_191 = io_trigger_pkt_any_0_tdata2[5] == dec_i0_match_data_0[5]; // @[el2_lib.scala 197:80] + wire _T_192 = _T_188 | _T_191; // @[el2_lib.scala 197:25] + wire _T_194 = &io_trigger_pkt_any_0_tdata2[5:0]; // @[el2_lib.scala 197:38] + wire _T_195 = _T_194 & _T_153; // @[el2_lib.scala 197:43] + wire _T_198 = io_trigger_pkt_any_0_tdata2[6] == dec_i0_match_data_0[6]; // @[el2_lib.scala 197:80] + wire _T_199 = _T_195 | _T_198; // @[el2_lib.scala 197:25] + wire _T_201 = &io_trigger_pkt_any_0_tdata2[6:0]; // @[el2_lib.scala 197:38] + wire _T_202 = _T_201 & _T_153; // @[el2_lib.scala 197:43] + wire _T_205 = io_trigger_pkt_any_0_tdata2[7] == dec_i0_match_data_0[7]; // @[el2_lib.scala 197:80] + wire _T_206 = _T_202 | _T_205; // @[el2_lib.scala 197:25] + wire _T_208 = &io_trigger_pkt_any_0_tdata2[7:0]; // @[el2_lib.scala 197:38] + wire _T_209 = _T_208 & _T_153; // @[el2_lib.scala 197:43] + wire _T_212 = io_trigger_pkt_any_0_tdata2[8] == dec_i0_match_data_0[8]; // @[el2_lib.scala 197:80] + wire _T_213 = _T_209 | _T_212; // @[el2_lib.scala 197:25] + wire _T_215 = &io_trigger_pkt_any_0_tdata2[8:0]; // @[el2_lib.scala 197:38] + wire _T_216 = _T_215 & _T_153; // @[el2_lib.scala 197:43] + wire _T_219 = io_trigger_pkt_any_0_tdata2[9] == dec_i0_match_data_0[9]; // @[el2_lib.scala 197:80] + wire _T_220 = _T_216 | _T_219; // @[el2_lib.scala 197:25] + wire _T_222 = &io_trigger_pkt_any_0_tdata2[9:0]; // @[el2_lib.scala 197:38] + wire _T_223 = _T_222 & _T_153; // @[el2_lib.scala 197:43] + wire _T_226 = io_trigger_pkt_any_0_tdata2[10] == dec_i0_match_data_0[10]; // @[el2_lib.scala 197:80] + wire _T_227 = _T_223 | _T_226; // @[el2_lib.scala 197:25] + wire _T_229 = &io_trigger_pkt_any_0_tdata2[10:0]; // @[el2_lib.scala 197:38] + wire _T_230 = _T_229 & _T_153; // @[el2_lib.scala 197:43] + wire _T_233 = io_trigger_pkt_any_0_tdata2[11] == dec_i0_match_data_0[11]; // @[el2_lib.scala 197:80] + wire _T_234 = _T_230 | _T_233; // @[el2_lib.scala 197:25] + wire _T_236 = &io_trigger_pkt_any_0_tdata2[11:0]; // @[el2_lib.scala 197:38] + wire _T_237 = _T_236 & _T_153; // @[el2_lib.scala 197:43] + wire _T_240 = io_trigger_pkt_any_0_tdata2[12] == dec_i0_match_data_0[12]; // @[el2_lib.scala 197:80] + wire _T_241 = _T_237 | _T_240; // @[el2_lib.scala 197:25] + wire _T_243 = &io_trigger_pkt_any_0_tdata2[12:0]; // @[el2_lib.scala 197:38] + wire _T_244 = _T_243 & _T_153; // @[el2_lib.scala 197:43] + wire _T_247 = io_trigger_pkt_any_0_tdata2[13] == dec_i0_match_data_0[13]; // @[el2_lib.scala 197:80] + wire _T_248 = _T_244 | _T_247; // @[el2_lib.scala 197:25] + wire _T_250 = &io_trigger_pkt_any_0_tdata2[13:0]; // @[el2_lib.scala 197:38] + wire _T_251 = _T_250 & _T_153; // @[el2_lib.scala 197:43] + wire _T_254 = io_trigger_pkt_any_0_tdata2[14] == dec_i0_match_data_0[14]; // @[el2_lib.scala 197:80] + wire _T_255 = _T_251 | _T_254; // @[el2_lib.scala 197:25] + wire _T_257 = &io_trigger_pkt_any_0_tdata2[14:0]; // @[el2_lib.scala 197:38] + wire _T_258 = _T_257 & _T_153; // @[el2_lib.scala 197:43] + wire _T_261 = io_trigger_pkt_any_0_tdata2[15] == dec_i0_match_data_0[15]; // @[el2_lib.scala 197:80] + wire _T_262 = _T_258 | _T_261; // @[el2_lib.scala 197:25] + wire _T_264 = &io_trigger_pkt_any_0_tdata2[15:0]; // @[el2_lib.scala 197:38] + wire _T_265 = _T_264 & _T_153; // @[el2_lib.scala 197:43] + wire _T_268 = io_trigger_pkt_any_0_tdata2[16] == dec_i0_match_data_0[16]; // @[el2_lib.scala 197:80] + wire _T_269 = _T_265 | _T_268; // @[el2_lib.scala 197:25] + wire _T_271 = &io_trigger_pkt_any_0_tdata2[16:0]; // @[el2_lib.scala 197:38] + wire _T_272 = _T_271 & _T_153; // @[el2_lib.scala 197:43] + wire _T_275 = io_trigger_pkt_any_0_tdata2[17] == dec_i0_match_data_0[17]; // @[el2_lib.scala 197:80] + wire _T_276 = _T_272 | _T_275; // @[el2_lib.scala 197:25] + wire _T_278 = &io_trigger_pkt_any_0_tdata2[17:0]; // @[el2_lib.scala 197:38] + wire _T_279 = _T_278 & _T_153; // @[el2_lib.scala 197:43] + wire _T_282 = io_trigger_pkt_any_0_tdata2[18] == dec_i0_match_data_0[18]; // @[el2_lib.scala 197:80] + wire _T_283 = _T_279 | _T_282; // @[el2_lib.scala 197:25] + wire _T_285 = &io_trigger_pkt_any_0_tdata2[18:0]; // @[el2_lib.scala 197:38] + wire _T_286 = _T_285 & _T_153; // @[el2_lib.scala 197:43] + wire _T_289 = io_trigger_pkt_any_0_tdata2[19] == dec_i0_match_data_0[19]; // @[el2_lib.scala 197:80] + wire _T_290 = _T_286 | _T_289; // @[el2_lib.scala 197:25] + wire _T_292 = &io_trigger_pkt_any_0_tdata2[19:0]; // @[el2_lib.scala 197:38] + wire _T_293 = _T_292 & _T_153; // @[el2_lib.scala 197:43] + wire _T_296 = io_trigger_pkt_any_0_tdata2[20] == dec_i0_match_data_0[20]; // @[el2_lib.scala 197:80] + wire _T_297 = _T_293 | _T_296; // @[el2_lib.scala 197:25] + wire _T_299 = &io_trigger_pkt_any_0_tdata2[20:0]; // @[el2_lib.scala 197:38] + wire _T_300 = _T_299 & _T_153; // @[el2_lib.scala 197:43] + wire _T_303 = io_trigger_pkt_any_0_tdata2[21] == dec_i0_match_data_0[21]; // @[el2_lib.scala 197:80] + wire _T_304 = _T_300 | _T_303; // @[el2_lib.scala 197:25] + wire _T_306 = &io_trigger_pkt_any_0_tdata2[21:0]; // @[el2_lib.scala 197:38] + wire _T_307 = _T_306 & _T_153; // @[el2_lib.scala 197:43] + wire _T_310 = io_trigger_pkt_any_0_tdata2[22] == dec_i0_match_data_0[22]; // @[el2_lib.scala 197:80] + wire _T_311 = _T_307 | _T_310; // @[el2_lib.scala 197:25] + wire _T_313 = &io_trigger_pkt_any_0_tdata2[22:0]; // @[el2_lib.scala 197:38] + wire _T_314 = _T_313 & _T_153; // @[el2_lib.scala 197:43] + wire _T_317 = io_trigger_pkt_any_0_tdata2[23] == dec_i0_match_data_0[23]; // @[el2_lib.scala 197:80] + wire _T_318 = _T_314 | _T_317; // @[el2_lib.scala 197:25] + wire _T_320 = &io_trigger_pkt_any_0_tdata2[23:0]; // @[el2_lib.scala 197:38] + wire _T_321 = _T_320 & _T_153; // @[el2_lib.scala 197:43] + wire _T_324 = io_trigger_pkt_any_0_tdata2[24] == dec_i0_match_data_0[24]; // @[el2_lib.scala 197:80] + wire _T_325 = _T_321 | _T_324; // @[el2_lib.scala 197:25] + wire _T_327 = &io_trigger_pkt_any_0_tdata2[24:0]; // @[el2_lib.scala 197:38] + wire _T_328 = _T_327 & _T_153; // @[el2_lib.scala 197:43] + wire _T_331 = io_trigger_pkt_any_0_tdata2[25] == dec_i0_match_data_0[25]; // @[el2_lib.scala 197:80] + wire _T_332 = _T_328 | _T_331; // @[el2_lib.scala 197:25] + wire _T_334 = &io_trigger_pkt_any_0_tdata2[25:0]; // @[el2_lib.scala 197:38] + wire _T_335 = _T_334 & _T_153; // @[el2_lib.scala 197:43] + wire _T_338 = io_trigger_pkt_any_0_tdata2[26] == dec_i0_match_data_0[26]; // @[el2_lib.scala 197:80] + wire _T_339 = _T_335 | _T_338; // @[el2_lib.scala 197:25] + wire _T_341 = &io_trigger_pkt_any_0_tdata2[26:0]; // @[el2_lib.scala 197:38] + wire _T_342 = _T_341 & _T_153; // @[el2_lib.scala 197:43] + wire _T_345 = io_trigger_pkt_any_0_tdata2[27] == dec_i0_match_data_0[27]; // @[el2_lib.scala 197:80] + wire _T_346 = _T_342 | _T_345; // @[el2_lib.scala 197:25] + wire _T_348 = &io_trigger_pkt_any_0_tdata2[27:0]; // @[el2_lib.scala 197:38] + wire _T_349 = _T_348 & _T_153; // @[el2_lib.scala 197:43] + wire _T_352 = io_trigger_pkt_any_0_tdata2[28] == dec_i0_match_data_0[28]; // @[el2_lib.scala 197:80] + wire _T_353 = _T_349 | _T_352; // @[el2_lib.scala 197:25] + wire _T_355 = &io_trigger_pkt_any_0_tdata2[28:0]; // @[el2_lib.scala 197:38] + wire _T_356 = _T_355 & _T_153; // @[el2_lib.scala 197:43] + wire _T_359 = io_trigger_pkt_any_0_tdata2[29] == dec_i0_match_data_0[29]; // @[el2_lib.scala 197:80] + wire _T_360 = _T_356 | _T_359; // @[el2_lib.scala 197:25] + wire _T_362 = &io_trigger_pkt_any_0_tdata2[29:0]; // @[el2_lib.scala 197:38] + wire _T_363 = _T_362 & _T_153; // @[el2_lib.scala 197:43] + wire _T_366 = io_trigger_pkt_any_0_tdata2[30] == dec_i0_match_data_0[30]; // @[el2_lib.scala 197:80] + wire _T_367 = _T_363 | _T_366; // @[el2_lib.scala 197:25] + wire _T_369 = &io_trigger_pkt_any_0_tdata2[30:0]; // @[el2_lib.scala 197:38] + wire _T_370 = _T_369 & _T_153; // @[el2_lib.scala 197:43] + wire _T_373 = io_trigger_pkt_any_0_tdata2[31] == dec_i0_match_data_0[31]; // @[el2_lib.scala 197:80] + wire _T_374 = _T_370 | _T_373; // @[el2_lib.scala 197:25] + wire _T_375 = _T_157 & _T_164; // @[el2_lib.scala 198:22] + wire _T_376 = _T_375 & _T_171; // @[el2_lib.scala 198:22] + wire _T_377 = _T_376 & _T_178; // @[el2_lib.scala 198:22] + wire _T_378 = _T_377 & _T_185; // @[el2_lib.scala 198:22] + wire _T_379 = _T_378 & _T_192; // @[el2_lib.scala 198:22] + wire _T_380 = _T_379 & _T_199; // @[el2_lib.scala 198:22] + wire _T_381 = _T_380 & _T_206; // @[el2_lib.scala 198:22] + wire _T_382 = _T_381 & _T_213; // @[el2_lib.scala 198:22] + wire _T_383 = _T_382 & _T_220; // @[el2_lib.scala 198:22] + wire _T_384 = _T_383 & _T_227; // @[el2_lib.scala 198:22] + wire _T_385 = _T_384 & _T_234; // @[el2_lib.scala 198:22] + wire _T_386 = _T_385 & _T_241; // @[el2_lib.scala 198:22] + wire _T_387 = _T_386 & _T_248; // @[el2_lib.scala 198:22] + wire _T_388 = _T_387 & _T_255; // @[el2_lib.scala 198:22] + wire _T_389 = _T_388 & _T_262; // @[el2_lib.scala 198:22] + wire _T_390 = _T_389 & _T_269; // @[el2_lib.scala 198:22] + wire _T_391 = _T_390 & _T_276; // @[el2_lib.scala 198:22] + wire _T_392 = _T_391 & _T_283; // @[el2_lib.scala 198:22] + wire _T_393 = _T_392 & _T_290; // @[el2_lib.scala 198:22] + wire _T_394 = _T_393 & _T_297; // @[el2_lib.scala 198:22] + wire _T_395 = _T_394 & _T_304; // @[el2_lib.scala 198:22] + wire _T_396 = _T_395 & _T_311; // @[el2_lib.scala 198:22] + wire _T_397 = _T_396 & _T_318; // @[el2_lib.scala 198:22] + wire _T_398 = _T_397 & _T_325; // @[el2_lib.scala 198:22] + wire _T_399 = _T_398 & _T_332; // @[el2_lib.scala 198:22] + wire _T_400 = _T_399 & _T_339; // @[el2_lib.scala 198:22] + wire _T_401 = _T_400 & _T_346; // @[el2_lib.scala 198:22] + wire _T_402 = _T_401 & _T_353; // @[el2_lib.scala 198:22] + wire _T_403 = _T_402 & _T_360; // @[el2_lib.scala 198:22] + wire _T_404 = _T_403 & _T_367; // @[el2_lib.scala 198:22] + wire _T_405 = _T_404 & _T_374; // @[el2_lib.scala 198:22] + wire _T_406 = _T_148 & _T_405; // @[el2_lsu_trigger.scala 16:109] + wire _T_407 = io_trigger_pkt_any_1_execute & io_trigger_pkt_any_1_m; // @[el2_lsu_trigger.scala 16:83] + wire _T_410 = &io_trigger_pkt_any_1_tdata2; // @[el2_lib.scala 194:45] + wire _T_411 = ~_T_410; // @[el2_lib.scala 194:39] + wire _T_412 = io_trigger_pkt_any_1_match_ & _T_411; // @[el2_lib.scala 194:37] + wire _T_415 = io_trigger_pkt_any_1_tdata2[0] == dec_i0_match_data_1[0]; // @[el2_lib.scala 195:52] + wire _T_416 = _T_412 | _T_415; // @[el2_lib.scala 195:41] + wire _T_418 = &io_trigger_pkt_any_1_tdata2[0]; // @[el2_lib.scala 197:38] + wire _T_419 = _T_418 & _T_412; // @[el2_lib.scala 197:43] + wire _T_422 = io_trigger_pkt_any_1_tdata2[1] == dec_i0_match_data_1[1]; // @[el2_lib.scala 197:80] + wire _T_423 = _T_419 | _T_422; // @[el2_lib.scala 197:25] + wire _T_425 = &io_trigger_pkt_any_1_tdata2[1:0]; // @[el2_lib.scala 197:38] + wire _T_426 = _T_425 & _T_412; // @[el2_lib.scala 197:43] + wire _T_429 = io_trigger_pkt_any_1_tdata2[2] == dec_i0_match_data_1[2]; // @[el2_lib.scala 197:80] + wire _T_430 = _T_426 | _T_429; // @[el2_lib.scala 197:25] + wire _T_432 = &io_trigger_pkt_any_1_tdata2[2:0]; // @[el2_lib.scala 197:38] + wire _T_433 = _T_432 & _T_412; // @[el2_lib.scala 197:43] + wire _T_436 = io_trigger_pkt_any_1_tdata2[3] == dec_i0_match_data_1[3]; // @[el2_lib.scala 197:80] + wire _T_437 = _T_433 | _T_436; // @[el2_lib.scala 197:25] + wire _T_439 = &io_trigger_pkt_any_1_tdata2[3:0]; // @[el2_lib.scala 197:38] + wire _T_440 = _T_439 & _T_412; // @[el2_lib.scala 197:43] + wire _T_443 = io_trigger_pkt_any_1_tdata2[4] == dec_i0_match_data_1[4]; // @[el2_lib.scala 197:80] + wire _T_444 = _T_440 | _T_443; // @[el2_lib.scala 197:25] + wire _T_446 = &io_trigger_pkt_any_1_tdata2[4:0]; // @[el2_lib.scala 197:38] + wire _T_447 = _T_446 & _T_412; // @[el2_lib.scala 197:43] + wire _T_450 = io_trigger_pkt_any_1_tdata2[5] == dec_i0_match_data_1[5]; // @[el2_lib.scala 197:80] + wire _T_451 = _T_447 | _T_450; // @[el2_lib.scala 197:25] + wire _T_453 = &io_trigger_pkt_any_1_tdata2[5:0]; // @[el2_lib.scala 197:38] + wire _T_454 = _T_453 & _T_412; // @[el2_lib.scala 197:43] + wire _T_457 = io_trigger_pkt_any_1_tdata2[6] == dec_i0_match_data_1[6]; // @[el2_lib.scala 197:80] + wire _T_458 = _T_454 | _T_457; // @[el2_lib.scala 197:25] + wire _T_460 = &io_trigger_pkt_any_1_tdata2[6:0]; // @[el2_lib.scala 197:38] + wire _T_461 = _T_460 & _T_412; // @[el2_lib.scala 197:43] + wire _T_464 = io_trigger_pkt_any_1_tdata2[7] == dec_i0_match_data_1[7]; // @[el2_lib.scala 197:80] + wire _T_465 = _T_461 | _T_464; // @[el2_lib.scala 197:25] + wire _T_467 = &io_trigger_pkt_any_1_tdata2[7:0]; // @[el2_lib.scala 197:38] + wire _T_468 = _T_467 & _T_412; // @[el2_lib.scala 197:43] + wire _T_471 = io_trigger_pkt_any_1_tdata2[8] == dec_i0_match_data_1[8]; // @[el2_lib.scala 197:80] + wire _T_472 = _T_468 | _T_471; // @[el2_lib.scala 197:25] + wire _T_474 = &io_trigger_pkt_any_1_tdata2[8:0]; // @[el2_lib.scala 197:38] + wire _T_475 = _T_474 & _T_412; // @[el2_lib.scala 197:43] + wire _T_478 = io_trigger_pkt_any_1_tdata2[9] == dec_i0_match_data_1[9]; // @[el2_lib.scala 197:80] + wire _T_479 = _T_475 | _T_478; // @[el2_lib.scala 197:25] + wire _T_481 = &io_trigger_pkt_any_1_tdata2[9:0]; // @[el2_lib.scala 197:38] + wire _T_482 = _T_481 & _T_412; // @[el2_lib.scala 197:43] + wire _T_485 = io_trigger_pkt_any_1_tdata2[10] == dec_i0_match_data_1[10]; // @[el2_lib.scala 197:80] + wire _T_486 = _T_482 | _T_485; // @[el2_lib.scala 197:25] + wire _T_488 = &io_trigger_pkt_any_1_tdata2[10:0]; // @[el2_lib.scala 197:38] + wire _T_489 = _T_488 & _T_412; // @[el2_lib.scala 197:43] + wire _T_492 = io_trigger_pkt_any_1_tdata2[11] == dec_i0_match_data_1[11]; // @[el2_lib.scala 197:80] + wire _T_493 = _T_489 | _T_492; // @[el2_lib.scala 197:25] + wire _T_495 = &io_trigger_pkt_any_1_tdata2[11:0]; // @[el2_lib.scala 197:38] + wire _T_496 = _T_495 & _T_412; // @[el2_lib.scala 197:43] + wire _T_499 = io_trigger_pkt_any_1_tdata2[12] == dec_i0_match_data_1[12]; // @[el2_lib.scala 197:80] + wire _T_500 = _T_496 | _T_499; // @[el2_lib.scala 197:25] + wire _T_502 = &io_trigger_pkt_any_1_tdata2[12:0]; // @[el2_lib.scala 197:38] + wire _T_503 = _T_502 & _T_412; // @[el2_lib.scala 197:43] + wire _T_506 = io_trigger_pkt_any_1_tdata2[13] == dec_i0_match_data_1[13]; // @[el2_lib.scala 197:80] + wire _T_507 = _T_503 | _T_506; // @[el2_lib.scala 197:25] + wire _T_509 = &io_trigger_pkt_any_1_tdata2[13:0]; // @[el2_lib.scala 197:38] + wire _T_510 = _T_509 & _T_412; // @[el2_lib.scala 197:43] + wire _T_513 = io_trigger_pkt_any_1_tdata2[14] == dec_i0_match_data_1[14]; // @[el2_lib.scala 197:80] + wire _T_514 = _T_510 | _T_513; // @[el2_lib.scala 197:25] + wire _T_516 = &io_trigger_pkt_any_1_tdata2[14:0]; // @[el2_lib.scala 197:38] + wire _T_517 = _T_516 & _T_412; // @[el2_lib.scala 197:43] + wire _T_520 = io_trigger_pkt_any_1_tdata2[15] == dec_i0_match_data_1[15]; // @[el2_lib.scala 197:80] + wire _T_521 = _T_517 | _T_520; // @[el2_lib.scala 197:25] + wire _T_523 = &io_trigger_pkt_any_1_tdata2[15:0]; // @[el2_lib.scala 197:38] + wire _T_524 = _T_523 & _T_412; // @[el2_lib.scala 197:43] + wire _T_527 = io_trigger_pkt_any_1_tdata2[16] == dec_i0_match_data_1[16]; // @[el2_lib.scala 197:80] + wire _T_528 = _T_524 | _T_527; // @[el2_lib.scala 197:25] + wire _T_530 = &io_trigger_pkt_any_1_tdata2[16:0]; // @[el2_lib.scala 197:38] + wire _T_531 = _T_530 & _T_412; // @[el2_lib.scala 197:43] + wire _T_534 = io_trigger_pkt_any_1_tdata2[17] == dec_i0_match_data_1[17]; // @[el2_lib.scala 197:80] + wire _T_535 = _T_531 | _T_534; // @[el2_lib.scala 197:25] + wire _T_537 = &io_trigger_pkt_any_1_tdata2[17:0]; // @[el2_lib.scala 197:38] + wire _T_538 = _T_537 & _T_412; // @[el2_lib.scala 197:43] + wire _T_541 = io_trigger_pkt_any_1_tdata2[18] == dec_i0_match_data_1[18]; // @[el2_lib.scala 197:80] + wire _T_542 = _T_538 | _T_541; // @[el2_lib.scala 197:25] + wire _T_544 = &io_trigger_pkt_any_1_tdata2[18:0]; // @[el2_lib.scala 197:38] + wire _T_545 = _T_544 & _T_412; // @[el2_lib.scala 197:43] + wire _T_548 = io_trigger_pkt_any_1_tdata2[19] == dec_i0_match_data_1[19]; // @[el2_lib.scala 197:80] + wire _T_549 = _T_545 | _T_548; // @[el2_lib.scala 197:25] + wire _T_551 = &io_trigger_pkt_any_1_tdata2[19:0]; // @[el2_lib.scala 197:38] + wire _T_552 = _T_551 & _T_412; // @[el2_lib.scala 197:43] + wire _T_555 = io_trigger_pkt_any_1_tdata2[20] == dec_i0_match_data_1[20]; // @[el2_lib.scala 197:80] + wire _T_556 = _T_552 | _T_555; // @[el2_lib.scala 197:25] + wire _T_558 = &io_trigger_pkt_any_1_tdata2[20:0]; // @[el2_lib.scala 197:38] + wire _T_559 = _T_558 & _T_412; // @[el2_lib.scala 197:43] + wire _T_562 = io_trigger_pkt_any_1_tdata2[21] == dec_i0_match_data_1[21]; // @[el2_lib.scala 197:80] + wire _T_563 = _T_559 | _T_562; // @[el2_lib.scala 197:25] + wire _T_565 = &io_trigger_pkt_any_1_tdata2[21:0]; // @[el2_lib.scala 197:38] + wire _T_566 = _T_565 & _T_412; // @[el2_lib.scala 197:43] + wire _T_569 = io_trigger_pkt_any_1_tdata2[22] == dec_i0_match_data_1[22]; // @[el2_lib.scala 197:80] + wire _T_570 = _T_566 | _T_569; // @[el2_lib.scala 197:25] + wire _T_572 = &io_trigger_pkt_any_1_tdata2[22:0]; // @[el2_lib.scala 197:38] + wire _T_573 = _T_572 & _T_412; // @[el2_lib.scala 197:43] + wire _T_576 = io_trigger_pkt_any_1_tdata2[23] == dec_i0_match_data_1[23]; // @[el2_lib.scala 197:80] + wire _T_577 = _T_573 | _T_576; // @[el2_lib.scala 197:25] + wire _T_579 = &io_trigger_pkt_any_1_tdata2[23:0]; // @[el2_lib.scala 197:38] + wire _T_580 = _T_579 & _T_412; // @[el2_lib.scala 197:43] + wire _T_583 = io_trigger_pkt_any_1_tdata2[24] == dec_i0_match_data_1[24]; // @[el2_lib.scala 197:80] + wire _T_584 = _T_580 | _T_583; // @[el2_lib.scala 197:25] + wire _T_586 = &io_trigger_pkt_any_1_tdata2[24:0]; // @[el2_lib.scala 197:38] + wire _T_587 = _T_586 & _T_412; // @[el2_lib.scala 197:43] + wire _T_590 = io_trigger_pkt_any_1_tdata2[25] == dec_i0_match_data_1[25]; // @[el2_lib.scala 197:80] + wire _T_591 = _T_587 | _T_590; // @[el2_lib.scala 197:25] + wire _T_593 = &io_trigger_pkt_any_1_tdata2[25:0]; // @[el2_lib.scala 197:38] + wire _T_594 = _T_593 & _T_412; // @[el2_lib.scala 197:43] + wire _T_597 = io_trigger_pkt_any_1_tdata2[26] == dec_i0_match_data_1[26]; // @[el2_lib.scala 197:80] + wire _T_598 = _T_594 | _T_597; // @[el2_lib.scala 197:25] + wire _T_600 = &io_trigger_pkt_any_1_tdata2[26:0]; // @[el2_lib.scala 197:38] + wire _T_601 = _T_600 & _T_412; // @[el2_lib.scala 197:43] + wire _T_604 = io_trigger_pkt_any_1_tdata2[27] == dec_i0_match_data_1[27]; // @[el2_lib.scala 197:80] + wire _T_605 = _T_601 | _T_604; // @[el2_lib.scala 197:25] + wire _T_607 = &io_trigger_pkt_any_1_tdata2[27:0]; // @[el2_lib.scala 197:38] + wire _T_608 = _T_607 & _T_412; // @[el2_lib.scala 197:43] + wire _T_611 = io_trigger_pkt_any_1_tdata2[28] == dec_i0_match_data_1[28]; // @[el2_lib.scala 197:80] + wire _T_612 = _T_608 | _T_611; // @[el2_lib.scala 197:25] + wire _T_614 = &io_trigger_pkt_any_1_tdata2[28:0]; // @[el2_lib.scala 197:38] + wire _T_615 = _T_614 & _T_412; // @[el2_lib.scala 197:43] + wire _T_618 = io_trigger_pkt_any_1_tdata2[29] == dec_i0_match_data_1[29]; // @[el2_lib.scala 197:80] + wire _T_619 = _T_615 | _T_618; // @[el2_lib.scala 197:25] + wire _T_621 = &io_trigger_pkt_any_1_tdata2[29:0]; // @[el2_lib.scala 197:38] + wire _T_622 = _T_621 & _T_412; // @[el2_lib.scala 197:43] + wire _T_625 = io_trigger_pkt_any_1_tdata2[30] == dec_i0_match_data_1[30]; // @[el2_lib.scala 197:80] + wire _T_626 = _T_622 | _T_625; // @[el2_lib.scala 197:25] + wire _T_628 = &io_trigger_pkt_any_1_tdata2[30:0]; // @[el2_lib.scala 197:38] + wire _T_629 = _T_628 & _T_412; // @[el2_lib.scala 197:43] + wire _T_632 = io_trigger_pkt_any_1_tdata2[31] == dec_i0_match_data_1[31]; // @[el2_lib.scala 197:80] + wire _T_633 = _T_629 | _T_632; // @[el2_lib.scala 197:25] + wire _T_634 = _T_416 & _T_423; // @[el2_lib.scala 198:22] + wire _T_635 = _T_634 & _T_430; // @[el2_lib.scala 198:22] + wire _T_636 = _T_635 & _T_437; // @[el2_lib.scala 198:22] + wire _T_637 = _T_636 & _T_444; // @[el2_lib.scala 198:22] + wire _T_638 = _T_637 & _T_451; // @[el2_lib.scala 198:22] + wire _T_639 = _T_638 & _T_458; // @[el2_lib.scala 198:22] + wire _T_640 = _T_639 & _T_465; // @[el2_lib.scala 198:22] + wire _T_641 = _T_640 & _T_472; // @[el2_lib.scala 198:22] + wire _T_642 = _T_641 & _T_479; // @[el2_lib.scala 198:22] + wire _T_643 = _T_642 & _T_486; // @[el2_lib.scala 198:22] + wire _T_644 = _T_643 & _T_493; // @[el2_lib.scala 198:22] + wire _T_645 = _T_644 & _T_500; // @[el2_lib.scala 198:22] + wire _T_646 = _T_645 & _T_507; // @[el2_lib.scala 198:22] + wire _T_647 = _T_646 & _T_514; // @[el2_lib.scala 198:22] + wire _T_648 = _T_647 & _T_521; // @[el2_lib.scala 198:22] + wire _T_649 = _T_648 & _T_528; // @[el2_lib.scala 198:22] + wire _T_650 = _T_649 & _T_535; // @[el2_lib.scala 198:22] + wire _T_651 = _T_650 & _T_542; // @[el2_lib.scala 198:22] + wire _T_652 = _T_651 & _T_549; // @[el2_lib.scala 198:22] + wire _T_653 = _T_652 & _T_556; // @[el2_lib.scala 198:22] + wire _T_654 = _T_653 & _T_563; // @[el2_lib.scala 198:22] + wire _T_655 = _T_654 & _T_570; // @[el2_lib.scala 198:22] + wire _T_656 = _T_655 & _T_577; // @[el2_lib.scala 198:22] + wire _T_657 = _T_656 & _T_584; // @[el2_lib.scala 198:22] + wire _T_658 = _T_657 & _T_591; // @[el2_lib.scala 198:22] + wire _T_659 = _T_658 & _T_598; // @[el2_lib.scala 198:22] + wire _T_660 = _T_659 & _T_605; // @[el2_lib.scala 198:22] + wire _T_661 = _T_660 & _T_612; // @[el2_lib.scala 198:22] + wire _T_662 = _T_661 & _T_619; // @[el2_lib.scala 198:22] + wire _T_663 = _T_662 & _T_626; // @[el2_lib.scala 198:22] + wire _T_664 = _T_663 & _T_633; // @[el2_lib.scala 198:22] + wire _T_665 = _T_407 & _T_664; // @[el2_lsu_trigger.scala 16:109] + wire _T_666 = io_trigger_pkt_any_2_execute & io_trigger_pkt_any_2_m; // @[el2_lsu_trigger.scala 16:83] + wire _T_669 = &io_trigger_pkt_any_2_tdata2; // @[el2_lib.scala 194:45] + wire _T_670 = ~_T_669; // @[el2_lib.scala 194:39] + wire _T_671 = io_trigger_pkt_any_2_match_ & _T_670; // @[el2_lib.scala 194:37] + wire _T_674 = io_trigger_pkt_any_2_tdata2[0] == dec_i0_match_data_2[0]; // @[el2_lib.scala 195:52] + wire _T_675 = _T_671 | _T_674; // @[el2_lib.scala 195:41] + wire _T_677 = &io_trigger_pkt_any_2_tdata2[0]; // @[el2_lib.scala 197:38] + wire _T_678 = _T_677 & _T_671; // @[el2_lib.scala 197:43] + wire _T_681 = io_trigger_pkt_any_2_tdata2[1] == dec_i0_match_data_2[1]; // @[el2_lib.scala 197:80] + wire _T_682 = _T_678 | _T_681; // @[el2_lib.scala 197:25] + wire _T_684 = &io_trigger_pkt_any_2_tdata2[1:0]; // @[el2_lib.scala 197:38] + wire _T_685 = _T_684 & _T_671; // @[el2_lib.scala 197:43] + wire _T_688 = io_trigger_pkt_any_2_tdata2[2] == dec_i0_match_data_2[2]; // @[el2_lib.scala 197:80] + wire _T_689 = _T_685 | _T_688; // @[el2_lib.scala 197:25] + wire _T_691 = &io_trigger_pkt_any_2_tdata2[2:0]; // @[el2_lib.scala 197:38] + wire _T_692 = _T_691 & _T_671; // @[el2_lib.scala 197:43] + wire _T_695 = io_trigger_pkt_any_2_tdata2[3] == dec_i0_match_data_2[3]; // @[el2_lib.scala 197:80] + wire _T_696 = _T_692 | _T_695; // @[el2_lib.scala 197:25] + wire _T_698 = &io_trigger_pkt_any_2_tdata2[3:0]; // @[el2_lib.scala 197:38] + wire _T_699 = _T_698 & _T_671; // @[el2_lib.scala 197:43] + wire _T_702 = io_trigger_pkt_any_2_tdata2[4] == dec_i0_match_data_2[4]; // @[el2_lib.scala 197:80] + wire _T_703 = _T_699 | _T_702; // @[el2_lib.scala 197:25] + wire _T_705 = &io_trigger_pkt_any_2_tdata2[4:0]; // @[el2_lib.scala 197:38] + wire _T_706 = _T_705 & _T_671; // @[el2_lib.scala 197:43] + wire _T_709 = io_trigger_pkt_any_2_tdata2[5] == dec_i0_match_data_2[5]; // @[el2_lib.scala 197:80] + wire _T_710 = _T_706 | _T_709; // @[el2_lib.scala 197:25] + wire _T_712 = &io_trigger_pkt_any_2_tdata2[5:0]; // @[el2_lib.scala 197:38] + wire _T_713 = _T_712 & _T_671; // @[el2_lib.scala 197:43] + wire _T_716 = io_trigger_pkt_any_2_tdata2[6] == dec_i0_match_data_2[6]; // @[el2_lib.scala 197:80] + wire _T_717 = _T_713 | _T_716; // @[el2_lib.scala 197:25] + wire _T_719 = &io_trigger_pkt_any_2_tdata2[6:0]; // @[el2_lib.scala 197:38] + wire _T_720 = _T_719 & _T_671; // @[el2_lib.scala 197:43] + wire _T_723 = io_trigger_pkt_any_2_tdata2[7] == dec_i0_match_data_2[7]; // @[el2_lib.scala 197:80] + wire _T_724 = _T_720 | _T_723; // @[el2_lib.scala 197:25] + wire _T_726 = &io_trigger_pkt_any_2_tdata2[7:0]; // @[el2_lib.scala 197:38] + wire _T_727 = _T_726 & _T_671; // @[el2_lib.scala 197:43] + wire _T_730 = io_trigger_pkt_any_2_tdata2[8] == dec_i0_match_data_2[8]; // @[el2_lib.scala 197:80] + wire _T_731 = _T_727 | _T_730; // @[el2_lib.scala 197:25] + wire _T_733 = &io_trigger_pkt_any_2_tdata2[8:0]; // @[el2_lib.scala 197:38] + wire _T_734 = _T_733 & _T_671; // @[el2_lib.scala 197:43] + wire _T_737 = io_trigger_pkt_any_2_tdata2[9] == dec_i0_match_data_2[9]; // @[el2_lib.scala 197:80] + wire _T_738 = _T_734 | _T_737; // @[el2_lib.scala 197:25] + wire _T_740 = &io_trigger_pkt_any_2_tdata2[9:0]; // @[el2_lib.scala 197:38] + wire _T_741 = _T_740 & _T_671; // @[el2_lib.scala 197:43] + wire _T_744 = io_trigger_pkt_any_2_tdata2[10] == dec_i0_match_data_2[10]; // @[el2_lib.scala 197:80] + wire _T_745 = _T_741 | _T_744; // @[el2_lib.scala 197:25] + wire _T_747 = &io_trigger_pkt_any_2_tdata2[10:0]; // @[el2_lib.scala 197:38] + wire _T_748 = _T_747 & _T_671; // @[el2_lib.scala 197:43] + wire _T_751 = io_trigger_pkt_any_2_tdata2[11] == dec_i0_match_data_2[11]; // @[el2_lib.scala 197:80] + wire _T_752 = _T_748 | _T_751; // @[el2_lib.scala 197:25] + wire _T_754 = &io_trigger_pkt_any_2_tdata2[11:0]; // @[el2_lib.scala 197:38] + wire _T_755 = _T_754 & _T_671; // @[el2_lib.scala 197:43] + wire _T_758 = io_trigger_pkt_any_2_tdata2[12] == dec_i0_match_data_2[12]; // @[el2_lib.scala 197:80] + wire _T_759 = _T_755 | _T_758; // @[el2_lib.scala 197:25] + wire _T_761 = &io_trigger_pkt_any_2_tdata2[12:0]; // @[el2_lib.scala 197:38] + wire _T_762 = _T_761 & _T_671; // @[el2_lib.scala 197:43] + wire _T_765 = io_trigger_pkt_any_2_tdata2[13] == dec_i0_match_data_2[13]; // @[el2_lib.scala 197:80] + wire _T_766 = _T_762 | _T_765; // @[el2_lib.scala 197:25] + wire _T_768 = &io_trigger_pkt_any_2_tdata2[13:0]; // @[el2_lib.scala 197:38] + wire _T_769 = _T_768 & _T_671; // @[el2_lib.scala 197:43] + wire _T_772 = io_trigger_pkt_any_2_tdata2[14] == dec_i0_match_data_2[14]; // @[el2_lib.scala 197:80] + wire _T_773 = _T_769 | _T_772; // @[el2_lib.scala 197:25] + wire _T_775 = &io_trigger_pkt_any_2_tdata2[14:0]; // @[el2_lib.scala 197:38] + wire _T_776 = _T_775 & _T_671; // @[el2_lib.scala 197:43] + wire _T_779 = io_trigger_pkt_any_2_tdata2[15] == dec_i0_match_data_2[15]; // @[el2_lib.scala 197:80] + wire _T_780 = _T_776 | _T_779; // @[el2_lib.scala 197:25] + wire _T_782 = &io_trigger_pkt_any_2_tdata2[15:0]; // @[el2_lib.scala 197:38] + wire _T_783 = _T_782 & _T_671; // @[el2_lib.scala 197:43] + wire _T_786 = io_trigger_pkt_any_2_tdata2[16] == dec_i0_match_data_2[16]; // @[el2_lib.scala 197:80] + wire _T_787 = _T_783 | _T_786; // @[el2_lib.scala 197:25] + wire _T_789 = &io_trigger_pkt_any_2_tdata2[16:0]; // @[el2_lib.scala 197:38] + wire _T_790 = _T_789 & _T_671; // @[el2_lib.scala 197:43] + wire _T_793 = io_trigger_pkt_any_2_tdata2[17] == dec_i0_match_data_2[17]; // @[el2_lib.scala 197:80] + wire _T_794 = _T_790 | _T_793; // @[el2_lib.scala 197:25] + wire _T_796 = &io_trigger_pkt_any_2_tdata2[17:0]; // @[el2_lib.scala 197:38] + wire _T_797 = _T_796 & _T_671; // @[el2_lib.scala 197:43] + wire _T_800 = io_trigger_pkt_any_2_tdata2[18] == dec_i0_match_data_2[18]; // @[el2_lib.scala 197:80] + wire _T_801 = _T_797 | _T_800; // @[el2_lib.scala 197:25] + wire _T_803 = &io_trigger_pkt_any_2_tdata2[18:0]; // @[el2_lib.scala 197:38] + wire _T_804 = _T_803 & _T_671; // @[el2_lib.scala 197:43] + wire _T_807 = io_trigger_pkt_any_2_tdata2[19] == dec_i0_match_data_2[19]; // @[el2_lib.scala 197:80] + wire _T_808 = _T_804 | _T_807; // @[el2_lib.scala 197:25] + wire _T_810 = &io_trigger_pkt_any_2_tdata2[19:0]; // @[el2_lib.scala 197:38] + wire _T_811 = _T_810 & _T_671; // @[el2_lib.scala 197:43] + wire _T_814 = io_trigger_pkt_any_2_tdata2[20] == dec_i0_match_data_2[20]; // @[el2_lib.scala 197:80] + wire _T_815 = _T_811 | _T_814; // @[el2_lib.scala 197:25] + wire _T_817 = &io_trigger_pkt_any_2_tdata2[20:0]; // @[el2_lib.scala 197:38] + wire _T_818 = _T_817 & _T_671; // @[el2_lib.scala 197:43] + wire _T_821 = io_trigger_pkt_any_2_tdata2[21] == dec_i0_match_data_2[21]; // @[el2_lib.scala 197:80] + wire _T_822 = _T_818 | _T_821; // @[el2_lib.scala 197:25] + wire _T_824 = &io_trigger_pkt_any_2_tdata2[21:0]; // @[el2_lib.scala 197:38] + wire _T_825 = _T_824 & _T_671; // @[el2_lib.scala 197:43] + wire _T_828 = io_trigger_pkt_any_2_tdata2[22] == dec_i0_match_data_2[22]; // @[el2_lib.scala 197:80] + wire _T_829 = _T_825 | _T_828; // @[el2_lib.scala 197:25] + wire _T_831 = &io_trigger_pkt_any_2_tdata2[22:0]; // @[el2_lib.scala 197:38] + wire _T_832 = _T_831 & _T_671; // @[el2_lib.scala 197:43] + wire _T_835 = io_trigger_pkt_any_2_tdata2[23] == dec_i0_match_data_2[23]; // @[el2_lib.scala 197:80] + wire _T_836 = _T_832 | _T_835; // @[el2_lib.scala 197:25] + wire _T_838 = &io_trigger_pkt_any_2_tdata2[23:0]; // @[el2_lib.scala 197:38] + wire _T_839 = _T_838 & _T_671; // @[el2_lib.scala 197:43] + wire _T_842 = io_trigger_pkt_any_2_tdata2[24] == dec_i0_match_data_2[24]; // @[el2_lib.scala 197:80] + wire _T_843 = _T_839 | _T_842; // @[el2_lib.scala 197:25] + wire _T_845 = &io_trigger_pkt_any_2_tdata2[24:0]; // @[el2_lib.scala 197:38] + wire _T_846 = _T_845 & _T_671; // @[el2_lib.scala 197:43] + wire _T_849 = io_trigger_pkt_any_2_tdata2[25] == dec_i0_match_data_2[25]; // @[el2_lib.scala 197:80] + wire _T_850 = _T_846 | _T_849; // @[el2_lib.scala 197:25] + wire _T_852 = &io_trigger_pkt_any_2_tdata2[25:0]; // @[el2_lib.scala 197:38] + wire _T_853 = _T_852 & _T_671; // @[el2_lib.scala 197:43] + wire _T_856 = io_trigger_pkt_any_2_tdata2[26] == dec_i0_match_data_2[26]; // @[el2_lib.scala 197:80] + wire _T_857 = _T_853 | _T_856; // @[el2_lib.scala 197:25] + wire _T_859 = &io_trigger_pkt_any_2_tdata2[26:0]; // @[el2_lib.scala 197:38] + wire _T_860 = _T_859 & _T_671; // @[el2_lib.scala 197:43] + wire _T_863 = io_trigger_pkt_any_2_tdata2[27] == dec_i0_match_data_2[27]; // @[el2_lib.scala 197:80] + wire _T_864 = _T_860 | _T_863; // @[el2_lib.scala 197:25] + wire _T_866 = &io_trigger_pkt_any_2_tdata2[27:0]; // @[el2_lib.scala 197:38] + wire _T_867 = _T_866 & _T_671; // @[el2_lib.scala 197:43] + wire _T_870 = io_trigger_pkt_any_2_tdata2[28] == dec_i0_match_data_2[28]; // @[el2_lib.scala 197:80] + wire _T_871 = _T_867 | _T_870; // @[el2_lib.scala 197:25] + wire _T_873 = &io_trigger_pkt_any_2_tdata2[28:0]; // @[el2_lib.scala 197:38] + wire _T_874 = _T_873 & _T_671; // @[el2_lib.scala 197:43] + wire _T_877 = io_trigger_pkt_any_2_tdata2[29] == dec_i0_match_data_2[29]; // @[el2_lib.scala 197:80] + wire _T_878 = _T_874 | _T_877; // @[el2_lib.scala 197:25] + wire _T_880 = &io_trigger_pkt_any_2_tdata2[29:0]; // @[el2_lib.scala 197:38] + wire _T_881 = _T_880 & _T_671; // @[el2_lib.scala 197:43] + wire _T_884 = io_trigger_pkt_any_2_tdata2[30] == dec_i0_match_data_2[30]; // @[el2_lib.scala 197:80] + wire _T_885 = _T_881 | _T_884; // @[el2_lib.scala 197:25] + wire _T_887 = &io_trigger_pkt_any_2_tdata2[30:0]; // @[el2_lib.scala 197:38] + wire _T_888 = _T_887 & _T_671; // @[el2_lib.scala 197:43] + wire _T_891 = io_trigger_pkt_any_2_tdata2[31] == dec_i0_match_data_2[31]; // @[el2_lib.scala 197:80] + wire _T_892 = _T_888 | _T_891; // @[el2_lib.scala 197:25] + wire _T_893 = _T_675 & _T_682; // @[el2_lib.scala 198:22] + wire _T_894 = _T_893 & _T_689; // @[el2_lib.scala 198:22] + wire _T_895 = _T_894 & _T_696; // @[el2_lib.scala 198:22] + wire _T_896 = _T_895 & _T_703; // @[el2_lib.scala 198:22] + wire _T_897 = _T_896 & _T_710; // @[el2_lib.scala 198:22] + wire _T_898 = _T_897 & _T_717; // @[el2_lib.scala 198:22] + wire _T_899 = _T_898 & _T_724; // @[el2_lib.scala 198:22] + wire _T_900 = _T_899 & _T_731; // @[el2_lib.scala 198:22] + wire _T_901 = _T_900 & _T_738; // @[el2_lib.scala 198:22] + wire _T_902 = _T_901 & _T_745; // @[el2_lib.scala 198:22] + wire _T_903 = _T_902 & _T_752; // @[el2_lib.scala 198:22] + wire _T_904 = _T_903 & _T_759; // @[el2_lib.scala 198:22] + wire _T_905 = _T_904 & _T_766; // @[el2_lib.scala 198:22] + wire _T_906 = _T_905 & _T_773; // @[el2_lib.scala 198:22] + wire _T_907 = _T_906 & _T_780; // @[el2_lib.scala 198:22] + wire _T_908 = _T_907 & _T_787; // @[el2_lib.scala 198:22] + wire _T_909 = _T_908 & _T_794; // @[el2_lib.scala 198:22] + wire _T_910 = _T_909 & _T_801; // @[el2_lib.scala 198:22] + wire _T_911 = _T_910 & _T_808; // @[el2_lib.scala 198:22] + wire _T_912 = _T_911 & _T_815; // @[el2_lib.scala 198:22] + wire _T_913 = _T_912 & _T_822; // @[el2_lib.scala 198:22] + wire _T_914 = _T_913 & _T_829; // @[el2_lib.scala 198:22] + wire _T_915 = _T_914 & _T_836; // @[el2_lib.scala 198:22] + wire _T_916 = _T_915 & _T_843; // @[el2_lib.scala 198:22] + wire _T_917 = _T_916 & _T_850; // @[el2_lib.scala 198:22] + wire _T_918 = _T_917 & _T_857; // @[el2_lib.scala 198:22] + wire _T_919 = _T_918 & _T_864; // @[el2_lib.scala 198:22] + wire _T_920 = _T_919 & _T_871; // @[el2_lib.scala 198:22] + wire _T_921 = _T_920 & _T_878; // @[el2_lib.scala 198:22] + wire _T_922 = _T_921 & _T_885; // @[el2_lib.scala 198:22] + wire _T_923 = _T_922 & _T_892; // @[el2_lib.scala 198:22] + wire _T_924 = _T_666 & _T_923; // @[el2_lsu_trigger.scala 16:109] + wire _T_925 = io_trigger_pkt_any_3_execute & io_trigger_pkt_any_3_m; // @[el2_lsu_trigger.scala 16:83] + wire _T_928 = &io_trigger_pkt_any_3_tdata2; // @[el2_lib.scala 194:45] + wire _T_929 = ~_T_928; // @[el2_lib.scala 194:39] + wire _T_930 = io_trigger_pkt_any_3_match_ & _T_929; // @[el2_lib.scala 194:37] + wire _T_933 = io_trigger_pkt_any_3_tdata2[0] == dec_i0_match_data_3[0]; // @[el2_lib.scala 195:52] + wire _T_934 = _T_930 | _T_933; // @[el2_lib.scala 195:41] + wire _T_936 = &io_trigger_pkt_any_3_tdata2[0]; // @[el2_lib.scala 197:38] + wire _T_937 = _T_936 & _T_930; // @[el2_lib.scala 197:43] + wire _T_940 = io_trigger_pkt_any_3_tdata2[1] == dec_i0_match_data_3[1]; // @[el2_lib.scala 197:80] + wire _T_941 = _T_937 | _T_940; // @[el2_lib.scala 197:25] + wire _T_943 = &io_trigger_pkt_any_3_tdata2[1:0]; // @[el2_lib.scala 197:38] + wire _T_944 = _T_943 & _T_930; // @[el2_lib.scala 197:43] + wire _T_947 = io_trigger_pkt_any_3_tdata2[2] == dec_i0_match_data_3[2]; // @[el2_lib.scala 197:80] + wire _T_948 = _T_944 | _T_947; // @[el2_lib.scala 197:25] + wire _T_950 = &io_trigger_pkt_any_3_tdata2[2:0]; // @[el2_lib.scala 197:38] + wire _T_951 = _T_950 & _T_930; // @[el2_lib.scala 197:43] + wire _T_954 = io_trigger_pkt_any_3_tdata2[3] == dec_i0_match_data_3[3]; // @[el2_lib.scala 197:80] + wire _T_955 = _T_951 | _T_954; // @[el2_lib.scala 197:25] + wire _T_957 = &io_trigger_pkt_any_3_tdata2[3:0]; // @[el2_lib.scala 197:38] + wire _T_958 = _T_957 & _T_930; // @[el2_lib.scala 197:43] + wire _T_961 = io_trigger_pkt_any_3_tdata2[4] == dec_i0_match_data_3[4]; // @[el2_lib.scala 197:80] + wire _T_962 = _T_958 | _T_961; // @[el2_lib.scala 197:25] + wire _T_964 = &io_trigger_pkt_any_3_tdata2[4:0]; // @[el2_lib.scala 197:38] + wire _T_965 = _T_964 & _T_930; // @[el2_lib.scala 197:43] + wire _T_968 = io_trigger_pkt_any_3_tdata2[5] == dec_i0_match_data_3[5]; // @[el2_lib.scala 197:80] + wire _T_969 = _T_965 | _T_968; // @[el2_lib.scala 197:25] + wire _T_971 = &io_trigger_pkt_any_3_tdata2[5:0]; // @[el2_lib.scala 197:38] + wire _T_972 = _T_971 & _T_930; // @[el2_lib.scala 197:43] + wire _T_975 = io_trigger_pkt_any_3_tdata2[6] == dec_i0_match_data_3[6]; // @[el2_lib.scala 197:80] + wire _T_976 = _T_972 | _T_975; // @[el2_lib.scala 197:25] + wire _T_978 = &io_trigger_pkt_any_3_tdata2[6:0]; // @[el2_lib.scala 197:38] + wire _T_979 = _T_978 & _T_930; // @[el2_lib.scala 197:43] + wire _T_982 = io_trigger_pkt_any_3_tdata2[7] == dec_i0_match_data_3[7]; // @[el2_lib.scala 197:80] + wire _T_983 = _T_979 | _T_982; // @[el2_lib.scala 197:25] + wire _T_985 = &io_trigger_pkt_any_3_tdata2[7:0]; // @[el2_lib.scala 197:38] + wire _T_986 = _T_985 & _T_930; // @[el2_lib.scala 197:43] + wire _T_989 = io_trigger_pkt_any_3_tdata2[8] == dec_i0_match_data_3[8]; // @[el2_lib.scala 197:80] + wire _T_990 = _T_986 | _T_989; // @[el2_lib.scala 197:25] + wire _T_992 = &io_trigger_pkt_any_3_tdata2[8:0]; // @[el2_lib.scala 197:38] + wire _T_993 = _T_992 & _T_930; // @[el2_lib.scala 197:43] + wire _T_996 = io_trigger_pkt_any_3_tdata2[9] == dec_i0_match_data_3[9]; // @[el2_lib.scala 197:80] + wire _T_997 = _T_993 | _T_996; // @[el2_lib.scala 197:25] + wire _T_999 = &io_trigger_pkt_any_3_tdata2[9:0]; // @[el2_lib.scala 197:38] + wire _T_1000 = _T_999 & _T_930; // @[el2_lib.scala 197:43] + wire _T_1003 = io_trigger_pkt_any_3_tdata2[10] == dec_i0_match_data_3[10]; // @[el2_lib.scala 197:80] + wire _T_1004 = _T_1000 | _T_1003; // @[el2_lib.scala 197:25] + wire _T_1006 = &io_trigger_pkt_any_3_tdata2[10:0]; // @[el2_lib.scala 197:38] + wire _T_1007 = _T_1006 & _T_930; // @[el2_lib.scala 197:43] + wire _T_1010 = io_trigger_pkt_any_3_tdata2[11] == dec_i0_match_data_3[11]; // @[el2_lib.scala 197:80] + wire _T_1011 = _T_1007 | _T_1010; // @[el2_lib.scala 197:25] + wire _T_1013 = &io_trigger_pkt_any_3_tdata2[11:0]; // @[el2_lib.scala 197:38] + wire _T_1014 = _T_1013 & _T_930; // @[el2_lib.scala 197:43] + wire _T_1017 = io_trigger_pkt_any_3_tdata2[12] == dec_i0_match_data_3[12]; // @[el2_lib.scala 197:80] + wire _T_1018 = _T_1014 | _T_1017; // @[el2_lib.scala 197:25] + wire _T_1020 = &io_trigger_pkt_any_3_tdata2[12:0]; // @[el2_lib.scala 197:38] + wire _T_1021 = _T_1020 & _T_930; // @[el2_lib.scala 197:43] + wire _T_1024 = io_trigger_pkt_any_3_tdata2[13] == dec_i0_match_data_3[13]; // @[el2_lib.scala 197:80] + wire _T_1025 = _T_1021 | _T_1024; // @[el2_lib.scala 197:25] + wire _T_1027 = &io_trigger_pkt_any_3_tdata2[13:0]; // @[el2_lib.scala 197:38] + wire _T_1028 = _T_1027 & _T_930; // @[el2_lib.scala 197:43] + wire _T_1031 = io_trigger_pkt_any_3_tdata2[14] == dec_i0_match_data_3[14]; // @[el2_lib.scala 197:80] + wire _T_1032 = _T_1028 | _T_1031; // @[el2_lib.scala 197:25] + wire _T_1034 = &io_trigger_pkt_any_3_tdata2[14:0]; // @[el2_lib.scala 197:38] + wire _T_1035 = _T_1034 & _T_930; // @[el2_lib.scala 197:43] + wire _T_1038 = io_trigger_pkt_any_3_tdata2[15] == dec_i0_match_data_3[15]; // @[el2_lib.scala 197:80] + wire _T_1039 = _T_1035 | _T_1038; // @[el2_lib.scala 197:25] + wire _T_1041 = &io_trigger_pkt_any_3_tdata2[15:0]; // @[el2_lib.scala 197:38] + wire _T_1042 = _T_1041 & _T_930; // @[el2_lib.scala 197:43] + wire _T_1045 = io_trigger_pkt_any_3_tdata2[16] == dec_i0_match_data_3[16]; // @[el2_lib.scala 197:80] + wire _T_1046 = _T_1042 | _T_1045; // @[el2_lib.scala 197:25] + wire _T_1048 = &io_trigger_pkt_any_3_tdata2[16:0]; // @[el2_lib.scala 197:38] + wire _T_1049 = _T_1048 & _T_930; // @[el2_lib.scala 197:43] + wire _T_1052 = io_trigger_pkt_any_3_tdata2[17] == dec_i0_match_data_3[17]; // @[el2_lib.scala 197:80] + wire _T_1053 = _T_1049 | _T_1052; // @[el2_lib.scala 197:25] + wire _T_1055 = &io_trigger_pkt_any_3_tdata2[17:0]; // @[el2_lib.scala 197:38] + wire _T_1056 = _T_1055 & _T_930; // @[el2_lib.scala 197:43] + wire _T_1059 = io_trigger_pkt_any_3_tdata2[18] == dec_i0_match_data_3[18]; // @[el2_lib.scala 197:80] + wire _T_1060 = _T_1056 | _T_1059; // @[el2_lib.scala 197:25] + wire _T_1062 = &io_trigger_pkt_any_3_tdata2[18:0]; // @[el2_lib.scala 197:38] + wire _T_1063 = _T_1062 & _T_930; // @[el2_lib.scala 197:43] + wire _T_1066 = io_trigger_pkt_any_3_tdata2[19] == dec_i0_match_data_3[19]; // @[el2_lib.scala 197:80] + wire _T_1067 = _T_1063 | _T_1066; // @[el2_lib.scala 197:25] + wire _T_1069 = &io_trigger_pkt_any_3_tdata2[19:0]; // @[el2_lib.scala 197:38] + wire _T_1070 = _T_1069 & _T_930; // @[el2_lib.scala 197:43] + wire _T_1073 = io_trigger_pkt_any_3_tdata2[20] == dec_i0_match_data_3[20]; // @[el2_lib.scala 197:80] + wire _T_1074 = _T_1070 | _T_1073; // @[el2_lib.scala 197:25] + wire _T_1076 = &io_trigger_pkt_any_3_tdata2[20:0]; // @[el2_lib.scala 197:38] + wire _T_1077 = _T_1076 & _T_930; // @[el2_lib.scala 197:43] + wire _T_1080 = io_trigger_pkt_any_3_tdata2[21] == dec_i0_match_data_3[21]; // @[el2_lib.scala 197:80] + wire _T_1081 = _T_1077 | _T_1080; // @[el2_lib.scala 197:25] + wire _T_1083 = &io_trigger_pkt_any_3_tdata2[21:0]; // @[el2_lib.scala 197:38] + wire _T_1084 = _T_1083 & _T_930; // @[el2_lib.scala 197:43] + wire _T_1087 = io_trigger_pkt_any_3_tdata2[22] == dec_i0_match_data_3[22]; // @[el2_lib.scala 197:80] + wire _T_1088 = _T_1084 | _T_1087; // @[el2_lib.scala 197:25] + wire _T_1090 = &io_trigger_pkt_any_3_tdata2[22:0]; // @[el2_lib.scala 197:38] + wire _T_1091 = _T_1090 & _T_930; // @[el2_lib.scala 197:43] + wire _T_1094 = io_trigger_pkt_any_3_tdata2[23] == dec_i0_match_data_3[23]; // @[el2_lib.scala 197:80] + wire _T_1095 = _T_1091 | _T_1094; // @[el2_lib.scala 197:25] + wire _T_1097 = &io_trigger_pkt_any_3_tdata2[23:0]; // @[el2_lib.scala 197:38] + wire _T_1098 = _T_1097 & _T_930; // @[el2_lib.scala 197:43] + wire _T_1101 = io_trigger_pkt_any_3_tdata2[24] == dec_i0_match_data_3[24]; // @[el2_lib.scala 197:80] + wire _T_1102 = _T_1098 | _T_1101; // @[el2_lib.scala 197:25] + wire _T_1104 = &io_trigger_pkt_any_3_tdata2[24:0]; // @[el2_lib.scala 197:38] + wire _T_1105 = _T_1104 & _T_930; // @[el2_lib.scala 197:43] + wire _T_1108 = io_trigger_pkt_any_3_tdata2[25] == dec_i0_match_data_3[25]; // @[el2_lib.scala 197:80] + wire _T_1109 = _T_1105 | _T_1108; // @[el2_lib.scala 197:25] + wire _T_1111 = &io_trigger_pkt_any_3_tdata2[25:0]; // @[el2_lib.scala 197:38] + wire _T_1112 = _T_1111 & _T_930; // @[el2_lib.scala 197:43] + wire _T_1115 = io_trigger_pkt_any_3_tdata2[26] == dec_i0_match_data_3[26]; // @[el2_lib.scala 197:80] + wire _T_1116 = _T_1112 | _T_1115; // @[el2_lib.scala 197:25] + wire _T_1118 = &io_trigger_pkt_any_3_tdata2[26:0]; // @[el2_lib.scala 197:38] + wire _T_1119 = _T_1118 & _T_930; // @[el2_lib.scala 197:43] + wire _T_1122 = io_trigger_pkt_any_3_tdata2[27] == dec_i0_match_data_3[27]; // @[el2_lib.scala 197:80] + wire _T_1123 = _T_1119 | _T_1122; // @[el2_lib.scala 197:25] + wire _T_1125 = &io_trigger_pkt_any_3_tdata2[27:0]; // @[el2_lib.scala 197:38] + wire _T_1126 = _T_1125 & _T_930; // @[el2_lib.scala 197:43] + wire _T_1129 = io_trigger_pkt_any_3_tdata2[28] == dec_i0_match_data_3[28]; // @[el2_lib.scala 197:80] + wire _T_1130 = _T_1126 | _T_1129; // @[el2_lib.scala 197:25] + wire _T_1132 = &io_trigger_pkt_any_3_tdata2[28:0]; // @[el2_lib.scala 197:38] + wire _T_1133 = _T_1132 & _T_930; // @[el2_lib.scala 197:43] + wire _T_1136 = io_trigger_pkt_any_3_tdata2[29] == dec_i0_match_data_3[29]; // @[el2_lib.scala 197:80] + wire _T_1137 = _T_1133 | _T_1136; // @[el2_lib.scala 197:25] + wire _T_1139 = &io_trigger_pkt_any_3_tdata2[29:0]; // @[el2_lib.scala 197:38] + wire _T_1140 = _T_1139 & _T_930; // @[el2_lib.scala 197:43] + wire _T_1143 = io_trigger_pkt_any_3_tdata2[30] == dec_i0_match_data_3[30]; // @[el2_lib.scala 197:80] + wire _T_1144 = _T_1140 | _T_1143; // @[el2_lib.scala 197:25] + wire _T_1146 = &io_trigger_pkt_any_3_tdata2[30:0]; // @[el2_lib.scala 197:38] + wire _T_1147 = _T_1146 & _T_930; // @[el2_lib.scala 197:43] + wire _T_1150 = io_trigger_pkt_any_3_tdata2[31] == dec_i0_match_data_3[31]; // @[el2_lib.scala 197:80] + wire _T_1151 = _T_1147 | _T_1150; // @[el2_lib.scala 197:25] + wire _T_1152 = _T_934 & _T_941; // @[el2_lib.scala 198:22] + wire _T_1153 = _T_1152 & _T_948; // @[el2_lib.scala 198:22] + wire _T_1154 = _T_1153 & _T_955; // @[el2_lib.scala 198:22] + wire _T_1155 = _T_1154 & _T_962; // @[el2_lib.scala 198:22] + wire _T_1156 = _T_1155 & _T_969; // @[el2_lib.scala 198:22] + wire _T_1157 = _T_1156 & _T_976; // @[el2_lib.scala 198:22] + wire _T_1158 = _T_1157 & _T_983; // @[el2_lib.scala 198:22] + wire _T_1159 = _T_1158 & _T_990; // @[el2_lib.scala 198:22] + wire _T_1160 = _T_1159 & _T_997; // @[el2_lib.scala 198:22] + wire _T_1161 = _T_1160 & _T_1004; // @[el2_lib.scala 198:22] + wire _T_1162 = _T_1161 & _T_1011; // @[el2_lib.scala 198:22] + wire _T_1163 = _T_1162 & _T_1018; // @[el2_lib.scala 198:22] + wire _T_1164 = _T_1163 & _T_1025; // @[el2_lib.scala 198:22] + wire _T_1165 = _T_1164 & _T_1032; // @[el2_lib.scala 198:22] + wire _T_1166 = _T_1165 & _T_1039; // @[el2_lib.scala 198:22] + wire _T_1167 = _T_1166 & _T_1046; // @[el2_lib.scala 198:22] + wire _T_1168 = _T_1167 & _T_1053; // @[el2_lib.scala 198:22] + wire _T_1169 = _T_1168 & _T_1060; // @[el2_lib.scala 198:22] + wire _T_1170 = _T_1169 & _T_1067; // @[el2_lib.scala 198:22] + wire _T_1171 = _T_1170 & _T_1074; // @[el2_lib.scala 198:22] + wire _T_1172 = _T_1171 & _T_1081; // @[el2_lib.scala 198:22] + wire _T_1173 = _T_1172 & _T_1088; // @[el2_lib.scala 198:22] + wire _T_1174 = _T_1173 & _T_1095; // @[el2_lib.scala 198:22] + wire _T_1175 = _T_1174 & _T_1102; // @[el2_lib.scala 198:22] + wire _T_1176 = _T_1175 & _T_1109; // @[el2_lib.scala 198:22] + wire _T_1177 = _T_1176 & _T_1116; // @[el2_lib.scala 198:22] + wire _T_1178 = _T_1177 & _T_1123; // @[el2_lib.scala 198:22] + wire _T_1179 = _T_1178 & _T_1130; // @[el2_lib.scala 198:22] + wire _T_1180 = _T_1179 & _T_1137; // @[el2_lib.scala 198:22] + wire _T_1181 = _T_1180 & _T_1144; // @[el2_lib.scala 198:22] + wire _T_1182 = _T_1181 & _T_1151; // @[el2_lib.scala 198:22] + wire _T_1183 = _T_925 & _T_1182; // @[el2_lsu_trigger.scala 16:109] + wire [2:0] _T_1185 = {_T_1183,_T_924,_T_665}; // @[Cat.scala 29:58] + assign io_dec_i0_trigger_match_d = {_T_1185,_T_406}; // @[el2_lsu_trigger.scala 16:29] +endmodule diff --git a/el2_exu_alu_ctl.anno.json b/el2_exu_alu_ctl.anno.json new file mode 100644 index 00000000..0256f869 --- /dev/null +++ b/el2_exu_alu_ctl.anno.json @@ -0,0 +1,239 @@ +[ + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_exu_alu_ctl|el2_exu_alu_ctl>io_predict_p_out_way", + "sources":[ + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_way" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_exu_alu_ctl|el2_exu_alu_ctl>io_predict_p_out_prett", + "sources":[ + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_prett" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_exu_alu_ctl|el2_exu_alu_ctl>io_predict_p_out_valid", + "sources":[ + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_valid" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_exu_alu_ctl|el2_exu_alu_ctl>io_predict_p_out_br_start_error", + "sources":[ + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_br_start_error" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_exu_alu_ctl|el2_exu_alu_ctl>io_predict_p_out_ataken", + "sources":[ + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_pret", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_bge", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_pja", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_blt", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_jal", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_pcall", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_beq", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_bne", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_a_in", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_b_in", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_unsign", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_sub" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_exu_alu_ctl|el2_exu_alu_ctl>io_predict_p_out_pret", + "sources":[ + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_pret" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_exu_alu_ctl|el2_exu_alu_ctl>io_predict_p_out_pc4", + "sources":[ + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_pc4" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_exu_alu_ctl|el2_exu_alu_ctl>io_predict_p_out_toffset", + "sources":[ + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_toffset" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_exu_alu_ctl|el2_exu_alu_ctl>io_predict_p_out_br_error", + "sources":[ + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_br_error" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_exu_alu_ctl|el2_exu_alu_ctl>io_flush_upper_out", + "sources":[ + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_flush_lower_r", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_valid_in", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_flush_upper_x", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_jal", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_pret", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_predict_t", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_predict_nt", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_prett", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_bge", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_pja", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_blt", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_pcall", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_beq", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_bne", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_sub", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_a_in", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_b_in", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_unsign" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_exu_alu_ctl|el2_exu_alu_ctl>io_predict_p_out_boffset", + "sources":[ + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_boffset" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_exu_alu_ctl|el2_exu_alu_ctl>io_predict_p_out_hist", + "sources":[ + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_hist", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_pret", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_bge", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_pja", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_blt", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_jal", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_pcall", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_beq", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_bne", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_a_in", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_b_in", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_unsign", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_sub" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_exu_alu_ctl|el2_exu_alu_ctl>io_predict_p_out_pcall", + "sources":[ + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_pcall" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_exu_alu_ctl|el2_exu_alu_ctl>io_flush_final_out", + "sources":[ + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_flush_lower_r", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_valid_in", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_flush_upper_x", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_jal", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_pret", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_predict_t", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_predict_nt", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_prett", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_bge", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_pja", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_blt", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_pcall", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_beq", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_bne", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_sub", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_a_in", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_b_in", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_unsign" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_exu_alu_ctl|el2_exu_alu_ctl>io_flush_path_out", + "sources":[ + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_pret", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_pja", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_jal", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_pcall", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_sub", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pc_in", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_brimm_in", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_a_in", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_b_in" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_exu_alu_ctl|el2_exu_alu_ctl>io_predict_p_out_misp", + "sources":[ + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_flush_upper_x", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_flush_lower_r", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_pret", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_predict_t", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_predict_nt", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_prett", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_bge", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_pja", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_blt", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_jal", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_pcall", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_beq", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_bne", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_a_in", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_b_in", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_unsign", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_sub" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pred_correct_out", + "sources":[ + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_valid_in", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_predict_nt", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_pret", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_predict_t", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_pja", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_jal", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_pcall", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_bge", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_blt", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_beq", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_bne", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_a_in", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_b_in", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_unsign", + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_sub" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_exu_alu_ctl|el2_exu_alu_ctl>io_predict_p_out_pja", + "sources":[ + "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_pja" + ] + }, + { + "class":"firrtl.EmitCircuitAnnotation", + "emitter":"firrtl.VerilogEmitter" + }, + { + "class":"firrtl.options.TargetDirAnnotation", + "directory":"." + }, + { + "class":"firrtl.options.OutputAnnotationFileAnnotation", + "file":"el2_exu_alu_ctl" + }, + { + "class":"firrtl.transforms.BlackBoxTargetDirAnno", + "targetDir":"." + } +] \ No newline at end of file diff --git a/el2_exu_alu_ctl.fir b/el2_exu_alu_ctl.fir new file mode 100644 index 00000000..894b6988 --- /dev/null +++ b/el2_exu_alu_ctl.fir @@ -0,0 +1,474 @@ +;buildInfoPackage: chisel3, version: 3.3.1, scalaVersion: 2.12.11, sbtVersion: 1.3.10 +circuit el2_exu_alu_ctl : + module el2_exu_alu_ctl : + input clock : Clock + input reset : UInt<1> + output io : {flip scan_mode : UInt<1>, flip flush_upper_x : UInt<1>, flip flush_lower_r : UInt<1>, flip enable : UInt<1>, flip valid_in : UInt<1>, flip ap : {land : UInt<1>, lor : UInt<1>, lxor : UInt<1>, sll : UInt<1>, srl : UInt<1>, sra : UInt<1>, beq : UInt<1>, bne : UInt<1>, blt : UInt<1>, bge : UInt<1>, add : UInt<1>, sub : UInt<1>, slt : UInt<1>, unsign : UInt<1>, jal : UInt<1>, predict_t : UInt<1>, predict_nt : UInt<1>, csr_write : UInt<1>, csr_imm : UInt<1>}, flip csr_ren_in : UInt<1>, flip a_in : UInt<32>, flip b_in : UInt<32>, flip pc_in : UInt<31>, flip pp_in : {misp : UInt<1>, ataken : UInt<1>, boffset : UInt<1>, pc4 : UInt<1>, hist : UInt<2>, toffset : UInt<12>, valid : UInt<1>, br_error : UInt<1>, br_start_error : UInt<1>, prett : UInt<32>, pcall : UInt<1>, pret : UInt<1>, pja : UInt<1>, way : UInt<1>}, flip brimm_in : UInt<12>, result_ff : UInt<32>, flush_upper_out : UInt<1>, flush_final_out : UInt<1>, flush_path_out : UInt<31>, pc_ff : UInt<31>, pred_correct_out : UInt<1>, predict_p_out : {misp : UInt<1>, ataken : UInt<1>, boffset : UInt<1>, pc4 : UInt<1>, hist : UInt<2>, toffset : UInt<12>, valid : UInt<1>, br_error : UInt<1>, br_start_error : UInt<1>, prett : UInt<32>, pcall : UInt<1>, pret : UInt<1>, pja : UInt<1>, way : UInt<1>}} + + reg _T : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when io.enable : @[Reg.scala 28:19] + _T <= io.pc_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + io.pc_ff <= _T @[el2_exu_alu_ctl.scala 35:12] + wire result : UInt<32> + result <= UInt<1>("h00") + reg _T_1 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when io.enable : @[Reg.scala 28:19] + _T_1 <= result @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + io.result_ff <= _T_1 @[el2_exu_alu_ctl.scala 37:16] + node _T_2 = bits(io.ap.sub, 0, 0) @[el2_exu_alu_ctl.scala 39:29] + node _T_3 = not(io.b_in) @[el2_exu_alu_ctl.scala 39:37] + node bm = mux(_T_2, _T_3, io.b_in) @[el2_exu_alu_ctl.scala 39:17] + wire aout : UInt<33> + aout <= UInt<1>("h00") + node _T_4 = bits(io.ap.sub, 0, 0) @[el2_exu_alu_ctl.scala 43:15] + node _T_5 = cat(UInt<1>("h00"), io.a_in) @[Cat.scala 29:58] + node _T_6 = not(io.b_in) @[el2_exu_alu_ctl.scala 43:63] + node _T_7 = cat(UInt<1>("h00"), _T_6) @[Cat.scala 29:58] + node _T_8 = add(_T_5, _T_7) @[el2_exu_alu_ctl.scala 43:48] + node _T_9 = tail(_T_8, 1) @[el2_exu_alu_ctl.scala 43:48] + node _T_10 = add(_T_9, UInt<1>("h01")) @[el2_exu_alu_ctl.scala 43:73] + node _T_11 = tail(_T_10, 1) @[el2_exu_alu_ctl.scala 43:73] + node _T_12 = bits(io.ap.sub, 0, 0) @[el2_exu_alu_ctl.scala 44:16] + node _T_13 = eq(_T_12, UInt<1>("h00")) @[el2_exu_alu_ctl.scala 44:5] + node _T_14 = cat(UInt<1>("h00"), io.a_in) @[Cat.scala 29:58] + node _T_15 = cat(UInt<1>("h00"), io.b_in) @[Cat.scala 29:58] + node _T_16 = add(_T_14, _T_15) @[el2_exu_alu_ctl.scala 44:48] + node _T_17 = tail(_T_16, 1) @[el2_exu_alu_ctl.scala 44:48] + node _T_18 = mux(_T_4, _T_11, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_19 = mux(_T_13, _T_17, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_20 = or(_T_18, _T_19) @[Mux.scala 27:72] + wire _T_21 : UInt<33> @[Mux.scala 27:72] + _T_21 <= _T_20 @[Mux.scala 27:72] + aout <= _T_21 @[el2_exu_alu_ctl.scala 42:8] + node cout = bits(aout, 32, 32) @[el2_exu_alu_ctl.scala 46:18] + node _T_22 = bits(io.a_in, 31, 31) @[el2_exu_alu_ctl.scala 48:22] + node _T_23 = not(_T_22) @[el2_exu_alu_ctl.scala 48:14] + node _T_24 = bits(bm, 31, 31) @[el2_exu_alu_ctl.scala 48:32] + node _T_25 = not(_T_24) @[el2_exu_alu_ctl.scala 48:29] + node _T_26 = and(_T_23, _T_25) @[el2_exu_alu_ctl.scala 48:27] + node _T_27 = bits(aout, 31, 31) @[el2_exu_alu_ctl.scala 48:44] + node _T_28 = and(_T_26, _T_27) @[el2_exu_alu_ctl.scala 48:37] + node _T_29 = bits(io.a_in, 31, 31) @[el2_exu_alu_ctl.scala 48:61] + node _T_30 = bits(bm, 31, 31) @[el2_exu_alu_ctl.scala 48:71] + node _T_31 = and(_T_29, _T_30) @[el2_exu_alu_ctl.scala 48:66] + node _T_32 = bits(aout, 31, 31) @[el2_exu_alu_ctl.scala 48:83] + node _T_33 = not(_T_32) @[el2_exu_alu_ctl.scala 48:78] + node _T_34 = and(_T_31, _T_33) @[el2_exu_alu_ctl.scala 48:76] + node ov = or(_T_28, _T_34) @[el2_exu_alu_ctl.scala 48:50] + node eq = eq(io.a_in, io.b_in) @[el2_exu_alu_ctl.scala 50:38] + node ne = not(eq) @[el2_exu_alu_ctl.scala 51:29] + node neg = bits(aout, 31, 31) @[el2_exu_alu_ctl.scala 52:34] + node _T_35 = not(io.ap.unsign) @[el2_exu_alu_ctl.scala 53:30] + node _T_36 = xor(neg, ov) @[el2_exu_alu_ctl.scala 53:51] + node _T_37 = and(_T_35, _T_36) @[el2_exu_alu_ctl.scala 53:44] + node _T_38 = not(cout) @[el2_exu_alu_ctl.scala 53:78] + node _T_39 = and(io.ap.unsign, _T_38) @[el2_exu_alu_ctl.scala 53:76] + node lt = or(_T_37, _T_39) @[el2_exu_alu_ctl.scala 53:58] + node ge = not(lt) @[el2_exu_alu_ctl.scala 54:29] + node _T_40 = bits(io.csr_ren_in, 0, 0) @[el2_exu_alu_ctl.scala 58:19] + node _T_41 = bits(io.ap.land, 0, 0) @[el2_exu_alu_ctl.scala 59:16] + node _T_42 = and(io.a_in, io.b_in) @[el2_exu_alu_ctl.scala 59:39] + node _T_43 = bits(io.ap.lor, 0, 0) @[el2_exu_alu_ctl.scala 60:15] + node _T_44 = or(io.a_in, io.b_in) @[el2_exu_alu_ctl.scala 60:39] + node _T_45 = bits(io.ap.lxor, 0, 0) @[el2_exu_alu_ctl.scala 61:16] + node _T_46 = xor(io.a_in, io.b_in) @[el2_exu_alu_ctl.scala 61:39] + node _T_47 = mux(_T_40, io.b_in, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_48 = mux(_T_41, _T_42, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_49 = mux(_T_43, _T_44, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_50 = mux(_T_45, _T_46, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_51 = or(_T_47, _T_48) @[Mux.scala 27:72] + node _T_52 = or(_T_51, _T_49) @[Mux.scala 27:72] + node _T_53 = or(_T_52, _T_50) @[Mux.scala 27:72] + wire lout : UInt<32> @[Mux.scala 27:72] + lout <= _T_53 @[Mux.scala 27:72] + node _T_54 = bits(io.ap.sll, 0, 0) @[el2_exu_alu_ctl.scala 64:15] + node _T_55 = bits(io.b_in, 4, 0) @[el2_exu_alu_ctl.scala 64:60] + node _T_56 = cat(UInt<1>("h00"), _T_55) @[Cat.scala 29:58] + node _T_57 = sub(UInt<6>("h020"), _T_56) @[el2_exu_alu_ctl.scala 64:38] + node _T_58 = tail(_T_57, 1) @[el2_exu_alu_ctl.scala 64:38] + node _T_59 = bits(io.ap.srl, 0, 0) @[el2_exu_alu_ctl.scala 65:15] + node _T_60 = bits(io.b_in, 4, 0) @[el2_exu_alu_ctl.scala 65:60] + node _T_61 = cat(UInt<1>("h00"), _T_60) @[Cat.scala 29:58] + node _T_62 = bits(io.ap.sra, 0, 0) @[el2_exu_alu_ctl.scala 66:15] + node _T_63 = bits(io.b_in, 4, 0) @[el2_exu_alu_ctl.scala 66:60] + node _T_64 = cat(UInt<1>("h00"), _T_63) @[Cat.scala 29:58] + node _T_65 = mux(_T_54, _T_58, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_66 = mux(_T_59, _T_61, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_67 = mux(_T_62, _T_64, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_68 = or(_T_65, _T_66) @[Mux.scala 27:72] + node _T_69 = or(_T_68, _T_67) @[Mux.scala 27:72] + wire shift_amount : UInt<6> @[Mux.scala 27:72] + shift_amount <= _T_69 @[Mux.scala 27:72] + wire shift_mask : UInt<32> + shift_mask <= UInt<1>("h00") + wire _T_70 : UInt<1>[5] @[el2_lib.scala 178:24] + _T_70[0] <= io.ap.sll @[el2_lib.scala 178:24] + _T_70[1] <= io.ap.sll @[el2_lib.scala 178:24] + _T_70[2] <= io.ap.sll @[el2_lib.scala 178:24] + _T_70[3] <= io.ap.sll @[el2_lib.scala 178:24] + _T_70[4] <= io.ap.sll @[el2_lib.scala 178:24] + node _T_71 = cat(_T_70[0], _T_70[1]) @[Cat.scala 29:58] + node _T_72 = cat(_T_71, _T_70[2]) @[Cat.scala 29:58] + node _T_73 = cat(_T_72, _T_70[3]) @[Cat.scala 29:58] + node _T_74 = cat(_T_73, _T_70[4]) @[Cat.scala 29:58] + node _T_75 = bits(io.b_in, 4, 0) @[el2_exu_alu_ctl.scala 69:64] + node _T_76 = and(_T_74, _T_75) @[el2_exu_alu_ctl.scala 69:55] + node _T_77 = dshl(UInt<32>("h0ffffffff"), _T_76) @[el2_exu_alu_ctl.scala 69:33] + shift_mask <= _T_77 @[el2_exu_alu_ctl.scala 69:14] + wire shift_extend : UInt<63> + shift_extend <= UInt<1>("h00") + wire _T_78 : UInt<1>[31] @[el2_lib.scala 178:24] + _T_78[0] <= io.ap.sra @[el2_lib.scala 178:24] + _T_78[1] <= io.ap.sra @[el2_lib.scala 178:24] + _T_78[2] <= io.ap.sra @[el2_lib.scala 178:24] + _T_78[3] <= io.ap.sra @[el2_lib.scala 178:24] + _T_78[4] <= io.ap.sra @[el2_lib.scala 178:24] + _T_78[5] <= io.ap.sra @[el2_lib.scala 178:24] + _T_78[6] <= io.ap.sra @[el2_lib.scala 178:24] + _T_78[7] <= io.ap.sra @[el2_lib.scala 178:24] + _T_78[8] <= io.ap.sra @[el2_lib.scala 178:24] + _T_78[9] <= io.ap.sra @[el2_lib.scala 178:24] + _T_78[10] <= io.ap.sra @[el2_lib.scala 178:24] + _T_78[11] <= io.ap.sra @[el2_lib.scala 178:24] + _T_78[12] <= io.ap.sra @[el2_lib.scala 178:24] + _T_78[13] <= io.ap.sra @[el2_lib.scala 178:24] + _T_78[14] <= io.ap.sra @[el2_lib.scala 178:24] + _T_78[15] <= io.ap.sra @[el2_lib.scala 178:24] + _T_78[16] <= io.ap.sra @[el2_lib.scala 178:24] + _T_78[17] <= io.ap.sra @[el2_lib.scala 178:24] + _T_78[18] <= io.ap.sra @[el2_lib.scala 178:24] + _T_78[19] <= io.ap.sra @[el2_lib.scala 178:24] + _T_78[20] <= io.ap.sra @[el2_lib.scala 178:24] + _T_78[21] <= io.ap.sra @[el2_lib.scala 178:24] + _T_78[22] <= io.ap.sra @[el2_lib.scala 178:24] + _T_78[23] <= io.ap.sra @[el2_lib.scala 178:24] + _T_78[24] <= io.ap.sra @[el2_lib.scala 178:24] + _T_78[25] <= io.ap.sra @[el2_lib.scala 178:24] + _T_78[26] <= io.ap.sra @[el2_lib.scala 178:24] + _T_78[27] <= io.ap.sra @[el2_lib.scala 178:24] + _T_78[28] <= io.ap.sra @[el2_lib.scala 178:24] + _T_78[29] <= io.ap.sra @[el2_lib.scala 178:24] + _T_78[30] <= io.ap.sra @[el2_lib.scala 178:24] + node _T_79 = cat(_T_78[0], _T_78[1]) @[Cat.scala 29:58] + node _T_80 = cat(_T_79, _T_78[2]) @[Cat.scala 29:58] + node _T_81 = cat(_T_80, _T_78[3]) @[Cat.scala 29:58] + node _T_82 = cat(_T_81, _T_78[4]) @[Cat.scala 29:58] + node _T_83 = cat(_T_82, _T_78[5]) @[Cat.scala 29:58] + node _T_84 = cat(_T_83, _T_78[6]) @[Cat.scala 29:58] + node _T_85 = cat(_T_84, _T_78[7]) @[Cat.scala 29:58] + node _T_86 = cat(_T_85, _T_78[8]) @[Cat.scala 29:58] + node _T_87 = cat(_T_86, _T_78[9]) @[Cat.scala 29:58] + node _T_88 = cat(_T_87, _T_78[10]) @[Cat.scala 29:58] + node _T_89 = cat(_T_88, _T_78[11]) @[Cat.scala 29:58] + node _T_90 = cat(_T_89, _T_78[12]) @[Cat.scala 29:58] + node _T_91 = cat(_T_90, _T_78[13]) @[Cat.scala 29:58] + node _T_92 = cat(_T_91, _T_78[14]) @[Cat.scala 29:58] + node _T_93 = cat(_T_92, _T_78[15]) @[Cat.scala 29:58] + node _T_94 = cat(_T_93, _T_78[16]) @[Cat.scala 29:58] + node _T_95 = cat(_T_94, _T_78[17]) @[Cat.scala 29:58] + node _T_96 = cat(_T_95, _T_78[18]) @[Cat.scala 29:58] + node _T_97 = cat(_T_96, _T_78[19]) @[Cat.scala 29:58] + node _T_98 = cat(_T_97, _T_78[20]) @[Cat.scala 29:58] + node _T_99 = cat(_T_98, _T_78[21]) @[Cat.scala 29:58] + node _T_100 = cat(_T_99, _T_78[22]) @[Cat.scala 29:58] + node _T_101 = cat(_T_100, _T_78[23]) @[Cat.scala 29:58] + node _T_102 = cat(_T_101, _T_78[24]) @[Cat.scala 29:58] + node _T_103 = cat(_T_102, _T_78[25]) @[Cat.scala 29:58] + node _T_104 = cat(_T_103, _T_78[26]) @[Cat.scala 29:58] + node _T_105 = cat(_T_104, _T_78[27]) @[Cat.scala 29:58] + node _T_106 = cat(_T_105, _T_78[28]) @[Cat.scala 29:58] + node _T_107 = cat(_T_106, _T_78[29]) @[Cat.scala 29:58] + node _T_108 = cat(_T_107, _T_78[30]) @[Cat.scala 29:58] + node _T_109 = bits(io.a_in, 31, 31) @[el2_exu_alu_ctl.scala 72:61] + wire _T_110 : UInt<1>[31] @[el2_lib.scala 178:24] + _T_110[0] <= _T_109 @[el2_lib.scala 178:24] + _T_110[1] <= _T_109 @[el2_lib.scala 178:24] + _T_110[2] <= _T_109 @[el2_lib.scala 178:24] + _T_110[3] <= _T_109 @[el2_lib.scala 178:24] + _T_110[4] <= _T_109 @[el2_lib.scala 178:24] + _T_110[5] <= _T_109 @[el2_lib.scala 178:24] + _T_110[6] <= _T_109 @[el2_lib.scala 178:24] + _T_110[7] <= _T_109 @[el2_lib.scala 178:24] + _T_110[8] <= _T_109 @[el2_lib.scala 178:24] + _T_110[9] <= _T_109 @[el2_lib.scala 178:24] + _T_110[10] <= _T_109 @[el2_lib.scala 178:24] + _T_110[11] <= _T_109 @[el2_lib.scala 178:24] + _T_110[12] <= _T_109 @[el2_lib.scala 178:24] + _T_110[13] <= _T_109 @[el2_lib.scala 178:24] + _T_110[14] <= _T_109 @[el2_lib.scala 178:24] + _T_110[15] <= _T_109 @[el2_lib.scala 178:24] + _T_110[16] <= _T_109 @[el2_lib.scala 178:24] + _T_110[17] <= _T_109 @[el2_lib.scala 178:24] + _T_110[18] <= _T_109 @[el2_lib.scala 178:24] + _T_110[19] <= _T_109 @[el2_lib.scala 178:24] + _T_110[20] <= _T_109 @[el2_lib.scala 178:24] + _T_110[21] <= _T_109 @[el2_lib.scala 178:24] + _T_110[22] <= _T_109 @[el2_lib.scala 178:24] + _T_110[23] <= _T_109 @[el2_lib.scala 178:24] + _T_110[24] <= _T_109 @[el2_lib.scala 178:24] + _T_110[25] <= _T_109 @[el2_lib.scala 178:24] + _T_110[26] <= _T_109 @[el2_lib.scala 178:24] + _T_110[27] <= _T_109 @[el2_lib.scala 178:24] + _T_110[28] <= _T_109 @[el2_lib.scala 178:24] + _T_110[29] <= _T_109 @[el2_lib.scala 178:24] + _T_110[30] <= _T_109 @[el2_lib.scala 178:24] + node _T_111 = cat(_T_110[0], _T_110[1]) @[Cat.scala 29:58] + node _T_112 = cat(_T_111, _T_110[2]) @[Cat.scala 29:58] + node _T_113 = cat(_T_112, _T_110[3]) @[Cat.scala 29:58] + node _T_114 = cat(_T_113, _T_110[4]) @[Cat.scala 29:58] + node _T_115 = cat(_T_114, _T_110[5]) @[Cat.scala 29:58] + node _T_116 = cat(_T_115, _T_110[6]) @[Cat.scala 29:58] + node _T_117 = cat(_T_116, _T_110[7]) @[Cat.scala 29:58] + node _T_118 = cat(_T_117, _T_110[8]) @[Cat.scala 29:58] + node _T_119 = cat(_T_118, _T_110[9]) @[Cat.scala 29:58] + node _T_120 = cat(_T_119, _T_110[10]) @[Cat.scala 29:58] + node _T_121 = cat(_T_120, _T_110[11]) @[Cat.scala 29:58] + node _T_122 = cat(_T_121, _T_110[12]) @[Cat.scala 29:58] + node _T_123 = cat(_T_122, _T_110[13]) @[Cat.scala 29:58] + node _T_124 = cat(_T_123, _T_110[14]) @[Cat.scala 29:58] + node _T_125 = cat(_T_124, _T_110[15]) @[Cat.scala 29:58] + node _T_126 = cat(_T_125, _T_110[16]) @[Cat.scala 29:58] + node _T_127 = cat(_T_126, _T_110[17]) @[Cat.scala 29:58] + node _T_128 = cat(_T_127, _T_110[18]) @[Cat.scala 29:58] + node _T_129 = cat(_T_128, _T_110[19]) @[Cat.scala 29:58] + node _T_130 = cat(_T_129, _T_110[20]) @[Cat.scala 29:58] + node _T_131 = cat(_T_130, _T_110[21]) @[Cat.scala 29:58] + node _T_132 = cat(_T_131, _T_110[22]) @[Cat.scala 29:58] + node _T_133 = cat(_T_132, _T_110[23]) @[Cat.scala 29:58] + node _T_134 = cat(_T_133, _T_110[24]) @[Cat.scala 29:58] + node _T_135 = cat(_T_134, _T_110[25]) @[Cat.scala 29:58] + node _T_136 = cat(_T_135, _T_110[26]) @[Cat.scala 29:58] + node _T_137 = cat(_T_136, _T_110[27]) @[Cat.scala 29:58] + node _T_138 = cat(_T_137, _T_110[28]) @[Cat.scala 29:58] + node _T_139 = cat(_T_138, _T_110[29]) @[Cat.scala 29:58] + node _T_140 = cat(_T_139, _T_110[30]) @[Cat.scala 29:58] + node _T_141 = and(_T_108, _T_140) @[el2_exu_alu_ctl.scala 72:44] + wire _T_142 : UInt<1>[31] @[el2_lib.scala 178:24] + _T_142[0] <= io.ap.sll @[el2_lib.scala 178:24] + _T_142[1] <= io.ap.sll @[el2_lib.scala 178:24] + _T_142[2] <= io.ap.sll @[el2_lib.scala 178:24] + _T_142[3] <= io.ap.sll @[el2_lib.scala 178:24] + _T_142[4] <= io.ap.sll @[el2_lib.scala 178:24] + _T_142[5] <= io.ap.sll @[el2_lib.scala 178:24] + _T_142[6] <= io.ap.sll @[el2_lib.scala 178:24] + _T_142[7] <= io.ap.sll @[el2_lib.scala 178:24] + _T_142[8] <= io.ap.sll @[el2_lib.scala 178:24] + _T_142[9] <= io.ap.sll @[el2_lib.scala 178:24] + _T_142[10] <= io.ap.sll @[el2_lib.scala 178:24] + _T_142[11] <= io.ap.sll @[el2_lib.scala 178:24] + _T_142[12] <= io.ap.sll @[el2_lib.scala 178:24] + _T_142[13] <= io.ap.sll @[el2_lib.scala 178:24] + _T_142[14] <= io.ap.sll @[el2_lib.scala 178:24] + _T_142[15] <= io.ap.sll @[el2_lib.scala 178:24] + _T_142[16] <= io.ap.sll @[el2_lib.scala 178:24] + _T_142[17] <= io.ap.sll @[el2_lib.scala 178:24] + _T_142[18] <= io.ap.sll @[el2_lib.scala 178:24] + _T_142[19] <= io.ap.sll @[el2_lib.scala 178:24] + _T_142[20] <= io.ap.sll @[el2_lib.scala 178:24] + _T_142[21] <= io.ap.sll @[el2_lib.scala 178:24] + _T_142[22] <= io.ap.sll @[el2_lib.scala 178:24] + _T_142[23] <= io.ap.sll @[el2_lib.scala 178:24] + _T_142[24] <= io.ap.sll @[el2_lib.scala 178:24] + _T_142[25] <= io.ap.sll @[el2_lib.scala 178:24] + _T_142[26] <= io.ap.sll @[el2_lib.scala 178:24] + _T_142[27] <= io.ap.sll @[el2_lib.scala 178:24] + _T_142[28] <= io.ap.sll @[el2_lib.scala 178:24] + _T_142[29] <= io.ap.sll @[el2_lib.scala 178:24] + _T_142[30] <= io.ap.sll @[el2_lib.scala 178:24] + node _T_143 = cat(_T_142[0], _T_142[1]) @[Cat.scala 29:58] + node _T_144 = cat(_T_143, _T_142[2]) @[Cat.scala 29:58] + node _T_145 = cat(_T_144, _T_142[3]) @[Cat.scala 29:58] + node _T_146 = cat(_T_145, _T_142[4]) @[Cat.scala 29:58] + node _T_147 = cat(_T_146, _T_142[5]) @[Cat.scala 29:58] + node _T_148 = cat(_T_147, _T_142[6]) @[Cat.scala 29:58] + node _T_149 = cat(_T_148, _T_142[7]) @[Cat.scala 29:58] + node _T_150 = cat(_T_149, _T_142[8]) @[Cat.scala 29:58] + node _T_151 = cat(_T_150, _T_142[9]) @[Cat.scala 29:58] + node _T_152 = cat(_T_151, _T_142[10]) @[Cat.scala 29:58] + node _T_153 = cat(_T_152, _T_142[11]) @[Cat.scala 29:58] + node _T_154 = cat(_T_153, _T_142[12]) @[Cat.scala 29:58] + node _T_155 = cat(_T_154, _T_142[13]) @[Cat.scala 29:58] + node _T_156 = cat(_T_155, _T_142[14]) @[Cat.scala 29:58] + node _T_157 = cat(_T_156, _T_142[15]) @[Cat.scala 29:58] + node _T_158 = cat(_T_157, _T_142[16]) @[Cat.scala 29:58] + node _T_159 = cat(_T_158, _T_142[17]) @[Cat.scala 29:58] + node _T_160 = cat(_T_159, _T_142[18]) @[Cat.scala 29:58] + node _T_161 = cat(_T_160, _T_142[19]) @[Cat.scala 29:58] + node _T_162 = cat(_T_161, _T_142[20]) @[Cat.scala 29:58] + node _T_163 = cat(_T_162, _T_142[21]) @[Cat.scala 29:58] + node _T_164 = cat(_T_163, _T_142[22]) @[Cat.scala 29:58] + node _T_165 = cat(_T_164, _T_142[23]) @[Cat.scala 29:58] + node _T_166 = cat(_T_165, _T_142[24]) @[Cat.scala 29:58] + node _T_167 = cat(_T_166, _T_142[25]) @[Cat.scala 29:58] + node _T_168 = cat(_T_167, _T_142[26]) @[Cat.scala 29:58] + node _T_169 = cat(_T_168, _T_142[27]) @[Cat.scala 29:58] + node _T_170 = cat(_T_169, _T_142[28]) @[Cat.scala 29:58] + node _T_171 = cat(_T_170, _T_142[29]) @[Cat.scala 29:58] + node _T_172 = cat(_T_171, _T_142[30]) @[Cat.scala 29:58] + node _T_173 = bits(io.a_in, 30, 0) @[el2_exu_alu_ctl.scala 72:99] + node _T_174 = and(_T_172, _T_173) @[el2_exu_alu_ctl.scala 72:90] + node _T_175 = or(_T_141, _T_174) @[el2_exu_alu_ctl.scala 72:68] + node _T_176 = cat(_T_175, io.a_in) @[Cat.scala 29:58] + shift_extend <= _T_176 @[el2_exu_alu_ctl.scala 72:16] + wire shift_long : UInt<63> + shift_long <= UInt<1>("h00") + node _T_177 = dshr(shift_extend, shift_amount) @[el2_exu_alu_ctl.scala 75:32] + shift_long <= _T_177 @[el2_exu_alu_ctl.scala 75:14] + node _T_178 = bits(shift_long, 31, 0) @[el2_exu_alu_ctl.scala 77:27] + node _T_179 = bits(shift_mask, 31, 0) @[el2_exu_alu_ctl.scala 77:46] + node sout = and(_T_178, _T_179) @[el2_exu_alu_ctl.scala 77:34] + node _T_180 = or(io.ap.sll, io.ap.srl) @[el2_exu_alu_ctl.scala 80:41] + node sel_shift = or(_T_180, io.ap.sra) @[el2_exu_alu_ctl.scala 80:53] + node _T_181 = or(io.ap.add, io.ap.sub) @[el2_exu_alu_ctl.scala 81:41] + node _T_182 = not(io.ap.slt) @[el2_exu_alu_ctl.scala 81:56] + node sel_adder = and(_T_181, _T_182) @[el2_exu_alu_ctl.scala 81:54] + node _T_183 = or(io.ap.jal, io.pp_in.pcall) @[el2_exu_alu_ctl.scala 82:41] + node _T_184 = or(_T_183, io.pp_in.pja) @[el2_exu_alu_ctl.scala 82:58] + node sel_pc = or(_T_184, io.pp_in.pret) @[el2_exu_alu_ctl.scala 82:73] + node _T_185 = bits(io.ap.csr_imm, 0, 0) @[el2_exu_alu_ctl.scala 83:47] + node csr_write_data = mux(_T_185, io.b_in, io.a_in) @[el2_exu_alu_ctl.scala 83:32] + node slt_one = and(io.ap.slt, lt) @[el2_exu_alu_ctl.scala 85:40] + node _T_186 = cat(io.pc_in, UInt<1>("h00")) @[Cat.scala 29:58] + node _T_187 = cat(io.brimm_in, UInt<1>("h00")) @[Cat.scala 29:58] + node _T_188 = bits(_T_186, 12, 1) @[el2_lib.scala 201:24] + node _T_189 = bits(_T_187, 12, 1) @[el2_lib.scala 201:40] + node _T_190 = add(_T_188, _T_189) @[el2_lib.scala 201:31] + node _T_191 = bits(_T_186, 31, 13) @[el2_lib.scala 202:20] + node _T_192 = add(_T_191, UInt<1>("h01")) @[el2_lib.scala 202:27] + node _T_193 = tail(_T_192, 1) @[el2_lib.scala 202:27] + node _T_194 = bits(_T_186, 31, 13) @[el2_lib.scala 203:20] + node _T_195 = sub(_T_194, UInt<1>("h01")) @[el2_lib.scala 203:27] + node _T_196 = tail(_T_195, 1) @[el2_lib.scala 203:27] + node _T_197 = bits(_T_187, 12, 12) @[el2_lib.scala 204:22] + node _T_198 = bits(_T_190, 12, 12) @[el2_lib.scala 205:38] + node _T_199 = eq(_T_198, UInt<1>("h00")) @[el2_lib.scala 205:27] + node _T_200 = xor(_T_197, _T_199) @[el2_lib.scala 205:25] + node _T_201 = bits(_T_200, 0, 0) @[el2_lib.scala 205:63] + node _T_202 = bits(_T_186, 31, 13) @[el2_lib.scala 205:75] + node _T_203 = eq(_T_197, UInt<1>("h00")) @[el2_lib.scala 206:8] + node _T_204 = bits(_T_190, 12, 12) @[el2_lib.scala 206:26] + node _T_205 = and(_T_203, _T_204) @[el2_lib.scala 206:14] + node _T_206 = bits(_T_205, 0, 0) @[el2_lib.scala 206:51] + node _T_207 = bits(_T_190, 12, 12) @[el2_lib.scala 207:26] + node _T_208 = eq(_T_207, UInt<1>("h00")) @[el2_lib.scala 207:15] + node _T_209 = and(_T_197, _T_208) @[el2_lib.scala 207:13] + node _T_210 = bits(_T_209, 0, 0) @[el2_lib.scala 207:51] + node _T_211 = mux(_T_201, _T_202, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_212 = mux(_T_206, _T_193, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_213 = mux(_T_210, _T_196, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_214 = or(_T_211, _T_212) @[Mux.scala 27:72] + node _T_215 = or(_T_214, _T_213) @[Mux.scala 27:72] + wire _T_216 : UInt<19> @[Mux.scala 27:72] + _T_216 <= _T_215 @[Mux.scala 27:72] + node _T_217 = bits(_T_190, 11, 0) @[el2_lib.scala 207:83] + node _T_218 = cat(_T_216, _T_217) @[Cat.scala 29:58] + node pcout = cat(_T_218, UInt<1>("h00")) @[Cat.scala 29:58] + node _T_219 = bits(lout, 31, 0) @[el2_exu_alu_ctl.scala 91:32] + node _T_220 = bits(sel_shift, 0, 0) @[el2_exu_alu_ctl.scala 92:15] + node _T_221 = bits(sout, 31, 0) @[el2_exu_alu_ctl.scala 92:41] + node _T_222 = bits(sel_adder, 0, 0) @[el2_exu_alu_ctl.scala 93:15] + node _T_223 = bits(aout, 31, 0) @[el2_exu_alu_ctl.scala 93:41] + node _T_224 = bits(sel_pc, 0, 0) @[el2_exu_alu_ctl.scala 94:12] + node _T_225 = bits(io.ap.csr_write, 0, 0) @[el2_exu_alu_ctl.scala 95:21] + node _T_226 = bits(csr_write_data, 31, 0) @[el2_exu_alu_ctl.scala 95:51] + node _T_227 = bits(slt_one, 0, 0) @[el2_exu_alu_ctl.scala 96:13] + node _T_228 = cat(UInt<31>("h00"), slt_one) @[Cat.scala 29:58] + node _T_229 = mux(_T_227, _T_228, _T_219) @[Mux.scala 98:16] + node _T_230 = mux(_T_225, _T_226, _T_229) @[Mux.scala 98:16] + node _T_231 = mux(_T_224, pcout, _T_230) @[Mux.scala 98:16] + node _T_232 = mux(_T_222, _T_223, _T_231) @[Mux.scala 98:16] + node _T_233 = mux(_T_220, _T_221, _T_232) @[Mux.scala 98:16] + result <= _T_233 @[el2_exu_alu_ctl.scala 91:16] + node _T_234 = or(io.ap.jal, io.pp_in.pcall) @[el2_exu_alu_ctl.scala 100:45] + node _T_235 = or(_T_234, io.pp_in.pja) @[el2_exu_alu_ctl.scala 101:20] + node any_jal = or(_T_235, io.pp_in.pret) @[el2_exu_alu_ctl.scala 102:20] + node _T_236 = and(io.ap.beq, eq) @[el2_exu_alu_ctl.scala 105:40] + node _T_237 = and(io.ap.bne, ne) @[el2_exu_alu_ctl.scala 105:59] + node _T_238 = or(_T_236, _T_237) @[el2_exu_alu_ctl.scala 105:46] + node _T_239 = and(io.ap.blt, lt) @[el2_exu_alu_ctl.scala 105:85] + node _T_240 = or(_T_238, _T_239) @[el2_exu_alu_ctl.scala 105:72] + node _T_241 = and(io.ap.bge, ge) @[el2_exu_alu_ctl.scala 105:104] + node _T_242 = or(_T_240, _T_241) @[el2_exu_alu_ctl.scala 105:91] + node actual_taken = or(_T_242, any_jal) @[el2_exu_alu_ctl.scala 105:110] + node _T_243 = and(io.valid_in, io.ap.predict_nt) @[el2_exu_alu_ctl.scala 110:42] + node _T_244 = eq(actual_taken, UInt<1>("h00")) @[el2_exu_alu_ctl.scala 110:63] + node _T_245 = and(_T_243, _T_244) @[el2_exu_alu_ctl.scala 110:61] + node _T_246 = eq(any_jal, UInt<1>("h00")) @[el2_exu_alu_ctl.scala 110:79] + node _T_247 = and(_T_245, _T_246) @[el2_exu_alu_ctl.scala 110:77] + node _T_248 = and(io.valid_in, io.ap.predict_t) @[el2_exu_alu_ctl.scala 110:104] + node _T_249 = and(_T_248, actual_taken) @[el2_exu_alu_ctl.scala 110:123] + node _T_250 = eq(any_jal, UInt<1>("h00")) @[el2_exu_alu_ctl.scala 110:141] + node _T_251 = and(_T_249, _T_250) @[el2_exu_alu_ctl.scala 110:139] + node _T_252 = or(_T_247, _T_251) @[el2_exu_alu_ctl.scala 110:89] + io.pred_correct_out <= _T_252 @[el2_exu_alu_ctl.scala 110:26] + node _T_253 = bits(any_jal, 0, 0) @[el2_exu_alu_ctl.scala 112:37] + node _T_254 = bits(aout, 31, 1) @[el2_exu_alu_ctl.scala 112:49] + node _T_255 = bits(pcout, 31, 1) @[el2_exu_alu_ctl.scala 112:62] + node _T_256 = mux(_T_253, _T_254, _T_255) @[el2_exu_alu_ctl.scala 112:28] + io.flush_path_out <= _T_256 @[el2_exu_alu_ctl.scala 112:22] + node _T_257 = eq(actual_taken, UInt<1>("h00")) @[el2_exu_alu_ctl.scala 115:47] + node _T_258 = and(io.ap.predict_t, _T_257) @[el2_exu_alu_ctl.scala 115:45] + node _T_259 = and(io.ap.predict_nt, actual_taken) @[el2_exu_alu_ctl.scala 115:82] + node cond_mispredict = or(_T_258, _T_259) @[el2_exu_alu_ctl.scala 115:62] + node _T_260 = bits(io.pp_in.prett, 31, 1) @[el2_exu_alu_ctl.scala 118:61] + node _T_261 = bits(aout, 31, 1) @[el2_exu_alu_ctl.scala 118:76] + node _T_262 = neq(_T_260, _T_261) @[el2_exu_alu_ctl.scala 118:68] + node target_mispredict = and(io.pp_in.pret, _T_262) @[el2_exu_alu_ctl.scala 118:44] + node _T_263 = or(io.ap.jal, cond_mispredict) @[el2_exu_alu_ctl.scala 120:42] + node _T_264 = or(_T_263, target_mispredict) @[el2_exu_alu_ctl.scala 120:60] + node _T_265 = and(_T_264, io.valid_in) @[el2_exu_alu_ctl.scala 120:81] + node _T_266 = eq(io.flush_upper_x, UInt<1>("h00")) @[el2_exu_alu_ctl.scala 120:97] + node _T_267 = and(_T_265, _T_266) @[el2_exu_alu_ctl.scala 120:95] + node _T_268 = eq(io.flush_lower_r, UInt<1>("h00")) @[el2_exu_alu_ctl.scala 120:119] + node _T_269 = and(_T_267, _T_268) @[el2_exu_alu_ctl.scala 120:117] + io.flush_upper_out <= _T_269 @[el2_exu_alu_ctl.scala 120:26] + node _T_270 = or(io.ap.jal, cond_mispredict) @[el2_exu_alu_ctl.scala 122:42] + node _T_271 = or(_T_270, target_mispredict) @[el2_exu_alu_ctl.scala 122:60] + node _T_272 = and(_T_271, io.valid_in) @[el2_exu_alu_ctl.scala 122:81] + node _T_273 = eq(io.flush_upper_x, UInt<1>("h00")) @[el2_exu_alu_ctl.scala 122:97] + node _T_274 = and(_T_272, _T_273) @[el2_exu_alu_ctl.scala 122:95] + node _T_275 = or(_T_274, io.flush_lower_r) @[el2_exu_alu_ctl.scala 122:117] + io.flush_final_out <= _T_275 @[el2_exu_alu_ctl.scala 122:26] + wire newhist : UInt<2> + newhist <= UInt<1>("h00") + node _T_276 = bits(io.pp_in.hist, 1, 1) @[el2_exu_alu_ctl.scala 126:35] + node _T_277 = bits(io.pp_in.hist, 0, 0) @[el2_exu_alu_ctl.scala 126:55] + node _T_278 = and(_T_276, _T_277) @[el2_exu_alu_ctl.scala 126:39] + node _T_279 = bits(io.pp_in.hist, 0, 0) @[el2_exu_alu_ctl.scala 126:77] + node _T_280 = not(_T_279) @[el2_exu_alu_ctl.scala 126:63] + node _T_281 = and(_T_280, actual_taken) @[el2_exu_alu_ctl.scala 126:81] + node _T_282 = or(_T_278, _T_281) @[el2_exu_alu_ctl.scala 126:60] + node _T_283 = bits(io.pp_in.hist, 1, 1) @[el2_exu_alu_ctl.scala 127:20] + node _T_284 = not(_T_283) @[el2_exu_alu_ctl.scala 127:6] + node _T_285 = not(actual_taken) @[el2_exu_alu_ctl.scala 127:26] + node _T_286 = and(_T_284, _T_285) @[el2_exu_alu_ctl.scala 127:24] + node _T_287 = bits(io.pp_in.hist, 1, 1) @[el2_exu_alu_ctl.scala 127:58] + node _T_288 = and(_T_287, actual_taken) @[el2_exu_alu_ctl.scala 127:62] + node _T_289 = or(_T_286, _T_288) @[el2_exu_alu_ctl.scala 127:42] + node _T_290 = cat(_T_282, _T_289) @[Cat.scala 29:58] + newhist <= _T_290 @[el2_exu_alu_ctl.scala 126:14] + io.predict_p_out.way <= io.pp_in.way @[el2_exu_alu_ctl.scala 129:30] + io.predict_p_out.pja <= io.pp_in.pja @[el2_exu_alu_ctl.scala 129:30] + io.predict_p_out.pret <= io.pp_in.pret @[el2_exu_alu_ctl.scala 129:30] + io.predict_p_out.pcall <= io.pp_in.pcall @[el2_exu_alu_ctl.scala 129:30] + io.predict_p_out.prett <= io.pp_in.prett @[el2_exu_alu_ctl.scala 129:30] + io.predict_p_out.br_start_error <= io.pp_in.br_start_error @[el2_exu_alu_ctl.scala 129:30] + io.predict_p_out.br_error <= io.pp_in.br_error @[el2_exu_alu_ctl.scala 129:30] + io.predict_p_out.valid <= io.pp_in.valid @[el2_exu_alu_ctl.scala 129:30] + io.predict_p_out.toffset <= io.pp_in.toffset @[el2_exu_alu_ctl.scala 129:30] + io.predict_p_out.hist <= io.pp_in.hist @[el2_exu_alu_ctl.scala 129:30] + io.predict_p_out.pc4 <= io.pp_in.pc4 @[el2_exu_alu_ctl.scala 129:30] + io.predict_p_out.boffset <= io.pp_in.boffset @[el2_exu_alu_ctl.scala 129:30] + io.predict_p_out.ataken <= io.pp_in.ataken @[el2_exu_alu_ctl.scala 129:30] + io.predict_p_out.misp <= io.pp_in.misp @[el2_exu_alu_ctl.scala 129:30] + node _T_291 = not(io.flush_upper_x) @[el2_exu_alu_ctl.scala 130:33] + node _T_292 = not(io.flush_lower_r) @[el2_exu_alu_ctl.scala 130:53] + node _T_293 = and(_T_291, _T_292) @[el2_exu_alu_ctl.scala 130:51] + node _T_294 = or(cond_mispredict, target_mispredict) @[el2_exu_alu_ctl.scala 130:90] + node _T_295 = and(_T_293, _T_294) @[el2_exu_alu_ctl.scala 130:71] + io.predict_p_out.misp <= _T_295 @[el2_exu_alu_ctl.scala 130:30] + io.predict_p_out.ataken <= actual_taken @[el2_exu_alu_ctl.scala 131:30] + io.predict_p_out.hist <= newhist @[el2_exu_alu_ctl.scala 132:30] + diff --git a/el2_exu_alu_ctl.v b/el2_exu_alu_ctl.v new file mode 100644 index 00000000..42d73fdc --- /dev/null +++ b/el2_exu_alu_ctl.v @@ -0,0 +1,301 @@ +module el2_exu_alu_ctl( + input clock, + input reset, + input io_scan_mode, + input io_flush_upper_x, + input io_flush_lower_r, + input io_enable, + input io_valid_in, + input io_ap_land, + input io_ap_lor, + input io_ap_lxor, + input io_ap_sll, + input io_ap_srl, + input io_ap_sra, + input io_ap_beq, + input io_ap_bne, + input io_ap_blt, + input io_ap_bge, + input io_ap_add, + input io_ap_sub, + input io_ap_slt, + input io_ap_unsign, + input io_ap_jal, + input io_ap_predict_t, + input io_ap_predict_nt, + input io_ap_csr_write, + input io_ap_csr_imm, + input io_csr_ren_in, + input [31:0] io_a_in, + input [31:0] io_b_in, + input [30:0] io_pc_in, + input io_pp_in_misp, + input io_pp_in_ataken, + input io_pp_in_boffset, + input io_pp_in_pc4, + input [1:0] io_pp_in_hist, + input [11:0] io_pp_in_toffset, + input io_pp_in_valid, + input io_pp_in_br_error, + input io_pp_in_br_start_error, + input [31:0] io_pp_in_prett, + input io_pp_in_pcall, + input io_pp_in_pret, + input io_pp_in_pja, + input io_pp_in_way, + input [11:0] io_brimm_in, + output [31:0] io_result_ff, + output io_flush_upper_out, + output io_flush_final_out, + output [30:0] io_flush_path_out, + output [30:0] io_pc_ff, + output io_pred_correct_out, + output io_predict_p_out_misp, + output io_predict_p_out_ataken, + output io_predict_p_out_boffset, + output io_predict_p_out_pc4, + output [1:0] io_predict_p_out_hist, + output [11:0] io_predict_p_out_toffset, + output io_predict_p_out_valid, + output io_predict_p_out_br_error, + output io_predict_p_out_br_start_error, + output [31:0] io_predict_p_out_prett, + output io_predict_p_out_pcall, + output io_predict_p_out_pret, + output io_predict_p_out_pja, + output io_predict_p_out_way +); +`ifdef RANDOMIZE_REG_INIT + reg [31:0] _RAND_0; + reg [31:0] _RAND_1; +`endif // RANDOMIZE_REG_INIT + reg [30:0] _T; // @[Reg.scala 27:20] + reg [31:0] _T_1; // @[Reg.scala 27:20] + wire _T_180 = io_ap_sll | io_ap_srl; // @[el2_exu_alu_ctl.scala 80:41] + wire sel_shift = _T_180 | io_ap_sra; // @[el2_exu_alu_ctl.scala 80:53] + wire [9:0] _T_87 = {io_ap_sra,io_ap_sra,io_ap_sra,io_ap_sra,io_ap_sra,io_ap_sra,io_ap_sra,io_ap_sra,io_ap_sra,io_ap_sra}; // @[Cat.scala 29:58] + wire [18:0] _T_96 = {_T_87,io_ap_sra,io_ap_sra,io_ap_sra,io_ap_sra,io_ap_sra,io_ap_sra,io_ap_sra,io_ap_sra,io_ap_sra}; // @[Cat.scala 29:58] + wire [27:0] _T_105 = {_T_96,io_ap_sra,io_ap_sra,io_ap_sra,io_ap_sra,io_ap_sra,io_ap_sra,io_ap_sra,io_ap_sra,io_ap_sra}; // @[Cat.scala 29:58] + wire [30:0] _T_108 = {_T_105,io_ap_sra,io_ap_sra,io_ap_sra}; // @[Cat.scala 29:58] + wire [9:0] _T_119 = {io_a_in[31],io_a_in[31],io_a_in[31],io_a_in[31],io_a_in[31],io_a_in[31],io_a_in[31],io_a_in[31],io_a_in[31],io_a_in[31]}; // @[Cat.scala 29:58] + wire [18:0] _T_128 = {_T_119,io_a_in[31],io_a_in[31],io_a_in[31],io_a_in[31],io_a_in[31],io_a_in[31],io_a_in[31],io_a_in[31],io_a_in[31]}; // @[Cat.scala 29:58] + wire [27:0] _T_137 = {_T_128,io_a_in[31],io_a_in[31],io_a_in[31],io_a_in[31],io_a_in[31],io_a_in[31],io_a_in[31],io_a_in[31],io_a_in[31]}; // @[Cat.scala 29:58] + wire [30:0] _T_140 = {_T_137,io_a_in[31],io_a_in[31],io_a_in[31]}; // @[Cat.scala 29:58] + wire [30:0] _T_141 = _T_108 & _T_140; // @[el2_exu_alu_ctl.scala 72:44] + wire [4:0] _T_146 = {io_ap_sll,io_ap_sll,io_ap_sll,io_ap_sll,io_ap_sll}; // @[Cat.scala 29:58] + wire [9:0] _T_151 = {io_ap_sll,io_ap_sll,io_ap_sll,io_ap_sll,io_ap_sll,io_ap_sll,io_ap_sll,io_ap_sll,io_ap_sll,io_ap_sll}; // @[Cat.scala 29:58] + wire [18:0] _T_160 = {_T_151,io_ap_sll,io_ap_sll,io_ap_sll,io_ap_sll,io_ap_sll,io_ap_sll,io_ap_sll,io_ap_sll,io_ap_sll}; // @[Cat.scala 29:58] + wire [27:0] _T_169 = {_T_160,io_ap_sll,io_ap_sll,io_ap_sll,io_ap_sll,io_ap_sll,io_ap_sll,io_ap_sll,io_ap_sll,io_ap_sll}; // @[Cat.scala 29:58] + wire [30:0] _T_172 = {_T_169,io_ap_sll,io_ap_sll,io_ap_sll}; // @[Cat.scala 29:58] + wire [30:0] _T_174 = _T_172 & io_a_in[30:0]; // @[el2_exu_alu_ctl.scala 72:90] + wire [30:0] _T_175 = _T_141 | _T_174; // @[el2_exu_alu_ctl.scala 72:68] + wire [62:0] shift_extend = {_T_175,io_a_in}; // @[Cat.scala 29:58] + wire [5:0] _T_56 = {1'h0,io_b_in[4:0]}; // @[Cat.scala 29:58] + wire [5:0] _T_58 = 6'h20 - _T_56; // @[el2_exu_alu_ctl.scala 64:38] + wire [5:0] _T_65 = io_ap_sll ? _T_58 : 6'h0; // @[Mux.scala 27:72] + wire [5:0] _T_66 = io_ap_srl ? _T_56 : 6'h0; // @[Mux.scala 27:72] + wire [5:0] _T_68 = _T_65 | _T_66; // @[Mux.scala 27:72] + wire [5:0] _T_67 = io_ap_sra ? _T_56 : 6'h0; // @[Mux.scala 27:72] + wire [5:0] shift_amount = _T_68 | _T_67; // @[Mux.scala 27:72] + wire [62:0] shift_long = shift_extend >> shift_amount; // @[el2_exu_alu_ctl.scala 75:32] + wire [4:0] _T_76 = _T_146 & io_b_in[4:0]; // @[el2_exu_alu_ctl.scala 69:55] + wire [62:0] _T_77 = 63'hffffffff << _T_76; // @[el2_exu_alu_ctl.scala 69:33] + wire [31:0] shift_mask = _T_77[31:0]; // @[el2_exu_alu_ctl.scala 69:14] + wire [31:0] sout = shift_long[31:0] & shift_mask; // @[el2_exu_alu_ctl.scala 77:34] + wire _T_181 = io_ap_add | io_ap_sub; // @[el2_exu_alu_ctl.scala 81:41] + wire _T_182 = ~io_ap_slt; // @[el2_exu_alu_ctl.scala 81:56] + wire sel_adder = _T_181 & _T_182; // @[el2_exu_alu_ctl.scala 81:54] + wire [32:0] _T_5 = {1'h0,io_a_in}; // @[Cat.scala 29:58] + wire [31:0] _T_6 = ~io_b_in; // @[el2_exu_alu_ctl.scala 43:63] + wire [32:0] _T_7 = {1'h0,_T_6}; // @[Cat.scala 29:58] + wire [32:0] _T_9 = _T_5 + _T_7; // @[el2_exu_alu_ctl.scala 43:48] + wire [32:0] _T_11 = _T_9 + 33'h1; // @[el2_exu_alu_ctl.scala 43:73] + wire [32:0] _T_18 = io_ap_sub ? _T_11 : 33'h0; // @[Mux.scala 27:72] + wire _T_13 = ~io_ap_sub; // @[el2_exu_alu_ctl.scala 44:5] + wire [32:0] _T_15 = {1'h0,io_b_in}; // @[Cat.scala 29:58] + wire [32:0] _T_17 = _T_5 + _T_15; // @[el2_exu_alu_ctl.scala 44:48] + wire [32:0] _T_19 = _T_13 ? _T_17 : 33'h0; // @[Mux.scala 27:72] + wire [32:0] aout = _T_18 | _T_19; // @[Mux.scala 27:72] + wire _T_183 = io_ap_jal | io_pp_in_pcall; // @[el2_exu_alu_ctl.scala 82:41] + wire _T_184 = _T_183 | io_pp_in_pja; // @[el2_exu_alu_ctl.scala 82:58] + wire sel_pc = _T_184 | io_pp_in_pret; // @[el2_exu_alu_ctl.scala 82:73] + wire [12:0] _T_187 = {io_brimm_in,1'h0}; // @[Cat.scala 29:58] + wire [31:0] _T_186 = {io_pc_in,1'h0}; // @[Cat.scala 29:58] + wire [12:0] _T_190 = _T_186[12:1] + _T_187[12:1]; // @[el2_lib.scala 201:31] + wire _T_199 = ~_T_190[12]; // @[el2_lib.scala 205:27] + wire _T_200 = _T_187[12] ^ _T_199; // @[el2_lib.scala 205:25] + wire [18:0] _T_211 = _T_200 ? _T_186[31:13] : 19'h0; // @[Mux.scala 27:72] + wire _T_203 = ~_T_187[12]; // @[el2_lib.scala 206:8] + wire _T_205 = _T_203 & _T_190[12]; // @[el2_lib.scala 206:14] + wire [18:0] _T_193 = _T_186[31:13] + 19'h1; // @[el2_lib.scala 202:27] + wire [18:0] _T_212 = _T_205 ? _T_193 : 19'h0; // @[Mux.scala 27:72] + wire [18:0] _T_214 = _T_211 | _T_212; // @[Mux.scala 27:72] + wire _T_209 = _T_187[12] & _T_199; // @[el2_lib.scala 207:13] + wire [18:0] _T_196 = _T_186[31:13] - 19'h1; // @[el2_lib.scala 203:27] + wire [18:0] _T_213 = _T_209 ? _T_196 : 19'h0; // @[Mux.scala 27:72] + wire [18:0] _T_215 = _T_214 | _T_213; // @[Mux.scala 27:72] + wire [31:0] pcout = {_T_215,_T_190[11:0],1'h0}; // @[Cat.scala 29:58] + wire _T_35 = ~io_ap_unsign; // @[el2_exu_alu_ctl.scala 53:30] + wire neg = aout[31]; // @[el2_exu_alu_ctl.scala 52:34] + wire _T_23 = ~io_a_in[31]; // @[el2_exu_alu_ctl.scala 48:14] + wire [31:0] bm = io_ap_sub ? _T_6 : io_b_in; // @[el2_exu_alu_ctl.scala 39:17] + wire _T_25 = ~bm[31]; // @[el2_exu_alu_ctl.scala 48:29] + wire _T_26 = _T_23 & _T_25; // @[el2_exu_alu_ctl.scala 48:27] + wire _T_28 = _T_26 & neg; // @[el2_exu_alu_ctl.scala 48:37] + wire _T_31 = io_a_in[31] & bm[31]; // @[el2_exu_alu_ctl.scala 48:66] + wire _T_33 = ~neg; // @[el2_exu_alu_ctl.scala 48:78] + wire _T_34 = _T_31 & _T_33; // @[el2_exu_alu_ctl.scala 48:76] + wire ov = _T_28 | _T_34; // @[el2_exu_alu_ctl.scala 48:50] + wire _T_36 = neg ^ ov; // @[el2_exu_alu_ctl.scala 53:51] + wire _T_37 = _T_35 & _T_36; // @[el2_exu_alu_ctl.scala 53:44] + wire cout = aout[32]; // @[el2_exu_alu_ctl.scala 46:18] + wire _T_38 = ~cout; // @[el2_exu_alu_ctl.scala 53:78] + wire _T_39 = io_ap_unsign & _T_38; // @[el2_exu_alu_ctl.scala 53:76] + wire lt = _T_37 | _T_39; // @[el2_exu_alu_ctl.scala 53:58] + wire slt_one = io_ap_slt & lt; // @[el2_exu_alu_ctl.scala 85:40] + wire [31:0] _T_228 = {31'h0,slt_one}; // @[Cat.scala 29:58] + wire [31:0] _T_47 = io_csr_ren_in ? io_b_in : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_42 = io_a_in & io_b_in; // @[el2_exu_alu_ctl.scala 59:39] + wire [31:0] _T_48 = io_ap_land ? _T_42 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_51 = _T_47 | _T_48; // @[Mux.scala 27:72] + wire [31:0] _T_44 = io_a_in | io_b_in; // @[el2_exu_alu_ctl.scala 60:39] + wire [31:0] _T_49 = io_ap_lor ? _T_44 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_52 = _T_51 | _T_49; // @[Mux.scala 27:72] + wire [31:0] _T_46 = io_a_in ^ io_b_in; // @[el2_exu_alu_ctl.scala 61:39] + wire [31:0] _T_50 = io_ap_lxor ? _T_46 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] lout = _T_52 | _T_50; // @[Mux.scala 27:72] + wire eq = io_a_in == io_b_in; // @[el2_exu_alu_ctl.scala 50:38] + wire ne = ~eq; // @[el2_exu_alu_ctl.scala 51:29] + wire ge = ~lt; // @[el2_exu_alu_ctl.scala 54:29] + wire _T_236 = io_ap_beq & eq; // @[el2_exu_alu_ctl.scala 105:40] + wire _T_237 = io_ap_bne & ne; // @[el2_exu_alu_ctl.scala 105:59] + wire _T_238 = _T_236 | _T_237; // @[el2_exu_alu_ctl.scala 105:46] + wire _T_239 = io_ap_blt & lt; // @[el2_exu_alu_ctl.scala 105:85] + wire _T_240 = _T_238 | _T_239; // @[el2_exu_alu_ctl.scala 105:72] + wire _T_241 = io_ap_bge & ge; // @[el2_exu_alu_ctl.scala 105:104] + wire _T_242 = _T_240 | _T_241; // @[el2_exu_alu_ctl.scala 105:91] + wire actual_taken = _T_242 | sel_pc; // @[el2_exu_alu_ctl.scala 105:110] + wire _T_243 = io_valid_in & io_ap_predict_nt; // @[el2_exu_alu_ctl.scala 110:42] + wire _T_244 = ~actual_taken; // @[el2_exu_alu_ctl.scala 110:63] + wire _T_245 = _T_243 & _T_244; // @[el2_exu_alu_ctl.scala 110:61] + wire _T_246 = ~sel_pc; // @[el2_exu_alu_ctl.scala 110:79] + wire _T_247 = _T_245 & _T_246; // @[el2_exu_alu_ctl.scala 110:77] + wire _T_248 = io_valid_in & io_ap_predict_t; // @[el2_exu_alu_ctl.scala 110:104] + wire _T_249 = _T_248 & actual_taken; // @[el2_exu_alu_ctl.scala 110:123] + wire _T_251 = _T_249 & _T_246; // @[el2_exu_alu_ctl.scala 110:139] + wire _T_258 = io_ap_predict_t & _T_244; // @[el2_exu_alu_ctl.scala 115:45] + wire _T_259 = io_ap_predict_nt & actual_taken; // @[el2_exu_alu_ctl.scala 115:82] + wire cond_mispredict = _T_258 | _T_259; // @[el2_exu_alu_ctl.scala 115:62] + wire _T_262 = io_pp_in_prett[31:1] != aout[31:1]; // @[el2_exu_alu_ctl.scala 118:68] + wire target_mispredict = io_pp_in_pret & _T_262; // @[el2_exu_alu_ctl.scala 118:44] + wire _T_263 = io_ap_jal | cond_mispredict; // @[el2_exu_alu_ctl.scala 120:42] + wire _T_264 = _T_263 | target_mispredict; // @[el2_exu_alu_ctl.scala 120:60] + wire _T_265 = _T_264 & io_valid_in; // @[el2_exu_alu_ctl.scala 120:81] + wire _T_266 = ~io_flush_upper_x; // @[el2_exu_alu_ctl.scala 120:97] + wire _T_267 = _T_265 & _T_266; // @[el2_exu_alu_ctl.scala 120:95] + wire _T_268 = ~io_flush_lower_r; // @[el2_exu_alu_ctl.scala 120:119] + wire _T_278 = io_pp_in_hist[1] & io_pp_in_hist[0]; // @[el2_exu_alu_ctl.scala 126:39] + wire _T_280 = ~io_pp_in_hist[0]; // @[el2_exu_alu_ctl.scala 126:63] + wire _T_281 = _T_280 & actual_taken; // @[el2_exu_alu_ctl.scala 126:81] + wire _T_282 = _T_278 | _T_281; // @[el2_exu_alu_ctl.scala 126:60] + wire _T_284 = ~io_pp_in_hist[1]; // @[el2_exu_alu_ctl.scala 127:6] + wire _T_286 = _T_284 & _T_244; // @[el2_exu_alu_ctl.scala 127:24] + wire _T_288 = io_pp_in_hist[1] & actual_taken; // @[el2_exu_alu_ctl.scala 127:62] + wire _T_289 = _T_286 | _T_288; // @[el2_exu_alu_ctl.scala 127:42] + wire _T_293 = _T_266 & _T_268; // @[el2_exu_alu_ctl.scala 130:51] + wire _T_294 = cond_mispredict | target_mispredict; // @[el2_exu_alu_ctl.scala 130:90] + assign io_result_ff = _T_1; // @[el2_exu_alu_ctl.scala 37:16] + assign io_flush_upper_out = _T_267 & _T_268; // @[el2_exu_alu_ctl.scala 120:26] + assign io_flush_final_out = _T_267 | io_flush_lower_r; // @[el2_exu_alu_ctl.scala 122:26] + assign io_flush_path_out = sel_pc ? aout[31:1] : pcout[31:1]; // @[el2_exu_alu_ctl.scala 112:22] + assign io_pc_ff = _T; // @[el2_exu_alu_ctl.scala 35:12] + assign io_pred_correct_out = _T_247 | _T_251; // @[el2_exu_alu_ctl.scala 110:26] + assign io_predict_p_out_misp = _T_293 & _T_294; // @[el2_exu_alu_ctl.scala 129:30 el2_exu_alu_ctl.scala 130:30] + assign io_predict_p_out_ataken = _T_242 | sel_pc; // @[el2_exu_alu_ctl.scala 129:30 el2_exu_alu_ctl.scala 131:30] + assign io_predict_p_out_boffset = io_pp_in_boffset; // @[el2_exu_alu_ctl.scala 129:30] + assign io_predict_p_out_pc4 = io_pp_in_pc4; // @[el2_exu_alu_ctl.scala 129:30] + assign io_predict_p_out_hist = {_T_282,_T_289}; // @[el2_exu_alu_ctl.scala 129:30 el2_exu_alu_ctl.scala 132:30] + assign io_predict_p_out_toffset = io_pp_in_toffset; // @[el2_exu_alu_ctl.scala 129:30] + assign io_predict_p_out_valid = io_pp_in_valid; // @[el2_exu_alu_ctl.scala 129:30] + assign io_predict_p_out_br_error = io_pp_in_br_error; // @[el2_exu_alu_ctl.scala 129:30] + assign io_predict_p_out_br_start_error = io_pp_in_br_start_error; // @[el2_exu_alu_ctl.scala 129:30] + assign io_predict_p_out_prett = io_pp_in_prett; // @[el2_exu_alu_ctl.scala 129:30] + assign io_predict_p_out_pcall = io_pp_in_pcall; // @[el2_exu_alu_ctl.scala 129:30] + assign io_predict_p_out_pret = io_pp_in_pret; // @[el2_exu_alu_ctl.scala 129:30] + assign io_predict_p_out_pja = io_pp_in_pja; // @[el2_exu_alu_ctl.scala 129:30] + assign io_predict_p_out_way = io_pp_in_way; // @[el2_exu_alu_ctl.scala 129:30] +`ifdef RANDOMIZE_GARBAGE_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_INVALID_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_REG_INIT +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_MEM_INIT +`define RANDOMIZE +`endif +`ifndef RANDOM +`define RANDOM $random +`endif +`ifdef RANDOMIZE_MEM_INIT + integer initvar; +`endif +`ifndef SYNTHESIS +`ifdef FIRRTL_BEFORE_INITIAL +`FIRRTL_BEFORE_INITIAL +`endif +initial begin + `ifdef RANDOMIZE + `ifdef INIT_RANDOM + `INIT_RANDOM + `endif + `ifndef VERILATOR + `ifdef RANDOMIZE_DELAY + #`RANDOMIZE_DELAY begin end + `else + #0.002 begin end + `endif + `endif +`ifdef RANDOMIZE_REG_INIT + _RAND_0 = {1{`RANDOM}}; + _T = _RAND_0[30:0]; + _RAND_1 = {1{`RANDOM}}; + _T_1 = _RAND_1[31:0]; +`endif // RANDOMIZE_REG_INIT + `endif // RANDOMIZE +end // initial +`ifdef FIRRTL_AFTER_INITIAL +`FIRRTL_AFTER_INITIAL +`endif +`endif // SYNTHESIS + always @(posedge clock) begin + if (reset) begin + _T <= 31'h0; + end else if (io_enable) begin + _T <= io_pc_in; + end + if (reset) begin + _T_1 <= 32'h0; + end else if (io_enable) begin + if (sel_shift) begin + _T_1 <= sout; + end else if (sel_adder) begin + _T_1 <= aout[31:0]; + end else if (sel_pc) begin + _T_1 <= pcout; + end else if (io_ap_csr_write) begin + if (io_ap_csr_imm) begin + _T_1 <= io_b_in; + end else begin + _T_1 <= io_a_in; + end + end else if (slt_one) begin + _T_1 <= _T_228; + end else begin + _T_1 <= lout; + end + end + end +endmodule diff --git a/el2_exu_div_ctl.anno.json b/el2_exu_div_ctl.anno.json new file mode 100644 index 00000000..c57c6862 --- /dev/null +++ b/el2_exu_div_ctl.anno.json @@ -0,0 +1,25 @@ +[ + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_exu_div_ctl|el2_exu_div_ctl>io_finish_dly", + "sources":[ + "~el2_exu_div_ctl|el2_exu_div_ctl>io_cancel" + ] + }, + { + "class":"firrtl.EmitCircuitAnnotation", + "emitter":"firrtl.VerilogEmitter" + }, + { + "class":"firrtl.options.TargetDirAnnotation", + "directory":"." + }, + { + "class":"firrtl.options.OutputAnnotationFileAnnotation", + "file":"el2_exu_div_ctl" + }, + { + "class":"firrtl.transforms.BlackBoxTargetDirAnno", + "targetDir":"." + } +] \ No newline at end of file diff --git a/el2_exu_div_ctl.fir b/el2_exu_div_ctl.fir new file mode 100644 index 00000000..8af15eee --- /dev/null +++ b/el2_exu_div_ctl.fir @@ -0,0 +1,1782 @@ +;buildInfoPackage: chisel3, version: 3.3.1, scalaVersion: 2.12.11, sbtVersion: 1.3.10 +circuit el2_exu_div_ctl : + module el2_exu_div_ctl : + input clock : Clock + input reset : AsyncReset + output io : {flip scan_mode : UInt<1>, flip dp : {valid : UInt<1>, unsign : UInt<1>, rem : UInt<1>}, flip dividend : UInt<32>, flip divisor : UInt<32>, flip cancel : UInt<1>, out : UInt<32>, finish_dly : UInt<1>} + + wire run_state : UInt<1> + run_state <= UInt<1>("h00") + wire count : UInt<6> + count <= UInt<6>("h00") + wire m_ff : UInt<33> + m_ff <= UInt<33>("h00") + wire q_in : UInt<33> + q_in <= UInt<33>("h00") + wire q_ff : UInt<33> + q_ff <= UInt<33>("h00") + wire a_in : UInt<33> + a_in <= UInt<33>("h00") + wire a_ff : UInt<33> + a_ff <= UInt<33>("h00") + wire m_eff : UInt<33> + m_eff <= UInt<33>("h00") + wire dividend_neg_ff : UInt<1> + dividend_neg_ff <= UInt<1>("h00") + wire divisor_neg_ff : UInt<1> + divisor_neg_ff <= UInt<1>("h00") + wire dividend_comp : UInt<32> + dividend_comp <= UInt<32>("h00") + wire q_ff_comp : UInt<32> + q_ff_comp <= UInt<32>("h00") + wire a_ff_comp : UInt<32> + a_ff_comp <= UInt<32>("h00") + wire sign_ff : UInt<1> + sign_ff <= UInt<1>("h00") + wire rem_ff : UInt<1> + rem_ff <= UInt<1>("h00") + wire add : UInt<1> + add <= UInt<1>("h00") + wire a_eff : UInt<33> + a_eff <= UInt<33>("h00") + wire a_eff_shift : UInt<56> + a_eff_shift <= UInt<56>("h00") + wire rem_correct : UInt<1> + rem_correct <= UInt<1>("h00") + wire valid_ff_x : UInt<1> + valid_ff_x <= UInt<1>("h00") + wire finish_ff : UInt<1> + finish_ff <= UInt<1>("h00") + wire smallnum_case_ff : UInt<1> + smallnum_case_ff <= UInt<1>("h00") + wire smallnum_ff : UInt<4> + smallnum_ff <= UInt<4>("h00") + wire smallnum_case : UInt<1> + smallnum_case <= UInt<1>("h00") + wire count_in : UInt<6> + count_in <= UInt<6>("h00") + wire dividend_eff : UInt<32> + dividend_eff <= UInt<32>("h00") + wire a_shift : UInt<33> + a_shift <= UInt<33>("h00") + io.out <= UInt<1>("h00") @[el2_exu_div_ctl.scala 52:10] + io.finish_dly <= UInt<1>("h00") @[el2_exu_div_ctl.scala 53:17] + node _T = eq(io.cancel, UInt<1>("h00")) @[el2_exu_div_ctl.scala 56:30] + node valid_x = and(valid_ff_x, _T) @[el2_exu_div_ctl.scala 56:28] + node _T_1 = bits(q_ff, 31, 4) @[el2_exu_div_ctl.scala 62:26] + node _T_2 = eq(_T_1, UInt<1>("h00")) @[el2_exu_div_ctl.scala 62:33] + node _T_3 = bits(m_ff, 31, 4) @[el2_exu_div_ctl.scala 62:49] + node _T_4 = eq(_T_3, UInt<1>("h00")) @[el2_exu_div_ctl.scala 62:56] + node _T_5 = and(_T_2, _T_4) @[el2_exu_div_ctl.scala 62:42] + node _T_6 = bits(m_ff, 31, 0) @[el2_exu_div_ctl.scala 62:72] + node _T_7 = neq(_T_6, UInt<1>("h00")) @[el2_exu_div_ctl.scala 62:79] + node _T_8 = and(_T_5, _T_7) @[el2_exu_div_ctl.scala 62:65] + node _T_9 = eq(rem_ff, UInt<1>("h00")) @[el2_exu_div_ctl.scala 62:90] + node _T_10 = and(_T_8, _T_9) @[el2_exu_div_ctl.scala 62:88] + node _T_11 = and(_T_10, valid_x) @[el2_exu_div_ctl.scala 62:98] + node _T_12 = bits(q_ff, 31, 0) @[el2_exu_div_ctl.scala 63:9] + node _T_13 = eq(_T_12, UInt<1>("h00")) @[el2_exu_div_ctl.scala 63:16] + node _T_14 = bits(m_ff, 31, 0) @[el2_exu_div_ctl.scala 63:32] + node _T_15 = neq(_T_14, UInt<1>("h00")) @[el2_exu_div_ctl.scala 63:39] + node _T_16 = and(_T_13, _T_15) @[el2_exu_div_ctl.scala 63:25] + node _T_17 = eq(rem_ff, UInt<1>("h00")) @[el2_exu_div_ctl.scala 63:50] + node _T_18 = and(_T_16, _T_17) @[el2_exu_div_ctl.scala 63:48] + node _T_19 = and(_T_18, valid_x) @[el2_exu_div_ctl.scala 63:58] + node _T_20 = or(_T_11, _T_19) @[el2_exu_div_ctl.scala 62:109] + smallnum_case <= _T_20 @[el2_exu_div_ctl.scala 62:16] + node pat1 = bits(q_ff, 3, 3) @[el2_exu_div_ctl.scala 66:57] + node _T_21 = bits(m_ff, 3, 3) @[el2_exu_div_ctl.scala 67:74] + node _T_22 = eq(_T_21, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node _T_23 = bits(m_ff, 2, 2) @[el2_exu_div_ctl.scala 67:74] + node _T_24 = eq(_T_23, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node _T_25 = bits(m_ff, 1, 1) @[el2_exu_div_ctl.scala 67:74] + node _T_26 = eq(_T_25, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node _T_27 = and(_T_22, _T_24) @[el2_exu_div_ctl.scala 67:94] + node pat2 = and(_T_27, _T_26) @[el2_exu_div_ctl.scala 67:94] + node _T_28 = and(pat1, pat2) @[el2_exu_div_ctl.scala 68:10] + node pat1_1 = bits(q_ff, 3, 3) @[el2_exu_div_ctl.scala 66:57] + node _T_29 = bits(m_ff, 3, 3) @[el2_exu_div_ctl.scala 67:74] + node _T_30 = eq(_T_29, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node _T_31 = bits(m_ff, 2, 2) @[el2_exu_div_ctl.scala 67:74] + node _T_32 = eq(_T_31, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node pat2_1 = and(_T_30, _T_32) @[el2_exu_div_ctl.scala 67:94] + node _T_33 = and(pat1_1, pat2_1) @[el2_exu_div_ctl.scala 68:10] + node _T_34 = bits(m_ff, 0, 0) @[el2_exu_div_ctl.scala 74:50] + node _T_35 = eq(_T_34, UInt<1>("h00")) @[el2_exu_div_ctl.scala 74:45] + node _T_36 = and(_T_33, _T_35) @[el2_exu_div_ctl.scala 74:43] + node pat1_2 = bits(q_ff, 2, 2) @[el2_exu_div_ctl.scala 66:57] + node _T_37 = bits(m_ff, 3, 3) @[el2_exu_div_ctl.scala 67:74] + node _T_38 = eq(_T_37, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node _T_39 = bits(m_ff, 2, 2) @[el2_exu_div_ctl.scala 67:74] + node _T_40 = eq(_T_39, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node _T_41 = bits(m_ff, 1, 1) @[el2_exu_div_ctl.scala 67:74] + node _T_42 = eq(_T_41, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node _T_43 = and(_T_38, _T_40) @[el2_exu_div_ctl.scala 67:94] + node pat2_2 = and(_T_43, _T_42) @[el2_exu_div_ctl.scala 67:94] + node _T_44 = and(pat1_2, pat2_2) @[el2_exu_div_ctl.scala 68:10] + node _T_45 = or(_T_36, _T_44) @[el2_exu_div_ctl.scala 74:54] + node _T_46 = bits(q_ff, 3, 3) @[el2_exu_div_ctl.scala 66:57] + node _T_47 = bits(q_ff, 2, 2) @[el2_exu_div_ctl.scala 66:57] + node pat1_3 = and(_T_46, _T_47) @[el2_exu_div_ctl.scala 66:94] + node _T_48 = bits(m_ff, 3, 3) @[el2_exu_div_ctl.scala 67:74] + node _T_49 = eq(_T_48, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node _T_50 = bits(m_ff, 2, 2) @[el2_exu_div_ctl.scala 67:74] + node _T_51 = eq(_T_50, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node pat2_3 = and(_T_49, _T_51) @[el2_exu_div_ctl.scala 67:94] + node _T_52 = and(pat1_3, pat2_3) @[el2_exu_div_ctl.scala 68:10] + node _T_53 = or(_T_45, _T_52) @[el2_exu_div_ctl.scala 74:86] + node pat1_4 = bits(q_ff, 2, 2) @[el2_exu_div_ctl.scala 66:57] + node _T_54 = bits(m_ff, 3, 3) @[el2_exu_div_ctl.scala 67:74] + node _T_55 = eq(_T_54, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node _T_56 = bits(m_ff, 2, 2) @[el2_exu_div_ctl.scala 67:74] + node _T_57 = eq(_T_56, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node pat2_4 = and(_T_55, _T_57) @[el2_exu_div_ctl.scala 67:94] + node _T_58 = and(pat1_4, pat2_4) @[el2_exu_div_ctl.scala 68:10] + node _T_59 = bits(m_ff, 0, 0) @[el2_exu_div_ctl.scala 76:50] + node _T_60 = eq(_T_59, UInt<1>("h00")) @[el2_exu_div_ctl.scala 76:45] + node _T_61 = and(_T_58, _T_60) @[el2_exu_div_ctl.scala 76:43] + node pat1_5 = bits(q_ff, 1, 1) @[el2_exu_div_ctl.scala 66:57] + node _T_62 = bits(m_ff, 3, 3) @[el2_exu_div_ctl.scala 67:74] + node _T_63 = eq(_T_62, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node _T_64 = bits(m_ff, 2, 2) @[el2_exu_div_ctl.scala 67:74] + node _T_65 = eq(_T_64, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node _T_66 = bits(m_ff, 1, 1) @[el2_exu_div_ctl.scala 67:74] + node _T_67 = eq(_T_66, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node _T_68 = and(_T_63, _T_65) @[el2_exu_div_ctl.scala 67:94] + node pat2_5 = and(_T_68, _T_67) @[el2_exu_div_ctl.scala 67:94] + node _T_69 = and(pat1_5, pat2_5) @[el2_exu_div_ctl.scala 68:10] + node _T_70 = or(_T_61, _T_69) @[el2_exu_div_ctl.scala 76:54] + node pat1_6 = bits(q_ff, 3, 3) @[el2_exu_div_ctl.scala 66:57] + node _T_71 = bits(m_ff, 3, 3) @[el2_exu_div_ctl.scala 67:74] + node _T_72 = eq(_T_71, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node _T_73 = bits(m_ff, 1, 1) @[el2_exu_div_ctl.scala 67:74] + node _T_74 = eq(_T_73, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node pat2_6 = and(_T_72, _T_74) @[el2_exu_div_ctl.scala 67:94] + node _T_75 = and(pat1_6, pat2_6) @[el2_exu_div_ctl.scala 68:10] + node _T_76 = bits(m_ff, 0, 0) @[el2_exu_div_ctl.scala 76:123] + node _T_77 = eq(_T_76, UInt<1>("h00")) @[el2_exu_div_ctl.scala 76:118] + node _T_78 = and(_T_75, _T_77) @[el2_exu_div_ctl.scala 76:116] + node _T_79 = or(_T_70, _T_78) @[el2_exu_div_ctl.scala 76:89] + node _T_80 = bits(q_ff, 3, 3) @[el2_exu_div_ctl.scala 66:57] + node _T_81 = bits(q_ff, 2, 2) @[el2_exu_div_ctl.scala 66:74] + node _T_82 = eq(_T_81, UInt<1>("h00")) @[el2_exu_div_ctl.scala 66:69] + node pat1_7 = and(_T_80, _T_82) @[el2_exu_div_ctl.scala 66:94] + node _T_83 = bits(m_ff, 3, 3) @[el2_exu_div_ctl.scala 67:74] + node _T_84 = eq(_T_83, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node _T_85 = bits(m_ff, 2, 2) @[el2_exu_div_ctl.scala 67:74] + node _T_86 = eq(_T_85, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node _T_87 = bits(m_ff, 1, 1) @[el2_exu_div_ctl.scala 67:57] + node _T_88 = bits(m_ff, 0, 0) @[el2_exu_div_ctl.scala 67:57] + node _T_89 = and(_T_84, _T_86) @[el2_exu_div_ctl.scala 67:94] + node _T_90 = and(_T_89, _T_87) @[el2_exu_div_ctl.scala 67:94] + node pat2_7 = and(_T_90, _T_88) @[el2_exu_div_ctl.scala 67:94] + node _T_91 = and(pat1_7, pat2_7) @[el2_exu_div_ctl.scala 68:10] + node _T_92 = or(_T_79, _T_91) @[el2_exu_div_ctl.scala 76:127] + node _T_93 = bits(q_ff, 3, 3) @[el2_exu_div_ctl.scala 66:74] + node _T_94 = eq(_T_93, UInt<1>("h00")) @[el2_exu_div_ctl.scala 66:69] + node _T_95 = bits(q_ff, 2, 2) @[el2_exu_div_ctl.scala 66:57] + node _T_96 = bits(q_ff, 1, 1) @[el2_exu_div_ctl.scala 66:57] + node _T_97 = and(_T_94, _T_95) @[el2_exu_div_ctl.scala 66:94] + node pat1_8 = and(_T_97, _T_96) @[el2_exu_div_ctl.scala 66:94] + node _T_98 = bits(m_ff, 3, 3) @[el2_exu_div_ctl.scala 67:74] + node _T_99 = eq(_T_98, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node _T_100 = bits(m_ff, 2, 2) @[el2_exu_div_ctl.scala 67:74] + node _T_101 = eq(_T_100, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node pat2_8 = and(_T_99, _T_101) @[el2_exu_div_ctl.scala 67:94] + node _T_102 = and(pat1_8, pat2_8) @[el2_exu_div_ctl.scala 68:10] + node _T_103 = or(_T_92, _T_102) @[el2_exu_div_ctl.scala 77:54] + node _T_104 = bits(q_ff, 3, 3) @[el2_exu_div_ctl.scala 66:57] + node _T_105 = bits(q_ff, 2, 2) @[el2_exu_div_ctl.scala 66:57] + node pat1_9 = and(_T_104, _T_105) @[el2_exu_div_ctl.scala 66:94] + node _T_106 = bits(m_ff, 3, 3) @[el2_exu_div_ctl.scala 67:74] + node pat2_9 = eq(_T_106, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node _T_107 = and(pat1_9, pat2_9) @[el2_exu_div_ctl.scala 68:10] + node _T_108 = bits(m_ff, 0, 0) @[el2_exu_div_ctl.scala 77:122] + node _T_109 = eq(_T_108, UInt<1>("h00")) @[el2_exu_div_ctl.scala 77:117] + node _T_110 = and(_T_107, _T_109) @[el2_exu_div_ctl.scala 77:115] + node _T_111 = or(_T_103, _T_110) @[el2_exu_div_ctl.scala 77:89] + node _T_112 = bits(q_ff, 3, 3) @[el2_exu_div_ctl.scala 66:57] + node _T_113 = bits(q_ff, 2, 2) @[el2_exu_div_ctl.scala 66:57] + node pat1_10 = and(_T_112, _T_113) @[el2_exu_div_ctl.scala 66:94] + node _T_114 = bits(m_ff, 3, 3) @[el2_exu_div_ctl.scala 67:74] + node _T_115 = eq(_T_114, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node _T_116 = bits(m_ff, 2, 2) @[el2_exu_div_ctl.scala 67:57] + node _T_117 = bits(m_ff, 1, 1) @[el2_exu_div_ctl.scala 67:74] + node _T_118 = eq(_T_117, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node _T_119 = and(_T_115, _T_116) @[el2_exu_div_ctl.scala 67:94] + node pat2_10 = and(_T_119, _T_118) @[el2_exu_div_ctl.scala 67:94] + node _T_120 = and(pat1_10, pat2_10) @[el2_exu_div_ctl.scala 68:10] + node _T_121 = or(_T_111, _T_120) @[el2_exu_div_ctl.scala 77:127] + node _T_122 = bits(q_ff, 3, 3) @[el2_exu_div_ctl.scala 66:57] + node _T_123 = bits(q_ff, 1, 1) @[el2_exu_div_ctl.scala 66:57] + node pat1_11 = and(_T_122, _T_123) @[el2_exu_div_ctl.scala 66:94] + node _T_124 = bits(m_ff, 3, 3) @[el2_exu_div_ctl.scala 67:74] + node _T_125 = eq(_T_124, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node _T_126 = bits(m_ff, 1, 1) @[el2_exu_div_ctl.scala 67:74] + node _T_127 = eq(_T_126, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node pat2_11 = and(_T_125, _T_127) @[el2_exu_div_ctl.scala 67:94] + node _T_128 = and(pat1_11, pat2_11) @[el2_exu_div_ctl.scala 68:10] + node _T_129 = or(_T_121, _T_128) @[el2_exu_div_ctl.scala 78:54] + node _T_130 = bits(q_ff, 3, 3) @[el2_exu_div_ctl.scala 66:57] + node _T_131 = bits(q_ff, 2, 2) @[el2_exu_div_ctl.scala 66:57] + node _T_132 = bits(q_ff, 1, 1) @[el2_exu_div_ctl.scala 66:57] + node _T_133 = and(_T_130, _T_131) @[el2_exu_div_ctl.scala 66:94] + node pat1_12 = and(_T_133, _T_132) @[el2_exu_div_ctl.scala 66:94] + node _T_134 = bits(m_ff, 3, 3) @[el2_exu_div_ctl.scala 67:74] + node _T_135 = eq(_T_134, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node _T_136 = bits(m_ff, 2, 2) @[el2_exu_div_ctl.scala 67:57] + node pat2_12 = and(_T_135, _T_136) @[el2_exu_div_ctl.scala 67:94] + node _T_137 = and(pat1_12, pat2_12) @[el2_exu_div_ctl.scala 68:10] + node _T_138 = or(_T_129, _T_137) @[el2_exu_div_ctl.scala 78:88] + node _T_139 = bits(q_ff, 2, 2) @[el2_exu_div_ctl.scala 66:57] + node _T_140 = bits(q_ff, 1, 1) @[el2_exu_div_ctl.scala 66:57] + node _T_141 = bits(q_ff, 0, 0) @[el2_exu_div_ctl.scala 66:57] + node _T_142 = and(_T_139, _T_140) @[el2_exu_div_ctl.scala 66:94] + node pat1_13 = and(_T_142, _T_141) @[el2_exu_div_ctl.scala 66:94] + node _T_143 = bits(m_ff, 3, 3) @[el2_exu_div_ctl.scala 67:74] + node _T_144 = eq(_T_143, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node _T_145 = bits(m_ff, 1, 1) @[el2_exu_div_ctl.scala 67:74] + node _T_146 = eq(_T_145, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node pat2_13 = and(_T_144, _T_146) @[el2_exu_div_ctl.scala 67:94] + node _T_147 = and(pat1_13, pat2_13) @[el2_exu_div_ctl.scala 68:10] + node _T_148 = bits(q_ff, 3, 3) @[el2_exu_div_ctl.scala 66:57] + node _T_149 = bits(q_ff, 2, 2) @[el2_exu_div_ctl.scala 66:74] + node _T_150 = eq(_T_149, UInt<1>("h00")) @[el2_exu_div_ctl.scala 66:69] + node _T_151 = bits(q_ff, 0, 0) @[el2_exu_div_ctl.scala 66:57] + node _T_152 = and(_T_148, _T_150) @[el2_exu_div_ctl.scala 66:94] + node pat1_14 = and(_T_152, _T_151) @[el2_exu_div_ctl.scala 66:94] + node _T_153 = bits(m_ff, 3, 3) @[el2_exu_div_ctl.scala 67:74] + node _T_154 = eq(_T_153, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node _T_155 = bits(m_ff, 1, 1) @[el2_exu_div_ctl.scala 67:57] + node _T_156 = bits(m_ff, 0, 0) @[el2_exu_div_ctl.scala 67:57] + node _T_157 = and(_T_154, _T_155) @[el2_exu_div_ctl.scala 67:94] + node pat2_14 = and(_T_157, _T_156) @[el2_exu_div_ctl.scala 67:94] + node _T_158 = and(pat1_14, pat2_14) @[el2_exu_div_ctl.scala 68:10] + node _T_159 = or(_T_147, _T_158) @[el2_exu_div_ctl.scala 80:57] + node pat1_15 = bits(q_ff, 2, 2) @[el2_exu_div_ctl.scala 66:57] + node _T_160 = bits(m_ff, 3, 3) @[el2_exu_div_ctl.scala 67:74] + node _T_161 = eq(_T_160, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node _T_162 = bits(m_ff, 1, 1) @[el2_exu_div_ctl.scala 67:74] + node _T_163 = eq(_T_162, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node pat2_15 = and(_T_161, _T_163) @[el2_exu_div_ctl.scala 67:94] + node _T_164 = and(pat1_15, pat2_15) @[el2_exu_div_ctl.scala 68:10] + node _T_165 = bits(m_ff, 0, 0) @[el2_exu_div_ctl.scala 80:131] + node _T_166 = eq(_T_165, UInt<1>("h00")) @[el2_exu_div_ctl.scala 80:126] + node _T_167 = and(_T_164, _T_166) @[el2_exu_div_ctl.scala 80:124] + node _T_168 = or(_T_159, _T_167) @[el2_exu_div_ctl.scala 80:97] + node pat1_16 = bits(q_ff, 1, 1) @[el2_exu_div_ctl.scala 66:57] + node _T_169 = bits(m_ff, 3, 3) @[el2_exu_div_ctl.scala 67:74] + node _T_170 = eq(_T_169, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node _T_171 = bits(m_ff, 2, 2) @[el2_exu_div_ctl.scala 67:74] + node _T_172 = eq(_T_171, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node pat2_16 = and(_T_170, _T_172) @[el2_exu_div_ctl.scala 67:94] + node _T_173 = and(pat1_16, pat2_16) @[el2_exu_div_ctl.scala 68:10] + node _T_174 = bits(m_ff, 0, 0) @[el2_exu_div_ctl.scala 81:50] + node _T_175 = eq(_T_174, UInt<1>("h00")) @[el2_exu_div_ctl.scala 81:45] + node _T_176 = and(_T_173, _T_175) @[el2_exu_div_ctl.scala 81:43] + node _T_177 = or(_T_168, _T_176) @[el2_exu_div_ctl.scala 80:139] + node pat1_17 = bits(q_ff, 0, 0) @[el2_exu_div_ctl.scala 66:57] + node _T_178 = bits(m_ff, 3, 3) @[el2_exu_div_ctl.scala 67:74] + node _T_179 = eq(_T_178, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node _T_180 = bits(m_ff, 2, 2) @[el2_exu_div_ctl.scala 67:74] + node _T_181 = eq(_T_180, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node _T_182 = bits(m_ff, 1, 1) @[el2_exu_div_ctl.scala 67:74] + node _T_183 = eq(_T_182, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node _T_184 = and(_T_179, _T_181) @[el2_exu_div_ctl.scala 67:94] + node pat2_17 = and(_T_184, _T_183) @[el2_exu_div_ctl.scala 67:94] + node _T_185 = and(pat1_17, pat2_17) @[el2_exu_div_ctl.scala 68:10] + node _T_186 = or(_T_177, _T_185) @[el2_exu_div_ctl.scala 81:57] + node _T_187 = bits(q_ff, 3, 3) @[el2_exu_div_ctl.scala 66:74] + node _T_188 = eq(_T_187, UInt<1>("h00")) @[el2_exu_div_ctl.scala 66:69] + node _T_189 = bits(q_ff, 2, 2) @[el2_exu_div_ctl.scala 66:57] + node _T_190 = bits(q_ff, 1, 1) @[el2_exu_div_ctl.scala 66:74] + node _T_191 = eq(_T_190, UInt<1>("h00")) @[el2_exu_div_ctl.scala 66:69] + node _T_192 = and(_T_188, _T_189) @[el2_exu_div_ctl.scala 66:94] + node pat1_18 = and(_T_192, _T_191) @[el2_exu_div_ctl.scala 66:94] + node _T_193 = bits(m_ff, 3, 3) @[el2_exu_div_ctl.scala 67:74] + node _T_194 = eq(_T_193, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node _T_195 = bits(m_ff, 2, 2) @[el2_exu_div_ctl.scala 67:74] + node _T_196 = eq(_T_195, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node _T_197 = bits(m_ff, 1, 1) @[el2_exu_div_ctl.scala 67:57] + node _T_198 = bits(m_ff, 0, 0) @[el2_exu_div_ctl.scala 67:57] + node _T_199 = and(_T_194, _T_196) @[el2_exu_div_ctl.scala 67:94] + node _T_200 = and(_T_199, _T_197) @[el2_exu_div_ctl.scala 67:94] + node pat2_18 = and(_T_200, _T_198) @[el2_exu_div_ctl.scala 67:94] + node _T_201 = and(pat1_18, pat2_18) @[el2_exu_div_ctl.scala 68:10] + node _T_202 = or(_T_186, _T_201) @[el2_exu_div_ctl.scala 81:97] + node _T_203 = bits(q_ff, 3, 3) @[el2_exu_div_ctl.scala 66:74] + node _T_204 = eq(_T_203, UInt<1>("h00")) @[el2_exu_div_ctl.scala 66:69] + node _T_205 = bits(q_ff, 2, 2) @[el2_exu_div_ctl.scala 66:57] + node _T_206 = bits(q_ff, 1, 1) @[el2_exu_div_ctl.scala 66:57] + node _T_207 = and(_T_204, _T_205) @[el2_exu_div_ctl.scala 66:94] + node pat1_19 = and(_T_207, _T_206) @[el2_exu_div_ctl.scala 66:94] + node _T_208 = bits(m_ff, 3, 3) @[el2_exu_div_ctl.scala 67:74] + node pat2_19 = eq(_T_208, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node _T_209 = and(pat1_19, pat2_19) @[el2_exu_div_ctl.scala 68:10] + node _T_210 = bits(m_ff, 0, 0) @[el2_exu_div_ctl.scala 82:53] + node _T_211 = eq(_T_210, UInt<1>("h00")) @[el2_exu_div_ctl.scala 82:48] + node _T_212 = and(_T_209, _T_211) @[el2_exu_div_ctl.scala 82:46] + node _T_213 = or(_T_202, _T_212) @[el2_exu_div_ctl.scala 81:139] + node pat1_20 = bits(q_ff, 3, 3) @[el2_exu_div_ctl.scala 66:57] + node _T_214 = bits(m_ff, 2, 2) @[el2_exu_div_ctl.scala 67:74] + node _T_215 = eq(_T_214, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node _T_216 = bits(m_ff, 1, 1) @[el2_exu_div_ctl.scala 67:74] + node _T_217 = eq(_T_216, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node pat2_20 = and(_T_215, _T_217) @[el2_exu_div_ctl.scala 67:94] + node _T_218 = and(pat1_20, pat2_20) @[el2_exu_div_ctl.scala 68:10] + node _T_219 = bits(m_ff, 0, 0) @[el2_exu_div_ctl.scala 82:92] + node _T_220 = eq(_T_219, UInt<1>("h00")) @[el2_exu_div_ctl.scala 82:87] + node _T_221 = and(_T_218, _T_220) @[el2_exu_div_ctl.scala 82:85] + node _T_222 = or(_T_213, _T_221) @[el2_exu_div_ctl.scala 82:57] + node _T_223 = bits(q_ff, 3, 3) @[el2_exu_div_ctl.scala 66:57] + node _T_224 = bits(q_ff, 2, 2) @[el2_exu_div_ctl.scala 66:74] + node _T_225 = eq(_T_224, UInt<1>("h00")) @[el2_exu_div_ctl.scala 66:69] + node pat1_21 = and(_T_223, _T_225) @[el2_exu_div_ctl.scala 66:94] + node _T_226 = bits(m_ff, 3, 3) @[el2_exu_div_ctl.scala 67:74] + node _T_227 = eq(_T_226, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node _T_228 = bits(m_ff, 2, 2) @[el2_exu_div_ctl.scala 67:57] + node _T_229 = bits(m_ff, 1, 1) @[el2_exu_div_ctl.scala 67:57] + node _T_230 = and(_T_227, _T_228) @[el2_exu_div_ctl.scala 67:94] + node pat2_21 = and(_T_230, _T_229) @[el2_exu_div_ctl.scala 67:94] + node _T_231 = and(pat1_21, pat2_21) @[el2_exu_div_ctl.scala 68:10] + node _T_232 = or(_T_222, _T_231) @[el2_exu_div_ctl.scala 82:97] + node _T_233 = bits(q_ff, 3, 3) @[el2_exu_div_ctl.scala 66:74] + node _T_234 = eq(_T_233, UInt<1>("h00")) @[el2_exu_div_ctl.scala 66:69] + node _T_235 = bits(q_ff, 2, 2) @[el2_exu_div_ctl.scala 66:57] + node _T_236 = bits(q_ff, 1, 1) @[el2_exu_div_ctl.scala 66:57] + node _T_237 = and(_T_234, _T_235) @[el2_exu_div_ctl.scala 66:94] + node pat1_22 = and(_T_237, _T_236) @[el2_exu_div_ctl.scala 66:94] + node _T_238 = bits(m_ff, 3, 3) @[el2_exu_div_ctl.scala 67:74] + node _T_239 = eq(_T_238, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node _T_240 = bits(m_ff, 2, 2) @[el2_exu_div_ctl.scala 67:57] + node _T_241 = bits(m_ff, 1, 1) @[el2_exu_div_ctl.scala 67:74] + node _T_242 = eq(_T_241, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node _T_243 = and(_T_239, _T_240) @[el2_exu_div_ctl.scala 67:94] + node pat2_22 = and(_T_243, _T_242) @[el2_exu_div_ctl.scala 67:94] + node _T_244 = and(pat1_22, pat2_22) @[el2_exu_div_ctl.scala 68:10] + node _T_245 = or(_T_232, _T_244) @[el2_exu_div_ctl.scala 82:139] + node _T_246 = bits(q_ff, 3, 3) @[el2_exu_div_ctl.scala 66:74] + node _T_247 = eq(_T_246, UInt<1>("h00")) @[el2_exu_div_ctl.scala 66:69] + node _T_248 = bits(q_ff, 2, 2) @[el2_exu_div_ctl.scala 66:57] + node _T_249 = bits(q_ff, 0, 0) @[el2_exu_div_ctl.scala 66:57] + node _T_250 = and(_T_247, _T_248) @[el2_exu_div_ctl.scala 66:94] + node pat1_23 = and(_T_250, _T_249) @[el2_exu_div_ctl.scala 66:94] + node _T_251 = bits(m_ff, 3, 3) @[el2_exu_div_ctl.scala 67:74] + node _T_252 = eq(_T_251, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node _T_253 = bits(m_ff, 1, 1) @[el2_exu_div_ctl.scala 67:74] + node _T_254 = eq(_T_253, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node pat2_23 = and(_T_252, _T_254) @[el2_exu_div_ctl.scala 67:94] + node _T_255 = and(pat1_23, pat2_23) @[el2_exu_div_ctl.scala 68:10] + node _T_256 = or(_T_245, _T_255) @[el2_exu_div_ctl.scala 83:57] + node _T_257 = bits(q_ff, 3, 3) @[el2_exu_div_ctl.scala 66:57] + node _T_258 = bits(q_ff, 2, 2) @[el2_exu_div_ctl.scala 66:74] + node _T_259 = eq(_T_258, UInt<1>("h00")) @[el2_exu_div_ctl.scala 66:69] + node _T_260 = bits(q_ff, 1, 1) @[el2_exu_div_ctl.scala 66:74] + node _T_261 = eq(_T_260, UInt<1>("h00")) @[el2_exu_div_ctl.scala 66:69] + node _T_262 = and(_T_257, _T_259) @[el2_exu_div_ctl.scala 66:94] + node pat1_24 = and(_T_262, _T_261) @[el2_exu_div_ctl.scala 66:94] + node _T_263 = bits(m_ff, 3, 3) @[el2_exu_div_ctl.scala 67:74] + node _T_264 = eq(_T_263, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node _T_265 = bits(m_ff, 2, 2) @[el2_exu_div_ctl.scala 67:57] + node _T_266 = bits(m_ff, 0, 0) @[el2_exu_div_ctl.scala 67:57] + node _T_267 = and(_T_264, _T_265) @[el2_exu_div_ctl.scala 67:94] + node pat2_24 = and(_T_267, _T_266) @[el2_exu_div_ctl.scala 67:94] + node _T_268 = and(pat1_24, pat2_24) @[el2_exu_div_ctl.scala 68:10] + node _T_269 = or(_T_256, _T_268) @[el2_exu_div_ctl.scala 83:97] + node _T_270 = bits(q_ff, 2, 2) @[el2_exu_div_ctl.scala 66:74] + node _T_271 = eq(_T_270, UInt<1>("h00")) @[el2_exu_div_ctl.scala 66:69] + node _T_272 = bits(q_ff, 1, 1) @[el2_exu_div_ctl.scala 66:57] + node _T_273 = bits(q_ff, 0, 0) @[el2_exu_div_ctl.scala 66:57] + node _T_274 = and(_T_271, _T_272) @[el2_exu_div_ctl.scala 66:94] + node pat1_25 = and(_T_274, _T_273) @[el2_exu_div_ctl.scala 66:94] + node _T_275 = bits(m_ff, 3, 3) @[el2_exu_div_ctl.scala 67:74] + node _T_276 = eq(_T_275, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node _T_277 = bits(m_ff, 2, 2) @[el2_exu_div_ctl.scala 67:74] + node _T_278 = eq(_T_277, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node pat2_25 = and(_T_276, _T_278) @[el2_exu_div_ctl.scala 67:94] + node _T_279 = and(pat1_25, pat2_25) @[el2_exu_div_ctl.scala 68:10] + node _T_280 = or(_T_269, _T_279) @[el2_exu_div_ctl.scala 83:139] + node _T_281 = bits(q_ff, 3, 3) @[el2_exu_div_ctl.scala 66:57] + node _T_282 = bits(q_ff, 2, 2) @[el2_exu_div_ctl.scala 66:57] + node pat1_26 = and(_T_281, _T_282) @[el2_exu_div_ctl.scala 66:94] + node _T_283 = bits(m_ff, 1, 1) @[el2_exu_div_ctl.scala 67:74] + node pat2_26 = eq(_T_283, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node _T_284 = and(pat1_26, pat2_26) @[el2_exu_div_ctl.scala 68:10] + node _T_285 = bits(m_ff, 0, 0) @[el2_exu_div_ctl.scala 84:91] + node _T_286 = eq(_T_285, UInt<1>("h00")) @[el2_exu_div_ctl.scala 84:86] + node _T_287 = and(_T_284, _T_286) @[el2_exu_div_ctl.scala 84:84] + node _T_288 = or(_T_280, _T_287) @[el2_exu_div_ctl.scala 84:57] + node _T_289 = bits(q_ff, 3, 3) @[el2_exu_div_ctl.scala 66:74] + node _T_290 = eq(_T_289, UInt<1>("h00")) @[el2_exu_div_ctl.scala 66:69] + node _T_291 = bits(q_ff, 2, 2) @[el2_exu_div_ctl.scala 66:57] + node _T_292 = bits(q_ff, 1, 1) @[el2_exu_div_ctl.scala 66:57] + node _T_293 = bits(q_ff, 0, 0) @[el2_exu_div_ctl.scala 66:57] + node _T_294 = and(_T_290, _T_291) @[el2_exu_div_ctl.scala 66:94] + node _T_295 = and(_T_294, _T_292) @[el2_exu_div_ctl.scala 66:94] + node pat1_27 = and(_T_295, _T_293) @[el2_exu_div_ctl.scala 66:94] + node _T_296 = bits(m_ff, 3, 3) @[el2_exu_div_ctl.scala 67:74] + node _T_297 = eq(_T_296, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node _T_298 = bits(m_ff, 2, 2) @[el2_exu_div_ctl.scala 67:57] + node pat2_27 = and(_T_297, _T_298) @[el2_exu_div_ctl.scala 67:94] + node _T_299 = and(pat1_27, pat2_27) @[el2_exu_div_ctl.scala 68:10] + node _T_300 = or(_T_288, _T_299) @[el2_exu_div_ctl.scala 84:97] + node _T_301 = bits(q_ff, 3, 3) @[el2_exu_div_ctl.scala 66:57] + node _T_302 = bits(q_ff, 2, 2) @[el2_exu_div_ctl.scala 66:57] + node pat1_28 = and(_T_301, _T_302) @[el2_exu_div_ctl.scala 66:94] + node _T_303 = bits(m_ff, 3, 3) @[el2_exu_div_ctl.scala 67:57] + node _T_304 = bits(m_ff, 2, 2) @[el2_exu_div_ctl.scala 67:74] + node _T_305 = eq(_T_304, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node pat2_28 = and(_T_303, _T_305) @[el2_exu_div_ctl.scala 67:94] + node _T_306 = and(pat1_28, pat2_28) @[el2_exu_div_ctl.scala 68:10] + node _T_307 = or(_T_300, _T_306) @[el2_exu_div_ctl.scala 84:139] + node _T_308 = bits(q_ff, 3, 3) @[el2_exu_div_ctl.scala 66:57] + node _T_309 = bits(q_ff, 1, 1) @[el2_exu_div_ctl.scala 66:57] + node pat1_29 = and(_T_308, _T_309) @[el2_exu_div_ctl.scala 66:94] + node _T_310 = bits(m_ff, 3, 3) @[el2_exu_div_ctl.scala 67:57] + node _T_311 = bits(m_ff, 2, 2) @[el2_exu_div_ctl.scala 67:74] + node _T_312 = eq(_T_311, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node _T_313 = bits(m_ff, 1, 1) @[el2_exu_div_ctl.scala 67:74] + node _T_314 = eq(_T_313, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node _T_315 = and(_T_310, _T_312) @[el2_exu_div_ctl.scala 67:94] + node pat2_29 = and(_T_315, _T_314) @[el2_exu_div_ctl.scala 67:94] + node _T_316 = and(pat1_29, pat2_29) @[el2_exu_div_ctl.scala 68:10] + node _T_317 = or(_T_307, _T_316) @[el2_exu_div_ctl.scala 85:57] + node _T_318 = bits(q_ff, 3, 3) @[el2_exu_div_ctl.scala 66:57] + node _T_319 = bits(q_ff, 0, 0) @[el2_exu_div_ctl.scala 66:57] + node pat1_30 = and(_T_318, _T_319) @[el2_exu_div_ctl.scala 66:94] + node _T_320 = bits(m_ff, 2, 2) @[el2_exu_div_ctl.scala 67:74] + node _T_321 = eq(_T_320, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node _T_322 = bits(m_ff, 1, 1) @[el2_exu_div_ctl.scala 67:74] + node _T_323 = eq(_T_322, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node pat2_30 = and(_T_321, _T_323) @[el2_exu_div_ctl.scala 67:94] + node _T_324 = and(pat1_30, pat2_30) @[el2_exu_div_ctl.scala 68:10] + node _T_325 = or(_T_317, _T_324) @[el2_exu_div_ctl.scala 85:97] + node _T_326 = bits(q_ff, 3, 3) @[el2_exu_div_ctl.scala 66:57] + node _T_327 = bits(q_ff, 1, 1) @[el2_exu_div_ctl.scala 66:74] + node _T_328 = eq(_T_327, UInt<1>("h00")) @[el2_exu_div_ctl.scala 66:69] + node pat1_31 = and(_T_326, _T_328) @[el2_exu_div_ctl.scala 66:94] + node _T_329 = bits(m_ff, 3, 3) @[el2_exu_div_ctl.scala 67:74] + node _T_330 = eq(_T_329, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node _T_331 = bits(m_ff, 2, 2) @[el2_exu_div_ctl.scala 67:57] + node _T_332 = bits(m_ff, 1, 1) @[el2_exu_div_ctl.scala 67:57] + node _T_333 = bits(m_ff, 0, 0) @[el2_exu_div_ctl.scala 67:57] + node _T_334 = and(_T_330, _T_331) @[el2_exu_div_ctl.scala 67:94] + node _T_335 = and(_T_334, _T_332) @[el2_exu_div_ctl.scala 67:94] + node pat2_31 = and(_T_335, _T_333) @[el2_exu_div_ctl.scala 67:94] + node _T_336 = and(pat1_31, pat2_31) @[el2_exu_div_ctl.scala 68:10] + node _T_337 = or(_T_325, _T_336) @[el2_exu_div_ctl.scala 85:139] + node _T_338 = bits(q_ff, 3, 3) @[el2_exu_div_ctl.scala 66:57] + node _T_339 = bits(q_ff, 2, 2) @[el2_exu_div_ctl.scala 66:57] + node _T_340 = bits(q_ff, 1, 1) @[el2_exu_div_ctl.scala 66:57] + node _T_341 = and(_T_338, _T_339) @[el2_exu_div_ctl.scala 66:94] + node pat1_32 = and(_T_341, _T_340) @[el2_exu_div_ctl.scala 66:94] + node pat2_32 = bits(m_ff, 3, 3) @[el2_exu_div_ctl.scala 67:57] + node _T_342 = and(pat1_32, pat2_32) @[el2_exu_div_ctl.scala 68:10] + node _T_343 = bits(m_ff, 0, 0) @[el2_exu_div_ctl.scala 86:93] + node _T_344 = eq(_T_343, UInt<1>("h00")) @[el2_exu_div_ctl.scala 86:88] + node _T_345 = and(_T_342, _T_344) @[el2_exu_div_ctl.scala 86:86] + node _T_346 = or(_T_337, _T_345) @[el2_exu_div_ctl.scala 86:57] + node _T_347 = bits(q_ff, 3, 3) @[el2_exu_div_ctl.scala 66:57] + node _T_348 = bits(q_ff, 2, 2) @[el2_exu_div_ctl.scala 66:57] + node _T_349 = bits(q_ff, 1, 1) @[el2_exu_div_ctl.scala 66:57] + node _T_350 = and(_T_347, _T_348) @[el2_exu_div_ctl.scala 66:94] + node pat1_33 = and(_T_350, _T_349) @[el2_exu_div_ctl.scala 66:94] + node _T_351 = bits(m_ff, 3, 3) @[el2_exu_div_ctl.scala 67:57] + node _T_352 = bits(m_ff, 1, 1) @[el2_exu_div_ctl.scala 67:74] + node _T_353 = eq(_T_352, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node pat2_33 = and(_T_351, _T_353) @[el2_exu_div_ctl.scala 67:94] + node _T_354 = and(pat1_33, pat2_33) @[el2_exu_div_ctl.scala 68:10] + node _T_355 = or(_T_346, _T_354) @[el2_exu_div_ctl.scala 86:97] + node _T_356 = bits(q_ff, 3, 3) @[el2_exu_div_ctl.scala 66:57] + node _T_357 = bits(q_ff, 2, 2) @[el2_exu_div_ctl.scala 66:57] + node _T_358 = bits(q_ff, 0, 0) @[el2_exu_div_ctl.scala 66:57] + node _T_359 = and(_T_356, _T_357) @[el2_exu_div_ctl.scala 66:94] + node pat1_34 = and(_T_359, _T_358) @[el2_exu_div_ctl.scala 66:94] + node _T_360 = bits(m_ff, 3, 3) @[el2_exu_div_ctl.scala 67:57] + node _T_361 = bits(m_ff, 1, 1) @[el2_exu_div_ctl.scala 67:74] + node _T_362 = eq(_T_361, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node pat2_34 = and(_T_360, _T_362) @[el2_exu_div_ctl.scala 67:94] + node _T_363 = and(pat1_34, pat2_34) @[el2_exu_div_ctl.scala 68:10] + node _T_364 = or(_T_355, _T_363) @[el2_exu_div_ctl.scala 86:139] + node _T_365 = bits(q_ff, 3, 3) @[el2_exu_div_ctl.scala 66:57] + node _T_366 = bits(q_ff, 2, 2) @[el2_exu_div_ctl.scala 66:74] + node _T_367 = eq(_T_366, UInt<1>("h00")) @[el2_exu_div_ctl.scala 66:69] + node _T_368 = bits(q_ff, 1, 1) @[el2_exu_div_ctl.scala 66:57] + node _T_369 = and(_T_365, _T_367) @[el2_exu_div_ctl.scala 66:94] + node pat1_35 = and(_T_369, _T_368) @[el2_exu_div_ctl.scala 66:94] + node _T_370 = bits(m_ff, 3, 3) @[el2_exu_div_ctl.scala 67:74] + node _T_371 = eq(_T_370, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node _T_372 = bits(m_ff, 1, 1) @[el2_exu_div_ctl.scala 67:57] + node pat2_35 = and(_T_371, _T_372) @[el2_exu_div_ctl.scala 67:94] + node _T_373 = and(pat1_35, pat2_35) @[el2_exu_div_ctl.scala 68:10] + node _T_374 = or(_T_364, _T_373) @[el2_exu_div_ctl.scala 87:57] + node _T_375 = bits(q_ff, 3, 3) @[el2_exu_div_ctl.scala 66:57] + node _T_376 = bits(q_ff, 1, 1) @[el2_exu_div_ctl.scala 66:57] + node _T_377 = bits(q_ff, 0, 0) @[el2_exu_div_ctl.scala 66:57] + node _T_378 = and(_T_375, _T_376) @[el2_exu_div_ctl.scala 66:94] + node pat1_36 = and(_T_378, _T_377) @[el2_exu_div_ctl.scala 66:94] + node _T_379 = bits(m_ff, 2, 2) @[el2_exu_div_ctl.scala 67:74] + node pat2_36 = eq(_T_379, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node _T_380 = and(pat1_36, pat2_36) @[el2_exu_div_ctl.scala 68:10] + node _T_381 = or(_T_374, _T_380) @[el2_exu_div_ctl.scala 87:97] + node _T_382 = bits(q_ff, 3, 3) @[el2_exu_div_ctl.scala 66:57] + node _T_383 = bits(q_ff, 2, 2) @[el2_exu_div_ctl.scala 66:57] + node _T_384 = bits(q_ff, 1, 1) @[el2_exu_div_ctl.scala 66:57] + node _T_385 = bits(q_ff, 0, 0) @[el2_exu_div_ctl.scala 66:57] + node _T_386 = and(_T_382, _T_383) @[el2_exu_div_ctl.scala 66:94] + node _T_387 = and(_T_386, _T_384) @[el2_exu_div_ctl.scala 66:94] + node pat1_37 = and(_T_387, _T_385) @[el2_exu_div_ctl.scala 66:94] + node pat2_37 = bits(m_ff, 3, 3) @[el2_exu_div_ctl.scala 67:57] + node _T_388 = and(pat1_37, pat2_37) @[el2_exu_div_ctl.scala 68:10] + node _T_389 = or(_T_381, _T_388) @[el2_exu_div_ctl.scala 87:139] + node _T_390 = bits(q_ff, 3, 3) @[el2_exu_div_ctl.scala 66:57] + node _T_391 = bits(q_ff, 1, 1) @[el2_exu_div_ctl.scala 66:57] + node pat1_38 = and(_T_390, _T_391) @[el2_exu_div_ctl.scala 66:94] + node _T_392 = bits(m_ff, 2, 2) @[el2_exu_div_ctl.scala 67:74] + node pat2_38 = eq(_T_392, UInt<1>("h00")) @[el2_exu_div_ctl.scala 67:69] + node _T_393 = and(pat1_38, pat2_38) @[el2_exu_div_ctl.scala 68:10] + node _T_394 = bits(m_ff, 0, 0) @[el2_exu_div_ctl.scala 88:90] + node _T_395 = eq(_T_394, UInt<1>("h00")) @[el2_exu_div_ctl.scala 88:85] + node _T_396 = and(_T_393, _T_395) @[el2_exu_div_ctl.scala 88:83] + node _T_397 = or(_T_389, _T_396) @[el2_exu_div_ctl.scala 88:57] + node _T_398 = cat(_T_138, _T_397) @[Cat.scala 29:58] + node _T_399 = cat(_T_28, _T_53) @[Cat.scala 29:58] + node smallnum = cat(_T_399, _T_398) @[Cat.scala 29:58] + wire shortq_enable_ff : UInt<1> + shortq_enable_ff <= UInt<1>("h00") + wire short_dividend : UInt<33> + short_dividend <= UInt<33>("h00") + wire shortq_shift_xx : UInt<4> + shortq_shift_xx <= UInt<4>("h00") + node _T_400 = bits(q_ff, 31, 31) @[el2_exu_div_ctl.scala 98:40] + node _T_401 = and(sign_ff, _T_400) @[el2_exu_div_ctl.scala 98:34] + node _T_402 = bits(q_ff, 31, 0) @[el2_exu_div_ctl.scala 98:49] + node _T_403 = cat(_T_401, _T_402) @[Cat.scala 29:58] + short_dividend <= _T_403 @[el2_exu_div_ctl.scala 98:18] + node _T_404 = bits(short_dividend, 32, 32) @[el2_exu_div_ctl.scala 103:22] + node _T_405 = bits(_T_404, 0, 0) @[el2_exu_div_ctl.scala 103:27] + node _T_406 = eq(_T_405, UInt<1>("h00")) @[el2_exu_div_ctl.scala 103:7] + node _T_407 = bits(short_dividend, 31, 24) @[el2_exu_div_ctl.scala 103:52] + node _T_408 = mux(UInt<1>("h00"), UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_409 = neq(_T_407, _T_408) @[el2_exu_div_ctl.scala 103:60] + node _T_410 = bits(short_dividend, 32, 32) @[el2_exu_div_ctl.scala 104:21] + node _T_411 = bits(_T_410, 0, 0) @[el2_exu_div_ctl.scala 104:26] + node _T_412 = bits(short_dividend, 31, 23) @[el2_exu_div_ctl.scala 104:51] + node _T_413 = mux(UInt<1>("h01"), UInt<9>("h01ff"), UInt<9>("h00")) @[Bitwise.scala 72:12] + node _T_414 = neq(_T_412, _T_413) @[el2_exu_div_ctl.scala 104:59] + node _T_415 = mux(_T_406, _T_409, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_416 = mux(_T_411, _T_414, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_417 = or(_T_415, _T_416) @[Mux.scala 27:72] + wire _T_418 : UInt<1> @[Mux.scala 27:72] + _T_418 <= _T_417 @[Mux.scala 27:72] + node _T_419 = bits(short_dividend, 32, 32) @[el2_exu_div_ctl.scala 107:22] + node _T_420 = bits(_T_419, 0, 0) @[el2_exu_div_ctl.scala 107:27] + node _T_421 = eq(_T_420, UInt<1>("h00")) @[el2_exu_div_ctl.scala 107:7] + node _T_422 = bits(short_dividend, 23, 16) @[el2_exu_div_ctl.scala 107:52] + node _T_423 = mux(UInt<1>("h00"), UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_424 = neq(_T_422, _T_423) @[el2_exu_div_ctl.scala 107:60] + node _T_425 = bits(short_dividend, 32, 32) @[el2_exu_div_ctl.scala 108:21] + node _T_426 = bits(_T_425, 0, 0) @[el2_exu_div_ctl.scala 108:26] + node _T_427 = bits(short_dividend, 22, 15) @[el2_exu_div_ctl.scala 108:51] + node _T_428 = mux(UInt<1>("h01"), UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_429 = neq(_T_427, _T_428) @[el2_exu_div_ctl.scala 108:59] + node _T_430 = mux(_T_421, _T_424, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_431 = mux(_T_426, _T_429, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_432 = or(_T_430, _T_431) @[Mux.scala 27:72] + wire _T_433 : UInt<1> @[Mux.scala 27:72] + _T_433 <= _T_432 @[Mux.scala 27:72] + node _T_434 = bits(short_dividend, 32, 32) @[el2_exu_div_ctl.scala 111:22] + node _T_435 = bits(_T_434, 0, 0) @[el2_exu_div_ctl.scala 111:27] + node _T_436 = eq(_T_435, UInt<1>("h00")) @[el2_exu_div_ctl.scala 111:7] + node _T_437 = bits(short_dividend, 15, 8) @[el2_exu_div_ctl.scala 111:52] + node _T_438 = mux(UInt<1>("h00"), UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_439 = neq(_T_437, _T_438) @[el2_exu_div_ctl.scala 111:59] + node _T_440 = bits(short_dividend, 32, 32) @[el2_exu_div_ctl.scala 112:21] + node _T_441 = bits(_T_440, 0, 0) @[el2_exu_div_ctl.scala 112:26] + node _T_442 = bits(short_dividend, 14, 7) @[el2_exu_div_ctl.scala 112:51] + node _T_443 = mux(UInt<1>("h01"), UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_444 = neq(_T_442, _T_443) @[el2_exu_div_ctl.scala 112:58] + node _T_445 = mux(_T_436, _T_439, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_446 = mux(_T_441, _T_444, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_447 = or(_T_445, _T_446) @[Mux.scala 27:72] + wire _T_448 : UInt<1> @[Mux.scala 27:72] + _T_448 <= _T_447 @[Mux.scala 27:72] + node _T_449 = cat(_T_418, _T_433) @[Cat.scala 29:58] + node a_cls = cat(_T_449, _T_448) @[Cat.scala 29:58] + node _T_450 = bits(m_ff, 32, 32) @[el2_exu_div_ctl.scala 117:12] + node _T_451 = bits(_T_450, 0, 0) @[el2_exu_div_ctl.scala 117:17] + node _T_452 = eq(_T_451, UInt<1>("h00")) @[el2_exu_div_ctl.scala 117:7] + node _T_453 = bits(m_ff, 31, 24) @[el2_exu_div_ctl.scala 117:32] + node _T_454 = mux(UInt<1>("h00"), UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_455 = neq(_T_453, _T_454) @[el2_exu_div_ctl.scala 117:40] + node _T_456 = bits(m_ff, 32, 32) @[el2_exu_div_ctl.scala 118:11] + node _T_457 = bits(_T_456, 0, 0) @[el2_exu_div_ctl.scala 118:16] + node _T_458 = bits(m_ff, 31, 24) @[el2_exu_div_ctl.scala 118:31] + node _T_459 = mux(UInt<1>("h01"), UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_460 = neq(_T_458, _T_459) @[el2_exu_div_ctl.scala 118:39] + node _T_461 = mux(_T_452, _T_455, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_462 = mux(_T_457, _T_460, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_463 = or(_T_461, _T_462) @[Mux.scala 27:72] + wire _T_464 : UInt<1> @[Mux.scala 27:72] + _T_464 <= _T_463 @[Mux.scala 27:72] + node _T_465 = bits(m_ff, 32, 32) @[el2_exu_div_ctl.scala 121:12] + node _T_466 = bits(_T_465, 0, 0) @[el2_exu_div_ctl.scala 121:17] + node _T_467 = eq(_T_466, UInt<1>("h00")) @[el2_exu_div_ctl.scala 121:7] + node _T_468 = bits(m_ff, 23, 16) @[el2_exu_div_ctl.scala 121:32] + node _T_469 = mux(UInt<1>("h00"), UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_470 = neq(_T_468, _T_469) @[el2_exu_div_ctl.scala 121:40] + node _T_471 = bits(m_ff, 32, 32) @[el2_exu_div_ctl.scala 122:11] + node _T_472 = bits(_T_471, 0, 0) @[el2_exu_div_ctl.scala 122:16] + node _T_473 = bits(m_ff, 23, 16) @[el2_exu_div_ctl.scala 122:31] + node _T_474 = mux(UInt<1>("h01"), UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_475 = neq(_T_473, _T_474) @[el2_exu_div_ctl.scala 122:39] + node _T_476 = mux(_T_467, _T_470, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_477 = mux(_T_472, _T_475, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_478 = or(_T_476, _T_477) @[Mux.scala 27:72] + wire _T_479 : UInt<1> @[Mux.scala 27:72] + _T_479 <= _T_478 @[Mux.scala 27:72] + node _T_480 = bits(m_ff, 32, 32) @[el2_exu_div_ctl.scala 125:12] + node _T_481 = bits(_T_480, 0, 0) @[el2_exu_div_ctl.scala 125:17] + node _T_482 = eq(_T_481, UInt<1>("h00")) @[el2_exu_div_ctl.scala 125:7] + node _T_483 = bits(m_ff, 15, 8) @[el2_exu_div_ctl.scala 125:32] + node _T_484 = mux(UInt<1>("h00"), UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_485 = neq(_T_483, _T_484) @[el2_exu_div_ctl.scala 125:39] + node _T_486 = bits(m_ff, 32, 32) @[el2_exu_div_ctl.scala 126:11] + node _T_487 = bits(_T_486, 0, 0) @[el2_exu_div_ctl.scala 126:16] + node _T_488 = bits(m_ff, 15, 8) @[el2_exu_div_ctl.scala 126:31] + node _T_489 = mux(UInt<1>("h01"), UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_490 = neq(_T_488, _T_489) @[el2_exu_div_ctl.scala 126:38] + node _T_491 = mux(_T_482, _T_485, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_492 = mux(_T_487, _T_490, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_493 = or(_T_491, _T_492) @[Mux.scala 27:72] + wire _T_494 : UInt<1> @[Mux.scala 27:72] + _T_494 <= _T_493 @[Mux.scala 27:72] + node _T_495 = cat(_T_464, _T_479) @[Cat.scala 29:58] + node b_cls = cat(_T_495, _T_494) @[Cat.scala 29:58] + node _T_496 = bits(a_cls, 2, 1) @[el2_exu_div_ctl.scala 130:13] + node _T_497 = eq(_T_496, UInt<1>("h01")) @[el2_exu_div_ctl.scala 130:19] + node _T_498 = bits(b_cls, 2, 2) @[el2_exu_div_ctl.scala 130:42] + node _T_499 = eq(_T_498, UInt<1>("h01")) @[el2_exu_div_ctl.scala 130:48] + node _T_500 = and(_T_497, _T_499) @[el2_exu_div_ctl.scala 130:34] + node _T_501 = bits(a_cls, 2, 0) @[el2_exu_div_ctl.scala 131:15] + node _T_502 = eq(_T_501, UInt<1>("h01")) @[el2_exu_div_ctl.scala 131:21] + node _T_503 = bits(b_cls, 2, 2) @[el2_exu_div_ctl.scala 131:44] + node _T_504 = eq(_T_503, UInt<1>("h01")) @[el2_exu_div_ctl.scala 131:50] + node _T_505 = and(_T_502, _T_504) @[el2_exu_div_ctl.scala 131:36] + node _T_506 = or(_T_500, _T_505) @[el2_exu_div_ctl.scala 130:65] + node _T_507 = bits(a_cls, 2, 0) @[el2_exu_div_ctl.scala 132:15] + node _T_508 = eq(_T_507, UInt<1>("h00")) @[el2_exu_div_ctl.scala 132:21] + node _T_509 = bits(b_cls, 2, 2) @[el2_exu_div_ctl.scala 132:44] + node _T_510 = eq(_T_509, UInt<1>("h01")) @[el2_exu_div_ctl.scala 132:50] + node _T_511 = and(_T_508, _T_510) @[el2_exu_div_ctl.scala 132:36] + node _T_512 = or(_T_506, _T_511) @[el2_exu_div_ctl.scala 131:67] + node _T_513 = bits(a_cls, 2, 0) @[el2_exu_div_ctl.scala 133:15] + node _T_514 = eq(_T_513, UInt<1>("h01")) @[el2_exu_div_ctl.scala 133:21] + node _T_515 = bits(b_cls, 2, 1) @[el2_exu_div_ctl.scala 133:44] + node _T_516 = eq(_T_515, UInt<1>("h01")) @[el2_exu_div_ctl.scala 133:50] + node _T_517 = and(_T_514, _T_516) @[el2_exu_div_ctl.scala 133:36] + node _T_518 = or(_T_512, _T_517) @[el2_exu_div_ctl.scala 132:67] + node _T_519 = bits(a_cls, 2, 0) @[el2_exu_div_ctl.scala 134:15] + node _T_520 = eq(_T_519, UInt<1>("h00")) @[el2_exu_div_ctl.scala 134:21] + node _T_521 = bits(b_cls, 2, 1) @[el2_exu_div_ctl.scala 134:44] + node _T_522 = eq(_T_521, UInt<1>("h01")) @[el2_exu_div_ctl.scala 134:50] + node _T_523 = and(_T_520, _T_522) @[el2_exu_div_ctl.scala 134:36] + node _T_524 = or(_T_518, _T_523) @[el2_exu_div_ctl.scala 133:67] + node _T_525 = bits(a_cls, 2, 0) @[el2_exu_div_ctl.scala 135:15] + node _T_526 = eq(_T_525, UInt<1>("h00")) @[el2_exu_div_ctl.scala 135:21] + node _T_527 = bits(b_cls, 2, 0) @[el2_exu_div_ctl.scala 135:44] + node _T_528 = eq(_T_527, UInt<1>("h01")) @[el2_exu_div_ctl.scala 135:50] + node _T_529 = and(_T_526, _T_528) @[el2_exu_div_ctl.scala 135:36] + node _T_530 = or(_T_524, _T_529) @[el2_exu_div_ctl.scala 134:67] + node _T_531 = bits(a_cls, 2, 2) @[el2_exu_div_ctl.scala 137:15] + node _T_532 = eq(_T_531, UInt<1>("h01")) @[el2_exu_div_ctl.scala 137:21] + node _T_533 = bits(b_cls, 2, 2) @[el2_exu_div_ctl.scala 137:44] + node _T_534 = eq(_T_533, UInt<1>("h01")) @[el2_exu_div_ctl.scala 137:50] + node _T_535 = and(_T_532, _T_534) @[el2_exu_div_ctl.scala 137:36] + node _T_536 = bits(a_cls, 2, 1) @[el2_exu_div_ctl.scala 138:15] + node _T_537 = eq(_T_536, UInt<1>("h01")) @[el2_exu_div_ctl.scala 138:21] + node _T_538 = bits(b_cls, 2, 1) @[el2_exu_div_ctl.scala 138:44] + node _T_539 = eq(_T_538, UInt<1>("h01")) @[el2_exu_div_ctl.scala 138:50] + node _T_540 = and(_T_537, _T_539) @[el2_exu_div_ctl.scala 138:36] + node _T_541 = or(_T_535, _T_540) @[el2_exu_div_ctl.scala 137:67] + node _T_542 = bits(a_cls, 2, 0) @[el2_exu_div_ctl.scala 139:15] + node _T_543 = eq(_T_542, UInt<1>("h01")) @[el2_exu_div_ctl.scala 139:21] + node _T_544 = bits(b_cls, 2, 0) @[el2_exu_div_ctl.scala 139:44] + node _T_545 = eq(_T_544, UInt<1>("h01")) @[el2_exu_div_ctl.scala 139:50] + node _T_546 = and(_T_543, _T_545) @[el2_exu_div_ctl.scala 139:36] + node _T_547 = or(_T_541, _T_546) @[el2_exu_div_ctl.scala 138:67] + node _T_548 = bits(a_cls, 2, 0) @[el2_exu_div_ctl.scala 140:15] + node _T_549 = eq(_T_548, UInt<1>("h00")) @[el2_exu_div_ctl.scala 140:21] + node _T_550 = bits(b_cls, 2, 0) @[el2_exu_div_ctl.scala 140:44] + node _T_551 = eq(_T_550, UInt<1>("h00")) @[el2_exu_div_ctl.scala 140:50] + node _T_552 = and(_T_549, _T_551) @[el2_exu_div_ctl.scala 140:36] + node _T_553 = or(_T_547, _T_552) @[el2_exu_div_ctl.scala 139:67] + node _T_554 = bits(a_cls, 2, 2) @[el2_exu_div_ctl.scala 142:15] + node _T_555 = eq(_T_554, UInt<1>("h01")) @[el2_exu_div_ctl.scala 142:21] + node _T_556 = bits(b_cls, 2, 1) @[el2_exu_div_ctl.scala 142:44] + node _T_557 = eq(_T_556, UInt<1>("h01")) @[el2_exu_div_ctl.scala 142:50] + node _T_558 = and(_T_555, _T_557) @[el2_exu_div_ctl.scala 142:36] + node _T_559 = bits(a_cls, 2, 1) @[el2_exu_div_ctl.scala 143:15] + node _T_560 = eq(_T_559, UInt<1>("h01")) @[el2_exu_div_ctl.scala 143:21] + node _T_561 = bits(b_cls, 2, 0) @[el2_exu_div_ctl.scala 143:44] + node _T_562 = eq(_T_561, UInt<1>("h01")) @[el2_exu_div_ctl.scala 143:50] + node _T_563 = and(_T_560, _T_562) @[el2_exu_div_ctl.scala 143:36] + node _T_564 = or(_T_558, _T_563) @[el2_exu_div_ctl.scala 142:67] + node _T_565 = bits(a_cls, 2, 0) @[el2_exu_div_ctl.scala 144:15] + node _T_566 = eq(_T_565, UInt<1>("h01")) @[el2_exu_div_ctl.scala 144:21] + node _T_567 = bits(b_cls, 2, 0) @[el2_exu_div_ctl.scala 144:44] + node _T_568 = eq(_T_567, UInt<1>("h00")) @[el2_exu_div_ctl.scala 144:50] + node _T_569 = and(_T_566, _T_568) @[el2_exu_div_ctl.scala 144:36] + node _T_570 = or(_T_564, _T_569) @[el2_exu_div_ctl.scala 143:67] + node _T_571 = bits(a_cls, 2, 2) @[el2_exu_div_ctl.scala 146:15] + node _T_572 = eq(_T_571, UInt<1>("h01")) @[el2_exu_div_ctl.scala 146:21] + node _T_573 = bits(b_cls, 2, 0) @[el2_exu_div_ctl.scala 146:44] + node _T_574 = eq(_T_573, UInt<1>("h01")) @[el2_exu_div_ctl.scala 146:50] + node _T_575 = and(_T_572, _T_574) @[el2_exu_div_ctl.scala 146:36] + node _T_576 = bits(a_cls, 2, 1) @[el2_exu_div_ctl.scala 147:15] + node _T_577 = eq(_T_576, UInt<1>("h01")) @[el2_exu_div_ctl.scala 147:21] + node _T_578 = bits(b_cls, 2, 0) @[el2_exu_div_ctl.scala 147:44] + node _T_579 = eq(_T_578, UInt<1>("h00")) @[el2_exu_div_ctl.scala 147:50] + node _T_580 = and(_T_577, _T_579) @[el2_exu_div_ctl.scala 147:36] + node _T_581 = or(_T_575, _T_580) @[el2_exu_div_ctl.scala 146:67] + node _T_582 = cat(_T_570, _T_581) @[Cat.scala 29:58] + node _T_583 = cat(_T_530, _T_553) @[Cat.scala 29:58] + node shortq_raw = cat(_T_583, _T_582) @[Cat.scala 29:58] + node _T_584 = bits(m_ff, 31, 0) @[el2_exu_div_ctl.scala 150:42] + node _T_585 = neq(_T_584, UInt<32>("h00")) @[el2_exu_div_ctl.scala 150:49] + node _T_586 = and(valid_ff_x, _T_585) @[el2_exu_div_ctl.scala 150:35] + node _T_587 = neq(shortq_raw, UInt<4>("h00")) @[el2_exu_div_ctl.scala 150:78] + node shortq_enable = and(_T_586, _T_587) @[el2_exu_div_ctl.scala 150:64] + node _T_588 = bits(shortq_enable, 0, 0) @[Bitwise.scala 72:15] + node _T_589 = mux(_T_588, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node shortq_shift = and(_T_589, shortq_raw) @[el2_exu_div_ctl.scala 151:44] + node _T_590 = bits(shortq_shift_xx, 3, 3) @[el2_exu_div_ctl.scala 157:20] + node _T_591 = bits(_T_590, 0, 0) @[el2_exu_div_ctl.scala 157:24] + node _T_592 = bits(shortq_shift_xx, 2, 2) @[el2_exu_div_ctl.scala 158:20] + node _T_593 = bits(_T_592, 0, 0) @[el2_exu_div_ctl.scala 158:24] + node _T_594 = bits(shortq_shift_xx, 1, 1) @[el2_exu_div_ctl.scala 159:20] + node _T_595 = bits(_T_594, 0, 0) @[el2_exu_div_ctl.scala 159:24] + node _T_596 = bits(shortq_shift_xx, 0, 0) @[el2_exu_div_ctl.scala 160:20] + node _T_597 = bits(_T_596, 0, 0) @[el2_exu_div_ctl.scala 160:24] + node _T_598 = mux(_T_591, UInt<5>("h01f"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_599 = mux(_T_593, UInt<5>("h018"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_600 = mux(_T_595, UInt<5>("h010"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_601 = mux(_T_597, UInt<4>("h08"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_602 = or(_T_598, _T_599) @[Mux.scala 27:72] + node _T_603 = or(_T_602, _T_600) @[Mux.scala 27:72] + node _T_604 = or(_T_603, _T_601) @[Mux.scala 27:72] + wire shortq_shift_ff : UInt<5> @[Mux.scala 27:72] + shortq_shift_ff <= _T_604 @[Mux.scala 27:72] + node _T_605 = eq(rem_ff, UInt<1>("h00")) @[el2_exu_div_ctl.scala 164:40] + node _T_606 = eq(count, UInt<6>("h020")) @[el2_exu_div_ctl.scala 164:55] + node _T_607 = eq(count, UInt<6>("h021")) @[el2_exu_div_ctl.scala 164:76] + node _T_608 = mux(_T_605, _T_606, _T_607) @[el2_exu_div_ctl.scala 164:39] + node finish = or(smallnum_case, _T_608) @[el2_exu_div_ctl.scala 164:34] + node _T_609 = or(io.dp.valid, run_state) @[el2_exu_div_ctl.scala 165:32] + node _T_610 = or(_T_609, finish) @[el2_exu_div_ctl.scala 165:44] + node div_clken = or(_T_610, finish_ff) @[el2_exu_div_ctl.scala 165:53] + node _T_611 = or(io.dp.valid, run_state) @[el2_exu_div_ctl.scala 166:33] + node _T_612 = eq(finish, UInt<1>("h00")) @[el2_exu_div_ctl.scala 166:48] + node _T_613 = and(_T_611, _T_612) @[el2_exu_div_ctl.scala 166:46] + node _T_614 = eq(io.cancel, UInt<1>("h00")) @[el2_exu_div_ctl.scala 166:58] + node run_in = and(_T_613, _T_614) @[el2_exu_div_ctl.scala 166:56] + node _T_615 = eq(finish, UInt<1>("h00")) @[el2_exu_div_ctl.scala 167:37] + node _T_616 = and(run_state, _T_615) @[el2_exu_div_ctl.scala 167:35] + node _T_617 = eq(io.cancel, UInt<1>("h00")) @[el2_exu_div_ctl.scala 167:47] + node _T_618 = and(_T_616, _T_617) @[el2_exu_div_ctl.scala 167:45] + node _T_619 = eq(shortq_enable, UInt<1>("h00")) @[el2_exu_div_ctl.scala 167:60] + node _T_620 = and(_T_618, _T_619) @[el2_exu_div_ctl.scala 167:58] + node _T_621 = bits(_T_620, 0, 0) @[Bitwise.scala 72:15] + node _T_622 = mux(_T_621, UInt<6>("h03f"), UInt<6>("h00")) @[Bitwise.scala 72:12] + node _T_623 = cat(UInt<1>("h00"), shortq_shift_ff) @[Cat.scala 29:58] + node _T_624 = add(count, _T_623) @[el2_exu_div_ctl.scala 167:86] + node _T_625 = tail(_T_624, 1) @[el2_exu_div_ctl.scala 167:86] + node _T_626 = add(_T_625, UInt<6>("h01")) @[el2_exu_div_ctl.scala 167:113] + node _T_627 = tail(_T_626, 1) @[el2_exu_div_ctl.scala 167:113] + node _T_628 = and(_T_622, _T_627) @[el2_exu_div_ctl.scala 167:77] + count_in <= _T_628 @[el2_exu_div_ctl.scala 167:14] + node _T_629 = eq(io.cancel, UInt<1>("h00")) @[el2_exu_div_ctl.scala 170:34] + node _T_630 = and(finish_ff, _T_629) @[el2_exu_div_ctl.scala 170:32] + io.finish_dly <= _T_630 @[el2_exu_div_ctl.scala 170:18] + node _T_631 = eq(io.dp.unsign, UInt<1>("h00")) @[el2_exu_div_ctl.scala 171:20] + node _T_632 = neq(io.divisor, UInt<32>("h00")) @[el2_exu_div_ctl.scala 171:48] + node sign_eff = and(_T_631, _T_632) @[el2_exu_div_ctl.scala 171:34] + node _T_633 = eq(run_state, UInt<1>("h00")) @[el2_exu_div_ctl.scala 175:6] + node _T_634 = bits(_T_633, 0, 0) @[el2_exu_div_ctl.scala 175:18] + node _T_635 = cat(UInt<1>("h00"), io.dividend) @[Cat.scala 29:58] + node _T_636 = or(valid_ff_x, shortq_enable_ff) @[el2_exu_div_ctl.scala 176:30] + node _T_637 = and(run_state, _T_636) @[el2_exu_div_ctl.scala 176:16] + node _T_638 = bits(_T_637, 0, 0) @[el2_exu_div_ctl.scala 176:51] + node _T_639 = bits(dividend_eff, 31, 0) @[el2_exu_div_ctl.scala 176:78] + node _T_640 = bits(a_in, 32, 32) @[el2_exu_div_ctl.scala 176:90] + node _T_641 = eq(_T_640, UInt<1>("h00")) @[el2_exu_div_ctl.scala 176:85] + node _T_642 = cat(_T_639, _T_641) @[Cat.scala 29:58] + node _T_643 = dshl(_T_642, shortq_shift_ff) @[el2_exu_div_ctl.scala 176:96] + node _T_644 = or(valid_ff_x, shortq_enable_ff) @[el2_exu_div_ctl.scala 177:31] + node _T_645 = eq(_T_644, UInt<1>("h00")) @[el2_exu_div_ctl.scala 177:18] + node _T_646 = and(run_state, _T_645) @[el2_exu_div_ctl.scala 177:16] + node _T_647 = bits(_T_646, 0, 0) @[el2_exu_div_ctl.scala 177:52] + node _T_648 = bits(q_ff, 31, 0) @[el2_exu_div_ctl.scala 177:70] + node _T_649 = bits(a_in, 32, 32) @[el2_exu_div_ctl.scala 177:82] + node _T_650 = eq(_T_649, UInt<1>("h00")) @[el2_exu_div_ctl.scala 177:77] + node _T_651 = cat(_T_648, _T_650) @[Cat.scala 29:58] + node _T_652 = mux(_T_634, _T_635, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_653 = mux(_T_638, _T_643, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_654 = mux(_T_647, _T_651, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_655 = or(_T_652, _T_653) @[Mux.scala 27:72] + node _T_656 = or(_T_655, _T_654) @[Mux.scala 27:72] + wire _T_657 : UInt<64> @[Mux.scala 27:72] + _T_657 <= _T_656 @[Mux.scala 27:72] + q_in <= _T_657 @[el2_exu_div_ctl.scala 174:8] + node _T_658 = eq(shortq_enable, UInt<1>("h00")) @[el2_exu_div_ctl.scala 179:50] + node _T_659 = and(run_state, _T_658) @[el2_exu_div_ctl.scala 179:48] + node qff_enable = or(io.dp.valid, _T_659) @[el2_exu_div_ctl.scala 179:35] + node _T_660 = and(sign_ff, dividend_neg_ff) @[el2_exu_div_ctl.scala 180:32] + node _T_661 = bits(_T_660, 0, 0) @[el2_exu_div_ctl.scala 180:51] + node _T_662 = bits(q_ff, 31, 0) @[el2_exu_div_ctl.scala 180:73] + wire _T_663 : UInt<1>[31] @[el2_lib.scala 232:20] + node _T_664 = bits(_T_662, 0, 0) @[el2_lib.scala 234:21] + node _T_665 = orr(_T_664) @[el2_lib.scala 234:32] + node _T_666 = bits(_T_662, 1, 1) @[el2_lib.scala 235:36] + node _T_667 = not(_T_666) @[el2_lib.scala 235:32] + node _T_668 = bits(_T_662, 1, 1) @[el2_lib.scala 235:44] + node _T_669 = mux(_T_665, _T_667, _T_668) @[el2_lib.scala 235:25] + _T_663[0] <= _T_669 @[el2_lib.scala 235:19] + node _T_670 = bits(_T_662, 1, 0) @[el2_lib.scala 234:21] + node _T_671 = orr(_T_670) @[el2_lib.scala 234:32] + node _T_672 = bits(_T_662, 2, 2) @[el2_lib.scala 235:36] + node _T_673 = not(_T_672) @[el2_lib.scala 235:32] + node _T_674 = bits(_T_662, 2, 2) @[el2_lib.scala 235:44] + node _T_675 = mux(_T_671, _T_673, _T_674) @[el2_lib.scala 235:25] + _T_663[1] <= _T_675 @[el2_lib.scala 235:19] + node _T_676 = bits(_T_662, 2, 0) @[el2_lib.scala 234:21] + node _T_677 = orr(_T_676) @[el2_lib.scala 234:32] + node _T_678 = bits(_T_662, 3, 3) @[el2_lib.scala 235:36] + node _T_679 = not(_T_678) @[el2_lib.scala 235:32] + node _T_680 = bits(_T_662, 3, 3) @[el2_lib.scala 235:44] + node _T_681 = mux(_T_677, _T_679, _T_680) @[el2_lib.scala 235:25] + _T_663[2] <= _T_681 @[el2_lib.scala 235:19] + node _T_682 = bits(_T_662, 3, 0) @[el2_lib.scala 234:21] + node _T_683 = orr(_T_682) @[el2_lib.scala 234:32] + node _T_684 = bits(_T_662, 4, 4) @[el2_lib.scala 235:36] + node _T_685 = not(_T_684) @[el2_lib.scala 235:32] + node _T_686 = bits(_T_662, 4, 4) @[el2_lib.scala 235:44] + node _T_687 = mux(_T_683, _T_685, _T_686) @[el2_lib.scala 235:25] + _T_663[3] <= _T_687 @[el2_lib.scala 235:19] + node _T_688 = bits(_T_662, 4, 0) @[el2_lib.scala 234:21] + node _T_689 = orr(_T_688) @[el2_lib.scala 234:32] + node _T_690 = bits(_T_662, 5, 5) @[el2_lib.scala 235:36] + node _T_691 = not(_T_690) @[el2_lib.scala 235:32] + node _T_692 = bits(_T_662, 5, 5) @[el2_lib.scala 235:44] + node _T_693 = mux(_T_689, _T_691, _T_692) @[el2_lib.scala 235:25] + _T_663[4] <= _T_693 @[el2_lib.scala 235:19] + node _T_694 = bits(_T_662, 5, 0) @[el2_lib.scala 234:21] + node _T_695 = orr(_T_694) @[el2_lib.scala 234:32] + node _T_696 = bits(_T_662, 6, 6) @[el2_lib.scala 235:36] + node _T_697 = not(_T_696) @[el2_lib.scala 235:32] + node _T_698 = bits(_T_662, 6, 6) @[el2_lib.scala 235:44] + node _T_699 = mux(_T_695, _T_697, _T_698) @[el2_lib.scala 235:25] + _T_663[5] <= _T_699 @[el2_lib.scala 235:19] + node _T_700 = bits(_T_662, 6, 0) @[el2_lib.scala 234:21] + node _T_701 = orr(_T_700) @[el2_lib.scala 234:32] + node _T_702 = bits(_T_662, 7, 7) @[el2_lib.scala 235:36] + node _T_703 = not(_T_702) @[el2_lib.scala 235:32] + node _T_704 = bits(_T_662, 7, 7) @[el2_lib.scala 235:44] + node _T_705 = mux(_T_701, _T_703, _T_704) @[el2_lib.scala 235:25] + _T_663[6] <= _T_705 @[el2_lib.scala 235:19] + node _T_706 = bits(_T_662, 7, 0) @[el2_lib.scala 234:21] + node _T_707 = orr(_T_706) @[el2_lib.scala 234:32] + node _T_708 = bits(_T_662, 8, 8) @[el2_lib.scala 235:36] + node _T_709 = not(_T_708) @[el2_lib.scala 235:32] + node _T_710 = bits(_T_662, 8, 8) @[el2_lib.scala 235:44] + node _T_711 = mux(_T_707, _T_709, _T_710) @[el2_lib.scala 235:25] + _T_663[7] <= _T_711 @[el2_lib.scala 235:19] + node _T_712 = bits(_T_662, 8, 0) @[el2_lib.scala 234:21] + node _T_713 = orr(_T_712) @[el2_lib.scala 234:32] + node _T_714 = bits(_T_662, 9, 9) @[el2_lib.scala 235:36] + node _T_715 = not(_T_714) @[el2_lib.scala 235:32] + node _T_716 = bits(_T_662, 9, 9) @[el2_lib.scala 235:44] + node _T_717 = mux(_T_713, _T_715, _T_716) @[el2_lib.scala 235:25] + _T_663[8] <= _T_717 @[el2_lib.scala 235:19] + node _T_718 = bits(_T_662, 9, 0) @[el2_lib.scala 234:21] + node _T_719 = orr(_T_718) @[el2_lib.scala 234:32] + node _T_720 = bits(_T_662, 10, 10) @[el2_lib.scala 235:36] + node _T_721 = not(_T_720) @[el2_lib.scala 235:32] + node _T_722 = bits(_T_662, 10, 10) @[el2_lib.scala 235:44] + node _T_723 = mux(_T_719, _T_721, _T_722) @[el2_lib.scala 235:25] + _T_663[9] <= _T_723 @[el2_lib.scala 235:19] + node _T_724 = bits(_T_662, 10, 0) @[el2_lib.scala 234:21] + node _T_725 = orr(_T_724) @[el2_lib.scala 234:32] + node _T_726 = bits(_T_662, 11, 11) @[el2_lib.scala 235:36] + node _T_727 = not(_T_726) @[el2_lib.scala 235:32] + node _T_728 = bits(_T_662, 11, 11) @[el2_lib.scala 235:44] + node _T_729 = mux(_T_725, _T_727, _T_728) @[el2_lib.scala 235:25] + _T_663[10] <= _T_729 @[el2_lib.scala 235:19] + node _T_730 = bits(_T_662, 11, 0) @[el2_lib.scala 234:21] + node _T_731 = orr(_T_730) @[el2_lib.scala 234:32] + node _T_732 = bits(_T_662, 12, 12) @[el2_lib.scala 235:36] + node _T_733 = not(_T_732) @[el2_lib.scala 235:32] + node _T_734 = bits(_T_662, 12, 12) @[el2_lib.scala 235:44] + node _T_735 = mux(_T_731, _T_733, _T_734) @[el2_lib.scala 235:25] + _T_663[11] <= _T_735 @[el2_lib.scala 235:19] + node _T_736 = bits(_T_662, 12, 0) @[el2_lib.scala 234:21] + node _T_737 = orr(_T_736) @[el2_lib.scala 234:32] + node _T_738 = bits(_T_662, 13, 13) @[el2_lib.scala 235:36] + node _T_739 = not(_T_738) @[el2_lib.scala 235:32] + node _T_740 = bits(_T_662, 13, 13) @[el2_lib.scala 235:44] + node _T_741 = mux(_T_737, _T_739, _T_740) @[el2_lib.scala 235:25] + _T_663[12] <= _T_741 @[el2_lib.scala 235:19] + node _T_742 = bits(_T_662, 13, 0) @[el2_lib.scala 234:21] + node _T_743 = orr(_T_742) @[el2_lib.scala 234:32] + node _T_744 = bits(_T_662, 14, 14) @[el2_lib.scala 235:36] + node _T_745 = not(_T_744) @[el2_lib.scala 235:32] + node _T_746 = bits(_T_662, 14, 14) @[el2_lib.scala 235:44] + node _T_747 = mux(_T_743, _T_745, _T_746) @[el2_lib.scala 235:25] + _T_663[13] <= _T_747 @[el2_lib.scala 235:19] + node _T_748 = bits(_T_662, 14, 0) @[el2_lib.scala 234:21] + node _T_749 = orr(_T_748) @[el2_lib.scala 234:32] + node _T_750 = bits(_T_662, 15, 15) @[el2_lib.scala 235:36] + node _T_751 = not(_T_750) @[el2_lib.scala 235:32] + node _T_752 = bits(_T_662, 15, 15) @[el2_lib.scala 235:44] + node _T_753 = mux(_T_749, _T_751, _T_752) @[el2_lib.scala 235:25] + _T_663[14] <= _T_753 @[el2_lib.scala 235:19] + node _T_754 = bits(_T_662, 15, 0) @[el2_lib.scala 234:21] + node _T_755 = orr(_T_754) @[el2_lib.scala 234:32] + node _T_756 = bits(_T_662, 16, 16) @[el2_lib.scala 235:36] + node _T_757 = not(_T_756) @[el2_lib.scala 235:32] + node _T_758 = bits(_T_662, 16, 16) @[el2_lib.scala 235:44] + node _T_759 = mux(_T_755, _T_757, _T_758) @[el2_lib.scala 235:25] + _T_663[15] <= _T_759 @[el2_lib.scala 235:19] + node _T_760 = bits(_T_662, 16, 0) @[el2_lib.scala 234:21] + node _T_761 = orr(_T_760) @[el2_lib.scala 234:32] + node _T_762 = bits(_T_662, 17, 17) @[el2_lib.scala 235:36] + node _T_763 = not(_T_762) @[el2_lib.scala 235:32] + node _T_764 = bits(_T_662, 17, 17) @[el2_lib.scala 235:44] + node _T_765 = mux(_T_761, _T_763, _T_764) @[el2_lib.scala 235:25] + _T_663[16] <= _T_765 @[el2_lib.scala 235:19] + node _T_766 = bits(_T_662, 17, 0) @[el2_lib.scala 234:21] + node _T_767 = orr(_T_766) @[el2_lib.scala 234:32] + node _T_768 = bits(_T_662, 18, 18) @[el2_lib.scala 235:36] + node _T_769 = not(_T_768) @[el2_lib.scala 235:32] + node _T_770 = bits(_T_662, 18, 18) @[el2_lib.scala 235:44] + node _T_771 = mux(_T_767, _T_769, _T_770) @[el2_lib.scala 235:25] + _T_663[17] <= _T_771 @[el2_lib.scala 235:19] + node _T_772 = bits(_T_662, 18, 0) @[el2_lib.scala 234:21] + node _T_773 = orr(_T_772) @[el2_lib.scala 234:32] + node _T_774 = bits(_T_662, 19, 19) @[el2_lib.scala 235:36] + node _T_775 = not(_T_774) @[el2_lib.scala 235:32] + node _T_776 = bits(_T_662, 19, 19) @[el2_lib.scala 235:44] + node _T_777 = mux(_T_773, _T_775, _T_776) @[el2_lib.scala 235:25] + _T_663[18] <= _T_777 @[el2_lib.scala 235:19] + node _T_778 = bits(_T_662, 19, 0) @[el2_lib.scala 234:21] + node _T_779 = orr(_T_778) @[el2_lib.scala 234:32] + node _T_780 = bits(_T_662, 20, 20) @[el2_lib.scala 235:36] + node _T_781 = not(_T_780) @[el2_lib.scala 235:32] + node _T_782 = bits(_T_662, 20, 20) @[el2_lib.scala 235:44] + node _T_783 = mux(_T_779, _T_781, _T_782) @[el2_lib.scala 235:25] + _T_663[19] <= _T_783 @[el2_lib.scala 235:19] + node _T_784 = bits(_T_662, 20, 0) @[el2_lib.scala 234:21] + node _T_785 = orr(_T_784) @[el2_lib.scala 234:32] + node _T_786 = bits(_T_662, 21, 21) @[el2_lib.scala 235:36] + node _T_787 = not(_T_786) @[el2_lib.scala 235:32] + node _T_788 = bits(_T_662, 21, 21) @[el2_lib.scala 235:44] + node _T_789 = mux(_T_785, _T_787, _T_788) @[el2_lib.scala 235:25] + _T_663[20] <= _T_789 @[el2_lib.scala 235:19] + node _T_790 = bits(_T_662, 21, 0) @[el2_lib.scala 234:21] + node _T_791 = orr(_T_790) @[el2_lib.scala 234:32] + node _T_792 = bits(_T_662, 22, 22) @[el2_lib.scala 235:36] + node _T_793 = not(_T_792) @[el2_lib.scala 235:32] + node _T_794 = bits(_T_662, 22, 22) @[el2_lib.scala 235:44] + node _T_795 = mux(_T_791, _T_793, _T_794) @[el2_lib.scala 235:25] + _T_663[21] <= _T_795 @[el2_lib.scala 235:19] + node _T_796 = bits(_T_662, 22, 0) @[el2_lib.scala 234:21] + node _T_797 = orr(_T_796) @[el2_lib.scala 234:32] + node _T_798 = bits(_T_662, 23, 23) @[el2_lib.scala 235:36] + node _T_799 = not(_T_798) @[el2_lib.scala 235:32] + node _T_800 = bits(_T_662, 23, 23) @[el2_lib.scala 235:44] + node _T_801 = mux(_T_797, _T_799, _T_800) @[el2_lib.scala 235:25] + _T_663[22] <= _T_801 @[el2_lib.scala 235:19] + node _T_802 = bits(_T_662, 23, 0) @[el2_lib.scala 234:21] + node _T_803 = orr(_T_802) @[el2_lib.scala 234:32] + node _T_804 = bits(_T_662, 24, 24) @[el2_lib.scala 235:36] + node _T_805 = not(_T_804) @[el2_lib.scala 235:32] + node _T_806 = bits(_T_662, 24, 24) @[el2_lib.scala 235:44] + node _T_807 = mux(_T_803, _T_805, _T_806) @[el2_lib.scala 235:25] + _T_663[23] <= _T_807 @[el2_lib.scala 235:19] + node _T_808 = bits(_T_662, 24, 0) @[el2_lib.scala 234:21] + node _T_809 = orr(_T_808) @[el2_lib.scala 234:32] + node _T_810 = bits(_T_662, 25, 25) @[el2_lib.scala 235:36] + node _T_811 = not(_T_810) @[el2_lib.scala 235:32] + node _T_812 = bits(_T_662, 25, 25) @[el2_lib.scala 235:44] + node _T_813 = mux(_T_809, _T_811, _T_812) @[el2_lib.scala 235:25] + _T_663[24] <= _T_813 @[el2_lib.scala 235:19] + node _T_814 = bits(_T_662, 25, 0) @[el2_lib.scala 234:21] + node _T_815 = orr(_T_814) @[el2_lib.scala 234:32] + node _T_816 = bits(_T_662, 26, 26) @[el2_lib.scala 235:36] + node _T_817 = not(_T_816) @[el2_lib.scala 235:32] + node _T_818 = bits(_T_662, 26, 26) @[el2_lib.scala 235:44] + node _T_819 = mux(_T_815, _T_817, _T_818) @[el2_lib.scala 235:25] + _T_663[25] <= _T_819 @[el2_lib.scala 235:19] + node _T_820 = bits(_T_662, 26, 0) @[el2_lib.scala 234:21] + node _T_821 = orr(_T_820) @[el2_lib.scala 234:32] + node _T_822 = bits(_T_662, 27, 27) @[el2_lib.scala 235:36] + node _T_823 = not(_T_822) @[el2_lib.scala 235:32] + node _T_824 = bits(_T_662, 27, 27) @[el2_lib.scala 235:44] + node _T_825 = mux(_T_821, _T_823, _T_824) @[el2_lib.scala 235:25] + _T_663[26] <= _T_825 @[el2_lib.scala 235:19] + node _T_826 = bits(_T_662, 27, 0) @[el2_lib.scala 234:21] + node _T_827 = orr(_T_826) @[el2_lib.scala 234:32] + node _T_828 = bits(_T_662, 28, 28) @[el2_lib.scala 235:36] + node _T_829 = not(_T_828) @[el2_lib.scala 235:32] + node _T_830 = bits(_T_662, 28, 28) @[el2_lib.scala 235:44] + node _T_831 = mux(_T_827, _T_829, _T_830) @[el2_lib.scala 235:25] + _T_663[27] <= _T_831 @[el2_lib.scala 235:19] + node _T_832 = bits(_T_662, 28, 0) @[el2_lib.scala 234:21] + node _T_833 = orr(_T_832) @[el2_lib.scala 234:32] + node _T_834 = bits(_T_662, 29, 29) @[el2_lib.scala 235:36] + node _T_835 = not(_T_834) @[el2_lib.scala 235:32] + node _T_836 = bits(_T_662, 29, 29) @[el2_lib.scala 235:44] + node _T_837 = mux(_T_833, _T_835, _T_836) @[el2_lib.scala 235:25] + _T_663[28] <= _T_837 @[el2_lib.scala 235:19] + node _T_838 = bits(_T_662, 29, 0) @[el2_lib.scala 234:21] + node _T_839 = orr(_T_838) @[el2_lib.scala 234:32] + node _T_840 = bits(_T_662, 30, 30) @[el2_lib.scala 235:36] + node _T_841 = not(_T_840) @[el2_lib.scala 235:32] + node _T_842 = bits(_T_662, 30, 30) @[el2_lib.scala 235:44] + node _T_843 = mux(_T_839, _T_841, _T_842) @[el2_lib.scala 235:25] + _T_663[29] <= _T_843 @[el2_lib.scala 235:19] + node _T_844 = bits(_T_662, 30, 0) @[el2_lib.scala 234:21] + node _T_845 = orr(_T_844) @[el2_lib.scala 234:32] + node _T_846 = bits(_T_662, 31, 31) @[el2_lib.scala 235:36] + node _T_847 = not(_T_846) @[el2_lib.scala 235:32] + node _T_848 = bits(_T_662, 31, 31) @[el2_lib.scala 235:44] + node _T_849 = mux(_T_845, _T_847, _T_848) @[el2_lib.scala 235:25] + _T_663[30] <= _T_849 @[el2_lib.scala 235:19] + node _T_850 = cat(_T_663[2], _T_663[1]) @[el2_lib.scala 237:14] + node _T_851 = cat(_T_850, _T_663[0]) @[el2_lib.scala 237:14] + node _T_852 = cat(_T_663[4], _T_663[3]) @[el2_lib.scala 237:14] + node _T_853 = cat(_T_663[6], _T_663[5]) @[el2_lib.scala 237:14] + node _T_854 = cat(_T_853, _T_852) @[el2_lib.scala 237:14] + node _T_855 = cat(_T_854, _T_851) @[el2_lib.scala 237:14] + node _T_856 = cat(_T_663[8], _T_663[7]) @[el2_lib.scala 237:14] + node _T_857 = cat(_T_663[10], _T_663[9]) @[el2_lib.scala 237:14] + node _T_858 = cat(_T_857, _T_856) @[el2_lib.scala 237:14] + node _T_859 = cat(_T_663[12], _T_663[11]) @[el2_lib.scala 237:14] + node _T_860 = cat(_T_663[14], _T_663[13]) @[el2_lib.scala 237:14] + node _T_861 = cat(_T_860, _T_859) @[el2_lib.scala 237:14] + node _T_862 = cat(_T_861, _T_858) @[el2_lib.scala 237:14] + node _T_863 = cat(_T_862, _T_855) @[el2_lib.scala 237:14] + node _T_864 = cat(_T_663[16], _T_663[15]) @[el2_lib.scala 237:14] + node _T_865 = cat(_T_663[18], _T_663[17]) @[el2_lib.scala 237:14] + node _T_866 = cat(_T_865, _T_864) @[el2_lib.scala 237:14] + node _T_867 = cat(_T_663[20], _T_663[19]) @[el2_lib.scala 237:14] + node _T_868 = cat(_T_663[22], _T_663[21]) @[el2_lib.scala 237:14] + node _T_869 = cat(_T_868, _T_867) @[el2_lib.scala 237:14] + node _T_870 = cat(_T_869, _T_866) @[el2_lib.scala 237:14] + node _T_871 = cat(_T_663[24], _T_663[23]) @[el2_lib.scala 237:14] + node _T_872 = cat(_T_663[26], _T_663[25]) @[el2_lib.scala 237:14] + node _T_873 = cat(_T_872, _T_871) @[el2_lib.scala 237:14] + node _T_874 = cat(_T_663[28], _T_663[27]) @[el2_lib.scala 237:14] + node _T_875 = cat(_T_663[30], _T_663[29]) @[el2_lib.scala 237:14] + node _T_876 = cat(_T_875, _T_874) @[el2_lib.scala 237:14] + node _T_877 = cat(_T_876, _T_873) @[el2_lib.scala 237:14] + node _T_878 = cat(_T_877, _T_870) @[el2_lib.scala 237:14] + node _T_879 = cat(_T_878, _T_863) @[el2_lib.scala 237:14] + node _T_880 = bits(_T_662, 0, 0) @[el2_lib.scala 237:25] + node _T_881 = cat(_T_879, _T_880) @[Cat.scala 29:58] + node _T_882 = bits(q_ff, 31, 0) @[el2_exu_div_ctl.scala 180:85] + node _T_883 = mux(_T_661, _T_881, _T_882) @[el2_exu_div_ctl.scala 180:22] + dividend_eff <= _T_883 @[el2_exu_div_ctl.scala 180:16] + node _T_884 = bits(add, 0, 0) @[el2_exu_div_ctl.scala 183:20] + node _T_885 = not(m_ff) @[el2_exu_div_ctl.scala 183:35] + node _T_886 = mux(_T_884, m_ff, _T_885) @[el2_exu_div_ctl.scala 183:15] + m_eff <= _T_886 @[el2_exu_div_ctl.scala 183:9] + node _T_887 = cat(UInt<24>("h00"), dividend_eff) @[Cat.scala 29:58] + node _T_888 = dshl(_T_887, shortq_shift_ff) @[el2_exu_div_ctl.scala 184:47] + a_eff_shift <= _T_888 @[el2_exu_div_ctl.scala 184:15] + node _T_889 = bits(rem_correct, 0, 0) @[el2_exu_div_ctl.scala 186:17] + node _T_890 = eq(rem_correct, UInt<1>("h00")) @[el2_exu_div_ctl.scala 187:6] + node _T_891 = eq(shortq_enable_ff, UInt<1>("h00")) @[el2_exu_div_ctl.scala 187:21] + node _T_892 = and(_T_890, _T_891) @[el2_exu_div_ctl.scala 187:19] + node _T_893 = bits(_T_892, 0, 0) @[el2_exu_div_ctl.scala 187:40] + node _T_894 = bits(a_ff, 31, 0) @[el2_exu_div_ctl.scala 187:58] + node _T_895 = bits(q_ff, 32, 32) @[el2_exu_div_ctl.scala 187:70] + node _T_896 = cat(_T_894, _T_895) @[Cat.scala 29:58] + node _T_897 = eq(rem_correct, UInt<1>("h00")) @[el2_exu_div_ctl.scala 188:6] + node _T_898 = and(_T_897, shortq_enable_ff) @[el2_exu_div_ctl.scala 188:19] + node _T_899 = bits(_T_898, 0, 0) @[el2_exu_div_ctl.scala 188:40] + node _T_900 = bits(a_eff_shift, 55, 32) @[el2_exu_div_ctl.scala 188:74] + node _T_901 = cat(UInt<9>("h00"), _T_900) @[Cat.scala 29:58] + node _T_902 = mux(_T_889, a_ff, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_903 = mux(_T_893, _T_896, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_904 = mux(_T_899, _T_901, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_905 = or(_T_902, _T_903) @[Mux.scala 27:72] + node _T_906 = or(_T_905, _T_904) @[Mux.scala 27:72] + wire _T_907 : UInt<33> @[Mux.scala 27:72] + _T_907 <= _T_906 @[Mux.scala 27:72] + a_eff <= _T_907 @[el2_exu_div_ctl.scala 185:9] + node _T_908 = eq(shortq_enable, UInt<1>("h00")) @[el2_exu_div_ctl.scala 190:49] + node _T_909 = and(run_state, _T_908) @[el2_exu_div_ctl.scala 190:47] + node _T_910 = neq(count, UInt<6>("h021")) @[el2_exu_div_ctl.scala 190:73] + node _T_911 = and(_T_909, _T_910) @[el2_exu_div_ctl.scala 190:64] + node _T_912 = or(io.dp.valid, _T_911) @[el2_exu_div_ctl.scala 190:34] + node aff_enable = or(_T_912, rem_correct) @[el2_exu_div_ctl.scala 190:89] + node _T_913 = bits(run_state, 0, 0) @[Bitwise.scala 72:15] + node _T_914 = mux(_T_913, UInt<33>("h01ffffffff"), UInt<33>("h00")) @[Bitwise.scala 72:12] + node _T_915 = and(_T_914, a_eff) @[el2_exu_div_ctl.scala 191:33] + a_shift <= _T_915 @[el2_exu_div_ctl.scala 191:11] + node _T_916 = bits(run_state, 0, 0) @[Bitwise.scala 72:15] + node _T_917 = mux(_T_916, UInt<33>("h01ffffffff"), UInt<33>("h00")) @[Bitwise.scala 72:12] + node _T_918 = add(a_shift, m_eff) @[el2_exu_div_ctl.scala 192:41] + node _T_919 = tail(_T_918, 1) @[el2_exu_div_ctl.scala 192:41] + node _T_920 = eq(add, UInt<1>("h00")) @[el2_exu_div_ctl.scala 192:65] + node _T_921 = cat(UInt<32>("h00"), _T_920) @[Cat.scala 29:58] + node _T_922 = add(_T_919, _T_921) @[el2_exu_div_ctl.scala 192:49] + node _T_923 = tail(_T_922, 1) @[el2_exu_div_ctl.scala 192:49] + node _T_924 = and(_T_917, _T_923) @[el2_exu_div_ctl.scala 192:30] + a_in <= _T_924 @[el2_exu_div_ctl.scala 192:8] + node m_already_comp = and(divisor_neg_ff, sign_ff) @[el2_exu_div_ctl.scala 193:48] + node _T_925 = bits(a_ff, 32, 32) @[el2_exu_div_ctl.scala 195:16] + node _T_926 = or(_T_925, rem_correct) @[el2_exu_div_ctl.scala 195:21] + node _T_927 = xor(_T_926, m_already_comp) @[el2_exu_div_ctl.scala 195:36] + add <= _T_927 @[el2_exu_div_ctl.scala 195:8] + node _T_928 = eq(count, UInt<6>("h021")) @[el2_exu_div_ctl.scala 196:26] + node _T_929 = and(_T_928, rem_ff) @[el2_exu_div_ctl.scala 196:41] + node _T_930 = bits(a_ff, 32, 32) @[el2_exu_div_ctl.scala 196:56] + node _T_931 = and(_T_929, _T_930) @[el2_exu_div_ctl.scala 196:50] + rem_correct <= _T_931 @[el2_exu_div_ctl.scala 196:16] + node _T_932 = xor(dividend_neg_ff, divisor_neg_ff) @[el2_exu_div_ctl.scala 197:50] + node _T_933 = and(sign_ff, _T_932) @[el2_exu_div_ctl.scala 197:31] + node _T_934 = bits(_T_933, 0, 0) @[el2_exu_div_ctl.scala 197:69] + node _T_935 = bits(q_ff, 31, 0) @[el2_exu_div_ctl.scala 197:91] + wire _T_936 : UInt<1>[31] @[el2_lib.scala 232:20] + node _T_937 = bits(_T_935, 0, 0) @[el2_lib.scala 234:21] + node _T_938 = orr(_T_937) @[el2_lib.scala 234:32] + node _T_939 = bits(_T_935, 1, 1) @[el2_lib.scala 235:36] + node _T_940 = not(_T_939) @[el2_lib.scala 235:32] + node _T_941 = bits(_T_935, 1, 1) @[el2_lib.scala 235:44] + node _T_942 = mux(_T_938, _T_940, _T_941) @[el2_lib.scala 235:25] + _T_936[0] <= _T_942 @[el2_lib.scala 235:19] + node _T_943 = bits(_T_935, 1, 0) @[el2_lib.scala 234:21] + node _T_944 = orr(_T_943) @[el2_lib.scala 234:32] + node _T_945 = bits(_T_935, 2, 2) @[el2_lib.scala 235:36] + node _T_946 = not(_T_945) @[el2_lib.scala 235:32] + node _T_947 = bits(_T_935, 2, 2) @[el2_lib.scala 235:44] + node _T_948 = mux(_T_944, _T_946, _T_947) @[el2_lib.scala 235:25] + _T_936[1] <= _T_948 @[el2_lib.scala 235:19] + node _T_949 = bits(_T_935, 2, 0) @[el2_lib.scala 234:21] + node _T_950 = orr(_T_949) @[el2_lib.scala 234:32] + node _T_951 = bits(_T_935, 3, 3) @[el2_lib.scala 235:36] + node _T_952 = not(_T_951) @[el2_lib.scala 235:32] + node _T_953 = bits(_T_935, 3, 3) @[el2_lib.scala 235:44] + node _T_954 = mux(_T_950, _T_952, _T_953) @[el2_lib.scala 235:25] + _T_936[2] <= _T_954 @[el2_lib.scala 235:19] + node _T_955 = bits(_T_935, 3, 0) @[el2_lib.scala 234:21] + node _T_956 = orr(_T_955) @[el2_lib.scala 234:32] + node _T_957 = bits(_T_935, 4, 4) @[el2_lib.scala 235:36] + node _T_958 = not(_T_957) @[el2_lib.scala 235:32] + node _T_959 = bits(_T_935, 4, 4) @[el2_lib.scala 235:44] + node _T_960 = mux(_T_956, _T_958, _T_959) @[el2_lib.scala 235:25] + _T_936[3] <= _T_960 @[el2_lib.scala 235:19] + node _T_961 = bits(_T_935, 4, 0) @[el2_lib.scala 234:21] + node _T_962 = orr(_T_961) @[el2_lib.scala 234:32] + node _T_963 = bits(_T_935, 5, 5) @[el2_lib.scala 235:36] + node _T_964 = not(_T_963) @[el2_lib.scala 235:32] + node _T_965 = bits(_T_935, 5, 5) @[el2_lib.scala 235:44] + node _T_966 = mux(_T_962, _T_964, _T_965) @[el2_lib.scala 235:25] + _T_936[4] <= _T_966 @[el2_lib.scala 235:19] + node _T_967 = bits(_T_935, 5, 0) @[el2_lib.scala 234:21] + node _T_968 = orr(_T_967) @[el2_lib.scala 234:32] + node _T_969 = bits(_T_935, 6, 6) @[el2_lib.scala 235:36] + node _T_970 = not(_T_969) @[el2_lib.scala 235:32] + node _T_971 = bits(_T_935, 6, 6) @[el2_lib.scala 235:44] + node _T_972 = mux(_T_968, _T_970, _T_971) @[el2_lib.scala 235:25] + _T_936[5] <= _T_972 @[el2_lib.scala 235:19] + node _T_973 = bits(_T_935, 6, 0) @[el2_lib.scala 234:21] + node _T_974 = orr(_T_973) @[el2_lib.scala 234:32] + node _T_975 = bits(_T_935, 7, 7) @[el2_lib.scala 235:36] + node _T_976 = not(_T_975) @[el2_lib.scala 235:32] + node _T_977 = bits(_T_935, 7, 7) @[el2_lib.scala 235:44] + node _T_978 = mux(_T_974, _T_976, _T_977) @[el2_lib.scala 235:25] + _T_936[6] <= _T_978 @[el2_lib.scala 235:19] + node _T_979 = bits(_T_935, 7, 0) @[el2_lib.scala 234:21] + node _T_980 = orr(_T_979) @[el2_lib.scala 234:32] + node _T_981 = bits(_T_935, 8, 8) @[el2_lib.scala 235:36] + node _T_982 = not(_T_981) @[el2_lib.scala 235:32] + node _T_983 = bits(_T_935, 8, 8) @[el2_lib.scala 235:44] + node _T_984 = mux(_T_980, _T_982, _T_983) @[el2_lib.scala 235:25] + _T_936[7] <= _T_984 @[el2_lib.scala 235:19] + node _T_985 = bits(_T_935, 8, 0) @[el2_lib.scala 234:21] + node _T_986 = orr(_T_985) @[el2_lib.scala 234:32] + node _T_987 = bits(_T_935, 9, 9) @[el2_lib.scala 235:36] + node _T_988 = not(_T_987) @[el2_lib.scala 235:32] + node _T_989 = bits(_T_935, 9, 9) @[el2_lib.scala 235:44] + node _T_990 = mux(_T_986, _T_988, _T_989) @[el2_lib.scala 235:25] + _T_936[8] <= _T_990 @[el2_lib.scala 235:19] + node _T_991 = bits(_T_935, 9, 0) @[el2_lib.scala 234:21] + node _T_992 = orr(_T_991) @[el2_lib.scala 234:32] + node _T_993 = bits(_T_935, 10, 10) @[el2_lib.scala 235:36] + node _T_994 = not(_T_993) @[el2_lib.scala 235:32] + node _T_995 = bits(_T_935, 10, 10) @[el2_lib.scala 235:44] + node _T_996 = mux(_T_992, _T_994, _T_995) @[el2_lib.scala 235:25] + _T_936[9] <= _T_996 @[el2_lib.scala 235:19] + node _T_997 = bits(_T_935, 10, 0) @[el2_lib.scala 234:21] + node _T_998 = orr(_T_997) @[el2_lib.scala 234:32] + node _T_999 = bits(_T_935, 11, 11) @[el2_lib.scala 235:36] + node _T_1000 = not(_T_999) @[el2_lib.scala 235:32] + node _T_1001 = bits(_T_935, 11, 11) @[el2_lib.scala 235:44] + node _T_1002 = mux(_T_998, _T_1000, _T_1001) @[el2_lib.scala 235:25] + _T_936[10] <= _T_1002 @[el2_lib.scala 235:19] + node _T_1003 = bits(_T_935, 11, 0) @[el2_lib.scala 234:21] + node _T_1004 = orr(_T_1003) @[el2_lib.scala 234:32] + node _T_1005 = bits(_T_935, 12, 12) @[el2_lib.scala 235:36] + node _T_1006 = not(_T_1005) @[el2_lib.scala 235:32] + node _T_1007 = bits(_T_935, 12, 12) @[el2_lib.scala 235:44] + node _T_1008 = mux(_T_1004, _T_1006, _T_1007) @[el2_lib.scala 235:25] + _T_936[11] <= _T_1008 @[el2_lib.scala 235:19] + node _T_1009 = bits(_T_935, 12, 0) @[el2_lib.scala 234:21] + node _T_1010 = orr(_T_1009) @[el2_lib.scala 234:32] + node _T_1011 = bits(_T_935, 13, 13) @[el2_lib.scala 235:36] + node _T_1012 = not(_T_1011) @[el2_lib.scala 235:32] + node _T_1013 = bits(_T_935, 13, 13) @[el2_lib.scala 235:44] + node _T_1014 = mux(_T_1010, _T_1012, _T_1013) @[el2_lib.scala 235:25] + _T_936[12] <= _T_1014 @[el2_lib.scala 235:19] + node _T_1015 = bits(_T_935, 13, 0) @[el2_lib.scala 234:21] + node _T_1016 = orr(_T_1015) @[el2_lib.scala 234:32] + node _T_1017 = bits(_T_935, 14, 14) @[el2_lib.scala 235:36] + node _T_1018 = not(_T_1017) @[el2_lib.scala 235:32] + node _T_1019 = bits(_T_935, 14, 14) @[el2_lib.scala 235:44] + node _T_1020 = mux(_T_1016, _T_1018, _T_1019) @[el2_lib.scala 235:25] + _T_936[13] <= _T_1020 @[el2_lib.scala 235:19] + node _T_1021 = bits(_T_935, 14, 0) @[el2_lib.scala 234:21] + node _T_1022 = orr(_T_1021) @[el2_lib.scala 234:32] + node _T_1023 = bits(_T_935, 15, 15) @[el2_lib.scala 235:36] + node _T_1024 = not(_T_1023) @[el2_lib.scala 235:32] + node _T_1025 = bits(_T_935, 15, 15) @[el2_lib.scala 235:44] + node _T_1026 = mux(_T_1022, _T_1024, _T_1025) @[el2_lib.scala 235:25] + _T_936[14] <= _T_1026 @[el2_lib.scala 235:19] + node _T_1027 = bits(_T_935, 15, 0) @[el2_lib.scala 234:21] + node _T_1028 = orr(_T_1027) @[el2_lib.scala 234:32] + node _T_1029 = bits(_T_935, 16, 16) @[el2_lib.scala 235:36] + node _T_1030 = not(_T_1029) @[el2_lib.scala 235:32] + node _T_1031 = bits(_T_935, 16, 16) @[el2_lib.scala 235:44] + node _T_1032 = mux(_T_1028, _T_1030, _T_1031) @[el2_lib.scala 235:25] + _T_936[15] <= _T_1032 @[el2_lib.scala 235:19] + node _T_1033 = bits(_T_935, 16, 0) @[el2_lib.scala 234:21] + node _T_1034 = orr(_T_1033) @[el2_lib.scala 234:32] + node _T_1035 = bits(_T_935, 17, 17) @[el2_lib.scala 235:36] + node _T_1036 = not(_T_1035) @[el2_lib.scala 235:32] + node _T_1037 = bits(_T_935, 17, 17) @[el2_lib.scala 235:44] + node _T_1038 = mux(_T_1034, _T_1036, _T_1037) @[el2_lib.scala 235:25] + _T_936[16] <= _T_1038 @[el2_lib.scala 235:19] + node _T_1039 = bits(_T_935, 17, 0) @[el2_lib.scala 234:21] + node _T_1040 = orr(_T_1039) @[el2_lib.scala 234:32] + node _T_1041 = bits(_T_935, 18, 18) @[el2_lib.scala 235:36] + node _T_1042 = not(_T_1041) @[el2_lib.scala 235:32] + node _T_1043 = bits(_T_935, 18, 18) @[el2_lib.scala 235:44] + node _T_1044 = mux(_T_1040, _T_1042, _T_1043) @[el2_lib.scala 235:25] + _T_936[17] <= _T_1044 @[el2_lib.scala 235:19] + node _T_1045 = bits(_T_935, 18, 0) @[el2_lib.scala 234:21] + node _T_1046 = orr(_T_1045) @[el2_lib.scala 234:32] + node _T_1047 = bits(_T_935, 19, 19) @[el2_lib.scala 235:36] + node _T_1048 = not(_T_1047) @[el2_lib.scala 235:32] + node _T_1049 = bits(_T_935, 19, 19) @[el2_lib.scala 235:44] + node _T_1050 = mux(_T_1046, _T_1048, _T_1049) @[el2_lib.scala 235:25] + _T_936[18] <= _T_1050 @[el2_lib.scala 235:19] + node _T_1051 = bits(_T_935, 19, 0) @[el2_lib.scala 234:21] + node _T_1052 = orr(_T_1051) @[el2_lib.scala 234:32] + node _T_1053 = bits(_T_935, 20, 20) @[el2_lib.scala 235:36] + node _T_1054 = not(_T_1053) @[el2_lib.scala 235:32] + node _T_1055 = bits(_T_935, 20, 20) @[el2_lib.scala 235:44] + node _T_1056 = mux(_T_1052, _T_1054, _T_1055) @[el2_lib.scala 235:25] + _T_936[19] <= _T_1056 @[el2_lib.scala 235:19] + node _T_1057 = bits(_T_935, 20, 0) @[el2_lib.scala 234:21] + node _T_1058 = orr(_T_1057) @[el2_lib.scala 234:32] + node _T_1059 = bits(_T_935, 21, 21) @[el2_lib.scala 235:36] + node _T_1060 = not(_T_1059) @[el2_lib.scala 235:32] + node _T_1061 = bits(_T_935, 21, 21) @[el2_lib.scala 235:44] + node _T_1062 = mux(_T_1058, _T_1060, _T_1061) @[el2_lib.scala 235:25] + _T_936[20] <= _T_1062 @[el2_lib.scala 235:19] + node _T_1063 = bits(_T_935, 21, 0) @[el2_lib.scala 234:21] + node _T_1064 = orr(_T_1063) @[el2_lib.scala 234:32] + node _T_1065 = bits(_T_935, 22, 22) @[el2_lib.scala 235:36] + node _T_1066 = not(_T_1065) @[el2_lib.scala 235:32] + node _T_1067 = bits(_T_935, 22, 22) @[el2_lib.scala 235:44] + node _T_1068 = mux(_T_1064, _T_1066, _T_1067) @[el2_lib.scala 235:25] + _T_936[21] <= _T_1068 @[el2_lib.scala 235:19] + node _T_1069 = bits(_T_935, 22, 0) @[el2_lib.scala 234:21] + node _T_1070 = orr(_T_1069) @[el2_lib.scala 234:32] + node _T_1071 = bits(_T_935, 23, 23) @[el2_lib.scala 235:36] + node _T_1072 = not(_T_1071) @[el2_lib.scala 235:32] + node _T_1073 = bits(_T_935, 23, 23) @[el2_lib.scala 235:44] + node _T_1074 = mux(_T_1070, _T_1072, _T_1073) @[el2_lib.scala 235:25] + _T_936[22] <= _T_1074 @[el2_lib.scala 235:19] + node _T_1075 = bits(_T_935, 23, 0) @[el2_lib.scala 234:21] + node _T_1076 = orr(_T_1075) @[el2_lib.scala 234:32] + node _T_1077 = bits(_T_935, 24, 24) @[el2_lib.scala 235:36] + node _T_1078 = not(_T_1077) @[el2_lib.scala 235:32] + node _T_1079 = bits(_T_935, 24, 24) @[el2_lib.scala 235:44] + node _T_1080 = mux(_T_1076, _T_1078, _T_1079) @[el2_lib.scala 235:25] + _T_936[23] <= _T_1080 @[el2_lib.scala 235:19] + node _T_1081 = bits(_T_935, 24, 0) @[el2_lib.scala 234:21] + node _T_1082 = orr(_T_1081) @[el2_lib.scala 234:32] + node _T_1083 = bits(_T_935, 25, 25) @[el2_lib.scala 235:36] + node _T_1084 = not(_T_1083) @[el2_lib.scala 235:32] + node _T_1085 = bits(_T_935, 25, 25) @[el2_lib.scala 235:44] + node _T_1086 = mux(_T_1082, _T_1084, _T_1085) @[el2_lib.scala 235:25] + _T_936[24] <= _T_1086 @[el2_lib.scala 235:19] + node _T_1087 = bits(_T_935, 25, 0) @[el2_lib.scala 234:21] + node _T_1088 = orr(_T_1087) @[el2_lib.scala 234:32] + node _T_1089 = bits(_T_935, 26, 26) @[el2_lib.scala 235:36] + node _T_1090 = not(_T_1089) @[el2_lib.scala 235:32] + node _T_1091 = bits(_T_935, 26, 26) @[el2_lib.scala 235:44] + node _T_1092 = mux(_T_1088, _T_1090, _T_1091) @[el2_lib.scala 235:25] + _T_936[25] <= _T_1092 @[el2_lib.scala 235:19] + node _T_1093 = bits(_T_935, 26, 0) @[el2_lib.scala 234:21] + node _T_1094 = orr(_T_1093) @[el2_lib.scala 234:32] + node _T_1095 = bits(_T_935, 27, 27) @[el2_lib.scala 235:36] + node _T_1096 = not(_T_1095) @[el2_lib.scala 235:32] + node _T_1097 = bits(_T_935, 27, 27) @[el2_lib.scala 235:44] + node _T_1098 = mux(_T_1094, _T_1096, _T_1097) @[el2_lib.scala 235:25] + _T_936[26] <= _T_1098 @[el2_lib.scala 235:19] + node _T_1099 = bits(_T_935, 27, 0) @[el2_lib.scala 234:21] + node _T_1100 = orr(_T_1099) @[el2_lib.scala 234:32] + node _T_1101 = bits(_T_935, 28, 28) @[el2_lib.scala 235:36] + node _T_1102 = not(_T_1101) @[el2_lib.scala 235:32] + node _T_1103 = bits(_T_935, 28, 28) @[el2_lib.scala 235:44] + node _T_1104 = mux(_T_1100, _T_1102, _T_1103) @[el2_lib.scala 235:25] + _T_936[27] <= _T_1104 @[el2_lib.scala 235:19] + node _T_1105 = bits(_T_935, 28, 0) @[el2_lib.scala 234:21] + node _T_1106 = orr(_T_1105) @[el2_lib.scala 234:32] + node _T_1107 = bits(_T_935, 29, 29) @[el2_lib.scala 235:36] + node _T_1108 = not(_T_1107) @[el2_lib.scala 235:32] + node _T_1109 = bits(_T_935, 29, 29) @[el2_lib.scala 235:44] + node _T_1110 = mux(_T_1106, _T_1108, _T_1109) @[el2_lib.scala 235:25] + _T_936[28] <= _T_1110 @[el2_lib.scala 235:19] + node _T_1111 = bits(_T_935, 29, 0) @[el2_lib.scala 234:21] + node _T_1112 = orr(_T_1111) @[el2_lib.scala 234:32] + node _T_1113 = bits(_T_935, 30, 30) @[el2_lib.scala 235:36] + node _T_1114 = not(_T_1113) @[el2_lib.scala 235:32] + node _T_1115 = bits(_T_935, 30, 30) @[el2_lib.scala 235:44] + node _T_1116 = mux(_T_1112, _T_1114, _T_1115) @[el2_lib.scala 235:25] + _T_936[29] <= _T_1116 @[el2_lib.scala 235:19] + node _T_1117 = bits(_T_935, 30, 0) @[el2_lib.scala 234:21] + node _T_1118 = orr(_T_1117) @[el2_lib.scala 234:32] + node _T_1119 = bits(_T_935, 31, 31) @[el2_lib.scala 235:36] + node _T_1120 = not(_T_1119) @[el2_lib.scala 235:32] + node _T_1121 = bits(_T_935, 31, 31) @[el2_lib.scala 235:44] + node _T_1122 = mux(_T_1118, _T_1120, _T_1121) @[el2_lib.scala 235:25] + _T_936[30] <= _T_1122 @[el2_lib.scala 235:19] + node _T_1123 = cat(_T_936[2], _T_936[1]) @[el2_lib.scala 237:14] + node _T_1124 = cat(_T_1123, _T_936[0]) @[el2_lib.scala 237:14] + node _T_1125 = cat(_T_936[4], _T_936[3]) @[el2_lib.scala 237:14] + node _T_1126 = cat(_T_936[6], _T_936[5]) @[el2_lib.scala 237:14] + node _T_1127 = cat(_T_1126, _T_1125) @[el2_lib.scala 237:14] + node _T_1128 = cat(_T_1127, _T_1124) @[el2_lib.scala 237:14] + node _T_1129 = cat(_T_936[8], _T_936[7]) @[el2_lib.scala 237:14] + node _T_1130 = cat(_T_936[10], _T_936[9]) @[el2_lib.scala 237:14] + node _T_1131 = cat(_T_1130, _T_1129) @[el2_lib.scala 237:14] + node _T_1132 = cat(_T_936[12], _T_936[11]) @[el2_lib.scala 237:14] + node _T_1133 = cat(_T_936[14], _T_936[13]) @[el2_lib.scala 237:14] + node _T_1134 = cat(_T_1133, _T_1132) @[el2_lib.scala 237:14] + node _T_1135 = cat(_T_1134, _T_1131) @[el2_lib.scala 237:14] + node _T_1136 = cat(_T_1135, _T_1128) @[el2_lib.scala 237:14] + node _T_1137 = cat(_T_936[16], _T_936[15]) @[el2_lib.scala 237:14] + node _T_1138 = cat(_T_936[18], _T_936[17]) @[el2_lib.scala 237:14] + node _T_1139 = cat(_T_1138, _T_1137) @[el2_lib.scala 237:14] + node _T_1140 = cat(_T_936[20], _T_936[19]) @[el2_lib.scala 237:14] + node _T_1141 = cat(_T_936[22], _T_936[21]) @[el2_lib.scala 237:14] + node _T_1142 = cat(_T_1141, _T_1140) @[el2_lib.scala 237:14] + node _T_1143 = cat(_T_1142, _T_1139) @[el2_lib.scala 237:14] + node _T_1144 = cat(_T_936[24], _T_936[23]) @[el2_lib.scala 237:14] + node _T_1145 = cat(_T_936[26], _T_936[25]) @[el2_lib.scala 237:14] + node _T_1146 = cat(_T_1145, _T_1144) @[el2_lib.scala 237:14] + node _T_1147 = cat(_T_936[28], _T_936[27]) @[el2_lib.scala 237:14] + node _T_1148 = cat(_T_936[30], _T_936[29]) @[el2_lib.scala 237:14] + node _T_1149 = cat(_T_1148, _T_1147) @[el2_lib.scala 237:14] + node _T_1150 = cat(_T_1149, _T_1146) @[el2_lib.scala 237:14] + node _T_1151 = cat(_T_1150, _T_1143) @[el2_lib.scala 237:14] + node _T_1152 = cat(_T_1151, _T_1136) @[el2_lib.scala 237:14] + node _T_1153 = bits(_T_935, 0, 0) @[el2_lib.scala 237:25] + node _T_1154 = cat(_T_1152, _T_1153) @[Cat.scala 29:58] + node _T_1155 = bits(q_ff, 31, 0) @[el2_exu_div_ctl.scala 197:104] + node q_ff_eff = mux(_T_934, _T_1154, _T_1155) @[el2_exu_div_ctl.scala 197:21] + node _T_1156 = and(sign_ff, dividend_neg_ff) @[el2_exu_div_ctl.scala 198:31] + node _T_1157 = bits(_T_1156, 0, 0) @[el2_exu_div_ctl.scala 198:51] + node _T_1158 = bits(a_ff, 31, 0) @[el2_exu_div_ctl.scala 198:74] + wire _T_1159 : UInt<1>[31] @[el2_lib.scala 232:20] + node _T_1160 = bits(_T_1158, 0, 0) @[el2_lib.scala 234:21] + node _T_1161 = orr(_T_1160) @[el2_lib.scala 234:32] + node _T_1162 = bits(_T_1158, 1, 1) @[el2_lib.scala 235:36] + node _T_1163 = not(_T_1162) @[el2_lib.scala 235:32] + node _T_1164 = bits(_T_1158, 1, 1) @[el2_lib.scala 235:44] + node _T_1165 = mux(_T_1161, _T_1163, _T_1164) @[el2_lib.scala 235:25] + _T_1159[0] <= _T_1165 @[el2_lib.scala 235:19] + node _T_1166 = bits(_T_1158, 1, 0) @[el2_lib.scala 234:21] + node _T_1167 = orr(_T_1166) @[el2_lib.scala 234:32] + node _T_1168 = bits(_T_1158, 2, 2) @[el2_lib.scala 235:36] + node _T_1169 = not(_T_1168) @[el2_lib.scala 235:32] + node _T_1170 = bits(_T_1158, 2, 2) @[el2_lib.scala 235:44] + node _T_1171 = mux(_T_1167, _T_1169, _T_1170) @[el2_lib.scala 235:25] + _T_1159[1] <= _T_1171 @[el2_lib.scala 235:19] + node _T_1172 = bits(_T_1158, 2, 0) @[el2_lib.scala 234:21] + node _T_1173 = orr(_T_1172) @[el2_lib.scala 234:32] + node _T_1174 = bits(_T_1158, 3, 3) @[el2_lib.scala 235:36] + node _T_1175 = not(_T_1174) @[el2_lib.scala 235:32] + node _T_1176 = bits(_T_1158, 3, 3) @[el2_lib.scala 235:44] + node _T_1177 = mux(_T_1173, _T_1175, _T_1176) @[el2_lib.scala 235:25] + _T_1159[2] <= _T_1177 @[el2_lib.scala 235:19] + node _T_1178 = bits(_T_1158, 3, 0) @[el2_lib.scala 234:21] + node _T_1179 = orr(_T_1178) @[el2_lib.scala 234:32] + node _T_1180 = bits(_T_1158, 4, 4) @[el2_lib.scala 235:36] + node _T_1181 = not(_T_1180) @[el2_lib.scala 235:32] + node _T_1182 = bits(_T_1158, 4, 4) @[el2_lib.scala 235:44] + node _T_1183 = mux(_T_1179, _T_1181, _T_1182) @[el2_lib.scala 235:25] + _T_1159[3] <= _T_1183 @[el2_lib.scala 235:19] + node _T_1184 = bits(_T_1158, 4, 0) @[el2_lib.scala 234:21] + node _T_1185 = orr(_T_1184) @[el2_lib.scala 234:32] + node _T_1186 = bits(_T_1158, 5, 5) @[el2_lib.scala 235:36] + node _T_1187 = not(_T_1186) @[el2_lib.scala 235:32] + node _T_1188 = bits(_T_1158, 5, 5) @[el2_lib.scala 235:44] + node _T_1189 = mux(_T_1185, _T_1187, _T_1188) @[el2_lib.scala 235:25] + _T_1159[4] <= _T_1189 @[el2_lib.scala 235:19] + node _T_1190 = bits(_T_1158, 5, 0) @[el2_lib.scala 234:21] + node _T_1191 = orr(_T_1190) @[el2_lib.scala 234:32] + node _T_1192 = bits(_T_1158, 6, 6) @[el2_lib.scala 235:36] + node _T_1193 = not(_T_1192) @[el2_lib.scala 235:32] + node _T_1194 = bits(_T_1158, 6, 6) @[el2_lib.scala 235:44] + node _T_1195 = mux(_T_1191, _T_1193, _T_1194) @[el2_lib.scala 235:25] + _T_1159[5] <= _T_1195 @[el2_lib.scala 235:19] + node _T_1196 = bits(_T_1158, 6, 0) @[el2_lib.scala 234:21] + node _T_1197 = orr(_T_1196) @[el2_lib.scala 234:32] + node _T_1198 = bits(_T_1158, 7, 7) @[el2_lib.scala 235:36] + node _T_1199 = not(_T_1198) @[el2_lib.scala 235:32] + node _T_1200 = bits(_T_1158, 7, 7) @[el2_lib.scala 235:44] + node _T_1201 = mux(_T_1197, _T_1199, _T_1200) @[el2_lib.scala 235:25] + _T_1159[6] <= _T_1201 @[el2_lib.scala 235:19] + node _T_1202 = bits(_T_1158, 7, 0) @[el2_lib.scala 234:21] + node _T_1203 = orr(_T_1202) @[el2_lib.scala 234:32] + node _T_1204 = bits(_T_1158, 8, 8) @[el2_lib.scala 235:36] + node _T_1205 = not(_T_1204) @[el2_lib.scala 235:32] + node _T_1206 = bits(_T_1158, 8, 8) @[el2_lib.scala 235:44] + node _T_1207 = mux(_T_1203, _T_1205, _T_1206) @[el2_lib.scala 235:25] + _T_1159[7] <= _T_1207 @[el2_lib.scala 235:19] + node _T_1208 = bits(_T_1158, 8, 0) @[el2_lib.scala 234:21] + node _T_1209 = orr(_T_1208) @[el2_lib.scala 234:32] + node _T_1210 = bits(_T_1158, 9, 9) @[el2_lib.scala 235:36] + node _T_1211 = not(_T_1210) @[el2_lib.scala 235:32] + node _T_1212 = bits(_T_1158, 9, 9) @[el2_lib.scala 235:44] + node _T_1213 = mux(_T_1209, _T_1211, _T_1212) @[el2_lib.scala 235:25] + _T_1159[8] <= _T_1213 @[el2_lib.scala 235:19] + node _T_1214 = bits(_T_1158, 9, 0) @[el2_lib.scala 234:21] + node _T_1215 = orr(_T_1214) @[el2_lib.scala 234:32] + node _T_1216 = bits(_T_1158, 10, 10) @[el2_lib.scala 235:36] + node _T_1217 = not(_T_1216) @[el2_lib.scala 235:32] + node _T_1218 = bits(_T_1158, 10, 10) @[el2_lib.scala 235:44] + node _T_1219 = mux(_T_1215, _T_1217, _T_1218) @[el2_lib.scala 235:25] + _T_1159[9] <= _T_1219 @[el2_lib.scala 235:19] + node _T_1220 = bits(_T_1158, 10, 0) @[el2_lib.scala 234:21] + node _T_1221 = orr(_T_1220) @[el2_lib.scala 234:32] + node _T_1222 = bits(_T_1158, 11, 11) @[el2_lib.scala 235:36] + node _T_1223 = not(_T_1222) @[el2_lib.scala 235:32] + node _T_1224 = bits(_T_1158, 11, 11) @[el2_lib.scala 235:44] + node _T_1225 = mux(_T_1221, _T_1223, _T_1224) @[el2_lib.scala 235:25] + _T_1159[10] <= _T_1225 @[el2_lib.scala 235:19] + node _T_1226 = bits(_T_1158, 11, 0) @[el2_lib.scala 234:21] + node _T_1227 = orr(_T_1226) @[el2_lib.scala 234:32] + node _T_1228 = bits(_T_1158, 12, 12) @[el2_lib.scala 235:36] + node _T_1229 = not(_T_1228) @[el2_lib.scala 235:32] + node _T_1230 = bits(_T_1158, 12, 12) @[el2_lib.scala 235:44] + node _T_1231 = mux(_T_1227, _T_1229, _T_1230) @[el2_lib.scala 235:25] + _T_1159[11] <= _T_1231 @[el2_lib.scala 235:19] + node _T_1232 = bits(_T_1158, 12, 0) @[el2_lib.scala 234:21] + node _T_1233 = orr(_T_1232) @[el2_lib.scala 234:32] + node _T_1234 = bits(_T_1158, 13, 13) @[el2_lib.scala 235:36] + node _T_1235 = not(_T_1234) @[el2_lib.scala 235:32] + node _T_1236 = bits(_T_1158, 13, 13) @[el2_lib.scala 235:44] + node _T_1237 = mux(_T_1233, _T_1235, _T_1236) @[el2_lib.scala 235:25] + _T_1159[12] <= _T_1237 @[el2_lib.scala 235:19] + node _T_1238 = bits(_T_1158, 13, 0) @[el2_lib.scala 234:21] + node _T_1239 = orr(_T_1238) @[el2_lib.scala 234:32] + node _T_1240 = bits(_T_1158, 14, 14) @[el2_lib.scala 235:36] + node _T_1241 = not(_T_1240) @[el2_lib.scala 235:32] + node _T_1242 = bits(_T_1158, 14, 14) @[el2_lib.scala 235:44] + node _T_1243 = mux(_T_1239, _T_1241, _T_1242) @[el2_lib.scala 235:25] + _T_1159[13] <= _T_1243 @[el2_lib.scala 235:19] + node _T_1244 = bits(_T_1158, 14, 0) @[el2_lib.scala 234:21] + node _T_1245 = orr(_T_1244) @[el2_lib.scala 234:32] + node _T_1246 = bits(_T_1158, 15, 15) @[el2_lib.scala 235:36] + node _T_1247 = not(_T_1246) @[el2_lib.scala 235:32] + node _T_1248 = bits(_T_1158, 15, 15) @[el2_lib.scala 235:44] + node _T_1249 = mux(_T_1245, _T_1247, _T_1248) @[el2_lib.scala 235:25] + _T_1159[14] <= _T_1249 @[el2_lib.scala 235:19] + node _T_1250 = bits(_T_1158, 15, 0) @[el2_lib.scala 234:21] + node _T_1251 = orr(_T_1250) @[el2_lib.scala 234:32] + node _T_1252 = bits(_T_1158, 16, 16) @[el2_lib.scala 235:36] + node _T_1253 = not(_T_1252) @[el2_lib.scala 235:32] + node _T_1254 = bits(_T_1158, 16, 16) @[el2_lib.scala 235:44] + node _T_1255 = mux(_T_1251, _T_1253, _T_1254) @[el2_lib.scala 235:25] + _T_1159[15] <= _T_1255 @[el2_lib.scala 235:19] + node _T_1256 = bits(_T_1158, 16, 0) @[el2_lib.scala 234:21] + node _T_1257 = orr(_T_1256) @[el2_lib.scala 234:32] + node _T_1258 = bits(_T_1158, 17, 17) @[el2_lib.scala 235:36] + node _T_1259 = not(_T_1258) @[el2_lib.scala 235:32] + node _T_1260 = bits(_T_1158, 17, 17) @[el2_lib.scala 235:44] + node _T_1261 = mux(_T_1257, _T_1259, _T_1260) @[el2_lib.scala 235:25] + _T_1159[16] <= _T_1261 @[el2_lib.scala 235:19] + node _T_1262 = bits(_T_1158, 17, 0) @[el2_lib.scala 234:21] + node _T_1263 = orr(_T_1262) @[el2_lib.scala 234:32] + node _T_1264 = bits(_T_1158, 18, 18) @[el2_lib.scala 235:36] + node _T_1265 = not(_T_1264) @[el2_lib.scala 235:32] + node _T_1266 = bits(_T_1158, 18, 18) @[el2_lib.scala 235:44] + node _T_1267 = mux(_T_1263, _T_1265, _T_1266) @[el2_lib.scala 235:25] + _T_1159[17] <= _T_1267 @[el2_lib.scala 235:19] + node _T_1268 = bits(_T_1158, 18, 0) @[el2_lib.scala 234:21] + node _T_1269 = orr(_T_1268) @[el2_lib.scala 234:32] + node _T_1270 = bits(_T_1158, 19, 19) @[el2_lib.scala 235:36] + node _T_1271 = not(_T_1270) @[el2_lib.scala 235:32] + node _T_1272 = bits(_T_1158, 19, 19) @[el2_lib.scala 235:44] + node _T_1273 = mux(_T_1269, _T_1271, _T_1272) @[el2_lib.scala 235:25] + _T_1159[18] <= _T_1273 @[el2_lib.scala 235:19] + node _T_1274 = bits(_T_1158, 19, 0) @[el2_lib.scala 234:21] + node _T_1275 = orr(_T_1274) @[el2_lib.scala 234:32] + node _T_1276 = bits(_T_1158, 20, 20) @[el2_lib.scala 235:36] + node _T_1277 = not(_T_1276) @[el2_lib.scala 235:32] + node _T_1278 = bits(_T_1158, 20, 20) @[el2_lib.scala 235:44] + node _T_1279 = mux(_T_1275, _T_1277, _T_1278) @[el2_lib.scala 235:25] + _T_1159[19] <= _T_1279 @[el2_lib.scala 235:19] + node _T_1280 = bits(_T_1158, 20, 0) @[el2_lib.scala 234:21] + node _T_1281 = orr(_T_1280) @[el2_lib.scala 234:32] + node _T_1282 = bits(_T_1158, 21, 21) @[el2_lib.scala 235:36] + node _T_1283 = not(_T_1282) @[el2_lib.scala 235:32] + node _T_1284 = bits(_T_1158, 21, 21) @[el2_lib.scala 235:44] + node _T_1285 = mux(_T_1281, _T_1283, _T_1284) @[el2_lib.scala 235:25] + _T_1159[20] <= _T_1285 @[el2_lib.scala 235:19] + node _T_1286 = bits(_T_1158, 21, 0) @[el2_lib.scala 234:21] + node _T_1287 = orr(_T_1286) @[el2_lib.scala 234:32] + node _T_1288 = bits(_T_1158, 22, 22) @[el2_lib.scala 235:36] + node _T_1289 = not(_T_1288) @[el2_lib.scala 235:32] + node _T_1290 = bits(_T_1158, 22, 22) @[el2_lib.scala 235:44] + node _T_1291 = mux(_T_1287, _T_1289, _T_1290) @[el2_lib.scala 235:25] + _T_1159[21] <= _T_1291 @[el2_lib.scala 235:19] + node _T_1292 = bits(_T_1158, 22, 0) @[el2_lib.scala 234:21] + node _T_1293 = orr(_T_1292) @[el2_lib.scala 234:32] + node _T_1294 = bits(_T_1158, 23, 23) @[el2_lib.scala 235:36] + node _T_1295 = not(_T_1294) @[el2_lib.scala 235:32] + node _T_1296 = bits(_T_1158, 23, 23) @[el2_lib.scala 235:44] + node _T_1297 = mux(_T_1293, _T_1295, _T_1296) @[el2_lib.scala 235:25] + _T_1159[22] <= _T_1297 @[el2_lib.scala 235:19] + node _T_1298 = bits(_T_1158, 23, 0) @[el2_lib.scala 234:21] + node _T_1299 = orr(_T_1298) @[el2_lib.scala 234:32] + node _T_1300 = bits(_T_1158, 24, 24) @[el2_lib.scala 235:36] + node _T_1301 = not(_T_1300) @[el2_lib.scala 235:32] + node _T_1302 = bits(_T_1158, 24, 24) @[el2_lib.scala 235:44] + node _T_1303 = mux(_T_1299, _T_1301, _T_1302) @[el2_lib.scala 235:25] + _T_1159[23] <= _T_1303 @[el2_lib.scala 235:19] + node _T_1304 = bits(_T_1158, 24, 0) @[el2_lib.scala 234:21] + node _T_1305 = orr(_T_1304) @[el2_lib.scala 234:32] + node _T_1306 = bits(_T_1158, 25, 25) @[el2_lib.scala 235:36] + node _T_1307 = not(_T_1306) @[el2_lib.scala 235:32] + node _T_1308 = bits(_T_1158, 25, 25) @[el2_lib.scala 235:44] + node _T_1309 = mux(_T_1305, _T_1307, _T_1308) @[el2_lib.scala 235:25] + _T_1159[24] <= _T_1309 @[el2_lib.scala 235:19] + node _T_1310 = bits(_T_1158, 25, 0) @[el2_lib.scala 234:21] + node _T_1311 = orr(_T_1310) @[el2_lib.scala 234:32] + node _T_1312 = bits(_T_1158, 26, 26) @[el2_lib.scala 235:36] + node _T_1313 = not(_T_1312) @[el2_lib.scala 235:32] + node _T_1314 = bits(_T_1158, 26, 26) @[el2_lib.scala 235:44] + node _T_1315 = mux(_T_1311, _T_1313, _T_1314) @[el2_lib.scala 235:25] + _T_1159[25] <= _T_1315 @[el2_lib.scala 235:19] + node _T_1316 = bits(_T_1158, 26, 0) @[el2_lib.scala 234:21] + node _T_1317 = orr(_T_1316) @[el2_lib.scala 234:32] + node _T_1318 = bits(_T_1158, 27, 27) @[el2_lib.scala 235:36] + node _T_1319 = not(_T_1318) @[el2_lib.scala 235:32] + node _T_1320 = bits(_T_1158, 27, 27) @[el2_lib.scala 235:44] + node _T_1321 = mux(_T_1317, _T_1319, _T_1320) @[el2_lib.scala 235:25] + _T_1159[26] <= _T_1321 @[el2_lib.scala 235:19] + node _T_1322 = bits(_T_1158, 27, 0) @[el2_lib.scala 234:21] + node _T_1323 = orr(_T_1322) @[el2_lib.scala 234:32] + node _T_1324 = bits(_T_1158, 28, 28) @[el2_lib.scala 235:36] + node _T_1325 = not(_T_1324) @[el2_lib.scala 235:32] + node _T_1326 = bits(_T_1158, 28, 28) @[el2_lib.scala 235:44] + node _T_1327 = mux(_T_1323, _T_1325, _T_1326) @[el2_lib.scala 235:25] + _T_1159[27] <= _T_1327 @[el2_lib.scala 235:19] + node _T_1328 = bits(_T_1158, 28, 0) @[el2_lib.scala 234:21] + node _T_1329 = orr(_T_1328) @[el2_lib.scala 234:32] + node _T_1330 = bits(_T_1158, 29, 29) @[el2_lib.scala 235:36] + node _T_1331 = not(_T_1330) @[el2_lib.scala 235:32] + node _T_1332 = bits(_T_1158, 29, 29) @[el2_lib.scala 235:44] + node _T_1333 = mux(_T_1329, _T_1331, _T_1332) @[el2_lib.scala 235:25] + _T_1159[28] <= _T_1333 @[el2_lib.scala 235:19] + node _T_1334 = bits(_T_1158, 29, 0) @[el2_lib.scala 234:21] + node _T_1335 = orr(_T_1334) @[el2_lib.scala 234:32] + node _T_1336 = bits(_T_1158, 30, 30) @[el2_lib.scala 235:36] + node _T_1337 = not(_T_1336) @[el2_lib.scala 235:32] + node _T_1338 = bits(_T_1158, 30, 30) @[el2_lib.scala 235:44] + node _T_1339 = mux(_T_1335, _T_1337, _T_1338) @[el2_lib.scala 235:25] + _T_1159[29] <= _T_1339 @[el2_lib.scala 235:19] + node _T_1340 = bits(_T_1158, 30, 0) @[el2_lib.scala 234:21] + node _T_1341 = orr(_T_1340) @[el2_lib.scala 234:32] + node _T_1342 = bits(_T_1158, 31, 31) @[el2_lib.scala 235:36] + node _T_1343 = not(_T_1342) @[el2_lib.scala 235:32] + node _T_1344 = bits(_T_1158, 31, 31) @[el2_lib.scala 235:44] + node _T_1345 = mux(_T_1341, _T_1343, _T_1344) @[el2_lib.scala 235:25] + _T_1159[30] <= _T_1345 @[el2_lib.scala 235:19] + node _T_1346 = cat(_T_1159[2], _T_1159[1]) @[el2_lib.scala 237:14] + node _T_1347 = cat(_T_1346, _T_1159[0]) @[el2_lib.scala 237:14] + node _T_1348 = cat(_T_1159[4], _T_1159[3]) @[el2_lib.scala 237:14] + node _T_1349 = cat(_T_1159[6], _T_1159[5]) @[el2_lib.scala 237:14] + node _T_1350 = cat(_T_1349, _T_1348) @[el2_lib.scala 237:14] + node _T_1351 = cat(_T_1350, _T_1347) @[el2_lib.scala 237:14] + node _T_1352 = cat(_T_1159[8], _T_1159[7]) @[el2_lib.scala 237:14] + node _T_1353 = cat(_T_1159[10], _T_1159[9]) @[el2_lib.scala 237:14] + node _T_1354 = cat(_T_1353, _T_1352) @[el2_lib.scala 237:14] + node _T_1355 = cat(_T_1159[12], _T_1159[11]) @[el2_lib.scala 237:14] + node _T_1356 = cat(_T_1159[14], _T_1159[13]) @[el2_lib.scala 237:14] + node _T_1357 = cat(_T_1356, _T_1355) @[el2_lib.scala 237:14] + node _T_1358 = cat(_T_1357, _T_1354) @[el2_lib.scala 237:14] + node _T_1359 = cat(_T_1358, _T_1351) @[el2_lib.scala 237:14] + node _T_1360 = cat(_T_1159[16], _T_1159[15]) @[el2_lib.scala 237:14] + node _T_1361 = cat(_T_1159[18], _T_1159[17]) @[el2_lib.scala 237:14] + node _T_1362 = cat(_T_1361, _T_1360) @[el2_lib.scala 237:14] + node _T_1363 = cat(_T_1159[20], _T_1159[19]) @[el2_lib.scala 237:14] + node _T_1364 = cat(_T_1159[22], _T_1159[21]) @[el2_lib.scala 237:14] + node _T_1365 = cat(_T_1364, _T_1363) @[el2_lib.scala 237:14] + node _T_1366 = cat(_T_1365, _T_1362) @[el2_lib.scala 237:14] + node _T_1367 = cat(_T_1159[24], _T_1159[23]) @[el2_lib.scala 237:14] + node _T_1368 = cat(_T_1159[26], _T_1159[25]) @[el2_lib.scala 237:14] + node _T_1369 = cat(_T_1368, _T_1367) @[el2_lib.scala 237:14] + node _T_1370 = cat(_T_1159[28], _T_1159[27]) @[el2_lib.scala 237:14] + node _T_1371 = cat(_T_1159[30], _T_1159[29]) @[el2_lib.scala 237:14] + node _T_1372 = cat(_T_1371, _T_1370) @[el2_lib.scala 237:14] + node _T_1373 = cat(_T_1372, _T_1369) @[el2_lib.scala 237:14] + node _T_1374 = cat(_T_1373, _T_1366) @[el2_lib.scala 237:14] + node _T_1375 = cat(_T_1374, _T_1359) @[el2_lib.scala 237:14] + node _T_1376 = bits(_T_1158, 0, 0) @[el2_lib.scala 237:25] + node _T_1377 = cat(_T_1375, _T_1376) @[Cat.scala 29:58] + node _T_1378 = bits(a_ff, 31, 0) @[el2_exu_div_ctl.scala 198:87] + node a_ff_eff = mux(_T_1157, _T_1377, _T_1378) @[el2_exu_div_ctl.scala 198:21] + node _T_1379 = bits(smallnum_case_ff, 0, 0) @[el2_exu_div_ctl.scala 201:22] + node _T_1380 = cat(UInt<28>("h00"), smallnum_ff) @[Cat.scala 29:58] + node _T_1381 = bits(rem_ff, 0, 0) @[el2_exu_div_ctl.scala 202:12] + node _T_1382 = eq(smallnum_case_ff, UInt<1>("h00")) @[el2_exu_div_ctl.scala 203:6] + node _T_1383 = eq(rem_ff, UInt<1>("h00")) @[el2_exu_div_ctl.scala 203:26] + node _T_1384 = and(_T_1382, _T_1383) @[el2_exu_div_ctl.scala 203:24] + node _T_1385 = bits(_T_1384, 0, 0) @[el2_exu_div_ctl.scala 203:35] + node _T_1386 = mux(_T_1379, _T_1380, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1387 = mux(_T_1381, a_ff_eff, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1388 = mux(_T_1385, q_ff_eff, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1389 = or(_T_1386, _T_1387) @[Mux.scala 27:72] + node _T_1390 = or(_T_1389, _T_1388) @[Mux.scala 27:72] + wire _T_1391 : UInt<32> @[Mux.scala 27:72] + _T_1391 <= _T_1390 @[Mux.scala 27:72] + io.out <= _T_1391 @[el2_exu_div_ctl.scala 200:10] + node _T_1392 = eq(io.cancel, UInt<1>("h00")) @[el2_exu_div_ctl.scala 211:42] + node _T_1393 = and(io.dp.valid, _T_1392) @[el2_exu_div_ctl.scala 211:40] + node _T_1394 = bits(div_clken, 0, 0) @[el2_exu_div_ctl.scala 211:67] + reg _T_1395 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1394 : @[Reg.scala 28:19] + _T_1395 <= _T_1393 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + valid_ff_x <= _T_1395 @[el2_exu_div_ctl.scala 211:14] + node _T_1396 = eq(io.cancel, UInt<1>("h00")) @[el2_exu_div_ctl.scala 212:39] + node _T_1397 = and(finish, _T_1396) @[el2_exu_div_ctl.scala 212:37] + node _T_1398 = bits(div_clken, 0, 0) @[el2_exu_div_ctl.scala 212:64] + reg _T_1399 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1398 : @[Reg.scala 28:19] + _T_1399 <= _T_1397 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + finish_ff <= _T_1399 @[el2_exu_div_ctl.scala 212:14] + node _T_1400 = bits(div_clken, 0, 0) @[el2_exu_div_ctl.scala 213:48] + reg _T_1401 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1400 : @[Reg.scala 28:19] + _T_1401 <= run_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + run_state <= _T_1401 @[el2_exu_div_ctl.scala 213:14] + node _T_1402 = bits(div_clken, 0, 0) @[el2_exu_div_ctl.scala 214:50] + reg _T_1403 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1402 : @[Reg.scala 28:19] + _T_1403 <= count_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + count <= _T_1403 @[el2_exu_div_ctl.scala 214:14] + node _T_1404 = bits(io.dividend, 31, 31) @[el2_exu_div_ctl.scala 215:44] + node _T_1405 = bits(io.dp.valid, 0, 0) @[el2_exu_div_ctl.scala 215:67] + node _T_1406 = bits(div_clken, 0, 0) @[el2_exu_div_ctl.scala 215:84] + node _T_1407 = and(_T_1405, _T_1406) @[el2_exu_div_ctl.scala 215:73] + reg _T_1408 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1407 : @[Reg.scala 28:19] + _T_1408 <= _T_1404 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + dividend_neg_ff <= _T_1408 @[el2_exu_div_ctl.scala 215:19] + node _T_1409 = bits(io.divisor, 31, 31) @[el2_exu_div_ctl.scala 216:43] + node _T_1410 = bits(io.dp.valid, 0, 0) @[el2_exu_div_ctl.scala 216:66] + node _T_1411 = bits(div_clken, 0, 0) @[el2_exu_div_ctl.scala 216:83] + node _T_1412 = and(_T_1410, _T_1411) @[el2_exu_div_ctl.scala 216:72] + reg _T_1413 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1412 : @[Reg.scala 28:19] + _T_1413 <= _T_1409 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + divisor_neg_ff <= _T_1413 @[el2_exu_div_ctl.scala 216:19] + node _T_1414 = bits(io.dp.valid, 0, 0) @[el2_exu_div_ctl.scala 217:53] + node _T_1415 = bits(div_clken, 0, 0) @[el2_exu_div_ctl.scala 217:70] + node _T_1416 = and(_T_1414, _T_1415) @[el2_exu_div_ctl.scala 217:59] + reg _T_1417 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1416 : @[Reg.scala 28:19] + _T_1417 <= sign_eff @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + sign_ff <= _T_1417 @[el2_exu_div_ctl.scala 217:12] + node _T_1418 = bits(io.dp.valid, 0, 0) @[el2_exu_div_ctl.scala 218:54] + node _T_1419 = bits(div_clken, 0, 0) @[el2_exu_div_ctl.scala 218:71] + node _T_1420 = and(_T_1418, _T_1419) @[el2_exu_div_ctl.scala 218:60] + reg _T_1421 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1420 : @[Reg.scala 28:19] + _T_1421 <= io.dp.rem @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + rem_ff <= _T_1421 @[el2_exu_div_ctl.scala 218:12] + node _T_1422 = bits(div_clken, 0, 0) @[el2_exu_div_ctl.scala 219:62] + reg _T_1423 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1422 : @[Reg.scala 28:19] + _T_1423 <= smallnum_case @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + smallnum_case_ff <= _T_1423 @[el2_exu_div_ctl.scala 219:21] + node _T_1424 = bits(div_clken, 0, 0) @[el2_exu_div_ctl.scala 220:56] + reg _T_1425 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1424 : @[Reg.scala 28:19] + _T_1425 <= smallnum @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + smallnum_ff <= _T_1425 @[el2_exu_div_ctl.scala 220:20] + node _T_1426 = bits(div_clken, 0, 0) @[el2_exu_div_ctl.scala 221:61] + reg _T_1427 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1426 : @[Reg.scala 28:19] + _T_1427 <= shortq_enable @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + shortq_enable_ff <= _T_1427 @[el2_exu_div_ctl.scala 221:20] + node _T_1428 = bits(div_clken, 0, 0) @[el2_exu_div_ctl.scala 222:60] + reg _T_1429 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1428 : @[Reg.scala 28:19] + _T_1429 <= shortq_shift @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + shortq_shift_xx <= _T_1429 @[el2_exu_div_ctl.scala 222:20] + node _T_1430 = bits(qff_enable, 0, 0) @[el2_exu_div_ctl.scala 223:44] + reg _T_1431 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1430 : @[Reg.scala 28:19] + _T_1431 <= q_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + q_ff <= _T_1431 @[el2_exu_div_ctl.scala 223:8] + node _T_1432 = bits(aff_enable, 0, 0) @[el2_exu_div_ctl.scala 224:44] + reg _T_1433 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1432 : @[Reg.scala 28:19] + _T_1433 <= a_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + a_ff <= _T_1433 @[el2_exu_div_ctl.scala 224:8] + node _T_1434 = eq(io.dp.unsign, UInt<1>("h00")) @[el2_exu_div_ctl.scala 225:26] + node _T_1435 = bits(io.divisor, 31, 31) @[el2_exu_div_ctl.scala 225:52] + node _T_1436 = and(_T_1434, _T_1435) @[el2_exu_div_ctl.scala 225:40] + node _T_1437 = cat(_T_1436, io.divisor) @[Cat.scala 29:58] + node _T_1438 = bits(io.dp.valid, 0, 0) @[el2_exu_div_ctl.scala 225:88] + reg _T_1439 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1438 : @[Reg.scala 28:19] + _T_1439 <= _T_1437 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + m_ff <= _T_1439 @[el2_exu_div_ctl.scala 225:8] + diff --git a/el2_exu_div_ctl.v b/el2_exu_div_ctl.v new file mode 100644 index 00000000..162cbd96 --- /dev/null +++ b/el2_exu_div_ctl.v @@ -0,0 +1,790 @@ +module el2_exu_div_ctl( + input clock, + input reset, + input io_scan_mode, + input io_dp_valid, + input io_dp_unsign, + input io_dp_rem, + input [31:0] io_dividend, + input [31:0] io_divisor, + input io_cancel, + output [31:0] io_out, + output io_finish_dly +); +`ifdef RANDOMIZE_REG_INIT + reg [31:0] _RAND_0; + reg [63:0] _RAND_1; + reg [63:0] _RAND_2; + reg [31:0] _RAND_3; + reg [31:0] _RAND_4; + reg [31:0] _RAND_5; + reg [31:0] _RAND_6; + reg [31:0] _RAND_7; + reg [31:0] _RAND_8; + reg [31:0] _RAND_9; + reg [31:0] _RAND_10; + reg [63:0] _RAND_11; + reg [31:0] _RAND_12; + reg [31:0] _RAND_13; + reg [31:0] _RAND_14; +`endif // RANDOMIZE_REG_INIT + wire _T = ~io_cancel; // @[el2_exu_div_ctl.scala 56:30] + reg valid_ff_x; // @[Reg.scala 27:20] + wire valid_x = valid_ff_x & _T; // @[el2_exu_div_ctl.scala 56:28] + reg [32:0] q_ff; // @[Reg.scala 27:20] + wire _T_2 = q_ff[31:4] == 28'h0; // @[el2_exu_div_ctl.scala 62:33] + reg [32:0] m_ff; // @[Reg.scala 27:20] + wire _T_4 = m_ff[31:4] == 28'h0; // @[el2_exu_div_ctl.scala 62:56] + wire _T_5 = _T_2 & _T_4; // @[el2_exu_div_ctl.scala 62:42] + wire _T_7 = m_ff[31:0] != 32'h0; // @[el2_exu_div_ctl.scala 62:79] + wire _T_8 = _T_5 & _T_7; // @[el2_exu_div_ctl.scala 62:65] + reg rem_ff; // @[Reg.scala 27:20] + wire _T_9 = ~rem_ff; // @[el2_exu_div_ctl.scala 62:90] + wire _T_10 = _T_8 & _T_9; // @[el2_exu_div_ctl.scala 62:88] + wire _T_11 = _T_10 & valid_x; // @[el2_exu_div_ctl.scala 62:98] + wire _T_13 = q_ff[31:0] == 32'h0; // @[el2_exu_div_ctl.scala 63:16] + wire _T_16 = _T_13 & _T_7; // @[el2_exu_div_ctl.scala 63:25] + wire _T_18 = _T_16 & _T_9; // @[el2_exu_div_ctl.scala 63:48] + wire _T_19 = _T_18 & valid_x; // @[el2_exu_div_ctl.scala 63:58] + wire smallnum_case = _T_11 | _T_19; // @[el2_exu_div_ctl.scala 62:109] + wire pat1 = q_ff[3]; // @[el2_exu_div_ctl.scala 66:57] + wire _T_22 = ~m_ff[3]; // @[el2_exu_div_ctl.scala 67:69] + wire _T_24 = ~m_ff[2]; // @[el2_exu_div_ctl.scala 67:69] + wire _T_26 = ~m_ff[1]; // @[el2_exu_div_ctl.scala 67:69] + wire _T_27 = _T_22 & _T_24; // @[el2_exu_div_ctl.scala 67:94] + wire pat2 = _T_27 & _T_26; // @[el2_exu_div_ctl.scala 67:94] + wire _T_28 = pat1 & pat2; // @[el2_exu_div_ctl.scala 68:10] + wire _T_33 = pat1 & _T_27; // @[el2_exu_div_ctl.scala 68:10] + wire _T_35 = ~m_ff[0]; // @[el2_exu_div_ctl.scala 74:45] + wire _T_36 = _T_33 & _T_35; // @[el2_exu_div_ctl.scala 74:43] + wire pat1_2 = q_ff[2]; // @[el2_exu_div_ctl.scala 66:57] + wire _T_44 = pat1_2 & pat2; // @[el2_exu_div_ctl.scala 68:10] + wire _T_45 = _T_36 | _T_44; // @[el2_exu_div_ctl.scala 74:54] + wire pat1_3 = pat1 & pat1_2; // @[el2_exu_div_ctl.scala 66:94] + wire _T_52 = pat1_3 & _T_27; // @[el2_exu_div_ctl.scala 68:10] + wire _T_53 = _T_45 | _T_52; // @[el2_exu_div_ctl.scala 74:86] + wire _T_58 = pat1_2 & _T_27; // @[el2_exu_div_ctl.scala 68:10] + wire _T_61 = _T_58 & _T_35; // @[el2_exu_div_ctl.scala 76:43] + wire pat1_5 = q_ff[1]; // @[el2_exu_div_ctl.scala 66:57] + wire _T_69 = pat1_5 & pat2; // @[el2_exu_div_ctl.scala 68:10] + wire _T_70 = _T_61 | _T_69; // @[el2_exu_div_ctl.scala 76:54] + wire pat2_6 = _T_22 & _T_26; // @[el2_exu_div_ctl.scala 67:94] + wire _T_75 = pat1 & pat2_6; // @[el2_exu_div_ctl.scala 68:10] + wire _T_78 = _T_75 & _T_35; // @[el2_exu_div_ctl.scala 76:116] + wire _T_79 = _T_70 | _T_78; // @[el2_exu_div_ctl.scala 76:89] + wire _T_82 = ~pat1_2; // @[el2_exu_div_ctl.scala 66:69] + wire pat1_7 = pat1 & _T_82; // @[el2_exu_div_ctl.scala 66:94] + wire _T_90 = _T_27 & m_ff[1]; // @[el2_exu_div_ctl.scala 67:94] + wire pat2_7 = _T_90 & m_ff[0]; // @[el2_exu_div_ctl.scala 67:94] + wire _T_91 = pat1_7 & pat2_7; // @[el2_exu_div_ctl.scala 68:10] + wire _T_92 = _T_79 | _T_91; // @[el2_exu_div_ctl.scala 76:127] + wire _T_94 = ~pat1; // @[el2_exu_div_ctl.scala 66:69] + wire _T_97 = _T_94 & pat1_2; // @[el2_exu_div_ctl.scala 66:94] + wire pat1_8 = _T_97 & pat1_5; // @[el2_exu_div_ctl.scala 66:94] + wire _T_102 = pat1_8 & _T_27; // @[el2_exu_div_ctl.scala 68:10] + wire _T_103 = _T_92 | _T_102; // @[el2_exu_div_ctl.scala 77:54] + wire _T_107 = pat1_3 & _T_22; // @[el2_exu_div_ctl.scala 68:10] + wire _T_110 = _T_107 & _T_35; // @[el2_exu_div_ctl.scala 77:115] + wire _T_111 = _T_103 | _T_110; // @[el2_exu_div_ctl.scala 77:89] + wire _T_119 = _T_22 & m_ff[2]; // @[el2_exu_div_ctl.scala 67:94] + wire pat2_10 = _T_119 & _T_26; // @[el2_exu_div_ctl.scala 67:94] + wire _T_120 = pat1_3 & pat2_10; // @[el2_exu_div_ctl.scala 68:10] + wire _T_121 = _T_111 | _T_120; // @[el2_exu_div_ctl.scala 77:127] + wire pat1_11 = pat1 & pat1_5; // @[el2_exu_div_ctl.scala 66:94] + wire _T_128 = pat1_11 & pat2_6; // @[el2_exu_div_ctl.scala 68:10] + wire _T_129 = _T_121 | _T_128; // @[el2_exu_div_ctl.scala 78:54] + wire pat1_12 = pat1_3 & pat1_5; // @[el2_exu_div_ctl.scala 66:94] + wire _T_137 = pat1_12 & _T_119; // @[el2_exu_div_ctl.scala 68:10] + wire _T_138 = _T_129 | _T_137; // @[el2_exu_div_ctl.scala 78:88] + wire _T_142 = pat1_2 & pat1_5; // @[el2_exu_div_ctl.scala 66:94] + wire pat1_13 = _T_142 & q_ff[0]; // @[el2_exu_div_ctl.scala 66:94] + wire _T_147 = pat1_13 & pat2_6; // @[el2_exu_div_ctl.scala 68:10] + wire pat1_14 = pat1_7 & q_ff[0]; // @[el2_exu_div_ctl.scala 66:94] + wire _T_157 = _T_22 & m_ff[1]; // @[el2_exu_div_ctl.scala 67:94] + wire pat2_14 = _T_157 & m_ff[0]; // @[el2_exu_div_ctl.scala 67:94] + wire _T_158 = pat1_14 & pat2_14; // @[el2_exu_div_ctl.scala 68:10] + wire _T_159 = _T_147 | _T_158; // @[el2_exu_div_ctl.scala 80:57] + wire _T_164 = pat1_2 & pat2_6; // @[el2_exu_div_ctl.scala 68:10] + wire _T_167 = _T_164 & _T_35; // @[el2_exu_div_ctl.scala 80:124] + wire _T_168 = _T_159 | _T_167; // @[el2_exu_div_ctl.scala 80:97] + wire _T_173 = pat1_5 & _T_27; // @[el2_exu_div_ctl.scala 68:10] + wire _T_176 = _T_173 & _T_35; // @[el2_exu_div_ctl.scala 81:43] + wire _T_177 = _T_168 | _T_176; // @[el2_exu_div_ctl.scala 80:139] + wire _T_185 = q_ff[0] & pat2; // @[el2_exu_div_ctl.scala 68:10] + wire _T_186 = _T_177 | _T_185; // @[el2_exu_div_ctl.scala 81:57] + wire _T_191 = ~pat1_5; // @[el2_exu_div_ctl.scala 66:69] + wire pat1_18 = _T_97 & _T_191; // @[el2_exu_div_ctl.scala 66:94] + wire _T_201 = pat1_18 & pat2_7; // @[el2_exu_div_ctl.scala 68:10] + wire _T_202 = _T_186 | _T_201; // @[el2_exu_div_ctl.scala 81:97] + wire _T_209 = pat1_8 & _T_22; // @[el2_exu_div_ctl.scala 68:10] + wire _T_212 = _T_209 & _T_35; // @[el2_exu_div_ctl.scala 82:46] + wire _T_213 = _T_202 | _T_212; // @[el2_exu_div_ctl.scala 81:139] + wire pat2_20 = _T_24 & _T_26; // @[el2_exu_div_ctl.scala 67:94] + wire _T_218 = pat1 & pat2_20; // @[el2_exu_div_ctl.scala 68:10] + wire _T_221 = _T_218 & _T_35; // @[el2_exu_div_ctl.scala 82:85] + wire _T_222 = _T_213 | _T_221; // @[el2_exu_div_ctl.scala 82:57] + wire pat2_21 = _T_119 & m_ff[1]; // @[el2_exu_div_ctl.scala 67:94] + wire _T_231 = pat1_7 & pat2_21; // @[el2_exu_div_ctl.scala 68:10] + wire _T_232 = _T_222 | _T_231; // @[el2_exu_div_ctl.scala 82:97] + wire _T_244 = pat1_8 & pat2_10; // @[el2_exu_div_ctl.scala 68:10] + wire _T_245 = _T_232 | _T_244; // @[el2_exu_div_ctl.scala 82:139] + wire pat1_23 = _T_97 & q_ff[0]; // @[el2_exu_div_ctl.scala 66:94] + wire _T_255 = pat1_23 & pat2_6; // @[el2_exu_div_ctl.scala 68:10] + wire _T_256 = _T_245 | _T_255; // @[el2_exu_div_ctl.scala 83:57] + wire pat1_24 = pat1_7 & _T_191; // @[el2_exu_div_ctl.scala 66:94] + wire pat2_24 = _T_119 & m_ff[0]; // @[el2_exu_div_ctl.scala 67:94] + wire _T_268 = pat1_24 & pat2_24; // @[el2_exu_div_ctl.scala 68:10] + wire _T_269 = _T_256 | _T_268; // @[el2_exu_div_ctl.scala 83:97] + wire _T_274 = _T_82 & pat1_5; // @[el2_exu_div_ctl.scala 66:94] + wire pat1_25 = _T_274 & q_ff[0]; // @[el2_exu_div_ctl.scala 66:94] + wire _T_279 = pat1_25 & _T_27; // @[el2_exu_div_ctl.scala 68:10] + wire _T_280 = _T_269 | _T_279; // @[el2_exu_div_ctl.scala 83:139] + wire _T_284 = pat1_3 & _T_26; // @[el2_exu_div_ctl.scala 68:10] + wire _T_287 = _T_284 & _T_35; // @[el2_exu_div_ctl.scala 84:84] + wire _T_288 = _T_280 | _T_287; // @[el2_exu_div_ctl.scala 84:57] + wire pat1_27 = pat1_8 & q_ff[0]; // @[el2_exu_div_ctl.scala 66:94] + wire _T_299 = pat1_27 & _T_119; // @[el2_exu_div_ctl.scala 68:10] + wire _T_300 = _T_288 | _T_299; // @[el2_exu_div_ctl.scala 84:97] + wire pat2_28 = m_ff[3] & _T_24; // @[el2_exu_div_ctl.scala 67:94] + wire _T_306 = pat1_3 & pat2_28; // @[el2_exu_div_ctl.scala 68:10] + wire _T_307 = _T_300 | _T_306; // @[el2_exu_div_ctl.scala 84:139] + wire pat2_29 = pat2_28 & _T_26; // @[el2_exu_div_ctl.scala 67:94] + wire _T_316 = pat1_11 & pat2_29; // @[el2_exu_div_ctl.scala 68:10] + wire _T_317 = _T_307 | _T_316; // @[el2_exu_div_ctl.scala 85:57] + wire pat1_30 = pat1 & q_ff[0]; // @[el2_exu_div_ctl.scala 66:94] + wire _T_324 = pat1_30 & pat2_20; // @[el2_exu_div_ctl.scala 68:10] + wire _T_325 = _T_317 | _T_324; // @[el2_exu_div_ctl.scala 85:97] + wire pat1_31 = pat1 & _T_191; // @[el2_exu_div_ctl.scala 66:94] + wire pat2_31 = pat2_21 & m_ff[0]; // @[el2_exu_div_ctl.scala 67:94] + wire _T_336 = pat1_31 & pat2_31; // @[el2_exu_div_ctl.scala 68:10] + wire _T_337 = _T_325 | _T_336; // @[el2_exu_div_ctl.scala 85:139] + wire _T_342 = pat1_12 & m_ff[3]; // @[el2_exu_div_ctl.scala 68:10] + wire _T_345 = _T_342 & _T_35; // @[el2_exu_div_ctl.scala 86:86] + wire _T_346 = _T_337 | _T_345; // @[el2_exu_div_ctl.scala 86:57] + wire pat2_33 = m_ff[3] & _T_26; // @[el2_exu_div_ctl.scala 67:94] + wire _T_354 = pat1_12 & pat2_33; // @[el2_exu_div_ctl.scala 68:10] + wire _T_355 = _T_346 | _T_354; // @[el2_exu_div_ctl.scala 86:97] + wire pat1_34 = pat1_3 & q_ff[0]; // @[el2_exu_div_ctl.scala 66:94] + wire _T_363 = pat1_34 & pat2_33; // @[el2_exu_div_ctl.scala 68:10] + wire _T_364 = _T_355 | _T_363; // @[el2_exu_div_ctl.scala 86:139] + wire pat1_35 = pat1_7 & pat1_5; // @[el2_exu_div_ctl.scala 66:94] + wire _T_373 = pat1_35 & _T_157; // @[el2_exu_div_ctl.scala 68:10] + wire _T_374 = _T_364 | _T_373; // @[el2_exu_div_ctl.scala 87:57] + wire pat1_36 = pat1_11 & q_ff[0]; // @[el2_exu_div_ctl.scala 66:94] + wire _T_380 = pat1_36 & _T_24; // @[el2_exu_div_ctl.scala 68:10] + wire _T_381 = _T_374 | _T_380; // @[el2_exu_div_ctl.scala 87:97] + wire pat1_37 = pat1_12 & q_ff[0]; // @[el2_exu_div_ctl.scala 66:94] + wire _T_388 = pat1_37 & m_ff[3]; // @[el2_exu_div_ctl.scala 68:10] + wire _T_389 = _T_381 | _T_388; // @[el2_exu_div_ctl.scala 87:139] + wire _T_393 = pat1_11 & _T_24; // @[el2_exu_div_ctl.scala 68:10] + wire _T_396 = _T_393 & _T_35; // @[el2_exu_div_ctl.scala 88:83] + wire _T_397 = _T_389 | _T_396; // @[el2_exu_div_ctl.scala 88:57] + wire [3:0] smallnum = {_T_28,_T_53,_T_138,_T_397}; // @[Cat.scala 29:58] + reg sign_ff; // @[Reg.scala 27:20] + wire _T_401 = sign_ff & q_ff[31]; // @[el2_exu_div_ctl.scala 98:34] + wire [32:0] short_dividend = {_T_401,q_ff[31:0]}; // @[Cat.scala 29:58] + wire _T_406 = ~short_dividend[32]; // @[el2_exu_div_ctl.scala 103:7] + wire _T_409 = short_dividend[31:24] != 8'h0; // @[el2_exu_div_ctl.scala 103:60] + wire _T_414 = short_dividend[31:23] != 9'h1ff; // @[el2_exu_div_ctl.scala 104:59] + wire _T_415 = _T_406 & _T_409; // @[Mux.scala 27:72] + wire _T_416 = short_dividend[32] & _T_414; // @[Mux.scala 27:72] + wire _T_417 = _T_415 | _T_416; // @[Mux.scala 27:72] + wire _T_424 = short_dividend[23:16] != 8'h0; // @[el2_exu_div_ctl.scala 107:60] + wire _T_429 = short_dividend[22:15] != 8'hff; // @[el2_exu_div_ctl.scala 108:59] + wire _T_430 = _T_406 & _T_424; // @[Mux.scala 27:72] + wire _T_431 = short_dividend[32] & _T_429; // @[Mux.scala 27:72] + wire _T_432 = _T_430 | _T_431; // @[Mux.scala 27:72] + wire _T_439 = short_dividend[15:8] != 8'h0; // @[el2_exu_div_ctl.scala 111:59] + wire _T_444 = short_dividend[14:7] != 8'hff; // @[el2_exu_div_ctl.scala 112:58] + wire _T_445 = _T_406 & _T_439; // @[Mux.scala 27:72] + wire _T_446 = short_dividend[32] & _T_444; // @[Mux.scala 27:72] + wire _T_447 = _T_445 | _T_446; // @[Mux.scala 27:72] + wire [2:0] a_cls = {_T_417,_T_432,_T_447}; // @[Cat.scala 29:58] + wire _T_452 = ~m_ff[32]; // @[el2_exu_div_ctl.scala 117:7] + wire _T_455 = m_ff[31:24] != 8'h0; // @[el2_exu_div_ctl.scala 117:40] + wire _T_460 = m_ff[31:24] != 8'hff; // @[el2_exu_div_ctl.scala 118:39] + wire _T_461 = _T_452 & _T_455; // @[Mux.scala 27:72] + wire _T_462 = m_ff[32] & _T_460; // @[Mux.scala 27:72] + wire _T_463 = _T_461 | _T_462; // @[Mux.scala 27:72] + wire _T_470 = m_ff[23:16] != 8'h0; // @[el2_exu_div_ctl.scala 121:40] + wire _T_475 = m_ff[23:16] != 8'hff; // @[el2_exu_div_ctl.scala 122:39] + wire _T_476 = _T_452 & _T_470; // @[Mux.scala 27:72] + wire _T_477 = m_ff[32] & _T_475; // @[Mux.scala 27:72] + wire _T_478 = _T_476 | _T_477; // @[Mux.scala 27:72] + wire _T_485 = m_ff[15:8] != 8'h0; // @[el2_exu_div_ctl.scala 125:39] + wire _T_490 = m_ff[15:8] != 8'hff; // @[el2_exu_div_ctl.scala 126:38] + wire _T_491 = _T_452 & _T_485; // @[Mux.scala 27:72] + wire _T_492 = m_ff[32] & _T_490; // @[Mux.scala 27:72] + wire _T_493 = _T_491 | _T_492; // @[Mux.scala 27:72] + wire [2:0] b_cls = {_T_463,_T_478,_T_493}; // @[Cat.scala 29:58] + wire _T_497 = a_cls[2:1] == 2'h1; // @[el2_exu_div_ctl.scala 130:19] + wire _T_500 = _T_497 & b_cls[2]; // @[el2_exu_div_ctl.scala 130:34] + wire _T_502 = a_cls == 3'h1; // @[el2_exu_div_ctl.scala 131:21] + wire _T_505 = _T_502 & b_cls[2]; // @[el2_exu_div_ctl.scala 131:36] + wire _T_506 = _T_500 | _T_505; // @[el2_exu_div_ctl.scala 130:65] + wire _T_508 = a_cls == 3'h0; // @[el2_exu_div_ctl.scala 132:21] + wire _T_511 = _T_508 & b_cls[2]; // @[el2_exu_div_ctl.scala 132:36] + wire _T_512 = _T_506 | _T_511; // @[el2_exu_div_ctl.scala 131:67] + wire _T_516 = b_cls[2:1] == 2'h1; // @[el2_exu_div_ctl.scala 133:50] + wire _T_517 = _T_502 & _T_516; // @[el2_exu_div_ctl.scala 133:36] + wire _T_518 = _T_512 | _T_517; // @[el2_exu_div_ctl.scala 132:67] + wire _T_523 = _T_508 & _T_516; // @[el2_exu_div_ctl.scala 134:36] + wire _T_524 = _T_518 | _T_523; // @[el2_exu_div_ctl.scala 133:67] + wire _T_528 = b_cls == 3'h1; // @[el2_exu_div_ctl.scala 135:50] + wire _T_529 = _T_508 & _T_528; // @[el2_exu_div_ctl.scala 135:36] + wire _T_530 = _T_524 | _T_529; // @[el2_exu_div_ctl.scala 134:67] + wire _T_535 = a_cls[2] & b_cls[2]; // @[el2_exu_div_ctl.scala 137:36] + wire _T_540 = _T_497 & _T_516; // @[el2_exu_div_ctl.scala 138:36] + wire _T_541 = _T_535 | _T_540; // @[el2_exu_div_ctl.scala 137:67] + wire _T_546 = _T_502 & _T_528; // @[el2_exu_div_ctl.scala 139:36] + wire _T_547 = _T_541 | _T_546; // @[el2_exu_div_ctl.scala 138:67] + wire _T_551 = b_cls == 3'h0; // @[el2_exu_div_ctl.scala 140:50] + wire _T_552 = _T_508 & _T_551; // @[el2_exu_div_ctl.scala 140:36] + wire _T_553 = _T_547 | _T_552; // @[el2_exu_div_ctl.scala 139:67] + wire _T_558 = a_cls[2] & _T_516; // @[el2_exu_div_ctl.scala 142:36] + wire _T_563 = _T_497 & _T_528; // @[el2_exu_div_ctl.scala 143:36] + wire _T_564 = _T_558 | _T_563; // @[el2_exu_div_ctl.scala 142:67] + wire _T_569 = _T_502 & _T_551; // @[el2_exu_div_ctl.scala 144:36] + wire _T_570 = _T_564 | _T_569; // @[el2_exu_div_ctl.scala 143:67] + wire _T_575 = a_cls[2] & _T_528; // @[el2_exu_div_ctl.scala 146:36] + wire _T_580 = _T_497 & _T_551; // @[el2_exu_div_ctl.scala 147:36] + wire _T_581 = _T_575 | _T_580; // @[el2_exu_div_ctl.scala 146:67] + wire [3:0] shortq_raw = {_T_530,_T_553,_T_570,_T_581}; // @[Cat.scala 29:58] + wire _T_586 = valid_ff_x & _T_7; // @[el2_exu_div_ctl.scala 150:35] + wire _T_587 = shortq_raw != 4'h0; // @[el2_exu_div_ctl.scala 150:78] + wire shortq_enable = _T_586 & _T_587; // @[el2_exu_div_ctl.scala 150:64] + wire [3:0] _T_589 = shortq_enable ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] + wire [3:0] shortq_shift = _T_589 & shortq_raw; // @[el2_exu_div_ctl.scala 151:44] + reg [3:0] shortq_shift_xx; // @[Reg.scala 27:20] + wire [4:0] _T_598 = shortq_shift_xx[3] ? 5'h1f : 5'h0; // @[Mux.scala 27:72] + wire [4:0] _T_599 = shortq_shift_xx[2] ? 5'h18 : 5'h0; // @[Mux.scala 27:72] + wire [4:0] _T_600 = shortq_shift_xx[1] ? 5'h10 : 5'h0; // @[Mux.scala 27:72] + wire [3:0] _T_601 = shortq_shift_xx[0] ? 4'h8 : 4'h0; // @[Mux.scala 27:72] + wire [4:0] _T_602 = _T_598 | _T_599; // @[Mux.scala 27:72] + wire [4:0] _T_603 = _T_602 | _T_600; // @[Mux.scala 27:72] + wire [4:0] _GEN_15 = {{1'd0}, _T_601}; // @[Mux.scala 27:72] + wire [4:0] shortq_shift_ff = _T_603 | _GEN_15; // @[Mux.scala 27:72] + reg [5:0] count; // @[Reg.scala 27:20] + wire _T_606 = count == 6'h20; // @[el2_exu_div_ctl.scala 164:55] + wire _T_607 = count == 6'h21; // @[el2_exu_div_ctl.scala 164:76] + wire _T_608 = _T_9 ? _T_606 : _T_607; // @[el2_exu_div_ctl.scala 164:39] + wire finish = smallnum_case | _T_608; // @[el2_exu_div_ctl.scala 164:34] + reg run_state; // @[Reg.scala 27:20] + wire _T_609 = io_dp_valid | run_state; // @[el2_exu_div_ctl.scala 165:32] + wire _T_610 = _T_609 | finish; // @[el2_exu_div_ctl.scala 165:44] + reg finish_ff; // @[Reg.scala 27:20] + wire div_clken = _T_610 | finish_ff; // @[el2_exu_div_ctl.scala 165:53] + wire _T_612 = ~finish; // @[el2_exu_div_ctl.scala 166:48] + wire _T_613 = _T_609 & _T_612; // @[el2_exu_div_ctl.scala 166:46] + wire run_in = _T_613 & _T; // @[el2_exu_div_ctl.scala 166:56] + wire _T_616 = run_state & _T_612; // @[el2_exu_div_ctl.scala 167:35] + wire _T_618 = _T_616 & _T; // @[el2_exu_div_ctl.scala 167:45] + wire _T_619 = ~shortq_enable; // @[el2_exu_div_ctl.scala 167:60] + wire _T_620 = _T_618 & _T_619; // @[el2_exu_div_ctl.scala 167:58] + wire [5:0] _T_622 = _T_620 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12] + wire [5:0] _T_623 = {1'h0,shortq_shift_ff}; // @[Cat.scala 29:58] + wire [5:0] _T_625 = count + _T_623; // @[el2_exu_div_ctl.scala 167:86] + wire [5:0] _T_627 = _T_625 + 6'h1; // @[el2_exu_div_ctl.scala 167:113] + wire [5:0] count_in = _T_622 & _T_627; // @[el2_exu_div_ctl.scala 167:77] + wire _T_631 = ~io_dp_unsign; // @[el2_exu_div_ctl.scala 171:20] + wire _T_632 = io_divisor != 32'h0; // @[el2_exu_div_ctl.scala 171:48] + wire sign_eff = _T_631 & _T_632; // @[el2_exu_div_ctl.scala 171:34] + wire _T_633 = ~run_state; // @[el2_exu_div_ctl.scala 175:6] + wire [32:0] _T_635 = {1'h0,io_dividend}; // @[Cat.scala 29:58] + reg shortq_enable_ff; // @[Reg.scala 27:20] + wire _T_636 = valid_ff_x | shortq_enable_ff; // @[el2_exu_div_ctl.scala 176:30] + wire _T_637 = run_state & _T_636; // @[el2_exu_div_ctl.scala 176:16] + reg dividend_neg_ff; // @[Reg.scala 27:20] + wire _T_660 = sign_ff & dividend_neg_ff; // @[el2_exu_div_ctl.scala 180:32] + wire _T_845 = |q_ff[30:0]; // @[el2_lib.scala 234:32] + wire _T_847 = ~q_ff[31]; // @[el2_lib.scala 235:32] + wire _T_849 = _T_845 ? _T_847 : q_ff[31]; // @[el2_lib.scala 235:25] + wire _T_839 = |q_ff[29:0]; // @[el2_lib.scala 234:32] + wire _T_841 = ~q_ff[30]; // @[el2_lib.scala 235:32] + wire _T_843 = _T_839 ? _T_841 : q_ff[30]; // @[el2_lib.scala 235:25] + wire _T_833 = |q_ff[28:0]; // @[el2_lib.scala 234:32] + wire _T_835 = ~q_ff[29]; // @[el2_lib.scala 235:32] + wire _T_837 = _T_833 ? _T_835 : q_ff[29]; // @[el2_lib.scala 235:25] + wire _T_827 = |q_ff[27:0]; // @[el2_lib.scala 234:32] + wire _T_829 = ~q_ff[28]; // @[el2_lib.scala 235:32] + wire _T_831 = _T_827 ? _T_829 : q_ff[28]; // @[el2_lib.scala 235:25] + wire _T_821 = |q_ff[26:0]; // @[el2_lib.scala 234:32] + wire _T_823 = ~q_ff[27]; // @[el2_lib.scala 235:32] + wire _T_825 = _T_821 ? _T_823 : q_ff[27]; // @[el2_lib.scala 235:25] + wire _T_815 = |q_ff[25:0]; // @[el2_lib.scala 234:32] + wire _T_817 = ~q_ff[26]; // @[el2_lib.scala 235:32] + wire _T_819 = _T_815 ? _T_817 : q_ff[26]; // @[el2_lib.scala 235:25] + wire _T_809 = |q_ff[24:0]; // @[el2_lib.scala 234:32] + wire _T_811 = ~q_ff[25]; // @[el2_lib.scala 235:32] + wire _T_813 = _T_809 ? _T_811 : q_ff[25]; // @[el2_lib.scala 235:25] + wire _T_803 = |q_ff[23:0]; // @[el2_lib.scala 234:32] + wire _T_805 = ~q_ff[24]; // @[el2_lib.scala 235:32] + wire _T_807 = _T_803 ? _T_805 : q_ff[24]; // @[el2_lib.scala 235:25] + wire _T_797 = |q_ff[22:0]; // @[el2_lib.scala 234:32] + wire _T_799 = ~q_ff[23]; // @[el2_lib.scala 235:32] + wire _T_801 = _T_797 ? _T_799 : q_ff[23]; // @[el2_lib.scala 235:25] + wire _T_791 = |q_ff[21:0]; // @[el2_lib.scala 234:32] + wire _T_793 = ~q_ff[22]; // @[el2_lib.scala 235:32] + wire _T_795 = _T_791 ? _T_793 : q_ff[22]; // @[el2_lib.scala 235:25] + wire _T_785 = |q_ff[20:0]; // @[el2_lib.scala 234:32] + wire _T_787 = ~q_ff[21]; // @[el2_lib.scala 235:32] + wire _T_789 = _T_785 ? _T_787 : q_ff[21]; // @[el2_lib.scala 235:25] + wire _T_779 = |q_ff[19:0]; // @[el2_lib.scala 234:32] + wire _T_781 = ~q_ff[20]; // @[el2_lib.scala 235:32] + wire _T_783 = _T_779 ? _T_781 : q_ff[20]; // @[el2_lib.scala 235:25] + wire _T_773 = |q_ff[18:0]; // @[el2_lib.scala 234:32] + wire _T_775 = ~q_ff[19]; // @[el2_lib.scala 235:32] + wire _T_777 = _T_773 ? _T_775 : q_ff[19]; // @[el2_lib.scala 235:25] + wire _T_767 = |q_ff[17:0]; // @[el2_lib.scala 234:32] + wire _T_769 = ~q_ff[18]; // @[el2_lib.scala 235:32] + wire _T_771 = _T_767 ? _T_769 : q_ff[18]; // @[el2_lib.scala 235:25] + wire _T_761 = |q_ff[16:0]; // @[el2_lib.scala 234:32] + wire _T_763 = ~q_ff[17]; // @[el2_lib.scala 235:32] + wire _T_765 = _T_761 ? _T_763 : q_ff[17]; // @[el2_lib.scala 235:25] + wire _T_755 = |q_ff[15:0]; // @[el2_lib.scala 234:32] + wire _T_757 = ~q_ff[16]; // @[el2_lib.scala 235:32] + wire _T_759 = _T_755 ? _T_757 : q_ff[16]; // @[el2_lib.scala 235:25] + wire [7:0] _T_870 = {_T_801,_T_795,_T_789,_T_783,_T_777,_T_771,_T_765,_T_759}; // @[el2_lib.scala 237:14] + wire _T_749 = |q_ff[14:0]; // @[el2_lib.scala 234:32] + wire _T_751 = ~q_ff[15]; // @[el2_lib.scala 235:32] + wire _T_753 = _T_749 ? _T_751 : q_ff[15]; // @[el2_lib.scala 235:25] + wire _T_743 = |q_ff[13:0]; // @[el2_lib.scala 234:32] + wire _T_745 = ~q_ff[14]; // @[el2_lib.scala 235:32] + wire _T_747 = _T_743 ? _T_745 : q_ff[14]; // @[el2_lib.scala 235:25] + wire _T_737 = |q_ff[12:0]; // @[el2_lib.scala 234:32] + wire _T_739 = ~q_ff[13]; // @[el2_lib.scala 235:32] + wire _T_741 = _T_737 ? _T_739 : q_ff[13]; // @[el2_lib.scala 235:25] + wire _T_731 = |q_ff[11:0]; // @[el2_lib.scala 234:32] + wire _T_733 = ~q_ff[12]; // @[el2_lib.scala 235:32] + wire _T_735 = _T_731 ? _T_733 : q_ff[12]; // @[el2_lib.scala 235:25] + wire _T_725 = |q_ff[10:0]; // @[el2_lib.scala 234:32] + wire _T_727 = ~q_ff[11]; // @[el2_lib.scala 235:32] + wire _T_729 = _T_725 ? _T_727 : q_ff[11]; // @[el2_lib.scala 235:25] + wire _T_719 = |q_ff[9:0]; // @[el2_lib.scala 234:32] + wire _T_721 = ~q_ff[10]; // @[el2_lib.scala 235:32] + wire _T_723 = _T_719 ? _T_721 : q_ff[10]; // @[el2_lib.scala 235:25] + wire _T_713 = |q_ff[8:0]; // @[el2_lib.scala 234:32] + wire _T_715 = ~q_ff[9]; // @[el2_lib.scala 235:32] + wire _T_717 = _T_713 ? _T_715 : q_ff[9]; // @[el2_lib.scala 235:25] + wire _T_707 = |q_ff[7:0]; // @[el2_lib.scala 234:32] + wire _T_709 = ~q_ff[8]; // @[el2_lib.scala 235:32] + wire _T_711 = _T_707 ? _T_709 : q_ff[8]; // @[el2_lib.scala 235:25] + wire _T_701 = |q_ff[6:0]; // @[el2_lib.scala 234:32] + wire _T_703 = ~q_ff[7]; // @[el2_lib.scala 235:32] + wire _T_705 = _T_701 ? _T_703 : q_ff[7]; // @[el2_lib.scala 235:25] + wire _T_695 = |q_ff[5:0]; // @[el2_lib.scala 234:32] + wire _T_697 = ~q_ff[6]; // @[el2_lib.scala 235:32] + wire _T_699 = _T_695 ? _T_697 : q_ff[6]; // @[el2_lib.scala 235:25] + wire _T_689 = |q_ff[4:0]; // @[el2_lib.scala 234:32] + wire _T_691 = ~q_ff[5]; // @[el2_lib.scala 235:32] + wire _T_693 = _T_689 ? _T_691 : q_ff[5]; // @[el2_lib.scala 235:25] + wire _T_683 = |q_ff[3:0]; // @[el2_lib.scala 234:32] + wire _T_685 = ~q_ff[4]; // @[el2_lib.scala 235:32] + wire _T_687 = _T_683 ? _T_685 : q_ff[4]; // @[el2_lib.scala 235:25] + wire _T_677 = |q_ff[2:0]; // @[el2_lib.scala 234:32] + wire _T_679 = ~q_ff[3]; // @[el2_lib.scala 235:32] + wire _T_681 = _T_677 ? _T_679 : q_ff[3]; // @[el2_lib.scala 235:25] + wire _T_671 = |q_ff[1:0]; // @[el2_lib.scala 234:32] + wire _T_673 = ~q_ff[2]; // @[el2_lib.scala 235:32] + wire _T_675 = _T_671 ? _T_673 : q_ff[2]; // @[el2_lib.scala 235:25] + wire _T_665 = |q_ff[0]; // @[el2_lib.scala 234:32] + wire _T_667 = ~q_ff[1]; // @[el2_lib.scala 235:32] + wire _T_669 = _T_665 ? _T_667 : q_ff[1]; // @[el2_lib.scala 235:25] + wire [6:0] _T_855 = {_T_705,_T_699,_T_693,_T_687,_T_681,_T_675,_T_669}; // @[el2_lib.scala 237:14] + wire [14:0] _T_863 = {_T_753,_T_747,_T_741,_T_735,_T_729,_T_723,_T_717,_T_711,_T_855}; // @[el2_lib.scala 237:14] + wire [30:0] _T_879 = {_T_849,_T_843,_T_837,_T_831,_T_825,_T_819,_T_813,_T_807,_T_870,_T_863}; // @[el2_lib.scala 237:14] + wire [31:0] _T_881 = {_T_879,q_ff[0]}; // @[Cat.scala 29:58] + wire [31:0] dividend_eff = _T_660 ? _T_881 : q_ff[31:0]; // @[el2_exu_div_ctl.scala 180:22] + wire [32:0] _T_917 = run_state ? 33'h1ffffffff : 33'h0; // @[Bitwise.scala 72:12] + wire _T_929 = _T_607 & rem_ff; // @[el2_exu_div_ctl.scala 196:41] + reg [32:0] a_ff; // @[Reg.scala 27:20] + wire rem_correct = _T_929 & a_ff[32]; // @[el2_exu_div_ctl.scala 196:50] + wire [32:0] _T_902 = rem_correct ? a_ff : 33'h0; // @[Mux.scala 27:72] + wire _T_890 = ~rem_correct; // @[el2_exu_div_ctl.scala 187:6] + wire _T_891 = ~shortq_enable_ff; // @[el2_exu_div_ctl.scala 187:21] + wire _T_892 = _T_890 & _T_891; // @[el2_exu_div_ctl.scala 187:19] + wire [32:0] _T_896 = {a_ff[31:0],q_ff[32]}; // @[Cat.scala 29:58] + wire [32:0] _T_903 = _T_892 ? _T_896 : 33'h0; // @[Mux.scala 27:72] + wire [32:0] _T_905 = _T_902 | _T_903; // @[Mux.scala 27:72] + wire _T_898 = _T_890 & shortq_enable_ff; // @[el2_exu_div_ctl.scala 188:19] + wire [55:0] _T_887 = {24'h0,dividend_eff}; // @[Cat.scala 29:58] + wire [86:0] _GEN_16 = {{31'd0}, _T_887}; // @[el2_exu_div_ctl.scala 184:47] + wire [86:0] _T_888 = _GEN_16 << shortq_shift_ff; // @[el2_exu_div_ctl.scala 184:47] + wire [55:0] a_eff_shift = _T_888[55:0]; // @[el2_exu_div_ctl.scala 184:15] + wire [32:0] _T_901 = {9'h0,a_eff_shift[55:32]}; // @[Cat.scala 29:58] + wire [32:0] _T_904 = _T_898 ? _T_901 : 33'h0; // @[Mux.scala 27:72] + wire [32:0] a_eff = _T_905 | _T_904; // @[Mux.scala 27:72] + wire [32:0] a_shift = _T_917 & a_eff; // @[el2_exu_div_ctl.scala 191:33] + wire _T_926 = a_ff[32] | rem_correct; // @[el2_exu_div_ctl.scala 195:21] + reg divisor_neg_ff; // @[Reg.scala 27:20] + wire m_already_comp = divisor_neg_ff & sign_ff; // @[el2_exu_div_ctl.scala 193:48] + wire add = _T_926 ^ m_already_comp; // @[el2_exu_div_ctl.scala 195:36] + wire [32:0] _T_885 = ~m_ff; // @[el2_exu_div_ctl.scala 183:35] + wire [32:0] m_eff = add ? m_ff : _T_885; // @[el2_exu_div_ctl.scala 183:15] + wire [32:0] _T_919 = a_shift + m_eff; // @[el2_exu_div_ctl.scala 192:41] + wire _T_920 = ~add; // @[el2_exu_div_ctl.scala 192:65] + wire [32:0] _T_921 = {32'h0,_T_920}; // @[Cat.scala 29:58] + wire [32:0] _T_923 = _T_919 + _T_921; // @[el2_exu_div_ctl.scala 192:49] + wire [32:0] a_in = _T_917 & _T_923; // @[el2_exu_div_ctl.scala 192:30] + wire _T_641 = ~a_in[32]; // @[el2_exu_div_ctl.scala 176:85] + wire [32:0] _T_642 = {dividend_eff,_T_641}; // @[Cat.scala 29:58] + wire [63:0] _GEN_17 = {{31'd0}, _T_642}; // @[el2_exu_div_ctl.scala 176:96] + wire [63:0] _T_643 = _GEN_17 << shortq_shift_ff; // @[el2_exu_div_ctl.scala 176:96] + wire _T_645 = ~_T_636; // @[el2_exu_div_ctl.scala 177:18] + wire _T_646 = run_state & _T_645; // @[el2_exu_div_ctl.scala 177:16] + wire [32:0] _T_651 = {q_ff[31:0],_T_641}; // @[Cat.scala 29:58] + wire [32:0] _T_652 = _T_633 ? _T_635 : 33'h0; // @[Mux.scala 27:72] + wire [63:0] _T_653 = _T_637 ? _T_643 : 64'h0; // @[Mux.scala 27:72] + wire [32:0] _T_654 = _T_646 ? _T_651 : 33'h0; // @[Mux.scala 27:72] + wire [63:0] _GEN_18 = {{31'd0}, _T_652}; // @[Mux.scala 27:72] + wire [63:0] _T_655 = _GEN_18 | _T_653; // @[Mux.scala 27:72] + wire [63:0] _GEN_19 = {{31'd0}, _T_654}; // @[Mux.scala 27:72] + wire [63:0] _T_656 = _T_655 | _GEN_19; // @[Mux.scala 27:72] + wire _T_659 = run_state & _T_619; // @[el2_exu_div_ctl.scala 179:48] + wire qff_enable = io_dp_valid | _T_659; // @[el2_exu_div_ctl.scala 179:35] + wire _T_910 = count != 6'h21; // @[el2_exu_div_ctl.scala 190:73] + wire _T_911 = _T_659 & _T_910; // @[el2_exu_div_ctl.scala 190:64] + wire _T_912 = io_dp_valid | _T_911; // @[el2_exu_div_ctl.scala 190:34] + wire aff_enable = _T_912 | rem_correct; // @[el2_exu_div_ctl.scala 190:89] + wire _T_932 = dividend_neg_ff ^ divisor_neg_ff; // @[el2_exu_div_ctl.scala 197:50] + wire _T_933 = sign_ff & _T_932; // @[el2_exu_div_ctl.scala 197:31] + wire [31:0] q_ff_eff = _T_933 ? _T_881 : q_ff[31:0]; // @[el2_exu_div_ctl.scala 197:21] + wire _T_1161 = |a_ff[0]; // @[el2_lib.scala 234:32] + wire _T_1163 = ~a_ff[1]; // @[el2_lib.scala 235:32] + wire _T_1165 = _T_1161 ? _T_1163 : a_ff[1]; // @[el2_lib.scala 235:25] + wire _T_1167 = |a_ff[1:0]; // @[el2_lib.scala 234:32] + wire _T_1169 = ~a_ff[2]; // @[el2_lib.scala 235:32] + wire _T_1171 = _T_1167 ? _T_1169 : a_ff[2]; // @[el2_lib.scala 235:25] + wire _T_1173 = |a_ff[2:0]; // @[el2_lib.scala 234:32] + wire _T_1175 = ~a_ff[3]; // @[el2_lib.scala 235:32] + wire _T_1177 = _T_1173 ? _T_1175 : a_ff[3]; // @[el2_lib.scala 235:25] + wire _T_1179 = |a_ff[3:0]; // @[el2_lib.scala 234:32] + wire _T_1181 = ~a_ff[4]; // @[el2_lib.scala 235:32] + wire _T_1183 = _T_1179 ? _T_1181 : a_ff[4]; // @[el2_lib.scala 235:25] + wire _T_1185 = |a_ff[4:0]; // @[el2_lib.scala 234:32] + wire _T_1187 = ~a_ff[5]; // @[el2_lib.scala 235:32] + wire _T_1189 = _T_1185 ? _T_1187 : a_ff[5]; // @[el2_lib.scala 235:25] + wire _T_1191 = |a_ff[5:0]; // @[el2_lib.scala 234:32] + wire _T_1193 = ~a_ff[6]; // @[el2_lib.scala 235:32] + wire _T_1195 = _T_1191 ? _T_1193 : a_ff[6]; // @[el2_lib.scala 235:25] + wire _T_1197 = |a_ff[6:0]; // @[el2_lib.scala 234:32] + wire _T_1199 = ~a_ff[7]; // @[el2_lib.scala 235:32] + wire _T_1201 = _T_1197 ? _T_1199 : a_ff[7]; // @[el2_lib.scala 235:25] + wire _T_1203 = |a_ff[7:0]; // @[el2_lib.scala 234:32] + wire _T_1205 = ~a_ff[8]; // @[el2_lib.scala 235:32] + wire _T_1207 = _T_1203 ? _T_1205 : a_ff[8]; // @[el2_lib.scala 235:25] + wire _T_1209 = |a_ff[8:0]; // @[el2_lib.scala 234:32] + wire _T_1211 = ~a_ff[9]; // @[el2_lib.scala 235:32] + wire _T_1213 = _T_1209 ? _T_1211 : a_ff[9]; // @[el2_lib.scala 235:25] + wire _T_1215 = |a_ff[9:0]; // @[el2_lib.scala 234:32] + wire _T_1217 = ~a_ff[10]; // @[el2_lib.scala 235:32] + wire _T_1219 = _T_1215 ? _T_1217 : a_ff[10]; // @[el2_lib.scala 235:25] + wire _T_1221 = |a_ff[10:0]; // @[el2_lib.scala 234:32] + wire _T_1223 = ~a_ff[11]; // @[el2_lib.scala 235:32] + wire _T_1225 = _T_1221 ? _T_1223 : a_ff[11]; // @[el2_lib.scala 235:25] + wire _T_1227 = |a_ff[11:0]; // @[el2_lib.scala 234:32] + wire _T_1229 = ~a_ff[12]; // @[el2_lib.scala 235:32] + wire _T_1231 = _T_1227 ? _T_1229 : a_ff[12]; // @[el2_lib.scala 235:25] + wire _T_1233 = |a_ff[12:0]; // @[el2_lib.scala 234:32] + wire _T_1235 = ~a_ff[13]; // @[el2_lib.scala 235:32] + wire _T_1237 = _T_1233 ? _T_1235 : a_ff[13]; // @[el2_lib.scala 235:25] + wire _T_1239 = |a_ff[13:0]; // @[el2_lib.scala 234:32] + wire _T_1241 = ~a_ff[14]; // @[el2_lib.scala 235:32] + wire _T_1243 = _T_1239 ? _T_1241 : a_ff[14]; // @[el2_lib.scala 235:25] + wire _T_1245 = |a_ff[14:0]; // @[el2_lib.scala 234:32] + wire _T_1247 = ~a_ff[15]; // @[el2_lib.scala 235:32] + wire _T_1249 = _T_1245 ? _T_1247 : a_ff[15]; // @[el2_lib.scala 235:25] + wire _T_1251 = |a_ff[15:0]; // @[el2_lib.scala 234:32] + wire _T_1253 = ~a_ff[16]; // @[el2_lib.scala 235:32] + wire _T_1255 = _T_1251 ? _T_1253 : a_ff[16]; // @[el2_lib.scala 235:25] + wire _T_1257 = |a_ff[16:0]; // @[el2_lib.scala 234:32] + wire _T_1259 = ~a_ff[17]; // @[el2_lib.scala 235:32] + wire _T_1261 = _T_1257 ? _T_1259 : a_ff[17]; // @[el2_lib.scala 235:25] + wire _T_1263 = |a_ff[17:0]; // @[el2_lib.scala 234:32] + wire _T_1265 = ~a_ff[18]; // @[el2_lib.scala 235:32] + wire _T_1267 = _T_1263 ? _T_1265 : a_ff[18]; // @[el2_lib.scala 235:25] + wire _T_1269 = |a_ff[18:0]; // @[el2_lib.scala 234:32] + wire _T_1271 = ~a_ff[19]; // @[el2_lib.scala 235:32] + wire _T_1273 = _T_1269 ? _T_1271 : a_ff[19]; // @[el2_lib.scala 235:25] + wire _T_1275 = |a_ff[19:0]; // @[el2_lib.scala 234:32] + wire _T_1277 = ~a_ff[20]; // @[el2_lib.scala 235:32] + wire _T_1279 = _T_1275 ? _T_1277 : a_ff[20]; // @[el2_lib.scala 235:25] + wire _T_1281 = |a_ff[20:0]; // @[el2_lib.scala 234:32] + wire _T_1283 = ~a_ff[21]; // @[el2_lib.scala 235:32] + wire _T_1285 = _T_1281 ? _T_1283 : a_ff[21]; // @[el2_lib.scala 235:25] + wire _T_1287 = |a_ff[21:0]; // @[el2_lib.scala 234:32] + wire _T_1289 = ~a_ff[22]; // @[el2_lib.scala 235:32] + wire _T_1291 = _T_1287 ? _T_1289 : a_ff[22]; // @[el2_lib.scala 235:25] + wire _T_1293 = |a_ff[22:0]; // @[el2_lib.scala 234:32] + wire _T_1295 = ~a_ff[23]; // @[el2_lib.scala 235:32] + wire _T_1297 = _T_1293 ? _T_1295 : a_ff[23]; // @[el2_lib.scala 235:25] + wire _T_1299 = |a_ff[23:0]; // @[el2_lib.scala 234:32] + wire _T_1301 = ~a_ff[24]; // @[el2_lib.scala 235:32] + wire _T_1303 = _T_1299 ? _T_1301 : a_ff[24]; // @[el2_lib.scala 235:25] + wire _T_1305 = |a_ff[24:0]; // @[el2_lib.scala 234:32] + wire _T_1307 = ~a_ff[25]; // @[el2_lib.scala 235:32] + wire _T_1309 = _T_1305 ? _T_1307 : a_ff[25]; // @[el2_lib.scala 235:25] + wire _T_1311 = |a_ff[25:0]; // @[el2_lib.scala 234:32] + wire _T_1313 = ~a_ff[26]; // @[el2_lib.scala 235:32] + wire _T_1315 = _T_1311 ? _T_1313 : a_ff[26]; // @[el2_lib.scala 235:25] + wire _T_1317 = |a_ff[26:0]; // @[el2_lib.scala 234:32] + wire _T_1319 = ~a_ff[27]; // @[el2_lib.scala 235:32] + wire _T_1321 = _T_1317 ? _T_1319 : a_ff[27]; // @[el2_lib.scala 235:25] + wire _T_1323 = |a_ff[27:0]; // @[el2_lib.scala 234:32] + wire _T_1325 = ~a_ff[28]; // @[el2_lib.scala 235:32] + wire _T_1327 = _T_1323 ? _T_1325 : a_ff[28]; // @[el2_lib.scala 235:25] + wire _T_1329 = |a_ff[28:0]; // @[el2_lib.scala 234:32] + wire _T_1331 = ~a_ff[29]; // @[el2_lib.scala 235:32] + wire _T_1333 = _T_1329 ? _T_1331 : a_ff[29]; // @[el2_lib.scala 235:25] + wire _T_1335 = |a_ff[29:0]; // @[el2_lib.scala 234:32] + wire _T_1337 = ~a_ff[30]; // @[el2_lib.scala 235:32] + wire _T_1339 = _T_1335 ? _T_1337 : a_ff[30]; // @[el2_lib.scala 235:25] + wire _T_1341 = |a_ff[30:0]; // @[el2_lib.scala 234:32] + wire _T_1343 = ~a_ff[31]; // @[el2_lib.scala 235:32] + wire _T_1345 = _T_1341 ? _T_1343 : a_ff[31]; // @[el2_lib.scala 235:25] + wire [6:0] _T_1351 = {_T_1201,_T_1195,_T_1189,_T_1183,_T_1177,_T_1171,_T_1165}; // @[el2_lib.scala 237:14] + wire [14:0] _T_1359 = {_T_1249,_T_1243,_T_1237,_T_1231,_T_1225,_T_1219,_T_1213,_T_1207,_T_1351}; // @[el2_lib.scala 237:14] + wire [7:0] _T_1366 = {_T_1297,_T_1291,_T_1285,_T_1279,_T_1273,_T_1267,_T_1261,_T_1255}; // @[el2_lib.scala 237:14] + wire [30:0] _T_1375 = {_T_1345,_T_1339,_T_1333,_T_1327,_T_1321,_T_1315,_T_1309,_T_1303,_T_1366,_T_1359}; // @[el2_lib.scala 237:14] + wire [31:0] _T_1377 = {_T_1375,a_ff[0]}; // @[Cat.scala 29:58] + wire [31:0] a_ff_eff = _T_660 ? _T_1377 : a_ff[31:0]; // @[el2_exu_div_ctl.scala 198:21] + reg smallnum_case_ff; // @[Reg.scala 27:20] + reg [3:0] smallnum_ff; // @[Reg.scala 27:20] + wire [31:0] _T_1380 = {28'h0,smallnum_ff}; // @[Cat.scala 29:58] + wire _T_1382 = ~smallnum_case_ff; // @[el2_exu_div_ctl.scala 203:6] + wire _T_1384 = _T_1382 & _T_9; // @[el2_exu_div_ctl.scala 203:24] + wire [31:0] _T_1386 = smallnum_case_ff ? _T_1380 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_1387 = rem_ff ? a_ff_eff : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_1388 = _T_1384 ? q_ff_eff : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_1389 = _T_1386 | _T_1387; // @[Mux.scala 27:72] + wire _T_1393 = io_dp_valid & _T; // @[el2_exu_div_ctl.scala 211:40] + wire _T_1397 = finish & _T; // @[el2_exu_div_ctl.scala 212:37] + wire _T_1407 = io_dp_valid & div_clken; // @[el2_exu_div_ctl.scala 215:73] + wire [32:0] q_in = _T_656[32:0]; // @[el2_exu_div_ctl.scala 174:8] + wire _T_1436 = _T_631 & io_divisor[31]; // @[el2_exu_div_ctl.scala 225:40] + wire [32:0] _T_1437 = {_T_1436,io_divisor}; // @[Cat.scala 29:58] + assign io_out = _T_1389 | _T_1388; // @[el2_exu_div_ctl.scala 52:10 el2_exu_div_ctl.scala 200:10] + assign io_finish_dly = finish_ff & _T; // @[el2_exu_div_ctl.scala 53:17 el2_exu_div_ctl.scala 170:18] +`ifdef RANDOMIZE_GARBAGE_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_INVALID_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_REG_INIT +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_MEM_INIT +`define RANDOMIZE +`endif +`ifndef RANDOM +`define RANDOM $random +`endif +`ifdef RANDOMIZE_MEM_INIT + integer initvar; +`endif +`ifndef SYNTHESIS +`ifdef FIRRTL_BEFORE_INITIAL +`FIRRTL_BEFORE_INITIAL +`endif +initial begin + `ifdef RANDOMIZE + `ifdef INIT_RANDOM + `INIT_RANDOM + `endif + `ifndef VERILATOR + `ifdef RANDOMIZE_DELAY + #`RANDOMIZE_DELAY begin end + `else + #0.002 begin end + `endif + `endif +`ifdef RANDOMIZE_REG_INIT + _RAND_0 = {1{`RANDOM}}; + valid_ff_x = _RAND_0[0:0]; + _RAND_1 = {2{`RANDOM}}; + q_ff = _RAND_1[32:0]; + _RAND_2 = {2{`RANDOM}}; + m_ff = _RAND_2[32:0]; + _RAND_3 = {1{`RANDOM}}; + rem_ff = _RAND_3[0:0]; + _RAND_4 = {1{`RANDOM}}; + sign_ff = _RAND_4[0:0]; + _RAND_5 = {1{`RANDOM}}; + shortq_shift_xx = _RAND_5[3:0]; + _RAND_6 = {1{`RANDOM}}; + count = _RAND_6[5:0]; + _RAND_7 = {1{`RANDOM}}; + run_state = _RAND_7[0:0]; + _RAND_8 = {1{`RANDOM}}; + finish_ff = _RAND_8[0:0]; + _RAND_9 = {1{`RANDOM}}; + shortq_enable_ff = _RAND_9[0:0]; + _RAND_10 = {1{`RANDOM}}; + dividend_neg_ff = _RAND_10[0:0]; + _RAND_11 = {2{`RANDOM}}; + a_ff = _RAND_11[32:0]; + _RAND_12 = {1{`RANDOM}}; + divisor_neg_ff = _RAND_12[0:0]; + _RAND_13 = {1{`RANDOM}}; + smallnum_case_ff = _RAND_13[0:0]; + _RAND_14 = {1{`RANDOM}}; + smallnum_ff = _RAND_14[3:0]; +`endif // RANDOMIZE_REG_INIT + if (reset) begin + valid_ff_x = 1'h0; + end + if (reset) begin + q_ff = 33'h0; + end + if (reset) begin + m_ff = 33'h0; + end + if (reset) begin + rem_ff = 1'h0; + end + if (reset) begin + sign_ff = 1'h0; + end + if (reset) begin + shortq_shift_xx = 4'h0; + end + if (reset) begin + count = 6'h0; + end + if (reset) begin + run_state = 1'h0; + end + if (reset) begin + finish_ff = 1'h0; + end + if (reset) begin + shortq_enable_ff = 1'h0; + end + if (reset) begin + dividend_neg_ff = 1'h0; + end + if (reset) begin + a_ff = 33'h0; + end + if (reset) begin + divisor_neg_ff = 1'h0; + end + if (reset) begin + smallnum_case_ff = 1'h0; + end + if (reset) begin + smallnum_ff = 4'h0; + end + `endif // RANDOMIZE +end // initial +`ifdef FIRRTL_AFTER_INITIAL +`FIRRTL_AFTER_INITIAL +`endif +`endif // SYNTHESIS + always @(posedge clock or posedge reset) begin + if (reset) begin + valid_ff_x <= 1'h0; + end else if (div_clken) begin + valid_ff_x <= _T_1393; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + q_ff <= 33'h0; + end else if (qff_enable) begin + q_ff <= q_in; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + m_ff <= 33'h0; + end else if (io_dp_valid) begin + m_ff <= _T_1437; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + rem_ff <= 1'h0; + end else if (_T_1407) begin + rem_ff <= io_dp_rem; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + sign_ff <= 1'h0; + end else if (_T_1407) begin + sign_ff <= sign_eff; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + shortq_shift_xx <= 4'h0; + end else if (div_clken) begin + shortq_shift_xx <= shortq_shift; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + count <= 6'h0; + end else if (div_clken) begin + count <= count_in; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + run_state <= 1'h0; + end else if (div_clken) begin + run_state <= run_in; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + finish_ff <= 1'h0; + end else if (div_clken) begin + finish_ff <= _T_1397; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + shortq_enable_ff <= 1'h0; + end else if (div_clken) begin + shortq_enable_ff <= shortq_enable; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + dividend_neg_ff <= 1'h0; + end else if (_T_1407) begin + dividend_neg_ff <= io_dividend[31]; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + a_ff <= 33'h0; + end else if (aff_enable) begin + a_ff <= a_in; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + divisor_neg_ff <= 1'h0; + end else if (_T_1407) begin + divisor_neg_ff <= io_divisor[31]; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + smallnum_case_ff <= 1'h0; + end else if (div_clken) begin + smallnum_case_ff <= smallnum_case; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + smallnum_ff <= 4'h0; + end else if (div_clken) begin + smallnum_ff <= smallnum; + end + end +endmodule diff --git a/el2_exu_mul_ctl.anno.json b/el2_exu_mul_ctl.anno.json new file mode 100644 index 00000000..9f2d216d --- /dev/null +++ b/el2_exu_mul_ctl.anno.json @@ -0,0 +1,18 @@ +[ + { + "class":"firrtl.EmitCircuitAnnotation", + "emitter":"firrtl.VerilogEmitter" + }, + { + "class":"firrtl.options.TargetDirAnnotation", + "directory":"." + }, + { + "class":"firrtl.options.OutputAnnotationFileAnnotation", + "file":"el2_exu_mul_ctl" + }, + { + "class":"firrtl.transforms.BlackBoxTargetDirAnno", + "targetDir":"." + } +] \ No newline at end of file diff --git a/el2_exu_mul_ctl.fir b/el2_exu_mul_ctl.fir new file mode 100644 index 00000000..3882fbb9 --- /dev/null +++ b/el2_exu_mul_ctl.fir @@ -0,0 +1,55 @@ +;buildInfoPackage: chisel3, version: 3.3.1, scalaVersion: 2.12.11, sbtVersion: 1.3.10 +circuit el2_exu_mul_ctl : + module el2_exu_mul_ctl : + input clock : Clock + input reset : AsyncReset + output io : {flip scan_mode : UInt<1>, flip mul_p : {valid : UInt<1>, rs1_sign : UInt<1>, rs2_sign : UInt<1>, low : UInt<1>, bext : UInt<1>, bdep : UInt<1>, clmul : UInt<1>, clmulh : UInt<1>, clmulr : UInt<1>, grev : UInt<1>, shfl : UInt<1>, unshfl : UInt<1>, crc32_b : UInt<1>, crc32_h : UInt<1>, crc32_w : UInt<1>, crc32c_b : UInt<1>, crc32c_h : UInt<1>, crc32c_w : UInt<1>, bfp : UInt<1>}, flip rs1_in : UInt<32>, flip rs2_in : UInt<32>, result_x : UInt<32>} + + wire rs1_ext_in : SInt<33> + rs1_ext_in <= asSInt(UInt<1>("h00")) + wire rs2_ext_in : SInt<33> + rs2_ext_in <= asSInt(UInt<1>("h00")) + wire prod_x : SInt<66> + prod_x <= asSInt(UInt<1>("h00")) + wire low_x : UInt<1> + low_x <= UInt<1>("h00") + node _T = bits(io.rs1_in, 31, 31) @[el2_exu_mul_ctl.scala 23:50] + node _T_1 = and(io.mul_p.rs1_sign, _T) @[el2_exu_mul_ctl.scala 23:39] + node _T_2 = cat(_T_1, io.rs1_in) @[Cat.scala 29:58] + node _T_3 = asSInt(_T_2) @[el2_exu_mul_ctl.scala 23:66] + rs1_ext_in <= _T_3 @[el2_exu_mul_ctl.scala 23:14] + node _T_4 = bits(io.rs2_in, 31, 31) @[el2_exu_mul_ctl.scala 24:50] + node _T_5 = and(io.mul_p.rs2_sign, _T_4) @[el2_exu_mul_ctl.scala 24:39] + node _T_6 = cat(_T_5, io.rs2_in) @[Cat.scala 29:58] + node _T_7 = asSInt(_T_6) @[el2_exu_mul_ctl.scala 24:66] + rs2_ext_in <= _T_7 @[el2_exu_mul_ctl.scala 24:14] + node _T_8 = bits(io.mul_p.valid, 0, 0) @[el2_exu_mul_ctl.scala 27:55] + reg _T_9 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_8 : @[Reg.scala 28:19] + _T_9 <= io.mul_p.low @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + low_x <= _T_9 @[el2_exu_mul_ctl.scala 27:9] + node _T_10 = bits(io.mul_p.valid, 0, 0) @[el2_exu_mul_ctl.scala 28:56] + reg rs1_x : SInt, clock with : (reset => (reset, asSInt(UInt<1>("h00")))) @[Reg.scala 27:20] + when _T_10 : @[Reg.scala 28:19] + rs1_x <= rs1_ext_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_11 = bits(io.mul_p.valid, 0, 0) @[el2_exu_mul_ctl.scala 29:56] + reg rs2_x : SInt, clock with : (reset => (reset, asSInt(UInt<1>("h00")))) @[Reg.scala 27:20] + when _T_11 : @[Reg.scala 28:19] + rs2_x <= rs2_ext_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_12 = mul(rs1_x, rs2_x) @[el2_exu_mul_ctl.scala 31:20] + prod_x <= _T_12 @[el2_exu_mul_ctl.scala 31:10] + node _T_13 = bits(low_x, 0, 0) @[el2_exu_mul_ctl.scala 32:36] + node _T_14 = eq(_T_13, UInt<1>("h00")) @[el2_exu_mul_ctl.scala 32:29] + node _T_15 = bits(prod_x, 63, 32) @[el2_exu_mul_ctl.scala 32:52] + node _T_16 = bits(low_x, 0, 0) @[el2_exu_mul_ctl.scala 32:67] + node _T_17 = bits(prod_x, 31, 0) @[el2_exu_mul_ctl.scala 32:83] + node _T_18 = mux(_T_14, _T_15, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_19 = mux(_T_16, _T_17, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_20 = or(_T_18, _T_19) @[Mux.scala 27:72] + wire _T_21 : UInt<32> @[Mux.scala 27:72] + _T_21 <= _T_20 @[Mux.scala 27:72] + io.result_x <= _T_21 @[el2_exu_mul_ctl.scala 32:15] + diff --git a/el2_exu_mul_ctl.v b/el2_exu_mul_ctl.v new file mode 100644 index 00000000..fb24ca2f --- /dev/null +++ b/el2_exu_mul_ctl.v @@ -0,0 +1,123 @@ +module el2_exu_mul_ctl( + input clock, + input reset, + input io_scan_mode, + input io_mul_p_valid, + input io_mul_p_rs1_sign, + input io_mul_p_rs2_sign, + input io_mul_p_low, + input io_mul_p_bext, + input io_mul_p_bdep, + input io_mul_p_clmul, + input io_mul_p_clmulh, + input io_mul_p_clmulr, + input io_mul_p_grev, + input io_mul_p_shfl, + input io_mul_p_unshfl, + input io_mul_p_crc32_b, + input io_mul_p_crc32_h, + input io_mul_p_crc32_w, + input io_mul_p_crc32c_b, + input io_mul_p_crc32c_h, + input io_mul_p_crc32c_w, + input io_mul_p_bfp, + input [31:0] io_rs1_in, + input [31:0] io_rs2_in, + output [31:0] io_result_x +); +`ifdef RANDOMIZE_REG_INIT + reg [31:0] _RAND_0; + reg [63:0] _RAND_1; + reg [63:0] _RAND_2; +`endif // RANDOMIZE_REG_INIT + wire _T_1 = io_mul_p_rs1_sign & io_rs1_in[31]; // @[el2_exu_mul_ctl.scala 23:39] + wire [32:0] rs1_ext_in = {_T_1,io_rs1_in}; // @[el2_exu_mul_ctl.scala 23:66] + wire _T_5 = io_mul_p_rs2_sign & io_rs2_in[31]; // @[el2_exu_mul_ctl.scala 24:39] + wire [32:0] rs2_ext_in = {_T_5,io_rs2_in}; // @[el2_exu_mul_ctl.scala 24:66] + reg low_x; // @[Reg.scala 27:20] + reg [32:0] rs1_x; // @[Reg.scala 27:20] + reg [32:0] rs2_x; // @[Reg.scala 27:20] + wire [65:0] prod_x = $signed(rs1_x) * $signed(rs2_x); // @[el2_exu_mul_ctl.scala 31:20] + wire _T_14 = ~low_x; // @[el2_exu_mul_ctl.scala 32:29] + wire [31:0] _T_18 = _T_14 ? prod_x[63:32] : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_19 = low_x ? prod_x[31:0] : 32'h0; // @[Mux.scala 27:72] + assign io_result_x = _T_18 | _T_19; // @[el2_exu_mul_ctl.scala 32:15] +`ifdef RANDOMIZE_GARBAGE_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_INVALID_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_REG_INIT +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_MEM_INIT +`define RANDOMIZE +`endif +`ifndef RANDOM +`define RANDOM $random +`endif +`ifdef RANDOMIZE_MEM_INIT + integer initvar; +`endif +`ifndef SYNTHESIS +`ifdef FIRRTL_BEFORE_INITIAL +`FIRRTL_BEFORE_INITIAL +`endif +initial begin + `ifdef RANDOMIZE + `ifdef INIT_RANDOM + `INIT_RANDOM + `endif + `ifndef VERILATOR + `ifdef RANDOMIZE_DELAY + #`RANDOMIZE_DELAY begin end + `else + #0.002 begin end + `endif + `endif +`ifdef RANDOMIZE_REG_INIT + _RAND_0 = {1{`RANDOM}}; + low_x = _RAND_0[0:0]; + _RAND_1 = {2{`RANDOM}}; + rs1_x = _RAND_1[32:0]; + _RAND_2 = {2{`RANDOM}}; + rs2_x = _RAND_2[32:0]; +`endif // RANDOMIZE_REG_INIT + if (reset) begin + low_x = 1'h0; + end + if (reset) begin + rs1_x = 33'sh0; + end + if (reset) begin + rs2_x = 33'sh0; + end + `endif // RANDOMIZE +end // initial +`ifdef FIRRTL_AFTER_INITIAL +`FIRRTL_AFTER_INITIAL +`endif +`endif // SYNTHESIS + always @(posedge clock or posedge reset) begin + if (reset) begin + low_x <= 1'h0; + end else if (io_mul_p_valid) begin + low_x <= io_mul_p_low; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + rs1_x <= 33'sh0; + end else if (io_mul_p_valid) begin + rs1_x <= rs1_ext_in; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + rs2_x <= 33'sh0; + end else if (io_mul_p_valid) begin + rs2_x <= rs2_ext_in; + end + end +endmodule diff --git a/el2_lsu.anno.json b/el2_lsu.anno.json new file mode 100644 index 00000000..ac7b25f8 --- /dev/null +++ b/el2_lsu.anno.json @@ -0,0 +1,424 @@ +[ + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_dccm_dma_rdata", + "sources":[ + "~el2_lsu|el2_lsu>io_picm_rd_data", + "~el2_lsu|el2_lsu>io_dec_tlu_core_ecc_disable", + "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", + "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", + "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_lsu_single_ecc_error_incr", + "sources":[ + "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r", + "~el2_lsu|el2_lsu>io_dec_tlu_core_ecc_disable", + "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", + "~el2_lsu|el2_lsu>io_dccm_rd_data_lo" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_dccm_wren", + "sources":[ + "~el2_lsu|el2_lsu>io_dma_dccm_req", + "~el2_lsu|el2_lsu>io_dma_mem_write", + "~el2_lsu|el2_lsu>io_exu_lsu_rs1_d", + "~el2_lsu|el2_lsu>io_dma_mem_addr", + "~el2_lsu|el2_lsu>io_dec_lsu_offset_d", + "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d", + "~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d", + "~el2_lsu|el2_lsu>io_lsu_p_dword", + "~el2_lsu|el2_lsu>io_lsu_p_half", + "~el2_lsu|el2_lsu>io_lsu_p_word", + "~el2_lsu|el2_lsu>io_dma_mem_sz", + "~el2_lsu|el2_lsu>io_lsu_p_valid", + "~el2_lsu|el2_lsu>io_dec_tlu_flush_lower_r", + "~el2_lsu|el2_lsu>io_lsu_p_fast_int", + "~el2_lsu|el2_lsu>io_lsu_p_load", + "~el2_lsu|el2_lsu>io_lsu_p_store", + "~el2_lsu|el2_lsu>io_picm_rd_data", + "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", + "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", + "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_dccm_wr_addr_hi", + "sources":[ + "~el2_lsu|el2_lsu>io_dma_dccm_req", + "~el2_lsu|el2_lsu>io_dma_mem_write", + "~el2_lsu|el2_lsu>io_exu_lsu_rs1_d", + "~el2_lsu|el2_lsu>io_dma_mem_addr", + "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d", + "~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d", + "~el2_lsu|el2_lsu>io_dec_lsu_offset_d", + "~el2_lsu|el2_lsu>io_lsu_p_dword", + "~el2_lsu|el2_lsu>io_lsu_p_half", + "~el2_lsu|el2_lsu>io_lsu_p_word", + "~el2_lsu|el2_lsu>io_dma_mem_sz", + "~el2_lsu|el2_lsu>io_picm_rd_data", + "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", + "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", + "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_dccm_rden", + "sources":[ + "~el2_lsu|el2_lsu>io_exu_lsu_rs1_d", + "~el2_lsu|el2_lsu>io_dma_mem_addr", + "~el2_lsu|el2_lsu>io_dec_lsu_offset_d", + "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d", + "~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d", + "~el2_lsu|el2_lsu>io_lsu_p_dword", + "~el2_lsu|el2_lsu>io_lsu_p_half", + "~el2_lsu|el2_lsu>io_lsu_p_word", + "~el2_lsu|el2_lsu>io_dma_mem_sz", + "~el2_lsu|el2_lsu>io_dma_dccm_req", + "~el2_lsu|el2_lsu>io_lsu_p_valid", + "~el2_lsu|el2_lsu>io_dec_tlu_flush_lower_r", + "~el2_lsu|el2_lsu>io_lsu_p_fast_int", + "~el2_lsu|el2_lsu>io_lsu_p_load", + "~el2_lsu|el2_lsu>io_dma_mem_write", + "~el2_lsu|el2_lsu>io_lsu_p_store", + "~el2_lsu|el2_lsu>io_picm_rd_data", + "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", + "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", + "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_picm_rden", + "sources":[ + "~el2_lsu|el2_lsu>io_exu_lsu_rs1_d", + "~el2_lsu|el2_lsu>io_dma_mem_addr", + "~el2_lsu|el2_lsu>io_dec_lsu_offset_d", + "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d", + "~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d", + "~el2_lsu|el2_lsu>io_lsu_p_dword", + "~el2_lsu|el2_lsu>io_lsu_p_half", + "~el2_lsu|el2_lsu>io_lsu_p_word", + "~el2_lsu|el2_lsu>io_dma_mem_sz", + "~el2_lsu|el2_lsu>io_dma_dccm_req", + "~el2_lsu|el2_lsu>io_lsu_p_valid", + "~el2_lsu|el2_lsu>io_dec_tlu_flush_lower_r", + "~el2_lsu|el2_lsu>io_lsu_p_fast_int", + "~el2_lsu|el2_lsu>io_lsu_p_load", + "~el2_lsu|el2_lsu>io_dma_mem_write", + "~el2_lsu|el2_lsu>io_picm_rd_data", + "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", + "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", + "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_dccm_ready", + "sources":[ + "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_picm_wren", + "sources":[ + "~el2_lsu|el2_lsu>io_dma_dccm_req", + "~el2_lsu|el2_lsu>io_dma_mem_write", + "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r", + "~el2_lsu|el2_lsu>io_exu_lsu_rs1_d", + "~el2_lsu|el2_lsu>io_dma_mem_addr", + "~el2_lsu|el2_lsu>io_dec_lsu_offset_d", + "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d", + "~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d", + "~el2_lsu|el2_lsu>io_lsu_p_dword", + "~el2_lsu|el2_lsu>io_lsu_p_half", + "~el2_lsu|el2_lsu>io_lsu_p_word", + "~el2_lsu|el2_lsu>io_dma_mem_sz", + "~el2_lsu|el2_lsu>io_picm_rd_data", + "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", + "~el2_lsu|el2_lsu>io_dccm_rd_data_lo" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_lsu_trigger_match_m", + "sources":[ + "~el2_lsu|el2_lsu>io_trigger_pkt_any_0_store", + "~el2_lsu|el2_lsu>io_trigger_pkt_any_1_store", + "~el2_lsu|el2_lsu>io_trigger_pkt_any_0_load", + "~el2_lsu|el2_lsu>io_trigger_pkt_any_0_select", + "~el2_lsu|el2_lsu>io_trigger_pkt_any_3_store", + "~el2_lsu|el2_lsu>io_trigger_pkt_any_2_store", + "~el2_lsu|el2_lsu>io_trigger_pkt_any_1_load", + "~el2_lsu|el2_lsu>io_trigger_pkt_any_1_select", + "~el2_lsu|el2_lsu>io_trigger_pkt_any_3_load", + "~el2_lsu|el2_lsu>io_trigger_pkt_any_3_select", + "~el2_lsu|el2_lsu>io_trigger_pkt_any_2_load", + "~el2_lsu|el2_lsu>io_trigger_pkt_any_2_select", + "~el2_lsu|el2_lsu>io_trigger_pkt_any_0_tdata2", + "~el2_lsu|el2_lsu>io_trigger_pkt_any_1_tdata2", + "~el2_lsu|el2_lsu>io_trigger_pkt_any_0_match_", + "~el2_lsu|el2_lsu>io_trigger_pkt_any_3_tdata2", + "~el2_lsu|el2_lsu>io_trigger_pkt_any_2_tdata2", + "~el2_lsu|el2_lsu>io_trigger_pkt_any_1_match_", + "~el2_lsu|el2_lsu>io_trigger_pkt_any_3_match_", + "~el2_lsu|el2_lsu>io_trigger_pkt_any_2_match_", + "~el2_lsu|el2_lsu>io_picm_rd_data", + "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", + "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", + "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_picm_wraddr", + "sources":[ + "~el2_lsu|el2_lsu>io_dma_mem_addr", + "~el2_lsu|el2_lsu>io_dma_dccm_req", + "~el2_lsu|el2_lsu>io_dma_mem_write", + "~el2_lsu|el2_lsu>io_exu_lsu_rs1_d", + "~el2_lsu|el2_lsu>io_dec_lsu_offset_d", + "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d", + "~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d", + "~el2_lsu|el2_lsu>io_lsu_p_dword", + "~el2_lsu|el2_lsu>io_lsu_p_half", + "~el2_lsu|el2_lsu>io_lsu_p_word", + "~el2_lsu|el2_lsu>io_dma_mem_sz", + "~el2_lsu|el2_lsu>io_picm_rd_data", + "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", + "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", + "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_dccm_dma_ecc_error", + "sources":[ + "~el2_lsu|el2_lsu>io_dec_tlu_core_ecc_disable", + "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", + "~el2_lsu|el2_lsu>io_dccm_rd_data_lo" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_lsu_fastint_stall_any", + "sources":[ + "~el2_lsu|el2_lsu>io_dec_tlu_core_ecc_disable", + "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", + "~el2_lsu|el2_lsu>io_dccm_rd_data_lo" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_dccm_rd_addr_lo", + "sources":[ + "~el2_lsu|el2_lsu>io_exu_lsu_rs1_d", + "~el2_lsu|el2_lsu>io_dma_mem_addr", + "~el2_lsu|el2_lsu>io_dec_lsu_offset_d", + "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d", + "~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d", + "~el2_lsu|el2_lsu>io_picm_rd_data", + "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", + "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", + "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_dccm_rd_addr_hi", + "sources":[ + "~el2_lsu|el2_lsu>io_exu_lsu_rs1_d", + "~el2_lsu|el2_lsu>io_dma_mem_addr", + "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d", + "~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d", + "~el2_lsu|el2_lsu>io_dec_lsu_offset_d", + "~el2_lsu|el2_lsu>io_lsu_p_dword", + "~el2_lsu|el2_lsu>io_lsu_p_half", + "~el2_lsu|el2_lsu>io_lsu_p_word", + "~el2_lsu|el2_lsu>io_dma_mem_sz", + "~el2_lsu|el2_lsu>io_picm_rd_data", + "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", + "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", + "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_picm_wr_data", + "sources":[ + "~el2_lsu|el2_lsu>io_dma_mem_wdata", + "~el2_lsu|el2_lsu>io_dma_dccm_req", + "~el2_lsu|el2_lsu>io_dma_mem_write", + "~el2_lsu|el2_lsu>io_exu_lsu_rs1_d", + "~el2_lsu|el2_lsu>io_dma_mem_addr", + "~el2_lsu|el2_lsu>io_dec_lsu_offset_d", + "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d", + "~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d", + "~el2_lsu|el2_lsu>io_lsu_p_dword", + "~el2_lsu|el2_lsu>io_lsu_p_half", + "~el2_lsu|el2_lsu>io_lsu_p_word", + "~el2_lsu|el2_lsu>io_dma_mem_sz", + "~el2_lsu|el2_lsu>io_lsu_p_valid", + "~el2_lsu|el2_lsu>io_dec_tlu_flush_lower_r", + "~el2_lsu|el2_lsu>io_lsu_p_fast_int", + "~el2_lsu|el2_lsu>io_lsu_p_load", + "~el2_lsu|el2_lsu>io_lsu_p_store", + "~el2_lsu|el2_lsu>io_picm_rd_data", + "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", + "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", + "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_picm_mken", + "sources":[ + "~el2_lsu|el2_lsu>io_exu_lsu_rs1_d", + "~el2_lsu|el2_lsu>io_dma_mem_addr", + "~el2_lsu|el2_lsu>io_dec_lsu_offset_d", + "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d", + "~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d", + "~el2_lsu|el2_lsu>io_lsu_p_dword", + "~el2_lsu|el2_lsu>io_lsu_p_half", + "~el2_lsu|el2_lsu>io_lsu_p_word", + "~el2_lsu|el2_lsu>io_dma_mem_sz", + "~el2_lsu|el2_lsu>io_dma_dccm_req", + "~el2_lsu|el2_lsu>io_lsu_p_valid", + "~el2_lsu|el2_lsu>io_dec_tlu_flush_lower_r", + "~el2_lsu|el2_lsu>io_lsu_p_fast_int", + "~el2_lsu|el2_lsu>io_lsu_p_store", + "~el2_lsu|el2_lsu>io_dma_mem_write", + "~el2_lsu|el2_lsu>io_picm_rd_data", + "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", + "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", + "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_dccm_wr_addr_lo", + "sources":[ + "~el2_lsu|el2_lsu>io_dma_dccm_req", + "~el2_lsu|el2_lsu>io_dma_mem_write", + "~el2_lsu|el2_lsu>io_exu_lsu_rs1_d", + "~el2_lsu|el2_lsu>io_dma_mem_addr", + "~el2_lsu|el2_lsu>io_dec_lsu_offset_d", + "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d", + "~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d", + "~el2_lsu|el2_lsu>io_lsu_p_dword", + "~el2_lsu|el2_lsu>io_lsu_p_half", + "~el2_lsu|el2_lsu>io_lsu_p_word", + "~el2_lsu|el2_lsu>io_dma_mem_sz", + "~el2_lsu|el2_lsu>io_picm_rd_data", + "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", + "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", + "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_picm_rdaddr", + "sources":[ + "~el2_lsu|el2_lsu>io_exu_lsu_rs1_d", + "~el2_lsu|el2_lsu>io_dma_mem_addr", + "~el2_lsu|el2_lsu>io_dec_lsu_offset_d", + "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d", + "~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d", + "~el2_lsu|el2_lsu>io_picm_rd_data", + "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", + "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", + "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_dccm_wr_data_lo", + "sources":[ + "~el2_lsu|el2_lsu>io_dma_dccm_req", + "~el2_lsu|el2_lsu>io_dma_mem_write", + "~el2_lsu|el2_lsu>io_exu_lsu_rs1_d", + "~el2_lsu|el2_lsu>io_dma_mem_addr", + "~el2_lsu|el2_lsu>io_dec_lsu_offset_d", + "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d", + "~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d", + "~el2_lsu|el2_lsu>io_lsu_p_dword", + "~el2_lsu|el2_lsu>io_lsu_p_half", + "~el2_lsu|el2_lsu>io_lsu_p_word", + "~el2_lsu|el2_lsu>io_dma_mem_sz", + "~el2_lsu|el2_lsu>io_dma_mem_wdata", + "~el2_lsu|el2_lsu>io_picm_rd_data", + "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", + "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", + "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_lsu_store_stall_any", + "sources":[ + "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d", + "~el2_lsu|el2_lsu>io_exu_lsu_rs1_d", + "~el2_lsu|el2_lsu>io_dma_mem_addr", + "~el2_lsu|el2_lsu>io_dec_lsu_offset_d", + "~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d", + "~el2_lsu|el2_lsu>io_lsu_p_dword", + "~el2_lsu|el2_lsu>io_lsu_p_half", + "~el2_lsu|el2_lsu>io_lsu_p_word", + "~el2_lsu|el2_lsu>io_dma_mem_sz", + "~el2_lsu|el2_lsu>io_picm_rd_data", + "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", + "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", + "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu|el2_lsu>io_dccm_wr_data_hi", + "sources":[ + "~el2_lsu|el2_lsu>io_dma_dccm_req", + "~el2_lsu|el2_lsu>io_dma_mem_write", + "~el2_lsu|el2_lsu>io_exu_lsu_rs1_d", + "~el2_lsu|el2_lsu>io_dma_mem_addr", + "~el2_lsu|el2_lsu>io_dec_lsu_offset_d", + "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d", + "~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d", + "~el2_lsu|el2_lsu>io_lsu_p_dword", + "~el2_lsu|el2_lsu>io_lsu_p_half", + "~el2_lsu|el2_lsu>io_lsu_p_word", + "~el2_lsu|el2_lsu>io_dma_mem_sz", + "~el2_lsu|el2_lsu>io_dma_mem_wdata", + "~el2_lsu|el2_lsu>io_picm_rd_data", + "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", + "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", + "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" + ] + }, + { + "class":"firrtl.EmitCircuitAnnotation", + "emitter":"firrtl.VerilogEmitter" + }, + { + "class":"firrtl.transforms.BlackBoxResourceAnno", + "target":"el2_lsu.TEC_RV_ICG", + "resourceId":"/vsrc/TEC_RV_ICG.v" + }, + { + "class":"firrtl.options.TargetDirAnnotation", + "directory":"." + }, + { + "class":"firrtl.options.OutputAnnotationFileAnnotation", + "file":"el2_lsu" + }, + { + "class":"firrtl.transforms.BlackBoxTargetDirAnno", + "targetDir":"." + } +] \ No newline at end of file diff --git a/el2_lsu.fir b/el2_lsu.fir new file mode 100644 index 00000000..6356145c --- /dev/null +++ b/el2_lsu.fir @@ -0,0 +1,7528 @@ +;buildInfoPackage: chisel3, version: 3.3.1, scalaVersion: 2.12.11, sbtVersion: 1.3.10 +circuit el2_lsu : + module rvlsadder : + input clock : Clock + input reset : Reset + output io : {flip rs1 : UInt<32>, flip offset : UInt<12>, dout : UInt<32>} + + node _T = bits(io.rs1, 11, 0) @[beh_lib.scala 51:32] + node _T_1 = cat(UInt<1>("h00"), _T) @[Cat.scala 29:58] + node _T_2 = bits(io.offset, 11, 0) @[beh_lib.scala 51:64] + node _T_3 = cat(UInt<1>("h00"), _T_2) @[Cat.scala 29:58] + node _T_4 = add(_T_1, _T_3) @[beh_lib.scala 51:40] + node w1 = tail(_T_4, 1) @[beh_lib.scala 51:40] + node _T_5 = bits(io.offset, 11, 11) @[beh_lib.scala 53:42] + node _T_6 = bits(w1, 12, 12) @[beh_lib.scala 53:51] + node _T_7 = xor(_T_5, _T_6) @[beh_lib.scala 53:47] + node _T_8 = not(_T_7) @[beh_lib.scala 53:31] + node _T_9 = bits(_T_8, 0, 0) @[Bitwise.scala 72:15] + node _T_10 = mux(_T_9, UInt<20>("h0fffff"), UInt<20>("h00")) @[Bitwise.scala 72:12] + node _T_11 = bits(io.rs1, 31, 12) @[beh_lib.scala 53:67] + node _T_12 = and(_T_10, _T_11) @[beh_lib.scala 53:59] + node _T_13 = bits(io.offset, 11, 11) @[beh_lib.scala 54:26] + node _T_14 = not(_T_13) @[beh_lib.scala 54:16] + node _T_15 = bits(w1, 12, 12) @[beh_lib.scala 54:35] + node _T_16 = and(_T_14, _T_15) @[beh_lib.scala 54:31] + node _T_17 = bits(_T_16, 0, 0) @[Bitwise.scala 72:15] + node _T_18 = mux(_T_17, UInt<20>("h0fffff"), UInt<20>("h00")) @[Bitwise.scala 72:12] + node _T_19 = bits(io.rs1, 31, 12) @[beh_lib.scala 54:51] + node _T_20 = add(_T_19, UInt<1>("h01")) @[beh_lib.scala 54:58] + node _T_21 = tail(_T_20, 1) @[beh_lib.scala 54:58] + node _T_22 = and(_T_18, _T_21) @[beh_lib.scala 54:42] + node _T_23 = or(_T_12, _T_22) @[beh_lib.scala 53:76] + node _T_24 = bits(io.offset, 11, 11) @[beh_lib.scala 55:25] + node _T_25 = bits(w1, 12, 12) @[beh_lib.scala 55:35] + node _T_26 = not(_T_25) @[beh_lib.scala 55:32] + node _T_27 = and(_T_24, _T_26) @[beh_lib.scala 55:30] + node _T_28 = bits(_T_27, 0, 0) @[Bitwise.scala 72:15] + node _T_29 = mux(_T_28, UInt<20>("h0fffff"), UInt<20>("h00")) @[Bitwise.scala 72:12] + node _T_30 = bits(io.rs1, 31, 12) @[beh_lib.scala 55:51] + node _T_31 = sub(_T_30, UInt<1>("h01")) @[beh_lib.scala 55:58] + node _T_32 = tail(_T_31, 1) @[beh_lib.scala 55:58] + node _T_33 = and(_T_29, _T_32) @[beh_lib.scala 55:42] + node dout_upper = or(_T_23, _T_33) @[beh_lib.scala 54:65] + node _T_34 = bits(w1, 11, 0) @[beh_lib.scala 57:31] + node _T_35 = cat(dout_upper, _T_34) @[Cat.scala 29:58] + io.dout <= _T_35 @[beh_lib.scala 57:11] + + module rvrangecheck : + input clock : Clock + input reset : Reset + output io : {flip addr : UInt<32>, in_range : UInt<1>, in_region : UInt<1>} + + node _T = bits(io.addr, 31, 28) @[beh_lib.scala 114:28] + node _T_1 = eq(_T, UInt<4>("h0f")) @[beh_lib.scala 114:50] + io.in_region <= _T_1 @[beh_lib.scala 114:17] + node _T_2 = bits(io.addr, 31, 16) @[beh_lib.scala 118:28] + node _T_3 = eq(_T_2, UInt<16>("h0f004")) @[beh_lib.scala 118:43] + io.in_range <= _T_3 @[beh_lib.scala 118:17] + + module rvrangecheck_1 : + input clock : Clock + input reset : Reset + output io : {flip addr : UInt<32>, in_range : UInt<1>, in_region : UInt<1>} + + node _T = bits(io.addr, 31, 28) @[beh_lib.scala 114:28] + node _T_1 = eq(_T, UInt<4>("h0f")) @[beh_lib.scala 114:50] + io.in_region <= _T_1 @[beh_lib.scala 114:17] + node _T_2 = bits(io.addr, 31, 16) @[beh_lib.scala 118:28] + node _T_3 = eq(_T_2, UInt<16>("h0f004")) @[beh_lib.scala 118:43] + io.in_range <= _T_3 @[beh_lib.scala 118:17] + + module rvrangecheck_2 : + input clock : Clock + input reset : Reset + output io : {flip addr : UInt<32>, in_range : UInt<1>, in_region : UInt<1>} + + node _T = bits(io.addr, 31, 28) @[beh_lib.scala 114:28] + node _T_1 = eq(_T, UInt<4>("h0f")) @[beh_lib.scala 114:50] + io.in_region <= _T_1 @[beh_lib.scala 114:17] + node _T_2 = bits(io.addr, 31, 15) @[beh_lib.scala 118:28] + node _T_3 = eq(_T_2, UInt<17>("h01e018")) @[beh_lib.scala 118:43] + io.in_range <= _T_3 @[beh_lib.scala 118:17] + + module rvrangecheck_3 : + input clock : Clock + input reset : Reset + output io : {flip addr : UInt<32>, in_range : UInt<1>, in_region : UInt<1>} + + node _T = bits(io.addr, 31, 28) @[beh_lib.scala 114:28] + node _T_1 = eq(_T, UInt<4>("h0f")) @[beh_lib.scala 114:50] + io.in_region <= _T_1 @[beh_lib.scala 114:17] + node _T_2 = bits(io.addr, 31, 15) @[beh_lib.scala 118:28] + node _T_3 = eq(_T_2, UInt<17>("h01e018")) @[beh_lib.scala 118:43] + io.in_range <= _T_3 @[beh_lib.scala 118:17] + + module el2_lsu_addrcheck : + input clock : Clock + input reset : AsyncReset + output io : {flip lsu_c2_m_clk : Clock, flip start_addr_d : UInt<32>, flip end_addr_d : UInt<32>, flip lsu_pkt_d : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip dec_tlu_mrac_ff : UInt<32>, flip rs1_region_d : UInt<4>, flip rs1_d : UInt<32>, is_sideeffects_m : UInt<1>, addr_in_dccm_d : UInt<1>, addr_in_pic_d : UInt<1>, addr_external_d : UInt<1>, access_fault_d : UInt<1>, misaligned_fault_d : UInt<1>, exc_mscause_d : UInt<4>, fir_dccm_access_error_d : UInt<1>, fir_nondccm_access_error_d : UInt<1>, flip scan_mode : UInt<1>} + + wire start_addr_in_dccm_d : UInt<1> + start_addr_in_dccm_d <= UInt<1>("h00") + wire start_addr_in_dccm_region_d : UInt<1> + start_addr_in_dccm_region_d <= UInt<1>("h00") + wire end_addr_in_dccm_d : UInt<1> + end_addr_in_dccm_d <= UInt<1>("h00") + wire end_addr_in_dccm_region_d : UInt<1> + end_addr_in_dccm_region_d <= UInt<1>("h00") + inst rvrangecheck of rvrangecheck @[el2_lsu_addrcheck.scala 45:44] + rvrangecheck.clock <= clock + rvrangecheck.reset <= reset + rvrangecheck.io.addr <= io.start_addr_d @[el2_lsu_addrcheck.scala 46:41] + start_addr_in_dccm_d <= rvrangecheck.io.in_range @[el2_lsu_addrcheck.scala 47:41] + start_addr_in_dccm_region_d <= rvrangecheck.io.in_region @[el2_lsu_addrcheck.scala 48:41] + inst rvrangecheck_1 of rvrangecheck_1 @[el2_lsu_addrcheck.scala 51:44] + rvrangecheck_1.clock <= clock + rvrangecheck_1.reset <= reset + rvrangecheck_1.io.addr <= io.end_addr_d @[el2_lsu_addrcheck.scala 52:41] + end_addr_in_dccm_d <= rvrangecheck_1.io.in_range @[el2_lsu_addrcheck.scala 53:41] + end_addr_in_dccm_region_d <= rvrangecheck_1.io.in_region @[el2_lsu_addrcheck.scala 54:41] + wire addr_in_iccm : UInt<1> + addr_in_iccm <= UInt<1>("h00") + node _T = bits(io.start_addr_d, 31, 28) @[el2_lsu_addrcheck.scala 65:37] + node _T_1 = eq(_T, UInt<4>("h0e")) @[el2_lsu_addrcheck.scala 65:45] + addr_in_iccm <= _T_1 @[el2_lsu_addrcheck.scala 65:18] + inst start_addr_pic_rangecheck of rvrangecheck_2 @[el2_lsu_addrcheck.scala 74:41] + start_addr_pic_rangecheck.clock <= clock + start_addr_pic_rangecheck.reset <= reset + node _T_2 = bits(io.start_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 75:55] + start_addr_pic_rangecheck.io.addr <= _T_2 @[el2_lsu_addrcheck.scala 75:37] + inst end_addr_pic_rangecheck of rvrangecheck_3 @[el2_lsu_addrcheck.scala 80:39] + end_addr_pic_rangecheck.clock <= clock + end_addr_pic_rangecheck.reset <= reset + node _T_3 = bits(io.end_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 81:51] + end_addr_pic_rangecheck.io.addr <= _T_3 @[el2_lsu_addrcheck.scala 81:35] + node start_addr_dccm_or_pic = or(start_addr_in_dccm_region_d, start_addr_pic_rangecheck.io.in_region) @[el2_lsu_addrcheck.scala 85:60] + node _T_4 = bits(io.rs1_region_d, 3, 0) @[el2_lsu_addrcheck.scala 86:48] + node _T_5 = eq(_T_4, UInt<4>("h0f")) @[el2_lsu_addrcheck.scala 86:54] + node _T_6 = bits(io.rs1_region_d, 3, 0) @[el2_lsu_addrcheck.scala 86:92] + node _T_7 = eq(_T_6, UInt<4>("h0f")) @[el2_lsu_addrcheck.scala 86:98] + node base_reg_dccm_or_pic = or(_T_5, _T_7) @[el2_lsu_addrcheck.scala 86:74] + node _T_8 = and(start_addr_in_dccm_d, end_addr_in_dccm_d) @[el2_lsu_addrcheck.scala 87:57] + io.addr_in_dccm_d <= _T_8 @[el2_lsu_addrcheck.scala 87:32] + node _T_9 = and(start_addr_pic_rangecheck.io.in_range, end_addr_pic_rangecheck.io.in_range) @[el2_lsu_addrcheck.scala 88:56] + io.addr_in_pic_d <= _T_9 @[el2_lsu_addrcheck.scala 88:32] + node _T_10 = or(start_addr_in_dccm_region_d, start_addr_pic_rangecheck.io.in_region) @[el2_lsu_addrcheck.scala 90:63] + node _T_11 = not(_T_10) @[el2_lsu_addrcheck.scala 90:33] + io.addr_external_d <= _T_11 @[el2_lsu_addrcheck.scala 90:30] + node _T_12 = bits(io.start_addr_d, 31, 28) @[el2_lsu_addrcheck.scala 91:51] + node csr_idx = cat(_T_12, UInt<1>("h01")) @[Cat.scala 29:58] + node _T_13 = dshr(io.dec_tlu_mrac_ff, csr_idx) @[el2_lsu_addrcheck.scala 92:50] + node _T_14 = bits(_T_13, 0, 0) @[el2_lsu_addrcheck.scala 92:50] + node _T_15 = or(start_addr_in_dccm_region_d, start_addr_pic_rangecheck.io.in_region) @[el2_lsu_addrcheck.scala 92:92] + node _T_16 = or(_T_15, addr_in_iccm) @[el2_lsu_addrcheck.scala 92:121] + node _T_17 = not(_T_16) @[el2_lsu_addrcheck.scala 92:62] + node _T_18 = and(_T_14, _T_17) @[el2_lsu_addrcheck.scala 92:60] + node _T_19 = and(_T_18, io.lsu_pkt_d.valid) @[el2_lsu_addrcheck.scala 92:137] + node _T_20 = or(io.lsu_pkt_d.store, io.lsu_pkt_d.load) @[el2_lsu_addrcheck.scala 92:180] + node is_sideeffects_d = and(_T_19, _T_20) @[el2_lsu_addrcheck.scala 92:158] + node _T_21 = bits(io.start_addr_d, 1, 0) @[el2_lsu_addrcheck.scala 93:69] + node _T_22 = eq(_T_21, UInt<1>("h00")) @[el2_lsu_addrcheck.scala 93:75] + node _T_23 = and(io.lsu_pkt_d.word, _T_22) @[el2_lsu_addrcheck.scala 93:51] + node _T_24 = bits(io.start_addr_d, 0, 0) @[el2_lsu_addrcheck.scala 93:124] + node _T_25 = eq(_T_24, UInt<1>("h00")) @[el2_lsu_addrcheck.scala 93:128] + node _T_26 = and(io.lsu_pkt_d.half, _T_25) @[el2_lsu_addrcheck.scala 93:106] + node _T_27 = or(_T_23, _T_26) @[el2_lsu_addrcheck.scala 93:85] + node is_aligned_d = or(_T_27, io.lsu_pkt_d.by) @[el2_lsu_addrcheck.scala 93:138] + node _T_28 = cat(UInt<1>("h00"), UInt<1>("h00")) @[Cat.scala 29:58] + node _T_29 = cat(UInt<1>("h00"), UInt<1>("h00")) @[Cat.scala 29:58] + node _T_30 = cat(_T_29, _T_28) @[Cat.scala 29:58] + node _T_31 = cat(UInt<1>("h01"), UInt<1>("h01")) @[Cat.scala 29:58] + node _T_32 = cat(UInt<1>("h01"), UInt<1>("h01")) @[Cat.scala 29:58] + node _T_33 = cat(_T_32, _T_31) @[Cat.scala 29:58] + node _T_34 = cat(_T_33, _T_30) @[Cat.scala 29:58] + node _T_35 = orr(_T_34) @[el2_lsu_addrcheck.scala 97:99] + node _T_36 = not(_T_35) @[el2_lsu_addrcheck.scala 96:33] + node _T_37 = bits(io.start_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 98:50] + node _T_38 = or(_T_37, UInt<32>("h07fffffff")) @[el2_lsu_addrcheck.scala 98:57] + node _T_39 = or(UInt<32>("h00"), UInt<32>("h07fffffff")) @[el2_lsu_addrcheck.scala 98:108] + node _T_40 = eq(_T_38, _T_39) @[el2_lsu_addrcheck.scala 98:82] + node _T_41 = and(UInt<1>("h01"), _T_40) @[el2_lsu_addrcheck.scala 98:31] + node _T_42 = bits(io.start_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 99:50] + node _T_43 = or(_T_42, UInt<32>("h03fffffff")) @[el2_lsu_addrcheck.scala 99:57] + node _T_44 = or(UInt<32>("h0c0000000"), UInt<32>("h03fffffff")) @[el2_lsu_addrcheck.scala 99:108] + node _T_45 = eq(_T_43, _T_44) @[el2_lsu_addrcheck.scala 99:82] + node _T_46 = and(UInt<1>("h01"), _T_45) @[el2_lsu_addrcheck.scala 99:31] + node _T_47 = or(_T_41, _T_46) @[el2_lsu_addrcheck.scala 98:133] + node _T_48 = bits(io.start_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 100:50] + node _T_49 = or(_T_48, UInt<32>("h01fffffff")) @[el2_lsu_addrcheck.scala 100:57] + node _T_50 = or(UInt<32>("h0a0000000"), UInt<32>("h01fffffff")) @[el2_lsu_addrcheck.scala 100:108] + node _T_51 = eq(_T_49, _T_50) @[el2_lsu_addrcheck.scala 100:82] + node _T_52 = and(UInt<1>("h01"), _T_51) @[el2_lsu_addrcheck.scala 100:31] + node _T_53 = or(_T_47, _T_52) @[el2_lsu_addrcheck.scala 99:133] + node _T_54 = bits(io.start_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 101:50] + node _T_55 = or(_T_54, UInt<32>("h0fffffff")) @[el2_lsu_addrcheck.scala 101:57] + node _T_56 = or(UInt<32>("h080000000"), UInt<32>("h0fffffff")) @[el2_lsu_addrcheck.scala 101:108] + node _T_57 = eq(_T_55, _T_56) @[el2_lsu_addrcheck.scala 101:82] + node _T_58 = and(UInt<1>("h01"), _T_57) @[el2_lsu_addrcheck.scala 101:31] + node _T_59 = or(_T_53, _T_58) @[el2_lsu_addrcheck.scala 100:133] + node _T_60 = bits(io.start_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 102:50] + node _T_61 = or(_T_60, UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 102:57] + node _T_62 = or(UInt<32>("h00"), UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 102:108] + node _T_63 = eq(_T_61, _T_62) @[el2_lsu_addrcheck.scala 102:82] + node _T_64 = and(UInt<1>("h00"), _T_63) @[el2_lsu_addrcheck.scala 102:31] + node _T_65 = or(_T_59, _T_64) @[el2_lsu_addrcheck.scala 101:133] + node _T_66 = bits(io.start_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 103:50] + node _T_67 = or(_T_66, UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 103:57] + node _T_68 = or(UInt<32>("h00"), UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 103:108] + node _T_69 = eq(_T_67, _T_68) @[el2_lsu_addrcheck.scala 103:82] + node _T_70 = and(UInt<1>("h00"), _T_69) @[el2_lsu_addrcheck.scala 103:31] + node _T_71 = or(_T_65, _T_70) @[el2_lsu_addrcheck.scala 102:133] + node _T_72 = bits(io.start_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 104:50] + node _T_73 = or(_T_72, UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 104:57] + node _T_74 = or(UInt<32>("h00"), UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 104:108] + node _T_75 = eq(_T_73, _T_74) @[el2_lsu_addrcheck.scala 104:82] + node _T_76 = and(UInt<1>("h00"), _T_75) @[el2_lsu_addrcheck.scala 104:31] + node _T_77 = or(_T_71, _T_76) @[el2_lsu_addrcheck.scala 103:133] + node _T_78 = bits(io.start_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 105:50] + node _T_79 = or(_T_78, UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 105:57] + node _T_80 = or(UInt<32>("h00"), UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 105:108] + node _T_81 = eq(_T_79, _T_80) @[el2_lsu_addrcheck.scala 105:82] + node _T_82 = and(UInt<1>("h00"), _T_81) @[el2_lsu_addrcheck.scala 105:31] + node _T_83 = or(_T_77, _T_82) @[el2_lsu_addrcheck.scala 104:133] + node _T_84 = bits(io.end_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 107:49] + node _T_85 = or(_T_84, UInt<32>("h07fffffff")) @[el2_lsu_addrcheck.scala 107:58] + node _T_86 = or(UInt<32>("h00"), UInt<32>("h07fffffff")) @[el2_lsu_addrcheck.scala 107:109] + node _T_87 = eq(_T_85, _T_86) @[el2_lsu_addrcheck.scala 107:83] + node _T_88 = and(UInt<1>("h01"), _T_87) @[el2_lsu_addrcheck.scala 107:32] + node _T_89 = bits(io.end_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 108:50] + node _T_90 = or(_T_89, UInt<32>("h03fffffff")) @[el2_lsu_addrcheck.scala 108:59] + node _T_91 = or(UInt<32>("h0c0000000"), UInt<32>("h03fffffff")) @[el2_lsu_addrcheck.scala 108:110] + node _T_92 = eq(_T_90, _T_91) @[el2_lsu_addrcheck.scala 108:84] + node _T_93 = and(UInt<1>("h01"), _T_92) @[el2_lsu_addrcheck.scala 108:33] + node _T_94 = or(_T_88, _T_93) @[el2_lsu_addrcheck.scala 107:134] + node _T_95 = bits(io.end_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 109:50] + node _T_96 = or(_T_95, UInt<32>("h01fffffff")) @[el2_lsu_addrcheck.scala 109:59] + node _T_97 = or(UInt<32>("h0a0000000"), UInt<32>("h01fffffff")) @[el2_lsu_addrcheck.scala 109:110] + node _T_98 = eq(_T_96, _T_97) @[el2_lsu_addrcheck.scala 109:84] + node _T_99 = and(UInt<1>("h01"), _T_98) @[el2_lsu_addrcheck.scala 109:33] + node _T_100 = or(_T_94, _T_99) @[el2_lsu_addrcheck.scala 108:135] + node _T_101 = bits(io.end_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 110:50] + node _T_102 = or(_T_101, UInt<32>("h0fffffff")) @[el2_lsu_addrcheck.scala 110:59] + node _T_103 = or(UInt<32>("h080000000"), UInt<32>("h0fffffff")) @[el2_lsu_addrcheck.scala 110:110] + node _T_104 = eq(_T_102, _T_103) @[el2_lsu_addrcheck.scala 110:84] + node _T_105 = and(UInt<1>("h01"), _T_104) @[el2_lsu_addrcheck.scala 110:33] + node _T_106 = or(_T_100, _T_105) @[el2_lsu_addrcheck.scala 109:135] + node _T_107 = bits(io.end_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 111:50] + node _T_108 = or(_T_107, UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 111:59] + node _T_109 = or(UInt<32>("h00"), UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 111:110] + node _T_110 = eq(_T_108, _T_109) @[el2_lsu_addrcheck.scala 111:84] + node _T_111 = and(UInt<1>("h00"), _T_110) @[el2_lsu_addrcheck.scala 111:33] + node _T_112 = or(_T_106, _T_111) @[el2_lsu_addrcheck.scala 110:135] + node _T_113 = bits(io.end_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 112:50] + node _T_114 = or(_T_113, UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 112:59] + node _T_115 = or(UInt<32>("h00"), UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 112:110] + node _T_116 = eq(_T_114, _T_115) @[el2_lsu_addrcheck.scala 112:84] + node _T_117 = and(UInt<1>("h00"), _T_116) @[el2_lsu_addrcheck.scala 112:33] + node _T_118 = or(_T_112, _T_117) @[el2_lsu_addrcheck.scala 111:135] + node _T_119 = bits(io.end_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 113:50] + node _T_120 = or(_T_119, UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 113:59] + node _T_121 = or(UInt<32>("h00"), UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 113:110] + node _T_122 = eq(_T_120, _T_121) @[el2_lsu_addrcheck.scala 113:84] + node _T_123 = and(UInt<1>("h00"), _T_122) @[el2_lsu_addrcheck.scala 113:33] + node _T_124 = or(_T_118, _T_123) @[el2_lsu_addrcheck.scala 112:135] + node _T_125 = bits(io.end_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 114:50] + node _T_126 = or(_T_125, UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 114:59] + node _T_127 = or(UInt<32>("h00"), UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 114:110] + node _T_128 = eq(_T_126, _T_127) @[el2_lsu_addrcheck.scala 114:84] + node _T_129 = and(UInt<1>("h00"), _T_128) @[el2_lsu_addrcheck.scala 114:33] + node _T_130 = or(_T_124, _T_129) @[el2_lsu_addrcheck.scala 113:135] + node _T_131 = and(_T_83, _T_130) @[el2_lsu_addrcheck.scala 106:7] + node non_dccm_access_ok = or(_T_36, _T_131) @[el2_lsu_addrcheck.scala 97:104] + node regpred_access_fault_d = xor(start_addr_dccm_or_pic, base_reg_dccm_or_pic) @[el2_lsu_addrcheck.scala 116:57] + node _T_132 = bits(io.start_addr_d, 1, 0) @[el2_lsu_addrcheck.scala 117:70] + node _T_133 = neq(_T_132, UInt<2>("h00")) @[el2_lsu_addrcheck.scala 117:76] + node _T_134 = not(io.lsu_pkt_d.word) @[el2_lsu_addrcheck.scala 117:92] + node _T_135 = or(_T_133, _T_134) @[el2_lsu_addrcheck.scala 117:90] + node picm_access_fault_d = and(io.addr_in_pic_d, _T_135) @[el2_lsu_addrcheck.scala 117:51] + wire unmapped_access_fault_d : UInt<1> + unmapped_access_fault_d <= UInt<1>("h01") + wire mpu_access_fault_d : UInt<1> + mpu_access_fault_d <= UInt<1>("h01") + node _T_136 = or(start_addr_in_dccm_d, start_addr_pic_rangecheck.io.in_range) @[el2_lsu_addrcheck.scala 122:87] + node _T_137 = not(_T_136) @[el2_lsu_addrcheck.scala 122:64] + node _T_138 = and(start_addr_in_dccm_region_d, _T_137) @[el2_lsu_addrcheck.scala 122:62] + node _T_139 = or(end_addr_in_dccm_d, end_addr_pic_rangecheck.io.in_range) @[el2_lsu_addrcheck.scala 124:57] + node _T_140 = not(_T_139) @[el2_lsu_addrcheck.scala 124:36] + node _T_141 = and(end_addr_in_dccm_region_d, _T_140) @[el2_lsu_addrcheck.scala 124:34] + node _T_142 = or(_T_138, _T_141) @[el2_lsu_addrcheck.scala 122:112] + node _T_143 = and(start_addr_in_dccm_d, end_addr_pic_rangecheck.io.in_range) @[el2_lsu_addrcheck.scala 126:29] + node _T_144 = or(_T_142, _T_143) @[el2_lsu_addrcheck.scala 124:85] + node _T_145 = and(start_addr_pic_rangecheck.io.in_range, end_addr_in_dccm_d) @[el2_lsu_addrcheck.scala 128:29] + node _T_146 = or(_T_144, _T_145) @[el2_lsu_addrcheck.scala 126:85] + unmapped_access_fault_d <= _T_146 @[el2_lsu_addrcheck.scala 122:29] + node _T_147 = not(start_addr_in_dccm_region_d) @[el2_lsu_addrcheck.scala 130:33] + node _T_148 = not(non_dccm_access_ok) @[el2_lsu_addrcheck.scala 130:64] + node _T_149 = and(_T_147, _T_148) @[el2_lsu_addrcheck.scala 130:62] + mpu_access_fault_d <= _T_149 @[el2_lsu_addrcheck.scala 130:29] + node _T_150 = or(unmapped_access_fault_d, mpu_access_fault_d) @[el2_lsu_addrcheck.scala 142:49] + node _T_151 = or(_T_150, picm_access_fault_d) @[el2_lsu_addrcheck.scala 142:70] + node _T_152 = or(_T_151, regpred_access_fault_d) @[el2_lsu_addrcheck.scala 142:92] + node _T_153 = and(_T_152, io.lsu_pkt_d.valid) @[el2_lsu_addrcheck.scala 142:118] + node _T_154 = not(io.lsu_pkt_d.dma) @[el2_lsu_addrcheck.scala 142:141] + node _T_155 = and(_T_153, _T_154) @[el2_lsu_addrcheck.scala 142:139] + io.access_fault_d <= _T_155 @[el2_lsu_addrcheck.scala 142:21] + node _T_156 = bits(unmapped_access_fault_d, 0, 0) @[el2_lsu_addrcheck.scala 143:60] + node _T_157 = bits(mpu_access_fault_d, 0, 0) @[el2_lsu_addrcheck.scala 143:100] + node _T_158 = bits(regpred_access_fault_d, 0, 0) @[el2_lsu_addrcheck.scala 143:144] + node _T_159 = bits(picm_access_fault_d, 0, 0) @[el2_lsu_addrcheck.scala 143:185] + node _T_160 = mux(_T_159, UInt<4>("h06"), UInt<4>("h00")) @[el2_lsu_addrcheck.scala 143:164] + node _T_161 = mux(_T_158, UInt<4>("h05"), _T_160) @[el2_lsu_addrcheck.scala 143:120] + node _T_162 = mux(_T_157, UInt<4>("h03"), _T_161) @[el2_lsu_addrcheck.scala 143:80] + node access_fault_mscause_d = mux(_T_156, UInt<4>("h02"), _T_162) @[el2_lsu_addrcheck.scala 143:35] + node _T_163 = bits(io.start_addr_d, 31, 28) @[el2_lsu_addrcheck.scala 144:53] + node _T_164 = bits(io.end_addr_d, 31, 28) @[el2_lsu_addrcheck.scala 144:78] + node regcross_misaligned_fault_d = neq(_T_163, _T_164) @[el2_lsu_addrcheck.scala 144:61] + node _T_165 = not(is_aligned_d) @[el2_lsu_addrcheck.scala 145:59] + node sideeffect_misaligned_fault_d = and(is_sideeffects_d, _T_165) @[el2_lsu_addrcheck.scala 145:57] + node _T_166 = and(sideeffect_misaligned_fault_d, io.addr_external_d) @[el2_lsu_addrcheck.scala 146:90] + node _T_167 = or(regcross_misaligned_fault_d, _T_166) @[el2_lsu_addrcheck.scala 146:57] + node _T_168 = and(_T_167, io.lsu_pkt_d.valid) @[el2_lsu_addrcheck.scala 146:113] + node _T_169 = not(io.lsu_pkt_d.dma) @[el2_lsu_addrcheck.scala 146:136] + node _T_170 = and(_T_168, _T_169) @[el2_lsu_addrcheck.scala 146:134] + io.misaligned_fault_d <= _T_170 @[el2_lsu_addrcheck.scala 146:25] + node _T_171 = bits(sideeffect_misaligned_fault_d, 0, 0) @[el2_lsu_addrcheck.scala 147:111] + node _T_172 = mux(_T_171, UInt<4>("h01"), UInt<4>("h00")) @[el2_lsu_addrcheck.scala 147:80] + node misaligned_fault_mscause_d = mux(regcross_misaligned_fault_d, UInt<4>("h02"), _T_172) @[el2_lsu_addrcheck.scala 147:39] + node _T_173 = bits(io.misaligned_fault_d, 0, 0) @[el2_lsu_addrcheck.scala 148:50] + node _T_174 = bits(misaligned_fault_mscause_d, 3, 0) @[el2_lsu_addrcheck.scala 148:84] + node _T_175 = bits(access_fault_mscause_d, 3, 0) @[el2_lsu_addrcheck.scala 148:113] + node _T_176 = mux(_T_173, _T_174, _T_175) @[el2_lsu_addrcheck.scala 148:27] + io.exc_mscause_d <= _T_176 @[el2_lsu_addrcheck.scala 148:21] + node _T_177 = not(start_addr_in_dccm_d) @[el2_lsu_addrcheck.scala 149:66] + node _T_178 = and(start_addr_in_dccm_region_d, _T_177) @[el2_lsu_addrcheck.scala 149:64] + node _T_179 = not(end_addr_in_dccm_d) @[el2_lsu_addrcheck.scala 149:120] + node _T_180 = and(end_addr_in_dccm_region_d, _T_179) @[el2_lsu_addrcheck.scala 149:118] + node _T_181 = or(_T_178, _T_180) @[el2_lsu_addrcheck.scala 149:88] + node _T_182 = and(_T_181, io.lsu_pkt_d.valid) @[el2_lsu_addrcheck.scala 149:142] + node _T_183 = and(_T_182, io.lsu_pkt_d.fast_int) @[el2_lsu_addrcheck.scala 149:163] + io.fir_dccm_access_error_d <= _T_183 @[el2_lsu_addrcheck.scala 149:31] + node _T_184 = and(start_addr_in_dccm_region_d, end_addr_in_dccm_region_d) @[el2_lsu_addrcheck.scala 150:66] + node _T_185 = not(_T_184) @[el2_lsu_addrcheck.scala 150:36] + node _T_186 = and(_T_185, io.lsu_pkt_d.valid) @[el2_lsu_addrcheck.scala 150:95] + node _T_187 = and(_T_186, io.lsu_pkt_d.fast_int) @[el2_lsu_addrcheck.scala 150:116] + io.fir_nondccm_access_error_d <= _T_187 @[el2_lsu_addrcheck.scala 150:33] + reg _T_188 : UInt, io.lsu_c2_m_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_addrcheck.scala 152:60] + _T_188 <= is_sideeffects_d @[el2_lsu_addrcheck.scala 152:60] + io.is_sideeffects_m <= _T_188 @[el2_lsu_addrcheck.scala 152:50] + + module rvdff : + input clock : Clock + input reset : Reset + output io : {flip din : UInt<1>, dout : UInt<1>} + + reg flop : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[beh_lib.scala 15:21] + flop <= io.din @[beh_lib.scala 15:21] + io.dout <= flop @[beh_lib.scala 20:12] + + module rvdff_1 : + input clock : Clock + input reset : Reset + output io : {flip din : UInt<1>, dout : UInt<1>} + + reg flop : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[beh_lib.scala 15:21] + flop <= io.din @[beh_lib.scala 15:21] + io.dout <= flop @[beh_lib.scala 20:12] + + module rvdff_2 : + input clock : Clock + input reset : Reset + output io : {flip din : UInt<4>, dout : UInt<4>} + + reg flop : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[beh_lib.scala 15:21] + flop <= io.din @[beh_lib.scala 15:21] + io.dout <= flop @[beh_lib.scala 20:12] + + module rvdff_3 : + input clock : Clock + input reset : Reset + output io : {flip din : UInt<2>, dout : UInt<2>} + + reg flop : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[beh_lib.scala 15:21] + flop <= io.din @[beh_lib.scala 15:21] + io.dout <= flop @[beh_lib.scala 20:12] + + module rvdff_4 : + input clock : Clock + input reset : Reset + output io : {flip din : UInt<1>, dout : UInt<1>} + + reg flop : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[beh_lib.scala 15:21] + flop <= io.din @[beh_lib.scala 15:21] + io.dout <= flop @[beh_lib.scala 20:12] + + module rvdff_5 : + input clock : Clock + input reset : Reset + output io : {flip din : UInt<1>, dout : UInt<1>} + + reg flop : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[beh_lib.scala 15:21] + flop <= io.din @[beh_lib.scala 15:21] + io.dout <= flop @[beh_lib.scala 20:12] + + module rvdff_6 : + input clock : Clock + input reset : Reset + output io : {flip din : UInt<32>, dout : UInt<32>} + + reg flop : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[beh_lib.scala 15:21] + flop <= io.din @[beh_lib.scala 15:21] + io.dout <= flop @[beh_lib.scala 20:12] + + module rvdff_7 : + input clock : Clock + input reset : Reset + output io : {flip din : UInt<32>, dout : UInt<32>} + + reg flop : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[beh_lib.scala 15:21] + flop <= io.din @[beh_lib.scala 15:21] + io.dout <= flop @[beh_lib.scala 20:12] + + module rvdff_8 : + input clock : Clock + input reset : Reset + output io : {flip din : UInt<32>, dout : UInt<32>} + + reg flop : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[beh_lib.scala 15:21] + flop <= io.din @[beh_lib.scala 15:21] + io.dout <= flop @[beh_lib.scala 20:12] + + module rvdff_9 : + input clock : Clock + input reset : Reset + output io : {flip din : UInt<32>, dout : UInt<32>} + + reg flop : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[beh_lib.scala 15:21] + flop <= io.din @[beh_lib.scala 15:21] + io.dout <= flop @[beh_lib.scala 20:12] + + module rvdff_10 : + input clock : Clock + input reset : Reset + output io : {flip din : UInt<32>, dout : UInt<32>} + + reg flop : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[beh_lib.scala 15:21] + flop <= io.din @[beh_lib.scala 15:21] + io.dout <= flop @[beh_lib.scala 20:12] + + module rvdff_11 : + input clock : Clock + input reset : Reset + output io : {flip din : UInt<1>, dout : UInt<1>} + + reg flop : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[beh_lib.scala 15:21] + flop <= io.din @[beh_lib.scala 15:21] + io.dout <= flop @[beh_lib.scala 20:12] + + module rvdff_12 : + input clock : Clock + input reset : Reset + output io : {flip din : UInt<1>, dout : UInt<1>} + + reg flop : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[beh_lib.scala 15:21] + flop <= io.din @[beh_lib.scala 15:21] + io.dout <= flop @[beh_lib.scala 20:12] + + module rvdff_13 : + input clock : Clock + input reset : Reset + output io : {flip din : UInt<1>, dout : UInt<1>} + + reg flop : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[beh_lib.scala 15:21] + flop <= io.din @[beh_lib.scala 15:21] + io.dout <= flop @[beh_lib.scala 20:12] + + module rvdff_14 : + input clock : Clock + input reset : Reset + output io : {flip din : UInt<1>, dout : UInt<1>} + + reg flop : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[beh_lib.scala 15:21] + flop <= io.din @[beh_lib.scala 15:21] + io.dout <= flop @[beh_lib.scala 20:12] + + module rvdff_15 : + input clock : Clock + input reset : Reset + output io : {flip din : UInt<1>, dout : UInt<1>} + + reg flop : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[beh_lib.scala 15:21] + flop <= io.din @[beh_lib.scala 15:21] + io.dout <= flop @[beh_lib.scala 20:12] + + module rvdff_16 : + input clock : Clock + input reset : Reset + output io : {flip din : UInt<1>, dout : UInt<1>} + + reg flop : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[beh_lib.scala 15:21] + flop <= io.din @[beh_lib.scala 15:21] + io.dout <= flop @[beh_lib.scala 20:12] + + module rvdff_17 : + input clock : Clock + input reset : Reset + output io : {flip din : UInt<32>, dout : UInt<32>} + + reg flop : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[beh_lib.scala 15:21] + flop <= io.din @[beh_lib.scala 15:21] + io.dout <= flop @[beh_lib.scala 20:12] + + module el2_lsu_lsc_ctl : + input clock : Clock + input reset : AsyncReset + output io : {flip lsu_c1_m_clk : Clock, flip lsu_c1_r_clk : Clock, flip lsu_c2_m_clk : Clock, flip lsu_c2_r_clk : Clock, flip lsu_store_c1_m_clk : Clock, flip lsu_ld_data_r : UInt<32>, flip lsu_ld_data_corr_r : UInt<32>, flip lsu_single_ecc_error_r : UInt<1>, flip lsu_double_ecc_error_r : UInt<1>, flip lsu_ld_data_m : UInt<32>, flip lsu_single_ecc_error_m : UInt<1>, flip lsu_double_ecc_error_m : UInt<1>, flip flush_m_up : UInt<1>, flip flush_r : UInt<1>, flip exu_lsu_rs1_d : UInt<32>, flip exu_lsu_rs2_d : UInt<32>, flip lsu_p : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip dec_lsu_valid_raw_d : UInt<1>, flip dec_lsu_offset_d : UInt<12>, flip picm_mask_data_m : UInt<32>, flip bus_read_data_m : UInt<32>, lsu_result_m : UInt<32>, lsu_result_corr_r : UInt<32>, lsu_addr_d : UInt<32>, lsu_addr_m : UInt<32>, lsu_addr_r : UInt<32>, end_addr_d : UInt<32>, end_addr_m : UInt<32>, end_addr_r : UInt<32>, store_data_m : UInt<32>, flip dec_tlu_mrac_ff : UInt<32>, lsu_exc_m : UInt<1>, is_sideeffects_m : UInt<1>, lsu_commit_r : UInt<1>, lsu_single_ecc_error_incr : UInt<1>, lsu_error_pkt_r : {exc_valid : UInt<1>, single_ecc_error : UInt<1>, inst_type : UInt<1>, exc_type : UInt<1>, mscause : UInt<4>, addr : UInt<32>}, lsu_fir_addr : UInt<32>, lsu_fir_error : UInt<2>, addr_in_dccm_d : UInt<1>, addr_in_dccm_m : UInt<1>, addr_in_dccm_r : UInt<1>, addr_in_pic_d : UInt<1>, addr_in_pic_m : UInt<1>, addr_in_pic_r : UInt<1>, addr_external_m : UInt<1>, flip dma_dccm_req : UInt<1>, flip dma_mem_addr : UInt<32>, flip dma_mem_sz : UInt<3>, flip dma_mem_write : UInt<1>, flip dma_mem_wdata : UInt<64>, lsu_pkt_d : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, lsu_pkt_m : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, lsu_pkt_r : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip scan_mode : UInt<1>} + + wire dma_pkt_d : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>} @[el2_lsu_lsc_ctl.scala 103:29] + wire lsu_pkt_m_in : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>} @[el2_lsu_lsc_ctl.scala 104:29] + wire lsu_pkt_r_in : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>} @[el2_lsu_lsc_ctl.scala 105:29] + wire lsu_error_pkt_m : {exc_valid : UInt<1>, single_ecc_error : UInt<1>, inst_type : UInt<1>, exc_type : UInt<1>, mscause : UInt<4>, addr : UInt<32>} @[el2_lsu_lsc_ctl.scala 106:29] + node _T = bits(io.dec_lsu_valid_raw_d, 0, 0) @[el2_lsu_lsc_ctl.scala 108:52] + node lsu_rs1_d = mux(_T, io.exu_lsu_rs1_d, io.dma_mem_addr) @[el2_lsu_lsc_ctl.scala 108:28] + node _T_1 = bits(io.dec_lsu_offset_d, 11, 0) @[el2_lsu_lsc_ctl.scala 109:44] + node _T_2 = bits(io.dec_lsu_valid_raw_d, 0, 0) @[Bitwise.scala 72:15] + node _T_3 = mux(_T_2, UInt<12>("h0fff"), UInt<12>("h00")) @[Bitwise.scala 72:12] + node lsu_offset_d = and(_T_1, _T_3) @[el2_lsu_lsc_ctl.scala 109:51] + node _T_4 = bits(io.lsu_pkt_d.load_ldst_bypass_d, 0, 0) @[el2_lsu_lsc_ctl.scala 114:51] + node rs1_d = mux(_T_4, io.lsu_result_m, lsu_rs1_d) @[el2_lsu_lsc_ctl.scala 114:18] + inst lsadder of rvlsadder @[el2_lsu_lsc_ctl.scala 118:23] + lsadder.clock <= clock + lsadder.reset <= reset + lsadder.io.rs1 <= rs1_d @[el2_lsu_lsc_ctl.scala 119:26] + lsadder.io.offset <= lsu_offset_d @[el2_lsu_lsc_ctl.scala 120:26] + node _T_5 = bits(io.lsu_pkt_d.half, 0, 0) @[Bitwise.scala 72:15] + node _T_6 = mux(_T_5, UInt<3>("h07"), UInt<3>("h00")) @[Bitwise.scala 72:12] + node _T_7 = and(_T_6, UInt<1>("h01")) @[el2_lsu_lsc_ctl.scala 127:53] + node _T_8 = bits(io.lsu_pkt_d.word, 0, 0) @[Bitwise.scala 72:15] + node _T_9 = mux(_T_8, UInt<3>("h07"), UInt<3>("h00")) @[Bitwise.scala 72:12] + node _T_10 = and(_T_9, UInt<2>("h03")) @[el2_lsu_lsc_ctl.scala 128:35] + node _T_11 = or(_T_7, _T_10) @[el2_lsu_lsc_ctl.scala 127:65] + node _T_12 = bits(io.lsu_pkt_d.dword, 0, 0) @[Bitwise.scala 72:15] + node _T_13 = mux(_T_12, UInt<3>("h07"), UInt<3>("h00")) @[Bitwise.scala 72:12] + node _T_14 = and(_T_13, UInt<3>("h07")) @[el2_lsu_lsc_ctl.scala 129:35] + node addr_offset_d = or(_T_11, _T_14) @[el2_lsu_lsc_ctl.scala 128:47] + node _T_15 = bits(lsu_offset_d, 11, 11) @[el2_lsu_lsc_ctl.scala 131:39] + node _T_16 = bits(lsu_offset_d, 11, 0) @[el2_lsu_lsc_ctl.scala 131:52] + node _T_17 = cat(_T_15, _T_16) @[Cat.scala 29:58] + node _T_18 = mux(UInt<1>("h00"), UInt<9>("h01ff"), UInt<9>("h00")) @[Bitwise.scala 72:12] + node _T_19 = bits(addr_offset_d, 2, 0) @[el2_lsu_lsc_ctl.scala 131:94] + node _T_20 = cat(_T_18, _T_19) @[Cat.scala 29:58] + node _T_21 = add(_T_17, _T_20) @[el2_lsu_lsc_ctl.scala 131:60] + node end_addr_offset_d = tail(_T_21, 1) @[el2_lsu_lsc_ctl.scala 131:60] + node _T_22 = bits(rs1_d, 31, 0) @[el2_lsu_lsc_ctl.scala 132:32] + node _T_23 = bits(end_addr_offset_d, 12, 12) @[el2_lsu_lsc_ctl.scala 132:70] + node _T_24 = bits(_T_23, 0, 0) @[Bitwise.scala 72:15] + node _T_25 = mux(_T_24, UInt<19>("h07ffff"), UInt<19>("h00")) @[Bitwise.scala 72:12] + node _T_26 = bits(end_addr_offset_d, 12, 0) @[el2_lsu_lsc_ctl.scala 132:93] + node _T_27 = cat(_T_25, _T_26) @[Cat.scala 29:58] + node _T_28 = add(_T_22, _T_27) @[el2_lsu_lsc_ctl.scala 132:39] + node full_end_addr_d = tail(_T_28, 1) @[el2_lsu_lsc_ctl.scala 132:39] + io.end_addr_d <= full_end_addr_d @[el2_lsu_lsc_ctl.scala 133:24] + inst addrcheck of el2_lsu_addrcheck @[el2_lsu_lsc_ctl.scala 141:25] + addrcheck.clock <= clock + addrcheck.reset <= reset + addrcheck.io.lsu_c2_m_clk <= io.lsu_c2_m_clk @[el2_lsu_lsc_ctl.scala 143:42] + addrcheck.io.start_addr_d <= lsadder.io.dout @[el2_lsu_lsc_ctl.scala 145:42] + addrcheck.io.end_addr_d <= full_end_addr_d @[el2_lsu_lsc_ctl.scala 146:42] + addrcheck.io.lsu_pkt_d.valid <= io.lsu_pkt_d.valid @[el2_lsu_lsc_ctl.scala 147:42] + addrcheck.io.lsu_pkt_d.store_data_bypass_m <= io.lsu_pkt_d.store_data_bypass_m @[el2_lsu_lsc_ctl.scala 147:42] + addrcheck.io.lsu_pkt_d.load_ldst_bypass_d <= io.lsu_pkt_d.load_ldst_bypass_d @[el2_lsu_lsc_ctl.scala 147:42] + addrcheck.io.lsu_pkt_d.store_data_bypass_d <= io.lsu_pkt_d.store_data_bypass_d @[el2_lsu_lsc_ctl.scala 147:42] + addrcheck.io.lsu_pkt_d.dma <= io.lsu_pkt_d.dma @[el2_lsu_lsc_ctl.scala 147:42] + addrcheck.io.lsu_pkt_d.unsign <= io.lsu_pkt_d.unsign @[el2_lsu_lsc_ctl.scala 147:42] + addrcheck.io.lsu_pkt_d.store <= io.lsu_pkt_d.store @[el2_lsu_lsc_ctl.scala 147:42] + addrcheck.io.lsu_pkt_d.load <= io.lsu_pkt_d.load @[el2_lsu_lsc_ctl.scala 147:42] + addrcheck.io.lsu_pkt_d.dword <= io.lsu_pkt_d.dword @[el2_lsu_lsc_ctl.scala 147:42] + addrcheck.io.lsu_pkt_d.word <= io.lsu_pkt_d.word @[el2_lsu_lsc_ctl.scala 147:42] + addrcheck.io.lsu_pkt_d.half <= io.lsu_pkt_d.half @[el2_lsu_lsc_ctl.scala 147:42] + addrcheck.io.lsu_pkt_d.by <= io.lsu_pkt_d.by @[el2_lsu_lsc_ctl.scala 147:42] + addrcheck.io.lsu_pkt_d.fast_int <= io.lsu_pkt_d.fast_int @[el2_lsu_lsc_ctl.scala 147:42] + addrcheck.io.dec_tlu_mrac_ff <= io.dec_tlu_mrac_ff @[el2_lsu_lsc_ctl.scala 148:42] + node _T_29 = bits(rs1_d, 31, 28) @[el2_lsu_lsc_ctl.scala 149:50] + addrcheck.io.rs1_region_d <= _T_29 @[el2_lsu_lsc_ctl.scala 149:42] + addrcheck.io.rs1_d <= rs1_d @[el2_lsu_lsc_ctl.scala 150:42] + io.is_sideeffects_m <= addrcheck.io.is_sideeffects_m @[el2_lsu_lsc_ctl.scala 151:42] + io.addr_in_dccm_d <= addrcheck.io.addr_in_dccm_d @[el2_lsu_lsc_ctl.scala 152:42] + io.addr_in_pic_d <= addrcheck.io.addr_in_pic_d @[el2_lsu_lsc_ctl.scala 153:42] + addrcheck.io.scan_mode <= io.scan_mode @[el2_lsu_lsc_ctl.scala 160:42] + wire access_fault_r : UInt<1> + access_fault_r <= UInt<1>("h00") + wire misaligned_fault_r : UInt<1> + misaligned_fault_r <= UInt<1>("h00") + wire exc_mscause_r : UInt<4> + exc_mscause_r <= UInt<4>("h00") + wire fir_dccm_access_error_r : UInt<1> + fir_dccm_access_error_r <= UInt<1>("h00") + wire fir_nondccm_access_error_r : UInt<1> + fir_nondccm_access_error_r <= UInt<1>("h00") + inst access_fault_mff of rvdff @[el2_lsu_lsc_ctl.scala 169:45] + access_fault_mff.clock <= clock + access_fault_mff.reset <= reset + inst misaligned_fault_mff of rvdff_1 @[el2_lsu_lsc_ctl.scala 171:45] + misaligned_fault_mff.clock <= clock + misaligned_fault_mff.reset <= reset + inst exc_mscause_mff of rvdff_2 @[el2_lsu_lsc_ctl.scala 173:45] + exc_mscause_mff.clock <= clock + exc_mscause_mff.reset <= reset + inst lsu_fir_error_rff of rvdff_3 @[el2_lsu_lsc_ctl.scala 177:45] + lsu_fir_error_rff.clock <= clock + lsu_fir_error_rff.reset <= reset + wire lsu_fir_error_m : UInt<2> + lsu_fir_error_m <= UInt<2>("h00") + wire access_fault_m : UInt<1> + access_fault_m <= UInt<1>("h00") + wire misaligned_fault_m : UInt<1> + misaligned_fault_m <= UInt<1>("h00") + wire exc_mscause_m : UInt<4> + exc_mscause_m <= UInt<4>("h00") + wire fir_dccm_access_error_m : UInt<1> + fir_dccm_access_error_m <= UInt<1>("h00") + wire fir_nondccm_access_error_m : UInt<1> + fir_nondccm_access_error_m <= UInt<1>("h00") + node _T_30 = or(access_fault_m, misaligned_fault_m) @[el2_lsu_lsc_ctl.scala 188:34] + io.lsu_exc_m <= _T_30 @[el2_lsu_lsc_ctl.scala 188:16] + node _T_31 = eq(io.lsu_double_ecc_error_r, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 189:64] + node _T_32 = and(io.lsu_single_ecc_error_r, _T_31) @[el2_lsu_lsc_ctl.scala 189:62] + node _T_33 = or(io.lsu_commit_r, io.lsu_pkt_r.dma) @[el2_lsu_lsc_ctl.scala 189:111] + node _T_34 = and(_T_32, _T_33) @[el2_lsu_lsc_ctl.scala 189:92] + node _T_35 = and(_T_34, io.lsu_pkt_r.valid) @[el2_lsu_lsc_ctl.scala 189:131] + io.lsu_single_ecc_error_incr <= _T_35 @[el2_lsu_lsc_ctl.scala 189:32] + io.lsu_fir_error <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 228:23] + node _T_36 = or(access_fault_m, misaligned_fault_m) @[el2_lsu_lsc_ctl.scala 230:50] + node _T_37 = or(_T_36, io.lsu_double_ecc_error_m) @[el2_lsu_lsc_ctl.scala 230:71] + node _T_38 = and(_T_37, io.lsu_pkt_m.valid) @[el2_lsu_lsc_ctl.scala 230:100] + node _T_39 = eq(io.lsu_pkt_m.dma, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 230:123] + node _T_40 = and(_T_38, _T_39) @[el2_lsu_lsc_ctl.scala 230:121] + node _T_41 = eq(io.lsu_pkt_m.fast_int, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 230:143] + node _T_42 = and(_T_40, _T_41) @[el2_lsu_lsc_ctl.scala 230:141] + node _T_43 = eq(io.flush_m_up, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 230:168] + node _T_44 = and(_T_42, _T_43) @[el2_lsu_lsc_ctl.scala 230:166] + lsu_error_pkt_m.exc_valid <= _T_44 @[el2_lsu_lsc_ctl.scala 230:31] + node _T_45 = eq(lsu_error_pkt_m.exc_valid, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 231:70] + node _T_46 = and(io.lsu_single_ecc_error_m, _T_45) @[el2_lsu_lsc_ctl.scala 231:68] + node _T_47 = eq(io.lsu_pkt_m.dma, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 231:100] + node _T_48 = and(_T_46, _T_47) @[el2_lsu_lsc_ctl.scala 231:98] + lsu_error_pkt_m.single_ecc_error <= _T_48 @[el2_lsu_lsc_ctl.scala 231:38] + lsu_error_pkt_m.inst_type <= io.lsu_pkt_m.store @[el2_lsu_lsc_ctl.scala 232:38] + node _T_49 = not(misaligned_fault_m) @[el2_lsu_lsc_ctl.scala 233:41] + lsu_error_pkt_m.exc_type <= _T_49 @[el2_lsu_lsc_ctl.scala 233:38] + node _T_50 = eq(misaligned_fault_m, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 234:74] + node _T_51 = and(io.lsu_double_ecc_error_m, _T_50) @[el2_lsu_lsc_ctl.scala 234:72] + node _T_52 = eq(access_fault_m, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 234:96] + node _T_53 = and(_T_51, _T_52) @[el2_lsu_lsc_ctl.scala 234:94] + node _T_54 = bits(_T_53, 0, 0) @[el2_lsu_lsc_ctl.scala 234:113] + node _T_55 = bits(exc_mscause_m, 3, 0) @[el2_lsu_lsc_ctl.scala 234:144] + node _T_56 = mux(_T_54, UInt<1>("h01"), _T_55) @[el2_lsu_lsc_ctl.scala 234:44] + lsu_error_pkt_m.mscause <= _T_56 @[el2_lsu_lsc_ctl.scala 234:38] + node _T_57 = bits(io.lsu_addr_m, 31, 0) @[el2_lsu_lsc_ctl.scala 235:54] + lsu_error_pkt_m.addr <= _T_57 @[el2_lsu_lsc_ctl.scala 235:38] + node _T_58 = bits(fir_nondccm_access_error_m, 0, 0) @[el2_lsu_lsc_ctl.scala 236:72] + node _T_59 = bits(fir_dccm_access_error_m, 0, 0) @[el2_lsu_lsc_ctl.scala 236:116] + node _T_60 = and(io.lsu_pkt_m.fast_int, io.lsu_double_ecc_error_m) @[el2_lsu_lsc_ctl.scala 236:159] + node _T_61 = bits(_T_60, 0, 0) @[el2_lsu_lsc_ctl.scala 236:188] + node _T_62 = mux(_T_61, UInt<1>("h01"), UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 236:135] + node _T_63 = mux(_T_59, UInt<2>("h02"), _T_62) @[el2_lsu_lsc_ctl.scala 236:91] + node _T_64 = mux(_T_58, UInt<2>("h03"), _T_63) @[el2_lsu_lsc_ctl.scala 236:44] + lsu_fir_error_m <= _T_64 @[el2_lsu_lsc_ctl.scala 236:38] + reg _T_65 : {exc_valid : UInt<1>, single_ecc_error : UInt<1>, inst_type : UInt<1>, exc_type : UInt<1>, mscause : UInt<4>, addr : UInt<32>}, clock @[el2_lsu_lsc_ctl.scala 241:34] + _T_65.addr <= lsu_error_pkt_m.addr @[el2_lsu_lsc_ctl.scala 241:34] + _T_65.mscause <= lsu_error_pkt_m.mscause @[el2_lsu_lsc_ctl.scala 241:34] + _T_65.exc_type <= lsu_error_pkt_m.exc_type @[el2_lsu_lsc_ctl.scala 241:34] + _T_65.inst_type <= lsu_error_pkt_m.inst_type @[el2_lsu_lsc_ctl.scala 241:34] + _T_65.single_ecc_error <= lsu_error_pkt_m.single_ecc_error @[el2_lsu_lsc_ctl.scala 241:34] + _T_65.exc_valid <= lsu_error_pkt_m.exc_valid @[el2_lsu_lsc_ctl.scala 241:34] + io.lsu_error_pkt_r.addr <= _T_65.addr @[el2_lsu_lsc_ctl.scala 241:24] + io.lsu_error_pkt_r.mscause <= _T_65.mscause @[el2_lsu_lsc_ctl.scala 241:24] + io.lsu_error_pkt_r.exc_type <= _T_65.exc_type @[el2_lsu_lsc_ctl.scala 241:24] + io.lsu_error_pkt_r.inst_type <= _T_65.inst_type @[el2_lsu_lsc_ctl.scala 241:24] + io.lsu_error_pkt_r.single_ecc_error <= _T_65.single_ecc_error @[el2_lsu_lsc_ctl.scala 241:24] + io.lsu_error_pkt_r.exc_valid <= _T_65.exc_valid @[el2_lsu_lsc_ctl.scala 241:24] + lsu_fir_error_rff.io.din <= lsu_fir_error_m @[el2_lsu_lsc_ctl.scala 243:41] + lsu_fir_error_m <= lsu_fir_error_rff.io.dout @[el2_lsu_lsc_ctl.scala 244:41] + access_fault_mff.io.din <= addrcheck.io.access_fault_d @[el2_lsu_lsc_ctl.scala 246:40] + access_fault_m <= access_fault_mff.io.dout @[el2_lsu_lsc_ctl.scala 247:40] + misaligned_fault_mff.io.din <= addrcheck.io.misaligned_fault_d @[el2_lsu_lsc_ctl.scala 249:40] + misaligned_fault_m <= misaligned_fault_mff.io.dout @[el2_lsu_lsc_ctl.scala 250:40] + exc_mscause_mff.io.din <= addrcheck.io.exc_mscause_d @[el2_lsu_lsc_ctl.scala 252:40] + exc_mscause_m <= exc_mscause_mff.io.dout @[el2_lsu_lsc_ctl.scala 253:40] + reg _T_66 : UInt, clock @[el2_lsu_lsc_ctl.scala 257:52] + _T_66 <= addrcheck.io.fir_dccm_access_error_d @[el2_lsu_lsc_ctl.scala 257:52] + fir_dccm_access_error_m <= _T_66 @[el2_lsu_lsc_ctl.scala 257:42] + reg _T_67 : UInt, clock @[el2_lsu_lsc_ctl.scala 260:54] + _T_67 <= addrcheck.io.fir_nondccm_access_error_d @[el2_lsu_lsc_ctl.scala 260:54] + fir_nondccm_access_error_m <= _T_67 @[el2_lsu_lsc_ctl.scala 260:44] + dma_pkt_d.unsign <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 263:22] + dma_pkt_d.fast_int <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 264:22] + dma_pkt_d.valid <= io.dma_dccm_req @[el2_lsu_lsc_ctl.scala 265:22] + dma_pkt_d.dma <= UInt<1>("h01") @[el2_lsu_lsc_ctl.scala 266:22] + dma_pkt_d.store <= io.dma_mem_write @[el2_lsu_lsc_ctl.scala 267:22] + node _T_68 = not(io.dma_mem_write) @[el2_lsu_lsc_ctl.scala 268:25] + dma_pkt_d.load <= _T_68 @[el2_lsu_lsc_ctl.scala 268:22] + node _T_69 = bits(io.dma_mem_sz, 2, 0) @[el2_lsu_lsc_ctl.scala 269:39] + node _T_70 = eq(_T_69, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 269:45] + dma_pkt_d.by <= _T_70 @[el2_lsu_lsc_ctl.scala 269:22] + node _T_71 = bits(io.dma_mem_sz, 2, 0) @[el2_lsu_lsc_ctl.scala 270:39] + node _T_72 = eq(_T_71, UInt<1>("h01")) @[el2_lsu_lsc_ctl.scala 270:45] + dma_pkt_d.half <= _T_72 @[el2_lsu_lsc_ctl.scala 270:22] + node _T_73 = bits(io.dma_mem_sz, 2, 0) @[el2_lsu_lsc_ctl.scala 271:39] + node _T_74 = eq(_T_73, UInt<2>("h02")) @[el2_lsu_lsc_ctl.scala 271:45] + dma_pkt_d.word <= _T_74 @[el2_lsu_lsc_ctl.scala 271:22] + node _T_75 = bits(io.dma_mem_sz, 2, 0) @[el2_lsu_lsc_ctl.scala 272:39] + node _T_76 = eq(_T_75, UInt<2>("h03")) @[el2_lsu_lsc_ctl.scala 272:45] + dma_pkt_d.dword <= _T_76 @[el2_lsu_lsc_ctl.scala 272:22] + dma_pkt_d.store_data_bypass_d <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 273:34] + dma_pkt_d.load_ldst_bypass_d <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 274:34] + dma_pkt_d.store_data_bypass_m <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 275:34] + inst lsu_pkt_vldmff of rvdff_4 @[el2_lsu_lsc_ctl.scala 278:36] + lsu_pkt_vldmff.clock <= clock + lsu_pkt_vldmff.reset <= reset + inst lsu_pkt_vldrff of rvdff_5 @[el2_lsu_lsc_ctl.scala 279:36] + lsu_pkt_vldrff.clock <= clock + lsu_pkt_vldrff.reset <= reset + wire lsu_ld_datafn_r : UInt<32> + lsu_ld_datafn_r <= UInt<32>("h00") + wire lsu_ld_datafn_corr_r : UInt<32> + lsu_ld_datafn_corr_r <= UInt<32>("h00") + wire lsu_ld_datafn_m : UInt<32> + lsu_ld_datafn_m <= UInt<32>("h00") + node _T_77 = bits(io.dec_lsu_valid_raw_d, 0, 0) @[el2_lsu_lsc_ctl.scala 285:50] + node _T_78 = mux(_T_77, io.lsu_p, dma_pkt_d) @[el2_lsu_lsc_ctl.scala 285:26] + io.lsu_pkt_d.valid <= _T_78.valid @[el2_lsu_lsc_ctl.scala 285:20] + io.lsu_pkt_d.store_data_bypass_m <= _T_78.store_data_bypass_m @[el2_lsu_lsc_ctl.scala 285:20] + io.lsu_pkt_d.load_ldst_bypass_d <= _T_78.load_ldst_bypass_d @[el2_lsu_lsc_ctl.scala 285:20] + io.lsu_pkt_d.store_data_bypass_d <= _T_78.store_data_bypass_d @[el2_lsu_lsc_ctl.scala 285:20] + io.lsu_pkt_d.dma <= _T_78.dma @[el2_lsu_lsc_ctl.scala 285:20] + io.lsu_pkt_d.unsign <= _T_78.unsign @[el2_lsu_lsc_ctl.scala 285:20] + io.lsu_pkt_d.store <= _T_78.store @[el2_lsu_lsc_ctl.scala 285:20] + io.lsu_pkt_d.load <= _T_78.load @[el2_lsu_lsc_ctl.scala 285:20] + io.lsu_pkt_d.dword <= _T_78.dword @[el2_lsu_lsc_ctl.scala 285:20] + io.lsu_pkt_d.word <= _T_78.word @[el2_lsu_lsc_ctl.scala 285:20] + io.lsu_pkt_d.half <= _T_78.half @[el2_lsu_lsc_ctl.scala 285:20] + io.lsu_pkt_d.by <= _T_78.by @[el2_lsu_lsc_ctl.scala 285:20] + io.lsu_pkt_d.fast_int <= _T_78.fast_int @[el2_lsu_lsc_ctl.scala 285:20] + lsu_pkt_m_in.valid <= io.lsu_pkt_d.valid @[el2_lsu_lsc_ctl.scala 286:20] + lsu_pkt_m_in.store_data_bypass_m <= io.lsu_pkt_d.store_data_bypass_m @[el2_lsu_lsc_ctl.scala 286:20] + lsu_pkt_m_in.load_ldst_bypass_d <= io.lsu_pkt_d.load_ldst_bypass_d @[el2_lsu_lsc_ctl.scala 286:20] + lsu_pkt_m_in.store_data_bypass_d <= io.lsu_pkt_d.store_data_bypass_d @[el2_lsu_lsc_ctl.scala 286:20] + lsu_pkt_m_in.dma <= io.lsu_pkt_d.dma @[el2_lsu_lsc_ctl.scala 286:20] + lsu_pkt_m_in.unsign <= io.lsu_pkt_d.unsign @[el2_lsu_lsc_ctl.scala 286:20] + lsu_pkt_m_in.store <= io.lsu_pkt_d.store @[el2_lsu_lsc_ctl.scala 286:20] + lsu_pkt_m_in.load <= io.lsu_pkt_d.load @[el2_lsu_lsc_ctl.scala 286:20] + lsu_pkt_m_in.dword <= io.lsu_pkt_d.dword @[el2_lsu_lsc_ctl.scala 286:20] + lsu_pkt_m_in.word <= io.lsu_pkt_d.word @[el2_lsu_lsc_ctl.scala 286:20] + lsu_pkt_m_in.half <= io.lsu_pkt_d.half @[el2_lsu_lsc_ctl.scala 286:20] + lsu_pkt_m_in.by <= io.lsu_pkt_d.by @[el2_lsu_lsc_ctl.scala 286:20] + lsu_pkt_m_in.fast_int <= io.lsu_pkt_d.fast_int @[el2_lsu_lsc_ctl.scala 286:20] + lsu_pkt_r_in.valid <= io.lsu_pkt_m.valid @[el2_lsu_lsc_ctl.scala 287:20] + lsu_pkt_r_in.store_data_bypass_m <= io.lsu_pkt_m.store_data_bypass_m @[el2_lsu_lsc_ctl.scala 287:20] + lsu_pkt_r_in.load_ldst_bypass_d <= io.lsu_pkt_m.load_ldst_bypass_d @[el2_lsu_lsc_ctl.scala 287:20] + lsu_pkt_r_in.store_data_bypass_d <= io.lsu_pkt_m.store_data_bypass_d @[el2_lsu_lsc_ctl.scala 287:20] + lsu_pkt_r_in.dma <= io.lsu_pkt_m.dma @[el2_lsu_lsc_ctl.scala 287:20] + lsu_pkt_r_in.unsign <= io.lsu_pkt_m.unsign @[el2_lsu_lsc_ctl.scala 287:20] + lsu_pkt_r_in.store <= io.lsu_pkt_m.store @[el2_lsu_lsc_ctl.scala 287:20] + lsu_pkt_r_in.load <= io.lsu_pkt_m.load @[el2_lsu_lsc_ctl.scala 287:20] + lsu_pkt_r_in.dword <= io.lsu_pkt_m.dword @[el2_lsu_lsc_ctl.scala 287:20] + lsu_pkt_r_in.word <= io.lsu_pkt_m.word @[el2_lsu_lsc_ctl.scala 287:20] + lsu_pkt_r_in.half <= io.lsu_pkt_m.half @[el2_lsu_lsc_ctl.scala 287:20] + lsu_pkt_r_in.by <= io.lsu_pkt_m.by @[el2_lsu_lsc_ctl.scala 287:20] + lsu_pkt_r_in.fast_int <= io.lsu_pkt_m.fast_int @[el2_lsu_lsc_ctl.scala 287:20] + node _T_79 = eq(io.lsu_p.fast_int, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 289:64] + node _T_80 = and(io.flush_m_up, _T_79) @[el2_lsu_lsc_ctl.scala 289:61] + node _T_81 = eq(_T_80, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 289:45] + node _T_82 = and(io.lsu_p.valid, _T_81) @[el2_lsu_lsc_ctl.scala 289:43] + node _T_83 = or(_T_82, io.dma_dccm_req) @[el2_lsu_lsc_ctl.scala 289:85] + io.lsu_pkt_d.valid <= _T_83 @[el2_lsu_lsc_ctl.scala 289:24] + node _T_84 = eq(io.lsu_pkt_d.dma, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 290:68] + node _T_85 = and(io.flush_m_up, _T_84) @[el2_lsu_lsc_ctl.scala 290:65] + node _T_86 = eq(_T_85, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 290:49] + node _T_87 = and(io.lsu_pkt_d.valid, _T_86) @[el2_lsu_lsc_ctl.scala 290:47] + lsu_pkt_m_in.valid <= _T_87 @[el2_lsu_lsc_ctl.scala 290:24] + node _T_88 = eq(io.lsu_pkt_m.dma, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 291:68] + node _T_89 = and(io.flush_m_up, _T_88) @[el2_lsu_lsc_ctl.scala 291:65] + node _T_90 = eq(_T_89, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 291:49] + node _T_91 = and(io.lsu_pkt_m.valid, _T_90) @[el2_lsu_lsc_ctl.scala 291:47] + lsu_pkt_r_in.valid <= _T_91 @[el2_lsu_lsc_ctl.scala 291:24] + lsu_pkt_vldmff.io.din <= lsu_pkt_m_in.valid @[el2_lsu_lsc_ctl.scala 295:34] + io.lsu_pkt_m.valid <= lsu_pkt_vldmff.io.dout @[el2_lsu_lsc_ctl.scala 296:34] + lsu_pkt_vldrff.io.din <= lsu_pkt_r_in.valid @[el2_lsu_lsc_ctl.scala 299:33] + io.lsu_pkt_r.valid <= lsu_pkt_vldrff.io.dout @[el2_lsu_lsc_ctl.scala 300:33] + reg _T_92 : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, clock @[el2_lsu_lsc_ctl.scala 305:26] + _T_92.valid <= lsu_pkt_m_in.valid @[el2_lsu_lsc_ctl.scala 305:26] + _T_92.store_data_bypass_m <= lsu_pkt_m_in.store_data_bypass_m @[el2_lsu_lsc_ctl.scala 305:26] + _T_92.load_ldst_bypass_d <= lsu_pkt_m_in.load_ldst_bypass_d @[el2_lsu_lsc_ctl.scala 305:26] + _T_92.store_data_bypass_d <= lsu_pkt_m_in.store_data_bypass_d @[el2_lsu_lsc_ctl.scala 305:26] + _T_92.dma <= lsu_pkt_m_in.dma @[el2_lsu_lsc_ctl.scala 305:26] + _T_92.unsign <= lsu_pkt_m_in.unsign @[el2_lsu_lsc_ctl.scala 305:26] + _T_92.store <= lsu_pkt_m_in.store @[el2_lsu_lsc_ctl.scala 305:26] + _T_92.load <= lsu_pkt_m_in.load @[el2_lsu_lsc_ctl.scala 305:26] + _T_92.dword <= lsu_pkt_m_in.dword @[el2_lsu_lsc_ctl.scala 305:26] + _T_92.word <= lsu_pkt_m_in.word @[el2_lsu_lsc_ctl.scala 305:26] + _T_92.half <= lsu_pkt_m_in.half @[el2_lsu_lsc_ctl.scala 305:26] + _T_92.by <= lsu_pkt_m_in.by @[el2_lsu_lsc_ctl.scala 305:26] + _T_92.fast_int <= lsu_pkt_m_in.fast_int @[el2_lsu_lsc_ctl.scala 305:26] + io.lsu_pkt_m.valid <= _T_92.valid @[el2_lsu_lsc_ctl.scala 305:16] + io.lsu_pkt_m.store_data_bypass_m <= _T_92.store_data_bypass_m @[el2_lsu_lsc_ctl.scala 305:16] + io.lsu_pkt_m.load_ldst_bypass_d <= _T_92.load_ldst_bypass_d @[el2_lsu_lsc_ctl.scala 305:16] + io.lsu_pkt_m.store_data_bypass_d <= _T_92.store_data_bypass_d @[el2_lsu_lsc_ctl.scala 305:16] + io.lsu_pkt_m.dma <= _T_92.dma @[el2_lsu_lsc_ctl.scala 305:16] + io.lsu_pkt_m.unsign <= _T_92.unsign @[el2_lsu_lsc_ctl.scala 305:16] + io.lsu_pkt_m.store <= _T_92.store @[el2_lsu_lsc_ctl.scala 305:16] + io.lsu_pkt_m.load <= _T_92.load @[el2_lsu_lsc_ctl.scala 305:16] + io.lsu_pkt_m.dword <= _T_92.dword @[el2_lsu_lsc_ctl.scala 305:16] + io.lsu_pkt_m.word <= _T_92.word @[el2_lsu_lsc_ctl.scala 305:16] + io.lsu_pkt_m.half <= _T_92.half @[el2_lsu_lsc_ctl.scala 305:16] + io.lsu_pkt_m.by <= _T_92.by @[el2_lsu_lsc_ctl.scala 305:16] + io.lsu_pkt_m.fast_int <= _T_92.fast_int @[el2_lsu_lsc_ctl.scala 305:16] + reg _T_93 : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, clock @[el2_lsu_lsc_ctl.scala 310:26] + _T_93.valid <= lsu_pkt_r_in.valid @[el2_lsu_lsc_ctl.scala 310:26] + _T_93.store_data_bypass_m <= lsu_pkt_r_in.store_data_bypass_m @[el2_lsu_lsc_ctl.scala 310:26] + _T_93.load_ldst_bypass_d <= lsu_pkt_r_in.load_ldst_bypass_d @[el2_lsu_lsc_ctl.scala 310:26] + _T_93.store_data_bypass_d <= lsu_pkt_r_in.store_data_bypass_d @[el2_lsu_lsc_ctl.scala 310:26] + _T_93.dma <= lsu_pkt_r_in.dma @[el2_lsu_lsc_ctl.scala 310:26] + _T_93.unsign <= lsu_pkt_r_in.unsign @[el2_lsu_lsc_ctl.scala 310:26] + _T_93.store <= lsu_pkt_r_in.store @[el2_lsu_lsc_ctl.scala 310:26] + _T_93.load <= lsu_pkt_r_in.load @[el2_lsu_lsc_ctl.scala 310:26] + _T_93.dword <= lsu_pkt_r_in.dword @[el2_lsu_lsc_ctl.scala 310:26] + _T_93.word <= lsu_pkt_r_in.word @[el2_lsu_lsc_ctl.scala 310:26] + _T_93.half <= lsu_pkt_r_in.half @[el2_lsu_lsc_ctl.scala 310:26] + _T_93.by <= lsu_pkt_r_in.by @[el2_lsu_lsc_ctl.scala 310:26] + _T_93.fast_int <= lsu_pkt_r_in.fast_int @[el2_lsu_lsc_ctl.scala 310:26] + io.lsu_pkt_r.valid <= _T_93.valid @[el2_lsu_lsc_ctl.scala 310:16] + io.lsu_pkt_r.store_data_bypass_m <= _T_93.store_data_bypass_m @[el2_lsu_lsc_ctl.scala 310:16] + io.lsu_pkt_r.load_ldst_bypass_d <= _T_93.load_ldst_bypass_d @[el2_lsu_lsc_ctl.scala 310:16] + io.lsu_pkt_r.store_data_bypass_d <= _T_93.store_data_bypass_d @[el2_lsu_lsc_ctl.scala 310:16] + io.lsu_pkt_r.dma <= _T_93.dma @[el2_lsu_lsc_ctl.scala 310:16] + io.lsu_pkt_r.unsign <= _T_93.unsign @[el2_lsu_lsc_ctl.scala 310:16] + io.lsu_pkt_r.store <= _T_93.store @[el2_lsu_lsc_ctl.scala 310:16] + io.lsu_pkt_r.load <= _T_93.load @[el2_lsu_lsc_ctl.scala 310:16] + io.lsu_pkt_r.dword <= _T_93.dword @[el2_lsu_lsc_ctl.scala 310:16] + io.lsu_pkt_r.word <= _T_93.word @[el2_lsu_lsc_ctl.scala 310:16] + io.lsu_pkt_r.half <= _T_93.half @[el2_lsu_lsc_ctl.scala 310:16] + io.lsu_pkt_r.by <= _T_93.by @[el2_lsu_lsc_ctl.scala 310:16] + io.lsu_pkt_r.fast_int <= _T_93.fast_int @[el2_lsu_lsc_ctl.scala 310:16] + node _T_94 = bits(io.dma_mem_wdata, 63, 0) @[el2_lsu_lsc_ctl.scala 326:47] + node _T_95 = bits(io.dma_mem_addr, 2, 0) @[el2_lsu_lsc_ctl.scala 326:76] + node _T_96 = cat(_T_95, UInt<1>("h00")) @[Cat.scala 29:58] + node dma_mem_wdata_shifted = dshr(_T_94, _T_96) @[el2_lsu_lsc_ctl.scala 326:54] + node _T_97 = bits(io.dma_dccm_req, 0, 0) @[el2_lsu_lsc_ctl.scala 328:51] + node _T_98 = bits(dma_mem_wdata_shifted, 31, 0) @[el2_lsu_lsc_ctl.scala 328:79] + node _T_99 = bits(io.exu_lsu_rs2_d, 31, 0) @[el2_lsu_lsc_ctl.scala 328:102] + node store_data_d = mux(_T_97, _T_98, _T_99) @[el2_lsu_lsc_ctl.scala 328:34] + node _T_100 = bits(io.lsu_pkt_d.store_data_bypass_d, 0, 0) @[el2_lsu_lsc_ctl.scala 330:68] + node _T_101 = bits(io.lsu_result_m, 31, 0) @[el2_lsu_lsc_ctl.scala 330:90] + node _T_102 = bits(store_data_d, 31, 0) @[el2_lsu_lsc_ctl.scala 330:109] + node store_data_m_in = mux(_T_100, _T_101, _T_102) @[el2_lsu_lsc_ctl.scala 330:34] + inst sdmff of rvdff_6 @[el2_lsu_lsc_ctl.scala 333:20] + sdmff.clock <= clock + sdmff.reset <= reset + sdmff.io.din <= store_data_m_in @[el2_lsu_lsc_ctl.scala 334:27] + inst samff of rvdff_7 @[el2_lsu_lsc_ctl.scala 337:20] + samff.clock <= clock + samff.reset <= reset + samff.io.din <= io.lsu_addr_d @[el2_lsu_lsc_ctl.scala 338:23] + io.lsu_addr_m <= samff.io.dout @[el2_lsu_lsc_ctl.scala 339:26] + inst sarff of rvdff_8 @[el2_lsu_lsc_ctl.scala 341:20] + sarff.clock <= clock + sarff.reset <= reset + sarff.io.din <= io.lsu_addr_m @[el2_lsu_lsc_ctl.scala 342:23] + io.lsu_addr_r <= sarff.io.dout @[el2_lsu_lsc_ctl.scala 343:23] + inst end_addr_mff of rvdff_9 @[el2_lsu_lsc_ctl.scala 345:28] + end_addr_mff.clock <= clock + end_addr_mff.reset <= reset + end_addr_mff.io.din <= io.end_addr_d @[el2_lsu_lsc_ctl.scala 346:26] + io.end_addr_m <= end_addr_mff.io.dout @[el2_lsu_lsc_ctl.scala 347:26] + inst end_addr_rff of rvdff_10 @[el2_lsu_lsc_ctl.scala 349:28] + end_addr_rff.clock <= clock + end_addr_rff.reset <= reset + end_addr_rff.io.din <= io.end_addr_m @[el2_lsu_lsc_ctl.scala 350:26] + io.end_addr_r <= end_addr_rff.io.dout @[el2_lsu_lsc_ctl.scala 351:26] + inst addr_in_dccm_mff of rvdff_11 @[el2_lsu_lsc_ctl.scala 353:36] + addr_in_dccm_mff.clock <= clock + addr_in_dccm_mff.reset <= reset + addr_in_dccm_mff.io.din <= io.addr_in_dccm_d @[el2_lsu_lsc_ctl.scala 354:27] + io.addr_in_dccm_m <= addr_in_dccm_mff.io.dout @[el2_lsu_lsc_ctl.scala 355:27] + inst addr_in_dccm_rff of rvdff_12 @[el2_lsu_lsc_ctl.scala 357:37] + addr_in_dccm_rff.clock <= clock + addr_in_dccm_rff.reset <= reset + addr_in_dccm_rff.io.din <= io.addr_in_dccm_m @[el2_lsu_lsc_ctl.scala 358:28] + io.addr_in_dccm_r <= addr_in_dccm_rff.io.dout @[el2_lsu_lsc_ctl.scala 359:28] + inst addr_in_pic_mff of rvdff_13 @[el2_lsu_lsc_ctl.scala 361:37] + addr_in_pic_mff.clock <= clock + addr_in_pic_mff.reset <= reset + addr_in_pic_mff.io.din <= io.addr_in_pic_d @[el2_lsu_lsc_ctl.scala 362:27] + io.addr_in_pic_m <= addr_in_pic_mff.io.dout @[el2_lsu_lsc_ctl.scala 363:27] + inst addr_in_pic_rff of rvdff_14 @[el2_lsu_lsc_ctl.scala 365:37] + addr_in_pic_rff.clock <= clock + addr_in_pic_rff.reset <= reset + addr_in_pic_rff.io.din <= io.addr_in_pic_m @[el2_lsu_lsc_ctl.scala 366:27] + io.addr_in_pic_r <= addr_in_pic_rff.io.dout @[el2_lsu_lsc_ctl.scala 367:27] + inst addr_external_mff of rvdff_15 @[el2_lsu_lsc_ctl.scala 369:37] + addr_external_mff.clock <= clock + addr_external_mff.reset <= reset + addr_external_mff.io.din <= addrcheck.io.addr_external_d @[el2_lsu_lsc_ctl.scala 370:28] + io.addr_external_m <= addr_external_mff.io.dout @[el2_lsu_lsc_ctl.scala 371:28] + inst addr_external_rff of rvdff_16 @[el2_lsu_lsc_ctl.scala 373:37] + addr_external_rff.clock <= clock + addr_external_rff.reset <= reset + addr_external_rff.io.din <= io.addr_external_m @[el2_lsu_lsc_ctl.scala 374:28] + inst bus_read_data_r_ff of rvdff_17 @[el2_lsu_lsc_ctl.scala 377:38] + bus_read_data_r_ff.clock <= clock + bus_read_data_r_ff.reset <= reset + bus_read_data_r_ff.io.din <= io.bus_read_data_m @[el2_lsu_lsc_ctl.scala 378:29] + node _T_103 = bits(io.lsu_ld_data_corr_r, 31, 0) @[el2_lsu_lsc_ctl.scala 384:52] + io.lsu_fir_addr <= _T_103 @[el2_lsu_lsc_ctl.scala 384:28] + io.lsu_addr_d <= lsadder.io.dout @[el2_lsu_lsc_ctl.scala 387:28] + node _T_104 = or(io.lsu_pkt_r.store, io.lsu_pkt_r.load) @[el2_lsu_lsc_ctl.scala 391:63] + node _T_105 = and(io.lsu_pkt_r.valid, _T_104) @[el2_lsu_lsc_ctl.scala 391:41] + node _T_106 = eq(io.flush_r, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 391:86] + node _T_107 = and(_T_105, _T_106) @[el2_lsu_lsc_ctl.scala 391:84] + node _T_108 = eq(io.lsu_pkt_r.dma, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 391:100] + node _T_109 = and(_T_107, _T_108) @[el2_lsu_lsc_ctl.scala 391:98] + io.lsu_commit_r <= _T_109 @[el2_lsu_lsc_ctl.scala 391:19] + node _T_110 = bits(io.picm_mask_data_m, 31, 0) @[el2_lsu_lsc_ctl.scala 394:52] + node _T_111 = eq(io.addr_in_pic_m, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 394:69] + node _T_112 = bits(_T_111, 0, 0) @[Bitwise.scala 72:15] + node _T_113 = mux(_T_112, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_114 = or(_T_110, _T_113) @[el2_lsu_lsc_ctl.scala 394:59] + node _T_115 = bits(io.lsu_pkt_m.store_data_bypass_m, 0, 0) @[el2_lsu_lsc_ctl.scala 394:128] + node _T_116 = mux(_T_115, io.lsu_result_m, sdmff.io.dout) @[el2_lsu_lsc_ctl.scala 394:94] + node _T_117 = and(_T_114, _T_116) @[el2_lsu_lsc_ctl.scala 394:89] + io.store_data_m <= _T_117 @[el2_lsu_lsc_ctl.scala 394:29] + node _T_118 = bits(io.addr_external_m, 0, 0) @[el2_lsu_lsc_ctl.scala 425:53] + node _T_119 = mux(_T_118, io.bus_read_data_m, io.lsu_ld_data_m) @[el2_lsu_lsc_ctl.scala 425:33] + lsu_ld_datafn_m <= _T_119 @[el2_lsu_lsc_ctl.scala 425:27] + node _T_120 = bits(addr_external_rff.io.dout, 0, 0) @[el2_lsu_lsc_ctl.scala 426:50] + node _T_121 = mux(_T_120, bus_read_data_r_ff.io.dout, io.lsu_ld_data_corr_r) @[el2_lsu_lsc_ctl.scala 426:33] + lsu_ld_datafn_corr_r <= _T_121 @[el2_lsu_lsc_ctl.scala 426:27] + node _T_122 = and(io.lsu_pkt_r.unsign, io.lsu_pkt_r.by) @[el2_lsu_lsc_ctl.scala 429:61] + node _T_123 = bits(_T_122, 0, 0) @[Bitwise.scala 72:15] + node _T_124 = mux(_T_123, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_125 = bits(lsu_ld_datafn_m, 7, 0) @[el2_lsu_lsc_ctl.scala 429:117] + node _T_126 = cat(UInt<1>("h00"), _T_125) @[Cat.scala 29:58] + node _T_127 = and(_T_124, _T_126) @[el2_lsu_lsc_ctl.scala 429:84] + node _T_128 = and(io.lsu_pkt_r.unsign, io.lsu_pkt_r.half) @[el2_lsu_lsc_ctl.scala 430:38] + node _T_129 = bits(_T_128, 0, 0) @[Bitwise.scala 72:15] + node _T_130 = mux(_T_129, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_131 = bits(lsu_ld_datafn_m, 15, 0) @[el2_lsu_lsc_ctl.scala 430:92] + node _T_132 = cat(UInt<1>("h00"), _T_131) @[Cat.scala 29:58] + node _T_133 = and(_T_130, _T_132) @[el2_lsu_lsc_ctl.scala 430:61] + node _T_134 = or(_T_127, _T_133) @[el2_lsu_lsc_ctl.scala 429:125] + node _T_135 = eq(io.lsu_pkt_r.unsign, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 431:17] + node _T_136 = and(_T_135, io.lsu_pkt_r.by) @[el2_lsu_lsc_ctl.scala 431:38] + node _T_137 = bits(_T_136, 0, 0) @[Bitwise.scala 72:15] + node _T_138 = mux(_T_137, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_139 = bits(lsu_ld_datafn_m, 7, 7) @[el2_lsu_lsc_ctl.scala 431:92] + node _T_140 = bits(_T_139, 0, 0) @[Bitwise.scala 72:15] + node _T_141 = mux(_T_140, UInt<24>("h0ffffff"), UInt<24>("h00")) @[Bitwise.scala 72:12] + node _T_142 = bits(lsu_ld_datafn_m, 7, 0) @[el2_lsu_lsc_ctl.scala 431:115] + node _T_143 = cat(_T_141, _T_142) @[Cat.scala 29:58] + node _T_144 = and(_T_138, _T_143) @[el2_lsu_lsc_ctl.scala 431:61] + node _T_145 = or(_T_134, _T_144) @[el2_lsu_lsc_ctl.scala 430:104] + node _T_146 = eq(io.lsu_pkt_r.unsign, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 432:17] + node _T_147 = and(_T_146, io.lsu_pkt_r.half) @[el2_lsu_lsc_ctl.scala 432:38] + node _T_148 = bits(_T_147, 0, 0) @[Bitwise.scala 72:15] + node _T_149 = mux(_T_148, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_150 = bits(lsu_ld_datafn_m, 15, 15) @[el2_lsu_lsc_ctl.scala 432:91] + node _T_151 = bits(_T_150, 0, 0) @[Bitwise.scala 72:15] + node _T_152 = mux(_T_151, UInt<16>("h0ffff"), UInt<16>("h00")) @[Bitwise.scala 72:12] + node _T_153 = bits(lsu_ld_datafn_m, 15, 0) @[el2_lsu_lsc_ctl.scala 432:115] + node _T_154 = cat(_T_152, _T_153) @[Cat.scala 29:58] + node _T_155 = and(_T_149, _T_154) @[el2_lsu_lsc_ctl.scala 432:61] + node _T_156 = or(_T_145, _T_155) @[el2_lsu_lsc_ctl.scala 431:124] + node _T_157 = bits(io.lsu_pkt_r.word, 0, 0) @[Bitwise.scala 72:15] + node _T_158 = mux(_T_157, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_159 = bits(lsu_ld_datafn_m, 31, 0) @[el2_lsu_lsc_ctl.scala 433:55] + node _T_160 = and(_T_158, _T_159) @[el2_lsu_lsc_ctl.scala 433:38] + node _T_161 = or(_T_156, _T_160) @[el2_lsu_lsc_ctl.scala 432:124] + io.lsu_result_m <= _T_161 @[el2_lsu_lsc_ctl.scala 429:27] + node _T_162 = and(io.lsu_pkt_r.unsign, io.lsu_pkt_r.by) @[el2_lsu_lsc_ctl.scala 436:61] + node _T_163 = bits(_T_162, 0, 0) @[Bitwise.scala 72:15] + node _T_164 = mux(_T_163, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_165 = bits(lsu_ld_datafn_corr_r, 7, 0) @[el2_lsu_lsc_ctl.scala 436:122] + node _T_166 = cat(UInt<1>("h00"), _T_165) @[Cat.scala 29:58] + node _T_167 = and(_T_164, _T_166) @[el2_lsu_lsc_ctl.scala 436:84] + node _T_168 = and(io.lsu_pkt_r.unsign, io.lsu_pkt_r.half) @[el2_lsu_lsc_ctl.scala 437:38] + node _T_169 = bits(_T_168, 0, 0) @[Bitwise.scala 72:15] + node _T_170 = mux(_T_169, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_171 = bits(lsu_ld_datafn_corr_r, 15, 0) @[el2_lsu_lsc_ctl.scala 437:97] + node _T_172 = cat(UInt<1>("h00"), _T_171) @[Cat.scala 29:58] + node _T_173 = and(_T_170, _T_172) @[el2_lsu_lsc_ctl.scala 437:61] + node _T_174 = or(_T_167, _T_173) @[el2_lsu_lsc_ctl.scala 436:130] + node _T_175 = eq(io.lsu_pkt_r.unsign, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 438:17] + node _T_176 = and(_T_175, io.lsu_pkt_r.by) @[el2_lsu_lsc_ctl.scala 438:38] + node _T_177 = bits(_T_176, 0, 0) @[Bitwise.scala 72:15] + node _T_178 = mux(_T_177, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_179 = bits(lsu_ld_datafn_corr_r, 7, 7) @[el2_lsu_lsc_ctl.scala 438:97] + node _T_180 = bits(_T_179, 0, 0) @[Bitwise.scala 72:15] + node _T_181 = mux(_T_180, UInt<24>("h0ffffff"), UInt<24>("h00")) @[Bitwise.scala 72:12] + node _T_182 = bits(lsu_ld_datafn_corr_r, 7, 0) @[el2_lsu_lsc_ctl.scala 438:125] + node _T_183 = cat(_T_181, _T_182) @[Cat.scala 29:58] + node _T_184 = and(_T_178, _T_183) @[el2_lsu_lsc_ctl.scala 438:61] + node _T_185 = or(_T_174, _T_184) @[el2_lsu_lsc_ctl.scala 437:109] + node _T_186 = eq(io.lsu_pkt_r.unsign, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 439:17] + node _T_187 = and(_T_186, io.lsu_pkt_r.half) @[el2_lsu_lsc_ctl.scala 439:38] + node _T_188 = bits(_T_187, 0, 0) @[Bitwise.scala 72:15] + node _T_189 = mux(_T_188, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_190 = bits(lsu_ld_datafn_corr_r, 15, 15) @[el2_lsu_lsc_ctl.scala 439:96] + node _T_191 = bits(_T_190, 0, 0) @[Bitwise.scala 72:15] + node _T_192 = mux(_T_191, UInt<16>("h0ffff"), UInt<16>("h00")) @[Bitwise.scala 72:12] + node _T_193 = bits(lsu_ld_datafn_corr_r, 15, 0) @[el2_lsu_lsc_ctl.scala 439:125] + node _T_194 = cat(_T_192, _T_193) @[Cat.scala 29:58] + node _T_195 = and(_T_189, _T_194) @[el2_lsu_lsc_ctl.scala 439:61] + node _T_196 = or(_T_185, _T_195) @[el2_lsu_lsc_ctl.scala 438:134] + node _T_197 = bits(io.lsu_pkt_r.word, 0, 0) @[Bitwise.scala 72:15] + node _T_198 = mux(_T_197, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_199 = bits(lsu_ld_datafn_corr_r, 31, 0) @[el2_lsu_lsc_ctl.scala 440:60] + node _T_200 = and(_T_198, _T_199) @[el2_lsu_lsc_ctl.scala 440:38] + node _T_201 = or(_T_196, _T_200) @[el2_lsu_lsc_ctl.scala 439:134] + io.lsu_result_corr_r <= _T_201 @[el2_lsu_lsc_ctl.scala 436:27] + + extmodule TEC_RV_ICG : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG @[beh_lib.scala 331:24] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[beh_lib.scala 332:12] + clkhdr.CK <= io.clk @[beh_lib.scala 333:16] + clkhdr.EN <= io.en @[beh_lib.scala 334:16] + clkhdr.SE <= io.scan_mode @[beh_lib.scala 335:16] + + extmodule TEC_RV_ICG_1 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_1 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_1 @[beh_lib.scala 331:24] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[beh_lib.scala 332:12] + clkhdr.CK <= io.clk @[beh_lib.scala 333:16] + clkhdr.EN <= io.en @[beh_lib.scala 334:16] + clkhdr.SE <= io.scan_mode @[beh_lib.scala 335:16] + + module el2_lsu_dccm_ctl : + input clock : Clock + input reset : AsyncReset + output io : {flip lsu_c2_m_clk : Clock, flip lsu_c2_r_clk : Clock, flip lsu_free_c2_clk : Clock, flip lsu_c1_r_clk : Clock, flip lsu_store_c1_r_clk : Clock, flip clk : Clock, flip lsu_pkt_d : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip lsu_pkt_m : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip lsu_pkt_r : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip addr_in_dccm_d : UInt<1>, flip addr_in_dccm_m : UInt<1>, flip addr_in_dccm_r : UInt<1>, flip addr_in_pic_d : UInt<1>, flip addr_in_pic_m : UInt<1>, flip addr_in_pic_r : UInt<1>, flip lsu_raw_fwd_lo_r : UInt<1>, flip lsu_raw_fwd_hi_r : UInt<1>, flip lsu_commit_r : UInt<1>, flip lsu_addr_d : UInt<16>, flip lsu_addr_m : UInt<16>, flip lsu_addr_r : UInt<16>, flip end_addr_d : UInt<16>, flip end_addr_m : UInt<16>, flip end_addr_r : UInt<16>, flip stbuf_reqvld_any : UInt<1>, flip stbuf_addr_any : UInt<16>, flip stbuf_data_any : UInt<32>, flip stbuf_ecc_any : UInt<7>, flip stbuf_fwddata_hi_m : UInt<32>, flip stbuf_fwddata_lo_m : UInt<32>, flip stbuf_fwdbyteen_lo_m : UInt<4>, flip stbuf_fwdbyteen_hi_m : UInt<4>, dccm_rdata_hi_r : UInt<32>, dccm_rdata_lo_r : UInt<32>, dccm_data_ecc_hi_r : UInt<7>, dccm_data_ecc_lo_r : UInt<7>, lsu_ld_data_r : UInt<32>, lsu_ld_data_corr_r : UInt<32>, flip lsu_double_ecc_error_r : UInt<1>, flip single_ecc_error_hi_r : UInt<1>, flip single_ecc_error_lo_r : UInt<1>, flip sec_data_hi_r : UInt<32>, flip sec_data_lo_r : UInt<32>, flip sec_data_hi_r_ff : UInt<32>, flip sec_data_lo_r_ff : UInt<32>, flip sec_data_ecc_hi_r_ff : UInt<7>, flip sec_data_ecc_lo_r_ff : UInt<7>, dccm_rdata_hi_m : UInt<32>, dccm_rdata_lo_m : UInt<32>, dccm_data_ecc_hi_m : UInt<7>, dccm_data_ecc_lo_m : UInt<7>, lsu_ld_data_m : UInt<32>, flip lsu_double_ecc_error_m : UInt<1>, flip sec_data_hi_m : UInt<32>, flip sec_data_lo_m : UInt<32>, flip store_data_m : UInt<32>, flip dma_dccm_wen : UInt<1>, flip dma_pic_wen : UInt<1>, flip dma_mem_tag_m : UInt<3>, flip dma_mem_addr : UInt<32>, flip dma_mem_wdata : UInt<64>, flip dma_dccm_wdata_lo : UInt<32>, flip dma_dccm_wdata_hi : UInt<32>, flip dma_dccm_wdata_ecc_hi : UInt<7>, flip dma_dccm_wdata_ecc_lo : UInt<7>, store_data_hi_r : UInt<32>, store_data_lo_r : UInt<32>, store_datafn_hi_r : UInt<32>, store_datafn_lo_r : UInt<32>, store_data_r : UInt<32>, ld_single_ecc_error_r : UInt<1>, ld_single_ecc_error_r_ff : UInt<1>, picm_mask_data_m : UInt<32>, lsu_stbuf_commit_any : UInt<1>, lsu_dccm_rden_m : UInt<1>, lsu_dccm_rden_r : UInt<1>, dccm_dma_rvalid : UInt<1>, dccm_dma_ecc_error : UInt<1>, dccm_dma_rtag : UInt<3>, dccm_dma_rdata : UInt<64>, dccm_wren : UInt<1>, dccm_rden : UInt<1>, dccm_wr_addr_lo : UInt<16>, dccm_wr_data_lo : UInt<39>, dccm_rd_addr_lo : UInt<16>, flip dccm_rd_data_lo : UInt<39>, dccm_wr_addr_hi : UInt<16>, dccm_wr_data_hi : UInt<39>, dccm_rd_addr_hi : UInt<16>, flip dccm_rd_data_hi : UInt<39>, picm_wren : UInt<1>, picm_rden : UInt<1>, picm_mken : UInt<1>, picm_rdaddr : UInt<32>, picm_wraddr : UInt<32>, picm_wr_data : UInt<32>, flip picm_rd_data : UInt<32>, flip scan_mode : UInt<1>} + + node picm_rd_data_m = cat(io.picm_rd_data, io.picm_rd_data) @[Cat.scala 29:58] + node dccm_rdata_corr_r = cat(io.sec_data_hi_r, io.sec_data_lo_r) @[Cat.scala 29:58] + node dccm_rdata_corr_m = cat(io.sec_data_hi_m, io.sec_data_lo_m) @[Cat.scala 29:58] + node dccm_rdata_r = cat(io.dccm_rdata_hi_r, io.dccm_rdata_lo_r) @[Cat.scala 29:58] + node dccm_rdata_m = cat(io.dccm_rdata_hi_m, io.dccm_rdata_lo_m) @[Cat.scala 29:58] + wire lsu_rdata_r : UInt<8>[8] @[el2_lsu_dccm_ctl.scala 134:32] + wire lsu_rdata_m : UInt<8>[8] @[el2_lsu_dccm_ctl.scala 135:32] + wire lsu_rdata_corr_r : UInt<8>[8] @[el2_lsu_dccm_ctl.scala 136:32] + wire lsu_rdata_corr_m : UInt<8>[8] @[el2_lsu_dccm_ctl.scala 137:32] + wire stbuf_fwddata_r : UInt<64> + stbuf_fwddata_r <= UInt<1>("h00") + wire stbuf_fwdbyteen_r : UInt<64> + stbuf_fwdbyteen_r <= UInt<1>("h00") + wire picm_rd_data_r_32 : UInt<32> + picm_rd_data_r_32 <= UInt<1>("h00") + wire picm_rd_data_r : UInt<64> + picm_rd_data_r <= UInt<1>("h00") + wire lsu_ld_data_corr_m : UInt<64> + lsu_ld_data_corr_m <= UInt<1>("h00") + node _T = and(io.lsu_pkt_m.valid, io.lsu_pkt_m.load) @[el2_lsu_dccm_ctl.scala 168:50] + node _T_1 = and(_T, io.lsu_pkt_m.dma) @[el2_lsu_dccm_ctl.scala 168:70] + io.dccm_dma_rvalid <= _T_1 @[el2_lsu_dccm_ctl.scala 168:28] + io.dccm_dma_ecc_error <= io.lsu_double_ecc_error_m @[el2_lsu_dccm_ctl.scala 169:28] + node _T_2 = cat(lsu_rdata_corr_m[1], lsu_rdata_corr_m[0]) @[el2_lsu_dccm_ctl.scala 170:48] + node _T_3 = cat(lsu_rdata_corr_m[3], lsu_rdata_corr_m[2]) @[el2_lsu_dccm_ctl.scala 170:48] + node _T_4 = cat(_T_3, _T_2) @[el2_lsu_dccm_ctl.scala 170:48] + node _T_5 = cat(lsu_rdata_corr_m[5], lsu_rdata_corr_m[4]) @[el2_lsu_dccm_ctl.scala 170:48] + node _T_6 = cat(lsu_rdata_corr_m[7], lsu_rdata_corr_m[6]) @[el2_lsu_dccm_ctl.scala 170:48] + node _T_7 = cat(_T_6, _T_5) @[el2_lsu_dccm_ctl.scala 170:48] + node _T_8 = cat(_T_7, _T_4) @[el2_lsu_dccm_ctl.scala 170:48] + io.dccm_dma_rdata <= _T_8 @[el2_lsu_dccm_ctl.scala 170:28] + io.dccm_dma_rtag <= io.dma_mem_tag_m @[el2_lsu_dccm_ctl.scala 171:28] + io.dccm_rdata_lo_r <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 172:28] + io.dccm_rdata_hi_r <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 173:28] + io.dccm_data_ecc_hi_r <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 174:28] + io.dccm_data_ecc_lo_r <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 175:28] + reg _T_9 : UInt, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_dccm_ctl.scala 178:65] + _T_9 <= lsu_ld_data_corr_m @[el2_lsu_dccm_ctl.scala 178:65] + io.lsu_ld_data_corr_r <= _T_9 @[el2_lsu_dccm_ctl.scala 178:28] + lsu_rdata_r[0] <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 180:27] + io.lsu_ld_data_r <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 181:27] + lsu_rdata_corr_r[0] <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 182:27] + node _T_10 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_11 = bits(_T_10, 0, 0) @[el2_lsu_dccm_ctl.scala 184:92] + node _T_12 = bits(_T_11, 0, 0) @[el2_lsu_dccm_ctl.scala 184:97] + node _T_13 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_14 = bits(_T_13, 7, 0) @[el2_lsu_dccm_ctl.scala 184:154] + node _T_15 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 184:189] + node _T_16 = bits(picm_rd_data_m, 7, 0) @[el2_lsu_dccm_ctl.scala 184:210] + node _T_17 = bits(dccm_rdata_corr_m, 7, 0) @[el2_lsu_dccm_ctl.scala 184:241] + node _T_18 = mux(_T_15, _T_16, _T_17) @[el2_lsu_dccm_ctl.scala 184:171] + node _T_19 = mux(_T_12, _T_14, _T_18) @[el2_lsu_dccm_ctl.scala 184:36] + lsu_rdata_corr_m[0] <= _T_19 @[el2_lsu_dccm_ctl.scala 184:30] + node _T_20 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_21 = bits(_T_20, 0, 0) @[el2_lsu_dccm_ctl.scala 185:92] + node _T_22 = bits(_T_21, 0, 0) @[el2_lsu_dccm_ctl.scala 185:97] + node _T_23 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_24 = bits(_T_23, 7, 0) @[el2_lsu_dccm_ctl.scala 185:154] + node _T_25 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 185:189] + node _T_26 = bits(picm_rd_data_m, 7, 0) @[el2_lsu_dccm_ctl.scala 185:210] + node _T_27 = bits(dccm_rdata_m, 7, 0) @[el2_lsu_dccm_ctl.scala 185:236] + node _T_28 = mux(_T_25, _T_26, _T_27) @[el2_lsu_dccm_ctl.scala 185:171] + node _T_29 = mux(_T_22, _T_24, _T_28) @[el2_lsu_dccm_ctl.scala 185:36] + lsu_rdata_m[0] <= _T_29 @[el2_lsu_dccm_ctl.scala 185:30] + lsu_rdata_r[1] <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 180:27] + io.lsu_ld_data_r <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 181:27] + lsu_rdata_corr_r[1] <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 182:27] + node _T_30 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_31 = bits(_T_30, 1, 1) @[el2_lsu_dccm_ctl.scala 184:92] + node _T_32 = bits(_T_31, 0, 0) @[el2_lsu_dccm_ctl.scala 184:97] + node _T_33 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_34 = bits(_T_33, 15, 8) @[el2_lsu_dccm_ctl.scala 184:154] + node _T_35 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 184:189] + node _T_36 = bits(picm_rd_data_m, 15, 8) @[el2_lsu_dccm_ctl.scala 184:210] + node _T_37 = bits(dccm_rdata_corr_m, 15, 8) @[el2_lsu_dccm_ctl.scala 184:241] + node _T_38 = mux(_T_35, _T_36, _T_37) @[el2_lsu_dccm_ctl.scala 184:171] + node _T_39 = mux(_T_32, _T_34, _T_38) @[el2_lsu_dccm_ctl.scala 184:36] + lsu_rdata_corr_m[1] <= _T_39 @[el2_lsu_dccm_ctl.scala 184:30] + node _T_40 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_41 = bits(_T_40, 1, 1) @[el2_lsu_dccm_ctl.scala 185:92] + node _T_42 = bits(_T_41, 0, 0) @[el2_lsu_dccm_ctl.scala 185:97] + node _T_43 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_44 = bits(_T_43, 15, 8) @[el2_lsu_dccm_ctl.scala 185:154] + node _T_45 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 185:189] + node _T_46 = bits(picm_rd_data_m, 15, 8) @[el2_lsu_dccm_ctl.scala 185:210] + node _T_47 = bits(dccm_rdata_m, 15, 8) @[el2_lsu_dccm_ctl.scala 185:236] + node _T_48 = mux(_T_45, _T_46, _T_47) @[el2_lsu_dccm_ctl.scala 185:171] + node _T_49 = mux(_T_42, _T_44, _T_48) @[el2_lsu_dccm_ctl.scala 185:36] + lsu_rdata_m[1] <= _T_49 @[el2_lsu_dccm_ctl.scala 185:30] + lsu_rdata_r[2] <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 180:27] + io.lsu_ld_data_r <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 181:27] + lsu_rdata_corr_r[2] <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 182:27] + node _T_50 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_51 = bits(_T_50, 2, 2) @[el2_lsu_dccm_ctl.scala 184:92] + node _T_52 = bits(_T_51, 0, 0) @[el2_lsu_dccm_ctl.scala 184:97] + node _T_53 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_54 = bits(_T_53, 23, 16) @[el2_lsu_dccm_ctl.scala 184:154] + node _T_55 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 184:189] + node _T_56 = bits(picm_rd_data_m, 23, 16) @[el2_lsu_dccm_ctl.scala 184:210] + node _T_57 = bits(dccm_rdata_corr_m, 23, 16) @[el2_lsu_dccm_ctl.scala 184:241] + node _T_58 = mux(_T_55, _T_56, _T_57) @[el2_lsu_dccm_ctl.scala 184:171] + node _T_59 = mux(_T_52, _T_54, _T_58) @[el2_lsu_dccm_ctl.scala 184:36] + lsu_rdata_corr_m[2] <= _T_59 @[el2_lsu_dccm_ctl.scala 184:30] + node _T_60 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_61 = bits(_T_60, 2, 2) @[el2_lsu_dccm_ctl.scala 185:92] + node _T_62 = bits(_T_61, 0, 0) @[el2_lsu_dccm_ctl.scala 185:97] + node _T_63 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_64 = bits(_T_63, 23, 16) @[el2_lsu_dccm_ctl.scala 185:154] + node _T_65 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 185:189] + node _T_66 = bits(picm_rd_data_m, 23, 16) @[el2_lsu_dccm_ctl.scala 185:210] + node _T_67 = bits(dccm_rdata_m, 23, 16) @[el2_lsu_dccm_ctl.scala 185:236] + node _T_68 = mux(_T_65, _T_66, _T_67) @[el2_lsu_dccm_ctl.scala 185:171] + node _T_69 = mux(_T_62, _T_64, _T_68) @[el2_lsu_dccm_ctl.scala 185:36] + lsu_rdata_m[2] <= _T_69 @[el2_lsu_dccm_ctl.scala 185:30] + lsu_rdata_r[3] <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 180:27] + io.lsu_ld_data_r <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 181:27] + lsu_rdata_corr_r[3] <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 182:27] + node _T_70 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_71 = bits(_T_70, 3, 3) @[el2_lsu_dccm_ctl.scala 184:92] + node _T_72 = bits(_T_71, 0, 0) @[el2_lsu_dccm_ctl.scala 184:97] + node _T_73 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_74 = bits(_T_73, 31, 24) @[el2_lsu_dccm_ctl.scala 184:154] + node _T_75 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 184:189] + node _T_76 = bits(picm_rd_data_m, 31, 24) @[el2_lsu_dccm_ctl.scala 184:210] + node _T_77 = bits(dccm_rdata_corr_m, 31, 24) @[el2_lsu_dccm_ctl.scala 184:241] + node _T_78 = mux(_T_75, _T_76, _T_77) @[el2_lsu_dccm_ctl.scala 184:171] + node _T_79 = mux(_T_72, _T_74, _T_78) @[el2_lsu_dccm_ctl.scala 184:36] + lsu_rdata_corr_m[3] <= _T_79 @[el2_lsu_dccm_ctl.scala 184:30] + node _T_80 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_81 = bits(_T_80, 3, 3) @[el2_lsu_dccm_ctl.scala 185:92] + node _T_82 = bits(_T_81, 0, 0) @[el2_lsu_dccm_ctl.scala 185:97] + node _T_83 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_84 = bits(_T_83, 31, 24) @[el2_lsu_dccm_ctl.scala 185:154] + node _T_85 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 185:189] + node _T_86 = bits(picm_rd_data_m, 31, 24) @[el2_lsu_dccm_ctl.scala 185:210] + node _T_87 = bits(dccm_rdata_m, 31, 24) @[el2_lsu_dccm_ctl.scala 185:236] + node _T_88 = mux(_T_85, _T_86, _T_87) @[el2_lsu_dccm_ctl.scala 185:171] + node _T_89 = mux(_T_82, _T_84, _T_88) @[el2_lsu_dccm_ctl.scala 185:36] + lsu_rdata_m[3] <= _T_89 @[el2_lsu_dccm_ctl.scala 185:30] + lsu_rdata_r[4] <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 180:27] + io.lsu_ld_data_r <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 181:27] + lsu_rdata_corr_r[4] <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 182:27] + node _T_90 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_91 = bits(_T_90, 4, 4) @[el2_lsu_dccm_ctl.scala 184:92] + node _T_92 = bits(_T_91, 0, 0) @[el2_lsu_dccm_ctl.scala 184:97] + node _T_93 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_94 = bits(_T_93, 39, 32) @[el2_lsu_dccm_ctl.scala 184:154] + node _T_95 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 184:189] + node _T_96 = bits(picm_rd_data_m, 39, 32) @[el2_lsu_dccm_ctl.scala 184:210] + node _T_97 = bits(dccm_rdata_corr_m, 39, 32) @[el2_lsu_dccm_ctl.scala 184:241] + node _T_98 = mux(_T_95, _T_96, _T_97) @[el2_lsu_dccm_ctl.scala 184:171] + node _T_99 = mux(_T_92, _T_94, _T_98) @[el2_lsu_dccm_ctl.scala 184:36] + lsu_rdata_corr_m[4] <= _T_99 @[el2_lsu_dccm_ctl.scala 184:30] + node _T_100 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_101 = bits(_T_100, 4, 4) @[el2_lsu_dccm_ctl.scala 185:92] + node _T_102 = bits(_T_101, 0, 0) @[el2_lsu_dccm_ctl.scala 185:97] + node _T_103 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_104 = bits(_T_103, 39, 32) @[el2_lsu_dccm_ctl.scala 185:154] + node _T_105 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 185:189] + node _T_106 = bits(picm_rd_data_m, 39, 32) @[el2_lsu_dccm_ctl.scala 185:210] + node _T_107 = bits(dccm_rdata_m, 39, 32) @[el2_lsu_dccm_ctl.scala 185:236] + node _T_108 = mux(_T_105, _T_106, _T_107) @[el2_lsu_dccm_ctl.scala 185:171] + node _T_109 = mux(_T_102, _T_104, _T_108) @[el2_lsu_dccm_ctl.scala 185:36] + lsu_rdata_m[4] <= _T_109 @[el2_lsu_dccm_ctl.scala 185:30] + lsu_rdata_r[5] <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 180:27] + io.lsu_ld_data_r <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 181:27] + lsu_rdata_corr_r[5] <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 182:27] + node _T_110 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_111 = bits(_T_110, 5, 5) @[el2_lsu_dccm_ctl.scala 184:92] + node _T_112 = bits(_T_111, 0, 0) @[el2_lsu_dccm_ctl.scala 184:97] + node _T_113 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_114 = bits(_T_113, 47, 40) @[el2_lsu_dccm_ctl.scala 184:154] + node _T_115 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 184:189] + node _T_116 = bits(picm_rd_data_m, 47, 40) @[el2_lsu_dccm_ctl.scala 184:210] + node _T_117 = bits(dccm_rdata_corr_m, 47, 40) @[el2_lsu_dccm_ctl.scala 184:241] + node _T_118 = mux(_T_115, _T_116, _T_117) @[el2_lsu_dccm_ctl.scala 184:171] + node _T_119 = mux(_T_112, _T_114, _T_118) @[el2_lsu_dccm_ctl.scala 184:36] + lsu_rdata_corr_m[5] <= _T_119 @[el2_lsu_dccm_ctl.scala 184:30] + node _T_120 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_121 = bits(_T_120, 5, 5) @[el2_lsu_dccm_ctl.scala 185:92] + node _T_122 = bits(_T_121, 0, 0) @[el2_lsu_dccm_ctl.scala 185:97] + node _T_123 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_124 = bits(_T_123, 47, 40) @[el2_lsu_dccm_ctl.scala 185:154] + node _T_125 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 185:189] + node _T_126 = bits(picm_rd_data_m, 47, 40) @[el2_lsu_dccm_ctl.scala 185:210] + node _T_127 = bits(dccm_rdata_m, 47, 40) @[el2_lsu_dccm_ctl.scala 185:236] + node _T_128 = mux(_T_125, _T_126, _T_127) @[el2_lsu_dccm_ctl.scala 185:171] + node _T_129 = mux(_T_122, _T_124, _T_128) @[el2_lsu_dccm_ctl.scala 185:36] + lsu_rdata_m[5] <= _T_129 @[el2_lsu_dccm_ctl.scala 185:30] + lsu_rdata_r[6] <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 180:27] + io.lsu_ld_data_r <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 181:27] + lsu_rdata_corr_r[6] <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 182:27] + node _T_130 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_131 = bits(_T_130, 6, 6) @[el2_lsu_dccm_ctl.scala 184:92] + node _T_132 = bits(_T_131, 0, 0) @[el2_lsu_dccm_ctl.scala 184:97] + node _T_133 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_134 = bits(_T_133, 55, 48) @[el2_lsu_dccm_ctl.scala 184:154] + node _T_135 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 184:189] + node _T_136 = bits(picm_rd_data_m, 55, 48) @[el2_lsu_dccm_ctl.scala 184:210] + node _T_137 = bits(dccm_rdata_corr_m, 55, 48) @[el2_lsu_dccm_ctl.scala 184:241] + node _T_138 = mux(_T_135, _T_136, _T_137) @[el2_lsu_dccm_ctl.scala 184:171] + node _T_139 = mux(_T_132, _T_134, _T_138) @[el2_lsu_dccm_ctl.scala 184:36] + lsu_rdata_corr_m[6] <= _T_139 @[el2_lsu_dccm_ctl.scala 184:30] + node _T_140 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_141 = bits(_T_140, 6, 6) @[el2_lsu_dccm_ctl.scala 185:92] + node _T_142 = bits(_T_141, 0, 0) @[el2_lsu_dccm_ctl.scala 185:97] + node _T_143 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_144 = bits(_T_143, 55, 48) @[el2_lsu_dccm_ctl.scala 185:154] + node _T_145 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 185:189] + node _T_146 = bits(picm_rd_data_m, 55, 48) @[el2_lsu_dccm_ctl.scala 185:210] + node _T_147 = bits(dccm_rdata_m, 55, 48) @[el2_lsu_dccm_ctl.scala 185:236] + node _T_148 = mux(_T_145, _T_146, _T_147) @[el2_lsu_dccm_ctl.scala 185:171] + node _T_149 = mux(_T_142, _T_144, _T_148) @[el2_lsu_dccm_ctl.scala 185:36] + lsu_rdata_m[6] <= _T_149 @[el2_lsu_dccm_ctl.scala 185:30] + lsu_rdata_r[7] <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 180:27] + io.lsu_ld_data_r <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 181:27] + lsu_rdata_corr_r[7] <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 182:27] + node _T_150 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_151 = bits(_T_150, 7, 7) @[el2_lsu_dccm_ctl.scala 184:92] + node _T_152 = bits(_T_151, 0, 0) @[el2_lsu_dccm_ctl.scala 184:97] + node _T_153 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_154 = bits(_T_153, 63, 56) @[el2_lsu_dccm_ctl.scala 184:154] + node _T_155 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 184:189] + node _T_156 = bits(picm_rd_data_m, 63, 56) @[el2_lsu_dccm_ctl.scala 184:210] + node _T_157 = bits(dccm_rdata_corr_m, 63, 56) @[el2_lsu_dccm_ctl.scala 184:241] + node _T_158 = mux(_T_155, _T_156, _T_157) @[el2_lsu_dccm_ctl.scala 184:171] + node _T_159 = mux(_T_152, _T_154, _T_158) @[el2_lsu_dccm_ctl.scala 184:36] + lsu_rdata_corr_m[7] <= _T_159 @[el2_lsu_dccm_ctl.scala 184:30] + node _T_160 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_161 = bits(_T_160, 7, 7) @[el2_lsu_dccm_ctl.scala 185:92] + node _T_162 = bits(_T_161, 0, 0) @[el2_lsu_dccm_ctl.scala 185:97] + node _T_163 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_164 = bits(_T_163, 63, 56) @[el2_lsu_dccm_ctl.scala 185:154] + node _T_165 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 185:189] + node _T_166 = bits(picm_rd_data_m, 63, 56) @[el2_lsu_dccm_ctl.scala 185:210] + node _T_167 = bits(dccm_rdata_m, 63, 56) @[el2_lsu_dccm_ctl.scala 185:236] + node _T_168 = mux(_T_165, _T_166, _T_167) @[el2_lsu_dccm_ctl.scala 185:171] + node _T_169 = mux(_T_162, _T_164, _T_168) @[el2_lsu_dccm_ctl.scala 185:36] + lsu_rdata_m[7] <= _T_169 @[el2_lsu_dccm_ctl.scala 185:30] + node _T_170 = cat(lsu_rdata_m[1], lsu_rdata_m[0]) @[el2_lsu_dccm_ctl.scala 186:43] + node _T_171 = cat(lsu_rdata_m[3], lsu_rdata_m[2]) @[el2_lsu_dccm_ctl.scala 186:43] + node _T_172 = cat(_T_171, _T_170) @[el2_lsu_dccm_ctl.scala 186:43] + node _T_173 = cat(lsu_rdata_m[5], lsu_rdata_m[4]) @[el2_lsu_dccm_ctl.scala 186:43] + node _T_174 = cat(lsu_rdata_m[7], lsu_rdata_m[6]) @[el2_lsu_dccm_ctl.scala 186:43] + node _T_175 = cat(_T_174, _T_173) @[el2_lsu_dccm_ctl.scala 186:43] + node _T_176 = cat(_T_175, _T_172) @[el2_lsu_dccm_ctl.scala 186:43] + node _T_177 = bits(io.lsu_addr_m, 1, 0) @[el2_lsu_dccm_ctl.scala 186:70] + node _T_178 = mul(UInt<4>("h08"), _T_177) @[el2_lsu_dccm_ctl.scala 186:56] + node _T_179 = dshr(_T_176, _T_178) @[el2_lsu_dccm_ctl.scala 186:50] + io.lsu_ld_data_m <= _T_179 @[el2_lsu_dccm_ctl.scala 186:28] + node _T_180 = cat(lsu_rdata_corr_m[1], lsu_rdata_corr_m[0]) @[el2_lsu_dccm_ctl.scala 187:48] + node _T_181 = cat(lsu_rdata_corr_m[3], lsu_rdata_corr_m[2]) @[el2_lsu_dccm_ctl.scala 187:48] + node _T_182 = cat(_T_181, _T_180) @[el2_lsu_dccm_ctl.scala 187:48] + node _T_183 = cat(lsu_rdata_corr_m[5], lsu_rdata_corr_m[4]) @[el2_lsu_dccm_ctl.scala 187:48] + node _T_184 = cat(lsu_rdata_corr_m[7], lsu_rdata_corr_m[6]) @[el2_lsu_dccm_ctl.scala 187:48] + node _T_185 = cat(_T_184, _T_183) @[el2_lsu_dccm_ctl.scala 187:48] + node _T_186 = cat(_T_185, _T_182) @[el2_lsu_dccm_ctl.scala 187:48] + node _T_187 = bits(io.lsu_addr_m, 1, 0) @[el2_lsu_dccm_ctl.scala 187:75] + node _T_188 = mul(UInt<4>("h08"), _T_187) @[el2_lsu_dccm_ctl.scala 187:61] + node _T_189 = dshr(_T_186, _T_188) @[el2_lsu_dccm_ctl.scala 187:55] + lsu_ld_data_corr_m <= _T_189 @[el2_lsu_dccm_ctl.scala 187:28] + node _T_190 = bits(io.lsu_addr_d, 15, 2) @[el2_lsu_dccm_ctl.scala 190:44] + node _T_191 = bits(io.lsu_addr_r, 15, 2) @[el2_lsu_dccm_ctl.scala 190:81] + node _T_192 = eq(_T_190, _T_191) @[el2_lsu_dccm_ctl.scala 190:64] + node _T_193 = bits(io.end_addr_d, 15, 2) @[el2_lsu_dccm_ctl.scala 190:125] + node _T_194 = bits(io.lsu_addr_r, 15, 2) @[el2_lsu_dccm_ctl.scala 190:162] + node _T_195 = eq(_T_193, _T_194) @[el2_lsu_dccm_ctl.scala 190:145] + node _T_196 = or(_T_192, _T_195) @[el2_lsu_dccm_ctl.scala 190:109] + node _T_197 = and(_T_196, io.lsu_pkt_d.valid) @[el2_lsu_dccm_ctl.scala 190:191] + node _T_198 = and(_T_197, io.lsu_pkt_d.store) @[el2_lsu_dccm_ctl.scala 190:212] + node _T_199 = and(_T_198, io.lsu_pkt_d.dma) @[el2_lsu_dccm_ctl.scala 190:233] + node _T_200 = and(_T_199, io.addr_in_dccm_d) @[el2_lsu_dccm_ctl.scala 190:252] + node _T_201 = bits(io.lsu_addr_m, 15, 2) @[el2_lsu_dccm_ctl.scala 191:21] + node _T_202 = bits(io.lsu_addr_r, 15, 2) @[el2_lsu_dccm_ctl.scala 191:58] + node _T_203 = eq(_T_201, _T_202) @[el2_lsu_dccm_ctl.scala 191:41] + node _T_204 = bits(io.end_addr_m, 15, 2) @[el2_lsu_dccm_ctl.scala 191:102] + node _T_205 = bits(io.lsu_addr_r, 15, 2) @[el2_lsu_dccm_ctl.scala 191:139] + node _T_206 = eq(_T_204, _T_205) @[el2_lsu_dccm_ctl.scala 191:122] + node _T_207 = or(_T_203, _T_206) @[el2_lsu_dccm_ctl.scala 191:86] + node _T_208 = and(_T_207, io.lsu_pkt_m.valid) @[el2_lsu_dccm_ctl.scala 191:168] + node _T_209 = and(_T_208, io.lsu_pkt_m.store) @[el2_lsu_dccm_ctl.scala 191:189] + node _T_210 = and(_T_209, io.lsu_pkt_m.dma) @[el2_lsu_dccm_ctl.scala 191:210] + node _T_211 = and(_T_210, io.addr_in_dccm_m) @[el2_lsu_dccm_ctl.scala 191:229] + node kill_ecc_corr_lo_r = or(_T_200, _T_211) @[el2_lsu_dccm_ctl.scala 190:273] + node _T_212 = bits(io.lsu_addr_d, 15, 2) @[el2_lsu_dccm_ctl.scala 192:44] + node _T_213 = bits(io.end_addr_r, 15, 2) @[el2_lsu_dccm_ctl.scala 192:81] + node _T_214 = eq(_T_212, _T_213) @[el2_lsu_dccm_ctl.scala 192:64] + node _T_215 = bits(io.end_addr_d, 15, 2) @[el2_lsu_dccm_ctl.scala 192:125] + node _T_216 = bits(io.end_addr_r, 15, 2) @[el2_lsu_dccm_ctl.scala 192:162] + node _T_217 = eq(_T_215, _T_216) @[el2_lsu_dccm_ctl.scala 192:145] + node _T_218 = or(_T_214, _T_217) @[el2_lsu_dccm_ctl.scala 192:109] + node _T_219 = and(_T_218, io.lsu_pkt_d.valid) @[el2_lsu_dccm_ctl.scala 192:191] + node _T_220 = and(_T_219, io.lsu_pkt_d.store) @[el2_lsu_dccm_ctl.scala 192:212] + node _T_221 = and(_T_220, io.lsu_pkt_d.dma) @[el2_lsu_dccm_ctl.scala 192:233] + node _T_222 = and(_T_221, io.addr_in_dccm_d) @[el2_lsu_dccm_ctl.scala 192:252] + node _T_223 = bits(io.lsu_addr_m, 15, 2) @[el2_lsu_dccm_ctl.scala 193:21] + node _T_224 = bits(io.end_addr_r, 15, 2) @[el2_lsu_dccm_ctl.scala 193:58] + node _T_225 = eq(_T_223, _T_224) @[el2_lsu_dccm_ctl.scala 193:41] + node _T_226 = bits(io.end_addr_m, 15, 2) @[el2_lsu_dccm_ctl.scala 193:102] + node _T_227 = bits(io.end_addr_r, 15, 2) @[el2_lsu_dccm_ctl.scala 193:139] + node _T_228 = eq(_T_226, _T_227) @[el2_lsu_dccm_ctl.scala 193:122] + node _T_229 = or(_T_225, _T_228) @[el2_lsu_dccm_ctl.scala 193:86] + node _T_230 = and(_T_229, io.lsu_pkt_m.valid) @[el2_lsu_dccm_ctl.scala 193:168] + node _T_231 = and(_T_230, io.lsu_pkt_m.store) @[el2_lsu_dccm_ctl.scala 193:189] + node _T_232 = and(_T_231, io.lsu_pkt_m.dma) @[el2_lsu_dccm_ctl.scala 193:210] + node _T_233 = and(_T_232, io.addr_in_dccm_m) @[el2_lsu_dccm_ctl.scala 193:229] + node kill_ecc_corr_hi_r = or(_T_222, _T_233) @[el2_lsu_dccm_ctl.scala 192:273] + node _T_234 = and(io.lsu_pkt_r.load, io.single_ecc_error_lo_r) @[el2_lsu_dccm_ctl.scala 194:55] + node _T_235 = not(io.lsu_raw_fwd_lo_r) @[el2_lsu_dccm_ctl.scala 194:84] + node ld_single_ecc_error_lo_r = and(_T_234, _T_235) @[el2_lsu_dccm_ctl.scala 194:82] + node _T_236 = and(io.lsu_pkt_r.load, io.single_ecc_error_hi_r) @[el2_lsu_dccm_ctl.scala 195:55] + node _T_237 = not(io.lsu_raw_fwd_hi_r) @[el2_lsu_dccm_ctl.scala 195:84] + node ld_single_ecc_error_hi_r = and(_T_236, _T_237) @[el2_lsu_dccm_ctl.scala 195:82] + node _T_238 = or(ld_single_ecc_error_lo_r, ld_single_ecc_error_hi_r) @[el2_lsu_dccm_ctl.scala 196:62] + node _T_239 = not(io.lsu_double_ecc_error_r) @[el2_lsu_dccm_ctl.scala 196:92] + node _T_240 = and(_T_238, _T_239) @[el2_lsu_dccm_ctl.scala 196:90] + io.ld_single_ecc_error_r <= _T_240 @[el2_lsu_dccm_ctl.scala 196:33] + node _T_241 = or(io.lsu_commit_r, io.lsu_pkt_r.dma) @[el2_lsu_dccm_ctl.scala 197:81] + node _T_242 = and(ld_single_ecc_error_lo_r, _T_241) @[el2_lsu_dccm_ctl.scala 197:62] + node _T_243 = not(kill_ecc_corr_lo_r) @[el2_lsu_dccm_ctl.scala 197:103] + node ld_single_ecc_error_lo_r_ns = and(_T_242, _T_243) @[el2_lsu_dccm_ctl.scala 197:101] + node _T_244 = or(io.lsu_commit_r, io.lsu_pkt_r.dma) @[el2_lsu_dccm_ctl.scala 198:81] + node _T_245 = and(ld_single_ecc_error_hi_r, _T_244) @[el2_lsu_dccm_ctl.scala 198:62] + node _T_246 = not(kill_ecc_corr_hi_r) @[el2_lsu_dccm_ctl.scala 198:103] + node ld_single_ecc_error_hi_r_ns = and(_T_245, _T_246) @[el2_lsu_dccm_ctl.scala 198:101] + reg lsu_double_ecc_error_r_ff : UInt, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_dccm_ctl.scala 200:74] + lsu_double_ecc_error_r_ff <= io.lsu_double_ecc_error_r @[el2_lsu_dccm_ctl.scala 200:74] + reg ld_single_ecc_error_hi_r_ff : UInt, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_dccm_ctl.scala 201:74] + ld_single_ecc_error_hi_r_ff <= ld_single_ecc_error_hi_r_ns @[el2_lsu_dccm_ctl.scala 201:74] + reg ld_single_ecc_error_lo_r_ff : UInt, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_dccm_ctl.scala 202:74] + ld_single_ecc_error_lo_r_ff <= ld_single_ecc_error_lo_r_ns @[el2_lsu_dccm_ctl.scala 202:74] + node _T_247 = bits(io.end_addr_r, 15, 0) @[el2_lsu_dccm_ctl.scala 206:49] + node _T_248 = bits(io.ld_single_ecc_error_r, 0, 0) @[el2_lsu_dccm_ctl.scala 206:94] + node _T_249 = bits(io.scan_mode, 0, 0) @[el2_lsu_dccm_ctl.scala 206:121] + inst rvclkhdr of rvclkhdr @[beh_lib.scala 351:21] + rvclkhdr.clock <= clock + rvclkhdr.reset <= reset + rvclkhdr.io.clk <= io.clk @[beh_lib.scala 353:16] + rvclkhdr.io.en <= _T_248 @[beh_lib.scala 354:15] + rvclkhdr.io.scan_mode <= _T_249 @[beh_lib.scala 355:22] + reg ld_sec_addr_hi_r_ff : UInt, rvclkhdr.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[beh_lib.scala 357:14] + ld_sec_addr_hi_r_ff <= _T_247 @[beh_lib.scala 357:14] + node _T_250 = bits(io.lsu_addr_r, 15, 0) @[el2_lsu_dccm_ctl.scala 207:49] + node _T_251 = bits(io.ld_single_ecc_error_r, 0, 0) @[el2_lsu_dccm_ctl.scala 207:94] + node _T_252 = bits(io.scan_mode, 0, 0) @[el2_lsu_dccm_ctl.scala 207:121] + inst rvclkhdr_1 of rvclkhdr_1 @[beh_lib.scala 351:21] + rvclkhdr_1.clock <= clock + rvclkhdr_1.reset <= reset + rvclkhdr_1.io.clk <= io.clk @[beh_lib.scala 353:16] + rvclkhdr_1.io.en <= _T_251 @[beh_lib.scala 354:15] + rvclkhdr_1.io.scan_mode <= _T_252 @[beh_lib.scala 355:22] + reg ld_sec_addr_lo_r_ff : UInt, rvclkhdr_1.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[beh_lib.scala 357:14] + ld_sec_addr_lo_r_ff <= _T_250 @[beh_lib.scala 357:14] + node _T_253 = or(io.lsu_pkt_d.word, io.lsu_pkt_d.dword) @[el2_lsu_dccm_ctl.scala 208:110] + node _T_254 = not(_T_253) @[el2_lsu_dccm_ctl.scala 208:90] + node _T_255 = bits(io.lsu_addr_d, 1, 0) @[el2_lsu_dccm_ctl.scala 208:148] + node _T_256 = neq(_T_255, UInt<2>("h00")) @[el2_lsu_dccm_ctl.scala 208:154] + node _T_257 = or(_T_254, _T_256) @[el2_lsu_dccm_ctl.scala 208:132] + node _T_258 = and(io.lsu_pkt_d.store, _T_257) @[el2_lsu_dccm_ctl.scala 208:87] + node _T_259 = or(io.lsu_pkt_d.load, _T_258) @[el2_lsu_dccm_ctl.scala 208:65] + node _T_260 = and(io.lsu_pkt_d.valid, _T_259) @[el2_lsu_dccm_ctl.scala 208:44] + node lsu_dccm_rden_d = and(_T_260, io.addr_in_dccm_d) @[el2_lsu_dccm_ctl.scala 208:171] + node _T_261 = or(ld_single_ecc_error_lo_r_ff, ld_single_ecc_error_hi_r_ff) @[el2_lsu_dccm_ctl.scala 211:63] + node _T_262 = not(lsu_double_ecc_error_r_ff) @[el2_lsu_dccm_ctl.scala 211:96] + node _T_263 = and(_T_261, _T_262) @[el2_lsu_dccm_ctl.scala 211:94] + io.ld_single_ecc_error_r_ff <= _T_263 @[el2_lsu_dccm_ctl.scala 211:31] + node _T_264 = or(lsu_dccm_rden_d, io.dma_dccm_wen) @[el2_lsu_dccm_ctl.scala 212:71] + node _T_265 = or(_T_264, io.ld_single_ecc_error_r_ff) @[el2_lsu_dccm_ctl.scala 212:89] + node _T_266 = not(_T_265) @[el2_lsu_dccm_ctl.scala 212:53] + node _T_267 = bits(io.stbuf_addr_any, 3, 2) @[el2_lsu_dccm_ctl.scala 213:44] + node _T_268 = bits(io.lsu_addr_d, 3, 2) @[el2_lsu_dccm_ctl.scala 213:124] + node _T_269 = eq(_T_267, _T_268) @[el2_lsu_dccm_ctl.scala 213:107] + node _T_270 = bits(io.stbuf_addr_any, 3, 2) @[el2_lsu_dccm_ctl.scala 214:25] + node _T_271 = bits(io.end_addr_d, 3, 2) @[el2_lsu_dccm_ctl.scala 214:105] + node _T_272 = eq(_T_270, _T_271) @[el2_lsu_dccm_ctl.scala 214:88] + node _T_273 = or(_T_269, _T_272) @[el2_lsu_dccm_ctl.scala 213:195] + node _T_274 = not(_T_273) @[el2_lsu_dccm_ctl.scala 213:24] + node _T_275 = and(lsu_dccm_rden_d, _T_274) @[el2_lsu_dccm_ctl.scala 213:22] + node _T_276 = or(_T_266, _T_275) @[el2_lsu_dccm_ctl.scala 212:120] + node _T_277 = and(io.stbuf_reqvld_any, _T_276) @[el2_lsu_dccm_ctl.scala 212:50] + io.lsu_stbuf_commit_any <= _T_277 @[el2_lsu_dccm_ctl.scala 212:27] + node _T_278 = or(io.dma_dccm_wen, io.lsu_stbuf_commit_any) @[el2_lsu_dccm_ctl.scala 217:41] + node _T_279 = or(_T_278, io.ld_single_ecc_error_r_ff) @[el2_lsu_dccm_ctl.scala 217:67] + io.dccm_wren <= _T_279 @[el2_lsu_dccm_ctl.scala 217:22] + node _T_280 = and(lsu_dccm_rden_d, io.addr_in_dccm_d) @[el2_lsu_dccm_ctl.scala 218:41] + io.dccm_rden <= _T_280 @[el2_lsu_dccm_ctl.scala 218:22] + node _T_281 = bits(io.ld_single_ecc_error_r_ff, 0, 0) @[el2_lsu_dccm_ctl.scala 219:57] + node _T_282 = eq(ld_single_ecc_error_lo_r_ff, UInt<1>("h01")) @[el2_lsu_dccm_ctl.scala 220:36] + node _T_283 = bits(ld_sec_addr_lo_r_ff, 15, 0) @[el2_lsu_dccm_ctl.scala 220:62] + node _T_284 = bits(ld_sec_addr_hi_r_ff, 15, 0) @[el2_lsu_dccm_ctl.scala 220:101] + node _T_285 = mux(_T_282, _T_283, _T_284) @[el2_lsu_dccm_ctl.scala 220:8] + node _T_286 = bits(io.dma_dccm_wen, 0, 0) @[el2_lsu_dccm_ctl.scala 221:25] + node _T_287 = bits(io.lsu_addr_d, 15, 0) @[el2_lsu_dccm_ctl.scala 221:45] + node _T_288 = bits(io.stbuf_addr_any, 15, 0) @[el2_lsu_dccm_ctl.scala 221:82] + node _T_289 = mux(_T_286, _T_287, _T_288) @[el2_lsu_dccm_ctl.scala 221:8] + node _T_290 = mux(_T_281, _T_285, _T_289) @[el2_lsu_dccm_ctl.scala 219:28] + io.dccm_wr_addr_lo <= _T_290 @[el2_lsu_dccm_ctl.scala 219:22] + node _T_291 = bits(io.ld_single_ecc_error_r_ff, 0, 0) @[el2_lsu_dccm_ctl.scala 222:57] + node _T_292 = eq(ld_single_ecc_error_hi_r_ff, UInt<1>("h01")) @[el2_lsu_dccm_ctl.scala 223:36] + node _T_293 = bits(ld_sec_addr_hi_r_ff, 15, 0) @[el2_lsu_dccm_ctl.scala 223:63] + node _T_294 = bits(ld_sec_addr_lo_r_ff, 15, 0) @[el2_lsu_dccm_ctl.scala 223:103] + node _T_295 = mux(_T_292, _T_293, _T_294) @[el2_lsu_dccm_ctl.scala 223:8] + node _T_296 = bits(io.dma_dccm_wen, 0, 0) @[el2_lsu_dccm_ctl.scala 224:25] + node _T_297 = bits(io.end_addr_d, 15, 0) @[el2_lsu_dccm_ctl.scala 224:46] + node _T_298 = bits(io.stbuf_addr_any, 15, 0) @[el2_lsu_dccm_ctl.scala 224:83] + node _T_299 = mux(_T_296, _T_297, _T_298) @[el2_lsu_dccm_ctl.scala 224:8] + node _T_300 = mux(_T_291, _T_295, _T_299) @[el2_lsu_dccm_ctl.scala 222:28] + io.dccm_wr_addr_hi <= _T_300 @[el2_lsu_dccm_ctl.scala 222:22] + node _T_301 = bits(io.lsu_addr_d, 15, 0) @[el2_lsu_dccm_ctl.scala 225:38] + io.dccm_rd_addr_lo <= _T_301 @[el2_lsu_dccm_ctl.scala 225:22] + node _T_302 = bits(io.end_addr_d, 15, 0) @[el2_lsu_dccm_ctl.scala 226:38] + io.dccm_rd_addr_hi <= _T_302 @[el2_lsu_dccm_ctl.scala 226:22] + node _T_303 = bits(io.ld_single_ecc_error_r_ff, 0, 0) @[el2_lsu_dccm_ctl.scala 227:57] + node _T_304 = eq(ld_single_ecc_error_lo_r_ff, UInt<1>("h00")) @[el2_lsu_dccm_ctl.scala 228:36] + node _T_305 = bits(io.sec_data_ecc_lo_r_ff, 6, 0) @[el2_lsu_dccm_ctl.scala 228:70] + node _T_306 = bits(io.sec_data_lo_r_ff, 31, 0) @[el2_lsu_dccm_ctl.scala 228:114] + node _T_307 = cat(_T_305, _T_306) @[Cat.scala 29:58] + node _T_308 = bits(io.sec_data_ecc_hi_r_ff, 6, 0) @[el2_lsu_dccm_ctl.scala 229:34] + node _T_309 = bits(io.sec_data_hi_r_ff, 31, 0) @[el2_lsu_dccm_ctl.scala 229:78] + node _T_310 = cat(_T_308, _T_309) @[Cat.scala 29:58] + node _T_311 = mux(_T_304, _T_307, _T_310) @[el2_lsu_dccm_ctl.scala 228:8] + node _T_312 = bits(io.dma_dccm_wen, 0, 0) @[el2_lsu_dccm_ctl.scala 230:25] + node _T_313 = bits(io.dma_dccm_wdata_ecc_lo, 6, 0) @[el2_lsu_dccm_ctl.scala 230:60] + node _T_314 = bits(io.dma_dccm_wdata_lo, 31, 0) @[el2_lsu_dccm_ctl.scala 230:105] + node _T_315 = cat(_T_313, _T_314) @[Cat.scala 29:58] + node _T_316 = bits(io.stbuf_ecc_any, 6, 0) @[el2_lsu_dccm_ctl.scala 231:27] + node _T_317 = bits(io.stbuf_data_any, 31, 0) @[el2_lsu_dccm_ctl.scala 231:69] + node _T_318 = cat(_T_316, _T_317) @[Cat.scala 29:58] + node _T_319 = mux(_T_312, _T_315, _T_318) @[el2_lsu_dccm_ctl.scala 230:8] + node _T_320 = mux(_T_303, _T_311, _T_319) @[el2_lsu_dccm_ctl.scala 227:28] + io.dccm_wr_data_lo <= _T_320 @[el2_lsu_dccm_ctl.scala 227:22] + node _T_321 = bits(io.ld_single_ecc_error_r_ff, 0, 0) @[el2_lsu_dccm_ctl.scala 233:57] + node _T_322 = eq(ld_single_ecc_error_hi_r_ff, UInt<1>("h00")) @[el2_lsu_dccm_ctl.scala 234:36] + node _T_323 = bits(io.sec_data_ecc_hi_r_ff, 6, 0) @[el2_lsu_dccm_ctl.scala 234:71] + node _T_324 = bits(io.sec_data_hi_r_ff, 31, 0) @[el2_lsu_dccm_ctl.scala 234:115] + node _T_325 = cat(_T_323, _T_324) @[Cat.scala 29:58] + node _T_326 = bits(io.sec_data_ecc_lo_r_ff, 6, 0) @[el2_lsu_dccm_ctl.scala 235:34] + node _T_327 = bits(io.sec_data_lo_r_ff, 31, 0) @[el2_lsu_dccm_ctl.scala 235:78] + node _T_328 = cat(_T_326, _T_327) @[Cat.scala 29:58] + node _T_329 = mux(_T_322, _T_325, _T_328) @[el2_lsu_dccm_ctl.scala 234:8] + node _T_330 = bits(io.dma_dccm_wen, 0, 0) @[el2_lsu_dccm_ctl.scala 236:25] + node _T_331 = bits(io.dma_dccm_wdata_ecc_hi, 6, 0) @[el2_lsu_dccm_ctl.scala 236:61] + node _T_332 = bits(io.dma_dccm_wdata_hi, 31, 0) @[el2_lsu_dccm_ctl.scala 236:106] + node _T_333 = cat(_T_331, _T_332) @[Cat.scala 29:58] + node _T_334 = bits(io.stbuf_ecc_any, 6, 0) @[el2_lsu_dccm_ctl.scala 237:27] + node _T_335 = bits(io.stbuf_data_any, 31, 0) @[el2_lsu_dccm_ctl.scala 237:69] + node _T_336 = cat(_T_334, _T_335) @[Cat.scala 29:58] + node _T_337 = mux(_T_330, _T_333, _T_336) @[el2_lsu_dccm_ctl.scala 236:8] + node _T_338 = mux(_T_321, _T_329, _T_337) @[el2_lsu_dccm_ctl.scala 233:28] + io.dccm_wr_data_hi <= _T_338 @[el2_lsu_dccm_ctl.scala 233:22] + node _T_339 = bits(io.lsu_pkt_m.store, 0, 0) @[Bitwise.scala 72:15] + node _T_340 = mux(_T_339, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_341 = bits(io.lsu_pkt_m.by, 0, 0) @[Bitwise.scala 72:15] + node _T_342 = mux(_T_341, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_343 = and(_T_342, UInt<4>("h01")) @[el2_lsu_dccm_ctl.scala 240:84] + node _T_344 = bits(io.lsu_pkt_m.half, 0, 0) @[Bitwise.scala 72:15] + node _T_345 = mux(_T_344, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_346 = and(_T_345, UInt<4>("h03")) @[el2_lsu_dccm_ctl.scala 241:33] + node _T_347 = or(_T_343, _T_346) @[el2_lsu_dccm_ctl.scala 240:97] + node _T_348 = bits(io.lsu_pkt_m.word, 0, 0) @[Bitwise.scala 72:15] + node _T_349 = mux(_T_348, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_350 = and(_T_349, UInt<4>("h0f")) @[el2_lsu_dccm_ctl.scala 242:33] + node _T_351 = or(_T_347, _T_350) @[el2_lsu_dccm_ctl.scala 241:46] + node store_byteen_m = and(_T_340, _T_351) @[el2_lsu_dccm_ctl.scala 240:53] + node _T_352 = bits(io.lsu_pkt_r.store, 0, 0) @[Bitwise.scala 72:15] + node _T_353 = mux(_T_352, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_354 = bits(io.lsu_pkt_r.by, 0, 0) @[Bitwise.scala 72:15] + node _T_355 = mux(_T_354, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_356 = and(_T_355, UInt<4>("h01")) @[el2_lsu_dccm_ctl.scala 243:84] + node _T_357 = bits(io.lsu_pkt_r.half, 0, 0) @[Bitwise.scala 72:15] + node _T_358 = mux(_T_357, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_359 = and(_T_358, UInt<4>("h03")) @[el2_lsu_dccm_ctl.scala 244:33] + node _T_360 = or(_T_356, _T_359) @[el2_lsu_dccm_ctl.scala 243:97] + node _T_361 = bits(io.lsu_pkt_r.word, 0, 0) @[Bitwise.scala 72:15] + node _T_362 = mux(_T_361, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_363 = and(_T_362, UInt<4>("h0f")) @[el2_lsu_dccm_ctl.scala 245:33] + node _T_364 = or(_T_360, _T_363) @[el2_lsu_dccm_ctl.scala 244:46] + node store_byteen_r = and(_T_353, _T_364) @[el2_lsu_dccm_ctl.scala 243:53] + node _T_365 = bits(store_byteen_m, 3, 0) @[el2_lsu_dccm_ctl.scala 246:55] + node _T_366 = cat(UInt<4>("h00"), _T_365) @[Cat.scala 29:58] + node _T_367 = bits(io.lsu_addr_m, 1, 0) @[el2_lsu_dccm_ctl.scala 246:78] + node store_byteen_ext_m = dshl(_T_366, _T_367) @[el2_lsu_dccm_ctl.scala 246:62] + node _T_368 = bits(store_byteen_r, 3, 0) @[el2_lsu_dccm_ctl.scala 247:55] + node _T_369 = cat(UInt<4>("h00"), _T_368) @[Cat.scala 29:58] + node _T_370 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_dccm_ctl.scala 247:78] + node store_byteen_ext_r = dshl(_T_369, _T_370) @[el2_lsu_dccm_ctl.scala 247:62] + node _T_371 = bits(io.stbuf_addr_any, 15, 2) @[el2_lsu_dccm_ctl.scala 250:51] + node _T_372 = bits(io.lsu_addr_m, 15, 2) @[el2_lsu_dccm_ctl.scala 250:88] + node _T_373 = eq(_T_371, _T_372) @[el2_lsu_dccm_ctl.scala 250:71] + node dccm_wr_bypass_d_m_lo = and(_T_373, io.addr_in_dccm_m) @[el2_lsu_dccm_ctl.scala 250:109] + node _T_374 = bits(io.stbuf_addr_any, 15, 2) @[el2_lsu_dccm_ctl.scala 251:51] + node _T_375 = bits(io.end_addr_m, 15, 2) @[el2_lsu_dccm_ctl.scala 251:88] + node _T_376 = eq(_T_374, _T_375) @[el2_lsu_dccm_ctl.scala 251:71] + node dccm_wr_bypass_d_m_hi = and(_T_376, io.addr_in_dccm_m) @[el2_lsu_dccm_ctl.scala 251:109] + node _T_377 = bits(io.stbuf_addr_any, 15, 2) @[el2_lsu_dccm_ctl.scala 253:51] + node _T_378 = bits(io.lsu_addr_r, 15, 2) @[el2_lsu_dccm_ctl.scala 253:88] + node _T_379 = eq(_T_377, _T_378) @[el2_lsu_dccm_ctl.scala 253:71] + node dccm_wr_bypass_d_r_lo = and(_T_379, io.addr_in_dccm_r) @[el2_lsu_dccm_ctl.scala 253:109] + node _T_380 = bits(io.stbuf_addr_any, 15, 2) @[el2_lsu_dccm_ctl.scala 254:51] + node _T_381 = bits(io.end_addr_r, 15, 2) @[el2_lsu_dccm_ctl.scala 254:88] + node _T_382 = eq(_T_380, _T_381) @[el2_lsu_dccm_ctl.scala 254:71] + node dccm_wr_bypass_d_r_hi = and(_T_382, io.addr_in_dccm_r) @[el2_lsu_dccm_ctl.scala 254:109] + wire dccm_wr_bypass_d_m_hi_Q : UInt<1> + dccm_wr_bypass_d_m_hi_Q <= UInt<1>("h00") + wire dccm_wr_bypass_d_m_lo_Q : UInt<1> + dccm_wr_bypass_d_m_lo_Q <= UInt<1>("h00") + wire dccm_wren_Q : UInt<1> + dccm_wren_Q <= UInt<1>("h00") + wire dccm_wr_data_Q : UInt<32> + dccm_wr_data_Q <= UInt<32>("h00") + wire store_data_pre_r : UInt<64> + store_data_pre_r <= UInt<64>("h00") + wire store_data_pre_hi_r : UInt<32> + store_data_pre_hi_r <= UInt<32>("h00") + wire store_data_pre_lo_r : UInt<32> + store_data_pre_lo_r <= UInt<32>("h00") + wire store_data_pre_m : UInt<64> + store_data_pre_m <= UInt<64>("h00") + wire store_data_hi_m : UInt<32> + store_data_hi_m <= UInt<32>("h00") + wire store_data_lo_m : UInt<32> + store_data_lo_m <= UInt<32>("h00") + node _T_383 = mux(UInt<1>("h00"), UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_384 = bits(io.store_data_m, 31, 0) @[el2_lsu_dccm_ctl.scala 287:64] + node _T_385 = cat(_T_383, _T_384) @[Cat.scala 29:58] + node _T_386 = bits(io.lsu_addr_m, 1, 0) @[el2_lsu_dccm_ctl.scala 287:92] + node _T_387 = mul(UInt<4>("h08"), _T_386) @[el2_lsu_dccm_ctl.scala 287:78] + node _T_388 = dshl(_T_385, _T_387) @[el2_lsu_dccm_ctl.scala 287:72] + store_data_pre_m <= _T_388 @[el2_lsu_dccm_ctl.scala 287:29] + node _T_389 = bits(store_data_pre_m, 63, 32) @[el2_lsu_dccm_ctl.scala 288:48] + store_data_hi_m <= _T_389 @[el2_lsu_dccm_ctl.scala 288:29] + node _T_390 = bits(store_data_pre_m, 31, 0) @[el2_lsu_dccm_ctl.scala 289:48] + store_data_lo_m <= _T_390 @[el2_lsu_dccm_ctl.scala 289:29] + node _T_391 = bits(store_byteen_ext_m, 0, 0) @[el2_lsu_dccm_ctl.scala 290:123] + node _T_392 = bits(_T_391, 0, 0) @[el2_lsu_dccm_ctl.scala 290:127] + node _T_393 = bits(store_data_lo_m, 7, 0) @[el2_lsu_dccm_ctl.scala 290:151] + node _T_394 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_m_lo) @[el2_lsu_dccm_ctl.scala 290:195] + node _T_395 = bits(_T_394, 0, 0) @[el2_lsu_dccm_ctl.scala 290:221] + node _T_396 = bits(io.stbuf_data_any, 7, 0) @[el2_lsu_dccm_ctl.scala 290:246] + node _T_397 = bits(io.sec_data_lo_m, 7, 0) @[el2_lsu_dccm_ctl.scala 290:276] + node _T_398 = mux(_T_395, _T_396, _T_397) @[el2_lsu_dccm_ctl.scala 290:169] + node _T_399 = mux(_T_392, _T_393, _T_398) @[el2_lsu_dccm_ctl.scala 290:104] + node _T_400 = bits(store_byteen_ext_m, 1, 1) @[el2_lsu_dccm_ctl.scala 290:123] + node _T_401 = bits(_T_400, 0, 0) @[el2_lsu_dccm_ctl.scala 290:127] + node _T_402 = bits(store_data_lo_m, 15, 8) @[el2_lsu_dccm_ctl.scala 290:151] + node _T_403 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_m_lo) @[el2_lsu_dccm_ctl.scala 290:195] + node _T_404 = bits(_T_403, 0, 0) @[el2_lsu_dccm_ctl.scala 290:221] + node _T_405 = bits(io.stbuf_data_any, 15, 8) @[el2_lsu_dccm_ctl.scala 290:246] + node _T_406 = bits(io.sec_data_lo_m, 15, 8) @[el2_lsu_dccm_ctl.scala 290:276] + node _T_407 = mux(_T_404, _T_405, _T_406) @[el2_lsu_dccm_ctl.scala 290:169] + node _T_408 = mux(_T_401, _T_402, _T_407) @[el2_lsu_dccm_ctl.scala 290:104] + node _T_409 = bits(store_byteen_ext_m, 2, 2) @[el2_lsu_dccm_ctl.scala 290:123] + node _T_410 = bits(_T_409, 0, 0) @[el2_lsu_dccm_ctl.scala 290:127] + node _T_411 = bits(store_data_lo_m, 23, 16) @[el2_lsu_dccm_ctl.scala 290:151] + node _T_412 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_m_lo) @[el2_lsu_dccm_ctl.scala 290:195] + node _T_413 = bits(_T_412, 0, 0) @[el2_lsu_dccm_ctl.scala 290:221] + node _T_414 = bits(io.stbuf_data_any, 23, 16) @[el2_lsu_dccm_ctl.scala 290:246] + node _T_415 = bits(io.sec_data_lo_m, 23, 16) @[el2_lsu_dccm_ctl.scala 290:276] + node _T_416 = mux(_T_413, _T_414, _T_415) @[el2_lsu_dccm_ctl.scala 290:169] + node _T_417 = mux(_T_410, _T_411, _T_416) @[el2_lsu_dccm_ctl.scala 290:104] + node _T_418 = bits(store_byteen_ext_m, 3, 3) @[el2_lsu_dccm_ctl.scala 290:123] + node _T_419 = bits(_T_418, 0, 0) @[el2_lsu_dccm_ctl.scala 290:127] + node _T_420 = bits(store_data_lo_m, 31, 24) @[el2_lsu_dccm_ctl.scala 290:151] + node _T_421 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_m_lo) @[el2_lsu_dccm_ctl.scala 290:195] + node _T_422 = bits(_T_421, 0, 0) @[el2_lsu_dccm_ctl.scala 290:221] + node _T_423 = bits(io.stbuf_data_any, 31, 24) @[el2_lsu_dccm_ctl.scala 290:246] + node _T_424 = bits(io.sec_data_lo_m, 31, 24) @[el2_lsu_dccm_ctl.scala 290:276] + node _T_425 = mux(_T_422, _T_423, _T_424) @[el2_lsu_dccm_ctl.scala 290:169] + node _T_426 = mux(_T_419, _T_420, _T_425) @[el2_lsu_dccm_ctl.scala 290:104] + wire _T_427 : UInt<8>[4] @[el2_lsu_dccm_ctl.scala 290:96] + _T_427[0] <= _T_399 @[el2_lsu_dccm_ctl.scala 290:96] + _T_427[1] <= _T_408 @[el2_lsu_dccm_ctl.scala 290:96] + _T_427[2] <= _T_417 @[el2_lsu_dccm_ctl.scala 290:96] + _T_427[3] <= _T_426 @[el2_lsu_dccm_ctl.scala 290:96] + node _T_428 = cat(_T_427[2], _T_427[3]) @[Cat.scala 29:58] + node _T_429 = cat(_T_427[0], _T_427[1]) @[Cat.scala 29:58] + node _T_430 = cat(_T_429, _T_428) @[Cat.scala 29:58] + reg _T_431 : UInt, io.lsu_store_c1_r_clk @[el2_lsu_dccm_ctl.scala 290:72] + _T_431 <= _T_430 @[el2_lsu_dccm_ctl.scala 290:72] + io.store_data_lo_r <= _T_431 @[el2_lsu_dccm_ctl.scala 290:29] + node _T_432 = bits(store_byteen_ext_m, 4, 4) @[el2_lsu_dccm_ctl.scala 291:123] + node _T_433 = bits(_T_432, 0, 0) @[el2_lsu_dccm_ctl.scala 291:129] + node _T_434 = bits(store_data_hi_m, 7, 0) @[el2_lsu_dccm_ctl.scala 291:151] + node _T_435 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_m_hi) @[el2_lsu_dccm_ctl.scala 291:195] + node _T_436 = bits(_T_435, 0, 0) @[el2_lsu_dccm_ctl.scala 291:221] + node _T_437 = bits(io.stbuf_data_any, 7, 0) @[el2_lsu_dccm_ctl.scala 291:246] + node _T_438 = bits(io.sec_data_hi_m, 7, 0) @[el2_lsu_dccm_ctl.scala 291:276] + node _T_439 = mux(_T_436, _T_437, _T_438) @[el2_lsu_dccm_ctl.scala 291:169] + node _T_440 = mux(_T_433, _T_434, _T_439) @[el2_lsu_dccm_ctl.scala 291:104] + node _T_441 = bits(store_byteen_ext_m, 5, 5) @[el2_lsu_dccm_ctl.scala 291:123] + node _T_442 = bits(_T_441, 0, 0) @[el2_lsu_dccm_ctl.scala 291:129] + node _T_443 = bits(store_data_hi_m, 15, 8) @[el2_lsu_dccm_ctl.scala 291:151] + node _T_444 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_m_hi) @[el2_lsu_dccm_ctl.scala 291:195] + node _T_445 = bits(_T_444, 0, 0) @[el2_lsu_dccm_ctl.scala 291:221] + node _T_446 = bits(io.stbuf_data_any, 15, 8) @[el2_lsu_dccm_ctl.scala 291:246] + node _T_447 = bits(io.sec_data_hi_m, 15, 8) @[el2_lsu_dccm_ctl.scala 291:276] + node _T_448 = mux(_T_445, _T_446, _T_447) @[el2_lsu_dccm_ctl.scala 291:169] + node _T_449 = mux(_T_442, _T_443, _T_448) @[el2_lsu_dccm_ctl.scala 291:104] + node _T_450 = bits(store_byteen_ext_m, 6, 6) @[el2_lsu_dccm_ctl.scala 291:123] + node _T_451 = bits(_T_450, 0, 0) @[el2_lsu_dccm_ctl.scala 291:129] + node _T_452 = bits(store_data_hi_m, 23, 16) @[el2_lsu_dccm_ctl.scala 291:151] + node _T_453 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_m_hi) @[el2_lsu_dccm_ctl.scala 291:195] + node _T_454 = bits(_T_453, 0, 0) @[el2_lsu_dccm_ctl.scala 291:221] + node _T_455 = bits(io.stbuf_data_any, 23, 16) @[el2_lsu_dccm_ctl.scala 291:246] + node _T_456 = bits(io.sec_data_hi_m, 23, 16) @[el2_lsu_dccm_ctl.scala 291:276] + node _T_457 = mux(_T_454, _T_455, _T_456) @[el2_lsu_dccm_ctl.scala 291:169] + node _T_458 = mux(_T_451, _T_452, _T_457) @[el2_lsu_dccm_ctl.scala 291:104] + node _T_459 = bits(store_byteen_ext_m, 7, 7) @[el2_lsu_dccm_ctl.scala 291:123] + node _T_460 = bits(_T_459, 0, 0) @[el2_lsu_dccm_ctl.scala 291:129] + node _T_461 = bits(store_data_hi_m, 31, 24) @[el2_lsu_dccm_ctl.scala 291:151] + node _T_462 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_m_hi) @[el2_lsu_dccm_ctl.scala 291:195] + node _T_463 = bits(_T_462, 0, 0) @[el2_lsu_dccm_ctl.scala 291:221] + node _T_464 = bits(io.stbuf_data_any, 31, 24) @[el2_lsu_dccm_ctl.scala 291:246] + node _T_465 = bits(io.sec_data_hi_m, 31, 24) @[el2_lsu_dccm_ctl.scala 291:276] + node _T_466 = mux(_T_463, _T_464, _T_465) @[el2_lsu_dccm_ctl.scala 291:169] + node _T_467 = mux(_T_460, _T_461, _T_466) @[el2_lsu_dccm_ctl.scala 291:104] + wire _T_468 : UInt<8>[4] @[el2_lsu_dccm_ctl.scala 291:96] + _T_468[0] <= _T_440 @[el2_lsu_dccm_ctl.scala 291:96] + _T_468[1] <= _T_449 @[el2_lsu_dccm_ctl.scala 291:96] + _T_468[2] <= _T_458 @[el2_lsu_dccm_ctl.scala 291:96] + _T_468[3] <= _T_467 @[el2_lsu_dccm_ctl.scala 291:96] + node _T_469 = cat(_T_468[2], _T_468[3]) @[Cat.scala 29:58] + node _T_470 = cat(_T_468[0], _T_468[1]) @[Cat.scala 29:58] + node _T_471 = cat(_T_470, _T_469) @[Cat.scala 29:58] + reg _T_472 : UInt, io.lsu_store_c1_r_clk @[el2_lsu_dccm_ctl.scala 291:72] + _T_472 <= _T_471 @[el2_lsu_dccm_ctl.scala 291:72] + io.store_data_hi_r <= _T_472 @[el2_lsu_dccm_ctl.scala 291:29] + node _T_473 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_r_lo) @[el2_lsu_dccm_ctl.scala 292:89] + node _T_474 = bits(store_byteen_ext_r, 0, 0) @[el2_lsu_dccm_ctl.scala 292:134] + node _T_475 = not(_T_474) @[el2_lsu_dccm_ctl.scala 292:115] + node _T_476 = and(_T_473, _T_475) @[el2_lsu_dccm_ctl.scala 292:113] + node _T_477 = bits(_T_476, 0, 0) @[el2_lsu_dccm_ctl.scala 292:139] + node _T_478 = bits(io.stbuf_data_any, 7, 0) @[el2_lsu_dccm_ctl.scala 292:163] + node _T_479 = bits(io.store_data_lo_r, 7, 0) @[el2_lsu_dccm_ctl.scala 292:195] + node _T_480 = mux(_T_477, _T_478, _T_479) @[el2_lsu_dccm_ctl.scala 292:63] + node _T_481 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_r_lo) @[el2_lsu_dccm_ctl.scala 292:89] + node _T_482 = bits(store_byteen_ext_r, 1, 1) @[el2_lsu_dccm_ctl.scala 292:134] + node _T_483 = not(_T_482) @[el2_lsu_dccm_ctl.scala 292:115] + node _T_484 = and(_T_481, _T_483) @[el2_lsu_dccm_ctl.scala 292:113] + node _T_485 = bits(_T_484, 0, 0) @[el2_lsu_dccm_ctl.scala 292:139] + node _T_486 = bits(io.stbuf_data_any, 15, 8) @[el2_lsu_dccm_ctl.scala 292:163] + node _T_487 = bits(io.store_data_lo_r, 15, 8) @[el2_lsu_dccm_ctl.scala 292:195] + node _T_488 = mux(_T_485, _T_486, _T_487) @[el2_lsu_dccm_ctl.scala 292:63] + node _T_489 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_r_lo) @[el2_lsu_dccm_ctl.scala 292:89] + node _T_490 = bits(store_byteen_ext_r, 2, 2) @[el2_lsu_dccm_ctl.scala 292:134] + node _T_491 = not(_T_490) @[el2_lsu_dccm_ctl.scala 292:115] + node _T_492 = and(_T_489, _T_491) @[el2_lsu_dccm_ctl.scala 292:113] + node _T_493 = bits(_T_492, 0, 0) @[el2_lsu_dccm_ctl.scala 292:139] + node _T_494 = bits(io.stbuf_data_any, 23, 16) @[el2_lsu_dccm_ctl.scala 292:163] + node _T_495 = bits(io.store_data_lo_r, 23, 16) @[el2_lsu_dccm_ctl.scala 292:195] + node _T_496 = mux(_T_493, _T_494, _T_495) @[el2_lsu_dccm_ctl.scala 292:63] + node _T_497 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_r_lo) @[el2_lsu_dccm_ctl.scala 292:89] + node _T_498 = bits(store_byteen_ext_r, 3, 3) @[el2_lsu_dccm_ctl.scala 292:134] + node _T_499 = not(_T_498) @[el2_lsu_dccm_ctl.scala 292:115] + node _T_500 = and(_T_497, _T_499) @[el2_lsu_dccm_ctl.scala 292:113] + node _T_501 = bits(_T_500, 0, 0) @[el2_lsu_dccm_ctl.scala 292:139] + node _T_502 = bits(io.stbuf_data_any, 31, 24) @[el2_lsu_dccm_ctl.scala 292:163] + node _T_503 = bits(io.store_data_lo_r, 31, 24) @[el2_lsu_dccm_ctl.scala 292:195] + node _T_504 = mux(_T_501, _T_502, _T_503) @[el2_lsu_dccm_ctl.scala 292:63] + wire _T_505 : UInt<8>[4] @[el2_lsu_dccm_ctl.scala 292:55] + _T_505[0] <= _T_480 @[el2_lsu_dccm_ctl.scala 292:55] + _T_505[1] <= _T_488 @[el2_lsu_dccm_ctl.scala 292:55] + _T_505[2] <= _T_496 @[el2_lsu_dccm_ctl.scala 292:55] + _T_505[3] <= _T_504 @[el2_lsu_dccm_ctl.scala 292:55] + node _T_506 = cat(_T_505[2], _T_505[3]) @[Cat.scala 29:58] + node _T_507 = cat(_T_505[0], _T_505[1]) @[Cat.scala 29:58] + node _T_508 = cat(_T_507, _T_506) @[Cat.scala 29:58] + io.store_datafn_lo_r <= _T_508 @[el2_lsu_dccm_ctl.scala 292:29] + node _T_509 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_r_lo) @[el2_lsu_dccm_ctl.scala 293:89] + node _T_510 = bits(store_byteen_ext_r, 0, 0) @[el2_lsu_dccm_ctl.scala 293:134] + node _T_511 = not(_T_510) @[el2_lsu_dccm_ctl.scala 293:115] + node _T_512 = and(_T_509, _T_511) @[el2_lsu_dccm_ctl.scala 293:113] + node _T_513 = bits(_T_512, 0, 0) @[el2_lsu_dccm_ctl.scala 293:139] + node _T_514 = bits(io.stbuf_data_any, 7, 0) @[el2_lsu_dccm_ctl.scala 293:163] + node _T_515 = bits(io.store_data_hi_r, 7, 0) @[el2_lsu_dccm_ctl.scala 293:195] + node _T_516 = mux(_T_513, _T_514, _T_515) @[el2_lsu_dccm_ctl.scala 293:63] + node _T_517 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_r_lo) @[el2_lsu_dccm_ctl.scala 293:89] + node _T_518 = bits(store_byteen_ext_r, 1, 1) @[el2_lsu_dccm_ctl.scala 293:134] + node _T_519 = not(_T_518) @[el2_lsu_dccm_ctl.scala 293:115] + node _T_520 = and(_T_517, _T_519) @[el2_lsu_dccm_ctl.scala 293:113] + node _T_521 = bits(_T_520, 0, 0) @[el2_lsu_dccm_ctl.scala 293:139] + node _T_522 = bits(io.stbuf_data_any, 15, 8) @[el2_lsu_dccm_ctl.scala 293:163] + node _T_523 = bits(io.store_data_hi_r, 15, 8) @[el2_lsu_dccm_ctl.scala 293:195] + node _T_524 = mux(_T_521, _T_522, _T_523) @[el2_lsu_dccm_ctl.scala 293:63] + node _T_525 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_r_lo) @[el2_lsu_dccm_ctl.scala 293:89] + node _T_526 = bits(store_byteen_ext_r, 2, 2) @[el2_lsu_dccm_ctl.scala 293:134] + node _T_527 = not(_T_526) @[el2_lsu_dccm_ctl.scala 293:115] + node _T_528 = and(_T_525, _T_527) @[el2_lsu_dccm_ctl.scala 293:113] + node _T_529 = bits(_T_528, 0, 0) @[el2_lsu_dccm_ctl.scala 293:139] + node _T_530 = bits(io.stbuf_data_any, 23, 16) @[el2_lsu_dccm_ctl.scala 293:163] + node _T_531 = bits(io.store_data_hi_r, 23, 16) @[el2_lsu_dccm_ctl.scala 293:195] + node _T_532 = mux(_T_529, _T_530, _T_531) @[el2_lsu_dccm_ctl.scala 293:63] + node _T_533 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_r_lo) @[el2_lsu_dccm_ctl.scala 293:89] + node _T_534 = bits(store_byteen_ext_r, 3, 3) @[el2_lsu_dccm_ctl.scala 293:134] + node _T_535 = not(_T_534) @[el2_lsu_dccm_ctl.scala 293:115] + node _T_536 = and(_T_533, _T_535) @[el2_lsu_dccm_ctl.scala 293:113] + node _T_537 = bits(_T_536, 0, 0) @[el2_lsu_dccm_ctl.scala 293:139] + node _T_538 = bits(io.stbuf_data_any, 31, 24) @[el2_lsu_dccm_ctl.scala 293:163] + node _T_539 = bits(io.store_data_hi_r, 31, 24) @[el2_lsu_dccm_ctl.scala 293:195] + node _T_540 = mux(_T_537, _T_538, _T_539) @[el2_lsu_dccm_ctl.scala 293:63] + wire _T_541 : UInt<8>[4] @[el2_lsu_dccm_ctl.scala 293:55] + _T_541[0] <= _T_516 @[el2_lsu_dccm_ctl.scala 293:55] + _T_541[1] <= _T_524 @[el2_lsu_dccm_ctl.scala 293:55] + _T_541[2] <= _T_532 @[el2_lsu_dccm_ctl.scala 293:55] + _T_541[3] <= _T_540 @[el2_lsu_dccm_ctl.scala 293:55] + node _T_542 = cat(_T_541[2], _T_541[3]) @[Cat.scala 29:58] + node _T_543 = cat(_T_541[0], _T_541[1]) @[Cat.scala 29:58] + node _T_544 = cat(_T_543, _T_542) @[Cat.scala 29:58] + io.store_datafn_hi_r <= _T_544 @[el2_lsu_dccm_ctl.scala 293:29] + node _T_545 = bits(io.store_data_hi_r, 31, 0) @[el2_lsu_dccm_ctl.scala 294:63] + node _T_546 = bits(io.store_data_lo_r, 31, 0) @[el2_lsu_dccm_ctl.scala 294:88] + node _T_547 = cat(_T_545, _T_546) @[Cat.scala 29:58] + node _T_548 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_dccm_ctl.scala 294:116] + node _T_549 = mul(UInt<4>("h08"), _T_548) @[el2_lsu_dccm_ctl.scala 294:102] + node _T_550 = dshr(_T_547, _T_549) @[el2_lsu_dccm_ctl.scala 294:96] + node _T_551 = cat(_T_550, _T_550) @[Cat.scala 29:58] + node _T_552 = cat(_T_551, _T_551) @[Cat.scala 29:58] + node _T_553 = cat(_T_552, _T_552) @[Cat.scala 29:58] + node _T_554 = cat(_T_553, _T_553) @[Cat.scala 29:58] + node _T_555 = cat(_T_554, _T_554) @[Cat.scala 29:58] + node _T_556 = bits(store_byteen_r, 0, 0) @[el2_lsu_dccm_ctl.scala 294:174] + node _T_557 = bits(_T_556, 0, 0) @[Bitwise.scala 72:15] + node _T_558 = mux(_T_557, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_559 = bits(store_byteen_r, 1, 1) @[el2_lsu_dccm_ctl.scala 294:174] + node _T_560 = bits(_T_559, 0, 0) @[Bitwise.scala 72:15] + node _T_561 = mux(_T_560, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_562 = bits(store_byteen_r, 2, 2) @[el2_lsu_dccm_ctl.scala 294:174] + node _T_563 = bits(_T_562, 0, 0) @[Bitwise.scala 72:15] + node _T_564 = mux(_T_563, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_565 = bits(store_byteen_r, 3, 3) @[el2_lsu_dccm_ctl.scala 294:174] + node _T_566 = bits(_T_565, 0, 0) @[Bitwise.scala 72:15] + node _T_567 = mux(_T_566, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + wire _T_568 : UInt<8>[4] @[el2_lsu_dccm_ctl.scala 294:148] + _T_568[0] <= _T_558 @[el2_lsu_dccm_ctl.scala 294:148] + _T_568[1] <= _T_561 @[el2_lsu_dccm_ctl.scala 294:148] + _T_568[2] <= _T_564 @[el2_lsu_dccm_ctl.scala 294:148] + _T_568[3] <= _T_567 @[el2_lsu_dccm_ctl.scala 294:148] + node _T_569 = cat(_T_568[2], _T_568[3]) @[Cat.scala 29:58] + node _T_570 = cat(_T_568[0], _T_568[1]) @[Cat.scala 29:58] + node _T_571 = cat(_T_570, _T_569) @[Cat.scala 29:58] + node _T_572 = and(_T_555, _T_571) @[el2_lsu_dccm_ctl.scala 294:123] + io.store_data_r <= _T_572 @[el2_lsu_dccm_ctl.scala 294:29] + node _T_573 = bits(io.dccm_rd_data_lo, 31, 0) @[el2_lsu_dccm_ctl.scala 297:48] + io.dccm_rdata_lo_m <= _T_573 @[el2_lsu_dccm_ctl.scala 297:27] + node _T_574 = bits(io.dccm_rd_data_hi, 31, 0) @[el2_lsu_dccm_ctl.scala 298:48] + io.dccm_rdata_hi_m <= _T_574 @[el2_lsu_dccm_ctl.scala 298:27] + node _T_575 = bits(io.dccm_rd_data_lo, 38, 32) @[el2_lsu_dccm_ctl.scala 299:48] + io.dccm_data_ecc_lo_m <= _T_575 @[el2_lsu_dccm_ctl.scala 299:27] + node _T_576 = bits(io.dccm_rd_data_hi, 38, 32) @[el2_lsu_dccm_ctl.scala 300:48] + io.dccm_data_ecc_hi_m <= _T_576 @[el2_lsu_dccm_ctl.scala 300:27] + node _T_577 = and(io.lsu_pkt_r.valid, io.lsu_pkt_r.store) @[el2_lsu_dccm_ctl.scala 302:50] + node _T_578 = and(_T_577, io.addr_in_pic_r) @[el2_lsu_dccm_ctl.scala 302:71] + node _T_579 = and(_T_578, io.lsu_commit_r) @[el2_lsu_dccm_ctl.scala 302:90] + node _T_580 = or(_T_579, io.dma_pic_wen) @[el2_lsu_dccm_ctl.scala 302:109] + io.picm_wren <= _T_580 @[el2_lsu_dccm_ctl.scala 302:27] + node _T_581 = and(io.lsu_pkt_d.valid, io.lsu_pkt_d.load) @[el2_lsu_dccm_ctl.scala 303:50] + node _T_582 = and(_T_581, io.addr_in_pic_d) @[el2_lsu_dccm_ctl.scala 303:71] + io.picm_rden <= _T_582 @[el2_lsu_dccm_ctl.scala 303:27] + node _T_583 = and(io.lsu_pkt_d.valid, io.lsu_pkt_d.store) @[el2_lsu_dccm_ctl.scala 304:50] + node _T_584 = and(_T_583, io.addr_in_pic_d) @[el2_lsu_dccm_ctl.scala 304:71] + io.picm_mken <= _T_584 @[el2_lsu_dccm_ctl.scala 304:27] + node _T_585 = sub(UInt<6>("h020"), UInt<1>("h01")) @[el2_lsu_dccm_ctl.scala 306:58] + node _T_586 = tail(_T_585, 1) @[el2_lsu_dccm_ctl.scala 306:58] + node _T_587 = bits(io.lsu_addr_d, 14, 0) @[el2_lsu_dccm_ctl.scala 306:88] + node _T_588 = cat(_T_586, _T_587) @[Cat.scala 29:58] + node _T_589 = or(UInt<32>("h0f00c0000"), _T_588) @[el2_lsu_dccm_ctl.scala 306:47] + io.picm_rdaddr <= _T_589 @[el2_lsu_dccm_ctl.scala 306:27] + node _T_590 = sub(UInt<6>("h020"), UInt<1>("h01")) @[el2_lsu_dccm_ctl.scala 307:58] + node _T_591 = tail(_T_590, 1) @[el2_lsu_dccm_ctl.scala 307:58] + node _T_592 = bits(io.dma_pic_wen, 0, 0) @[el2_lsu_dccm_ctl.scala 307:94] + node _T_593 = bits(io.dma_mem_addr, 14, 0) @[el2_lsu_dccm_ctl.scala 307:116] + node _T_594 = bits(io.lsu_addr_r, 14, 0) @[el2_lsu_dccm_ctl.scala 307:148] + node _T_595 = mux(_T_592, _T_593, _T_594) @[el2_lsu_dccm_ctl.scala 307:78] + node _T_596 = cat(_T_591, _T_595) @[Cat.scala 29:58] + node _T_597 = or(UInt<32>("h0f00c0000"), _T_596) @[el2_lsu_dccm_ctl.scala 307:47] + io.picm_wraddr <= _T_597 @[el2_lsu_dccm_ctl.scala 307:27] + node _T_598 = bits(picm_rd_data_m, 31, 0) @[el2_lsu_dccm_ctl.scala 308:44] + io.picm_mask_data_m <= _T_598 @[el2_lsu_dccm_ctl.scala 308:27] + node _T_599 = bits(io.dma_pic_wen, 0, 0) @[el2_lsu_dccm_ctl.scala 309:49] + node _T_600 = bits(io.dma_mem_wdata, 31, 0) @[el2_lsu_dccm_ctl.scala 309:72] + node _T_601 = bits(io.store_datafn_lo_r, 31, 0) @[el2_lsu_dccm_ctl.scala 309:99] + node _T_602 = mux(_T_599, _T_600, _T_601) @[el2_lsu_dccm_ctl.scala 309:33] + io.picm_wr_data <= _T_602 @[el2_lsu_dccm_ctl.scala 309:27] + reg _T_603 : UInt, io.lsu_c2_m_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_dccm_ctl.scala 312:61] + _T_603 <= lsu_dccm_rden_d @[el2_lsu_dccm_ctl.scala 312:61] + io.lsu_dccm_rden_m <= _T_603 @[el2_lsu_dccm_ctl.scala 312:24] + reg _T_604 : UInt, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_dccm_ctl.scala 313:61] + _T_604 <= io.lsu_dccm_rden_m @[el2_lsu_dccm_ctl.scala 313:61] + io.lsu_dccm_rden_r <= _T_604 @[el2_lsu_dccm_ctl.scala 313:24] + + module el2_lsu_stbuf : + input clock : Clock + input reset : AsyncReset + output io : {flip lsu_c1_m_clk : Clock, flip lsu_c1_r_clk : Clock, flip lsu_stbuf_c1_clk : Clock, flip lsu_free_c2_clk : Clock, flip lsu_pkt_m : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip lsu_pkt_r : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip store_stbuf_reqvld_r : UInt<1>, flip lsu_commit_r : UInt<1>, flip dec_lsu_valid_raw_d : UInt<1>, flip store_data_hi_r : UInt<32>, flip store_data_lo_r : UInt<32>, flip store_datafn_hi_r : UInt<32>, flip store_datafn_lo_r : UInt<32>, flip lsu_stbuf_commit_any : UInt<1>, flip lsu_addr_d : UInt<16>, flip lsu_addr_m : UInt<32>, flip lsu_addr_r : UInt<32>, flip end_addr_d : UInt<16>, flip end_addr_m : UInt<32>, flip end_addr_r : UInt<32>, flip addr_in_dccm_m : UInt<1>, flip addr_in_dccm_r : UInt<1>, flip lsu_cmpen_m : UInt<1>, flip scan_mode : UInt<1>, stbuf_reqvld_any : UInt<1>, stbuf_reqvld_flushed_any : UInt<1>, stbuf_addr_any : UInt<16>, stbuf_data_any : UInt<32>, lsu_stbuf_full_any : UInt<1>, lsu_stbuf_empty_any : UInt<1>, ldst_stbuf_reqvld_r : UInt<1>, stbuf_fwddata_hi_m : UInt<32>, stbuf_fwddata_lo_m : UInt<32>, stbuf_fwdbyteen_hi_m : UInt<4>, stbuf_fwdbyteen_lo_m : UInt<4>} + + io.stbuf_reqvld_any <= UInt<1>("h00") @[el2_lsu_stbuf.scala 50:47] + io.stbuf_reqvld_flushed_any <= UInt<1>("h00") @[el2_lsu_stbuf.scala 51:36] + io.stbuf_addr_any <= UInt<1>("h00") @[el2_lsu_stbuf.scala 52:35] + io.stbuf_data_any <= UInt<1>("h00") @[el2_lsu_stbuf.scala 53:35] + io.lsu_stbuf_full_any <= UInt<1>("h00") @[el2_lsu_stbuf.scala 54:43] + io.lsu_stbuf_empty_any <= UInt<1>("h00") @[el2_lsu_stbuf.scala 55:43] + io.ldst_stbuf_reqvld_r <= UInt<1>("h00") @[el2_lsu_stbuf.scala 56:43] + io.stbuf_fwddata_hi_m <= UInt<1>("h00") @[el2_lsu_stbuf.scala 57:43] + io.stbuf_fwddata_lo_m <= UInt<1>("h00") @[el2_lsu_stbuf.scala 58:43] + io.stbuf_fwdbyteen_hi_m <= UInt<1>("h00") @[el2_lsu_stbuf.scala 59:37] + io.stbuf_fwdbyteen_lo_m <= UInt<1>("h00") @[el2_lsu_stbuf.scala 60:37] + wire stbuf_vld : UInt<1>[4] @[el2_lsu_stbuf.scala 63:39] + wire stbuf_dma_kill_en : UInt<4> + stbuf_dma_kill_en <= UInt<1>("h00") + wire stbuf_dma_kill : UInt<1>[4] @[el2_lsu_stbuf.scala 65:39] + wire stbuf_reset : UInt<4> + stbuf_reset <= UInt<1>("h00") + wire store_byteen_ext_r : UInt<8> + store_byteen_ext_r <= UInt<1>("h00") + wire stbuf_addr : UInt<16>[4] @[el2_lsu_stbuf.scala 68:39] + stbuf_addr[0] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 69:15] + stbuf_addr[1] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 69:15] + stbuf_addr[2] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 69:15] + stbuf_addr[3] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 69:15] + wire stbuf_byteen : UInt<4>[4] @[el2_lsu_stbuf.scala 70:39] + stbuf_byteen[0] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 71:17] + stbuf_byteen[1] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 71:17] + stbuf_byteen[2] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 71:17] + stbuf_byteen[3] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 71:17] + wire stbuf_data : UInt<32>[4] @[el2_lsu_stbuf.scala 72:39] + stbuf_data[0] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 73:15] + stbuf_data[1] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 73:15] + stbuf_data[2] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 73:15] + stbuf_data[3] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 73:15] + wire stbuf_addrin : UInt<16>[4] @[el2_lsu_stbuf.scala 74:39] + stbuf_addrin[0] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 75:17] + stbuf_addrin[1] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 75:17] + stbuf_addrin[2] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 75:17] + stbuf_addrin[3] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 75:17] + wire stbuf_datain : UInt<32>[4] @[el2_lsu_stbuf.scala 76:39] + stbuf_datain[0] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 77:17] + stbuf_datain[1] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 77:17] + stbuf_datain[2] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 77:17] + stbuf_datain[3] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 77:17] + wire stbuf_byteenin : UInt<4>[4] @[el2_lsu_stbuf.scala 78:39] + stbuf_byteenin[0] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 79:19] + stbuf_byteenin[1] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 79:19] + stbuf_byteenin[2] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 79:19] + stbuf_byteenin[3] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 79:19] + wire WrPtr : UInt<2> + WrPtr <= UInt<1>("h00") + wire RdPtr : UInt<2> + RdPtr <= UInt<1>("h00") + wire ldst_dual_m : UInt<1> + ldst_dual_m <= UInt<1>("h00") + wire ldst_dual_r : UInt<1> + ldst_dual_r <= UInt<1>("h00") + wire cmpaddr_hi_m : UInt<16> + cmpaddr_hi_m <= UInt<16>("h00") + wire stbuf_specvld_m : UInt<2> + stbuf_specvld_m <= UInt<2>("h00") + wire stbuf_specvld_r : UInt<2> + stbuf_specvld_r <= UInt<2>("h00") + wire cmpaddr_lo_m : UInt<16> + cmpaddr_lo_m <= UInt<16>("h00") + wire stbuf_fwdata_hi_pre_m : UInt<32> + stbuf_fwdata_hi_pre_m <= UInt<1>("h00") + wire stbuf_fwdata_lo_pre_m : UInt<32> + stbuf_fwdata_lo_pre_m <= UInt<1>("h00") + wire ld_byte_rhit_lo_lo : UInt<32> + ld_byte_rhit_lo_lo <= UInt<1>("h00") + wire ld_byte_rhit_hi_lo : UInt<32> + ld_byte_rhit_hi_lo <= UInt<1>("h00") + wire ld_byte_rhit_lo_hi : UInt<32> + ld_byte_rhit_lo_hi <= UInt<1>("h00") + wire ld_byte_rhit_hi_hi : UInt<32> + ld_byte_rhit_hi_hi <= UInt<1>("h00") + wire ld_byte_hit_lo : UInt<4> + ld_byte_hit_lo <= UInt<1>("h00") + wire ld_byte_rhit_lo : UInt<4> + ld_byte_rhit_lo <= UInt<1>("h00") + wire ld_byte_hit_hi : UInt<4> + ld_byte_hit_hi <= UInt<1>("h00") + wire ld_byte_rhit_hi : UInt<4> + ld_byte_rhit_hi <= UInt<1>("h00") + wire ldst_byteen_ext_r : UInt<8> + ldst_byteen_ext_r <= UInt<1>("h00") + wire ld_fwddata_rpipe_lo : UInt<32> + ld_fwddata_rpipe_lo <= UInt<1>("h00") + wire ld_fwddata_rpipe_hi : UInt<32> + ld_fwddata_rpipe_hi <= UInt<1>("h00") + wire datain1 : UInt<8>[4] @[el2_lsu_stbuf.scala 102:34] + wire datain2 : UInt<8>[4] @[el2_lsu_stbuf.scala 103:34] + wire datain3 : UInt<8>[4] @[el2_lsu_stbuf.scala 104:34] + wire datain4 : UInt<8>[4] @[el2_lsu_stbuf.scala 105:34] + node _T = bits(io.lsu_pkt_r.by, 0, 0) @[Bitwise.scala 72:15] + node _T_1 = mux(_T, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_2 = and(_T_1, UInt<1>("h01")) @[el2_lsu_stbuf.scala 108:49] + node _T_3 = bits(io.lsu_pkt_r.half, 0, 0) @[Bitwise.scala 72:15] + node _T_4 = mux(_T_3, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_5 = and(_T_4, UInt<2>("h03")) @[el2_lsu_stbuf.scala 109:32] + node _T_6 = or(_T_2, _T_5) @[el2_lsu_stbuf.scala 108:65] + node _T_7 = bits(io.lsu_pkt_r.word, 0, 0) @[Bitwise.scala 72:15] + node _T_8 = mux(_T_7, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_9 = and(_T_8, UInt<4>("h0f")) @[el2_lsu_stbuf.scala 110:32] + node _T_10 = or(_T_6, _T_9) @[el2_lsu_stbuf.scala 109:48] + node _T_11 = bits(io.lsu_pkt_r.dword, 0, 0) @[Bitwise.scala 72:15] + node _T_12 = mux(_T_11, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_13 = and(_T_12, UInt<8>("h0ff")) @[el2_lsu_stbuf.scala 111:33] + node ldst_byteen_r = or(_T_10, _T_13) @[el2_lsu_stbuf.scala 110:48] + node _T_14 = bits(io.lsu_addr_d, 2, 2) @[el2_lsu_stbuf.scala 112:36] + node _T_15 = bits(io.end_addr_d, 2, 2) @[el2_lsu_stbuf.scala 112:57] + node ldst_dual_d = neq(_T_14, _T_15) @[el2_lsu_stbuf.scala 112:40] + node dual_stbuf_write_r = and(ldst_dual_r, io.store_stbuf_reqvld_r) @[el2_lsu_stbuf.scala 113:41] + node _T_16 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_stbuf.scala 115:56] + node _T_17 = dshl(ldst_byteen_r, _T_16) @[el2_lsu_stbuf.scala 115:40] + store_byteen_ext_r <= _T_17 @[el2_lsu_stbuf.scala 115:23] + node _T_18 = bits(store_byteen_ext_r, 7, 4) @[el2_lsu_stbuf.scala 116:47] + node _T_19 = bits(io.lsu_pkt_m.store, 0, 0) @[Bitwise.scala 72:15] + node _T_20 = mux(_T_19, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node store_byteen_hi_r = and(_T_18, _T_20) @[el2_lsu_stbuf.scala 116:53] + node _T_21 = bits(store_byteen_ext_r, 3, 0) @[el2_lsu_stbuf.scala 117:47] + node _T_22 = bits(io.lsu_pkt_m.store, 0, 0) @[Bitwise.scala 72:15] + node _T_23 = mux(_T_22, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node store_byteen_lo_r = and(_T_21, _T_23) @[el2_lsu_stbuf.scala 117:53] + node _T_24 = add(RdPtr, UInt<1>("h01")) @[el2_lsu_stbuf.scala 118:27] + node NxtRdPtr = tail(_T_24, 1) @[el2_lsu_stbuf.scala 118:27] + node _T_25 = add(WrPtr, UInt<1>("h01")) @[el2_lsu_stbuf.scala 119:27] + node WrPtrPlus1 = tail(_T_25, 1) @[el2_lsu_stbuf.scala 119:27] + node _T_26 = add(WrPtr, UInt<2>("h02")) @[el2_lsu_stbuf.scala 120:27] + node WrPtrPlus2 = tail(_T_26, 1) @[el2_lsu_stbuf.scala 120:27] + node _T_27 = and(io.lsu_commit_r, io.store_stbuf_reqvld_r) @[el2_lsu_stbuf.scala 122:46] + io.ldst_stbuf_reqvld_r <= _T_27 @[el2_lsu_stbuf.scala 122:27] + node _T_28 = bits(stbuf_addr[0], 15, 2) @[el2_lsu_stbuf.scala 124:79] + node _T_29 = bits(io.lsu_addr_r, 15, 2) @[el2_lsu_stbuf.scala 124:138] + node _T_30 = eq(_T_28, _T_29) @[el2_lsu_stbuf.scala 124:121] + node _T_31 = and(_T_30, stbuf_vld[0]) @[el2_lsu_stbuf.scala 124:181] + node _T_32 = eq(stbuf_dma_kill[0], UInt<1>("h00")) @[el2_lsu_stbuf.scala 124:198] + node _T_33 = and(_T_31, _T_32) @[el2_lsu_stbuf.scala 124:196] + node _T_34 = bits(stbuf_reset, 0, 0) @[el2_lsu_stbuf.scala 124:231] + node _T_35 = eq(_T_34, UInt<1>("h00")) @[el2_lsu_stbuf.scala 124:219] + node _T_36 = and(_T_33, _T_35) @[el2_lsu_stbuf.scala 124:217] + node _T_37 = bits(stbuf_addr[1], 15, 2) @[el2_lsu_stbuf.scala 124:79] + node _T_38 = bits(io.lsu_addr_r, 15, 2) @[el2_lsu_stbuf.scala 124:138] + node _T_39 = eq(_T_37, _T_38) @[el2_lsu_stbuf.scala 124:121] + node _T_40 = and(_T_39, stbuf_vld[1]) @[el2_lsu_stbuf.scala 124:181] + node _T_41 = eq(stbuf_dma_kill[1], UInt<1>("h00")) @[el2_lsu_stbuf.scala 124:198] + node _T_42 = and(_T_40, _T_41) @[el2_lsu_stbuf.scala 124:196] + node _T_43 = bits(stbuf_reset, 1, 1) @[el2_lsu_stbuf.scala 124:231] + node _T_44 = eq(_T_43, UInt<1>("h00")) @[el2_lsu_stbuf.scala 124:219] + node _T_45 = and(_T_42, _T_44) @[el2_lsu_stbuf.scala 124:217] + node _T_46 = bits(stbuf_addr[2], 15, 2) @[el2_lsu_stbuf.scala 124:79] + node _T_47 = bits(io.lsu_addr_r, 15, 2) @[el2_lsu_stbuf.scala 124:138] + node _T_48 = eq(_T_46, _T_47) @[el2_lsu_stbuf.scala 124:121] + node _T_49 = and(_T_48, stbuf_vld[2]) @[el2_lsu_stbuf.scala 124:181] + node _T_50 = eq(stbuf_dma_kill[2], UInt<1>("h00")) @[el2_lsu_stbuf.scala 124:198] + node _T_51 = and(_T_49, _T_50) @[el2_lsu_stbuf.scala 124:196] + node _T_52 = bits(stbuf_reset, 2, 2) @[el2_lsu_stbuf.scala 124:231] + node _T_53 = eq(_T_52, UInt<1>("h00")) @[el2_lsu_stbuf.scala 124:219] + node _T_54 = and(_T_51, _T_53) @[el2_lsu_stbuf.scala 124:217] + node _T_55 = bits(stbuf_addr[3], 15, 2) @[el2_lsu_stbuf.scala 124:79] + node _T_56 = bits(io.lsu_addr_r, 15, 2) @[el2_lsu_stbuf.scala 124:138] + node _T_57 = eq(_T_55, _T_56) @[el2_lsu_stbuf.scala 124:121] + node _T_58 = and(_T_57, stbuf_vld[3]) @[el2_lsu_stbuf.scala 124:181] + node _T_59 = eq(stbuf_dma_kill[3], UInt<1>("h00")) @[el2_lsu_stbuf.scala 124:198] + node _T_60 = and(_T_58, _T_59) @[el2_lsu_stbuf.scala 124:196] + node _T_61 = bits(stbuf_reset, 3, 3) @[el2_lsu_stbuf.scala 124:231] + node _T_62 = eq(_T_61, UInt<1>("h00")) @[el2_lsu_stbuf.scala 124:219] + node _T_63 = and(_T_60, _T_62) @[el2_lsu_stbuf.scala 124:217] + node _T_64 = cat(_T_63, _T_54) @[Cat.scala 29:58] + node _T_65 = cat(_T_64, _T_45) @[Cat.scala 29:58] + node store_matchvec_lo_r = cat(_T_65, _T_36) @[Cat.scala 29:58] + node _T_66 = bits(stbuf_addr[0], 15, 2) @[el2_lsu_stbuf.scala 125:79] + node _T_67 = bits(io.end_addr_r, 15, 2) @[el2_lsu_stbuf.scala 125:138] + node _T_68 = eq(_T_66, _T_67) @[el2_lsu_stbuf.scala 125:121] + node _T_69 = and(_T_68, stbuf_vld[0]) @[el2_lsu_stbuf.scala 125:181] + node _T_70 = eq(stbuf_dma_kill[0], UInt<1>("h00")) @[el2_lsu_stbuf.scala 125:198] + node _T_71 = and(_T_69, _T_70) @[el2_lsu_stbuf.scala 125:196] + node _T_72 = and(_T_71, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 125:217] + node _T_73 = bits(stbuf_reset, 0, 0) @[el2_lsu_stbuf.scala 125:252] + node _T_74 = eq(_T_73, UInt<1>("h00")) @[el2_lsu_stbuf.scala 125:240] + node _T_75 = and(_T_72, _T_74) @[el2_lsu_stbuf.scala 125:238] + node _T_76 = bits(stbuf_addr[1], 15, 2) @[el2_lsu_stbuf.scala 125:79] + node _T_77 = bits(io.end_addr_r, 15, 2) @[el2_lsu_stbuf.scala 125:138] + node _T_78 = eq(_T_76, _T_77) @[el2_lsu_stbuf.scala 125:121] + node _T_79 = and(_T_78, stbuf_vld[1]) @[el2_lsu_stbuf.scala 125:181] + node _T_80 = eq(stbuf_dma_kill[1], UInt<1>("h00")) @[el2_lsu_stbuf.scala 125:198] + node _T_81 = and(_T_79, _T_80) @[el2_lsu_stbuf.scala 125:196] + node _T_82 = and(_T_81, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 125:217] + node _T_83 = bits(stbuf_reset, 1, 1) @[el2_lsu_stbuf.scala 125:252] + node _T_84 = eq(_T_83, UInt<1>("h00")) @[el2_lsu_stbuf.scala 125:240] + node _T_85 = and(_T_82, _T_84) @[el2_lsu_stbuf.scala 125:238] + node _T_86 = bits(stbuf_addr[2], 15, 2) @[el2_lsu_stbuf.scala 125:79] + node _T_87 = bits(io.end_addr_r, 15, 2) @[el2_lsu_stbuf.scala 125:138] + node _T_88 = eq(_T_86, _T_87) @[el2_lsu_stbuf.scala 125:121] + node _T_89 = and(_T_88, stbuf_vld[2]) @[el2_lsu_stbuf.scala 125:181] + node _T_90 = eq(stbuf_dma_kill[2], UInt<1>("h00")) @[el2_lsu_stbuf.scala 125:198] + node _T_91 = and(_T_89, _T_90) @[el2_lsu_stbuf.scala 125:196] + node _T_92 = and(_T_91, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 125:217] + node _T_93 = bits(stbuf_reset, 2, 2) @[el2_lsu_stbuf.scala 125:252] + node _T_94 = eq(_T_93, UInt<1>("h00")) @[el2_lsu_stbuf.scala 125:240] + node _T_95 = and(_T_92, _T_94) @[el2_lsu_stbuf.scala 125:238] + node _T_96 = bits(stbuf_addr[3], 15, 2) @[el2_lsu_stbuf.scala 125:79] + node _T_97 = bits(io.end_addr_r, 15, 2) @[el2_lsu_stbuf.scala 125:138] + node _T_98 = eq(_T_96, _T_97) @[el2_lsu_stbuf.scala 125:121] + node _T_99 = and(_T_98, stbuf_vld[3]) @[el2_lsu_stbuf.scala 125:181] + node _T_100 = eq(stbuf_dma_kill[3], UInt<1>("h00")) @[el2_lsu_stbuf.scala 125:198] + node _T_101 = and(_T_99, _T_100) @[el2_lsu_stbuf.scala 125:196] + node _T_102 = and(_T_101, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 125:217] + node _T_103 = bits(stbuf_reset, 3, 3) @[el2_lsu_stbuf.scala 125:252] + node _T_104 = eq(_T_103, UInt<1>("h00")) @[el2_lsu_stbuf.scala 125:240] + node _T_105 = and(_T_102, _T_104) @[el2_lsu_stbuf.scala 125:238] + node _T_106 = cat(_T_105, _T_95) @[Cat.scala 29:58] + node _T_107 = cat(_T_106, _T_85) @[Cat.scala 29:58] + node store_matchvec_hi_r = cat(_T_107, _T_75) @[Cat.scala 29:58] + node store_coalesce_lo_r = orr(store_matchvec_lo_r) @[el2_lsu_stbuf.scala 127:50] + node store_coalesce_hi_r = orr(store_matchvec_hi_r) @[el2_lsu_stbuf.scala 128:50] + node _T_108 = eq(UInt<1>("h00"), WrPtr) @[el2_lsu_stbuf.scala 130:92] + node _T_109 = bits(_T_108, 0, 0) @[el2_lsu_stbuf.scala 130:103] + node _T_110 = eq(store_coalesce_lo_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 130:112] + node _T_111 = and(_T_109, _T_110) @[el2_lsu_stbuf.scala 130:110] + node _T_112 = and(io.ldst_stbuf_reqvld_r, _T_111) @[el2_lsu_stbuf.scala 130:79] + node _T_113 = eq(UInt<1>("h00"), WrPtr) @[el2_lsu_stbuf.scala 130:147] + node _T_114 = bits(_T_113, 0, 0) @[el2_lsu_stbuf.scala 130:158] + node _T_115 = eq(dual_stbuf_write_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 130:167] + node _T_116 = and(_T_114, _T_115) @[el2_lsu_stbuf.scala 130:165] + node _T_117 = eq(store_coalesce_hi_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 130:189] + node _T_118 = and(_T_116, _T_117) @[el2_lsu_stbuf.scala 130:187] + node _T_119 = or(_T_112, _T_118) @[el2_lsu_stbuf.scala 130:134] + node _T_120 = eq(UInt<1>("h00"), WrPtrPlus1) @[el2_lsu_stbuf.scala 131:17] + node _T_121 = bits(_T_120, 0, 0) @[el2_lsu_stbuf.scala 131:33] + node _T_122 = and(_T_121, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 131:40] + node _T_123 = or(store_coalesce_lo_r, store_coalesce_hi_r) @[el2_lsu_stbuf.scala 131:85] + node _T_124 = eq(_T_123, UInt<1>("h00")) @[el2_lsu_stbuf.scala 131:63] + node _T_125 = and(_T_122, _T_124) @[el2_lsu_stbuf.scala 131:61] + node _T_126 = or(_T_119, _T_125) @[el2_lsu_stbuf.scala 130:211] + node _T_127 = bits(store_matchvec_lo_r, 0, 0) @[el2_lsu_stbuf.scala 131:130] + node _T_128 = or(_T_126, _T_127) @[el2_lsu_stbuf.scala 131:109] + node _T_129 = bits(store_matchvec_hi_r, 0, 0) @[el2_lsu_stbuf.scala 131:155] + node _T_130 = or(_T_128, _T_129) @[el2_lsu_stbuf.scala 131:134] + node _T_131 = eq(UInt<1>("h01"), WrPtr) @[el2_lsu_stbuf.scala 130:92] + node _T_132 = bits(_T_131, 0, 0) @[el2_lsu_stbuf.scala 130:103] + node _T_133 = eq(store_coalesce_lo_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 130:112] + node _T_134 = and(_T_132, _T_133) @[el2_lsu_stbuf.scala 130:110] + node _T_135 = and(io.ldst_stbuf_reqvld_r, _T_134) @[el2_lsu_stbuf.scala 130:79] + node _T_136 = eq(UInt<1>("h01"), WrPtr) @[el2_lsu_stbuf.scala 130:147] + node _T_137 = bits(_T_136, 0, 0) @[el2_lsu_stbuf.scala 130:158] + node _T_138 = eq(dual_stbuf_write_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 130:167] + node _T_139 = and(_T_137, _T_138) @[el2_lsu_stbuf.scala 130:165] + node _T_140 = eq(store_coalesce_hi_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 130:189] + node _T_141 = and(_T_139, _T_140) @[el2_lsu_stbuf.scala 130:187] + node _T_142 = or(_T_135, _T_141) @[el2_lsu_stbuf.scala 130:134] + node _T_143 = eq(UInt<1>("h01"), WrPtrPlus1) @[el2_lsu_stbuf.scala 131:17] + node _T_144 = bits(_T_143, 0, 0) @[el2_lsu_stbuf.scala 131:33] + node _T_145 = and(_T_144, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 131:40] + node _T_146 = or(store_coalesce_lo_r, store_coalesce_hi_r) @[el2_lsu_stbuf.scala 131:85] + node _T_147 = eq(_T_146, UInt<1>("h00")) @[el2_lsu_stbuf.scala 131:63] + node _T_148 = and(_T_145, _T_147) @[el2_lsu_stbuf.scala 131:61] + node _T_149 = or(_T_142, _T_148) @[el2_lsu_stbuf.scala 130:211] + node _T_150 = bits(store_matchvec_lo_r, 1, 1) @[el2_lsu_stbuf.scala 131:130] + node _T_151 = or(_T_149, _T_150) @[el2_lsu_stbuf.scala 131:109] + node _T_152 = bits(store_matchvec_hi_r, 1, 1) @[el2_lsu_stbuf.scala 131:155] + node _T_153 = or(_T_151, _T_152) @[el2_lsu_stbuf.scala 131:134] + node _T_154 = eq(UInt<2>("h02"), WrPtr) @[el2_lsu_stbuf.scala 130:92] + node _T_155 = bits(_T_154, 0, 0) @[el2_lsu_stbuf.scala 130:103] + node _T_156 = eq(store_coalesce_lo_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 130:112] + node _T_157 = and(_T_155, _T_156) @[el2_lsu_stbuf.scala 130:110] + node _T_158 = and(io.ldst_stbuf_reqvld_r, _T_157) @[el2_lsu_stbuf.scala 130:79] + node _T_159 = eq(UInt<2>("h02"), WrPtr) @[el2_lsu_stbuf.scala 130:147] + node _T_160 = bits(_T_159, 0, 0) @[el2_lsu_stbuf.scala 130:158] + node _T_161 = eq(dual_stbuf_write_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 130:167] + node _T_162 = and(_T_160, _T_161) @[el2_lsu_stbuf.scala 130:165] + node _T_163 = eq(store_coalesce_hi_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 130:189] + node _T_164 = and(_T_162, _T_163) @[el2_lsu_stbuf.scala 130:187] + node _T_165 = or(_T_158, _T_164) @[el2_lsu_stbuf.scala 130:134] + node _T_166 = eq(UInt<2>("h02"), WrPtrPlus1) @[el2_lsu_stbuf.scala 131:17] + node _T_167 = bits(_T_166, 0, 0) @[el2_lsu_stbuf.scala 131:33] + node _T_168 = and(_T_167, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 131:40] + node _T_169 = or(store_coalesce_lo_r, store_coalesce_hi_r) @[el2_lsu_stbuf.scala 131:85] + node _T_170 = eq(_T_169, UInt<1>("h00")) @[el2_lsu_stbuf.scala 131:63] + node _T_171 = and(_T_168, _T_170) @[el2_lsu_stbuf.scala 131:61] + node _T_172 = or(_T_165, _T_171) @[el2_lsu_stbuf.scala 130:211] + node _T_173 = bits(store_matchvec_lo_r, 2, 2) @[el2_lsu_stbuf.scala 131:130] + node _T_174 = or(_T_172, _T_173) @[el2_lsu_stbuf.scala 131:109] + node _T_175 = bits(store_matchvec_hi_r, 2, 2) @[el2_lsu_stbuf.scala 131:155] + node _T_176 = or(_T_174, _T_175) @[el2_lsu_stbuf.scala 131:134] + node _T_177 = eq(UInt<2>("h03"), WrPtr) @[el2_lsu_stbuf.scala 130:92] + node _T_178 = bits(_T_177, 0, 0) @[el2_lsu_stbuf.scala 130:103] + node _T_179 = eq(store_coalesce_lo_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 130:112] + node _T_180 = and(_T_178, _T_179) @[el2_lsu_stbuf.scala 130:110] + node _T_181 = and(io.ldst_stbuf_reqvld_r, _T_180) @[el2_lsu_stbuf.scala 130:79] + node _T_182 = eq(UInt<2>("h03"), WrPtr) @[el2_lsu_stbuf.scala 130:147] + node _T_183 = bits(_T_182, 0, 0) @[el2_lsu_stbuf.scala 130:158] + node _T_184 = eq(dual_stbuf_write_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 130:167] + node _T_185 = and(_T_183, _T_184) @[el2_lsu_stbuf.scala 130:165] + node _T_186 = eq(store_coalesce_hi_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 130:189] + node _T_187 = and(_T_185, _T_186) @[el2_lsu_stbuf.scala 130:187] + node _T_188 = or(_T_181, _T_187) @[el2_lsu_stbuf.scala 130:134] + node _T_189 = eq(UInt<2>("h03"), WrPtrPlus1) @[el2_lsu_stbuf.scala 131:17] + node _T_190 = bits(_T_189, 0, 0) @[el2_lsu_stbuf.scala 131:33] + node _T_191 = and(_T_190, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 131:40] + node _T_192 = or(store_coalesce_lo_r, store_coalesce_hi_r) @[el2_lsu_stbuf.scala 131:85] + node _T_193 = eq(_T_192, UInt<1>("h00")) @[el2_lsu_stbuf.scala 131:63] + node _T_194 = and(_T_191, _T_193) @[el2_lsu_stbuf.scala 131:61] + node _T_195 = or(_T_188, _T_194) @[el2_lsu_stbuf.scala 130:211] + node _T_196 = bits(store_matchvec_lo_r, 3, 3) @[el2_lsu_stbuf.scala 131:130] + node _T_197 = or(_T_195, _T_196) @[el2_lsu_stbuf.scala 131:109] + node _T_198 = bits(store_matchvec_hi_r, 3, 3) @[el2_lsu_stbuf.scala 131:155] + node _T_199 = or(_T_197, _T_198) @[el2_lsu_stbuf.scala 131:134] + node _T_200 = cat(_T_199, _T_176) @[Cat.scala 29:58] + node _T_201 = cat(_T_200, _T_153) @[Cat.scala 29:58] + node stbuf_wr_en = cat(_T_201, _T_130) @[Cat.scala 29:58] + node _T_202 = or(io.lsu_stbuf_commit_any, io.stbuf_reqvld_flushed_any) @[el2_lsu_stbuf.scala 132:78] + node _T_203 = eq(UInt<1>("h00"), RdPtr) @[el2_lsu_stbuf.scala 132:121] + node _T_204 = bits(_T_203, 0, 0) @[el2_lsu_stbuf.scala 132:132] + node _T_205 = and(_T_202, _T_204) @[el2_lsu_stbuf.scala 132:109] + node _T_206 = or(io.lsu_stbuf_commit_any, io.stbuf_reqvld_flushed_any) @[el2_lsu_stbuf.scala 132:78] + node _T_207 = eq(UInt<1>("h01"), RdPtr) @[el2_lsu_stbuf.scala 132:121] + node _T_208 = bits(_T_207, 0, 0) @[el2_lsu_stbuf.scala 132:132] + node _T_209 = and(_T_206, _T_208) @[el2_lsu_stbuf.scala 132:109] + node _T_210 = or(io.lsu_stbuf_commit_any, io.stbuf_reqvld_flushed_any) @[el2_lsu_stbuf.scala 132:78] + node _T_211 = eq(UInt<2>("h02"), RdPtr) @[el2_lsu_stbuf.scala 132:121] + node _T_212 = bits(_T_211, 0, 0) @[el2_lsu_stbuf.scala 132:132] + node _T_213 = and(_T_210, _T_212) @[el2_lsu_stbuf.scala 132:109] + node _T_214 = or(io.lsu_stbuf_commit_any, io.stbuf_reqvld_flushed_any) @[el2_lsu_stbuf.scala 132:78] + node _T_215 = eq(UInt<2>("h03"), RdPtr) @[el2_lsu_stbuf.scala 132:121] + node _T_216 = bits(_T_215, 0, 0) @[el2_lsu_stbuf.scala 132:132] + node _T_217 = and(_T_214, _T_216) @[el2_lsu_stbuf.scala 132:109] + node _T_218 = cat(_T_217, _T_213) @[Cat.scala 29:58] + node _T_219 = cat(_T_218, _T_209) @[Cat.scala 29:58] + node _T_220 = cat(_T_219, _T_205) @[Cat.scala 29:58] + stbuf_reset <= _T_220 @[el2_lsu_stbuf.scala 132:16] + node _T_221 = eq(ldst_dual_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 133:52] + node _T_222 = or(_T_221, io.store_stbuf_reqvld_r) @[el2_lsu_stbuf.scala 133:65] + node _T_223 = eq(UInt<1>("h00"), WrPtr) @[el2_lsu_stbuf.scala 133:104] + node _T_224 = bits(_T_223, 0, 0) @[el2_lsu_stbuf.scala 133:115] + node _T_225 = and(_T_222, _T_224) @[el2_lsu_stbuf.scala 133:92] + node _T_226 = eq(store_coalesce_lo_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 133:124] + node _T_227 = and(_T_225, _T_226) @[el2_lsu_stbuf.scala 133:122] + node _T_228 = bits(store_matchvec_lo_r, 0, 0) @[el2_lsu_stbuf.scala 133:166] + node _T_229 = or(_T_227, _T_228) @[el2_lsu_stbuf.scala 133:145] + node _T_230 = eq(ldst_dual_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 133:52] + node _T_231 = or(_T_230, io.store_stbuf_reqvld_r) @[el2_lsu_stbuf.scala 133:65] + node _T_232 = eq(UInt<1>("h01"), WrPtr) @[el2_lsu_stbuf.scala 133:104] + node _T_233 = bits(_T_232, 0, 0) @[el2_lsu_stbuf.scala 133:115] + node _T_234 = and(_T_231, _T_233) @[el2_lsu_stbuf.scala 133:92] + node _T_235 = eq(store_coalesce_lo_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 133:124] + node _T_236 = and(_T_234, _T_235) @[el2_lsu_stbuf.scala 133:122] + node _T_237 = bits(store_matchvec_lo_r, 1, 1) @[el2_lsu_stbuf.scala 133:166] + node _T_238 = or(_T_236, _T_237) @[el2_lsu_stbuf.scala 133:145] + node _T_239 = eq(ldst_dual_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 133:52] + node _T_240 = or(_T_239, io.store_stbuf_reqvld_r) @[el2_lsu_stbuf.scala 133:65] + node _T_241 = eq(UInt<2>("h02"), WrPtr) @[el2_lsu_stbuf.scala 133:104] + node _T_242 = bits(_T_241, 0, 0) @[el2_lsu_stbuf.scala 133:115] + node _T_243 = and(_T_240, _T_242) @[el2_lsu_stbuf.scala 133:92] + node _T_244 = eq(store_coalesce_lo_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 133:124] + node _T_245 = and(_T_243, _T_244) @[el2_lsu_stbuf.scala 133:122] + node _T_246 = bits(store_matchvec_lo_r, 2, 2) @[el2_lsu_stbuf.scala 133:166] + node _T_247 = or(_T_245, _T_246) @[el2_lsu_stbuf.scala 133:145] + node _T_248 = eq(ldst_dual_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 133:52] + node _T_249 = or(_T_248, io.store_stbuf_reqvld_r) @[el2_lsu_stbuf.scala 133:65] + node _T_250 = eq(UInt<2>("h03"), WrPtr) @[el2_lsu_stbuf.scala 133:104] + node _T_251 = bits(_T_250, 0, 0) @[el2_lsu_stbuf.scala 133:115] + node _T_252 = and(_T_249, _T_251) @[el2_lsu_stbuf.scala 133:92] + node _T_253 = eq(store_coalesce_lo_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 133:124] + node _T_254 = and(_T_252, _T_253) @[el2_lsu_stbuf.scala 133:122] + node _T_255 = bits(store_matchvec_lo_r, 3, 3) @[el2_lsu_stbuf.scala 133:166] + node _T_256 = or(_T_254, _T_255) @[el2_lsu_stbuf.scala 133:145] + node _T_257 = cat(_T_256, _T_247) @[Cat.scala 29:58] + node _T_258 = cat(_T_257, _T_238) @[Cat.scala 29:58] + node sel_lo = cat(_T_258, _T_229) @[Cat.scala 29:58] + node _T_259 = bits(sel_lo, 0, 0) @[el2_lsu_stbuf.scala 135:64] + node _T_260 = mux(_T_259, io.lsu_addr_r, io.end_addr_r) @[el2_lsu_stbuf.scala 135:57] + node _T_261 = bits(sel_lo, 1, 1) @[el2_lsu_stbuf.scala 135:64] + node _T_262 = mux(_T_261, io.lsu_addr_r, io.end_addr_r) @[el2_lsu_stbuf.scala 135:57] + node _T_263 = bits(sel_lo, 2, 2) @[el2_lsu_stbuf.scala 135:64] + node _T_264 = mux(_T_263, io.lsu_addr_r, io.end_addr_r) @[el2_lsu_stbuf.scala 135:57] + node _T_265 = bits(sel_lo, 3, 3) @[el2_lsu_stbuf.scala 135:64] + node _T_266 = mux(_T_265, io.lsu_addr_r, io.end_addr_r) @[el2_lsu_stbuf.scala 135:57] + stbuf_addrin[0] <= _T_266 @[el2_lsu_stbuf.scala 135:17] + stbuf_addrin[1] <= _T_264 @[el2_lsu_stbuf.scala 135:17] + stbuf_addrin[2] <= _T_262 @[el2_lsu_stbuf.scala 135:17] + stbuf_addrin[3] <= _T_260 @[el2_lsu_stbuf.scala 135:17] + node _T_267 = bits(sel_lo, 0, 0) @[el2_lsu_stbuf.scala 136:66] + node _T_268 = or(stbuf_byteen[0], store_byteen_lo_r) @[el2_lsu_stbuf.scala 136:87] + node _T_269 = or(stbuf_byteen[0], store_byteen_hi_r) @[el2_lsu_stbuf.scala 136:124] + node _T_270 = mux(_T_267, _T_268, _T_269) @[el2_lsu_stbuf.scala 136:59] + node _T_271 = bits(sel_lo, 1, 1) @[el2_lsu_stbuf.scala 136:66] + node _T_272 = or(stbuf_byteen[1], store_byteen_lo_r) @[el2_lsu_stbuf.scala 136:87] + node _T_273 = or(stbuf_byteen[1], store_byteen_hi_r) @[el2_lsu_stbuf.scala 136:124] + node _T_274 = mux(_T_271, _T_272, _T_273) @[el2_lsu_stbuf.scala 136:59] + node _T_275 = bits(sel_lo, 2, 2) @[el2_lsu_stbuf.scala 136:66] + node _T_276 = or(stbuf_byteen[2], store_byteen_lo_r) @[el2_lsu_stbuf.scala 136:87] + node _T_277 = or(stbuf_byteen[2], store_byteen_hi_r) @[el2_lsu_stbuf.scala 136:124] + node _T_278 = mux(_T_275, _T_276, _T_277) @[el2_lsu_stbuf.scala 136:59] + node _T_279 = bits(sel_lo, 3, 3) @[el2_lsu_stbuf.scala 136:66] + node _T_280 = or(stbuf_byteen[3], store_byteen_lo_r) @[el2_lsu_stbuf.scala 136:87] + node _T_281 = or(stbuf_byteen[3], store_byteen_hi_r) @[el2_lsu_stbuf.scala 136:124] + node _T_282 = mux(_T_279, _T_280, _T_281) @[el2_lsu_stbuf.scala 136:59] + stbuf_byteenin[0] <= _T_282 @[el2_lsu_stbuf.scala 136:19] + stbuf_byteenin[1] <= _T_278 @[el2_lsu_stbuf.scala 136:19] + stbuf_byteenin[2] <= _T_274 @[el2_lsu_stbuf.scala 136:19] + stbuf_byteenin[3] <= _T_270 @[el2_lsu_stbuf.scala 136:19] + node _T_283 = bits(sel_lo, 0, 0) @[el2_lsu_stbuf.scala 138:59] + node _T_284 = bits(stbuf_byteen[0], 0, 0) @[el2_lsu_stbuf.scala 138:84] + node _T_285 = eq(_T_284, UInt<1>("h00")) @[el2_lsu_stbuf.scala 138:68] + node _T_286 = bits(store_byteen_lo_r, 0, 0) @[el2_lsu_stbuf.scala 138:107] + node _T_287 = or(_T_285, _T_286) @[el2_lsu_stbuf.scala 138:88] + node _T_288 = bits(io.store_datafn_lo_r, 7, 0) @[el2_lsu_stbuf.scala 138:132] + node _T_289 = bits(stbuf_data[0], 7, 0) @[el2_lsu_stbuf.scala 138:153] + node _T_290 = mux(_T_287, _T_288, _T_289) @[el2_lsu_stbuf.scala 138:67] + node _T_291 = bits(stbuf_byteen[0], 0, 0) @[el2_lsu_stbuf.scala 139:27] + node _T_292 = eq(_T_291, UInt<1>("h00")) @[el2_lsu_stbuf.scala 139:11] + node _T_293 = bits(store_byteen_hi_r, 0, 0) @[el2_lsu_stbuf.scala 139:50] + node _T_294 = or(_T_292, _T_293) @[el2_lsu_stbuf.scala 139:31] + node _T_295 = bits(io.store_datafn_hi_r, 7, 0) @[el2_lsu_stbuf.scala 139:75] + node _T_296 = bits(stbuf_data[0], 7, 0) @[el2_lsu_stbuf.scala 139:96] + node _T_297 = mux(_T_294, _T_295, _T_296) @[el2_lsu_stbuf.scala 139:10] + node _T_298 = mux(_T_283, _T_290, _T_297) @[el2_lsu_stbuf.scala 138:52] + node _T_299 = bits(sel_lo, 1, 1) @[el2_lsu_stbuf.scala 138:59] + node _T_300 = bits(stbuf_byteen[1], 0, 0) @[el2_lsu_stbuf.scala 138:84] + node _T_301 = eq(_T_300, UInt<1>("h00")) @[el2_lsu_stbuf.scala 138:68] + node _T_302 = bits(store_byteen_lo_r, 0, 0) @[el2_lsu_stbuf.scala 138:107] + node _T_303 = or(_T_301, _T_302) @[el2_lsu_stbuf.scala 138:88] + node _T_304 = bits(io.store_datafn_lo_r, 7, 0) @[el2_lsu_stbuf.scala 138:132] + node _T_305 = bits(stbuf_data[1], 7, 0) @[el2_lsu_stbuf.scala 138:153] + node _T_306 = mux(_T_303, _T_304, _T_305) @[el2_lsu_stbuf.scala 138:67] + node _T_307 = bits(stbuf_byteen[1], 0, 0) @[el2_lsu_stbuf.scala 139:27] + node _T_308 = eq(_T_307, UInt<1>("h00")) @[el2_lsu_stbuf.scala 139:11] + node _T_309 = bits(store_byteen_hi_r, 0, 0) @[el2_lsu_stbuf.scala 139:50] + node _T_310 = or(_T_308, _T_309) @[el2_lsu_stbuf.scala 139:31] + node _T_311 = bits(io.store_datafn_hi_r, 7, 0) @[el2_lsu_stbuf.scala 139:75] + node _T_312 = bits(stbuf_data[1], 7, 0) @[el2_lsu_stbuf.scala 139:96] + node _T_313 = mux(_T_310, _T_311, _T_312) @[el2_lsu_stbuf.scala 139:10] + node _T_314 = mux(_T_299, _T_306, _T_313) @[el2_lsu_stbuf.scala 138:52] + node _T_315 = bits(sel_lo, 2, 2) @[el2_lsu_stbuf.scala 138:59] + node _T_316 = bits(stbuf_byteen[2], 0, 0) @[el2_lsu_stbuf.scala 138:84] + node _T_317 = eq(_T_316, UInt<1>("h00")) @[el2_lsu_stbuf.scala 138:68] + node _T_318 = bits(store_byteen_lo_r, 0, 0) @[el2_lsu_stbuf.scala 138:107] + node _T_319 = or(_T_317, _T_318) @[el2_lsu_stbuf.scala 138:88] + node _T_320 = bits(io.store_datafn_lo_r, 7, 0) @[el2_lsu_stbuf.scala 138:132] + node _T_321 = bits(stbuf_data[2], 7, 0) @[el2_lsu_stbuf.scala 138:153] + node _T_322 = mux(_T_319, _T_320, _T_321) @[el2_lsu_stbuf.scala 138:67] + node _T_323 = bits(stbuf_byteen[2], 0, 0) @[el2_lsu_stbuf.scala 139:27] + node _T_324 = eq(_T_323, UInt<1>("h00")) @[el2_lsu_stbuf.scala 139:11] + node _T_325 = bits(store_byteen_hi_r, 0, 0) @[el2_lsu_stbuf.scala 139:50] + node _T_326 = or(_T_324, _T_325) @[el2_lsu_stbuf.scala 139:31] + node _T_327 = bits(io.store_datafn_hi_r, 7, 0) @[el2_lsu_stbuf.scala 139:75] + node _T_328 = bits(stbuf_data[2], 7, 0) @[el2_lsu_stbuf.scala 139:96] + node _T_329 = mux(_T_326, _T_327, _T_328) @[el2_lsu_stbuf.scala 139:10] + node _T_330 = mux(_T_315, _T_322, _T_329) @[el2_lsu_stbuf.scala 138:52] + node _T_331 = bits(sel_lo, 3, 3) @[el2_lsu_stbuf.scala 138:59] + node _T_332 = bits(stbuf_byteen[3], 0, 0) @[el2_lsu_stbuf.scala 138:84] + node _T_333 = eq(_T_332, UInt<1>("h00")) @[el2_lsu_stbuf.scala 138:68] + node _T_334 = bits(store_byteen_lo_r, 0, 0) @[el2_lsu_stbuf.scala 138:107] + node _T_335 = or(_T_333, _T_334) @[el2_lsu_stbuf.scala 138:88] + node _T_336 = bits(io.store_datafn_lo_r, 7, 0) @[el2_lsu_stbuf.scala 138:132] + node _T_337 = bits(stbuf_data[3], 7, 0) @[el2_lsu_stbuf.scala 138:153] + node _T_338 = mux(_T_335, _T_336, _T_337) @[el2_lsu_stbuf.scala 138:67] + node _T_339 = bits(stbuf_byteen[3], 0, 0) @[el2_lsu_stbuf.scala 139:27] + node _T_340 = eq(_T_339, UInt<1>("h00")) @[el2_lsu_stbuf.scala 139:11] + node _T_341 = bits(store_byteen_hi_r, 0, 0) @[el2_lsu_stbuf.scala 139:50] + node _T_342 = or(_T_340, _T_341) @[el2_lsu_stbuf.scala 139:31] + node _T_343 = bits(io.store_datafn_hi_r, 7, 0) @[el2_lsu_stbuf.scala 139:75] + node _T_344 = bits(stbuf_data[3], 7, 0) @[el2_lsu_stbuf.scala 139:96] + node _T_345 = mux(_T_342, _T_343, _T_344) @[el2_lsu_stbuf.scala 139:10] + node _T_346 = mux(_T_331, _T_338, _T_345) @[el2_lsu_stbuf.scala 138:52] + datain1[0] <= _T_346 @[el2_lsu_stbuf.scala 138:12] + datain1[1] <= _T_330 @[el2_lsu_stbuf.scala 138:12] + datain1[2] <= _T_314 @[el2_lsu_stbuf.scala 138:12] + datain1[3] <= _T_298 @[el2_lsu_stbuf.scala 138:12] + node _T_347 = bits(sel_lo, 0, 0) @[el2_lsu_stbuf.scala 141:60] + node _T_348 = bits(stbuf_byteen[0], 1, 1) @[el2_lsu_stbuf.scala 141:85] + node _T_349 = eq(_T_348, UInt<1>("h00")) @[el2_lsu_stbuf.scala 141:69] + node _T_350 = bits(store_byteen_lo_r, 1, 1) @[el2_lsu_stbuf.scala 141:108] + node _T_351 = or(_T_349, _T_350) @[el2_lsu_stbuf.scala 141:89] + node _T_352 = bits(io.store_datafn_lo_r, 15, 8) @[el2_lsu_stbuf.scala 141:133] + node _T_353 = bits(stbuf_data[0], 15, 8) @[el2_lsu_stbuf.scala 141:155] + node _T_354 = mux(_T_351, _T_352, _T_353) @[el2_lsu_stbuf.scala 141:68] + node _T_355 = bits(stbuf_byteen[0], 1, 1) @[el2_lsu_stbuf.scala 142:27] + node _T_356 = eq(_T_355, UInt<1>("h00")) @[el2_lsu_stbuf.scala 142:11] + node _T_357 = bits(store_byteen_hi_r, 1, 1) @[el2_lsu_stbuf.scala 142:50] + node _T_358 = or(_T_356, _T_357) @[el2_lsu_stbuf.scala 142:31] + node _T_359 = bits(io.store_datafn_hi_r, 15, 8) @[el2_lsu_stbuf.scala 142:75] + node _T_360 = bits(stbuf_data[0], 15, 8) @[el2_lsu_stbuf.scala 142:97] + node _T_361 = mux(_T_358, _T_359, _T_360) @[el2_lsu_stbuf.scala 142:10] + node _T_362 = mux(_T_347, _T_354, _T_361) @[el2_lsu_stbuf.scala 141:53] + node _T_363 = bits(sel_lo, 1, 1) @[el2_lsu_stbuf.scala 141:60] + node _T_364 = bits(stbuf_byteen[1], 1, 1) @[el2_lsu_stbuf.scala 141:85] + node _T_365 = eq(_T_364, UInt<1>("h00")) @[el2_lsu_stbuf.scala 141:69] + node _T_366 = bits(store_byteen_lo_r, 1, 1) @[el2_lsu_stbuf.scala 141:108] + node _T_367 = or(_T_365, _T_366) @[el2_lsu_stbuf.scala 141:89] + node _T_368 = bits(io.store_datafn_lo_r, 15, 8) @[el2_lsu_stbuf.scala 141:133] + node _T_369 = bits(stbuf_data[1], 15, 8) @[el2_lsu_stbuf.scala 141:155] + node _T_370 = mux(_T_367, _T_368, _T_369) @[el2_lsu_stbuf.scala 141:68] + node _T_371 = bits(stbuf_byteen[1], 1, 1) @[el2_lsu_stbuf.scala 142:27] + node _T_372 = eq(_T_371, UInt<1>("h00")) @[el2_lsu_stbuf.scala 142:11] + node _T_373 = bits(store_byteen_hi_r, 1, 1) @[el2_lsu_stbuf.scala 142:50] + node _T_374 = or(_T_372, _T_373) @[el2_lsu_stbuf.scala 142:31] + node _T_375 = bits(io.store_datafn_hi_r, 15, 8) @[el2_lsu_stbuf.scala 142:75] + node _T_376 = bits(stbuf_data[1], 15, 8) @[el2_lsu_stbuf.scala 142:97] + node _T_377 = mux(_T_374, _T_375, _T_376) @[el2_lsu_stbuf.scala 142:10] + node _T_378 = mux(_T_363, _T_370, _T_377) @[el2_lsu_stbuf.scala 141:53] + node _T_379 = bits(sel_lo, 2, 2) @[el2_lsu_stbuf.scala 141:60] + node _T_380 = bits(stbuf_byteen[2], 1, 1) @[el2_lsu_stbuf.scala 141:85] + node _T_381 = eq(_T_380, UInt<1>("h00")) @[el2_lsu_stbuf.scala 141:69] + node _T_382 = bits(store_byteen_lo_r, 1, 1) @[el2_lsu_stbuf.scala 141:108] + node _T_383 = or(_T_381, _T_382) @[el2_lsu_stbuf.scala 141:89] + node _T_384 = bits(io.store_datafn_lo_r, 15, 8) @[el2_lsu_stbuf.scala 141:133] + node _T_385 = bits(stbuf_data[2], 15, 8) @[el2_lsu_stbuf.scala 141:155] + node _T_386 = mux(_T_383, _T_384, _T_385) @[el2_lsu_stbuf.scala 141:68] + node _T_387 = bits(stbuf_byteen[2], 1, 1) @[el2_lsu_stbuf.scala 142:27] + node _T_388 = eq(_T_387, UInt<1>("h00")) @[el2_lsu_stbuf.scala 142:11] + node _T_389 = bits(store_byteen_hi_r, 1, 1) @[el2_lsu_stbuf.scala 142:50] + node _T_390 = or(_T_388, _T_389) @[el2_lsu_stbuf.scala 142:31] + node _T_391 = bits(io.store_datafn_hi_r, 15, 8) @[el2_lsu_stbuf.scala 142:75] + node _T_392 = bits(stbuf_data[2], 15, 8) @[el2_lsu_stbuf.scala 142:97] + node _T_393 = mux(_T_390, _T_391, _T_392) @[el2_lsu_stbuf.scala 142:10] + node _T_394 = mux(_T_379, _T_386, _T_393) @[el2_lsu_stbuf.scala 141:53] + node _T_395 = bits(sel_lo, 3, 3) @[el2_lsu_stbuf.scala 141:60] + node _T_396 = bits(stbuf_byteen[3], 1, 1) @[el2_lsu_stbuf.scala 141:85] + node _T_397 = eq(_T_396, UInt<1>("h00")) @[el2_lsu_stbuf.scala 141:69] + node _T_398 = bits(store_byteen_lo_r, 1, 1) @[el2_lsu_stbuf.scala 141:108] + node _T_399 = or(_T_397, _T_398) @[el2_lsu_stbuf.scala 141:89] + node _T_400 = bits(io.store_datafn_lo_r, 15, 8) @[el2_lsu_stbuf.scala 141:133] + node _T_401 = bits(stbuf_data[3], 15, 8) @[el2_lsu_stbuf.scala 141:155] + node _T_402 = mux(_T_399, _T_400, _T_401) @[el2_lsu_stbuf.scala 141:68] + node _T_403 = bits(stbuf_byteen[3], 1, 1) @[el2_lsu_stbuf.scala 142:27] + node _T_404 = eq(_T_403, UInt<1>("h00")) @[el2_lsu_stbuf.scala 142:11] + node _T_405 = bits(store_byteen_hi_r, 1, 1) @[el2_lsu_stbuf.scala 142:50] + node _T_406 = or(_T_404, _T_405) @[el2_lsu_stbuf.scala 142:31] + node _T_407 = bits(io.store_datafn_hi_r, 15, 8) @[el2_lsu_stbuf.scala 142:75] + node _T_408 = bits(stbuf_data[3], 15, 8) @[el2_lsu_stbuf.scala 142:97] + node _T_409 = mux(_T_406, _T_407, _T_408) @[el2_lsu_stbuf.scala 142:10] + node _T_410 = mux(_T_395, _T_402, _T_409) @[el2_lsu_stbuf.scala 141:53] + datain2[0] <= _T_410 @[el2_lsu_stbuf.scala 141:13] + datain2[1] <= _T_394 @[el2_lsu_stbuf.scala 141:13] + datain2[2] <= _T_378 @[el2_lsu_stbuf.scala 141:13] + datain2[3] <= _T_362 @[el2_lsu_stbuf.scala 141:13] + node _T_411 = bits(sel_lo, 0, 0) @[el2_lsu_stbuf.scala 144:60] + node _T_412 = bits(stbuf_byteen[0], 2, 2) @[el2_lsu_stbuf.scala 144:85] + node _T_413 = eq(_T_412, UInt<1>("h00")) @[el2_lsu_stbuf.scala 144:69] + node _T_414 = bits(store_byteen_lo_r, 2, 2) @[el2_lsu_stbuf.scala 144:108] + node _T_415 = or(_T_413, _T_414) @[el2_lsu_stbuf.scala 144:89] + node _T_416 = bits(io.store_datafn_lo_r, 23, 16) @[el2_lsu_stbuf.scala 144:133] + node _T_417 = bits(stbuf_data[0], 23, 16) @[el2_lsu_stbuf.scala 144:156] + node _T_418 = mux(_T_415, _T_416, _T_417) @[el2_lsu_stbuf.scala 144:68] + node _T_419 = bits(stbuf_byteen[0], 2, 2) @[el2_lsu_stbuf.scala 145:27] + node _T_420 = eq(_T_419, UInt<1>("h00")) @[el2_lsu_stbuf.scala 145:11] + node _T_421 = bits(store_byteen_hi_r, 2, 2) @[el2_lsu_stbuf.scala 145:50] + node _T_422 = or(_T_420, _T_421) @[el2_lsu_stbuf.scala 145:31] + node _T_423 = bits(io.store_datafn_hi_r, 23, 16) @[el2_lsu_stbuf.scala 145:75] + node _T_424 = bits(stbuf_data[0], 23, 16) @[el2_lsu_stbuf.scala 145:98] + node _T_425 = mux(_T_422, _T_423, _T_424) @[el2_lsu_stbuf.scala 145:10] + node _T_426 = mux(_T_411, _T_418, _T_425) @[el2_lsu_stbuf.scala 144:53] + node _T_427 = bits(sel_lo, 1, 1) @[el2_lsu_stbuf.scala 144:60] + node _T_428 = bits(stbuf_byteen[1], 2, 2) @[el2_lsu_stbuf.scala 144:85] + node _T_429 = eq(_T_428, UInt<1>("h00")) @[el2_lsu_stbuf.scala 144:69] + node _T_430 = bits(store_byteen_lo_r, 2, 2) @[el2_lsu_stbuf.scala 144:108] + node _T_431 = or(_T_429, _T_430) @[el2_lsu_stbuf.scala 144:89] + node _T_432 = bits(io.store_datafn_lo_r, 23, 16) @[el2_lsu_stbuf.scala 144:133] + node _T_433 = bits(stbuf_data[1], 23, 16) @[el2_lsu_stbuf.scala 144:156] + node _T_434 = mux(_T_431, _T_432, _T_433) @[el2_lsu_stbuf.scala 144:68] + node _T_435 = bits(stbuf_byteen[1], 2, 2) @[el2_lsu_stbuf.scala 145:27] + node _T_436 = eq(_T_435, UInt<1>("h00")) @[el2_lsu_stbuf.scala 145:11] + node _T_437 = bits(store_byteen_hi_r, 2, 2) @[el2_lsu_stbuf.scala 145:50] + node _T_438 = or(_T_436, _T_437) @[el2_lsu_stbuf.scala 145:31] + node _T_439 = bits(io.store_datafn_hi_r, 23, 16) @[el2_lsu_stbuf.scala 145:75] + node _T_440 = bits(stbuf_data[1], 23, 16) @[el2_lsu_stbuf.scala 145:98] + node _T_441 = mux(_T_438, _T_439, _T_440) @[el2_lsu_stbuf.scala 145:10] + node _T_442 = mux(_T_427, _T_434, _T_441) @[el2_lsu_stbuf.scala 144:53] + node _T_443 = bits(sel_lo, 2, 2) @[el2_lsu_stbuf.scala 144:60] + node _T_444 = bits(stbuf_byteen[2], 2, 2) @[el2_lsu_stbuf.scala 144:85] + node _T_445 = eq(_T_444, UInt<1>("h00")) @[el2_lsu_stbuf.scala 144:69] + node _T_446 = bits(store_byteen_lo_r, 2, 2) @[el2_lsu_stbuf.scala 144:108] + node _T_447 = or(_T_445, _T_446) @[el2_lsu_stbuf.scala 144:89] + node _T_448 = bits(io.store_datafn_lo_r, 23, 16) @[el2_lsu_stbuf.scala 144:133] + node _T_449 = bits(stbuf_data[2], 23, 16) @[el2_lsu_stbuf.scala 144:156] + node _T_450 = mux(_T_447, _T_448, _T_449) @[el2_lsu_stbuf.scala 144:68] + node _T_451 = bits(stbuf_byteen[2], 2, 2) @[el2_lsu_stbuf.scala 145:27] + node _T_452 = eq(_T_451, UInt<1>("h00")) @[el2_lsu_stbuf.scala 145:11] + node _T_453 = bits(store_byteen_hi_r, 2, 2) @[el2_lsu_stbuf.scala 145:50] + node _T_454 = or(_T_452, _T_453) @[el2_lsu_stbuf.scala 145:31] + node _T_455 = bits(io.store_datafn_hi_r, 23, 16) @[el2_lsu_stbuf.scala 145:75] + node _T_456 = bits(stbuf_data[2], 23, 16) @[el2_lsu_stbuf.scala 145:98] + node _T_457 = mux(_T_454, _T_455, _T_456) @[el2_lsu_stbuf.scala 145:10] + node _T_458 = mux(_T_443, _T_450, _T_457) @[el2_lsu_stbuf.scala 144:53] + node _T_459 = bits(sel_lo, 3, 3) @[el2_lsu_stbuf.scala 144:60] + node _T_460 = bits(stbuf_byteen[3], 2, 2) @[el2_lsu_stbuf.scala 144:85] + node _T_461 = eq(_T_460, UInt<1>("h00")) @[el2_lsu_stbuf.scala 144:69] + node _T_462 = bits(store_byteen_lo_r, 2, 2) @[el2_lsu_stbuf.scala 144:108] + node _T_463 = or(_T_461, _T_462) @[el2_lsu_stbuf.scala 144:89] + node _T_464 = bits(io.store_datafn_lo_r, 23, 16) @[el2_lsu_stbuf.scala 144:133] + node _T_465 = bits(stbuf_data[3], 23, 16) @[el2_lsu_stbuf.scala 144:156] + node _T_466 = mux(_T_463, _T_464, _T_465) @[el2_lsu_stbuf.scala 144:68] + node _T_467 = bits(stbuf_byteen[3], 2, 2) @[el2_lsu_stbuf.scala 145:27] + node _T_468 = eq(_T_467, UInt<1>("h00")) @[el2_lsu_stbuf.scala 145:11] + node _T_469 = bits(store_byteen_hi_r, 2, 2) @[el2_lsu_stbuf.scala 145:50] + node _T_470 = or(_T_468, _T_469) @[el2_lsu_stbuf.scala 145:31] + node _T_471 = bits(io.store_datafn_hi_r, 23, 16) @[el2_lsu_stbuf.scala 145:75] + node _T_472 = bits(stbuf_data[3], 23, 16) @[el2_lsu_stbuf.scala 145:98] + node _T_473 = mux(_T_470, _T_471, _T_472) @[el2_lsu_stbuf.scala 145:10] + node _T_474 = mux(_T_459, _T_466, _T_473) @[el2_lsu_stbuf.scala 144:53] + datain3[0] <= _T_474 @[el2_lsu_stbuf.scala 144:13] + datain3[1] <= _T_458 @[el2_lsu_stbuf.scala 144:13] + datain3[2] <= _T_442 @[el2_lsu_stbuf.scala 144:13] + datain3[3] <= _T_426 @[el2_lsu_stbuf.scala 144:13] + node _T_475 = bits(sel_lo, 0, 0) @[el2_lsu_stbuf.scala 147:60] + node _T_476 = bits(stbuf_byteen[0], 3, 3) @[el2_lsu_stbuf.scala 147:85] + node _T_477 = eq(_T_476, UInt<1>("h00")) @[el2_lsu_stbuf.scala 147:69] + node _T_478 = bits(store_byteen_lo_r, 3, 3) @[el2_lsu_stbuf.scala 147:108] + node _T_479 = or(_T_477, _T_478) @[el2_lsu_stbuf.scala 147:89] + node _T_480 = bits(io.store_datafn_lo_r, 31, 24) @[el2_lsu_stbuf.scala 147:133] + node _T_481 = bits(stbuf_data[0], 31, 24) @[el2_lsu_stbuf.scala 147:156] + node _T_482 = mux(_T_479, _T_480, _T_481) @[el2_lsu_stbuf.scala 147:68] + node _T_483 = bits(stbuf_byteen[0], 3, 3) @[el2_lsu_stbuf.scala 148:27] + node _T_484 = eq(_T_483, UInt<1>("h00")) @[el2_lsu_stbuf.scala 148:11] + node _T_485 = bits(store_byteen_hi_r, 3, 3) @[el2_lsu_stbuf.scala 148:50] + node _T_486 = or(_T_484, _T_485) @[el2_lsu_stbuf.scala 148:31] + node _T_487 = bits(io.store_datafn_hi_r, 31, 24) @[el2_lsu_stbuf.scala 148:75] + node _T_488 = bits(stbuf_data[0], 31, 24) @[el2_lsu_stbuf.scala 148:98] + node _T_489 = mux(_T_486, _T_487, _T_488) @[el2_lsu_stbuf.scala 148:10] + node _T_490 = mux(_T_475, _T_482, _T_489) @[el2_lsu_stbuf.scala 147:53] + node _T_491 = bits(sel_lo, 1, 1) @[el2_lsu_stbuf.scala 147:60] + node _T_492 = bits(stbuf_byteen[1], 3, 3) @[el2_lsu_stbuf.scala 147:85] + node _T_493 = eq(_T_492, UInt<1>("h00")) @[el2_lsu_stbuf.scala 147:69] + node _T_494 = bits(store_byteen_lo_r, 3, 3) @[el2_lsu_stbuf.scala 147:108] + node _T_495 = or(_T_493, _T_494) @[el2_lsu_stbuf.scala 147:89] + node _T_496 = bits(io.store_datafn_lo_r, 31, 24) @[el2_lsu_stbuf.scala 147:133] + node _T_497 = bits(stbuf_data[1], 31, 24) @[el2_lsu_stbuf.scala 147:156] + node _T_498 = mux(_T_495, _T_496, _T_497) @[el2_lsu_stbuf.scala 147:68] + node _T_499 = bits(stbuf_byteen[1], 3, 3) @[el2_lsu_stbuf.scala 148:27] + node _T_500 = eq(_T_499, UInt<1>("h00")) @[el2_lsu_stbuf.scala 148:11] + node _T_501 = bits(store_byteen_hi_r, 3, 3) @[el2_lsu_stbuf.scala 148:50] + node _T_502 = or(_T_500, _T_501) @[el2_lsu_stbuf.scala 148:31] + node _T_503 = bits(io.store_datafn_hi_r, 31, 24) @[el2_lsu_stbuf.scala 148:75] + node _T_504 = bits(stbuf_data[1], 31, 24) @[el2_lsu_stbuf.scala 148:98] + node _T_505 = mux(_T_502, _T_503, _T_504) @[el2_lsu_stbuf.scala 148:10] + node _T_506 = mux(_T_491, _T_498, _T_505) @[el2_lsu_stbuf.scala 147:53] + node _T_507 = bits(sel_lo, 2, 2) @[el2_lsu_stbuf.scala 147:60] + node _T_508 = bits(stbuf_byteen[2], 3, 3) @[el2_lsu_stbuf.scala 147:85] + node _T_509 = eq(_T_508, UInt<1>("h00")) @[el2_lsu_stbuf.scala 147:69] + node _T_510 = bits(store_byteen_lo_r, 3, 3) @[el2_lsu_stbuf.scala 147:108] + node _T_511 = or(_T_509, _T_510) @[el2_lsu_stbuf.scala 147:89] + node _T_512 = bits(io.store_datafn_lo_r, 31, 24) @[el2_lsu_stbuf.scala 147:133] + node _T_513 = bits(stbuf_data[2], 31, 24) @[el2_lsu_stbuf.scala 147:156] + node _T_514 = mux(_T_511, _T_512, _T_513) @[el2_lsu_stbuf.scala 147:68] + node _T_515 = bits(stbuf_byteen[2], 3, 3) @[el2_lsu_stbuf.scala 148:27] + node _T_516 = eq(_T_515, UInt<1>("h00")) @[el2_lsu_stbuf.scala 148:11] + node _T_517 = bits(store_byteen_hi_r, 3, 3) @[el2_lsu_stbuf.scala 148:50] + node _T_518 = or(_T_516, _T_517) @[el2_lsu_stbuf.scala 148:31] + node _T_519 = bits(io.store_datafn_hi_r, 31, 24) @[el2_lsu_stbuf.scala 148:75] + node _T_520 = bits(stbuf_data[2], 31, 24) @[el2_lsu_stbuf.scala 148:98] + node _T_521 = mux(_T_518, _T_519, _T_520) @[el2_lsu_stbuf.scala 148:10] + node _T_522 = mux(_T_507, _T_514, _T_521) @[el2_lsu_stbuf.scala 147:53] + node _T_523 = bits(sel_lo, 3, 3) @[el2_lsu_stbuf.scala 147:60] + node _T_524 = bits(stbuf_byteen[3], 3, 3) @[el2_lsu_stbuf.scala 147:85] + node _T_525 = eq(_T_524, UInt<1>("h00")) @[el2_lsu_stbuf.scala 147:69] + node _T_526 = bits(store_byteen_lo_r, 3, 3) @[el2_lsu_stbuf.scala 147:108] + node _T_527 = or(_T_525, _T_526) @[el2_lsu_stbuf.scala 147:89] + node _T_528 = bits(io.store_datafn_lo_r, 31, 24) @[el2_lsu_stbuf.scala 147:133] + node _T_529 = bits(stbuf_data[3], 31, 24) @[el2_lsu_stbuf.scala 147:156] + node _T_530 = mux(_T_527, _T_528, _T_529) @[el2_lsu_stbuf.scala 147:68] + node _T_531 = bits(stbuf_byteen[3], 3, 3) @[el2_lsu_stbuf.scala 148:27] + node _T_532 = eq(_T_531, UInt<1>("h00")) @[el2_lsu_stbuf.scala 148:11] + node _T_533 = bits(store_byteen_hi_r, 3, 3) @[el2_lsu_stbuf.scala 148:50] + node _T_534 = or(_T_532, _T_533) @[el2_lsu_stbuf.scala 148:31] + node _T_535 = bits(io.store_datafn_hi_r, 31, 24) @[el2_lsu_stbuf.scala 148:75] + node _T_536 = bits(stbuf_data[3], 31, 24) @[el2_lsu_stbuf.scala 148:98] + node _T_537 = mux(_T_534, _T_535, _T_536) @[el2_lsu_stbuf.scala 148:10] + node _T_538 = mux(_T_523, _T_530, _T_537) @[el2_lsu_stbuf.scala 147:53] + datain4[0] <= _T_538 @[el2_lsu_stbuf.scala 147:13] + datain4[1] <= _T_522 @[el2_lsu_stbuf.scala 147:13] + datain4[2] <= _T_506 @[el2_lsu_stbuf.scala 147:13] + datain4[3] <= _T_490 @[el2_lsu_stbuf.scala 147:13] + node _T_539 = cat(datain2[0], datain1[0]) @[Cat.scala 29:58] + node _T_540 = cat(datain4[0], datain3[0]) @[Cat.scala 29:58] + node _T_541 = cat(_T_540, _T_539) @[Cat.scala 29:58] + node _T_542 = cat(datain2[1], datain1[1]) @[Cat.scala 29:58] + node _T_543 = cat(datain4[1], datain3[1]) @[Cat.scala 29:58] + node _T_544 = cat(_T_543, _T_542) @[Cat.scala 29:58] + node _T_545 = cat(datain2[2], datain1[2]) @[Cat.scala 29:58] + node _T_546 = cat(datain4[2], datain3[2]) @[Cat.scala 29:58] + node _T_547 = cat(_T_546, _T_545) @[Cat.scala 29:58] + node _T_548 = cat(datain2[3], datain1[3]) @[Cat.scala 29:58] + node _T_549 = cat(datain4[3], datain3[3]) @[Cat.scala 29:58] + node _T_550 = cat(_T_549, _T_548) @[Cat.scala 29:58] + stbuf_datain[0] <= _T_541 @[el2_lsu_stbuf.scala 150:17] + stbuf_datain[1] <= _T_544 @[el2_lsu_stbuf.scala 150:17] + stbuf_datain[2] <= _T_547 @[el2_lsu_stbuf.scala 150:17] + stbuf_datain[3] <= _T_550 @[el2_lsu_stbuf.scala 150:17] + node _T_551 = bits(stbuf_reset, 0, 0) @[el2_lsu_stbuf.scala 154:82] + node _T_552 = eq(_T_551, UInt<1>("h00")) @[el2_lsu_stbuf.scala 154:70] + node _T_553 = and(UInt<1>("h01"), _T_552) @[el2_lsu_stbuf.scala 154:68] + node _T_554 = bits(stbuf_wr_en, 0, 0) @[el2_lsu_stbuf.scala 154:103] + reg _T_555 : UInt, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_554 : @[Reg.scala 28:19] + _T_555 <= _T_553 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + stbuf_vld[0] <= _T_555 @[el2_lsu_stbuf.scala 154:51] + node _T_556 = bits(stbuf_reset, 0, 0) @[el2_lsu_stbuf.scala 155:87] + node _T_557 = eq(_T_556, UInt<1>("h00")) @[el2_lsu_stbuf.scala 155:75] + node _T_558 = and(UInt<1>("h01"), _T_557) @[el2_lsu_stbuf.scala 155:73] + node _T_559 = bits(stbuf_dma_kill_en, 0, 0) @[el2_lsu_stbuf.scala 155:114] + node _T_560 = bits(_T_559, 0, 0) @[el2_lsu_stbuf.scala 155:118] + reg _T_561 : UInt, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_560 : @[Reg.scala 28:19] + _T_561 <= _T_558 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + stbuf_dma_kill[0] <= _T_561 @[el2_lsu_stbuf.scala 155:56] + node _T_562 = bits(stbuf_wr_en, 0, 0) @[el2_lsu_stbuf.scala 156:67] + reg _T_563 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_562 : @[Reg.scala 28:19] + _T_563 <= stbuf_addrin[0] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + stbuf_addr[0] <= _T_563 @[el2_lsu_stbuf.scala 156:21] + node _T_564 = bits(stbuf_reset, 0, 0) @[el2_lsu_stbuf.scala 157:134] + node _T_565 = eq(_T_564, UInt<1>("h00")) @[el2_lsu_stbuf.scala 157:122] + node _T_566 = bits(_T_565, 0, 0) @[Bitwise.scala 72:15] + node _T_567 = mux(_T_566, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_568 = and(stbuf_byteenin[0], _T_567) @[el2_lsu_stbuf.scala 157:87] + node _T_569 = bits(stbuf_wr_en, 0, 0) @[el2_lsu_stbuf.scala 157:156] + reg _T_570 : UInt, io.lsu_stbuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_569 : @[Reg.scala 28:19] + _T_570 <= _T_568 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + stbuf_byteen[0] <= _T_570 @[el2_lsu_stbuf.scala 157:55] + node _T_571 = bits(stbuf_wr_en, 0, 0) @[el2_lsu_stbuf.scala 158:67] + reg _T_572 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_571 : @[Reg.scala 28:19] + _T_572 <= stbuf_datain[0] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + stbuf_data[0] <= _T_572 @[el2_lsu_stbuf.scala 158:21] + node _T_573 = bits(stbuf_reset, 1, 1) @[el2_lsu_stbuf.scala 154:82] + node _T_574 = eq(_T_573, UInt<1>("h00")) @[el2_lsu_stbuf.scala 154:70] + node _T_575 = and(UInt<1>("h01"), _T_574) @[el2_lsu_stbuf.scala 154:68] + node _T_576 = bits(stbuf_wr_en, 1, 1) @[el2_lsu_stbuf.scala 154:103] + reg _T_577 : UInt, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_576 : @[Reg.scala 28:19] + _T_577 <= _T_575 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + stbuf_vld[1] <= _T_577 @[el2_lsu_stbuf.scala 154:51] + node _T_578 = bits(stbuf_reset, 1, 1) @[el2_lsu_stbuf.scala 155:87] + node _T_579 = eq(_T_578, UInt<1>("h00")) @[el2_lsu_stbuf.scala 155:75] + node _T_580 = and(UInt<1>("h01"), _T_579) @[el2_lsu_stbuf.scala 155:73] + node _T_581 = bits(stbuf_dma_kill_en, 1, 1) @[el2_lsu_stbuf.scala 155:114] + node _T_582 = bits(_T_581, 0, 0) @[el2_lsu_stbuf.scala 155:118] + reg _T_583 : UInt, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_582 : @[Reg.scala 28:19] + _T_583 <= _T_580 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + stbuf_dma_kill[1] <= _T_583 @[el2_lsu_stbuf.scala 155:56] + node _T_584 = bits(stbuf_wr_en, 1, 1) @[el2_lsu_stbuf.scala 156:67] + reg _T_585 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_584 : @[Reg.scala 28:19] + _T_585 <= stbuf_addrin[1] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + stbuf_addr[1] <= _T_585 @[el2_lsu_stbuf.scala 156:21] + node _T_586 = bits(stbuf_reset, 1, 1) @[el2_lsu_stbuf.scala 157:134] + node _T_587 = eq(_T_586, UInt<1>("h00")) @[el2_lsu_stbuf.scala 157:122] + node _T_588 = bits(_T_587, 0, 0) @[Bitwise.scala 72:15] + node _T_589 = mux(_T_588, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_590 = and(stbuf_byteenin[1], _T_589) @[el2_lsu_stbuf.scala 157:87] + node _T_591 = bits(stbuf_wr_en, 1, 1) @[el2_lsu_stbuf.scala 157:156] + reg _T_592 : UInt, io.lsu_stbuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_591 : @[Reg.scala 28:19] + _T_592 <= _T_590 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + stbuf_byteen[1] <= _T_592 @[el2_lsu_stbuf.scala 157:55] + node _T_593 = bits(stbuf_wr_en, 1, 1) @[el2_lsu_stbuf.scala 158:67] + reg _T_594 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_593 : @[Reg.scala 28:19] + _T_594 <= stbuf_datain[1] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + stbuf_data[1] <= _T_594 @[el2_lsu_stbuf.scala 158:21] + node _T_595 = bits(stbuf_reset, 2, 2) @[el2_lsu_stbuf.scala 154:82] + node _T_596 = eq(_T_595, UInt<1>("h00")) @[el2_lsu_stbuf.scala 154:70] + node _T_597 = and(UInt<1>("h01"), _T_596) @[el2_lsu_stbuf.scala 154:68] + node _T_598 = bits(stbuf_wr_en, 2, 2) @[el2_lsu_stbuf.scala 154:103] + reg _T_599 : UInt, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_598 : @[Reg.scala 28:19] + _T_599 <= _T_597 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + stbuf_vld[2] <= _T_599 @[el2_lsu_stbuf.scala 154:51] + node _T_600 = bits(stbuf_reset, 2, 2) @[el2_lsu_stbuf.scala 155:87] + node _T_601 = eq(_T_600, UInt<1>("h00")) @[el2_lsu_stbuf.scala 155:75] + node _T_602 = and(UInt<1>("h01"), _T_601) @[el2_lsu_stbuf.scala 155:73] + node _T_603 = bits(stbuf_dma_kill_en, 2, 2) @[el2_lsu_stbuf.scala 155:114] + node _T_604 = bits(_T_603, 0, 0) @[el2_lsu_stbuf.scala 155:118] + reg _T_605 : UInt, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_604 : @[Reg.scala 28:19] + _T_605 <= _T_602 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + stbuf_dma_kill[2] <= _T_605 @[el2_lsu_stbuf.scala 155:56] + node _T_606 = bits(stbuf_wr_en, 2, 2) @[el2_lsu_stbuf.scala 156:67] + reg _T_607 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_606 : @[Reg.scala 28:19] + _T_607 <= stbuf_addrin[2] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + stbuf_addr[2] <= _T_607 @[el2_lsu_stbuf.scala 156:21] + node _T_608 = bits(stbuf_reset, 2, 2) @[el2_lsu_stbuf.scala 157:134] + node _T_609 = eq(_T_608, UInt<1>("h00")) @[el2_lsu_stbuf.scala 157:122] + node _T_610 = bits(_T_609, 0, 0) @[Bitwise.scala 72:15] + node _T_611 = mux(_T_610, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_612 = and(stbuf_byteenin[2], _T_611) @[el2_lsu_stbuf.scala 157:87] + node _T_613 = bits(stbuf_wr_en, 2, 2) @[el2_lsu_stbuf.scala 157:156] + reg _T_614 : UInt, io.lsu_stbuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_613 : @[Reg.scala 28:19] + _T_614 <= _T_612 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + stbuf_byteen[2] <= _T_614 @[el2_lsu_stbuf.scala 157:55] + node _T_615 = bits(stbuf_wr_en, 2, 2) @[el2_lsu_stbuf.scala 158:67] + reg _T_616 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_615 : @[Reg.scala 28:19] + _T_616 <= stbuf_datain[2] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + stbuf_data[2] <= _T_616 @[el2_lsu_stbuf.scala 158:21] + node _T_617 = bits(stbuf_reset, 3, 3) @[el2_lsu_stbuf.scala 154:82] + node _T_618 = eq(_T_617, UInt<1>("h00")) @[el2_lsu_stbuf.scala 154:70] + node _T_619 = and(UInt<1>("h01"), _T_618) @[el2_lsu_stbuf.scala 154:68] + node _T_620 = bits(stbuf_wr_en, 3, 3) @[el2_lsu_stbuf.scala 154:103] + reg _T_621 : UInt, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_620 : @[Reg.scala 28:19] + _T_621 <= _T_619 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + stbuf_vld[3] <= _T_621 @[el2_lsu_stbuf.scala 154:51] + node _T_622 = bits(stbuf_reset, 3, 3) @[el2_lsu_stbuf.scala 155:87] + node _T_623 = eq(_T_622, UInt<1>("h00")) @[el2_lsu_stbuf.scala 155:75] + node _T_624 = and(UInt<1>("h01"), _T_623) @[el2_lsu_stbuf.scala 155:73] + node _T_625 = bits(stbuf_dma_kill_en, 3, 3) @[el2_lsu_stbuf.scala 155:114] + node _T_626 = bits(_T_625, 0, 0) @[el2_lsu_stbuf.scala 155:118] + reg _T_627 : UInt, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_626 : @[Reg.scala 28:19] + _T_627 <= _T_624 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + stbuf_dma_kill[3] <= _T_627 @[el2_lsu_stbuf.scala 155:56] + node _T_628 = bits(stbuf_wr_en, 3, 3) @[el2_lsu_stbuf.scala 156:67] + reg _T_629 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_628 : @[Reg.scala 28:19] + _T_629 <= stbuf_addrin[3] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + stbuf_addr[3] <= _T_629 @[el2_lsu_stbuf.scala 156:21] + node _T_630 = bits(stbuf_reset, 3, 3) @[el2_lsu_stbuf.scala 157:134] + node _T_631 = eq(_T_630, UInt<1>("h00")) @[el2_lsu_stbuf.scala 157:122] + node _T_632 = bits(_T_631, 0, 0) @[Bitwise.scala 72:15] + node _T_633 = mux(_T_632, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_634 = and(stbuf_byteenin[3], _T_633) @[el2_lsu_stbuf.scala 157:87] + node _T_635 = bits(stbuf_wr_en, 3, 3) @[el2_lsu_stbuf.scala 157:156] + reg _T_636 : UInt, io.lsu_stbuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_635 : @[Reg.scala 28:19] + _T_636 <= _T_634 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + stbuf_byteen[3] <= _T_636 @[el2_lsu_stbuf.scala 157:55] + node _T_637 = bits(stbuf_wr_en, 3, 3) @[el2_lsu_stbuf.scala 158:67] + reg _T_638 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_637 : @[Reg.scala 28:19] + _T_638 <= stbuf_datain[3] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + stbuf_data[3] <= _T_638 @[el2_lsu_stbuf.scala 158:21] + reg _T_639 : UInt<1>, io.lsu_c1_m_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_stbuf.scala 160:53] + _T_639 <= ldst_dual_d @[el2_lsu_stbuf.scala 160:53] + ldst_dual_m <= _T_639 @[el2_lsu_stbuf.scala 160:43] + reg _T_640 : UInt<1>, io.lsu_c1_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_stbuf.scala 161:53] + _T_640 <= ldst_dual_m @[el2_lsu_stbuf.scala 161:53] + ldst_dual_r <= _T_640 @[el2_lsu_stbuf.scala 161:43] + node _T_641 = and(stbuf_vld[RdPtr], stbuf_dma_kill[RdPtr]) @[el2_lsu_stbuf.scala 164:52] + io.stbuf_reqvld_flushed_any <= _T_641 @[el2_lsu_stbuf.scala 164:32] + node _T_642 = eq(stbuf_dma_kill[RdPtr], UInt<1>("h00")) @[el2_lsu_stbuf.scala 165:47] + node _T_643 = and(stbuf_vld[RdPtr], _T_642) @[el2_lsu_stbuf.scala 165:45] + node _T_644 = orr(stbuf_dma_kill_en) @[el2_lsu_stbuf.scala 165:91] + node _T_645 = eq(_T_644, UInt<1>("h00")) @[el2_lsu_stbuf.scala 165:72] + node _T_646 = and(_T_643, _T_645) @[el2_lsu_stbuf.scala 165:70] + io.stbuf_reqvld_any <= _T_646 @[el2_lsu_stbuf.scala 165:25] + io.stbuf_addr_any <= stbuf_addr[RdPtr] @[el2_lsu_stbuf.scala 166:23] + io.stbuf_data_any <= stbuf_data[RdPtr] @[el2_lsu_stbuf.scala 167:23] + node _T_647 = eq(dual_stbuf_write_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 169:45] + node _T_648 = and(io.ldst_stbuf_reqvld_r, _T_647) @[el2_lsu_stbuf.scala 169:43] + node _T_649 = or(store_coalesce_hi_r, store_coalesce_lo_r) @[el2_lsu_stbuf.scala 169:89] + node _T_650 = eq(_T_649, UInt<1>("h00")) @[el2_lsu_stbuf.scala 169:67] + node _T_651 = and(_T_648, _T_650) @[el2_lsu_stbuf.scala 169:65] + node _T_652 = and(io.ldst_stbuf_reqvld_r, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 170:31] + node _T_653 = and(store_coalesce_hi_r, store_coalesce_lo_r) @[el2_lsu_stbuf.scala 170:77] + node _T_654 = eq(_T_653, UInt<1>("h00")) @[el2_lsu_stbuf.scala 170:55] + node _T_655 = and(_T_652, _T_654) @[el2_lsu_stbuf.scala 170:53] + node _T_656 = or(_T_651, _T_655) @[el2_lsu_stbuf.scala 169:114] + node WrPtrEn = bits(_T_656, 0, 0) @[el2_lsu_stbuf.scala 170:102] + node _T_657 = and(io.ldst_stbuf_reqvld_r, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 171:47] + node _T_658 = or(store_coalesce_hi_r, store_coalesce_lo_r) @[el2_lsu_stbuf.scala 171:92] + node _T_659 = eq(_T_658, UInt<1>("h00")) @[el2_lsu_stbuf.scala 171:70] + node _T_660 = and(_T_657, _T_659) @[el2_lsu_stbuf.scala 171:68] + node _T_661 = bits(_T_660, 0, 0) @[el2_lsu_stbuf.scala 171:116] + node NxtWrPtr = mux(_T_661, WrPtrPlus2, WrPtrPlus1) @[el2_lsu_stbuf.scala 171:22] + node RdPtrEn = or(io.lsu_stbuf_commit_any, io.stbuf_reqvld_flushed_any) @[el2_lsu_stbuf.scala 172:43] + node _T_662 = cat(UInt<3>("h00"), stbuf_vld[0]) @[Cat.scala 29:58] + node _T_663 = cat(UInt<3>("h00"), stbuf_vld[1]) @[Cat.scala 29:58] + node _T_664 = cat(UInt<3>("h00"), stbuf_vld[2]) @[Cat.scala 29:58] + node _T_665 = cat(UInt<3>("h00"), stbuf_vld[3]) @[Cat.scala 29:58] + wire _T_666 : UInt<4>[4] @[el2_lsu_stbuf.scala 175:60] + _T_666[0] <= _T_662 @[el2_lsu_stbuf.scala 175:60] + _T_666[1] <= _T_663 @[el2_lsu_stbuf.scala 175:60] + _T_666[2] <= _T_664 @[el2_lsu_stbuf.scala 175:60] + _T_666[3] <= _T_665 @[el2_lsu_stbuf.scala 175:60] + node _T_667 = add(_T_666[0], _T_666[1]) @[el2_lsu_stbuf.scala 175:102] + node _T_668 = tail(_T_667, 1) @[el2_lsu_stbuf.scala 175:102] + node _T_669 = add(_T_668, _T_666[2]) @[el2_lsu_stbuf.scala 175:102] + node _T_670 = tail(_T_669, 1) @[el2_lsu_stbuf.scala 175:102] + node _T_671 = add(_T_670, _T_666[3]) @[el2_lsu_stbuf.scala 175:102] + node stbuf_numvld_any = tail(_T_671, 1) @[el2_lsu_stbuf.scala 175:102] + node _T_672 = and(io.lsu_pkt_m.valid, io.lsu_pkt_m.store) @[el2_lsu_stbuf.scala 176:40] + node _T_673 = and(_T_672, io.addr_in_dccm_m) @[el2_lsu_stbuf.scala 176:61] + node _T_674 = eq(io.lsu_pkt_m.dma, UInt<1>("h00")) @[el2_lsu_stbuf.scala 176:83] + node isdccmst_m = and(_T_673, _T_674) @[el2_lsu_stbuf.scala 176:81] + node _T_675 = and(io.lsu_pkt_r.valid, io.lsu_pkt_r.store) @[el2_lsu_stbuf.scala 177:40] + node _T_676 = and(_T_675, io.addr_in_dccm_r) @[el2_lsu_stbuf.scala 177:61] + node _T_677 = eq(io.lsu_pkt_r.dma, UInt<1>("h00")) @[el2_lsu_stbuf.scala 177:83] + node isdccmst_r = and(_T_676, _T_677) @[el2_lsu_stbuf.scala 177:81] + node _T_678 = cat(UInt<1>("h00"), isdccmst_m) @[Cat.scala 29:58] + node _T_679 = and(isdccmst_m, ldst_dual_m) @[el2_lsu_stbuf.scala 179:63] + node _T_680 = dshl(_T_678, _T_679) @[el2_lsu_stbuf.scala 179:48] + stbuf_specvld_m <= _T_680 @[el2_lsu_stbuf.scala 179:20] + node _T_681 = cat(UInt<1>("h00"), isdccmst_r) @[Cat.scala 29:58] + node _T_682 = and(isdccmst_r, ldst_dual_r) @[el2_lsu_stbuf.scala 180:63] + node _T_683 = dshl(_T_681, _T_682) @[el2_lsu_stbuf.scala 180:48] + stbuf_specvld_r <= _T_683 @[el2_lsu_stbuf.scala 180:20] + node _T_684 = cat(UInt<2>("h00"), stbuf_specvld_m) @[Cat.scala 29:58] + node _T_685 = add(stbuf_numvld_any, _T_684) @[el2_lsu_stbuf.scala 181:45] + node _T_686 = tail(_T_685, 1) @[el2_lsu_stbuf.scala 181:45] + node _T_687 = cat(UInt<2>("h00"), stbuf_specvld_r) @[Cat.scala 29:58] + node _T_688 = add(_T_686, _T_687) @[el2_lsu_stbuf.scala 181:79] + node stbuf_specvld_any = tail(_T_688, 1) @[el2_lsu_stbuf.scala 181:79] + node _T_689 = eq(ldst_dual_d, UInt<1>("h00")) @[el2_lsu_stbuf.scala 183:35] + node _T_690 = and(_T_689, io.dec_lsu_valid_raw_d) @[el2_lsu_stbuf.scala 183:48] + node _T_691 = bits(_T_690, 0, 0) @[el2_lsu_stbuf.scala 183:74] + node _T_692 = geq(stbuf_specvld_any, UInt<3>("h04")) @[el2_lsu_stbuf.scala 183:99] + node _T_693 = geq(stbuf_specvld_any, UInt<2>("h03")) @[el2_lsu_stbuf.scala 183:138] + node _T_694 = mux(_T_691, _T_692, _T_693) @[el2_lsu_stbuf.scala 183:33] + io.lsu_stbuf_full_any <= _T_694 @[el2_lsu_stbuf.scala 183:27] + node _T_695 = eq(stbuf_numvld_any, UInt<1>("h00")) @[el2_lsu_stbuf.scala 184:47] + io.lsu_stbuf_empty_any <= _T_695 @[el2_lsu_stbuf.scala 184:27] + node cmpen_hi_m = and(io.lsu_cmpen_m, ldst_dual_m) @[el2_lsu_stbuf.scala 186:37] + node _T_696 = bits(io.end_addr_m, 15, 2) @[el2_lsu_stbuf.scala 187:33] + cmpaddr_hi_m <= _T_696 @[el2_lsu_stbuf.scala 187:17] + node _T_697 = bits(io.lsu_addr_m, 15, 2) @[el2_lsu_stbuf.scala 190:34] + cmpaddr_lo_m <= _T_697 @[el2_lsu_stbuf.scala 190:18] + node _T_698 = bits(stbuf_addr[0], 15, 2) @[el2_lsu_stbuf.scala 193:74] + node _T_699 = bits(cmpaddr_hi_m, 15, 2) @[el2_lsu_stbuf.scala 193:132] + node _T_700 = eq(_T_698, _T_699) @[el2_lsu_stbuf.scala 193:116] + node _T_701 = and(_T_700, stbuf_vld[0]) @[el2_lsu_stbuf.scala 193:175] + node _T_702 = eq(stbuf_dma_kill[0], UInt<1>("h00")) @[el2_lsu_stbuf.scala 193:192] + node _T_703 = and(_T_701, _T_702) @[el2_lsu_stbuf.scala 193:190] + node _T_704 = and(_T_703, io.addr_in_dccm_m) @[el2_lsu_stbuf.scala 193:211] + node _T_705 = bits(stbuf_addr[1], 15, 2) @[el2_lsu_stbuf.scala 193:74] + node _T_706 = bits(cmpaddr_hi_m, 15, 2) @[el2_lsu_stbuf.scala 193:132] + node _T_707 = eq(_T_705, _T_706) @[el2_lsu_stbuf.scala 193:116] + node _T_708 = and(_T_707, stbuf_vld[1]) @[el2_lsu_stbuf.scala 193:175] + node _T_709 = eq(stbuf_dma_kill[1], UInt<1>("h00")) @[el2_lsu_stbuf.scala 193:192] + node _T_710 = and(_T_708, _T_709) @[el2_lsu_stbuf.scala 193:190] + node _T_711 = and(_T_710, io.addr_in_dccm_m) @[el2_lsu_stbuf.scala 193:211] + node _T_712 = bits(stbuf_addr[2], 15, 2) @[el2_lsu_stbuf.scala 193:74] + node _T_713 = bits(cmpaddr_hi_m, 15, 2) @[el2_lsu_stbuf.scala 193:132] + node _T_714 = eq(_T_712, _T_713) @[el2_lsu_stbuf.scala 193:116] + node _T_715 = and(_T_714, stbuf_vld[2]) @[el2_lsu_stbuf.scala 193:175] + node _T_716 = eq(stbuf_dma_kill[2], UInt<1>("h00")) @[el2_lsu_stbuf.scala 193:192] + node _T_717 = and(_T_715, _T_716) @[el2_lsu_stbuf.scala 193:190] + node _T_718 = and(_T_717, io.addr_in_dccm_m) @[el2_lsu_stbuf.scala 193:211] + node _T_719 = bits(stbuf_addr[3], 15, 2) @[el2_lsu_stbuf.scala 193:74] + node _T_720 = bits(cmpaddr_hi_m, 15, 2) @[el2_lsu_stbuf.scala 193:132] + node _T_721 = eq(_T_719, _T_720) @[el2_lsu_stbuf.scala 193:116] + node _T_722 = and(_T_721, stbuf_vld[3]) @[el2_lsu_stbuf.scala 193:175] + node _T_723 = eq(stbuf_dma_kill[3], UInt<1>("h00")) @[el2_lsu_stbuf.scala 193:192] + node _T_724 = and(_T_722, _T_723) @[el2_lsu_stbuf.scala 193:190] + node _T_725 = and(_T_724, io.addr_in_dccm_m) @[el2_lsu_stbuf.scala 193:211] + node _T_726 = cat(_T_725, _T_718) @[Cat.scala 29:58] + node _T_727 = cat(_T_726, _T_711) @[Cat.scala 29:58] + node stbuf_match_hi = cat(_T_727, _T_704) @[Cat.scala 29:58] + node _T_728 = bits(stbuf_addr[0], 15, 2) @[el2_lsu_stbuf.scala 194:74] + node _T_729 = bits(cmpaddr_lo_m, 15, 2) @[el2_lsu_stbuf.scala 194:132] + node _T_730 = eq(_T_728, _T_729) @[el2_lsu_stbuf.scala 194:116] + node _T_731 = and(_T_730, stbuf_vld[0]) @[el2_lsu_stbuf.scala 194:175] + node _T_732 = eq(stbuf_dma_kill[0], UInt<1>("h00")) @[el2_lsu_stbuf.scala 194:192] + node _T_733 = and(_T_731, _T_732) @[el2_lsu_stbuf.scala 194:190] + node _T_734 = and(_T_733, io.addr_in_dccm_m) @[el2_lsu_stbuf.scala 194:211] + node _T_735 = bits(stbuf_addr[1], 15, 2) @[el2_lsu_stbuf.scala 194:74] + node _T_736 = bits(cmpaddr_lo_m, 15, 2) @[el2_lsu_stbuf.scala 194:132] + node _T_737 = eq(_T_735, _T_736) @[el2_lsu_stbuf.scala 194:116] + node _T_738 = and(_T_737, stbuf_vld[1]) @[el2_lsu_stbuf.scala 194:175] + node _T_739 = eq(stbuf_dma_kill[1], UInt<1>("h00")) @[el2_lsu_stbuf.scala 194:192] + node _T_740 = and(_T_738, _T_739) @[el2_lsu_stbuf.scala 194:190] + node _T_741 = and(_T_740, io.addr_in_dccm_m) @[el2_lsu_stbuf.scala 194:211] + node _T_742 = bits(stbuf_addr[2], 15, 2) @[el2_lsu_stbuf.scala 194:74] + node _T_743 = bits(cmpaddr_lo_m, 15, 2) @[el2_lsu_stbuf.scala 194:132] + node _T_744 = eq(_T_742, _T_743) @[el2_lsu_stbuf.scala 194:116] + node _T_745 = and(_T_744, stbuf_vld[2]) @[el2_lsu_stbuf.scala 194:175] + node _T_746 = eq(stbuf_dma_kill[2], UInt<1>("h00")) @[el2_lsu_stbuf.scala 194:192] + node _T_747 = and(_T_745, _T_746) @[el2_lsu_stbuf.scala 194:190] + node _T_748 = and(_T_747, io.addr_in_dccm_m) @[el2_lsu_stbuf.scala 194:211] + node _T_749 = bits(stbuf_addr[3], 15, 2) @[el2_lsu_stbuf.scala 194:74] + node _T_750 = bits(cmpaddr_lo_m, 15, 2) @[el2_lsu_stbuf.scala 194:132] + node _T_751 = eq(_T_749, _T_750) @[el2_lsu_stbuf.scala 194:116] + node _T_752 = and(_T_751, stbuf_vld[3]) @[el2_lsu_stbuf.scala 194:175] + node _T_753 = eq(stbuf_dma_kill[3], UInt<1>("h00")) @[el2_lsu_stbuf.scala 194:192] + node _T_754 = and(_T_752, _T_753) @[el2_lsu_stbuf.scala 194:190] + node _T_755 = and(_T_754, io.addr_in_dccm_m) @[el2_lsu_stbuf.scala 194:211] + node _T_756 = cat(_T_755, _T_748) @[Cat.scala 29:58] + node _T_757 = cat(_T_756, _T_741) @[Cat.scala 29:58] + node stbuf_match_lo = cat(_T_757, _T_734) @[Cat.scala 29:58] + node _T_758 = bits(stbuf_match_hi, 0, 0) @[el2_lsu_stbuf.scala 195:75] + node _T_759 = bits(stbuf_match_lo, 0, 0) @[el2_lsu_stbuf.scala 195:95] + node _T_760 = or(_T_758, _T_759) @[el2_lsu_stbuf.scala 195:79] + node _T_761 = and(_T_760, io.lsu_pkt_m.valid) @[el2_lsu_stbuf.scala 195:100] + node _T_762 = and(_T_761, io.lsu_pkt_m.dma) @[el2_lsu_stbuf.scala 195:121] + node _T_763 = and(_T_762, io.lsu_pkt_m.store) @[el2_lsu_stbuf.scala 195:140] + node _T_764 = bits(stbuf_match_hi, 1, 1) @[el2_lsu_stbuf.scala 195:75] + node _T_765 = bits(stbuf_match_lo, 1, 1) @[el2_lsu_stbuf.scala 195:95] + node _T_766 = or(_T_764, _T_765) @[el2_lsu_stbuf.scala 195:79] + node _T_767 = and(_T_766, io.lsu_pkt_m.valid) @[el2_lsu_stbuf.scala 195:100] + node _T_768 = and(_T_767, io.lsu_pkt_m.dma) @[el2_lsu_stbuf.scala 195:121] + node _T_769 = and(_T_768, io.lsu_pkt_m.store) @[el2_lsu_stbuf.scala 195:140] + node _T_770 = bits(stbuf_match_hi, 2, 2) @[el2_lsu_stbuf.scala 195:75] + node _T_771 = bits(stbuf_match_lo, 2, 2) @[el2_lsu_stbuf.scala 195:95] + node _T_772 = or(_T_770, _T_771) @[el2_lsu_stbuf.scala 195:79] + node _T_773 = and(_T_772, io.lsu_pkt_m.valid) @[el2_lsu_stbuf.scala 195:100] + node _T_774 = and(_T_773, io.lsu_pkt_m.dma) @[el2_lsu_stbuf.scala 195:121] + node _T_775 = and(_T_774, io.lsu_pkt_m.store) @[el2_lsu_stbuf.scala 195:140] + node _T_776 = bits(stbuf_match_hi, 3, 3) @[el2_lsu_stbuf.scala 195:75] + node _T_777 = bits(stbuf_match_lo, 3, 3) @[el2_lsu_stbuf.scala 195:95] + node _T_778 = or(_T_776, _T_777) @[el2_lsu_stbuf.scala 195:79] + node _T_779 = and(_T_778, io.lsu_pkt_m.valid) @[el2_lsu_stbuf.scala 195:100] + node _T_780 = and(_T_779, io.lsu_pkt_m.dma) @[el2_lsu_stbuf.scala 195:121] + node _T_781 = and(_T_780, io.lsu_pkt_m.store) @[el2_lsu_stbuf.scala 195:140] + node _T_782 = cat(_T_781, _T_775) @[Cat.scala 29:58] + node _T_783 = cat(_T_782, _T_769) @[Cat.scala 29:58] + node _T_784 = cat(_T_783, _T_763) @[Cat.scala 29:58] + stbuf_dma_kill_en <= _T_784 @[el2_lsu_stbuf.scala 195:22] + node _T_785 = bits(stbuf_match_hi, 0, 0) @[el2_lsu_stbuf.scala 198:113] + node _T_786 = bits(stbuf_byteen[0], 0, 0) @[el2_lsu_stbuf.scala 198:134] + node _T_787 = and(_T_785, _T_786) @[el2_lsu_stbuf.scala 198:117] + node _T_788 = and(_T_787, stbuf_vld[0]) @[el2_lsu_stbuf.scala 198:138] + node _T_789 = bits(stbuf_match_hi, 0, 0) @[el2_lsu_stbuf.scala 198:113] + node _T_790 = bits(stbuf_byteen[0], 1, 1) @[el2_lsu_stbuf.scala 198:134] + node _T_791 = and(_T_789, _T_790) @[el2_lsu_stbuf.scala 198:117] + node _T_792 = and(_T_791, stbuf_vld[0]) @[el2_lsu_stbuf.scala 198:138] + node _T_793 = bits(stbuf_match_hi, 0, 0) @[el2_lsu_stbuf.scala 198:113] + node _T_794 = bits(stbuf_byteen[0], 2, 2) @[el2_lsu_stbuf.scala 198:134] + node _T_795 = and(_T_793, _T_794) @[el2_lsu_stbuf.scala 198:117] + node _T_796 = and(_T_795, stbuf_vld[0]) @[el2_lsu_stbuf.scala 198:138] + node _T_797 = bits(stbuf_match_hi, 0, 0) @[el2_lsu_stbuf.scala 198:113] + node _T_798 = bits(stbuf_byteen[0], 3, 3) @[el2_lsu_stbuf.scala 198:134] + node _T_799 = and(_T_797, _T_798) @[el2_lsu_stbuf.scala 198:117] + node _T_800 = and(_T_799, stbuf_vld[0]) @[el2_lsu_stbuf.scala 198:138] + node _T_801 = cat(_T_800, _T_796) @[Cat.scala 29:58] + node _T_802 = cat(_T_801, _T_792) @[Cat.scala 29:58] + node stbuf_fwdbyteenvec_hi_0 = cat(_T_802, _T_788) @[Cat.scala 29:58] + node _T_803 = bits(stbuf_match_hi, 1, 1) @[el2_lsu_stbuf.scala 198:113] + node _T_804 = bits(stbuf_byteen[1], 0, 0) @[el2_lsu_stbuf.scala 198:134] + node _T_805 = and(_T_803, _T_804) @[el2_lsu_stbuf.scala 198:117] + node _T_806 = and(_T_805, stbuf_vld[1]) @[el2_lsu_stbuf.scala 198:138] + node _T_807 = bits(stbuf_match_hi, 1, 1) @[el2_lsu_stbuf.scala 198:113] + node _T_808 = bits(stbuf_byteen[1], 1, 1) @[el2_lsu_stbuf.scala 198:134] + node _T_809 = and(_T_807, _T_808) @[el2_lsu_stbuf.scala 198:117] + node _T_810 = and(_T_809, stbuf_vld[1]) @[el2_lsu_stbuf.scala 198:138] + node _T_811 = bits(stbuf_match_hi, 1, 1) @[el2_lsu_stbuf.scala 198:113] + node _T_812 = bits(stbuf_byteen[1], 2, 2) @[el2_lsu_stbuf.scala 198:134] + node _T_813 = and(_T_811, _T_812) @[el2_lsu_stbuf.scala 198:117] + node _T_814 = and(_T_813, stbuf_vld[1]) @[el2_lsu_stbuf.scala 198:138] + node _T_815 = bits(stbuf_match_hi, 1, 1) @[el2_lsu_stbuf.scala 198:113] + node _T_816 = bits(stbuf_byteen[1], 3, 3) @[el2_lsu_stbuf.scala 198:134] + node _T_817 = and(_T_815, _T_816) @[el2_lsu_stbuf.scala 198:117] + node _T_818 = and(_T_817, stbuf_vld[1]) @[el2_lsu_stbuf.scala 198:138] + node _T_819 = cat(_T_818, _T_814) @[Cat.scala 29:58] + node _T_820 = cat(_T_819, _T_810) @[Cat.scala 29:58] + node stbuf_fwdbyteenvec_hi_1 = cat(_T_820, _T_806) @[Cat.scala 29:58] + node _T_821 = bits(stbuf_match_hi, 2, 2) @[el2_lsu_stbuf.scala 198:113] + node _T_822 = bits(stbuf_byteen[2], 0, 0) @[el2_lsu_stbuf.scala 198:134] + node _T_823 = and(_T_821, _T_822) @[el2_lsu_stbuf.scala 198:117] + node _T_824 = and(_T_823, stbuf_vld[2]) @[el2_lsu_stbuf.scala 198:138] + node _T_825 = bits(stbuf_match_hi, 2, 2) @[el2_lsu_stbuf.scala 198:113] + node _T_826 = bits(stbuf_byteen[2], 1, 1) @[el2_lsu_stbuf.scala 198:134] + node _T_827 = and(_T_825, _T_826) @[el2_lsu_stbuf.scala 198:117] + node _T_828 = and(_T_827, stbuf_vld[2]) @[el2_lsu_stbuf.scala 198:138] + node _T_829 = bits(stbuf_match_hi, 2, 2) @[el2_lsu_stbuf.scala 198:113] + node _T_830 = bits(stbuf_byteen[2], 2, 2) @[el2_lsu_stbuf.scala 198:134] + node _T_831 = and(_T_829, _T_830) @[el2_lsu_stbuf.scala 198:117] + node _T_832 = and(_T_831, stbuf_vld[2]) @[el2_lsu_stbuf.scala 198:138] + node _T_833 = bits(stbuf_match_hi, 2, 2) @[el2_lsu_stbuf.scala 198:113] + node _T_834 = bits(stbuf_byteen[2], 3, 3) @[el2_lsu_stbuf.scala 198:134] + node _T_835 = and(_T_833, _T_834) @[el2_lsu_stbuf.scala 198:117] + node _T_836 = and(_T_835, stbuf_vld[2]) @[el2_lsu_stbuf.scala 198:138] + node _T_837 = cat(_T_836, _T_832) @[Cat.scala 29:58] + node _T_838 = cat(_T_837, _T_828) @[Cat.scala 29:58] + node stbuf_fwdbyteenvec_hi_2 = cat(_T_838, _T_824) @[Cat.scala 29:58] + node _T_839 = bits(stbuf_match_hi, 3, 3) @[el2_lsu_stbuf.scala 198:113] + node _T_840 = bits(stbuf_byteen[3], 0, 0) @[el2_lsu_stbuf.scala 198:134] + node _T_841 = and(_T_839, _T_840) @[el2_lsu_stbuf.scala 198:117] + node _T_842 = and(_T_841, stbuf_vld[3]) @[el2_lsu_stbuf.scala 198:138] + node _T_843 = bits(stbuf_match_hi, 3, 3) @[el2_lsu_stbuf.scala 198:113] + node _T_844 = bits(stbuf_byteen[3], 1, 1) @[el2_lsu_stbuf.scala 198:134] + node _T_845 = and(_T_843, _T_844) @[el2_lsu_stbuf.scala 198:117] + node _T_846 = and(_T_845, stbuf_vld[3]) @[el2_lsu_stbuf.scala 198:138] + node _T_847 = bits(stbuf_match_hi, 3, 3) @[el2_lsu_stbuf.scala 198:113] + node _T_848 = bits(stbuf_byteen[3], 2, 2) @[el2_lsu_stbuf.scala 198:134] + node _T_849 = and(_T_847, _T_848) @[el2_lsu_stbuf.scala 198:117] + node _T_850 = and(_T_849, stbuf_vld[3]) @[el2_lsu_stbuf.scala 198:138] + node _T_851 = bits(stbuf_match_hi, 3, 3) @[el2_lsu_stbuf.scala 198:113] + node _T_852 = bits(stbuf_byteen[3], 3, 3) @[el2_lsu_stbuf.scala 198:134] + node _T_853 = and(_T_851, _T_852) @[el2_lsu_stbuf.scala 198:117] + node _T_854 = and(_T_853, stbuf_vld[3]) @[el2_lsu_stbuf.scala 198:138] + node _T_855 = cat(_T_854, _T_850) @[Cat.scala 29:58] + node _T_856 = cat(_T_855, _T_846) @[Cat.scala 29:58] + node stbuf_fwdbyteenvec_hi_3 = cat(_T_856, _T_842) @[Cat.scala 29:58] + node _T_857 = bits(stbuf_match_lo, 0, 0) @[el2_lsu_stbuf.scala 199:113] + node _T_858 = bits(stbuf_byteen[0], 0, 0) @[el2_lsu_stbuf.scala 199:134] + node _T_859 = and(_T_857, _T_858) @[el2_lsu_stbuf.scala 199:117] + node _T_860 = and(_T_859, stbuf_vld[0]) @[el2_lsu_stbuf.scala 199:138] + node _T_861 = bits(stbuf_match_lo, 0, 0) @[el2_lsu_stbuf.scala 199:113] + node _T_862 = bits(stbuf_byteen[0], 1, 1) @[el2_lsu_stbuf.scala 199:134] + node _T_863 = and(_T_861, _T_862) @[el2_lsu_stbuf.scala 199:117] + node _T_864 = and(_T_863, stbuf_vld[0]) @[el2_lsu_stbuf.scala 199:138] + node _T_865 = bits(stbuf_match_lo, 0, 0) @[el2_lsu_stbuf.scala 199:113] + node _T_866 = bits(stbuf_byteen[0], 2, 2) @[el2_lsu_stbuf.scala 199:134] + node _T_867 = and(_T_865, _T_866) @[el2_lsu_stbuf.scala 199:117] + node _T_868 = and(_T_867, stbuf_vld[0]) @[el2_lsu_stbuf.scala 199:138] + node _T_869 = bits(stbuf_match_lo, 0, 0) @[el2_lsu_stbuf.scala 199:113] + node _T_870 = bits(stbuf_byteen[0], 3, 3) @[el2_lsu_stbuf.scala 199:134] + node _T_871 = and(_T_869, _T_870) @[el2_lsu_stbuf.scala 199:117] + node _T_872 = and(_T_871, stbuf_vld[0]) @[el2_lsu_stbuf.scala 199:138] + node _T_873 = cat(_T_872, _T_868) @[Cat.scala 29:58] + node _T_874 = cat(_T_873, _T_864) @[Cat.scala 29:58] + node stbuf_fwdbyteenvec_lo_0 = cat(_T_874, _T_860) @[Cat.scala 29:58] + node _T_875 = bits(stbuf_match_lo, 1, 1) @[el2_lsu_stbuf.scala 199:113] + node _T_876 = bits(stbuf_byteen[1], 0, 0) @[el2_lsu_stbuf.scala 199:134] + node _T_877 = and(_T_875, _T_876) @[el2_lsu_stbuf.scala 199:117] + node _T_878 = and(_T_877, stbuf_vld[1]) @[el2_lsu_stbuf.scala 199:138] + node _T_879 = bits(stbuf_match_lo, 1, 1) @[el2_lsu_stbuf.scala 199:113] + node _T_880 = bits(stbuf_byteen[1], 1, 1) @[el2_lsu_stbuf.scala 199:134] + node _T_881 = and(_T_879, _T_880) @[el2_lsu_stbuf.scala 199:117] + node _T_882 = and(_T_881, stbuf_vld[1]) @[el2_lsu_stbuf.scala 199:138] + node _T_883 = bits(stbuf_match_lo, 1, 1) @[el2_lsu_stbuf.scala 199:113] + node _T_884 = bits(stbuf_byteen[1], 2, 2) @[el2_lsu_stbuf.scala 199:134] + node _T_885 = and(_T_883, _T_884) @[el2_lsu_stbuf.scala 199:117] + node _T_886 = and(_T_885, stbuf_vld[1]) @[el2_lsu_stbuf.scala 199:138] + node _T_887 = bits(stbuf_match_lo, 1, 1) @[el2_lsu_stbuf.scala 199:113] + node _T_888 = bits(stbuf_byteen[1], 3, 3) @[el2_lsu_stbuf.scala 199:134] + node _T_889 = and(_T_887, _T_888) @[el2_lsu_stbuf.scala 199:117] + node _T_890 = and(_T_889, stbuf_vld[1]) @[el2_lsu_stbuf.scala 199:138] + node _T_891 = cat(_T_890, _T_886) @[Cat.scala 29:58] + node _T_892 = cat(_T_891, _T_882) @[Cat.scala 29:58] + node stbuf_fwdbyteenvec_lo_1 = cat(_T_892, _T_878) @[Cat.scala 29:58] + node _T_893 = bits(stbuf_match_lo, 2, 2) @[el2_lsu_stbuf.scala 199:113] + node _T_894 = bits(stbuf_byteen[2], 0, 0) @[el2_lsu_stbuf.scala 199:134] + node _T_895 = and(_T_893, _T_894) @[el2_lsu_stbuf.scala 199:117] + node _T_896 = and(_T_895, stbuf_vld[2]) @[el2_lsu_stbuf.scala 199:138] + node _T_897 = bits(stbuf_match_lo, 2, 2) @[el2_lsu_stbuf.scala 199:113] + node _T_898 = bits(stbuf_byteen[2], 1, 1) @[el2_lsu_stbuf.scala 199:134] + node _T_899 = and(_T_897, _T_898) @[el2_lsu_stbuf.scala 199:117] + node _T_900 = and(_T_899, stbuf_vld[2]) @[el2_lsu_stbuf.scala 199:138] + node _T_901 = bits(stbuf_match_lo, 2, 2) @[el2_lsu_stbuf.scala 199:113] + node _T_902 = bits(stbuf_byteen[2], 2, 2) @[el2_lsu_stbuf.scala 199:134] + node _T_903 = and(_T_901, _T_902) @[el2_lsu_stbuf.scala 199:117] + node _T_904 = and(_T_903, stbuf_vld[2]) @[el2_lsu_stbuf.scala 199:138] + node _T_905 = bits(stbuf_match_lo, 2, 2) @[el2_lsu_stbuf.scala 199:113] + node _T_906 = bits(stbuf_byteen[2], 3, 3) @[el2_lsu_stbuf.scala 199:134] + node _T_907 = and(_T_905, _T_906) @[el2_lsu_stbuf.scala 199:117] + node _T_908 = and(_T_907, stbuf_vld[2]) @[el2_lsu_stbuf.scala 199:138] + node _T_909 = cat(_T_908, _T_904) @[Cat.scala 29:58] + node _T_910 = cat(_T_909, _T_900) @[Cat.scala 29:58] + node stbuf_fwdbyteenvec_lo_2 = cat(_T_910, _T_896) @[Cat.scala 29:58] + node _T_911 = bits(stbuf_match_lo, 3, 3) @[el2_lsu_stbuf.scala 199:113] + node _T_912 = bits(stbuf_byteen[3], 0, 0) @[el2_lsu_stbuf.scala 199:134] + node _T_913 = and(_T_911, _T_912) @[el2_lsu_stbuf.scala 199:117] + node _T_914 = and(_T_913, stbuf_vld[3]) @[el2_lsu_stbuf.scala 199:138] + node _T_915 = bits(stbuf_match_lo, 3, 3) @[el2_lsu_stbuf.scala 199:113] + node _T_916 = bits(stbuf_byteen[3], 1, 1) @[el2_lsu_stbuf.scala 199:134] + node _T_917 = and(_T_915, _T_916) @[el2_lsu_stbuf.scala 199:117] + node _T_918 = and(_T_917, stbuf_vld[3]) @[el2_lsu_stbuf.scala 199:138] + node _T_919 = bits(stbuf_match_lo, 3, 3) @[el2_lsu_stbuf.scala 199:113] + node _T_920 = bits(stbuf_byteen[3], 2, 2) @[el2_lsu_stbuf.scala 199:134] + node _T_921 = and(_T_919, _T_920) @[el2_lsu_stbuf.scala 199:117] + node _T_922 = and(_T_921, stbuf_vld[3]) @[el2_lsu_stbuf.scala 199:138] + node _T_923 = bits(stbuf_match_lo, 3, 3) @[el2_lsu_stbuf.scala 199:113] + node _T_924 = bits(stbuf_byteen[3], 3, 3) @[el2_lsu_stbuf.scala 199:134] + node _T_925 = and(_T_923, _T_924) @[el2_lsu_stbuf.scala 199:117] + node _T_926 = and(_T_925, stbuf_vld[3]) @[el2_lsu_stbuf.scala 199:138] + node _T_927 = cat(_T_926, _T_922) @[Cat.scala 29:58] + node _T_928 = cat(_T_927, _T_918) @[Cat.scala 29:58] + node stbuf_fwdbyteenvec_lo_3 = cat(_T_928, _T_914) @[Cat.scala 29:58] + node _T_929 = bits(stbuf_fwdbyteenvec_hi_0, 0, 0) @[el2_lsu_stbuf.scala 200:126] + node _T_930 = bits(stbuf_fwdbyteenvec_hi_0, 1, 1) @[el2_lsu_stbuf.scala 200:126] + node _T_931 = bits(stbuf_fwdbyteenvec_hi_0, 2, 2) @[el2_lsu_stbuf.scala 200:126] + node _T_932 = bits(stbuf_fwdbyteenvec_hi_0, 3, 3) @[el2_lsu_stbuf.scala 200:126] + node _T_933 = or(_T_932, _T_931) @[el2_lsu_stbuf.scala 200:156] + node _T_934 = or(_T_933, _T_930) @[el2_lsu_stbuf.scala 200:156] + node stbuf_fwdbyteen_hi_pre_m_0 = or(_T_934, _T_929) @[el2_lsu_stbuf.scala 200:156] + node _T_935 = bits(stbuf_fwdbyteenvec_hi_1, 0, 0) @[el2_lsu_stbuf.scala 200:126] + node _T_936 = bits(stbuf_fwdbyteenvec_hi_1, 1, 1) @[el2_lsu_stbuf.scala 200:126] + node _T_937 = bits(stbuf_fwdbyteenvec_hi_1, 2, 2) @[el2_lsu_stbuf.scala 200:126] + node _T_938 = bits(stbuf_fwdbyteenvec_hi_1, 3, 3) @[el2_lsu_stbuf.scala 200:126] + node _T_939 = or(_T_938, _T_937) @[el2_lsu_stbuf.scala 200:156] + node _T_940 = or(_T_939, _T_936) @[el2_lsu_stbuf.scala 200:156] + node stbuf_fwdbyteen_hi_pre_m_1 = or(_T_940, _T_935) @[el2_lsu_stbuf.scala 200:156] + node _T_941 = bits(stbuf_fwdbyteenvec_hi_2, 0, 0) @[el2_lsu_stbuf.scala 200:126] + node _T_942 = bits(stbuf_fwdbyteenvec_hi_2, 1, 1) @[el2_lsu_stbuf.scala 200:126] + node _T_943 = bits(stbuf_fwdbyteenvec_hi_2, 2, 2) @[el2_lsu_stbuf.scala 200:126] + node _T_944 = bits(stbuf_fwdbyteenvec_hi_2, 3, 3) @[el2_lsu_stbuf.scala 200:126] + node _T_945 = or(_T_944, _T_943) @[el2_lsu_stbuf.scala 200:156] + node _T_946 = or(_T_945, _T_942) @[el2_lsu_stbuf.scala 200:156] + node stbuf_fwdbyteen_hi_pre_m_2 = or(_T_946, _T_941) @[el2_lsu_stbuf.scala 200:156] + node _T_947 = bits(stbuf_fwdbyteenvec_hi_3, 0, 0) @[el2_lsu_stbuf.scala 200:126] + node _T_948 = bits(stbuf_fwdbyteenvec_hi_3, 1, 1) @[el2_lsu_stbuf.scala 200:126] + node _T_949 = bits(stbuf_fwdbyteenvec_hi_3, 2, 2) @[el2_lsu_stbuf.scala 200:126] + node _T_950 = bits(stbuf_fwdbyteenvec_hi_3, 3, 3) @[el2_lsu_stbuf.scala 200:126] + node _T_951 = or(_T_950, _T_949) @[el2_lsu_stbuf.scala 200:156] + node _T_952 = or(_T_951, _T_948) @[el2_lsu_stbuf.scala 200:156] + node stbuf_fwdbyteen_hi_pre_m_3 = or(_T_952, _T_947) @[el2_lsu_stbuf.scala 200:156] + node _T_953 = bits(stbuf_fwdbyteenvec_lo_0, 0, 0) @[el2_lsu_stbuf.scala 201:126] + node _T_954 = bits(stbuf_fwdbyteenvec_lo_0, 1, 1) @[el2_lsu_stbuf.scala 201:126] + node _T_955 = bits(stbuf_fwdbyteenvec_lo_0, 2, 2) @[el2_lsu_stbuf.scala 201:126] + node _T_956 = bits(stbuf_fwdbyteenvec_lo_0, 3, 3) @[el2_lsu_stbuf.scala 201:126] + node _T_957 = or(_T_956, _T_955) @[el2_lsu_stbuf.scala 201:156] + node _T_958 = or(_T_957, _T_954) @[el2_lsu_stbuf.scala 201:156] + node stbuf_fwdbyteen_lo_pre_m_0 = or(_T_958, _T_953) @[el2_lsu_stbuf.scala 201:156] + node _T_959 = bits(stbuf_fwdbyteenvec_lo_1, 0, 0) @[el2_lsu_stbuf.scala 201:126] + node _T_960 = bits(stbuf_fwdbyteenvec_lo_1, 1, 1) @[el2_lsu_stbuf.scala 201:126] + node _T_961 = bits(stbuf_fwdbyteenvec_lo_1, 2, 2) @[el2_lsu_stbuf.scala 201:126] + node _T_962 = bits(stbuf_fwdbyteenvec_lo_1, 3, 3) @[el2_lsu_stbuf.scala 201:126] + node _T_963 = or(_T_962, _T_961) @[el2_lsu_stbuf.scala 201:156] + node _T_964 = or(_T_963, _T_960) @[el2_lsu_stbuf.scala 201:156] + node stbuf_fwdbyteen_lo_pre_m_1 = or(_T_964, _T_959) @[el2_lsu_stbuf.scala 201:156] + node _T_965 = bits(stbuf_fwdbyteenvec_lo_2, 0, 0) @[el2_lsu_stbuf.scala 201:126] + node _T_966 = bits(stbuf_fwdbyteenvec_lo_2, 1, 1) @[el2_lsu_stbuf.scala 201:126] + node _T_967 = bits(stbuf_fwdbyteenvec_lo_2, 2, 2) @[el2_lsu_stbuf.scala 201:126] + node _T_968 = bits(stbuf_fwdbyteenvec_lo_2, 3, 3) @[el2_lsu_stbuf.scala 201:126] + node _T_969 = or(_T_968, _T_967) @[el2_lsu_stbuf.scala 201:156] + node _T_970 = or(_T_969, _T_966) @[el2_lsu_stbuf.scala 201:156] + node stbuf_fwdbyteen_lo_pre_m_2 = or(_T_970, _T_965) @[el2_lsu_stbuf.scala 201:156] + node _T_971 = bits(stbuf_fwdbyteenvec_lo_3, 0, 0) @[el2_lsu_stbuf.scala 201:126] + node _T_972 = bits(stbuf_fwdbyteenvec_lo_3, 1, 1) @[el2_lsu_stbuf.scala 201:126] + node _T_973 = bits(stbuf_fwdbyteenvec_lo_3, 2, 2) @[el2_lsu_stbuf.scala 201:126] + node _T_974 = bits(stbuf_fwdbyteenvec_lo_3, 3, 3) @[el2_lsu_stbuf.scala 201:126] + node _T_975 = or(_T_974, _T_973) @[el2_lsu_stbuf.scala 201:156] + node _T_976 = or(_T_975, _T_972) @[el2_lsu_stbuf.scala 201:156] + node stbuf_fwdbyteen_lo_pre_m_3 = or(_T_976, _T_971) @[el2_lsu_stbuf.scala 201:156] + node _T_977 = bits(stbuf_match_hi, 0, 0) @[el2_lsu_stbuf.scala 203:93] + node _T_978 = bits(_T_977, 0, 0) @[Bitwise.scala 72:15] + node _T_979 = mux(_T_978, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_980 = and(_T_979, stbuf_data[0]) @[el2_lsu_stbuf.scala 203:98] + node _T_981 = bits(stbuf_match_hi, 1, 1) @[el2_lsu_stbuf.scala 203:93] + node _T_982 = bits(_T_981, 0, 0) @[Bitwise.scala 72:15] + node _T_983 = mux(_T_982, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_984 = and(_T_983, stbuf_data[1]) @[el2_lsu_stbuf.scala 203:98] + node _T_985 = bits(stbuf_match_hi, 2, 2) @[el2_lsu_stbuf.scala 203:93] + node _T_986 = bits(_T_985, 0, 0) @[Bitwise.scala 72:15] + node _T_987 = mux(_T_986, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_988 = and(_T_987, stbuf_data[2]) @[el2_lsu_stbuf.scala 203:98] + node _T_989 = bits(stbuf_match_hi, 3, 3) @[el2_lsu_stbuf.scala 203:93] + node _T_990 = bits(_T_989, 0, 0) @[Bitwise.scala 72:15] + node _T_991 = mux(_T_990, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_992 = and(_T_991, stbuf_data[3]) @[el2_lsu_stbuf.scala 203:98] + wire _T_993 : UInt<32>[4] @[el2_lsu_stbuf.scala 203:66] + _T_993[0] <= _T_980 @[el2_lsu_stbuf.scala 203:66] + _T_993[1] <= _T_984 @[el2_lsu_stbuf.scala 203:66] + _T_993[2] <= _T_988 @[el2_lsu_stbuf.scala 203:66] + _T_993[3] <= _T_992 @[el2_lsu_stbuf.scala 203:66] + node _T_994 = or(_T_993[0], _T_993[1]) @[el2_lsu_stbuf.scala 203:123] + node _T_995 = or(_T_994, _T_993[2]) @[el2_lsu_stbuf.scala 203:123] + node stbuf_fwddata_hi_pre_m = or(_T_995, _T_993[3]) @[el2_lsu_stbuf.scala 203:123] + node _T_996 = bits(stbuf_match_lo, 0, 0) @[el2_lsu_stbuf.scala 204:93] + node _T_997 = bits(_T_996, 0, 0) @[Bitwise.scala 72:15] + node _T_998 = mux(_T_997, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_999 = and(_T_998, stbuf_data[0]) @[el2_lsu_stbuf.scala 204:98] + node _T_1000 = bits(stbuf_match_lo, 1, 1) @[el2_lsu_stbuf.scala 204:93] + node _T_1001 = bits(_T_1000, 0, 0) @[Bitwise.scala 72:15] + node _T_1002 = mux(_T_1001, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_1003 = and(_T_1002, stbuf_data[1]) @[el2_lsu_stbuf.scala 204:98] + node _T_1004 = bits(stbuf_match_lo, 2, 2) @[el2_lsu_stbuf.scala 204:93] + node _T_1005 = bits(_T_1004, 0, 0) @[Bitwise.scala 72:15] + node _T_1006 = mux(_T_1005, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_1007 = and(_T_1006, stbuf_data[2]) @[el2_lsu_stbuf.scala 204:98] + node _T_1008 = bits(stbuf_match_lo, 3, 3) @[el2_lsu_stbuf.scala 204:93] + node _T_1009 = bits(_T_1008, 0, 0) @[Bitwise.scala 72:15] + node _T_1010 = mux(_T_1009, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_1011 = and(_T_1010, stbuf_data[3]) @[el2_lsu_stbuf.scala 204:98] + wire _T_1012 : UInt<32>[4] @[el2_lsu_stbuf.scala 204:66] + _T_1012[0] <= _T_999 @[el2_lsu_stbuf.scala 204:66] + _T_1012[1] <= _T_1003 @[el2_lsu_stbuf.scala 204:66] + _T_1012[2] <= _T_1007 @[el2_lsu_stbuf.scala 204:66] + _T_1012[3] <= _T_1011 @[el2_lsu_stbuf.scala 204:66] + node _T_1013 = or(_T_1012[0], _T_1012[1]) @[el2_lsu_stbuf.scala 204:123] + node _T_1014 = or(_T_1013, _T_1012[2]) @[el2_lsu_stbuf.scala 204:123] + node stbuf_fwddata_lo_pre_m = or(_T_1014, _T_1012[3]) @[el2_lsu_stbuf.scala 204:123] + node _T_1015 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_stbuf.scala 206:55] + node _T_1016 = dshl(ldst_byteen_r, _T_1015) @[el2_lsu_stbuf.scala 206:39] + ldst_byteen_ext_r <= _T_1016 @[el2_lsu_stbuf.scala 206:22] + node ldst_byteen_hi_r = bits(ldst_byteen_ext_r, 7, 4) @[el2_lsu_stbuf.scala 207:44] + node ldst_byteen_lo_r = bits(ldst_byteen_ext_r, 3, 0) @[el2_lsu_stbuf.scala 208:44] + node _T_1017 = bits(io.lsu_addr_m, 31, 2) @[el2_lsu_stbuf.scala 210:43] + node _T_1018 = bits(io.lsu_addr_r, 31, 2) @[el2_lsu_stbuf.scala 210:67] + node _T_1019 = eq(_T_1017, _T_1018) @[el2_lsu_stbuf.scala 210:50] + node _T_1020 = and(_T_1019, io.lsu_pkt_r.valid) @[el2_lsu_stbuf.scala 210:75] + node _T_1021 = and(_T_1020, io.lsu_pkt_r.store) @[el2_lsu_stbuf.scala 210:96] + node _T_1022 = eq(io.lsu_pkt_r.dma, UInt<1>("h00")) @[el2_lsu_stbuf.scala 210:119] + node ld_addr_rhit_lo_lo = and(_T_1021, _T_1022) @[el2_lsu_stbuf.scala 210:117] + node _T_1023 = bits(io.end_addr_m, 31, 2) @[el2_lsu_stbuf.scala 211:43] + node _T_1024 = bits(io.lsu_addr_r, 31, 2) @[el2_lsu_stbuf.scala 211:67] + node _T_1025 = eq(_T_1023, _T_1024) @[el2_lsu_stbuf.scala 211:50] + node _T_1026 = and(_T_1025, io.lsu_pkt_r.valid) @[el2_lsu_stbuf.scala 211:75] + node _T_1027 = and(_T_1026, io.lsu_pkt_r.store) @[el2_lsu_stbuf.scala 211:96] + node _T_1028 = eq(io.lsu_pkt_r.dma, UInt<1>("h00")) @[el2_lsu_stbuf.scala 211:119] + node ld_addr_rhit_lo_hi = and(_T_1027, _T_1028) @[el2_lsu_stbuf.scala 211:117] + node _T_1029 = bits(io.lsu_addr_m, 31, 2) @[el2_lsu_stbuf.scala 212:43] + node _T_1030 = bits(io.end_addr_r, 31, 2) @[el2_lsu_stbuf.scala 212:67] + node _T_1031 = eq(_T_1029, _T_1030) @[el2_lsu_stbuf.scala 212:50] + node _T_1032 = and(_T_1031, io.lsu_pkt_r.valid) @[el2_lsu_stbuf.scala 212:75] + node _T_1033 = and(_T_1032, io.lsu_pkt_r.store) @[el2_lsu_stbuf.scala 212:96] + node _T_1034 = eq(io.lsu_pkt_r.dma, UInt<1>("h00")) @[el2_lsu_stbuf.scala 212:119] + node _T_1035 = and(_T_1033, _T_1034) @[el2_lsu_stbuf.scala 212:117] + node ld_addr_rhit_hi_lo = and(_T_1035, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 212:137] + node _T_1036 = bits(io.end_addr_m, 31, 2) @[el2_lsu_stbuf.scala 213:43] + node _T_1037 = bits(io.end_addr_r, 31, 2) @[el2_lsu_stbuf.scala 213:67] + node _T_1038 = eq(_T_1036, _T_1037) @[el2_lsu_stbuf.scala 213:50] + node _T_1039 = and(_T_1038, io.lsu_pkt_r.valid) @[el2_lsu_stbuf.scala 213:75] + node _T_1040 = and(_T_1039, io.lsu_pkt_r.store) @[el2_lsu_stbuf.scala 213:96] + node _T_1041 = eq(io.lsu_pkt_r.dma, UInt<1>("h00")) @[el2_lsu_stbuf.scala 213:119] + node _T_1042 = and(_T_1040, _T_1041) @[el2_lsu_stbuf.scala 213:117] + node ld_addr_rhit_hi_hi = and(_T_1042, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 213:137] + node _T_1043 = bits(ldst_byteen_lo_r, 0, 0) @[el2_lsu_stbuf.scala 215:98] + node _T_1044 = and(ld_addr_rhit_lo_lo, _T_1043) @[el2_lsu_stbuf.scala 215:80] + node _T_1045 = bits(ldst_byteen_lo_r, 1, 1) @[el2_lsu_stbuf.scala 215:98] + node _T_1046 = and(ld_addr_rhit_lo_lo, _T_1045) @[el2_lsu_stbuf.scala 215:80] + node _T_1047 = bits(ldst_byteen_lo_r, 2, 2) @[el2_lsu_stbuf.scala 215:98] + node _T_1048 = and(ld_addr_rhit_lo_lo, _T_1047) @[el2_lsu_stbuf.scala 215:80] + node _T_1049 = bits(ldst_byteen_lo_r, 3, 3) @[el2_lsu_stbuf.scala 215:98] + node _T_1050 = and(ld_addr_rhit_lo_lo, _T_1049) @[el2_lsu_stbuf.scala 215:80] + node _T_1051 = cat(_T_1050, _T_1048) @[Cat.scala 29:58] + node _T_1052 = cat(_T_1051, _T_1046) @[Cat.scala 29:58] + node _T_1053 = cat(_T_1052, _T_1044) @[Cat.scala 29:58] + ld_byte_rhit_lo_lo <= _T_1053 @[el2_lsu_stbuf.scala 215:23] + node _T_1054 = bits(ldst_byteen_lo_r, 0, 0) @[el2_lsu_stbuf.scala 216:98] + node _T_1055 = and(ld_addr_rhit_lo_hi, _T_1054) @[el2_lsu_stbuf.scala 216:80] + node _T_1056 = bits(ldst_byteen_lo_r, 1, 1) @[el2_lsu_stbuf.scala 216:98] + node _T_1057 = and(ld_addr_rhit_lo_hi, _T_1056) @[el2_lsu_stbuf.scala 216:80] + node _T_1058 = bits(ldst_byteen_lo_r, 2, 2) @[el2_lsu_stbuf.scala 216:98] + node _T_1059 = and(ld_addr_rhit_lo_hi, _T_1058) @[el2_lsu_stbuf.scala 216:80] + node _T_1060 = bits(ldst_byteen_lo_r, 3, 3) @[el2_lsu_stbuf.scala 216:98] + node _T_1061 = and(ld_addr_rhit_lo_hi, _T_1060) @[el2_lsu_stbuf.scala 216:80] + node _T_1062 = cat(_T_1061, _T_1059) @[Cat.scala 29:58] + node _T_1063 = cat(_T_1062, _T_1057) @[Cat.scala 29:58] + node _T_1064 = cat(_T_1063, _T_1055) @[Cat.scala 29:58] + ld_byte_rhit_lo_hi <= _T_1064 @[el2_lsu_stbuf.scala 216:23] + node _T_1065 = bits(ldst_byteen_hi_r, 0, 0) @[el2_lsu_stbuf.scala 217:98] + node _T_1066 = and(ld_addr_rhit_hi_lo, _T_1065) @[el2_lsu_stbuf.scala 217:80] + node _T_1067 = bits(ldst_byteen_hi_r, 1, 1) @[el2_lsu_stbuf.scala 217:98] + node _T_1068 = and(ld_addr_rhit_hi_lo, _T_1067) @[el2_lsu_stbuf.scala 217:80] + node _T_1069 = bits(ldst_byteen_hi_r, 2, 2) @[el2_lsu_stbuf.scala 217:98] + node _T_1070 = and(ld_addr_rhit_hi_lo, _T_1069) @[el2_lsu_stbuf.scala 217:80] + node _T_1071 = bits(ldst_byteen_hi_r, 3, 3) @[el2_lsu_stbuf.scala 217:98] + node _T_1072 = and(ld_addr_rhit_hi_lo, _T_1071) @[el2_lsu_stbuf.scala 217:80] + node _T_1073 = cat(_T_1072, _T_1070) @[Cat.scala 29:58] + node _T_1074 = cat(_T_1073, _T_1068) @[Cat.scala 29:58] + node _T_1075 = cat(_T_1074, _T_1066) @[Cat.scala 29:58] + ld_byte_rhit_hi_lo <= _T_1075 @[el2_lsu_stbuf.scala 217:23] + node _T_1076 = bits(ldst_byteen_hi_r, 0, 0) @[el2_lsu_stbuf.scala 218:98] + node _T_1077 = and(ld_addr_rhit_hi_hi, _T_1076) @[el2_lsu_stbuf.scala 218:80] + node _T_1078 = bits(ldst_byteen_hi_r, 1, 1) @[el2_lsu_stbuf.scala 218:98] + node _T_1079 = and(ld_addr_rhit_hi_hi, _T_1078) @[el2_lsu_stbuf.scala 218:80] + node _T_1080 = bits(ldst_byteen_hi_r, 2, 2) @[el2_lsu_stbuf.scala 218:98] + node _T_1081 = and(ld_addr_rhit_hi_hi, _T_1080) @[el2_lsu_stbuf.scala 218:80] + node _T_1082 = bits(ldst_byteen_hi_r, 3, 3) @[el2_lsu_stbuf.scala 218:98] + node _T_1083 = and(ld_addr_rhit_hi_hi, _T_1082) @[el2_lsu_stbuf.scala 218:80] + node _T_1084 = cat(_T_1083, _T_1081) @[Cat.scala 29:58] + node _T_1085 = cat(_T_1084, _T_1079) @[Cat.scala 29:58] + node _T_1086 = cat(_T_1085, _T_1077) @[Cat.scala 29:58] + ld_byte_rhit_hi_hi <= _T_1086 @[el2_lsu_stbuf.scala 218:23] + node _T_1087 = bits(ld_byte_rhit_hi_lo, 0, 0) @[el2_lsu_stbuf.scala 220:97] + node _T_1088 = or(ld_byte_rhit_lo_lo, _T_1087) @[el2_lsu_stbuf.scala 220:77] + node _T_1089 = bits(ld_byte_rhit_hi_lo, 1, 1) @[el2_lsu_stbuf.scala 220:97] + node _T_1090 = or(ld_byte_rhit_lo_lo, _T_1089) @[el2_lsu_stbuf.scala 220:77] + node _T_1091 = bits(ld_byte_rhit_hi_lo, 2, 2) @[el2_lsu_stbuf.scala 220:97] + node _T_1092 = or(ld_byte_rhit_lo_lo, _T_1091) @[el2_lsu_stbuf.scala 220:77] + node _T_1093 = bits(ld_byte_rhit_hi_lo, 3, 3) @[el2_lsu_stbuf.scala 220:97] + node _T_1094 = or(ld_byte_rhit_lo_lo, _T_1093) @[el2_lsu_stbuf.scala 220:77] + node _T_1095 = cat(_T_1094, _T_1092) @[Cat.scala 29:58] + node _T_1096 = cat(_T_1095, _T_1090) @[Cat.scala 29:58] + node _T_1097 = cat(_T_1096, _T_1088) @[Cat.scala 29:58] + ld_byte_rhit_lo <= _T_1097 @[el2_lsu_stbuf.scala 220:20] + node _T_1098 = bits(ld_byte_rhit_hi_hi, 0, 0) @[el2_lsu_stbuf.scala 221:97] + node _T_1099 = or(ld_byte_rhit_lo_hi, _T_1098) @[el2_lsu_stbuf.scala 221:77] + node _T_1100 = bits(ld_byte_rhit_hi_hi, 1, 1) @[el2_lsu_stbuf.scala 221:97] + node _T_1101 = or(ld_byte_rhit_lo_hi, _T_1100) @[el2_lsu_stbuf.scala 221:77] + node _T_1102 = bits(ld_byte_rhit_hi_hi, 2, 2) @[el2_lsu_stbuf.scala 221:97] + node _T_1103 = or(ld_byte_rhit_lo_hi, _T_1102) @[el2_lsu_stbuf.scala 221:77] + node _T_1104 = bits(ld_byte_rhit_hi_hi, 3, 3) @[el2_lsu_stbuf.scala 221:97] + node _T_1105 = or(ld_byte_rhit_lo_hi, _T_1104) @[el2_lsu_stbuf.scala 221:77] + node _T_1106 = cat(_T_1105, _T_1103) @[Cat.scala 29:58] + node _T_1107 = cat(_T_1106, _T_1101) @[Cat.scala 29:58] + node _T_1108 = cat(_T_1107, _T_1099) @[Cat.scala 29:58] + ld_byte_rhit_hi <= _T_1108 @[el2_lsu_stbuf.scala 221:20] + node _T_1109 = bits(ld_byte_rhit_lo_lo, 0, 0) @[el2_lsu_stbuf.scala 223:49] + node _T_1110 = bits(_T_1109, 0, 0) @[Bitwise.scala 72:15] + node _T_1111 = mux(_T_1110, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1112 = bits(io.store_data_lo_r, 7, 0) @[el2_lsu_stbuf.scala 223:74] + node _T_1113 = and(_T_1111, _T_1112) @[el2_lsu_stbuf.scala 223:54] + node _T_1114 = bits(ld_byte_rhit_hi_lo, 0, 0) @[el2_lsu_stbuf.scala 223:110] + node _T_1115 = bits(_T_1114, 0, 0) @[Bitwise.scala 72:15] + node _T_1116 = mux(_T_1115, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1117 = bits(io.store_data_hi_r, 7, 0) @[el2_lsu_stbuf.scala 223:135] + node _T_1118 = and(_T_1116, _T_1117) @[el2_lsu_stbuf.scala 223:115] + node fwdpipe1_lo = or(_T_1113, _T_1118) @[el2_lsu_stbuf.scala 223:81] + node _T_1119 = bits(ld_byte_rhit_lo_lo, 1, 1) @[el2_lsu_stbuf.scala 224:49] + node _T_1120 = bits(_T_1119, 0, 0) @[Bitwise.scala 72:15] + node _T_1121 = mux(_T_1120, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1122 = bits(io.store_data_lo_r, 15, 8) @[el2_lsu_stbuf.scala 224:74] + node _T_1123 = and(_T_1121, _T_1122) @[el2_lsu_stbuf.scala 224:54] + node _T_1124 = bits(ld_byte_rhit_hi_lo, 1, 1) @[el2_lsu_stbuf.scala 224:111] + node _T_1125 = bits(_T_1124, 0, 0) @[Bitwise.scala 72:15] + node _T_1126 = mux(_T_1125, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1127 = bits(io.store_data_hi_r, 15, 8) @[el2_lsu_stbuf.scala 224:136] + node _T_1128 = and(_T_1126, _T_1127) @[el2_lsu_stbuf.scala 224:116] + node fwdpipe2_lo = or(_T_1123, _T_1128) @[el2_lsu_stbuf.scala 224:82] + node _T_1129 = bits(ld_byte_rhit_lo_lo, 2, 2) @[el2_lsu_stbuf.scala 225:49] + node _T_1130 = bits(_T_1129, 0, 0) @[Bitwise.scala 72:15] + node _T_1131 = mux(_T_1130, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1132 = bits(io.store_data_lo_r, 23, 16) @[el2_lsu_stbuf.scala 225:74] + node _T_1133 = and(_T_1131, _T_1132) @[el2_lsu_stbuf.scala 225:54] + node _T_1134 = bits(ld_byte_rhit_hi_lo, 2, 2) @[el2_lsu_stbuf.scala 225:112] + node _T_1135 = bits(_T_1134, 0, 0) @[Bitwise.scala 72:15] + node _T_1136 = mux(_T_1135, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1137 = bits(io.store_data_hi_r, 23, 16) @[el2_lsu_stbuf.scala 225:137] + node _T_1138 = and(_T_1136, _T_1137) @[el2_lsu_stbuf.scala 225:117] + node fwdpipe3_lo = or(_T_1133, _T_1138) @[el2_lsu_stbuf.scala 225:83] + node _T_1139 = bits(ld_byte_rhit_lo_lo, 3, 3) @[el2_lsu_stbuf.scala 226:49] + node _T_1140 = bits(_T_1139, 0, 0) @[Bitwise.scala 72:15] + node _T_1141 = mux(_T_1140, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1142 = bits(io.store_data_lo_r, 31, 24) @[el2_lsu_stbuf.scala 226:74] + node _T_1143 = and(_T_1141, _T_1142) @[el2_lsu_stbuf.scala 226:54] + node _T_1144 = bits(ld_byte_rhit_hi_lo, 3, 3) @[el2_lsu_stbuf.scala 226:112] + node _T_1145 = bits(_T_1144, 0, 0) @[Bitwise.scala 72:15] + node _T_1146 = mux(_T_1145, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1147 = bits(io.store_data_hi_r, 31, 8) @[el2_lsu_stbuf.scala 226:137] + node _T_1148 = and(_T_1146, _T_1147) @[el2_lsu_stbuf.scala 226:117] + node fwdpipe4_lo = or(_T_1143, _T_1148) @[el2_lsu_stbuf.scala 226:83] + node _T_1149 = cat(fwdpipe2_lo, fwdpipe1_lo) @[Cat.scala 29:58] + node _T_1150 = cat(fwdpipe4_lo, fwdpipe3_lo) @[Cat.scala 29:58] + node _T_1151 = cat(_T_1150, _T_1149) @[Cat.scala 29:58] + ld_fwddata_rpipe_lo <= _T_1151 @[el2_lsu_stbuf.scala 227:24] + node _T_1152 = bits(ld_byte_rhit_lo_hi, 0, 0) @[el2_lsu_stbuf.scala 229:49] + node _T_1153 = bits(_T_1152, 0, 0) @[Bitwise.scala 72:15] + node _T_1154 = mux(_T_1153, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1155 = bits(io.store_data_lo_r, 7, 0) @[el2_lsu_stbuf.scala 229:74] + node _T_1156 = and(_T_1154, _T_1155) @[el2_lsu_stbuf.scala 229:54] + node _T_1157 = bits(ld_byte_rhit_hi_hi, 0, 0) @[el2_lsu_stbuf.scala 229:110] + node _T_1158 = bits(_T_1157, 0, 0) @[Bitwise.scala 72:15] + node _T_1159 = mux(_T_1158, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1160 = bits(io.store_data_hi_r, 7, 0) @[el2_lsu_stbuf.scala 229:135] + node _T_1161 = and(_T_1159, _T_1160) @[el2_lsu_stbuf.scala 229:115] + node fwdpipe1_hi = or(_T_1156, _T_1161) @[el2_lsu_stbuf.scala 229:81] + node _T_1162 = bits(ld_byte_rhit_lo_hi, 1, 1) @[el2_lsu_stbuf.scala 230:49] + node _T_1163 = bits(_T_1162, 0, 0) @[Bitwise.scala 72:15] + node _T_1164 = mux(_T_1163, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1165 = bits(io.store_data_lo_r, 15, 8) @[el2_lsu_stbuf.scala 230:74] + node _T_1166 = and(_T_1164, _T_1165) @[el2_lsu_stbuf.scala 230:54] + node _T_1167 = bits(ld_byte_rhit_hi_hi, 1, 1) @[el2_lsu_stbuf.scala 230:111] + node _T_1168 = bits(_T_1167, 0, 0) @[Bitwise.scala 72:15] + node _T_1169 = mux(_T_1168, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1170 = bits(io.store_data_hi_r, 15, 8) @[el2_lsu_stbuf.scala 230:136] + node _T_1171 = and(_T_1169, _T_1170) @[el2_lsu_stbuf.scala 230:116] + node fwdpipe2_hi = or(_T_1166, _T_1171) @[el2_lsu_stbuf.scala 230:82] + node _T_1172 = bits(ld_byte_rhit_lo_hi, 2, 2) @[el2_lsu_stbuf.scala 231:49] + node _T_1173 = bits(_T_1172, 0, 0) @[Bitwise.scala 72:15] + node _T_1174 = mux(_T_1173, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1175 = bits(io.store_data_lo_r, 23, 16) @[el2_lsu_stbuf.scala 231:74] + node _T_1176 = and(_T_1174, _T_1175) @[el2_lsu_stbuf.scala 231:54] + node _T_1177 = bits(ld_byte_rhit_hi_hi, 2, 2) @[el2_lsu_stbuf.scala 231:112] + node _T_1178 = bits(_T_1177, 0, 0) @[Bitwise.scala 72:15] + node _T_1179 = mux(_T_1178, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1180 = bits(io.store_data_hi_r, 23, 16) @[el2_lsu_stbuf.scala 231:137] + node _T_1181 = and(_T_1179, _T_1180) @[el2_lsu_stbuf.scala 231:117] + node fwdpipe3_hi = or(_T_1176, _T_1181) @[el2_lsu_stbuf.scala 231:83] + node _T_1182 = bits(ld_byte_rhit_lo_hi, 3, 3) @[el2_lsu_stbuf.scala 232:49] + node _T_1183 = bits(_T_1182, 0, 0) @[Bitwise.scala 72:15] + node _T_1184 = mux(_T_1183, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1185 = bits(io.store_data_lo_r, 31, 24) @[el2_lsu_stbuf.scala 232:74] + node _T_1186 = and(_T_1184, _T_1185) @[el2_lsu_stbuf.scala 232:54] + node _T_1187 = bits(ld_byte_rhit_hi_hi, 3, 3) @[el2_lsu_stbuf.scala 232:112] + node _T_1188 = bits(_T_1187, 0, 0) @[Bitwise.scala 72:15] + node _T_1189 = mux(_T_1188, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1190 = bits(io.store_data_hi_r, 31, 8) @[el2_lsu_stbuf.scala 232:137] + node _T_1191 = and(_T_1189, _T_1190) @[el2_lsu_stbuf.scala 232:117] + node fwdpipe4_hi = or(_T_1186, _T_1191) @[el2_lsu_stbuf.scala 232:83] + node _T_1192 = cat(fwdpipe2_hi, fwdpipe1_hi) @[Cat.scala 29:58] + node _T_1193 = cat(fwdpipe4_hi, fwdpipe3_hi) @[Cat.scala 29:58] + node _T_1194 = cat(_T_1193, _T_1192) @[Cat.scala 29:58] + ld_fwddata_rpipe_hi <= _T_1194 @[el2_lsu_stbuf.scala 233:24] + node _T_1195 = bits(ld_byte_hit_hi, 0, 0) @[el2_lsu_stbuf.scala 235:80] + node _T_1196 = or(_T_1195, stbuf_fwdbyteen_hi_pre_m_0) @[el2_lsu_stbuf.scala 235:84] + node _T_1197 = bits(ld_byte_hit_hi, 1, 1) @[el2_lsu_stbuf.scala 235:80] + node _T_1198 = or(_T_1197, stbuf_fwdbyteen_hi_pre_m_1) @[el2_lsu_stbuf.scala 235:84] + node _T_1199 = bits(ld_byte_hit_hi, 2, 2) @[el2_lsu_stbuf.scala 235:80] + node _T_1200 = or(_T_1199, stbuf_fwdbyteen_hi_pre_m_2) @[el2_lsu_stbuf.scala 235:84] + node _T_1201 = bits(ld_byte_hit_hi, 3, 3) @[el2_lsu_stbuf.scala 235:80] + node _T_1202 = or(_T_1201, stbuf_fwdbyteen_hi_pre_m_3) @[el2_lsu_stbuf.scala 235:84] + node _T_1203 = cat(_T_1202, _T_1200) @[Cat.scala 29:58] + node _T_1204 = cat(_T_1203, _T_1198) @[Cat.scala 29:58] + node _T_1205 = cat(_T_1204, _T_1196) @[Cat.scala 29:58] + io.stbuf_fwdbyteen_hi_m <= _T_1205 @[el2_lsu_stbuf.scala 235:28] + node _T_1206 = bits(ld_byte_hit_lo, 0, 0) @[el2_lsu_stbuf.scala 236:80] + node _T_1207 = or(_T_1206, stbuf_fwdbyteen_lo_pre_m_0) @[el2_lsu_stbuf.scala 236:84] + node _T_1208 = bits(ld_byte_hit_lo, 1, 1) @[el2_lsu_stbuf.scala 236:80] + node _T_1209 = or(_T_1208, stbuf_fwdbyteen_lo_pre_m_1) @[el2_lsu_stbuf.scala 236:84] + node _T_1210 = bits(ld_byte_hit_lo, 2, 2) @[el2_lsu_stbuf.scala 236:80] + node _T_1211 = or(_T_1210, stbuf_fwdbyteen_lo_pre_m_2) @[el2_lsu_stbuf.scala 236:84] + node _T_1212 = bits(ld_byte_hit_lo, 3, 3) @[el2_lsu_stbuf.scala 236:80] + node _T_1213 = or(_T_1212, stbuf_fwdbyteen_lo_pre_m_3) @[el2_lsu_stbuf.scala 236:84] + node _T_1214 = cat(_T_1213, _T_1211) @[Cat.scala 29:58] + node _T_1215 = cat(_T_1214, _T_1209) @[Cat.scala 29:58] + node _T_1216 = cat(_T_1215, _T_1207) @[Cat.scala 29:58] + io.stbuf_fwdbyteen_lo_m <= _T_1216 @[el2_lsu_stbuf.scala 236:28] + node _T_1217 = bits(ld_byte_rhit_lo, 0, 0) @[el2_lsu_stbuf.scala 239:47] + node _T_1218 = bits(ld_fwddata_rpipe_lo, 7, 0) @[el2_lsu_stbuf.scala 239:70] + node _T_1219 = bits(stbuf_fwddata_lo_pre_m, 7, 0) @[el2_lsu_stbuf.scala 239:98] + node stbuf_fwdpipe1_lo = mux(_T_1217, _T_1218, _T_1219) @[el2_lsu_stbuf.scala 239:31] + node _T_1220 = bits(ld_byte_rhit_lo, 1, 1) @[el2_lsu_stbuf.scala 240:47] + node _T_1221 = bits(ld_fwddata_rpipe_lo, 15, 8) @[el2_lsu_stbuf.scala 240:70] + node _T_1222 = bits(stbuf_fwddata_lo_pre_m, 15, 8) @[el2_lsu_stbuf.scala 240:99] + node stbuf_fwdpipe2_lo = mux(_T_1220, _T_1221, _T_1222) @[el2_lsu_stbuf.scala 240:31] + node _T_1223 = bits(ld_byte_rhit_lo, 2, 2) @[el2_lsu_stbuf.scala 241:47] + node _T_1224 = bits(ld_fwddata_rpipe_lo, 23, 16) @[el2_lsu_stbuf.scala 241:70] + node _T_1225 = bits(stbuf_fwddata_lo_pre_m, 23, 16) @[el2_lsu_stbuf.scala 241:100] + node stbuf_fwdpipe3_lo = mux(_T_1223, _T_1224, _T_1225) @[el2_lsu_stbuf.scala 241:31] + node _T_1226 = bits(ld_byte_rhit_lo, 3, 3) @[el2_lsu_stbuf.scala 242:47] + node _T_1227 = bits(ld_fwddata_rpipe_lo, 31, 24) @[el2_lsu_stbuf.scala 242:70] + node _T_1228 = bits(stbuf_fwddata_lo_pre_m, 31, 24) @[el2_lsu_stbuf.scala 242:100] + node stbuf_fwdpipe4_lo = mux(_T_1226, _T_1227, _T_1228) @[el2_lsu_stbuf.scala 242:31] + node _T_1229 = cat(stbuf_fwdpipe2_lo, stbuf_fwdpipe1_lo) @[Cat.scala 29:58] + node _T_1230 = cat(stbuf_fwdpipe4_lo, stbuf_fwdpipe3_lo) @[Cat.scala 29:58] + node _T_1231 = cat(_T_1230, _T_1229) @[Cat.scala 29:58] + io.stbuf_fwddata_lo_m <= _T_1231 @[el2_lsu_stbuf.scala 243:26] + node _T_1232 = bits(ld_byte_rhit_hi, 0, 0) @[el2_lsu_stbuf.scala 245:47] + node _T_1233 = bits(ld_fwddata_rpipe_hi, 7, 0) @[el2_lsu_stbuf.scala 245:70] + node _T_1234 = bits(stbuf_fwddata_hi_pre_m, 7, 0) @[el2_lsu_stbuf.scala 245:98] + node stbuf_fwdpipe1_hi = mux(_T_1232, _T_1233, _T_1234) @[el2_lsu_stbuf.scala 245:31] + node _T_1235 = bits(ld_byte_rhit_hi, 1, 1) @[el2_lsu_stbuf.scala 246:47] + node _T_1236 = bits(ld_fwddata_rpipe_hi, 15, 8) @[el2_lsu_stbuf.scala 246:70] + node _T_1237 = bits(stbuf_fwddata_hi_pre_m, 15, 8) @[el2_lsu_stbuf.scala 246:99] + node stbuf_fwdpipe2_hi = mux(_T_1235, _T_1236, _T_1237) @[el2_lsu_stbuf.scala 246:31] + node _T_1238 = bits(ld_byte_rhit_hi, 2, 2) @[el2_lsu_stbuf.scala 247:47] + node _T_1239 = bits(ld_fwddata_rpipe_hi, 23, 16) @[el2_lsu_stbuf.scala 247:70] + node _T_1240 = bits(stbuf_fwddata_hi_pre_m, 23, 16) @[el2_lsu_stbuf.scala 247:100] + node stbuf_fwdpipe3_hi = mux(_T_1238, _T_1239, _T_1240) @[el2_lsu_stbuf.scala 247:31] + node _T_1241 = bits(ld_byte_rhit_hi, 3, 3) @[el2_lsu_stbuf.scala 248:47] + node _T_1242 = bits(ld_fwddata_rpipe_hi, 31, 24) @[el2_lsu_stbuf.scala 248:70] + node _T_1243 = bits(stbuf_fwddata_hi_pre_m, 31, 24) @[el2_lsu_stbuf.scala 248:100] + node stbuf_fwdpipe4_hi = mux(_T_1241, _T_1242, _T_1243) @[el2_lsu_stbuf.scala 248:31] + node _T_1244 = cat(stbuf_fwdpipe2_hi, stbuf_fwdpipe1_hi) @[Cat.scala 29:58] + node _T_1245 = cat(stbuf_fwdpipe4_hi, stbuf_fwdpipe3_hi) @[Cat.scala 29:58] + node _T_1246 = cat(_T_1245, _T_1244) @[Cat.scala 29:58] + io.stbuf_fwddata_hi_m <= _T_1246 @[el2_lsu_stbuf.scala 249:26] + reg _T_1247 : UInt, io.lsu_stbuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when WrPtrEn : @[Reg.scala 28:19] + _T_1247 <= NxtWrPtr @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + WrPtr <= _T_1247 @[el2_lsu_stbuf.scala 251:42] + reg _T_1248 : UInt, io.lsu_stbuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when RdPtrEn : @[Reg.scala 28:19] + _T_1248 <= NxtRdPtr @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + RdPtr <= _T_1248 @[el2_lsu_stbuf.scala 252:42] + + module el2_lsu_ecc : + input clock : Clock + input reset : AsyncReset + output io : {flip lsu_c2_r_clk : Clock, flip lsu_pkt_m : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip lsu_pkt_r : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip stbuf_data_any : UInt<32>, flip dec_tlu_core_ecc_disable : UInt<1>, flip lsu_dccm_rden_r : UInt<1>, flip addr_in_dccm_r : UInt<1>, flip lsu_addr_r : UInt<16>, flip end_addr_r : UInt<16>, flip lsu_addr_m : UInt<16>, flip end_addr_m : UInt<16>, flip dccm_rdata_hi_r : UInt<32>, flip dccm_rdata_lo_r : UInt<32>, flip dccm_rdata_hi_m : UInt<32>, flip dccm_rdata_lo_m : UInt<32>, flip dccm_data_ecc_hi_r : UInt<7>, flip dccm_data_ecc_lo_r : UInt<7>, flip dccm_data_ecc_hi_m : UInt<7>, flip dccm_data_ecc_lo_m : UInt<7>, flip ld_single_ecc_error_r : UInt<1>, flip ld_single_ecc_error_r_ff : UInt<1>, flip lsu_dccm_rden_m : UInt<1>, flip addr_in_dccm_m : UInt<1>, flip dma_dccm_wen : UInt<1>, flip dma_dccm_wdata_lo : UInt<32>, flip dma_dccm_wdata_hi : UInt<32>, flip scan_mode : UInt<1>, sec_data_hi_r : UInt<32>, sec_data_lo_r : UInt<32>, sec_data_hi_m : UInt<32>, sec_data_lo_m : UInt<32>, sec_data_hi_r_ff : UInt<32>, sec_data_lo_r_ff : UInt<32>, dma_dccm_wdata_ecc_hi : UInt<7>, dma_dccm_wdata_ecc_lo : UInt<7>, stbuf_ecc_any : UInt<7>, sec_data_ecc_hi_r_ff : UInt<7>, sec_data_ecc_lo_r_ff : UInt<7>, single_ecc_error_hi_r : UInt<1>, single_ecc_error_lo_r : UInt<1>, lsu_single_ecc_error_r : UInt<1>, lsu_double_ecc_error_r : UInt<1>, lsu_single_ecc_error_m : UInt<1>, lsu_double_ecc_error_m : UInt<1>} + + wire is_ldst_r : UInt<1> + is_ldst_r <= UInt<1>("h00") + wire is_ldst_hi_any : UInt<1> + is_ldst_hi_any <= UInt<1>("h00") + wire is_ldst_lo_any : UInt<1> + is_ldst_lo_any <= UInt<1>("h00") + wire dccm_wdata_hi_any : UInt<32> + dccm_wdata_hi_any <= UInt<32>("h00") + wire dccm_wdata_lo_any : UInt<32> + dccm_wdata_lo_any <= UInt<32>("h00") + wire dccm_rdata_hi_any : UInt<32> + dccm_rdata_hi_any <= UInt<32>("h00") + wire dccm_rdata_lo_any : UInt<32> + dccm_rdata_lo_any <= UInt<32>("h00") + wire dccm_wdata_ecc_hi_any : UInt<7> + dccm_wdata_ecc_hi_any <= UInt<7>("h00") + wire dccm_wdata_ecc_lo_any : UInt<7> + dccm_wdata_ecc_lo_any <= UInt<7>("h00") + wire dccm_data_ecc_hi_any : UInt<7> + dccm_data_ecc_hi_any <= UInt<7>("h00") + wire dccm_data_ecc_lo_any : UInt<7> + dccm_data_ecc_lo_any <= UInt<7>("h00") + wire double_ecc_error_hi_m : UInt<1> + double_ecc_error_hi_m <= UInt<1>("h00") + wire double_ecc_error_lo_m : UInt<1> + double_ecc_error_lo_m <= UInt<1>("h00") + wire double_ecc_error_hi_r : UInt<1> + double_ecc_error_hi_r <= UInt<1>("h00") + wire double_ecc_error_lo_r : UInt<1> + double_ecc_error_lo_r <= UInt<1>("h00") + wire ldst_dual_m : UInt<1> + ldst_dual_m <= UInt<1>("h00") + wire ldst_dual_r : UInt<1> + ldst_dual_r <= UInt<1>("h00") + wire is_ldst_m : UInt<1> + is_ldst_m <= UInt<1>("h00") + wire is_ldst_hi_m : UInt<1> + is_ldst_hi_m <= UInt<1>("h00") + wire is_ldst_lo_m : UInt<1> + is_ldst_lo_m <= UInt<1>("h00") + wire is_ldst_hi_r : UInt<1> + is_ldst_hi_r <= UInt<1>("h00") + wire is_ldst_lo_r : UInt<1> + is_ldst_lo_r <= UInt<1>("h00") + io.sec_data_hi_m <= UInt<1>("h00") @[el2_lsu_ecc.scala 88:32] + io.sec_data_lo_m <= UInt<1>("h00") @[el2_lsu_ecc.scala 89:32] + io.lsu_single_ecc_error_m <= UInt<1>("h00") @[el2_lsu_ecc.scala 90:30] + io.lsu_double_ecc_error_m <= UInt<1>("h00") @[el2_lsu_ecc.scala 91:30] + wire _T : UInt<1>[18] @[el2_lib.scala 259:18] + wire _T_1 : UInt<1>[18] @[el2_lib.scala 260:18] + wire _T_2 : UInt<1>[18] @[el2_lib.scala 261:18] + wire _T_3 : UInt<1>[15] @[el2_lib.scala 262:18] + wire _T_4 : UInt<1>[15] @[el2_lib.scala 263:18] + wire _T_5 : UInt<1>[6] @[el2_lib.scala 264:18] + node _T_6 = bits(dccm_rdata_hi_any, 0, 0) @[el2_lib.scala 271:36] + _T[0] <= _T_6 @[el2_lib.scala 271:30] + node _T_7 = bits(dccm_rdata_hi_any, 0, 0) @[el2_lib.scala 272:36] + _T_1[0] <= _T_7 @[el2_lib.scala 272:30] + node _T_8 = bits(dccm_rdata_hi_any, 1, 1) @[el2_lib.scala 271:36] + _T[1] <= _T_8 @[el2_lib.scala 271:30] + node _T_9 = bits(dccm_rdata_hi_any, 1, 1) @[el2_lib.scala 273:36] + _T_2[0] <= _T_9 @[el2_lib.scala 273:30] + node _T_10 = bits(dccm_rdata_hi_any, 2, 2) @[el2_lib.scala 272:36] + _T_1[1] <= _T_10 @[el2_lib.scala 272:30] + node _T_11 = bits(dccm_rdata_hi_any, 2, 2) @[el2_lib.scala 273:36] + _T_2[1] <= _T_11 @[el2_lib.scala 273:30] + node _T_12 = bits(dccm_rdata_hi_any, 3, 3) @[el2_lib.scala 271:36] + _T[2] <= _T_12 @[el2_lib.scala 271:30] + node _T_13 = bits(dccm_rdata_hi_any, 3, 3) @[el2_lib.scala 272:36] + _T_1[2] <= _T_13 @[el2_lib.scala 272:30] + node _T_14 = bits(dccm_rdata_hi_any, 3, 3) @[el2_lib.scala 273:36] + _T_2[2] <= _T_14 @[el2_lib.scala 273:30] + node _T_15 = bits(dccm_rdata_hi_any, 4, 4) @[el2_lib.scala 271:36] + _T[3] <= _T_15 @[el2_lib.scala 271:30] + node _T_16 = bits(dccm_rdata_hi_any, 4, 4) @[el2_lib.scala 274:36] + _T_3[0] <= _T_16 @[el2_lib.scala 274:30] + node _T_17 = bits(dccm_rdata_hi_any, 5, 5) @[el2_lib.scala 272:36] + _T_1[3] <= _T_17 @[el2_lib.scala 272:30] + node _T_18 = bits(dccm_rdata_hi_any, 5, 5) @[el2_lib.scala 274:36] + _T_3[1] <= _T_18 @[el2_lib.scala 274:30] + node _T_19 = bits(dccm_rdata_hi_any, 6, 6) @[el2_lib.scala 271:36] + _T[4] <= _T_19 @[el2_lib.scala 271:30] + node _T_20 = bits(dccm_rdata_hi_any, 6, 6) @[el2_lib.scala 272:36] + _T_1[4] <= _T_20 @[el2_lib.scala 272:30] + node _T_21 = bits(dccm_rdata_hi_any, 6, 6) @[el2_lib.scala 274:36] + _T_3[2] <= _T_21 @[el2_lib.scala 274:30] + node _T_22 = bits(dccm_rdata_hi_any, 7, 7) @[el2_lib.scala 273:36] + _T_2[3] <= _T_22 @[el2_lib.scala 273:30] + node _T_23 = bits(dccm_rdata_hi_any, 7, 7) @[el2_lib.scala 274:36] + _T_3[3] <= _T_23 @[el2_lib.scala 274:30] + node _T_24 = bits(dccm_rdata_hi_any, 8, 8) @[el2_lib.scala 271:36] + _T[5] <= _T_24 @[el2_lib.scala 271:30] + node _T_25 = bits(dccm_rdata_hi_any, 8, 8) @[el2_lib.scala 273:36] + _T_2[4] <= _T_25 @[el2_lib.scala 273:30] + node _T_26 = bits(dccm_rdata_hi_any, 8, 8) @[el2_lib.scala 274:36] + _T_3[4] <= _T_26 @[el2_lib.scala 274:30] + node _T_27 = bits(dccm_rdata_hi_any, 9, 9) @[el2_lib.scala 272:36] + _T_1[5] <= _T_27 @[el2_lib.scala 272:30] + node _T_28 = bits(dccm_rdata_hi_any, 9, 9) @[el2_lib.scala 273:36] + _T_2[5] <= _T_28 @[el2_lib.scala 273:30] + node _T_29 = bits(dccm_rdata_hi_any, 9, 9) @[el2_lib.scala 274:36] + _T_3[5] <= _T_29 @[el2_lib.scala 274:30] + node _T_30 = bits(dccm_rdata_hi_any, 10, 10) @[el2_lib.scala 271:36] + _T[6] <= _T_30 @[el2_lib.scala 271:30] + node _T_31 = bits(dccm_rdata_hi_any, 10, 10) @[el2_lib.scala 272:36] + _T_1[6] <= _T_31 @[el2_lib.scala 272:30] + node _T_32 = bits(dccm_rdata_hi_any, 10, 10) @[el2_lib.scala 273:36] + _T_2[6] <= _T_32 @[el2_lib.scala 273:30] + node _T_33 = bits(dccm_rdata_hi_any, 10, 10) @[el2_lib.scala 274:36] + _T_3[6] <= _T_33 @[el2_lib.scala 274:30] + node _T_34 = bits(dccm_rdata_hi_any, 11, 11) @[el2_lib.scala 271:36] + _T[7] <= _T_34 @[el2_lib.scala 271:30] + node _T_35 = bits(dccm_rdata_hi_any, 11, 11) @[el2_lib.scala 275:36] + _T_4[0] <= _T_35 @[el2_lib.scala 275:30] + node _T_36 = bits(dccm_rdata_hi_any, 12, 12) @[el2_lib.scala 272:36] + _T_1[7] <= _T_36 @[el2_lib.scala 272:30] + node _T_37 = bits(dccm_rdata_hi_any, 12, 12) @[el2_lib.scala 275:36] + _T_4[1] <= _T_37 @[el2_lib.scala 275:30] + node _T_38 = bits(dccm_rdata_hi_any, 13, 13) @[el2_lib.scala 271:36] + _T[8] <= _T_38 @[el2_lib.scala 271:30] + node _T_39 = bits(dccm_rdata_hi_any, 13, 13) @[el2_lib.scala 272:36] + _T_1[8] <= _T_39 @[el2_lib.scala 272:30] + node _T_40 = bits(dccm_rdata_hi_any, 13, 13) @[el2_lib.scala 275:36] + _T_4[2] <= _T_40 @[el2_lib.scala 275:30] + node _T_41 = bits(dccm_rdata_hi_any, 14, 14) @[el2_lib.scala 273:36] + _T_2[7] <= _T_41 @[el2_lib.scala 273:30] + node _T_42 = bits(dccm_rdata_hi_any, 14, 14) @[el2_lib.scala 275:36] + _T_4[3] <= _T_42 @[el2_lib.scala 275:30] + node _T_43 = bits(dccm_rdata_hi_any, 15, 15) @[el2_lib.scala 271:36] + _T[9] <= _T_43 @[el2_lib.scala 271:30] + node _T_44 = bits(dccm_rdata_hi_any, 15, 15) @[el2_lib.scala 273:36] + _T_2[8] <= _T_44 @[el2_lib.scala 273:30] + node _T_45 = bits(dccm_rdata_hi_any, 15, 15) @[el2_lib.scala 275:36] + _T_4[4] <= _T_45 @[el2_lib.scala 275:30] + node _T_46 = bits(dccm_rdata_hi_any, 16, 16) @[el2_lib.scala 272:36] + _T_1[9] <= _T_46 @[el2_lib.scala 272:30] + node _T_47 = bits(dccm_rdata_hi_any, 16, 16) @[el2_lib.scala 273:36] + _T_2[9] <= _T_47 @[el2_lib.scala 273:30] + node _T_48 = bits(dccm_rdata_hi_any, 16, 16) @[el2_lib.scala 275:36] + _T_4[5] <= _T_48 @[el2_lib.scala 275:30] + node _T_49 = bits(dccm_rdata_hi_any, 17, 17) @[el2_lib.scala 271:36] + _T[10] <= _T_49 @[el2_lib.scala 271:30] + node _T_50 = bits(dccm_rdata_hi_any, 17, 17) @[el2_lib.scala 272:36] + _T_1[10] <= _T_50 @[el2_lib.scala 272:30] + node _T_51 = bits(dccm_rdata_hi_any, 17, 17) @[el2_lib.scala 273:36] + _T_2[10] <= _T_51 @[el2_lib.scala 273:30] + node _T_52 = bits(dccm_rdata_hi_any, 17, 17) @[el2_lib.scala 275:36] + _T_4[6] <= _T_52 @[el2_lib.scala 275:30] + node _T_53 = bits(dccm_rdata_hi_any, 18, 18) @[el2_lib.scala 274:36] + _T_3[7] <= _T_53 @[el2_lib.scala 274:30] + node _T_54 = bits(dccm_rdata_hi_any, 18, 18) @[el2_lib.scala 275:36] + _T_4[7] <= _T_54 @[el2_lib.scala 275:30] + node _T_55 = bits(dccm_rdata_hi_any, 19, 19) @[el2_lib.scala 271:36] + _T[11] <= _T_55 @[el2_lib.scala 271:30] + node _T_56 = bits(dccm_rdata_hi_any, 19, 19) @[el2_lib.scala 274:36] + _T_3[8] <= _T_56 @[el2_lib.scala 274:30] + node _T_57 = bits(dccm_rdata_hi_any, 19, 19) @[el2_lib.scala 275:36] + _T_4[8] <= _T_57 @[el2_lib.scala 275:30] + node _T_58 = bits(dccm_rdata_hi_any, 20, 20) @[el2_lib.scala 272:36] + _T_1[11] <= _T_58 @[el2_lib.scala 272:30] + node _T_59 = bits(dccm_rdata_hi_any, 20, 20) @[el2_lib.scala 274:36] + _T_3[9] <= _T_59 @[el2_lib.scala 274:30] + node _T_60 = bits(dccm_rdata_hi_any, 20, 20) @[el2_lib.scala 275:36] + _T_4[9] <= _T_60 @[el2_lib.scala 275:30] + node _T_61 = bits(dccm_rdata_hi_any, 21, 21) @[el2_lib.scala 271:36] + _T[12] <= _T_61 @[el2_lib.scala 271:30] + node _T_62 = bits(dccm_rdata_hi_any, 21, 21) @[el2_lib.scala 272:36] + _T_1[12] <= _T_62 @[el2_lib.scala 272:30] + node _T_63 = bits(dccm_rdata_hi_any, 21, 21) @[el2_lib.scala 274:36] + _T_3[10] <= _T_63 @[el2_lib.scala 274:30] + node _T_64 = bits(dccm_rdata_hi_any, 21, 21) @[el2_lib.scala 275:36] + _T_4[10] <= _T_64 @[el2_lib.scala 275:30] + node _T_65 = bits(dccm_rdata_hi_any, 22, 22) @[el2_lib.scala 273:36] + _T_2[11] <= _T_65 @[el2_lib.scala 273:30] + node _T_66 = bits(dccm_rdata_hi_any, 22, 22) @[el2_lib.scala 274:36] + _T_3[11] <= _T_66 @[el2_lib.scala 274:30] + node _T_67 = bits(dccm_rdata_hi_any, 22, 22) @[el2_lib.scala 275:36] + _T_4[11] <= _T_67 @[el2_lib.scala 275:30] + node _T_68 = bits(dccm_rdata_hi_any, 23, 23) @[el2_lib.scala 271:36] + _T[13] <= _T_68 @[el2_lib.scala 271:30] + node _T_69 = bits(dccm_rdata_hi_any, 23, 23) @[el2_lib.scala 273:36] + _T_2[12] <= _T_69 @[el2_lib.scala 273:30] + node _T_70 = bits(dccm_rdata_hi_any, 23, 23) @[el2_lib.scala 274:36] + _T_3[12] <= _T_70 @[el2_lib.scala 274:30] + node _T_71 = bits(dccm_rdata_hi_any, 23, 23) @[el2_lib.scala 275:36] + _T_4[12] <= _T_71 @[el2_lib.scala 275:30] + node _T_72 = bits(dccm_rdata_hi_any, 24, 24) @[el2_lib.scala 272:36] + _T_1[13] <= _T_72 @[el2_lib.scala 272:30] + node _T_73 = bits(dccm_rdata_hi_any, 24, 24) @[el2_lib.scala 273:36] + _T_2[13] <= _T_73 @[el2_lib.scala 273:30] + node _T_74 = bits(dccm_rdata_hi_any, 24, 24) @[el2_lib.scala 274:36] + _T_3[13] <= _T_74 @[el2_lib.scala 274:30] + node _T_75 = bits(dccm_rdata_hi_any, 24, 24) @[el2_lib.scala 275:36] + _T_4[13] <= _T_75 @[el2_lib.scala 275:30] + node _T_76 = bits(dccm_rdata_hi_any, 25, 25) @[el2_lib.scala 271:36] + _T[14] <= _T_76 @[el2_lib.scala 271:30] + node _T_77 = bits(dccm_rdata_hi_any, 25, 25) @[el2_lib.scala 272:36] + _T_1[14] <= _T_77 @[el2_lib.scala 272:30] + node _T_78 = bits(dccm_rdata_hi_any, 25, 25) @[el2_lib.scala 273:36] + _T_2[14] <= _T_78 @[el2_lib.scala 273:30] + node _T_79 = bits(dccm_rdata_hi_any, 25, 25) @[el2_lib.scala 274:36] + _T_3[14] <= _T_79 @[el2_lib.scala 274:30] + node _T_80 = bits(dccm_rdata_hi_any, 25, 25) @[el2_lib.scala 275:36] + _T_4[14] <= _T_80 @[el2_lib.scala 275:30] + node _T_81 = bits(dccm_rdata_hi_any, 26, 26) @[el2_lib.scala 271:36] + _T[15] <= _T_81 @[el2_lib.scala 271:30] + node _T_82 = bits(dccm_rdata_hi_any, 26, 26) @[el2_lib.scala 276:36] + _T_5[0] <= _T_82 @[el2_lib.scala 276:30] + node _T_83 = bits(dccm_rdata_hi_any, 27, 27) @[el2_lib.scala 272:36] + _T_1[15] <= _T_83 @[el2_lib.scala 272:30] + node _T_84 = bits(dccm_rdata_hi_any, 27, 27) @[el2_lib.scala 276:36] + _T_5[1] <= _T_84 @[el2_lib.scala 276:30] + node _T_85 = bits(dccm_rdata_hi_any, 28, 28) @[el2_lib.scala 271:36] + _T[16] <= _T_85 @[el2_lib.scala 271:30] + node _T_86 = bits(dccm_rdata_hi_any, 28, 28) @[el2_lib.scala 272:36] + _T_1[16] <= _T_86 @[el2_lib.scala 272:30] + node _T_87 = bits(dccm_rdata_hi_any, 28, 28) @[el2_lib.scala 276:36] + _T_5[2] <= _T_87 @[el2_lib.scala 276:30] + node _T_88 = bits(dccm_rdata_hi_any, 29, 29) @[el2_lib.scala 273:36] + _T_2[15] <= _T_88 @[el2_lib.scala 273:30] + node _T_89 = bits(dccm_rdata_hi_any, 29, 29) @[el2_lib.scala 276:36] + _T_5[3] <= _T_89 @[el2_lib.scala 276:30] + node _T_90 = bits(dccm_rdata_hi_any, 30, 30) @[el2_lib.scala 271:36] + _T[17] <= _T_90 @[el2_lib.scala 271:30] + node _T_91 = bits(dccm_rdata_hi_any, 30, 30) @[el2_lib.scala 273:36] + _T_2[16] <= _T_91 @[el2_lib.scala 273:30] + node _T_92 = bits(dccm_rdata_hi_any, 30, 30) @[el2_lib.scala 276:36] + _T_5[4] <= _T_92 @[el2_lib.scala 276:30] + node _T_93 = bits(dccm_rdata_hi_any, 31, 31) @[el2_lib.scala 272:36] + _T_1[17] <= _T_93 @[el2_lib.scala 272:30] + node _T_94 = bits(dccm_rdata_hi_any, 31, 31) @[el2_lib.scala 273:36] + _T_2[17] <= _T_94 @[el2_lib.scala 273:30] + node _T_95 = bits(dccm_rdata_hi_any, 31, 31) @[el2_lib.scala 276:36] + _T_5[5] <= _T_95 @[el2_lib.scala 276:30] + node _T_96 = xorr(dccm_rdata_hi_any) @[el2_lib.scala 279:30] + node _T_97 = xorr(dccm_data_ecc_hi_any) @[el2_lib.scala 279:44] + node _T_98 = xor(_T_96, _T_97) @[el2_lib.scala 279:35] + node _T_99 = not(UInt<1>("h00")) @[el2_lib.scala 279:52] + node _T_100 = and(_T_98, _T_99) @[el2_lib.scala 279:50] + node _T_101 = bits(dccm_data_ecc_hi_any, 5, 5) @[el2_lib.scala 279:68] + node _T_102 = cat(_T_5[2], _T_5[1]) @[el2_lib.scala 279:76] + node _T_103 = cat(_T_102, _T_5[0]) @[el2_lib.scala 279:76] + node _T_104 = cat(_T_5[5], _T_5[4]) @[el2_lib.scala 279:76] + node _T_105 = cat(_T_104, _T_5[3]) @[el2_lib.scala 279:76] + node _T_106 = cat(_T_105, _T_103) @[el2_lib.scala 279:76] + node _T_107 = xorr(_T_106) @[el2_lib.scala 279:83] + node _T_108 = xor(_T_101, _T_107) @[el2_lib.scala 279:71] + node _T_109 = bits(dccm_data_ecc_hi_any, 4, 4) @[el2_lib.scala 279:95] + node _T_110 = cat(_T_4[2], _T_4[1]) @[el2_lib.scala 279:103] + node _T_111 = cat(_T_110, _T_4[0]) @[el2_lib.scala 279:103] + node _T_112 = cat(_T_4[4], _T_4[3]) @[el2_lib.scala 279:103] + node _T_113 = cat(_T_4[6], _T_4[5]) @[el2_lib.scala 279:103] + node _T_114 = cat(_T_113, _T_112) @[el2_lib.scala 279:103] + node _T_115 = cat(_T_114, _T_111) @[el2_lib.scala 279:103] + node _T_116 = cat(_T_4[8], _T_4[7]) @[el2_lib.scala 279:103] + node _T_117 = cat(_T_4[10], _T_4[9]) @[el2_lib.scala 279:103] + node _T_118 = cat(_T_117, _T_116) @[el2_lib.scala 279:103] + node _T_119 = cat(_T_4[12], _T_4[11]) @[el2_lib.scala 279:103] + node _T_120 = cat(_T_4[14], _T_4[13]) @[el2_lib.scala 279:103] + node _T_121 = cat(_T_120, _T_119) @[el2_lib.scala 279:103] + node _T_122 = cat(_T_121, _T_118) @[el2_lib.scala 279:103] + node _T_123 = cat(_T_122, _T_115) @[el2_lib.scala 279:103] + node _T_124 = xorr(_T_123) @[el2_lib.scala 279:110] + node _T_125 = xor(_T_109, _T_124) @[el2_lib.scala 279:98] + node _T_126 = bits(dccm_data_ecc_hi_any, 3, 3) @[el2_lib.scala 279:122] + node _T_127 = cat(_T_3[2], _T_3[1]) @[el2_lib.scala 279:130] + node _T_128 = cat(_T_127, _T_3[0]) @[el2_lib.scala 279:130] + node _T_129 = cat(_T_3[4], _T_3[3]) @[el2_lib.scala 279:130] + node _T_130 = cat(_T_3[6], _T_3[5]) @[el2_lib.scala 279:130] + node _T_131 = cat(_T_130, _T_129) @[el2_lib.scala 279:130] + node _T_132 = cat(_T_131, _T_128) @[el2_lib.scala 279:130] + node _T_133 = cat(_T_3[8], _T_3[7]) @[el2_lib.scala 279:130] + node _T_134 = cat(_T_3[10], _T_3[9]) @[el2_lib.scala 279:130] + node _T_135 = cat(_T_134, _T_133) @[el2_lib.scala 279:130] + node _T_136 = cat(_T_3[12], _T_3[11]) @[el2_lib.scala 279:130] + node _T_137 = cat(_T_3[14], _T_3[13]) @[el2_lib.scala 279:130] + node _T_138 = cat(_T_137, _T_136) @[el2_lib.scala 279:130] + node _T_139 = cat(_T_138, _T_135) @[el2_lib.scala 279:130] + node _T_140 = cat(_T_139, _T_132) @[el2_lib.scala 279:130] + node _T_141 = xorr(_T_140) @[el2_lib.scala 279:137] + node _T_142 = xor(_T_126, _T_141) @[el2_lib.scala 279:125] + node _T_143 = bits(dccm_data_ecc_hi_any, 2, 2) @[el2_lib.scala 279:149] + node _T_144 = cat(_T_2[1], _T_2[0]) @[el2_lib.scala 279:157] + node _T_145 = cat(_T_2[3], _T_2[2]) @[el2_lib.scala 279:157] + node _T_146 = cat(_T_145, _T_144) @[el2_lib.scala 279:157] + node _T_147 = cat(_T_2[5], _T_2[4]) @[el2_lib.scala 279:157] + node _T_148 = cat(_T_2[8], _T_2[7]) @[el2_lib.scala 279:157] + node _T_149 = cat(_T_148, _T_2[6]) @[el2_lib.scala 279:157] + node _T_150 = cat(_T_149, _T_147) @[el2_lib.scala 279:157] + node _T_151 = cat(_T_150, _T_146) @[el2_lib.scala 279:157] + node _T_152 = cat(_T_2[10], _T_2[9]) @[el2_lib.scala 279:157] + node _T_153 = cat(_T_2[12], _T_2[11]) @[el2_lib.scala 279:157] + node _T_154 = cat(_T_153, _T_152) @[el2_lib.scala 279:157] + node _T_155 = cat(_T_2[14], _T_2[13]) @[el2_lib.scala 279:157] + node _T_156 = cat(_T_2[17], _T_2[16]) @[el2_lib.scala 279:157] + node _T_157 = cat(_T_156, _T_2[15]) @[el2_lib.scala 279:157] + node _T_158 = cat(_T_157, _T_155) @[el2_lib.scala 279:157] + node _T_159 = cat(_T_158, _T_154) @[el2_lib.scala 279:157] + node _T_160 = cat(_T_159, _T_151) @[el2_lib.scala 279:157] + node _T_161 = xorr(_T_160) @[el2_lib.scala 279:164] + node _T_162 = xor(_T_143, _T_161) @[el2_lib.scala 279:152] + node _T_163 = bits(dccm_data_ecc_hi_any, 1, 1) @[el2_lib.scala 279:176] + node _T_164 = cat(_T_1[1], _T_1[0]) @[el2_lib.scala 279:184] + node _T_165 = cat(_T_1[3], _T_1[2]) @[el2_lib.scala 279:184] + node _T_166 = cat(_T_165, _T_164) @[el2_lib.scala 279:184] + node _T_167 = cat(_T_1[5], _T_1[4]) @[el2_lib.scala 279:184] + node _T_168 = cat(_T_1[8], _T_1[7]) @[el2_lib.scala 279:184] + node _T_169 = cat(_T_168, _T_1[6]) @[el2_lib.scala 279:184] + node _T_170 = cat(_T_169, _T_167) @[el2_lib.scala 279:184] + node _T_171 = cat(_T_170, _T_166) @[el2_lib.scala 279:184] + node _T_172 = cat(_T_1[10], _T_1[9]) @[el2_lib.scala 279:184] + node _T_173 = cat(_T_1[12], _T_1[11]) @[el2_lib.scala 279:184] + node _T_174 = cat(_T_173, _T_172) @[el2_lib.scala 279:184] + node _T_175 = cat(_T_1[14], _T_1[13]) @[el2_lib.scala 279:184] + node _T_176 = cat(_T_1[17], _T_1[16]) @[el2_lib.scala 279:184] + node _T_177 = cat(_T_176, _T_1[15]) @[el2_lib.scala 279:184] + node _T_178 = cat(_T_177, _T_175) @[el2_lib.scala 279:184] + node _T_179 = cat(_T_178, _T_174) @[el2_lib.scala 279:184] + node _T_180 = cat(_T_179, _T_171) @[el2_lib.scala 279:184] + node _T_181 = xorr(_T_180) @[el2_lib.scala 279:191] + node _T_182 = xor(_T_163, _T_181) @[el2_lib.scala 279:179] + node _T_183 = bits(dccm_data_ecc_hi_any, 0, 0) @[el2_lib.scala 279:203] + node _T_184 = cat(_T[1], _T[0]) @[el2_lib.scala 279:211] + node _T_185 = cat(_T[3], _T[2]) @[el2_lib.scala 279:211] + node _T_186 = cat(_T_185, _T_184) @[el2_lib.scala 279:211] + node _T_187 = cat(_T[5], _T[4]) @[el2_lib.scala 279:211] + node _T_188 = cat(_T[8], _T[7]) @[el2_lib.scala 279:211] + node _T_189 = cat(_T_188, _T[6]) @[el2_lib.scala 279:211] + node _T_190 = cat(_T_189, _T_187) @[el2_lib.scala 279:211] + node _T_191 = cat(_T_190, _T_186) @[el2_lib.scala 279:211] + node _T_192 = cat(_T[10], _T[9]) @[el2_lib.scala 279:211] + node _T_193 = cat(_T[12], _T[11]) @[el2_lib.scala 279:211] + node _T_194 = cat(_T_193, _T_192) @[el2_lib.scala 279:211] + node _T_195 = cat(_T[14], _T[13]) @[el2_lib.scala 279:211] + node _T_196 = cat(_T[17], _T[16]) @[el2_lib.scala 279:211] + node _T_197 = cat(_T_196, _T[15]) @[el2_lib.scala 279:211] + node _T_198 = cat(_T_197, _T_195) @[el2_lib.scala 279:211] + node _T_199 = cat(_T_198, _T_194) @[el2_lib.scala 279:211] + node _T_200 = cat(_T_199, _T_191) @[el2_lib.scala 279:211] + node _T_201 = xorr(_T_200) @[el2_lib.scala 279:218] + node _T_202 = xor(_T_183, _T_201) @[el2_lib.scala 279:206] + node _T_203 = cat(_T_162, _T_182) @[Cat.scala 29:58] + node _T_204 = cat(_T_203, _T_202) @[Cat.scala 29:58] + node _T_205 = cat(_T_125, _T_142) @[Cat.scala 29:58] + node _T_206 = cat(_T_100, _T_108) @[Cat.scala 29:58] + node _T_207 = cat(_T_206, _T_205) @[Cat.scala 29:58] + node _T_208 = cat(_T_207, _T_204) @[Cat.scala 29:58] + node _T_209 = neq(_T_208, UInt<1>("h00")) @[el2_lib.scala 281:44] + node _T_210 = and(is_ldst_hi_any, _T_209) @[el2_lib.scala 281:32] + node _T_211 = xorr(dccm_rdata_hi_any) @[el2_lib.scala 281:60] + node _T_212 = xorr(dccm_data_ecc_hi_any) @[el2_lib.scala 281:74] + node _T_213 = xor(_T_211, _T_212) @[el2_lib.scala 281:65] + node _T_214 = not(UInt<1>("h00")) @[el2_lib.scala 281:82] + node _T_215 = and(_T_213, _T_214) @[el2_lib.scala 281:80] + node single_ecc_error_hi_any = and(_T_210, _T_215) @[el2_lib.scala 281:52] + node _T_216 = neq(_T_208, UInt<1>("h00")) @[el2_lib.scala 282:44] + node _T_217 = and(is_ldst_hi_any, _T_216) @[el2_lib.scala 282:32] + node _T_218 = xorr(dccm_rdata_hi_any) @[el2_lib.scala 282:60] + node _T_219 = xorr(dccm_data_ecc_hi_any) @[el2_lib.scala 282:74] + node _T_220 = xor(_T_218, _T_219) @[el2_lib.scala 282:65] + node _T_221 = not(UInt<1>("h00")) @[el2_lib.scala 282:82] + node _T_222 = and(_T_220, _T_221) @[el2_lib.scala 282:80] + node double_ecc_error_hi_any = and(_T_217, _T_222) @[el2_lib.scala 282:52] + wire _T_223 : UInt<1>[39] @[el2_lib.scala 283:26] + node _T_224 = bits(_T_208, 5, 0) @[el2_lib.scala 286:35] + node _T_225 = eq(_T_224, UInt<1>("h01")) @[el2_lib.scala 286:41] + _T_223[0] <= _T_225 @[el2_lib.scala 286:23] + node _T_226 = bits(_T_208, 5, 0) @[el2_lib.scala 286:35] + node _T_227 = eq(_T_226, UInt<2>("h02")) @[el2_lib.scala 286:41] + _T_223[1] <= _T_227 @[el2_lib.scala 286:23] + node _T_228 = bits(_T_208, 5, 0) @[el2_lib.scala 286:35] + node _T_229 = eq(_T_228, UInt<2>("h03")) @[el2_lib.scala 286:41] + _T_223[2] <= _T_229 @[el2_lib.scala 286:23] + node _T_230 = bits(_T_208, 5, 0) @[el2_lib.scala 286:35] + node _T_231 = eq(_T_230, UInt<3>("h04")) @[el2_lib.scala 286:41] + _T_223[3] <= _T_231 @[el2_lib.scala 286:23] + node _T_232 = bits(_T_208, 5, 0) @[el2_lib.scala 286:35] + node _T_233 = eq(_T_232, UInt<3>("h05")) @[el2_lib.scala 286:41] + _T_223[4] <= _T_233 @[el2_lib.scala 286:23] + node _T_234 = bits(_T_208, 5, 0) @[el2_lib.scala 286:35] + node _T_235 = eq(_T_234, UInt<3>("h06")) @[el2_lib.scala 286:41] + _T_223[5] <= _T_235 @[el2_lib.scala 286:23] + node _T_236 = bits(_T_208, 5, 0) @[el2_lib.scala 286:35] + node _T_237 = eq(_T_236, UInt<3>("h07")) @[el2_lib.scala 286:41] + _T_223[6] <= _T_237 @[el2_lib.scala 286:23] + node _T_238 = bits(_T_208, 5, 0) @[el2_lib.scala 286:35] + node _T_239 = eq(_T_238, UInt<4>("h08")) @[el2_lib.scala 286:41] + _T_223[7] <= _T_239 @[el2_lib.scala 286:23] + node _T_240 = bits(_T_208, 5, 0) @[el2_lib.scala 286:35] + node _T_241 = eq(_T_240, UInt<4>("h09")) @[el2_lib.scala 286:41] + _T_223[8] <= _T_241 @[el2_lib.scala 286:23] + node _T_242 = bits(_T_208, 5, 0) @[el2_lib.scala 286:35] + node _T_243 = eq(_T_242, UInt<4>("h0a")) @[el2_lib.scala 286:41] + _T_223[9] <= _T_243 @[el2_lib.scala 286:23] + node _T_244 = bits(_T_208, 5, 0) @[el2_lib.scala 286:35] + node _T_245 = eq(_T_244, UInt<4>("h0b")) @[el2_lib.scala 286:41] + _T_223[10] <= _T_245 @[el2_lib.scala 286:23] + node _T_246 = bits(_T_208, 5, 0) @[el2_lib.scala 286:35] + node _T_247 = eq(_T_246, UInt<4>("h0c")) @[el2_lib.scala 286:41] + _T_223[11] <= _T_247 @[el2_lib.scala 286:23] + node _T_248 = bits(_T_208, 5, 0) @[el2_lib.scala 286:35] + node _T_249 = eq(_T_248, UInt<4>("h0d")) @[el2_lib.scala 286:41] + _T_223[12] <= _T_249 @[el2_lib.scala 286:23] + node _T_250 = bits(_T_208, 5, 0) @[el2_lib.scala 286:35] + node _T_251 = eq(_T_250, UInt<4>("h0e")) @[el2_lib.scala 286:41] + _T_223[13] <= _T_251 @[el2_lib.scala 286:23] + node _T_252 = bits(_T_208, 5, 0) @[el2_lib.scala 286:35] + node _T_253 = eq(_T_252, UInt<4>("h0f")) @[el2_lib.scala 286:41] + _T_223[14] <= _T_253 @[el2_lib.scala 286:23] + node _T_254 = bits(_T_208, 5, 0) @[el2_lib.scala 286:35] + node _T_255 = eq(_T_254, UInt<5>("h010")) @[el2_lib.scala 286:41] + _T_223[15] <= _T_255 @[el2_lib.scala 286:23] + node _T_256 = bits(_T_208, 5, 0) @[el2_lib.scala 286:35] + node _T_257 = eq(_T_256, UInt<5>("h011")) @[el2_lib.scala 286:41] + _T_223[16] <= _T_257 @[el2_lib.scala 286:23] + node _T_258 = bits(_T_208, 5, 0) @[el2_lib.scala 286:35] + node _T_259 = eq(_T_258, UInt<5>("h012")) @[el2_lib.scala 286:41] + _T_223[17] <= _T_259 @[el2_lib.scala 286:23] + node _T_260 = bits(_T_208, 5, 0) @[el2_lib.scala 286:35] + node _T_261 = eq(_T_260, UInt<5>("h013")) @[el2_lib.scala 286:41] + _T_223[18] <= _T_261 @[el2_lib.scala 286:23] + node _T_262 = bits(_T_208, 5, 0) @[el2_lib.scala 286:35] + node _T_263 = eq(_T_262, UInt<5>("h014")) @[el2_lib.scala 286:41] + _T_223[19] <= _T_263 @[el2_lib.scala 286:23] + node _T_264 = bits(_T_208, 5, 0) @[el2_lib.scala 286:35] + node _T_265 = eq(_T_264, UInt<5>("h015")) @[el2_lib.scala 286:41] + _T_223[20] <= _T_265 @[el2_lib.scala 286:23] + node _T_266 = bits(_T_208, 5, 0) @[el2_lib.scala 286:35] + node _T_267 = eq(_T_266, UInt<5>("h016")) @[el2_lib.scala 286:41] + _T_223[21] <= _T_267 @[el2_lib.scala 286:23] + node _T_268 = bits(_T_208, 5, 0) @[el2_lib.scala 286:35] + node _T_269 = eq(_T_268, UInt<5>("h017")) @[el2_lib.scala 286:41] + _T_223[22] <= _T_269 @[el2_lib.scala 286:23] + node _T_270 = bits(_T_208, 5, 0) @[el2_lib.scala 286:35] + node _T_271 = eq(_T_270, UInt<5>("h018")) @[el2_lib.scala 286:41] + _T_223[23] <= _T_271 @[el2_lib.scala 286:23] + node _T_272 = bits(_T_208, 5, 0) @[el2_lib.scala 286:35] + node _T_273 = eq(_T_272, UInt<5>("h019")) @[el2_lib.scala 286:41] + _T_223[24] <= _T_273 @[el2_lib.scala 286:23] + node _T_274 = bits(_T_208, 5, 0) @[el2_lib.scala 286:35] + node _T_275 = eq(_T_274, UInt<5>("h01a")) @[el2_lib.scala 286:41] + _T_223[25] <= _T_275 @[el2_lib.scala 286:23] + node _T_276 = bits(_T_208, 5, 0) @[el2_lib.scala 286:35] + node _T_277 = eq(_T_276, UInt<5>("h01b")) @[el2_lib.scala 286:41] + _T_223[26] <= _T_277 @[el2_lib.scala 286:23] + node _T_278 = bits(_T_208, 5, 0) @[el2_lib.scala 286:35] + node _T_279 = eq(_T_278, UInt<5>("h01c")) @[el2_lib.scala 286:41] + _T_223[27] <= _T_279 @[el2_lib.scala 286:23] + node _T_280 = bits(_T_208, 5, 0) @[el2_lib.scala 286:35] + node _T_281 = eq(_T_280, UInt<5>("h01d")) @[el2_lib.scala 286:41] + _T_223[28] <= _T_281 @[el2_lib.scala 286:23] + node _T_282 = bits(_T_208, 5, 0) @[el2_lib.scala 286:35] + node _T_283 = eq(_T_282, UInt<5>("h01e")) @[el2_lib.scala 286:41] + _T_223[29] <= _T_283 @[el2_lib.scala 286:23] + node _T_284 = bits(_T_208, 5, 0) @[el2_lib.scala 286:35] + node _T_285 = eq(_T_284, UInt<5>("h01f")) @[el2_lib.scala 286:41] + _T_223[30] <= _T_285 @[el2_lib.scala 286:23] + node _T_286 = bits(_T_208, 5, 0) @[el2_lib.scala 286:35] + node _T_287 = eq(_T_286, UInt<6>("h020")) @[el2_lib.scala 286:41] + _T_223[31] <= _T_287 @[el2_lib.scala 286:23] + node _T_288 = bits(_T_208, 5, 0) @[el2_lib.scala 286:35] + node _T_289 = eq(_T_288, UInt<6>("h021")) @[el2_lib.scala 286:41] + _T_223[32] <= _T_289 @[el2_lib.scala 286:23] + node _T_290 = bits(_T_208, 5, 0) @[el2_lib.scala 286:35] + node _T_291 = eq(_T_290, UInt<6>("h022")) @[el2_lib.scala 286:41] + _T_223[33] <= _T_291 @[el2_lib.scala 286:23] + node _T_292 = bits(_T_208, 5, 0) @[el2_lib.scala 286:35] + node _T_293 = eq(_T_292, UInt<6>("h023")) @[el2_lib.scala 286:41] + _T_223[34] <= _T_293 @[el2_lib.scala 286:23] + node _T_294 = bits(_T_208, 5, 0) @[el2_lib.scala 286:35] + node _T_295 = eq(_T_294, UInt<6>("h024")) @[el2_lib.scala 286:41] + _T_223[35] <= _T_295 @[el2_lib.scala 286:23] + node _T_296 = bits(_T_208, 5, 0) @[el2_lib.scala 286:35] + node _T_297 = eq(_T_296, UInt<6>("h025")) @[el2_lib.scala 286:41] + _T_223[36] <= _T_297 @[el2_lib.scala 286:23] + node _T_298 = bits(_T_208, 5, 0) @[el2_lib.scala 286:35] + node _T_299 = eq(_T_298, UInt<6>("h026")) @[el2_lib.scala 286:41] + _T_223[37] <= _T_299 @[el2_lib.scala 286:23] + node _T_300 = bits(_T_208, 5, 0) @[el2_lib.scala 286:35] + node _T_301 = eq(_T_300, UInt<6>("h027")) @[el2_lib.scala 286:41] + _T_223[38] <= _T_301 @[el2_lib.scala 286:23] + node _T_302 = bits(dccm_data_ecc_hi_any, 6, 6) @[el2_lib.scala 288:37] + node _T_303 = bits(dccm_rdata_hi_any, 31, 26) @[el2_lib.scala 288:45] + node _T_304 = bits(dccm_data_ecc_hi_any, 5, 5) @[el2_lib.scala 288:60] + node _T_305 = bits(dccm_rdata_hi_any, 25, 11) @[el2_lib.scala 288:68] + node _T_306 = bits(dccm_data_ecc_hi_any, 4, 4) @[el2_lib.scala 288:83] + node _T_307 = bits(dccm_rdata_hi_any, 10, 4) @[el2_lib.scala 288:91] + node _T_308 = bits(dccm_data_ecc_hi_any, 3, 3) @[el2_lib.scala 288:105] + node _T_309 = bits(dccm_rdata_hi_any, 3, 1) @[el2_lib.scala 288:113] + node _T_310 = bits(dccm_data_ecc_hi_any, 2, 2) @[el2_lib.scala 288:126] + node _T_311 = bits(dccm_rdata_hi_any, 0, 0) @[el2_lib.scala 288:134] + node _T_312 = bits(dccm_data_ecc_hi_any, 1, 0) @[el2_lib.scala 288:145] + node _T_313 = cat(_T_311, _T_312) @[Cat.scala 29:58] + node _T_314 = cat(_T_308, _T_309) @[Cat.scala 29:58] + node _T_315 = cat(_T_314, _T_310) @[Cat.scala 29:58] + node _T_316 = cat(_T_315, _T_313) @[Cat.scala 29:58] + node _T_317 = cat(_T_305, _T_306) @[Cat.scala 29:58] + node _T_318 = cat(_T_317, _T_307) @[Cat.scala 29:58] + node _T_319 = cat(_T_302, _T_303) @[Cat.scala 29:58] + node _T_320 = cat(_T_319, _T_304) @[Cat.scala 29:58] + node _T_321 = cat(_T_320, _T_318) @[Cat.scala 29:58] + node _T_322 = cat(_T_321, _T_316) @[Cat.scala 29:58] + node _T_323 = bits(single_ecc_error_hi_any, 0, 0) @[el2_lib.scala 289:49] + node _T_324 = cat(_T_223[1], _T_223[0]) @[el2_lib.scala 289:69] + node _T_325 = cat(_T_223[3], _T_223[2]) @[el2_lib.scala 289:69] + node _T_326 = cat(_T_325, _T_324) @[el2_lib.scala 289:69] + node _T_327 = cat(_T_223[5], _T_223[4]) @[el2_lib.scala 289:69] + node _T_328 = cat(_T_223[8], _T_223[7]) @[el2_lib.scala 289:69] + node _T_329 = cat(_T_328, _T_223[6]) @[el2_lib.scala 289:69] + node _T_330 = cat(_T_329, _T_327) @[el2_lib.scala 289:69] + node _T_331 = cat(_T_330, _T_326) @[el2_lib.scala 289:69] + node _T_332 = cat(_T_223[10], _T_223[9]) @[el2_lib.scala 289:69] + node _T_333 = cat(_T_223[13], _T_223[12]) @[el2_lib.scala 289:69] + node _T_334 = cat(_T_333, _T_223[11]) @[el2_lib.scala 289:69] + node _T_335 = cat(_T_334, _T_332) @[el2_lib.scala 289:69] + node _T_336 = cat(_T_223[15], _T_223[14]) @[el2_lib.scala 289:69] + node _T_337 = cat(_T_223[18], _T_223[17]) @[el2_lib.scala 289:69] + node _T_338 = cat(_T_337, _T_223[16]) @[el2_lib.scala 289:69] + node _T_339 = cat(_T_338, _T_336) @[el2_lib.scala 289:69] + node _T_340 = cat(_T_339, _T_335) @[el2_lib.scala 289:69] + node _T_341 = cat(_T_340, _T_331) @[el2_lib.scala 289:69] + node _T_342 = cat(_T_223[20], _T_223[19]) @[el2_lib.scala 289:69] + node _T_343 = cat(_T_223[23], _T_223[22]) @[el2_lib.scala 289:69] + node _T_344 = cat(_T_343, _T_223[21]) @[el2_lib.scala 289:69] + node _T_345 = cat(_T_344, _T_342) @[el2_lib.scala 289:69] + node _T_346 = cat(_T_223[25], _T_223[24]) @[el2_lib.scala 289:69] + node _T_347 = cat(_T_223[28], _T_223[27]) @[el2_lib.scala 289:69] + node _T_348 = cat(_T_347, _T_223[26]) @[el2_lib.scala 289:69] + node _T_349 = cat(_T_348, _T_346) @[el2_lib.scala 289:69] + node _T_350 = cat(_T_349, _T_345) @[el2_lib.scala 289:69] + node _T_351 = cat(_T_223[30], _T_223[29]) @[el2_lib.scala 289:69] + node _T_352 = cat(_T_223[33], _T_223[32]) @[el2_lib.scala 289:69] + node _T_353 = cat(_T_352, _T_223[31]) @[el2_lib.scala 289:69] + node _T_354 = cat(_T_353, _T_351) @[el2_lib.scala 289:69] + node _T_355 = cat(_T_223[35], _T_223[34]) @[el2_lib.scala 289:69] + node _T_356 = cat(_T_223[38], _T_223[37]) @[el2_lib.scala 289:69] + node _T_357 = cat(_T_356, _T_223[36]) @[el2_lib.scala 289:69] + node _T_358 = cat(_T_357, _T_355) @[el2_lib.scala 289:69] + node _T_359 = cat(_T_358, _T_354) @[el2_lib.scala 289:69] + node _T_360 = cat(_T_359, _T_350) @[el2_lib.scala 289:69] + node _T_361 = cat(_T_360, _T_341) @[el2_lib.scala 289:69] + node _T_362 = xor(_T_361, _T_322) @[el2_lib.scala 289:76] + node _T_363 = mux(_T_323, _T_362, _T_322) @[el2_lib.scala 289:31] + node _T_364 = bits(_T_363, 37, 32) @[el2_lib.scala 291:37] + node _T_365 = bits(_T_363, 30, 16) @[el2_lib.scala 291:61] + node _T_366 = bits(_T_363, 14, 8) @[el2_lib.scala 291:86] + node _T_367 = bits(_T_363, 6, 4) @[el2_lib.scala 291:110] + node _T_368 = bits(_T_363, 2, 2) @[el2_lib.scala 291:133] + node _T_369 = cat(_T_367, _T_368) @[Cat.scala 29:58] + node _T_370 = cat(_T_364, _T_365) @[Cat.scala 29:58] + node _T_371 = cat(_T_370, _T_366) @[Cat.scala 29:58] + node sec_data_hi_any = cat(_T_371, _T_369) @[Cat.scala 29:58] + node _T_372 = bits(_T_363, 38, 38) @[el2_lib.scala 292:39] + node _T_373 = bits(_T_208, 6, 0) @[el2_lib.scala 292:56] + node _T_374 = eq(_T_373, UInt<7>("h040")) @[el2_lib.scala 292:62] + node _T_375 = xor(_T_372, _T_374) @[el2_lib.scala 292:44] + node _T_376 = bits(_T_363, 31, 31) @[el2_lib.scala 292:97] + node _T_377 = bits(_T_363, 15, 15) @[el2_lib.scala 292:119] + node _T_378 = bits(_T_363, 7, 7) @[el2_lib.scala 292:141] + node _T_379 = bits(_T_363, 3, 3) @[el2_lib.scala 292:162] + node _T_380 = bits(_T_363, 1, 0) @[el2_lib.scala 292:183] + node _T_381 = cat(_T_378, _T_379) @[Cat.scala 29:58] + node _T_382 = cat(_T_381, _T_380) @[Cat.scala 29:58] + node _T_383 = cat(_T_375, _T_376) @[Cat.scala 29:58] + node _T_384 = cat(_T_383, _T_377) @[Cat.scala 29:58] + node ecc_out_hi_nc = cat(_T_384, _T_382) @[Cat.scala 29:58] + wire _T_385 : UInt<1>[18] @[el2_lib.scala 259:18] + wire _T_386 : UInt<1>[18] @[el2_lib.scala 260:18] + wire _T_387 : UInt<1>[18] @[el2_lib.scala 261:18] + wire _T_388 : UInt<1>[15] @[el2_lib.scala 262:18] + wire _T_389 : UInt<1>[15] @[el2_lib.scala 263:18] + wire _T_390 : UInt<1>[6] @[el2_lib.scala 264:18] + node _T_391 = bits(dccm_rdata_lo_any, 0, 0) @[el2_lib.scala 271:36] + _T_385[0] <= _T_391 @[el2_lib.scala 271:30] + node _T_392 = bits(dccm_rdata_lo_any, 0, 0) @[el2_lib.scala 272:36] + _T_386[0] <= _T_392 @[el2_lib.scala 272:30] + node _T_393 = bits(dccm_rdata_lo_any, 1, 1) @[el2_lib.scala 271:36] + _T_385[1] <= _T_393 @[el2_lib.scala 271:30] + node _T_394 = bits(dccm_rdata_lo_any, 1, 1) @[el2_lib.scala 273:36] + _T_387[0] <= _T_394 @[el2_lib.scala 273:30] + node _T_395 = bits(dccm_rdata_lo_any, 2, 2) @[el2_lib.scala 272:36] + _T_386[1] <= _T_395 @[el2_lib.scala 272:30] + node _T_396 = bits(dccm_rdata_lo_any, 2, 2) @[el2_lib.scala 273:36] + _T_387[1] <= _T_396 @[el2_lib.scala 273:30] + node _T_397 = bits(dccm_rdata_lo_any, 3, 3) @[el2_lib.scala 271:36] + _T_385[2] <= _T_397 @[el2_lib.scala 271:30] + node _T_398 = bits(dccm_rdata_lo_any, 3, 3) @[el2_lib.scala 272:36] + _T_386[2] <= _T_398 @[el2_lib.scala 272:30] + node _T_399 = bits(dccm_rdata_lo_any, 3, 3) @[el2_lib.scala 273:36] + _T_387[2] <= _T_399 @[el2_lib.scala 273:30] + node _T_400 = bits(dccm_rdata_lo_any, 4, 4) @[el2_lib.scala 271:36] + _T_385[3] <= _T_400 @[el2_lib.scala 271:30] + node _T_401 = bits(dccm_rdata_lo_any, 4, 4) @[el2_lib.scala 274:36] + _T_388[0] <= _T_401 @[el2_lib.scala 274:30] + node _T_402 = bits(dccm_rdata_lo_any, 5, 5) @[el2_lib.scala 272:36] + _T_386[3] <= _T_402 @[el2_lib.scala 272:30] + node _T_403 = bits(dccm_rdata_lo_any, 5, 5) @[el2_lib.scala 274:36] + _T_388[1] <= _T_403 @[el2_lib.scala 274:30] + node _T_404 = bits(dccm_rdata_lo_any, 6, 6) @[el2_lib.scala 271:36] + _T_385[4] <= _T_404 @[el2_lib.scala 271:30] + node _T_405 = bits(dccm_rdata_lo_any, 6, 6) @[el2_lib.scala 272:36] + _T_386[4] <= _T_405 @[el2_lib.scala 272:30] + node _T_406 = bits(dccm_rdata_lo_any, 6, 6) @[el2_lib.scala 274:36] + _T_388[2] <= _T_406 @[el2_lib.scala 274:30] + node _T_407 = bits(dccm_rdata_lo_any, 7, 7) @[el2_lib.scala 273:36] + _T_387[3] <= _T_407 @[el2_lib.scala 273:30] + node _T_408 = bits(dccm_rdata_lo_any, 7, 7) @[el2_lib.scala 274:36] + _T_388[3] <= _T_408 @[el2_lib.scala 274:30] + node _T_409 = bits(dccm_rdata_lo_any, 8, 8) @[el2_lib.scala 271:36] + _T_385[5] <= _T_409 @[el2_lib.scala 271:30] + node _T_410 = bits(dccm_rdata_lo_any, 8, 8) @[el2_lib.scala 273:36] + _T_387[4] <= _T_410 @[el2_lib.scala 273:30] + node _T_411 = bits(dccm_rdata_lo_any, 8, 8) @[el2_lib.scala 274:36] + _T_388[4] <= _T_411 @[el2_lib.scala 274:30] + node _T_412 = bits(dccm_rdata_lo_any, 9, 9) @[el2_lib.scala 272:36] + _T_386[5] <= _T_412 @[el2_lib.scala 272:30] + node _T_413 = bits(dccm_rdata_lo_any, 9, 9) @[el2_lib.scala 273:36] + _T_387[5] <= _T_413 @[el2_lib.scala 273:30] + node _T_414 = bits(dccm_rdata_lo_any, 9, 9) @[el2_lib.scala 274:36] + _T_388[5] <= _T_414 @[el2_lib.scala 274:30] + node _T_415 = bits(dccm_rdata_lo_any, 10, 10) @[el2_lib.scala 271:36] + _T_385[6] <= _T_415 @[el2_lib.scala 271:30] + node _T_416 = bits(dccm_rdata_lo_any, 10, 10) @[el2_lib.scala 272:36] + _T_386[6] <= _T_416 @[el2_lib.scala 272:30] + node _T_417 = bits(dccm_rdata_lo_any, 10, 10) @[el2_lib.scala 273:36] + _T_387[6] <= _T_417 @[el2_lib.scala 273:30] + node _T_418 = bits(dccm_rdata_lo_any, 10, 10) @[el2_lib.scala 274:36] + _T_388[6] <= _T_418 @[el2_lib.scala 274:30] + node _T_419 = bits(dccm_rdata_lo_any, 11, 11) @[el2_lib.scala 271:36] + _T_385[7] <= _T_419 @[el2_lib.scala 271:30] + node _T_420 = bits(dccm_rdata_lo_any, 11, 11) @[el2_lib.scala 275:36] + _T_389[0] <= _T_420 @[el2_lib.scala 275:30] + node _T_421 = bits(dccm_rdata_lo_any, 12, 12) @[el2_lib.scala 272:36] + _T_386[7] <= _T_421 @[el2_lib.scala 272:30] + node _T_422 = bits(dccm_rdata_lo_any, 12, 12) @[el2_lib.scala 275:36] + _T_389[1] <= _T_422 @[el2_lib.scala 275:30] + node _T_423 = bits(dccm_rdata_lo_any, 13, 13) @[el2_lib.scala 271:36] + _T_385[8] <= _T_423 @[el2_lib.scala 271:30] + node _T_424 = bits(dccm_rdata_lo_any, 13, 13) @[el2_lib.scala 272:36] + _T_386[8] <= _T_424 @[el2_lib.scala 272:30] + node _T_425 = bits(dccm_rdata_lo_any, 13, 13) @[el2_lib.scala 275:36] + _T_389[2] <= _T_425 @[el2_lib.scala 275:30] + node _T_426 = bits(dccm_rdata_lo_any, 14, 14) @[el2_lib.scala 273:36] + _T_387[7] <= _T_426 @[el2_lib.scala 273:30] + node _T_427 = bits(dccm_rdata_lo_any, 14, 14) @[el2_lib.scala 275:36] + _T_389[3] <= _T_427 @[el2_lib.scala 275:30] + node _T_428 = bits(dccm_rdata_lo_any, 15, 15) @[el2_lib.scala 271:36] + _T_385[9] <= _T_428 @[el2_lib.scala 271:30] + node _T_429 = bits(dccm_rdata_lo_any, 15, 15) @[el2_lib.scala 273:36] + _T_387[8] <= _T_429 @[el2_lib.scala 273:30] + node _T_430 = bits(dccm_rdata_lo_any, 15, 15) @[el2_lib.scala 275:36] + _T_389[4] <= _T_430 @[el2_lib.scala 275:30] + node _T_431 = bits(dccm_rdata_lo_any, 16, 16) @[el2_lib.scala 272:36] + _T_386[9] <= _T_431 @[el2_lib.scala 272:30] + node _T_432 = bits(dccm_rdata_lo_any, 16, 16) @[el2_lib.scala 273:36] + _T_387[9] <= _T_432 @[el2_lib.scala 273:30] + node _T_433 = bits(dccm_rdata_lo_any, 16, 16) @[el2_lib.scala 275:36] + _T_389[5] <= _T_433 @[el2_lib.scala 275:30] + node _T_434 = bits(dccm_rdata_lo_any, 17, 17) @[el2_lib.scala 271:36] + _T_385[10] <= _T_434 @[el2_lib.scala 271:30] + node _T_435 = bits(dccm_rdata_lo_any, 17, 17) @[el2_lib.scala 272:36] + _T_386[10] <= _T_435 @[el2_lib.scala 272:30] + node _T_436 = bits(dccm_rdata_lo_any, 17, 17) @[el2_lib.scala 273:36] + _T_387[10] <= _T_436 @[el2_lib.scala 273:30] + node _T_437 = bits(dccm_rdata_lo_any, 17, 17) @[el2_lib.scala 275:36] + _T_389[6] <= _T_437 @[el2_lib.scala 275:30] + node _T_438 = bits(dccm_rdata_lo_any, 18, 18) @[el2_lib.scala 274:36] + _T_388[7] <= _T_438 @[el2_lib.scala 274:30] + node _T_439 = bits(dccm_rdata_lo_any, 18, 18) @[el2_lib.scala 275:36] + _T_389[7] <= _T_439 @[el2_lib.scala 275:30] + node _T_440 = bits(dccm_rdata_lo_any, 19, 19) @[el2_lib.scala 271:36] + _T_385[11] <= _T_440 @[el2_lib.scala 271:30] + node _T_441 = bits(dccm_rdata_lo_any, 19, 19) @[el2_lib.scala 274:36] + _T_388[8] <= _T_441 @[el2_lib.scala 274:30] + node _T_442 = bits(dccm_rdata_lo_any, 19, 19) @[el2_lib.scala 275:36] + _T_389[8] <= _T_442 @[el2_lib.scala 275:30] + node _T_443 = bits(dccm_rdata_lo_any, 20, 20) @[el2_lib.scala 272:36] + _T_386[11] <= _T_443 @[el2_lib.scala 272:30] + node _T_444 = bits(dccm_rdata_lo_any, 20, 20) @[el2_lib.scala 274:36] + _T_388[9] <= _T_444 @[el2_lib.scala 274:30] + node _T_445 = bits(dccm_rdata_lo_any, 20, 20) @[el2_lib.scala 275:36] + _T_389[9] <= _T_445 @[el2_lib.scala 275:30] + node _T_446 = bits(dccm_rdata_lo_any, 21, 21) @[el2_lib.scala 271:36] + _T_385[12] <= _T_446 @[el2_lib.scala 271:30] + node _T_447 = bits(dccm_rdata_lo_any, 21, 21) @[el2_lib.scala 272:36] + _T_386[12] <= _T_447 @[el2_lib.scala 272:30] + node _T_448 = bits(dccm_rdata_lo_any, 21, 21) @[el2_lib.scala 274:36] + _T_388[10] <= _T_448 @[el2_lib.scala 274:30] + node _T_449 = bits(dccm_rdata_lo_any, 21, 21) @[el2_lib.scala 275:36] + _T_389[10] <= _T_449 @[el2_lib.scala 275:30] + node _T_450 = bits(dccm_rdata_lo_any, 22, 22) @[el2_lib.scala 273:36] + _T_387[11] <= _T_450 @[el2_lib.scala 273:30] + node _T_451 = bits(dccm_rdata_lo_any, 22, 22) @[el2_lib.scala 274:36] + _T_388[11] <= _T_451 @[el2_lib.scala 274:30] + node _T_452 = bits(dccm_rdata_lo_any, 22, 22) @[el2_lib.scala 275:36] + _T_389[11] <= _T_452 @[el2_lib.scala 275:30] + node _T_453 = bits(dccm_rdata_lo_any, 23, 23) @[el2_lib.scala 271:36] + _T_385[13] <= _T_453 @[el2_lib.scala 271:30] + node _T_454 = bits(dccm_rdata_lo_any, 23, 23) @[el2_lib.scala 273:36] + _T_387[12] <= _T_454 @[el2_lib.scala 273:30] + node _T_455 = bits(dccm_rdata_lo_any, 23, 23) @[el2_lib.scala 274:36] + _T_388[12] <= _T_455 @[el2_lib.scala 274:30] + node _T_456 = bits(dccm_rdata_lo_any, 23, 23) @[el2_lib.scala 275:36] + _T_389[12] <= _T_456 @[el2_lib.scala 275:30] + node _T_457 = bits(dccm_rdata_lo_any, 24, 24) @[el2_lib.scala 272:36] + _T_386[13] <= _T_457 @[el2_lib.scala 272:30] + node _T_458 = bits(dccm_rdata_lo_any, 24, 24) @[el2_lib.scala 273:36] + _T_387[13] <= _T_458 @[el2_lib.scala 273:30] + node _T_459 = bits(dccm_rdata_lo_any, 24, 24) @[el2_lib.scala 274:36] + _T_388[13] <= _T_459 @[el2_lib.scala 274:30] + node _T_460 = bits(dccm_rdata_lo_any, 24, 24) @[el2_lib.scala 275:36] + _T_389[13] <= _T_460 @[el2_lib.scala 275:30] + node _T_461 = bits(dccm_rdata_lo_any, 25, 25) @[el2_lib.scala 271:36] + _T_385[14] <= _T_461 @[el2_lib.scala 271:30] + node _T_462 = bits(dccm_rdata_lo_any, 25, 25) @[el2_lib.scala 272:36] + _T_386[14] <= _T_462 @[el2_lib.scala 272:30] + node _T_463 = bits(dccm_rdata_lo_any, 25, 25) @[el2_lib.scala 273:36] + _T_387[14] <= _T_463 @[el2_lib.scala 273:30] + node _T_464 = bits(dccm_rdata_lo_any, 25, 25) @[el2_lib.scala 274:36] + _T_388[14] <= _T_464 @[el2_lib.scala 274:30] + node _T_465 = bits(dccm_rdata_lo_any, 25, 25) @[el2_lib.scala 275:36] + _T_389[14] <= _T_465 @[el2_lib.scala 275:30] + node _T_466 = bits(dccm_rdata_lo_any, 26, 26) @[el2_lib.scala 271:36] + _T_385[15] <= _T_466 @[el2_lib.scala 271:30] + node _T_467 = bits(dccm_rdata_lo_any, 26, 26) @[el2_lib.scala 276:36] + _T_390[0] <= _T_467 @[el2_lib.scala 276:30] + node _T_468 = bits(dccm_rdata_lo_any, 27, 27) @[el2_lib.scala 272:36] + _T_386[15] <= _T_468 @[el2_lib.scala 272:30] + node _T_469 = bits(dccm_rdata_lo_any, 27, 27) @[el2_lib.scala 276:36] + _T_390[1] <= _T_469 @[el2_lib.scala 276:30] + node _T_470 = bits(dccm_rdata_lo_any, 28, 28) @[el2_lib.scala 271:36] + _T_385[16] <= _T_470 @[el2_lib.scala 271:30] + node _T_471 = bits(dccm_rdata_lo_any, 28, 28) @[el2_lib.scala 272:36] + _T_386[16] <= _T_471 @[el2_lib.scala 272:30] + node _T_472 = bits(dccm_rdata_lo_any, 28, 28) @[el2_lib.scala 276:36] + _T_390[2] <= _T_472 @[el2_lib.scala 276:30] + node _T_473 = bits(dccm_rdata_lo_any, 29, 29) @[el2_lib.scala 273:36] + _T_387[15] <= _T_473 @[el2_lib.scala 273:30] + node _T_474 = bits(dccm_rdata_lo_any, 29, 29) @[el2_lib.scala 276:36] + _T_390[3] <= _T_474 @[el2_lib.scala 276:30] + node _T_475 = bits(dccm_rdata_lo_any, 30, 30) @[el2_lib.scala 271:36] + _T_385[17] <= _T_475 @[el2_lib.scala 271:30] + node _T_476 = bits(dccm_rdata_lo_any, 30, 30) @[el2_lib.scala 273:36] + _T_387[16] <= _T_476 @[el2_lib.scala 273:30] + node _T_477 = bits(dccm_rdata_lo_any, 30, 30) @[el2_lib.scala 276:36] + _T_390[4] <= _T_477 @[el2_lib.scala 276:30] + node _T_478 = bits(dccm_rdata_lo_any, 31, 31) @[el2_lib.scala 272:36] + _T_386[17] <= _T_478 @[el2_lib.scala 272:30] + node _T_479 = bits(dccm_rdata_lo_any, 31, 31) @[el2_lib.scala 273:36] + _T_387[17] <= _T_479 @[el2_lib.scala 273:30] + node _T_480 = bits(dccm_rdata_lo_any, 31, 31) @[el2_lib.scala 276:36] + _T_390[5] <= _T_480 @[el2_lib.scala 276:30] + node _T_481 = xorr(dccm_rdata_lo_any) @[el2_lib.scala 279:30] + node _T_482 = xorr(dccm_data_ecc_lo_any) @[el2_lib.scala 279:44] + node _T_483 = xor(_T_481, _T_482) @[el2_lib.scala 279:35] + node _T_484 = not(UInt<1>("h00")) @[el2_lib.scala 279:52] + node _T_485 = and(_T_483, _T_484) @[el2_lib.scala 279:50] + node _T_486 = bits(dccm_data_ecc_lo_any, 5, 5) @[el2_lib.scala 279:68] + node _T_487 = cat(_T_390[2], _T_390[1]) @[el2_lib.scala 279:76] + node _T_488 = cat(_T_487, _T_390[0]) @[el2_lib.scala 279:76] + node _T_489 = cat(_T_390[5], _T_390[4]) @[el2_lib.scala 279:76] + node _T_490 = cat(_T_489, _T_390[3]) @[el2_lib.scala 279:76] + node _T_491 = cat(_T_490, _T_488) @[el2_lib.scala 279:76] + node _T_492 = xorr(_T_491) @[el2_lib.scala 279:83] + node _T_493 = xor(_T_486, _T_492) @[el2_lib.scala 279:71] + node _T_494 = bits(dccm_data_ecc_lo_any, 4, 4) @[el2_lib.scala 279:95] + node _T_495 = cat(_T_389[2], _T_389[1]) @[el2_lib.scala 279:103] + node _T_496 = cat(_T_495, _T_389[0]) @[el2_lib.scala 279:103] + node _T_497 = cat(_T_389[4], _T_389[3]) @[el2_lib.scala 279:103] + node _T_498 = cat(_T_389[6], _T_389[5]) @[el2_lib.scala 279:103] + node _T_499 = cat(_T_498, _T_497) @[el2_lib.scala 279:103] + node _T_500 = cat(_T_499, _T_496) @[el2_lib.scala 279:103] + node _T_501 = cat(_T_389[8], _T_389[7]) @[el2_lib.scala 279:103] + node _T_502 = cat(_T_389[10], _T_389[9]) @[el2_lib.scala 279:103] + node _T_503 = cat(_T_502, _T_501) @[el2_lib.scala 279:103] + node _T_504 = cat(_T_389[12], _T_389[11]) @[el2_lib.scala 279:103] + node _T_505 = cat(_T_389[14], _T_389[13]) @[el2_lib.scala 279:103] + node _T_506 = cat(_T_505, _T_504) @[el2_lib.scala 279:103] + node _T_507 = cat(_T_506, _T_503) @[el2_lib.scala 279:103] + node _T_508 = cat(_T_507, _T_500) @[el2_lib.scala 279:103] + node _T_509 = xorr(_T_508) @[el2_lib.scala 279:110] + node _T_510 = xor(_T_494, _T_509) @[el2_lib.scala 279:98] + node _T_511 = bits(dccm_data_ecc_lo_any, 3, 3) @[el2_lib.scala 279:122] + node _T_512 = cat(_T_388[2], _T_388[1]) @[el2_lib.scala 279:130] + node _T_513 = cat(_T_512, _T_388[0]) @[el2_lib.scala 279:130] + node _T_514 = cat(_T_388[4], _T_388[3]) @[el2_lib.scala 279:130] + node _T_515 = cat(_T_388[6], _T_388[5]) @[el2_lib.scala 279:130] + node _T_516 = cat(_T_515, _T_514) @[el2_lib.scala 279:130] + node _T_517 = cat(_T_516, _T_513) @[el2_lib.scala 279:130] + node _T_518 = cat(_T_388[8], _T_388[7]) @[el2_lib.scala 279:130] + node _T_519 = cat(_T_388[10], _T_388[9]) @[el2_lib.scala 279:130] + node _T_520 = cat(_T_519, _T_518) @[el2_lib.scala 279:130] + node _T_521 = cat(_T_388[12], _T_388[11]) @[el2_lib.scala 279:130] + node _T_522 = cat(_T_388[14], _T_388[13]) @[el2_lib.scala 279:130] + node _T_523 = cat(_T_522, _T_521) @[el2_lib.scala 279:130] + node _T_524 = cat(_T_523, _T_520) @[el2_lib.scala 279:130] + node _T_525 = cat(_T_524, _T_517) @[el2_lib.scala 279:130] + node _T_526 = xorr(_T_525) @[el2_lib.scala 279:137] + node _T_527 = xor(_T_511, _T_526) @[el2_lib.scala 279:125] + node _T_528 = bits(dccm_data_ecc_lo_any, 2, 2) @[el2_lib.scala 279:149] + node _T_529 = cat(_T_387[1], _T_387[0]) @[el2_lib.scala 279:157] + node _T_530 = cat(_T_387[3], _T_387[2]) @[el2_lib.scala 279:157] + node _T_531 = cat(_T_530, _T_529) @[el2_lib.scala 279:157] + node _T_532 = cat(_T_387[5], _T_387[4]) @[el2_lib.scala 279:157] + node _T_533 = cat(_T_387[8], _T_387[7]) @[el2_lib.scala 279:157] + node _T_534 = cat(_T_533, _T_387[6]) @[el2_lib.scala 279:157] + node _T_535 = cat(_T_534, _T_532) @[el2_lib.scala 279:157] + node _T_536 = cat(_T_535, _T_531) @[el2_lib.scala 279:157] + node _T_537 = cat(_T_387[10], _T_387[9]) @[el2_lib.scala 279:157] + node _T_538 = cat(_T_387[12], _T_387[11]) @[el2_lib.scala 279:157] + node _T_539 = cat(_T_538, _T_537) @[el2_lib.scala 279:157] + node _T_540 = cat(_T_387[14], _T_387[13]) @[el2_lib.scala 279:157] + node _T_541 = cat(_T_387[17], _T_387[16]) @[el2_lib.scala 279:157] + node _T_542 = cat(_T_541, _T_387[15]) @[el2_lib.scala 279:157] + node _T_543 = cat(_T_542, _T_540) @[el2_lib.scala 279:157] + node _T_544 = cat(_T_543, _T_539) @[el2_lib.scala 279:157] + node _T_545 = cat(_T_544, _T_536) @[el2_lib.scala 279:157] + node _T_546 = xorr(_T_545) @[el2_lib.scala 279:164] + node _T_547 = xor(_T_528, _T_546) @[el2_lib.scala 279:152] + node _T_548 = bits(dccm_data_ecc_lo_any, 1, 1) @[el2_lib.scala 279:176] + node _T_549 = cat(_T_386[1], _T_386[0]) @[el2_lib.scala 279:184] + node _T_550 = cat(_T_386[3], _T_386[2]) @[el2_lib.scala 279:184] + node _T_551 = cat(_T_550, _T_549) @[el2_lib.scala 279:184] + node _T_552 = cat(_T_386[5], _T_386[4]) @[el2_lib.scala 279:184] + node _T_553 = cat(_T_386[8], _T_386[7]) @[el2_lib.scala 279:184] + node _T_554 = cat(_T_553, _T_386[6]) @[el2_lib.scala 279:184] + node _T_555 = cat(_T_554, _T_552) @[el2_lib.scala 279:184] + node _T_556 = cat(_T_555, _T_551) @[el2_lib.scala 279:184] + node _T_557 = cat(_T_386[10], _T_386[9]) @[el2_lib.scala 279:184] + node _T_558 = cat(_T_386[12], _T_386[11]) @[el2_lib.scala 279:184] + node _T_559 = cat(_T_558, _T_557) @[el2_lib.scala 279:184] + node _T_560 = cat(_T_386[14], _T_386[13]) @[el2_lib.scala 279:184] + node _T_561 = cat(_T_386[17], _T_386[16]) @[el2_lib.scala 279:184] + node _T_562 = cat(_T_561, _T_386[15]) @[el2_lib.scala 279:184] + node _T_563 = cat(_T_562, _T_560) @[el2_lib.scala 279:184] + node _T_564 = cat(_T_563, _T_559) @[el2_lib.scala 279:184] + node _T_565 = cat(_T_564, _T_556) @[el2_lib.scala 279:184] + node _T_566 = xorr(_T_565) @[el2_lib.scala 279:191] + node _T_567 = xor(_T_548, _T_566) @[el2_lib.scala 279:179] + node _T_568 = bits(dccm_data_ecc_lo_any, 0, 0) @[el2_lib.scala 279:203] + node _T_569 = cat(_T_385[1], _T_385[0]) @[el2_lib.scala 279:211] + node _T_570 = cat(_T_385[3], _T_385[2]) @[el2_lib.scala 279:211] + node _T_571 = cat(_T_570, _T_569) @[el2_lib.scala 279:211] + node _T_572 = cat(_T_385[5], _T_385[4]) @[el2_lib.scala 279:211] + node _T_573 = cat(_T_385[8], _T_385[7]) @[el2_lib.scala 279:211] + node _T_574 = cat(_T_573, _T_385[6]) @[el2_lib.scala 279:211] + node _T_575 = cat(_T_574, _T_572) @[el2_lib.scala 279:211] + node _T_576 = cat(_T_575, _T_571) @[el2_lib.scala 279:211] + node _T_577 = cat(_T_385[10], _T_385[9]) @[el2_lib.scala 279:211] + node _T_578 = cat(_T_385[12], _T_385[11]) @[el2_lib.scala 279:211] + node _T_579 = cat(_T_578, _T_577) @[el2_lib.scala 279:211] + node _T_580 = cat(_T_385[14], _T_385[13]) @[el2_lib.scala 279:211] + node _T_581 = cat(_T_385[17], _T_385[16]) @[el2_lib.scala 279:211] + node _T_582 = cat(_T_581, _T_385[15]) @[el2_lib.scala 279:211] + node _T_583 = cat(_T_582, _T_580) @[el2_lib.scala 279:211] + node _T_584 = cat(_T_583, _T_579) @[el2_lib.scala 279:211] + node _T_585 = cat(_T_584, _T_576) @[el2_lib.scala 279:211] + node _T_586 = xorr(_T_585) @[el2_lib.scala 279:218] + node _T_587 = xor(_T_568, _T_586) @[el2_lib.scala 279:206] + node _T_588 = cat(_T_547, _T_567) @[Cat.scala 29:58] + node _T_589 = cat(_T_588, _T_587) @[Cat.scala 29:58] + node _T_590 = cat(_T_510, _T_527) @[Cat.scala 29:58] + node _T_591 = cat(_T_485, _T_493) @[Cat.scala 29:58] + node _T_592 = cat(_T_591, _T_590) @[Cat.scala 29:58] + node _T_593 = cat(_T_592, _T_589) @[Cat.scala 29:58] + node _T_594 = neq(_T_593, UInt<1>("h00")) @[el2_lib.scala 281:44] + node _T_595 = and(is_ldst_lo_any, _T_594) @[el2_lib.scala 281:32] + node _T_596 = xorr(dccm_rdata_lo_any) @[el2_lib.scala 281:60] + node _T_597 = xorr(dccm_data_ecc_lo_any) @[el2_lib.scala 281:74] + node _T_598 = xor(_T_596, _T_597) @[el2_lib.scala 281:65] + node _T_599 = not(UInt<1>("h00")) @[el2_lib.scala 281:82] + node _T_600 = and(_T_598, _T_599) @[el2_lib.scala 281:80] + node single_ecc_error_lo_any = and(_T_595, _T_600) @[el2_lib.scala 281:52] + node _T_601 = neq(_T_593, UInt<1>("h00")) @[el2_lib.scala 282:44] + node _T_602 = and(is_ldst_lo_any, _T_601) @[el2_lib.scala 282:32] + node _T_603 = xorr(dccm_rdata_lo_any) @[el2_lib.scala 282:60] + node _T_604 = xorr(dccm_data_ecc_lo_any) @[el2_lib.scala 282:74] + node _T_605 = xor(_T_603, _T_604) @[el2_lib.scala 282:65] + node _T_606 = not(UInt<1>("h00")) @[el2_lib.scala 282:82] + node _T_607 = and(_T_605, _T_606) @[el2_lib.scala 282:80] + node double_ecc_error_lo_any = and(_T_602, _T_607) @[el2_lib.scala 282:52] + wire _T_608 : UInt<1>[39] @[el2_lib.scala 283:26] + node _T_609 = bits(_T_593, 5, 0) @[el2_lib.scala 286:35] + node _T_610 = eq(_T_609, UInt<1>("h01")) @[el2_lib.scala 286:41] + _T_608[0] <= _T_610 @[el2_lib.scala 286:23] + node _T_611 = bits(_T_593, 5, 0) @[el2_lib.scala 286:35] + node _T_612 = eq(_T_611, UInt<2>("h02")) @[el2_lib.scala 286:41] + _T_608[1] <= _T_612 @[el2_lib.scala 286:23] + node _T_613 = bits(_T_593, 5, 0) @[el2_lib.scala 286:35] + node _T_614 = eq(_T_613, UInt<2>("h03")) @[el2_lib.scala 286:41] + _T_608[2] <= _T_614 @[el2_lib.scala 286:23] + node _T_615 = bits(_T_593, 5, 0) @[el2_lib.scala 286:35] + node _T_616 = eq(_T_615, UInt<3>("h04")) @[el2_lib.scala 286:41] + _T_608[3] <= _T_616 @[el2_lib.scala 286:23] + node _T_617 = bits(_T_593, 5, 0) @[el2_lib.scala 286:35] + node _T_618 = eq(_T_617, UInt<3>("h05")) @[el2_lib.scala 286:41] + _T_608[4] <= _T_618 @[el2_lib.scala 286:23] + node _T_619 = bits(_T_593, 5, 0) @[el2_lib.scala 286:35] + node _T_620 = eq(_T_619, UInt<3>("h06")) @[el2_lib.scala 286:41] + _T_608[5] <= _T_620 @[el2_lib.scala 286:23] + node _T_621 = bits(_T_593, 5, 0) @[el2_lib.scala 286:35] + node _T_622 = eq(_T_621, UInt<3>("h07")) @[el2_lib.scala 286:41] + _T_608[6] <= _T_622 @[el2_lib.scala 286:23] + node _T_623 = bits(_T_593, 5, 0) @[el2_lib.scala 286:35] + node _T_624 = eq(_T_623, UInt<4>("h08")) @[el2_lib.scala 286:41] + _T_608[7] <= _T_624 @[el2_lib.scala 286:23] + node _T_625 = bits(_T_593, 5, 0) @[el2_lib.scala 286:35] + node _T_626 = eq(_T_625, UInt<4>("h09")) @[el2_lib.scala 286:41] + _T_608[8] <= _T_626 @[el2_lib.scala 286:23] + node _T_627 = bits(_T_593, 5, 0) @[el2_lib.scala 286:35] + node _T_628 = eq(_T_627, UInt<4>("h0a")) @[el2_lib.scala 286:41] + _T_608[9] <= _T_628 @[el2_lib.scala 286:23] + node _T_629 = bits(_T_593, 5, 0) @[el2_lib.scala 286:35] + node _T_630 = eq(_T_629, UInt<4>("h0b")) @[el2_lib.scala 286:41] + _T_608[10] <= _T_630 @[el2_lib.scala 286:23] + node _T_631 = bits(_T_593, 5, 0) @[el2_lib.scala 286:35] + node _T_632 = eq(_T_631, UInt<4>("h0c")) @[el2_lib.scala 286:41] + _T_608[11] <= _T_632 @[el2_lib.scala 286:23] + node _T_633 = bits(_T_593, 5, 0) @[el2_lib.scala 286:35] + node _T_634 = eq(_T_633, UInt<4>("h0d")) @[el2_lib.scala 286:41] + _T_608[12] <= _T_634 @[el2_lib.scala 286:23] + node _T_635 = bits(_T_593, 5, 0) @[el2_lib.scala 286:35] + node _T_636 = eq(_T_635, UInt<4>("h0e")) @[el2_lib.scala 286:41] + _T_608[13] <= _T_636 @[el2_lib.scala 286:23] + node _T_637 = bits(_T_593, 5, 0) @[el2_lib.scala 286:35] + node _T_638 = eq(_T_637, UInt<4>("h0f")) @[el2_lib.scala 286:41] + _T_608[14] <= _T_638 @[el2_lib.scala 286:23] + node _T_639 = bits(_T_593, 5, 0) @[el2_lib.scala 286:35] + node _T_640 = eq(_T_639, UInt<5>("h010")) @[el2_lib.scala 286:41] + _T_608[15] <= _T_640 @[el2_lib.scala 286:23] + node _T_641 = bits(_T_593, 5, 0) @[el2_lib.scala 286:35] + node _T_642 = eq(_T_641, UInt<5>("h011")) @[el2_lib.scala 286:41] + _T_608[16] <= _T_642 @[el2_lib.scala 286:23] + node _T_643 = bits(_T_593, 5, 0) @[el2_lib.scala 286:35] + node _T_644 = eq(_T_643, UInt<5>("h012")) @[el2_lib.scala 286:41] + _T_608[17] <= _T_644 @[el2_lib.scala 286:23] + node _T_645 = bits(_T_593, 5, 0) @[el2_lib.scala 286:35] + node _T_646 = eq(_T_645, UInt<5>("h013")) @[el2_lib.scala 286:41] + _T_608[18] <= _T_646 @[el2_lib.scala 286:23] + node _T_647 = bits(_T_593, 5, 0) @[el2_lib.scala 286:35] + node _T_648 = eq(_T_647, UInt<5>("h014")) @[el2_lib.scala 286:41] + _T_608[19] <= _T_648 @[el2_lib.scala 286:23] + node _T_649 = bits(_T_593, 5, 0) @[el2_lib.scala 286:35] + node _T_650 = eq(_T_649, UInt<5>("h015")) @[el2_lib.scala 286:41] + _T_608[20] <= _T_650 @[el2_lib.scala 286:23] + node _T_651 = bits(_T_593, 5, 0) @[el2_lib.scala 286:35] + node _T_652 = eq(_T_651, UInt<5>("h016")) @[el2_lib.scala 286:41] + _T_608[21] <= _T_652 @[el2_lib.scala 286:23] + node _T_653 = bits(_T_593, 5, 0) @[el2_lib.scala 286:35] + node _T_654 = eq(_T_653, UInt<5>("h017")) @[el2_lib.scala 286:41] + _T_608[22] <= _T_654 @[el2_lib.scala 286:23] + node _T_655 = bits(_T_593, 5, 0) @[el2_lib.scala 286:35] + node _T_656 = eq(_T_655, UInt<5>("h018")) @[el2_lib.scala 286:41] + _T_608[23] <= _T_656 @[el2_lib.scala 286:23] + node _T_657 = bits(_T_593, 5, 0) @[el2_lib.scala 286:35] + node _T_658 = eq(_T_657, UInt<5>("h019")) @[el2_lib.scala 286:41] + _T_608[24] <= _T_658 @[el2_lib.scala 286:23] + node _T_659 = bits(_T_593, 5, 0) @[el2_lib.scala 286:35] + node _T_660 = eq(_T_659, UInt<5>("h01a")) @[el2_lib.scala 286:41] + _T_608[25] <= _T_660 @[el2_lib.scala 286:23] + node _T_661 = bits(_T_593, 5, 0) @[el2_lib.scala 286:35] + node _T_662 = eq(_T_661, UInt<5>("h01b")) @[el2_lib.scala 286:41] + _T_608[26] <= _T_662 @[el2_lib.scala 286:23] + node _T_663 = bits(_T_593, 5, 0) @[el2_lib.scala 286:35] + node _T_664 = eq(_T_663, UInt<5>("h01c")) @[el2_lib.scala 286:41] + _T_608[27] <= _T_664 @[el2_lib.scala 286:23] + node _T_665 = bits(_T_593, 5, 0) @[el2_lib.scala 286:35] + node _T_666 = eq(_T_665, UInt<5>("h01d")) @[el2_lib.scala 286:41] + _T_608[28] <= _T_666 @[el2_lib.scala 286:23] + node _T_667 = bits(_T_593, 5, 0) @[el2_lib.scala 286:35] + node _T_668 = eq(_T_667, UInt<5>("h01e")) @[el2_lib.scala 286:41] + _T_608[29] <= _T_668 @[el2_lib.scala 286:23] + node _T_669 = bits(_T_593, 5, 0) @[el2_lib.scala 286:35] + node _T_670 = eq(_T_669, UInt<5>("h01f")) @[el2_lib.scala 286:41] + _T_608[30] <= _T_670 @[el2_lib.scala 286:23] + node _T_671 = bits(_T_593, 5, 0) @[el2_lib.scala 286:35] + node _T_672 = eq(_T_671, UInt<6>("h020")) @[el2_lib.scala 286:41] + _T_608[31] <= _T_672 @[el2_lib.scala 286:23] + node _T_673 = bits(_T_593, 5, 0) @[el2_lib.scala 286:35] + node _T_674 = eq(_T_673, UInt<6>("h021")) @[el2_lib.scala 286:41] + _T_608[32] <= _T_674 @[el2_lib.scala 286:23] + node _T_675 = bits(_T_593, 5, 0) @[el2_lib.scala 286:35] + node _T_676 = eq(_T_675, UInt<6>("h022")) @[el2_lib.scala 286:41] + _T_608[33] <= _T_676 @[el2_lib.scala 286:23] + node _T_677 = bits(_T_593, 5, 0) @[el2_lib.scala 286:35] + node _T_678 = eq(_T_677, UInt<6>("h023")) @[el2_lib.scala 286:41] + _T_608[34] <= _T_678 @[el2_lib.scala 286:23] + node _T_679 = bits(_T_593, 5, 0) @[el2_lib.scala 286:35] + node _T_680 = eq(_T_679, UInt<6>("h024")) @[el2_lib.scala 286:41] + _T_608[35] <= _T_680 @[el2_lib.scala 286:23] + node _T_681 = bits(_T_593, 5, 0) @[el2_lib.scala 286:35] + node _T_682 = eq(_T_681, UInt<6>("h025")) @[el2_lib.scala 286:41] + _T_608[36] <= _T_682 @[el2_lib.scala 286:23] + node _T_683 = bits(_T_593, 5, 0) @[el2_lib.scala 286:35] + node _T_684 = eq(_T_683, UInt<6>("h026")) @[el2_lib.scala 286:41] + _T_608[37] <= _T_684 @[el2_lib.scala 286:23] + node _T_685 = bits(_T_593, 5, 0) @[el2_lib.scala 286:35] + node _T_686 = eq(_T_685, UInt<6>("h027")) @[el2_lib.scala 286:41] + _T_608[38] <= _T_686 @[el2_lib.scala 286:23] + node _T_687 = bits(dccm_data_ecc_lo_any, 6, 6) @[el2_lib.scala 288:37] + node _T_688 = bits(dccm_rdata_lo_any, 31, 26) @[el2_lib.scala 288:45] + node _T_689 = bits(dccm_data_ecc_lo_any, 5, 5) @[el2_lib.scala 288:60] + node _T_690 = bits(dccm_rdata_lo_any, 25, 11) @[el2_lib.scala 288:68] + node _T_691 = bits(dccm_data_ecc_lo_any, 4, 4) @[el2_lib.scala 288:83] + node _T_692 = bits(dccm_rdata_lo_any, 10, 4) @[el2_lib.scala 288:91] + node _T_693 = bits(dccm_data_ecc_lo_any, 3, 3) @[el2_lib.scala 288:105] + node _T_694 = bits(dccm_rdata_lo_any, 3, 1) @[el2_lib.scala 288:113] + node _T_695 = bits(dccm_data_ecc_lo_any, 2, 2) @[el2_lib.scala 288:126] + node _T_696 = bits(dccm_rdata_lo_any, 0, 0) @[el2_lib.scala 288:134] + node _T_697 = bits(dccm_data_ecc_lo_any, 1, 0) @[el2_lib.scala 288:145] + node _T_698 = cat(_T_696, _T_697) @[Cat.scala 29:58] + node _T_699 = cat(_T_693, _T_694) @[Cat.scala 29:58] + node _T_700 = cat(_T_699, _T_695) @[Cat.scala 29:58] + node _T_701 = cat(_T_700, _T_698) @[Cat.scala 29:58] + node _T_702 = cat(_T_690, _T_691) @[Cat.scala 29:58] + node _T_703 = cat(_T_702, _T_692) @[Cat.scala 29:58] + node _T_704 = cat(_T_687, _T_688) @[Cat.scala 29:58] + node _T_705 = cat(_T_704, _T_689) @[Cat.scala 29:58] + node _T_706 = cat(_T_705, _T_703) @[Cat.scala 29:58] + node _T_707 = cat(_T_706, _T_701) @[Cat.scala 29:58] + node _T_708 = bits(single_ecc_error_lo_any, 0, 0) @[el2_lib.scala 289:49] + node _T_709 = cat(_T_608[1], _T_608[0]) @[el2_lib.scala 289:69] + node _T_710 = cat(_T_608[3], _T_608[2]) @[el2_lib.scala 289:69] + node _T_711 = cat(_T_710, _T_709) @[el2_lib.scala 289:69] + node _T_712 = cat(_T_608[5], _T_608[4]) @[el2_lib.scala 289:69] + node _T_713 = cat(_T_608[8], _T_608[7]) @[el2_lib.scala 289:69] + node _T_714 = cat(_T_713, _T_608[6]) @[el2_lib.scala 289:69] + node _T_715 = cat(_T_714, _T_712) @[el2_lib.scala 289:69] + node _T_716 = cat(_T_715, _T_711) @[el2_lib.scala 289:69] + node _T_717 = cat(_T_608[10], _T_608[9]) @[el2_lib.scala 289:69] + node _T_718 = cat(_T_608[13], _T_608[12]) @[el2_lib.scala 289:69] + node _T_719 = cat(_T_718, _T_608[11]) @[el2_lib.scala 289:69] + node _T_720 = cat(_T_719, _T_717) @[el2_lib.scala 289:69] + node _T_721 = cat(_T_608[15], _T_608[14]) @[el2_lib.scala 289:69] + node _T_722 = cat(_T_608[18], _T_608[17]) @[el2_lib.scala 289:69] + node _T_723 = cat(_T_722, _T_608[16]) @[el2_lib.scala 289:69] + node _T_724 = cat(_T_723, _T_721) @[el2_lib.scala 289:69] + node _T_725 = cat(_T_724, _T_720) @[el2_lib.scala 289:69] + node _T_726 = cat(_T_725, _T_716) @[el2_lib.scala 289:69] + node _T_727 = cat(_T_608[20], _T_608[19]) @[el2_lib.scala 289:69] + node _T_728 = cat(_T_608[23], _T_608[22]) @[el2_lib.scala 289:69] + node _T_729 = cat(_T_728, _T_608[21]) @[el2_lib.scala 289:69] + node _T_730 = cat(_T_729, _T_727) @[el2_lib.scala 289:69] + node _T_731 = cat(_T_608[25], _T_608[24]) @[el2_lib.scala 289:69] + node _T_732 = cat(_T_608[28], _T_608[27]) @[el2_lib.scala 289:69] + node _T_733 = cat(_T_732, _T_608[26]) @[el2_lib.scala 289:69] + node _T_734 = cat(_T_733, _T_731) @[el2_lib.scala 289:69] + node _T_735 = cat(_T_734, _T_730) @[el2_lib.scala 289:69] + node _T_736 = cat(_T_608[30], _T_608[29]) @[el2_lib.scala 289:69] + node _T_737 = cat(_T_608[33], _T_608[32]) @[el2_lib.scala 289:69] + node _T_738 = cat(_T_737, _T_608[31]) @[el2_lib.scala 289:69] + node _T_739 = cat(_T_738, _T_736) @[el2_lib.scala 289:69] + node _T_740 = cat(_T_608[35], _T_608[34]) @[el2_lib.scala 289:69] + node _T_741 = cat(_T_608[38], _T_608[37]) @[el2_lib.scala 289:69] + node _T_742 = cat(_T_741, _T_608[36]) @[el2_lib.scala 289:69] + node _T_743 = cat(_T_742, _T_740) @[el2_lib.scala 289:69] + node _T_744 = cat(_T_743, _T_739) @[el2_lib.scala 289:69] + node _T_745 = cat(_T_744, _T_735) @[el2_lib.scala 289:69] + node _T_746 = cat(_T_745, _T_726) @[el2_lib.scala 289:69] + node _T_747 = xor(_T_746, _T_707) @[el2_lib.scala 289:76] + node _T_748 = mux(_T_708, _T_747, _T_707) @[el2_lib.scala 289:31] + node _T_749 = bits(_T_748, 37, 32) @[el2_lib.scala 291:37] + node _T_750 = bits(_T_748, 30, 16) @[el2_lib.scala 291:61] + node _T_751 = bits(_T_748, 14, 8) @[el2_lib.scala 291:86] + node _T_752 = bits(_T_748, 6, 4) @[el2_lib.scala 291:110] + node _T_753 = bits(_T_748, 2, 2) @[el2_lib.scala 291:133] + node _T_754 = cat(_T_752, _T_753) @[Cat.scala 29:58] + node _T_755 = cat(_T_749, _T_750) @[Cat.scala 29:58] + node _T_756 = cat(_T_755, _T_751) @[Cat.scala 29:58] + node sec_data_lo_any = cat(_T_756, _T_754) @[Cat.scala 29:58] + node _T_757 = bits(_T_748, 38, 38) @[el2_lib.scala 292:39] + node _T_758 = bits(_T_593, 6, 0) @[el2_lib.scala 292:56] + node _T_759 = eq(_T_758, UInt<7>("h040")) @[el2_lib.scala 292:62] + node _T_760 = xor(_T_757, _T_759) @[el2_lib.scala 292:44] + node _T_761 = bits(_T_748, 31, 31) @[el2_lib.scala 292:97] + node _T_762 = bits(_T_748, 15, 15) @[el2_lib.scala 292:119] + node _T_763 = bits(_T_748, 7, 7) @[el2_lib.scala 292:141] + node _T_764 = bits(_T_748, 3, 3) @[el2_lib.scala 292:162] + node _T_765 = bits(_T_748, 1, 0) @[el2_lib.scala 292:183] + node _T_766 = cat(_T_763, _T_764) @[Cat.scala 29:58] + node _T_767 = cat(_T_766, _T_765) @[Cat.scala 29:58] + node _T_768 = cat(_T_760, _T_761) @[Cat.scala 29:58] + node _T_769 = cat(_T_768, _T_762) @[Cat.scala 29:58] + node ecc_out_lo_nc = cat(_T_769, _T_767) @[Cat.scala 29:58] + wire _T_770 : UInt<1>[18] @[el2_lib.scala 228:18] + wire _T_771 : UInt<1>[18] @[el2_lib.scala 229:18] + wire _T_772 : UInt<1>[18] @[el2_lib.scala 230:18] + wire _T_773 : UInt<1>[15] @[el2_lib.scala 231:18] + wire _T_774 : UInt<1>[15] @[el2_lib.scala 232:18] + wire _T_775 : UInt<1>[6] @[el2_lib.scala 233:18] + node _T_776 = bits(dccm_wdata_lo_any, 0, 0) @[el2_lib.scala 240:36] + _T_771[0] <= _T_776 @[el2_lib.scala 240:30] + node _T_777 = bits(dccm_wdata_lo_any, 0, 0) @[el2_lib.scala 241:36] + _T_772[0] <= _T_777 @[el2_lib.scala 241:30] + node _T_778 = bits(dccm_wdata_lo_any, 0, 0) @[el2_lib.scala 244:36] + _T_775[0] <= _T_778 @[el2_lib.scala 244:30] + node _T_779 = bits(dccm_wdata_lo_any, 1, 1) @[el2_lib.scala 239:36] + _T_770[0] <= _T_779 @[el2_lib.scala 239:30] + node _T_780 = bits(dccm_wdata_lo_any, 1, 1) @[el2_lib.scala 241:36] + _T_772[1] <= _T_780 @[el2_lib.scala 241:30] + node _T_781 = bits(dccm_wdata_lo_any, 1, 1) @[el2_lib.scala 244:36] + _T_775[1] <= _T_781 @[el2_lib.scala 244:30] + node _T_782 = bits(dccm_wdata_lo_any, 2, 2) @[el2_lib.scala 241:36] + _T_772[2] <= _T_782 @[el2_lib.scala 241:30] + node _T_783 = bits(dccm_wdata_lo_any, 2, 2) @[el2_lib.scala 244:36] + _T_775[2] <= _T_783 @[el2_lib.scala 244:30] + node _T_784 = bits(dccm_wdata_lo_any, 3, 3) @[el2_lib.scala 239:36] + _T_770[1] <= _T_784 @[el2_lib.scala 239:30] + node _T_785 = bits(dccm_wdata_lo_any, 3, 3) @[el2_lib.scala 240:36] + _T_771[1] <= _T_785 @[el2_lib.scala 240:30] + node _T_786 = bits(dccm_wdata_lo_any, 3, 3) @[el2_lib.scala 244:36] + _T_775[3] <= _T_786 @[el2_lib.scala 244:30] + node _T_787 = bits(dccm_wdata_lo_any, 4, 4) @[el2_lib.scala 240:36] + _T_771[2] <= _T_787 @[el2_lib.scala 240:30] + node _T_788 = bits(dccm_wdata_lo_any, 4, 4) @[el2_lib.scala 244:36] + _T_775[4] <= _T_788 @[el2_lib.scala 244:30] + node _T_789 = bits(dccm_wdata_lo_any, 5, 5) @[el2_lib.scala 239:36] + _T_770[2] <= _T_789 @[el2_lib.scala 239:30] + node _T_790 = bits(dccm_wdata_lo_any, 5, 5) @[el2_lib.scala 244:36] + _T_775[5] <= _T_790 @[el2_lib.scala 244:30] + node _T_791 = bits(dccm_wdata_lo_any, 6, 6) @[el2_lib.scala 239:36] + _T_770[3] <= _T_791 @[el2_lib.scala 239:30] + node _T_792 = bits(dccm_wdata_lo_any, 6, 6) @[el2_lib.scala 240:36] + _T_771[3] <= _T_792 @[el2_lib.scala 240:30] + node _T_793 = bits(dccm_wdata_lo_any, 6, 6) @[el2_lib.scala 241:36] + _T_772[3] <= _T_793 @[el2_lib.scala 241:30] + node _T_794 = bits(dccm_wdata_lo_any, 6, 6) @[el2_lib.scala 242:36] + _T_773[0] <= _T_794 @[el2_lib.scala 242:30] + node _T_795 = bits(dccm_wdata_lo_any, 6, 6) @[el2_lib.scala 243:36] + _T_774[0] <= _T_795 @[el2_lib.scala 243:30] + node _T_796 = bits(dccm_wdata_lo_any, 7, 7) @[el2_lib.scala 240:36] + _T_771[4] <= _T_796 @[el2_lib.scala 240:30] + node _T_797 = bits(dccm_wdata_lo_any, 7, 7) @[el2_lib.scala 241:36] + _T_772[4] <= _T_797 @[el2_lib.scala 241:30] + node _T_798 = bits(dccm_wdata_lo_any, 7, 7) @[el2_lib.scala 242:36] + _T_773[1] <= _T_798 @[el2_lib.scala 242:30] + node _T_799 = bits(dccm_wdata_lo_any, 7, 7) @[el2_lib.scala 243:36] + _T_774[1] <= _T_799 @[el2_lib.scala 243:30] + node _T_800 = bits(dccm_wdata_lo_any, 8, 8) @[el2_lib.scala 239:36] + _T_770[4] <= _T_800 @[el2_lib.scala 239:30] + node _T_801 = bits(dccm_wdata_lo_any, 8, 8) @[el2_lib.scala 241:36] + _T_772[5] <= _T_801 @[el2_lib.scala 241:30] + node _T_802 = bits(dccm_wdata_lo_any, 8, 8) @[el2_lib.scala 242:36] + _T_773[2] <= _T_802 @[el2_lib.scala 242:30] + node _T_803 = bits(dccm_wdata_lo_any, 8, 8) @[el2_lib.scala 243:36] + _T_774[2] <= _T_803 @[el2_lib.scala 243:30] + node _T_804 = bits(dccm_wdata_lo_any, 9, 9) @[el2_lib.scala 241:36] + _T_772[6] <= _T_804 @[el2_lib.scala 241:30] + node _T_805 = bits(dccm_wdata_lo_any, 9, 9) @[el2_lib.scala 242:36] + _T_773[3] <= _T_805 @[el2_lib.scala 242:30] + node _T_806 = bits(dccm_wdata_lo_any, 9, 9) @[el2_lib.scala 243:36] + _T_774[3] <= _T_806 @[el2_lib.scala 243:30] + node _T_807 = bits(dccm_wdata_lo_any, 10, 10) @[el2_lib.scala 239:36] + _T_770[5] <= _T_807 @[el2_lib.scala 239:30] + node _T_808 = bits(dccm_wdata_lo_any, 10, 10) @[el2_lib.scala 240:36] + _T_771[5] <= _T_808 @[el2_lib.scala 240:30] + node _T_809 = bits(dccm_wdata_lo_any, 10, 10) @[el2_lib.scala 242:36] + _T_773[4] <= _T_809 @[el2_lib.scala 242:30] + node _T_810 = bits(dccm_wdata_lo_any, 10, 10) @[el2_lib.scala 243:36] + _T_774[4] <= _T_810 @[el2_lib.scala 243:30] + node _T_811 = bits(dccm_wdata_lo_any, 11, 11) @[el2_lib.scala 240:36] + _T_771[6] <= _T_811 @[el2_lib.scala 240:30] + node _T_812 = bits(dccm_wdata_lo_any, 11, 11) @[el2_lib.scala 242:36] + _T_773[5] <= _T_812 @[el2_lib.scala 242:30] + node _T_813 = bits(dccm_wdata_lo_any, 11, 11) @[el2_lib.scala 243:36] + _T_774[5] <= _T_813 @[el2_lib.scala 243:30] + node _T_814 = bits(dccm_wdata_lo_any, 12, 12) @[el2_lib.scala 239:36] + _T_770[6] <= _T_814 @[el2_lib.scala 239:30] + node _T_815 = bits(dccm_wdata_lo_any, 12, 12) @[el2_lib.scala 242:36] + _T_773[6] <= _T_815 @[el2_lib.scala 242:30] + node _T_816 = bits(dccm_wdata_lo_any, 12, 12) @[el2_lib.scala 243:36] + _T_774[6] <= _T_816 @[el2_lib.scala 243:30] + node _T_817 = bits(dccm_wdata_lo_any, 13, 13) @[el2_lib.scala 242:36] + _T_773[7] <= _T_817 @[el2_lib.scala 242:30] + node _T_818 = bits(dccm_wdata_lo_any, 13, 13) @[el2_lib.scala 243:36] + _T_774[7] <= _T_818 @[el2_lib.scala 243:30] + node _T_819 = bits(dccm_wdata_lo_any, 14, 14) @[el2_lib.scala 239:36] + _T_770[7] <= _T_819 @[el2_lib.scala 239:30] + node _T_820 = bits(dccm_wdata_lo_any, 14, 14) @[el2_lib.scala 240:36] + _T_771[7] <= _T_820 @[el2_lib.scala 240:30] + node _T_821 = bits(dccm_wdata_lo_any, 14, 14) @[el2_lib.scala 241:36] + _T_772[7] <= _T_821 @[el2_lib.scala 241:30] + node _T_822 = bits(dccm_wdata_lo_any, 14, 14) @[el2_lib.scala 243:36] + _T_774[8] <= _T_822 @[el2_lib.scala 243:30] + node _T_823 = bits(dccm_wdata_lo_any, 15, 15) @[el2_lib.scala 240:36] + _T_771[8] <= _T_823 @[el2_lib.scala 240:30] + node _T_824 = bits(dccm_wdata_lo_any, 15, 15) @[el2_lib.scala 241:36] + _T_772[8] <= _T_824 @[el2_lib.scala 241:30] + node _T_825 = bits(dccm_wdata_lo_any, 15, 15) @[el2_lib.scala 243:36] + _T_774[9] <= _T_825 @[el2_lib.scala 243:30] + node _T_826 = bits(dccm_wdata_lo_any, 16, 16) @[el2_lib.scala 239:36] + _T_770[8] <= _T_826 @[el2_lib.scala 239:30] + node _T_827 = bits(dccm_wdata_lo_any, 16, 16) @[el2_lib.scala 241:36] + _T_772[9] <= _T_827 @[el2_lib.scala 241:30] + node _T_828 = bits(dccm_wdata_lo_any, 16, 16) @[el2_lib.scala 243:36] + _T_774[10] <= _T_828 @[el2_lib.scala 243:30] + node _T_829 = bits(dccm_wdata_lo_any, 17, 17) @[el2_lib.scala 241:36] + _T_772[10] <= _T_829 @[el2_lib.scala 241:30] + node _T_830 = bits(dccm_wdata_lo_any, 17, 17) @[el2_lib.scala 243:36] + _T_774[11] <= _T_830 @[el2_lib.scala 243:30] + node _T_831 = bits(dccm_wdata_lo_any, 18, 18) @[el2_lib.scala 239:36] + _T_770[9] <= _T_831 @[el2_lib.scala 239:30] + node _T_832 = bits(dccm_wdata_lo_any, 18, 18) @[el2_lib.scala 240:36] + _T_771[9] <= _T_832 @[el2_lib.scala 240:30] + node _T_833 = bits(dccm_wdata_lo_any, 18, 18) @[el2_lib.scala 243:36] + _T_774[12] <= _T_833 @[el2_lib.scala 243:30] + node _T_834 = bits(dccm_wdata_lo_any, 19, 19) @[el2_lib.scala 240:36] + _T_771[10] <= _T_834 @[el2_lib.scala 240:30] + node _T_835 = bits(dccm_wdata_lo_any, 19, 19) @[el2_lib.scala 243:36] + _T_774[13] <= _T_835 @[el2_lib.scala 243:30] + node _T_836 = bits(dccm_wdata_lo_any, 20, 20) @[el2_lib.scala 239:36] + _T_770[10] <= _T_836 @[el2_lib.scala 239:30] + node _T_837 = bits(dccm_wdata_lo_any, 20, 20) @[el2_lib.scala 243:36] + _T_774[14] <= _T_837 @[el2_lib.scala 243:30] + node _T_838 = bits(dccm_wdata_lo_any, 21, 21) @[el2_lib.scala 239:36] + _T_770[11] <= _T_838 @[el2_lib.scala 239:30] + node _T_839 = bits(dccm_wdata_lo_any, 21, 21) @[el2_lib.scala 240:36] + _T_771[11] <= _T_839 @[el2_lib.scala 240:30] + node _T_840 = bits(dccm_wdata_lo_any, 21, 21) @[el2_lib.scala 241:36] + _T_772[11] <= _T_840 @[el2_lib.scala 241:30] + node _T_841 = bits(dccm_wdata_lo_any, 21, 21) @[el2_lib.scala 242:36] + _T_773[8] <= _T_841 @[el2_lib.scala 242:30] + node _T_842 = bits(dccm_wdata_lo_any, 22, 22) @[el2_lib.scala 240:36] + _T_771[12] <= _T_842 @[el2_lib.scala 240:30] + node _T_843 = bits(dccm_wdata_lo_any, 22, 22) @[el2_lib.scala 241:36] + _T_772[12] <= _T_843 @[el2_lib.scala 241:30] + node _T_844 = bits(dccm_wdata_lo_any, 22, 22) @[el2_lib.scala 242:36] + _T_773[9] <= _T_844 @[el2_lib.scala 242:30] + node _T_845 = bits(dccm_wdata_lo_any, 23, 23) @[el2_lib.scala 239:36] + _T_770[12] <= _T_845 @[el2_lib.scala 239:30] + node _T_846 = bits(dccm_wdata_lo_any, 23, 23) @[el2_lib.scala 241:36] + _T_772[13] <= _T_846 @[el2_lib.scala 241:30] + node _T_847 = bits(dccm_wdata_lo_any, 23, 23) @[el2_lib.scala 242:36] + _T_773[10] <= _T_847 @[el2_lib.scala 242:30] + node _T_848 = bits(dccm_wdata_lo_any, 24, 24) @[el2_lib.scala 241:36] + _T_772[14] <= _T_848 @[el2_lib.scala 241:30] + node _T_849 = bits(dccm_wdata_lo_any, 24, 24) @[el2_lib.scala 242:36] + _T_773[11] <= _T_849 @[el2_lib.scala 242:30] + node _T_850 = bits(dccm_wdata_lo_any, 25, 25) @[el2_lib.scala 239:36] + _T_770[13] <= _T_850 @[el2_lib.scala 239:30] + node _T_851 = bits(dccm_wdata_lo_any, 25, 25) @[el2_lib.scala 240:36] + _T_771[13] <= _T_851 @[el2_lib.scala 240:30] + node _T_852 = bits(dccm_wdata_lo_any, 25, 25) @[el2_lib.scala 242:36] + _T_773[12] <= _T_852 @[el2_lib.scala 242:30] + node _T_853 = bits(dccm_wdata_lo_any, 26, 26) @[el2_lib.scala 240:36] + _T_771[14] <= _T_853 @[el2_lib.scala 240:30] + node _T_854 = bits(dccm_wdata_lo_any, 26, 26) @[el2_lib.scala 242:36] + _T_773[13] <= _T_854 @[el2_lib.scala 242:30] + node _T_855 = bits(dccm_wdata_lo_any, 27, 27) @[el2_lib.scala 239:36] + _T_770[14] <= _T_855 @[el2_lib.scala 239:30] + node _T_856 = bits(dccm_wdata_lo_any, 27, 27) @[el2_lib.scala 242:36] + _T_773[14] <= _T_856 @[el2_lib.scala 242:30] + node _T_857 = bits(dccm_wdata_lo_any, 28, 28) @[el2_lib.scala 239:36] + _T_770[15] <= _T_857 @[el2_lib.scala 239:30] + node _T_858 = bits(dccm_wdata_lo_any, 28, 28) @[el2_lib.scala 240:36] + _T_771[15] <= _T_858 @[el2_lib.scala 240:30] + node _T_859 = bits(dccm_wdata_lo_any, 28, 28) @[el2_lib.scala 241:36] + _T_772[15] <= _T_859 @[el2_lib.scala 241:30] + node _T_860 = bits(dccm_wdata_lo_any, 29, 29) @[el2_lib.scala 240:36] + _T_771[16] <= _T_860 @[el2_lib.scala 240:30] + node _T_861 = bits(dccm_wdata_lo_any, 29, 29) @[el2_lib.scala 241:36] + _T_772[16] <= _T_861 @[el2_lib.scala 241:30] + node _T_862 = bits(dccm_wdata_lo_any, 30, 30) @[el2_lib.scala 239:36] + _T_770[16] <= _T_862 @[el2_lib.scala 239:30] + node _T_863 = bits(dccm_wdata_lo_any, 30, 30) @[el2_lib.scala 241:36] + _T_772[17] <= _T_863 @[el2_lib.scala 241:30] + node _T_864 = bits(dccm_wdata_lo_any, 31, 31) @[el2_lib.scala 239:36] + _T_770[17] <= _T_864 @[el2_lib.scala 239:30] + node _T_865 = bits(dccm_wdata_lo_any, 31, 31) @[el2_lib.scala 240:36] + _T_771[17] <= _T_865 @[el2_lib.scala 240:30] + node _T_866 = cat(_T_770[1], _T_770[0]) @[el2_lib.scala 246:22] + node _T_867 = cat(_T_770[3], _T_770[2]) @[el2_lib.scala 246:22] + node _T_868 = cat(_T_867, _T_866) @[el2_lib.scala 246:22] + node _T_869 = cat(_T_770[5], _T_770[4]) @[el2_lib.scala 246:22] + node _T_870 = cat(_T_770[8], _T_770[7]) @[el2_lib.scala 246:22] + node _T_871 = cat(_T_870, _T_770[6]) @[el2_lib.scala 246:22] + node _T_872 = cat(_T_871, _T_869) @[el2_lib.scala 246:22] + node _T_873 = cat(_T_872, _T_868) @[el2_lib.scala 246:22] + node _T_874 = cat(_T_770[10], _T_770[9]) @[el2_lib.scala 246:22] + node _T_875 = cat(_T_770[12], _T_770[11]) @[el2_lib.scala 246:22] + node _T_876 = cat(_T_875, _T_874) @[el2_lib.scala 246:22] + node _T_877 = cat(_T_770[14], _T_770[13]) @[el2_lib.scala 246:22] + node _T_878 = cat(_T_770[17], _T_770[16]) @[el2_lib.scala 246:22] + node _T_879 = cat(_T_878, _T_770[15]) @[el2_lib.scala 246:22] + node _T_880 = cat(_T_879, _T_877) @[el2_lib.scala 246:22] + node _T_881 = cat(_T_880, _T_876) @[el2_lib.scala 246:22] + node _T_882 = cat(_T_881, _T_873) @[el2_lib.scala 246:22] + node _T_883 = xorr(_T_882) @[el2_lib.scala 246:29] + node _T_884 = cat(_T_771[1], _T_771[0]) @[el2_lib.scala 246:39] + node _T_885 = cat(_T_771[3], _T_771[2]) @[el2_lib.scala 246:39] + node _T_886 = cat(_T_885, _T_884) @[el2_lib.scala 246:39] + node _T_887 = cat(_T_771[5], _T_771[4]) @[el2_lib.scala 246:39] + node _T_888 = cat(_T_771[8], _T_771[7]) @[el2_lib.scala 246:39] + node _T_889 = cat(_T_888, _T_771[6]) @[el2_lib.scala 246:39] + node _T_890 = cat(_T_889, _T_887) @[el2_lib.scala 246:39] + node _T_891 = cat(_T_890, _T_886) @[el2_lib.scala 246:39] + node _T_892 = cat(_T_771[10], _T_771[9]) @[el2_lib.scala 246:39] + node _T_893 = cat(_T_771[12], _T_771[11]) @[el2_lib.scala 246:39] + node _T_894 = cat(_T_893, _T_892) @[el2_lib.scala 246:39] + node _T_895 = cat(_T_771[14], _T_771[13]) @[el2_lib.scala 246:39] + node _T_896 = cat(_T_771[17], _T_771[16]) @[el2_lib.scala 246:39] + node _T_897 = cat(_T_896, _T_771[15]) @[el2_lib.scala 246:39] + node _T_898 = cat(_T_897, _T_895) @[el2_lib.scala 246:39] + node _T_899 = cat(_T_898, _T_894) @[el2_lib.scala 246:39] + node _T_900 = cat(_T_899, _T_891) @[el2_lib.scala 246:39] + node _T_901 = xorr(_T_900) @[el2_lib.scala 246:46] + node _T_902 = cat(_T_772[1], _T_772[0]) @[el2_lib.scala 246:56] + node _T_903 = cat(_T_772[3], _T_772[2]) @[el2_lib.scala 246:56] + node _T_904 = cat(_T_903, _T_902) @[el2_lib.scala 246:56] + node _T_905 = cat(_T_772[5], _T_772[4]) @[el2_lib.scala 246:56] + node _T_906 = cat(_T_772[8], _T_772[7]) @[el2_lib.scala 246:56] + node _T_907 = cat(_T_906, _T_772[6]) @[el2_lib.scala 246:56] + node _T_908 = cat(_T_907, _T_905) @[el2_lib.scala 246:56] + node _T_909 = cat(_T_908, _T_904) @[el2_lib.scala 246:56] + node _T_910 = cat(_T_772[10], _T_772[9]) @[el2_lib.scala 246:56] + node _T_911 = cat(_T_772[12], _T_772[11]) @[el2_lib.scala 246:56] + node _T_912 = cat(_T_911, _T_910) @[el2_lib.scala 246:56] + node _T_913 = cat(_T_772[14], _T_772[13]) @[el2_lib.scala 246:56] + node _T_914 = cat(_T_772[17], _T_772[16]) @[el2_lib.scala 246:56] + node _T_915 = cat(_T_914, _T_772[15]) @[el2_lib.scala 246:56] + node _T_916 = cat(_T_915, _T_913) @[el2_lib.scala 246:56] + node _T_917 = cat(_T_916, _T_912) @[el2_lib.scala 246:56] + node _T_918 = cat(_T_917, _T_909) @[el2_lib.scala 246:56] + node _T_919 = xorr(_T_918) @[el2_lib.scala 246:63] + node _T_920 = cat(_T_773[2], _T_773[1]) @[el2_lib.scala 246:73] + node _T_921 = cat(_T_920, _T_773[0]) @[el2_lib.scala 246:73] + node _T_922 = cat(_T_773[4], _T_773[3]) @[el2_lib.scala 246:73] + node _T_923 = cat(_T_773[6], _T_773[5]) @[el2_lib.scala 246:73] + node _T_924 = cat(_T_923, _T_922) @[el2_lib.scala 246:73] + node _T_925 = cat(_T_924, _T_921) @[el2_lib.scala 246:73] + node _T_926 = cat(_T_773[8], _T_773[7]) @[el2_lib.scala 246:73] + node _T_927 = cat(_T_773[10], _T_773[9]) @[el2_lib.scala 246:73] + node _T_928 = cat(_T_927, _T_926) @[el2_lib.scala 246:73] + node _T_929 = cat(_T_773[12], _T_773[11]) @[el2_lib.scala 246:73] + node _T_930 = cat(_T_773[14], _T_773[13]) @[el2_lib.scala 246:73] + node _T_931 = cat(_T_930, _T_929) @[el2_lib.scala 246:73] + node _T_932 = cat(_T_931, _T_928) @[el2_lib.scala 246:73] + node _T_933 = cat(_T_932, _T_925) @[el2_lib.scala 246:73] + node _T_934 = xorr(_T_933) @[el2_lib.scala 246:80] + node _T_935 = cat(_T_774[2], _T_774[1]) @[el2_lib.scala 246:90] + node _T_936 = cat(_T_935, _T_774[0]) @[el2_lib.scala 246:90] + node _T_937 = cat(_T_774[4], _T_774[3]) @[el2_lib.scala 246:90] + node _T_938 = cat(_T_774[6], _T_774[5]) @[el2_lib.scala 246:90] + node _T_939 = cat(_T_938, _T_937) @[el2_lib.scala 246:90] + node _T_940 = cat(_T_939, _T_936) @[el2_lib.scala 246:90] + node _T_941 = cat(_T_774[8], _T_774[7]) @[el2_lib.scala 246:90] + node _T_942 = cat(_T_774[10], _T_774[9]) @[el2_lib.scala 246:90] + node _T_943 = cat(_T_942, _T_941) @[el2_lib.scala 246:90] + node _T_944 = cat(_T_774[12], _T_774[11]) @[el2_lib.scala 246:90] + node _T_945 = cat(_T_774[14], _T_774[13]) @[el2_lib.scala 246:90] + node _T_946 = cat(_T_945, _T_944) @[el2_lib.scala 246:90] + node _T_947 = cat(_T_946, _T_943) @[el2_lib.scala 246:90] + node _T_948 = cat(_T_947, _T_940) @[el2_lib.scala 246:90] + node _T_949 = xorr(_T_948) @[el2_lib.scala 246:97] + node _T_950 = cat(_T_775[2], _T_775[1]) @[el2_lib.scala 246:107] + node _T_951 = cat(_T_950, _T_775[0]) @[el2_lib.scala 246:107] + node _T_952 = cat(_T_775[5], _T_775[4]) @[el2_lib.scala 246:107] + node _T_953 = cat(_T_952, _T_775[3]) @[el2_lib.scala 246:107] + node _T_954 = cat(_T_953, _T_951) @[el2_lib.scala 246:107] + node _T_955 = xorr(_T_954) @[el2_lib.scala 246:114] + node _T_956 = cat(_T_934, _T_949) @[Cat.scala 29:58] + node _T_957 = cat(_T_956, _T_955) @[Cat.scala 29:58] + node _T_958 = cat(_T_883, _T_901) @[Cat.scala 29:58] + node _T_959 = cat(_T_958, _T_919) @[Cat.scala 29:58] + node _T_960 = cat(_T_959, _T_957) @[Cat.scala 29:58] + node _T_961 = xorr(dccm_wdata_lo_any) @[el2_lib.scala 247:13] + node _T_962 = xorr(_T_960) @[el2_lib.scala 247:23] + node _T_963 = xor(_T_961, _T_962) @[el2_lib.scala 247:18] + node lsu_ecc_encode_lo = cat(_T_963, _T_960) @[Cat.scala 29:58] + wire _T_964 : UInt<1>[18] @[el2_lib.scala 228:18] + wire _T_965 : UInt<1>[18] @[el2_lib.scala 229:18] + wire _T_966 : UInt<1>[18] @[el2_lib.scala 230:18] + wire _T_967 : UInt<1>[15] @[el2_lib.scala 231:18] + wire _T_968 : UInt<1>[15] @[el2_lib.scala 232:18] + wire _T_969 : UInt<1>[6] @[el2_lib.scala 233:18] + node _T_970 = bits(dccm_wdata_hi_any, 0, 0) @[el2_lib.scala 240:36] + _T_965[0] <= _T_970 @[el2_lib.scala 240:30] + node _T_971 = bits(dccm_wdata_hi_any, 0, 0) @[el2_lib.scala 241:36] + _T_966[0] <= _T_971 @[el2_lib.scala 241:30] + node _T_972 = bits(dccm_wdata_hi_any, 0, 0) @[el2_lib.scala 244:36] + _T_969[0] <= _T_972 @[el2_lib.scala 244:30] + node _T_973 = bits(dccm_wdata_hi_any, 1, 1) @[el2_lib.scala 239:36] + _T_964[0] <= _T_973 @[el2_lib.scala 239:30] + node _T_974 = bits(dccm_wdata_hi_any, 1, 1) @[el2_lib.scala 241:36] + _T_966[1] <= _T_974 @[el2_lib.scala 241:30] + node _T_975 = bits(dccm_wdata_hi_any, 1, 1) @[el2_lib.scala 244:36] + _T_969[1] <= _T_975 @[el2_lib.scala 244:30] + node _T_976 = bits(dccm_wdata_hi_any, 2, 2) @[el2_lib.scala 241:36] + _T_966[2] <= _T_976 @[el2_lib.scala 241:30] + node _T_977 = bits(dccm_wdata_hi_any, 2, 2) @[el2_lib.scala 244:36] + _T_969[2] <= _T_977 @[el2_lib.scala 244:30] + node _T_978 = bits(dccm_wdata_hi_any, 3, 3) @[el2_lib.scala 239:36] + _T_964[1] <= _T_978 @[el2_lib.scala 239:30] + node _T_979 = bits(dccm_wdata_hi_any, 3, 3) @[el2_lib.scala 240:36] + _T_965[1] <= _T_979 @[el2_lib.scala 240:30] + node _T_980 = bits(dccm_wdata_hi_any, 3, 3) @[el2_lib.scala 244:36] + _T_969[3] <= _T_980 @[el2_lib.scala 244:30] + node _T_981 = bits(dccm_wdata_hi_any, 4, 4) @[el2_lib.scala 240:36] + _T_965[2] <= _T_981 @[el2_lib.scala 240:30] + node _T_982 = bits(dccm_wdata_hi_any, 4, 4) @[el2_lib.scala 244:36] + _T_969[4] <= _T_982 @[el2_lib.scala 244:30] + node _T_983 = bits(dccm_wdata_hi_any, 5, 5) @[el2_lib.scala 239:36] + _T_964[2] <= _T_983 @[el2_lib.scala 239:30] + node _T_984 = bits(dccm_wdata_hi_any, 5, 5) @[el2_lib.scala 244:36] + _T_969[5] <= _T_984 @[el2_lib.scala 244:30] + node _T_985 = bits(dccm_wdata_hi_any, 6, 6) @[el2_lib.scala 239:36] + _T_964[3] <= _T_985 @[el2_lib.scala 239:30] + node _T_986 = bits(dccm_wdata_hi_any, 6, 6) @[el2_lib.scala 240:36] + _T_965[3] <= _T_986 @[el2_lib.scala 240:30] + node _T_987 = bits(dccm_wdata_hi_any, 6, 6) @[el2_lib.scala 241:36] + _T_966[3] <= _T_987 @[el2_lib.scala 241:30] + node _T_988 = bits(dccm_wdata_hi_any, 6, 6) @[el2_lib.scala 242:36] + _T_967[0] <= _T_988 @[el2_lib.scala 242:30] + node _T_989 = bits(dccm_wdata_hi_any, 6, 6) @[el2_lib.scala 243:36] + _T_968[0] <= _T_989 @[el2_lib.scala 243:30] + node _T_990 = bits(dccm_wdata_hi_any, 7, 7) @[el2_lib.scala 240:36] + _T_965[4] <= _T_990 @[el2_lib.scala 240:30] + node _T_991 = bits(dccm_wdata_hi_any, 7, 7) @[el2_lib.scala 241:36] + _T_966[4] <= _T_991 @[el2_lib.scala 241:30] + node _T_992 = bits(dccm_wdata_hi_any, 7, 7) @[el2_lib.scala 242:36] + _T_967[1] <= _T_992 @[el2_lib.scala 242:30] + node _T_993 = bits(dccm_wdata_hi_any, 7, 7) @[el2_lib.scala 243:36] + _T_968[1] <= _T_993 @[el2_lib.scala 243:30] + node _T_994 = bits(dccm_wdata_hi_any, 8, 8) @[el2_lib.scala 239:36] + _T_964[4] <= _T_994 @[el2_lib.scala 239:30] + node _T_995 = bits(dccm_wdata_hi_any, 8, 8) @[el2_lib.scala 241:36] + _T_966[5] <= _T_995 @[el2_lib.scala 241:30] + node _T_996 = bits(dccm_wdata_hi_any, 8, 8) @[el2_lib.scala 242:36] + _T_967[2] <= _T_996 @[el2_lib.scala 242:30] + node _T_997 = bits(dccm_wdata_hi_any, 8, 8) @[el2_lib.scala 243:36] + _T_968[2] <= _T_997 @[el2_lib.scala 243:30] + node _T_998 = bits(dccm_wdata_hi_any, 9, 9) @[el2_lib.scala 241:36] + _T_966[6] <= _T_998 @[el2_lib.scala 241:30] + node _T_999 = bits(dccm_wdata_hi_any, 9, 9) @[el2_lib.scala 242:36] + _T_967[3] <= _T_999 @[el2_lib.scala 242:30] + node _T_1000 = bits(dccm_wdata_hi_any, 9, 9) @[el2_lib.scala 243:36] + _T_968[3] <= _T_1000 @[el2_lib.scala 243:30] + node _T_1001 = bits(dccm_wdata_hi_any, 10, 10) @[el2_lib.scala 239:36] + _T_964[5] <= _T_1001 @[el2_lib.scala 239:30] + node _T_1002 = bits(dccm_wdata_hi_any, 10, 10) @[el2_lib.scala 240:36] + _T_965[5] <= _T_1002 @[el2_lib.scala 240:30] + node _T_1003 = bits(dccm_wdata_hi_any, 10, 10) @[el2_lib.scala 242:36] + _T_967[4] <= _T_1003 @[el2_lib.scala 242:30] + node _T_1004 = bits(dccm_wdata_hi_any, 10, 10) @[el2_lib.scala 243:36] + _T_968[4] <= _T_1004 @[el2_lib.scala 243:30] + node _T_1005 = bits(dccm_wdata_hi_any, 11, 11) @[el2_lib.scala 240:36] + _T_965[6] <= _T_1005 @[el2_lib.scala 240:30] + node _T_1006 = bits(dccm_wdata_hi_any, 11, 11) @[el2_lib.scala 242:36] + _T_967[5] <= _T_1006 @[el2_lib.scala 242:30] + node _T_1007 = bits(dccm_wdata_hi_any, 11, 11) @[el2_lib.scala 243:36] + _T_968[5] <= _T_1007 @[el2_lib.scala 243:30] + node _T_1008 = bits(dccm_wdata_hi_any, 12, 12) @[el2_lib.scala 239:36] + _T_964[6] <= _T_1008 @[el2_lib.scala 239:30] + node _T_1009 = bits(dccm_wdata_hi_any, 12, 12) @[el2_lib.scala 242:36] + _T_967[6] <= _T_1009 @[el2_lib.scala 242:30] + node _T_1010 = bits(dccm_wdata_hi_any, 12, 12) @[el2_lib.scala 243:36] + _T_968[6] <= _T_1010 @[el2_lib.scala 243:30] + node _T_1011 = bits(dccm_wdata_hi_any, 13, 13) @[el2_lib.scala 242:36] + _T_967[7] <= _T_1011 @[el2_lib.scala 242:30] + node _T_1012 = bits(dccm_wdata_hi_any, 13, 13) @[el2_lib.scala 243:36] + _T_968[7] <= _T_1012 @[el2_lib.scala 243:30] + node _T_1013 = bits(dccm_wdata_hi_any, 14, 14) @[el2_lib.scala 239:36] + _T_964[7] <= _T_1013 @[el2_lib.scala 239:30] + node _T_1014 = bits(dccm_wdata_hi_any, 14, 14) @[el2_lib.scala 240:36] + _T_965[7] <= _T_1014 @[el2_lib.scala 240:30] + node _T_1015 = bits(dccm_wdata_hi_any, 14, 14) @[el2_lib.scala 241:36] + _T_966[7] <= _T_1015 @[el2_lib.scala 241:30] + node _T_1016 = bits(dccm_wdata_hi_any, 14, 14) @[el2_lib.scala 243:36] + _T_968[8] <= _T_1016 @[el2_lib.scala 243:30] + node _T_1017 = bits(dccm_wdata_hi_any, 15, 15) @[el2_lib.scala 240:36] + _T_965[8] <= _T_1017 @[el2_lib.scala 240:30] + node _T_1018 = bits(dccm_wdata_hi_any, 15, 15) @[el2_lib.scala 241:36] + _T_966[8] <= _T_1018 @[el2_lib.scala 241:30] + node _T_1019 = bits(dccm_wdata_hi_any, 15, 15) @[el2_lib.scala 243:36] + _T_968[9] <= _T_1019 @[el2_lib.scala 243:30] + node _T_1020 = bits(dccm_wdata_hi_any, 16, 16) @[el2_lib.scala 239:36] + _T_964[8] <= _T_1020 @[el2_lib.scala 239:30] + node _T_1021 = bits(dccm_wdata_hi_any, 16, 16) @[el2_lib.scala 241:36] + _T_966[9] <= _T_1021 @[el2_lib.scala 241:30] + node _T_1022 = bits(dccm_wdata_hi_any, 16, 16) @[el2_lib.scala 243:36] + _T_968[10] <= _T_1022 @[el2_lib.scala 243:30] + node _T_1023 = bits(dccm_wdata_hi_any, 17, 17) @[el2_lib.scala 241:36] + _T_966[10] <= _T_1023 @[el2_lib.scala 241:30] + node _T_1024 = bits(dccm_wdata_hi_any, 17, 17) @[el2_lib.scala 243:36] + _T_968[11] <= _T_1024 @[el2_lib.scala 243:30] + node _T_1025 = bits(dccm_wdata_hi_any, 18, 18) @[el2_lib.scala 239:36] + _T_964[9] <= _T_1025 @[el2_lib.scala 239:30] + node _T_1026 = bits(dccm_wdata_hi_any, 18, 18) @[el2_lib.scala 240:36] + _T_965[9] <= _T_1026 @[el2_lib.scala 240:30] + node _T_1027 = bits(dccm_wdata_hi_any, 18, 18) @[el2_lib.scala 243:36] + _T_968[12] <= _T_1027 @[el2_lib.scala 243:30] + node _T_1028 = bits(dccm_wdata_hi_any, 19, 19) @[el2_lib.scala 240:36] + _T_965[10] <= _T_1028 @[el2_lib.scala 240:30] + node _T_1029 = bits(dccm_wdata_hi_any, 19, 19) @[el2_lib.scala 243:36] + _T_968[13] <= _T_1029 @[el2_lib.scala 243:30] + node _T_1030 = bits(dccm_wdata_hi_any, 20, 20) @[el2_lib.scala 239:36] + _T_964[10] <= _T_1030 @[el2_lib.scala 239:30] + node _T_1031 = bits(dccm_wdata_hi_any, 20, 20) @[el2_lib.scala 243:36] + _T_968[14] <= _T_1031 @[el2_lib.scala 243:30] + node _T_1032 = bits(dccm_wdata_hi_any, 21, 21) @[el2_lib.scala 239:36] + _T_964[11] <= _T_1032 @[el2_lib.scala 239:30] + node _T_1033 = bits(dccm_wdata_hi_any, 21, 21) @[el2_lib.scala 240:36] + _T_965[11] <= _T_1033 @[el2_lib.scala 240:30] + node _T_1034 = bits(dccm_wdata_hi_any, 21, 21) @[el2_lib.scala 241:36] + _T_966[11] <= _T_1034 @[el2_lib.scala 241:30] + node _T_1035 = bits(dccm_wdata_hi_any, 21, 21) @[el2_lib.scala 242:36] + _T_967[8] <= _T_1035 @[el2_lib.scala 242:30] + node _T_1036 = bits(dccm_wdata_hi_any, 22, 22) @[el2_lib.scala 240:36] + _T_965[12] <= _T_1036 @[el2_lib.scala 240:30] + node _T_1037 = bits(dccm_wdata_hi_any, 22, 22) @[el2_lib.scala 241:36] + _T_966[12] <= _T_1037 @[el2_lib.scala 241:30] + node _T_1038 = bits(dccm_wdata_hi_any, 22, 22) @[el2_lib.scala 242:36] + _T_967[9] <= _T_1038 @[el2_lib.scala 242:30] + node _T_1039 = bits(dccm_wdata_hi_any, 23, 23) @[el2_lib.scala 239:36] + _T_964[12] <= _T_1039 @[el2_lib.scala 239:30] + node _T_1040 = bits(dccm_wdata_hi_any, 23, 23) @[el2_lib.scala 241:36] + _T_966[13] <= _T_1040 @[el2_lib.scala 241:30] + node _T_1041 = bits(dccm_wdata_hi_any, 23, 23) @[el2_lib.scala 242:36] + _T_967[10] <= _T_1041 @[el2_lib.scala 242:30] + node _T_1042 = bits(dccm_wdata_hi_any, 24, 24) @[el2_lib.scala 241:36] + _T_966[14] <= _T_1042 @[el2_lib.scala 241:30] + node _T_1043 = bits(dccm_wdata_hi_any, 24, 24) @[el2_lib.scala 242:36] + _T_967[11] <= _T_1043 @[el2_lib.scala 242:30] + node _T_1044 = bits(dccm_wdata_hi_any, 25, 25) @[el2_lib.scala 239:36] + _T_964[13] <= _T_1044 @[el2_lib.scala 239:30] + node _T_1045 = bits(dccm_wdata_hi_any, 25, 25) @[el2_lib.scala 240:36] + _T_965[13] <= _T_1045 @[el2_lib.scala 240:30] + node _T_1046 = bits(dccm_wdata_hi_any, 25, 25) @[el2_lib.scala 242:36] + _T_967[12] <= _T_1046 @[el2_lib.scala 242:30] + node _T_1047 = bits(dccm_wdata_hi_any, 26, 26) @[el2_lib.scala 240:36] + _T_965[14] <= _T_1047 @[el2_lib.scala 240:30] + node _T_1048 = bits(dccm_wdata_hi_any, 26, 26) @[el2_lib.scala 242:36] + _T_967[13] <= _T_1048 @[el2_lib.scala 242:30] + node _T_1049 = bits(dccm_wdata_hi_any, 27, 27) @[el2_lib.scala 239:36] + _T_964[14] <= _T_1049 @[el2_lib.scala 239:30] + node _T_1050 = bits(dccm_wdata_hi_any, 27, 27) @[el2_lib.scala 242:36] + _T_967[14] <= _T_1050 @[el2_lib.scala 242:30] + node _T_1051 = bits(dccm_wdata_hi_any, 28, 28) @[el2_lib.scala 239:36] + _T_964[15] <= _T_1051 @[el2_lib.scala 239:30] + node _T_1052 = bits(dccm_wdata_hi_any, 28, 28) @[el2_lib.scala 240:36] + _T_965[15] <= _T_1052 @[el2_lib.scala 240:30] + node _T_1053 = bits(dccm_wdata_hi_any, 28, 28) @[el2_lib.scala 241:36] + _T_966[15] <= _T_1053 @[el2_lib.scala 241:30] + node _T_1054 = bits(dccm_wdata_hi_any, 29, 29) @[el2_lib.scala 240:36] + _T_965[16] <= _T_1054 @[el2_lib.scala 240:30] + node _T_1055 = bits(dccm_wdata_hi_any, 29, 29) @[el2_lib.scala 241:36] + _T_966[16] <= _T_1055 @[el2_lib.scala 241:30] + node _T_1056 = bits(dccm_wdata_hi_any, 30, 30) @[el2_lib.scala 239:36] + _T_964[16] <= _T_1056 @[el2_lib.scala 239:30] + node _T_1057 = bits(dccm_wdata_hi_any, 30, 30) @[el2_lib.scala 241:36] + _T_966[17] <= _T_1057 @[el2_lib.scala 241:30] + node _T_1058 = bits(dccm_wdata_hi_any, 31, 31) @[el2_lib.scala 239:36] + _T_964[17] <= _T_1058 @[el2_lib.scala 239:30] + node _T_1059 = bits(dccm_wdata_hi_any, 31, 31) @[el2_lib.scala 240:36] + _T_965[17] <= _T_1059 @[el2_lib.scala 240:30] + node _T_1060 = cat(_T_964[1], _T_964[0]) @[el2_lib.scala 246:22] + node _T_1061 = cat(_T_964[3], _T_964[2]) @[el2_lib.scala 246:22] + node _T_1062 = cat(_T_1061, _T_1060) @[el2_lib.scala 246:22] + node _T_1063 = cat(_T_964[5], _T_964[4]) @[el2_lib.scala 246:22] + node _T_1064 = cat(_T_964[8], _T_964[7]) @[el2_lib.scala 246:22] + node _T_1065 = cat(_T_1064, _T_964[6]) @[el2_lib.scala 246:22] + node _T_1066 = cat(_T_1065, _T_1063) @[el2_lib.scala 246:22] + node _T_1067 = cat(_T_1066, _T_1062) @[el2_lib.scala 246:22] + node _T_1068 = cat(_T_964[10], _T_964[9]) @[el2_lib.scala 246:22] + node _T_1069 = cat(_T_964[12], _T_964[11]) @[el2_lib.scala 246:22] + node _T_1070 = cat(_T_1069, _T_1068) @[el2_lib.scala 246:22] + node _T_1071 = cat(_T_964[14], _T_964[13]) @[el2_lib.scala 246:22] + node _T_1072 = cat(_T_964[17], _T_964[16]) @[el2_lib.scala 246:22] + node _T_1073 = cat(_T_1072, _T_964[15]) @[el2_lib.scala 246:22] + node _T_1074 = cat(_T_1073, _T_1071) @[el2_lib.scala 246:22] + node _T_1075 = cat(_T_1074, _T_1070) @[el2_lib.scala 246:22] + node _T_1076 = cat(_T_1075, _T_1067) @[el2_lib.scala 246:22] + node _T_1077 = xorr(_T_1076) @[el2_lib.scala 246:29] + node _T_1078 = cat(_T_965[1], _T_965[0]) @[el2_lib.scala 246:39] + node _T_1079 = cat(_T_965[3], _T_965[2]) @[el2_lib.scala 246:39] + node _T_1080 = cat(_T_1079, _T_1078) @[el2_lib.scala 246:39] + node _T_1081 = cat(_T_965[5], _T_965[4]) @[el2_lib.scala 246:39] + node _T_1082 = cat(_T_965[8], _T_965[7]) @[el2_lib.scala 246:39] + node _T_1083 = cat(_T_1082, _T_965[6]) @[el2_lib.scala 246:39] + node _T_1084 = cat(_T_1083, _T_1081) @[el2_lib.scala 246:39] + node _T_1085 = cat(_T_1084, _T_1080) @[el2_lib.scala 246:39] + node _T_1086 = cat(_T_965[10], _T_965[9]) @[el2_lib.scala 246:39] + node _T_1087 = cat(_T_965[12], _T_965[11]) @[el2_lib.scala 246:39] + node _T_1088 = cat(_T_1087, _T_1086) @[el2_lib.scala 246:39] + node _T_1089 = cat(_T_965[14], _T_965[13]) @[el2_lib.scala 246:39] + node _T_1090 = cat(_T_965[17], _T_965[16]) @[el2_lib.scala 246:39] + node _T_1091 = cat(_T_1090, _T_965[15]) @[el2_lib.scala 246:39] + node _T_1092 = cat(_T_1091, _T_1089) @[el2_lib.scala 246:39] + node _T_1093 = cat(_T_1092, _T_1088) @[el2_lib.scala 246:39] + node _T_1094 = cat(_T_1093, _T_1085) @[el2_lib.scala 246:39] + node _T_1095 = xorr(_T_1094) @[el2_lib.scala 246:46] + node _T_1096 = cat(_T_966[1], _T_966[0]) @[el2_lib.scala 246:56] + node _T_1097 = cat(_T_966[3], _T_966[2]) @[el2_lib.scala 246:56] + node _T_1098 = cat(_T_1097, _T_1096) @[el2_lib.scala 246:56] + node _T_1099 = cat(_T_966[5], _T_966[4]) @[el2_lib.scala 246:56] + node _T_1100 = cat(_T_966[8], _T_966[7]) @[el2_lib.scala 246:56] + node _T_1101 = cat(_T_1100, _T_966[6]) @[el2_lib.scala 246:56] + node _T_1102 = cat(_T_1101, _T_1099) @[el2_lib.scala 246:56] + node _T_1103 = cat(_T_1102, _T_1098) @[el2_lib.scala 246:56] + node _T_1104 = cat(_T_966[10], _T_966[9]) @[el2_lib.scala 246:56] + node _T_1105 = cat(_T_966[12], _T_966[11]) @[el2_lib.scala 246:56] + node _T_1106 = cat(_T_1105, _T_1104) @[el2_lib.scala 246:56] + node _T_1107 = cat(_T_966[14], _T_966[13]) @[el2_lib.scala 246:56] + node _T_1108 = cat(_T_966[17], _T_966[16]) @[el2_lib.scala 246:56] + node _T_1109 = cat(_T_1108, _T_966[15]) @[el2_lib.scala 246:56] + node _T_1110 = cat(_T_1109, _T_1107) @[el2_lib.scala 246:56] + node _T_1111 = cat(_T_1110, _T_1106) @[el2_lib.scala 246:56] + node _T_1112 = cat(_T_1111, _T_1103) @[el2_lib.scala 246:56] + node _T_1113 = xorr(_T_1112) @[el2_lib.scala 246:63] + node _T_1114 = cat(_T_967[2], _T_967[1]) @[el2_lib.scala 246:73] + node _T_1115 = cat(_T_1114, _T_967[0]) @[el2_lib.scala 246:73] + node _T_1116 = cat(_T_967[4], _T_967[3]) @[el2_lib.scala 246:73] + node _T_1117 = cat(_T_967[6], _T_967[5]) @[el2_lib.scala 246:73] + node _T_1118 = cat(_T_1117, _T_1116) @[el2_lib.scala 246:73] + node _T_1119 = cat(_T_1118, _T_1115) @[el2_lib.scala 246:73] + node _T_1120 = cat(_T_967[8], _T_967[7]) @[el2_lib.scala 246:73] + node _T_1121 = cat(_T_967[10], _T_967[9]) @[el2_lib.scala 246:73] + node _T_1122 = cat(_T_1121, _T_1120) @[el2_lib.scala 246:73] + node _T_1123 = cat(_T_967[12], _T_967[11]) @[el2_lib.scala 246:73] + node _T_1124 = cat(_T_967[14], _T_967[13]) @[el2_lib.scala 246:73] + node _T_1125 = cat(_T_1124, _T_1123) @[el2_lib.scala 246:73] + node _T_1126 = cat(_T_1125, _T_1122) @[el2_lib.scala 246:73] + node _T_1127 = cat(_T_1126, _T_1119) @[el2_lib.scala 246:73] + node _T_1128 = xorr(_T_1127) @[el2_lib.scala 246:80] + node _T_1129 = cat(_T_968[2], _T_968[1]) @[el2_lib.scala 246:90] + node _T_1130 = cat(_T_1129, _T_968[0]) @[el2_lib.scala 246:90] + node _T_1131 = cat(_T_968[4], _T_968[3]) @[el2_lib.scala 246:90] + node _T_1132 = cat(_T_968[6], _T_968[5]) @[el2_lib.scala 246:90] + node _T_1133 = cat(_T_1132, _T_1131) @[el2_lib.scala 246:90] + node _T_1134 = cat(_T_1133, _T_1130) @[el2_lib.scala 246:90] + node _T_1135 = cat(_T_968[8], _T_968[7]) @[el2_lib.scala 246:90] + node _T_1136 = cat(_T_968[10], _T_968[9]) @[el2_lib.scala 246:90] + node _T_1137 = cat(_T_1136, _T_1135) @[el2_lib.scala 246:90] + node _T_1138 = cat(_T_968[12], _T_968[11]) @[el2_lib.scala 246:90] + node _T_1139 = cat(_T_968[14], _T_968[13]) @[el2_lib.scala 246:90] + node _T_1140 = cat(_T_1139, _T_1138) @[el2_lib.scala 246:90] + node _T_1141 = cat(_T_1140, _T_1137) @[el2_lib.scala 246:90] + node _T_1142 = cat(_T_1141, _T_1134) @[el2_lib.scala 246:90] + node _T_1143 = xorr(_T_1142) @[el2_lib.scala 246:97] + node _T_1144 = cat(_T_969[2], _T_969[1]) @[el2_lib.scala 246:107] + node _T_1145 = cat(_T_1144, _T_969[0]) @[el2_lib.scala 246:107] + node _T_1146 = cat(_T_969[5], _T_969[4]) @[el2_lib.scala 246:107] + node _T_1147 = cat(_T_1146, _T_969[3]) @[el2_lib.scala 246:107] + node _T_1148 = cat(_T_1147, _T_1145) @[el2_lib.scala 246:107] + node _T_1149 = xorr(_T_1148) @[el2_lib.scala 246:114] + node _T_1150 = cat(_T_1128, _T_1143) @[Cat.scala 29:58] + node _T_1151 = cat(_T_1150, _T_1149) @[Cat.scala 29:58] + node _T_1152 = cat(_T_1077, _T_1095) @[Cat.scala 29:58] + node _T_1153 = cat(_T_1152, _T_1113) @[Cat.scala 29:58] + node _T_1154 = cat(_T_1153, _T_1151) @[Cat.scala 29:58] + node _T_1155 = xorr(dccm_wdata_hi_any) @[el2_lib.scala 247:13] + node _T_1156 = xorr(_T_1154) @[el2_lib.scala 247:23] + node _T_1157 = xor(_T_1155, _T_1156) @[el2_lib.scala 247:18] + node lsu_ecc_encode_hi = cat(_T_1157, _T_1154) @[Cat.scala 29:58] + when UInt<1>("h00") : @[el2_lsu_ecc.scala 101:32] + node _T_1158 = bits(io.lsu_addr_r, 2, 2) @[el2_lsu_ecc.scala 102:35] + node _T_1159 = bits(io.end_addr_r, 2, 2) @[el2_lsu_ecc.scala 102:56] + node _T_1160 = neq(_T_1158, _T_1159) @[el2_lsu_ecc.scala 102:39] + ldst_dual_r <= _T_1160 @[el2_lsu_ecc.scala 102:19] + node _T_1161 = or(io.lsu_pkt_r.load, io.lsu_pkt_r.store) @[el2_lsu_ecc.scala 103:60] + node _T_1162 = and(io.lsu_pkt_r.valid, _T_1161) @[el2_lsu_ecc.scala 103:39] + node _T_1163 = and(_T_1162, io.addr_in_dccm_r) @[el2_lsu_ecc.scala 103:82] + node _T_1164 = and(_T_1163, io.lsu_dccm_rden_r) @[el2_lsu_ecc.scala 103:102] + is_ldst_r <= _T_1164 @[el2_lsu_ecc.scala 103:17] + node _T_1165 = eq(io.dec_tlu_core_ecc_disable, UInt<1>("h00")) @[el2_lsu_ecc.scala 104:35] + node _T_1166 = and(is_ldst_r, _T_1165) @[el2_lsu_ecc.scala 104:33] + is_ldst_lo_r <= _T_1166 @[el2_lsu_ecc.scala 104:20] + node _T_1167 = or(ldst_dual_r, io.lsu_pkt_r.dma) @[el2_lsu_ecc.scala 105:48] + node _T_1168 = and(is_ldst_r, _T_1167) @[el2_lsu_ecc.scala 105:33] + node _T_1169 = eq(io.dec_tlu_core_ecc_disable, UInt<1>("h00")) @[el2_lsu_ecc.scala 105:70] + node _T_1170 = and(_T_1168, _T_1169) @[el2_lsu_ecc.scala 105:68] + is_ldst_hi_r <= _T_1170 @[el2_lsu_ecc.scala 105:20] + is_ldst_hi_any <= is_ldst_hi_r @[el2_lsu_ecc.scala 106:23] + dccm_rdata_hi_any <= io.dccm_rdata_hi_r @[el2_lsu_ecc.scala 107:26] + dccm_data_ecc_hi_any <= io.dccm_data_ecc_hi_r @[el2_lsu_ecc.scala 108:28] + is_ldst_lo_any <= is_ldst_lo_r @[el2_lsu_ecc.scala 109:22] + dccm_rdata_lo_any <= io.dccm_rdata_lo_r @[el2_lsu_ecc.scala 110:27] + dccm_data_ecc_lo_any <= io.dccm_data_ecc_lo_r @[el2_lsu_ecc.scala 111:28] + io.sec_data_hi_r <= sec_data_hi_any @[el2_lsu_ecc.scala 112:24] + io.single_ecc_error_hi_r <= single_ecc_error_hi_any @[el2_lsu_ecc.scala 113:33] + double_ecc_error_hi_r <= double_ecc_error_hi_any @[el2_lsu_ecc.scala 114:30] + io.sec_data_lo_r <= sec_data_lo_any @[el2_lsu_ecc.scala 115:27] + io.single_ecc_error_lo_r <= single_ecc_error_lo_any @[el2_lsu_ecc.scala 116:33] + double_ecc_error_lo_r <= double_ecc_error_lo_any @[el2_lsu_ecc.scala 117:30] + node _T_1171 = or(io.single_ecc_error_hi_r, io.single_ecc_error_lo_r) @[el2_lsu_ecc.scala 118:61] + io.lsu_single_ecc_error_r <= _T_1171 @[el2_lsu_ecc.scala 118:33] + node _T_1172 = or(double_ecc_error_hi_r, double_ecc_error_lo_r) @[el2_lsu_ecc.scala 119:58] + io.lsu_double_ecc_error_r <= _T_1172 @[el2_lsu_ecc.scala 119:33] + skip @[el2_lsu_ecc.scala 101:32] + else : @[el2_lsu_ecc.scala 121:16] + node _T_1173 = bits(io.lsu_addr_m, 2, 2) @[el2_lsu_ecc.scala 122:35] + node _T_1174 = bits(io.end_addr_m, 2, 2) @[el2_lsu_ecc.scala 122:56] + node _T_1175 = neq(_T_1173, _T_1174) @[el2_lsu_ecc.scala 122:39] + ldst_dual_m <= _T_1175 @[el2_lsu_ecc.scala 122:19] + node _T_1176 = or(io.lsu_pkt_m.load, io.lsu_pkt_m.store) @[el2_lsu_ecc.scala 123:60] + node _T_1177 = and(io.lsu_pkt_m.valid, _T_1176) @[el2_lsu_ecc.scala 123:39] + node _T_1178 = and(_T_1177, io.addr_in_dccm_m) @[el2_lsu_ecc.scala 123:82] + node _T_1179 = and(_T_1178, io.lsu_dccm_rden_m) @[el2_lsu_ecc.scala 123:102] + is_ldst_m <= _T_1179 @[el2_lsu_ecc.scala 123:17] + node _T_1180 = eq(io.dec_tlu_core_ecc_disable, UInt<1>("h00")) @[el2_lsu_ecc.scala 124:35] + node _T_1181 = and(is_ldst_m, _T_1180) @[el2_lsu_ecc.scala 124:33] + is_ldst_lo_m <= _T_1181 @[el2_lsu_ecc.scala 124:20] + node _T_1182 = or(ldst_dual_m, io.lsu_pkt_m.dma) @[el2_lsu_ecc.scala 125:48] + node _T_1183 = and(is_ldst_m, _T_1182) @[el2_lsu_ecc.scala 125:33] + node _T_1184 = eq(io.dec_tlu_core_ecc_disable, UInt<1>("h00")) @[el2_lsu_ecc.scala 125:70] + node _T_1185 = and(_T_1183, _T_1184) @[el2_lsu_ecc.scala 125:68] + is_ldst_hi_m <= _T_1185 @[el2_lsu_ecc.scala 125:20] + is_ldst_hi_any <= is_ldst_hi_m @[el2_lsu_ecc.scala 126:23] + dccm_rdata_hi_any <= io.dccm_rdata_hi_m @[el2_lsu_ecc.scala 127:26] + dccm_data_ecc_hi_any <= io.dccm_data_ecc_hi_m @[el2_lsu_ecc.scala 128:28] + is_ldst_lo_any <= is_ldst_lo_m @[el2_lsu_ecc.scala 129:22] + dccm_rdata_lo_any <= io.dccm_rdata_lo_m @[el2_lsu_ecc.scala 130:27] + dccm_data_ecc_lo_any <= io.dccm_data_ecc_lo_m @[el2_lsu_ecc.scala 131:28] + io.sec_data_hi_m <= sec_data_hi_any @[el2_lsu_ecc.scala 132:27] + double_ecc_error_hi_m <= double_ecc_error_hi_any @[el2_lsu_ecc.scala 133:30] + io.sec_data_lo_m <= sec_data_lo_any @[el2_lsu_ecc.scala 134:27] + double_ecc_error_lo_m <= double_ecc_error_lo_any @[el2_lsu_ecc.scala 135:30] + node _T_1186 = or(single_ecc_error_hi_any, single_ecc_error_lo_any) @[el2_lsu_ecc.scala 136:60] + io.lsu_single_ecc_error_m <= _T_1186 @[el2_lsu_ecc.scala 136:33] + node _T_1187 = or(double_ecc_error_hi_m, double_ecc_error_lo_m) @[el2_lsu_ecc.scala 137:58] + io.lsu_double_ecc_error_m <= _T_1187 @[el2_lsu_ecc.scala 137:33] + reg _T_1188 : UInt<1>, io.lsu_c2_r_clk @[el2_lsu_ecc.scala 139:72] + _T_1188 <= io.lsu_single_ecc_error_m @[el2_lsu_ecc.scala 139:72] + io.lsu_single_ecc_error_r <= _T_1188 @[el2_lsu_ecc.scala 139:62] + reg _T_1189 : UInt<1>, io.lsu_c2_r_clk @[el2_lsu_ecc.scala 140:72] + _T_1189 <= io.lsu_double_ecc_error_m @[el2_lsu_ecc.scala 140:72] + io.lsu_double_ecc_error_r <= _T_1189 @[el2_lsu_ecc.scala 140:62] + reg _T_1190 : UInt, io.lsu_c2_r_clk @[el2_lsu_ecc.scala 141:72] + _T_1190 <= single_ecc_error_lo_any @[el2_lsu_ecc.scala 141:72] + io.single_ecc_error_lo_r <= _T_1190 @[el2_lsu_ecc.scala 141:62] + reg _T_1191 : UInt, io.lsu_c2_r_clk @[el2_lsu_ecc.scala 142:72] + _T_1191 <= single_ecc_error_hi_any @[el2_lsu_ecc.scala 142:72] + io.single_ecc_error_hi_r <= _T_1191 @[el2_lsu_ecc.scala 142:62] + reg _T_1192 : UInt, io.lsu_c2_r_clk @[el2_lsu_ecc.scala 143:72] + _T_1192 <= io.sec_data_hi_m @[el2_lsu_ecc.scala 143:72] + io.sec_data_hi_r <= _T_1192 @[el2_lsu_ecc.scala 143:62] + reg _T_1193 : UInt, io.lsu_c2_r_clk @[el2_lsu_ecc.scala 144:72] + _T_1193 <= io.sec_data_lo_m @[el2_lsu_ecc.scala 144:72] + io.sec_data_lo_r <= _T_1193 @[el2_lsu_ecc.scala 144:62] + skip @[el2_lsu_ecc.scala 121:16] + node _T_1194 = bits(io.ld_single_ecc_error_r_ff, 0, 0) @[el2_lsu_ecc.scala 147:58] + node _T_1195 = bits(io.dma_dccm_wen, 0, 0) @[el2_lsu_ecc.scala 147:106] + node _T_1196 = mux(_T_1195, io.dma_dccm_wdata_lo, io.stbuf_data_any) @[el2_lsu_ecc.scala 147:89] + node _T_1197 = mux(_T_1194, io.sec_data_lo_r_ff, _T_1196) @[el2_lsu_ecc.scala 147:29] + dccm_wdata_lo_any <= _T_1197 @[el2_lsu_ecc.scala 147:23] + node _T_1198 = bits(io.ld_single_ecc_error_r_ff, 0, 0) @[el2_lsu_ecc.scala 148:58] + node _T_1199 = bits(io.dma_dccm_wen, 0, 0) @[el2_lsu_ecc.scala 148:106] + node _T_1200 = mux(_T_1199, io.dma_dccm_wdata_hi, io.stbuf_data_any) @[el2_lsu_ecc.scala 148:89] + node _T_1201 = mux(_T_1198, io.sec_data_hi_r_ff, _T_1200) @[el2_lsu_ecc.scala 148:29] + dccm_wdata_hi_any <= _T_1201 @[el2_lsu_ecc.scala 148:23] + io.sec_data_ecc_hi_r_ff <= dccm_wdata_ecc_hi_any @[el2_lsu_ecc.scala 149:30] + io.sec_data_ecc_lo_r_ff <= dccm_wdata_ecc_lo_any @[el2_lsu_ecc.scala 150:30] + io.stbuf_ecc_any <= dccm_wdata_ecc_lo_any @[el2_lsu_ecc.scala 151:30] + io.dma_dccm_wdata_ecc_hi <= dccm_wdata_ecc_hi_any @[el2_lsu_ecc.scala 152:30] + io.dma_dccm_wdata_ecc_lo <= dccm_wdata_ecc_lo_any @[el2_lsu_ecc.scala 153:30] + reg _T_1202 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when io.ld_single_ecc_error_r : @[Reg.scala 28:19] + _T_1202 <= io.sec_data_hi_r @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + io.sec_data_hi_r_ff <= _T_1202 @[el2_lsu_ecc.scala 155:23] + reg _T_1203 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when io.ld_single_ecc_error_r : @[Reg.scala 28:19] + _T_1203 <= io.sec_data_lo_r @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + io.sec_data_lo_r_ff <= _T_1203 @[el2_lsu_ecc.scala 156:23] + + module el2_lsu_trigger : + input clock : Clock + input reset : Reset + output io : {flip trigger_pkt_any : {select : UInt<1>, match_ : UInt<1>, store : UInt<1>, load : UInt<1>, execute : UInt<1>, m : UInt<1>, tdata2 : UInt<32>}[4], flip lsu_pkt_m : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip lsu_addr_m : UInt<32>, flip store_data_m : UInt<32>, lsu_trigger_match_m : UInt<4>} + + io.lsu_trigger_match_m <= UInt<1>("h00") @[el2_lsu_trigger.scala 15:25] + node _T = bits(io.lsu_pkt_m.word, 0, 0) @[Bitwise.scala 72:15] + node _T_1 = mux(_T, UInt<16>("h0ffff"), UInt<16>("h00")) @[Bitwise.scala 72:12] + node _T_2 = bits(io.store_data_m, 31, 16) @[el2_lsu_trigger.scala 17:77] + node _T_3 = and(_T_1, _T_2) @[el2_lsu_trigger.scala 17:60] + node _T_4 = or(io.lsu_pkt_m.half, io.lsu_pkt_m.word) @[el2_lsu_trigger.scala 17:110] + node _T_5 = bits(_T_4, 0, 0) @[Bitwise.scala 72:15] + node _T_6 = mux(_T_5, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_7 = bits(io.store_data_m, 15, 8) @[el2_lsu_trigger.scala 17:148] + node _T_8 = and(_T_6, _T_7) @[el2_lsu_trigger.scala 17:131] + node _T_9 = bits(io.store_data_m, 7, 0) @[el2_lsu_trigger.scala 17:171] + node _T_10 = cat(_T_3, _T_8) @[Cat.scala 29:58] + node store_data_trigger_m = cat(_T_10, _T_9) @[Cat.scala 29:58] + node _T_11 = bits(io.trigger_pkt_any[0].select, 0, 0) @[el2_lsu_trigger.scala 24:137] + node _T_12 = eq(_T_11, UInt<1>("h00")) @[el2_lsu_trigger.scala 24:107] + node _T_13 = and(io.trigger_pkt_any[0].select, io.trigger_pkt_any[0].store) @[el2_lsu_trigger.scala 25:35] + node _T_14 = bits(_T_13, 0, 0) @[el2_lsu_trigger.scala 25:66] + node _T_15 = mux(_T_12, io.lsu_addr_m, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_16 = mux(_T_14, store_data_trigger_m, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_17 = or(_T_15, _T_16) @[Mux.scala 27:72] + wire _T_18 : UInt<32> @[Mux.scala 27:72] + _T_18 <= _T_17 @[Mux.scala 27:72] + node _T_19 = bits(io.trigger_pkt_any[0].match_, 0, 0) @[el2_lsu_trigger.scala 25:133] + wire _T_20 : UInt<1>[32] @[el2_lib.scala 193:24] + node _T_21 = bits(_T_19, 0, 0) @[el2_lib.scala 194:37] + node _T_22 = bits(io.trigger_pkt_any[0].tdata2, 31, 0) @[el2_lib.scala 194:53] + node _T_23 = andr(_T_22) @[el2_lib.scala 194:73] + node _T_24 = not(_T_23) @[el2_lib.scala 194:47] + node _T_25 = and(_T_21, _T_24) @[el2_lib.scala 194:44] + node _T_26 = bits(io.trigger_pkt_any[0].tdata2, 0, 0) @[el2_lib.scala 195:48] + node _T_27 = bits(_T_18, 0, 0) @[el2_lib.scala 195:60] + node _T_28 = eq(_T_26, _T_27) @[el2_lib.scala 195:52] + node _T_29 = or(_T_25, _T_28) @[el2_lib.scala 195:41] + _T_20[0] <= _T_29 @[el2_lib.scala 195:18] + node _T_30 = bits(io.trigger_pkt_any[0].tdata2, 0, 0) @[el2_lib.scala 197:29] + node _T_31 = andr(_T_30) @[el2_lib.scala 197:37] + node _T_32 = and(_T_31, _T_25) @[el2_lib.scala 197:42] + node _T_33 = bits(io.trigger_pkt_any[0].tdata2, 1, 1) @[el2_lib.scala 197:75] + node _T_34 = bits(_T_18, 1, 1) @[el2_lib.scala 197:87] + node _T_35 = eq(_T_33, _T_34) @[el2_lib.scala 197:79] + node _T_36 = mux(_T_32, UInt<1>("h01"), _T_35) @[el2_lib.scala 197:24] + _T_20[1] <= _T_36 @[el2_lib.scala 197:18] + node _T_37 = bits(io.trigger_pkt_any[0].tdata2, 1, 0) @[el2_lib.scala 197:29] + node _T_38 = andr(_T_37) @[el2_lib.scala 197:37] + node _T_39 = and(_T_38, _T_25) @[el2_lib.scala 197:42] + node _T_40 = bits(io.trigger_pkt_any[0].tdata2, 2, 2) @[el2_lib.scala 197:75] + node _T_41 = bits(_T_18, 2, 2) @[el2_lib.scala 197:87] + node _T_42 = eq(_T_40, _T_41) @[el2_lib.scala 197:79] + node _T_43 = mux(_T_39, UInt<1>("h01"), _T_42) @[el2_lib.scala 197:24] + _T_20[2] <= _T_43 @[el2_lib.scala 197:18] + node _T_44 = bits(io.trigger_pkt_any[0].tdata2, 2, 0) @[el2_lib.scala 197:29] + node _T_45 = andr(_T_44) @[el2_lib.scala 197:37] + node _T_46 = and(_T_45, _T_25) @[el2_lib.scala 197:42] + node _T_47 = bits(io.trigger_pkt_any[0].tdata2, 3, 3) @[el2_lib.scala 197:75] + node _T_48 = bits(_T_18, 3, 3) @[el2_lib.scala 197:87] + node _T_49 = eq(_T_47, _T_48) @[el2_lib.scala 197:79] + node _T_50 = mux(_T_46, UInt<1>("h01"), _T_49) @[el2_lib.scala 197:24] + _T_20[3] <= _T_50 @[el2_lib.scala 197:18] + node _T_51 = bits(io.trigger_pkt_any[0].tdata2, 3, 0) @[el2_lib.scala 197:29] + node _T_52 = andr(_T_51) @[el2_lib.scala 197:37] + node _T_53 = and(_T_52, _T_25) @[el2_lib.scala 197:42] + node _T_54 = bits(io.trigger_pkt_any[0].tdata2, 4, 4) @[el2_lib.scala 197:75] + node _T_55 = bits(_T_18, 4, 4) @[el2_lib.scala 197:87] + node _T_56 = eq(_T_54, _T_55) @[el2_lib.scala 197:79] + node _T_57 = mux(_T_53, UInt<1>("h01"), _T_56) @[el2_lib.scala 197:24] + _T_20[4] <= _T_57 @[el2_lib.scala 197:18] + node _T_58 = bits(io.trigger_pkt_any[0].tdata2, 4, 0) @[el2_lib.scala 197:29] + node _T_59 = andr(_T_58) @[el2_lib.scala 197:37] + node _T_60 = and(_T_59, _T_25) @[el2_lib.scala 197:42] + node _T_61 = bits(io.trigger_pkt_any[0].tdata2, 5, 5) @[el2_lib.scala 197:75] + node _T_62 = bits(_T_18, 5, 5) @[el2_lib.scala 197:87] + node _T_63 = eq(_T_61, _T_62) @[el2_lib.scala 197:79] + node _T_64 = mux(_T_60, UInt<1>("h01"), _T_63) @[el2_lib.scala 197:24] + _T_20[5] <= _T_64 @[el2_lib.scala 197:18] + node _T_65 = bits(io.trigger_pkt_any[0].tdata2, 5, 0) @[el2_lib.scala 197:29] + node _T_66 = andr(_T_65) @[el2_lib.scala 197:37] + node _T_67 = and(_T_66, _T_25) @[el2_lib.scala 197:42] + node _T_68 = bits(io.trigger_pkt_any[0].tdata2, 6, 6) @[el2_lib.scala 197:75] + node _T_69 = bits(_T_18, 6, 6) @[el2_lib.scala 197:87] + node _T_70 = eq(_T_68, _T_69) @[el2_lib.scala 197:79] + node _T_71 = mux(_T_67, UInt<1>("h01"), _T_70) @[el2_lib.scala 197:24] + _T_20[6] <= _T_71 @[el2_lib.scala 197:18] + node _T_72 = bits(io.trigger_pkt_any[0].tdata2, 6, 0) @[el2_lib.scala 197:29] + node _T_73 = andr(_T_72) @[el2_lib.scala 197:37] + node _T_74 = and(_T_73, _T_25) @[el2_lib.scala 197:42] + node _T_75 = bits(io.trigger_pkt_any[0].tdata2, 7, 7) @[el2_lib.scala 197:75] + node _T_76 = bits(_T_18, 7, 7) @[el2_lib.scala 197:87] + node _T_77 = eq(_T_75, _T_76) @[el2_lib.scala 197:79] + node _T_78 = mux(_T_74, UInt<1>("h01"), _T_77) @[el2_lib.scala 197:24] + _T_20[7] <= _T_78 @[el2_lib.scala 197:18] + node _T_79 = bits(io.trigger_pkt_any[0].tdata2, 7, 0) @[el2_lib.scala 197:29] + node _T_80 = andr(_T_79) @[el2_lib.scala 197:37] + node _T_81 = and(_T_80, _T_25) @[el2_lib.scala 197:42] + node _T_82 = bits(io.trigger_pkt_any[0].tdata2, 8, 8) @[el2_lib.scala 197:75] + node _T_83 = bits(_T_18, 8, 8) @[el2_lib.scala 197:87] + node _T_84 = eq(_T_82, _T_83) @[el2_lib.scala 197:79] + node _T_85 = mux(_T_81, UInt<1>("h01"), _T_84) @[el2_lib.scala 197:24] + _T_20[8] <= _T_85 @[el2_lib.scala 197:18] + node _T_86 = bits(io.trigger_pkt_any[0].tdata2, 8, 0) @[el2_lib.scala 197:29] + node _T_87 = andr(_T_86) @[el2_lib.scala 197:37] + node _T_88 = and(_T_87, _T_25) @[el2_lib.scala 197:42] + node _T_89 = bits(io.trigger_pkt_any[0].tdata2, 9, 9) @[el2_lib.scala 197:75] + node _T_90 = bits(_T_18, 9, 9) @[el2_lib.scala 197:87] + node _T_91 = eq(_T_89, _T_90) @[el2_lib.scala 197:79] + node _T_92 = mux(_T_88, UInt<1>("h01"), _T_91) @[el2_lib.scala 197:24] + _T_20[9] <= _T_92 @[el2_lib.scala 197:18] + node _T_93 = bits(io.trigger_pkt_any[0].tdata2, 9, 0) @[el2_lib.scala 197:29] + node _T_94 = andr(_T_93) @[el2_lib.scala 197:37] + node _T_95 = and(_T_94, _T_25) @[el2_lib.scala 197:42] + node _T_96 = bits(io.trigger_pkt_any[0].tdata2, 10, 10) @[el2_lib.scala 197:75] + node _T_97 = bits(_T_18, 10, 10) @[el2_lib.scala 197:87] + node _T_98 = eq(_T_96, _T_97) @[el2_lib.scala 197:79] + node _T_99 = mux(_T_95, UInt<1>("h01"), _T_98) @[el2_lib.scala 197:24] + _T_20[10] <= _T_99 @[el2_lib.scala 197:18] + node _T_100 = bits(io.trigger_pkt_any[0].tdata2, 10, 0) @[el2_lib.scala 197:29] + node _T_101 = andr(_T_100) @[el2_lib.scala 197:37] + node _T_102 = and(_T_101, _T_25) @[el2_lib.scala 197:42] + node _T_103 = bits(io.trigger_pkt_any[0].tdata2, 11, 11) @[el2_lib.scala 197:75] + node _T_104 = bits(_T_18, 11, 11) @[el2_lib.scala 197:87] + node _T_105 = eq(_T_103, _T_104) @[el2_lib.scala 197:79] + node _T_106 = mux(_T_102, UInt<1>("h01"), _T_105) @[el2_lib.scala 197:24] + _T_20[11] <= _T_106 @[el2_lib.scala 197:18] + node _T_107 = bits(io.trigger_pkt_any[0].tdata2, 11, 0) @[el2_lib.scala 197:29] + node _T_108 = andr(_T_107) @[el2_lib.scala 197:37] + node _T_109 = and(_T_108, _T_25) @[el2_lib.scala 197:42] + node _T_110 = bits(io.trigger_pkt_any[0].tdata2, 12, 12) @[el2_lib.scala 197:75] + node _T_111 = bits(_T_18, 12, 12) @[el2_lib.scala 197:87] + node _T_112 = eq(_T_110, _T_111) @[el2_lib.scala 197:79] + node _T_113 = mux(_T_109, UInt<1>("h01"), _T_112) @[el2_lib.scala 197:24] + _T_20[12] <= _T_113 @[el2_lib.scala 197:18] + node _T_114 = bits(io.trigger_pkt_any[0].tdata2, 12, 0) @[el2_lib.scala 197:29] + node _T_115 = andr(_T_114) @[el2_lib.scala 197:37] + node _T_116 = and(_T_115, _T_25) @[el2_lib.scala 197:42] + node _T_117 = bits(io.trigger_pkt_any[0].tdata2, 13, 13) @[el2_lib.scala 197:75] + node _T_118 = bits(_T_18, 13, 13) @[el2_lib.scala 197:87] + node _T_119 = eq(_T_117, _T_118) @[el2_lib.scala 197:79] + node _T_120 = mux(_T_116, UInt<1>("h01"), _T_119) @[el2_lib.scala 197:24] + _T_20[13] <= _T_120 @[el2_lib.scala 197:18] + node _T_121 = bits(io.trigger_pkt_any[0].tdata2, 13, 0) @[el2_lib.scala 197:29] + node _T_122 = andr(_T_121) @[el2_lib.scala 197:37] + node _T_123 = and(_T_122, _T_25) @[el2_lib.scala 197:42] + node _T_124 = bits(io.trigger_pkt_any[0].tdata2, 14, 14) @[el2_lib.scala 197:75] + node _T_125 = bits(_T_18, 14, 14) @[el2_lib.scala 197:87] + node _T_126 = eq(_T_124, _T_125) @[el2_lib.scala 197:79] + node _T_127 = mux(_T_123, UInt<1>("h01"), _T_126) @[el2_lib.scala 197:24] + _T_20[14] <= _T_127 @[el2_lib.scala 197:18] + node _T_128 = bits(io.trigger_pkt_any[0].tdata2, 14, 0) @[el2_lib.scala 197:29] + node _T_129 = andr(_T_128) @[el2_lib.scala 197:37] + node _T_130 = and(_T_129, _T_25) @[el2_lib.scala 197:42] + node _T_131 = bits(io.trigger_pkt_any[0].tdata2, 15, 15) @[el2_lib.scala 197:75] + node _T_132 = bits(_T_18, 15, 15) @[el2_lib.scala 197:87] + node _T_133 = eq(_T_131, _T_132) @[el2_lib.scala 197:79] + node _T_134 = mux(_T_130, UInt<1>("h01"), _T_133) @[el2_lib.scala 197:24] + _T_20[15] <= _T_134 @[el2_lib.scala 197:18] + node _T_135 = bits(io.trigger_pkt_any[0].tdata2, 15, 0) @[el2_lib.scala 197:29] + node _T_136 = andr(_T_135) @[el2_lib.scala 197:37] + node _T_137 = and(_T_136, _T_25) @[el2_lib.scala 197:42] + node _T_138 = bits(io.trigger_pkt_any[0].tdata2, 16, 16) @[el2_lib.scala 197:75] + node _T_139 = bits(_T_18, 16, 16) @[el2_lib.scala 197:87] + node _T_140 = eq(_T_138, _T_139) @[el2_lib.scala 197:79] + node _T_141 = mux(_T_137, UInt<1>("h01"), _T_140) @[el2_lib.scala 197:24] + _T_20[16] <= _T_141 @[el2_lib.scala 197:18] + node _T_142 = bits(io.trigger_pkt_any[0].tdata2, 16, 0) @[el2_lib.scala 197:29] + node _T_143 = andr(_T_142) @[el2_lib.scala 197:37] + node _T_144 = and(_T_143, _T_25) @[el2_lib.scala 197:42] + node _T_145 = bits(io.trigger_pkt_any[0].tdata2, 17, 17) @[el2_lib.scala 197:75] + node _T_146 = bits(_T_18, 17, 17) @[el2_lib.scala 197:87] + node _T_147 = eq(_T_145, _T_146) @[el2_lib.scala 197:79] + node _T_148 = mux(_T_144, UInt<1>("h01"), _T_147) @[el2_lib.scala 197:24] + _T_20[17] <= _T_148 @[el2_lib.scala 197:18] + node _T_149 = bits(io.trigger_pkt_any[0].tdata2, 17, 0) @[el2_lib.scala 197:29] + node _T_150 = andr(_T_149) @[el2_lib.scala 197:37] + node _T_151 = and(_T_150, _T_25) @[el2_lib.scala 197:42] + node _T_152 = bits(io.trigger_pkt_any[0].tdata2, 18, 18) @[el2_lib.scala 197:75] + node _T_153 = bits(_T_18, 18, 18) @[el2_lib.scala 197:87] + node _T_154 = eq(_T_152, _T_153) @[el2_lib.scala 197:79] + node _T_155 = mux(_T_151, UInt<1>("h01"), _T_154) @[el2_lib.scala 197:24] + _T_20[18] <= _T_155 @[el2_lib.scala 197:18] + node _T_156 = bits(io.trigger_pkt_any[0].tdata2, 18, 0) @[el2_lib.scala 197:29] + node _T_157 = andr(_T_156) @[el2_lib.scala 197:37] + node _T_158 = and(_T_157, _T_25) @[el2_lib.scala 197:42] + node _T_159 = bits(io.trigger_pkt_any[0].tdata2, 19, 19) @[el2_lib.scala 197:75] + node _T_160 = bits(_T_18, 19, 19) @[el2_lib.scala 197:87] + node _T_161 = eq(_T_159, _T_160) @[el2_lib.scala 197:79] + node _T_162 = mux(_T_158, UInt<1>("h01"), _T_161) @[el2_lib.scala 197:24] + _T_20[19] <= _T_162 @[el2_lib.scala 197:18] + node _T_163 = bits(io.trigger_pkt_any[0].tdata2, 19, 0) @[el2_lib.scala 197:29] + node _T_164 = andr(_T_163) @[el2_lib.scala 197:37] + node _T_165 = and(_T_164, _T_25) @[el2_lib.scala 197:42] + node _T_166 = bits(io.trigger_pkt_any[0].tdata2, 20, 20) @[el2_lib.scala 197:75] + node _T_167 = bits(_T_18, 20, 20) @[el2_lib.scala 197:87] + node _T_168 = eq(_T_166, _T_167) @[el2_lib.scala 197:79] + node _T_169 = mux(_T_165, UInt<1>("h01"), _T_168) @[el2_lib.scala 197:24] + _T_20[20] <= _T_169 @[el2_lib.scala 197:18] + node _T_170 = bits(io.trigger_pkt_any[0].tdata2, 20, 0) @[el2_lib.scala 197:29] + node _T_171 = andr(_T_170) @[el2_lib.scala 197:37] + node _T_172 = and(_T_171, _T_25) @[el2_lib.scala 197:42] + node _T_173 = bits(io.trigger_pkt_any[0].tdata2, 21, 21) @[el2_lib.scala 197:75] + node _T_174 = bits(_T_18, 21, 21) @[el2_lib.scala 197:87] + node _T_175 = eq(_T_173, _T_174) @[el2_lib.scala 197:79] + node _T_176 = mux(_T_172, UInt<1>("h01"), _T_175) @[el2_lib.scala 197:24] + _T_20[21] <= _T_176 @[el2_lib.scala 197:18] + node _T_177 = bits(io.trigger_pkt_any[0].tdata2, 21, 0) @[el2_lib.scala 197:29] + node _T_178 = andr(_T_177) @[el2_lib.scala 197:37] + node _T_179 = and(_T_178, _T_25) @[el2_lib.scala 197:42] + node _T_180 = bits(io.trigger_pkt_any[0].tdata2, 22, 22) @[el2_lib.scala 197:75] + node _T_181 = bits(_T_18, 22, 22) @[el2_lib.scala 197:87] + node _T_182 = eq(_T_180, _T_181) @[el2_lib.scala 197:79] + node _T_183 = mux(_T_179, UInt<1>("h01"), _T_182) @[el2_lib.scala 197:24] + _T_20[22] <= _T_183 @[el2_lib.scala 197:18] + node _T_184 = bits(io.trigger_pkt_any[0].tdata2, 22, 0) @[el2_lib.scala 197:29] + node _T_185 = andr(_T_184) @[el2_lib.scala 197:37] + node _T_186 = and(_T_185, _T_25) @[el2_lib.scala 197:42] + node _T_187 = bits(io.trigger_pkt_any[0].tdata2, 23, 23) @[el2_lib.scala 197:75] + node _T_188 = bits(_T_18, 23, 23) @[el2_lib.scala 197:87] + node _T_189 = eq(_T_187, _T_188) @[el2_lib.scala 197:79] + node _T_190 = mux(_T_186, UInt<1>("h01"), _T_189) @[el2_lib.scala 197:24] + _T_20[23] <= _T_190 @[el2_lib.scala 197:18] + node _T_191 = bits(io.trigger_pkt_any[0].tdata2, 23, 0) @[el2_lib.scala 197:29] + node _T_192 = andr(_T_191) @[el2_lib.scala 197:37] + node _T_193 = and(_T_192, _T_25) @[el2_lib.scala 197:42] + node _T_194 = bits(io.trigger_pkt_any[0].tdata2, 24, 24) @[el2_lib.scala 197:75] + node _T_195 = bits(_T_18, 24, 24) @[el2_lib.scala 197:87] + node _T_196 = eq(_T_194, _T_195) @[el2_lib.scala 197:79] + node _T_197 = mux(_T_193, UInt<1>("h01"), _T_196) @[el2_lib.scala 197:24] + _T_20[24] <= _T_197 @[el2_lib.scala 197:18] + node _T_198 = bits(io.trigger_pkt_any[0].tdata2, 24, 0) @[el2_lib.scala 197:29] + node _T_199 = andr(_T_198) @[el2_lib.scala 197:37] + node _T_200 = and(_T_199, _T_25) @[el2_lib.scala 197:42] + node _T_201 = bits(io.trigger_pkt_any[0].tdata2, 25, 25) @[el2_lib.scala 197:75] + node _T_202 = bits(_T_18, 25, 25) @[el2_lib.scala 197:87] + node _T_203 = eq(_T_201, _T_202) @[el2_lib.scala 197:79] + node _T_204 = mux(_T_200, UInt<1>("h01"), _T_203) @[el2_lib.scala 197:24] + _T_20[25] <= _T_204 @[el2_lib.scala 197:18] + node _T_205 = bits(io.trigger_pkt_any[0].tdata2, 25, 0) @[el2_lib.scala 197:29] + node _T_206 = andr(_T_205) @[el2_lib.scala 197:37] + node _T_207 = and(_T_206, _T_25) @[el2_lib.scala 197:42] + node _T_208 = bits(io.trigger_pkt_any[0].tdata2, 26, 26) @[el2_lib.scala 197:75] + node _T_209 = bits(_T_18, 26, 26) @[el2_lib.scala 197:87] + node _T_210 = eq(_T_208, _T_209) @[el2_lib.scala 197:79] + node _T_211 = mux(_T_207, UInt<1>("h01"), _T_210) @[el2_lib.scala 197:24] + _T_20[26] <= _T_211 @[el2_lib.scala 197:18] + node _T_212 = bits(io.trigger_pkt_any[0].tdata2, 26, 0) @[el2_lib.scala 197:29] + node _T_213 = andr(_T_212) @[el2_lib.scala 197:37] + node _T_214 = and(_T_213, _T_25) @[el2_lib.scala 197:42] + node _T_215 = bits(io.trigger_pkt_any[0].tdata2, 27, 27) @[el2_lib.scala 197:75] + node _T_216 = bits(_T_18, 27, 27) @[el2_lib.scala 197:87] + node _T_217 = eq(_T_215, _T_216) @[el2_lib.scala 197:79] + node _T_218 = mux(_T_214, UInt<1>("h01"), _T_217) @[el2_lib.scala 197:24] + _T_20[27] <= _T_218 @[el2_lib.scala 197:18] + node _T_219 = bits(io.trigger_pkt_any[0].tdata2, 27, 0) @[el2_lib.scala 197:29] + node _T_220 = andr(_T_219) @[el2_lib.scala 197:37] + node _T_221 = and(_T_220, _T_25) @[el2_lib.scala 197:42] + node _T_222 = bits(io.trigger_pkt_any[0].tdata2, 28, 28) @[el2_lib.scala 197:75] + node _T_223 = bits(_T_18, 28, 28) @[el2_lib.scala 197:87] + node _T_224 = eq(_T_222, _T_223) @[el2_lib.scala 197:79] + node _T_225 = mux(_T_221, UInt<1>("h01"), _T_224) @[el2_lib.scala 197:24] + _T_20[28] <= _T_225 @[el2_lib.scala 197:18] + node _T_226 = bits(io.trigger_pkt_any[0].tdata2, 28, 0) @[el2_lib.scala 197:29] + node _T_227 = andr(_T_226) @[el2_lib.scala 197:37] + node _T_228 = and(_T_227, _T_25) @[el2_lib.scala 197:42] + node _T_229 = bits(io.trigger_pkt_any[0].tdata2, 29, 29) @[el2_lib.scala 197:75] + node _T_230 = bits(_T_18, 29, 29) @[el2_lib.scala 197:87] + node _T_231 = eq(_T_229, _T_230) @[el2_lib.scala 197:79] + node _T_232 = mux(_T_228, UInt<1>("h01"), _T_231) @[el2_lib.scala 197:24] + _T_20[29] <= _T_232 @[el2_lib.scala 197:18] + node _T_233 = bits(io.trigger_pkt_any[0].tdata2, 29, 0) @[el2_lib.scala 197:29] + node _T_234 = andr(_T_233) @[el2_lib.scala 197:37] + node _T_235 = and(_T_234, _T_25) @[el2_lib.scala 197:42] + node _T_236 = bits(io.trigger_pkt_any[0].tdata2, 30, 30) @[el2_lib.scala 197:75] + node _T_237 = bits(_T_18, 30, 30) @[el2_lib.scala 197:87] + node _T_238 = eq(_T_236, _T_237) @[el2_lib.scala 197:79] + node _T_239 = mux(_T_235, UInt<1>("h01"), _T_238) @[el2_lib.scala 197:24] + _T_20[30] <= _T_239 @[el2_lib.scala 197:18] + node _T_240 = bits(io.trigger_pkt_any[0].tdata2, 30, 0) @[el2_lib.scala 197:29] + node _T_241 = andr(_T_240) @[el2_lib.scala 197:37] + node _T_242 = and(_T_241, _T_25) @[el2_lib.scala 197:42] + node _T_243 = bits(io.trigger_pkt_any[0].tdata2, 31, 31) @[el2_lib.scala 197:75] + node _T_244 = bits(_T_18, 31, 31) @[el2_lib.scala 197:87] + node _T_245 = eq(_T_243, _T_244) @[el2_lib.scala 197:79] + node _T_246 = mux(_T_242, UInt<1>("h01"), _T_245) @[el2_lib.scala 197:24] + _T_20[31] <= _T_246 @[el2_lib.scala 197:18] + node _T_247 = cat(_T_20[1], _T_20[0]) @[el2_lib.scala 198:14] + node _T_248 = cat(_T_20[3], _T_20[2]) @[el2_lib.scala 198:14] + node _T_249 = cat(_T_248, _T_247) @[el2_lib.scala 198:14] + node _T_250 = cat(_T_20[5], _T_20[4]) @[el2_lib.scala 198:14] + node _T_251 = cat(_T_20[7], _T_20[6]) @[el2_lib.scala 198:14] + node _T_252 = cat(_T_251, _T_250) @[el2_lib.scala 198:14] + node _T_253 = cat(_T_252, _T_249) @[el2_lib.scala 198:14] + node _T_254 = cat(_T_20[9], _T_20[8]) @[el2_lib.scala 198:14] + node _T_255 = cat(_T_20[11], _T_20[10]) @[el2_lib.scala 198:14] + node _T_256 = cat(_T_255, _T_254) @[el2_lib.scala 198:14] + node _T_257 = cat(_T_20[13], _T_20[12]) @[el2_lib.scala 198:14] + node _T_258 = cat(_T_20[15], _T_20[14]) @[el2_lib.scala 198:14] + node _T_259 = cat(_T_258, _T_257) @[el2_lib.scala 198:14] + node _T_260 = cat(_T_259, _T_256) @[el2_lib.scala 198:14] + node _T_261 = cat(_T_260, _T_253) @[el2_lib.scala 198:14] + node _T_262 = cat(_T_20[17], _T_20[16]) @[el2_lib.scala 198:14] + node _T_263 = cat(_T_20[19], _T_20[18]) @[el2_lib.scala 198:14] + node _T_264 = cat(_T_263, _T_262) @[el2_lib.scala 198:14] + node _T_265 = cat(_T_20[21], _T_20[20]) @[el2_lib.scala 198:14] + node _T_266 = cat(_T_20[23], _T_20[22]) @[el2_lib.scala 198:14] + node _T_267 = cat(_T_266, _T_265) @[el2_lib.scala 198:14] + node _T_268 = cat(_T_267, _T_264) @[el2_lib.scala 198:14] + node _T_269 = cat(_T_20[25], _T_20[24]) @[el2_lib.scala 198:14] + node _T_270 = cat(_T_20[27], _T_20[26]) @[el2_lib.scala 198:14] + node _T_271 = cat(_T_270, _T_269) @[el2_lib.scala 198:14] + node _T_272 = cat(_T_20[29], _T_20[28]) @[el2_lib.scala 198:14] + node _T_273 = cat(_T_20[31], _T_20[30]) @[el2_lib.scala 198:14] + node _T_274 = cat(_T_273, _T_272) @[el2_lib.scala 198:14] + node _T_275 = cat(_T_274, _T_271) @[el2_lib.scala 198:14] + node _T_276 = cat(_T_275, _T_268) @[el2_lib.scala 198:14] + node _T_277 = cat(_T_276, _T_261) @[el2_lib.scala 198:14] + node lsu_trigger_data_match_0 = andr(_T_277) @[el2_lib.scala 198:21] + node _T_278 = bits(io.trigger_pkt_any[1].select, 0, 0) @[el2_lsu_trigger.scala 24:137] + node _T_279 = eq(_T_278, UInt<1>("h00")) @[el2_lsu_trigger.scala 24:107] + node _T_280 = and(io.trigger_pkt_any[1].select, io.trigger_pkt_any[1].store) @[el2_lsu_trigger.scala 25:35] + node _T_281 = bits(_T_280, 0, 0) @[el2_lsu_trigger.scala 25:66] + node _T_282 = mux(_T_279, io.lsu_addr_m, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_283 = mux(_T_281, store_data_trigger_m, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_284 = or(_T_282, _T_283) @[Mux.scala 27:72] + wire _T_285 : UInt<32> @[Mux.scala 27:72] + _T_285 <= _T_284 @[Mux.scala 27:72] + node _T_286 = bits(io.trigger_pkt_any[1].match_, 0, 0) @[el2_lsu_trigger.scala 25:133] + wire _T_287 : UInt<1>[32] @[el2_lib.scala 193:24] + node _T_288 = bits(_T_286, 0, 0) @[el2_lib.scala 194:37] + node _T_289 = bits(io.trigger_pkt_any[1].tdata2, 31, 0) @[el2_lib.scala 194:53] + node _T_290 = andr(_T_289) @[el2_lib.scala 194:73] + node _T_291 = not(_T_290) @[el2_lib.scala 194:47] + node _T_292 = and(_T_288, _T_291) @[el2_lib.scala 194:44] + node _T_293 = bits(io.trigger_pkt_any[1].tdata2, 0, 0) @[el2_lib.scala 195:48] + node _T_294 = bits(_T_285, 0, 0) @[el2_lib.scala 195:60] + node _T_295 = eq(_T_293, _T_294) @[el2_lib.scala 195:52] + node _T_296 = or(_T_292, _T_295) @[el2_lib.scala 195:41] + _T_287[0] <= _T_296 @[el2_lib.scala 195:18] + node _T_297 = bits(io.trigger_pkt_any[1].tdata2, 0, 0) @[el2_lib.scala 197:29] + node _T_298 = andr(_T_297) @[el2_lib.scala 197:37] + node _T_299 = and(_T_298, _T_292) @[el2_lib.scala 197:42] + node _T_300 = bits(io.trigger_pkt_any[1].tdata2, 1, 1) @[el2_lib.scala 197:75] + node _T_301 = bits(_T_285, 1, 1) @[el2_lib.scala 197:87] + node _T_302 = eq(_T_300, _T_301) @[el2_lib.scala 197:79] + node _T_303 = mux(_T_299, UInt<1>("h01"), _T_302) @[el2_lib.scala 197:24] + _T_287[1] <= _T_303 @[el2_lib.scala 197:18] + node _T_304 = bits(io.trigger_pkt_any[1].tdata2, 1, 0) @[el2_lib.scala 197:29] + node _T_305 = andr(_T_304) @[el2_lib.scala 197:37] + node _T_306 = and(_T_305, _T_292) @[el2_lib.scala 197:42] + node _T_307 = bits(io.trigger_pkt_any[1].tdata2, 2, 2) @[el2_lib.scala 197:75] + node _T_308 = bits(_T_285, 2, 2) @[el2_lib.scala 197:87] + node _T_309 = eq(_T_307, _T_308) @[el2_lib.scala 197:79] + node _T_310 = mux(_T_306, UInt<1>("h01"), _T_309) @[el2_lib.scala 197:24] + _T_287[2] <= _T_310 @[el2_lib.scala 197:18] + node _T_311 = bits(io.trigger_pkt_any[1].tdata2, 2, 0) @[el2_lib.scala 197:29] + node _T_312 = andr(_T_311) @[el2_lib.scala 197:37] + node _T_313 = and(_T_312, _T_292) @[el2_lib.scala 197:42] + node _T_314 = bits(io.trigger_pkt_any[1].tdata2, 3, 3) @[el2_lib.scala 197:75] + node _T_315 = bits(_T_285, 3, 3) @[el2_lib.scala 197:87] + node _T_316 = eq(_T_314, _T_315) @[el2_lib.scala 197:79] + node _T_317 = mux(_T_313, UInt<1>("h01"), _T_316) @[el2_lib.scala 197:24] + _T_287[3] <= _T_317 @[el2_lib.scala 197:18] + node _T_318 = bits(io.trigger_pkt_any[1].tdata2, 3, 0) @[el2_lib.scala 197:29] + node _T_319 = andr(_T_318) @[el2_lib.scala 197:37] + node _T_320 = and(_T_319, _T_292) @[el2_lib.scala 197:42] + node _T_321 = bits(io.trigger_pkt_any[1].tdata2, 4, 4) @[el2_lib.scala 197:75] + node _T_322 = bits(_T_285, 4, 4) @[el2_lib.scala 197:87] + node _T_323 = eq(_T_321, _T_322) @[el2_lib.scala 197:79] + node _T_324 = mux(_T_320, UInt<1>("h01"), _T_323) @[el2_lib.scala 197:24] + _T_287[4] <= _T_324 @[el2_lib.scala 197:18] + node _T_325 = bits(io.trigger_pkt_any[1].tdata2, 4, 0) @[el2_lib.scala 197:29] + node _T_326 = andr(_T_325) @[el2_lib.scala 197:37] + node _T_327 = and(_T_326, _T_292) @[el2_lib.scala 197:42] + node _T_328 = bits(io.trigger_pkt_any[1].tdata2, 5, 5) @[el2_lib.scala 197:75] + node _T_329 = bits(_T_285, 5, 5) @[el2_lib.scala 197:87] + node _T_330 = eq(_T_328, _T_329) @[el2_lib.scala 197:79] + node _T_331 = mux(_T_327, UInt<1>("h01"), _T_330) @[el2_lib.scala 197:24] + _T_287[5] <= _T_331 @[el2_lib.scala 197:18] + node _T_332 = bits(io.trigger_pkt_any[1].tdata2, 5, 0) @[el2_lib.scala 197:29] + node _T_333 = andr(_T_332) @[el2_lib.scala 197:37] + node _T_334 = and(_T_333, _T_292) @[el2_lib.scala 197:42] + node _T_335 = bits(io.trigger_pkt_any[1].tdata2, 6, 6) @[el2_lib.scala 197:75] + node _T_336 = bits(_T_285, 6, 6) @[el2_lib.scala 197:87] + node _T_337 = eq(_T_335, _T_336) @[el2_lib.scala 197:79] + node _T_338 = mux(_T_334, UInt<1>("h01"), _T_337) @[el2_lib.scala 197:24] + _T_287[6] <= _T_338 @[el2_lib.scala 197:18] + node _T_339 = bits(io.trigger_pkt_any[1].tdata2, 6, 0) @[el2_lib.scala 197:29] + node _T_340 = andr(_T_339) @[el2_lib.scala 197:37] + node _T_341 = and(_T_340, _T_292) @[el2_lib.scala 197:42] + node _T_342 = bits(io.trigger_pkt_any[1].tdata2, 7, 7) @[el2_lib.scala 197:75] + node _T_343 = bits(_T_285, 7, 7) @[el2_lib.scala 197:87] + node _T_344 = eq(_T_342, _T_343) @[el2_lib.scala 197:79] + node _T_345 = mux(_T_341, UInt<1>("h01"), _T_344) @[el2_lib.scala 197:24] + _T_287[7] <= _T_345 @[el2_lib.scala 197:18] + node _T_346 = bits(io.trigger_pkt_any[1].tdata2, 7, 0) @[el2_lib.scala 197:29] + node _T_347 = andr(_T_346) @[el2_lib.scala 197:37] + node _T_348 = and(_T_347, _T_292) @[el2_lib.scala 197:42] + node _T_349 = bits(io.trigger_pkt_any[1].tdata2, 8, 8) @[el2_lib.scala 197:75] + node _T_350 = bits(_T_285, 8, 8) @[el2_lib.scala 197:87] + node _T_351 = eq(_T_349, _T_350) @[el2_lib.scala 197:79] + node _T_352 = mux(_T_348, UInt<1>("h01"), _T_351) @[el2_lib.scala 197:24] + _T_287[8] <= _T_352 @[el2_lib.scala 197:18] + node _T_353 = bits(io.trigger_pkt_any[1].tdata2, 8, 0) @[el2_lib.scala 197:29] + node _T_354 = andr(_T_353) @[el2_lib.scala 197:37] + node _T_355 = and(_T_354, _T_292) @[el2_lib.scala 197:42] + node _T_356 = bits(io.trigger_pkt_any[1].tdata2, 9, 9) @[el2_lib.scala 197:75] + node _T_357 = bits(_T_285, 9, 9) @[el2_lib.scala 197:87] + node _T_358 = eq(_T_356, _T_357) @[el2_lib.scala 197:79] + node _T_359 = mux(_T_355, UInt<1>("h01"), _T_358) @[el2_lib.scala 197:24] + _T_287[9] <= _T_359 @[el2_lib.scala 197:18] + node _T_360 = bits(io.trigger_pkt_any[1].tdata2, 9, 0) @[el2_lib.scala 197:29] + node _T_361 = andr(_T_360) @[el2_lib.scala 197:37] + node _T_362 = and(_T_361, _T_292) @[el2_lib.scala 197:42] + node _T_363 = bits(io.trigger_pkt_any[1].tdata2, 10, 10) @[el2_lib.scala 197:75] + node _T_364 = bits(_T_285, 10, 10) @[el2_lib.scala 197:87] + node _T_365 = eq(_T_363, _T_364) @[el2_lib.scala 197:79] + node _T_366 = mux(_T_362, UInt<1>("h01"), _T_365) @[el2_lib.scala 197:24] + _T_287[10] <= _T_366 @[el2_lib.scala 197:18] + node _T_367 = bits(io.trigger_pkt_any[1].tdata2, 10, 0) @[el2_lib.scala 197:29] + node _T_368 = andr(_T_367) @[el2_lib.scala 197:37] + node _T_369 = and(_T_368, _T_292) @[el2_lib.scala 197:42] + node _T_370 = bits(io.trigger_pkt_any[1].tdata2, 11, 11) @[el2_lib.scala 197:75] + node _T_371 = bits(_T_285, 11, 11) @[el2_lib.scala 197:87] + node _T_372 = eq(_T_370, _T_371) @[el2_lib.scala 197:79] + node _T_373 = mux(_T_369, UInt<1>("h01"), _T_372) @[el2_lib.scala 197:24] + _T_287[11] <= _T_373 @[el2_lib.scala 197:18] + node _T_374 = bits(io.trigger_pkt_any[1].tdata2, 11, 0) @[el2_lib.scala 197:29] + node _T_375 = andr(_T_374) @[el2_lib.scala 197:37] + node _T_376 = and(_T_375, _T_292) @[el2_lib.scala 197:42] + node _T_377 = bits(io.trigger_pkt_any[1].tdata2, 12, 12) @[el2_lib.scala 197:75] + node _T_378 = bits(_T_285, 12, 12) @[el2_lib.scala 197:87] + node _T_379 = eq(_T_377, _T_378) @[el2_lib.scala 197:79] + node _T_380 = mux(_T_376, UInt<1>("h01"), _T_379) @[el2_lib.scala 197:24] + _T_287[12] <= _T_380 @[el2_lib.scala 197:18] + node _T_381 = bits(io.trigger_pkt_any[1].tdata2, 12, 0) @[el2_lib.scala 197:29] + node _T_382 = andr(_T_381) @[el2_lib.scala 197:37] + node _T_383 = and(_T_382, _T_292) @[el2_lib.scala 197:42] + node _T_384 = bits(io.trigger_pkt_any[1].tdata2, 13, 13) @[el2_lib.scala 197:75] + node _T_385 = bits(_T_285, 13, 13) @[el2_lib.scala 197:87] + node _T_386 = eq(_T_384, _T_385) @[el2_lib.scala 197:79] + node _T_387 = mux(_T_383, UInt<1>("h01"), _T_386) @[el2_lib.scala 197:24] + _T_287[13] <= _T_387 @[el2_lib.scala 197:18] + node _T_388 = bits(io.trigger_pkt_any[1].tdata2, 13, 0) @[el2_lib.scala 197:29] + node _T_389 = andr(_T_388) @[el2_lib.scala 197:37] + node _T_390 = and(_T_389, _T_292) @[el2_lib.scala 197:42] + node _T_391 = bits(io.trigger_pkt_any[1].tdata2, 14, 14) @[el2_lib.scala 197:75] + node _T_392 = bits(_T_285, 14, 14) @[el2_lib.scala 197:87] + node _T_393 = eq(_T_391, _T_392) @[el2_lib.scala 197:79] + node _T_394 = mux(_T_390, UInt<1>("h01"), _T_393) @[el2_lib.scala 197:24] + _T_287[14] <= _T_394 @[el2_lib.scala 197:18] + node _T_395 = bits(io.trigger_pkt_any[1].tdata2, 14, 0) @[el2_lib.scala 197:29] + node _T_396 = andr(_T_395) @[el2_lib.scala 197:37] + node _T_397 = and(_T_396, _T_292) @[el2_lib.scala 197:42] + node _T_398 = bits(io.trigger_pkt_any[1].tdata2, 15, 15) @[el2_lib.scala 197:75] + node _T_399 = bits(_T_285, 15, 15) @[el2_lib.scala 197:87] + node _T_400 = eq(_T_398, _T_399) @[el2_lib.scala 197:79] + node _T_401 = mux(_T_397, UInt<1>("h01"), _T_400) @[el2_lib.scala 197:24] + _T_287[15] <= _T_401 @[el2_lib.scala 197:18] + node _T_402 = bits(io.trigger_pkt_any[1].tdata2, 15, 0) @[el2_lib.scala 197:29] + node _T_403 = andr(_T_402) @[el2_lib.scala 197:37] + node _T_404 = and(_T_403, _T_292) @[el2_lib.scala 197:42] + node _T_405 = bits(io.trigger_pkt_any[1].tdata2, 16, 16) @[el2_lib.scala 197:75] + node _T_406 = bits(_T_285, 16, 16) @[el2_lib.scala 197:87] + node _T_407 = eq(_T_405, _T_406) @[el2_lib.scala 197:79] + node _T_408 = mux(_T_404, UInt<1>("h01"), _T_407) @[el2_lib.scala 197:24] + _T_287[16] <= _T_408 @[el2_lib.scala 197:18] + node _T_409 = bits(io.trigger_pkt_any[1].tdata2, 16, 0) @[el2_lib.scala 197:29] + node _T_410 = andr(_T_409) @[el2_lib.scala 197:37] + node _T_411 = and(_T_410, _T_292) @[el2_lib.scala 197:42] + node _T_412 = bits(io.trigger_pkt_any[1].tdata2, 17, 17) @[el2_lib.scala 197:75] + node _T_413 = bits(_T_285, 17, 17) @[el2_lib.scala 197:87] + node _T_414 = eq(_T_412, _T_413) @[el2_lib.scala 197:79] + node _T_415 = mux(_T_411, UInt<1>("h01"), _T_414) @[el2_lib.scala 197:24] + _T_287[17] <= _T_415 @[el2_lib.scala 197:18] + node _T_416 = bits(io.trigger_pkt_any[1].tdata2, 17, 0) @[el2_lib.scala 197:29] + node _T_417 = andr(_T_416) @[el2_lib.scala 197:37] + node _T_418 = and(_T_417, _T_292) @[el2_lib.scala 197:42] + node _T_419 = bits(io.trigger_pkt_any[1].tdata2, 18, 18) @[el2_lib.scala 197:75] + node _T_420 = bits(_T_285, 18, 18) @[el2_lib.scala 197:87] + node _T_421 = eq(_T_419, _T_420) @[el2_lib.scala 197:79] + node _T_422 = mux(_T_418, UInt<1>("h01"), _T_421) @[el2_lib.scala 197:24] + _T_287[18] <= _T_422 @[el2_lib.scala 197:18] + node _T_423 = bits(io.trigger_pkt_any[1].tdata2, 18, 0) @[el2_lib.scala 197:29] + node _T_424 = andr(_T_423) @[el2_lib.scala 197:37] + node _T_425 = and(_T_424, _T_292) @[el2_lib.scala 197:42] + node _T_426 = bits(io.trigger_pkt_any[1].tdata2, 19, 19) @[el2_lib.scala 197:75] + node _T_427 = bits(_T_285, 19, 19) @[el2_lib.scala 197:87] + node _T_428 = eq(_T_426, _T_427) @[el2_lib.scala 197:79] + node _T_429 = mux(_T_425, UInt<1>("h01"), _T_428) @[el2_lib.scala 197:24] + _T_287[19] <= _T_429 @[el2_lib.scala 197:18] + node _T_430 = bits(io.trigger_pkt_any[1].tdata2, 19, 0) @[el2_lib.scala 197:29] + node _T_431 = andr(_T_430) @[el2_lib.scala 197:37] + node _T_432 = and(_T_431, _T_292) @[el2_lib.scala 197:42] + node _T_433 = bits(io.trigger_pkt_any[1].tdata2, 20, 20) @[el2_lib.scala 197:75] + node _T_434 = bits(_T_285, 20, 20) @[el2_lib.scala 197:87] + node _T_435 = eq(_T_433, _T_434) @[el2_lib.scala 197:79] + node _T_436 = mux(_T_432, UInt<1>("h01"), _T_435) @[el2_lib.scala 197:24] + _T_287[20] <= _T_436 @[el2_lib.scala 197:18] + node _T_437 = bits(io.trigger_pkt_any[1].tdata2, 20, 0) @[el2_lib.scala 197:29] + node _T_438 = andr(_T_437) @[el2_lib.scala 197:37] + node _T_439 = and(_T_438, _T_292) @[el2_lib.scala 197:42] + node _T_440 = bits(io.trigger_pkt_any[1].tdata2, 21, 21) @[el2_lib.scala 197:75] + node _T_441 = bits(_T_285, 21, 21) @[el2_lib.scala 197:87] + node _T_442 = eq(_T_440, _T_441) @[el2_lib.scala 197:79] + node _T_443 = mux(_T_439, UInt<1>("h01"), _T_442) @[el2_lib.scala 197:24] + _T_287[21] <= _T_443 @[el2_lib.scala 197:18] + node _T_444 = bits(io.trigger_pkt_any[1].tdata2, 21, 0) @[el2_lib.scala 197:29] + node _T_445 = andr(_T_444) @[el2_lib.scala 197:37] + node _T_446 = and(_T_445, _T_292) @[el2_lib.scala 197:42] + node _T_447 = bits(io.trigger_pkt_any[1].tdata2, 22, 22) @[el2_lib.scala 197:75] + node _T_448 = bits(_T_285, 22, 22) @[el2_lib.scala 197:87] + node _T_449 = eq(_T_447, _T_448) @[el2_lib.scala 197:79] + node _T_450 = mux(_T_446, UInt<1>("h01"), _T_449) @[el2_lib.scala 197:24] + _T_287[22] <= _T_450 @[el2_lib.scala 197:18] + node _T_451 = bits(io.trigger_pkt_any[1].tdata2, 22, 0) @[el2_lib.scala 197:29] + node _T_452 = andr(_T_451) @[el2_lib.scala 197:37] + node _T_453 = and(_T_452, _T_292) @[el2_lib.scala 197:42] + node _T_454 = bits(io.trigger_pkt_any[1].tdata2, 23, 23) @[el2_lib.scala 197:75] + node _T_455 = bits(_T_285, 23, 23) @[el2_lib.scala 197:87] + node _T_456 = eq(_T_454, _T_455) @[el2_lib.scala 197:79] + node _T_457 = mux(_T_453, UInt<1>("h01"), _T_456) @[el2_lib.scala 197:24] + _T_287[23] <= _T_457 @[el2_lib.scala 197:18] + node _T_458 = bits(io.trigger_pkt_any[1].tdata2, 23, 0) @[el2_lib.scala 197:29] + node _T_459 = andr(_T_458) @[el2_lib.scala 197:37] + node _T_460 = and(_T_459, _T_292) @[el2_lib.scala 197:42] + node _T_461 = bits(io.trigger_pkt_any[1].tdata2, 24, 24) @[el2_lib.scala 197:75] + node _T_462 = bits(_T_285, 24, 24) @[el2_lib.scala 197:87] + node _T_463 = eq(_T_461, _T_462) @[el2_lib.scala 197:79] + node _T_464 = mux(_T_460, UInt<1>("h01"), _T_463) @[el2_lib.scala 197:24] + _T_287[24] <= _T_464 @[el2_lib.scala 197:18] + node _T_465 = bits(io.trigger_pkt_any[1].tdata2, 24, 0) @[el2_lib.scala 197:29] + node _T_466 = andr(_T_465) @[el2_lib.scala 197:37] + node _T_467 = and(_T_466, _T_292) @[el2_lib.scala 197:42] + node _T_468 = bits(io.trigger_pkt_any[1].tdata2, 25, 25) @[el2_lib.scala 197:75] + node _T_469 = bits(_T_285, 25, 25) @[el2_lib.scala 197:87] + node _T_470 = eq(_T_468, _T_469) @[el2_lib.scala 197:79] + node _T_471 = mux(_T_467, UInt<1>("h01"), _T_470) @[el2_lib.scala 197:24] + _T_287[25] <= _T_471 @[el2_lib.scala 197:18] + node _T_472 = bits(io.trigger_pkt_any[1].tdata2, 25, 0) @[el2_lib.scala 197:29] + node _T_473 = andr(_T_472) @[el2_lib.scala 197:37] + node _T_474 = and(_T_473, _T_292) @[el2_lib.scala 197:42] + node _T_475 = bits(io.trigger_pkt_any[1].tdata2, 26, 26) @[el2_lib.scala 197:75] + node _T_476 = bits(_T_285, 26, 26) @[el2_lib.scala 197:87] + node _T_477 = eq(_T_475, _T_476) @[el2_lib.scala 197:79] + node _T_478 = mux(_T_474, UInt<1>("h01"), _T_477) @[el2_lib.scala 197:24] + _T_287[26] <= _T_478 @[el2_lib.scala 197:18] + node _T_479 = bits(io.trigger_pkt_any[1].tdata2, 26, 0) @[el2_lib.scala 197:29] + node _T_480 = andr(_T_479) @[el2_lib.scala 197:37] + node _T_481 = and(_T_480, _T_292) @[el2_lib.scala 197:42] + node _T_482 = bits(io.trigger_pkt_any[1].tdata2, 27, 27) @[el2_lib.scala 197:75] + node _T_483 = bits(_T_285, 27, 27) @[el2_lib.scala 197:87] + node _T_484 = eq(_T_482, _T_483) @[el2_lib.scala 197:79] + node _T_485 = mux(_T_481, UInt<1>("h01"), _T_484) @[el2_lib.scala 197:24] + _T_287[27] <= _T_485 @[el2_lib.scala 197:18] + node _T_486 = bits(io.trigger_pkt_any[1].tdata2, 27, 0) @[el2_lib.scala 197:29] + node _T_487 = andr(_T_486) @[el2_lib.scala 197:37] + node _T_488 = and(_T_487, _T_292) @[el2_lib.scala 197:42] + node _T_489 = bits(io.trigger_pkt_any[1].tdata2, 28, 28) @[el2_lib.scala 197:75] + node _T_490 = bits(_T_285, 28, 28) @[el2_lib.scala 197:87] + node _T_491 = eq(_T_489, _T_490) @[el2_lib.scala 197:79] + node _T_492 = mux(_T_488, UInt<1>("h01"), _T_491) @[el2_lib.scala 197:24] + _T_287[28] <= _T_492 @[el2_lib.scala 197:18] + node _T_493 = bits(io.trigger_pkt_any[1].tdata2, 28, 0) @[el2_lib.scala 197:29] + node _T_494 = andr(_T_493) @[el2_lib.scala 197:37] + node _T_495 = and(_T_494, _T_292) @[el2_lib.scala 197:42] + node _T_496 = bits(io.trigger_pkt_any[1].tdata2, 29, 29) @[el2_lib.scala 197:75] + node _T_497 = bits(_T_285, 29, 29) @[el2_lib.scala 197:87] + node _T_498 = eq(_T_496, _T_497) @[el2_lib.scala 197:79] + node _T_499 = mux(_T_495, UInt<1>("h01"), _T_498) @[el2_lib.scala 197:24] + _T_287[29] <= _T_499 @[el2_lib.scala 197:18] + node _T_500 = bits(io.trigger_pkt_any[1].tdata2, 29, 0) @[el2_lib.scala 197:29] + node _T_501 = andr(_T_500) @[el2_lib.scala 197:37] + node _T_502 = and(_T_501, _T_292) @[el2_lib.scala 197:42] + node _T_503 = bits(io.trigger_pkt_any[1].tdata2, 30, 30) @[el2_lib.scala 197:75] + node _T_504 = bits(_T_285, 30, 30) @[el2_lib.scala 197:87] + node _T_505 = eq(_T_503, _T_504) @[el2_lib.scala 197:79] + node _T_506 = mux(_T_502, UInt<1>("h01"), _T_505) @[el2_lib.scala 197:24] + _T_287[30] <= _T_506 @[el2_lib.scala 197:18] + node _T_507 = bits(io.trigger_pkt_any[1].tdata2, 30, 0) @[el2_lib.scala 197:29] + node _T_508 = andr(_T_507) @[el2_lib.scala 197:37] + node _T_509 = and(_T_508, _T_292) @[el2_lib.scala 197:42] + node _T_510 = bits(io.trigger_pkt_any[1].tdata2, 31, 31) @[el2_lib.scala 197:75] + node _T_511 = bits(_T_285, 31, 31) @[el2_lib.scala 197:87] + node _T_512 = eq(_T_510, _T_511) @[el2_lib.scala 197:79] + node _T_513 = mux(_T_509, UInt<1>("h01"), _T_512) @[el2_lib.scala 197:24] + _T_287[31] <= _T_513 @[el2_lib.scala 197:18] + node _T_514 = cat(_T_287[1], _T_287[0]) @[el2_lib.scala 198:14] + node _T_515 = cat(_T_287[3], _T_287[2]) @[el2_lib.scala 198:14] + node _T_516 = cat(_T_515, _T_514) @[el2_lib.scala 198:14] + node _T_517 = cat(_T_287[5], _T_287[4]) @[el2_lib.scala 198:14] + node _T_518 = cat(_T_287[7], _T_287[6]) @[el2_lib.scala 198:14] + node _T_519 = cat(_T_518, _T_517) @[el2_lib.scala 198:14] + node _T_520 = cat(_T_519, _T_516) @[el2_lib.scala 198:14] + node _T_521 = cat(_T_287[9], _T_287[8]) @[el2_lib.scala 198:14] + node _T_522 = cat(_T_287[11], _T_287[10]) @[el2_lib.scala 198:14] + node _T_523 = cat(_T_522, _T_521) @[el2_lib.scala 198:14] + node _T_524 = cat(_T_287[13], _T_287[12]) @[el2_lib.scala 198:14] + node _T_525 = cat(_T_287[15], _T_287[14]) @[el2_lib.scala 198:14] + node _T_526 = cat(_T_525, _T_524) @[el2_lib.scala 198:14] + node _T_527 = cat(_T_526, _T_523) @[el2_lib.scala 198:14] + node _T_528 = cat(_T_527, _T_520) @[el2_lib.scala 198:14] + node _T_529 = cat(_T_287[17], _T_287[16]) @[el2_lib.scala 198:14] + node _T_530 = cat(_T_287[19], _T_287[18]) @[el2_lib.scala 198:14] + node _T_531 = cat(_T_530, _T_529) @[el2_lib.scala 198:14] + node _T_532 = cat(_T_287[21], _T_287[20]) @[el2_lib.scala 198:14] + node _T_533 = cat(_T_287[23], _T_287[22]) @[el2_lib.scala 198:14] + node _T_534 = cat(_T_533, _T_532) @[el2_lib.scala 198:14] + node _T_535 = cat(_T_534, _T_531) @[el2_lib.scala 198:14] + node _T_536 = cat(_T_287[25], _T_287[24]) @[el2_lib.scala 198:14] + node _T_537 = cat(_T_287[27], _T_287[26]) @[el2_lib.scala 198:14] + node _T_538 = cat(_T_537, _T_536) @[el2_lib.scala 198:14] + node _T_539 = cat(_T_287[29], _T_287[28]) @[el2_lib.scala 198:14] + node _T_540 = cat(_T_287[31], _T_287[30]) @[el2_lib.scala 198:14] + node _T_541 = cat(_T_540, _T_539) @[el2_lib.scala 198:14] + node _T_542 = cat(_T_541, _T_538) @[el2_lib.scala 198:14] + node _T_543 = cat(_T_542, _T_535) @[el2_lib.scala 198:14] + node _T_544 = cat(_T_543, _T_528) @[el2_lib.scala 198:14] + node lsu_trigger_data_match_1 = andr(_T_544) @[el2_lib.scala 198:21] + node _T_545 = bits(io.trigger_pkt_any[2].select, 0, 0) @[el2_lsu_trigger.scala 24:137] + node _T_546 = eq(_T_545, UInt<1>("h00")) @[el2_lsu_trigger.scala 24:107] + node _T_547 = and(io.trigger_pkt_any[2].select, io.trigger_pkt_any[2].store) @[el2_lsu_trigger.scala 25:35] + node _T_548 = bits(_T_547, 0, 0) @[el2_lsu_trigger.scala 25:66] + node _T_549 = mux(_T_546, io.lsu_addr_m, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_550 = mux(_T_548, store_data_trigger_m, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_551 = or(_T_549, _T_550) @[Mux.scala 27:72] + wire _T_552 : UInt<32> @[Mux.scala 27:72] + _T_552 <= _T_551 @[Mux.scala 27:72] + node _T_553 = bits(io.trigger_pkt_any[2].match_, 0, 0) @[el2_lsu_trigger.scala 25:133] + wire _T_554 : UInt<1>[32] @[el2_lib.scala 193:24] + node _T_555 = bits(_T_553, 0, 0) @[el2_lib.scala 194:37] + node _T_556 = bits(io.trigger_pkt_any[2].tdata2, 31, 0) @[el2_lib.scala 194:53] + node _T_557 = andr(_T_556) @[el2_lib.scala 194:73] + node _T_558 = not(_T_557) @[el2_lib.scala 194:47] + node _T_559 = and(_T_555, _T_558) @[el2_lib.scala 194:44] + node _T_560 = bits(io.trigger_pkt_any[2].tdata2, 0, 0) @[el2_lib.scala 195:48] + node _T_561 = bits(_T_552, 0, 0) @[el2_lib.scala 195:60] + node _T_562 = eq(_T_560, _T_561) @[el2_lib.scala 195:52] + node _T_563 = or(_T_559, _T_562) @[el2_lib.scala 195:41] + _T_554[0] <= _T_563 @[el2_lib.scala 195:18] + node _T_564 = bits(io.trigger_pkt_any[2].tdata2, 0, 0) @[el2_lib.scala 197:29] + node _T_565 = andr(_T_564) @[el2_lib.scala 197:37] + node _T_566 = and(_T_565, _T_559) @[el2_lib.scala 197:42] + node _T_567 = bits(io.trigger_pkt_any[2].tdata2, 1, 1) @[el2_lib.scala 197:75] + node _T_568 = bits(_T_552, 1, 1) @[el2_lib.scala 197:87] + node _T_569 = eq(_T_567, _T_568) @[el2_lib.scala 197:79] + node _T_570 = mux(_T_566, UInt<1>("h01"), _T_569) @[el2_lib.scala 197:24] + _T_554[1] <= _T_570 @[el2_lib.scala 197:18] + node _T_571 = bits(io.trigger_pkt_any[2].tdata2, 1, 0) @[el2_lib.scala 197:29] + node _T_572 = andr(_T_571) @[el2_lib.scala 197:37] + node _T_573 = and(_T_572, _T_559) @[el2_lib.scala 197:42] + node _T_574 = bits(io.trigger_pkt_any[2].tdata2, 2, 2) @[el2_lib.scala 197:75] + node _T_575 = bits(_T_552, 2, 2) @[el2_lib.scala 197:87] + node _T_576 = eq(_T_574, _T_575) @[el2_lib.scala 197:79] + node _T_577 = mux(_T_573, UInt<1>("h01"), _T_576) @[el2_lib.scala 197:24] + _T_554[2] <= _T_577 @[el2_lib.scala 197:18] + node _T_578 = bits(io.trigger_pkt_any[2].tdata2, 2, 0) @[el2_lib.scala 197:29] + node _T_579 = andr(_T_578) @[el2_lib.scala 197:37] + node _T_580 = and(_T_579, _T_559) @[el2_lib.scala 197:42] + node _T_581 = bits(io.trigger_pkt_any[2].tdata2, 3, 3) @[el2_lib.scala 197:75] + node _T_582 = bits(_T_552, 3, 3) @[el2_lib.scala 197:87] + node _T_583 = eq(_T_581, _T_582) @[el2_lib.scala 197:79] + node _T_584 = mux(_T_580, UInt<1>("h01"), _T_583) @[el2_lib.scala 197:24] + _T_554[3] <= _T_584 @[el2_lib.scala 197:18] + node _T_585 = bits(io.trigger_pkt_any[2].tdata2, 3, 0) @[el2_lib.scala 197:29] + node _T_586 = andr(_T_585) @[el2_lib.scala 197:37] + node _T_587 = and(_T_586, _T_559) @[el2_lib.scala 197:42] + node _T_588 = bits(io.trigger_pkt_any[2].tdata2, 4, 4) @[el2_lib.scala 197:75] + node _T_589 = bits(_T_552, 4, 4) @[el2_lib.scala 197:87] + node _T_590 = eq(_T_588, _T_589) @[el2_lib.scala 197:79] + node _T_591 = mux(_T_587, UInt<1>("h01"), _T_590) @[el2_lib.scala 197:24] + _T_554[4] <= _T_591 @[el2_lib.scala 197:18] + node _T_592 = bits(io.trigger_pkt_any[2].tdata2, 4, 0) @[el2_lib.scala 197:29] + node _T_593 = andr(_T_592) @[el2_lib.scala 197:37] + node _T_594 = and(_T_593, _T_559) @[el2_lib.scala 197:42] + node _T_595 = bits(io.trigger_pkt_any[2].tdata2, 5, 5) @[el2_lib.scala 197:75] + node _T_596 = bits(_T_552, 5, 5) @[el2_lib.scala 197:87] + node _T_597 = eq(_T_595, _T_596) @[el2_lib.scala 197:79] + node _T_598 = mux(_T_594, UInt<1>("h01"), _T_597) @[el2_lib.scala 197:24] + _T_554[5] <= _T_598 @[el2_lib.scala 197:18] + node _T_599 = bits(io.trigger_pkt_any[2].tdata2, 5, 0) @[el2_lib.scala 197:29] + node _T_600 = andr(_T_599) @[el2_lib.scala 197:37] + node _T_601 = and(_T_600, _T_559) @[el2_lib.scala 197:42] + node _T_602 = bits(io.trigger_pkt_any[2].tdata2, 6, 6) @[el2_lib.scala 197:75] + node _T_603 = bits(_T_552, 6, 6) @[el2_lib.scala 197:87] + node _T_604 = eq(_T_602, _T_603) @[el2_lib.scala 197:79] + node _T_605 = mux(_T_601, UInt<1>("h01"), _T_604) @[el2_lib.scala 197:24] + _T_554[6] <= _T_605 @[el2_lib.scala 197:18] + node _T_606 = bits(io.trigger_pkt_any[2].tdata2, 6, 0) @[el2_lib.scala 197:29] + node _T_607 = andr(_T_606) @[el2_lib.scala 197:37] + node _T_608 = and(_T_607, _T_559) @[el2_lib.scala 197:42] + node _T_609 = bits(io.trigger_pkt_any[2].tdata2, 7, 7) @[el2_lib.scala 197:75] + node _T_610 = bits(_T_552, 7, 7) @[el2_lib.scala 197:87] + node _T_611 = eq(_T_609, _T_610) @[el2_lib.scala 197:79] + node _T_612 = mux(_T_608, UInt<1>("h01"), _T_611) @[el2_lib.scala 197:24] + _T_554[7] <= _T_612 @[el2_lib.scala 197:18] + node _T_613 = bits(io.trigger_pkt_any[2].tdata2, 7, 0) @[el2_lib.scala 197:29] + node _T_614 = andr(_T_613) @[el2_lib.scala 197:37] + node _T_615 = and(_T_614, _T_559) @[el2_lib.scala 197:42] + node _T_616 = bits(io.trigger_pkt_any[2].tdata2, 8, 8) @[el2_lib.scala 197:75] + node _T_617 = bits(_T_552, 8, 8) @[el2_lib.scala 197:87] + node _T_618 = eq(_T_616, _T_617) @[el2_lib.scala 197:79] + node _T_619 = mux(_T_615, UInt<1>("h01"), _T_618) @[el2_lib.scala 197:24] + _T_554[8] <= _T_619 @[el2_lib.scala 197:18] + node _T_620 = bits(io.trigger_pkt_any[2].tdata2, 8, 0) @[el2_lib.scala 197:29] + node _T_621 = andr(_T_620) @[el2_lib.scala 197:37] + node _T_622 = and(_T_621, _T_559) @[el2_lib.scala 197:42] + node _T_623 = bits(io.trigger_pkt_any[2].tdata2, 9, 9) @[el2_lib.scala 197:75] + node _T_624 = bits(_T_552, 9, 9) @[el2_lib.scala 197:87] + node _T_625 = eq(_T_623, _T_624) @[el2_lib.scala 197:79] + node _T_626 = mux(_T_622, UInt<1>("h01"), _T_625) @[el2_lib.scala 197:24] + _T_554[9] <= _T_626 @[el2_lib.scala 197:18] + node _T_627 = bits(io.trigger_pkt_any[2].tdata2, 9, 0) @[el2_lib.scala 197:29] + node _T_628 = andr(_T_627) @[el2_lib.scala 197:37] + node _T_629 = and(_T_628, _T_559) @[el2_lib.scala 197:42] + node _T_630 = bits(io.trigger_pkt_any[2].tdata2, 10, 10) @[el2_lib.scala 197:75] + node _T_631 = bits(_T_552, 10, 10) @[el2_lib.scala 197:87] + node _T_632 = eq(_T_630, _T_631) @[el2_lib.scala 197:79] + node _T_633 = mux(_T_629, UInt<1>("h01"), _T_632) @[el2_lib.scala 197:24] + _T_554[10] <= _T_633 @[el2_lib.scala 197:18] + node _T_634 = bits(io.trigger_pkt_any[2].tdata2, 10, 0) @[el2_lib.scala 197:29] + node _T_635 = andr(_T_634) @[el2_lib.scala 197:37] + node _T_636 = and(_T_635, _T_559) @[el2_lib.scala 197:42] + node _T_637 = bits(io.trigger_pkt_any[2].tdata2, 11, 11) @[el2_lib.scala 197:75] + node _T_638 = bits(_T_552, 11, 11) @[el2_lib.scala 197:87] + node _T_639 = eq(_T_637, _T_638) @[el2_lib.scala 197:79] + node _T_640 = mux(_T_636, UInt<1>("h01"), _T_639) @[el2_lib.scala 197:24] + _T_554[11] <= _T_640 @[el2_lib.scala 197:18] + node _T_641 = bits(io.trigger_pkt_any[2].tdata2, 11, 0) @[el2_lib.scala 197:29] + node _T_642 = andr(_T_641) @[el2_lib.scala 197:37] + node _T_643 = and(_T_642, _T_559) @[el2_lib.scala 197:42] + node _T_644 = bits(io.trigger_pkt_any[2].tdata2, 12, 12) @[el2_lib.scala 197:75] + node _T_645 = bits(_T_552, 12, 12) @[el2_lib.scala 197:87] + node _T_646 = eq(_T_644, _T_645) @[el2_lib.scala 197:79] + node _T_647 = mux(_T_643, UInt<1>("h01"), _T_646) @[el2_lib.scala 197:24] + _T_554[12] <= _T_647 @[el2_lib.scala 197:18] + node _T_648 = bits(io.trigger_pkt_any[2].tdata2, 12, 0) @[el2_lib.scala 197:29] + node _T_649 = andr(_T_648) @[el2_lib.scala 197:37] + node _T_650 = and(_T_649, _T_559) @[el2_lib.scala 197:42] + node _T_651 = bits(io.trigger_pkt_any[2].tdata2, 13, 13) @[el2_lib.scala 197:75] + node _T_652 = bits(_T_552, 13, 13) @[el2_lib.scala 197:87] + node _T_653 = eq(_T_651, _T_652) @[el2_lib.scala 197:79] + node _T_654 = mux(_T_650, UInt<1>("h01"), _T_653) @[el2_lib.scala 197:24] + _T_554[13] <= _T_654 @[el2_lib.scala 197:18] + node _T_655 = bits(io.trigger_pkt_any[2].tdata2, 13, 0) @[el2_lib.scala 197:29] + node _T_656 = andr(_T_655) @[el2_lib.scala 197:37] + node _T_657 = and(_T_656, _T_559) @[el2_lib.scala 197:42] + node _T_658 = bits(io.trigger_pkt_any[2].tdata2, 14, 14) @[el2_lib.scala 197:75] + node _T_659 = bits(_T_552, 14, 14) @[el2_lib.scala 197:87] + node _T_660 = eq(_T_658, _T_659) @[el2_lib.scala 197:79] + node _T_661 = mux(_T_657, UInt<1>("h01"), _T_660) @[el2_lib.scala 197:24] + _T_554[14] <= _T_661 @[el2_lib.scala 197:18] + node _T_662 = bits(io.trigger_pkt_any[2].tdata2, 14, 0) @[el2_lib.scala 197:29] + node _T_663 = andr(_T_662) @[el2_lib.scala 197:37] + node _T_664 = and(_T_663, _T_559) @[el2_lib.scala 197:42] + node _T_665 = bits(io.trigger_pkt_any[2].tdata2, 15, 15) @[el2_lib.scala 197:75] + node _T_666 = bits(_T_552, 15, 15) @[el2_lib.scala 197:87] + node _T_667 = eq(_T_665, _T_666) @[el2_lib.scala 197:79] + node _T_668 = mux(_T_664, UInt<1>("h01"), _T_667) @[el2_lib.scala 197:24] + _T_554[15] <= _T_668 @[el2_lib.scala 197:18] + node _T_669 = bits(io.trigger_pkt_any[2].tdata2, 15, 0) @[el2_lib.scala 197:29] + node _T_670 = andr(_T_669) @[el2_lib.scala 197:37] + node _T_671 = and(_T_670, _T_559) @[el2_lib.scala 197:42] + node _T_672 = bits(io.trigger_pkt_any[2].tdata2, 16, 16) @[el2_lib.scala 197:75] + node _T_673 = bits(_T_552, 16, 16) @[el2_lib.scala 197:87] + node _T_674 = eq(_T_672, _T_673) @[el2_lib.scala 197:79] + node _T_675 = mux(_T_671, UInt<1>("h01"), _T_674) @[el2_lib.scala 197:24] + _T_554[16] <= _T_675 @[el2_lib.scala 197:18] + node _T_676 = bits(io.trigger_pkt_any[2].tdata2, 16, 0) @[el2_lib.scala 197:29] + node _T_677 = andr(_T_676) @[el2_lib.scala 197:37] + node _T_678 = and(_T_677, _T_559) @[el2_lib.scala 197:42] + node _T_679 = bits(io.trigger_pkt_any[2].tdata2, 17, 17) @[el2_lib.scala 197:75] + node _T_680 = bits(_T_552, 17, 17) @[el2_lib.scala 197:87] + node _T_681 = eq(_T_679, _T_680) @[el2_lib.scala 197:79] + node _T_682 = mux(_T_678, UInt<1>("h01"), _T_681) @[el2_lib.scala 197:24] + _T_554[17] <= _T_682 @[el2_lib.scala 197:18] + node _T_683 = bits(io.trigger_pkt_any[2].tdata2, 17, 0) @[el2_lib.scala 197:29] + node _T_684 = andr(_T_683) @[el2_lib.scala 197:37] + node _T_685 = and(_T_684, _T_559) @[el2_lib.scala 197:42] + node _T_686 = bits(io.trigger_pkt_any[2].tdata2, 18, 18) @[el2_lib.scala 197:75] + node _T_687 = bits(_T_552, 18, 18) @[el2_lib.scala 197:87] + node _T_688 = eq(_T_686, _T_687) @[el2_lib.scala 197:79] + node _T_689 = mux(_T_685, UInt<1>("h01"), _T_688) @[el2_lib.scala 197:24] + _T_554[18] <= _T_689 @[el2_lib.scala 197:18] + node _T_690 = bits(io.trigger_pkt_any[2].tdata2, 18, 0) @[el2_lib.scala 197:29] + node _T_691 = andr(_T_690) @[el2_lib.scala 197:37] + node _T_692 = and(_T_691, _T_559) @[el2_lib.scala 197:42] + node _T_693 = bits(io.trigger_pkt_any[2].tdata2, 19, 19) @[el2_lib.scala 197:75] + node _T_694 = bits(_T_552, 19, 19) @[el2_lib.scala 197:87] + node _T_695 = eq(_T_693, _T_694) @[el2_lib.scala 197:79] + node _T_696 = mux(_T_692, UInt<1>("h01"), _T_695) @[el2_lib.scala 197:24] + _T_554[19] <= _T_696 @[el2_lib.scala 197:18] + node _T_697 = bits(io.trigger_pkt_any[2].tdata2, 19, 0) @[el2_lib.scala 197:29] + node _T_698 = andr(_T_697) @[el2_lib.scala 197:37] + node _T_699 = and(_T_698, _T_559) @[el2_lib.scala 197:42] + node _T_700 = bits(io.trigger_pkt_any[2].tdata2, 20, 20) @[el2_lib.scala 197:75] + node _T_701 = bits(_T_552, 20, 20) @[el2_lib.scala 197:87] + node _T_702 = eq(_T_700, _T_701) @[el2_lib.scala 197:79] + node _T_703 = mux(_T_699, UInt<1>("h01"), _T_702) @[el2_lib.scala 197:24] + _T_554[20] <= _T_703 @[el2_lib.scala 197:18] + node _T_704 = bits(io.trigger_pkt_any[2].tdata2, 20, 0) @[el2_lib.scala 197:29] + node _T_705 = andr(_T_704) @[el2_lib.scala 197:37] + node _T_706 = and(_T_705, _T_559) @[el2_lib.scala 197:42] + node _T_707 = bits(io.trigger_pkt_any[2].tdata2, 21, 21) @[el2_lib.scala 197:75] + node _T_708 = bits(_T_552, 21, 21) @[el2_lib.scala 197:87] + node _T_709 = eq(_T_707, _T_708) @[el2_lib.scala 197:79] + node _T_710 = mux(_T_706, UInt<1>("h01"), _T_709) @[el2_lib.scala 197:24] + _T_554[21] <= _T_710 @[el2_lib.scala 197:18] + node _T_711 = bits(io.trigger_pkt_any[2].tdata2, 21, 0) @[el2_lib.scala 197:29] + node _T_712 = andr(_T_711) @[el2_lib.scala 197:37] + node _T_713 = and(_T_712, _T_559) @[el2_lib.scala 197:42] + node _T_714 = bits(io.trigger_pkt_any[2].tdata2, 22, 22) @[el2_lib.scala 197:75] + node _T_715 = bits(_T_552, 22, 22) @[el2_lib.scala 197:87] + node _T_716 = eq(_T_714, _T_715) @[el2_lib.scala 197:79] + node _T_717 = mux(_T_713, UInt<1>("h01"), _T_716) @[el2_lib.scala 197:24] + _T_554[22] <= _T_717 @[el2_lib.scala 197:18] + node _T_718 = bits(io.trigger_pkt_any[2].tdata2, 22, 0) @[el2_lib.scala 197:29] + node _T_719 = andr(_T_718) @[el2_lib.scala 197:37] + node _T_720 = and(_T_719, _T_559) @[el2_lib.scala 197:42] + node _T_721 = bits(io.trigger_pkt_any[2].tdata2, 23, 23) @[el2_lib.scala 197:75] + node _T_722 = bits(_T_552, 23, 23) @[el2_lib.scala 197:87] + node _T_723 = eq(_T_721, _T_722) @[el2_lib.scala 197:79] + node _T_724 = mux(_T_720, UInt<1>("h01"), _T_723) @[el2_lib.scala 197:24] + _T_554[23] <= _T_724 @[el2_lib.scala 197:18] + node _T_725 = bits(io.trigger_pkt_any[2].tdata2, 23, 0) @[el2_lib.scala 197:29] + node _T_726 = andr(_T_725) @[el2_lib.scala 197:37] + node _T_727 = and(_T_726, _T_559) @[el2_lib.scala 197:42] + node _T_728 = bits(io.trigger_pkt_any[2].tdata2, 24, 24) @[el2_lib.scala 197:75] + node _T_729 = bits(_T_552, 24, 24) @[el2_lib.scala 197:87] + node _T_730 = eq(_T_728, _T_729) @[el2_lib.scala 197:79] + node _T_731 = mux(_T_727, UInt<1>("h01"), _T_730) @[el2_lib.scala 197:24] + _T_554[24] <= _T_731 @[el2_lib.scala 197:18] + node _T_732 = bits(io.trigger_pkt_any[2].tdata2, 24, 0) @[el2_lib.scala 197:29] + node _T_733 = andr(_T_732) @[el2_lib.scala 197:37] + node _T_734 = and(_T_733, _T_559) @[el2_lib.scala 197:42] + node _T_735 = bits(io.trigger_pkt_any[2].tdata2, 25, 25) @[el2_lib.scala 197:75] + node _T_736 = bits(_T_552, 25, 25) @[el2_lib.scala 197:87] + node _T_737 = eq(_T_735, _T_736) @[el2_lib.scala 197:79] + node _T_738 = mux(_T_734, UInt<1>("h01"), _T_737) @[el2_lib.scala 197:24] + _T_554[25] <= _T_738 @[el2_lib.scala 197:18] + node _T_739 = bits(io.trigger_pkt_any[2].tdata2, 25, 0) @[el2_lib.scala 197:29] + node _T_740 = andr(_T_739) @[el2_lib.scala 197:37] + node _T_741 = and(_T_740, _T_559) @[el2_lib.scala 197:42] + node _T_742 = bits(io.trigger_pkt_any[2].tdata2, 26, 26) @[el2_lib.scala 197:75] + node _T_743 = bits(_T_552, 26, 26) @[el2_lib.scala 197:87] + node _T_744 = eq(_T_742, _T_743) @[el2_lib.scala 197:79] + node _T_745 = mux(_T_741, UInt<1>("h01"), _T_744) @[el2_lib.scala 197:24] + _T_554[26] <= _T_745 @[el2_lib.scala 197:18] + node _T_746 = bits(io.trigger_pkt_any[2].tdata2, 26, 0) @[el2_lib.scala 197:29] + node _T_747 = andr(_T_746) @[el2_lib.scala 197:37] + node _T_748 = and(_T_747, _T_559) @[el2_lib.scala 197:42] + node _T_749 = bits(io.trigger_pkt_any[2].tdata2, 27, 27) @[el2_lib.scala 197:75] + node _T_750 = bits(_T_552, 27, 27) @[el2_lib.scala 197:87] + node _T_751 = eq(_T_749, _T_750) @[el2_lib.scala 197:79] + node _T_752 = mux(_T_748, UInt<1>("h01"), _T_751) @[el2_lib.scala 197:24] + _T_554[27] <= _T_752 @[el2_lib.scala 197:18] + node _T_753 = bits(io.trigger_pkt_any[2].tdata2, 27, 0) @[el2_lib.scala 197:29] + node _T_754 = andr(_T_753) @[el2_lib.scala 197:37] + node _T_755 = and(_T_754, _T_559) @[el2_lib.scala 197:42] + node _T_756 = bits(io.trigger_pkt_any[2].tdata2, 28, 28) @[el2_lib.scala 197:75] + node _T_757 = bits(_T_552, 28, 28) @[el2_lib.scala 197:87] + node _T_758 = eq(_T_756, _T_757) @[el2_lib.scala 197:79] + node _T_759 = mux(_T_755, UInt<1>("h01"), _T_758) @[el2_lib.scala 197:24] + _T_554[28] <= _T_759 @[el2_lib.scala 197:18] + node _T_760 = bits(io.trigger_pkt_any[2].tdata2, 28, 0) @[el2_lib.scala 197:29] + node _T_761 = andr(_T_760) @[el2_lib.scala 197:37] + node _T_762 = and(_T_761, _T_559) @[el2_lib.scala 197:42] + node _T_763 = bits(io.trigger_pkt_any[2].tdata2, 29, 29) @[el2_lib.scala 197:75] + node _T_764 = bits(_T_552, 29, 29) @[el2_lib.scala 197:87] + node _T_765 = eq(_T_763, _T_764) @[el2_lib.scala 197:79] + node _T_766 = mux(_T_762, UInt<1>("h01"), _T_765) @[el2_lib.scala 197:24] + _T_554[29] <= _T_766 @[el2_lib.scala 197:18] + node _T_767 = bits(io.trigger_pkt_any[2].tdata2, 29, 0) @[el2_lib.scala 197:29] + node _T_768 = andr(_T_767) @[el2_lib.scala 197:37] + node _T_769 = and(_T_768, _T_559) @[el2_lib.scala 197:42] + node _T_770 = bits(io.trigger_pkt_any[2].tdata2, 30, 30) @[el2_lib.scala 197:75] + node _T_771 = bits(_T_552, 30, 30) @[el2_lib.scala 197:87] + node _T_772 = eq(_T_770, _T_771) @[el2_lib.scala 197:79] + node _T_773 = mux(_T_769, UInt<1>("h01"), _T_772) @[el2_lib.scala 197:24] + _T_554[30] <= _T_773 @[el2_lib.scala 197:18] + node _T_774 = bits(io.trigger_pkt_any[2].tdata2, 30, 0) @[el2_lib.scala 197:29] + node _T_775 = andr(_T_774) @[el2_lib.scala 197:37] + node _T_776 = and(_T_775, _T_559) @[el2_lib.scala 197:42] + node _T_777 = bits(io.trigger_pkt_any[2].tdata2, 31, 31) @[el2_lib.scala 197:75] + node _T_778 = bits(_T_552, 31, 31) @[el2_lib.scala 197:87] + node _T_779 = eq(_T_777, _T_778) @[el2_lib.scala 197:79] + node _T_780 = mux(_T_776, UInt<1>("h01"), _T_779) @[el2_lib.scala 197:24] + _T_554[31] <= _T_780 @[el2_lib.scala 197:18] + node _T_781 = cat(_T_554[1], _T_554[0]) @[el2_lib.scala 198:14] + node _T_782 = cat(_T_554[3], _T_554[2]) @[el2_lib.scala 198:14] + node _T_783 = cat(_T_782, _T_781) @[el2_lib.scala 198:14] + node _T_784 = cat(_T_554[5], _T_554[4]) @[el2_lib.scala 198:14] + node _T_785 = cat(_T_554[7], _T_554[6]) @[el2_lib.scala 198:14] + node _T_786 = cat(_T_785, _T_784) @[el2_lib.scala 198:14] + node _T_787 = cat(_T_786, _T_783) @[el2_lib.scala 198:14] + node _T_788 = cat(_T_554[9], _T_554[8]) @[el2_lib.scala 198:14] + node _T_789 = cat(_T_554[11], _T_554[10]) @[el2_lib.scala 198:14] + node _T_790 = cat(_T_789, _T_788) @[el2_lib.scala 198:14] + node _T_791 = cat(_T_554[13], _T_554[12]) @[el2_lib.scala 198:14] + node _T_792 = cat(_T_554[15], _T_554[14]) @[el2_lib.scala 198:14] + node _T_793 = cat(_T_792, _T_791) @[el2_lib.scala 198:14] + node _T_794 = cat(_T_793, _T_790) @[el2_lib.scala 198:14] + node _T_795 = cat(_T_794, _T_787) @[el2_lib.scala 198:14] + node _T_796 = cat(_T_554[17], _T_554[16]) @[el2_lib.scala 198:14] + node _T_797 = cat(_T_554[19], _T_554[18]) @[el2_lib.scala 198:14] + node _T_798 = cat(_T_797, _T_796) @[el2_lib.scala 198:14] + node _T_799 = cat(_T_554[21], _T_554[20]) @[el2_lib.scala 198:14] + node _T_800 = cat(_T_554[23], _T_554[22]) @[el2_lib.scala 198:14] + node _T_801 = cat(_T_800, _T_799) @[el2_lib.scala 198:14] + node _T_802 = cat(_T_801, _T_798) @[el2_lib.scala 198:14] + node _T_803 = cat(_T_554[25], _T_554[24]) @[el2_lib.scala 198:14] + node _T_804 = cat(_T_554[27], _T_554[26]) @[el2_lib.scala 198:14] + node _T_805 = cat(_T_804, _T_803) @[el2_lib.scala 198:14] + node _T_806 = cat(_T_554[29], _T_554[28]) @[el2_lib.scala 198:14] + node _T_807 = cat(_T_554[31], _T_554[30]) @[el2_lib.scala 198:14] + node _T_808 = cat(_T_807, _T_806) @[el2_lib.scala 198:14] + node _T_809 = cat(_T_808, _T_805) @[el2_lib.scala 198:14] + node _T_810 = cat(_T_809, _T_802) @[el2_lib.scala 198:14] + node _T_811 = cat(_T_810, _T_795) @[el2_lib.scala 198:14] + node lsu_trigger_data_match_2 = andr(_T_811) @[el2_lib.scala 198:21] + node _T_812 = bits(io.trigger_pkt_any[3].select, 0, 0) @[el2_lsu_trigger.scala 24:137] + node _T_813 = eq(_T_812, UInt<1>("h00")) @[el2_lsu_trigger.scala 24:107] + node _T_814 = and(io.trigger_pkt_any[3].select, io.trigger_pkt_any[3].store) @[el2_lsu_trigger.scala 25:35] + node _T_815 = bits(_T_814, 0, 0) @[el2_lsu_trigger.scala 25:66] + node _T_816 = mux(_T_813, io.lsu_addr_m, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_817 = mux(_T_815, store_data_trigger_m, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_818 = or(_T_816, _T_817) @[Mux.scala 27:72] + wire _T_819 : UInt<32> @[Mux.scala 27:72] + _T_819 <= _T_818 @[Mux.scala 27:72] + node _T_820 = bits(io.trigger_pkt_any[3].match_, 0, 0) @[el2_lsu_trigger.scala 25:133] + wire _T_821 : UInt<1>[32] @[el2_lib.scala 193:24] + node _T_822 = bits(_T_820, 0, 0) @[el2_lib.scala 194:37] + node _T_823 = bits(io.trigger_pkt_any[3].tdata2, 31, 0) @[el2_lib.scala 194:53] + node _T_824 = andr(_T_823) @[el2_lib.scala 194:73] + node _T_825 = not(_T_824) @[el2_lib.scala 194:47] + node _T_826 = and(_T_822, _T_825) @[el2_lib.scala 194:44] + node _T_827 = bits(io.trigger_pkt_any[3].tdata2, 0, 0) @[el2_lib.scala 195:48] + node _T_828 = bits(_T_819, 0, 0) @[el2_lib.scala 195:60] + node _T_829 = eq(_T_827, _T_828) @[el2_lib.scala 195:52] + node _T_830 = or(_T_826, _T_829) @[el2_lib.scala 195:41] + _T_821[0] <= _T_830 @[el2_lib.scala 195:18] + node _T_831 = bits(io.trigger_pkt_any[3].tdata2, 0, 0) @[el2_lib.scala 197:29] + node _T_832 = andr(_T_831) @[el2_lib.scala 197:37] + node _T_833 = and(_T_832, _T_826) @[el2_lib.scala 197:42] + node _T_834 = bits(io.trigger_pkt_any[3].tdata2, 1, 1) @[el2_lib.scala 197:75] + node _T_835 = bits(_T_819, 1, 1) @[el2_lib.scala 197:87] + node _T_836 = eq(_T_834, _T_835) @[el2_lib.scala 197:79] + node _T_837 = mux(_T_833, UInt<1>("h01"), _T_836) @[el2_lib.scala 197:24] + _T_821[1] <= _T_837 @[el2_lib.scala 197:18] + node _T_838 = bits(io.trigger_pkt_any[3].tdata2, 1, 0) @[el2_lib.scala 197:29] + node _T_839 = andr(_T_838) @[el2_lib.scala 197:37] + node _T_840 = and(_T_839, _T_826) @[el2_lib.scala 197:42] + node _T_841 = bits(io.trigger_pkt_any[3].tdata2, 2, 2) @[el2_lib.scala 197:75] + node _T_842 = bits(_T_819, 2, 2) @[el2_lib.scala 197:87] + node _T_843 = eq(_T_841, _T_842) @[el2_lib.scala 197:79] + node _T_844 = mux(_T_840, UInt<1>("h01"), _T_843) @[el2_lib.scala 197:24] + _T_821[2] <= _T_844 @[el2_lib.scala 197:18] + node _T_845 = bits(io.trigger_pkt_any[3].tdata2, 2, 0) @[el2_lib.scala 197:29] + node _T_846 = andr(_T_845) @[el2_lib.scala 197:37] + node _T_847 = and(_T_846, _T_826) @[el2_lib.scala 197:42] + node _T_848 = bits(io.trigger_pkt_any[3].tdata2, 3, 3) @[el2_lib.scala 197:75] + node _T_849 = bits(_T_819, 3, 3) @[el2_lib.scala 197:87] + node _T_850 = eq(_T_848, _T_849) @[el2_lib.scala 197:79] + node _T_851 = mux(_T_847, UInt<1>("h01"), _T_850) @[el2_lib.scala 197:24] + _T_821[3] <= _T_851 @[el2_lib.scala 197:18] + node _T_852 = bits(io.trigger_pkt_any[3].tdata2, 3, 0) @[el2_lib.scala 197:29] + node _T_853 = andr(_T_852) @[el2_lib.scala 197:37] + node _T_854 = and(_T_853, _T_826) @[el2_lib.scala 197:42] + node _T_855 = bits(io.trigger_pkt_any[3].tdata2, 4, 4) @[el2_lib.scala 197:75] + node _T_856 = bits(_T_819, 4, 4) @[el2_lib.scala 197:87] + node _T_857 = eq(_T_855, _T_856) @[el2_lib.scala 197:79] + node _T_858 = mux(_T_854, UInt<1>("h01"), _T_857) @[el2_lib.scala 197:24] + _T_821[4] <= _T_858 @[el2_lib.scala 197:18] + node _T_859 = bits(io.trigger_pkt_any[3].tdata2, 4, 0) @[el2_lib.scala 197:29] + node _T_860 = andr(_T_859) @[el2_lib.scala 197:37] + node _T_861 = and(_T_860, _T_826) @[el2_lib.scala 197:42] + node _T_862 = bits(io.trigger_pkt_any[3].tdata2, 5, 5) @[el2_lib.scala 197:75] + node _T_863 = bits(_T_819, 5, 5) @[el2_lib.scala 197:87] + node _T_864 = eq(_T_862, _T_863) @[el2_lib.scala 197:79] + node _T_865 = mux(_T_861, UInt<1>("h01"), _T_864) @[el2_lib.scala 197:24] + _T_821[5] <= _T_865 @[el2_lib.scala 197:18] + node _T_866 = bits(io.trigger_pkt_any[3].tdata2, 5, 0) @[el2_lib.scala 197:29] + node _T_867 = andr(_T_866) @[el2_lib.scala 197:37] + node _T_868 = and(_T_867, _T_826) @[el2_lib.scala 197:42] + node _T_869 = bits(io.trigger_pkt_any[3].tdata2, 6, 6) @[el2_lib.scala 197:75] + node _T_870 = bits(_T_819, 6, 6) @[el2_lib.scala 197:87] + node _T_871 = eq(_T_869, _T_870) @[el2_lib.scala 197:79] + node _T_872 = mux(_T_868, UInt<1>("h01"), _T_871) @[el2_lib.scala 197:24] + _T_821[6] <= _T_872 @[el2_lib.scala 197:18] + node _T_873 = bits(io.trigger_pkt_any[3].tdata2, 6, 0) @[el2_lib.scala 197:29] + node _T_874 = andr(_T_873) @[el2_lib.scala 197:37] + node _T_875 = and(_T_874, _T_826) @[el2_lib.scala 197:42] + node _T_876 = bits(io.trigger_pkt_any[3].tdata2, 7, 7) @[el2_lib.scala 197:75] + node _T_877 = bits(_T_819, 7, 7) @[el2_lib.scala 197:87] + node _T_878 = eq(_T_876, _T_877) @[el2_lib.scala 197:79] + node _T_879 = mux(_T_875, UInt<1>("h01"), _T_878) @[el2_lib.scala 197:24] + _T_821[7] <= _T_879 @[el2_lib.scala 197:18] + node _T_880 = bits(io.trigger_pkt_any[3].tdata2, 7, 0) @[el2_lib.scala 197:29] + node _T_881 = andr(_T_880) @[el2_lib.scala 197:37] + node _T_882 = and(_T_881, _T_826) @[el2_lib.scala 197:42] + node _T_883 = bits(io.trigger_pkt_any[3].tdata2, 8, 8) @[el2_lib.scala 197:75] + node _T_884 = bits(_T_819, 8, 8) @[el2_lib.scala 197:87] + node _T_885 = eq(_T_883, _T_884) @[el2_lib.scala 197:79] + node _T_886 = mux(_T_882, UInt<1>("h01"), _T_885) @[el2_lib.scala 197:24] + _T_821[8] <= _T_886 @[el2_lib.scala 197:18] + node _T_887 = bits(io.trigger_pkt_any[3].tdata2, 8, 0) @[el2_lib.scala 197:29] + node _T_888 = andr(_T_887) @[el2_lib.scala 197:37] + node _T_889 = and(_T_888, _T_826) @[el2_lib.scala 197:42] + node _T_890 = bits(io.trigger_pkt_any[3].tdata2, 9, 9) @[el2_lib.scala 197:75] + node _T_891 = bits(_T_819, 9, 9) @[el2_lib.scala 197:87] + node _T_892 = eq(_T_890, _T_891) @[el2_lib.scala 197:79] + node _T_893 = mux(_T_889, UInt<1>("h01"), _T_892) @[el2_lib.scala 197:24] + _T_821[9] <= _T_893 @[el2_lib.scala 197:18] + node _T_894 = bits(io.trigger_pkt_any[3].tdata2, 9, 0) @[el2_lib.scala 197:29] + node _T_895 = andr(_T_894) @[el2_lib.scala 197:37] + node _T_896 = and(_T_895, _T_826) @[el2_lib.scala 197:42] + node _T_897 = bits(io.trigger_pkt_any[3].tdata2, 10, 10) @[el2_lib.scala 197:75] + node _T_898 = bits(_T_819, 10, 10) @[el2_lib.scala 197:87] + node _T_899 = eq(_T_897, _T_898) @[el2_lib.scala 197:79] + node _T_900 = mux(_T_896, UInt<1>("h01"), _T_899) @[el2_lib.scala 197:24] + _T_821[10] <= _T_900 @[el2_lib.scala 197:18] + node _T_901 = bits(io.trigger_pkt_any[3].tdata2, 10, 0) @[el2_lib.scala 197:29] + node _T_902 = andr(_T_901) @[el2_lib.scala 197:37] + node _T_903 = and(_T_902, _T_826) @[el2_lib.scala 197:42] + node _T_904 = bits(io.trigger_pkt_any[3].tdata2, 11, 11) @[el2_lib.scala 197:75] + node _T_905 = bits(_T_819, 11, 11) @[el2_lib.scala 197:87] + node _T_906 = eq(_T_904, _T_905) @[el2_lib.scala 197:79] + node _T_907 = mux(_T_903, UInt<1>("h01"), _T_906) @[el2_lib.scala 197:24] + _T_821[11] <= _T_907 @[el2_lib.scala 197:18] + node _T_908 = bits(io.trigger_pkt_any[3].tdata2, 11, 0) @[el2_lib.scala 197:29] + node _T_909 = andr(_T_908) @[el2_lib.scala 197:37] + node _T_910 = and(_T_909, _T_826) @[el2_lib.scala 197:42] + node _T_911 = bits(io.trigger_pkt_any[3].tdata2, 12, 12) @[el2_lib.scala 197:75] + node _T_912 = bits(_T_819, 12, 12) @[el2_lib.scala 197:87] + node _T_913 = eq(_T_911, _T_912) @[el2_lib.scala 197:79] + node _T_914 = mux(_T_910, UInt<1>("h01"), _T_913) @[el2_lib.scala 197:24] + _T_821[12] <= _T_914 @[el2_lib.scala 197:18] + node _T_915 = bits(io.trigger_pkt_any[3].tdata2, 12, 0) @[el2_lib.scala 197:29] + node _T_916 = andr(_T_915) @[el2_lib.scala 197:37] + node _T_917 = and(_T_916, _T_826) @[el2_lib.scala 197:42] + node _T_918 = bits(io.trigger_pkt_any[3].tdata2, 13, 13) @[el2_lib.scala 197:75] + node _T_919 = bits(_T_819, 13, 13) @[el2_lib.scala 197:87] + node _T_920 = eq(_T_918, _T_919) @[el2_lib.scala 197:79] + node _T_921 = mux(_T_917, UInt<1>("h01"), _T_920) @[el2_lib.scala 197:24] + _T_821[13] <= _T_921 @[el2_lib.scala 197:18] + node _T_922 = bits(io.trigger_pkt_any[3].tdata2, 13, 0) @[el2_lib.scala 197:29] + node _T_923 = andr(_T_922) @[el2_lib.scala 197:37] + node _T_924 = and(_T_923, _T_826) @[el2_lib.scala 197:42] + node _T_925 = bits(io.trigger_pkt_any[3].tdata2, 14, 14) @[el2_lib.scala 197:75] + node _T_926 = bits(_T_819, 14, 14) @[el2_lib.scala 197:87] + node _T_927 = eq(_T_925, _T_926) @[el2_lib.scala 197:79] + node _T_928 = mux(_T_924, UInt<1>("h01"), _T_927) @[el2_lib.scala 197:24] + _T_821[14] <= _T_928 @[el2_lib.scala 197:18] + node _T_929 = bits(io.trigger_pkt_any[3].tdata2, 14, 0) @[el2_lib.scala 197:29] + node _T_930 = andr(_T_929) @[el2_lib.scala 197:37] + node _T_931 = and(_T_930, _T_826) @[el2_lib.scala 197:42] + node _T_932 = bits(io.trigger_pkt_any[3].tdata2, 15, 15) @[el2_lib.scala 197:75] + node _T_933 = bits(_T_819, 15, 15) @[el2_lib.scala 197:87] + node _T_934 = eq(_T_932, _T_933) @[el2_lib.scala 197:79] + node _T_935 = mux(_T_931, UInt<1>("h01"), _T_934) @[el2_lib.scala 197:24] + _T_821[15] <= _T_935 @[el2_lib.scala 197:18] + node _T_936 = bits(io.trigger_pkt_any[3].tdata2, 15, 0) @[el2_lib.scala 197:29] + node _T_937 = andr(_T_936) @[el2_lib.scala 197:37] + node _T_938 = and(_T_937, _T_826) @[el2_lib.scala 197:42] + node _T_939 = bits(io.trigger_pkt_any[3].tdata2, 16, 16) @[el2_lib.scala 197:75] + node _T_940 = bits(_T_819, 16, 16) @[el2_lib.scala 197:87] + node _T_941 = eq(_T_939, _T_940) @[el2_lib.scala 197:79] + node _T_942 = mux(_T_938, UInt<1>("h01"), _T_941) @[el2_lib.scala 197:24] + _T_821[16] <= _T_942 @[el2_lib.scala 197:18] + node _T_943 = bits(io.trigger_pkt_any[3].tdata2, 16, 0) @[el2_lib.scala 197:29] + node _T_944 = andr(_T_943) @[el2_lib.scala 197:37] + node _T_945 = and(_T_944, _T_826) @[el2_lib.scala 197:42] + node _T_946 = bits(io.trigger_pkt_any[3].tdata2, 17, 17) @[el2_lib.scala 197:75] + node _T_947 = bits(_T_819, 17, 17) @[el2_lib.scala 197:87] + node _T_948 = eq(_T_946, _T_947) @[el2_lib.scala 197:79] + node _T_949 = mux(_T_945, UInt<1>("h01"), _T_948) @[el2_lib.scala 197:24] + _T_821[17] <= _T_949 @[el2_lib.scala 197:18] + node _T_950 = bits(io.trigger_pkt_any[3].tdata2, 17, 0) @[el2_lib.scala 197:29] + node _T_951 = andr(_T_950) @[el2_lib.scala 197:37] + node _T_952 = and(_T_951, _T_826) @[el2_lib.scala 197:42] + node _T_953 = bits(io.trigger_pkt_any[3].tdata2, 18, 18) @[el2_lib.scala 197:75] + node _T_954 = bits(_T_819, 18, 18) @[el2_lib.scala 197:87] + node _T_955 = eq(_T_953, _T_954) @[el2_lib.scala 197:79] + node _T_956 = mux(_T_952, UInt<1>("h01"), _T_955) @[el2_lib.scala 197:24] + _T_821[18] <= _T_956 @[el2_lib.scala 197:18] + node _T_957 = bits(io.trigger_pkt_any[3].tdata2, 18, 0) @[el2_lib.scala 197:29] + node _T_958 = andr(_T_957) @[el2_lib.scala 197:37] + node _T_959 = and(_T_958, _T_826) @[el2_lib.scala 197:42] + node _T_960 = bits(io.trigger_pkt_any[3].tdata2, 19, 19) @[el2_lib.scala 197:75] + node _T_961 = bits(_T_819, 19, 19) @[el2_lib.scala 197:87] + node _T_962 = eq(_T_960, _T_961) @[el2_lib.scala 197:79] + node _T_963 = mux(_T_959, UInt<1>("h01"), _T_962) @[el2_lib.scala 197:24] + _T_821[19] <= _T_963 @[el2_lib.scala 197:18] + node _T_964 = bits(io.trigger_pkt_any[3].tdata2, 19, 0) @[el2_lib.scala 197:29] + node _T_965 = andr(_T_964) @[el2_lib.scala 197:37] + node _T_966 = and(_T_965, _T_826) @[el2_lib.scala 197:42] + node _T_967 = bits(io.trigger_pkt_any[3].tdata2, 20, 20) @[el2_lib.scala 197:75] + node _T_968 = bits(_T_819, 20, 20) @[el2_lib.scala 197:87] + node _T_969 = eq(_T_967, _T_968) @[el2_lib.scala 197:79] + node _T_970 = mux(_T_966, UInt<1>("h01"), _T_969) @[el2_lib.scala 197:24] + _T_821[20] <= _T_970 @[el2_lib.scala 197:18] + node _T_971 = bits(io.trigger_pkt_any[3].tdata2, 20, 0) @[el2_lib.scala 197:29] + node _T_972 = andr(_T_971) @[el2_lib.scala 197:37] + node _T_973 = and(_T_972, _T_826) @[el2_lib.scala 197:42] + node _T_974 = bits(io.trigger_pkt_any[3].tdata2, 21, 21) @[el2_lib.scala 197:75] + node _T_975 = bits(_T_819, 21, 21) @[el2_lib.scala 197:87] + node _T_976 = eq(_T_974, _T_975) @[el2_lib.scala 197:79] + node _T_977 = mux(_T_973, UInt<1>("h01"), _T_976) @[el2_lib.scala 197:24] + _T_821[21] <= _T_977 @[el2_lib.scala 197:18] + node _T_978 = bits(io.trigger_pkt_any[3].tdata2, 21, 0) @[el2_lib.scala 197:29] + node _T_979 = andr(_T_978) @[el2_lib.scala 197:37] + node _T_980 = and(_T_979, _T_826) @[el2_lib.scala 197:42] + node _T_981 = bits(io.trigger_pkt_any[3].tdata2, 22, 22) @[el2_lib.scala 197:75] + node _T_982 = bits(_T_819, 22, 22) @[el2_lib.scala 197:87] + node _T_983 = eq(_T_981, _T_982) @[el2_lib.scala 197:79] + node _T_984 = mux(_T_980, UInt<1>("h01"), _T_983) @[el2_lib.scala 197:24] + _T_821[22] <= _T_984 @[el2_lib.scala 197:18] + node _T_985 = bits(io.trigger_pkt_any[3].tdata2, 22, 0) @[el2_lib.scala 197:29] + node _T_986 = andr(_T_985) @[el2_lib.scala 197:37] + node _T_987 = and(_T_986, _T_826) @[el2_lib.scala 197:42] + node _T_988 = bits(io.trigger_pkt_any[3].tdata2, 23, 23) @[el2_lib.scala 197:75] + node _T_989 = bits(_T_819, 23, 23) @[el2_lib.scala 197:87] + node _T_990 = eq(_T_988, _T_989) @[el2_lib.scala 197:79] + node _T_991 = mux(_T_987, UInt<1>("h01"), _T_990) @[el2_lib.scala 197:24] + _T_821[23] <= _T_991 @[el2_lib.scala 197:18] + node _T_992 = bits(io.trigger_pkt_any[3].tdata2, 23, 0) @[el2_lib.scala 197:29] + node _T_993 = andr(_T_992) @[el2_lib.scala 197:37] + node _T_994 = and(_T_993, _T_826) @[el2_lib.scala 197:42] + node _T_995 = bits(io.trigger_pkt_any[3].tdata2, 24, 24) @[el2_lib.scala 197:75] + node _T_996 = bits(_T_819, 24, 24) @[el2_lib.scala 197:87] + node _T_997 = eq(_T_995, _T_996) @[el2_lib.scala 197:79] + node _T_998 = mux(_T_994, UInt<1>("h01"), _T_997) @[el2_lib.scala 197:24] + _T_821[24] <= _T_998 @[el2_lib.scala 197:18] + node _T_999 = bits(io.trigger_pkt_any[3].tdata2, 24, 0) @[el2_lib.scala 197:29] + node _T_1000 = andr(_T_999) @[el2_lib.scala 197:37] + node _T_1001 = and(_T_1000, _T_826) @[el2_lib.scala 197:42] + node _T_1002 = bits(io.trigger_pkt_any[3].tdata2, 25, 25) @[el2_lib.scala 197:75] + node _T_1003 = bits(_T_819, 25, 25) @[el2_lib.scala 197:87] + node _T_1004 = eq(_T_1002, _T_1003) @[el2_lib.scala 197:79] + node _T_1005 = mux(_T_1001, UInt<1>("h01"), _T_1004) @[el2_lib.scala 197:24] + _T_821[25] <= _T_1005 @[el2_lib.scala 197:18] + node _T_1006 = bits(io.trigger_pkt_any[3].tdata2, 25, 0) @[el2_lib.scala 197:29] + node _T_1007 = andr(_T_1006) @[el2_lib.scala 197:37] + node _T_1008 = and(_T_1007, _T_826) @[el2_lib.scala 197:42] + node _T_1009 = bits(io.trigger_pkt_any[3].tdata2, 26, 26) @[el2_lib.scala 197:75] + node _T_1010 = bits(_T_819, 26, 26) @[el2_lib.scala 197:87] + node _T_1011 = eq(_T_1009, _T_1010) @[el2_lib.scala 197:79] + node _T_1012 = mux(_T_1008, UInt<1>("h01"), _T_1011) @[el2_lib.scala 197:24] + _T_821[26] <= _T_1012 @[el2_lib.scala 197:18] + node _T_1013 = bits(io.trigger_pkt_any[3].tdata2, 26, 0) @[el2_lib.scala 197:29] + node _T_1014 = andr(_T_1013) @[el2_lib.scala 197:37] + node _T_1015 = and(_T_1014, _T_826) @[el2_lib.scala 197:42] + node _T_1016 = bits(io.trigger_pkt_any[3].tdata2, 27, 27) @[el2_lib.scala 197:75] + node _T_1017 = bits(_T_819, 27, 27) @[el2_lib.scala 197:87] + node _T_1018 = eq(_T_1016, _T_1017) @[el2_lib.scala 197:79] + node _T_1019 = mux(_T_1015, UInt<1>("h01"), _T_1018) @[el2_lib.scala 197:24] + _T_821[27] <= _T_1019 @[el2_lib.scala 197:18] + node _T_1020 = bits(io.trigger_pkt_any[3].tdata2, 27, 0) @[el2_lib.scala 197:29] + node _T_1021 = andr(_T_1020) @[el2_lib.scala 197:37] + node _T_1022 = and(_T_1021, _T_826) @[el2_lib.scala 197:42] + node _T_1023 = bits(io.trigger_pkt_any[3].tdata2, 28, 28) @[el2_lib.scala 197:75] + node _T_1024 = bits(_T_819, 28, 28) @[el2_lib.scala 197:87] + node _T_1025 = eq(_T_1023, _T_1024) @[el2_lib.scala 197:79] + node _T_1026 = mux(_T_1022, UInt<1>("h01"), _T_1025) @[el2_lib.scala 197:24] + _T_821[28] <= _T_1026 @[el2_lib.scala 197:18] + node _T_1027 = bits(io.trigger_pkt_any[3].tdata2, 28, 0) @[el2_lib.scala 197:29] + node _T_1028 = andr(_T_1027) @[el2_lib.scala 197:37] + node _T_1029 = and(_T_1028, _T_826) @[el2_lib.scala 197:42] + node _T_1030 = bits(io.trigger_pkt_any[3].tdata2, 29, 29) @[el2_lib.scala 197:75] + node _T_1031 = bits(_T_819, 29, 29) @[el2_lib.scala 197:87] + node _T_1032 = eq(_T_1030, _T_1031) @[el2_lib.scala 197:79] + node _T_1033 = mux(_T_1029, UInt<1>("h01"), _T_1032) @[el2_lib.scala 197:24] + _T_821[29] <= _T_1033 @[el2_lib.scala 197:18] + node _T_1034 = bits(io.trigger_pkt_any[3].tdata2, 29, 0) @[el2_lib.scala 197:29] + node _T_1035 = andr(_T_1034) @[el2_lib.scala 197:37] + node _T_1036 = and(_T_1035, _T_826) @[el2_lib.scala 197:42] + node _T_1037 = bits(io.trigger_pkt_any[3].tdata2, 30, 30) @[el2_lib.scala 197:75] + node _T_1038 = bits(_T_819, 30, 30) @[el2_lib.scala 197:87] + node _T_1039 = eq(_T_1037, _T_1038) @[el2_lib.scala 197:79] + node _T_1040 = mux(_T_1036, UInt<1>("h01"), _T_1039) @[el2_lib.scala 197:24] + _T_821[30] <= _T_1040 @[el2_lib.scala 197:18] + node _T_1041 = bits(io.trigger_pkt_any[3].tdata2, 30, 0) @[el2_lib.scala 197:29] + node _T_1042 = andr(_T_1041) @[el2_lib.scala 197:37] + node _T_1043 = and(_T_1042, _T_826) @[el2_lib.scala 197:42] + node _T_1044 = bits(io.trigger_pkt_any[3].tdata2, 31, 31) @[el2_lib.scala 197:75] + node _T_1045 = bits(_T_819, 31, 31) @[el2_lib.scala 197:87] + node _T_1046 = eq(_T_1044, _T_1045) @[el2_lib.scala 197:79] + node _T_1047 = mux(_T_1043, UInt<1>("h01"), _T_1046) @[el2_lib.scala 197:24] + _T_821[31] <= _T_1047 @[el2_lib.scala 197:18] + node _T_1048 = cat(_T_821[1], _T_821[0]) @[el2_lib.scala 198:14] + node _T_1049 = cat(_T_821[3], _T_821[2]) @[el2_lib.scala 198:14] + node _T_1050 = cat(_T_1049, _T_1048) @[el2_lib.scala 198:14] + node _T_1051 = cat(_T_821[5], _T_821[4]) @[el2_lib.scala 198:14] + node _T_1052 = cat(_T_821[7], _T_821[6]) @[el2_lib.scala 198:14] + node _T_1053 = cat(_T_1052, _T_1051) @[el2_lib.scala 198:14] + node _T_1054 = cat(_T_1053, _T_1050) @[el2_lib.scala 198:14] + node _T_1055 = cat(_T_821[9], _T_821[8]) @[el2_lib.scala 198:14] + node _T_1056 = cat(_T_821[11], _T_821[10]) @[el2_lib.scala 198:14] + node _T_1057 = cat(_T_1056, _T_1055) @[el2_lib.scala 198:14] + node _T_1058 = cat(_T_821[13], _T_821[12]) @[el2_lib.scala 198:14] + node _T_1059 = cat(_T_821[15], _T_821[14]) @[el2_lib.scala 198:14] + node _T_1060 = cat(_T_1059, _T_1058) @[el2_lib.scala 198:14] + node _T_1061 = cat(_T_1060, _T_1057) @[el2_lib.scala 198:14] + node _T_1062 = cat(_T_1061, _T_1054) @[el2_lib.scala 198:14] + node _T_1063 = cat(_T_821[17], _T_821[16]) @[el2_lib.scala 198:14] + node _T_1064 = cat(_T_821[19], _T_821[18]) @[el2_lib.scala 198:14] + node _T_1065 = cat(_T_1064, _T_1063) @[el2_lib.scala 198:14] + node _T_1066 = cat(_T_821[21], _T_821[20]) @[el2_lib.scala 198:14] + node _T_1067 = cat(_T_821[23], _T_821[22]) @[el2_lib.scala 198:14] + node _T_1068 = cat(_T_1067, _T_1066) @[el2_lib.scala 198:14] + node _T_1069 = cat(_T_1068, _T_1065) @[el2_lib.scala 198:14] + node _T_1070 = cat(_T_821[25], _T_821[24]) @[el2_lib.scala 198:14] + node _T_1071 = cat(_T_821[27], _T_821[26]) @[el2_lib.scala 198:14] + node _T_1072 = cat(_T_1071, _T_1070) @[el2_lib.scala 198:14] + node _T_1073 = cat(_T_821[29], _T_821[28]) @[el2_lib.scala 198:14] + node _T_1074 = cat(_T_821[31], _T_821[30]) @[el2_lib.scala 198:14] + node _T_1075 = cat(_T_1074, _T_1073) @[el2_lib.scala 198:14] + node _T_1076 = cat(_T_1075, _T_1072) @[el2_lib.scala 198:14] + node _T_1077 = cat(_T_1076, _T_1069) @[el2_lib.scala 198:14] + node _T_1078 = cat(_T_1077, _T_1062) @[el2_lib.scala 198:14] + node lsu_trigger_data_match_3 = andr(_T_1078) @[el2_lib.scala 198:21] + node _T_1079 = eq(io.lsu_pkt_m.dma, UInt<1>("h00")) @[el2_lsu_trigger.scala 26:74] + node _T_1080 = and(io.lsu_pkt_m.valid, _T_1079) @[el2_lsu_trigger.scala 26:72] + node _T_1081 = and(io.trigger_pkt_any[0].store, io.lsu_pkt_m.store) @[el2_lsu_trigger.scala 26:123] + node _T_1082 = and(_T_1080, _T_1081) @[el2_lsu_trigger.scala 26:92] + node _T_1083 = and(io.trigger_pkt_any[0].load, io.lsu_pkt_m.load) @[el2_lsu_trigger.scala 27:33] + node _T_1084 = eq(io.trigger_pkt_any[0].select, UInt<1>("h00")) @[el2_lsu_trigger.scala 27:55] + node _T_1085 = and(_T_1083, _T_1084) @[el2_lsu_trigger.scala 27:53] + node _T_1086 = and(_T_1085, lsu_trigger_data_match_0) @[el2_lsu_trigger.scala 27:85] + node _T_1087 = or(_T_1082, _T_1086) @[el2_lsu_trigger.scala 26:144] + node _T_1088 = eq(io.lsu_pkt_m.dma, UInt<1>("h00")) @[el2_lsu_trigger.scala 26:74] + node _T_1089 = and(io.lsu_pkt_m.valid, _T_1088) @[el2_lsu_trigger.scala 26:72] + node _T_1090 = and(io.trigger_pkt_any[1].store, io.lsu_pkt_m.store) @[el2_lsu_trigger.scala 26:123] + node _T_1091 = and(_T_1089, _T_1090) @[el2_lsu_trigger.scala 26:92] + node _T_1092 = and(io.trigger_pkt_any[1].load, io.lsu_pkt_m.load) @[el2_lsu_trigger.scala 27:33] + node _T_1093 = eq(io.trigger_pkt_any[1].select, UInt<1>("h00")) @[el2_lsu_trigger.scala 27:55] + node _T_1094 = and(_T_1092, _T_1093) @[el2_lsu_trigger.scala 27:53] + node _T_1095 = and(_T_1094, lsu_trigger_data_match_1) @[el2_lsu_trigger.scala 27:85] + node _T_1096 = or(_T_1091, _T_1095) @[el2_lsu_trigger.scala 26:144] + node _T_1097 = eq(io.lsu_pkt_m.dma, UInt<1>("h00")) @[el2_lsu_trigger.scala 26:74] + node _T_1098 = and(io.lsu_pkt_m.valid, _T_1097) @[el2_lsu_trigger.scala 26:72] + node _T_1099 = and(io.trigger_pkt_any[2].store, io.lsu_pkt_m.store) @[el2_lsu_trigger.scala 26:123] + node _T_1100 = and(_T_1098, _T_1099) @[el2_lsu_trigger.scala 26:92] + node _T_1101 = and(io.trigger_pkt_any[2].load, io.lsu_pkt_m.load) @[el2_lsu_trigger.scala 27:33] + node _T_1102 = eq(io.trigger_pkt_any[2].select, UInt<1>("h00")) @[el2_lsu_trigger.scala 27:55] + node _T_1103 = and(_T_1101, _T_1102) @[el2_lsu_trigger.scala 27:53] + node _T_1104 = and(_T_1103, lsu_trigger_data_match_2) @[el2_lsu_trigger.scala 27:85] + node _T_1105 = or(_T_1100, _T_1104) @[el2_lsu_trigger.scala 26:144] + node _T_1106 = eq(io.lsu_pkt_m.dma, UInt<1>("h00")) @[el2_lsu_trigger.scala 26:74] + node _T_1107 = and(io.lsu_pkt_m.valid, _T_1106) @[el2_lsu_trigger.scala 26:72] + node _T_1108 = and(io.trigger_pkt_any[3].store, io.lsu_pkt_m.store) @[el2_lsu_trigger.scala 26:123] + node _T_1109 = and(_T_1107, _T_1108) @[el2_lsu_trigger.scala 26:92] + node _T_1110 = and(io.trigger_pkt_any[3].load, io.lsu_pkt_m.load) @[el2_lsu_trigger.scala 27:33] + node _T_1111 = eq(io.trigger_pkt_any[3].select, UInt<1>("h00")) @[el2_lsu_trigger.scala 27:55] + node _T_1112 = and(_T_1110, _T_1111) @[el2_lsu_trigger.scala 27:53] + node _T_1113 = and(_T_1112, lsu_trigger_data_match_3) @[el2_lsu_trigger.scala 27:85] + node _T_1114 = or(_T_1109, _T_1113) @[el2_lsu_trigger.scala 26:144] + wire _T_1115 : UInt<1>[4] @[el2_lsu_trigger.scala 26:48] + _T_1115[0] <= _T_1087 @[el2_lsu_trigger.scala 26:48] + _T_1115[1] <= _T_1096 @[el2_lsu_trigger.scala 26:48] + _T_1115[2] <= _T_1105 @[el2_lsu_trigger.scala 26:48] + _T_1115[3] <= _T_1114 @[el2_lsu_trigger.scala 26:48] + node _T_1116 = cat(_T_1115[3], _T_1115[2]) @[Cat.scala 29:58] + node _T_1117 = cat(_T_1116, _T_1115[1]) @[Cat.scala 29:58] + node _T_1118 = cat(_T_1117, _T_1115[0]) @[Cat.scala 29:58] + io.lsu_trigger_match_m <= _T_1118 @[el2_lsu_trigger.scala 26:26] + + extmodule TEC_RV_ICG_2 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_2 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_2 @[beh_lib.scala 331:24] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[beh_lib.scala 332:12] + clkhdr.CK <= io.clk @[beh_lib.scala 333:16] + clkhdr.EN <= io.en @[beh_lib.scala 334:16] + clkhdr.SE <= io.scan_mode @[beh_lib.scala 335:16] + + extmodule TEC_RV_ICG_3 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_3 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_3 @[beh_lib.scala 331:24] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[beh_lib.scala 332:12] + clkhdr.CK <= io.clk @[beh_lib.scala 333:16] + clkhdr.EN <= io.en @[beh_lib.scala 334:16] + clkhdr.SE <= io.scan_mode @[beh_lib.scala 335:16] + + extmodule TEC_RV_ICG_4 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_4 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_4 @[beh_lib.scala 331:24] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[beh_lib.scala 332:12] + clkhdr.CK <= io.clk @[beh_lib.scala 333:16] + clkhdr.EN <= io.en @[beh_lib.scala 334:16] + clkhdr.SE <= io.scan_mode @[beh_lib.scala 335:16] + + extmodule TEC_RV_ICG_5 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_5 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_5 @[beh_lib.scala 331:24] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[beh_lib.scala 332:12] + clkhdr.CK <= io.clk @[beh_lib.scala 333:16] + clkhdr.EN <= io.en @[beh_lib.scala 334:16] + clkhdr.SE <= io.scan_mode @[beh_lib.scala 335:16] + + extmodule TEC_RV_ICG_6 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_6 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_6 @[beh_lib.scala 331:24] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[beh_lib.scala 332:12] + clkhdr.CK <= io.clk @[beh_lib.scala 333:16] + clkhdr.EN <= io.en @[beh_lib.scala 334:16] + clkhdr.SE <= io.scan_mode @[beh_lib.scala 335:16] + + extmodule TEC_RV_ICG_7 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_7 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_7 @[beh_lib.scala 331:24] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[beh_lib.scala 332:12] + clkhdr.CK <= io.clk @[beh_lib.scala 333:16] + clkhdr.EN <= io.en @[beh_lib.scala 334:16] + clkhdr.SE <= io.scan_mode @[beh_lib.scala 335:16] + + extmodule TEC_RV_ICG_8 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_8 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_8 @[beh_lib.scala 331:24] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[beh_lib.scala 332:12] + clkhdr.CK <= io.clk @[beh_lib.scala 333:16] + clkhdr.EN <= io.en @[beh_lib.scala 334:16] + clkhdr.SE <= io.scan_mode @[beh_lib.scala 335:16] + + extmodule TEC_RV_ICG_9 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_9 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_9 @[beh_lib.scala 331:24] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[beh_lib.scala 332:12] + clkhdr.CK <= io.clk @[beh_lib.scala 333:16] + clkhdr.EN <= io.en @[beh_lib.scala 334:16] + clkhdr.SE <= io.scan_mode @[beh_lib.scala 335:16] + + extmodule TEC_RV_ICG_10 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_10 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_10 @[beh_lib.scala 331:24] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[beh_lib.scala 332:12] + clkhdr.CK <= io.clk @[beh_lib.scala 333:16] + clkhdr.EN <= io.en @[beh_lib.scala 334:16] + clkhdr.SE <= io.scan_mode @[beh_lib.scala 335:16] + + extmodule TEC_RV_ICG_11 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_11 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_11 @[beh_lib.scala 331:24] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[beh_lib.scala 332:12] + clkhdr.CK <= io.clk @[beh_lib.scala 333:16] + clkhdr.EN <= io.en @[beh_lib.scala 334:16] + clkhdr.SE <= io.scan_mode @[beh_lib.scala 335:16] + + extmodule TEC_RV_ICG_12 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_12 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_12 @[beh_lib.scala 331:24] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[beh_lib.scala 332:12] + clkhdr.CK <= io.clk @[beh_lib.scala 333:16] + clkhdr.EN <= io.en @[beh_lib.scala 334:16] + clkhdr.SE <= io.scan_mode @[beh_lib.scala 335:16] + + extmodule TEC_RV_ICG_13 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_13 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_13 @[beh_lib.scala 331:24] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[beh_lib.scala 332:12] + clkhdr.CK <= io.clk @[beh_lib.scala 333:16] + clkhdr.EN <= io.en @[beh_lib.scala 334:16] + clkhdr.SE <= io.scan_mode @[beh_lib.scala 335:16] + + module el2_lsu_clkdomain : + input clock : Clock + input reset : Reset + output io : {flip free_clk : Clock, flip clk_override : UInt<1>, flip addr_in_dccm_m : UInt<1>, flip dma_dccm_req : UInt<1>, flip ldst_stbuf_reqvld_r : UInt<1>, flip stbuf_reqvld_any : UInt<1>, flip stbuf_reqvld_flushed_any : UInt<1>, flip lsu_busreq_r : UInt<1>, flip lsu_bus_buffer_pend_any : UInt<1>, flip lsu_bus_buffer_empty_any : UInt<1>, flip lsu_stbuf_empty_any : UInt<1>, flip lsu_bus_clk_en : UInt<1>, flip lsu_p : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip lsu_pkt_d : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip lsu_pkt_m : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip lsu_pkt_r : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, lsu_c1_m_clk : Clock, lsu_c1_r_clk : Clock, lsu_c2_m_clk : Clock, lsu_c2_r_clk : Clock, lsu_store_c1_m_clk : Clock, lsu_store_c1_r_clk : Clock, lsu_stbuf_c1_clk : Clock, lsu_bus_obuf_c1_clk : Clock, lsu_bus_ibuf_c1_clk : Clock, lsu_bus_buf_c1_clk : Clock, lsu_busm_clk : Clock, lsu_free_c2_clk : Clock, flip scan_mode : UInt<1>} + + wire lsu_c1_d_clken_q : UInt<1> @[el2_lsu_clkdomain.scala 60:36] + wire lsu_c1_m_clken_q : UInt<1> @[el2_lsu_clkdomain.scala 61:36] + wire lsu_c1_r_clken_q : UInt<1> @[el2_lsu_clkdomain.scala 62:36] + wire lsu_free_c1_clken_q : UInt<1> @[el2_lsu_clkdomain.scala 63:36] + node _T = or(io.lsu_p.valid, io.dma_dccm_req) @[el2_lsu_clkdomain.scala 64:51] + node lsu_c1_d_clken = or(_T, io.clk_override) @[el2_lsu_clkdomain.scala 64:70] + node _T_1 = or(io.lsu_pkt_d.valid, lsu_c1_d_clken_q) @[el2_lsu_clkdomain.scala 65:51] + node lsu_c1_m_clken = or(_T_1, io.clk_override) @[el2_lsu_clkdomain.scala 65:70] + node _T_2 = or(io.lsu_pkt_m.valid, lsu_c1_m_clken_q) @[el2_lsu_clkdomain.scala 66:51] + node lsu_c1_r_clken = or(_T_2, io.clk_override) @[el2_lsu_clkdomain.scala 66:70] + node _T_3 = or(lsu_c1_m_clken, lsu_c1_m_clken_q) @[el2_lsu_clkdomain.scala 68:47] + node lsu_c2_m_clken = or(_T_3, io.clk_override) @[el2_lsu_clkdomain.scala 68:66] + node _T_4 = or(lsu_c1_r_clken, lsu_c1_r_clken_q) @[el2_lsu_clkdomain.scala 69:47] + node lsu_c2_r_clken = or(_T_4, io.clk_override) @[el2_lsu_clkdomain.scala 69:66] + node _T_5 = and(lsu_c1_m_clken, io.lsu_pkt_d.store) @[el2_lsu_clkdomain.scala 71:49] + node lsu_store_c1_m_clken = or(_T_5, io.clk_override) @[el2_lsu_clkdomain.scala 71:71] + node _T_6 = and(lsu_c1_r_clken, io.lsu_pkt_m.store) @[el2_lsu_clkdomain.scala 72:49] + node lsu_store_c1_r_clken = or(_T_6, io.clk_override) @[el2_lsu_clkdomain.scala 72:71] + node _T_7 = or(io.ldst_stbuf_reqvld_r, io.stbuf_reqvld_any) @[el2_lsu_clkdomain.scala 73:55] + node _T_8 = or(_T_7, io.stbuf_reqvld_flushed_any) @[el2_lsu_clkdomain.scala 73:77] + node lsu_stbuf_c1_clken = or(_T_8, io.clk_override) @[el2_lsu_clkdomain.scala 73:107] + node lsu_bus_ibuf_c1_clken = or(io.lsu_busreq_r, io.clk_override) @[el2_lsu_clkdomain.scala 74:49] + node _T_9 = or(io.lsu_bus_buffer_pend_any, io.lsu_busreq_r) @[el2_lsu_clkdomain.scala 75:61] + node _T_10 = or(_T_9, io.clk_override) @[el2_lsu_clkdomain.scala 75:79] + node lsu_bus_obuf_c1_clken = and(_T_10, io.lsu_bus_clk_en) @[el2_lsu_clkdomain.scala 75:98] + node _T_11 = eq(io.lsu_bus_buffer_empty_any, UInt<1>("h00")) @[el2_lsu_clkdomain.scala 76:32] + node _T_12 = or(_T_11, io.lsu_busreq_r) @[el2_lsu_clkdomain.scala 76:61] + node lsu_bus_buf_c1_clken = or(_T_12, io.clk_override) @[el2_lsu_clkdomain.scala 76:79] + node _T_13 = or(io.lsu_p.valid, io.lsu_pkt_d.valid) @[el2_lsu_clkdomain.scala 78:48] + node _T_14 = or(_T_13, io.lsu_pkt_m.valid) @[el2_lsu_clkdomain.scala 78:69] + node _T_15 = or(_T_14, io.lsu_pkt_r.valid) @[el2_lsu_clkdomain.scala 78:90] + node _T_16 = eq(io.lsu_bus_buffer_empty_any, UInt<1>("h00")) @[el2_lsu_clkdomain.scala 78:114] + node _T_17 = or(_T_15, _T_16) @[el2_lsu_clkdomain.scala 78:112] + node _T_18 = eq(io.lsu_stbuf_empty_any, UInt<1>("h00")) @[el2_lsu_clkdomain.scala 78:145] + node _T_19 = or(_T_17, _T_18) @[el2_lsu_clkdomain.scala 78:143] + node lsu_free_c1_clken = or(_T_19, io.clk_override) @[el2_lsu_clkdomain.scala 78:169] + node _T_20 = or(lsu_free_c1_clken, lsu_free_c1_clken_q) @[el2_lsu_clkdomain.scala 79:50] + node lsu_free_c2_clken = or(_T_20, io.clk_override) @[el2_lsu_clkdomain.scala 79:72] + reg _T_21 : UInt, io.free_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_clkdomain.scala 82:60] + _T_21 <= lsu_free_c1_clken @[el2_lsu_clkdomain.scala 82:60] + lsu_free_c1_clken_q <= _T_21 @[el2_lsu_clkdomain.scala 82:26] + reg _T_22 : UInt, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_clkdomain.scala 84:67] + _T_22 <= lsu_c1_d_clken @[el2_lsu_clkdomain.scala 84:67] + lsu_c1_d_clken_q <= _T_22 @[el2_lsu_clkdomain.scala 84:26] + reg _T_23 : UInt, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_clkdomain.scala 85:67] + _T_23 <= lsu_c1_m_clken @[el2_lsu_clkdomain.scala 85:67] + lsu_c1_m_clken_q <= _T_23 @[el2_lsu_clkdomain.scala 85:26] + reg _T_24 : UInt, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_clkdomain.scala 86:67] + _T_24 <= lsu_c1_r_clken @[el2_lsu_clkdomain.scala 86:67] + lsu_c1_r_clken_q <= _T_24 @[el2_lsu_clkdomain.scala 86:26] + inst lsu_c1m_cgc of rvclkhdr_2 @[el2_lsu_clkdomain.scala 88:35] + lsu_c1m_cgc.clock <= clock + lsu_c1m_cgc.reset <= reset + lsu_c1m_cgc.io.en <= lsu_c1_m_clken @[el2_lsu_clkdomain.scala 88:77] + io.lsu_c1_m_clk <= lsu_c1m_cgc.io.l1clk @[el2_lsu_clkdomain.scala 88:127] + inst lsu_c1r_cgc of rvclkhdr_3 @[el2_lsu_clkdomain.scala 89:35] + lsu_c1r_cgc.clock <= clock + lsu_c1r_cgc.reset <= reset + lsu_c1r_cgc.io.en <= lsu_c1_r_clken @[el2_lsu_clkdomain.scala 89:77] + io.lsu_c1_r_clk <= lsu_c1r_cgc.io.l1clk @[el2_lsu_clkdomain.scala 89:127] + inst lsu_c2m_cgc of rvclkhdr_4 @[el2_lsu_clkdomain.scala 90:35] + lsu_c2m_cgc.clock <= clock + lsu_c2m_cgc.reset <= reset + lsu_c2m_cgc.io.en <= lsu_c2_m_clken @[el2_lsu_clkdomain.scala 90:77] + io.lsu_c2_m_clk <= lsu_c2m_cgc.io.l1clk @[el2_lsu_clkdomain.scala 90:127] + inst lsu_c2r_cgc of rvclkhdr_5 @[el2_lsu_clkdomain.scala 91:35] + lsu_c2r_cgc.clock <= clock + lsu_c2r_cgc.reset <= reset + lsu_c2r_cgc.io.en <= lsu_c2_r_clken @[el2_lsu_clkdomain.scala 91:77] + io.lsu_c2_r_clk <= lsu_c2r_cgc.io.l1clk @[el2_lsu_clkdomain.scala 91:127] + inst lsu_store_c1m_cgc of rvclkhdr_6 @[el2_lsu_clkdomain.scala 92:35] + lsu_store_c1m_cgc.clock <= clock + lsu_store_c1m_cgc.reset <= reset + lsu_store_c1m_cgc.io.en <= lsu_store_c1_m_clken @[el2_lsu_clkdomain.scala 92:77] + io.lsu_store_c1_m_clk <= lsu_store_c1m_cgc.io.l1clk @[el2_lsu_clkdomain.scala 92:127] + inst lsu_store_c1r_cgc of rvclkhdr_7 @[el2_lsu_clkdomain.scala 93:35] + lsu_store_c1r_cgc.clock <= clock + lsu_store_c1r_cgc.reset <= reset + lsu_store_c1r_cgc.io.en <= lsu_store_c1_r_clken @[el2_lsu_clkdomain.scala 93:77] + io.lsu_store_c1_r_clk <= lsu_store_c1r_cgc.io.l1clk @[el2_lsu_clkdomain.scala 93:127] + inst lsu_stbuf_c1_cgc of rvclkhdr_8 @[el2_lsu_clkdomain.scala 94:35] + lsu_stbuf_c1_cgc.clock <= clock + lsu_stbuf_c1_cgc.reset <= reset + lsu_stbuf_c1_cgc.io.en <= lsu_stbuf_c1_clken @[el2_lsu_clkdomain.scala 94:77] + io.lsu_stbuf_c1_clk <= lsu_stbuf_c1_cgc.io.l1clk @[el2_lsu_clkdomain.scala 94:127] + inst lsu_bus_ibuf_c1_cgc of rvclkhdr_9 @[el2_lsu_clkdomain.scala 95:35] + lsu_bus_ibuf_c1_cgc.clock <= clock + lsu_bus_ibuf_c1_cgc.reset <= reset + lsu_bus_ibuf_c1_cgc.io.en <= lsu_bus_ibuf_c1_clken @[el2_lsu_clkdomain.scala 95:77] + io.lsu_bus_ibuf_c1_clk <= lsu_bus_ibuf_c1_cgc.io.l1clk @[el2_lsu_clkdomain.scala 95:127] + inst lsu_bus_obuf_c1_cgc of rvclkhdr_10 @[el2_lsu_clkdomain.scala 96:35] + lsu_bus_obuf_c1_cgc.clock <= clock + lsu_bus_obuf_c1_cgc.reset <= reset + lsu_bus_obuf_c1_cgc.io.en <= lsu_bus_obuf_c1_clken @[el2_lsu_clkdomain.scala 96:77] + io.lsu_bus_obuf_c1_clk <= lsu_bus_obuf_c1_cgc.io.l1clk @[el2_lsu_clkdomain.scala 96:127] + inst lsu_bus_buf_c1_cgc of rvclkhdr_11 @[el2_lsu_clkdomain.scala 97:35] + lsu_bus_buf_c1_cgc.clock <= clock + lsu_bus_buf_c1_cgc.reset <= reset + lsu_bus_buf_c1_cgc.io.en <= lsu_bus_buf_c1_clken @[el2_lsu_clkdomain.scala 97:77] + io.lsu_bus_buf_c1_clk <= lsu_bus_buf_c1_cgc.io.l1clk @[el2_lsu_clkdomain.scala 97:127] + inst lsu_busm_cgc of rvclkhdr_12 @[el2_lsu_clkdomain.scala 98:35] + lsu_busm_cgc.clock <= clock + lsu_busm_cgc.reset <= reset + lsu_busm_cgc.io.en <= io.lsu_bus_clk_en @[el2_lsu_clkdomain.scala 98:77] + io.lsu_busm_clk <= lsu_busm_cgc.io.l1clk @[el2_lsu_clkdomain.scala 98:127] + inst lsu_free_cgc of rvclkhdr_13 @[el2_lsu_clkdomain.scala 99:35] + lsu_free_cgc.clock <= clock + lsu_free_cgc.reset <= reset + lsu_free_cgc.io.en <= lsu_free_c2_clken @[el2_lsu_clkdomain.scala 99:77] + io.lsu_free_c2_clk <= lsu_free_cgc.io.l1clk @[el2_lsu_clkdomain.scala 99:127] + lsu_c1m_cgc.io.clk <= clock @[el2_lsu_clkdomain.scala 101:30] + lsu_c1m_cgc.io.scan_mode <= io.scan_mode @[el2_lsu_clkdomain.scala 101:75] + lsu_c1r_cgc.io.clk <= clock @[el2_lsu_clkdomain.scala 102:30] + lsu_c1r_cgc.io.scan_mode <= io.scan_mode @[el2_lsu_clkdomain.scala 102:75] + lsu_c2m_cgc.io.clk <= clock @[el2_lsu_clkdomain.scala 103:30] + lsu_c2m_cgc.io.scan_mode <= io.scan_mode @[el2_lsu_clkdomain.scala 103:75] + lsu_c2r_cgc.io.clk <= clock @[el2_lsu_clkdomain.scala 104:30] + lsu_c2r_cgc.io.scan_mode <= io.scan_mode @[el2_lsu_clkdomain.scala 104:75] + lsu_store_c1m_cgc.io.clk <= clock @[el2_lsu_clkdomain.scala 105:30] + lsu_store_c1m_cgc.io.scan_mode <= io.scan_mode @[el2_lsu_clkdomain.scala 105:75] + lsu_store_c1r_cgc.io.clk <= clock @[el2_lsu_clkdomain.scala 106:30] + lsu_store_c1r_cgc.io.scan_mode <= io.scan_mode @[el2_lsu_clkdomain.scala 106:75] + lsu_stbuf_c1_cgc.io.clk <= clock @[el2_lsu_clkdomain.scala 107:30] + lsu_stbuf_c1_cgc.io.scan_mode <= io.scan_mode @[el2_lsu_clkdomain.scala 107:75] + lsu_bus_ibuf_c1_cgc.io.clk <= clock @[el2_lsu_clkdomain.scala 108:30] + lsu_bus_ibuf_c1_cgc.io.scan_mode <= io.scan_mode @[el2_lsu_clkdomain.scala 108:75] + lsu_bus_obuf_c1_cgc.io.clk <= clock @[el2_lsu_clkdomain.scala 109:30] + lsu_bus_obuf_c1_cgc.io.scan_mode <= io.scan_mode @[el2_lsu_clkdomain.scala 109:75] + lsu_bus_buf_c1_cgc.io.clk <= clock @[el2_lsu_clkdomain.scala 110:30] + lsu_bus_buf_c1_cgc.io.scan_mode <= io.scan_mode @[el2_lsu_clkdomain.scala 110:75] + lsu_busm_cgc.io.clk <= clock @[el2_lsu_clkdomain.scala 111:30] + lsu_busm_cgc.io.scan_mode <= io.scan_mode @[el2_lsu_clkdomain.scala 111:75] + lsu_free_cgc.io.clk <= clock @[el2_lsu_clkdomain.scala 112:30] + lsu_free_cgc.io.scan_mode <= io.scan_mode @[el2_lsu_clkdomain.scala 112:75] + + module el2_lsu_bus_intf : + input clock : Clock + input reset : Reset + output io : {flip scan_mode : UInt<1>, flip dec_tlu_external_ldfwd_disable : UInt<1>, flip dec_tlu_wb_coalescing_disable : UInt<1>, flip dec_tlu_sideeffect_posted_disable : UInt<1>, flip lsu_c1_m_clk : Clock, flip lsu_c1_r_clk : Clock, flip lsu_c2_r_clk : Clock, flip lsu_bus_ibuf_c1_clk : Clock, flip lsu_bus_obuf_c1_clk : Clock, flip lsu_bus_buf_c1_clk : Clock, flip lsu_free_c2_clk : Clock, flip free_clk : Clock, flip lsu_busm_clk : Clock, flip dec_lsu_valid_raw_d : UInt<1>, flip lsu_busreq_m : UInt<1>, flip lsu_addr_d : UInt<32>, flip lsu_addr_m : UInt<32>, flip lsu_addr_r : UInt<32>, flip end_addr_d : UInt<32>, flip end_addr_m : UInt<32>, flip end_addr_r : UInt<32>, flip store_data_m : UInt<32>, flip dec_tlu_force_halt : UInt<1>, flip lsu_commit_r : UInt<1>, flip is_sideeffects_m : UInt<1>, flip flush_m_up : UInt<1>, flip flush_r : UInt<1>, lsu_busreq_r : UInt<1>, lsu_bus_buffer_pend_any : UInt<1>, lsu_bus_buffer_full_any : UInt<1>, lsu_bus_buffer_empty_any : UInt<1>, lsu_bus_idle_any : UInt<1>, bus_read_data_m : UInt<32>, lsu_imprecise_error_load_any : UInt<1>, lsu_imprecise_error_store_any : UInt<1>, lsu_imprecise_error_addr_any : UInt<32>, lsu_nonblock_load_valid_m : UInt<1>, lsu_nonblock_load_tag_m : UInt<2>, lsu_nonblock_load_inv_r : UInt<1>, lsu_nonblock_load_inv_tag_r : UInt<2>, lsu_nonblock_load_data_valid : UInt<1>, lsu_nonblock_load_data_error : UInt<32>, lsu_nonblock_load_data_tag : UInt<2>, lsu_nonblock_load_data : UInt<32>, lsu_pmu_bus_trxn : UInt<1>, lsu_pmu_bus_misaligned : UInt<1>, lsu_pmu_bus_error : UInt<1>, lsu_pmu_bus_busy : UInt<1>, lsu_axi_awvalid : UInt<1>, flip lsu_axi_awready : UInt<1>, lsu_axi_awid : UInt<3>, lsu_axi_awaddr : UInt<32>, lsu_axi_awregion : UInt<4>, lsu_axi_awlen : UInt<8>, lsu_axi_awsize : UInt<3>, lsu_axi_awburst : UInt<2>, lsu_axi_awlock : UInt<1>, lsu_axi_awcache : UInt<4>, lsu_axi_awprot : UInt<3>, lsu_axi_awqos : UInt<4>, lsu_axi_wvalid : UInt<1>, flip lsu_axi_wready : UInt<1>, lsu_axi_wdata : UInt<64>, lsu_axi_wstrb : UInt<8>, lsu_axi_wlast : UInt<1>, flip lsu_axi_bvalid : UInt<1>, lsu_axi_bready : UInt<1>, flip lsu_axi_bresp : UInt<2>, flip lsu_axi_bid : UInt<3>, lsu_axi_arvalid : UInt<1>, flip lsu_axi_arready : UInt<1>, lsu_axi_arid : UInt<3>, lsu_axi_araddr : UInt<32>, lsu_axi_arregion : UInt<4>, lsu_axi_arlen : UInt<8>, lsu_axi_arsize : UInt<3>, lsu_axi_arburst : UInt<2>, lsu_axi_arlock : UInt<1>, lsu_axi_arcache : UInt<4>, lsu_axi_arprot : UInt<3>, lsu_axi_arqos : UInt<4>, flip lsu_axi_rvalid : UInt<1>, lsu_axi_rready : UInt<1>, flip lsu_axi_rid : UInt<3>, flip lsu_axi_rdata : UInt<64>, flip lsu_axi_rresp : UInt<2>, flip lsu_axi_rlast : UInt<1>, flip lsu_bus_clk_en : UInt<1>} + + io.lsu_busreq_r <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 124:32] + io.lsu_bus_buffer_pend_any <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 125:32] + io.lsu_bus_buffer_full_any <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 126:32] + io.lsu_bus_buffer_empty_any <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 127:32] + io.lsu_bus_idle_any <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 128:32] + io.bus_read_data_m <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 129:32] + io.lsu_imprecise_error_load_any <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 131:36] + io.lsu_imprecise_error_store_any <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 132:36] + io.lsu_imprecise_error_addr_any <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 133:36] + io.lsu_nonblock_load_valid_m <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 135:36] + io.lsu_nonblock_load_tag_m <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 136:36] + io.lsu_nonblock_load_inv_r <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 137:36] + io.lsu_nonblock_load_inv_tag_r <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 138:36] + io.lsu_nonblock_load_data_valid <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 139:36] + io.lsu_nonblock_load_data_error <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 140:36] + io.lsu_nonblock_load_data_tag <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 141:36] + io.lsu_nonblock_load_data <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 142:36] + io.lsu_pmu_bus_trxn <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 144:36] + io.lsu_pmu_bus_misaligned <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 145:36] + io.lsu_pmu_bus_error <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 146:36] + io.lsu_pmu_bus_busy <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 147:36] + io.lsu_axi_awvalid <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 149:26] + io.lsu_axi_awid <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 150:26] + io.lsu_axi_awaddr <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 151:26] + io.lsu_axi_awregion <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 152:26] + io.lsu_axi_awlen <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 153:26] + io.lsu_axi_awsize <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 154:26] + io.lsu_axi_awburst <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 155:26] + io.lsu_axi_awlock <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 156:26] + io.lsu_axi_awcache <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 157:26] + io.lsu_axi_awprot <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 158:26] + io.lsu_axi_awqos <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 159:26] + io.lsu_axi_wvalid <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 161:26] + io.lsu_axi_wdata <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 162:26] + io.lsu_axi_wstrb <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 163:26] + io.lsu_axi_wlast <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 164:26] + io.lsu_axi_bready <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 166:26] + io.lsu_axi_arvalid <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 168:26] + io.lsu_axi_arid <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 169:26] + io.lsu_axi_araddr <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 170:26] + io.lsu_axi_arregion <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 171:26] + io.lsu_axi_arlen <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 172:26] + io.lsu_axi_arsize <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 173:26] + io.lsu_axi_arburst <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 174:26] + io.lsu_axi_arlock <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 175:26] + io.lsu_axi_arcache <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 176:26] + io.lsu_axi_arprot <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 177:26] + io.lsu_axi_arqos <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 178:26] + io.lsu_axi_rready <= UInt<1>("h00") @[el2_lsu_bus_intf.scala 180:26] + + module el2_lsu : + input clock : Clock + input reset : AsyncReset + output io : {flip clk_override : UInt<1>, flip dec_tlu_flush_lower_r : UInt<1>, flip dec_tlu_i0_kill_writeb_r : UInt<1>, flip dec_tlu_force_halt : UInt<1>, flip dec_tlu_external_ldfwd_disable : UInt<1>, flip dec_tlu_wb_coalescing_disable : UInt<1>, flip dec_tlu_sideeffect_posted_disable : UInt<1>, flip dec_tlu_core_ecc_disable : UInt<1>, flip exu_lsu_rs1_d : UInt<32>, flip exu_lsu_rs2_d : UInt<32>, flip dec_lsu_offset_d : UInt<12>, flip lsu_p : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip trigger_pkt_any : {select : UInt<1>, match_ : UInt<1>, store : UInt<1>, load : UInt<1>, execute : UInt<1>, m : UInt<1>, tdata2 : UInt<32>}[4], flip dec_lsu_valid_raw_d : UInt<1>, flip dec_tlu_mrac_ff : UInt<32>, lsu_load_stall_any : UInt<1>, lsu_store_stall_any : UInt<1>, lsu_fastint_stall_any : UInt<1>, lsu_idle_any : UInt<1>, lsu_fir_addr : UInt<32>, lsu_fir_error : UInt<2>, lsu_single_ecc_error_incr : UInt<1>, lsu_error_pkt_r : {exc_valid : UInt<1>, single_ecc_error : UInt<1>, inst_type : UInt<1>, exc_type : UInt<1>, mscause : UInt<4>, addr : UInt<32>}, lsu_imprecise_error_load_any : UInt<1>, lsu_imprecise_error_store_any : UInt<1>, lsu_imprecise_error_addr_any : UInt<32>, lsu_nonblock_load_valid_m : UInt<1>, lsu_nonblock_load_tag_m : UInt<2>, lsu_nonblock_load_inv_r : UInt<1>, lsu_nonblock_load_inv_tag_r : UInt<2>, lsu_nonblock_load_data_valid : UInt<1>, lsu_nonblock_load_data_error : UInt<1>, lsu_nonblock_load_data_tag : UInt<2>, lsu_nonblock_load_data : UInt<32>, lsu_pmu_load_external_m : UInt<1>, lsu_pmu_store_external_m : UInt<1>, lsu_pmu_misaligned_m : UInt<1>, lsu_pmu_bus_trxn : UInt<1>, lsu_pmu_bus_misaligned : UInt<1>, lsu_pmu_bus_error : UInt<1>, lsu_pmu_bus_busy : UInt<1>, lsu_trigger_match_m : UInt<4>, dccm_wren : UInt<1>, dccm_rden : UInt<1>, dccm_wr_addr_lo : UInt<16>, dccm_wr_addr_hi : UInt<16>, dccm_rd_addr_lo : UInt<16>, dccm_rd_addr_hi : UInt<16>, dccm_wr_data_lo : UInt<39>, dccm_wr_data_hi : UInt<39>, flip dccm_rd_data_lo : UInt<39>, flip dccm_rd_data_hi : UInt<39>, picm_wren : UInt<1>, picm_rden : UInt<1>, picm_mken : UInt<1>, picm_rdaddr : UInt<32>, picm_wraddr : UInt<32>, picm_wr_data : UInt<32>, flip picm_rd_data : UInt<32>, lsu_axi_awvalid : UInt<1>, lsu_axi_awlock : UInt<1>, flip lsu_axi_awready : UInt<1>, lsu_axi_awid : UInt<3>, lsu_axi_awaddr : UInt<32>, lsu_axi_awregion : UInt<4>, lsu_axi_awlen : UInt<8>, lsu_axi_awsize : UInt<3>, lsu_axi_awburst : UInt<2>, lsu_axi_awcache : UInt<4>, lsu_axi_awprot : UInt<3>, lsu_axi_awqos : UInt<4>, lsu_axi_wvalid : UInt<1>, flip lsu_axi_wready : UInt<1>, lsu_axi_wdata : UInt<64>, lsu_axi_wstrb : UInt<8>, lsu_axi_wlast : UInt<1>, flip lsu_axi_bvalid : UInt<1>, lsu_axi_bready : UInt<1>, flip lsu_axi_bresp : UInt<2>, flip lsu_axi_bid : UInt<3>, lsu_axi_arvalid : UInt<1>, lsu_axi_arlock : UInt<1>, flip lsu_axi_arready : UInt<1>, lsu_axi_arid : UInt<3>, lsu_axi_araddr : UInt<32>, lsu_axi_arregion : UInt<4>, lsu_axi_arlen : UInt<8>, lsu_axi_arsize : UInt<3>, lsu_axi_arburst : UInt<2>, lsu_axi_arcache : UInt<4>, lsu_axi_arprot : UInt<3>, lsu_axi_arqos : UInt<4>, flip lsu_axi_rvalid : UInt<1>, lsu_axi_rready : UInt<1>, flip lsu_axi_rdata : UInt<64>, flip lsu_axi_rlast : UInt<1>, flip lsu_axi_rresp : UInt<2>, flip lsu_axi_rid : UInt<3>, flip lsu_bus_clk_en : UInt<1>, flip dma_dccm_req : UInt<1>, flip dma_mem_write : UInt<1>, dccm_dma_rvalid : UInt<1>, dccm_dma_ecc_error : UInt<1>, flip dma_mem_tag : UInt<3>, flip dma_mem_addr : UInt<32>, flip dma_mem_sz : UInt<3>, flip dma_mem_wdata : UInt<64>, dccm_dma_rtag : UInt<3>, dccm_dma_rdata : UInt<64>, dccm_ready : UInt<1>, flip scan_mode : UInt<1>, flip free_clk : Clock} + + wire dma_dccm_wdata : UInt<64> + dma_dccm_wdata <= UInt<64>("h00") + wire dma_dccm_wdata_lo : UInt<32> + dma_dccm_wdata_lo <= UInt<32>("h00") + wire dma_dccm_wdata_hi : UInt<32> + dma_dccm_wdata_hi <= UInt<32>("h00") + wire dma_mem_tag_m : UInt<32> + dma_mem_tag_m <= UInt<32>("h00") + wire lsu_raw_fwd_lo_r : UInt<1> + lsu_raw_fwd_lo_r <= UInt<1>("h00") + wire lsu_raw_fwd_hi_r : UInt<1> + lsu_raw_fwd_hi_r <= UInt<1>("h00") + inst lsu_lsc_ctl of el2_lsu_lsc_ctl @[el2_lsu.scala 153:30] + lsu_lsc_ctl.clock <= clock + lsu_lsc_ctl.reset <= reset + inst dccm_ctl of el2_lsu_dccm_ctl @[el2_lsu.scala 154:30] + dccm_ctl.clock <= clock + dccm_ctl.reset <= reset + inst stbuf of el2_lsu_stbuf @[el2_lsu.scala 155:30] + stbuf.clock <= clock + stbuf.reset <= reset + inst ecc of el2_lsu_ecc @[el2_lsu.scala 156:30] + ecc.clock <= clock + ecc.reset <= reset + inst trigger of el2_lsu_trigger @[el2_lsu.scala 157:30] + trigger.clock <= clock + trigger.reset <= reset + inst clkdomain of el2_lsu_clkdomain @[el2_lsu.scala 158:30] + clkdomain.clock <= clock + clkdomain.reset <= reset + inst bus_intf of el2_lsu_bus_intf @[el2_lsu.scala 159:30] + bus_intf.clock <= clock + bus_intf.reset <= reset + node lsu_raw_fwd_lo_m = orr(stbuf.io.stbuf_fwdbyteen_lo_m) @[el2_lsu.scala 161:56] + node lsu_raw_fwd_hi_m = orr(stbuf.io.stbuf_fwdbyteen_hi_m) @[el2_lsu.scala 162:56] + node _T = or(stbuf.io.lsu_stbuf_full_any, bus_intf.io.lsu_bus_buffer_full_any) @[el2_lsu.scala 165:57] + node _T_1 = or(_T, dccm_ctl.io.ld_single_ecc_error_r_ff) @[el2_lsu.scala 165:95] + io.lsu_store_stall_any <= _T_1 @[el2_lsu.scala 165:26] + node _T_2 = or(bus_intf.io.lsu_bus_buffer_full_any, dccm_ctl.io.ld_single_ecc_error_r_ff) @[el2_lsu.scala 166:64] + io.lsu_load_stall_any <= _T_2 @[el2_lsu.scala 166:25] + io.lsu_fastint_stall_any <= dccm_ctl.io.ld_single_ecc_error_r @[el2_lsu.scala 167:28] + node _T_3 = eq(lsu_lsc_ctl.io.lsu_pkt_m.dma, UInt<1>("h00")) @[el2_lsu.scala 172:58] + node _T_4 = and(lsu_lsc_ctl.io.lsu_pkt_m.valid, _T_3) @[el2_lsu.scala 172:56] + node _T_5 = or(lsu_lsc_ctl.io.addr_in_dccm_m, lsu_lsc_ctl.io.addr_in_pic_m) @[el2_lsu.scala 172:121] + node _T_6 = and(_T_4, _T_5) @[el2_lsu.scala 172:88] + node ldst_nodma_mtor = and(_T_6, lsu_lsc_ctl.io.lsu_pkt_m.store) @[el2_lsu.scala 172:153] + node _T_7 = or(io.dec_lsu_valid_raw_d, ldst_nodma_mtor) @[el2_lsu.scala 173:45] + node _T_8 = or(_T_7, dccm_ctl.io.ld_single_ecc_error_r_ff) @[el2_lsu.scala 173:63] + node _T_9 = eq(_T_8, UInt<1>("h00")) @[el2_lsu.scala 173:20] + io.dccm_ready <= _T_9 @[el2_lsu.scala 173:17] + node _T_10 = and(io.dma_dccm_req, io.dma_mem_write) @[el2_lsu.scala 174:38] + node dma_dccm_wen = and(_T_10, lsu_lsc_ctl.io.addr_in_dccm_d) @[el2_lsu.scala 174:57] + node _T_11 = and(io.dma_dccm_req, io.dma_mem_write) @[el2_lsu.scala 175:38] + node dma_pic_wen = and(_T_11, lsu_lsc_ctl.io.addr_in_pic_d) @[el2_lsu.scala 175:57] + node _T_12 = bits(io.dma_mem_addr, 2, 0) @[el2_lsu.scala 176:60] + node _T_13 = cat(_T_12, UInt<3>("h00")) @[Cat.scala 29:58] + node _T_14 = dshr(io.dma_mem_wdata, _T_13) @[el2_lsu.scala 176:38] + dma_dccm_wdata <= _T_14 @[el2_lsu.scala 176:18] + node _T_15 = bits(dma_dccm_wdata, 63, 32) @[el2_lsu.scala 177:38] + dma_dccm_wdata_hi <= _T_15 @[el2_lsu.scala 177:21] + node _T_16 = bits(dma_dccm_wdata, 31, 0) @[el2_lsu.scala 178:38] + dma_dccm_wdata_lo <= _T_16 @[el2_lsu.scala 178:21] + node _T_17 = eq(lsu_lsc_ctl.io.lsu_pkt_m.dma, UInt<1>("h00")) @[el2_lsu.scala 187:58] + node _T_18 = and(lsu_lsc_ctl.io.lsu_pkt_m.valid, _T_17) @[el2_lsu.scala 187:56] + node _T_19 = eq(lsu_lsc_ctl.io.lsu_pkt_r.dma, UInt<1>("h00")) @[el2_lsu.scala 187:125] + node _T_20 = and(lsu_lsc_ctl.io.lsu_pkt_r.valid, _T_19) @[el2_lsu.scala 187:123] + node _T_21 = or(_T_18, _T_20) @[el2_lsu.scala 187:89] + node _T_22 = eq(_T_21, UInt<1>("h00")) @[el2_lsu.scala 187:22] + node _T_23 = and(_T_22, bus_intf.io.lsu_bus_buffer_empty_any) @[el2_lsu.scala 187:157] + node _T_24 = and(_T_23, bus_intf.io.lsu_bus_idle_any) @[el2_lsu.scala 187:196] + io.lsu_idle_any <= _T_24 @[el2_lsu.scala 187:19] + node _T_25 = and(lsu_lsc_ctl.io.lsu_pkt_r.valid, lsu_lsc_ctl.io.lsu_pkt_r.store) @[el2_lsu.scala 189:61] + node _T_26 = and(_T_25, lsu_lsc_ctl.io.addr_in_dccm_r) @[el2_lsu.scala 189:94] + node _T_27 = eq(io.dec_tlu_i0_kill_writeb_r, UInt<1>("h00")) @[el2_lsu.scala 189:128] + node _T_28 = and(_T_26, _T_27) @[el2_lsu.scala 189:126] + node _T_29 = eq(lsu_lsc_ctl.io.lsu_pkt_r.dma, UInt<1>("h00")) @[el2_lsu.scala 189:139] + node store_stbuf_reqvld_r = and(_T_28, _T_29) @[el2_lsu.scala 189:137] + node _T_30 = or(lsu_lsc_ctl.io.lsu_pkt_m.load, lsu_lsc_ctl.io.lsu_pkt_m.store) @[el2_lsu.scala 191:85] + node _T_31 = and(lsu_lsc_ctl.io.lsu_pkt_m.valid, _T_30) @[el2_lsu.scala 191:52] + node _T_32 = or(lsu_lsc_ctl.io.addr_in_dccm_m, lsu_lsc_ctl.io.addr_in_pic_m) @[el2_lsu.scala 191:152] + node lsu_cmpen_m = and(_T_31, _T_32) @[el2_lsu.scala 191:119] + node _T_33 = or(lsu_lsc_ctl.io.lsu_pkt_m.load, lsu_lsc_ctl.io.lsu_pkt_m.store) @[el2_lsu.scala 193:87] + node _T_34 = and(_T_33, lsu_lsc_ctl.io.addr_external_m) @[el2_lsu.scala 193:121] + node _T_35 = and(lsu_lsc_ctl.io.lsu_pkt_m.valid, _T_34) @[el2_lsu.scala 193:53] + node _T_36 = eq(io.dec_tlu_flush_lower_r, UInt<1>("h00")) @[el2_lsu.scala 193:157] + node _T_37 = and(_T_35, _T_36) @[el2_lsu.scala 193:155] + node _T_38 = eq(lsu_lsc_ctl.io.lsu_exc_m, UInt<1>("h00")) @[el2_lsu.scala 193:171] + node _T_39 = and(_T_37, _T_38) @[el2_lsu.scala 193:169] + node _T_40 = eq(lsu_lsc_ctl.io.lsu_pkt_m.fast_int, UInt<1>("h00")) @[el2_lsu.scala 193:199] + node lsu_busreq_m = and(_T_39, _T_40) @[el2_lsu.scala 193:197] + node _T_41 = bits(lsu_lsc_ctl.io.lsu_addr_m, 0, 0) @[el2_lsu.scala 195:121] + node _T_42 = and(lsu_lsc_ctl.io.lsu_pkt_m.half, _T_41) @[el2_lsu.scala 195:94] + node _T_43 = bits(lsu_lsc_ctl.io.lsu_addr_m, 1, 0) @[el2_lsu.scala 195:186] + node _T_44 = orr(_T_43) @[el2_lsu.scala 195:192] + node _T_45 = and(lsu_lsc_ctl.io.lsu_pkt_m.word, _T_44) @[el2_lsu.scala 195:159] + node _T_46 = or(_T_42, _T_45) @[el2_lsu.scala 195:126] + node _T_47 = and(lsu_lsc_ctl.io.lsu_pkt_m.valid, _T_46) @[el2_lsu.scala 195:60] + io.lsu_pmu_misaligned_m <= _T_47 @[el2_lsu.scala 195:26] + node _T_48 = and(lsu_lsc_ctl.io.lsu_pkt_m.valid, lsu_lsc_ctl.io.lsu_pkt_m.load) @[el2_lsu.scala 196:64] + node _T_49 = and(_T_48, lsu_lsc_ctl.io.addr_external_m) @[el2_lsu.scala 196:96] + io.lsu_pmu_load_external_m <= _T_49 @[el2_lsu.scala 196:30] + node _T_50 = and(lsu_lsc_ctl.io.lsu_pkt_m.valid, lsu_lsc_ctl.io.lsu_pkt_m.store) @[el2_lsu.scala 197:64] + node _T_51 = and(_T_50, lsu_lsc_ctl.io.addr_external_m) @[el2_lsu.scala 197:97] + io.lsu_pmu_store_external_m <= _T_51 @[el2_lsu.scala 197:30] + lsu_lsc_ctl.io.lsu_c1_m_clk <= clkdomain.io.lsu_c1_m_clk @[el2_lsu.scala 201:50] + lsu_lsc_ctl.io.lsu_c1_r_clk <= clkdomain.io.lsu_c1_r_clk @[el2_lsu.scala 202:50] + lsu_lsc_ctl.io.lsu_c2_m_clk <= clkdomain.io.lsu_c2_m_clk @[el2_lsu.scala 203:50] + lsu_lsc_ctl.io.lsu_c2_r_clk <= clkdomain.io.lsu_c2_r_clk @[el2_lsu.scala 204:50] + lsu_lsc_ctl.io.lsu_store_c1_m_clk <= clkdomain.io.lsu_store_c1_m_clk @[el2_lsu.scala 205:50] + lsu_lsc_ctl.io.lsu_ld_data_r <= dccm_ctl.io.lsu_ld_data_r @[el2_lsu.scala 206:50] + lsu_lsc_ctl.io.lsu_ld_data_corr_r <= dccm_ctl.io.lsu_ld_data_corr_r @[el2_lsu.scala 207:50] + lsu_lsc_ctl.io.lsu_single_ecc_error_r <= ecc.io.lsu_single_ecc_error_r @[el2_lsu.scala 208:50] + lsu_lsc_ctl.io.lsu_double_ecc_error_r <= ecc.io.lsu_double_ecc_error_r @[el2_lsu.scala 209:50] + lsu_lsc_ctl.io.lsu_ld_data_m <= dccm_ctl.io.lsu_ld_data_m @[el2_lsu.scala 210:50] + lsu_lsc_ctl.io.lsu_single_ecc_error_m <= ecc.io.lsu_single_ecc_error_m @[el2_lsu.scala 211:50] + lsu_lsc_ctl.io.lsu_double_ecc_error_m <= ecc.io.lsu_double_ecc_error_m @[el2_lsu.scala 212:50] + lsu_lsc_ctl.io.flush_m_up <= io.dec_tlu_flush_lower_r @[el2_lsu.scala 213:50] + lsu_lsc_ctl.io.flush_r <= io.dec_tlu_i0_kill_writeb_r @[el2_lsu.scala 214:50] + lsu_lsc_ctl.io.exu_lsu_rs1_d <= io.exu_lsu_rs1_d @[el2_lsu.scala 215:50] + lsu_lsc_ctl.io.exu_lsu_rs2_d <= io.exu_lsu_rs2_d @[el2_lsu.scala 216:50] + lsu_lsc_ctl.io.lsu_p.valid <= io.lsu_p.valid @[el2_lsu.scala 217:50] + lsu_lsc_ctl.io.lsu_p.store_data_bypass_m <= io.lsu_p.store_data_bypass_m @[el2_lsu.scala 217:50] + lsu_lsc_ctl.io.lsu_p.load_ldst_bypass_d <= io.lsu_p.load_ldst_bypass_d @[el2_lsu.scala 217:50] + lsu_lsc_ctl.io.lsu_p.store_data_bypass_d <= io.lsu_p.store_data_bypass_d @[el2_lsu.scala 217:50] + lsu_lsc_ctl.io.lsu_p.dma <= io.lsu_p.dma @[el2_lsu.scala 217:50] + lsu_lsc_ctl.io.lsu_p.unsign <= io.lsu_p.unsign @[el2_lsu.scala 217:50] + lsu_lsc_ctl.io.lsu_p.store <= io.lsu_p.store @[el2_lsu.scala 217:50] + lsu_lsc_ctl.io.lsu_p.load <= io.lsu_p.load @[el2_lsu.scala 217:50] + lsu_lsc_ctl.io.lsu_p.dword <= io.lsu_p.dword @[el2_lsu.scala 217:50] + lsu_lsc_ctl.io.lsu_p.word <= io.lsu_p.word @[el2_lsu.scala 217:50] + lsu_lsc_ctl.io.lsu_p.half <= io.lsu_p.half @[el2_lsu.scala 217:50] + lsu_lsc_ctl.io.lsu_p.by <= io.lsu_p.by @[el2_lsu.scala 217:50] + lsu_lsc_ctl.io.lsu_p.fast_int <= io.lsu_p.fast_int @[el2_lsu.scala 217:50] + lsu_lsc_ctl.io.dec_lsu_valid_raw_d <= io.dec_lsu_valid_raw_d @[el2_lsu.scala 218:50] + lsu_lsc_ctl.io.dec_lsu_offset_d <= io.dec_lsu_offset_d @[el2_lsu.scala 219:50] + lsu_lsc_ctl.io.picm_mask_data_m <= dccm_ctl.io.picm_mask_data_m @[el2_lsu.scala 220:50] + lsu_lsc_ctl.io.bus_read_data_m <= bus_intf.io.bus_read_data_m @[el2_lsu.scala 221:50] + lsu_lsc_ctl.io.dma_dccm_req <= io.dma_dccm_req @[el2_lsu.scala 222:50] + lsu_lsc_ctl.io.dma_mem_addr <= io.dma_mem_addr @[el2_lsu.scala 223:50] + lsu_lsc_ctl.io.dma_mem_sz <= io.dma_mem_sz @[el2_lsu.scala 224:50] + lsu_lsc_ctl.io.dma_mem_write <= io.dma_mem_write @[el2_lsu.scala 225:50] + lsu_lsc_ctl.io.dma_mem_wdata <= io.dma_mem_wdata @[el2_lsu.scala 226:50] + lsu_lsc_ctl.io.dec_tlu_mrac_ff <= io.dec_tlu_mrac_ff @[el2_lsu.scala 227:50] + lsu_lsc_ctl.io.scan_mode <= io.scan_mode @[el2_lsu.scala 228:50] + io.lsu_single_ecc_error_incr <= lsu_lsc_ctl.io.lsu_single_ecc_error_incr @[el2_lsu.scala 231:50] + io.lsu_error_pkt_r.addr <= lsu_lsc_ctl.io.lsu_error_pkt_r.addr @[el2_lsu.scala 232:50] + io.lsu_error_pkt_r.mscause <= lsu_lsc_ctl.io.lsu_error_pkt_r.mscause @[el2_lsu.scala 232:50] + io.lsu_error_pkt_r.exc_type <= lsu_lsc_ctl.io.lsu_error_pkt_r.exc_type @[el2_lsu.scala 232:50] + io.lsu_error_pkt_r.inst_type <= lsu_lsc_ctl.io.lsu_error_pkt_r.inst_type @[el2_lsu.scala 232:50] + io.lsu_error_pkt_r.single_ecc_error <= lsu_lsc_ctl.io.lsu_error_pkt_r.single_ecc_error @[el2_lsu.scala 232:50] + io.lsu_error_pkt_r.exc_valid <= lsu_lsc_ctl.io.lsu_error_pkt_r.exc_valid @[el2_lsu.scala 232:50] + io.lsu_fir_addr <= lsu_lsc_ctl.io.lsu_fir_addr @[el2_lsu.scala 233:50] + io.lsu_fir_error <= lsu_lsc_ctl.io.lsu_fir_error @[el2_lsu.scala 234:50] + dccm_ctl.io.lsu_c2_m_clk <= clkdomain.io.lsu_c2_m_clk @[el2_lsu.scala 239:50] + dccm_ctl.io.lsu_c2_r_clk <= clkdomain.io.lsu_c2_m_clk @[el2_lsu.scala 240:50] + dccm_ctl.io.lsu_free_c2_clk <= clkdomain.io.lsu_c2_r_clk @[el2_lsu.scala 241:50] + dccm_ctl.io.lsu_c1_r_clk <= clkdomain.io.lsu_free_c2_clk @[el2_lsu.scala 242:50] + dccm_ctl.io.lsu_store_c1_r_clk <= clkdomain.io.lsu_c1_r_clk @[el2_lsu.scala 243:50] + dccm_ctl.io.clk <= clock @[el2_lsu.scala 244:50] + dccm_ctl.io.lsu_pkt_d.valid <= lsu_lsc_ctl.io.lsu_pkt_d.valid @[el2_lsu.scala 245:50] + dccm_ctl.io.lsu_pkt_d.store_data_bypass_m <= lsu_lsc_ctl.io.lsu_pkt_d.store_data_bypass_m @[el2_lsu.scala 245:50] + dccm_ctl.io.lsu_pkt_d.load_ldst_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_d.load_ldst_bypass_d @[el2_lsu.scala 245:50] + dccm_ctl.io.lsu_pkt_d.store_data_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_d.store_data_bypass_d @[el2_lsu.scala 245:50] + dccm_ctl.io.lsu_pkt_d.dma <= lsu_lsc_ctl.io.lsu_pkt_d.dma @[el2_lsu.scala 245:50] + dccm_ctl.io.lsu_pkt_d.unsign <= lsu_lsc_ctl.io.lsu_pkt_d.unsign @[el2_lsu.scala 245:50] + dccm_ctl.io.lsu_pkt_d.store <= lsu_lsc_ctl.io.lsu_pkt_d.store @[el2_lsu.scala 245:50] + dccm_ctl.io.lsu_pkt_d.load <= lsu_lsc_ctl.io.lsu_pkt_d.load @[el2_lsu.scala 245:50] + dccm_ctl.io.lsu_pkt_d.dword <= lsu_lsc_ctl.io.lsu_pkt_d.dword @[el2_lsu.scala 245:50] + dccm_ctl.io.lsu_pkt_d.word <= lsu_lsc_ctl.io.lsu_pkt_d.word @[el2_lsu.scala 245:50] + dccm_ctl.io.lsu_pkt_d.half <= lsu_lsc_ctl.io.lsu_pkt_d.half @[el2_lsu.scala 245:50] + dccm_ctl.io.lsu_pkt_d.by <= lsu_lsc_ctl.io.lsu_pkt_d.by @[el2_lsu.scala 245:50] + dccm_ctl.io.lsu_pkt_d.fast_int <= lsu_lsc_ctl.io.lsu_pkt_d.fast_int @[el2_lsu.scala 245:50] + dccm_ctl.io.lsu_pkt_m.valid <= lsu_lsc_ctl.io.lsu_pkt_m.valid @[el2_lsu.scala 246:50] + dccm_ctl.io.lsu_pkt_m.store_data_bypass_m <= lsu_lsc_ctl.io.lsu_pkt_m.store_data_bypass_m @[el2_lsu.scala 246:50] + dccm_ctl.io.lsu_pkt_m.load_ldst_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_m.load_ldst_bypass_d @[el2_lsu.scala 246:50] + dccm_ctl.io.lsu_pkt_m.store_data_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_m.store_data_bypass_d @[el2_lsu.scala 246:50] + dccm_ctl.io.lsu_pkt_m.dma <= lsu_lsc_ctl.io.lsu_pkt_m.dma @[el2_lsu.scala 246:50] + dccm_ctl.io.lsu_pkt_m.unsign <= lsu_lsc_ctl.io.lsu_pkt_m.unsign @[el2_lsu.scala 246:50] + dccm_ctl.io.lsu_pkt_m.store <= lsu_lsc_ctl.io.lsu_pkt_m.store @[el2_lsu.scala 246:50] + dccm_ctl.io.lsu_pkt_m.load <= lsu_lsc_ctl.io.lsu_pkt_m.load @[el2_lsu.scala 246:50] + dccm_ctl.io.lsu_pkt_m.dword <= lsu_lsc_ctl.io.lsu_pkt_m.dword @[el2_lsu.scala 246:50] + dccm_ctl.io.lsu_pkt_m.word <= lsu_lsc_ctl.io.lsu_pkt_m.word @[el2_lsu.scala 246:50] + dccm_ctl.io.lsu_pkt_m.half <= lsu_lsc_ctl.io.lsu_pkt_m.half @[el2_lsu.scala 246:50] + dccm_ctl.io.lsu_pkt_m.by <= lsu_lsc_ctl.io.lsu_pkt_m.by @[el2_lsu.scala 246:50] + dccm_ctl.io.lsu_pkt_m.fast_int <= lsu_lsc_ctl.io.lsu_pkt_m.fast_int @[el2_lsu.scala 246:50] + dccm_ctl.io.lsu_pkt_r.valid <= lsu_lsc_ctl.io.lsu_pkt_r.valid @[el2_lsu.scala 247:50] + dccm_ctl.io.lsu_pkt_r.store_data_bypass_m <= lsu_lsc_ctl.io.lsu_pkt_r.store_data_bypass_m @[el2_lsu.scala 247:50] + dccm_ctl.io.lsu_pkt_r.load_ldst_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_r.load_ldst_bypass_d @[el2_lsu.scala 247:50] + dccm_ctl.io.lsu_pkt_r.store_data_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_r.store_data_bypass_d @[el2_lsu.scala 247:50] + dccm_ctl.io.lsu_pkt_r.dma <= lsu_lsc_ctl.io.lsu_pkt_r.dma @[el2_lsu.scala 247:50] + dccm_ctl.io.lsu_pkt_r.unsign <= lsu_lsc_ctl.io.lsu_pkt_r.unsign @[el2_lsu.scala 247:50] + dccm_ctl.io.lsu_pkt_r.store <= lsu_lsc_ctl.io.lsu_pkt_r.store @[el2_lsu.scala 247:50] + dccm_ctl.io.lsu_pkt_r.load <= lsu_lsc_ctl.io.lsu_pkt_r.load @[el2_lsu.scala 247:50] + dccm_ctl.io.lsu_pkt_r.dword <= lsu_lsc_ctl.io.lsu_pkt_r.dword @[el2_lsu.scala 247:50] + dccm_ctl.io.lsu_pkt_r.word <= lsu_lsc_ctl.io.lsu_pkt_r.word @[el2_lsu.scala 247:50] + dccm_ctl.io.lsu_pkt_r.half <= lsu_lsc_ctl.io.lsu_pkt_r.half @[el2_lsu.scala 247:50] + dccm_ctl.io.lsu_pkt_r.by <= lsu_lsc_ctl.io.lsu_pkt_r.by @[el2_lsu.scala 247:50] + dccm_ctl.io.lsu_pkt_r.fast_int <= lsu_lsc_ctl.io.lsu_pkt_r.fast_int @[el2_lsu.scala 247:50] + dccm_ctl.io.addr_in_dccm_d <= lsu_lsc_ctl.io.addr_in_dccm_d @[el2_lsu.scala 248:50] + dccm_ctl.io.addr_in_dccm_m <= lsu_lsc_ctl.io.addr_in_dccm_m @[el2_lsu.scala 249:50] + dccm_ctl.io.addr_in_dccm_r <= lsu_lsc_ctl.io.addr_in_dccm_r @[el2_lsu.scala 250:50] + dccm_ctl.io.addr_in_pic_d <= lsu_lsc_ctl.io.addr_in_pic_d @[el2_lsu.scala 251:50] + dccm_ctl.io.addr_in_pic_m <= lsu_lsc_ctl.io.addr_in_pic_m @[el2_lsu.scala 252:50] + dccm_ctl.io.addr_in_pic_r <= lsu_lsc_ctl.io.addr_in_pic_r @[el2_lsu.scala 253:50] + dccm_ctl.io.lsu_raw_fwd_lo_r <= lsu_raw_fwd_lo_r @[el2_lsu.scala 254:50] + dccm_ctl.io.lsu_raw_fwd_hi_r <= lsu_raw_fwd_hi_r @[el2_lsu.scala 255:50] + dccm_ctl.io.lsu_commit_r <= lsu_lsc_ctl.io.lsu_commit_r @[el2_lsu.scala 256:50] + dccm_ctl.io.lsu_addr_d <= lsu_lsc_ctl.io.lsu_addr_d @[el2_lsu.scala 257:50] + dccm_ctl.io.lsu_addr_m <= lsu_lsc_ctl.io.lsu_addr_m @[el2_lsu.scala 258:50] + dccm_ctl.io.lsu_addr_r <= lsu_lsc_ctl.io.lsu_addr_r @[el2_lsu.scala 259:50] + dccm_ctl.io.end_addr_d <= lsu_lsc_ctl.io.end_addr_d @[el2_lsu.scala 260:50] + dccm_ctl.io.end_addr_m <= lsu_lsc_ctl.io.end_addr_m @[el2_lsu.scala 261:50] + dccm_ctl.io.end_addr_r <= lsu_lsc_ctl.io.end_addr_r @[el2_lsu.scala 262:50] + dccm_ctl.io.stbuf_reqvld_any <= stbuf.io.stbuf_reqvld_any @[el2_lsu.scala 263:50] + dccm_ctl.io.stbuf_addr_any <= stbuf.io.stbuf_addr_any @[el2_lsu.scala 264:50] + dccm_ctl.io.stbuf_data_any <= stbuf.io.stbuf_data_any @[el2_lsu.scala 265:50] + dccm_ctl.io.stbuf_ecc_any <= ecc.io.stbuf_ecc_any @[el2_lsu.scala 266:50] + dccm_ctl.io.stbuf_fwddata_hi_m <= stbuf.io.stbuf_fwddata_hi_m @[el2_lsu.scala 267:50] + dccm_ctl.io.stbuf_fwddata_lo_m <= stbuf.io.stbuf_fwddata_lo_m @[el2_lsu.scala 268:50] + dccm_ctl.io.stbuf_fwdbyteen_lo_m <= stbuf.io.stbuf_fwdbyteen_lo_m @[el2_lsu.scala 269:50] + dccm_ctl.io.stbuf_fwdbyteen_hi_m <= stbuf.io.stbuf_fwdbyteen_hi_m @[el2_lsu.scala 270:50] + dccm_ctl.io.lsu_double_ecc_error_r <= ecc.io.lsu_double_ecc_error_r @[el2_lsu.scala 271:50] + dccm_ctl.io.single_ecc_error_hi_r <= ecc.io.single_ecc_error_hi_r @[el2_lsu.scala 272:50] + dccm_ctl.io.single_ecc_error_lo_r <= ecc.io.single_ecc_error_lo_r @[el2_lsu.scala 273:50] + dccm_ctl.io.sec_data_hi_r <= ecc.io.sec_data_hi_r @[el2_lsu.scala 274:50] + dccm_ctl.io.sec_data_lo_r <= ecc.io.sec_data_lo_r @[el2_lsu.scala 275:50] + dccm_ctl.io.sec_data_hi_r_ff <= ecc.io.sec_data_hi_r_ff @[el2_lsu.scala 276:50] + dccm_ctl.io.sec_data_lo_r_ff <= ecc.io.sec_data_lo_r_ff @[el2_lsu.scala 277:50] + dccm_ctl.io.sec_data_ecc_hi_r_ff <= ecc.io.sec_data_ecc_hi_r_ff @[el2_lsu.scala 278:50] + dccm_ctl.io.sec_data_ecc_lo_r_ff <= ecc.io.sec_data_ecc_lo_r_ff @[el2_lsu.scala 279:50] + dccm_ctl.io.lsu_double_ecc_error_m <= ecc.io.lsu_double_ecc_error_m @[el2_lsu.scala 280:50] + dccm_ctl.io.sec_data_hi_m <= ecc.io.sec_data_hi_m @[el2_lsu.scala 281:50] + dccm_ctl.io.sec_data_lo_m <= ecc.io.sec_data_lo_m @[el2_lsu.scala 282:50] + dccm_ctl.io.store_data_m <= lsu_lsc_ctl.io.store_data_m @[el2_lsu.scala 283:50] + dccm_ctl.io.dma_dccm_wen <= dma_dccm_wen @[el2_lsu.scala 284:50] + dccm_ctl.io.dma_pic_wen <= dma_pic_wen @[el2_lsu.scala 285:50] + dccm_ctl.io.dma_mem_tag_m <= dma_mem_tag_m @[el2_lsu.scala 286:50] + dccm_ctl.io.dma_mem_addr <= io.dma_mem_addr @[el2_lsu.scala 287:50] + dccm_ctl.io.dma_mem_wdata <= io.dma_mem_wdata @[el2_lsu.scala 288:50] + dccm_ctl.io.dma_dccm_wdata_lo <= dma_dccm_wdata_lo @[el2_lsu.scala 289:50] + dccm_ctl.io.dma_dccm_wdata_hi <= dma_dccm_wdata_hi @[el2_lsu.scala 290:50] + dccm_ctl.io.dma_dccm_wdata_ecc_hi <= ecc.io.dma_dccm_wdata_ecc_hi @[el2_lsu.scala 291:50] + dccm_ctl.io.dma_dccm_wdata_ecc_lo <= ecc.io.dma_dccm_wdata_ecc_lo @[el2_lsu.scala 292:50] + dccm_ctl.io.dccm_rd_data_lo <= io.dccm_rd_data_lo @[el2_lsu.scala 293:50] + dccm_ctl.io.dccm_rd_data_hi <= io.dccm_rd_data_hi @[el2_lsu.scala 294:50] + dccm_ctl.io.picm_rd_data <= io.picm_rd_data @[el2_lsu.scala 295:50] + dccm_ctl.io.scan_mode <= io.scan_mode @[el2_lsu.scala 296:50] + io.dccm_dma_rvalid <= dccm_ctl.io.dccm_dma_rvalid @[el2_lsu.scala 299:50] + io.dccm_dma_ecc_error <= dccm_ctl.io.dccm_dma_ecc_error @[el2_lsu.scala 300:50] + io.dccm_dma_rtag <= dccm_ctl.io.dccm_dma_rtag @[el2_lsu.scala 301:50] + io.dccm_dma_rdata <= dccm_ctl.io.dccm_dma_rdata @[el2_lsu.scala 302:50] + io.dccm_wren <= dccm_ctl.io.dccm_wren @[el2_lsu.scala 303:50] + io.dccm_rden <= dccm_ctl.io.dccm_rden @[el2_lsu.scala 304:50] + io.dccm_wr_addr_lo <= dccm_ctl.io.dccm_wr_addr_lo @[el2_lsu.scala 305:50] + io.dccm_wr_data_lo <= dccm_ctl.io.dccm_wr_data_lo @[el2_lsu.scala 306:50] + io.dccm_rd_addr_lo <= dccm_ctl.io.dccm_rd_addr_lo @[el2_lsu.scala 307:50] + io.dccm_wr_addr_hi <= dccm_ctl.io.dccm_wr_addr_hi @[el2_lsu.scala 308:50] + io.dccm_wr_data_hi <= dccm_ctl.io.dccm_wr_data_hi @[el2_lsu.scala 309:50] + io.dccm_rd_addr_hi <= dccm_ctl.io.dccm_rd_addr_hi @[el2_lsu.scala 310:50] + io.picm_wren <= dccm_ctl.io.picm_wren @[el2_lsu.scala 311:50] + io.picm_rden <= dccm_ctl.io.picm_rden @[el2_lsu.scala 312:50] + io.picm_mken <= dccm_ctl.io.picm_mken @[el2_lsu.scala 313:50] + io.picm_rdaddr <= dccm_ctl.io.picm_rdaddr @[el2_lsu.scala 314:50] + io.picm_wraddr <= dccm_ctl.io.picm_wraddr @[el2_lsu.scala 315:50] + io.picm_wr_data <= dccm_ctl.io.picm_wr_data @[el2_lsu.scala 316:50] + stbuf.io.lsu_c1_m_clk <= clkdomain.io.lsu_c1_m_clk @[el2_lsu.scala 319:50] + stbuf.io.lsu_c1_r_clk <= clkdomain.io.lsu_c1_m_clk @[el2_lsu.scala 320:56] + stbuf.io.lsu_stbuf_c1_clk <= clkdomain.io.lsu_stbuf_c1_clk @[el2_lsu.scala 321:54] + stbuf.io.lsu_free_c2_clk <= clkdomain.io.lsu_free_c2_clk @[el2_lsu.scala 322:54] + stbuf.io.lsu_pkt_m.valid <= lsu_lsc_ctl.io.lsu_pkt_m.valid @[el2_lsu.scala 323:56] + stbuf.io.lsu_pkt_m.store_data_bypass_m <= lsu_lsc_ctl.io.lsu_pkt_m.store_data_bypass_m @[el2_lsu.scala 323:56] + stbuf.io.lsu_pkt_m.load_ldst_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_m.load_ldst_bypass_d @[el2_lsu.scala 323:56] + stbuf.io.lsu_pkt_m.store_data_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_m.store_data_bypass_d @[el2_lsu.scala 323:56] + stbuf.io.lsu_pkt_m.dma <= lsu_lsc_ctl.io.lsu_pkt_m.dma @[el2_lsu.scala 323:56] + stbuf.io.lsu_pkt_m.unsign <= lsu_lsc_ctl.io.lsu_pkt_m.unsign @[el2_lsu.scala 323:56] + stbuf.io.lsu_pkt_m.store <= lsu_lsc_ctl.io.lsu_pkt_m.store @[el2_lsu.scala 323:56] + stbuf.io.lsu_pkt_m.load <= lsu_lsc_ctl.io.lsu_pkt_m.load @[el2_lsu.scala 323:56] + stbuf.io.lsu_pkt_m.dword <= lsu_lsc_ctl.io.lsu_pkt_m.dword @[el2_lsu.scala 323:56] + stbuf.io.lsu_pkt_m.word <= lsu_lsc_ctl.io.lsu_pkt_m.word @[el2_lsu.scala 323:56] + stbuf.io.lsu_pkt_m.half <= lsu_lsc_ctl.io.lsu_pkt_m.half @[el2_lsu.scala 323:56] + stbuf.io.lsu_pkt_m.by <= lsu_lsc_ctl.io.lsu_pkt_m.by @[el2_lsu.scala 323:56] + stbuf.io.lsu_pkt_m.fast_int <= lsu_lsc_ctl.io.lsu_pkt_m.fast_int @[el2_lsu.scala 323:56] + stbuf.io.lsu_pkt_r.valid <= lsu_lsc_ctl.io.lsu_pkt_r.valid @[el2_lsu.scala 324:56] + stbuf.io.lsu_pkt_r.store_data_bypass_m <= lsu_lsc_ctl.io.lsu_pkt_r.store_data_bypass_m @[el2_lsu.scala 324:56] + stbuf.io.lsu_pkt_r.load_ldst_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_r.load_ldst_bypass_d @[el2_lsu.scala 324:56] + stbuf.io.lsu_pkt_r.store_data_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_r.store_data_bypass_d @[el2_lsu.scala 324:56] + stbuf.io.lsu_pkt_r.dma <= lsu_lsc_ctl.io.lsu_pkt_r.dma @[el2_lsu.scala 324:56] + stbuf.io.lsu_pkt_r.unsign <= lsu_lsc_ctl.io.lsu_pkt_r.unsign @[el2_lsu.scala 324:56] + stbuf.io.lsu_pkt_r.store <= lsu_lsc_ctl.io.lsu_pkt_r.store @[el2_lsu.scala 324:56] + stbuf.io.lsu_pkt_r.load <= lsu_lsc_ctl.io.lsu_pkt_r.load @[el2_lsu.scala 324:56] + stbuf.io.lsu_pkt_r.dword <= lsu_lsc_ctl.io.lsu_pkt_r.dword @[el2_lsu.scala 324:56] + stbuf.io.lsu_pkt_r.word <= lsu_lsc_ctl.io.lsu_pkt_r.word @[el2_lsu.scala 324:56] + stbuf.io.lsu_pkt_r.half <= lsu_lsc_ctl.io.lsu_pkt_r.half @[el2_lsu.scala 324:56] + stbuf.io.lsu_pkt_r.by <= lsu_lsc_ctl.io.lsu_pkt_r.by @[el2_lsu.scala 324:56] + stbuf.io.lsu_pkt_r.fast_int <= lsu_lsc_ctl.io.lsu_pkt_r.fast_int @[el2_lsu.scala 324:56] + stbuf.io.store_stbuf_reqvld_r <= store_stbuf_reqvld_r @[el2_lsu.scala 325:56] + stbuf.io.lsu_commit_r <= lsu_lsc_ctl.io.lsu_commit_r @[el2_lsu.scala 326:50] + stbuf.io.dec_lsu_valid_raw_d <= io.dec_lsu_valid_raw_d @[el2_lsu.scala 327:50] + stbuf.io.store_data_hi_r <= dccm_ctl.io.store_data_hi_r @[el2_lsu.scala 328:62] + stbuf.io.store_data_lo_r <= dccm_ctl.io.store_data_lo_r @[el2_lsu.scala 329:62] + stbuf.io.store_datafn_hi_r <= dccm_ctl.io.store_datafn_hi_r @[el2_lsu.scala 330:50] + stbuf.io.store_datafn_lo_r <= dccm_ctl.io.store_datafn_lo_r @[el2_lsu.scala 331:56] + stbuf.io.lsu_stbuf_commit_any <= dccm_ctl.io.lsu_stbuf_commit_any @[el2_lsu.scala 332:60] + stbuf.io.lsu_addr_d <= lsu_lsc_ctl.io.lsu_addr_d @[el2_lsu.scala 333:64] + stbuf.io.lsu_addr_m <= lsu_lsc_ctl.io.lsu_addr_m @[el2_lsu.scala 334:64] + stbuf.io.lsu_addr_r <= lsu_lsc_ctl.io.lsu_addr_r @[el2_lsu.scala 335:64] + stbuf.io.end_addr_d <= lsu_lsc_ctl.io.end_addr_d @[el2_lsu.scala 336:64] + stbuf.io.end_addr_m <= lsu_lsc_ctl.io.end_addr_m @[el2_lsu.scala 337:64] + stbuf.io.end_addr_r <= lsu_lsc_ctl.io.end_addr_r @[el2_lsu.scala 338:64] + stbuf.io.addr_in_dccm_m <= lsu_lsc_ctl.io.addr_in_dccm_m @[el2_lsu.scala 339:50] + stbuf.io.addr_in_dccm_r <= lsu_lsc_ctl.io.addr_in_dccm_r @[el2_lsu.scala 340:56] + stbuf.io.lsu_cmpen_m <= lsu_cmpen_m @[el2_lsu.scala 341:54] + stbuf.io.scan_mode <= io.scan_mode @[el2_lsu.scala 342:50] + ecc.io.lsu_c2_r_clk <= clkdomain.io.lsu_c2_r_clk @[el2_lsu.scala 346:52] + ecc.io.lsu_pkt_m.valid <= lsu_lsc_ctl.io.lsu_pkt_m.valid @[el2_lsu.scala 347:52] + ecc.io.lsu_pkt_m.store_data_bypass_m <= lsu_lsc_ctl.io.lsu_pkt_m.store_data_bypass_m @[el2_lsu.scala 347:52] + ecc.io.lsu_pkt_m.load_ldst_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_m.load_ldst_bypass_d @[el2_lsu.scala 347:52] + ecc.io.lsu_pkt_m.store_data_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_m.store_data_bypass_d @[el2_lsu.scala 347:52] + ecc.io.lsu_pkt_m.dma <= lsu_lsc_ctl.io.lsu_pkt_m.dma @[el2_lsu.scala 347:52] + ecc.io.lsu_pkt_m.unsign <= lsu_lsc_ctl.io.lsu_pkt_m.unsign @[el2_lsu.scala 347:52] + ecc.io.lsu_pkt_m.store <= lsu_lsc_ctl.io.lsu_pkt_m.store @[el2_lsu.scala 347:52] + ecc.io.lsu_pkt_m.load <= lsu_lsc_ctl.io.lsu_pkt_m.load @[el2_lsu.scala 347:52] + ecc.io.lsu_pkt_m.dword <= lsu_lsc_ctl.io.lsu_pkt_m.dword @[el2_lsu.scala 347:52] + ecc.io.lsu_pkt_m.word <= lsu_lsc_ctl.io.lsu_pkt_m.word @[el2_lsu.scala 347:52] + ecc.io.lsu_pkt_m.half <= lsu_lsc_ctl.io.lsu_pkt_m.half @[el2_lsu.scala 347:52] + ecc.io.lsu_pkt_m.by <= lsu_lsc_ctl.io.lsu_pkt_m.by @[el2_lsu.scala 347:52] + ecc.io.lsu_pkt_m.fast_int <= lsu_lsc_ctl.io.lsu_pkt_m.fast_int @[el2_lsu.scala 347:52] + ecc.io.lsu_pkt_r.valid <= lsu_lsc_ctl.io.lsu_pkt_r.valid @[el2_lsu.scala 348:52] + ecc.io.lsu_pkt_r.store_data_bypass_m <= lsu_lsc_ctl.io.lsu_pkt_r.store_data_bypass_m @[el2_lsu.scala 348:52] + ecc.io.lsu_pkt_r.load_ldst_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_r.load_ldst_bypass_d @[el2_lsu.scala 348:52] + ecc.io.lsu_pkt_r.store_data_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_r.store_data_bypass_d @[el2_lsu.scala 348:52] + ecc.io.lsu_pkt_r.dma <= lsu_lsc_ctl.io.lsu_pkt_r.dma @[el2_lsu.scala 348:52] + ecc.io.lsu_pkt_r.unsign <= lsu_lsc_ctl.io.lsu_pkt_r.unsign @[el2_lsu.scala 348:52] + ecc.io.lsu_pkt_r.store <= lsu_lsc_ctl.io.lsu_pkt_r.store @[el2_lsu.scala 348:52] + ecc.io.lsu_pkt_r.load <= lsu_lsc_ctl.io.lsu_pkt_r.load @[el2_lsu.scala 348:52] + ecc.io.lsu_pkt_r.dword <= lsu_lsc_ctl.io.lsu_pkt_r.dword @[el2_lsu.scala 348:52] + ecc.io.lsu_pkt_r.word <= lsu_lsc_ctl.io.lsu_pkt_r.word @[el2_lsu.scala 348:52] + ecc.io.lsu_pkt_r.half <= lsu_lsc_ctl.io.lsu_pkt_r.half @[el2_lsu.scala 348:52] + ecc.io.lsu_pkt_r.by <= lsu_lsc_ctl.io.lsu_pkt_r.by @[el2_lsu.scala 348:52] + ecc.io.lsu_pkt_r.fast_int <= lsu_lsc_ctl.io.lsu_pkt_r.fast_int @[el2_lsu.scala 348:52] + ecc.io.stbuf_data_any <= stbuf.io.stbuf_data_any @[el2_lsu.scala 349:54] + ecc.io.dec_tlu_core_ecc_disable <= io.dec_tlu_core_ecc_disable @[el2_lsu.scala 350:50] + ecc.io.lsu_dccm_rden_r <= dccm_ctl.io.lsu_dccm_rden_r @[el2_lsu.scala 351:56] + ecc.io.addr_in_dccm_r <= lsu_lsc_ctl.io.addr_in_dccm_r @[el2_lsu.scala 352:50] + ecc.io.lsu_addr_r <= lsu_lsc_ctl.io.lsu_addr_r @[el2_lsu.scala 353:58] + ecc.io.end_addr_r <= lsu_lsc_ctl.io.end_addr_r @[el2_lsu.scala 354:58] + ecc.io.lsu_addr_m <= lsu_lsc_ctl.io.lsu_addr_m @[el2_lsu.scala 355:58] + ecc.io.end_addr_m <= lsu_lsc_ctl.io.end_addr_m @[el2_lsu.scala 356:58] + ecc.io.dccm_rdata_hi_r <= dccm_ctl.io.dccm_rdata_hi_r @[el2_lsu.scala 357:54] + ecc.io.dccm_rdata_lo_r <= dccm_ctl.io.dccm_rdata_lo_r @[el2_lsu.scala 358:54] + ecc.io.dccm_rdata_hi_m <= dccm_ctl.io.dccm_rdata_hi_m @[el2_lsu.scala 359:54] + ecc.io.dccm_rdata_lo_m <= dccm_ctl.io.dccm_rdata_lo_m @[el2_lsu.scala 360:54] + ecc.io.dccm_data_ecc_hi_r <= dccm_ctl.io.dccm_data_ecc_hi_r @[el2_lsu.scala 361:50] + ecc.io.dccm_data_ecc_lo_r <= dccm_ctl.io.dccm_data_ecc_lo_r @[el2_lsu.scala 362:50] + ecc.io.dccm_data_ecc_hi_m <= dccm_ctl.io.dccm_data_ecc_hi_m @[el2_lsu.scala 363:50] + ecc.io.dccm_data_ecc_lo_m <= dccm_ctl.io.dccm_data_ecc_lo_m @[el2_lsu.scala 364:50] + ecc.io.ld_single_ecc_error_r <= dccm_ctl.io.ld_single_ecc_error_r @[el2_lsu.scala 365:50] + ecc.io.ld_single_ecc_error_r_ff <= dccm_ctl.io.ld_single_ecc_error_r_ff @[el2_lsu.scala 366:50] + ecc.io.lsu_dccm_rden_m <= dccm_ctl.io.lsu_dccm_rden_m @[el2_lsu.scala 367:50] + ecc.io.addr_in_dccm_m <= lsu_lsc_ctl.io.addr_in_dccm_m @[el2_lsu.scala 368:50] + ecc.io.dma_dccm_wen <= dma_dccm_wen @[el2_lsu.scala 369:50] + ecc.io.dma_dccm_wdata_lo <= dma_dccm_wdata_lo @[el2_lsu.scala 370:50] + ecc.io.dma_dccm_wdata_hi <= dma_dccm_wdata_hi @[el2_lsu.scala 371:50] + ecc.io.scan_mode <= io.scan_mode @[el2_lsu.scala 372:50] + trigger.io.trigger_pkt_any[0].tdata2 <= io.trigger_pkt_any[0].tdata2 @[el2_lsu.scala 376:50] + trigger.io.trigger_pkt_any[0].m <= io.trigger_pkt_any[0].m @[el2_lsu.scala 376:50] + trigger.io.trigger_pkt_any[0].execute <= io.trigger_pkt_any[0].execute @[el2_lsu.scala 376:50] + trigger.io.trigger_pkt_any[0].load <= io.trigger_pkt_any[0].load @[el2_lsu.scala 376:50] + trigger.io.trigger_pkt_any[0].store <= io.trigger_pkt_any[0].store @[el2_lsu.scala 376:50] + trigger.io.trigger_pkt_any[0].match_ <= io.trigger_pkt_any[0].match_ @[el2_lsu.scala 376:50] + trigger.io.trigger_pkt_any[0].select <= io.trigger_pkt_any[0].select @[el2_lsu.scala 376:50] + trigger.io.trigger_pkt_any[1].tdata2 <= io.trigger_pkt_any[1].tdata2 @[el2_lsu.scala 376:50] + trigger.io.trigger_pkt_any[1].m <= io.trigger_pkt_any[1].m @[el2_lsu.scala 376:50] + trigger.io.trigger_pkt_any[1].execute <= io.trigger_pkt_any[1].execute @[el2_lsu.scala 376:50] + trigger.io.trigger_pkt_any[1].load <= io.trigger_pkt_any[1].load @[el2_lsu.scala 376:50] + trigger.io.trigger_pkt_any[1].store <= io.trigger_pkt_any[1].store @[el2_lsu.scala 376:50] + trigger.io.trigger_pkt_any[1].match_ <= io.trigger_pkt_any[1].match_ @[el2_lsu.scala 376:50] + trigger.io.trigger_pkt_any[1].select <= io.trigger_pkt_any[1].select @[el2_lsu.scala 376:50] + trigger.io.trigger_pkt_any[2].tdata2 <= io.trigger_pkt_any[2].tdata2 @[el2_lsu.scala 376:50] + trigger.io.trigger_pkt_any[2].m <= io.trigger_pkt_any[2].m @[el2_lsu.scala 376:50] + trigger.io.trigger_pkt_any[2].execute <= io.trigger_pkt_any[2].execute @[el2_lsu.scala 376:50] + trigger.io.trigger_pkt_any[2].load <= io.trigger_pkt_any[2].load @[el2_lsu.scala 376:50] + trigger.io.trigger_pkt_any[2].store <= io.trigger_pkt_any[2].store @[el2_lsu.scala 376:50] + trigger.io.trigger_pkt_any[2].match_ <= io.trigger_pkt_any[2].match_ @[el2_lsu.scala 376:50] + trigger.io.trigger_pkt_any[2].select <= io.trigger_pkt_any[2].select @[el2_lsu.scala 376:50] + trigger.io.trigger_pkt_any[3].tdata2 <= io.trigger_pkt_any[3].tdata2 @[el2_lsu.scala 376:50] + trigger.io.trigger_pkt_any[3].m <= io.trigger_pkt_any[3].m @[el2_lsu.scala 376:50] + trigger.io.trigger_pkt_any[3].execute <= io.trigger_pkt_any[3].execute @[el2_lsu.scala 376:50] + trigger.io.trigger_pkt_any[3].load <= io.trigger_pkt_any[3].load @[el2_lsu.scala 376:50] + trigger.io.trigger_pkt_any[3].store <= io.trigger_pkt_any[3].store @[el2_lsu.scala 376:50] + trigger.io.trigger_pkt_any[3].match_ <= io.trigger_pkt_any[3].match_ @[el2_lsu.scala 376:50] + trigger.io.trigger_pkt_any[3].select <= io.trigger_pkt_any[3].select @[el2_lsu.scala 376:50] + trigger.io.lsu_pkt_m.valid <= lsu_lsc_ctl.io.lsu_pkt_m.valid @[el2_lsu.scala 377:50] + trigger.io.lsu_pkt_m.store_data_bypass_m <= lsu_lsc_ctl.io.lsu_pkt_m.store_data_bypass_m @[el2_lsu.scala 377:50] + trigger.io.lsu_pkt_m.load_ldst_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_m.load_ldst_bypass_d @[el2_lsu.scala 377:50] + trigger.io.lsu_pkt_m.store_data_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_m.store_data_bypass_d @[el2_lsu.scala 377:50] + trigger.io.lsu_pkt_m.dma <= lsu_lsc_ctl.io.lsu_pkt_m.dma @[el2_lsu.scala 377:50] + trigger.io.lsu_pkt_m.unsign <= lsu_lsc_ctl.io.lsu_pkt_m.unsign @[el2_lsu.scala 377:50] + trigger.io.lsu_pkt_m.store <= lsu_lsc_ctl.io.lsu_pkt_m.store @[el2_lsu.scala 377:50] + trigger.io.lsu_pkt_m.load <= lsu_lsc_ctl.io.lsu_pkt_m.load @[el2_lsu.scala 377:50] + trigger.io.lsu_pkt_m.dword <= lsu_lsc_ctl.io.lsu_pkt_m.dword @[el2_lsu.scala 377:50] + trigger.io.lsu_pkt_m.word <= lsu_lsc_ctl.io.lsu_pkt_m.word @[el2_lsu.scala 377:50] + trigger.io.lsu_pkt_m.half <= lsu_lsc_ctl.io.lsu_pkt_m.half @[el2_lsu.scala 377:50] + trigger.io.lsu_pkt_m.by <= lsu_lsc_ctl.io.lsu_pkt_m.by @[el2_lsu.scala 377:50] + trigger.io.lsu_pkt_m.fast_int <= lsu_lsc_ctl.io.lsu_pkt_m.fast_int @[el2_lsu.scala 377:50] + trigger.io.lsu_addr_m <= lsu_lsc_ctl.io.lsu_addr_m @[el2_lsu.scala 378:50] + trigger.io.store_data_m <= lsu_lsc_ctl.io.store_data_m @[el2_lsu.scala 379:50] + io.lsu_trigger_match_m <= trigger.io.lsu_trigger_match_m @[el2_lsu.scala 381:50] + clkdomain.io.free_clk <= io.free_clk @[el2_lsu.scala 385:50] + clkdomain.io.clk_override <= io.clk_override @[el2_lsu.scala 386:50] + clkdomain.io.addr_in_dccm_m <= lsu_lsc_ctl.io.addr_in_dccm_m @[el2_lsu.scala 387:50] + clkdomain.io.dma_dccm_req <= io.dma_dccm_req @[el2_lsu.scala 388:50] + clkdomain.io.ldst_stbuf_reqvld_r <= stbuf.io.ldst_stbuf_reqvld_r @[el2_lsu.scala 389:50] + clkdomain.io.stbuf_reqvld_any <= stbuf.io.stbuf_reqvld_any @[el2_lsu.scala 390:50] + clkdomain.io.stbuf_reqvld_flushed_any <= stbuf.io.stbuf_reqvld_flushed_any @[el2_lsu.scala 391:50] + clkdomain.io.lsu_busreq_r <= bus_intf.io.lsu_busreq_r @[el2_lsu.scala 392:50] + clkdomain.io.lsu_bus_buffer_pend_any <= bus_intf.io.lsu_bus_buffer_pend_any @[el2_lsu.scala 393:50] + clkdomain.io.lsu_bus_buffer_empty_any <= bus_intf.io.lsu_bus_buffer_empty_any @[el2_lsu.scala 394:50] + clkdomain.io.lsu_stbuf_empty_any <= stbuf.io.lsu_stbuf_empty_any @[el2_lsu.scala 395:50] + clkdomain.io.lsu_bus_clk_en <= io.lsu_bus_clk_en @[el2_lsu.scala 396:50] + clkdomain.io.lsu_p.valid <= io.lsu_p.valid @[el2_lsu.scala 397:50] + clkdomain.io.lsu_p.store_data_bypass_m <= io.lsu_p.store_data_bypass_m @[el2_lsu.scala 397:50] + clkdomain.io.lsu_p.load_ldst_bypass_d <= io.lsu_p.load_ldst_bypass_d @[el2_lsu.scala 397:50] + clkdomain.io.lsu_p.store_data_bypass_d <= io.lsu_p.store_data_bypass_d @[el2_lsu.scala 397:50] + clkdomain.io.lsu_p.dma <= io.lsu_p.dma @[el2_lsu.scala 397:50] + clkdomain.io.lsu_p.unsign <= io.lsu_p.unsign @[el2_lsu.scala 397:50] + clkdomain.io.lsu_p.store <= io.lsu_p.store @[el2_lsu.scala 397:50] + clkdomain.io.lsu_p.load <= io.lsu_p.load @[el2_lsu.scala 397:50] + clkdomain.io.lsu_p.dword <= io.lsu_p.dword @[el2_lsu.scala 397:50] + clkdomain.io.lsu_p.word <= io.lsu_p.word @[el2_lsu.scala 397:50] + clkdomain.io.lsu_p.half <= io.lsu_p.half @[el2_lsu.scala 397:50] + clkdomain.io.lsu_p.by <= io.lsu_p.by @[el2_lsu.scala 397:50] + clkdomain.io.lsu_p.fast_int <= io.lsu_p.fast_int @[el2_lsu.scala 397:50] + clkdomain.io.lsu_pkt_d.valid <= lsu_lsc_ctl.io.lsu_pkt_d.valid @[el2_lsu.scala 398:50] + clkdomain.io.lsu_pkt_d.store_data_bypass_m <= lsu_lsc_ctl.io.lsu_pkt_d.store_data_bypass_m @[el2_lsu.scala 398:50] + clkdomain.io.lsu_pkt_d.load_ldst_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_d.load_ldst_bypass_d @[el2_lsu.scala 398:50] + clkdomain.io.lsu_pkt_d.store_data_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_d.store_data_bypass_d @[el2_lsu.scala 398:50] + clkdomain.io.lsu_pkt_d.dma <= lsu_lsc_ctl.io.lsu_pkt_d.dma @[el2_lsu.scala 398:50] + clkdomain.io.lsu_pkt_d.unsign <= lsu_lsc_ctl.io.lsu_pkt_d.unsign @[el2_lsu.scala 398:50] + clkdomain.io.lsu_pkt_d.store <= lsu_lsc_ctl.io.lsu_pkt_d.store @[el2_lsu.scala 398:50] + clkdomain.io.lsu_pkt_d.load <= lsu_lsc_ctl.io.lsu_pkt_d.load @[el2_lsu.scala 398:50] + clkdomain.io.lsu_pkt_d.dword <= lsu_lsc_ctl.io.lsu_pkt_d.dword @[el2_lsu.scala 398:50] + clkdomain.io.lsu_pkt_d.word <= lsu_lsc_ctl.io.lsu_pkt_d.word @[el2_lsu.scala 398:50] + clkdomain.io.lsu_pkt_d.half <= lsu_lsc_ctl.io.lsu_pkt_d.half @[el2_lsu.scala 398:50] + clkdomain.io.lsu_pkt_d.by <= lsu_lsc_ctl.io.lsu_pkt_d.by @[el2_lsu.scala 398:50] + clkdomain.io.lsu_pkt_d.fast_int <= lsu_lsc_ctl.io.lsu_pkt_d.fast_int @[el2_lsu.scala 398:50] + clkdomain.io.lsu_pkt_m.valid <= lsu_lsc_ctl.io.lsu_pkt_m.valid @[el2_lsu.scala 399:50] + clkdomain.io.lsu_pkt_m.store_data_bypass_m <= lsu_lsc_ctl.io.lsu_pkt_m.store_data_bypass_m @[el2_lsu.scala 399:50] + clkdomain.io.lsu_pkt_m.load_ldst_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_m.load_ldst_bypass_d @[el2_lsu.scala 399:50] + clkdomain.io.lsu_pkt_m.store_data_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_m.store_data_bypass_d @[el2_lsu.scala 399:50] + clkdomain.io.lsu_pkt_m.dma <= lsu_lsc_ctl.io.lsu_pkt_m.dma @[el2_lsu.scala 399:50] + clkdomain.io.lsu_pkt_m.unsign <= lsu_lsc_ctl.io.lsu_pkt_m.unsign @[el2_lsu.scala 399:50] + clkdomain.io.lsu_pkt_m.store <= lsu_lsc_ctl.io.lsu_pkt_m.store @[el2_lsu.scala 399:50] + clkdomain.io.lsu_pkt_m.load <= lsu_lsc_ctl.io.lsu_pkt_m.load @[el2_lsu.scala 399:50] + clkdomain.io.lsu_pkt_m.dword <= lsu_lsc_ctl.io.lsu_pkt_m.dword @[el2_lsu.scala 399:50] + clkdomain.io.lsu_pkt_m.word <= lsu_lsc_ctl.io.lsu_pkt_m.word @[el2_lsu.scala 399:50] + clkdomain.io.lsu_pkt_m.half <= lsu_lsc_ctl.io.lsu_pkt_m.half @[el2_lsu.scala 399:50] + clkdomain.io.lsu_pkt_m.by <= lsu_lsc_ctl.io.lsu_pkt_m.by @[el2_lsu.scala 399:50] + clkdomain.io.lsu_pkt_m.fast_int <= lsu_lsc_ctl.io.lsu_pkt_m.fast_int @[el2_lsu.scala 399:50] + clkdomain.io.lsu_pkt_r.valid <= lsu_lsc_ctl.io.lsu_pkt_r.valid @[el2_lsu.scala 400:50] + clkdomain.io.lsu_pkt_r.store_data_bypass_m <= lsu_lsc_ctl.io.lsu_pkt_r.store_data_bypass_m @[el2_lsu.scala 400:50] + clkdomain.io.lsu_pkt_r.load_ldst_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_r.load_ldst_bypass_d @[el2_lsu.scala 400:50] + clkdomain.io.lsu_pkt_r.store_data_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_r.store_data_bypass_d @[el2_lsu.scala 400:50] + clkdomain.io.lsu_pkt_r.dma <= lsu_lsc_ctl.io.lsu_pkt_r.dma @[el2_lsu.scala 400:50] + clkdomain.io.lsu_pkt_r.unsign <= lsu_lsc_ctl.io.lsu_pkt_r.unsign @[el2_lsu.scala 400:50] + clkdomain.io.lsu_pkt_r.store <= lsu_lsc_ctl.io.lsu_pkt_r.store @[el2_lsu.scala 400:50] + clkdomain.io.lsu_pkt_r.load <= lsu_lsc_ctl.io.lsu_pkt_r.load @[el2_lsu.scala 400:50] + clkdomain.io.lsu_pkt_r.dword <= lsu_lsc_ctl.io.lsu_pkt_r.dword @[el2_lsu.scala 400:50] + clkdomain.io.lsu_pkt_r.word <= lsu_lsc_ctl.io.lsu_pkt_r.word @[el2_lsu.scala 400:50] + clkdomain.io.lsu_pkt_r.half <= lsu_lsc_ctl.io.lsu_pkt_r.half @[el2_lsu.scala 400:50] + clkdomain.io.lsu_pkt_r.by <= lsu_lsc_ctl.io.lsu_pkt_r.by @[el2_lsu.scala 400:50] + clkdomain.io.lsu_pkt_r.fast_int <= lsu_lsc_ctl.io.lsu_pkt_r.fast_int @[el2_lsu.scala 400:50] + clkdomain.io.scan_mode <= io.scan_mode @[el2_lsu.scala 401:50] + bus_intf.io.scan_mode <= io.scan_mode @[el2_lsu.scala 405:50] + bus_intf.io.dec_tlu_external_ldfwd_disable <= io.dec_tlu_external_ldfwd_disable @[el2_lsu.scala 406:50] + bus_intf.io.dec_tlu_wb_coalescing_disable <= io.dec_tlu_wb_coalescing_disable @[el2_lsu.scala 407:50] + bus_intf.io.dec_tlu_sideeffect_posted_disable <= io.dec_tlu_sideeffect_posted_disable @[el2_lsu.scala 408:50] + bus_intf.io.lsu_c1_m_clk <= clkdomain.io.lsu_c1_m_clk @[el2_lsu.scala 409:50] + bus_intf.io.lsu_c1_r_clk <= clkdomain.io.lsu_c1_r_clk @[el2_lsu.scala 410:50] + bus_intf.io.lsu_c2_r_clk <= clkdomain.io.lsu_c2_r_clk @[el2_lsu.scala 411:50] + bus_intf.io.lsu_bus_ibuf_c1_clk <= clkdomain.io.lsu_bus_ibuf_c1_clk @[el2_lsu.scala 412:50] + bus_intf.io.lsu_bus_obuf_c1_clk <= clkdomain.io.lsu_bus_obuf_c1_clk @[el2_lsu.scala 413:50] + bus_intf.io.lsu_bus_buf_c1_clk <= clkdomain.io.lsu_bus_buf_c1_clk @[el2_lsu.scala 414:50] + bus_intf.io.lsu_free_c2_clk <= clkdomain.io.lsu_free_c2_clk @[el2_lsu.scala 415:50] + bus_intf.io.free_clk <= io.free_clk @[el2_lsu.scala 416:50] + bus_intf.io.lsu_busm_clk <= clkdomain.io.lsu_busm_clk @[el2_lsu.scala 417:50] + bus_intf.io.dec_lsu_valid_raw_d <= io.dec_lsu_valid_raw_d @[el2_lsu.scala 418:50] + bus_intf.io.lsu_busreq_m <= lsu_busreq_m @[el2_lsu.scala 419:50] + bus_intf.io.lsu_addr_d <= lsu_lsc_ctl.io.lsu_addr_d @[el2_lsu.scala 420:50] + bus_intf.io.lsu_addr_m <= lsu_lsc_ctl.io.lsu_addr_m @[el2_lsu.scala 421:50] + bus_intf.io.lsu_addr_r <= lsu_lsc_ctl.io.lsu_addr_r @[el2_lsu.scala 422:50] + bus_intf.io.end_addr_d <= lsu_lsc_ctl.io.end_addr_d @[el2_lsu.scala 423:50] + bus_intf.io.end_addr_m <= lsu_lsc_ctl.io.end_addr_m @[el2_lsu.scala 424:50] + bus_intf.io.end_addr_r <= lsu_lsc_ctl.io.end_addr_r @[el2_lsu.scala 425:50] + bus_intf.io.store_data_m <= lsu_lsc_ctl.io.store_data_m @[el2_lsu.scala 426:50] + bus_intf.io.dec_tlu_force_halt <= io.dec_tlu_force_halt @[el2_lsu.scala 427:50] + bus_intf.io.lsu_commit_r <= lsu_lsc_ctl.io.lsu_commit_r @[el2_lsu.scala 428:50] + bus_intf.io.is_sideeffects_m <= lsu_lsc_ctl.io.is_sideeffects_m @[el2_lsu.scala 429:50] + bus_intf.io.flush_m_up <= io.dec_tlu_flush_lower_r @[el2_lsu.scala 430:50] + bus_intf.io.flush_r <= io.dec_tlu_i0_kill_writeb_r @[el2_lsu.scala 431:50] + io.lsu_imprecise_error_load_any <= bus_intf.io.lsu_imprecise_error_load_any @[el2_lsu.scala 434:50] + io.lsu_imprecise_error_store_any <= bus_intf.io.lsu_imprecise_error_store_any @[el2_lsu.scala 435:50] + io.lsu_imprecise_error_addr_any <= bus_intf.io.lsu_imprecise_error_addr_any @[el2_lsu.scala 436:50] + io.lsu_nonblock_load_valid_m <= bus_intf.io.lsu_nonblock_load_valid_m @[el2_lsu.scala 437:50] + io.lsu_nonblock_load_tag_m <= bus_intf.io.lsu_nonblock_load_tag_m @[el2_lsu.scala 438:50] + io.lsu_nonblock_load_inv_r <= bus_intf.io.lsu_nonblock_load_inv_r @[el2_lsu.scala 439:50] + io.lsu_nonblock_load_inv_tag_r <= bus_intf.io.lsu_nonblock_load_inv_tag_r @[el2_lsu.scala 440:50] + io.lsu_nonblock_load_data_valid <= bus_intf.io.lsu_nonblock_load_data_valid @[el2_lsu.scala 441:50] + io.lsu_nonblock_load_data_error <= bus_intf.io.lsu_nonblock_load_data_error @[el2_lsu.scala 442:50] + io.lsu_nonblock_load_data_tag <= bus_intf.io.lsu_nonblock_load_data_tag @[el2_lsu.scala 443:50] + io.lsu_nonblock_load_data <= bus_intf.io.lsu_nonblock_load_data @[el2_lsu.scala 444:50] + io.lsu_pmu_bus_trxn <= bus_intf.io.lsu_pmu_bus_trxn @[el2_lsu.scala 445:50] + io.lsu_pmu_bus_misaligned <= bus_intf.io.lsu_pmu_bus_misaligned @[el2_lsu.scala 446:50] + io.lsu_pmu_bus_error <= bus_intf.io.lsu_pmu_bus_error @[el2_lsu.scala 447:50] + io.lsu_pmu_bus_busy <= bus_intf.io.lsu_pmu_bus_busy @[el2_lsu.scala 448:50] + io.lsu_axi_awvalid <= bus_intf.io.lsu_axi_awvalid @[el2_lsu.scala 449:50] + bus_intf.io.lsu_axi_awready <= io.lsu_axi_awready @[el2_lsu.scala 450:50] + io.lsu_axi_awid <= bus_intf.io.lsu_axi_awid @[el2_lsu.scala 451:50] + io.lsu_axi_awaddr <= bus_intf.io.lsu_axi_awaddr @[el2_lsu.scala 452:50] + io.lsu_axi_awregion <= bus_intf.io.lsu_axi_awregion @[el2_lsu.scala 453:50] + io.lsu_axi_awlen <= bus_intf.io.lsu_axi_awlen @[el2_lsu.scala 454:50] + io.lsu_axi_awsize <= bus_intf.io.lsu_axi_awsize @[el2_lsu.scala 455:50] + io.lsu_axi_awburst <= bus_intf.io.lsu_axi_awburst @[el2_lsu.scala 456:50] + io.lsu_axi_awlock <= bus_intf.io.lsu_axi_awlock @[el2_lsu.scala 457:50] + io.lsu_axi_awcache <= bus_intf.io.lsu_axi_awcache @[el2_lsu.scala 458:50] + io.lsu_axi_awprot <= bus_intf.io.lsu_axi_awprot @[el2_lsu.scala 459:50] + io.lsu_axi_awqos <= bus_intf.io.lsu_axi_awqos @[el2_lsu.scala 460:50] + io.lsu_axi_wvalid <= bus_intf.io.lsu_axi_wvalid @[el2_lsu.scala 461:50] + bus_intf.io.lsu_axi_wready <= io.lsu_axi_wready @[el2_lsu.scala 462:50] + io.lsu_axi_wdata <= bus_intf.io.lsu_axi_wdata @[el2_lsu.scala 463:50] + io.lsu_axi_wstrb <= bus_intf.io.lsu_axi_wstrb @[el2_lsu.scala 464:50] + io.lsu_axi_wlast <= bus_intf.io.lsu_axi_wlast @[el2_lsu.scala 465:50] + bus_intf.io.lsu_axi_bvalid <= io.lsu_axi_bvalid @[el2_lsu.scala 466:50] + io.lsu_axi_bready <= bus_intf.io.lsu_axi_bready @[el2_lsu.scala 467:50] + bus_intf.io.lsu_axi_bresp <= io.lsu_axi_bresp @[el2_lsu.scala 468:50] + bus_intf.io.lsu_axi_bid <= io.lsu_axi_bid @[el2_lsu.scala 469:50] + io.lsu_axi_arvalid <= bus_intf.io.lsu_axi_arvalid @[el2_lsu.scala 470:50] + bus_intf.io.lsu_axi_arready <= io.lsu_axi_arready @[el2_lsu.scala 471:50] + io.lsu_axi_arid <= bus_intf.io.lsu_axi_arid @[el2_lsu.scala 472:50] + io.lsu_axi_araddr <= bus_intf.io.lsu_axi_araddr @[el2_lsu.scala 473:50] + io.lsu_axi_arregion <= bus_intf.io.lsu_axi_arregion @[el2_lsu.scala 474:50] + io.lsu_axi_arlen <= bus_intf.io.lsu_axi_arlen @[el2_lsu.scala 475:50] + io.lsu_axi_arsize <= bus_intf.io.lsu_axi_arsize @[el2_lsu.scala 476:50] + io.lsu_axi_arburst <= bus_intf.io.lsu_axi_arburst @[el2_lsu.scala 477:50] + io.lsu_axi_arlock <= bus_intf.io.lsu_axi_arlock @[el2_lsu.scala 478:50] + io.lsu_axi_arcache <= bus_intf.io.lsu_axi_arcache @[el2_lsu.scala 479:50] + io.lsu_axi_arprot <= bus_intf.io.lsu_axi_arprot @[el2_lsu.scala 480:50] + io.lsu_axi_arqos <= bus_intf.io.lsu_axi_arqos @[el2_lsu.scala 481:50] + bus_intf.io.lsu_axi_rvalid <= io.lsu_axi_rvalid @[el2_lsu.scala 482:50] + io.lsu_axi_rready <= bus_intf.io.lsu_axi_rready @[el2_lsu.scala 483:50] + bus_intf.io.lsu_axi_rid <= io.lsu_axi_rid @[el2_lsu.scala 484:50] + bus_intf.io.lsu_axi_rdata <= io.lsu_axi_rdata @[el2_lsu.scala 485:50] + bus_intf.io.lsu_axi_rresp <= io.lsu_axi_rresp @[el2_lsu.scala 486:50] + bus_intf.io.lsu_axi_rlast <= io.lsu_axi_rlast @[el2_lsu.scala 487:50] + bus_intf.io.lsu_bus_clk_en <= io.lsu_bus_clk_en @[el2_lsu.scala 488:50] + reg _T_52 : UInt, clkdomain.io.lsu_c1_m_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu.scala 490:67] + _T_52 <= io.dma_mem_tag @[el2_lsu.scala 490:67] + dma_mem_tag_m <= _T_52 @[el2_lsu.scala 490:57] + reg _T_53 : UInt<1>, clkdomain.io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu.scala 491:67] + _T_53 <= lsu_raw_fwd_hi_m @[el2_lsu.scala 491:67] + lsu_raw_fwd_hi_r <= _T_53 @[el2_lsu.scala 491:57] + reg _T_54 : UInt<1>, clkdomain.io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu.scala 492:67] + _T_54 <= lsu_raw_fwd_lo_m @[el2_lsu.scala 492:67] + lsu_raw_fwd_lo_r <= _T_54 @[el2_lsu.scala 492:57] + diff --git a/el2_lsu.v b/el2_lsu.v new file mode 100644 index 00000000..5c943490 --- /dev/null +++ b/el2_lsu.v @@ -0,0 +1,5102 @@ +module rvlsadder( + input [31:0] io_rs1, + input [11:0] io_offset, + output [31:0] io_dout +); + wire [12:0] _T_1 = {1'h0,io_rs1[11:0]}; // @[Cat.scala 29:58] + wire [12:0] _T_3 = {1'h0,io_offset}; // @[Cat.scala 29:58] + wire [12:0] w1 = _T_1 + _T_3; // @[beh_lib.scala 51:40] + wire _T_7 = io_offset[11] ^ w1[12]; // @[beh_lib.scala 53:47] + wire _T_8 = ~_T_7; // @[beh_lib.scala 53:31] + wire [19:0] _T_10 = _T_8 ? 20'hfffff : 20'h0; // @[Bitwise.scala 72:12] + wire [19:0] _T_12 = _T_10 & io_rs1[31:12]; // @[beh_lib.scala 53:59] + wire _T_14 = ~io_offset[11]; // @[beh_lib.scala 54:16] + wire _T_16 = _T_14 & w1[12]; // @[beh_lib.scala 54:31] + wire [19:0] _T_18 = _T_16 ? 20'hfffff : 20'h0; // @[Bitwise.scala 72:12] + wire [19:0] _T_21 = io_rs1[31:12] + 20'h1; // @[beh_lib.scala 54:58] + wire [19:0] _T_22 = _T_18 & _T_21; // @[beh_lib.scala 54:42] + wire [19:0] _T_23 = _T_12 | _T_22; // @[beh_lib.scala 53:76] + wire _T_26 = ~w1[12]; // @[beh_lib.scala 55:32] + wire _T_27 = io_offset[11] & _T_26; // @[beh_lib.scala 55:30] + wire [19:0] _T_29 = _T_27 ? 20'hfffff : 20'h0; // @[Bitwise.scala 72:12] + wire [19:0] _T_32 = io_rs1[31:12] - 20'h1; // @[beh_lib.scala 55:58] + wire [19:0] _T_33 = _T_29 & _T_32; // @[beh_lib.scala 55:42] + wire [19:0] dout_upper = _T_23 | _T_33; // @[beh_lib.scala 54:65] + assign io_dout = {dout_upper,w1[11:0]}; // @[beh_lib.scala 57:11] +endmodule +module rvrangecheck( + input [31:0] io_addr, + output io_in_range, + output io_in_region +); + assign io_in_range = io_addr[31:16] == 16'hf004; // @[beh_lib.scala 118:17] + assign io_in_region = io_addr[31:28] == 4'hf; // @[beh_lib.scala 114:17] +endmodule +module rvrangecheck_2( + input [31:0] io_addr, + output io_in_range, + output io_in_region +); + assign io_in_range = io_addr[31:15] == 17'h1e018; // @[beh_lib.scala 118:17] + assign io_in_region = io_addr[31:28] == 4'hf; // @[beh_lib.scala 114:17] +endmodule +module el2_lsu_addrcheck( + input [31:0] io_start_addr_d, + input [31:0] io_end_addr_d, + input io_lsu_pkt_d_by, + input io_lsu_pkt_d_half, + input io_lsu_pkt_d_word, + input io_lsu_pkt_d_load, + input io_lsu_pkt_d_store, + input io_lsu_pkt_d_dma, + input io_lsu_pkt_d_valid, + input [31:0] io_dec_tlu_mrac_ff, + input [3:0] io_rs1_region_d, + output io_addr_in_dccm_d, + output io_addr_in_pic_d, + output io_addr_external_d, + output io_access_fault_d, + output io_misaligned_fault_d, + output [3:0] io_exc_mscause_d +); + wire [31:0] rvrangecheck_io_addr; // @[el2_lsu_addrcheck.scala 45:44] + wire rvrangecheck_io_in_range; // @[el2_lsu_addrcheck.scala 45:44] + wire rvrangecheck_io_in_region; // @[el2_lsu_addrcheck.scala 45:44] + wire [31:0] rvrangecheck_1_io_addr; // @[el2_lsu_addrcheck.scala 51:44] + wire rvrangecheck_1_io_in_range; // @[el2_lsu_addrcheck.scala 51:44] + wire rvrangecheck_1_io_in_region; // @[el2_lsu_addrcheck.scala 51:44] + wire [31:0] start_addr_pic_rangecheck_io_addr; // @[el2_lsu_addrcheck.scala 74:41] + wire start_addr_pic_rangecheck_io_in_range; // @[el2_lsu_addrcheck.scala 74:41] + wire start_addr_pic_rangecheck_io_in_region; // @[el2_lsu_addrcheck.scala 74:41] + wire [31:0] end_addr_pic_rangecheck_io_addr; // @[el2_lsu_addrcheck.scala 80:39] + wire end_addr_pic_rangecheck_io_in_range; // @[el2_lsu_addrcheck.scala 80:39] + wire end_addr_pic_rangecheck_io_in_region; // @[el2_lsu_addrcheck.scala 80:39] + wire addr_in_iccm = io_start_addr_d[31:28] == 4'he; // @[el2_lsu_addrcheck.scala 65:45] + wire start_addr_in_dccm_region_d = rvrangecheck_io_in_region; // @[el2_lsu_addrcheck.scala 48:41] + wire start_addr_dccm_or_pic = start_addr_in_dccm_region_d | start_addr_pic_rangecheck_io_in_region; // @[el2_lsu_addrcheck.scala 85:60] + wire _T_5 = io_rs1_region_d == 4'hf; // @[el2_lsu_addrcheck.scala 86:54] + wire base_reg_dccm_or_pic = _T_5 | _T_5; // @[el2_lsu_addrcheck.scala 86:74] + wire start_addr_in_dccm_d = rvrangecheck_io_in_range; // @[el2_lsu_addrcheck.scala 47:41] + wire end_addr_in_dccm_d = rvrangecheck_1_io_in_range; // @[el2_lsu_addrcheck.scala 53:41] + wire [4:0] csr_idx = {io_start_addr_d[31:28],1'h1}; // @[Cat.scala 29:58] + wire [31:0] _T_13 = io_dec_tlu_mrac_ff >> csr_idx; // @[el2_lsu_addrcheck.scala 92:50] + wire _T_16 = start_addr_dccm_or_pic | addr_in_iccm; // @[el2_lsu_addrcheck.scala 92:121] + wire _T_17 = ~_T_16; // @[el2_lsu_addrcheck.scala 92:62] + wire _T_18 = _T_13[0] & _T_17; // @[el2_lsu_addrcheck.scala 92:60] + wire _T_19 = _T_18 & io_lsu_pkt_d_valid; // @[el2_lsu_addrcheck.scala 92:137] + wire _T_20 = io_lsu_pkt_d_store | io_lsu_pkt_d_load; // @[el2_lsu_addrcheck.scala 92:180] + wire is_sideeffects_d = _T_19 & _T_20; // @[el2_lsu_addrcheck.scala 92:158] + wire _T_22 = io_start_addr_d[1:0] == 2'h0; // @[el2_lsu_addrcheck.scala 93:75] + wire _T_23 = io_lsu_pkt_d_word & _T_22; // @[el2_lsu_addrcheck.scala 93:51] + wire _T_25 = ~io_start_addr_d[0]; // @[el2_lsu_addrcheck.scala 93:128] + wire _T_26 = io_lsu_pkt_d_half & _T_25; // @[el2_lsu_addrcheck.scala 93:106] + wire _T_27 = _T_23 | _T_26; // @[el2_lsu_addrcheck.scala 93:85] + wire is_aligned_d = _T_27 | io_lsu_pkt_d_by; // @[el2_lsu_addrcheck.scala 93:138] + wire [31:0] _T_38 = io_start_addr_d | 32'h7fffffff; // @[el2_lsu_addrcheck.scala 98:57] + wire _T_40 = _T_38 == 32'h7fffffff; // @[el2_lsu_addrcheck.scala 98:82] + wire [31:0] _T_43 = io_start_addr_d | 32'h3fffffff; // @[el2_lsu_addrcheck.scala 99:57] + wire _T_45 = _T_43 == 32'hffffffff; // @[el2_lsu_addrcheck.scala 99:82] + wire _T_47 = _T_40 | _T_45; // @[el2_lsu_addrcheck.scala 98:133] + wire [31:0] _T_49 = io_start_addr_d | 32'h1fffffff; // @[el2_lsu_addrcheck.scala 100:57] + wire _T_51 = _T_49 == 32'hbfffffff; // @[el2_lsu_addrcheck.scala 100:82] + wire _T_53 = _T_47 | _T_51; // @[el2_lsu_addrcheck.scala 99:133] + wire [31:0] _T_55 = io_start_addr_d | 32'hfffffff; // @[el2_lsu_addrcheck.scala 101:57] + wire _T_57 = _T_55 == 32'h8fffffff; // @[el2_lsu_addrcheck.scala 101:82] + wire _T_59 = _T_53 | _T_57; // @[el2_lsu_addrcheck.scala 100:133] + wire [31:0] _T_85 = io_end_addr_d | 32'h7fffffff; // @[el2_lsu_addrcheck.scala 107:58] + wire _T_87 = _T_85 == 32'h7fffffff; // @[el2_lsu_addrcheck.scala 107:83] + wire [31:0] _T_90 = io_end_addr_d | 32'h3fffffff; // @[el2_lsu_addrcheck.scala 108:59] + wire _T_92 = _T_90 == 32'hffffffff; // @[el2_lsu_addrcheck.scala 108:84] + wire _T_94 = _T_87 | _T_92; // @[el2_lsu_addrcheck.scala 107:134] + wire [31:0] _T_96 = io_end_addr_d | 32'h1fffffff; // @[el2_lsu_addrcheck.scala 109:59] + wire _T_98 = _T_96 == 32'hbfffffff; // @[el2_lsu_addrcheck.scala 109:84] + wire _T_100 = _T_94 | _T_98; // @[el2_lsu_addrcheck.scala 108:135] + wire [31:0] _T_102 = io_end_addr_d | 32'hfffffff; // @[el2_lsu_addrcheck.scala 110:59] + wire _T_104 = _T_102 == 32'h8fffffff; // @[el2_lsu_addrcheck.scala 110:84] + wire _T_106 = _T_100 | _T_104; // @[el2_lsu_addrcheck.scala 109:135] + wire non_dccm_access_ok = _T_59 & _T_106; // @[el2_lsu_addrcheck.scala 106:7] + wire regpred_access_fault_d = start_addr_dccm_or_pic ^ base_reg_dccm_or_pic; // @[el2_lsu_addrcheck.scala 116:57] + wire _T_133 = io_start_addr_d[1:0] != 2'h0; // @[el2_lsu_addrcheck.scala 117:76] + wire _T_134 = ~io_lsu_pkt_d_word; // @[el2_lsu_addrcheck.scala 117:92] + wire _T_135 = _T_133 | _T_134; // @[el2_lsu_addrcheck.scala 117:90] + wire picm_access_fault_d = io_addr_in_pic_d & _T_135; // @[el2_lsu_addrcheck.scala 117:51] + wire _T_136 = start_addr_in_dccm_d | start_addr_pic_rangecheck_io_in_range; // @[el2_lsu_addrcheck.scala 122:87] + wire _T_137 = ~_T_136; // @[el2_lsu_addrcheck.scala 122:64] + wire _T_138 = start_addr_in_dccm_region_d & _T_137; // @[el2_lsu_addrcheck.scala 122:62] + wire _T_139 = end_addr_in_dccm_d | end_addr_pic_rangecheck_io_in_range; // @[el2_lsu_addrcheck.scala 124:57] + wire _T_140 = ~_T_139; // @[el2_lsu_addrcheck.scala 124:36] + wire end_addr_in_dccm_region_d = rvrangecheck_1_io_in_region; // @[el2_lsu_addrcheck.scala 54:41] + wire _T_141 = end_addr_in_dccm_region_d & _T_140; // @[el2_lsu_addrcheck.scala 124:34] + wire _T_142 = _T_138 | _T_141; // @[el2_lsu_addrcheck.scala 122:112] + wire _T_143 = start_addr_in_dccm_d & end_addr_pic_rangecheck_io_in_range; // @[el2_lsu_addrcheck.scala 126:29] + wire _T_144 = _T_142 | _T_143; // @[el2_lsu_addrcheck.scala 124:85] + wire _T_145 = start_addr_pic_rangecheck_io_in_range & end_addr_in_dccm_d; // @[el2_lsu_addrcheck.scala 128:29] + wire unmapped_access_fault_d = _T_144 | _T_145; // @[el2_lsu_addrcheck.scala 126:85] + wire _T_147 = ~start_addr_in_dccm_region_d; // @[el2_lsu_addrcheck.scala 130:33] + wire _T_148 = ~non_dccm_access_ok; // @[el2_lsu_addrcheck.scala 130:64] + wire mpu_access_fault_d = _T_147 & _T_148; // @[el2_lsu_addrcheck.scala 130:62] + wire _T_150 = unmapped_access_fault_d | mpu_access_fault_d; // @[el2_lsu_addrcheck.scala 142:49] + wire _T_151 = _T_150 | picm_access_fault_d; // @[el2_lsu_addrcheck.scala 142:70] + wire _T_152 = _T_151 | regpred_access_fault_d; // @[el2_lsu_addrcheck.scala 142:92] + wire _T_153 = _T_152 & io_lsu_pkt_d_valid; // @[el2_lsu_addrcheck.scala 142:118] + wire _T_154 = ~io_lsu_pkt_d_dma; // @[el2_lsu_addrcheck.scala 142:141] + wire [3:0] _T_160 = picm_access_fault_d ? 4'h6 : 4'h0; // @[el2_lsu_addrcheck.scala 143:164] + wire [3:0] _T_161 = regpred_access_fault_d ? 4'h5 : _T_160; // @[el2_lsu_addrcheck.scala 143:120] + wire [3:0] _T_162 = mpu_access_fault_d ? 4'h3 : _T_161; // @[el2_lsu_addrcheck.scala 143:80] + wire [3:0] access_fault_mscause_d = unmapped_access_fault_d ? 4'h2 : _T_162; // @[el2_lsu_addrcheck.scala 143:35] + wire regcross_misaligned_fault_d = io_start_addr_d[31:28] != io_end_addr_d[31:28]; // @[el2_lsu_addrcheck.scala 144:61] + wire _T_165 = ~is_aligned_d; // @[el2_lsu_addrcheck.scala 145:59] + wire sideeffect_misaligned_fault_d = is_sideeffects_d & _T_165; // @[el2_lsu_addrcheck.scala 145:57] + wire _T_166 = sideeffect_misaligned_fault_d & io_addr_external_d; // @[el2_lsu_addrcheck.scala 146:90] + wire _T_167 = regcross_misaligned_fault_d | _T_166; // @[el2_lsu_addrcheck.scala 146:57] + wire _T_168 = _T_167 & io_lsu_pkt_d_valid; // @[el2_lsu_addrcheck.scala 146:113] + wire [3:0] _T_172 = sideeffect_misaligned_fault_d ? 4'h1 : 4'h0; // @[el2_lsu_addrcheck.scala 147:80] + wire [3:0] misaligned_fault_mscause_d = regcross_misaligned_fault_d ? 4'h2 : _T_172; // @[el2_lsu_addrcheck.scala 147:39] + rvrangecheck rvrangecheck ( // @[el2_lsu_addrcheck.scala 45:44] + .io_addr(rvrangecheck_io_addr), + .io_in_range(rvrangecheck_io_in_range), + .io_in_region(rvrangecheck_io_in_region) + ); + rvrangecheck rvrangecheck_1 ( // @[el2_lsu_addrcheck.scala 51:44] + .io_addr(rvrangecheck_1_io_addr), + .io_in_range(rvrangecheck_1_io_in_range), + .io_in_region(rvrangecheck_1_io_in_region) + ); + rvrangecheck_2 start_addr_pic_rangecheck ( // @[el2_lsu_addrcheck.scala 74:41] + .io_addr(start_addr_pic_rangecheck_io_addr), + .io_in_range(start_addr_pic_rangecheck_io_in_range), + .io_in_region(start_addr_pic_rangecheck_io_in_region) + ); + rvrangecheck_2 end_addr_pic_rangecheck ( // @[el2_lsu_addrcheck.scala 80:39] + .io_addr(end_addr_pic_rangecheck_io_addr), + .io_in_range(end_addr_pic_rangecheck_io_in_range), + .io_in_region(end_addr_pic_rangecheck_io_in_region) + ); + assign io_addr_in_dccm_d = start_addr_in_dccm_d & end_addr_in_dccm_d; // @[el2_lsu_addrcheck.scala 87:32] + assign io_addr_in_pic_d = start_addr_pic_rangecheck_io_in_range & end_addr_pic_rangecheck_io_in_range; // @[el2_lsu_addrcheck.scala 88:32] + assign io_addr_external_d = ~start_addr_dccm_or_pic; // @[el2_lsu_addrcheck.scala 90:30] + assign io_access_fault_d = _T_153 & _T_154; // @[el2_lsu_addrcheck.scala 142:21] + assign io_misaligned_fault_d = _T_168 & _T_154; // @[el2_lsu_addrcheck.scala 146:25] + assign io_exc_mscause_d = io_misaligned_fault_d ? misaligned_fault_mscause_d : access_fault_mscause_d; // @[el2_lsu_addrcheck.scala 148:21] + assign rvrangecheck_io_addr = io_start_addr_d; // @[el2_lsu_addrcheck.scala 46:41] + assign rvrangecheck_1_io_addr = io_end_addr_d; // @[el2_lsu_addrcheck.scala 52:41] + assign start_addr_pic_rangecheck_io_addr = io_start_addr_d; // @[el2_lsu_addrcheck.scala 75:37] + assign end_addr_pic_rangecheck_io_addr = io_end_addr_d; // @[el2_lsu_addrcheck.scala 81:35] +endmodule +module rvdff( + input clock, + input reset, + input io_din, + output io_dout +); +`ifdef RANDOMIZE_REG_INIT + reg [31:0] _RAND_0; +`endif // RANDOMIZE_REG_INIT + reg flop; // @[beh_lib.scala 15:21] + assign io_dout = flop; // @[beh_lib.scala 20:12] +`ifdef RANDOMIZE_GARBAGE_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_INVALID_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_REG_INIT +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_MEM_INIT +`define RANDOMIZE +`endif +`ifndef RANDOM +`define RANDOM $random +`endif +`ifdef RANDOMIZE_MEM_INIT + integer initvar; +`endif +`ifndef SYNTHESIS +`ifdef FIRRTL_BEFORE_INITIAL +`FIRRTL_BEFORE_INITIAL +`endif +initial begin + `ifdef RANDOMIZE + `ifdef INIT_RANDOM + `INIT_RANDOM + `endif + `ifndef VERILATOR + `ifdef RANDOMIZE_DELAY + #`RANDOMIZE_DELAY begin end + `else + #0.002 begin end + `endif + `endif +`ifdef RANDOMIZE_REG_INIT + _RAND_0 = {1{`RANDOM}}; + flop = _RAND_0[0:0]; +`endif // RANDOMIZE_REG_INIT + if (reset) begin + flop = 1'h0; + end + `endif // RANDOMIZE +end // initial +`ifdef FIRRTL_AFTER_INITIAL +`FIRRTL_AFTER_INITIAL +`endif +`endif // SYNTHESIS + always @(posedge clock or posedge reset) begin + if (reset) begin + flop <= 1'h0; + end else begin + flop <= io_din; + end + end +endmodule +module rvdff_2( + input clock, + input reset, + input [3:0] io_din, + output [3:0] io_dout +); +`ifdef RANDOMIZE_REG_INIT + reg [31:0] _RAND_0; +`endif // RANDOMIZE_REG_INIT + reg [3:0] flop; // @[beh_lib.scala 15:21] + assign io_dout = flop; // @[beh_lib.scala 20:12] +`ifdef RANDOMIZE_GARBAGE_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_INVALID_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_REG_INIT +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_MEM_INIT +`define RANDOMIZE +`endif +`ifndef RANDOM +`define RANDOM $random +`endif +`ifdef RANDOMIZE_MEM_INIT + integer initvar; +`endif +`ifndef SYNTHESIS +`ifdef FIRRTL_BEFORE_INITIAL +`FIRRTL_BEFORE_INITIAL +`endif +initial begin + `ifdef RANDOMIZE + `ifdef INIT_RANDOM + `INIT_RANDOM + `endif + `ifndef VERILATOR + `ifdef RANDOMIZE_DELAY + #`RANDOMIZE_DELAY begin end + `else + #0.002 begin end + `endif + `endif +`ifdef RANDOMIZE_REG_INIT + _RAND_0 = {1{`RANDOM}}; + flop = _RAND_0[3:0]; +`endif // RANDOMIZE_REG_INIT + if (reset) begin + flop = 4'h0; + end + `endif // RANDOMIZE +end // initial +`ifdef FIRRTL_AFTER_INITIAL +`FIRRTL_AFTER_INITIAL +`endif +`endif // SYNTHESIS + always @(posedge clock or posedge reset) begin + if (reset) begin + flop <= 4'h0; + end else begin + flop <= io_din; + end + end +endmodule +module rvdff_6( + input clock, + input reset, + input [31:0] io_din, + output [31:0] io_dout +); +`ifdef RANDOMIZE_REG_INIT + reg [31:0] _RAND_0; +`endif // RANDOMIZE_REG_INIT + reg [31:0] flop; // @[beh_lib.scala 15:21] + assign io_dout = flop; // @[beh_lib.scala 20:12] +`ifdef RANDOMIZE_GARBAGE_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_INVALID_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_REG_INIT +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_MEM_INIT +`define RANDOMIZE +`endif +`ifndef RANDOM +`define RANDOM $random +`endif +`ifdef RANDOMIZE_MEM_INIT + integer initvar; +`endif +`ifndef SYNTHESIS +`ifdef FIRRTL_BEFORE_INITIAL +`FIRRTL_BEFORE_INITIAL +`endif +initial begin + `ifdef RANDOMIZE + `ifdef INIT_RANDOM + `INIT_RANDOM + `endif + `ifndef VERILATOR + `ifdef RANDOMIZE_DELAY + #`RANDOMIZE_DELAY begin end + `else + #0.002 begin end + `endif + `endif +`ifdef RANDOMIZE_REG_INIT + _RAND_0 = {1{`RANDOM}}; + flop = _RAND_0[31:0]; +`endif // RANDOMIZE_REG_INIT + if (reset) begin + flop = 32'h0; + end + `endif // RANDOMIZE +end // initial +`ifdef FIRRTL_AFTER_INITIAL +`FIRRTL_AFTER_INITIAL +`endif +`endif // SYNTHESIS + always @(posedge clock or posedge reset) begin + if (reset) begin + flop <= 32'h0; + end else begin + flop <= io_din; + end + end +endmodule +module el2_lsu_lsc_ctl( + input clock, + input reset, + input [31:0] io_lsu_ld_data_corr_r, + input io_lsu_single_ecc_error_r, + input io_lsu_double_ecc_error_r, + input [31:0] io_lsu_ld_data_m, + input io_lsu_single_ecc_error_m, + input io_lsu_double_ecc_error_m, + input io_flush_m_up, + input io_flush_r, + input [31:0] io_exu_lsu_rs1_d, + input [31:0] io_exu_lsu_rs2_d, + input io_lsu_p_fast_int, + input io_lsu_p_by, + input io_lsu_p_half, + input io_lsu_p_word, + input io_lsu_p_dword, + input io_lsu_p_load, + input io_lsu_p_store, + input io_lsu_p_unsign, + input io_lsu_p_dma, + input io_lsu_p_store_data_bypass_d, + input io_lsu_p_load_ldst_bypass_d, + input io_lsu_p_store_data_bypass_m, + input io_lsu_p_valid, + input io_dec_lsu_valid_raw_d, + input [11:0] io_dec_lsu_offset_d, + input [31:0] io_picm_mask_data_m, + output [31:0] io_lsu_result_m, + output [31:0] io_lsu_addr_d, + output [31:0] io_lsu_addr_m, + output [31:0] io_lsu_addr_r, + output [31:0] io_end_addr_d, + output [31:0] io_end_addr_m, + output [31:0] io_end_addr_r, + output [31:0] io_store_data_m, + input [31:0] io_dec_tlu_mrac_ff, + output io_lsu_commit_r, + output io_lsu_single_ecc_error_incr, + output io_lsu_error_pkt_r_exc_valid, + output io_lsu_error_pkt_r_single_ecc_error, + output io_lsu_error_pkt_r_inst_type, + output io_lsu_error_pkt_r_exc_type, + output [3:0] io_lsu_error_pkt_r_mscause, + output [31:0] io_lsu_error_pkt_r_addr, + output [31:0] io_lsu_fir_addr, + output io_addr_in_dccm_d, + output io_addr_in_dccm_m, + output io_addr_in_dccm_r, + output io_addr_in_pic_d, + output io_addr_in_pic_m, + output io_addr_in_pic_r, + output io_addr_external_m, + input io_dma_dccm_req, + input [31:0] io_dma_mem_addr, + input [2:0] io_dma_mem_sz, + input io_dma_mem_write, + input [63:0] io_dma_mem_wdata, + output io_lsu_pkt_d_fast_int, + output io_lsu_pkt_d_by, + output io_lsu_pkt_d_half, + output io_lsu_pkt_d_word, + output io_lsu_pkt_d_dword, + output io_lsu_pkt_d_load, + output io_lsu_pkt_d_store, + output io_lsu_pkt_d_unsign, + output io_lsu_pkt_d_dma, + output io_lsu_pkt_d_store_data_bypass_d, + output io_lsu_pkt_d_load_ldst_bypass_d, + output io_lsu_pkt_d_store_data_bypass_m, + output io_lsu_pkt_d_valid, + output io_lsu_pkt_m_fast_int, + output io_lsu_pkt_m_by, + output io_lsu_pkt_m_half, + output io_lsu_pkt_m_word, + output io_lsu_pkt_m_dword, + output io_lsu_pkt_m_load, + output io_lsu_pkt_m_store, + output io_lsu_pkt_m_unsign, + output io_lsu_pkt_m_dma, + output io_lsu_pkt_m_store_data_bypass_m, + output io_lsu_pkt_m_valid, + output io_lsu_pkt_r_by, + output io_lsu_pkt_r_half, + output io_lsu_pkt_r_word, + output io_lsu_pkt_r_dword, + output io_lsu_pkt_r_load, + output io_lsu_pkt_r_store, + output io_lsu_pkt_r_unsign, + output io_lsu_pkt_r_dma, + output io_lsu_pkt_r_valid +); +`ifdef RANDOMIZE_REG_INIT + reg [31:0] _RAND_0; + reg [31:0] _RAND_1; + reg [31:0] _RAND_2; + reg [31:0] _RAND_3; + reg [31:0] _RAND_4; + reg [31:0] _RAND_5; + reg [31:0] _RAND_6; + reg [31:0] _RAND_7; + reg [31:0] _RAND_8; + reg [31:0] _RAND_9; + reg [31:0] _RAND_10; + reg [31:0] _RAND_11; + reg [31:0] _RAND_12; + reg [31:0] _RAND_13; + reg [31:0] _RAND_14; + reg [31:0] _RAND_15; + reg [31:0] _RAND_16; + reg [31:0] _RAND_17; + reg [31:0] _RAND_18; + reg [31:0] _RAND_19; + reg [31:0] _RAND_20; + reg [31:0] _RAND_21; + reg [31:0] _RAND_22; + reg [31:0] _RAND_23; + reg [31:0] _RAND_24; + reg [31:0] _RAND_25; +`endif // RANDOMIZE_REG_INIT + wire [31:0] lsadder_io_rs1; // @[el2_lsu_lsc_ctl.scala 118:23] + wire [11:0] lsadder_io_offset; // @[el2_lsu_lsc_ctl.scala 118:23] + wire [31:0] lsadder_io_dout; // @[el2_lsu_lsc_ctl.scala 118:23] + wire [31:0] addrcheck_io_start_addr_d; // @[el2_lsu_lsc_ctl.scala 141:25] + wire [31:0] addrcheck_io_end_addr_d; // @[el2_lsu_lsc_ctl.scala 141:25] + wire addrcheck_io_lsu_pkt_d_by; // @[el2_lsu_lsc_ctl.scala 141:25] + wire addrcheck_io_lsu_pkt_d_half; // @[el2_lsu_lsc_ctl.scala 141:25] + wire addrcheck_io_lsu_pkt_d_word; // @[el2_lsu_lsc_ctl.scala 141:25] + wire addrcheck_io_lsu_pkt_d_load; // @[el2_lsu_lsc_ctl.scala 141:25] + wire addrcheck_io_lsu_pkt_d_store; // @[el2_lsu_lsc_ctl.scala 141:25] + wire addrcheck_io_lsu_pkt_d_dma; // @[el2_lsu_lsc_ctl.scala 141:25] + wire addrcheck_io_lsu_pkt_d_valid; // @[el2_lsu_lsc_ctl.scala 141:25] + wire [31:0] addrcheck_io_dec_tlu_mrac_ff; // @[el2_lsu_lsc_ctl.scala 141:25] + wire [3:0] addrcheck_io_rs1_region_d; // @[el2_lsu_lsc_ctl.scala 141:25] + wire addrcheck_io_addr_in_dccm_d; // @[el2_lsu_lsc_ctl.scala 141:25] + wire addrcheck_io_addr_in_pic_d; // @[el2_lsu_lsc_ctl.scala 141:25] + wire addrcheck_io_addr_external_d; // @[el2_lsu_lsc_ctl.scala 141:25] + wire addrcheck_io_access_fault_d; // @[el2_lsu_lsc_ctl.scala 141:25] + wire addrcheck_io_misaligned_fault_d; // @[el2_lsu_lsc_ctl.scala 141:25] + wire [3:0] addrcheck_io_exc_mscause_d; // @[el2_lsu_lsc_ctl.scala 141:25] + wire access_fault_mff_clock; // @[el2_lsu_lsc_ctl.scala 169:45] + wire access_fault_mff_reset; // @[el2_lsu_lsc_ctl.scala 169:45] + wire access_fault_mff_io_din; // @[el2_lsu_lsc_ctl.scala 169:45] + wire access_fault_mff_io_dout; // @[el2_lsu_lsc_ctl.scala 169:45] + wire misaligned_fault_mff_clock; // @[el2_lsu_lsc_ctl.scala 171:45] + wire misaligned_fault_mff_reset; // @[el2_lsu_lsc_ctl.scala 171:45] + wire misaligned_fault_mff_io_din; // @[el2_lsu_lsc_ctl.scala 171:45] + wire misaligned_fault_mff_io_dout; // @[el2_lsu_lsc_ctl.scala 171:45] + wire exc_mscause_mff_clock; // @[el2_lsu_lsc_ctl.scala 173:45] + wire exc_mscause_mff_reset; // @[el2_lsu_lsc_ctl.scala 173:45] + wire [3:0] exc_mscause_mff_io_din; // @[el2_lsu_lsc_ctl.scala 173:45] + wire [3:0] exc_mscause_mff_io_dout; // @[el2_lsu_lsc_ctl.scala 173:45] + wire lsu_pkt_vldmff_clock; // @[el2_lsu_lsc_ctl.scala 278:36] + wire lsu_pkt_vldmff_reset; // @[el2_lsu_lsc_ctl.scala 278:36] + wire lsu_pkt_vldmff_io_din; // @[el2_lsu_lsc_ctl.scala 278:36] + wire lsu_pkt_vldmff_io_dout; // @[el2_lsu_lsc_ctl.scala 278:36] + wire lsu_pkt_vldrff_clock; // @[el2_lsu_lsc_ctl.scala 279:36] + wire lsu_pkt_vldrff_reset; // @[el2_lsu_lsc_ctl.scala 279:36] + wire lsu_pkt_vldrff_io_din; // @[el2_lsu_lsc_ctl.scala 279:36] + wire lsu_pkt_vldrff_io_dout; // @[el2_lsu_lsc_ctl.scala 279:36] + wire sdmff_clock; // @[el2_lsu_lsc_ctl.scala 333:20] + wire sdmff_reset; // @[el2_lsu_lsc_ctl.scala 333:20] + wire [31:0] sdmff_io_din; // @[el2_lsu_lsc_ctl.scala 333:20] + wire [31:0] sdmff_io_dout; // @[el2_lsu_lsc_ctl.scala 333:20] + wire samff_clock; // @[el2_lsu_lsc_ctl.scala 337:20] + wire samff_reset; // @[el2_lsu_lsc_ctl.scala 337:20] + wire [31:0] samff_io_din; // @[el2_lsu_lsc_ctl.scala 337:20] + wire [31:0] samff_io_dout; // @[el2_lsu_lsc_ctl.scala 337:20] + wire sarff_clock; // @[el2_lsu_lsc_ctl.scala 341:20] + wire sarff_reset; // @[el2_lsu_lsc_ctl.scala 341:20] + wire [31:0] sarff_io_din; // @[el2_lsu_lsc_ctl.scala 341:20] + wire [31:0] sarff_io_dout; // @[el2_lsu_lsc_ctl.scala 341:20] + wire end_addr_mff_clock; // @[el2_lsu_lsc_ctl.scala 345:28] + wire end_addr_mff_reset; // @[el2_lsu_lsc_ctl.scala 345:28] + wire [31:0] end_addr_mff_io_din; // @[el2_lsu_lsc_ctl.scala 345:28] + wire [31:0] end_addr_mff_io_dout; // @[el2_lsu_lsc_ctl.scala 345:28] + wire end_addr_rff_clock; // @[el2_lsu_lsc_ctl.scala 349:28] + wire end_addr_rff_reset; // @[el2_lsu_lsc_ctl.scala 349:28] + wire [31:0] end_addr_rff_io_din; // @[el2_lsu_lsc_ctl.scala 349:28] + wire [31:0] end_addr_rff_io_dout; // @[el2_lsu_lsc_ctl.scala 349:28] + wire addr_in_dccm_mff_clock; // @[el2_lsu_lsc_ctl.scala 353:36] + wire addr_in_dccm_mff_reset; // @[el2_lsu_lsc_ctl.scala 353:36] + wire addr_in_dccm_mff_io_din; // @[el2_lsu_lsc_ctl.scala 353:36] + wire addr_in_dccm_mff_io_dout; // @[el2_lsu_lsc_ctl.scala 353:36] + wire addr_in_dccm_rff_clock; // @[el2_lsu_lsc_ctl.scala 357:37] + wire addr_in_dccm_rff_reset; // @[el2_lsu_lsc_ctl.scala 357:37] + wire addr_in_dccm_rff_io_din; // @[el2_lsu_lsc_ctl.scala 357:37] + wire addr_in_dccm_rff_io_dout; // @[el2_lsu_lsc_ctl.scala 357:37] + wire addr_in_pic_mff_clock; // @[el2_lsu_lsc_ctl.scala 361:37] + wire addr_in_pic_mff_reset; // @[el2_lsu_lsc_ctl.scala 361:37] + wire addr_in_pic_mff_io_din; // @[el2_lsu_lsc_ctl.scala 361:37] + wire addr_in_pic_mff_io_dout; // @[el2_lsu_lsc_ctl.scala 361:37] + wire addr_in_pic_rff_clock; // @[el2_lsu_lsc_ctl.scala 365:37] + wire addr_in_pic_rff_reset; // @[el2_lsu_lsc_ctl.scala 365:37] + wire addr_in_pic_rff_io_din; // @[el2_lsu_lsc_ctl.scala 365:37] + wire addr_in_pic_rff_io_dout; // @[el2_lsu_lsc_ctl.scala 365:37] + wire addr_external_mff_clock; // @[el2_lsu_lsc_ctl.scala 369:37] + wire addr_external_mff_reset; // @[el2_lsu_lsc_ctl.scala 369:37] + wire addr_external_mff_io_din; // @[el2_lsu_lsc_ctl.scala 369:37] + wire addr_external_mff_io_dout; // @[el2_lsu_lsc_ctl.scala 369:37] + wire addr_external_rff_clock; // @[el2_lsu_lsc_ctl.scala 373:37] + wire addr_external_rff_reset; // @[el2_lsu_lsc_ctl.scala 373:37] + wire addr_external_rff_io_din; // @[el2_lsu_lsc_ctl.scala 373:37] + wire addr_external_rff_io_dout; // @[el2_lsu_lsc_ctl.scala 373:37] + wire bus_read_data_r_ff_clock; // @[el2_lsu_lsc_ctl.scala 377:38] + wire bus_read_data_r_ff_reset; // @[el2_lsu_lsc_ctl.scala 377:38] + wire [31:0] bus_read_data_r_ff_io_din; // @[el2_lsu_lsc_ctl.scala 377:38] + wire [31:0] bus_read_data_r_ff_io_dout; // @[el2_lsu_lsc_ctl.scala 377:38] + wire [31:0] lsu_rs1_d = io_dec_lsu_valid_raw_d ? io_exu_lsu_rs1_d : io_dma_mem_addr; // @[el2_lsu_lsc_ctl.scala 108:28] + wire [11:0] _T_3 = io_dec_lsu_valid_raw_d ? 12'hfff : 12'h0; // @[Bitwise.scala 72:12] + wire [11:0] lsu_offset_d = io_dec_lsu_offset_d & _T_3; // @[el2_lsu_lsc_ctl.scala 109:51] + wire [31:0] rs1_d = io_lsu_pkt_d_load_ldst_bypass_d ? io_lsu_result_m : lsu_rs1_d; // @[el2_lsu_lsc_ctl.scala 114:18] + wire [2:0] _T_6 = io_lsu_pkt_d_half ? 3'h7 : 3'h0; // @[Bitwise.scala 72:12] + wire [2:0] _T_7 = _T_6 & 3'h1; // @[el2_lsu_lsc_ctl.scala 127:53] + wire [2:0] _T_9 = io_lsu_pkt_d_word ? 3'h7 : 3'h0; // @[Bitwise.scala 72:12] + wire [2:0] _T_10 = _T_9 & 3'h3; // @[el2_lsu_lsc_ctl.scala 128:35] + wire [2:0] _T_11 = _T_7 | _T_10; // @[el2_lsu_lsc_ctl.scala 127:65] + wire [2:0] _T_13 = io_lsu_pkt_d_dword ? 3'h7 : 3'h0; // @[Bitwise.scala 72:12] + wire [2:0] addr_offset_d = _T_11 | _T_13; // @[el2_lsu_lsc_ctl.scala 128:47] + wire [12:0] _T_17 = {lsu_offset_d[11],lsu_offset_d}; // @[Cat.scala 29:58] + wire [11:0] _T_20 = {9'h0,addr_offset_d}; // @[Cat.scala 29:58] + wire [12:0] _GEN_0 = {{1'd0}, _T_20}; // @[el2_lsu_lsc_ctl.scala 131:60] + wire [12:0] end_addr_offset_d = _T_17 + _GEN_0; // @[el2_lsu_lsc_ctl.scala 131:60] + wire [18:0] _T_25 = end_addr_offset_d[12] ? 19'h7ffff : 19'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_27 = {_T_25,end_addr_offset_d}; // @[Cat.scala 29:58] + wire access_fault_m = access_fault_mff_io_dout; // @[el2_lsu_lsc_ctl.scala 247:40] + wire misaligned_fault_m = misaligned_fault_mff_io_dout; // @[el2_lsu_lsc_ctl.scala 250:40] + wire _T_30 = access_fault_m | misaligned_fault_m; // @[el2_lsu_lsc_ctl.scala 188:34] + wire _T_31 = ~io_lsu_double_ecc_error_r; // @[el2_lsu_lsc_ctl.scala 189:64] + wire _T_32 = io_lsu_single_ecc_error_r & _T_31; // @[el2_lsu_lsc_ctl.scala 189:62] + wire _T_33 = io_lsu_commit_r | io_lsu_pkt_r_dma; // @[el2_lsu_lsc_ctl.scala 189:111] + wire _T_34 = _T_32 & _T_33; // @[el2_lsu_lsc_ctl.scala 189:92] + wire _T_37 = _T_30 | io_lsu_double_ecc_error_m; // @[el2_lsu_lsc_ctl.scala 230:71] + wire _T_38 = _T_37 & io_lsu_pkt_m_valid; // @[el2_lsu_lsc_ctl.scala 230:100] + wire _T_39 = ~io_lsu_pkt_m_dma; // @[el2_lsu_lsc_ctl.scala 230:123] + wire _T_40 = _T_38 & _T_39; // @[el2_lsu_lsc_ctl.scala 230:121] + wire _T_41 = ~io_lsu_pkt_m_fast_int; // @[el2_lsu_lsc_ctl.scala 230:143] + wire _T_42 = _T_40 & _T_41; // @[el2_lsu_lsc_ctl.scala 230:141] + wire _T_43 = ~io_flush_m_up; // @[el2_lsu_lsc_ctl.scala 230:168] + wire lsu_error_pkt_m_exc_valid = _T_42 & _T_43; // @[el2_lsu_lsc_ctl.scala 230:166] + wire _T_45 = ~lsu_error_pkt_m_exc_valid; // @[el2_lsu_lsc_ctl.scala 231:70] + wire _T_46 = io_lsu_single_ecc_error_m & _T_45; // @[el2_lsu_lsc_ctl.scala 231:68] + wire lsu_error_pkt_m_exc_type = ~misaligned_fault_m; // @[el2_lsu_lsc_ctl.scala 233:41] + wire _T_51 = io_lsu_double_ecc_error_m & lsu_error_pkt_m_exc_type; // @[el2_lsu_lsc_ctl.scala 234:72] + wire _T_52 = ~access_fault_m; // @[el2_lsu_lsc_ctl.scala 234:96] + wire _T_53 = _T_51 & _T_52; // @[el2_lsu_lsc_ctl.scala 234:94] + wire [3:0] exc_mscause_m = exc_mscause_mff_io_dout; // @[el2_lsu_lsc_ctl.scala 253:40] + reg _T_65_exc_valid; // @[el2_lsu_lsc_ctl.scala 241:34] + reg _T_65_single_ecc_error; // @[el2_lsu_lsc_ctl.scala 241:34] + reg _T_65_inst_type; // @[el2_lsu_lsc_ctl.scala 241:34] + reg _T_65_exc_type; // @[el2_lsu_lsc_ctl.scala 241:34] + reg [3:0] _T_65_mscause; // @[el2_lsu_lsc_ctl.scala 241:34] + reg [31:0] _T_65_addr; // @[el2_lsu_lsc_ctl.scala 241:34] + wire dma_pkt_d_load = ~io_dma_mem_write; // @[el2_lsu_lsc_ctl.scala 268:25] + wire dma_pkt_d_by = io_dma_mem_sz == 3'h0; // @[el2_lsu_lsc_ctl.scala 269:45] + wire dma_pkt_d_half = io_dma_mem_sz == 3'h1; // @[el2_lsu_lsc_ctl.scala 270:45] + wire dma_pkt_d_word = io_dma_mem_sz == 3'h2; // @[el2_lsu_lsc_ctl.scala 271:45] + wire dma_pkt_d_dword = io_dma_mem_sz == 3'h3; // @[el2_lsu_lsc_ctl.scala 272:45] + wire _T_79 = ~io_lsu_p_fast_int; // @[el2_lsu_lsc_ctl.scala 289:64] + wire _T_80 = io_flush_m_up & _T_79; // @[el2_lsu_lsc_ctl.scala 289:61] + wire _T_81 = ~_T_80; // @[el2_lsu_lsc_ctl.scala 289:45] + wire _T_82 = io_lsu_p_valid & _T_81; // @[el2_lsu_lsc_ctl.scala 289:43] + wire _T_84 = ~io_lsu_pkt_d_dma; // @[el2_lsu_lsc_ctl.scala 290:68] + wire _T_85 = io_flush_m_up & _T_84; // @[el2_lsu_lsc_ctl.scala 290:65] + wire _T_86 = ~_T_85; // @[el2_lsu_lsc_ctl.scala 290:49] + wire _T_89 = io_flush_m_up & _T_39; // @[el2_lsu_lsc_ctl.scala 291:65] + wire _T_90 = ~_T_89; // @[el2_lsu_lsc_ctl.scala 291:49] + reg _T_92_fast_int; // @[el2_lsu_lsc_ctl.scala 305:26] + reg _T_92_by; // @[el2_lsu_lsc_ctl.scala 305:26] + reg _T_92_half; // @[el2_lsu_lsc_ctl.scala 305:26] + reg _T_92_word; // @[el2_lsu_lsc_ctl.scala 305:26] + reg _T_92_dword; // @[el2_lsu_lsc_ctl.scala 305:26] + reg _T_92_load; // @[el2_lsu_lsc_ctl.scala 305:26] + reg _T_92_store; // @[el2_lsu_lsc_ctl.scala 305:26] + reg _T_92_unsign; // @[el2_lsu_lsc_ctl.scala 305:26] + reg _T_92_dma; // @[el2_lsu_lsc_ctl.scala 305:26] + reg _T_92_store_data_bypass_m; // @[el2_lsu_lsc_ctl.scala 305:26] + reg _T_92_valid; // @[el2_lsu_lsc_ctl.scala 305:26] + reg _T_93_by; // @[el2_lsu_lsc_ctl.scala 310:26] + reg _T_93_half; // @[el2_lsu_lsc_ctl.scala 310:26] + reg _T_93_word; // @[el2_lsu_lsc_ctl.scala 310:26] + reg _T_93_dword; // @[el2_lsu_lsc_ctl.scala 310:26] + reg _T_93_load; // @[el2_lsu_lsc_ctl.scala 310:26] + reg _T_93_store; // @[el2_lsu_lsc_ctl.scala 310:26] + reg _T_93_unsign; // @[el2_lsu_lsc_ctl.scala 310:26] + reg _T_93_dma; // @[el2_lsu_lsc_ctl.scala 310:26] + reg _T_93_valid; // @[el2_lsu_lsc_ctl.scala 310:26] + wire [3:0] _T_96 = {io_dma_mem_addr[2:0],1'h0}; // @[Cat.scala 29:58] + wire [63:0] dma_mem_wdata_shifted = io_dma_mem_wdata >> _T_96; // @[el2_lsu_lsc_ctl.scala 326:54] + wire [31:0] store_data_d = io_dma_dccm_req ? dma_mem_wdata_shifted[31:0] : io_exu_lsu_rs2_d; // @[el2_lsu_lsc_ctl.scala 328:34] + wire _T_104 = io_lsu_pkt_r_store | io_lsu_pkt_r_load; // @[el2_lsu_lsc_ctl.scala 391:63] + wire _T_105 = io_lsu_pkt_r_valid & _T_104; // @[el2_lsu_lsc_ctl.scala 391:41] + wire _T_106 = ~io_flush_r; // @[el2_lsu_lsc_ctl.scala 391:86] + wire _T_107 = _T_105 & _T_106; // @[el2_lsu_lsc_ctl.scala 391:84] + wire _T_108 = ~io_lsu_pkt_r_dma; // @[el2_lsu_lsc_ctl.scala 391:100] + wire _T_111 = ~io_addr_in_pic_m; // @[el2_lsu_lsc_ctl.scala 394:69] + wire [31:0] _T_113 = _T_111 ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_114 = io_picm_mask_data_m | _T_113; // @[el2_lsu_lsc_ctl.scala 394:59] + wire [31:0] _T_116 = io_lsu_pkt_m_store_data_bypass_m ? io_lsu_result_m : sdmff_io_dout; // @[el2_lsu_lsc_ctl.scala 394:94] + wire [31:0] lsu_ld_datafn_m = io_addr_external_m ? 32'h0 : io_lsu_ld_data_m; // @[el2_lsu_lsc_ctl.scala 425:33] + wire _T_122 = io_lsu_pkt_r_unsign & io_lsu_pkt_r_by; // @[el2_lsu_lsc_ctl.scala 429:61] + wire [31:0] _T_124 = _T_122 ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] + wire [8:0] _T_126 = {1'h0,lsu_ld_datafn_m[7:0]}; // @[Cat.scala 29:58] + wire [31:0] _GEN_1 = {{23'd0}, _T_126}; // @[el2_lsu_lsc_ctl.scala 429:84] + wire [31:0] _T_127 = _T_124 & _GEN_1; // @[el2_lsu_lsc_ctl.scala 429:84] + wire _T_128 = io_lsu_pkt_r_unsign & io_lsu_pkt_r_half; // @[el2_lsu_lsc_ctl.scala 430:38] + wire [31:0] _T_130 = _T_128 ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] + wire [16:0] _T_132 = {1'h0,lsu_ld_datafn_m[15:0]}; // @[Cat.scala 29:58] + wire [31:0] _GEN_2 = {{15'd0}, _T_132}; // @[el2_lsu_lsc_ctl.scala 430:61] + wire [31:0] _T_133 = _T_130 & _GEN_2; // @[el2_lsu_lsc_ctl.scala 430:61] + wire [31:0] _T_134 = _T_127 | _T_133; // @[el2_lsu_lsc_ctl.scala 429:125] + wire _T_135 = ~io_lsu_pkt_r_unsign; // @[el2_lsu_lsc_ctl.scala 431:17] + wire _T_136 = _T_135 & io_lsu_pkt_r_by; // @[el2_lsu_lsc_ctl.scala 431:38] + wire [31:0] _T_138 = _T_136 ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] + wire [23:0] _T_141 = lsu_ld_datafn_m[7] ? 24'hffffff : 24'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_143 = {_T_141,lsu_ld_datafn_m[7:0]}; // @[Cat.scala 29:58] + wire [31:0] _T_144 = _T_138 & _T_143; // @[el2_lsu_lsc_ctl.scala 431:61] + wire [31:0] _T_145 = _T_134 | _T_144; // @[el2_lsu_lsc_ctl.scala 430:104] + wire _T_147 = _T_135 & io_lsu_pkt_r_half; // @[el2_lsu_lsc_ctl.scala 432:38] + wire [31:0] _T_149 = _T_147 ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] + wire [15:0] _T_152 = lsu_ld_datafn_m[15] ? 16'hffff : 16'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_154 = {_T_152,lsu_ld_datafn_m[15:0]}; // @[Cat.scala 29:58] + wire [31:0] _T_155 = _T_149 & _T_154; // @[el2_lsu_lsc_ctl.scala 432:61] + wire [31:0] _T_156 = _T_145 | _T_155; // @[el2_lsu_lsc_ctl.scala 431:124] + wire [31:0] _T_158 = io_lsu_pkt_r_word ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_160 = _T_158 & lsu_ld_datafn_m; // @[el2_lsu_lsc_ctl.scala 433:38] + rvlsadder lsadder ( // @[el2_lsu_lsc_ctl.scala 118:23] + .io_rs1(lsadder_io_rs1), + .io_offset(lsadder_io_offset), + .io_dout(lsadder_io_dout) + ); + el2_lsu_addrcheck addrcheck ( // @[el2_lsu_lsc_ctl.scala 141:25] + .io_start_addr_d(addrcheck_io_start_addr_d), + .io_end_addr_d(addrcheck_io_end_addr_d), + .io_lsu_pkt_d_by(addrcheck_io_lsu_pkt_d_by), + .io_lsu_pkt_d_half(addrcheck_io_lsu_pkt_d_half), + .io_lsu_pkt_d_word(addrcheck_io_lsu_pkt_d_word), + .io_lsu_pkt_d_load(addrcheck_io_lsu_pkt_d_load), + .io_lsu_pkt_d_store(addrcheck_io_lsu_pkt_d_store), + .io_lsu_pkt_d_dma(addrcheck_io_lsu_pkt_d_dma), + .io_lsu_pkt_d_valid(addrcheck_io_lsu_pkt_d_valid), + .io_dec_tlu_mrac_ff(addrcheck_io_dec_tlu_mrac_ff), + .io_rs1_region_d(addrcheck_io_rs1_region_d), + .io_addr_in_dccm_d(addrcheck_io_addr_in_dccm_d), + .io_addr_in_pic_d(addrcheck_io_addr_in_pic_d), + .io_addr_external_d(addrcheck_io_addr_external_d), + .io_access_fault_d(addrcheck_io_access_fault_d), + .io_misaligned_fault_d(addrcheck_io_misaligned_fault_d), + .io_exc_mscause_d(addrcheck_io_exc_mscause_d) + ); + rvdff access_fault_mff ( // @[el2_lsu_lsc_ctl.scala 169:45] + .clock(access_fault_mff_clock), + .reset(access_fault_mff_reset), + .io_din(access_fault_mff_io_din), + .io_dout(access_fault_mff_io_dout) + ); + rvdff misaligned_fault_mff ( // @[el2_lsu_lsc_ctl.scala 171:45] + .clock(misaligned_fault_mff_clock), + .reset(misaligned_fault_mff_reset), + .io_din(misaligned_fault_mff_io_din), + .io_dout(misaligned_fault_mff_io_dout) + ); + rvdff_2 exc_mscause_mff ( // @[el2_lsu_lsc_ctl.scala 173:45] + .clock(exc_mscause_mff_clock), + .reset(exc_mscause_mff_reset), + .io_din(exc_mscause_mff_io_din), + .io_dout(exc_mscause_mff_io_dout) + ); + rvdff lsu_pkt_vldmff ( // @[el2_lsu_lsc_ctl.scala 278:36] + .clock(lsu_pkt_vldmff_clock), + .reset(lsu_pkt_vldmff_reset), + .io_din(lsu_pkt_vldmff_io_din), + .io_dout(lsu_pkt_vldmff_io_dout) + ); + rvdff lsu_pkt_vldrff ( // @[el2_lsu_lsc_ctl.scala 279:36] + .clock(lsu_pkt_vldrff_clock), + .reset(lsu_pkt_vldrff_reset), + .io_din(lsu_pkt_vldrff_io_din), + .io_dout(lsu_pkt_vldrff_io_dout) + ); + rvdff_6 sdmff ( // @[el2_lsu_lsc_ctl.scala 333:20] + .clock(sdmff_clock), + .reset(sdmff_reset), + .io_din(sdmff_io_din), + .io_dout(sdmff_io_dout) + ); + rvdff_6 samff ( // @[el2_lsu_lsc_ctl.scala 337:20] + .clock(samff_clock), + .reset(samff_reset), + .io_din(samff_io_din), + .io_dout(samff_io_dout) + ); + rvdff_6 sarff ( // @[el2_lsu_lsc_ctl.scala 341:20] + .clock(sarff_clock), + .reset(sarff_reset), + .io_din(sarff_io_din), + .io_dout(sarff_io_dout) + ); + rvdff_6 end_addr_mff ( // @[el2_lsu_lsc_ctl.scala 345:28] + .clock(end_addr_mff_clock), + .reset(end_addr_mff_reset), + .io_din(end_addr_mff_io_din), + .io_dout(end_addr_mff_io_dout) + ); + rvdff_6 end_addr_rff ( // @[el2_lsu_lsc_ctl.scala 349:28] + .clock(end_addr_rff_clock), + .reset(end_addr_rff_reset), + .io_din(end_addr_rff_io_din), + .io_dout(end_addr_rff_io_dout) + ); + rvdff addr_in_dccm_mff ( // @[el2_lsu_lsc_ctl.scala 353:36] + .clock(addr_in_dccm_mff_clock), + .reset(addr_in_dccm_mff_reset), + .io_din(addr_in_dccm_mff_io_din), + .io_dout(addr_in_dccm_mff_io_dout) + ); + rvdff addr_in_dccm_rff ( // @[el2_lsu_lsc_ctl.scala 357:37] + .clock(addr_in_dccm_rff_clock), + .reset(addr_in_dccm_rff_reset), + .io_din(addr_in_dccm_rff_io_din), + .io_dout(addr_in_dccm_rff_io_dout) + ); + rvdff addr_in_pic_mff ( // @[el2_lsu_lsc_ctl.scala 361:37] + .clock(addr_in_pic_mff_clock), + .reset(addr_in_pic_mff_reset), + .io_din(addr_in_pic_mff_io_din), + .io_dout(addr_in_pic_mff_io_dout) + ); + rvdff addr_in_pic_rff ( // @[el2_lsu_lsc_ctl.scala 365:37] + .clock(addr_in_pic_rff_clock), + .reset(addr_in_pic_rff_reset), + .io_din(addr_in_pic_rff_io_din), + .io_dout(addr_in_pic_rff_io_dout) + ); + rvdff addr_external_mff ( // @[el2_lsu_lsc_ctl.scala 369:37] + .clock(addr_external_mff_clock), + .reset(addr_external_mff_reset), + .io_din(addr_external_mff_io_din), + .io_dout(addr_external_mff_io_dout) + ); + rvdff addr_external_rff ( // @[el2_lsu_lsc_ctl.scala 373:37] + .clock(addr_external_rff_clock), + .reset(addr_external_rff_reset), + .io_din(addr_external_rff_io_din), + .io_dout(addr_external_rff_io_dout) + ); + rvdff_6 bus_read_data_r_ff ( // @[el2_lsu_lsc_ctl.scala 377:38] + .clock(bus_read_data_r_ff_clock), + .reset(bus_read_data_r_ff_reset), + .io_din(bus_read_data_r_ff_io_din), + .io_dout(bus_read_data_r_ff_io_dout) + ); + assign io_lsu_result_m = _T_156 | _T_160; // @[el2_lsu_lsc_ctl.scala 429:27] + assign io_lsu_addr_d = lsadder_io_dout; // @[el2_lsu_lsc_ctl.scala 387:28] + assign io_lsu_addr_m = samff_io_dout; // @[el2_lsu_lsc_ctl.scala 339:26] + assign io_lsu_addr_r = sarff_io_dout; // @[el2_lsu_lsc_ctl.scala 343:23] + assign io_end_addr_d = rs1_d + _T_27; // @[el2_lsu_lsc_ctl.scala 133:24] + assign io_end_addr_m = end_addr_mff_io_dout; // @[el2_lsu_lsc_ctl.scala 347:26] + assign io_end_addr_r = end_addr_rff_io_dout; // @[el2_lsu_lsc_ctl.scala 351:26] + assign io_store_data_m = _T_114 & _T_116; // @[el2_lsu_lsc_ctl.scala 394:29] + assign io_lsu_commit_r = _T_107 & _T_108; // @[el2_lsu_lsc_ctl.scala 391:19] + assign io_lsu_single_ecc_error_incr = _T_34 & io_lsu_pkt_r_valid; // @[el2_lsu_lsc_ctl.scala 189:32] + assign io_lsu_error_pkt_r_exc_valid = _T_65_exc_valid; // @[el2_lsu_lsc_ctl.scala 241:24] + assign io_lsu_error_pkt_r_single_ecc_error = _T_65_single_ecc_error; // @[el2_lsu_lsc_ctl.scala 241:24] + assign io_lsu_error_pkt_r_inst_type = _T_65_inst_type; // @[el2_lsu_lsc_ctl.scala 241:24] + assign io_lsu_error_pkt_r_exc_type = _T_65_exc_type; // @[el2_lsu_lsc_ctl.scala 241:24] + assign io_lsu_error_pkt_r_mscause = _T_65_mscause; // @[el2_lsu_lsc_ctl.scala 241:24] + assign io_lsu_error_pkt_r_addr = _T_65_addr; // @[el2_lsu_lsc_ctl.scala 241:24] + assign io_lsu_fir_addr = io_lsu_ld_data_corr_r; // @[el2_lsu_lsc_ctl.scala 384:28] + assign io_addr_in_dccm_d = addrcheck_io_addr_in_dccm_d; // @[el2_lsu_lsc_ctl.scala 152:42] + assign io_addr_in_dccm_m = addr_in_dccm_mff_io_dout; // @[el2_lsu_lsc_ctl.scala 355:27] + assign io_addr_in_dccm_r = addr_in_dccm_rff_io_dout; // @[el2_lsu_lsc_ctl.scala 359:28] + assign io_addr_in_pic_d = addrcheck_io_addr_in_pic_d; // @[el2_lsu_lsc_ctl.scala 153:42] + assign io_addr_in_pic_m = addr_in_pic_mff_io_dout; // @[el2_lsu_lsc_ctl.scala 363:27] + assign io_addr_in_pic_r = addr_in_pic_rff_io_dout; // @[el2_lsu_lsc_ctl.scala 367:27] + assign io_addr_external_m = addr_external_mff_io_dout; // @[el2_lsu_lsc_ctl.scala 371:28] + assign io_lsu_pkt_d_fast_int = io_dec_lsu_valid_raw_d & io_lsu_p_fast_int; // @[el2_lsu_lsc_ctl.scala 285:20] + assign io_lsu_pkt_d_by = io_dec_lsu_valid_raw_d ? io_lsu_p_by : dma_pkt_d_by; // @[el2_lsu_lsc_ctl.scala 285:20] + assign io_lsu_pkt_d_half = io_dec_lsu_valid_raw_d ? io_lsu_p_half : dma_pkt_d_half; // @[el2_lsu_lsc_ctl.scala 285:20] + assign io_lsu_pkt_d_word = io_dec_lsu_valid_raw_d ? io_lsu_p_word : dma_pkt_d_word; // @[el2_lsu_lsc_ctl.scala 285:20] + assign io_lsu_pkt_d_dword = io_dec_lsu_valid_raw_d ? io_lsu_p_dword : dma_pkt_d_dword; // @[el2_lsu_lsc_ctl.scala 285:20] + assign io_lsu_pkt_d_load = io_dec_lsu_valid_raw_d ? io_lsu_p_load : dma_pkt_d_load; // @[el2_lsu_lsc_ctl.scala 285:20] + assign io_lsu_pkt_d_store = io_dec_lsu_valid_raw_d ? io_lsu_p_store : io_dma_mem_write; // @[el2_lsu_lsc_ctl.scala 285:20] + assign io_lsu_pkt_d_unsign = io_dec_lsu_valid_raw_d & io_lsu_p_unsign; // @[el2_lsu_lsc_ctl.scala 285:20] + assign io_lsu_pkt_d_dma = io_dec_lsu_valid_raw_d ? io_lsu_p_dma : 1'h1; // @[el2_lsu_lsc_ctl.scala 285:20] + assign io_lsu_pkt_d_store_data_bypass_d = io_dec_lsu_valid_raw_d & io_lsu_p_store_data_bypass_d; // @[el2_lsu_lsc_ctl.scala 285:20] + assign io_lsu_pkt_d_load_ldst_bypass_d = io_dec_lsu_valid_raw_d & io_lsu_p_load_ldst_bypass_d; // @[el2_lsu_lsc_ctl.scala 285:20] + assign io_lsu_pkt_d_store_data_bypass_m = io_dec_lsu_valid_raw_d & io_lsu_p_store_data_bypass_m; // @[el2_lsu_lsc_ctl.scala 285:20] + assign io_lsu_pkt_d_valid = _T_82 | io_dma_dccm_req; // @[el2_lsu_lsc_ctl.scala 285:20 el2_lsu_lsc_ctl.scala 289:24] + assign io_lsu_pkt_m_fast_int = _T_92_fast_int; // @[el2_lsu_lsc_ctl.scala 305:16] + assign io_lsu_pkt_m_by = _T_92_by; // @[el2_lsu_lsc_ctl.scala 305:16] + assign io_lsu_pkt_m_half = _T_92_half; // @[el2_lsu_lsc_ctl.scala 305:16] + assign io_lsu_pkt_m_word = _T_92_word; // @[el2_lsu_lsc_ctl.scala 305:16] + assign io_lsu_pkt_m_dword = _T_92_dword; // @[el2_lsu_lsc_ctl.scala 305:16] + assign io_lsu_pkt_m_load = _T_92_load; // @[el2_lsu_lsc_ctl.scala 305:16] + assign io_lsu_pkt_m_store = _T_92_store; // @[el2_lsu_lsc_ctl.scala 305:16] + assign io_lsu_pkt_m_unsign = _T_92_unsign; // @[el2_lsu_lsc_ctl.scala 305:16] + assign io_lsu_pkt_m_dma = _T_92_dma; // @[el2_lsu_lsc_ctl.scala 305:16] + assign io_lsu_pkt_m_store_data_bypass_m = _T_92_store_data_bypass_m; // @[el2_lsu_lsc_ctl.scala 305:16] + assign io_lsu_pkt_m_valid = _T_92_valid; // @[el2_lsu_lsc_ctl.scala 296:34 el2_lsu_lsc_ctl.scala 305:16] + assign io_lsu_pkt_r_by = _T_93_by; // @[el2_lsu_lsc_ctl.scala 310:16] + assign io_lsu_pkt_r_half = _T_93_half; // @[el2_lsu_lsc_ctl.scala 310:16] + assign io_lsu_pkt_r_word = _T_93_word; // @[el2_lsu_lsc_ctl.scala 310:16] + assign io_lsu_pkt_r_dword = _T_93_dword; // @[el2_lsu_lsc_ctl.scala 310:16] + assign io_lsu_pkt_r_load = _T_93_load; // @[el2_lsu_lsc_ctl.scala 310:16] + assign io_lsu_pkt_r_store = _T_93_store; // @[el2_lsu_lsc_ctl.scala 310:16] + assign io_lsu_pkt_r_unsign = _T_93_unsign; // @[el2_lsu_lsc_ctl.scala 310:16] + assign io_lsu_pkt_r_dma = _T_93_dma; // @[el2_lsu_lsc_ctl.scala 310:16] + assign io_lsu_pkt_r_valid = _T_93_valid; // @[el2_lsu_lsc_ctl.scala 300:33 el2_lsu_lsc_ctl.scala 310:16] + assign lsadder_io_rs1 = io_lsu_pkt_d_load_ldst_bypass_d ? io_lsu_result_m : lsu_rs1_d; // @[el2_lsu_lsc_ctl.scala 119:26] + assign lsadder_io_offset = io_dec_lsu_offset_d & _T_3; // @[el2_lsu_lsc_ctl.scala 120:26] + assign addrcheck_io_start_addr_d = lsadder_io_dout; // @[el2_lsu_lsc_ctl.scala 145:42] + assign addrcheck_io_end_addr_d = rs1_d + _T_27; // @[el2_lsu_lsc_ctl.scala 146:42] + assign addrcheck_io_lsu_pkt_d_by = io_lsu_pkt_d_by; // @[el2_lsu_lsc_ctl.scala 147:42] + assign addrcheck_io_lsu_pkt_d_half = io_lsu_pkt_d_half; // @[el2_lsu_lsc_ctl.scala 147:42] + assign addrcheck_io_lsu_pkt_d_word = io_lsu_pkt_d_word; // @[el2_lsu_lsc_ctl.scala 147:42] + assign addrcheck_io_lsu_pkt_d_load = io_lsu_pkt_d_load; // @[el2_lsu_lsc_ctl.scala 147:42] + assign addrcheck_io_lsu_pkt_d_store = io_lsu_pkt_d_store; // @[el2_lsu_lsc_ctl.scala 147:42] + assign addrcheck_io_lsu_pkt_d_dma = io_lsu_pkt_d_dma; // @[el2_lsu_lsc_ctl.scala 147:42] + assign addrcheck_io_lsu_pkt_d_valid = io_lsu_pkt_d_valid; // @[el2_lsu_lsc_ctl.scala 147:42] + assign addrcheck_io_dec_tlu_mrac_ff = io_dec_tlu_mrac_ff; // @[el2_lsu_lsc_ctl.scala 148:42] + assign addrcheck_io_rs1_region_d = rs1_d[31:28]; // @[el2_lsu_lsc_ctl.scala 149:42] + assign access_fault_mff_clock = clock; + assign access_fault_mff_reset = reset; + assign access_fault_mff_io_din = addrcheck_io_access_fault_d; // @[el2_lsu_lsc_ctl.scala 246:40] + assign misaligned_fault_mff_clock = clock; + assign misaligned_fault_mff_reset = reset; + assign misaligned_fault_mff_io_din = addrcheck_io_misaligned_fault_d; // @[el2_lsu_lsc_ctl.scala 249:40] + assign exc_mscause_mff_clock = clock; + assign exc_mscause_mff_reset = reset; + assign exc_mscause_mff_io_din = addrcheck_io_exc_mscause_d; // @[el2_lsu_lsc_ctl.scala 252:40] + assign lsu_pkt_vldmff_clock = clock; + assign lsu_pkt_vldmff_reset = reset; + assign lsu_pkt_vldmff_io_din = io_lsu_pkt_d_valid & _T_86; // @[el2_lsu_lsc_ctl.scala 295:34] + assign lsu_pkt_vldrff_clock = clock; + assign lsu_pkt_vldrff_reset = reset; + assign lsu_pkt_vldrff_io_din = io_lsu_pkt_m_valid & _T_90; // @[el2_lsu_lsc_ctl.scala 299:33] + assign sdmff_clock = clock; + assign sdmff_reset = reset; + assign sdmff_io_din = io_lsu_pkt_d_store_data_bypass_d ? io_lsu_result_m : store_data_d; // @[el2_lsu_lsc_ctl.scala 334:27] + assign samff_clock = clock; + assign samff_reset = reset; + assign samff_io_din = io_lsu_addr_d; // @[el2_lsu_lsc_ctl.scala 338:23] + assign sarff_clock = clock; + assign sarff_reset = reset; + assign sarff_io_din = io_lsu_addr_m; // @[el2_lsu_lsc_ctl.scala 342:23] + assign end_addr_mff_clock = clock; + assign end_addr_mff_reset = reset; + assign end_addr_mff_io_din = io_end_addr_d; // @[el2_lsu_lsc_ctl.scala 346:26] + assign end_addr_rff_clock = clock; + assign end_addr_rff_reset = reset; + assign end_addr_rff_io_din = io_end_addr_m; // @[el2_lsu_lsc_ctl.scala 350:26] + assign addr_in_dccm_mff_clock = clock; + assign addr_in_dccm_mff_reset = reset; + assign addr_in_dccm_mff_io_din = io_addr_in_dccm_d; // @[el2_lsu_lsc_ctl.scala 354:27] + assign addr_in_dccm_rff_clock = clock; + assign addr_in_dccm_rff_reset = reset; + assign addr_in_dccm_rff_io_din = io_addr_in_dccm_m; // @[el2_lsu_lsc_ctl.scala 358:28] + assign addr_in_pic_mff_clock = clock; + assign addr_in_pic_mff_reset = reset; + assign addr_in_pic_mff_io_din = io_addr_in_pic_d; // @[el2_lsu_lsc_ctl.scala 362:27] + assign addr_in_pic_rff_clock = clock; + assign addr_in_pic_rff_reset = reset; + assign addr_in_pic_rff_io_din = io_addr_in_pic_m; // @[el2_lsu_lsc_ctl.scala 366:27] + assign addr_external_mff_clock = clock; + assign addr_external_mff_reset = reset; + assign addr_external_mff_io_din = addrcheck_io_addr_external_d; // @[el2_lsu_lsc_ctl.scala 370:28] + assign addr_external_rff_clock = clock; + assign addr_external_rff_reset = reset; + assign addr_external_rff_io_din = io_addr_external_m; // @[el2_lsu_lsc_ctl.scala 374:28] + assign bus_read_data_r_ff_clock = clock; + assign bus_read_data_r_ff_reset = reset; + assign bus_read_data_r_ff_io_din = 32'h0; // @[el2_lsu_lsc_ctl.scala 378:29] +`ifdef RANDOMIZE_GARBAGE_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_INVALID_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_REG_INIT +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_MEM_INIT +`define RANDOMIZE +`endif +`ifndef RANDOM +`define RANDOM $random +`endif +`ifdef RANDOMIZE_MEM_INIT + integer initvar; +`endif +`ifndef SYNTHESIS +`ifdef FIRRTL_BEFORE_INITIAL +`FIRRTL_BEFORE_INITIAL +`endif +initial begin + `ifdef RANDOMIZE + `ifdef INIT_RANDOM + `INIT_RANDOM + `endif + `ifndef VERILATOR + `ifdef RANDOMIZE_DELAY + #`RANDOMIZE_DELAY begin end + `else + #0.002 begin end + `endif + `endif +`ifdef RANDOMIZE_REG_INIT + _RAND_0 = {1{`RANDOM}}; + _T_65_exc_valid = _RAND_0[0:0]; + _RAND_1 = {1{`RANDOM}}; + _T_65_single_ecc_error = _RAND_1[0:0]; + _RAND_2 = {1{`RANDOM}}; + _T_65_inst_type = _RAND_2[0:0]; + _RAND_3 = {1{`RANDOM}}; + _T_65_exc_type = _RAND_3[0:0]; + _RAND_4 = {1{`RANDOM}}; + _T_65_mscause = _RAND_4[3:0]; + _RAND_5 = {1{`RANDOM}}; + _T_65_addr = _RAND_5[31:0]; + _RAND_6 = {1{`RANDOM}}; + _T_92_fast_int = _RAND_6[0:0]; + _RAND_7 = {1{`RANDOM}}; + _T_92_by = _RAND_7[0:0]; + _RAND_8 = {1{`RANDOM}}; + _T_92_half = _RAND_8[0:0]; + _RAND_9 = {1{`RANDOM}}; + _T_92_word = _RAND_9[0:0]; + _RAND_10 = {1{`RANDOM}}; + _T_92_dword = _RAND_10[0:0]; + _RAND_11 = {1{`RANDOM}}; + _T_92_load = _RAND_11[0:0]; + _RAND_12 = {1{`RANDOM}}; + _T_92_store = _RAND_12[0:0]; + _RAND_13 = {1{`RANDOM}}; + _T_92_unsign = _RAND_13[0:0]; + _RAND_14 = {1{`RANDOM}}; + _T_92_dma = _RAND_14[0:0]; + _RAND_15 = {1{`RANDOM}}; + _T_92_store_data_bypass_m = _RAND_15[0:0]; + _RAND_16 = {1{`RANDOM}}; + _T_92_valid = _RAND_16[0:0]; + _RAND_17 = {1{`RANDOM}}; + _T_93_by = _RAND_17[0:0]; + _RAND_18 = {1{`RANDOM}}; + _T_93_half = _RAND_18[0:0]; + _RAND_19 = {1{`RANDOM}}; + _T_93_word = _RAND_19[0:0]; + _RAND_20 = {1{`RANDOM}}; + _T_93_dword = _RAND_20[0:0]; + _RAND_21 = {1{`RANDOM}}; + _T_93_load = _RAND_21[0:0]; + _RAND_22 = {1{`RANDOM}}; + _T_93_store = _RAND_22[0:0]; + _RAND_23 = {1{`RANDOM}}; + _T_93_unsign = _RAND_23[0:0]; + _RAND_24 = {1{`RANDOM}}; + _T_93_dma = _RAND_24[0:0]; + _RAND_25 = {1{`RANDOM}}; + _T_93_valid = _RAND_25[0:0]; +`endif // RANDOMIZE_REG_INIT + `endif // RANDOMIZE +end // initial +`ifdef FIRRTL_AFTER_INITIAL +`FIRRTL_AFTER_INITIAL +`endif +`endif // SYNTHESIS + always @(posedge clock) begin + _T_65_exc_valid <= _T_42 & _T_43; + _T_65_single_ecc_error <= _T_46 & _T_39; + _T_65_inst_type <= io_lsu_pkt_m_store; + _T_65_exc_type <= ~misaligned_fault_m; + if (_T_53) begin + _T_65_mscause <= 4'h1; + end else begin + _T_65_mscause <= exc_mscause_m; + end + _T_65_addr <= io_lsu_addr_m; + _T_92_fast_int <= io_lsu_pkt_d_fast_int; + _T_92_by <= io_lsu_pkt_d_by; + _T_92_half <= io_lsu_pkt_d_half; + _T_92_word <= io_lsu_pkt_d_word; + _T_92_dword <= io_lsu_pkt_d_dword; + _T_92_load <= io_lsu_pkt_d_load; + _T_92_store <= io_lsu_pkt_d_store; + _T_92_unsign <= io_lsu_pkt_d_unsign; + _T_92_dma <= io_lsu_pkt_d_dma; + _T_92_store_data_bypass_m <= io_lsu_pkt_d_store_data_bypass_m; + _T_92_valid <= io_lsu_pkt_d_valid & _T_86; + _T_93_by <= io_lsu_pkt_m_by; + _T_93_half <= io_lsu_pkt_m_half; + _T_93_word <= io_lsu_pkt_m_word; + _T_93_dword <= io_lsu_pkt_m_dword; + _T_93_load <= io_lsu_pkt_m_load; + _T_93_store <= io_lsu_pkt_m_store; + _T_93_unsign <= io_lsu_pkt_m_unsign; + _T_93_dma <= io_lsu_pkt_m_dma; + _T_93_valid <= io_lsu_pkt_m_valid & _T_90; + end +endmodule +module rvclkhdr( + output io_l1clk, + input io_clk, + input io_en, + input io_scan_mode +); + wire clkhdr_Q; // @[beh_lib.scala 331:24] + wire clkhdr_CK; // @[beh_lib.scala 331:24] + wire clkhdr_EN; // @[beh_lib.scala 331:24] + wire clkhdr_SE; // @[beh_lib.scala 331:24] + TEC_RV_ICG clkhdr ( // @[beh_lib.scala 331:24] + .Q(clkhdr_Q), + .CK(clkhdr_CK), + .EN(clkhdr_EN), + .SE(clkhdr_SE) + ); + assign io_l1clk = clkhdr_Q; // @[beh_lib.scala 332:12] + assign clkhdr_CK = io_clk; // @[beh_lib.scala 333:16] + assign clkhdr_EN = io_en; // @[beh_lib.scala 334:16] + assign clkhdr_SE = io_scan_mode; // @[beh_lib.scala 335:16] +endmodule +module el2_lsu_dccm_ctl( + input reset, + input io_lsu_c2_m_clk, + input io_lsu_c2_r_clk, + input io_lsu_free_c2_clk, + input io_lsu_store_c1_r_clk, + input io_clk, + input io_lsu_pkt_d_word, + input io_lsu_pkt_d_dword, + input io_lsu_pkt_d_load, + input io_lsu_pkt_d_store, + input io_lsu_pkt_d_dma, + input io_lsu_pkt_d_valid, + input io_lsu_pkt_m_by, + input io_lsu_pkt_m_half, + input io_lsu_pkt_m_word, + input io_lsu_pkt_m_load, + input io_lsu_pkt_m_store, + input io_lsu_pkt_m_dma, + input io_lsu_pkt_m_valid, + input io_lsu_pkt_r_by, + input io_lsu_pkt_r_half, + input io_lsu_pkt_r_word, + input io_lsu_pkt_r_load, + input io_lsu_pkt_r_store, + input io_lsu_pkt_r_dma, + input io_lsu_pkt_r_valid, + input io_addr_in_dccm_d, + input io_addr_in_dccm_m, + input io_addr_in_dccm_r, + input io_addr_in_pic_d, + input io_addr_in_pic_m, + input io_addr_in_pic_r, + input io_lsu_raw_fwd_lo_r, + input io_lsu_raw_fwd_hi_r, + input io_lsu_commit_r, + input [15:0] io_lsu_addr_d, + input [15:0] io_lsu_addr_m, + input [15:0] io_lsu_addr_r, + input [15:0] io_end_addr_d, + input [15:0] io_end_addr_m, + input [15:0] io_end_addr_r, + input io_stbuf_reqvld_any, + input [15:0] io_stbuf_addr_any, + input [31:0] io_stbuf_data_any, + input [31:0] io_stbuf_fwddata_hi_m, + input [31:0] io_stbuf_fwddata_lo_m, + input [3:0] io_stbuf_fwdbyteen_lo_m, + input [3:0] io_stbuf_fwdbyteen_hi_m, + output [31:0] io_lsu_ld_data_corr_r, + input io_lsu_double_ecc_error_r, + input io_single_ecc_error_hi_r, + input io_single_ecc_error_lo_r, + input [31:0] io_sec_data_hi_r_ff, + input [31:0] io_sec_data_lo_r_ff, + output [31:0] io_dccm_rdata_hi_m, + output [31:0] io_dccm_rdata_lo_m, + output [6:0] io_dccm_data_ecc_hi_m, + output [6:0] io_dccm_data_ecc_lo_m, + output [31:0] io_lsu_ld_data_m, + input io_lsu_double_ecc_error_m, + input [31:0] io_sec_data_hi_m, + input [31:0] io_sec_data_lo_m, + input [31:0] io_store_data_m, + input io_dma_dccm_wen, + input io_dma_pic_wen, + input [2:0] io_dma_mem_tag_m, + input [31:0] io_dma_mem_addr, + input [63:0] io_dma_mem_wdata, + input [31:0] io_dma_dccm_wdata_lo, + input [31:0] io_dma_dccm_wdata_hi, + output [31:0] io_store_data_hi_r, + output [31:0] io_store_data_lo_r, + output [31:0] io_store_datafn_hi_r, + output [31:0] io_store_datafn_lo_r, + output io_ld_single_ecc_error_r, + output io_ld_single_ecc_error_r_ff, + output [31:0] io_picm_mask_data_m, + output io_lsu_stbuf_commit_any, + output io_lsu_dccm_rden_m, + output io_dccm_dma_rvalid, + output io_dccm_dma_ecc_error, + output [2:0] io_dccm_dma_rtag, + output [63:0] io_dccm_dma_rdata, + output io_dccm_wren, + output io_dccm_rden, + output [15:0] io_dccm_wr_addr_lo, + output [38:0] io_dccm_wr_data_lo, + output [15:0] io_dccm_rd_addr_lo, + input [38:0] io_dccm_rd_data_lo, + output [15:0] io_dccm_wr_addr_hi, + output [38:0] io_dccm_wr_data_hi, + output [15:0] io_dccm_rd_addr_hi, + input [38:0] io_dccm_rd_data_hi, + output io_picm_wren, + output io_picm_rden, + output io_picm_mken, + output [31:0] io_picm_rdaddr, + output [31:0] io_picm_wraddr, + output [31:0] io_picm_wr_data, + input [31:0] io_picm_rd_data, + input io_scan_mode +); +`ifdef RANDOMIZE_REG_INIT + reg [63:0] _RAND_0; + reg [31:0] _RAND_1; + reg [31:0] _RAND_2; + reg [31:0] _RAND_3; + reg [31:0] _RAND_4; + reg [31:0] _RAND_5; + reg [31:0] _RAND_6; + reg [31:0] _RAND_7; + reg [31:0] _RAND_8; +`endif // RANDOMIZE_REG_INIT + wire rvclkhdr_io_l1clk; // @[beh_lib.scala 351:21] + wire rvclkhdr_io_clk; // @[beh_lib.scala 351:21] + wire rvclkhdr_io_en; // @[beh_lib.scala 351:21] + wire rvclkhdr_io_scan_mode; // @[beh_lib.scala 351:21] + wire rvclkhdr_1_io_l1clk; // @[beh_lib.scala 351:21] + wire rvclkhdr_1_io_clk; // @[beh_lib.scala 351:21] + wire rvclkhdr_1_io_en; // @[beh_lib.scala 351:21] + wire rvclkhdr_1_io_scan_mode; // @[beh_lib.scala 351:21] + wire [63:0] picm_rd_data_m = {io_picm_rd_data,io_picm_rd_data}; // @[Cat.scala 29:58] + wire [63:0] dccm_rdata_corr_m = {io_sec_data_hi_m,io_sec_data_lo_m}; // @[Cat.scala 29:58] + wire [63:0] dccm_rdata_m = {io_dccm_rdata_hi_m,io_dccm_rdata_lo_m}; // @[Cat.scala 29:58] + wire _T = io_lsu_pkt_m_valid & io_lsu_pkt_m_load; // @[el2_lsu_dccm_ctl.scala 168:50] + wire [7:0] _T_30 = {io_stbuf_fwdbyteen_hi_m,io_stbuf_fwdbyteen_lo_m}; // @[Cat.scala 29:58] + wire [63:0] _T_33 = {io_stbuf_fwddata_hi_m,io_stbuf_fwddata_lo_m}; // @[Cat.scala 29:58] + wire [7:0] _T_38 = io_addr_in_pic_m ? picm_rd_data_m[15:8] : dccm_rdata_corr_m[15:8]; // @[el2_lsu_dccm_ctl.scala 184:171] + wire [7:0] lsu_rdata_corr_m_1 = _T_30[1] ? _T_33[15:8] : _T_38; // @[el2_lsu_dccm_ctl.scala 184:36] + wire [7:0] _T_18 = io_addr_in_pic_m ? picm_rd_data_m[7:0] : dccm_rdata_corr_m[7:0]; // @[el2_lsu_dccm_ctl.scala 184:171] + wire [7:0] lsu_rdata_corr_m_0 = _T_30[0] ? _T_33[7:0] : _T_18; // @[el2_lsu_dccm_ctl.scala 184:36] + wire [7:0] _T_78 = io_addr_in_pic_m ? picm_rd_data_m[31:24] : dccm_rdata_corr_m[31:24]; // @[el2_lsu_dccm_ctl.scala 184:171] + wire [7:0] lsu_rdata_corr_m_3 = _T_30[3] ? _T_33[31:24] : _T_78; // @[el2_lsu_dccm_ctl.scala 184:36] + wire [7:0] _T_58 = io_addr_in_pic_m ? picm_rd_data_m[23:16] : dccm_rdata_corr_m[23:16]; // @[el2_lsu_dccm_ctl.scala 184:171] + wire [7:0] lsu_rdata_corr_m_2 = _T_30[2] ? _T_33[23:16] : _T_58; // @[el2_lsu_dccm_ctl.scala 184:36] + wire [31:0] _T_4 = {lsu_rdata_corr_m_3,lsu_rdata_corr_m_2,lsu_rdata_corr_m_1,lsu_rdata_corr_m_0}; // @[el2_lsu_dccm_ctl.scala 170:48] + wire [7:0] _T_118 = io_addr_in_pic_m ? picm_rd_data_m[47:40] : dccm_rdata_corr_m[47:40]; // @[el2_lsu_dccm_ctl.scala 184:171] + wire [7:0] lsu_rdata_corr_m_5 = _T_30[5] ? _T_33[47:40] : _T_118; // @[el2_lsu_dccm_ctl.scala 184:36] + wire [7:0] _T_98 = io_addr_in_pic_m ? picm_rd_data_m[39:32] : dccm_rdata_corr_m[39:32]; // @[el2_lsu_dccm_ctl.scala 184:171] + wire [7:0] lsu_rdata_corr_m_4 = _T_30[4] ? _T_33[39:32] : _T_98; // @[el2_lsu_dccm_ctl.scala 184:36] + wire [7:0] _T_158 = io_addr_in_pic_m ? picm_rd_data_m[63:56] : dccm_rdata_corr_m[63:56]; // @[el2_lsu_dccm_ctl.scala 184:171] + wire [7:0] lsu_rdata_corr_m_7 = _T_30[7] ? _T_33[63:56] : _T_158; // @[el2_lsu_dccm_ctl.scala 184:36] + wire [7:0] _T_138 = io_addr_in_pic_m ? picm_rd_data_m[55:48] : dccm_rdata_corr_m[55:48]; // @[el2_lsu_dccm_ctl.scala 184:171] + wire [7:0] lsu_rdata_corr_m_6 = _T_30[6] ? _T_33[55:48] : _T_138; // @[el2_lsu_dccm_ctl.scala 184:36] + wire [31:0] _T_7 = {lsu_rdata_corr_m_7,lsu_rdata_corr_m_6,lsu_rdata_corr_m_5,lsu_rdata_corr_m_4}; // @[el2_lsu_dccm_ctl.scala 170:48] + wire [63:0] _T_8 = {lsu_rdata_corr_m_7,lsu_rdata_corr_m_6,lsu_rdata_corr_m_5,lsu_rdata_corr_m_4,lsu_rdata_corr_m_3,lsu_rdata_corr_m_2,lsu_rdata_corr_m_1,lsu_rdata_corr_m_0}; // @[el2_lsu_dccm_ctl.scala 170:48] + reg [63:0] _T_9; // @[el2_lsu_dccm_ctl.scala 178:65] + wire [7:0] _T_28 = io_addr_in_pic_m ? picm_rd_data_m[7:0] : dccm_rdata_m[7:0]; // @[el2_lsu_dccm_ctl.scala 185:171] + wire [7:0] lsu_rdata_m_0 = _T_30[0] ? _T_33[7:0] : _T_28; // @[el2_lsu_dccm_ctl.scala 185:36] + wire [7:0] _T_48 = io_addr_in_pic_m ? picm_rd_data_m[15:8] : dccm_rdata_m[15:8]; // @[el2_lsu_dccm_ctl.scala 185:171] + wire [7:0] lsu_rdata_m_1 = _T_30[1] ? _T_33[15:8] : _T_48; // @[el2_lsu_dccm_ctl.scala 185:36] + wire [7:0] _T_68 = io_addr_in_pic_m ? picm_rd_data_m[23:16] : dccm_rdata_m[23:16]; // @[el2_lsu_dccm_ctl.scala 185:171] + wire [7:0] lsu_rdata_m_2 = _T_30[2] ? _T_33[23:16] : _T_68; // @[el2_lsu_dccm_ctl.scala 185:36] + wire [7:0] _T_88 = io_addr_in_pic_m ? picm_rd_data_m[31:24] : dccm_rdata_m[31:24]; // @[el2_lsu_dccm_ctl.scala 185:171] + wire [7:0] lsu_rdata_m_3 = _T_30[3] ? _T_33[31:24] : _T_88; // @[el2_lsu_dccm_ctl.scala 185:36] + wire [7:0] _T_108 = io_addr_in_pic_m ? picm_rd_data_m[39:32] : dccm_rdata_m[39:32]; // @[el2_lsu_dccm_ctl.scala 185:171] + wire [7:0] lsu_rdata_m_4 = _T_30[4] ? _T_33[39:32] : _T_108; // @[el2_lsu_dccm_ctl.scala 185:36] + wire [7:0] _T_128 = io_addr_in_pic_m ? picm_rd_data_m[47:40] : dccm_rdata_m[47:40]; // @[el2_lsu_dccm_ctl.scala 185:171] + wire [7:0] lsu_rdata_m_5 = _T_30[5] ? _T_33[47:40] : _T_128; // @[el2_lsu_dccm_ctl.scala 185:36] + wire [7:0] _T_148 = io_addr_in_pic_m ? picm_rd_data_m[55:48] : dccm_rdata_m[55:48]; // @[el2_lsu_dccm_ctl.scala 185:171] + wire [7:0] lsu_rdata_m_6 = _T_30[6] ? _T_33[55:48] : _T_148; // @[el2_lsu_dccm_ctl.scala 185:36] + wire [7:0] _T_168 = io_addr_in_pic_m ? picm_rd_data_m[63:56] : dccm_rdata_m[63:56]; // @[el2_lsu_dccm_ctl.scala 185:171] + wire [7:0] lsu_rdata_m_7 = _T_30[7] ? _T_33[63:56] : _T_168; // @[el2_lsu_dccm_ctl.scala 185:36] + wire [63:0] _T_176 = {lsu_rdata_m_7,lsu_rdata_m_6,lsu_rdata_m_5,lsu_rdata_m_4,lsu_rdata_m_3,lsu_rdata_m_2,lsu_rdata_m_1,lsu_rdata_m_0}; // @[el2_lsu_dccm_ctl.scala 186:43] + wire [3:0] _GEN_0 = {{2'd0}, io_lsu_addr_m[1:0]}; // @[el2_lsu_dccm_ctl.scala 186:56] + wire [5:0] _T_178 = 4'h8 * _GEN_0; // @[el2_lsu_dccm_ctl.scala 186:56] + wire [63:0] _T_179 = _T_176 >> _T_178; // @[el2_lsu_dccm_ctl.scala 186:50] + wire _T_192 = io_lsu_addr_d[15:2] == io_lsu_addr_r[15:2]; // @[el2_lsu_dccm_ctl.scala 190:64] + wire _T_195 = io_end_addr_d[15:2] == io_lsu_addr_r[15:2]; // @[el2_lsu_dccm_ctl.scala 190:145] + wire _T_196 = _T_192 | _T_195; // @[el2_lsu_dccm_ctl.scala 190:109] + wire _T_197 = _T_196 & io_lsu_pkt_d_valid; // @[el2_lsu_dccm_ctl.scala 190:191] + wire _T_198 = _T_197 & io_lsu_pkt_d_store; // @[el2_lsu_dccm_ctl.scala 190:212] + wire _T_199 = _T_198 & io_lsu_pkt_d_dma; // @[el2_lsu_dccm_ctl.scala 190:233] + wire _T_200 = _T_199 & io_addr_in_dccm_d; // @[el2_lsu_dccm_ctl.scala 190:252] + wire _T_203 = io_lsu_addr_m[15:2] == io_lsu_addr_r[15:2]; // @[el2_lsu_dccm_ctl.scala 191:41] + wire _T_206 = io_end_addr_m[15:2] == io_lsu_addr_r[15:2]; // @[el2_lsu_dccm_ctl.scala 191:122] + wire _T_207 = _T_203 | _T_206; // @[el2_lsu_dccm_ctl.scala 191:86] + wire _T_208 = _T_207 & io_lsu_pkt_m_valid; // @[el2_lsu_dccm_ctl.scala 191:168] + wire _T_209 = _T_208 & io_lsu_pkt_m_store; // @[el2_lsu_dccm_ctl.scala 191:189] + wire _T_210 = _T_209 & io_lsu_pkt_m_dma; // @[el2_lsu_dccm_ctl.scala 191:210] + wire _T_211 = _T_210 & io_addr_in_dccm_m; // @[el2_lsu_dccm_ctl.scala 191:229] + wire kill_ecc_corr_lo_r = _T_200 | _T_211; // @[el2_lsu_dccm_ctl.scala 190:273] + wire _T_214 = io_lsu_addr_d[15:2] == io_end_addr_r[15:2]; // @[el2_lsu_dccm_ctl.scala 192:64] + wire _T_217 = io_end_addr_d[15:2] == io_end_addr_r[15:2]; // @[el2_lsu_dccm_ctl.scala 192:145] + wire _T_218 = _T_214 | _T_217; // @[el2_lsu_dccm_ctl.scala 192:109] + wire _T_219 = _T_218 & io_lsu_pkt_d_valid; // @[el2_lsu_dccm_ctl.scala 192:191] + wire _T_220 = _T_219 & io_lsu_pkt_d_store; // @[el2_lsu_dccm_ctl.scala 192:212] + wire _T_221 = _T_220 & io_lsu_pkt_d_dma; // @[el2_lsu_dccm_ctl.scala 192:233] + wire _T_222 = _T_221 & io_addr_in_dccm_d; // @[el2_lsu_dccm_ctl.scala 192:252] + wire _T_225 = io_lsu_addr_m[15:2] == io_end_addr_r[15:2]; // @[el2_lsu_dccm_ctl.scala 193:41] + wire _T_228 = io_end_addr_m[15:2] == io_end_addr_r[15:2]; // @[el2_lsu_dccm_ctl.scala 193:122] + wire _T_229 = _T_225 | _T_228; // @[el2_lsu_dccm_ctl.scala 193:86] + wire _T_230 = _T_229 & io_lsu_pkt_m_valid; // @[el2_lsu_dccm_ctl.scala 193:168] + wire _T_231 = _T_230 & io_lsu_pkt_m_store; // @[el2_lsu_dccm_ctl.scala 193:189] + wire _T_232 = _T_231 & io_lsu_pkt_m_dma; // @[el2_lsu_dccm_ctl.scala 193:210] + wire _T_233 = _T_232 & io_addr_in_dccm_m; // @[el2_lsu_dccm_ctl.scala 193:229] + wire kill_ecc_corr_hi_r = _T_222 | _T_233; // @[el2_lsu_dccm_ctl.scala 192:273] + wire _T_234 = io_lsu_pkt_r_load & io_single_ecc_error_lo_r; // @[el2_lsu_dccm_ctl.scala 194:55] + wire _T_235 = ~io_lsu_raw_fwd_lo_r; // @[el2_lsu_dccm_ctl.scala 194:84] + wire ld_single_ecc_error_lo_r = _T_234 & _T_235; // @[el2_lsu_dccm_ctl.scala 194:82] + wire _T_236 = io_lsu_pkt_r_load & io_single_ecc_error_hi_r; // @[el2_lsu_dccm_ctl.scala 195:55] + wire _T_237 = ~io_lsu_raw_fwd_hi_r; // @[el2_lsu_dccm_ctl.scala 195:84] + wire ld_single_ecc_error_hi_r = _T_236 & _T_237; // @[el2_lsu_dccm_ctl.scala 195:82] + wire _T_238 = ld_single_ecc_error_lo_r | ld_single_ecc_error_hi_r; // @[el2_lsu_dccm_ctl.scala 196:62] + wire _T_239 = ~io_lsu_double_ecc_error_r; // @[el2_lsu_dccm_ctl.scala 196:92] + wire _T_241 = io_lsu_commit_r | io_lsu_pkt_r_dma; // @[el2_lsu_dccm_ctl.scala 197:81] + wire _T_242 = ld_single_ecc_error_lo_r & _T_241; // @[el2_lsu_dccm_ctl.scala 197:62] + wire _T_243 = ~kill_ecc_corr_lo_r; // @[el2_lsu_dccm_ctl.scala 197:103] + wire _T_245 = ld_single_ecc_error_hi_r & _T_241; // @[el2_lsu_dccm_ctl.scala 198:62] + wire _T_246 = ~kill_ecc_corr_hi_r; // @[el2_lsu_dccm_ctl.scala 198:103] + reg lsu_double_ecc_error_r_ff; // @[el2_lsu_dccm_ctl.scala 200:74] + reg ld_single_ecc_error_hi_r_ff; // @[el2_lsu_dccm_ctl.scala 201:74] + reg ld_single_ecc_error_lo_r_ff; // @[el2_lsu_dccm_ctl.scala 202:74] + reg [15:0] ld_sec_addr_hi_r_ff; // @[beh_lib.scala 357:14] + reg [15:0] ld_sec_addr_lo_r_ff; // @[beh_lib.scala 357:14] + wire _T_253 = io_lsu_pkt_d_word | io_lsu_pkt_d_dword; // @[el2_lsu_dccm_ctl.scala 208:110] + wire _T_254 = ~_T_253; // @[el2_lsu_dccm_ctl.scala 208:90] + wire _T_256 = io_lsu_addr_d[1:0] != 2'h0; // @[el2_lsu_dccm_ctl.scala 208:154] + wire _T_257 = _T_254 | _T_256; // @[el2_lsu_dccm_ctl.scala 208:132] + wire _T_258 = io_lsu_pkt_d_store & _T_257; // @[el2_lsu_dccm_ctl.scala 208:87] + wire _T_259 = io_lsu_pkt_d_load | _T_258; // @[el2_lsu_dccm_ctl.scala 208:65] + wire _T_260 = io_lsu_pkt_d_valid & _T_259; // @[el2_lsu_dccm_ctl.scala 208:44] + wire lsu_dccm_rden_d = _T_260 & io_addr_in_dccm_d; // @[el2_lsu_dccm_ctl.scala 208:171] + wire _T_261 = ld_single_ecc_error_lo_r_ff | ld_single_ecc_error_hi_r_ff; // @[el2_lsu_dccm_ctl.scala 211:63] + wire _T_262 = ~lsu_double_ecc_error_r_ff; // @[el2_lsu_dccm_ctl.scala 211:96] + wire _T_264 = lsu_dccm_rden_d | io_dma_dccm_wen; // @[el2_lsu_dccm_ctl.scala 212:71] + wire _T_265 = _T_264 | io_ld_single_ecc_error_r_ff; // @[el2_lsu_dccm_ctl.scala 212:89] + wire _T_266 = ~_T_265; // @[el2_lsu_dccm_ctl.scala 212:53] + wire _T_269 = io_stbuf_addr_any[3:2] == io_lsu_addr_d[3:2]; // @[el2_lsu_dccm_ctl.scala 213:107] + wire _T_272 = io_stbuf_addr_any[3:2] == io_end_addr_d[3:2]; // @[el2_lsu_dccm_ctl.scala 214:88] + wire _T_273 = _T_269 | _T_272; // @[el2_lsu_dccm_ctl.scala 213:195] + wire _T_274 = ~_T_273; // @[el2_lsu_dccm_ctl.scala 213:24] + wire _T_275 = lsu_dccm_rden_d & _T_274; // @[el2_lsu_dccm_ctl.scala 213:22] + wire _T_276 = _T_266 | _T_275; // @[el2_lsu_dccm_ctl.scala 212:120] + wire _T_278 = io_dma_dccm_wen | io_lsu_stbuf_commit_any; // @[el2_lsu_dccm_ctl.scala 217:41] + wire [15:0] _T_285 = ld_single_ecc_error_lo_r_ff ? ld_sec_addr_lo_r_ff : ld_sec_addr_hi_r_ff; // @[el2_lsu_dccm_ctl.scala 220:8] + wire [15:0] _T_289 = io_dma_dccm_wen ? io_lsu_addr_d : io_stbuf_addr_any; // @[el2_lsu_dccm_ctl.scala 221:8] + wire [15:0] _T_295 = ld_single_ecc_error_hi_r_ff ? ld_sec_addr_hi_r_ff : ld_sec_addr_lo_r_ff; // @[el2_lsu_dccm_ctl.scala 223:8] + wire [15:0] _T_299 = io_dma_dccm_wen ? io_end_addr_d : io_stbuf_addr_any; // @[el2_lsu_dccm_ctl.scala 224:8] + wire _T_304 = ~ld_single_ecc_error_lo_r_ff; // @[el2_lsu_dccm_ctl.scala 228:36] + wire [38:0] _T_307 = {7'h0,io_sec_data_lo_r_ff}; // @[Cat.scala 29:58] + wire [38:0] _T_310 = {7'h0,io_sec_data_hi_r_ff}; // @[Cat.scala 29:58] + wire [38:0] _T_311 = _T_304 ? _T_307 : _T_310; // @[el2_lsu_dccm_ctl.scala 228:8] + wire [38:0] _T_315 = {7'h0,io_dma_dccm_wdata_lo}; // @[Cat.scala 29:58] + wire [38:0] _T_318 = {7'h0,io_stbuf_data_any}; // @[Cat.scala 29:58] + wire [38:0] _T_319 = io_dma_dccm_wen ? _T_315 : _T_318; // @[el2_lsu_dccm_ctl.scala 230:8] + wire _T_322 = ~ld_single_ecc_error_hi_r_ff; // @[el2_lsu_dccm_ctl.scala 234:36] + wire [38:0] _T_329 = _T_322 ? _T_310 : _T_307; // @[el2_lsu_dccm_ctl.scala 234:8] + wire [38:0] _T_333 = {7'h0,io_dma_dccm_wdata_hi}; // @[Cat.scala 29:58] + wire [38:0] _T_337 = io_dma_dccm_wen ? _T_333 : _T_318; // @[el2_lsu_dccm_ctl.scala 236:8] + wire [3:0] _T_340 = io_lsu_pkt_m_store ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] + wire [3:0] _T_342 = io_lsu_pkt_m_by ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] + wire [3:0] _T_343 = _T_342 & 4'h1; // @[el2_lsu_dccm_ctl.scala 240:84] + wire [3:0] _T_345 = io_lsu_pkt_m_half ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] + wire [3:0] _T_346 = _T_345 & 4'h3; // @[el2_lsu_dccm_ctl.scala 241:33] + wire [3:0] _T_347 = _T_343 | _T_346; // @[el2_lsu_dccm_ctl.scala 240:97] + wire [3:0] _T_349 = io_lsu_pkt_m_word ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] + wire [3:0] _T_351 = _T_347 | _T_349; // @[el2_lsu_dccm_ctl.scala 241:46] + wire [3:0] store_byteen_m = _T_340 & _T_351; // @[el2_lsu_dccm_ctl.scala 240:53] + wire [3:0] _T_353 = io_lsu_pkt_r_store ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] + wire [3:0] _T_355 = io_lsu_pkt_r_by ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] + wire [3:0] _T_356 = _T_355 & 4'h1; // @[el2_lsu_dccm_ctl.scala 243:84] + wire [3:0] _T_358 = io_lsu_pkt_r_half ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] + wire [3:0] _T_359 = _T_358 & 4'h3; // @[el2_lsu_dccm_ctl.scala 244:33] + wire [3:0] _T_360 = _T_356 | _T_359; // @[el2_lsu_dccm_ctl.scala 243:97] + wire [3:0] _T_362 = io_lsu_pkt_r_word ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] + wire [3:0] _T_364 = _T_360 | _T_362; // @[el2_lsu_dccm_ctl.scala 244:46] + wire [3:0] store_byteen_r = _T_353 & _T_364; // @[el2_lsu_dccm_ctl.scala 243:53] + wire [7:0] _T_366 = {4'h0,store_byteen_m}; // @[Cat.scala 29:58] + wire [10:0] _GEN_2 = {{3'd0}, _T_366}; // @[el2_lsu_dccm_ctl.scala 246:62] + wire [10:0] store_byteen_ext_m = _GEN_2 << io_lsu_addr_m[1:0]; // @[el2_lsu_dccm_ctl.scala 246:62] + wire [7:0] _T_369 = {4'h0,store_byteen_r}; // @[Cat.scala 29:58] + wire [10:0] _GEN_3 = {{3'd0}, _T_369}; // @[el2_lsu_dccm_ctl.scala 247:62] + wire [10:0] store_byteen_ext_r = _GEN_3 << io_lsu_addr_r[1:0]; // @[el2_lsu_dccm_ctl.scala 247:62] + wire _T_373 = io_stbuf_addr_any[15:2] == io_lsu_addr_m[15:2]; // @[el2_lsu_dccm_ctl.scala 250:71] + wire dccm_wr_bypass_d_m_lo = _T_373 & io_addr_in_dccm_m; // @[el2_lsu_dccm_ctl.scala 250:109] + wire _T_376 = io_stbuf_addr_any[15:2] == io_end_addr_m[15:2]; // @[el2_lsu_dccm_ctl.scala 251:71] + wire dccm_wr_bypass_d_m_hi = _T_376 & io_addr_in_dccm_m; // @[el2_lsu_dccm_ctl.scala 251:109] + wire _T_379 = io_stbuf_addr_any[15:2] == io_lsu_addr_r[15:2]; // @[el2_lsu_dccm_ctl.scala 253:71] + wire dccm_wr_bypass_d_r_lo = _T_379 & io_addr_in_dccm_r; // @[el2_lsu_dccm_ctl.scala 253:109] + wire [63:0] _T_385 = {32'h0,io_store_data_m}; // @[Cat.scala 29:58] + wire [126:0] _GEN_5 = {{63'd0}, _T_385}; // @[el2_lsu_dccm_ctl.scala 287:72] + wire [126:0] _T_388 = _GEN_5 << _T_178; // @[el2_lsu_dccm_ctl.scala 287:72] + wire [63:0] store_data_pre_m = _T_388[63:0]; // @[el2_lsu_dccm_ctl.scala 287:29] + wire [31:0] store_data_hi_m = store_data_pre_m[63:32]; // @[el2_lsu_dccm_ctl.scala 288:48] + wire [31:0] store_data_lo_m = store_data_pre_m[31:0]; // @[el2_lsu_dccm_ctl.scala 289:48] + wire _T_394 = io_lsu_stbuf_commit_any & dccm_wr_bypass_d_m_lo; // @[el2_lsu_dccm_ctl.scala 290:195] + wire [7:0] _T_398 = _T_394 ? io_stbuf_data_any[7:0] : io_sec_data_lo_m[7:0]; // @[el2_lsu_dccm_ctl.scala 290:169] + wire [7:0] _T_399 = store_byteen_ext_m[0] ? store_data_lo_m[7:0] : _T_398; // @[el2_lsu_dccm_ctl.scala 290:104] + wire [7:0] _T_407 = _T_394 ? io_stbuf_data_any[15:8] : io_sec_data_lo_m[15:8]; // @[el2_lsu_dccm_ctl.scala 290:169] + wire [7:0] _T_408 = store_byteen_ext_m[1] ? store_data_lo_m[15:8] : _T_407; // @[el2_lsu_dccm_ctl.scala 290:104] + wire [7:0] _T_416 = _T_394 ? io_stbuf_data_any[23:16] : io_sec_data_lo_m[23:16]; // @[el2_lsu_dccm_ctl.scala 290:169] + wire [7:0] _T_417 = store_byteen_ext_m[2] ? store_data_lo_m[23:16] : _T_416; // @[el2_lsu_dccm_ctl.scala 290:104] + wire [7:0] _T_425 = _T_394 ? io_stbuf_data_any[31:24] : io_sec_data_lo_m[31:24]; // @[el2_lsu_dccm_ctl.scala 290:169] + wire [7:0] _T_426 = store_byteen_ext_m[3] ? store_data_lo_m[31:24] : _T_425; // @[el2_lsu_dccm_ctl.scala 290:104] + wire [15:0] _T_428 = {_T_417,_T_426}; // @[Cat.scala 29:58] + wire [15:0] _T_429 = {_T_399,_T_408}; // @[Cat.scala 29:58] + reg [31:0] _T_431; // @[el2_lsu_dccm_ctl.scala 290:72] + wire _T_435 = io_lsu_stbuf_commit_any & dccm_wr_bypass_d_m_hi; // @[el2_lsu_dccm_ctl.scala 291:195] + wire [7:0] _T_439 = _T_435 ? io_stbuf_data_any[7:0] : io_sec_data_hi_m[7:0]; // @[el2_lsu_dccm_ctl.scala 291:169] + wire [7:0] _T_440 = store_byteen_ext_m[4] ? store_data_hi_m[7:0] : _T_439; // @[el2_lsu_dccm_ctl.scala 291:104] + wire [7:0] _T_448 = _T_435 ? io_stbuf_data_any[15:8] : io_sec_data_hi_m[15:8]; // @[el2_lsu_dccm_ctl.scala 291:169] + wire [7:0] _T_449 = store_byteen_ext_m[5] ? store_data_hi_m[15:8] : _T_448; // @[el2_lsu_dccm_ctl.scala 291:104] + wire [7:0] _T_457 = _T_435 ? io_stbuf_data_any[23:16] : io_sec_data_hi_m[23:16]; // @[el2_lsu_dccm_ctl.scala 291:169] + wire [7:0] _T_458 = store_byteen_ext_m[6] ? store_data_hi_m[23:16] : _T_457; // @[el2_lsu_dccm_ctl.scala 291:104] + wire [7:0] _T_466 = _T_435 ? io_stbuf_data_any[31:24] : io_sec_data_hi_m[31:24]; // @[el2_lsu_dccm_ctl.scala 291:169] + wire [7:0] _T_467 = store_byteen_ext_m[7] ? store_data_hi_m[31:24] : _T_466; // @[el2_lsu_dccm_ctl.scala 291:104] + wire [15:0] _T_469 = {_T_458,_T_467}; // @[Cat.scala 29:58] + wire [15:0] _T_470 = {_T_440,_T_449}; // @[Cat.scala 29:58] + reg [31:0] _T_472; // @[el2_lsu_dccm_ctl.scala 291:72] + wire _T_473 = io_lsu_stbuf_commit_any & dccm_wr_bypass_d_r_lo; // @[el2_lsu_dccm_ctl.scala 292:89] + wire _T_475 = ~store_byteen_ext_r[0]; // @[el2_lsu_dccm_ctl.scala 292:115] + wire _T_476 = _T_473 & _T_475; // @[el2_lsu_dccm_ctl.scala 292:113] + wire [7:0] _T_480 = _T_476 ? io_stbuf_data_any[7:0] : io_store_data_lo_r[7:0]; // @[el2_lsu_dccm_ctl.scala 292:63] + wire _T_483 = ~store_byteen_ext_r[1]; // @[el2_lsu_dccm_ctl.scala 292:115] + wire _T_484 = _T_473 & _T_483; // @[el2_lsu_dccm_ctl.scala 292:113] + wire [7:0] _T_488 = _T_484 ? io_stbuf_data_any[15:8] : io_store_data_lo_r[15:8]; // @[el2_lsu_dccm_ctl.scala 292:63] + wire _T_491 = ~store_byteen_ext_r[2]; // @[el2_lsu_dccm_ctl.scala 292:115] + wire _T_492 = _T_473 & _T_491; // @[el2_lsu_dccm_ctl.scala 292:113] + wire [7:0] _T_496 = _T_492 ? io_stbuf_data_any[23:16] : io_store_data_lo_r[23:16]; // @[el2_lsu_dccm_ctl.scala 292:63] + wire _T_499 = ~store_byteen_ext_r[3]; // @[el2_lsu_dccm_ctl.scala 292:115] + wire _T_500 = _T_473 & _T_499; // @[el2_lsu_dccm_ctl.scala 292:113] + wire [7:0] _T_504 = _T_500 ? io_stbuf_data_any[31:24] : io_store_data_lo_r[31:24]; // @[el2_lsu_dccm_ctl.scala 292:63] + wire [15:0] _T_506 = {_T_496,_T_504}; // @[Cat.scala 29:58] + wire [15:0] _T_507 = {_T_480,_T_488}; // @[Cat.scala 29:58] + wire [7:0] _T_516 = _T_476 ? io_stbuf_data_any[7:0] : io_store_data_hi_r[7:0]; // @[el2_lsu_dccm_ctl.scala 293:63] + wire [7:0] _T_524 = _T_484 ? io_stbuf_data_any[15:8] : io_store_data_hi_r[15:8]; // @[el2_lsu_dccm_ctl.scala 293:63] + wire [7:0] _T_532 = _T_492 ? io_stbuf_data_any[23:16] : io_store_data_hi_r[23:16]; // @[el2_lsu_dccm_ctl.scala 293:63] + wire [7:0] _T_540 = _T_500 ? io_stbuf_data_any[31:24] : io_store_data_hi_r[31:24]; // @[el2_lsu_dccm_ctl.scala 293:63] + wire [15:0] _T_542 = {_T_532,_T_540}; // @[Cat.scala 29:58] + wire [15:0] _T_543 = {_T_516,_T_524}; // @[Cat.scala 29:58] + wire _T_577 = io_lsu_pkt_r_valid & io_lsu_pkt_r_store; // @[el2_lsu_dccm_ctl.scala 302:50] + wire _T_578 = _T_577 & io_addr_in_pic_r; // @[el2_lsu_dccm_ctl.scala 302:71] + wire _T_579 = _T_578 & io_lsu_commit_r; // @[el2_lsu_dccm_ctl.scala 302:90] + wire _T_581 = io_lsu_pkt_d_valid & io_lsu_pkt_d_load; // @[el2_lsu_dccm_ctl.scala 303:50] + wire _T_583 = io_lsu_pkt_d_valid & io_lsu_pkt_d_store; // @[el2_lsu_dccm_ctl.scala 304:50] + wire [5:0] _T_586 = 6'h20 - 6'h1; // @[el2_lsu_dccm_ctl.scala 306:58] + wire [20:0] _T_588 = {_T_586,io_lsu_addr_d[14:0]}; // @[Cat.scala 29:58] + wire [31:0] _GEN_8 = {{11'd0}, _T_588}; // @[el2_lsu_dccm_ctl.scala 306:47] + wire [14:0] _T_595 = io_dma_pic_wen ? io_dma_mem_addr[14:0] : io_lsu_addr_r[14:0]; // @[el2_lsu_dccm_ctl.scala 307:78] + wire [20:0] _T_596 = {_T_586,_T_595}; // @[Cat.scala 29:58] + wire [31:0] _GEN_9 = {{11'd0}, _T_596}; // @[el2_lsu_dccm_ctl.scala 307:47] + reg _T_603; // @[el2_lsu_dccm_ctl.scala 312:61] + rvclkhdr rvclkhdr ( // @[beh_lib.scala 351:21] + .io_l1clk(rvclkhdr_io_l1clk), + .io_clk(rvclkhdr_io_clk), + .io_en(rvclkhdr_io_en), + .io_scan_mode(rvclkhdr_io_scan_mode) + ); + rvclkhdr rvclkhdr_1 ( // @[beh_lib.scala 351:21] + .io_l1clk(rvclkhdr_1_io_l1clk), + .io_clk(rvclkhdr_1_io_clk), + .io_en(rvclkhdr_1_io_en), + .io_scan_mode(rvclkhdr_1_io_scan_mode) + ); + assign io_lsu_ld_data_corr_r = _T_9[31:0]; // @[el2_lsu_dccm_ctl.scala 178:28] + assign io_dccm_rdata_hi_m = io_dccm_rd_data_hi[31:0]; // @[el2_lsu_dccm_ctl.scala 298:27] + assign io_dccm_rdata_lo_m = io_dccm_rd_data_lo[31:0]; // @[el2_lsu_dccm_ctl.scala 297:27] + assign io_dccm_data_ecc_hi_m = io_dccm_rd_data_hi[38:32]; // @[el2_lsu_dccm_ctl.scala 300:27] + assign io_dccm_data_ecc_lo_m = io_dccm_rd_data_lo[38:32]; // @[el2_lsu_dccm_ctl.scala 299:27] + assign io_lsu_ld_data_m = _T_179[31:0]; // @[el2_lsu_dccm_ctl.scala 186:28] + assign io_store_data_hi_r = _T_472; // @[el2_lsu_dccm_ctl.scala 291:29] + assign io_store_data_lo_r = _T_431; // @[el2_lsu_dccm_ctl.scala 290:29] + assign io_store_datafn_hi_r = {_T_543,_T_542}; // @[el2_lsu_dccm_ctl.scala 293:29] + assign io_store_datafn_lo_r = {_T_507,_T_506}; // @[el2_lsu_dccm_ctl.scala 292:29] + assign io_ld_single_ecc_error_r = _T_238 & _T_239; // @[el2_lsu_dccm_ctl.scala 196:33] + assign io_ld_single_ecc_error_r_ff = _T_261 & _T_262; // @[el2_lsu_dccm_ctl.scala 211:31] + assign io_picm_mask_data_m = picm_rd_data_m[31:0]; // @[el2_lsu_dccm_ctl.scala 308:27] + assign io_lsu_stbuf_commit_any = io_stbuf_reqvld_any & _T_276; // @[el2_lsu_dccm_ctl.scala 212:27] + assign io_lsu_dccm_rden_m = _T_603; // @[el2_lsu_dccm_ctl.scala 312:24] + assign io_dccm_dma_rvalid = _T & io_lsu_pkt_m_dma; // @[el2_lsu_dccm_ctl.scala 168:28] + assign io_dccm_dma_ecc_error = io_lsu_double_ecc_error_m; // @[el2_lsu_dccm_ctl.scala 169:28] + assign io_dccm_dma_rtag = io_dma_mem_tag_m; // @[el2_lsu_dccm_ctl.scala 171:28] + assign io_dccm_dma_rdata = {_T_7,_T_4}; // @[el2_lsu_dccm_ctl.scala 170:28] + assign io_dccm_wren = _T_278 | io_ld_single_ecc_error_r_ff; // @[el2_lsu_dccm_ctl.scala 217:22] + assign io_dccm_rden = lsu_dccm_rden_d & io_addr_in_dccm_d; // @[el2_lsu_dccm_ctl.scala 218:22] + assign io_dccm_wr_addr_lo = io_ld_single_ecc_error_r_ff ? _T_285 : _T_289; // @[el2_lsu_dccm_ctl.scala 219:22] + assign io_dccm_wr_data_lo = io_ld_single_ecc_error_r_ff ? _T_311 : _T_319; // @[el2_lsu_dccm_ctl.scala 227:22] + assign io_dccm_rd_addr_lo = io_lsu_addr_d; // @[el2_lsu_dccm_ctl.scala 225:22] + assign io_dccm_wr_addr_hi = io_ld_single_ecc_error_r_ff ? _T_295 : _T_299; // @[el2_lsu_dccm_ctl.scala 222:22] + assign io_dccm_wr_data_hi = io_ld_single_ecc_error_r_ff ? _T_329 : _T_337; // @[el2_lsu_dccm_ctl.scala 233:22] + assign io_dccm_rd_addr_hi = io_end_addr_d; // @[el2_lsu_dccm_ctl.scala 226:22] + assign io_picm_wren = _T_579 | io_dma_pic_wen; // @[el2_lsu_dccm_ctl.scala 302:27] + assign io_picm_rden = _T_581 & io_addr_in_pic_d; // @[el2_lsu_dccm_ctl.scala 303:27] + assign io_picm_mken = _T_583 & io_addr_in_pic_d; // @[el2_lsu_dccm_ctl.scala 304:27] + assign io_picm_rdaddr = 32'hf00c0000 | _GEN_8; // @[el2_lsu_dccm_ctl.scala 306:27] + assign io_picm_wraddr = 32'hf00c0000 | _GEN_9; // @[el2_lsu_dccm_ctl.scala 307:27] + assign io_picm_wr_data = io_dma_pic_wen ? io_dma_mem_wdata[31:0] : io_store_datafn_lo_r; // @[el2_lsu_dccm_ctl.scala 309:27] + assign rvclkhdr_io_clk = io_clk; // @[beh_lib.scala 353:16] + assign rvclkhdr_io_en = io_ld_single_ecc_error_r; // @[beh_lib.scala 354:15] + assign rvclkhdr_io_scan_mode = io_scan_mode; // @[beh_lib.scala 355:22] + assign rvclkhdr_1_io_clk = io_clk; // @[beh_lib.scala 353:16] + assign rvclkhdr_1_io_en = io_ld_single_ecc_error_r; // @[beh_lib.scala 354:15] + assign rvclkhdr_1_io_scan_mode = io_scan_mode; // @[beh_lib.scala 355:22] +`ifdef RANDOMIZE_GARBAGE_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_INVALID_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_REG_INIT +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_MEM_INIT +`define RANDOMIZE +`endif +`ifndef RANDOM +`define RANDOM $random +`endif +`ifdef RANDOMIZE_MEM_INIT + integer initvar; +`endif +`ifndef SYNTHESIS +`ifdef FIRRTL_BEFORE_INITIAL +`FIRRTL_BEFORE_INITIAL +`endif +initial begin + `ifdef RANDOMIZE + `ifdef INIT_RANDOM + `INIT_RANDOM + `endif + `ifndef VERILATOR + `ifdef RANDOMIZE_DELAY + #`RANDOMIZE_DELAY begin end + `else + #0.002 begin end + `endif + `endif +`ifdef RANDOMIZE_REG_INIT + _RAND_0 = {2{`RANDOM}}; + _T_9 = _RAND_0[63:0]; + _RAND_1 = {1{`RANDOM}}; + lsu_double_ecc_error_r_ff = _RAND_1[0:0]; + _RAND_2 = {1{`RANDOM}}; + ld_single_ecc_error_hi_r_ff = _RAND_2[0:0]; + _RAND_3 = {1{`RANDOM}}; + ld_single_ecc_error_lo_r_ff = _RAND_3[0:0]; + _RAND_4 = {1{`RANDOM}}; + ld_sec_addr_hi_r_ff = _RAND_4[15:0]; + _RAND_5 = {1{`RANDOM}}; + ld_sec_addr_lo_r_ff = _RAND_5[15:0]; + _RAND_6 = {1{`RANDOM}}; + _T_431 = _RAND_6[31:0]; + _RAND_7 = {1{`RANDOM}}; + _T_472 = _RAND_7[31:0]; + _RAND_8 = {1{`RANDOM}}; + _T_603 = _RAND_8[0:0]; +`endif // RANDOMIZE_REG_INIT + if (reset) begin + _T_9 = 64'h0; + end + if (reset) begin + lsu_double_ecc_error_r_ff = 1'h0; + end + if (reset) begin + ld_single_ecc_error_hi_r_ff = 1'h0; + end + if (reset) begin + ld_single_ecc_error_lo_r_ff = 1'h0; + end + if (reset) begin + ld_sec_addr_hi_r_ff = 16'h0; + end + if (reset) begin + ld_sec_addr_lo_r_ff = 16'h0; + end + if (reset) begin + _T_603 = 1'h0; + end + `endif // RANDOMIZE +end // initial +`ifdef FIRRTL_AFTER_INITIAL +`FIRRTL_AFTER_INITIAL +`endif +`endif // SYNTHESIS + always @(posedge io_lsu_store_c1_r_clk) begin + _T_431 <= {_T_429,_T_428}; + _T_472 <= {_T_470,_T_469}; + end + always @(posedge io_lsu_c2_r_clk or posedge reset) begin + if (reset) begin + _T_9 <= 64'h0; + end else begin + _T_9 <= _T_8 >> _T_178; + end + end + always @(posedge io_lsu_free_c2_clk or posedge reset) begin + if (reset) begin + lsu_double_ecc_error_r_ff <= 1'h0; + end else begin + lsu_double_ecc_error_r_ff <= io_lsu_double_ecc_error_r; + end + end + always @(posedge io_lsu_free_c2_clk or posedge reset) begin + if (reset) begin + ld_single_ecc_error_hi_r_ff <= 1'h0; + end else begin + ld_single_ecc_error_hi_r_ff <= _T_245 & _T_246; + end + end + always @(posedge io_lsu_free_c2_clk or posedge reset) begin + if (reset) begin + ld_single_ecc_error_lo_r_ff <= 1'h0; + end else begin + ld_single_ecc_error_lo_r_ff <= _T_242 & _T_243; + end + end + always @(posedge rvclkhdr_io_l1clk or posedge reset) begin + if (reset) begin + ld_sec_addr_hi_r_ff <= 16'h0; + end else begin + ld_sec_addr_hi_r_ff <= io_end_addr_r; + end + end + always @(posedge rvclkhdr_1_io_l1clk or posedge reset) begin + if (reset) begin + ld_sec_addr_lo_r_ff <= 16'h0; + end else begin + ld_sec_addr_lo_r_ff <= io_lsu_addr_r; + end + end + always @(posedge io_lsu_c2_m_clk or posedge reset) begin + if (reset) begin + _T_603 <= 1'h0; + end else begin + _T_603 <= _T_260 & io_addr_in_dccm_d; + end + end +endmodule +module el2_lsu_stbuf( + input clock, + input reset, + input io_lsu_c1_m_clk, + input io_lsu_c1_r_clk, + input io_lsu_stbuf_c1_clk, + input io_lsu_free_c2_clk, + input io_lsu_pkt_m_store, + input io_lsu_pkt_m_dma, + input io_lsu_pkt_m_valid, + input io_lsu_pkt_r_by, + input io_lsu_pkt_r_half, + input io_lsu_pkt_r_word, + input io_lsu_pkt_r_dword, + input io_lsu_pkt_r_store, + input io_lsu_pkt_r_dma, + input io_lsu_pkt_r_valid, + input io_store_stbuf_reqvld_r, + input io_lsu_commit_r, + input io_dec_lsu_valid_raw_d, + input [31:0] io_store_data_hi_r, + input [31:0] io_store_data_lo_r, + input [31:0] io_store_datafn_hi_r, + input [31:0] io_store_datafn_lo_r, + input io_lsu_stbuf_commit_any, + input [15:0] io_lsu_addr_d, + input [31:0] io_lsu_addr_m, + input [31:0] io_lsu_addr_r, + input [15:0] io_end_addr_d, + input [31:0] io_end_addr_m, + input [31:0] io_end_addr_r, + input io_addr_in_dccm_m, + input io_addr_in_dccm_r, + output io_stbuf_reqvld_any, + output io_stbuf_reqvld_flushed_any, + output [15:0] io_stbuf_addr_any, + output [31:0] io_stbuf_data_any, + output io_lsu_stbuf_full_any, + output io_ldst_stbuf_reqvld_r, + output [31:0] io_stbuf_fwddata_hi_m, + output [31:0] io_stbuf_fwddata_lo_m, + output [3:0] io_stbuf_fwdbyteen_hi_m, + output [3:0] io_stbuf_fwdbyteen_lo_m +); +`ifdef RANDOMIZE_REG_INIT + reg [31:0] _RAND_0; + reg [31:0] _RAND_1; + reg [31:0] _RAND_2; + reg [31:0] _RAND_3; + reg [31:0] _RAND_4; + reg [31:0] _RAND_5; + reg [31:0] _RAND_6; + reg [31:0] _RAND_7; + reg [31:0] _RAND_8; + reg [31:0] _RAND_9; + reg [31:0] _RAND_10; + reg [31:0] _RAND_11; + reg [31:0] _RAND_12; + reg [31:0] _RAND_13; + reg [31:0] _RAND_14; + reg [31:0] _RAND_15; + reg [31:0] _RAND_16; + reg [31:0] _RAND_17; + reg [31:0] _RAND_18; + reg [31:0] _RAND_19; + reg [31:0] _RAND_20; + reg [31:0] _RAND_21; + reg [31:0] _RAND_22; + reg [31:0] _RAND_23; +`endif // RANDOMIZE_REG_INIT + wire [7:0] _T_1 = io_lsu_pkt_r_by ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_2 = _T_1 & 8'h1; // @[el2_lsu_stbuf.scala 108:49] + wire [7:0] _T_4 = io_lsu_pkt_r_half ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_5 = _T_4 & 8'h3; // @[el2_lsu_stbuf.scala 109:32] + wire [7:0] _T_6 = _T_2 | _T_5; // @[el2_lsu_stbuf.scala 108:65] + wire [7:0] _T_8 = io_lsu_pkt_r_word ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_9 = _T_8 & 8'hf; // @[el2_lsu_stbuf.scala 110:32] + wire [7:0] _T_10 = _T_6 | _T_9; // @[el2_lsu_stbuf.scala 109:48] + wire [7:0] _T_12 = io_lsu_pkt_r_dword ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] ldst_byteen_r = _T_10 | _T_12; // @[el2_lsu_stbuf.scala 110:48] + wire ldst_dual_d = io_lsu_addr_d[2] != io_end_addr_d[2]; // @[el2_lsu_stbuf.scala 112:40] + reg ldst_dual_r; // @[el2_lsu_stbuf.scala 161:53] + wire dual_stbuf_write_r = ldst_dual_r & io_store_stbuf_reqvld_r; // @[el2_lsu_stbuf.scala 113:41] + wire [10:0] _GEN_38 = {{3'd0}, ldst_byteen_r}; // @[el2_lsu_stbuf.scala 115:40] + wire [10:0] _T_17 = _GEN_38 << io_lsu_addr_r[1:0]; // @[el2_lsu_stbuf.scala 115:40] + wire [7:0] store_byteen_ext_r = _T_17[7:0]; // @[el2_lsu_stbuf.scala 115:23] + wire [3:0] _T_20 = io_lsu_pkt_m_store ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] + wire [3:0] store_byteen_hi_r = store_byteen_ext_r[7:4] & _T_20; // @[el2_lsu_stbuf.scala 116:53] + wire [3:0] store_byteen_lo_r = store_byteen_ext_r[3:0] & _T_20; // @[el2_lsu_stbuf.scala 117:53] + reg [1:0] RdPtr; // @[Reg.scala 27:20] + wire [1:0] NxtRdPtr = RdPtr + 2'h1; // @[el2_lsu_stbuf.scala 118:27] + reg [1:0] WrPtr; // @[Reg.scala 27:20] + wire [1:0] WrPtrPlus1 = WrPtr + 2'h1; // @[el2_lsu_stbuf.scala 119:27] + wire [1:0] WrPtrPlus2 = WrPtr + 2'h2; // @[el2_lsu_stbuf.scala 120:27] + reg [15:0] stbuf_addr_0; // @[Reg.scala 27:20] + wire _T_30 = stbuf_addr_0[15:2] == io_lsu_addr_r[15:2]; // @[el2_lsu_stbuf.scala 124:121] + reg stbuf_vld_0; // @[Reg.scala 27:20] + wire _T_31 = _T_30 & stbuf_vld_0; // @[el2_lsu_stbuf.scala 124:181] + reg stbuf_dma_kill_0; // @[Reg.scala 27:20] + wire _T_32 = ~stbuf_dma_kill_0; // @[el2_lsu_stbuf.scala 124:198] + wire _T_33 = _T_31 & _T_32; // @[el2_lsu_stbuf.scala 124:196] + wire _T_214 = io_lsu_stbuf_commit_any | io_stbuf_reqvld_flushed_any; // @[el2_lsu_stbuf.scala 132:78] + wire _T_215 = 2'h3 == RdPtr; // @[el2_lsu_stbuf.scala 132:121] + wire _T_217 = _T_214 & _T_215; // @[el2_lsu_stbuf.scala 132:109] + wire _T_211 = 2'h2 == RdPtr; // @[el2_lsu_stbuf.scala 132:121] + wire _T_213 = _T_214 & _T_211; // @[el2_lsu_stbuf.scala 132:109] + wire _T_207 = 2'h1 == RdPtr; // @[el2_lsu_stbuf.scala 132:121] + wire _T_209 = _T_214 & _T_207; // @[el2_lsu_stbuf.scala 132:109] + wire _T_203 = 2'h0 == RdPtr; // @[el2_lsu_stbuf.scala 132:121] + wire _T_205 = _T_214 & _T_203; // @[el2_lsu_stbuf.scala 132:109] + wire [3:0] stbuf_reset = {_T_217,_T_213,_T_209,_T_205}; // @[Cat.scala 29:58] + wire _T_35 = ~stbuf_reset[0]; // @[el2_lsu_stbuf.scala 124:219] + wire _T_36 = _T_33 & _T_35; // @[el2_lsu_stbuf.scala 124:217] + reg [15:0] stbuf_addr_1; // @[Reg.scala 27:20] + wire _T_39 = stbuf_addr_1[15:2] == io_lsu_addr_r[15:2]; // @[el2_lsu_stbuf.scala 124:121] + reg stbuf_vld_1; // @[Reg.scala 27:20] + wire _T_40 = _T_39 & stbuf_vld_1; // @[el2_lsu_stbuf.scala 124:181] + reg stbuf_dma_kill_1; // @[Reg.scala 27:20] + wire _T_41 = ~stbuf_dma_kill_1; // @[el2_lsu_stbuf.scala 124:198] + wire _T_42 = _T_40 & _T_41; // @[el2_lsu_stbuf.scala 124:196] + wire _T_44 = ~stbuf_reset[1]; // @[el2_lsu_stbuf.scala 124:219] + wire _T_45 = _T_42 & _T_44; // @[el2_lsu_stbuf.scala 124:217] + reg [15:0] stbuf_addr_2; // @[Reg.scala 27:20] + wire _T_48 = stbuf_addr_2[15:2] == io_lsu_addr_r[15:2]; // @[el2_lsu_stbuf.scala 124:121] + reg stbuf_vld_2; // @[Reg.scala 27:20] + wire _T_49 = _T_48 & stbuf_vld_2; // @[el2_lsu_stbuf.scala 124:181] + reg stbuf_dma_kill_2; // @[Reg.scala 27:20] + wire _T_50 = ~stbuf_dma_kill_2; // @[el2_lsu_stbuf.scala 124:198] + wire _T_51 = _T_49 & _T_50; // @[el2_lsu_stbuf.scala 124:196] + wire _T_53 = ~stbuf_reset[2]; // @[el2_lsu_stbuf.scala 124:219] + wire _T_54 = _T_51 & _T_53; // @[el2_lsu_stbuf.scala 124:217] + reg [15:0] stbuf_addr_3; // @[Reg.scala 27:20] + wire _T_57 = stbuf_addr_3[15:2] == io_lsu_addr_r[15:2]; // @[el2_lsu_stbuf.scala 124:121] + reg stbuf_vld_3; // @[Reg.scala 27:20] + wire _T_58 = _T_57 & stbuf_vld_3; // @[el2_lsu_stbuf.scala 124:181] + reg stbuf_dma_kill_3; // @[Reg.scala 27:20] + wire _T_59 = ~stbuf_dma_kill_3; // @[el2_lsu_stbuf.scala 124:198] + wire _T_60 = _T_58 & _T_59; // @[el2_lsu_stbuf.scala 124:196] + wire _T_62 = ~stbuf_reset[3]; // @[el2_lsu_stbuf.scala 124:219] + wire _T_63 = _T_60 & _T_62; // @[el2_lsu_stbuf.scala 124:217] + wire [3:0] store_matchvec_lo_r = {_T_63,_T_54,_T_45,_T_36}; // @[Cat.scala 29:58] + wire _T_68 = stbuf_addr_0[15:2] == io_end_addr_r[15:2]; // @[el2_lsu_stbuf.scala 125:121] + wire _T_69 = _T_68 & stbuf_vld_0; // @[el2_lsu_stbuf.scala 125:181] + wire _T_71 = _T_69 & _T_32; // @[el2_lsu_stbuf.scala 125:196] + wire _T_72 = _T_71 & dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 125:217] + wire _T_75 = _T_72 & _T_35; // @[el2_lsu_stbuf.scala 125:238] + wire _T_78 = stbuf_addr_1[15:2] == io_end_addr_r[15:2]; // @[el2_lsu_stbuf.scala 125:121] + wire _T_79 = _T_78 & stbuf_vld_1; // @[el2_lsu_stbuf.scala 125:181] + wire _T_81 = _T_79 & _T_41; // @[el2_lsu_stbuf.scala 125:196] + wire _T_82 = _T_81 & dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 125:217] + wire _T_85 = _T_82 & _T_44; // @[el2_lsu_stbuf.scala 125:238] + wire _T_88 = stbuf_addr_2[15:2] == io_end_addr_r[15:2]; // @[el2_lsu_stbuf.scala 125:121] + wire _T_89 = _T_88 & stbuf_vld_2; // @[el2_lsu_stbuf.scala 125:181] + wire _T_91 = _T_89 & _T_50; // @[el2_lsu_stbuf.scala 125:196] + wire _T_92 = _T_91 & dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 125:217] + wire _T_95 = _T_92 & _T_53; // @[el2_lsu_stbuf.scala 125:238] + wire _T_98 = stbuf_addr_3[15:2] == io_end_addr_r[15:2]; // @[el2_lsu_stbuf.scala 125:121] + wire _T_99 = _T_98 & stbuf_vld_3; // @[el2_lsu_stbuf.scala 125:181] + wire _T_101 = _T_99 & _T_59; // @[el2_lsu_stbuf.scala 125:196] + wire _T_102 = _T_101 & dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 125:217] + wire _T_105 = _T_102 & _T_62; // @[el2_lsu_stbuf.scala 125:238] + wire [3:0] store_matchvec_hi_r = {_T_105,_T_95,_T_85,_T_75}; // @[Cat.scala 29:58] + wire store_coalesce_lo_r = |store_matchvec_lo_r; // @[el2_lsu_stbuf.scala 127:50] + wire store_coalesce_hi_r = |store_matchvec_hi_r; // @[el2_lsu_stbuf.scala 128:50] + wire _T_108 = 2'h0 == WrPtr; // @[el2_lsu_stbuf.scala 130:92] + wire _T_110 = ~store_coalesce_lo_r; // @[el2_lsu_stbuf.scala 130:112] + wire _T_111 = _T_108 & _T_110; // @[el2_lsu_stbuf.scala 130:110] + wire _T_112 = io_ldst_stbuf_reqvld_r & _T_111; // @[el2_lsu_stbuf.scala 130:79] + wire _T_115 = ~dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 130:167] + wire _T_116 = _T_108 & _T_115; // @[el2_lsu_stbuf.scala 130:165] + wire _T_117 = ~store_coalesce_hi_r; // @[el2_lsu_stbuf.scala 130:189] + wire _T_118 = _T_116 & _T_117; // @[el2_lsu_stbuf.scala 130:187] + wire _T_119 = _T_112 | _T_118; // @[el2_lsu_stbuf.scala 130:134] + wire _T_120 = 2'h0 == WrPtrPlus1; // @[el2_lsu_stbuf.scala 131:17] + wire _T_122 = _T_120 & dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 131:40] + wire _T_123 = store_coalesce_lo_r | store_coalesce_hi_r; // @[el2_lsu_stbuf.scala 131:85] + wire _T_124 = ~_T_123; // @[el2_lsu_stbuf.scala 131:63] + wire _T_125 = _T_122 & _T_124; // @[el2_lsu_stbuf.scala 131:61] + wire _T_126 = _T_119 | _T_125; // @[el2_lsu_stbuf.scala 130:211] + wire _T_128 = _T_126 | store_matchvec_lo_r[0]; // @[el2_lsu_stbuf.scala 131:109] + wire _T_130 = _T_128 | store_matchvec_hi_r[0]; // @[el2_lsu_stbuf.scala 131:134] + wire _T_131 = 2'h1 == WrPtr; // @[el2_lsu_stbuf.scala 130:92] + wire _T_134 = _T_131 & _T_110; // @[el2_lsu_stbuf.scala 130:110] + wire _T_135 = io_ldst_stbuf_reqvld_r & _T_134; // @[el2_lsu_stbuf.scala 130:79] + wire _T_139 = _T_131 & _T_115; // @[el2_lsu_stbuf.scala 130:165] + wire _T_141 = _T_139 & _T_117; // @[el2_lsu_stbuf.scala 130:187] + wire _T_142 = _T_135 | _T_141; // @[el2_lsu_stbuf.scala 130:134] + wire _T_143 = 2'h1 == WrPtrPlus1; // @[el2_lsu_stbuf.scala 131:17] + wire _T_145 = _T_143 & dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 131:40] + wire _T_148 = _T_145 & _T_124; // @[el2_lsu_stbuf.scala 131:61] + wire _T_149 = _T_142 | _T_148; // @[el2_lsu_stbuf.scala 130:211] + wire _T_151 = _T_149 | store_matchvec_lo_r[1]; // @[el2_lsu_stbuf.scala 131:109] + wire _T_153 = _T_151 | store_matchvec_hi_r[1]; // @[el2_lsu_stbuf.scala 131:134] + wire _T_154 = 2'h2 == WrPtr; // @[el2_lsu_stbuf.scala 130:92] + wire _T_157 = _T_154 & _T_110; // @[el2_lsu_stbuf.scala 130:110] + wire _T_158 = io_ldst_stbuf_reqvld_r & _T_157; // @[el2_lsu_stbuf.scala 130:79] + wire _T_162 = _T_154 & _T_115; // @[el2_lsu_stbuf.scala 130:165] + wire _T_164 = _T_162 & _T_117; // @[el2_lsu_stbuf.scala 130:187] + wire _T_165 = _T_158 | _T_164; // @[el2_lsu_stbuf.scala 130:134] + wire _T_166 = 2'h2 == WrPtrPlus1; // @[el2_lsu_stbuf.scala 131:17] + wire _T_168 = _T_166 & dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 131:40] + wire _T_171 = _T_168 & _T_124; // @[el2_lsu_stbuf.scala 131:61] + wire _T_172 = _T_165 | _T_171; // @[el2_lsu_stbuf.scala 130:211] + wire _T_174 = _T_172 | store_matchvec_lo_r[2]; // @[el2_lsu_stbuf.scala 131:109] + wire _T_176 = _T_174 | store_matchvec_hi_r[2]; // @[el2_lsu_stbuf.scala 131:134] + wire _T_177 = 2'h3 == WrPtr; // @[el2_lsu_stbuf.scala 130:92] + wire _T_180 = _T_177 & _T_110; // @[el2_lsu_stbuf.scala 130:110] + wire _T_181 = io_ldst_stbuf_reqvld_r & _T_180; // @[el2_lsu_stbuf.scala 130:79] + wire _T_185 = _T_177 & _T_115; // @[el2_lsu_stbuf.scala 130:165] + wire _T_187 = _T_185 & _T_117; // @[el2_lsu_stbuf.scala 130:187] + wire _T_188 = _T_181 | _T_187; // @[el2_lsu_stbuf.scala 130:134] + wire _T_189 = 2'h3 == WrPtrPlus1; // @[el2_lsu_stbuf.scala 131:17] + wire _T_191 = _T_189 & dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 131:40] + wire _T_194 = _T_191 & _T_124; // @[el2_lsu_stbuf.scala 131:61] + wire _T_195 = _T_188 | _T_194; // @[el2_lsu_stbuf.scala 130:211] + wire _T_197 = _T_195 | store_matchvec_lo_r[3]; // @[el2_lsu_stbuf.scala 131:109] + wire _T_199 = _T_197 | store_matchvec_hi_r[3]; // @[el2_lsu_stbuf.scala 131:134] + wire [3:0] stbuf_wr_en = {_T_199,_T_176,_T_153,_T_130}; // @[Cat.scala 29:58] + wire _T_221 = ~ldst_dual_r; // @[el2_lsu_stbuf.scala 133:52] + wire _T_222 = _T_221 | io_store_stbuf_reqvld_r; // @[el2_lsu_stbuf.scala 133:65] + wire _T_225 = _T_222 & _T_108; // @[el2_lsu_stbuf.scala 133:92] + wire _T_227 = _T_225 & _T_110; // @[el2_lsu_stbuf.scala 133:122] + wire _T_229 = _T_227 | store_matchvec_lo_r[0]; // @[el2_lsu_stbuf.scala 133:145] + wire _T_234 = _T_222 & _T_131; // @[el2_lsu_stbuf.scala 133:92] + wire _T_236 = _T_234 & _T_110; // @[el2_lsu_stbuf.scala 133:122] + wire _T_238 = _T_236 | store_matchvec_lo_r[1]; // @[el2_lsu_stbuf.scala 133:145] + wire _T_243 = _T_222 & _T_154; // @[el2_lsu_stbuf.scala 133:92] + wire _T_245 = _T_243 & _T_110; // @[el2_lsu_stbuf.scala 133:122] + wire _T_247 = _T_245 | store_matchvec_lo_r[2]; // @[el2_lsu_stbuf.scala 133:145] + wire _T_252 = _T_222 & _T_177; // @[el2_lsu_stbuf.scala 133:92] + wire _T_254 = _T_252 & _T_110; // @[el2_lsu_stbuf.scala 133:122] + wire _T_256 = _T_254 | store_matchvec_lo_r[3]; // @[el2_lsu_stbuf.scala 133:145] + wire [3:0] sel_lo = {_T_256,_T_247,_T_238,_T_229}; // @[Cat.scala 29:58] + wire [31:0] _T_260 = sel_lo[0] ? io_lsu_addr_r : io_end_addr_r; // @[el2_lsu_stbuf.scala 135:57] + wire [31:0] _T_262 = sel_lo[1] ? io_lsu_addr_r : io_end_addr_r; // @[el2_lsu_stbuf.scala 135:57] + wire [31:0] _T_264 = sel_lo[2] ? io_lsu_addr_r : io_end_addr_r; // @[el2_lsu_stbuf.scala 135:57] + wire [31:0] _T_266 = sel_lo[3] ? io_lsu_addr_r : io_end_addr_r; // @[el2_lsu_stbuf.scala 135:57] + reg [3:0] stbuf_byteen_0; // @[Reg.scala 27:20] + wire [3:0] _T_268 = stbuf_byteen_0 | store_byteen_lo_r; // @[el2_lsu_stbuf.scala 136:87] + wire [3:0] _T_269 = stbuf_byteen_0 | store_byteen_hi_r; // @[el2_lsu_stbuf.scala 136:124] + wire [3:0] stbuf_byteenin_3 = sel_lo[0] ? _T_268 : _T_269; // @[el2_lsu_stbuf.scala 136:59] + reg [3:0] stbuf_byteen_1; // @[Reg.scala 27:20] + wire [3:0] _T_272 = stbuf_byteen_1 | store_byteen_lo_r; // @[el2_lsu_stbuf.scala 136:87] + wire [3:0] _T_273 = stbuf_byteen_1 | store_byteen_hi_r; // @[el2_lsu_stbuf.scala 136:124] + wire [3:0] stbuf_byteenin_2 = sel_lo[1] ? _T_272 : _T_273; // @[el2_lsu_stbuf.scala 136:59] + reg [3:0] stbuf_byteen_2; // @[Reg.scala 27:20] + wire [3:0] _T_276 = stbuf_byteen_2 | store_byteen_lo_r; // @[el2_lsu_stbuf.scala 136:87] + wire [3:0] _T_277 = stbuf_byteen_2 | store_byteen_hi_r; // @[el2_lsu_stbuf.scala 136:124] + wire [3:0] stbuf_byteenin_1 = sel_lo[2] ? _T_276 : _T_277; // @[el2_lsu_stbuf.scala 136:59] + reg [3:0] stbuf_byteen_3; // @[Reg.scala 27:20] + wire [3:0] _T_280 = stbuf_byteen_3 | store_byteen_lo_r; // @[el2_lsu_stbuf.scala 136:87] + wire [3:0] _T_281 = stbuf_byteen_3 | store_byteen_hi_r; // @[el2_lsu_stbuf.scala 136:124] + wire [3:0] stbuf_byteenin_0 = sel_lo[3] ? _T_280 : _T_281; // @[el2_lsu_stbuf.scala 136:59] + wire _T_285 = ~stbuf_byteen_0[0]; // @[el2_lsu_stbuf.scala 138:68] + wire _T_287 = _T_285 | store_byteen_lo_r[0]; // @[el2_lsu_stbuf.scala 138:88] + reg [31:0] stbuf_data_0; // @[Reg.scala 27:20] + wire [7:0] _T_290 = _T_287 ? io_store_datafn_lo_r[7:0] : stbuf_data_0[7:0]; // @[el2_lsu_stbuf.scala 138:67] + wire _T_294 = _T_285 | store_byteen_hi_r[0]; // @[el2_lsu_stbuf.scala 139:31] + wire [7:0] _T_297 = _T_294 ? io_store_datafn_hi_r[7:0] : stbuf_data_0[7:0]; // @[el2_lsu_stbuf.scala 139:10] + wire [7:0] datain1_3 = sel_lo[0] ? _T_290 : _T_297; // @[el2_lsu_stbuf.scala 138:52] + wire _T_301 = ~stbuf_byteen_1[0]; // @[el2_lsu_stbuf.scala 138:68] + wire _T_303 = _T_301 | store_byteen_lo_r[0]; // @[el2_lsu_stbuf.scala 138:88] + reg [31:0] stbuf_data_1; // @[Reg.scala 27:20] + wire [7:0] _T_306 = _T_303 ? io_store_datafn_lo_r[7:0] : stbuf_data_1[7:0]; // @[el2_lsu_stbuf.scala 138:67] + wire _T_310 = _T_301 | store_byteen_hi_r[0]; // @[el2_lsu_stbuf.scala 139:31] + wire [7:0] _T_313 = _T_310 ? io_store_datafn_hi_r[7:0] : stbuf_data_1[7:0]; // @[el2_lsu_stbuf.scala 139:10] + wire [7:0] datain1_2 = sel_lo[1] ? _T_306 : _T_313; // @[el2_lsu_stbuf.scala 138:52] + wire _T_317 = ~stbuf_byteen_2[0]; // @[el2_lsu_stbuf.scala 138:68] + wire _T_319 = _T_317 | store_byteen_lo_r[0]; // @[el2_lsu_stbuf.scala 138:88] + reg [31:0] stbuf_data_2; // @[Reg.scala 27:20] + wire [7:0] _T_322 = _T_319 ? io_store_datafn_lo_r[7:0] : stbuf_data_2[7:0]; // @[el2_lsu_stbuf.scala 138:67] + wire _T_326 = _T_317 | store_byteen_hi_r[0]; // @[el2_lsu_stbuf.scala 139:31] + wire [7:0] _T_329 = _T_326 ? io_store_datafn_hi_r[7:0] : stbuf_data_2[7:0]; // @[el2_lsu_stbuf.scala 139:10] + wire [7:0] datain1_1 = sel_lo[2] ? _T_322 : _T_329; // @[el2_lsu_stbuf.scala 138:52] + wire _T_333 = ~stbuf_byteen_3[0]; // @[el2_lsu_stbuf.scala 138:68] + wire _T_335 = _T_333 | store_byteen_lo_r[0]; // @[el2_lsu_stbuf.scala 138:88] + reg [31:0] stbuf_data_3; // @[Reg.scala 27:20] + wire [7:0] _T_338 = _T_335 ? io_store_datafn_lo_r[7:0] : stbuf_data_3[7:0]; // @[el2_lsu_stbuf.scala 138:67] + wire _T_342 = _T_333 | store_byteen_hi_r[0]; // @[el2_lsu_stbuf.scala 139:31] + wire [7:0] _T_345 = _T_342 ? io_store_datafn_hi_r[7:0] : stbuf_data_3[7:0]; // @[el2_lsu_stbuf.scala 139:10] + wire [7:0] datain1_0 = sel_lo[3] ? _T_338 : _T_345; // @[el2_lsu_stbuf.scala 138:52] + wire _T_349 = ~stbuf_byteen_0[1]; // @[el2_lsu_stbuf.scala 141:69] + wire _T_351 = _T_349 | store_byteen_lo_r[1]; // @[el2_lsu_stbuf.scala 141:89] + wire [7:0] _T_354 = _T_351 ? io_store_datafn_lo_r[15:8] : stbuf_data_0[15:8]; // @[el2_lsu_stbuf.scala 141:68] + wire _T_358 = _T_349 | store_byteen_hi_r[1]; // @[el2_lsu_stbuf.scala 142:31] + wire [7:0] _T_361 = _T_358 ? io_store_datafn_hi_r[15:8] : stbuf_data_0[15:8]; // @[el2_lsu_stbuf.scala 142:10] + wire [7:0] datain2_3 = sel_lo[0] ? _T_354 : _T_361; // @[el2_lsu_stbuf.scala 141:53] + wire _T_365 = ~stbuf_byteen_1[1]; // @[el2_lsu_stbuf.scala 141:69] + wire _T_367 = _T_365 | store_byteen_lo_r[1]; // @[el2_lsu_stbuf.scala 141:89] + wire [7:0] _T_370 = _T_367 ? io_store_datafn_lo_r[15:8] : stbuf_data_1[15:8]; // @[el2_lsu_stbuf.scala 141:68] + wire _T_374 = _T_365 | store_byteen_hi_r[1]; // @[el2_lsu_stbuf.scala 142:31] + wire [7:0] _T_377 = _T_374 ? io_store_datafn_hi_r[15:8] : stbuf_data_1[15:8]; // @[el2_lsu_stbuf.scala 142:10] + wire [7:0] datain2_2 = sel_lo[1] ? _T_370 : _T_377; // @[el2_lsu_stbuf.scala 141:53] + wire _T_381 = ~stbuf_byteen_2[1]; // @[el2_lsu_stbuf.scala 141:69] + wire _T_383 = _T_381 | store_byteen_lo_r[1]; // @[el2_lsu_stbuf.scala 141:89] + wire [7:0] _T_386 = _T_383 ? io_store_datafn_lo_r[15:8] : stbuf_data_2[15:8]; // @[el2_lsu_stbuf.scala 141:68] + wire _T_390 = _T_381 | store_byteen_hi_r[1]; // @[el2_lsu_stbuf.scala 142:31] + wire [7:0] _T_393 = _T_390 ? io_store_datafn_hi_r[15:8] : stbuf_data_2[15:8]; // @[el2_lsu_stbuf.scala 142:10] + wire [7:0] datain2_1 = sel_lo[2] ? _T_386 : _T_393; // @[el2_lsu_stbuf.scala 141:53] + wire _T_397 = ~stbuf_byteen_3[1]; // @[el2_lsu_stbuf.scala 141:69] + wire _T_399 = _T_397 | store_byteen_lo_r[1]; // @[el2_lsu_stbuf.scala 141:89] + wire [7:0] _T_402 = _T_399 ? io_store_datafn_lo_r[15:8] : stbuf_data_3[15:8]; // @[el2_lsu_stbuf.scala 141:68] + wire _T_406 = _T_397 | store_byteen_hi_r[1]; // @[el2_lsu_stbuf.scala 142:31] + wire [7:0] _T_409 = _T_406 ? io_store_datafn_hi_r[15:8] : stbuf_data_3[15:8]; // @[el2_lsu_stbuf.scala 142:10] + wire [7:0] datain2_0 = sel_lo[3] ? _T_402 : _T_409; // @[el2_lsu_stbuf.scala 141:53] + wire _T_413 = ~stbuf_byteen_0[2]; // @[el2_lsu_stbuf.scala 144:69] + wire _T_415 = _T_413 | store_byteen_lo_r[2]; // @[el2_lsu_stbuf.scala 144:89] + wire [7:0] _T_418 = _T_415 ? io_store_datafn_lo_r[23:16] : stbuf_data_0[23:16]; // @[el2_lsu_stbuf.scala 144:68] + wire _T_422 = _T_413 | store_byteen_hi_r[2]; // @[el2_lsu_stbuf.scala 145:31] + wire [7:0] _T_425 = _T_422 ? io_store_datafn_hi_r[23:16] : stbuf_data_0[23:16]; // @[el2_lsu_stbuf.scala 145:10] + wire [7:0] datain3_3 = sel_lo[0] ? _T_418 : _T_425; // @[el2_lsu_stbuf.scala 144:53] + wire _T_429 = ~stbuf_byteen_1[2]; // @[el2_lsu_stbuf.scala 144:69] + wire _T_431 = _T_429 | store_byteen_lo_r[2]; // @[el2_lsu_stbuf.scala 144:89] + wire [7:0] _T_434 = _T_431 ? io_store_datafn_lo_r[23:16] : stbuf_data_1[23:16]; // @[el2_lsu_stbuf.scala 144:68] + wire _T_438 = _T_429 | store_byteen_hi_r[2]; // @[el2_lsu_stbuf.scala 145:31] + wire [7:0] _T_441 = _T_438 ? io_store_datafn_hi_r[23:16] : stbuf_data_1[23:16]; // @[el2_lsu_stbuf.scala 145:10] + wire [7:0] datain3_2 = sel_lo[1] ? _T_434 : _T_441; // @[el2_lsu_stbuf.scala 144:53] + wire _T_445 = ~stbuf_byteen_2[2]; // @[el2_lsu_stbuf.scala 144:69] + wire _T_447 = _T_445 | store_byteen_lo_r[2]; // @[el2_lsu_stbuf.scala 144:89] + wire [7:0] _T_450 = _T_447 ? io_store_datafn_lo_r[23:16] : stbuf_data_2[23:16]; // @[el2_lsu_stbuf.scala 144:68] + wire _T_454 = _T_445 | store_byteen_hi_r[2]; // @[el2_lsu_stbuf.scala 145:31] + wire [7:0] _T_457 = _T_454 ? io_store_datafn_hi_r[23:16] : stbuf_data_2[23:16]; // @[el2_lsu_stbuf.scala 145:10] + wire [7:0] datain3_1 = sel_lo[2] ? _T_450 : _T_457; // @[el2_lsu_stbuf.scala 144:53] + wire _T_461 = ~stbuf_byteen_3[2]; // @[el2_lsu_stbuf.scala 144:69] + wire _T_463 = _T_461 | store_byteen_lo_r[2]; // @[el2_lsu_stbuf.scala 144:89] + wire [7:0] _T_466 = _T_463 ? io_store_datafn_lo_r[23:16] : stbuf_data_3[23:16]; // @[el2_lsu_stbuf.scala 144:68] + wire _T_470 = _T_461 | store_byteen_hi_r[2]; // @[el2_lsu_stbuf.scala 145:31] + wire [7:0] _T_473 = _T_470 ? io_store_datafn_hi_r[23:16] : stbuf_data_3[23:16]; // @[el2_lsu_stbuf.scala 145:10] + wire [7:0] datain3_0 = sel_lo[3] ? _T_466 : _T_473; // @[el2_lsu_stbuf.scala 144:53] + wire _T_477 = ~stbuf_byteen_0[3]; // @[el2_lsu_stbuf.scala 147:69] + wire _T_479 = _T_477 | store_byteen_lo_r[3]; // @[el2_lsu_stbuf.scala 147:89] + wire [7:0] _T_482 = _T_479 ? io_store_datafn_lo_r[31:24] : stbuf_data_0[31:24]; // @[el2_lsu_stbuf.scala 147:68] + wire _T_486 = _T_477 | store_byteen_hi_r[3]; // @[el2_lsu_stbuf.scala 148:31] + wire [7:0] _T_489 = _T_486 ? io_store_datafn_hi_r[31:24] : stbuf_data_0[31:24]; // @[el2_lsu_stbuf.scala 148:10] + wire [7:0] datain4_3 = sel_lo[0] ? _T_482 : _T_489; // @[el2_lsu_stbuf.scala 147:53] + wire _T_493 = ~stbuf_byteen_1[3]; // @[el2_lsu_stbuf.scala 147:69] + wire _T_495 = _T_493 | store_byteen_lo_r[3]; // @[el2_lsu_stbuf.scala 147:89] + wire [7:0] _T_498 = _T_495 ? io_store_datafn_lo_r[31:24] : stbuf_data_1[31:24]; // @[el2_lsu_stbuf.scala 147:68] + wire _T_502 = _T_493 | store_byteen_hi_r[3]; // @[el2_lsu_stbuf.scala 148:31] + wire [7:0] _T_505 = _T_502 ? io_store_datafn_hi_r[31:24] : stbuf_data_1[31:24]; // @[el2_lsu_stbuf.scala 148:10] + wire [7:0] datain4_2 = sel_lo[1] ? _T_498 : _T_505; // @[el2_lsu_stbuf.scala 147:53] + wire _T_509 = ~stbuf_byteen_2[3]; // @[el2_lsu_stbuf.scala 147:69] + wire _T_511 = _T_509 | store_byteen_lo_r[3]; // @[el2_lsu_stbuf.scala 147:89] + wire [7:0] _T_514 = _T_511 ? io_store_datafn_lo_r[31:24] : stbuf_data_2[31:24]; // @[el2_lsu_stbuf.scala 147:68] + wire _T_518 = _T_509 | store_byteen_hi_r[3]; // @[el2_lsu_stbuf.scala 148:31] + wire [7:0] _T_521 = _T_518 ? io_store_datafn_hi_r[31:24] : stbuf_data_2[31:24]; // @[el2_lsu_stbuf.scala 148:10] + wire [7:0] datain4_1 = sel_lo[2] ? _T_514 : _T_521; // @[el2_lsu_stbuf.scala 147:53] + wire _T_525 = ~stbuf_byteen_3[3]; // @[el2_lsu_stbuf.scala 147:69] + wire _T_527 = _T_525 | store_byteen_lo_r[3]; // @[el2_lsu_stbuf.scala 147:89] + wire [7:0] _T_530 = _T_527 ? io_store_datafn_lo_r[31:24] : stbuf_data_3[31:24]; // @[el2_lsu_stbuf.scala 147:68] + wire _T_534 = _T_525 | store_byteen_hi_r[3]; // @[el2_lsu_stbuf.scala 148:31] + wire [7:0] _T_537 = _T_534 ? io_store_datafn_hi_r[31:24] : stbuf_data_3[31:24]; // @[el2_lsu_stbuf.scala 148:10] + wire [7:0] datain4_0 = sel_lo[3] ? _T_530 : _T_537; // @[el2_lsu_stbuf.scala 147:53] + wire [31:0] stbuf_datain_0 = {datain4_0,datain3_0,datain2_0,datain1_0}; // @[Cat.scala 29:58] + wire [31:0] stbuf_datain_1 = {datain4_1,datain3_1,datain2_1,datain1_1}; // @[Cat.scala 29:58] + wire [31:0] stbuf_datain_2 = {datain4_2,datain3_2,datain2_2,datain1_2}; // @[Cat.scala 29:58] + wire [31:0] stbuf_datain_3 = {datain4_3,datain3_3,datain2_3,datain1_3}; // @[Cat.scala 29:58] + wire [15:0] cmpaddr_hi_m = {{2'd0}, io_end_addr_m[15:2]}; // @[el2_lsu_stbuf.scala 187:17] + wire _T_721 = stbuf_addr_3[15:2] == cmpaddr_hi_m[15:2]; // @[el2_lsu_stbuf.scala 193:116] + wire _T_722 = _T_721 & stbuf_vld_3; // @[el2_lsu_stbuf.scala 193:175] + wire _T_724 = _T_722 & _T_59; // @[el2_lsu_stbuf.scala 193:190] + wire _T_725 = _T_724 & io_addr_in_dccm_m; // @[el2_lsu_stbuf.scala 193:211] + wire _T_714 = stbuf_addr_2[15:2] == cmpaddr_hi_m[15:2]; // @[el2_lsu_stbuf.scala 193:116] + wire _T_715 = _T_714 & stbuf_vld_2; // @[el2_lsu_stbuf.scala 193:175] + wire _T_717 = _T_715 & _T_50; // @[el2_lsu_stbuf.scala 193:190] + wire _T_718 = _T_717 & io_addr_in_dccm_m; // @[el2_lsu_stbuf.scala 193:211] + wire _T_707 = stbuf_addr_1[15:2] == cmpaddr_hi_m[15:2]; // @[el2_lsu_stbuf.scala 193:116] + wire _T_708 = _T_707 & stbuf_vld_1; // @[el2_lsu_stbuf.scala 193:175] + wire _T_710 = _T_708 & _T_41; // @[el2_lsu_stbuf.scala 193:190] + wire _T_711 = _T_710 & io_addr_in_dccm_m; // @[el2_lsu_stbuf.scala 193:211] + wire _T_700 = stbuf_addr_0[15:2] == cmpaddr_hi_m[15:2]; // @[el2_lsu_stbuf.scala 193:116] + wire _T_701 = _T_700 & stbuf_vld_0; // @[el2_lsu_stbuf.scala 193:175] + wire _T_703 = _T_701 & _T_32; // @[el2_lsu_stbuf.scala 193:190] + wire _T_704 = _T_703 & io_addr_in_dccm_m; // @[el2_lsu_stbuf.scala 193:211] + wire [3:0] stbuf_match_hi = {_T_725,_T_718,_T_711,_T_704}; // @[Cat.scala 29:58] + wire [15:0] cmpaddr_lo_m = {{2'd0}, io_lsu_addr_m[15:2]}; // @[el2_lsu_stbuf.scala 190:18] + wire _T_751 = stbuf_addr_3[15:2] == cmpaddr_lo_m[15:2]; // @[el2_lsu_stbuf.scala 194:116] + wire _T_752 = _T_751 & stbuf_vld_3; // @[el2_lsu_stbuf.scala 194:175] + wire _T_754 = _T_752 & _T_59; // @[el2_lsu_stbuf.scala 194:190] + wire _T_755 = _T_754 & io_addr_in_dccm_m; // @[el2_lsu_stbuf.scala 194:211] + wire _T_744 = stbuf_addr_2[15:2] == cmpaddr_lo_m[15:2]; // @[el2_lsu_stbuf.scala 194:116] + wire _T_745 = _T_744 & stbuf_vld_2; // @[el2_lsu_stbuf.scala 194:175] + wire _T_747 = _T_745 & _T_50; // @[el2_lsu_stbuf.scala 194:190] + wire _T_748 = _T_747 & io_addr_in_dccm_m; // @[el2_lsu_stbuf.scala 194:211] + wire _T_737 = stbuf_addr_1[15:2] == cmpaddr_lo_m[15:2]; // @[el2_lsu_stbuf.scala 194:116] + wire _T_738 = _T_737 & stbuf_vld_1; // @[el2_lsu_stbuf.scala 194:175] + wire _T_740 = _T_738 & _T_41; // @[el2_lsu_stbuf.scala 194:190] + wire _T_741 = _T_740 & io_addr_in_dccm_m; // @[el2_lsu_stbuf.scala 194:211] + wire _T_730 = stbuf_addr_0[15:2] == cmpaddr_lo_m[15:2]; // @[el2_lsu_stbuf.scala 194:116] + wire _T_731 = _T_730 & stbuf_vld_0; // @[el2_lsu_stbuf.scala 194:175] + wire _T_733 = _T_731 & _T_32; // @[el2_lsu_stbuf.scala 194:190] + wire _T_734 = _T_733 & io_addr_in_dccm_m; // @[el2_lsu_stbuf.scala 194:211] + wire [3:0] stbuf_match_lo = {_T_755,_T_748,_T_741,_T_734}; // @[Cat.scala 29:58] + wire _T_778 = stbuf_match_hi[3] | stbuf_match_lo[3]; // @[el2_lsu_stbuf.scala 195:79] + wire _T_779 = _T_778 & io_lsu_pkt_m_valid; // @[el2_lsu_stbuf.scala 195:100] + wire _T_780 = _T_779 & io_lsu_pkt_m_dma; // @[el2_lsu_stbuf.scala 195:121] + wire _T_781 = _T_780 & io_lsu_pkt_m_store; // @[el2_lsu_stbuf.scala 195:140] + wire _T_772 = stbuf_match_hi[2] | stbuf_match_lo[2]; // @[el2_lsu_stbuf.scala 195:79] + wire _T_773 = _T_772 & io_lsu_pkt_m_valid; // @[el2_lsu_stbuf.scala 195:100] + wire _T_774 = _T_773 & io_lsu_pkt_m_dma; // @[el2_lsu_stbuf.scala 195:121] + wire _T_775 = _T_774 & io_lsu_pkt_m_store; // @[el2_lsu_stbuf.scala 195:140] + wire _T_766 = stbuf_match_hi[1] | stbuf_match_lo[1]; // @[el2_lsu_stbuf.scala 195:79] + wire _T_767 = _T_766 & io_lsu_pkt_m_valid; // @[el2_lsu_stbuf.scala 195:100] + wire _T_768 = _T_767 & io_lsu_pkt_m_dma; // @[el2_lsu_stbuf.scala 195:121] + wire _T_769 = _T_768 & io_lsu_pkt_m_store; // @[el2_lsu_stbuf.scala 195:140] + wire _T_760 = stbuf_match_hi[0] | stbuf_match_lo[0]; // @[el2_lsu_stbuf.scala 195:79] + wire _T_761 = _T_760 & io_lsu_pkt_m_valid; // @[el2_lsu_stbuf.scala 195:100] + wire _T_762 = _T_761 & io_lsu_pkt_m_dma; // @[el2_lsu_stbuf.scala 195:121] + wire _T_763 = _T_762 & io_lsu_pkt_m_store; // @[el2_lsu_stbuf.scala 195:140] + wire [3:0] stbuf_dma_kill_en = {_T_781,_T_775,_T_769,_T_763}; // @[Cat.scala 29:58] + wire [15:0] stbuf_addrin_0 = _T_266[15:0]; // @[el2_lsu_stbuf.scala 74:39 el2_lsu_stbuf.scala 75:17 el2_lsu_stbuf.scala 135:17] + wire [3:0] _T_567 = _T_35 ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] + wire [3:0] _T_568 = stbuf_byteenin_0 & _T_567; // @[el2_lsu_stbuf.scala 157:87] + wire [15:0] stbuf_addrin_1 = _T_264[15:0]; // @[el2_lsu_stbuf.scala 74:39 el2_lsu_stbuf.scala 75:17 el2_lsu_stbuf.scala 135:17] + wire [3:0] _T_589 = _T_44 ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] + wire [3:0] _T_590 = stbuf_byteenin_1 & _T_589; // @[el2_lsu_stbuf.scala 157:87] + wire [15:0] stbuf_addrin_2 = _T_262[15:0]; // @[el2_lsu_stbuf.scala 74:39 el2_lsu_stbuf.scala 75:17 el2_lsu_stbuf.scala 135:17] + wire [3:0] _T_611 = _T_53 ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] + wire [3:0] _T_612 = stbuf_byteenin_2 & _T_611; // @[el2_lsu_stbuf.scala 157:87] + wire [15:0] stbuf_addrin_3 = _T_260[15:0]; // @[el2_lsu_stbuf.scala 74:39 el2_lsu_stbuf.scala 75:17 el2_lsu_stbuf.scala 135:17] + wire [3:0] _T_633 = _T_62 ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] + wire [3:0] _T_634 = stbuf_byteenin_3 & _T_633; // @[el2_lsu_stbuf.scala 157:87] + reg ldst_dual_m; // @[el2_lsu_stbuf.scala 160:53] + wire _GEN_21 = 2'h1 == RdPtr ? stbuf_vld_1 : stbuf_vld_0; // @[el2_lsu_stbuf.scala 164:52] + wire _GEN_22 = 2'h2 == RdPtr ? stbuf_vld_2 : _GEN_21; // @[el2_lsu_stbuf.scala 164:52] + wire _GEN_23 = 2'h3 == RdPtr ? stbuf_vld_3 : _GEN_22; // @[el2_lsu_stbuf.scala 164:52] + wire _GEN_25 = 2'h1 == RdPtr ? stbuf_dma_kill_1 : stbuf_dma_kill_0; // @[el2_lsu_stbuf.scala 164:52] + wire _GEN_26 = 2'h2 == RdPtr ? stbuf_dma_kill_2 : _GEN_25; // @[el2_lsu_stbuf.scala 164:52] + wire _GEN_27 = 2'h3 == RdPtr ? stbuf_dma_kill_3 : _GEN_26; // @[el2_lsu_stbuf.scala 164:52] + wire _T_642 = ~_GEN_27; // @[el2_lsu_stbuf.scala 165:47] + wire _T_643 = _GEN_23 & _T_642; // @[el2_lsu_stbuf.scala 165:45] + wire _T_644 = |stbuf_dma_kill_en; // @[el2_lsu_stbuf.scala 165:91] + wire _T_645 = ~_T_644; // @[el2_lsu_stbuf.scala 165:72] + wire [15:0] _GEN_29 = 2'h1 == RdPtr ? stbuf_addr_1 : stbuf_addr_0; // @[el2_lsu_stbuf.scala 166:23] + wire [15:0] _GEN_30 = 2'h2 == RdPtr ? stbuf_addr_2 : _GEN_29; // @[el2_lsu_stbuf.scala 166:23] + wire [31:0] _GEN_33 = 2'h1 == RdPtr ? stbuf_data_1 : stbuf_data_0; // @[el2_lsu_stbuf.scala 167:23] + wire [31:0] _GEN_34 = 2'h2 == RdPtr ? stbuf_data_2 : _GEN_33; // @[el2_lsu_stbuf.scala 167:23] + wire _T_648 = io_ldst_stbuf_reqvld_r & _T_115; // @[el2_lsu_stbuf.scala 169:43] + wire _T_649 = store_coalesce_hi_r | store_coalesce_lo_r; // @[el2_lsu_stbuf.scala 169:89] + wire _T_650 = ~_T_649; // @[el2_lsu_stbuf.scala 169:67] + wire _T_651 = _T_648 & _T_650; // @[el2_lsu_stbuf.scala 169:65] + wire _T_652 = io_ldst_stbuf_reqvld_r & dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 170:31] + wire _T_653 = store_coalesce_hi_r & store_coalesce_lo_r; // @[el2_lsu_stbuf.scala 170:77] + wire _T_654 = ~_T_653; // @[el2_lsu_stbuf.scala 170:55] + wire _T_655 = _T_652 & _T_654; // @[el2_lsu_stbuf.scala 170:53] + wire WrPtrEn = _T_651 | _T_655; // @[el2_lsu_stbuf.scala 169:114] + wire _T_660 = _T_652 & _T_650; // @[el2_lsu_stbuf.scala 171:68] + wire [3:0] _T_662 = {3'h0,stbuf_vld_0}; // @[Cat.scala 29:58] + wire [3:0] _T_663 = {3'h0,stbuf_vld_1}; // @[Cat.scala 29:58] + wire [3:0] _T_664 = {3'h0,stbuf_vld_2}; // @[Cat.scala 29:58] + wire [3:0] _T_665 = {3'h0,stbuf_vld_3}; // @[Cat.scala 29:58] + wire [3:0] _T_668 = _T_662 + _T_663; // @[el2_lsu_stbuf.scala 175:102] + wire [3:0] _T_670 = _T_668 + _T_664; // @[el2_lsu_stbuf.scala 175:102] + wire [3:0] stbuf_numvld_any = _T_670 + _T_665; // @[el2_lsu_stbuf.scala 175:102] + wire _T_672 = io_lsu_pkt_m_valid & io_lsu_pkt_m_store; // @[el2_lsu_stbuf.scala 176:40] + wire _T_673 = _T_672 & io_addr_in_dccm_m; // @[el2_lsu_stbuf.scala 176:61] + wire _T_674 = ~io_lsu_pkt_m_dma; // @[el2_lsu_stbuf.scala 176:83] + wire isdccmst_m = _T_673 & _T_674; // @[el2_lsu_stbuf.scala 176:81] + wire _T_675 = io_lsu_pkt_r_valid & io_lsu_pkt_r_store; // @[el2_lsu_stbuf.scala 177:40] + wire _T_676 = _T_675 & io_addr_in_dccm_r; // @[el2_lsu_stbuf.scala 177:61] + wire _T_677 = ~io_lsu_pkt_r_dma; // @[el2_lsu_stbuf.scala 177:83] + wire isdccmst_r = _T_676 & _T_677; // @[el2_lsu_stbuf.scala 177:81] + wire [1:0] _T_678 = {1'h0,isdccmst_m}; // @[Cat.scala 29:58] + wire _T_679 = isdccmst_m & ldst_dual_m; // @[el2_lsu_stbuf.scala 179:63] + wire [2:0] _GEN_39 = {{1'd0}, _T_678}; // @[el2_lsu_stbuf.scala 179:48] + wire [2:0] _T_680 = _GEN_39 << _T_679; // @[el2_lsu_stbuf.scala 179:48] + wire [1:0] _T_681 = {1'h0,isdccmst_r}; // @[Cat.scala 29:58] + wire _T_682 = isdccmst_r & ldst_dual_r; // @[el2_lsu_stbuf.scala 180:63] + wire [2:0] _GEN_40 = {{1'd0}, _T_681}; // @[el2_lsu_stbuf.scala 180:48] + wire [2:0] _T_683 = _GEN_40 << _T_682; // @[el2_lsu_stbuf.scala 180:48] + wire [1:0] stbuf_specvld_m = _T_680[1:0]; // @[el2_lsu_stbuf.scala 179:20] + wire [3:0] _T_684 = {2'h0,stbuf_specvld_m}; // @[Cat.scala 29:58] + wire [3:0] _T_686 = stbuf_numvld_any + _T_684; // @[el2_lsu_stbuf.scala 181:45] + wire [1:0] stbuf_specvld_r = _T_683[1:0]; // @[el2_lsu_stbuf.scala 180:20] + wire [3:0] _T_687 = {2'h0,stbuf_specvld_r}; // @[Cat.scala 29:58] + wire [3:0] stbuf_specvld_any = _T_686 + _T_687; // @[el2_lsu_stbuf.scala 181:79] + wire _T_689 = ~ldst_dual_d; // @[el2_lsu_stbuf.scala 183:35] + wire _T_690 = _T_689 & io_dec_lsu_valid_raw_d; // @[el2_lsu_stbuf.scala 183:48] + wire _T_692 = stbuf_specvld_any >= 4'h4; // @[el2_lsu_stbuf.scala 183:99] + wire _T_693 = stbuf_specvld_any >= 4'h3; // @[el2_lsu_stbuf.scala 183:138] + wire _T_787 = stbuf_match_hi[0] & stbuf_byteen_0[0]; // @[el2_lsu_stbuf.scala 198:117] + wire _T_788 = _T_787 & stbuf_vld_0; // @[el2_lsu_stbuf.scala 198:138] + wire _T_791 = stbuf_match_hi[0] & stbuf_byteen_0[1]; // @[el2_lsu_stbuf.scala 198:117] + wire _T_792 = _T_791 & stbuf_vld_0; // @[el2_lsu_stbuf.scala 198:138] + wire _T_795 = stbuf_match_hi[0] & stbuf_byteen_0[2]; // @[el2_lsu_stbuf.scala 198:117] + wire _T_796 = _T_795 & stbuf_vld_0; // @[el2_lsu_stbuf.scala 198:138] + wire _T_799 = stbuf_match_hi[0] & stbuf_byteen_0[3]; // @[el2_lsu_stbuf.scala 198:117] + wire _T_800 = _T_799 & stbuf_vld_0; // @[el2_lsu_stbuf.scala 198:138] + wire [3:0] stbuf_fwdbyteenvec_hi_0 = {_T_800,_T_796,_T_792,_T_788}; // @[Cat.scala 29:58] + wire _T_805 = stbuf_match_hi[1] & stbuf_byteen_1[0]; // @[el2_lsu_stbuf.scala 198:117] + wire _T_806 = _T_805 & stbuf_vld_1; // @[el2_lsu_stbuf.scala 198:138] + wire _T_809 = stbuf_match_hi[1] & stbuf_byteen_1[1]; // @[el2_lsu_stbuf.scala 198:117] + wire _T_810 = _T_809 & stbuf_vld_1; // @[el2_lsu_stbuf.scala 198:138] + wire _T_813 = stbuf_match_hi[1] & stbuf_byteen_1[2]; // @[el2_lsu_stbuf.scala 198:117] + wire _T_814 = _T_813 & stbuf_vld_1; // @[el2_lsu_stbuf.scala 198:138] + wire _T_817 = stbuf_match_hi[1] & stbuf_byteen_1[3]; // @[el2_lsu_stbuf.scala 198:117] + wire _T_818 = _T_817 & stbuf_vld_1; // @[el2_lsu_stbuf.scala 198:138] + wire [3:0] stbuf_fwdbyteenvec_hi_1 = {_T_818,_T_814,_T_810,_T_806}; // @[Cat.scala 29:58] + wire _T_823 = stbuf_match_hi[2] & stbuf_byteen_2[0]; // @[el2_lsu_stbuf.scala 198:117] + wire _T_824 = _T_823 & stbuf_vld_2; // @[el2_lsu_stbuf.scala 198:138] + wire _T_827 = stbuf_match_hi[2] & stbuf_byteen_2[1]; // @[el2_lsu_stbuf.scala 198:117] + wire _T_828 = _T_827 & stbuf_vld_2; // @[el2_lsu_stbuf.scala 198:138] + wire _T_831 = stbuf_match_hi[2] & stbuf_byteen_2[2]; // @[el2_lsu_stbuf.scala 198:117] + wire _T_832 = _T_831 & stbuf_vld_2; // @[el2_lsu_stbuf.scala 198:138] + wire _T_835 = stbuf_match_hi[2] & stbuf_byteen_2[3]; // @[el2_lsu_stbuf.scala 198:117] + wire _T_836 = _T_835 & stbuf_vld_2; // @[el2_lsu_stbuf.scala 198:138] + wire [3:0] stbuf_fwdbyteenvec_hi_2 = {_T_836,_T_832,_T_828,_T_824}; // @[Cat.scala 29:58] + wire _T_841 = stbuf_match_hi[3] & stbuf_byteen_3[0]; // @[el2_lsu_stbuf.scala 198:117] + wire _T_842 = _T_841 & stbuf_vld_3; // @[el2_lsu_stbuf.scala 198:138] + wire _T_845 = stbuf_match_hi[3] & stbuf_byteen_3[1]; // @[el2_lsu_stbuf.scala 198:117] + wire _T_846 = _T_845 & stbuf_vld_3; // @[el2_lsu_stbuf.scala 198:138] + wire _T_849 = stbuf_match_hi[3] & stbuf_byteen_3[2]; // @[el2_lsu_stbuf.scala 198:117] + wire _T_850 = _T_849 & stbuf_vld_3; // @[el2_lsu_stbuf.scala 198:138] + wire _T_853 = stbuf_match_hi[3] & stbuf_byteen_3[3]; // @[el2_lsu_stbuf.scala 198:117] + wire _T_854 = _T_853 & stbuf_vld_3; // @[el2_lsu_stbuf.scala 198:138] + wire [3:0] stbuf_fwdbyteenvec_hi_3 = {_T_854,_T_850,_T_846,_T_842}; // @[Cat.scala 29:58] + wire _T_859 = stbuf_match_lo[0] & stbuf_byteen_0[0]; // @[el2_lsu_stbuf.scala 199:117] + wire _T_860 = _T_859 & stbuf_vld_0; // @[el2_lsu_stbuf.scala 199:138] + wire _T_863 = stbuf_match_lo[0] & stbuf_byteen_0[1]; // @[el2_lsu_stbuf.scala 199:117] + wire _T_864 = _T_863 & stbuf_vld_0; // @[el2_lsu_stbuf.scala 199:138] + wire _T_867 = stbuf_match_lo[0] & stbuf_byteen_0[2]; // @[el2_lsu_stbuf.scala 199:117] + wire _T_868 = _T_867 & stbuf_vld_0; // @[el2_lsu_stbuf.scala 199:138] + wire _T_871 = stbuf_match_lo[0] & stbuf_byteen_0[3]; // @[el2_lsu_stbuf.scala 199:117] + wire _T_872 = _T_871 & stbuf_vld_0; // @[el2_lsu_stbuf.scala 199:138] + wire [3:0] stbuf_fwdbyteenvec_lo_0 = {_T_872,_T_868,_T_864,_T_860}; // @[Cat.scala 29:58] + wire _T_877 = stbuf_match_lo[1] & stbuf_byteen_1[0]; // @[el2_lsu_stbuf.scala 199:117] + wire _T_878 = _T_877 & stbuf_vld_1; // @[el2_lsu_stbuf.scala 199:138] + wire _T_881 = stbuf_match_lo[1] & stbuf_byteen_1[1]; // @[el2_lsu_stbuf.scala 199:117] + wire _T_882 = _T_881 & stbuf_vld_1; // @[el2_lsu_stbuf.scala 199:138] + wire _T_885 = stbuf_match_lo[1] & stbuf_byteen_1[2]; // @[el2_lsu_stbuf.scala 199:117] + wire _T_886 = _T_885 & stbuf_vld_1; // @[el2_lsu_stbuf.scala 199:138] + wire _T_889 = stbuf_match_lo[1] & stbuf_byteen_1[3]; // @[el2_lsu_stbuf.scala 199:117] + wire _T_890 = _T_889 & stbuf_vld_1; // @[el2_lsu_stbuf.scala 199:138] + wire [3:0] stbuf_fwdbyteenvec_lo_1 = {_T_890,_T_886,_T_882,_T_878}; // @[Cat.scala 29:58] + wire _T_895 = stbuf_match_lo[2] & stbuf_byteen_2[0]; // @[el2_lsu_stbuf.scala 199:117] + wire _T_896 = _T_895 & stbuf_vld_2; // @[el2_lsu_stbuf.scala 199:138] + wire _T_899 = stbuf_match_lo[2] & stbuf_byteen_2[1]; // @[el2_lsu_stbuf.scala 199:117] + wire _T_900 = _T_899 & stbuf_vld_2; // @[el2_lsu_stbuf.scala 199:138] + wire _T_903 = stbuf_match_lo[2] & stbuf_byteen_2[2]; // @[el2_lsu_stbuf.scala 199:117] + wire _T_904 = _T_903 & stbuf_vld_2; // @[el2_lsu_stbuf.scala 199:138] + wire _T_907 = stbuf_match_lo[2] & stbuf_byteen_2[3]; // @[el2_lsu_stbuf.scala 199:117] + wire _T_908 = _T_907 & stbuf_vld_2; // @[el2_lsu_stbuf.scala 199:138] + wire [3:0] stbuf_fwdbyteenvec_lo_2 = {_T_908,_T_904,_T_900,_T_896}; // @[Cat.scala 29:58] + wire _T_913 = stbuf_match_lo[3] & stbuf_byteen_3[0]; // @[el2_lsu_stbuf.scala 199:117] + wire _T_914 = _T_913 & stbuf_vld_3; // @[el2_lsu_stbuf.scala 199:138] + wire _T_917 = stbuf_match_lo[3] & stbuf_byteen_3[1]; // @[el2_lsu_stbuf.scala 199:117] + wire _T_918 = _T_917 & stbuf_vld_3; // @[el2_lsu_stbuf.scala 199:138] + wire _T_921 = stbuf_match_lo[3] & stbuf_byteen_3[2]; // @[el2_lsu_stbuf.scala 199:117] + wire _T_922 = _T_921 & stbuf_vld_3; // @[el2_lsu_stbuf.scala 199:138] + wire _T_925 = stbuf_match_lo[3] & stbuf_byteen_3[3]; // @[el2_lsu_stbuf.scala 199:117] + wire _T_926 = _T_925 & stbuf_vld_3; // @[el2_lsu_stbuf.scala 199:138] + wire [3:0] stbuf_fwdbyteenvec_lo_3 = {_T_926,_T_922,_T_918,_T_914}; // @[Cat.scala 29:58] + wire _T_933 = stbuf_fwdbyteenvec_hi_0[3] | stbuf_fwdbyteenvec_hi_0[2]; // @[el2_lsu_stbuf.scala 200:156] + wire _T_934 = _T_933 | stbuf_fwdbyteenvec_hi_0[1]; // @[el2_lsu_stbuf.scala 200:156] + wire stbuf_fwdbyteen_hi_pre_m_0 = _T_934 | stbuf_fwdbyteenvec_hi_0[0]; // @[el2_lsu_stbuf.scala 200:156] + wire _T_939 = stbuf_fwdbyteenvec_hi_1[3] | stbuf_fwdbyteenvec_hi_1[2]; // @[el2_lsu_stbuf.scala 200:156] + wire _T_940 = _T_939 | stbuf_fwdbyteenvec_hi_1[1]; // @[el2_lsu_stbuf.scala 200:156] + wire stbuf_fwdbyteen_hi_pre_m_1 = _T_940 | stbuf_fwdbyteenvec_hi_1[0]; // @[el2_lsu_stbuf.scala 200:156] + wire _T_945 = stbuf_fwdbyteenvec_hi_2[3] | stbuf_fwdbyteenvec_hi_2[2]; // @[el2_lsu_stbuf.scala 200:156] + wire _T_946 = _T_945 | stbuf_fwdbyteenvec_hi_2[1]; // @[el2_lsu_stbuf.scala 200:156] + wire stbuf_fwdbyteen_hi_pre_m_2 = _T_946 | stbuf_fwdbyteenvec_hi_2[0]; // @[el2_lsu_stbuf.scala 200:156] + wire _T_951 = stbuf_fwdbyteenvec_hi_3[3] | stbuf_fwdbyteenvec_hi_3[2]; // @[el2_lsu_stbuf.scala 200:156] + wire _T_952 = _T_951 | stbuf_fwdbyteenvec_hi_3[1]; // @[el2_lsu_stbuf.scala 200:156] + wire stbuf_fwdbyteen_hi_pre_m_3 = _T_952 | stbuf_fwdbyteenvec_hi_3[0]; // @[el2_lsu_stbuf.scala 200:156] + wire _T_957 = stbuf_fwdbyteenvec_lo_0[3] | stbuf_fwdbyteenvec_lo_0[2]; // @[el2_lsu_stbuf.scala 201:156] + wire _T_958 = _T_957 | stbuf_fwdbyteenvec_lo_0[1]; // @[el2_lsu_stbuf.scala 201:156] + wire stbuf_fwdbyteen_lo_pre_m_0 = _T_958 | stbuf_fwdbyteenvec_lo_0[0]; // @[el2_lsu_stbuf.scala 201:156] + wire _T_963 = stbuf_fwdbyteenvec_lo_1[3] | stbuf_fwdbyteenvec_lo_1[2]; // @[el2_lsu_stbuf.scala 201:156] + wire _T_964 = _T_963 | stbuf_fwdbyteenvec_lo_1[1]; // @[el2_lsu_stbuf.scala 201:156] + wire stbuf_fwdbyteen_lo_pre_m_1 = _T_964 | stbuf_fwdbyteenvec_lo_1[0]; // @[el2_lsu_stbuf.scala 201:156] + wire _T_969 = stbuf_fwdbyteenvec_lo_2[3] | stbuf_fwdbyteenvec_lo_2[2]; // @[el2_lsu_stbuf.scala 201:156] + wire _T_970 = _T_969 | stbuf_fwdbyteenvec_lo_2[1]; // @[el2_lsu_stbuf.scala 201:156] + wire stbuf_fwdbyteen_lo_pre_m_2 = _T_970 | stbuf_fwdbyteenvec_lo_2[0]; // @[el2_lsu_stbuf.scala 201:156] + wire _T_975 = stbuf_fwdbyteenvec_lo_3[3] | stbuf_fwdbyteenvec_lo_3[2]; // @[el2_lsu_stbuf.scala 201:156] + wire _T_976 = _T_975 | stbuf_fwdbyteenvec_lo_3[1]; // @[el2_lsu_stbuf.scala 201:156] + wire stbuf_fwdbyteen_lo_pre_m_3 = _T_976 | stbuf_fwdbyteenvec_lo_3[0]; // @[el2_lsu_stbuf.scala 201:156] + wire [31:0] _T_979 = stbuf_match_hi[0] ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_980 = _T_979 & stbuf_data_0; // @[el2_lsu_stbuf.scala 203:98] + wire [31:0] _T_983 = stbuf_match_hi[1] ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_984 = _T_983 & stbuf_data_1; // @[el2_lsu_stbuf.scala 203:98] + wire [31:0] _T_987 = stbuf_match_hi[2] ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_988 = _T_987 & stbuf_data_2; // @[el2_lsu_stbuf.scala 203:98] + wire [31:0] _T_991 = stbuf_match_hi[3] ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_992 = _T_991 & stbuf_data_3; // @[el2_lsu_stbuf.scala 203:98] + wire [31:0] _T_994 = _T_980 | _T_984; // @[el2_lsu_stbuf.scala 203:123] + wire [31:0] _T_995 = _T_994 | _T_988; // @[el2_lsu_stbuf.scala 203:123] + wire [31:0] stbuf_fwddata_hi_pre_m = _T_995 | _T_992; // @[el2_lsu_stbuf.scala 203:123] + wire [31:0] _T_998 = stbuf_match_lo[0] ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_999 = _T_998 & stbuf_data_0; // @[el2_lsu_stbuf.scala 204:98] + wire [31:0] _T_1002 = stbuf_match_lo[1] ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_1003 = _T_1002 & stbuf_data_1; // @[el2_lsu_stbuf.scala 204:98] + wire [31:0] _T_1006 = stbuf_match_lo[2] ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_1007 = _T_1006 & stbuf_data_2; // @[el2_lsu_stbuf.scala 204:98] + wire [31:0] _T_1010 = stbuf_match_lo[3] ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_1011 = _T_1010 & stbuf_data_3; // @[el2_lsu_stbuf.scala 204:98] + wire [31:0] _T_1013 = _T_999 | _T_1003; // @[el2_lsu_stbuf.scala 204:123] + wire [31:0] _T_1014 = _T_1013 | _T_1007; // @[el2_lsu_stbuf.scala 204:123] + wire [31:0] stbuf_fwddata_lo_pre_m = _T_1014 | _T_1011; // @[el2_lsu_stbuf.scala 204:123] + wire _T_1019 = io_lsu_addr_m[31:2] == io_lsu_addr_r[31:2]; // @[el2_lsu_stbuf.scala 210:50] + wire _T_1020 = _T_1019 & io_lsu_pkt_r_valid; // @[el2_lsu_stbuf.scala 210:75] + wire _T_1021 = _T_1020 & io_lsu_pkt_r_store; // @[el2_lsu_stbuf.scala 210:96] + wire ld_addr_rhit_lo_lo = _T_1021 & _T_677; // @[el2_lsu_stbuf.scala 210:117] + wire _T_1025 = io_end_addr_m[31:2] == io_lsu_addr_r[31:2]; // @[el2_lsu_stbuf.scala 211:50] + wire _T_1026 = _T_1025 & io_lsu_pkt_r_valid; // @[el2_lsu_stbuf.scala 211:75] + wire _T_1027 = _T_1026 & io_lsu_pkt_r_store; // @[el2_lsu_stbuf.scala 211:96] + wire ld_addr_rhit_lo_hi = _T_1027 & _T_677; // @[el2_lsu_stbuf.scala 211:117] + wire _T_1031 = io_lsu_addr_m[31:2] == io_end_addr_r[31:2]; // @[el2_lsu_stbuf.scala 212:50] + wire _T_1032 = _T_1031 & io_lsu_pkt_r_valid; // @[el2_lsu_stbuf.scala 212:75] + wire _T_1033 = _T_1032 & io_lsu_pkt_r_store; // @[el2_lsu_stbuf.scala 212:96] + wire _T_1035 = _T_1033 & _T_677; // @[el2_lsu_stbuf.scala 212:117] + wire ld_addr_rhit_hi_lo = _T_1035 & dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 212:137] + wire _T_1038 = io_end_addr_m[31:2] == io_end_addr_r[31:2]; // @[el2_lsu_stbuf.scala 213:50] + wire _T_1039 = _T_1038 & io_lsu_pkt_r_valid; // @[el2_lsu_stbuf.scala 213:75] + wire _T_1040 = _T_1039 & io_lsu_pkt_r_store; // @[el2_lsu_stbuf.scala 213:96] + wire _T_1042 = _T_1040 & _T_677; // @[el2_lsu_stbuf.scala 213:117] + wire ld_addr_rhit_hi_hi = _T_1042 & dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 213:137] + wire _T_1044 = ld_addr_rhit_lo_lo & store_byteen_ext_r[0]; // @[el2_lsu_stbuf.scala 215:80] + wire _T_1046 = ld_addr_rhit_lo_lo & store_byteen_ext_r[1]; // @[el2_lsu_stbuf.scala 215:80] + wire _T_1048 = ld_addr_rhit_lo_lo & store_byteen_ext_r[2]; // @[el2_lsu_stbuf.scala 215:80] + wire _T_1050 = ld_addr_rhit_lo_lo & store_byteen_ext_r[3]; // @[el2_lsu_stbuf.scala 215:80] + wire [3:0] _T_1053 = {_T_1050,_T_1048,_T_1046,_T_1044}; // @[Cat.scala 29:58] + wire _T_1055 = ld_addr_rhit_lo_hi & store_byteen_ext_r[0]; // @[el2_lsu_stbuf.scala 216:80] + wire _T_1057 = ld_addr_rhit_lo_hi & store_byteen_ext_r[1]; // @[el2_lsu_stbuf.scala 216:80] + wire _T_1059 = ld_addr_rhit_lo_hi & store_byteen_ext_r[2]; // @[el2_lsu_stbuf.scala 216:80] + wire _T_1061 = ld_addr_rhit_lo_hi & store_byteen_ext_r[3]; // @[el2_lsu_stbuf.scala 216:80] + wire [3:0] _T_1064 = {_T_1061,_T_1059,_T_1057,_T_1055}; // @[Cat.scala 29:58] + wire _T_1066 = ld_addr_rhit_hi_lo & store_byteen_ext_r[4]; // @[el2_lsu_stbuf.scala 217:80] + wire _T_1068 = ld_addr_rhit_hi_lo & store_byteen_ext_r[5]; // @[el2_lsu_stbuf.scala 217:80] + wire _T_1070 = ld_addr_rhit_hi_lo & store_byteen_ext_r[6]; // @[el2_lsu_stbuf.scala 217:80] + wire _T_1072 = ld_addr_rhit_hi_lo & store_byteen_ext_r[7]; // @[el2_lsu_stbuf.scala 217:80] + wire [3:0] _T_1075 = {_T_1072,_T_1070,_T_1068,_T_1066}; // @[Cat.scala 29:58] + wire _T_1077 = ld_addr_rhit_hi_hi & store_byteen_ext_r[4]; // @[el2_lsu_stbuf.scala 218:80] + wire _T_1079 = ld_addr_rhit_hi_hi & store_byteen_ext_r[5]; // @[el2_lsu_stbuf.scala 218:80] + wire _T_1081 = ld_addr_rhit_hi_hi & store_byteen_ext_r[6]; // @[el2_lsu_stbuf.scala 218:80] + wire _T_1083 = ld_addr_rhit_hi_hi & store_byteen_ext_r[7]; // @[el2_lsu_stbuf.scala 218:80] + wire [3:0] _T_1086 = {_T_1083,_T_1081,_T_1079,_T_1077}; // @[Cat.scala 29:58] + wire [31:0] ld_byte_rhit_hi_lo = {{28'd0}, _T_1075}; // @[el2_lsu_stbuf.scala 217:23] + wire [31:0] ld_byte_rhit_lo_lo = {{28'd0}, _T_1053}; // @[el2_lsu_stbuf.scala 215:23] + wire [31:0] _GEN_42 = {{31'd0}, ld_byte_rhit_hi_lo[0]}; // @[el2_lsu_stbuf.scala 220:77] + wire [31:0] _T_1088 = ld_byte_rhit_lo_lo | _GEN_42; // @[el2_lsu_stbuf.scala 220:77] + wire [31:0] _GEN_43 = {{31'd0}, ld_byte_rhit_hi_lo[1]}; // @[el2_lsu_stbuf.scala 220:77] + wire [31:0] _T_1090 = ld_byte_rhit_lo_lo | _GEN_43; // @[el2_lsu_stbuf.scala 220:77] + wire [31:0] _GEN_44 = {{31'd0}, ld_byte_rhit_hi_lo[2]}; // @[el2_lsu_stbuf.scala 220:77] + wire [31:0] _T_1092 = ld_byte_rhit_lo_lo | _GEN_44; // @[el2_lsu_stbuf.scala 220:77] + wire [31:0] _GEN_45 = {{31'd0}, ld_byte_rhit_hi_lo[3]}; // @[el2_lsu_stbuf.scala 220:77] + wire [31:0] _T_1094 = ld_byte_rhit_lo_lo | _GEN_45; // @[el2_lsu_stbuf.scala 220:77] + wire [127:0] _T_1097 = {_T_1094,_T_1092,_T_1090,_T_1088}; // @[Cat.scala 29:58] + wire [31:0] ld_byte_rhit_hi_hi = {{28'd0}, _T_1086}; // @[el2_lsu_stbuf.scala 218:23] + wire [31:0] ld_byte_rhit_lo_hi = {{28'd0}, _T_1064}; // @[el2_lsu_stbuf.scala 216:23] + wire [31:0] _GEN_46 = {{31'd0}, ld_byte_rhit_hi_hi[0]}; // @[el2_lsu_stbuf.scala 221:77] + wire [31:0] _T_1099 = ld_byte_rhit_lo_hi | _GEN_46; // @[el2_lsu_stbuf.scala 221:77] + wire [31:0] _GEN_47 = {{31'd0}, ld_byte_rhit_hi_hi[1]}; // @[el2_lsu_stbuf.scala 221:77] + wire [31:0] _T_1101 = ld_byte_rhit_lo_hi | _GEN_47; // @[el2_lsu_stbuf.scala 221:77] + wire [31:0] _GEN_48 = {{31'd0}, ld_byte_rhit_hi_hi[2]}; // @[el2_lsu_stbuf.scala 221:77] + wire [31:0] _T_1103 = ld_byte_rhit_lo_hi | _GEN_48; // @[el2_lsu_stbuf.scala 221:77] + wire [31:0] _GEN_49 = {{31'd0}, ld_byte_rhit_hi_hi[3]}; // @[el2_lsu_stbuf.scala 221:77] + wire [31:0] _T_1105 = ld_byte_rhit_lo_hi | _GEN_49; // @[el2_lsu_stbuf.scala 221:77] + wire [127:0] _T_1108 = {_T_1105,_T_1103,_T_1101,_T_1099}; // @[Cat.scala 29:58] + wire [7:0] _T_1111 = ld_byte_rhit_lo_lo[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_1113 = _T_1111 & io_store_data_lo_r[7:0]; // @[el2_lsu_stbuf.scala 223:54] + wire [7:0] _T_1116 = ld_byte_rhit_hi_lo[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_1118 = _T_1116 & io_store_data_hi_r[7:0]; // @[el2_lsu_stbuf.scala 223:115] + wire [7:0] fwdpipe1_lo = _T_1113 | _T_1118; // @[el2_lsu_stbuf.scala 223:81] + wire [7:0] _T_1121 = ld_byte_rhit_lo_lo[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_1123 = _T_1121 & io_store_data_lo_r[15:8]; // @[el2_lsu_stbuf.scala 224:54] + wire [7:0] _T_1126 = ld_byte_rhit_hi_lo[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_1128 = _T_1126 & io_store_data_hi_r[15:8]; // @[el2_lsu_stbuf.scala 224:116] + wire [7:0] fwdpipe2_lo = _T_1123 | _T_1128; // @[el2_lsu_stbuf.scala 224:82] + wire [7:0] _T_1131 = ld_byte_rhit_lo_lo[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_1133 = _T_1131 & io_store_data_lo_r[23:16]; // @[el2_lsu_stbuf.scala 225:54] + wire [7:0] _T_1136 = ld_byte_rhit_hi_lo[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_1138 = _T_1136 & io_store_data_hi_r[23:16]; // @[el2_lsu_stbuf.scala 225:117] + wire [7:0] fwdpipe3_lo = _T_1133 | _T_1138; // @[el2_lsu_stbuf.scala 225:83] + wire [7:0] _T_1141 = ld_byte_rhit_lo_lo[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_1143 = _T_1141 & io_store_data_lo_r[31:24]; // @[el2_lsu_stbuf.scala 226:54] + wire [7:0] _T_1146 = ld_byte_rhit_hi_lo[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [23:0] _GEN_50 = {{16'd0}, _T_1146}; // @[el2_lsu_stbuf.scala 226:117] + wire [23:0] _T_1148 = _GEN_50 & io_store_data_hi_r[31:8]; // @[el2_lsu_stbuf.scala 226:117] + wire [23:0] _GEN_51 = {{16'd0}, _T_1143}; // @[el2_lsu_stbuf.scala 226:83] + wire [23:0] fwdpipe4_lo = _GEN_51 | _T_1148; // @[el2_lsu_stbuf.scala 226:83] + wire [47:0] _T_1151 = {fwdpipe4_lo,fwdpipe3_lo,fwdpipe2_lo,fwdpipe1_lo}; // @[Cat.scala 29:58] + wire [7:0] _T_1154 = ld_byte_rhit_lo_hi[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_1156 = _T_1154 & io_store_data_lo_r[7:0]; // @[el2_lsu_stbuf.scala 229:54] + wire [7:0] _T_1159 = ld_byte_rhit_hi_hi[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_1161 = _T_1159 & io_store_data_hi_r[7:0]; // @[el2_lsu_stbuf.scala 229:115] + wire [7:0] fwdpipe1_hi = _T_1156 | _T_1161; // @[el2_lsu_stbuf.scala 229:81] + wire [7:0] _T_1164 = ld_byte_rhit_lo_hi[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_1166 = _T_1164 & io_store_data_lo_r[15:8]; // @[el2_lsu_stbuf.scala 230:54] + wire [7:0] _T_1169 = ld_byte_rhit_hi_hi[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_1171 = _T_1169 & io_store_data_hi_r[15:8]; // @[el2_lsu_stbuf.scala 230:116] + wire [7:0] fwdpipe2_hi = _T_1166 | _T_1171; // @[el2_lsu_stbuf.scala 230:82] + wire [7:0] _T_1174 = ld_byte_rhit_lo_hi[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_1176 = _T_1174 & io_store_data_lo_r[23:16]; // @[el2_lsu_stbuf.scala 231:54] + wire [7:0] _T_1179 = ld_byte_rhit_hi_hi[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_1181 = _T_1179 & io_store_data_hi_r[23:16]; // @[el2_lsu_stbuf.scala 231:117] + wire [7:0] fwdpipe3_hi = _T_1176 | _T_1181; // @[el2_lsu_stbuf.scala 231:83] + wire [7:0] _T_1184 = ld_byte_rhit_lo_hi[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_1186 = _T_1184 & io_store_data_lo_r[31:24]; // @[el2_lsu_stbuf.scala 232:54] + wire [7:0] _T_1189 = ld_byte_rhit_hi_hi[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [23:0] _GEN_52 = {{16'd0}, _T_1189}; // @[el2_lsu_stbuf.scala 232:117] + wire [23:0] _T_1191 = _GEN_52 & io_store_data_hi_r[31:8]; // @[el2_lsu_stbuf.scala 232:117] + wire [23:0] _GEN_53 = {{16'd0}, _T_1186}; // @[el2_lsu_stbuf.scala 232:83] + wire [23:0] fwdpipe4_hi = _GEN_53 | _T_1191; // @[el2_lsu_stbuf.scala 232:83] + wire [47:0] _T_1194 = {fwdpipe4_hi,fwdpipe3_hi,fwdpipe2_hi,fwdpipe1_hi}; // @[Cat.scala 29:58] + wire [2:0] _T_1204 = {stbuf_fwdbyteen_hi_pre_m_3,stbuf_fwdbyteen_hi_pre_m_2,stbuf_fwdbyteen_hi_pre_m_1}; // @[Cat.scala 29:58] + wire [2:0] _T_1215 = {stbuf_fwdbyteen_lo_pre_m_3,stbuf_fwdbyteen_lo_pre_m_2,stbuf_fwdbyteen_lo_pre_m_1}; // @[Cat.scala 29:58] + wire [3:0] ld_byte_rhit_lo = _T_1097[3:0]; // @[el2_lsu_stbuf.scala 220:20] + wire [31:0] ld_fwddata_rpipe_lo = _T_1151[31:0]; // @[el2_lsu_stbuf.scala 227:24] + wire [7:0] stbuf_fwdpipe1_lo = ld_byte_rhit_lo[0] ? ld_fwddata_rpipe_lo[7:0] : stbuf_fwddata_lo_pre_m[7:0]; // @[el2_lsu_stbuf.scala 239:31] + wire [7:0] stbuf_fwdpipe2_lo = ld_byte_rhit_lo[1] ? ld_fwddata_rpipe_lo[15:8] : stbuf_fwddata_lo_pre_m[15:8]; // @[el2_lsu_stbuf.scala 240:31] + wire [7:0] stbuf_fwdpipe3_lo = ld_byte_rhit_lo[2] ? ld_fwddata_rpipe_lo[23:16] : stbuf_fwddata_lo_pre_m[23:16]; // @[el2_lsu_stbuf.scala 241:31] + wire [7:0] stbuf_fwdpipe4_lo = ld_byte_rhit_lo[3] ? ld_fwddata_rpipe_lo[31:24] : stbuf_fwddata_lo_pre_m[31:24]; // @[el2_lsu_stbuf.scala 242:31] + wire [15:0] _T_1229 = {stbuf_fwdpipe2_lo,stbuf_fwdpipe1_lo}; // @[Cat.scala 29:58] + wire [15:0] _T_1230 = {stbuf_fwdpipe4_lo,stbuf_fwdpipe3_lo}; // @[Cat.scala 29:58] + wire [3:0] ld_byte_rhit_hi = _T_1108[3:0]; // @[el2_lsu_stbuf.scala 221:20] + wire [31:0] ld_fwddata_rpipe_hi = _T_1194[31:0]; // @[el2_lsu_stbuf.scala 233:24] + wire [7:0] stbuf_fwdpipe1_hi = ld_byte_rhit_hi[0] ? ld_fwddata_rpipe_hi[7:0] : stbuf_fwddata_hi_pre_m[7:0]; // @[el2_lsu_stbuf.scala 245:31] + wire [7:0] stbuf_fwdpipe2_hi = ld_byte_rhit_hi[1] ? ld_fwddata_rpipe_hi[15:8] : stbuf_fwddata_hi_pre_m[15:8]; // @[el2_lsu_stbuf.scala 246:31] + wire [7:0] stbuf_fwdpipe3_hi = ld_byte_rhit_hi[2] ? ld_fwddata_rpipe_hi[23:16] : stbuf_fwddata_hi_pre_m[23:16]; // @[el2_lsu_stbuf.scala 247:31] + wire [7:0] stbuf_fwdpipe4_hi = ld_byte_rhit_hi[3] ? ld_fwddata_rpipe_hi[31:24] : stbuf_fwddata_hi_pre_m[31:24]; // @[el2_lsu_stbuf.scala 248:31] + wire [15:0] _T_1244 = {stbuf_fwdpipe2_hi,stbuf_fwdpipe1_hi}; // @[Cat.scala 29:58] + wire [15:0] _T_1245 = {stbuf_fwdpipe4_hi,stbuf_fwdpipe3_hi}; // @[Cat.scala 29:58] + assign io_stbuf_reqvld_any = _T_643 & _T_645; // @[el2_lsu_stbuf.scala 50:47 el2_lsu_stbuf.scala 165:25] + assign io_stbuf_reqvld_flushed_any = _GEN_23 & _GEN_27; // @[el2_lsu_stbuf.scala 51:36 el2_lsu_stbuf.scala 164:32] + assign io_stbuf_addr_any = 2'h3 == RdPtr ? stbuf_addr_3 : _GEN_30; // @[el2_lsu_stbuf.scala 52:35 el2_lsu_stbuf.scala 166:23] + assign io_stbuf_data_any = 2'h3 == RdPtr ? stbuf_data_3 : _GEN_34; // @[el2_lsu_stbuf.scala 53:35 el2_lsu_stbuf.scala 167:23] + assign io_lsu_stbuf_full_any = _T_690 ? _T_692 : _T_693; // @[el2_lsu_stbuf.scala 54:43 el2_lsu_stbuf.scala 183:27] + assign io_ldst_stbuf_reqvld_r = io_lsu_commit_r & io_store_stbuf_reqvld_r; // @[el2_lsu_stbuf.scala 56:43 el2_lsu_stbuf.scala 122:27] + assign io_stbuf_fwddata_hi_m = {_T_1245,_T_1244}; // @[el2_lsu_stbuf.scala 57:43 el2_lsu_stbuf.scala 249:26] + assign io_stbuf_fwddata_lo_m = {_T_1230,_T_1229}; // @[el2_lsu_stbuf.scala 58:43 el2_lsu_stbuf.scala 243:26] + assign io_stbuf_fwdbyteen_hi_m = {_T_1204,stbuf_fwdbyteen_hi_pre_m_0}; // @[el2_lsu_stbuf.scala 59:37 el2_lsu_stbuf.scala 235:28] + assign io_stbuf_fwdbyteen_lo_m = {_T_1215,stbuf_fwdbyteen_lo_pre_m_0}; // @[el2_lsu_stbuf.scala 60:37 el2_lsu_stbuf.scala 236:28] +`ifdef RANDOMIZE_GARBAGE_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_INVALID_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_REG_INIT +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_MEM_INIT +`define RANDOMIZE +`endif +`ifndef RANDOM +`define RANDOM $random +`endif +`ifdef RANDOMIZE_MEM_INIT + integer initvar; +`endif +`ifndef SYNTHESIS +`ifdef FIRRTL_BEFORE_INITIAL +`FIRRTL_BEFORE_INITIAL +`endif +initial begin + `ifdef RANDOMIZE + `ifdef INIT_RANDOM + `INIT_RANDOM + `endif + `ifndef VERILATOR + `ifdef RANDOMIZE_DELAY + #`RANDOMIZE_DELAY begin end + `else + #0.002 begin end + `endif + `endif +`ifdef RANDOMIZE_REG_INIT + _RAND_0 = {1{`RANDOM}}; + ldst_dual_r = _RAND_0[0:0]; + _RAND_1 = {1{`RANDOM}}; + RdPtr = _RAND_1[1:0]; + _RAND_2 = {1{`RANDOM}}; + WrPtr = _RAND_2[1:0]; + _RAND_3 = {1{`RANDOM}}; + stbuf_addr_0 = _RAND_3[15:0]; + _RAND_4 = {1{`RANDOM}}; + stbuf_vld_0 = _RAND_4[0:0]; + _RAND_5 = {1{`RANDOM}}; + stbuf_dma_kill_0 = _RAND_5[0:0]; + _RAND_6 = {1{`RANDOM}}; + stbuf_addr_1 = _RAND_6[15:0]; + _RAND_7 = {1{`RANDOM}}; + stbuf_vld_1 = _RAND_7[0:0]; + _RAND_8 = {1{`RANDOM}}; + stbuf_dma_kill_1 = _RAND_8[0:0]; + _RAND_9 = {1{`RANDOM}}; + stbuf_addr_2 = _RAND_9[15:0]; + _RAND_10 = {1{`RANDOM}}; + stbuf_vld_2 = _RAND_10[0:0]; + _RAND_11 = {1{`RANDOM}}; + stbuf_dma_kill_2 = _RAND_11[0:0]; + _RAND_12 = {1{`RANDOM}}; + stbuf_addr_3 = _RAND_12[15:0]; + _RAND_13 = {1{`RANDOM}}; + stbuf_vld_3 = _RAND_13[0:0]; + _RAND_14 = {1{`RANDOM}}; + stbuf_dma_kill_3 = _RAND_14[0:0]; + _RAND_15 = {1{`RANDOM}}; + stbuf_byteen_0 = _RAND_15[3:0]; + _RAND_16 = {1{`RANDOM}}; + stbuf_byteen_1 = _RAND_16[3:0]; + _RAND_17 = {1{`RANDOM}}; + stbuf_byteen_2 = _RAND_17[3:0]; + _RAND_18 = {1{`RANDOM}}; + stbuf_byteen_3 = _RAND_18[3:0]; + _RAND_19 = {1{`RANDOM}}; + stbuf_data_0 = _RAND_19[31:0]; + _RAND_20 = {1{`RANDOM}}; + stbuf_data_1 = _RAND_20[31:0]; + _RAND_21 = {1{`RANDOM}}; + stbuf_data_2 = _RAND_21[31:0]; + _RAND_22 = {1{`RANDOM}}; + stbuf_data_3 = _RAND_22[31:0]; + _RAND_23 = {1{`RANDOM}}; + ldst_dual_m = _RAND_23[0:0]; +`endif // RANDOMIZE_REG_INIT + if (reset) begin + ldst_dual_r = 1'h0; + end + if (reset) begin + RdPtr = 2'h0; + end + if (reset) begin + WrPtr = 2'h0; + end + if (reset) begin + stbuf_addr_0 = 16'h0; + end + if (reset) begin + stbuf_vld_0 = 1'h0; + end + if (reset) begin + stbuf_dma_kill_0 = 1'h0; + end + if (reset) begin + stbuf_addr_1 = 16'h0; + end + if (reset) begin + stbuf_vld_1 = 1'h0; + end + if (reset) begin + stbuf_dma_kill_1 = 1'h0; + end + if (reset) begin + stbuf_addr_2 = 16'h0; + end + if (reset) begin + stbuf_vld_2 = 1'h0; + end + if (reset) begin + stbuf_dma_kill_2 = 1'h0; + end + if (reset) begin + stbuf_addr_3 = 16'h0; + end + if (reset) begin + stbuf_vld_3 = 1'h0; + end + if (reset) begin + stbuf_dma_kill_3 = 1'h0; + end + if (reset) begin + stbuf_byteen_0 = 4'h0; + end + if (reset) begin + stbuf_byteen_1 = 4'h0; + end + if (reset) begin + stbuf_byteen_2 = 4'h0; + end + if (reset) begin + stbuf_byteen_3 = 4'h0; + end + if (reset) begin + stbuf_data_0 = 32'h0; + end + if (reset) begin + stbuf_data_1 = 32'h0; + end + if (reset) begin + stbuf_data_2 = 32'h0; + end + if (reset) begin + stbuf_data_3 = 32'h0; + end + if (reset) begin + ldst_dual_m = 1'h0; + end + `endif // RANDOMIZE +end // initial +`ifdef FIRRTL_AFTER_INITIAL +`FIRRTL_AFTER_INITIAL +`endif +`endif // SYNTHESIS + always @(posedge io_lsu_c1_r_clk or posedge reset) begin + if (reset) begin + ldst_dual_r <= 1'h0; + end else begin + ldst_dual_r <= ldst_dual_m; + end + end + always @(posedge io_lsu_stbuf_c1_clk or posedge reset) begin + if (reset) begin + RdPtr <= 2'h0; + end else if (_T_214) begin + RdPtr <= NxtRdPtr; + end + end + always @(posedge io_lsu_stbuf_c1_clk or posedge reset) begin + if (reset) begin + WrPtr <= 2'h0; + end else if (WrPtrEn) begin + if (_T_660) begin + WrPtr <= WrPtrPlus2; + end else begin + WrPtr <= WrPtrPlus1; + end + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + stbuf_addr_0 <= 16'h0; + end else if (stbuf_wr_en[0]) begin + stbuf_addr_0 <= stbuf_addrin_0; + end + end + always @(posedge io_lsu_free_c2_clk or posedge reset) begin + if (reset) begin + stbuf_vld_0 <= 1'h0; + end else if (stbuf_wr_en[0]) begin + stbuf_vld_0 <= _T_35; + end + end + always @(posedge io_lsu_free_c2_clk or posedge reset) begin + if (reset) begin + stbuf_dma_kill_0 <= 1'h0; + end else if (stbuf_dma_kill_en[0]) begin + stbuf_dma_kill_0 <= _T_35; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + stbuf_addr_1 <= 16'h0; + end else if (stbuf_wr_en[1]) begin + stbuf_addr_1 <= stbuf_addrin_1; + end + end + always @(posedge io_lsu_free_c2_clk or posedge reset) begin + if (reset) begin + stbuf_vld_1 <= 1'h0; + end else if (stbuf_wr_en[1]) begin + stbuf_vld_1 <= _T_44; + end + end + always @(posedge io_lsu_free_c2_clk or posedge reset) begin + if (reset) begin + stbuf_dma_kill_1 <= 1'h0; + end else if (stbuf_dma_kill_en[1]) begin + stbuf_dma_kill_1 <= _T_44; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + stbuf_addr_2 <= 16'h0; + end else if (stbuf_wr_en[2]) begin + stbuf_addr_2 <= stbuf_addrin_2; + end + end + always @(posedge io_lsu_free_c2_clk or posedge reset) begin + if (reset) begin + stbuf_vld_2 <= 1'h0; + end else if (stbuf_wr_en[2]) begin + stbuf_vld_2 <= _T_53; + end + end + always @(posedge io_lsu_free_c2_clk or posedge reset) begin + if (reset) begin + stbuf_dma_kill_2 <= 1'h0; + end else if (stbuf_dma_kill_en[2]) begin + stbuf_dma_kill_2 <= _T_53; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + stbuf_addr_3 <= 16'h0; + end else if (stbuf_wr_en[3]) begin + stbuf_addr_3 <= stbuf_addrin_3; + end + end + always @(posedge io_lsu_free_c2_clk or posedge reset) begin + if (reset) begin + stbuf_vld_3 <= 1'h0; + end else if (stbuf_wr_en[3]) begin + stbuf_vld_3 <= _T_62; + end + end + always @(posedge io_lsu_free_c2_clk or posedge reset) begin + if (reset) begin + stbuf_dma_kill_3 <= 1'h0; + end else if (stbuf_dma_kill_en[3]) begin + stbuf_dma_kill_3 <= _T_62; + end + end + always @(posedge io_lsu_stbuf_c1_clk or posedge reset) begin + if (reset) begin + stbuf_byteen_0 <= 4'h0; + end else if (stbuf_wr_en[0]) begin + stbuf_byteen_0 <= _T_568; + end + end + always @(posedge io_lsu_stbuf_c1_clk or posedge reset) begin + if (reset) begin + stbuf_byteen_1 <= 4'h0; + end else if (stbuf_wr_en[1]) begin + stbuf_byteen_1 <= _T_590; + end + end + always @(posedge io_lsu_stbuf_c1_clk or posedge reset) begin + if (reset) begin + stbuf_byteen_2 <= 4'h0; + end else if (stbuf_wr_en[2]) begin + stbuf_byteen_2 <= _T_612; + end + end + always @(posedge io_lsu_stbuf_c1_clk or posedge reset) begin + if (reset) begin + stbuf_byteen_3 <= 4'h0; + end else if (stbuf_wr_en[3]) begin + stbuf_byteen_3 <= _T_634; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + stbuf_data_0 <= 32'h0; + end else if (stbuf_wr_en[0]) begin + stbuf_data_0 <= stbuf_datain_0; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + stbuf_data_1 <= 32'h0; + end else if (stbuf_wr_en[1]) begin + stbuf_data_1 <= stbuf_datain_1; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + stbuf_data_2 <= 32'h0; + end else if (stbuf_wr_en[2]) begin + stbuf_data_2 <= stbuf_datain_2; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + stbuf_data_3 <= 32'h0; + end else if (stbuf_wr_en[3]) begin + stbuf_data_3 <= stbuf_datain_3; + end + end + always @(posedge io_lsu_c1_m_clk or posedge reset) begin + if (reset) begin + ldst_dual_m <= 1'h0; + end else begin + ldst_dual_m <= io_lsu_addr_d[2] != io_end_addr_d[2]; + end + end +endmodule +module el2_lsu_ecc( + input clock, + input reset, + input io_lsu_c2_r_clk, + input io_lsu_pkt_m_load, + input io_lsu_pkt_m_store, + input io_lsu_pkt_m_dma, + input io_lsu_pkt_m_valid, + input io_dec_tlu_core_ecc_disable, + input [15:0] io_lsu_addr_m, + input [15:0] io_end_addr_m, + input [31:0] io_dccm_rdata_hi_m, + input [31:0] io_dccm_rdata_lo_m, + input [6:0] io_dccm_data_ecc_hi_m, + input [6:0] io_dccm_data_ecc_lo_m, + input io_ld_single_ecc_error_r, + input io_lsu_dccm_rden_m, + input io_addr_in_dccm_m, + output [31:0] io_sec_data_hi_r, + output [31:0] io_sec_data_lo_r, + output [31:0] io_sec_data_hi_m, + output [31:0] io_sec_data_lo_m, + output [31:0] io_sec_data_hi_r_ff, + output [31:0] io_sec_data_lo_r_ff, + output io_single_ecc_error_hi_r, + output io_single_ecc_error_lo_r, + output io_lsu_single_ecc_error_r, + output io_lsu_double_ecc_error_r, + output io_lsu_single_ecc_error_m, + output io_lsu_double_ecc_error_m +); +`ifdef RANDOMIZE_REG_INIT + reg [31:0] _RAND_0; + reg [31:0] _RAND_1; + reg [31:0] _RAND_2; + reg [31:0] _RAND_3; + reg [31:0] _RAND_4; + reg [31:0] _RAND_5; + reg [31:0] _RAND_6; + reg [31:0] _RAND_7; +`endif // RANDOMIZE_REG_INIT + wire _T_96 = ^io_dccm_rdata_hi_m; // @[el2_lib.scala 279:30] + wire _T_97 = ^io_dccm_data_ecc_hi_m; // @[el2_lib.scala 279:44] + wire _T_98 = _T_96 ^ _T_97; // @[el2_lib.scala 279:35] + wire [5:0] _T_106 = {io_dccm_rdata_hi_m[31],io_dccm_rdata_hi_m[30],io_dccm_rdata_hi_m[29],io_dccm_rdata_hi_m[28],io_dccm_rdata_hi_m[27],io_dccm_rdata_hi_m[26]}; // @[el2_lib.scala 279:76] + wire _T_107 = ^_T_106; // @[el2_lib.scala 279:83] + wire _T_108 = io_dccm_data_ecc_hi_m[5] ^ _T_107; // @[el2_lib.scala 279:71] + wire [6:0] _T_115 = {io_dccm_rdata_hi_m[17],io_dccm_rdata_hi_m[16],io_dccm_rdata_hi_m[15],io_dccm_rdata_hi_m[14],io_dccm_rdata_hi_m[13],io_dccm_rdata_hi_m[12],io_dccm_rdata_hi_m[11]}; // @[el2_lib.scala 279:103] + wire [14:0] _T_123 = {io_dccm_rdata_hi_m[25],io_dccm_rdata_hi_m[24],io_dccm_rdata_hi_m[23],io_dccm_rdata_hi_m[22],io_dccm_rdata_hi_m[21],io_dccm_rdata_hi_m[20],io_dccm_rdata_hi_m[19],io_dccm_rdata_hi_m[18],_T_115}; // @[el2_lib.scala 279:103] + wire _T_124 = ^_T_123; // @[el2_lib.scala 279:110] + wire _T_125 = io_dccm_data_ecc_hi_m[4] ^ _T_124; // @[el2_lib.scala 279:98] + wire [6:0] _T_132 = {io_dccm_rdata_hi_m[10],io_dccm_rdata_hi_m[9],io_dccm_rdata_hi_m[8],io_dccm_rdata_hi_m[7],io_dccm_rdata_hi_m[6],io_dccm_rdata_hi_m[5],io_dccm_rdata_hi_m[4]}; // @[el2_lib.scala 279:130] + wire [14:0] _T_140 = {io_dccm_rdata_hi_m[25],io_dccm_rdata_hi_m[24],io_dccm_rdata_hi_m[23],io_dccm_rdata_hi_m[22],io_dccm_rdata_hi_m[21],io_dccm_rdata_hi_m[20],io_dccm_rdata_hi_m[19],io_dccm_rdata_hi_m[18],_T_132}; // @[el2_lib.scala 279:130] + wire _T_141 = ^_T_140; // @[el2_lib.scala 279:137] + wire _T_142 = io_dccm_data_ecc_hi_m[3] ^ _T_141; // @[el2_lib.scala 279:125] + wire [8:0] _T_151 = {io_dccm_rdata_hi_m[15],io_dccm_rdata_hi_m[14],io_dccm_rdata_hi_m[10],io_dccm_rdata_hi_m[9],io_dccm_rdata_hi_m[8],io_dccm_rdata_hi_m[7],io_dccm_rdata_hi_m[3],io_dccm_rdata_hi_m[2],io_dccm_rdata_hi_m[1]}; // @[el2_lib.scala 279:157] + wire [17:0] _T_160 = {io_dccm_rdata_hi_m[31],io_dccm_rdata_hi_m[30],io_dccm_rdata_hi_m[29],io_dccm_rdata_hi_m[25],io_dccm_rdata_hi_m[24],io_dccm_rdata_hi_m[23],io_dccm_rdata_hi_m[22],io_dccm_rdata_hi_m[17],io_dccm_rdata_hi_m[16],_T_151}; // @[el2_lib.scala 279:157] + wire _T_161 = ^_T_160; // @[el2_lib.scala 279:164] + wire _T_162 = io_dccm_data_ecc_hi_m[2] ^ _T_161; // @[el2_lib.scala 279:152] + wire [8:0] _T_171 = {io_dccm_rdata_hi_m[13],io_dccm_rdata_hi_m[12],io_dccm_rdata_hi_m[10],io_dccm_rdata_hi_m[9],io_dccm_rdata_hi_m[6],io_dccm_rdata_hi_m[5],io_dccm_rdata_hi_m[3],io_dccm_rdata_hi_m[2],io_dccm_rdata_hi_m[0]}; // @[el2_lib.scala 279:184] + wire [17:0] _T_180 = {io_dccm_rdata_hi_m[31],io_dccm_rdata_hi_m[28],io_dccm_rdata_hi_m[27],io_dccm_rdata_hi_m[25],io_dccm_rdata_hi_m[24],io_dccm_rdata_hi_m[21],io_dccm_rdata_hi_m[20],io_dccm_rdata_hi_m[17],io_dccm_rdata_hi_m[16],_T_171}; // @[el2_lib.scala 279:184] + wire _T_181 = ^_T_180; // @[el2_lib.scala 279:191] + wire _T_182 = io_dccm_data_ecc_hi_m[1] ^ _T_181; // @[el2_lib.scala 279:179] + wire [8:0] _T_191 = {io_dccm_rdata_hi_m[13],io_dccm_rdata_hi_m[11],io_dccm_rdata_hi_m[10],io_dccm_rdata_hi_m[8],io_dccm_rdata_hi_m[6],io_dccm_rdata_hi_m[4],io_dccm_rdata_hi_m[3],io_dccm_rdata_hi_m[1],io_dccm_rdata_hi_m[0]}; // @[el2_lib.scala 279:211] + wire [17:0] _T_200 = {io_dccm_rdata_hi_m[30],io_dccm_rdata_hi_m[28],io_dccm_rdata_hi_m[26],io_dccm_rdata_hi_m[25],io_dccm_rdata_hi_m[23],io_dccm_rdata_hi_m[21],io_dccm_rdata_hi_m[19],io_dccm_rdata_hi_m[17],io_dccm_rdata_hi_m[15],_T_191}; // @[el2_lib.scala 279:211] + wire _T_201 = ^_T_200; // @[el2_lib.scala 279:218] + wire _T_202 = io_dccm_data_ecc_hi_m[0] ^ _T_201; // @[el2_lib.scala 279:206] + wire [6:0] _T_208 = {_T_98,_T_108,_T_125,_T_142,_T_162,_T_182,_T_202}; // @[Cat.scala 29:58] + wire _T_209 = _T_208 != 7'h0; // @[el2_lib.scala 281:44] + wire _T_1169 = ~io_dec_tlu_core_ecc_disable; // @[el2_lsu_ecc.scala 105:70] + wire _T_1176 = io_lsu_pkt_m_load | io_lsu_pkt_m_store; // @[el2_lsu_ecc.scala 123:60] + wire _T_1177 = io_lsu_pkt_m_valid & _T_1176; // @[el2_lsu_ecc.scala 123:39] + wire _T_1178 = _T_1177 & io_addr_in_dccm_m; // @[el2_lsu_ecc.scala 123:82] + wire is_ldst_m = _T_1178 & io_lsu_dccm_rden_m; // @[el2_lsu_ecc.scala 123:102] + wire ldst_dual_m = io_lsu_addr_m[2] != io_end_addr_m[2]; // @[el2_lsu_ecc.scala 122:39] + wire _T_1182 = ldst_dual_m | io_lsu_pkt_m_dma; // @[el2_lsu_ecc.scala 125:48] + wire _T_1183 = is_ldst_m & _T_1182; // @[el2_lsu_ecc.scala 125:33] + wire is_ldst_hi_m = _T_1183 & _T_1169; // @[el2_lsu_ecc.scala 125:68] + wire _T_210 = is_ldst_hi_m & _T_209; // @[el2_lib.scala 281:32] + wire single_ecc_error_hi_any = _T_210 & _T_98; // @[el2_lib.scala 281:52] + wire _T_225 = _T_208[5:0] == 6'h1; // @[el2_lib.scala 286:41] + wire _T_227 = _T_208[5:0] == 6'h2; // @[el2_lib.scala 286:41] + wire _T_229 = _T_208[5:0] == 6'h3; // @[el2_lib.scala 286:41] + wire _T_231 = _T_208[5:0] == 6'h4; // @[el2_lib.scala 286:41] + wire _T_233 = _T_208[5:0] == 6'h5; // @[el2_lib.scala 286:41] + wire _T_235 = _T_208[5:0] == 6'h6; // @[el2_lib.scala 286:41] + wire _T_237 = _T_208[5:0] == 6'h7; // @[el2_lib.scala 286:41] + wire _T_239 = _T_208[5:0] == 6'h8; // @[el2_lib.scala 286:41] + wire _T_241 = _T_208[5:0] == 6'h9; // @[el2_lib.scala 286:41] + wire _T_243 = _T_208[5:0] == 6'ha; // @[el2_lib.scala 286:41] + wire _T_245 = _T_208[5:0] == 6'hb; // @[el2_lib.scala 286:41] + wire _T_247 = _T_208[5:0] == 6'hc; // @[el2_lib.scala 286:41] + wire _T_249 = _T_208[5:0] == 6'hd; // @[el2_lib.scala 286:41] + wire _T_251 = _T_208[5:0] == 6'he; // @[el2_lib.scala 286:41] + wire _T_253 = _T_208[5:0] == 6'hf; // @[el2_lib.scala 286:41] + wire _T_255 = _T_208[5:0] == 6'h10; // @[el2_lib.scala 286:41] + wire _T_257 = _T_208[5:0] == 6'h11; // @[el2_lib.scala 286:41] + wire _T_259 = _T_208[5:0] == 6'h12; // @[el2_lib.scala 286:41] + wire _T_261 = _T_208[5:0] == 6'h13; // @[el2_lib.scala 286:41] + wire _T_263 = _T_208[5:0] == 6'h14; // @[el2_lib.scala 286:41] + wire _T_265 = _T_208[5:0] == 6'h15; // @[el2_lib.scala 286:41] + wire _T_267 = _T_208[5:0] == 6'h16; // @[el2_lib.scala 286:41] + wire _T_269 = _T_208[5:0] == 6'h17; // @[el2_lib.scala 286:41] + wire _T_271 = _T_208[5:0] == 6'h18; // @[el2_lib.scala 286:41] + wire _T_273 = _T_208[5:0] == 6'h19; // @[el2_lib.scala 286:41] + wire _T_275 = _T_208[5:0] == 6'h1a; // @[el2_lib.scala 286:41] + wire _T_277 = _T_208[5:0] == 6'h1b; // @[el2_lib.scala 286:41] + wire _T_279 = _T_208[5:0] == 6'h1c; // @[el2_lib.scala 286:41] + wire _T_281 = _T_208[5:0] == 6'h1d; // @[el2_lib.scala 286:41] + wire _T_283 = _T_208[5:0] == 6'h1e; // @[el2_lib.scala 286:41] + wire _T_285 = _T_208[5:0] == 6'h1f; // @[el2_lib.scala 286:41] + wire _T_287 = _T_208[5:0] == 6'h20; // @[el2_lib.scala 286:41] + wire _T_289 = _T_208[5:0] == 6'h21; // @[el2_lib.scala 286:41] + wire _T_291 = _T_208[5:0] == 6'h22; // @[el2_lib.scala 286:41] + wire _T_293 = _T_208[5:0] == 6'h23; // @[el2_lib.scala 286:41] + wire _T_295 = _T_208[5:0] == 6'h24; // @[el2_lib.scala 286:41] + wire _T_297 = _T_208[5:0] == 6'h25; // @[el2_lib.scala 286:41] + wire _T_299 = _T_208[5:0] == 6'h26; // @[el2_lib.scala 286:41] + wire _T_301 = _T_208[5:0] == 6'h27; // @[el2_lib.scala 286:41] + wire [7:0] _T_316 = {io_dccm_data_ecc_hi_m[3],io_dccm_rdata_hi_m[3:1],io_dccm_data_ecc_hi_m[2],io_dccm_rdata_hi_m[0],io_dccm_data_ecc_hi_m[1:0]}; // @[Cat.scala 29:58] + wire [38:0] _T_322 = {io_dccm_data_ecc_hi_m[6],io_dccm_rdata_hi_m[31:26],io_dccm_data_ecc_hi_m[5],io_dccm_rdata_hi_m[25:11],io_dccm_data_ecc_hi_m[4],io_dccm_rdata_hi_m[10:4],_T_316}; // @[Cat.scala 29:58] + wire [9:0] _T_340 = {_T_261,_T_259,_T_257,_T_255,_T_253,_T_251,_T_249,_T_247,_T_245,_T_243}; // @[el2_lib.scala 289:69] + wire [18:0] _T_341 = {_T_340,_T_241,_T_239,_T_237,_T_235,_T_233,_T_231,_T_229,_T_227,_T_225}; // @[el2_lib.scala 289:69] + wire [9:0] _T_350 = {_T_281,_T_279,_T_277,_T_275,_T_273,_T_271,_T_269,_T_267,_T_265,_T_263}; // @[el2_lib.scala 289:69] + wire [9:0] _T_359 = {_T_301,_T_299,_T_297,_T_295,_T_293,_T_291,_T_289,_T_287,_T_285,_T_283}; // @[el2_lib.scala 289:69] + wire [38:0] _T_361 = {_T_359,_T_350,_T_341}; // @[el2_lib.scala 289:69] + wire [38:0] _T_362 = _T_361 ^ _T_322; // @[el2_lib.scala 289:76] + wire [38:0] _T_363 = single_ecc_error_hi_any ? _T_362 : _T_322; // @[el2_lib.scala 289:31] + wire [3:0] _T_369 = {_T_363[6:4],_T_363[2]}; // @[Cat.scala 29:58] + wire [27:0] _T_371 = {_T_363[37:32],_T_363[30:16],_T_363[14:8]}; // @[Cat.scala 29:58] + wire _T_481 = ^io_dccm_rdata_lo_m; // @[el2_lib.scala 279:30] + wire _T_482 = ^io_dccm_data_ecc_lo_m; // @[el2_lib.scala 279:44] + wire _T_483 = _T_481 ^ _T_482; // @[el2_lib.scala 279:35] + wire [5:0] _T_491 = {io_dccm_rdata_lo_m[31],io_dccm_rdata_lo_m[30],io_dccm_rdata_lo_m[29],io_dccm_rdata_lo_m[28],io_dccm_rdata_lo_m[27],io_dccm_rdata_lo_m[26]}; // @[el2_lib.scala 279:76] + wire _T_492 = ^_T_491; // @[el2_lib.scala 279:83] + wire _T_493 = io_dccm_data_ecc_lo_m[5] ^ _T_492; // @[el2_lib.scala 279:71] + wire [6:0] _T_500 = {io_dccm_rdata_lo_m[17],io_dccm_rdata_lo_m[16],io_dccm_rdata_lo_m[15],io_dccm_rdata_lo_m[14],io_dccm_rdata_lo_m[13],io_dccm_rdata_lo_m[12],io_dccm_rdata_lo_m[11]}; // @[el2_lib.scala 279:103] + wire [14:0] _T_508 = {io_dccm_rdata_lo_m[25],io_dccm_rdata_lo_m[24],io_dccm_rdata_lo_m[23],io_dccm_rdata_lo_m[22],io_dccm_rdata_lo_m[21],io_dccm_rdata_lo_m[20],io_dccm_rdata_lo_m[19],io_dccm_rdata_lo_m[18],_T_500}; // @[el2_lib.scala 279:103] + wire _T_509 = ^_T_508; // @[el2_lib.scala 279:110] + wire _T_510 = io_dccm_data_ecc_lo_m[4] ^ _T_509; // @[el2_lib.scala 279:98] + wire [6:0] _T_517 = {io_dccm_rdata_lo_m[10],io_dccm_rdata_lo_m[9],io_dccm_rdata_lo_m[8],io_dccm_rdata_lo_m[7],io_dccm_rdata_lo_m[6],io_dccm_rdata_lo_m[5],io_dccm_rdata_lo_m[4]}; // @[el2_lib.scala 279:130] + wire [14:0] _T_525 = {io_dccm_rdata_lo_m[25],io_dccm_rdata_lo_m[24],io_dccm_rdata_lo_m[23],io_dccm_rdata_lo_m[22],io_dccm_rdata_lo_m[21],io_dccm_rdata_lo_m[20],io_dccm_rdata_lo_m[19],io_dccm_rdata_lo_m[18],_T_517}; // @[el2_lib.scala 279:130] + wire _T_526 = ^_T_525; // @[el2_lib.scala 279:137] + wire _T_527 = io_dccm_data_ecc_lo_m[3] ^ _T_526; // @[el2_lib.scala 279:125] + wire [8:0] _T_536 = {io_dccm_rdata_lo_m[15],io_dccm_rdata_lo_m[14],io_dccm_rdata_lo_m[10],io_dccm_rdata_lo_m[9],io_dccm_rdata_lo_m[8],io_dccm_rdata_lo_m[7],io_dccm_rdata_lo_m[3],io_dccm_rdata_lo_m[2],io_dccm_rdata_lo_m[1]}; // @[el2_lib.scala 279:157] + wire [17:0] _T_545 = {io_dccm_rdata_lo_m[31],io_dccm_rdata_lo_m[30],io_dccm_rdata_lo_m[29],io_dccm_rdata_lo_m[25],io_dccm_rdata_lo_m[24],io_dccm_rdata_lo_m[23],io_dccm_rdata_lo_m[22],io_dccm_rdata_lo_m[17],io_dccm_rdata_lo_m[16],_T_536}; // @[el2_lib.scala 279:157] + wire _T_546 = ^_T_545; // @[el2_lib.scala 279:164] + wire _T_547 = io_dccm_data_ecc_lo_m[2] ^ _T_546; // @[el2_lib.scala 279:152] + wire [8:0] _T_556 = {io_dccm_rdata_lo_m[13],io_dccm_rdata_lo_m[12],io_dccm_rdata_lo_m[10],io_dccm_rdata_lo_m[9],io_dccm_rdata_lo_m[6],io_dccm_rdata_lo_m[5],io_dccm_rdata_lo_m[3],io_dccm_rdata_lo_m[2],io_dccm_rdata_lo_m[0]}; // @[el2_lib.scala 279:184] + wire [17:0] _T_565 = {io_dccm_rdata_lo_m[31],io_dccm_rdata_lo_m[28],io_dccm_rdata_lo_m[27],io_dccm_rdata_lo_m[25],io_dccm_rdata_lo_m[24],io_dccm_rdata_lo_m[21],io_dccm_rdata_lo_m[20],io_dccm_rdata_lo_m[17],io_dccm_rdata_lo_m[16],_T_556}; // @[el2_lib.scala 279:184] + wire _T_566 = ^_T_565; // @[el2_lib.scala 279:191] + wire _T_567 = io_dccm_data_ecc_lo_m[1] ^ _T_566; // @[el2_lib.scala 279:179] + wire [8:0] _T_576 = {io_dccm_rdata_lo_m[13],io_dccm_rdata_lo_m[11],io_dccm_rdata_lo_m[10],io_dccm_rdata_lo_m[8],io_dccm_rdata_lo_m[6],io_dccm_rdata_lo_m[4],io_dccm_rdata_lo_m[3],io_dccm_rdata_lo_m[1],io_dccm_rdata_lo_m[0]}; // @[el2_lib.scala 279:211] + wire [17:0] _T_585 = {io_dccm_rdata_lo_m[30],io_dccm_rdata_lo_m[28],io_dccm_rdata_lo_m[26],io_dccm_rdata_lo_m[25],io_dccm_rdata_lo_m[23],io_dccm_rdata_lo_m[21],io_dccm_rdata_lo_m[19],io_dccm_rdata_lo_m[17],io_dccm_rdata_lo_m[15],_T_576}; // @[el2_lib.scala 279:211] + wire _T_586 = ^_T_585; // @[el2_lib.scala 279:218] + wire _T_587 = io_dccm_data_ecc_lo_m[0] ^ _T_586; // @[el2_lib.scala 279:206] + wire [6:0] _T_593 = {_T_483,_T_493,_T_510,_T_527,_T_547,_T_567,_T_587}; // @[Cat.scala 29:58] + wire _T_594 = _T_593 != 7'h0; // @[el2_lib.scala 281:44] + wire is_ldst_lo_m = is_ldst_m & _T_1169; // @[el2_lsu_ecc.scala 124:33] + wire _T_595 = is_ldst_lo_m & _T_594; // @[el2_lib.scala 281:32] + wire single_ecc_error_lo_any = _T_595 & _T_483; // @[el2_lib.scala 281:52] + wire _T_610 = _T_593[5:0] == 6'h1; // @[el2_lib.scala 286:41] + wire _T_612 = _T_593[5:0] == 6'h2; // @[el2_lib.scala 286:41] + wire _T_614 = _T_593[5:0] == 6'h3; // @[el2_lib.scala 286:41] + wire _T_616 = _T_593[5:0] == 6'h4; // @[el2_lib.scala 286:41] + wire _T_618 = _T_593[5:0] == 6'h5; // @[el2_lib.scala 286:41] + wire _T_620 = _T_593[5:0] == 6'h6; // @[el2_lib.scala 286:41] + wire _T_622 = _T_593[5:0] == 6'h7; // @[el2_lib.scala 286:41] + wire _T_624 = _T_593[5:0] == 6'h8; // @[el2_lib.scala 286:41] + wire _T_626 = _T_593[5:0] == 6'h9; // @[el2_lib.scala 286:41] + wire _T_628 = _T_593[5:0] == 6'ha; // @[el2_lib.scala 286:41] + wire _T_630 = _T_593[5:0] == 6'hb; // @[el2_lib.scala 286:41] + wire _T_632 = _T_593[5:0] == 6'hc; // @[el2_lib.scala 286:41] + wire _T_634 = _T_593[5:0] == 6'hd; // @[el2_lib.scala 286:41] + wire _T_636 = _T_593[5:0] == 6'he; // @[el2_lib.scala 286:41] + wire _T_638 = _T_593[5:0] == 6'hf; // @[el2_lib.scala 286:41] + wire _T_640 = _T_593[5:0] == 6'h10; // @[el2_lib.scala 286:41] + wire _T_642 = _T_593[5:0] == 6'h11; // @[el2_lib.scala 286:41] + wire _T_644 = _T_593[5:0] == 6'h12; // @[el2_lib.scala 286:41] + wire _T_646 = _T_593[5:0] == 6'h13; // @[el2_lib.scala 286:41] + wire _T_648 = _T_593[5:0] == 6'h14; // @[el2_lib.scala 286:41] + wire _T_650 = _T_593[5:0] == 6'h15; // @[el2_lib.scala 286:41] + wire _T_652 = _T_593[5:0] == 6'h16; // @[el2_lib.scala 286:41] + wire _T_654 = _T_593[5:0] == 6'h17; // @[el2_lib.scala 286:41] + wire _T_656 = _T_593[5:0] == 6'h18; // @[el2_lib.scala 286:41] + wire _T_658 = _T_593[5:0] == 6'h19; // @[el2_lib.scala 286:41] + wire _T_660 = _T_593[5:0] == 6'h1a; // @[el2_lib.scala 286:41] + wire _T_662 = _T_593[5:0] == 6'h1b; // @[el2_lib.scala 286:41] + wire _T_664 = _T_593[5:0] == 6'h1c; // @[el2_lib.scala 286:41] + wire _T_666 = _T_593[5:0] == 6'h1d; // @[el2_lib.scala 286:41] + wire _T_668 = _T_593[5:0] == 6'h1e; // @[el2_lib.scala 286:41] + wire _T_670 = _T_593[5:0] == 6'h1f; // @[el2_lib.scala 286:41] + wire _T_672 = _T_593[5:0] == 6'h20; // @[el2_lib.scala 286:41] + wire _T_674 = _T_593[5:0] == 6'h21; // @[el2_lib.scala 286:41] + wire _T_676 = _T_593[5:0] == 6'h22; // @[el2_lib.scala 286:41] + wire _T_678 = _T_593[5:0] == 6'h23; // @[el2_lib.scala 286:41] + wire _T_680 = _T_593[5:0] == 6'h24; // @[el2_lib.scala 286:41] + wire _T_682 = _T_593[5:0] == 6'h25; // @[el2_lib.scala 286:41] + wire _T_684 = _T_593[5:0] == 6'h26; // @[el2_lib.scala 286:41] + wire _T_686 = _T_593[5:0] == 6'h27; // @[el2_lib.scala 286:41] + wire [7:0] _T_701 = {io_dccm_data_ecc_lo_m[3],io_dccm_rdata_lo_m[3:1],io_dccm_data_ecc_lo_m[2],io_dccm_rdata_lo_m[0],io_dccm_data_ecc_lo_m[1:0]}; // @[Cat.scala 29:58] + wire [38:0] _T_707 = {io_dccm_data_ecc_lo_m[6],io_dccm_rdata_lo_m[31:26],io_dccm_data_ecc_lo_m[5],io_dccm_rdata_lo_m[25:11],io_dccm_data_ecc_lo_m[4],io_dccm_rdata_lo_m[10:4],_T_701}; // @[Cat.scala 29:58] + wire [9:0] _T_725 = {_T_646,_T_644,_T_642,_T_640,_T_638,_T_636,_T_634,_T_632,_T_630,_T_628}; // @[el2_lib.scala 289:69] + wire [18:0] _T_726 = {_T_725,_T_626,_T_624,_T_622,_T_620,_T_618,_T_616,_T_614,_T_612,_T_610}; // @[el2_lib.scala 289:69] + wire [9:0] _T_735 = {_T_666,_T_664,_T_662,_T_660,_T_658,_T_656,_T_654,_T_652,_T_650,_T_648}; // @[el2_lib.scala 289:69] + wire [9:0] _T_744 = {_T_686,_T_684,_T_682,_T_680,_T_678,_T_676,_T_674,_T_672,_T_670,_T_668}; // @[el2_lib.scala 289:69] + wire [38:0] _T_746 = {_T_744,_T_735,_T_726}; // @[el2_lib.scala 289:69] + wire [38:0] _T_747 = _T_746 ^ _T_707; // @[el2_lib.scala 289:76] + wire [38:0] _T_748 = single_ecc_error_lo_any ? _T_747 : _T_707; // @[el2_lib.scala 289:31] + wire [3:0] _T_754 = {_T_748[6:4],_T_748[2]}; // @[Cat.scala 29:58] + wire [27:0] _T_756 = {_T_748[37:32],_T_748[30:16],_T_748[14:8]}; // @[Cat.scala 29:58] + reg _T_1188; // @[el2_lsu_ecc.scala 139:72] + reg _T_1189; // @[el2_lsu_ecc.scala 140:72] + reg _T_1190; // @[el2_lsu_ecc.scala 141:72] + reg _T_1191; // @[el2_lsu_ecc.scala 142:72] + reg [31:0] _T_1192; // @[el2_lsu_ecc.scala 143:72] + reg [31:0] _T_1193; // @[el2_lsu_ecc.scala 144:72] + reg [31:0] _T_1202; // @[Reg.scala 27:20] + reg [31:0] _T_1203; // @[Reg.scala 27:20] + assign io_sec_data_hi_r = _T_1192; // @[el2_lsu_ecc.scala 112:24 el2_lsu_ecc.scala 143:62] + assign io_sec_data_lo_r = _T_1193; // @[el2_lsu_ecc.scala 115:27 el2_lsu_ecc.scala 144:62] + assign io_sec_data_hi_m = {_T_371,_T_369}; // @[el2_lsu_ecc.scala 88:32 el2_lsu_ecc.scala 132:27] + assign io_sec_data_lo_m = {_T_756,_T_754}; // @[el2_lsu_ecc.scala 89:32 el2_lsu_ecc.scala 134:27] + assign io_sec_data_hi_r_ff = _T_1202; // @[el2_lsu_ecc.scala 155:23] + assign io_sec_data_lo_r_ff = _T_1203; // @[el2_lsu_ecc.scala 156:23] + assign io_single_ecc_error_hi_r = _T_1191; // @[el2_lsu_ecc.scala 113:33 el2_lsu_ecc.scala 142:62] + assign io_single_ecc_error_lo_r = _T_1190; // @[el2_lsu_ecc.scala 116:33 el2_lsu_ecc.scala 141:62] + assign io_lsu_single_ecc_error_r = _T_1188; // @[el2_lsu_ecc.scala 118:33 el2_lsu_ecc.scala 139:62] + assign io_lsu_double_ecc_error_r = _T_1189; // @[el2_lsu_ecc.scala 119:33 el2_lsu_ecc.scala 140:62] + assign io_lsu_single_ecc_error_m = single_ecc_error_hi_any | single_ecc_error_lo_any; // @[el2_lsu_ecc.scala 90:30 el2_lsu_ecc.scala 136:33] + assign io_lsu_double_ecc_error_m = single_ecc_error_hi_any | single_ecc_error_lo_any; // @[el2_lsu_ecc.scala 91:30 el2_lsu_ecc.scala 137:33] +`ifdef RANDOMIZE_GARBAGE_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_INVALID_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_REG_INIT +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_MEM_INIT +`define RANDOMIZE +`endif +`ifndef RANDOM +`define RANDOM $random +`endif +`ifdef RANDOMIZE_MEM_INIT + integer initvar; +`endif +`ifndef SYNTHESIS +`ifdef FIRRTL_BEFORE_INITIAL +`FIRRTL_BEFORE_INITIAL +`endif +initial begin + `ifdef RANDOMIZE + `ifdef INIT_RANDOM + `INIT_RANDOM + `endif + `ifndef VERILATOR + `ifdef RANDOMIZE_DELAY + #`RANDOMIZE_DELAY begin end + `else + #0.002 begin end + `endif + `endif +`ifdef RANDOMIZE_REG_INIT + _RAND_0 = {1{`RANDOM}}; + _T_1188 = _RAND_0[0:0]; + _RAND_1 = {1{`RANDOM}}; + _T_1189 = _RAND_1[0:0]; + _RAND_2 = {1{`RANDOM}}; + _T_1190 = _RAND_2[0:0]; + _RAND_3 = {1{`RANDOM}}; + _T_1191 = _RAND_3[0:0]; + _RAND_4 = {1{`RANDOM}}; + _T_1192 = _RAND_4[31:0]; + _RAND_5 = {1{`RANDOM}}; + _T_1193 = _RAND_5[31:0]; + _RAND_6 = {1{`RANDOM}}; + _T_1202 = _RAND_6[31:0]; + _RAND_7 = {1{`RANDOM}}; + _T_1203 = _RAND_7[31:0]; +`endif // RANDOMIZE_REG_INIT + if (reset) begin + _T_1202 = 32'h0; + end + if (reset) begin + _T_1203 = 32'h0; + end + `endif // RANDOMIZE +end // initial +`ifdef FIRRTL_AFTER_INITIAL +`FIRRTL_AFTER_INITIAL +`endif +`endif // SYNTHESIS + always @(posedge io_lsu_c2_r_clk) begin + _T_1188 <= io_lsu_single_ecc_error_m; + _T_1189 <= io_lsu_double_ecc_error_m; + _T_1190 <= _T_595 & _T_483; + _T_1191 <= _T_210 & _T_98; + _T_1192 <= io_sec_data_hi_m; + _T_1193 <= io_sec_data_lo_m; + end + always @(posedge clock or posedge reset) begin + if (reset) begin + _T_1202 <= 32'h0; + end else if (io_ld_single_ecc_error_r) begin + _T_1202 <= io_sec_data_hi_r; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + _T_1203 <= 32'h0; + end else if (io_ld_single_ecc_error_r) begin + _T_1203 <= io_sec_data_lo_r; + end + end +endmodule +module el2_lsu_trigger( + input io_trigger_pkt_any_0_select, + input io_trigger_pkt_any_0_match_, + input io_trigger_pkt_any_0_store, + input io_trigger_pkt_any_0_load, + input [31:0] io_trigger_pkt_any_0_tdata2, + input io_trigger_pkt_any_1_select, + input io_trigger_pkt_any_1_match_, + input io_trigger_pkt_any_1_store, + input io_trigger_pkt_any_1_load, + input [31:0] io_trigger_pkt_any_1_tdata2, + input io_trigger_pkt_any_2_select, + input io_trigger_pkt_any_2_match_, + input io_trigger_pkt_any_2_store, + input io_trigger_pkt_any_2_load, + input [31:0] io_trigger_pkt_any_2_tdata2, + input io_trigger_pkt_any_3_select, + input io_trigger_pkt_any_3_match_, + input io_trigger_pkt_any_3_store, + input io_trigger_pkt_any_3_load, + input [31:0] io_trigger_pkt_any_3_tdata2, + input io_lsu_pkt_m_half, + input io_lsu_pkt_m_word, + input io_lsu_pkt_m_load, + input io_lsu_pkt_m_store, + input io_lsu_pkt_m_dma, + input io_lsu_pkt_m_valid, + input [31:0] io_lsu_addr_m, + input [31:0] io_store_data_m, + output [3:0] io_lsu_trigger_match_m +); + wire [15:0] _T_1 = io_lsu_pkt_m_word ? 16'hffff : 16'h0; // @[Bitwise.scala 72:12] + wire [15:0] _T_3 = _T_1 & io_store_data_m[31:16]; // @[el2_lsu_trigger.scala 17:60] + wire _T_4 = io_lsu_pkt_m_half | io_lsu_pkt_m_word; // @[el2_lsu_trigger.scala 17:110] + wire [7:0] _T_6 = _T_4 ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_8 = _T_6 & io_store_data_m[15:8]; // @[el2_lsu_trigger.scala 17:131] + wire [31:0] store_data_trigger_m = {_T_3,_T_8,io_store_data_m[7:0]}; // @[Cat.scala 29:58] + wire _T_12 = ~io_trigger_pkt_any_0_select; // @[el2_lsu_trigger.scala 24:107] + wire _T_13 = io_trigger_pkt_any_0_select & io_trigger_pkt_any_0_store; // @[el2_lsu_trigger.scala 25:35] + wire [31:0] _T_15 = _T_12 ? io_lsu_addr_m : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_16 = _T_13 ? store_data_trigger_m : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_17 = _T_15 | _T_16; // @[Mux.scala 27:72] + wire _T_23 = &io_trigger_pkt_any_0_tdata2; // @[el2_lib.scala 194:73] + wire _T_24 = ~_T_23; // @[el2_lib.scala 194:47] + wire _T_25 = io_trigger_pkt_any_0_match_ & _T_24; // @[el2_lib.scala 194:44] + wire _T_28 = io_trigger_pkt_any_0_tdata2[0] == _T_17[0]; // @[el2_lib.scala 195:52] + wire _T_29 = _T_25 | _T_28; // @[el2_lib.scala 195:41] + wire _T_31 = &io_trigger_pkt_any_0_tdata2[0]; // @[el2_lib.scala 197:37] + wire _T_32 = _T_31 & _T_25; // @[el2_lib.scala 197:42] + wire _T_35 = io_trigger_pkt_any_0_tdata2[1] == _T_17[1]; // @[el2_lib.scala 197:79] + wire _T_36 = _T_32 | _T_35; // @[el2_lib.scala 197:24] + wire _T_38 = &io_trigger_pkt_any_0_tdata2[1:0]; // @[el2_lib.scala 197:37] + wire _T_39 = _T_38 & _T_25; // @[el2_lib.scala 197:42] + wire _T_42 = io_trigger_pkt_any_0_tdata2[2] == _T_17[2]; // @[el2_lib.scala 197:79] + wire _T_43 = _T_39 | _T_42; // @[el2_lib.scala 197:24] + wire _T_45 = &io_trigger_pkt_any_0_tdata2[2:0]; // @[el2_lib.scala 197:37] + wire _T_46 = _T_45 & _T_25; // @[el2_lib.scala 197:42] + wire _T_49 = io_trigger_pkt_any_0_tdata2[3] == _T_17[3]; // @[el2_lib.scala 197:79] + wire _T_50 = _T_46 | _T_49; // @[el2_lib.scala 197:24] + wire _T_52 = &io_trigger_pkt_any_0_tdata2[3:0]; // @[el2_lib.scala 197:37] + wire _T_53 = _T_52 & _T_25; // @[el2_lib.scala 197:42] + wire _T_56 = io_trigger_pkt_any_0_tdata2[4] == _T_17[4]; // @[el2_lib.scala 197:79] + wire _T_57 = _T_53 | _T_56; // @[el2_lib.scala 197:24] + wire _T_59 = &io_trigger_pkt_any_0_tdata2[4:0]; // @[el2_lib.scala 197:37] + wire _T_60 = _T_59 & _T_25; // @[el2_lib.scala 197:42] + wire _T_63 = io_trigger_pkt_any_0_tdata2[5] == _T_17[5]; // @[el2_lib.scala 197:79] + wire _T_64 = _T_60 | _T_63; // @[el2_lib.scala 197:24] + wire _T_66 = &io_trigger_pkt_any_0_tdata2[5:0]; // @[el2_lib.scala 197:37] + wire _T_67 = _T_66 & _T_25; // @[el2_lib.scala 197:42] + wire _T_70 = io_trigger_pkt_any_0_tdata2[6] == _T_17[6]; // @[el2_lib.scala 197:79] + wire _T_71 = _T_67 | _T_70; // @[el2_lib.scala 197:24] + wire _T_73 = &io_trigger_pkt_any_0_tdata2[6:0]; // @[el2_lib.scala 197:37] + wire _T_74 = _T_73 & _T_25; // @[el2_lib.scala 197:42] + wire _T_77 = io_trigger_pkt_any_0_tdata2[7] == _T_17[7]; // @[el2_lib.scala 197:79] + wire _T_78 = _T_74 | _T_77; // @[el2_lib.scala 197:24] + wire _T_80 = &io_trigger_pkt_any_0_tdata2[7:0]; // @[el2_lib.scala 197:37] + wire _T_81 = _T_80 & _T_25; // @[el2_lib.scala 197:42] + wire _T_84 = io_trigger_pkt_any_0_tdata2[8] == _T_17[8]; // @[el2_lib.scala 197:79] + wire _T_85 = _T_81 | _T_84; // @[el2_lib.scala 197:24] + wire _T_87 = &io_trigger_pkt_any_0_tdata2[8:0]; // @[el2_lib.scala 197:37] + wire _T_88 = _T_87 & _T_25; // @[el2_lib.scala 197:42] + wire _T_91 = io_trigger_pkt_any_0_tdata2[9] == _T_17[9]; // @[el2_lib.scala 197:79] + wire _T_92 = _T_88 | _T_91; // @[el2_lib.scala 197:24] + wire _T_94 = &io_trigger_pkt_any_0_tdata2[9:0]; // @[el2_lib.scala 197:37] + wire _T_95 = _T_94 & _T_25; // @[el2_lib.scala 197:42] + wire _T_98 = io_trigger_pkt_any_0_tdata2[10] == _T_17[10]; // @[el2_lib.scala 197:79] + wire _T_99 = _T_95 | _T_98; // @[el2_lib.scala 197:24] + wire _T_101 = &io_trigger_pkt_any_0_tdata2[10:0]; // @[el2_lib.scala 197:37] + wire _T_102 = _T_101 & _T_25; // @[el2_lib.scala 197:42] + wire _T_105 = io_trigger_pkt_any_0_tdata2[11] == _T_17[11]; // @[el2_lib.scala 197:79] + wire _T_106 = _T_102 | _T_105; // @[el2_lib.scala 197:24] + wire _T_108 = &io_trigger_pkt_any_0_tdata2[11:0]; // @[el2_lib.scala 197:37] + wire _T_109 = _T_108 & _T_25; // @[el2_lib.scala 197:42] + wire _T_112 = io_trigger_pkt_any_0_tdata2[12] == _T_17[12]; // @[el2_lib.scala 197:79] + wire _T_113 = _T_109 | _T_112; // @[el2_lib.scala 197:24] + wire _T_115 = &io_trigger_pkt_any_0_tdata2[12:0]; // @[el2_lib.scala 197:37] + wire _T_116 = _T_115 & _T_25; // @[el2_lib.scala 197:42] + wire _T_119 = io_trigger_pkt_any_0_tdata2[13] == _T_17[13]; // @[el2_lib.scala 197:79] + wire _T_120 = _T_116 | _T_119; // @[el2_lib.scala 197:24] + wire _T_122 = &io_trigger_pkt_any_0_tdata2[13:0]; // @[el2_lib.scala 197:37] + wire _T_123 = _T_122 & _T_25; // @[el2_lib.scala 197:42] + wire _T_126 = io_trigger_pkt_any_0_tdata2[14] == _T_17[14]; // @[el2_lib.scala 197:79] + wire _T_127 = _T_123 | _T_126; // @[el2_lib.scala 197:24] + wire _T_129 = &io_trigger_pkt_any_0_tdata2[14:0]; // @[el2_lib.scala 197:37] + wire _T_130 = _T_129 & _T_25; // @[el2_lib.scala 197:42] + wire _T_133 = io_trigger_pkt_any_0_tdata2[15] == _T_17[15]; // @[el2_lib.scala 197:79] + wire _T_134 = _T_130 | _T_133; // @[el2_lib.scala 197:24] + wire _T_136 = &io_trigger_pkt_any_0_tdata2[15:0]; // @[el2_lib.scala 197:37] + wire _T_137 = _T_136 & _T_25; // @[el2_lib.scala 197:42] + wire _T_140 = io_trigger_pkt_any_0_tdata2[16] == _T_17[16]; // @[el2_lib.scala 197:79] + wire _T_141 = _T_137 | _T_140; // @[el2_lib.scala 197:24] + wire _T_143 = &io_trigger_pkt_any_0_tdata2[16:0]; // @[el2_lib.scala 197:37] + wire _T_144 = _T_143 & _T_25; // @[el2_lib.scala 197:42] + wire _T_147 = io_trigger_pkt_any_0_tdata2[17] == _T_17[17]; // @[el2_lib.scala 197:79] + wire _T_148 = _T_144 | _T_147; // @[el2_lib.scala 197:24] + wire _T_150 = &io_trigger_pkt_any_0_tdata2[17:0]; // @[el2_lib.scala 197:37] + wire _T_151 = _T_150 & _T_25; // @[el2_lib.scala 197:42] + wire _T_154 = io_trigger_pkt_any_0_tdata2[18] == _T_17[18]; // @[el2_lib.scala 197:79] + wire _T_155 = _T_151 | _T_154; // @[el2_lib.scala 197:24] + wire _T_157 = &io_trigger_pkt_any_0_tdata2[18:0]; // @[el2_lib.scala 197:37] + wire _T_158 = _T_157 & _T_25; // @[el2_lib.scala 197:42] + wire _T_161 = io_trigger_pkt_any_0_tdata2[19] == _T_17[19]; // @[el2_lib.scala 197:79] + wire _T_162 = _T_158 | _T_161; // @[el2_lib.scala 197:24] + wire _T_164 = &io_trigger_pkt_any_0_tdata2[19:0]; // @[el2_lib.scala 197:37] + wire _T_165 = _T_164 & _T_25; // @[el2_lib.scala 197:42] + wire _T_168 = io_trigger_pkt_any_0_tdata2[20] == _T_17[20]; // @[el2_lib.scala 197:79] + wire _T_169 = _T_165 | _T_168; // @[el2_lib.scala 197:24] + wire _T_171 = &io_trigger_pkt_any_0_tdata2[20:0]; // @[el2_lib.scala 197:37] + wire _T_172 = _T_171 & _T_25; // @[el2_lib.scala 197:42] + wire _T_175 = io_trigger_pkt_any_0_tdata2[21] == _T_17[21]; // @[el2_lib.scala 197:79] + wire _T_176 = _T_172 | _T_175; // @[el2_lib.scala 197:24] + wire _T_178 = &io_trigger_pkt_any_0_tdata2[21:0]; // @[el2_lib.scala 197:37] + wire _T_179 = _T_178 & _T_25; // @[el2_lib.scala 197:42] + wire _T_182 = io_trigger_pkt_any_0_tdata2[22] == _T_17[22]; // @[el2_lib.scala 197:79] + wire _T_183 = _T_179 | _T_182; // @[el2_lib.scala 197:24] + wire _T_185 = &io_trigger_pkt_any_0_tdata2[22:0]; // @[el2_lib.scala 197:37] + wire _T_186 = _T_185 & _T_25; // @[el2_lib.scala 197:42] + wire _T_189 = io_trigger_pkt_any_0_tdata2[23] == _T_17[23]; // @[el2_lib.scala 197:79] + wire _T_190 = _T_186 | _T_189; // @[el2_lib.scala 197:24] + wire _T_192 = &io_trigger_pkt_any_0_tdata2[23:0]; // @[el2_lib.scala 197:37] + wire _T_193 = _T_192 & _T_25; // @[el2_lib.scala 197:42] + wire _T_196 = io_trigger_pkt_any_0_tdata2[24] == _T_17[24]; // @[el2_lib.scala 197:79] + wire _T_197 = _T_193 | _T_196; // @[el2_lib.scala 197:24] + wire _T_199 = &io_trigger_pkt_any_0_tdata2[24:0]; // @[el2_lib.scala 197:37] + wire _T_200 = _T_199 & _T_25; // @[el2_lib.scala 197:42] + wire _T_203 = io_trigger_pkt_any_0_tdata2[25] == _T_17[25]; // @[el2_lib.scala 197:79] + wire _T_204 = _T_200 | _T_203; // @[el2_lib.scala 197:24] + wire _T_206 = &io_trigger_pkt_any_0_tdata2[25:0]; // @[el2_lib.scala 197:37] + wire _T_207 = _T_206 & _T_25; // @[el2_lib.scala 197:42] + wire _T_210 = io_trigger_pkt_any_0_tdata2[26] == _T_17[26]; // @[el2_lib.scala 197:79] + wire _T_211 = _T_207 | _T_210; // @[el2_lib.scala 197:24] + wire _T_213 = &io_trigger_pkt_any_0_tdata2[26:0]; // @[el2_lib.scala 197:37] + wire _T_214 = _T_213 & _T_25; // @[el2_lib.scala 197:42] + wire _T_217 = io_trigger_pkt_any_0_tdata2[27] == _T_17[27]; // @[el2_lib.scala 197:79] + wire _T_218 = _T_214 | _T_217; // @[el2_lib.scala 197:24] + wire _T_220 = &io_trigger_pkt_any_0_tdata2[27:0]; // @[el2_lib.scala 197:37] + wire _T_221 = _T_220 & _T_25; // @[el2_lib.scala 197:42] + wire _T_224 = io_trigger_pkt_any_0_tdata2[28] == _T_17[28]; // @[el2_lib.scala 197:79] + wire _T_225 = _T_221 | _T_224; // @[el2_lib.scala 197:24] + wire _T_227 = &io_trigger_pkt_any_0_tdata2[28:0]; // @[el2_lib.scala 197:37] + wire _T_228 = _T_227 & _T_25; // @[el2_lib.scala 197:42] + wire _T_231 = io_trigger_pkt_any_0_tdata2[29] == _T_17[29]; // @[el2_lib.scala 197:79] + wire _T_232 = _T_228 | _T_231; // @[el2_lib.scala 197:24] + wire _T_234 = &io_trigger_pkt_any_0_tdata2[29:0]; // @[el2_lib.scala 197:37] + wire _T_235 = _T_234 & _T_25; // @[el2_lib.scala 197:42] + wire _T_238 = io_trigger_pkt_any_0_tdata2[30] == _T_17[30]; // @[el2_lib.scala 197:79] + wire _T_239 = _T_235 | _T_238; // @[el2_lib.scala 197:24] + wire _T_241 = &io_trigger_pkt_any_0_tdata2[30:0]; // @[el2_lib.scala 197:37] + wire _T_242 = _T_241 & _T_25; // @[el2_lib.scala 197:42] + wire _T_245 = io_trigger_pkt_any_0_tdata2[31] == _T_17[31]; // @[el2_lib.scala 197:79] + wire _T_246 = _T_242 | _T_245; // @[el2_lib.scala 197:24] + wire [7:0] _T_253 = {_T_78,_T_71,_T_64,_T_57,_T_50,_T_43,_T_36,_T_29}; // @[el2_lib.scala 198:14] + wire [15:0] _T_261 = {_T_134,_T_127,_T_120,_T_113,_T_106,_T_99,_T_92,_T_85,_T_253}; // @[el2_lib.scala 198:14] + wire [7:0] _T_268 = {_T_190,_T_183,_T_176,_T_169,_T_162,_T_155,_T_148,_T_141}; // @[el2_lib.scala 198:14] + wire [31:0] _T_277 = {_T_246,_T_239,_T_232,_T_225,_T_218,_T_211,_T_204,_T_197,_T_268,_T_261}; // @[el2_lib.scala 198:14] + wire lsu_trigger_data_match_0 = &_T_277; // @[el2_lib.scala 198:21] + wire _T_279 = ~io_trigger_pkt_any_1_select; // @[el2_lsu_trigger.scala 24:107] + wire _T_280 = io_trigger_pkt_any_1_select & io_trigger_pkt_any_1_store; // @[el2_lsu_trigger.scala 25:35] + wire [31:0] _T_282 = _T_279 ? io_lsu_addr_m : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_283 = _T_280 ? store_data_trigger_m : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_284 = _T_282 | _T_283; // @[Mux.scala 27:72] + wire _T_290 = &io_trigger_pkt_any_1_tdata2; // @[el2_lib.scala 194:73] + wire _T_291 = ~_T_290; // @[el2_lib.scala 194:47] + wire _T_292 = io_trigger_pkt_any_1_match_ & _T_291; // @[el2_lib.scala 194:44] + wire _T_295 = io_trigger_pkt_any_1_tdata2[0] == _T_284[0]; // @[el2_lib.scala 195:52] + wire _T_296 = _T_292 | _T_295; // @[el2_lib.scala 195:41] + wire _T_298 = &io_trigger_pkt_any_1_tdata2[0]; // @[el2_lib.scala 197:37] + wire _T_299 = _T_298 & _T_292; // @[el2_lib.scala 197:42] + wire _T_302 = io_trigger_pkt_any_1_tdata2[1] == _T_284[1]; // @[el2_lib.scala 197:79] + wire _T_303 = _T_299 | _T_302; // @[el2_lib.scala 197:24] + wire _T_305 = &io_trigger_pkt_any_1_tdata2[1:0]; // @[el2_lib.scala 197:37] + wire _T_306 = _T_305 & _T_292; // @[el2_lib.scala 197:42] + wire _T_309 = io_trigger_pkt_any_1_tdata2[2] == _T_284[2]; // @[el2_lib.scala 197:79] + wire _T_310 = _T_306 | _T_309; // @[el2_lib.scala 197:24] + wire _T_312 = &io_trigger_pkt_any_1_tdata2[2:0]; // @[el2_lib.scala 197:37] + wire _T_313 = _T_312 & _T_292; // @[el2_lib.scala 197:42] + wire _T_316 = io_trigger_pkt_any_1_tdata2[3] == _T_284[3]; // @[el2_lib.scala 197:79] + wire _T_317 = _T_313 | _T_316; // @[el2_lib.scala 197:24] + wire _T_319 = &io_trigger_pkt_any_1_tdata2[3:0]; // @[el2_lib.scala 197:37] + wire _T_320 = _T_319 & _T_292; // @[el2_lib.scala 197:42] + wire _T_323 = io_trigger_pkt_any_1_tdata2[4] == _T_284[4]; // @[el2_lib.scala 197:79] + wire _T_324 = _T_320 | _T_323; // @[el2_lib.scala 197:24] + wire _T_326 = &io_trigger_pkt_any_1_tdata2[4:0]; // @[el2_lib.scala 197:37] + wire _T_327 = _T_326 & _T_292; // @[el2_lib.scala 197:42] + wire _T_330 = io_trigger_pkt_any_1_tdata2[5] == _T_284[5]; // @[el2_lib.scala 197:79] + wire _T_331 = _T_327 | _T_330; // @[el2_lib.scala 197:24] + wire _T_333 = &io_trigger_pkt_any_1_tdata2[5:0]; // @[el2_lib.scala 197:37] + wire _T_334 = _T_333 & _T_292; // @[el2_lib.scala 197:42] + wire _T_337 = io_trigger_pkt_any_1_tdata2[6] == _T_284[6]; // @[el2_lib.scala 197:79] + wire _T_338 = _T_334 | _T_337; // @[el2_lib.scala 197:24] + wire _T_340 = &io_trigger_pkt_any_1_tdata2[6:0]; // @[el2_lib.scala 197:37] + wire _T_341 = _T_340 & _T_292; // @[el2_lib.scala 197:42] + wire _T_344 = io_trigger_pkt_any_1_tdata2[7] == _T_284[7]; // @[el2_lib.scala 197:79] + wire _T_345 = _T_341 | _T_344; // @[el2_lib.scala 197:24] + wire _T_347 = &io_trigger_pkt_any_1_tdata2[7:0]; // @[el2_lib.scala 197:37] + wire _T_348 = _T_347 & _T_292; // @[el2_lib.scala 197:42] + wire _T_351 = io_trigger_pkt_any_1_tdata2[8] == _T_284[8]; // @[el2_lib.scala 197:79] + wire _T_352 = _T_348 | _T_351; // @[el2_lib.scala 197:24] + wire _T_354 = &io_trigger_pkt_any_1_tdata2[8:0]; // @[el2_lib.scala 197:37] + wire _T_355 = _T_354 & _T_292; // @[el2_lib.scala 197:42] + wire _T_358 = io_trigger_pkt_any_1_tdata2[9] == _T_284[9]; // @[el2_lib.scala 197:79] + wire _T_359 = _T_355 | _T_358; // @[el2_lib.scala 197:24] + wire _T_361 = &io_trigger_pkt_any_1_tdata2[9:0]; // @[el2_lib.scala 197:37] + wire _T_362 = _T_361 & _T_292; // @[el2_lib.scala 197:42] + wire _T_365 = io_trigger_pkt_any_1_tdata2[10] == _T_284[10]; // @[el2_lib.scala 197:79] + wire _T_366 = _T_362 | _T_365; // @[el2_lib.scala 197:24] + wire _T_368 = &io_trigger_pkt_any_1_tdata2[10:0]; // @[el2_lib.scala 197:37] + wire _T_369 = _T_368 & _T_292; // @[el2_lib.scala 197:42] + wire _T_372 = io_trigger_pkt_any_1_tdata2[11] == _T_284[11]; // @[el2_lib.scala 197:79] + wire _T_373 = _T_369 | _T_372; // @[el2_lib.scala 197:24] + wire _T_375 = &io_trigger_pkt_any_1_tdata2[11:0]; // @[el2_lib.scala 197:37] + wire _T_376 = _T_375 & _T_292; // @[el2_lib.scala 197:42] + wire _T_379 = io_trigger_pkt_any_1_tdata2[12] == _T_284[12]; // @[el2_lib.scala 197:79] + wire _T_380 = _T_376 | _T_379; // @[el2_lib.scala 197:24] + wire _T_382 = &io_trigger_pkt_any_1_tdata2[12:0]; // @[el2_lib.scala 197:37] + wire _T_383 = _T_382 & _T_292; // @[el2_lib.scala 197:42] + wire _T_386 = io_trigger_pkt_any_1_tdata2[13] == _T_284[13]; // @[el2_lib.scala 197:79] + wire _T_387 = _T_383 | _T_386; // @[el2_lib.scala 197:24] + wire _T_389 = &io_trigger_pkt_any_1_tdata2[13:0]; // @[el2_lib.scala 197:37] + wire _T_390 = _T_389 & _T_292; // @[el2_lib.scala 197:42] + wire _T_393 = io_trigger_pkt_any_1_tdata2[14] == _T_284[14]; // @[el2_lib.scala 197:79] + wire _T_394 = _T_390 | _T_393; // @[el2_lib.scala 197:24] + wire _T_396 = &io_trigger_pkt_any_1_tdata2[14:0]; // @[el2_lib.scala 197:37] + wire _T_397 = _T_396 & _T_292; // @[el2_lib.scala 197:42] + wire _T_400 = io_trigger_pkt_any_1_tdata2[15] == _T_284[15]; // @[el2_lib.scala 197:79] + wire _T_401 = _T_397 | _T_400; // @[el2_lib.scala 197:24] + wire _T_403 = &io_trigger_pkt_any_1_tdata2[15:0]; // @[el2_lib.scala 197:37] + wire _T_404 = _T_403 & _T_292; // @[el2_lib.scala 197:42] + wire _T_407 = io_trigger_pkt_any_1_tdata2[16] == _T_284[16]; // @[el2_lib.scala 197:79] + wire _T_408 = _T_404 | _T_407; // @[el2_lib.scala 197:24] + wire _T_410 = &io_trigger_pkt_any_1_tdata2[16:0]; // @[el2_lib.scala 197:37] + wire _T_411 = _T_410 & _T_292; // @[el2_lib.scala 197:42] + wire _T_414 = io_trigger_pkt_any_1_tdata2[17] == _T_284[17]; // @[el2_lib.scala 197:79] + wire _T_415 = _T_411 | _T_414; // @[el2_lib.scala 197:24] + wire _T_417 = &io_trigger_pkt_any_1_tdata2[17:0]; // @[el2_lib.scala 197:37] + wire _T_418 = _T_417 & _T_292; // @[el2_lib.scala 197:42] + wire _T_421 = io_trigger_pkt_any_1_tdata2[18] == _T_284[18]; // @[el2_lib.scala 197:79] + wire _T_422 = _T_418 | _T_421; // @[el2_lib.scala 197:24] + wire _T_424 = &io_trigger_pkt_any_1_tdata2[18:0]; // @[el2_lib.scala 197:37] + wire _T_425 = _T_424 & _T_292; // @[el2_lib.scala 197:42] + wire _T_428 = io_trigger_pkt_any_1_tdata2[19] == _T_284[19]; // @[el2_lib.scala 197:79] + wire _T_429 = _T_425 | _T_428; // @[el2_lib.scala 197:24] + wire _T_431 = &io_trigger_pkt_any_1_tdata2[19:0]; // @[el2_lib.scala 197:37] + wire _T_432 = _T_431 & _T_292; // @[el2_lib.scala 197:42] + wire _T_435 = io_trigger_pkt_any_1_tdata2[20] == _T_284[20]; // @[el2_lib.scala 197:79] + wire _T_436 = _T_432 | _T_435; // @[el2_lib.scala 197:24] + wire _T_438 = &io_trigger_pkt_any_1_tdata2[20:0]; // @[el2_lib.scala 197:37] + wire _T_439 = _T_438 & _T_292; // @[el2_lib.scala 197:42] + wire _T_442 = io_trigger_pkt_any_1_tdata2[21] == _T_284[21]; // @[el2_lib.scala 197:79] + wire _T_443 = _T_439 | _T_442; // @[el2_lib.scala 197:24] + wire _T_445 = &io_trigger_pkt_any_1_tdata2[21:0]; // @[el2_lib.scala 197:37] + wire _T_446 = _T_445 & _T_292; // @[el2_lib.scala 197:42] + wire _T_449 = io_trigger_pkt_any_1_tdata2[22] == _T_284[22]; // @[el2_lib.scala 197:79] + wire _T_450 = _T_446 | _T_449; // @[el2_lib.scala 197:24] + wire _T_452 = &io_trigger_pkt_any_1_tdata2[22:0]; // @[el2_lib.scala 197:37] + wire _T_453 = _T_452 & _T_292; // @[el2_lib.scala 197:42] + wire _T_456 = io_trigger_pkt_any_1_tdata2[23] == _T_284[23]; // @[el2_lib.scala 197:79] + wire _T_457 = _T_453 | _T_456; // @[el2_lib.scala 197:24] + wire _T_459 = &io_trigger_pkt_any_1_tdata2[23:0]; // @[el2_lib.scala 197:37] + wire _T_460 = _T_459 & _T_292; // @[el2_lib.scala 197:42] + wire _T_463 = io_trigger_pkt_any_1_tdata2[24] == _T_284[24]; // @[el2_lib.scala 197:79] + wire _T_464 = _T_460 | _T_463; // @[el2_lib.scala 197:24] + wire _T_466 = &io_trigger_pkt_any_1_tdata2[24:0]; // @[el2_lib.scala 197:37] + wire _T_467 = _T_466 & _T_292; // @[el2_lib.scala 197:42] + wire _T_470 = io_trigger_pkt_any_1_tdata2[25] == _T_284[25]; // @[el2_lib.scala 197:79] + wire _T_471 = _T_467 | _T_470; // @[el2_lib.scala 197:24] + wire _T_473 = &io_trigger_pkt_any_1_tdata2[25:0]; // @[el2_lib.scala 197:37] + wire _T_474 = _T_473 & _T_292; // @[el2_lib.scala 197:42] + wire _T_477 = io_trigger_pkt_any_1_tdata2[26] == _T_284[26]; // @[el2_lib.scala 197:79] + wire _T_478 = _T_474 | _T_477; // @[el2_lib.scala 197:24] + wire _T_480 = &io_trigger_pkt_any_1_tdata2[26:0]; // @[el2_lib.scala 197:37] + wire _T_481 = _T_480 & _T_292; // @[el2_lib.scala 197:42] + wire _T_484 = io_trigger_pkt_any_1_tdata2[27] == _T_284[27]; // @[el2_lib.scala 197:79] + wire _T_485 = _T_481 | _T_484; // @[el2_lib.scala 197:24] + wire _T_487 = &io_trigger_pkt_any_1_tdata2[27:0]; // @[el2_lib.scala 197:37] + wire _T_488 = _T_487 & _T_292; // @[el2_lib.scala 197:42] + wire _T_491 = io_trigger_pkt_any_1_tdata2[28] == _T_284[28]; // @[el2_lib.scala 197:79] + wire _T_492 = _T_488 | _T_491; // @[el2_lib.scala 197:24] + wire _T_494 = &io_trigger_pkt_any_1_tdata2[28:0]; // @[el2_lib.scala 197:37] + wire _T_495 = _T_494 & _T_292; // @[el2_lib.scala 197:42] + wire _T_498 = io_trigger_pkt_any_1_tdata2[29] == _T_284[29]; // @[el2_lib.scala 197:79] + wire _T_499 = _T_495 | _T_498; // @[el2_lib.scala 197:24] + wire _T_501 = &io_trigger_pkt_any_1_tdata2[29:0]; // @[el2_lib.scala 197:37] + wire _T_502 = _T_501 & _T_292; // @[el2_lib.scala 197:42] + wire _T_505 = io_trigger_pkt_any_1_tdata2[30] == _T_284[30]; // @[el2_lib.scala 197:79] + wire _T_506 = _T_502 | _T_505; // @[el2_lib.scala 197:24] + wire _T_508 = &io_trigger_pkt_any_1_tdata2[30:0]; // @[el2_lib.scala 197:37] + wire _T_509 = _T_508 & _T_292; // @[el2_lib.scala 197:42] + wire _T_512 = io_trigger_pkt_any_1_tdata2[31] == _T_284[31]; // @[el2_lib.scala 197:79] + wire _T_513 = _T_509 | _T_512; // @[el2_lib.scala 197:24] + wire [7:0] _T_520 = {_T_345,_T_338,_T_331,_T_324,_T_317,_T_310,_T_303,_T_296}; // @[el2_lib.scala 198:14] + wire [15:0] _T_528 = {_T_401,_T_394,_T_387,_T_380,_T_373,_T_366,_T_359,_T_352,_T_520}; // @[el2_lib.scala 198:14] + wire [7:0] _T_535 = {_T_457,_T_450,_T_443,_T_436,_T_429,_T_422,_T_415,_T_408}; // @[el2_lib.scala 198:14] + wire [31:0] _T_544 = {_T_513,_T_506,_T_499,_T_492,_T_485,_T_478,_T_471,_T_464,_T_535,_T_528}; // @[el2_lib.scala 198:14] + wire lsu_trigger_data_match_1 = &_T_544; // @[el2_lib.scala 198:21] + wire _T_546 = ~io_trigger_pkt_any_2_select; // @[el2_lsu_trigger.scala 24:107] + wire _T_547 = io_trigger_pkt_any_2_select & io_trigger_pkt_any_2_store; // @[el2_lsu_trigger.scala 25:35] + wire [31:0] _T_549 = _T_546 ? io_lsu_addr_m : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_550 = _T_547 ? store_data_trigger_m : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_551 = _T_549 | _T_550; // @[Mux.scala 27:72] + wire _T_557 = &io_trigger_pkt_any_2_tdata2; // @[el2_lib.scala 194:73] + wire _T_558 = ~_T_557; // @[el2_lib.scala 194:47] + wire _T_559 = io_trigger_pkt_any_2_match_ & _T_558; // @[el2_lib.scala 194:44] + wire _T_562 = io_trigger_pkt_any_2_tdata2[0] == _T_551[0]; // @[el2_lib.scala 195:52] + wire _T_563 = _T_559 | _T_562; // @[el2_lib.scala 195:41] + wire _T_565 = &io_trigger_pkt_any_2_tdata2[0]; // @[el2_lib.scala 197:37] + wire _T_566 = _T_565 & _T_559; // @[el2_lib.scala 197:42] + wire _T_569 = io_trigger_pkt_any_2_tdata2[1] == _T_551[1]; // @[el2_lib.scala 197:79] + wire _T_570 = _T_566 | _T_569; // @[el2_lib.scala 197:24] + wire _T_572 = &io_trigger_pkt_any_2_tdata2[1:0]; // @[el2_lib.scala 197:37] + wire _T_573 = _T_572 & _T_559; // @[el2_lib.scala 197:42] + wire _T_576 = io_trigger_pkt_any_2_tdata2[2] == _T_551[2]; // @[el2_lib.scala 197:79] + wire _T_577 = _T_573 | _T_576; // @[el2_lib.scala 197:24] + wire _T_579 = &io_trigger_pkt_any_2_tdata2[2:0]; // @[el2_lib.scala 197:37] + wire _T_580 = _T_579 & _T_559; // @[el2_lib.scala 197:42] + wire _T_583 = io_trigger_pkt_any_2_tdata2[3] == _T_551[3]; // @[el2_lib.scala 197:79] + wire _T_584 = _T_580 | _T_583; // @[el2_lib.scala 197:24] + wire _T_586 = &io_trigger_pkt_any_2_tdata2[3:0]; // @[el2_lib.scala 197:37] + wire _T_587 = _T_586 & _T_559; // @[el2_lib.scala 197:42] + wire _T_590 = io_trigger_pkt_any_2_tdata2[4] == _T_551[4]; // @[el2_lib.scala 197:79] + wire _T_591 = _T_587 | _T_590; // @[el2_lib.scala 197:24] + wire _T_593 = &io_trigger_pkt_any_2_tdata2[4:0]; // @[el2_lib.scala 197:37] + wire _T_594 = _T_593 & _T_559; // @[el2_lib.scala 197:42] + wire _T_597 = io_trigger_pkt_any_2_tdata2[5] == _T_551[5]; // @[el2_lib.scala 197:79] + wire _T_598 = _T_594 | _T_597; // @[el2_lib.scala 197:24] + wire _T_600 = &io_trigger_pkt_any_2_tdata2[5:0]; // @[el2_lib.scala 197:37] + wire _T_601 = _T_600 & _T_559; // @[el2_lib.scala 197:42] + wire _T_604 = io_trigger_pkt_any_2_tdata2[6] == _T_551[6]; // @[el2_lib.scala 197:79] + wire _T_605 = _T_601 | _T_604; // @[el2_lib.scala 197:24] + wire _T_607 = &io_trigger_pkt_any_2_tdata2[6:0]; // @[el2_lib.scala 197:37] + wire _T_608 = _T_607 & _T_559; // @[el2_lib.scala 197:42] + wire _T_611 = io_trigger_pkt_any_2_tdata2[7] == _T_551[7]; // @[el2_lib.scala 197:79] + wire _T_612 = _T_608 | _T_611; // @[el2_lib.scala 197:24] + wire _T_614 = &io_trigger_pkt_any_2_tdata2[7:0]; // @[el2_lib.scala 197:37] + wire _T_615 = _T_614 & _T_559; // @[el2_lib.scala 197:42] + wire _T_618 = io_trigger_pkt_any_2_tdata2[8] == _T_551[8]; // @[el2_lib.scala 197:79] + wire _T_619 = _T_615 | _T_618; // @[el2_lib.scala 197:24] + wire _T_621 = &io_trigger_pkt_any_2_tdata2[8:0]; // @[el2_lib.scala 197:37] + wire _T_622 = _T_621 & _T_559; // @[el2_lib.scala 197:42] + wire _T_625 = io_trigger_pkt_any_2_tdata2[9] == _T_551[9]; // @[el2_lib.scala 197:79] + wire _T_626 = _T_622 | _T_625; // @[el2_lib.scala 197:24] + wire _T_628 = &io_trigger_pkt_any_2_tdata2[9:0]; // @[el2_lib.scala 197:37] + wire _T_629 = _T_628 & _T_559; // @[el2_lib.scala 197:42] + wire _T_632 = io_trigger_pkt_any_2_tdata2[10] == _T_551[10]; // @[el2_lib.scala 197:79] + wire _T_633 = _T_629 | _T_632; // @[el2_lib.scala 197:24] + wire _T_635 = &io_trigger_pkt_any_2_tdata2[10:0]; // @[el2_lib.scala 197:37] + wire _T_636 = _T_635 & _T_559; // @[el2_lib.scala 197:42] + wire _T_639 = io_trigger_pkt_any_2_tdata2[11] == _T_551[11]; // @[el2_lib.scala 197:79] + wire _T_640 = _T_636 | _T_639; // @[el2_lib.scala 197:24] + wire _T_642 = &io_trigger_pkt_any_2_tdata2[11:0]; // @[el2_lib.scala 197:37] + wire _T_643 = _T_642 & _T_559; // @[el2_lib.scala 197:42] + wire _T_646 = io_trigger_pkt_any_2_tdata2[12] == _T_551[12]; // @[el2_lib.scala 197:79] + wire _T_647 = _T_643 | _T_646; // @[el2_lib.scala 197:24] + wire _T_649 = &io_trigger_pkt_any_2_tdata2[12:0]; // @[el2_lib.scala 197:37] + wire _T_650 = _T_649 & _T_559; // @[el2_lib.scala 197:42] + wire _T_653 = io_trigger_pkt_any_2_tdata2[13] == _T_551[13]; // @[el2_lib.scala 197:79] + wire _T_654 = _T_650 | _T_653; // @[el2_lib.scala 197:24] + wire _T_656 = &io_trigger_pkt_any_2_tdata2[13:0]; // @[el2_lib.scala 197:37] + wire _T_657 = _T_656 & _T_559; // @[el2_lib.scala 197:42] + wire _T_660 = io_trigger_pkt_any_2_tdata2[14] == _T_551[14]; // @[el2_lib.scala 197:79] + wire _T_661 = _T_657 | _T_660; // @[el2_lib.scala 197:24] + wire _T_663 = &io_trigger_pkt_any_2_tdata2[14:0]; // @[el2_lib.scala 197:37] + wire _T_664 = _T_663 & _T_559; // @[el2_lib.scala 197:42] + wire _T_667 = io_trigger_pkt_any_2_tdata2[15] == _T_551[15]; // @[el2_lib.scala 197:79] + wire _T_668 = _T_664 | _T_667; // @[el2_lib.scala 197:24] + wire _T_670 = &io_trigger_pkt_any_2_tdata2[15:0]; // @[el2_lib.scala 197:37] + wire _T_671 = _T_670 & _T_559; // @[el2_lib.scala 197:42] + wire _T_674 = io_trigger_pkt_any_2_tdata2[16] == _T_551[16]; // @[el2_lib.scala 197:79] + wire _T_675 = _T_671 | _T_674; // @[el2_lib.scala 197:24] + wire _T_677 = &io_trigger_pkt_any_2_tdata2[16:0]; // @[el2_lib.scala 197:37] + wire _T_678 = _T_677 & _T_559; // @[el2_lib.scala 197:42] + wire _T_681 = io_trigger_pkt_any_2_tdata2[17] == _T_551[17]; // @[el2_lib.scala 197:79] + wire _T_682 = _T_678 | _T_681; // @[el2_lib.scala 197:24] + wire _T_684 = &io_trigger_pkt_any_2_tdata2[17:0]; // @[el2_lib.scala 197:37] + wire _T_685 = _T_684 & _T_559; // @[el2_lib.scala 197:42] + wire _T_688 = io_trigger_pkt_any_2_tdata2[18] == _T_551[18]; // @[el2_lib.scala 197:79] + wire _T_689 = _T_685 | _T_688; // @[el2_lib.scala 197:24] + wire _T_691 = &io_trigger_pkt_any_2_tdata2[18:0]; // @[el2_lib.scala 197:37] + wire _T_692 = _T_691 & _T_559; // @[el2_lib.scala 197:42] + wire _T_695 = io_trigger_pkt_any_2_tdata2[19] == _T_551[19]; // @[el2_lib.scala 197:79] + wire _T_696 = _T_692 | _T_695; // @[el2_lib.scala 197:24] + wire _T_698 = &io_trigger_pkt_any_2_tdata2[19:0]; // @[el2_lib.scala 197:37] + wire _T_699 = _T_698 & _T_559; // @[el2_lib.scala 197:42] + wire _T_702 = io_trigger_pkt_any_2_tdata2[20] == _T_551[20]; // @[el2_lib.scala 197:79] + wire _T_703 = _T_699 | _T_702; // @[el2_lib.scala 197:24] + wire _T_705 = &io_trigger_pkt_any_2_tdata2[20:0]; // @[el2_lib.scala 197:37] + wire _T_706 = _T_705 & _T_559; // @[el2_lib.scala 197:42] + wire _T_709 = io_trigger_pkt_any_2_tdata2[21] == _T_551[21]; // @[el2_lib.scala 197:79] + wire _T_710 = _T_706 | _T_709; // @[el2_lib.scala 197:24] + wire _T_712 = &io_trigger_pkt_any_2_tdata2[21:0]; // @[el2_lib.scala 197:37] + wire _T_713 = _T_712 & _T_559; // @[el2_lib.scala 197:42] + wire _T_716 = io_trigger_pkt_any_2_tdata2[22] == _T_551[22]; // @[el2_lib.scala 197:79] + wire _T_717 = _T_713 | _T_716; // @[el2_lib.scala 197:24] + wire _T_719 = &io_trigger_pkt_any_2_tdata2[22:0]; // @[el2_lib.scala 197:37] + wire _T_720 = _T_719 & _T_559; // @[el2_lib.scala 197:42] + wire _T_723 = io_trigger_pkt_any_2_tdata2[23] == _T_551[23]; // @[el2_lib.scala 197:79] + wire _T_724 = _T_720 | _T_723; // @[el2_lib.scala 197:24] + wire _T_726 = &io_trigger_pkt_any_2_tdata2[23:0]; // @[el2_lib.scala 197:37] + wire _T_727 = _T_726 & _T_559; // @[el2_lib.scala 197:42] + wire _T_730 = io_trigger_pkt_any_2_tdata2[24] == _T_551[24]; // @[el2_lib.scala 197:79] + wire _T_731 = _T_727 | _T_730; // @[el2_lib.scala 197:24] + wire _T_733 = &io_trigger_pkt_any_2_tdata2[24:0]; // @[el2_lib.scala 197:37] + wire _T_734 = _T_733 & _T_559; // @[el2_lib.scala 197:42] + wire _T_737 = io_trigger_pkt_any_2_tdata2[25] == _T_551[25]; // @[el2_lib.scala 197:79] + wire _T_738 = _T_734 | _T_737; // @[el2_lib.scala 197:24] + wire _T_740 = &io_trigger_pkt_any_2_tdata2[25:0]; // @[el2_lib.scala 197:37] + wire _T_741 = _T_740 & _T_559; // @[el2_lib.scala 197:42] + wire _T_744 = io_trigger_pkt_any_2_tdata2[26] == _T_551[26]; // @[el2_lib.scala 197:79] + wire _T_745 = _T_741 | _T_744; // @[el2_lib.scala 197:24] + wire _T_747 = &io_trigger_pkt_any_2_tdata2[26:0]; // @[el2_lib.scala 197:37] + wire _T_748 = _T_747 & _T_559; // @[el2_lib.scala 197:42] + wire _T_751 = io_trigger_pkt_any_2_tdata2[27] == _T_551[27]; // @[el2_lib.scala 197:79] + wire _T_752 = _T_748 | _T_751; // @[el2_lib.scala 197:24] + wire _T_754 = &io_trigger_pkt_any_2_tdata2[27:0]; // @[el2_lib.scala 197:37] + wire _T_755 = _T_754 & _T_559; // @[el2_lib.scala 197:42] + wire _T_758 = io_trigger_pkt_any_2_tdata2[28] == _T_551[28]; // @[el2_lib.scala 197:79] + wire _T_759 = _T_755 | _T_758; // @[el2_lib.scala 197:24] + wire _T_761 = &io_trigger_pkt_any_2_tdata2[28:0]; // @[el2_lib.scala 197:37] + wire _T_762 = _T_761 & _T_559; // @[el2_lib.scala 197:42] + wire _T_765 = io_trigger_pkt_any_2_tdata2[29] == _T_551[29]; // @[el2_lib.scala 197:79] + wire _T_766 = _T_762 | _T_765; // @[el2_lib.scala 197:24] + wire _T_768 = &io_trigger_pkt_any_2_tdata2[29:0]; // @[el2_lib.scala 197:37] + wire _T_769 = _T_768 & _T_559; // @[el2_lib.scala 197:42] + wire _T_772 = io_trigger_pkt_any_2_tdata2[30] == _T_551[30]; // @[el2_lib.scala 197:79] + wire _T_773 = _T_769 | _T_772; // @[el2_lib.scala 197:24] + wire _T_775 = &io_trigger_pkt_any_2_tdata2[30:0]; // @[el2_lib.scala 197:37] + wire _T_776 = _T_775 & _T_559; // @[el2_lib.scala 197:42] + wire _T_779 = io_trigger_pkt_any_2_tdata2[31] == _T_551[31]; // @[el2_lib.scala 197:79] + wire _T_780 = _T_776 | _T_779; // @[el2_lib.scala 197:24] + wire [7:0] _T_787 = {_T_612,_T_605,_T_598,_T_591,_T_584,_T_577,_T_570,_T_563}; // @[el2_lib.scala 198:14] + wire [15:0] _T_795 = {_T_668,_T_661,_T_654,_T_647,_T_640,_T_633,_T_626,_T_619,_T_787}; // @[el2_lib.scala 198:14] + wire [7:0] _T_802 = {_T_724,_T_717,_T_710,_T_703,_T_696,_T_689,_T_682,_T_675}; // @[el2_lib.scala 198:14] + wire [31:0] _T_811 = {_T_780,_T_773,_T_766,_T_759,_T_752,_T_745,_T_738,_T_731,_T_802,_T_795}; // @[el2_lib.scala 198:14] + wire lsu_trigger_data_match_2 = &_T_811; // @[el2_lib.scala 198:21] + wire _T_813 = ~io_trigger_pkt_any_3_select; // @[el2_lsu_trigger.scala 24:107] + wire _T_814 = io_trigger_pkt_any_3_select & io_trigger_pkt_any_3_store; // @[el2_lsu_trigger.scala 25:35] + wire [31:0] _T_816 = _T_813 ? io_lsu_addr_m : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_817 = _T_814 ? store_data_trigger_m : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_818 = _T_816 | _T_817; // @[Mux.scala 27:72] + wire _T_824 = &io_trigger_pkt_any_3_tdata2; // @[el2_lib.scala 194:73] + wire _T_825 = ~_T_824; // @[el2_lib.scala 194:47] + wire _T_826 = io_trigger_pkt_any_3_match_ & _T_825; // @[el2_lib.scala 194:44] + wire _T_829 = io_trigger_pkt_any_3_tdata2[0] == _T_818[0]; // @[el2_lib.scala 195:52] + wire _T_830 = _T_826 | _T_829; // @[el2_lib.scala 195:41] + wire _T_832 = &io_trigger_pkt_any_3_tdata2[0]; // @[el2_lib.scala 197:37] + wire _T_833 = _T_832 & _T_826; // @[el2_lib.scala 197:42] + wire _T_836 = io_trigger_pkt_any_3_tdata2[1] == _T_818[1]; // @[el2_lib.scala 197:79] + wire _T_837 = _T_833 | _T_836; // @[el2_lib.scala 197:24] + wire _T_839 = &io_trigger_pkt_any_3_tdata2[1:0]; // @[el2_lib.scala 197:37] + wire _T_840 = _T_839 & _T_826; // @[el2_lib.scala 197:42] + wire _T_843 = io_trigger_pkt_any_3_tdata2[2] == _T_818[2]; // @[el2_lib.scala 197:79] + wire _T_844 = _T_840 | _T_843; // @[el2_lib.scala 197:24] + wire _T_846 = &io_trigger_pkt_any_3_tdata2[2:0]; // @[el2_lib.scala 197:37] + wire _T_847 = _T_846 & _T_826; // @[el2_lib.scala 197:42] + wire _T_850 = io_trigger_pkt_any_3_tdata2[3] == _T_818[3]; // @[el2_lib.scala 197:79] + wire _T_851 = _T_847 | _T_850; // @[el2_lib.scala 197:24] + wire _T_853 = &io_trigger_pkt_any_3_tdata2[3:0]; // @[el2_lib.scala 197:37] + wire _T_854 = _T_853 & _T_826; // @[el2_lib.scala 197:42] + wire _T_857 = io_trigger_pkt_any_3_tdata2[4] == _T_818[4]; // @[el2_lib.scala 197:79] + wire _T_858 = _T_854 | _T_857; // @[el2_lib.scala 197:24] + wire _T_860 = &io_trigger_pkt_any_3_tdata2[4:0]; // @[el2_lib.scala 197:37] + wire _T_861 = _T_860 & _T_826; // @[el2_lib.scala 197:42] + wire _T_864 = io_trigger_pkt_any_3_tdata2[5] == _T_818[5]; // @[el2_lib.scala 197:79] + wire _T_865 = _T_861 | _T_864; // @[el2_lib.scala 197:24] + wire _T_867 = &io_trigger_pkt_any_3_tdata2[5:0]; // @[el2_lib.scala 197:37] + wire _T_868 = _T_867 & _T_826; // @[el2_lib.scala 197:42] + wire _T_871 = io_trigger_pkt_any_3_tdata2[6] == _T_818[6]; // @[el2_lib.scala 197:79] + wire _T_872 = _T_868 | _T_871; // @[el2_lib.scala 197:24] + wire _T_874 = &io_trigger_pkt_any_3_tdata2[6:0]; // @[el2_lib.scala 197:37] + wire _T_875 = _T_874 & _T_826; // @[el2_lib.scala 197:42] + wire _T_878 = io_trigger_pkt_any_3_tdata2[7] == _T_818[7]; // @[el2_lib.scala 197:79] + wire _T_879 = _T_875 | _T_878; // @[el2_lib.scala 197:24] + wire _T_881 = &io_trigger_pkt_any_3_tdata2[7:0]; // @[el2_lib.scala 197:37] + wire _T_882 = _T_881 & _T_826; // @[el2_lib.scala 197:42] + wire _T_885 = io_trigger_pkt_any_3_tdata2[8] == _T_818[8]; // @[el2_lib.scala 197:79] + wire _T_886 = _T_882 | _T_885; // @[el2_lib.scala 197:24] + wire _T_888 = &io_trigger_pkt_any_3_tdata2[8:0]; // @[el2_lib.scala 197:37] + wire _T_889 = _T_888 & _T_826; // @[el2_lib.scala 197:42] + wire _T_892 = io_trigger_pkt_any_3_tdata2[9] == _T_818[9]; // @[el2_lib.scala 197:79] + wire _T_893 = _T_889 | _T_892; // @[el2_lib.scala 197:24] + wire _T_895 = &io_trigger_pkt_any_3_tdata2[9:0]; // @[el2_lib.scala 197:37] + wire _T_896 = _T_895 & _T_826; // @[el2_lib.scala 197:42] + wire _T_899 = io_trigger_pkt_any_3_tdata2[10] == _T_818[10]; // @[el2_lib.scala 197:79] + wire _T_900 = _T_896 | _T_899; // @[el2_lib.scala 197:24] + wire _T_902 = &io_trigger_pkt_any_3_tdata2[10:0]; // @[el2_lib.scala 197:37] + wire _T_903 = _T_902 & _T_826; // @[el2_lib.scala 197:42] + wire _T_906 = io_trigger_pkt_any_3_tdata2[11] == _T_818[11]; // @[el2_lib.scala 197:79] + wire _T_907 = _T_903 | _T_906; // @[el2_lib.scala 197:24] + wire _T_909 = &io_trigger_pkt_any_3_tdata2[11:0]; // @[el2_lib.scala 197:37] + wire _T_910 = _T_909 & _T_826; // @[el2_lib.scala 197:42] + wire _T_913 = io_trigger_pkt_any_3_tdata2[12] == _T_818[12]; // @[el2_lib.scala 197:79] + wire _T_914 = _T_910 | _T_913; // @[el2_lib.scala 197:24] + wire _T_916 = &io_trigger_pkt_any_3_tdata2[12:0]; // @[el2_lib.scala 197:37] + wire _T_917 = _T_916 & _T_826; // @[el2_lib.scala 197:42] + wire _T_920 = io_trigger_pkt_any_3_tdata2[13] == _T_818[13]; // @[el2_lib.scala 197:79] + wire _T_921 = _T_917 | _T_920; // @[el2_lib.scala 197:24] + wire _T_923 = &io_trigger_pkt_any_3_tdata2[13:0]; // @[el2_lib.scala 197:37] + wire _T_924 = _T_923 & _T_826; // @[el2_lib.scala 197:42] + wire _T_927 = io_trigger_pkt_any_3_tdata2[14] == _T_818[14]; // @[el2_lib.scala 197:79] + wire _T_928 = _T_924 | _T_927; // @[el2_lib.scala 197:24] + wire _T_930 = &io_trigger_pkt_any_3_tdata2[14:0]; // @[el2_lib.scala 197:37] + wire _T_931 = _T_930 & _T_826; // @[el2_lib.scala 197:42] + wire _T_934 = io_trigger_pkt_any_3_tdata2[15] == _T_818[15]; // @[el2_lib.scala 197:79] + wire _T_935 = _T_931 | _T_934; // @[el2_lib.scala 197:24] + wire _T_937 = &io_trigger_pkt_any_3_tdata2[15:0]; // @[el2_lib.scala 197:37] + wire _T_938 = _T_937 & _T_826; // @[el2_lib.scala 197:42] + wire _T_941 = io_trigger_pkt_any_3_tdata2[16] == _T_818[16]; // @[el2_lib.scala 197:79] + wire _T_942 = _T_938 | _T_941; // @[el2_lib.scala 197:24] + wire _T_944 = &io_trigger_pkt_any_3_tdata2[16:0]; // @[el2_lib.scala 197:37] + wire _T_945 = _T_944 & _T_826; // @[el2_lib.scala 197:42] + wire _T_948 = io_trigger_pkt_any_3_tdata2[17] == _T_818[17]; // @[el2_lib.scala 197:79] + wire _T_949 = _T_945 | _T_948; // @[el2_lib.scala 197:24] + wire _T_951 = &io_trigger_pkt_any_3_tdata2[17:0]; // @[el2_lib.scala 197:37] + wire _T_952 = _T_951 & _T_826; // @[el2_lib.scala 197:42] + wire _T_955 = io_trigger_pkt_any_3_tdata2[18] == _T_818[18]; // @[el2_lib.scala 197:79] + wire _T_956 = _T_952 | _T_955; // @[el2_lib.scala 197:24] + wire _T_958 = &io_trigger_pkt_any_3_tdata2[18:0]; // @[el2_lib.scala 197:37] + wire _T_959 = _T_958 & _T_826; // @[el2_lib.scala 197:42] + wire _T_962 = io_trigger_pkt_any_3_tdata2[19] == _T_818[19]; // @[el2_lib.scala 197:79] + wire _T_963 = _T_959 | _T_962; // @[el2_lib.scala 197:24] + wire _T_965 = &io_trigger_pkt_any_3_tdata2[19:0]; // @[el2_lib.scala 197:37] + wire _T_966 = _T_965 & _T_826; // @[el2_lib.scala 197:42] + wire _T_969 = io_trigger_pkt_any_3_tdata2[20] == _T_818[20]; // @[el2_lib.scala 197:79] + wire _T_970 = _T_966 | _T_969; // @[el2_lib.scala 197:24] + wire _T_972 = &io_trigger_pkt_any_3_tdata2[20:0]; // @[el2_lib.scala 197:37] + wire _T_973 = _T_972 & _T_826; // @[el2_lib.scala 197:42] + wire _T_976 = io_trigger_pkt_any_3_tdata2[21] == _T_818[21]; // @[el2_lib.scala 197:79] + wire _T_977 = _T_973 | _T_976; // @[el2_lib.scala 197:24] + wire _T_979 = &io_trigger_pkt_any_3_tdata2[21:0]; // @[el2_lib.scala 197:37] + wire _T_980 = _T_979 & _T_826; // @[el2_lib.scala 197:42] + wire _T_983 = io_trigger_pkt_any_3_tdata2[22] == _T_818[22]; // @[el2_lib.scala 197:79] + wire _T_984 = _T_980 | _T_983; // @[el2_lib.scala 197:24] + wire _T_986 = &io_trigger_pkt_any_3_tdata2[22:0]; // @[el2_lib.scala 197:37] + wire _T_987 = _T_986 & _T_826; // @[el2_lib.scala 197:42] + wire _T_990 = io_trigger_pkt_any_3_tdata2[23] == _T_818[23]; // @[el2_lib.scala 197:79] + wire _T_991 = _T_987 | _T_990; // @[el2_lib.scala 197:24] + wire _T_993 = &io_trigger_pkt_any_3_tdata2[23:0]; // @[el2_lib.scala 197:37] + wire _T_994 = _T_993 & _T_826; // @[el2_lib.scala 197:42] + wire _T_997 = io_trigger_pkt_any_3_tdata2[24] == _T_818[24]; // @[el2_lib.scala 197:79] + wire _T_998 = _T_994 | _T_997; // @[el2_lib.scala 197:24] + wire _T_1000 = &io_trigger_pkt_any_3_tdata2[24:0]; // @[el2_lib.scala 197:37] + wire _T_1001 = _T_1000 & _T_826; // @[el2_lib.scala 197:42] + wire _T_1004 = io_trigger_pkt_any_3_tdata2[25] == _T_818[25]; // @[el2_lib.scala 197:79] + wire _T_1005 = _T_1001 | _T_1004; // @[el2_lib.scala 197:24] + wire _T_1007 = &io_trigger_pkt_any_3_tdata2[25:0]; // @[el2_lib.scala 197:37] + wire _T_1008 = _T_1007 & _T_826; // @[el2_lib.scala 197:42] + wire _T_1011 = io_trigger_pkt_any_3_tdata2[26] == _T_818[26]; // @[el2_lib.scala 197:79] + wire _T_1012 = _T_1008 | _T_1011; // @[el2_lib.scala 197:24] + wire _T_1014 = &io_trigger_pkt_any_3_tdata2[26:0]; // @[el2_lib.scala 197:37] + wire _T_1015 = _T_1014 & _T_826; // @[el2_lib.scala 197:42] + wire _T_1018 = io_trigger_pkt_any_3_tdata2[27] == _T_818[27]; // @[el2_lib.scala 197:79] + wire _T_1019 = _T_1015 | _T_1018; // @[el2_lib.scala 197:24] + wire _T_1021 = &io_trigger_pkt_any_3_tdata2[27:0]; // @[el2_lib.scala 197:37] + wire _T_1022 = _T_1021 & _T_826; // @[el2_lib.scala 197:42] + wire _T_1025 = io_trigger_pkt_any_3_tdata2[28] == _T_818[28]; // @[el2_lib.scala 197:79] + wire _T_1026 = _T_1022 | _T_1025; // @[el2_lib.scala 197:24] + wire _T_1028 = &io_trigger_pkt_any_3_tdata2[28:0]; // @[el2_lib.scala 197:37] + wire _T_1029 = _T_1028 & _T_826; // @[el2_lib.scala 197:42] + wire _T_1032 = io_trigger_pkt_any_3_tdata2[29] == _T_818[29]; // @[el2_lib.scala 197:79] + wire _T_1033 = _T_1029 | _T_1032; // @[el2_lib.scala 197:24] + wire _T_1035 = &io_trigger_pkt_any_3_tdata2[29:0]; // @[el2_lib.scala 197:37] + wire _T_1036 = _T_1035 & _T_826; // @[el2_lib.scala 197:42] + wire _T_1039 = io_trigger_pkt_any_3_tdata2[30] == _T_818[30]; // @[el2_lib.scala 197:79] + wire _T_1040 = _T_1036 | _T_1039; // @[el2_lib.scala 197:24] + wire _T_1042 = &io_trigger_pkt_any_3_tdata2[30:0]; // @[el2_lib.scala 197:37] + wire _T_1043 = _T_1042 & _T_826; // @[el2_lib.scala 197:42] + wire _T_1046 = io_trigger_pkt_any_3_tdata2[31] == _T_818[31]; // @[el2_lib.scala 197:79] + wire _T_1047 = _T_1043 | _T_1046; // @[el2_lib.scala 197:24] + wire [7:0] _T_1054 = {_T_879,_T_872,_T_865,_T_858,_T_851,_T_844,_T_837,_T_830}; // @[el2_lib.scala 198:14] + wire [15:0] _T_1062 = {_T_935,_T_928,_T_921,_T_914,_T_907,_T_900,_T_893,_T_886,_T_1054}; // @[el2_lib.scala 198:14] + wire [7:0] _T_1069 = {_T_991,_T_984,_T_977,_T_970,_T_963,_T_956,_T_949,_T_942}; // @[el2_lib.scala 198:14] + wire [31:0] _T_1078 = {_T_1047,_T_1040,_T_1033,_T_1026,_T_1019,_T_1012,_T_1005,_T_998,_T_1069,_T_1062}; // @[el2_lib.scala 198:14] + wire lsu_trigger_data_match_3 = &_T_1078; // @[el2_lib.scala 198:21] + wire _T_1079 = ~io_lsu_pkt_m_dma; // @[el2_lsu_trigger.scala 26:74] + wire _T_1080 = io_lsu_pkt_m_valid & _T_1079; // @[el2_lsu_trigger.scala 26:72] + wire _T_1081 = io_trigger_pkt_any_0_store & io_lsu_pkt_m_store; // @[el2_lsu_trigger.scala 26:123] + wire _T_1082 = _T_1080 & _T_1081; // @[el2_lsu_trigger.scala 26:92] + wire _T_1083 = io_trigger_pkt_any_0_load & io_lsu_pkt_m_load; // @[el2_lsu_trigger.scala 27:33] + wire _T_1085 = _T_1083 & _T_12; // @[el2_lsu_trigger.scala 27:53] + wire _T_1086 = _T_1085 & lsu_trigger_data_match_0; // @[el2_lsu_trigger.scala 27:85] + wire _T_1087 = _T_1082 | _T_1086; // @[el2_lsu_trigger.scala 26:144] + wire _T_1090 = io_trigger_pkt_any_1_store & io_lsu_pkt_m_store; // @[el2_lsu_trigger.scala 26:123] + wire _T_1091 = _T_1080 & _T_1090; // @[el2_lsu_trigger.scala 26:92] + wire _T_1092 = io_trigger_pkt_any_1_load & io_lsu_pkt_m_load; // @[el2_lsu_trigger.scala 27:33] + wire _T_1094 = _T_1092 & _T_279; // @[el2_lsu_trigger.scala 27:53] + wire _T_1095 = _T_1094 & lsu_trigger_data_match_1; // @[el2_lsu_trigger.scala 27:85] + wire _T_1096 = _T_1091 | _T_1095; // @[el2_lsu_trigger.scala 26:144] + wire _T_1099 = io_trigger_pkt_any_2_store & io_lsu_pkt_m_store; // @[el2_lsu_trigger.scala 26:123] + wire _T_1100 = _T_1080 & _T_1099; // @[el2_lsu_trigger.scala 26:92] + wire _T_1101 = io_trigger_pkt_any_2_load & io_lsu_pkt_m_load; // @[el2_lsu_trigger.scala 27:33] + wire _T_1103 = _T_1101 & _T_546; // @[el2_lsu_trigger.scala 27:53] + wire _T_1104 = _T_1103 & lsu_trigger_data_match_2; // @[el2_lsu_trigger.scala 27:85] + wire _T_1105 = _T_1100 | _T_1104; // @[el2_lsu_trigger.scala 26:144] + wire _T_1108 = io_trigger_pkt_any_3_store & io_lsu_pkt_m_store; // @[el2_lsu_trigger.scala 26:123] + wire _T_1109 = _T_1080 & _T_1108; // @[el2_lsu_trigger.scala 26:92] + wire _T_1110 = io_trigger_pkt_any_3_load & io_lsu_pkt_m_load; // @[el2_lsu_trigger.scala 27:33] + wire _T_1112 = _T_1110 & _T_813; // @[el2_lsu_trigger.scala 27:53] + wire _T_1113 = _T_1112 & lsu_trigger_data_match_3; // @[el2_lsu_trigger.scala 27:85] + wire _T_1114 = _T_1109 | _T_1113; // @[el2_lsu_trigger.scala 26:144] + wire [2:0] _T_1117 = {_T_1114,_T_1105,_T_1096}; // @[Cat.scala 29:58] + assign io_lsu_trigger_match_m = {_T_1117,_T_1087}; // @[el2_lsu_trigger.scala 15:25 el2_lsu_trigger.scala 26:26] +endmodule +module el2_lsu_clkdomain( + input clock, + input reset, + input io_clk_override, + input io_dma_dccm_req, + input io_ldst_stbuf_reqvld_r, + input io_stbuf_reqvld_any, + input io_stbuf_reqvld_flushed_any, + input io_lsu_bus_clk_en, + input io_lsu_p_valid, + input io_lsu_pkt_d_store, + input io_lsu_pkt_d_valid, + input io_lsu_pkt_m_store, + input io_lsu_pkt_m_valid, + output io_lsu_c1_m_clk, + output io_lsu_c1_r_clk, + output io_lsu_c2_m_clk, + output io_lsu_c2_r_clk, + output io_lsu_stbuf_c1_clk, + output io_lsu_free_c2_clk, + input io_scan_mode +); +`ifdef RANDOMIZE_REG_INIT + reg [31:0] _RAND_0; + reg [31:0] _RAND_1; + reg [31:0] _RAND_2; +`endif // RANDOMIZE_REG_INIT + wire lsu_c1m_cgc_io_l1clk; // @[el2_lsu_clkdomain.scala 88:35] + wire lsu_c1m_cgc_io_clk; // @[el2_lsu_clkdomain.scala 88:35] + wire lsu_c1m_cgc_io_en; // @[el2_lsu_clkdomain.scala 88:35] + wire lsu_c1m_cgc_io_scan_mode; // @[el2_lsu_clkdomain.scala 88:35] + wire lsu_c1r_cgc_io_l1clk; // @[el2_lsu_clkdomain.scala 89:35] + wire lsu_c1r_cgc_io_clk; // @[el2_lsu_clkdomain.scala 89:35] + wire lsu_c1r_cgc_io_en; // @[el2_lsu_clkdomain.scala 89:35] + wire lsu_c1r_cgc_io_scan_mode; // @[el2_lsu_clkdomain.scala 89:35] + wire lsu_c2m_cgc_io_l1clk; // @[el2_lsu_clkdomain.scala 90:35] + wire lsu_c2m_cgc_io_clk; // @[el2_lsu_clkdomain.scala 90:35] + wire lsu_c2m_cgc_io_en; // @[el2_lsu_clkdomain.scala 90:35] + wire lsu_c2m_cgc_io_scan_mode; // @[el2_lsu_clkdomain.scala 90:35] + wire lsu_c2r_cgc_io_l1clk; // @[el2_lsu_clkdomain.scala 91:35] + wire lsu_c2r_cgc_io_clk; // @[el2_lsu_clkdomain.scala 91:35] + wire lsu_c2r_cgc_io_en; // @[el2_lsu_clkdomain.scala 91:35] + wire lsu_c2r_cgc_io_scan_mode; // @[el2_lsu_clkdomain.scala 91:35] + wire lsu_store_c1m_cgc_io_l1clk; // @[el2_lsu_clkdomain.scala 92:35] + wire lsu_store_c1m_cgc_io_clk; // @[el2_lsu_clkdomain.scala 92:35] + wire lsu_store_c1m_cgc_io_en; // @[el2_lsu_clkdomain.scala 92:35] + wire lsu_store_c1m_cgc_io_scan_mode; // @[el2_lsu_clkdomain.scala 92:35] + wire lsu_store_c1r_cgc_io_l1clk; // @[el2_lsu_clkdomain.scala 93:35] + wire lsu_store_c1r_cgc_io_clk; // @[el2_lsu_clkdomain.scala 93:35] + wire lsu_store_c1r_cgc_io_en; // @[el2_lsu_clkdomain.scala 93:35] + wire lsu_store_c1r_cgc_io_scan_mode; // @[el2_lsu_clkdomain.scala 93:35] + wire lsu_stbuf_c1_cgc_io_l1clk; // @[el2_lsu_clkdomain.scala 94:35] + wire lsu_stbuf_c1_cgc_io_clk; // @[el2_lsu_clkdomain.scala 94:35] + wire lsu_stbuf_c1_cgc_io_en; // @[el2_lsu_clkdomain.scala 94:35] + wire lsu_stbuf_c1_cgc_io_scan_mode; // @[el2_lsu_clkdomain.scala 94:35] + wire lsu_bus_ibuf_c1_cgc_io_l1clk; // @[el2_lsu_clkdomain.scala 95:35] + wire lsu_bus_ibuf_c1_cgc_io_clk; // @[el2_lsu_clkdomain.scala 95:35] + wire lsu_bus_ibuf_c1_cgc_io_en; // @[el2_lsu_clkdomain.scala 95:35] + wire lsu_bus_ibuf_c1_cgc_io_scan_mode; // @[el2_lsu_clkdomain.scala 95:35] + wire lsu_bus_obuf_c1_cgc_io_l1clk; // @[el2_lsu_clkdomain.scala 96:35] + wire lsu_bus_obuf_c1_cgc_io_clk; // @[el2_lsu_clkdomain.scala 96:35] + wire lsu_bus_obuf_c1_cgc_io_en; // @[el2_lsu_clkdomain.scala 96:35] + wire lsu_bus_obuf_c1_cgc_io_scan_mode; // @[el2_lsu_clkdomain.scala 96:35] + wire lsu_bus_buf_c1_cgc_io_l1clk; // @[el2_lsu_clkdomain.scala 97:35] + wire lsu_bus_buf_c1_cgc_io_clk; // @[el2_lsu_clkdomain.scala 97:35] + wire lsu_bus_buf_c1_cgc_io_en; // @[el2_lsu_clkdomain.scala 97:35] + wire lsu_bus_buf_c1_cgc_io_scan_mode; // @[el2_lsu_clkdomain.scala 97:35] + wire lsu_busm_cgc_io_l1clk; // @[el2_lsu_clkdomain.scala 98:35] + wire lsu_busm_cgc_io_clk; // @[el2_lsu_clkdomain.scala 98:35] + wire lsu_busm_cgc_io_en; // @[el2_lsu_clkdomain.scala 98:35] + wire lsu_busm_cgc_io_scan_mode; // @[el2_lsu_clkdomain.scala 98:35] + wire lsu_free_cgc_io_l1clk; // @[el2_lsu_clkdomain.scala 99:35] + wire lsu_free_cgc_io_clk; // @[el2_lsu_clkdomain.scala 99:35] + wire lsu_free_cgc_io_en; // @[el2_lsu_clkdomain.scala 99:35] + wire lsu_free_cgc_io_scan_mode; // @[el2_lsu_clkdomain.scala 99:35] + wire _T = io_lsu_p_valid | io_dma_dccm_req; // @[el2_lsu_clkdomain.scala 64:51] + reg lsu_c1_d_clken_q; // @[el2_lsu_clkdomain.scala 84:67] + wire _T_1 = io_lsu_pkt_d_valid | lsu_c1_d_clken_q; // @[el2_lsu_clkdomain.scala 65:51] + wire lsu_c1_m_clken = _T_1 | io_clk_override; // @[el2_lsu_clkdomain.scala 65:70] + reg lsu_c1_m_clken_q; // @[el2_lsu_clkdomain.scala 85:67] + wire _T_2 = io_lsu_pkt_m_valid | lsu_c1_m_clken_q; // @[el2_lsu_clkdomain.scala 66:51] + wire lsu_c1_r_clken = _T_2 | io_clk_override; // @[el2_lsu_clkdomain.scala 66:70] + wire _T_3 = lsu_c1_m_clken | lsu_c1_m_clken_q; // @[el2_lsu_clkdomain.scala 68:47] + reg lsu_c1_r_clken_q; // @[el2_lsu_clkdomain.scala 86:67] + wire _T_4 = lsu_c1_r_clken | lsu_c1_r_clken_q; // @[el2_lsu_clkdomain.scala 69:47] + wire _T_5 = lsu_c1_m_clken & io_lsu_pkt_d_store; // @[el2_lsu_clkdomain.scala 71:49] + wire _T_6 = lsu_c1_r_clken & io_lsu_pkt_m_store; // @[el2_lsu_clkdomain.scala 72:49] + wire _T_7 = io_ldst_stbuf_reqvld_r | io_stbuf_reqvld_any; // @[el2_lsu_clkdomain.scala 73:55] + wire _T_8 = _T_7 | io_stbuf_reqvld_flushed_any; // @[el2_lsu_clkdomain.scala 73:77] + rvclkhdr lsu_c1m_cgc ( // @[el2_lsu_clkdomain.scala 88:35] + .io_l1clk(lsu_c1m_cgc_io_l1clk), + .io_clk(lsu_c1m_cgc_io_clk), + .io_en(lsu_c1m_cgc_io_en), + .io_scan_mode(lsu_c1m_cgc_io_scan_mode) + ); + rvclkhdr lsu_c1r_cgc ( // @[el2_lsu_clkdomain.scala 89:35] + .io_l1clk(lsu_c1r_cgc_io_l1clk), + .io_clk(lsu_c1r_cgc_io_clk), + .io_en(lsu_c1r_cgc_io_en), + .io_scan_mode(lsu_c1r_cgc_io_scan_mode) + ); + rvclkhdr lsu_c2m_cgc ( // @[el2_lsu_clkdomain.scala 90:35] + .io_l1clk(lsu_c2m_cgc_io_l1clk), + .io_clk(lsu_c2m_cgc_io_clk), + .io_en(lsu_c2m_cgc_io_en), + .io_scan_mode(lsu_c2m_cgc_io_scan_mode) + ); + rvclkhdr lsu_c2r_cgc ( // @[el2_lsu_clkdomain.scala 91:35] + .io_l1clk(lsu_c2r_cgc_io_l1clk), + .io_clk(lsu_c2r_cgc_io_clk), + .io_en(lsu_c2r_cgc_io_en), + .io_scan_mode(lsu_c2r_cgc_io_scan_mode) + ); + rvclkhdr lsu_store_c1m_cgc ( // @[el2_lsu_clkdomain.scala 92:35] + .io_l1clk(lsu_store_c1m_cgc_io_l1clk), + .io_clk(lsu_store_c1m_cgc_io_clk), + .io_en(lsu_store_c1m_cgc_io_en), + .io_scan_mode(lsu_store_c1m_cgc_io_scan_mode) + ); + rvclkhdr lsu_store_c1r_cgc ( // @[el2_lsu_clkdomain.scala 93:35] + .io_l1clk(lsu_store_c1r_cgc_io_l1clk), + .io_clk(lsu_store_c1r_cgc_io_clk), + .io_en(lsu_store_c1r_cgc_io_en), + .io_scan_mode(lsu_store_c1r_cgc_io_scan_mode) + ); + rvclkhdr lsu_stbuf_c1_cgc ( // @[el2_lsu_clkdomain.scala 94:35] + .io_l1clk(lsu_stbuf_c1_cgc_io_l1clk), + .io_clk(lsu_stbuf_c1_cgc_io_clk), + .io_en(lsu_stbuf_c1_cgc_io_en), + .io_scan_mode(lsu_stbuf_c1_cgc_io_scan_mode) + ); + rvclkhdr lsu_bus_ibuf_c1_cgc ( // @[el2_lsu_clkdomain.scala 95:35] + .io_l1clk(lsu_bus_ibuf_c1_cgc_io_l1clk), + .io_clk(lsu_bus_ibuf_c1_cgc_io_clk), + .io_en(lsu_bus_ibuf_c1_cgc_io_en), + .io_scan_mode(lsu_bus_ibuf_c1_cgc_io_scan_mode) + ); + rvclkhdr lsu_bus_obuf_c1_cgc ( // @[el2_lsu_clkdomain.scala 96:35] + .io_l1clk(lsu_bus_obuf_c1_cgc_io_l1clk), + .io_clk(lsu_bus_obuf_c1_cgc_io_clk), + .io_en(lsu_bus_obuf_c1_cgc_io_en), + .io_scan_mode(lsu_bus_obuf_c1_cgc_io_scan_mode) + ); + rvclkhdr lsu_bus_buf_c1_cgc ( // @[el2_lsu_clkdomain.scala 97:35] + .io_l1clk(lsu_bus_buf_c1_cgc_io_l1clk), + .io_clk(lsu_bus_buf_c1_cgc_io_clk), + .io_en(lsu_bus_buf_c1_cgc_io_en), + .io_scan_mode(lsu_bus_buf_c1_cgc_io_scan_mode) + ); + rvclkhdr lsu_busm_cgc ( // @[el2_lsu_clkdomain.scala 98:35] + .io_l1clk(lsu_busm_cgc_io_l1clk), + .io_clk(lsu_busm_cgc_io_clk), + .io_en(lsu_busm_cgc_io_en), + .io_scan_mode(lsu_busm_cgc_io_scan_mode) + ); + rvclkhdr lsu_free_cgc ( // @[el2_lsu_clkdomain.scala 99:35] + .io_l1clk(lsu_free_cgc_io_l1clk), + .io_clk(lsu_free_cgc_io_clk), + .io_en(lsu_free_cgc_io_en), + .io_scan_mode(lsu_free_cgc_io_scan_mode) + ); + assign io_lsu_c1_m_clk = lsu_c1m_cgc_io_l1clk; // @[el2_lsu_clkdomain.scala 88:127] + assign io_lsu_c1_r_clk = lsu_c1r_cgc_io_l1clk; // @[el2_lsu_clkdomain.scala 89:127] + assign io_lsu_c2_m_clk = lsu_c2m_cgc_io_l1clk; // @[el2_lsu_clkdomain.scala 90:127] + assign io_lsu_c2_r_clk = lsu_c2r_cgc_io_l1clk; // @[el2_lsu_clkdomain.scala 91:127] + assign io_lsu_stbuf_c1_clk = lsu_stbuf_c1_cgc_io_l1clk; // @[el2_lsu_clkdomain.scala 94:127] + assign io_lsu_free_c2_clk = lsu_free_cgc_io_l1clk; // @[el2_lsu_clkdomain.scala 99:127] + assign lsu_c1m_cgc_io_clk = clock; // @[el2_lsu_clkdomain.scala 101:30] + assign lsu_c1m_cgc_io_en = _T_1 | io_clk_override; // @[el2_lsu_clkdomain.scala 88:77] + assign lsu_c1m_cgc_io_scan_mode = io_scan_mode; // @[el2_lsu_clkdomain.scala 101:75] + assign lsu_c1r_cgc_io_clk = clock; // @[el2_lsu_clkdomain.scala 102:30] + assign lsu_c1r_cgc_io_en = _T_2 | io_clk_override; // @[el2_lsu_clkdomain.scala 89:77] + assign lsu_c1r_cgc_io_scan_mode = io_scan_mode; // @[el2_lsu_clkdomain.scala 102:75] + assign lsu_c2m_cgc_io_clk = clock; // @[el2_lsu_clkdomain.scala 103:30] + assign lsu_c2m_cgc_io_en = _T_3 | io_clk_override; // @[el2_lsu_clkdomain.scala 90:77] + assign lsu_c2m_cgc_io_scan_mode = io_scan_mode; // @[el2_lsu_clkdomain.scala 103:75] + assign lsu_c2r_cgc_io_clk = clock; // @[el2_lsu_clkdomain.scala 104:30] + assign lsu_c2r_cgc_io_en = _T_4 | io_clk_override; // @[el2_lsu_clkdomain.scala 91:77] + assign lsu_c2r_cgc_io_scan_mode = io_scan_mode; // @[el2_lsu_clkdomain.scala 104:75] + assign lsu_store_c1m_cgc_io_clk = clock; // @[el2_lsu_clkdomain.scala 105:30] + assign lsu_store_c1m_cgc_io_en = _T_5 | io_clk_override; // @[el2_lsu_clkdomain.scala 92:77] + assign lsu_store_c1m_cgc_io_scan_mode = io_scan_mode; // @[el2_lsu_clkdomain.scala 105:75] + assign lsu_store_c1r_cgc_io_clk = clock; // @[el2_lsu_clkdomain.scala 106:30] + assign lsu_store_c1r_cgc_io_en = _T_6 | io_clk_override; // @[el2_lsu_clkdomain.scala 93:77] + assign lsu_store_c1r_cgc_io_scan_mode = io_scan_mode; // @[el2_lsu_clkdomain.scala 106:75] + assign lsu_stbuf_c1_cgc_io_clk = clock; // @[el2_lsu_clkdomain.scala 107:30] + assign lsu_stbuf_c1_cgc_io_en = _T_8 | io_clk_override; // @[el2_lsu_clkdomain.scala 94:77] + assign lsu_stbuf_c1_cgc_io_scan_mode = io_scan_mode; // @[el2_lsu_clkdomain.scala 107:75] + assign lsu_bus_ibuf_c1_cgc_io_clk = clock; // @[el2_lsu_clkdomain.scala 108:30] + assign lsu_bus_ibuf_c1_cgc_io_en = io_clk_override; // @[el2_lsu_clkdomain.scala 95:77] + assign lsu_bus_ibuf_c1_cgc_io_scan_mode = io_scan_mode; // @[el2_lsu_clkdomain.scala 108:75] + assign lsu_bus_obuf_c1_cgc_io_clk = clock; // @[el2_lsu_clkdomain.scala 109:30] + assign lsu_bus_obuf_c1_cgc_io_en = io_clk_override & io_lsu_bus_clk_en; // @[el2_lsu_clkdomain.scala 96:77] + assign lsu_bus_obuf_c1_cgc_io_scan_mode = io_scan_mode; // @[el2_lsu_clkdomain.scala 109:75] + assign lsu_bus_buf_c1_cgc_io_clk = clock; // @[el2_lsu_clkdomain.scala 110:30] + assign lsu_bus_buf_c1_cgc_io_en = 1'h1; // @[el2_lsu_clkdomain.scala 97:77] + assign lsu_bus_buf_c1_cgc_io_scan_mode = io_scan_mode; // @[el2_lsu_clkdomain.scala 110:75] + assign lsu_busm_cgc_io_clk = clock; // @[el2_lsu_clkdomain.scala 111:30] + assign lsu_busm_cgc_io_en = io_lsu_bus_clk_en; // @[el2_lsu_clkdomain.scala 98:77] + assign lsu_busm_cgc_io_scan_mode = io_scan_mode; // @[el2_lsu_clkdomain.scala 111:75] + assign lsu_free_cgc_io_clk = clock; // @[el2_lsu_clkdomain.scala 112:30] + assign lsu_free_cgc_io_en = 1'h1; // @[el2_lsu_clkdomain.scala 99:77] + assign lsu_free_cgc_io_scan_mode = io_scan_mode; // @[el2_lsu_clkdomain.scala 112:75] +`ifdef RANDOMIZE_GARBAGE_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_INVALID_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_REG_INIT +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_MEM_INIT +`define RANDOMIZE +`endif +`ifndef RANDOM +`define RANDOM $random +`endif +`ifdef RANDOMIZE_MEM_INIT + integer initvar; +`endif +`ifndef SYNTHESIS +`ifdef FIRRTL_BEFORE_INITIAL +`FIRRTL_BEFORE_INITIAL +`endif +initial begin + `ifdef RANDOMIZE + `ifdef INIT_RANDOM + `INIT_RANDOM + `endif + `ifndef VERILATOR + `ifdef RANDOMIZE_DELAY + #`RANDOMIZE_DELAY begin end + `else + #0.002 begin end + `endif + `endif +`ifdef RANDOMIZE_REG_INIT + _RAND_0 = {1{`RANDOM}}; + lsu_c1_d_clken_q = _RAND_0[0:0]; + _RAND_1 = {1{`RANDOM}}; + lsu_c1_m_clken_q = _RAND_1[0:0]; + _RAND_2 = {1{`RANDOM}}; + lsu_c1_r_clken_q = _RAND_2[0:0]; +`endif // RANDOMIZE_REG_INIT + if (reset) begin + lsu_c1_d_clken_q = 1'h0; + end + if (reset) begin + lsu_c1_m_clken_q = 1'h0; + end + if (reset) begin + lsu_c1_r_clken_q = 1'h0; + end + `endif // RANDOMIZE +end // initial +`ifdef FIRRTL_AFTER_INITIAL +`FIRRTL_AFTER_INITIAL +`endif +`endif // SYNTHESIS + always @(posedge io_lsu_free_c2_clk or posedge reset) begin + if (reset) begin + lsu_c1_d_clken_q <= 1'h0; + end else begin + lsu_c1_d_clken_q <= _T | io_clk_override; + end + end + always @(posedge io_lsu_free_c2_clk or posedge reset) begin + if (reset) begin + lsu_c1_m_clken_q <= 1'h0; + end else begin + lsu_c1_m_clken_q <= _T_1 | io_clk_override; + end + end + always @(posedge io_lsu_free_c2_clk or posedge reset) begin + if (reset) begin + lsu_c1_r_clken_q <= 1'h0; + end else begin + lsu_c1_r_clken_q <= _T_2 | io_clk_override; + end + end +endmodule +module el2_lsu( + input clock, + input reset, + input io_clk_override, + input io_dec_tlu_flush_lower_r, + input io_dec_tlu_i0_kill_writeb_r, + input io_dec_tlu_force_halt, + input io_dec_tlu_external_ldfwd_disable, + input io_dec_tlu_wb_coalescing_disable, + input io_dec_tlu_sideeffect_posted_disable, + input io_dec_tlu_core_ecc_disable, + input [31:0] io_exu_lsu_rs1_d, + input [31:0] io_exu_lsu_rs2_d, + input [11:0] io_dec_lsu_offset_d, + input io_lsu_p_fast_int, + input io_lsu_p_by, + input io_lsu_p_half, + input io_lsu_p_word, + input io_lsu_p_dword, + input io_lsu_p_load, + input io_lsu_p_store, + input io_lsu_p_unsign, + input io_lsu_p_dma, + input io_lsu_p_store_data_bypass_d, + input io_lsu_p_load_ldst_bypass_d, + input io_lsu_p_store_data_bypass_m, + input io_lsu_p_valid, + input io_trigger_pkt_any_0_select, + input io_trigger_pkt_any_0_match_, + input io_trigger_pkt_any_0_store, + input io_trigger_pkt_any_0_load, + input io_trigger_pkt_any_0_execute, + input io_trigger_pkt_any_0_m, + input [31:0] io_trigger_pkt_any_0_tdata2, + input io_trigger_pkt_any_1_select, + input io_trigger_pkt_any_1_match_, + input io_trigger_pkt_any_1_store, + input io_trigger_pkt_any_1_load, + input io_trigger_pkt_any_1_execute, + input io_trigger_pkt_any_1_m, + input [31:0] io_trigger_pkt_any_1_tdata2, + input io_trigger_pkt_any_2_select, + input io_trigger_pkt_any_2_match_, + input io_trigger_pkt_any_2_store, + input io_trigger_pkt_any_2_load, + input io_trigger_pkt_any_2_execute, + input io_trigger_pkt_any_2_m, + input [31:0] io_trigger_pkt_any_2_tdata2, + input io_trigger_pkt_any_3_select, + input io_trigger_pkt_any_3_match_, + input io_trigger_pkt_any_3_store, + input io_trigger_pkt_any_3_load, + input io_trigger_pkt_any_3_execute, + input io_trigger_pkt_any_3_m, + input [31:0] io_trigger_pkt_any_3_tdata2, + input io_dec_lsu_valid_raw_d, + input [31:0] io_dec_tlu_mrac_ff, + output io_lsu_load_stall_any, + output io_lsu_store_stall_any, + output io_lsu_fastint_stall_any, + output io_lsu_idle_any, + output [31:0] io_lsu_fir_addr, + output [1:0] io_lsu_fir_error, + output io_lsu_single_ecc_error_incr, + output io_lsu_error_pkt_r_exc_valid, + output io_lsu_error_pkt_r_single_ecc_error, + output io_lsu_error_pkt_r_inst_type, + output io_lsu_error_pkt_r_exc_type, + output [3:0] io_lsu_error_pkt_r_mscause, + output [31:0] io_lsu_error_pkt_r_addr, + output io_lsu_imprecise_error_load_any, + output io_lsu_imprecise_error_store_any, + output [31:0] io_lsu_imprecise_error_addr_any, + output io_lsu_nonblock_load_valid_m, + output [1:0] io_lsu_nonblock_load_tag_m, + output io_lsu_nonblock_load_inv_r, + output [1:0] io_lsu_nonblock_load_inv_tag_r, + output io_lsu_nonblock_load_data_valid, + output io_lsu_nonblock_load_data_error, + output [1:0] io_lsu_nonblock_load_data_tag, + output [31:0] io_lsu_nonblock_load_data, + output io_lsu_pmu_load_external_m, + output io_lsu_pmu_store_external_m, + output io_lsu_pmu_misaligned_m, + output io_lsu_pmu_bus_trxn, + output io_lsu_pmu_bus_misaligned, + output io_lsu_pmu_bus_error, + output io_lsu_pmu_bus_busy, + output [3:0] io_lsu_trigger_match_m, + output io_dccm_wren, + output io_dccm_rden, + output [15:0] io_dccm_wr_addr_lo, + output [15:0] io_dccm_wr_addr_hi, + output [15:0] io_dccm_rd_addr_lo, + output [15:0] io_dccm_rd_addr_hi, + output [38:0] io_dccm_wr_data_lo, + output [38:0] io_dccm_wr_data_hi, + input [38:0] io_dccm_rd_data_lo, + input [38:0] io_dccm_rd_data_hi, + output io_picm_wren, + output io_picm_rden, + output io_picm_mken, + output [31:0] io_picm_rdaddr, + output [31:0] io_picm_wraddr, + output [31:0] io_picm_wr_data, + input [31:0] io_picm_rd_data, + output io_lsu_axi_awvalid, + output io_lsu_axi_awlock, + input io_lsu_axi_awready, + output [2:0] io_lsu_axi_awid, + output [31:0] io_lsu_axi_awaddr, + output [3:0] io_lsu_axi_awregion, + output [7:0] io_lsu_axi_awlen, + output [2:0] io_lsu_axi_awsize, + output [1:0] io_lsu_axi_awburst, + output [3:0] io_lsu_axi_awcache, + output [2:0] io_lsu_axi_awprot, + output [3:0] io_lsu_axi_awqos, + output io_lsu_axi_wvalid, + input io_lsu_axi_wready, + output [63:0] io_lsu_axi_wdata, + output [7:0] io_lsu_axi_wstrb, + output io_lsu_axi_wlast, + input io_lsu_axi_bvalid, + output io_lsu_axi_bready, + input [1:0] io_lsu_axi_bresp, + input [2:0] io_lsu_axi_bid, + output io_lsu_axi_arvalid, + output io_lsu_axi_arlock, + input io_lsu_axi_arready, + output [2:0] io_lsu_axi_arid, + output [31:0] io_lsu_axi_araddr, + output [3:0] io_lsu_axi_arregion, + output [7:0] io_lsu_axi_arlen, + output [2:0] io_lsu_axi_arsize, + output [1:0] io_lsu_axi_arburst, + output [3:0] io_lsu_axi_arcache, + output [2:0] io_lsu_axi_arprot, + output [3:0] io_lsu_axi_arqos, + input io_lsu_axi_rvalid, + output io_lsu_axi_rready, + input [63:0] io_lsu_axi_rdata, + input io_lsu_axi_rlast, + input [1:0] io_lsu_axi_rresp, + input [2:0] io_lsu_axi_rid, + input io_lsu_bus_clk_en, + input io_dma_dccm_req, + input io_dma_mem_write, + output io_dccm_dma_rvalid, + output io_dccm_dma_ecc_error, + input [2:0] io_dma_mem_tag, + input [31:0] io_dma_mem_addr, + input [2:0] io_dma_mem_sz, + input [63:0] io_dma_mem_wdata, + output [2:0] io_dccm_dma_rtag, + output [63:0] io_dccm_dma_rdata, + output io_dccm_ready, + input io_scan_mode, + input io_free_clk +); +`ifdef RANDOMIZE_REG_INIT + reg [31:0] _RAND_0; + reg [31:0] _RAND_1; + reg [31:0] _RAND_2; +`endif // RANDOMIZE_REG_INIT + wire lsu_lsc_ctl_clock; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_reset; // @[el2_lsu.scala 153:30] + wire [31:0] lsu_lsc_ctl_io_lsu_ld_data_corr_r; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_single_ecc_error_r; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_double_ecc_error_r; // @[el2_lsu.scala 153:30] + wire [31:0] lsu_lsc_ctl_io_lsu_ld_data_m; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_single_ecc_error_m; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_double_ecc_error_m; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_flush_m_up; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_flush_r; // @[el2_lsu.scala 153:30] + wire [31:0] lsu_lsc_ctl_io_exu_lsu_rs1_d; // @[el2_lsu.scala 153:30] + wire [31:0] lsu_lsc_ctl_io_exu_lsu_rs2_d; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_p_fast_int; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_p_by; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_p_half; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_p_word; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_p_dword; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_p_load; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_p_store; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_p_unsign; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_p_dma; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_p_store_data_bypass_d; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_p_load_ldst_bypass_d; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_p_store_data_bypass_m; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_p_valid; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_dec_lsu_valid_raw_d; // @[el2_lsu.scala 153:30] + wire [11:0] lsu_lsc_ctl_io_dec_lsu_offset_d; // @[el2_lsu.scala 153:30] + wire [31:0] lsu_lsc_ctl_io_picm_mask_data_m; // @[el2_lsu.scala 153:30] + wire [31:0] lsu_lsc_ctl_io_lsu_result_m; // @[el2_lsu.scala 153:30] + wire [31:0] lsu_lsc_ctl_io_lsu_addr_d; // @[el2_lsu.scala 153:30] + wire [31:0] lsu_lsc_ctl_io_lsu_addr_m; // @[el2_lsu.scala 153:30] + wire [31:0] lsu_lsc_ctl_io_lsu_addr_r; // @[el2_lsu.scala 153:30] + wire [31:0] lsu_lsc_ctl_io_end_addr_d; // @[el2_lsu.scala 153:30] + wire [31:0] lsu_lsc_ctl_io_end_addr_m; // @[el2_lsu.scala 153:30] + wire [31:0] lsu_lsc_ctl_io_end_addr_r; // @[el2_lsu.scala 153:30] + wire [31:0] lsu_lsc_ctl_io_store_data_m; // @[el2_lsu.scala 153:30] + wire [31:0] lsu_lsc_ctl_io_dec_tlu_mrac_ff; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_commit_r; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_single_ecc_error_incr; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_error_pkt_r_exc_valid; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_error_pkt_r_single_ecc_error; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_error_pkt_r_inst_type; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_error_pkt_r_exc_type; // @[el2_lsu.scala 153:30] + wire [3:0] lsu_lsc_ctl_io_lsu_error_pkt_r_mscause; // @[el2_lsu.scala 153:30] + wire [31:0] lsu_lsc_ctl_io_lsu_error_pkt_r_addr; // @[el2_lsu.scala 153:30] + wire [31:0] lsu_lsc_ctl_io_lsu_fir_addr; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_addr_in_dccm_d; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_addr_in_dccm_m; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_addr_in_dccm_r; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_addr_in_pic_d; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_addr_in_pic_m; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_addr_in_pic_r; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_addr_external_m; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_dma_dccm_req; // @[el2_lsu.scala 153:30] + wire [31:0] lsu_lsc_ctl_io_dma_mem_addr; // @[el2_lsu.scala 153:30] + wire [2:0] lsu_lsc_ctl_io_dma_mem_sz; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_dma_mem_write; // @[el2_lsu.scala 153:30] + wire [63:0] lsu_lsc_ctl_io_dma_mem_wdata; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_pkt_d_fast_int; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_pkt_d_by; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_pkt_d_half; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_pkt_d_word; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_pkt_d_dword; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_pkt_d_load; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_pkt_d_store; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_pkt_d_unsign; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_pkt_d_dma; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_pkt_d_store_data_bypass_d; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_pkt_d_load_ldst_bypass_d; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_pkt_d_store_data_bypass_m; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_pkt_d_valid; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_pkt_m_fast_int; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_pkt_m_by; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_pkt_m_half; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_pkt_m_word; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_pkt_m_dword; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_pkt_m_load; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_pkt_m_store; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_pkt_m_unsign; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_pkt_m_dma; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_pkt_m_store_data_bypass_m; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_pkt_m_valid; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_pkt_r_by; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_pkt_r_half; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_pkt_r_word; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_pkt_r_dword; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_pkt_r_load; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_pkt_r_store; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_pkt_r_unsign; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_pkt_r_dma; // @[el2_lsu.scala 153:30] + wire lsu_lsc_ctl_io_lsu_pkt_r_valid; // @[el2_lsu.scala 153:30] + wire dccm_ctl_reset; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_lsu_c2_m_clk; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_lsu_c2_r_clk; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_lsu_free_c2_clk; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_lsu_store_c1_r_clk; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_clk; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_lsu_pkt_d_word; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_lsu_pkt_d_dword; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_lsu_pkt_d_load; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_lsu_pkt_d_store; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_lsu_pkt_d_dma; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_lsu_pkt_d_valid; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_lsu_pkt_m_by; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_lsu_pkt_m_half; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_lsu_pkt_m_word; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_lsu_pkt_m_load; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_lsu_pkt_m_store; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_lsu_pkt_m_dma; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_lsu_pkt_m_valid; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_lsu_pkt_r_by; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_lsu_pkt_r_half; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_lsu_pkt_r_word; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_lsu_pkt_r_load; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_lsu_pkt_r_store; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_lsu_pkt_r_dma; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_lsu_pkt_r_valid; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_addr_in_dccm_d; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_addr_in_dccm_m; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_addr_in_dccm_r; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_addr_in_pic_d; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_addr_in_pic_m; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_addr_in_pic_r; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_lsu_raw_fwd_lo_r; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_lsu_raw_fwd_hi_r; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_lsu_commit_r; // @[el2_lsu.scala 154:30] + wire [15:0] dccm_ctl_io_lsu_addr_d; // @[el2_lsu.scala 154:30] + wire [15:0] dccm_ctl_io_lsu_addr_m; // @[el2_lsu.scala 154:30] + wire [15:0] dccm_ctl_io_lsu_addr_r; // @[el2_lsu.scala 154:30] + wire [15:0] dccm_ctl_io_end_addr_d; // @[el2_lsu.scala 154:30] + wire [15:0] dccm_ctl_io_end_addr_m; // @[el2_lsu.scala 154:30] + wire [15:0] dccm_ctl_io_end_addr_r; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_stbuf_reqvld_any; // @[el2_lsu.scala 154:30] + wire [15:0] dccm_ctl_io_stbuf_addr_any; // @[el2_lsu.scala 154:30] + wire [31:0] dccm_ctl_io_stbuf_data_any; // @[el2_lsu.scala 154:30] + wire [31:0] dccm_ctl_io_stbuf_fwddata_hi_m; // @[el2_lsu.scala 154:30] + wire [31:0] dccm_ctl_io_stbuf_fwddata_lo_m; // @[el2_lsu.scala 154:30] + wire [3:0] dccm_ctl_io_stbuf_fwdbyteen_lo_m; // @[el2_lsu.scala 154:30] + wire [3:0] dccm_ctl_io_stbuf_fwdbyteen_hi_m; // @[el2_lsu.scala 154:30] + wire [31:0] dccm_ctl_io_lsu_ld_data_corr_r; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_lsu_double_ecc_error_r; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_single_ecc_error_hi_r; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_single_ecc_error_lo_r; // @[el2_lsu.scala 154:30] + wire [31:0] dccm_ctl_io_sec_data_hi_r_ff; // @[el2_lsu.scala 154:30] + wire [31:0] dccm_ctl_io_sec_data_lo_r_ff; // @[el2_lsu.scala 154:30] + wire [31:0] dccm_ctl_io_dccm_rdata_hi_m; // @[el2_lsu.scala 154:30] + wire [31:0] dccm_ctl_io_dccm_rdata_lo_m; // @[el2_lsu.scala 154:30] + wire [6:0] dccm_ctl_io_dccm_data_ecc_hi_m; // @[el2_lsu.scala 154:30] + wire [6:0] dccm_ctl_io_dccm_data_ecc_lo_m; // @[el2_lsu.scala 154:30] + wire [31:0] dccm_ctl_io_lsu_ld_data_m; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_lsu_double_ecc_error_m; // @[el2_lsu.scala 154:30] + wire [31:0] dccm_ctl_io_sec_data_hi_m; // @[el2_lsu.scala 154:30] + wire [31:0] dccm_ctl_io_sec_data_lo_m; // @[el2_lsu.scala 154:30] + wire [31:0] dccm_ctl_io_store_data_m; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_dma_dccm_wen; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_dma_pic_wen; // @[el2_lsu.scala 154:30] + wire [2:0] dccm_ctl_io_dma_mem_tag_m; // @[el2_lsu.scala 154:30] + wire [31:0] dccm_ctl_io_dma_mem_addr; // @[el2_lsu.scala 154:30] + wire [63:0] dccm_ctl_io_dma_mem_wdata; // @[el2_lsu.scala 154:30] + wire [31:0] dccm_ctl_io_dma_dccm_wdata_lo; // @[el2_lsu.scala 154:30] + wire [31:0] dccm_ctl_io_dma_dccm_wdata_hi; // @[el2_lsu.scala 154:30] + wire [31:0] dccm_ctl_io_store_data_hi_r; // @[el2_lsu.scala 154:30] + wire [31:0] dccm_ctl_io_store_data_lo_r; // @[el2_lsu.scala 154:30] + wire [31:0] dccm_ctl_io_store_datafn_hi_r; // @[el2_lsu.scala 154:30] + wire [31:0] dccm_ctl_io_store_datafn_lo_r; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_ld_single_ecc_error_r; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_ld_single_ecc_error_r_ff; // @[el2_lsu.scala 154:30] + wire [31:0] dccm_ctl_io_picm_mask_data_m; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_lsu_stbuf_commit_any; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_lsu_dccm_rden_m; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_dccm_dma_rvalid; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_dccm_dma_ecc_error; // @[el2_lsu.scala 154:30] + wire [2:0] dccm_ctl_io_dccm_dma_rtag; // @[el2_lsu.scala 154:30] + wire [63:0] dccm_ctl_io_dccm_dma_rdata; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_dccm_wren; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_dccm_rden; // @[el2_lsu.scala 154:30] + wire [15:0] dccm_ctl_io_dccm_wr_addr_lo; // @[el2_lsu.scala 154:30] + wire [38:0] dccm_ctl_io_dccm_wr_data_lo; // @[el2_lsu.scala 154:30] + wire [15:0] dccm_ctl_io_dccm_rd_addr_lo; // @[el2_lsu.scala 154:30] + wire [38:0] dccm_ctl_io_dccm_rd_data_lo; // @[el2_lsu.scala 154:30] + wire [15:0] dccm_ctl_io_dccm_wr_addr_hi; // @[el2_lsu.scala 154:30] + wire [38:0] dccm_ctl_io_dccm_wr_data_hi; // @[el2_lsu.scala 154:30] + wire [15:0] dccm_ctl_io_dccm_rd_addr_hi; // @[el2_lsu.scala 154:30] + wire [38:0] dccm_ctl_io_dccm_rd_data_hi; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_picm_wren; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_picm_rden; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_picm_mken; // @[el2_lsu.scala 154:30] + wire [31:0] dccm_ctl_io_picm_rdaddr; // @[el2_lsu.scala 154:30] + wire [31:0] dccm_ctl_io_picm_wraddr; // @[el2_lsu.scala 154:30] + wire [31:0] dccm_ctl_io_picm_wr_data; // @[el2_lsu.scala 154:30] + wire [31:0] dccm_ctl_io_picm_rd_data; // @[el2_lsu.scala 154:30] + wire dccm_ctl_io_scan_mode; // @[el2_lsu.scala 154:30] + wire stbuf_clock; // @[el2_lsu.scala 155:30] + wire stbuf_reset; // @[el2_lsu.scala 155:30] + wire stbuf_io_lsu_c1_m_clk; // @[el2_lsu.scala 155:30] + wire stbuf_io_lsu_c1_r_clk; // @[el2_lsu.scala 155:30] + wire stbuf_io_lsu_stbuf_c1_clk; // @[el2_lsu.scala 155:30] + wire stbuf_io_lsu_free_c2_clk; // @[el2_lsu.scala 155:30] + wire stbuf_io_lsu_pkt_m_store; // @[el2_lsu.scala 155:30] + wire stbuf_io_lsu_pkt_m_dma; // @[el2_lsu.scala 155:30] + wire stbuf_io_lsu_pkt_m_valid; // @[el2_lsu.scala 155:30] + wire stbuf_io_lsu_pkt_r_by; // @[el2_lsu.scala 155:30] + wire stbuf_io_lsu_pkt_r_half; // @[el2_lsu.scala 155:30] + wire stbuf_io_lsu_pkt_r_word; // @[el2_lsu.scala 155:30] + wire stbuf_io_lsu_pkt_r_dword; // @[el2_lsu.scala 155:30] + wire stbuf_io_lsu_pkt_r_store; // @[el2_lsu.scala 155:30] + wire stbuf_io_lsu_pkt_r_dma; // @[el2_lsu.scala 155:30] + wire stbuf_io_lsu_pkt_r_valid; // @[el2_lsu.scala 155:30] + wire stbuf_io_store_stbuf_reqvld_r; // @[el2_lsu.scala 155:30] + wire stbuf_io_lsu_commit_r; // @[el2_lsu.scala 155:30] + wire stbuf_io_dec_lsu_valid_raw_d; // @[el2_lsu.scala 155:30] + wire [31:0] stbuf_io_store_data_hi_r; // @[el2_lsu.scala 155:30] + wire [31:0] stbuf_io_store_data_lo_r; // @[el2_lsu.scala 155:30] + wire [31:0] stbuf_io_store_datafn_hi_r; // @[el2_lsu.scala 155:30] + wire [31:0] stbuf_io_store_datafn_lo_r; // @[el2_lsu.scala 155:30] + wire stbuf_io_lsu_stbuf_commit_any; // @[el2_lsu.scala 155:30] + wire [15:0] stbuf_io_lsu_addr_d; // @[el2_lsu.scala 155:30] + wire [31:0] stbuf_io_lsu_addr_m; // @[el2_lsu.scala 155:30] + wire [31:0] stbuf_io_lsu_addr_r; // @[el2_lsu.scala 155:30] + wire [15:0] stbuf_io_end_addr_d; // @[el2_lsu.scala 155:30] + wire [31:0] stbuf_io_end_addr_m; // @[el2_lsu.scala 155:30] + wire [31:0] stbuf_io_end_addr_r; // @[el2_lsu.scala 155:30] + wire stbuf_io_addr_in_dccm_m; // @[el2_lsu.scala 155:30] + wire stbuf_io_addr_in_dccm_r; // @[el2_lsu.scala 155:30] + wire stbuf_io_stbuf_reqvld_any; // @[el2_lsu.scala 155:30] + wire stbuf_io_stbuf_reqvld_flushed_any; // @[el2_lsu.scala 155:30] + wire [15:0] stbuf_io_stbuf_addr_any; // @[el2_lsu.scala 155:30] + wire [31:0] stbuf_io_stbuf_data_any; // @[el2_lsu.scala 155:30] + wire stbuf_io_lsu_stbuf_full_any; // @[el2_lsu.scala 155:30] + wire stbuf_io_ldst_stbuf_reqvld_r; // @[el2_lsu.scala 155:30] + wire [31:0] stbuf_io_stbuf_fwddata_hi_m; // @[el2_lsu.scala 155:30] + wire [31:0] stbuf_io_stbuf_fwddata_lo_m; // @[el2_lsu.scala 155:30] + wire [3:0] stbuf_io_stbuf_fwdbyteen_hi_m; // @[el2_lsu.scala 155:30] + wire [3:0] stbuf_io_stbuf_fwdbyteen_lo_m; // @[el2_lsu.scala 155:30] + wire ecc_clock; // @[el2_lsu.scala 156:30] + wire ecc_reset; // @[el2_lsu.scala 156:30] + wire ecc_io_lsu_c2_r_clk; // @[el2_lsu.scala 156:30] + wire ecc_io_lsu_pkt_m_load; // @[el2_lsu.scala 156:30] + wire ecc_io_lsu_pkt_m_store; // @[el2_lsu.scala 156:30] + wire ecc_io_lsu_pkt_m_dma; // @[el2_lsu.scala 156:30] + wire ecc_io_lsu_pkt_m_valid; // @[el2_lsu.scala 156:30] + wire ecc_io_dec_tlu_core_ecc_disable; // @[el2_lsu.scala 156:30] + wire [15:0] ecc_io_lsu_addr_m; // @[el2_lsu.scala 156:30] + wire [15:0] ecc_io_end_addr_m; // @[el2_lsu.scala 156:30] + wire [31:0] ecc_io_dccm_rdata_hi_m; // @[el2_lsu.scala 156:30] + wire [31:0] ecc_io_dccm_rdata_lo_m; // @[el2_lsu.scala 156:30] + wire [6:0] ecc_io_dccm_data_ecc_hi_m; // @[el2_lsu.scala 156:30] + wire [6:0] ecc_io_dccm_data_ecc_lo_m; // @[el2_lsu.scala 156:30] + wire ecc_io_ld_single_ecc_error_r; // @[el2_lsu.scala 156:30] + wire ecc_io_lsu_dccm_rden_m; // @[el2_lsu.scala 156:30] + wire ecc_io_addr_in_dccm_m; // @[el2_lsu.scala 156:30] + wire [31:0] ecc_io_sec_data_hi_r; // @[el2_lsu.scala 156:30] + wire [31:0] ecc_io_sec_data_lo_r; // @[el2_lsu.scala 156:30] + wire [31:0] ecc_io_sec_data_hi_m; // @[el2_lsu.scala 156:30] + wire [31:0] ecc_io_sec_data_lo_m; // @[el2_lsu.scala 156:30] + wire [31:0] ecc_io_sec_data_hi_r_ff; // @[el2_lsu.scala 156:30] + wire [31:0] ecc_io_sec_data_lo_r_ff; // @[el2_lsu.scala 156:30] + wire ecc_io_single_ecc_error_hi_r; // @[el2_lsu.scala 156:30] + wire ecc_io_single_ecc_error_lo_r; // @[el2_lsu.scala 156:30] + wire ecc_io_lsu_single_ecc_error_r; // @[el2_lsu.scala 156:30] + wire ecc_io_lsu_double_ecc_error_r; // @[el2_lsu.scala 156:30] + wire ecc_io_lsu_single_ecc_error_m; // @[el2_lsu.scala 156:30] + wire ecc_io_lsu_double_ecc_error_m; // @[el2_lsu.scala 156:30] + wire trigger_io_trigger_pkt_any_0_select; // @[el2_lsu.scala 157:30] + wire trigger_io_trigger_pkt_any_0_match_; // @[el2_lsu.scala 157:30] + wire trigger_io_trigger_pkt_any_0_store; // @[el2_lsu.scala 157:30] + wire trigger_io_trigger_pkt_any_0_load; // @[el2_lsu.scala 157:30] + wire [31:0] trigger_io_trigger_pkt_any_0_tdata2; // @[el2_lsu.scala 157:30] + wire trigger_io_trigger_pkt_any_1_select; // @[el2_lsu.scala 157:30] + wire trigger_io_trigger_pkt_any_1_match_; // @[el2_lsu.scala 157:30] + wire trigger_io_trigger_pkt_any_1_store; // @[el2_lsu.scala 157:30] + wire trigger_io_trigger_pkt_any_1_load; // @[el2_lsu.scala 157:30] + wire [31:0] trigger_io_trigger_pkt_any_1_tdata2; // @[el2_lsu.scala 157:30] + wire trigger_io_trigger_pkt_any_2_select; // @[el2_lsu.scala 157:30] + wire trigger_io_trigger_pkt_any_2_match_; // @[el2_lsu.scala 157:30] + wire trigger_io_trigger_pkt_any_2_store; // @[el2_lsu.scala 157:30] + wire trigger_io_trigger_pkt_any_2_load; // @[el2_lsu.scala 157:30] + wire [31:0] trigger_io_trigger_pkt_any_2_tdata2; // @[el2_lsu.scala 157:30] + wire trigger_io_trigger_pkt_any_3_select; // @[el2_lsu.scala 157:30] + wire trigger_io_trigger_pkt_any_3_match_; // @[el2_lsu.scala 157:30] + wire trigger_io_trigger_pkt_any_3_store; // @[el2_lsu.scala 157:30] + wire trigger_io_trigger_pkt_any_3_load; // @[el2_lsu.scala 157:30] + wire [31:0] trigger_io_trigger_pkt_any_3_tdata2; // @[el2_lsu.scala 157:30] + wire trigger_io_lsu_pkt_m_half; // @[el2_lsu.scala 157:30] + wire trigger_io_lsu_pkt_m_word; // @[el2_lsu.scala 157:30] + wire trigger_io_lsu_pkt_m_load; // @[el2_lsu.scala 157:30] + wire trigger_io_lsu_pkt_m_store; // @[el2_lsu.scala 157:30] + wire trigger_io_lsu_pkt_m_dma; // @[el2_lsu.scala 157:30] + wire trigger_io_lsu_pkt_m_valid; // @[el2_lsu.scala 157:30] + wire [31:0] trigger_io_lsu_addr_m; // @[el2_lsu.scala 157:30] + wire [31:0] trigger_io_store_data_m; // @[el2_lsu.scala 157:30] + wire [3:0] trigger_io_lsu_trigger_match_m; // @[el2_lsu.scala 157:30] + wire clkdomain_clock; // @[el2_lsu.scala 158:30] + wire clkdomain_reset; // @[el2_lsu.scala 158:30] + wire clkdomain_io_clk_override; // @[el2_lsu.scala 158:30] + wire clkdomain_io_dma_dccm_req; // @[el2_lsu.scala 158:30] + wire clkdomain_io_ldst_stbuf_reqvld_r; // @[el2_lsu.scala 158:30] + wire clkdomain_io_stbuf_reqvld_any; // @[el2_lsu.scala 158:30] + wire clkdomain_io_stbuf_reqvld_flushed_any; // @[el2_lsu.scala 158:30] + wire clkdomain_io_lsu_bus_clk_en; // @[el2_lsu.scala 158:30] + wire clkdomain_io_lsu_p_valid; // @[el2_lsu.scala 158:30] + wire clkdomain_io_lsu_pkt_d_store; // @[el2_lsu.scala 158:30] + wire clkdomain_io_lsu_pkt_d_valid; // @[el2_lsu.scala 158:30] + wire clkdomain_io_lsu_pkt_m_store; // @[el2_lsu.scala 158:30] + wire clkdomain_io_lsu_pkt_m_valid; // @[el2_lsu.scala 158:30] + wire clkdomain_io_lsu_c1_m_clk; // @[el2_lsu.scala 158:30] + wire clkdomain_io_lsu_c1_r_clk; // @[el2_lsu.scala 158:30] + wire clkdomain_io_lsu_c2_m_clk; // @[el2_lsu.scala 158:30] + wire clkdomain_io_lsu_c2_r_clk; // @[el2_lsu.scala 158:30] + wire clkdomain_io_lsu_stbuf_c1_clk; // @[el2_lsu.scala 158:30] + wire clkdomain_io_lsu_free_c2_clk; // @[el2_lsu.scala 158:30] + wire clkdomain_io_scan_mode; // @[el2_lsu.scala 158:30] + wire _T = stbuf_io_lsu_stbuf_full_any; // @[el2_lsu.scala 165:57] + wire _T_3 = ~lsu_lsc_ctl_io_lsu_pkt_m_dma; // @[el2_lsu.scala 172:58] + wire _T_4 = lsu_lsc_ctl_io_lsu_pkt_m_valid & _T_3; // @[el2_lsu.scala 172:56] + wire _T_5 = lsu_lsc_ctl_io_addr_in_dccm_m | lsu_lsc_ctl_io_addr_in_pic_m; // @[el2_lsu.scala 172:121] + wire _T_6 = _T_4 & _T_5; // @[el2_lsu.scala 172:88] + wire ldst_nodma_mtor = _T_6 & lsu_lsc_ctl_io_lsu_pkt_m_store; // @[el2_lsu.scala 172:153] + wire _T_7 = io_dec_lsu_valid_raw_d | ldst_nodma_mtor; // @[el2_lsu.scala 173:45] + wire _T_8 = _T_7 | dccm_ctl_io_ld_single_ecc_error_r_ff; // @[el2_lsu.scala 173:63] + wire _T_10 = io_dma_dccm_req & io_dma_mem_write; // @[el2_lsu.scala 174:38] + wire [5:0] _T_13 = {io_dma_mem_addr[2:0],3'h0}; // @[Cat.scala 29:58] + wire [63:0] dma_dccm_wdata = io_dma_mem_wdata >> _T_13; // @[el2_lsu.scala 176:38] + wire _T_19 = ~lsu_lsc_ctl_io_lsu_pkt_r_dma; // @[el2_lsu.scala 187:125] + wire _T_25 = lsu_lsc_ctl_io_lsu_pkt_r_valid & lsu_lsc_ctl_io_lsu_pkt_r_store; // @[el2_lsu.scala 189:61] + wire _T_26 = _T_25 & lsu_lsc_ctl_io_addr_in_dccm_r; // @[el2_lsu.scala 189:94] + wire _T_27 = ~io_dec_tlu_i0_kill_writeb_r; // @[el2_lsu.scala 189:128] + wire _T_28 = _T_26 & _T_27; // @[el2_lsu.scala 189:126] + wire _T_42 = lsu_lsc_ctl_io_lsu_pkt_m_half & lsu_lsc_ctl_io_lsu_addr_m[0]; // @[el2_lsu.scala 195:94] + wire _T_44 = |lsu_lsc_ctl_io_lsu_addr_m[1:0]; // @[el2_lsu.scala 195:192] + wire _T_45 = lsu_lsc_ctl_io_lsu_pkt_m_word & _T_44; // @[el2_lsu.scala 195:159] + wire _T_46 = _T_42 | _T_45; // @[el2_lsu.scala 195:126] + wire _T_48 = lsu_lsc_ctl_io_lsu_pkt_m_valid & lsu_lsc_ctl_io_lsu_pkt_m_load; // @[el2_lsu.scala 196:64] + wire _T_50 = lsu_lsc_ctl_io_lsu_pkt_m_valid & lsu_lsc_ctl_io_lsu_pkt_m_store; // @[el2_lsu.scala 197:64] + reg [2:0] _T_52; // @[el2_lsu.scala 490:67] + reg lsu_raw_fwd_hi_r; // @[el2_lsu.scala 491:67] + reg lsu_raw_fwd_lo_r; // @[el2_lsu.scala 492:67] + wire [31:0] dma_mem_tag_m = {{29'd0}, _T_52}; // @[el2_lsu.scala 490:57] + el2_lsu_lsc_ctl lsu_lsc_ctl ( // @[el2_lsu.scala 153:30] + .clock(lsu_lsc_ctl_clock), + .reset(lsu_lsc_ctl_reset), + .io_lsu_ld_data_corr_r(lsu_lsc_ctl_io_lsu_ld_data_corr_r), + .io_lsu_single_ecc_error_r(lsu_lsc_ctl_io_lsu_single_ecc_error_r), + .io_lsu_double_ecc_error_r(lsu_lsc_ctl_io_lsu_double_ecc_error_r), + .io_lsu_ld_data_m(lsu_lsc_ctl_io_lsu_ld_data_m), + .io_lsu_single_ecc_error_m(lsu_lsc_ctl_io_lsu_single_ecc_error_m), + .io_lsu_double_ecc_error_m(lsu_lsc_ctl_io_lsu_double_ecc_error_m), + .io_flush_m_up(lsu_lsc_ctl_io_flush_m_up), + .io_flush_r(lsu_lsc_ctl_io_flush_r), + .io_exu_lsu_rs1_d(lsu_lsc_ctl_io_exu_lsu_rs1_d), + .io_exu_lsu_rs2_d(lsu_lsc_ctl_io_exu_lsu_rs2_d), + .io_lsu_p_fast_int(lsu_lsc_ctl_io_lsu_p_fast_int), + .io_lsu_p_by(lsu_lsc_ctl_io_lsu_p_by), + .io_lsu_p_half(lsu_lsc_ctl_io_lsu_p_half), + .io_lsu_p_word(lsu_lsc_ctl_io_lsu_p_word), + .io_lsu_p_dword(lsu_lsc_ctl_io_lsu_p_dword), + .io_lsu_p_load(lsu_lsc_ctl_io_lsu_p_load), + .io_lsu_p_store(lsu_lsc_ctl_io_lsu_p_store), + .io_lsu_p_unsign(lsu_lsc_ctl_io_lsu_p_unsign), + .io_lsu_p_dma(lsu_lsc_ctl_io_lsu_p_dma), + .io_lsu_p_store_data_bypass_d(lsu_lsc_ctl_io_lsu_p_store_data_bypass_d), + .io_lsu_p_load_ldst_bypass_d(lsu_lsc_ctl_io_lsu_p_load_ldst_bypass_d), + .io_lsu_p_store_data_bypass_m(lsu_lsc_ctl_io_lsu_p_store_data_bypass_m), + .io_lsu_p_valid(lsu_lsc_ctl_io_lsu_p_valid), + .io_dec_lsu_valid_raw_d(lsu_lsc_ctl_io_dec_lsu_valid_raw_d), + .io_dec_lsu_offset_d(lsu_lsc_ctl_io_dec_lsu_offset_d), + .io_picm_mask_data_m(lsu_lsc_ctl_io_picm_mask_data_m), + .io_lsu_result_m(lsu_lsc_ctl_io_lsu_result_m), + .io_lsu_addr_d(lsu_lsc_ctl_io_lsu_addr_d), + .io_lsu_addr_m(lsu_lsc_ctl_io_lsu_addr_m), + .io_lsu_addr_r(lsu_lsc_ctl_io_lsu_addr_r), + .io_end_addr_d(lsu_lsc_ctl_io_end_addr_d), + .io_end_addr_m(lsu_lsc_ctl_io_end_addr_m), + .io_end_addr_r(lsu_lsc_ctl_io_end_addr_r), + .io_store_data_m(lsu_lsc_ctl_io_store_data_m), + .io_dec_tlu_mrac_ff(lsu_lsc_ctl_io_dec_tlu_mrac_ff), + .io_lsu_commit_r(lsu_lsc_ctl_io_lsu_commit_r), + .io_lsu_single_ecc_error_incr(lsu_lsc_ctl_io_lsu_single_ecc_error_incr), + .io_lsu_error_pkt_r_exc_valid(lsu_lsc_ctl_io_lsu_error_pkt_r_exc_valid), + .io_lsu_error_pkt_r_single_ecc_error(lsu_lsc_ctl_io_lsu_error_pkt_r_single_ecc_error), + .io_lsu_error_pkt_r_inst_type(lsu_lsc_ctl_io_lsu_error_pkt_r_inst_type), + .io_lsu_error_pkt_r_exc_type(lsu_lsc_ctl_io_lsu_error_pkt_r_exc_type), + .io_lsu_error_pkt_r_mscause(lsu_lsc_ctl_io_lsu_error_pkt_r_mscause), + .io_lsu_error_pkt_r_addr(lsu_lsc_ctl_io_lsu_error_pkt_r_addr), + .io_lsu_fir_addr(lsu_lsc_ctl_io_lsu_fir_addr), + .io_addr_in_dccm_d(lsu_lsc_ctl_io_addr_in_dccm_d), + .io_addr_in_dccm_m(lsu_lsc_ctl_io_addr_in_dccm_m), + .io_addr_in_dccm_r(lsu_lsc_ctl_io_addr_in_dccm_r), + .io_addr_in_pic_d(lsu_lsc_ctl_io_addr_in_pic_d), + .io_addr_in_pic_m(lsu_lsc_ctl_io_addr_in_pic_m), + .io_addr_in_pic_r(lsu_lsc_ctl_io_addr_in_pic_r), + .io_addr_external_m(lsu_lsc_ctl_io_addr_external_m), + .io_dma_dccm_req(lsu_lsc_ctl_io_dma_dccm_req), + .io_dma_mem_addr(lsu_lsc_ctl_io_dma_mem_addr), + .io_dma_mem_sz(lsu_lsc_ctl_io_dma_mem_sz), + .io_dma_mem_write(lsu_lsc_ctl_io_dma_mem_write), + .io_dma_mem_wdata(lsu_lsc_ctl_io_dma_mem_wdata), + .io_lsu_pkt_d_fast_int(lsu_lsc_ctl_io_lsu_pkt_d_fast_int), + .io_lsu_pkt_d_by(lsu_lsc_ctl_io_lsu_pkt_d_by), + .io_lsu_pkt_d_half(lsu_lsc_ctl_io_lsu_pkt_d_half), + .io_lsu_pkt_d_word(lsu_lsc_ctl_io_lsu_pkt_d_word), + .io_lsu_pkt_d_dword(lsu_lsc_ctl_io_lsu_pkt_d_dword), + .io_lsu_pkt_d_load(lsu_lsc_ctl_io_lsu_pkt_d_load), + .io_lsu_pkt_d_store(lsu_lsc_ctl_io_lsu_pkt_d_store), + .io_lsu_pkt_d_unsign(lsu_lsc_ctl_io_lsu_pkt_d_unsign), + .io_lsu_pkt_d_dma(lsu_lsc_ctl_io_lsu_pkt_d_dma), + .io_lsu_pkt_d_store_data_bypass_d(lsu_lsc_ctl_io_lsu_pkt_d_store_data_bypass_d), + .io_lsu_pkt_d_load_ldst_bypass_d(lsu_lsc_ctl_io_lsu_pkt_d_load_ldst_bypass_d), + .io_lsu_pkt_d_store_data_bypass_m(lsu_lsc_ctl_io_lsu_pkt_d_store_data_bypass_m), + .io_lsu_pkt_d_valid(lsu_lsc_ctl_io_lsu_pkt_d_valid), + .io_lsu_pkt_m_fast_int(lsu_lsc_ctl_io_lsu_pkt_m_fast_int), + .io_lsu_pkt_m_by(lsu_lsc_ctl_io_lsu_pkt_m_by), + .io_lsu_pkt_m_half(lsu_lsc_ctl_io_lsu_pkt_m_half), + .io_lsu_pkt_m_word(lsu_lsc_ctl_io_lsu_pkt_m_word), + .io_lsu_pkt_m_dword(lsu_lsc_ctl_io_lsu_pkt_m_dword), + .io_lsu_pkt_m_load(lsu_lsc_ctl_io_lsu_pkt_m_load), + .io_lsu_pkt_m_store(lsu_lsc_ctl_io_lsu_pkt_m_store), + .io_lsu_pkt_m_unsign(lsu_lsc_ctl_io_lsu_pkt_m_unsign), + .io_lsu_pkt_m_dma(lsu_lsc_ctl_io_lsu_pkt_m_dma), + .io_lsu_pkt_m_store_data_bypass_m(lsu_lsc_ctl_io_lsu_pkt_m_store_data_bypass_m), + .io_lsu_pkt_m_valid(lsu_lsc_ctl_io_lsu_pkt_m_valid), + .io_lsu_pkt_r_by(lsu_lsc_ctl_io_lsu_pkt_r_by), + .io_lsu_pkt_r_half(lsu_lsc_ctl_io_lsu_pkt_r_half), + .io_lsu_pkt_r_word(lsu_lsc_ctl_io_lsu_pkt_r_word), + .io_lsu_pkt_r_dword(lsu_lsc_ctl_io_lsu_pkt_r_dword), + .io_lsu_pkt_r_load(lsu_lsc_ctl_io_lsu_pkt_r_load), + .io_lsu_pkt_r_store(lsu_lsc_ctl_io_lsu_pkt_r_store), + .io_lsu_pkt_r_unsign(lsu_lsc_ctl_io_lsu_pkt_r_unsign), + .io_lsu_pkt_r_dma(lsu_lsc_ctl_io_lsu_pkt_r_dma), + .io_lsu_pkt_r_valid(lsu_lsc_ctl_io_lsu_pkt_r_valid) + ); + el2_lsu_dccm_ctl dccm_ctl ( // @[el2_lsu.scala 154:30] + .reset(dccm_ctl_reset), + .io_lsu_c2_m_clk(dccm_ctl_io_lsu_c2_m_clk), + .io_lsu_c2_r_clk(dccm_ctl_io_lsu_c2_r_clk), + .io_lsu_free_c2_clk(dccm_ctl_io_lsu_free_c2_clk), + .io_lsu_store_c1_r_clk(dccm_ctl_io_lsu_store_c1_r_clk), + .io_clk(dccm_ctl_io_clk), + .io_lsu_pkt_d_word(dccm_ctl_io_lsu_pkt_d_word), + .io_lsu_pkt_d_dword(dccm_ctl_io_lsu_pkt_d_dword), + .io_lsu_pkt_d_load(dccm_ctl_io_lsu_pkt_d_load), + .io_lsu_pkt_d_store(dccm_ctl_io_lsu_pkt_d_store), + .io_lsu_pkt_d_dma(dccm_ctl_io_lsu_pkt_d_dma), + .io_lsu_pkt_d_valid(dccm_ctl_io_lsu_pkt_d_valid), + .io_lsu_pkt_m_by(dccm_ctl_io_lsu_pkt_m_by), + .io_lsu_pkt_m_half(dccm_ctl_io_lsu_pkt_m_half), + .io_lsu_pkt_m_word(dccm_ctl_io_lsu_pkt_m_word), + .io_lsu_pkt_m_load(dccm_ctl_io_lsu_pkt_m_load), + .io_lsu_pkt_m_store(dccm_ctl_io_lsu_pkt_m_store), + .io_lsu_pkt_m_dma(dccm_ctl_io_lsu_pkt_m_dma), + .io_lsu_pkt_m_valid(dccm_ctl_io_lsu_pkt_m_valid), + .io_lsu_pkt_r_by(dccm_ctl_io_lsu_pkt_r_by), + .io_lsu_pkt_r_half(dccm_ctl_io_lsu_pkt_r_half), + .io_lsu_pkt_r_word(dccm_ctl_io_lsu_pkt_r_word), + .io_lsu_pkt_r_load(dccm_ctl_io_lsu_pkt_r_load), + .io_lsu_pkt_r_store(dccm_ctl_io_lsu_pkt_r_store), + .io_lsu_pkt_r_dma(dccm_ctl_io_lsu_pkt_r_dma), + .io_lsu_pkt_r_valid(dccm_ctl_io_lsu_pkt_r_valid), + .io_addr_in_dccm_d(dccm_ctl_io_addr_in_dccm_d), + .io_addr_in_dccm_m(dccm_ctl_io_addr_in_dccm_m), + .io_addr_in_dccm_r(dccm_ctl_io_addr_in_dccm_r), + .io_addr_in_pic_d(dccm_ctl_io_addr_in_pic_d), + .io_addr_in_pic_m(dccm_ctl_io_addr_in_pic_m), + .io_addr_in_pic_r(dccm_ctl_io_addr_in_pic_r), + .io_lsu_raw_fwd_lo_r(dccm_ctl_io_lsu_raw_fwd_lo_r), + .io_lsu_raw_fwd_hi_r(dccm_ctl_io_lsu_raw_fwd_hi_r), + .io_lsu_commit_r(dccm_ctl_io_lsu_commit_r), + .io_lsu_addr_d(dccm_ctl_io_lsu_addr_d), + .io_lsu_addr_m(dccm_ctl_io_lsu_addr_m), + .io_lsu_addr_r(dccm_ctl_io_lsu_addr_r), + .io_end_addr_d(dccm_ctl_io_end_addr_d), + .io_end_addr_m(dccm_ctl_io_end_addr_m), + .io_end_addr_r(dccm_ctl_io_end_addr_r), + .io_stbuf_reqvld_any(dccm_ctl_io_stbuf_reqvld_any), + .io_stbuf_addr_any(dccm_ctl_io_stbuf_addr_any), + .io_stbuf_data_any(dccm_ctl_io_stbuf_data_any), + .io_stbuf_fwddata_hi_m(dccm_ctl_io_stbuf_fwddata_hi_m), + .io_stbuf_fwddata_lo_m(dccm_ctl_io_stbuf_fwddata_lo_m), + .io_stbuf_fwdbyteen_lo_m(dccm_ctl_io_stbuf_fwdbyteen_lo_m), + .io_stbuf_fwdbyteen_hi_m(dccm_ctl_io_stbuf_fwdbyteen_hi_m), + .io_lsu_ld_data_corr_r(dccm_ctl_io_lsu_ld_data_corr_r), + .io_lsu_double_ecc_error_r(dccm_ctl_io_lsu_double_ecc_error_r), + .io_single_ecc_error_hi_r(dccm_ctl_io_single_ecc_error_hi_r), + .io_single_ecc_error_lo_r(dccm_ctl_io_single_ecc_error_lo_r), + .io_sec_data_hi_r_ff(dccm_ctl_io_sec_data_hi_r_ff), + .io_sec_data_lo_r_ff(dccm_ctl_io_sec_data_lo_r_ff), + .io_dccm_rdata_hi_m(dccm_ctl_io_dccm_rdata_hi_m), + .io_dccm_rdata_lo_m(dccm_ctl_io_dccm_rdata_lo_m), + .io_dccm_data_ecc_hi_m(dccm_ctl_io_dccm_data_ecc_hi_m), + .io_dccm_data_ecc_lo_m(dccm_ctl_io_dccm_data_ecc_lo_m), + .io_lsu_ld_data_m(dccm_ctl_io_lsu_ld_data_m), + .io_lsu_double_ecc_error_m(dccm_ctl_io_lsu_double_ecc_error_m), + .io_sec_data_hi_m(dccm_ctl_io_sec_data_hi_m), + .io_sec_data_lo_m(dccm_ctl_io_sec_data_lo_m), + .io_store_data_m(dccm_ctl_io_store_data_m), + .io_dma_dccm_wen(dccm_ctl_io_dma_dccm_wen), + .io_dma_pic_wen(dccm_ctl_io_dma_pic_wen), + .io_dma_mem_tag_m(dccm_ctl_io_dma_mem_tag_m), + .io_dma_mem_addr(dccm_ctl_io_dma_mem_addr), + .io_dma_mem_wdata(dccm_ctl_io_dma_mem_wdata), + .io_dma_dccm_wdata_lo(dccm_ctl_io_dma_dccm_wdata_lo), + .io_dma_dccm_wdata_hi(dccm_ctl_io_dma_dccm_wdata_hi), + .io_store_data_hi_r(dccm_ctl_io_store_data_hi_r), + .io_store_data_lo_r(dccm_ctl_io_store_data_lo_r), + .io_store_datafn_hi_r(dccm_ctl_io_store_datafn_hi_r), + .io_store_datafn_lo_r(dccm_ctl_io_store_datafn_lo_r), + .io_ld_single_ecc_error_r(dccm_ctl_io_ld_single_ecc_error_r), + .io_ld_single_ecc_error_r_ff(dccm_ctl_io_ld_single_ecc_error_r_ff), + .io_picm_mask_data_m(dccm_ctl_io_picm_mask_data_m), + .io_lsu_stbuf_commit_any(dccm_ctl_io_lsu_stbuf_commit_any), + .io_lsu_dccm_rden_m(dccm_ctl_io_lsu_dccm_rden_m), + .io_dccm_dma_rvalid(dccm_ctl_io_dccm_dma_rvalid), + .io_dccm_dma_ecc_error(dccm_ctl_io_dccm_dma_ecc_error), + .io_dccm_dma_rtag(dccm_ctl_io_dccm_dma_rtag), + .io_dccm_dma_rdata(dccm_ctl_io_dccm_dma_rdata), + .io_dccm_wren(dccm_ctl_io_dccm_wren), + .io_dccm_rden(dccm_ctl_io_dccm_rden), + .io_dccm_wr_addr_lo(dccm_ctl_io_dccm_wr_addr_lo), + .io_dccm_wr_data_lo(dccm_ctl_io_dccm_wr_data_lo), + .io_dccm_rd_addr_lo(dccm_ctl_io_dccm_rd_addr_lo), + .io_dccm_rd_data_lo(dccm_ctl_io_dccm_rd_data_lo), + .io_dccm_wr_addr_hi(dccm_ctl_io_dccm_wr_addr_hi), + .io_dccm_wr_data_hi(dccm_ctl_io_dccm_wr_data_hi), + .io_dccm_rd_addr_hi(dccm_ctl_io_dccm_rd_addr_hi), + .io_dccm_rd_data_hi(dccm_ctl_io_dccm_rd_data_hi), + .io_picm_wren(dccm_ctl_io_picm_wren), + .io_picm_rden(dccm_ctl_io_picm_rden), + .io_picm_mken(dccm_ctl_io_picm_mken), + .io_picm_rdaddr(dccm_ctl_io_picm_rdaddr), + .io_picm_wraddr(dccm_ctl_io_picm_wraddr), + .io_picm_wr_data(dccm_ctl_io_picm_wr_data), + .io_picm_rd_data(dccm_ctl_io_picm_rd_data), + .io_scan_mode(dccm_ctl_io_scan_mode) + ); + el2_lsu_stbuf stbuf ( // @[el2_lsu.scala 155:30] + .clock(stbuf_clock), + .reset(stbuf_reset), + .io_lsu_c1_m_clk(stbuf_io_lsu_c1_m_clk), + .io_lsu_c1_r_clk(stbuf_io_lsu_c1_r_clk), + .io_lsu_stbuf_c1_clk(stbuf_io_lsu_stbuf_c1_clk), + .io_lsu_free_c2_clk(stbuf_io_lsu_free_c2_clk), + .io_lsu_pkt_m_store(stbuf_io_lsu_pkt_m_store), + .io_lsu_pkt_m_dma(stbuf_io_lsu_pkt_m_dma), + .io_lsu_pkt_m_valid(stbuf_io_lsu_pkt_m_valid), + .io_lsu_pkt_r_by(stbuf_io_lsu_pkt_r_by), + .io_lsu_pkt_r_half(stbuf_io_lsu_pkt_r_half), + .io_lsu_pkt_r_word(stbuf_io_lsu_pkt_r_word), + .io_lsu_pkt_r_dword(stbuf_io_lsu_pkt_r_dword), + .io_lsu_pkt_r_store(stbuf_io_lsu_pkt_r_store), + .io_lsu_pkt_r_dma(stbuf_io_lsu_pkt_r_dma), + .io_lsu_pkt_r_valid(stbuf_io_lsu_pkt_r_valid), + .io_store_stbuf_reqvld_r(stbuf_io_store_stbuf_reqvld_r), + .io_lsu_commit_r(stbuf_io_lsu_commit_r), + .io_dec_lsu_valid_raw_d(stbuf_io_dec_lsu_valid_raw_d), + .io_store_data_hi_r(stbuf_io_store_data_hi_r), + .io_store_data_lo_r(stbuf_io_store_data_lo_r), + .io_store_datafn_hi_r(stbuf_io_store_datafn_hi_r), + .io_store_datafn_lo_r(stbuf_io_store_datafn_lo_r), + .io_lsu_stbuf_commit_any(stbuf_io_lsu_stbuf_commit_any), + .io_lsu_addr_d(stbuf_io_lsu_addr_d), + .io_lsu_addr_m(stbuf_io_lsu_addr_m), + .io_lsu_addr_r(stbuf_io_lsu_addr_r), + .io_end_addr_d(stbuf_io_end_addr_d), + .io_end_addr_m(stbuf_io_end_addr_m), + .io_end_addr_r(stbuf_io_end_addr_r), + .io_addr_in_dccm_m(stbuf_io_addr_in_dccm_m), + .io_addr_in_dccm_r(stbuf_io_addr_in_dccm_r), + .io_stbuf_reqvld_any(stbuf_io_stbuf_reqvld_any), + .io_stbuf_reqvld_flushed_any(stbuf_io_stbuf_reqvld_flushed_any), + .io_stbuf_addr_any(stbuf_io_stbuf_addr_any), + .io_stbuf_data_any(stbuf_io_stbuf_data_any), + .io_lsu_stbuf_full_any(stbuf_io_lsu_stbuf_full_any), + .io_ldst_stbuf_reqvld_r(stbuf_io_ldst_stbuf_reqvld_r), + .io_stbuf_fwddata_hi_m(stbuf_io_stbuf_fwddata_hi_m), + .io_stbuf_fwddata_lo_m(stbuf_io_stbuf_fwddata_lo_m), + .io_stbuf_fwdbyteen_hi_m(stbuf_io_stbuf_fwdbyteen_hi_m), + .io_stbuf_fwdbyteen_lo_m(stbuf_io_stbuf_fwdbyteen_lo_m) + ); + el2_lsu_ecc ecc ( // @[el2_lsu.scala 156:30] + .clock(ecc_clock), + .reset(ecc_reset), + .io_lsu_c2_r_clk(ecc_io_lsu_c2_r_clk), + .io_lsu_pkt_m_load(ecc_io_lsu_pkt_m_load), + .io_lsu_pkt_m_store(ecc_io_lsu_pkt_m_store), + .io_lsu_pkt_m_dma(ecc_io_lsu_pkt_m_dma), + .io_lsu_pkt_m_valid(ecc_io_lsu_pkt_m_valid), + .io_dec_tlu_core_ecc_disable(ecc_io_dec_tlu_core_ecc_disable), + .io_lsu_addr_m(ecc_io_lsu_addr_m), + .io_end_addr_m(ecc_io_end_addr_m), + .io_dccm_rdata_hi_m(ecc_io_dccm_rdata_hi_m), + .io_dccm_rdata_lo_m(ecc_io_dccm_rdata_lo_m), + .io_dccm_data_ecc_hi_m(ecc_io_dccm_data_ecc_hi_m), + .io_dccm_data_ecc_lo_m(ecc_io_dccm_data_ecc_lo_m), + .io_ld_single_ecc_error_r(ecc_io_ld_single_ecc_error_r), + .io_lsu_dccm_rden_m(ecc_io_lsu_dccm_rden_m), + .io_addr_in_dccm_m(ecc_io_addr_in_dccm_m), + .io_sec_data_hi_r(ecc_io_sec_data_hi_r), + .io_sec_data_lo_r(ecc_io_sec_data_lo_r), + .io_sec_data_hi_m(ecc_io_sec_data_hi_m), + .io_sec_data_lo_m(ecc_io_sec_data_lo_m), + .io_sec_data_hi_r_ff(ecc_io_sec_data_hi_r_ff), + .io_sec_data_lo_r_ff(ecc_io_sec_data_lo_r_ff), + .io_single_ecc_error_hi_r(ecc_io_single_ecc_error_hi_r), + .io_single_ecc_error_lo_r(ecc_io_single_ecc_error_lo_r), + .io_lsu_single_ecc_error_r(ecc_io_lsu_single_ecc_error_r), + .io_lsu_double_ecc_error_r(ecc_io_lsu_double_ecc_error_r), + .io_lsu_single_ecc_error_m(ecc_io_lsu_single_ecc_error_m), + .io_lsu_double_ecc_error_m(ecc_io_lsu_double_ecc_error_m) + ); + el2_lsu_trigger trigger ( // @[el2_lsu.scala 157:30] + .io_trigger_pkt_any_0_select(trigger_io_trigger_pkt_any_0_select), + .io_trigger_pkt_any_0_match_(trigger_io_trigger_pkt_any_0_match_), + .io_trigger_pkt_any_0_store(trigger_io_trigger_pkt_any_0_store), + .io_trigger_pkt_any_0_load(trigger_io_trigger_pkt_any_0_load), + .io_trigger_pkt_any_0_tdata2(trigger_io_trigger_pkt_any_0_tdata2), + .io_trigger_pkt_any_1_select(trigger_io_trigger_pkt_any_1_select), + .io_trigger_pkt_any_1_match_(trigger_io_trigger_pkt_any_1_match_), + .io_trigger_pkt_any_1_store(trigger_io_trigger_pkt_any_1_store), + .io_trigger_pkt_any_1_load(trigger_io_trigger_pkt_any_1_load), + .io_trigger_pkt_any_1_tdata2(trigger_io_trigger_pkt_any_1_tdata2), + .io_trigger_pkt_any_2_select(trigger_io_trigger_pkt_any_2_select), + .io_trigger_pkt_any_2_match_(trigger_io_trigger_pkt_any_2_match_), + .io_trigger_pkt_any_2_store(trigger_io_trigger_pkt_any_2_store), + .io_trigger_pkt_any_2_load(trigger_io_trigger_pkt_any_2_load), + .io_trigger_pkt_any_2_tdata2(trigger_io_trigger_pkt_any_2_tdata2), + .io_trigger_pkt_any_3_select(trigger_io_trigger_pkt_any_3_select), + .io_trigger_pkt_any_3_match_(trigger_io_trigger_pkt_any_3_match_), + .io_trigger_pkt_any_3_store(trigger_io_trigger_pkt_any_3_store), + .io_trigger_pkt_any_3_load(trigger_io_trigger_pkt_any_3_load), + .io_trigger_pkt_any_3_tdata2(trigger_io_trigger_pkt_any_3_tdata2), + .io_lsu_pkt_m_half(trigger_io_lsu_pkt_m_half), + .io_lsu_pkt_m_word(trigger_io_lsu_pkt_m_word), + .io_lsu_pkt_m_load(trigger_io_lsu_pkt_m_load), + .io_lsu_pkt_m_store(trigger_io_lsu_pkt_m_store), + .io_lsu_pkt_m_dma(trigger_io_lsu_pkt_m_dma), + .io_lsu_pkt_m_valid(trigger_io_lsu_pkt_m_valid), + .io_lsu_addr_m(trigger_io_lsu_addr_m), + .io_store_data_m(trigger_io_store_data_m), + .io_lsu_trigger_match_m(trigger_io_lsu_trigger_match_m) + ); + el2_lsu_clkdomain clkdomain ( // @[el2_lsu.scala 158:30] + .clock(clkdomain_clock), + .reset(clkdomain_reset), + .io_clk_override(clkdomain_io_clk_override), + .io_dma_dccm_req(clkdomain_io_dma_dccm_req), + .io_ldst_stbuf_reqvld_r(clkdomain_io_ldst_stbuf_reqvld_r), + .io_stbuf_reqvld_any(clkdomain_io_stbuf_reqvld_any), + .io_stbuf_reqvld_flushed_any(clkdomain_io_stbuf_reqvld_flushed_any), + .io_lsu_bus_clk_en(clkdomain_io_lsu_bus_clk_en), + .io_lsu_p_valid(clkdomain_io_lsu_p_valid), + .io_lsu_pkt_d_store(clkdomain_io_lsu_pkt_d_store), + .io_lsu_pkt_d_valid(clkdomain_io_lsu_pkt_d_valid), + .io_lsu_pkt_m_store(clkdomain_io_lsu_pkt_m_store), + .io_lsu_pkt_m_valid(clkdomain_io_lsu_pkt_m_valid), + .io_lsu_c1_m_clk(clkdomain_io_lsu_c1_m_clk), + .io_lsu_c1_r_clk(clkdomain_io_lsu_c1_r_clk), + .io_lsu_c2_m_clk(clkdomain_io_lsu_c2_m_clk), + .io_lsu_c2_r_clk(clkdomain_io_lsu_c2_r_clk), + .io_lsu_stbuf_c1_clk(clkdomain_io_lsu_stbuf_c1_clk), + .io_lsu_free_c2_clk(clkdomain_io_lsu_free_c2_clk), + .io_scan_mode(clkdomain_io_scan_mode) + ); + assign io_lsu_load_stall_any = dccm_ctl_io_ld_single_ecc_error_r_ff; // @[el2_lsu.scala 166:25] + assign io_lsu_store_stall_any = _T | dccm_ctl_io_ld_single_ecc_error_r_ff; // @[el2_lsu.scala 165:26] + assign io_lsu_fastint_stall_any = dccm_ctl_io_ld_single_ecc_error_r; // @[el2_lsu.scala 167:28] + assign io_lsu_idle_any = 1'h0; // @[el2_lsu.scala 187:19] + assign io_lsu_fir_addr = lsu_lsc_ctl_io_lsu_fir_addr; // @[el2_lsu.scala 233:50] + assign io_lsu_fir_error = 2'h0; // @[el2_lsu.scala 234:50] + assign io_lsu_single_ecc_error_incr = lsu_lsc_ctl_io_lsu_single_ecc_error_incr; // @[el2_lsu.scala 231:50] + assign io_lsu_error_pkt_r_exc_valid = lsu_lsc_ctl_io_lsu_error_pkt_r_exc_valid; // @[el2_lsu.scala 232:50] + assign io_lsu_error_pkt_r_single_ecc_error = lsu_lsc_ctl_io_lsu_error_pkt_r_single_ecc_error; // @[el2_lsu.scala 232:50] + assign io_lsu_error_pkt_r_inst_type = lsu_lsc_ctl_io_lsu_error_pkt_r_inst_type; // @[el2_lsu.scala 232:50] + assign io_lsu_error_pkt_r_exc_type = lsu_lsc_ctl_io_lsu_error_pkt_r_exc_type; // @[el2_lsu.scala 232:50] + assign io_lsu_error_pkt_r_mscause = lsu_lsc_ctl_io_lsu_error_pkt_r_mscause; // @[el2_lsu.scala 232:50] + assign io_lsu_error_pkt_r_addr = lsu_lsc_ctl_io_lsu_error_pkt_r_addr; // @[el2_lsu.scala 232:50] + assign io_lsu_imprecise_error_load_any = 1'h0; // @[el2_lsu.scala 434:50] + assign io_lsu_imprecise_error_store_any = 1'h0; // @[el2_lsu.scala 435:50] + assign io_lsu_imprecise_error_addr_any = 32'h0; // @[el2_lsu.scala 436:50] + assign io_lsu_nonblock_load_valid_m = 1'h0; // @[el2_lsu.scala 437:50] + assign io_lsu_nonblock_load_tag_m = 2'h0; // @[el2_lsu.scala 438:50] + assign io_lsu_nonblock_load_inv_r = 1'h0; // @[el2_lsu.scala 439:50] + assign io_lsu_nonblock_load_inv_tag_r = 2'h0; // @[el2_lsu.scala 440:50] + assign io_lsu_nonblock_load_data_valid = 1'h0; // @[el2_lsu.scala 441:50] + assign io_lsu_nonblock_load_data_error = 1'h0; // @[el2_lsu.scala 442:50] + assign io_lsu_nonblock_load_data_tag = 2'h0; // @[el2_lsu.scala 443:50] + assign io_lsu_nonblock_load_data = 32'h0; // @[el2_lsu.scala 444:50] + assign io_lsu_pmu_load_external_m = _T_48 & lsu_lsc_ctl_io_addr_external_m; // @[el2_lsu.scala 196:30] + assign io_lsu_pmu_store_external_m = _T_50 & lsu_lsc_ctl_io_addr_external_m; // @[el2_lsu.scala 197:30] + assign io_lsu_pmu_misaligned_m = lsu_lsc_ctl_io_lsu_pkt_m_valid & _T_46; // @[el2_lsu.scala 195:26] + assign io_lsu_pmu_bus_trxn = 1'h0; // @[el2_lsu.scala 445:50] + assign io_lsu_pmu_bus_misaligned = 1'h0; // @[el2_lsu.scala 446:50] + assign io_lsu_pmu_bus_error = 1'h0; // @[el2_lsu.scala 447:50] + assign io_lsu_pmu_bus_busy = 1'h0; // @[el2_lsu.scala 448:50] + assign io_lsu_trigger_match_m = trigger_io_lsu_trigger_match_m; // @[el2_lsu.scala 381:50] + assign io_dccm_wren = dccm_ctl_io_dccm_wren; // @[el2_lsu.scala 303:50] + assign io_dccm_rden = dccm_ctl_io_dccm_rden; // @[el2_lsu.scala 304:50] + assign io_dccm_wr_addr_lo = dccm_ctl_io_dccm_wr_addr_lo; // @[el2_lsu.scala 305:50] + assign io_dccm_wr_addr_hi = dccm_ctl_io_dccm_wr_addr_hi; // @[el2_lsu.scala 308:50] + assign io_dccm_rd_addr_lo = dccm_ctl_io_dccm_rd_addr_lo; // @[el2_lsu.scala 307:50] + assign io_dccm_rd_addr_hi = dccm_ctl_io_dccm_rd_addr_hi; // @[el2_lsu.scala 310:50] + assign io_dccm_wr_data_lo = dccm_ctl_io_dccm_wr_data_lo; // @[el2_lsu.scala 306:50] + assign io_dccm_wr_data_hi = dccm_ctl_io_dccm_wr_data_hi; // @[el2_lsu.scala 309:50] + assign io_picm_wren = dccm_ctl_io_picm_wren; // @[el2_lsu.scala 311:50] + assign io_picm_rden = dccm_ctl_io_picm_rden; // @[el2_lsu.scala 312:50] + assign io_picm_mken = dccm_ctl_io_picm_mken; // @[el2_lsu.scala 313:50] + assign io_picm_rdaddr = dccm_ctl_io_picm_rdaddr; // @[el2_lsu.scala 314:50] + assign io_picm_wraddr = dccm_ctl_io_picm_wraddr; // @[el2_lsu.scala 315:50] + assign io_picm_wr_data = dccm_ctl_io_picm_wr_data; // @[el2_lsu.scala 316:50] + assign io_lsu_axi_awvalid = 1'h0; // @[el2_lsu.scala 449:50] + assign io_lsu_axi_awlock = 1'h0; // @[el2_lsu.scala 457:50] + assign io_lsu_axi_awid = 3'h0; // @[el2_lsu.scala 451:50] + assign io_lsu_axi_awaddr = 32'h0; // @[el2_lsu.scala 452:50] + assign io_lsu_axi_awregion = 4'h0; // @[el2_lsu.scala 453:50] + assign io_lsu_axi_awlen = 8'h0; // @[el2_lsu.scala 454:50] + assign io_lsu_axi_awsize = 3'h0; // @[el2_lsu.scala 455:50] + assign io_lsu_axi_awburst = 2'h0; // @[el2_lsu.scala 456:50] + assign io_lsu_axi_awcache = 4'h0; // @[el2_lsu.scala 458:50] + assign io_lsu_axi_awprot = 3'h0; // @[el2_lsu.scala 459:50] + assign io_lsu_axi_awqos = 4'h0; // @[el2_lsu.scala 460:50] + assign io_lsu_axi_wvalid = 1'h0; // @[el2_lsu.scala 461:50] + assign io_lsu_axi_wdata = 64'h0; // @[el2_lsu.scala 463:50] + assign io_lsu_axi_wstrb = 8'h0; // @[el2_lsu.scala 464:50] + assign io_lsu_axi_wlast = 1'h0; // @[el2_lsu.scala 465:50] + assign io_lsu_axi_bready = 1'h0; // @[el2_lsu.scala 467:50] + assign io_lsu_axi_arvalid = 1'h0; // @[el2_lsu.scala 470:50] + assign io_lsu_axi_arlock = 1'h0; // @[el2_lsu.scala 478:50] + assign io_lsu_axi_arid = 3'h0; // @[el2_lsu.scala 472:50] + assign io_lsu_axi_araddr = 32'h0; // @[el2_lsu.scala 473:50] + assign io_lsu_axi_arregion = 4'h0; // @[el2_lsu.scala 474:50] + assign io_lsu_axi_arlen = 8'h0; // @[el2_lsu.scala 475:50] + assign io_lsu_axi_arsize = 3'h0; // @[el2_lsu.scala 476:50] + assign io_lsu_axi_arburst = 2'h0; // @[el2_lsu.scala 477:50] + assign io_lsu_axi_arcache = 4'h0; // @[el2_lsu.scala 479:50] + assign io_lsu_axi_arprot = 3'h0; // @[el2_lsu.scala 480:50] + assign io_lsu_axi_arqos = 4'h0; // @[el2_lsu.scala 481:50] + assign io_lsu_axi_rready = 1'h0; // @[el2_lsu.scala 483:50] + assign io_dccm_dma_rvalid = dccm_ctl_io_dccm_dma_rvalid; // @[el2_lsu.scala 299:50] + assign io_dccm_dma_ecc_error = dccm_ctl_io_dccm_dma_ecc_error; // @[el2_lsu.scala 300:50] + assign io_dccm_dma_rtag = dccm_ctl_io_dccm_dma_rtag; // @[el2_lsu.scala 301:50] + assign io_dccm_dma_rdata = dccm_ctl_io_dccm_dma_rdata; // @[el2_lsu.scala 302:50] + assign io_dccm_ready = ~_T_8; // @[el2_lsu.scala 173:17] + assign lsu_lsc_ctl_clock = clock; + assign lsu_lsc_ctl_reset = reset; + assign lsu_lsc_ctl_io_lsu_ld_data_corr_r = dccm_ctl_io_lsu_ld_data_corr_r; // @[el2_lsu.scala 207:50] + assign lsu_lsc_ctl_io_lsu_single_ecc_error_r = ecc_io_lsu_single_ecc_error_r; // @[el2_lsu.scala 208:50] + assign lsu_lsc_ctl_io_lsu_double_ecc_error_r = ecc_io_lsu_double_ecc_error_r; // @[el2_lsu.scala 209:50] + assign lsu_lsc_ctl_io_lsu_ld_data_m = dccm_ctl_io_lsu_ld_data_m; // @[el2_lsu.scala 210:50] + assign lsu_lsc_ctl_io_lsu_single_ecc_error_m = ecc_io_lsu_single_ecc_error_m; // @[el2_lsu.scala 211:50] + assign lsu_lsc_ctl_io_lsu_double_ecc_error_m = ecc_io_lsu_double_ecc_error_m; // @[el2_lsu.scala 212:50] + assign lsu_lsc_ctl_io_flush_m_up = io_dec_tlu_flush_lower_r; // @[el2_lsu.scala 213:50] + assign lsu_lsc_ctl_io_flush_r = io_dec_tlu_i0_kill_writeb_r; // @[el2_lsu.scala 214:50] + assign lsu_lsc_ctl_io_exu_lsu_rs1_d = io_exu_lsu_rs1_d; // @[el2_lsu.scala 215:50] + assign lsu_lsc_ctl_io_exu_lsu_rs2_d = io_exu_lsu_rs2_d; // @[el2_lsu.scala 216:50] + assign lsu_lsc_ctl_io_lsu_p_fast_int = io_lsu_p_fast_int; // @[el2_lsu.scala 217:50] + assign lsu_lsc_ctl_io_lsu_p_by = io_lsu_p_by; // @[el2_lsu.scala 217:50] + assign lsu_lsc_ctl_io_lsu_p_half = io_lsu_p_half; // @[el2_lsu.scala 217:50] + assign lsu_lsc_ctl_io_lsu_p_word = io_lsu_p_word; // @[el2_lsu.scala 217:50] + assign lsu_lsc_ctl_io_lsu_p_dword = io_lsu_p_dword; // @[el2_lsu.scala 217:50] + assign lsu_lsc_ctl_io_lsu_p_load = io_lsu_p_load; // @[el2_lsu.scala 217:50] + assign lsu_lsc_ctl_io_lsu_p_store = io_lsu_p_store; // @[el2_lsu.scala 217:50] + assign lsu_lsc_ctl_io_lsu_p_unsign = io_lsu_p_unsign; // @[el2_lsu.scala 217:50] + assign lsu_lsc_ctl_io_lsu_p_dma = io_lsu_p_dma; // @[el2_lsu.scala 217:50] + assign lsu_lsc_ctl_io_lsu_p_store_data_bypass_d = io_lsu_p_store_data_bypass_d; // @[el2_lsu.scala 217:50] + assign lsu_lsc_ctl_io_lsu_p_load_ldst_bypass_d = io_lsu_p_load_ldst_bypass_d; // @[el2_lsu.scala 217:50] + assign lsu_lsc_ctl_io_lsu_p_store_data_bypass_m = io_lsu_p_store_data_bypass_m; // @[el2_lsu.scala 217:50] + assign lsu_lsc_ctl_io_lsu_p_valid = io_lsu_p_valid; // @[el2_lsu.scala 217:50] + assign lsu_lsc_ctl_io_dec_lsu_valid_raw_d = io_dec_lsu_valid_raw_d; // @[el2_lsu.scala 218:50] + assign lsu_lsc_ctl_io_dec_lsu_offset_d = io_dec_lsu_offset_d; // @[el2_lsu.scala 219:50] + assign lsu_lsc_ctl_io_picm_mask_data_m = dccm_ctl_io_picm_mask_data_m; // @[el2_lsu.scala 220:50] + assign lsu_lsc_ctl_io_dec_tlu_mrac_ff = io_dec_tlu_mrac_ff; // @[el2_lsu.scala 227:50] + assign lsu_lsc_ctl_io_dma_dccm_req = io_dma_dccm_req; // @[el2_lsu.scala 222:50] + assign lsu_lsc_ctl_io_dma_mem_addr = io_dma_mem_addr; // @[el2_lsu.scala 223:50] + assign lsu_lsc_ctl_io_dma_mem_sz = io_dma_mem_sz; // @[el2_lsu.scala 224:50] + assign lsu_lsc_ctl_io_dma_mem_write = io_dma_mem_write; // @[el2_lsu.scala 225:50] + assign lsu_lsc_ctl_io_dma_mem_wdata = io_dma_mem_wdata; // @[el2_lsu.scala 226:50] + assign dccm_ctl_reset = reset; + assign dccm_ctl_io_lsu_c2_m_clk = clkdomain_io_lsu_c2_m_clk; // @[el2_lsu.scala 239:50] + assign dccm_ctl_io_lsu_c2_r_clk = clkdomain_io_lsu_c2_m_clk; // @[el2_lsu.scala 240:50] + assign dccm_ctl_io_lsu_free_c2_clk = clkdomain_io_lsu_c2_r_clk; // @[el2_lsu.scala 241:50] + assign dccm_ctl_io_lsu_store_c1_r_clk = clkdomain_io_lsu_c1_r_clk; // @[el2_lsu.scala 243:50] + assign dccm_ctl_io_clk = clock; // @[el2_lsu.scala 244:50] + assign dccm_ctl_io_lsu_pkt_d_word = lsu_lsc_ctl_io_lsu_pkt_d_word; // @[el2_lsu.scala 245:50] + assign dccm_ctl_io_lsu_pkt_d_dword = lsu_lsc_ctl_io_lsu_pkt_d_dword; // @[el2_lsu.scala 245:50] + assign dccm_ctl_io_lsu_pkt_d_load = lsu_lsc_ctl_io_lsu_pkt_d_load; // @[el2_lsu.scala 245:50] + assign dccm_ctl_io_lsu_pkt_d_store = lsu_lsc_ctl_io_lsu_pkt_d_store; // @[el2_lsu.scala 245:50] + assign dccm_ctl_io_lsu_pkt_d_dma = lsu_lsc_ctl_io_lsu_pkt_d_dma; // @[el2_lsu.scala 245:50] + assign dccm_ctl_io_lsu_pkt_d_valid = lsu_lsc_ctl_io_lsu_pkt_d_valid; // @[el2_lsu.scala 245:50] + assign dccm_ctl_io_lsu_pkt_m_by = lsu_lsc_ctl_io_lsu_pkt_m_by; // @[el2_lsu.scala 246:50] + assign dccm_ctl_io_lsu_pkt_m_half = lsu_lsc_ctl_io_lsu_pkt_m_half; // @[el2_lsu.scala 246:50] + assign dccm_ctl_io_lsu_pkt_m_word = lsu_lsc_ctl_io_lsu_pkt_m_word; // @[el2_lsu.scala 246:50] + assign dccm_ctl_io_lsu_pkt_m_load = lsu_lsc_ctl_io_lsu_pkt_m_load; // @[el2_lsu.scala 246:50] + assign dccm_ctl_io_lsu_pkt_m_store = lsu_lsc_ctl_io_lsu_pkt_m_store; // @[el2_lsu.scala 246:50] + assign dccm_ctl_io_lsu_pkt_m_dma = lsu_lsc_ctl_io_lsu_pkt_m_dma; // @[el2_lsu.scala 246:50] + assign dccm_ctl_io_lsu_pkt_m_valid = lsu_lsc_ctl_io_lsu_pkt_m_valid; // @[el2_lsu.scala 246:50] + assign dccm_ctl_io_lsu_pkt_r_by = lsu_lsc_ctl_io_lsu_pkt_r_by; // @[el2_lsu.scala 247:50] + assign dccm_ctl_io_lsu_pkt_r_half = lsu_lsc_ctl_io_lsu_pkt_r_half; // @[el2_lsu.scala 247:50] + assign dccm_ctl_io_lsu_pkt_r_word = lsu_lsc_ctl_io_lsu_pkt_r_word; // @[el2_lsu.scala 247:50] + assign dccm_ctl_io_lsu_pkt_r_load = lsu_lsc_ctl_io_lsu_pkt_r_load; // @[el2_lsu.scala 247:50] + assign dccm_ctl_io_lsu_pkt_r_store = lsu_lsc_ctl_io_lsu_pkt_r_store; // @[el2_lsu.scala 247:50] + assign dccm_ctl_io_lsu_pkt_r_dma = lsu_lsc_ctl_io_lsu_pkt_r_dma; // @[el2_lsu.scala 247:50] + assign dccm_ctl_io_lsu_pkt_r_valid = lsu_lsc_ctl_io_lsu_pkt_r_valid; // @[el2_lsu.scala 247:50] + assign dccm_ctl_io_addr_in_dccm_d = lsu_lsc_ctl_io_addr_in_dccm_d; // @[el2_lsu.scala 248:50] + assign dccm_ctl_io_addr_in_dccm_m = lsu_lsc_ctl_io_addr_in_dccm_m; // @[el2_lsu.scala 249:50] + assign dccm_ctl_io_addr_in_dccm_r = lsu_lsc_ctl_io_addr_in_dccm_r; // @[el2_lsu.scala 250:50] + assign dccm_ctl_io_addr_in_pic_d = lsu_lsc_ctl_io_addr_in_pic_d; // @[el2_lsu.scala 251:50] + assign dccm_ctl_io_addr_in_pic_m = lsu_lsc_ctl_io_addr_in_pic_m; // @[el2_lsu.scala 252:50] + assign dccm_ctl_io_addr_in_pic_r = lsu_lsc_ctl_io_addr_in_pic_r; // @[el2_lsu.scala 253:50] + assign dccm_ctl_io_lsu_raw_fwd_lo_r = lsu_raw_fwd_lo_r; // @[el2_lsu.scala 254:50] + assign dccm_ctl_io_lsu_raw_fwd_hi_r = lsu_raw_fwd_hi_r; // @[el2_lsu.scala 255:50] + assign dccm_ctl_io_lsu_commit_r = lsu_lsc_ctl_io_lsu_commit_r; // @[el2_lsu.scala 256:50] + assign dccm_ctl_io_lsu_addr_d = lsu_lsc_ctl_io_lsu_addr_d[15:0]; // @[el2_lsu.scala 257:50] + assign dccm_ctl_io_lsu_addr_m = lsu_lsc_ctl_io_lsu_addr_m[15:0]; // @[el2_lsu.scala 258:50] + assign dccm_ctl_io_lsu_addr_r = lsu_lsc_ctl_io_lsu_addr_r[15:0]; // @[el2_lsu.scala 259:50] + assign dccm_ctl_io_end_addr_d = lsu_lsc_ctl_io_end_addr_d[15:0]; // @[el2_lsu.scala 260:50] + assign dccm_ctl_io_end_addr_m = lsu_lsc_ctl_io_end_addr_m[15:0]; // @[el2_lsu.scala 261:50] + assign dccm_ctl_io_end_addr_r = lsu_lsc_ctl_io_end_addr_r[15:0]; // @[el2_lsu.scala 262:50] + assign dccm_ctl_io_stbuf_reqvld_any = stbuf_io_stbuf_reqvld_any; // @[el2_lsu.scala 263:50] + assign dccm_ctl_io_stbuf_addr_any = stbuf_io_stbuf_addr_any; // @[el2_lsu.scala 264:50] + assign dccm_ctl_io_stbuf_data_any = stbuf_io_stbuf_data_any; // @[el2_lsu.scala 265:50] + assign dccm_ctl_io_stbuf_fwddata_hi_m = stbuf_io_stbuf_fwddata_hi_m; // @[el2_lsu.scala 267:50] + assign dccm_ctl_io_stbuf_fwddata_lo_m = stbuf_io_stbuf_fwddata_lo_m; // @[el2_lsu.scala 268:50] + assign dccm_ctl_io_stbuf_fwdbyteen_lo_m = stbuf_io_stbuf_fwdbyteen_lo_m; // @[el2_lsu.scala 269:50] + assign dccm_ctl_io_stbuf_fwdbyteen_hi_m = stbuf_io_stbuf_fwdbyteen_hi_m; // @[el2_lsu.scala 270:50] + assign dccm_ctl_io_lsu_double_ecc_error_r = ecc_io_lsu_double_ecc_error_r; // @[el2_lsu.scala 271:50] + assign dccm_ctl_io_single_ecc_error_hi_r = ecc_io_single_ecc_error_hi_r; // @[el2_lsu.scala 272:50] + assign dccm_ctl_io_single_ecc_error_lo_r = ecc_io_single_ecc_error_lo_r; // @[el2_lsu.scala 273:50] + assign dccm_ctl_io_sec_data_hi_r_ff = ecc_io_sec_data_hi_r_ff; // @[el2_lsu.scala 276:50] + assign dccm_ctl_io_sec_data_lo_r_ff = ecc_io_sec_data_lo_r_ff; // @[el2_lsu.scala 277:50] + assign dccm_ctl_io_lsu_double_ecc_error_m = ecc_io_lsu_double_ecc_error_m; // @[el2_lsu.scala 280:50] + assign dccm_ctl_io_sec_data_hi_m = ecc_io_sec_data_hi_m; // @[el2_lsu.scala 281:50] + assign dccm_ctl_io_sec_data_lo_m = ecc_io_sec_data_lo_m; // @[el2_lsu.scala 282:50] + assign dccm_ctl_io_store_data_m = lsu_lsc_ctl_io_store_data_m; // @[el2_lsu.scala 283:50] + assign dccm_ctl_io_dma_dccm_wen = _T_10 & lsu_lsc_ctl_io_addr_in_dccm_d; // @[el2_lsu.scala 284:50] + assign dccm_ctl_io_dma_pic_wen = _T_10 & lsu_lsc_ctl_io_addr_in_pic_d; // @[el2_lsu.scala 285:50] + assign dccm_ctl_io_dma_mem_tag_m = dma_mem_tag_m[2:0]; // @[el2_lsu.scala 286:50] + assign dccm_ctl_io_dma_mem_addr = io_dma_mem_addr; // @[el2_lsu.scala 287:50] + assign dccm_ctl_io_dma_mem_wdata = io_dma_mem_wdata; // @[el2_lsu.scala 288:50] + assign dccm_ctl_io_dma_dccm_wdata_lo = dma_dccm_wdata[31:0]; // @[el2_lsu.scala 289:50] + assign dccm_ctl_io_dma_dccm_wdata_hi = dma_dccm_wdata[63:32]; // @[el2_lsu.scala 290:50] + assign dccm_ctl_io_dccm_rd_data_lo = io_dccm_rd_data_lo; // @[el2_lsu.scala 293:50] + assign dccm_ctl_io_dccm_rd_data_hi = io_dccm_rd_data_hi; // @[el2_lsu.scala 294:50] + assign dccm_ctl_io_picm_rd_data = io_picm_rd_data; // @[el2_lsu.scala 295:50] + assign dccm_ctl_io_scan_mode = io_scan_mode; // @[el2_lsu.scala 296:50] + assign stbuf_clock = clock; + assign stbuf_reset = reset; + assign stbuf_io_lsu_c1_m_clk = clkdomain_io_lsu_c1_m_clk; // @[el2_lsu.scala 319:50] + assign stbuf_io_lsu_c1_r_clk = clkdomain_io_lsu_c1_m_clk; // @[el2_lsu.scala 320:56] + assign stbuf_io_lsu_stbuf_c1_clk = clkdomain_io_lsu_stbuf_c1_clk; // @[el2_lsu.scala 321:54] + assign stbuf_io_lsu_free_c2_clk = clkdomain_io_lsu_free_c2_clk; // @[el2_lsu.scala 322:54] + assign stbuf_io_lsu_pkt_m_store = lsu_lsc_ctl_io_lsu_pkt_m_store; // @[el2_lsu.scala 323:56] + assign stbuf_io_lsu_pkt_m_dma = lsu_lsc_ctl_io_lsu_pkt_m_dma; // @[el2_lsu.scala 323:56] + assign stbuf_io_lsu_pkt_m_valid = lsu_lsc_ctl_io_lsu_pkt_m_valid; // @[el2_lsu.scala 323:56] + assign stbuf_io_lsu_pkt_r_by = lsu_lsc_ctl_io_lsu_pkt_r_by; // @[el2_lsu.scala 324:56] + assign stbuf_io_lsu_pkt_r_half = lsu_lsc_ctl_io_lsu_pkt_r_half; // @[el2_lsu.scala 324:56] + assign stbuf_io_lsu_pkt_r_word = lsu_lsc_ctl_io_lsu_pkt_r_word; // @[el2_lsu.scala 324:56] + assign stbuf_io_lsu_pkt_r_dword = lsu_lsc_ctl_io_lsu_pkt_r_dword; // @[el2_lsu.scala 324:56] + assign stbuf_io_lsu_pkt_r_store = lsu_lsc_ctl_io_lsu_pkt_r_store; // @[el2_lsu.scala 324:56] + assign stbuf_io_lsu_pkt_r_dma = lsu_lsc_ctl_io_lsu_pkt_r_dma; // @[el2_lsu.scala 324:56] + assign stbuf_io_lsu_pkt_r_valid = lsu_lsc_ctl_io_lsu_pkt_r_valid; // @[el2_lsu.scala 324:56] + assign stbuf_io_store_stbuf_reqvld_r = _T_28 & _T_19; // @[el2_lsu.scala 325:56] + assign stbuf_io_lsu_commit_r = lsu_lsc_ctl_io_lsu_commit_r; // @[el2_lsu.scala 326:50] + assign stbuf_io_dec_lsu_valid_raw_d = io_dec_lsu_valid_raw_d; // @[el2_lsu.scala 327:50] + assign stbuf_io_store_data_hi_r = dccm_ctl_io_store_data_hi_r; // @[el2_lsu.scala 328:62] + assign stbuf_io_store_data_lo_r = dccm_ctl_io_store_data_lo_r; // @[el2_lsu.scala 329:62] + assign stbuf_io_store_datafn_hi_r = dccm_ctl_io_store_datafn_hi_r; // @[el2_lsu.scala 330:50] + assign stbuf_io_store_datafn_lo_r = dccm_ctl_io_store_datafn_lo_r; // @[el2_lsu.scala 331:56] + assign stbuf_io_lsu_stbuf_commit_any = dccm_ctl_io_lsu_stbuf_commit_any; // @[el2_lsu.scala 332:60] + assign stbuf_io_lsu_addr_d = lsu_lsc_ctl_io_lsu_addr_d[15:0]; // @[el2_lsu.scala 333:64] + assign stbuf_io_lsu_addr_m = lsu_lsc_ctl_io_lsu_addr_m; // @[el2_lsu.scala 334:64] + assign stbuf_io_lsu_addr_r = lsu_lsc_ctl_io_lsu_addr_r; // @[el2_lsu.scala 335:64] + assign stbuf_io_end_addr_d = lsu_lsc_ctl_io_end_addr_d[15:0]; // @[el2_lsu.scala 336:64] + assign stbuf_io_end_addr_m = lsu_lsc_ctl_io_end_addr_m; // @[el2_lsu.scala 337:64] + assign stbuf_io_end_addr_r = lsu_lsc_ctl_io_end_addr_r; // @[el2_lsu.scala 338:64] + assign stbuf_io_addr_in_dccm_m = lsu_lsc_ctl_io_addr_in_dccm_m; // @[el2_lsu.scala 339:50] + assign stbuf_io_addr_in_dccm_r = lsu_lsc_ctl_io_addr_in_dccm_r; // @[el2_lsu.scala 340:56] + assign ecc_clock = clock; + assign ecc_reset = reset; + assign ecc_io_lsu_c2_r_clk = clkdomain_io_lsu_c2_r_clk; // @[el2_lsu.scala 346:52] + assign ecc_io_lsu_pkt_m_load = lsu_lsc_ctl_io_lsu_pkt_m_load; // @[el2_lsu.scala 347:52] + assign ecc_io_lsu_pkt_m_store = lsu_lsc_ctl_io_lsu_pkt_m_store; // @[el2_lsu.scala 347:52] + assign ecc_io_lsu_pkt_m_dma = lsu_lsc_ctl_io_lsu_pkt_m_dma; // @[el2_lsu.scala 347:52] + assign ecc_io_lsu_pkt_m_valid = lsu_lsc_ctl_io_lsu_pkt_m_valid; // @[el2_lsu.scala 347:52] + assign ecc_io_dec_tlu_core_ecc_disable = io_dec_tlu_core_ecc_disable; // @[el2_lsu.scala 350:50] + assign ecc_io_lsu_addr_m = lsu_lsc_ctl_io_lsu_addr_m[15:0]; // @[el2_lsu.scala 355:58] + assign ecc_io_end_addr_m = lsu_lsc_ctl_io_end_addr_m[15:0]; // @[el2_lsu.scala 356:58] + assign ecc_io_dccm_rdata_hi_m = dccm_ctl_io_dccm_rdata_hi_m; // @[el2_lsu.scala 359:54] + assign ecc_io_dccm_rdata_lo_m = dccm_ctl_io_dccm_rdata_lo_m; // @[el2_lsu.scala 360:54] + assign ecc_io_dccm_data_ecc_hi_m = dccm_ctl_io_dccm_data_ecc_hi_m; // @[el2_lsu.scala 363:50] + assign ecc_io_dccm_data_ecc_lo_m = dccm_ctl_io_dccm_data_ecc_lo_m; // @[el2_lsu.scala 364:50] + assign ecc_io_ld_single_ecc_error_r = dccm_ctl_io_ld_single_ecc_error_r; // @[el2_lsu.scala 365:50] + assign ecc_io_lsu_dccm_rden_m = dccm_ctl_io_lsu_dccm_rden_m; // @[el2_lsu.scala 367:50] + assign ecc_io_addr_in_dccm_m = lsu_lsc_ctl_io_addr_in_dccm_m; // @[el2_lsu.scala 368:50] + assign trigger_io_trigger_pkt_any_0_select = io_trigger_pkt_any_0_select; // @[el2_lsu.scala 376:50] + assign trigger_io_trigger_pkt_any_0_match_ = io_trigger_pkt_any_0_match_; // @[el2_lsu.scala 376:50] + assign trigger_io_trigger_pkt_any_0_store = io_trigger_pkt_any_0_store; // @[el2_lsu.scala 376:50] + assign trigger_io_trigger_pkt_any_0_load = io_trigger_pkt_any_0_load; // @[el2_lsu.scala 376:50] + assign trigger_io_trigger_pkt_any_0_tdata2 = io_trigger_pkt_any_0_tdata2; // @[el2_lsu.scala 376:50] + assign trigger_io_trigger_pkt_any_1_select = io_trigger_pkt_any_1_select; // @[el2_lsu.scala 376:50] + assign trigger_io_trigger_pkt_any_1_match_ = io_trigger_pkt_any_1_match_; // @[el2_lsu.scala 376:50] + assign trigger_io_trigger_pkt_any_1_store = io_trigger_pkt_any_1_store; // @[el2_lsu.scala 376:50] + assign trigger_io_trigger_pkt_any_1_load = io_trigger_pkt_any_1_load; // @[el2_lsu.scala 376:50] + assign trigger_io_trigger_pkt_any_1_tdata2 = io_trigger_pkt_any_1_tdata2; // @[el2_lsu.scala 376:50] + assign trigger_io_trigger_pkt_any_2_select = io_trigger_pkt_any_2_select; // @[el2_lsu.scala 376:50] + assign trigger_io_trigger_pkt_any_2_match_ = io_trigger_pkt_any_2_match_; // @[el2_lsu.scala 376:50] + assign trigger_io_trigger_pkt_any_2_store = io_trigger_pkt_any_2_store; // @[el2_lsu.scala 376:50] + assign trigger_io_trigger_pkt_any_2_load = io_trigger_pkt_any_2_load; // @[el2_lsu.scala 376:50] + assign trigger_io_trigger_pkt_any_2_tdata2 = io_trigger_pkt_any_2_tdata2; // @[el2_lsu.scala 376:50] + assign trigger_io_trigger_pkt_any_3_select = io_trigger_pkt_any_3_select; // @[el2_lsu.scala 376:50] + assign trigger_io_trigger_pkt_any_3_match_ = io_trigger_pkt_any_3_match_; // @[el2_lsu.scala 376:50] + assign trigger_io_trigger_pkt_any_3_store = io_trigger_pkt_any_3_store; // @[el2_lsu.scala 376:50] + assign trigger_io_trigger_pkt_any_3_load = io_trigger_pkt_any_3_load; // @[el2_lsu.scala 376:50] + assign trigger_io_trigger_pkt_any_3_tdata2 = io_trigger_pkt_any_3_tdata2; // @[el2_lsu.scala 376:50] + assign trigger_io_lsu_pkt_m_half = lsu_lsc_ctl_io_lsu_pkt_m_half; // @[el2_lsu.scala 377:50] + assign trigger_io_lsu_pkt_m_word = lsu_lsc_ctl_io_lsu_pkt_m_word; // @[el2_lsu.scala 377:50] + assign trigger_io_lsu_pkt_m_load = lsu_lsc_ctl_io_lsu_pkt_m_load; // @[el2_lsu.scala 377:50] + assign trigger_io_lsu_pkt_m_store = lsu_lsc_ctl_io_lsu_pkt_m_store; // @[el2_lsu.scala 377:50] + assign trigger_io_lsu_pkt_m_dma = lsu_lsc_ctl_io_lsu_pkt_m_dma; // @[el2_lsu.scala 377:50] + assign trigger_io_lsu_pkt_m_valid = lsu_lsc_ctl_io_lsu_pkt_m_valid; // @[el2_lsu.scala 377:50] + assign trigger_io_lsu_addr_m = lsu_lsc_ctl_io_lsu_addr_m; // @[el2_lsu.scala 378:50] + assign trigger_io_store_data_m = lsu_lsc_ctl_io_store_data_m; // @[el2_lsu.scala 379:50] + assign clkdomain_clock = clock; + assign clkdomain_reset = reset; + assign clkdomain_io_clk_override = io_clk_override; // @[el2_lsu.scala 386:50] + assign clkdomain_io_dma_dccm_req = io_dma_dccm_req; // @[el2_lsu.scala 388:50] + assign clkdomain_io_ldst_stbuf_reqvld_r = stbuf_io_ldst_stbuf_reqvld_r; // @[el2_lsu.scala 389:50] + assign clkdomain_io_stbuf_reqvld_any = stbuf_io_stbuf_reqvld_any; // @[el2_lsu.scala 390:50] + assign clkdomain_io_stbuf_reqvld_flushed_any = stbuf_io_stbuf_reqvld_flushed_any; // @[el2_lsu.scala 391:50] + assign clkdomain_io_lsu_bus_clk_en = io_lsu_bus_clk_en; // @[el2_lsu.scala 396:50] + assign clkdomain_io_lsu_p_valid = io_lsu_p_valid; // @[el2_lsu.scala 397:50] + assign clkdomain_io_lsu_pkt_d_store = lsu_lsc_ctl_io_lsu_pkt_d_store; // @[el2_lsu.scala 398:50] + assign clkdomain_io_lsu_pkt_d_valid = lsu_lsc_ctl_io_lsu_pkt_d_valid; // @[el2_lsu.scala 398:50] + assign clkdomain_io_lsu_pkt_m_store = lsu_lsc_ctl_io_lsu_pkt_m_store; // @[el2_lsu.scala 399:50] + assign clkdomain_io_lsu_pkt_m_valid = lsu_lsc_ctl_io_lsu_pkt_m_valid; // @[el2_lsu.scala 399:50] + assign clkdomain_io_scan_mode = io_scan_mode; // @[el2_lsu.scala 401:50] +`ifdef RANDOMIZE_GARBAGE_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_INVALID_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_REG_INIT +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_MEM_INIT +`define RANDOMIZE +`endif +`ifndef RANDOM +`define RANDOM $random +`endif +`ifdef RANDOMIZE_MEM_INIT + integer initvar; +`endif +`ifndef SYNTHESIS +`ifdef FIRRTL_BEFORE_INITIAL +`FIRRTL_BEFORE_INITIAL +`endif +initial begin + `ifdef RANDOMIZE + `ifdef INIT_RANDOM + `INIT_RANDOM + `endif + `ifndef VERILATOR + `ifdef RANDOMIZE_DELAY + #`RANDOMIZE_DELAY begin end + `else + #0.002 begin end + `endif + `endif +`ifdef RANDOMIZE_REG_INIT + _RAND_0 = {1{`RANDOM}}; + _T_52 = _RAND_0[2:0]; + _RAND_1 = {1{`RANDOM}}; + lsu_raw_fwd_hi_r = _RAND_1[0:0]; + _RAND_2 = {1{`RANDOM}}; + lsu_raw_fwd_lo_r = _RAND_2[0:0]; +`endif // RANDOMIZE_REG_INIT + if (reset) begin + _T_52 = 3'h0; + end + if (reset) begin + lsu_raw_fwd_hi_r = 1'h0; + end + if (reset) begin + lsu_raw_fwd_lo_r = 1'h0; + end + `endif // RANDOMIZE +end // initial +`ifdef FIRRTL_AFTER_INITIAL +`FIRRTL_AFTER_INITIAL +`endif +`endif // SYNTHESIS + always @(posedge clkdomain_io_lsu_c1_m_clk or posedge reset) begin + if (reset) begin + _T_52 <= 3'h0; + end else begin + _T_52 <= io_dma_mem_tag; + end + end + always @(posedge clkdomain_io_lsu_c2_r_clk or posedge reset) begin + if (reset) begin + lsu_raw_fwd_hi_r <= 1'h0; + end else begin + lsu_raw_fwd_hi_r <= |stbuf_io_stbuf_fwdbyteen_hi_m; + end + end + always @(posedge clkdomain_io_lsu_c2_r_clk or posedge reset) begin + if (reset) begin + lsu_raw_fwd_lo_r <= 1'h0; + end else begin + lsu_raw_fwd_lo_r <= |stbuf_io_stbuf_fwdbyteen_lo_m; + end + end +endmodule diff --git a/el2_lsu_addrcheck.anno.json b/el2_lsu_addrcheck.anno.json new file mode 100644 index 00000000..fb37c204 --- /dev/null +++ b/el2_lsu_addrcheck.anno.json @@ -0,0 +1,111 @@ +[ + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_addrcheck|el2_lsu_addrcheck>io_exc_mscause_d", + "sources":[ + "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_misaligned_fault_d", + "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_lsu_pkt_d_valid", + "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_lsu_pkt_d_dma", + "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_start_addr_d", + "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_end_addr_d", + "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_addr_external_d", + "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_lsu_pkt_d_store", + "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_lsu_pkt_d_load", + "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_lsu_pkt_d_by", + "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_addr_in_pic_d", + "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_lsu_pkt_d_word", + "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_lsu_pkt_d_half", + "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_rs1_region_d", + "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_dec_tlu_mrac_ff" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_addrcheck|el2_lsu_addrcheck>io_addr_external_d", + "sources":[ + "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_start_addr_d" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_addrcheck|el2_lsu_addrcheck>io_misaligned_fault_d", + "sources":[ + "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_lsu_pkt_d_valid", + "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_lsu_pkt_d_dma", + "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_addr_external_d", + "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_start_addr_d", + "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_end_addr_d", + "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_lsu_pkt_d_store", + "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_lsu_pkt_d_load", + "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_lsu_pkt_d_by", + "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_lsu_pkt_d_word", + "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_lsu_pkt_d_half", + "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_dec_tlu_mrac_ff" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_addrcheck|el2_lsu_addrcheck>io_fir_nondccm_access_error_d", + "sources":[ + "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_lsu_pkt_d_fast_int", + "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_lsu_pkt_d_valid", + "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_start_addr_d", + "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_end_addr_d" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_addrcheck|el2_lsu_addrcheck>io_addr_in_dccm_d", + "sources":[ + "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_start_addr_d", + "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_end_addr_d" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_addrcheck|el2_lsu_addrcheck>io_fir_dccm_access_error_d", + "sources":[ + "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_lsu_pkt_d_fast_int", + "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_lsu_pkt_d_valid", + "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_start_addr_d", + "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_end_addr_d" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_addrcheck|el2_lsu_addrcheck>io_addr_in_pic_d", + "sources":[ + "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_start_addr_d", + "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_end_addr_d" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_addrcheck|el2_lsu_addrcheck>io_access_fault_d", + "sources":[ + "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_lsu_pkt_d_valid", + "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_lsu_pkt_d_dma", + "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_addr_in_pic_d", + "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_lsu_pkt_d_word", + "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_rs1_region_d", + "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_start_addr_d", + "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_end_addr_d" + ] + }, + { + "class":"firrtl.EmitCircuitAnnotation", + "emitter":"firrtl.VerilogEmitter" + }, + { + "class":"firrtl.options.TargetDirAnnotation", + "directory":"." + }, + { + "class":"firrtl.options.OutputAnnotationFileAnnotation", + "file":"el2_lsu_addrcheck" + }, + { + "class":"firrtl.transforms.BlackBoxTargetDirAnno", + "targetDir":"." + } +] \ No newline at end of file diff --git a/el2_lsu_addrcheck.fir b/el2_lsu_addrcheck.fir new file mode 100644 index 00000000..bd1a2746 --- /dev/null +++ b/el2_lsu_addrcheck.fir @@ -0,0 +1,304 @@ +;buildInfoPackage: chisel3, version: 3.3.1, scalaVersion: 2.12.11, sbtVersion: 1.3.10 +circuit el2_lsu_addrcheck : + module rvrangecheck : + input clock : Clock + input reset : Reset + output io : {flip addr : UInt<32>, in_range : UInt<1>, in_region : UInt<1>} + + node _T = bits(io.addr, 31, 28) @[beh_lib.scala 113:30] + node _T_1 = eq(_T, UInt<4>("h0f")) @[beh_lib.scala 113:52] + io.in_region <= _T_1 @[beh_lib.scala 113:19] + node _T_2 = bits(io.addr, 31, 16) @[beh_lib.scala 117:30] + node _T_3 = eq(_T_2, UInt<16>("h0f004")) @[beh_lib.scala 117:45] + io.in_range <= _T_3 @[beh_lib.scala 117:19] + + module rvrangecheck_1 : + input clock : Clock + input reset : Reset + output io : {flip addr : UInt<32>, in_range : UInt<1>, in_region : UInt<1>} + + node _T = bits(io.addr, 31, 28) @[beh_lib.scala 113:30] + node _T_1 = eq(_T, UInt<4>("h0f")) @[beh_lib.scala 113:52] + io.in_region <= _T_1 @[beh_lib.scala 113:19] + node _T_2 = bits(io.addr, 31, 16) @[beh_lib.scala 117:30] + node _T_3 = eq(_T_2, UInt<16>("h0f004")) @[beh_lib.scala 117:45] + io.in_range <= _T_3 @[beh_lib.scala 117:19] + + module rvrangecheck_2 : + input clock : Clock + input reset : Reset + output io : {flip addr : UInt<32>, in_range : UInt<1>, in_region : UInt<1>} + + node _T = bits(io.addr, 31, 28) @[beh_lib.scala 113:30] + node _T_1 = eq(_T, UInt<4>("h0f")) @[beh_lib.scala 113:52] + io.in_region <= _T_1 @[beh_lib.scala 113:19] + node _T_2 = bits(io.addr, 31, 15) @[beh_lib.scala 117:30] + node _T_3 = eq(_T_2, UInt<17>("h01e018")) @[beh_lib.scala 117:45] + io.in_range <= _T_3 @[beh_lib.scala 117:19] + + module rvrangecheck_3 : + input clock : Clock + input reset : Reset + output io : {flip addr : UInt<32>, in_range : UInt<1>, in_region : UInt<1>} + + node _T = bits(io.addr, 31, 28) @[beh_lib.scala 113:30] + node _T_1 = eq(_T, UInt<4>("h0f")) @[beh_lib.scala 113:52] + io.in_region <= _T_1 @[beh_lib.scala 113:19] + node _T_2 = bits(io.addr, 31, 15) @[beh_lib.scala 117:30] + node _T_3 = eq(_T_2, UInt<17>("h01e018")) @[beh_lib.scala 117:45] + io.in_range <= _T_3 @[beh_lib.scala 117:19] + + module el2_lsu_addrcheck : + input clock : Clock + input reset : AsyncReset + output io : {flip lsu_c2_m_clk : Clock, flip start_addr_d : UInt<32>, flip end_addr_d : UInt<32>, flip lsu_pkt_d : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip dec_tlu_mrac_ff : UInt<32>, flip rs1_region_d : UInt<4>, flip rs1_d : UInt<32>, is_sideeffects_m : UInt<1>, addr_in_dccm_d : UInt<1>, addr_in_pic_d : UInt<1>, addr_external_d : UInt<1>, access_fault_d : UInt<1>, misaligned_fault_d : UInt<1>, exc_mscause_d : UInt<4>, fir_dccm_access_error_d : UInt<1>, fir_nondccm_access_error_d : UInt<1>, flip scan_mode : UInt<1>} + + wire start_addr_in_dccm_d : UInt<1> + start_addr_in_dccm_d <= UInt<1>("h00") + wire start_addr_in_dccm_region_d : UInt<1> + start_addr_in_dccm_region_d <= UInt<1>("h00") + wire end_addr_in_dccm_d : UInt<1> + end_addr_in_dccm_d <= UInt<1>("h00") + wire end_addr_in_dccm_region_d : UInt<1> + end_addr_in_dccm_region_d <= UInt<1>("h00") + inst rvrangecheck of rvrangecheck @[el2_lsu_addrcheck.scala 45:44] + rvrangecheck.clock <= clock + rvrangecheck.reset <= reset + rvrangecheck.io.addr <= io.start_addr_d @[el2_lsu_addrcheck.scala 46:41] + start_addr_in_dccm_d <= rvrangecheck.io.in_range @[el2_lsu_addrcheck.scala 47:41] + start_addr_in_dccm_region_d <= rvrangecheck.io.in_region @[el2_lsu_addrcheck.scala 48:41] + inst rvrangecheck_1 of rvrangecheck_1 @[el2_lsu_addrcheck.scala 51:44] + rvrangecheck_1.clock <= clock + rvrangecheck_1.reset <= reset + rvrangecheck_1.io.addr <= io.end_addr_d @[el2_lsu_addrcheck.scala 52:41] + end_addr_in_dccm_d <= rvrangecheck_1.io.in_range @[el2_lsu_addrcheck.scala 53:41] + end_addr_in_dccm_region_d <= rvrangecheck_1.io.in_region @[el2_lsu_addrcheck.scala 54:41] + wire addr_in_iccm : UInt<1> + addr_in_iccm <= UInt<1>("h00") + node _T = bits(io.start_addr_d, 31, 28) @[el2_lsu_addrcheck.scala 65:37] + node _T_1 = eq(_T, UInt<4>("h0e")) @[el2_lsu_addrcheck.scala 65:45] + addr_in_iccm <= _T_1 @[el2_lsu_addrcheck.scala 65:18] + inst start_addr_pic_rangecheck of rvrangecheck_2 @[el2_lsu_addrcheck.scala 74:41] + start_addr_pic_rangecheck.clock <= clock + start_addr_pic_rangecheck.reset <= reset + node _T_2 = bits(io.start_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 75:55] + start_addr_pic_rangecheck.io.addr <= _T_2 @[el2_lsu_addrcheck.scala 75:37] + inst end_addr_pic_rangecheck of rvrangecheck_3 @[el2_lsu_addrcheck.scala 80:39] + end_addr_pic_rangecheck.clock <= clock + end_addr_pic_rangecheck.reset <= reset + node _T_3 = bits(io.end_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 81:51] + end_addr_pic_rangecheck.io.addr <= _T_3 @[el2_lsu_addrcheck.scala 81:35] + node start_addr_dccm_or_pic = or(start_addr_in_dccm_region_d, start_addr_pic_rangecheck.io.in_region) @[el2_lsu_addrcheck.scala 85:60] + node _T_4 = bits(io.rs1_region_d, 3, 0) @[el2_lsu_addrcheck.scala 86:48] + node _T_5 = eq(_T_4, UInt<4>("h0f")) @[el2_lsu_addrcheck.scala 86:54] + node _T_6 = bits(io.rs1_region_d, 3, 0) @[el2_lsu_addrcheck.scala 86:92] + node _T_7 = eq(_T_6, UInt<4>("h0f")) @[el2_lsu_addrcheck.scala 86:98] + node base_reg_dccm_or_pic = or(_T_5, _T_7) @[el2_lsu_addrcheck.scala 86:74] + node _T_8 = and(start_addr_in_dccm_d, end_addr_in_dccm_d) @[el2_lsu_addrcheck.scala 87:57] + io.addr_in_dccm_d <= _T_8 @[el2_lsu_addrcheck.scala 87:32] + node _T_9 = and(start_addr_pic_rangecheck.io.in_range, end_addr_pic_rangecheck.io.in_range) @[el2_lsu_addrcheck.scala 88:56] + io.addr_in_pic_d <= _T_9 @[el2_lsu_addrcheck.scala 88:32] + node _T_10 = or(start_addr_in_dccm_region_d, start_addr_pic_rangecheck.io.in_region) @[el2_lsu_addrcheck.scala 90:63] + node _T_11 = not(_T_10) @[el2_lsu_addrcheck.scala 90:33] + io.addr_external_d <= _T_11 @[el2_lsu_addrcheck.scala 90:30] + node _T_12 = bits(io.start_addr_d, 31, 28) @[el2_lsu_addrcheck.scala 91:51] + node csr_idx = cat(_T_12, UInt<1>("h01")) @[Cat.scala 29:58] + node _T_13 = dshr(io.dec_tlu_mrac_ff, csr_idx) @[el2_lsu_addrcheck.scala 92:50] + node _T_14 = bits(_T_13, 0, 0) @[el2_lsu_addrcheck.scala 92:50] + node _T_15 = or(start_addr_in_dccm_region_d, start_addr_pic_rangecheck.io.in_region) @[el2_lsu_addrcheck.scala 92:92] + node _T_16 = or(_T_15, addr_in_iccm) @[el2_lsu_addrcheck.scala 92:121] + node _T_17 = not(_T_16) @[el2_lsu_addrcheck.scala 92:62] + node _T_18 = and(_T_14, _T_17) @[el2_lsu_addrcheck.scala 92:60] + node _T_19 = and(_T_18, io.lsu_pkt_d.valid) @[el2_lsu_addrcheck.scala 92:137] + node _T_20 = or(io.lsu_pkt_d.store, io.lsu_pkt_d.load) @[el2_lsu_addrcheck.scala 92:180] + node is_sideeffects_d = and(_T_19, _T_20) @[el2_lsu_addrcheck.scala 92:158] + node _T_21 = bits(io.start_addr_d, 1, 0) @[el2_lsu_addrcheck.scala 93:69] + node _T_22 = eq(_T_21, UInt<1>("h00")) @[el2_lsu_addrcheck.scala 93:75] + node _T_23 = and(io.lsu_pkt_d.word, _T_22) @[el2_lsu_addrcheck.scala 93:51] + node _T_24 = bits(io.start_addr_d, 0, 0) @[el2_lsu_addrcheck.scala 93:124] + node _T_25 = eq(_T_24, UInt<1>("h00")) @[el2_lsu_addrcheck.scala 93:128] + node _T_26 = and(io.lsu_pkt_d.half, _T_25) @[el2_lsu_addrcheck.scala 93:106] + node _T_27 = or(_T_23, _T_26) @[el2_lsu_addrcheck.scala 93:85] + node is_aligned_d = or(_T_27, io.lsu_pkt_d.by) @[el2_lsu_addrcheck.scala 93:138] + node _T_28 = cat(UInt<1>("h00"), UInt<1>("h00")) @[Cat.scala 29:58] + node _T_29 = cat(UInt<1>("h00"), UInt<1>("h00")) @[Cat.scala 29:58] + node _T_30 = cat(_T_29, _T_28) @[Cat.scala 29:58] + node _T_31 = cat(UInt<1>("h01"), UInt<1>("h01")) @[Cat.scala 29:58] + node _T_32 = cat(UInt<1>("h01"), UInt<1>("h01")) @[Cat.scala 29:58] + node _T_33 = cat(_T_32, _T_31) @[Cat.scala 29:58] + node _T_34 = cat(_T_33, _T_30) @[Cat.scala 29:58] + node _T_35 = orr(_T_34) @[el2_lsu_addrcheck.scala 97:99] + node _T_36 = not(_T_35) @[el2_lsu_addrcheck.scala 96:33] + node _T_37 = bits(io.start_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 98:50] + node _T_38 = or(_T_37, UInt<32>("h07fffffff")) @[el2_lsu_addrcheck.scala 98:57] + node _T_39 = or(UInt<32>("h00"), UInt<32>("h07fffffff")) @[el2_lsu_addrcheck.scala 98:108] + node _T_40 = eq(_T_38, _T_39) @[el2_lsu_addrcheck.scala 98:82] + node _T_41 = and(UInt<1>("h01"), _T_40) @[el2_lsu_addrcheck.scala 98:31] + node _T_42 = bits(io.start_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 99:50] + node _T_43 = or(_T_42, UInt<32>("h03fffffff")) @[el2_lsu_addrcheck.scala 99:57] + node _T_44 = or(UInt<32>("h0c0000000"), UInt<32>("h03fffffff")) @[el2_lsu_addrcheck.scala 99:108] + node _T_45 = eq(_T_43, _T_44) @[el2_lsu_addrcheck.scala 99:82] + node _T_46 = and(UInt<1>("h01"), _T_45) @[el2_lsu_addrcheck.scala 99:31] + node _T_47 = or(_T_41, _T_46) @[el2_lsu_addrcheck.scala 98:133] + node _T_48 = bits(io.start_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 100:50] + node _T_49 = or(_T_48, UInt<32>("h01fffffff")) @[el2_lsu_addrcheck.scala 100:57] + node _T_50 = or(UInt<32>("h0a0000000"), UInt<32>("h01fffffff")) @[el2_lsu_addrcheck.scala 100:108] + node _T_51 = eq(_T_49, _T_50) @[el2_lsu_addrcheck.scala 100:82] + node _T_52 = and(UInt<1>("h01"), _T_51) @[el2_lsu_addrcheck.scala 100:31] + node _T_53 = or(_T_47, _T_52) @[el2_lsu_addrcheck.scala 99:133] + node _T_54 = bits(io.start_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 101:50] + node _T_55 = or(_T_54, UInt<32>("h0fffffff")) @[el2_lsu_addrcheck.scala 101:57] + node _T_56 = or(UInt<32>("h080000000"), UInt<32>("h0fffffff")) @[el2_lsu_addrcheck.scala 101:108] + node _T_57 = eq(_T_55, _T_56) @[el2_lsu_addrcheck.scala 101:82] + node _T_58 = and(UInt<1>("h01"), _T_57) @[el2_lsu_addrcheck.scala 101:31] + node _T_59 = or(_T_53, _T_58) @[el2_lsu_addrcheck.scala 100:133] + node _T_60 = bits(io.start_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 102:50] + node _T_61 = or(_T_60, UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 102:57] + node _T_62 = or(UInt<32>("h00"), UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 102:108] + node _T_63 = eq(_T_61, _T_62) @[el2_lsu_addrcheck.scala 102:82] + node _T_64 = and(UInt<1>("h00"), _T_63) @[el2_lsu_addrcheck.scala 102:31] + node _T_65 = or(_T_59, _T_64) @[el2_lsu_addrcheck.scala 101:133] + node _T_66 = bits(io.start_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 103:50] + node _T_67 = or(_T_66, UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 103:57] + node _T_68 = or(UInt<32>("h00"), UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 103:108] + node _T_69 = eq(_T_67, _T_68) @[el2_lsu_addrcheck.scala 103:82] + node _T_70 = and(UInt<1>("h00"), _T_69) @[el2_lsu_addrcheck.scala 103:31] + node _T_71 = or(_T_65, _T_70) @[el2_lsu_addrcheck.scala 102:133] + node _T_72 = bits(io.start_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 104:50] + node _T_73 = or(_T_72, UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 104:57] + node _T_74 = or(UInt<32>("h00"), UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 104:108] + node _T_75 = eq(_T_73, _T_74) @[el2_lsu_addrcheck.scala 104:82] + node _T_76 = and(UInt<1>("h00"), _T_75) @[el2_lsu_addrcheck.scala 104:31] + node _T_77 = or(_T_71, _T_76) @[el2_lsu_addrcheck.scala 103:133] + node _T_78 = bits(io.start_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 105:50] + node _T_79 = or(_T_78, UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 105:57] + node _T_80 = or(UInt<32>("h00"), UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 105:108] + node _T_81 = eq(_T_79, _T_80) @[el2_lsu_addrcheck.scala 105:82] + node _T_82 = and(UInt<1>("h00"), _T_81) @[el2_lsu_addrcheck.scala 105:31] + node _T_83 = or(_T_77, _T_82) @[el2_lsu_addrcheck.scala 104:133] + node _T_84 = bits(io.end_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 107:49] + node _T_85 = or(_T_84, UInt<32>("h07fffffff")) @[el2_lsu_addrcheck.scala 107:58] + node _T_86 = or(UInt<32>("h00"), UInt<32>("h07fffffff")) @[el2_lsu_addrcheck.scala 107:109] + node _T_87 = eq(_T_85, _T_86) @[el2_lsu_addrcheck.scala 107:83] + node _T_88 = and(UInt<1>("h01"), _T_87) @[el2_lsu_addrcheck.scala 107:32] + node _T_89 = bits(io.end_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 108:50] + node _T_90 = or(_T_89, UInt<32>("h03fffffff")) @[el2_lsu_addrcheck.scala 108:59] + node _T_91 = or(UInt<32>("h0c0000000"), UInt<32>("h03fffffff")) @[el2_lsu_addrcheck.scala 108:110] + node _T_92 = eq(_T_90, _T_91) @[el2_lsu_addrcheck.scala 108:84] + node _T_93 = and(UInt<1>("h01"), _T_92) @[el2_lsu_addrcheck.scala 108:33] + node _T_94 = or(_T_88, _T_93) @[el2_lsu_addrcheck.scala 107:134] + node _T_95 = bits(io.end_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 109:50] + node _T_96 = or(_T_95, UInt<32>("h01fffffff")) @[el2_lsu_addrcheck.scala 109:59] + node _T_97 = or(UInt<32>("h0a0000000"), UInt<32>("h01fffffff")) @[el2_lsu_addrcheck.scala 109:110] + node _T_98 = eq(_T_96, _T_97) @[el2_lsu_addrcheck.scala 109:84] + node _T_99 = and(UInt<1>("h01"), _T_98) @[el2_lsu_addrcheck.scala 109:33] + node _T_100 = or(_T_94, _T_99) @[el2_lsu_addrcheck.scala 108:135] + node _T_101 = bits(io.end_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 110:50] + node _T_102 = or(_T_101, UInt<32>("h0fffffff")) @[el2_lsu_addrcheck.scala 110:59] + node _T_103 = or(UInt<32>("h080000000"), UInt<32>("h0fffffff")) @[el2_lsu_addrcheck.scala 110:110] + node _T_104 = eq(_T_102, _T_103) @[el2_lsu_addrcheck.scala 110:84] + node _T_105 = and(UInt<1>("h01"), _T_104) @[el2_lsu_addrcheck.scala 110:33] + node _T_106 = or(_T_100, _T_105) @[el2_lsu_addrcheck.scala 109:135] + node _T_107 = bits(io.end_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 111:50] + node _T_108 = or(_T_107, UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 111:59] + node _T_109 = or(UInt<32>("h00"), UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 111:110] + node _T_110 = eq(_T_108, _T_109) @[el2_lsu_addrcheck.scala 111:84] + node _T_111 = and(UInt<1>("h00"), _T_110) @[el2_lsu_addrcheck.scala 111:33] + node _T_112 = or(_T_106, _T_111) @[el2_lsu_addrcheck.scala 110:135] + node _T_113 = bits(io.end_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 112:50] + node _T_114 = or(_T_113, UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 112:59] + node _T_115 = or(UInt<32>("h00"), UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 112:110] + node _T_116 = eq(_T_114, _T_115) @[el2_lsu_addrcheck.scala 112:84] + node _T_117 = and(UInt<1>("h00"), _T_116) @[el2_lsu_addrcheck.scala 112:33] + node _T_118 = or(_T_112, _T_117) @[el2_lsu_addrcheck.scala 111:135] + node _T_119 = bits(io.end_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 113:50] + node _T_120 = or(_T_119, UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 113:59] + node _T_121 = or(UInt<32>("h00"), UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 113:110] + node _T_122 = eq(_T_120, _T_121) @[el2_lsu_addrcheck.scala 113:84] + node _T_123 = and(UInt<1>("h00"), _T_122) @[el2_lsu_addrcheck.scala 113:33] + node _T_124 = or(_T_118, _T_123) @[el2_lsu_addrcheck.scala 112:135] + node _T_125 = bits(io.end_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 114:50] + node _T_126 = or(_T_125, UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 114:59] + node _T_127 = or(UInt<32>("h00"), UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 114:110] + node _T_128 = eq(_T_126, _T_127) @[el2_lsu_addrcheck.scala 114:84] + node _T_129 = and(UInt<1>("h00"), _T_128) @[el2_lsu_addrcheck.scala 114:33] + node _T_130 = or(_T_124, _T_129) @[el2_lsu_addrcheck.scala 113:135] + node _T_131 = and(_T_83, _T_130) @[el2_lsu_addrcheck.scala 106:7] + node non_dccm_access_ok = or(_T_36, _T_131) @[el2_lsu_addrcheck.scala 97:104] + node regpred_access_fault_d = xor(start_addr_dccm_or_pic, base_reg_dccm_or_pic) @[el2_lsu_addrcheck.scala 116:57] + node _T_132 = bits(io.start_addr_d, 1, 0) @[el2_lsu_addrcheck.scala 117:70] + node _T_133 = neq(_T_132, UInt<2>("h00")) @[el2_lsu_addrcheck.scala 117:76] + node _T_134 = not(io.lsu_pkt_d.word) @[el2_lsu_addrcheck.scala 117:92] + node _T_135 = or(_T_133, _T_134) @[el2_lsu_addrcheck.scala 117:90] + node picm_access_fault_d = and(io.addr_in_pic_d, _T_135) @[el2_lsu_addrcheck.scala 117:51] + wire unmapped_access_fault_d : UInt<1> + unmapped_access_fault_d <= UInt<1>("h01") + wire mpu_access_fault_d : UInt<1> + mpu_access_fault_d <= UInt<1>("h01") + node _T_136 = or(start_addr_in_dccm_d, start_addr_pic_rangecheck.io.in_range) @[el2_lsu_addrcheck.scala 122:87] + node _T_137 = not(_T_136) @[el2_lsu_addrcheck.scala 122:64] + node _T_138 = and(start_addr_in_dccm_region_d, _T_137) @[el2_lsu_addrcheck.scala 122:62] + node _T_139 = or(end_addr_in_dccm_d, end_addr_pic_rangecheck.io.in_range) @[el2_lsu_addrcheck.scala 124:57] + node _T_140 = not(_T_139) @[el2_lsu_addrcheck.scala 124:36] + node _T_141 = and(end_addr_in_dccm_region_d, _T_140) @[el2_lsu_addrcheck.scala 124:34] + node _T_142 = or(_T_138, _T_141) @[el2_lsu_addrcheck.scala 122:112] + node _T_143 = and(start_addr_in_dccm_d, end_addr_pic_rangecheck.io.in_range) @[el2_lsu_addrcheck.scala 126:29] + node _T_144 = or(_T_142, _T_143) @[el2_lsu_addrcheck.scala 124:85] + node _T_145 = and(start_addr_pic_rangecheck.io.in_range, end_addr_in_dccm_d) @[el2_lsu_addrcheck.scala 128:29] + node _T_146 = or(_T_144, _T_145) @[el2_lsu_addrcheck.scala 126:85] + unmapped_access_fault_d <= _T_146 @[el2_lsu_addrcheck.scala 122:29] + node _T_147 = not(start_addr_in_dccm_region_d) @[el2_lsu_addrcheck.scala 130:33] + node _T_148 = not(non_dccm_access_ok) @[el2_lsu_addrcheck.scala 130:64] + node _T_149 = and(_T_147, _T_148) @[el2_lsu_addrcheck.scala 130:62] + mpu_access_fault_d <= _T_149 @[el2_lsu_addrcheck.scala 130:29] + node _T_150 = or(unmapped_access_fault_d, mpu_access_fault_d) @[el2_lsu_addrcheck.scala 142:49] + node _T_151 = or(_T_150, picm_access_fault_d) @[el2_lsu_addrcheck.scala 142:70] + node _T_152 = or(_T_151, regpred_access_fault_d) @[el2_lsu_addrcheck.scala 142:92] + node _T_153 = and(_T_152, io.lsu_pkt_d.valid) @[el2_lsu_addrcheck.scala 142:118] + node _T_154 = not(io.lsu_pkt_d.dma) @[el2_lsu_addrcheck.scala 142:141] + node _T_155 = and(_T_153, _T_154) @[el2_lsu_addrcheck.scala 142:139] + io.access_fault_d <= _T_155 @[el2_lsu_addrcheck.scala 142:21] + node _T_156 = bits(unmapped_access_fault_d, 0, 0) @[el2_lsu_addrcheck.scala 143:60] + node _T_157 = bits(mpu_access_fault_d, 0, 0) @[el2_lsu_addrcheck.scala 143:100] + node _T_158 = bits(regpred_access_fault_d, 0, 0) @[el2_lsu_addrcheck.scala 143:144] + node _T_159 = bits(picm_access_fault_d, 0, 0) @[el2_lsu_addrcheck.scala 143:185] + node _T_160 = mux(_T_159, UInt<4>("h06"), UInt<4>("h00")) @[el2_lsu_addrcheck.scala 143:164] + node _T_161 = mux(_T_158, UInt<4>("h05"), _T_160) @[el2_lsu_addrcheck.scala 143:120] + node _T_162 = mux(_T_157, UInt<4>("h03"), _T_161) @[el2_lsu_addrcheck.scala 143:80] + node access_fault_mscause_d = mux(_T_156, UInt<4>("h02"), _T_162) @[el2_lsu_addrcheck.scala 143:35] + node _T_163 = bits(io.start_addr_d, 31, 28) @[el2_lsu_addrcheck.scala 144:53] + node _T_164 = bits(io.end_addr_d, 31, 28) @[el2_lsu_addrcheck.scala 144:78] + node regcross_misaligned_fault_d = neq(_T_163, _T_164) @[el2_lsu_addrcheck.scala 144:61] + node _T_165 = not(is_aligned_d) @[el2_lsu_addrcheck.scala 145:59] + node sideeffect_misaligned_fault_d = and(is_sideeffects_d, _T_165) @[el2_lsu_addrcheck.scala 145:57] + node _T_166 = and(sideeffect_misaligned_fault_d, io.addr_external_d) @[el2_lsu_addrcheck.scala 146:90] + node _T_167 = or(regcross_misaligned_fault_d, _T_166) @[el2_lsu_addrcheck.scala 146:57] + node _T_168 = and(_T_167, io.lsu_pkt_d.valid) @[el2_lsu_addrcheck.scala 146:113] + node _T_169 = not(io.lsu_pkt_d.dma) @[el2_lsu_addrcheck.scala 146:136] + node _T_170 = and(_T_168, _T_169) @[el2_lsu_addrcheck.scala 146:134] + io.misaligned_fault_d <= _T_170 @[el2_lsu_addrcheck.scala 146:25] + node _T_171 = bits(sideeffect_misaligned_fault_d, 0, 0) @[el2_lsu_addrcheck.scala 147:111] + node _T_172 = mux(_T_171, UInt<4>("h01"), UInt<4>("h00")) @[el2_lsu_addrcheck.scala 147:80] + node misaligned_fault_mscause_d = mux(regcross_misaligned_fault_d, UInt<4>("h02"), _T_172) @[el2_lsu_addrcheck.scala 147:39] + node _T_173 = bits(io.misaligned_fault_d, 0, 0) @[el2_lsu_addrcheck.scala 148:50] + node _T_174 = bits(misaligned_fault_mscause_d, 3, 0) @[el2_lsu_addrcheck.scala 148:84] + node _T_175 = bits(access_fault_mscause_d, 3, 0) @[el2_lsu_addrcheck.scala 148:113] + node _T_176 = mux(_T_173, _T_174, _T_175) @[el2_lsu_addrcheck.scala 148:27] + io.exc_mscause_d <= _T_176 @[el2_lsu_addrcheck.scala 148:21] + node _T_177 = not(start_addr_in_dccm_d) @[el2_lsu_addrcheck.scala 149:66] + node _T_178 = and(start_addr_in_dccm_region_d, _T_177) @[el2_lsu_addrcheck.scala 149:64] + node _T_179 = not(end_addr_in_dccm_d) @[el2_lsu_addrcheck.scala 149:120] + node _T_180 = and(end_addr_in_dccm_region_d, _T_179) @[el2_lsu_addrcheck.scala 149:118] + node _T_181 = or(_T_178, _T_180) @[el2_lsu_addrcheck.scala 149:88] + node _T_182 = and(_T_181, io.lsu_pkt_d.valid) @[el2_lsu_addrcheck.scala 149:142] + node _T_183 = and(_T_182, io.lsu_pkt_d.fast_int) @[el2_lsu_addrcheck.scala 149:163] + io.fir_dccm_access_error_d <= _T_183 @[el2_lsu_addrcheck.scala 149:31] + node _T_184 = and(start_addr_in_dccm_region_d, end_addr_in_dccm_region_d) @[el2_lsu_addrcheck.scala 150:66] + node _T_185 = not(_T_184) @[el2_lsu_addrcheck.scala 150:36] + node _T_186 = and(_T_185, io.lsu_pkt_d.valid) @[el2_lsu_addrcheck.scala 150:95] + node _T_187 = and(_T_186, io.lsu_pkt_d.fast_int) @[el2_lsu_addrcheck.scala 150:116] + io.fir_nondccm_access_error_d <= _T_187 @[el2_lsu_addrcheck.scala 150:33] + reg _T_188 : UInt, io.lsu_c2_m_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_addrcheck.scala 152:60] + _T_188 <= is_sideeffects_d @[el2_lsu_addrcheck.scala 152:60] + io.is_sideeffects_m <= _T_188 @[el2_lsu_addrcheck.scala 152:50] + diff --git a/el2_lsu_addrcheck.v b/el2_lsu_addrcheck.v new file mode 100644 index 00000000..7a3fcb0f --- /dev/null +++ b/el2_lsu_addrcheck.v @@ -0,0 +1,243 @@ +module rvrangecheck( + input [31:0] io_addr, + output io_in_range, + output io_in_region +); + assign io_in_range = io_addr[31:16] == 16'hf004; // @[beh_lib.scala 117:19] + assign io_in_region = io_addr[31:28] == 4'hf; // @[beh_lib.scala 113:19] +endmodule +module rvrangecheck_2( + input [31:0] io_addr, + output io_in_range, + output io_in_region +); + assign io_in_range = io_addr[31:15] == 17'h1e018; // @[beh_lib.scala 117:19] + assign io_in_region = io_addr[31:28] == 4'hf; // @[beh_lib.scala 113:19] +endmodule +module el2_lsu_addrcheck( + input clock, + input reset, + input io_lsu_c2_m_clk, + input [31:0] io_start_addr_d, + input [31:0] io_end_addr_d, + input io_lsu_pkt_d_fast_int, + input io_lsu_pkt_d_by, + input io_lsu_pkt_d_half, + input io_lsu_pkt_d_word, + input io_lsu_pkt_d_dword, + input io_lsu_pkt_d_load, + input io_lsu_pkt_d_store, + input io_lsu_pkt_d_unsign, + input io_lsu_pkt_d_dma, + input io_lsu_pkt_d_store_data_bypass_d, + input io_lsu_pkt_d_load_ldst_bypass_d, + input io_lsu_pkt_d_store_data_bypass_m, + input io_lsu_pkt_d_valid, + input [31:0] io_dec_tlu_mrac_ff, + input [3:0] io_rs1_region_d, + input [31:0] io_rs1_d, + output io_is_sideeffects_m, + output io_addr_in_dccm_d, + output io_addr_in_pic_d, + output io_addr_external_d, + output io_access_fault_d, + output io_misaligned_fault_d, + output [3:0] io_exc_mscause_d, + output io_fir_dccm_access_error_d, + output io_fir_nondccm_access_error_d, + input io_scan_mode +); +`ifdef RANDOMIZE_REG_INIT + reg [31:0] _RAND_0; +`endif // RANDOMIZE_REG_INIT + wire [31:0] rvrangecheck_io_addr; // @[el2_lsu_addrcheck.scala 45:44] + wire rvrangecheck_io_in_range; // @[el2_lsu_addrcheck.scala 45:44] + wire rvrangecheck_io_in_region; // @[el2_lsu_addrcheck.scala 45:44] + wire [31:0] rvrangecheck_1_io_addr; // @[el2_lsu_addrcheck.scala 51:44] + wire rvrangecheck_1_io_in_range; // @[el2_lsu_addrcheck.scala 51:44] + wire rvrangecheck_1_io_in_region; // @[el2_lsu_addrcheck.scala 51:44] + wire [31:0] start_addr_pic_rangecheck_io_addr; // @[el2_lsu_addrcheck.scala 74:41] + wire start_addr_pic_rangecheck_io_in_range; // @[el2_lsu_addrcheck.scala 74:41] + wire start_addr_pic_rangecheck_io_in_region; // @[el2_lsu_addrcheck.scala 74:41] + wire [31:0] end_addr_pic_rangecheck_io_addr; // @[el2_lsu_addrcheck.scala 80:39] + wire end_addr_pic_rangecheck_io_in_range; // @[el2_lsu_addrcheck.scala 80:39] + wire end_addr_pic_rangecheck_io_in_region; // @[el2_lsu_addrcheck.scala 80:39] + wire addr_in_iccm = io_start_addr_d[31:28] == 4'he; // @[el2_lsu_addrcheck.scala 65:45] + wire start_addr_in_dccm_region_d = rvrangecheck_io_in_region; // @[el2_lsu_addrcheck.scala 48:41] + wire start_addr_dccm_or_pic = start_addr_in_dccm_region_d | start_addr_pic_rangecheck_io_in_region; // @[el2_lsu_addrcheck.scala 85:60] + wire _T_5 = io_rs1_region_d == 4'hf; // @[el2_lsu_addrcheck.scala 86:54] + wire base_reg_dccm_or_pic = _T_5 | _T_5; // @[el2_lsu_addrcheck.scala 86:74] + wire start_addr_in_dccm_d = rvrangecheck_io_in_range; // @[el2_lsu_addrcheck.scala 47:41] + wire end_addr_in_dccm_d = rvrangecheck_1_io_in_range; // @[el2_lsu_addrcheck.scala 53:41] + wire [4:0] csr_idx = {io_start_addr_d[31:28],1'h1}; // @[Cat.scala 29:58] + wire [31:0] _T_13 = io_dec_tlu_mrac_ff >> csr_idx; // @[el2_lsu_addrcheck.scala 92:50] + wire _T_16 = start_addr_dccm_or_pic | addr_in_iccm; // @[el2_lsu_addrcheck.scala 92:121] + wire _T_17 = ~_T_16; // @[el2_lsu_addrcheck.scala 92:62] + wire _T_18 = _T_13[0] & _T_17; // @[el2_lsu_addrcheck.scala 92:60] + wire _T_19 = _T_18 & io_lsu_pkt_d_valid; // @[el2_lsu_addrcheck.scala 92:137] + wire _T_20 = io_lsu_pkt_d_store | io_lsu_pkt_d_load; // @[el2_lsu_addrcheck.scala 92:180] + wire is_sideeffects_d = _T_19 & _T_20; // @[el2_lsu_addrcheck.scala 92:158] + wire _T_22 = io_start_addr_d[1:0] == 2'h0; // @[el2_lsu_addrcheck.scala 93:75] + wire _T_23 = io_lsu_pkt_d_word & _T_22; // @[el2_lsu_addrcheck.scala 93:51] + wire _T_25 = ~io_start_addr_d[0]; // @[el2_lsu_addrcheck.scala 93:128] + wire _T_26 = io_lsu_pkt_d_half & _T_25; // @[el2_lsu_addrcheck.scala 93:106] + wire _T_27 = _T_23 | _T_26; // @[el2_lsu_addrcheck.scala 93:85] + wire is_aligned_d = _T_27 | io_lsu_pkt_d_by; // @[el2_lsu_addrcheck.scala 93:138] + wire [31:0] _T_38 = io_start_addr_d | 32'h7fffffff; // @[el2_lsu_addrcheck.scala 98:57] + wire _T_40 = _T_38 == 32'h7fffffff; // @[el2_lsu_addrcheck.scala 98:82] + wire [31:0] _T_43 = io_start_addr_d | 32'h3fffffff; // @[el2_lsu_addrcheck.scala 99:57] + wire _T_45 = _T_43 == 32'hffffffff; // @[el2_lsu_addrcheck.scala 99:82] + wire _T_47 = _T_40 | _T_45; // @[el2_lsu_addrcheck.scala 98:133] + wire [31:0] _T_49 = io_start_addr_d | 32'h1fffffff; // @[el2_lsu_addrcheck.scala 100:57] + wire _T_51 = _T_49 == 32'hbfffffff; // @[el2_lsu_addrcheck.scala 100:82] + wire _T_53 = _T_47 | _T_51; // @[el2_lsu_addrcheck.scala 99:133] + wire [31:0] _T_55 = io_start_addr_d | 32'hfffffff; // @[el2_lsu_addrcheck.scala 101:57] + wire _T_57 = _T_55 == 32'h8fffffff; // @[el2_lsu_addrcheck.scala 101:82] + wire _T_59 = _T_53 | _T_57; // @[el2_lsu_addrcheck.scala 100:133] + wire [31:0] _T_85 = io_end_addr_d | 32'h7fffffff; // @[el2_lsu_addrcheck.scala 107:58] + wire _T_87 = _T_85 == 32'h7fffffff; // @[el2_lsu_addrcheck.scala 107:83] + wire [31:0] _T_90 = io_end_addr_d | 32'h3fffffff; // @[el2_lsu_addrcheck.scala 108:59] + wire _T_92 = _T_90 == 32'hffffffff; // @[el2_lsu_addrcheck.scala 108:84] + wire _T_94 = _T_87 | _T_92; // @[el2_lsu_addrcheck.scala 107:134] + wire [31:0] _T_96 = io_end_addr_d | 32'h1fffffff; // @[el2_lsu_addrcheck.scala 109:59] + wire _T_98 = _T_96 == 32'hbfffffff; // @[el2_lsu_addrcheck.scala 109:84] + wire _T_100 = _T_94 | _T_98; // @[el2_lsu_addrcheck.scala 108:135] + wire [31:0] _T_102 = io_end_addr_d | 32'hfffffff; // @[el2_lsu_addrcheck.scala 110:59] + wire _T_104 = _T_102 == 32'h8fffffff; // @[el2_lsu_addrcheck.scala 110:84] + wire _T_106 = _T_100 | _T_104; // @[el2_lsu_addrcheck.scala 109:135] + wire non_dccm_access_ok = _T_59 & _T_106; // @[el2_lsu_addrcheck.scala 106:7] + wire regpred_access_fault_d = start_addr_dccm_or_pic ^ base_reg_dccm_or_pic; // @[el2_lsu_addrcheck.scala 116:57] + wire _T_133 = io_start_addr_d[1:0] != 2'h0; // @[el2_lsu_addrcheck.scala 117:76] + wire _T_134 = ~io_lsu_pkt_d_word; // @[el2_lsu_addrcheck.scala 117:92] + wire _T_135 = _T_133 | _T_134; // @[el2_lsu_addrcheck.scala 117:90] + wire picm_access_fault_d = io_addr_in_pic_d & _T_135; // @[el2_lsu_addrcheck.scala 117:51] + wire _T_136 = start_addr_in_dccm_d | start_addr_pic_rangecheck_io_in_range; // @[el2_lsu_addrcheck.scala 122:87] + wire _T_137 = ~_T_136; // @[el2_lsu_addrcheck.scala 122:64] + wire _T_138 = start_addr_in_dccm_region_d & _T_137; // @[el2_lsu_addrcheck.scala 122:62] + wire _T_139 = end_addr_in_dccm_d | end_addr_pic_rangecheck_io_in_range; // @[el2_lsu_addrcheck.scala 124:57] + wire _T_140 = ~_T_139; // @[el2_lsu_addrcheck.scala 124:36] + wire end_addr_in_dccm_region_d = rvrangecheck_1_io_in_region; // @[el2_lsu_addrcheck.scala 54:41] + wire _T_141 = end_addr_in_dccm_region_d & _T_140; // @[el2_lsu_addrcheck.scala 124:34] + wire _T_142 = _T_138 | _T_141; // @[el2_lsu_addrcheck.scala 122:112] + wire _T_143 = start_addr_in_dccm_d & end_addr_pic_rangecheck_io_in_range; // @[el2_lsu_addrcheck.scala 126:29] + wire _T_144 = _T_142 | _T_143; // @[el2_lsu_addrcheck.scala 124:85] + wire _T_145 = start_addr_pic_rangecheck_io_in_range & end_addr_in_dccm_d; // @[el2_lsu_addrcheck.scala 128:29] + wire unmapped_access_fault_d = _T_144 | _T_145; // @[el2_lsu_addrcheck.scala 126:85] + wire _T_147 = ~start_addr_in_dccm_region_d; // @[el2_lsu_addrcheck.scala 130:33] + wire _T_148 = ~non_dccm_access_ok; // @[el2_lsu_addrcheck.scala 130:64] + wire mpu_access_fault_d = _T_147 & _T_148; // @[el2_lsu_addrcheck.scala 130:62] + wire _T_150 = unmapped_access_fault_d | mpu_access_fault_d; // @[el2_lsu_addrcheck.scala 142:49] + wire _T_151 = _T_150 | picm_access_fault_d; // @[el2_lsu_addrcheck.scala 142:70] + wire _T_152 = _T_151 | regpred_access_fault_d; // @[el2_lsu_addrcheck.scala 142:92] + wire _T_153 = _T_152 & io_lsu_pkt_d_valid; // @[el2_lsu_addrcheck.scala 142:118] + wire _T_154 = ~io_lsu_pkt_d_dma; // @[el2_lsu_addrcheck.scala 142:141] + wire [3:0] _T_160 = picm_access_fault_d ? 4'h6 : 4'h0; // @[el2_lsu_addrcheck.scala 143:164] + wire [3:0] _T_161 = regpred_access_fault_d ? 4'h5 : _T_160; // @[el2_lsu_addrcheck.scala 143:120] + wire [3:0] _T_162 = mpu_access_fault_d ? 4'h3 : _T_161; // @[el2_lsu_addrcheck.scala 143:80] + wire [3:0] access_fault_mscause_d = unmapped_access_fault_d ? 4'h2 : _T_162; // @[el2_lsu_addrcheck.scala 143:35] + wire regcross_misaligned_fault_d = io_start_addr_d[31:28] != io_end_addr_d[31:28]; // @[el2_lsu_addrcheck.scala 144:61] + wire _T_165 = ~is_aligned_d; // @[el2_lsu_addrcheck.scala 145:59] + wire sideeffect_misaligned_fault_d = is_sideeffects_d & _T_165; // @[el2_lsu_addrcheck.scala 145:57] + wire _T_166 = sideeffect_misaligned_fault_d & io_addr_external_d; // @[el2_lsu_addrcheck.scala 146:90] + wire _T_167 = regcross_misaligned_fault_d | _T_166; // @[el2_lsu_addrcheck.scala 146:57] + wire _T_168 = _T_167 & io_lsu_pkt_d_valid; // @[el2_lsu_addrcheck.scala 146:113] + wire [3:0] _T_172 = sideeffect_misaligned_fault_d ? 4'h1 : 4'h0; // @[el2_lsu_addrcheck.scala 147:80] + wire [3:0] misaligned_fault_mscause_d = regcross_misaligned_fault_d ? 4'h2 : _T_172; // @[el2_lsu_addrcheck.scala 147:39] + wire _T_177 = ~start_addr_in_dccm_d; // @[el2_lsu_addrcheck.scala 149:66] + wire _T_178 = start_addr_in_dccm_region_d & _T_177; // @[el2_lsu_addrcheck.scala 149:64] + wire _T_179 = ~end_addr_in_dccm_d; // @[el2_lsu_addrcheck.scala 149:120] + wire _T_180 = end_addr_in_dccm_region_d & _T_179; // @[el2_lsu_addrcheck.scala 149:118] + wire _T_181 = _T_178 | _T_180; // @[el2_lsu_addrcheck.scala 149:88] + wire _T_182 = _T_181 & io_lsu_pkt_d_valid; // @[el2_lsu_addrcheck.scala 149:142] + wire _T_184 = start_addr_in_dccm_region_d & end_addr_in_dccm_region_d; // @[el2_lsu_addrcheck.scala 150:66] + wire _T_185 = ~_T_184; // @[el2_lsu_addrcheck.scala 150:36] + wire _T_186 = _T_185 & io_lsu_pkt_d_valid; // @[el2_lsu_addrcheck.scala 150:95] + reg _T_188; // @[el2_lsu_addrcheck.scala 152:60] + rvrangecheck rvrangecheck ( // @[el2_lsu_addrcheck.scala 45:44] + .io_addr(rvrangecheck_io_addr), + .io_in_range(rvrangecheck_io_in_range), + .io_in_region(rvrangecheck_io_in_region) + ); + rvrangecheck rvrangecheck_1 ( // @[el2_lsu_addrcheck.scala 51:44] + .io_addr(rvrangecheck_1_io_addr), + .io_in_range(rvrangecheck_1_io_in_range), + .io_in_region(rvrangecheck_1_io_in_region) + ); + rvrangecheck_2 start_addr_pic_rangecheck ( // @[el2_lsu_addrcheck.scala 74:41] + .io_addr(start_addr_pic_rangecheck_io_addr), + .io_in_range(start_addr_pic_rangecheck_io_in_range), + .io_in_region(start_addr_pic_rangecheck_io_in_region) + ); + rvrangecheck_2 end_addr_pic_rangecheck ( // @[el2_lsu_addrcheck.scala 80:39] + .io_addr(end_addr_pic_rangecheck_io_addr), + .io_in_range(end_addr_pic_rangecheck_io_in_range), + .io_in_region(end_addr_pic_rangecheck_io_in_region) + ); + assign io_is_sideeffects_m = _T_188; // @[el2_lsu_addrcheck.scala 152:50] + assign io_addr_in_dccm_d = start_addr_in_dccm_d & end_addr_in_dccm_d; // @[el2_lsu_addrcheck.scala 87:32] + assign io_addr_in_pic_d = start_addr_pic_rangecheck_io_in_range & end_addr_pic_rangecheck_io_in_range; // @[el2_lsu_addrcheck.scala 88:32] + assign io_addr_external_d = ~start_addr_dccm_or_pic; // @[el2_lsu_addrcheck.scala 90:30] + assign io_access_fault_d = _T_153 & _T_154; // @[el2_lsu_addrcheck.scala 142:21] + assign io_misaligned_fault_d = _T_168 & _T_154; // @[el2_lsu_addrcheck.scala 146:25] + assign io_exc_mscause_d = io_misaligned_fault_d ? misaligned_fault_mscause_d : access_fault_mscause_d; // @[el2_lsu_addrcheck.scala 148:21] + assign io_fir_dccm_access_error_d = _T_182 & io_lsu_pkt_d_fast_int; // @[el2_lsu_addrcheck.scala 149:31] + assign io_fir_nondccm_access_error_d = _T_186 & io_lsu_pkt_d_fast_int; // @[el2_lsu_addrcheck.scala 150:33] + assign rvrangecheck_io_addr = io_start_addr_d; // @[el2_lsu_addrcheck.scala 46:41] + assign rvrangecheck_1_io_addr = io_end_addr_d; // @[el2_lsu_addrcheck.scala 52:41] + assign start_addr_pic_rangecheck_io_addr = io_start_addr_d; // @[el2_lsu_addrcheck.scala 75:37] + assign end_addr_pic_rangecheck_io_addr = io_end_addr_d; // @[el2_lsu_addrcheck.scala 81:35] +`ifdef RANDOMIZE_GARBAGE_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_INVALID_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_REG_INIT +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_MEM_INIT +`define RANDOMIZE +`endif +`ifndef RANDOM +`define RANDOM $random +`endif +`ifdef RANDOMIZE_MEM_INIT + integer initvar; +`endif +`ifndef SYNTHESIS +`ifdef FIRRTL_BEFORE_INITIAL +`FIRRTL_BEFORE_INITIAL +`endif +initial begin + `ifdef RANDOMIZE + `ifdef INIT_RANDOM + `INIT_RANDOM + `endif + `ifndef VERILATOR + `ifdef RANDOMIZE_DELAY + #`RANDOMIZE_DELAY begin end + `else + #0.002 begin end + `endif + `endif +`ifdef RANDOMIZE_REG_INIT + _RAND_0 = {1{`RANDOM}}; + _T_188 = _RAND_0[0:0]; +`endif // RANDOMIZE_REG_INIT + if (reset) begin + _T_188 = 1'h0; + end + `endif // RANDOMIZE +end // initial +`ifdef FIRRTL_AFTER_INITIAL +`FIRRTL_AFTER_INITIAL +`endif +`endif // SYNTHESIS + always @(posedge io_lsu_c2_m_clk or posedge reset) begin + if (reset) begin + _T_188 <= 1'h0; + end else begin + _T_188 <= _T_19 & _T_20; + end + end +endmodule diff --git a/el2_lsu_clkdomain.anno.json b/el2_lsu_clkdomain.anno.json new file mode 100644 index 00000000..7a2b0823 --- /dev/null +++ b/el2_lsu_clkdomain.anno.json @@ -0,0 +1,23 @@ +[ + { + "class":"firrtl.EmitCircuitAnnotation", + "emitter":"firrtl.VerilogEmitter" + }, + { + "class":"firrtl.transforms.BlackBoxResourceAnno", + "target":"el2_lsu_clkdomain.TEC_RV_ICG", + "resourceId":"/vsrc/TEC_RV_ICG.v" + }, + { + "class":"firrtl.options.TargetDirAnnotation", + "directory":"." + }, + { + "class":"firrtl.options.OutputAnnotationFileAnnotation", + "file":"el2_lsu_clkdomain" + }, + { + "class":"firrtl.transforms.BlackBoxTargetDirAnno", + "targetDir":"." + } +] \ No newline at end of file diff --git a/el2_lsu_clkdomain.fir b/el2_lsu_clkdomain.fir new file mode 100644 index 00000000..c3143b4c --- /dev/null +++ b/el2_lsu_clkdomain.fir @@ -0,0 +1,430 @@ +;buildInfoPackage: chisel3, version: 3.3.1, scalaVersion: 2.12.11, sbtVersion: 1.3.10 +circuit el2_lsu_clkdomain : + extmodule TEC_RV_ICG : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG @[beh_lib.scala 330:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[beh_lib.scala 331:14] + clkhdr.CK <= io.clk @[beh_lib.scala 332:18] + clkhdr.EN <= io.en @[beh_lib.scala 333:18] + clkhdr.SE <= io.scan_mode @[beh_lib.scala 334:18] + + extmodule TEC_RV_ICG_1 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_1 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_1 @[beh_lib.scala 330:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[beh_lib.scala 331:14] + clkhdr.CK <= io.clk @[beh_lib.scala 332:18] + clkhdr.EN <= io.en @[beh_lib.scala 333:18] + clkhdr.SE <= io.scan_mode @[beh_lib.scala 334:18] + + extmodule TEC_RV_ICG_2 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_2 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_2 @[beh_lib.scala 330:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[beh_lib.scala 331:14] + clkhdr.CK <= io.clk @[beh_lib.scala 332:18] + clkhdr.EN <= io.en @[beh_lib.scala 333:18] + clkhdr.SE <= io.scan_mode @[beh_lib.scala 334:18] + + extmodule TEC_RV_ICG_3 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_3 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_3 @[beh_lib.scala 330:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[beh_lib.scala 331:14] + clkhdr.CK <= io.clk @[beh_lib.scala 332:18] + clkhdr.EN <= io.en @[beh_lib.scala 333:18] + clkhdr.SE <= io.scan_mode @[beh_lib.scala 334:18] + + extmodule TEC_RV_ICG_4 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_4 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_4 @[beh_lib.scala 330:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[beh_lib.scala 331:14] + clkhdr.CK <= io.clk @[beh_lib.scala 332:18] + clkhdr.EN <= io.en @[beh_lib.scala 333:18] + clkhdr.SE <= io.scan_mode @[beh_lib.scala 334:18] + + extmodule TEC_RV_ICG_5 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_5 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_5 @[beh_lib.scala 330:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[beh_lib.scala 331:14] + clkhdr.CK <= io.clk @[beh_lib.scala 332:18] + clkhdr.EN <= io.en @[beh_lib.scala 333:18] + clkhdr.SE <= io.scan_mode @[beh_lib.scala 334:18] + + extmodule TEC_RV_ICG_6 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_6 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_6 @[beh_lib.scala 330:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[beh_lib.scala 331:14] + clkhdr.CK <= io.clk @[beh_lib.scala 332:18] + clkhdr.EN <= io.en @[beh_lib.scala 333:18] + clkhdr.SE <= io.scan_mode @[beh_lib.scala 334:18] + + extmodule TEC_RV_ICG_7 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_7 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_7 @[beh_lib.scala 330:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[beh_lib.scala 331:14] + clkhdr.CK <= io.clk @[beh_lib.scala 332:18] + clkhdr.EN <= io.en @[beh_lib.scala 333:18] + clkhdr.SE <= io.scan_mode @[beh_lib.scala 334:18] + + extmodule TEC_RV_ICG_8 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_8 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_8 @[beh_lib.scala 330:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[beh_lib.scala 331:14] + clkhdr.CK <= io.clk @[beh_lib.scala 332:18] + clkhdr.EN <= io.en @[beh_lib.scala 333:18] + clkhdr.SE <= io.scan_mode @[beh_lib.scala 334:18] + + extmodule TEC_RV_ICG_9 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_9 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_9 @[beh_lib.scala 330:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[beh_lib.scala 331:14] + clkhdr.CK <= io.clk @[beh_lib.scala 332:18] + clkhdr.EN <= io.en @[beh_lib.scala 333:18] + clkhdr.SE <= io.scan_mode @[beh_lib.scala 334:18] + + extmodule TEC_RV_ICG_10 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_10 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_10 @[beh_lib.scala 330:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[beh_lib.scala 331:14] + clkhdr.CK <= io.clk @[beh_lib.scala 332:18] + clkhdr.EN <= io.en @[beh_lib.scala 333:18] + clkhdr.SE <= io.scan_mode @[beh_lib.scala 334:18] + + extmodule TEC_RV_ICG_11 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_11 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_11 @[beh_lib.scala 330:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[beh_lib.scala 331:14] + clkhdr.CK <= io.clk @[beh_lib.scala 332:18] + clkhdr.EN <= io.en @[beh_lib.scala 333:18] + clkhdr.SE <= io.scan_mode @[beh_lib.scala 334:18] + + module el2_lsu_clkdomain : + input clock : Clock + input reset : UInt<1> + output io : {flip free_clk : Clock, flip clk_override : UInt<1>, flip addr_in_dccm_m : UInt<1>, flip dma_dccm_req : UInt<1>, flip ldst_stbuf_reqvld_r : UInt<1>, flip stbuf_reqvld_any : UInt<1>, flip stbuf_reqvld_flushed_any : UInt<1>, flip lsu_busreq_r : UInt<1>, flip lsu_bus_buffer_pend_any : UInt<1>, flip lsu_bus_buffer_empty_any : UInt<1>, flip lsu_stbuf_empty_any : UInt<1>, flip lsu_bus_clk_en : UInt<1>, flip lsu_p : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip lsu_pkt_d : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip lsu_pkt_m : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip lsu_pkt_r : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, lsu_c1_m_clk : Clock, lsu_c1_r_clk : Clock, lsu_c2_m_clk : Clock, lsu_c2_r_clk : Clock, lsu_store_c1_m_clk : Clock, lsu_store_c1_r_clk : Clock, lsu_stbuf_c1_clk : Clock, lsu_bus_obuf_c1_clk : Clock, lsu_bus_ibuf_c1_clk : Clock, lsu_bus_buf_c1_clk : Clock, lsu_busm_clk : Clock, lsu_free_c2_clk : Clock, flip scan_mode : UInt<1>} + + wire lsu_c1_d_clken_q : UInt<1> @[el2_lsu_clkdomain.scala 60:36] + wire lsu_c1_m_clken_q : UInt<1> @[el2_lsu_clkdomain.scala 61:36] + wire lsu_c1_r_clken_q : UInt<1> @[el2_lsu_clkdomain.scala 62:36] + wire lsu_free_c1_clken_q : UInt<1> @[el2_lsu_clkdomain.scala 63:36] + node _T = or(io.lsu_p.valid, io.dma_dccm_req) @[el2_lsu_clkdomain.scala 64:51] + node lsu_c1_d_clken = or(_T, io.clk_override) @[el2_lsu_clkdomain.scala 64:70] + node _T_1 = or(io.lsu_pkt_d.valid, lsu_c1_d_clken_q) @[el2_lsu_clkdomain.scala 65:51] + node lsu_c1_m_clken = or(_T_1, io.clk_override) @[el2_lsu_clkdomain.scala 65:70] + node _T_2 = or(io.lsu_pkt_m.valid, lsu_c1_m_clken_q) @[el2_lsu_clkdomain.scala 66:51] + node lsu_c1_r_clken = or(_T_2, io.clk_override) @[el2_lsu_clkdomain.scala 66:70] + node _T_3 = or(lsu_c1_m_clken, lsu_c1_m_clken_q) @[el2_lsu_clkdomain.scala 68:47] + node lsu_c2_m_clken = or(_T_3, io.clk_override) @[el2_lsu_clkdomain.scala 68:66] + node _T_4 = or(lsu_c1_r_clken, lsu_c1_r_clken_q) @[el2_lsu_clkdomain.scala 69:47] + node lsu_c2_r_clken = or(_T_4, io.clk_override) @[el2_lsu_clkdomain.scala 69:66] + node _T_5 = and(lsu_c1_m_clken, io.lsu_pkt_d.store) @[el2_lsu_clkdomain.scala 71:49] + node lsu_store_c1_m_clken = or(_T_5, io.clk_override) @[el2_lsu_clkdomain.scala 71:71] + node _T_6 = and(lsu_c1_r_clken, io.lsu_pkt_m.store) @[el2_lsu_clkdomain.scala 72:49] + node lsu_store_c1_r_clken = or(_T_6, io.clk_override) @[el2_lsu_clkdomain.scala 72:71] + node _T_7 = or(io.ldst_stbuf_reqvld_r, io.stbuf_reqvld_any) @[el2_lsu_clkdomain.scala 73:55] + node _T_8 = or(_T_7, io.stbuf_reqvld_flushed_any) @[el2_lsu_clkdomain.scala 73:77] + node lsu_stbuf_c1_clken = or(_T_8, io.clk_override) @[el2_lsu_clkdomain.scala 73:107] + node lsu_bus_ibuf_c1_clken = or(io.lsu_busreq_r, io.clk_override) @[el2_lsu_clkdomain.scala 74:49] + node _T_9 = or(io.lsu_bus_buffer_pend_any, io.lsu_busreq_r) @[el2_lsu_clkdomain.scala 75:61] + node _T_10 = or(_T_9, io.clk_override) @[el2_lsu_clkdomain.scala 75:79] + node lsu_bus_obuf_c1_clken = and(_T_10, io.lsu_bus_clk_en) @[el2_lsu_clkdomain.scala 75:98] + node _T_11 = eq(io.lsu_bus_buffer_empty_any, UInt<1>("h00")) @[el2_lsu_clkdomain.scala 76:32] + node _T_12 = or(_T_11, io.lsu_busreq_r) @[el2_lsu_clkdomain.scala 76:61] + node lsu_bus_buf_c1_clken = or(_T_12, io.clk_override) @[el2_lsu_clkdomain.scala 76:79] + node _T_13 = or(io.lsu_p.valid, io.lsu_pkt_d.valid) @[el2_lsu_clkdomain.scala 78:48] + node _T_14 = or(_T_13, io.lsu_pkt_m.valid) @[el2_lsu_clkdomain.scala 78:69] + node _T_15 = or(_T_14, io.lsu_pkt_r.valid) @[el2_lsu_clkdomain.scala 78:90] + node _T_16 = eq(io.lsu_bus_buffer_empty_any, UInt<1>("h00")) @[el2_lsu_clkdomain.scala 78:114] + node _T_17 = or(_T_15, _T_16) @[el2_lsu_clkdomain.scala 78:112] + node _T_18 = eq(io.lsu_stbuf_empty_any, UInt<1>("h00")) @[el2_lsu_clkdomain.scala 78:145] + node _T_19 = or(_T_17, _T_18) @[el2_lsu_clkdomain.scala 78:143] + node lsu_free_c1_clken = or(_T_19, io.clk_override) @[el2_lsu_clkdomain.scala 78:169] + node _T_20 = or(lsu_free_c1_clken, lsu_free_c1_clken_q) @[el2_lsu_clkdomain.scala 79:50] + node lsu_free_c2_clken = or(_T_20, io.clk_override) @[el2_lsu_clkdomain.scala 79:72] + reg _T_21 : UInt, io.free_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_clkdomain.scala 82:60] + _T_21 <= lsu_free_c1_clken @[el2_lsu_clkdomain.scala 82:60] + lsu_free_c1_clken_q <= _T_21 @[el2_lsu_clkdomain.scala 82:26] + reg _T_22 : UInt, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_clkdomain.scala 84:67] + _T_22 <= lsu_c1_d_clken @[el2_lsu_clkdomain.scala 84:67] + lsu_c1_d_clken_q <= _T_22 @[el2_lsu_clkdomain.scala 84:26] + reg _T_23 : UInt, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_clkdomain.scala 85:67] + _T_23 <= lsu_c1_m_clken @[el2_lsu_clkdomain.scala 85:67] + lsu_c1_m_clken_q <= _T_23 @[el2_lsu_clkdomain.scala 85:26] + reg _T_24 : UInt, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_clkdomain.scala 86:67] + _T_24 <= lsu_c1_r_clken @[el2_lsu_clkdomain.scala 86:67] + lsu_c1_r_clken_q <= _T_24 @[el2_lsu_clkdomain.scala 86:26] + inst lsu_c1m_cgc of rvclkhdr @[el2_lsu_clkdomain.scala 88:35] + lsu_c1m_cgc.clock <= clock + lsu_c1m_cgc.reset <= reset + lsu_c1m_cgc.io.en <= lsu_c1_m_clken @[el2_lsu_clkdomain.scala 88:77] + io.lsu_c1_m_clk <= lsu_c1m_cgc.io.l1clk @[el2_lsu_clkdomain.scala 88:127] + inst lsu_c1r_cgc of rvclkhdr_1 @[el2_lsu_clkdomain.scala 89:35] + lsu_c1r_cgc.clock <= clock + lsu_c1r_cgc.reset <= reset + lsu_c1r_cgc.io.en <= lsu_c1_r_clken @[el2_lsu_clkdomain.scala 89:77] + io.lsu_c1_r_clk <= lsu_c1r_cgc.io.l1clk @[el2_lsu_clkdomain.scala 89:127] + inst lsu_c2m_cgc of rvclkhdr_2 @[el2_lsu_clkdomain.scala 90:35] + lsu_c2m_cgc.clock <= clock + lsu_c2m_cgc.reset <= reset + lsu_c2m_cgc.io.en <= lsu_c2_m_clken @[el2_lsu_clkdomain.scala 90:77] + io.lsu_c2_m_clk <= lsu_c2m_cgc.io.l1clk @[el2_lsu_clkdomain.scala 90:127] + inst lsu_c2r_cgc of rvclkhdr_3 @[el2_lsu_clkdomain.scala 91:35] + lsu_c2r_cgc.clock <= clock + lsu_c2r_cgc.reset <= reset + lsu_c2r_cgc.io.en <= lsu_c2_r_clken @[el2_lsu_clkdomain.scala 91:77] + io.lsu_c2_r_clk <= lsu_c2r_cgc.io.l1clk @[el2_lsu_clkdomain.scala 91:127] + inst lsu_store_c1m_cgc of rvclkhdr_4 @[el2_lsu_clkdomain.scala 92:35] + lsu_store_c1m_cgc.clock <= clock + lsu_store_c1m_cgc.reset <= reset + lsu_store_c1m_cgc.io.en <= lsu_store_c1_m_clken @[el2_lsu_clkdomain.scala 92:77] + io.lsu_store_c1_m_clk <= lsu_store_c1m_cgc.io.l1clk @[el2_lsu_clkdomain.scala 92:127] + inst lsu_store_c1r_cgc of rvclkhdr_5 @[el2_lsu_clkdomain.scala 93:35] + lsu_store_c1r_cgc.clock <= clock + lsu_store_c1r_cgc.reset <= reset + lsu_store_c1r_cgc.io.en <= lsu_store_c1_r_clken @[el2_lsu_clkdomain.scala 93:77] + io.lsu_store_c1_r_clk <= lsu_store_c1r_cgc.io.l1clk @[el2_lsu_clkdomain.scala 93:127] + inst lsu_stbuf_c1_cgc of rvclkhdr_6 @[el2_lsu_clkdomain.scala 94:35] + lsu_stbuf_c1_cgc.clock <= clock + lsu_stbuf_c1_cgc.reset <= reset + lsu_stbuf_c1_cgc.io.en <= lsu_stbuf_c1_clken @[el2_lsu_clkdomain.scala 94:77] + io.lsu_stbuf_c1_clk <= lsu_stbuf_c1_cgc.io.l1clk @[el2_lsu_clkdomain.scala 94:127] + inst lsu_bus_ibuf_c1_cgc of rvclkhdr_7 @[el2_lsu_clkdomain.scala 95:35] + lsu_bus_ibuf_c1_cgc.clock <= clock + lsu_bus_ibuf_c1_cgc.reset <= reset + lsu_bus_ibuf_c1_cgc.io.en <= lsu_bus_ibuf_c1_clken @[el2_lsu_clkdomain.scala 95:77] + io.lsu_bus_ibuf_c1_clk <= lsu_bus_ibuf_c1_cgc.io.l1clk @[el2_lsu_clkdomain.scala 95:127] + inst lsu_bus_obuf_c1_cgc of rvclkhdr_8 @[el2_lsu_clkdomain.scala 96:35] + lsu_bus_obuf_c1_cgc.clock <= clock + lsu_bus_obuf_c1_cgc.reset <= reset + lsu_bus_obuf_c1_cgc.io.en <= lsu_bus_obuf_c1_clken @[el2_lsu_clkdomain.scala 96:77] + io.lsu_bus_obuf_c1_clk <= lsu_bus_obuf_c1_cgc.io.l1clk @[el2_lsu_clkdomain.scala 96:127] + inst lsu_bus_buf_c1_cgc of rvclkhdr_9 @[el2_lsu_clkdomain.scala 97:35] + lsu_bus_buf_c1_cgc.clock <= clock + lsu_bus_buf_c1_cgc.reset <= reset + lsu_bus_buf_c1_cgc.io.en <= lsu_bus_buf_c1_clken @[el2_lsu_clkdomain.scala 97:77] + io.lsu_bus_buf_c1_clk <= lsu_bus_buf_c1_cgc.io.l1clk @[el2_lsu_clkdomain.scala 97:127] + inst lsu_busm_cgc of rvclkhdr_10 @[el2_lsu_clkdomain.scala 98:35] + lsu_busm_cgc.clock <= clock + lsu_busm_cgc.reset <= reset + lsu_busm_cgc.io.en <= io.lsu_bus_clk_en @[el2_lsu_clkdomain.scala 98:77] + io.lsu_busm_clk <= lsu_busm_cgc.io.l1clk @[el2_lsu_clkdomain.scala 98:127] + inst lsu_free_cgc of rvclkhdr_11 @[el2_lsu_clkdomain.scala 99:35] + lsu_free_cgc.clock <= clock + lsu_free_cgc.reset <= reset + lsu_free_cgc.io.en <= lsu_free_c2_clken @[el2_lsu_clkdomain.scala 99:77] + io.lsu_free_c2_clk <= lsu_free_cgc.io.l1clk @[el2_lsu_clkdomain.scala 99:127] + lsu_c1m_cgc.io.clk <= clock @[el2_lsu_clkdomain.scala 101:30] + lsu_c1m_cgc.io.scan_mode <= io.scan_mode @[el2_lsu_clkdomain.scala 101:75] + lsu_c1r_cgc.io.clk <= clock @[el2_lsu_clkdomain.scala 102:30] + lsu_c1r_cgc.io.scan_mode <= io.scan_mode @[el2_lsu_clkdomain.scala 102:75] + lsu_c2m_cgc.io.clk <= clock @[el2_lsu_clkdomain.scala 103:30] + lsu_c2m_cgc.io.scan_mode <= io.scan_mode @[el2_lsu_clkdomain.scala 103:75] + lsu_c2r_cgc.io.clk <= clock @[el2_lsu_clkdomain.scala 104:30] + lsu_c2r_cgc.io.scan_mode <= io.scan_mode @[el2_lsu_clkdomain.scala 104:75] + lsu_store_c1m_cgc.io.clk <= clock @[el2_lsu_clkdomain.scala 105:30] + lsu_store_c1m_cgc.io.scan_mode <= io.scan_mode @[el2_lsu_clkdomain.scala 105:75] + lsu_store_c1r_cgc.io.clk <= clock @[el2_lsu_clkdomain.scala 106:30] + lsu_store_c1r_cgc.io.scan_mode <= io.scan_mode @[el2_lsu_clkdomain.scala 106:75] + lsu_stbuf_c1_cgc.io.clk <= clock @[el2_lsu_clkdomain.scala 107:30] + lsu_stbuf_c1_cgc.io.scan_mode <= io.scan_mode @[el2_lsu_clkdomain.scala 107:75] + lsu_bus_ibuf_c1_cgc.io.clk <= clock @[el2_lsu_clkdomain.scala 108:30] + lsu_bus_ibuf_c1_cgc.io.scan_mode <= io.scan_mode @[el2_lsu_clkdomain.scala 108:75] + lsu_bus_obuf_c1_cgc.io.clk <= clock @[el2_lsu_clkdomain.scala 109:30] + lsu_bus_obuf_c1_cgc.io.scan_mode <= io.scan_mode @[el2_lsu_clkdomain.scala 109:75] + lsu_bus_buf_c1_cgc.io.clk <= clock @[el2_lsu_clkdomain.scala 110:30] + lsu_bus_buf_c1_cgc.io.scan_mode <= io.scan_mode @[el2_lsu_clkdomain.scala 110:75] + lsu_busm_cgc.io.clk <= clock @[el2_lsu_clkdomain.scala 111:30] + lsu_busm_cgc.io.scan_mode <= io.scan_mode @[el2_lsu_clkdomain.scala 111:75] + lsu_free_cgc.io.clk <= clock @[el2_lsu_clkdomain.scala 112:30] + lsu_free_cgc.io.scan_mode <= io.scan_mode @[el2_lsu_clkdomain.scala 112:75] + diff --git a/el2_lsu_clkdomain.v b/el2_lsu_clkdomain.v new file mode 100644 index 00000000..c2b09bd6 --- /dev/null +++ b/el2_lsu_clkdomain.v @@ -0,0 +1,379 @@ +module rvclkhdr( + output io_l1clk, + input io_clk, + input io_en, + input io_scan_mode +); + wire clkhdr_Q; // @[beh_lib.scala 330:26] + wire clkhdr_CK; // @[beh_lib.scala 330:26] + wire clkhdr_EN; // @[beh_lib.scala 330:26] + wire clkhdr_SE; // @[beh_lib.scala 330:26] + TEC_RV_ICG clkhdr ( // @[beh_lib.scala 330:26] + .Q(clkhdr_Q), + .CK(clkhdr_CK), + .EN(clkhdr_EN), + .SE(clkhdr_SE) + ); + assign io_l1clk = clkhdr_Q; // @[beh_lib.scala 331:14] + assign clkhdr_CK = io_clk; // @[beh_lib.scala 332:18] + assign clkhdr_EN = io_en; // @[beh_lib.scala 333:18] + assign clkhdr_SE = io_scan_mode; // @[beh_lib.scala 334:18] +endmodule +module el2_lsu_clkdomain( + input clock, + input reset, + input io_free_clk, + input io_clk_override, + input io_addr_in_dccm_m, + input io_dma_dccm_req, + input io_ldst_stbuf_reqvld_r, + input io_stbuf_reqvld_any, + input io_stbuf_reqvld_flushed_any, + input io_lsu_busreq_r, + input io_lsu_bus_buffer_pend_any, + input io_lsu_bus_buffer_empty_any, + input io_lsu_stbuf_empty_any, + input io_lsu_bus_clk_en, + input io_lsu_p_fast_int, + input io_lsu_p_by, + input io_lsu_p_half, + input io_lsu_p_word, + input io_lsu_p_dword, + input io_lsu_p_load, + input io_lsu_p_store, + input io_lsu_p_unsign, + input io_lsu_p_dma, + input io_lsu_p_store_data_bypass_d, + input io_lsu_p_load_ldst_bypass_d, + input io_lsu_p_store_data_bypass_m, + input io_lsu_p_valid, + input io_lsu_pkt_d_fast_int, + input io_lsu_pkt_d_by, + input io_lsu_pkt_d_half, + input io_lsu_pkt_d_word, + input io_lsu_pkt_d_dword, + input io_lsu_pkt_d_load, + input io_lsu_pkt_d_store, + input io_lsu_pkt_d_unsign, + input io_lsu_pkt_d_dma, + input io_lsu_pkt_d_store_data_bypass_d, + input io_lsu_pkt_d_load_ldst_bypass_d, + input io_lsu_pkt_d_store_data_bypass_m, + input io_lsu_pkt_d_valid, + input io_lsu_pkt_m_fast_int, + input io_lsu_pkt_m_by, + input io_lsu_pkt_m_half, + input io_lsu_pkt_m_word, + input io_lsu_pkt_m_dword, + input io_lsu_pkt_m_load, + input io_lsu_pkt_m_store, + input io_lsu_pkt_m_unsign, + input io_lsu_pkt_m_dma, + input io_lsu_pkt_m_store_data_bypass_d, + input io_lsu_pkt_m_load_ldst_bypass_d, + input io_lsu_pkt_m_store_data_bypass_m, + input io_lsu_pkt_m_valid, + input io_lsu_pkt_r_fast_int, + input io_lsu_pkt_r_by, + input io_lsu_pkt_r_half, + input io_lsu_pkt_r_word, + input io_lsu_pkt_r_dword, + input io_lsu_pkt_r_load, + input io_lsu_pkt_r_store, + input io_lsu_pkt_r_unsign, + input io_lsu_pkt_r_dma, + input io_lsu_pkt_r_store_data_bypass_d, + input io_lsu_pkt_r_load_ldst_bypass_d, + input io_lsu_pkt_r_store_data_bypass_m, + input io_lsu_pkt_r_valid, + output io_lsu_c1_m_clk, + output io_lsu_c1_r_clk, + output io_lsu_c2_m_clk, + output io_lsu_c2_r_clk, + output io_lsu_store_c1_m_clk, + output io_lsu_store_c1_r_clk, + output io_lsu_stbuf_c1_clk, + output io_lsu_bus_obuf_c1_clk, + output io_lsu_bus_ibuf_c1_clk, + output io_lsu_bus_buf_c1_clk, + output io_lsu_busm_clk, + output io_lsu_free_c2_clk, + input io_scan_mode +); +`ifdef RANDOMIZE_REG_INIT + reg [31:0] _RAND_0; + reg [31:0] _RAND_1; + reg [31:0] _RAND_2; + reg [31:0] _RAND_3; +`endif // RANDOMIZE_REG_INIT + wire lsu_c1m_cgc_io_l1clk; // @[el2_lsu_clkdomain.scala 88:35] + wire lsu_c1m_cgc_io_clk; // @[el2_lsu_clkdomain.scala 88:35] + wire lsu_c1m_cgc_io_en; // @[el2_lsu_clkdomain.scala 88:35] + wire lsu_c1m_cgc_io_scan_mode; // @[el2_lsu_clkdomain.scala 88:35] + wire lsu_c1r_cgc_io_l1clk; // @[el2_lsu_clkdomain.scala 89:35] + wire lsu_c1r_cgc_io_clk; // @[el2_lsu_clkdomain.scala 89:35] + wire lsu_c1r_cgc_io_en; // @[el2_lsu_clkdomain.scala 89:35] + wire lsu_c1r_cgc_io_scan_mode; // @[el2_lsu_clkdomain.scala 89:35] + wire lsu_c2m_cgc_io_l1clk; // @[el2_lsu_clkdomain.scala 90:35] + wire lsu_c2m_cgc_io_clk; // @[el2_lsu_clkdomain.scala 90:35] + wire lsu_c2m_cgc_io_en; // @[el2_lsu_clkdomain.scala 90:35] + wire lsu_c2m_cgc_io_scan_mode; // @[el2_lsu_clkdomain.scala 90:35] + wire lsu_c2r_cgc_io_l1clk; // @[el2_lsu_clkdomain.scala 91:35] + wire lsu_c2r_cgc_io_clk; // @[el2_lsu_clkdomain.scala 91:35] + wire lsu_c2r_cgc_io_en; // @[el2_lsu_clkdomain.scala 91:35] + wire lsu_c2r_cgc_io_scan_mode; // @[el2_lsu_clkdomain.scala 91:35] + wire lsu_store_c1m_cgc_io_l1clk; // @[el2_lsu_clkdomain.scala 92:35] + wire lsu_store_c1m_cgc_io_clk; // @[el2_lsu_clkdomain.scala 92:35] + wire lsu_store_c1m_cgc_io_en; // @[el2_lsu_clkdomain.scala 92:35] + wire lsu_store_c1m_cgc_io_scan_mode; // @[el2_lsu_clkdomain.scala 92:35] + wire lsu_store_c1r_cgc_io_l1clk; // @[el2_lsu_clkdomain.scala 93:35] + wire lsu_store_c1r_cgc_io_clk; // @[el2_lsu_clkdomain.scala 93:35] + wire lsu_store_c1r_cgc_io_en; // @[el2_lsu_clkdomain.scala 93:35] + wire lsu_store_c1r_cgc_io_scan_mode; // @[el2_lsu_clkdomain.scala 93:35] + wire lsu_stbuf_c1_cgc_io_l1clk; // @[el2_lsu_clkdomain.scala 94:35] + wire lsu_stbuf_c1_cgc_io_clk; // @[el2_lsu_clkdomain.scala 94:35] + wire lsu_stbuf_c1_cgc_io_en; // @[el2_lsu_clkdomain.scala 94:35] + wire lsu_stbuf_c1_cgc_io_scan_mode; // @[el2_lsu_clkdomain.scala 94:35] + wire lsu_bus_ibuf_c1_cgc_io_l1clk; // @[el2_lsu_clkdomain.scala 95:35] + wire lsu_bus_ibuf_c1_cgc_io_clk; // @[el2_lsu_clkdomain.scala 95:35] + wire lsu_bus_ibuf_c1_cgc_io_en; // @[el2_lsu_clkdomain.scala 95:35] + wire lsu_bus_ibuf_c1_cgc_io_scan_mode; // @[el2_lsu_clkdomain.scala 95:35] + wire lsu_bus_obuf_c1_cgc_io_l1clk; // @[el2_lsu_clkdomain.scala 96:35] + wire lsu_bus_obuf_c1_cgc_io_clk; // @[el2_lsu_clkdomain.scala 96:35] + wire lsu_bus_obuf_c1_cgc_io_en; // @[el2_lsu_clkdomain.scala 96:35] + wire lsu_bus_obuf_c1_cgc_io_scan_mode; // @[el2_lsu_clkdomain.scala 96:35] + wire lsu_bus_buf_c1_cgc_io_l1clk; // @[el2_lsu_clkdomain.scala 97:35] + wire lsu_bus_buf_c1_cgc_io_clk; // @[el2_lsu_clkdomain.scala 97:35] + wire lsu_bus_buf_c1_cgc_io_en; // @[el2_lsu_clkdomain.scala 97:35] + wire lsu_bus_buf_c1_cgc_io_scan_mode; // @[el2_lsu_clkdomain.scala 97:35] + wire lsu_busm_cgc_io_l1clk; // @[el2_lsu_clkdomain.scala 98:35] + wire lsu_busm_cgc_io_clk; // @[el2_lsu_clkdomain.scala 98:35] + wire lsu_busm_cgc_io_en; // @[el2_lsu_clkdomain.scala 98:35] + wire lsu_busm_cgc_io_scan_mode; // @[el2_lsu_clkdomain.scala 98:35] + wire lsu_free_cgc_io_l1clk; // @[el2_lsu_clkdomain.scala 99:35] + wire lsu_free_cgc_io_clk; // @[el2_lsu_clkdomain.scala 99:35] + wire lsu_free_cgc_io_en; // @[el2_lsu_clkdomain.scala 99:35] + wire lsu_free_cgc_io_scan_mode; // @[el2_lsu_clkdomain.scala 99:35] + wire _T = io_lsu_p_valid | io_dma_dccm_req; // @[el2_lsu_clkdomain.scala 64:51] + wire lsu_c1_d_clken = _T | io_clk_override; // @[el2_lsu_clkdomain.scala 64:70] + reg lsu_c1_d_clken_q; // @[el2_lsu_clkdomain.scala 84:67] + wire _T_1 = io_lsu_pkt_d_valid | lsu_c1_d_clken_q; // @[el2_lsu_clkdomain.scala 65:51] + wire lsu_c1_m_clken = _T_1 | io_clk_override; // @[el2_lsu_clkdomain.scala 65:70] + reg lsu_c1_m_clken_q; // @[el2_lsu_clkdomain.scala 85:67] + wire _T_2 = io_lsu_pkt_m_valid | lsu_c1_m_clken_q; // @[el2_lsu_clkdomain.scala 66:51] + wire lsu_c1_r_clken = _T_2 | io_clk_override; // @[el2_lsu_clkdomain.scala 66:70] + wire _T_3 = lsu_c1_m_clken | lsu_c1_m_clken_q; // @[el2_lsu_clkdomain.scala 68:47] + reg lsu_c1_r_clken_q; // @[el2_lsu_clkdomain.scala 86:67] + wire _T_4 = lsu_c1_r_clken | lsu_c1_r_clken_q; // @[el2_lsu_clkdomain.scala 69:47] + wire _T_5 = lsu_c1_m_clken & io_lsu_pkt_d_store; // @[el2_lsu_clkdomain.scala 71:49] + wire _T_6 = lsu_c1_r_clken & io_lsu_pkt_m_store; // @[el2_lsu_clkdomain.scala 72:49] + wire _T_7 = io_ldst_stbuf_reqvld_r | io_stbuf_reqvld_any; // @[el2_lsu_clkdomain.scala 73:55] + wire _T_8 = _T_7 | io_stbuf_reqvld_flushed_any; // @[el2_lsu_clkdomain.scala 73:77] + wire _T_9 = io_lsu_bus_buffer_pend_any | io_lsu_busreq_r; // @[el2_lsu_clkdomain.scala 75:61] + wire _T_10 = _T_9 | io_clk_override; // @[el2_lsu_clkdomain.scala 75:79] + wire _T_11 = ~io_lsu_bus_buffer_empty_any; // @[el2_lsu_clkdomain.scala 76:32] + wire _T_12 = _T_11 | io_lsu_busreq_r; // @[el2_lsu_clkdomain.scala 76:61] + wire _T_13 = io_lsu_p_valid | io_lsu_pkt_d_valid; // @[el2_lsu_clkdomain.scala 78:48] + wire _T_14 = _T_13 | io_lsu_pkt_m_valid; // @[el2_lsu_clkdomain.scala 78:69] + wire _T_15 = _T_14 | io_lsu_pkt_r_valid; // @[el2_lsu_clkdomain.scala 78:90] + wire _T_17 = _T_15 | _T_11; // @[el2_lsu_clkdomain.scala 78:112] + wire _T_18 = ~io_lsu_stbuf_empty_any; // @[el2_lsu_clkdomain.scala 78:145] + wire _T_19 = _T_17 | _T_18; // @[el2_lsu_clkdomain.scala 78:143] + wire lsu_free_c1_clken = _T_19 | io_clk_override; // @[el2_lsu_clkdomain.scala 78:169] + reg lsu_free_c1_clken_q; // @[el2_lsu_clkdomain.scala 82:60] + wire _T_20 = lsu_free_c1_clken | lsu_free_c1_clken_q; // @[el2_lsu_clkdomain.scala 79:50] + rvclkhdr lsu_c1m_cgc ( // @[el2_lsu_clkdomain.scala 88:35] + .io_l1clk(lsu_c1m_cgc_io_l1clk), + .io_clk(lsu_c1m_cgc_io_clk), + .io_en(lsu_c1m_cgc_io_en), + .io_scan_mode(lsu_c1m_cgc_io_scan_mode) + ); + rvclkhdr lsu_c1r_cgc ( // @[el2_lsu_clkdomain.scala 89:35] + .io_l1clk(lsu_c1r_cgc_io_l1clk), + .io_clk(lsu_c1r_cgc_io_clk), + .io_en(lsu_c1r_cgc_io_en), + .io_scan_mode(lsu_c1r_cgc_io_scan_mode) + ); + rvclkhdr lsu_c2m_cgc ( // @[el2_lsu_clkdomain.scala 90:35] + .io_l1clk(lsu_c2m_cgc_io_l1clk), + .io_clk(lsu_c2m_cgc_io_clk), + .io_en(lsu_c2m_cgc_io_en), + .io_scan_mode(lsu_c2m_cgc_io_scan_mode) + ); + rvclkhdr lsu_c2r_cgc ( // @[el2_lsu_clkdomain.scala 91:35] + .io_l1clk(lsu_c2r_cgc_io_l1clk), + .io_clk(lsu_c2r_cgc_io_clk), + .io_en(lsu_c2r_cgc_io_en), + .io_scan_mode(lsu_c2r_cgc_io_scan_mode) + ); + rvclkhdr lsu_store_c1m_cgc ( // @[el2_lsu_clkdomain.scala 92:35] + .io_l1clk(lsu_store_c1m_cgc_io_l1clk), + .io_clk(lsu_store_c1m_cgc_io_clk), + .io_en(lsu_store_c1m_cgc_io_en), + .io_scan_mode(lsu_store_c1m_cgc_io_scan_mode) + ); + rvclkhdr lsu_store_c1r_cgc ( // @[el2_lsu_clkdomain.scala 93:35] + .io_l1clk(lsu_store_c1r_cgc_io_l1clk), + .io_clk(lsu_store_c1r_cgc_io_clk), + .io_en(lsu_store_c1r_cgc_io_en), + .io_scan_mode(lsu_store_c1r_cgc_io_scan_mode) + ); + rvclkhdr lsu_stbuf_c1_cgc ( // @[el2_lsu_clkdomain.scala 94:35] + .io_l1clk(lsu_stbuf_c1_cgc_io_l1clk), + .io_clk(lsu_stbuf_c1_cgc_io_clk), + .io_en(lsu_stbuf_c1_cgc_io_en), + .io_scan_mode(lsu_stbuf_c1_cgc_io_scan_mode) + ); + rvclkhdr lsu_bus_ibuf_c1_cgc ( // @[el2_lsu_clkdomain.scala 95:35] + .io_l1clk(lsu_bus_ibuf_c1_cgc_io_l1clk), + .io_clk(lsu_bus_ibuf_c1_cgc_io_clk), + .io_en(lsu_bus_ibuf_c1_cgc_io_en), + .io_scan_mode(lsu_bus_ibuf_c1_cgc_io_scan_mode) + ); + rvclkhdr lsu_bus_obuf_c1_cgc ( // @[el2_lsu_clkdomain.scala 96:35] + .io_l1clk(lsu_bus_obuf_c1_cgc_io_l1clk), + .io_clk(lsu_bus_obuf_c1_cgc_io_clk), + .io_en(lsu_bus_obuf_c1_cgc_io_en), + .io_scan_mode(lsu_bus_obuf_c1_cgc_io_scan_mode) + ); + rvclkhdr lsu_bus_buf_c1_cgc ( // @[el2_lsu_clkdomain.scala 97:35] + .io_l1clk(lsu_bus_buf_c1_cgc_io_l1clk), + .io_clk(lsu_bus_buf_c1_cgc_io_clk), + .io_en(lsu_bus_buf_c1_cgc_io_en), + .io_scan_mode(lsu_bus_buf_c1_cgc_io_scan_mode) + ); + rvclkhdr lsu_busm_cgc ( // @[el2_lsu_clkdomain.scala 98:35] + .io_l1clk(lsu_busm_cgc_io_l1clk), + .io_clk(lsu_busm_cgc_io_clk), + .io_en(lsu_busm_cgc_io_en), + .io_scan_mode(lsu_busm_cgc_io_scan_mode) + ); + rvclkhdr lsu_free_cgc ( // @[el2_lsu_clkdomain.scala 99:35] + .io_l1clk(lsu_free_cgc_io_l1clk), + .io_clk(lsu_free_cgc_io_clk), + .io_en(lsu_free_cgc_io_en), + .io_scan_mode(lsu_free_cgc_io_scan_mode) + ); + assign io_lsu_c1_m_clk = lsu_c1m_cgc_io_l1clk; // @[el2_lsu_clkdomain.scala 88:127] + assign io_lsu_c1_r_clk = lsu_c1r_cgc_io_l1clk; // @[el2_lsu_clkdomain.scala 89:127] + assign io_lsu_c2_m_clk = lsu_c2m_cgc_io_l1clk; // @[el2_lsu_clkdomain.scala 90:127] + assign io_lsu_c2_r_clk = lsu_c2r_cgc_io_l1clk; // @[el2_lsu_clkdomain.scala 91:127] + assign io_lsu_store_c1_m_clk = lsu_store_c1m_cgc_io_l1clk; // @[el2_lsu_clkdomain.scala 92:127] + assign io_lsu_store_c1_r_clk = lsu_store_c1r_cgc_io_l1clk; // @[el2_lsu_clkdomain.scala 93:127] + assign io_lsu_stbuf_c1_clk = lsu_stbuf_c1_cgc_io_l1clk; // @[el2_lsu_clkdomain.scala 94:127] + assign io_lsu_bus_obuf_c1_clk = lsu_bus_obuf_c1_cgc_io_l1clk; // @[el2_lsu_clkdomain.scala 96:127] + assign io_lsu_bus_ibuf_c1_clk = lsu_bus_ibuf_c1_cgc_io_l1clk; // @[el2_lsu_clkdomain.scala 95:127] + assign io_lsu_bus_buf_c1_clk = lsu_bus_buf_c1_cgc_io_l1clk; // @[el2_lsu_clkdomain.scala 97:127] + assign io_lsu_busm_clk = lsu_busm_cgc_io_l1clk; // @[el2_lsu_clkdomain.scala 98:127] + assign io_lsu_free_c2_clk = lsu_free_cgc_io_l1clk; // @[el2_lsu_clkdomain.scala 99:127] + assign lsu_c1m_cgc_io_clk = clock; // @[el2_lsu_clkdomain.scala 101:30] + assign lsu_c1m_cgc_io_en = _T_1 | io_clk_override; // @[el2_lsu_clkdomain.scala 88:77] + assign lsu_c1m_cgc_io_scan_mode = io_scan_mode; // @[el2_lsu_clkdomain.scala 101:75] + assign lsu_c1r_cgc_io_clk = clock; // @[el2_lsu_clkdomain.scala 102:30] + assign lsu_c1r_cgc_io_en = _T_2 | io_clk_override; // @[el2_lsu_clkdomain.scala 89:77] + assign lsu_c1r_cgc_io_scan_mode = io_scan_mode; // @[el2_lsu_clkdomain.scala 102:75] + assign lsu_c2m_cgc_io_clk = clock; // @[el2_lsu_clkdomain.scala 103:30] + assign lsu_c2m_cgc_io_en = _T_3 | io_clk_override; // @[el2_lsu_clkdomain.scala 90:77] + assign lsu_c2m_cgc_io_scan_mode = io_scan_mode; // @[el2_lsu_clkdomain.scala 103:75] + assign lsu_c2r_cgc_io_clk = clock; // @[el2_lsu_clkdomain.scala 104:30] + assign lsu_c2r_cgc_io_en = _T_4 | io_clk_override; // @[el2_lsu_clkdomain.scala 91:77] + assign lsu_c2r_cgc_io_scan_mode = io_scan_mode; // @[el2_lsu_clkdomain.scala 104:75] + assign lsu_store_c1m_cgc_io_clk = clock; // @[el2_lsu_clkdomain.scala 105:30] + assign lsu_store_c1m_cgc_io_en = _T_5 | io_clk_override; // @[el2_lsu_clkdomain.scala 92:77] + assign lsu_store_c1m_cgc_io_scan_mode = io_scan_mode; // @[el2_lsu_clkdomain.scala 105:75] + assign lsu_store_c1r_cgc_io_clk = clock; // @[el2_lsu_clkdomain.scala 106:30] + assign lsu_store_c1r_cgc_io_en = _T_6 | io_clk_override; // @[el2_lsu_clkdomain.scala 93:77] + assign lsu_store_c1r_cgc_io_scan_mode = io_scan_mode; // @[el2_lsu_clkdomain.scala 106:75] + assign lsu_stbuf_c1_cgc_io_clk = clock; // @[el2_lsu_clkdomain.scala 107:30] + assign lsu_stbuf_c1_cgc_io_en = _T_8 | io_clk_override; // @[el2_lsu_clkdomain.scala 94:77] + assign lsu_stbuf_c1_cgc_io_scan_mode = io_scan_mode; // @[el2_lsu_clkdomain.scala 107:75] + assign lsu_bus_ibuf_c1_cgc_io_clk = clock; // @[el2_lsu_clkdomain.scala 108:30] + assign lsu_bus_ibuf_c1_cgc_io_en = io_lsu_busreq_r | io_clk_override; // @[el2_lsu_clkdomain.scala 95:77] + assign lsu_bus_ibuf_c1_cgc_io_scan_mode = io_scan_mode; // @[el2_lsu_clkdomain.scala 108:75] + assign lsu_bus_obuf_c1_cgc_io_clk = clock; // @[el2_lsu_clkdomain.scala 109:30] + assign lsu_bus_obuf_c1_cgc_io_en = _T_10 & io_lsu_bus_clk_en; // @[el2_lsu_clkdomain.scala 96:77] + assign lsu_bus_obuf_c1_cgc_io_scan_mode = io_scan_mode; // @[el2_lsu_clkdomain.scala 109:75] + assign lsu_bus_buf_c1_cgc_io_clk = clock; // @[el2_lsu_clkdomain.scala 110:30] + assign lsu_bus_buf_c1_cgc_io_en = _T_12 | io_clk_override; // @[el2_lsu_clkdomain.scala 97:77] + assign lsu_bus_buf_c1_cgc_io_scan_mode = io_scan_mode; // @[el2_lsu_clkdomain.scala 110:75] + assign lsu_busm_cgc_io_clk = clock; // @[el2_lsu_clkdomain.scala 111:30] + assign lsu_busm_cgc_io_en = io_lsu_bus_clk_en; // @[el2_lsu_clkdomain.scala 98:77] + assign lsu_busm_cgc_io_scan_mode = io_scan_mode; // @[el2_lsu_clkdomain.scala 111:75] + assign lsu_free_cgc_io_clk = clock; // @[el2_lsu_clkdomain.scala 112:30] + assign lsu_free_cgc_io_en = _T_20 | io_clk_override; // @[el2_lsu_clkdomain.scala 99:77] + assign lsu_free_cgc_io_scan_mode = io_scan_mode; // @[el2_lsu_clkdomain.scala 112:75] +`ifdef RANDOMIZE_GARBAGE_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_INVALID_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_REG_INIT +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_MEM_INIT +`define RANDOMIZE +`endif +`ifndef RANDOM +`define RANDOM $random +`endif +`ifdef RANDOMIZE_MEM_INIT + integer initvar; +`endif +`ifndef SYNTHESIS +`ifdef FIRRTL_BEFORE_INITIAL +`FIRRTL_BEFORE_INITIAL +`endif +initial begin + `ifdef RANDOMIZE + `ifdef INIT_RANDOM + `INIT_RANDOM + `endif + `ifndef VERILATOR + `ifdef RANDOMIZE_DELAY + #`RANDOMIZE_DELAY begin end + `else + #0.002 begin end + `endif + `endif +`ifdef RANDOMIZE_REG_INIT + _RAND_0 = {1{`RANDOM}}; + lsu_c1_d_clken_q = _RAND_0[0:0]; + _RAND_1 = {1{`RANDOM}}; + lsu_c1_m_clken_q = _RAND_1[0:0]; + _RAND_2 = {1{`RANDOM}}; + lsu_c1_r_clken_q = _RAND_2[0:0]; + _RAND_3 = {1{`RANDOM}}; + lsu_free_c1_clken_q = _RAND_3[0:0]; +`endif // RANDOMIZE_REG_INIT + `endif // RANDOMIZE +end // initial +`ifdef FIRRTL_AFTER_INITIAL +`FIRRTL_AFTER_INITIAL +`endif +`endif // SYNTHESIS + always @(posedge io_lsu_free_c2_clk) begin + if (reset) begin + lsu_c1_d_clken_q <= 1'h0; + end else begin + lsu_c1_d_clken_q <= lsu_c1_d_clken; + end + if (reset) begin + lsu_c1_m_clken_q <= 1'h0; + end else begin + lsu_c1_m_clken_q <= lsu_c1_m_clken; + end + if (reset) begin + lsu_c1_r_clken_q <= 1'h0; + end else begin + lsu_c1_r_clken_q <= lsu_c1_r_clken; + end + end + always @(posedge io_free_clk) begin + if (reset) begin + lsu_free_c1_clken_q <= 1'h0; + end else begin + lsu_free_c1_clken_q <= lsu_free_c1_clken; + end + end +endmodule diff --git a/el2_lsu_dccm_ctl.anno.json b/el2_lsu_dccm_ctl.anno.json new file mode 100644 index 00000000..fa355f9b --- /dev/null +++ b/el2_lsu_dccm_ctl.anno.json @@ -0,0 +1,382 @@ +[ + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_dccm_wr_data_lo", + "sources":[ + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_ld_single_ecc_error_r_ff", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_dma_dccm_wen", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_sec_data_ecc_lo_r_ff", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_sec_data_lo_r_ff", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_sec_data_ecc_hi_r_ff", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_sec_data_hi_r_ff", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_dma_dccm_wdata_ecc_lo", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_dma_dccm_wdata_lo", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_stbuf_ecc_any", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_stbuf_data_any" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_ld_data_m", + "sources":[ + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_addr_m", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_stbuf_fwddata_hi_m", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_stbuf_fwddata_lo_m", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_addr_in_pic_m", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_stbuf_fwdbyteen_hi_m", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_stbuf_fwdbyteen_lo_m", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_picm_rd_data", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_dccm_rdata_hi_m", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_dccm_rdata_lo_m", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_dccm_rd_data_hi", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_dccm_rd_data_lo" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_picm_mken", + "sources":[ + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_addr_in_pic_d", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_d_valid", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_d_store" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_store_data_r", + "sources":[ + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_store_data_hi_r", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_store_data_lo_r", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_addr_r", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_r_store", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_r_word", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_r_by", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_r_half" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_dccm_wr_addr_hi", + "sources":[ + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_ld_single_ecc_error_r_ff", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_dma_dccm_wen", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_end_addr_d", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_stbuf_addr_any" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_store_datafn_lo_r", + "sources":[ + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_stbuf_data_any", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_store_data_lo_r", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_stbuf_commit_any", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_addr_in_dccm_r", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_stbuf_reqvld_any", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_stbuf_addr_any", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_addr_r", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_ld_single_ecc_error_r_ff", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_addr_in_dccm_d", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_dma_dccm_wen", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_d_valid", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_d_load", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_r_store", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_d_store", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_addr_d", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_end_addr_d", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_r_word", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_r_by", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_r_half", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_d_word", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_d_dword" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_picm_wren", + "sources":[ + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_dma_pic_wen", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_commit_r", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_addr_in_pic_r", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_r_valid", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_r_store" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_dccm_data_ecc_lo_m", + "sources":[ + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_dccm_rd_data_lo" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_dccm_rdata_lo_m", + "sources":[ + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_dccm_rd_data_lo" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_dccm_dma_rdata", + "sources":[ + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_stbuf_fwddata_hi_m", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_stbuf_fwddata_lo_m", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_addr_in_pic_m", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_stbuf_fwdbyteen_hi_m", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_stbuf_fwdbyteen_lo_m", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_picm_rd_data", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_sec_data_hi_m", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_sec_data_lo_m" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_dccm_rdata_hi_m", + "sources":[ + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_dccm_rd_data_hi" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_picm_wraddr", + "sources":[ + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_dma_pic_wen", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_dma_mem_addr", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_addr_r" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_dccm_data_ecc_hi_m", + "sources":[ + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_dccm_rd_data_hi" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_stbuf_commit_any", + "sources":[ + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_stbuf_reqvld_any", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_ld_single_ecc_error_r_ff", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_addr_in_dccm_d", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_dma_dccm_wen", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_d_valid", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_d_load", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_d_store", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_stbuf_addr_any", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_addr_d", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_end_addr_d", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_d_word", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_d_dword" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_picm_wr_data", + "sources":[ + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_dma_pic_wen", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_dma_mem_wdata", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_store_datafn_lo_r", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_stbuf_data_any", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_store_data_lo_r", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_stbuf_commit_any", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_addr_in_dccm_r", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_stbuf_reqvld_any", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_stbuf_addr_any", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_addr_r", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_ld_single_ecc_error_r_ff", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_addr_in_dccm_d", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_dma_dccm_wen", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_d_valid", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_d_load", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_r_store", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_d_store", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_addr_d", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_end_addr_d", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_r_word", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_r_by", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_r_half", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_d_word", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_d_dword" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_store_datafn_hi_r", + "sources":[ + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_stbuf_data_any", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_store_data_hi_r", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_stbuf_commit_any", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_addr_in_dccm_r", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_stbuf_reqvld_any", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_stbuf_addr_any", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_addr_r", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_ld_single_ecc_error_r_ff", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_addr_in_dccm_d", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_dma_dccm_wen", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_d_valid", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_d_load", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_r_store", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_d_store", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_addr_d", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_end_addr_d", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_r_word", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_r_by", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_r_half", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_d_word", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_d_dword" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_picm_rdaddr", + "sources":[ + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_addr_d" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_dccm_wren", + "sources":[ + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_ld_single_ecc_error_r_ff", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_dma_dccm_wen", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_stbuf_commit_any", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_stbuf_reqvld_any", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_addr_in_dccm_d", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_d_valid", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_d_load", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_d_store", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_stbuf_addr_any", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_addr_d", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_end_addr_d", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_d_word", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_d_dword" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_dccm_dma_ecc_error", + "sources":[ + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_double_ecc_error_m" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_dccm_wr_data_hi", + "sources":[ + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_ld_single_ecc_error_r_ff", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_dma_dccm_wen", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_sec_data_ecc_hi_r_ff", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_sec_data_hi_r_ff", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_sec_data_ecc_lo_r_ff", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_sec_data_lo_r_ff", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_dma_dccm_wdata_ecc_hi", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_dma_dccm_wdata_hi", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_stbuf_ecc_any", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_stbuf_data_any" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_dccm_rd_addr_lo", + "sources":[ + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_addr_d" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_ld_single_ecc_error_r", + "sources":[ + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_double_ecc_error_r", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_r_load", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_single_ecc_error_lo_r", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_raw_fwd_lo_r", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_single_ecc_error_hi_r", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_raw_fwd_hi_r" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_dccm_dma_rvalid", + "sources":[ + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_m_dma", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_m_valid", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_m_load" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_dccm_wr_addr_lo", + "sources":[ + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_ld_single_ecc_error_r_ff", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_dma_dccm_wen", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_addr_d", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_stbuf_addr_any" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_picm_mask_data_m", + "sources":[ + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_picm_rd_data" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_dccm_dma_rtag", + "sources":[ + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_dma_mem_tag_m" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_dccm_rden", + "sources":[ + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_addr_in_dccm_d", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_d_valid", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_d_load", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_d_store", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_d_word", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_d_dword", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_addr_d" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_dccm_rd_addr_hi", + "sources":[ + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_end_addr_d" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_picm_rden", + "sources":[ + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_addr_in_pic_d", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_d_valid", + "~el2_lsu_dccm_ctl|el2_lsu_dccm_ctl>io_lsu_pkt_d_load" + ] + }, + { + "class":"firrtl.EmitCircuitAnnotation", + "emitter":"firrtl.VerilogEmitter" + }, + { + "class":"firrtl.transforms.BlackBoxResourceAnno", + "target":"el2_lsu_dccm_ctl.TEC_RV_ICG", + "resourceId":"/vsrc/TEC_RV_ICG.v" + }, + { + "class":"firrtl.options.TargetDirAnnotation", + "directory":"." + }, + { + "class":"firrtl.options.OutputAnnotationFileAnnotation", + "file":"el2_lsu_dccm_ctl" + }, + { + "class":"firrtl.transforms.BlackBoxTargetDirAnno", + "targetDir":"." + } +] \ No newline at end of file diff --git a/el2_lsu_dccm_ctl.fir b/el2_lsu_dccm_ctl.fir new file mode 100644 index 00000000..4eb2f7c2 --- /dev/null +++ b/el2_lsu_dccm_ctl.fir @@ -0,0 +1,845 @@ +;buildInfoPackage: chisel3, version: 3.3.1, scalaVersion: 2.12.11, sbtVersion: 1.3.10 +circuit el2_lsu_dccm_ctl : + extmodule TEC_RV_ICG : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG @[beh_lib.scala 330:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[beh_lib.scala 331:14] + clkhdr.CK <= io.clk @[beh_lib.scala 332:18] + clkhdr.EN <= io.en @[beh_lib.scala 333:18] + clkhdr.SE <= io.scan_mode @[beh_lib.scala 334:18] + + extmodule TEC_RV_ICG_1 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_1 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_1 @[beh_lib.scala 330:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[beh_lib.scala 331:14] + clkhdr.CK <= io.clk @[beh_lib.scala 332:18] + clkhdr.EN <= io.en @[beh_lib.scala 333:18] + clkhdr.SE <= io.scan_mode @[beh_lib.scala 334:18] + + module el2_lsu_dccm_ctl : + input clock : Clock + input reset : AsyncReset + output io : {flip lsu_c2_m_clk : Clock, flip lsu_c2_r_clk : Clock, flip lsu_free_c2_clk : Clock, flip lsu_c1_r_clk : Clock, flip lsu_store_c1_r_clk : Clock, flip clk : Clock, flip lsu_pkt_d : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip lsu_pkt_m : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip lsu_pkt_r : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip addr_in_dccm_d : UInt<1>, flip addr_in_dccm_m : UInt<1>, flip addr_in_dccm_r : UInt<1>, flip addr_in_pic_d : UInt<1>, flip addr_in_pic_m : UInt<1>, flip addr_in_pic_r : UInt<1>, flip lsu_raw_fwd_lo_r : UInt<1>, flip lsu_raw_fwd_hi_r : UInt<1>, flip lsu_commit_r : UInt<1>, flip lsu_addr_d : UInt<32>, flip lsu_addr_m : UInt<16>, flip lsu_addr_r : UInt<32>, flip end_addr_d : UInt<16>, flip end_addr_m : UInt<16>, flip end_addr_r : UInt<16>, flip stbuf_reqvld_any : UInt<1>, flip stbuf_addr_any : UInt<16>, flip stbuf_data_any : UInt<32>, flip stbuf_ecc_any : UInt<7>, flip stbuf_fwddata_hi_m : UInt<32>, flip stbuf_fwddata_lo_m : UInt<32>, flip stbuf_fwdbyteen_lo_m : UInt<4>, flip stbuf_fwdbyteen_hi_m : UInt<4>, dccm_rdata_hi_r : UInt<32>, dccm_rdata_lo_r : UInt<32>, dccm_data_ecc_hi_r : UInt<7>, dccm_data_ecc_lo_r : UInt<7>, lsu_ld_data_r : UInt<32>, lsu_ld_data_corr_r : UInt<32>, flip lsu_double_ecc_error_r : UInt<1>, flip single_ecc_error_hi_r : UInt<1>, flip single_ecc_error_lo_r : UInt<1>, flip sec_data_hi_r : UInt<32>, flip sec_data_lo_r : UInt<32>, flip sec_data_hi_r_ff : UInt<32>, flip sec_data_lo_r_ff : UInt<32>, flip sec_data_ecc_hi_r_ff : UInt<7>, flip sec_data_ecc_lo_r_ff : UInt<7>, dccm_rdata_hi_m : UInt<32>, dccm_rdata_lo_m : UInt<32>, dccm_data_ecc_hi_m : UInt<7>, dccm_data_ecc_lo_m : UInt<7>, lsu_ld_data_m : UInt<32>, flip lsu_double_ecc_error_m : UInt<1>, flip sec_data_hi_m : UInt<32>, flip sec_data_lo_m : UInt<32>, flip store_data_m : UInt<32>, flip dma_dccm_wen : UInt<1>, flip dma_pic_wen : UInt<1>, flip dma_mem_tag_m : UInt<3>, flip dma_mem_addr : UInt<32>, flip dma_mem_wdata : UInt<64>, flip dma_dccm_wdata_lo : UInt<32>, flip dma_dccm_wdata_hi : UInt<32>, flip dma_dccm_wdata_ecc_hi : UInt<7>, flip dma_dccm_wdata_ecc_lo : UInt<7>, store_data_hi_r : UInt<32>, store_data_lo_r : UInt<32>, store_datafn_hi_r : UInt<32>, store_datafn_lo_r : UInt<32>, store_data_r : UInt<32>, ld_single_ecc_error_r : UInt<1>, ld_single_ecc_error_r_ff : UInt<1>, picm_mask_data_m : UInt<32>, lsu_stbuf_commit_any : UInt<1>, lsu_dccm_rden_m : UInt<1>, lsu_dccm_rden_r : UInt<1>, dccm_dma_rvalid : UInt<1>, dccm_dma_ecc_error : UInt<1>, dccm_dma_rtag : UInt<3>, dccm_dma_rdata : UInt<64>, dccm_wren : UInt<1>, dccm_rden : UInt<1>, dccm_wr_addr_lo : UInt<16>, dccm_wr_data_lo : UInt<39>, dccm_rd_addr_lo : UInt<16>, flip dccm_rd_data_lo : UInt<39>, dccm_wr_addr_hi : UInt<16>, dccm_wr_data_hi : UInt<39>, dccm_rd_addr_hi : UInt<16>, flip dccm_rd_data_hi : UInt<39>, picm_wren : UInt<1>, picm_rden : UInt<1>, picm_mken : UInt<1>, picm_rdaddr : UInt<32>, picm_wraddr : UInt<32>, picm_wr_data : UInt<32>, flip picm_rd_data : UInt<32>, flip scan_mode : UInt<1>} + + node picm_rd_data_m = cat(io.picm_rd_data, io.picm_rd_data) @[Cat.scala 29:58] + node dccm_rdata_corr_r = cat(io.sec_data_hi_r, io.sec_data_lo_r) @[Cat.scala 29:58] + node dccm_rdata_corr_m = cat(io.sec_data_hi_m, io.sec_data_lo_m) @[Cat.scala 29:58] + node dccm_rdata_r = cat(io.dccm_rdata_hi_r, io.dccm_rdata_lo_r) @[Cat.scala 29:58] + node dccm_rdata_m = cat(io.dccm_rdata_hi_m, io.dccm_rdata_lo_m) @[Cat.scala 29:58] + wire lsu_rdata_r : UInt<8>[8] @[el2_lsu_dccm_ctl.scala 134:32] + wire lsu_rdata_m : UInt<8>[8] @[el2_lsu_dccm_ctl.scala 135:32] + wire lsu_rdata_corr_r : UInt<8>[8] @[el2_lsu_dccm_ctl.scala 136:32] + wire lsu_rdata_corr_m : UInt<8>[8] @[el2_lsu_dccm_ctl.scala 137:32] + wire stbuf_fwddata_r : UInt<64> + stbuf_fwddata_r <= UInt<1>("h00") + wire stbuf_fwdbyteen_r : UInt<64> + stbuf_fwdbyteen_r <= UInt<1>("h00") + wire picm_rd_data_r_32 : UInt<32> + picm_rd_data_r_32 <= UInt<1>("h00") + wire picm_rd_data_r : UInt<64> + picm_rd_data_r <= UInt<1>("h00") + wire lsu_ld_data_corr_m : UInt<64> + lsu_ld_data_corr_m <= UInt<1>("h00") + node _T = and(io.lsu_pkt_m.valid, io.lsu_pkt_m.load) @[el2_lsu_dccm_ctl.scala 168:50] + node _T_1 = and(_T, io.lsu_pkt_m.dma) @[el2_lsu_dccm_ctl.scala 168:70] + io.dccm_dma_rvalid <= _T_1 @[el2_lsu_dccm_ctl.scala 168:28] + io.dccm_dma_ecc_error <= io.lsu_double_ecc_error_m @[el2_lsu_dccm_ctl.scala 169:28] + node _T_2 = cat(lsu_rdata_corr_m[1], lsu_rdata_corr_m[0]) @[el2_lsu_dccm_ctl.scala 170:48] + node _T_3 = cat(lsu_rdata_corr_m[3], lsu_rdata_corr_m[2]) @[el2_lsu_dccm_ctl.scala 170:48] + node _T_4 = cat(_T_3, _T_2) @[el2_lsu_dccm_ctl.scala 170:48] + node _T_5 = cat(lsu_rdata_corr_m[5], lsu_rdata_corr_m[4]) @[el2_lsu_dccm_ctl.scala 170:48] + node _T_6 = cat(lsu_rdata_corr_m[7], lsu_rdata_corr_m[6]) @[el2_lsu_dccm_ctl.scala 170:48] + node _T_7 = cat(_T_6, _T_5) @[el2_lsu_dccm_ctl.scala 170:48] + node _T_8 = cat(_T_7, _T_4) @[el2_lsu_dccm_ctl.scala 170:48] + io.dccm_dma_rdata <= _T_8 @[el2_lsu_dccm_ctl.scala 170:28] + io.dccm_dma_rtag <= io.dma_mem_tag_m @[el2_lsu_dccm_ctl.scala 171:28] + io.dccm_rdata_lo_r <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 172:28] + io.dccm_rdata_hi_r <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 173:28] + io.dccm_data_ecc_hi_r <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 174:28] + io.dccm_data_ecc_lo_r <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 175:28] + reg _T_9 : UInt, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_dccm_ctl.scala 178:65] + _T_9 <= lsu_ld_data_corr_m @[el2_lsu_dccm_ctl.scala 178:65] + io.lsu_ld_data_corr_r <= _T_9 @[el2_lsu_dccm_ctl.scala 178:28] + lsu_rdata_r[0] <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 180:27] + io.lsu_ld_data_r <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 181:27] + lsu_rdata_corr_r[0] <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 182:27] + node _T_10 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_11 = bits(_T_10, 0, 0) @[el2_lsu_dccm_ctl.scala 184:92] + node _T_12 = bits(_T_11, 0, 0) @[el2_lsu_dccm_ctl.scala 184:97] + node _T_13 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_14 = bits(_T_13, 7, 0) @[el2_lsu_dccm_ctl.scala 184:154] + node _T_15 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 184:189] + node _T_16 = bits(picm_rd_data_m, 7, 0) @[el2_lsu_dccm_ctl.scala 184:210] + node _T_17 = bits(dccm_rdata_corr_m, 7, 0) @[el2_lsu_dccm_ctl.scala 184:241] + node _T_18 = mux(_T_15, _T_16, _T_17) @[el2_lsu_dccm_ctl.scala 184:171] + node _T_19 = mux(_T_12, _T_14, _T_18) @[el2_lsu_dccm_ctl.scala 184:36] + lsu_rdata_corr_m[0] <= _T_19 @[el2_lsu_dccm_ctl.scala 184:30] + node _T_20 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_21 = bits(_T_20, 0, 0) @[el2_lsu_dccm_ctl.scala 185:92] + node _T_22 = bits(_T_21, 0, 0) @[el2_lsu_dccm_ctl.scala 185:97] + node _T_23 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_24 = bits(_T_23, 7, 0) @[el2_lsu_dccm_ctl.scala 185:154] + node _T_25 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 185:189] + node _T_26 = bits(picm_rd_data_m, 7, 0) @[el2_lsu_dccm_ctl.scala 185:210] + node _T_27 = bits(dccm_rdata_m, 7, 0) @[el2_lsu_dccm_ctl.scala 185:236] + node _T_28 = mux(_T_25, _T_26, _T_27) @[el2_lsu_dccm_ctl.scala 185:171] + node _T_29 = mux(_T_22, _T_24, _T_28) @[el2_lsu_dccm_ctl.scala 185:36] + lsu_rdata_m[0] <= _T_29 @[el2_lsu_dccm_ctl.scala 185:30] + lsu_rdata_r[1] <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 180:27] + io.lsu_ld_data_r <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 181:27] + lsu_rdata_corr_r[1] <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 182:27] + node _T_30 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_31 = bits(_T_30, 1, 1) @[el2_lsu_dccm_ctl.scala 184:92] + node _T_32 = bits(_T_31, 0, 0) @[el2_lsu_dccm_ctl.scala 184:97] + node _T_33 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_34 = bits(_T_33, 15, 8) @[el2_lsu_dccm_ctl.scala 184:154] + node _T_35 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 184:189] + node _T_36 = bits(picm_rd_data_m, 15, 8) @[el2_lsu_dccm_ctl.scala 184:210] + node _T_37 = bits(dccm_rdata_corr_m, 15, 8) @[el2_lsu_dccm_ctl.scala 184:241] + node _T_38 = mux(_T_35, _T_36, _T_37) @[el2_lsu_dccm_ctl.scala 184:171] + node _T_39 = mux(_T_32, _T_34, _T_38) @[el2_lsu_dccm_ctl.scala 184:36] + lsu_rdata_corr_m[1] <= _T_39 @[el2_lsu_dccm_ctl.scala 184:30] + node _T_40 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_41 = bits(_T_40, 1, 1) @[el2_lsu_dccm_ctl.scala 185:92] + node _T_42 = bits(_T_41, 0, 0) @[el2_lsu_dccm_ctl.scala 185:97] + node _T_43 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_44 = bits(_T_43, 15, 8) @[el2_lsu_dccm_ctl.scala 185:154] + node _T_45 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 185:189] + node _T_46 = bits(picm_rd_data_m, 15, 8) @[el2_lsu_dccm_ctl.scala 185:210] + node _T_47 = bits(dccm_rdata_m, 15, 8) @[el2_lsu_dccm_ctl.scala 185:236] + node _T_48 = mux(_T_45, _T_46, _T_47) @[el2_lsu_dccm_ctl.scala 185:171] + node _T_49 = mux(_T_42, _T_44, _T_48) @[el2_lsu_dccm_ctl.scala 185:36] + lsu_rdata_m[1] <= _T_49 @[el2_lsu_dccm_ctl.scala 185:30] + lsu_rdata_r[2] <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 180:27] + io.lsu_ld_data_r <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 181:27] + lsu_rdata_corr_r[2] <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 182:27] + node _T_50 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_51 = bits(_T_50, 2, 2) @[el2_lsu_dccm_ctl.scala 184:92] + node _T_52 = bits(_T_51, 0, 0) @[el2_lsu_dccm_ctl.scala 184:97] + node _T_53 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_54 = bits(_T_53, 23, 16) @[el2_lsu_dccm_ctl.scala 184:154] + node _T_55 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 184:189] + node _T_56 = bits(picm_rd_data_m, 23, 16) @[el2_lsu_dccm_ctl.scala 184:210] + node _T_57 = bits(dccm_rdata_corr_m, 23, 16) @[el2_lsu_dccm_ctl.scala 184:241] + node _T_58 = mux(_T_55, _T_56, _T_57) @[el2_lsu_dccm_ctl.scala 184:171] + node _T_59 = mux(_T_52, _T_54, _T_58) @[el2_lsu_dccm_ctl.scala 184:36] + lsu_rdata_corr_m[2] <= _T_59 @[el2_lsu_dccm_ctl.scala 184:30] + node _T_60 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_61 = bits(_T_60, 2, 2) @[el2_lsu_dccm_ctl.scala 185:92] + node _T_62 = bits(_T_61, 0, 0) @[el2_lsu_dccm_ctl.scala 185:97] + node _T_63 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_64 = bits(_T_63, 23, 16) @[el2_lsu_dccm_ctl.scala 185:154] + node _T_65 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 185:189] + node _T_66 = bits(picm_rd_data_m, 23, 16) @[el2_lsu_dccm_ctl.scala 185:210] + node _T_67 = bits(dccm_rdata_m, 23, 16) @[el2_lsu_dccm_ctl.scala 185:236] + node _T_68 = mux(_T_65, _T_66, _T_67) @[el2_lsu_dccm_ctl.scala 185:171] + node _T_69 = mux(_T_62, _T_64, _T_68) @[el2_lsu_dccm_ctl.scala 185:36] + lsu_rdata_m[2] <= _T_69 @[el2_lsu_dccm_ctl.scala 185:30] + lsu_rdata_r[3] <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 180:27] + io.lsu_ld_data_r <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 181:27] + lsu_rdata_corr_r[3] <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 182:27] + node _T_70 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_71 = bits(_T_70, 3, 3) @[el2_lsu_dccm_ctl.scala 184:92] + node _T_72 = bits(_T_71, 0, 0) @[el2_lsu_dccm_ctl.scala 184:97] + node _T_73 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_74 = bits(_T_73, 31, 24) @[el2_lsu_dccm_ctl.scala 184:154] + node _T_75 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 184:189] + node _T_76 = bits(picm_rd_data_m, 31, 24) @[el2_lsu_dccm_ctl.scala 184:210] + node _T_77 = bits(dccm_rdata_corr_m, 31, 24) @[el2_lsu_dccm_ctl.scala 184:241] + node _T_78 = mux(_T_75, _T_76, _T_77) @[el2_lsu_dccm_ctl.scala 184:171] + node _T_79 = mux(_T_72, _T_74, _T_78) @[el2_lsu_dccm_ctl.scala 184:36] + lsu_rdata_corr_m[3] <= _T_79 @[el2_lsu_dccm_ctl.scala 184:30] + node _T_80 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_81 = bits(_T_80, 3, 3) @[el2_lsu_dccm_ctl.scala 185:92] + node _T_82 = bits(_T_81, 0, 0) @[el2_lsu_dccm_ctl.scala 185:97] + node _T_83 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_84 = bits(_T_83, 31, 24) @[el2_lsu_dccm_ctl.scala 185:154] + node _T_85 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 185:189] + node _T_86 = bits(picm_rd_data_m, 31, 24) @[el2_lsu_dccm_ctl.scala 185:210] + node _T_87 = bits(dccm_rdata_m, 31, 24) @[el2_lsu_dccm_ctl.scala 185:236] + node _T_88 = mux(_T_85, _T_86, _T_87) @[el2_lsu_dccm_ctl.scala 185:171] + node _T_89 = mux(_T_82, _T_84, _T_88) @[el2_lsu_dccm_ctl.scala 185:36] + lsu_rdata_m[3] <= _T_89 @[el2_lsu_dccm_ctl.scala 185:30] + lsu_rdata_r[4] <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 180:27] + io.lsu_ld_data_r <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 181:27] + lsu_rdata_corr_r[4] <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 182:27] + node _T_90 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_91 = bits(_T_90, 4, 4) @[el2_lsu_dccm_ctl.scala 184:92] + node _T_92 = bits(_T_91, 0, 0) @[el2_lsu_dccm_ctl.scala 184:97] + node _T_93 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_94 = bits(_T_93, 39, 32) @[el2_lsu_dccm_ctl.scala 184:154] + node _T_95 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 184:189] + node _T_96 = bits(picm_rd_data_m, 39, 32) @[el2_lsu_dccm_ctl.scala 184:210] + node _T_97 = bits(dccm_rdata_corr_m, 39, 32) @[el2_lsu_dccm_ctl.scala 184:241] + node _T_98 = mux(_T_95, _T_96, _T_97) @[el2_lsu_dccm_ctl.scala 184:171] + node _T_99 = mux(_T_92, _T_94, _T_98) @[el2_lsu_dccm_ctl.scala 184:36] + lsu_rdata_corr_m[4] <= _T_99 @[el2_lsu_dccm_ctl.scala 184:30] + node _T_100 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_101 = bits(_T_100, 4, 4) @[el2_lsu_dccm_ctl.scala 185:92] + node _T_102 = bits(_T_101, 0, 0) @[el2_lsu_dccm_ctl.scala 185:97] + node _T_103 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_104 = bits(_T_103, 39, 32) @[el2_lsu_dccm_ctl.scala 185:154] + node _T_105 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 185:189] + node _T_106 = bits(picm_rd_data_m, 39, 32) @[el2_lsu_dccm_ctl.scala 185:210] + node _T_107 = bits(dccm_rdata_m, 39, 32) @[el2_lsu_dccm_ctl.scala 185:236] + node _T_108 = mux(_T_105, _T_106, _T_107) @[el2_lsu_dccm_ctl.scala 185:171] + node _T_109 = mux(_T_102, _T_104, _T_108) @[el2_lsu_dccm_ctl.scala 185:36] + lsu_rdata_m[4] <= _T_109 @[el2_lsu_dccm_ctl.scala 185:30] + lsu_rdata_r[5] <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 180:27] + io.lsu_ld_data_r <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 181:27] + lsu_rdata_corr_r[5] <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 182:27] + node _T_110 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_111 = bits(_T_110, 5, 5) @[el2_lsu_dccm_ctl.scala 184:92] + node _T_112 = bits(_T_111, 0, 0) @[el2_lsu_dccm_ctl.scala 184:97] + node _T_113 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_114 = bits(_T_113, 47, 40) @[el2_lsu_dccm_ctl.scala 184:154] + node _T_115 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 184:189] + node _T_116 = bits(picm_rd_data_m, 47, 40) @[el2_lsu_dccm_ctl.scala 184:210] + node _T_117 = bits(dccm_rdata_corr_m, 47, 40) @[el2_lsu_dccm_ctl.scala 184:241] + node _T_118 = mux(_T_115, _T_116, _T_117) @[el2_lsu_dccm_ctl.scala 184:171] + node _T_119 = mux(_T_112, _T_114, _T_118) @[el2_lsu_dccm_ctl.scala 184:36] + lsu_rdata_corr_m[5] <= _T_119 @[el2_lsu_dccm_ctl.scala 184:30] + node _T_120 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_121 = bits(_T_120, 5, 5) @[el2_lsu_dccm_ctl.scala 185:92] + node _T_122 = bits(_T_121, 0, 0) @[el2_lsu_dccm_ctl.scala 185:97] + node _T_123 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_124 = bits(_T_123, 47, 40) @[el2_lsu_dccm_ctl.scala 185:154] + node _T_125 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 185:189] + node _T_126 = bits(picm_rd_data_m, 47, 40) @[el2_lsu_dccm_ctl.scala 185:210] + node _T_127 = bits(dccm_rdata_m, 47, 40) @[el2_lsu_dccm_ctl.scala 185:236] + node _T_128 = mux(_T_125, _T_126, _T_127) @[el2_lsu_dccm_ctl.scala 185:171] + node _T_129 = mux(_T_122, _T_124, _T_128) @[el2_lsu_dccm_ctl.scala 185:36] + lsu_rdata_m[5] <= _T_129 @[el2_lsu_dccm_ctl.scala 185:30] + lsu_rdata_r[6] <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 180:27] + io.lsu_ld_data_r <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 181:27] + lsu_rdata_corr_r[6] <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 182:27] + node _T_130 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_131 = bits(_T_130, 6, 6) @[el2_lsu_dccm_ctl.scala 184:92] + node _T_132 = bits(_T_131, 0, 0) @[el2_lsu_dccm_ctl.scala 184:97] + node _T_133 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_134 = bits(_T_133, 55, 48) @[el2_lsu_dccm_ctl.scala 184:154] + node _T_135 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 184:189] + node _T_136 = bits(picm_rd_data_m, 55, 48) @[el2_lsu_dccm_ctl.scala 184:210] + node _T_137 = bits(dccm_rdata_corr_m, 55, 48) @[el2_lsu_dccm_ctl.scala 184:241] + node _T_138 = mux(_T_135, _T_136, _T_137) @[el2_lsu_dccm_ctl.scala 184:171] + node _T_139 = mux(_T_132, _T_134, _T_138) @[el2_lsu_dccm_ctl.scala 184:36] + lsu_rdata_corr_m[6] <= _T_139 @[el2_lsu_dccm_ctl.scala 184:30] + node _T_140 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_141 = bits(_T_140, 6, 6) @[el2_lsu_dccm_ctl.scala 185:92] + node _T_142 = bits(_T_141, 0, 0) @[el2_lsu_dccm_ctl.scala 185:97] + node _T_143 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_144 = bits(_T_143, 55, 48) @[el2_lsu_dccm_ctl.scala 185:154] + node _T_145 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 185:189] + node _T_146 = bits(picm_rd_data_m, 55, 48) @[el2_lsu_dccm_ctl.scala 185:210] + node _T_147 = bits(dccm_rdata_m, 55, 48) @[el2_lsu_dccm_ctl.scala 185:236] + node _T_148 = mux(_T_145, _T_146, _T_147) @[el2_lsu_dccm_ctl.scala 185:171] + node _T_149 = mux(_T_142, _T_144, _T_148) @[el2_lsu_dccm_ctl.scala 185:36] + lsu_rdata_m[6] <= _T_149 @[el2_lsu_dccm_ctl.scala 185:30] + lsu_rdata_r[7] <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 180:27] + io.lsu_ld_data_r <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 181:27] + lsu_rdata_corr_r[7] <= UInt<1>("h00") @[el2_lsu_dccm_ctl.scala 182:27] + node _T_150 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_151 = bits(_T_150, 7, 7) @[el2_lsu_dccm_ctl.scala 184:92] + node _T_152 = bits(_T_151, 0, 0) @[el2_lsu_dccm_ctl.scala 184:97] + node _T_153 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_154 = bits(_T_153, 63, 56) @[el2_lsu_dccm_ctl.scala 184:154] + node _T_155 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 184:189] + node _T_156 = bits(picm_rd_data_m, 63, 56) @[el2_lsu_dccm_ctl.scala 184:210] + node _T_157 = bits(dccm_rdata_corr_m, 63, 56) @[el2_lsu_dccm_ctl.scala 184:241] + node _T_158 = mux(_T_155, _T_156, _T_157) @[el2_lsu_dccm_ctl.scala 184:171] + node _T_159 = mux(_T_152, _T_154, _T_158) @[el2_lsu_dccm_ctl.scala 184:36] + lsu_rdata_corr_m[7] <= _T_159 @[el2_lsu_dccm_ctl.scala 184:30] + node _T_160 = cat(io.stbuf_fwdbyteen_hi_m, io.stbuf_fwdbyteen_lo_m) @[Cat.scala 29:58] + node _T_161 = bits(_T_160, 7, 7) @[el2_lsu_dccm_ctl.scala 185:92] + node _T_162 = bits(_T_161, 0, 0) @[el2_lsu_dccm_ctl.scala 185:97] + node _T_163 = cat(io.stbuf_fwddata_hi_m, io.stbuf_fwddata_lo_m) @[Cat.scala 29:58] + node _T_164 = bits(_T_163, 63, 56) @[el2_lsu_dccm_ctl.scala 185:154] + node _T_165 = bits(io.addr_in_pic_m, 0, 0) @[el2_lsu_dccm_ctl.scala 185:189] + node _T_166 = bits(picm_rd_data_m, 63, 56) @[el2_lsu_dccm_ctl.scala 185:210] + node _T_167 = bits(dccm_rdata_m, 63, 56) @[el2_lsu_dccm_ctl.scala 185:236] + node _T_168 = mux(_T_165, _T_166, _T_167) @[el2_lsu_dccm_ctl.scala 185:171] + node _T_169 = mux(_T_162, _T_164, _T_168) @[el2_lsu_dccm_ctl.scala 185:36] + lsu_rdata_m[7] <= _T_169 @[el2_lsu_dccm_ctl.scala 185:30] + node _T_170 = cat(lsu_rdata_m[1], lsu_rdata_m[0]) @[el2_lsu_dccm_ctl.scala 186:43] + node _T_171 = cat(lsu_rdata_m[3], lsu_rdata_m[2]) @[el2_lsu_dccm_ctl.scala 186:43] + node _T_172 = cat(_T_171, _T_170) @[el2_lsu_dccm_ctl.scala 186:43] + node _T_173 = cat(lsu_rdata_m[5], lsu_rdata_m[4]) @[el2_lsu_dccm_ctl.scala 186:43] + node _T_174 = cat(lsu_rdata_m[7], lsu_rdata_m[6]) @[el2_lsu_dccm_ctl.scala 186:43] + node _T_175 = cat(_T_174, _T_173) @[el2_lsu_dccm_ctl.scala 186:43] + node _T_176 = cat(_T_175, _T_172) @[el2_lsu_dccm_ctl.scala 186:43] + node _T_177 = bits(io.lsu_addr_m, 1, 0) @[el2_lsu_dccm_ctl.scala 186:70] + node _T_178 = mul(UInt<4>("h08"), _T_177) @[el2_lsu_dccm_ctl.scala 186:56] + node _T_179 = dshr(_T_176, _T_178) @[el2_lsu_dccm_ctl.scala 186:50] + io.lsu_ld_data_m <= _T_179 @[el2_lsu_dccm_ctl.scala 186:28] + node _T_180 = cat(lsu_rdata_corr_m[1], lsu_rdata_corr_m[0]) @[el2_lsu_dccm_ctl.scala 187:48] + node _T_181 = cat(lsu_rdata_corr_m[3], lsu_rdata_corr_m[2]) @[el2_lsu_dccm_ctl.scala 187:48] + node _T_182 = cat(_T_181, _T_180) @[el2_lsu_dccm_ctl.scala 187:48] + node _T_183 = cat(lsu_rdata_corr_m[5], lsu_rdata_corr_m[4]) @[el2_lsu_dccm_ctl.scala 187:48] + node _T_184 = cat(lsu_rdata_corr_m[7], lsu_rdata_corr_m[6]) @[el2_lsu_dccm_ctl.scala 187:48] + node _T_185 = cat(_T_184, _T_183) @[el2_lsu_dccm_ctl.scala 187:48] + node _T_186 = cat(_T_185, _T_182) @[el2_lsu_dccm_ctl.scala 187:48] + node _T_187 = bits(io.lsu_addr_m, 1, 0) @[el2_lsu_dccm_ctl.scala 187:75] + node _T_188 = mul(UInt<4>("h08"), _T_187) @[el2_lsu_dccm_ctl.scala 187:61] + node _T_189 = dshr(_T_186, _T_188) @[el2_lsu_dccm_ctl.scala 187:55] + lsu_ld_data_corr_m <= _T_189 @[el2_lsu_dccm_ctl.scala 187:28] + node _T_190 = bits(io.lsu_addr_d, 15, 2) @[el2_lsu_dccm_ctl.scala 190:44] + node _T_191 = bits(io.lsu_addr_r, 15, 2) @[el2_lsu_dccm_ctl.scala 190:81] + node _T_192 = eq(_T_190, _T_191) @[el2_lsu_dccm_ctl.scala 190:64] + node _T_193 = bits(io.end_addr_d, 15, 2) @[el2_lsu_dccm_ctl.scala 190:125] + node _T_194 = bits(io.lsu_addr_r, 15, 2) @[el2_lsu_dccm_ctl.scala 190:162] + node _T_195 = eq(_T_193, _T_194) @[el2_lsu_dccm_ctl.scala 190:145] + node _T_196 = or(_T_192, _T_195) @[el2_lsu_dccm_ctl.scala 190:109] + node _T_197 = and(_T_196, io.lsu_pkt_d.valid) @[el2_lsu_dccm_ctl.scala 190:191] + node _T_198 = and(_T_197, io.lsu_pkt_d.store) @[el2_lsu_dccm_ctl.scala 190:212] + node _T_199 = and(_T_198, io.lsu_pkt_d.dma) @[el2_lsu_dccm_ctl.scala 190:233] + node _T_200 = and(_T_199, io.addr_in_dccm_d) @[el2_lsu_dccm_ctl.scala 190:252] + node _T_201 = bits(io.lsu_addr_m, 15, 2) @[el2_lsu_dccm_ctl.scala 191:21] + node _T_202 = bits(io.lsu_addr_r, 15, 2) @[el2_lsu_dccm_ctl.scala 191:58] + node _T_203 = eq(_T_201, _T_202) @[el2_lsu_dccm_ctl.scala 191:41] + node _T_204 = bits(io.end_addr_m, 15, 2) @[el2_lsu_dccm_ctl.scala 191:102] + node _T_205 = bits(io.lsu_addr_r, 15, 2) @[el2_lsu_dccm_ctl.scala 191:139] + node _T_206 = eq(_T_204, _T_205) @[el2_lsu_dccm_ctl.scala 191:122] + node _T_207 = or(_T_203, _T_206) @[el2_lsu_dccm_ctl.scala 191:86] + node _T_208 = and(_T_207, io.lsu_pkt_m.valid) @[el2_lsu_dccm_ctl.scala 191:168] + node _T_209 = and(_T_208, io.lsu_pkt_m.store) @[el2_lsu_dccm_ctl.scala 191:189] + node _T_210 = and(_T_209, io.lsu_pkt_m.dma) @[el2_lsu_dccm_ctl.scala 191:210] + node _T_211 = and(_T_210, io.addr_in_dccm_m) @[el2_lsu_dccm_ctl.scala 191:229] + node kill_ecc_corr_lo_r = or(_T_200, _T_211) @[el2_lsu_dccm_ctl.scala 190:273] + node _T_212 = bits(io.lsu_addr_d, 15, 2) @[el2_lsu_dccm_ctl.scala 192:44] + node _T_213 = bits(io.end_addr_r, 15, 2) @[el2_lsu_dccm_ctl.scala 192:81] + node _T_214 = eq(_T_212, _T_213) @[el2_lsu_dccm_ctl.scala 192:64] + node _T_215 = bits(io.end_addr_d, 15, 2) @[el2_lsu_dccm_ctl.scala 192:125] + node _T_216 = bits(io.end_addr_r, 15, 2) @[el2_lsu_dccm_ctl.scala 192:162] + node _T_217 = eq(_T_215, _T_216) @[el2_lsu_dccm_ctl.scala 192:145] + node _T_218 = or(_T_214, _T_217) @[el2_lsu_dccm_ctl.scala 192:109] + node _T_219 = and(_T_218, io.lsu_pkt_d.valid) @[el2_lsu_dccm_ctl.scala 192:191] + node _T_220 = and(_T_219, io.lsu_pkt_d.store) @[el2_lsu_dccm_ctl.scala 192:212] + node _T_221 = and(_T_220, io.lsu_pkt_d.dma) @[el2_lsu_dccm_ctl.scala 192:233] + node _T_222 = and(_T_221, io.addr_in_dccm_d) @[el2_lsu_dccm_ctl.scala 192:252] + node _T_223 = bits(io.lsu_addr_m, 15, 2) @[el2_lsu_dccm_ctl.scala 193:21] + node _T_224 = bits(io.end_addr_r, 15, 2) @[el2_lsu_dccm_ctl.scala 193:58] + node _T_225 = eq(_T_223, _T_224) @[el2_lsu_dccm_ctl.scala 193:41] + node _T_226 = bits(io.end_addr_m, 15, 2) @[el2_lsu_dccm_ctl.scala 193:102] + node _T_227 = bits(io.end_addr_r, 15, 2) @[el2_lsu_dccm_ctl.scala 193:139] + node _T_228 = eq(_T_226, _T_227) @[el2_lsu_dccm_ctl.scala 193:122] + node _T_229 = or(_T_225, _T_228) @[el2_lsu_dccm_ctl.scala 193:86] + node _T_230 = and(_T_229, io.lsu_pkt_m.valid) @[el2_lsu_dccm_ctl.scala 193:168] + node _T_231 = and(_T_230, io.lsu_pkt_m.store) @[el2_lsu_dccm_ctl.scala 193:189] + node _T_232 = and(_T_231, io.lsu_pkt_m.dma) @[el2_lsu_dccm_ctl.scala 193:210] + node _T_233 = and(_T_232, io.addr_in_dccm_m) @[el2_lsu_dccm_ctl.scala 193:229] + node kill_ecc_corr_hi_r = or(_T_222, _T_233) @[el2_lsu_dccm_ctl.scala 192:273] + node _T_234 = and(io.lsu_pkt_r.load, io.single_ecc_error_lo_r) @[el2_lsu_dccm_ctl.scala 194:55] + node _T_235 = not(io.lsu_raw_fwd_lo_r) @[el2_lsu_dccm_ctl.scala 194:84] + node ld_single_ecc_error_lo_r = and(_T_234, _T_235) @[el2_lsu_dccm_ctl.scala 194:82] + node _T_236 = and(io.lsu_pkt_r.load, io.single_ecc_error_hi_r) @[el2_lsu_dccm_ctl.scala 195:55] + node _T_237 = not(io.lsu_raw_fwd_hi_r) @[el2_lsu_dccm_ctl.scala 195:84] + node ld_single_ecc_error_hi_r = and(_T_236, _T_237) @[el2_lsu_dccm_ctl.scala 195:82] + node _T_238 = or(ld_single_ecc_error_lo_r, ld_single_ecc_error_hi_r) @[el2_lsu_dccm_ctl.scala 196:62] + node _T_239 = not(io.lsu_double_ecc_error_r) @[el2_lsu_dccm_ctl.scala 196:92] + node _T_240 = and(_T_238, _T_239) @[el2_lsu_dccm_ctl.scala 196:90] + io.ld_single_ecc_error_r <= _T_240 @[el2_lsu_dccm_ctl.scala 196:33] + node _T_241 = or(io.lsu_commit_r, io.lsu_pkt_r.dma) @[el2_lsu_dccm_ctl.scala 197:81] + node _T_242 = and(ld_single_ecc_error_lo_r, _T_241) @[el2_lsu_dccm_ctl.scala 197:62] + node _T_243 = not(kill_ecc_corr_lo_r) @[el2_lsu_dccm_ctl.scala 197:103] + node ld_single_ecc_error_lo_r_ns = and(_T_242, _T_243) @[el2_lsu_dccm_ctl.scala 197:101] + node _T_244 = or(io.lsu_commit_r, io.lsu_pkt_r.dma) @[el2_lsu_dccm_ctl.scala 198:81] + node _T_245 = and(ld_single_ecc_error_hi_r, _T_244) @[el2_lsu_dccm_ctl.scala 198:62] + node _T_246 = not(kill_ecc_corr_hi_r) @[el2_lsu_dccm_ctl.scala 198:103] + node ld_single_ecc_error_hi_r_ns = and(_T_245, _T_246) @[el2_lsu_dccm_ctl.scala 198:101] + reg lsu_double_ecc_error_r_ff : UInt, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_dccm_ctl.scala 200:74] + lsu_double_ecc_error_r_ff <= io.lsu_double_ecc_error_r @[el2_lsu_dccm_ctl.scala 200:74] + reg ld_single_ecc_error_hi_r_ff : UInt, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_dccm_ctl.scala 201:74] + ld_single_ecc_error_hi_r_ff <= ld_single_ecc_error_hi_r_ns @[el2_lsu_dccm_ctl.scala 201:74] + reg ld_single_ecc_error_lo_r_ff : UInt, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_dccm_ctl.scala 202:74] + ld_single_ecc_error_lo_r_ff <= ld_single_ecc_error_lo_r_ns @[el2_lsu_dccm_ctl.scala 202:74] + node _T_247 = bits(io.end_addr_r, 15, 0) @[el2_lsu_dccm_ctl.scala 206:49] + node _T_248 = bits(io.ld_single_ecc_error_r, 0, 0) @[el2_lsu_dccm_ctl.scala 206:94] + node _T_249 = bits(io.scan_mode, 0, 0) @[el2_lsu_dccm_ctl.scala 206:121] + inst rvclkhdr of rvclkhdr @[beh_lib.scala 350:21] + rvclkhdr.clock <= clock + rvclkhdr.reset <= reset + rvclkhdr.io.clk <= io.clk @[beh_lib.scala 352:16] + rvclkhdr.io.en <= _T_248 @[beh_lib.scala 353:15] + rvclkhdr.io.scan_mode <= _T_249 @[beh_lib.scala 354:22] + reg ld_sec_addr_hi_r_ff : UInt, rvclkhdr.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[beh_lib.scala 356:14] + ld_sec_addr_hi_r_ff <= _T_247 @[beh_lib.scala 356:14] + node _T_250 = bits(io.lsu_addr_r, 15, 0) @[el2_lsu_dccm_ctl.scala 207:49] + node _T_251 = bits(io.ld_single_ecc_error_r, 0, 0) @[el2_lsu_dccm_ctl.scala 207:94] + node _T_252 = bits(io.scan_mode, 0, 0) @[el2_lsu_dccm_ctl.scala 207:121] + inst rvclkhdr_1 of rvclkhdr_1 @[beh_lib.scala 350:21] + rvclkhdr_1.clock <= clock + rvclkhdr_1.reset <= reset + rvclkhdr_1.io.clk <= io.clk @[beh_lib.scala 352:16] + rvclkhdr_1.io.en <= _T_251 @[beh_lib.scala 353:15] + rvclkhdr_1.io.scan_mode <= _T_252 @[beh_lib.scala 354:22] + reg ld_sec_addr_lo_r_ff : UInt, rvclkhdr_1.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[beh_lib.scala 356:14] + ld_sec_addr_lo_r_ff <= _T_250 @[beh_lib.scala 356:14] + node _T_253 = or(io.lsu_pkt_d.word, io.lsu_pkt_d.dword) @[el2_lsu_dccm_ctl.scala 208:110] + node _T_254 = not(_T_253) @[el2_lsu_dccm_ctl.scala 208:90] + node _T_255 = bits(io.lsu_addr_d, 1, 0) @[el2_lsu_dccm_ctl.scala 208:148] + node _T_256 = neq(_T_255, UInt<2>("h00")) @[el2_lsu_dccm_ctl.scala 208:154] + node _T_257 = or(_T_254, _T_256) @[el2_lsu_dccm_ctl.scala 208:132] + node _T_258 = and(io.lsu_pkt_d.store, _T_257) @[el2_lsu_dccm_ctl.scala 208:87] + node _T_259 = or(io.lsu_pkt_d.load, _T_258) @[el2_lsu_dccm_ctl.scala 208:65] + node _T_260 = and(io.lsu_pkt_d.valid, _T_259) @[el2_lsu_dccm_ctl.scala 208:44] + node lsu_dccm_rden_d = and(_T_260, io.addr_in_dccm_d) @[el2_lsu_dccm_ctl.scala 208:171] + node _T_261 = or(ld_single_ecc_error_lo_r_ff, ld_single_ecc_error_hi_r_ff) @[el2_lsu_dccm_ctl.scala 211:63] + node _T_262 = not(lsu_double_ecc_error_r_ff) @[el2_lsu_dccm_ctl.scala 211:96] + node _T_263 = and(_T_261, _T_262) @[el2_lsu_dccm_ctl.scala 211:94] + io.ld_single_ecc_error_r_ff <= _T_263 @[el2_lsu_dccm_ctl.scala 211:31] + node _T_264 = or(lsu_dccm_rden_d, io.dma_dccm_wen) @[el2_lsu_dccm_ctl.scala 212:71] + node _T_265 = or(_T_264, io.ld_single_ecc_error_r_ff) @[el2_lsu_dccm_ctl.scala 212:89] + node _T_266 = not(_T_265) @[el2_lsu_dccm_ctl.scala 212:53] + node _T_267 = bits(io.stbuf_addr_any, 3, 2) @[el2_lsu_dccm_ctl.scala 213:44] + node _T_268 = bits(io.lsu_addr_d, 3, 2) @[el2_lsu_dccm_ctl.scala 213:124] + node _T_269 = eq(_T_267, _T_268) @[el2_lsu_dccm_ctl.scala 213:107] + node _T_270 = bits(io.stbuf_addr_any, 3, 2) @[el2_lsu_dccm_ctl.scala 214:25] + node _T_271 = bits(io.end_addr_d, 3, 2) @[el2_lsu_dccm_ctl.scala 214:105] + node _T_272 = eq(_T_270, _T_271) @[el2_lsu_dccm_ctl.scala 214:88] + node _T_273 = or(_T_269, _T_272) @[el2_lsu_dccm_ctl.scala 213:195] + node _T_274 = not(_T_273) @[el2_lsu_dccm_ctl.scala 213:24] + node _T_275 = and(lsu_dccm_rden_d, _T_274) @[el2_lsu_dccm_ctl.scala 213:22] + node _T_276 = or(_T_266, _T_275) @[el2_lsu_dccm_ctl.scala 212:120] + node _T_277 = and(io.stbuf_reqvld_any, _T_276) @[el2_lsu_dccm_ctl.scala 212:50] + io.lsu_stbuf_commit_any <= _T_277 @[el2_lsu_dccm_ctl.scala 212:27] + node _T_278 = or(io.dma_dccm_wen, io.lsu_stbuf_commit_any) @[el2_lsu_dccm_ctl.scala 217:41] + node _T_279 = or(_T_278, io.ld_single_ecc_error_r_ff) @[el2_lsu_dccm_ctl.scala 217:67] + io.dccm_wren <= _T_279 @[el2_lsu_dccm_ctl.scala 217:22] + node _T_280 = and(lsu_dccm_rden_d, io.addr_in_dccm_d) @[el2_lsu_dccm_ctl.scala 218:41] + io.dccm_rden <= _T_280 @[el2_lsu_dccm_ctl.scala 218:22] + node _T_281 = bits(io.ld_single_ecc_error_r_ff, 0, 0) @[el2_lsu_dccm_ctl.scala 219:57] + node _T_282 = eq(ld_single_ecc_error_lo_r_ff, UInt<1>("h01")) @[el2_lsu_dccm_ctl.scala 220:36] + node _T_283 = bits(ld_sec_addr_lo_r_ff, 15, 0) @[el2_lsu_dccm_ctl.scala 220:62] + node _T_284 = bits(ld_sec_addr_hi_r_ff, 15, 0) @[el2_lsu_dccm_ctl.scala 220:101] + node _T_285 = mux(_T_282, _T_283, _T_284) @[el2_lsu_dccm_ctl.scala 220:8] + node _T_286 = bits(io.dma_dccm_wen, 0, 0) @[el2_lsu_dccm_ctl.scala 221:25] + node _T_287 = bits(io.lsu_addr_d, 15, 0) @[el2_lsu_dccm_ctl.scala 221:45] + node _T_288 = bits(io.stbuf_addr_any, 15, 0) @[el2_lsu_dccm_ctl.scala 221:82] + node _T_289 = mux(_T_286, _T_287, _T_288) @[el2_lsu_dccm_ctl.scala 221:8] + node _T_290 = mux(_T_281, _T_285, _T_289) @[el2_lsu_dccm_ctl.scala 219:28] + io.dccm_wr_addr_lo <= _T_290 @[el2_lsu_dccm_ctl.scala 219:22] + node _T_291 = bits(io.ld_single_ecc_error_r_ff, 0, 0) @[el2_lsu_dccm_ctl.scala 222:57] + node _T_292 = eq(ld_single_ecc_error_hi_r_ff, UInt<1>("h01")) @[el2_lsu_dccm_ctl.scala 223:36] + node _T_293 = bits(ld_sec_addr_hi_r_ff, 15, 0) @[el2_lsu_dccm_ctl.scala 223:63] + node _T_294 = bits(ld_sec_addr_lo_r_ff, 15, 0) @[el2_lsu_dccm_ctl.scala 223:103] + node _T_295 = mux(_T_292, _T_293, _T_294) @[el2_lsu_dccm_ctl.scala 223:8] + node _T_296 = bits(io.dma_dccm_wen, 0, 0) @[el2_lsu_dccm_ctl.scala 224:25] + node _T_297 = bits(io.end_addr_d, 15, 0) @[el2_lsu_dccm_ctl.scala 224:46] + node _T_298 = bits(io.stbuf_addr_any, 15, 0) @[el2_lsu_dccm_ctl.scala 224:83] + node _T_299 = mux(_T_296, _T_297, _T_298) @[el2_lsu_dccm_ctl.scala 224:8] + node _T_300 = mux(_T_291, _T_295, _T_299) @[el2_lsu_dccm_ctl.scala 222:28] + io.dccm_wr_addr_hi <= _T_300 @[el2_lsu_dccm_ctl.scala 222:22] + node _T_301 = bits(io.lsu_addr_d, 15, 0) @[el2_lsu_dccm_ctl.scala 225:38] + io.dccm_rd_addr_lo <= _T_301 @[el2_lsu_dccm_ctl.scala 225:22] + node _T_302 = bits(io.end_addr_d, 15, 0) @[el2_lsu_dccm_ctl.scala 226:38] + io.dccm_rd_addr_hi <= _T_302 @[el2_lsu_dccm_ctl.scala 226:22] + node _T_303 = bits(io.ld_single_ecc_error_r_ff, 0, 0) @[el2_lsu_dccm_ctl.scala 227:57] + node _T_304 = eq(ld_single_ecc_error_lo_r_ff, UInt<1>("h00")) @[el2_lsu_dccm_ctl.scala 228:36] + node _T_305 = bits(io.sec_data_ecc_lo_r_ff, 6, 0) @[el2_lsu_dccm_ctl.scala 228:70] + node _T_306 = bits(io.sec_data_lo_r_ff, 31, 0) @[el2_lsu_dccm_ctl.scala 228:114] + node _T_307 = cat(_T_305, _T_306) @[Cat.scala 29:58] + node _T_308 = bits(io.sec_data_ecc_hi_r_ff, 6, 0) @[el2_lsu_dccm_ctl.scala 229:34] + node _T_309 = bits(io.sec_data_hi_r_ff, 31, 0) @[el2_lsu_dccm_ctl.scala 229:78] + node _T_310 = cat(_T_308, _T_309) @[Cat.scala 29:58] + node _T_311 = mux(_T_304, _T_307, _T_310) @[el2_lsu_dccm_ctl.scala 228:8] + node _T_312 = bits(io.dma_dccm_wen, 0, 0) @[el2_lsu_dccm_ctl.scala 230:25] + node _T_313 = bits(io.dma_dccm_wdata_ecc_lo, 6, 0) @[el2_lsu_dccm_ctl.scala 230:60] + node _T_314 = bits(io.dma_dccm_wdata_lo, 31, 0) @[el2_lsu_dccm_ctl.scala 230:105] + node _T_315 = cat(_T_313, _T_314) @[Cat.scala 29:58] + node _T_316 = bits(io.stbuf_ecc_any, 6, 0) @[el2_lsu_dccm_ctl.scala 231:27] + node _T_317 = bits(io.stbuf_data_any, 31, 0) @[el2_lsu_dccm_ctl.scala 231:69] + node _T_318 = cat(_T_316, _T_317) @[Cat.scala 29:58] + node _T_319 = mux(_T_312, _T_315, _T_318) @[el2_lsu_dccm_ctl.scala 230:8] + node _T_320 = mux(_T_303, _T_311, _T_319) @[el2_lsu_dccm_ctl.scala 227:28] + io.dccm_wr_data_lo <= _T_320 @[el2_lsu_dccm_ctl.scala 227:22] + node _T_321 = bits(io.ld_single_ecc_error_r_ff, 0, 0) @[el2_lsu_dccm_ctl.scala 233:57] + node _T_322 = eq(ld_single_ecc_error_hi_r_ff, UInt<1>("h00")) @[el2_lsu_dccm_ctl.scala 234:36] + node _T_323 = bits(io.sec_data_ecc_hi_r_ff, 6, 0) @[el2_lsu_dccm_ctl.scala 234:71] + node _T_324 = bits(io.sec_data_hi_r_ff, 31, 0) @[el2_lsu_dccm_ctl.scala 234:115] + node _T_325 = cat(_T_323, _T_324) @[Cat.scala 29:58] + node _T_326 = bits(io.sec_data_ecc_lo_r_ff, 6, 0) @[el2_lsu_dccm_ctl.scala 235:34] + node _T_327 = bits(io.sec_data_lo_r_ff, 31, 0) @[el2_lsu_dccm_ctl.scala 235:78] + node _T_328 = cat(_T_326, _T_327) @[Cat.scala 29:58] + node _T_329 = mux(_T_322, _T_325, _T_328) @[el2_lsu_dccm_ctl.scala 234:8] + node _T_330 = bits(io.dma_dccm_wen, 0, 0) @[el2_lsu_dccm_ctl.scala 236:25] + node _T_331 = bits(io.dma_dccm_wdata_ecc_hi, 6, 0) @[el2_lsu_dccm_ctl.scala 236:61] + node _T_332 = bits(io.dma_dccm_wdata_hi, 31, 0) @[el2_lsu_dccm_ctl.scala 236:106] + node _T_333 = cat(_T_331, _T_332) @[Cat.scala 29:58] + node _T_334 = bits(io.stbuf_ecc_any, 6, 0) @[el2_lsu_dccm_ctl.scala 237:27] + node _T_335 = bits(io.stbuf_data_any, 31, 0) @[el2_lsu_dccm_ctl.scala 237:69] + node _T_336 = cat(_T_334, _T_335) @[Cat.scala 29:58] + node _T_337 = mux(_T_330, _T_333, _T_336) @[el2_lsu_dccm_ctl.scala 236:8] + node _T_338 = mux(_T_321, _T_329, _T_337) @[el2_lsu_dccm_ctl.scala 233:28] + io.dccm_wr_data_hi <= _T_338 @[el2_lsu_dccm_ctl.scala 233:22] + node _T_339 = bits(io.lsu_pkt_m.store, 0, 0) @[Bitwise.scala 72:15] + node _T_340 = mux(_T_339, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_341 = bits(io.lsu_pkt_m.by, 0, 0) @[Bitwise.scala 72:15] + node _T_342 = mux(_T_341, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_343 = and(_T_342, UInt<4>("h01")) @[el2_lsu_dccm_ctl.scala 240:84] + node _T_344 = bits(io.lsu_pkt_m.half, 0, 0) @[Bitwise.scala 72:15] + node _T_345 = mux(_T_344, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_346 = and(_T_345, UInt<4>("h03")) @[el2_lsu_dccm_ctl.scala 241:33] + node _T_347 = or(_T_343, _T_346) @[el2_lsu_dccm_ctl.scala 240:97] + node _T_348 = bits(io.lsu_pkt_m.word, 0, 0) @[Bitwise.scala 72:15] + node _T_349 = mux(_T_348, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_350 = and(_T_349, UInt<4>("h0f")) @[el2_lsu_dccm_ctl.scala 242:33] + node _T_351 = or(_T_347, _T_350) @[el2_lsu_dccm_ctl.scala 241:46] + node store_byteen_m = and(_T_340, _T_351) @[el2_lsu_dccm_ctl.scala 240:53] + node _T_352 = bits(io.lsu_pkt_r.store, 0, 0) @[Bitwise.scala 72:15] + node _T_353 = mux(_T_352, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_354 = bits(io.lsu_pkt_r.by, 0, 0) @[Bitwise.scala 72:15] + node _T_355 = mux(_T_354, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_356 = and(_T_355, UInt<4>("h01")) @[el2_lsu_dccm_ctl.scala 243:84] + node _T_357 = bits(io.lsu_pkt_r.half, 0, 0) @[Bitwise.scala 72:15] + node _T_358 = mux(_T_357, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_359 = and(_T_358, UInt<4>("h03")) @[el2_lsu_dccm_ctl.scala 244:33] + node _T_360 = or(_T_356, _T_359) @[el2_lsu_dccm_ctl.scala 243:97] + node _T_361 = bits(io.lsu_pkt_r.word, 0, 0) @[Bitwise.scala 72:15] + node _T_362 = mux(_T_361, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_363 = and(_T_362, UInt<4>("h0f")) @[el2_lsu_dccm_ctl.scala 245:33] + node _T_364 = or(_T_360, _T_363) @[el2_lsu_dccm_ctl.scala 244:46] + node store_byteen_r = and(_T_353, _T_364) @[el2_lsu_dccm_ctl.scala 243:53] + node _T_365 = bits(store_byteen_m, 3, 0) @[el2_lsu_dccm_ctl.scala 246:55] + node _T_366 = cat(UInt<4>("h00"), _T_365) @[Cat.scala 29:58] + node _T_367 = bits(io.lsu_addr_m, 1, 0) @[el2_lsu_dccm_ctl.scala 246:78] + node store_byteen_ext_m = dshl(_T_366, _T_367) @[el2_lsu_dccm_ctl.scala 246:62] + node _T_368 = bits(store_byteen_r, 3, 0) @[el2_lsu_dccm_ctl.scala 247:55] + node _T_369 = cat(UInt<4>("h00"), _T_368) @[Cat.scala 29:58] + node _T_370 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_dccm_ctl.scala 247:78] + node store_byteen_ext_r = dshl(_T_369, _T_370) @[el2_lsu_dccm_ctl.scala 247:62] + node _T_371 = bits(io.stbuf_addr_any, 15, 2) @[el2_lsu_dccm_ctl.scala 250:51] + node _T_372 = bits(io.lsu_addr_m, 15, 2) @[el2_lsu_dccm_ctl.scala 250:88] + node _T_373 = eq(_T_371, _T_372) @[el2_lsu_dccm_ctl.scala 250:71] + node dccm_wr_bypass_d_m_lo = and(_T_373, io.addr_in_dccm_m) @[el2_lsu_dccm_ctl.scala 250:109] + node _T_374 = bits(io.stbuf_addr_any, 15, 2) @[el2_lsu_dccm_ctl.scala 251:51] + node _T_375 = bits(io.end_addr_m, 15, 2) @[el2_lsu_dccm_ctl.scala 251:88] + node _T_376 = eq(_T_374, _T_375) @[el2_lsu_dccm_ctl.scala 251:71] + node dccm_wr_bypass_d_m_hi = and(_T_376, io.addr_in_dccm_m) @[el2_lsu_dccm_ctl.scala 251:109] + node _T_377 = bits(io.stbuf_addr_any, 15, 2) @[el2_lsu_dccm_ctl.scala 253:51] + node _T_378 = bits(io.lsu_addr_r, 15, 2) @[el2_lsu_dccm_ctl.scala 253:88] + node _T_379 = eq(_T_377, _T_378) @[el2_lsu_dccm_ctl.scala 253:71] + node dccm_wr_bypass_d_r_lo = and(_T_379, io.addr_in_dccm_r) @[el2_lsu_dccm_ctl.scala 253:109] + node _T_380 = bits(io.stbuf_addr_any, 15, 2) @[el2_lsu_dccm_ctl.scala 254:51] + node _T_381 = bits(io.end_addr_r, 15, 2) @[el2_lsu_dccm_ctl.scala 254:88] + node _T_382 = eq(_T_380, _T_381) @[el2_lsu_dccm_ctl.scala 254:71] + node dccm_wr_bypass_d_r_hi = and(_T_382, io.addr_in_dccm_r) @[el2_lsu_dccm_ctl.scala 254:109] + wire dccm_wr_bypass_d_m_hi_Q : UInt<1> + dccm_wr_bypass_d_m_hi_Q <= UInt<1>("h00") + wire dccm_wr_bypass_d_m_lo_Q : UInt<1> + dccm_wr_bypass_d_m_lo_Q <= UInt<1>("h00") + wire dccm_wren_Q : UInt<1> + dccm_wren_Q <= UInt<1>("h00") + wire dccm_wr_data_Q : UInt<32> + dccm_wr_data_Q <= UInt<32>("h00") + wire store_data_pre_r : UInt<64> + store_data_pre_r <= UInt<64>("h00") + wire store_data_pre_hi_r : UInt<32> + store_data_pre_hi_r <= UInt<32>("h00") + wire store_data_pre_lo_r : UInt<32> + store_data_pre_lo_r <= UInt<32>("h00") + wire store_data_pre_m : UInt<64> + store_data_pre_m <= UInt<64>("h00") + wire store_data_hi_m : UInt<32> + store_data_hi_m <= UInt<32>("h00") + wire store_data_lo_m : UInt<32> + store_data_lo_m <= UInt<32>("h00") + node _T_383 = mux(UInt<1>("h00"), UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_384 = bits(io.store_data_m, 31, 0) @[el2_lsu_dccm_ctl.scala 287:64] + node _T_385 = cat(_T_383, _T_384) @[Cat.scala 29:58] + node _T_386 = bits(io.lsu_addr_m, 1, 0) @[el2_lsu_dccm_ctl.scala 287:92] + node _T_387 = mul(UInt<4>("h08"), _T_386) @[el2_lsu_dccm_ctl.scala 287:78] + node _T_388 = dshl(_T_385, _T_387) @[el2_lsu_dccm_ctl.scala 287:72] + store_data_pre_m <= _T_388 @[el2_lsu_dccm_ctl.scala 287:29] + node _T_389 = bits(store_data_pre_m, 63, 32) @[el2_lsu_dccm_ctl.scala 288:48] + store_data_hi_m <= _T_389 @[el2_lsu_dccm_ctl.scala 288:29] + node _T_390 = bits(store_data_pre_m, 31, 0) @[el2_lsu_dccm_ctl.scala 289:48] + store_data_lo_m <= _T_390 @[el2_lsu_dccm_ctl.scala 289:29] + node _T_391 = bits(store_byteen_ext_m, 0, 0) @[el2_lsu_dccm_ctl.scala 290:123] + node _T_392 = bits(_T_391, 0, 0) @[el2_lsu_dccm_ctl.scala 290:127] + node _T_393 = bits(store_data_lo_m, 7, 0) @[el2_lsu_dccm_ctl.scala 290:151] + node _T_394 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_m_lo) @[el2_lsu_dccm_ctl.scala 290:195] + node _T_395 = bits(_T_394, 0, 0) @[el2_lsu_dccm_ctl.scala 290:221] + node _T_396 = bits(io.stbuf_data_any, 7, 0) @[el2_lsu_dccm_ctl.scala 290:246] + node _T_397 = bits(io.sec_data_lo_m, 7, 0) @[el2_lsu_dccm_ctl.scala 290:276] + node _T_398 = mux(_T_395, _T_396, _T_397) @[el2_lsu_dccm_ctl.scala 290:169] + node _T_399 = mux(_T_392, _T_393, _T_398) @[el2_lsu_dccm_ctl.scala 290:104] + node _T_400 = bits(store_byteen_ext_m, 1, 1) @[el2_lsu_dccm_ctl.scala 290:123] + node _T_401 = bits(_T_400, 0, 0) @[el2_lsu_dccm_ctl.scala 290:127] + node _T_402 = bits(store_data_lo_m, 15, 8) @[el2_lsu_dccm_ctl.scala 290:151] + node _T_403 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_m_lo) @[el2_lsu_dccm_ctl.scala 290:195] + node _T_404 = bits(_T_403, 0, 0) @[el2_lsu_dccm_ctl.scala 290:221] + node _T_405 = bits(io.stbuf_data_any, 15, 8) @[el2_lsu_dccm_ctl.scala 290:246] + node _T_406 = bits(io.sec_data_lo_m, 15, 8) @[el2_lsu_dccm_ctl.scala 290:276] + node _T_407 = mux(_T_404, _T_405, _T_406) @[el2_lsu_dccm_ctl.scala 290:169] + node _T_408 = mux(_T_401, _T_402, _T_407) @[el2_lsu_dccm_ctl.scala 290:104] + node _T_409 = bits(store_byteen_ext_m, 2, 2) @[el2_lsu_dccm_ctl.scala 290:123] + node _T_410 = bits(_T_409, 0, 0) @[el2_lsu_dccm_ctl.scala 290:127] + node _T_411 = bits(store_data_lo_m, 23, 16) @[el2_lsu_dccm_ctl.scala 290:151] + node _T_412 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_m_lo) @[el2_lsu_dccm_ctl.scala 290:195] + node _T_413 = bits(_T_412, 0, 0) @[el2_lsu_dccm_ctl.scala 290:221] + node _T_414 = bits(io.stbuf_data_any, 23, 16) @[el2_lsu_dccm_ctl.scala 290:246] + node _T_415 = bits(io.sec_data_lo_m, 23, 16) @[el2_lsu_dccm_ctl.scala 290:276] + node _T_416 = mux(_T_413, _T_414, _T_415) @[el2_lsu_dccm_ctl.scala 290:169] + node _T_417 = mux(_T_410, _T_411, _T_416) @[el2_lsu_dccm_ctl.scala 290:104] + node _T_418 = bits(store_byteen_ext_m, 3, 3) @[el2_lsu_dccm_ctl.scala 290:123] + node _T_419 = bits(_T_418, 0, 0) @[el2_lsu_dccm_ctl.scala 290:127] + node _T_420 = bits(store_data_lo_m, 31, 24) @[el2_lsu_dccm_ctl.scala 290:151] + node _T_421 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_m_lo) @[el2_lsu_dccm_ctl.scala 290:195] + node _T_422 = bits(_T_421, 0, 0) @[el2_lsu_dccm_ctl.scala 290:221] + node _T_423 = bits(io.stbuf_data_any, 31, 24) @[el2_lsu_dccm_ctl.scala 290:246] + node _T_424 = bits(io.sec_data_lo_m, 31, 24) @[el2_lsu_dccm_ctl.scala 290:276] + node _T_425 = mux(_T_422, _T_423, _T_424) @[el2_lsu_dccm_ctl.scala 290:169] + node _T_426 = mux(_T_419, _T_420, _T_425) @[el2_lsu_dccm_ctl.scala 290:104] + wire _T_427 : UInt<8>[4] @[el2_lsu_dccm_ctl.scala 290:96] + _T_427[0] <= _T_399 @[el2_lsu_dccm_ctl.scala 290:96] + _T_427[1] <= _T_408 @[el2_lsu_dccm_ctl.scala 290:96] + _T_427[2] <= _T_417 @[el2_lsu_dccm_ctl.scala 290:96] + _T_427[3] <= _T_426 @[el2_lsu_dccm_ctl.scala 290:96] + node _T_428 = cat(_T_427[2], _T_427[3]) @[Cat.scala 29:58] + node _T_429 = cat(_T_427[0], _T_427[1]) @[Cat.scala 29:58] + node _T_430 = cat(_T_429, _T_428) @[Cat.scala 29:58] + reg _T_431 : UInt, io.lsu_store_c1_r_clk @[el2_lsu_dccm_ctl.scala 290:72] + _T_431 <= _T_430 @[el2_lsu_dccm_ctl.scala 290:72] + io.store_data_lo_r <= _T_431 @[el2_lsu_dccm_ctl.scala 290:29] + node _T_432 = bits(store_byteen_ext_m, 4, 4) @[el2_lsu_dccm_ctl.scala 291:123] + node _T_433 = bits(_T_432, 0, 0) @[el2_lsu_dccm_ctl.scala 291:129] + node _T_434 = bits(store_data_hi_m, 7, 0) @[el2_lsu_dccm_ctl.scala 291:151] + node _T_435 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_m_hi) @[el2_lsu_dccm_ctl.scala 291:195] + node _T_436 = bits(_T_435, 0, 0) @[el2_lsu_dccm_ctl.scala 291:221] + node _T_437 = bits(io.stbuf_data_any, 7, 0) @[el2_lsu_dccm_ctl.scala 291:246] + node _T_438 = bits(io.sec_data_hi_m, 7, 0) @[el2_lsu_dccm_ctl.scala 291:276] + node _T_439 = mux(_T_436, _T_437, _T_438) @[el2_lsu_dccm_ctl.scala 291:169] + node _T_440 = mux(_T_433, _T_434, _T_439) @[el2_lsu_dccm_ctl.scala 291:104] + node _T_441 = bits(store_byteen_ext_m, 5, 5) @[el2_lsu_dccm_ctl.scala 291:123] + node _T_442 = bits(_T_441, 0, 0) @[el2_lsu_dccm_ctl.scala 291:129] + node _T_443 = bits(store_data_hi_m, 15, 8) @[el2_lsu_dccm_ctl.scala 291:151] + node _T_444 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_m_hi) @[el2_lsu_dccm_ctl.scala 291:195] + node _T_445 = bits(_T_444, 0, 0) @[el2_lsu_dccm_ctl.scala 291:221] + node _T_446 = bits(io.stbuf_data_any, 15, 8) @[el2_lsu_dccm_ctl.scala 291:246] + node _T_447 = bits(io.sec_data_hi_m, 15, 8) @[el2_lsu_dccm_ctl.scala 291:276] + node _T_448 = mux(_T_445, _T_446, _T_447) @[el2_lsu_dccm_ctl.scala 291:169] + node _T_449 = mux(_T_442, _T_443, _T_448) @[el2_lsu_dccm_ctl.scala 291:104] + node _T_450 = bits(store_byteen_ext_m, 6, 6) @[el2_lsu_dccm_ctl.scala 291:123] + node _T_451 = bits(_T_450, 0, 0) @[el2_lsu_dccm_ctl.scala 291:129] + node _T_452 = bits(store_data_hi_m, 23, 16) @[el2_lsu_dccm_ctl.scala 291:151] + node _T_453 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_m_hi) @[el2_lsu_dccm_ctl.scala 291:195] + node _T_454 = bits(_T_453, 0, 0) @[el2_lsu_dccm_ctl.scala 291:221] + node _T_455 = bits(io.stbuf_data_any, 23, 16) @[el2_lsu_dccm_ctl.scala 291:246] + node _T_456 = bits(io.sec_data_hi_m, 23, 16) @[el2_lsu_dccm_ctl.scala 291:276] + node _T_457 = mux(_T_454, _T_455, _T_456) @[el2_lsu_dccm_ctl.scala 291:169] + node _T_458 = mux(_T_451, _T_452, _T_457) @[el2_lsu_dccm_ctl.scala 291:104] + node _T_459 = bits(store_byteen_ext_m, 7, 7) @[el2_lsu_dccm_ctl.scala 291:123] + node _T_460 = bits(_T_459, 0, 0) @[el2_lsu_dccm_ctl.scala 291:129] + node _T_461 = bits(store_data_hi_m, 31, 24) @[el2_lsu_dccm_ctl.scala 291:151] + node _T_462 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_m_hi) @[el2_lsu_dccm_ctl.scala 291:195] + node _T_463 = bits(_T_462, 0, 0) @[el2_lsu_dccm_ctl.scala 291:221] + node _T_464 = bits(io.stbuf_data_any, 31, 24) @[el2_lsu_dccm_ctl.scala 291:246] + node _T_465 = bits(io.sec_data_hi_m, 31, 24) @[el2_lsu_dccm_ctl.scala 291:276] + node _T_466 = mux(_T_463, _T_464, _T_465) @[el2_lsu_dccm_ctl.scala 291:169] + node _T_467 = mux(_T_460, _T_461, _T_466) @[el2_lsu_dccm_ctl.scala 291:104] + wire _T_468 : UInt<8>[4] @[el2_lsu_dccm_ctl.scala 291:96] + _T_468[0] <= _T_440 @[el2_lsu_dccm_ctl.scala 291:96] + _T_468[1] <= _T_449 @[el2_lsu_dccm_ctl.scala 291:96] + _T_468[2] <= _T_458 @[el2_lsu_dccm_ctl.scala 291:96] + _T_468[3] <= _T_467 @[el2_lsu_dccm_ctl.scala 291:96] + node _T_469 = cat(_T_468[2], _T_468[3]) @[Cat.scala 29:58] + node _T_470 = cat(_T_468[0], _T_468[1]) @[Cat.scala 29:58] + node _T_471 = cat(_T_470, _T_469) @[Cat.scala 29:58] + reg _T_472 : UInt, io.lsu_store_c1_r_clk @[el2_lsu_dccm_ctl.scala 291:72] + _T_472 <= _T_471 @[el2_lsu_dccm_ctl.scala 291:72] + io.store_data_hi_r <= _T_472 @[el2_lsu_dccm_ctl.scala 291:29] + node _T_473 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_r_lo) @[el2_lsu_dccm_ctl.scala 292:89] + node _T_474 = bits(store_byteen_ext_r, 0, 0) @[el2_lsu_dccm_ctl.scala 292:134] + node _T_475 = not(_T_474) @[el2_lsu_dccm_ctl.scala 292:115] + node _T_476 = and(_T_473, _T_475) @[el2_lsu_dccm_ctl.scala 292:113] + node _T_477 = bits(_T_476, 0, 0) @[el2_lsu_dccm_ctl.scala 292:139] + node _T_478 = bits(io.stbuf_data_any, 7, 0) @[el2_lsu_dccm_ctl.scala 292:163] + node _T_479 = bits(io.store_data_lo_r, 7, 0) @[el2_lsu_dccm_ctl.scala 292:195] + node _T_480 = mux(_T_477, _T_478, _T_479) @[el2_lsu_dccm_ctl.scala 292:63] + node _T_481 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_r_lo) @[el2_lsu_dccm_ctl.scala 292:89] + node _T_482 = bits(store_byteen_ext_r, 1, 1) @[el2_lsu_dccm_ctl.scala 292:134] + node _T_483 = not(_T_482) @[el2_lsu_dccm_ctl.scala 292:115] + node _T_484 = and(_T_481, _T_483) @[el2_lsu_dccm_ctl.scala 292:113] + node _T_485 = bits(_T_484, 0, 0) @[el2_lsu_dccm_ctl.scala 292:139] + node _T_486 = bits(io.stbuf_data_any, 15, 8) @[el2_lsu_dccm_ctl.scala 292:163] + node _T_487 = bits(io.store_data_lo_r, 15, 8) @[el2_lsu_dccm_ctl.scala 292:195] + node _T_488 = mux(_T_485, _T_486, _T_487) @[el2_lsu_dccm_ctl.scala 292:63] + node _T_489 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_r_lo) @[el2_lsu_dccm_ctl.scala 292:89] + node _T_490 = bits(store_byteen_ext_r, 2, 2) @[el2_lsu_dccm_ctl.scala 292:134] + node _T_491 = not(_T_490) @[el2_lsu_dccm_ctl.scala 292:115] + node _T_492 = and(_T_489, _T_491) @[el2_lsu_dccm_ctl.scala 292:113] + node _T_493 = bits(_T_492, 0, 0) @[el2_lsu_dccm_ctl.scala 292:139] + node _T_494 = bits(io.stbuf_data_any, 23, 16) @[el2_lsu_dccm_ctl.scala 292:163] + node _T_495 = bits(io.store_data_lo_r, 23, 16) @[el2_lsu_dccm_ctl.scala 292:195] + node _T_496 = mux(_T_493, _T_494, _T_495) @[el2_lsu_dccm_ctl.scala 292:63] + node _T_497 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_r_lo) @[el2_lsu_dccm_ctl.scala 292:89] + node _T_498 = bits(store_byteen_ext_r, 3, 3) @[el2_lsu_dccm_ctl.scala 292:134] + node _T_499 = not(_T_498) @[el2_lsu_dccm_ctl.scala 292:115] + node _T_500 = and(_T_497, _T_499) @[el2_lsu_dccm_ctl.scala 292:113] + node _T_501 = bits(_T_500, 0, 0) @[el2_lsu_dccm_ctl.scala 292:139] + node _T_502 = bits(io.stbuf_data_any, 31, 24) @[el2_lsu_dccm_ctl.scala 292:163] + node _T_503 = bits(io.store_data_lo_r, 31, 24) @[el2_lsu_dccm_ctl.scala 292:195] + node _T_504 = mux(_T_501, _T_502, _T_503) @[el2_lsu_dccm_ctl.scala 292:63] + wire _T_505 : UInt<8>[4] @[el2_lsu_dccm_ctl.scala 292:55] + _T_505[0] <= _T_480 @[el2_lsu_dccm_ctl.scala 292:55] + _T_505[1] <= _T_488 @[el2_lsu_dccm_ctl.scala 292:55] + _T_505[2] <= _T_496 @[el2_lsu_dccm_ctl.scala 292:55] + _T_505[3] <= _T_504 @[el2_lsu_dccm_ctl.scala 292:55] + node _T_506 = cat(_T_505[2], _T_505[3]) @[Cat.scala 29:58] + node _T_507 = cat(_T_505[0], _T_505[1]) @[Cat.scala 29:58] + node _T_508 = cat(_T_507, _T_506) @[Cat.scala 29:58] + io.store_datafn_lo_r <= _T_508 @[el2_lsu_dccm_ctl.scala 292:29] + node _T_509 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_r_lo) @[el2_lsu_dccm_ctl.scala 293:89] + node _T_510 = bits(store_byteen_ext_r, 0, 0) @[el2_lsu_dccm_ctl.scala 293:134] + node _T_511 = not(_T_510) @[el2_lsu_dccm_ctl.scala 293:115] + node _T_512 = and(_T_509, _T_511) @[el2_lsu_dccm_ctl.scala 293:113] + node _T_513 = bits(_T_512, 0, 0) @[el2_lsu_dccm_ctl.scala 293:139] + node _T_514 = bits(io.stbuf_data_any, 7, 0) @[el2_lsu_dccm_ctl.scala 293:163] + node _T_515 = bits(io.store_data_hi_r, 7, 0) @[el2_lsu_dccm_ctl.scala 293:195] + node _T_516 = mux(_T_513, _T_514, _T_515) @[el2_lsu_dccm_ctl.scala 293:63] + node _T_517 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_r_lo) @[el2_lsu_dccm_ctl.scala 293:89] + node _T_518 = bits(store_byteen_ext_r, 1, 1) @[el2_lsu_dccm_ctl.scala 293:134] + node _T_519 = not(_T_518) @[el2_lsu_dccm_ctl.scala 293:115] + node _T_520 = and(_T_517, _T_519) @[el2_lsu_dccm_ctl.scala 293:113] + node _T_521 = bits(_T_520, 0, 0) @[el2_lsu_dccm_ctl.scala 293:139] + node _T_522 = bits(io.stbuf_data_any, 15, 8) @[el2_lsu_dccm_ctl.scala 293:163] + node _T_523 = bits(io.store_data_hi_r, 15, 8) @[el2_lsu_dccm_ctl.scala 293:195] + node _T_524 = mux(_T_521, _T_522, _T_523) @[el2_lsu_dccm_ctl.scala 293:63] + node _T_525 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_r_lo) @[el2_lsu_dccm_ctl.scala 293:89] + node _T_526 = bits(store_byteen_ext_r, 2, 2) @[el2_lsu_dccm_ctl.scala 293:134] + node _T_527 = not(_T_526) @[el2_lsu_dccm_ctl.scala 293:115] + node _T_528 = and(_T_525, _T_527) @[el2_lsu_dccm_ctl.scala 293:113] + node _T_529 = bits(_T_528, 0, 0) @[el2_lsu_dccm_ctl.scala 293:139] + node _T_530 = bits(io.stbuf_data_any, 23, 16) @[el2_lsu_dccm_ctl.scala 293:163] + node _T_531 = bits(io.store_data_hi_r, 23, 16) @[el2_lsu_dccm_ctl.scala 293:195] + node _T_532 = mux(_T_529, _T_530, _T_531) @[el2_lsu_dccm_ctl.scala 293:63] + node _T_533 = and(io.lsu_stbuf_commit_any, dccm_wr_bypass_d_r_lo) @[el2_lsu_dccm_ctl.scala 293:89] + node _T_534 = bits(store_byteen_ext_r, 3, 3) @[el2_lsu_dccm_ctl.scala 293:134] + node _T_535 = not(_T_534) @[el2_lsu_dccm_ctl.scala 293:115] + node _T_536 = and(_T_533, _T_535) @[el2_lsu_dccm_ctl.scala 293:113] + node _T_537 = bits(_T_536, 0, 0) @[el2_lsu_dccm_ctl.scala 293:139] + node _T_538 = bits(io.stbuf_data_any, 31, 24) @[el2_lsu_dccm_ctl.scala 293:163] + node _T_539 = bits(io.store_data_hi_r, 31, 24) @[el2_lsu_dccm_ctl.scala 293:195] + node _T_540 = mux(_T_537, _T_538, _T_539) @[el2_lsu_dccm_ctl.scala 293:63] + wire _T_541 : UInt<8>[4] @[el2_lsu_dccm_ctl.scala 293:55] + _T_541[0] <= _T_516 @[el2_lsu_dccm_ctl.scala 293:55] + _T_541[1] <= _T_524 @[el2_lsu_dccm_ctl.scala 293:55] + _T_541[2] <= _T_532 @[el2_lsu_dccm_ctl.scala 293:55] + _T_541[3] <= _T_540 @[el2_lsu_dccm_ctl.scala 293:55] + node _T_542 = cat(_T_541[2], _T_541[3]) @[Cat.scala 29:58] + node _T_543 = cat(_T_541[0], _T_541[1]) @[Cat.scala 29:58] + node _T_544 = cat(_T_543, _T_542) @[Cat.scala 29:58] + io.store_datafn_hi_r <= _T_544 @[el2_lsu_dccm_ctl.scala 293:29] + node _T_545 = bits(io.store_data_hi_r, 31, 0) @[el2_lsu_dccm_ctl.scala 294:63] + node _T_546 = bits(io.store_data_lo_r, 31, 0) @[el2_lsu_dccm_ctl.scala 294:88] + node _T_547 = cat(_T_545, _T_546) @[Cat.scala 29:58] + node _T_548 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_dccm_ctl.scala 294:116] + node _T_549 = mul(UInt<4>("h08"), _T_548) @[el2_lsu_dccm_ctl.scala 294:102] + node _T_550 = dshr(_T_547, _T_549) @[el2_lsu_dccm_ctl.scala 294:96] + node _T_551 = cat(_T_550, _T_550) @[Cat.scala 29:58] + node _T_552 = cat(_T_551, _T_551) @[Cat.scala 29:58] + node _T_553 = cat(_T_552, _T_552) @[Cat.scala 29:58] + node _T_554 = cat(_T_553, _T_553) @[Cat.scala 29:58] + node _T_555 = cat(_T_554, _T_554) @[Cat.scala 29:58] + node _T_556 = bits(store_byteen_r, 0, 0) @[el2_lsu_dccm_ctl.scala 294:174] + node _T_557 = bits(_T_556, 0, 0) @[Bitwise.scala 72:15] + node _T_558 = mux(_T_557, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_559 = bits(store_byteen_r, 1, 1) @[el2_lsu_dccm_ctl.scala 294:174] + node _T_560 = bits(_T_559, 0, 0) @[Bitwise.scala 72:15] + node _T_561 = mux(_T_560, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_562 = bits(store_byteen_r, 2, 2) @[el2_lsu_dccm_ctl.scala 294:174] + node _T_563 = bits(_T_562, 0, 0) @[Bitwise.scala 72:15] + node _T_564 = mux(_T_563, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_565 = bits(store_byteen_r, 3, 3) @[el2_lsu_dccm_ctl.scala 294:174] + node _T_566 = bits(_T_565, 0, 0) @[Bitwise.scala 72:15] + node _T_567 = mux(_T_566, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + wire _T_568 : UInt<8>[4] @[el2_lsu_dccm_ctl.scala 294:148] + _T_568[0] <= _T_558 @[el2_lsu_dccm_ctl.scala 294:148] + _T_568[1] <= _T_561 @[el2_lsu_dccm_ctl.scala 294:148] + _T_568[2] <= _T_564 @[el2_lsu_dccm_ctl.scala 294:148] + _T_568[3] <= _T_567 @[el2_lsu_dccm_ctl.scala 294:148] + node _T_569 = cat(_T_568[2], _T_568[3]) @[Cat.scala 29:58] + node _T_570 = cat(_T_568[0], _T_568[1]) @[Cat.scala 29:58] + node _T_571 = cat(_T_570, _T_569) @[Cat.scala 29:58] + node _T_572 = and(_T_555, _T_571) @[el2_lsu_dccm_ctl.scala 294:123] + io.store_data_r <= _T_572 @[el2_lsu_dccm_ctl.scala 294:29] + node _T_573 = bits(io.dccm_rd_data_lo, 31, 0) @[el2_lsu_dccm_ctl.scala 297:48] + io.dccm_rdata_lo_m <= _T_573 @[el2_lsu_dccm_ctl.scala 297:27] + node _T_574 = bits(io.dccm_rd_data_hi, 31, 0) @[el2_lsu_dccm_ctl.scala 298:48] + io.dccm_rdata_hi_m <= _T_574 @[el2_lsu_dccm_ctl.scala 298:27] + node _T_575 = bits(io.dccm_rd_data_lo, 38, 32) @[el2_lsu_dccm_ctl.scala 299:48] + io.dccm_data_ecc_lo_m <= _T_575 @[el2_lsu_dccm_ctl.scala 299:27] + node _T_576 = bits(io.dccm_rd_data_hi, 38, 32) @[el2_lsu_dccm_ctl.scala 300:48] + io.dccm_data_ecc_hi_m <= _T_576 @[el2_lsu_dccm_ctl.scala 300:27] + node _T_577 = and(io.lsu_pkt_r.valid, io.lsu_pkt_r.store) @[el2_lsu_dccm_ctl.scala 302:50] + node _T_578 = and(_T_577, io.addr_in_pic_r) @[el2_lsu_dccm_ctl.scala 302:71] + node _T_579 = and(_T_578, io.lsu_commit_r) @[el2_lsu_dccm_ctl.scala 302:90] + node _T_580 = or(_T_579, io.dma_pic_wen) @[el2_lsu_dccm_ctl.scala 302:109] + io.picm_wren <= _T_580 @[el2_lsu_dccm_ctl.scala 302:27] + node _T_581 = and(io.lsu_pkt_d.valid, io.lsu_pkt_d.load) @[el2_lsu_dccm_ctl.scala 303:50] + node _T_582 = and(_T_581, io.addr_in_pic_d) @[el2_lsu_dccm_ctl.scala 303:71] + io.picm_rden <= _T_582 @[el2_lsu_dccm_ctl.scala 303:27] + node _T_583 = and(io.lsu_pkt_d.valid, io.lsu_pkt_d.store) @[el2_lsu_dccm_ctl.scala 304:50] + node _T_584 = and(_T_583, io.addr_in_pic_d) @[el2_lsu_dccm_ctl.scala 304:71] + io.picm_mken <= _T_584 @[el2_lsu_dccm_ctl.scala 304:27] + node _T_585 = sub(UInt<6>("h020"), UInt<1>("h01")) @[el2_lsu_dccm_ctl.scala 306:58] + node _T_586 = tail(_T_585, 1) @[el2_lsu_dccm_ctl.scala 306:58] + node _T_587 = bits(io.lsu_addr_d, 14, 0) @[el2_lsu_dccm_ctl.scala 306:88] + node _T_588 = cat(_T_586, _T_587) @[Cat.scala 29:58] + node _T_589 = or(UInt<32>("h0f00c0000"), _T_588) @[el2_lsu_dccm_ctl.scala 306:47] + io.picm_rdaddr <= _T_589 @[el2_lsu_dccm_ctl.scala 306:27] + node _T_590 = sub(UInt<6>("h020"), UInt<1>("h01")) @[el2_lsu_dccm_ctl.scala 307:58] + node _T_591 = tail(_T_590, 1) @[el2_lsu_dccm_ctl.scala 307:58] + node _T_592 = bits(io.dma_pic_wen, 0, 0) @[el2_lsu_dccm_ctl.scala 307:94] + node _T_593 = bits(io.dma_mem_addr, 14, 0) @[el2_lsu_dccm_ctl.scala 307:116] + node _T_594 = bits(io.lsu_addr_r, 14, 0) @[el2_lsu_dccm_ctl.scala 307:148] + node _T_595 = mux(_T_592, _T_593, _T_594) @[el2_lsu_dccm_ctl.scala 307:78] + node _T_596 = cat(_T_591, _T_595) @[Cat.scala 29:58] + node _T_597 = or(UInt<32>("h0f00c0000"), _T_596) @[el2_lsu_dccm_ctl.scala 307:47] + io.picm_wraddr <= _T_597 @[el2_lsu_dccm_ctl.scala 307:27] + node _T_598 = bits(picm_rd_data_m, 31, 0) @[el2_lsu_dccm_ctl.scala 308:44] + io.picm_mask_data_m <= _T_598 @[el2_lsu_dccm_ctl.scala 308:27] + node _T_599 = bits(io.dma_pic_wen, 0, 0) @[el2_lsu_dccm_ctl.scala 309:49] + node _T_600 = bits(io.dma_mem_wdata, 31, 0) @[el2_lsu_dccm_ctl.scala 309:72] + node _T_601 = bits(io.store_datafn_lo_r, 31, 0) @[el2_lsu_dccm_ctl.scala 309:99] + node _T_602 = mux(_T_599, _T_600, _T_601) @[el2_lsu_dccm_ctl.scala 309:33] + io.picm_wr_data <= _T_602 @[el2_lsu_dccm_ctl.scala 309:27] + reg _T_603 : UInt, io.lsu_c2_m_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_dccm_ctl.scala 312:61] + _T_603 <= lsu_dccm_rden_d @[el2_lsu_dccm_ctl.scala 312:61] + io.lsu_dccm_rden_m <= _T_603 @[el2_lsu_dccm_ctl.scala 312:24] + reg _T_604 : UInt, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_dccm_ctl.scala 313:61] + _T_604 <= io.lsu_dccm_rden_m @[el2_lsu_dccm_ctl.scala 313:61] + io.lsu_dccm_rden_r <= _T_604 @[el2_lsu_dccm_ctl.scala 313:24] + diff --git a/el2_lsu_dccm_ctl.v b/el2_lsu_dccm_ctl.v new file mode 100644 index 00000000..f1f231b5 --- /dev/null +++ b/el2_lsu_dccm_ctl.v @@ -0,0 +1,621 @@ +module rvclkhdr( + output io_l1clk, + input io_clk, + input io_en, + input io_scan_mode +); + wire clkhdr_Q; // @[beh_lib.scala 330:26] + wire clkhdr_CK; // @[beh_lib.scala 330:26] + wire clkhdr_EN; // @[beh_lib.scala 330:26] + wire clkhdr_SE; // @[beh_lib.scala 330:26] + TEC_RV_ICG clkhdr ( // @[beh_lib.scala 330:26] + .Q(clkhdr_Q), + .CK(clkhdr_CK), + .EN(clkhdr_EN), + .SE(clkhdr_SE) + ); + assign io_l1clk = clkhdr_Q; // @[beh_lib.scala 331:14] + assign clkhdr_CK = io_clk; // @[beh_lib.scala 332:18] + assign clkhdr_EN = io_en; // @[beh_lib.scala 333:18] + assign clkhdr_SE = io_scan_mode; // @[beh_lib.scala 334:18] +endmodule +module el2_lsu_dccm_ctl( + input clock, + input reset, + input io_lsu_c2_m_clk, + input io_lsu_c2_r_clk, + input io_lsu_free_c2_clk, + input io_lsu_c1_r_clk, + input io_lsu_store_c1_r_clk, + input io_clk, + input io_lsu_pkt_d_fast_int, + input io_lsu_pkt_d_by, + input io_lsu_pkt_d_half, + input io_lsu_pkt_d_word, + input io_lsu_pkt_d_dword, + input io_lsu_pkt_d_load, + input io_lsu_pkt_d_store, + input io_lsu_pkt_d_unsign, + input io_lsu_pkt_d_dma, + input io_lsu_pkt_d_store_data_bypass_d, + input io_lsu_pkt_d_load_ldst_bypass_d, + input io_lsu_pkt_d_store_data_bypass_m, + input io_lsu_pkt_d_valid, + input io_lsu_pkt_m_fast_int, + input io_lsu_pkt_m_by, + input io_lsu_pkt_m_half, + input io_lsu_pkt_m_word, + input io_lsu_pkt_m_dword, + input io_lsu_pkt_m_load, + input io_lsu_pkt_m_store, + input io_lsu_pkt_m_unsign, + input io_lsu_pkt_m_dma, + input io_lsu_pkt_m_store_data_bypass_d, + input io_lsu_pkt_m_load_ldst_bypass_d, + input io_lsu_pkt_m_store_data_bypass_m, + input io_lsu_pkt_m_valid, + input io_lsu_pkt_r_fast_int, + input io_lsu_pkt_r_by, + input io_lsu_pkt_r_half, + input io_lsu_pkt_r_word, + input io_lsu_pkt_r_dword, + input io_lsu_pkt_r_load, + input io_lsu_pkt_r_store, + input io_lsu_pkt_r_unsign, + input io_lsu_pkt_r_dma, + input io_lsu_pkt_r_store_data_bypass_d, + input io_lsu_pkt_r_load_ldst_bypass_d, + input io_lsu_pkt_r_store_data_bypass_m, + input io_lsu_pkt_r_valid, + input io_addr_in_dccm_d, + input io_addr_in_dccm_m, + input io_addr_in_dccm_r, + input io_addr_in_pic_d, + input io_addr_in_pic_m, + input io_addr_in_pic_r, + input io_lsu_raw_fwd_lo_r, + input io_lsu_raw_fwd_hi_r, + input io_lsu_commit_r, + input [31:0] io_lsu_addr_d, + input [15:0] io_lsu_addr_m, + input [31:0] io_lsu_addr_r, + input [15:0] io_end_addr_d, + input [15:0] io_end_addr_m, + input [15:0] io_end_addr_r, + input io_stbuf_reqvld_any, + input [15:0] io_stbuf_addr_any, + input [31:0] io_stbuf_data_any, + input [6:0] io_stbuf_ecc_any, + input [31:0] io_stbuf_fwddata_hi_m, + input [31:0] io_stbuf_fwddata_lo_m, + input [3:0] io_stbuf_fwdbyteen_lo_m, + input [3:0] io_stbuf_fwdbyteen_hi_m, + output [31:0] io_dccm_rdata_hi_r, + output [31:0] io_dccm_rdata_lo_r, + output [6:0] io_dccm_data_ecc_hi_r, + output [6:0] io_dccm_data_ecc_lo_r, + output [31:0] io_lsu_ld_data_r, + output [31:0] io_lsu_ld_data_corr_r, + input io_lsu_double_ecc_error_r, + input io_single_ecc_error_hi_r, + input io_single_ecc_error_lo_r, + input [31:0] io_sec_data_hi_r, + input [31:0] io_sec_data_lo_r, + input [31:0] io_sec_data_hi_r_ff, + input [31:0] io_sec_data_lo_r_ff, + input [6:0] io_sec_data_ecc_hi_r_ff, + input [6:0] io_sec_data_ecc_lo_r_ff, + output [31:0] io_dccm_rdata_hi_m, + output [31:0] io_dccm_rdata_lo_m, + output [6:0] io_dccm_data_ecc_hi_m, + output [6:0] io_dccm_data_ecc_lo_m, + output [31:0] io_lsu_ld_data_m, + input io_lsu_double_ecc_error_m, + input [31:0] io_sec_data_hi_m, + input [31:0] io_sec_data_lo_m, + input [31:0] io_store_data_m, + input io_dma_dccm_wen, + input io_dma_pic_wen, + input [2:0] io_dma_mem_tag_m, + input [31:0] io_dma_mem_addr, + input [63:0] io_dma_mem_wdata, + input [31:0] io_dma_dccm_wdata_lo, + input [31:0] io_dma_dccm_wdata_hi, + input [6:0] io_dma_dccm_wdata_ecc_hi, + input [6:0] io_dma_dccm_wdata_ecc_lo, + output [31:0] io_store_data_hi_r, + output [31:0] io_store_data_lo_r, + output [31:0] io_store_datafn_hi_r, + output [31:0] io_store_datafn_lo_r, + output [31:0] io_store_data_r, + output io_ld_single_ecc_error_r, + output io_ld_single_ecc_error_r_ff, + output [31:0] io_picm_mask_data_m, + output io_lsu_stbuf_commit_any, + output io_lsu_dccm_rden_m, + output io_lsu_dccm_rden_r, + output io_dccm_dma_rvalid, + output io_dccm_dma_ecc_error, + output [2:0] io_dccm_dma_rtag, + output [63:0] io_dccm_dma_rdata, + output io_dccm_wren, + output io_dccm_rden, + output [15:0] io_dccm_wr_addr_lo, + output [38:0] io_dccm_wr_data_lo, + output [15:0] io_dccm_rd_addr_lo, + input [38:0] io_dccm_rd_data_lo, + output [15:0] io_dccm_wr_addr_hi, + output [38:0] io_dccm_wr_data_hi, + output [15:0] io_dccm_rd_addr_hi, + input [38:0] io_dccm_rd_data_hi, + output io_picm_wren, + output io_picm_rden, + output io_picm_mken, + output [31:0] io_picm_rdaddr, + output [31:0] io_picm_wraddr, + output [31:0] io_picm_wr_data, + input [31:0] io_picm_rd_data, + input io_scan_mode +); +`ifdef RANDOMIZE_REG_INIT + reg [63:0] _RAND_0; + reg [31:0] _RAND_1; + reg [31:0] _RAND_2; + reg [31:0] _RAND_3; + reg [31:0] _RAND_4; + reg [31:0] _RAND_5; + reg [31:0] _RAND_6; + reg [31:0] _RAND_7; + reg [31:0] _RAND_8; + reg [31:0] _RAND_9; +`endif // RANDOMIZE_REG_INIT + wire rvclkhdr_io_l1clk; // @[beh_lib.scala 350:21] + wire rvclkhdr_io_clk; // @[beh_lib.scala 350:21] + wire rvclkhdr_io_en; // @[beh_lib.scala 350:21] + wire rvclkhdr_io_scan_mode; // @[beh_lib.scala 350:21] + wire rvclkhdr_1_io_l1clk; // @[beh_lib.scala 350:21] + wire rvclkhdr_1_io_clk; // @[beh_lib.scala 350:21] + wire rvclkhdr_1_io_en; // @[beh_lib.scala 350:21] + wire rvclkhdr_1_io_scan_mode; // @[beh_lib.scala 350:21] + wire [63:0] picm_rd_data_m = {io_picm_rd_data,io_picm_rd_data}; // @[Cat.scala 29:58] + wire [63:0] dccm_rdata_corr_m = {io_sec_data_hi_m,io_sec_data_lo_m}; // @[Cat.scala 29:58] + wire [63:0] dccm_rdata_m = {io_dccm_rdata_hi_m,io_dccm_rdata_lo_m}; // @[Cat.scala 29:58] + wire _T = io_lsu_pkt_m_valid & io_lsu_pkt_m_load; // @[el2_lsu_dccm_ctl.scala 168:50] + wire [7:0] _T_30 = {io_stbuf_fwdbyteen_hi_m,io_stbuf_fwdbyteen_lo_m}; // @[Cat.scala 29:58] + wire [63:0] _T_33 = {io_stbuf_fwddata_hi_m,io_stbuf_fwddata_lo_m}; // @[Cat.scala 29:58] + wire [7:0] _T_38 = io_addr_in_pic_m ? picm_rd_data_m[15:8] : dccm_rdata_corr_m[15:8]; // @[el2_lsu_dccm_ctl.scala 184:171] + wire [7:0] lsu_rdata_corr_m_1 = _T_30[1] ? _T_33[15:8] : _T_38; // @[el2_lsu_dccm_ctl.scala 184:36] + wire [7:0] _T_18 = io_addr_in_pic_m ? picm_rd_data_m[7:0] : dccm_rdata_corr_m[7:0]; // @[el2_lsu_dccm_ctl.scala 184:171] + wire [7:0] lsu_rdata_corr_m_0 = _T_30[0] ? _T_33[7:0] : _T_18; // @[el2_lsu_dccm_ctl.scala 184:36] + wire [7:0] _T_78 = io_addr_in_pic_m ? picm_rd_data_m[31:24] : dccm_rdata_corr_m[31:24]; // @[el2_lsu_dccm_ctl.scala 184:171] + wire [7:0] lsu_rdata_corr_m_3 = _T_30[3] ? _T_33[31:24] : _T_78; // @[el2_lsu_dccm_ctl.scala 184:36] + wire [7:0] _T_58 = io_addr_in_pic_m ? picm_rd_data_m[23:16] : dccm_rdata_corr_m[23:16]; // @[el2_lsu_dccm_ctl.scala 184:171] + wire [7:0] lsu_rdata_corr_m_2 = _T_30[2] ? _T_33[23:16] : _T_58; // @[el2_lsu_dccm_ctl.scala 184:36] + wire [31:0] _T_4 = {lsu_rdata_corr_m_3,lsu_rdata_corr_m_2,lsu_rdata_corr_m_1,lsu_rdata_corr_m_0}; // @[el2_lsu_dccm_ctl.scala 170:48] + wire [7:0] _T_118 = io_addr_in_pic_m ? picm_rd_data_m[47:40] : dccm_rdata_corr_m[47:40]; // @[el2_lsu_dccm_ctl.scala 184:171] + wire [7:0] lsu_rdata_corr_m_5 = _T_30[5] ? _T_33[47:40] : _T_118; // @[el2_lsu_dccm_ctl.scala 184:36] + wire [7:0] _T_98 = io_addr_in_pic_m ? picm_rd_data_m[39:32] : dccm_rdata_corr_m[39:32]; // @[el2_lsu_dccm_ctl.scala 184:171] + wire [7:0] lsu_rdata_corr_m_4 = _T_30[4] ? _T_33[39:32] : _T_98; // @[el2_lsu_dccm_ctl.scala 184:36] + wire [7:0] _T_158 = io_addr_in_pic_m ? picm_rd_data_m[63:56] : dccm_rdata_corr_m[63:56]; // @[el2_lsu_dccm_ctl.scala 184:171] + wire [7:0] lsu_rdata_corr_m_7 = _T_30[7] ? _T_33[63:56] : _T_158; // @[el2_lsu_dccm_ctl.scala 184:36] + wire [7:0] _T_138 = io_addr_in_pic_m ? picm_rd_data_m[55:48] : dccm_rdata_corr_m[55:48]; // @[el2_lsu_dccm_ctl.scala 184:171] + wire [7:0] lsu_rdata_corr_m_6 = _T_30[6] ? _T_33[55:48] : _T_138; // @[el2_lsu_dccm_ctl.scala 184:36] + wire [31:0] _T_7 = {lsu_rdata_corr_m_7,lsu_rdata_corr_m_6,lsu_rdata_corr_m_5,lsu_rdata_corr_m_4}; // @[el2_lsu_dccm_ctl.scala 170:48] + wire [63:0] _T_8 = {lsu_rdata_corr_m_7,lsu_rdata_corr_m_6,lsu_rdata_corr_m_5,lsu_rdata_corr_m_4,lsu_rdata_corr_m_3,lsu_rdata_corr_m_2,lsu_rdata_corr_m_1,lsu_rdata_corr_m_0}; // @[el2_lsu_dccm_ctl.scala 170:48] + reg [63:0] _T_9; // @[el2_lsu_dccm_ctl.scala 178:65] + wire [7:0] _T_28 = io_addr_in_pic_m ? picm_rd_data_m[7:0] : dccm_rdata_m[7:0]; // @[el2_lsu_dccm_ctl.scala 185:171] + wire [7:0] lsu_rdata_m_0 = _T_30[0] ? _T_33[7:0] : _T_28; // @[el2_lsu_dccm_ctl.scala 185:36] + wire [7:0] _T_48 = io_addr_in_pic_m ? picm_rd_data_m[15:8] : dccm_rdata_m[15:8]; // @[el2_lsu_dccm_ctl.scala 185:171] + wire [7:0] lsu_rdata_m_1 = _T_30[1] ? _T_33[15:8] : _T_48; // @[el2_lsu_dccm_ctl.scala 185:36] + wire [7:0] _T_68 = io_addr_in_pic_m ? picm_rd_data_m[23:16] : dccm_rdata_m[23:16]; // @[el2_lsu_dccm_ctl.scala 185:171] + wire [7:0] lsu_rdata_m_2 = _T_30[2] ? _T_33[23:16] : _T_68; // @[el2_lsu_dccm_ctl.scala 185:36] + wire [7:0] _T_88 = io_addr_in_pic_m ? picm_rd_data_m[31:24] : dccm_rdata_m[31:24]; // @[el2_lsu_dccm_ctl.scala 185:171] + wire [7:0] lsu_rdata_m_3 = _T_30[3] ? _T_33[31:24] : _T_88; // @[el2_lsu_dccm_ctl.scala 185:36] + wire [7:0] _T_108 = io_addr_in_pic_m ? picm_rd_data_m[39:32] : dccm_rdata_m[39:32]; // @[el2_lsu_dccm_ctl.scala 185:171] + wire [7:0] lsu_rdata_m_4 = _T_30[4] ? _T_33[39:32] : _T_108; // @[el2_lsu_dccm_ctl.scala 185:36] + wire [7:0] _T_128 = io_addr_in_pic_m ? picm_rd_data_m[47:40] : dccm_rdata_m[47:40]; // @[el2_lsu_dccm_ctl.scala 185:171] + wire [7:0] lsu_rdata_m_5 = _T_30[5] ? _T_33[47:40] : _T_128; // @[el2_lsu_dccm_ctl.scala 185:36] + wire [7:0] _T_148 = io_addr_in_pic_m ? picm_rd_data_m[55:48] : dccm_rdata_m[55:48]; // @[el2_lsu_dccm_ctl.scala 185:171] + wire [7:0] lsu_rdata_m_6 = _T_30[6] ? _T_33[55:48] : _T_148; // @[el2_lsu_dccm_ctl.scala 185:36] + wire [7:0] _T_168 = io_addr_in_pic_m ? picm_rd_data_m[63:56] : dccm_rdata_m[63:56]; // @[el2_lsu_dccm_ctl.scala 185:171] + wire [7:0] lsu_rdata_m_7 = _T_30[7] ? _T_33[63:56] : _T_168; // @[el2_lsu_dccm_ctl.scala 185:36] + wire [63:0] _T_176 = {lsu_rdata_m_7,lsu_rdata_m_6,lsu_rdata_m_5,lsu_rdata_m_4,lsu_rdata_m_3,lsu_rdata_m_2,lsu_rdata_m_1,lsu_rdata_m_0}; // @[el2_lsu_dccm_ctl.scala 186:43] + wire [3:0] _GEN_0 = {{2'd0}, io_lsu_addr_m[1:0]}; // @[el2_lsu_dccm_ctl.scala 186:56] + wire [5:0] _T_178 = 4'h8 * _GEN_0; // @[el2_lsu_dccm_ctl.scala 186:56] + wire [63:0] _T_179 = _T_176 >> _T_178; // @[el2_lsu_dccm_ctl.scala 186:50] + wire _T_192 = io_lsu_addr_d[15:2] == io_lsu_addr_r[15:2]; // @[el2_lsu_dccm_ctl.scala 190:64] + wire _T_195 = io_end_addr_d[15:2] == io_lsu_addr_r[15:2]; // @[el2_lsu_dccm_ctl.scala 190:145] + wire _T_196 = _T_192 | _T_195; // @[el2_lsu_dccm_ctl.scala 190:109] + wire _T_197 = _T_196 & io_lsu_pkt_d_valid; // @[el2_lsu_dccm_ctl.scala 190:191] + wire _T_198 = _T_197 & io_lsu_pkt_d_store; // @[el2_lsu_dccm_ctl.scala 190:212] + wire _T_199 = _T_198 & io_lsu_pkt_d_dma; // @[el2_lsu_dccm_ctl.scala 190:233] + wire _T_200 = _T_199 & io_addr_in_dccm_d; // @[el2_lsu_dccm_ctl.scala 190:252] + wire _T_203 = io_lsu_addr_m[15:2] == io_lsu_addr_r[15:2]; // @[el2_lsu_dccm_ctl.scala 191:41] + wire _T_206 = io_end_addr_m[15:2] == io_lsu_addr_r[15:2]; // @[el2_lsu_dccm_ctl.scala 191:122] + wire _T_207 = _T_203 | _T_206; // @[el2_lsu_dccm_ctl.scala 191:86] + wire _T_208 = _T_207 & io_lsu_pkt_m_valid; // @[el2_lsu_dccm_ctl.scala 191:168] + wire _T_209 = _T_208 & io_lsu_pkt_m_store; // @[el2_lsu_dccm_ctl.scala 191:189] + wire _T_210 = _T_209 & io_lsu_pkt_m_dma; // @[el2_lsu_dccm_ctl.scala 191:210] + wire _T_211 = _T_210 & io_addr_in_dccm_m; // @[el2_lsu_dccm_ctl.scala 191:229] + wire kill_ecc_corr_lo_r = _T_200 | _T_211; // @[el2_lsu_dccm_ctl.scala 190:273] + wire _T_214 = io_lsu_addr_d[15:2] == io_end_addr_r[15:2]; // @[el2_lsu_dccm_ctl.scala 192:64] + wire _T_217 = io_end_addr_d[15:2] == io_end_addr_r[15:2]; // @[el2_lsu_dccm_ctl.scala 192:145] + wire _T_218 = _T_214 | _T_217; // @[el2_lsu_dccm_ctl.scala 192:109] + wire _T_219 = _T_218 & io_lsu_pkt_d_valid; // @[el2_lsu_dccm_ctl.scala 192:191] + wire _T_220 = _T_219 & io_lsu_pkt_d_store; // @[el2_lsu_dccm_ctl.scala 192:212] + wire _T_221 = _T_220 & io_lsu_pkt_d_dma; // @[el2_lsu_dccm_ctl.scala 192:233] + wire _T_222 = _T_221 & io_addr_in_dccm_d; // @[el2_lsu_dccm_ctl.scala 192:252] + wire _T_225 = io_lsu_addr_m[15:2] == io_end_addr_r[15:2]; // @[el2_lsu_dccm_ctl.scala 193:41] + wire _T_228 = io_end_addr_m[15:2] == io_end_addr_r[15:2]; // @[el2_lsu_dccm_ctl.scala 193:122] + wire _T_229 = _T_225 | _T_228; // @[el2_lsu_dccm_ctl.scala 193:86] + wire _T_230 = _T_229 & io_lsu_pkt_m_valid; // @[el2_lsu_dccm_ctl.scala 193:168] + wire _T_231 = _T_230 & io_lsu_pkt_m_store; // @[el2_lsu_dccm_ctl.scala 193:189] + wire _T_232 = _T_231 & io_lsu_pkt_m_dma; // @[el2_lsu_dccm_ctl.scala 193:210] + wire _T_233 = _T_232 & io_addr_in_dccm_m; // @[el2_lsu_dccm_ctl.scala 193:229] + wire kill_ecc_corr_hi_r = _T_222 | _T_233; // @[el2_lsu_dccm_ctl.scala 192:273] + wire _T_234 = io_lsu_pkt_r_load & io_single_ecc_error_lo_r; // @[el2_lsu_dccm_ctl.scala 194:55] + wire _T_235 = ~io_lsu_raw_fwd_lo_r; // @[el2_lsu_dccm_ctl.scala 194:84] + wire ld_single_ecc_error_lo_r = _T_234 & _T_235; // @[el2_lsu_dccm_ctl.scala 194:82] + wire _T_236 = io_lsu_pkt_r_load & io_single_ecc_error_hi_r; // @[el2_lsu_dccm_ctl.scala 195:55] + wire _T_237 = ~io_lsu_raw_fwd_hi_r; // @[el2_lsu_dccm_ctl.scala 195:84] + wire ld_single_ecc_error_hi_r = _T_236 & _T_237; // @[el2_lsu_dccm_ctl.scala 195:82] + wire _T_238 = ld_single_ecc_error_lo_r | ld_single_ecc_error_hi_r; // @[el2_lsu_dccm_ctl.scala 196:62] + wire _T_239 = ~io_lsu_double_ecc_error_r; // @[el2_lsu_dccm_ctl.scala 196:92] + wire _T_241 = io_lsu_commit_r | io_lsu_pkt_r_dma; // @[el2_lsu_dccm_ctl.scala 197:81] + wire _T_242 = ld_single_ecc_error_lo_r & _T_241; // @[el2_lsu_dccm_ctl.scala 197:62] + wire _T_243 = ~kill_ecc_corr_lo_r; // @[el2_lsu_dccm_ctl.scala 197:103] + wire _T_245 = ld_single_ecc_error_hi_r & _T_241; // @[el2_lsu_dccm_ctl.scala 198:62] + wire _T_246 = ~kill_ecc_corr_hi_r; // @[el2_lsu_dccm_ctl.scala 198:103] + reg lsu_double_ecc_error_r_ff; // @[el2_lsu_dccm_ctl.scala 200:74] + reg ld_single_ecc_error_hi_r_ff; // @[el2_lsu_dccm_ctl.scala 201:74] + reg ld_single_ecc_error_lo_r_ff; // @[el2_lsu_dccm_ctl.scala 202:74] + reg [15:0] ld_sec_addr_hi_r_ff; // @[beh_lib.scala 356:14] + reg [15:0] ld_sec_addr_lo_r_ff; // @[beh_lib.scala 356:14] + wire _T_253 = io_lsu_pkt_d_word | io_lsu_pkt_d_dword; // @[el2_lsu_dccm_ctl.scala 208:110] + wire _T_254 = ~_T_253; // @[el2_lsu_dccm_ctl.scala 208:90] + wire _T_256 = io_lsu_addr_d[1:0] != 2'h0; // @[el2_lsu_dccm_ctl.scala 208:154] + wire _T_257 = _T_254 | _T_256; // @[el2_lsu_dccm_ctl.scala 208:132] + wire _T_258 = io_lsu_pkt_d_store & _T_257; // @[el2_lsu_dccm_ctl.scala 208:87] + wire _T_259 = io_lsu_pkt_d_load | _T_258; // @[el2_lsu_dccm_ctl.scala 208:65] + wire _T_260 = io_lsu_pkt_d_valid & _T_259; // @[el2_lsu_dccm_ctl.scala 208:44] + wire lsu_dccm_rden_d = _T_260 & io_addr_in_dccm_d; // @[el2_lsu_dccm_ctl.scala 208:171] + wire _T_261 = ld_single_ecc_error_lo_r_ff | ld_single_ecc_error_hi_r_ff; // @[el2_lsu_dccm_ctl.scala 211:63] + wire _T_262 = ~lsu_double_ecc_error_r_ff; // @[el2_lsu_dccm_ctl.scala 211:96] + wire _T_264 = lsu_dccm_rden_d | io_dma_dccm_wen; // @[el2_lsu_dccm_ctl.scala 212:71] + wire _T_265 = _T_264 | io_ld_single_ecc_error_r_ff; // @[el2_lsu_dccm_ctl.scala 212:89] + wire _T_266 = ~_T_265; // @[el2_lsu_dccm_ctl.scala 212:53] + wire _T_269 = io_stbuf_addr_any[3:2] == io_lsu_addr_d[3:2]; // @[el2_lsu_dccm_ctl.scala 213:107] + wire _T_272 = io_stbuf_addr_any[3:2] == io_end_addr_d[3:2]; // @[el2_lsu_dccm_ctl.scala 214:88] + wire _T_273 = _T_269 | _T_272; // @[el2_lsu_dccm_ctl.scala 213:195] + wire _T_274 = ~_T_273; // @[el2_lsu_dccm_ctl.scala 213:24] + wire _T_275 = lsu_dccm_rden_d & _T_274; // @[el2_lsu_dccm_ctl.scala 213:22] + wire _T_276 = _T_266 | _T_275; // @[el2_lsu_dccm_ctl.scala 212:120] + wire _T_278 = io_dma_dccm_wen | io_lsu_stbuf_commit_any; // @[el2_lsu_dccm_ctl.scala 217:41] + wire [15:0] _T_285 = ld_single_ecc_error_lo_r_ff ? ld_sec_addr_lo_r_ff : ld_sec_addr_hi_r_ff; // @[el2_lsu_dccm_ctl.scala 220:8] + wire [15:0] _T_289 = io_dma_dccm_wen ? io_lsu_addr_d[15:0] : io_stbuf_addr_any; // @[el2_lsu_dccm_ctl.scala 221:8] + wire [15:0] _T_295 = ld_single_ecc_error_hi_r_ff ? ld_sec_addr_hi_r_ff : ld_sec_addr_lo_r_ff; // @[el2_lsu_dccm_ctl.scala 223:8] + wire [15:0] _T_299 = io_dma_dccm_wen ? io_end_addr_d : io_stbuf_addr_any; // @[el2_lsu_dccm_ctl.scala 224:8] + wire _T_304 = ~ld_single_ecc_error_lo_r_ff; // @[el2_lsu_dccm_ctl.scala 228:36] + wire [38:0] _T_307 = {io_sec_data_ecc_lo_r_ff,io_sec_data_lo_r_ff}; // @[Cat.scala 29:58] + wire [38:0] _T_310 = {io_sec_data_ecc_hi_r_ff,io_sec_data_hi_r_ff}; // @[Cat.scala 29:58] + wire [38:0] _T_311 = _T_304 ? _T_307 : _T_310; // @[el2_lsu_dccm_ctl.scala 228:8] + wire [38:0] _T_315 = {io_dma_dccm_wdata_ecc_lo,io_dma_dccm_wdata_lo}; // @[Cat.scala 29:58] + wire [38:0] _T_318 = {io_stbuf_ecc_any,io_stbuf_data_any}; // @[Cat.scala 29:58] + wire [38:0] _T_319 = io_dma_dccm_wen ? _T_315 : _T_318; // @[el2_lsu_dccm_ctl.scala 230:8] + wire _T_322 = ~ld_single_ecc_error_hi_r_ff; // @[el2_lsu_dccm_ctl.scala 234:36] + wire [38:0] _T_329 = _T_322 ? _T_310 : _T_307; // @[el2_lsu_dccm_ctl.scala 234:8] + wire [38:0] _T_333 = {io_dma_dccm_wdata_ecc_hi,io_dma_dccm_wdata_hi}; // @[Cat.scala 29:58] + wire [38:0] _T_337 = io_dma_dccm_wen ? _T_333 : _T_318; // @[el2_lsu_dccm_ctl.scala 236:8] + wire [3:0] _T_340 = io_lsu_pkt_m_store ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] + wire [3:0] _T_342 = io_lsu_pkt_m_by ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] + wire [3:0] _T_343 = _T_342 & 4'h1; // @[el2_lsu_dccm_ctl.scala 240:84] + wire [3:0] _T_345 = io_lsu_pkt_m_half ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] + wire [3:0] _T_346 = _T_345 & 4'h3; // @[el2_lsu_dccm_ctl.scala 241:33] + wire [3:0] _T_347 = _T_343 | _T_346; // @[el2_lsu_dccm_ctl.scala 240:97] + wire [3:0] _T_349 = io_lsu_pkt_m_word ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] + wire [3:0] _T_351 = _T_347 | _T_349; // @[el2_lsu_dccm_ctl.scala 241:46] + wire [3:0] store_byteen_m = _T_340 & _T_351; // @[el2_lsu_dccm_ctl.scala 240:53] + wire [3:0] _T_353 = io_lsu_pkt_r_store ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] + wire [3:0] _T_355 = io_lsu_pkt_r_by ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] + wire [3:0] _T_356 = _T_355 & 4'h1; // @[el2_lsu_dccm_ctl.scala 243:84] + wire [3:0] _T_358 = io_lsu_pkt_r_half ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] + wire [3:0] _T_359 = _T_358 & 4'h3; // @[el2_lsu_dccm_ctl.scala 244:33] + wire [3:0] _T_360 = _T_356 | _T_359; // @[el2_lsu_dccm_ctl.scala 243:97] + wire [3:0] _T_362 = io_lsu_pkt_r_word ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] + wire [3:0] _T_364 = _T_360 | _T_362; // @[el2_lsu_dccm_ctl.scala 244:46] + wire [3:0] store_byteen_r = _T_353 & _T_364; // @[el2_lsu_dccm_ctl.scala 243:53] + wire [7:0] _T_366 = {4'h0,store_byteen_m}; // @[Cat.scala 29:58] + wire [10:0] _GEN_2 = {{3'd0}, _T_366}; // @[el2_lsu_dccm_ctl.scala 246:62] + wire [10:0] store_byteen_ext_m = _GEN_2 << io_lsu_addr_m[1:0]; // @[el2_lsu_dccm_ctl.scala 246:62] + wire [7:0] _T_369 = {4'h0,store_byteen_r}; // @[Cat.scala 29:58] + wire [10:0] _GEN_3 = {{3'd0}, _T_369}; // @[el2_lsu_dccm_ctl.scala 247:62] + wire [10:0] store_byteen_ext_r = _GEN_3 << io_lsu_addr_r[1:0]; // @[el2_lsu_dccm_ctl.scala 247:62] + wire _T_373 = io_stbuf_addr_any[15:2] == io_lsu_addr_m[15:2]; // @[el2_lsu_dccm_ctl.scala 250:71] + wire dccm_wr_bypass_d_m_lo = _T_373 & io_addr_in_dccm_m; // @[el2_lsu_dccm_ctl.scala 250:109] + wire _T_376 = io_stbuf_addr_any[15:2] == io_end_addr_m[15:2]; // @[el2_lsu_dccm_ctl.scala 251:71] + wire dccm_wr_bypass_d_m_hi = _T_376 & io_addr_in_dccm_m; // @[el2_lsu_dccm_ctl.scala 251:109] + wire _T_379 = io_stbuf_addr_any[15:2] == io_lsu_addr_r[15:2]; // @[el2_lsu_dccm_ctl.scala 253:71] + wire dccm_wr_bypass_d_r_lo = _T_379 & io_addr_in_dccm_r; // @[el2_lsu_dccm_ctl.scala 253:109] + wire [63:0] _T_385 = {32'h0,io_store_data_m}; // @[Cat.scala 29:58] + wire [126:0] _GEN_5 = {{63'd0}, _T_385}; // @[el2_lsu_dccm_ctl.scala 287:72] + wire [126:0] _T_388 = _GEN_5 << _T_178; // @[el2_lsu_dccm_ctl.scala 287:72] + wire [63:0] store_data_pre_m = _T_388[63:0]; // @[el2_lsu_dccm_ctl.scala 287:29] + wire [31:0] store_data_hi_m = store_data_pre_m[63:32]; // @[el2_lsu_dccm_ctl.scala 288:48] + wire [31:0] store_data_lo_m = store_data_pre_m[31:0]; // @[el2_lsu_dccm_ctl.scala 289:48] + wire _T_394 = io_lsu_stbuf_commit_any & dccm_wr_bypass_d_m_lo; // @[el2_lsu_dccm_ctl.scala 290:195] + wire [7:0] _T_398 = _T_394 ? io_stbuf_data_any[7:0] : io_sec_data_lo_m[7:0]; // @[el2_lsu_dccm_ctl.scala 290:169] + wire [7:0] _T_399 = store_byteen_ext_m[0] ? store_data_lo_m[7:0] : _T_398; // @[el2_lsu_dccm_ctl.scala 290:104] + wire [7:0] _T_407 = _T_394 ? io_stbuf_data_any[15:8] : io_sec_data_lo_m[15:8]; // @[el2_lsu_dccm_ctl.scala 290:169] + wire [7:0] _T_408 = store_byteen_ext_m[1] ? store_data_lo_m[15:8] : _T_407; // @[el2_lsu_dccm_ctl.scala 290:104] + wire [7:0] _T_416 = _T_394 ? io_stbuf_data_any[23:16] : io_sec_data_lo_m[23:16]; // @[el2_lsu_dccm_ctl.scala 290:169] + wire [7:0] _T_417 = store_byteen_ext_m[2] ? store_data_lo_m[23:16] : _T_416; // @[el2_lsu_dccm_ctl.scala 290:104] + wire [7:0] _T_425 = _T_394 ? io_stbuf_data_any[31:24] : io_sec_data_lo_m[31:24]; // @[el2_lsu_dccm_ctl.scala 290:169] + wire [7:0] _T_426 = store_byteen_ext_m[3] ? store_data_lo_m[31:24] : _T_425; // @[el2_lsu_dccm_ctl.scala 290:104] + wire [15:0] _T_428 = {_T_417,_T_426}; // @[Cat.scala 29:58] + wire [15:0] _T_429 = {_T_399,_T_408}; // @[Cat.scala 29:58] + reg [31:0] _T_431; // @[el2_lsu_dccm_ctl.scala 290:72] + wire _T_435 = io_lsu_stbuf_commit_any & dccm_wr_bypass_d_m_hi; // @[el2_lsu_dccm_ctl.scala 291:195] + wire [7:0] _T_439 = _T_435 ? io_stbuf_data_any[7:0] : io_sec_data_hi_m[7:0]; // @[el2_lsu_dccm_ctl.scala 291:169] + wire [7:0] _T_440 = store_byteen_ext_m[4] ? store_data_hi_m[7:0] : _T_439; // @[el2_lsu_dccm_ctl.scala 291:104] + wire [7:0] _T_448 = _T_435 ? io_stbuf_data_any[15:8] : io_sec_data_hi_m[15:8]; // @[el2_lsu_dccm_ctl.scala 291:169] + wire [7:0] _T_449 = store_byteen_ext_m[5] ? store_data_hi_m[15:8] : _T_448; // @[el2_lsu_dccm_ctl.scala 291:104] + wire [7:0] _T_457 = _T_435 ? io_stbuf_data_any[23:16] : io_sec_data_hi_m[23:16]; // @[el2_lsu_dccm_ctl.scala 291:169] + wire [7:0] _T_458 = store_byteen_ext_m[6] ? store_data_hi_m[23:16] : _T_457; // @[el2_lsu_dccm_ctl.scala 291:104] + wire [7:0] _T_466 = _T_435 ? io_stbuf_data_any[31:24] : io_sec_data_hi_m[31:24]; // @[el2_lsu_dccm_ctl.scala 291:169] + wire [7:0] _T_467 = store_byteen_ext_m[7] ? store_data_hi_m[31:24] : _T_466; // @[el2_lsu_dccm_ctl.scala 291:104] + wire [15:0] _T_469 = {_T_458,_T_467}; // @[Cat.scala 29:58] + wire [15:0] _T_470 = {_T_440,_T_449}; // @[Cat.scala 29:58] + reg [31:0] _T_472; // @[el2_lsu_dccm_ctl.scala 291:72] + wire _T_473 = io_lsu_stbuf_commit_any & dccm_wr_bypass_d_r_lo; // @[el2_lsu_dccm_ctl.scala 292:89] + wire _T_475 = ~store_byteen_ext_r[0]; // @[el2_lsu_dccm_ctl.scala 292:115] + wire _T_476 = _T_473 & _T_475; // @[el2_lsu_dccm_ctl.scala 292:113] + wire [7:0] _T_480 = _T_476 ? io_stbuf_data_any[7:0] : io_store_data_lo_r[7:0]; // @[el2_lsu_dccm_ctl.scala 292:63] + wire _T_483 = ~store_byteen_ext_r[1]; // @[el2_lsu_dccm_ctl.scala 292:115] + wire _T_484 = _T_473 & _T_483; // @[el2_lsu_dccm_ctl.scala 292:113] + wire [7:0] _T_488 = _T_484 ? io_stbuf_data_any[15:8] : io_store_data_lo_r[15:8]; // @[el2_lsu_dccm_ctl.scala 292:63] + wire _T_491 = ~store_byteen_ext_r[2]; // @[el2_lsu_dccm_ctl.scala 292:115] + wire _T_492 = _T_473 & _T_491; // @[el2_lsu_dccm_ctl.scala 292:113] + wire [7:0] _T_496 = _T_492 ? io_stbuf_data_any[23:16] : io_store_data_lo_r[23:16]; // @[el2_lsu_dccm_ctl.scala 292:63] + wire _T_499 = ~store_byteen_ext_r[3]; // @[el2_lsu_dccm_ctl.scala 292:115] + wire _T_500 = _T_473 & _T_499; // @[el2_lsu_dccm_ctl.scala 292:113] + wire [7:0] _T_504 = _T_500 ? io_stbuf_data_any[31:24] : io_store_data_lo_r[31:24]; // @[el2_lsu_dccm_ctl.scala 292:63] + wire [15:0] _T_506 = {_T_496,_T_504}; // @[Cat.scala 29:58] + wire [15:0] _T_507 = {_T_480,_T_488}; // @[Cat.scala 29:58] + wire [7:0] _T_516 = _T_476 ? io_stbuf_data_any[7:0] : io_store_data_hi_r[7:0]; // @[el2_lsu_dccm_ctl.scala 293:63] + wire [7:0] _T_524 = _T_484 ? io_stbuf_data_any[15:8] : io_store_data_hi_r[15:8]; // @[el2_lsu_dccm_ctl.scala 293:63] + wire [7:0] _T_532 = _T_492 ? io_stbuf_data_any[23:16] : io_store_data_hi_r[23:16]; // @[el2_lsu_dccm_ctl.scala 293:63] + wire [7:0] _T_540 = _T_500 ? io_stbuf_data_any[31:24] : io_store_data_hi_r[31:24]; // @[el2_lsu_dccm_ctl.scala 293:63] + wire [15:0] _T_542 = {_T_532,_T_540}; // @[Cat.scala 29:58] + wire [15:0] _T_543 = {_T_516,_T_524}; // @[Cat.scala 29:58] + wire [63:0] _T_547 = {io_store_data_hi_r,io_store_data_lo_r}; // @[Cat.scala 29:58] + wire [3:0] _GEN_6 = {{2'd0}, io_lsu_addr_r[1:0]}; // @[el2_lsu_dccm_ctl.scala 294:102] + wire [5:0] _T_549 = 4'h8 * _GEN_6; // @[el2_lsu_dccm_ctl.scala 294:102] + wire [63:0] _T_550 = _T_547 >> _T_549; // @[el2_lsu_dccm_ctl.scala 294:96] + wire [511:0] _T_553 = {_T_550,_T_550,_T_550,_T_550,_T_550,_T_550,_T_550,_T_550}; // @[Cat.scala 29:58] + wire [1023:0] _T_554 = {_T_550,_T_550,_T_550,_T_550,_T_550,_T_550,_T_550,_T_550,_T_553}; // @[Cat.scala 29:58] + wire [2047:0] _T_555 = {_T_550,_T_550,_T_550,_T_550,_T_550,_T_550,_T_550,_T_550,_T_553,_T_554}; // @[Cat.scala 29:58] + wire [7:0] _T_558 = store_byteen_r[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_561 = store_byteen_r[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_564 = store_byteen_r[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_567 = store_byteen_r[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_571 = {_T_558,_T_561,_T_564,_T_567}; // @[Cat.scala 29:58] + wire [2047:0] _GEN_7 = {{2016'd0}, _T_571}; // @[el2_lsu_dccm_ctl.scala 294:123] + wire [2047:0] _T_572 = _T_555 & _GEN_7; // @[el2_lsu_dccm_ctl.scala 294:123] + wire _T_577 = io_lsu_pkt_r_valid & io_lsu_pkt_r_store; // @[el2_lsu_dccm_ctl.scala 302:50] + wire _T_578 = _T_577 & io_addr_in_pic_r; // @[el2_lsu_dccm_ctl.scala 302:71] + wire _T_579 = _T_578 & io_lsu_commit_r; // @[el2_lsu_dccm_ctl.scala 302:90] + wire _T_581 = io_lsu_pkt_d_valid & io_lsu_pkt_d_load; // @[el2_lsu_dccm_ctl.scala 303:50] + wire _T_583 = io_lsu_pkt_d_valid & io_lsu_pkt_d_store; // @[el2_lsu_dccm_ctl.scala 304:50] + wire [5:0] _T_586 = 6'h20 - 6'h1; // @[el2_lsu_dccm_ctl.scala 306:58] + wire [20:0] _T_588 = {_T_586,io_lsu_addr_d[14:0]}; // @[Cat.scala 29:58] + wire [31:0] _GEN_8 = {{11'd0}, _T_588}; // @[el2_lsu_dccm_ctl.scala 306:47] + wire [14:0] _T_595 = io_dma_pic_wen ? io_dma_mem_addr[14:0] : io_lsu_addr_r[14:0]; // @[el2_lsu_dccm_ctl.scala 307:78] + wire [20:0] _T_596 = {_T_586,_T_595}; // @[Cat.scala 29:58] + wire [31:0] _GEN_9 = {{11'd0}, _T_596}; // @[el2_lsu_dccm_ctl.scala 307:47] + reg _T_603; // @[el2_lsu_dccm_ctl.scala 312:61] + reg _T_604; // @[el2_lsu_dccm_ctl.scala 313:61] + rvclkhdr rvclkhdr ( // @[beh_lib.scala 350:21] + .io_l1clk(rvclkhdr_io_l1clk), + .io_clk(rvclkhdr_io_clk), + .io_en(rvclkhdr_io_en), + .io_scan_mode(rvclkhdr_io_scan_mode) + ); + rvclkhdr rvclkhdr_1 ( // @[beh_lib.scala 350:21] + .io_l1clk(rvclkhdr_1_io_l1clk), + .io_clk(rvclkhdr_1_io_clk), + .io_en(rvclkhdr_1_io_en), + .io_scan_mode(rvclkhdr_1_io_scan_mode) + ); + assign io_dccm_rdata_hi_r = 32'h0; // @[el2_lsu_dccm_ctl.scala 173:28] + assign io_dccm_rdata_lo_r = 32'h0; // @[el2_lsu_dccm_ctl.scala 172:28] + assign io_dccm_data_ecc_hi_r = 7'h0; // @[el2_lsu_dccm_ctl.scala 174:28] + assign io_dccm_data_ecc_lo_r = 7'h0; // @[el2_lsu_dccm_ctl.scala 175:28] + assign io_lsu_ld_data_r = 32'h0; // @[el2_lsu_dccm_ctl.scala 181:27 el2_lsu_dccm_ctl.scala 181:27 el2_lsu_dccm_ctl.scala 181:27 el2_lsu_dccm_ctl.scala 181:27 el2_lsu_dccm_ctl.scala 181:27 el2_lsu_dccm_ctl.scala 181:27 el2_lsu_dccm_ctl.scala 181:27 el2_lsu_dccm_ctl.scala 181:27] + assign io_lsu_ld_data_corr_r = _T_9[31:0]; // @[el2_lsu_dccm_ctl.scala 178:28] + assign io_dccm_rdata_hi_m = io_dccm_rd_data_hi[31:0]; // @[el2_lsu_dccm_ctl.scala 298:27] + assign io_dccm_rdata_lo_m = io_dccm_rd_data_lo[31:0]; // @[el2_lsu_dccm_ctl.scala 297:27] + assign io_dccm_data_ecc_hi_m = io_dccm_rd_data_hi[38:32]; // @[el2_lsu_dccm_ctl.scala 300:27] + assign io_dccm_data_ecc_lo_m = io_dccm_rd_data_lo[38:32]; // @[el2_lsu_dccm_ctl.scala 299:27] + assign io_lsu_ld_data_m = _T_179[31:0]; // @[el2_lsu_dccm_ctl.scala 186:28] + assign io_store_data_hi_r = _T_472; // @[el2_lsu_dccm_ctl.scala 291:29] + assign io_store_data_lo_r = _T_431; // @[el2_lsu_dccm_ctl.scala 290:29] + assign io_store_datafn_hi_r = {_T_543,_T_542}; // @[el2_lsu_dccm_ctl.scala 293:29] + assign io_store_datafn_lo_r = {_T_507,_T_506}; // @[el2_lsu_dccm_ctl.scala 292:29] + assign io_store_data_r = _T_572[31:0]; // @[el2_lsu_dccm_ctl.scala 294:29] + assign io_ld_single_ecc_error_r = _T_238 & _T_239; // @[el2_lsu_dccm_ctl.scala 196:33] + assign io_ld_single_ecc_error_r_ff = _T_261 & _T_262; // @[el2_lsu_dccm_ctl.scala 211:31] + assign io_picm_mask_data_m = picm_rd_data_m[31:0]; // @[el2_lsu_dccm_ctl.scala 308:27] + assign io_lsu_stbuf_commit_any = io_stbuf_reqvld_any & _T_276; // @[el2_lsu_dccm_ctl.scala 212:27] + assign io_lsu_dccm_rden_m = _T_603; // @[el2_lsu_dccm_ctl.scala 312:24] + assign io_lsu_dccm_rden_r = _T_604; // @[el2_lsu_dccm_ctl.scala 313:24] + assign io_dccm_dma_rvalid = _T & io_lsu_pkt_m_dma; // @[el2_lsu_dccm_ctl.scala 168:28] + assign io_dccm_dma_ecc_error = io_lsu_double_ecc_error_m; // @[el2_lsu_dccm_ctl.scala 169:28] + assign io_dccm_dma_rtag = io_dma_mem_tag_m; // @[el2_lsu_dccm_ctl.scala 171:28] + assign io_dccm_dma_rdata = {_T_7,_T_4}; // @[el2_lsu_dccm_ctl.scala 170:28] + assign io_dccm_wren = _T_278 | io_ld_single_ecc_error_r_ff; // @[el2_lsu_dccm_ctl.scala 217:22] + assign io_dccm_rden = lsu_dccm_rden_d & io_addr_in_dccm_d; // @[el2_lsu_dccm_ctl.scala 218:22] + assign io_dccm_wr_addr_lo = io_ld_single_ecc_error_r_ff ? _T_285 : _T_289; // @[el2_lsu_dccm_ctl.scala 219:22] + assign io_dccm_wr_data_lo = io_ld_single_ecc_error_r_ff ? _T_311 : _T_319; // @[el2_lsu_dccm_ctl.scala 227:22] + assign io_dccm_rd_addr_lo = io_lsu_addr_d[15:0]; // @[el2_lsu_dccm_ctl.scala 225:22] + assign io_dccm_wr_addr_hi = io_ld_single_ecc_error_r_ff ? _T_295 : _T_299; // @[el2_lsu_dccm_ctl.scala 222:22] + assign io_dccm_wr_data_hi = io_ld_single_ecc_error_r_ff ? _T_329 : _T_337; // @[el2_lsu_dccm_ctl.scala 233:22] + assign io_dccm_rd_addr_hi = io_end_addr_d; // @[el2_lsu_dccm_ctl.scala 226:22] + assign io_picm_wren = _T_579 | io_dma_pic_wen; // @[el2_lsu_dccm_ctl.scala 302:27] + assign io_picm_rden = _T_581 & io_addr_in_pic_d; // @[el2_lsu_dccm_ctl.scala 303:27] + assign io_picm_mken = _T_583 & io_addr_in_pic_d; // @[el2_lsu_dccm_ctl.scala 304:27] + assign io_picm_rdaddr = 32'hf00c0000 | _GEN_8; // @[el2_lsu_dccm_ctl.scala 306:27] + assign io_picm_wraddr = 32'hf00c0000 | _GEN_9; // @[el2_lsu_dccm_ctl.scala 307:27] + assign io_picm_wr_data = io_dma_pic_wen ? io_dma_mem_wdata[31:0] : io_store_datafn_lo_r; // @[el2_lsu_dccm_ctl.scala 309:27] + assign rvclkhdr_io_clk = io_clk; // @[beh_lib.scala 352:16] + assign rvclkhdr_io_en = io_ld_single_ecc_error_r; // @[beh_lib.scala 353:15] + assign rvclkhdr_io_scan_mode = io_scan_mode; // @[beh_lib.scala 354:22] + assign rvclkhdr_1_io_clk = io_clk; // @[beh_lib.scala 352:16] + assign rvclkhdr_1_io_en = io_ld_single_ecc_error_r; // @[beh_lib.scala 353:15] + assign rvclkhdr_1_io_scan_mode = io_scan_mode; // @[beh_lib.scala 354:22] +`ifdef RANDOMIZE_GARBAGE_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_INVALID_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_REG_INIT +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_MEM_INIT +`define RANDOMIZE +`endif +`ifndef RANDOM +`define RANDOM $random +`endif +`ifdef RANDOMIZE_MEM_INIT + integer initvar; +`endif +`ifndef SYNTHESIS +`ifdef FIRRTL_BEFORE_INITIAL +`FIRRTL_BEFORE_INITIAL +`endif +initial begin + `ifdef RANDOMIZE + `ifdef INIT_RANDOM + `INIT_RANDOM + `endif + `ifndef VERILATOR + `ifdef RANDOMIZE_DELAY + #`RANDOMIZE_DELAY begin end + `else + #0.002 begin end + `endif + `endif +`ifdef RANDOMIZE_REG_INIT + _RAND_0 = {2{`RANDOM}}; + _T_9 = _RAND_0[63:0]; + _RAND_1 = {1{`RANDOM}}; + lsu_double_ecc_error_r_ff = _RAND_1[0:0]; + _RAND_2 = {1{`RANDOM}}; + ld_single_ecc_error_hi_r_ff = _RAND_2[0:0]; + _RAND_3 = {1{`RANDOM}}; + ld_single_ecc_error_lo_r_ff = _RAND_3[0:0]; + _RAND_4 = {1{`RANDOM}}; + ld_sec_addr_hi_r_ff = _RAND_4[15:0]; + _RAND_5 = {1{`RANDOM}}; + ld_sec_addr_lo_r_ff = _RAND_5[15:0]; + _RAND_6 = {1{`RANDOM}}; + _T_431 = _RAND_6[31:0]; + _RAND_7 = {1{`RANDOM}}; + _T_472 = _RAND_7[31:0]; + _RAND_8 = {1{`RANDOM}}; + _T_603 = _RAND_8[0:0]; + _RAND_9 = {1{`RANDOM}}; + _T_604 = _RAND_9[0:0]; +`endif // RANDOMIZE_REG_INIT + if (reset) begin + _T_9 = 64'h0; + end + if (reset) begin + lsu_double_ecc_error_r_ff = 1'h0; + end + if (reset) begin + ld_single_ecc_error_hi_r_ff = 1'h0; + end + if (reset) begin + ld_single_ecc_error_lo_r_ff = 1'h0; + end + if (reset) begin + ld_sec_addr_hi_r_ff = 16'h0; + end + if (reset) begin + ld_sec_addr_lo_r_ff = 16'h0; + end + if (reset) begin + _T_603 = 1'h0; + end + if (reset) begin + _T_604 = 1'h0; + end + `endif // RANDOMIZE +end // initial +`ifdef FIRRTL_AFTER_INITIAL +`FIRRTL_AFTER_INITIAL +`endif +`endif // SYNTHESIS + always @(posedge io_lsu_store_c1_r_clk) begin + _T_431 <= {_T_429,_T_428}; + _T_472 <= {_T_470,_T_469}; + end + always @(posedge io_lsu_c2_r_clk or posedge reset) begin + if (reset) begin + _T_9 <= 64'h0; + end else begin + _T_9 <= _T_8 >> _T_178; + end + end + always @(posedge io_lsu_free_c2_clk or posedge reset) begin + if (reset) begin + lsu_double_ecc_error_r_ff <= 1'h0; + end else begin + lsu_double_ecc_error_r_ff <= io_lsu_double_ecc_error_r; + end + end + always @(posedge io_lsu_free_c2_clk or posedge reset) begin + if (reset) begin + ld_single_ecc_error_hi_r_ff <= 1'h0; + end else begin + ld_single_ecc_error_hi_r_ff <= _T_245 & _T_246; + end + end + always @(posedge io_lsu_free_c2_clk or posedge reset) begin + if (reset) begin + ld_single_ecc_error_lo_r_ff <= 1'h0; + end else begin + ld_single_ecc_error_lo_r_ff <= _T_242 & _T_243; + end + end + always @(posedge rvclkhdr_io_l1clk or posedge reset) begin + if (reset) begin + ld_sec_addr_hi_r_ff <= 16'h0; + end else begin + ld_sec_addr_hi_r_ff <= io_end_addr_r; + end + end + always @(posedge rvclkhdr_1_io_l1clk or posedge reset) begin + if (reset) begin + ld_sec_addr_lo_r_ff <= 16'h0; + end else begin + ld_sec_addr_lo_r_ff <= io_lsu_addr_r[15:0]; + end + end + always @(posedge io_lsu_c2_m_clk or posedge reset) begin + if (reset) begin + _T_603 <= 1'h0; + end else begin + _T_603 <= _T_260 & io_addr_in_dccm_d; + end + end + always @(posedge io_lsu_c2_r_clk or posedge reset) begin + if (reset) begin + _T_604 <= 1'h0; + end else begin + _T_604 <= io_lsu_dccm_rden_m; + end + end +endmodule diff --git a/el2_lsu_ecc.anno.json b/el2_lsu_ecc.anno.json new file mode 100644 index 00000000..edc49ded --- /dev/null +++ b/el2_lsu_ecc.anno.json @@ -0,0 +1,343 @@ +[ + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_ecc|el2_lsu_ecc>io_lsu_single_ecc_error_r", + "sources":[ + "~el2_lsu_ecc|el2_lsu_ecc>io_single_ecc_error_hi_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_single_ecc_error_lo_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_dec_tlu_core_ecc_disable", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_data_ecc_hi_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_data_ecc_hi_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_data_ecc_lo_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_data_ecc_lo_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_r_dma", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_m_dma", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_rdata_hi_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_rdata_hi_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_dccm_rden_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_dccm_rden_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_rdata_lo_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_rdata_lo_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_addr_in_dccm_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_addr_in_dccm_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_r_valid", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_m_valid", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_addr_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_end_addr_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_addr_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_end_addr_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_r_load", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_r_store", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_m_load", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_m_store" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_ecc|el2_lsu_ecc>io_lsu_double_ecc_error_m", + "sources":[ + "~el2_lsu_ecc|el2_lsu_ecc>io_dec_tlu_core_ecc_disable", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_r_dma", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_m_dma", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_data_ecc_hi_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_data_ecc_hi_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_data_ecc_lo_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_data_ecc_lo_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_dccm_rden_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_dccm_rden_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_rdata_hi_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_rdata_hi_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_addr_in_dccm_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_addr_in_dccm_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_rdata_lo_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_rdata_lo_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_r_valid", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_m_valid", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_addr_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_end_addr_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_addr_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_end_addr_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_r_load", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_r_store", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_m_load", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_m_store" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_ecc|el2_lsu_ecc>io_sec_data_hi_r", + "sources":[ + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_data_ecc_hi_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_data_ecc_hi_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_rdata_hi_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_rdata_hi_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_dec_tlu_core_ecc_disable", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_r_dma", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_m_dma", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_dccm_rden_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_dccm_rden_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_addr_in_dccm_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_addr_in_dccm_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_r_valid", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_addr_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_end_addr_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_m_valid", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_addr_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_end_addr_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_r_load", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_r_store", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_m_load", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_m_store" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_ecc|el2_lsu_ecc>io_sec_data_ecc_lo_r_ff", + "sources":[ + "~el2_lsu_ecc|el2_lsu_ecc>io_sec_data_lo_r_ff", + "~el2_lsu_ecc|el2_lsu_ecc>io_ld_single_ecc_error_r_ff", + "~el2_lsu_ecc|el2_lsu_ecc>io_dma_dccm_wdata_lo", + "~el2_lsu_ecc|el2_lsu_ecc>io_stbuf_data_any", + "~el2_lsu_ecc|el2_lsu_ecc>io_dma_dccm_wen" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_ecc|el2_lsu_ecc>io_single_ecc_error_lo_r", + "sources":[ + "~el2_lsu_ecc|el2_lsu_ecc>io_dec_tlu_core_ecc_disable", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_data_ecc_lo_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_data_ecc_lo_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_dccm_rden_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_dccm_rden_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_rdata_lo_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_rdata_lo_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_addr_in_dccm_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_addr_in_dccm_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_r_valid", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_m_valid", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_r_load", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_r_store", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_m_load", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_m_store" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_ecc|el2_lsu_ecc>io_sec_data_lo_m", + "sources":[ + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_data_ecc_lo_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_data_ecc_lo_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_rdata_lo_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_rdata_lo_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_dec_tlu_core_ecc_disable", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_dccm_rden_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_dccm_rden_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_addr_in_dccm_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_addr_in_dccm_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_r_valid", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_m_valid", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_r_load", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_r_store", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_m_load", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_m_store" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_ecc|el2_lsu_ecc>io_sec_data_ecc_hi_r_ff", + "sources":[ + "~el2_lsu_ecc|el2_lsu_ecc>io_sec_data_hi_r_ff", + "~el2_lsu_ecc|el2_lsu_ecc>io_ld_single_ecc_error_r_ff", + "~el2_lsu_ecc|el2_lsu_ecc>io_dma_dccm_wdata_hi", + "~el2_lsu_ecc|el2_lsu_ecc>io_stbuf_data_any", + "~el2_lsu_ecc|el2_lsu_ecc>io_dma_dccm_wen" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_ecc|el2_lsu_ecc>io_lsu_double_ecc_error_r", + "sources":[ + "~el2_lsu_ecc|el2_lsu_ecc>io_dec_tlu_core_ecc_disable", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_r_dma", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_m_dma", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_data_ecc_hi_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_data_ecc_hi_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_data_ecc_lo_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_data_ecc_lo_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_dccm_rden_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_dccm_rden_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_rdata_hi_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_rdata_hi_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_addr_in_dccm_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_addr_in_dccm_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_rdata_lo_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_rdata_lo_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_r_valid", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_m_valid", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_addr_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_end_addr_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_addr_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_end_addr_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_r_load", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_r_store", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_m_load", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_m_store" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_ecc|el2_lsu_ecc>io_single_ecc_error_hi_r", + "sources":[ + "~el2_lsu_ecc|el2_lsu_ecc>io_dec_tlu_core_ecc_disable", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_data_ecc_hi_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_data_ecc_hi_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_r_dma", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_m_dma", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_rdata_hi_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_rdata_hi_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_dccm_rden_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_dccm_rden_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_addr_in_dccm_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_addr_in_dccm_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_r_valid", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_addr_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_end_addr_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_m_valid", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_addr_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_end_addr_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_r_load", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_r_store", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_m_load", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_m_store" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_ecc|el2_lsu_ecc>io_sec_data_lo_r", + "sources":[ + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_data_ecc_lo_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_data_ecc_lo_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_rdata_lo_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_rdata_lo_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_dec_tlu_core_ecc_disable", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_dccm_rden_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_dccm_rden_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_addr_in_dccm_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_addr_in_dccm_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_r_valid", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_m_valid", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_r_load", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_r_store", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_m_load", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_m_store" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_ecc|el2_lsu_ecc>io_sec_data_hi_m", + "sources":[ + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_data_ecc_hi_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_data_ecc_hi_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_rdata_hi_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_rdata_hi_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_dec_tlu_core_ecc_disable", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_r_dma", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_m_dma", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_dccm_rden_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_dccm_rden_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_addr_in_dccm_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_addr_in_dccm_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_r_valid", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_addr_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_end_addr_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_m_valid", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_addr_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_end_addr_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_r_load", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_r_store", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_m_load", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_m_store" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_ecc|el2_lsu_ecc>io_lsu_single_ecc_error_m", + "sources":[ + "~el2_lsu_ecc|el2_lsu_ecc>io_dec_tlu_core_ecc_disable", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_data_ecc_hi_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_data_ecc_hi_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_data_ecc_lo_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_data_ecc_lo_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_r_dma", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_m_dma", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_rdata_hi_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_rdata_hi_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_dccm_rden_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_dccm_rden_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_rdata_lo_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_dccm_rdata_lo_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_addr_in_dccm_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_addr_in_dccm_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_r_valid", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_m_valid", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_addr_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_end_addr_r", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_addr_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_end_addr_m", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_r_load", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_r_store", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_m_load", + "~el2_lsu_ecc|el2_lsu_ecc>io_lsu_pkt_m_store" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_ecc|el2_lsu_ecc>io_dma_dccm_wdata_ecc_hi", + "sources":[ + "~el2_lsu_ecc|el2_lsu_ecc>io_sec_data_hi_r_ff", + "~el2_lsu_ecc|el2_lsu_ecc>io_ld_single_ecc_error_r_ff", + "~el2_lsu_ecc|el2_lsu_ecc>io_dma_dccm_wdata_hi", + "~el2_lsu_ecc|el2_lsu_ecc>io_stbuf_data_any", + "~el2_lsu_ecc|el2_lsu_ecc>io_dma_dccm_wen" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_ecc|el2_lsu_ecc>io_dma_dccm_wdata_ecc_lo", + "sources":[ + "~el2_lsu_ecc|el2_lsu_ecc>io_sec_data_lo_r_ff", + "~el2_lsu_ecc|el2_lsu_ecc>io_ld_single_ecc_error_r_ff", + "~el2_lsu_ecc|el2_lsu_ecc>io_dma_dccm_wdata_lo", + "~el2_lsu_ecc|el2_lsu_ecc>io_stbuf_data_any", + "~el2_lsu_ecc|el2_lsu_ecc>io_dma_dccm_wen" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_ecc|el2_lsu_ecc>io_stbuf_ecc_any", + "sources":[ + "~el2_lsu_ecc|el2_lsu_ecc>io_sec_data_lo_r_ff", + "~el2_lsu_ecc|el2_lsu_ecc>io_ld_single_ecc_error_r_ff", + "~el2_lsu_ecc|el2_lsu_ecc>io_dma_dccm_wdata_lo", + "~el2_lsu_ecc|el2_lsu_ecc>io_stbuf_data_any", + "~el2_lsu_ecc|el2_lsu_ecc>io_dma_dccm_wen" + ] + }, + { + "class":"firrtl.EmitCircuitAnnotation", + "emitter":"firrtl.VerilogEmitter" + }, + { + "class":"firrtl.options.TargetDirAnnotation", + "directory":"." + }, + { + "class":"firrtl.options.OutputAnnotationFileAnnotation", + "file":"el2_lsu_ecc" + }, + { + "class":"firrtl.transforms.BlackBoxTargetDirAnno", + "targetDir":"." + } +] \ No newline at end of file diff --git a/el2_lsu_ecc.fir b/el2_lsu_ecc.fir new file mode 100644 index 00000000..97b9f6cd --- /dev/null +++ b/el2_lsu_ecc.fir @@ -0,0 +1,1755 @@ +;buildInfoPackage: chisel3, version: 3.3.1, scalaVersion: 2.12.11, sbtVersion: 1.3.10 +circuit el2_lsu_ecc : + module el2_lsu_ecc : + input clock : Clock + input reset : AsyncReset + output io : {flip lsu_c2_r_clk : Clock, flip lsu_pkt_m : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip lsu_pkt_r : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip stbuf_data_any : UInt<32>, flip dec_tlu_core_ecc_disable : UInt<1>, flip lsu_dccm_rden_r : UInt<1>, flip addr_in_dccm_r : UInt<1>, flip lsu_addr_r : UInt<16>, flip end_addr_r : UInt<16>, flip lsu_addr_m : UInt<16>, flip end_addr_m : UInt<16>, flip dccm_rdata_hi_r : UInt<32>, flip dccm_rdata_lo_r : UInt<32>, flip dccm_rdata_hi_m : UInt<32>, flip dccm_rdata_lo_m : UInt<32>, flip dccm_data_ecc_hi_r : UInt<7>, flip dccm_data_ecc_lo_r : UInt<7>, flip dccm_data_ecc_hi_m : UInt<7>, flip dccm_data_ecc_lo_m : UInt<7>, flip ld_single_ecc_error_r : UInt<1>, flip ld_single_ecc_error_r_ff : UInt<1>, flip lsu_dccm_rden_m : UInt<1>, flip addr_in_dccm_m : UInt<1>, flip dma_dccm_wen : UInt<1>, flip dma_dccm_wdata_lo : UInt<32>, flip dma_dccm_wdata_hi : UInt<32>, flip scan_mode : UInt<1>, sec_data_hi_r : UInt<32>, sec_data_lo_r : UInt<32>, sec_data_hi_m : UInt<32>, sec_data_lo_m : UInt<32>, sec_data_hi_r_ff : UInt<32>, sec_data_lo_r_ff : UInt<32>, dma_dccm_wdata_ecc_hi : UInt<7>, dma_dccm_wdata_ecc_lo : UInt<7>, stbuf_ecc_any : UInt<7>, sec_data_ecc_hi_r_ff : UInt<7>, sec_data_ecc_lo_r_ff : UInt<7>, single_ecc_error_hi_r : UInt<1>, single_ecc_error_lo_r : UInt<1>, lsu_single_ecc_error_r : UInt<1>, lsu_double_ecc_error_r : UInt<1>, lsu_single_ecc_error_m : UInt<1>, lsu_double_ecc_error_m : UInt<1>} + + wire is_ldst_r : UInt<1> + is_ldst_r <= UInt<1>("h00") + wire is_ldst_hi_any : UInt<1> + is_ldst_hi_any <= UInt<1>("h00") + wire is_ldst_lo_any : UInt<1> + is_ldst_lo_any <= UInt<1>("h00") + wire dccm_wdata_hi_any : UInt<32> + dccm_wdata_hi_any <= UInt<32>("h00") + wire dccm_wdata_lo_any : UInt<32> + dccm_wdata_lo_any <= UInt<32>("h00") + wire dccm_rdata_hi_any : UInt<32> + dccm_rdata_hi_any <= UInt<32>("h00") + wire dccm_rdata_lo_any : UInt<32> + dccm_rdata_lo_any <= UInt<32>("h00") + wire dccm_data_ecc_hi_any : UInt<7> + dccm_data_ecc_hi_any <= UInt<7>("h00") + wire dccm_data_ecc_lo_any : UInt<7> + dccm_data_ecc_lo_any <= UInt<7>("h00") + wire double_ecc_error_hi_m : UInt<1> + double_ecc_error_hi_m <= UInt<1>("h00") + wire double_ecc_error_lo_m : UInt<1> + double_ecc_error_lo_m <= UInt<1>("h00") + wire double_ecc_error_hi_r : UInt<1> + double_ecc_error_hi_r <= UInt<1>("h00") + wire double_ecc_error_lo_r : UInt<1> + double_ecc_error_lo_r <= UInt<1>("h00") + wire ldst_dual_m : UInt<1> + ldst_dual_m <= UInt<1>("h00") + wire ldst_dual_r : UInt<1> + ldst_dual_r <= UInt<1>("h00") + wire is_ldst_m : UInt<1> + is_ldst_m <= UInt<1>("h00") + wire is_ldst_hi_m : UInt<1> + is_ldst_hi_m <= UInt<1>("h00") + wire is_ldst_lo_m : UInt<1> + is_ldst_lo_m <= UInt<1>("h00") + wire is_ldst_hi_r : UInt<1> + is_ldst_hi_r <= UInt<1>("h00") + wire is_ldst_lo_r : UInt<1> + is_ldst_lo_r <= UInt<1>("h00") + io.sec_data_hi_m <= UInt<1>("h00") @[el2_lsu_ecc.scala 90:32] + io.sec_data_lo_m <= UInt<1>("h00") @[el2_lsu_ecc.scala 91:32] + io.lsu_single_ecc_error_m <= UInt<1>("h00") @[el2_lsu_ecc.scala 92:30] + io.lsu_double_ecc_error_m <= UInt<1>("h00") @[el2_lsu_ecc.scala 93:30] + wire _T : UInt<1>[18] @[el2_lib.scala 294:18] + wire _T_1 : UInt<1>[18] @[el2_lib.scala 295:18] + wire _T_2 : UInt<1>[18] @[el2_lib.scala 296:18] + wire _T_3 : UInt<1>[15] @[el2_lib.scala 297:18] + wire _T_4 : UInt<1>[15] @[el2_lib.scala 298:18] + wire _T_5 : UInt<1>[6] @[el2_lib.scala 299:18] + node _T_6 = bits(dccm_rdata_hi_any, 0, 0) @[el2_lib.scala 310:21] + _T[0] <= _T_6 @[el2_lib.scala 310:15] + node _T_7 = bits(dccm_rdata_hi_any, 0, 0) @[el2_lib.scala 313:21] + _T_1[0] <= _T_7 @[el2_lib.scala 313:15] + node _T_8 = bits(dccm_rdata_hi_any, 1, 1) @[el2_lib.scala 310:21] + _T[1] <= _T_8 @[el2_lib.scala 310:15] + node _T_9 = bits(dccm_rdata_hi_any, 1, 1) @[el2_lib.scala 316:21] + _T_2[0] <= _T_9 @[el2_lib.scala 316:15] + node _T_10 = bits(dccm_rdata_hi_any, 2, 2) @[el2_lib.scala 313:21] + _T_1[1] <= _T_10 @[el2_lib.scala 313:15] + node _T_11 = bits(dccm_rdata_hi_any, 2, 2) @[el2_lib.scala 316:21] + _T_2[1] <= _T_11 @[el2_lib.scala 316:15] + node _T_12 = bits(dccm_rdata_hi_any, 3, 3) @[el2_lib.scala 310:21] + _T[2] <= _T_12 @[el2_lib.scala 310:15] + node _T_13 = bits(dccm_rdata_hi_any, 3, 3) @[el2_lib.scala 313:21] + _T_1[2] <= _T_13 @[el2_lib.scala 313:15] + node _T_14 = bits(dccm_rdata_hi_any, 3, 3) @[el2_lib.scala 316:21] + _T_2[2] <= _T_14 @[el2_lib.scala 316:15] + node _T_15 = bits(dccm_rdata_hi_any, 4, 4) @[el2_lib.scala 310:21] + _T[3] <= _T_15 @[el2_lib.scala 310:15] + node _T_16 = bits(dccm_rdata_hi_any, 4, 4) @[el2_lib.scala 319:21] + _T_3[0] <= _T_16 @[el2_lib.scala 319:15] + node _T_17 = bits(dccm_rdata_hi_any, 5, 5) @[el2_lib.scala 313:21] + _T_1[3] <= _T_17 @[el2_lib.scala 313:15] + node _T_18 = bits(dccm_rdata_hi_any, 5, 5) @[el2_lib.scala 319:21] + _T_3[1] <= _T_18 @[el2_lib.scala 319:15] + node _T_19 = bits(dccm_rdata_hi_any, 6, 6) @[el2_lib.scala 310:21] + _T[4] <= _T_19 @[el2_lib.scala 310:15] + node _T_20 = bits(dccm_rdata_hi_any, 6, 6) @[el2_lib.scala 313:21] + _T_1[4] <= _T_20 @[el2_lib.scala 313:15] + node _T_21 = bits(dccm_rdata_hi_any, 6, 6) @[el2_lib.scala 319:21] + _T_3[2] <= _T_21 @[el2_lib.scala 319:15] + node _T_22 = bits(dccm_rdata_hi_any, 7, 7) @[el2_lib.scala 316:21] + _T_2[3] <= _T_22 @[el2_lib.scala 316:15] + node _T_23 = bits(dccm_rdata_hi_any, 7, 7) @[el2_lib.scala 319:21] + _T_3[3] <= _T_23 @[el2_lib.scala 319:15] + node _T_24 = bits(dccm_rdata_hi_any, 8, 8) @[el2_lib.scala 310:21] + _T[5] <= _T_24 @[el2_lib.scala 310:15] + node _T_25 = bits(dccm_rdata_hi_any, 8, 8) @[el2_lib.scala 316:21] + _T_2[4] <= _T_25 @[el2_lib.scala 316:15] + node _T_26 = bits(dccm_rdata_hi_any, 8, 8) @[el2_lib.scala 319:21] + _T_3[4] <= _T_26 @[el2_lib.scala 319:15] + node _T_27 = bits(dccm_rdata_hi_any, 9, 9) @[el2_lib.scala 313:21] + _T_1[5] <= _T_27 @[el2_lib.scala 313:15] + node _T_28 = bits(dccm_rdata_hi_any, 9, 9) @[el2_lib.scala 316:21] + _T_2[5] <= _T_28 @[el2_lib.scala 316:15] + node _T_29 = bits(dccm_rdata_hi_any, 9, 9) @[el2_lib.scala 319:21] + _T_3[5] <= _T_29 @[el2_lib.scala 319:15] + node _T_30 = bits(dccm_rdata_hi_any, 10, 10) @[el2_lib.scala 310:21] + _T[6] <= _T_30 @[el2_lib.scala 310:15] + node _T_31 = bits(dccm_rdata_hi_any, 10, 10) @[el2_lib.scala 313:21] + _T_1[6] <= _T_31 @[el2_lib.scala 313:15] + node _T_32 = bits(dccm_rdata_hi_any, 10, 10) @[el2_lib.scala 316:21] + _T_2[6] <= _T_32 @[el2_lib.scala 316:15] + node _T_33 = bits(dccm_rdata_hi_any, 10, 10) @[el2_lib.scala 319:21] + _T_3[6] <= _T_33 @[el2_lib.scala 319:15] + node _T_34 = bits(dccm_rdata_hi_any, 11, 11) @[el2_lib.scala 310:21] + _T[7] <= _T_34 @[el2_lib.scala 310:15] + node _T_35 = bits(dccm_rdata_hi_any, 11, 11) @[el2_lib.scala 322:21] + _T_4[0] <= _T_35 @[el2_lib.scala 322:15] + node _T_36 = bits(dccm_rdata_hi_any, 12, 12) @[el2_lib.scala 313:21] + _T_1[7] <= _T_36 @[el2_lib.scala 313:15] + node _T_37 = bits(dccm_rdata_hi_any, 12, 12) @[el2_lib.scala 322:21] + _T_4[1] <= _T_37 @[el2_lib.scala 322:15] + node _T_38 = bits(dccm_rdata_hi_any, 13, 13) @[el2_lib.scala 310:21] + _T[8] <= _T_38 @[el2_lib.scala 310:15] + node _T_39 = bits(dccm_rdata_hi_any, 13, 13) @[el2_lib.scala 313:21] + _T_1[8] <= _T_39 @[el2_lib.scala 313:15] + node _T_40 = bits(dccm_rdata_hi_any, 13, 13) @[el2_lib.scala 322:21] + _T_4[2] <= _T_40 @[el2_lib.scala 322:15] + node _T_41 = bits(dccm_rdata_hi_any, 14, 14) @[el2_lib.scala 316:21] + _T_2[7] <= _T_41 @[el2_lib.scala 316:15] + node _T_42 = bits(dccm_rdata_hi_any, 14, 14) @[el2_lib.scala 322:21] + _T_4[3] <= _T_42 @[el2_lib.scala 322:15] + node _T_43 = bits(dccm_rdata_hi_any, 15, 15) @[el2_lib.scala 310:21] + _T[9] <= _T_43 @[el2_lib.scala 310:15] + node _T_44 = bits(dccm_rdata_hi_any, 15, 15) @[el2_lib.scala 316:21] + _T_2[8] <= _T_44 @[el2_lib.scala 316:15] + node _T_45 = bits(dccm_rdata_hi_any, 15, 15) @[el2_lib.scala 322:21] + _T_4[4] <= _T_45 @[el2_lib.scala 322:15] + node _T_46 = bits(dccm_rdata_hi_any, 16, 16) @[el2_lib.scala 313:21] + _T_1[9] <= _T_46 @[el2_lib.scala 313:15] + node _T_47 = bits(dccm_rdata_hi_any, 16, 16) @[el2_lib.scala 316:21] + _T_2[9] <= _T_47 @[el2_lib.scala 316:15] + node _T_48 = bits(dccm_rdata_hi_any, 16, 16) @[el2_lib.scala 322:21] + _T_4[5] <= _T_48 @[el2_lib.scala 322:15] + node _T_49 = bits(dccm_rdata_hi_any, 17, 17) @[el2_lib.scala 310:21] + _T[10] <= _T_49 @[el2_lib.scala 310:15] + node _T_50 = bits(dccm_rdata_hi_any, 17, 17) @[el2_lib.scala 313:21] + _T_1[10] <= _T_50 @[el2_lib.scala 313:15] + node _T_51 = bits(dccm_rdata_hi_any, 17, 17) @[el2_lib.scala 316:21] + _T_2[10] <= _T_51 @[el2_lib.scala 316:15] + node _T_52 = bits(dccm_rdata_hi_any, 17, 17) @[el2_lib.scala 322:21] + _T_4[6] <= _T_52 @[el2_lib.scala 322:15] + node _T_53 = bits(dccm_rdata_hi_any, 18, 18) @[el2_lib.scala 319:21] + _T_3[7] <= _T_53 @[el2_lib.scala 319:15] + node _T_54 = bits(dccm_rdata_hi_any, 18, 18) @[el2_lib.scala 322:21] + _T_4[7] <= _T_54 @[el2_lib.scala 322:15] + node _T_55 = bits(dccm_rdata_hi_any, 19, 19) @[el2_lib.scala 310:21] + _T[11] <= _T_55 @[el2_lib.scala 310:15] + node _T_56 = bits(dccm_rdata_hi_any, 19, 19) @[el2_lib.scala 319:21] + _T_3[8] <= _T_56 @[el2_lib.scala 319:15] + node _T_57 = bits(dccm_rdata_hi_any, 19, 19) @[el2_lib.scala 322:21] + _T_4[8] <= _T_57 @[el2_lib.scala 322:15] + node _T_58 = bits(dccm_rdata_hi_any, 20, 20) @[el2_lib.scala 313:21] + _T_1[11] <= _T_58 @[el2_lib.scala 313:15] + node _T_59 = bits(dccm_rdata_hi_any, 20, 20) @[el2_lib.scala 319:21] + _T_3[9] <= _T_59 @[el2_lib.scala 319:15] + node _T_60 = bits(dccm_rdata_hi_any, 20, 20) @[el2_lib.scala 322:21] + _T_4[9] <= _T_60 @[el2_lib.scala 322:15] + node _T_61 = bits(dccm_rdata_hi_any, 21, 21) @[el2_lib.scala 310:21] + _T[12] <= _T_61 @[el2_lib.scala 310:15] + node _T_62 = bits(dccm_rdata_hi_any, 21, 21) @[el2_lib.scala 313:21] + _T_1[12] <= _T_62 @[el2_lib.scala 313:15] + node _T_63 = bits(dccm_rdata_hi_any, 21, 21) @[el2_lib.scala 319:21] + _T_3[10] <= _T_63 @[el2_lib.scala 319:15] + node _T_64 = bits(dccm_rdata_hi_any, 21, 21) @[el2_lib.scala 322:21] + _T_4[10] <= _T_64 @[el2_lib.scala 322:15] + node _T_65 = bits(dccm_rdata_hi_any, 22, 22) @[el2_lib.scala 316:21] + _T_2[11] <= _T_65 @[el2_lib.scala 316:15] + node _T_66 = bits(dccm_rdata_hi_any, 22, 22) @[el2_lib.scala 319:21] + _T_3[11] <= _T_66 @[el2_lib.scala 319:15] + node _T_67 = bits(dccm_rdata_hi_any, 22, 22) @[el2_lib.scala 322:21] + _T_4[11] <= _T_67 @[el2_lib.scala 322:15] + node _T_68 = bits(dccm_rdata_hi_any, 23, 23) @[el2_lib.scala 310:21] + _T[13] <= _T_68 @[el2_lib.scala 310:15] + node _T_69 = bits(dccm_rdata_hi_any, 23, 23) @[el2_lib.scala 316:21] + _T_2[12] <= _T_69 @[el2_lib.scala 316:15] + node _T_70 = bits(dccm_rdata_hi_any, 23, 23) @[el2_lib.scala 319:21] + _T_3[12] <= _T_70 @[el2_lib.scala 319:15] + node _T_71 = bits(dccm_rdata_hi_any, 23, 23) @[el2_lib.scala 322:21] + _T_4[12] <= _T_71 @[el2_lib.scala 322:15] + node _T_72 = bits(dccm_rdata_hi_any, 24, 24) @[el2_lib.scala 313:21] + _T_1[13] <= _T_72 @[el2_lib.scala 313:15] + node _T_73 = bits(dccm_rdata_hi_any, 24, 24) @[el2_lib.scala 316:21] + _T_2[13] <= _T_73 @[el2_lib.scala 316:15] + node _T_74 = bits(dccm_rdata_hi_any, 24, 24) @[el2_lib.scala 319:21] + _T_3[13] <= _T_74 @[el2_lib.scala 319:15] + node _T_75 = bits(dccm_rdata_hi_any, 24, 24) @[el2_lib.scala 322:21] + _T_4[13] <= _T_75 @[el2_lib.scala 322:15] + node _T_76 = bits(dccm_rdata_hi_any, 25, 25) @[el2_lib.scala 310:21] + _T[14] <= _T_76 @[el2_lib.scala 310:15] + node _T_77 = bits(dccm_rdata_hi_any, 25, 25) @[el2_lib.scala 313:21] + _T_1[14] <= _T_77 @[el2_lib.scala 313:15] + node _T_78 = bits(dccm_rdata_hi_any, 25, 25) @[el2_lib.scala 316:21] + _T_2[14] <= _T_78 @[el2_lib.scala 316:15] + node _T_79 = bits(dccm_rdata_hi_any, 25, 25) @[el2_lib.scala 319:21] + _T_3[14] <= _T_79 @[el2_lib.scala 319:15] + node _T_80 = bits(dccm_rdata_hi_any, 25, 25) @[el2_lib.scala 322:21] + _T_4[14] <= _T_80 @[el2_lib.scala 322:15] + node _T_81 = bits(dccm_rdata_hi_any, 26, 26) @[el2_lib.scala 310:21] + _T[15] <= _T_81 @[el2_lib.scala 310:15] + node _T_82 = bits(dccm_rdata_hi_any, 26, 26) @[el2_lib.scala 325:21] + _T_5[0] <= _T_82 @[el2_lib.scala 325:15] + node _T_83 = bits(dccm_rdata_hi_any, 27, 27) @[el2_lib.scala 313:21] + _T_1[15] <= _T_83 @[el2_lib.scala 313:15] + node _T_84 = bits(dccm_rdata_hi_any, 27, 27) @[el2_lib.scala 325:21] + _T_5[1] <= _T_84 @[el2_lib.scala 325:15] + node _T_85 = bits(dccm_rdata_hi_any, 28, 28) @[el2_lib.scala 310:21] + _T[16] <= _T_85 @[el2_lib.scala 310:15] + node _T_86 = bits(dccm_rdata_hi_any, 28, 28) @[el2_lib.scala 313:21] + _T_1[16] <= _T_86 @[el2_lib.scala 313:15] + node _T_87 = bits(dccm_rdata_hi_any, 28, 28) @[el2_lib.scala 325:21] + _T_5[2] <= _T_87 @[el2_lib.scala 325:15] + node _T_88 = bits(dccm_rdata_hi_any, 29, 29) @[el2_lib.scala 316:21] + _T_2[15] <= _T_88 @[el2_lib.scala 316:15] + node _T_89 = bits(dccm_rdata_hi_any, 29, 29) @[el2_lib.scala 325:21] + _T_5[3] <= _T_89 @[el2_lib.scala 325:15] + node _T_90 = bits(dccm_rdata_hi_any, 30, 30) @[el2_lib.scala 310:21] + _T[17] <= _T_90 @[el2_lib.scala 310:15] + node _T_91 = bits(dccm_rdata_hi_any, 30, 30) @[el2_lib.scala 316:21] + _T_2[16] <= _T_91 @[el2_lib.scala 316:15] + node _T_92 = bits(dccm_rdata_hi_any, 30, 30) @[el2_lib.scala 325:21] + _T_5[4] <= _T_92 @[el2_lib.scala 325:15] + node _T_93 = bits(dccm_rdata_hi_any, 31, 31) @[el2_lib.scala 313:21] + _T_1[17] <= _T_93 @[el2_lib.scala 313:15] + node _T_94 = bits(dccm_rdata_hi_any, 31, 31) @[el2_lib.scala 316:21] + _T_2[17] <= _T_94 @[el2_lib.scala 316:15] + node _T_95 = bits(dccm_rdata_hi_any, 31, 31) @[el2_lib.scala 325:21] + _T_5[5] <= _T_95 @[el2_lib.scala 325:15] + node _T_96 = xorr(dccm_rdata_hi_any) @[el2_lib.scala 329:30] + node _T_97 = xorr(dccm_data_ecc_hi_any) @[el2_lib.scala 329:44] + node _T_98 = xor(_T_96, _T_97) @[el2_lib.scala 329:35] + node _T_99 = not(UInt<1>("h00")) @[el2_lib.scala 329:52] + node _T_100 = and(_T_98, _T_99) @[el2_lib.scala 329:50] + node _T_101 = bits(dccm_data_ecc_hi_any, 5, 5) @[el2_lib.scala 329:68] + node _T_102 = cat(_T_5[2], _T_5[1]) @[el2_lib.scala 329:78] + node _T_103 = cat(_T_102, _T_5[0]) @[el2_lib.scala 329:78] + node _T_104 = cat(_T_5[5], _T_5[4]) @[el2_lib.scala 329:78] + node _T_105 = cat(_T_104, _T_5[3]) @[el2_lib.scala 329:78] + node _T_106 = cat(_T_105, _T_103) @[el2_lib.scala 329:78] + node _T_107 = xorr(_T_106) @[el2_lib.scala 329:85] + node _T_108 = xor(_T_101, _T_107) @[el2_lib.scala 329:72] + node _T_109 = bits(dccm_data_ecc_hi_any, 4, 4) @[el2_lib.scala 329:98] + node _T_110 = cat(_T_4[2], _T_4[1]) @[el2_lib.scala 329:108] + node _T_111 = cat(_T_110, _T_4[0]) @[el2_lib.scala 329:108] + node _T_112 = cat(_T_4[4], _T_4[3]) @[el2_lib.scala 329:108] + node _T_113 = cat(_T_4[6], _T_4[5]) @[el2_lib.scala 329:108] + node _T_114 = cat(_T_113, _T_112) @[el2_lib.scala 329:108] + node _T_115 = cat(_T_114, _T_111) @[el2_lib.scala 329:108] + node _T_116 = cat(_T_4[8], _T_4[7]) @[el2_lib.scala 329:108] + node _T_117 = cat(_T_4[10], _T_4[9]) @[el2_lib.scala 329:108] + node _T_118 = cat(_T_117, _T_116) @[el2_lib.scala 329:108] + node _T_119 = cat(_T_4[12], _T_4[11]) @[el2_lib.scala 329:108] + node _T_120 = cat(_T_4[14], _T_4[13]) @[el2_lib.scala 329:108] + node _T_121 = cat(_T_120, _T_119) @[el2_lib.scala 329:108] + node _T_122 = cat(_T_121, _T_118) @[el2_lib.scala 329:108] + node _T_123 = cat(_T_122, _T_115) @[el2_lib.scala 329:108] + node _T_124 = xorr(_T_123) @[el2_lib.scala 329:115] + node _T_125 = xor(_T_109, _T_124) @[el2_lib.scala 329:102] + node _T_126 = bits(dccm_data_ecc_hi_any, 3, 3) @[el2_lib.scala 329:128] + node _T_127 = cat(_T_3[2], _T_3[1]) @[el2_lib.scala 329:138] + node _T_128 = cat(_T_127, _T_3[0]) @[el2_lib.scala 329:138] + node _T_129 = cat(_T_3[4], _T_3[3]) @[el2_lib.scala 329:138] + node _T_130 = cat(_T_3[6], _T_3[5]) @[el2_lib.scala 329:138] + node _T_131 = cat(_T_130, _T_129) @[el2_lib.scala 329:138] + node _T_132 = cat(_T_131, _T_128) @[el2_lib.scala 329:138] + node _T_133 = cat(_T_3[8], _T_3[7]) @[el2_lib.scala 329:138] + node _T_134 = cat(_T_3[10], _T_3[9]) @[el2_lib.scala 329:138] + node _T_135 = cat(_T_134, _T_133) @[el2_lib.scala 329:138] + node _T_136 = cat(_T_3[12], _T_3[11]) @[el2_lib.scala 329:138] + node _T_137 = cat(_T_3[14], _T_3[13]) @[el2_lib.scala 329:138] + node _T_138 = cat(_T_137, _T_136) @[el2_lib.scala 329:138] + node _T_139 = cat(_T_138, _T_135) @[el2_lib.scala 329:138] + node _T_140 = cat(_T_139, _T_132) @[el2_lib.scala 329:138] + node _T_141 = xorr(_T_140) @[el2_lib.scala 329:145] + node _T_142 = xor(_T_126, _T_141) @[el2_lib.scala 329:132] + node _T_143 = bits(dccm_data_ecc_hi_any, 2, 2) @[el2_lib.scala 329:158] + node _T_144 = cat(_T_2[1], _T_2[0]) @[el2_lib.scala 329:168] + node _T_145 = cat(_T_2[3], _T_2[2]) @[el2_lib.scala 329:168] + node _T_146 = cat(_T_145, _T_144) @[el2_lib.scala 329:168] + node _T_147 = cat(_T_2[5], _T_2[4]) @[el2_lib.scala 329:168] + node _T_148 = cat(_T_2[8], _T_2[7]) @[el2_lib.scala 329:168] + node _T_149 = cat(_T_148, _T_2[6]) @[el2_lib.scala 329:168] + node _T_150 = cat(_T_149, _T_147) @[el2_lib.scala 329:168] + node _T_151 = cat(_T_150, _T_146) @[el2_lib.scala 329:168] + node _T_152 = cat(_T_2[10], _T_2[9]) @[el2_lib.scala 329:168] + node _T_153 = cat(_T_2[12], _T_2[11]) @[el2_lib.scala 329:168] + node _T_154 = cat(_T_153, _T_152) @[el2_lib.scala 329:168] + node _T_155 = cat(_T_2[14], _T_2[13]) @[el2_lib.scala 329:168] + node _T_156 = cat(_T_2[17], _T_2[16]) @[el2_lib.scala 329:168] + node _T_157 = cat(_T_156, _T_2[15]) @[el2_lib.scala 329:168] + node _T_158 = cat(_T_157, _T_155) @[el2_lib.scala 329:168] + node _T_159 = cat(_T_158, _T_154) @[el2_lib.scala 329:168] + node _T_160 = cat(_T_159, _T_151) @[el2_lib.scala 329:168] + node _T_161 = xorr(_T_160) @[el2_lib.scala 329:175] + node _T_162 = xor(_T_143, _T_161) @[el2_lib.scala 329:162] + node _T_163 = bits(dccm_data_ecc_hi_any, 1, 1) @[el2_lib.scala 329:188] + node _T_164 = cat(_T_1[1], _T_1[0]) @[el2_lib.scala 329:198] + node _T_165 = cat(_T_1[3], _T_1[2]) @[el2_lib.scala 329:198] + node _T_166 = cat(_T_165, _T_164) @[el2_lib.scala 329:198] + node _T_167 = cat(_T_1[5], _T_1[4]) @[el2_lib.scala 329:198] + node _T_168 = cat(_T_1[8], _T_1[7]) @[el2_lib.scala 329:198] + node _T_169 = cat(_T_168, _T_1[6]) @[el2_lib.scala 329:198] + node _T_170 = cat(_T_169, _T_167) @[el2_lib.scala 329:198] + node _T_171 = cat(_T_170, _T_166) @[el2_lib.scala 329:198] + node _T_172 = cat(_T_1[10], _T_1[9]) @[el2_lib.scala 329:198] + node _T_173 = cat(_T_1[12], _T_1[11]) @[el2_lib.scala 329:198] + node _T_174 = cat(_T_173, _T_172) @[el2_lib.scala 329:198] + node _T_175 = cat(_T_1[14], _T_1[13]) @[el2_lib.scala 329:198] + node _T_176 = cat(_T_1[17], _T_1[16]) @[el2_lib.scala 329:198] + node _T_177 = cat(_T_176, _T_1[15]) @[el2_lib.scala 329:198] + node _T_178 = cat(_T_177, _T_175) @[el2_lib.scala 329:198] + node _T_179 = cat(_T_178, _T_174) @[el2_lib.scala 329:198] + node _T_180 = cat(_T_179, _T_171) @[el2_lib.scala 329:198] + node _T_181 = xorr(_T_180) @[el2_lib.scala 329:205] + node _T_182 = xor(_T_163, _T_181) @[el2_lib.scala 329:192] + node _T_183 = bits(dccm_data_ecc_hi_any, 0, 0) @[el2_lib.scala 329:218] + node _T_184 = cat(_T[1], _T[0]) @[el2_lib.scala 329:228] + node _T_185 = cat(_T[3], _T[2]) @[el2_lib.scala 329:228] + node _T_186 = cat(_T_185, _T_184) @[el2_lib.scala 329:228] + node _T_187 = cat(_T[5], _T[4]) @[el2_lib.scala 329:228] + node _T_188 = cat(_T[8], _T[7]) @[el2_lib.scala 329:228] + node _T_189 = cat(_T_188, _T[6]) @[el2_lib.scala 329:228] + node _T_190 = cat(_T_189, _T_187) @[el2_lib.scala 329:228] + node _T_191 = cat(_T_190, _T_186) @[el2_lib.scala 329:228] + node _T_192 = cat(_T[10], _T[9]) @[el2_lib.scala 329:228] + node _T_193 = cat(_T[12], _T[11]) @[el2_lib.scala 329:228] + node _T_194 = cat(_T_193, _T_192) @[el2_lib.scala 329:228] + node _T_195 = cat(_T[14], _T[13]) @[el2_lib.scala 329:228] + node _T_196 = cat(_T[17], _T[16]) @[el2_lib.scala 329:228] + node _T_197 = cat(_T_196, _T[15]) @[el2_lib.scala 329:228] + node _T_198 = cat(_T_197, _T_195) @[el2_lib.scala 329:228] + node _T_199 = cat(_T_198, _T_194) @[el2_lib.scala 329:228] + node _T_200 = cat(_T_199, _T_191) @[el2_lib.scala 329:228] + node _T_201 = xorr(_T_200) @[el2_lib.scala 329:235] + node _T_202 = xor(_T_183, _T_201) @[el2_lib.scala 329:222] + node _T_203 = cat(_T_162, _T_182) @[Cat.scala 29:58] + node _T_204 = cat(_T_203, _T_202) @[Cat.scala 29:58] + node _T_205 = cat(_T_125, _T_142) @[Cat.scala 29:58] + node _T_206 = cat(_T_100, _T_108) @[Cat.scala 29:58] + node _T_207 = cat(_T_206, _T_205) @[Cat.scala 29:58] + node _T_208 = cat(_T_207, _T_204) @[Cat.scala 29:58] + node _T_209 = neq(_T_208, UInt<1>("h00")) @[el2_lib.scala 330:44] + node _T_210 = and(is_ldst_hi_any, _T_209) @[el2_lib.scala 330:31] + node _T_211 = bits(_T_208, 6, 6) @[el2_lib.scala 330:64] + node single_ecc_error_hi_any = and(_T_210, _T_211) @[el2_lib.scala 330:53] + node _T_212 = neq(_T_208, UInt<1>("h00")) @[el2_lib.scala 331:44] + node _T_213 = and(is_ldst_hi_any, _T_212) @[el2_lib.scala 331:31] + node _T_214 = bits(_T_208, 6, 6) @[el2_lib.scala 331:65] + node _T_215 = not(_T_214) @[el2_lib.scala 331:55] + node double_ecc_error_hi_any = and(_T_213, _T_215) @[el2_lib.scala 331:53] + wire _T_216 : UInt<1>[39] @[el2_lib.scala 332:26] + node _T_217 = bits(_T_208, 5, 0) @[el2_lib.scala 335:37] + node _T_218 = eq(_T_217, UInt<1>("h01")) @[el2_lib.scala 335:44] + _T_216[0] <= _T_218 @[el2_lib.scala 335:25] + node _T_219 = bits(_T_208, 5, 0) @[el2_lib.scala 335:37] + node _T_220 = eq(_T_219, UInt<2>("h02")) @[el2_lib.scala 335:44] + _T_216[1] <= _T_220 @[el2_lib.scala 335:25] + node _T_221 = bits(_T_208, 5, 0) @[el2_lib.scala 335:37] + node _T_222 = eq(_T_221, UInt<2>("h03")) @[el2_lib.scala 335:44] + _T_216[2] <= _T_222 @[el2_lib.scala 335:25] + node _T_223 = bits(_T_208, 5, 0) @[el2_lib.scala 335:37] + node _T_224 = eq(_T_223, UInt<3>("h04")) @[el2_lib.scala 335:44] + _T_216[3] <= _T_224 @[el2_lib.scala 335:25] + node _T_225 = bits(_T_208, 5, 0) @[el2_lib.scala 335:37] + node _T_226 = eq(_T_225, UInt<3>("h05")) @[el2_lib.scala 335:44] + _T_216[4] <= _T_226 @[el2_lib.scala 335:25] + node _T_227 = bits(_T_208, 5, 0) @[el2_lib.scala 335:37] + node _T_228 = eq(_T_227, UInt<3>("h06")) @[el2_lib.scala 335:44] + _T_216[5] <= _T_228 @[el2_lib.scala 335:25] + node _T_229 = bits(_T_208, 5, 0) @[el2_lib.scala 335:37] + node _T_230 = eq(_T_229, UInt<3>("h07")) @[el2_lib.scala 335:44] + _T_216[6] <= _T_230 @[el2_lib.scala 335:25] + node _T_231 = bits(_T_208, 5, 0) @[el2_lib.scala 335:37] + node _T_232 = eq(_T_231, UInt<4>("h08")) @[el2_lib.scala 335:44] + _T_216[7] <= _T_232 @[el2_lib.scala 335:25] + node _T_233 = bits(_T_208, 5, 0) @[el2_lib.scala 335:37] + node _T_234 = eq(_T_233, UInt<4>("h09")) @[el2_lib.scala 335:44] + _T_216[8] <= _T_234 @[el2_lib.scala 335:25] + node _T_235 = bits(_T_208, 5, 0) @[el2_lib.scala 335:37] + node _T_236 = eq(_T_235, UInt<4>("h0a")) @[el2_lib.scala 335:44] + _T_216[9] <= _T_236 @[el2_lib.scala 335:25] + node _T_237 = bits(_T_208, 5, 0) @[el2_lib.scala 335:37] + node _T_238 = eq(_T_237, UInt<4>("h0b")) @[el2_lib.scala 335:44] + _T_216[10] <= _T_238 @[el2_lib.scala 335:25] + node _T_239 = bits(_T_208, 5, 0) @[el2_lib.scala 335:37] + node _T_240 = eq(_T_239, UInt<4>("h0c")) @[el2_lib.scala 335:44] + _T_216[11] <= _T_240 @[el2_lib.scala 335:25] + node _T_241 = bits(_T_208, 5, 0) @[el2_lib.scala 335:37] + node _T_242 = eq(_T_241, UInt<4>("h0d")) @[el2_lib.scala 335:44] + _T_216[12] <= _T_242 @[el2_lib.scala 335:25] + node _T_243 = bits(_T_208, 5, 0) @[el2_lib.scala 335:37] + node _T_244 = eq(_T_243, UInt<4>("h0e")) @[el2_lib.scala 335:44] + _T_216[13] <= _T_244 @[el2_lib.scala 335:25] + node _T_245 = bits(_T_208, 5, 0) @[el2_lib.scala 335:37] + node _T_246 = eq(_T_245, UInt<4>("h0f")) @[el2_lib.scala 335:44] + _T_216[14] <= _T_246 @[el2_lib.scala 335:25] + node _T_247 = bits(_T_208, 5, 0) @[el2_lib.scala 335:37] + node _T_248 = eq(_T_247, UInt<5>("h010")) @[el2_lib.scala 335:44] + _T_216[15] <= _T_248 @[el2_lib.scala 335:25] + node _T_249 = bits(_T_208, 5, 0) @[el2_lib.scala 335:37] + node _T_250 = eq(_T_249, UInt<5>("h011")) @[el2_lib.scala 335:44] + _T_216[16] <= _T_250 @[el2_lib.scala 335:25] + node _T_251 = bits(_T_208, 5, 0) @[el2_lib.scala 335:37] + node _T_252 = eq(_T_251, UInt<5>("h012")) @[el2_lib.scala 335:44] + _T_216[17] <= _T_252 @[el2_lib.scala 335:25] + node _T_253 = bits(_T_208, 5, 0) @[el2_lib.scala 335:37] + node _T_254 = eq(_T_253, UInt<5>("h013")) @[el2_lib.scala 335:44] + _T_216[18] <= _T_254 @[el2_lib.scala 335:25] + node _T_255 = bits(_T_208, 5, 0) @[el2_lib.scala 335:37] + node _T_256 = eq(_T_255, UInt<5>("h014")) @[el2_lib.scala 335:44] + _T_216[19] <= _T_256 @[el2_lib.scala 335:25] + node _T_257 = bits(_T_208, 5, 0) @[el2_lib.scala 335:37] + node _T_258 = eq(_T_257, UInt<5>("h015")) @[el2_lib.scala 335:44] + _T_216[20] <= _T_258 @[el2_lib.scala 335:25] + node _T_259 = bits(_T_208, 5, 0) @[el2_lib.scala 335:37] + node _T_260 = eq(_T_259, UInt<5>("h016")) @[el2_lib.scala 335:44] + _T_216[21] <= _T_260 @[el2_lib.scala 335:25] + node _T_261 = bits(_T_208, 5, 0) @[el2_lib.scala 335:37] + node _T_262 = eq(_T_261, UInt<5>("h017")) @[el2_lib.scala 335:44] + _T_216[22] <= _T_262 @[el2_lib.scala 335:25] + node _T_263 = bits(_T_208, 5, 0) @[el2_lib.scala 335:37] + node _T_264 = eq(_T_263, UInt<5>("h018")) @[el2_lib.scala 335:44] + _T_216[23] <= _T_264 @[el2_lib.scala 335:25] + node _T_265 = bits(_T_208, 5, 0) @[el2_lib.scala 335:37] + node _T_266 = eq(_T_265, UInt<5>("h019")) @[el2_lib.scala 335:44] + _T_216[24] <= _T_266 @[el2_lib.scala 335:25] + node _T_267 = bits(_T_208, 5, 0) @[el2_lib.scala 335:37] + node _T_268 = eq(_T_267, UInt<5>("h01a")) @[el2_lib.scala 335:44] + _T_216[25] <= _T_268 @[el2_lib.scala 335:25] + node _T_269 = bits(_T_208, 5, 0) @[el2_lib.scala 335:37] + node _T_270 = eq(_T_269, UInt<5>("h01b")) @[el2_lib.scala 335:44] + _T_216[26] <= _T_270 @[el2_lib.scala 335:25] + node _T_271 = bits(_T_208, 5, 0) @[el2_lib.scala 335:37] + node _T_272 = eq(_T_271, UInt<5>("h01c")) @[el2_lib.scala 335:44] + _T_216[27] <= _T_272 @[el2_lib.scala 335:25] + node _T_273 = bits(_T_208, 5, 0) @[el2_lib.scala 335:37] + node _T_274 = eq(_T_273, UInt<5>("h01d")) @[el2_lib.scala 335:44] + _T_216[28] <= _T_274 @[el2_lib.scala 335:25] + node _T_275 = bits(_T_208, 5, 0) @[el2_lib.scala 335:37] + node _T_276 = eq(_T_275, UInt<5>("h01e")) @[el2_lib.scala 335:44] + _T_216[29] <= _T_276 @[el2_lib.scala 335:25] + node _T_277 = bits(_T_208, 5, 0) @[el2_lib.scala 335:37] + node _T_278 = eq(_T_277, UInt<5>("h01f")) @[el2_lib.scala 335:44] + _T_216[30] <= _T_278 @[el2_lib.scala 335:25] + node _T_279 = bits(_T_208, 5, 0) @[el2_lib.scala 335:37] + node _T_280 = eq(_T_279, UInt<6>("h020")) @[el2_lib.scala 335:44] + _T_216[31] <= _T_280 @[el2_lib.scala 335:25] + node _T_281 = bits(_T_208, 5, 0) @[el2_lib.scala 335:37] + node _T_282 = eq(_T_281, UInt<6>("h021")) @[el2_lib.scala 335:44] + _T_216[32] <= _T_282 @[el2_lib.scala 335:25] + node _T_283 = bits(_T_208, 5, 0) @[el2_lib.scala 335:37] + node _T_284 = eq(_T_283, UInt<6>("h022")) @[el2_lib.scala 335:44] + _T_216[33] <= _T_284 @[el2_lib.scala 335:25] + node _T_285 = bits(_T_208, 5, 0) @[el2_lib.scala 335:37] + node _T_286 = eq(_T_285, UInt<6>("h023")) @[el2_lib.scala 335:44] + _T_216[34] <= _T_286 @[el2_lib.scala 335:25] + node _T_287 = bits(_T_208, 5, 0) @[el2_lib.scala 335:37] + node _T_288 = eq(_T_287, UInt<6>("h024")) @[el2_lib.scala 335:44] + _T_216[35] <= _T_288 @[el2_lib.scala 335:25] + node _T_289 = bits(_T_208, 5, 0) @[el2_lib.scala 335:37] + node _T_290 = eq(_T_289, UInt<6>("h025")) @[el2_lib.scala 335:44] + _T_216[36] <= _T_290 @[el2_lib.scala 335:25] + node _T_291 = bits(_T_208, 5, 0) @[el2_lib.scala 335:37] + node _T_292 = eq(_T_291, UInt<6>("h026")) @[el2_lib.scala 335:44] + _T_216[37] <= _T_292 @[el2_lib.scala 335:25] + node _T_293 = bits(_T_208, 5, 0) @[el2_lib.scala 335:37] + node _T_294 = eq(_T_293, UInt<6>("h027")) @[el2_lib.scala 335:44] + _T_216[38] <= _T_294 @[el2_lib.scala 335:25] + node _T_295 = bits(dccm_data_ecc_hi_any, 6, 6) @[el2_lib.scala 337:37] + node _T_296 = bits(dccm_rdata_hi_any, 31, 26) @[el2_lib.scala 337:45] + node _T_297 = bits(dccm_data_ecc_hi_any, 5, 5) @[el2_lib.scala 337:61] + node _T_298 = bits(dccm_rdata_hi_any, 25, 11) @[el2_lib.scala 337:69] + node _T_299 = bits(dccm_data_ecc_hi_any, 4, 4) @[el2_lib.scala 337:85] + node _T_300 = bits(dccm_rdata_hi_any, 10, 4) @[el2_lib.scala 337:93] + node _T_301 = bits(dccm_data_ecc_hi_any, 3, 3) @[el2_lib.scala 337:108] + node _T_302 = bits(dccm_rdata_hi_any, 3, 1) @[el2_lib.scala 337:116] + node _T_303 = bits(dccm_data_ecc_hi_any, 2, 2) @[el2_lib.scala 337:130] + node _T_304 = bits(dccm_rdata_hi_any, 0, 0) @[el2_lib.scala 337:138] + node _T_305 = bits(dccm_data_ecc_hi_any, 1, 0) @[el2_lib.scala 337:149] + node _T_306 = cat(_T_304, _T_305) @[Cat.scala 29:58] + node _T_307 = cat(_T_301, _T_302) @[Cat.scala 29:58] + node _T_308 = cat(_T_307, _T_303) @[Cat.scala 29:58] + node _T_309 = cat(_T_308, _T_306) @[Cat.scala 29:58] + node _T_310 = cat(_T_298, _T_299) @[Cat.scala 29:58] + node _T_311 = cat(_T_310, _T_300) @[Cat.scala 29:58] + node _T_312 = cat(_T_295, _T_296) @[Cat.scala 29:58] + node _T_313 = cat(_T_312, _T_297) @[Cat.scala 29:58] + node _T_314 = cat(_T_313, _T_311) @[Cat.scala 29:58] + node _T_315 = cat(_T_314, _T_309) @[Cat.scala 29:58] + node _T_316 = bits(single_ecc_error_hi_any, 0, 0) @[el2_lib.scala 338:49] + node _T_317 = cat(_T_216[1], _T_216[0]) @[el2_lib.scala 338:69] + node _T_318 = cat(_T_216[3], _T_216[2]) @[el2_lib.scala 338:69] + node _T_319 = cat(_T_318, _T_317) @[el2_lib.scala 338:69] + node _T_320 = cat(_T_216[5], _T_216[4]) @[el2_lib.scala 338:69] + node _T_321 = cat(_T_216[8], _T_216[7]) @[el2_lib.scala 338:69] + node _T_322 = cat(_T_321, _T_216[6]) @[el2_lib.scala 338:69] + node _T_323 = cat(_T_322, _T_320) @[el2_lib.scala 338:69] + node _T_324 = cat(_T_323, _T_319) @[el2_lib.scala 338:69] + node _T_325 = cat(_T_216[10], _T_216[9]) @[el2_lib.scala 338:69] + node _T_326 = cat(_T_216[13], _T_216[12]) @[el2_lib.scala 338:69] + node _T_327 = cat(_T_326, _T_216[11]) @[el2_lib.scala 338:69] + node _T_328 = cat(_T_327, _T_325) @[el2_lib.scala 338:69] + node _T_329 = cat(_T_216[15], _T_216[14]) @[el2_lib.scala 338:69] + node _T_330 = cat(_T_216[18], _T_216[17]) @[el2_lib.scala 338:69] + node _T_331 = cat(_T_330, _T_216[16]) @[el2_lib.scala 338:69] + node _T_332 = cat(_T_331, _T_329) @[el2_lib.scala 338:69] + node _T_333 = cat(_T_332, _T_328) @[el2_lib.scala 338:69] + node _T_334 = cat(_T_333, _T_324) @[el2_lib.scala 338:69] + node _T_335 = cat(_T_216[20], _T_216[19]) @[el2_lib.scala 338:69] + node _T_336 = cat(_T_216[23], _T_216[22]) @[el2_lib.scala 338:69] + node _T_337 = cat(_T_336, _T_216[21]) @[el2_lib.scala 338:69] + node _T_338 = cat(_T_337, _T_335) @[el2_lib.scala 338:69] + node _T_339 = cat(_T_216[25], _T_216[24]) @[el2_lib.scala 338:69] + node _T_340 = cat(_T_216[28], _T_216[27]) @[el2_lib.scala 338:69] + node _T_341 = cat(_T_340, _T_216[26]) @[el2_lib.scala 338:69] + node _T_342 = cat(_T_341, _T_339) @[el2_lib.scala 338:69] + node _T_343 = cat(_T_342, _T_338) @[el2_lib.scala 338:69] + node _T_344 = cat(_T_216[30], _T_216[29]) @[el2_lib.scala 338:69] + node _T_345 = cat(_T_216[33], _T_216[32]) @[el2_lib.scala 338:69] + node _T_346 = cat(_T_345, _T_216[31]) @[el2_lib.scala 338:69] + node _T_347 = cat(_T_346, _T_344) @[el2_lib.scala 338:69] + node _T_348 = cat(_T_216[35], _T_216[34]) @[el2_lib.scala 338:69] + node _T_349 = cat(_T_216[38], _T_216[37]) @[el2_lib.scala 338:69] + node _T_350 = cat(_T_349, _T_216[36]) @[el2_lib.scala 338:69] + node _T_351 = cat(_T_350, _T_348) @[el2_lib.scala 338:69] + node _T_352 = cat(_T_351, _T_347) @[el2_lib.scala 338:69] + node _T_353 = cat(_T_352, _T_343) @[el2_lib.scala 338:69] + node _T_354 = cat(_T_353, _T_334) @[el2_lib.scala 338:69] + node _T_355 = xor(_T_354, _T_315) @[el2_lib.scala 338:76] + node _T_356 = mux(_T_316, _T_355, _T_315) @[el2_lib.scala 338:31] + node _T_357 = bits(_T_356, 37, 32) @[el2_lib.scala 340:36] + node _T_358 = bits(_T_356, 30, 16) @[el2_lib.scala 340:62] + node _T_359 = bits(_T_356, 14, 8) @[el2_lib.scala 340:88] + node _T_360 = bits(_T_356, 6, 4) @[el2_lib.scala 340:113] + node _T_361 = bits(_T_356, 2, 2) @[el2_lib.scala 340:137] + node _T_362 = cat(_T_360, _T_361) @[Cat.scala 29:58] + node _T_363 = cat(_T_357, _T_358) @[Cat.scala 29:58] + node _T_364 = cat(_T_363, _T_359) @[Cat.scala 29:58] + node sec_data_hi_any = cat(_T_364, _T_362) @[Cat.scala 29:58] + node _T_365 = bits(_T_356, 38, 38) @[el2_lib.scala 341:39] + node _T_366 = bits(_T_208, 6, 0) @[el2_lib.scala 341:56] + node _T_367 = eq(_T_366, UInt<7>("h040")) @[el2_lib.scala 341:63] + node _T_368 = xor(_T_365, _T_367) @[el2_lib.scala 341:44] + node _T_369 = bits(_T_356, 31, 31) @[el2_lib.scala 341:103] + node _T_370 = bits(_T_356, 15, 15) @[el2_lib.scala 341:125] + node _T_371 = bits(_T_356, 7, 7) @[el2_lib.scala 341:147] + node _T_372 = bits(_T_356, 3, 3) @[el2_lib.scala 341:168] + node _T_373 = bits(_T_356, 1, 0) @[el2_lib.scala 341:189] + node _T_374 = cat(_T_371, _T_372) @[Cat.scala 29:58] + node _T_375 = cat(_T_374, _T_373) @[Cat.scala 29:58] + node _T_376 = cat(_T_368, _T_369) @[Cat.scala 29:58] + node _T_377 = cat(_T_376, _T_370) @[Cat.scala 29:58] + node ecc_out_hi_nc = cat(_T_377, _T_375) @[Cat.scala 29:58] + wire _T_378 : UInt<1>[18] @[el2_lib.scala 294:18] + wire _T_379 : UInt<1>[18] @[el2_lib.scala 295:18] + wire _T_380 : UInt<1>[18] @[el2_lib.scala 296:18] + wire _T_381 : UInt<1>[15] @[el2_lib.scala 297:18] + wire _T_382 : UInt<1>[15] @[el2_lib.scala 298:18] + wire _T_383 : UInt<1>[6] @[el2_lib.scala 299:18] + node _T_384 = bits(dccm_rdata_lo_any, 0, 0) @[el2_lib.scala 310:21] + _T_378[0] <= _T_384 @[el2_lib.scala 310:15] + node _T_385 = bits(dccm_rdata_lo_any, 0, 0) @[el2_lib.scala 313:21] + _T_379[0] <= _T_385 @[el2_lib.scala 313:15] + node _T_386 = bits(dccm_rdata_lo_any, 1, 1) @[el2_lib.scala 310:21] + _T_378[1] <= _T_386 @[el2_lib.scala 310:15] + node _T_387 = bits(dccm_rdata_lo_any, 1, 1) @[el2_lib.scala 316:21] + _T_380[0] <= _T_387 @[el2_lib.scala 316:15] + node _T_388 = bits(dccm_rdata_lo_any, 2, 2) @[el2_lib.scala 313:21] + _T_379[1] <= _T_388 @[el2_lib.scala 313:15] + node _T_389 = bits(dccm_rdata_lo_any, 2, 2) @[el2_lib.scala 316:21] + _T_380[1] <= _T_389 @[el2_lib.scala 316:15] + node _T_390 = bits(dccm_rdata_lo_any, 3, 3) @[el2_lib.scala 310:21] + _T_378[2] <= _T_390 @[el2_lib.scala 310:15] + node _T_391 = bits(dccm_rdata_lo_any, 3, 3) @[el2_lib.scala 313:21] + _T_379[2] <= _T_391 @[el2_lib.scala 313:15] + node _T_392 = bits(dccm_rdata_lo_any, 3, 3) @[el2_lib.scala 316:21] + _T_380[2] <= _T_392 @[el2_lib.scala 316:15] + node _T_393 = bits(dccm_rdata_lo_any, 4, 4) @[el2_lib.scala 310:21] + _T_378[3] <= _T_393 @[el2_lib.scala 310:15] + node _T_394 = bits(dccm_rdata_lo_any, 4, 4) @[el2_lib.scala 319:21] + _T_381[0] <= _T_394 @[el2_lib.scala 319:15] + node _T_395 = bits(dccm_rdata_lo_any, 5, 5) @[el2_lib.scala 313:21] + _T_379[3] <= _T_395 @[el2_lib.scala 313:15] + node _T_396 = bits(dccm_rdata_lo_any, 5, 5) @[el2_lib.scala 319:21] + _T_381[1] <= _T_396 @[el2_lib.scala 319:15] + node _T_397 = bits(dccm_rdata_lo_any, 6, 6) @[el2_lib.scala 310:21] + _T_378[4] <= _T_397 @[el2_lib.scala 310:15] + node _T_398 = bits(dccm_rdata_lo_any, 6, 6) @[el2_lib.scala 313:21] + _T_379[4] <= _T_398 @[el2_lib.scala 313:15] + node _T_399 = bits(dccm_rdata_lo_any, 6, 6) @[el2_lib.scala 319:21] + _T_381[2] <= _T_399 @[el2_lib.scala 319:15] + node _T_400 = bits(dccm_rdata_lo_any, 7, 7) @[el2_lib.scala 316:21] + _T_380[3] <= _T_400 @[el2_lib.scala 316:15] + node _T_401 = bits(dccm_rdata_lo_any, 7, 7) @[el2_lib.scala 319:21] + _T_381[3] <= _T_401 @[el2_lib.scala 319:15] + node _T_402 = bits(dccm_rdata_lo_any, 8, 8) @[el2_lib.scala 310:21] + _T_378[5] <= _T_402 @[el2_lib.scala 310:15] + node _T_403 = bits(dccm_rdata_lo_any, 8, 8) @[el2_lib.scala 316:21] + _T_380[4] <= _T_403 @[el2_lib.scala 316:15] + node _T_404 = bits(dccm_rdata_lo_any, 8, 8) @[el2_lib.scala 319:21] + _T_381[4] <= _T_404 @[el2_lib.scala 319:15] + node _T_405 = bits(dccm_rdata_lo_any, 9, 9) @[el2_lib.scala 313:21] + _T_379[5] <= _T_405 @[el2_lib.scala 313:15] + node _T_406 = bits(dccm_rdata_lo_any, 9, 9) @[el2_lib.scala 316:21] + _T_380[5] <= _T_406 @[el2_lib.scala 316:15] + node _T_407 = bits(dccm_rdata_lo_any, 9, 9) @[el2_lib.scala 319:21] + _T_381[5] <= _T_407 @[el2_lib.scala 319:15] + node _T_408 = bits(dccm_rdata_lo_any, 10, 10) @[el2_lib.scala 310:21] + _T_378[6] <= _T_408 @[el2_lib.scala 310:15] + node _T_409 = bits(dccm_rdata_lo_any, 10, 10) @[el2_lib.scala 313:21] + _T_379[6] <= _T_409 @[el2_lib.scala 313:15] + node _T_410 = bits(dccm_rdata_lo_any, 10, 10) @[el2_lib.scala 316:21] + _T_380[6] <= _T_410 @[el2_lib.scala 316:15] + node _T_411 = bits(dccm_rdata_lo_any, 10, 10) @[el2_lib.scala 319:21] + _T_381[6] <= _T_411 @[el2_lib.scala 319:15] + node _T_412 = bits(dccm_rdata_lo_any, 11, 11) @[el2_lib.scala 310:21] + _T_378[7] <= _T_412 @[el2_lib.scala 310:15] + node _T_413 = bits(dccm_rdata_lo_any, 11, 11) @[el2_lib.scala 322:21] + _T_382[0] <= _T_413 @[el2_lib.scala 322:15] + node _T_414 = bits(dccm_rdata_lo_any, 12, 12) @[el2_lib.scala 313:21] + _T_379[7] <= _T_414 @[el2_lib.scala 313:15] + node _T_415 = bits(dccm_rdata_lo_any, 12, 12) @[el2_lib.scala 322:21] + _T_382[1] <= _T_415 @[el2_lib.scala 322:15] + node _T_416 = bits(dccm_rdata_lo_any, 13, 13) @[el2_lib.scala 310:21] + _T_378[8] <= _T_416 @[el2_lib.scala 310:15] + node _T_417 = bits(dccm_rdata_lo_any, 13, 13) @[el2_lib.scala 313:21] + _T_379[8] <= _T_417 @[el2_lib.scala 313:15] + node _T_418 = bits(dccm_rdata_lo_any, 13, 13) @[el2_lib.scala 322:21] + _T_382[2] <= _T_418 @[el2_lib.scala 322:15] + node _T_419 = bits(dccm_rdata_lo_any, 14, 14) @[el2_lib.scala 316:21] + _T_380[7] <= _T_419 @[el2_lib.scala 316:15] + node _T_420 = bits(dccm_rdata_lo_any, 14, 14) @[el2_lib.scala 322:21] + _T_382[3] <= _T_420 @[el2_lib.scala 322:15] + node _T_421 = bits(dccm_rdata_lo_any, 15, 15) @[el2_lib.scala 310:21] + _T_378[9] <= _T_421 @[el2_lib.scala 310:15] + node _T_422 = bits(dccm_rdata_lo_any, 15, 15) @[el2_lib.scala 316:21] + _T_380[8] <= _T_422 @[el2_lib.scala 316:15] + node _T_423 = bits(dccm_rdata_lo_any, 15, 15) @[el2_lib.scala 322:21] + _T_382[4] <= _T_423 @[el2_lib.scala 322:15] + node _T_424 = bits(dccm_rdata_lo_any, 16, 16) @[el2_lib.scala 313:21] + _T_379[9] <= _T_424 @[el2_lib.scala 313:15] + node _T_425 = bits(dccm_rdata_lo_any, 16, 16) @[el2_lib.scala 316:21] + _T_380[9] <= _T_425 @[el2_lib.scala 316:15] + node _T_426 = bits(dccm_rdata_lo_any, 16, 16) @[el2_lib.scala 322:21] + _T_382[5] <= _T_426 @[el2_lib.scala 322:15] + node _T_427 = bits(dccm_rdata_lo_any, 17, 17) @[el2_lib.scala 310:21] + _T_378[10] <= _T_427 @[el2_lib.scala 310:15] + node _T_428 = bits(dccm_rdata_lo_any, 17, 17) @[el2_lib.scala 313:21] + _T_379[10] <= _T_428 @[el2_lib.scala 313:15] + node _T_429 = bits(dccm_rdata_lo_any, 17, 17) @[el2_lib.scala 316:21] + _T_380[10] <= _T_429 @[el2_lib.scala 316:15] + node _T_430 = bits(dccm_rdata_lo_any, 17, 17) @[el2_lib.scala 322:21] + _T_382[6] <= _T_430 @[el2_lib.scala 322:15] + node _T_431 = bits(dccm_rdata_lo_any, 18, 18) @[el2_lib.scala 319:21] + _T_381[7] <= _T_431 @[el2_lib.scala 319:15] + node _T_432 = bits(dccm_rdata_lo_any, 18, 18) @[el2_lib.scala 322:21] + _T_382[7] <= _T_432 @[el2_lib.scala 322:15] + node _T_433 = bits(dccm_rdata_lo_any, 19, 19) @[el2_lib.scala 310:21] + _T_378[11] <= _T_433 @[el2_lib.scala 310:15] + node _T_434 = bits(dccm_rdata_lo_any, 19, 19) @[el2_lib.scala 319:21] + _T_381[8] <= _T_434 @[el2_lib.scala 319:15] + node _T_435 = bits(dccm_rdata_lo_any, 19, 19) @[el2_lib.scala 322:21] + _T_382[8] <= _T_435 @[el2_lib.scala 322:15] + node _T_436 = bits(dccm_rdata_lo_any, 20, 20) @[el2_lib.scala 313:21] + _T_379[11] <= _T_436 @[el2_lib.scala 313:15] + node _T_437 = bits(dccm_rdata_lo_any, 20, 20) @[el2_lib.scala 319:21] + _T_381[9] <= _T_437 @[el2_lib.scala 319:15] + node _T_438 = bits(dccm_rdata_lo_any, 20, 20) @[el2_lib.scala 322:21] + _T_382[9] <= _T_438 @[el2_lib.scala 322:15] + node _T_439 = bits(dccm_rdata_lo_any, 21, 21) @[el2_lib.scala 310:21] + _T_378[12] <= _T_439 @[el2_lib.scala 310:15] + node _T_440 = bits(dccm_rdata_lo_any, 21, 21) @[el2_lib.scala 313:21] + _T_379[12] <= _T_440 @[el2_lib.scala 313:15] + node _T_441 = bits(dccm_rdata_lo_any, 21, 21) @[el2_lib.scala 319:21] + _T_381[10] <= _T_441 @[el2_lib.scala 319:15] + node _T_442 = bits(dccm_rdata_lo_any, 21, 21) @[el2_lib.scala 322:21] + _T_382[10] <= _T_442 @[el2_lib.scala 322:15] + node _T_443 = bits(dccm_rdata_lo_any, 22, 22) @[el2_lib.scala 316:21] + _T_380[11] <= _T_443 @[el2_lib.scala 316:15] + node _T_444 = bits(dccm_rdata_lo_any, 22, 22) @[el2_lib.scala 319:21] + _T_381[11] <= _T_444 @[el2_lib.scala 319:15] + node _T_445 = bits(dccm_rdata_lo_any, 22, 22) @[el2_lib.scala 322:21] + _T_382[11] <= _T_445 @[el2_lib.scala 322:15] + node _T_446 = bits(dccm_rdata_lo_any, 23, 23) @[el2_lib.scala 310:21] + _T_378[13] <= _T_446 @[el2_lib.scala 310:15] + node _T_447 = bits(dccm_rdata_lo_any, 23, 23) @[el2_lib.scala 316:21] + _T_380[12] <= _T_447 @[el2_lib.scala 316:15] + node _T_448 = bits(dccm_rdata_lo_any, 23, 23) @[el2_lib.scala 319:21] + _T_381[12] <= _T_448 @[el2_lib.scala 319:15] + node _T_449 = bits(dccm_rdata_lo_any, 23, 23) @[el2_lib.scala 322:21] + _T_382[12] <= _T_449 @[el2_lib.scala 322:15] + node _T_450 = bits(dccm_rdata_lo_any, 24, 24) @[el2_lib.scala 313:21] + _T_379[13] <= _T_450 @[el2_lib.scala 313:15] + node _T_451 = bits(dccm_rdata_lo_any, 24, 24) @[el2_lib.scala 316:21] + _T_380[13] <= _T_451 @[el2_lib.scala 316:15] + node _T_452 = bits(dccm_rdata_lo_any, 24, 24) @[el2_lib.scala 319:21] + _T_381[13] <= _T_452 @[el2_lib.scala 319:15] + node _T_453 = bits(dccm_rdata_lo_any, 24, 24) @[el2_lib.scala 322:21] + _T_382[13] <= _T_453 @[el2_lib.scala 322:15] + node _T_454 = bits(dccm_rdata_lo_any, 25, 25) @[el2_lib.scala 310:21] + _T_378[14] <= _T_454 @[el2_lib.scala 310:15] + node _T_455 = bits(dccm_rdata_lo_any, 25, 25) @[el2_lib.scala 313:21] + _T_379[14] <= _T_455 @[el2_lib.scala 313:15] + node _T_456 = bits(dccm_rdata_lo_any, 25, 25) @[el2_lib.scala 316:21] + _T_380[14] <= _T_456 @[el2_lib.scala 316:15] + node _T_457 = bits(dccm_rdata_lo_any, 25, 25) @[el2_lib.scala 319:21] + _T_381[14] <= _T_457 @[el2_lib.scala 319:15] + node _T_458 = bits(dccm_rdata_lo_any, 25, 25) @[el2_lib.scala 322:21] + _T_382[14] <= _T_458 @[el2_lib.scala 322:15] + node _T_459 = bits(dccm_rdata_lo_any, 26, 26) @[el2_lib.scala 310:21] + _T_378[15] <= _T_459 @[el2_lib.scala 310:15] + node _T_460 = bits(dccm_rdata_lo_any, 26, 26) @[el2_lib.scala 325:21] + _T_383[0] <= _T_460 @[el2_lib.scala 325:15] + node _T_461 = bits(dccm_rdata_lo_any, 27, 27) @[el2_lib.scala 313:21] + _T_379[15] <= _T_461 @[el2_lib.scala 313:15] + node _T_462 = bits(dccm_rdata_lo_any, 27, 27) @[el2_lib.scala 325:21] + _T_383[1] <= _T_462 @[el2_lib.scala 325:15] + node _T_463 = bits(dccm_rdata_lo_any, 28, 28) @[el2_lib.scala 310:21] + _T_378[16] <= _T_463 @[el2_lib.scala 310:15] + node _T_464 = bits(dccm_rdata_lo_any, 28, 28) @[el2_lib.scala 313:21] + _T_379[16] <= _T_464 @[el2_lib.scala 313:15] + node _T_465 = bits(dccm_rdata_lo_any, 28, 28) @[el2_lib.scala 325:21] + _T_383[2] <= _T_465 @[el2_lib.scala 325:15] + node _T_466 = bits(dccm_rdata_lo_any, 29, 29) @[el2_lib.scala 316:21] + _T_380[15] <= _T_466 @[el2_lib.scala 316:15] + node _T_467 = bits(dccm_rdata_lo_any, 29, 29) @[el2_lib.scala 325:21] + _T_383[3] <= _T_467 @[el2_lib.scala 325:15] + node _T_468 = bits(dccm_rdata_lo_any, 30, 30) @[el2_lib.scala 310:21] + _T_378[17] <= _T_468 @[el2_lib.scala 310:15] + node _T_469 = bits(dccm_rdata_lo_any, 30, 30) @[el2_lib.scala 316:21] + _T_380[16] <= _T_469 @[el2_lib.scala 316:15] + node _T_470 = bits(dccm_rdata_lo_any, 30, 30) @[el2_lib.scala 325:21] + _T_383[4] <= _T_470 @[el2_lib.scala 325:15] + node _T_471 = bits(dccm_rdata_lo_any, 31, 31) @[el2_lib.scala 313:21] + _T_379[17] <= _T_471 @[el2_lib.scala 313:15] + node _T_472 = bits(dccm_rdata_lo_any, 31, 31) @[el2_lib.scala 316:21] + _T_380[17] <= _T_472 @[el2_lib.scala 316:15] + node _T_473 = bits(dccm_rdata_lo_any, 31, 31) @[el2_lib.scala 325:21] + _T_383[5] <= _T_473 @[el2_lib.scala 325:15] + node _T_474 = xorr(dccm_rdata_lo_any) @[el2_lib.scala 329:30] + node _T_475 = xorr(dccm_data_ecc_lo_any) @[el2_lib.scala 329:44] + node _T_476 = xor(_T_474, _T_475) @[el2_lib.scala 329:35] + node _T_477 = not(UInt<1>("h00")) @[el2_lib.scala 329:52] + node _T_478 = and(_T_476, _T_477) @[el2_lib.scala 329:50] + node _T_479 = bits(dccm_data_ecc_lo_any, 5, 5) @[el2_lib.scala 329:68] + node _T_480 = cat(_T_383[2], _T_383[1]) @[el2_lib.scala 329:78] + node _T_481 = cat(_T_480, _T_383[0]) @[el2_lib.scala 329:78] + node _T_482 = cat(_T_383[5], _T_383[4]) @[el2_lib.scala 329:78] + node _T_483 = cat(_T_482, _T_383[3]) @[el2_lib.scala 329:78] + node _T_484 = cat(_T_483, _T_481) @[el2_lib.scala 329:78] + node _T_485 = xorr(_T_484) @[el2_lib.scala 329:85] + node _T_486 = xor(_T_479, _T_485) @[el2_lib.scala 329:72] + node _T_487 = bits(dccm_data_ecc_lo_any, 4, 4) @[el2_lib.scala 329:98] + node _T_488 = cat(_T_382[2], _T_382[1]) @[el2_lib.scala 329:108] + node _T_489 = cat(_T_488, _T_382[0]) @[el2_lib.scala 329:108] + node _T_490 = cat(_T_382[4], _T_382[3]) @[el2_lib.scala 329:108] + node _T_491 = cat(_T_382[6], _T_382[5]) @[el2_lib.scala 329:108] + node _T_492 = cat(_T_491, _T_490) @[el2_lib.scala 329:108] + node _T_493 = cat(_T_492, _T_489) @[el2_lib.scala 329:108] + node _T_494 = cat(_T_382[8], _T_382[7]) @[el2_lib.scala 329:108] + node _T_495 = cat(_T_382[10], _T_382[9]) @[el2_lib.scala 329:108] + node _T_496 = cat(_T_495, _T_494) @[el2_lib.scala 329:108] + node _T_497 = cat(_T_382[12], _T_382[11]) @[el2_lib.scala 329:108] + node _T_498 = cat(_T_382[14], _T_382[13]) @[el2_lib.scala 329:108] + node _T_499 = cat(_T_498, _T_497) @[el2_lib.scala 329:108] + node _T_500 = cat(_T_499, _T_496) @[el2_lib.scala 329:108] + node _T_501 = cat(_T_500, _T_493) @[el2_lib.scala 329:108] + node _T_502 = xorr(_T_501) @[el2_lib.scala 329:115] + node _T_503 = xor(_T_487, _T_502) @[el2_lib.scala 329:102] + node _T_504 = bits(dccm_data_ecc_lo_any, 3, 3) @[el2_lib.scala 329:128] + node _T_505 = cat(_T_381[2], _T_381[1]) @[el2_lib.scala 329:138] + node _T_506 = cat(_T_505, _T_381[0]) @[el2_lib.scala 329:138] + node _T_507 = cat(_T_381[4], _T_381[3]) @[el2_lib.scala 329:138] + node _T_508 = cat(_T_381[6], _T_381[5]) @[el2_lib.scala 329:138] + node _T_509 = cat(_T_508, _T_507) @[el2_lib.scala 329:138] + node _T_510 = cat(_T_509, _T_506) @[el2_lib.scala 329:138] + node _T_511 = cat(_T_381[8], _T_381[7]) @[el2_lib.scala 329:138] + node _T_512 = cat(_T_381[10], _T_381[9]) @[el2_lib.scala 329:138] + node _T_513 = cat(_T_512, _T_511) @[el2_lib.scala 329:138] + node _T_514 = cat(_T_381[12], _T_381[11]) @[el2_lib.scala 329:138] + node _T_515 = cat(_T_381[14], _T_381[13]) @[el2_lib.scala 329:138] + node _T_516 = cat(_T_515, _T_514) @[el2_lib.scala 329:138] + node _T_517 = cat(_T_516, _T_513) @[el2_lib.scala 329:138] + node _T_518 = cat(_T_517, _T_510) @[el2_lib.scala 329:138] + node _T_519 = xorr(_T_518) @[el2_lib.scala 329:145] + node _T_520 = xor(_T_504, _T_519) @[el2_lib.scala 329:132] + node _T_521 = bits(dccm_data_ecc_lo_any, 2, 2) @[el2_lib.scala 329:158] + node _T_522 = cat(_T_380[1], _T_380[0]) @[el2_lib.scala 329:168] + node _T_523 = cat(_T_380[3], _T_380[2]) @[el2_lib.scala 329:168] + node _T_524 = cat(_T_523, _T_522) @[el2_lib.scala 329:168] + node _T_525 = cat(_T_380[5], _T_380[4]) @[el2_lib.scala 329:168] + node _T_526 = cat(_T_380[8], _T_380[7]) @[el2_lib.scala 329:168] + node _T_527 = cat(_T_526, _T_380[6]) @[el2_lib.scala 329:168] + node _T_528 = cat(_T_527, _T_525) @[el2_lib.scala 329:168] + node _T_529 = cat(_T_528, _T_524) @[el2_lib.scala 329:168] + node _T_530 = cat(_T_380[10], _T_380[9]) @[el2_lib.scala 329:168] + node _T_531 = cat(_T_380[12], _T_380[11]) @[el2_lib.scala 329:168] + node _T_532 = cat(_T_531, _T_530) @[el2_lib.scala 329:168] + node _T_533 = cat(_T_380[14], _T_380[13]) @[el2_lib.scala 329:168] + node _T_534 = cat(_T_380[17], _T_380[16]) @[el2_lib.scala 329:168] + node _T_535 = cat(_T_534, _T_380[15]) @[el2_lib.scala 329:168] + node _T_536 = cat(_T_535, _T_533) @[el2_lib.scala 329:168] + node _T_537 = cat(_T_536, _T_532) @[el2_lib.scala 329:168] + node _T_538 = cat(_T_537, _T_529) @[el2_lib.scala 329:168] + node _T_539 = xorr(_T_538) @[el2_lib.scala 329:175] + node _T_540 = xor(_T_521, _T_539) @[el2_lib.scala 329:162] + node _T_541 = bits(dccm_data_ecc_lo_any, 1, 1) @[el2_lib.scala 329:188] + node _T_542 = cat(_T_379[1], _T_379[0]) @[el2_lib.scala 329:198] + node _T_543 = cat(_T_379[3], _T_379[2]) @[el2_lib.scala 329:198] + node _T_544 = cat(_T_543, _T_542) @[el2_lib.scala 329:198] + node _T_545 = cat(_T_379[5], _T_379[4]) @[el2_lib.scala 329:198] + node _T_546 = cat(_T_379[8], _T_379[7]) @[el2_lib.scala 329:198] + node _T_547 = cat(_T_546, _T_379[6]) @[el2_lib.scala 329:198] + node _T_548 = cat(_T_547, _T_545) @[el2_lib.scala 329:198] + node _T_549 = cat(_T_548, _T_544) @[el2_lib.scala 329:198] + node _T_550 = cat(_T_379[10], _T_379[9]) @[el2_lib.scala 329:198] + node _T_551 = cat(_T_379[12], _T_379[11]) @[el2_lib.scala 329:198] + node _T_552 = cat(_T_551, _T_550) @[el2_lib.scala 329:198] + node _T_553 = cat(_T_379[14], _T_379[13]) @[el2_lib.scala 329:198] + node _T_554 = cat(_T_379[17], _T_379[16]) @[el2_lib.scala 329:198] + node _T_555 = cat(_T_554, _T_379[15]) @[el2_lib.scala 329:198] + node _T_556 = cat(_T_555, _T_553) @[el2_lib.scala 329:198] + node _T_557 = cat(_T_556, _T_552) @[el2_lib.scala 329:198] + node _T_558 = cat(_T_557, _T_549) @[el2_lib.scala 329:198] + node _T_559 = xorr(_T_558) @[el2_lib.scala 329:205] + node _T_560 = xor(_T_541, _T_559) @[el2_lib.scala 329:192] + node _T_561 = bits(dccm_data_ecc_lo_any, 0, 0) @[el2_lib.scala 329:218] + node _T_562 = cat(_T_378[1], _T_378[0]) @[el2_lib.scala 329:228] + node _T_563 = cat(_T_378[3], _T_378[2]) @[el2_lib.scala 329:228] + node _T_564 = cat(_T_563, _T_562) @[el2_lib.scala 329:228] + node _T_565 = cat(_T_378[5], _T_378[4]) @[el2_lib.scala 329:228] + node _T_566 = cat(_T_378[8], _T_378[7]) @[el2_lib.scala 329:228] + node _T_567 = cat(_T_566, _T_378[6]) @[el2_lib.scala 329:228] + node _T_568 = cat(_T_567, _T_565) @[el2_lib.scala 329:228] + node _T_569 = cat(_T_568, _T_564) @[el2_lib.scala 329:228] + node _T_570 = cat(_T_378[10], _T_378[9]) @[el2_lib.scala 329:228] + node _T_571 = cat(_T_378[12], _T_378[11]) @[el2_lib.scala 329:228] + node _T_572 = cat(_T_571, _T_570) @[el2_lib.scala 329:228] + node _T_573 = cat(_T_378[14], _T_378[13]) @[el2_lib.scala 329:228] + node _T_574 = cat(_T_378[17], _T_378[16]) @[el2_lib.scala 329:228] + node _T_575 = cat(_T_574, _T_378[15]) @[el2_lib.scala 329:228] + node _T_576 = cat(_T_575, _T_573) @[el2_lib.scala 329:228] + node _T_577 = cat(_T_576, _T_572) @[el2_lib.scala 329:228] + node _T_578 = cat(_T_577, _T_569) @[el2_lib.scala 329:228] + node _T_579 = xorr(_T_578) @[el2_lib.scala 329:235] + node _T_580 = xor(_T_561, _T_579) @[el2_lib.scala 329:222] + node _T_581 = cat(_T_540, _T_560) @[Cat.scala 29:58] + node _T_582 = cat(_T_581, _T_580) @[Cat.scala 29:58] + node _T_583 = cat(_T_503, _T_520) @[Cat.scala 29:58] + node _T_584 = cat(_T_478, _T_486) @[Cat.scala 29:58] + node _T_585 = cat(_T_584, _T_583) @[Cat.scala 29:58] + node _T_586 = cat(_T_585, _T_582) @[Cat.scala 29:58] + node _T_587 = neq(_T_586, UInt<1>("h00")) @[el2_lib.scala 330:44] + node _T_588 = and(is_ldst_lo_any, _T_587) @[el2_lib.scala 330:31] + node _T_589 = bits(_T_586, 6, 6) @[el2_lib.scala 330:64] + node single_ecc_error_lo_any = and(_T_588, _T_589) @[el2_lib.scala 330:53] + node _T_590 = neq(_T_586, UInt<1>("h00")) @[el2_lib.scala 331:44] + node _T_591 = and(is_ldst_lo_any, _T_590) @[el2_lib.scala 331:31] + node _T_592 = bits(_T_586, 6, 6) @[el2_lib.scala 331:65] + node _T_593 = not(_T_592) @[el2_lib.scala 331:55] + node double_ecc_error_lo_any = and(_T_591, _T_593) @[el2_lib.scala 331:53] + wire _T_594 : UInt<1>[39] @[el2_lib.scala 332:26] + node _T_595 = bits(_T_586, 5, 0) @[el2_lib.scala 335:37] + node _T_596 = eq(_T_595, UInt<1>("h01")) @[el2_lib.scala 335:44] + _T_594[0] <= _T_596 @[el2_lib.scala 335:25] + node _T_597 = bits(_T_586, 5, 0) @[el2_lib.scala 335:37] + node _T_598 = eq(_T_597, UInt<2>("h02")) @[el2_lib.scala 335:44] + _T_594[1] <= _T_598 @[el2_lib.scala 335:25] + node _T_599 = bits(_T_586, 5, 0) @[el2_lib.scala 335:37] + node _T_600 = eq(_T_599, UInt<2>("h03")) @[el2_lib.scala 335:44] + _T_594[2] <= _T_600 @[el2_lib.scala 335:25] + node _T_601 = bits(_T_586, 5, 0) @[el2_lib.scala 335:37] + node _T_602 = eq(_T_601, UInt<3>("h04")) @[el2_lib.scala 335:44] + _T_594[3] <= _T_602 @[el2_lib.scala 335:25] + node _T_603 = bits(_T_586, 5, 0) @[el2_lib.scala 335:37] + node _T_604 = eq(_T_603, UInt<3>("h05")) @[el2_lib.scala 335:44] + _T_594[4] <= _T_604 @[el2_lib.scala 335:25] + node _T_605 = bits(_T_586, 5, 0) @[el2_lib.scala 335:37] + node _T_606 = eq(_T_605, UInt<3>("h06")) @[el2_lib.scala 335:44] + _T_594[5] <= _T_606 @[el2_lib.scala 335:25] + node _T_607 = bits(_T_586, 5, 0) @[el2_lib.scala 335:37] + node _T_608 = eq(_T_607, UInt<3>("h07")) @[el2_lib.scala 335:44] + _T_594[6] <= _T_608 @[el2_lib.scala 335:25] + node _T_609 = bits(_T_586, 5, 0) @[el2_lib.scala 335:37] + node _T_610 = eq(_T_609, UInt<4>("h08")) @[el2_lib.scala 335:44] + _T_594[7] <= _T_610 @[el2_lib.scala 335:25] + node _T_611 = bits(_T_586, 5, 0) @[el2_lib.scala 335:37] + node _T_612 = eq(_T_611, UInt<4>("h09")) @[el2_lib.scala 335:44] + _T_594[8] <= _T_612 @[el2_lib.scala 335:25] + node _T_613 = bits(_T_586, 5, 0) @[el2_lib.scala 335:37] + node _T_614 = eq(_T_613, UInt<4>("h0a")) @[el2_lib.scala 335:44] + _T_594[9] <= _T_614 @[el2_lib.scala 335:25] + node _T_615 = bits(_T_586, 5, 0) @[el2_lib.scala 335:37] + node _T_616 = eq(_T_615, UInt<4>("h0b")) @[el2_lib.scala 335:44] + _T_594[10] <= _T_616 @[el2_lib.scala 335:25] + node _T_617 = bits(_T_586, 5, 0) @[el2_lib.scala 335:37] + node _T_618 = eq(_T_617, UInt<4>("h0c")) @[el2_lib.scala 335:44] + _T_594[11] <= _T_618 @[el2_lib.scala 335:25] + node _T_619 = bits(_T_586, 5, 0) @[el2_lib.scala 335:37] + node _T_620 = eq(_T_619, UInt<4>("h0d")) @[el2_lib.scala 335:44] + _T_594[12] <= _T_620 @[el2_lib.scala 335:25] + node _T_621 = bits(_T_586, 5, 0) @[el2_lib.scala 335:37] + node _T_622 = eq(_T_621, UInt<4>("h0e")) @[el2_lib.scala 335:44] + _T_594[13] <= _T_622 @[el2_lib.scala 335:25] + node _T_623 = bits(_T_586, 5, 0) @[el2_lib.scala 335:37] + node _T_624 = eq(_T_623, UInt<4>("h0f")) @[el2_lib.scala 335:44] + _T_594[14] <= _T_624 @[el2_lib.scala 335:25] + node _T_625 = bits(_T_586, 5, 0) @[el2_lib.scala 335:37] + node _T_626 = eq(_T_625, UInt<5>("h010")) @[el2_lib.scala 335:44] + _T_594[15] <= _T_626 @[el2_lib.scala 335:25] + node _T_627 = bits(_T_586, 5, 0) @[el2_lib.scala 335:37] + node _T_628 = eq(_T_627, UInt<5>("h011")) @[el2_lib.scala 335:44] + _T_594[16] <= _T_628 @[el2_lib.scala 335:25] + node _T_629 = bits(_T_586, 5, 0) @[el2_lib.scala 335:37] + node _T_630 = eq(_T_629, UInt<5>("h012")) @[el2_lib.scala 335:44] + _T_594[17] <= _T_630 @[el2_lib.scala 335:25] + node _T_631 = bits(_T_586, 5, 0) @[el2_lib.scala 335:37] + node _T_632 = eq(_T_631, UInt<5>("h013")) @[el2_lib.scala 335:44] + _T_594[18] <= _T_632 @[el2_lib.scala 335:25] + node _T_633 = bits(_T_586, 5, 0) @[el2_lib.scala 335:37] + node _T_634 = eq(_T_633, UInt<5>("h014")) @[el2_lib.scala 335:44] + _T_594[19] <= _T_634 @[el2_lib.scala 335:25] + node _T_635 = bits(_T_586, 5, 0) @[el2_lib.scala 335:37] + node _T_636 = eq(_T_635, UInt<5>("h015")) @[el2_lib.scala 335:44] + _T_594[20] <= _T_636 @[el2_lib.scala 335:25] + node _T_637 = bits(_T_586, 5, 0) @[el2_lib.scala 335:37] + node _T_638 = eq(_T_637, UInt<5>("h016")) @[el2_lib.scala 335:44] + _T_594[21] <= _T_638 @[el2_lib.scala 335:25] + node _T_639 = bits(_T_586, 5, 0) @[el2_lib.scala 335:37] + node _T_640 = eq(_T_639, UInt<5>("h017")) @[el2_lib.scala 335:44] + _T_594[22] <= _T_640 @[el2_lib.scala 335:25] + node _T_641 = bits(_T_586, 5, 0) @[el2_lib.scala 335:37] + node _T_642 = eq(_T_641, UInt<5>("h018")) @[el2_lib.scala 335:44] + _T_594[23] <= _T_642 @[el2_lib.scala 335:25] + node _T_643 = bits(_T_586, 5, 0) @[el2_lib.scala 335:37] + node _T_644 = eq(_T_643, UInt<5>("h019")) @[el2_lib.scala 335:44] + _T_594[24] <= _T_644 @[el2_lib.scala 335:25] + node _T_645 = bits(_T_586, 5, 0) @[el2_lib.scala 335:37] + node _T_646 = eq(_T_645, UInt<5>("h01a")) @[el2_lib.scala 335:44] + _T_594[25] <= _T_646 @[el2_lib.scala 335:25] + node _T_647 = bits(_T_586, 5, 0) @[el2_lib.scala 335:37] + node _T_648 = eq(_T_647, UInt<5>("h01b")) @[el2_lib.scala 335:44] + _T_594[26] <= _T_648 @[el2_lib.scala 335:25] + node _T_649 = bits(_T_586, 5, 0) @[el2_lib.scala 335:37] + node _T_650 = eq(_T_649, UInt<5>("h01c")) @[el2_lib.scala 335:44] + _T_594[27] <= _T_650 @[el2_lib.scala 335:25] + node _T_651 = bits(_T_586, 5, 0) @[el2_lib.scala 335:37] + node _T_652 = eq(_T_651, UInt<5>("h01d")) @[el2_lib.scala 335:44] + _T_594[28] <= _T_652 @[el2_lib.scala 335:25] + node _T_653 = bits(_T_586, 5, 0) @[el2_lib.scala 335:37] + node _T_654 = eq(_T_653, UInt<5>("h01e")) @[el2_lib.scala 335:44] + _T_594[29] <= _T_654 @[el2_lib.scala 335:25] + node _T_655 = bits(_T_586, 5, 0) @[el2_lib.scala 335:37] + node _T_656 = eq(_T_655, UInt<5>("h01f")) @[el2_lib.scala 335:44] + _T_594[30] <= _T_656 @[el2_lib.scala 335:25] + node _T_657 = bits(_T_586, 5, 0) @[el2_lib.scala 335:37] + node _T_658 = eq(_T_657, UInt<6>("h020")) @[el2_lib.scala 335:44] + _T_594[31] <= _T_658 @[el2_lib.scala 335:25] + node _T_659 = bits(_T_586, 5, 0) @[el2_lib.scala 335:37] + node _T_660 = eq(_T_659, UInt<6>("h021")) @[el2_lib.scala 335:44] + _T_594[32] <= _T_660 @[el2_lib.scala 335:25] + node _T_661 = bits(_T_586, 5, 0) @[el2_lib.scala 335:37] + node _T_662 = eq(_T_661, UInt<6>("h022")) @[el2_lib.scala 335:44] + _T_594[33] <= _T_662 @[el2_lib.scala 335:25] + node _T_663 = bits(_T_586, 5, 0) @[el2_lib.scala 335:37] + node _T_664 = eq(_T_663, UInt<6>("h023")) @[el2_lib.scala 335:44] + _T_594[34] <= _T_664 @[el2_lib.scala 335:25] + node _T_665 = bits(_T_586, 5, 0) @[el2_lib.scala 335:37] + node _T_666 = eq(_T_665, UInt<6>("h024")) @[el2_lib.scala 335:44] + _T_594[35] <= _T_666 @[el2_lib.scala 335:25] + node _T_667 = bits(_T_586, 5, 0) @[el2_lib.scala 335:37] + node _T_668 = eq(_T_667, UInt<6>("h025")) @[el2_lib.scala 335:44] + _T_594[36] <= _T_668 @[el2_lib.scala 335:25] + node _T_669 = bits(_T_586, 5, 0) @[el2_lib.scala 335:37] + node _T_670 = eq(_T_669, UInt<6>("h026")) @[el2_lib.scala 335:44] + _T_594[37] <= _T_670 @[el2_lib.scala 335:25] + node _T_671 = bits(_T_586, 5, 0) @[el2_lib.scala 335:37] + node _T_672 = eq(_T_671, UInt<6>("h027")) @[el2_lib.scala 335:44] + _T_594[38] <= _T_672 @[el2_lib.scala 335:25] + node _T_673 = bits(dccm_data_ecc_lo_any, 6, 6) @[el2_lib.scala 337:37] + node _T_674 = bits(dccm_rdata_lo_any, 31, 26) @[el2_lib.scala 337:45] + node _T_675 = bits(dccm_data_ecc_lo_any, 5, 5) @[el2_lib.scala 337:61] + node _T_676 = bits(dccm_rdata_lo_any, 25, 11) @[el2_lib.scala 337:69] + node _T_677 = bits(dccm_data_ecc_lo_any, 4, 4) @[el2_lib.scala 337:85] + node _T_678 = bits(dccm_rdata_lo_any, 10, 4) @[el2_lib.scala 337:93] + node _T_679 = bits(dccm_data_ecc_lo_any, 3, 3) @[el2_lib.scala 337:108] + node _T_680 = bits(dccm_rdata_lo_any, 3, 1) @[el2_lib.scala 337:116] + node _T_681 = bits(dccm_data_ecc_lo_any, 2, 2) @[el2_lib.scala 337:130] + node _T_682 = bits(dccm_rdata_lo_any, 0, 0) @[el2_lib.scala 337:138] + node _T_683 = bits(dccm_data_ecc_lo_any, 1, 0) @[el2_lib.scala 337:149] + node _T_684 = cat(_T_682, _T_683) @[Cat.scala 29:58] + node _T_685 = cat(_T_679, _T_680) @[Cat.scala 29:58] + node _T_686 = cat(_T_685, _T_681) @[Cat.scala 29:58] + node _T_687 = cat(_T_686, _T_684) @[Cat.scala 29:58] + node _T_688 = cat(_T_676, _T_677) @[Cat.scala 29:58] + node _T_689 = cat(_T_688, _T_678) @[Cat.scala 29:58] + node _T_690 = cat(_T_673, _T_674) @[Cat.scala 29:58] + node _T_691 = cat(_T_690, _T_675) @[Cat.scala 29:58] + node _T_692 = cat(_T_691, _T_689) @[Cat.scala 29:58] + node _T_693 = cat(_T_692, _T_687) @[Cat.scala 29:58] + node _T_694 = bits(single_ecc_error_lo_any, 0, 0) @[el2_lib.scala 338:49] + node _T_695 = cat(_T_594[1], _T_594[0]) @[el2_lib.scala 338:69] + node _T_696 = cat(_T_594[3], _T_594[2]) @[el2_lib.scala 338:69] + node _T_697 = cat(_T_696, _T_695) @[el2_lib.scala 338:69] + node _T_698 = cat(_T_594[5], _T_594[4]) @[el2_lib.scala 338:69] + node _T_699 = cat(_T_594[8], _T_594[7]) @[el2_lib.scala 338:69] + node _T_700 = cat(_T_699, _T_594[6]) @[el2_lib.scala 338:69] + node _T_701 = cat(_T_700, _T_698) @[el2_lib.scala 338:69] + node _T_702 = cat(_T_701, _T_697) @[el2_lib.scala 338:69] + node _T_703 = cat(_T_594[10], _T_594[9]) @[el2_lib.scala 338:69] + node _T_704 = cat(_T_594[13], _T_594[12]) @[el2_lib.scala 338:69] + node _T_705 = cat(_T_704, _T_594[11]) @[el2_lib.scala 338:69] + node _T_706 = cat(_T_705, _T_703) @[el2_lib.scala 338:69] + node _T_707 = cat(_T_594[15], _T_594[14]) @[el2_lib.scala 338:69] + node _T_708 = cat(_T_594[18], _T_594[17]) @[el2_lib.scala 338:69] + node _T_709 = cat(_T_708, _T_594[16]) @[el2_lib.scala 338:69] + node _T_710 = cat(_T_709, _T_707) @[el2_lib.scala 338:69] + node _T_711 = cat(_T_710, _T_706) @[el2_lib.scala 338:69] + node _T_712 = cat(_T_711, _T_702) @[el2_lib.scala 338:69] + node _T_713 = cat(_T_594[20], _T_594[19]) @[el2_lib.scala 338:69] + node _T_714 = cat(_T_594[23], _T_594[22]) @[el2_lib.scala 338:69] + node _T_715 = cat(_T_714, _T_594[21]) @[el2_lib.scala 338:69] + node _T_716 = cat(_T_715, _T_713) @[el2_lib.scala 338:69] + node _T_717 = cat(_T_594[25], _T_594[24]) @[el2_lib.scala 338:69] + node _T_718 = cat(_T_594[28], _T_594[27]) @[el2_lib.scala 338:69] + node _T_719 = cat(_T_718, _T_594[26]) @[el2_lib.scala 338:69] + node _T_720 = cat(_T_719, _T_717) @[el2_lib.scala 338:69] + node _T_721 = cat(_T_720, _T_716) @[el2_lib.scala 338:69] + node _T_722 = cat(_T_594[30], _T_594[29]) @[el2_lib.scala 338:69] + node _T_723 = cat(_T_594[33], _T_594[32]) @[el2_lib.scala 338:69] + node _T_724 = cat(_T_723, _T_594[31]) @[el2_lib.scala 338:69] + node _T_725 = cat(_T_724, _T_722) @[el2_lib.scala 338:69] + node _T_726 = cat(_T_594[35], _T_594[34]) @[el2_lib.scala 338:69] + node _T_727 = cat(_T_594[38], _T_594[37]) @[el2_lib.scala 338:69] + node _T_728 = cat(_T_727, _T_594[36]) @[el2_lib.scala 338:69] + node _T_729 = cat(_T_728, _T_726) @[el2_lib.scala 338:69] + node _T_730 = cat(_T_729, _T_725) @[el2_lib.scala 338:69] + node _T_731 = cat(_T_730, _T_721) @[el2_lib.scala 338:69] + node _T_732 = cat(_T_731, _T_712) @[el2_lib.scala 338:69] + node _T_733 = xor(_T_732, _T_693) @[el2_lib.scala 338:76] + node _T_734 = mux(_T_694, _T_733, _T_693) @[el2_lib.scala 338:31] + node _T_735 = bits(_T_734, 37, 32) @[el2_lib.scala 340:36] + node _T_736 = bits(_T_734, 30, 16) @[el2_lib.scala 340:62] + node _T_737 = bits(_T_734, 14, 8) @[el2_lib.scala 340:88] + node _T_738 = bits(_T_734, 6, 4) @[el2_lib.scala 340:113] + node _T_739 = bits(_T_734, 2, 2) @[el2_lib.scala 340:137] + node _T_740 = cat(_T_738, _T_739) @[Cat.scala 29:58] + node _T_741 = cat(_T_735, _T_736) @[Cat.scala 29:58] + node _T_742 = cat(_T_741, _T_737) @[Cat.scala 29:58] + node sec_data_lo_any = cat(_T_742, _T_740) @[Cat.scala 29:58] + node _T_743 = bits(_T_734, 38, 38) @[el2_lib.scala 341:39] + node _T_744 = bits(_T_586, 6, 0) @[el2_lib.scala 341:56] + node _T_745 = eq(_T_744, UInt<7>("h040")) @[el2_lib.scala 341:63] + node _T_746 = xor(_T_743, _T_745) @[el2_lib.scala 341:44] + node _T_747 = bits(_T_734, 31, 31) @[el2_lib.scala 341:103] + node _T_748 = bits(_T_734, 15, 15) @[el2_lib.scala 341:125] + node _T_749 = bits(_T_734, 7, 7) @[el2_lib.scala 341:147] + node _T_750 = bits(_T_734, 3, 3) @[el2_lib.scala 341:168] + node _T_751 = bits(_T_734, 1, 0) @[el2_lib.scala 341:189] + node _T_752 = cat(_T_749, _T_750) @[Cat.scala 29:58] + node _T_753 = cat(_T_752, _T_751) @[Cat.scala 29:58] + node _T_754 = cat(_T_746, _T_747) @[Cat.scala 29:58] + node _T_755 = cat(_T_754, _T_748) @[Cat.scala 29:58] + node ecc_out_lo_nc = cat(_T_755, _T_753) @[Cat.scala 29:58] + wire _T_756 : UInt<1>[18] @[el2_lib.scala 248:18] + wire _T_757 : UInt<1>[18] @[el2_lib.scala 249:18] + wire _T_758 : UInt<1>[18] @[el2_lib.scala 250:18] + wire _T_759 : UInt<1>[15] @[el2_lib.scala 251:18] + wire _T_760 : UInt<1>[15] @[el2_lib.scala 252:18] + wire _T_761 : UInt<1>[6] @[el2_lib.scala 253:18] + node _T_762 = bits(dccm_wdata_lo_any, 0, 0) @[el2_lib.scala 262:21] + _T_756[0] <= _T_762 @[el2_lib.scala 262:15] + node _T_763 = bits(dccm_wdata_lo_any, 0, 0) @[el2_lib.scala 265:21] + _T_757[0] <= _T_763 @[el2_lib.scala 265:15] + node _T_764 = bits(dccm_wdata_lo_any, 1, 1) @[el2_lib.scala 262:21] + _T_756[1] <= _T_764 @[el2_lib.scala 262:15] + node _T_765 = bits(dccm_wdata_lo_any, 1, 1) @[el2_lib.scala 268:21] + _T_758[0] <= _T_765 @[el2_lib.scala 268:15] + node _T_766 = bits(dccm_wdata_lo_any, 2, 2) @[el2_lib.scala 265:21] + _T_757[1] <= _T_766 @[el2_lib.scala 265:15] + node _T_767 = bits(dccm_wdata_lo_any, 2, 2) @[el2_lib.scala 268:21] + _T_758[1] <= _T_767 @[el2_lib.scala 268:15] + node _T_768 = bits(dccm_wdata_lo_any, 3, 3) @[el2_lib.scala 262:21] + _T_756[2] <= _T_768 @[el2_lib.scala 262:15] + node _T_769 = bits(dccm_wdata_lo_any, 3, 3) @[el2_lib.scala 265:21] + _T_757[2] <= _T_769 @[el2_lib.scala 265:15] + node _T_770 = bits(dccm_wdata_lo_any, 3, 3) @[el2_lib.scala 268:21] + _T_758[2] <= _T_770 @[el2_lib.scala 268:15] + node _T_771 = bits(dccm_wdata_lo_any, 4, 4) @[el2_lib.scala 262:21] + _T_756[3] <= _T_771 @[el2_lib.scala 262:15] + node _T_772 = bits(dccm_wdata_lo_any, 4, 4) @[el2_lib.scala 271:21] + _T_759[0] <= _T_772 @[el2_lib.scala 271:15] + node _T_773 = bits(dccm_wdata_lo_any, 5, 5) @[el2_lib.scala 265:21] + _T_757[3] <= _T_773 @[el2_lib.scala 265:15] + node _T_774 = bits(dccm_wdata_lo_any, 5, 5) @[el2_lib.scala 271:21] + _T_759[1] <= _T_774 @[el2_lib.scala 271:15] + node _T_775 = bits(dccm_wdata_lo_any, 6, 6) @[el2_lib.scala 262:21] + _T_756[4] <= _T_775 @[el2_lib.scala 262:15] + node _T_776 = bits(dccm_wdata_lo_any, 6, 6) @[el2_lib.scala 265:21] + _T_757[4] <= _T_776 @[el2_lib.scala 265:15] + node _T_777 = bits(dccm_wdata_lo_any, 6, 6) @[el2_lib.scala 271:21] + _T_759[2] <= _T_777 @[el2_lib.scala 271:15] + node _T_778 = bits(dccm_wdata_lo_any, 7, 7) @[el2_lib.scala 268:21] + _T_758[3] <= _T_778 @[el2_lib.scala 268:15] + node _T_779 = bits(dccm_wdata_lo_any, 7, 7) @[el2_lib.scala 271:21] + _T_759[3] <= _T_779 @[el2_lib.scala 271:15] + node _T_780 = bits(dccm_wdata_lo_any, 8, 8) @[el2_lib.scala 262:21] + _T_756[5] <= _T_780 @[el2_lib.scala 262:15] + node _T_781 = bits(dccm_wdata_lo_any, 8, 8) @[el2_lib.scala 268:21] + _T_758[4] <= _T_781 @[el2_lib.scala 268:15] + node _T_782 = bits(dccm_wdata_lo_any, 8, 8) @[el2_lib.scala 271:21] + _T_759[4] <= _T_782 @[el2_lib.scala 271:15] + node _T_783 = bits(dccm_wdata_lo_any, 9, 9) @[el2_lib.scala 265:21] + _T_757[5] <= _T_783 @[el2_lib.scala 265:15] + node _T_784 = bits(dccm_wdata_lo_any, 9, 9) @[el2_lib.scala 268:21] + _T_758[5] <= _T_784 @[el2_lib.scala 268:15] + node _T_785 = bits(dccm_wdata_lo_any, 9, 9) @[el2_lib.scala 271:21] + _T_759[5] <= _T_785 @[el2_lib.scala 271:15] + node _T_786 = bits(dccm_wdata_lo_any, 10, 10) @[el2_lib.scala 262:21] + _T_756[6] <= _T_786 @[el2_lib.scala 262:15] + node _T_787 = bits(dccm_wdata_lo_any, 10, 10) @[el2_lib.scala 265:21] + _T_757[6] <= _T_787 @[el2_lib.scala 265:15] + node _T_788 = bits(dccm_wdata_lo_any, 10, 10) @[el2_lib.scala 268:21] + _T_758[6] <= _T_788 @[el2_lib.scala 268:15] + node _T_789 = bits(dccm_wdata_lo_any, 10, 10) @[el2_lib.scala 271:21] + _T_759[6] <= _T_789 @[el2_lib.scala 271:15] + node _T_790 = bits(dccm_wdata_lo_any, 11, 11) @[el2_lib.scala 262:21] + _T_756[7] <= _T_790 @[el2_lib.scala 262:15] + node _T_791 = bits(dccm_wdata_lo_any, 11, 11) @[el2_lib.scala 274:21] + _T_760[0] <= _T_791 @[el2_lib.scala 274:15] + node _T_792 = bits(dccm_wdata_lo_any, 12, 12) @[el2_lib.scala 265:21] + _T_757[7] <= _T_792 @[el2_lib.scala 265:15] + node _T_793 = bits(dccm_wdata_lo_any, 12, 12) @[el2_lib.scala 274:21] + _T_760[1] <= _T_793 @[el2_lib.scala 274:15] + node _T_794 = bits(dccm_wdata_lo_any, 13, 13) @[el2_lib.scala 262:21] + _T_756[8] <= _T_794 @[el2_lib.scala 262:15] + node _T_795 = bits(dccm_wdata_lo_any, 13, 13) @[el2_lib.scala 265:21] + _T_757[8] <= _T_795 @[el2_lib.scala 265:15] + node _T_796 = bits(dccm_wdata_lo_any, 13, 13) @[el2_lib.scala 274:21] + _T_760[2] <= _T_796 @[el2_lib.scala 274:15] + node _T_797 = bits(dccm_wdata_lo_any, 14, 14) @[el2_lib.scala 268:21] + _T_758[7] <= _T_797 @[el2_lib.scala 268:15] + node _T_798 = bits(dccm_wdata_lo_any, 14, 14) @[el2_lib.scala 274:21] + _T_760[3] <= _T_798 @[el2_lib.scala 274:15] + node _T_799 = bits(dccm_wdata_lo_any, 15, 15) @[el2_lib.scala 262:21] + _T_756[9] <= _T_799 @[el2_lib.scala 262:15] + node _T_800 = bits(dccm_wdata_lo_any, 15, 15) @[el2_lib.scala 268:21] + _T_758[8] <= _T_800 @[el2_lib.scala 268:15] + node _T_801 = bits(dccm_wdata_lo_any, 15, 15) @[el2_lib.scala 274:21] + _T_760[4] <= _T_801 @[el2_lib.scala 274:15] + node _T_802 = bits(dccm_wdata_lo_any, 16, 16) @[el2_lib.scala 265:21] + _T_757[9] <= _T_802 @[el2_lib.scala 265:15] + node _T_803 = bits(dccm_wdata_lo_any, 16, 16) @[el2_lib.scala 268:21] + _T_758[9] <= _T_803 @[el2_lib.scala 268:15] + node _T_804 = bits(dccm_wdata_lo_any, 16, 16) @[el2_lib.scala 274:21] + _T_760[5] <= _T_804 @[el2_lib.scala 274:15] + node _T_805 = bits(dccm_wdata_lo_any, 17, 17) @[el2_lib.scala 262:21] + _T_756[10] <= _T_805 @[el2_lib.scala 262:15] + node _T_806 = bits(dccm_wdata_lo_any, 17, 17) @[el2_lib.scala 265:21] + _T_757[10] <= _T_806 @[el2_lib.scala 265:15] + node _T_807 = bits(dccm_wdata_lo_any, 17, 17) @[el2_lib.scala 268:21] + _T_758[10] <= _T_807 @[el2_lib.scala 268:15] + node _T_808 = bits(dccm_wdata_lo_any, 17, 17) @[el2_lib.scala 274:21] + _T_760[6] <= _T_808 @[el2_lib.scala 274:15] + node _T_809 = bits(dccm_wdata_lo_any, 18, 18) @[el2_lib.scala 271:21] + _T_759[7] <= _T_809 @[el2_lib.scala 271:15] + node _T_810 = bits(dccm_wdata_lo_any, 18, 18) @[el2_lib.scala 274:21] + _T_760[7] <= _T_810 @[el2_lib.scala 274:15] + node _T_811 = bits(dccm_wdata_lo_any, 19, 19) @[el2_lib.scala 262:21] + _T_756[11] <= _T_811 @[el2_lib.scala 262:15] + node _T_812 = bits(dccm_wdata_lo_any, 19, 19) @[el2_lib.scala 271:21] + _T_759[8] <= _T_812 @[el2_lib.scala 271:15] + node _T_813 = bits(dccm_wdata_lo_any, 19, 19) @[el2_lib.scala 274:21] + _T_760[8] <= _T_813 @[el2_lib.scala 274:15] + node _T_814 = bits(dccm_wdata_lo_any, 20, 20) @[el2_lib.scala 265:21] + _T_757[11] <= _T_814 @[el2_lib.scala 265:15] + node _T_815 = bits(dccm_wdata_lo_any, 20, 20) @[el2_lib.scala 271:21] + _T_759[9] <= _T_815 @[el2_lib.scala 271:15] + node _T_816 = bits(dccm_wdata_lo_any, 20, 20) @[el2_lib.scala 274:21] + _T_760[9] <= _T_816 @[el2_lib.scala 274:15] + node _T_817 = bits(dccm_wdata_lo_any, 21, 21) @[el2_lib.scala 262:21] + _T_756[12] <= _T_817 @[el2_lib.scala 262:15] + node _T_818 = bits(dccm_wdata_lo_any, 21, 21) @[el2_lib.scala 265:21] + _T_757[12] <= _T_818 @[el2_lib.scala 265:15] + node _T_819 = bits(dccm_wdata_lo_any, 21, 21) @[el2_lib.scala 271:21] + _T_759[10] <= _T_819 @[el2_lib.scala 271:15] + node _T_820 = bits(dccm_wdata_lo_any, 21, 21) @[el2_lib.scala 274:21] + _T_760[10] <= _T_820 @[el2_lib.scala 274:15] + node _T_821 = bits(dccm_wdata_lo_any, 22, 22) @[el2_lib.scala 268:21] + _T_758[11] <= _T_821 @[el2_lib.scala 268:15] + node _T_822 = bits(dccm_wdata_lo_any, 22, 22) @[el2_lib.scala 271:21] + _T_759[11] <= _T_822 @[el2_lib.scala 271:15] + node _T_823 = bits(dccm_wdata_lo_any, 22, 22) @[el2_lib.scala 274:21] + _T_760[11] <= _T_823 @[el2_lib.scala 274:15] + node _T_824 = bits(dccm_wdata_lo_any, 23, 23) @[el2_lib.scala 262:21] + _T_756[13] <= _T_824 @[el2_lib.scala 262:15] + node _T_825 = bits(dccm_wdata_lo_any, 23, 23) @[el2_lib.scala 268:21] + _T_758[12] <= _T_825 @[el2_lib.scala 268:15] + node _T_826 = bits(dccm_wdata_lo_any, 23, 23) @[el2_lib.scala 271:21] + _T_759[12] <= _T_826 @[el2_lib.scala 271:15] + node _T_827 = bits(dccm_wdata_lo_any, 23, 23) @[el2_lib.scala 274:21] + _T_760[12] <= _T_827 @[el2_lib.scala 274:15] + node _T_828 = bits(dccm_wdata_lo_any, 24, 24) @[el2_lib.scala 265:21] + _T_757[13] <= _T_828 @[el2_lib.scala 265:15] + node _T_829 = bits(dccm_wdata_lo_any, 24, 24) @[el2_lib.scala 268:21] + _T_758[13] <= _T_829 @[el2_lib.scala 268:15] + node _T_830 = bits(dccm_wdata_lo_any, 24, 24) @[el2_lib.scala 271:21] + _T_759[13] <= _T_830 @[el2_lib.scala 271:15] + node _T_831 = bits(dccm_wdata_lo_any, 24, 24) @[el2_lib.scala 274:21] + _T_760[13] <= _T_831 @[el2_lib.scala 274:15] + node _T_832 = bits(dccm_wdata_lo_any, 25, 25) @[el2_lib.scala 262:21] + _T_756[14] <= _T_832 @[el2_lib.scala 262:15] + node _T_833 = bits(dccm_wdata_lo_any, 25, 25) @[el2_lib.scala 265:21] + _T_757[14] <= _T_833 @[el2_lib.scala 265:15] + node _T_834 = bits(dccm_wdata_lo_any, 25, 25) @[el2_lib.scala 268:21] + _T_758[14] <= _T_834 @[el2_lib.scala 268:15] + node _T_835 = bits(dccm_wdata_lo_any, 25, 25) @[el2_lib.scala 271:21] + _T_759[14] <= _T_835 @[el2_lib.scala 271:15] + node _T_836 = bits(dccm_wdata_lo_any, 25, 25) @[el2_lib.scala 274:21] + _T_760[14] <= _T_836 @[el2_lib.scala 274:15] + node _T_837 = bits(dccm_wdata_lo_any, 26, 26) @[el2_lib.scala 262:21] + _T_756[15] <= _T_837 @[el2_lib.scala 262:15] + node _T_838 = bits(dccm_wdata_lo_any, 26, 26) @[el2_lib.scala 277:21] + _T_761[0] <= _T_838 @[el2_lib.scala 277:15] + node _T_839 = bits(dccm_wdata_lo_any, 27, 27) @[el2_lib.scala 265:21] + _T_757[15] <= _T_839 @[el2_lib.scala 265:15] + node _T_840 = bits(dccm_wdata_lo_any, 27, 27) @[el2_lib.scala 277:21] + _T_761[1] <= _T_840 @[el2_lib.scala 277:15] + node _T_841 = bits(dccm_wdata_lo_any, 28, 28) @[el2_lib.scala 262:21] + _T_756[16] <= _T_841 @[el2_lib.scala 262:15] + node _T_842 = bits(dccm_wdata_lo_any, 28, 28) @[el2_lib.scala 265:21] + _T_757[16] <= _T_842 @[el2_lib.scala 265:15] + node _T_843 = bits(dccm_wdata_lo_any, 28, 28) @[el2_lib.scala 277:21] + _T_761[2] <= _T_843 @[el2_lib.scala 277:15] + node _T_844 = bits(dccm_wdata_lo_any, 29, 29) @[el2_lib.scala 268:21] + _T_758[15] <= _T_844 @[el2_lib.scala 268:15] + node _T_845 = bits(dccm_wdata_lo_any, 29, 29) @[el2_lib.scala 277:21] + _T_761[3] <= _T_845 @[el2_lib.scala 277:15] + node _T_846 = bits(dccm_wdata_lo_any, 30, 30) @[el2_lib.scala 262:21] + _T_756[17] <= _T_846 @[el2_lib.scala 262:15] + node _T_847 = bits(dccm_wdata_lo_any, 30, 30) @[el2_lib.scala 268:21] + _T_758[16] <= _T_847 @[el2_lib.scala 268:15] + node _T_848 = bits(dccm_wdata_lo_any, 30, 30) @[el2_lib.scala 277:21] + _T_761[4] <= _T_848 @[el2_lib.scala 277:15] + node _T_849 = bits(dccm_wdata_lo_any, 31, 31) @[el2_lib.scala 265:21] + _T_757[17] <= _T_849 @[el2_lib.scala 265:15] + node _T_850 = bits(dccm_wdata_lo_any, 31, 31) @[el2_lib.scala 268:21] + _T_758[17] <= _T_850 @[el2_lib.scala 268:15] + node _T_851 = bits(dccm_wdata_lo_any, 31, 31) @[el2_lib.scala 277:21] + _T_761[5] <= _T_851 @[el2_lib.scala 277:15] + node _T_852 = cat(_T_761[2], _T_761[1]) @[el2_lib.scala 280:22] + node _T_853 = cat(_T_852, _T_761[0]) @[el2_lib.scala 280:22] + node _T_854 = cat(_T_761[5], _T_761[4]) @[el2_lib.scala 280:22] + node _T_855 = cat(_T_854, _T_761[3]) @[el2_lib.scala 280:22] + node _T_856 = cat(_T_855, _T_853) @[el2_lib.scala 280:22] + node _T_857 = xorr(_T_856) @[el2_lib.scala 280:29] + node _T_858 = cat(_T_760[2], _T_760[1]) @[el2_lib.scala 280:40] + node _T_859 = cat(_T_858, _T_760[0]) @[el2_lib.scala 280:40] + node _T_860 = cat(_T_760[4], _T_760[3]) @[el2_lib.scala 280:40] + node _T_861 = cat(_T_760[6], _T_760[5]) @[el2_lib.scala 280:40] + node _T_862 = cat(_T_861, _T_860) @[el2_lib.scala 280:40] + node _T_863 = cat(_T_862, _T_859) @[el2_lib.scala 280:40] + node _T_864 = cat(_T_760[8], _T_760[7]) @[el2_lib.scala 280:40] + node _T_865 = cat(_T_760[10], _T_760[9]) @[el2_lib.scala 280:40] + node _T_866 = cat(_T_865, _T_864) @[el2_lib.scala 280:40] + node _T_867 = cat(_T_760[12], _T_760[11]) @[el2_lib.scala 280:40] + node _T_868 = cat(_T_760[14], _T_760[13]) @[el2_lib.scala 280:40] + node _T_869 = cat(_T_868, _T_867) @[el2_lib.scala 280:40] + node _T_870 = cat(_T_869, _T_866) @[el2_lib.scala 280:40] + node _T_871 = cat(_T_870, _T_863) @[el2_lib.scala 280:40] + node _T_872 = xorr(_T_871) @[el2_lib.scala 280:47] + node _T_873 = cat(_T_759[2], _T_759[1]) @[el2_lib.scala 280:58] + node _T_874 = cat(_T_873, _T_759[0]) @[el2_lib.scala 280:58] + node _T_875 = cat(_T_759[4], _T_759[3]) @[el2_lib.scala 280:58] + node _T_876 = cat(_T_759[6], _T_759[5]) @[el2_lib.scala 280:58] + node _T_877 = cat(_T_876, _T_875) @[el2_lib.scala 280:58] + node _T_878 = cat(_T_877, _T_874) @[el2_lib.scala 280:58] + node _T_879 = cat(_T_759[8], _T_759[7]) @[el2_lib.scala 280:58] + node _T_880 = cat(_T_759[10], _T_759[9]) @[el2_lib.scala 280:58] + node _T_881 = cat(_T_880, _T_879) @[el2_lib.scala 280:58] + node _T_882 = cat(_T_759[12], _T_759[11]) @[el2_lib.scala 280:58] + node _T_883 = cat(_T_759[14], _T_759[13]) @[el2_lib.scala 280:58] + node _T_884 = cat(_T_883, _T_882) @[el2_lib.scala 280:58] + node _T_885 = cat(_T_884, _T_881) @[el2_lib.scala 280:58] + node _T_886 = cat(_T_885, _T_878) @[el2_lib.scala 280:58] + node _T_887 = xorr(_T_886) @[el2_lib.scala 280:65] + node _T_888 = cat(_T_758[1], _T_758[0]) @[el2_lib.scala 280:76] + node _T_889 = cat(_T_758[3], _T_758[2]) @[el2_lib.scala 280:76] + node _T_890 = cat(_T_889, _T_888) @[el2_lib.scala 280:76] + node _T_891 = cat(_T_758[5], _T_758[4]) @[el2_lib.scala 280:76] + node _T_892 = cat(_T_758[8], _T_758[7]) @[el2_lib.scala 280:76] + node _T_893 = cat(_T_892, _T_758[6]) @[el2_lib.scala 280:76] + node _T_894 = cat(_T_893, _T_891) @[el2_lib.scala 280:76] + node _T_895 = cat(_T_894, _T_890) @[el2_lib.scala 280:76] + node _T_896 = cat(_T_758[10], _T_758[9]) @[el2_lib.scala 280:76] + node _T_897 = cat(_T_758[12], _T_758[11]) @[el2_lib.scala 280:76] + node _T_898 = cat(_T_897, _T_896) @[el2_lib.scala 280:76] + node _T_899 = cat(_T_758[14], _T_758[13]) @[el2_lib.scala 280:76] + node _T_900 = cat(_T_758[17], _T_758[16]) @[el2_lib.scala 280:76] + node _T_901 = cat(_T_900, _T_758[15]) @[el2_lib.scala 280:76] + node _T_902 = cat(_T_901, _T_899) @[el2_lib.scala 280:76] + node _T_903 = cat(_T_902, _T_898) @[el2_lib.scala 280:76] + node _T_904 = cat(_T_903, _T_895) @[el2_lib.scala 280:76] + node _T_905 = xorr(_T_904) @[el2_lib.scala 280:83] + node _T_906 = cat(_T_757[1], _T_757[0]) @[el2_lib.scala 280:94] + node _T_907 = cat(_T_757[3], _T_757[2]) @[el2_lib.scala 280:94] + node _T_908 = cat(_T_907, _T_906) @[el2_lib.scala 280:94] + node _T_909 = cat(_T_757[5], _T_757[4]) @[el2_lib.scala 280:94] + node _T_910 = cat(_T_757[8], _T_757[7]) @[el2_lib.scala 280:94] + node _T_911 = cat(_T_910, _T_757[6]) @[el2_lib.scala 280:94] + node _T_912 = cat(_T_911, _T_909) @[el2_lib.scala 280:94] + node _T_913 = cat(_T_912, _T_908) @[el2_lib.scala 280:94] + node _T_914 = cat(_T_757[10], _T_757[9]) @[el2_lib.scala 280:94] + node _T_915 = cat(_T_757[12], _T_757[11]) @[el2_lib.scala 280:94] + node _T_916 = cat(_T_915, _T_914) @[el2_lib.scala 280:94] + node _T_917 = cat(_T_757[14], _T_757[13]) @[el2_lib.scala 280:94] + node _T_918 = cat(_T_757[17], _T_757[16]) @[el2_lib.scala 280:94] + node _T_919 = cat(_T_918, _T_757[15]) @[el2_lib.scala 280:94] + node _T_920 = cat(_T_919, _T_917) @[el2_lib.scala 280:94] + node _T_921 = cat(_T_920, _T_916) @[el2_lib.scala 280:94] + node _T_922 = cat(_T_921, _T_913) @[el2_lib.scala 280:94] + node _T_923 = xorr(_T_922) @[el2_lib.scala 280:101] + node _T_924 = cat(_T_756[1], _T_756[0]) @[el2_lib.scala 280:112] + node _T_925 = cat(_T_756[3], _T_756[2]) @[el2_lib.scala 280:112] + node _T_926 = cat(_T_925, _T_924) @[el2_lib.scala 280:112] + node _T_927 = cat(_T_756[5], _T_756[4]) @[el2_lib.scala 280:112] + node _T_928 = cat(_T_756[8], _T_756[7]) @[el2_lib.scala 280:112] + node _T_929 = cat(_T_928, _T_756[6]) @[el2_lib.scala 280:112] + node _T_930 = cat(_T_929, _T_927) @[el2_lib.scala 280:112] + node _T_931 = cat(_T_930, _T_926) @[el2_lib.scala 280:112] + node _T_932 = cat(_T_756[10], _T_756[9]) @[el2_lib.scala 280:112] + node _T_933 = cat(_T_756[12], _T_756[11]) @[el2_lib.scala 280:112] + node _T_934 = cat(_T_933, _T_932) @[el2_lib.scala 280:112] + node _T_935 = cat(_T_756[14], _T_756[13]) @[el2_lib.scala 280:112] + node _T_936 = cat(_T_756[17], _T_756[16]) @[el2_lib.scala 280:112] + node _T_937 = cat(_T_936, _T_756[15]) @[el2_lib.scala 280:112] + node _T_938 = cat(_T_937, _T_935) @[el2_lib.scala 280:112] + node _T_939 = cat(_T_938, _T_934) @[el2_lib.scala 280:112] + node _T_940 = cat(_T_939, _T_931) @[el2_lib.scala 280:112] + node _T_941 = xorr(_T_940) @[el2_lib.scala 280:119] + node _T_942 = cat(_T_905, _T_923) @[Cat.scala 29:58] + node _T_943 = cat(_T_942, _T_941) @[Cat.scala 29:58] + node _T_944 = cat(_T_857, _T_872) @[Cat.scala 29:58] + node _T_945 = cat(_T_944, _T_887) @[Cat.scala 29:58] + node _T_946 = cat(_T_945, _T_943) @[Cat.scala 29:58] + node _T_947 = xorr(dccm_wdata_lo_any) @[el2_lib.scala 281:27] + node _T_948 = xorr(_T_946) @[el2_lib.scala 281:37] + node _T_949 = xor(_T_947, _T_948) @[el2_lib.scala 281:32] + node dccm_wdata_ecc_lo_any = cat(_T_949, _T_946) @[Cat.scala 29:58] + wire _T_950 : UInt<1>[18] @[el2_lib.scala 248:18] + wire _T_951 : UInt<1>[18] @[el2_lib.scala 249:18] + wire _T_952 : UInt<1>[18] @[el2_lib.scala 250:18] + wire _T_953 : UInt<1>[15] @[el2_lib.scala 251:18] + wire _T_954 : UInt<1>[15] @[el2_lib.scala 252:18] + wire _T_955 : UInt<1>[6] @[el2_lib.scala 253:18] + node _T_956 = bits(dccm_wdata_hi_any, 0, 0) @[el2_lib.scala 262:21] + _T_950[0] <= _T_956 @[el2_lib.scala 262:15] + node _T_957 = bits(dccm_wdata_hi_any, 0, 0) @[el2_lib.scala 265:21] + _T_951[0] <= _T_957 @[el2_lib.scala 265:15] + node _T_958 = bits(dccm_wdata_hi_any, 1, 1) @[el2_lib.scala 262:21] + _T_950[1] <= _T_958 @[el2_lib.scala 262:15] + node _T_959 = bits(dccm_wdata_hi_any, 1, 1) @[el2_lib.scala 268:21] + _T_952[0] <= _T_959 @[el2_lib.scala 268:15] + node _T_960 = bits(dccm_wdata_hi_any, 2, 2) @[el2_lib.scala 265:21] + _T_951[1] <= _T_960 @[el2_lib.scala 265:15] + node _T_961 = bits(dccm_wdata_hi_any, 2, 2) @[el2_lib.scala 268:21] + _T_952[1] <= _T_961 @[el2_lib.scala 268:15] + node _T_962 = bits(dccm_wdata_hi_any, 3, 3) @[el2_lib.scala 262:21] + _T_950[2] <= _T_962 @[el2_lib.scala 262:15] + node _T_963 = bits(dccm_wdata_hi_any, 3, 3) @[el2_lib.scala 265:21] + _T_951[2] <= _T_963 @[el2_lib.scala 265:15] + node _T_964 = bits(dccm_wdata_hi_any, 3, 3) @[el2_lib.scala 268:21] + _T_952[2] <= _T_964 @[el2_lib.scala 268:15] + node _T_965 = bits(dccm_wdata_hi_any, 4, 4) @[el2_lib.scala 262:21] + _T_950[3] <= _T_965 @[el2_lib.scala 262:15] + node _T_966 = bits(dccm_wdata_hi_any, 4, 4) @[el2_lib.scala 271:21] + _T_953[0] <= _T_966 @[el2_lib.scala 271:15] + node _T_967 = bits(dccm_wdata_hi_any, 5, 5) @[el2_lib.scala 265:21] + _T_951[3] <= _T_967 @[el2_lib.scala 265:15] + node _T_968 = bits(dccm_wdata_hi_any, 5, 5) @[el2_lib.scala 271:21] + _T_953[1] <= _T_968 @[el2_lib.scala 271:15] + node _T_969 = bits(dccm_wdata_hi_any, 6, 6) @[el2_lib.scala 262:21] + _T_950[4] <= _T_969 @[el2_lib.scala 262:15] + node _T_970 = bits(dccm_wdata_hi_any, 6, 6) @[el2_lib.scala 265:21] + _T_951[4] <= _T_970 @[el2_lib.scala 265:15] + node _T_971 = bits(dccm_wdata_hi_any, 6, 6) @[el2_lib.scala 271:21] + _T_953[2] <= _T_971 @[el2_lib.scala 271:15] + node _T_972 = bits(dccm_wdata_hi_any, 7, 7) @[el2_lib.scala 268:21] + _T_952[3] <= _T_972 @[el2_lib.scala 268:15] + node _T_973 = bits(dccm_wdata_hi_any, 7, 7) @[el2_lib.scala 271:21] + _T_953[3] <= _T_973 @[el2_lib.scala 271:15] + node _T_974 = bits(dccm_wdata_hi_any, 8, 8) @[el2_lib.scala 262:21] + _T_950[5] <= _T_974 @[el2_lib.scala 262:15] + node _T_975 = bits(dccm_wdata_hi_any, 8, 8) @[el2_lib.scala 268:21] + _T_952[4] <= _T_975 @[el2_lib.scala 268:15] + node _T_976 = bits(dccm_wdata_hi_any, 8, 8) @[el2_lib.scala 271:21] + _T_953[4] <= _T_976 @[el2_lib.scala 271:15] + node _T_977 = bits(dccm_wdata_hi_any, 9, 9) @[el2_lib.scala 265:21] + _T_951[5] <= _T_977 @[el2_lib.scala 265:15] + node _T_978 = bits(dccm_wdata_hi_any, 9, 9) @[el2_lib.scala 268:21] + _T_952[5] <= _T_978 @[el2_lib.scala 268:15] + node _T_979 = bits(dccm_wdata_hi_any, 9, 9) @[el2_lib.scala 271:21] + _T_953[5] <= _T_979 @[el2_lib.scala 271:15] + node _T_980 = bits(dccm_wdata_hi_any, 10, 10) @[el2_lib.scala 262:21] + _T_950[6] <= _T_980 @[el2_lib.scala 262:15] + node _T_981 = bits(dccm_wdata_hi_any, 10, 10) @[el2_lib.scala 265:21] + _T_951[6] <= _T_981 @[el2_lib.scala 265:15] + node _T_982 = bits(dccm_wdata_hi_any, 10, 10) @[el2_lib.scala 268:21] + _T_952[6] <= _T_982 @[el2_lib.scala 268:15] + node _T_983 = bits(dccm_wdata_hi_any, 10, 10) @[el2_lib.scala 271:21] + _T_953[6] <= _T_983 @[el2_lib.scala 271:15] + node _T_984 = bits(dccm_wdata_hi_any, 11, 11) @[el2_lib.scala 262:21] + _T_950[7] <= _T_984 @[el2_lib.scala 262:15] + node _T_985 = bits(dccm_wdata_hi_any, 11, 11) @[el2_lib.scala 274:21] + _T_954[0] <= _T_985 @[el2_lib.scala 274:15] + node _T_986 = bits(dccm_wdata_hi_any, 12, 12) @[el2_lib.scala 265:21] + _T_951[7] <= _T_986 @[el2_lib.scala 265:15] + node _T_987 = bits(dccm_wdata_hi_any, 12, 12) @[el2_lib.scala 274:21] + _T_954[1] <= _T_987 @[el2_lib.scala 274:15] + node _T_988 = bits(dccm_wdata_hi_any, 13, 13) @[el2_lib.scala 262:21] + _T_950[8] <= _T_988 @[el2_lib.scala 262:15] + node _T_989 = bits(dccm_wdata_hi_any, 13, 13) @[el2_lib.scala 265:21] + _T_951[8] <= _T_989 @[el2_lib.scala 265:15] + node _T_990 = bits(dccm_wdata_hi_any, 13, 13) @[el2_lib.scala 274:21] + _T_954[2] <= _T_990 @[el2_lib.scala 274:15] + node _T_991 = bits(dccm_wdata_hi_any, 14, 14) @[el2_lib.scala 268:21] + _T_952[7] <= _T_991 @[el2_lib.scala 268:15] + node _T_992 = bits(dccm_wdata_hi_any, 14, 14) @[el2_lib.scala 274:21] + _T_954[3] <= _T_992 @[el2_lib.scala 274:15] + node _T_993 = bits(dccm_wdata_hi_any, 15, 15) @[el2_lib.scala 262:21] + _T_950[9] <= _T_993 @[el2_lib.scala 262:15] + node _T_994 = bits(dccm_wdata_hi_any, 15, 15) @[el2_lib.scala 268:21] + _T_952[8] <= _T_994 @[el2_lib.scala 268:15] + node _T_995 = bits(dccm_wdata_hi_any, 15, 15) @[el2_lib.scala 274:21] + _T_954[4] <= _T_995 @[el2_lib.scala 274:15] + node _T_996 = bits(dccm_wdata_hi_any, 16, 16) @[el2_lib.scala 265:21] + _T_951[9] <= _T_996 @[el2_lib.scala 265:15] + node _T_997 = bits(dccm_wdata_hi_any, 16, 16) @[el2_lib.scala 268:21] + _T_952[9] <= _T_997 @[el2_lib.scala 268:15] + node _T_998 = bits(dccm_wdata_hi_any, 16, 16) @[el2_lib.scala 274:21] + _T_954[5] <= _T_998 @[el2_lib.scala 274:15] + node _T_999 = bits(dccm_wdata_hi_any, 17, 17) @[el2_lib.scala 262:21] + _T_950[10] <= _T_999 @[el2_lib.scala 262:15] + node _T_1000 = bits(dccm_wdata_hi_any, 17, 17) @[el2_lib.scala 265:21] + _T_951[10] <= _T_1000 @[el2_lib.scala 265:15] + node _T_1001 = bits(dccm_wdata_hi_any, 17, 17) @[el2_lib.scala 268:21] + _T_952[10] <= _T_1001 @[el2_lib.scala 268:15] + node _T_1002 = bits(dccm_wdata_hi_any, 17, 17) @[el2_lib.scala 274:21] + _T_954[6] <= _T_1002 @[el2_lib.scala 274:15] + node _T_1003 = bits(dccm_wdata_hi_any, 18, 18) @[el2_lib.scala 271:21] + _T_953[7] <= _T_1003 @[el2_lib.scala 271:15] + node _T_1004 = bits(dccm_wdata_hi_any, 18, 18) @[el2_lib.scala 274:21] + _T_954[7] <= _T_1004 @[el2_lib.scala 274:15] + node _T_1005 = bits(dccm_wdata_hi_any, 19, 19) @[el2_lib.scala 262:21] + _T_950[11] <= _T_1005 @[el2_lib.scala 262:15] + node _T_1006 = bits(dccm_wdata_hi_any, 19, 19) @[el2_lib.scala 271:21] + _T_953[8] <= _T_1006 @[el2_lib.scala 271:15] + node _T_1007 = bits(dccm_wdata_hi_any, 19, 19) @[el2_lib.scala 274:21] + _T_954[8] <= _T_1007 @[el2_lib.scala 274:15] + node _T_1008 = bits(dccm_wdata_hi_any, 20, 20) @[el2_lib.scala 265:21] + _T_951[11] <= _T_1008 @[el2_lib.scala 265:15] + node _T_1009 = bits(dccm_wdata_hi_any, 20, 20) @[el2_lib.scala 271:21] + _T_953[9] <= _T_1009 @[el2_lib.scala 271:15] + node _T_1010 = bits(dccm_wdata_hi_any, 20, 20) @[el2_lib.scala 274:21] + _T_954[9] <= _T_1010 @[el2_lib.scala 274:15] + node _T_1011 = bits(dccm_wdata_hi_any, 21, 21) @[el2_lib.scala 262:21] + _T_950[12] <= _T_1011 @[el2_lib.scala 262:15] + node _T_1012 = bits(dccm_wdata_hi_any, 21, 21) @[el2_lib.scala 265:21] + _T_951[12] <= _T_1012 @[el2_lib.scala 265:15] + node _T_1013 = bits(dccm_wdata_hi_any, 21, 21) @[el2_lib.scala 271:21] + _T_953[10] <= _T_1013 @[el2_lib.scala 271:15] + node _T_1014 = bits(dccm_wdata_hi_any, 21, 21) @[el2_lib.scala 274:21] + _T_954[10] <= _T_1014 @[el2_lib.scala 274:15] + node _T_1015 = bits(dccm_wdata_hi_any, 22, 22) @[el2_lib.scala 268:21] + _T_952[11] <= _T_1015 @[el2_lib.scala 268:15] + node _T_1016 = bits(dccm_wdata_hi_any, 22, 22) @[el2_lib.scala 271:21] + _T_953[11] <= _T_1016 @[el2_lib.scala 271:15] + node _T_1017 = bits(dccm_wdata_hi_any, 22, 22) @[el2_lib.scala 274:21] + _T_954[11] <= _T_1017 @[el2_lib.scala 274:15] + node _T_1018 = bits(dccm_wdata_hi_any, 23, 23) @[el2_lib.scala 262:21] + _T_950[13] <= _T_1018 @[el2_lib.scala 262:15] + node _T_1019 = bits(dccm_wdata_hi_any, 23, 23) @[el2_lib.scala 268:21] + _T_952[12] <= _T_1019 @[el2_lib.scala 268:15] + node _T_1020 = bits(dccm_wdata_hi_any, 23, 23) @[el2_lib.scala 271:21] + _T_953[12] <= _T_1020 @[el2_lib.scala 271:15] + node _T_1021 = bits(dccm_wdata_hi_any, 23, 23) @[el2_lib.scala 274:21] + _T_954[12] <= _T_1021 @[el2_lib.scala 274:15] + node _T_1022 = bits(dccm_wdata_hi_any, 24, 24) @[el2_lib.scala 265:21] + _T_951[13] <= _T_1022 @[el2_lib.scala 265:15] + node _T_1023 = bits(dccm_wdata_hi_any, 24, 24) @[el2_lib.scala 268:21] + _T_952[13] <= _T_1023 @[el2_lib.scala 268:15] + node _T_1024 = bits(dccm_wdata_hi_any, 24, 24) @[el2_lib.scala 271:21] + _T_953[13] <= _T_1024 @[el2_lib.scala 271:15] + node _T_1025 = bits(dccm_wdata_hi_any, 24, 24) @[el2_lib.scala 274:21] + _T_954[13] <= _T_1025 @[el2_lib.scala 274:15] + node _T_1026 = bits(dccm_wdata_hi_any, 25, 25) @[el2_lib.scala 262:21] + _T_950[14] <= _T_1026 @[el2_lib.scala 262:15] + node _T_1027 = bits(dccm_wdata_hi_any, 25, 25) @[el2_lib.scala 265:21] + _T_951[14] <= _T_1027 @[el2_lib.scala 265:15] + node _T_1028 = bits(dccm_wdata_hi_any, 25, 25) @[el2_lib.scala 268:21] + _T_952[14] <= _T_1028 @[el2_lib.scala 268:15] + node _T_1029 = bits(dccm_wdata_hi_any, 25, 25) @[el2_lib.scala 271:21] + _T_953[14] <= _T_1029 @[el2_lib.scala 271:15] + node _T_1030 = bits(dccm_wdata_hi_any, 25, 25) @[el2_lib.scala 274:21] + _T_954[14] <= _T_1030 @[el2_lib.scala 274:15] + node _T_1031 = bits(dccm_wdata_hi_any, 26, 26) @[el2_lib.scala 262:21] + _T_950[15] <= _T_1031 @[el2_lib.scala 262:15] + node _T_1032 = bits(dccm_wdata_hi_any, 26, 26) @[el2_lib.scala 277:21] + _T_955[0] <= _T_1032 @[el2_lib.scala 277:15] + node _T_1033 = bits(dccm_wdata_hi_any, 27, 27) @[el2_lib.scala 265:21] + _T_951[15] <= _T_1033 @[el2_lib.scala 265:15] + node _T_1034 = bits(dccm_wdata_hi_any, 27, 27) @[el2_lib.scala 277:21] + _T_955[1] <= _T_1034 @[el2_lib.scala 277:15] + node _T_1035 = bits(dccm_wdata_hi_any, 28, 28) @[el2_lib.scala 262:21] + _T_950[16] <= _T_1035 @[el2_lib.scala 262:15] + node _T_1036 = bits(dccm_wdata_hi_any, 28, 28) @[el2_lib.scala 265:21] + _T_951[16] <= _T_1036 @[el2_lib.scala 265:15] + node _T_1037 = bits(dccm_wdata_hi_any, 28, 28) @[el2_lib.scala 277:21] + _T_955[2] <= _T_1037 @[el2_lib.scala 277:15] + node _T_1038 = bits(dccm_wdata_hi_any, 29, 29) @[el2_lib.scala 268:21] + _T_952[15] <= _T_1038 @[el2_lib.scala 268:15] + node _T_1039 = bits(dccm_wdata_hi_any, 29, 29) @[el2_lib.scala 277:21] + _T_955[3] <= _T_1039 @[el2_lib.scala 277:15] + node _T_1040 = bits(dccm_wdata_hi_any, 30, 30) @[el2_lib.scala 262:21] + _T_950[17] <= _T_1040 @[el2_lib.scala 262:15] + node _T_1041 = bits(dccm_wdata_hi_any, 30, 30) @[el2_lib.scala 268:21] + _T_952[16] <= _T_1041 @[el2_lib.scala 268:15] + node _T_1042 = bits(dccm_wdata_hi_any, 30, 30) @[el2_lib.scala 277:21] + _T_955[4] <= _T_1042 @[el2_lib.scala 277:15] + node _T_1043 = bits(dccm_wdata_hi_any, 31, 31) @[el2_lib.scala 265:21] + _T_951[17] <= _T_1043 @[el2_lib.scala 265:15] + node _T_1044 = bits(dccm_wdata_hi_any, 31, 31) @[el2_lib.scala 268:21] + _T_952[17] <= _T_1044 @[el2_lib.scala 268:15] + node _T_1045 = bits(dccm_wdata_hi_any, 31, 31) @[el2_lib.scala 277:21] + _T_955[5] <= _T_1045 @[el2_lib.scala 277:15] + node _T_1046 = cat(_T_955[2], _T_955[1]) @[el2_lib.scala 280:22] + node _T_1047 = cat(_T_1046, _T_955[0]) @[el2_lib.scala 280:22] + node _T_1048 = cat(_T_955[5], _T_955[4]) @[el2_lib.scala 280:22] + node _T_1049 = cat(_T_1048, _T_955[3]) @[el2_lib.scala 280:22] + node _T_1050 = cat(_T_1049, _T_1047) @[el2_lib.scala 280:22] + node _T_1051 = xorr(_T_1050) @[el2_lib.scala 280:29] + node _T_1052 = cat(_T_954[2], _T_954[1]) @[el2_lib.scala 280:40] + node _T_1053 = cat(_T_1052, _T_954[0]) @[el2_lib.scala 280:40] + node _T_1054 = cat(_T_954[4], _T_954[3]) @[el2_lib.scala 280:40] + node _T_1055 = cat(_T_954[6], _T_954[5]) @[el2_lib.scala 280:40] + node _T_1056 = cat(_T_1055, _T_1054) @[el2_lib.scala 280:40] + node _T_1057 = cat(_T_1056, _T_1053) @[el2_lib.scala 280:40] + node _T_1058 = cat(_T_954[8], _T_954[7]) @[el2_lib.scala 280:40] + node _T_1059 = cat(_T_954[10], _T_954[9]) @[el2_lib.scala 280:40] + node _T_1060 = cat(_T_1059, _T_1058) @[el2_lib.scala 280:40] + node _T_1061 = cat(_T_954[12], _T_954[11]) @[el2_lib.scala 280:40] + node _T_1062 = cat(_T_954[14], _T_954[13]) @[el2_lib.scala 280:40] + node _T_1063 = cat(_T_1062, _T_1061) @[el2_lib.scala 280:40] + node _T_1064 = cat(_T_1063, _T_1060) @[el2_lib.scala 280:40] + node _T_1065 = cat(_T_1064, _T_1057) @[el2_lib.scala 280:40] + node _T_1066 = xorr(_T_1065) @[el2_lib.scala 280:47] + node _T_1067 = cat(_T_953[2], _T_953[1]) @[el2_lib.scala 280:58] + node _T_1068 = cat(_T_1067, _T_953[0]) @[el2_lib.scala 280:58] + node _T_1069 = cat(_T_953[4], _T_953[3]) @[el2_lib.scala 280:58] + node _T_1070 = cat(_T_953[6], _T_953[5]) @[el2_lib.scala 280:58] + node _T_1071 = cat(_T_1070, _T_1069) @[el2_lib.scala 280:58] + node _T_1072 = cat(_T_1071, _T_1068) @[el2_lib.scala 280:58] + node _T_1073 = cat(_T_953[8], _T_953[7]) @[el2_lib.scala 280:58] + node _T_1074 = cat(_T_953[10], _T_953[9]) @[el2_lib.scala 280:58] + node _T_1075 = cat(_T_1074, _T_1073) @[el2_lib.scala 280:58] + node _T_1076 = cat(_T_953[12], _T_953[11]) @[el2_lib.scala 280:58] + node _T_1077 = cat(_T_953[14], _T_953[13]) @[el2_lib.scala 280:58] + node _T_1078 = cat(_T_1077, _T_1076) @[el2_lib.scala 280:58] + node _T_1079 = cat(_T_1078, _T_1075) @[el2_lib.scala 280:58] + node _T_1080 = cat(_T_1079, _T_1072) @[el2_lib.scala 280:58] + node _T_1081 = xorr(_T_1080) @[el2_lib.scala 280:65] + node _T_1082 = cat(_T_952[1], _T_952[0]) @[el2_lib.scala 280:76] + node _T_1083 = cat(_T_952[3], _T_952[2]) @[el2_lib.scala 280:76] + node _T_1084 = cat(_T_1083, _T_1082) @[el2_lib.scala 280:76] + node _T_1085 = cat(_T_952[5], _T_952[4]) @[el2_lib.scala 280:76] + node _T_1086 = cat(_T_952[8], _T_952[7]) @[el2_lib.scala 280:76] + node _T_1087 = cat(_T_1086, _T_952[6]) @[el2_lib.scala 280:76] + node _T_1088 = cat(_T_1087, _T_1085) @[el2_lib.scala 280:76] + node _T_1089 = cat(_T_1088, _T_1084) @[el2_lib.scala 280:76] + node _T_1090 = cat(_T_952[10], _T_952[9]) @[el2_lib.scala 280:76] + node _T_1091 = cat(_T_952[12], _T_952[11]) @[el2_lib.scala 280:76] + node _T_1092 = cat(_T_1091, _T_1090) @[el2_lib.scala 280:76] + node _T_1093 = cat(_T_952[14], _T_952[13]) @[el2_lib.scala 280:76] + node _T_1094 = cat(_T_952[17], _T_952[16]) @[el2_lib.scala 280:76] + node _T_1095 = cat(_T_1094, _T_952[15]) @[el2_lib.scala 280:76] + node _T_1096 = cat(_T_1095, _T_1093) @[el2_lib.scala 280:76] + node _T_1097 = cat(_T_1096, _T_1092) @[el2_lib.scala 280:76] + node _T_1098 = cat(_T_1097, _T_1089) @[el2_lib.scala 280:76] + node _T_1099 = xorr(_T_1098) @[el2_lib.scala 280:83] + node _T_1100 = cat(_T_951[1], _T_951[0]) @[el2_lib.scala 280:94] + node _T_1101 = cat(_T_951[3], _T_951[2]) @[el2_lib.scala 280:94] + node _T_1102 = cat(_T_1101, _T_1100) @[el2_lib.scala 280:94] + node _T_1103 = cat(_T_951[5], _T_951[4]) @[el2_lib.scala 280:94] + node _T_1104 = cat(_T_951[8], _T_951[7]) @[el2_lib.scala 280:94] + node _T_1105 = cat(_T_1104, _T_951[6]) @[el2_lib.scala 280:94] + node _T_1106 = cat(_T_1105, _T_1103) @[el2_lib.scala 280:94] + node _T_1107 = cat(_T_1106, _T_1102) @[el2_lib.scala 280:94] + node _T_1108 = cat(_T_951[10], _T_951[9]) @[el2_lib.scala 280:94] + node _T_1109 = cat(_T_951[12], _T_951[11]) @[el2_lib.scala 280:94] + node _T_1110 = cat(_T_1109, _T_1108) @[el2_lib.scala 280:94] + node _T_1111 = cat(_T_951[14], _T_951[13]) @[el2_lib.scala 280:94] + node _T_1112 = cat(_T_951[17], _T_951[16]) @[el2_lib.scala 280:94] + node _T_1113 = cat(_T_1112, _T_951[15]) @[el2_lib.scala 280:94] + node _T_1114 = cat(_T_1113, _T_1111) @[el2_lib.scala 280:94] + node _T_1115 = cat(_T_1114, _T_1110) @[el2_lib.scala 280:94] + node _T_1116 = cat(_T_1115, _T_1107) @[el2_lib.scala 280:94] + node _T_1117 = xorr(_T_1116) @[el2_lib.scala 280:101] + node _T_1118 = cat(_T_950[1], _T_950[0]) @[el2_lib.scala 280:112] + node _T_1119 = cat(_T_950[3], _T_950[2]) @[el2_lib.scala 280:112] + node _T_1120 = cat(_T_1119, _T_1118) @[el2_lib.scala 280:112] + node _T_1121 = cat(_T_950[5], _T_950[4]) @[el2_lib.scala 280:112] + node _T_1122 = cat(_T_950[8], _T_950[7]) @[el2_lib.scala 280:112] + node _T_1123 = cat(_T_1122, _T_950[6]) @[el2_lib.scala 280:112] + node _T_1124 = cat(_T_1123, _T_1121) @[el2_lib.scala 280:112] + node _T_1125 = cat(_T_1124, _T_1120) @[el2_lib.scala 280:112] + node _T_1126 = cat(_T_950[10], _T_950[9]) @[el2_lib.scala 280:112] + node _T_1127 = cat(_T_950[12], _T_950[11]) @[el2_lib.scala 280:112] + node _T_1128 = cat(_T_1127, _T_1126) @[el2_lib.scala 280:112] + node _T_1129 = cat(_T_950[14], _T_950[13]) @[el2_lib.scala 280:112] + node _T_1130 = cat(_T_950[17], _T_950[16]) @[el2_lib.scala 280:112] + node _T_1131 = cat(_T_1130, _T_950[15]) @[el2_lib.scala 280:112] + node _T_1132 = cat(_T_1131, _T_1129) @[el2_lib.scala 280:112] + node _T_1133 = cat(_T_1132, _T_1128) @[el2_lib.scala 280:112] + node _T_1134 = cat(_T_1133, _T_1125) @[el2_lib.scala 280:112] + node _T_1135 = xorr(_T_1134) @[el2_lib.scala 280:119] + node _T_1136 = cat(_T_1099, _T_1117) @[Cat.scala 29:58] + node _T_1137 = cat(_T_1136, _T_1135) @[Cat.scala 29:58] + node _T_1138 = cat(_T_1051, _T_1066) @[Cat.scala 29:58] + node _T_1139 = cat(_T_1138, _T_1081) @[Cat.scala 29:58] + node _T_1140 = cat(_T_1139, _T_1137) @[Cat.scala 29:58] + node _T_1141 = xorr(dccm_wdata_hi_any) @[el2_lib.scala 281:27] + node _T_1142 = xorr(_T_1140) @[el2_lib.scala 281:37] + node _T_1143 = xor(_T_1141, _T_1142) @[el2_lib.scala 281:32] + node dccm_wdata_ecc_hi_any = cat(_T_1143, _T_1140) @[Cat.scala 29:58] + when UInt<1>("h00") : @[el2_lsu_ecc.scala 103:32] + node _T_1144 = bits(io.lsu_addr_r, 2, 2) @[el2_lsu_ecc.scala 104:35] + node _T_1145 = bits(io.end_addr_r, 2, 2) @[el2_lsu_ecc.scala 104:56] + node _T_1146 = neq(_T_1144, _T_1145) @[el2_lsu_ecc.scala 104:39] + ldst_dual_r <= _T_1146 @[el2_lsu_ecc.scala 104:19] + node _T_1147 = or(io.lsu_pkt_r.load, io.lsu_pkt_r.store) @[el2_lsu_ecc.scala 105:60] + node _T_1148 = and(io.lsu_pkt_r.valid, _T_1147) @[el2_lsu_ecc.scala 105:39] + node _T_1149 = and(_T_1148, io.addr_in_dccm_r) @[el2_lsu_ecc.scala 105:82] + node _T_1150 = and(_T_1149, io.lsu_dccm_rden_r) @[el2_lsu_ecc.scala 105:102] + is_ldst_r <= _T_1150 @[el2_lsu_ecc.scala 105:17] + node _T_1151 = eq(io.dec_tlu_core_ecc_disable, UInt<1>("h00")) @[el2_lsu_ecc.scala 106:35] + node _T_1152 = and(is_ldst_r, _T_1151) @[el2_lsu_ecc.scala 106:33] + is_ldst_lo_r <= _T_1152 @[el2_lsu_ecc.scala 106:20] + node _T_1153 = or(ldst_dual_r, io.lsu_pkt_r.dma) @[el2_lsu_ecc.scala 107:48] + node _T_1154 = and(is_ldst_r, _T_1153) @[el2_lsu_ecc.scala 107:33] + node _T_1155 = eq(io.dec_tlu_core_ecc_disable, UInt<1>("h00")) @[el2_lsu_ecc.scala 107:70] + node _T_1156 = and(_T_1154, _T_1155) @[el2_lsu_ecc.scala 107:68] + is_ldst_hi_r <= _T_1156 @[el2_lsu_ecc.scala 107:20] + is_ldst_hi_any <= is_ldst_hi_r @[el2_lsu_ecc.scala 108:23] + dccm_rdata_hi_any <= io.dccm_rdata_hi_r @[el2_lsu_ecc.scala 109:26] + dccm_data_ecc_hi_any <= io.dccm_data_ecc_hi_r @[el2_lsu_ecc.scala 110:28] + is_ldst_lo_any <= is_ldst_lo_r @[el2_lsu_ecc.scala 111:22] + dccm_rdata_lo_any <= io.dccm_rdata_lo_r @[el2_lsu_ecc.scala 112:27] + dccm_data_ecc_lo_any <= io.dccm_data_ecc_lo_r @[el2_lsu_ecc.scala 113:28] + io.sec_data_hi_r <= sec_data_hi_any @[el2_lsu_ecc.scala 114:24] + io.single_ecc_error_hi_r <= single_ecc_error_hi_any @[el2_lsu_ecc.scala 115:33] + double_ecc_error_hi_r <= double_ecc_error_hi_any @[el2_lsu_ecc.scala 116:30] + io.sec_data_lo_r <= sec_data_lo_any @[el2_lsu_ecc.scala 117:27] + io.single_ecc_error_lo_r <= single_ecc_error_lo_any @[el2_lsu_ecc.scala 118:33] + double_ecc_error_lo_r <= double_ecc_error_lo_any @[el2_lsu_ecc.scala 119:30] + node _T_1157 = or(io.single_ecc_error_hi_r, io.single_ecc_error_lo_r) @[el2_lsu_ecc.scala 120:61] + io.lsu_single_ecc_error_r <= _T_1157 @[el2_lsu_ecc.scala 120:33] + node _T_1158 = or(double_ecc_error_hi_r, double_ecc_error_lo_r) @[el2_lsu_ecc.scala 121:58] + io.lsu_double_ecc_error_r <= _T_1158 @[el2_lsu_ecc.scala 121:33] + skip @[el2_lsu_ecc.scala 103:32] + else : @[el2_lsu_ecc.scala 123:16] + node _T_1159 = bits(io.lsu_addr_m, 2, 2) @[el2_lsu_ecc.scala 124:35] + node _T_1160 = bits(io.end_addr_m, 2, 2) @[el2_lsu_ecc.scala 124:56] + node _T_1161 = neq(_T_1159, _T_1160) @[el2_lsu_ecc.scala 124:39] + ldst_dual_m <= _T_1161 @[el2_lsu_ecc.scala 124:19] + node _T_1162 = or(io.lsu_pkt_m.load, io.lsu_pkt_m.store) @[el2_lsu_ecc.scala 125:60] + node _T_1163 = and(io.lsu_pkt_m.valid, _T_1162) @[el2_lsu_ecc.scala 125:39] + node _T_1164 = and(_T_1163, io.addr_in_dccm_m) @[el2_lsu_ecc.scala 125:82] + node _T_1165 = and(_T_1164, io.lsu_dccm_rden_m) @[el2_lsu_ecc.scala 125:102] + is_ldst_m <= _T_1165 @[el2_lsu_ecc.scala 125:17] + node _T_1166 = eq(io.dec_tlu_core_ecc_disable, UInt<1>("h00")) @[el2_lsu_ecc.scala 126:35] + node _T_1167 = and(is_ldst_m, _T_1166) @[el2_lsu_ecc.scala 126:33] + is_ldst_lo_m <= _T_1167 @[el2_lsu_ecc.scala 126:20] + node _T_1168 = or(ldst_dual_m, io.lsu_pkt_m.dma) @[el2_lsu_ecc.scala 127:48] + node _T_1169 = and(is_ldst_m, _T_1168) @[el2_lsu_ecc.scala 127:33] + node _T_1170 = eq(io.dec_tlu_core_ecc_disable, UInt<1>("h00")) @[el2_lsu_ecc.scala 127:70] + node _T_1171 = and(_T_1169, _T_1170) @[el2_lsu_ecc.scala 127:68] + is_ldst_hi_m <= _T_1171 @[el2_lsu_ecc.scala 127:20] + is_ldst_hi_any <= is_ldst_hi_m @[el2_lsu_ecc.scala 128:23] + dccm_rdata_hi_any <= io.dccm_rdata_hi_m @[el2_lsu_ecc.scala 129:26] + dccm_data_ecc_hi_any <= io.dccm_data_ecc_hi_m @[el2_lsu_ecc.scala 130:28] + is_ldst_lo_any <= is_ldst_lo_m @[el2_lsu_ecc.scala 131:22] + dccm_rdata_lo_any <= io.dccm_rdata_lo_m @[el2_lsu_ecc.scala 132:27] + dccm_data_ecc_lo_any <= io.dccm_data_ecc_lo_m @[el2_lsu_ecc.scala 133:28] + io.sec_data_hi_m <= sec_data_hi_any @[el2_lsu_ecc.scala 134:27] + double_ecc_error_hi_m <= double_ecc_error_hi_any @[el2_lsu_ecc.scala 135:30] + io.sec_data_lo_m <= sec_data_lo_any @[el2_lsu_ecc.scala 136:27] + double_ecc_error_lo_m <= double_ecc_error_lo_any @[el2_lsu_ecc.scala 137:30] + node _T_1172 = or(single_ecc_error_hi_any, single_ecc_error_lo_any) @[el2_lsu_ecc.scala 138:60] + io.lsu_single_ecc_error_m <= _T_1172 @[el2_lsu_ecc.scala 138:33] + node _T_1173 = or(double_ecc_error_hi_m, double_ecc_error_lo_m) @[el2_lsu_ecc.scala 139:58] + io.lsu_double_ecc_error_m <= _T_1173 @[el2_lsu_ecc.scala 139:33] + reg _T_1174 : UInt<1>, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_ecc.scala 141:72] + _T_1174 <= io.lsu_single_ecc_error_m @[el2_lsu_ecc.scala 141:72] + io.lsu_single_ecc_error_r <= _T_1174 @[el2_lsu_ecc.scala 141:62] + reg _T_1175 : UInt<1>, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_ecc.scala 142:72] + _T_1175 <= io.lsu_double_ecc_error_m @[el2_lsu_ecc.scala 142:72] + io.lsu_double_ecc_error_r <= _T_1175 @[el2_lsu_ecc.scala 142:62] + reg _T_1176 : UInt, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_ecc.scala 143:72] + _T_1176 <= single_ecc_error_lo_any @[el2_lsu_ecc.scala 143:72] + io.single_ecc_error_lo_r <= _T_1176 @[el2_lsu_ecc.scala 143:62] + reg _T_1177 : UInt, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_ecc.scala 144:72] + _T_1177 <= single_ecc_error_hi_any @[el2_lsu_ecc.scala 144:72] + io.single_ecc_error_hi_r <= _T_1177 @[el2_lsu_ecc.scala 144:62] + reg _T_1178 : UInt, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_ecc.scala 145:72] + _T_1178 <= io.sec_data_hi_m @[el2_lsu_ecc.scala 145:72] + io.sec_data_hi_r <= _T_1178 @[el2_lsu_ecc.scala 145:62] + reg _T_1179 : UInt, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_ecc.scala 146:72] + _T_1179 <= io.sec_data_lo_m @[el2_lsu_ecc.scala 146:72] + io.sec_data_lo_r <= _T_1179 @[el2_lsu_ecc.scala 146:62] + skip @[el2_lsu_ecc.scala 123:16] + node _T_1180 = bits(io.ld_single_ecc_error_r_ff, 0, 0) @[el2_lsu_ecc.scala 149:58] + node _T_1181 = bits(io.dma_dccm_wen, 0, 0) @[el2_lsu_ecc.scala 149:106] + node _T_1182 = mux(_T_1181, io.dma_dccm_wdata_lo, io.stbuf_data_any) @[el2_lsu_ecc.scala 149:89] + node _T_1183 = mux(_T_1180, io.sec_data_lo_r_ff, _T_1182) @[el2_lsu_ecc.scala 149:29] + dccm_wdata_lo_any <= _T_1183 @[el2_lsu_ecc.scala 149:23] + node _T_1184 = bits(io.ld_single_ecc_error_r_ff, 0, 0) @[el2_lsu_ecc.scala 150:58] + node _T_1185 = bits(io.dma_dccm_wen, 0, 0) @[el2_lsu_ecc.scala 150:106] + node _T_1186 = mux(_T_1185, io.dma_dccm_wdata_hi, io.stbuf_data_any) @[el2_lsu_ecc.scala 150:89] + node _T_1187 = mux(_T_1184, io.sec_data_hi_r_ff, _T_1186) @[el2_lsu_ecc.scala 150:29] + dccm_wdata_hi_any <= _T_1187 @[el2_lsu_ecc.scala 150:23] + io.sec_data_ecc_hi_r_ff <= dccm_wdata_ecc_hi_any @[el2_lsu_ecc.scala 151:30] + io.sec_data_ecc_lo_r_ff <= dccm_wdata_ecc_lo_any @[el2_lsu_ecc.scala 152:30] + io.stbuf_ecc_any <= dccm_wdata_ecc_lo_any @[el2_lsu_ecc.scala 153:30] + io.dma_dccm_wdata_ecc_hi <= dccm_wdata_ecc_hi_any @[el2_lsu_ecc.scala 154:30] + io.dma_dccm_wdata_ecc_lo <= dccm_wdata_ecc_lo_any @[el2_lsu_ecc.scala 155:30] + reg _T_1188 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when io.ld_single_ecc_error_r : @[Reg.scala 28:19] + _T_1188 <= io.sec_data_hi_r @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + io.sec_data_hi_r_ff <= _T_1188 @[el2_lsu_ecc.scala 157:23] + reg _T_1189 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when io.ld_single_ecc_error_r : @[Reg.scala 28:19] + _T_1189 <= io.sec_data_lo_r @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + io.sec_data_lo_r_ff <= _T_1189 @[el2_lsu_ecc.scala 158:23] + diff --git a/el2_lsu_ecc.v b/el2_lsu_ecc.v new file mode 100644 index 00000000..4f6ce164 --- /dev/null +++ b/el2_lsu_ecc.v @@ -0,0 +1,466 @@ +module el2_lsu_ecc( + input clock, + input reset, + input io_lsu_c2_r_clk, + input io_lsu_pkt_m_fast_int, + input io_lsu_pkt_m_by, + input io_lsu_pkt_m_half, + input io_lsu_pkt_m_word, + input io_lsu_pkt_m_dword, + input io_lsu_pkt_m_load, + input io_lsu_pkt_m_store, + input io_lsu_pkt_m_unsign, + input io_lsu_pkt_m_dma, + input io_lsu_pkt_m_store_data_bypass_d, + input io_lsu_pkt_m_load_ldst_bypass_d, + input io_lsu_pkt_m_store_data_bypass_m, + input io_lsu_pkt_m_valid, + input io_lsu_pkt_r_fast_int, + input io_lsu_pkt_r_by, + input io_lsu_pkt_r_half, + input io_lsu_pkt_r_word, + input io_lsu_pkt_r_dword, + input io_lsu_pkt_r_load, + input io_lsu_pkt_r_store, + input io_lsu_pkt_r_unsign, + input io_lsu_pkt_r_dma, + input io_lsu_pkt_r_store_data_bypass_d, + input io_lsu_pkt_r_load_ldst_bypass_d, + input io_lsu_pkt_r_store_data_bypass_m, + input io_lsu_pkt_r_valid, + input [31:0] io_stbuf_data_any, + input io_dec_tlu_core_ecc_disable, + input io_lsu_dccm_rden_r, + input io_addr_in_dccm_r, + input [15:0] io_lsu_addr_r, + input [15:0] io_end_addr_r, + input [15:0] io_lsu_addr_m, + input [15:0] io_end_addr_m, + input [31:0] io_dccm_rdata_hi_r, + input [31:0] io_dccm_rdata_lo_r, + input [31:0] io_dccm_rdata_hi_m, + input [31:0] io_dccm_rdata_lo_m, + input [6:0] io_dccm_data_ecc_hi_r, + input [6:0] io_dccm_data_ecc_lo_r, + input [6:0] io_dccm_data_ecc_hi_m, + input [6:0] io_dccm_data_ecc_lo_m, + input io_ld_single_ecc_error_r, + input io_ld_single_ecc_error_r_ff, + input io_lsu_dccm_rden_m, + input io_addr_in_dccm_m, + input io_dma_dccm_wen, + input [31:0] io_dma_dccm_wdata_lo, + input [31:0] io_dma_dccm_wdata_hi, + input io_scan_mode, + output [31:0] io_sec_data_hi_r, + output [31:0] io_sec_data_lo_r, + output [31:0] io_sec_data_hi_m, + output [31:0] io_sec_data_lo_m, + output [31:0] io_sec_data_hi_r_ff, + output [31:0] io_sec_data_lo_r_ff, + output [6:0] io_dma_dccm_wdata_ecc_hi, + output [6:0] io_dma_dccm_wdata_ecc_lo, + output [6:0] io_stbuf_ecc_any, + output [6:0] io_sec_data_ecc_hi_r_ff, + output [6:0] io_sec_data_ecc_lo_r_ff, + output io_single_ecc_error_hi_r, + output io_single_ecc_error_lo_r, + output io_lsu_single_ecc_error_r, + output io_lsu_double_ecc_error_r, + output io_lsu_single_ecc_error_m, + output io_lsu_double_ecc_error_m +); +`ifdef RANDOMIZE_REG_INIT + reg [31:0] _RAND_0; + reg [31:0] _RAND_1; + reg [31:0] _RAND_2; + reg [31:0] _RAND_3; + reg [31:0] _RAND_4; + reg [31:0] _RAND_5; + reg [31:0] _RAND_6; + reg [31:0] _RAND_7; +`endif // RANDOMIZE_REG_INIT + wire _T_96 = ^io_dccm_rdata_hi_m; // @[el2_lib.scala 329:30] + wire _T_97 = ^io_dccm_data_ecc_hi_m; // @[el2_lib.scala 329:44] + wire _T_98 = _T_96 ^ _T_97; // @[el2_lib.scala 329:35] + wire [5:0] _T_106 = {io_dccm_rdata_hi_m[31],io_dccm_rdata_hi_m[30],io_dccm_rdata_hi_m[29],io_dccm_rdata_hi_m[28],io_dccm_rdata_hi_m[27],io_dccm_rdata_hi_m[26]}; // @[el2_lib.scala 329:78] + wire _T_107 = ^_T_106; // @[el2_lib.scala 329:85] + wire _T_108 = io_dccm_data_ecc_hi_m[5] ^ _T_107; // @[el2_lib.scala 329:72] + wire [6:0] _T_115 = {io_dccm_rdata_hi_m[17],io_dccm_rdata_hi_m[16],io_dccm_rdata_hi_m[15],io_dccm_rdata_hi_m[14],io_dccm_rdata_hi_m[13],io_dccm_rdata_hi_m[12],io_dccm_rdata_hi_m[11]}; // @[el2_lib.scala 329:108] + wire [14:0] _T_123 = {io_dccm_rdata_hi_m[25],io_dccm_rdata_hi_m[24],io_dccm_rdata_hi_m[23],io_dccm_rdata_hi_m[22],io_dccm_rdata_hi_m[21],io_dccm_rdata_hi_m[20],io_dccm_rdata_hi_m[19],io_dccm_rdata_hi_m[18],_T_115}; // @[el2_lib.scala 329:108] + wire _T_124 = ^_T_123; // @[el2_lib.scala 329:115] + wire _T_125 = io_dccm_data_ecc_hi_m[4] ^ _T_124; // @[el2_lib.scala 329:102] + wire [6:0] _T_132 = {io_dccm_rdata_hi_m[10],io_dccm_rdata_hi_m[9],io_dccm_rdata_hi_m[8],io_dccm_rdata_hi_m[7],io_dccm_rdata_hi_m[6],io_dccm_rdata_hi_m[5],io_dccm_rdata_hi_m[4]}; // @[el2_lib.scala 329:138] + wire [14:0] _T_140 = {io_dccm_rdata_hi_m[25],io_dccm_rdata_hi_m[24],io_dccm_rdata_hi_m[23],io_dccm_rdata_hi_m[22],io_dccm_rdata_hi_m[21],io_dccm_rdata_hi_m[20],io_dccm_rdata_hi_m[19],io_dccm_rdata_hi_m[18],_T_132}; // @[el2_lib.scala 329:138] + wire _T_141 = ^_T_140; // @[el2_lib.scala 329:145] + wire _T_142 = io_dccm_data_ecc_hi_m[3] ^ _T_141; // @[el2_lib.scala 329:132] + wire [8:0] _T_151 = {io_dccm_rdata_hi_m[15],io_dccm_rdata_hi_m[14],io_dccm_rdata_hi_m[10],io_dccm_rdata_hi_m[9],io_dccm_rdata_hi_m[8],io_dccm_rdata_hi_m[7],io_dccm_rdata_hi_m[3],io_dccm_rdata_hi_m[2],io_dccm_rdata_hi_m[1]}; // @[el2_lib.scala 329:168] + wire [17:0] _T_160 = {io_dccm_rdata_hi_m[31],io_dccm_rdata_hi_m[30],io_dccm_rdata_hi_m[29],io_dccm_rdata_hi_m[25],io_dccm_rdata_hi_m[24],io_dccm_rdata_hi_m[23],io_dccm_rdata_hi_m[22],io_dccm_rdata_hi_m[17],io_dccm_rdata_hi_m[16],_T_151}; // @[el2_lib.scala 329:168] + wire _T_161 = ^_T_160; // @[el2_lib.scala 329:175] + wire _T_162 = io_dccm_data_ecc_hi_m[2] ^ _T_161; // @[el2_lib.scala 329:162] + wire [8:0] _T_171 = {io_dccm_rdata_hi_m[13],io_dccm_rdata_hi_m[12],io_dccm_rdata_hi_m[10],io_dccm_rdata_hi_m[9],io_dccm_rdata_hi_m[6],io_dccm_rdata_hi_m[5],io_dccm_rdata_hi_m[3],io_dccm_rdata_hi_m[2],io_dccm_rdata_hi_m[0]}; // @[el2_lib.scala 329:198] + wire [17:0] _T_180 = {io_dccm_rdata_hi_m[31],io_dccm_rdata_hi_m[28],io_dccm_rdata_hi_m[27],io_dccm_rdata_hi_m[25],io_dccm_rdata_hi_m[24],io_dccm_rdata_hi_m[21],io_dccm_rdata_hi_m[20],io_dccm_rdata_hi_m[17],io_dccm_rdata_hi_m[16],_T_171}; // @[el2_lib.scala 329:198] + wire _T_181 = ^_T_180; // @[el2_lib.scala 329:205] + wire _T_182 = io_dccm_data_ecc_hi_m[1] ^ _T_181; // @[el2_lib.scala 329:192] + wire [8:0] _T_191 = {io_dccm_rdata_hi_m[13],io_dccm_rdata_hi_m[11],io_dccm_rdata_hi_m[10],io_dccm_rdata_hi_m[8],io_dccm_rdata_hi_m[6],io_dccm_rdata_hi_m[4],io_dccm_rdata_hi_m[3],io_dccm_rdata_hi_m[1],io_dccm_rdata_hi_m[0]}; // @[el2_lib.scala 329:228] + wire [17:0] _T_200 = {io_dccm_rdata_hi_m[30],io_dccm_rdata_hi_m[28],io_dccm_rdata_hi_m[26],io_dccm_rdata_hi_m[25],io_dccm_rdata_hi_m[23],io_dccm_rdata_hi_m[21],io_dccm_rdata_hi_m[19],io_dccm_rdata_hi_m[17],io_dccm_rdata_hi_m[15],_T_191}; // @[el2_lib.scala 329:228] + wire _T_201 = ^_T_200; // @[el2_lib.scala 329:235] + wire _T_202 = io_dccm_data_ecc_hi_m[0] ^ _T_201; // @[el2_lib.scala 329:222] + wire [6:0] _T_208 = {_T_98,_T_108,_T_125,_T_142,_T_162,_T_182,_T_202}; // @[Cat.scala 29:58] + wire _T_209 = _T_208 != 7'h0; // @[el2_lib.scala 330:44] + wire _T_1155 = ~io_dec_tlu_core_ecc_disable; // @[el2_lsu_ecc.scala 107:70] + wire _T_1162 = io_lsu_pkt_m_load | io_lsu_pkt_m_store; // @[el2_lsu_ecc.scala 125:60] + wire _T_1163 = io_lsu_pkt_m_valid & _T_1162; // @[el2_lsu_ecc.scala 125:39] + wire _T_1164 = _T_1163 & io_addr_in_dccm_m; // @[el2_lsu_ecc.scala 125:82] + wire is_ldst_m = _T_1164 & io_lsu_dccm_rden_m; // @[el2_lsu_ecc.scala 125:102] + wire ldst_dual_m = io_lsu_addr_m[2] != io_end_addr_m[2]; // @[el2_lsu_ecc.scala 124:39] + wire _T_1168 = ldst_dual_m | io_lsu_pkt_m_dma; // @[el2_lsu_ecc.scala 127:48] + wire _T_1169 = is_ldst_m & _T_1168; // @[el2_lsu_ecc.scala 127:33] + wire is_ldst_hi_m = _T_1169 & _T_1155; // @[el2_lsu_ecc.scala 127:68] + wire _T_210 = is_ldst_hi_m & _T_209; // @[el2_lib.scala 330:31] + wire single_ecc_error_hi_any = _T_210 & _T_208[6]; // @[el2_lib.scala 330:53] + wire _T_215 = ~_T_208[6]; // @[el2_lib.scala 331:55] + wire double_ecc_error_hi_any = _T_210 & _T_215; // @[el2_lib.scala 331:53] + wire _T_218 = _T_208[5:0] == 6'h1; // @[el2_lib.scala 335:44] + wire _T_220 = _T_208[5:0] == 6'h2; // @[el2_lib.scala 335:44] + wire _T_222 = _T_208[5:0] == 6'h3; // @[el2_lib.scala 335:44] + wire _T_224 = _T_208[5:0] == 6'h4; // @[el2_lib.scala 335:44] + wire _T_226 = _T_208[5:0] == 6'h5; // @[el2_lib.scala 335:44] + wire _T_228 = _T_208[5:0] == 6'h6; // @[el2_lib.scala 335:44] + wire _T_230 = _T_208[5:0] == 6'h7; // @[el2_lib.scala 335:44] + wire _T_232 = _T_208[5:0] == 6'h8; // @[el2_lib.scala 335:44] + wire _T_234 = _T_208[5:0] == 6'h9; // @[el2_lib.scala 335:44] + wire _T_236 = _T_208[5:0] == 6'ha; // @[el2_lib.scala 335:44] + wire _T_238 = _T_208[5:0] == 6'hb; // @[el2_lib.scala 335:44] + wire _T_240 = _T_208[5:0] == 6'hc; // @[el2_lib.scala 335:44] + wire _T_242 = _T_208[5:0] == 6'hd; // @[el2_lib.scala 335:44] + wire _T_244 = _T_208[5:0] == 6'he; // @[el2_lib.scala 335:44] + wire _T_246 = _T_208[5:0] == 6'hf; // @[el2_lib.scala 335:44] + wire _T_248 = _T_208[5:0] == 6'h10; // @[el2_lib.scala 335:44] + wire _T_250 = _T_208[5:0] == 6'h11; // @[el2_lib.scala 335:44] + wire _T_252 = _T_208[5:0] == 6'h12; // @[el2_lib.scala 335:44] + wire _T_254 = _T_208[5:0] == 6'h13; // @[el2_lib.scala 335:44] + wire _T_256 = _T_208[5:0] == 6'h14; // @[el2_lib.scala 335:44] + wire _T_258 = _T_208[5:0] == 6'h15; // @[el2_lib.scala 335:44] + wire _T_260 = _T_208[5:0] == 6'h16; // @[el2_lib.scala 335:44] + wire _T_262 = _T_208[5:0] == 6'h17; // @[el2_lib.scala 335:44] + wire _T_264 = _T_208[5:0] == 6'h18; // @[el2_lib.scala 335:44] + wire _T_266 = _T_208[5:0] == 6'h19; // @[el2_lib.scala 335:44] + wire _T_268 = _T_208[5:0] == 6'h1a; // @[el2_lib.scala 335:44] + wire _T_270 = _T_208[5:0] == 6'h1b; // @[el2_lib.scala 335:44] + wire _T_272 = _T_208[5:0] == 6'h1c; // @[el2_lib.scala 335:44] + wire _T_274 = _T_208[5:0] == 6'h1d; // @[el2_lib.scala 335:44] + wire _T_276 = _T_208[5:0] == 6'h1e; // @[el2_lib.scala 335:44] + wire _T_278 = _T_208[5:0] == 6'h1f; // @[el2_lib.scala 335:44] + wire _T_280 = _T_208[5:0] == 6'h20; // @[el2_lib.scala 335:44] + wire _T_282 = _T_208[5:0] == 6'h21; // @[el2_lib.scala 335:44] + wire _T_284 = _T_208[5:0] == 6'h22; // @[el2_lib.scala 335:44] + wire _T_286 = _T_208[5:0] == 6'h23; // @[el2_lib.scala 335:44] + wire _T_288 = _T_208[5:0] == 6'h24; // @[el2_lib.scala 335:44] + wire _T_290 = _T_208[5:0] == 6'h25; // @[el2_lib.scala 335:44] + wire _T_292 = _T_208[5:0] == 6'h26; // @[el2_lib.scala 335:44] + wire _T_294 = _T_208[5:0] == 6'h27; // @[el2_lib.scala 335:44] + wire [7:0] _T_309 = {io_dccm_data_ecc_hi_m[3],io_dccm_rdata_hi_m[3:1],io_dccm_data_ecc_hi_m[2],io_dccm_rdata_hi_m[0],io_dccm_data_ecc_hi_m[1:0]}; // @[Cat.scala 29:58] + wire [38:0] _T_315 = {io_dccm_data_ecc_hi_m[6],io_dccm_rdata_hi_m[31:26],io_dccm_data_ecc_hi_m[5],io_dccm_rdata_hi_m[25:11],io_dccm_data_ecc_hi_m[4],io_dccm_rdata_hi_m[10:4],_T_309}; // @[Cat.scala 29:58] + wire [9:0] _T_333 = {_T_254,_T_252,_T_250,_T_248,_T_246,_T_244,_T_242,_T_240,_T_238,_T_236}; // @[el2_lib.scala 338:69] + wire [18:0] _T_334 = {_T_333,_T_234,_T_232,_T_230,_T_228,_T_226,_T_224,_T_222,_T_220,_T_218}; // @[el2_lib.scala 338:69] + wire [9:0] _T_343 = {_T_274,_T_272,_T_270,_T_268,_T_266,_T_264,_T_262,_T_260,_T_258,_T_256}; // @[el2_lib.scala 338:69] + wire [9:0] _T_352 = {_T_294,_T_292,_T_290,_T_288,_T_286,_T_284,_T_282,_T_280,_T_278,_T_276}; // @[el2_lib.scala 338:69] + wire [38:0] _T_354 = {_T_352,_T_343,_T_334}; // @[el2_lib.scala 338:69] + wire [38:0] _T_355 = _T_354 ^ _T_315; // @[el2_lib.scala 338:76] + wire [38:0] _T_356 = single_ecc_error_hi_any ? _T_355 : _T_315; // @[el2_lib.scala 338:31] + wire [3:0] _T_362 = {_T_356[6:4],_T_356[2]}; // @[Cat.scala 29:58] + wire [27:0] _T_364 = {_T_356[37:32],_T_356[30:16],_T_356[14:8]}; // @[Cat.scala 29:58] + wire _T_474 = ^io_dccm_rdata_lo_m; // @[el2_lib.scala 329:30] + wire _T_475 = ^io_dccm_data_ecc_lo_m; // @[el2_lib.scala 329:44] + wire _T_476 = _T_474 ^ _T_475; // @[el2_lib.scala 329:35] + wire [5:0] _T_484 = {io_dccm_rdata_lo_m[31],io_dccm_rdata_lo_m[30],io_dccm_rdata_lo_m[29],io_dccm_rdata_lo_m[28],io_dccm_rdata_lo_m[27],io_dccm_rdata_lo_m[26]}; // @[el2_lib.scala 329:78] + wire _T_485 = ^_T_484; // @[el2_lib.scala 329:85] + wire _T_486 = io_dccm_data_ecc_lo_m[5] ^ _T_485; // @[el2_lib.scala 329:72] + wire [6:0] _T_493 = {io_dccm_rdata_lo_m[17],io_dccm_rdata_lo_m[16],io_dccm_rdata_lo_m[15],io_dccm_rdata_lo_m[14],io_dccm_rdata_lo_m[13],io_dccm_rdata_lo_m[12],io_dccm_rdata_lo_m[11]}; // @[el2_lib.scala 329:108] + wire [14:0] _T_501 = {io_dccm_rdata_lo_m[25],io_dccm_rdata_lo_m[24],io_dccm_rdata_lo_m[23],io_dccm_rdata_lo_m[22],io_dccm_rdata_lo_m[21],io_dccm_rdata_lo_m[20],io_dccm_rdata_lo_m[19],io_dccm_rdata_lo_m[18],_T_493}; // @[el2_lib.scala 329:108] + wire _T_502 = ^_T_501; // @[el2_lib.scala 329:115] + wire _T_503 = io_dccm_data_ecc_lo_m[4] ^ _T_502; // @[el2_lib.scala 329:102] + wire [6:0] _T_510 = {io_dccm_rdata_lo_m[10],io_dccm_rdata_lo_m[9],io_dccm_rdata_lo_m[8],io_dccm_rdata_lo_m[7],io_dccm_rdata_lo_m[6],io_dccm_rdata_lo_m[5],io_dccm_rdata_lo_m[4]}; // @[el2_lib.scala 329:138] + wire [14:0] _T_518 = {io_dccm_rdata_lo_m[25],io_dccm_rdata_lo_m[24],io_dccm_rdata_lo_m[23],io_dccm_rdata_lo_m[22],io_dccm_rdata_lo_m[21],io_dccm_rdata_lo_m[20],io_dccm_rdata_lo_m[19],io_dccm_rdata_lo_m[18],_T_510}; // @[el2_lib.scala 329:138] + wire _T_519 = ^_T_518; // @[el2_lib.scala 329:145] + wire _T_520 = io_dccm_data_ecc_lo_m[3] ^ _T_519; // @[el2_lib.scala 329:132] + wire [8:0] _T_529 = {io_dccm_rdata_lo_m[15],io_dccm_rdata_lo_m[14],io_dccm_rdata_lo_m[10],io_dccm_rdata_lo_m[9],io_dccm_rdata_lo_m[8],io_dccm_rdata_lo_m[7],io_dccm_rdata_lo_m[3],io_dccm_rdata_lo_m[2],io_dccm_rdata_lo_m[1]}; // @[el2_lib.scala 329:168] + wire [17:0] _T_538 = {io_dccm_rdata_lo_m[31],io_dccm_rdata_lo_m[30],io_dccm_rdata_lo_m[29],io_dccm_rdata_lo_m[25],io_dccm_rdata_lo_m[24],io_dccm_rdata_lo_m[23],io_dccm_rdata_lo_m[22],io_dccm_rdata_lo_m[17],io_dccm_rdata_lo_m[16],_T_529}; // @[el2_lib.scala 329:168] + wire _T_539 = ^_T_538; // @[el2_lib.scala 329:175] + wire _T_540 = io_dccm_data_ecc_lo_m[2] ^ _T_539; // @[el2_lib.scala 329:162] + wire [8:0] _T_549 = {io_dccm_rdata_lo_m[13],io_dccm_rdata_lo_m[12],io_dccm_rdata_lo_m[10],io_dccm_rdata_lo_m[9],io_dccm_rdata_lo_m[6],io_dccm_rdata_lo_m[5],io_dccm_rdata_lo_m[3],io_dccm_rdata_lo_m[2],io_dccm_rdata_lo_m[0]}; // @[el2_lib.scala 329:198] + wire [17:0] _T_558 = {io_dccm_rdata_lo_m[31],io_dccm_rdata_lo_m[28],io_dccm_rdata_lo_m[27],io_dccm_rdata_lo_m[25],io_dccm_rdata_lo_m[24],io_dccm_rdata_lo_m[21],io_dccm_rdata_lo_m[20],io_dccm_rdata_lo_m[17],io_dccm_rdata_lo_m[16],_T_549}; // @[el2_lib.scala 329:198] + wire _T_559 = ^_T_558; // @[el2_lib.scala 329:205] + wire _T_560 = io_dccm_data_ecc_lo_m[1] ^ _T_559; // @[el2_lib.scala 329:192] + wire [8:0] _T_569 = {io_dccm_rdata_lo_m[13],io_dccm_rdata_lo_m[11],io_dccm_rdata_lo_m[10],io_dccm_rdata_lo_m[8],io_dccm_rdata_lo_m[6],io_dccm_rdata_lo_m[4],io_dccm_rdata_lo_m[3],io_dccm_rdata_lo_m[1],io_dccm_rdata_lo_m[0]}; // @[el2_lib.scala 329:228] + wire [17:0] _T_578 = {io_dccm_rdata_lo_m[30],io_dccm_rdata_lo_m[28],io_dccm_rdata_lo_m[26],io_dccm_rdata_lo_m[25],io_dccm_rdata_lo_m[23],io_dccm_rdata_lo_m[21],io_dccm_rdata_lo_m[19],io_dccm_rdata_lo_m[17],io_dccm_rdata_lo_m[15],_T_569}; // @[el2_lib.scala 329:228] + wire _T_579 = ^_T_578; // @[el2_lib.scala 329:235] + wire _T_580 = io_dccm_data_ecc_lo_m[0] ^ _T_579; // @[el2_lib.scala 329:222] + wire [6:0] _T_586 = {_T_476,_T_486,_T_503,_T_520,_T_540,_T_560,_T_580}; // @[Cat.scala 29:58] + wire _T_587 = _T_586 != 7'h0; // @[el2_lib.scala 330:44] + wire is_ldst_lo_m = is_ldst_m & _T_1155; // @[el2_lsu_ecc.scala 126:33] + wire _T_588 = is_ldst_lo_m & _T_587; // @[el2_lib.scala 330:31] + wire single_ecc_error_lo_any = _T_588 & _T_586[6]; // @[el2_lib.scala 330:53] + wire _T_593 = ~_T_586[6]; // @[el2_lib.scala 331:55] + wire double_ecc_error_lo_any = _T_588 & _T_593; // @[el2_lib.scala 331:53] + wire _T_596 = _T_586[5:0] == 6'h1; // @[el2_lib.scala 335:44] + wire _T_598 = _T_586[5:0] == 6'h2; // @[el2_lib.scala 335:44] + wire _T_600 = _T_586[5:0] == 6'h3; // @[el2_lib.scala 335:44] + wire _T_602 = _T_586[5:0] == 6'h4; // @[el2_lib.scala 335:44] + wire _T_604 = _T_586[5:0] == 6'h5; // @[el2_lib.scala 335:44] + wire _T_606 = _T_586[5:0] == 6'h6; // @[el2_lib.scala 335:44] + wire _T_608 = _T_586[5:0] == 6'h7; // @[el2_lib.scala 335:44] + wire _T_610 = _T_586[5:0] == 6'h8; // @[el2_lib.scala 335:44] + wire _T_612 = _T_586[5:0] == 6'h9; // @[el2_lib.scala 335:44] + wire _T_614 = _T_586[5:0] == 6'ha; // @[el2_lib.scala 335:44] + wire _T_616 = _T_586[5:0] == 6'hb; // @[el2_lib.scala 335:44] + wire _T_618 = _T_586[5:0] == 6'hc; // @[el2_lib.scala 335:44] + wire _T_620 = _T_586[5:0] == 6'hd; // @[el2_lib.scala 335:44] + wire _T_622 = _T_586[5:0] == 6'he; // @[el2_lib.scala 335:44] + wire _T_624 = _T_586[5:0] == 6'hf; // @[el2_lib.scala 335:44] + wire _T_626 = _T_586[5:0] == 6'h10; // @[el2_lib.scala 335:44] + wire _T_628 = _T_586[5:0] == 6'h11; // @[el2_lib.scala 335:44] + wire _T_630 = _T_586[5:0] == 6'h12; // @[el2_lib.scala 335:44] + wire _T_632 = _T_586[5:0] == 6'h13; // @[el2_lib.scala 335:44] + wire _T_634 = _T_586[5:0] == 6'h14; // @[el2_lib.scala 335:44] + wire _T_636 = _T_586[5:0] == 6'h15; // @[el2_lib.scala 335:44] + wire _T_638 = _T_586[5:0] == 6'h16; // @[el2_lib.scala 335:44] + wire _T_640 = _T_586[5:0] == 6'h17; // @[el2_lib.scala 335:44] + wire _T_642 = _T_586[5:0] == 6'h18; // @[el2_lib.scala 335:44] + wire _T_644 = _T_586[5:0] == 6'h19; // @[el2_lib.scala 335:44] + wire _T_646 = _T_586[5:0] == 6'h1a; // @[el2_lib.scala 335:44] + wire _T_648 = _T_586[5:0] == 6'h1b; // @[el2_lib.scala 335:44] + wire _T_650 = _T_586[5:0] == 6'h1c; // @[el2_lib.scala 335:44] + wire _T_652 = _T_586[5:0] == 6'h1d; // @[el2_lib.scala 335:44] + wire _T_654 = _T_586[5:0] == 6'h1e; // @[el2_lib.scala 335:44] + wire _T_656 = _T_586[5:0] == 6'h1f; // @[el2_lib.scala 335:44] + wire _T_658 = _T_586[5:0] == 6'h20; // @[el2_lib.scala 335:44] + wire _T_660 = _T_586[5:0] == 6'h21; // @[el2_lib.scala 335:44] + wire _T_662 = _T_586[5:0] == 6'h22; // @[el2_lib.scala 335:44] + wire _T_664 = _T_586[5:0] == 6'h23; // @[el2_lib.scala 335:44] + wire _T_666 = _T_586[5:0] == 6'h24; // @[el2_lib.scala 335:44] + wire _T_668 = _T_586[5:0] == 6'h25; // @[el2_lib.scala 335:44] + wire _T_670 = _T_586[5:0] == 6'h26; // @[el2_lib.scala 335:44] + wire _T_672 = _T_586[5:0] == 6'h27; // @[el2_lib.scala 335:44] + wire [7:0] _T_687 = {io_dccm_data_ecc_lo_m[3],io_dccm_rdata_lo_m[3:1],io_dccm_data_ecc_lo_m[2],io_dccm_rdata_lo_m[0],io_dccm_data_ecc_lo_m[1:0]}; // @[Cat.scala 29:58] + wire [38:0] _T_693 = {io_dccm_data_ecc_lo_m[6],io_dccm_rdata_lo_m[31:26],io_dccm_data_ecc_lo_m[5],io_dccm_rdata_lo_m[25:11],io_dccm_data_ecc_lo_m[4],io_dccm_rdata_lo_m[10:4],_T_687}; // @[Cat.scala 29:58] + wire [9:0] _T_711 = {_T_632,_T_630,_T_628,_T_626,_T_624,_T_622,_T_620,_T_618,_T_616,_T_614}; // @[el2_lib.scala 338:69] + wire [18:0] _T_712 = {_T_711,_T_612,_T_610,_T_608,_T_606,_T_604,_T_602,_T_600,_T_598,_T_596}; // @[el2_lib.scala 338:69] + wire [9:0] _T_721 = {_T_652,_T_650,_T_648,_T_646,_T_644,_T_642,_T_640,_T_638,_T_636,_T_634}; // @[el2_lib.scala 338:69] + wire [9:0] _T_730 = {_T_672,_T_670,_T_668,_T_666,_T_664,_T_662,_T_660,_T_658,_T_656,_T_654}; // @[el2_lib.scala 338:69] + wire [38:0] _T_732 = {_T_730,_T_721,_T_712}; // @[el2_lib.scala 338:69] + wire [38:0] _T_733 = _T_732 ^ _T_693; // @[el2_lib.scala 338:76] + wire [38:0] _T_734 = single_ecc_error_lo_any ? _T_733 : _T_693; // @[el2_lib.scala 338:31] + wire [3:0] _T_740 = {_T_734[6:4],_T_734[2]}; // @[Cat.scala 29:58] + wire [27:0] _T_742 = {_T_734[37:32],_T_734[30:16],_T_734[14:8]}; // @[Cat.scala 29:58] + wire [31:0] _T_1182 = io_dma_dccm_wen ? io_dma_dccm_wdata_lo : io_stbuf_data_any; // @[el2_lsu_ecc.scala 149:89] + wire [31:0] dccm_wdata_lo_any = io_ld_single_ecc_error_r_ff ? io_sec_data_lo_r_ff : _T_1182; // @[el2_lsu_ecc.scala 149:29] + wire [5:0] _T_856 = {dccm_wdata_lo_any[31],dccm_wdata_lo_any[30],dccm_wdata_lo_any[29],dccm_wdata_lo_any[28],dccm_wdata_lo_any[27],dccm_wdata_lo_any[26]}; // @[el2_lib.scala 280:22] + wire _T_857 = ^_T_856; // @[el2_lib.scala 280:29] + wire [6:0] _T_863 = {dccm_wdata_lo_any[17],dccm_wdata_lo_any[16],dccm_wdata_lo_any[15],dccm_wdata_lo_any[14],dccm_wdata_lo_any[13],dccm_wdata_lo_any[12],dccm_wdata_lo_any[11]}; // @[el2_lib.scala 280:40] + wire [14:0] _T_871 = {dccm_wdata_lo_any[25],dccm_wdata_lo_any[24],dccm_wdata_lo_any[23],dccm_wdata_lo_any[22],dccm_wdata_lo_any[21],dccm_wdata_lo_any[20],dccm_wdata_lo_any[19],dccm_wdata_lo_any[18],_T_863}; // @[el2_lib.scala 280:40] + wire _T_872 = ^_T_871; // @[el2_lib.scala 280:47] + wire [6:0] _T_878 = {dccm_wdata_lo_any[10],dccm_wdata_lo_any[9],dccm_wdata_lo_any[8],dccm_wdata_lo_any[7],dccm_wdata_lo_any[6],dccm_wdata_lo_any[5],dccm_wdata_lo_any[4]}; // @[el2_lib.scala 280:58] + wire [14:0] _T_886 = {dccm_wdata_lo_any[25],dccm_wdata_lo_any[24],dccm_wdata_lo_any[23],dccm_wdata_lo_any[22],dccm_wdata_lo_any[21],dccm_wdata_lo_any[20],dccm_wdata_lo_any[19],dccm_wdata_lo_any[18],_T_878}; // @[el2_lib.scala 280:58] + wire _T_887 = ^_T_886; // @[el2_lib.scala 280:65] + wire [8:0] _T_895 = {dccm_wdata_lo_any[15],dccm_wdata_lo_any[14],dccm_wdata_lo_any[10],dccm_wdata_lo_any[9],dccm_wdata_lo_any[8],dccm_wdata_lo_any[7],dccm_wdata_lo_any[3],dccm_wdata_lo_any[2],dccm_wdata_lo_any[1]}; // @[el2_lib.scala 280:76] + wire [17:0] _T_904 = {dccm_wdata_lo_any[31],dccm_wdata_lo_any[30],dccm_wdata_lo_any[29],dccm_wdata_lo_any[25],dccm_wdata_lo_any[24],dccm_wdata_lo_any[23],dccm_wdata_lo_any[22],dccm_wdata_lo_any[17],dccm_wdata_lo_any[16],_T_895}; // @[el2_lib.scala 280:76] + wire _T_905 = ^_T_904; // @[el2_lib.scala 280:83] + wire [8:0] _T_913 = {dccm_wdata_lo_any[13],dccm_wdata_lo_any[12],dccm_wdata_lo_any[10],dccm_wdata_lo_any[9],dccm_wdata_lo_any[6],dccm_wdata_lo_any[5],dccm_wdata_lo_any[3],dccm_wdata_lo_any[2],dccm_wdata_lo_any[0]}; // @[el2_lib.scala 280:94] + wire [17:0] _T_922 = {dccm_wdata_lo_any[31],dccm_wdata_lo_any[28],dccm_wdata_lo_any[27],dccm_wdata_lo_any[25],dccm_wdata_lo_any[24],dccm_wdata_lo_any[21],dccm_wdata_lo_any[20],dccm_wdata_lo_any[17],dccm_wdata_lo_any[16],_T_913}; // @[el2_lib.scala 280:94] + wire _T_923 = ^_T_922; // @[el2_lib.scala 280:101] + wire [8:0] _T_931 = {dccm_wdata_lo_any[13],dccm_wdata_lo_any[11],dccm_wdata_lo_any[10],dccm_wdata_lo_any[8],dccm_wdata_lo_any[6],dccm_wdata_lo_any[4],dccm_wdata_lo_any[3],dccm_wdata_lo_any[1],dccm_wdata_lo_any[0]}; // @[el2_lib.scala 280:112] + wire [17:0] _T_940 = {dccm_wdata_lo_any[30],dccm_wdata_lo_any[28],dccm_wdata_lo_any[26],dccm_wdata_lo_any[25],dccm_wdata_lo_any[23],dccm_wdata_lo_any[21],dccm_wdata_lo_any[19],dccm_wdata_lo_any[17],dccm_wdata_lo_any[15],_T_931}; // @[el2_lib.scala 280:112] + wire _T_941 = ^_T_940; // @[el2_lib.scala 280:119] + wire [5:0] _T_946 = {_T_857,_T_872,_T_887,_T_905,_T_923,_T_941}; // @[Cat.scala 29:58] + wire _T_947 = ^dccm_wdata_lo_any; // @[el2_lib.scala 281:27] + wire _T_948 = ^_T_946; // @[el2_lib.scala 281:37] + wire _T_949 = _T_947 ^ _T_948; // @[el2_lib.scala 281:32] + wire [31:0] _T_1186 = io_dma_dccm_wen ? io_dma_dccm_wdata_hi : io_stbuf_data_any; // @[el2_lsu_ecc.scala 150:89] + wire [31:0] dccm_wdata_hi_any = io_ld_single_ecc_error_r_ff ? io_sec_data_hi_r_ff : _T_1186; // @[el2_lsu_ecc.scala 150:29] + wire [5:0] _T_1050 = {dccm_wdata_hi_any[31],dccm_wdata_hi_any[30],dccm_wdata_hi_any[29],dccm_wdata_hi_any[28],dccm_wdata_hi_any[27],dccm_wdata_hi_any[26]}; // @[el2_lib.scala 280:22] + wire _T_1051 = ^_T_1050; // @[el2_lib.scala 280:29] + wire [6:0] _T_1057 = {dccm_wdata_hi_any[17],dccm_wdata_hi_any[16],dccm_wdata_hi_any[15],dccm_wdata_hi_any[14],dccm_wdata_hi_any[13],dccm_wdata_hi_any[12],dccm_wdata_hi_any[11]}; // @[el2_lib.scala 280:40] + wire [14:0] _T_1065 = {dccm_wdata_hi_any[25],dccm_wdata_hi_any[24],dccm_wdata_hi_any[23],dccm_wdata_hi_any[22],dccm_wdata_hi_any[21],dccm_wdata_hi_any[20],dccm_wdata_hi_any[19],dccm_wdata_hi_any[18],_T_1057}; // @[el2_lib.scala 280:40] + wire _T_1066 = ^_T_1065; // @[el2_lib.scala 280:47] + wire [6:0] _T_1072 = {dccm_wdata_hi_any[10],dccm_wdata_hi_any[9],dccm_wdata_hi_any[8],dccm_wdata_hi_any[7],dccm_wdata_hi_any[6],dccm_wdata_hi_any[5],dccm_wdata_hi_any[4]}; // @[el2_lib.scala 280:58] + wire [14:0] _T_1080 = {dccm_wdata_hi_any[25],dccm_wdata_hi_any[24],dccm_wdata_hi_any[23],dccm_wdata_hi_any[22],dccm_wdata_hi_any[21],dccm_wdata_hi_any[20],dccm_wdata_hi_any[19],dccm_wdata_hi_any[18],_T_1072}; // @[el2_lib.scala 280:58] + wire _T_1081 = ^_T_1080; // @[el2_lib.scala 280:65] + wire [8:0] _T_1089 = {dccm_wdata_hi_any[15],dccm_wdata_hi_any[14],dccm_wdata_hi_any[10],dccm_wdata_hi_any[9],dccm_wdata_hi_any[8],dccm_wdata_hi_any[7],dccm_wdata_hi_any[3],dccm_wdata_hi_any[2],dccm_wdata_hi_any[1]}; // @[el2_lib.scala 280:76] + wire [17:0] _T_1098 = {dccm_wdata_hi_any[31],dccm_wdata_hi_any[30],dccm_wdata_hi_any[29],dccm_wdata_hi_any[25],dccm_wdata_hi_any[24],dccm_wdata_hi_any[23],dccm_wdata_hi_any[22],dccm_wdata_hi_any[17],dccm_wdata_hi_any[16],_T_1089}; // @[el2_lib.scala 280:76] + wire _T_1099 = ^_T_1098; // @[el2_lib.scala 280:83] + wire [8:0] _T_1107 = {dccm_wdata_hi_any[13],dccm_wdata_hi_any[12],dccm_wdata_hi_any[10],dccm_wdata_hi_any[9],dccm_wdata_hi_any[6],dccm_wdata_hi_any[5],dccm_wdata_hi_any[3],dccm_wdata_hi_any[2],dccm_wdata_hi_any[0]}; // @[el2_lib.scala 280:94] + wire [17:0] _T_1116 = {dccm_wdata_hi_any[31],dccm_wdata_hi_any[28],dccm_wdata_hi_any[27],dccm_wdata_hi_any[25],dccm_wdata_hi_any[24],dccm_wdata_hi_any[21],dccm_wdata_hi_any[20],dccm_wdata_hi_any[17],dccm_wdata_hi_any[16],_T_1107}; // @[el2_lib.scala 280:94] + wire _T_1117 = ^_T_1116; // @[el2_lib.scala 280:101] + wire [8:0] _T_1125 = {dccm_wdata_hi_any[13],dccm_wdata_hi_any[11],dccm_wdata_hi_any[10],dccm_wdata_hi_any[8],dccm_wdata_hi_any[6],dccm_wdata_hi_any[4],dccm_wdata_hi_any[3],dccm_wdata_hi_any[1],dccm_wdata_hi_any[0]}; // @[el2_lib.scala 280:112] + wire [17:0] _T_1134 = {dccm_wdata_hi_any[30],dccm_wdata_hi_any[28],dccm_wdata_hi_any[26],dccm_wdata_hi_any[25],dccm_wdata_hi_any[23],dccm_wdata_hi_any[21],dccm_wdata_hi_any[19],dccm_wdata_hi_any[17],dccm_wdata_hi_any[15],_T_1125}; // @[el2_lib.scala 280:112] + wire _T_1135 = ^_T_1134; // @[el2_lib.scala 280:119] + wire [5:0] _T_1140 = {_T_1051,_T_1066,_T_1081,_T_1099,_T_1117,_T_1135}; // @[Cat.scala 29:58] + wire _T_1141 = ^dccm_wdata_hi_any; // @[el2_lib.scala 281:27] + wire _T_1142 = ^_T_1140; // @[el2_lib.scala 281:37] + wire _T_1143 = _T_1141 ^ _T_1142; // @[el2_lib.scala 281:32] + reg _T_1174; // @[el2_lsu_ecc.scala 141:72] + reg _T_1175; // @[el2_lsu_ecc.scala 142:72] + reg _T_1176; // @[el2_lsu_ecc.scala 143:72] + reg _T_1177; // @[el2_lsu_ecc.scala 144:72] + reg [31:0] _T_1178; // @[el2_lsu_ecc.scala 145:72] + reg [31:0] _T_1179; // @[el2_lsu_ecc.scala 146:72] + reg [31:0] _T_1188; // @[Reg.scala 27:20] + reg [31:0] _T_1189; // @[Reg.scala 27:20] + assign io_sec_data_hi_r = _T_1178; // @[el2_lsu_ecc.scala 114:24 el2_lsu_ecc.scala 145:62] + assign io_sec_data_lo_r = _T_1179; // @[el2_lsu_ecc.scala 117:27 el2_lsu_ecc.scala 146:62] + assign io_sec_data_hi_m = {_T_364,_T_362}; // @[el2_lsu_ecc.scala 90:32 el2_lsu_ecc.scala 134:27] + assign io_sec_data_lo_m = {_T_742,_T_740}; // @[el2_lsu_ecc.scala 91:32 el2_lsu_ecc.scala 136:27] + assign io_sec_data_hi_r_ff = _T_1188; // @[el2_lsu_ecc.scala 157:23] + assign io_sec_data_lo_r_ff = _T_1189; // @[el2_lsu_ecc.scala 158:23] + assign io_dma_dccm_wdata_ecc_hi = {_T_1143,_T_1140}; // @[el2_lsu_ecc.scala 154:30] + assign io_dma_dccm_wdata_ecc_lo = {_T_949,_T_946}; // @[el2_lsu_ecc.scala 155:30] + assign io_stbuf_ecc_any = {_T_949,_T_946}; // @[el2_lsu_ecc.scala 153:30] + assign io_sec_data_ecc_hi_r_ff = {_T_1143,_T_1140}; // @[el2_lsu_ecc.scala 151:30] + assign io_sec_data_ecc_lo_r_ff = {_T_949,_T_946}; // @[el2_lsu_ecc.scala 152:30] + assign io_single_ecc_error_hi_r = _T_1177; // @[el2_lsu_ecc.scala 115:33 el2_lsu_ecc.scala 144:62] + assign io_single_ecc_error_lo_r = _T_1176; // @[el2_lsu_ecc.scala 118:33 el2_lsu_ecc.scala 143:62] + assign io_lsu_single_ecc_error_r = _T_1174; // @[el2_lsu_ecc.scala 120:33 el2_lsu_ecc.scala 141:62] + assign io_lsu_double_ecc_error_r = _T_1175; // @[el2_lsu_ecc.scala 121:33 el2_lsu_ecc.scala 142:62] + assign io_lsu_single_ecc_error_m = single_ecc_error_hi_any | single_ecc_error_lo_any; // @[el2_lsu_ecc.scala 92:30 el2_lsu_ecc.scala 138:33] + assign io_lsu_double_ecc_error_m = double_ecc_error_hi_any | double_ecc_error_lo_any; // @[el2_lsu_ecc.scala 93:30 el2_lsu_ecc.scala 139:33] +`ifdef RANDOMIZE_GARBAGE_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_INVALID_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_REG_INIT +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_MEM_INIT +`define RANDOMIZE +`endif +`ifndef RANDOM +`define RANDOM $random +`endif +`ifdef RANDOMIZE_MEM_INIT + integer initvar; +`endif +`ifndef SYNTHESIS +`ifdef FIRRTL_BEFORE_INITIAL +`FIRRTL_BEFORE_INITIAL +`endif +initial begin + `ifdef RANDOMIZE + `ifdef INIT_RANDOM + `INIT_RANDOM + `endif + `ifndef VERILATOR + `ifdef RANDOMIZE_DELAY + #`RANDOMIZE_DELAY begin end + `else + #0.002 begin end + `endif + `endif +`ifdef RANDOMIZE_REG_INIT + _RAND_0 = {1{`RANDOM}}; + _T_1174 = _RAND_0[0:0]; + _RAND_1 = {1{`RANDOM}}; + _T_1175 = _RAND_1[0:0]; + _RAND_2 = {1{`RANDOM}}; + _T_1176 = _RAND_2[0:0]; + _RAND_3 = {1{`RANDOM}}; + _T_1177 = _RAND_3[0:0]; + _RAND_4 = {1{`RANDOM}}; + _T_1178 = _RAND_4[31:0]; + _RAND_5 = {1{`RANDOM}}; + _T_1179 = _RAND_5[31:0]; + _RAND_6 = {1{`RANDOM}}; + _T_1188 = _RAND_6[31:0]; + _RAND_7 = {1{`RANDOM}}; + _T_1189 = _RAND_7[31:0]; +`endif // RANDOMIZE_REG_INIT + if (reset) begin + _T_1174 = 1'h0; + end + if (reset) begin + _T_1175 = 1'h0; + end + if (reset) begin + _T_1176 = 1'h0; + end + if (reset) begin + _T_1177 = 1'h0; + end + if (reset) begin + _T_1178 = 32'h0; + end + if (reset) begin + _T_1179 = 32'h0; + end + if (reset) begin + _T_1188 = 32'h0; + end + if (reset) begin + _T_1189 = 32'h0; + end + `endif // RANDOMIZE +end // initial +`ifdef FIRRTL_AFTER_INITIAL +`FIRRTL_AFTER_INITIAL +`endif +`endif // SYNTHESIS + always @(posedge io_lsu_c2_r_clk or posedge reset) begin + if (reset) begin + _T_1174 <= 1'h0; + end else begin + _T_1174 <= io_lsu_single_ecc_error_m; + end + end + always @(posedge io_lsu_c2_r_clk or posedge reset) begin + if (reset) begin + _T_1175 <= 1'h0; + end else begin + _T_1175 <= io_lsu_double_ecc_error_m; + end + end + always @(posedge io_lsu_c2_r_clk or posedge reset) begin + if (reset) begin + _T_1176 <= 1'h0; + end else begin + _T_1176 <= _T_588 & _T_586[6]; + end + end + always @(posedge io_lsu_c2_r_clk or posedge reset) begin + if (reset) begin + _T_1177 <= 1'h0; + end else begin + _T_1177 <= _T_210 & _T_208[6]; + end + end + always @(posedge io_lsu_c2_r_clk or posedge reset) begin + if (reset) begin + _T_1178 <= 32'h0; + end else begin + _T_1178 <= io_sec_data_hi_m; + end + end + always @(posedge io_lsu_c2_r_clk or posedge reset) begin + if (reset) begin + _T_1179 <= 32'h0; + end else begin + _T_1179 <= io_sec_data_lo_m; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + _T_1188 <= 32'h0; + end else if (io_ld_single_ecc_error_r) begin + _T_1188 <= io_sec_data_hi_r; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + _T_1189 <= 32'h0; + end else if (io_ld_single_ecc_error_r) begin + _T_1189 <= io_sec_data_lo_r; + end + end +endmodule diff --git a/el2_lsu_lsc_ctl.anno.json b/el2_lsu_lsc_ctl.anno.json new file mode 100644 index 00000000..2ea9ecd6 --- /dev/null +++ b/el2_lsu_lsc_ctl.anno.json @@ -0,0 +1,304 @@ +[ + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_by", + "sources":[ + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_by", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_valid_raw_d", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dma_mem_sz" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_single_ecc_error_incr", + "sources":[ + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_valid", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_single_ecc_error_r", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_commit_r", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_dma", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_double_ecc_error_r", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_flush_r", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_store", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_load" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_word", + "sources":[ + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_word", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_valid_raw_d", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dma_mem_sz" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_addr_in_dccm_d", + "sources":[ + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_result_m", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_load_ldst_bypass_d", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_exu_lsu_rs1_d", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dma_mem_addr", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_offset_d", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_valid_raw_d", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_load_ldst_bypass_d", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_word", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_bus_read_data_m", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_ld_data_m", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_half", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_addr_external_m", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_by", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_unsign", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_dword", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_half", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_word", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_dword", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_half", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_word", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dma_mem_sz" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_store", + "sources":[ + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_store", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_valid_raw_d", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dma_mem_write" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_end_addr_d", + "sources":[ + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_result_m", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_load_ldst_bypass_d", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_exu_lsu_rs1_d", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dma_mem_addr", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_valid_raw_d", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_load_ldst_bypass_d", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_word", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_bus_read_data_m", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_ld_data_m", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_offset_d", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_half", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_addr_external_m", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_by", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_unsign", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_dword", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_half", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_word", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_dword", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_half", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_word", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dma_mem_sz" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_store_data_bypass_d", + "sources":[ + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_store_data_bypass_d", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_valid_raw_d" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_unsign", + "sources":[ + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_unsign", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_valid_raw_d" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_fir_addr", + "sources":[ + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_ld_data_corr_r" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_addr_d", + "sources":[ + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_result_m", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_load_ldst_bypass_d", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_exu_lsu_rs1_d", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dma_mem_addr", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_offset_d", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_valid_raw_d", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_load_ldst_bypass_d", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_word", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_bus_read_data_m", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_ld_data_m", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_half", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_addr_external_m", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_by", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_unsign" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_valid", + "sources":[ + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dma_dccm_req", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_valid", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_flush_m_up", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_fast_int" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_dword", + "sources":[ + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_dword", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_valid_raw_d", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dma_mem_sz" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_addr_in_pic_d", + "sources":[ + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_result_m", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_load_ldst_bypass_d", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_exu_lsu_rs1_d", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dma_mem_addr", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_offset_d", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_valid_raw_d", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_load_ldst_bypass_d", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_word", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_bus_read_data_m", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_ld_data_m", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_half", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_addr_external_m", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_by", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_unsign", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_dword", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_half", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_word", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_dword", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_half", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_word", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dma_mem_sz" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_store_data_m", + "sources":[ + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_result_m", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_picm_mask_data_m", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_store_data_bypass_m", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_addr_in_pic_m", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_word", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_bus_read_data_m", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_ld_data_m", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_half", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_addr_external_m", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_by", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_unsign" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_result_corr_r", + "sources":[ + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_word", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_ld_data_corr_r", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_half", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_by", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_unsign" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_half", + "sources":[ + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_half", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_valid_raw_d", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dma_mem_sz" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_result_m", + "sources":[ + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_word", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_bus_read_data_m", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_ld_data_m", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_half", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_addr_external_m", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_by", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_unsign" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_load", + "sources":[ + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_load", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_valid_raw_d", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dma_mem_write" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_load_ldst_bypass_d", + "sources":[ + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_load_ldst_bypass_d", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_valid_raw_d" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_store_data_bypass_m", + "sources":[ + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_store_data_bypass_m", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_valid_raw_d" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_dma", + "sources":[ + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_dma", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_valid_raw_d" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_fast_int", + "sources":[ + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_fast_int", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_valid_raw_d" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_commit_r", + "sources":[ + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_dma", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_valid", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_flush_r", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_store", + "~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_load" + ] + }, + { + "class":"firrtl.EmitCircuitAnnotation", + "emitter":"firrtl.VerilogEmitter" + }, + { + "class":"firrtl.options.TargetDirAnnotation", + "directory":"." + }, + { + "class":"firrtl.options.OutputAnnotationFileAnnotation", + "file":"el2_lsu_lsc_ctl" + }, + { + "class":"firrtl.transforms.BlackBoxTargetDirAnno", + "targetDir":"." + } +] \ No newline at end of file diff --git a/el2_lsu_lsc_ctl.fir b/el2_lsu_lsc_ctl.fir new file mode 100644 index 00000000..f64f6f93 --- /dev/null +++ b/el2_lsu_lsc_ctl.fir @@ -0,0 +1,1020 @@ +;buildInfoPackage: chisel3, version: 3.3.1, scalaVersion: 2.12.11, sbtVersion: 1.3.10 +circuit el2_lsu_lsc_ctl : + module rvlsadder : + input clock : Clock + input reset : Reset + output io : {flip rs1 : UInt<32>, flip offset : UInt<12>, dout : UInt<32>} + + node _T = bits(io.rs1, 11, 0) @[beh_lib.scala 47:30] + node _T_1 = cat(UInt<1>("h00"), _T) @[Cat.scala 29:58] + node _T_2 = bits(io.offset, 11, 0) @[beh_lib.scala 47:60] + node _T_3 = cat(UInt<1>("h00"), _T_2) @[Cat.scala 29:58] + node _T_4 = add(_T_1, _T_3) @[beh_lib.scala 47:38] + node w1 = tail(_T_4, 1) @[beh_lib.scala 47:38] + node _T_5 = bits(io.offset, 11, 11) @[beh_lib.scala 49:42] + node _T_6 = bits(w1, 12, 12) @[beh_lib.scala 49:51] + node _T_7 = xor(_T_5, _T_6) @[beh_lib.scala 49:47] + node _T_8 = not(_T_7) @[beh_lib.scala 49:31] + node _T_9 = bits(_T_8, 0, 0) @[Bitwise.scala 72:15] + node _T_10 = mux(_T_9, UInt<20>("h0fffff"), UInt<20>("h00")) @[Bitwise.scala 72:12] + node _T_11 = bits(io.rs1, 31, 12) @[beh_lib.scala 49:67] + node _T_12 = and(_T_10, _T_11) @[beh_lib.scala 49:59] + node _T_13 = bits(io.offset, 11, 11) @[beh_lib.scala 50:26] + node _T_14 = not(_T_13) @[beh_lib.scala 50:16] + node _T_15 = bits(w1, 12, 12) @[beh_lib.scala 50:35] + node _T_16 = xor(_T_14, _T_15) @[beh_lib.scala 50:31] + node _T_17 = bits(_T_16, 0, 0) @[Bitwise.scala 72:15] + node _T_18 = mux(_T_17, UInt<20>("h0fffff"), UInt<20>("h00")) @[Bitwise.scala 72:12] + node _T_19 = bits(io.rs1, 31, 12) @[beh_lib.scala 50:51] + node _T_20 = add(_T_19, UInt<1>("h01")) @[beh_lib.scala 50:58] + node _T_21 = tail(_T_20, 1) @[beh_lib.scala 50:58] + node _T_22 = and(_T_18, _T_21) @[beh_lib.scala 50:42] + node _T_23 = or(_T_12, _T_22) @[beh_lib.scala 49:76] + node _T_24 = bits(io.offset, 11, 11) @[beh_lib.scala 51:25] + node _T_25 = bits(w1, 12, 12) @[beh_lib.scala 51:35] + node _T_26 = not(_T_25) @[beh_lib.scala 51:32] + node _T_27 = xor(_T_24, _T_26) @[beh_lib.scala 51:30] + node _T_28 = bits(_T_27, 0, 0) @[Bitwise.scala 72:15] + node _T_29 = mux(_T_28, UInt<20>("h0fffff"), UInt<20>("h00")) @[Bitwise.scala 72:12] + node _T_30 = bits(io.rs1, 31, 12) @[beh_lib.scala 51:51] + node _T_31 = sub(_T_30, UInt<1>("h01")) @[beh_lib.scala 51:58] + node _T_32 = tail(_T_31, 1) @[beh_lib.scala 51:58] + node _T_33 = and(_T_29, _T_32) @[beh_lib.scala 51:42] + node dout_upper = or(_T_23, _T_33) @[beh_lib.scala 50:65] + node _T_34 = bits(w1, 11, 0) @[beh_lib.scala 53:31] + node _T_35 = cat(dout_upper, _T_34) @[Cat.scala 29:58] + io.dout <= _T_35 @[beh_lib.scala 53:11] + + module rvrangecheck : + input clock : Clock + input reset : Reset + output io : {flip addr : UInt<32>, in_range : UInt<1>, in_region : UInt<1>} + + node _T = bits(io.addr, 31, 28) @[beh_lib.scala 113:30] + node _T_1 = eq(_T, UInt<4>("h0f")) @[beh_lib.scala 113:52] + io.in_region <= _T_1 @[beh_lib.scala 113:19] + node _T_2 = bits(io.addr, 31, 16) @[beh_lib.scala 117:30] + node _T_3 = eq(_T_2, UInt<16>("h0f004")) @[beh_lib.scala 117:45] + io.in_range <= _T_3 @[beh_lib.scala 117:19] + + module rvrangecheck_1 : + input clock : Clock + input reset : Reset + output io : {flip addr : UInt<32>, in_range : UInt<1>, in_region : UInt<1>} + + node _T = bits(io.addr, 31, 28) @[beh_lib.scala 113:30] + node _T_1 = eq(_T, UInt<4>("h0f")) @[beh_lib.scala 113:52] + io.in_region <= _T_1 @[beh_lib.scala 113:19] + node _T_2 = bits(io.addr, 31, 16) @[beh_lib.scala 117:30] + node _T_3 = eq(_T_2, UInt<16>("h0f004")) @[beh_lib.scala 117:45] + io.in_range <= _T_3 @[beh_lib.scala 117:19] + + module rvrangecheck_2 : + input clock : Clock + input reset : Reset + output io : {flip addr : UInt<32>, in_range : UInt<1>, in_region : UInt<1>} + + node _T = bits(io.addr, 31, 28) @[beh_lib.scala 113:30] + node _T_1 = eq(_T, UInt<4>("h0f")) @[beh_lib.scala 113:52] + io.in_region <= _T_1 @[beh_lib.scala 113:19] + node _T_2 = bits(io.addr, 31, 15) @[beh_lib.scala 117:30] + node _T_3 = eq(_T_2, UInt<17>("h01e018")) @[beh_lib.scala 117:45] + io.in_range <= _T_3 @[beh_lib.scala 117:19] + + module rvrangecheck_3 : + input clock : Clock + input reset : Reset + output io : {flip addr : UInt<32>, in_range : UInt<1>, in_region : UInt<1>} + + node _T = bits(io.addr, 31, 28) @[beh_lib.scala 113:30] + node _T_1 = eq(_T, UInt<4>("h0f")) @[beh_lib.scala 113:52] + io.in_region <= _T_1 @[beh_lib.scala 113:19] + node _T_2 = bits(io.addr, 31, 15) @[beh_lib.scala 117:30] + node _T_3 = eq(_T_2, UInt<17>("h01e018")) @[beh_lib.scala 117:45] + io.in_range <= _T_3 @[beh_lib.scala 117:19] + + module el2_lsu_addrcheck : + input clock : Clock + input reset : AsyncReset + output io : {flip lsu_c2_m_clk : Clock, flip start_addr_d : UInt<32>, flip end_addr_d : UInt<32>, flip lsu_pkt_d : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip dec_tlu_mrac_ff : UInt<32>, flip rs1_region_d : UInt<4>, flip rs1_d : UInt<32>, is_sideeffects_m : UInt<1>, addr_in_dccm_d : UInt<1>, addr_in_pic_d : UInt<1>, addr_external_d : UInt<1>, access_fault_d : UInt<1>, misaligned_fault_d : UInt<1>, exc_mscause_d : UInt<4>, fir_dccm_access_error_d : UInt<1>, fir_nondccm_access_error_d : UInt<1>, flip scan_mode : UInt<1>} + + wire start_addr_in_dccm_d : UInt<1> + start_addr_in_dccm_d <= UInt<1>("h00") + wire start_addr_in_dccm_region_d : UInt<1> + start_addr_in_dccm_region_d <= UInt<1>("h00") + wire end_addr_in_dccm_d : UInt<1> + end_addr_in_dccm_d <= UInt<1>("h00") + wire end_addr_in_dccm_region_d : UInt<1> + end_addr_in_dccm_region_d <= UInt<1>("h00") + inst rvrangecheck of rvrangecheck @[el2_lsu_addrcheck.scala 45:44] + rvrangecheck.clock <= clock + rvrangecheck.reset <= reset + rvrangecheck.io.addr <= io.start_addr_d @[el2_lsu_addrcheck.scala 46:41] + start_addr_in_dccm_d <= rvrangecheck.io.in_range @[el2_lsu_addrcheck.scala 47:41] + start_addr_in_dccm_region_d <= rvrangecheck.io.in_region @[el2_lsu_addrcheck.scala 48:41] + inst rvrangecheck_1 of rvrangecheck_1 @[el2_lsu_addrcheck.scala 51:44] + rvrangecheck_1.clock <= clock + rvrangecheck_1.reset <= reset + rvrangecheck_1.io.addr <= io.end_addr_d @[el2_lsu_addrcheck.scala 52:41] + end_addr_in_dccm_d <= rvrangecheck_1.io.in_range @[el2_lsu_addrcheck.scala 53:41] + end_addr_in_dccm_region_d <= rvrangecheck_1.io.in_region @[el2_lsu_addrcheck.scala 54:41] + wire addr_in_iccm : UInt<1> + addr_in_iccm <= UInt<1>("h00") + node _T = bits(io.start_addr_d, 31, 28) @[el2_lsu_addrcheck.scala 65:37] + node _T_1 = eq(_T, UInt<4>("h0e")) @[el2_lsu_addrcheck.scala 65:45] + addr_in_iccm <= _T_1 @[el2_lsu_addrcheck.scala 65:18] + inst start_addr_pic_rangecheck of rvrangecheck_2 @[el2_lsu_addrcheck.scala 74:41] + start_addr_pic_rangecheck.clock <= clock + start_addr_pic_rangecheck.reset <= reset + node _T_2 = bits(io.start_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 75:55] + start_addr_pic_rangecheck.io.addr <= _T_2 @[el2_lsu_addrcheck.scala 75:37] + inst end_addr_pic_rangecheck of rvrangecheck_3 @[el2_lsu_addrcheck.scala 80:39] + end_addr_pic_rangecheck.clock <= clock + end_addr_pic_rangecheck.reset <= reset + node _T_3 = bits(io.end_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 81:51] + end_addr_pic_rangecheck.io.addr <= _T_3 @[el2_lsu_addrcheck.scala 81:35] + node start_addr_dccm_or_pic = or(start_addr_in_dccm_region_d, start_addr_pic_rangecheck.io.in_region) @[el2_lsu_addrcheck.scala 85:60] + node _T_4 = bits(io.rs1_region_d, 3, 0) @[el2_lsu_addrcheck.scala 86:48] + node _T_5 = eq(_T_4, UInt<4>("h0f")) @[el2_lsu_addrcheck.scala 86:54] + node _T_6 = bits(io.rs1_region_d, 3, 0) @[el2_lsu_addrcheck.scala 86:92] + node _T_7 = eq(_T_6, UInt<4>("h0f")) @[el2_lsu_addrcheck.scala 86:98] + node base_reg_dccm_or_pic = or(_T_5, _T_7) @[el2_lsu_addrcheck.scala 86:74] + node _T_8 = and(start_addr_in_dccm_d, end_addr_in_dccm_d) @[el2_lsu_addrcheck.scala 87:57] + io.addr_in_dccm_d <= _T_8 @[el2_lsu_addrcheck.scala 87:32] + node _T_9 = and(start_addr_pic_rangecheck.io.in_range, end_addr_pic_rangecheck.io.in_range) @[el2_lsu_addrcheck.scala 88:56] + io.addr_in_pic_d <= _T_9 @[el2_lsu_addrcheck.scala 88:32] + node _T_10 = or(start_addr_in_dccm_region_d, start_addr_pic_rangecheck.io.in_region) @[el2_lsu_addrcheck.scala 90:63] + node _T_11 = not(_T_10) @[el2_lsu_addrcheck.scala 90:33] + io.addr_external_d <= _T_11 @[el2_lsu_addrcheck.scala 90:30] + node _T_12 = bits(io.start_addr_d, 31, 28) @[el2_lsu_addrcheck.scala 91:51] + node csr_idx = cat(_T_12, UInt<1>("h01")) @[Cat.scala 29:58] + node _T_13 = dshr(io.dec_tlu_mrac_ff, csr_idx) @[el2_lsu_addrcheck.scala 92:50] + node _T_14 = bits(_T_13, 0, 0) @[el2_lsu_addrcheck.scala 92:50] + node _T_15 = or(start_addr_in_dccm_region_d, start_addr_pic_rangecheck.io.in_region) @[el2_lsu_addrcheck.scala 92:92] + node _T_16 = or(_T_15, addr_in_iccm) @[el2_lsu_addrcheck.scala 92:121] + node _T_17 = not(_T_16) @[el2_lsu_addrcheck.scala 92:62] + node _T_18 = and(_T_14, _T_17) @[el2_lsu_addrcheck.scala 92:60] + node _T_19 = and(_T_18, io.lsu_pkt_d.valid) @[el2_lsu_addrcheck.scala 92:137] + node _T_20 = or(io.lsu_pkt_d.store, io.lsu_pkt_d.load) @[el2_lsu_addrcheck.scala 92:180] + node is_sideeffects_d = and(_T_19, _T_20) @[el2_lsu_addrcheck.scala 92:158] + node _T_21 = bits(io.start_addr_d, 1, 0) @[el2_lsu_addrcheck.scala 93:69] + node _T_22 = eq(_T_21, UInt<1>("h00")) @[el2_lsu_addrcheck.scala 93:75] + node _T_23 = and(io.lsu_pkt_d.word, _T_22) @[el2_lsu_addrcheck.scala 93:51] + node _T_24 = bits(io.start_addr_d, 0, 0) @[el2_lsu_addrcheck.scala 93:124] + node _T_25 = eq(_T_24, UInt<1>("h00")) @[el2_lsu_addrcheck.scala 93:128] + node _T_26 = and(io.lsu_pkt_d.half, _T_25) @[el2_lsu_addrcheck.scala 93:106] + node _T_27 = or(_T_23, _T_26) @[el2_lsu_addrcheck.scala 93:85] + node is_aligned_d = or(_T_27, io.lsu_pkt_d.by) @[el2_lsu_addrcheck.scala 93:138] + node _T_28 = cat(UInt<1>("h00"), UInt<1>("h00")) @[Cat.scala 29:58] + node _T_29 = cat(UInt<1>("h00"), UInt<1>("h00")) @[Cat.scala 29:58] + node _T_30 = cat(_T_29, _T_28) @[Cat.scala 29:58] + node _T_31 = cat(UInt<1>("h01"), UInt<1>("h01")) @[Cat.scala 29:58] + node _T_32 = cat(UInt<1>("h01"), UInt<1>("h01")) @[Cat.scala 29:58] + node _T_33 = cat(_T_32, _T_31) @[Cat.scala 29:58] + node _T_34 = cat(_T_33, _T_30) @[Cat.scala 29:58] + node _T_35 = orr(_T_34) @[el2_lsu_addrcheck.scala 97:99] + node _T_36 = not(_T_35) @[el2_lsu_addrcheck.scala 96:33] + node _T_37 = bits(io.start_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 98:50] + node _T_38 = or(_T_37, UInt<32>("h07fffffff")) @[el2_lsu_addrcheck.scala 98:57] + node _T_39 = or(UInt<32>("h00"), UInt<32>("h07fffffff")) @[el2_lsu_addrcheck.scala 98:108] + node _T_40 = eq(_T_38, _T_39) @[el2_lsu_addrcheck.scala 98:82] + node _T_41 = and(UInt<1>("h01"), _T_40) @[el2_lsu_addrcheck.scala 98:31] + node _T_42 = bits(io.start_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 99:50] + node _T_43 = or(_T_42, UInt<32>("h03fffffff")) @[el2_lsu_addrcheck.scala 99:57] + node _T_44 = or(UInt<32>("h0c0000000"), UInt<32>("h03fffffff")) @[el2_lsu_addrcheck.scala 99:108] + node _T_45 = eq(_T_43, _T_44) @[el2_lsu_addrcheck.scala 99:82] + node _T_46 = and(UInt<1>("h01"), _T_45) @[el2_lsu_addrcheck.scala 99:31] + node _T_47 = or(_T_41, _T_46) @[el2_lsu_addrcheck.scala 98:133] + node _T_48 = bits(io.start_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 100:50] + node _T_49 = or(_T_48, UInt<32>("h01fffffff")) @[el2_lsu_addrcheck.scala 100:57] + node _T_50 = or(UInt<32>("h0a0000000"), UInt<32>("h01fffffff")) @[el2_lsu_addrcheck.scala 100:108] + node _T_51 = eq(_T_49, _T_50) @[el2_lsu_addrcheck.scala 100:82] + node _T_52 = and(UInt<1>("h01"), _T_51) @[el2_lsu_addrcheck.scala 100:31] + node _T_53 = or(_T_47, _T_52) @[el2_lsu_addrcheck.scala 99:133] + node _T_54 = bits(io.start_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 101:50] + node _T_55 = or(_T_54, UInt<32>("h0fffffff")) @[el2_lsu_addrcheck.scala 101:57] + node _T_56 = or(UInt<32>("h080000000"), UInt<32>("h0fffffff")) @[el2_lsu_addrcheck.scala 101:108] + node _T_57 = eq(_T_55, _T_56) @[el2_lsu_addrcheck.scala 101:82] + node _T_58 = and(UInt<1>("h01"), _T_57) @[el2_lsu_addrcheck.scala 101:31] + node _T_59 = or(_T_53, _T_58) @[el2_lsu_addrcheck.scala 100:133] + node _T_60 = bits(io.start_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 102:50] + node _T_61 = or(_T_60, UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 102:57] + node _T_62 = or(UInt<32>("h00"), UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 102:108] + node _T_63 = eq(_T_61, _T_62) @[el2_lsu_addrcheck.scala 102:82] + node _T_64 = and(UInt<1>("h00"), _T_63) @[el2_lsu_addrcheck.scala 102:31] + node _T_65 = or(_T_59, _T_64) @[el2_lsu_addrcheck.scala 101:133] + node _T_66 = bits(io.start_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 103:50] + node _T_67 = or(_T_66, UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 103:57] + node _T_68 = or(UInt<32>("h00"), UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 103:108] + node _T_69 = eq(_T_67, _T_68) @[el2_lsu_addrcheck.scala 103:82] + node _T_70 = and(UInt<1>("h00"), _T_69) @[el2_lsu_addrcheck.scala 103:31] + node _T_71 = or(_T_65, _T_70) @[el2_lsu_addrcheck.scala 102:133] + node _T_72 = bits(io.start_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 104:50] + node _T_73 = or(_T_72, UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 104:57] + node _T_74 = or(UInt<32>("h00"), UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 104:108] + node _T_75 = eq(_T_73, _T_74) @[el2_lsu_addrcheck.scala 104:82] + node _T_76 = and(UInt<1>("h00"), _T_75) @[el2_lsu_addrcheck.scala 104:31] + node _T_77 = or(_T_71, _T_76) @[el2_lsu_addrcheck.scala 103:133] + node _T_78 = bits(io.start_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 105:50] + node _T_79 = or(_T_78, UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 105:57] + node _T_80 = or(UInt<32>("h00"), UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 105:108] + node _T_81 = eq(_T_79, _T_80) @[el2_lsu_addrcheck.scala 105:82] + node _T_82 = and(UInt<1>("h00"), _T_81) @[el2_lsu_addrcheck.scala 105:31] + node _T_83 = or(_T_77, _T_82) @[el2_lsu_addrcheck.scala 104:133] + node _T_84 = bits(io.end_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 107:49] + node _T_85 = or(_T_84, UInt<32>("h07fffffff")) @[el2_lsu_addrcheck.scala 107:58] + node _T_86 = or(UInt<32>("h00"), UInt<32>("h07fffffff")) @[el2_lsu_addrcheck.scala 107:109] + node _T_87 = eq(_T_85, _T_86) @[el2_lsu_addrcheck.scala 107:83] + node _T_88 = and(UInt<1>("h01"), _T_87) @[el2_lsu_addrcheck.scala 107:32] + node _T_89 = bits(io.end_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 108:50] + node _T_90 = or(_T_89, UInt<32>("h03fffffff")) @[el2_lsu_addrcheck.scala 108:59] + node _T_91 = or(UInt<32>("h0c0000000"), UInt<32>("h03fffffff")) @[el2_lsu_addrcheck.scala 108:110] + node _T_92 = eq(_T_90, _T_91) @[el2_lsu_addrcheck.scala 108:84] + node _T_93 = and(UInt<1>("h01"), _T_92) @[el2_lsu_addrcheck.scala 108:33] + node _T_94 = or(_T_88, _T_93) @[el2_lsu_addrcheck.scala 107:134] + node _T_95 = bits(io.end_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 109:50] + node _T_96 = or(_T_95, UInt<32>("h01fffffff")) @[el2_lsu_addrcheck.scala 109:59] + node _T_97 = or(UInt<32>("h0a0000000"), UInt<32>("h01fffffff")) @[el2_lsu_addrcheck.scala 109:110] + node _T_98 = eq(_T_96, _T_97) @[el2_lsu_addrcheck.scala 109:84] + node _T_99 = and(UInt<1>("h01"), _T_98) @[el2_lsu_addrcheck.scala 109:33] + node _T_100 = or(_T_94, _T_99) @[el2_lsu_addrcheck.scala 108:135] + node _T_101 = bits(io.end_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 110:50] + node _T_102 = or(_T_101, UInt<32>("h0fffffff")) @[el2_lsu_addrcheck.scala 110:59] + node _T_103 = or(UInt<32>("h080000000"), UInt<32>("h0fffffff")) @[el2_lsu_addrcheck.scala 110:110] + node _T_104 = eq(_T_102, _T_103) @[el2_lsu_addrcheck.scala 110:84] + node _T_105 = and(UInt<1>("h01"), _T_104) @[el2_lsu_addrcheck.scala 110:33] + node _T_106 = or(_T_100, _T_105) @[el2_lsu_addrcheck.scala 109:135] + node _T_107 = bits(io.end_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 111:50] + node _T_108 = or(_T_107, UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 111:59] + node _T_109 = or(UInt<32>("h00"), UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 111:110] + node _T_110 = eq(_T_108, _T_109) @[el2_lsu_addrcheck.scala 111:84] + node _T_111 = and(UInt<1>("h00"), _T_110) @[el2_lsu_addrcheck.scala 111:33] + node _T_112 = or(_T_106, _T_111) @[el2_lsu_addrcheck.scala 110:135] + node _T_113 = bits(io.end_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 112:50] + node _T_114 = or(_T_113, UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 112:59] + node _T_115 = or(UInt<32>("h00"), UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 112:110] + node _T_116 = eq(_T_114, _T_115) @[el2_lsu_addrcheck.scala 112:84] + node _T_117 = and(UInt<1>("h00"), _T_116) @[el2_lsu_addrcheck.scala 112:33] + node _T_118 = or(_T_112, _T_117) @[el2_lsu_addrcheck.scala 111:135] + node _T_119 = bits(io.end_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 113:50] + node _T_120 = or(_T_119, UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 113:59] + node _T_121 = or(UInt<32>("h00"), UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 113:110] + node _T_122 = eq(_T_120, _T_121) @[el2_lsu_addrcheck.scala 113:84] + node _T_123 = and(UInt<1>("h00"), _T_122) @[el2_lsu_addrcheck.scala 113:33] + node _T_124 = or(_T_118, _T_123) @[el2_lsu_addrcheck.scala 112:135] + node _T_125 = bits(io.end_addr_d, 31, 0) @[el2_lsu_addrcheck.scala 114:50] + node _T_126 = or(_T_125, UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 114:59] + node _T_127 = or(UInt<32>("h00"), UInt<32>("h0ffffffff")) @[el2_lsu_addrcheck.scala 114:110] + node _T_128 = eq(_T_126, _T_127) @[el2_lsu_addrcheck.scala 114:84] + node _T_129 = and(UInt<1>("h00"), _T_128) @[el2_lsu_addrcheck.scala 114:33] + node _T_130 = or(_T_124, _T_129) @[el2_lsu_addrcheck.scala 113:135] + node _T_131 = and(_T_83, _T_130) @[el2_lsu_addrcheck.scala 106:7] + node non_dccm_access_ok = or(_T_36, _T_131) @[el2_lsu_addrcheck.scala 97:104] + node regpred_access_fault_d = xor(start_addr_dccm_or_pic, base_reg_dccm_or_pic) @[el2_lsu_addrcheck.scala 116:57] + node _T_132 = bits(io.start_addr_d, 1, 0) @[el2_lsu_addrcheck.scala 117:70] + node _T_133 = neq(_T_132, UInt<2>("h00")) @[el2_lsu_addrcheck.scala 117:76] + node _T_134 = not(io.lsu_pkt_d.word) @[el2_lsu_addrcheck.scala 117:92] + node _T_135 = or(_T_133, _T_134) @[el2_lsu_addrcheck.scala 117:90] + node picm_access_fault_d = and(io.addr_in_pic_d, _T_135) @[el2_lsu_addrcheck.scala 117:51] + wire unmapped_access_fault_d : UInt<1> + unmapped_access_fault_d <= UInt<1>("h01") + wire mpu_access_fault_d : UInt<1> + mpu_access_fault_d <= UInt<1>("h01") + node _T_136 = or(start_addr_in_dccm_d, start_addr_pic_rangecheck.io.in_range) @[el2_lsu_addrcheck.scala 122:87] + node _T_137 = not(_T_136) @[el2_lsu_addrcheck.scala 122:64] + node _T_138 = and(start_addr_in_dccm_region_d, _T_137) @[el2_lsu_addrcheck.scala 122:62] + node _T_139 = or(end_addr_in_dccm_d, end_addr_pic_rangecheck.io.in_range) @[el2_lsu_addrcheck.scala 124:57] + node _T_140 = not(_T_139) @[el2_lsu_addrcheck.scala 124:36] + node _T_141 = and(end_addr_in_dccm_region_d, _T_140) @[el2_lsu_addrcheck.scala 124:34] + node _T_142 = or(_T_138, _T_141) @[el2_lsu_addrcheck.scala 122:112] + node _T_143 = and(start_addr_in_dccm_d, end_addr_pic_rangecheck.io.in_range) @[el2_lsu_addrcheck.scala 126:29] + node _T_144 = or(_T_142, _T_143) @[el2_lsu_addrcheck.scala 124:85] + node _T_145 = and(start_addr_pic_rangecheck.io.in_range, end_addr_in_dccm_d) @[el2_lsu_addrcheck.scala 128:29] + node _T_146 = or(_T_144, _T_145) @[el2_lsu_addrcheck.scala 126:85] + unmapped_access_fault_d <= _T_146 @[el2_lsu_addrcheck.scala 122:29] + node _T_147 = not(start_addr_in_dccm_region_d) @[el2_lsu_addrcheck.scala 130:33] + node _T_148 = not(non_dccm_access_ok) @[el2_lsu_addrcheck.scala 130:64] + node _T_149 = and(_T_147, _T_148) @[el2_lsu_addrcheck.scala 130:62] + mpu_access_fault_d <= _T_149 @[el2_lsu_addrcheck.scala 130:29] + node _T_150 = or(unmapped_access_fault_d, mpu_access_fault_d) @[el2_lsu_addrcheck.scala 142:49] + node _T_151 = or(_T_150, picm_access_fault_d) @[el2_lsu_addrcheck.scala 142:70] + node _T_152 = or(_T_151, regpred_access_fault_d) @[el2_lsu_addrcheck.scala 142:92] + node _T_153 = and(_T_152, io.lsu_pkt_d.valid) @[el2_lsu_addrcheck.scala 142:118] + node _T_154 = not(io.lsu_pkt_d.dma) @[el2_lsu_addrcheck.scala 142:141] + node _T_155 = and(_T_153, _T_154) @[el2_lsu_addrcheck.scala 142:139] + io.access_fault_d <= _T_155 @[el2_lsu_addrcheck.scala 142:21] + node _T_156 = bits(unmapped_access_fault_d, 0, 0) @[el2_lsu_addrcheck.scala 143:60] + node _T_157 = bits(mpu_access_fault_d, 0, 0) @[el2_lsu_addrcheck.scala 143:100] + node _T_158 = bits(regpred_access_fault_d, 0, 0) @[el2_lsu_addrcheck.scala 143:144] + node _T_159 = bits(picm_access_fault_d, 0, 0) @[el2_lsu_addrcheck.scala 143:185] + node _T_160 = mux(_T_159, UInt<4>("h06"), UInt<4>("h00")) @[el2_lsu_addrcheck.scala 143:164] + node _T_161 = mux(_T_158, UInt<4>("h05"), _T_160) @[el2_lsu_addrcheck.scala 143:120] + node _T_162 = mux(_T_157, UInt<4>("h03"), _T_161) @[el2_lsu_addrcheck.scala 143:80] + node access_fault_mscause_d = mux(_T_156, UInt<4>("h02"), _T_162) @[el2_lsu_addrcheck.scala 143:35] + node _T_163 = bits(io.start_addr_d, 31, 28) @[el2_lsu_addrcheck.scala 144:53] + node _T_164 = bits(io.end_addr_d, 31, 28) @[el2_lsu_addrcheck.scala 144:78] + node regcross_misaligned_fault_d = neq(_T_163, _T_164) @[el2_lsu_addrcheck.scala 144:61] + node _T_165 = not(is_aligned_d) @[el2_lsu_addrcheck.scala 145:59] + node sideeffect_misaligned_fault_d = and(is_sideeffects_d, _T_165) @[el2_lsu_addrcheck.scala 145:57] + node _T_166 = and(sideeffect_misaligned_fault_d, io.addr_external_d) @[el2_lsu_addrcheck.scala 146:90] + node _T_167 = or(regcross_misaligned_fault_d, _T_166) @[el2_lsu_addrcheck.scala 146:57] + node _T_168 = and(_T_167, io.lsu_pkt_d.valid) @[el2_lsu_addrcheck.scala 146:113] + node _T_169 = not(io.lsu_pkt_d.dma) @[el2_lsu_addrcheck.scala 146:136] + node _T_170 = and(_T_168, _T_169) @[el2_lsu_addrcheck.scala 146:134] + io.misaligned_fault_d <= _T_170 @[el2_lsu_addrcheck.scala 146:25] + node _T_171 = bits(sideeffect_misaligned_fault_d, 0, 0) @[el2_lsu_addrcheck.scala 147:111] + node _T_172 = mux(_T_171, UInt<4>("h01"), UInt<4>("h00")) @[el2_lsu_addrcheck.scala 147:80] + node misaligned_fault_mscause_d = mux(regcross_misaligned_fault_d, UInt<4>("h02"), _T_172) @[el2_lsu_addrcheck.scala 147:39] + node _T_173 = bits(io.misaligned_fault_d, 0, 0) @[el2_lsu_addrcheck.scala 148:50] + node _T_174 = bits(misaligned_fault_mscause_d, 3, 0) @[el2_lsu_addrcheck.scala 148:84] + node _T_175 = bits(access_fault_mscause_d, 3, 0) @[el2_lsu_addrcheck.scala 148:113] + node _T_176 = mux(_T_173, _T_174, _T_175) @[el2_lsu_addrcheck.scala 148:27] + io.exc_mscause_d <= _T_176 @[el2_lsu_addrcheck.scala 148:21] + node _T_177 = not(start_addr_in_dccm_d) @[el2_lsu_addrcheck.scala 149:66] + node _T_178 = and(start_addr_in_dccm_region_d, _T_177) @[el2_lsu_addrcheck.scala 149:64] + node _T_179 = not(end_addr_in_dccm_d) @[el2_lsu_addrcheck.scala 149:120] + node _T_180 = and(end_addr_in_dccm_region_d, _T_179) @[el2_lsu_addrcheck.scala 149:118] + node _T_181 = or(_T_178, _T_180) @[el2_lsu_addrcheck.scala 149:88] + node _T_182 = and(_T_181, io.lsu_pkt_d.valid) @[el2_lsu_addrcheck.scala 149:142] + node _T_183 = and(_T_182, io.lsu_pkt_d.fast_int) @[el2_lsu_addrcheck.scala 149:163] + io.fir_dccm_access_error_d <= _T_183 @[el2_lsu_addrcheck.scala 149:31] + node _T_184 = and(start_addr_in_dccm_region_d, end_addr_in_dccm_region_d) @[el2_lsu_addrcheck.scala 150:66] + node _T_185 = not(_T_184) @[el2_lsu_addrcheck.scala 150:36] + node _T_186 = and(_T_185, io.lsu_pkt_d.valid) @[el2_lsu_addrcheck.scala 150:95] + node _T_187 = and(_T_186, io.lsu_pkt_d.fast_int) @[el2_lsu_addrcheck.scala 150:116] + io.fir_nondccm_access_error_d <= _T_187 @[el2_lsu_addrcheck.scala 150:33] + reg _T_188 : UInt, io.lsu_c2_m_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_addrcheck.scala 152:60] + _T_188 <= is_sideeffects_d @[el2_lsu_addrcheck.scala 152:60] + io.is_sideeffects_m <= _T_188 @[el2_lsu_addrcheck.scala 152:50] + + module rvdff : + input clock : Clock + input reset : Reset + output io : {flip din : UInt<1>, dout : UInt<1>} + + reg flop : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[beh_lib.scala 12:21] + flop <= io.din @[beh_lib.scala 12:21] + io.dout <= flop @[beh_lib.scala 17:12] + + module rvdff_1 : + input clock : Clock + input reset : Reset + output io : {flip din : UInt<1>, dout : UInt<1>} + + reg flop : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[beh_lib.scala 12:21] + flop <= io.din @[beh_lib.scala 12:21] + io.dout <= flop @[beh_lib.scala 17:12] + + module rvdff_2 : + input clock : Clock + input reset : Reset + output io : {flip din : UInt<4>, dout : UInt<4>} + + reg flop : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[beh_lib.scala 12:21] + flop <= io.din @[beh_lib.scala 12:21] + io.dout <= flop @[beh_lib.scala 17:12] + + module rvdff_3 : + input clock : Clock + input reset : Reset + output io : {flip din : UInt<2>, dout : UInt<2>} + + reg flop : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[beh_lib.scala 12:21] + flop <= io.din @[beh_lib.scala 12:21] + io.dout <= flop @[beh_lib.scala 17:12] + + module rvdff_4 : + input clock : Clock + input reset : Reset + output io : {flip din : UInt<1>, dout : UInt<1>} + + reg flop : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[beh_lib.scala 12:21] + flop <= io.din @[beh_lib.scala 12:21] + io.dout <= flop @[beh_lib.scala 17:12] + + module rvdff_5 : + input clock : Clock + input reset : Reset + output io : {flip din : UInt<1>, dout : UInt<1>} + + reg flop : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[beh_lib.scala 12:21] + flop <= io.din @[beh_lib.scala 12:21] + io.dout <= flop @[beh_lib.scala 17:12] + + module rvdff_6 : + input clock : Clock + input reset : Reset + output io : {flip din : UInt<32>, dout : UInt<32>} + + reg flop : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[beh_lib.scala 12:21] + flop <= io.din @[beh_lib.scala 12:21] + io.dout <= flop @[beh_lib.scala 17:12] + + module rvdff_7 : + input clock : Clock + input reset : Reset + output io : {flip din : UInt<32>, dout : UInt<32>} + + reg flop : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[beh_lib.scala 12:21] + flop <= io.din @[beh_lib.scala 12:21] + io.dout <= flop @[beh_lib.scala 17:12] + + module rvdff_8 : + input clock : Clock + input reset : Reset + output io : {flip din : UInt<32>, dout : UInt<32>} + + reg flop : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[beh_lib.scala 12:21] + flop <= io.din @[beh_lib.scala 12:21] + io.dout <= flop @[beh_lib.scala 17:12] + + module rvdff_9 : + input clock : Clock + input reset : Reset + output io : {flip din : UInt<32>, dout : UInt<32>} + + reg flop : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[beh_lib.scala 12:21] + flop <= io.din @[beh_lib.scala 12:21] + io.dout <= flop @[beh_lib.scala 17:12] + + module rvdff_10 : + input clock : Clock + input reset : Reset + output io : {flip din : UInt<32>, dout : UInt<32>} + + reg flop : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[beh_lib.scala 12:21] + flop <= io.din @[beh_lib.scala 12:21] + io.dout <= flop @[beh_lib.scala 17:12] + + module rvdff_11 : + input clock : Clock + input reset : Reset + output io : {flip din : UInt<1>, dout : UInt<1>} + + reg flop : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[beh_lib.scala 12:21] + flop <= io.din @[beh_lib.scala 12:21] + io.dout <= flop @[beh_lib.scala 17:12] + + module rvdff_12 : + input clock : Clock + input reset : Reset + output io : {flip din : UInt<1>, dout : UInt<1>} + + reg flop : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[beh_lib.scala 12:21] + flop <= io.din @[beh_lib.scala 12:21] + io.dout <= flop @[beh_lib.scala 17:12] + + module rvdff_13 : + input clock : Clock + input reset : Reset + output io : {flip din : UInt<1>, dout : UInt<1>} + + reg flop : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[beh_lib.scala 12:21] + flop <= io.din @[beh_lib.scala 12:21] + io.dout <= flop @[beh_lib.scala 17:12] + + module rvdff_14 : + input clock : Clock + input reset : Reset + output io : {flip din : UInt<1>, dout : UInt<1>} + + reg flop : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[beh_lib.scala 12:21] + flop <= io.din @[beh_lib.scala 12:21] + io.dout <= flop @[beh_lib.scala 17:12] + + module rvdff_15 : + input clock : Clock + input reset : Reset + output io : {flip din : UInt<1>, dout : UInt<1>} + + reg flop : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[beh_lib.scala 12:21] + flop <= io.din @[beh_lib.scala 12:21] + io.dout <= flop @[beh_lib.scala 17:12] + + module rvdff_16 : + input clock : Clock + input reset : Reset + output io : {flip din : UInt<1>, dout : UInt<1>} + + reg flop : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[beh_lib.scala 12:21] + flop <= io.din @[beh_lib.scala 12:21] + io.dout <= flop @[beh_lib.scala 17:12] + + module rvdff_17 : + input clock : Clock + input reset : Reset + output io : {flip din : UInt<32>, dout : UInt<32>} + + reg flop : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[beh_lib.scala 12:21] + flop <= io.din @[beh_lib.scala 12:21] + io.dout <= flop @[beh_lib.scala 17:12] + + module el2_lsu_lsc_ctl : + input clock : Clock + input reset : AsyncReset + output io : {flip lsu_c1_m_clk : Clock, flip lsu_c1_r_clk : Clock, flip lsu_c2_m_clk : Clock, flip lsu_c2_r_clk : Clock, flip lsu_store_c1_m_clk : Clock, flip lsu_ld_data_r : UInt<32>, flip lsu_ld_data_corr_r : UInt<32>, flip lsu_single_ecc_error_r : UInt<1>, flip lsu_double_ecc_error_r : UInt<1>, flip lsu_ld_data_m : UInt<32>, flip lsu_single_ecc_error_m : UInt<1>, flip lsu_double_ecc_error_m : UInt<1>, flip flush_m_up : UInt<1>, flip flush_r : UInt<1>, flip exu_lsu_rs1_d : UInt<32>, flip exu_lsu_rs2_d : UInt<32>, flip lsu_p : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip dec_lsu_valid_raw_d : UInt<1>, flip dec_lsu_offset_d : UInt<12>, flip picm_mask_data_m : UInt<32>, flip bus_read_data_m : UInt<32>, lsu_result_m : UInt<32>, lsu_result_corr_r : UInt<32>, lsu_addr_d : UInt<32>, lsu_addr_m : UInt<32>, lsu_addr_r : UInt<32>, end_addr_d : UInt<32>, end_addr_m : UInt<32>, end_addr_r : UInt<32>, store_data_m : UInt<32>, flip dec_tlu_mrac_ff : UInt<32>, lsu_exc_m : UInt<1>, is_sideeffects_m : UInt<1>, lsu_commit_r : UInt<1>, lsu_single_ecc_error_incr : UInt<1>, lsu_error_pkt_r : {exc_valid : UInt<1>, single_ecc_error : UInt<1>, inst_type : UInt<1>, exc_type : UInt<1>, mscause : UInt<4>, addr : UInt<32>}, lsu_fir_addr : UInt<32>, lsu_fir_error : UInt<2>, addr_in_dccm_d : UInt<1>, addr_in_dccm_m : UInt<1>, addr_in_dccm_r : UInt<1>, addr_in_pic_d : UInt<1>, addr_in_pic_m : UInt<1>, addr_in_pic_r : UInt<1>, addr_external_m : UInt<1>, flip dma_dccm_req : UInt<1>, flip dma_mem_addr : UInt<32>, flip dma_mem_sz : UInt<3>, flip dma_mem_write : UInt<1>, flip dma_mem_wdata : UInt<64>, lsu_pkt_d : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, lsu_pkt_m : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, lsu_pkt_r : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip scan_mode : UInt<1>} + + wire dma_pkt_d : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>} @[el2_lsu_lsc_ctl.scala 103:29] + wire lsu_pkt_m_in : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>} @[el2_lsu_lsc_ctl.scala 104:29] + wire lsu_pkt_r_in : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>} @[el2_lsu_lsc_ctl.scala 105:29] + wire lsu_error_pkt_m : {exc_valid : UInt<1>, single_ecc_error : UInt<1>, inst_type : UInt<1>, exc_type : UInt<1>, mscause : UInt<4>, addr : UInt<32>} @[el2_lsu_lsc_ctl.scala 106:29] + node _T = bits(io.dec_lsu_valid_raw_d, 0, 0) @[el2_lsu_lsc_ctl.scala 108:52] + node lsu_rs1_d = mux(_T, io.exu_lsu_rs1_d, io.dma_mem_addr) @[el2_lsu_lsc_ctl.scala 108:28] + node _T_1 = bits(io.dec_lsu_offset_d, 11, 0) @[el2_lsu_lsc_ctl.scala 109:44] + node _T_2 = bits(io.dec_lsu_valid_raw_d, 0, 0) @[Bitwise.scala 72:15] + node _T_3 = mux(_T_2, UInt<12>("h0fff"), UInt<12>("h00")) @[Bitwise.scala 72:12] + node lsu_offset_d = and(_T_1, _T_3) @[el2_lsu_lsc_ctl.scala 109:51] + node _T_4 = bits(io.lsu_pkt_d.load_ldst_bypass_d, 0, 0) @[el2_lsu_lsc_ctl.scala 114:51] + node rs1_d = mux(_T_4, io.lsu_result_m, lsu_rs1_d) @[el2_lsu_lsc_ctl.scala 114:18] + inst lsadder of rvlsadder @[el2_lsu_lsc_ctl.scala 118:23] + lsadder.clock <= clock + lsadder.reset <= reset + lsadder.io.rs1 <= rs1_d @[el2_lsu_lsc_ctl.scala 119:26] + lsadder.io.offset <= lsu_offset_d @[el2_lsu_lsc_ctl.scala 120:26] + node _T_5 = bits(io.lsu_pkt_d.half, 0, 0) @[Bitwise.scala 72:15] + node _T_6 = mux(_T_5, UInt<3>("h07"), UInt<3>("h00")) @[Bitwise.scala 72:12] + node _T_7 = and(_T_6, UInt<1>("h01")) @[el2_lsu_lsc_ctl.scala 127:53] + node _T_8 = bits(io.lsu_pkt_d.word, 0, 0) @[Bitwise.scala 72:15] + node _T_9 = mux(_T_8, UInt<3>("h07"), UInt<3>("h00")) @[Bitwise.scala 72:12] + node _T_10 = and(_T_9, UInt<2>("h03")) @[el2_lsu_lsc_ctl.scala 128:35] + node _T_11 = or(_T_7, _T_10) @[el2_lsu_lsc_ctl.scala 127:65] + node _T_12 = bits(io.lsu_pkt_d.dword, 0, 0) @[Bitwise.scala 72:15] + node _T_13 = mux(_T_12, UInt<3>("h07"), UInt<3>("h00")) @[Bitwise.scala 72:12] + node _T_14 = and(_T_13, UInt<3>("h07")) @[el2_lsu_lsc_ctl.scala 129:35] + node addr_offset_d = or(_T_11, _T_14) @[el2_lsu_lsc_ctl.scala 128:47] + node _T_15 = bits(lsu_offset_d, 11, 11) @[el2_lsu_lsc_ctl.scala 131:39] + node _T_16 = bits(lsu_offset_d, 11, 0) @[el2_lsu_lsc_ctl.scala 131:52] + node _T_17 = cat(_T_15, _T_16) @[Cat.scala 29:58] + node _T_18 = mux(UInt<1>("h00"), UInt<9>("h01ff"), UInt<9>("h00")) @[Bitwise.scala 72:12] + node _T_19 = bits(addr_offset_d, 2, 0) @[el2_lsu_lsc_ctl.scala 131:94] + node _T_20 = cat(_T_18, _T_19) @[Cat.scala 29:58] + node _T_21 = add(_T_17, _T_20) @[el2_lsu_lsc_ctl.scala 131:60] + node end_addr_offset_d = tail(_T_21, 1) @[el2_lsu_lsc_ctl.scala 131:60] + node _T_22 = bits(rs1_d, 31, 0) @[el2_lsu_lsc_ctl.scala 132:32] + node _T_23 = bits(end_addr_offset_d, 12, 12) @[el2_lsu_lsc_ctl.scala 132:70] + node _T_24 = bits(_T_23, 0, 0) @[Bitwise.scala 72:15] + node _T_25 = mux(_T_24, UInt<19>("h07ffff"), UInt<19>("h00")) @[Bitwise.scala 72:12] + node _T_26 = bits(end_addr_offset_d, 12, 0) @[el2_lsu_lsc_ctl.scala 132:93] + node _T_27 = cat(_T_25, _T_26) @[Cat.scala 29:58] + node _T_28 = add(_T_22, _T_27) @[el2_lsu_lsc_ctl.scala 132:39] + node full_end_addr_d = tail(_T_28, 1) @[el2_lsu_lsc_ctl.scala 132:39] + io.end_addr_d <= full_end_addr_d @[el2_lsu_lsc_ctl.scala 133:24] + inst addrcheck of el2_lsu_addrcheck @[el2_lsu_lsc_ctl.scala 141:25] + addrcheck.clock <= clock + addrcheck.reset <= reset + addrcheck.io.lsu_c2_m_clk <= io.lsu_c2_m_clk @[el2_lsu_lsc_ctl.scala 143:42] + addrcheck.io.start_addr_d <= lsadder.io.dout @[el2_lsu_lsc_ctl.scala 145:42] + addrcheck.io.end_addr_d <= full_end_addr_d @[el2_lsu_lsc_ctl.scala 146:42] + addrcheck.io.lsu_pkt_d.valid <= io.lsu_pkt_d.valid @[el2_lsu_lsc_ctl.scala 147:42] + addrcheck.io.lsu_pkt_d.store_data_bypass_m <= io.lsu_pkt_d.store_data_bypass_m @[el2_lsu_lsc_ctl.scala 147:42] + addrcheck.io.lsu_pkt_d.load_ldst_bypass_d <= io.lsu_pkt_d.load_ldst_bypass_d @[el2_lsu_lsc_ctl.scala 147:42] + addrcheck.io.lsu_pkt_d.store_data_bypass_d <= io.lsu_pkt_d.store_data_bypass_d @[el2_lsu_lsc_ctl.scala 147:42] + addrcheck.io.lsu_pkt_d.dma <= io.lsu_pkt_d.dma @[el2_lsu_lsc_ctl.scala 147:42] + addrcheck.io.lsu_pkt_d.unsign <= io.lsu_pkt_d.unsign @[el2_lsu_lsc_ctl.scala 147:42] + addrcheck.io.lsu_pkt_d.store <= io.lsu_pkt_d.store @[el2_lsu_lsc_ctl.scala 147:42] + addrcheck.io.lsu_pkt_d.load <= io.lsu_pkt_d.load @[el2_lsu_lsc_ctl.scala 147:42] + addrcheck.io.lsu_pkt_d.dword <= io.lsu_pkt_d.dword @[el2_lsu_lsc_ctl.scala 147:42] + addrcheck.io.lsu_pkt_d.word <= io.lsu_pkt_d.word @[el2_lsu_lsc_ctl.scala 147:42] + addrcheck.io.lsu_pkt_d.half <= io.lsu_pkt_d.half @[el2_lsu_lsc_ctl.scala 147:42] + addrcheck.io.lsu_pkt_d.by <= io.lsu_pkt_d.by @[el2_lsu_lsc_ctl.scala 147:42] + addrcheck.io.lsu_pkt_d.fast_int <= io.lsu_pkt_d.fast_int @[el2_lsu_lsc_ctl.scala 147:42] + addrcheck.io.dec_tlu_mrac_ff <= io.dec_tlu_mrac_ff @[el2_lsu_lsc_ctl.scala 148:42] + node _T_29 = bits(rs1_d, 31, 28) @[el2_lsu_lsc_ctl.scala 149:50] + addrcheck.io.rs1_region_d <= _T_29 @[el2_lsu_lsc_ctl.scala 149:42] + addrcheck.io.rs1_d <= rs1_d @[el2_lsu_lsc_ctl.scala 150:42] + io.is_sideeffects_m <= addrcheck.io.is_sideeffects_m @[el2_lsu_lsc_ctl.scala 151:42] + io.addr_in_dccm_d <= addrcheck.io.addr_in_dccm_d @[el2_lsu_lsc_ctl.scala 152:42] + io.addr_in_pic_d <= addrcheck.io.addr_in_pic_d @[el2_lsu_lsc_ctl.scala 153:42] + addrcheck.io.scan_mode <= io.scan_mode @[el2_lsu_lsc_ctl.scala 160:42] + wire access_fault_r : UInt<1> + access_fault_r <= UInt<1>("h00") + wire misaligned_fault_r : UInt<1> + misaligned_fault_r <= UInt<1>("h00") + wire exc_mscause_r : UInt<4> + exc_mscause_r <= UInt<4>("h00") + wire fir_dccm_access_error_r : UInt<1> + fir_dccm_access_error_r <= UInt<1>("h00") + wire fir_nondccm_access_error_r : UInt<1> + fir_nondccm_access_error_r <= UInt<1>("h00") + inst access_fault_mff of rvdff @[el2_lsu_lsc_ctl.scala 169:45] + access_fault_mff.clock <= clock + access_fault_mff.reset <= reset + inst misaligned_fault_mff of rvdff_1 @[el2_lsu_lsc_ctl.scala 171:45] + misaligned_fault_mff.clock <= clock + misaligned_fault_mff.reset <= reset + inst exc_mscause_mff of rvdff_2 @[el2_lsu_lsc_ctl.scala 173:45] + exc_mscause_mff.clock <= clock + exc_mscause_mff.reset <= reset + inst lsu_fir_error_rff of rvdff_3 @[el2_lsu_lsc_ctl.scala 177:45] + lsu_fir_error_rff.clock <= clock + lsu_fir_error_rff.reset <= reset + wire lsu_fir_error_m : UInt<2> + lsu_fir_error_m <= UInt<2>("h00") + wire access_fault_m : UInt<1> + access_fault_m <= UInt<1>("h00") + wire misaligned_fault_m : UInt<1> + misaligned_fault_m <= UInt<1>("h00") + wire exc_mscause_m : UInt<4> + exc_mscause_m <= UInt<4>("h00") + wire fir_dccm_access_error_m : UInt<1> + fir_dccm_access_error_m <= UInt<1>("h00") + wire fir_nondccm_access_error_m : UInt<1> + fir_nondccm_access_error_m <= UInt<1>("h00") + node _T_30 = or(access_fault_m, misaligned_fault_m) @[el2_lsu_lsc_ctl.scala 188:34] + io.lsu_exc_m <= _T_30 @[el2_lsu_lsc_ctl.scala 188:16] + node _T_31 = eq(io.lsu_double_ecc_error_r, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 189:64] + node _T_32 = and(io.lsu_single_ecc_error_r, _T_31) @[el2_lsu_lsc_ctl.scala 189:62] + node _T_33 = or(io.lsu_commit_r, io.lsu_pkt_r.dma) @[el2_lsu_lsc_ctl.scala 189:111] + node _T_34 = and(_T_32, _T_33) @[el2_lsu_lsc_ctl.scala 189:92] + node _T_35 = and(_T_34, io.lsu_pkt_r.valid) @[el2_lsu_lsc_ctl.scala 189:131] + io.lsu_single_ecc_error_incr <= _T_35 @[el2_lsu_lsc_ctl.scala 189:32] + io.lsu_fir_error <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 228:23] + node _T_36 = or(access_fault_m, misaligned_fault_m) @[el2_lsu_lsc_ctl.scala 230:50] + node _T_37 = or(_T_36, io.lsu_double_ecc_error_m) @[el2_lsu_lsc_ctl.scala 230:71] + node _T_38 = and(_T_37, io.lsu_pkt_m.valid) @[el2_lsu_lsc_ctl.scala 230:100] + node _T_39 = eq(io.lsu_pkt_m.dma, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 230:123] + node _T_40 = and(_T_38, _T_39) @[el2_lsu_lsc_ctl.scala 230:121] + node _T_41 = eq(io.lsu_pkt_m.fast_int, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 230:143] + node _T_42 = and(_T_40, _T_41) @[el2_lsu_lsc_ctl.scala 230:141] + node _T_43 = eq(io.flush_m_up, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 230:168] + node _T_44 = and(_T_42, _T_43) @[el2_lsu_lsc_ctl.scala 230:166] + lsu_error_pkt_m.exc_valid <= _T_44 @[el2_lsu_lsc_ctl.scala 230:31] + node _T_45 = eq(lsu_error_pkt_m.exc_valid, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 231:70] + node _T_46 = and(io.lsu_single_ecc_error_m, _T_45) @[el2_lsu_lsc_ctl.scala 231:68] + node _T_47 = eq(io.lsu_pkt_m.dma, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 231:100] + node _T_48 = and(_T_46, _T_47) @[el2_lsu_lsc_ctl.scala 231:98] + lsu_error_pkt_m.single_ecc_error <= _T_48 @[el2_lsu_lsc_ctl.scala 231:38] + lsu_error_pkt_m.inst_type <= io.lsu_pkt_m.store @[el2_lsu_lsc_ctl.scala 232:38] + node _T_49 = not(misaligned_fault_m) @[el2_lsu_lsc_ctl.scala 233:41] + lsu_error_pkt_m.exc_type <= _T_49 @[el2_lsu_lsc_ctl.scala 233:38] + node _T_50 = eq(misaligned_fault_m, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 234:74] + node _T_51 = and(io.lsu_double_ecc_error_m, _T_50) @[el2_lsu_lsc_ctl.scala 234:72] + node _T_52 = eq(access_fault_m, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 234:96] + node _T_53 = and(_T_51, _T_52) @[el2_lsu_lsc_ctl.scala 234:94] + node _T_54 = bits(_T_53, 0, 0) @[el2_lsu_lsc_ctl.scala 234:113] + node _T_55 = bits(exc_mscause_m, 3, 0) @[el2_lsu_lsc_ctl.scala 234:144] + node _T_56 = mux(_T_54, UInt<1>("h01"), _T_55) @[el2_lsu_lsc_ctl.scala 234:44] + lsu_error_pkt_m.mscause <= _T_56 @[el2_lsu_lsc_ctl.scala 234:38] + node _T_57 = bits(io.lsu_addr_m, 31, 0) @[el2_lsu_lsc_ctl.scala 235:54] + lsu_error_pkt_m.addr <= _T_57 @[el2_lsu_lsc_ctl.scala 235:38] + node _T_58 = bits(fir_nondccm_access_error_m, 0, 0) @[el2_lsu_lsc_ctl.scala 236:72] + node _T_59 = bits(fir_dccm_access_error_m, 0, 0) @[el2_lsu_lsc_ctl.scala 236:116] + node _T_60 = and(io.lsu_pkt_m.fast_int, io.lsu_double_ecc_error_m) @[el2_lsu_lsc_ctl.scala 236:159] + node _T_61 = bits(_T_60, 0, 0) @[el2_lsu_lsc_ctl.scala 236:188] + node _T_62 = mux(_T_61, UInt<1>("h01"), UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 236:135] + node _T_63 = mux(_T_59, UInt<2>("h02"), _T_62) @[el2_lsu_lsc_ctl.scala 236:91] + node _T_64 = mux(_T_58, UInt<2>("h03"), _T_63) @[el2_lsu_lsc_ctl.scala 236:44] + lsu_fir_error_m <= _T_64 @[el2_lsu_lsc_ctl.scala 236:38] + reg _T_65 : {exc_valid : UInt<1>, single_ecc_error : UInt<1>, inst_type : UInt<1>, exc_type : UInt<1>, mscause : UInt<4>, addr : UInt<32>}, clock @[el2_lsu_lsc_ctl.scala 241:34] + _T_65.addr <= lsu_error_pkt_m.addr @[el2_lsu_lsc_ctl.scala 241:34] + _T_65.mscause <= lsu_error_pkt_m.mscause @[el2_lsu_lsc_ctl.scala 241:34] + _T_65.exc_type <= lsu_error_pkt_m.exc_type @[el2_lsu_lsc_ctl.scala 241:34] + _T_65.inst_type <= lsu_error_pkt_m.inst_type @[el2_lsu_lsc_ctl.scala 241:34] + _T_65.single_ecc_error <= lsu_error_pkt_m.single_ecc_error @[el2_lsu_lsc_ctl.scala 241:34] + _T_65.exc_valid <= lsu_error_pkt_m.exc_valid @[el2_lsu_lsc_ctl.scala 241:34] + io.lsu_error_pkt_r.addr <= _T_65.addr @[el2_lsu_lsc_ctl.scala 241:24] + io.lsu_error_pkt_r.mscause <= _T_65.mscause @[el2_lsu_lsc_ctl.scala 241:24] + io.lsu_error_pkt_r.exc_type <= _T_65.exc_type @[el2_lsu_lsc_ctl.scala 241:24] + io.lsu_error_pkt_r.inst_type <= _T_65.inst_type @[el2_lsu_lsc_ctl.scala 241:24] + io.lsu_error_pkt_r.single_ecc_error <= _T_65.single_ecc_error @[el2_lsu_lsc_ctl.scala 241:24] + io.lsu_error_pkt_r.exc_valid <= _T_65.exc_valid @[el2_lsu_lsc_ctl.scala 241:24] + lsu_fir_error_rff.io.din <= lsu_fir_error_m @[el2_lsu_lsc_ctl.scala 243:41] + lsu_fir_error_m <= lsu_fir_error_rff.io.dout @[el2_lsu_lsc_ctl.scala 244:41] + access_fault_mff.io.din <= addrcheck.io.access_fault_d @[el2_lsu_lsc_ctl.scala 246:40] + access_fault_m <= access_fault_mff.io.dout @[el2_lsu_lsc_ctl.scala 247:40] + misaligned_fault_mff.io.din <= addrcheck.io.misaligned_fault_d @[el2_lsu_lsc_ctl.scala 249:40] + misaligned_fault_m <= misaligned_fault_mff.io.dout @[el2_lsu_lsc_ctl.scala 250:40] + exc_mscause_mff.io.din <= addrcheck.io.exc_mscause_d @[el2_lsu_lsc_ctl.scala 252:40] + exc_mscause_m <= exc_mscause_mff.io.dout @[el2_lsu_lsc_ctl.scala 253:40] + reg _T_66 : UInt, clock @[el2_lsu_lsc_ctl.scala 257:52] + _T_66 <= addrcheck.io.fir_dccm_access_error_d @[el2_lsu_lsc_ctl.scala 257:52] + fir_dccm_access_error_m <= _T_66 @[el2_lsu_lsc_ctl.scala 257:42] + reg _T_67 : UInt, clock @[el2_lsu_lsc_ctl.scala 260:54] + _T_67 <= addrcheck.io.fir_nondccm_access_error_d @[el2_lsu_lsc_ctl.scala 260:54] + fir_nondccm_access_error_m <= _T_67 @[el2_lsu_lsc_ctl.scala 260:44] + dma_pkt_d.unsign <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 263:22] + dma_pkt_d.fast_int <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 264:22] + dma_pkt_d.valid <= io.dma_dccm_req @[el2_lsu_lsc_ctl.scala 265:22] + dma_pkt_d.dma <= UInt<1>("h01") @[el2_lsu_lsc_ctl.scala 266:22] + dma_pkt_d.store <= io.dma_mem_write @[el2_lsu_lsc_ctl.scala 267:22] + node _T_68 = not(io.dma_mem_write) @[el2_lsu_lsc_ctl.scala 268:25] + dma_pkt_d.load <= _T_68 @[el2_lsu_lsc_ctl.scala 268:22] + node _T_69 = bits(io.dma_mem_sz, 2, 0) @[el2_lsu_lsc_ctl.scala 269:39] + node _T_70 = eq(_T_69, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 269:45] + dma_pkt_d.by <= _T_70 @[el2_lsu_lsc_ctl.scala 269:22] + node _T_71 = bits(io.dma_mem_sz, 2, 0) @[el2_lsu_lsc_ctl.scala 270:39] + node _T_72 = eq(_T_71, UInt<1>("h01")) @[el2_lsu_lsc_ctl.scala 270:45] + dma_pkt_d.half <= _T_72 @[el2_lsu_lsc_ctl.scala 270:22] + node _T_73 = bits(io.dma_mem_sz, 2, 0) @[el2_lsu_lsc_ctl.scala 271:39] + node _T_74 = eq(_T_73, UInt<2>("h02")) @[el2_lsu_lsc_ctl.scala 271:45] + dma_pkt_d.word <= _T_74 @[el2_lsu_lsc_ctl.scala 271:22] + node _T_75 = bits(io.dma_mem_sz, 2, 0) @[el2_lsu_lsc_ctl.scala 272:39] + node _T_76 = eq(_T_75, UInt<2>("h03")) @[el2_lsu_lsc_ctl.scala 272:45] + dma_pkt_d.dword <= _T_76 @[el2_lsu_lsc_ctl.scala 272:22] + dma_pkt_d.store_data_bypass_d <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 273:34] + dma_pkt_d.load_ldst_bypass_d <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 274:34] + dma_pkt_d.store_data_bypass_m <= UInt<1>("h00") @[el2_lsu_lsc_ctl.scala 275:34] + inst lsu_pkt_vldmff of rvdff_4 @[el2_lsu_lsc_ctl.scala 278:36] + lsu_pkt_vldmff.clock <= clock + lsu_pkt_vldmff.reset <= reset + inst lsu_pkt_vldrff of rvdff_5 @[el2_lsu_lsc_ctl.scala 279:36] + lsu_pkt_vldrff.clock <= clock + lsu_pkt_vldrff.reset <= reset + wire lsu_ld_datafn_r : UInt<32> + lsu_ld_datafn_r <= UInt<32>("h00") + wire lsu_ld_datafn_corr_r : UInt<32> + lsu_ld_datafn_corr_r <= UInt<32>("h00") + wire lsu_ld_datafn_m : UInt<32> + lsu_ld_datafn_m <= UInt<32>("h00") + node _T_77 = bits(io.dec_lsu_valid_raw_d, 0, 0) @[el2_lsu_lsc_ctl.scala 285:50] + node _T_78 = mux(_T_77, io.lsu_p, dma_pkt_d) @[el2_lsu_lsc_ctl.scala 285:26] + io.lsu_pkt_d.valid <= _T_78.valid @[el2_lsu_lsc_ctl.scala 285:20] + io.lsu_pkt_d.store_data_bypass_m <= _T_78.store_data_bypass_m @[el2_lsu_lsc_ctl.scala 285:20] + io.lsu_pkt_d.load_ldst_bypass_d <= _T_78.load_ldst_bypass_d @[el2_lsu_lsc_ctl.scala 285:20] + io.lsu_pkt_d.store_data_bypass_d <= _T_78.store_data_bypass_d @[el2_lsu_lsc_ctl.scala 285:20] + io.lsu_pkt_d.dma <= _T_78.dma @[el2_lsu_lsc_ctl.scala 285:20] + io.lsu_pkt_d.unsign <= _T_78.unsign @[el2_lsu_lsc_ctl.scala 285:20] + io.lsu_pkt_d.store <= _T_78.store @[el2_lsu_lsc_ctl.scala 285:20] + io.lsu_pkt_d.load <= _T_78.load @[el2_lsu_lsc_ctl.scala 285:20] + io.lsu_pkt_d.dword <= _T_78.dword @[el2_lsu_lsc_ctl.scala 285:20] + io.lsu_pkt_d.word <= _T_78.word @[el2_lsu_lsc_ctl.scala 285:20] + io.lsu_pkt_d.half <= _T_78.half @[el2_lsu_lsc_ctl.scala 285:20] + io.lsu_pkt_d.by <= _T_78.by @[el2_lsu_lsc_ctl.scala 285:20] + io.lsu_pkt_d.fast_int <= _T_78.fast_int @[el2_lsu_lsc_ctl.scala 285:20] + lsu_pkt_m_in.valid <= io.lsu_pkt_d.valid @[el2_lsu_lsc_ctl.scala 286:20] + lsu_pkt_m_in.store_data_bypass_m <= io.lsu_pkt_d.store_data_bypass_m @[el2_lsu_lsc_ctl.scala 286:20] + lsu_pkt_m_in.load_ldst_bypass_d <= io.lsu_pkt_d.load_ldst_bypass_d @[el2_lsu_lsc_ctl.scala 286:20] + lsu_pkt_m_in.store_data_bypass_d <= io.lsu_pkt_d.store_data_bypass_d @[el2_lsu_lsc_ctl.scala 286:20] + lsu_pkt_m_in.dma <= io.lsu_pkt_d.dma @[el2_lsu_lsc_ctl.scala 286:20] + lsu_pkt_m_in.unsign <= io.lsu_pkt_d.unsign @[el2_lsu_lsc_ctl.scala 286:20] + lsu_pkt_m_in.store <= io.lsu_pkt_d.store @[el2_lsu_lsc_ctl.scala 286:20] + lsu_pkt_m_in.load <= io.lsu_pkt_d.load @[el2_lsu_lsc_ctl.scala 286:20] + lsu_pkt_m_in.dword <= io.lsu_pkt_d.dword @[el2_lsu_lsc_ctl.scala 286:20] + lsu_pkt_m_in.word <= io.lsu_pkt_d.word @[el2_lsu_lsc_ctl.scala 286:20] + lsu_pkt_m_in.half <= io.lsu_pkt_d.half @[el2_lsu_lsc_ctl.scala 286:20] + lsu_pkt_m_in.by <= io.lsu_pkt_d.by @[el2_lsu_lsc_ctl.scala 286:20] + lsu_pkt_m_in.fast_int <= io.lsu_pkt_d.fast_int @[el2_lsu_lsc_ctl.scala 286:20] + lsu_pkt_r_in.valid <= io.lsu_pkt_m.valid @[el2_lsu_lsc_ctl.scala 287:20] + lsu_pkt_r_in.store_data_bypass_m <= io.lsu_pkt_m.store_data_bypass_m @[el2_lsu_lsc_ctl.scala 287:20] + lsu_pkt_r_in.load_ldst_bypass_d <= io.lsu_pkt_m.load_ldst_bypass_d @[el2_lsu_lsc_ctl.scala 287:20] + lsu_pkt_r_in.store_data_bypass_d <= io.lsu_pkt_m.store_data_bypass_d @[el2_lsu_lsc_ctl.scala 287:20] + lsu_pkt_r_in.dma <= io.lsu_pkt_m.dma @[el2_lsu_lsc_ctl.scala 287:20] + lsu_pkt_r_in.unsign <= io.lsu_pkt_m.unsign @[el2_lsu_lsc_ctl.scala 287:20] + lsu_pkt_r_in.store <= io.lsu_pkt_m.store @[el2_lsu_lsc_ctl.scala 287:20] + lsu_pkt_r_in.load <= io.lsu_pkt_m.load @[el2_lsu_lsc_ctl.scala 287:20] + lsu_pkt_r_in.dword <= io.lsu_pkt_m.dword @[el2_lsu_lsc_ctl.scala 287:20] + lsu_pkt_r_in.word <= io.lsu_pkt_m.word @[el2_lsu_lsc_ctl.scala 287:20] + lsu_pkt_r_in.half <= io.lsu_pkt_m.half @[el2_lsu_lsc_ctl.scala 287:20] + lsu_pkt_r_in.by <= io.lsu_pkt_m.by @[el2_lsu_lsc_ctl.scala 287:20] + lsu_pkt_r_in.fast_int <= io.lsu_pkt_m.fast_int @[el2_lsu_lsc_ctl.scala 287:20] + node _T_79 = eq(io.lsu_p.fast_int, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 289:64] + node _T_80 = and(io.flush_m_up, _T_79) @[el2_lsu_lsc_ctl.scala 289:61] + node _T_81 = eq(_T_80, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 289:45] + node _T_82 = and(io.lsu_p.valid, _T_81) @[el2_lsu_lsc_ctl.scala 289:43] + node _T_83 = or(_T_82, io.dma_dccm_req) @[el2_lsu_lsc_ctl.scala 289:85] + io.lsu_pkt_d.valid <= _T_83 @[el2_lsu_lsc_ctl.scala 289:24] + node _T_84 = eq(io.lsu_pkt_d.dma, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 290:68] + node _T_85 = and(io.flush_m_up, _T_84) @[el2_lsu_lsc_ctl.scala 290:65] + node _T_86 = eq(_T_85, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 290:49] + node _T_87 = and(io.lsu_pkt_d.valid, _T_86) @[el2_lsu_lsc_ctl.scala 290:47] + lsu_pkt_m_in.valid <= _T_87 @[el2_lsu_lsc_ctl.scala 290:24] + node _T_88 = eq(io.lsu_pkt_m.dma, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 291:68] + node _T_89 = and(io.flush_m_up, _T_88) @[el2_lsu_lsc_ctl.scala 291:65] + node _T_90 = eq(_T_89, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 291:49] + node _T_91 = and(io.lsu_pkt_m.valid, _T_90) @[el2_lsu_lsc_ctl.scala 291:47] + lsu_pkt_r_in.valid <= _T_91 @[el2_lsu_lsc_ctl.scala 291:24] + lsu_pkt_vldmff.io.din <= lsu_pkt_m_in.valid @[el2_lsu_lsc_ctl.scala 295:34] + io.lsu_pkt_m.valid <= lsu_pkt_vldmff.io.dout @[el2_lsu_lsc_ctl.scala 296:34] + lsu_pkt_vldrff.io.din <= lsu_pkt_r_in.valid @[el2_lsu_lsc_ctl.scala 299:33] + io.lsu_pkt_r.valid <= lsu_pkt_vldrff.io.dout @[el2_lsu_lsc_ctl.scala 300:33] + reg _T_92 : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, clock @[el2_lsu_lsc_ctl.scala 305:26] + _T_92.valid <= lsu_pkt_m_in.valid @[el2_lsu_lsc_ctl.scala 305:26] + _T_92.store_data_bypass_m <= lsu_pkt_m_in.store_data_bypass_m @[el2_lsu_lsc_ctl.scala 305:26] + _T_92.load_ldst_bypass_d <= lsu_pkt_m_in.load_ldst_bypass_d @[el2_lsu_lsc_ctl.scala 305:26] + _T_92.store_data_bypass_d <= lsu_pkt_m_in.store_data_bypass_d @[el2_lsu_lsc_ctl.scala 305:26] + _T_92.dma <= lsu_pkt_m_in.dma @[el2_lsu_lsc_ctl.scala 305:26] + _T_92.unsign <= lsu_pkt_m_in.unsign @[el2_lsu_lsc_ctl.scala 305:26] + _T_92.store <= lsu_pkt_m_in.store @[el2_lsu_lsc_ctl.scala 305:26] + _T_92.load <= lsu_pkt_m_in.load @[el2_lsu_lsc_ctl.scala 305:26] + _T_92.dword <= lsu_pkt_m_in.dword @[el2_lsu_lsc_ctl.scala 305:26] + _T_92.word <= lsu_pkt_m_in.word @[el2_lsu_lsc_ctl.scala 305:26] + _T_92.half <= lsu_pkt_m_in.half @[el2_lsu_lsc_ctl.scala 305:26] + _T_92.by <= lsu_pkt_m_in.by @[el2_lsu_lsc_ctl.scala 305:26] + _T_92.fast_int <= lsu_pkt_m_in.fast_int @[el2_lsu_lsc_ctl.scala 305:26] + io.lsu_pkt_m.valid <= _T_92.valid @[el2_lsu_lsc_ctl.scala 305:16] + io.lsu_pkt_m.store_data_bypass_m <= _T_92.store_data_bypass_m @[el2_lsu_lsc_ctl.scala 305:16] + io.lsu_pkt_m.load_ldst_bypass_d <= _T_92.load_ldst_bypass_d @[el2_lsu_lsc_ctl.scala 305:16] + io.lsu_pkt_m.store_data_bypass_d <= _T_92.store_data_bypass_d @[el2_lsu_lsc_ctl.scala 305:16] + io.lsu_pkt_m.dma <= _T_92.dma @[el2_lsu_lsc_ctl.scala 305:16] + io.lsu_pkt_m.unsign <= _T_92.unsign @[el2_lsu_lsc_ctl.scala 305:16] + io.lsu_pkt_m.store <= _T_92.store @[el2_lsu_lsc_ctl.scala 305:16] + io.lsu_pkt_m.load <= _T_92.load @[el2_lsu_lsc_ctl.scala 305:16] + io.lsu_pkt_m.dword <= _T_92.dword @[el2_lsu_lsc_ctl.scala 305:16] + io.lsu_pkt_m.word <= _T_92.word @[el2_lsu_lsc_ctl.scala 305:16] + io.lsu_pkt_m.half <= _T_92.half @[el2_lsu_lsc_ctl.scala 305:16] + io.lsu_pkt_m.by <= _T_92.by @[el2_lsu_lsc_ctl.scala 305:16] + io.lsu_pkt_m.fast_int <= _T_92.fast_int @[el2_lsu_lsc_ctl.scala 305:16] + reg _T_93 : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, clock @[el2_lsu_lsc_ctl.scala 310:26] + _T_93.valid <= lsu_pkt_r_in.valid @[el2_lsu_lsc_ctl.scala 310:26] + _T_93.store_data_bypass_m <= lsu_pkt_r_in.store_data_bypass_m @[el2_lsu_lsc_ctl.scala 310:26] + _T_93.load_ldst_bypass_d <= lsu_pkt_r_in.load_ldst_bypass_d @[el2_lsu_lsc_ctl.scala 310:26] + _T_93.store_data_bypass_d <= lsu_pkt_r_in.store_data_bypass_d @[el2_lsu_lsc_ctl.scala 310:26] + _T_93.dma <= lsu_pkt_r_in.dma @[el2_lsu_lsc_ctl.scala 310:26] + _T_93.unsign <= lsu_pkt_r_in.unsign @[el2_lsu_lsc_ctl.scala 310:26] + _T_93.store <= lsu_pkt_r_in.store @[el2_lsu_lsc_ctl.scala 310:26] + _T_93.load <= lsu_pkt_r_in.load @[el2_lsu_lsc_ctl.scala 310:26] + _T_93.dword <= lsu_pkt_r_in.dword @[el2_lsu_lsc_ctl.scala 310:26] + _T_93.word <= lsu_pkt_r_in.word @[el2_lsu_lsc_ctl.scala 310:26] + _T_93.half <= lsu_pkt_r_in.half @[el2_lsu_lsc_ctl.scala 310:26] + _T_93.by <= lsu_pkt_r_in.by @[el2_lsu_lsc_ctl.scala 310:26] + _T_93.fast_int <= lsu_pkt_r_in.fast_int @[el2_lsu_lsc_ctl.scala 310:26] + io.lsu_pkt_r.valid <= _T_93.valid @[el2_lsu_lsc_ctl.scala 310:16] + io.lsu_pkt_r.store_data_bypass_m <= _T_93.store_data_bypass_m @[el2_lsu_lsc_ctl.scala 310:16] + io.lsu_pkt_r.load_ldst_bypass_d <= _T_93.load_ldst_bypass_d @[el2_lsu_lsc_ctl.scala 310:16] + io.lsu_pkt_r.store_data_bypass_d <= _T_93.store_data_bypass_d @[el2_lsu_lsc_ctl.scala 310:16] + io.lsu_pkt_r.dma <= _T_93.dma @[el2_lsu_lsc_ctl.scala 310:16] + io.lsu_pkt_r.unsign <= _T_93.unsign @[el2_lsu_lsc_ctl.scala 310:16] + io.lsu_pkt_r.store <= _T_93.store @[el2_lsu_lsc_ctl.scala 310:16] + io.lsu_pkt_r.load <= _T_93.load @[el2_lsu_lsc_ctl.scala 310:16] + io.lsu_pkt_r.dword <= _T_93.dword @[el2_lsu_lsc_ctl.scala 310:16] + io.lsu_pkt_r.word <= _T_93.word @[el2_lsu_lsc_ctl.scala 310:16] + io.lsu_pkt_r.half <= _T_93.half @[el2_lsu_lsc_ctl.scala 310:16] + io.lsu_pkt_r.by <= _T_93.by @[el2_lsu_lsc_ctl.scala 310:16] + io.lsu_pkt_r.fast_int <= _T_93.fast_int @[el2_lsu_lsc_ctl.scala 310:16] + node _T_94 = bits(io.dma_mem_wdata, 63, 0) @[el2_lsu_lsc_ctl.scala 326:47] + node _T_95 = bits(io.dma_mem_addr, 2, 0) @[el2_lsu_lsc_ctl.scala 326:76] + node _T_96 = cat(_T_95, UInt<1>("h00")) @[Cat.scala 29:58] + node dma_mem_wdata_shifted = dshr(_T_94, _T_96) @[el2_lsu_lsc_ctl.scala 326:54] + node _T_97 = bits(io.dma_dccm_req, 0, 0) @[el2_lsu_lsc_ctl.scala 328:51] + node _T_98 = bits(dma_mem_wdata_shifted, 31, 0) @[el2_lsu_lsc_ctl.scala 328:79] + node _T_99 = bits(io.exu_lsu_rs2_d, 31, 0) @[el2_lsu_lsc_ctl.scala 328:102] + node store_data_d = mux(_T_97, _T_98, _T_99) @[el2_lsu_lsc_ctl.scala 328:34] + node _T_100 = bits(io.lsu_pkt_d.store_data_bypass_d, 0, 0) @[el2_lsu_lsc_ctl.scala 330:68] + node _T_101 = bits(io.lsu_result_m, 31, 0) @[el2_lsu_lsc_ctl.scala 330:90] + node _T_102 = bits(store_data_d, 31, 0) @[el2_lsu_lsc_ctl.scala 330:109] + node store_data_m_in = mux(_T_100, _T_101, _T_102) @[el2_lsu_lsc_ctl.scala 330:34] + inst sdmff of rvdff_6 @[el2_lsu_lsc_ctl.scala 333:20] + sdmff.clock <= clock + sdmff.reset <= reset + sdmff.io.din <= store_data_m_in @[el2_lsu_lsc_ctl.scala 334:27] + inst samff of rvdff_7 @[el2_lsu_lsc_ctl.scala 337:20] + samff.clock <= clock + samff.reset <= reset + samff.io.din <= io.lsu_addr_d @[el2_lsu_lsc_ctl.scala 338:23] + io.lsu_addr_m <= samff.io.dout @[el2_lsu_lsc_ctl.scala 339:26] + inst sarff of rvdff_8 @[el2_lsu_lsc_ctl.scala 341:20] + sarff.clock <= clock + sarff.reset <= reset + sarff.io.din <= io.lsu_addr_m @[el2_lsu_lsc_ctl.scala 342:23] + io.lsu_addr_r <= sarff.io.dout @[el2_lsu_lsc_ctl.scala 343:23] + inst end_addr_mff of rvdff_9 @[el2_lsu_lsc_ctl.scala 345:28] + end_addr_mff.clock <= clock + end_addr_mff.reset <= reset + end_addr_mff.io.din <= io.end_addr_d @[el2_lsu_lsc_ctl.scala 346:26] + io.end_addr_m <= end_addr_mff.io.dout @[el2_lsu_lsc_ctl.scala 347:26] + inst end_addr_rff of rvdff_10 @[el2_lsu_lsc_ctl.scala 349:28] + end_addr_rff.clock <= clock + end_addr_rff.reset <= reset + end_addr_rff.io.din <= io.end_addr_m @[el2_lsu_lsc_ctl.scala 350:26] + io.end_addr_r <= end_addr_rff.io.dout @[el2_lsu_lsc_ctl.scala 351:26] + inst addr_in_dccm_mff of rvdff_11 @[el2_lsu_lsc_ctl.scala 353:36] + addr_in_dccm_mff.clock <= clock + addr_in_dccm_mff.reset <= reset + addr_in_dccm_mff.io.din <= io.addr_in_dccm_d @[el2_lsu_lsc_ctl.scala 354:27] + io.addr_in_dccm_m <= addr_in_dccm_mff.io.dout @[el2_lsu_lsc_ctl.scala 355:27] + inst addr_in_dccm_rff of rvdff_12 @[el2_lsu_lsc_ctl.scala 357:37] + addr_in_dccm_rff.clock <= clock + addr_in_dccm_rff.reset <= reset + addr_in_dccm_rff.io.din <= io.addr_in_dccm_m @[el2_lsu_lsc_ctl.scala 358:28] + io.addr_in_dccm_r <= addr_in_dccm_rff.io.dout @[el2_lsu_lsc_ctl.scala 359:28] + inst addr_in_pic_mff of rvdff_13 @[el2_lsu_lsc_ctl.scala 361:37] + addr_in_pic_mff.clock <= clock + addr_in_pic_mff.reset <= reset + addr_in_pic_mff.io.din <= io.addr_in_pic_d @[el2_lsu_lsc_ctl.scala 362:27] + io.addr_in_pic_m <= addr_in_pic_mff.io.dout @[el2_lsu_lsc_ctl.scala 363:27] + inst addr_in_pic_rff of rvdff_14 @[el2_lsu_lsc_ctl.scala 365:37] + addr_in_pic_rff.clock <= clock + addr_in_pic_rff.reset <= reset + addr_in_pic_rff.io.din <= io.addr_in_pic_m @[el2_lsu_lsc_ctl.scala 366:27] + io.addr_in_pic_r <= addr_in_pic_rff.io.dout @[el2_lsu_lsc_ctl.scala 367:27] + inst addr_external_mff of rvdff_15 @[el2_lsu_lsc_ctl.scala 369:37] + addr_external_mff.clock <= clock + addr_external_mff.reset <= reset + addr_external_mff.io.din <= addrcheck.io.addr_external_d @[el2_lsu_lsc_ctl.scala 370:28] + io.addr_external_m <= addr_external_mff.io.dout @[el2_lsu_lsc_ctl.scala 371:28] + inst addr_external_rff of rvdff_16 @[el2_lsu_lsc_ctl.scala 373:37] + addr_external_rff.clock <= clock + addr_external_rff.reset <= reset + addr_external_rff.io.din <= io.addr_external_m @[el2_lsu_lsc_ctl.scala 374:28] + inst bus_read_data_r_ff of rvdff_17 @[el2_lsu_lsc_ctl.scala 377:38] + bus_read_data_r_ff.clock <= clock + bus_read_data_r_ff.reset <= reset + bus_read_data_r_ff.io.din <= io.bus_read_data_m @[el2_lsu_lsc_ctl.scala 378:29] + node _T_103 = bits(io.lsu_ld_data_corr_r, 31, 0) @[el2_lsu_lsc_ctl.scala 384:52] + io.lsu_fir_addr <= _T_103 @[el2_lsu_lsc_ctl.scala 384:28] + io.lsu_addr_d <= lsadder.io.dout @[el2_lsu_lsc_ctl.scala 387:28] + node _T_104 = or(io.lsu_pkt_r.store, io.lsu_pkt_r.load) @[el2_lsu_lsc_ctl.scala 391:63] + node _T_105 = and(io.lsu_pkt_r.valid, _T_104) @[el2_lsu_lsc_ctl.scala 391:41] + node _T_106 = eq(io.flush_r, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 391:86] + node _T_107 = and(_T_105, _T_106) @[el2_lsu_lsc_ctl.scala 391:84] + node _T_108 = eq(io.lsu_pkt_r.dma, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 391:100] + node _T_109 = and(_T_107, _T_108) @[el2_lsu_lsc_ctl.scala 391:98] + io.lsu_commit_r <= _T_109 @[el2_lsu_lsc_ctl.scala 391:19] + node _T_110 = bits(io.picm_mask_data_m, 31, 0) @[el2_lsu_lsc_ctl.scala 394:52] + node _T_111 = eq(io.addr_in_pic_m, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 394:69] + node _T_112 = bits(_T_111, 0, 0) @[Bitwise.scala 72:15] + node _T_113 = mux(_T_112, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_114 = or(_T_110, _T_113) @[el2_lsu_lsc_ctl.scala 394:59] + node _T_115 = bits(io.lsu_pkt_m.store_data_bypass_m, 0, 0) @[el2_lsu_lsc_ctl.scala 394:128] + node _T_116 = mux(_T_115, io.lsu_result_m, sdmff.io.dout) @[el2_lsu_lsc_ctl.scala 394:94] + node _T_117 = and(_T_114, _T_116) @[el2_lsu_lsc_ctl.scala 394:89] + io.store_data_m <= _T_117 @[el2_lsu_lsc_ctl.scala 394:29] + node _T_118 = bits(io.addr_external_m, 0, 0) @[el2_lsu_lsc_ctl.scala 425:53] + node _T_119 = mux(_T_118, io.bus_read_data_m, io.lsu_ld_data_m) @[el2_lsu_lsc_ctl.scala 425:33] + lsu_ld_datafn_m <= _T_119 @[el2_lsu_lsc_ctl.scala 425:27] + node _T_120 = bits(addr_external_rff.io.dout, 0, 0) @[el2_lsu_lsc_ctl.scala 426:50] + node _T_121 = mux(_T_120, bus_read_data_r_ff.io.dout, io.lsu_ld_data_corr_r) @[el2_lsu_lsc_ctl.scala 426:33] + lsu_ld_datafn_corr_r <= _T_121 @[el2_lsu_lsc_ctl.scala 426:27] + node _T_122 = and(io.lsu_pkt_r.unsign, io.lsu_pkt_r.by) @[el2_lsu_lsc_ctl.scala 429:61] + node _T_123 = bits(_T_122, 0, 0) @[Bitwise.scala 72:15] + node _T_124 = mux(_T_123, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_125 = bits(lsu_ld_datafn_m, 7, 0) @[el2_lsu_lsc_ctl.scala 429:117] + node _T_126 = cat(UInt<1>("h00"), _T_125) @[Cat.scala 29:58] + node _T_127 = and(_T_124, _T_126) @[el2_lsu_lsc_ctl.scala 429:84] + node _T_128 = and(io.lsu_pkt_r.unsign, io.lsu_pkt_r.half) @[el2_lsu_lsc_ctl.scala 430:38] + node _T_129 = bits(_T_128, 0, 0) @[Bitwise.scala 72:15] + node _T_130 = mux(_T_129, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_131 = bits(lsu_ld_datafn_m, 15, 0) @[el2_lsu_lsc_ctl.scala 430:92] + node _T_132 = cat(UInt<1>("h00"), _T_131) @[Cat.scala 29:58] + node _T_133 = and(_T_130, _T_132) @[el2_lsu_lsc_ctl.scala 430:61] + node _T_134 = or(_T_127, _T_133) @[el2_lsu_lsc_ctl.scala 429:125] + node _T_135 = eq(io.lsu_pkt_r.unsign, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 431:17] + node _T_136 = and(_T_135, io.lsu_pkt_r.by) @[el2_lsu_lsc_ctl.scala 431:38] + node _T_137 = bits(_T_136, 0, 0) @[Bitwise.scala 72:15] + node _T_138 = mux(_T_137, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_139 = bits(lsu_ld_datafn_m, 7, 7) @[el2_lsu_lsc_ctl.scala 431:92] + node _T_140 = bits(_T_139, 0, 0) @[Bitwise.scala 72:15] + node _T_141 = mux(_T_140, UInt<24>("h0ffffff"), UInt<24>("h00")) @[Bitwise.scala 72:12] + node _T_142 = bits(lsu_ld_datafn_m, 7, 0) @[el2_lsu_lsc_ctl.scala 431:115] + node _T_143 = cat(_T_141, _T_142) @[Cat.scala 29:58] + node _T_144 = and(_T_138, _T_143) @[el2_lsu_lsc_ctl.scala 431:61] + node _T_145 = or(_T_134, _T_144) @[el2_lsu_lsc_ctl.scala 430:104] + node _T_146 = eq(io.lsu_pkt_r.unsign, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 432:17] + node _T_147 = and(_T_146, io.lsu_pkt_r.half) @[el2_lsu_lsc_ctl.scala 432:38] + node _T_148 = bits(_T_147, 0, 0) @[Bitwise.scala 72:15] + node _T_149 = mux(_T_148, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_150 = bits(lsu_ld_datafn_m, 15, 15) @[el2_lsu_lsc_ctl.scala 432:91] + node _T_151 = bits(_T_150, 0, 0) @[Bitwise.scala 72:15] + node _T_152 = mux(_T_151, UInt<16>("h0ffff"), UInt<16>("h00")) @[Bitwise.scala 72:12] + node _T_153 = bits(lsu_ld_datafn_m, 15, 0) @[el2_lsu_lsc_ctl.scala 432:115] + node _T_154 = cat(_T_152, _T_153) @[Cat.scala 29:58] + node _T_155 = and(_T_149, _T_154) @[el2_lsu_lsc_ctl.scala 432:61] + node _T_156 = or(_T_145, _T_155) @[el2_lsu_lsc_ctl.scala 431:124] + node _T_157 = bits(io.lsu_pkt_r.word, 0, 0) @[Bitwise.scala 72:15] + node _T_158 = mux(_T_157, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_159 = bits(lsu_ld_datafn_m, 31, 0) @[el2_lsu_lsc_ctl.scala 433:55] + node _T_160 = and(_T_158, _T_159) @[el2_lsu_lsc_ctl.scala 433:38] + node _T_161 = or(_T_156, _T_160) @[el2_lsu_lsc_ctl.scala 432:124] + io.lsu_result_m <= _T_161 @[el2_lsu_lsc_ctl.scala 429:27] + node _T_162 = and(io.lsu_pkt_r.unsign, io.lsu_pkt_r.by) @[el2_lsu_lsc_ctl.scala 436:61] + node _T_163 = bits(_T_162, 0, 0) @[Bitwise.scala 72:15] + node _T_164 = mux(_T_163, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_165 = bits(lsu_ld_datafn_corr_r, 7, 0) @[el2_lsu_lsc_ctl.scala 436:122] + node _T_166 = cat(UInt<1>("h00"), _T_165) @[Cat.scala 29:58] + node _T_167 = and(_T_164, _T_166) @[el2_lsu_lsc_ctl.scala 436:84] + node _T_168 = and(io.lsu_pkt_r.unsign, io.lsu_pkt_r.half) @[el2_lsu_lsc_ctl.scala 437:38] + node _T_169 = bits(_T_168, 0, 0) @[Bitwise.scala 72:15] + node _T_170 = mux(_T_169, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_171 = bits(lsu_ld_datafn_corr_r, 15, 0) @[el2_lsu_lsc_ctl.scala 437:97] + node _T_172 = cat(UInt<1>("h00"), _T_171) @[Cat.scala 29:58] + node _T_173 = and(_T_170, _T_172) @[el2_lsu_lsc_ctl.scala 437:61] + node _T_174 = or(_T_167, _T_173) @[el2_lsu_lsc_ctl.scala 436:130] + node _T_175 = eq(io.lsu_pkt_r.unsign, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 438:17] + node _T_176 = and(_T_175, io.lsu_pkt_r.by) @[el2_lsu_lsc_ctl.scala 438:38] + node _T_177 = bits(_T_176, 0, 0) @[Bitwise.scala 72:15] + node _T_178 = mux(_T_177, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_179 = bits(lsu_ld_datafn_corr_r, 7, 7) @[el2_lsu_lsc_ctl.scala 438:97] + node _T_180 = bits(_T_179, 0, 0) @[Bitwise.scala 72:15] + node _T_181 = mux(_T_180, UInt<24>("h0ffffff"), UInt<24>("h00")) @[Bitwise.scala 72:12] + node _T_182 = bits(lsu_ld_datafn_corr_r, 7, 0) @[el2_lsu_lsc_ctl.scala 438:125] + node _T_183 = cat(_T_181, _T_182) @[Cat.scala 29:58] + node _T_184 = and(_T_178, _T_183) @[el2_lsu_lsc_ctl.scala 438:61] + node _T_185 = or(_T_174, _T_184) @[el2_lsu_lsc_ctl.scala 437:109] + node _T_186 = eq(io.lsu_pkt_r.unsign, UInt<1>("h00")) @[el2_lsu_lsc_ctl.scala 439:17] + node _T_187 = and(_T_186, io.lsu_pkt_r.half) @[el2_lsu_lsc_ctl.scala 439:38] + node _T_188 = bits(_T_187, 0, 0) @[Bitwise.scala 72:15] + node _T_189 = mux(_T_188, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_190 = bits(lsu_ld_datafn_corr_r, 15, 15) @[el2_lsu_lsc_ctl.scala 439:96] + node _T_191 = bits(_T_190, 0, 0) @[Bitwise.scala 72:15] + node _T_192 = mux(_T_191, UInt<16>("h0ffff"), UInt<16>("h00")) @[Bitwise.scala 72:12] + node _T_193 = bits(lsu_ld_datafn_corr_r, 15, 0) @[el2_lsu_lsc_ctl.scala 439:125] + node _T_194 = cat(_T_192, _T_193) @[Cat.scala 29:58] + node _T_195 = and(_T_189, _T_194) @[el2_lsu_lsc_ctl.scala 439:61] + node _T_196 = or(_T_185, _T_195) @[el2_lsu_lsc_ctl.scala 438:134] + node _T_197 = bits(io.lsu_pkt_r.word, 0, 0) @[Bitwise.scala 72:15] + node _T_198 = mux(_T_197, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_199 = bits(lsu_ld_datafn_corr_r, 31, 0) @[el2_lsu_lsc_ctl.scala 440:60] + node _T_200 = and(_T_198, _T_199) @[el2_lsu_lsc_ctl.scala 440:38] + node _T_201 = or(_T_196, _T_200) @[el2_lsu_lsc_ctl.scala 439:134] + io.lsu_result_corr_r <= _T_201 @[el2_lsu_lsc_ctl.scala 436:27] + diff --git a/el2_lsu_lsc_ctl.v b/el2_lsu_lsc_ctl.v new file mode 100644 index 00000000..412d1617 --- /dev/null +++ b/el2_lsu_lsc_ctl.v @@ -0,0 +1,1230 @@ +module rvlsadder( + input [31:0] io_rs1, + input [11:0] io_offset, + output [31:0] io_dout +); + wire [12:0] _T_1 = {1'h0,io_rs1[11:0]}; // @[Cat.scala 29:58] + wire [12:0] _T_3 = {1'h0,io_offset}; // @[Cat.scala 29:58] + wire [12:0] w1 = _T_1 + _T_3; // @[beh_lib.scala 47:38] + wire _T_7 = io_offset[11] ^ w1[12]; // @[beh_lib.scala 49:47] + wire _T_8 = ~_T_7; // @[beh_lib.scala 49:31] + wire [19:0] _T_10 = _T_8 ? 20'hfffff : 20'h0; // @[Bitwise.scala 72:12] + wire [19:0] _T_12 = _T_10 & io_rs1[31:12]; // @[beh_lib.scala 49:59] + wire _T_14 = ~io_offset[11]; // @[beh_lib.scala 50:16] + wire _T_16 = _T_14 ^ w1[12]; // @[beh_lib.scala 50:31] + wire [19:0] _T_18 = _T_16 ? 20'hfffff : 20'h0; // @[Bitwise.scala 72:12] + wire [19:0] _T_21 = io_rs1[31:12] + 20'h1; // @[beh_lib.scala 50:58] + wire [19:0] _T_22 = _T_18 & _T_21; // @[beh_lib.scala 50:42] + wire [19:0] _T_23 = _T_12 | _T_22; // @[beh_lib.scala 49:76] + wire _T_26 = ~w1[12]; // @[beh_lib.scala 51:32] + wire _T_27 = io_offset[11] ^ _T_26; // @[beh_lib.scala 51:30] + wire [19:0] _T_29 = _T_27 ? 20'hfffff : 20'h0; // @[Bitwise.scala 72:12] + wire [19:0] _T_32 = io_rs1[31:12] - 20'h1; // @[beh_lib.scala 51:58] + wire [19:0] _T_33 = _T_29 & _T_32; // @[beh_lib.scala 51:42] + wire [19:0] dout_upper = _T_23 | _T_33; // @[beh_lib.scala 50:65] + assign io_dout = {dout_upper,w1[11:0]}; // @[beh_lib.scala 53:11] +endmodule +module rvrangecheck( + input [31:0] io_addr, + output io_in_range, + output io_in_region +); + assign io_in_range = io_addr[31:16] == 16'hf004; // @[beh_lib.scala 117:19] + assign io_in_region = io_addr[31:28] == 4'hf; // @[beh_lib.scala 113:19] +endmodule +module rvrangecheck_2( + input [31:0] io_addr, + output io_in_range, + output io_in_region +); + assign io_in_range = io_addr[31:15] == 17'h1e018; // @[beh_lib.scala 117:19] + assign io_in_region = io_addr[31:28] == 4'hf; // @[beh_lib.scala 113:19] +endmodule +module el2_lsu_addrcheck( + input reset, + input io_lsu_c2_m_clk, + input [31:0] io_start_addr_d, + input [31:0] io_end_addr_d, + input io_lsu_pkt_d_by, + input io_lsu_pkt_d_half, + input io_lsu_pkt_d_word, + input io_lsu_pkt_d_load, + input io_lsu_pkt_d_store, + input io_lsu_pkt_d_dma, + input io_lsu_pkt_d_valid, + input [31:0] io_dec_tlu_mrac_ff, + input [3:0] io_rs1_region_d, + output io_is_sideeffects_m, + output io_addr_in_dccm_d, + output io_addr_in_pic_d, + output io_addr_external_d, + output io_access_fault_d, + output io_misaligned_fault_d, + output [3:0] io_exc_mscause_d +); +`ifdef RANDOMIZE_REG_INIT + reg [31:0] _RAND_0; +`endif // RANDOMIZE_REG_INIT + wire [31:0] rvrangecheck_io_addr; // @[el2_lsu_addrcheck.scala 45:44] + wire rvrangecheck_io_in_range; // @[el2_lsu_addrcheck.scala 45:44] + wire rvrangecheck_io_in_region; // @[el2_lsu_addrcheck.scala 45:44] + wire [31:0] rvrangecheck_1_io_addr; // @[el2_lsu_addrcheck.scala 51:44] + wire rvrangecheck_1_io_in_range; // @[el2_lsu_addrcheck.scala 51:44] + wire rvrangecheck_1_io_in_region; // @[el2_lsu_addrcheck.scala 51:44] + wire [31:0] start_addr_pic_rangecheck_io_addr; // @[el2_lsu_addrcheck.scala 74:41] + wire start_addr_pic_rangecheck_io_in_range; // @[el2_lsu_addrcheck.scala 74:41] + wire start_addr_pic_rangecheck_io_in_region; // @[el2_lsu_addrcheck.scala 74:41] + wire [31:0] end_addr_pic_rangecheck_io_addr; // @[el2_lsu_addrcheck.scala 80:39] + wire end_addr_pic_rangecheck_io_in_range; // @[el2_lsu_addrcheck.scala 80:39] + wire end_addr_pic_rangecheck_io_in_region; // @[el2_lsu_addrcheck.scala 80:39] + wire addr_in_iccm = io_start_addr_d[31:28] == 4'he; // @[el2_lsu_addrcheck.scala 65:45] + wire start_addr_in_dccm_region_d = rvrangecheck_io_in_region; // @[el2_lsu_addrcheck.scala 48:41] + wire start_addr_dccm_or_pic = start_addr_in_dccm_region_d | start_addr_pic_rangecheck_io_in_region; // @[el2_lsu_addrcheck.scala 85:60] + wire _T_5 = io_rs1_region_d == 4'hf; // @[el2_lsu_addrcheck.scala 86:54] + wire base_reg_dccm_or_pic = _T_5 | _T_5; // @[el2_lsu_addrcheck.scala 86:74] + wire start_addr_in_dccm_d = rvrangecheck_io_in_range; // @[el2_lsu_addrcheck.scala 47:41] + wire end_addr_in_dccm_d = rvrangecheck_1_io_in_range; // @[el2_lsu_addrcheck.scala 53:41] + wire [4:0] csr_idx = {io_start_addr_d[31:28],1'h1}; // @[Cat.scala 29:58] + wire [31:0] _T_13 = io_dec_tlu_mrac_ff >> csr_idx; // @[el2_lsu_addrcheck.scala 92:50] + wire _T_16 = start_addr_dccm_or_pic | addr_in_iccm; // @[el2_lsu_addrcheck.scala 92:121] + wire _T_17 = ~_T_16; // @[el2_lsu_addrcheck.scala 92:62] + wire _T_18 = _T_13[0] & _T_17; // @[el2_lsu_addrcheck.scala 92:60] + wire _T_19 = _T_18 & io_lsu_pkt_d_valid; // @[el2_lsu_addrcheck.scala 92:137] + wire _T_20 = io_lsu_pkt_d_store | io_lsu_pkt_d_load; // @[el2_lsu_addrcheck.scala 92:180] + wire is_sideeffects_d = _T_19 & _T_20; // @[el2_lsu_addrcheck.scala 92:158] + wire _T_22 = io_start_addr_d[1:0] == 2'h0; // @[el2_lsu_addrcheck.scala 93:75] + wire _T_23 = io_lsu_pkt_d_word & _T_22; // @[el2_lsu_addrcheck.scala 93:51] + wire _T_25 = ~io_start_addr_d[0]; // @[el2_lsu_addrcheck.scala 93:128] + wire _T_26 = io_lsu_pkt_d_half & _T_25; // @[el2_lsu_addrcheck.scala 93:106] + wire _T_27 = _T_23 | _T_26; // @[el2_lsu_addrcheck.scala 93:85] + wire is_aligned_d = _T_27 | io_lsu_pkt_d_by; // @[el2_lsu_addrcheck.scala 93:138] + wire [31:0] _T_38 = io_start_addr_d | 32'h7fffffff; // @[el2_lsu_addrcheck.scala 98:57] + wire _T_40 = _T_38 == 32'h7fffffff; // @[el2_lsu_addrcheck.scala 98:82] + wire [31:0] _T_43 = io_start_addr_d | 32'h3fffffff; // @[el2_lsu_addrcheck.scala 99:57] + wire _T_45 = _T_43 == 32'hffffffff; // @[el2_lsu_addrcheck.scala 99:82] + wire _T_47 = _T_40 | _T_45; // @[el2_lsu_addrcheck.scala 98:133] + wire [31:0] _T_49 = io_start_addr_d | 32'h1fffffff; // @[el2_lsu_addrcheck.scala 100:57] + wire _T_51 = _T_49 == 32'hbfffffff; // @[el2_lsu_addrcheck.scala 100:82] + wire _T_53 = _T_47 | _T_51; // @[el2_lsu_addrcheck.scala 99:133] + wire [31:0] _T_55 = io_start_addr_d | 32'hfffffff; // @[el2_lsu_addrcheck.scala 101:57] + wire _T_57 = _T_55 == 32'h8fffffff; // @[el2_lsu_addrcheck.scala 101:82] + wire _T_59 = _T_53 | _T_57; // @[el2_lsu_addrcheck.scala 100:133] + wire [31:0] _T_85 = io_end_addr_d | 32'h7fffffff; // @[el2_lsu_addrcheck.scala 107:58] + wire _T_87 = _T_85 == 32'h7fffffff; // @[el2_lsu_addrcheck.scala 107:83] + wire [31:0] _T_90 = io_end_addr_d | 32'h3fffffff; // @[el2_lsu_addrcheck.scala 108:59] + wire _T_92 = _T_90 == 32'hffffffff; // @[el2_lsu_addrcheck.scala 108:84] + wire _T_94 = _T_87 | _T_92; // @[el2_lsu_addrcheck.scala 107:134] + wire [31:0] _T_96 = io_end_addr_d | 32'h1fffffff; // @[el2_lsu_addrcheck.scala 109:59] + wire _T_98 = _T_96 == 32'hbfffffff; // @[el2_lsu_addrcheck.scala 109:84] + wire _T_100 = _T_94 | _T_98; // @[el2_lsu_addrcheck.scala 108:135] + wire [31:0] _T_102 = io_end_addr_d | 32'hfffffff; // @[el2_lsu_addrcheck.scala 110:59] + wire _T_104 = _T_102 == 32'h8fffffff; // @[el2_lsu_addrcheck.scala 110:84] + wire _T_106 = _T_100 | _T_104; // @[el2_lsu_addrcheck.scala 109:135] + wire non_dccm_access_ok = _T_59 & _T_106; // @[el2_lsu_addrcheck.scala 106:7] + wire regpred_access_fault_d = start_addr_dccm_or_pic ^ base_reg_dccm_or_pic; // @[el2_lsu_addrcheck.scala 116:57] + wire _T_133 = io_start_addr_d[1:0] != 2'h0; // @[el2_lsu_addrcheck.scala 117:76] + wire _T_134 = ~io_lsu_pkt_d_word; // @[el2_lsu_addrcheck.scala 117:92] + wire _T_135 = _T_133 | _T_134; // @[el2_lsu_addrcheck.scala 117:90] + wire picm_access_fault_d = io_addr_in_pic_d & _T_135; // @[el2_lsu_addrcheck.scala 117:51] + wire _T_136 = start_addr_in_dccm_d | start_addr_pic_rangecheck_io_in_range; // @[el2_lsu_addrcheck.scala 122:87] + wire _T_137 = ~_T_136; // @[el2_lsu_addrcheck.scala 122:64] + wire _T_138 = start_addr_in_dccm_region_d & _T_137; // @[el2_lsu_addrcheck.scala 122:62] + wire _T_139 = end_addr_in_dccm_d | end_addr_pic_rangecheck_io_in_range; // @[el2_lsu_addrcheck.scala 124:57] + wire _T_140 = ~_T_139; // @[el2_lsu_addrcheck.scala 124:36] + wire end_addr_in_dccm_region_d = rvrangecheck_1_io_in_region; // @[el2_lsu_addrcheck.scala 54:41] + wire _T_141 = end_addr_in_dccm_region_d & _T_140; // @[el2_lsu_addrcheck.scala 124:34] + wire _T_142 = _T_138 | _T_141; // @[el2_lsu_addrcheck.scala 122:112] + wire _T_143 = start_addr_in_dccm_d & end_addr_pic_rangecheck_io_in_range; // @[el2_lsu_addrcheck.scala 126:29] + wire _T_144 = _T_142 | _T_143; // @[el2_lsu_addrcheck.scala 124:85] + wire _T_145 = start_addr_pic_rangecheck_io_in_range & end_addr_in_dccm_d; // @[el2_lsu_addrcheck.scala 128:29] + wire unmapped_access_fault_d = _T_144 | _T_145; // @[el2_lsu_addrcheck.scala 126:85] + wire _T_147 = ~start_addr_in_dccm_region_d; // @[el2_lsu_addrcheck.scala 130:33] + wire _T_148 = ~non_dccm_access_ok; // @[el2_lsu_addrcheck.scala 130:64] + wire mpu_access_fault_d = _T_147 & _T_148; // @[el2_lsu_addrcheck.scala 130:62] + wire _T_150 = unmapped_access_fault_d | mpu_access_fault_d; // @[el2_lsu_addrcheck.scala 142:49] + wire _T_151 = _T_150 | picm_access_fault_d; // @[el2_lsu_addrcheck.scala 142:70] + wire _T_152 = _T_151 | regpred_access_fault_d; // @[el2_lsu_addrcheck.scala 142:92] + wire _T_153 = _T_152 & io_lsu_pkt_d_valid; // @[el2_lsu_addrcheck.scala 142:118] + wire _T_154 = ~io_lsu_pkt_d_dma; // @[el2_lsu_addrcheck.scala 142:141] + wire [3:0] _T_160 = picm_access_fault_d ? 4'h6 : 4'h0; // @[el2_lsu_addrcheck.scala 143:164] + wire [3:0] _T_161 = regpred_access_fault_d ? 4'h5 : _T_160; // @[el2_lsu_addrcheck.scala 143:120] + wire [3:0] _T_162 = mpu_access_fault_d ? 4'h3 : _T_161; // @[el2_lsu_addrcheck.scala 143:80] + wire [3:0] access_fault_mscause_d = unmapped_access_fault_d ? 4'h2 : _T_162; // @[el2_lsu_addrcheck.scala 143:35] + wire regcross_misaligned_fault_d = io_start_addr_d[31:28] != io_end_addr_d[31:28]; // @[el2_lsu_addrcheck.scala 144:61] + wire _T_165 = ~is_aligned_d; // @[el2_lsu_addrcheck.scala 145:59] + wire sideeffect_misaligned_fault_d = is_sideeffects_d & _T_165; // @[el2_lsu_addrcheck.scala 145:57] + wire _T_166 = sideeffect_misaligned_fault_d & io_addr_external_d; // @[el2_lsu_addrcheck.scala 146:90] + wire _T_167 = regcross_misaligned_fault_d | _T_166; // @[el2_lsu_addrcheck.scala 146:57] + wire _T_168 = _T_167 & io_lsu_pkt_d_valid; // @[el2_lsu_addrcheck.scala 146:113] + wire [3:0] _T_172 = sideeffect_misaligned_fault_d ? 4'h1 : 4'h0; // @[el2_lsu_addrcheck.scala 147:80] + wire [3:0] misaligned_fault_mscause_d = regcross_misaligned_fault_d ? 4'h2 : _T_172; // @[el2_lsu_addrcheck.scala 147:39] + reg _T_188; // @[el2_lsu_addrcheck.scala 152:60] + rvrangecheck rvrangecheck ( // @[el2_lsu_addrcheck.scala 45:44] + .io_addr(rvrangecheck_io_addr), + .io_in_range(rvrangecheck_io_in_range), + .io_in_region(rvrangecheck_io_in_region) + ); + rvrangecheck rvrangecheck_1 ( // @[el2_lsu_addrcheck.scala 51:44] + .io_addr(rvrangecheck_1_io_addr), + .io_in_range(rvrangecheck_1_io_in_range), + .io_in_region(rvrangecheck_1_io_in_region) + ); + rvrangecheck_2 start_addr_pic_rangecheck ( // @[el2_lsu_addrcheck.scala 74:41] + .io_addr(start_addr_pic_rangecheck_io_addr), + .io_in_range(start_addr_pic_rangecheck_io_in_range), + .io_in_region(start_addr_pic_rangecheck_io_in_region) + ); + rvrangecheck_2 end_addr_pic_rangecheck ( // @[el2_lsu_addrcheck.scala 80:39] + .io_addr(end_addr_pic_rangecheck_io_addr), + .io_in_range(end_addr_pic_rangecheck_io_in_range), + .io_in_region(end_addr_pic_rangecheck_io_in_region) + ); + assign io_is_sideeffects_m = _T_188; // @[el2_lsu_addrcheck.scala 152:50] + assign io_addr_in_dccm_d = start_addr_in_dccm_d & end_addr_in_dccm_d; // @[el2_lsu_addrcheck.scala 87:32] + assign io_addr_in_pic_d = start_addr_pic_rangecheck_io_in_range & end_addr_pic_rangecheck_io_in_range; // @[el2_lsu_addrcheck.scala 88:32] + assign io_addr_external_d = ~start_addr_dccm_or_pic; // @[el2_lsu_addrcheck.scala 90:30] + assign io_access_fault_d = _T_153 & _T_154; // @[el2_lsu_addrcheck.scala 142:21] + assign io_misaligned_fault_d = _T_168 & _T_154; // @[el2_lsu_addrcheck.scala 146:25] + assign io_exc_mscause_d = io_misaligned_fault_d ? misaligned_fault_mscause_d : access_fault_mscause_d; // @[el2_lsu_addrcheck.scala 148:21] + assign rvrangecheck_io_addr = io_start_addr_d; // @[el2_lsu_addrcheck.scala 46:41] + assign rvrangecheck_1_io_addr = io_end_addr_d; // @[el2_lsu_addrcheck.scala 52:41] + assign start_addr_pic_rangecheck_io_addr = io_start_addr_d; // @[el2_lsu_addrcheck.scala 75:37] + assign end_addr_pic_rangecheck_io_addr = io_end_addr_d; // @[el2_lsu_addrcheck.scala 81:35] +`ifdef RANDOMIZE_GARBAGE_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_INVALID_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_REG_INIT +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_MEM_INIT +`define RANDOMIZE +`endif +`ifndef RANDOM +`define RANDOM $random +`endif +`ifdef RANDOMIZE_MEM_INIT + integer initvar; +`endif +`ifndef SYNTHESIS +`ifdef FIRRTL_BEFORE_INITIAL +`FIRRTL_BEFORE_INITIAL +`endif +initial begin + `ifdef RANDOMIZE + `ifdef INIT_RANDOM + `INIT_RANDOM + `endif + `ifndef VERILATOR + `ifdef RANDOMIZE_DELAY + #`RANDOMIZE_DELAY begin end + `else + #0.002 begin end + `endif + `endif +`ifdef RANDOMIZE_REG_INIT + _RAND_0 = {1{`RANDOM}}; + _T_188 = _RAND_0[0:0]; +`endif // RANDOMIZE_REG_INIT + if (reset) begin + _T_188 = 1'h0; + end + `endif // RANDOMIZE +end // initial +`ifdef FIRRTL_AFTER_INITIAL +`FIRRTL_AFTER_INITIAL +`endif +`endif // SYNTHESIS + always @(posedge io_lsu_c2_m_clk or posedge reset) begin + if (reset) begin + _T_188 <= 1'h0; + end else begin + _T_188 <= _T_19 & _T_20; + end + end +endmodule +module rvdff( + input clock, + input reset, + input io_din, + output io_dout +); +`ifdef RANDOMIZE_REG_INIT + reg [31:0] _RAND_0; +`endif // RANDOMIZE_REG_INIT + reg flop; // @[beh_lib.scala 12:21] + assign io_dout = flop; // @[beh_lib.scala 17:12] +`ifdef RANDOMIZE_GARBAGE_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_INVALID_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_REG_INIT +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_MEM_INIT +`define RANDOMIZE +`endif +`ifndef RANDOM +`define RANDOM $random +`endif +`ifdef RANDOMIZE_MEM_INIT + integer initvar; +`endif +`ifndef SYNTHESIS +`ifdef FIRRTL_BEFORE_INITIAL +`FIRRTL_BEFORE_INITIAL +`endif +initial begin + `ifdef RANDOMIZE + `ifdef INIT_RANDOM + `INIT_RANDOM + `endif + `ifndef VERILATOR + `ifdef RANDOMIZE_DELAY + #`RANDOMIZE_DELAY begin end + `else + #0.002 begin end + `endif + `endif +`ifdef RANDOMIZE_REG_INIT + _RAND_0 = {1{`RANDOM}}; + flop = _RAND_0[0:0]; +`endif // RANDOMIZE_REG_INIT + if (reset) begin + flop = 1'h0; + end + `endif // RANDOMIZE +end // initial +`ifdef FIRRTL_AFTER_INITIAL +`FIRRTL_AFTER_INITIAL +`endif +`endif // SYNTHESIS + always @(posedge clock or posedge reset) begin + if (reset) begin + flop <= 1'h0; + end else begin + flop <= io_din; + end + end +endmodule +module rvdff_2( + input clock, + input reset, + input [3:0] io_din, + output [3:0] io_dout +); +`ifdef RANDOMIZE_REG_INIT + reg [31:0] _RAND_0; +`endif // RANDOMIZE_REG_INIT + reg [3:0] flop; // @[beh_lib.scala 12:21] + assign io_dout = flop; // @[beh_lib.scala 17:12] +`ifdef RANDOMIZE_GARBAGE_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_INVALID_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_REG_INIT +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_MEM_INIT +`define RANDOMIZE +`endif +`ifndef RANDOM +`define RANDOM $random +`endif +`ifdef RANDOMIZE_MEM_INIT + integer initvar; +`endif +`ifndef SYNTHESIS +`ifdef FIRRTL_BEFORE_INITIAL +`FIRRTL_BEFORE_INITIAL +`endif +initial begin + `ifdef RANDOMIZE + `ifdef INIT_RANDOM + `INIT_RANDOM + `endif + `ifndef VERILATOR + `ifdef RANDOMIZE_DELAY + #`RANDOMIZE_DELAY begin end + `else + #0.002 begin end + `endif + `endif +`ifdef RANDOMIZE_REG_INIT + _RAND_0 = {1{`RANDOM}}; + flop = _RAND_0[3:0]; +`endif // RANDOMIZE_REG_INIT + if (reset) begin + flop = 4'h0; + end + `endif // RANDOMIZE +end // initial +`ifdef FIRRTL_AFTER_INITIAL +`FIRRTL_AFTER_INITIAL +`endif +`endif // SYNTHESIS + always @(posedge clock or posedge reset) begin + if (reset) begin + flop <= 4'h0; + end else begin + flop <= io_din; + end + end +endmodule +module rvdff_6( + input clock, + input reset, + input [31:0] io_din, + output [31:0] io_dout +); +`ifdef RANDOMIZE_REG_INIT + reg [31:0] _RAND_0; +`endif // RANDOMIZE_REG_INIT + reg [31:0] flop; // @[beh_lib.scala 12:21] + assign io_dout = flop; // @[beh_lib.scala 17:12] +`ifdef RANDOMIZE_GARBAGE_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_INVALID_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_REG_INIT +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_MEM_INIT +`define RANDOMIZE +`endif +`ifndef RANDOM +`define RANDOM $random +`endif +`ifdef RANDOMIZE_MEM_INIT + integer initvar; +`endif +`ifndef SYNTHESIS +`ifdef FIRRTL_BEFORE_INITIAL +`FIRRTL_BEFORE_INITIAL +`endif +initial begin + `ifdef RANDOMIZE + `ifdef INIT_RANDOM + `INIT_RANDOM + `endif + `ifndef VERILATOR + `ifdef RANDOMIZE_DELAY + #`RANDOMIZE_DELAY begin end + `else + #0.002 begin end + `endif + `endif +`ifdef RANDOMIZE_REG_INIT + _RAND_0 = {1{`RANDOM}}; + flop = _RAND_0[31:0]; +`endif // RANDOMIZE_REG_INIT + if (reset) begin + flop = 32'h0; + end + `endif // RANDOMIZE +end // initial +`ifdef FIRRTL_AFTER_INITIAL +`FIRRTL_AFTER_INITIAL +`endif +`endif // SYNTHESIS + always @(posedge clock or posedge reset) begin + if (reset) begin + flop <= 32'h0; + end else begin + flop <= io_din; + end + end +endmodule +module el2_lsu_lsc_ctl( + input clock, + input reset, + input io_lsu_c1_m_clk, + input io_lsu_c1_r_clk, + input io_lsu_c2_m_clk, + input io_lsu_c2_r_clk, + input io_lsu_store_c1_m_clk, + input [31:0] io_lsu_ld_data_r, + input [31:0] io_lsu_ld_data_corr_r, + input io_lsu_single_ecc_error_r, + input io_lsu_double_ecc_error_r, + input [31:0] io_lsu_ld_data_m, + input io_lsu_single_ecc_error_m, + input io_lsu_double_ecc_error_m, + input io_flush_m_up, + input io_flush_r, + input [31:0] io_exu_lsu_rs1_d, + input [31:0] io_exu_lsu_rs2_d, + input io_lsu_p_fast_int, + input io_lsu_p_by, + input io_lsu_p_half, + input io_lsu_p_word, + input io_lsu_p_dword, + input io_lsu_p_load, + input io_lsu_p_store, + input io_lsu_p_unsign, + input io_lsu_p_dma, + input io_lsu_p_store_data_bypass_d, + input io_lsu_p_load_ldst_bypass_d, + input io_lsu_p_store_data_bypass_m, + input io_lsu_p_valid, + input io_dec_lsu_valid_raw_d, + input [11:0] io_dec_lsu_offset_d, + input [31:0] io_picm_mask_data_m, + input [31:0] io_bus_read_data_m, + output [31:0] io_lsu_result_m, + output [31:0] io_lsu_result_corr_r, + output [31:0] io_lsu_addr_d, + output [31:0] io_lsu_addr_m, + output [31:0] io_lsu_addr_r, + output [31:0] io_end_addr_d, + output [31:0] io_end_addr_m, + output [31:0] io_end_addr_r, + output [31:0] io_store_data_m, + input [31:0] io_dec_tlu_mrac_ff, + output io_lsu_exc_m, + output io_is_sideeffects_m, + output io_lsu_commit_r, + output io_lsu_single_ecc_error_incr, + output io_lsu_error_pkt_r_exc_valid, + output io_lsu_error_pkt_r_single_ecc_error, + output io_lsu_error_pkt_r_inst_type, + output io_lsu_error_pkt_r_exc_type, + output [3:0] io_lsu_error_pkt_r_mscause, + output [31:0] io_lsu_error_pkt_r_addr, + output [31:0] io_lsu_fir_addr, + output [1:0] io_lsu_fir_error, + output io_addr_in_dccm_d, + output io_addr_in_dccm_m, + output io_addr_in_dccm_r, + output io_addr_in_pic_d, + output io_addr_in_pic_m, + output io_addr_in_pic_r, + output io_addr_external_m, + input io_dma_dccm_req, + input [31:0] io_dma_mem_addr, + input [2:0] io_dma_mem_sz, + input io_dma_mem_write, + input [63:0] io_dma_mem_wdata, + output io_lsu_pkt_d_fast_int, + output io_lsu_pkt_d_by, + output io_lsu_pkt_d_half, + output io_lsu_pkt_d_word, + output io_lsu_pkt_d_dword, + output io_lsu_pkt_d_load, + output io_lsu_pkt_d_store, + output io_lsu_pkt_d_unsign, + output io_lsu_pkt_d_dma, + output io_lsu_pkt_d_store_data_bypass_d, + output io_lsu_pkt_d_load_ldst_bypass_d, + output io_lsu_pkt_d_store_data_bypass_m, + output io_lsu_pkt_d_valid, + output io_lsu_pkt_m_fast_int, + output io_lsu_pkt_m_by, + output io_lsu_pkt_m_half, + output io_lsu_pkt_m_word, + output io_lsu_pkt_m_dword, + output io_lsu_pkt_m_load, + output io_lsu_pkt_m_store, + output io_lsu_pkt_m_unsign, + output io_lsu_pkt_m_dma, + output io_lsu_pkt_m_store_data_bypass_d, + output io_lsu_pkt_m_load_ldst_bypass_d, + output io_lsu_pkt_m_store_data_bypass_m, + output io_lsu_pkt_m_valid, + output io_lsu_pkt_r_fast_int, + output io_lsu_pkt_r_by, + output io_lsu_pkt_r_half, + output io_lsu_pkt_r_word, + output io_lsu_pkt_r_dword, + output io_lsu_pkt_r_load, + output io_lsu_pkt_r_store, + output io_lsu_pkt_r_unsign, + output io_lsu_pkt_r_dma, + output io_lsu_pkt_r_store_data_bypass_d, + output io_lsu_pkt_r_load_ldst_bypass_d, + output io_lsu_pkt_r_store_data_bypass_m, + output io_lsu_pkt_r_valid, + input io_scan_mode +); +`ifdef RANDOMIZE_REG_INIT + reg [31:0] _RAND_0; + reg [31:0] _RAND_1; + reg [31:0] _RAND_2; + reg [31:0] _RAND_3; + reg [31:0] _RAND_4; + reg [31:0] _RAND_5; + reg [31:0] _RAND_6; + reg [31:0] _RAND_7; + reg [31:0] _RAND_8; + reg [31:0] _RAND_9; + reg [31:0] _RAND_10; + reg [31:0] _RAND_11; + reg [31:0] _RAND_12; + reg [31:0] _RAND_13; + reg [31:0] _RAND_14; + reg [31:0] _RAND_15; + reg [31:0] _RAND_16; + reg [31:0] _RAND_17; + reg [31:0] _RAND_18; + reg [31:0] _RAND_19; + reg [31:0] _RAND_20; + reg [31:0] _RAND_21; + reg [31:0] _RAND_22; + reg [31:0] _RAND_23; + reg [31:0] _RAND_24; + reg [31:0] _RAND_25; + reg [31:0] _RAND_26; + reg [31:0] _RAND_27; + reg [31:0] _RAND_28; + reg [31:0] _RAND_29; + reg [31:0] _RAND_30; + reg [31:0] _RAND_31; +`endif // RANDOMIZE_REG_INIT + wire [31:0] lsadder_io_rs1; // @[el2_lsu_lsc_ctl.scala 118:23] + wire [11:0] lsadder_io_offset; // @[el2_lsu_lsc_ctl.scala 118:23] + wire [31:0] lsadder_io_dout; // @[el2_lsu_lsc_ctl.scala 118:23] + wire addrcheck_reset; // @[el2_lsu_lsc_ctl.scala 141:25] + wire addrcheck_io_lsu_c2_m_clk; // @[el2_lsu_lsc_ctl.scala 141:25] + wire [31:0] addrcheck_io_start_addr_d; // @[el2_lsu_lsc_ctl.scala 141:25] + wire [31:0] addrcheck_io_end_addr_d; // @[el2_lsu_lsc_ctl.scala 141:25] + wire addrcheck_io_lsu_pkt_d_by; // @[el2_lsu_lsc_ctl.scala 141:25] + wire addrcheck_io_lsu_pkt_d_half; // @[el2_lsu_lsc_ctl.scala 141:25] + wire addrcheck_io_lsu_pkt_d_word; // @[el2_lsu_lsc_ctl.scala 141:25] + wire addrcheck_io_lsu_pkt_d_load; // @[el2_lsu_lsc_ctl.scala 141:25] + wire addrcheck_io_lsu_pkt_d_store; // @[el2_lsu_lsc_ctl.scala 141:25] + wire addrcheck_io_lsu_pkt_d_dma; // @[el2_lsu_lsc_ctl.scala 141:25] + wire addrcheck_io_lsu_pkt_d_valid; // @[el2_lsu_lsc_ctl.scala 141:25] + wire [31:0] addrcheck_io_dec_tlu_mrac_ff; // @[el2_lsu_lsc_ctl.scala 141:25] + wire [3:0] addrcheck_io_rs1_region_d; // @[el2_lsu_lsc_ctl.scala 141:25] + wire addrcheck_io_is_sideeffects_m; // @[el2_lsu_lsc_ctl.scala 141:25] + wire addrcheck_io_addr_in_dccm_d; // @[el2_lsu_lsc_ctl.scala 141:25] + wire addrcheck_io_addr_in_pic_d; // @[el2_lsu_lsc_ctl.scala 141:25] + wire addrcheck_io_addr_external_d; // @[el2_lsu_lsc_ctl.scala 141:25] + wire addrcheck_io_access_fault_d; // @[el2_lsu_lsc_ctl.scala 141:25] + wire addrcheck_io_misaligned_fault_d; // @[el2_lsu_lsc_ctl.scala 141:25] + wire [3:0] addrcheck_io_exc_mscause_d; // @[el2_lsu_lsc_ctl.scala 141:25] + wire access_fault_mff_clock; // @[el2_lsu_lsc_ctl.scala 169:45] + wire access_fault_mff_reset; // @[el2_lsu_lsc_ctl.scala 169:45] + wire access_fault_mff_io_din; // @[el2_lsu_lsc_ctl.scala 169:45] + wire access_fault_mff_io_dout; // @[el2_lsu_lsc_ctl.scala 169:45] + wire misaligned_fault_mff_clock; // @[el2_lsu_lsc_ctl.scala 171:45] + wire misaligned_fault_mff_reset; // @[el2_lsu_lsc_ctl.scala 171:45] + wire misaligned_fault_mff_io_din; // @[el2_lsu_lsc_ctl.scala 171:45] + wire misaligned_fault_mff_io_dout; // @[el2_lsu_lsc_ctl.scala 171:45] + wire exc_mscause_mff_clock; // @[el2_lsu_lsc_ctl.scala 173:45] + wire exc_mscause_mff_reset; // @[el2_lsu_lsc_ctl.scala 173:45] + wire [3:0] exc_mscause_mff_io_din; // @[el2_lsu_lsc_ctl.scala 173:45] + wire [3:0] exc_mscause_mff_io_dout; // @[el2_lsu_lsc_ctl.scala 173:45] + wire lsu_pkt_vldmff_clock; // @[el2_lsu_lsc_ctl.scala 278:36] + wire lsu_pkt_vldmff_reset; // @[el2_lsu_lsc_ctl.scala 278:36] + wire lsu_pkt_vldmff_io_din; // @[el2_lsu_lsc_ctl.scala 278:36] + wire lsu_pkt_vldmff_io_dout; // @[el2_lsu_lsc_ctl.scala 278:36] + wire lsu_pkt_vldrff_clock; // @[el2_lsu_lsc_ctl.scala 279:36] + wire lsu_pkt_vldrff_reset; // @[el2_lsu_lsc_ctl.scala 279:36] + wire lsu_pkt_vldrff_io_din; // @[el2_lsu_lsc_ctl.scala 279:36] + wire lsu_pkt_vldrff_io_dout; // @[el2_lsu_lsc_ctl.scala 279:36] + wire sdmff_clock; // @[el2_lsu_lsc_ctl.scala 333:20] + wire sdmff_reset; // @[el2_lsu_lsc_ctl.scala 333:20] + wire [31:0] sdmff_io_din; // @[el2_lsu_lsc_ctl.scala 333:20] + wire [31:0] sdmff_io_dout; // @[el2_lsu_lsc_ctl.scala 333:20] + wire samff_clock; // @[el2_lsu_lsc_ctl.scala 337:20] + wire samff_reset; // @[el2_lsu_lsc_ctl.scala 337:20] + wire [31:0] samff_io_din; // @[el2_lsu_lsc_ctl.scala 337:20] + wire [31:0] samff_io_dout; // @[el2_lsu_lsc_ctl.scala 337:20] + wire sarff_clock; // @[el2_lsu_lsc_ctl.scala 341:20] + wire sarff_reset; // @[el2_lsu_lsc_ctl.scala 341:20] + wire [31:0] sarff_io_din; // @[el2_lsu_lsc_ctl.scala 341:20] + wire [31:0] sarff_io_dout; // @[el2_lsu_lsc_ctl.scala 341:20] + wire end_addr_mff_clock; // @[el2_lsu_lsc_ctl.scala 345:28] + wire end_addr_mff_reset; // @[el2_lsu_lsc_ctl.scala 345:28] + wire [31:0] end_addr_mff_io_din; // @[el2_lsu_lsc_ctl.scala 345:28] + wire [31:0] end_addr_mff_io_dout; // @[el2_lsu_lsc_ctl.scala 345:28] + wire end_addr_rff_clock; // @[el2_lsu_lsc_ctl.scala 349:28] + wire end_addr_rff_reset; // @[el2_lsu_lsc_ctl.scala 349:28] + wire [31:0] end_addr_rff_io_din; // @[el2_lsu_lsc_ctl.scala 349:28] + wire [31:0] end_addr_rff_io_dout; // @[el2_lsu_lsc_ctl.scala 349:28] + wire addr_in_dccm_mff_clock; // @[el2_lsu_lsc_ctl.scala 353:36] + wire addr_in_dccm_mff_reset; // @[el2_lsu_lsc_ctl.scala 353:36] + wire addr_in_dccm_mff_io_din; // @[el2_lsu_lsc_ctl.scala 353:36] + wire addr_in_dccm_mff_io_dout; // @[el2_lsu_lsc_ctl.scala 353:36] + wire addr_in_dccm_rff_clock; // @[el2_lsu_lsc_ctl.scala 357:37] + wire addr_in_dccm_rff_reset; // @[el2_lsu_lsc_ctl.scala 357:37] + wire addr_in_dccm_rff_io_din; // @[el2_lsu_lsc_ctl.scala 357:37] + wire addr_in_dccm_rff_io_dout; // @[el2_lsu_lsc_ctl.scala 357:37] + wire addr_in_pic_mff_clock; // @[el2_lsu_lsc_ctl.scala 361:37] + wire addr_in_pic_mff_reset; // @[el2_lsu_lsc_ctl.scala 361:37] + wire addr_in_pic_mff_io_din; // @[el2_lsu_lsc_ctl.scala 361:37] + wire addr_in_pic_mff_io_dout; // @[el2_lsu_lsc_ctl.scala 361:37] + wire addr_in_pic_rff_clock; // @[el2_lsu_lsc_ctl.scala 365:37] + wire addr_in_pic_rff_reset; // @[el2_lsu_lsc_ctl.scala 365:37] + wire addr_in_pic_rff_io_din; // @[el2_lsu_lsc_ctl.scala 365:37] + wire addr_in_pic_rff_io_dout; // @[el2_lsu_lsc_ctl.scala 365:37] + wire addr_external_mff_clock; // @[el2_lsu_lsc_ctl.scala 369:37] + wire addr_external_mff_reset; // @[el2_lsu_lsc_ctl.scala 369:37] + wire addr_external_mff_io_din; // @[el2_lsu_lsc_ctl.scala 369:37] + wire addr_external_mff_io_dout; // @[el2_lsu_lsc_ctl.scala 369:37] + wire addr_external_rff_clock; // @[el2_lsu_lsc_ctl.scala 373:37] + wire addr_external_rff_reset; // @[el2_lsu_lsc_ctl.scala 373:37] + wire addr_external_rff_io_din; // @[el2_lsu_lsc_ctl.scala 373:37] + wire addr_external_rff_io_dout; // @[el2_lsu_lsc_ctl.scala 373:37] + wire bus_read_data_r_ff_clock; // @[el2_lsu_lsc_ctl.scala 377:38] + wire bus_read_data_r_ff_reset; // @[el2_lsu_lsc_ctl.scala 377:38] + wire [31:0] bus_read_data_r_ff_io_din; // @[el2_lsu_lsc_ctl.scala 377:38] + wire [31:0] bus_read_data_r_ff_io_dout; // @[el2_lsu_lsc_ctl.scala 377:38] + wire [31:0] lsu_rs1_d = io_dec_lsu_valid_raw_d ? io_exu_lsu_rs1_d : io_dma_mem_addr; // @[el2_lsu_lsc_ctl.scala 108:28] + wire [11:0] _T_3 = io_dec_lsu_valid_raw_d ? 12'hfff : 12'h0; // @[Bitwise.scala 72:12] + wire [11:0] lsu_offset_d = io_dec_lsu_offset_d & _T_3; // @[el2_lsu_lsc_ctl.scala 109:51] + wire [31:0] rs1_d = io_lsu_pkt_d_load_ldst_bypass_d ? io_lsu_result_m : lsu_rs1_d; // @[el2_lsu_lsc_ctl.scala 114:18] + wire [2:0] _T_6 = io_lsu_pkt_d_half ? 3'h7 : 3'h0; // @[Bitwise.scala 72:12] + wire [2:0] _T_7 = _T_6 & 3'h1; // @[el2_lsu_lsc_ctl.scala 127:53] + wire [2:0] _T_9 = io_lsu_pkt_d_word ? 3'h7 : 3'h0; // @[Bitwise.scala 72:12] + wire [2:0] _T_10 = _T_9 & 3'h3; // @[el2_lsu_lsc_ctl.scala 128:35] + wire [2:0] _T_11 = _T_7 | _T_10; // @[el2_lsu_lsc_ctl.scala 127:65] + wire [2:0] _T_13 = io_lsu_pkt_d_dword ? 3'h7 : 3'h0; // @[Bitwise.scala 72:12] + wire [2:0] addr_offset_d = _T_11 | _T_13; // @[el2_lsu_lsc_ctl.scala 128:47] + wire [12:0] _T_17 = {lsu_offset_d[11],lsu_offset_d}; // @[Cat.scala 29:58] + wire [11:0] _T_20 = {9'h0,addr_offset_d}; // @[Cat.scala 29:58] + wire [12:0] _GEN_0 = {{1'd0}, _T_20}; // @[el2_lsu_lsc_ctl.scala 131:60] + wire [12:0] end_addr_offset_d = _T_17 + _GEN_0; // @[el2_lsu_lsc_ctl.scala 131:60] + wire [18:0] _T_25 = end_addr_offset_d[12] ? 19'h7ffff : 19'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_27 = {_T_25,end_addr_offset_d}; // @[Cat.scala 29:58] + wire access_fault_m = access_fault_mff_io_dout; // @[el2_lsu_lsc_ctl.scala 247:40] + wire misaligned_fault_m = misaligned_fault_mff_io_dout; // @[el2_lsu_lsc_ctl.scala 250:40] + wire _T_30 = access_fault_m | misaligned_fault_m; // @[el2_lsu_lsc_ctl.scala 188:34] + wire _T_31 = ~io_lsu_double_ecc_error_r; // @[el2_lsu_lsc_ctl.scala 189:64] + wire _T_32 = io_lsu_single_ecc_error_r & _T_31; // @[el2_lsu_lsc_ctl.scala 189:62] + wire _T_33 = io_lsu_commit_r | io_lsu_pkt_r_dma; // @[el2_lsu_lsc_ctl.scala 189:111] + wire _T_34 = _T_32 & _T_33; // @[el2_lsu_lsc_ctl.scala 189:92] + wire _T_37 = _T_30 | io_lsu_double_ecc_error_m; // @[el2_lsu_lsc_ctl.scala 230:71] + wire _T_38 = _T_37 & io_lsu_pkt_m_valid; // @[el2_lsu_lsc_ctl.scala 230:100] + wire _T_39 = ~io_lsu_pkt_m_dma; // @[el2_lsu_lsc_ctl.scala 230:123] + wire _T_40 = _T_38 & _T_39; // @[el2_lsu_lsc_ctl.scala 230:121] + wire _T_41 = ~io_lsu_pkt_m_fast_int; // @[el2_lsu_lsc_ctl.scala 230:143] + wire _T_42 = _T_40 & _T_41; // @[el2_lsu_lsc_ctl.scala 230:141] + wire _T_43 = ~io_flush_m_up; // @[el2_lsu_lsc_ctl.scala 230:168] + wire lsu_error_pkt_m_exc_valid = _T_42 & _T_43; // @[el2_lsu_lsc_ctl.scala 230:166] + wire _T_45 = ~lsu_error_pkt_m_exc_valid; // @[el2_lsu_lsc_ctl.scala 231:70] + wire _T_46 = io_lsu_single_ecc_error_m & _T_45; // @[el2_lsu_lsc_ctl.scala 231:68] + wire lsu_error_pkt_m_exc_type = ~misaligned_fault_m; // @[el2_lsu_lsc_ctl.scala 233:41] + wire _T_51 = io_lsu_double_ecc_error_m & lsu_error_pkt_m_exc_type; // @[el2_lsu_lsc_ctl.scala 234:72] + wire _T_52 = ~access_fault_m; // @[el2_lsu_lsc_ctl.scala 234:96] + wire _T_53 = _T_51 & _T_52; // @[el2_lsu_lsc_ctl.scala 234:94] + wire [3:0] exc_mscause_m = exc_mscause_mff_io_dout; // @[el2_lsu_lsc_ctl.scala 253:40] + reg _T_65_exc_valid; // @[el2_lsu_lsc_ctl.scala 241:34] + reg _T_65_single_ecc_error; // @[el2_lsu_lsc_ctl.scala 241:34] + reg _T_65_inst_type; // @[el2_lsu_lsc_ctl.scala 241:34] + reg _T_65_exc_type; // @[el2_lsu_lsc_ctl.scala 241:34] + reg [3:0] _T_65_mscause; // @[el2_lsu_lsc_ctl.scala 241:34] + reg [31:0] _T_65_addr; // @[el2_lsu_lsc_ctl.scala 241:34] + wire dma_pkt_d_load = ~io_dma_mem_write; // @[el2_lsu_lsc_ctl.scala 268:25] + wire dma_pkt_d_by = io_dma_mem_sz == 3'h0; // @[el2_lsu_lsc_ctl.scala 269:45] + wire dma_pkt_d_half = io_dma_mem_sz == 3'h1; // @[el2_lsu_lsc_ctl.scala 270:45] + wire dma_pkt_d_word = io_dma_mem_sz == 3'h2; // @[el2_lsu_lsc_ctl.scala 271:45] + wire dma_pkt_d_dword = io_dma_mem_sz == 3'h3; // @[el2_lsu_lsc_ctl.scala 272:45] + wire _T_79 = ~io_lsu_p_fast_int; // @[el2_lsu_lsc_ctl.scala 289:64] + wire _T_80 = io_flush_m_up & _T_79; // @[el2_lsu_lsc_ctl.scala 289:61] + wire _T_81 = ~_T_80; // @[el2_lsu_lsc_ctl.scala 289:45] + wire _T_82 = io_lsu_p_valid & _T_81; // @[el2_lsu_lsc_ctl.scala 289:43] + wire _T_84 = ~io_lsu_pkt_d_dma; // @[el2_lsu_lsc_ctl.scala 290:68] + wire _T_85 = io_flush_m_up & _T_84; // @[el2_lsu_lsc_ctl.scala 290:65] + wire _T_86 = ~_T_85; // @[el2_lsu_lsc_ctl.scala 290:49] + wire _T_89 = io_flush_m_up & _T_39; // @[el2_lsu_lsc_ctl.scala 291:65] + wire _T_90 = ~_T_89; // @[el2_lsu_lsc_ctl.scala 291:49] + reg _T_92_fast_int; // @[el2_lsu_lsc_ctl.scala 305:26] + reg _T_92_by; // @[el2_lsu_lsc_ctl.scala 305:26] + reg _T_92_half; // @[el2_lsu_lsc_ctl.scala 305:26] + reg _T_92_word; // @[el2_lsu_lsc_ctl.scala 305:26] + reg _T_92_dword; // @[el2_lsu_lsc_ctl.scala 305:26] + reg _T_92_load; // @[el2_lsu_lsc_ctl.scala 305:26] + reg _T_92_store; // @[el2_lsu_lsc_ctl.scala 305:26] + reg _T_92_unsign; // @[el2_lsu_lsc_ctl.scala 305:26] + reg _T_92_dma; // @[el2_lsu_lsc_ctl.scala 305:26] + reg _T_92_store_data_bypass_d; // @[el2_lsu_lsc_ctl.scala 305:26] + reg _T_92_load_ldst_bypass_d; // @[el2_lsu_lsc_ctl.scala 305:26] + reg _T_92_store_data_bypass_m; // @[el2_lsu_lsc_ctl.scala 305:26] + reg _T_92_valid; // @[el2_lsu_lsc_ctl.scala 305:26] + reg _T_93_fast_int; // @[el2_lsu_lsc_ctl.scala 310:26] + reg _T_93_by; // @[el2_lsu_lsc_ctl.scala 310:26] + reg _T_93_half; // @[el2_lsu_lsc_ctl.scala 310:26] + reg _T_93_word; // @[el2_lsu_lsc_ctl.scala 310:26] + reg _T_93_dword; // @[el2_lsu_lsc_ctl.scala 310:26] + reg _T_93_load; // @[el2_lsu_lsc_ctl.scala 310:26] + reg _T_93_store; // @[el2_lsu_lsc_ctl.scala 310:26] + reg _T_93_unsign; // @[el2_lsu_lsc_ctl.scala 310:26] + reg _T_93_dma; // @[el2_lsu_lsc_ctl.scala 310:26] + reg _T_93_store_data_bypass_d; // @[el2_lsu_lsc_ctl.scala 310:26] + reg _T_93_load_ldst_bypass_d; // @[el2_lsu_lsc_ctl.scala 310:26] + reg _T_93_store_data_bypass_m; // @[el2_lsu_lsc_ctl.scala 310:26] + reg _T_93_valid; // @[el2_lsu_lsc_ctl.scala 310:26] + wire [3:0] _T_96 = {io_dma_mem_addr[2:0],1'h0}; // @[Cat.scala 29:58] + wire [63:0] dma_mem_wdata_shifted = io_dma_mem_wdata >> _T_96; // @[el2_lsu_lsc_ctl.scala 326:54] + wire [31:0] store_data_d = io_dma_dccm_req ? dma_mem_wdata_shifted[31:0] : io_exu_lsu_rs2_d; // @[el2_lsu_lsc_ctl.scala 328:34] + wire _T_104 = io_lsu_pkt_r_store | io_lsu_pkt_r_load; // @[el2_lsu_lsc_ctl.scala 391:63] + wire _T_105 = io_lsu_pkt_r_valid & _T_104; // @[el2_lsu_lsc_ctl.scala 391:41] + wire _T_106 = ~io_flush_r; // @[el2_lsu_lsc_ctl.scala 391:86] + wire _T_107 = _T_105 & _T_106; // @[el2_lsu_lsc_ctl.scala 391:84] + wire _T_108 = ~io_lsu_pkt_r_dma; // @[el2_lsu_lsc_ctl.scala 391:100] + wire _T_111 = ~io_addr_in_pic_m; // @[el2_lsu_lsc_ctl.scala 394:69] + wire [31:0] _T_113 = _T_111 ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_114 = io_picm_mask_data_m | _T_113; // @[el2_lsu_lsc_ctl.scala 394:59] + wire [31:0] _T_116 = io_lsu_pkt_m_store_data_bypass_m ? io_lsu_result_m : sdmff_io_dout; // @[el2_lsu_lsc_ctl.scala 394:94] + wire [31:0] lsu_ld_datafn_m = io_addr_external_m ? io_bus_read_data_m : io_lsu_ld_data_m; // @[el2_lsu_lsc_ctl.scala 425:33] + wire _T_120 = addr_external_rff_io_dout; // @[el2_lsu_lsc_ctl.scala 426:50] + wire [31:0] lsu_ld_datafn_corr_r = _T_120 ? bus_read_data_r_ff_io_dout : io_lsu_ld_data_corr_r; // @[el2_lsu_lsc_ctl.scala 426:33] + wire _T_122 = io_lsu_pkt_r_unsign & io_lsu_pkt_r_by; // @[el2_lsu_lsc_ctl.scala 429:61] + wire [31:0] _T_124 = _T_122 ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] + wire [8:0] _T_126 = {1'h0,lsu_ld_datafn_m[7:0]}; // @[Cat.scala 29:58] + wire [31:0] _GEN_1 = {{23'd0}, _T_126}; // @[el2_lsu_lsc_ctl.scala 429:84] + wire [31:0] _T_127 = _T_124 & _GEN_1; // @[el2_lsu_lsc_ctl.scala 429:84] + wire _T_128 = io_lsu_pkt_r_unsign & io_lsu_pkt_r_half; // @[el2_lsu_lsc_ctl.scala 430:38] + wire [31:0] _T_130 = _T_128 ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] + wire [16:0] _T_132 = {1'h0,lsu_ld_datafn_m[15:0]}; // @[Cat.scala 29:58] + wire [31:0] _GEN_2 = {{15'd0}, _T_132}; // @[el2_lsu_lsc_ctl.scala 430:61] + wire [31:0] _T_133 = _T_130 & _GEN_2; // @[el2_lsu_lsc_ctl.scala 430:61] + wire [31:0] _T_134 = _T_127 | _T_133; // @[el2_lsu_lsc_ctl.scala 429:125] + wire _T_135 = ~io_lsu_pkt_r_unsign; // @[el2_lsu_lsc_ctl.scala 431:17] + wire _T_136 = _T_135 & io_lsu_pkt_r_by; // @[el2_lsu_lsc_ctl.scala 431:38] + wire [31:0] _T_138 = _T_136 ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] + wire [23:0] _T_141 = lsu_ld_datafn_m[7] ? 24'hffffff : 24'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_143 = {_T_141,lsu_ld_datafn_m[7:0]}; // @[Cat.scala 29:58] + wire [31:0] _T_144 = _T_138 & _T_143; // @[el2_lsu_lsc_ctl.scala 431:61] + wire [31:0] _T_145 = _T_134 | _T_144; // @[el2_lsu_lsc_ctl.scala 430:104] + wire _T_147 = _T_135 & io_lsu_pkt_r_half; // @[el2_lsu_lsc_ctl.scala 432:38] + wire [31:0] _T_149 = _T_147 ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] + wire [15:0] _T_152 = lsu_ld_datafn_m[15] ? 16'hffff : 16'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_154 = {_T_152,lsu_ld_datafn_m[15:0]}; // @[Cat.scala 29:58] + wire [31:0] _T_155 = _T_149 & _T_154; // @[el2_lsu_lsc_ctl.scala 432:61] + wire [31:0] _T_156 = _T_145 | _T_155; // @[el2_lsu_lsc_ctl.scala 431:124] + wire [31:0] _T_158 = io_lsu_pkt_r_word ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_160 = _T_158 & lsu_ld_datafn_m; // @[el2_lsu_lsc_ctl.scala 433:38] + wire [8:0] _T_166 = {1'h0,lsu_ld_datafn_corr_r[7:0]}; // @[Cat.scala 29:58] + wire [31:0] _GEN_3 = {{23'd0}, _T_166}; // @[el2_lsu_lsc_ctl.scala 436:84] + wire [31:0] _T_167 = _T_124 & _GEN_3; // @[el2_lsu_lsc_ctl.scala 436:84] + wire [16:0] _T_172 = {1'h0,lsu_ld_datafn_corr_r[15:0]}; // @[Cat.scala 29:58] + wire [31:0] _GEN_4 = {{15'd0}, _T_172}; // @[el2_lsu_lsc_ctl.scala 437:61] + wire [31:0] _T_173 = _T_130 & _GEN_4; // @[el2_lsu_lsc_ctl.scala 437:61] + wire [31:0] _T_174 = _T_167 | _T_173; // @[el2_lsu_lsc_ctl.scala 436:130] + wire [23:0] _T_181 = lsu_ld_datafn_corr_r[7] ? 24'hffffff : 24'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_183 = {_T_181,lsu_ld_datafn_corr_r[7:0]}; // @[Cat.scala 29:58] + wire [31:0] _T_184 = _T_138 & _T_183; // @[el2_lsu_lsc_ctl.scala 438:61] + wire [31:0] _T_185 = _T_174 | _T_184; // @[el2_lsu_lsc_ctl.scala 437:109] + wire [15:0] _T_192 = lsu_ld_datafn_corr_r[15] ? 16'hffff : 16'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_194 = {_T_192,lsu_ld_datafn_corr_r[15:0]}; // @[Cat.scala 29:58] + wire [31:0] _T_195 = _T_149 & _T_194; // @[el2_lsu_lsc_ctl.scala 439:61] + wire [31:0] _T_196 = _T_185 | _T_195; // @[el2_lsu_lsc_ctl.scala 438:134] + wire [31:0] _T_200 = _T_158 & lsu_ld_datafn_corr_r; // @[el2_lsu_lsc_ctl.scala 440:38] + rvlsadder lsadder ( // @[el2_lsu_lsc_ctl.scala 118:23] + .io_rs1(lsadder_io_rs1), + .io_offset(lsadder_io_offset), + .io_dout(lsadder_io_dout) + ); + el2_lsu_addrcheck addrcheck ( // @[el2_lsu_lsc_ctl.scala 141:25] + .reset(addrcheck_reset), + .io_lsu_c2_m_clk(addrcheck_io_lsu_c2_m_clk), + .io_start_addr_d(addrcheck_io_start_addr_d), + .io_end_addr_d(addrcheck_io_end_addr_d), + .io_lsu_pkt_d_by(addrcheck_io_lsu_pkt_d_by), + .io_lsu_pkt_d_half(addrcheck_io_lsu_pkt_d_half), + .io_lsu_pkt_d_word(addrcheck_io_lsu_pkt_d_word), + .io_lsu_pkt_d_load(addrcheck_io_lsu_pkt_d_load), + .io_lsu_pkt_d_store(addrcheck_io_lsu_pkt_d_store), + .io_lsu_pkt_d_dma(addrcheck_io_lsu_pkt_d_dma), + .io_lsu_pkt_d_valid(addrcheck_io_lsu_pkt_d_valid), + .io_dec_tlu_mrac_ff(addrcheck_io_dec_tlu_mrac_ff), + .io_rs1_region_d(addrcheck_io_rs1_region_d), + .io_is_sideeffects_m(addrcheck_io_is_sideeffects_m), + .io_addr_in_dccm_d(addrcheck_io_addr_in_dccm_d), + .io_addr_in_pic_d(addrcheck_io_addr_in_pic_d), + .io_addr_external_d(addrcheck_io_addr_external_d), + .io_access_fault_d(addrcheck_io_access_fault_d), + .io_misaligned_fault_d(addrcheck_io_misaligned_fault_d), + .io_exc_mscause_d(addrcheck_io_exc_mscause_d) + ); + rvdff access_fault_mff ( // @[el2_lsu_lsc_ctl.scala 169:45] + .clock(access_fault_mff_clock), + .reset(access_fault_mff_reset), + .io_din(access_fault_mff_io_din), + .io_dout(access_fault_mff_io_dout) + ); + rvdff misaligned_fault_mff ( // @[el2_lsu_lsc_ctl.scala 171:45] + .clock(misaligned_fault_mff_clock), + .reset(misaligned_fault_mff_reset), + .io_din(misaligned_fault_mff_io_din), + .io_dout(misaligned_fault_mff_io_dout) + ); + rvdff_2 exc_mscause_mff ( // @[el2_lsu_lsc_ctl.scala 173:45] + .clock(exc_mscause_mff_clock), + .reset(exc_mscause_mff_reset), + .io_din(exc_mscause_mff_io_din), + .io_dout(exc_mscause_mff_io_dout) + ); + rvdff lsu_pkt_vldmff ( // @[el2_lsu_lsc_ctl.scala 278:36] + .clock(lsu_pkt_vldmff_clock), + .reset(lsu_pkt_vldmff_reset), + .io_din(lsu_pkt_vldmff_io_din), + .io_dout(lsu_pkt_vldmff_io_dout) + ); + rvdff lsu_pkt_vldrff ( // @[el2_lsu_lsc_ctl.scala 279:36] + .clock(lsu_pkt_vldrff_clock), + .reset(lsu_pkt_vldrff_reset), + .io_din(lsu_pkt_vldrff_io_din), + .io_dout(lsu_pkt_vldrff_io_dout) + ); + rvdff_6 sdmff ( // @[el2_lsu_lsc_ctl.scala 333:20] + .clock(sdmff_clock), + .reset(sdmff_reset), + .io_din(sdmff_io_din), + .io_dout(sdmff_io_dout) + ); + rvdff_6 samff ( // @[el2_lsu_lsc_ctl.scala 337:20] + .clock(samff_clock), + .reset(samff_reset), + .io_din(samff_io_din), + .io_dout(samff_io_dout) + ); + rvdff_6 sarff ( // @[el2_lsu_lsc_ctl.scala 341:20] + .clock(sarff_clock), + .reset(sarff_reset), + .io_din(sarff_io_din), + .io_dout(sarff_io_dout) + ); + rvdff_6 end_addr_mff ( // @[el2_lsu_lsc_ctl.scala 345:28] + .clock(end_addr_mff_clock), + .reset(end_addr_mff_reset), + .io_din(end_addr_mff_io_din), + .io_dout(end_addr_mff_io_dout) + ); + rvdff_6 end_addr_rff ( // @[el2_lsu_lsc_ctl.scala 349:28] + .clock(end_addr_rff_clock), + .reset(end_addr_rff_reset), + .io_din(end_addr_rff_io_din), + .io_dout(end_addr_rff_io_dout) + ); + rvdff addr_in_dccm_mff ( // @[el2_lsu_lsc_ctl.scala 353:36] + .clock(addr_in_dccm_mff_clock), + .reset(addr_in_dccm_mff_reset), + .io_din(addr_in_dccm_mff_io_din), + .io_dout(addr_in_dccm_mff_io_dout) + ); + rvdff addr_in_dccm_rff ( // @[el2_lsu_lsc_ctl.scala 357:37] + .clock(addr_in_dccm_rff_clock), + .reset(addr_in_dccm_rff_reset), + .io_din(addr_in_dccm_rff_io_din), + .io_dout(addr_in_dccm_rff_io_dout) + ); + rvdff addr_in_pic_mff ( // @[el2_lsu_lsc_ctl.scala 361:37] + .clock(addr_in_pic_mff_clock), + .reset(addr_in_pic_mff_reset), + .io_din(addr_in_pic_mff_io_din), + .io_dout(addr_in_pic_mff_io_dout) + ); + rvdff addr_in_pic_rff ( // @[el2_lsu_lsc_ctl.scala 365:37] + .clock(addr_in_pic_rff_clock), + .reset(addr_in_pic_rff_reset), + .io_din(addr_in_pic_rff_io_din), + .io_dout(addr_in_pic_rff_io_dout) + ); + rvdff addr_external_mff ( // @[el2_lsu_lsc_ctl.scala 369:37] + .clock(addr_external_mff_clock), + .reset(addr_external_mff_reset), + .io_din(addr_external_mff_io_din), + .io_dout(addr_external_mff_io_dout) + ); + rvdff addr_external_rff ( // @[el2_lsu_lsc_ctl.scala 373:37] + .clock(addr_external_rff_clock), + .reset(addr_external_rff_reset), + .io_din(addr_external_rff_io_din), + .io_dout(addr_external_rff_io_dout) + ); + rvdff_6 bus_read_data_r_ff ( // @[el2_lsu_lsc_ctl.scala 377:38] + .clock(bus_read_data_r_ff_clock), + .reset(bus_read_data_r_ff_reset), + .io_din(bus_read_data_r_ff_io_din), + .io_dout(bus_read_data_r_ff_io_dout) + ); + assign io_lsu_result_m = _T_156 | _T_160; // @[el2_lsu_lsc_ctl.scala 429:27] + assign io_lsu_result_corr_r = _T_196 | _T_200; // @[el2_lsu_lsc_ctl.scala 436:27] + assign io_lsu_addr_d = lsadder_io_dout; // @[el2_lsu_lsc_ctl.scala 387:28] + assign io_lsu_addr_m = samff_io_dout; // @[el2_lsu_lsc_ctl.scala 339:26] + assign io_lsu_addr_r = sarff_io_dout; // @[el2_lsu_lsc_ctl.scala 343:23] + assign io_end_addr_d = rs1_d + _T_27; // @[el2_lsu_lsc_ctl.scala 133:24] + assign io_end_addr_m = end_addr_mff_io_dout; // @[el2_lsu_lsc_ctl.scala 347:26] + assign io_end_addr_r = end_addr_rff_io_dout; // @[el2_lsu_lsc_ctl.scala 351:26] + assign io_store_data_m = _T_114 & _T_116; // @[el2_lsu_lsc_ctl.scala 394:29] + assign io_lsu_exc_m = access_fault_m | misaligned_fault_m; // @[el2_lsu_lsc_ctl.scala 188:16] + assign io_is_sideeffects_m = addrcheck_io_is_sideeffects_m; // @[el2_lsu_lsc_ctl.scala 151:42] + assign io_lsu_commit_r = _T_107 & _T_108; // @[el2_lsu_lsc_ctl.scala 391:19] + assign io_lsu_single_ecc_error_incr = _T_34 & io_lsu_pkt_r_valid; // @[el2_lsu_lsc_ctl.scala 189:32] + assign io_lsu_error_pkt_r_exc_valid = _T_65_exc_valid; // @[el2_lsu_lsc_ctl.scala 241:24] + assign io_lsu_error_pkt_r_single_ecc_error = _T_65_single_ecc_error; // @[el2_lsu_lsc_ctl.scala 241:24] + assign io_lsu_error_pkt_r_inst_type = _T_65_inst_type; // @[el2_lsu_lsc_ctl.scala 241:24] + assign io_lsu_error_pkt_r_exc_type = _T_65_exc_type; // @[el2_lsu_lsc_ctl.scala 241:24] + assign io_lsu_error_pkt_r_mscause = _T_65_mscause; // @[el2_lsu_lsc_ctl.scala 241:24] + assign io_lsu_error_pkt_r_addr = _T_65_addr; // @[el2_lsu_lsc_ctl.scala 241:24] + assign io_lsu_fir_addr = io_lsu_ld_data_corr_r; // @[el2_lsu_lsc_ctl.scala 384:28] + assign io_lsu_fir_error = 2'h0; // @[el2_lsu_lsc_ctl.scala 228:23] + assign io_addr_in_dccm_d = addrcheck_io_addr_in_dccm_d; // @[el2_lsu_lsc_ctl.scala 152:42] + assign io_addr_in_dccm_m = addr_in_dccm_mff_io_dout; // @[el2_lsu_lsc_ctl.scala 355:27] + assign io_addr_in_dccm_r = addr_in_dccm_rff_io_dout; // @[el2_lsu_lsc_ctl.scala 359:28] + assign io_addr_in_pic_d = addrcheck_io_addr_in_pic_d; // @[el2_lsu_lsc_ctl.scala 153:42] + assign io_addr_in_pic_m = addr_in_pic_mff_io_dout; // @[el2_lsu_lsc_ctl.scala 363:27] + assign io_addr_in_pic_r = addr_in_pic_rff_io_dout; // @[el2_lsu_lsc_ctl.scala 367:27] + assign io_addr_external_m = addr_external_mff_io_dout; // @[el2_lsu_lsc_ctl.scala 371:28] + assign io_lsu_pkt_d_fast_int = io_dec_lsu_valid_raw_d & io_lsu_p_fast_int; // @[el2_lsu_lsc_ctl.scala 285:20] + assign io_lsu_pkt_d_by = io_dec_lsu_valid_raw_d ? io_lsu_p_by : dma_pkt_d_by; // @[el2_lsu_lsc_ctl.scala 285:20] + assign io_lsu_pkt_d_half = io_dec_lsu_valid_raw_d ? io_lsu_p_half : dma_pkt_d_half; // @[el2_lsu_lsc_ctl.scala 285:20] + assign io_lsu_pkt_d_word = io_dec_lsu_valid_raw_d ? io_lsu_p_word : dma_pkt_d_word; // @[el2_lsu_lsc_ctl.scala 285:20] + assign io_lsu_pkt_d_dword = io_dec_lsu_valid_raw_d ? io_lsu_p_dword : dma_pkt_d_dword; // @[el2_lsu_lsc_ctl.scala 285:20] + assign io_lsu_pkt_d_load = io_dec_lsu_valid_raw_d ? io_lsu_p_load : dma_pkt_d_load; // @[el2_lsu_lsc_ctl.scala 285:20] + assign io_lsu_pkt_d_store = io_dec_lsu_valid_raw_d ? io_lsu_p_store : io_dma_mem_write; // @[el2_lsu_lsc_ctl.scala 285:20] + assign io_lsu_pkt_d_unsign = io_dec_lsu_valid_raw_d & io_lsu_p_unsign; // @[el2_lsu_lsc_ctl.scala 285:20] + assign io_lsu_pkt_d_dma = io_dec_lsu_valid_raw_d ? io_lsu_p_dma : 1'h1; // @[el2_lsu_lsc_ctl.scala 285:20] + assign io_lsu_pkt_d_store_data_bypass_d = io_dec_lsu_valid_raw_d & io_lsu_p_store_data_bypass_d; // @[el2_lsu_lsc_ctl.scala 285:20] + assign io_lsu_pkt_d_load_ldst_bypass_d = io_dec_lsu_valid_raw_d & io_lsu_p_load_ldst_bypass_d; // @[el2_lsu_lsc_ctl.scala 285:20] + assign io_lsu_pkt_d_store_data_bypass_m = io_dec_lsu_valid_raw_d & io_lsu_p_store_data_bypass_m; // @[el2_lsu_lsc_ctl.scala 285:20] + assign io_lsu_pkt_d_valid = _T_82 | io_dma_dccm_req; // @[el2_lsu_lsc_ctl.scala 285:20 el2_lsu_lsc_ctl.scala 289:24] + assign io_lsu_pkt_m_fast_int = _T_92_fast_int; // @[el2_lsu_lsc_ctl.scala 305:16] + assign io_lsu_pkt_m_by = _T_92_by; // @[el2_lsu_lsc_ctl.scala 305:16] + assign io_lsu_pkt_m_half = _T_92_half; // @[el2_lsu_lsc_ctl.scala 305:16] + assign io_lsu_pkt_m_word = _T_92_word; // @[el2_lsu_lsc_ctl.scala 305:16] + assign io_lsu_pkt_m_dword = _T_92_dword; // @[el2_lsu_lsc_ctl.scala 305:16] + assign io_lsu_pkt_m_load = _T_92_load; // @[el2_lsu_lsc_ctl.scala 305:16] + assign io_lsu_pkt_m_store = _T_92_store; // @[el2_lsu_lsc_ctl.scala 305:16] + assign io_lsu_pkt_m_unsign = _T_92_unsign; // @[el2_lsu_lsc_ctl.scala 305:16] + assign io_lsu_pkt_m_dma = _T_92_dma; // @[el2_lsu_lsc_ctl.scala 305:16] + assign io_lsu_pkt_m_store_data_bypass_d = _T_92_store_data_bypass_d; // @[el2_lsu_lsc_ctl.scala 305:16] + assign io_lsu_pkt_m_load_ldst_bypass_d = _T_92_load_ldst_bypass_d; // @[el2_lsu_lsc_ctl.scala 305:16] + assign io_lsu_pkt_m_store_data_bypass_m = _T_92_store_data_bypass_m; // @[el2_lsu_lsc_ctl.scala 305:16] + assign io_lsu_pkt_m_valid = _T_92_valid; // @[el2_lsu_lsc_ctl.scala 296:34 el2_lsu_lsc_ctl.scala 305:16] + assign io_lsu_pkt_r_fast_int = _T_93_fast_int; // @[el2_lsu_lsc_ctl.scala 310:16] + assign io_lsu_pkt_r_by = _T_93_by; // @[el2_lsu_lsc_ctl.scala 310:16] + assign io_lsu_pkt_r_half = _T_93_half; // @[el2_lsu_lsc_ctl.scala 310:16] + assign io_lsu_pkt_r_word = _T_93_word; // @[el2_lsu_lsc_ctl.scala 310:16] + assign io_lsu_pkt_r_dword = _T_93_dword; // @[el2_lsu_lsc_ctl.scala 310:16] + assign io_lsu_pkt_r_load = _T_93_load; // @[el2_lsu_lsc_ctl.scala 310:16] + assign io_lsu_pkt_r_store = _T_93_store; // @[el2_lsu_lsc_ctl.scala 310:16] + assign io_lsu_pkt_r_unsign = _T_93_unsign; // @[el2_lsu_lsc_ctl.scala 310:16] + assign io_lsu_pkt_r_dma = _T_93_dma; // @[el2_lsu_lsc_ctl.scala 310:16] + assign io_lsu_pkt_r_store_data_bypass_d = _T_93_store_data_bypass_d; // @[el2_lsu_lsc_ctl.scala 310:16] + assign io_lsu_pkt_r_load_ldst_bypass_d = _T_93_load_ldst_bypass_d; // @[el2_lsu_lsc_ctl.scala 310:16] + assign io_lsu_pkt_r_store_data_bypass_m = _T_93_store_data_bypass_m; // @[el2_lsu_lsc_ctl.scala 310:16] + assign io_lsu_pkt_r_valid = _T_93_valid; // @[el2_lsu_lsc_ctl.scala 300:33 el2_lsu_lsc_ctl.scala 310:16] + assign lsadder_io_rs1 = io_lsu_pkt_d_load_ldst_bypass_d ? io_lsu_result_m : lsu_rs1_d; // @[el2_lsu_lsc_ctl.scala 119:26] + assign lsadder_io_offset = io_dec_lsu_offset_d & _T_3; // @[el2_lsu_lsc_ctl.scala 120:26] + assign addrcheck_reset = reset; + assign addrcheck_io_lsu_c2_m_clk = io_lsu_c2_m_clk; // @[el2_lsu_lsc_ctl.scala 143:42] + assign addrcheck_io_start_addr_d = lsadder_io_dout; // @[el2_lsu_lsc_ctl.scala 145:42] + assign addrcheck_io_end_addr_d = rs1_d + _T_27; // @[el2_lsu_lsc_ctl.scala 146:42] + assign addrcheck_io_lsu_pkt_d_by = io_lsu_pkt_d_by; // @[el2_lsu_lsc_ctl.scala 147:42] + assign addrcheck_io_lsu_pkt_d_half = io_lsu_pkt_d_half; // @[el2_lsu_lsc_ctl.scala 147:42] + assign addrcheck_io_lsu_pkt_d_word = io_lsu_pkt_d_word; // @[el2_lsu_lsc_ctl.scala 147:42] + assign addrcheck_io_lsu_pkt_d_load = io_lsu_pkt_d_load; // @[el2_lsu_lsc_ctl.scala 147:42] + assign addrcheck_io_lsu_pkt_d_store = io_lsu_pkt_d_store; // @[el2_lsu_lsc_ctl.scala 147:42] + assign addrcheck_io_lsu_pkt_d_dma = io_lsu_pkt_d_dma; // @[el2_lsu_lsc_ctl.scala 147:42] + assign addrcheck_io_lsu_pkt_d_valid = io_lsu_pkt_d_valid; // @[el2_lsu_lsc_ctl.scala 147:42] + assign addrcheck_io_dec_tlu_mrac_ff = io_dec_tlu_mrac_ff; // @[el2_lsu_lsc_ctl.scala 148:42] + assign addrcheck_io_rs1_region_d = rs1_d[31:28]; // @[el2_lsu_lsc_ctl.scala 149:42] + assign access_fault_mff_clock = clock; + assign access_fault_mff_reset = reset; + assign access_fault_mff_io_din = addrcheck_io_access_fault_d; // @[el2_lsu_lsc_ctl.scala 246:40] + assign misaligned_fault_mff_clock = clock; + assign misaligned_fault_mff_reset = reset; + assign misaligned_fault_mff_io_din = addrcheck_io_misaligned_fault_d; // @[el2_lsu_lsc_ctl.scala 249:40] + assign exc_mscause_mff_clock = clock; + assign exc_mscause_mff_reset = reset; + assign exc_mscause_mff_io_din = addrcheck_io_exc_mscause_d; // @[el2_lsu_lsc_ctl.scala 252:40] + assign lsu_pkt_vldmff_clock = clock; + assign lsu_pkt_vldmff_reset = reset; + assign lsu_pkt_vldmff_io_din = io_lsu_pkt_d_valid & _T_86; // @[el2_lsu_lsc_ctl.scala 295:34] + assign lsu_pkt_vldrff_clock = clock; + assign lsu_pkt_vldrff_reset = reset; + assign lsu_pkt_vldrff_io_din = io_lsu_pkt_m_valid & _T_90; // @[el2_lsu_lsc_ctl.scala 299:33] + assign sdmff_clock = clock; + assign sdmff_reset = reset; + assign sdmff_io_din = io_lsu_pkt_d_store_data_bypass_d ? io_lsu_result_m : store_data_d; // @[el2_lsu_lsc_ctl.scala 334:27] + assign samff_clock = clock; + assign samff_reset = reset; + assign samff_io_din = io_lsu_addr_d; // @[el2_lsu_lsc_ctl.scala 338:23] + assign sarff_clock = clock; + assign sarff_reset = reset; + assign sarff_io_din = io_lsu_addr_m; // @[el2_lsu_lsc_ctl.scala 342:23] + assign end_addr_mff_clock = clock; + assign end_addr_mff_reset = reset; + assign end_addr_mff_io_din = io_end_addr_d; // @[el2_lsu_lsc_ctl.scala 346:26] + assign end_addr_rff_clock = clock; + assign end_addr_rff_reset = reset; + assign end_addr_rff_io_din = io_end_addr_m; // @[el2_lsu_lsc_ctl.scala 350:26] + assign addr_in_dccm_mff_clock = clock; + assign addr_in_dccm_mff_reset = reset; + assign addr_in_dccm_mff_io_din = io_addr_in_dccm_d; // @[el2_lsu_lsc_ctl.scala 354:27] + assign addr_in_dccm_rff_clock = clock; + assign addr_in_dccm_rff_reset = reset; + assign addr_in_dccm_rff_io_din = io_addr_in_dccm_m; // @[el2_lsu_lsc_ctl.scala 358:28] + assign addr_in_pic_mff_clock = clock; + assign addr_in_pic_mff_reset = reset; + assign addr_in_pic_mff_io_din = io_addr_in_pic_d; // @[el2_lsu_lsc_ctl.scala 362:27] + assign addr_in_pic_rff_clock = clock; + assign addr_in_pic_rff_reset = reset; + assign addr_in_pic_rff_io_din = io_addr_in_pic_m; // @[el2_lsu_lsc_ctl.scala 366:27] + assign addr_external_mff_clock = clock; + assign addr_external_mff_reset = reset; + assign addr_external_mff_io_din = addrcheck_io_addr_external_d; // @[el2_lsu_lsc_ctl.scala 370:28] + assign addr_external_rff_clock = clock; + assign addr_external_rff_reset = reset; + assign addr_external_rff_io_din = io_addr_external_m; // @[el2_lsu_lsc_ctl.scala 374:28] + assign bus_read_data_r_ff_clock = clock; + assign bus_read_data_r_ff_reset = reset; + assign bus_read_data_r_ff_io_din = io_bus_read_data_m; // @[el2_lsu_lsc_ctl.scala 378:29] +`ifdef RANDOMIZE_GARBAGE_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_INVALID_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_REG_INIT +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_MEM_INIT +`define RANDOMIZE +`endif +`ifndef RANDOM +`define RANDOM $random +`endif +`ifdef RANDOMIZE_MEM_INIT + integer initvar; +`endif +`ifndef SYNTHESIS +`ifdef FIRRTL_BEFORE_INITIAL +`FIRRTL_BEFORE_INITIAL +`endif +initial begin + `ifdef RANDOMIZE + `ifdef INIT_RANDOM + `INIT_RANDOM + `endif + `ifndef VERILATOR + `ifdef RANDOMIZE_DELAY + #`RANDOMIZE_DELAY begin end + `else + #0.002 begin end + `endif + `endif +`ifdef RANDOMIZE_REG_INIT + _RAND_0 = {1{`RANDOM}}; + _T_65_exc_valid = _RAND_0[0:0]; + _RAND_1 = {1{`RANDOM}}; + _T_65_single_ecc_error = _RAND_1[0:0]; + _RAND_2 = {1{`RANDOM}}; + _T_65_inst_type = _RAND_2[0:0]; + _RAND_3 = {1{`RANDOM}}; + _T_65_exc_type = _RAND_3[0:0]; + _RAND_4 = {1{`RANDOM}}; + _T_65_mscause = _RAND_4[3:0]; + _RAND_5 = {1{`RANDOM}}; + _T_65_addr = _RAND_5[31:0]; + _RAND_6 = {1{`RANDOM}}; + _T_92_fast_int = _RAND_6[0:0]; + _RAND_7 = {1{`RANDOM}}; + _T_92_by = _RAND_7[0:0]; + _RAND_8 = {1{`RANDOM}}; + _T_92_half = _RAND_8[0:0]; + _RAND_9 = {1{`RANDOM}}; + _T_92_word = _RAND_9[0:0]; + _RAND_10 = {1{`RANDOM}}; + _T_92_dword = _RAND_10[0:0]; + _RAND_11 = {1{`RANDOM}}; + _T_92_load = _RAND_11[0:0]; + _RAND_12 = {1{`RANDOM}}; + _T_92_store = _RAND_12[0:0]; + _RAND_13 = {1{`RANDOM}}; + _T_92_unsign = _RAND_13[0:0]; + _RAND_14 = {1{`RANDOM}}; + _T_92_dma = _RAND_14[0:0]; + _RAND_15 = {1{`RANDOM}}; + _T_92_store_data_bypass_d = _RAND_15[0:0]; + _RAND_16 = {1{`RANDOM}}; + _T_92_load_ldst_bypass_d = _RAND_16[0:0]; + _RAND_17 = {1{`RANDOM}}; + _T_92_store_data_bypass_m = _RAND_17[0:0]; + _RAND_18 = {1{`RANDOM}}; + _T_92_valid = _RAND_18[0:0]; + _RAND_19 = {1{`RANDOM}}; + _T_93_fast_int = _RAND_19[0:0]; + _RAND_20 = {1{`RANDOM}}; + _T_93_by = _RAND_20[0:0]; + _RAND_21 = {1{`RANDOM}}; + _T_93_half = _RAND_21[0:0]; + _RAND_22 = {1{`RANDOM}}; + _T_93_word = _RAND_22[0:0]; + _RAND_23 = {1{`RANDOM}}; + _T_93_dword = _RAND_23[0:0]; + _RAND_24 = {1{`RANDOM}}; + _T_93_load = _RAND_24[0:0]; + _RAND_25 = {1{`RANDOM}}; + _T_93_store = _RAND_25[0:0]; + _RAND_26 = {1{`RANDOM}}; + _T_93_unsign = _RAND_26[0:0]; + _RAND_27 = {1{`RANDOM}}; + _T_93_dma = _RAND_27[0:0]; + _RAND_28 = {1{`RANDOM}}; + _T_93_store_data_bypass_d = _RAND_28[0:0]; + _RAND_29 = {1{`RANDOM}}; + _T_93_load_ldst_bypass_d = _RAND_29[0:0]; + _RAND_30 = {1{`RANDOM}}; + _T_93_store_data_bypass_m = _RAND_30[0:0]; + _RAND_31 = {1{`RANDOM}}; + _T_93_valid = _RAND_31[0:0]; +`endif // RANDOMIZE_REG_INIT + `endif // RANDOMIZE +end // initial +`ifdef FIRRTL_AFTER_INITIAL +`FIRRTL_AFTER_INITIAL +`endif +`endif // SYNTHESIS + always @(posedge clock) begin + _T_65_exc_valid <= _T_42 & _T_43; + _T_65_single_ecc_error <= _T_46 & _T_39; + _T_65_inst_type <= io_lsu_pkt_m_store; + _T_65_exc_type <= ~misaligned_fault_m; + if (_T_53) begin + _T_65_mscause <= 4'h1; + end else begin + _T_65_mscause <= exc_mscause_m; + end + _T_65_addr <= io_lsu_addr_m; + _T_92_fast_int <= io_lsu_pkt_d_fast_int; + _T_92_by <= io_lsu_pkt_d_by; + _T_92_half <= io_lsu_pkt_d_half; + _T_92_word <= io_lsu_pkt_d_word; + _T_92_dword <= io_lsu_pkt_d_dword; + _T_92_load <= io_lsu_pkt_d_load; + _T_92_store <= io_lsu_pkt_d_store; + _T_92_unsign <= io_lsu_pkt_d_unsign; + _T_92_dma <= io_lsu_pkt_d_dma; + _T_92_store_data_bypass_d <= io_lsu_pkt_d_store_data_bypass_d; + _T_92_load_ldst_bypass_d <= io_lsu_pkt_d_load_ldst_bypass_d; + _T_92_store_data_bypass_m <= io_lsu_pkt_d_store_data_bypass_m; + _T_92_valid <= io_lsu_pkt_d_valid & _T_86; + _T_93_fast_int <= io_lsu_pkt_m_fast_int; + _T_93_by <= io_lsu_pkt_m_by; + _T_93_half <= io_lsu_pkt_m_half; + _T_93_word <= io_lsu_pkt_m_word; + _T_93_dword <= io_lsu_pkt_m_dword; + _T_93_load <= io_lsu_pkt_m_load; + _T_93_store <= io_lsu_pkt_m_store; + _T_93_unsign <= io_lsu_pkt_m_unsign; + _T_93_dma <= io_lsu_pkt_m_dma; + _T_93_store_data_bypass_d <= io_lsu_pkt_m_store_data_bypass_d; + _T_93_load_ldst_bypass_d <= io_lsu_pkt_m_load_ldst_bypass_d; + _T_93_store_data_bypass_m <= io_lsu_pkt_m_store_data_bypass_m; + _T_93_valid <= io_lsu_pkt_m_valid & _T_90; + end +endmodule diff --git a/el2_lsu_stbuf.anno.json b/el2_lsu_stbuf.anno.json index 49852e4f..0ef680a2 100644 --- a/el2_lsu_stbuf.anno.json +++ b/el2_lsu_stbuf.anno.json @@ -1,10 +1,20 @@ [ { "class":"firrtl.transforms.CombinationalPath", - "sink":"~el2_lsu_stbuf|el2_lsu_stbuf>io_stbuf_fwdbyteen_lo_m", + "sink":"~el2_lsu_stbuf|el2_lsu_stbuf>io_stbuf_fwdbyteen_hi_m", "sources":[ "~el2_lsu_stbuf|el2_lsu_stbuf>io_addr_in_dccm_m", - "~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_addr_m" + "~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_store", + "~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_dma", + "~el2_lsu_stbuf|el2_lsu_stbuf>io_store_stbuf_reqvld_r", + "~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_valid", + "~el2_lsu_stbuf|el2_lsu_stbuf>io_end_addr_m", + "~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_addr_r", + "~el2_lsu_stbuf|el2_lsu_stbuf>io_end_addr_r", + "~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_dword", + "~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_word", + "~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_by", + "~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_half" ] }, { @@ -50,11 +60,11 @@ "sources":[ "~el2_lsu_stbuf|el2_lsu_stbuf>io_store_data_lo_r", "~el2_lsu_stbuf|el2_lsu_stbuf>io_store_data_hi_r", + "~el2_lsu_stbuf|el2_lsu_stbuf>io_addr_in_dccm_m", "~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_store", "~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_dma", - "~el2_lsu_stbuf|el2_lsu_stbuf>io_addr_in_dccm_m", - "~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_valid", "~el2_lsu_stbuf|el2_lsu_stbuf>io_store_stbuf_reqvld_r", + "~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_valid", "~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_addr_m", "~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_addr_r", "~el2_lsu_stbuf|el2_lsu_stbuf>io_end_addr_r", @@ -70,11 +80,11 @@ "sources":[ "~el2_lsu_stbuf|el2_lsu_stbuf>io_store_data_lo_r", "~el2_lsu_stbuf|el2_lsu_stbuf>io_store_data_hi_r", + "~el2_lsu_stbuf|el2_lsu_stbuf>io_addr_in_dccm_m", "~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_store", "~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_dma", - "~el2_lsu_stbuf|el2_lsu_stbuf>io_addr_in_dccm_m", - "~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_valid", "~el2_lsu_stbuf|el2_lsu_stbuf>io_store_stbuf_reqvld_r", + "~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_valid", "~el2_lsu_stbuf|el2_lsu_stbuf>io_end_addr_m", "~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_addr_r", "~el2_lsu_stbuf|el2_lsu_stbuf>io_end_addr_r", @@ -86,10 +96,20 @@ }, { "class":"firrtl.transforms.CombinationalPath", - "sink":"~el2_lsu_stbuf|el2_lsu_stbuf>io_stbuf_fwdbyteen_hi_m", + "sink":"~el2_lsu_stbuf|el2_lsu_stbuf>io_stbuf_fwdbyteen_lo_m", "sources":[ "~el2_lsu_stbuf|el2_lsu_stbuf>io_addr_in_dccm_m", - "~el2_lsu_stbuf|el2_lsu_stbuf>io_end_addr_m" + "~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_store", + "~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_dma", + "~el2_lsu_stbuf|el2_lsu_stbuf>io_store_stbuf_reqvld_r", + "~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_valid", + "~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_addr_m", + "~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_addr_r", + "~el2_lsu_stbuf|el2_lsu_stbuf>io_end_addr_r", + "~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_dword", + "~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_word", + "~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_by", + "~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_half" ] }, { diff --git a/el2_lsu_stbuf.fir b/el2_lsu_stbuf.fir index 9e5eb184..96e59ec8 100644 --- a/el2_lsu_stbuf.fir +++ b/el2_lsu_stbuf.fir @@ -2,58 +2,62 @@ circuit el2_lsu_stbuf : module el2_lsu_stbuf : input clock : Clock - input reset : UInt<1> + input reset : AsyncReset output io : {flip lsu_c1_m_clk : Clock, flip lsu_c1_r_clk : Clock, flip lsu_stbuf_c1_clk : Clock, flip lsu_free_c2_clk : Clock, flip lsu_pkt_m : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip lsu_pkt_r : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip store_stbuf_reqvld_r : UInt<1>, flip lsu_commit_r : UInt<1>, flip dec_lsu_valid_raw_d : UInt<1>, flip store_data_hi_r : UInt<32>, flip store_data_lo_r : UInt<32>, flip store_datafn_hi_r : UInt<32>, flip store_datafn_lo_r : UInt<32>, flip lsu_stbuf_commit_any : UInt<1>, flip lsu_addr_d : UInt<16>, flip lsu_addr_m : UInt<32>, flip lsu_addr_r : UInt<32>, flip end_addr_d : UInt<16>, flip end_addr_m : UInt<32>, flip end_addr_r : UInt<32>, flip addr_in_dccm_m : UInt<1>, flip addr_in_dccm_r : UInt<1>, flip lsu_cmpen_m : UInt<1>, flip scan_mode : UInt<1>, stbuf_reqvld_any : UInt<1>, stbuf_reqvld_flushed_any : UInt<1>, stbuf_addr_any : UInt<16>, stbuf_data_any : UInt<32>, lsu_stbuf_full_any : UInt<1>, lsu_stbuf_empty_any : UInt<1>, ldst_stbuf_reqvld_r : UInt<1>, stbuf_fwddata_hi_m : UInt<32>, stbuf_fwddata_lo_m : UInt<32>, stbuf_fwdbyteen_hi_m : UInt<4>, stbuf_fwdbyteen_lo_m : UInt<4>} - io.stbuf_reqvld_any <= UInt<1>("h00") @[el2_lsu_stbuf.scala 50:47] - io.stbuf_reqvld_flushed_any <= UInt<1>("h00") @[el2_lsu_stbuf.scala 51:36] - io.stbuf_addr_any <= UInt<1>("h00") @[el2_lsu_stbuf.scala 52:35] - io.stbuf_data_any <= UInt<1>("h00") @[el2_lsu_stbuf.scala 53:35] - io.lsu_stbuf_full_any <= UInt<1>("h00") @[el2_lsu_stbuf.scala 54:43] - io.lsu_stbuf_empty_any <= UInt<1>("h00") @[el2_lsu_stbuf.scala 55:43] - io.ldst_stbuf_reqvld_r <= UInt<1>("h00") @[el2_lsu_stbuf.scala 56:43] - io.stbuf_fwddata_hi_m <= UInt<1>("h00") @[el2_lsu_stbuf.scala 57:43] - io.stbuf_fwddata_lo_m <= UInt<1>("h00") @[el2_lsu_stbuf.scala 58:43] - io.stbuf_fwdbyteen_hi_m <= UInt<1>("h00") @[el2_lsu_stbuf.scala 59:37] - io.stbuf_fwdbyteen_lo_m <= UInt<1>("h00") @[el2_lsu_stbuf.scala 60:37] - wire stbuf_vld : UInt<1>[4] @[el2_lsu_stbuf.scala 63:39] + io.stbuf_reqvld_any <= UInt<1>("h00") @[el2_lsu_stbuf.scala 52:47] + io.stbuf_reqvld_flushed_any <= UInt<1>("h00") @[el2_lsu_stbuf.scala 53:36] + io.stbuf_addr_any <= UInt<1>("h00") @[el2_lsu_stbuf.scala 54:35] + io.stbuf_data_any <= UInt<1>("h00") @[el2_lsu_stbuf.scala 55:35] + io.lsu_stbuf_full_any <= UInt<1>("h00") @[el2_lsu_stbuf.scala 56:43] + io.lsu_stbuf_empty_any <= UInt<1>("h00") @[el2_lsu_stbuf.scala 57:43] + io.ldst_stbuf_reqvld_r <= UInt<1>("h00") @[el2_lsu_stbuf.scala 58:43] + io.stbuf_fwddata_hi_m <= UInt<1>("h00") @[el2_lsu_stbuf.scala 59:43] + io.stbuf_fwddata_lo_m <= UInt<1>("h00") @[el2_lsu_stbuf.scala 60:43] + io.stbuf_fwdbyteen_hi_m <= UInt<1>("h00") @[el2_lsu_stbuf.scala 61:37] + io.stbuf_fwdbyteen_lo_m <= UInt<1>("h00") @[el2_lsu_stbuf.scala 62:37] + wire stbuf_vld : UInt<4> + stbuf_vld <= UInt<1>("h00") + wire stbuf_wr_en : UInt<4> + stbuf_wr_en <= UInt<1>("h00") wire stbuf_dma_kill_en : UInt<4> stbuf_dma_kill_en <= UInt<1>("h00") - wire stbuf_dma_kill : UInt<1>[4] @[el2_lsu_stbuf.scala 65:39] + wire stbuf_dma_kill : UInt<4> + stbuf_dma_kill <= UInt<1>("h00") wire stbuf_reset : UInt<4> stbuf_reset <= UInt<1>("h00") wire store_byteen_ext_r : UInt<8> store_byteen_ext_r <= UInt<1>("h00") - wire stbuf_addr : UInt<16>[4] @[el2_lsu_stbuf.scala 68:39] - stbuf_addr[0] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 69:15] - stbuf_addr[1] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 69:15] - stbuf_addr[2] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 69:15] - stbuf_addr[3] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 69:15] - wire stbuf_byteen : UInt<4>[4] @[el2_lsu_stbuf.scala 70:39] - stbuf_byteen[0] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 71:17] - stbuf_byteen[1] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 71:17] - stbuf_byteen[2] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 71:17] - stbuf_byteen[3] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 71:17] - wire stbuf_data : UInt<32>[4] @[el2_lsu_stbuf.scala 72:39] - stbuf_data[0] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 73:15] - stbuf_data[1] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 73:15] - stbuf_data[2] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 73:15] - stbuf_data[3] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 73:15] - wire stbuf_addrin : UInt<16>[4] @[el2_lsu_stbuf.scala 74:39] - stbuf_addrin[0] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 75:17] - stbuf_addrin[1] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 75:17] - stbuf_addrin[2] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 75:17] - stbuf_addrin[3] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 75:17] - wire stbuf_datain : UInt<32>[4] @[el2_lsu_stbuf.scala 76:39] - stbuf_datain[0] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 77:17] - stbuf_datain[1] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 77:17] - stbuf_datain[2] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 77:17] - stbuf_datain[3] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 77:17] - wire stbuf_byteenin : UInt<4>[4] @[el2_lsu_stbuf.scala 78:39] - stbuf_byteenin[0] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 79:19] - stbuf_byteenin[1] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 79:19] - stbuf_byteenin[2] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 79:19] - stbuf_byteenin[3] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 79:19] + wire stbuf_addr : UInt<16>[4] @[el2_lsu_stbuf.scala 71:38] + stbuf_addr[0] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 72:14] + stbuf_addr[1] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 72:14] + stbuf_addr[2] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 72:14] + stbuf_addr[3] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 72:14] + wire stbuf_byteen : UInt<4>[4] @[el2_lsu_stbuf.scala 73:39] + stbuf_byteen[0] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 74:17] + stbuf_byteen[1] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 74:17] + stbuf_byteen[2] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 74:17] + stbuf_byteen[3] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 74:17] + wire stbuf_data : UInt<32>[4] @[el2_lsu_stbuf.scala 75:39] + stbuf_data[0] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 76:15] + stbuf_data[1] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 76:15] + stbuf_data[2] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 76:15] + stbuf_data[3] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 76:15] + wire stbuf_addrin : UInt<16>[4] @[el2_lsu_stbuf.scala 77:38] + stbuf_addrin[0] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 78:16] + stbuf_addrin[1] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 78:16] + stbuf_addrin[2] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 78:16] + stbuf_addrin[3] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 78:16] + wire stbuf_datain : UInt<32>[4] @[el2_lsu_stbuf.scala 79:39] + stbuf_datain[0] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 80:17] + stbuf_datain[1] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 80:17] + stbuf_datain[2] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 80:17] + stbuf_datain[3] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 80:17] + wire stbuf_byteenin : UInt<4>[4] @[el2_lsu_stbuf.scala 81:39] + stbuf_byteenin[0] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 82:19] + stbuf_byteenin[1] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 82:19] + stbuf_byteenin[2] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 82:19] + stbuf_byteenin[3] <= UInt<1>("h00") @[el2_lsu_stbuf.scala 82:19] wire WrPtr : UInt<2> WrPtr <= UInt<1>("h00") wire RdPtr : UInt<2> @@ -74,13 +78,13 @@ circuit el2_lsu_stbuf : stbuf_fwdata_hi_pre_m <= UInt<1>("h00") wire stbuf_fwdata_lo_pre_m : UInt<32> stbuf_fwdata_lo_pre_m <= UInt<1>("h00") - wire ld_byte_rhit_lo_lo : UInt<32> + wire ld_byte_rhit_lo_lo : UInt<4> ld_byte_rhit_lo_lo <= UInt<1>("h00") - wire ld_byte_rhit_hi_lo : UInt<32> + wire ld_byte_rhit_hi_lo : UInt<4> ld_byte_rhit_hi_lo <= UInt<1>("h00") - wire ld_byte_rhit_lo_hi : UInt<32> + wire ld_byte_rhit_lo_hi : UInt<4> ld_byte_rhit_lo_hi <= UInt<1>("h00") - wire ld_byte_rhit_hi_hi : UInt<32> + wire ld_byte_rhit_hi_hi : UInt<4> ld_byte_rhit_hi_hi <= UInt<1>("h00") wire ld_byte_hit_lo : UInt<4> ld_byte_hit_lo <= UInt<1>("h00") @@ -96,1440 +100,1543 @@ circuit el2_lsu_stbuf : ld_fwddata_rpipe_lo <= UInt<1>("h00") wire ld_fwddata_rpipe_hi : UInt<32> ld_fwddata_rpipe_hi <= UInt<1>("h00") - wire datain1 : UInt<8>[4] @[el2_lsu_stbuf.scala 102:34] - wire datain2 : UInt<8>[4] @[el2_lsu_stbuf.scala 103:34] - wire datain3 : UInt<8>[4] @[el2_lsu_stbuf.scala 104:34] - wire datain4 : UInt<8>[4] @[el2_lsu_stbuf.scala 105:34] - node _T = bits(io.lsu_pkt_r.by, 0, 0) @[Bitwise.scala 72:15] - node _T_1 = mux(_T, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] - node _T_2 = and(_T_1, UInt<1>("h01")) @[el2_lsu_stbuf.scala 108:49] - node _T_3 = bits(io.lsu_pkt_r.half, 0, 0) @[Bitwise.scala 72:15] - node _T_4 = mux(_T_3, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] - node _T_5 = and(_T_4, UInt<2>("h03")) @[el2_lsu_stbuf.scala 109:32] - node _T_6 = or(_T_2, _T_5) @[el2_lsu_stbuf.scala 108:65] - node _T_7 = bits(io.lsu_pkt_r.word, 0, 0) @[Bitwise.scala 72:15] - node _T_8 = mux(_T_7, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] - node _T_9 = and(_T_8, UInt<4>("h0f")) @[el2_lsu_stbuf.scala 110:32] - node _T_10 = or(_T_6, _T_9) @[el2_lsu_stbuf.scala 109:48] - node _T_11 = bits(io.lsu_pkt_r.dword, 0, 0) @[Bitwise.scala 72:15] - node _T_12 = mux(_T_11, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] - node _T_13 = and(_T_12, UInt<8>("h0ff")) @[el2_lsu_stbuf.scala 111:33] - node ldst_byteen_r = or(_T_10, _T_13) @[el2_lsu_stbuf.scala 110:48] - node _T_14 = bits(io.lsu_addr_d, 2, 2) @[el2_lsu_stbuf.scala 112:36] - node _T_15 = bits(io.end_addr_d, 2, 2) @[el2_lsu_stbuf.scala 112:57] - node ldst_dual_d = neq(_T_14, _T_15) @[el2_lsu_stbuf.scala 112:40] - node dual_stbuf_write_r = and(ldst_dual_r, io.store_stbuf_reqvld_r) @[el2_lsu_stbuf.scala 113:41] - node _T_16 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_stbuf.scala 115:56] - node _T_17 = dshl(ldst_byteen_r, _T_16) @[el2_lsu_stbuf.scala 115:40] - store_byteen_ext_r <= _T_17 @[el2_lsu_stbuf.scala 115:23] - node _T_18 = bits(store_byteen_ext_r, 7, 4) @[el2_lsu_stbuf.scala 116:47] - node _T_19 = bits(io.lsu_pkt_m.store, 0, 0) @[Bitwise.scala 72:15] + wire datain1 : UInt<8>[4] @[el2_lsu_stbuf.scala 106:34] + wire datain2 : UInt<8>[4] @[el2_lsu_stbuf.scala 107:34] + wire datain3 : UInt<8>[4] @[el2_lsu_stbuf.scala 108:34] + wire datain4 : UInt<8>[4] @[el2_lsu_stbuf.scala 109:34] + node _T = bits(io.lsu_pkt_r.by, 0, 0) @[el2_lsu_stbuf.scala 113:22] + node _T_1 = bits(io.lsu_pkt_r.half, 0, 0) @[el2_lsu_stbuf.scala 114:24] + node _T_2 = bits(io.lsu_pkt_r.word, 0, 0) @[el2_lsu_stbuf.scala 115:24] + node _T_3 = bits(io.lsu_pkt_r.dword, 0, 0) @[el2_lsu_stbuf.scala 116:25] + node _T_4 = mux(_T, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_5 = mux(_T_1, UInt<2>("h03"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_6 = mux(_T_2, UInt<4>("h0f"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_7 = mux(_T_3, UInt<8>("h0ff"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_8 = or(_T_4, _T_5) @[Mux.scala 27:72] + node _T_9 = or(_T_8, _T_6) @[Mux.scala 27:72] + node _T_10 = or(_T_9, _T_7) @[Mux.scala 27:72] + wire ldst_byteen_r : UInt<8> @[Mux.scala 27:72] + ldst_byteen_r <= _T_10 @[Mux.scala 27:72] + node _T_11 = bits(io.lsu_addr_d, 2, 2) @[el2_lsu_stbuf.scala 118:36] + node _T_12 = bits(io.end_addr_d, 2, 2) @[el2_lsu_stbuf.scala 118:57] + node ldst_dual_d = neq(_T_11, _T_12) @[el2_lsu_stbuf.scala 118:40] + node dual_stbuf_write_r = and(ldst_dual_r, io.store_stbuf_reqvld_r) @[el2_lsu_stbuf.scala 119:41] + node _T_13 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_stbuf.scala 121:56] + node _T_14 = dshl(ldst_byteen_r, _T_13) @[el2_lsu_stbuf.scala 121:40] + store_byteen_ext_r <= _T_14 @[el2_lsu_stbuf.scala 121:23] + node _T_15 = bits(store_byteen_ext_r, 7, 4) @[el2_lsu_stbuf.scala 122:46] + node _T_16 = bits(io.lsu_pkt_r.store, 0, 0) @[Bitwise.scala 72:15] + node _T_17 = mux(_T_16, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node store_byteen_hi_r = and(_T_15, _T_17) @[el2_lsu_stbuf.scala 122:52] + node _T_18 = bits(store_byteen_ext_r, 3, 0) @[el2_lsu_stbuf.scala 123:46] + node _T_19 = bits(io.lsu_pkt_r.store, 0, 0) @[Bitwise.scala 72:15] node _T_20 = mux(_T_19, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] - node store_byteen_hi_r = and(_T_18, _T_20) @[el2_lsu_stbuf.scala 116:53] - node _T_21 = bits(store_byteen_ext_r, 3, 0) @[el2_lsu_stbuf.scala 117:47] - node _T_22 = bits(io.lsu_pkt_m.store, 0, 0) @[Bitwise.scala 72:15] - node _T_23 = mux(_T_22, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] - node store_byteen_lo_r = and(_T_21, _T_23) @[el2_lsu_stbuf.scala 117:53] - node _T_24 = add(RdPtr, UInt<1>("h01")) @[el2_lsu_stbuf.scala 118:27] - node NxtRdPtr = tail(_T_24, 1) @[el2_lsu_stbuf.scala 118:27] - node _T_25 = add(WrPtr, UInt<1>("h01")) @[el2_lsu_stbuf.scala 119:27] - node WrPtrPlus1 = tail(_T_25, 1) @[el2_lsu_stbuf.scala 119:27] - node _T_26 = add(WrPtr, UInt<2>("h02")) @[el2_lsu_stbuf.scala 120:27] - node WrPtrPlus2 = tail(_T_26, 1) @[el2_lsu_stbuf.scala 120:27] - node _T_27 = and(io.lsu_commit_r, io.store_stbuf_reqvld_r) @[el2_lsu_stbuf.scala 122:46] - io.ldst_stbuf_reqvld_r <= _T_27 @[el2_lsu_stbuf.scala 122:27] - node _T_28 = bits(stbuf_addr[0], 15, 2) @[el2_lsu_stbuf.scala 124:79] - node _T_29 = bits(io.lsu_addr_r, 15, 2) @[el2_lsu_stbuf.scala 124:138] - node _T_30 = eq(_T_28, _T_29) @[el2_lsu_stbuf.scala 124:121] - node _T_31 = and(_T_30, stbuf_vld[0]) @[el2_lsu_stbuf.scala 124:181] - node _T_32 = eq(stbuf_dma_kill[0], UInt<1>("h00")) @[el2_lsu_stbuf.scala 124:198] - node _T_33 = and(_T_31, _T_32) @[el2_lsu_stbuf.scala 124:196] - node _T_34 = bits(stbuf_reset, 0, 0) @[el2_lsu_stbuf.scala 124:231] - node _T_35 = eq(_T_34, UInt<1>("h00")) @[el2_lsu_stbuf.scala 124:219] - node _T_36 = and(_T_33, _T_35) @[el2_lsu_stbuf.scala 124:217] - node _T_37 = bits(stbuf_addr[1], 15, 2) @[el2_lsu_stbuf.scala 124:79] - node _T_38 = bits(io.lsu_addr_r, 15, 2) @[el2_lsu_stbuf.scala 124:138] - node _T_39 = eq(_T_37, _T_38) @[el2_lsu_stbuf.scala 124:121] - node _T_40 = and(_T_39, stbuf_vld[1]) @[el2_lsu_stbuf.scala 124:181] - node _T_41 = eq(stbuf_dma_kill[1], UInt<1>("h00")) @[el2_lsu_stbuf.scala 124:198] - node _T_42 = and(_T_40, _T_41) @[el2_lsu_stbuf.scala 124:196] - node _T_43 = bits(stbuf_reset, 1, 1) @[el2_lsu_stbuf.scala 124:231] - node _T_44 = eq(_T_43, UInt<1>("h00")) @[el2_lsu_stbuf.scala 124:219] - node _T_45 = and(_T_42, _T_44) @[el2_lsu_stbuf.scala 124:217] - node _T_46 = bits(stbuf_addr[2], 15, 2) @[el2_lsu_stbuf.scala 124:79] - node _T_47 = bits(io.lsu_addr_r, 15, 2) @[el2_lsu_stbuf.scala 124:138] - node _T_48 = eq(_T_46, _T_47) @[el2_lsu_stbuf.scala 124:121] - node _T_49 = and(_T_48, stbuf_vld[2]) @[el2_lsu_stbuf.scala 124:181] - node _T_50 = eq(stbuf_dma_kill[2], UInt<1>("h00")) @[el2_lsu_stbuf.scala 124:198] - node _T_51 = and(_T_49, _T_50) @[el2_lsu_stbuf.scala 124:196] - node _T_52 = bits(stbuf_reset, 2, 2) @[el2_lsu_stbuf.scala 124:231] - node _T_53 = eq(_T_52, UInt<1>("h00")) @[el2_lsu_stbuf.scala 124:219] - node _T_54 = and(_T_51, _T_53) @[el2_lsu_stbuf.scala 124:217] - node _T_55 = bits(stbuf_addr[3], 15, 2) @[el2_lsu_stbuf.scala 124:79] - node _T_56 = bits(io.lsu_addr_r, 15, 2) @[el2_lsu_stbuf.scala 124:138] - node _T_57 = eq(_T_55, _T_56) @[el2_lsu_stbuf.scala 124:121] - node _T_58 = and(_T_57, stbuf_vld[3]) @[el2_lsu_stbuf.scala 124:181] - node _T_59 = eq(stbuf_dma_kill[3], UInt<1>("h00")) @[el2_lsu_stbuf.scala 124:198] - node _T_60 = and(_T_58, _T_59) @[el2_lsu_stbuf.scala 124:196] - node _T_61 = bits(stbuf_reset, 3, 3) @[el2_lsu_stbuf.scala 124:231] - node _T_62 = eq(_T_61, UInt<1>("h00")) @[el2_lsu_stbuf.scala 124:219] - node _T_63 = and(_T_60, _T_62) @[el2_lsu_stbuf.scala 124:217] - node _T_64 = cat(_T_63, _T_54) @[Cat.scala 29:58] - node _T_65 = cat(_T_64, _T_45) @[Cat.scala 29:58] - node store_matchvec_lo_r = cat(_T_65, _T_36) @[Cat.scala 29:58] - node _T_66 = bits(stbuf_addr[0], 15, 2) @[el2_lsu_stbuf.scala 125:79] - node _T_67 = bits(io.end_addr_r, 15, 2) @[el2_lsu_stbuf.scala 125:138] - node _T_68 = eq(_T_66, _T_67) @[el2_lsu_stbuf.scala 125:121] - node _T_69 = and(_T_68, stbuf_vld[0]) @[el2_lsu_stbuf.scala 125:181] - node _T_70 = eq(stbuf_dma_kill[0], UInt<1>("h00")) @[el2_lsu_stbuf.scala 125:198] - node _T_71 = and(_T_69, _T_70) @[el2_lsu_stbuf.scala 125:196] - node _T_72 = and(_T_71, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 125:217] - node _T_73 = bits(stbuf_reset, 0, 0) @[el2_lsu_stbuf.scala 125:252] - node _T_74 = eq(_T_73, UInt<1>("h00")) @[el2_lsu_stbuf.scala 125:240] - node _T_75 = and(_T_72, _T_74) @[el2_lsu_stbuf.scala 125:238] - node _T_76 = bits(stbuf_addr[1], 15, 2) @[el2_lsu_stbuf.scala 125:79] - node _T_77 = bits(io.end_addr_r, 15, 2) @[el2_lsu_stbuf.scala 125:138] - node _T_78 = eq(_T_76, _T_77) @[el2_lsu_stbuf.scala 125:121] - node _T_79 = and(_T_78, stbuf_vld[1]) @[el2_lsu_stbuf.scala 125:181] - node _T_80 = eq(stbuf_dma_kill[1], UInt<1>("h00")) @[el2_lsu_stbuf.scala 125:198] - node _T_81 = and(_T_79, _T_80) @[el2_lsu_stbuf.scala 125:196] - node _T_82 = and(_T_81, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 125:217] - node _T_83 = bits(stbuf_reset, 1, 1) @[el2_lsu_stbuf.scala 125:252] - node _T_84 = eq(_T_83, UInt<1>("h00")) @[el2_lsu_stbuf.scala 125:240] - node _T_85 = and(_T_82, _T_84) @[el2_lsu_stbuf.scala 125:238] - node _T_86 = bits(stbuf_addr[2], 15, 2) @[el2_lsu_stbuf.scala 125:79] - node _T_87 = bits(io.end_addr_r, 15, 2) @[el2_lsu_stbuf.scala 125:138] - node _T_88 = eq(_T_86, _T_87) @[el2_lsu_stbuf.scala 125:121] - node _T_89 = and(_T_88, stbuf_vld[2]) @[el2_lsu_stbuf.scala 125:181] - node _T_90 = eq(stbuf_dma_kill[2], UInt<1>("h00")) @[el2_lsu_stbuf.scala 125:198] - node _T_91 = and(_T_89, _T_90) @[el2_lsu_stbuf.scala 125:196] - node _T_92 = and(_T_91, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 125:217] - node _T_93 = bits(stbuf_reset, 2, 2) @[el2_lsu_stbuf.scala 125:252] - node _T_94 = eq(_T_93, UInt<1>("h00")) @[el2_lsu_stbuf.scala 125:240] - node _T_95 = and(_T_92, _T_94) @[el2_lsu_stbuf.scala 125:238] - node _T_96 = bits(stbuf_addr[3], 15, 2) @[el2_lsu_stbuf.scala 125:79] - node _T_97 = bits(io.end_addr_r, 15, 2) @[el2_lsu_stbuf.scala 125:138] - node _T_98 = eq(_T_96, _T_97) @[el2_lsu_stbuf.scala 125:121] - node _T_99 = and(_T_98, stbuf_vld[3]) @[el2_lsu_stbuf.scala 125:181] - node _T_100 = eq(stbuf_dma_kill[3], UInt<1>("h00")) @[el2_lsu_stbuf.scala 125:198] - node _T_101 = and(_T_99, _T_100) @[el2_lsu_stbuf.scala 125:196] - node _T_102 = and(_T_101, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 125:217] - node _T_103 = bits(stbuf_reset, 3, 3) @[el2_lsu_stbuf.scala 125:252] - node _T_104 = eq(_T_103, UInt<1>("h00")) @[el2_lsu_stbuf.scala 125:240] - node _T_105 = and(_T_102, _T_104) @[el2_lsu_stbuf.scala 125:238] - node _T_106 = cat(_T_105, _T_95) @[Cat.scala 29:58] - node _T_107 = cat(_T_106, _T_85) @[Cat.scala 29:58] - node store_matchvec_hi_r = cat(_T_107, _T_75) @[Cat.scala 29:58] - node store_coalesce_lo_r = orr(store_matchvec_lo_r) @[el2_lsu_stbuf.scala 127:50] - node store_coalesce_hi_r = orr(store_matchvec_hi_r) @[el2_lsu_stbuf.scala 128:50] - node _T_108 = eq(store_coalesce_lo_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 130:104] - node _T_109 = and(UInt<1>("h00"), _T_108) @[el2_lsu_stbuf.scala 130:102] - node _T_110 = and(io.ldst_stbuf_reqvld_r, _T_109) @[el2_lsu_stbuf.scala 130:79] - node _T_111 = eq(dual_stbuf_write_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 130:151] - node _T_112 = and(UInt<1>("h00"), _T_111) @[el2_lsu_stbuf.scala 130:149] - node _T_113 = eq(store_coalesce_hi_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 130:173] - node _T_114 = and(_T_112, _T_113) @[el2_lsu_stbuf.scala 130:171] - node _T_115 = or(_T_110, _T_114) @[el2_lsu_stbuf.scala 130:126] - node _T_116 = and(UInt<1>("h00"), dual_stbuf_write_r) @[el2_lsu_stbuf.scala 131:32] - node _T_117 = or(store_coalesce_lo_r, store_coalesce_hi_r) @[el2_lsu_stbuf.scala 131:77] - node _T_118 = eq(_T_117, UInt<1>("h00")) @[el2_lsu_stbuf.scala 131:55] - node _T_119 = and(_T_116, _T_118) @[el2_lsu_stbuf.scala 131:53] - node _T_120 = or(_T_115, _T_119) @[el2_lsu_stbuf.scala 130:195] - node _T_121 = bits(store_matchvec_lo_r, 0, 0) @[el2_lsu_stbuf.scala 131:122] - node _T_122 = or(_T_120, _T_121) @[el2_lsu_stbuf.scala 131:101] - node _T_123 = bits(store_matchvec_hi_r, 0, 0) @[el2_lsu_stbuf.scala 131:147] - node _T_124 = or(_T_122, _T_123) @[el2_lsu_stbuf.scala 131:126] - node _T_125 = eq(store_coalesce_lo_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 130:104] - node _T_126 = and(UInt<1>("h00"), _T_125) @[el2_lsu_stbuf.scala 130:102] - node _T_127 = and(io.ldst_stbuf_reqvld_r, _T_126) @[el2_lsu_stbuf.scala 130:79] - node _T_128 = eq(dual_stbuf_write_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 130:151] - node _T_129 = and(UInt<1>("h00"), _T_128) @[el2_lsu_stbuf.scala 130:149] - node _T_130 = eq(store_coalesce_hi_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 130:173] - node _T_131 = and(_T_129, _T_130) @[el2_lsu_stbuf.scala 130:171] - node _T_132 = or(_T_127, _T_131) @[el2_lsu_stbuf.scala 130:126] - node _T_133 = and(UInt<1>("h00"), dual_stbuf_write_r) @[el2_lsu_stbuf.scala 131:32] - node _T_134 = or(store_coalesce_lo_r, store_coalesce_hi_r) @[el2_lsu_stbuf.scala 131:77] - node _T_135 = eq(_T_134, UInt<1>("h00")) @[el2_lsu_stbuf.scala 131:55] - node _T_136 = and(_T_133, _T_135) @[el2_lsu_stbuf.scala 131:53] - node _T_137 = or(_T_132, _T_136) @[el2_lsu_stbuf.scala 130:195] - node _T_138 = bits(store_matchvec_lo_r, 1, 1) @[el2_lsu_stbuf.scala 131:122] - node _T_139 = or(_T_137, _T_138) @[el2_lsu_stbuf.scala 131:101] - node _T_140 = bits(store_matchvec_hi_r, 1, 1) @[el2_lsu_stbuf.scala 131:147] - node _T_141 = or(_T_139, _T_140) @[el2_lsu_stbuf.scala 131:126] - node _T_142 = eq(store_coalesce_lo_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 130:104] - node _T_143 = and(UInt<1>("h00"), _T_142) @[el2_lsu_stbuf.scala 130:102] - node _T_144 = and(io.ldst_stbuf_reqvld_r, _T_143) @[el2_lsu_stbuf.scala 130:79] - node _T_145 = eq(dual_stbuf_write_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 130:151] - node _T_146 = and(UInt<1>("h00"), _T_145) @[el2_lsu_stbuf.scala 130:149] - node _T_147 = eq(store_coalesce_hi_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 130:173] - node _T_148 = and(_T_146, _T_147) @[el2_lsu_stbuf.scala 130:171] - node _T_149 = or(_T_144, _T_148) @[el2_lsu_stbuf.scala 130:126] - node _T_150 = and(UInt<1>("h00"), dual_stbuf_write_r) @[el2_lsu_stbuf.scala 131:32] - node _T_151 = or(store_coalesce_lo_r, store_coalesce_hi_r) @[el2_lsu_stbuf.scala 131:77] - node _T_152 = eq(_T_151, UInt<1>("h00")) @[el2_lsu_stbuf.scala 131:55] - node _T_153 = and(_T_150, _T_152) @[el2_lsu_stbuf.scala 131:53] - node _T_154 = or(_T_149, _T_153) @[el2_lsu_stbuf.scala 130:195] - node _T_155 = bits(store_matchvec_lo_r, 2, 2) @[el2_lsu_stbuf.scala 131:122] - node _T_156 = or(_T_154, _T_155) @[el2_lsu_stbuf.scala 131:101] - node _T_157 = bits(store_matchvec_hi_r, 2, 2) @[el2_lsu_stbuf.scala 131:147] - node _T_158 = or(_T_156, _T_157) @[el2_lsu_stbuf.scala 131:126] - node _T_159 = eq(store_coalesce_lo_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 130:104] - node _T_160 = and(UInt<1>("h00"), _T_159) @[el2_lsu_stbuf.scala 130:102] - node _T_161 = and(io.ldst_stbuf_reqvld_r, _T_160) @[el2_lsu_stbuf.scala 130:79] - node _T_162 = eq(dual_stbuf_write_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 130:151] - node _T_163 = and(UInt<1>("h00"), _T_162) @[el2_lsu_stbuf.scala 130:149] - node _T_164 = eq(store_coalesce_hi_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 130:173] - node _T_165 = and(_T_163, _T_164) @[el2_lsu_stbuf.scala 130:171] - node _T_166 = or(_T_161, _T_165) @[el2_lsu_stbuf.scala 130:126] - node _T_167 = and(UInt<1>("h00"), dual_stbuf_write_r) @[el2_lsu_stbuf.scala 131:32] - node _T_168 = or(store_coalesce_lo_r, store_coalesce_hi_r) @[el2_lsu_stbuf.scala 131:77] - node _T_169 = eq(_T_168, UInt<1>("h00")) @[el2_lsu_stbuf.scala 131:55] - node _T_170 = and(_T_167, _T_169) @[el2_lsu_stbuf.scala 131:53] - node _T_171 = or(_T_166, _T_170) @[el2_lsu_stbuf.scala 130:195] - node _T_172 = bits(store_matchvec_lo_r, 3, 3) @[el2_lsu_stbuf.scala 131:122] - node _T_173 = or(_T_171, _T_172) @[el2_lsu_stbuf.scala 131:101] - node _T_174 = bits(store_matchvec_hi_r, 3, 3) @[el2_lsu_stbuf.scala 131:147] - node _T_175 = or(_T_173, _T_174) @[el2_lsu_stbuf.scala 131:126] - node _T_176 = cat(_T_175, _T_158) @[Cat.scala 29:58] - node _T_177 = cat(_T_176, _T_141) @[Cat.scala 29:58] - node stbuf_wr_en = cat(_T_177, _T_124) @[Cat.scala 29:58] - node _T_178 = or(io.lsu_stbuf_commit_any, io.stbuf_reqvld_flushed_any) @[el2_lsu_stbuf.scala 132:78] - node _T_179 = and(_T_178, UInt<1>("h00")) @[el2_lsu_stbuf.scala 132:109] - node _T_180 = or(io.lsu_stbuf_commit_any, io.stbuf_reqvld_flushed_any) @[el2_lsu_stbuf.scala 132:78] - node _T_181 = and(_T_180, UInt<1>("h00")) @[el2_lsu_stbuf.scala 132:109] - node _T_182 = or(io.lsu_stbuf_commit_any, io.stbuf_reqvld_flushed_any) @[el2_lsu_stbuf.scala 132:78] - node _T_183 = and(_T_182, UInt<1>("h00")) @[el2_lsu_stbuf.scala 132:109] - node _T_184 = or(io.lsu_stbuf_commit_any, io.stbuf_reqvld_flushed_any) @[el2_lsu_stbuf.scala 132:78] - node _T_185 = and(_T_184, UInt<1>("h00")) @[el2_lsu_stbuf.scala 132:109] - node _T_186 = cat(_T_185, _T_183) @[Cat.scala 29:58] - node _T_187 = cat(_T_186, _T_181) @[Cat.scala 29:58] - node _T_188 = cat(_T_187, _T_179) @[Cat.scala 29:58] - stbuf_reset <= _T_188 @[el2_lsu_stbuf.scala 132:16] - node _T_189 = eq(ldst_dual_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 133:52] - node _T_190 = or(_T_189, io.store_stbuf_reqvld_r) @[el2_lsu_stbuf.scala 133:65] - node _T_191 = and(_T_190, UInt<1>("h00")) @[el2_lsu_stbuf.scala 133:92] - node _T_192 = eq(store_coalesce_lo_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 133:116] - node _T_193 = and(_T_191, _T_192) @[el2_lsu_stbuf.scala 133:114] - node _T_194 = bits(store_matchvec_lo_r, 0, 0) @[el2_lsu_stbuf.scala 133:158] - node _T_195 = or(_T_193, _T_194) @[el2_lsu_stbuf.scala 133:137] - node _T_196 = eq(ldst_dual_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 133:52] - node _T_197 = or(_T_196, io.store_stbuf_reqvld_r) @[el2_lsu_stbuf.scala 133:65] - node _T_198 = and(_T_197, UInt<1>("h00")) @[el2_lsu_stbuf.scala 133:92] - node _T_199 = eq(store_coalesce_lo_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 133:116] - node _T_200 = and(_T_198, _T_199) @[el2_lsu_stbuf.scala 133:114] - node _T_201 = bits(store_matchvec_lo_r, 1, 1) @[el2_lsu_stbuf.scala 133:158] - node _T_202 = or(_T_200, _T_201) @[el2_lsu_stbuf.scala 133:137] - node _T_203 = eq(ldst_dual_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 133:52] - node _T_204 = or(_T_203, io.store_stbuf_reqvld_r) @[el2_lsu_stbuf.scala 133:65] - node _T_205 = and(_T_204, UInt<1>("h00")) @[el2_lsu_stbuf.scala 133:92] - node _T_206 = eq(store_coalesce_lo_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 133:116] - node _T_207 = and(_T_205, _T_206) @[el2_lsu_stbuf.scala 133:114] - node _T_208 = bits(store_matchvec_lo_r, 2, 2) @[el2_lsu_stbuf.scala 133:158] - node _T_209 = or(_T_207, _T_208) @[el2_lsu_stbuf.scala 133:137] - node _T_210 = eq(ldst_dual_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 133:52] - node _T_211 = or(_T_210, io.store_stbuf_reqvld_r) @[el2_lsu_stbuf.scala 133:65] - node _T_212 = and(_T_211, UInt<1>("h00")) @[el2_lsu_stbuf.scala 133:92] - node _T_213 = eq(store_coalesce_lo_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 133:116] - node _T_214 = and(_T_212, _T_213) @[el2_lsu_stbuf.scala 133:114] - node _T_215 = bits(store_matchvec_lo_r, 3, 3) @[el2_lsu_stbuf.scala 133:158] - node _T_216 = or(_T_214, _T_215) @[el2_lsu_stbuf.scala 133:137] - node _T_217 = cat(_T_216, _T_209) @[Cat.scala 29:58] - node _T_218 = cat(_T_217, _T_202) @[Cat.scala 29:58] - node sel_lo = cat(_T_218, _T_195) @[Cat.scala 29:58] - node _T_219 = bits(sel_lo, 0, 0) @[el2_lsu_stbuf.scala 135:64] - node _T_220 = mux(_T_219, io.lsu_addr_r, io.end_addr_r) @[el2_lsu_stbuf.scala 135:57] - node _T_221 = bits(sel_lo, 1, 1) @[el2_lsu_stbuf.scala 135:64] - node _T_222 = mux(_T_221, io.lsu_addr_r, io.end_addr_r) @[el2_lsu_stbuf.scala 135:57] - node _T_223 = bits(sel_lo, 2, 2) @[el2_lsu_stbuf.scala 135:64] - node _T_224 = mux(_T_223, io.lsu_addr_r, io.end_addr_r) @[el2_lsu_stbuf.scala 135:57] - node _T_225 = bits(sel_lo, 3, 3) @[el2_lsu_stbuf.scala 135:64] - node _T_226 = mux(_T_225, io.lsu_addr_r, io.end_addr_r) @[el2_lsu_stbuf.scala 135:57] - stbuf_addrin[0] <= _T_226 @[el2_lsu_stbuf.scala 135:17] - stbuf_addrin[1] <= _T_224 @[el2_lsu_stbuf.scala 135:17] - stbuf_addrin[2] <= _T_222 @[el2_lsu_stbuf.scala 135:17] - stbuf_addrin[3] <= _T_220 @[el2_lsu_stbuf.scala 135:17] - node _T_227 = bits(sel_lo, 0, 0) @[el2_lsu_stbuf.scala 136:66] - node _T_228 = or(stbuf_byteen[0], store_byteen_lo_r) @[el2_lsu_stbuf.scala 136:87] - node _T_229 = or(stbuf_byteen[0], store_byteen_hi_r) @[el2_lsu_stbuf.scala 136:124] - node _T_230 = mux(_T_227, _T_228, _T_229) @[el2_lsu_stbuf.scala 136:59] - node _T_231 = bits(sel_lo, 1, 1) @[el2_lsu_stbuf.scala 136:66] - node _T_232 = or(stbuf_byteen[1], store_byteen_lo_r) @[el2_lsu_stbuf.scala 136:87] - node _T_233 = or(stbuf_byteen[1], store_byteen_hi_r) @[el2_lsu_stbuf.scala 136:124] - node _T_234 = mux(_T_231, _T_232, _T_233) @[el2_lsu_stbuf.scala 136:59] - node _T_235 = bits(sel_lo, 2, 2) @[el2_lsu_stbuf.scala 136:66] - node _T_236 = or(stbuf_byteen[2], store_byteen_lo_r) @[el2_lsu_stbuf.scala 136:87] - node _T_237 = or(stbuf_byteen[2], store_byteen_hi_r) @[el2_lsu_stbuf.scala 136:124] - node _T_238 = mux(_T_235, _T_236, _T_237) @[el2_lsu_stbuf.scala 136:59] - node _T_239 = bits(sel_lo, 3, 3) @[el2_lsu_stbuf.scala 136:66] - node _T_240 = or(stbuf_byteen[3], store_byteen_lo_r) @[el2_lsu_stbuf.scala 136:87] - node _T_241 = or(stbuf_byteen[3], store_byteen_hi_r) @[el2_lsu_stbuf.scala 136:124] - node _T_242 = mux(_T_239, _T_240, _T_241) @[el2_lsu_stbuf.scala 136:59] - stbuf_byteenin[0] <= _T_242 @[el2_lsu_stbuf.scala 136:19] - stbuf_byteenin[1] <= _T_238 @[el2_lsu_stbuf.scala 136:19] - stbuf_byteenin[2] <= _T_234 @[el2_lsu_stbuf.scala 136:19] - stbuf_byteenin[3] <= _T_230 @[el2_lsu_stbuf.scala 136:19] - node _T_243 = bits(sel_lo, 0, 0) @[el2_lsu_stbuf.scala 138:59] - node _T_244 = bits(stbuf_byteen[0], 0, 0) @[el2_lsu_stbuf.scala 138:84] - node _T_245 = eq(_T_244, UInt<1>("h00")) @[el2_lsu_stbuf.scala 138:68] - node _T_246 = bits(store_byteen_lo_r, 0, 0) @[el2_lsu_stbuf.scala 138:107] - node _T_247 = or(_T_245, _T_246) @[el2_lsu_stbuf.scala 138:88] - node _T_248 = bits(io.store_datafn_lo_r, 7, 0) @[el2_lsu_stbuf.scala 138:132] - node _T_249 = bits(stbuf_data[0], 7, 0) @[el2_lsu_stbuf.scala 138:153] - node _T_250 = mux(_T_247, _T_248, _T_249) @[el2_lsu_stbuf.scala 138:67] - node _T_251 = bits(stbuf_byteen[0], 0, 0) @[el2_lsu_stbuf.scala 139:27] - node _T_252 = eq(_T_251, UInt<1>("h00")) @[el2_lsu_stbuf.scala 139:11] - node _T_253 = bits(store_byteen_hi_r, 0, 0) @[el2_lsu_stbuf.scala 139:50] - node _T_254 = or(_T_252, _T_253) @[el2_lsu_stbuf.scala 139:31] - node _T_255 = bits(io.store_datafn_hi_r, 7, 0) @[el2_lsu_stbuf.scala 139:75] - node _T_256 = bits(stbuf_data[0], 7, 0) @[el2_lsu_stbuf.scala 139:96] - node _T_257 = mux(_T_254, _T_255, _T_256) @[el2_lsu_stbuf.scala 139:10] - node _T_258 = mux(_T_243, _T_250, _T_257) @[el2_lsu_stbuf.scala 138:52] - node _T_259 = bits(sel_lo, 1, 1) @[el2_lsu_stbuf.scala 138:59] - node _T_260 = bits(stbuf_byteen[1], 0, 0) @[el2_lsu_stbuf.scala 138:84] - node _T_261 = eq(_T_260, UInt<1>("h00")) @[el2_lsu_stbuf.scala 138:68] - node _T_262 = bits(store_byteen_lo_r, 0, 0) @[el2_lsu_stbuf.scala 138:107] - node _T_263 = or(_T_261, _T_262) @[el2_lsu_stbuf.scala 138:88] - node _T_264 = bits(io.store_datafn_lo_r, 7, 0) @[el2_lsu_stbuf.scala 138:132] - node _T_265 = bits(stbuf_data[1], 7, 0) @[el2_lsu_stbuf.scala 138:153] - node _T_266 = mux(_T_263, _T_264, _T_265) @[el2_lsu_stbuf.scala 138:67] - node _T_267 = bits(stbuf_byteen[1], 0, 0) @[el2_lsu_stbuf.scala 139:27] - node _T_268 = eq(_T_267, UInt<1>("h00")) @[el2_lsu_stbuf.scala 139:11] - node _T_269 = bits(store_byteen_hi_r, 0, 0) @[el2_lsu_stbuf.scala 139:50] - node _T_270 = or(_T_268, _T_269) @[el2_lsu_stbuf.scala 139:31] - node _T_271 = bits(io.store_datafn_hi_r, 7, 0) @[el2_lsu_stbuf.scala 139:75] - node _T_272 = bits(stbuf_data[1], 7, 0) @[el2_lsu_stbuf.scala 139:96] - node _T_273 = mux(_T_270, _T_271, _T_272) @[el2_lsu_stbuf.scala 139:10] - node _T_274 = mux(_T_259, _T_266, _T_273) @[el2_lsu_stbuf.scala 138:52] - node _T_275 = bits(sel_lo, 2, 2) @[el2_lsu_stbuf.scala 138:59] - node _T_276 = bits(stbuf_byteen[2], 0, 0) @[el2_lsu_stbuf.scala 138:84] - node _T_277 = eq(_T_276, UInt<1>("h00")) @[el2_lsu_stbuf.scala 138:68] - node _T_278 = bits(store_byteen_lo_r, 0, 0) @[el2_lsu_stbuf.scala 138:107] - node _T_279 = or(_T_277, _T_278) @[el2_lsu_stbuf.scala 138:88] - node _T_280 = bits(io.store_datafn_lo_r, 7, 0) @[el2_lsu_stbuf.scala 138:132] - node _T_281 = bits(stbuf_data[2], 7, 0) @[el2_lsu_stbuf.scala 138:153] - node _T_282 = mux(_T_279, _T_280, _T_281) @[el2_lsu_stbuf.scala 138:67] - node _T_283 = bits(stbuf_byteen[2], 0, 0) @[el2_lsu_stbuf.scala 139:27] - node _T_284 = eq(_T_283, UInt<1>("h00")) @[el2_lsu_stbuf.scala 139:11] - node _T_285 = bits(store_byteen_hi_r, 0, 0) @[el2_lsu_stbuf.scala 139:50] - node _T_286 = or(_T_284, _T_285) @[el2_lsu_stbuf.scala 139:31] - node _T_287 = bits(io.store_datafn_hi_r, 7, 0) @[el2_lsu_stbuf.scala 139:75] - node _T_288 = bits(stbuf_data[2], 7, 0) @[el2_lsu_stbuf.scala 139:96] - node _T_289 = mux(_T_286, _T_287, _T_288) @[el2_lsu_stbuf.scala 139:10] - node _T_290 = mux(_T_275, _T_282, _T_289) @[el2_lsu_stbuf.scala 138:52] - node _T_291 = bits(sel_lo, 3, 3) @[el2_lsu_stbuf.scala 138:59] - node _T_292 = bits(stbuf_byteen[3], 0, 0) @[el2_lsu_stbuf.scala 138:84] - node _T_293 = eq(_T_292, UInt<1>("h00")) @[el2_lsu_stbuf.scala 138:68] - node _T_294 = bits(store_byteen_lo_r, 0, 0) @[el2_lsu_stbuf.scala 138:107] - node _T_295 = or(_T_293, _T_294) @[el2_lsu_stbuf.scala 138:88] - node _T_296 = bits(io.store_datafn_lo_r, 7, 0) @[el2_lsu_stbuf.scala 138:132] - node _T_297 = bits(stbuf_data[3], 7, 0) @[el2_lsu_stbuf.scala 138:153] - node _T_298 = mux(_T_295, _T_296, _T_297) @[el2_lsu_stbuf.scala 138:67] - node _T_299 = bits(stbuf_byteen[3], 0, 0) @[el2_lsu_stbuf.scala 139:27] - node _T_300 = eq(_T_299, UInt<1>("h00")) @[el2_lsu_stbuf.scala 139:11] - node _T_301 = bits(store_byteen_hi_r, 0, 0) @[el2_lsu_stbuf.scala 139:50] - node _T_302 = or(_T_300, _T_301) @[el2_lsu_stbuf.scala 139:31] - node _T_303 = bits(io.store_datafn_hi_r, 7, 0) @[el2_lsu_stbuf.scala 139:75] - node _T_304 = bits(stbuf_data[3], 7, 0) @[el2_lsu_stbuf.scala 139:96] - node _T_305 = mux(_T_302, _T_303, _T_304) @[el2_lsu_stbuf.scala 139:10] - node _T_306 = mux(_T_291, _T_298, _T_305) @[el2_lsu_stbuf.scala 138:52] - datain1[0] <= _T_306 @[el2_lsu_stbuf.scala 138:12] - datain1[1] <= _T_290 @[el2_lsu_stbuf.scala 138:12] - datain1[2] <= _T_274 @[el2_lsu_stbuf.scala 138:12] - datain1[3] <= _T_258 @[el2_lsu_stbuf.scala 138:12] - node _T_307 = bits(sel_lo, 0, 0) @[el2_lsu_stbuf.scala 141:60] - node _T_308 = bits(stbuf_byteen[0], 1, 1) @[el2_lsu_stbuf.scala 141:85] - node _T_309 = eq(_T_308, UInt<1>("h00")) @[el2_lsu_stbuf.scala 141:69] - node _T_310 = bits(store_byteen_lo_r, 1, 1) @[el2_lsu_stbuf.scala 141:108] - node _T_311 = or(_T_309, _T_310) @[el2_lsu_stbuf.scala 141:89] - node _T_312 = bits(io.store_datafn_lo_r, 15, 8) @[el2_lsu_stbuf.scala 141:133] - node _T_313 = bits(stbuf_data[0], 15, 8) @[el2_lsu_stbuf.scala 141:155] - node _T_314 = mux(_T_311, _T_312, _T_313) @[el2_lsu_stbuf.scala 141:68] - node _T_315 = bits(stbuf_byteen[0], 1, 1) @[el2_lsu_stbuf.scala 142:27] - node _T_316 = eq(_T_315, UInt<1>("h00")) @[el2_lsu_stbuf.scala 142:11] - node _T_317 = bits(store_byteen_hi_r, 1, 1) @[el2_lsu_stbuf.scala 142:50] - node _T_318 = or(_T_316, _T_317) @[el2_lsu_stbuf.scala 142:31] - node _T_319 = bits(io.store_datafn_hi_r, 15, 8) @[el2_lsu_stbuf.scala 142:75] - node _T_320 = bits(stbuf_data[0], 15, 8) @[el2_lsu_stbuf.scala 142:97] - node _T_321 = mux(_T_318, _T_319, _T_320) @[el2_lsu_stbuf.scala 142:10] - node _T_322 = mux(_T_307, _T_314, _T_321) @[el2_lsu_stbuf.scala 141:53] - node _T_323 = bits(sel_lo, 1, 1) @[el2_lsu_stbuf.scala 141:60] - node _T_324 = bits(stbuf_byteen[1], 1, 1) @[el2_lsu_stbuf.scala 141:85] - node _T_325 = eq(_T_324, UInt<1>("h00")) @[el2_lsu_stbuf.scala 141:69] - node _T_326 = bits(store_byteen_lo_r, 1, 1) @[el2_lsu_stbuf.scala 141:108] - node _T_327 = or(_T_325, _T_326) @[el2_lsu_stbuf.scala 141:89] - node _T_328 = bits(io.store_datafn_lo_r, 15, 8) @[el2_lsu_stbuf.scala 141:133] - node _T_329 = bits(stbuf_data[1], 15, 8) @[el2_lsu_stbuf.scala 141:155] - node _T_330 = mux(_T_327, _T_328, _T_329) @[el2_lsu_stbuf.scala 141:68] - node _T_331 = bits(stbuf_byteen[1], 1, 1) @[el2_lsu_stbuf.scala 142:27] - node _T_332 = eq(_T_331, UInt<1>("h00")) @[el2_lsu_stbuf.scala 142:11] - node _T_333 = bits(store_byteen_hi_r, 1, 1) @[el2_lsu_stbuf.scala 142:50] - node _T_334 = or(_T_332, _T_333) @[el2_lsu_stbuf.scala 142:31] - node _T_335 = bits(io.store_datafn_hi_r, 15, 8) @[el2_lsu_stbuf.scala 142:75] - node _T_336 = bits(stbuf_data[1], 15, 8) @[el2_lsu_stbuf.scala 142:97] - node _T_337 = mux(_T_334, _T_335, _T_336) @[el2_lsu_stbuf.scala 142:10] - node _T_338 = mux(_T_323, _T_330, _T_337) @[el2_lsu_stbuf.scala 141:53] - node _T_339 = bits(sel_lo, 2, 2) @[el2_lsu_stbuf.scala 141:60] - node _T_340 = bits(stbuf_byteen[2], 1, 1) @[el2_lsu_stbuf.scala 141:85] - node _T_341 = eq(_T_340, UInt<1>("h00")) @[el2_lsu_stbuf.scala 141:69] - node _T_342 = bits(store_byteen_lo_r, 1, 1) @[el2_lsu_stbuf.scala 141:108] - node _T_343 = or(_T_341, _T_342) @[el2_lsu_stbuf.scala 141:89] - node _T_344 = bits(io.store_datafn_lo_r, 15, 8) @[el2_lsu_stbuf.scala 141:133] - node _T_345 = bits(stbuf_data[2], 15, 8) @[el2_lsu_stbuf.scala 141:155] - node _T_346 = mux(_T_343, _T_344, _T_345) @[el2_lsu_stbuf.scala 141:68] - node _T_347 = bits(stbuf_byteen[2], 1, 1) @[el2_lsu_stbuf.scala 142:27] - node _T_348 = eq(_T_347, UInt<1>("h00")) @[el2_lsu_stbuf.scala 142:11] - node _T_349 = bits(store_byteen_hi_r, 1, 1) @[el2_lsu_stbuf.scala 142:50] - node _T_350 = or(_T_348, _T_349) @[el2_lsu_stbuf.scala 142:31] - node _T_351 = bits(io.store_datafn_hi_r, 15, 8) @[el2_lsu_stbuf.scala 142:75] - node _T_352 = bits(stbuf_data[2], 15, 8) @[el2_lsu_stbuf.scala 142:97] - node _T_353 = mux(_T_350, _T_351, _T_352) @[el2_lsu_stbuf.scala 142:10] - node _T_354 = mux(_T_339, _T_346, _T_353) @[el2_lsu_stbuf.scala 141:53] - node _T_355 = bits(sel_lo, 3, 3) @[el2_lsu_stbuf.scala 141:60] - node _T_356 = bits(stbuf_byteen[3], 1, 1) @[el2_lsu_stbuf.scala 141:85] - node _T_357 = eq(_T_356, UInt<1>("h00")) @[el2_lsu_stbuf.scala 141:69] - node _T_358 = bits(store_byteen_lo_r, 1, 1) @[el2_lsu_stbuf.scala 141:108] - node _T_359 = or(_T_357, _T_358) @[el2_lsu_stbuf.scala 141:89] - node _T_360 = bits(io.store_datafn_lo_r, 15, 8) @[el2_lsu_stbuf.scala 141:133] - node _T_361 = bits(stbuf_data[3], 15, 8) @[el2_lsu_stbuf.scala 141:155] - node _T_362 = mux(_T_359, _T_360, _T_361) @[el2_lsu_stbuf.scala 141:68] - node _T_363 = bits(stbuf_byteen[3], 1, 1) @[el2_lsu_stbuf.scala 142:27] - node _T_364 = eq(_T_363, UInt<1>("h00")) @[el2_lsu_stbuf.scala 142:11] - node _T_365 = bits(store_byteen_hi_r, 1, 1) @[el2_lsu_stbuf.scala 142:50] - node _T_366 = or(_T_364, _T_365) @[el2_lsu_stbuf.scala 142:31] - node _T_367 = bits(io.store_datafn_hi_r, 15, 8) @[el2_lsu_stbuf.scala 142:75] - node _T_368 = bits(stbuf_data[3], 15, 8) @[el2_lsu_stbuf.scala 142:97] - node _T_369 = mux(_T_366, _T_367, _T_368) @[el2_lsu_stbuf.scala 142:10] - node _T_370 = mux(_T_355, _T_362, _T_369) @[el2_lsu_stbuf.scala 141:53] - datain2[0] <= _T_370 @[el2_lsu_stbuf.scala 141:13] - datain2[1] <= _T_354 @[el2_lsu_stbuf.scala 141:13] - datain2[2] <= _T_338 @[el2_lsu_stbuf.scala 141:13] - datain2[3] <= _T_322 @[el2_lsu_stbuf.scala 141:13] - node _T_371 = bits(sel_lo, 0, 0) @[el2_lsu_stbuf.scala 144:60] - node _T_372 = bits(stbuf_byteen[0], 2, 2) @[el2_lsu_stbuf.scala 144:85] - node _T_373 = eq(_T_372, UInt<1>("h00")) @[el2_lsu_stbuf.scala 144:69] - node _T_374 = bits(store_byteen_lo_r, 2, 2) @[el2_lsu_stbuf.scala 144:108] - node _T_375 = or(_T_373, _T_374) @[el2_lsu_stbuf.scala 144:89] - node _T_376 = bits(io.store_datafn_lo_r, 23, 16) @[el2_lsu_stbuf.scala 144:133] - node _T_377 = bits(stbuf_data[0], 23, 16) @[el2_lsu_stbuf.scala 144:156] - node _T_378 = mux(_T_375, _T_376, _T_377) @[el2_lsu_stbuf.scala 144:68] - node _T_379 = bits(stbuf_byteen[0], 2, 2) @[el2_lsu_stbuf.scala 145:27] - node _T_380 = eq(_T_379, UInt<1>("h00")) @[el2_lsu_stbuf.scala 145:11] - node _T_381 = bits(store_byteen_hi_r, 2, 2) @[el2_lsu_stbuf.scala 145:50] - node _T_382 = or(_T_380, _T_381) @[el2_lsu_stbuf.scala 145:31] - node _T_383 = bits(io.store_datafn_hi_r, 23, 16) @[el2_lsu_stbuf.scala 145:75] - node _T_384 = bits(stbuf_data[0], 23, 16) @[el2_lsu_stbuf.scala 145:98] - node _T_385 = mux(_T_382, _T_383, _T_384) @[el2_lsu_stbuf.scala 145:10] - node _T_386 = mux(_T_371, _T_378, _T_385) @[el2_lsu_stbuf.scala 144:53] - node _T_387 = bits(sel_lo, 1, 1) @[el2_lsu_stbuf.scala 144:60] - node _T_388 = bits(stbuf_byteen[1], 2, 2) @[el2_lsu_stbuf.scala 144:85] - node _T_389 = eq(_T_388, UInt<1>("h00")) @[el2_lsu_stbuf.scala 144:69] - node _T_390 = bits(store_byteen_lo_r, 2, 2) @[el2_lsu_stbuf.scala 144:108] - node _T_391 = or(_T_389, _T_390) @[el2_lsu_stbuf.scala 144:89] - node _T_392 = bits(io.store_datafn_lo_r, 23, 16) @[el2_lsu_stbuf.scala 144:133] - node _T_393 = bits(stbuf_data[1], 23, 16) @[el2_lsu_stbuf.scala 144:156] - node _T_394 = mux(_T_391, _T_392, _T_393) @[el2_lsu_stbuf.scala 144:68] - node _T_395 = bits(stbuf_byteen[1], 2, 2) @[el2_lsu_stbuf.scala 145:27] - node _T_396 = eq(_T_395, UInt<1>("h00")) @[el2_lsu_stbuf.scala 145:11] - node _T_397 = bits(store_byteen_hi_r, 2, 2) @[el2_lsu_stbuf.scala 145:50] - node _T_398 = or(_T_396, _T_397) @[el2_lsu_stbuf.scala 145:31] - node _T_399 = bits(io.store_datafn_hi_r, 23, 16) @[el2_lsu_stbuf.scala 145:75] - node _T_400 = bits(stbuf_data[1], 23, 16) @[el2_lsu_stbuf.scala 145:98] - node _T_401 = mux(_T_398, _T_399, _T_400) @[el2_lsu_stbuf.scala 145:10] - node _T_402 = mux(_T_387, _T_394, _T_401) @[el2_lsu_stbuf.scala 144:53] - node _T_403 = bits(sel_lo, 2, 2) @[el2_lsu_stbuf.scala 144:60] - node _T_404 = bits(stbuf_byteen[2], 2, 2) @[el2_lsu_stbuf.scala 144:85] - node _T_405 = eq(_T_404, UInt<1>("h00")) @[el2_lsu_stbuf.scala 144:69] - node _T_406 = bits(store_byteen_lo_r, 2, 2) @[el2_lsu_stbuf.scala 144:108] - node _T_407 = or(_T_405, _T_406) @[el2_lsu_stbuf.scala 144:89] - node _T_408 = bits(io.store_datafn_lo_r, 23, 16) @[el2_lsu_stbuf.scala 144:133] - node _T_409 = bits(stbuf_data[2], 23, 16) @[el2_lsu_stbuf.scala 144:156] - node _T_410 = mux(_T_407, _T_408, _T_409) @[el2_lsu_stbuf.scala 144:68] - node _T_411 = bits(stbuf_byteen[2], 2, 2) @[el2_lsu_stbuf.scala 145:27] - node _T_412 = eq(_T_411, UInt<1>("h00")) @[el2_lsu_stbuf.scala 145:11] - node _T_413 = bits(store_byteen_hi_r, 2, 2) @[el2_lsu_stbuf.scala 145:50] - node _T_414 = or(_T_412, _T_413) @[el2_lsu_stbuf.scala 145:31] - node _T_415 = bits(io.store_datafn_hi_r, 23, 16) @[el2_lsu_stbuf.scala 145:75] - node _T_416 = bits(stbuf_data[2], 23, 16) @[el2_lsu_stbuf.scala 145:98] - node _T_417 = mux(_T_414, _T_415, _T_416) @[el2_lsu_stbuf.scala 145:10] - node _T_418 = mux(_T_403, _T_410, _T_417) @[el2_lsu_stbuf.scala 144:53] - node _T_419 = bits(sel_lo, 3, 3) @[el2_lsu_stbuf.scala 144:60] - node _T_420 = bits(stbuf_byteen[3], 2, 2) @[el2_lsu_stbuf.scala 144:85] - node _T_421 = eq(_T_420, UInt<1>("h00")) @[el2_lsu_stbuf.scala 144:69] - node _T_422 = bits(store_byteen_lo_r, 2, 2) @[el2_lsu_stbuf.scala 144:108] - node _T_423 = or(_T_421, _T_422) @[el2_lsu_stbuf.scala 144:89] - node _T_424 = bits(io.store_datafn_lo_r, 23, 16) @[el2_lsu_stbuf.scala 144:133] - node _T_425 = bits(stbuf_data[3], 23, 16) @[el2_lsu_stbuf.scala 144:156] - node _T_426 = mux(_T_423, _T_424, _T_425) @[el2_lsu_stbuf.scala 144:68] - node _T_427 = bits(stbuf_byteen[3], 2, 2) @[el2_lsu_stbuf.scala 145:27] - node _T_428 = eq(_T_427, UInt<1>("h00")) @[el2_lsu_stbuf.scala 145:11] - node _T_429 = bits(store_byteen_hi_r, 2, 2) @[el2_lsu_stbuf.scala 145:50] - node _T_430 = or(_T_428, _T_429) @[el2_lsu_stbuf.scala 145:31] - node _T_431 = bits(io.store_datafn_hi_r, 23, 16) @[el2_lsu_stbuf.scala 145:75] - node _T_432 = bits(stbuf_data[3], 23, 16) @[el2_lsu_stbuf.scala 145:98] - node _T_433 = mux(_T_430, _T_431, _T_432) @[el2_lsu_stbuf.scala 145:10] - node _T_434 = mux(_T_419, _T_426, _T_433) @[el2_lsu_stbuf.scala 144:53] - datain3[0] <= _T_434 @[el2_lsu_stbuf.scala 144:13] - datain3[1] <= _T_418 @[el2_lsu_stbuf.scala 144:13] - datain3[2] <= _T_402 @[el2_lsu_stbuf.scala 144:13] - datain3[3] <= _T_386 @[el2_lsu_stbuf.scala 144:13] - node _T_435 = bits(sel_lo, 0, 0) @[el2_lsu_stbuf.scala 147:60] - node _T_436 = bits(stbuf_byteen[0], 3, 3) @[el2_lsu_stbuf.scala 147:85] - node _T_437 = eq(_T_436, UInt<1>("h00")) @[el2_lsu_stbuf.scala 147:69] - node _T_438 = bits(store_byteen_lo_r, 3, 3) @[el2_lsu_stbuf.scala 147:108] - node _T_439 = or(_T_437, _T_438) @[el2_lsu_stbuf.scala 147:89] - node _T_440 = bits(io.store_datafn_lo_r, 31, 24) @[el2_lsu_stbuf.scala 147:133] - node _T_441 = bits(stbuf_data[0], 31, 24) @[el2_lsu_stbuf.scala 147:156] - node _T_442 = mux(_T_439, _T_440, _T_441) @[el2_lsu_stbuf.scala 147:68] - node _T_443 = bits(stbuf_byteen[0], 3, 3) @[el2_lsu_stbuf.scala 148:27] - node _T_444 = eq(_T_443, UInt<1>("h00")) @[el2_lsu_stbuf.scala 148:11] - node _T_445 = bits(store_byteen_hi_r, 3, 3) @[el2_lsu_stbuf.scala 148:50] - node _T_446 = or(_T_444, _T_445) @[el2_lsu_stbuf.scala 148:31] - node _T_447 = bits(io.store_datafn_hi_r, 31, 24) @[el2_lsu_stbuf.scala 148:75] - node _T_448 = bits(stbuf_data[0], 31, 24) @[el2_lsu_stbuf.scala 148:98] - node _T_449 = mux(_T_446, _T_447, _T_448) @[el2_lsu_stbuf.scala 148:10] - node _T_450 = mux(_T_435, _T_442, _T_449) @[el2_lsu_stbuf.scala 147:53] - node _T_451 = bits(sel_lo, 1, 1) @[el2_lsu_stbuf.scala 147:60] - node _T_452 = bits(stbuf_byteen[1], 3, 3) @[el2_lsu_stbuf.scala 147:85] - node _T_453 = eq(_T_452, UInt<1>("h00")) @[el2_lsu_stbuf.scala 147:69] - node _T_454 = bits(store_byteen_lo_r, 3, 3) @[el2_lsu_stbuf.scala 147:108] - node _T_455 = or(_T_453, _T_454) @[el2_lsu_stbuf.scala 147:89] - node _T_456 = bits(io.store_datafn_lo_r, 31, 24) @[el2_lsu_stbuf.scala 147:133] - node _T_457 = bits(stbuf_data[1], 31, 24) @[el2_lsu_stbuf.scala 147:156] - node _T_458 = mux(_T_455, _T_456, _T_457) @[el2_lsu_stbuf.scala 147:68] - node _T_459 = bits(stbuf_byteen[1], 3, 3) @[el2_lsu_stbuf.scala 148:27] - node _T_460 = eq(_T_459, UInt<1>("h00")) @[el2_lsu_stbuf.scala 148:11] - node _T_461 = bits(store_byteen_hi_r, 3, 3) @[el2_lsu_stbuf.scala 148:50] - node _T_462 = or(_T_460, _T_461) @[el2_lsu_stbuf.scala 148:31] - node _T_463 = bits(io.store_datafn_hi_r, 31, 24) @[el2_lsu_stbuf.scala 148:75] - node _T_464 = bits(stbuf_data[1], 31, 24) @[el2_lsu_stbuf.scala 148:98] - node _T_465 = mux(_T_462, _T_463, _T_464) @[el2_lsu_stbuf.scala 148:10] - node _T_466 = mux(_T_451, _T_458, _T_465) @[el2_lsu_stbuf.scala 147:53] - node _T_467 = bits(sel_lo, 2, 2) @[el2_lsu_stbuf.scala 147:60] - node _T_468 = bits(stbuf_byteen[2], 3, 3) @[el2_lsu_stbuf.scala 147:85] - node _T_469 = eq(_T_468, UInt<1>("h00")) @[el2_lsu_stbuf.scala 147:69] - node _T_470 = bits(store_byteen_lo_r, 3, 3) @[el2_lsu_stbuf.scala 147:108] - node _T_471 = or(_T_469, _T_470) @[el2_lsu_stbuf.scala 147:89] - node _T_472 = bits(io.store_datafn_lo_r, 31, 24) @[el2_lsu_stbuf.scala 147:133] - node _T_473 = bits(stbuf_data[2], 31, 24) @[el2_lsu_stbuf.scala 147:156] - node _T_474 = mux(_T_471, _T_472, _T_473) @[el2_lsu_stbuf.scala 147:68] - node _T_475 = bits(stbuf_byteen[2], 3, 3) @[el2_lsu_stbuf.scala 148:27] - node _T_476 = eq(_T_475, UInt<1>("h00")) @[el2_lsu_stbuf.scala 148:11] - node _T_477 = bits(store_byteen_hi_r, 3, 3) @[el2_lsu_stbuf.scala 148:50] - node _T_478 = or(_T_476, _T_477) @[el2_lsu_stbuf.scala 148:31] - node _T_479 = bits(io.store_datafn_hi_r, 31, 24) @[el2_lsu_stbuf.scala 148:75] - node _T_480 = bits(stbuf_data[2], 31, 24) @[el2_lsu_stbuf.scala 148:98] - node _T_481 = mux(_T_478, _T_479, _T_480) @[el2_lsu_stbuf.scala 148:10] - node _T_482 = mux(_T_467, _T_474, _T_481) @[el2_lsu_stbuf.scala 147:53] - node _T_483 = bits(sel_lo, 3, 3) @[el2_lsu_stbuf.scala 147:60] - node _T_484 = bits(stbuf_byteen[3], 3, 3) @[el2_lsu_stbuf.scala 147:85] - node _T_485 = eq(_T_484, UInt<1>("h00")) @[el2_lsu_stbuf.scala 147:69] - node _T_486 = bits(store_byteen_lo_r, 3, 3) @[el2_lsu_stbuf.scala 147:108] - node _T_487 = or(_T_485, _T_486) @[el2_lsu_stbuf.scala 147:89] - node _T_488 = bits(io.store_datafn_lo_r, 31, 24) @[el2_lsu_stbuf.scala 147:133] - node _T_489 = bits(stbuf_data[3], 31, 24) @[el2_lsu_stbuf.scala 147:156] - node _T_490 = mux(_T_487, _T_488, _T_489) @[el2_lsu_stbuf.scala 147:68] - node _T_491 = bits(stbuf_byteen[3], 3, 3) @[el2_lsu_stbuf.scala 148:27] - node _T_492 = eq(_T_491, UInt<1>("h00")) @[el2_lsu_stbuf.scala 148:11] - node _T_493 = bits(store_byteen_hi_r, 3, 3) @[el2_lsu_stbuf.scala 148:50] - node _T_494 = or(_T_492, _T_493) @[el2_lsu_stbuf.scala 148:31] - node _T_495 = bits(io.store_datafn_hi_r, 31, 24) @[el2_lsu_stbuf.scala 148:75] - node _T_496 = bits(stbuf_data[3], 31, 24) @[el2_lsu_stbuf.scala 148:98] - node _T_497 = mux(_T_494, _T_495, _T_496) @[el2_lsu_stbuf.scala 148:10] - node _T_498 = mux(_T_483, _T_490, _T_497) @[el2_lsu_stbuf.scala 147:53] - datain4[0] <= _T_498 @[el2_lsu_stbuf.scala 147:13] - datain4[1] <= _T_482 @[el2_lsu_stbuf.scala 147:13] - datain4[2] <= _T_466 @[el2_lsu_stbuf.scala 147:13] - datain4[3] <= _T_450 @[el2_lsu_stbuf.scala 147:13] - node _T_499 = cat(datain2[0], datain1[0]) @[Cat.scala 29:58] - node _T_500 = cat(datain4[0], datain3[0]) @[Cat.scala 29:58] - node _T_501 = cat(_T_500, _T_499) @[Cat.scala 29:58] - node _T_502 = cat(datain2[1], datain1[1]) @[Cat.scala 29:58] - node _T_503 = cat(datain4[1], datain3[1]) @[Cat.scala 29:58] - node _T_504 = cat(_T_503, _T_502) @[Cat.scala 29:58] - node _T_505 = cat(datain2[2], datain1[2]) @[Cat.scala 29:58] - node _T_506 = cat(datain4[2], datain3[2]) @[Cat.scala 29:58] - node _T_507 = cat(_T_506, _T_505) @[Cat.scala 29:58] - node _T_508 = cat(datain2[3], datain1[3]) @[Cat.scala 29:58] - node _T_509 = cat(datain4[3], datain3[3]) @[Cat.scala 29:58] - node _T_510 = cat(_T_509, _T_508) @[Cat.scala 29:58] - stbuf_datain[0] <= _T_501 @[el2_lsu_stbuf.scala 150:17] - stbuf_datain[1] <= _T_504 @[el2_lsu_stbuf.scala 150:17] - stbuf_datain[2] <= _T_507 @[el2_lsu_stbuf.scala 150:17] - stbuf_datain[3] <= _T_510 @[el2_lsu_stbuf.scala 150:17] - node _T_511 = bits(stbuf_reset, 0, 0) @[el2_lsu_stbuf.scala 154:82] - node _T_512 = eq(_T_511, UInt<1>("h00")) @[el2_lsu_stbuf.scala 154:70] - node _T_513 = and(UInt<1>("h01"), _T_512) @[el2_lsu_stbuf.scala 154:68] - node _T_514 = bits(stbuf_wr_en, 0, 0) @[el2_lsu_stbuf.scala 154:103] - reg _T_515 : UInt, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] - when _T_514 : @[Reg.scala 28:19] - _T_515 <= _T_513 @[Reg.scala 28:23] + node store_byteen_lo_r = and(_T_18, _T_20) @[el2_lsu_stbuf.scala 123:52] + node _T_21 = add(RdPtr, UInt<1>("h01")) @[el2_lsu_stbuf.scala 125:27] + node RdPtrPlus1 = tail(_T_21, 1) @[el2_lsu_stbuf.scala 125:27] + node _T_22 = add(WrPtr, UInt<1>("h01")) @[el2_lsu_stbuf.scala 126:27] + node WrPtrPlus1 = tail(_T_22, 1) @[el2_lsu_stbuf.scala 126:27] + node _T_23 = add(WrPtr, UInt<2>("h02")) @[el2_lsu_stbuf.scala 127:27] + node WrPtrPlus2 = tail(_T_23, 1) @[el2_lsu_stbuf.scala 127:27] + node _T_24 = and(io.lsu_commit_r, io.store_stbuf_reqvld_r) @[el2_lsu_stbuf.scala 129:46] + io.ldst_stbuf_reqvld_r <= _T_24 @[el2_lsu_stbuf.scala 129:27] + node _T_25 = bits(stbuf_addr[0], 15, 2) @[el2_lsu_stbuf.scala 131:78] + node _T_26 = bits(io.lsu_addr_r, 15, 2) @[el2_lsu_stbuf.scala 131:137] + node _T_27 = eq(_T_25, _T_26) @[el2_lsu_stbuf.scala 131:120] + node _T_28 = bits(stbuf_vld, 0, 0) @[el2_lsu_stbuf.scala 131:191] + node _T_29 = and(_T_27, _T_28) @[el2_lsu_stbuf.scala 131:179] + node _T_30 = bits(stbuf_dma_kill, 0, 0) @[el2_lsu_stbuf.scala 131:212] + node _T_31 = eq(_T_30, UInt<1>("h00")) @[el2_lsu_stbuf.scala 131:197] + node _T_32 = and(_T_29, _T_31) @[el2_lsu_stbuf.scala 131:195] + node _T_33 = bits(stbuf_reset, 0, 0) @[el2_lsu_stbuf.scala 131:230] + node _T_34 = eq(_T_33, UInt<1>("h00")) @[el2_lsu_stbuf.scala 131:218] + node _T_35 = and(_T_32, _T_34) @[el2_lsu_stbuf.scala 131:216] + node _T_36 = bits(stbuf_addr[1], 15, 2) @[el2_lsu_stbuf.scala 131:78] + node _T_37 = bits(io.lsu_addr_r, 15, 2) @[el2_lsu_stbuf.scala 131:137] + node _T_38 = eq(_T_36, _T_37) @[el2_lsu_stbuf.scala 131:120] + node _T_39 = bits(stbuf_vld, 1, 1) @[el2_lsu_stbuf.scala 131:191] + node _T_40 = and(_T_38, _T_39) @[el2_lsu_stbuf.scala 131:179] + node _T_41 = bits(stbuf_dma_kill, 1, 1) @[el2_lsu_stbuf.scala 131:212] + node _T_42 = eq(_T_41, UInt<1>("h00")) @[el2_lsu_stbuf.scala 131:197] + node _T_43 = and(_T_40, _T_42) @[el2_lsu_stbuf.scala 131:195] + node _T_44 = bits(stbuf_reset, 1, 1) @[el2_lsu_stbuf.scala 131:230] + node _T_45 = eq(_T_44, UInt<1>("h00")) @[el2_lsu_stbuf.scala 131:218] + node _T_46 = and(_T_43, _T_45) @[el2_lsu_stbuf.scala 131:216] + node _T_47 = bits(stbuf_addr[2], 15, 2) @[el2_lsu_stbuf.scala 131:78] + node _T_48 = bits(io.lsu_addr_r, 15, 2) @[el2_lsu_stbuf.scala 131:137] + node _T_49 = eq(_T_47, _T_48) @[el2_lsu_stbuf.scala 131:120] + node _T_50 = bits(stbuf_vld, 2, 2) @[el2_lsu_stbuf.scala 131:191] + node _T_51 = and(_T_49, _T_50) @[el2_lsu_stbuf.scala 131:179] + node _T_52 = bits(stbuf_dma_kill, 2, 2) @[el2_lsu_stbuf.scala 131:212] + node _T_53 = eq(_T_52, UInt<1>("h00")) @[el2_lsu_stbuf.scala 131:197] + node _T_54 = and(_T_51, _T_53) @[el2_lsu_stbuf.scala 131:195] + node _T_55 = bits(stbuf_reset, 2, 2) @[el2_lsu_stbuf.scala 131:230] + node _T_56 = eq(_T_55, UInt<1>("h00")) @[el2_lsu_stbuf.scala 131:218] + node _T_57 = and(_T_54, _T_56) @[el2_lsu_stbuf.scala 131:216] + node _T_58 = bits(stbuf_addr[3], 15, 2) @[el2_lsu_stbuf.scala 131:78] + node _T_59 = bits(io.lsu_addr_r, 15, 2) @[el2_lsu_stbuf.scala 131:137] + node _T_60 = eq(_T_58, _T_59) @[el2_lsu_stbuf.scala 131:120] + node _T_61 = bits(stbuf_vld, 3, 3) @[el2_lsu_stbuf.scala 131:191] + node _T_62 = and(_T_60, _T_61) @[el2_lsu_stbuf.scala 131:179] + node _T_63 = bits(stbuf_dma_kill, 3, 3) @[el2_lsu_stbuf.scala 131:212] + node _T_64 = eq(_T_63, UInt<1>("h00")) @[el2_lsu_stbuf.scala 131:197] + node _T_65 = and(_T_62, _T_64) @[el2_lsu_stbuf.scala 131:195] + node _T_66 = bits(stbuf_reset, 3, 3) @[el2_lsu_stbuf.scala 131:230] + node _T_67 = eq(_T_66, UInt<1>("h00")) @[el2_lsu_stbuf.scala 131:218] + node _T_68 = and(_T_65, _T_67) @[el2_lsu_stbuf.scala 131:216] + node _T_69 = cat(_T_68, _T_57) @[Cat.scala 29:58] + node _T_70 = cat(_T_69, _T_46) @[Cat.scala 29:58] + node store_matchvec_lo_r = cat(_T_70, _T_35) @[Cat.scala 29:58] + node _T_71 = bits(stbuf_addr[0], 15, 2) @[el2_lsu_stbuf.scala 132:78] + node _T_72 = bits(io.end_addr_r, 15, 2) @[el2_lsu_stbuf.scala 132:137] + node _T_73 = eq(_T_71, _T_72) @[el2_lsu_stbuf.scala 132:120] + node _T_74 = bits(stbuf_vld, 0, 0) @[el2_lsu_stbuf.scala 132:190] + node _T_75 = and(_T_73, _T_74) @[el2_lsu_stbuf.scala 132:179] + node _T_76 = bits(stbuf_dma_kill, 0, 0) @[el2_lsu_stbuf.scala 132:211] + node _T_77 = eq(_T_76, UInt<1>("h00")) @[el2_lsu_stbuf.scala 132:196] + node _T_78 = and(_T_75, _T_77) @[el2_lsu_stbuf.scala 132:194] + node _T_79 = and(_T_78, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 132:215] + node _T_80 = bits(stbuf_reset, 0, 0) @[el2_lsu_stbuf.scala 132:250] + node _T_81 = eq(_T_80, UInt<1>("h00")) @[el2_lsu_stbuf.scala 132:238] + node _T_82 = and(_T_79, _T_81) @[el2_lsu_stbuf.scala 132:236] + node _T_83 = bits(stbuf_addr[1], 15, 2) @[el2_lsu_stbuf.scala 132:78] + node _T_84 = bits(io.end_addr_r, 15, 2) @[el2_lsu_stbuf.scala 132:137] + node _T_85 = eq(_T_83, _T_84) @[el2_lsu_stbuf.scala 132:120] + node _T_86 = bits(stbuf_vld, 1, 1) @[el2_lsu_stbuf.scala 132:190] + node _T_87 = and(_T_85, _T_86) @[el2_lsu_stbuf.scala 132:179] + node _T_88 = bits(stbuf_dma_kill, 1, 1) @[el2_lsu_stbuf.scala 132:211] + node _T_89 = eq(_T_88, UInt<1>("h00")) @[el2_lsu_stbuf.scala 132:196] + node _T_90 = and(_T_87, _T_89) @[el2_lsu_stbuf.scala 132:194] + node _T_91 = and(_T_90, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 132:215] + node _T_92 = bits(stbuf_reset, 1, 1) @[el2_lsu_stbuf.scala 132:250] + node _T_93 = eq(_T_92, UInt<1>("h00")) @[el2_lsu_stbuf.scala 132:238] + node _T_94 = and(_T_91, _T_93) @[el2_lsu_stbuf.scala 132:236] + node _T_95 = bits(stbuf_addr[2], 15, 2) @[el2_lsu_stbuf.scala 132:78] + node _T_96 = bits(io.end_addr_r, 15, 2) @[el2_lsu_stbuf.scala 132:137] + node _T_97 = eq(_T_95, _T_96) @[el2_lsu_stbuf.scala 132:120] + node _T_98 = bits(stbuf_vld, 2, 2) @[el2_lsu_stbuf.scala 132:190] + node _T_99 = and(_T_97, _T_98) @[el2_lsu_stbuf.scala 132:179] + node _T_100 = bits(stbuf_dma_kill, 2, 2) @[el2_lsu_stbuf.scala 132:211] + node _T_101 = eq(_T_100, UInt<1>("h00")) @[el2_lsu_stbuf.scala 132:196] + node _T_102 = and(_T_99, _T_101) @[el2_lsu_stbuf.scala 132:194] + node _T_103 = and(_T_102, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 132:215] + node _T_104 = bits(stbuf_reset, 2, 2) @[el2_lsu_stbuf.scala 132:250] + node _T_105 = eq(_T_104, UInt<1>("h00")) @[el2_lsu_stbuf.scala 132:238] + node _T_106 = and(_T_103, _T_105) @[el2_lsu_stbuf.scala 132:236] + node _T_107 = bits(stbuf_addr[3], 15, 2) @[el2_lsu_stbuf.scala 132:78] + node _T_108 = bits(io.end_addr_r, 15, 2) @[el2_lsu_stbuf.scala 132:137] + node _T_109 = eq(_T_107, _T_108) @[el2_lsu_stbuf.scala 132:120] + node _T_110 = bits(stbuf_vld, 3, 3) @[el2_lsu_stbuf.scala 132:190] + node _T_111 = and(_T_109, _T_110) @[el2_lsu_stbuf.scala 132:179] + node _T_112 = bits(stbuf_dma_kill, 3, 3) @[el2_lsu_stbuf.scala 132:211] + node _T_113 = eq(_T_112, UInt<1>("h00")) @[el2_lsu_stbuf.scala 132:196] + node _T_114 = and(_T_111, _T_113) @[el2_lsu_stbuf.scala 132:194] + node _T_115 = and(_T_114, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 132:215] + node _T_116 = bits(stbuf_reset, 3, 3) @[el2_lsu_stbuf.scala 132:250] + node _T_117 = eq(_T_116, UInt<1>("h00")) @[el2_lsu_stbuf.scala 132:238] + node _T_118 = and(_T_115, _T_117) @[el2_lsu_stbuf.scala 132:236] + node _T_119 = cat(_T_118, _T_106) @[Cat.scala 29:58] + node _T_120 = cat(_T_119, _T_94) @[Cat.scala 29:58] + node store_matchvec_hi_r = cat(_T_120, _T_82) @[Cat.scala 29:58] + node store_coalesce_lo_r = orr(store_matchvec_lo_r) @[el2_lsu_stbuf.scala 134:50] + node store_coalesce_hi_r = orr(store_matchvec_hi_r) @[el2_lsu_stbuf.scala 135:50] + node _T_121 = eq(UInt<1>("h00"), WrPtr) @[el2_lsu_stbuf.scala 138:64] + node _T_122 = eq(store_coalesce_lo_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 138:77] + node _T_123 = and(_T_121, _T_122) @[el2_lsu_stbuf.scala 138:75] + node _T_124 = eq(UInt<1>("h00"), WrPtr) @[el2_lsu_stbuf.scala 139:64] + node _T_125 = and(_T_124, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 139:75] + node _T_126 = eq(store_coalesce_hi_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 139:98] + node _T_127 = and(_T_125, _T_126) @[el2_lsu_stbuf.scala 139:96] + node _T_128 = or(_T_123, _T_127) @[el2_lsu_stbuf.scala 138:99] + node _T_129 = eq(UInt<1>("h00"), WrPtrPlus1) @[el2_lsu_stbuf.scala 140:64] + node _T_130 = and(_T_129, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 140:80] + node _T_131 = or(store_coalesce_lo_r, store_coalesce_hi_r) @[el2_lsu_stbuf.scala 140:125] + node _T_132 = eq(_T_131, UInt<1>("h00")) @[el2_lsu_stbuf.scala 140:103] + node _T_133 = and(_T_130, _T_132) @[el2_lsu_stbuf.scala 140:101] + node _T_134 = or(_T_128, _T_133) @[el2_lsu_stbuf.scala 139:120] + node _T_135 = bits(store_matchvec_lo_r, 0, 0) @[el2_lsu_stbuf.scala 141:72] + node _T_136 = or(_T_134, _T_135) @[el2_lsu_stbuf.scala 140:149] + node _T_137 = bits(store_matchvec_hi_r, 0, 0) @[el2_lsu_stbuf.scala 141:97] + node _T_138 = or(_T_136, _T_137) @[el2_lsu_stbuf.scala 141:76] + node _T_139 = and(io.ldst_stbuf_reqvld_r, _T_138) @[el2_lsu_stbuf.scala 137:77] + node _T_140 = eq(UInt<1>("h01"), WrPtr) @[el2_lsu_stbuf.scala 138:64] + node _T_141 = eq(store_coalesce_lo_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 138:77] + node _T_142 = and(_T_140, _T_141) @[el2_lsu_stbuf.scala 138:75] + node _T_143 = eq(UInt<1>("h01"), WrPtr) @[el2_lsu_stbuf.scala 139:64] + node _T_144 = and(_T_143, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 139:75] + node _T_145 = eq(store_coalesce_hi_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 139:98] + node _T_146 = and(_T_144, _T_145) @[el2_lsu_stbuf.scala 139:96] + node _T_147 = or(_T_142, _T_146) @[el2_lsu_stbuf.scala 138:99] + node _T_148 = eq(UInt<1>("h01"), WrPtrPlus1) @[el2_lsu_stbuf.scala 140:64] + node _T_149 = and(_T_148, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 140:80] + node _T_150 = or(store_coalesce_lo_r, store_coalesce_hi_r) @[el2_lsu_stbuf.scala 140:125] + node _T_151 = eq(_T_150, UInt<1>("h00")) @[el2_lsu_stbuf.scala 140:103] + node _T_152 = and(_T_149, _T_151) @[el2_lsu_stbuf.scala 140:101] + node _T_153 = or(_T_147, _T_152) @[el2_lsu_stbuf.scala 139:120] + node _T_154 = bits(store_matchvec_lo_r, 1, 1) @[el2_lsu_stbuf.scala 141:72] + node _T_155 = or(_T_153, _T_154) @[el2_lsu_stbuf.scala 140:149] + node _T_156 = bits(store_matchvec_hi_r, 1, 1) @[el2_lsu_stbuf.scala 141:97] + node _T_157 = or(_T_155, _T_156) @[el2_lsu_stbuf.scala 141:76] + node _T_158 = and(io.ldst_stbuf_reqvld_r, _T_157) @[el2_lsu_stbuf.scala 137:77] + node _T_159 = eq(UInt<2>("h02"), WrPtr) @[el2_lsu_stbuf.scala 138:64] + node _T_160 = eq(store_coalesce_lo_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 138:77] + node _T_161 = and(_T_159, _T_160) @[el2_lsu_stbuf.scala 138:75] + node _T_162 = eq(UInt<2>("h02"), WrPtr) @[el2_lsu_stbuf.scala 139:64] + node _T_163 = and(_T_162, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 139:75] + node _T_164 = eq(store_coalesce_hi_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 139:98] + node _T_165 = and(_T_163, _T_164) @[el2_lsu_stbuf.scala 139:96] + node _T_166 = or(_T_161, _T_165) @[el2_lsu_stbuf.scala 138:99] + node _T_167 = eq(UInt<2>("h02"), WrPtrPlus1) @[el2_lsu_stbuf.scala 140:64] + node _T_168 = and(_T_167, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 140:80] + node _T_169 = or(store_coalesce_lo_r, store_coalesce_hi_r) @[el2_lsu_stbuf.scala 140:125] + node _T_170 = eq(_T_169, UInt<1>("h00")) @[el2_lsu_stbuf.scala 140:103] + node _T_171 = and(_T_168, _T_170) @[el2_lsu_stbuf.scala 140:101] + node _T_172 = or(_T_166, _T_171) @[el2_lsu_stbuf.scala 139:120] + node _T_173 = bits(store_matchvec_lo_r, 2, 2) @[el2_lsu_stbuf.scala 141:72] + node _T_174 = or(_T_172, _T_173) @[el2_lsu_stbuf.scala 140:149] + node _T_175 = bits(store_matchvec_hi_r, 2, 2) @[el2_lsu_stbuf.scala 141:97] + node _T_176 = or(_T_174, _T_175) @[el2_lsu_stbuf.scala 141:76] + node _T_177 = and(io.ldst_stbuf_reqvld_r, _T_176) @[el2_lsu_stbuf.scala 137:77] + node _T_178 = eq(UInt<2>("h03"), WrPtr) @[el2_lsu_stbuf.scala 138:64] + node _T_179 = eq(store_coalesce_lo_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 138:77] + node _T_180 = and(_T_178, _T_179) @[el2_lsu_stbuf.scala 138:75] + node _T_181 = eq(UInt<2>("h03"), WrPtr) @[el2_lsu_stbuf.scala 139:64] + node _T_182 = and(_T_181, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 139:75] + node _T_183 = eq(store_coalesce_hi_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 139:98] + node _T_184 = and(_T_182, _T_183) @[el2_lsu_stbuf.scala 139:96] + node _T_185 = or(_T_180, _T_184) @[el2_lsu_stbuf.scala 138:99] + node _T_186 = eq(UInt<2>("h03"), WrPtrPlus1) @[el2_lsu_stbuf.scala 140:64] + node _T_187 = and(_T_186, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 140:80] + node _T_188 = or(store_coalesce_lo_r, store_coalesce_hi_r) @[el2_lsu_stbuf.scala 140:125] + node _T_189 = eq(_T_188, UInt<1>("h00")) @[el2_lsu_stbuf.scala 140:103] + node _T_190 = and(_T_187, _T_189) @[el2_lsu_stbuf.scala 140:101] + node _T_191 = or(_T_185, _T_190) @[el2_lsu_stbuf.scala 139:120] + node _T_192 = bits(store_matchvec_lo_r, 3, 3) @[el2_lsu_stbuf.scala 141:72] + node _T_193 = or(_T_191, _T_192) @[el2_lsu_stbuf.scala 140:149] + node _T_194 = bits(store_matchvec_hi_r, 3, 3) @[el2_lsu_stbuf.scala 141:97] + node _T_195 = or(_T_193, _T_194) @[el2_lsu_stbuf.scala 141:76] + node _T_196 = and(io.ldst_stbuf_reqvld_r, _T_195) @[el2_lsu_stbuf.scala 137:77] + node _T_197 = cat(_T_196, _T_177) @[Cat.scala 29:58] + node _T_198 = cat(_T_197, _T_158) @[Cat.scala 29:58] + node _T_199 = cat(_T_198, _T_139) @[Cat.scala 29:58] + stbuf_wr_en <= _T_199 @[el2_lsu_stbuf.scala 137:16] + node _T_200 = or(io.lsu_stbuf_commit_any, io.stbuf_reqvld_flushed_any) @[el2_lsu_stbuf.scala 142:78] + node _T_201 = eq(UInt<1>("h00"), RdPtr) @[el2_lsu_stbuf.scala 142:121] + node _T_202 = bits(_T_201, 0, 0) @[el2_lsu_stbuf.scala 142:132] + node _T_203 = and(_T_200, _T_202) @[el2_lsu_stbuf.scala 142:109] + node _T_204 = or(io.lsu_stbuf_commit_any, io.stbuf_reqvld_flushed_any) @[el2_lsu_stbuf.scala 142:78] + node _T_205 = eq(UInt<1>("h01"), RdPtr) @[el2_lsu_stbuf.scala 142:121] + node _T_206 = bits(_T_205, 0, 0) @[el2_lsu_stbuf.scala 142:132] + node _T_207 = and(_T_204, _T_206) @[el2_lsu_stbuf.scala 142:109] + node _T_208 = or(io.lsu_stbuf_commit_any, io.stbuf_reqvld_flushed_any) @[el2_lsu_stbuf.scala 142:78] + node _T_209 = eq(UInt<2>("h02"), RdPtr) @[el2_lsu_stbuf.scala 142:121] + node _T_210 = bits(_T_209, 0, 0) @[el2_lsu_stbuf.scala 142:132] + node _T_211 = and(_T_208, _T_210) @[el2_lsu_stbuf.scala 142:109] + node _T_212 = or(io.lsu_stbuf_commit_any, io.stbuf_reqvld_flushed_any) @[el2_lsu_stbuf.scala 142:78] + node _T_213 = eq(UInt<2>("h03"), RdPtr) @[el2_lsu_stbuf.scala 142:121] + node _T_214 = bits(_T_213, 0, 0) @[el2_lsu_stbuf.scala 142:132] + node _T_215 = and(_T_212, _T_214) @[el2_lsu_stbuf.scala 142:109] + node _T_216 = cat(_T_215, _T_211) @[Cat.scala 29:58] + node _T_217 = cat(_T_216, _T_207) @[Cat.scala 29:58] + node _T_218 = cat(_T_217, _T_203) @[Cat.scala 29:58] + stbuf_reset <= _T_218 @[el2_lsu_stbuf.scala 142:15] + node _T_219 = eq(ldst_dual_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 143:53] + node _T_220 = or(_T_219, io.store_stbuf_reqvld_r) @[el2_lsu_stbuf.scala 143:66] + node _T_221 = eq(UInt<1>("h00"), WrPtr) @[el2_lsu_stbuf.scala 143:105] + node _T_222 = bits(_T_221, 0, 0) @[el2_lsu_stbuf.scala 143:116] + node _T_223 = and(_T_220, _T_222) @[el2_lsu_stbuf.scala 143:93] + node _T_224 = eq(store_coalesce_lo_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 143:125] + node _T_225 = and(_T_223, _T_224) @[el2_lsu_stbuf.scala 143:123] + node _T_226 = bits(store_matchvec_lo_r, 0, 0) @[el2_lsu_stbuf.scala 143:168] + node _T_227 = or(_T_225, _T_226) @[el2_lsu_stbuf.scala 143:147] + node _T_228 = eq(ldst_dual_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 143:53] + node _T_229 = or(_T_228, io.store_stbuf_reqvld_r) @[el2_lsu_stbuf.scala 143:66] + node _T_230 = eq(UInt<1>("h01"), WrPtr) @[el2_lsu_stbuf.scala 143:105] + node _T_231 = bits(_T_230, 0, 0) @[el2_lsu_stbuf.scala 143:116] + node _T_232 = and(_T_229, _T_231) @[el2_lsu_stbuf.scala 143:93] + node _T_233 = eq(store_coalesce_lo_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 143:125] + node _T_234 = and(_T_232, _T_233) @[el2_lsu_stbuf.scala 143:123] + node _T_235 = bits(store_matchvec_lo_r, 1, 1) @[el2_lsu_stbuf.scala 143:168] + node _T_236 = or(_T_234, _T_235) @[el2_lsu_stbuf.scala 143:147] + node _T_237 = eq(ldst_dual_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 143:53] + node _T_238 = or(_T_237, io.store_stbuf_reqvld_r) @[el2_lsu_stbuf.scala 143:66] + node _T_239 = eq(UInt<2>("h02"), WrPtr) @[el2_lsu_stbuf.scala 143:105] + node _T_240 = bits(_T_239, 0, 0) @[el2_lsu_stbuf.scala 143:116] + node _T_241 = and(_T_238, _T_240) @[el2_lsu_stbuf.scala 143:93] + node _T_242 = eq(store_coalesce_lo_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 143:125] + node _T_243 = and(_T_241, _T_242) @[el2_lsu_stbuf.scala 143:123] + node _T_244 = bits(store_matchvec_lo_r, 2, 2) @[el2_lsu_stbuf.scala 143:168] + node _T_245 = or(_T_243, _T_244) @[el2_lsu_stbuf.scala 143:147] + node _T_246 = eq(ldst_dual_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 143:53] + node _T_247 = or(_T_246, io.store_stbuf_reqvld_r) @[el2_lsu_stbuf.scala 143:66] + node _T_248 = eq(UInt<2>("h03"), WrPtr) @[el2_lsu_stbuf.scala 143:105] + node _T_249 = bits(_T_248, 0, 0) @[el2_lsu_stbuf.scala 143:116] + node _T_250 = and(_T_247, _T_249) @[el2_lsu_stbuf.scala 143:93] + node _T_251 = eq(store_coalesce_lo_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 143:125] + node _T_252 = and(_T_250, _T_251) @[el2_lsu_stbuf.scala 143:123] + node _T_253 = bits(store_matchvec_lo_r, 3, 3) @[el2_lsu_stbuf.scala 143:168] + node _T_254 = or(_T_252, _T_253) @[el2_lsu_stbuf.scala 143:147] + node _T_255 = cat(_T_254, _T_245) @[Cat.scala 29:58] + node _T_256 = cat(_T_255, _T_236) @[Cat.scala 29:58] + node sel_lo = cat(_T_256, _T_227) @[Cat.scala 29:58] + node _T_257 = bits(sel_lo, 0, 0) @[el2_lsu_stbuf.scala 145:64] + node _T_258 = bits(io.lsu_addr_r, 15, 0) @[el2_lsu_stbuf.scala 145:82] + node _T_259 = bits(io.end_addr_r, 15, 0) @[el2_lsu_stbuf.scala 145:114] + node _T_260 = mux(_T_257, _T_258, _T_259) @[el2_lsu_stbuf.scala 145:57] + node _T_261 = bits(sel_lo, 1, 1) @[el2_lsu_stbuf.scala 145:64] + node _T_262 = bits(io.lsu_addr_r, 15, 0) @[el2_lsu_stbuf.scala 145:82] + node _T_263 = bits(io.end_addr_r, 15, 0) @[el2_lsu_stbuf.scala 145:114] + node _T_264 = mux(_T_261, _T_262, _T_263) @[el2_lsu_stbuf.scala 145:57] + node _T_265 = bits(sel_lo, 2, 2) @[el2_lsu_stbuf.scala 145:64] + node _T_266 = bits(io.lsu_addr_r, 15, 0) @[el2_lsu_stbuf.scala 145:82] + node _T_267 = bits(io.end_addr_r, 15, 0) @[el2_lsu_stbuf.scala 145:114] + node _T_268 = mux(_T_265, _T_266, _T_267) @[el2_lsu_stbuf.scala 145:57] + node _T_269 = bits(sel_lo, 3, 3) @[el2_lsu_stbuf.scala 145:64] + node _T_270 = bits(io.lsu_addr_r, 15, 0) @[el2_lsu_stbuf.scala 145:82] + node _T_271 = bits(io.end_addr_r, 15, 0) @[el2_lsu_stbuf.scala 145:114] + node _T_272 = mux(_T_269, _T_270, _T_271) @[el2_lsu_stbuf.scala 145:57] + stbuf_addrin[0] <= _T_260 @[el2_lsu_stbuf.scala 145:17] + stbuf_addrin[1] <= _T_264 @[el2_lsu_stbuf.scala 145:17] + stbuf_addrin[2] <= _T_268 @[el2_lsu_stbuf.scala 145:17] + stbuf_addrin[3] <= _T_272 @[el2_lsu_stbuf.scala 145:17] + node _T_273 = bits(sel_lo, 0, 0) @[el2_lsu_stbuf.scala 146:66] + node _T_274 = or(stbuf_byteen[0], store_byteen_lo_r) @[el2_lsu_stbuf.scala 146:87] + node _T_275 = or(stbuf_byteen[0], store_byteen_hi_r) @[el2_lsu_stbuf.scala 146:124] + node _T_276 = mux(_T_273, _T_274, _T_275) @[el2_lsu_stbuf.scala 146:59] + node _T_277 = bits(sel_lo, 1, 1) @[el2_lsu_stbuf.scala 146:66] + node _T_278 = or(stbuf_byteen[1], store_byteen_lo_r) @[el2_lsu_stbuf.scala 146:87] + node _T_279 = or(stbuf_byteen[1], store_byteen_hi_r) @[el2_lsu_stbuf.scala 146:124] + node _T_280 = mux(_T_277, _T_278, _T_279) @[el2_lsu_stbuf.scala 146:59] + node _T_281 = bits(sel_lo, 2, 2) @[el2_lsu_stbuf.scala 146:66] + node _T_282 = or(stbuf_byteen[2], store_byteen_lo_r) @[el2_lsu_stbuf.scala 146:87] + node _T_283 = or(stbuf_byteen[2], store_byteen_hi_r) @[el2_lsu_stbuf.scala 146:124] + node _T_284 = mux(_T_281, _T_282, _T_283) @[el2_lsu_stbuf.scala 146:59] + node _T_285 = bits(sel_lo, 3, 3) @[el2_lsu_stbuf.scala 146:66] + node _T_286 = or(stbuf_byteen[3], store_byteen_lo_r) @[el2_lsu_stbuf.scala 146:87] + node _T_287 = or(stbuf_byteen[3], store_byteen_hi_r) @[el2_lsu_stbuf.scala 146:124] + node _T_288 = mux(_T_285, _T_286, _T_287) @[el2_lsu_stbuf.scala 146:59] + stbuf_byteenin[0] <= _T_276 @[el2_lsu_stbuf.scala 146:19] + stbuf_byteenin[1] <= _T_280 @[el2_lsu_stbuf.scala 146:19] + stbuf_byteenin[2] <= _T_284 @[el2_lsu_stbuf.scala 146:19] + stbuf_byteenin[3] <= _T_288 @[el2_lsu_stbuf.scala 146:19] + node _T_289 = bits(sel_lo, 0, 0) @[el2_lsu_stbuf.scala 148:59] + node _T_290 = bits(stbuf_byteen[0], 0, 0) @[el2_lsu_stbuf.scala 148:84] + node _T_291 = eq(_T_290, UInt<1>("h00")) @[el2_lsu_stbuf.scala 148:68] + node _T_292 = bits(store_byteen_lo_r, 0, 0) @[el2_lsu_stbuf.scala 148:107] + node _T_293 = or(_T_291, _T_292) @[el2_lsu_stbuf.scala 148:88] + node _T_294 = bits(io.store_datafn_lo_r, 7, 0) @[el2_lsu_stbuf.scala 148:132] + node _T_295 = bits(stbuf_data[0], 7, 0) @[el2_lsu_stbuf.scala 148:153] + node _T_296 = mux(_T_293, _T_294, _T_295) @[el2_lsu_stbuf.scala 148:67] + node _T_297 = bits(stbuf_byteen[0], 0, 0) @[el2_lsu_stbuf.scala 149:27] + node _T_298 = eq(_T_297, UInt<1>("h00")) @[el2_lsu_stbuf.scala 149:11] + node _T_299 = bits(store_byteen_hi_r, 0, 0) @[el2_lsu_stbuf.scala 149:50] + node _T_300 = or(_T_298, _T_299) @[el2_lsu_stbuf.scala 149:31] + node _T_301 = bits(io.store_datafn_hi_r, 7, 0) @[el2_lsu_stbuf.scala 149:75] + node _T_302 = bits(stbuf_data[0], 7, 0) @[el2_lsu_stbuf.scala 149:96] + node _T_303 = mux(_T_300, _T_301, _T_302) @[el2_lsu_stbuf.scala 149:10] + node _T_304 = mux(_T_289, _T_296, _T_303) @[el2_lsu_stbuf.scala 148:52] + node _T_305 = bits(sel_lo, 1, 1) @[el2_lsu_stbuf.scala 148:59] + node _T_306 = bits(stbuf_byteen[1], 0, 0) @[el2_lsu_stbuf.scala 148:84] + node _T_307 = eq(_T_306, UInt<1>("h00")) @[el2_lsu_stbuf.scala 148:68] + node _T_308 = bits(store_byteen_lo_r, 0, 0) @[el2_lsu_stbuf.scala 148:107] + node _T_309 = or(_T_307, _T_308) @[el2_lsu_stbuf.scala 148:88] + node _T_310 = bits(io.store_datafn_lo_r, 7, 0) @[el2_lsu_stbuf.scala 148:132] + node _T_311 = bits(stbuf_data[1], 7, 0) @[el2_lsu_stbuf.scala 148:153] + node _T_312 = mux(_T_309, _T_310, _T_311) @[el2_lsu_stbuf.scala 148:67] + node _T_313 = bits(stbuf_byteen[1], 0, 0) @[el2_lsu_stbuf.scala 149:27] + node _T_314 = eq(_T_313, UInt<1>("h00")) @[el2_lsu_stbuf.scala 149:11] + node _T_315 = bits(store_byteen_hi_r, 0, 0) @[el2_lsu_stbuf.scala 149:50] + node _T_316 = or(_T_314, _T_315) @[el2_lsu_stbuf.scala 149:31] + node _T_317 = bits(io.store_datafn_hi_r, 7, 0) @[el2_lsu_stbuf.scala 149:75] + node _T_318 = bits(stbuf_data[1], 7, 0) @[el2_lsu_stbuf.scala 149:96] + node _T_319 = mux(_T_316, _T_317, _T_318) @[el2_lsu_stbuf.scala 149:10] + node _T_320 = mux(_T_305, _T_312, _T_319) @[el2_lsu_stbuf.scala 148:52] + node _T_321 = bits(sel_lo, 2, 2) @[el2_lsu_stbuf.scala 148:59] + node _T_322 = bits(stbuf_byteen[2], 0, 0) @[el2_lsu_stbuf.scala 148:84] + node _T_323 = eq(_T_322, UInt<1>("h00")) @[el2_lsu_stbuf.scala 148:68] + node _T_324 = bits(store_byteen_lo_r, 0, 0) @[el2_lsu_stbuf.scala 148:107] + node _T_325 = or(_T_323, _T_324) @[el2_lsu_stbuf.scala 148:88] + node _T_326 = bits(io.store_datafn_lo_r, 7, 0) @[el2_lsu_stbuf.scala 148:132] + node _T_327 = bits(stbuf_data[2], 7, 0) @[el2_lsu_stbuf.scala 148:153] + node _T_328 = mux(_T_325, _T_326, _T_327) @[el2_lsu_stbuf.scala 148:67] + node _T_329 = bits(stbuf_byteen[2], 0, 0) @[el2_lsu_stbuf.scala 149:27] + node _T_330 = eq(_T_329, UInt<1>("h00")) @[el2_lsu_stbuf.scala 149:11] + node _T_331 = bits(store_byteen_hi_r, 0, 0) @[el2_lsu_stbuf.scala 149:50] + node _T_332 = or(_T_330, _T_331) @[el2_lsu_stbuf.scala 149:31] + node _T_333 = bits(io.store_datafn_hi_r, 7, 0) @[el2_lsu_stbuf.scala 149:75] + node _T_334 = bits(stbuf_data[2], 7, 0) @[el2_lsu_stbuf.scala 149:96] + node _T_335 = mux(_T_332, _T_333, _T_334) @[el2_lsu_stbuf.scala 149:10] + node _T_336 = mux(_T_321, _T_328, _T_335) @[el2_lsu_stbuf.scala 148:52] + node _T_337 = bits(sel_lo, 3, 3) @[el2_lsu_stbuf.scala 148:59] + node _T_338 = bits(stbuf_byteen[3], 0, 0) @[el2_lsu_stbuf.scala 148:84] + node _T_339 = eq(_T_338, UInt<1>("h00")) @[el2_lsu_stbuf.scala 148:68] + node _T_340 = bits(store_byteen_lo_r, 0, 0) @[el2_lsu_stbuf.scala 148:107] + node _T_341 = or(_T_339, _T_340) @[el2_lsu_stbuf.scala 148:88] + node _T_342 = bits(io.store_datafn_lo_r, 7, 0) @[el2_lsu_stbuf.scala 148:132] + node _T_343 = bits(stbuf_data[3], 7, 0) @[el2_lsu_stbuf.scala 148:153] + node _T_344 = mux(_T_341, _T_342, _T_343) @[el2_lsu_stbuf.scala 148:67] + node _T_345 = bits(stbuf_byteen[3], 0, 0) @[el2_lsu_stbuf.scala 149:27] + node _T_346 = eq(_T_345, UInt<1>("h00")) @[el2_lsu_stbuf.scala 149:11] + node _T_347 = bits(store_byteen_hi_r, 0, 0) @[el2_lsu_stbuf.scala 149:50] + node _T_348 = or(_T_346, _T_347) @[el2_lsu_stbuf.scala 149:31] + node _T_349 = bits(io.store_datafn_hi_r, 7, 0) @[el2_lsu_stbuf.scala 149:75] + node _T_350 = bits(stbuf_data[3], 7, 0) @[el2_lsu_stbuf.scala 149:96] + node _T_351 = mux(_T_348, _T_349, _T_350) @[el2_lsu_stbuf.scala 149:10] + node _T_352 = mux(_T_337, _T_344, _T_351) @[el2_lsu_stbuf.scala 148:52] + datain1[0] <= _T_304 @[el2_lsu_stbuf.scala 148:12] + datain1[1] <= _T_320 @[el2_lsu_stbuf.scala 148:12] + datain1[2] <= _T_336 @[el2_lsu_stbuf.scala 148:12] + datain1[3] <= _T_352 @[el2_lsu_stbuf.scala 148:12] + node _T_353 = bits(sel_lo, 0, 0) @[el2_lsu_stbuf.scala 151:60] + node _T_354 = bits(stbuf_byteen[0], 1, 1) @[el2_lsu_stbuf.scala 151:85] + node _T_355 = eq(_T_354, UInt<1>("h00")) @[el2_lsu_stbuf.scala 151:69] + node _T_356 = bits(store_byteen_lo_r, 1, 1) @[el2_lsu_stbuf.scala 151:108] + node _T_357 = or(_T_355, _T_356) @[el2_lsu_stbuf.scala 151:89] + node _T_358 = bits(io.store_datafn_lo_r, 15, 8) @[el2_lsu_stbuf.scala 151:133] + node _T_359 = bits(stbuf_data[0], 15, 8) @[el2_lsu_stbuf.scala 151:155] + node _T_360 = mux(_T_357, _T_358, _T_359) @[el2_lsu_stbuf.scala 151:68] + node _T_361 = bits(stbuf_byteen[0], 1, 1) @[el2_lsu_stbuf.scala 152:27] + node _T_362 = eq(_T_361, UInt<1>("h00")) @[el2_lsu_stbuf.scala 152:11] + node _T_363 = bits(store_byteen_hi_r, 1, 1) @[el2_lsu_stbuf.scala 152:50] + node _T_364 = or(_T_362, _T_363) @[el2_lsu_stbuf.scala 152:31] + node _T_365 = bits(io.store_datafn_hi_r, 15, 8) @[el2_lsu_stbuf.scala 152:75] + node _T_366 = bits(stbuf_data[0], 15, 8) @[el2_lsu_stbuf.scala 152:97] + node _T_367 = mux(_T_364, _T_365, _T_366) @[el2_lsu_stbuf.scala 152:10] + node _T_368 = mux(_T_353, _T_360, _T_367) @[el2_lsu_stbuf.scala 151:53] + node _T_369 = bits(sel_lo, 1, 1) @[el2_lsu_stbuf.scala 151:60] + node _T_370 = bits(stbuf_byteen[1], 1, 1) @[el2_lsu_stbuf.scala 151:85] + node _T_371 = eq(_T_370, UInt<1>("h00")) @[el2_lsu_stbuf.scala 151:69] + node _T_372 = bits(store_byteen_lo_r, 1, 1) @[el2_lsu_stbuf.scala 151:108] + node _T_373 = or(_T_371, _T_372) @[el2_lsu_stbuf.scala 151:89] + node _T_374 = bits(io.store_datafn_lo_r, 15, 8) @[el2_lsu_stbuf.scala 151:133] + node _T_375 = bits(stbuf_data[1], 15, 8) @[el2_lsu_stbuf.scala 151:155] + node _T_376 = mux(_T_373, _T_374, _T_375) @[el2_lsu_stbuf.scala 151:68] + node _T_377 = bits(stbuf_byteen[1], 1, 1) @[el2_lsu_stbuf.scala 152:27] + node _T_378 = eq(_T_377, UInt<1>("h00")) @[el2_lsu_stbuf.scala 152:11] + node _T_379 = bits(store_byteen_hi_r, 1, 1) @[el2_lsu_stbuf.scala 152:50] + node _T_380 = or(_T_378, _T_379) @[el2_lsu_stbuf.scala 152:31] + node _T_381 = bits(io.store_datafn_hi_r, 15, 8) @[el2_lsu_stbuf.scala 152:75] + node _T_382 = bits(stbuf_data[1], 15, 8) @[el2_lsu_stbuf.scala 152:97] + node _T_383 = mux(_T_380, _T_381, _T_382) @[el2_lsu_stbuf.scala 152:10] + node _T_384 = mux(_T_369, _T_376, _T_383) @[el2_lsu_stbuf.scala 151:53] + node _T_385 = bits(sel_lo, 2, 2) @[el2_lsu_stbuf.scala 151:60] + node _T_386 = bits(stbuf_byteen[2], 1, 1) @[el2_lsu_stbuf.scala 151:85] + node _T_387 = eq(_T_386, UInt<1>("h00")) @[el2_lsu_stbuf.scala 151:69] + node _T_388 = bits(store_byteen_lo_r, 1, 1) @[el2_lsu_stbuf.scala 151:108] + node _T_389 = or(_T_387, _T_388) @[el2_lsu_stbuf.scala 151:89] + node _T_390 = bits(io.store_datafn_lo_r, 15, 8) @[el2_lsu_stbuf.scala 151:133] + node _T_391 = bits(stbuf_data[2], 15, 8) @[el2_lsu_stbuf.scala 151:155] + node _T_392 = mux(_T_389, _T_390, _T_391) @[el2_lsu_stbuf.scala 151:68] + node _T_393 = bits(stbuf_byteen[2], 1, 1) @[el2_lsu_stbuf.scala 152:27] + node _T_394 = eq(_T_393, UInt<1>("h00")) @[el2_lsu_stbuf.scala 152:11] + node _T_395 = bits(store_byteen_hi_r, 1, 1) @[el2_lsu_stbuf.scala 152:50] + node _T_396 = or(_T_394, _T_395) @[el2_lsu_stbuf.scala 152:31] + node _T_397 = bits(io.store_datafn_hi_r, 15, 8) @[el2_lsu_stbuf.scala 152:75] + node _T_398 = bits(stbuf_data[2], 15, 8) @[el2_lsu_stbuf.scala 152:97] + node _T_399 = mux(_T_396, _T_397, _T_398) @[el2_lsu_stbuf.scala 152:10] + node _T_400 = mux(_T_385, _T_392, _T_399) @[el2_lsu_stbuf.scala 151:53] + node _T_401 = bits(sel_lo, 3, 3) @[el2_lsu_stbuf.scala 151:60] + node _T_402 = bits(stbuf_byteen[3], 1, 1) @[el2_lsu_stbuf.scala 151:85] + node _T_403 = eq(_T_402, UInt<1>("h00")) @[el2_lsu_stbuf.scala 151:69] + node _T_404 = bits(store_byteen_lo_r, 1, 1) @[el2_lsu_stbuf.scala 151:108] + node _T_405 = or(_T_403, _T_404) @[el2_lsu_stbuf.scala 151:89] + node _T_406 = bits(io.store_datafn_lo_r, 15, 8) @[el2_lsu_stbuf.scala 151:133] + node _T_407 = bits(stbuf_data[3], 15, 8) @[el2_lsu_stbuf.scala 151:155] + node _T_408 = mux(_T_405, _T_406, _T_407) @[el2_lsu_stbuf.scala 151:68] + node _T_409 = bits(stbuf_byteen[3], 1, 1) @[el2_lsu_stbuf.scala 152:27] + node _T_410 = eq(_T_409, UInt<1>("h00")) @[el2_lsu_stbuf.scala 152:11] + node _T_411 = bits(store_byteen_hi_r, 1, 1) @[el2_lsu_stbuf.scala 152:50] + node _T_412 = or(_T_410, _T_411) @[el2_lsu_stbuf.scala 152:31] + node _T_413 = bits(io.store_datafn_hi_r, 15, 8) @[el2_lsu_stbuf.scala 152:75] + node _T_414 = bits(stbuf_data[3], 15, 8) @[el2_lsu_stbuf.scala 152:97] + node _T_415 = mux(_T_412, _T_413, _T_414) @[el2_lsu_stbuf.scala 152:10] + node _T_416 = mux(_T_401, _T_408, _T_415) @[el2_lsu_stbuf.scala 151:53] + datain2[0] <= _T_368 @[el2_lsu_stbuf.scala 151:13] + datain2[1] <= _T_384 @[el2_lsu_stbuf.scala 151:13] + datain2[2] <= _T_400 @[el2_lsu_stbuf.scala 151:13] + datain2[3] <= _T_416 @[el2_lsu_stbuf.scala 151:13] + node _T_417 = bits(sel_lo, 0, 0) @[el2_lsu_stbuf.scala 154:60] + node _T_418 = bits(stbuf_byteen[0], 2, 2) @[el2_lsu_stbuf.scala 154:85] + node _T_419 = eq(_T_418, UInt<1>("h00")) @[el2_lsu_stbuf.scala 154:69] + node _T_420 = bits(store_byteen_lo_r, 2, 2) @[el2_lsu_stbuf.scala 154:108] + node _T_421 = or(_T_419, _T_420) @[el2_lsu_stbuf.scala 154:89] + node _T_422 = bits(io.store_datafn_lo_r, 23, 16) @[el2_lsu_stbuf.scala 154:133] + node _T_423 = bits(stbuf_data[0], 23, 16) @[el2_lsu_stbuf.scala 154:156] + node _T_424 = mux(_T_421, _T_422, _T_423) @[el2_lsu_stbuf.scala 154:68] + node _T_425 = bits(stbuf_byteen[0], 2, 2) @[el2_lsu_stbuf.scala 155:27] + node _T_426 = eq(_T_425, UInt<1>("h00")) @[el2_lsu_stbuf.scala 155:11] + node _T_427 = bits(store_byteen_hi_r, 2, 2) @[el2_lsu_stbuf.scala 155:50] + node _T_428 = or(_T_426, _T_427) @[el2_lsu_stbuf.scala 155:31] + node _T_429 = bits(io.store_datafn_hi_r, 23, 16) @[el2_lsu_stbuf.scala 155:75] + node _T_430 = bits(stbuf_data[0], 23, 16) @[el2_lsu_stbuf.scala 155:98] + node _T_431 = mux(_T_428, _T_429, _T_430) @[el2_lsu_stbuf.scala 155:10] + node _T_432 = mux(_T_417, _T_424, _T_431) @[el2_lsu_stbuf.scala 154:53] + node _T_433 = bits(sel_lo, 1, 1) @[el2_lsu_stbuf.scala 154:60] + node _T_434 = bits(stbuf_byteen[1], 2, 2) @[el2_lsu_stbuf.scala 154:85] + node _T_435 = eq(_T_434, UInt<1>("h00")) @[el2_lsu_stbuf.scala 154:69] + node _T_436 = bits(store_byteen_lo_r, 2, 2) @[el2_lsu_stbuf.scala 154:108] + node _T_437 = or(_T_435, _T_436) @[el2_lsu_stbuf.scala 154:89] + node _T_438 = bits(io.store_datafn_lo_r, 23, 16) @[el2_lsu_stbuf.scala 154:133] + node _T_439 = bits(stbuf_data[1], 23, 16) @[el2_lsu_stbuf.scala 154:156] + node _T_440 = mux(_T_437, _T_438, _T_439) @[el2_lsu_stbuf.scala 154:68] + node _T_441 = bits(stbuf_byteen[1], 2, 2) @[el2_lsu_stbuf.scala 155:27] + node _T_442 = eq(_T_441, UInt<1>("h00")) @[el2_lsu_stbuf.scala 155:11] + node _T_443 = bits(store_byteen_hi_r, 2, 2) @[el2_lsu_stbuf.scala 155:50] + node _T_444 = or(_T_442, _T_443) @[el2_lsu_stbuf.scala 155:31] + node _T_445 = bits(io.store_datafn_hi_r, 23, 16) @[el2_lsu_stbuf.scala 155:75] + node _T_446 = bits(stbuf_data[1], 23, 16) @[el2_lsu_stbuf.scala 155:98] + node _T_447 = mux(_T_444, _T_445, _T_446) @[el2_lsu_stbuf.scala 155:10] + node _T_448 = mux(_T_433, _T_440, _T_447) @[el2_lsu_stbuf.scala 154:53] + node _T_449 = bits(sel_lo, 2, 2) @[el2_lsu_stbuf.scala 154:60] + node _T_450 = bits(stbuf_byteen[2], 2, 2) @[el2_lsu_stbuf.scala 154:85] + node _T_451 = eq(_T_450, UInt<1>("h00")) @[el2_lsu_stbuf.scala 154:69] + node _T_452 = bits(store_byteen_lo_r, 2, 2) @[el2_lsu_stbuf.scala 154:108] + node _T_453 = or(_T_451, _T_452) @[el2_lsu_stbuf.scala 154:89] + node _T_454 = bits(io.store_datafn_lo_r, 23, 16) @[el2_lsu_stbuf.scala 154:133] + node _T_455 = bits(stbuf_data[2], 23, 16) @[el2_lsu_stbuf.scala 154:156] + node _T_456 = mux(_T_453, _T_454, _T_455) @[el2_lsu_stbuf.scala 154:68] + node _T_457 = bits(stbuf_byteen[2], 2, 2) @[el2_lsu_stbuf.scala 155:27] + node _T_458 = eq(_T_457, UInt<1>("h00")) @[el2_lsu_stbuf.scala 155:11] + node _T_459 = bits(store_byteen_hi_r, 2, 2) @[el2_lsu_stbuf.scala 155:50] + node _T_460 = or(_T_458, _T_459) @[el2_lsu_stbuf.scala 155:31] + node _T_461 = bits(io.store_datafn_hi_r, 23, 16) @[el2_lsu_stbuf.scala 155:75] + node _T_462 = bits(stbuf_data[2], 23, 16) @[el2_lsu_stbuf.scala 155:98] + node _T_463 = mux(_T_460, _T_461, _T_462) @[el2_lsu_stbuf.scala 155:10] + node _T_464 = mux(_T_449, _T_456, _T_463) @[el2_lsu_stbuf.scala 154:53] + node _T_465 = bits(sel_lo, 3, 3) @[el2_lsu_stbuf.scala 154:60] + node _T_466 = bits(stbuf_byteen[3], 2, 2) @[el2_lsu_stbuf.scala 154:85] + node _T_467 = eq(_T_466, UInt<1>("h00")) @[el2_lsu_stbuf.scala 154:69] + node _T_468 = bits(store_byteen_lo_r, 2, 2) @[el2_lsu_stbuf.scala 154:108] + node _T_469 = or(_T_467, _T_468) @[el2_lsu_stbuf.scala 154:89] + node _T_470 = bits(io.store_datafn_lo_r, 23, 16) @[el2_lsu_stbuf.scala 154:133] + node _T_471 = bits(stbuf_data[3], 23, 16) @[el2_lsu_stbuf.scala 154:156] + node _T_472 = mux(_T_469, _T_470, _T_471) @[el2_lsu_stbuf.scala 154:68] + node _T_473 = bits(stbuf_byteen[3], 2, 2) @[el2_lsu_stbuf.scala 155:27] + node _T_474 = eq(_T_473, UInt<1>("h00")) @[el2_lsu_stbuf.scala 155:11] + node _T_475 = bits(store_byteen_hi_r, 2, 2) @[el2_lsu_stbuf.scala 155:50] + node _T_476 = or(_T_474, _T_475) @[el2_lsu_stbuf.scala 155:31] + node _T_477 = bits(io.store_datafn_hi_r, 23, 16) @[el2_lsu_stbuf.scala 155:75] + node _T_478 = bits(stbuf_data[3], 23, 16) @[el2_lsu_stbuf.scala 155:98] + node _T_479 = mux(_T_476, _T_477, _T_478) @[el2_lsu_stbuf.scala 155:10] + node _T_480 = mux(_T_465, _T_472, _T_479) @[el2_lsu_stbuf.scala 154:53] + datain3[0] <= _T_432 @[el2_lsu_stbuf.scala 154:13] + datain3[1] <= _T_448 @[el2_lsu_stbuf.scala 154:13] + datain3[2] <= _T_464 @[el2_lsu_stbuf.scala 154:13] + datain3[3] <= _T_480 @[el2_lsu_stbuf.scala 154:13] + node _T_481 = bits(sel_lo, 0, 0) @[el2_lsu_stbuf.scala 157:60] + node _T_482 = bits(stbuf_byteen[0], 3, 3) @[el2_lsu_stbuf.scala 157:85] + node _T_483 = eq(_T_482, UInt<1>("h00")) @[el2_lsu_stbuf.scala 157:69] + node _T_484 = bits(store_byteen_lo_r, 3, 3) @[el2_lsu_stbuf.scala 157:108] + node _T_485 = or(_T_483, _T_484) @[el2_lsu_stbuf.scala 157:89] + node _T_486 = bits(io.store_datafn_lo_r, 31, 24) @[el2_lsu_stbuf.scala 157:133] + node _T_487 = bits(stbuf_data[0], 31, 24) @[el2_lsu_stbuf.scala 157:156] + node _T_488 = mux(_T_485, _T_486, _T_487) @[el2_lsu_stbuf.scala 157:68] + node _T_489 = bits(stbuf_byteen[0], 3, 3) @[el2_lsu_stbuf.scala 158:27] + node _T_490 = eq(_T_489, UInt<1>("h00")) @[el2_lsu_stbuf.scala 158:11] + node _T_491 = bits(store_byteen_hi_r, 3, 3) @[el2_lsu_stbuf.scala 158:50] + node _T_492 = or(_T_490, _T_491) @[el2_lsu_stbuf.scala 158:31] + node _T_493 = bits(io.store_datafn_hi_r, 31, 24) @[el2_lsu_stbuf.scala 158:75] + node _T_494 = bits(stbuf_data[0], 31, 24) @[el2_lsu_stbuf.scala 158:98] + node _T_495 = mux(_T_492, _T_493, _T_494) @[el2_lsu_stbuf.scala 158:10] + node _T_496 = mux(_T_481, _T_488, _T_495) @[el2_lsu_stbuf.scala 157:53] + node _T_497 = bits(sel_lo, 1, 1) @[el2_lsu_stbuf.scala 157:60] + node _T_498 = bits(stbuf_byteen[1], 3, 3) @[el2_lsu_stbuf.scala 157:85] + node _T_499 = eq(_T_498, UInt<1>("h00")) @[el2_lsu_stbuf.scala 157:69] + node _T_500 = bits(store_byteen_lo_r, 3, 3) @[el2_lsu_stbuf.scala 157:108] + node _T_501 = or(_T_499, _T_500) @[el2_lsu_stbuf.scala 157:89] + node _T_502 = bits(io.store_datafn_lo_r, 31, 24) @[el2_lsu_stbuf.scala 157:133] + node _T_503 = bits(stbuf_data[1], 31, 24) @[el2_lsu_stbuf.scala 157:156] + node _T_504 = mux(_T_501, _T_502, _T_503) @[el2_lsu_stbuf.scala 157:68] + node _T_505 = bits(stbuf_byteen[1], 3, 3) @[el2_lsu_stbuf.scala 158:27] + node _T_506 = eq(_T_505, UInt<1>("h00")) @[el2_lsu_stbuf.scala 158:11] + node _T_507 = bits(store_byteen_hi_r, 3, 3) @[el2_lsu_stbuf.scala 158:50] + node _T_508 = or(_T_506, _T_507) @[el2_lsu_stbuf.scala 158:31] + node _T_509 = bits(io.store_datafn_hi_r, 31, 24) @[el2_lsu_stbuf.scala 158:75] + node _T_510 = bits(stbuf_data[1], 31, 24) @[el2_lsu_stbuf.scala 158:98] + node _T_511 = mux(_T_508, _T_509, _T_510) @[el2_lsu_stbuf.scala 158:10] + node _T_512 = mux(_T_497, _T_504, _T_511) @[el2_lsu_stbuf.scala 157:53] + node _T_513 = bits(sel_lo, 2, 2) @[el2_lsu_stbuf.scala 157:60] + node _T_514 = bits(stbuf_byteen[2], 3, 3) @[el2_lsu_stbuf.scala 157:85] + node _T_515 = eq(_T_514, UInt<1>("h00")) @[el2_lsu_stbuf.scala 157:69] + node _T_516 = bits(store_byteen_lo_r, 3, 3) @[el2_lsu_stbuf.scala 157:108] + node _T_517 = or(_T_515, _T_516) @[el2_lsu_stbuf.scala 157:89] + node _T_518 = bits(io.store_datafn_lo_r, 31, 24) @[el2_lsu_stbuf.scala 157:133] + node _T_519 = bits(stbuf_data[2], 31, 24) @[el2_lsu_stbuf.scala 157:156] + node _T_520 = mux(_T_517, _T_518, _T_519) @[el2_lsu_stbuf.scala 157:68] + node _T_521 = bits(stbuf_byteen[2], 3, 3) @[el2_lsu_stbuf.scala 158:27] + node _T_522 = eq(_T_521, UInt<1>("h00")) @[el2_lsu_stbuf.scala 158:11] + node _T_523 = bits(store_byteen_hi_r, 3, 3) @[el2_lsu_stbuf.scala 158:50] + node _T_524 = or(_T_522, _T_523) @[el2_lsu_stbuf.scala 158:31] + node _T_525 = bits(io.store_datafn_hi_r, 31, 24) @[el2_lsu_stbuf.scala 158:75] + node _T_526 = bits(stbuf_data[2], 31, 24) @[el2_lsu_stbuf.scala 158:98] + node _T_527 = mux(_T_524, _T_525, _T_526) @[el2_lsu_stbuf.scala 158:10] + node _T_528 = mux(_T_513, _T_520, _T_527) @[el2_lsu_stbuf.scala 157:53] + node _T_529 = bits(sel_lo, 3, 3) @[el2_lsu_stbuf.scala 157:60] + node _T_530 = bits(stbuf_byteen[3], 3, 3) @[el2_lsu_stbuf.scala 157:85] + node _T_531 = eq(_T_530, UInt<1>("h00")) @[el2_lsu_stbuf.scala 157:69] + node _T_532 = bits(store_byteen_lo_r, 3, 3) @[el2_lsu_stbuf.scala 157:108] + node _T_533 = or(_T_531, _T_532) @[el2_lsu_stbuf.scala 157:89] + node _T_534 = bits(io.store_datafn_lo_r, 31, 24) @[el2_lsu_stbuf.scala 157:133] + node _T_535 = bits(stbuf_data[3], 31, 24) @[el2_lsu_stbuf.scala 157:156] + node _T_536 = mux(_T_533, _T_534, _T_535) @[el2_lsu_stbuf.scala 157:68] + node _T_537 = bits(stbuf_byteen[3], 3, 3) @[el2_lsu_stbuf.scala 158:27] + node _T_538 = eq(_T_537, UInt<1>("h00")) @[el2_lsu_stbuf.scala 158:11] + node _T_539 = bits(store_byteen_hi_r, 3, 3) @[el2_lsu_stbuf.scala 158:50] + node _T_540 = or(_T_538, _T_539) @[el2_lsu_stbuf.scala 158:31] + node _T_541 = bits(io.store_datafn_hi_r, 31, 24) @[el2_lsu_stbuf.scala 158:75] + node _T_542 = bits(stbuf_data[3], 31, 24) @[el2_lsu_stbuf.scala 158:98] + node _T_543 = mux(_T_540, _T_541, _T_542) @[el2_lsu_stbuf.scala 158:10] + node _T_544 = mux(_T_529, _T_536, _T_543) @[el2_lsu_stbuf.scala 157:53] + datain4[0] <= _T_496 @[el2_lsu_stbuf.scala 157:13] + datain4[1] <= _T_512 @[el2_lsu_stbuf.scala 157:13] + datain4[2] <= _T_528 @[el2_lsu_stbuf.scala 157:13] + datain4[3] <= _T_544 @[el2_lsu_stbuf.scala 157:13] + node _T_545 = cat(datain2[0], datain1[0]) @[Cat.scala 29:58] + node _T_546 = cat(datain4[0], datain3[0]) @[Cat.scala 29:58] + node _T_547 = cat(_T_546, _T_545) @[Cat.scala 29:58] + node _T_548 = cat(datain2[1], datain1[1]) @[Cat.scala 29:58] + node _T_549 = cat(datain4[1], datain3[1]) @[Cat.scala 29:58] + node _T_550 = cat(_T_549, _T_548) @[Cat.scala 29:58] + node _T_551 = cat(datain2[2], datain1[2]) @[Cat.scala 29:58] + node _T_552 = cat(datain4[2], datain3[2]) @[Cat.scala 29:58] + node _T_553 = cat(_T_552, _T_551) @[Cat.scala 29:58] + node _T_554 = cat(datain2[3], datain1[3]) @[Cat.scala 29:58] + node _T_555 = cat(datain4[3], datain3[3]) @[Cat.scala 29:58] + node _T_556 = cat(_T_555, _T_554) @[Cat.scala 29:58] + stbuf_datain[0] <= _T_547 @[el2_lsu_stbuf.scala 160:17] + stbuf_datain[1] <= _T_550 @[el2_lsu_stbuf.scala 160:17] + stbuf_datain[2] <= _T_553 @[el2_lsu_stbuf.scala 160:17] + stbuf_datain[3] <= _T_556 @[el2_lsu_stbuf.scala 160:17] + node _T_557 = bits(stbuf_wr_en, 0, 0) @[el2_lsu_stbuf.scala 164:104] + node _T_558 = bits(_T_557, 0, 0) @[el2_lsu_stbuf.scala 164:114] + node _T_559 = bits(stbuf_vld, 0, 0) @[el2_lsu_stbuf.scala 164:131] + node _T_560 = mux(_T_558, UInt<1>("h01"), _T_559) @[el2_lsu_stbuf.scala 164:92] + node _T_561 = bits(stbuf_reset, 0, 0) @[el2_lsu_stbuf.scala 164:150] + node _T_562 = eq(_T_561, UInt<1>("h00")) @[el2_lsu_stbuf.scala 164:138] + node _T_563 = and(_T_560, _T_562) @[el2_lsu_stbuf.scala 164:136] + reg _T_564 : UInt, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_stbuf.scala 164:88] + _T_564 <= _T_563 @[el2_lsu_stbuf.scala 164:88] + node _T_565 = bits(stbuf_wr_en, 1, 1) @[el2_lsu_stbuf.scala 164:104] + node _T_566 = bits(_T_565, 0, 0) @[el2_lsu_stbuf.scala 164:114] + node _T_567 = bits(stbuf_vld, 1, 1) @[el2_lsu_stbuf.scala 164:131] + node _T_568 = mux(_T_566, UInt<1>("h01"), _T_567) @[el2_lsu_stbuf.scala 164:92] + node _T_569 = bits(stbuf_reset, 1, 1) @[el2_lsu_stbuf.scala 164:150] + node _T_570 = eq(_T_569, UInt<1>("h00")) @[el2_lsu_stbuf.scala 164:138] + node _T_571 = and(_T_568, _T_570) @[el2_lsu_stbuf.scala 164:136] + reg _T_572 : UInt, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_stbuf.scala 164:88] + _T_572 <= _T_571 @[el2_lsu_stbuf.scala 164:88] + node _T_573 = bits(stbuf_wr_en, 2, 2) @[el2_lsu_stbuf.scala 164:104] + node _T_574 = bits(_T_573, 0, 0) @[el2_lsu_stbuf.scala 164:114] + node _T_575 = bits(stbuf_vld, 2, 2) @[el2_lsu_stbuf.scala 164:131] + node _T_576 = mux(_T_574, UInt<1>("h01"), _T_575) @[el2_lsu_stbuf.scala 164:92] + node _T_577 = bits(stbuf_reset, 2, 2) @[el2_lsu_stbuf.scala 164:150] + node _T_578 = eq(_T_577, UInt<1>("h00")) @[el2_lsu_stbuf.scala 164:138] + node _T_579 = and(_T_576, _T_578) @[el2_lsu_stbuf.scala 164:136] + reg _T_580 : UInt, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_stbuf.scala 164:88] + _T_580 <= _T_579 @[el2_lsu_stbuf.scala 164:88] + node _T_581 = bits(stbuf_wr_en, 3, 3) @[el2_lsu_stbuf.scala 164:104] + node _T_582 = bits(_T_581, 0, 0) @[el2_lsu_stbuf.scala 164:114] + node _T_583 = bits(stbuf_vld, 3, 3) @[el2_lsu_stbuf.scala 164:131] + node _T_584 = mux(_T_582, UInt<1>("h01"), _T_583) @[el2_lsu_stbuf.scala 164:92] + node _T_585 = bits(stbuf_reset, 3, 3) @[el2_lsu_stbuf.scala 164:150] + node _T_586 = eq(_T_585, UInt<1>("h00")) @[el2_lsu_stbuf.scala 164:138] + node _T_587 = and(_T_584, _T_586) @[el2_lsu_stbuf.scala 164:136] + reg _T_588 : UInt, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_stbuf.scala 164:88] + _T_588 <= _T_587 @[el2_lsu_stbuf.scala 164:88] + node _T_589 = cat(_T_588, _T_580) @[Cat.scala 29:58] + node _T_590 = cat(_T_589, _T_572) @[Cat.scala 29:58] + node _T_591 = cat(_T_590, _T_564) @[Cat.scala 29:58] + stbuf_vld <= _T_591 @[el2_lsu_stbuf.scala 164:13] + node _T_592 = bits(stbuf_dma_kill_en, 0, 0) @[el2_lsu_stbuf.scala 166:84] + node _T_593 = bits(_T_592, 0, 0) @[el2_lsu_stbuf.scala 166:88] + node _T_594 = bits(stbuf_dma_kill, 0, 0) @[el2_lsu_stbuf.scala 166:114] + node _T_595 = mux(_T_593, UInt<1>("h01"), _T_594) @[el2_lsu_stbuf.scala 166:66] + node _T_596 = bits(stbuf_reset, 0, 0) @[el2_lsu_stbuf.scala 166:133] + node _T_597 = eq(_T_596, UInt<1>("h00")) @[el2_lsu_stbuf.scala 166:121] + node _T_598 = and(_T_595, _T_597) @[el2_lsu_stbuf.scala 166:119] + reg _T_599 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_stbuf.scala 166:62] + _T_599 <= _T_598 @[el2_lsu_stbuf.scala 166:62] + node _T_600 = bits(stbuf_dma_kill_en, 1, 1) @[el2_lsu_stbuf.scala 166:84] + node _T_601 = bits(_T_600, 0, 0) @[el2_lsu_stbuf.scala 166:88] + node _T_602 = bits(stbuf_dma_kill, 1, 1) @[el2_lsu_stbuf.scala 166:114] + node _T_603 = mux(_T_601, UInt<1>("h01"), _T_602) @[el2_lsu_stbuf.scala 166:66] + node _T_604 = bits(stbuf_reset, 1, 1) @[el2_lsu_stbuf.scala 166:133] + node _T_605 = eq(_T_604, UInt<1>("h00")) @[el2_lsu_stbuf.scala 166:121] + node _T_606 = and(_T_603, _T_605) @[el2_lsu_stbuf.scala 166:119] + reg _T_607 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_stbuf.scala 166:62] + _T_607 <= _T_606 @[el2_lsu_stbuf.scala 166:62] + node _T_608 = bits(stbuf_dma_kill_en, 2, 2) @[el2_lsu_stbuf.scala 166:84] + node _T_609 = bits(_T_608, 0, 0) @[el2_lsu_stbuf.scala 166:88] + node _T_610 = bits(stbuf_dma_kill, 2, 2) @[el2_lsu_stbuf.scala 166:114] + node _T_611 = mux(_T_609, UInt<1>("h01"), _T_610) @[el2_lsu_stbuf.scala 166:66] + node _T_612 = bits(stbuf_reset, 2, 2) @[el2_lsu_stbuf.scala 166:133] + node _T_613 = eq(_T_612, UInt<1>("h00")) @[el2_lsu_stbuf.scala 166:121] + node _T_614 = and(_T_611, _T_613) @[el2_lsu_stbuf.scala 166:119] + reg _T_615 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_stbuf.scala 166:62] + _T_615 <= _T_614 @[el2_lsu_stbuf.scala 166:62] + node _T_616 = bits(stbuf_dma_kill_en, 3, 3) @[el2_lsu_stbuf.scala 166:84] + node _T_617 = bits(_T_616, 0, 0) @[el2_lsu_stbuf.scala 166:88] + node _T_618 = bits(stbuf_dma_kill, 3, 3) @[el2_lsu_stbuf.scala 166:114] + node _T_619 = mux(_T_617, UInt<1>("h01"), _T_618) @[el2_lsu_stbuf.scala 166:66] + node _T_620 = bits(stbuf_reset, 3, 3) @[el2_lsu_stbuf.scala 166:133] + node _T_621 = eq(_T_620, UInt<1>("h00")) @[el2_lsu_stbuf.scala 166:121] + node _T_622 = and(_T_619, _T_621) @[el2_lsu_stbuf.scala 166:119] + reg _T_623 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_stbuf.scala 166:62] + _T_623 <= _T_622 @[el2_lsu_stbuf.scala 166:62] + node _T_624 = cat(_T_623, _T_615) @[Cat.scala 29:58] + node _T_625 = cat(_T_624, _T_607) @[Cat.scala 29:58] + node _T_626 = cat(_T_625, _T_599) @[Cat.scala 29:58] + stbuf_dma_kill <= _T_626 @[el2_lsu_stbuf.scala 166:18] + node _T_627 = bits(stbuf_wr_en, 0, 0) @[el2_lsu_stbuf.scala 167:108] + node _T_628 = bits(_T_627, 0, 0) @[el2_lsu_stbuf.scala 167:118] + node _T_629 = mux(_T_628, stbuf_byteenin[0], stbuf_byteen[0]) @[el2_lsu_stbuf.scala 167:96] + node _T_630 = bits(stbuf_reset, 0, 0) @[el2_lsu_stbuf.scala 167:206] + node _T_631 = eq(_T_630, UInt<1>("h00")) @[el2_lsu_stbuf.scala 167:194] + node _T_632 = bits(_T_631, 0, 0) @[Bitwise.scala 72:15] + node _T_633 = mux(_T_632, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_634 = and(_T_629, _T_633) @[el2_lsu_stbuf.scala 167:158] + reg _T_635 : UInt, io.lsu_stbuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_stbuf.scala 167:92] + _T_635 <= _T_634 @[el2_lsu_stbuf.scala 167:92] + node _T_636 = bits(stbuf_wr_en, 1, 1) @[el2_lsu_stbuf.scala 167:108] + node _T_637 = bits(_T_636, 0, 0) @[el2_lsu_stbuf.scala 167:118] + node _T_638 = mux(_T_637, stbuf_byteenin[1], stbuf_byteen[1]) @[el2_lsu_stbuf.scala 167:96] + node _T_639 = bits(stbuf_reset, 1, 1) @[el2_lsu_stbuf.scala 167:206] + node _T_640 = eq(_T_639, UInt<1>("h00")) @[el2_lsu_stbuf.scala 167:194] + node _T_641 = bits(_T_640, 0, 0) @[Bitwise.scala 72:15] + node _T_642 = mux(_T_641, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_643 = and(_T_638, _T_642) @[el2_lsu_stbuf.scala 167:158] + reg _T_644 : UInt, io.lsu_stbuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_stbuf.scala 167:92] + _T_644 <= _T_643 @[el2_lsu_stbuf.scala 167:92] + node _T_645 = bits(stbuf_wr_en, 2, 2) @[el2_lsu_stbuf.scala 167:108] + node _T_646 = bits(_T_645, 0, 0) @[el2_lsu_stbuf.scala 167:118] + node _T_647 = mux(_T_646, stbuf_byteenin[2], stbuf_byteen[2]) @[el2_lsu_stbuf.scala 167:96] + node _T_648 = bits(stbuf_reset, 2, 2) @[el2_lsu_stbuf.scala 167:206] + node _T_649 = eq(_T_648, UInt<1>("h00")) @[el2_lsu_stbuf.scala 167:194] + node _T_650 = bits(_T_649, 0, 0) @[Bitwise.scala 72:15] + node _T_651 = mux(_T_650, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_652 = and(_T_647, _T_651) @[el2_lsu_stbuf.scala 167:158] + reg _T_653 : UInt, io.lsu_stbuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_stbuf.scala 167:92] + _T_653 <= _T_652 @[el2_lsu_stbuf.scala 167:92] + node _T_654 = bits(stbuf_wr_en, 3, 3) @[el2_lsu_stbuf.scala 167:108] + node _T_655 = bits(_T_654, 0, 0) @[el2_lsu_stbuf.scala 167:118] + node _T_656 = mux(_T_655, stbuf_byteenin[3], stbuf_byteen[3]) @[el2_lsu_stbuf.scala 167:96] + node _T_657 = bits(stbuf_reset, 3, 3) @[el2_lsu_stbuf.scala 167:206] + node _T_658 = eq(_T_657, UInt<1>("h00")) @[el2_lsu_stbuf.scala 167:194] + node _T_659 = bits(_T_658, 0, 0) @[Bitwise.scala 72:15] + node _T_660 = mux(_T_659, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_661 = and(_T_656, _T_660) @[el2_lsu_stbuf.scala 167:158] + reg _T_662 : UInt, io.lsu_stbuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_stbuf.scala 167:92] + _T_662 <= _T_661 @[el2_lsu_stbuf.scala 167:92] + stbuf_byteen[0] <= _T_635 @[el2_lsu_stbuf.scala 167:16] + stbuf_byteen[1] <= _T_644 @[el2_lsu_stbuf.scala 167:16] + stbuf_byteen[2] <= _T_653 @[el2_lsu_stbuf.scala 167:16] + stbuf_byteen[3] <= _T_662 @[el2_lsu_stbuf.scala 167:16] + node _T_663 = bits(stbuf_wr_en, 0, 0) @[el2_lsu_stbuf.scala 172:67] + node _T_664 = bits(_T_663, 0, 0) @[el2_lsu_stbuf.scala 172:77] + reg _T_665 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_664 : @[Reg.scala 28:19] + _T_665 <= stbuf_addrin[0] @[Reg.scala 28:23] skip @[Reg.scala 28:19] - stbuf_vld[0] <= _T_515 @[el2_lsu_stbuf.scala 154:51] - node _T_516 = bits(stbuf_reset, 0, 0) @[el2_lsu_stbuf.scala 155:87] - node _T_517 = eq(_T_516, UInt<1>("h00")) @[el2_lsu_stbuf.scala 155:75] - node _T_518 = and(UInt<1>("h01"), _T_517) @[el2_lsu_stbuf.scala 155:73] - node _T_519 = bits(stbuf_dma_kill_en, 0, 0) @[el2_lsu_stbuf.scala 155:114] - node _T_520 = bits(_T_519, 0, 0) @[el2_lsu_stbuf.scala 155:118] - reg _T_521 : UInt, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] - when _T_520 : @[Reg.scala 28:19] - _T_521 <= _T_518 @[Reg.scala 28:23] + stbuf_addr[0] <= _T_665 @[el2_lsu_stbuf.scala 172:21] + node _T_666 = bits(stbuf_wr_en, 0, 0) @[el2_lsu_stbuf.scala 174:66] + node _T_667 = bits(_T_666, 0, 0) @[el2_lsu_stbuf.scala 174:76] + reg _T_668 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_667 : @[Reg.scala 28:19] + _T_668 <= stbuf_datain[0] @[Reg.scala 28:23] skip @[Reg.scala 28:19] - stbuf_dma_kill[0] <= _T_521 @[el2_lsu_stbuf.scala 155:56] - node _T_522 = bits(stbuf_wr_en, 0, 0) @[el2_lsu_stbuf.scala 156:67] - reg _T_523 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] - when _T_522 : @[Reg.scala 28:19] - _T_523 <= stbuf_addrin[0] @[Reg.scala 28:23] + stbuf_data[0] <= _T_668 @[el2_lsu_stbuf.scala 174:20] + node _T_669 = bits(stbuf_wr_en, 1, 1) @[el2_lsu_stbuf.scala 172:67] + node _T_670 = bits(_T_669, 0, 0) @[el2_lsu_stbuf.scala 172:77] + reg _T_671 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_670 : @[Reg.scala 28:19] + _T_671 <= stbuf_addrin[1] @[Reg.scala 28:23] skip @[Reg.scala 28:19] - stbuf_addr[0] <= _T_523 @[el2_lsu_stbuf.scala 156:21] - node _T_524 = bits(stbuf_reset, 0, 0) @[el2_lsu_stbuf.scala 157:134] - node _T_525 = eq(_T_524, UInt<1>("h00")) @[el2_lsu_stbuf.scala 157:122] - node _T_526 = bits(_T_525, 0, 0) @[Bitwise.scala 72:15] - node _T_527 = mux(_T_526, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] - node _T_528 = and(stbuf_byteenin[0], _T_527) @[el2_lsu_stbuf.scala 157:87] - node _T_529 = bits(stbuf_wr_en, 0, 0) @[el2_lsu_stbuf.scala 157:156] - reg _T_530 : UInt, io.lsu_stbuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] - when _T_529 : @[Reg.scala 28:19] - _T_530 <= _T_528 @[Reg.scala 28:23] + stbuf_addr[1] <= _T_671 @[el2_lsu_stbuf.scala 172:21] + node _T_672 = bits(stbuf_wr_en, 1, 1) @[el2_lsu_stbuf.scala 174:66] + node _T_673 = bits(_T_672, 0, 0) @[el2_lsu_stbuf.scala 174:76] + reg _T_674 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_673 : @[Reg.scala 28:19] + _T_674 <= stbuf_datain[1] @[Reg.scala 28:23] skip @[Reg.scala 28:19] - stbuf_byteen[0] <= _T_530 @[el2_lsu_stbuf.scala 157:55] - node _T_531 = bits(stbuf_wr_en, 0, 0) @[el2_lsu_stbuf.scala 158:67] - reg _T_532 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] - when _T_531 : @[Reg.scala 28:19] - _T_532 <= stbuf_datain[0] @[Reg.scala 28:23] + stbuf_data[1] <= _T_674 @[el2_lsu_stbuf.scala 174:20] + node _T_675 = bits(stbuf_wr_en, 2, 2) @[el2_lsu_stbuf.scala 172:67] + node _T_676 = bits(_T_675, 0, 0) @[el2_lsu_stbuf.scala 172:77] + reg _T_677 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_676 : @[Reg.scala 28:19] + _T_677 <= stbuf_addrin[2] @[Reg.scala 28:23] skip @[Reg.scala 28:19] - stbuf_data[0] <= _T_532 @[el2_lsu_stbuf.scala 158:21] - node _T_533 = bits(stbuf_reset, 1, 1) @[el2_lsu_stbuf.scala 154:82] - node _T_534 = eq(_T_533, UInt<1>("h00")) @[el2_lsu_stbuf.scala 154:70] - node _T_535 = and(UInt<1>("h01"), _T_534) @[el2_lsu_stbuf.scala 154:68] - node _T_536 = bits(stbuf_wr_en, 1, 1) @[el2_lsu_stbuf.scala 154:103] - reg _T_537 : UInt, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] - when _T_536 : @[Reg.scala 28:19] - _T_537 <= _T_535 @[Reg.scala 28:23] + stbuf_addr[2] <= _T_677 @[el2_lsu_stbuf.scala 172:21] + node _T_678 = bits(stbuf_wr_en, 2, 2) @[el2_lsu_stbuf.scala 174:66] + node _T_679 = bits(_T_678, 0, 0) @[el2_lsu_stbuf.scala 174:76] + reg _T_680 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_679 : @[Reg.scala 28:19] + _T_680 <= stbuf_datain[2] @[Reg.scala 28:23] skip @[Reg.scala 28:19] - stbuf_vld[1] <= _T_537 @[el2_lsu_stbuf.scala 154:51] - node _T_538 = bits(stbuf_reset, 1, 1) @[el2_lsu_stbuf.scala 155:87] - node _T_539 = eq(_T_538, UInt<1>("h00")) @[el2_lsu_stbuf.scala 155:75] - node _T_540 = and(UInt<1>("h01"), _T_539) @[el2_lsu_stbuf.scala 155:73] - node _T_541 = bits(stbuf_dma_kill_en, 1, 1) @[el2_lsu_stbuf.scala 155:114] - node _T_542 = bits(_T_541, 0, 0) @[el2_lsu_stbuf.scala 155:118] - reg _T_543 : UInt, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] - when _T_542 : @[Reg.scala 28:19] - _T_543 <= _T_540 @[Reg.scala 28:23] + stbuf_data[2] <= _T_680 @[el2_lsu_stbuf.scala 174:20] + node _T_681 = bits(stbuf_wr_en, 3, 3) @[el2_lsu_stbuf.scala 172:67] + node _T_682 = bits(_T_681, 0, 0) @[el2_lsu_stbuf.scala 172:77] + reg _T_683 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_682 : @[Reg.scala 28:19] + _T_683 <= stbuf_addrin[3] @[Reg.scala 28:23] skip @[Reg.scala 28:19] - stbuf_dma_kill[1] <= _T_543 @[el2_lsu_stbuf.scala 155:56] - node _T_544 = bits(stbuf_wr_en, 1, 1) @[el2_lsu_stbuf.scala 156:67] - reg _T_545 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] - when _T_544 : @[Reg.scala 28:19] - _T_545 <= stbuf_addrin[1] @[Reg.scala 28:23] + stbuf_addr[3] <= _T_683 @[el2_lsu_stbuf.scala 172:21] + node _T_684 = bits(stbuf_wr_en, 3, 3) @[el2_lsu_stbuf.scala 174:66] + node _T_685 = bits(_T_684, 0, 0) @[el2_lsu_stbuf.scala 174:76] + reg _T_686 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_685 : @[Reg.scala 28:19] + _T_686 <= stbuf_datain[3] @[Reg.scala 28:23] skip @[Reg.scala 28:19] - stbuf_addr[1] <= _T_545 @[el2_lsu_stbuf.scala 156:21] - node _T_546 = bits(stbuf_reset, 1, 1) @[el2_lsu_stbuf.scala 157:134] - node _T_547 = eq(_T_546, UInt<1>("h00")) @[el2_lsu_stbuf.scala 157:122] - node _T_548 = bits(_T_547, 0, 0) @[Bitwise.scala 72:15] - node _T_549 = mux(_T_548, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] - node _T_550 = and(stbuf_byteenin[1], _T_549) @[el2_lsu_stbuf.scala 157:87] - node _T_551 = bits(stbuf_wr_en, 1, 1) @[el2_lsu_stbuf.scala 157:156] - reg _T_552 : UInt, io.lsu_stbuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] - when _T_551 : @[Reg.scala 28:19] - _T_552 <= _T_550 @[Reg.scala 28:23] + stbuf_data[3] <= _T_686 @[el2_lsu_stbuf.scala 174:20] + reg _T_687 : UInt<1>, io.lsu_c1_m_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_stbuf.scala 176:53] + _T_687 <= ldst_dual_d @[el2_lsu_stbuf.scala 176:53] + ldst_dual_m <= _T_687 @[el2_lsu_stbuf.scala 176:43] + reg _T_688 : UInt<1>, io.lsu_c1_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_stbuf.scala 177:53] + _T_688 <= ldst_dual_m @[el2_lsu_stbuf.scala 177:53] + ldst_dual_r <= _T_688 @[el2_lsu_stbuf.scala 177:43] + node _T_689 = dshr(stbuf_vld, RdPtr) @[el2_lsu_stbuf.scala 180:44] + node _T_690 = bits(_T_689, 0, 0) @[el2_lsu_stbuf.scala 180:44] + node _T_691 = dshr(stbuf_dma_kill, RdPtr) @[el2_lsu_stbuf.scala 180:68] + node _T_692 = bits(_T_691, 0, 0) @[el2_lsu_stbuf.scala 180:68] + node _T_693 = and(_T_690, _T_692) @[el2_lsu_stbuf.scala 180:52] + io.stbuf_reqvld_flushed_any <= _T_693 @[el2_lsu_stbuf.scala 180:32] + node _T_694 = dshr(stbuf_vld, RdPtr) @[el2_lsu_stbuf.scala 181:37] + node _T_695 = bits(_T_694, 0, 0) @[el2_lsu_stbuf.scala 181:37] + node _T_696 = dshr(stbuf_dma_kill, RdPtr) @[el2_lsu_stbuf.scala 181:62] + node _T_697 = bits(_T_696, 0, 0) @[el2_lsu_stbuf.scala 181:62] + node _T_698 = eq(_T_697, UInt<1>("h00")) @[el2_lsu_stbuf.scala 181:47] + node _T_699 = and(_T_695, _T_698) @[el2_lsu_stbuf.scala 181:45] + node _T_700 = orr(stbuf_dma_kill_en) @[el2_lsu_stbuf.scala 181:92] + node _T_701 = eq(_T_700, UInt<1>("h00")) @[el2_lsu_stbuf.scala 181:72] + node _T_702 = and(_T_699, _T_701) @[el2_lsu_stbuf.scala 181:70] + io.stbuf_reqvld_any <= _T_702 @[el2_lsu_stbuf.scala 181:25] + io.stbuf_addr_any <= stbuf_addr[RdPtr] @[el2_lsu_stbuf.scala 182:23] + io.stbuf_data_any <= stbuf_data[RdPtr] @[el2_lsu_stbuf.scala 183:23] + node _T_703 = eq(dual_stbuf_write_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 185:44] + node _T_704 = and(io.ldst_stbuf_reqvld_r, _T_703) @[el2_lsu_stbuf.scala 185:42] + node _T_705 = or(store_coalesce_hi_r, store_coalesce_lo_r) @[el2_lsu_stbuf.scala 185:88] + node _T_706 = eq(_T_705, UInt<1>("h00")) @[el2_lsu_stbuf.scala 185:66] + node _T_707 = and(_T_704, _T_706) @[el2_lsu_stbuf.scala 185:64] + node _T_708 = and(io.ldst_stbuf_reqvld_r, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 186:31] + node _T_709 = and(store_coalesce_hi_r, store_coalesce_lo_r) @[el2_lsu_stbuf.scala 186:77] + node _T_710 = eq(_T_709, UInt<1>("h00")) @[el2_lsu_stbuf.scala 186:55] + node _T_711 = and(_T_708, _T_710) @[el2_lsu_stbuf.scala 186:53] + node _T_712 = or(_T_707, _T_711) @[el2_lsu_stbuf.scala 185:113] + node WrPtrEn = bits(_T_712, 0, 0) @[el2_lsu_stbuf.scala 186:102] + node _T_713 = and(io.ldst_stbuf_reqvld_r, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 187:47] + node _T_714 = or(store_coalesce_hi_r, store_coalesce_lo_r) @[el2_lsu_stbuf.scala 187:92] + node _T_715 = eq(_T_714, UInt<1>("h00")) @[el2_lsu_stbuf.scala 187:70] + node _T_716 = and(_T_713, _T_715) @[el2_lsu_stbuf.scala 187:68] + node _T_717 = bits(_T_716, 0, 0) @[el2_lsu_stbuf.scala 187:116] + node NxtWrPtr = mux(_T_717, WrPtrPlus2, WrPtrPlus1) @[el2_lsu_stbuf.scala 187:22] + node RdPtrEn = or(io.lsu_stbuf_commit_any, io.stbuf_reqvld_flushed_any) @[el2_lsu_stbuf.scala 188:43] + reg _T_718 : UInt, io.lsu_stbuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when WrPtrEn : @[Reg.scala 28:19] + _T_718 <= NxtWrPtr @[Reg.scala 28:23] skip @[Reg.scala 28:19] - stbuf_byteen[1] <= _T_552 @[el2_lsu_stbuf.scala 157:55] - node _T_553 = bits(stbuf_wr_en, 1, 1) @[el2_lsu_stbuf.scala 158:67] - reg _T_554 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] - when _T_553 : @[Reg.scala 28:19] - _T_554 <= stbuf_datain[1] @[Reg.scala 28:23] + WrPtr <= _T_718 @[el2_lsu_stbuf.scala 191:41] + reg _T_719 : UInt, io.lsu_stbuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when RdPtrEn : @[Reg.scala 28:19] + _T_719 <= RdPtrPlus1 @[Reg.scala 28:23] skip @[Reg.scala 28:19] - stbuf_data[1] <= _T_554 @[el2_lsu_stbuf.scala 158:21] - node _T_555 = bits(stbuf_reset, 2, 2) @[el2_lsu_stbuf.scala 154:82] - node _T_556 = eq(_T_555, UInt<1>("h00")) @[el2_lsu_stbuf.scala 154:70] - node _T_557 = and(UInt<1>("h01"), _T_556) @[el2_lsu_stbuf.scala 154:68] - node _T_558 = bits(stbuf_wr_en, 2, 2) @[el2_lsu_stbuf.scala 154:103] - reg _T_559 : UInt, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] - when _T_558 : @[Reg.scala 28:19] - _T_559 <= _T_557 @[Reg.scala 28:23] - skip @[Reg.scala 28:19] - stbuf_vld[2] <= _T_559 @[el2_lsu_stbuf.scala 154:51] - node _T_560 = bits(stbuf_reset, 2, 2) @[el2_lsu_stbuf.scala 155:87] - node _T_561 = eq(_T_560, UInt<1>("h00")) @[el2_lsu_stbuf.scala 155:75] - node _T_562 = and(UInt<1>("h01"), _T_561) @[el2_lsu_stbuf.scala 155:73] - node _T_563 = bits(stbuf_dma_kill_en, 2, 2) @[el2_lsu_stbuf.scala 155:114] - node _T_564 = bits(_T_563, 0, 0) @[el2_lsu_stbuf.scala 155:118] - reg _T_565 : UInt, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] - when _T_564 : @[Reg.scala 28:19] - _T_565 <= _T_562 @[Reg.scala 28:23] - skip @[Reg.scala 28:19] - stbuf_dma_kill[2] <= _T_565 @[el2_lsu_stbuf.scala 155:56] - node _T_566 = bits(stbuf_wr_en, 2, 2) @[el2_lsu_stbuf.scala 156:67] - reg _T_567 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] - when _T_566 : @[Reg.scala 28:19] - _T_567 <= stbuf_addrin[2] @[Reg.scala 28:23] - skip @[Reg.scala 28:19] - stbuf_addr[2] <= _T_567 @[el2_lsu_stbuf.scala 156:21] - node _T_568 = bits(stbuf_reset, 2, 2) @[el2_lsu_stbuf.scala 157:134] - node _T_569 = eq(_T_568, UInt<1>("h00")) @[el2_lsu_stbuf.scala 157:122] - node _T_570 = bits(_T_569, 0, 0) @[Bitwise.scala 72:15] - node _T_571 = mux(_T_570, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] - node _T_572 = and(stbuf_byteenin[2], _T_571) @[el2_lsu_stbuf.scala 157:87] - node _T_573 = bits(stbuf_wr_en, 2, 2) @[el2_lsu_stbuf.scala 157:156] - reg _T_574 : UInt, io.lsu_stbuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] - when _T_573 : @[Reg.scala 28:19] - _T_574 <= _T_572 @[Reg.scala 28:23] - skip @[Reg.scala 28:19] - stbuf_byteen[2] <= _T_574 @[el2_lsu_stbuf.scala 157:55] - node _T_575 = bits(stbuf_wr_en, 2, 2) @[el2_lsu_stbuf.scala 158:67] - reg _T_576 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] - when _T_575 : @[Reg.scala 28:19] - _T_576 <= stbuf_datain[2] @[Reg.scala 28:23] - skip @[Reg.scala 28:19] - stbuf_data[2] <= _T_576 @[el2_lsu_stbuf.scala 158:21] - node _T_577 = bits(stbuf_reset, 3, 3) @[el2_lsu_stbuf.scala 154:82] - node _T_578 = eq(_T_577, UInt<1>("h00")) @[el2_lsu_stbuf.scala 154:70] - node _T_579 = and(UInt<1>("h01"), _T_578) @[el2_lsu_stbuf.scala 154:68] - node _T_580 = bits(stbuf_wr_en, 3, 3) @[el2_lsu_stbuf.scala 154:103] - reg _T_581 : UInt, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] - when _T_580 : @[Reg.scala 28:19] - _T_581 <= _T_579 @[Reg.scala 28:23] - skip @[Reg.scala 28:19] - stbuf_vld[3] <= _T_581 @[el2_lsu_stbuf.scala 154:51] - node _T_582 = bits(stbuf_reset, 3, 3) @[el2_lsu_stbuf.scala 155:87] - node _T_583 = eq(_T_582, UInt<1>("h00")) @[el2_lsu_stbuf.scala 155:75] - node _T_584 = and(UInt<1>("h01"), _T_583) @[el2_lsu_stbuf.scala 155:73] - node _T_585 = bits(stbuf_dma_kill_en, 3, 3) @[el2_lsu_stbuf.scala 155:114] - node _T_586 = bits(_T_585, 0, 0) @[el2_lsu_stbuf.scala 155:118] - reg _T_587 : UInt, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] - when _T_586 : @[Reg.scala 28:19] - _T_587 <= _T_584 @[Reg.scala 28:23] - skip @[Reg.scala 28:19] - stbuf_dma_kill[3] <= _T_587 @[el2_lsu_stbuf.scala 155:56] - node _T_588 = bits(stbuf_wr_en, 3, 3) @[el2_lsu_stbuf.scala 156:67] - reg _T_589 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] - when _T_588 : @[Reg.scala 28:19] - _T_589 <= stbuf_addrin[3] @[Reg.scala 28:23] - skip @[Reg.scala 28:19] - stbuf_addr[3] <= _T_589 @[el2_lsu_stbuf.scala 156:21] - node _T_590 = bits(stbuf_reset, 3, 3) @[el2_lsu_stbuf.scala 157:134] - node _T_591 = eq(_T_590, UInt<1>("h00")) @[el2_lsu_stbuf.scala 157:122] - node _T_592 = bits(_T_591, 0, 0) @[Bitwise.scala 72:15] - node _T_593 = mux(_T_592, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] - node _T_594 = and(stbuf_byteenin[3], _T_593) @[el2_lsu_stbuf.scala 157:87] - node _T_595 = bits(stbuf_wr_en, 3, 3) @[el2_lsu_stbuf.scala 157:156] - reg _T_596 : UInt, io.lsu_stbuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] - when _T_595 : @[Reg.scala 28:19] - _T_596 <= _T_594 @[Reg.scala 28:23] - skip @[Reg.scala 28:19] - stbuf_byteen[3] <= _T_596 @[el2_lsu_stbuf.scala 157:55] - node _T_597 = bits(stbuf_wr_en, 3, 3) @[el2_lsu_stbuf.scala 158:67] - reg _T_598 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] - when _T_597 : @[Reg.scala 28:19] - _T_598 <= stbuf_datain[3] @[Reg.scala 28:23] - skip @[Reg.scala 28:19] - stbuf_data[3] <= _T_598 @[el2_lsu_stbuf.scala 158:21] - reg _T_599 : UInt<1>, io.lsu_c1_m_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_stbuf.scala 160:53] - _T_599 <= ldst_dual_d @[el2_lsu_stbuf.scala 160:53] - ldst_dual_m <= _T_599 @[el2_lsu_stbuf.scala 160:43] - reg _T_600 : UInt<1>, io.lsu_c1_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_stbuf.scala 161:53] - _T_600 <= ldst_dual_m @[el2_lsu_stbuf.scala 161:53] - ldst_dual_r <= _T_600 @[el2_lsu_stbuf.scala 161:43] - node _T_601 = and(stbuf_vld[RdPtr], stbuf_dma_kill[RdPtr]) @[el2_lsu_stbuf.scala 164:52] - io.stbuf_reqvld_flushed_any <= _T_601 @[el2_lsu_stbuf.scala 164:32] - node _T_602 = eq(stbuf_dma_kill[RdPtr], UInt<1>("h00")) @[el2_lsu_stbuf.scala 165:47] - node _T_603 = and(stbuf_vld[RdPtr], _T_602) @[el2_lsu_stbuf.scala 165:45] - node _T_604 = orr(stbuf_dma_kill_en) @[el2_lsu_stbuf.scala 165:91] - node _T_605 = eq(_T_604, UInt<1>("h00")) @[el2_lsu_stbuf.scala 165:72] - node _T_606 = and(_T_603, _T_605) @[el2_lsu_stbuf.scala 165:70] - io.stbuf_reqvld_any <= _T_606 @[el2_lsu_stbuf.scala 165:25] - io.stbuf_addr_any <= stbuf_addr[RdPtr] @[el2_lsu_stbuf.scala 166:23] - io.stbuf_data_any <= stbuf_data[RdPtr] @[el2_lsu_stbuf.scala 167:23] - node _T_607 = eq(dual_stbuf_write_r, UInt<1>("h00")) @[el2_lsu_stbuf.scala 169:45] - node _T_608 = and(io.ldst_stbuf_reqvld_r, _T_607) @[el2_lsu_stbuf.scala 169:43] - node _T_609 = or(store_coalesce_hi_r, store_coalesce_lo_r) @[el2_lsu_stbuf.scala 169:89] - node _T_610 = eq(_T_609, UInt<1>("h00")) @[el2_lsu_stbuf.scala 169:67] - node _T_611 = and(_T_608, _T_610) @[el2_lsu_stbuf.scala 169:65] - node _T_612 = and(io.ldst_stbuf_reqvld_r, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 170:31] - node _T_613 = and(store_coalesce_hi_r, store_coalesce_lo_r) @[el2_lsu_stbuf.scala 170:77] - node _T_614 = eq(_T_613, UInt<1>("h00")) @[el2_lsu_stbuf.scala 170:55] - node _T_615 = and(_T_612, _T_614) @[el2_lsu_stbuf.scala 170:53] - node _T_616 = or(_T_611, _T_615) @[el2_lsu_stbuf.scala 169:114] - node WrPtrEn = bits(_T_616, 0, 0) @[el2_lsu_stbuf.scala 170:102] - node _T_617 = and(io.ldst_stbuf_reqvld_r, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 171:47] - node _T_618 = or(store_coalesce_hi_r, store_coalesce_lo_r) @[el2_lsu_stbuf.scala 171:92] - node _T_619 = eq(_T_618, UInt<1>("h00")) @[el2_lsu_stbuf.scala 171:70] - node _T_620 = and(_T_617, _T_619) @[el2_lsu_stbuf.scala 171:68] - node _T_621 = bits(_T_620, 0, 0) @[el2_lsu_stbuf.scala 171:116] - node NxtWrPtr = mux(_T_621, WrPtrPlus2, WrPtrPlus1) @[el2_lsu_stbuf.scala 171:22] - node RdPtrEn = or(io.lsu_stbuf_commit_any, io.stbuf_reqvld_flushed_any) @[el2_lsu_stbuf.scala 172:43] - node _T_622 = cat(UInt<3>("h00"), stbuf_vld[0]) @[Cat.scala 29:58] - node _T_623 = cat(UInt<3>("h00"), stbuf_vld[1]) @[Cat.scala 29:58] - node _T_624 = cat(UInt<3>("h00"), stbuf_vld[2]) @[Cat.scala 29:58] - node _T_625 = cat(UInt<3>("h00"), stbuf_vld[3]) @[Cat.scala 29:58] - wire _T_626 : UInt<4>[4] @[el2_lsu_stbuf.scala 175:60] - _T_626[0] <= _T_622 @[el2_lsu_stbuf.scala 175:60] - _T_626[1] <= _T_623 @[el2_lsu_stbuf.scala 175:60] - _T_626[2] <= _T_624 @[el2_lsu_stbuf.scala 175:60] - _T_626[3] <= _T_625 @[el2_lsu_stbuf.scala 175:60] - node _T_627 = add(_T_626[0], _T_626[1]) @[el2_lsu_stbuf.scala 175:102] - node _T_628 = tail(_T_627, 1) @[el2_lsu_stbuf.scala 175:102] - node _T_629 = add(_T_628, _T_626[2]) @[el2_lsu_stbuf.scala 175:102] - node _T_630 = tail(_T_629, 1) @[el2_lsu_stbuf.scala 175:102] - node _T_631 = add(_T_630, _T_626[3]) @[el2_lsu_stbuf.scala 175:102] - node stbuf_numvld_any = tail(_T_631, 1) @[el2_lsu_stbuf.scala 175:102] - node _T_632 = and(io.lsu_pkt_m.valid, io.lsu_pkt_m.store) @[el2_lsu_stbuf.scala 176:40] - node _T_633 = and(_T_632, io.addr_in_dccm_m) @[el2_lsu_stbuf.scala 176:61] - node _T_634 = eq(io.lsu_pkt_m.dma, UInt<1>("h00")) @[el2_lsu_stbuf.scala 176:83] - node isdccmst_m = and(_T_633, _T_634) @[el2_lsu_stbuf.scala 176:81] - node _T_635 = and(io.lsu_pkt_r.valid, io.lsu_pkt_r.store) @[el2_lsu_stbuf.scala 177:40] - node _T_636 = and(_T_635, io.addr_in_dccm_r) @[el2_lsu_stbuf.scala 177:61] - node _T_637 = eq(io.lsu_pkt_r.dma, UInt<1>("h00")) @[el2_lsu_stbuf.scala 177:83] - node isdccmst_r = and(_T_636, _T_637) @[el2_lsu_stbuf.scala 177:81] - node _T_638 = cat(UInt<1>("h00"), isdccmst_m) @[Cat.scala 29:58] - node _T_639 = and(isdccmst_m, ldst_dual_m) @[el2_lsu_stbuf.scala 179:63] - node _T_640 = dshl(_T_638, _T_639) @[el2_lsu_stbuf.scala 179:48] - stbuf_specvld_m <= _T_640 @[el2_lsu_stbuf.scala 179:20] - node _T_641 = cat(UInt<1>("h00"), isdccmst_r) @[Cat.scala 29:58] - node _T_642 = and(isdccmst_r, ldst_dual_r) @[el2_lsu_stbuf.scala 180:63] - node _T_643 = dshl(_T_641, _T_642) @[el2_lsu_stbuf.scala 180:48] - stbuf_specvld_r <= _T_643 @[el2_lsu_stbuf.scala 180:20] - node _T_644 = cat(UInt<2>("h00"), stbuf_specvld_m) @[Cat.scala 29:58] - node _T_645 = add(stbuf_numvld_any, _T_644) @[el2_lsu_stbuf.scala 181:45] - node _T_646 = tail(_T_645, 1) @[el2_lsu_stbuf.scala 181:45] - node _T_647 = cat(UInt<2>("h00"), stbuf_specvld_r) @[Cat.scala 29:58] - node _T_648 = add(_T_646, _T_647) @[el2_lsu_stbuf.scala 181:79] - node stbuf_specvld_any = tail(_T_648, 1) @[el2_lsu_stbuf.scala 181:79] - node _T_649 = eq(ldst_dual_d, UInt<1>("h00")) @[el2_lsu_stbuf.scala 183:35] - node _T_650 = and(_T_649, io.dec_lsu_valid_raw_d) @[el2_lsu_stbuf.scala 183:48] - node _T_651 = bits(_T_650, 0, 0) @[el2_lsu_stbuf.scala 183:74] - node _T_652 = geq(stbuf_specvld_any, UInt<3>("h04")) @[el2_lsu_stbuf.scala 183:99] - node _T_653 = geq(stbuf_specvld_any, UInt<2>("h03")) @[el2_lsu_stbuf.scala 183:138] - node _T_654 = mux(_T_651, _T_652, _T_653) @[el2_lsu_stbuf.scala 183:33] - io.lsu_stbuf_full_any <= _T_654 @[el2_lsu_stbuf.scala 183:27] - node _T_655 = eq(stbuf_numvld_any, UInt<1>("h00")) @[el2_lsu_stbuf.scala 184:47] - io.lsu_stbuf_empty_any <= _T_655 @[el2_lsu_stbuf.scala 184:27] - node cmpen_hi_m = and(io.lsu_cmpen_m, ldst_dual_m) @[el2_lsu_stbuf.scala 186:37] - node _T_656 = bits(io.end_addr_m, 15, 2) @[el2_lsu_stbuf.scala 187:33] - cmpaddr_hi_m <= _T_656 @[el2_lsu_stbuf.scala 187:17] - node _T_657 = bits(io.lsu_addr_m, 15, 2) @[el2_lsu_stbuf.scala 190:34] - cmpaddr_lo_m <= _T_657 @[el2_lsu_stbuf.scala 190:18] - node _T_658 = bits(stbuf_addr[0], 15, 2) @[el2_lsu_stbuf.scala 193:74] - node _T_659 = bits(cmpaddr_hi_m, 15, 2) @[el2_lsu_stbuf.scala 193:132] - node _T_660 = eq(_T_658, _T_659) @[el2_lsu_stbuf.scala 193:116] - node _T_661 = and(_T_660, stbuf_vld[0]) @[el2_lsu_stbuf.scala 193:175] - node _T_662 = eq(stbuf_dma_kill[0], UInt<1>("h00")) @[el2_lsu_stbuf.scala 193:192] - node _T_663 = and(_T_661, _T_662) @[el2_lsu_stbuf.scala 193:190] - node _T_664 = and(_T_663, io.addr_in_dccm_m) @[el2_lsu_stbuf.scala 193:211] - node _T_665 = bits(stbuf_addr[1], 15, 2) @[el2_lsu_stbuf.scala 193:74] - node _T_666 = bits(cmpaddr_hi_m, 15, 2) @[el2_lsu_stbuf.scala 193:132] - node _T_667 = eq(_T_665, _T_666) @[el2_lsu_stbuf.scala 193:116] - node _T_668 = and(_T_667, stbuf_vld[1]) @[el2_lsu_stbuf.scala 193:175] - node _T_669 = eq(stbuf_dma_kill[1], UInt<1>("h00")) @[el2_lsu_stbuf.scala 193:192] - node _T_670 = and(_T_668, _T_669) @[el2_lsu_stbuf.scala 193:190] - node _T_671 = and(_T_670, io.addr_in_dccm_m) @[el2_lsu_stbuf.scala 193:211] - node _T_672 = bits(stbuf_addr[2], 15, 2) @[el2_lsu_stbuf.scala 193:74] - node _T_673 = bits(cmpaddr_hi_m, 15, 2) @[el2_lsu_stbuf.scala 193:132] - node _T_674 = eq(_T_672, _T_673) @[el2_lsu_stbuf.scala 193:116] - node _T_675 = and(_T_674, stbuf_vld[2]) @[el2_lsu_stbuf.scala 193:175] - node _T_676 = eq(stbuf_dma_kill[2], UInt<1>("h00")) @[el2_lsu_stbuf.scala 193:192] - node _T_677 = and(_T_675, _T_676) @[el2_lsu_stbuf.scala 193:190] - node _T_678 = and(_T_677, io.addr_in_dccm_m) @[el2_lsu_stbuf.scala 193:211] - node _T_679 = bits(stbuf_addr[3], 15, 2) @[el2_lsu_stbuf.scala 193:74] - node _T_680 = bits(cmpaddr_hi_m, 15, 2) @[el2_lsu_stbuf.scala 193:132] - node _T_681 = eq(_T_679, _T_680) @[el2_lsu_stbuf.scala 193:116] - node _T_682 = and(_T_681, stbuf_vld[3]) @[el2_lsu_stbuf.scala 193:175] - node _T_683 = eq(stbuf_dma_kill[3], UInt<1>("h00")) @[el2_lsu_stbuf.scala 193:192] - node _T_684 = and(_T_682, _T_683) @[el2_lsu_stbuf.scala 193:190] - node _T_685 = and(_T_684, io.addr_in_dccm_m) @[el2_lsu_stbuf.scala 193:211] - node _T_686 = cat(_T_685, _T_678) @[Cat.scala 29:58] - node _T_687 = cat(_T_686, _T_671) @[Cat.scala 29:58] - node stbuf_match_hi = cat(_T_687, _T_664) @[Cat.scala 29:58] - node _T_688 = bits(stbuf_addr[0], 15, 2) @[el2_lsu_stbuf.scala 194:74] - node _T_689 = bits(cmpaddr_lo_m, 15, 2) @[el2_lsu_stbuf.scala 194:132] - node _T_690 = eq(_T_688, _T_689) @[el2_lsu_stbuf.scala 194:116] - node _T_691 = and(_T_690, stbuf_vld[0]) @[el2_lsu_stbuf.scala 194:175] - node _T_692 = eq(stbuf_dma_kill[0], UInt<1>("h00")) @[el2_lsu_stbuf.scala 194:192] - node _T_693 = and(_T_691, _T_692) @[el2_lsu_stbuf.scala 194:190] - node _T_694 = and(_T_693, io.addr_in_dccm_m) @[el2_lsu_stbuf.scala 194:211] - node _T_695 = bits(stbuf_addr[1], 15, 2) @[el2_lsu_stbuf.scala 194:74] - node _T_696 = bits(cmpaddr_lo_m, 15, 2) @[el2_lsu_stbuf.scala 194:132] - node _T_697 = eq(_T_695, _T_696) @[el2_lsu_stbuf.scala 194:116] - node _T_698 = and(_T_697, stbuf_vld[1]) @[el2_lsu_stbuf.scala 194:175] - node _T_699 = eq(stbuf_dma_kill[1], UInt<1>("h00")) @[el2_lsu_stbuf.scala 194:192] - node _T_700 = and(_T_698, _T_699) @[el2_lsu_stbuf.scala 194:190] - node _T_701 = and(_T_700, io.addr_in_dccm_m) @[el2_lsu_stbuf.scala 194:211] - node _T_702 = bits(stbuf_addr[2], 15, 2) @[el2_lsu_stbuf.scala 194:74] - node _T_703 = bits(cmpaddr_lo_m, 15, 2) @[el2_lsu_stbuf.scala 194:132] - node _T_704 = eq(_T_702, _T_703) @[el2_lsu_stbuf.scala 194:116] - node _T_705 = and(_T_704, stbuf_vld[2]) @[el2_lsu_stbuf.scala 194:175] - node _T_706 = eq(stbuf_dma_kill[2], UInt<1>("h00")) @[el2_lsu_stbuf.scala 194:192] - node _T_707 = and(_T_705, _T_706) @[el2_lsu_stbuf.scala 194:190] - node _T_708 = and(_T_707, io.addr_in_dccm_m) @[el2_lsu_stbuf.scala 194:211] - node _T_709 = bits(stbuf_addr[3], 15, 2) @[el2_lsu_stbuf.scala 194:74] - node _T_710 = bits(cmpaddr_lo_m, 15, 2) @[el2_lsu_stbuf.scala 194:132] - node _T_711 = eq(_T_709, _T_710) @[el2_lsu_stbuf.scala 194:116] - node _T_712 = and(_T_711, stbuf_vld[3]) @[el2_lsu_stbuf.scala 194:175] - node _T_713 = eq(stbuf_dma_kill[3], UInt<1>("h00")) @[el2_lsu_stbuf.scala 194:192] - node _T_714 = and(_T_712, _T_713) @[el2_lsu_stbuf.scala 194:190] - node _T_715 = and(_T_714, io.addr_in_dccm_m) @[el2_lsu_stbuf.scala 194:211] - node _T_716 = cat(_T_715, _T_708) @[Cat.scala 29:58] - node _T_717 = cat(_T_716, _T_701) @[Cat.scala 29:58] - node stbuf_match_lo = cat(_T_717, _T_694) @[Cat.scala 29:58] - node _T_718 = bits(stbuf_match_hi, 0, 0) @[el2_lsu_stbuf.scala 195:75] - node _T_719 = bits(stbuf_match_lo, 0, 0) @[el2_lsu_stbuf.scala 195:95] - node _T_720 = or(_T_718, _T_719) @[el2_lsu_stbuf.scala 195:79] - node _T_721 = and(_T_720, io.lsu_pkt_m.valid) @[el2_lsu_stbuf.scala 195:100] - node _T_722 = and(_T_721, io.lsu_pkt_m.dma) @[el2_lsu_stbuf.scala 195:121] - node _T_723 = and(_T_722, io.lsu_pkt_m.store) @[el2_lsu_stbuf.scala 195:140] - node _T_724 = bits(stbuf_match_hi, 1, 1) @[el2_lsu_stbuf.scala 195:75] - node _T_725 = bits(stbuf_match_lo, 1, 1) @[el2_lsu_stbuf.scala 195:95] - node _T_726 = or(_T_724, _T_725) @[el2_lsu_stbuf.scala 195:79] - node _T_727 = and(_T_726, io.lsu_pkt_m.valid) @[el2_lsu_stbuf.scala 195:100] - node _T_728 = and(_T_727, io.lsu_pkt_m.dma) @[el2_lsu_stbuf.scala 195:121] - node _T_729 = and(_T_728, io.lsu_pkt_m.store) @[el2_lsu_stbuf.scala 195:140] - node _T_730 = bits(stbuf_match_hi, 2, 2) @[el2_lsu_stbuf.scala 195:75] - node _T_731 = bits(stbuf_match_lo, 2, 2) @[el2_lsu_stbuf.scala 195:95] - node _T_732 = or(_T_730, _T_731) @[el2_lsu_stbuf.scala 195:79] - node _T_733 = and(_T_732, io.lsu_pkt_m.valid) @[el2_lsu_stbuf.scala 195:100] - node _T_734 = and(_T_733, io.lsu_pkt_m.dma) @[el2_lsu_stbuf.scala 195:121] - node _T_735 = and(_T_734, io.lsu_pkt_m.store) @[el2_lsu_stbuf.scala 195:140] - node _T_736 = bits(stbuf_match_hi, 3, 3) @[el2_lsu_stbuf.scala 195:75] - node _T_737 = bits(stbuf_match_lo, 3, 3) @[el2_lsu_stbuf.scala 195:95] - node _T_738 = or(_T_736, _T_737) @[el2_lsu_stbuf.scala 195:79] - node _T_739 = and(_T_738, io.lsu_pkt_m.valid) @[el2_lsu_stbuf.scala 195:100] - node _T_740 = and(_T_739, io.lsu_pkt_m.dma) @[el2_lsu_stbuf.scala 195:121] - node _T_741 = and(_T_740, io.lsu_pkt_m.store) @[el2_lsu_stbuf.scala 195:140] - node _T_742 = cat(_T_741, _T_735) @[Cat.scala 29:58] - node _T_743 = cat(_T_742, _T_729) @[Cat.scala 29:58] - node _T_744 = cat(_T_743, _T_723) @[Cat.scala 29:58] - stbuf_dma_kill_en <= _T_744 @[el2_lsu_stbuf.scala 195:22] - node _T_745 = bits(stbuf_match_hi, 0, 0) @[el2_lsu_stbuf.scala 198:113] - node _T_746 = bits(stbuf_byteen[0], 0, 0) @[el2_lsu_stbuf.scala 198:134] - node _T_747 = and(_T_745, _T_746) @[el2_lsu_stbuf.scala 198:117] - node _T_748 = and(_T_747, stbuf_vld[0]) @[el2_lsu_stbuf.scala 198:138] - node _T_749 = bits(stbuf_match_hi, 0, 0) @[el2_lsu_stbuf.scala 198:113] - node _T_750 = bits(stbuf_byteen[0], 1, 1) @[el2_lsu_stbuf.scala 198:134] - node _T_751 = and(_T_749, _T_750) @[el2_lsu_stbuf.scala 198:117] - node _T_752 = and(_T_751, stbuf_vld[0]) @[el2_lsu_stbuf.scala 198:138] - node _T_753 = bits(stbuf_match_hi, 0, 0) @[el2_lsu_stbuf.scala 198:113] - node _T_754 = bits(stbuf_byteen[0], 2, 2) @[el2_lsu_stbuf.scala 198:134] - node _T_755 = and(_T_753, _T_754) @[el2_lsu_stbuf.scala 198:117] - node _T_756 = and(_T_755, stbuf_vld[0]) @[el2_lsu_stbuf.scala 198:138] - node _T_757 = bits(stbuf_match_hi, 0, 0) @[el2_lsu_stbuf.scala 198:113] - node _T_758 = bits(stbuf_byteen[0], 3, 3) @[el2_lsu_stbuf.scala 198:134] - node _T_759 = and(_T_757, _T_758) @[el2_lsu_stbuf.scala 198:117] - node _T_760 = and(_T_759, stbuf_vld[0]) @[el2_lsu_stbuf.scala 198:138] - node _T_761 = cat(_T_760, _T_756) @[Cat.scala 29:58] - node _T_762 = cat(_T_761, _T_752) @[Cat.scala 29:58] - node stbuf_fwdbyteenvec_hi_0 = cat(_T_762, _T_748) @[Cat.scala 29:58] - node _T_763 = bits(stbuf_match_hi, 1, 1) @[el2_lsu_stbuf.scala 198:113] - node _T_764 = bits(stbuf_byteen[1], 0, 0) @[el2_lsu_stbuf.scala 198:134] - node _T_765 = and(_T_763, _T_764) @[el2_lsu_stbuf.scala 198:117] - node _T_766 = and(_T_765, stbuf_vld[1]) @[el2_lsu_stbuf.scala 198:138] - node _T_767 = bits(stbuf_match_hi, 1, 1) @[el2_lsu_stbuf.scala 198:113] - node _T_768 = bits(stbuf_byteen[1], 1, 1) @[el2_lsu_stbuf.scala 198:134] - node _T_769 = and(_T_767, _T_768) @[el2_lsu_stbuf.scala 198:117] - node _T_770 = and(_T_769, stbuf_vld[1]) @[el2_lsu_stbuf.scala 198:138] - node _T_771 = bits(stbuf_match_hi, 1, 1) @[el2_lsu_stbuf.scala 198:113] - node _T_772 = bits(stbuf_byteen[1], 2, 2) @[el2_lsu_stbuf.scala 198:134] - node _T_773 = and(_T_771, _T_772) @[el2_lsu_stbuf.scala 198:117] - node _T_774 = and(_T_773, stbuf_vld[1]) @[el2_lsu_stbuf.scala 198:138] - node _T_775 = bits(stbuf_match_hi, 1, 1) @[el2_lsu_stbuf.scala 198:113] - node _T_776 = bits(stbuf_byteen[1], 3, 3) @[el2_lsu_stbuf.scala 198:134] - node _T_777 = and(_T_775, _T_776) @[el2_lsu_stbuf.scala 198:117] - node _T_778 = and(_T_777, stbuf_vld[1]) @[el2_lsu_stbuf.scala 198:138] - node _T_779 = cat(_T_778, _T_774) @[Cat.scala 29:58] - node _T_780 = cat(_T_779, _T_770) @[Cat.scala 29:58] - node stbuf_fwdbyteenvec_hi_1 = cat(_T_780, _T_766) @[Cat.scala 29:58] - node _T_781 = bits(stbuf_match_hi, 2, 2) @[el2_lsu_stbuf.scala 198:113] - node _T_782 = bits(stbuf_byteen[2], 0, 0) @[el2_lsu_stbuf.scala 198:134] - node _T_783 = and(_T_781, _T_782) @[el2_lsu_stbuf.scala 198:117] - node _T_784 = and(_T_783, stbuf_vld[2]) @[el2_lsu_stbuf.scala 198:138] - node _T_785 = bits(stbuf_match_hi, 2, 2) @[el2_lsu_stbuf.scala 198:113] - node _T_786 = bits(stbuf_byteen[2], 1, 1) @[el2_lsu_stbuf.scala 198:134] - node _T_787 = and(_T_785, _T_786) @[el2_lsu_stbuf.scala 198:117] - node _T_788 = and(_T_787, stbuf_vld[2]) @[el2_lsu_stbuf.scala 198:138] - node _T_789 = bits(stbuf_match_hi, 2, 2) @[el2_lsu_stbuf.scala 198:113] - node _T_790 = bits(stbuf_byteen[2], 2, 2) @[el2_lsu_stbuf.scala 198:134] - node _T_791 = and(_T_789, _T_790) @[el2_lsu_stbuf.scala 198:117] - node _T_792 = and(_T_791, stbuf_vld[2]) @[el2_lsu_stbuf.scala 198:138] - node _T_793 = bits(stbuf_match_hi, 2, 2) @[el2_lsu_stbuf.scala 198:113] - node _T_794 = bits(stbuf_byteen[2], 3, 3) @[el2_lsu_stbuf.scala 198:134] - node _T_795 = and(_T_793, _T_794) @[el2_lsu_stbuf.scala 198:117] - node _T_796 = and(_T_795, stbuf_vld[2]) @[el2_lsu_stbuf.scala 198:138] - node _T_797 = cat(_T_796, _T_792) @[Cat.scala 29:58] - node _T_798 = cat(_T_797, _T_788) @[Cat.scala 29:58] - node stbuf_fwdbyteenvec_hi_2 = cat(_T_798, _T_784) @[Cat.scala 29:58] - node _T_799 = bits(stbuf_match_hi, 3, 3) @[el2_lsu_stbuf.scala 198:113] - node _T_800 = bits(stbuf_byteen[3], 0, 0) @[el2_lsu_stbuf.scala 198:134] - node _T_801 = and(_T_799, _T_800) @[el2_lsu_stbuf.scala 198:117] - node _T_802 = and(_T_801, stbuf_vld[3]) @[el2_lsu_stbuf.scala 198:138] - node _T_803 = bits(stbuf_match_hi, 3, 3) @[el2_lsu_stbuf.scala 198:113] - node _T_804 = bits(stbuf_byteen[3], 1, 1) @[el2_lsu_stbuf.scala 198:134] - node _T_805 = and(_T_803, _T_804) @[el2_lsu_stbuf.scala 198:117] - node _T_806 = and(_T_805, stbuf_vld[3]) @[el2_lsu_stbuf.scala 198:138] - node _T_807 = bits(stbuf_match_hi, 3, 3) @[el2_lsu_stbuf.scala 198:113] - node _T_808 = bits(stbuf_byteen[3], 2, 2) @[el2_lsu_stbuf.scala 198:134] - node _T_809 = and(_T_807, _T_808) @[el2_lsu_stbuf.scala 198:117] - node _T_810 = and(_T_809, stbuf_vld[3]) @[el2_lsu_stbuf.scala 198:138] - node _T_811 = bits(stbuf_match_hi, 3, 3) @[el2_lsu_stbuf.scala 198:113] - node _T_812 = bits(stbuf_byteen[3], 3, 3) @[el2_lsu_stbuf.scala 198:134] - node _T_813 = and(_T_811, _T_812) @[el2_lsu_stbuf.scala 198:117] - node _T_814 = and(_T_813, stbuf_vld[3]) @[el2_lsu_stbuf.scala 198:138] - node _T_815 = cat(_T_814, _T_810) @[Cat.scala 29:58] - node _T_816 = cat(_T_815, _T_806) @[Cat.scala 29:58] - node stbuf_fwdbyteenvec_hi_3 = cat(_T_816, _T_802) @[Cat.scala 29:58] - node _T_817 = bits(stbuf_match_lo, 0, 0) @[el2_lsu_stbuf.scala 199:113] - node _T_818 = bits(stbuf_byteen[0], 0, 0) @[el2_lsu_stbuf.scala 199:134] - node _T_819 = and(_T_817, _T_818) @[el2_lsu_stbuf.scala 199:117] - node _T_820 = and(_T_819, stbuf_vld[0]) @[el2_lsu_stbuf.scala 199:138] - node _T_821 = bits(stbuf_match_lo, 0, 0) @[el2_lsu_stbuf.scala 199:113] - node _T_822 = bits(stbuf_byteen[0], 1, 1) @[el2_lsu_stbuf.scala 199:134] - node _T_823 = and(_T_821, _T_822) @[el2_lsu_stbuf.scala 199:117] - node _T_824 = and(_T_823, stbuf_vld[0]) @[el2_lsu_stbuf.scala 199:138] - node _T_825 = bits(stbuf_match_lo, 0, 0) @[el2_lsu_stbuf.scala 199:113] - node _T_826 = bits(stbuf_byteen[0], 2, 2) @[el2_lsu_stbuf.scala 199:134] - node _T_827 = and(_T_825, _T_826) @[el2_lsu_stbuf.scala 199:117] - node _T_828 = and(_T_827, stbuf_vld[0]) @[el2_lsu_stbuf.scala 199:138] - node _T_829 = bits(stbuf_match_lo, 0, 0) @[el2_lsu_stbuf.scala 199:113] - node _T_830 = bits(stbuf_byteen[0], 3, 3) @[el2_lsu_stbuf.scala 199:134] - node _T_831 = and(_T_829, _T_830) @[el2_lsu_stbuf.scala 199:117] - node _T_832 = and(_T_831, stbuf_vld[0]) @[el2_lsu_stbuf.scala 199:138] - node _T_833 = cat(_T_832, _T_828) @[Cat.scala 29:58] + RdPtr <= _T_719 @[el2_lsu_stbuf.scala 192:41] + node _T_720 = bits(stbuf_vld, 0, 0) @[el2_lsu_stbuf.scala 194:87] + node _T_721 = cat(UInt<3>("h00"), _T_720) @[Cat.scala 29:58] + node _T_722 = bits(stbuf_vld, 1, 1) @[el2_lsu_stbuf.scala 194:87] + node _T_723 = cat(UInt<3>("h00"), _T_722) @[Cat.scala 29:58] + node _T_724 = bits(stbuf_vld, 2, 2) @[el2_lsu_stbuf.scala 194:87] + node _T_725 = cat(UInt<3>("h00"), _T_724) @[Cat.scala 29:58] + node _T_726 = bits(stbuf_vld, 3, 3) @[el2_lsu_stbuf.scala 194:87] + node _T_727 = cat(UInt<3>("h00"), _T_726) @[Cat.scala 29:58] + wire _T_728 : UInt<4>[4] @[el2_lsu_stbuf.scala 194:60] + _T_728[0] <= _T_721 @[el2_lsu_stbuf.scala 194:60] + _T_728[1] <= _T_723 @[el2_lsu_stbuf.scala 194:60] + _T_728[2] <= _T_725 @[el2_lsu_stbuf.scala 194:60] + _T_728[3] <= _T_727 @[el2_lsu_stbuf.scala 194:60] + node _T_729 = add(_T_728[0], _T_728[1]) @[el2_lsu_stbuf.scala 194:102] + node _T_730 = tail(_T_729, 1) @[el2_lsu_stbuf.scala 194:102] + node _T_731 = add(_T_730, _T_728[2]) @[el2_lsu_stbuf.scala 194:102] + node _T_732 = tail(_T_731, 1) @[el2_lsu_stbuf.scala 194:102] + node _T_733 = add(_T_732, _T_728[3]) @[el2_lsu_stbuf.scala 194:102] + node stbuf_numvld_any = tail(_T_733, 1) @[el2_lsu_stbuf.scala 194:102] + node _T_734 = and(io.lsu_pkt_m.valid, io.lsu_pkt_m.store) @[el2_lsu_stbuf.scala 195:40] + node _T_735 = and(_T_734, io.addr_in_dccm_m) @[el2_lsu_stbuf.scala 195:61] + node _T_736 = eq(io.lsu_pkt_m.dma, UInt<1>("h00")) @[el2_lsu_stbuf.scala 195:83] + node isdccmst_m = and(_T_735, _T_736) @[el2_lsu_stbuf.scala 195:81] + node _T_737 = and(io.lsu_pkt_r.valid, io.lsu_pkt_r.store) @[el2_lsu_stbuf.scala 196:40] + node _T_738 = and(_T_737, io.addr_in_dccm_r) @[el2_lsu_stbuf.scala 196:61] + node _T_739 = eq(io.lsu_pkt_r.dma, UInt<1>("h00")) @[el2_lsu_stbuf.scala 196:83] + node isdccmst_r = and(_T_738, _T_739) @[el2_lsu_stbuf.scala 196:81] + node _T_740 = cat(UInt<1>("h00"), isdccmst_m) @[Cat.scala 29:58] + node _T_741 = and(isdccmst_m, ldst_dual_m) @[el2_lsu_stbuf.scala 198:63] + node _T_742 = dshl(_T_740, _T_741) @[el2_lsu_stbuf.scala 198:48] + stbuf_specvld_m <= _T_742 @[el2_lsu_stbuf.scala 198:20] + node _T_743 = cat(UInt<1>("h00"), isdccmst_r) @[Cat.scala 29:58] + node _T_744 = and(isdccmst_r, ldst_dual_r) @[el2_lsu_stbuf.scala 199:63] + node _T_745 = dshl(_T_743, _T_744) @[el2_lsu_stbuf.scala 199:48] + stbuf_specvld_r <= _T_745 @[el2_lsu_stbuf.scala 199:20] + node _T_746 = cat(UInt<2>("h00"), stbuf_specvld_m) @[Cat.scala 29:58] + node _T_747 = add(stbuf_numvld_any, _T_746) @[el2_lsu_stbuf.scala 200:45] + node _T_748 = tail(_T_747, 1) @[el2_lsu_stbuf.scala 200:45] + node _T_749 = cat(UInt<2>("h00"), stbuf_specvld_r) @[Cat.scala 29:58] + node _T_750 = add(_T_748, _T_749) @[el2_lsu_stbuf.scala 200:79] + node stbuf_specvld_any = tail(_T_750, 1) @[el2_lsu_stbuf.scala 200:79] + node _T_751 = eq(ldst_dual_d, UInt<1>("h00")) @[el2_lsu_stbuf.scala 202:35] + node _T_752 = and(_T_751, io.dec_lsu_valid_raw_d) @[el2_lsu_stbuf.scala 202:48] + node _T_753 = bits(_T_752, 0, 0) @[el2_lsu_stbuf.scala 202:74] + node _T_754 = geq(stbuf_specvld_any, UInt<3>("h04")) @[el2_lsu_stbuf.scala 202:100] + node _T_755 = geq(stbuf_specvld_any, UInt<2>("h03")) @[el2_lsu_stbuf.scala 202:141] + node _T_756 = mux(_T_753, _T_754, _T_755) @[el2_lsu_stbuf.scala 202:33] + io.lsu_stbuf_full_any <= _T_756 @[el2_lsu_stbuf.scala 202:27] + node _T_757 = eq(stbuf_numvld_any, UInt<1>("h00")) @[el2_lsu_stbuf.scala 203:47] + io.lsu_stbuf_empty_any <= _T_757 @[el2_lsu_stbuf.scala 203:27] + node cmpen_hi_m = and(io.lsu_cmpen_m, ldst_dual_m) @[el2_lsu_stbuf.scala 205:37] + node _T_758 = bits(io.end_addr_m, 15, 2) @[el2_lsu_stbuf.scala 206:33] + cmpaddr_hi_m <= _T_758 @[el2_lsu_stbuf.scala 206:17] + node _T_759 = bits(io.lsu_addr_m, 15, 2) @[el2_lsu_stbuf.scala 209:34] + cmpaddr_lo_m <= _T_759 @[el2_lsu_stbuf.scala 209:18] + node _T_760 = bits(stbuf_addr[0], 15, 2) @[el2_lsu_stbuf.scala 212:74] + node _T_761 = bits(cmpaddr_hi_m, 13, 0) @[el2_lsu_stbuf.scala 212:132] + node _T_762 = eq(_T_760, _T_761) @[el2_lsu_stbuf.scala 212:116] + node _T_763 = bits(stbuf_vld, 0, 0) @[el2_lsu_stbuf.scala 212:151] + node _T_764 = and(_T_762, _T_763) @[el2_lsu_stbuf.scala 212:140] + node _T_765 = bits(stbuf_dma_kill, 0, 0) @[el2_lsu_stbuf.scala 212:172] + node _T_766 = eq(_T_765, UInt<1>("h00")) @[el2_lsu_stbuf.scala 212:157] + node _T_767 = and(_T_764, _T_766) @[el2_lsu_stbuf.scala 212:155] + node _T_768 = and(_T_767, io.addr_in_dccm_m) @[el2_lsu_stbuf.scala 212:176] + node _T_769 = bits(stbuf_addr[1], 15, 2) @[el2_lsu_stbuf.scala 212:74] + node _T_770 = bits(cmpaddr_hi_m, 13, 0) @[el2_lsu_stbuf.scala 212:132] + node _T_771 = eq(_T_769, _T_770) @[el2_lsu_stbuf.scala 212:116] + node _T_772 = bits(stbuf_vld, 1, 1) @[el2_lsu_stbuf.scala 212:151] + node _T_773 = and(_T_771, _T_772) @[el2_lsu_stbuf.scala 212:140] + node _T_774 = bits(stbuf_dma_kill, 1, 1) @[el2_lsu_stbuf.scala 212:172] + node _T_775 = eq(_T_774, UInt<1>("h00")) @[el2_lsu_stbuf.scala 212:157] + node _T_776 = and(_T_773, _T_775) @[el2_lsu_stbuf.scala 212:155] + node _T_777 = and(_T_776, io.addr_in_dccm_m) @[el2_lsu_stbuf.scala 212:176] + node _T_778 = bits(stbuf_addr[2], 15, 2) @[el2_lsu_stbuf.scala 212:74] + node _T_779 = bits(cmpaddr_hi_m, 13, 0) @[el2_lsu_stbuf.scala 212:132] + node _T_780 = eq(_T_778, _T_779) @[el2_lsu_stbuf.scala 212:116] + node _T_781 = bits(stbuf_vld, 2, 2) @[el2_lsu_stbuf.scala 212:151] + node _T_782 = and(_T_780, _T_781) @[el2_lsu_stbuf.scala 212:140] + node _T_783 = bits(stbuf_dma_kill, 2, 2) @[el2_lsu_stbuf.scala 212:172] + node _T_784 = eq(_T_783, UInt<1>("h00")) @[el2_lsu_stbuf.scala 212:157] + node _T_785 = and(_T_782, _T_784) @[el2_lsu_stbuf.scala 212:155] + node _T_786 = and(_T_785, io.addr_in_dccm_m) @[el2_lsu_stbuf.scala 212:176] + node _T_787 = bits(stbuf_addr[3], 15, 2) @[el2_lsu_stbuf.scala 212:74] + node _T_788 = bits(cmpaddr_hi_m, 13, 0) @[el2_lsu_stbuf.scala 212:132] + node _T_789 = eq(_T_787, _T_788) @[el2_lsu_stbuf.scala 212:116] + node _T_790 = bits(stbuf_vld, 3, 3) @[el2_lsu_stbuf.scala 212:151] + node _T_791 = and(_T_789, _T_790) @[el2_lsu_stbuf.scala 212:140] + node _T_792 = bits(stbuf_dma_kill, 3, 3) @[el2_lsu_stbuf.scala 212:172] + node _T_793 = eq(_T_792, UInt<1>("h00")) @[el2_lsu_stbuf.scala 212:157] + node _T_794 = and(_T_791, _T_793) @[el2_lsu_stbuf.scala 212:155] + node _T_795 = and(_T_794, io.addr_in_dccm_m) @[el2_lsu_stbuf.scala 212:176] + node _T_796 = cat(_T_795, _T_786) @[Cat.scala 29:58] + node _T_797 = cat(_T_796, _T_777) @[Cat.scala 29:58] + node stbuf_match_hi = cat(_T_797, _T_768) @[Cat.scala 29:58] + node _T_798 = bits(stbuf_addr[0], 15, 2) @[el2_lsu_stbuf.scala 213:74] + node _T_799 = bits(cmpaddr_lo_m, 13, 0) @[el2_lsu_stbuf.scala 213:132] + node _T_800 = eq(_T_798, _T_799) @[el2_lsu_stbuf.scala 213:116] + node _T_801 = bits(stbuf_vld, 0, 0) @[el2_lsu_stbuf.scala 213:151] + node _T_802 = and(_T_800, _T_801) @[el2_lsu_stbuf.scala 213:140] + node _T_803 = bits(stbuf_dma_kill, 0, 0) @[el2_lsu_stbuf.scala 213:172] + node _T_804 = eq(_T_803, UInt<1>("h00")) @[el2_lsu_stbuf.scala 213:157] + node _T_805 = and(_T_802, _T_804) @[el2_lsu_stbuf.scala 213:155] + node _T_806 = and(_T_805, io.addr_in_dccm_m) @[el2_lsu_stbuf.scala 213:176] + node _T_807 = bits(stbuf_addr[1], 15, 2) @[el2_lsu_stbuf.scala 213:74] + node _T_808 = bits(cmpaddr_lo_m, 13, 0) @[el2_lsu_stbuf.scala 213:132] + node _T_809 = eq(_T_807, _T_808) @[el2_lsu_stbuf.scala 213:116] + node _T_810 = bits(stbuf_vld, 1, 1) @[el2_lsu_stbuf.scala 213:151] + node _T_811 = and(_T_809, _T_810) @[el2_lsu_stbuf.scala 213:140] + node _T_812 = bits(stbuf_dma_kill, 1, 1) @[el2_lsu_stbuf.scala 213:172] + node _T_813 = eq(_T_812, UInt<1>("h00")) @[el2_lsu_stbuf.scala 213:157] + node _T_814 = and(_T_811, _T_813) @[el2_lsu_stbuf.scala 213:155] + node _T_815 = and(_T_814, io.addr_in_dccm_m) @[el2_lsu_stbuf.scala 213:176] + node _T_816 = bits(stbuf_addr[2], 15, 2) @[el2_lsu_stbuf.scala 213:74] + node _T_817 = bits(cmpaddr_lo_m, 13, 0) @[el2_lsu_stbuf.scala 213:132] + node _T_818 = eq(_T_816, _T_817) @[el2_lsu_stbuf.scala 213:116] + node _T_819 = bits(stbuf_vld, 2, 2) @[el2_lsu_stbuf.scala 213:151] + node _T_820 = and(_T_818, _T_819) @[el2_lsu_stbuf.scala 213:140] + node _T_821 = bits(stbuf_dma_kill, 2, 2) @[el2_lsu_stbuf.scala 213:172] + node _T_822 = eq(_T_821, UInt<1>("h00")) @[el2_lsu_stbuf.scala 213:157] + node _T_823 = and(_T_820, _T_822) @[el2_lsu_stbuf.scala 213:155] + node _T_824 = and(_T_823, io.addr_in_dccm_m) @[el2_lsu_stbuf.scala 213:176] + node _T_825 = bits(stbuf_addr[3], 15, 2) @[el2_lsu_stbuf.scala 213:74] + node _T_826 = bits(cmpaddr_lo_m, 13, 0) @[el2_lsu_stbuf.scala 213:132] + node _T_827 = eq(_T_825, _T_826) @[el2_lsu_stbuf.scala 213:116] + node _T_828 = bits(stbuf_vld, 3, 3) @[el2_lsu_stbuf.scala 213:151] + node _T_829 = and(_T_827, _T_828) @[el2_lsu_stbuf.scala 213:140] + node _T_830 = bits(stbuf_dma_kill, 3, 3) @[el2_lsu_stbuf.scala 213:172] + node _T_831 = eq(_T_830, UInt<1>("h00")) @[el2_lsu_stbuf.scala 213:157] + node _T_832 = and(_T_829, _T_831) @[el2_lsu_stbuf.scala 213:155] + node _T_833 = and(_T_832, io.addr_in_dccm_m) @[el2_lsu_stbuf.scala 213:176] node _T_834 = cat(_T_833, _T_824) @[Cat.scala 29:58] - node stbuf_fwdbyteenvec_lo_0 = cat(_T_834, _T_820) @[Cat.scala 29:58] - node _T_835 = bits(stbuf_match_lo, 1, 1) @[el2_lsu_stbuf.scala 199:113] - node _T_836 = bits(stbuf_byteen[1], 0, 0) @[el2_lsu_stbuf.scala 199:134] - node _T_837 = and(_T_835, _T_836) @[el2_lsu_stbuf.scala 199:117] - node _T_838 = and(_T_837, stbuf_vld[1]) @[el2_lsu_stbuf.scala 199:138] - node _T_839 = bits(stbuf_match_lo, 1, 1) @[el2_lsu_stbuf.scala 199:113] - node _T_840 = bits(stbuf_byteen[1], 1, 1) @[el2_lsu_stbuf.scala 199:134] - node _T_841 = and(_T_839, _T_840) @[el2_lsu_stbuf.scala 199:117] - node _T_842 = and(_T_841, stbuf_vld[1]) @[el2_lsu_stbuf.scala 199:138] - node _T_843 = bits(stbuf_match_lo, 1, 1) @[el2_lsu_stbuf.scala 199:113] - node _T_844 = bits(stbuf_byteen[1], 2, 2) @[el2_lsu_stbuf.scala 199:134] - node _T_845 = and(_T_843, _T_844) @[el2_lsu_stbuf.scala 199:117] - node _T_846 = and(_T_845, stbuf_vld[1]) @[el2_lsu_stbuf.scala 199:138] - node _T_847 = bits(stbuf_match_lo, 1, 1) @[el2_lsu_stbuf.scala 199:113] - node _T_848 = bits(stbuf_byteen[1], 3, 3) @[el2_lsu_stbuf.scala 199:134] - node _T_849 = and(_T_847, _T_848) @[el2_lsu_stbuf.scala 199:117] - node _T_850 = and(_T_849, stbuf_vld[1]) @[el2_lsu_stbuf.scala 199:138] - node _T_851 = cat(_T_850, _T_846) @[Cat.scala 29:58] - node _T_852 = cat(_T_851, _T_842) @[Cat.scala 29:58] - node stbuf_fwdbyteenvec_lo_1 = cat(_T_852, _T_838) @[Cat.scala 29:58] - node _T_853 = bits(stbuf_match_lo, 2, 2) @[el2_lsu_stbuf.scala 199:113] - node _T_854 = bits(stbuf_byteen[2], 0, 0) @[el2_lsu_stbuf.scala 199:134] - node _T_855 = and(_T_853, _T_854) @[el2_lsu_stbuf.scala 199:117] - node _T_856 = and(_T_855, stbuf_vld[2]) @[el2_lsu_stbuf.scala 199:138] - node _T_857 = bits(stbuf_match_lo, 2, 2) @[el2_lsu_stbuf.scala 199:113] - node _T_858 = bits(stbuf_byteen[2], 1, 1) @[el2_lsu_stbuf.scala 199:134] - node _T_859 = and(_T_857, _T_858) @[el2_lsu_stbuf.scala 199:117] - node _T_860 = and(_T_859, stbuf_vld[2]) @[el2_lsu_stbuf.scala 199:138] - node _T_861 = bits(stbuf_match_lo, 2, 2) @[el2_lsu_stbuf.scala 199:113] - node _T_862 = bits(stbuf_byteen[2], 2, 2) @[el2_lsu_stbuf.scala 199:134] - node _T_863 = and(_T_861, _T_862) @[el2_lsu_stbuf.scala 199:117] - node _T_864 = and(_T_863, stbuf_vld[2]) @[el2_lsu_stbuf.scala 199:138] - node _T_865 = bits(stbuf_match_lo, 2, 2) @[el2_lsu_stbuf.scala 199:113] - node _T_866 = bits(stbuf_byteen[2], 3, 3) @[el2_lsu_stbuf.scala 199:134] - node _T_867 = and(_T_865, _T_866) @[el2_lsu_stbuf.scala 199:117] - node _T_868 = and(_T_867, stbuf_vld[2]) @[el2_lsu_stbuf.scala 199:138] - node _T_869 = cat(_T_868, _T_864) @[Cat.scala 29:58] - node _T_870 = cat(_T_869, _T_860) @[Cat.scala 29:58] - node stbuf_fwdbyteenvec_lo_2 = cat(_T_870, _T_856) @[Cat.scala 29:58] - node _T_871 = bits(stbuf_match_lo, 3, 3) @[el2_lsu_stbuf.scala 199:113] - node _T_872 = bits(stbuf_byteen[3], 0, 0) @[el2_lsu_stbuf.scala 199:134] - node _T_873 = and(_T_871, _T_872) @[el2_lsu_stbuf.scala 199:117] - node _T_874 = and(_T_873, stbuf_vld[3]) @[el2_lsu_stbuf.scala 199:138] - node _T_875 = bits(stbuf_match_lo, 3, 3) @[el2_lsu_stbuf.scala 199:113] - node _T_876 = bits(stbuf_byteen[3], 1, 1) @[el2_lsu_stbuf.scala 199:134] - node _T_877 = and(_T_875, _T_876) @[el2_lsu_stbuf.scala 199:117] - node _T_878 = and(_T_877, stbuf_vld[3]) @[el2_lsu_stbuf.scala 199:138] - node _T_879 = bits(stbuf_match_lo, 3, 3) @[el2_lsu_stbuf.scala 199:113] - node _T_880 = bits(stbuf_byteen[3], 2, 2) @[el2_lsu_stbuf.scala 199:134] - node _T_881 = and(_T_879, _T_880) @[el2_lsu_stbuf.scala 199:117] - node _T_882 = and(_T_881, stbuf_vld[3]) @[el2_lsu_stbuf.scala 199:138] - node _T_883 = bits(stbuf_match_lo, 3, 3) @[el2_lsu_stbuf.scala 199:113] - node _T_884 = bits(stbuf_byteen[3], 3, 3) @[el2_lsu_stbuf.scala 199:134] - node _T_885 = and(_T_883, _T_884) @[el2_lsu_stbuf.scala 199:117] - node _T_886 = and(_T_885, stbuf_vld[3]) @[el2_lsu_stbuf.scala 199:138] - node _T_887 = cat(_T_886, _T_882) @[Cat.scala 29:58] - node _T_888 = cat(_T_887, _T_878) @[Cat.scala 29:58] - node stbuf_fwdbyteenvec_lo_3 = cat(_T_888, _T_874) @[Cat.scala 29:58] - node _T_889 = bits(stbuf_fwdbyteenvec_hi_0, 0, 0) @[el2_lsu_stbuf.scala 200:126] - node _T_890 = bits(stbuf_fwdbyteenvec_hi_0, 1, 1) @[el2_lsu_stbuf.scala 200:126] - node _T_891 = bits(stbuf_fwdbyteenvec_hi_0, 2, 2) @[el2_lsu_stbuf.scala 200:126] - node _T_892 = bits(stbuf_fwdbyteenvec_hi_0, 3, 3) @[el2_lsu_stbuf.scala 200:126] - node _T_893 = or(_T_892, _T_891) @[el2_lsu_stbuf.scala 200:156] - node _T_894 = or(_T_893, _T_890) @[el2_lsu_stbuf.scala 200:156] - node stbuf_fwdbyteen_hi_pre_m_0 = or(_T_894, _T_889) @[el2_lsu_stbuf.scala 200:156] - node _T_895 = bits(stbuf_fwdbyteenvec_hi_1, 0, 0) @[el2_lsu_stbuf.scala 200:126] - node _T_896 = bits(stbuf_fwdbyteenvec_hi_1, 1, 1) @[el2_lsu_stbuf.scala 200:126] - node _T_897 = bits(stbuf_fwdbyteenvec_hi_1, 2, 2) @[el2_lsu_stbuf.scala 200:126] - node _T_898 = bits(stbuf_fwdbyteenvec_hi_1, 3, 3) @[el2_lsu_stbuf.scala 200:126] - node _T_899 = or(_T_898, _T_897) @[el2_lsu_stbuf.scala 200:156] - node _T_900 = or(_T_899, _T_896) @[el2_lsu_stbuf.scala 200:156] - node stbuf_fwdbyteen_hi_pre_m_1 = or(_T_900, _T_895) @[el2_lsu_stbuf.scala 200:156] - node _T_901 = bits(stbuf_fwdbyteenvec_hi_2, 0, 0) @[el2_lsu_stbuf.scala 200:126] - node _T_902 = bits(stbuf_fwdbyteenvec_hi_2, 1, 1) @[el2_lsu_stbuf.scala 200:126] - node _T_903 = bits(stbuf_fwdbyteenvec_hi_2, 2, 2) @[el2_lsu_stbuf.scala 200:126] - node _T_904 = bits(stbuf_fwdbyteenvec_hi_2, 3, 3) @[el2_lsu_stbuf.scala 200:126] - node _T_905 = or(_T_904, _T_903) @[el2_lsu_stbuf.scala 200:156] - node _T_906 = or(_T_905, _T_902) @[el2_lsu_stbuf.scala 200:156] - node stbuf_fwdbyteen_hi_pre_m_2 = or(_T_906, _T_901) @[el2_lsu_stbuf.scala 200:156] - node _T_907 = bits(stbuf_fwdbyteenvec_hi_3, 0, 0) @[el2_lsu_stbuf.scala 200:126] - node _T_908 = bits(stbuf_fwdbyteenvec_hi_3, 1, 1) @[el2_lsu_stbuf.scala 200:126] - node _T_909 = bits(stbuf_fwdbyteenvec_hi_3, 2, 2) @[el2_lsu_stbuf.scala 200:126] - node _T_910 = bits(stbuf_fwdbyteenvec_hi_3, 3, 3) @[el2_lsu_stbuf.scala 200:126] - node _T_911 = or(_T_910, _T_909) @[el2_lsu_stbuf.scala 200:156] - node _T_912 = or(_T_911, _T_908) @[el2_lsu_stbuf.scala 200:156] - node stbuf_fwdbyteen_hi_pre_m_3 = or(_T_912, _T_907) @[el2_lsu_stbuf.scala 200:156] - node _T_913 = bits(stbuf_fwdbyteenvec_lo_0, 0, 0) @[el2_lsu_stbuf.scala 201:126] - node _T_914 = bits(stbuf_fwdbyteenvec_lo_0, 1, 1) @[el2_lsu_stbuf.scala 201:126] - node _T_915 = bits(stbuf_fwdbyteenvec_lo_0, 2, 2) @[el2_lsu_stbuf.scala 201:126] - node _T_916 = bits(stbuf_fwdbyteenvec_lo_0, 3, 3) @[el2_lsu_stbuf.scala 201:126] - node _T_917 = or(_T_916, _T_915) @[el2_lsu_stbuf.scala 201:156] - node _T_918 = or(_T_917, _T_914) @[el2_lsu_stbuf.scala 201:156] - node stbuf_fwdbyteen_lo_pre_m_0 = or(_T_918, _T_913) @[el2_lsu_stbuf.scala 201:156] - node _T_919 = bits(stbuf_fwdbyteenvec_lo_1, 0, 0) @[el2_lsu_stbuf.scala 201:126] - node _T_920 = bits(stbuf_fwdbyteenvec_lo_1, 1, 1) @[el2_lsu_stbuf.scala 201:126] - node _T_921 = bits(stbuf_fwdbyteenvec_lo_1, 2, 2) @[el2_lsu_stbuf.scala 201:126] - node _T_922 = bits(stbuf_fwdbyteenvec_lo_1, 3, 3) @[el2_lsu_stbuf.scala 201:126] - node _T_923 = or(_T_922, _T_921) @[el2_lsu_stbuf.scala 201:156] - node _T_924 = or(_T_923, _T_920) @[el2_lsu_stbuf.scala 201:156] - node stbuf_fwdbyteen_lo_pre_m_1 = or(_T_924, _T_919) @[el2_lsu_stbuf.scala 201:156] - node _T_925 = bits(stbuf_fwdbyteenvec_lo_2, 0, 0) @[el2_lsu_stbuf.scala 201:126] - node _T_926 = bits(stbuf_fwdbyteenvec_lo_2, 1, 1) @[el2_lsu_stbuf.scala 201:126] - node _T_927 = bits(stbuf_fwdbyteenvec_lo_2, 2, 2) @[el2_lsu_stbuf.scala 201:126] - node _T_928 = bits(stbuf_fwdbyteenvec_lo_2, 3, 3) @[el2_lsu_stbuf.scala 201:126] - node _T_929 = or(_T_928, _T_927) @[el2_lsu_stbuf.scala 201:156] - node _T_930 = or(_T_929, _T_926) @[el2_lsu_stbuf.scala 201:156] - node stbuf_fwdbyteen_lo_pre_m_2 = or(_T_930, _T_925) @[el2_lsu_stbuf.scala 201:156] - node _T_931 = bits(stbuf_fwdbyteenvec_lo_3, 0, 0) @[el2_lsu_stbuf.scala 201:126] - node _T_932 = bits(stbuf_fwdbyteenvec_lo_3, 1, 1) @[el2_lsu_stbuf.scala 201:126] - node _T_933 = bits(stbuf_fwdbyteenvec_lo_3, 2, 2) @[el2_lsu_stbuf.scala 201:126] - node _T_934 = bits(stbuf_fwdbyteenvec_lo_3, 3, 3) @[el2_lsu_stbuf.scala 201:126] - node _T_935 = or(_T_934, _T_933) @[el2_lsu_stbuf.scala 201:156] - node _T_936 = or(_T_935, _T_932) @[el2_lsu_stbuf.scala 201:156] - node stbuf_fwdbyteen_lo_pre_m_3 = or(_T_936, _T_931) @[el2_lsu_stbuf.scala 201:156] - node _T_937 = bits(stbuf_match_hi, 0, 0) @[el2_lsu_stbuf.scala 203:93] - node _T_938 = bits(_T_937, 0, 0) @[Bitwise.scala 72:15] - node _T_939 = mux(_T_938, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] - node _T_940 = and(_T_939, stbuf_data[0]) @[el2_lsu_stbuf.scala 203:98] - node _T_941 = bits(stbuf_match_hi, 1, 1) @[el2_lsu_stbuf.scala 203:93] - node _T_942 = bits(_T_941, 0, 0) @[Bitwise.scala 72:15] - node _T_943 = mux(_T_942, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] - node _T_944 = and(_T_943, stbuf_data[1]) @[el2_lsu_stbuf.scala 203:98] - node _T_945 = bits(stbuf_match_hi, 2, 2) @[el2_lsu_stbuf.scala 203:93] - node _T_946 = bits(_T_945, 0, 0) @[Bitwise.scala 72:15] - node _T_947 = mux(_T_946, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] - node _T_948 = and(_T_947, stbuf_data[2]) @[el2_lsu_stbuf.scala 203:98] - node _T_949 = bits(stbuf_match_hi, 3, 3) @[el2_lsu_stbuf.scala 203:93] - node _T_950 = bits(_T_949, 0, 0) @[Bitwise.scala 72:15] - node _T_951 = mux(_T_950, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] - node _T_952 = and(_T_951, stbuf_data[3]) @[el2_lsu_stbuf.scala 203:98] - wire _T_953 : UInt<32>[4] @[el2_lsu_stbuf.scala 203:66] - _T_953[0] <= _T_940 @[el2_lsu_stbuf.scala 203:66] - _T_953[1] <= _T_944 @[el2_lsu_stbuf.scala 203:66] - _T_953[2] <= _T_948 @[el2_lsu_stbuf.scala 203:66] - _T_953[3] <= _T_952 @[el2_lsu_stbuf.scala 203:66] - node _T_954 = or(_T_953[0], _T_953[1]) @[el2_lsu_stbuf.scala 203:123] - node _T_955 = or(_T_954, _T_953[2]) @[el2_lsu_stbuf.scala 203:123] - node stbuf_fwddata_hi_pre_m = or(_T_955, _T_953[3]) @[el2_lsu_stbuf.scala 203:123] - node _T_956 = bits(stbuf_match_lo, 0, 0) @[el2_lsu_stbuf.scala 204:93] - node _T_957 = bits(_T_956, 0, 0) @[Bitwise.scala 72:15] - node _T_958 = mux(_T_957, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] - node _T_959 = and(_T_958, stbuf_data[0]) @[el2_lsu_stbuf.scala 204:98] - node _T_960 = bits(stbuf_match_lo, 1, 1) @[el2_lsu_stbuf.scala 204:93] - node _T_961 = bits(_T_960, 0, 0) @[Bitwise.scala 72:15] - node _T_962 = mux(_T_961, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] - node _T_963 = and(_T_962, stbuf_data[1]) @[el2_lsu_stbuf.scala 204:98] - node _T_964 = bits(stbuf_match_lo, 2, 2) @[el2_lsu_stbuf.scala 204:93] - node _T_965 = bits(_T_964, 0, 0) @[Bitwise.scala 72:15] - node _T_966 = mux(_T_965, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] - node _T_967 = and(_T_966, stbuf_data[2]) @[el2_lsu_stbuf.scala 204:98] - node _T_968 = bits(stbuf_match_lo, 3, 3) @[el2_lsu_stbuf.scala 204:93] - node _T_969 = bits(_T_968, 0, 0) @[Bitwise.scala 72:15] - node _T_970 = mux(_T_969, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] - node _T_971 = and(_T_970, stbuf_data[3]) @[el2_lsu_stbuf.scala 204:98] - wire _T_972 : UInt<32>[4] @[el2_lsu_stbuf.scala 204:66] - _T_972[0] <= _T_959 @[el2_lsu_stbuf.scala 204:66] - _T_972[1] <= _T_963 @[el2_lsu_stbuf.scala 204:66] - _T_972[2] <= _T_967 @[el2_lsu_stbuf.scala 204:66] - _T_972[3] <= _T_971 @[el2_lsu_stbuf.scala 204:66] - node _T_973 = or(_T_972[0], _T_972[1]) @[el2_lsu_stbuf.scala 204:123] - node _T_974 = or(_T_973, _T_972[2]) @[el2_lsu_stbuf.scala 204:123] - node stbuf_fwddata_lo_pre_m = or(_T_974, _T_972[3]) @[el2_lsu_stbuf.scala 204:123] - node _T_975 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_stbuf.scala 206:55] - node _T_976 = dshl(ldst_byteen_r, _T_975) @[el2_lsu_stbuf.scala 206:39] - ldst_byteen_ext_r <= _T_976 @[el2_lsu_stbuf.scala 206:22] - node ldst_byteen_hi_r = bits(ldst_byteen_ext_r, 7, 4) @[el2_lsu_stbuf.scala 207:44] - node ldst_byteen_lo_r = bits(ldst_byteen_ext_r, 3, 0) @[el2_lsu_stbuf.scala 208:44] - node _T_977 = bits(io.lsu_addr_m, 31, 2) @[el2_lsu_stbuf.scala 210:43] - node _T_978 = bits(io.lsu_addr_r, 31, 2) @[el2_lsu_stbuf.scala 210:67] - node _T_979 = eq(_T_977, _T_978) @[el2_lsu_stbuf.scala 210:50] - node _T_980 = and(_T_979, io.lsu_pkt_r.valid) @[el2_lsu_stbuf.scala 210:75] - node _T_981 = and(_T_980, io.lsu_pkt_r.store) @[el2_lsu_stbuf.scala 210:96] - node _T_982 = eq(io.lsu_pkt_r.dma, UInt<1>("h00")) @[el2_lsu_stbuf.scala 210:119] - node ld_addr_rhit_lo_lo = and(_T_981, _T_982) @[el2_lsu_stbuf.scala 210:117] - node _T_983 = bits(io.end_addr_m, 31, 2) @[el2_lsu_stbuf.scala 211:43] - node _T_984 = bits(io.lsu_addr_r, 31, 2) @[el2_lsu_stbuf.scala 211:67] - node _T_985 = eq(_T_983, _T_984) @[el2_lsu_stbuf.scala 211:50] - node _T_986 = and(_T_985, io.lsu_pkt_r.valid) @[el2_lsu_stbuf.scala 211:75] - node _T_987 = and(_T_986, io.lsu_pkt_r.store) @[el2_lsu_stbuf.scala 211:96] - node _T_988 = eq(io.lsu_pkt_r.dma, UInt<1>("h00")) @[el2_lsu_stbuf.scala 211:119] - node ld_addr_rhit_lo_hi = and(_T_987, _T_988) @[el2_lsu_stbuf.scala 211:117] - node _T_989 = bits(io.lsu_addr_m, 31, 2) @[el2_lsu_stbuf.scala 212:43] - node _T_990 = bits(io.end_addr_r, 31, 2) @[el2_lsu_stbuf.scala 212:67] - node _T_991 = eq(_T_989, _T_990) @[el2_lsu_stbuf.scala 212:50] - node _T_992 = and(_T_991, io.lsu_pkt_r.valid) @[el2_lsu_stbuf.scala 212:75] - node _T_993 = and(_T_992, io.lsu_pkt_r.store) @[el2_lsu_stbuf.scala 212:96] - node _T_994 = eq(io.lsu_pkt_r.dma, UInt<1>("h00")) @[el2_lsu_stbuf.scala 212:119] - node _T_995 = and(_T_993, _T_994) @[el2_lsu_stbuf.scala 212:117] - node ld_addr_rhit_hi_lo = and(_T_995, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 212:137] - node _T_996 = bits(io.end_addr_m, 31, 2) @[el2_lsu_stbuf.scala 213:43] - node _T_997 = bits(io.end_addr_r, 31, 2) @[el2_lsu_stbuf.scala 213:67] - node _T_998 = eq(_T_996, _T_997) @[el2_lsu_stbuf.scala 213:50] - node _T_999 = and(_T_998, io.lsu_pkt_r.valid) @[el2_lsu_stbuf.scala 213:75] - node _T_1000 = and(_T_999, io.lsu_pkt_r.store) @[el2_lsu_stbuf.scala 213:96] - node _T_1001 = eq(io.lsu_pkt_r.dma, UInt<1>("h00")) @[el2_lsu_stbuf.scala 213:119] - node _T_1002 = and(_T_1000, _T_1001) @[el2_lsu_stbuf.scala 213:117] - node ld_addr_rhit_hi_hi = and(_T_1002, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 213:137] - node _T_1003 = bits(ldst_byteen_lo_r, 0, 0) @[el2_lsu_stbuf.scala 215:98] - node _T_1004 = and(ld_addr_rhit_lo_lo, _T_1003) @[el2_lsu_stbuf.scala 215:80] - node _T_1005 = bits(ldst_byteen_lo_r, 1, 1) @[el2_lsu_stbuf.scala 215:98] - node _T_1006 = and(ld_addr_rhit_lo_lo, _T_1005) @[el2_lsu_stbuf.scala 215:80] - node _T_1007 = bits(ldst_byteen_lo_r, 2, 2) @[el2_lsu_stbuf.scala 215:98] - node _T_1008 = and(ld_addr_rhit_lo_lo, _T_1007) @[el2_lsu_stbuf.scala 215:80] - node _T_1009 = bits(ldst_byteen_lo_r, 3, 3) @[el2_lsu_stbuf.scala 215:98] - node _T_1010 = and(ld_addr_rhit_lo_lo, _T_1009) @[el2_lsu_stbuf.scala 215:80] - node _T_1011 = cat(_T_1010, _T_1008) @[Cat.scala 29:58] - node _T_1012 = cat(_T_1011, _T_1006) @[Cat.scala 29:58] - node _T_1013 = cat(_T_1012, _T_1004) @[Cat.scala 29:58] - ld_byte_rhit_lo_lo <= _T_1013 @[el2_lsu_stbuf.scala 215:23] - node _T_1014 = bits(ldst_byteen_lo_r, 0, 0) @[el2_lsu_stbuf.scala 216:98] - node _T_1015 = and(ld_addr_rhit_lo_hi, _T_1014) @[el2_lsu_stbuf.scala 216:80] - node _T_1016 = bits(ldst_byteen_lo_r, 1, 1) @[el2_lsu_stbuf.scala 216:98] - node _T_1017 = and(ld_addr_rhit_lo_hi, _T_1016) @[el2_lsu_stbuf.scala 216:80] - node _T_1018 = bits(ldst_byteen_lo_r, 2, 2) @[el2_lsu_stbuf.scala 216:98] - node _T_1019 = and(ld_addr_rhit_lo_hi, _T_1018) @[el2_lsu_stbuf.scala 216:80] - node _T_1020 = bits(ldst_byteen_lo_r, 3, 3) @[el2_lsu_stbuf.scala 216:98] - node _T_1021 = and(ld_addr_rhit_lo_hi, _T_1020) @[el2_lsu_stbuf.scala 216:80] - node _T_1022 = cat(_T_1021, _T_1019) @[Cat.scala 29:58] - node _T_1023 = cat(_T_1022, _T_1017) @[Cat.scala 29:58] - node _T_1024 = cat(_T_1023, _T_1015) @[Cat.scala 29:58] - ld_byte_rhit_lo_hi <= _T_1024 @[el2_lsu_stbuf.scala 216:23] - node _T_1025 = bits(ldst_byteen_hi_r, 0, 0) @[el2_lsu_stbuf.scala 217:98] - node _T_1026 = and(ld_addr_rhit_hi_lo, _T_1025) @[el2_lsu_stbuf.scala 217:80] - node _T_1027 = bits(ldst_byteen_hi_r, 1, 1) @[el2_lsu_stbuf.scala 217:98] - node _T_1028 = and(ld_addr_rhit_hi_lo, _T_1027) @[el2_lsu_stbuf.scala 217:80] - node _T_1029 = bits(ldst_byteen_hi_r, 2, 2) @[el2_lsu_stbuf.scala 217:98] - node _T_1030 = and(ld_addr_rhit_hi_lo, _T_1029) @[el2_lsu_stbuf.scala 217:80] - node _T_1031 = bits(ldst_byteen_hi_r, 3, 3) @[el2_lsu_stbuf.scala 217:98] - node _T_1032 = and(ld_addr_rhit_hi_lo, _T_1031) @[el2_lsu_stbuf.scala 217:80] - node _T_1033 = cat(_T_1032, _T_1030) @[Cat.scala 29:58] - node _T_1034 = cat(_T_1033, _T_1028) @[Cat.scala 29:58] - node _T_1035 = cat(_T_1034, _T_1026) @[Cat.scala 29:58] - ld_byte_rhit_hi_lo <= _T_1035 @[el2_lsu_stbuf.scala 217:23] - node _T_1036 = bits(ldst_byteen_hi_r, 0, 0) @[el2_lsu_stbuf.scala 218:98] - node _T_1037 = and(ld_addr_rhit_hi_hi, _T_1036) @[el2_lsu_stbuf.scala 218:80] - node _T_1038 = bits(ldst_byteen_hi_r, 1, 1) @[el2_lsu_stbuf.scala 218:98] - node _T_1039 = and(ld_addr_rhit_hi_hi, _T_1038) @[el2_lsu_stbuf.scala 218:80] - node _T_1040 = bits(ldst_byteen_hi_r, 2, 2) @[el2_lsu_stbuf.scala 218:98] - node _T_1041 = and(ld_addr_rhit_hi_hi, _T_1040) @[el2_lsu_stbuf.scala 218:80] - node _T_1042 = bits(ldst_byteen_hi_r, 3, 3) @[el2_lsu_stbuf.scala 218:98] - node _T_1043 = and(ld_addr_rhit_hi_hi, _T_1042) @[el2_lsu_stbuf.scala 218:80] - node _T_1044 = cat(_T_1043, _T_1041) @[Cat.scala 29:58] - node _T_1045 = cat(_T_1044, _T_1039) @[Cat.scala 29:58] - node _T_1046 = cat(_T_1045, _T_1037) @[Cat.scala 29:58] - ld_byte_rhit_hi_hi <= _T_1046 @[el2_lsu_stbuf.scala 218:23] - node _T_1047 = bits(ld_byte_rhit_hi_lo, 0, 0) @[el2_lsu_stbuf.scala 220:97] - node _T_1048 = or(ld_byte_rhit_lo_lo, _T_1047) @[el2_lsu_stbuf.scala 220:77] - node _T_1049 = bits(ld_byte_rhit_hi_lo, 1, 1) @[el2_lsu_stbuf.scala 220:97] - node _T_1050 = or(ld_byte_rhit_lo_lo, _T_1049) @[el2_lsu_stbuf.scala 220:77] - node _T_1051 = bits(ld_byte_rhit_hi_lo, 2, 2) @[el2_lsu_stbuf.scala 220:97] - node _T_1052 = or(ld_byte_rhit_lo_lo, _T_1051) @[el2_lsu_stbuf.scala 220:77] - node _T_1053 = bits(ld_byte_rhit_hi_lo, 3, 3) @[el2_lsu_stbuf.scala 220:97] - node _T_1054 = or(ld_byte_rhit_lo_lo, _T_1053) @[el2_lsu_stbuf.scala 220:77] - node _T_1055 = cat(_T_1054, _T_1052) @[Cat.scala 29:58] - node _T_1056 = cat(_T_1055, _T_1050) @[Cat.scala 29:58] - node _T_1057 = cat(_T_1056, _T_1048) @[Cat.scala 29:58] - ld_byte_rhit_lo <= _T_1057 @[el2_lsu_stbuf.scala 220:20] - node _T_1058 = bits(ld_byte_rhit_hi_hi, 0, 0) @[el2_lsu_stbuf.scala 221:97] - node _T_1059 = or(ld_byte_rhit_lo_hi, _T_1058) @[el2_lsu_stbuf.scala 221:77] - node _T_1060 = bits(ld_byte_rhit_hi_hi, 1, 1) @[el2_lsu_stbuf.scala 221:97] - node _T_1061 = or(ld_byte_rhit_lo_hi, _T_1060) @[el2_lsu_stbuf.scala 221:77] - node _T_1062 = bits(ld_byte_rhit_hi_hi, 2, 2) @[el2_lsu_stbuf.scala 221:97] - node _T_1063 = or(ld_byte_rhit_lo_hi, _T_1062) @[el2_lsu_stbuf.scala 221:77] - node _T_1064 = bits(ld_byte_rhit_hi_hi, 3, 3) @[el2_lsu_stbuf.scala 221:97] - node _T_1065 = or(ld_byte_rhit_lo_hi, _T_1064) @[el2_lsu_stbuf.scala 221:77] - node _T_1066 = cat(_T_1065, _T_1063) @[Cat.scala 29:58] - node _T_1067 = cat(_T_1066, _T_1061) @[Cat.scala 29:58] - node _T_1068 = cat(_T_1067, _T_1059) @[Cat.scala 29:58] - ld_byte_rhit_hi <= _T_1068 @[el2_lsu_stbuf.scala 221:20] - node _T_1069 = bits(ld_byte_rhit_lo_lo, 0, 0) @[el2_lsu_stbuf.scala 223:49] - node _T_1070 = bits(_T_1069, 0, 0) @[Bitwise.scala 72:15] - node _T_1071 = mux(_T_1070, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] - node _T_1072 = bits(io.store_data_lo_r, 7, 0) @[el2_lsu_stbuf.scala 223:74] - node _T_1073 = and(_T_1071, _T_1072) @[el2_lsu_stbuf.scala 223:54] - node _T_1074 = bits(ld_byte_rhit_hi_lo, 0, 0) @[el2_lsu_stbuf.scala 223:110] - node _T_1075 = bits(_T_1074, 0, 0) @[Bitwise.scala 72:15] - node _T_1076 = mux(_T_1075, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] - node _T_1077 = bits(io.store_data_hi_r, 7, 0) @[el2_lsu_stbuf.scala 223:135] - node _T_1078 = and(_T_1076, _T_1077) @[el2_lsu_stbuf.scala 223:115] - node fwdpipe1_lo = or(_T_1073, _T_1078) @[el2_lsu_stbuf.scala 223:81] - node _T_1079 = bits(ld_byte_rhit_lo_lo, 1, 1) @[el2_lsu_stbuf.scala 224:49] - node _T_1080 = bits(_T_1079, 0, 0) @[Bitwise.scala 72:15] - node _T_1081 = mux(_T_1080, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] - node _T_1082 = bits(io.store_data_lo_r, 15, 8) @[el2_lsu_stbuf.scala 224:74] - node _T_1083 = and(_T_1081, _T_1082) @[el2_lsu_stbuf.scala 224:54] - node _T_1084 = bits(ld_byte_rhit_hi_lo, 1, 1) @[el2_lsu_stbuf.scala 224:111] - node _T_1085 = bits(_T_1084, 0, 0) @[Bitwise.scala 72:15] - node _T_1086 = mux(_T_1085, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] - node _T_1087 = bits(io.store_data_hi_r, 15, 8) @[el2_lsu_stbuf.scala 224:136] - node _T_1088 = and(_T_1086, _T_1087) @[el2_lsu_stbuf.scala 224:116] - node fwdpipe2_lo = or(_T_1083, _T_1088) @[el2_lsu_stbuf.scala 224:82] - node _T_1089 = bits(ld_byte_rhit_lo_lo, 2, 2) @[el2_lsu_stbuf.scala 225:49] - node _T_1090 = bits(_T_1089, 0, 0) @[Bitwise.scala 72:15] - node _T_1091 = mux(_T_1090, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] - node _T_1092 = bits(io.store_data_lo_r, 23, 16) @[el2_lsu_stbuf.scala 225:74] - node _T_1093 = and(_T_1091, _T_1092) @[el2_lsu_stbuf.scala 225:54] - node _T_1094 = bits(ld_byte_rhit_hi_lo, 2, 2) @[el2_lsu_stbuf.scala 225:112] - node _T_1095 = bits(_T_1094, 0, 0) @[Bitwise.scala 72:15] - node _T_1096 = mux(_T_1095, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] - node _T_1097 = bits(io.store_data_hi_r, 23, 16) @[el2_lsu_stbuf.scala 225:137] - node _T_1098 = and(_T_1096, _T_1097) @[el2_lsu_stbuf.scala 225:117] - node fwdpipe3_lo = or(_T_1093, _T_1098) @[el2_lsu_stbuf.scala 225:83] - node _T_1099 = bits(ld_byte_rhit_lo_lo, 3, 3) @[el2_lsu_stbuf.scala 226:49] - node _T_1100 = bits(_T_1099, 0, 0) @[Bitwise.scala 72:15] - node _T_1101 = mux(_T_1100, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] - node _T_1102 = bits(io.store_data_lo_r, 31, 24) @[el2_lsu_stbuf.scala 226:74] - node _T_1103 = and(_T_1101, _T_1102) @[el2_lsu_stbuf.scala 226:54] - node _T_1104 = bits(ld_byte_rhit_hi_lo, 3, 3) @[el2_lsu_stbuf.scala 226:112] - node _T_1105 = bits(_T_1104, 0, 0) @[Bitwise.scala 72:15] - node _T_1106 = mux(_T_1105, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] - node _T_1107 = bits(io.store_data_hi_r, 31, 8) @[el2_lsu_stbuf.scala 226:137] - node _T_1108 = and(_T_1106, _T_1107) @[el2_lsu_stbuf.scala 226:117] - node fwdpipe4_lo = or(_T_1103, _T_1108) @[el2_lsu_stbuf.scala 226:83] - node _T_1109 = cat(fwdpipe2_lo, fwdpipe1_lo) @[Cat.scala 29:58] - node _T_1110 = cat(fwdpipe4_lo, fwdpipe3_lo) @[Cat.scala 29:58] - node _T_1111 = cat(_T_1110, _T_1109) @[Cat.scala 29:58] - ld_fwddata_rpipe_lo <= _T_1111 @[el2_lsu_stbuf.scala 227:24] - node _T_1112 = bits(ld_byte_rhit_lo_hi, 0, 0) @[el2_lsu_stbuf.scala 229:49] - node _T_1113 = bits(_T_1112, 0, 0) @[Bitwise.scala 72:15] - node _T_1114 = mux(_T_1113, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] - node _T_1115 = bits(io.store_data_lo_r, 7, 0) @[el2_lsu_stbuf.scala 229:74] - node _T_1116 = and(_T_1114, _T_1115) @[el2_lsu_stbuf.scala 229:54] - node _T_1117 = bits(ld_byte_rhit_hi_hi, 0, 0) @[el2_lsu_stbuf.scala 229:110] - node _T_1118 = bits(_T_1117, 0, 0) @[Bitwise.scala 72:15] - node _T_1119 = mux(_T_1118, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] - node _T_1120 = bits(io.store_data_hi_r, 7, 0) @[el2_lsu_stbuf.scala 229:135] - node _T_1121 = and(_T_1119, _T_1120) @[el2_lsu_stbuf.scala 229:115] - node fwdpipe1_hi = or(_T_1116, _T_1121) @[el2_lsu_stbuf.scala 229:81] - node _T_1122 = bits(ld_byte_rhit_lo_hi, 1, 1) @[el2_lsu_stbuf.scala 230:49] - node _T_1123 = bits(_T_1122, 0, 0) @[Bitwise.scala 72:15] - node _T_1124 = mux(_T_1123, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] - node _T_1125 = bits(io.store_data_lo_r, 15, 8) @[el2_lsu_stbuf.scala 230:74] - node _T_1126 = and(_T_1124, _T_1125) @[el2_lsu_stbuf.scala 230:54] - node _T_1127 = bits(ld_byte_rhit_hi_hi, 1, 1) @[el2_lsu_stbuf.scala 230:111] - node _T_1128 = bits(_T_1127, 0, 0) @[Bitwise.scala 72:15] - node _T_1129 = mux(_T_1128, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] - node _T_1130 = bits(io.store_data_hi_r, 15, 8) @[el2_lsu_stbuf.scala 230:136] - node _T_1131 = and(_T_1129, _T_1130) @[el2_lsu_stbuf.scala 230:116] - node fwdpipe2_hi = or(_T_1126, _T_1131) @[el2_lsu_stbuf.scala 230:82] - node _T_1132 = bits(ld_byte_rhit_lo_hi, 2, 2) @[el2_lsu_stbuf.scala 231:49] - node _T_1133 = bits(_T_1132, 0, 0) @[Bitwise.scala 72:15] - node _T_1134 = mux(_T_1133, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] - node _T_1135 = bits(io.store_data_lo_r, 23, 16) @[el2_lsu_stbuf.scala 231:74] - node _T_1136 = and(_T_1134, _T_1135) @[el2_lsu_stbuf.scala 231:54] - node _T_1137 = bits(ld_byte_rhit_hi_hi, 2, 2) @[el2_lsu_stbuf.scala 231:112] - node _T_1138 = bits(_T_1137, 0, 0) @[Bitwise.scala 72:15] - node _T_1139 = mux(_T_1138, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] - node _T_1140 = bits(io.store_data_hi_r, 23, 16) @[el2_lsu_stbuf.scala 231:137] - node _T_1141 = and(_T_1139, _T_1140) @[el2_lsu_stbuf.scala 231:117] - node fwdpipe3_hi = or(_T_1136, _T_1141) @[el2_lsu_stbuf.scala 231:83] - node _T_1142 = bits(ld_byte_rhit_lo_hi, 3, 3) @[el2_lsu_stbuf.scala 232:49] - node _T_1143 = bits(_T_1142, 0, 0) @[Bitwise.scala 72:15] - node _T_1144 = mux(_T_1143, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] - node _T_1145 = bits(io.store_data_lo_r, 31, 24) @[el2_lsu_stbuf.scala 232:74] - node _T_1146 = and(_T_1144, _T_1145) @[el2_lsu_stbuf.scala 232:54] - node _T_1147 = bits(ld_byte_rhit_hi_hi, 3, 3) @[el2_lsu_stbuf.scala 232:112] + node _T_835 = cat(_T_834, _T_815) @[Cat.scala 29:58] + node stbuf_match_lo = cat(_T_835, _T_806) @[Cat.scala 29:58] + node _T_836 = bits(stbuf_match_hi, 0, 0) @[el2_lsu_stbuf.scala 214:75] + node _T_837 = bits(stbuf_match_lo, 0, 0) @[el2_lsu_stbuf.scala 214:95] + node _T_838 = or(_T_836, _T_837) @[el2_lsu_stbuf.scala 214:79] + node _T_839 = and(_T_838, io.lsu_pkt_m.valid) @[el2_lsu_stbuf.scala 214:100] + node _T_840 = and(_T_839, io.lsu_pkt_m.dma) @[el2_lsu_stbuf.scala 214:121] + node _T_841 = and(_T_840, io.lsu_pkt_m.store) @[el2_lsu_stbuf.scala 214:140] + node _T_842 = bits(stbuf_match_hi, 1, 1) @[el2_lsu_stbuf.scala 214:75] + node _T_843 = bits(stbuf_match_lo, 1, 1) @[el2_lsu_stbuf.scala 214:95] + node _T_844 = or(_T_842, _T_843) @[el2_lsu_stbuf.scala 214:79] + node _T_845 = and(_T_844, io.lsu_pkt_m.valid) @[el2_lsu_stbuf.scala 214:100] + node _T_846 = and(_T_845, io.lsu_pkt_m.dma) @[el2_lsu_stbuf.scala 214:121] + node _T_847 = and(_T_846, io.lsu_pkt_m.store) @[el2_lsu_stbuf.scala 214:140] + node _T_848 = bits(stbuf_match_hi, 2, 2) @[el2_lsu_stbuf.scala 214:75] + node _T_849 = bits(stbuf_match_lo, 2, 2) @[el2_lsu_stbuf.scala 214:95] + node _T_850 = or(_T_848, _T_849) @[el2_lsu_stbuf.scala 214:79] + node _T_851 = and(_T_850, io.lsu_pkt_m.valid) @[el2_lsu_stbuf.scala 214:100] + node _T_852 = and(_T_851, io.lsu_pkt_m.dma) @[el2_lsu_stbuf.scala 214:121] + node _T_853 = and(_T_852, io.lsu_pkt_m.store) @[el2_lsu_stbuf.scala 214:140] + node _T_854 = bits(stbuf_match_hi, 3, 3) @[el2_lsu_stbuf.scala 214:75] + node _T_855 = bits(stbuf_match_lo, 3, 3) @[el2_lsu_stbuf.scala 214:95] + node _T_856 = or(_T_854, _T_855) @[el2_lsu_stbuf.scala 214:79] + node _T_857 = and(_T_856, io.lsu_pkt_m.valid) @[el2_lsu_stbuf.scala 214:100] + node _T_858 = and(_T_857, io.lsu_pkt_m.dma) @[el2_lsu_stbuf.scala 214:121] + node _T_859 = and(_T_858, io.lsu_pkt_m.store) @[el2_lsu_stbuf.scala 214:140] + node _T_860 = cat(_T_859, _T_853) @[Cat.scala 29:58] + node _T_861 = cat(_T_860, _T_847) @[Cat.scala 29:58] + node _T_862 = cat(_T_861, _T_841) @[Cat.scala 29:58] + stbuf_dma_kill_en <= _T_862 @[el2_lsu_stbuf.scala 214:22] + node _T_863 = bits(stbuf_match_hi, 0, 0) @[el2_lsu_stbuf.scala 217:113] + node _T_864 = bits(stbuf_byteen[0], 0, 0) @[el2_lsu_stbuf.scala 217:134] + node _T_865 = and(_T_863, _T_864) @[el2_lsu_stbuf.scala 217:117] + node _T_866 = bits(stbuf_vld, 0, 0) @[el2_lsu_stbuf.scala 217:149] + node stbuf_fwdbyteenvec_hi_0_0 = and(_T_865, _T_866) @[el2_lsu_stbuf.scala 217:138] + node _T_867 = bits(stbuf_match_hi, 0, 0) @[el2_lsu_stbuf.scala 217:113] + node _T_868 = bits(stbuf_byteen[0], 1, 1) @[el2_lsu_stbuf.scala 217:134] + node _T_869 = and(_T_867, _T_868) @[el2_lsu_stbuf.scala 217:117] + node _T_870 = bits(stbuf_vld, 0, 0) @[el2_lsu_stbuf.scala 217:149] + node stbuf_fwdbyteenvec_hi_0_1 = and(_T_869, _T_870) @[el2_lsu_stbuf.scala 217:138] + node _T_871 = bits(stbuf_match_hi, 0, 0) @[el2_lsu_stbuf.scala 217:113] + node _T_872 = bits(stbuf_byteen[0], 2, 2) @[el2_lsu_stbuf.scala 217:134] + node _T_873 = and(_T_871, _T_872) @[el2_lsu_stbuf.scala 217:117] + node _T_874 = bits(stbuf_vld, 0, 0) @[el2_lsu_stbuf.scala 217:149] + node stbuf_fwdbyteenvec_hi_0_2 = and(_T_873, _T_874) @[el2_lsu_stbuf.scala 217:138] + node _T_875 = bits(stbuf_match_hi, 0, 0) @[el2_lsu_stbuf.scala 217:113] + node _T_876 = bits(stbuf_byteen[0], 3, 3) @[el2_lsu_stbuf.scala 217:134] + node _T_877 = and(_T_875, _T_876) @[el2_lsu_stbuf.scala 217:117] + node _T_878 = bits(stbuf_vld, 0, 0) @[el2_lsu_stbuf.scala 217:149] + node stbuf_fwdbyteenvec_hi_0_3 = and(_T_877, _T_878) @[el2_lsu_stbuf.scala 217:138] + node _T_879 = bits(stbuf_match_hi, 1, 1) @[el2_lsu_stbuf.scala 217:113] + node _T_880 = bits(stbuf_byteen[1], 0, 0) @[el2_lsu_stbuf.scala 217:134] + node _T_881 = and(_T_879, _T_880) @[el2_lsu_stbuf.scala 217:117] + node _T_882 = bits(stbuf_vld, 1, 1) @[el2_lsu_stbuf.scala 217:149] + node stbuf_fwdbyteenvec_hi_1_0 = and(_T_881, _T_882) @[el2_lsu_stbuf.scala 217:138] + node _T_883 = bits(stbuf_match_hi, 1, 1) @[el2_lsu_stbuf.scala 217:113] + node _T_884 = bits(stbuf_byteen[1], 1, 1) @[el2_lsu_stbuf.scala 217:134] + node _T_885 = and(_T_883, _T_884) @[el2_lsu_stbuf.scala 217:117] + node _T_886 = bits(stbuf_vld, 1, 1) @[el2_lsu_stbuf.scala 217:149] + node stbuf_fwdbyteenvec_hi_1_1 = and(_T_885, _T_886) @[el2_lsu_stbuf.scala 217:138] + node _T_887 = bits(stbuf_match_hi, 1, 1) @[el2_lsu_stbuf.scala 217:113] + node _T_888 = bits(stbuf_byteen[1], 2, 2) @[el2_lsu_stbuf.scala 217:134] + node _T_889 = and(_T_887, _T_888) @[el2_lsu_stbuf.scala 217:117] + node _T_890 = bits(stbuf_vld, 1, 1) @[el2_lsu_stbuf.scala 217:149] + node stbuf_fwdbyteenvec_hi_1_2 = and(_T_889, _T_890) @[el2_lsu_stbuf.scala 217:138] + node _T_891 = bits(stbuf_match_hi, 1, 1) @[el2_lsu_stbuf.scala 217:113] + node _T_892 = bits(stbuf_byteen[1], 3, 3) @[el2_lsu_stbuf.scala 217:134] + node _T_893 = and(_T_891, _T_892) @[el2_lsu_stbuf.scala 217:117] + node _T_894 = bits(stbuf_vld, 1, 1) @[el2_lsu_stbuf.scala 217:149] + node stbuf_fwdbyteenvec_hi_1_3 = and(_T_893, _T_894) @[el2_lsu_stbuf.scala 217:138] + node _T_895 = bits(stbuf_match_hi, 2, 2) @[el2_lsu_stbuf.scala 217:113] + node _T_896 = bits(stbuf_byteen[2], 0, 0) @[el2_lsu_stbuf.scala 217:134] + node _T_897 = and(_T_895, _T_896) @[el2_lsu_stbuf.scala 217:117] + node _T_898 = bits(stbuf_vld, 2, 2) @[el2_lsu_stbuf.scala 217:149] + node stbuf_fwdbyteenvec_hi_2_0 = and(_T_897, _T_898) @[el2_lsu_stbuf.scala 217:138] + node _T_899 = bits(stbuf_match_hi, 2, 2) @[el2_lsu_stbuf.scala 217:113] + node _T_900 = bits(stbuf_byteen[2], 1, 1) @[el2_lsu_stbuf.scala 217:134] + node _T_901 = and(_T_899, _T_900) @[el2_lsu_stbuf.scala 217:117] + node _T_902 = bits(stbuf_vld, 2, 2) @[el2_lsu_stbuf.scala 217:149] + node stbuf_fwdbyteenvec_hi_2_1 = and(_T_901, _T_902) @[el2_lsu_stbuf.scala 217:138] + node _T_903 = bits(stbuf_match_hi, 2, 2) @[el2_lsu_stbuf.scala 217:113] + node _T_904 = bits(stbuf_byteen[2], 2, 2) @[el2_lsu_stbuf.scala 217:134] + node _T_905 = and(_T_903, _T_904) @[el2_lsu_stbuf.scala 217:117] + node _T_906 = bits(stbuf_vld, 2, 2) @[el2_lsu_stbuf.scala 217:149] + node stbuf_fwdbyteenvec_hi_2_2 = and(_T_905, _T_906) @[el2_lsu_stbuf.scala 217:138] + node _T_907 = bits(stbuf_match_hi, 2, 2) @[el2_lsu_stbuf.scala 217:113] + node _T_908 = bits(stbuf_byteen[2], 3, 3) @[el2_lsu_stbuf.scala 217:134] + node _T_909 = and(_T_907, _T_908) @[el2_lsu_stbuf.scala 217:117] + node _T_910 = bits(stbuf_vld, 2, 2) @[el2_lsu_stbuf.scala 217:149] + node stbuf_fwdbyteenvec_hi_2_3 = and(_T_909, _T_910) @[el2_lsu_stbuf.scala 217:138] + node _T_911 = bits(stbuf_match_hi, 3, 3) @[el2_lsu_stbuf.scala 217:113] + node _T_912 = bits(stbuf_byteen[3], 0, 0) @[el2_lsu_stbuf.scala 217:134] + node _T_913 = and(_T_911, _T_912) @[el2_lsu_stbuf.scala 217:117] + node _T_914 = bits(stbuf_vld, 3, 3) @[el2_lsu_stbuf.scala 217:149] + node stbuf_fwdbyteenvec_hi_3_0 = and(_T_913, _T_914) @[el2_lsu_stbuf.scala 217:138] + node _T_915 = bits(stbuf_match_hi, 3, 3) @[el2_lsu_stbuf.scala 217:113] + node _T_916 = bits(stbuf_byteen[3], 1, 1) @[el2_lsu_stbuf.scala 217:134] + node _T_917 = and(_T_915, _T_916) @[el2_lsu_stbuf.scala 217:117] + node _T_918 = bits(stbuf_vld, 3, 3) @[el2_lsu_stbuf.scala 217:149] + node stbuf_fwdbyteenvec_hi_3_1 = and(_T_917, _T_918) @[el2_lsu_stbuf.scala 217:138] + node _T_919 = bits(stbuf_match_hi, 3, 3) @[el2_lsu_stbuf.scala 217:113] + node _T_920 = bits(stbuf_byteen[3], 2, 2) @[el2_lsu_stbuf.scala 217:134] + node _T_921 = and(_T_919, _T_920) @[el2_lsu_stbuf.scala 217:117] + node _T_922 = bits(stbuf_vld, 3, 3) @[el2_lsu_stbuf.scala 217:149] + node stbuf_fwdbyteenvec_hi_3_2 = and(_T_921, _T_922) @[el2_lsu_stbuf.scala 217:138] + node _T_923 = bits(stbuf_match_hi, 3, 3) @[el2_lsu_stbuf.scala 217:113] + node _T_924 = bits(stbuf_byteen[3], 3, 3) @[el2_lsu_stbuf.scala 217:134] + node _T_925 = and(_T_923, _T_924) @[el2_lsu_stbuf.scala 217:117] + node _T_926 = bits(stbuf_vld, 3, 3) @[el2_lsu_stbuf.scala 217:149] + node stbuf_fwdbyteenvec_hi_3_3 = and(_T_925, _T_926) @[el2_lsu_stbuf.scala 217:138] + node _T_927 = bits(stbuf_match_lo, 0, 0) @[el2_lsu_stbuf.scala 218:113] + node _T_928 = bits(stbuf_byteen[0], 0, 0) @[el2_lsu_stbuf.scala 218:134] + node _T_929 = and(_T_927, _T_928) @[el2_lsu_stbuf.scala 218:117] + node _T_930 = bits(stbuf_vld, 0, 0) @[el2_lsu_stbuf.scala 218:149] + node stbuf_fwdbyteenvec_lo_0_0 = and(_T_929, _T_930) @[el2_lsu_stbuf.scala 218:138] + node _T_931 = bits(stbuf_match_lo, 0, 0) @[el2_lsu_stbuf.scala 218:113] + node _T_932 = bits(stbuf_byteen[0], 1, 1) @[el2_lsu_stbuf.scala 218:134] + node _T_933 = and(_T_931, _T_932) @[el2_lsu_stbuf.scala 218:117] + node _T_934 = bits(stbuf_vld, 0, 0) @[el2_lsu_stbuf.scala 218:149] + node stbuf_fwdbyteenvec_lo_0_1 = and(_T_933, _T_934) @[el2_lsu_stbuf.scala 218:138] + node _T_935 = bits(stbuf_match_lo, 0, 0) @[el2_lsu_stbuf.scala 218:113] + node _T_936 = bits(stbuf_byteen[0], 2, 2) @[el2_lsu_stbuf.scala 218:134] + node _T_937 = and(_T_935, _T_936) @[el2_lsu_stbuf.scala 218:117] + node _T_938 = bits(stbuf_vld, 0, 0) @[el2_lsu_stbuf.scala 218:149] + node stbuf_fwdbyteenvec_lo_0_2 = and(_T_937, _T_938) @[el2_lsu_stbuf.scala 218:138] + node _T_939 = bits(stbuf_match_lo, 0, 0) @[el2_lsu_stbuf.scala 218:113] + node _T_940 = bits(stbuf_byteen[0], 3, 3) @[el2_lsu_stbuf.scala 218:134] + node _T_941 = and(_T_939, _T_940) @[el2_lsu_stbuf.scala 218:117] + node _T_942 = bits(stbuf_vld, 0, 0) @[el2_lsu_stbuf.scala 218:149] + node stbuf_fwdbyteenvec_lo_0_3 = and(_T_941, _T_942) @[el2_lsu_stbuf.scala 218:138] + node _T_943 = bits(stbuf_match_lo, 1, 1) @[el2_lsu_stbuf.scala 218:113] + node _T_944 = bits(stbuf_byteen[1], 0, 0) @[el2_lsu_stbuf.scala 218:134] + node _T_945 = and(_T_943, _T_944) @[el2_lsu_stbuf.scala 218:117] + node _T_946 = bits(stbuf_vld, 1, 1) @[el2_lsu_stbuf.scala 218:149] + node stbuf_fwdbyteenvec_lo_1_0 = and(_T_945, _T_946) @[el2_lsu_stbuf.scala 218:138] + node _T_947 = bits(stbuf_match_lo, 1, 1) @[el2_lsu_stbuf.scala 218:113] + node _T_948 = bits(stbuf_byteen[1], 1, 1) @[el2_lsu_stbuf.scala 218:134] + node _T_949 = and(_T_947, _T_948) @[el2_lsu_stbuf.scala 218:117] + node _T_950 = bits(stbuf_vld, 1, 1) @[el2_lsu_stbuf.scala 218:149] + node stbuf_fwdbyteenvec_lo_1_1 = and(_T_949, _T_950) @[el2_lsu_stbuf.scala 218:138] + node _T_951 = bits(stbuf_match_lo, 1, 1) @[el2_lsu_stbuf.scala 218:113] + node _T_952 = bits(stbuf_byteen[1], 2, 2) @[el2_lsu_stbuf.scala 218:134] + node _T_953 = and(_T_951, _T_952) @[el2_lsu_stbuf.scala 218:117] + node _T_954 = bits(stbuf_vld, 1, 1) @[el2_lsu_stbuf.scala 218:149] + node stbuf_fwdbyteenvec_lo_1_2 = and(_T_953, _T_954) @[el2_lsu_stbuf.scala 218:138] + node _T_955 = bits(stbuf_match_lo, 1, 1) @[el2_lsu_stbuf.scala 218:113] + node _T_956 = bits(stbuf_byteen[1], 3, 3) @[el2_lsu_stbuf.scala 218:134] + node _T_957 = and(_T_955, _T_956) @[el2_lsu_stbuf.scala 218:117] + node _T_958 = bits(stbuf_vld, 1, 1) @[el2_lsu_stbuf.scala 218:149] + node stbuf_fwdbyteenvec_lo_1_3 = and(_T_957, _T_958) @[el2_lsu_stbuf.scala 218:138] + node _T_959 = bits(stbuf_match_lo, 2, 2) @[el2_lsu_stbuf.scala 218:113] + node _T_960 = bits(stbuf_byteen[2], 0, 0) @[el2_lsu_stbuf.scala 218:134] + node _T_961 = and(_T_959, _T_960) @[el2_lsu_stbuf.scala 218:117] + node _T_962 = bits(stbuf_vld, 2, 2) @[el2_lsu_stbuf.scala 218:149] + node stbuf_fwdbyteenvec_lo_2_0 = and(_T_961, _T_962) @[el2_lsu_stbuf.scala 218:138] + node _T_963 = bits(stbuf_match_lo, 2, 2) @[el2_lsu_stbuf.scala 218:113] + node _T_964 = bits(stbuf_byteen[2], 1, 1) @[el2_lsu_stbuf.scala 218:134] + node _T_965 = and(_T_963, _T_964) @[el2_lsu_stbuf.scala 218:117] + node _T_966 = bits(stbuf_vld, 2, 2) @[el2_lsu_stbuf.scala 218:149] + node stbuf_fwdbyteenvec_lo_2_1 = and(_T_965, _T_966) @[el2_lsu_stbuf.scala 218:138] + node _T_967 = bits(stbuf_match_lo, 2, 2) @[el2_lsu_stbuf.scala 218:113] + node _T_968 = bits(stbuf_byteen[2], 2, 2) @[el2_lsu_stbuf.scala 218:134] + node _T_969 = and(_T_967, _T_968) @[el2_lsu_stbuf.scala 218:117] + node _T_970 = bits(stbuf_vld, 2, 2) @[el2_lsu_stbuf.scala 218:149] + node stbuf_fwdbyteenvec_lo_2_2 = and(_T_969, _T_970) @[el2_lsu_stbuf.scala 218:138] + node _T_971 = bits(stbuf_match_lo, 2, 2) @[el2_lsu_stbuf.scala 218:113] + node _T_972 = bits(stbuf_byteen[2], 3, 3) @[el2_lsu_stbuf.scala 218:134] + node _T_973 = and(_T_971, _T_972) @[el2_lsu_stbuf.scala 218:117] + node _T_974 = bits(stbuf_vld, 2, 2) @[el2_lsu_stbuf.scala 218:149] + node stbuf_fwdbyteenvec_lo_2_3 = and(_T_973, _T_974) @[el2_lsu_stbuf.scala 218:138] + node _T_975 = bits(stbuf_match_lo, 3, 3) @[el2_lsu_stbuf.scala 218:113] + node _T_976 = bits(stbuf_byteen[3], 0, 0) @[el2_lsu_stbuf.scala 218:134] + node _T_977 = and(_T_975, _T_976) @[el2_lsu_stbuf.scala 218:117] + node _T_978 = bits(stbuf_vld, 3, 3) @[el2_lsu_stbuf.scala 218:149] + node stbuf_fwdbyteenvec_lo_3_0 = and(_T_977, _T_978) @[el2_lsu_stbuf.scala 218:138] + node _T_979 = bits(stbuf_match_lo, 3, 3) @[el2_lsu_stbuf.scala 218:113] + node _T_980 = bits(stbuf_byteen[3], 1, 1) @[el2_lsu_stbuf.scala 218:134] + node _T_981 = and(_T_979, _T_980) @[el2_lsu_stbuf.scala 218:117] + node _T_982 = bits(stbuf_vld, 3, 3) @[el2_lsu_stbuf.scala 218:149] + node stbuf_fwdbyteenvec_lo_3_1 = and(_T_981, _T_982) @[el2_lsu_stbuf.scala 218:138] + node _T_983 = bits(stbuf_match_lo, 3, 3) @[el2_lsu_stbuf.scala 218:113] + node _T_984 = bits(stbuf_byteen[3], 2, 2) @[el2_lsu_stbuf.scala 218:134] + node _T_985 = and(_T_983, _T_984) @[el2_lsu_stbuf.scala 218:117] + node _T_986 = bits(stbuf_vld, 3, 3) @[el2_lsu_stbuf.scala 218:149] + node stbuf_fwdbyteenvec_lo_3_2 = and(_T_985, _T_986) @[el2_lsu_stbuf.scala 218:138] + node _T_987 = bits(stbuf_match_lo, 3, 3) @[el2_lsu_stbuf.scala 218:113] + node _T_988 = bits(stbuf_byteen[3], 3, 3) @[el2_lsu_stbuf.scala 218:134] + node _T_989 = and(_T_987, _T_988) @[el2_lsu_stbuf.scala 218:117] + node _T_990 = bits(stbuf_vld, 3, 3) @[el2_lsu_stbuf.scala 218:149] + node stbuf_fwdbyteenvec_lo_3_3 = and(_T_989, _T_990) @[el2_lsu_stbuf.scala 218:138] + node _T_991 = or(stbuf_fwdbyteenvec_hi_0_0, stbuf_fwdbyteenvec_hi_1_0) @[el2_lsu_stbuf.scala 219:148] + node _T_992 = or(_T_991, stbuf_fwdbyteenvec_hi_2_0) @[el2_lsu_stbuf.scala 219:148] + node stbuf_fwdbyteen_hi_pre_m_0 = or(_T_992, stbuf_fwdbyteenvec_hi_3_0) @[el2_lsu_stbuf.scala 219:148] + node _T_993 = or(stbuf_fwdbyteenvec_hi_0_1, stbuf_fwdbyteenvec_hi_1_1) @[el2_lsu_stbuf.scala 219:148] + node _T_994 = or(_T_993, stbuf_fwdbyteenvec_hi_2_1) @[el2_lsu_stbuf.scala 219:148] + node stbuf_fwdbyteen_hi_pre_m_1 = or(_T_994, stbuf_fwdbyteenvec_hi_3_1) @[el2_lsu_stbuf.scala 219:148] + node _T_995 = or(stbuf_fwdbyteenvec_hi_0_2, stbuf_fwdbyteenvec_hi_1_2) @[el2_lsu_stbuf.scala 219:148] + node _T_996 = or(_T_995, stbuf_fwdbyteenvec_hi_2_2) @[el2_lsu_stbuf.scala 219:148] + node stbuf_fwdbyteen_hi_pre_m_2 = or(_T_996, stbuf_fwdbyteenvec_hi_3_2) @[el2_lsu_stbuf.scala 219:148] + node _T_997 = or(stbuf_fwdbyteenvec_hi_0_3, stbuf_fwdbyteenvec_hi_1_3) @[el2_lsu_stbuf.scala 219:148] + node _T_998 = or(_T_997, stbuf_fwdbyteenvec_hi_2_3) @[el2_lsu_stbuf.scala 219:148] + node stbuf_fwdbyteen_hi_pre_m_3 = or(_T_998, stbuf_fwdbyteenvec_hi_3_3) @[el2_lsu_stbuf.scala 219:148] + node _T_999 = or(stbuf_fwdbyteenvec_lo_0_0, stbuf_fwdbyteenvec_lo_1_0) @[el2_lsu_stbuf.scala 220:148] + node _T_1000 = or(_T_999, stbuf_fwdbyteenvec_lo_2_0) @[el2_lsu_stbuf.scala 220:148] + node stbuf_fwdbyteen_lo_pre_m_0 = or(_T_1000, stbuf_fwdbyteenvec_lo_3_0) @[el2_lsu_stbuf.scala 220:148] + node _T_1001 = or(stbuf_fwdbyteenvec_lo_0_1, stbuf_fwdbyteenvec_lo_1_1) @[el2_lsu_stbuf.scala 220:148] + node _T_1002 = or(_T_1001, stbuf_fwdbyteenvec_lo_2_1) @[el2_lsu_stbuf.scala 220:148] + node stbuf_fwdbyteen_lo_pre_m_1 = or(_T_1002, stbuf_fwdbyteenvec_lo_3_1) @[el2_lsu_stbuf.scala 220:148] + node _T_1003 = or(stbuf_fwdbyteenvec_lo_0_2, stbuf_fwdbyteenvec_lo_1_2) @[el2_lsu_stbuf.scala 220:148] + node _T_1004 = or(_T_1003, stbuf_fwdbyteenvec_lo_2_2) @[el2_lsu_stbuf.scala 220:148] + node stbuf_fwdbyteen_lo_pre_m_2 = or(_T_1004, stbuf_fwdbyteenvec_lo_3_2) @[el2_lsu_stbuf.scala 220:148] + node _T_1005 = or(stbuf_fwdbyteenvec_lo_0_3, stbuf_fwdbyteenvec_lo_1_3) @[el2_lsu_stbuf.scala 220:148] + node _T_1006 = or(_T_1005, stbuf_fwdbyteenvec_lo_2_3) @[el2_lsu_stbuf.scala 220:148] + node stbuf_fwdbyteen_lo_pre_m_3 = or(_T_1006, stbuf_fwdbyteenvec_lo_3_3) @[el2_lsu_stbuf.scala 220:148] + node _T_1007 = bits(stbuf_match_hi, 0, 0) @[el2_lsu_stbuf.scala 222:93] + node _T_1008 = bits(_T_1007, 0, 0) @[Bitwise.scala 72:15] + node _T_1009 = mux(_T_1008, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_1010 = and(_T_1009, stbuf_data[0]) @[el2_lsu_stbuf.scala 222:98] + node _T_1011 = bits(stbuf_match_hi, 1, 1) @[el2_lsu_stbuf.scala 222:93] + node _T_1012 = bits(_T_1011, 0, 0) @[Bitwise.scala 72:15] + node _T_1013 = mux(_T_1012, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_1014 = and(_T_1013, stbuf_data[1]) @[el2_lsu_stbuf.scala 222:98] + node _T_1015 = bits(stbuf_match_hi, 2, 2) @[el2_lsu_stbuf.scala 222:93] + node _T_1016 = bits(_T_1015, 0, 0) @[Bitwise.scala 72:15] + node _T_1017 = mux(_T_1016, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_1018 = and(_T_1017, stbuf_data[2]) @[el2_lsu_stbuf.scala 222:98] + node _T_1019 = bits(stbuf_match_hi, 3, 3) @[el2_lsu_stbuf.scala 222:93] + node _T_1020 = bits(_T_1019, 0, 0) @[Bitwise.scala 72:15] + node _T_1021 = mux(_T_1020, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_1022 = and(_T_1021, stbuf_data[3]) @[el2_lsu_stbuf.scala 222:98] + wire _T_1023 : UInt<32>[4] @[el2_lsu_stbuf.scala 222:66] + _T_1023[0] <= _T_1010 @[el2_lsu_stbuf.scala 222:66] + _T_1023[1] <= _T_1014 @[el2_lsu_stbuf.scala 222:66] + _T_1023[2] <= _T_1018 @[el2_lsu_stbuf.scala 222:66] + _T_1023[3] <= _T_1022 @[el2_lsu_stbuf.scala 222:66] + node _T_1024 = or(_T_1023[3], _T_1023[2]) @[el2_lsu_stbuf.scala 222:131] + node _T_1025 = or(_T_1024, _T_1023[1]) @[el2_lsu_stbuf.scala 222:131] + node stbuf_fwddata_hi_pre_m = or(_T_1025, _T_1023[0]) @[el2_lsu_stbuf.scala 222:131] + node _T_1026 = bits(stbuf_match_lo, 0, 0) @[el2_lsu_stbuf.scala 223:93] + node _T_1027 = bits(_T_1026, 0, 0) @[Bitwise.scala 72:15] + node _T_1028 = mux(_T_1027, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_1029 = and(_T_1028, stbuf_data[0]) @[el2_lsu_stbuf.scala 223:98] + node _T_1030 = bits(stbuf_match_lo, 1, 1) @[el2_lsu_stbuf.scala 223:93] + node _T_1031 = bits(_T_1030, 0, 0) @[Bitwise.scala 72:15] + node _T_1032 = mux(_T_1031, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_1033 = and(_T_1032, stbuf_data[1]) @[el2_lsu_stbuf.scala 223:98] + node _T_1034 = bits(stbuf_match_lo, 2, 2) @[el2_lsu_stbuf.scala 223:93] + node _T_1035 = bits(_T_1034, 0, 0) @[Bitwise.scala 72:15] + node _T_1036 = mux(_T_1035, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_1037 = and(_T_1036, stbuf_data[2]) @[el2_lsu_stbuf.scala 223:98] + node _T_1038 = bits(stbuf_match_lo, 3, 3) @[el2_lsu_stbuf.scala 223:93] + node _T_1039 = bits(_T_1038, 0, 0) @[Bitwise.scala 72:15] + node _T_1040 = mux(_T_1039, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_1041 = and(_T_1040, stbuf_data[3]) @[el2_lsu_stbuf.scala 223:98] + wire _T_1042 : UInt<32>[4] @[el2_lsu_stbuf.scala 223:66] + _T_1042[0] <= _T_1029 @[el2_lsu_stbuf.scala 223:66] + _T_1042[1] <= _T_1033 @[el2_lsu_stbuf.scala 223:66] + _T_1042[2] <= _T_1037 @[el2_lsu_stbuf.scala 223:66] + _T_1042[3] <= _T_1041 @[el2_lsu_stbuf.scala 223:66] + node _T_1043 = or(_T_1042[3], _T_1042[2]) @[el2_lsu_stbuf.scala 223:131] + node _T_1044 = or(_T_1043, _T_1042[1]) @[el2_lsu_stbuf.scala 223:131] + node stbuf_fwddata_lo_pre_m = or(_T_1044, _T_1042[0]) @[el2_lsu_stbuf.scala 223:131] + node _T_1045 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_stbuf.scala 226:55] + node _T_1046 = dshl(ldst_byteen_r, _T_1045) @[el2_lsu_stbuf.scala 226:39] + ldst_byteen_ext_r <= _T_1046 @[el2_lsu_stbuf.scala 226:22] + node ldst_byteen_hi_r = bits(ldst_byteen_ext_r, 7, 4) @[el2_lsu_stbuf.scala 227:44] + node ldst_byteen_lo_r = bits(ldst_byteen_ext_r, 3, 0) @[el2_lsu_stbuf.scala 228:44] + node _T_1047 = bits(io.lsu_addr_m, 31, 2) @[el2_lsu_stbuf.scala 230:43] + node _T_1048 = bits(io.lsu_addr_r, 31, 2) @[el2_lsu_stbuf.scala 230:67] + node _T_1049 = eq(_T_1047, _T_1048) @[el2_lsu_stbuf.scala 230:50] + node _T_1050 = and(_T_1049, io.lsu_pkt_r.valid) @[el2_lsu_stbuf.scala 230:75] + node _T_1051 = and(_T_1050, io.lsu_pkt_r.store) @[el2_lsu_stbuf.scala 230:96] + node _T_1052 = eq(io.lsu_pkt_r.dma, UInt<1>("h00")) @[el2_lsu_stbuf.scala 230:119] + node ld_addr_rhit_lo_lo = and(_T_1051, _T_1052) @[el2_lsu_stbuf.scala 230:117] + node _T_1053 = bits(io.end_addr_m, 31, 2) @[el2_lsu_stbuf.scala 231:43] + node _T_1054 = bits(io.lsu_addr_r, 31, 2) @[el2_lsu_stbuf.scala 231:67] + node _T_1055 = eq(_T_1053, _T_1054) @[el2_lsu_stbuf.scala 231:50] + node _T_1056 = and(_T_1055, io.lsu_pkt_r.valid) @[el2_lsu_stbuf.scala 231:75] + node _T_1057 = and(_T_1056, io.lsu_pkt_r.store) @[el2_lsu_stbuf.scala 231:96] + node _T_1058 = eq(io.lsu_pkt_r.dma, UInt<1>("h00")) @[el2_lsu_stbuf.scala 231:119] + node ld_addr_rhit_lo_hi = and(_T_1057, _T_1058) @[el2_lsu_stbuf.scala 231:117] + node _T_1059 = bits(io.lsu_addr_m, 31, 2) @[el2_lsu_stbuf.scala 232:43] + node _T_1060 = bits(io.end_addr_r, 31, 2) @[el2_lsu_stbuf.scala 232:67] + node _T_1061 = eq(_T_1059, _T_1060) @[el2_lsu_stbuf.scala 232:50] + node _T_1062 = and(_T_1061, io.lsu_pkt_r.valid) @[el2_lsu_stbuf.scala 232:75] + node _T_1063 = and(_T_1062, io.lsu_pkt_r.store) @[el2_lsu_stbuf.scala 232:96] + node _T_1064 = eq(io.lsu_pkt_r.dma, UInt<1>("h00")) @[el2_lsu_stbuf.scala 232:119] + node _T_1065 = and(_T_1063, _T_1064) @[el2_lsu_stbuf.scala 232:117] + node ld_addr_rhit_hi_lo = and(_T_1065, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 232:137] + node _T_1066 = bits(io.end_addr_m, 31, 2) @[el2_lsu_stbuf.scala 233:43] + node _T_1067 = bits(io.end_addr_r, 31, 2) @[el2_lsu_stbuf.scala 233:67] + node _T_1068 = eq(_T_1066, _T_1067) @[el2_lsu_stbuf.scala 233:50] + node _T_1069 = and(_T_1068, io.lsu_pkt_r.valid) @[el2_lsu_stbuf.scala 233:75] + node _T_1070 = and(_T_1069, io.lsu_pkt_r.store) @[el2_lsu_stbuf.scala 233:96] + node _T_1071 = eq(io.lsu_pkt_r.dma, UInt<1>("h00")) @[el2_lsu_stbuf.scala 233:119] + node _T_1072 = and(_T_1070, _T_1071) @[el2_lsu_stbuf.scala 233:117] + node ld_addr_rhit_hi_hi = and(_T_1072, dual_stbuf_write_r) @[el2_lsu_stbuf.scala 233:137] + node _T_1073 = bits(ldst_byteen_lo_r, 0, 0) @[el2_lsu_stbuf.scala 235:98] + node _T_1074 = and(ld_addr_rhit_lo_lo, _T_1073) @[el2_lsu_stbuf.scala 235:80] + node _T_1075 = bits(ldst_byteen_lo_r, 1, 1) @[el2_lsu_stbuf.scala 235:98] + node _T_1076 = and(ld_addr_rhit_lo_lo, _T_1075) @[el2_lsu_stbuf.scala 235:80] + node _T_1077 = bits(ldst_byteen_lo_r, 2, 2) @[el2_lsu_stbuf.scala 235:98] + node _T_1078 = and(ld_addr_rhit_lo_lo, _T_1077) @[el2_lsu_stbuf.scala 235:80] + node _T_1079 = bits(ldst_byteen_lo_r, 3, 3) @[el2_lsu_stbuf.scala 235:98] + node _T_1080 = and(ld_addr_rhit_lo_lo, _T_1079) @[el2_lsu_stbuf.scala 235:80] + node _T_1081 = cat(_T_1080, _T_1078) @[Cat.scala 29:58] + node _T_1082 = cat(_T_1081, _T_1076) @[Cat.scala 29:58] + node _T_1083 = cat(_T_1082, _T_1074) @[Cat.scala 29:58] + ld_byte_rhit_lo_lo <= _T_1083 @[el2_lsu_stbuf.scala 235:23] + node _T_1084 = bits(ldst_byteen_lo_r, 0, 0) @[el2_lsu_stbuf.scala 236:98] + node _T_1085 = and(ld_addr_rhit_lo_hi, _T_1084) @[el2_lsu_stbuf.scala 236:80] + node _T_1086 = bits(ldst_byteen_lo_r, 1, 1) @[el2_lsu_stbuf.scala 236:98] + node _T_1087 = and(ld_addr_rhit_lo_hi, _T_1086) @[el2_lsu_stbuf.scala 236:80] + node _T_1088 = bits(ldst_byteen_lo_r, 2, 2) @[el2_lsu_stbuf.scala 236:98] + node _T_1089 = and(ld_addr_rhit_lo_hi, _T_1088) @[el2_lsu_stbuf.scala 236:80] + node _T_1090 = bits(ldst_byteen_lo_r, 3, 3) @[el2_lsu_stbuf.scala 236:98] + node _T_1091 = and(ld_addr_rhit_lo_hi, _T_1090) @[el2_lsu_stbuf.scala 236:80] + node _T_1092 = cat(_T_1091, _T_1089) @[Cat.scala 29:58] + node _T_1093 = cat(_T_1092, _T_1087) @[Cat.scala 29:58] + node _T_1094 = cat(_T_1093, _T_1085) @[Cat.scala 29:58] + ld_byte_rhit_lo_hi <= _T_1094 @[el2_lsu_stbuf.scala 236:23] + node _T_1095 = bits(ldst_byteen_hi_r, 0, 0) @[el2_lsu_stbuf.scala 237:98] + node _T_1096 = and(ld_addr_rhit_hi_lo, _T_1095) @[el2_lsu_stbuf.scala 237:80] + node _T_1097 = bits(ldst_byteen_hi_r, 1, 1) @[el2_lsu_stbuf.scala 237:98] + node _T_1098 = and(ld_addr_rhit_hi_lo, _T_1097) @[el2_lsu_stbuf.scala 237:80] + node _T_1099 = bits(ldst_byteen_hi_r, 2, 2) @[el2_lsu_stbuf.scala 237:98] + node _T_1100 = and(ld_addr_rhit_hi_lo, _T_1099) @[el2_lsu_stbuf.scala 237:80] + node _T_1101 = bits(ldst_byteen_hi_r, 3, 3) @[el2_lsu_stbuf.scala 237:98] + node _T_1102 = and(ld_addr_rhit_hi_lo, _T_1101) @[el2_lsu_stbuf.scala 237:80] + node _T_1103 = cat(_T_1102, _T_1100) @[Cat.scala 29:58] + node _T_1104 = cat(_T_1103, _T_1098) @[Cat.scala 29:58] + node _T_1105 = cat(_T_1104, _T_1096) @[Cat.scala 29:58] + ld_byte_rhit_hi_lo <= _T_1105 @[el2_lsu_stbuf.scala 237:23] + node _T_1106 = bits(ldst_byteen_hi_r, 0, 0) @[el2_lsu_stbuf.scala 238:98] + node _T_1107 = and(ld_addr_rhit_hi_hi, _T_1106) @[el2_lsu_stbuf.scala 238:80] + node _T_1108 = bits(ldst_byteen_hi_r, 1, 1) @[el2_lsu_stbuf.scala 238:98] + node _T_1109 = and(ld_addr_rhit_hi_hi, _T_1108) @[el2_lsu_stbuf.scala 238:80] + node _T_1110 = bits(ldst_byteen_hi_r, 2, 2) @[el2_lsu_stbuf.scala 238:98] + node _T_1111 = and(ld_addr_rhit_hi_hi, _T_1110) @[el2_lsu_stbuf.scala 238:80] + node _T_1112 = bits(ldst_byteen_hi_r, 3, 3) @[el2_lsu_stbuf.scala 238:98] + node _T_1113 = and(ld_addr_rhit_hi_hi, _T_1112) @[el2_lsu_stbuf.scala 238:80] + node _T_1114 = cat(_T_1113, _T_1111) @[Cat.scala 29:58] + node _T_1115 = cat(_T_1114, _T_1109) @[Cat.scala 29:58] + node _T_1116 = cat(_T_1115, _T_1107) @[Cat.scala 29:58] + ld_byte_rhit_hi_hi <= _T_1116 @[el2_lsu_stbuf.scala 238:23] + node _T_1117 = bits(ld_byte_rhit_lo_lo, 0, 0) @[el2_lsu_stbuf.scala 240:76] + node _T_1118 = bits(ld_byte_rhit_hi_lo, 0, 0) @[el2_lsu_stbuf.scala 240:100] + node _T_1119 = or(_T_1117, _T_1118) @[el2_lsu_stbuf.scala 240:80] + node _T_1120 = bits(ld_byte_rhit_lo_lo, 1, 1) @[el2_lsu_stbuf.scala 240:76] + node _T_1121 = bits(ld_byte_rhit_hi_lo, 1, 1) @[el2_lsu_stbuf.scala 240:100] + node _T_1122 = or(_T_1120, _T_1121) @[el2_lsu_stbuf.scala 240:80] + node _T_1123 = bits(ld_byte_rhit_lo_lo, 2, 2) @[el2_lsu_stbuf.scala 240:76] + node _T_1124 = bits(ld_byte_rhit_hi_lo, 2, 2) @[el2_lsu_stbuf.scala 240:100] + node _T_1125 = or(_T_1123, _T_1124) @[el2_lsu_stbuf.scala 240:80] + node _T_1126 = bits(ld_byte_rhit_lo_lo, 3, 3) @[el2_lsu_stbuf.scala 240:76] + node _T_1127 = bits(ld_byte_rhit_hi_lo, 3, 3) @[el2_lsu_stbuf.scala 240:100] + node _T_1128 = or(_T_1126, _T_1127) @[el2_lsu_stbuf.scala 240:80] + node _T_1129 = cat(_T_1128, _T_1125) @[Cat.scala 29:58] + node _T_1130 = cat(_T_1129, _T_1122) @[Cat.scala 29:58] + node _T_1131 = cat(_T_1130, _T_1119) @[Cat.scala 29:58] + ld_byte_rhit_lo <= _T_1131 @[el2_lsu_stbuf.scala 240:20] + node _T_1132 = bits(ld_byte_rhit_lo_hi, 0, 0) @[el2_lsu_stbuf.scala 241:76] + node _T_1133 = bits(ld_byte_rhit_hi_hi, 0, 0) @[el2_lsu_stbuf.scala 241:100] + node _T_1134 = or(_T_1132, _T_1133) @[el2_lsu_stbuf.scala 241:80] + node _T_1135 = bits(ld_byte_rhit_lo_hi, 1, 1) @[el2_lsu_stbuf.scala 241:76] + node _T_1136 = bits(ld_byte_rhit_hi_hi, 1, 1) @[el2_lsu_stbuf.scala 241:100] + node _T_1137 = or(_T_1135, _T_1136) @[el2_lsu_stbuf.scala 241:80] + node _T_1138 = bits(ld_byte_rhit_lo_hi, 2, 2) @[el2_lsu_stbuf.scala 241:76] + node _T_1139 = bits(ld_byte_rhit_hi_hi, 2, 2) @[el2_lsu_stbuf.scala 241:100] + node _T_1140 = or(_T_1138, _T_1139) @[el2_lsu_stbuf.scala 241:80] + node _T_1141 = bits(ld_byte_rhit_lo_hi, 3, 3) @[el2_lsu_stbuf.scala 241:76] + node _T_1142 = bits(ld_byte_rhit_hi_hi, 3, 3) @[el2_lsu_stbuf.scala 241:100] + node _T_1143 = or(_T_1141, _T_1142) @[el2_lsu_stbuf.scala 241:80] + node _T_1144 = cat(_T_1143, _T_1140) @[Cat.scala 29:58] + node _T_1145 = cat(_T_1144, _T_1137) @[Cat.scala 29:58] + node _T_1146 = cat(_T_1145, _T_1134) @[Cat.scala 29:58] + ld_byte_rhit_hi <= _T_1146 @[el2_lsu_stbuf.scala 241:20] + node _T_1147 = bits(ld_byte_rhit_lo_lo, 0, 0) @[el2_lsu_stbuf.scala 243:49] node _T_1148 = bits(_T_1147, 0, 0) @[Bitwise.scala 72:15] node _T_1149 = mux(_T_1148, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] - node _T_1150 = bits(io.store_data_hi_r, 31, 8) @[el2_lsu_stbuf.scala 232:137] - node _T_1151 = and(_T_1149, _T_1150) @[el2_lsu_stbuf.scala 232:117] - node fwdpipe4_hi = or(_T_1146, _T_1151) @[el2_lsu_stbuf.scala 232:83] - node _T_1152 = cat(fwdpipe2_hi, fwdpipe1_hi) @[Cat.scala 29:58] - node _T_1153 = cat(fwdpipe4_hi, fwdpipe3_hi) @[Cat.scala 29:58] - node _T_1154 = cat(_T_1153, _T_1152) @[Cat.scala 29:58] - ld_fwddata_rpipe_hi <= _T_1154 @[el2_lsu_stbuf.scala 233:24] - node _T_1155 = bits(ld_byte_hit_hi, 0, 0) @[el2_lsu_stbuf.scala 235:80] - node _T_1156 = or(_T_1155, stbuf_fwdbyteen_hi_pre_m_0) @[el2_lsu_stbuf.scala 235:84] - node _T_1157 = bits(ld_byte_hit_hi, 1, 1) @[el2_lsu_stbuf.scala 235:80] - node _T_1158 = or(_T_1157, stbuf_fwdbyteen_hi_pre_m_1) @[el2_lsu_stbuf.scala 235:84] - node _T_1159 = bits(ld_byte_hit_hi, 2, 2) @[el2_lsu_stbuf.scala 235:80] - node _T_1160 = or(_T_1159, stbuf_fwdbyteen_hi_pre_m_2) @[el2_lsu_stbuf.scala 235:84] - node _T_1161 = bits(ld_byte_hit_hi, 3, 3) @[el2_lsu_stbuf.scala 235:80] - node _T_1162 = or(_T_1161, stbuf_fwdbyteen_hi_pre_m_3) @[el2_lsu_stbuf.scala 235:84] - node _T_1163 = cat(_T_1162, _T_1160) @[Cat.scala 29:58] - node _T_1164 = cat(_T_1163, _T_1158) @[Cat.scala 29:58] - node _T_1165 = cat(_T_1164, _T_1156) @[Cat.scala 29:58] - io.stbuf_fwdbyteen_hi_m <= _T_1165 @[el2_lsu_stbuf.scala 235:28] - node _T_1166 = bits(ld_byte_hit_lo, 0, 0) @[el2_lsu_stbuf.scala 236:80] - node _T_1167 = or(_T_1166, stbuf_fwdbyteen_lo_pre_m_0) @[el2_lsu_stbuf.scala 236:84] - node _T_1168 = bits(ld_byte_hit_lo, 1, 1) @[el2_lsu_stbuf.scala 236:80] - node _T_1169 = or(_T_1168, stbuf_fwdbyteen_lo_pre_m_1) @[el2_lsu_stbuf.scala 236:84] - node _T_1170 = bits(ld_byte_hit_lo, 2, 2) @[el2_lsu_stbuf.scala 236:80] - node _T_1171 = or(_T_1170, stbuf_fwdbyteen_lo_pre_m_2) @[el2_lsu_stbuf.scala 236:84] - node _T_1172 = bits(ld_byte_hit_lo, 3, 3) @[el2_lsu_stbuf.scala 236:80] - node _T_1173 = or(_T_1172, stbuf_fwdbyteen_lo_pre_m_3) @[el2_lsu_stbuf.scala 236:84] - node _T_1174 = cat(_T_1173, _T_1171) @[Cat.scala 29:58] - node _T_1175 = cat(_T_1174, _T_1169) @[Cat.scala 29:58] - node _T_1176 = cat(_T_1175, _T_1167) @[Cat.scala 29:58] - io.stbuf_fwdbyteen_lo_m <= _T_1176 @[el2_lsu_stbuf.scala 236:28] - node _T_1177 = bits(ld_byte_rhit_lo, 0, 0) @[el2_lsu_stbuf.scala 239:47] - node _T_1178 = bits(ld_fwddata_rpipe_lo, 7, 0) @[el2_lsu_stbuf.scala 239:70] - node _T_1179 = bits(stbuf_fwddata_lo_pre_m, 7, 0) @[el2_lsu_stbuf.scala 239:98] - node stbuf_fwdpipe1_lo = mux(_T_1177, _T_1178, _T_1179) @[el2_lsu_stbuf.scala 239:31] - node _T_1180 = bits(ld_byte_rhit_lo, 1, 1) @[el2_lsu_stbuf.scala 240:47] - node _T_1181 = bits(ld_fwddata_rpipe_lo, 15, 8) @[el2_lsu_stbuf.scala 240:70] - node _T_1182 = bits(stbuf_fwddata_lo_pre_m, 15, 8) @[el2_lsu_stbuf.scala 240:99] - node stbuf_fwdpipe2_lo = mux(_T_1180, _T_1181, _T_1182) @[el2_lsu_stbuf.scala 240:31] - node _T_1183 = bits(ld_byte_rhit_lo, 2, 2) @[el2_lsu_stbuf.scala 241:47] - node _T_1184 = bits(ld_fwddata_rpipe_lo, 23, 16) @[el2_lsu_stbuf.scala 241:70] - node _T_1185 = bits(stbuf_fwddata_lo_pre_m, 23, 16) @[el2_lsu_stbuf.scala 241:100] - node stbuf_fwdpipe3_lo = mux(_T_1183, _T_1184, _T_1185) @[el2_lsu_stbuf.scala 241:31] - node _T_1186 = bits(ld_byte_rhit_lo, 3, 3) @[el2_lsu_stbuf.scala 242:47] - node _T_1187 = bits(ld_fwddata_rpipe_lo, 31, 24) @[el2_lsu_stbuf.scala 242:70] - node _T_1188 = bits(stbuf_fwddata_lo_pre_m, 31, 24) @[el2_lsu_stbuf.scala 242:100] - node stbuf_fwdpipe4_lo = mux(_T_1186, _T_1187, _T_1188) @[el2_lsu_stbuf.scala 242:31] - node _T_1189 = cat(stbuf_fwdpipe2_lo, stbuf_fwdpipe1_lo) @[Cat.scala 29:58] - node _T_1190 = cat(stbuf_fwdpipe4_lo, stbuf_fwdpipe3_lo) @[Cat.scala 29:58] - node _T_1191 = cat(_T_1190, _T_1189) @[Cat.scala 29:58] - io.stbuf_fwddata_lo_m <= _T_1191 @[el2_lsu_stbuf.scala 243:26] - node _T_1192 = bits(ld_byte_rhit_hi, 0, 0) @[el2_lsu_stbuf.scala 245:47] - node _T_1193 = bits(ld_fwddata_rpipe_hi, 7, 0) @[el2_lsu_stbuf.scala 245:70] - node _T_1194 = bits(stbuf_fwddata_hi_pre_m, 7, 0) @[el2_lsu_stbuf.scala 245:98] - node stbuf_fwdpipe1_hi = mux(_T_1192, _T_1193, _T_1194) @[el2_lsu_stbuf.scala 245:31] - node _T_1195 = bits(ld_byte_rhit_hi, 1, 1) @[el2_lsu_stbuf.scala 246:47] - node _T_1196 = bits(ld_fwddata_rpipe_hi, 15, 8) @[el2_lsu_stbuf.scala 246:70] - node _T_1197 = bits(stbuf_fwddata_hi_pre_m, 15, 8) @[el2_lsu_stbuf.scala 246:99] - node stbuf_fwdpipe2_hi = mux(_T_1195, _T_1196, _T_1197) @[el2_lsu_stbuf.scala 246:31] - node _T_1198 = bits(ld_byte_rhit_hi, 2, 2) @[el2_lsu_stbuf.scala 247:47] - node _T_1199 = bits(ld_fwddata_rpipe_hi, 23, 16) @[el2_lsu_stbuf.scala 247:70] - node _T_1200 = bits(stbuf_fwddata_hi_pre_m, 23, 16) @[el2_lsu_stbuf.scala 247:100] - node stbuf_fwdpipe3_hi = mux(_T_1198, _T_1199, _T_1200) @[el2_lsu_stbuf.scala 247:31] - node _T_1201 = bits(ld_byte_rhit_hi, 3, 3) @[el2_lsu_stbuf.scala 248:47] - node _T_1202 = bits(ld_fwddata_rpipe_hi, 31, 24) @[el2_lsu_stbuf.scala 248:70] - node _T_1203 = bits(stbuf_fwddata_hi_pre_m, 31, 24) @[el2_lsu_stbuf.scala 248:100] - node stbuf_fwdpipe4_hi = mux(_T_1201, _T_1202, _T_1203) @[el2_lsu_stbuf.scala 248:31] - node _T_1204 = cat(stbuf_fwdpipe2_hi, stbuf_fwdpipe1_hi) @[Cat.scala 29:58] - node _T_1205 = cat(stbuf_fwdpipe4_hi, stbuf_fwdpipe3_hi) @[Cat.scala 29:58] - node _T_1206 = cat(_T_1205, _T_1204) @[Cat.scala 29:58] - io.stbuf_fwddata_hi_m <= _T_1206 @[el2_lsu_stbuf.scala 249:26] - reg _T_1207 : UInt, io.lsu_stbuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] - when WrPtrEn : @[Reg.scala 28:19] - _T_1207 <= NxtWrPtr @[Reg.scala 28:23] - skip @[Reg.scala 28:19] - WrPtr <= _T_1207 @[el2_lsu_stbuf.scala 251:42] - reg _T_1208 : UInt, io.lsu_stbuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] - when RdPtrEn : @[Reg.scala 28:19] - _T_1208 <= NxtRdPtr @[Reg.scala 28:23] - skip @[Reg.scala 28:19] - RdPtr <= _T_1208 @[el2_lsu_stbuf.scala 252:42] + node _T_1150 = bits(io.store_data_lo_r, 7, 0) @[el2_lsu_stbuf.scala 243:74] + node _T_1151 = and(_T_1149, _T_1150) @[el2_lsu_stbuf.scala 243:54] + node _T_1152 = bits(ld_byte_rhit_hi_lo, 0, 0) @[el2_lsu_stbuf.scala 243:110] + node _T_1153 = bits(_T_1152, 0, 0) @[Bitwise.scala 72:15] + node _T_1154 = mux(_T_1153, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1155 = bits(io.store_data_hi_r, 7, 0) @[el2_lsu_stbuf.scala 243:135] + node _T_1156 = and(_T_1154, _T_1155) @[el2_lsu_stbuf.scala 243:115] + node fwdpipe1_lo = or(_T_1151, _T_1156) @[el2_lsu_stbuf.scala 243:81] + node _T_1157 = bits(ld_byte_rhit_lo_lo, 1, 1) @[el2_lsu_stbuf.scala 244:49] + node _T_1158 = bits(_T_1157, 0, 0) @[Bitwise.scala 72:15] + node _T_1159 = mux(_T_1158, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1160 = bits(io.store_data_lo_r, 15, 8) @[el2_lsu_stbuf.scala 244:74] + node _T_1161 = and(_T_1159, _T_1160) @[el2_lsu_stbuf.scala 244:54] + node _T_1162 = bits(ld_byte_rhit_hi_lo, 1, 1) @[el2_lsu_stbuf.scala 244:111] + node _T_1163 = bits(_T_1162, 0, 0) @[Bitwise.scala 72:15] + node _T_1164 = mux(_T_1163, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1165 = bits(io.store_data_hi_r, 15, 8) @[el2_lsu_stbuf.scala 244:136] + node _T_1166 = and(_T_1164, _T_1165) @[el2_lsu_stbuf.scala 244:116] + node fwdpipe2_lo = or(_T_1161, _T_1166) @[el2_lsu_stbuf.scala 244:82] + node _T_1167 = bits(ld_byte_rhit_lo_lo, 2, 2) @[el2_lsu_stbuf.scala 245:49] + node _T_1168 = bits(_T_1167, 0, 0) @[Bitwise.scala 72:15] + node _T_1169 = mux(_T_1168, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1170 = bits(io.store_data_lo_r, 23, 16) @[el2_lsu_stbuf.scala 245:74] + node _T_1171 = and(_T_1169, _T_1170) @[el2_lsu_stbuf.scala 245:54] + node _T_1172 = bits(ld_byte_rhit_hi_lo, 2, 2) @[el2_lsu_stbuf.scala 245:112] + node _T_1173 = bits(_T_1172, 0, 0) @[Bitwise.scala 72:15] + node _T_1174 = mux(_T_1173, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1175 = bits(io.store_data_hi_r, 23, 16) @[el2_lsu_stbuf.scala 245:137] + node _T_1176 = and(_T_1174, _T_1175) @[el2_lsu_stbuf.scala 245:117] + node fwdpipe3_lo = or(_T_1171, _T_1176) @[el2_lsu_stbuf.scala 245:83] + node _T_1177 = bits(ld_byte_rhit_lo_lo, 3, 3) @[el2_lsu_stbuf.scala 246:49] + node _T_1178 = bits(_T_1177, 0, 0) @[Bitwise.scala 72:15] + node _T_1179 = mux(_T_1178, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1180 = bits(io.store_data_lo_r, 31, 24) @[el2_lsu_stbuf.scala 246:74] + node _T_1181 = and(_T_1179, _T_1180) @[el2_lsu_stbuf.scala 246:54] + node _T_1182 = bits(ld_byte_rhit_hi_lo, 3, 3) @[el2_lsu_stbuf.scala 246:112] + node _T_1183 = bits(_T_1182, 0, 0) @[Bitwise.scala 72:15] + node _T_1184 = mux(_T_1183, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1185 = bits(io.store_data_hi_r, 31, 8) @[el2_lsu_stbuf.scala 246:137] + node _T_1186 = and(_T_1184, _T_1185) @[el2_lsu_stbuf.scala 246:117] + node fwdpipe4_lo = or(_T_1181, _T_1186) @[el2_lsu_stbuf.scala 246:83] + node _T_1187 = cat(fwdpipe2_lo, fwdpipe1_lo) @[Cat.scala 29:58] + node _T_1188 = cat(fwdpipe4_lo, fwdpipe3_lo) @[Cat.scala 29:58] + node _T_1189 = cat(_T_1188, _T_1187) @[Cat.scala 29:58] + ld_fwddata_rpipe_lo <= _T_1189 @[el2_lsu_stbuf.scala 247:24] + node _T_1190 = bits(ld_byte_rhit_lo_hi, 0, 0) @[el2_lsu_stbuf.scala 249:49] + node _T_1191 = bits(_T_1190, 0, 0) @[Bitwise.scala 72:15] + node _T_1192 = mux(_T_1191, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1193 = bits(io.store_data_lo_r, 7, 0) @[el2_lsu_stbuf.scala 249:74] + node _T_1194 = and(_T_1192, _T_1193) @[el2_lsu_stbuf.scala 249:54] + node _T_1195 = bits(ld_byte_rhit_hi_hi, 0, 0) @[el2_lsu_stbuf.scala 249:110] + node _T_1196 = bits(_T_1195, 0, 0) @[Bitwise.scala 72:15] + node _T_1197 = mux(_T_1196, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1198 = bits(io.store_data_hi_r, 7, 0) @[el2_lsu_stbuf.scala 249:135] + node _T_1199 = and(_T_1197, _T_1198) @[el2_lsu_stbuf.scala 249:115] + node fwdpipe1_hi = or(_T_1194, _T_1199) @[el2_lsu_stbuf.scala 249:81] + node _T_1200 = bits(ld_byte_rhit_lo_hi, 1, 1) @[el2_lsu_stbuf.scala 250:49] + node _T_1201 = bits(_T_1200, 0, 0) @[Bitwise.scala 72:15] + node _T_1202 = mux(_T_1201, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1203 = bits(io.store_data_lo_r, 15, 8) @[el2_lsu_stbuf.scala 250:74] + node _T_1204 = and(_T_1202, _T_1203) @[el2_lsu_stbuf.scala 250:54] + node _T_1205 = bits(ld_byte_rhit_hi_hi, 1, 1) @[el2_lsu_stbuf.scala 250:111] + node _T_1206 = bits(_T_1205, 0, 0) @[Bitwise.scala 72:15] + node _T_1207 = mux(_T_1206, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1208 = bits(io.store_data_hi_r, 15, 8) @[el2_lsu_stbuf.scala 250:136] + node _T_1209 = and(_T_1207, _T_1208) @[el2_lsu_stbuf.scala 250:116] + node fwdpipe2_hi = or(_T_1204, _T_1209) @[el2_lsu_stbuf.scala 250:82] + node _T_1210 = bits(ld_byte_rhit_lo_hi, 2, 2) @[el2_lsu_stbuf.scala 251:49] + node _T_1211 = bits(_T_1210, 0, 0) @[Bitwise.scala 72:15] + node _T_1212 = mux(_T_1211, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1213 = bits(io.store_data_lo_r, 23, 16) @[el2_lsu_stbuf.scala 251:74] + node _T_1214 = and(_T_1212, _T_1213) @[el2_lsu_stbuf.scala 251:54] + node _T_1215 = bits(ld_byte_rhit_hi_hi, 2, 2) @[el2_lsu_stbuf.scala 251:112] + node _T_1216 = bits(_T_1215, 0, 0) @[Bitwise.scala 72:15] + node _T_1217 = mux(_T_1216, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1218 = bits(io.store_data_hi_r, 23, 16) @[el2_lsu_stbuf.scala 251:137] + node _T_1219 = and(_T_1217, _T_1218) @[el2_lsu_stbuf.scala 251:117] + node fwdpipe3_hi = or(_T_1214, _T_1219) @[el2_lsu_stbuf.scala 251:83] + node _T_1220 = bits(ld_byte_rhit_lo_hi, 3, 3) @[el2_lsu_stbuf.scala 252:49] + node _T_1221 = bits(_T_1220, 0, 0) @[Bitwise.scala 72:15] + node _T_1222 = mux(_T_1221, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1223 = bits(io.store_data_lo_r, 31, 24) @[el2_lsu_stbuf.scala 252:74] + node _T_1224 = and(_T_1222, _T_1223) @[el2_lsu_stbuf.scala 252:54] + node _T_1225 = bits(ld_byte_rhit_hi_hi, 3, 3) @[el2_lsu_stbuf.scala 252:112] + node _T_1226 = bits(_T_1225, 0, 0) @[Bitwise.scala 72:15] + node _T_1227 = mux(_T_1226, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_1228 = bits(io.store_data_hi_r, 31, 8) @[el2_lsu_stbuf.scala 252:137] + node _T_1229 = and(_T_1227, _T_1228) @[el2_lsu_stbuf.scala 252:117] + node fwdpipe4_hi = or(_T_1224, _T_1229) @[el2_lsu_stbuf.scala 252:83] + node _T_1230 = cat(fwdpipe2_hi, fwdpipe1_hi) @[Cat.scala 29:58] + node _T_1231 = cat(fwdpipe4_hi, fwdpipe3_hi) @[Cat.scala 29:58] + node _T_1232 = cat(_T_1231, _T_1230) @[Cat.scala 29:58] + ld_fwddata_rpipe_hi <= _T_1232 @[el2_lsu_stbuf.scala 253:24] + node _T_1233 = bits(ld_byte_rhit_lo_lo, 0, 0) @[el2_lsu_stbuf.scala 255:74] + node _T_1234 = bits(ld_byte_rhit_hi_lo, 0, 0) @[el2_lsu_stbuf.scala 255:98] + node _T_1235 = or(_T_1233, _T_1234) @[el2_lsu_stbuf.scala 255:78] + node _T_1236 = bits(ld_byte_rhit_lo_lo, 1, 1) @[el2_lsu_stbuf.scala 255:74] + node _T_1237 = bits(ld_byte_rhit_hi_lo, 1, 1) @[el2_lsu_stbuf.scala 255:98] + node _T_1238 = or(_T_1236, _T_1237) @[el2_lsu_stbuf.scala 255:78] + node _T_1239 = bits(ld_byte_rhit_lo_lo, 2, 2) @[el2_lsu_stbuf.scala 255:74] + node _T_1240 = bits(ld_byte_rhit_hi_lo, 2, 2) @[el2_lsu_stbuf.scala 255:98] + node _T_1241 = or(_T_1239, _T_1240) @[el2_lsu_stbuf.scala 255:78] + node _T_1242 = bits(ld_byte_rhit_lo_lo, 3, 3) @[el2_lsu_stbuf.scala 255:74] + node _T_1243 = bits(ld_byte_rhit_hi_lo, 3, 3) @[el2_lsu_stbuf.scala 255:98] + node _T_1244 = or(_T_1242, _T_1243) @[el2_lsu_stbuf.scala 255:78] + node _T_1245 = cat(_T_1244, _T_1241) @[Cat.scala 29:58] + node _T_1246 = cat(_T_1245, _T_1238) @[Cat.scala 29:58] + node _T_1247 = cat(_T_1246, _T_1235) @[Cat.scala 29:58] + ld_byte_hit_lo <= _T_1247 @[el2_lsu_stbuf.scala 255:18] + node _T_1248 = bits(ld_byte_rhit_lo_hi, 0, 0) @[el2_lsu_stbuf.scala 256:74] + node _T_1249 = bits(ld_byte_rhit_hi_hi, 0, 0) @[el2_lsu_stbuf.scala 256:98] + node _T_1250 = or(_T_1248, _T_1249) @[el2_lsu_stbuf.scala 256:78] + node _T_1251 = bits(ld_byte_rhit_lo_hi, 1, 1) @[el2_lsu_stbuf.scala 256:74] + node _T_1252 = bits(ld_byte_rhit_hi_hi, 1, 1) @[el2_lsu_stbuf.scala 256:98] + node _T_1253 = or(_T_1251, _T_1252) @[el2_lsu_stbuf.scala 256:78] + node _T_1254 = bits(ld_byte_rhit_lo_hi, 2, 2) @[el2_lsu_stbuf.scala 256:74] + node _T_1255 = bits(ld_byte_rhit_hi_hi, 2, 2) @[el2_lsu_stbuf.scala 256:98] + node _T_1256 = or(_T_1254, _T_1255) @[el2_lsu_stbuf.scala 256:78] + node _T_1257 = bits(ld_byte_rhit_lo_hi, 3, 3) @[el2_lsu_stbuf.scala 256:74] + node _T_1258 = bits(ld_byte_rhit_hi_hi, 3, 3) @[el2_lsu_stbuf.scala 256:98] + node _T_1259 = or(_T_1257, _T_1258) @[el2_lsu_stbuf.scala 256:78] + node _T_1260 = cat(_T_1259, _T_1256) @[Cat.scala 29:58] + node _T_1261 = cat(_T_1260, _T_1253) @[Cat.scala 29:58] + node _T_1262 = cat(_T_1261, _T_1250) @[Cat.scala 29:58] + ld_byte_hit_hi <= _T_1262 @[el2_lsu_stbuf.scala 256:18] + node _T_1263 = bits(ld_byte_hit_hi, 0, 0) @[el2_lsu_stbuf.scala 258:80] + node _T_1264 = or(_T_1263, stbuf_fwdbyteen_hi_pre_m_0) @[el2_lsu_stbuf.scala 258:84] + node _T_1265 = bits(ld_byte_hit_hi, 1, 1) @[el2_lsu_stbuf.scala 258:80] + node _T_1266 = or(_T_1265, stbuf_fwdbyteen_hi_pre_m_1) @[el2_lsu_stbuf.scala 258:84] + node _T_1267 = bits(ld_byte_hit_hi, 2, 2) @[el2_lsu_stbuf.scala 258:80] + node _T_1268 = or(_T_1267, stbuf_fwdbyteen_hi_pre_m_2) @[el2_lsu_stbuf.scala 258:84] + node _T_1269 = bits(ld_byte_hit_hi, 3, 3) @[el2_lsu_stbuf.scala 258:80] + node _T_1270 = or(_T_1269, stbuf_fwdbyteen_hi_pre_m_3) @[el2_lsu_stbuf.scala 258:84] + node _T_1271 = cat(_T_1270, _T_1268) @[Cat.scala 29:58] + node _T_1272 = cat(_T_1271, _T_1266) @[Cat.scala 29:58] + node _T_1273 = cat(_T_1272, _T_1264) @[Cat.scala 29:58] + io.stbuf_fwdbyteen_hi_m <= _T_1273 @[el2_lsu_stbuf.scala 258:28] + node _T_1274 = bits(ld_byte_hit_lo, 0, 0) @[el2_lsu_stbuf.scala 259:80] + node _T_1275 = or(_T_1274, stbuf_fwdbyteen_lo_pre_m_0) @[el2_lsu_stbuf.scala 259:84] + node _T_1276 = bits(ld_byte_hit_lo, 1, 1) @[el2_lsu_stbuf.scala 259:80] + node _T_1277 = or(_T_1276, stbuf_fwdbyteen_lo_pre_m_1) @[el2_lsu_stbuf.scala 259:84] + node _T_1278 = bits(ld_byte_hit_lo, 2, 2) @[el2_lsu_stbuf.scala 259:80] + node _T_1279 = or(_T_1278, stbuf_fwdbyteen_lo_pre_m_2) @[el2_lsu_stbuf.scala 259:84] + node _T_1280 = bits(ld_byte_hit_lo, 3, 3) @[el2_lsu_stbuf.scala 259:80] + node _T_1281 = or(_T_1280, stbuf_fwdbyteen_lo_pre_m_3) @[el2_lsu_stbuf.scala 259:84] + node _T_1282 = cat(_T_1281, _T_1279) @[Cat.scala 29:58] + node _T_1283 = cat(_T_1282, _T_1277) @[Cat.scala 29:58] + node _T_1284 = cat(_T_1283, _T_1275) @[Cat.scala 29:58] + io.stbuf_fwdbyteen_lo_m <= _T_1284 @[el2_lsu_stbuf.scala 259:28] + node _T_1285 = bits(ld_byte_rhit_lo, 0, 0) @[el2_lsu_stbuf.scala 262:47] + node _T_1286 = bits(ld_fwddata_rpipe_lo, 7, 0) @[el2_lsu_stbuf.scala 262:70] + node _T_1287 = bits(stbuf_fwddata_lo_pre_m, 7, 0) @[el2_lsu_stbuf.scala 262:98] + node stbuf_fwdpipe1_lo = mux(_T_1285, _T_1286, _T_1287) @[el2_lsu_stbuf.scala 262:31] + node _T_1288 = bits(ld_byte_rhit_lo, 1, 1) @[el2_lsu_stbuf.scala 263:47] + node _T_1289 = bits(ld_fwddata_rpipe_lo, 15, 8) @[el2_lsu_stbuf.scala 263:70] + node _T_1290 = bits(stbuf_fwddata_lo_pre_m, 15, 8) @[el2_lsu_stbuf.scala 263:99] + node stbuf_fwdpipe2_lo = mux(_T_1288, _T_1289, _T_1290) @[el2_lsu_stbuf.scala 263:31] + node _T_1291 = bits(ld_byte_rhit_lo, 2, 2) @[el2_lsu_stbuf.scala 264:47] + node _T_1292 = bits(ld_fwddata_rpipe_lo, 23, 16) @[el2_lsu_stbuf.scala 264:70] + node _T_1293 = bits(stbuf_fwddata_lo_pre_m, 23, 16) @[el2_lsu_stbuf.scala 264:100] + node stbuf_fwdpipe3_lo = mux(_T_1291, _T_1292, _T_1293) @[el2_lsu_stbuf.scala 264:31] + node _T_1294 = bits(ld_byte_rhit_lo, 3, 3) @[el2_lsu_stbuf.scala 265:47] + node _T_1295 = bits(ld_fwddata_rpipe_lo, 31, 24) @[el2_lsu_stbuf.scala 265:70] + node _T_1296 = bits(stbuf_fwddata_lo_pre_m, 31, 24) @[el2_lsu_stbuf.scala 265:100] + node stbuf_fwdpipe4_lo = mux(_T_1294, _T_1295, _T_1296) @[el2_lsu_stbuf.scala 265:31] + node _T_1297 = cat(stbuf_fwdpipe2_lo, stbuf_fwdpipe1_lo) @[Cat.scala 29:58] + node _T_1298 = cat(stbuf_fwdpipe4_lo, stbuf_fwdpipe3_lo) @[Cat.scala 29:58] + node _T_1299 = cat(_T_1298, _T_1297) @[Cat.scala 29:58] + io.stbuf_fwddata_lo_m <= _T_1299 @[el2_lsu_stbuf.scala 266:26] + node _T_1300 = bits(ld_byte_rhit_hi, 0, 0) @[el2_lsu_stbuf.scala 268:47] + node _T_1301 = bits(ld_fwddata_rpipe_hi, 7, 0) @[el2_lsu_stbuf.scala 268:70] + node _T_1302 = bits(stbuf_fwddata_hi_pre_m, 7, 0) @[el2_lsu_stbuf.scala 268:98] + node stbuf_fwdpipe1_hi = mux(_T_1300, _T_1301, _T_1302) @[el2_lsu_stbuf.scala 268:31] + node _T_1303 = bits(ld_byte_rhit_hi, 1, 1) @[el2_lsu_stbuf.scala 269:47] + node _T_1304 = bits(ld_fwddata_rpipe_hi, 15, 8) @[el2_lsu_stbuf.scala 269:70] + node _T_1305 = bits(stbuf_fwddata_hi_pre_m, 15, 8) @[el2_lsu_stbuf.scala 269:99] + node stbuf_fwdpipe2_hi = mux(_T_1303, _T_1304, _T_1305) @[el2_lsu_stbuf.scala 269:31] + node _T_1306 = bits(ld_byte_rhit_hi, 2, 2) @[el2_lsu_stbuf.scala 270:47] + node _T_1307 = bits(ld_fwddata_rpipe_hi, 23, 16) @[el2_lsu_stbuf.scala 270:70] + node _T_1308 = bits(stbuf_fwddata_hi_pre_m, 23, 16) @[el2_lsu_stbuf.scala 270:100] + node stbuf_fwdpipe3_hi = mux(_T_1306, _T_1307, _T_1308) @[el2_lsu_stbuf.scala 270:31] + node _T_1309 = bits(ld_byte_rhit_hi, 3, 3) @[el2_lsu_stbuf.scala 271:47] + node _T_1310 = bits(ld_fwddata_rpipe_hi, 31, 24) @[el2_lsu_stbuf.scala 271:70] + node _T_1311 = bits(stbuf_fwddata_hi_pre_m, 31, 24) @[el2_lsu_stbuf.scala 271:100] + node stbuf_fwdpipe4_hi = mux(_T_1309, _T_1310, _T_1311) @[el2_lsu_stbuf.scala 271:31] + node _T_1312 = cat(stbuf_fwdpipe2_hi, stbuf_fwdpipe1_hi) @[Cat.scala 29:58] + node _T_1313 = cat(stbuf_fwdpipe4_hi, stbuf_fwdpipe3_hi) @[Cat.scala 29:58] + node _T_1314 = cat(_T_1313, _T_1312) @[Cat.scala 29:58] + io.stbuf_fwddata_hi_m <= _T_1314 @[el2_lsu_stbuf.scala 272:26] diff --git a/el2_lsu_stbuf.v b/el2_lsu_stbuf.v index eee2ef95..3f00857c 100644 --- a/el2_lsu_stbuf.v +++ b/el2_lsu_stbuf.v @@ -85,567 +85,654 @@ module el2_lsu_stbuf( reg [31:0] _RAND_20; reg [31:0] _RAND_21; reg [31:0] _RAND_22; + reg [31:0] _RAND_23; `endif // RANDOMIZE_REG_INIT - wire [7:0] _T_1 = io_lsu_pkt_r_by ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] - wire [7:0] _T_2 = _T_1 & 8'h1; // @[el2_lsu_stbuf.scala 108:49] - wire [7:0] _T_4 = io_lsu_pkt_r_half ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] - wire [7:0] _T_5 = _T_4 & 8'h3; // @[el2_lsu_stbuf.scala 109:32] - wire [7:0] _T_6 = _T_2 | _T_5; // @[el2_lsu_stbuf.scala 108:65] - wire [7:0] _T_8 = io_lsu_pkt_r_word ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] - wire [7:0] _T_9 = _T_8 & 8'hf; // @[el2_lsu_stbuf.scala 110:32] - wire [7:0] _T_10 = _T_6 | _T_9; // @[el2_lsu_stbuf.scala 109:48] - wire [7:0] _T_12 = io_lsu_pkt_r_dword ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] - wire [7:0] ldst_byteen_r = _T_10 | _T_12; // @[el2_lsu_stbuf.scala 110:48] - wire ldst_dual_d = io_lsu_addr_d[2] != io_end_addr_d[2]; // @[el2_lsu_stbuf.scala 112:40] - reg ldst_dual_r; // @[el2_lsu_stbuf.scala 161:53] - wire dual_stbuf_write_r = ldst_dual_r & io_store_stbuf_reqvld_r; // @[el2_lsu_stbuf.scala 113:41] - wire [10:0] _GEN_38 = {{3'd0}, ldst_byteen_r}; // @[el2_lsu_stbuf.scala 115:40] - wire [10:0] _T_17 = _GEN_38 << io_lsu_addr_r[1:0]; // @[el2_lsu_stbuf.scala 115:40] - wire [7:0] store_byteen_ext_r = _T_17[7:0]; // @[el2_lsu_stbuf.scala 115:23] - wire [3:0] _T_20 = io_lsu_pkt_m_store ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] - wire [3:0] store_byteen_hi_r = store_byteen_ext_r[7:4] & _T_20; // @[el2_lsu_stbuf.scala 116:53] - wire [3:0] store_byteen_lo_r = store_byteen_ext_r[3:0] & _T_20; // @[el2_lsu_stbuf.scala 117:53] + wire [1:0] _T_5 = io_lsu_pkt_r_half ? 2'h3 : 2'h0; // @[Mux.scala 27:72] + wire [3:0] _T_6 = io_lsu_pkt_r_word ? 4'hf : 4'h0; // @[Mux.scala 27:72] + wire [7:0] _T_7 = io_lsu_pkt_r_dword ? 8'hff : 8'h0; // @[Mux.scala 27:72] + wire [1:0] _GEN_18 = {{1'd0}, io_lsu_pkt_r_by}; // @[Mux.scala 27:72] + wire [1:0] _T_8 = _GEN_18 | _T_5; // @[Mux.scala 27:72] + wire [3:0] _GEN_19 = {{2'd0}, _T_8}; // @[Mux.scala 27:72] + wire [3:0] _T_9 = _GEN_19 | _T_6; // @[Mux.scala 27:72] + wire [7:0] _GEN_20 = {{4'd0}, _T_9}; // @[Mux.scala 27:72] + wire [7:0] ldst_byteen_r = _GEN_20 | _T_7; // @[Mux.scala 27:72] + wire ldst_dual_d = io_lsu_addr_d[2] != io_end_addr_d[2]; // @[el2_lsu_stbuf.scala 118:40] + reg ldst_dual_r; // @[el2_lsu_stbuf.scala 177:53] + wire dual_stbuf_write_r = ldst_dual_r & io_store_stbuf_reqvld_r; // @[el2_lsu_stbuf.scala 119:41] + wire [10:0] _GEN_21 = {{3'd0}, ldst_byteen_r}; // @[el2_lsu_stbuf.scala 121:40] + wire [10:0] _T_14 = _GEN_21 << io_lsu_addr_r[1:0]; // @[el2_lsu_stbuf.scala 121:40] + wire [7:0] store_byteen_ext_r = _T_14[7:0]; // @[el2_lsu_stbuf.scala 121:23] + wire [3:0] _T_17 = io_lsu_pkt_r_store ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] + wire [3:0] store_byteen_hi_r = store_byteen_ext_r[7:4] & _T_17; // @[el2_lsu_stbuf.scala 122:52] + wire [3:0] store_byteen_lo_r = store_byteen_ext_r[3:0] & _T_17; // @[el2_lsu_stbuf.scala 123:52] reg [1:0] RdPtr; // @[Reg.scala 27:20] - wire [1:0] NxtRdPtr = RdPtr + 2'h1; // @[el2_lsu_stbuf.scala 118:27] + wire [1:0] RdPtrPlus1 = RdPtr + 2'h1; // @[el2_lsu_stbuf.scala 125:27] + reg [1:0] WrPtr; // @[Reg.scala 27:20] + wire [1:0] WrPtrPlus1 = WrPtr + 2'h1; // @[el2_lsu_stbuf.scala 126:27] + wire [1:0] WrPtrPlus2 = WrPtr + 2'h2; // @[el2_lsu_stbuf.scala 127:27] reg [15:0] stbuf_addr_0; // @[Reg.scala 27:20] - wire _T_30 = stbuf_addr_0[15:2] == io_lsu_addr_r[15:2]; // @[el2_lsu_stbuf.scala 124:121] - reg stbuf_vld_0; // @[Reg.scala 27:20] - wire _T_31 = _T_30 & stbuf_vld_0; // @[el2_lsu_stbuf.scala 124:181] - reg stbuf_dma_kill_0; // @[Reg.scala 27:20] - wire _T_32 = ~stbuf_dma_kill_0; // @[el2_lsu_stbuf.scala 124:198] - wire _T_33 = _T_31 & _T_32; // @[el2_lsu_stbuf.scala 124:196] - wire _T_184 = io_lsu_stbuf_commit_any | io_stbuf_reqvld_flushed_any; // @[el2_lsu_stbuf.scala 132:78] + wire _T_27 = stbuf_addr_0[15:2] == io_lsu_addr_r[15:2]; // @[el2_lsu_stbuf.scala 131:120] + reg _T_588; // @[el2_lsu_stbuf.scala 164:88] + reg _T_580; // @[el2_lsu_stbuf.scala 164:88] + reg _T_572; // @[el2_lsu_stbuf.scala 164:88] + reg _T_564; // @[el2_lsu_stbuf.scala 164:88] + wire [3:0] stbuf_vld = {_T_588,_T_580,_T_572,_T_564}; // @[Cat.scala 29:58] + wire _T_29 = _T_27 & stbuf_vld[0]; // @[el2_lsu_stbuf.scala 131:179] + reg _T_623; // @[el2_lsu_stbuf.scala 166:62] + reg _T_615; // @[el2_lsu_stbuf.scala 166:62] + reg _T_607; // @[el2_lsu_stbuf.scala 166:62] + reg _T_599; // @[el2_lsu_stbuf.scala 166:62] + wire [3:0] stbuf_dma_kill = {_T_623,_T_615,_T_607,_T_599}; // @[Cat.scala 29:58] + wire _T_31 = ~stbuf_dma_kill[0]; // @[el2_lsu_stbuf.scala 131:197] + wire _T_32 = _T_29 & _T_31; // @[el2_lsu_stbuf.scala 131:195] + wire _T_212 = io_lsu_stbuf_commit_any | io_stbuf_reqvld_flushed_any; // @[el2_lsu_stbuf.scala 142:78] + wire _T_213 = 2'h3 == RdPtr; // @[el2_lsu_stbuf.scala 142:121] + wire _T_215 = _T_212 & _T_213; // @[el2_lsu_stbuf.scala 142:109] + wire _T_209 = 2'h2 == RdPtr; // @[el2_lsu_stbuf.scala 142:121] + wire _T_211 = _T_212 & _T_209; // @[el2_lsu_stbuf.scala 142:109] + wire _T_205 = 2'h1 == RdPtr; // @[el2_lsu_stbuf.scala 142:121] + wire _T_207 = _T_212 & _T_205; // @[el2_lsu_stbuf.scala 142:109] + wire _T_201 = 2'h0 == RdPtr; // @[el2_lsu_stbuf.scala 142:121] + wire _T_203 = _T_212 & _T_201; // @[el2_lsu_stbuf.scala 142:109] + wire [3:0] stbuf_reset = {_T_215,_T_211,_T_207,_T_203}; // @[Cat.scala 29:58] + wire _T_34 = ~stbuf_reset[0]; // @[el2_lsu_stbuf.scala 131:218] + wire _T_35 = _T_32 & _T_34; // @[el2_lsu_stbuf.scala 131:216] reg [15:0] stbuf_addr_1; // @[Reg.scala 27:20] - wire _T_39 = stbuf_addr_1[15:2] == io_lsu_addr_r[15:2]; // @[el2_lsu_stbuf.scala 124:121] - reg stbuf_vld_1; // @[Reg.scala 27:20] - wire _T_40 = _T_39 & stbuf_vld_1; // @[el2_lsu_stbuf.scala 124:181] - reg stbuf_dma_kill_1; // @[Reg.scala 27:20] - wire _T_41 = ~stbuf_dma_kill_1; // @[el2_lsu_stbuf.scala 124:198] - wire _T_42 = _T_40 & _T_41; // @[el2_lsu_stbuf.scala 124:196] + wire _T_38 = stbuf_addr_1[15:2] == io_lsu_addr_r[15:2]; // @[el2_lsu_stbuf.scala 131:120] + wire _T_40 = _T_38 & stbuf_vld[1]; // @[el2_lsu_stbuf.scala 131:179] + wire _T_42 = ~stbuf_dma_kill[1]; // @[el2_lsu_stbuf.scala 131:197] + wire _T_43 = _T_40 & _T_42; // @[el2_lsu_stbuf.scala 131:195] + wire _T_45 = ~stbuf_reset[1]; // @[el2_lsu_stbuf.scala 131:218] + wire _T_46 = _T_43 & _T_45; // @[el2_lsu_stbuf.scala 131:216] reg [15:0] stbuf_addr_2; // @[Reg.scala 27:20] - wire _T_48 = stbuf_addr_2[15:2] == io_lsu_addr_r[15:2]; // @[el2_lsu_stbuf.scala 124:121] - reg stbuf_vld_2; // @[Reg.scala 27:20] - wire _T_49 = _T_48 & stbuf_vld_2; // @[el2_lsu_stbuf.scala 124:181] - reg stbuf_dma_kill_2; // @[Reg.scala 27:20] - wire _T_50 = ~stbuf_dma_kill_2; // @[el2_lsu_stbuf.scala 124:198] - wire _T_51 = _T_49 & _T_50; // @[el2_lsu_stbuf.scala 124:196] + wire _T_49 = stbuf_addr_2[15:2] == io_lsu_addr_r[15:2]; // @[el2_lsu_stbuf.scala 131:120] + wire _T_51 = _T_49 & stbuf_vld[2]; // @[el2_lsu_stbuf.scala 131:179] + wire _T_53 = ~stbuf_dma_kill[2]; // @[el2_lsu_stbuf.scala 131:197] + wire _T_54 = _T_51 & _T_53; // @[el2_lsu_stbuf.scala 131:195] + wire _T_56 = ~stbuf_reset[2]; // @[el2_lsu_stbuf.scala 131:218] + wire _T_57 = _T_54 & _T_56; // @[el2_lsu_stbuf.scala 131:216] reg [15:0] stbuf_addr_3; // @[Reg.scala 27:20] - wire _T_57 = stbuf_addr_3[15:2] == io_lsu_addr_r[15:2]; // @[el2_lsu_stbuf.scala 124:121] - reg stbuf_vld_3; // @[Reg.scala 27:20] - wire _T_58 = _T_57 & stbuf_vld_3; // @[el2_lsu_stbuf.scala 124:181] - reg stbuf_dma_kill_3; // @[Reg.scala 27:20] - wire _T_59 = ~stbuf_dma_kill_3; // @[el2_lsu_stbuf.scala 124:198] - wire _T_60 = _T_58 & _T_59; // @[el2_lsu_stbuf.scala 124:196] - wire [3:0] store_matchvec_lo_r = {_T_60,_T_51,_T_42,_T_33}; // @[Cat.scala 29:58] - wire _T_68 = stbuf_addr_0[15:2] == io_end_addr_r[15:2]; // @[el2_lsu_stbuf.scala 125:121] - wire _T_69 = _T_68 & stbuf_vld_0; // @[el2_lsu_stbuf.scala 125:181] - wire _T_71 = _T_69 & _T_32; // @[el2_lsu_stbuf.scala 125:196] - wire _T_72 = _T_71 & dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 125:217] - wire _T_78 = stbuf_addr_1[15:2] == io_end_addr_r[15:2]; // @[el2_lsu_stbuf.scala 125:121] - wire _T_79 = _T_78 & stbuf_vld_1; // @[el2_lsu_stbuf.scala 125:181] - wire _T_81 = _T_79 & _T_41; // @[el2_lsu_stbuf.scala 125:196] - wire _T_82 = _T_81 & dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 125:217] - wire _T_88 = stbuf_addr_2[15:2] == io_end_addr_r[15:2]; // @[el2_lsu_stbuf.scala 125:121] - wire _T_89 = _T_88 & stbuf_vld_2; // @[el2_lsu_stbuf.scala 125:181] - wire _T_91 = _T_89 & _T_50; // @[el2_lsu_stbuf.scala 125:196] - wire _T_92 = _T_91 & dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 125:217] - wire _T_98 = stbuf_addr_3[15:2] == io_end_addr_r[15:2]; // @[el2_lsu_stbuf.scala 125:121] - wire _T_99 = _T_98 & stbuf_vld_3; // @[el2_lsu_stbuf.scala 125:181] - wire _T_101 = _T_99 & _T_59; // @[el2_lsu_stbuf.scala 125:196] - wire _T_102 = _T_101 & dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 125:217] - wire [3:0] store_matchvec_hi_r = {_T_102,_T_92,_T_82,_T_72}; // @[Cat.scala 29:58] - wire _T_124 = store_matchvec_lo_r[0] | store_matchvec_hi_r[0]; // @[el2_lsu_stbuf.scala 131:126] - wire _T_141 = store_matchvec_lo_r[1] | store_matchvec_hi_r[1]; // @[el2_lsu_stbuf.scala 131:126] - wire _T_158 = store_matchvec_lo_r[2] | store_matchvec_hi_r[2]; // @[el2_lsu_stbuf.scala 131:126] - wire _T_175 = store_matchvec_lo_r[3] | store_matchvec_hi_r[3]; // @[el2_lsu_stbuf.scala 131:126] - wire [3:0] stbuf_wr_en = {_T_175,_T_158,_T_141,_T_124}; // @[Cat.scala 29:58] - wire [3:0] sel_lo = {store_matchvec_lo_r[3],store_matchvec_lo_r[2],store_matchvec_lo_r[1],store_matchvec_lo_r[0]}; // @[Cat.scala 29:58] - wire [31:0] _T_220 = sel_lo[0] ? io_lsu_addr_r : io_end_addr_r; // @[el2_lsu_stbuf.scala 135:57] - wire [31:0] _T_222 = sel_lo[1] ? io_lsu_addr_r : io_end_addr_r; // @[el2_lsu_stbuf.scala 135:57] - wire [31:0] _T_224 = sel_lo[2] ? io_lsu_addr_r : io_end_addr_r; // @[el2_lsu_stbuf.scala 135:57] - wire [31:0] _T_226 = sel_lo[3] ? io_lsu_addr_r : io_end_addr_r; // @[el2_lsu_stbuf.scala 135:57] - reg [3:0] stbuf_byteen_0; // @[Reg.scala 27:20] - wire [3:0] _T_228 = stbuf_byteen_0 | store_byteen_lo_r; // @[el2_lsu_stbuf.scala 136:87] - wire [3:0] _T_229 = stbuf_byteen_0 | store_byteen_hi_r; // @[el2_lsu_stbuf.scala 136:124] - reg [3:0] stbuf_byteen_1; // @[Reg.scala 27:20] - wire [3:0] _T_232 = stbuf_byteen_1 | store_byteen_lo_r; // @[el2_lsu_stbuf.scala 136:87] - wire [3:0] _T_233 = stbuf_byteen_1 | store_byteen_hi_r; // @[el2_lsu_stbuf.scala 136:124] - reg [3:0] stbuf_byteen_2; // @[Reg.scala 27:20] - wire [3:0] _T_236 = stbuf_byteen_2 | store_byteen_lo_r; // @[el2_lsu_stbuf.scala 136:87] - wire [3:0] _T_237 = stbuf_byteen_2 | store_byteen_hi_r; // @[el2_lsu_stbuf.scala 136:124] - reg [3:0] stbuf_byteen_3; // @[Reg.scala 27:20] - wire [3:0] _T_240 = stbuf_byteen_3 | store_byteen_lo_r; // @[el2_lsu_stbuf.scala 136:87] - wire [3:0] _T_241 = stbuf_byteen_3 | store_byteen_hi_r; // @[el2_lsu_stbuf.scala 136:124] - wire _T_245 = ~stbuf_byteen_0[0]; // @[el2_lsu_stbuf.scala 138:68] - wire _T_247 = _T_245 | store_byteen_lo_r[0]; // @[el2_lsu_stbuf.scala 138:88] + wire _T_60 = stbuf_addr_3[15:2] == io_lsu_addr_r[15:2]; // @[el2_lsu_stbuf.scala 131:120] + wire _T_62 = _T_60 & stbuf_vld[3]; // @[el2_lsu_stbuf.scala 131:179] + wire _T_64 = ~stbuf_dma_kill[3]; // @[el2_lsu_stbuf.scala 131:197] + wire _T_65 = _T_62 & _T_64; // @[el2_lsu_stbuf.scala 131:195] + wire _T_67 = ~stbuf_reset[3]; // @[el2_lsu_stbuf.scala 131:218] + wire _T_68 = _T_65 & _T_67; // @[el2_lsu_stbuf.scala 131:216] + wire [3:0] store_matchvec_lo_r = {_T_68,_T_57,_T_46,_T_35}; // @[Cat.scala 29:58] + wire _T_73 = stbuf_addr_0[15:2] == io_end_addr_r[15:2]; // @[el2_lsu_stbuf.scala 132:120] + wire _T_75 = _T_73 & stbuf_vld[0]; // @[el2_lsu_stbuf.scala 132:179] + wire _T_78 = _T_75 & _T_31; // @[el2_lsu_stbuf.scala 132:194] + wire _T_79 = _T_78 & dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 132:215] + wire _T_82 = _T_79 & _T_34; // @[el2_lsu_stbuf.scala 132:236] + wire _T_85 = stbuf_addr_1[15:2] == io_end_addr_r[15:2]; // @[el2_lsu_stbuf.scala 132:120] + wire _T_87 = _T_85 & stbuf_vld[1]; // @[el2_lsu_stbuf.scala 132:179] + wire _T_90 = _T_87 & _T_42; // @[el2_lsu_stbuf.scala 132:194] + wire _T_91 = _T_90 & dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 132:215] + wire _T_94 = _T_91 & _T_45; // @[el2_lsu_stbuf.scala 132:236] + wire _T_97 = stbuf_addr_2[15:2] == io_end_addr_r[15:2]; // @[el2_lsu_stbuf.scala 132:120] + wire _T_99 = _T_97 & stbuf_vld[2]; // @[el2_lsu_stbuf.scala 132:179] + wire _T_102 = _T_99 & _T_53; // @[el2_lsu_stbuf.scala 132:194] + wire _T_103 = _T_102 & dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 132:215] + wire _T_106 = _T_103 & _T_56; // @[el2_lsu_stbuf.scala 132:236] + wire _T_109 = stbuf_addr_3[15:2] == io_end_addr_r[15:2]; // @[el2_lsu_stbuf.scala 132:120] + wire _T_111 = _T_109 & stbuf_vld[3]; // @[el2_lsu_stbuf.scala 132:179] + wire _T_114 = _T_111 & _T_64; // @[el2_lsu_stbuf.scala 132:194] + wire _T_115 = _T_114 & dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 132:215] + wire _T_118 = _T_115 & _T_67; // @[el2_lsu_stbuf.scala 132:236] + wire [3:0] store_matchvec_hi_r = {_T_118,_T_106,_T_94,_T_82}; // @[Cat.scala 29:58] + wire store_coalesce_lo_r = |store_matchvec_lo_r; // @[el2_lsu_stbuf.scala 134:50] + wire store_coalesce_hi_r = |store_matchvec_hi_r; // @[el2_lsu_stbuf.scala 135:50] + wire _T_121 = 2'h0 == WrPtr; // @[el2_lsu_stbuf.scala 138:64] + wire _T_122 = ~store_coalesce_lo_r; // @[el2_lsu_stbuf.scala 138:77] + wire _T_123 = _T_121 & _T_122; // @[el2_lsu_stbuf.scala 138:75] + wire _T_125 = _T_121 & dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 139:75] + wire _T_126 = ~store_coalesce_hi_r; // @[el2_lsu_stbuf.scala 139:98] + wire _T_127 = _T_125 & _T_126; // @[el2_lsu_stbuf.scala 139:96] + wire _T_128 = _T_123 | _T_127; // @[el2_lsu_stbuf.scala 138:99] + wire _T_129 = 2'h0 == WrPtrPlus1; // @[el2_lsu_stbuf.scala 140:64] + wire _T_130 = _T_129 & dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 140:80] + wire _T_131 = store_coalesce_lo_r | store_coalesce_hi_r; // @[el2_lsu_stbuf.scala 140:125] + wire _T_132 = ~_T_131; // @[el2_lsu_stbuf.scala 140:103] + wire _T_133 = _T_130 & _T_132; // @[el2_lsu_stbuf.scala 140:101] + wire _T_134 = _T_128 | _T_133; // @[el2_lsu_stbuf.scala 139:120] + wire _T_136 = _T_134 | store_matchvec_lo_r[0]; // @[el2_lsu_stbuf.scala 140:149] + wire _T_138 = _T_136 | store_matchvec_hi_r[0]; // @[el2_lsu_stbuf.scala 141:76] + wire _T_139 = io_ldst_stbuf_reqvld_r & _T_138; // @[el2_lsu_stbuf.scala 137:77] + wire _T_140 = 2'h1 == WrPtr; // @[el2_lsu_stbuf.scala 138:64] + wire _T_142 = _T_140 & _T_122; // @[el2_lsu_stbuf.scala 138:75] + wire _T_144 = _T_140 & dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 139:75] + wire _T_146 = _T_144 & _T_126; // @[el2_lsu_stbuf.scala 139:96] + wire _T_147 = _T_142 | _T_146; // @[el2_lsu_stbuf.scala 138:99] + wire _T_148 = 2'h1 == WrPtrPlus1; // @[el2_lsu_stbuf.scala 140:64] + wire _T_149 = _T_148 & dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 140:80] + wire _T_152 = _T_149 & _T_132; // @[el2_lsu_stbuf.scala 140:101] + wire _T_153 = _T_147 | _T_152; // @[el2_lsu_stbuf.scala 139:120] + wire _T_155 = _T_153 | store_matchvec_lo_r[1]; // @[el2_lsu_stbuf.scala 140:149] + wire _T_157 = _T_155 | store_matchvec_hi_r[1]; // @[el2_lsu_stbuf.scala 141:76] + wire _T_158 = io_ldst_stbuf_reqvld_r & _T_157; // @[el2_lsu_stbuf.scala 137:77] + wire _T_159 = 2'h2 == WrPtr; // @[el2_lsu_stbuf.scala 138:64] + wire _T_161 = _T_159 & _T_122; // @[el2_lsu_stbuf.scala 138:75] + wire _T_163 = _T_159 & dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 139:75] + wire _T_165 = _T_163 & _T_126; // @[el2_lsu_stbuf.scala 139:96] + wire _T_166 = _T_161 | _T_165; // @[el2_lsu_stbuf.scala 138:99] + wire _T_167 = 2'h2 == WrPtrPlus1; // @[el2_lsu_stbuf.scala 140:64] + wire _T_168 = _T_167 & dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 140:80] + wire _T_171 = _T_168 & _T_132; // @[el2_lsu_stbuf.scala 140:101] + wire _T_172 = _T_166 | _T_171; // @[el2_lsu_stbuf.scala 139:120] + wire _T_174 = _T_172 | store_matchvec_lo_r[2]; // @[el2_lsu_stbuf.scala 140:149] + wire _T_176 = _T_174 | store_matchvec_hi_r[2]; // @[el2_lsu_stbuf.scala 141:76] + wire _T_177 = io_ldst_stbuf_reqvld_r & _T_176; // @[el2_lsu_stbuf.scala 137:77] + wire _T_178 = 2'h3 == WrPtr; // @[el2_lsu_stbuf.scala 138:64] + wire _T_180 = _T_178 & _T_122; // @[el2_lsu_stbuf.scala 138:75] + wire _T_182 = _T_178 & dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 139:75] + wire _T_184 = _T_182 & _T_126; // @[el2_lsu_stbuf.scala 139:96] + wire _T_185 = _T_180 | _T_184; // @[el2_lsu_stbuf.scala 138:99] + wire _T_186 = 2'h3 == WrPtrPlus1; // @[el2_lsu_stbuf.scala 140:64] + wire _T_187 = _T_186 & dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 140:80] + wire _T_190 = _T_187 & _T_132; // @[el2_lsu_stbuf.scala 140:101] + wire _T_191 = _T_185 | _T_190; // @[el2_lsu_stbuf.scala 139:120] + wire _T_193 = _T_191 | store_matchvec_lo_r[3]; // @[el2_lsu_stbuf.scala 140:149] + wire _T_195 = _T_193 | store_matchvec_hi_r[3]; // @[el2_lsu_stbuf.scala 141:76] + wire _T_196 = io_ldst_stbuf_reqvld_r & _T_195; // @[el2_lsu_stbuf.scala 137:77] + wire [3:0] stbuf_wr_en = {_T_196,_T_177,_T_158,_T_139}; // @[Cat.scala 29:58] + wire _T_219 = ~ldst_dual_r; // @[el2_lsu_stbuf.scala 143:53] + wire _T_220 = _T_219 | io_store_stbuf_reqvld_r; // @[el2_lsu_stbuf.scala 143:66] + wire _T_223 = _T_220 & _T_121; // @[el2_lsu_stbuf.scala 143:93] + wire _T_225 = _T_223 & _T_122; // @[el2_lsu_stbuf.scala 143:123] + wire _T_227 = _T_225 | store_matchvec_lo_r[0]; // @[el2_lsu_stbuf.scala 143:147] + wire _T_232 = _T_220 & _T_140; // @[el2_lsu_stbuf.scala 143:93] + wire _T_234 = _T_232 & _T_122; // @[el2_lsu_stbuf.scala 143:123] + wire _T_236 = _T_234 | store_matchvec_lo_r[1]; // @[el2_lsu_stbuf.scala 143:147] + wire _T_241 = _T_220 & _T_159; // @[el2_lsu_stbuf.scala 143:93] + wire _T_243 = _T_241 & _T_122; // @[el2_lsu_stbuf.scala 143:123] + wire _T_245 = _T_243 | store_matchvec_lo_r[2]; // @[el2_lsu_stbuf.scala 143:147] + wire _T_250 = _T_220 & _T_178; // @[el2_lsu_stbuf.scala 143:93] + wire _T_252 = _T_250 & _T_122; // @[el2_lsu_stbuf.scala 143:123] + wire _T_254 = _T_252 | store_matchvec_lo_r[3]; // @[el2_lsu_stbuf.scala 143:147] + wire [3:0] sel_lo = {_T_254,_T_245,_T_236,_T_227}; // @[Cat.scala 29:58] + reg [3:0] stbuf_byteen_0; // @[el2_lsu_stbuf.scala 167:92] + wire [3:0] _T_274 = stbuf_byteen_0 | store_byteen_lo_r; // @[el2_lsu_stbuf.scala 146:87] + wire [3:0] _T_275 = stbuf_byteen_0 | store_byteen_hi_r; // @[el2_lsu_stbuf.scala 146:124] + wire [3:0] stbuf_byteenin_0 = sel_lo[0] ? _T_274 : _T_275; // @[el2_lsu_stbuf.scala 146:59] + reg [3:0] stbuf_byteen_1; // @[el2_lsu_stbuf.scala 167:92] + wire [3:0] _T_278 = stbuf_byteen_1 | store_byteen_lo_r; // @[el2_lsu_stbuf.scala 146:87] + wire [3:0] _T_279 = stbuf_byteen_1 | store_byteen_hi_r; // @[el2_lsu_stbuf.scala 146:124] + wire [3:0] stbuf_byteenin_1 = sel_lo[1] ? _T_278 : _T_279; // @[el2_lsu_stbuf.scala 146:59] + reg [3:0] stbuf_byteen_2; // @[el2_lsu_stbuf.scala 167:92] + wire [3:0] _T_282 = stbuf_byteen_2 | store_byteen_lo_r; // @[el2_lsu_stbuf.scala 146:87] + wire [3:0] _T_283 = stbuf_byteen_2 | store_byteen_hi_r; // @[el2_lsu_stbuf.scala 146:124] + wire [3:0] stbuf_byteenin_2 = sel_lo[2] ? _T_282 : _T_283; // @[el2_lsu_stbuf.scala 146:59] + reg [3:0] stbuf_byteen_3; // @[el2_lsu_stbuf.scala 167:92] + wire [3:0] _T_286 = stbuf_byteen_3 | store_byteen_lo_r; // @[el2_lsu_stbuf.scala 146:87] + wire [3:0] _T_287 = stbuf_byteen_3 | store_byteen_hi_r; // @[el2_lsu_stbuf.scala 146:124] + wire [3:0] stbuf_byteenin_3 = sel_lo[3] ? _T_286 : _T_287; // @[el2_lsu_stbuf.scala 146:59] + wire _T_291 = ~stbuf_byteen_0[0]; // @[el2_lsu_stbuf.scala 148:68] + wire _T_293 = _T_291 | store_byteen_lo_r[0]; // @[el2_lsu_stbuf.scala 148:88] reg [31:0] stbuf_data_0; // @[Reg.scala 27:20] - wire [7:0] _T_250 = _T_247 ? io_store_datafn_lo_r[7:0] : stbuf_data_0[7:0]; // @[el2_lsu_stbuf.scala 138:67] - wire _T_254 = _T_245 | store_byteen_hi_r[0]; // @[el2_lsu_stbuf.scala 139:31] - wire [7:0] _T_257 = _T_254 ? io_store_datafn_hi_r[7:0] : stbuf_data_0[7:0]; // @[el2_lsu_stbuf.scala 139:10] - wire [7:0] datain1_3 = sel_lo[0] ? _T_250 : _T_257; // @[el2_lsu_stbuf.scala 138:52] - wire _T_261 = ~stbuf_byteen_1[0]; // @[el2_lsu_stbuf.scala 138:68] - wire _T_263 = _T_261 | store_byteen_lo_r[0]; // @[el2_lsu_stbuf.scala 138:88] + wire [7:0] _T_296 = _T_293 ? io_store_datafn_lo_r[7:0] : stbuf_data_0[7:0]; // @[el2_lsu_stbuf.scala 148:67] + wire _T_300 = _T_291 | store_byteen_hi_r[0]; // @[el2_lsu_stbuf.scala 149:31] + wire [7:0] _T_303 = _T_300 ? io_store_datafn_hi_r[7:0] : stbuf_data_0[7:0]; // @[el2_lsu_stbuf.scala 149:10] + wire [7:0] datain1_0 = sel_lo[0] ? _T_296 : _T_303; // @[el2_lsu_stbuf.scala 148:52] + wire _T_307 = ~stbuf_byteen_1[0]; // @[el2_lsu_stbuf.scala 148:68] + wire _T_309 = _T_307 | store_byteen_lo_r[0]; // @[el2_lsu_stbuf.scala 148:88] reg [31:0] stbuf_data_1; // @[Reg.scala 27:20] - wire [7:0] _T_266 = _T_263 ? io_store_datafn_lo_r[7:0] : stbuf_data_1[7:0]; // @[el2_lsu_stbuf.scala 138:67] - wire _T_270 = _T_261 | store_byteen_hi_r[0]; // @[el2_lsu_stbuf.scala 139:31] - wire [7:0] _T_273 = _T_270 ? io_store_datafn_hi_r[7:0] : stbuf_data_1[7:0]; // @[el2_lsu_stbuf.scala 139:10] - wire [7:0] datain1_2 = sel_lo[1] ? _T_266 : _T_273; // @[el2_lsu_stbuf.scala 138:52] - wire _T_277 = ~stbuf_byteen_2[0]; // @[el2_lsu_stbuf.scala 138:68] - wire _T_279 = _T_277 | store_byteen_lo_r[0]; // @[el2_lsu_stbuf.scala 138:88] + wire [7:0] _T_312 = _T_309 ? io_store_datafn_lo_r[7:0] : stbuf_data_1[7:0]; // @[el2_lsu_stbuf.scala 148:67] + wire _T_316 = _T_307 | store_byteen_hi_r[0]; // @[el2_lsu_stbuf.scala 149:31] + wire [7:0] _T_319 = _T_316 ? io_store_datafn_hi_r[7:0] : stbuf_data_1[7:0]; // @[el2_lsu_stbuf.scala 149:10] + wire [7:0] datain1_1 = sel_lo[1] ? _T_312 : _T_319; // @[el2_lsu_stbuf.scala 148:52] + wire _T_323 = ~stbuf_byteen_2[0]; // @[el2_lsu_stbuf.scala 148:68] + wire _T_325 = _T_323 | store_byteen_lo_r[0]; // @[el2_lsu_stbuf.scala 148:88] reg [31:0] stbuf_data_2; // @[Reg.scala 27:20] - wire [7:0] _T_282 = _T_279 ? io_store_datafn_lo_r[7:0] : stbuf_data_2[7:0]; // @[el2_lsu_stbuf.scala 138:67] - wire _T_286 = _T_277 | store_byteen_hi_r[0]; // @[el2_lsu_stbuf.scala 139:31] - wire [7:0] _T_289 = _T_286 ? io_store_datafn_hi_r[7:0] : stbuf_data_2[7:0]; // @[el2_lsu_stbuf.scala 139:10] - wire [7:0] datain1_1 = sel_lo[2] ? _T_282 : _T_289; // @[el2_lsu_stbuf.scala 138:52] - wire _T_293 = ~stbuf_byteen_3[0]; // @[el2_lsu_stbuf.scala 138:68] - wire _T_295 = _T_293 | store_byteen_lo_r[0]; // @[el2_lsu_stbuf.scala 138:88] + wire [7:0] _T_328 = _T_325 ? io_store_datafn_lo_r[7:0] : stbuf_data_2[7:0]; // @[el2_lsu_stbuf.scala 148:67] + wire _T_332 = _T_323 | store_byteen_hi_r[0]; // @[el2_lsu_stbuf.scala 149:31] + wire [7:0] _T_335 = _T_332 ? io_store_datafn_hi_r[7:0] : stbuf_data_2[7:0]; // @[el2_lsu_stbuf.scala 149:10] + wire [7:0] datain1_2 = sel_lo[2] ? _T_328 : _T_335; // @[el2_lsu_stbuf.scala 148:52] + wire _T_339 = ~stbuf_byteen_3[0]; // @[el2_lsu_stbuf.scala 148:68] + wire _T_341 = _T_339 | store_byteen_lo_r[0]; // @[el2_lsu_stbuf.scala 148:88] reg [31:0] stbuf_data_3; // @[Reg.scala 27:20] - wire [7:0] _T_298 = _T_295 ? io_store_datafn_lo_r[7:0] : stbuf_data_3[7:0]; // @[el2_lsu_stbuf.scala 138:67] - wire _T_302 = _T_293 | store_byteen_hi_r[0]; // @[el2_lsu_stbuf.scala 139:31] - wire [7:0] _T_305 = _T_302 ? io_store_datafn_hi_r[7:0] : stbuf_data_3[7:0]; // @[el2_lsu_stbuf.scala 139:10] - wire [7:0] datain1_0 = sel_lo[3] ? _T_298 : _T_305; // @[el2_lsu_stbuf.scala 138:52] - wire _T_309 = ~stbuf_byteen_0[1]; // @[el2_lsu_stbuf.scala 141:69] - wire _T_311 = _T_309 | store_byteen_lo_r[1]; // @[el2_lsu_stbuf.scala 141:89] - wire [7:0] _T_314 = _T_311 ? io_store_datafn_lo_r[15:8] : stbuf_data_0[15:8]; // @[el2_lsu_stbuf.scala 141:68] - wire _T_318 = _T_309 | store_byteen_hi_r[1]; // @[el2_lsu_stbuf.scala 142:31] - wire [7:0] _T_321 = _T_318 ? io_store_datafn_hi_r[15:8] : stbuf_data_0[15:8]; // @[el2_lsu_stbuf.scala 142:10] - wire [7:0] datain2_3 = sel_lo[0] ? _T_314 : _T_321; // @[el2_lsu_stbuf.scala 141:53] - wire _T_325 = ~stbuf_byteen_1[1]; // @[el2_lsu_stbuf.scala 141:69] - wire _T_327 = _T_325 | store_byteen_lo_r[1]; // @[el2_lsu_stbuf.scala 141:89] - wire [7:0] _T_330 = _T_327 ? io_store_datafn_lo_r[15:8] : stbuf_data_1[15:8]; // @[el2_lsu_stbuf.scala 141:68] - wire _T_334 = _T_325 | store_byteen_hi_r[1]; // @[el2_lsu_stbuf.scala 142:31] - wire [7:0] _T_337 = _T_334 ? io_store_datafn_hi_r[15:8] : stbuf_data_1[15:8]; // @[el2_lsu_stbuf.scala 142:10] - wire [7:0] datain2_2 = sel_lo[1] ? _T_330 : _T_337; // @[el2_lsu_stbuf.scala 141:53] - wire _T_341 = ~stbuf_byteen_2[1]; // @[el2_lsu_stbuf.scala 141:69] - wire _T_343 = _T_341 | store_byteen_lo_r[1]; // @[el2_lsu_stbuf.scala 141:89] - wire [7:0] _T_346 = _T_343 ? io_store_datafn_lo_r[15:8] : stbuf_data_2[15:8]; // @[el2_lsu_stbuf.scala 141:68] - wire _T_350 = _T_341 | store_byteen_hi_r[1]; // @[el2_lsu_stbuf.scala 142:31] - wire [7:0] _T_353 = _T_350 ? io_store_datafn_hi_r[15:8] : stbuf_data_2[15:8]; // @[el2_lsu_stbuf.scala 142:10] - wire [7:0] datain2_1 = sel_lo[2] ? _T_346 : _T_353; // @[el2_lsu_stbuf.scala 141:53] - wire _T_357 = ~stbuf_byteen_3[1]; // @[el2_lsu_stbuf.scala 141:69] - wire _T_359 = _T_357 | store_byteen_lo_r[1]; // @[el2_lsu_stbuf.scala 141:89] - wire [7:0] _T_362 = _T_359 ? io_store_datafn_lo_r[15:8] : stbuf_data_3[15:8]; // @[el2_lsu_stbuf.scala 141:68] - wire _T_366 = _T_357 | store_byteen_hi_r[1]; // @[el2_lsu_stbuf.scala 142:31] - wire [7:0] _T_369 = _T_366 ? io_store_datafn_hi_r[15:8] : stbuf_data_3[15:8]; // @[el2_lsu_stbuf.scala 142:10] - wire [7:0] datain2_0 = sel_lo[3] ? _T_362 : _T_369; // @[el2_lsu_stbuf.scala 141:53] - wire _T_373 = ~stbuf_byteen_0[2]; // @[el2_lsu_stbuf.scala 144:69] - wire _T_375 = _T_373 | store_byteen_lo_r[2]; // @[el2_lsu_stbuf.scala 144:89] - wire [7:0] _T_378 = _T_375 ? io_store_datafn_lo_r[23:16] : stbuf_data_0[23:16]; // @[el2_lsu_stbuf.scala 144:68] - wire _T_382 = _T_373 | store_byteen_hi_r[2]; // @[el2_lsu_stbuf.scala 145:31] - wire [7:0] _T_385 = _T_382 ? io_store_datafn_hi_r[23:16] : stbuf_data_0[23:16]; // @[el2_lsu_stbuf.scala 145:10] - wire [7:0] datain3_3 = sel_lo[0] ? _T_378 : _T_385; // @[el2_lsu_stbuf.scala 144:53] - wire _T_389 = ~stbuf_byteen_1[2]; // @[el2_lsu_stbuf.scala 144:69] - wire _T_391 = _T_389 | store_byteen_lo_r[2]; // @[el2_lsu_stbuf.scala 144:89] - wire [7:0] _T_394 = _T_391 ? io_store_datafn_lo_r[23:16] : stbuf_data_1[23:16]; // @[el2_lsu_stbuf.scala 144:68] - wire _T_398 = _T_389 | store_byteen_hi_r[2]; // @[el2_lsu_stbuf.scala 145:31] - wire [7:0] _T_401 = _T_398 ? io_store_datafn_hi_r[23:16] : stbuf_data_1[23:16]; // @[el2_lsu_stbuf.scala 145:10] - wire [7:0] datain3_2 = sel_lo[1] ? _T_394 : _T_401; // @[el2_lsu_stbuf.scala 144:53] - wire _T_405 = ~stbuf_byteen_2[2]; // @[el2_lsu_stbuf.scala 144:69] - wire _T_407 = _T_405 | store_byteen_lo_r[2]; // @[el2_lsu_stbuf.scala 144:89] - wire [7:0] _T_410 = _T_407 ? io_store_datafn_lo_r[23:16] : stbuf_data_2[23:16]; // @[el2_lsu_stbuf.scala 144:68] - wire _T_414 = _T_405 | store_byteen_hi_r[2]; // @[el2_lsu_stbuf.scala 145:31] - wire [7:0] _T_417 = _T_414 ? io_store_datafn_hi_r[23:16] : stbuf_data_2[23:16]; // @[el2_lsu_stbuf.scala 145:10] - wire [7:0] datain3_1 = sel_lo[2] ? _T_410 : _T_417; // @[el2_lsu_stbuf.scala 144:53] - wire _T_421 = ~stbuf_byteen_3[2]; // @[el2_lsu_stbuf.scala 144:69] - wire _T_423 = _T_421 | store_byteen_lo_r[2]; // @[el2_lsu_stbuf.scala 144:89] - wire [7:0] _T_426 = _T_423 ? io_store_datafn_lo_r[23:16] : stbuf_data_3[23:16]; // @[el2_lsu_stbuf.scala 144:68] - wire _T_430 = _T_421 | store_byteen_hi_r[2]; // @[el2_lsu_stbuf.scala 145:31] - wire [7:0] _T_433 = _T_430 ? io_store_datafn_hi_r[23:16] : stbuf_data_3[23:16]; // @[el2_lsu_stbuf.scala 145:10] - wire [7:0] datain3_0 = sel_lo[3] ? _T_426 : _T_433; // @[el2_lsu_stbuf.scala 144:53] - wire _T_437 = ~stbuf_byteen_0[3]; // @[el2_lsu_stbuf.scala 147:69] - wire _T_439 = _T_437 | store_byteen_lo_r[3]; // @[el2_lsu_stbuf.scala 147:89] - wire [7:0] _T_442 = _T_439 ? io_store_datafn_lo_r[31:24] : stbuf_data_0[31:24]; // @[el2_lsu_stbuf.scala 147:68] - wire _T_446 = _T_437 | store_byteen_hi_r[3]; // @[el2_lsu_stbuf.scala 148:31] - wire [7:0] _T_449 = _T_446 ? io_store_datafn_hi_r[31:24] : stbuf_data_0[31:24]; // @[el2_lsu_stbuf.scala 148:10] - wire [7:0] datain4_3 = sel_lo[0] ? _T_442 : _T_449; // @[el2_lsu_stbuf.scala 147:53] - wire _T_453 = ~stbuf_byteen_1[3]; // @[el2_lsu_stbuf.scala 147:69] - wire _T_455 = _T_453 | store_byteen_lo_r[3]; // @[el2_lsu_stbuf.scala 147:89] - wire [7:0] _T_458 = _T_455 ? io_store_datafn_lo_r[31:24] : stbuf_data_1[31:24]; // @[el2_lsu_stbuf.scala 147:68] - wire _T_462 = _T_453 | store_byteen_hi_r[3]; // @[el2_lsu_stbuf.scala 148:31] - wire [7:0] _T_465 = _T_462 ? io_store_datafn_hi_r[31:24] : stbuf_data_1[31:24]; // @[el2_lsu_stbuf.scala 148:10] - wire [7:0] datain4_2 = sel_lo[1] ? _T_458 : _T_465; // @[el2_lsu_stbuf.scala 147:53] - wire _T_469 = ~stbuf_byteen_2[3]; // @[el2_lsu_stbuf.scala 147:69] - wire _T_471 = _T_469 | store_byteen_lo_r[3]; // @[el2_lsu_stbuf.scala 147:89] - wire [7:0] _T_474 = _T_471 ? io_store_datafn_lo_r[31:24] : stbuf_data_2[31:24]; // @[el2_lsu_stbuf.scala 147:68] - wire _T_478 = _T_469 | store_byteen_hi_r[3]; // @[el2_lsu_stbuf.scala 148:31] - wire [7:0] _T_481 = _T_478 ? io_store_datafn_hi_r[31:24] : stbuf_data_2[31:24]; // @[el2_lsu_stbuf.scala 148:10] - wire [7:0] datain4_1 = sel_lo[2] ? _T_474 : _T_481; // @[el2_lsu_stbuf.scala 147:53] - wire _T_485 = ~stbuf_byteen_3[3]; // @[el2_lsu_stbuf.scala 147:69] - wire _T_487 = _T_485 | store_byteen_lo_r[3]; // @[el2_lsu_stbuf.scala 147:89] - wire [7:0] _T_490 = _T_487 ? io_store_datafn_lo_r[31:24] : stbuf_data_3[31:24]; // @[el2_lsu_stbuf.scala 147:68] - wire _T_494 = _T_485 | store_byteen_hi_r[3]; // @[el2_lsu_stbuf.scala 148:31] - wire [7:0] _T_497 = _T_494 ? io_store_datafn_hi_r[31:24] : stbuf_data_3[31:24]; // @[el2_lsu_stbuf.scala 148:10] - wire [7:0] datain4_0 = sel_lo[3] ? _T_490 : _T_497; // @[el2_lsu_stbuf.scala 147:53] + wire [7:0] _T_344 = _T_341 ? io_store_datafn_lo_r[7:0] : stbuf_data_3[7:0]; // @[el2_lsu_stbuf.scala 148:67] + wire _T_348 = _T_339 | store_byteen_hi_r[0]; // @[el2_lsu_stbuf.scala 149:31] + wire [7:0] _T_351 = _T_348 ? io_store_datafn_hi_r[7:0] : stbuf_data_3[7:0]; // @[el2_lsu_stbuf.scala 149:10] + wire [7:0] datain1_3 = sel_lo[3] ? _T_344 : _T_351; // @[el2_lsu_stbuf.scala 148:52] + wire _T_355 = ~stbuf_byteen_0[1]; // @[el2_lsu_stbuf.scala 151:69] + wire _T_357 = _T_355 | store_byteen_lo_r[1]; // @[el2_lsu_stbuf.scala 151:89] + wire [7:0] _T_360 = _T_357 ? io_store_datafn_lo_r[15:8] : stbuf_data_0[15:8]; // @[el2_lsu_stbuf.scala 151:68] + wire _T_364 = _T_355 | store_byteen_hi_r[1]; // @[el2_lsu_stbuf.scala 152:31] + wire [7:0] _T_367 = _T_364 ? io_store_datafn_hi_r[15:8] : stbuf_data_0[15:8]; // @[el2_lsu_stbuf.scala 152:10] + wire [7:0] datain2_0 = sel_lo[0] ? _T_360 : _T_367; // @[el2_lsu_stbuf.scala 151:53] + wire _T_371 = ~stbuf_byteen_1[1]; // @[el2_lsu_stbuf.scala 151:69] + wire _T_373 = _T_371 | store_byteen_lo_r[1]; // @[el2_lsu_stbuf.scala 151:89] + wire [7:0] _T_376 = _T_373 ? io_store_datafn_lo_r[15:8] : stbuf_data_1[15:8]; // @[el2_lsu_stbuf.scala 151:68] + wire _T_380 = _T_371 | store_byteen_hi_r[1]; // @[el2_lsu_stbuf.scala 152:31] + wire [7:0] _T_383 = _T_380 ? io_store_datafn_hi_r[15:8] : stbuf_data_1[15:8]; // @[el2_lsu_stbuf.scala 152:10] + wire [7:0] datain2_1 = sel_lo[1] ? _T_376 : _T_383; // @[el2_lsu_stbuf.scala 151:53] + wire _T_387 = ~stbuf_byteen_2[1]; // @[el2_lsu_stbuf.scala 151:69] + wire _T_389 = _T_387 | store_byteen_lo_r[1]; // @[el2_lsu_stbuf.scala 151:89] + wire [7:0] _T_392 = _T_389 ? io_store_datafn_lo_r[15:8] : stbuf_data_2[15:8]; // @[el2_lsu_stbuf.scala 151:68] + wire _T_396 = _T_387 | store_byteen_hi_r[1]; // @[el2_lsu_stbuf.scala 152:31] + wire [7:0] _T_399 = _T_396 ? io_store_datafn_hi_r[15:8] : stbuf_data_2[15:8]; // @[el2_lsu_stbuf.scala 152:10] + wire [7:0] datain2_2 = sel_lo[2] ? _T_392 : _T_399; // @[el2_lsu_stbuf.scala 151:53] + wire _T_403 = ~stbuf_byteen_3[1]; // @[el2_lsu_stbuf.scala 151:69] + wire _T_405 = _T_403 | store_byteen_lo_r[1]; // @[el2_lsu_stbuf.scala 151:89] + wire [7:0] _T_408 = _T_405 ? io_store_datafn_lo_r[15:8] : stbuf_data_3[15:8]; // @[el2_lsu_stbuf.scala 151:68] + wire _T_412 = _T_403 | store_byteen_hi_r[1]; // @[el2_lsu_stbuf.scala 152:31] + wire [7:0] _T_415 = _T_412 ? io_store_datafn_hi_r[15:8] : stbuf_data_3[15:8]; // @[el2_lsu_stbuf.scala 152:10] + wire [7:0] datain2_3 = sel_lo[3] ? _T_408 : _T_415; // @[el2_lsu_stbuf.scala 151:53] + wire _T_419 = ~stbuf_byteen_0[2]; // @[el2_lsu_stbuf.scala 154:69] + wire _T_421 = _T_419 | store_byteen_lo_r[2]; // @[el2_lsu_stbuf.scala 154:89] + wire [7:0] _T_424 = _T_421 ? io_store_datafn_lo_r[23:16] : stbuf_data_0[23:16]; // @[el2_lsu_stbuf.scala 154:68] + wire _T_428 = _T_419 | store_byteen_hi_r[2]; // @[el2_lsu_stbuf.scala 155:31] + wire [7:0] _T_431 = _T_428 ? io_store_datafn_hi_r[23:16] : stbuf_data_0[23:16]; // @[el2_lsu_stbuf.scala 155:10] + wire [7:0] datain3_0 = sel_lo[0] ? _T_424 : _T_431; // @[el2_lsu_stbuf.scala 154:53] + wire _T_435 = ~stbuf_byteen_1[2]; // @[el2_lsu_stbuf.scala 154:69] + wire _T_437 = _T_435 | store_byteen_lo_r[2]; // @[el2_lsu_stbuf.scala 154:89] + wire [7:0] _T_440 = _T_437 ? io_store_datafn_lo_r[23:16] : stbuf_data_1[23:16]; // @[el2_lsu_stbuf.scala 154:68] + wire _T_444 = _T_435 | store_byteen_hi_r[2]; // @[el2_lsu_stbuf.scala 155:31] + wire [7:0] _T_447 = _T_444 ? io_store_datafn_hi_r[23:16] : stbuf_data_1[23:16]; // @[el2_lsu_stbuf.scala 155:10] + wire [7:0] datain3_1 = sel_lo[1] ? _T_440 : _T_447; // @[el2_lsu_stbuf.scala 154:53] + wire _T_451 = ~stbuf_byteen_2[2]; // @[el2_lsu_stbuf.scala 154:69] + wire _T_453 = _T_451 | store_byteen_lo_r[2]; // @[el2_lsu_stbuf.scala 154:89] + wire [7:0] _T_456 = _T_453 ? io_store_datafn_lo_r[23:16] : stbuf_data_2[23:16]; // @[el2_lsu_stbuf.scala 154:68] + wire _T_460 = _T_451 | store_byteen_hi_r[2]; // @[el2_lsu_stbuf.scala 155:31] + wire [7:0] _T_463 = _T_460 ? io_store_datafn_hi_r[23:16] : stbuf_data_2[23:16]; // @[el2_lsu_stbuf.scala 155:10] + wire [7:0] datain3_2 = sel_lo[2] ? _T_456 : _T_463; // @[el2_lsu_stbuf.scala 154:53] + wire _T_467 = ~stbuf_byteen_3[2]; // @[el2_lsu_stbuf.scala 154:69] + wire _T_469 = _T_467 | store_byteen_lo_r[2]; // @[el2_lsu_stbuf.scala 154:89] + wire [7:0] _T_472 = _T_469 ? io_store_datafn_lo_r[23:16] : stbuf_data_3[23:16]; // @[el2_lsu_stbuf.scala 154:68] + wire _T_476 = _T_467 | store_byteen_hi_r[2]; // @[el2_lsu_stbuf.scala 155:31] + wire [7:0] _T_479 = _T_476 ? io_store_datafn_hi_r[23:16] : stbuf_data_3[23:16]; // @[el2_lsu_stbuf.scala 155:10] + wire [7:0] datain3_3 = sel_lo[3] ? _T_472 : _T_479; // @[el2_lsu_stbuf.scala 154:53] + wire _T_483 = ~stbuf_byteen_0[3]; // @[el2_lsu_stbuf.scala 157:69] + wire _T_485 = _T_483 | store_byteen_lo_r[3]; // @[el2_lsu_stbuf.scala 157:89] + wire [7:0] _T_488 = _T_485 ? io_store_datafn_lo_r[31:24] : stbuf_data_0[31:24]; // @[el2_lsu_stbuf.scala 157:68] + wire _T_492 = _T_483 | store_byteen_hi_r[3]; // @[el2_lsu_stbuf.scala 158:31] + wire [7:0] _T_495 = _T_492 ? io_store_datafn_hi_r[31:24] : stbuf_data_0[31:24]; // @[el2_lsu_stbuf.scala 158:10] + wire [7:0] datain4_0 = sel_lo[0] ? _T_488 : _T_495; // @[el2_lsu_stbuf.scala 157:53] + wire _T_499 = ~stbuf_byteen_1[3]; // @[el2_lsu_stbuf.scala 157:69] + wire _T_501 = _T_499 | store_byteen_lo_r[3]; // @[el2_lsu_stbuf.scala 157:89] + wire [7:0] _T_504 = _T_501 ? io_store_datafn_lo_r[31:24] : stbuf_data_1[31:24]; // @[el2_lsu_stbuf.scala 157:68] + wire _T_508 = _T_499 | store_byteen_hi_r[3]; // @[el2_lsu_stbuf.scala 158:31] + wire [7:0] _T_511 = _T_508 ? io_store_datafn_hi_r[31:24] : stbuf_data_1[31:24]; // @[el2_lsu_stbuf.scala 158:10] + wire [7:0] datain4_1 = sel_lo[1] ? _T_504 : _T_511; // @[el2_lsu_stbuf.scala 157:53] + wire _T_515 = ~stbuf_byteen_2[3]; // @[el2_lsu_stbuf.scala 157:69] + wire _T_517 = _T_515 | store_byteen_lo_r[3]; // @[el2_lsu_stbuf.scala 157:89] + wire [7:0] _T_520 = _T_517 ? io_store_datafn_lo_r[31:24] : stbuf_data_2[31:24]; // @[el2_lsu_stbuf.scala 157:68] + wire _T_524 = _T_515 | store_byteen_hi_r[3]; // @[el2_lsu_stbuf.scala 158:31] + wire [7:0] _T_527 = _T_524 ? io_store_datafn_hi_r[31:24] : stbuf_data_2[31:24]; // @[el2_lsu_stbuf.scala 158:10] + wire [7:0] datain4_2 = sel_lo[2] ? _T_520 : _T_527; // @[el2_lsu_stbuf.scala 157:53] + wire _T_531 = ~stbuf_byteen_3[3]; // @[el2_lsu_stbuf.scala 157:69] + wire _T_533 = _T_531 | store_byteen_lo_r[3]; // @[el2_lsu_stbuf.scala 157:89] + wire [7:0] _T_536 = _T_533 ? io_store_datafn_lo_r[31:24] : stbuf_data_3[31:24]; // @[el2_lsu_stbuf.scala 157:68] + wire _T_540 = _T_531 | store_byteen_hi_r[3]; // @[el2_lsu_stbuf.scala 158:31] + wire [7:0] _T_543 = _T_540 ? io_store_datafn_hi_r[31:24] : stbuf_data_3[31:24]; // @[el2_lsu_stbuf.scala 158:10] + wire [7:0] datain4_3 = sel_lo[3] ? _T_536 : _T_543; // @[el2_lsu_stbuf.scala 157:53] wire [31:0] stbuf_datain_0 = {datain4_0,datain3_0,datain2_0,datain1_0}; // @[Cat.scala 29:58] wire [31:0] stbuf_datain_1 = {datain4_1,datain3_1,datain2_1,datain1_1}; // @[Cat.scala 29:58] wire [31:0] stbuf_datain_2 = {datain4_2,datain3_2,datain2_2,datain1_2}; // @[Cat.scala 29:58] wire [31:0] stbuf_datain_3 = {datain4_3,datain3_3,datain2_3,datain1_3}; // @[Cat.scala 29:58] - wire _GEN_0 = stbuf_wr_en[0] | stbuf_vld_0; // @[Reg.scala 28:19] - wire [15:0] cmpaddr_hi_m = {{2'd0}, io_end_addr_m[15:2]}; // @[el2_lsu_stbuf.scala 187:17] - wire _T_681 = stbuf_addr_3[15:2] == cmpaddr_hi_m[15:2]; // @[el2_lsu_stbuf.scala 193:116] - wire _T_682 = _T_681 & stbuf_vld_3; // @[el2_lsu_stbuf.scala 193:175] - wire _T_684 = _T_682 & _T_59; // @[el2_lsu_stbuf.scala 193:190] - wire _T_685 = _T_684 & io_addr_in_dccm_m; // @[el2_lsu_stbuf.scala 193:211] - wire _T_674 = stbuf_addr_2[15:2] == cmpaddr_hi_m[15:2]; // @[el2_lsu_stbuf.scala 193:116] - wire _T_675 = _T_674 & stbuf_vld_2; // @[el2_lsu_stbuf.scala 193:175] - wire _T_677 = _T_675 & _T_50; // @[el2_lsu_stbuf.scala 193:190] - wire _T_678 = _T_677 & io_addr_in_dccm_m; // @[el2_lsu_stbuf.scala 193:211] - wire _T_667 = stbuf_addr_1[15:2] == cmpaddr_hi_m[15:2]; // @[el2_lsu_stbuf.scala 193:116] - wire _T_668 = _T_667 & stbuf_vld_1; // @[el2_lsu_stbuf.scala 193:175] - wire _T_670 = _T_668 & _T_41; // @[el2_lsu_stbuf.scala 193:190] - wire _T_671 = _T_670 & io_addr_in_dccm_m; // @[el2_lsu_stbuf.scala 193:211] - wire _T_660 = stbuf_addr_0[15:2] == cmpaddr_hi_m[15:2]; // @[el2_lsu_stbuf.scala 193:116] - wire _T_661 = _T_660 & stbuf_vld_0; // @[el2_lsu_stbuf.scala 193:175] - wire _T_663 = _T_661 & _T_32; // @[el2_lsu_stbuf.scala 193:190] - wire _T_664 = _T_663 & io_addr_in_dccm_m; // @[el2_lsu_stbuf.scala 193:211] - wire [3:0] stbuf_match_hi = {_T_685,_T_678,_T_671,_T_664}; // @[Cat.scala 29:58] - wire [15:0] cmpaddr_lo_m = {{2'd0}, io_lsu_addr_m[15:2]}; // @[el2_lsu_stbuf.scala 190:18] - wire _T_711 = stbuf_addr_3[15:2] == cmpaddr_lo_m[15:2]; // @[el2_lsu_stbuf.scala 194:116] - wire _T_712 = _T_711 & stbuf_vld_3; // @[el2_lsu_stbuf.scala 194:175] - wire _T_714 = _T_712 & _T_59; // @[el2_lsu_stbuf.scala 194:190] - wire _T_715 = _T_714 & io_addr_in_dccm_m; // @[el2_lsu_stbuf.scala 194:211] - wire _T_704 = stbuf_addr_2[15:2] == cmpaddr_lo_m[15:2]; // @[el2_lsu_stbuf.scala 194:116] - wire _T_705 = _T_704 & stbuf_vld_2; // @[el2_lsu_stbuf.scala 194:175] - wire _T_707 = _T_705 & _T_50; // @[el2_lsu_stbuf.scala 194:190] - wire _T_708 = _T_707 & io_addr_in_dccm_m; // @[el2_lsu_stbuf.scala 194:211] - wire _T_697 = stbuf_addr_1[15:2] == cmpaddr_lo_m[15:2]; // @[el2_lsu_stbuf.scala 194:116] - wire _T_698 = _T_697 & stbuf_vld_1; // @[el2_lsu_stbuf.scala 194:175] - wire _T_700 = _T_698 & _T_41; // @[el2_lsu_stbuf.scala 194:190] - wire _T_701 = _T_700 & io_addr_in_dccm_m; // @[el2_lsu_stbuf.scala 194:211] - wire _T_690 = stbuf_addr_0[15:2] == cmpaddr_lo_m[15:2]; // @[el2_lsu_stbuf.scala 194:116] - wire _T_691 = _T_690 & stbuf_vld_0; // @[el2_lsu_stbuf.scala 194:175] - wire _T_693 = _T_691 & _T_32; // @[el2_lsu_stbuf.scala 194:190] - wire _T_694 = _T_693 & io_addr_in_dccm_m; // @[el2_lsu_stbuf.scala 194:211] - wire [3:0] stbuf_match_lo = {_T_715,_T_708,_T_701,_T_694}; // @[Cat.scala 29:58] - wire _T_738 = stbuf_match_hi[3] | stbuf_match_lo[3]; // @[el2_lsu_stbuf.scala 195:79] - wire _T_739 = _T_738 & io_lsu_pkt_m_valid; // @[el2_lsu_stbuf.scala 195:100] - wire _T_740 = _T_739 & io_lsu_pkt_m_dma; // @[el2_lsu_stbuf.scala 195:121] - wire _T_741 = _T_740 & io_lsu_pkt_m_store; // @[el2_lsu_stbuf.scala 195:140] - wire _T_732 = stbuf_match_hi[2] | stbuf_match_lo[2]; // @[el2_lsu_stbuf.scala 195:79] - wire _T_733 = _T_732 & io_lsu_pkt_m_valid; // @[el2_lsu_stbuf.scala 195:100] - wire _T_734 = _T_733 & io_lsu_pkt_m_dma; // @[el2_lsu_stbuf.scala 195:121] - wire _T_735 = _T_734 & io_lsu_pkt_m_store; // @[el2_lsu_stbuf.scala 195:140] - wire _T_726 = stbuf_match_hi[1] | stbuf_match_lo[1]; // @[el2_lsu_stbuf.scala 195:79] - wire _T_727 = _T_726 & io_lsu_pkt_m_valid; // @[el2_lsu_stbuf.scala 195:100] - wire _T_728 = _T_727 & io_lsu_pkt_m_dma; // @[el2_lsu_stbuf.scala 195:121] - wire _T_729 = _T_728 & io_lsu_pkt_m_store; // @[el2_lsu_stbuf.scala 195:140] - wire _T_720 = stbuf_match_hi[0] | stbuf_match_lo[0]; // @[el2_lsu_stbuf.scala 195:79] - wire _T_721 = _T_720 & io_lsu_pkt_m_valid; // @[el2_lsu_stbuf.scala 195:100] - wire _T_722 = _T_721 & io_lsu_pkt_m_dma; // @[el2_lsu_stbuf.scala 195:121] - wire _T_723 = _T_722 & io_lsu_pkt_m_store; // @[el2_lsu_stbuf.scala 195:140] - wire [3:0] stbuf_dma_kill_en = {_T_741,_T_735,_T_729,_T_723}; // @[Cat.scala 29:58] - wire _GEN_1 = stbuf_dma_kill_en[0] | stbuf_dma_kill_0; // @[Reg.scala 28:19] - wire [15:0] stbuf_addrin_0 = _T_226[15:0]; // @[el2_lsu_stbuf.scala 74:39 el2_lsu_stbuf.scala 75:17 el2_lsu_stbuf.scala 135:17] - wire _GEN_5 = stbuf_wr_en[1] | stbuf_vld_1; // @[Reg.scala 28:19] - wire _GEN_6 = stbuf_dma_kill_en[1] | stbuf_dma_kill_1; // @[Reg.scala 28:19] - wire [15:0] stbuf_addrin_1 = _T_224[15:0]; // @[el2_lsu_stbuf.scala 74:39 el2_lsu_stbuf.scala 75:17 el2_lsu_stbuf.scala 135:17] - wire _GEN_10 = stbuf_wr_en[2] | stbuf_vld_2; // @[Reg.scala 28:19] - wire _GEN_11 = stbuf_dma_kill_en[2] | stbuf_dma_kill_2; // @[Reg.scala 28:19] - wire [15:0] stbuf_addrin_2 = _T_222[15:0]; // @[el2_lsu_stbuf.scala 74:39 el2_lsu_stbuf.scala 75:17 el2_lsu_stbuf.scala 135:17] - wire _GEN_15 = stbuf_wr_en[3] | stbuf_vld_3; // @[Reg.scala 28:19] - wire _GEN_16 = stbuf_dma_kill_en[3] | stbuf_dma_kill_3; // @[Reg.scala 28:19] - wire [15:0] stbuf_addrin_3 = _T_220[15:0]; // @[el2_lsu_stbuf.scala 74:39 el2_lsu_stbuf.scala 75:17 el2_lsu_stbuf.scala 135:17] - reg ldst_dual_m; // @[el2_lsu_stbuf.scala 160:53] - wire _GEN_21 = 2'h1 == RdPtr ? stbuf_vld_1 : stbuf_vld_0; // @[el2_lsu_stbuf.scala 164:52] - wire _GEN_22 = 2'h2 == RdPtr ? stbuf_vld_2 : _GEN_21; // @[el2_lsu_stbuf.scala 164:52] - wire _GEN_23 = 2'h3 == RdPtr ? stbuf_vld_3 : _GEN_22; // @[el2_lsu_stbuf.scala 164:52] - wire _GEN_25 = 2'h1 == RdPtr ? stbuf_dma_kill_1 : stbuf_dma_kill_0; // @[el2_lsu_stbuf.scala 164:52] - wire _GEN_26 = 2'h2 == RdPtr ? stbuf_dma_kill_2 : _GEN_25; // @[el2_lsu_stbuf.scala 164:52] - wire _GEN_27 = 2'h3 == RdPtr ? stbuf_dma_kill_3 : _GEN_26; // @[el2_lsu_stbuf.scala 164:52] - wire _T_602 = ~_GEN_27; // @[el2_lsu_stbuf.scala 165:47] - wire _T_603 = _GEN_23 & _T_602; // @[el2_lsu_stbuf.scala 165:45] - wire _T_604 = |stbuf_dma_kill_en; // @[el2_lsu_stbuf.scala 165:91] - wire _T_605 = ~_T_604; // @[el2_lsu_stbuf.scala 165:72] - wire [15:0] _GEN_29 = 2'h1 == RdPtr ? stbuf_addr_1 : stbuf_addr_0; // @[el2_lsu_stbuf.scala 166:23] - wire [15:0] _GEN_30 = 2'h2 == RdPtr ? stbuf_addr_2 : _GEN_29; // @[el2_lsu_stbuf.scala 166:23] - wire [31:0] _GEN_33 = 2'h1 == RdPtr ? stbuf_data_1 : stbuf_data_0; // @[el2_lsu_stbuf.scala 167:23] - wire [31:0] _GEN_34 = 2'h2 == RdPtr ? stbuf_data_2 : _GEN_33; // @[el2_lsu_stbuf.scala 167:23] - wire [3:0] _T_622 = {3'h0,stbuf_vld_0}; // @[Cat.scala 29:58] - wire [3:0] _T_623 = {3'h0,stbuf_vld_1}; // @[Cat.scala 29:58] - wire [3:0] _T_624 = {3'h0,stbuf_vld_2}; // @[Cat.scala 29:58] - wire [3:0] _T_625 = {3'h0,stbuf_vld_3}; // @[Cat.scala 29:58] - wire [3:0] _T_628 = _T_622 + _T_623; // @[el2_lsu_stbuf.scala 175:102] - wire [3:0] _T_630 = _T_628 + _T_624; // @[el2_lsu_stbuf.scala 175:102] - wire [3:0] stbuf_numvld_any = _T_630 + _T_625; // @[el2_lsu_stbuf.scala 175:102] - wire _T_632 = io_lsu_pkt_m_valid & io_lsu_pkt_m_store; // @[el2_lsu_stbuf.scala 176:40] - wire _T_633 = _T_632 & io_addr_in_dccm_m; // @[el2_lsu_stbuf.scala 176:61] - wire _T_634 = ~io_lsu_pkt_m_dma; // @[el2_lsu_stbuf.scala 176:83] - wire isdccmst_m = _T_633 & _T_634; // @[el2_lsu_stbuf.scala 176:81] - wire _T_635 = io_lsu_pkt_r_valid & io_lsu_pkt_r_store; // @[el2_lsu_stbuf.scala 177:40] - wire _T_636 = _T_635 & io_addr_in_dccm_r; // @[el2_lsu_stbuf.scala 177:61] - wire _T_637 = ~io_lsu_pkt_r_dma; // @[el2_lsu_stbuf.scala 177:83] - wire isdccmst_r = _T_636 & _T_637; // @[el2_lsu_stbuf.scala 177:81] - wire [1:0] _T_638 = {1'h0,isdccmst_m}; // @[Cat.scala 29:58] - wire _T_639 = isdccmst_m & ldst_dual_m; // @[el2_lsu_stbuf.scala 179:63] - wire [2:0] _GEN_39 = {{1'd0}, _T_638}; // @[el2_lsu_stbuf.scala 179:48] - wire [2:0] _T_640 = _GEN_39 << _T_639; // @[el2_lsu_stbuf.scala 179:48] - wire [1:0] _T_641 = {1'h0,isdccmst_r}; // @[Cat.scala 29:58] - wire _T_642 = isdccmst_r & ldst_dual_r; // @[el2_lsu_stbuf.scala 180:63] - wire [2:0] _GEN_40 = {{1'd0}, _T_641}; // @[el2_lsu_stbuf.scala 180:48] - wire [2:0] _T_643 = _GEN_40 << _T_642; // @[el2_lsu_stbuf.scala 180:48] - wire [1:0] stbuf_specvld_m = _T_640[1:0]; // @[el2_lsu_stbuf.scala 179:20] - wire [3:0] _T_644 = {2'h0,stbuf_specvld_m}; // @[Cat.scala 29:58] - wire [3:0] _T_646 = stbuf_numvld_any + _T_644; // @[el2_lsu_stbuf.scala 181:45] - wire [1:0] stbuf_specvld_r = _T_643[1:0]; // @[el2_lsu_stbuf.scala 180:20] - wire [3:0] _T_647 = {2'h0,stbuf_specvld_r}; // @[Cat.scala 29:58] - wire [3:0] stbuf_specvld_any = _T_646 + _T_647; // @[el2_lsu_stbuf.scala 181:79] - wire _T_649 = ~ldst_dual_d; // @[el2_lsu_stbuf.scala 183:35] - wire _T_650 = _T_649 & io_dec_lsu_valid_raw_d; // @[el2_lsu_stbuf.scala 183:48] - wire _T_652 = stbuf_specvld_any >= 4'h4; // @[el2_lsu_stbuf.scala 183:99] - wire _T_653 = stbuf_specvld_any >= 4'h3; // @[el2_lsu_stbuf.scala 183:138] - wire _T_747 = stbuf_match_hi[0] & stbuf_byteen_0[0]; // @[el2_lsu_stbuf.scala 198:117] - wire _T_748 = _T_747 & stbuf_vld_0; // @[el2_lsu_stbuf.scala 198:138] - wire _T_751 = stbuf_match_hi[0] & stbuf_byteen_0[1]; // @[el2_lsu_stbuf.scala 198:117] - wire _T_752 = _T_751 & stbuf_vld_0; // @[el2_lsu_stbuf.scala 198:138] - wire _T_755 = stbuf_match_hi[0] & stbuf_byteen_0[2]; // @[el2_lsu_stbuf.scala 198:117] - wire _T_756 = _T_755 & stbuf_vld_0; // @[el2_lsu_stbuf.scala 198:138] - wire _T_759 = stbuf_match_hi[0] & stbuf_byteen_0[3]; // @[el2_lsu_stbuf.scala 198:117] - wire _T_760 = _T_759 & stbuf_vld_0; // @[el2_lsu_stbuf.scala 198:138] - wire [3:0] stbuf_fwdbyteenvec_hi_0 = {_T_760,_T_756,_T_752,_T_748}; // @[Cat.scala 29:58] - wire _T_765 = stbuf_match_hi[1] & stbuf_byteen_1[0]; // @[el2_lsu_stbuf.scala 198:117] - wire _T_766 = _T_765 & stbuf_vld_1; // @[el2_lsu_stbuf.scala 198:138] - wire _T_769 = stbuf_match_hi[1] & stbuf_byteen_1[1]; // @[el2_lsu_stbuf.scala 198:117] - wire _T_770 = _T_769 & stbuf_vld_1; // @[el2_lsu_stbuf.scala 198:138] - wire _T_773 = stbuf_match_hi[1] & stbuf_byteen_1[2]; // @[el2_lsu_stbuf.scala 198:117] - wire _T_774 = _T_773 & stbuf_vld_1; // @[el2_lsu_stbuf.scala 198:138] - wire _T_777 = stbuf_match_hi[1] & stbuf_byteen_1[3]; // @[el2_lsu_stbuf.scala 198:117] - wire _T_778 = _T_777 & stbuf_vld_1; // @[el2_lsu_stbuf.scala 198:138] - wire [3:0] stbuf_fwdbyteenvec_hi_1 = {_T_778,_T_774,_T_770,_T_766}; // @[Cat.scala 29:58] - wire _T_783 = stbuf_match_hi[2] & stbuf_byteen_2[0]; // @[el2_lsu_stbuf.scala 198:117] - wire _T_784 = _T_783 & stbuf_vld_2; // @[el2_lsu_stbuf.scala 198:138] - wire _T_787 = stbuf_match_hi[2] & stbuf_byteen_2[1]; // @[el2_lsu_stbuf.scala 198:117] - wire _T_788 = _T_787 & stbuf_vld_2; // @[el2_lsu_stbuf.scala 198:138] - wire _T_791 = stbuf_match_hi[2] & stbuf_byteen_2[2]; // @[el2_lsu_stbuf.scala 198:117] - wire _T_792 = _T_791 & stbuf_vld_2; // @[el2_lsu_stbuf.scala 198:138] - wire _T_795 = stbuf_match_hi[2] & stbuf_byteen_2[3]; // @[el2_lsu_stbuf.scala 198:117] - wire _T_796 = _T_795 & stbuf_vld_2; // @[el2_lsu_stbuf.scala 198:138] - wire [3:0] stbuf_fwdbyteenvec_hi_2 = {_T_796,_T_792,_T_788,_T_784}; // @[Cat.scala 29:58] - wire _T_801 = stbuf_match_hi[3] & stbuf_byteen_3[0]; // @[el2_lsu_stbuf.scala 198:117] - wire _T_802 = _T_801 & stbuf_vld_3; // @[el2_lsu_stbuf.scala 198:138] - wire _T_805 = stbuf_match_hi[3] & stbuf_byteen_3[1]; // @[el2_lsu_stbuf.scala 198:117] - wire _T_806 = _T_805 & stbuf_vld_3; // @[el2_lsu_stbuf.scala 198:138] - wire _T_809 = stbuf_match_hi[3] & stbuf_byteen_3[2]; // @[el2_lsu_stbuf.scala 198:117] - wire _T_810 = _T_809 & stbuf_vld_3; // @[el2_lsu_stbuf.scala 198:138] - wire _T_813 = stbuf_match_hi[3] & stbuf_byteen_3[3]; // @[el2_lsu_stbuf.scala 198:117] - wire _T_814 = _T_813 & stbuf_vld_3; // @[el2_lsu_stbuf.scala 198:138] - wire [3:0] stbuf_fwdbyteenvec_hi_3 = {_T_814,_T_810,_T_806,_T_802}; // @[Cat.scala 29:58] - wire _T_819 = stbuf_match_lo[0] & stbuf_byteen_0[0]; // @[el2_lsu_stbuf.scala 199:117] - wire _T_820 = _T_819 & stbuf_vld_0; // @[el2_lsu_stbuf.scala 199:138] - wire _T_823 = stbuf_match_lo[0] & stbuf_byteen_0[1]; // @[el2_lsu_stbuf.scala 199:117] - wire _T_824 = _T_823 & stbuf_vld_0; // @[el2_lsu_stbuf.scala 199:138] - wire _T_827 = stbuf_match_lo[0] & stbuf_byteen_0[2]; // @[el2_lsu_stbuf.scala 199:117] - wire _T_828 = _T_827 & stbuf_vld_0; // @[el2_lsu_stbuf.scala 199:138] - wire _T_831 = stbuf_match_lo[0] & stbuf_byteen_0[3]; // @[el2_lsu_stbuf.scala 199:117] - wire _T_832 = _T_831 & stbuf_vld_0; // @[el2_lsu_stbuf.scala 199:138] - wire [3:0] stbuf_fwdbyteenvec_lo_0 = {_T_832,_T_828,_T_824,_T_820}; // @[Cat.scala 29:58] - wire _T_837 = stbuf_match_lo[1] & stbuf_byteen_1[0]; // @[el2_lsu_stbuf.scala 199:117] - wire _T_838 = _T_837 & stbuf_vld_1; // @[el2_lsu_stbuf.scala 199:138] - wire _T_841 = stbuf_match_lo[1] & stbuf_byteen_1[1]; // @[el2_lsu_stbuf.scala 199:117] - wire _T_842 = _T_841 & stbuf_vld_1; // @[el2_lsu_stbuf.scala 199:138] - wire _T_845 = stbuf_match_lo[1] & stbuf_byteen_1[2]; // @[el2_lsu_stbuf.scala 199:117] - wire _T_846 = _T_845 & stbuf_vld_1; // @[el2_lsu_stbuf.scala 199:138] - wire _T_849 = stbuf_match_lo[1] & stbuf_byteen_1[3]; // @[el2_lsu_stbuf.scala 199:117] - wire _T_850 = _T_849 & stbuf_vld_1; // @[el2_lsu_stbuf.scala 199:138] - wire [3:0] stbuf_fwdbyteenvec_lo_1 = {_T_850,_T_846,_T_842,_T_838}; // @[Cat.scala 29:58] - wire _T_855 = stbuf_match_lo[2] & stbuf_byteen_2[0]; // @[el2_lsu_stbuf.scala 199:117] - wire _T_856 = _T_855 & stbuf_vld_2; // @[el2_lsu_stbuf.scala 199:138] - wire _T_859 = stbuf_match_lo[2] & stbuf_byteen_2[1]; // @[el2_lsu_stbuf.scala 199:117] - wire _T_860 = _T_859 & stbuf_vld_2; // @[el2_lsu_stbuf.scala 199:138] - wire _T_863 = stbuf_match_lo[2] & stbuf_byteen_2[2]; // @[el2_lsu_stbuf.scala 199:117] - wire _T_864 = _T_863 & stbuf_vld_2; // @[el2_lsu_stbuf.scala 199:138] - wire _T_867 = stbuf_match_lo[2] & stbuf_byteen_2[3]; // @[el2_lsu_stbuf.scala 199:117] - wire _T_868 = _T_867 & stbuf_vld_2; // @[el2_lsu_stbuf.scala 199:138] - wire [3:0] stbuf_fwdbyteenvec_lo_2 = {_T_868,_T_864,_T_860,_T_856}; // @[Cat.scala 29:58] - wire _T_873 = stbuf_match_lo[3] & stbuf_byteen_3[0]; // @[el2_lsu_stbuf.scala 199:117] - wire _T_874 = _T_873 & stbuf_vld_3; // @[el2_lsu_stbuf.scala 199:138] - wire _T_877 = stbuf_match_lo[3] & stbuf_byteen_3[1]; // @[el2_lsu_stbuf.scala 199:117] - wire _T_878 = _T_877 & stbuf_vld_3; // @[el2_lsu_stbuf.scala 199:138] - wire _T_881 = stbuf_match_lo[3] & stbuf_byteen_3[2]; // @[el2_lsu_stbuf.scala 199:117] - wire _T_882 = _T_881 & stbuf_vld_3; // @[el2_lsu_stbuf.scala 199:138] - wire _T_885 = stbuf_match_lo[3] & stbuf_byteen_3[3]; // @[el2_lsu_stbuf.scala 199:117] - wire _T_886 = _T_885 & stbuf_vld_3; // @[el2_lsu_stbuf.scala 199:138] - wire [3:0] stbuf_fwdbyteenvec_lo_3 = {_T_886,_T_882,_T_878,_T_874}; // @[Cat.scala 29:58] - wire _T_893 = stbuf_fwdbyteenvec_hi_0[3] | stbuf_fwdbyteenvec_hi_0[2]; // @[el2_lsu_stbuf.scala 200:156] - wire _T_894 = _T_893 | stbuf_fwdbyteenvec_hi_0[1]; // @[el2_lsu_stbuf.scala 200:156] - wire stbuf_fwdbyteen_hi_pre_m_0 = _T_894 | stbuf_fwdbyteenvec_hi_0[0]; // @[el2_lsu_stbuf.scala 200:156] - wire _T_899 = stbuf_fwdbyteenvec_hi_1[3] | stbuf_fwdbyteenvec_hi_1[2]; // @[el2_lsu_stbuf.scala 200:156] - wire _T_900 = _T_899 | stbuf_fwdbyteenvec_hi_1[1]; // @[el2_lsu_stbuf.scala 200:156] - wire stbuf_fwdbyteen_hi_pre_m_1 = _T_900 | stbuf_fwdbyteenvec_hi_1[0]; // @[el2_lsu_stbuf.scala 200:156] - wire _T_905 = stbuf_fwdbyteenvec_hi_2[3] | stbuf_fwdbyteenvec_hi_2[2]; // @[el2_lsu_stbuf.scala 200:156] - wire _T_906 = _T_905 | stbuf_fwdbyteenvec_hi_2[1]; // @[el2_lsu_stbuf.scala 200:156] - wire stbuf_fwdbyteen_hi_pre_m_2 = _T_906 | stbuf_fwdbyteenvec_hi_2[0]; // @[el2_lsu_stbuf.scala 200:156] - wire _T_911 = stbuf_fwdbyteenvec_hi_3[3] | stbuf_fwdbyteenvec_hi_3[2]; // @[el2_lsu_stbuf.scala 200:156] - wire _T_912 = _T_911 | stbuf_fwdbyteenvec_hi_3[1]; // @[el2_lsu_stbuf.scala 200:156] - wire stbuf_fwdbyteen_hi_pre_m_3 = _T_912 | stbuf_fwdbyteenvec_hi_3[0]; // @[el2_lsu_stbuf.scala 200:156] - wire _T_917 = stbuf_fwdbyteenvec_lo_0[3] | stbuf_fwdbyteenvec_lo_0[2]; // @[el2_lsu_stbuf.scala 201:156] - wire _T_918 = _T_917 | stbuf_fwdbyteenvec_lo_0[1]; // @[el2_lsu_stbuf.scala 201:156] - wire stbuf_fwdbyteen_lo_pre_m_0 = _T_918 | stbuf_fwdbyteenvec_lo_0[0]; // @[el2_lsu_stbuf.scala 201:156] - wire _T_923 = stbuf_fwdbyteenvec_lo_1[3] | stbuf_fwdbyteenvec_lo_1[2]; // @[el2_lsu_stbuf.scala 201:156] - wire _T_924 = _T_923 | stbuf_fwdbyteenvec_lo_1[1]; // @[el2_lsu_stbuf.scala 201:156] - wire stbuf_fwdbyteen_lo_pre_m_1 = _T_924 | stbuf_fwdbyteenvec_lo_1[0]; // @[el2_lsu_stbuf.scala 201:156] - wire _T_929 = stbuf_fwdbyteenvec_lo_2[3] | stbuf_fwdbyteenvec_lo_2[2]; // @[el2_lsu_stbuf.scala 201:156] - wire _T_930 = _T_929 | stbuf_fwdbyteenvec_lo_2[1]; // @[el2_lsu_stbuf.scala 201:156] - wire stbuf_fwdbyteen_lo_pre_m_2 = _T_930 | stbuf_fwdbyteenvec_lo_2[0]; // @[el2_lsu_stbuf.scala 201:156] - wire _T_935 = stbuf_fwdbyteenvec_lo_3[3] | stbuf_fwdbyteenvec_lo_3[2]; // @[el2_lsu_stbuf.scala 201:156] - wire _T_936 = _T_935 | stbuf_fwdbyteenvec_lo_3[1]; // @[el2_lsu_stbuf.scala 201:156] - wire stbuf_fwdbyteen_lo_pre_m_3 = _T_936 | stbuf_fwdbyteenvec_lo_3[0]; // @[el2_lsu_stbuf.scala 201:156] - wire [31:0] _T_939 = stbuf_match_hi[0] ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] - wire [31:0] _T_940 = _T_939 & stbuf_data_0; // @[el2_lsu_stbuf.scala 203:98] - wire [31:0] _T_943 = stbuf_match_hi[1] ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] - wire [31:0] _T_944 = _T_943 & stbuf_data_1; // @[el2_lsu_stbuf.scala 203:98] - wire [31:0] _T_947 = stbuf_match_hi[2] ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] - wire [31:0] _T_948 = _T_947 & stbuf_data_2; // @[el2_lsu_stbuf.scala 203:98] - wire [31:0] _T_951 = stbuf_match_hi[3] ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] - wire [31:0] _T_952 = _T_951 & stbuf_data_3; // @[el2_lsu_stbuf.scala 203:98] - wire [31:0] _T_954 = _T_940 | _T_944; // @[el2_lsu_stbuf.scala 203:123] - wire [31:0] _T_955 = _T_954 | _T_948; // @[el2_lsu_stbuf.scala 203:123] - wire [31:0] stbuf_fwddata_hi_pre_m = _T_955 | _T_952; // @[el2_lsu_stbuf.scala 203:123] - wire [31:0] _T_958 = stbuf_match_lo[0] ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] - wire [31:0] _T_959 = _T_958 & stbuf_data_0; // @[el2_lsu_stbuf.scala 204:98] - wire [31:0] _T_962 = stbuf_match_lo[1] ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] - wire [31:0] _T_963 = _T_962 & stbuf_data_1; // @[el2_lsu_stbuf.scala 204:98] - wire [31:0] _T_966 = stbuf_match_lo[2] ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] - wire [31:0] _T_967 = _T_966 & stbuf_data_2; // @[el2_lsu_stbuf.scala 204:98] - wire [31:0] _T_970 = stbuf_match_lo[3] ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] - wire [31:0] _T_971 = _T_970 & stbuf_data_3; // @[el2_lsu_stbuf.scala 204:98] - wire [31:0] _T_973 = _T_959 | _T_963; // @[el2_lsu_stbuf.scala 204:123] - wire [31:0] _T_974 = _T_973 | _T_967; // @[el2_lsu_stbuf.scala 204:123] - wire [31:0] stbuf_fwddata_lo_pre_m = _T_974 | _T_971; // @[el2_lsu_stbuf.scala 204:123] - wire _T_979 = io_lsu_addr_m[31:2] == io_lsu_addr_r[31:2]; // @[el2_lsu_stbuf.scala 210:50] - wire _T_980 = _T_979 & io_lsu_pkt_r_valid; // @[el2_lsu_stbuf.scala 210:75] - wire _T_981 = _T_980 & io_lsu_pkt_r_store; // @[el2_lsu_stbuf.scala 210:96] - wire ld_addr_rhit_lo_lo = _T_981 & _T_637; // @[el2_lsu_stbuf.scala 210:117] - wire _T_985 = io_end_addr_m[31:2] == io_lsu_addr_r[31:2]; // @[el2_lsu_stbuf.scala 211:50] - wire _T_986 = _T_985 & io_lsu_pkt_r_valid; // @[el2_lsu_stbuf.scala 211:75] - wire _T_987 = _T_986 & io_lsu_pkt_r_store; // @[el2_lsu_stbuf.scala 211:96] - wire ld_addr_rhit_lo_hi = _T_987 & _T_637; // @[el2_lsu_stbuf.scala 211:117] - wire _T_991 = io_lsu_addr_m[31:2] == io_end_addr_r[31:2]; // @[el2_lsu_stbuf.scala 212:50] - wire _T_992 = _T_991 & io_lsu_pkt_r_valid; // @[el2_lsu_stbuf.scala 212:75] - wire _T_993 = _T_992 & io_lsu_pkt_r_store; // @[el2_lsu_stbuf.scala 212:96] - wire _T_995 = _T_993 & _T_637; // @[el2_lsu_stbuf.scala 212:117] - wire ld_addr_rhit_hi_lo = _T_995 & dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 212:137] - wire _T_998 = io_end_addr_m[31:2] == io_end_addr_r[31:2]; // @[el2_lsu_stbuf.scala 213:50] - wire _T_999 = _T_998 & io_lsu_pkt_r_valid; // @[el2_lsu_stbuf.scala 213:75] - wire _T_1000 = _T_999 & io_lsu_pkt_r_store; // @[el2_lsu_stbuf.scala 213:96] - wire _T_1002 = _T_1000 & _T_637; // @[el2_lsu_stbuf.scala 213:117] - wire ld_addr_rhit_hi_hi = _T_1002 & dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 213:137] - wire _T_1004 = ld_addr_rhit_lo_lo & store_byteen_ext_r[0]; // @[el2_lsu_stbuf.scala 215:80] - wire _T_1006 = ld_addr_rhit_lo_lo & store_byteen_ext_r[1]; // @[el2_lsu_stbuf.scala 215:80] - wire _T_1008 = ld_addr_rhit_lo_lo & store_byteen_ext_r[2]; // @[el2_lsu_stbuf.scala 215:80] - wire _T_1010 = ld_addr_rhit_lo_lo & store_byteen_ext_r[3]; // @[el2_lsu_stbuf.scala 215:80] - wire [3:0] _T_1013 = {_T_1010,_T_1008,_T_1006,_T_1004}; // @[Cat.scala 29:58] - wire _T_1015 = ld_addr_rhit_lo_hi & store_byteen_ext_r[0]; // @[el2_lsu_stbuf.scala 216:80] - wire _T_1017 = ld_addr_rhit_lo_hi & store_byteen_ext_r[1]; // @[el2_lsu_stbuf.scala 216:80] - wire _T_1019 = ld_addr_rhit_lo_hi & store_byteen_ext_r[2]; // @[el2_lsu_stbuf.scala 216:80] - wire _T_1021 = ld_addr_rhit_lo_hi & store_byteen_ext_r[3]; // @[el2_lsu_stbuf.scala 216:80] - wire [3:0] _T_1024 = {_T_1021,_T_1019,_T_1017,_T_1015}; // @[Cat.scala 29:58] - wire _T_1026 = ld_addr_rhit_hi_lo & store_byteen_ext_r[4]; // @[el2_lsu_stbuf.scala 217:80] - wire _T_1028 = ld_addr_rhit_hi_lo & store_byteen_ext_r[5]; // @[el2_lsu_stbuf.scala 217:80] - wire _T_1030 = ld_addr_rhit_hi_lo & store_byteen_ext_r[6]; // @[el2_lsu_stbuf.scala 217:80] - wire _T_1032 = ld_addr_rhit_hi_lo & store_byteen_ext_r[7]; // @[el2_lsu_stbuf.scala 217:80] - wire [3:0] _T_1035 = {_T_1032,_T_1030,_T_1028,_T_1026}; // @[Cat.scala 29:58] - wire _T_1037 = ld_addr_rhit_hi_hi & store_byteen_ext_r[4]; // @[el2_lsu_stbuf.scala 218:80] - wire _T_1039 = ld_addr_rhit_hi_hi & store_byteen_ext_r[5]; // @[el2_lsu_stbuf.scala 218:80] - wire _T_1041 = ld_addr_rhit_hi_hi & store_byteen_ext_r[6]; // @[el2_lsu_stbuf.scala 218:80] - wire _T_1043 = ld_addr_rhit_hi_hi & store_byteen_ext_r[7]; // @[el2_lsu_stbuf.scala 218:80] - wire [3:0] _T_1046 = {_T_1043,_T_1041,_T_1039,_T_1037}; // @[Cat.scala 29:58] - wire [31:0] ld_byte_rhit_hi_lo = {{28'd0}, _T_1035}; // @[el2_lsu_stbuf.scala 217:23] - wire [31:0] ld_byte_rhit_lo_lo = {{28'd0}, _T_1013}; // @[el2_lsu_stbuf.scala 215:23] - wire [31:0] _GEN_42 = {{31'd0}, ld_byte_rhit_hi_lo[0]}; // @[el2_lsu_stbuf.scala 220:77] - wire [31:0] _T_1048 = ld_byte_rhit_lo_lo | _GEN_42; // @[el2_lsu_stbuf.scala 220:77] - wire [31:0] _GEN_43 = {{31'd0}, ld_byte_rhit_hi_lo[1]}; // @[el2_lsu_stbuf.scala 220:77] - wire [31:0] _T_1050 = ld_byte_rhit_lo_lo | _GEN_43; // @[el2_lsu_stbuf.scala 220:77] - wire [31:0] _GEN_44 = {{31'd0}, ld_byte_rhit_hi_lo[2]}; // @[el2_lsu_stbuf.scala 220:77] - wire [31:0] _T_1052 = ld_byte_rhit_lo_lo | _GEN_44; // @[el2_lsu_stbuf.scala 220:77] - wire [31:0] _GEN_45 = {{31'd0}, ld_byte_rhit_hi_lo[3]}; // @[el2_lsu_stbuf.scala 220:77] - wire [31:0] _T_1054 = ld_byte_rhit_lo_lo | _GEN_45; // @[el2_lsu_stbuf.scala 220:77] - wire [127:0] _T_1057 = {_T_1054,_T_1052,_T_1050,_T_1048}; // @[Cat.scala 29:58] - wire [31:0] ld_byte_rhit_hi_hi = {{28'd0}, _T_1046}; // @[el2_lsu_stbuf.scala 218:23] - wire [31:0] ld_byte_rhit_lo_hi = {{28'd0}, _T_1024}; // @[el2_lsu_stbuf.scala 216:23] - wire [31:0] _GEN_46 = {{31'd0}, ld_byte_rhit_hi_hi[0]}; // @[el2_lsu_stbuf.scala 221:77] - wire [31:0] _T_1059 = ld_byte_rhit_lo_hi | _GEN_46; // @[el2_lsu_stbuf.scala 221:77] - wire [31:0] _GEN_47 = {{31'd0}, ld_byte_rhit_hi_hi[1]}; // @[el2_lsu_stbuf.scala 221:77] - wire [31:0] _T_1061 = ld_byte_rhit_lo_hi | _GEN_47; // @[el2_lsu_stbuf.scala 221:77] - wire [31:0] _GEN_48 = {{31'd0}, ld_byte_rhit_hi_hi[2]}; // @[el2_lsu_stbuf.scala 221:77] - wire [31:0] _T_1063 = ld_byte_rhit_lo_hi | _GEN_48; // @[el2_lsu_stbuf.scala 221:77] - wire [31:0] _GEN_49 = {{31'd0}, ld_byte_rhit_hi_hi[3]}; // @[el2_lsu_stbuf.scala 221:77] - wire [31:0] _T_1065 = ld_byte_rhit_lo_hi | _GEN_49; // @[el2_lsu_stbuf.scala 221:77] - wire [127:0] _T_1068 = {_T_1065,_T_1063,_T_1061,_T_1059}; // @[Cat.scala 29:58] - wire [7:0] _T_1071 = ld_byte_rhit_lo_lo[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] - wire [7:0] _T_1073 = _T_1071 & io_store_data_lo_r[7:0]; // @[el2_lsu_stbuf.scala 223:54] - wire [7:0] _T_1076 = ld_byte_rhit_hi_lo[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] - wire [7:0] _T_1078 = _T_1076 & io_store_data_hi_r[7:0]; // @[el2_lsu_stbuf.scala 223:115] - wire [7:0] fwdpipe1_lo = _T_1073 | _T_1078; // @[el2_lsu_stbuf.scala 223:81] - wire [7:0] _T_1081 = ld_byte_rhit_lo_lo[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] - wire [7:0] _T_1083 = _T_1081 & io_store_data_lo_r[15:8]; // @[el2_lsu_stbuf.scala 224:54] - wire [7:0] _T_1086 = ld_byte_rhit_hi_lo[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] - wire [7:0] _T_1088 = _T_1086 & io_store_data_hi_r[15:8]; // @[el2_lsu_stbuf.scala 224:116] - wire [7:0] fwdpipe2_lo = _T_1083 | _T_1088; // @[el2_lsu_stbuf.scala 224:82] - wire [7:0] _T_1091 = ld_byte_rhit_lo_lo[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] - wire [7:0] _T_1093 = _T_1091 & io_store_data_lo_r[23:16]; // @[el2_lsu_stbuf.scala 225:54] - wire [7:0] _T_1096 = ld_byte_rhit_hi_lo[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] - wire [7:0] _T_1098 = _T_1096 & io_store_data_hi_r[23:16]; // @[el2_lsu_stbuf.scala 225:117] - wire [7:0] fwdpipe3_lo = _T_1093 | _T_1098; // @[el2_lsu_stbuf.scala 225:83] - wire [7:0] _T_1101 = ld_byte_rhit_lo_lo[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] - wire [7:0] _T_1103 = _T_1101 & io_store_data_lo_r[31:24]; // @[el2_lsu_stbuf.scala 226:54] - wire [7:0] _T_1106 = ld_byte_rhit_hi_lo[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] - wire [23:0] _GEN_50 = {{16'd0}, _T_1106}; // @[el2_lsu_stbuf.scala 226:117] - wire [23:0] _T_1108 = _GEN_50 & io_store_data_hi_r[31:8]; // @[el2_lsu_stbuf.scala 226:117] - wire [23:0] _GEN_51 = {{16'd0}, _T_1103}; // @[el2_lsu_stbuf.scala 226:83] - wire [23:0] fwdpipe4_lo = _GEN_51 | _T_1108; // @[el2_lsu_stbuf.scala 226:83] - wire [47:0] _T_1111 = {fwdpipe4_lo,fwdpipe3_lo,fwdpipe2_lo,fwdpipe1_lo}; // @[Cat.scala 29:58] - wire [7:0] _T_1114 = ld_byte_rhit_lo_hi[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] - wire [7:0] _T_1116 = _T_1114 & io_store_data_lo_r[7:0]; // @[el2_lsu_stbuf.scala 229:54] - wire [7:0] _T_1119 = ld_byte_rhit_hi_hi[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] - wire [7:0] _T_1121 = _T_1119 & io_store_data_hi_r[7:0]; // @[el2_lsu_stbuf.scala 229:115] - wire [7:0] fwdpipe1_hi = _T_1116 | _T_1121; // @[el2_lsu_stbuf.scala 229:81] - wire [7:0] _T_1124 = ld_byte_rhit_lo_hi[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] - wire [7:0] _T_1126 = _T_1124 & io_store_data_lo_r[15:8]; // @[el2_lsu_stbuf.scala 230:54] - wire [7:0] _T_1129 = ld_byte_rhit_hi_hi[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] - wire [7:0] _T_1131 = _T_1129 & io_store_data_hi_r[15:8]; // @[el2_lsu_stbuf.scala 230:116] - wire [7:0] fwdpipe2_hi = _T_1126 | _T_1131; // @[el2_lsu_stbuf.scala 230:82] - wire [7:0] _T_1134 = ld_byte_rhit_lo_hi[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] - wire [7:0] _T_1136 = _T_1134 & io_store_data_lo_r[23:16]; // @[el2_lsu_stbuf.scala 231:54] - wire [7:0] _T_1139 = ld_byte_rhit_hi_hi[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] - wire [7:0] _T_1141 = _T_1139 & io_store_data_hi_r[23:16]; // @[el2_lsu_stbuf.scala 231:117] - wire [7:0] fwdpipe3_hi = _T_1136 | _T_1141; // @[el2_lsu_stbuf.scala 231:83] - wire [7:0] _T_1144 = ld_byte_rhit_lo_hi[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] - wire [7:0] _T_1146 = _T_1144 & io_store_data_lo_r[31:24]; // @[el2_lsu_stbuf.scala 232:54] - wire [7:0] _T_1149 = ld_byte_rhit_hi_hi[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] - wire [23:0] _GEN_52 = {{16'd0}, _T_1149}; // @[el2_lsu_stbuf.scala 232:117] - wire [23:0] _T_1151 = _GEN_52 & io_store_data_hi_r[31:8]; // @[el2_lsu_stbuf.scala 232:117] - wire [23:0] _GEN_53 = {{16'd0}, _T_1146}; // @[el2_lsu_stbuf.scala 232:83] - wire [23:0] fwdpipe4_hi = _GEN_53 | _T_1151; // @[el2_lsu_stbuf.scala 232:83] - wire [47:0] _T_1154 = {fwdpipe4_hi,fwdpipe3_hi,fwdpipe2_hi,fwdpipe1_hi}; // @[Cat.scala 29:58] - wire [2:0] _T_1164 = {stbuf_fwdbyteen_hi_pre_m_3,stbuf_fwdbyteen_hi_pre_m_2,stbuf_fwdbyteen_hi_pre_m_1}; // @[Cat.scala 29:58] - wire [2:0] _T_1175 = {stbuf_fwdbyteen_lo_pre_m_3,stbuf_fwdbyteen_lo_pre_m_2,stbuf_fwdbyteen_lo_pre_m_1}; // @[Cat.scala 29:58] - wire [3:0] ld_byte_rhit_lo = _T_1057[3:0]; // @[el2_lsu_stbuf.scala 220:20] - wire [31:0] ld_fwddata_rpipe_lo = _T_1111[31:0]; // @[el2_lsu_stbuf.scala 227:24] - wire [7:0] stbuf_fwdpipe1_lo = ld_byte_rhit_lo[0] ? ld_fwddata_rpipe_lo[7:0] : stbuf_fwddata_lo_pre_m[7:0]; // @[el2_lsu_stbuf.scala 239:31] - wire [7:0] stbuf_fwdpipe2_lo = ld_byte_rhit_lo[1] ? ld_fwddata_rpipe_lo[15:8] : stbuf_fwddata_lo_pre_m[15:8]; // @[el2_lsu_stbuf.scala 240:31] - wire [7:0] stbuf_fwdpipe3_lo = ld_byte_rhit_lo[2] ? ld_fwddata_rpipe_lo[23:16] : stbuf_fwddata_lo_pre_m[23:16]; // @[el2_lsu_stbuf.scala 241:31] - wire [7:0] stbuf_fwdpipe4_lo = ld_byte_rhit_lo[3] ? ld_fwddata_rpipe_lo[31:24] : stbuf_fwddata_lo_pre_m[31:24]; // @[el2_lsu_stbuf.scala 242:31] - wire [15:0] _T_1189 = {stbuf_fwdpipe2_lo,stbuf_fwdpipe1_lo}; // @[Cat.scala 29:58] - wire [15:0] _T_1190 = {stbuf_fwdpipe4_lo,stbuf_fwdpipe3_lo}; // @[Cat.scala 29:58] - wire [3:0] ld_byte_rhit_hi = _T_1068[3:0]; // @[el2_lsu_stbuf.scala 221:20] - wire [31:0] ld_fwddata_rpipe_hi = _T_1154[31:0]; // @[el2_lsu_stbuf.scala 233:24] - wire [7:0] stbuf_fwdpipe1_hi = ld_byte_rhit_hi[0] ? ld_fwddata_rpipe_hi[7:0] : stbuf_fwddata_hi_pre_m[7:0]; // @[el2_lsu_stbuf.scala 245:31] - wire [7:0] stbuf_fwdpipe2_hi = ld_byte_rhit_hi[1] ? ld_fwddata_rpipe_hi[15:8] : stbuf_fwddata_hi_pre_m[15:8]; // @[el2_lsu_stbuf.scala 246:31] - wire [7:0] stbuf_fwdpipe3_hi = ld_byte_rhit_hi[2] ? ld_fwddata_rpipe_hi[23:16] : stbuf_fwddata_hi_pre_m[23:16]; // @[el2_lsu_stbuf.scala 247:31] - wire [7:0] stbuf_fwdpipe4_hi = ld_byte_rhit_hi[3] ? ld_fwddata_rpipe_hi[31:24] : stbuf_fwddata_hi_pre_m[31:24]; // @[el2_lsu_stbuf.scala 248:31] - wire [15:0] _T_1204 = {stbuf_fwdpipe2_hi,stbuf_fwdpipe1_hi}; // @[Cat.scala 29:58] - wire [15:0] _T_1205 = {stbuf_fwdpipe4_hi,stbuf_fwdpipe3_hi}; // @[Cat.scala 29:58] - assign io_stbuf_reqvld_any = _T_603 & _T_605; // @[el2_lsu_stbuf.scala 50:47 el2_lsu_stbuf.scala 165:25] - assign io_stbuf_reqvld_flushed_any = _GEN_23 & _GEN_27; // @[el2_lsu_stbuf.scala 51:36 el2_lsu_stbuf.scala 164:32] - assign io_stbuf_addr_any = 2'h3 == RdPtr ? stbuf_addr_3 : _GEN_30; // @[el2_lsu_stbuf.scala 52:35 el2_lsu_stbuf.scala 166:23] - assign io_stbuf_data_any = 2'h3 == RdPtr ? stbuf_data_3 : _GEN_34; // @[el2_lsu_stbuf.scala 53:35 el2_lsu_stbuf.scala 167:23] - assign io_lsu_stbuf_full_any = _T_650 ? _T_652 : _T_653; // @[el2_lsu_stbuf.scala 54:43 el2_lsu_stbuf.scala 183:27] - assign io_lsu_stbuf_empty_any = stbuf_numvld_any == 4'h0; // @[el2_lsu_stbuf.scala 55:43 el2_lsu_stbuf.scala 184:27] - assign io_ldst_stbuf_reqvld_r = io_lsu_commit_r & io_store_stbuf_reqvld_r; // @[el2_lsu_stbuf.scala 56:43 el2_lsu_stbuf.scala 122:27] - assign io_stbuf_fwddata_hi_m = {_T_1205,_T_1204}; // @[el2_lsu_stbuf.scala 57:43 el2_lsu_stbuf.scala 249:26] - assign io_stbuf_fwddata_lo_m = {_T_1190,_T_1189}; // @[el2_lsu_stbuf.scala 58:43 el2_lsu_stbuf.scala 243:26] - assign io_stbuf_fwdbyteen_hi_m = {_T_1164,stbuf_fwdbyteen_hi_pre_m_0}; // @[el2_lsu_stbuf.scala 59:37 el2_lsu_stbuf.scala 235:28] - assign io_stbuf_fwdbyteen_lo_m = {_T_1175,stbuf_fwdbyteen_lo_pre_m_0}; // @[el2_lsu_stbuf.scala 60:37 el2_lsu_stbuf.scala 236:28] + wire _T_560 = stbuf_wr_en[0] | stbuf_vld[0]; // @[el2_lsu_stbuf.scala 164:92] + wire _T_568 = stbuf_wr_en[1] | stbuf_vld[1]; // @[el2_lsu_stbuf.scala 164:92] + wire _T_576 = stbuf_wr_en[2] | stbuf_vld[2]; // @[el2_lsu_stbuf.scala 164:92] + wire _T_584 = stbuf_wr_en[3] | stbuf_vld[3]; // @[el2_lsu_stbuf.scala 164:92] + wire [15:0] cmpaddr_hi_m = {{2'd0}, io_end_addr_m[15:2]}; // @[el2_lsu_stbuf.scala 206:17] + wire _T_789 = stbuf_addr_3[15:2] == cmpaddr_hi_m[13:0]; // @[el2_lsu_stbuf.scala 212:116] + wire _T_791 = _T_789 & stbuf_vld[3]; // @[el2_lsu_stbuf.scala 212:140] + wire _T_794 = _T_791 & _T_64; // @[el2_lsu_stbuf.scala 212:155] + wire _T_795 = _T_794 & io_addr_in_dccm_m; // @[el2_lsu_stbuf.scala 212:176] + wire _T_780 = stbuf_addr_2[15:2] == cmpaddr_hi_m[13:0]; // @[el2_lsu_stbuf.scala 212:116] + wire _T_782 = _T_780 & stbuf_vld[2]; // @[el2_lsu_stbuf.scala 212:140] + wire _T_785 = _T_782 & _T_53; // @[el2_lsu_stbuf.scala 212:155] + wire _T_786 = _T_785 & io_addr_in_dccm_m; // @[el2_lsu_stbuf.scala 212:176] + wire _T_771 = stbuf_addr_1[15:2] == cmpaddr_hi_m[13:0]; // @[el2_lsu_stbuf.scala 212:116] + wire _T_773 = _T_771 & stbuf_vld[1]; // @[el2_lsu_stbuf.scala 212:140] + wire _T_776 = _T_773 & _T_42; // @[el2_lsu_stbuf.scala 212:155] + wire _T_777 = _T_776 & io_addr_in_dccm_m; // @[el2_lsu_stbuf.scala 212:176] + wire _T_762 = stbuf_addr_0[15:2] == cmpaddr_hi_m[13:0]; // @[el2_lsu_stbuf.scala 212:116] + wire _T_764 = _T_762 & stbuf_vld[0]; // @[el2_lsu_stbuf.scala 212:140] + wire _T_767 = _T_764 & _T_31; // @[el2_lsu_stbuf.scala 212:155] + wire _T_768 = _T_767 & io_addr_in_dccm_m; // @[el2_lsu_stbuf.scala 212:176] + wire [3:0] stbuf_match_hi = {_T_795,_T_786,_T_777,_T_768}; // @[Cat.scala 29:58] + wire [15:0] cmpaddr_lo_m = {{2'd0}, io_lsu_addr_m[15:2]}; // @[el2_lsu_stbuf.scala 209:18] + wire _T_827 = stbuf_addr_3[15:2] == cmpaddr_lo_m[13:0]; // @[el2_lsu_stbuf.scala 213:116] + wire _T_829 = _T_827 & stbuf_vld[3]; // @[el2_lsu_stbuf.scala 213:140] + wire _T_832 = _T_829 & _T_64; // @[el2_lsu_stbuf.scala 213:155] + wire _T_833 = _T_832 & io_addr_in_dccm_m; // @[el2_lsu_stbuf.scala 213:176] + wire _T_818 = stbuf_addr_2[15:2] == cmpaddr_lo_m[13:0]; // @[el2_lsu_stbuf.scala 213:116] + wire _T_820 = _T_818 & stbuf_vld[2]; // @[el2_lsu_stbuf.scala 213:140] + wire _T_823 = _T_820 & _T_53; // @[el2_lsu_stbuf.scala 213:155] + wire _T_824 = _T_823 & io_addr_in_dccm_m; // @[el2_lsu_stbuf.scala 213:176] + wire _T_809 = stbuf_addr_1[15:2] == cmpaddr_lo_m[13:0]; // @[el2_lsu_stbuf.scala 213:116] + wire _T_811 = _T_809 & stbuf_vld[1]; // @[el2_lsu_stbuf.scala 213:140] + wire _T_814 = _T_811 & _T_42; // @[el2_lsu_stbuf.scala 213:155] + wire _T_815 = _T_814 & io_addr_in_dccm_m; // @[el2_lsu_stbuf.scala 213:176] + wire _T_800 = stbuf_addr_0[15:2] == cmpaddr_lo_m[13:0]; // @[el2_lsu_stbuf.scala 213:116] + wire _T_802 = _T_800 & stbuf_vld[0]; // @[el2_lsu_stbuf.scala 213:140] + wire _T_805 = _T_802 & _T_31; // @[el2_lsu_stbuf.scala 213:155] + wire _T_806 = _T_805 & io_addr_in_dccm_m; // @[el2_lsu_stbuf.scala 213:176] + wire [3:0] stbuf_match_lo = {_T_833,_T_824,_T_815,_T_806}; // @[Cat.scala 29:58] + wire _T_856 = stbuf_match_hi[3] | stbuf_match_lo[3]; // @[el2_lsu_stbuf.scala 214:79] + wire _T_857 = _T_856 & io_lsu_pkt_m_valid; // @[el2_lsu_stbuf.scala 214:100] + wire _T_858 = _T_857 & io_lsu_pkt_m_dma; // @[el2_lsu_stbuf.scala 214:121] + wire _T_859 = _T_858 & io_lsu_pkt_m_store; // @[el2_lsu_stbuf.scala 214:140] + wire _T_850 = stbuf_match_hi[2] | stbuf_match_lo[2]; // @[el2_lsu_stbuf.scala 214:79] + wire _T_851 = _T_850 & io_lsu_pkt_m_valid; // @[el2_lsu_stbuf.scala 214:100] + wire _T_852 = _T_851 & io_lsu_pkt_m_dma; // @[el2_lsu_stbuf.scala 214:121] + wire _T_853 = _T_852 & io_lsu_pkt_m_store; // @[el2_lsu_stbuf.scala 214:140] + wire _T_844 = stbuf_match_hi[1] | stbuf_match_lo[1]; // @[el2_lsu_stbuf.scala 214:79] + wire _T_845 = _T_844 & io_lsu_pkt_m_valid; // @[el2_lsu_stbuf.scala 214:100] + wire _T_846 = _T_845 & io_lsu_pkt_m_dma; // @[el2_lsu_stbuf.scala 214:121] + wire _T_847 = _T_846 & io_lsu_pkt_m_store; // @[el2_lsu_stbuf.scala 214:140] + wire _T_838 = stbuf_match_hi[0] | stbuf_match_lo[0]; // @[el2_lsu_stbuf.scala 214:79] + wire _T_839 = _T_838 & io_lsu_pkt_m_valid; // @[el2_lsu_stbuf.scala 214:100] + wire _T_840 = _T_839 & io_lsu_pkt_m_dma; // @[el2_lsu_stbuf.scala 214:121] + wire _T_841 = _T_840 & io_lsu_pkt_m_store; // @[el2_lsu_stbuf.scala 214:140] + wire [3:0] stbuf_dma_kill_en = {_T_859,_T_853,_T_847,_T_841}; // @[Cat.scala 29:58] + wire _T_595 = stbuf_dma_kill_en[0] | stbuf_dma_kill[0]; // @[el2_lsu_stbuf.scala 166:66] + wire _T_603 = stbuf_dma_kill_en[1] | stbuf_dma_kill[1]; // @[el2_lsu_stbuf.scala 166:66] + wire _T_611 = stbuf_dma_kill_en[2] | stbuf_dma_kill[2]; // @[el2_lsu_stbuf.scala 166:66] + wire _T_619 = stbuf_dma_kill_en[3] | stbuf_dma_kill[3]; // @[el2_lsu_stbuf.scala 166:66] + wire [3:0] _T_629 = stbuf_wr_en[0] ? stbuf_byteenin_0 : stbuf_byteen_0; // @[el2_lsu_stbuf.scala 167:96] + wire [3:0] _T_633 = _T_34 ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] + wire [3:0] _T_638 = stbuf_wr_en[1] ? stbuf_byteenin_1 : stbuf_byteen_1; // @[el2_lsu_stbuf.scala 167:96] + wire [3:0] _T_642 = _T_45 ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] + wire [3:0] _T_647 = stbuf_wr_en[2] ? stbuf_byteenin_2 : stbuf_byteen_2; // @[el2_lsu_stbuf.scala 167:96] + wire [3:0] _T_651 = _T_56 ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] + wire [3:0] _T_656 = stbuf_wr_en[3] ? stbuf_byteenin_3 : stbuf_byteen_3; // @[el2_lsu_stbuf.scala 167:96] + wire [3:0] _T_660 = _T_67 ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] + reg ldst_dual_m; // @[el2_lsu_stbuf.scala 176:53] + wire [3:0] _T_689 = stbuf_vld >> RdPtr; // @[el2_lsu_stbuf.scala 180:44] + wire [3:0] _T_691 = stbuf_dma_kill >> RdPtr; // @[el2_lsu_stbuf.scala 180:68] + wire _T_698 = ~_T_691[0]; // @[el2_lsu_stbuf.scala 181:47] + wire _T_699 = _T_689[0] & _T_698; // @[el2_lsu_stbuf.scala 181:45] + wire _T_700 = |stbuf_dma_kill_en; // @[el2_lsu_stbuf.scala 181:92] + wire _T_701 = ~_T_700; // @[el2_lsu_stbuf.scala 181:72] + wire [15:0] _GEN_9 = 2'h1 == RdPtr ? stbuf_addr_1 : stbuf_addr_0; // @[el2_lsu_stbuf.scala 182:23] + wire [15:0] _GEN_10 = 2'h2 == RdPtr ? stbuf_addr_2 : _GEN_9; // @[el2_lsu_stbuf.scala 182:23] + wire [31:0] _GEN_13 = 2'h1 == RdPtr ? stbuf_data_1 : stbuf_data_0; // @[el2_lsu_stbuf.scala 183:23] + wire [31:0] _GEN_14 = 2'h2 == RdPtr ? stbuf_data_2 : _GEN_13; // @[el2_lsu_stbuf.scala 183:23] + wire _T_703 = ~dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 185:44] + wire _T_704 = io_ldst_stbuf_reqvld_r & _T_703; // @[el2_lsu_stbuf.scala 185:42] + wire _T_705 = store_coalesce_hi_r | store_coalesce_lo_r; // @[el2_lsu_stbuf.scala 185:88] + wire _T_706 = ~_T_705; // @[el2_lsu_stbuf.scala 185:66] + wire _T_707 = _T_704 & _T_706; // @[el2_lsu_stbuf.scala 185:64] + wire _T_708 = io_ldst_stbuf_reqvld_r & dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 186:31] + wire _T_709 = store_coalesce_hi_r & store_coalesce_lo_r; // @[el2_lsu_stbuf.scala 186:77] + wire _T_710 = ~_T_709; // @[el2_lsu_stbuf.scala 186:55] + wire _T_711 = _T_708 & _T_710; // @[el2_lsu_stbuf.scala 186:53] + wire WrPtrEn = _T_707 | _T_711; // @[el2_lsu_stbuf.scala 185:113] + wire _T_716 = _T_708 & _T_706; // @[el2_lsu_stbuf.scala 187:68] + wire [3:0] _T_721 = {3'h0,stbuf_vld[0]}; // @[Cat.scala 29:58] + wire [3:0] _T_723 = {3'h0,stbuf_vld[1]}; // @[Cat.scala 29:58] + wire [3:0] _T_725 = {3'h0,stbuf_vld[2]}; // @[Cat.scala 29:58] + wire [3:0] _T_727 = {3'h0,stbuf_vld[3]}; // @[Cat.scala 29:58] + wire [3:0] _T_730 = _T_721 + _T_723; // @[el2_lsu_stbuf.scala 194:102] + wire [3:0] _T_732 = _T_730 + _T_725; // @[el2_lsu_stbuf.scala 194:102] + wire [3:0] stbuf_numvld_any = _T_732 + _T_727; // @[el2_lsu_stbuf.scala 194:102] + wire _T_734 = io_lsu_pkt_m_valid & io_lsu_pkt_m_store; // @[el2_lsu_stbuf.scala 195:40] + wire _T_735 = _T_734 & io_addr_in_dccm_m; // @[el2_lsu_stbuf.scala 195:61] + wire _T_736 = ~io_lsu_pkt_m_dma; // @[el2_lsu_stbuf.scala 195:83] + wire isdccmst_m = _T_735 & _T_736; // @[el2_lsu_stbuf.scala 195:81] + wire _T_737 = io_lsu_pkt_r_valid & io_lsu_pkt_r_store; // @[el2_lsu_stbuf.scala 196:40] + wire _T_738 = _T_737 & io_addr_in_dccm_r; // @[el2_lsu_stbuf.scala 196:61] + wire _T_739 = ~io_lsu_pkt_r_dma; // @[el2_lsu_stbuf.scala 196:83] + wire isdccmst_r = _T_738 & _T_739; // @[el2_lsu_stbuf.scala 196:81] + wire [1:0] _T_740 = {1'h0,isdccmst_m}; // @[Cat.scala 29:58] + wire _T_741 = isdccmst_m & ldst_dual_m; // @[el2_lsu_stbuf.scala 198:63] + wire [2:0] _GEN_22 = {{1'd0}, _T_740}; // @[el2_lsu_stbuf.scala 198:48] + wire [2:0] _T_742 = _GEN_22 << _T_741; // @[el2_lsu_stbuf.scala 198:48] + wire [1:0] _T_743 = {1'h0,isdccmst_r}; // @[Cat.scala 29:58] + wire _T_744 = isdccmst_r & ldst_dual_r; // @[el2_lsu_stbuf.scala 199:63] + wire [2:0] _GEN_23 = {{1'd0}, _T_743}; // @[el2_lsu_stbuf.scala 199:48] + wire [2:0] _T_745 = _GEN_23 << _T_744; // @[el2_lsu_stbuf.scala 199:48] + wire [1:0] stbuf_specvld_m = _T_742[1:0]; // @[el2_lsu_stbuf.scala 198:20] + wire [3:0] _T_746 = {2'h0,stbuf_specvld_m}; // @[Cat.scala 29:58] + wire [3:0] _T_748 = stbuf_numvld_any + _T_746; // @[el2_lsu_stbuf.scala 200:45] + wire [1:0] stbuf_specvld_r = _T_745[1:0]; // @[el2_lsu_stbuf.scala 199:20] + wire [3:0] _T_749 = {2'h0,stbuf_specvld_r}; // @[Cat.scala 29:58] + wire [3:0] stbuf_specvld_any = _T_748 + _T_749; // @[el2_lsu_stbuf.scala 200:79] + wire _T_751 = ~ldst_dual_d; // @[el2_lsu_stbuf.scala 202:35] + wire _T_752 = _T_751 & io_dec_lsu_valid_raw_d; // @[el2_lsu_stbuf.scala 202:48] + wire _T_754 = stbuf_specvld_any >= 4'h4; // @[el2_lsu_stbuf.scala 202:100] + wire _T_755 = stbuf_specvld_any >= 4'h3; // @[el2_lsu_stbuf.scala 202:141] + wire _T_865 = stbuf_match_hi[0] & stbuf_byteen_0[0]; // @[el2_lsu_stbuf.scala 217:117] + wire stbuf_fwdbyteenvec_hi_0_0 = _T_865 & stbuf_vld[0]; // @[el2_lsu_stbuf.scala 217:138] + wire _T_869 = stbuf_match_hi[0] & stbuf_byteen_0[1]; // @[el2_lsu_stbuf.scala 217:117] + wire stbuf_fwdbyteenvec_hi_0_1 = _T_869 & stbuf_vld[0]; // @[el2_lsu_stbuf.scala 217:138] + wire _T_873 = stbuf_match_hi[0] & stbuf_byteen_0[2]; // @[el2_lsu_stbuf.scala 217:117] + wire stbuf_fwdbyteenvec_hi_0_2 = _T_873 & stbuf_vld[0]; // @[el2_lsu_stbuf.scala 217:138] + wire _T_877 = stbuf_match_hi[0] & stbuf_byteen_0[3]; // @[el2_lsu_stbuf.scala 217:117] + wire stbuf_fwdbyteenvec_hi_0_3 = _T_877 & stbuf_vld[0]; // @[el2_lsu_stbuf.scala 217:138] + wire _T_881 = stbuf_match_hi[1] & stbuf_byteen_1[0]; // @[el2_lsu_stbuf.scala 217:117] + wire stbuf_fwdbyteenvec_hi_1_0 = _T_881 & stbuf_vld[1]; // @[el2_lsu_stbuf.scala 217:138] + wire _T_885 = stbuf_match_hi[1] & stbuf_byteen_1[1]; // @[el2_lsu_stbuf.scala 217:117] + wire stbuf_fwdbyteenvec_hi_1_1 = _T_885 & stbuf_vld[1]; // @[el2_lsu_stbuf.scala 217:138] + wire _T_889 = stbuf_match_hi[1] & stbuf_byteen_1[2]; // @[el2_lsu_stbuf.scala 217:117] + wire stbuf_fwdbyteenvec_hi_1_2 = _T_889 & stbuf_vld[1]; // @[el2_lsu_stbuf.scala 217:138] + wire _T_893 = stbuf_match_hi[1] & stbuf_byteen_1[3]; // @[el2_lsu_stbuf.scala 217:117] + wire stbuf_fwdbyteenvec_hi_1_3 = _T_893 & stbuf_vld[1]; // @[el2_lsu_stbuf.scala 217:138] + wire _T_897 = stbuf_match_hi[2] & stbuf_byteen_2[0]; // @[el2_lsu_stbuf.scala 217:117] + wire stbuf_fwdbyteenvec_hi_2_0 = _T_897 & stbuf_vld[2]; // @[el2_lsu_stbuf.scala 217:138] + wire _T_901 = stbuf_match_hi[2] & stbuf_byteen_2[1]; // @[el2_lsu_stbuf.scala 217:117] + wire stbuf_fwdbyteenvec_hi_2_1 = _T_901 & stbuf_vld[2]; // @[el2_lsu_stbuf.scala 217:138] + wire _T_905 = stbuf_match_hi[2] & stbuf_byteen_2[2]; // @[el2_lsu_stbuf.scala 217:117] + wire stbuf_fwdbyteenvec_hi_2_2 = _T_905 & stbuf_vld[2]; // @[el2_lsu_stbuf.scala 217:138] + wire _T_909 = stbuf_match_hi[2] & stbuf_byteen_2[3]; // @[el2_lsu_stbuf.scala 217:117] + wire stbuf_fwdbyteenvec_hi_2_3 = _T_909 & stbuf_vld[2]; // @[el2_lsu_stbuf.scala 217:138] + wire _T_913 = stbuf_match_hi[3] & stbuf_byteen_3[0]; // @[el2_lsu_stbuf.scala 217:117] + wire stbuf_fwdbyteenvec_hi_3_0 = _T_913 & stbuf_vld[3]; // @[el2_lsu_stbuf.scala 217:138] + wire _T_917 = stbuf_match_hi[3] & stbuf_byteen_3[1]; // @[el2_lsu_stbuf.scala 217:117] + wire stbuf_fwdbyteenvec_hi_3_1 = _T_917 & stbuf_vld[3]; // @[el2_lsu_stbuf.scala 217:138] + wire _T_921 = stbuf_match_hi[3] & stbuf_byteen_3[2]; // @[el2_lsu_stbuf.scala 217:117] + wire stbuf_fwdbyteenvec_hi_3_2 = _T_921 & stbuf_vld[3]; // @[el2_lsu_stbuf.scala 217:138] + wire _T_925 = stbuf_match_hi[3] & stbuf_byteen_3[3]; // @[el2_lsu_stbuf.scala 217:117] + wire stbuf_fwdbyteenvec_hi_3_3 = _T_925 & stbuf_vld[3]; // @[el2_lsu_stbuf.scala 217:138] + wire _T_929 = stbuf_match_lo[0] & stbuf_byteen_0[0]; // @[el2_lsu_stbuf.scala 218:117] + wire stbuf_fwdbyteenvec_lo_0_0 = _T_929 & stbuf_vld[0]; // @[el2_lsu_stbuf.scala 218:138] + wire _T_933 = stbuf_match_lo[0] & stbuf_byteen_0[1]; // @[el2_lsu_stbuf.scala 218:117] + wire stbuf_fwdbyteenvec_lo_0_1 = _T_933 & stbuf_vld[0]; // @[el2_lsu_stbuf.scala 218:138] + wire _T_937 = stbuf_match_lo[0] & stbuf_byteen_0[2]; // @[el2_lsu_stbuf.scala 218:117] + wire stbuf_fwdbyteenvec_lo_0_2 = _T_937 & stbuf_vld[0]; // @[el2_lsu_stbuf.scala 218:138] + wire _T_941 = stbuf_match_lo[0] & stbuf_byteen_0[3]; // @[el2_lsu_stbuf.scala 218:117] + wire stbuf_fwdbyteenvec_lo_0_3 = _T_941 & stbuf_vld[0]; // @[el2_lsu_stbuf.scala 218:138] + wire _T_945 = stbuf_match_lo[1] & stbuf_byteen_1[0]; // @[el2_lsu_stbuf.scala 218:117] + wire stbuf_fwdbyteenvec_lo_1_0 = _T_945 & stbuf_vld[1]; // @[el2_lsu_stbuf.scala 218:138] + wire _T_949 = stbuf_match_lo[1] & stbuf_byteen_1[1]; // @[el2_lsu_stbuf.scala 218:117] + wire stbuf_fwdbyteenvec_lo_1_1 = _T_949 & stbuf_vld[1]; // @[el2_lsu_stbuf.scala 218:138] + wire _T_953 = stbuf_match_lo[1] & stbuf_byteen_1[2]; // @[el2_lsu_stbuf.scala 218:117] + wire stbuf_fwdbyteenvec_lo_1_2 = _T_953 & stbuf_vld[1]; // @[el2_lsu_stbuf.scala 218:138] + wire _T_957 = stbuf_match_lo[1] & stbuf_byteen_1[3]; // @[el2_lsu_stbuf.scala 218:117] + wire stbuf_fwdbyteenvec_lo_1_3 = _T_957 & stbuf_vld[1]; // @[el2_lsu_stbuf.scala 218:138] + wire _T_961 = stbuf_match_lo[2] & stbuf_byteen_2[0]; // @[el2_lsu_stbuf.scala 218:117] + wire stbuf_fwdbyteenvec_lo_2_0 = _T_961 & stbuf_vld[2]; // @[el2_lsu_stbuf.scala 218:138] + wire _T_965 = stbuf_match_lo[2] & stbuf_byteen_2[1]; // @[el2_lsu_stbuf.scala 218:117] + wire stbuf_fwdbyteenvec_lo_2_1 = _T_965 & stbuf_vld[2]; // @[el2_lsu_stbuf.scala 218:138] + wire _T_969 = stbuf_match_lo[2] & stbuf_byteen_2[2]; // @[el2_lsu_stbuf.scala 218:117] + wire stbuf_fwdbyteenvec_lo_2_2 = _T_969 & stbuf_vld[2]; // @[el2_lsu_stbuf.scala 218:138] + wire _T_973 = stbuf_match_lo[2] & stbuf_byteen_2[3]; // @[el2_lsu_stbuf.scala 218:117] + wire stbuf_fwdbyteenvec_lo_2_3 = _T_973 & stbuf_vld[2]; // @[el2_lsu_stbuf.scala 218:138] + wire _T_977 = stbuf_match_lo[3] & stbuf_byteen_3[0]; // @[el2_lsu_stbuf.scala 218:117] + wire stbuf_fwdbyteenvec_lo_3_0 = _T_977 & stbuf_vld[3]; // @[el2_lsu_stbuf.scala 218:138] + wire _T_981 = stbuf_match_lo[3] & stbuf_byteen_3[1]; // @[el2_lsu_stbuf.scala 218:117] + wire stbuf_fwdbyteenvec_lo_3_1 = _T_981 & stbuf_vld[3]; // @[el2_lsu_stbuf.scala 218:138] + wire _T_985 = stbuf_match_lo[3] & stbuf_byteen_3[2]; // @[el2_lsu_stbuf.scala 218:117] + wire stbuf_fwdbyteenvec_lo_3_2 = _T_985 & stbuf_vld[3]; // @[el2_lsu_stbuf.scala 218:138] + wire _T_989 = stbuf_match_lo[3] & stbuf_byteen_3[3]; // @[el2_lsu_stbuf.scala 218:117] + wire stbuf_fwdbyteenvec_lo_3_3 = _T_989 & stbuf_vld[3]; // @[el2_lsu_stbuf.scala 218:138] + wire _T_991 = stbuf_fwdbyteenvec_hi_0_0 | stbuf_fwdbyteenvec_hi_1_0; // @[el2_lsu_stbuf.scala 219:148] + wire _T_992 = _T_991 | stbuf_fwdbyteenvec_hi_2_0; // @[el2_lsu_stbuf.scala 219:148] + wire stbuf_fwdbyteen_hi_pre_m_0 = _T_992 | stbuf_fwdbyteenvec_hi_3_0; // @[el2_lsu_stbuf.scala 219:148] + wire _T_993 = stbuf_fwdbyteenvec_hi_0_1 | stbuf_fwdbyteenvec_hi_1_1; // @[el2_lsu_stbuf.scala 219:148] + wire _T_994 = _T_993 | stbuf_fwdbyteenvec_hi_2_1; // @[el2_lsu_stbuf.scala 219:148] + wire stbuf_fwdbyteen_hi_pre_m_1 = _T_994 | stbuf_fwdbyteenvec_hi_3_1; // @[el2_lsu_stbuf.scala 219:148] + wire _T_995 = stbuf_fwdbyteenvec_hi_0_2 | stbuf_fwdbyteenvec_hi_1_2; // @[el2_lsu_stbuf.scala 219:148] + wire _T_996 = _T_995 | stbuf_fwdbyteenvec_hi_2_2; // @[el2_lsu_stbuf.scala 219:148] + wire stbuf_fwdbyteen_hi_pre_m_2 = _T_996 | stbuf_fwdbyteenvec_hi_3_2; // @[el2_lsu_stbuf.scala 219:148] + wire _T_997 = stbuf_fwdbyteenvec_hi_0_3 | stbuf_fwdbyteenvec_hi_1_3; // @[el2_lsu_stbuf.scala 219:148] + wire _T_998 = _T_997 | stbuf_fwdbyteenvec_hi_2_3; // @[el2_lsu_stbuf.scala 219:148] + wire stbuf_fwdbyteen_hi_pre_m_3 = _T_998 | stbuf_fwdbyteenvec_hi_3_3; // @[el2_lsu_stbuf.scala 219:148] + wire _T_999 = stbuf_fwdbyteenvec_lo_0_0 | stbuf_fwdbyteenvec_lo_1_0; // @[el2_lsu_stbuf.scala 220:148] + wire _T_1000 = _T_999 | stbuf_fwdbyteenvec_lo_2_0; // @[el2_lsu_stbuf.scala 220:148] + wire stbuf_fwdbyteen_lo_pre_m_0 = _T_1000 | stbuf_fwdbyteenvec_lo_3_0; // @[el2_lsu_stbuf.scala 220:148] + wire _T_1001 = stbuf_fwdbyteenvec_lo_0_1 | stbuf_fwdbyteenvec_lo_1_1; // @[el2_lsu_stbuf.scala 220:148] + wire _T_1002 = _T_1001 | stbuf_fwdbyteenvec_lo_2_1; // @[el2_lsu_stbuf.scala 220:148] + wire stbuf_fwdbyteen_lo_pre_m_1 = _T_1002 | stbuf_fwdbyteenvec_lo_3_1; // @[el2_lsu_stbuf.scala 220:148] + wire _T_1003 = stbuf_fwdbyteenvec_lo_0_2 | stbuf_fwdbyteenvec_lo_1_2; // @[el2_lsu_stbuf.scala 220:148] + wire _T_1004 = _T_1003 | stbuf_fwdbyteenvec_lo_2_2; // @[el2_lsu_stbuf.scala 220:148] + wire stbuf_fwdbyteen_lo_pre_m_2 = _T_1004 | stbuf_fwdbyteenvec_lo_3_2; // @[el2_lsu_stbuf.scala 220:148] + wire _T_1005 = stbuf_fwdbyteenvec_lo_0_3 | stbuf_fwdbyteenvec_lo_1_3; // @[el2_lsu_stbuf.scala 220:148] + wire _T_1006 = _T_1005 | stbuf_fwdbyteenvec_lo_2_3; // @[el2_lsu_stbuf.scala 220:148] + wire stbuf_fwdbyteen_lo_pre_m_3 = _T_1006 | stbuf_fwdbyteenvec_lo_3_3; // @[el2_lsu_stbuf.scala 220:148] + wire [31:0] _T_1009 = stbuf_match_hi[0] ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_1010 = _T_1009 & stbuf_data_0; // @[el2_lsu_stbuf.scala 222:98] + wire [31:0] _T_1013 = stbuf_match_hi[1] ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_1014 = _T_1013 & stbuf_data_1; // @[el2_lsu_stbuf.scala 222:98] + wire [31:0] _T_1017 = stbuf_match_hi[2] ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_1018 = _T_1017 & stbuf_data_2; // @[el2_lsu_stbuf.scala 222:98] + wire [31:0] _T_1021 = stbuf_match_hi[3] ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_1022 = _T_1021 & stbuf_data_3; // @[el2_lsu_stbuf.scala 222:98] + wire [31:0] _T_1024 = _T_1022 | _T_1018; // @[el2_lsu_stbuf.scala 222:131] + wire [31:0] _T_1025 = _T_1024 | _T_1014; // @[el2_lsu_stbuf.scala 222:131] + wire [31:0] stbuf_fwddata_hi_pre_m = _T_1025 | _T_1010; // @[el2_lsu_stbuf.scala 222:131] + wire [31:0] _T_1028 = stbuf_match_lo[0] ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_1029 = _T_1028 & stbuf_data_0; // @[el2_lsu_stbuf.scala 223:98] + wire [31:0] _T_1032 = stbuf_match_lo[1] ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_1033 = _T_1032 & stbuf_data_1; // @[el2_lsu_stbuf.scala 223:98] + wire [31:0] _T_1036 = stbuf_match_lo[2] ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_1037 = _T_1036 & stbuf_data_2; // @[el2_lsu_stbuf.scala 223:98] + wire [31:0] _T_1040 = stbuf_match_lo[3] ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_1041 = _T_1040 & stbuf_data_3; // @[el2_lsu_stbuf.scala 223:98] + wire [31:0] _T_1043 = _T_1041 | _T_1037; // @[el2_lsu_stbuf.scala 223:131] + wire [31:0] _T_1044 = _T_1043 | _T_1033; // @[el2_lsu_stbuf.scala 223:131] + wire [31:0] stbuf_fwddata_lo_pre_m = _T_1044 | _T_1029; // @[el2_lsu_stbuf.scala 223:131] + wire _T_1049 = io_lsu_addr_m[31:2] == io_lsu_addr_r[31:2]; // @[el2_lsu_stbuf.scala 230:50] + wire _T_1050 = _T_1049 & io_lsu_pkt_r_valid; // @[el2_lsu_stbuf.scala 230:75] + wire _T_1051 = _T_1050 & io_lsu_pkt_r_store; // @[el2_lsu_stbuf.scala 230:96] + wire ld_addr_rhit_lo_lo = _T_1051 & _T_739; // @[el2_lsu_stbuf.scala 230:117] + wire _T_1055 = io_end_addr_m[31:2] == io_lsu_addr_r[31:2]; // @[el2_lsu_stbuf.scala 231:50] + wire _T_1056 = _T_1055 & io_lsu_pkt_r_valid; // @[el2_lsu_stbuf.scala 231:75] + wire _T_1057 = _T_1056 & io_lsu_pkt_r_store; // @[el2_lsu_stbuf.scala 231:96] + wire ld_addr_rhit_lo_hi = _T_1057 & _T_739; // @[el2_lsu_stbuf.scala 231:117] + wire _T_1061 = io_lsu_addr_m[31:2] == io_end_addr_r[31:2]; // @[el2_lsu_stbuf.scala 232:50] + wire _T_1062 = _T_1061 & io_lsu_pkt_r_valid; // @[el2_lsu_stbuf.scala 232:75] + wire _T_1063 = _T_1062 & io_lsu_pkt_r_store; // @[el2_lsu_stbuf.scala 232:96] + wire _T_1065 = _T_1063 & _T_739; // @[el2_lsu_stbuf.scala 232:117] + wire ld_addr_rhit_hi_lo = _T_1065 & dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 232:137] + wire _T_1068 = io_end_addr_m[31:2] == io_end_addr_r[31:2]; // @[el2_lsu_stbuf.scala 233:50] + wire _T_1069 = _T_1068 & io_lsu_pkt_r_valid; // @[el2_lsu_stbuf.scala 233:75] + wire _T_1070 = _T_1069 & io_lsu_pkt_r_store; // @[el2_lsu_stbuf.scala 233:96] + wire _T_1072 = _T_1070 & _T_739; // @[el2_lsu_stbuf.scala 233:117] + wire ld_addr_rhit_hi_hi = _T_1072 & dual_stbuf_write_r; // @[el2_lsu_stbuf.scala 233:137] + wire _T_1074 = ld_addr_rhit_lo_lo & store_byteen_ext_r[0]; // @[el2_lsu_stbuf.scala 235:80] + wire _T_1076 = ld_addr_rhit_lo_lo & store_byteen_ext_r[1]; // @[el2_lsu_stbuf.scala 235:80] + wire _T_1078 = ld_addr_rhit_lo_lo & store_byteen_ext_r[2]; // @[el2_lsu_stbuf.scala 235:80] + wire _T_1080 = ld_addr_rhit_lo_lo & store_byteen_ext_r[3]; // @[el2_lsu_stbuf.scala 235:80] + wire [3:0] ld_byte_rhit_lo_lo = {_T_1080,_T_1078,_T_1076,_T_1074}; // @[Cat.scala 29:58] + wire _T_1085 = ld_addr_rhit_lo_hi & store_byteen_ext_r[0]; // @[el2_lsu_stbuf.scala 236:80] + wire _T_1087 = ld_addr_rhit_lo_hi & store_byteen_ext_r[1]; // @[el2_lsu_stbuf.scala 236:80] + wire _T_1089 = ld_addr_rhit_lo_hi & store_byteen_ext_r[2]; // @[el2_lsu_stbuf.scala 236:80] + wire _T_1091 = ld_addr_rhit_lo_hi & store_byteen_ext_r[3]; // @[el2_lsu_stbuf.scala 236:80] + wire [3:0] ld_byte_rhit_lo_hi = {_T_1091,_T_1089,_T_1087,_T_1085}; // @[Cat.scala 29:58] + wire _T_1096 = ld_addr_rhit_hi_lo & store_byteen_ext_r[4]; // @[el2_lsu_stbuf.scala 237:80] + wire _T_1098 = ld_addr_rhit_hi_lo & store_byteen_ext_r[5]; // @[el2_lsu_stbuf.scala 237:80] + wire _T_1100 = ld_addr_rhit_hi_lo & store_byteen_ext_r[6]; // @[el2_lsu_stbuf.scala 237:80] + wire _T_1102 = ld_addr_rhit_hi_lo & store_byteen_ext_r[7]; // @[el2_lsu_stbuf.scala 237:80] + wire [3:0] ld_byte_rhit_hi_lo = {_T_1102,_T_1100,_T_1098,_T_1096}; // @[Cat.scala 29:58] + wire _T_1107 = ld_addr_rhit_hi_hi & store_byteen_ext_r[4]; // @[el2_lsu_stbuf.scala 238:80] + wire _T_1109 = ld_addr_rhit_hi_hi & store_byteen_ext_r[5]; // @[el2_lsu_stbuf.scala 238:80] + wire _T_1111 = ld_addr_rhit_hi_hi & store_byteen_ext_r[6]; // @[el2_lsu_stbuf.scala 238:80] + wire _T_1113 = ld_addr_rhit_hi_hi & store_byteen_ext_r[7]; // @[el2_lsu_stbuf.scala 238:80] + wire [3:0] ld_byte_rhit_hi_hi = {_T_1113,_T_1111,_T_1109,_T_1107}; // @[Cat.scala 29:58] + wire _T_1119 = ld_byte_rhit_lo_lo[0] | ld_byte_rhit_hi_lo[0]; // @[el2_lsu_stbuf.scala 240:80] + wire _T_1122 = ld_byte_rhit_lo_lo[1] | ld_byte_rhit_hi_lo[1]; // @[el2_lsu_stbuf.scala 240:80] + wire _T_1125 = ld_byte_rhit_lo_lo[2] | ld_byte_rhit_hi_lo[2]; // @[el2_lsu_stbuf.scala 240:80] + wire _T_1128 = ld_byte_rhit_lo_lo[3] | ld_byte_rhit_hi_lo[3]; // @[el2_lsu_stbuf.scala 240:80] + wire [3:0] ld_byte_rhit_lo = {_T_1128,_T_1125,_T_1122,_T_1119}; // @[Cat.scala 29:58] + wire _T_1134 = ld_byte_rhit_lo_hi[0] | ld_byte_rhit_hi_hi[0]; // @[el2_lsu_stbuf.scala 241:80] + wire _T_1137 = ld_byte_rhit_lo_hi[1] | ld_byte_rhit_hi_hi[1]; // @[el2_lsu_stbuf.scala 241:80] + wire _T_1140 = ld_byte_rhit_lo_hi[2] | ld_byte_rhit_hi_hi[2]; // @[el2_lsu_stbuf.scala 241:80] + wire _T_1143 = ld_byte_rhit_lo_hi[3] | ld_byte_rhit_hi_hi[3]; // @[el2_lsu_stbuf.scala 241:80] + wire [3:0] ld_byte_rhit_hi = {_T_1143,_T_1140,_T_1137,_T_1134}; // @[Cat.scala 29:58] + wire [7:0] _T_1149 = ld_byte_rhit_lo_lo[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_1151 = _T_1149 & io_store_data_lo_r[7:0]; // @[el2_lsu_stbuf.scala 243:54] + wire [7:0] _T_1154 = ld_byte_rhit_hi_lo[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_1156 = _T_1154 & io_store_data_hi_r[7:0]; // @[el2_lsu_stbuf.scala 243:115] + wire [7:0] fwdpipe1_lo = _T_1151 | _T_1156; // @[el2_lsu_stbuf.scala 243:81] + wire [7:0] _T_1159 = ld_byte_rhit_lo_lo[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_1161 = _T_1159 & io_store_data_lo_r[15:8]; // @[el2_lsu_stbuf.scala 244:54] + wire [7:0] _T_1164 = ld_byte_rhit_hi_lo[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_1166 = _T_1164 & io_store_data_hi_r[15:8]; // @[el2_lsu_stbuf.scala 244:116] + wire [7:0] fwdpipe2_lo = _T_1161 | _T_1166; // @[el2_lsu_stbuf.scala 244:82] + wire [7:0] _T_1169 = ld_byte_rhit_lo_lo[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_1171 = _T_1169 & io_store_data_lo_r[23:16]; // @[el2_lsu_stbuf.scala 245:54] + wire [7:0] _T_1174 = ld_byte_rhit_hi_lo[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_1176 = _T_1174 & io_store_data_hi_r[23:16]; // @[el2_lsu_stbuf.scala 245:117] + wire [7:0] fwdpipe3_lo = _T_1171 | _T_1176; // @[el2_lsu_stbuf.scala 245:83] + wire [7:0] _T_1179 = ld_byte_rhit_lo_lo[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_1181 = _T_1179 & io_store_data_lo_r[31:24]; // @[el2_lsu_stbuf.scala 246:54] + wire [7:0] _T_1184 = ld_byte_rhit_hi_lo[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [23:0] _GEN_25 = {{16'd0}, _T_1184}; // @[el2_lsu_stbuf.scala 246:117] + wire [23:0] _T_1186 = _GEN_25 & io_store_data_hi_r[31:8]; // @[el2_lsu_stbuf.scala 246:117] + wire [23:0] _GEN_26 = {{16'd0}, _T_1181}; // @[el2_lsu_stbuf.scala 246:83] + wire [23:0] fwdpipe4_lo = _GEN_26 | _T_1186; // @[el2_lsu_stbuf.scala 246:83] + wire [47:0] _T_1189 = {fwdpipe4_lo,fwdpipe3_lo,fwdpipe2_lo,fwdpipe1_lo}; // @[Cat.scala 29:58] + wire [7:0] _T_1192 = ld_byte_rhit_lo_hi[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_1194 = _T_1192 & io_store_data_lo_r[7:0]; // @[el2_lsu_stbuf.scala 249:54] + wire [7:0] _T_1197 = ld_byte_rhit_hi_hi[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_1199 = _T_1197 & io_store_data_hi_r[7:0]; // @[el2_lsu_stbuf.scala 249:115] + wire [7:0] fwdpipe1_hi = _T_1194 | _T_1199; // @[el2_lsu_stbuf.scala 249:81] + wire [7:0] _T_1202 = ld_byte_rhit_lo_hi[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_1204 = _T_1202 & io_store_data_lo_r[15:8]; // @[el2_lsu_stbuf.scala 250:54] + wire [7:0] _T_1207 = ld_byte_rhit_hi_hi[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_1209 = _T_1207 & io_store_data_hi_r[15:8]; // @[el2_lsu_stbuf.scala 250:116] + wire [7:0] fwdpipe2_hi = _T_1204 | _T_1209; // @[el2_lsu_stbuf.scala 250:82] + wire [7:0] _T_1212 = ld_byte_rhit_lo_hi[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_1214 = _T_1212 & io_store_data_lo_r[23:16]; // @[el2_lsu_stbuf.scala 251:54] + wire [7:0] _T_1217 = ld_byte_rhit_hi_hi[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_1219 = _T_1217 & io_store_data_hi_r[23:16]; // @[el2_lsu_stbuf.scala 251:117] + wire [7:0] fwdpipe3_hi = _T_1214 | _T_1219; // @[el2_lsu_stbuf.scala 251:83] + wire [7:0] _T_1222 = ld_byte_rhit_lo_hi[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_1224 = _T_1222 & io_store_data_lo_r[31:24]; // @[el2_lsu_stbuf.scala 252:54] + wire [7:0] _T_1227 = ld_byte_rhit_hi_hi[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [23:0] _GEN_27 = {{16'd0}, _T_1227}; // @[el2_lsu_stbuf.scala 252:117] + wire [23:0] _T_1229 = _GEN_27 & io_store_data_hi_r[31:8]; // @[el2_lsu_stbuf.scala 252:117] + wire [23:0] _GEN_28 = {{16'd0}, _T_1224}; // @[el2_lsu_stbuf.scala 252:83] + wire [23:0] fwdpipe4_hi = _GEN_28 | _T_1229; // @[el2_lsu_stbuf.scala 252:83] + wire [47:0] _T_1232 = {fwdpipe4_hi,fwdpipe3_hi,fwdpipe2_hi,fwdpipe1_hi}; // @[Cat.scala 29:58] + wire _T_1264 = ld_byte_rhit_hi[0] | stbuf_fwdbyteen_hi_pre_m_0; // @[el2_lsu_stbuf.scala 258:84] + wire _T_1266 = ld_byte_rhit_hi[1] | stbuf_fwdbyteen_hi_pre_m_1; // @[el2_lsu_stbuf.scala 258:84] + wire _T_1268 = ld_byte_rhit_hi[2] | stbuf_fwdbyteen_hi_pre_m_2; // @[el2_lsu_stbuf.scala 258:84] + wire _T_1270 = ld_byte_rhit_hi[3] | stbuf_fwdbyteen_hi_pre_m_3; // @[el2_lsu_stbuf.scala 258:84] + wire [2:0] _T_1272 = {_T_1270,_T_1268,_T_1266}; // @[Cat.scala 29:58] + wire _T_1275 = ld_byte_rhit_lo[0] | stbuf_fwdbyteen_lo_pre_m_0; // @[el2_lsu_stbuf.scala 259:84] + wire _T_1277 = ld_byte_rhit_lo[1] | stbuf_fwdbyteen_lo_pre_m_1; // @[el2_lsu_stbuf.scala 259:84] + wire _T_1279 = ld_byte_rhit_lo[2] | stbuf_fwdbyteen_lo_pre_m_2; // @[el2_lsu_stbuf.scala 259:84] + wire _T_1281 = ld_byte_rhit_lo[3] | stbuf_fwdbyteen_lo_pre_m_3; // @[el2_lsu_stbuf.scala 259:84] + wire [2:0] _T_1283 = {_T_1281,_T_1279,_T_1277}; // @[Cat.scala 29:58] + wire [31:0] ld_fwddata_rpipe_lo = _T_1189[31:0]; // @[el2_lsu_stbuf.scala 247:24] + wire [7:0] stbuf_fwdpipe1_lo = ld_byte_rhit_lo[0] ? ld_fwddata_rpipe_lo[7:0] : stbuf_fwddata_lo_pre_m[7:0]; // @[el2_lsu_stbuf.scala 262:31] + wire [7:0] stbuf_fwdpipe2_lo = ld_byte_rhit_lo[1] ? ld_fwddata_rpipe_lo[15:8] : stbuf_fwddata_lo_pre_m[15:8]; // @[el2_lsu_stbuf.scala 263:31] + wire [7:0] stbuf_fwdpipe3_lo = ld_byte_rhit_lo[2] ? ld_fwddata_rpipe_lo[23:16] : stbuf_fwddata_lo_pre_m[23:16]; // @[el2_lsu_stbuf.scala 264:31] + wire [7:0] stbuf_fwdpipe4_lo = ld_byte_rhit_lo[3] ? ld_fwddata_rpipe_lo[31:24] : stbuf_fwddata_lo_pre_m[31:24]; // @[el2_lsu_stbuf.scala 265:31] + wire [15:0] _T_1297 = {stbuf_fwdpipe2_lo,stbuf_fwdpipe1_lo}; // @[Cat.scala 29:58] + wire [15:0] _T_1298 = {stbuf_fwdpipe4_lo,stbuf_fwdpipe3_lo}; // @[Cat.scala 29:58] + wire [31:0] ld_fwddata_rpipe_hi = _T_1232[31:0]; // @[el2_lsu_stbuf.scala 253:24] + wire [7:0] stbuf_fwdpipe1_hi = ld_byte_rhit_hi[0] ? ld_fwddata_rpipe_hi[7:0] : stbuf_fwddata_hi_pre_m[7:0]; // @[el2_lsu_stbuf.scala 268:31] + wire [7:0] stbuf_fwdpipe2_hi = ld_byte_rhit_hi[1] ? ld_fwddata_rpipe_hi[15:8] : stbuf_fwddata_hi_pre_m[15:8]; // @[el2_lsu_stbuf.scala 269:31] + wire [7:0] stbuf_fwdpipe3_hi = ld_byte_rhit_hi[2] ? ld_fwddata_rpipe_hi[23:16] : stbuf_fwddata_hi_pre_m[23:16]; // @[el2_lsu_stbuf.scala 270:31] + wire [7:0] stbuf_fwdpipe4_hi = ld_byte_rhit_hi[3] ? ld_fwddata_rpipe_hi[31:24] : stbuf_fwddata_hi_pre_m[31:24]; // @[el2_lsu_stbuf.scala 271:31] + wire [15:0] _T_1312 = {stbuf_fwdpipe2_hi,stbuf_fwdpipe1_hi}; // @[Cat.scala 29:58] + wire [15:0] _T_1313 = {stbuf_fwdpipe4_hi,stbuf_fwdpipe3_hi}; // @[Cat.scala 29:58] + assign io_stbuf_reqvld_any = _T_699 & _T_701; // @[el2_lsu_stbuf.scala 52:47 el2_lsu_stbuf.scala 181:25] + assign io_stbuf_reqvld_flushed_any = _T_689[0] & _T_691[0]; // @[el2_lsu_stbuf.scala 53:36 el2_lsu_stbuf.scala 180:32] + assign io_stbuf_addr_any = 2'h3 == RdPtr ? stbuf_addr_3 : _GEN_10; // @[el2_lsu_stbuf.scala 54:35 el2_lsu_stbuf.scala 182:23] + assign io_stbuf_data_any = 2'h3 == RdPtr ? stbuf_data_3 : _GEN_14; // @[el2_lsu_stbuf.scala 55:35 el2_lsu_stbuf.scala 183:23] + assign io_lsu_stbuf_full_any = _T_752 ? _T_754 : _T_755; // @[el2_lsu_stbuf.scala 56:43 el2_lsu_stbuf.scala 202:27] + assign io_lsu_stbuf_empty_any = stbuf_numvld_any == 4'h0; // @[el2_lsu_stbuf.scala 57:43 el2_lsu_stbuf.scala 203:27] + assign io_ldst_stbuf_reqvld_r = io_lsu_commit_r & io_store_stbuf_reqvld_r; // @[el2_lsu_stbuf.scala 58:43 el2_lsu_stbuf.scala 129:27] + assign io_stbuf_fwddata_hi_m = {_T_1313,_T_1312}; // @[el2_lsu_stbuf.scala 59:43 el2_lsu_stbuf.scala 272:26] + assign io_stbuf_fwddata_lo_m = {_T_1298,_T_1297}; // @[el2_lsu_stbuf.scala 60:43 el2_lsu_stbuf.scala 266:26] + assign io_stbuf_fwdbyteen_hi_m = {_T_1272,_T_1264}; // @[el2_lsu_stbuf.scala 61:37 el2_lsu_stbuf.scala 258:28] + assign io_stbuf_fwdbyteen_lo_m = {_T_1283,_T_1275}; // @[el2_lsu_stbuf.scala 62:37 el2_lsu_stbuf.scala 259:28] `ifdef RANDOMIZE_GARBAGE_ASSIGN `define RANDOMIZE `endif @@ -686,193 +773,314 @@ initial begin _RAND_1 = {1{`RANDOM}}; RdPtr = _RAND_1[1:0]; _RAND_2 = {1{`RANDOM}}; - stbuf_addr_0 = _RAND_2[15:0]; + WrPtr = _RAND_2[1:0]; _RAND_3 = {1{`RANDOM}}; - stbuf_vld_0 = _RAND_3[0:0]; + stbuf_addr_0 = _RAND_3[15:0]; _RAND_4 = {1{`RANDOM}}; - stbuf_dma_kill_0 = _RAND_4[0:0]; + _T_588 = _RAND_4[0:0]; _RAND_5 = {1{`RANDOM}}; - stbuf_addr_1 = _RAND_5[15:0]; + _T_580 = _RAND_5[0:0]; _RAND_6 = {1{`RANDOM}}; - stbuf_vld_1 = _RAND_6[0:0]; + _T_572 = _RAND_6[0:0]; _RAND_7 = {1{`RANDOM}}; - stbuf_dma_kill_1 = _RAND_7[0:0]; + _T_564 = _RAND_7[0:0]; _RAND_8 = {1{`RANDOM}}; - stbuf_addr_2 = _RAND_8[15:0]; + _T_623 = _RAND_8[0:0]; _RAND_9 = {1{`RANDOM}}; - stbuf_vld_2 = _RAND_9[0:0]; + _T_615 = _RAND_9[0:0]; _RAND_10 = {1{`RANDOM}}; - stbuf_dma_kill_2 = _RAND_10[0:0]; + _T_607 = _RAND_10[0:0]; _RAND_11 = {1{`RANDOM}}; - stbuf_addr_3 = _RAND_11[15:0]; + _T_599 = _RAND_11[0:0]; _RAND_12 = {1{`RANDOM}}; - stbuf_vld_3 = _RAND_12[0:0]; + stbuf_addr_1 = _RAND_12[15:0]; _RAND_13 = {1{`RANDOM}}; - stbuf_dma_kill_3 = _RAND_13[0:0]; + stbuf_addr_2 = _RAND_13[15:0]; _RAND_14 = {1{`RANDOM}}; - stbuf_byteen_0 = _RAND_14[3:0]; + stbuf_addr_3 = _RAND_14[15:0]; _RAND_15 = {1{`RANDOM}}; - stbuf_byteen_1 = _RAND_15[3:0]; + stbuf_byteen_0 = _RAND_15[3:0]; _RAND_16 = {1{`RANDOM}}; - stbuf_byteen_2 = _RAND_16[3:0]; + stbuf_byteen_1 = _RAND_16[3:0]; _RAND_17 = {1{`RANDOM}}; - stbuf_byteen_3 = _RAND_17[3:0]; + stbuf_byteen_2 = _RAND_17[3:0]; _RAND_18 = {1{`RANDOM}}; - stbuf_data_0 = _RAND_18[31:0]; + stbuf_byteen_3 = _RAND_18[3:0]; _RAND_19 = {1{`RANDOM}}; - stbuf_data_1 = _RAND_19[31:0]; + stbuf_data_0 = _RAND_19[31:0]; _RAND_20 = {1{`RANDOM}}; - stbuf_data_2 = _RAND_20[31:0]; + stbuf_data_1 = _RAND_20[31:0]; _RAND_21 = {1{`RANDOM}}; - stbuf_data_3 = _RAND_21[31:0]; + stbuf_data_2 = _RAND_21[31:0]; _RAND_22 = {1{`RANDOM}}; - ldst_dual_m = _RAND_22[0:0]; + stbuf_data_3 = _RAND_22[31:0]; + _RAND_23 = {1{`RANDOM}}; + ldst_dual_m = _RAND_23[0:0]; `endif // RANDOMIZE_REG_INIT + if (reset) begin + ldst_dual_r = 1'h0; + end + if (reset) begin + RdPtr = 2'h0; + end + if (reset) begin + WrPtr = 2'h0; + end + if (reset) begin + stbuf_addr_0 = 16'h0; + end + if (reset) begin + _T_588 = 1'h0; + end + if (reset) begin + _T_580 = 1'h0; + end + if (reset) begin + _T_572 = 1'h0; + end + if (reset) begin + _T_564 = 1'h0; + end + if (reset) begin + _T_623 = 1'h0; + end + if (reset) begin + _T_615 = 1'h0; + end + if (reset) begin + _T_607 = 1'h0; + end + if (reset) begin + _T_599 = 1'h0; + end + if (reset) begin + stbuf_addr_1 = 16'h0; + end + if (reset) begin + stbuf_addr_2 = 16'h0; + end + if (reset) begin + stbuf_addr_3 = 16'h0; + end + if (reset) begin + stbuf_byteen_0 = 4'h0; + end + if (reset) begin + stbuf_byteen_1 = 4'h0; + end + if (reset) begin + stbuf_byteen_2 = 4'h0; + end + if (reset) begin + stbuf_byteen_3 = 4'h0; + end + if (reset) begin + stbuf_data_0 = 32'h0; + end + if (reset) begin + stbuf_data_1 = 32'h0; + end + if (reset) begin + stbuf_data_2 = 32'h0; + end + if (reset) begin + stbuf_data_3 = 32'h0; + end + if (reset) begin + ldst_dual_m = 1'h0; + end `endif // RANDOMIZE end // initial `ifdef FIRRTL_AFTER_INITIAL `FIRRTL_AFTER_INITIAL `endif `endif // SYNTHESIS - always @(posedge io_lsu_c1_r_clk) begin + always @(posedge io_lsu_c1_r_clk or posedge reset) begin if (reset) begin ldst_dual_r <= 1'h0; end else begin ldst_dual_r <= ldst_dual_m; end end - always @(posedge io_lsu_stbuf_c1_clk) begin + always @(posedge io_lsu_stbuf_c1_clk or posedge reset) begin if (reset) begin RdPtr <= 2'h0; - end else if (_T_184) begin - RdPtr <= NxtRdPtr; + end else if (_T_212) begin + RdPtr <= RdPtrPlus1; end + end + always @(posedge io_lsu_stbuf_c1_clk or posedge reset) begin if (reset) begin - stbuf_byteen_0 <= 4'h0; - end else if (stbuf_wr_en[0]) begin - if (sel_lo[3]) begin - stbuf_byteen_0 <= _T_240; + WrPtr <= 2'h0; + end else if (WrPtrEn) begin + if (_T_716) begin + WrPtr <= WrPtrPlus2; end else begin - stbuf_byteen_0 <= _T_241; - end - end - if (reset) begin - stbuf_byteen_1 <= 4'h0; - end else if (stbuf_wr_en[1]) begin - if (sel_lo[2]) begin - stbuf_byteen_1 <= _T_236; - end else begin - stbuf_byteen_1 <= _T_237; - end - end - if (reset) begin - stbuf_byteen_2 <= 4'h0; - end else if (stbuf_wr_en[2]) begin - if (sel_lo[1]) begin - stbuf_byteen_2 <= _T_232; - end else begin - stbuf_byteen_2 <= _T_233; - end - end - if (reset) begin - stbuf_byteen_3 <= 4'h0; - end else if (stbuf_wr_en[3]) begin - if (sel_lo[0]) begin - stbuf_byteen_3 <= _T_228; - end else begin - stbuf_byteen_3 <= _T_229; + WrPtr <= WrPtrPlus1; end end end - always @(posedge clock) begin + always @(posedge clock or posedge reset) begin if (reset) begin stbuf_addr_0 <= 16'h0; end else if (stbuf_wr_en[0]) begin - stbuf_addr_0 <= stbuf_addrin_0; + if (sel_lo[0]) begin + stbuf_addr_0 <= io_lsu_addr_r[15:0]; + end else begin + stbuf_addr_0 <= io_end_addr_r[15:0]; + end end + end + always @(posedge io_lsu_free_c2_clk or posedge reset) begin + if (reset) begin + _T_588 <= 1'h0; + end else begin + _T_588 <= _T_584 & _T_67; + end + end + always @(posedge io_lsu_free_c2_clk or posedge reset) begin + if (reset) begin + _T_580 <= 1'h0; + end else begin + _T_580 <= _T_576 & _T_56; + end + end + always @(posedge io_lsu_free_c2_clk or posedge reset) begin + if (reset) begin + _T_572 <= 1'h0; + end else begin + _T_572 <= _T_568 & _T_45; + end + end + always @(posedge io_lsu_free_c2_clk or posedge reset) begin + if (reset) begin + _T_564 <= 1'h0; + end else begin + _T_564 <= _T_560 & _T_34; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + _T_623 <= 1'h0; + end else begin + _T_623 <= _T_619 & _T_67; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + _T_615 <= 1'h0; + end else begin + _T_615 <= _T_611 & _T_56; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + _T_607 <= 1'h0; + end else begin + _T_607 <= _T_603 & _T_45; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + _T_599 <= 1'h0; + end else begin + _T_599 <= _T_595 & _T_34; + end + end + always @(posedge clock or posedge reset) begin if (reset) begin stbuf_addr_1 <= 16'h0; end else if (stbuf_wr_en[1]) begin - stbuf_addr_1 <= stbuf_addrin_1; + if (sel_lo[1]) begin + stbuf_addr_1 <= io_lsu_addr_r[15:0]; + end else begin + stbuf_addr_1 <= io_end_addr_r[15:0]; + end end + end + always @(posedge clock or posedge reset) begin if (reset) begin stbuf_addr_2 <= 16'h0; end else if (stbuf_wr_en[2]) begin - stbuf_addr_2 <= stbuf_addrin_2; + if (sel_lo[2]) begin + stbuf_addr_2 <= io_lsu_addr_r[15:0]; + end else begin + stbuf_addr_2 <= io_end_addr_r[15:0]; + end end + end + always @(posedge clock or posedge reset) begin if (reset) begin stbuf_addr_3 <= 16'h0; end else if (stbuf_wr_en[3]) begin - stbuf_addr_3 <= stbuf_addrin_3; + if (sel_lo[3]) begin + stbuf_addr_3 <= io_lsu_addr_r[15:0]; + end else begin + stbuf_addr_3 <= io_end_addr_r[15:0]; + end end + end + always @(posedge io_lsu_stbuf_c1_clk or posedge reset) begin + if (reset) begin + stbuf_byteen_0 <= 4'h0; + end else begin + stbuf_byteen_0 <= _T_629 & _T_633; + end + end + always @(posedge io_lsu_stbuf_c1_clk or posedge reset) begin + if (reset) begin + stbuf_byteen_1 <= 4'h0; + end else begin + stbuf_byteen_1 <= _T_638 & _T_642; + end + end + always @(posedge io_lsu_stbuf_c1_clk or posedge reset) begin + if (reset) begin + stbuf_byteen_2 <= 4'h0; + end else begin + stbuf_byteen_2 <= _T_647 & _T_651; + end + end + always @(posedge io_lsu_stbuf_c1_clk or posedge reset) begin + if (reset) begin + stbuf_byteen_3 <= 4'h0; + end else begin + stbuf_byteen_3 <= _T_656 & _T_660; + end + end + always @(posedge clock or posedge reset) begin if (reset) begin stbuf_data_0 <= 32'h0; end else if (stbuf_wr_en[0]) begin stbuf_data_0 <= stbuf_datain_0; end + end + always @(posedge clock or posedge reset) begin if (reset) begin stbuf_data_1 <= 32'h0; end else if (stbuf_wr_en[1]) begin stbuf_data_1 <= stbuf_datain_1; end + end + always @(posedge clock or posedge reset) begin if (reset) begin stbuf_data_2 <= 32'h0; end else if (stbuf_wr_en[2]) begin stbuf_data_2 <= stbuf_datain_2; end + end + always @(posedge clock or posedge reset) begin if (reset) begin stbuf_data_3 <= 32'h0; end else if (stbuf_wr_en[3]) begin stbuf_data_3 <= stbuf_datain_3; end end - always @(posedge io_lsu_free_c2_clk) begin - if (reset) begin - stbuf_vld_0 <= 1'h0; - end else begin - stbuf_vld_0 <= _GEN_0; - end - if (reset) begin - stbuf_dma_kill_0 <= 1'h0; - end else begin - stbuf_dma_kill_0 <= _GEN_1; - end - if (reset) begin - stbuf_vld_1 <= 1'h0; - end else begin - stbuf_vld_1 <= _GEN_5; - end - if (reset) begin - stbuf_dma_kill_1 <= 1'h0; - end else begin - stbuf_dma_kill_1 <= _GEN_6; - end - if (reset) begin - stbuf_vld_2 <= 1'h0; - end else begin - stbuf_vld_2 <= _GEN_10; - end - if (reset) begin - stbuf_dma_kill_2 <= 1'h0; - end else begin - stbuf_dma_kill_2 <= _GEN_11; - end - if (reset) begin - stbuf_vld_3 <= 1'h0; - end else begin - stbuf_vld_3 <= _GEN_15; - end - if (reset) begin - stbuf_dma_kill_3 <= 1'h0; - end else begin - stbuf_dma_kill_3 <= _GEN_16; - end - end - always @(posedge io_lsu_c1_m_clk) begin + always @(posedge io_lsu_c1_m_clk or posedge reset) begin if (reset) begin ldst_dual_m <= 1'h0; end else begin - ldst_dual_m <= ldst_dual_d; + ldst_dual_m <= io_lsu_addr_d[2] != io_end_addr_d[2]; end end endmodule diff --git a/el2_lsu_trigger.anno.json b/el2_lsu_trigger.anno.json index c01a478c..66a5a1ad 100644 --- a/el2_lsu_trigger.anno.json +++ b/el2_lsu_trigger.anno.json @@ -4,10 +4,10 @@ "sink":"~el2_lsu_trigger|el2_lsu_trigger>io_lsu_trigger_match_m", "sources":[ "~el2_lsu_trigger|el2_lsu_trigger>io_lsu_pkt_m_valid", + "~el2_lsu_trigger|el2_lsu_trigger>io_lsu_pkt_m_dma", "~el2_lsu_trigger|el2_lsu_trigger>io_trigger_pkt_any_0_store", "~el2_lsu_trigger|el2_lsu_trigger>io_lsu_pkt_m_store", "~el2_lsu_trigger|el2_lsu_trigger>io_trigger_pkt_any_1_store", - "~el2_lsu_trigger|el2_lsu_trigger>io_lsu_pkt_m_dma", "~el2_lsu_trigger|el2_lsu_trigger>io_trigger_pkt_any_0_load", "~el2_lsu_trigger|el2_lsu_trigger>io_lsu_pkt_m_load", "~el2_lsu_trigger|el2_lsu_trigger>io_trigger_pkt_any_0_select", @@ -20,12 +20,12 @@ "~el2_lsu_trigger|el2_lsu_trigger>io_trigger_pkt_any_2_load", "~el2_lsu_trigger|el2_lsu_trigger>io_trigger_pkt_any_2_select", "~el2_lsu_trigger|el2_lsu_trigger>io_trigger_pkt_any_0_tdata2", - "~el2_lsu_trigger|el2_lsu_trigger>io_trigger_pkt_any_0_match_", "~el2_lsu_trigger|el2_lsu_trigger>io_trigger_pkt_any_1_tdata2", - "~el2_lsu_trigger|el2_lsu_trigger>io_trigger_pkt_any_1_match_", + "~el2_lsu_trigger|el2_lsu_trigger>io_trigger_pkt_any_0_match_", "~el2_lsu_trigger|el2_lsu_trigger>io_trigger_pkt_any_3_tdata2", - "~el2_lsu_trigger|el2_lsu_trigger>io_trigger_pkt_any_3_match_", "~el2_lsu_trigger|el2_lsu_trigger>io_trigger_pkt_any_2_tdata2", + "~el2_lsu_trigger|el2_lsu_trigger>io_trigger_pkt_any_1_match_", + "~el2_lsu_trigger|el2_lsu_trigger>io_trigger_pkt_any_3_match_", "~el2_lsu_trigger|el2_lsu_trigger>io_trigger_pkt_any_2_match_", "~el2_lsu_trigger|el2_lsu_trigger>io_lsu_addr_m", "~el2_lsu_trigger|el2_lsu_trigger>io_store_data_m", diff --git a/el2_lsu_trigger.fir b/el2_lsu_trigger.fir index 2c055677..dce8f365 100644 --- a/el2_lsu_trigger.fir +++ b/el2_lsu_trigger.fir @@ -2,11 +2,9 @@ circuit el2_lsu_trigger : module el2_lsu_trigger : input clock : Clock - input reset : UInt<1> + input reset : AsyncReset output io : {flip trigger_pkt_any : {select : UInt<1>, match_ : UInt<1>, store : UInt<1>, load : UInt<1>, execute : UInt<1>, m : UInt<1>, tdata2 : UInt<32>}[4], flip lsu_pkt_m : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip lsu_addr_m : UInt<32>, flip store_data_m : UInt<32>, lsu_trigger_match_m : UInt<4>} - wire lsu_match_data : UInt<32>[4] @[el2_lsu_trigger.scala 15:28] - io.lsu_trigger_match_m <= UInt<1>("h00") @[el2_lsu_trigger.scala 16:25] node _T = bits(io.lsu_pkt_m.word, 0, 0) @[Bitwise.scala 72:15] node _T_1 = mux(_T, UInt<16>("h0ffff"), UInt<16>("h00")) @[Bitwise.scala 72:12] node _T_2 = bits(io.store_data_m, 31, 16) @[el2_lsu_trigger.scala 18:78] @@ -19,1245 +17,1248 @@ circuit el2_lsu_trigger : node _T_9 = bits(io.store_data_m, 7, 0) @[el2_lsu_trigger.scala 18:177] node _T_10 = cat(_T_3, _T_8) @[Cat.scala 29:58] node store_data_trigger_m = cat(_T_10, _T_9) @[Cat.scala 29:58] - node _T_11 = eq(io.trigger_pkt_any[0].select, UInt<1>("h00")) @[el2_lsu_trigger.scala 20:57] - node _T_12 = bits(_T_11, 0, 0) @[Bitwise.scala 72:15] - node _T_13 = mux(_T_12, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] - node _T_14 = and(_T_13, io.lsu_addr_m) @[el2_lsu_trigger.scala 20:88] - node _T_15 = bits(io.trigger_pkt_any[0].select, 0, 0) @[Bitwise.scala 72:15] - node _T_16 = mux(_T_15, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] - node _T_17 = and(_T_16, io.trigger_pkt_any[0].store) @[el2_lsu_trigger.scala 20:148] - node _T_18 = and(_T_17, store_data_trigger_m) @[el2_lsu_trigger.scala 20:179] - node _T_19 = or(_T_14, _T_18) @[el2_lsu_trigger.scala 20:105] - node _T_20 = eq(io.trigger_pkt_any[1].select, UInt<1>("h00")) @[el2_lsu_trigger.scala 20:57] - node _T_21 = bits(_T_20, 0, 0) @[Bitwise.scala 72:15] - node _T_22 = mux(_T_21, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] - node _T_23 = and(_T_22, io.lsu_addr_m) @[el2_lsu_trigger.scala 20:88] - node _T_24 = bits(io.trigger_pkt_any[1].select, 0, 0) @[Bitwise.scala 72:15] - node _T_25 = mux(_T_24, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] - node _T_26 = and(_T_25, io.trigger_pkt_any[1].store) @[el2_lsu_trigger.scala 20:148] - node _T_27 = and(_T_26, store_data_trigger_m) @[el2_lsu_trigger.scala 20:179] - node _T_28 = or(_T_23, _T_27) @[el2_lsu_trigger.scala 20:105] - node _T_29 = eq(io.trigger_pkt_any[2].select, UInt<1>("h00")) @[el2_lsu_trigger.scala 20:57] - node _T_30 = bits(_T_29, 0, 0) @[Bitwise.scala 72:15] - node _T_31 = mux(_T_30, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] - node _T_32 = and(_T_31, io.lsu_addr_m) @[el2_lsu_trigger.scala 20:88] - node _T_33 = bits(io.trigger_pkt_any[2].select, 0, 0) @[Bitwise.scala 72:15] - node _T_34 = mux(_T_33, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] - node _T_35 = and(_T_34, io.trigger_pkt_any[2].store) @[el2_lsu_trigger.scala 20:148] - node _T_36 = and(_T_35, store_data_trigger_m) @[el2_lsu_trigger.scala 20:179] - node _T_37 = or(_T_32, _T_36) @[el2_lsu_trigger.scala 20:105] - node _T_38 = eq(io.trigger_pkt_any[3].select, UInt<1>("h00")) @[el2_lsu_trigger.scala 20:57] - node _T_39 = bits(_T_38, 0, 0) @[Bitwise.scala 72:15] - node _T_40 = mux(_T_39, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] - node _T_41 = and(_T_40, io.lsu_addr_m) @[el2_lsu_trigger.scala 20:88] - node _T_42 = bits(io.trigger_pkt_any[3].select, 0, 0) @[Bitwise.scala 72:15] - node _T_43 = mux(_T_42, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] - node _T_44 = and(_T_43, io.trigger_pkt_any[3].store) @[el2_lsu_trigger.scala 20:148] - node _T_45 = and(_T_44, store_data_trigger_m) @[el2_lsu_trigger.scala 20:179] - node _T_46 = or(_T_41, _T_45) @[el2_lsu_trigger.scala 20:105] - wire _T_47 : UInt<32>[4] @[el2_lsu_trigger.scala 20:40] - _T_47[0] <= _T_19 @[el2_lsu_trigger.scala 20:40] - _T_47[1] <= _T_28 @[el2_lsu_trigger.scala 20:40] - _T_47[2] <= _T_37 @[el2_lsu_trigger.scala 20:40] - _T_47[3] <= _T_46 @[el2_lsu_trigger.scala 20:40] - lsu_match_data[0] <= _T_47[0] @[el2_lsu_trigger.scala 20:18] - lsu_match_data[1] <= _T_47[1] @[el2_lsu_trigger.scala 20:18] - lsu_match_data[2] <= _T_47[2] @[el2_lsu_trigger.scala 20:18] - lsu_match_data[3] <= _T_47[3] @[el2_lsu_trigger.scala 20:18] - node _T_48 = eq(io.lsu_pkt_m.dma, UInt<1>("h00")) @[el2_lsu_trigger.scala 21:71] - node _T_49 = and(io.lsu_pkt_m.valid, _T_48) @[el2_lsu_trigger.scala 21:69] - node _T_50 = and(io.trigger_pkt_any[0].store, io.lsu_pkt_m.store) @[el2_lsu_trigger.scala 21:120] - node _T_51 = and(_T_49, _T_50) @[el2_lsu_trigger.scala 21:89] - node _T_52 = and(io.trigger_pkt_any[0].load, io.lsu_pkt_m.load) @[el2_lsu_trigger.scala 22:33] - node _T_53 = eq(io.trigger_pkt_any[0].select, UInt<1>("h00")) @[el2_lsu_trigger.scala 22:55] - node _T_54 = and(_T_52, _T_53) @[el2_lsu_trigger.scala 22:53] - node _T_55 = bits(io.trigger_pkt_any[0].match_, 0, 0) @[el2_lsu_trigger.scala 23:106] - wire _T_56 : UInt<1>[32] @[el2_lib.scala 193:24] - node _T_57 = andr(io.trigger_pkt_any[0].tdata2) @[el2_lib.scala 194:45] - node _T_58 = not(_T_57) @[el2_lib.scala 194:39] - node _T_59 = and(_T_55, _T_58) @[el2_lib.scala 194:37] - node _T_60 = bits(io.trigger_pkt_any[0].tdata2, 0, 0) @[el2_lib.scala 195:48] - node _T_61 = bits(lsu_match_data[0], 0, 0) @[el2_lib.scala 195:60] - node _T_62 = eq(_T_60, _T_61) @[el2_lib.scala 195:52] - node _T_63 = or(_T_59, _T_62) @[el2_lib.scala 195:41] - _T_56[0] <= _T_63 @[el2_lib.scala 195:18] - node _T_64 = bits(io.trigger_pkt_any[0].tdata2, 0, 0) @[el2_lib.scala 197:30] - node _T_65 = andr(_T_64) @[el2_lib.scala 197:38] - node _T_66 = and(_T_65, _T_59) @[el2_lib.scala 197:43] - node _T_67 = bits(io.trigger_pkt_any[0].tdata2, 1, 1) @[el2_lib.scala 197:76] - node _T_68 = bits(lsu_match_data[0], 1, 1) @[el2_lib.scala 197:88] - node _T_69 = eq(_T_67, _T_68) @[el2_lib.scala 197:80] - node _T_70 = mux(_T_66, UInt<1>("h01"), _T_69) @[el2_lib.scala 197:25] - _T_56[1] <= _T_70 @[el2_lib.scala 197:19] - node _T_71 = bits(io.trigger_pkt_any[0].tdata2, 1, 0) @[el2_lib.scala 197:30] - node _T_72 = andr(_T_71) @[el2_lib.scala 197:38] - node _T_73 = and(_T_72, _T_59) @[el2_lib.scala 197:43] - node _T_74 = bits(io.trigger_pkt_any[0].tdata2, 2, 2) @[el2_lib.scala 197:76] - node _T_75 = bits(lsu_match_data[0], 2, 2) @[el2_lib.scala 197:88] - node _T_76 = eq(_T_74, _T_75) @[el2_lib.scala 197:80] - node _T_77 = mux(_T_73, UInt<1>("h01"), _T_76) @[el2_lib.scala 197:25] - _T_56[2] <= _T_77 @[el2_lib.scala 197:19] - node _T_78 = bits(io.trigger_pkt_any[0].tdata2, 2, 0) @[el2_lib.scala 197:30] - node _T_79 = andr(_T_78) @[el2_lib.scala 197:38] - node _T_80 = and(_T_79, _T_59) @[el2_lib.scala 197:43] - node _T_81 = bits(io.trigger_pkt_any[0].tdata2, 3, 3) @[el2_lib.scala 197:76] - node _T_82 = bits(lsu_match_data[0], 3, 3) @[el2_lib.scala 197:88] - node _T_83 = eq(_T_81, _T_82) @[el2_lib.scala 197:80] - node _T_84 = mux(_T_80, UInt<1>("h01"), _T_83) @[el2_lib.scala 197:25] - _T_56[3] <= _T_84 @[el2_lib.scala 197:19] - node _T_85 = bits(io.trigger_pkt_any[0].tdata2, 3, 0) @[el2_lib.scala 197:30] - node _T_86 = andr(_T_85) @[el2_lib.scala 197:38] - node _T_87 = and(_T_86, _T_59) @[el2_lib.scala 197:43] - node _T_88 = bits(io.trigger_pkt_any[0].tdata2, 4, 4) @[el2_lib.scala 197:76] - node _T_89 = bits(lsu_match_data[0], 4, 4) @[el2_lib.scala 197:88] - node _T_90 = eq(_T_88, _T_89) @[el2_lib.scala 197:80] - node _T_91 = mux(_T_87, UInt<1>("h01"), _T_90) @[el2_lib.scala 197:25] - _T_56[4] <= _T_91 @[el2_lib.scala 197:19] - node _T_92 = bits(io.trigger_pkt_any[0].tdata2, 4, 0) @[el2_lib.scala 197:30] - node _T_93 = andr(_T_92) @[el2_lib.scala 197:38] - node _T_94 = and(_T_93, _T_59) @[el2_lib.scala 197:43] - node _T_95 = bits(io.trigger_pkt_any[0].tdata2, 5, 5) @[el2_lib.scala 197:76] - node _T_96 = bits(lsu_match_data[0], 5, 5) @[el2_lib.scala 197:88] - node _T_97 = eq(_T_95, _T_96) @[el2_lib.scala 197:80] - node _T_98 = mux(_T_94, UInt<1>("h01"), _T_97) @[el2_lib.scala 197:25] - _T_56[5] <= _T_98 @[el2_lib.scala 197:19] - node _T_99 = bits(io.trigger_pkt_any[0].tdata2, 5, 0) @[el2_lib.scala 197:30] - node _T_100 = andr(_T_99) @[el2_lib.scala 197:38] - node _T_101 = and(_T_100, _T_59) @[el2_lib.scala 197:43] - node _T_102 = bits(io.trigger_pkt_any[0].tdata2, 6, 6) @[el2_lib.scala 197:76] - node _T_103 = bits(lsu_match_data[0], 6, 6) @[el2_lib.scala 197:88] - node _T_104 = eq(_T_102, _T_103) @[el2_lib.scala 197:80] - node _T_105 = mux(_T_101, UInt<1>("h01"), _T_104) @[el2_lib.scala 197:25] - _T_56[6] <= _T_105 @[el2_lib.scala 197:19] - node _T_106 = bits(io.trigger_pkt_any[0].tdata2, 6, 0) @[el2_lib.scala 197:30] - node _T_107 = andr(_T_106) @[el2_lib.scala 197:38] - node _T_108 = and(_T_107, _T_59) @[el2_lib.scala 197:43] - node _T_109 = bits(io.trigger_pkt_any[0].tdata2, 7, 7) @[el2_lib.scala 197:76] - node _T_110 = bits(lsu_match_data[0], 7, 7) @[el2_lib.scala 197:88] - node _T_111 = eq(_T_109, _T_110) @[el2_lib.scala 197:80] - node _T_112 = mux(_T_108, UInt<1>("h01"), _T_111) @[el2_lib.scala 197:25] - _T_56[7] <= _T_112 @[el2_lib.scala 197:19] - node _T_113 = bits(io.trigger_pkt_any[0].tdata2, 7, 0) @[el2_lib.scala 197:30] - node _T_114 = andr(_T_113) @[el2_lib.scala 197:38] - node _T_115 = and(_T_114, _T_59) @[el2_lib.scala 197:43] - node _T_116 = bits(io.trigger_pkt_any[0].tdata2, 8, 8) @[el2_lib.scala 197:76] - node _T_117 = bits(lsu_match_data[0], 8, 8) @[el2_lib.scala 197:88] - node _T_118 = eq(_T_116, _T_117) @[el2_lib.scala 197:80] - node _T_119 = mux(_T_115, UInt<1>("h01"), _T_118) @[el2_lib.scala 197:25] - _T_56[8] <= _T_119 @[el2_lib.scala 197:19] - node _T_120 = bits(io.trigger_pkt_any[0].tdata2, 8, 0) @[el2_lib.scala 197:30] - node _T_121 = andr(_T_120) @[el2_lib.scala 197:38] - node _T_122 = and(_T_121, _T_59) @[el2_lib.scala 197:43] - node _T_123 = bits(io.trigger_pkt_any[0].tdata2, 9, 9) @[el2_lib.scala 197:76] - node _T_124 = bits(lsu_match_data[0], 9, 9) @[el2_lib.scala 197:88] - node _T_125 = eq(_T_123, _T_124) @[el2_lib.scala 197:80] - node _T_126 = mux(_T_122, UInt<1>("h01"), _T_125) @[el2_lib.scala 197:25] - _T_56[9] <= _T_126 @[el2_lib.scala 197:19] - node _T_127 = bits(io.trigger_pkt_any[0].tdata2, 9, 0) @[el2_lib.scala 197:30] - node _T_128 = andr(_T_127) @[el2_lib.scala 197:38] - node _T_129 = and(_T_128, _T_59) @[el2_lib.scala 197:43] - node _T_130 = bits(io.trigger_pkt_any[0].tdata2, 10, 10) @[el2_lib.scala 197:76] - node _T_131 = bits(lsu_match_data[0], 10, 10) @[el2_lib.scala 197:88] - node _T_132 = eq(_T_130, _T_131) @[el2_lib.scala 197:80] - node _T_133 = mux(_T_129, UInt<1>("h01"), _T_132) @[el2_lib.scala 197:25] - _T_56[10] <= _T_133 @[el2_lib.scala 197:19] - node _T_134 = bits(io.trigger_pkt_any[0].tdata2, 10, 0) @[el2_lib.scala 197:30] - node _T_135 = andr(_T_134) @[el2_lib.scala 197:38] - node _T_136 = and(_T_135, _T_59) @[el2_lib.scala 197:43] - node _T_137 = bits(io.trigger_pkt_any[0].tdata2, 11, 11) @[el2_lib.scala 197:76] - node _T_138 = bits(lsu_match_data[0], 11, 11) @[el2_lib.scala 197:88] - node _T_139 = eq(_T_137, _T_138) @[el2_lib.scala 197:80] - node _T_140 = mux(_T_136, UInt<1>("h01"), _T_139) @[el2_lib.scala 197:25] - _T_56[11] <= _T_140 @[el2_lib.scala 197:19] - node _T_141 = bits(io.trigger_pkt_any[0].tdata2, 11, 0) @[el2_lib.scala 197:30] - node _T_142 = andr(_T_141) @[el2_lib.scala 197:38] - node _T_143 = and(_T_142, _T_59) @[el2_lib.scala 197:43] - node _T_144 = bits(io.trigger_pkt_any[0].tdata2, 12, 12) @[el2_lib.scala 197:76] - node _T_145 = bits(lsu_match_data[0], 12, 12) @[el2_lib.scala 197:88] - node _T_146 = eq(_T_144, _T_145) @[el2_lib.scala 197:80] - node _T_147 = mux(_T_143, UInt<1>("h01"), _T_146) @[el2_lib.scala 197:25] - _T_56[12] <= _T_147 @[el2_lib.scala 197:19] - node _T_148 = bits(io.trigger_pkt_any[0].tdata2, 12, 0) @[el2_lib.scala 197:30] - node _T_149 = andr(_T_148) @[el2_lib.scala 197:38] - node _T_150 = and(_T_149, _T_59) @[el2_lib.scala 197:43] - node _T_151 = bits(io.trigger_pkt_any[0].tdata2, 13, 13) @[el2_lib.scala 197:76] - node _T_152 = bits(lsu_match_data[0], 13, 13) @[el2_lib.scala 197:88] - node _T_153 = eq(_T_151, _T_152) @[el2_lib.scala 197:80] - node _T_154 = mux(_T_150, UInt<1>("h01"), _T_153) @[el2_lib.scala 197:25] - _T_56[13] <= _T_154 @[el2_lib.scala 197:19] - node _T_155 = bits(io.trigger_pkt_any[0].tdata2, 13, 0) @[el2_lib.scala 197:30] - node _T_156 = andr(_T_155) @[el2_lib.scala 197:38] - node _T_157 = and(_T_156, _T_59) @[el2_lib.scala 197:43] - node _T_158 = bits(io.trigger_pkt_any[0].tdata2, 14, 14) @[el2_lib.scala 197:76] - node _T_159 = bits(lsu_match_data[0], 14, 14) @[el2_lib.scala 197:88] - node _T_160 = eq(_T_158, _T_159) @[el2_lib.scala 197:80] - node _T_161 = mux(_T_157, UInt<1>("h01"), _T_160) @[el2_lib.scala 197:25] - _T_56[14] <= _T_161 @[el2_lib.scala 197:19] - node _T_162 = bits(io.trigger_pkt_any[0].tdata2, 14, 0) @[el2_lib.scala 197:30] - node _T_163 = andr(_T_162) @[el2_lib.scala 197:38] - node _T_164 = and(_T_163, _T_59) @[el2_lib.scala 197:43] - node _T_165 = bits(io.trigger_pkt_any[0].tdata2, 15, 15) @[el2_lib.scala 197:76] - node _T_166 = bits(lsu_match_data[0], 15, 15) @[el2_lib.scala 197:88] - node _T_167 = eq(_T_165, _T_166) @[el2_lib.scala 197:80] - node _T_168 = mux(_T_164, UInt<1>("h01"), _T_167) @[el2_lib.scala 197:25] - _T_56[15] <= _T_168 @[el2_lib.scala 197:19] - node _T_169 = bits(io.trigger_pkt_any[0].tdata2, 15, 0) @[el2_lib.scala 197:30] - node _T_170 = andr(_T_169) @[el2_lib.scala 197:38] - node _T_171 = and(_T_170, _T_59) @[el2_lib.scala 197:43] - node _T_172 = bits(io.trigger_pkt_any[0].tdata2, 16, 16) @[el2_lib.scala 197:76] - node _T_173 = bits(lsu_match_data[0], 16, 16) @[el2_lib.scala 197:88] - node _T_174 = eq(_T_172, _T_173) @[el2_lib.scala 197:80] - node _T_175 = mux(_T_171, UInt<1>("h01"), _T_174) @[el2_lib.scala 197:25] - _T_56[16] <= _T_175 @[el2_lib.scala 197:19] - node _T_176 = bits(io.trigger_pkt_any[0].tdata2, 16, 0) @[el2_lib.scala 197:30] - node _T_177 = andr(_T_176) @[el2_lib.scala 197:38] - node _T_178 = and(_T_177, _T_59) @[el2_lib.scala 197:43] - node _T_179 = bits(io.trigger_pkt_any[0].tdata2, 17, 17) @[el2_lib.scala 197:76] - node _T_180 = bits(lsu_match_data[0], 17, 17) @[el2_lib.scala 197:88] - node _T_181 = eq(_T_179, _T_180) @[el2_lib.scala 197:80] - node _T_182 = mux(_T_178, UInt<1>("h01"), _T_181) @[el2_lib.scala 197:25] - _T_56[17] <= _T_182 @[el2_lib.scala 197:19] - node _T_183 = bits(io.trigger_pkt_any[0].tdata2, 17, 0) @[el2_lib.scala 197:30] - node _T_184 = andr(_T_183) @[el2_lib.scala 197:38] - node _T_185 = and(_T_184, _T_59) @[el2_lib.scala 197:43] - node _T_186 = bits(io.trigger_pkt_any[0].tdata2, 18, 18) @[el2_lib.scala 197:76] - node _T_187 = bits(lsu_match_data[0], 18, 18) @[el2_lib.scala 197:88] - node _T_188 = eq(_T_186, _T_187) @[el2_lib.scala 197:80] - node _T_189 = mux(_T_185, UInt<1>("h01"), _T_188) @[el2_lib.scala 197:25] - _T_56[18] <= _T_189 @[el2_lib.scala 197:19] - node _T_190 = bits(io.trigger_pkt_any[0].tdata2, 18, 0) @[el2_lib.scala 197:30] - node _T_191 = andr(_T_190) @[el2_lib.scala 197:38] - node _T_192 = and(_T_191, _T_59) @[el2_lib.scala 197:43] - node _T_193 = bits(io.trigger_pkt_any[0].tdata2, 19, 19) @[el2_lib.scala 197:76] - node _T_194 = bits(lsu_match_data[0], 19, 19) @[el2_lib.scala 197:88] - node _T_195 = eq(_T_193, _T_194) @[el2_lib.scala 197:80] - node _T_196 = mux(_T_192, UInt<1>("h01"), _T_195) @[el2_lib.scala 197:25] - _T_56[19] <= _T_196 @[el2_lib.scala 197:19] - node _T_197 = bits(io.trigger_pkt_any[0].tdata2, 19, 0) @[el2_lib.scala 197:30] - node _T_198 = andr(_T_197) @[el2_lib.scala 197:38] - node _T_199 = and(_T_198, _T_59) @[el2_lib.scala 197:43] - node _T_200 = bits(io.trigger_pkt_any[0].tdata2, 20, 20) @[el2_lib.scala 197:76] - node _T_201 = bits(lsu_match_data[0], 20, 20) @[el2_lib.scala 197:88] - node _T_202 = eq(_T_200, _T_201) @[el2_lib.scala 197:80] - node _T_203 = mux(_T_199, UInt<1>("h01"), _T_202) @[el2_lib.scala 197:25] - _T_56[20] <= _T_203 @[el2_lib.scala 197:19] - node _T_204 = bits(io.trigger_pkt_any[0].tdata2, 20, 0) @[el2_lib.scala 197:30] - node _T_205 = andr(_T_204) @[el2_lib.scala 197:38] - node _T_206 = and(_T_205, _T_59) @[el2_lib.scala 197:43] - node _T_207 = bits(io.trigger_pkt_any[0].tdata2, 21, 21) @[el2_lib.scala 197:76] - node _T_208 = bits(lsu_match_data[0], 21, 21) @[el2_lib.scala 197:88] - node _T_209 = eq(_T_207, _T_208) @[el2_lib.scala 197:80] - node _T_210 = mux(_T_206, UInt<1>("h01"), _T_209) @[el2_lib.scala 197:25] - _T_56[21] <= _T_210 @[el2_lib.scala 197:19] - node _T_211 = bits(io.trigger_pkt_any[0].tdata2, 21, 0) @[el2_lib.scala 197:30] - node _T_212 = andr(_T_211) @[el2_lib.scala 197:38] - node _T_213 = and(_T_212, _T_59) @[el2_lib.scala 197:43] - node _T_214 = bits(io.trigger_pkt_any[0].tdata2, 22, 22) @[el2_lib.scala 197:76] - node _T_215 = bits(lsu_match_data[0], 22, 22) @[el2_lib.scala 197:88] - node _T_216 = eq(_T_214, _T_215) @[el2_lib.scala 197:80] - node _T_217 = mux(_T_213, UInt<1>("h01"), _T_216) @[el2_lib.scala 197:25] - _T_56[22] <= _T_217 @[el2_lib.scala 197:19] - node _T_218 = bits(io.trigger_pkt_any[0].tdata2, 22, 0) @[el2_lib.scala 197:30] - node _T_219 = andr(_T_218) @[el2_lib.scala 197:38] - node _T_220 = and(_T_219, _T_59) @[el2_lib.scala 197:43] - node _T_221 = bits(io.trigger_pkt_any[0].tdata2, 23, 23) @[el2_lib.scala 197:76] - node _T_222 = bits(lsu_match_data[0], 23, 23) @[el2_lib.scala 197:88] - node _T_223 = eq(_T_221, _T_222) @[el2_lib.scala 197:80] - node _T_224 = mux(_T_220, UInt<1>("h01"), _T_223) @[el2_lib.scala 197:25] - _T_56[23] <= _T_224 @[el2_lib.scala 197:19] - node _T_225 = bits(io.trigger_pkt_any[0].tdata2, 23, 0) @[el2_lib.scala 197:30] - node _T_226 = andr(_T_225) @[el2_lib.scala 197:38] - node _T_227 = and(_T_226, _T_59) @[el2_lib.scala 197:43] - node _T_228 = bits(io.trigger_pkt_any[0].tdata2, 24, 24) @[el2_lib.scala 197:76] - node _T_229 = bits(lsu_match_data[0], 24, 24) @[el2_lib.scala 197:88] - node _T_230 = eq(_T_228, _T_229) @[el2_lib.scala 197:80] - node _T_231 = mux(_T_227, UInt<1>("h01"), _T_230) @[el2_lib.scala 197:25] - _T_56[24] <= _T_231 @[el2_lib.scala 197:19] - node _T_232 = bits(io.trigger_pkt_any[0].tdata2, 24, 0) @[el2_lib.scala 197:30] - node _T_233 = andr(_T_232) @[el2_lib.scala 197:38] - node _T_234 = and(_T_233, _T_59) @[el2_lib.scala 197:43] - node _T_235 = bits(io.trigger_pkt_any[0].tdata2, 25, 25) @[el2_lib.scala 197:76] - node _T_236 = bits(lsu_match_data[0], 25, 25) @[el2_lib.scala 197:88] - node _T_237 = eq(_T_235, _T_236) @[el2_lib.scala 197:80] - node _T_238 = mux(_T_234, UInt<1>("h01"), _T_237) @[el2_lib.scala 197:25] - _T_56[25] <= _T_238 @[el2_lib.scala 197:19] - node _T_239 = bits(io.trigger_pkt_any[0].tdata2, 25, 0) @[el2_lib.scala 197:30] - node _T_240 = andr(_T_239) @[el2_lib.scala 197:38] - node _T_241 = and(_T_240, _T_59) @[el2_lib.scala 197:43] - node _T_242 = bits(io.trigger_pkt_any[0].tdata2, 26, 26) @[el2_lib.scala 197:76] - node _T_243 = bits(lsu_match_data[0], 26, 26) @[el2_lib.scala 197:88] - node _T_244 = eq(_T_242, _T_243) @[el2_lib.scala 197:80] - node _T_245 = mux(_T_241, UInt<1>("h01"), _T_244) @[el2_lib.scala 197:25] - _T_56[26] <= _T_245 @[el2_lib.scala 197:19] - node _T_246 = bits(io.trigger_pkt_any[0].tdata2, 26, 0) @[el2_lib.scala 197:30] - node _T_247 = andr(_T_246) @[el2_lib.scala 197:38] - node _T_248 = and(_T_247, _T_59) @[el2_lib.scala 197:43] - node _T_249 = bits(io.trigger_pkt_any[0].tdata2, 27, 27) @[el2_lib.scala 197:76] - node _T_250 = bits(lsu_match_data[0], 27, 27) @[el2_lib.scala 197:88] - node _T_251 = eq(_T_249, _T_250) @[el2_lib.scala 197:80] - node _T_252 = mux(_T_248, UInt<1>("h01"), _T_251) @[el2_lib.scala 197:25] - _T_56[27] <= _T_252 @[el2_lib.scala 197:19] - node _T_253 = bits(io.trigger_pkt_any[0].tdata2, 27, 0) @[el2_lib.scala 197:30] - node _T_254 = andr(_T_253) @[el2_lib.scala 197:38] - node _T_255 = and(_T_254, _T_59) @[el2_lib.scala 197:43] - node _T_256 = bits(io.trigger_pkt_any[0].tdata2, 28, 28) @[el2_lib.scala 197:76] - node _T_257 = bits(lsu_match_data[0], 28, 28) @[el2_lib.scala 197:88] - node _T_258 = eq(_T_256, _T_257) @[el2_lib.scala 197:80] - node _T_259 = mux(_T_255, UInt<1>("h01"), _T_258) @[el2_lib.scala 197:25] - _T_56[28] <= _T_259 @[el2_lib.scala 197:19] - node _T_260 = bits(io.trigger_pkt_any[0].tdata2, 28, 0) @[el2_lib.scala 197:30] - node _T_261 = andr(_T_260) @[el2_lib.scala 197:38] - node _T_262 = and(_T_261, _T_59) @[el2_lib.scala 197:43] - node _T_263 = bits(io.trigger_pkt_any[0].tdata2, 29, 29) @[el2_lib.scala 197:76] - node _T_264 = bits(lsu_match_data[0], 29, 29) @[el2_lib.scala 197:88] - node _T_265 = eq(_T_263, _T_264) @[el2_lib.scala 197:80] - node _T_266 = mux(_T_262, UInt<1>("h01"), _T_265) @[el2_lib.scala 197:25] - _T_56[29] <= _T_266 @[el2_lib.scala 197:19] - node _T_267 = bits(io.trigger_pkt_any[0].tdata2, 29, 0) @[el2_lib.scala 197:30] - node _T_268 = andr(_T_267) @[el2_lib.scala 197:38] - node _T_269 = and(_T_268, _T_59) @[el2_lib.scala 197:43] - node _T_270 = bits(io.trigger_pkt_any[0].tdata2, 30, 30) @[el2_lib.scala 197:76] - node _T_271 = bits(lsu_match_data[0], 30, 30) @[el2_lib.scala 197:88] - node _T_272 = eq(_T_270, _T_271) @[el2_lib.scala 197:80] - node _T_273 = mux(_T_269, UInt<1>("h01"), _T_272) @[el2_lib.scala 197:25] - _T_56[30] <= _T_273 @[el2_lib.scala 197:19] - node _T_274 = bits(io.trigger_pkt_any[0].tdata2, 30, 0) @[el2_lib.scala 197:30] - node _T_275 = andr(_T_274) @[el2_lib.scala 197:38] - node _T_276 = and(_T_275, _T_59) @[el2_lib.scala 197:43] - node _T_277 = bits(io.trigger_pkt_any[0].tdata2, 31, 31) @[el2_lib.scala 197:76] - node _T_278 = bits(lsu_match_data[0], 31, 31) @[el2_lib.scala 197:88] - node _T_279 = eq(_T_277, _T_278) @[el2_lib.scala 197:80] - node _T_280 = mux(_T_276, UInt<1>("h01"), _T_279) @[el2_lib.scala 197:25] - _T_56[31] <= _T_280 @[el2_lib.scala 197:19] - node _T_281 = cat(_T_56[1], _T_56[0]) @[el2_lib.scala 198:14] - node _T_282 = cat(_T_56[3], _T_56[2]) @[el2_lib.scala 198:14] - node _T_283 = cat(_T_282, _T_281) @[el2_lib.scala 198:14] - node _T_284 = cat(_T_56[5], _T_56[4]) @[el2_lib.scala 198:14] - node _T_285 = cat(_T_56[7], _T_56[6]) @[el2_lib.scala 198:14] - node _T_286 = cat(_T_285, _T_284) @[el2_lib.scala 198:14] - node _T_287 = cat(_T_286, _T_283) @[el2_lib.scala 198:14] - node _T_288 = cat(_T_56[9], _T_56[8]) @[el2_lib.scala 198:14] - node _T_289 = cat(_T_56[11], _T_56[10]) @[el2_lib.scala 198:14] - node _T_290 = cat(_T_289, _T_288) @[el2_lib.scala 198:14] - node _T_291 = cat(_T_56[13], _T_56[12]) @[el2_lib.scala 198:14] - node _T_292 = cat(_T_56[15], _T_56[14]) @[el2_lib.scala 198:14] - node _T_293 = cat(_T_292, _T_291) @[el2_lib.scala 198:14] - node _T_294 = cat(_T_293, _T_290) @[el2_lib.scala 198:14] - node _T_295 = cat(_T_294, _T_287) @[el2_lib.scala 198:14] - node _T_296 = cat(_T_56[17], _T_56[16]) @[el2_lib.scala 198:14] - node _T_297 = cat(_T_56[19], _T_56[18]) @[el2_lib.scala 198:14] - node _T_298 = cat(_T_297, _T_296) @[el2_lib.scala 198:14] - node _T_299 = cat(_T_56[21], _T_56[20]) @[el2_lib.scala 198:14] - node _T_300 = cat(_T_56[23], _T_56[22]) @[el2_lib.scala 198:14] - node _T_301 = cat(_T_300, _T_299) @[el2_lib.scala 198:14] - node _T_302 = cat(_T_301, _T_298) @[el2_lib.scala 198:14] - node _T_303 = cat(_T_56[25], _T_56[24]) @[el2_lib.scala 198:14] - node _T_304 = cat(_T_56[27], _T_56[26]) @[el2_lib.scala 198:14] - node _T_305 = cat(_T_304, _T_303) @[el2_lib.scala 198:14] - node _T_306 = cat(_T_56[29], _T_56[28]) @[el2_lib.scala 198:14] - node _T_307 = cat(_T_56[31], _T_56[30]) @[el2_lib.scala 198:14] - node _T_308 = cat(_T_307, _T_306) @[el2_lib.scala 198:14] - node _T_309 = cat(_T_308, _T_305) @[el2_lib.scala 198:14] - node _T_310 = cat(_T_309, _T_302) @[el2_lib.scala 198:14] - node _T_311 = cat(_T_310, _T_295) @[el2_lib.scala 198:14] - node _T_312 = and(_T_54, _T_311) @[el2_lsu_trigger.scala 22:86] - node _T_313 = or(_T_51, _T_312) @[el2_lsu_trigger.scala 21:141] - node _T_314 = eq(io.lsu_pkt_m.dma, UInt<1>("h00")) @[el2_lsu_trigger.scala 21:71] - node _T_315 = and(io.lsu_pkt_m.valid, _T_314) @[el2_lsu_trigger.scala 21:69] - node _T_316 = and(io.trigger_pkt_any[1].store, io.lsu_pkt_m.store) @[el2_lsu_trigger.scala 21:120] - node _T_317 = and(_T_315, _T_316) @[el2_lsu_trigger.scala 21:89] - node _T_318 = and(io.trigger_pkt_any[1].load, io.lsu_pkt_m.load) @[el2_lsu_trigger.scala 22:33] - node _T_319 = eq(io.trigger_pkt_any[1].select, UInt<1>("h00")) @[el2_lsu_trigger.scala 22:55] - node _T_320 = and(_T_318, _T_319) @[el2_lsu_trigger.scala 22:53] - node _T_321 = bits(io.trigger_pkt_any[1].match_, 0, 0) @[el2_lsu_trigger.scala 23:106] - wire _T_322 : UInt<1>[32] @[el2_lib.scala 193:24] - node _T_323 = andr(io.trigger_pkt_any[1].tdata2) @[el2_lib.scala 194:45] - node _T_324 = not(_T_323) @[el2_lib.scala 194:39] - node _T_325 = and(_T_321, _T_324) @[el2_lib.scala 194:37] - node _T_326 = bits(io.trigger_pkt_any[1].tdata2, 0, 0) @[el2_lib.scala 195:48] - node _T_327 = bits(lsu_match_data[1], 0, 0) @[el2_lib.scala 195:60] - node _T_328 = eq(_T_326, _T_327) @[el2_lib.scala 195:52] - node _T_329 = or(_T_325, _T_328) @[el2_lib.scala 195:41] - _T_322[0] <= _T_329 @[el2_lib.scala 195:18] - node _T_330 = bits(io.trigger_pkt_any[1].tdata2, 0, 0) @[el2_lib.scala 197:30] - node _T_331 = andr(_T_330) @[el2_lib.scala 197:38] - node _T_332 = and(_T_331, _T_325) @[el2_lib.scala 197:43] - node _T_333 = bits(io.trigger_pkt_any[1].tdata2, 1, 1) @[el2_lib.scala 197:76] - node _T_334 = bits(lsu_match_data[1], 1, 1) @[el2_lib.scala 197:88] - node _T_335 = eq(_T_333, _T_334) @[el2_lib.scala 197:80] - node _T_336 = mux(_T_332, UInt<1>("h01"), _T_335) @[el2_lib.scala 197:25] - _T_322[1] <= _T_336 @[el2_lib.scala 197:19] - node _T_337 = bits(io.trigger_pkt_any[1].tdata2, 1, 0) @[el2_lib.scala 197:30] - node _T_338 = andr(_T_337) @[el2_lib.scala 197:38] - node _T_339 = and(_T_338, _T_325) @[el2_lib.scala 197:43] - node _T_340 = bits(io.trigger_pkt_any[1].tdata2, 2, 2) @[el2_lib.scala 197:76] - node _T_341 = bits(lsu_match_data[1], 2, 2) @[el2_lib.scala 197:88] - node _T_342 = eq(_T_340, _T_341) @[el2_lib.scala 197:80] - node _T_343 = mux(_T_339, UInt<1>("h01"), _T_342) @[el2_lib.scala 197:25] - _T_322[2] <= _T_343 @[el2_lib.scala 197:19] - node _T_344 = bits(io.trigger_pkt_any[1].tdata2, 2, 0) @[el2_lib.scala 197:30] - node _T_345 = andr(_T_344) @[el2_lib.scala 197:38] - node _T_346 = and(_T_345, _T_325) @[el2_lib.scala 197:43] - node _T_347 = bits(io.trigger_pkt_any[1].tdata2, 3, 3) @[el2_lib.scala 197:76] - node _T_348 = bits(lsu_match_data[1], 3, 3) @[el2_lib.scala 197:88] - node _T_349 = eq(_T_347, _T_348) @[el2_lib.scala 197:80] - node _T_350 = mux(_T_346, UInt<1>("h01"), _T_349) @[el2_lib.scala 197:25] - _T_322[3] <= _T_350 @[el2_lib.scala 197:19] - node _T_351 = bits(io.trigger_pkt_any[1].tdata2, 3, 0) @[el2_lib.scala 197:30] - node _T_352 = andr(_T_351) @[el2_lib.scala 197:38] - node _T_353 = and(_T_352, _T_325) @[el2_lib.scala 197:43] - node _T_354 = bits(io.trigger_pkt_any[1].tdata2, 4, 4) @[el2_lib.scala 197:76] - node _T_355 = bits(lsu_match_data[1], 4, 4) @[el2_lib.scala 197:88] - node _T_356 = eq(_T_354, _T_355) @[el2_lib.scala 197:80] - node _T_357 = mux(_T_353, UInt<1>("h01"), _T_356) @[el2_lib.scala 197:25] - _T_322[4] <= _T_357 @[el2_lib.scala 197:19] - node _T_358 = bits(io.trigger_pkt_any[1].tdata2, 4, 0) @[el2_lib.scala 197:30] - node _T_359 = andr(_T_358) @[el2_lib.scala 197:38] - node _T_360 = and(_T_359, _T_325) @[el2_lib.scala 197:43] - node _T_361 = bits(io.trigger_pkt_any[1].tdata2, 5, 5) @[el2_lib.scala 197:76] - node _T_362 = bits(lsu_match_data[1], 5, 5) @[el2_lib.scala 197:88] - node _T_363 = eq(_T_361, _T_362) @[el2_lib.scala 197:80] - node _T_364 = mux(_T_360, UInt<1>("h01"), _T_363) @[el2_lib.scala 197:25] - _T_322[5] <= _T_364 @[el2_lib.scala 197:19] - node _T_365 = bits(io.trigger_pkt_any[1].tdata2, 5, 0) @[el2_lib.scala 197:30] - node _T_366 = andr(_T_365) @[el2_lib.scala 197:38] - node _T_367 = and(_T_366, _T_325) @[el2_lib.scala 197:43] - node _T_368 = bits(io.trigger_pkt_any[1].tdata2, 6, 6) @[el2_lib.scala 197:76] - node _T_369 = bits(lsu_match_data[1], 6, 6) @[el2_lib.scala 197:88] - node _T_370 = eq(_T_368, _T_369) @[el2_lib.scala 197:80] - node _T_371 = mux(_T_367, UInt<1>("h01"), _T_370) @[el2_lib.scala 197:25] - _T_322[6] <= _T_371 @[el2_lib.scala 197:19] - node _T_372 = bits(io.trigger_pkt_any[1].tdata2, 6, 0) @[el2_lib.scala 197:30] - node _T_373 = andr(_T_372) @[el2_lib.scala 197:38] - node _T_374 = and(_T_373, _T_325) @[el2_lib.scala 197:43] - node _T_375 = bits(io.trigger_pkt_any[1].tdata2, 7, 7) @[el2_lib.scala 197:76] - node _T_376 = bits(lsu_match_data[1], 7, 7) @[el2_lib.scala 197:88] - node _T_377 = eq(_T_375, _T_376) @[el2_lib.scala 197:80] - node _T_378 = mux(_T_374, UInt<1>("h01"), _T_377) @[el2_lib.scala 197:25] - _T_322[7] <= _T_378 @[el2_lib.scala 197:19] - node _T_379 = bits(io.trigger_pkt_any[1].tdata2, 7, 0) @[el2_lib.scala 197:30] - node _T_380 = andr(_T_379) @[el2_lib.scala 197:38] - node _T_381 = and(_T_380, _T_325) @[el2_lib.scala 197:43] - node _T_382 = bits(io.trigger_pkt_any[1].tdata2, 8, 8) @[el2_lib.scala 197:76] - node _T_383 = bits(lsu_match_data[1], 8, 8) @[el2_lib.scala 197:88] - node _T_384 = eq(_T_382, _T_383) @[el2_lib.scala 197:80] - node _T_385 = mux(_T_381, UInt<1>("h01"), _T_384) @[el2_lib.scala 197:25] - _T_322[8] <= _T_385 @[el2_lib.scala 197:19] - node _T_386 = bits(io.trigger_pkt_any[1].tdata2, 8, 0) @[el2_lib.scala 197:30] - node _T_387 = andr(_T_386) @[el2_lib.scala 197:38] - node _T_388 = and(_T_387, _T_325) @[el2_lib.scala 197:43] - node _T_389 = bits(io.trigger_pkt_any[1].tdata2, 9, 9) @[el2_lib.scala 197:76] - node _T_390 = bits(lsu_match_data[1], 9, 9) @[el2_lib.scala 197:88] - node _T_391 = eq(_T_389, _T_390) @[el2_lib.scala 197:80] - node _T_392 = mux(_T_388, UInt<1>("h01"), _T_391) @[el2_lib.scala 197:25] - _T_322[9] <= _T_392 @[el2_lib.scala 197:19] - node _T_393 = bits(io.trigger_pkt_any[1].tdata2, 9, 0) @[el2_lib.scala 197:30] - node _T_394 = andr(_T_393) @[el2_lib.scala 197:38] - node _T_395 = and(_T_394, _T_325) @[el2_lib.scala 197:43] - node _T_396 = bits(io.trigger_pkt_any[1].tdata2, 10, 10) @[el2_lib.scala 197:76] - node _T_397 = bits(lsu_match_data[1], 10, 10) @[el2_lib.scala 197:88] - node _T_398 = eq(_T_396, _T_397) @[el2_lib.scala 197:80] - node _T_399 = mux(_T_395, UInt<1>("h01"), _T_398) @[el2_lib.scala 197:25] - _T_322[10] <= _T_399 @[el2_lib.scala 197:19] - node _T_400 = bits(io.trigger_pkt_any[1].tdata2, 10, 0) @[el2_lib.scala 197:30] - node _T_401 = andr(_T_400) @[el2_lib.scala 197:38] - node _T_402 = and(_T_401, _T_325) @[el2_lib.scala 197:43] - node _T_403 = bits(io.trigger_pkt_any[1].tdata2, 11, 11) @[el2_lib.scala 197:76] - node _T_404 = bits(lsu_match_data[1], 11, 11) @[el2_lib.scala 197:88] - node _T_405 = eq(_T_403, _T_404) @[el2_lib.scala 197:80] - node _T_406 = mux(_T_402, UInt<1>("h01"), _T_405) @[el2_lib.scala 197:25] - _T_322[11] <= _T_406 @[el2_lib.scala 197:19] - node _T_407 = bits(io.trigger_pkt_any[1].tdata2, 11, 0) @[el2_lib.scala 197:30] - node _T_408 = andr(_T_407) @[el2_lib.scala 197:38] - node _T_409 = and(_T_408, _T_325) @[el2_lib.scala 197:43] - node _T_410 = bits(io.trigger_pkt_any[1].tdata2, 12, 12) @[el2_lib.scala 197:76] - node _T_411 = bits(lsu_match_data[1], 12, 12) @[el2_lib.scala 197:88] - node _T_412 = eq(_T_410, _T_411) @[el2_lib.scala 197:80] - node _T_413 = mux(_T_409, UInt<1>("h01"), _T_412) @[el2_lib.scala 197:25] - _T_322[12] <= _T_413 @[el2_lib.scala 197:19] - node _T_414 = bits(io.trigger_pkt_any[1].tdata2, 12, 0) @[el2_lib.scala 197:30] - node _T_415 = andr(_T_414) @[el2_lib.scala 197:38] - node _T_416 = and(_T_415, _T_325) @[el2_lib.scala 197:43] - node _T_417 = bits(io.trigger_pkt_any[1].tdata2, 13, 13) @[el2_lib.scala 197:76] - node _T_418 = bits(lsu_match_data[1], 13, 13) @[el2_lib.scala 197:88] - node _T_419 = eq(_T_417, _T_418) @[el2_lib.scala 197:80] - node _T_420 = mux(_T_416, UInt<1>("h01"), _T_419) @[el2_lib.scala 197:25] - _T_322[13] <= _T_420 @[el2_lib.scala 197:19] - node _T_421 = bits(io.trigger_pkt_any[1].tdata2, 13, 0) @[el2_lib.scala 197:30] - node _T_422 = andr(_T_421) @[el2_lib.scala 197:38] - node _T_423 = and(_T_422, _T_325) @[el2_lib.scala 197:43] - node _T_424 = bits(io.trigger_pkt_any[1].tdata2, 14, 14) @[el2_lib.scala 197:76] - node _T_425 = bits(lsu_match_data[1], 14, 14) @[el2_lib.scala 197:88] - node _T_426 = eq(_T_424, _T_425) @[el2_lib.scala 197:80] - node _T_427 = mux(_T_423, UInt<1>("h01"), _T_426) @[el2_lib.scala 197:25] - _T_322[14] <= _T_427 @[el2_lib.scala 197:19] - node _T_428 = bits(io.trigger_pkt_any[1].tdata2, 14, 0) @[el2_lib.scala 197:30] - node _T_429 = andr(_T_428) @[el2_lib.scala 197:38] - node _T_430 = and(_T_429, _T_325) @[el2_lib.scala 197:43] - node _T_431 = bits(io.trigger_pkt_any[1].tdata2, 15, 15) @[el2_lib.scala 197:76] - node _T_432 = bits(lsu_match_data[1], 15, 15) @[el2_lib.scala 197:88] - node _T_433 = eq(_T_431, _T_432) @[el2_lib.scala 197:80] - node _T_434 = mux(_T_430, UInt<1>("h01"), _T_433) @[el2_lib.scala 197:25] - _T_322[15] <= _T_434 @[el2_lib.scala 197:19] - node _T_435 = bits(io.trigger_pkt_any[1].tdata2, 15, 0) @[el2_lib.scala 197:30] - node _T_436 = andr(_T_435) @[el2_lib.scala 197:38] - node _T_437 = and(_T_436, _T_325) @[el2_lib.scala 197:43] - node _T_438 = bits(io.trigger_pkt_any[1].tdata2, 16, 16) @[el2_lib.scala 197:76] - node _T_439 = bits(lsu_match_data[1], 16, 16) @[el2_lib.scala 197:88] - node _T_440 = eq(_T_438, _T_439) @[el2_lib.scala 197:80] - node _T_441 = mux(_T_437, UInt<1>("h01"), _T_440) @[el2_lib.scala 197:25] - _T_322[16] <= _T_441 @[el2_lib.scala 197:19] - node _T_442 = bits(io.trigger_pkt_any[1].tdata2, 16, 0) @[el2_lib.scala 197:30] - node _T_443 = andr(_T_442) @[el2_lib.scala 197:38] - node _T_444 = and(_T_443, _T_325) @[el2_lib.scala 197:43] - node _T_445 = bits(io.trigger_pkt_any[1].tdata2, 17, 17) @[el2_lib.scala 197:76] - node _T_446 = bits(lsu_match_data[1], 17, 17) @[el2_lib.scala 197:88] - node _T_447 = eq(_T_445, _T_446) @[el2_lib.scala 197:80] - node _T_448 = mux(_T_444, UInt<1>("h01"), _T_447) @[el2_lib.scala 197:25] - _T_322[17] <= _T_448 @[el2_lib.scala 197:19] - node _T_449 = bits(io.trigger_pkt_any[1].tdata2, 17, 0) @[el2_lib.scala 197:30] - node _T_450 = andr(_T_449) @[el2_lib.scala 197:38] - node _T_451 = and(_T_450, _T_325) @[el2_lib.scala 197:43] - node _T_452 = bits(io.trigger_pkt_any[1].tdata2, 18, 18) @[el2_lib.scala 197:76] - node _T_453 = bits(lsu_match_data[1], 18, 18) @[el2_lib.scala 197:88] - node _T_454 = eq(_T_452, _T_453) @[el2_lib.scala 197:80] - node _T_455 = mux(_T_451, UInt<1>("h01"), _T_454) @[el2_lib.scala 197:25] - _T_322[18] <= _T_455 @[el2_lib.scala 197:19] - node _T_456 = bits(io.trigger_pkt_any[1].tdata2, 18, 0) @[el2_lib.scala 197:30] - node _T_457 = andr(_T_456) @[el2_lib.scala 197:38] - node _T_458 = and(_T_457, _T_325) @[el2_lib.scala 197:43] - node _T_459 = bits(io.trigger_pkt_any[1].tdata2, 19, 19) @[el2_lib.scala 197:76] - node _T_460 = bits(lsu_match_data[1], 19, 19) @[el2_lib.scala 197:88] - node _T_461 = eq(_T_459, _T_460) @[el2_lib.scala 197:80] - node _T_462 = mux(_T_458, UInt<1>("h01"), _T_461) @[el2_lib.scala 197:25] - _T_322[19] <= _T_462 @[el2_lib.scala 197:19] - node _T_463 = bits(io.trigger_pkt_any[1].tdata2, 19, 0) @[el2_lib.scala 197:30] - node _T_464 = andr(_T_463) @[el2_lib.scala 197:38] - node _T_465 = and(_T_464, _T_325) @[el2_lib.scala 197:43] - node _T_466 = bits(io.trigger_pkt_any[1].tdata2, 20, 20) @[el2_lib.scala 197:76] - node _T_467 = bits(lsu_match_data[1], 20, 20) @[el2_lib.scala 197:88] - node _T_468 = eq(_T_466, _T_467) @[el2_lib.scala 197:80] - node _T_469 = mux(_T_465, UInt<1>("h01"), _T_468) @[el2_lib.scala 197:25] - _T_322[20] <= _T_469 @[el2_lib.scala 197:19] - node _T_470 = bits(io.trigger_pkt_any[1].tdata2, 20, 0) @[el2_lib.scala 197:30] - node _T_471 = andr(_T_470) @[el2_lib.scala 197:38] - node _T_472 = and(_T_471, _T_325) @[el2_lib.scala 197:43] - node _T_473 = bits(io.trigger_pkt_any[1].tdata2, 21, 21) @[el2_lib.scala 197:76] - node _T_474 = bits(lsu_match_data[1], 21, 21) @[el2_lib.scala 197:88] - node _T_475 = eq(_T_473, _T_474) @[el2_lib.scala 197:80] - node _T_476 = mux(_T_472, UInt<1>("h01"), _T_475) @[el2_lib.scala 197:25] - _T_322[21] <= _T_476 @[el2_lib.scala 197:19] - node _T_477 = bits(io.trigger_pkt_any[1].tdata2, 21, 0) @[el2_lib.scala 197:30] - node _T_478 = andr(_T_477) @[el2_lib.scala 197:38] - node _T_479 = and(_T_478, _T_325) @[el2_lib.scala 197:43] - node _T_480 = bits(io.trigger_pkt_any[1].tdata2, 22, 22) @[el2_lib.scala 197:76] - node _T_481 = bits(lsu_match_data[1], 22, 22) @[el2_lib.scala 197:88] - node _T_482 = eq(_T_480, _T_481) @[el2_lib.scala 197:80] - node _T_483 = mux(_T_479, UInt<1>("h01"), _T_482) @[el2_lib.scala 197:25] - _T_322[22] <= _T_483 @[el2_lib.scala 197:19] - node _T_484 = bits(io.trigger_pkt_any[1].tdata2, 22, 0) @[el2_lib.scala 197:30] - node _T_485 = andr(_T_484) @[el2_lib.scala 197:38] - node _T_486 = and(_T_485, _T_325) @[el2_lib.scala 197:43] - node _T_487 = bits(io.trigger_pkt_any[1].tdata2, 23, 23) @[el2_lib.scala 197:76] - node _T_488 = bits(lsu_match_data[1], 23, 23) @[el2_lib.scala 197:88] - node _T_489 = eq(_T_487, _T_488) @[el2_lib.scala 197:80] - node _T_490 = mux(_T_486, UInt<1>("h01"), _T_489) @[el2_lib.scala 197:25] - _T_322[23] <= _T_490 @[el2_lib.scala 197:19] - node _T_491 = bits(io.trigger_pkt_any[1].tdata2, 23, 0) @[el2_lib.scala 197:30] - node _T_492 = andr(_T_491) @[el2_lib.scala 197:38] - node _T_493 = and(_T_492, _T_325) @[el2_lib.scala 197:43] - node _T_494 = bits(io.trigger_pkt_any[1].tdata2, 24, 24) @[el2_lib.scala 197:76] - node _T_495 = bits(lsu_match_data[1], 24, 24) @[el2_lib.scala 197:88] - node _T_496 = eq(_T_494, _T_495) @[el2_lib.scala 197:80] - node _T_497 = mux(_T_493, UInt<1>("h01"), _T_496) @[el2_lib.scala 197:25] - _T_322[24] <= _T_497 @[el2_lib.scala 197:19] - node _T_498 = bits(io.trigger_pkt_any[1].tdata2, 24, 0) @[el2_lib.scala 197:30] - node _T_499 = andr(_T_498) @[el2_lib.scala 197:38] - node _T_500 = and(_T_499, _T_325) @[el2_lib.scala 197:43] - node _T_501 = bits(io.trigger_pkt_any[1].tdata2, 25, 25) @[el2_lib.scala 197:76] - node _T_502 = bits(lsu_match_data[1], 25, 25) @[el2_lib.scala 197:88] - node _T_503 = eq(_T_501, _T_502) @[el2_lib.scala 197:80] - node _T_504 = mux(_T_500, UInt<1>("h01"), _T_503) @[el2_lib.scala 197:25] - _T_322[25] <= _T_504 @[el2_lib.scala 197:19] - node _T_505 = bits(io.trigger_pkt_any[1].tdata2, 25, 0) @[el2_lib.scala 197:30] - node _T_506 = andr(_T_505) @[el2_lib.scala 197:38] - node _T_507 = and(_T_506, _T_325) @[el2_lib.scala 197:43] - node _T_508 = bits(io.trigger_pkt_any[1].tdata2, 26, 26) @[el2_lib.scala 197:76] - node _T_509 = bits(lsu_match_data[1], 26, 26) @[el2_lib.scala 197:88] - node _T_510 = eq(_T_508, _T_509) @[el2_lib.scala 197:80] - node _T_511 = mux(_T_507, UInt<1>("h01"), _T_510) @[el2_lib.scala 197:25] - _T_322[26] <= _T_511 @[el2_lib.scala 197:19] - node _T_512 = bits(io.trigger_pkt_any[1].tdata2, 26, 0) @[el2_lib.scala 197:30] - node _T_513 = andr(_T_512) @[el2_lib.scala 197:38] - node _T_514 = and(_T_513, _T_325) @[el2_lib.scala 197:43] - node _T_515 = bits(io.trigger_pkt_any[1].tdata2, 27, 27) @[el2_lib.scala 197:76] - node _T_516 = bits(lsu_match_data[1], 27, 27) @[el2_lib.scala 197:88] - node _T_517 = eq(_T_515, _T_516) @[el2_lib.scala 197:80] - node _T_518 = mux(_T_514, UInt<1>("h01"), _T_517) @[el2_lib.scala 197:25] - _T_322[27] <= _T_518 @[el2_lib.scala 197:19] - node _T_519 = bits(io.trigger_pkt_any[1].tdata2, 27, 0) @[el2_lib.scala 197:30] - node _T_520 = andr(_T_519) @[el2_lib.scala 197:38] - node _T_521 = and(_T_520, _T_325) @[el2_lib.scala 197:43] - node _T_522 = bits(io.trigger_pkt_any[1].tdata2, 28, 28) @[el2_lib.scala 197:76] - node _T_523 = bits(lsu_match_data[1], 28, 28) @[el2_lib.scala 197:88] - node _T_524 = eq(_T_522, _T_523) @[el2_lib.scala 197:80] - node _T_525 = mux(_T_521, UInt<1>("h01"), _T_524) @[el2_lib.scala 197:25] - _T_322[28] <= _T_525 @[el2_lib.scala 197:19] - node _T_526 = bits(io.trigger_pkt_any[1].tdata2, 28, 0) @[el2_lib.scala 197:30] - node _T_527 = andr(_T_526) @[el2_lib.scala 197:38] - node _T_528 = and(_T_527, _T_325) @[el2_lib.scala 197:43] - node _T_529 = bits(io.trigger_pkt_any[1].tdata2, 29, 29) @[el2_lib.scala 197:76] - node _T_530 = bits(lsu_match_data[1], 29, 29) @[el2_lib.scala 197:88] - node _T_531 = eq(_T_529, _T_530) @[el2_lib.scala 197:80] - node _T_532 = mux(_T_528, UInt<1>("h01"), _T_531) @[el2_lib.scala 197:25] - _T_322[29] <= _T_532 @[el2_lib.scala 197:19] - node _T_533 = bits(io.trigger_pkt_any[1].tdata2, 29, 0) @[el2_lib.scala 197:30] - node _T_534 = andr(_T_533) @[el2_lib.scala 197:38] - node _T_535 = and(_T_534, _T_325) @[el2_lib.scala 197:43] - node _T_536 = bits(io.trigger_pkt_any[1].tdata2, 30, 30) @[el2_lib.scala 197:76] - node _T_537 = bits(lsu_match_data[1], 30, 30) @[el2_lib.scala 197:88] - node _T_538 = eq(_T_536, _T_537) @[el2_lib.scala 197:80] - node _T_539 = mux(_T_535, UInt<1>("h01"), _T_538) @[el2_lib.scala 197:25] - _T_322[30] <= _T_539 @[el2_lib.scala 197:19] - node _T_540 = bits(io.trigger_pkt_any[1].tdata2, 30, 0) @[el2_lib.scala 197:30] - node _T_541 = andr(_T_540) @[el2_lib.scala 197:38] - node _T_542 = and(_T_541, _T_325) @[el2_lib.scala 197:43] - node _T_543 = bits(io.trigger_pkt_any[1].tdata2, 31, 31) @[el2_lib.scala 197:76] - node _T_544 = bits(lsu_match_data[1], 31, 31) @[el2_lib.scala 197:88] - node _T_545 = eq(_T_543, _T_544) @[el2_lib.scala 197:80] - node _T_546 = mux(_T_542, UInt<1>("h01"), _T_545) @[el2_lib.scala 197:25] - _T_322[31] <= _T_546 @[el2_lib.scala 197:19] - node _T_547 = cat(_T_322[1], _T_322[0]) @[el2_lib.scala 198:14] - node _T_548 = cat(_T_322[3], _T_322[2]) @[el2_lib.scala 198:14] - node _T_549 = cat(_T_548, _T_547) @[el2_lib.scala 198:14] - node _T_550 = cat(_T_322[5], _T_322[4]) @[el2_lib.scala 198:14] - node _T_551 = cat(_T_322[7], _T_322[6]) @[el2_lib.scala 198:14] - node _T_552 = cat(_T_551, _T_550) @[el2_lib.scala 198:14] - node _T_553 = cat(_T_552, _T_549) @[el2_lib.scala 198:14] - node _T_554 = cat(_T_322[9], _T_322[8]) @[el2_lib.scala 198:14] - node _T_555 = cat(_T_322[11], _T_322[10]) @[el2_lib.scala 198:14] - node _T_556 = cat(_T_555, _T_554) @[el2_lib.scala 198:14] - node _T_557 = cat(_T_322[13], _T_322[12]) @[el2_lib.scala 198:14] - node _T_558 = cat(_T_322[15], _T_322[14]) @[el2_lib.scala 198:14] - node _T_559 = cat(_T_558, _T_557) @[el2_lib.scala 198:14] - node _T_560 = cat(_T_559, _T_556) @[el2_lib.scala 198:14] - node _T_561 = cat(_T_560, _T_553) @[el2_lib.scala 198:14] - node _T_562 = cat(_T_322[17], _T_322[16]) @[el2_lib.scala 198:14] - node _T_563 = cat(_T_322[19], _T_322[18]) @[el2_lib.scala 198:14] - node _T_564 = cat(_T_563, _T_562) @[el2_lib.scala 198:14] - node _T_565 = cat(_T_322[21], _T_322[20]) @[el2_lib.scala 198:14] - node _T_566 = cat(_T_322[23], _T_322[22]) @[el2_lib.scala 198:14] - node _T_567 = cat(_T_566, _T_565) @[el2_lib.scala 198:14] - node _T_568 = cat(_T_567, _T_564) @[el2_lib.scala 198:14] - node _T_569 = cat(_T_322[25], _T_322[24]) @[el2_lib.scala 198:14] - node _T_570 = cat(_T_322[27], _T_322[26]) @[el2_lib.scala 198:14] - node _T_571 = cat(_T_570, _T_569) @[el2_lib.scala 198:14] - node _T_572 = cat(_T_322[29], _T_322[28]) @[el2_lib.scala 198:14] - node _T_573 = cat(_T_322[31], _T_322[30]) @[el2_lib.scala 198:14] - node _T_574 = cat(_T_573, _T_572) @[el2_lib.scala 198:14] - node _T_575 = cat(_T_574, _T_571) @[el2_lib.scala 198:14] - node _T_576 = cat(_T_575, _T_568) @[el2_lib.scala 198:14] - node _T_577 = cat(_T_576, _T_561) @[el2_lib.scala 198:14] - node _T_578 = and(_T_320, _T_577) @[el2_lsu_trigger.scala 22:86] - node _T_579 = or(_T_317, _T_578) @[el2_lsu_trigger.scala 21:141] - node _T_580 = eq(io.lsu_pkt_m.dma, UInt<1>("h00")) @[el2_lsu_trigger.scala 21:71] - node _T_581 = and(io.lsu_pkt_m.valid, _T_580) @[el2_lsu_trigger.scala 21:69] - node _T_582 = and(io.trigger_pkt_any[2].store, io.lsu_pkt_m.store) @[el2_lsu_trigger.scala 21:120] - node _T_583 = and(_T_581, _T_582) @[el2_lsu_trigger.scala 21:89] - node _T_584 = and(io.trigger_pkt_any[2].load, io.lsu_pkt_m.load) @[el2_lsu_trigger.scala 22:33] - node _T_585 = eq(io.trigger_pkt_any[2].select, UInt<1>("h00")) @[el2_lsu_trigger.scala 22:55] - node _T_586 = and(_T_584, _T_585) @[el2_lsu_trigger.scala 22:53] - node _T_587 = bits(io.trigger_pkt_any[2].match_, 0, 0) @[el2_lsu_trigger.scala 23:106] - wire _T_588 : UInt<1>[32] @[el2_lib.scala 193:24] - node _T_589 = andr(io.trigger_pkt_any[2].tdata2) @[el2_lib.scala 194:45] - node _T_590 = not(_T_589) @[el2_lib.scala 194:39] - node _T_591 = and(_T_587, _T_590) @[el2_lib.scala 194:37] - node _T_592 = bits(io.trigger_pkt_any[2].tdata2, 0, 0) @[el2_lib.scala 195:48] - node _T_593 = bits(lsu_match_data[2], 0, 0) @[el2_lib.scala 195:60] - node _T_594 = eq(_T_592, _T_593) @[el2_lib.scala 195:52] - node _T_595 = or(_T_591, _T_594) @[el2_lib.scala 195:41] - _T_588[0] <= _T_595 @[el2_lib.scala 195:18] - node _T_596 = bits(io.trigger_pkt_any[2].tdata2, 0, 0) @[el2_lib.scala 197:30] - node _T_597 = andr(_T_596) @[el2_lib.scala 197:38] - node _T_598 = and(_T_597, _T_591) @[el2_lib.scala 197:43] - node _T_599 = bits(io.trigger_pkt_any[2].tdata2, 1, 1) @[el2_lib.scala 197:76] - node _T_600 = bits(lsu_match_data[2], 1, 1) @[el2_lib.scala 197:88] - node _T_601 = eq(_T_599, _T_600) @[el2_lib.scala 197:80] - node _T_602 = mux(_T_598, UInt<1>("h01"), _T_601) @[el2_lib.scala 197:25] - _T_588[1] <= _T_602 @[el2_lib.scala 197:19] - node _T_603 = bits(io.trigger_pkt_any[2].tdata2, 1, 0) @[el2_lib.scala 197:30] - node _T_604 = andr(_T_603) @[el2_lib.scala 197:38] - node _T_605 = and(_T_604, _T_591) @[el2_lib.scala 197:43] - node _T_606 = bits(io.trigger_pkt_any[2].tdata2, 2, 2) @[el2_lib.scala 197:76] - node _T_607 = bits(lsu_match_data[2], 2, 2) @[el2_lib.scala 197:88] - node _T_608 = eq(_T_606, _T_607) @[el2_lib.scala 197:80] - node _T_609 = mux(_T_605, UInt<1>("h01"), _T_608) @[el2_lib.scala 197:25] - _T_588[2] <= _T_609 @[el2_lib.scala 197:19] - node _T_610 = bits(io.trigger_pkt_any[2].tdata2, 2, 0) @[el2_lib.scala 197:30] - node _T_611 = andr(_T_610) @[el2_lib.scala 197:38] - node _T_612 = and(_T_611, _T_591) @[el2_lib.scala 197:43] - node _T_613 = bits(io.trigger_pkt_any[2].tdata2, 3, 3) @[el2_lib.scala 197:76] - node _T_614 = bits(lsu_match_data[2], 3, 3) @[el2_lib.scala 197:88] - node _T_615 = eq(_T_613, _T_614) @[el2_lib.scala 197:80] - node _T_616 = mux(_T_612, UInt<1>("h01"), _T_615) @[el2_lib.scala 197:25] - _T_588[3] <= _T_616 @[el2_lib.scala 197:19] - node _T_617 = bits(io.trigger_pkt_any[2].tdata2, 3, 0) @[el2_lib.scala 197:30] - node _T_618 = andr(_T_617) @[el2_lib.scala 197:38] - node _T_619 = and(_T_618, _T_591) @[el2_lib.scala 197:43] - node _T_620 = bits(io.trigger_pkt_any[2].tdata2, 4, 4) @[el2_lib.scala 197:76] - node _T_621 = bits(lsu_match_data[2], 4, 4) @[el2_lib.scala 197:88] - node _T_622 = eq(_T_620, _T_621) @[el2_lib.scala 197:80] - node _T_623 = mux(_T_619, UInt<1>("h01"), _T_622) @[el2_lib.scala 197:25] - _T_588[4] <= _T_623 @[el2_lib.scala 197:19] - node _T_624 = bits(io.trigger_pkt_any[2].tdata2, 4, 0) @[el2_lib.scala 197:30] - node _T_625 = andr(_T_624) @[el2_lib.scala 197:38] - node _T_626 = and(_T_625, _T_591) @[el2_lib.scala 197:43] - node _T_627 = bits(io.trigger_pkt_any[2].tdata2, 5, 5) @[el2_lib.scala 197:76] - node _T_628 = bits(lsu_match_data[2], 5, 5) @[el2_lib.scala 197:88] - node _T_629 = eq(_T_627, _T_628) @[el2_lib.scala 197:80] - node _T_630 = mux(_T_626, UInt<1>("h01"), _T_629) @[el2_lib.scala 197:25] - _T_588[5] <= _T_630 @[el2_lib.scala 197:19] - node _T_631 = bits(io.trigger_pkt_any[2].tdata2, 5, 0) @[el2_lib.scala 197:30] - node _T_632 = andr(_T_631) @[el2_lib.scala 197:38] - node _T_633 = and(_T_632, _T_591) @[el2_lib.scala 197:43] - node _T_634 = bits(io.trigger_pkt_any[2].tdata2, 6, 6) @[el2_lib.scala 197:76] - node _T_635 = bits(lsu_match_data[2], 6, 6) @[el2_lib.scala 197:88] - node _T_636 = eq(_T_634, _T_635) @[el2_lib.scala 197:80] - node _T_637 = mux(_T_633, UInt<1>("h01"), _T_636) @[el2_lib.scala 197:25] - _T_588[6] <= _T_637 @[el2_lib.scala 197:19] - node _T_638 = bits(io.trigger_pkt_any[2].tdata2, 6, 0) @[el2_lib.scala 197:30] - node _T_639 = andr(_T_638) @[el2_lib.scala 197:38] - node _T_640 = and(_T_639, _T_591) @[el2_lib.scala 197:43] - node _T_641 = bits(io.trigger_pkt_any[2].tdata2, 7, 7) @[el2_lib.scala 197:76] - node _T_642 = bits(lsu_match_data[2], 7, 7) @[el2_lib.scala 197:88] - node _T_643 = eq(_T_641, _T_642) @[el2_lib.scala 197:80] - node _T_644 = mux(_T_640, UInt<1>("h01"), _T_643) @[el2_lib.scala 197:25] - _T_588[7] <= _T_644 @[el2_lib.scala 197:19] - node _T_645 = bits(io.trigger_pkt_any[2].tdata2, 7, 0) @[el2_lib.scala 197:30] - node _T_646 = andr(_T_645) @[el2_lib.scala 197:38] - node _T_647 = and(_T_646, _T_591) @[el2_lib.scala 197:43] - node _T_648 = bits(io.trigger_pkt_any[2].tdata2, 8, 8) @[el2_lib.scala 197:76] - node _T_649 = bits(lsu_match_data[2], 8, 8) @[el2_lib.scala 197:88] - node _T_650 = eq(_T_648, _T_649) @[el2_lib.scala 197:80] - node _T_651 = mux(_T_647, UInt<1>("h01"), _T_650) @[el2_lib.scala 197:25] - _T_588[8] <= _T_651 @[el2_lib.scala 197:19] - node _T_652 = bits(io.trigger_pkt_any[2].tdata2, 8, 0) @[el2_lib.scala 197:30] - node _T_653 = andr(_T_652) @[el2_lib.scala 197:38] - node _T_654 = and(_T_653, _T_591) @[el2_lib.scala 197:43] - node _T_655 = bits(io.trigger_pkt_any[2].tdata2, 9, 9) @[el2_lib.scala 197:76] - node _T_656 = bits(lsu_match_data[2], 9, 9) @[el2_lib.scala 197:88] - node _T_657 = eq(_T_655, _T_656) @[el2_lib.scala 197:80] - node _T_658 = mux(_T_654, UInt<1>("h01"), _T_657) @[el2_lib.scala 197:25] - _T_588[9] <= _T_658 @[el2_lib.scala 197:19] - node _T_659 = bits(io.trigger_pkt_any[2].tdata2, 9, 0) @[el2_lib.scala 197:30] - node _T_660 = andr(_T_659) @[el2_lib.scala 197:38] - node _T_661 = and(_T_660, _T_591) @[el2_lib.scala 197:43] - node _T_662 = bits(io.trigger_pkt_any[2].tdata2, 10, 10) @[el2_lib.scala 197:76] - node _T_663 = bits(lsu_match_data[2], 10, 10) @[el2_lib.scala 197:88] - node _T_664 = eq(_T_662, _T_663) @[el2_lib.scala 197:80] - node _T_665 = mux(_T_661, UInt<1>("h01"), _T_664) @[el2_lib.scala 197:25] - _T_588[10] <= _T_665 @[el2_lib.scala 197:19] - node _T_666 = bits(io.trigger_pkt_any[2].tdata2, 10, 0) @[el2_lib.scala 197:30] - node _T_667 = andr(_T_666) @[el2_lib.scala 197:38] - node _T_668 = and(_T_667, _T_591) @[el2_lib.scala 197:43] - node _T_669 = bits(io.trigger_pkt_any[2].tdata2, 11, 11) @[el2_lib.scala 197:76] - node _T_670 = bits(lsu_match_data[2], 11, 11) @[el2_lib.scala 197:88] - node _T_671 = eq(_T_669, _T_670) @[el2_lib.scala 197:80] - node _T_672 = mux(_T_668, UInt<1>("h01"), _T_671) @[el2_lib.scala 197:25] - _T_588[11] <= _T_672 @[el2_lib.scala 197:19] - node _T_673 = bits(io.trigger_pkt_any[2].tdata2, 11, 0) @[el2_lib.scala 197:30] - node _T_674 = andr(_T_673) @[el2_lib.scala 197:38] - node _T_675 = and(_T_674, _T_591) @[el2_lib.scala 197:43] - node _T_676 = bits(io.trigger_pkt_any[2].tdata2, 12, 12) @[el2_lib.scala 197:76] - node _T_677 = bits(lsu_match_data[2], 12, 12) @[el2_lib.scala 197:88] - node _T_678 = eq(_T_676, _T_677) @[el2_lib.scala 197:80] - node _T_679 = mux(_T_675, UInt<1>("h01"), _T_678) @[el2_lib.scala 197:25] - _T_588[12] <= _T_679 @[el2_lib.scala 197:19] - node _T_680 = bits(io.trigger_pkt_any[2].tdata2, 12, 0) @[el2_lib.scala 197:30] - node _T_681 = andr(_T_680) @[el2_lib.scala 197:38] - node _T_682 = and(_T_681, _T_591) @[el2_lib.scala 197:43] - node _T_683 = bits(io.trigger_pkt_any[2].tdata2, 13, 13) @[el2_lib.scala 197:76] - node _T_684 = bits(lsu_match_data[2], 13, 13) @[el2_lib.scala 197:88] - node _T_685 = eq(_T_683, _T_684) @[el2_lib.scala 197:80] - node _T_686 = mux(_T_682, UInt<1>("h01"), _T_685) @[el2_lib.scala 197:25] - _T_588[13] <= _T_686 @[el2_lib.scala 197:19] - node _T_687 = bits(io.trigger_pkt_any[2].tdata2, 13, 0) @[el2_lib.scala 197:30] - node _T_688 = andr(_T_687) @[el2_lib.scala 197:38] - node _T_689 = and(_T_688, _T_591) @[el2_lib.scala 197:43] - node _T_690 = bits(io.trigger_pkt_any[2].tdata2, 14, 14) @[el2_lib.scala 197:76] - node _T_691 = bits(lsu_match_data[2], 14, 14) @[el2_lib.scala 197:88] - node _T_692 = eq(_T_690, _T_691) @[el2_lib.scala 197:80] - node _T_693 = mux(_T_689, UInt<1>("h01"), _T_692) @[el2_lib.scala 197:25] - _T_588[14] <= _T_693 @[el2_lib.scala 197:19] - node _T_694 = bits(io.trigger_pkt_any[2].tdata2, 14, 0) @[el2_lib.scala 197:30] - node _T_695 = andr(_T_694) @[el2_lib.scala 197:38] - node _T_696 = and(_T_695, _T_591) @[el2_lib.scala 197:43] - node _T_697 = bits(io.trigger_pkt_any[2].tdata2, 15, 15) @[el2_lib.scala 197:76] - node _T_698 = bits(lsu_match_data[2], 15, 15) @[el2_lib.scala 197:88] - node _T_699 = eq(_T_697, _T_698) @[el2_lib.scala 197:80] - node _T_700 = mux(_T_696, UInt<1>("h01"), _T_699) @[el2_lib.scala 197:25] - _T_588[15] <= _T_700 @[el2_lib.scala 197:19] - node _T_701 = bits(io.trigger_pkt_any[2].tdata2, 15, 0) @[el2_lib.scala 197:30] - node _T_702 = andr(_T_701) @[el2_lib.scala 197:38] - node _T_703 = and(_T_702, _T_591) @[el2_lib.scala 197:43] - node _T_704 = bits(io.trigger_pkt_any[2].tdata2, 16, 16) @[el2_lib.scala 197:76] - node _T_705 = bits(lsu_match_data[2], 16, 16) @[el2_lib.scala 197:88] - node _T_706 = eq(_T_704, _T_705) @[el2_lib.scala 197:80] - node _T_707 = mux(_T_703, UInt<1>("h01"), _T_706) @[el2_lib.scala 197:25] - _T_588[16] <= _T_707 @[el2_lib.scala 197:19] - node _T_708 = bits(io.trigger_pkt_any[2].tdata2, 16, 0) @[el2_lib.scala 197:30] - node _T_709 = andr(_T_708) @[el2_lib.scala 197:38] - node _T_710 = and(_T_709, _T_591) @[el2_lib.scala 197:43] - node _T_711 = bits(io.trigger_pkt_any[2].tdata2, 17, 17) @[el2_lib.scala 197:76] - node _T_712 = bits(lsu_match_data[2], 17, 17) @[el2_lib.scala 197:88] - node _T_713 = eq(_T_711, _T_712) @[el2_lib.scala 197:80] - node _T_714 = mux(_T_710, UInt<1>("h01"), _T_713) @[el2_lib.scala 197:25] - _T_588[17] <= _T_714 @[el2_lib.scala 197:19] - node _T_715 = bits(io.trigger_pkt_any[2].tdata2, 17, 0) @[el2_lib.scala 197:30] - node _T_716 = andr(_T_715) @[el2_lib.scala 197:38] - node _T_717 = and(_T_716, _T_591) @[el2_lib.scala 197:43] - node _T_718 = bits(io.trigger_pkt_any[2].tdata2, 18, 18) @[el2_lib.scala 197:76] - node _T_719 = bits(lsu_match_data[2], 18, 18) @[el2_lib.scala 197:88] - node _T_720 = eq(_T_718, _T_719) @[el2_lib.scala 197:80] - node _T_721 = mux(_T_717, UInt<1>("h01"), _T_720) @[el2_lib.scala 197:25] - _T_588[18] <= _T_721 @[el2_lib.scala 197:19] - node _T_722 = bits(io.trigger_pkt_any[2].tdata2, 18, 0) @[el2_lib.scala 197:30] - node _T_723 = andr(_T_722) @[el2_lib.scala 197:38] - node _T_724 = and(_T_723, _T_591) @[el2_lib.scala 197:43] - node _T_725 = bits(io.trigger_pkt_any[2].tdata2, 19, 19) @[el2_lib.scala 197:76] - node _T_726 = bits(lsu_match_data[2], 19, 19) @[el2_lib.scala 197:88] - node _T_727 = eq(_T_725, _T_726) @[el2_lib.scala 197:80] - node _T_728 = mux(_T_724, UInt<1>("h01"), _T_727) @[el2_lib.scala 197:25] - _T_588[19] <= _T_728 @[el2_lib.scala 197:19] - node _T_729 = bits(io.trigger_pkt_any[2].tdata2, 19, 0) @[el2_lib.scala 197:30] - node _T_730 = andr(_T_729) @[el2_lib.scala 197:38] - node _T_731 = and(_T_730, _T_591) @[el2_lib.scala 197:43] - node _T_732 = bits(io.trigger_pkt_any[2].tdata2, 20, 20) @[el2_lib.scala 197:76] - node _T_733 = bits(lsu_match_data[2], 20, 20) @[el2_lib.scala 197:88] - node _T_734 = eq(_T_732, _T_733) @[el2_lib.scala 197:80] - node _T_735 = mux(_T_731, UInt<1>("h01"), _T_734) @[el2_lib.scala 197:25] - _T_588[20] <= _T_735 @[el2_lib.scala 197:19] - node _T_736 = bits(io.trigger_pkt_any[2].tdata2, 20, 0) @[el2_lib.scala 197:30] - node _T_737 = andr(_T_736) @[el2_lib.scala 197:38] - node _T_738 = and(_T_737, _T_591) @[el2_lib.scala 197:43] - node _T_739 = bits(io.trigger_pkt_any[2].tdata2, 21, 21) @[el2_lib.scala 197:76] - node _T_740 = bits(lsu_match_data[2], 21, 21) @[el2_lib.scala 197:88] - node _T_741 = eq(_T_739, _T_740) @[el2_lib.scala 197:80] - node _T_742 = mux(_T_738, UInt<1>("h01"), _T_741) @[el2_lib.scala 197:25] - _T_588[21] <= _T_742 @[el2_lib.scala 197:19] - node _T_743 = bits(io.trigger_pkt_any[2].tdata2, 21, 0) @[el2_lib.scala 197:30] - node _T_744 = andr(_T_743) @[el2_lib.scala 197:38] - node _T_745 = and(_T_744, _T_591) @[el2_lib.scala 197:43] - node _T_746 = bits(io.trigger_pkt_any[2].tdata2, 22, 22) @[el2_lib.scala 197:76] - node _T_747 = bits(lsu_match_data[2], 22, 22) @[el2_lib.scala 197:88] - node _T_748 = eq(_T_746, _T_747) @[el2_lib.scala 197:80] - node _T_749 = mux(_T_745, UInt<1>("h01"), _T_748) @[el2_lib.scala 197:25] - _T_588[22] <= _T_749 @[el2_lib.scala 197:19] - node _T_750 = bits(io.trigger_pkt_any[2].tdata2, 22, 0) @[el2_lib.scala 197:30] - node _T_751 = andr(_T_750) @[el2_lib.scala 197:38] - node _T_752 = and(_T_751, _T_591) @[el2_lib.scala 197:43] - node _T_753 = bits(io.trigger_pkt_any[2].tdata2, 23, 23) @[el2_lib.scala 197:76] - node _T_754 = bits(lsu_match_data[2], 23, 23) @[el2_lib.scala 197:88] - node _T_755 = eq(_T_753, _T_754) @[el2_lib.scala 197:80] - node _T_756 = mux(_T_752, UInt<1>("h01"), _T_755) @[el2_lib.scala 197:25] - _T_588[23] <= _T_756 @[el2_lib.scala 197:19] - node _T_757 = bits(io.trigger_pkt_any[2].tdata2, 23, 0) @[el2_lib.scala 197:30] - node _T_758 = andr(_T_757) @[el2_lib.scala 197:38] - node _T_759 = and(_T_758, _T_591) @[el2_lib.scala 197:43] - node _T_760 = bits(io.trigger_pkt_any[2].tdata2, 24, 24) @[el2_lib.scala 197:76] - node _T_761 = bits(lsu_match_data[2], 24, 24) @[el2_lib.scala 197:88] - node _T_762 = eq(_T_760, _T_761) @[el2_lib.scala 197:80] - node _T_763 = mux(_T_759, UInt<1>("h01"), _T_762) @[el2_lib.scala 197:25] - _T_588[24] <= _T_763 @[el2_lib.scala 197:19] - node _T_764 = bits(io.trigger_pkt_any[2].tdata2, 24, 0) @[el2_lib.scala 197:30] - node _T_765 = andr(_T_764) @[el2_lib.scala 197:38] - node _T_766 = and(_T_765, _T_591) @[el2_lib.scala 197:43] - node _T_767 = bits(io.trigger_pkt_any[2].tdata2, 25, 25) @[el2_lib.scala 197:76] - node _T_768 = bits(lsu_match_data[2], 25, 25) @[el2_lib.scala 197:88] - node _T_769 = eq(_T_767, _T_768) @[el2_lib.scala 197:80] - node _T_770 = mux(_T_766, UInt<1>("h01"), _T_769) @[el2_lib.scala 197:25] - _T_588[25] <= _T_770 @[el2_lib.scala 197:19] - node _T_771 = bits(io.trigger_pkt_any[2].tdata2, 25, 0) @[el2_lib.scala 197:30] - node _T_772 = andr(_T_771) @[el2_lib.scala 197:38] - node _T_773 = and(_T_772, _T_591) @[el2_lib.scala 197:43] - node _T_774 = bits(io.trigger_pkt_any[2].tdata2, 26, 26) @[el2_lib.scala 197:76] - node _T_775 = bits(lsu_match_data[2], 26, 26) @[el2_lib.scala 197:88] - node _T_776 = eq(_T_774, _T_775) @[el2_lib.scala 197:80] - node _T_777 = mux(_T_773, UInt<1>("h01"), _T_776) @[el2_lib.scala 197:25] - _T_588[26] <= _T_777 @[el2_lib.scala 197:19] - node _T_778 = bits(io.trigger_pkt_any[2].tdata2, 26, 0) @[el2_lib.scala 197:30] - node _T_779 = andr(_T_778) @[el2_lib.scala 197:38] - node _T_780 = and(_T_779, _T_591) @[el2_lib.scala 197:43] - node _T_781 = bits(io.trigger_pkt_any[2].tdata2, 27, 27) @[el2_lib.scala 197:76] - node _T_782 = bits(lsu_match_data[2], 27, 27) @[el2_lib.scala 197:88] - node _T_783 = eq(_T_781, _T_782) @[el2_lib.scala 197:80] - node _T_784 = mux(_T_780, UInt<1>("h01"), _T_783) @[el2_lib.scala 197:25] - _T_588[27] <= _T_784 @[el2_lib.scala 197:19] - node _T_785 = bits(io.trigger_pkt_any[2].tdata2, 27, 0) @[el2_lib.scala 197:30] - node _T_786 = andr(_T_785) @[el2_lib.scala 197:38] - node _T_787 = and(_T_786, _T_591) @[el2_lib.scala 197:43] - node _T_788 = bits(io.trigger_pkt_any[2].tdata2, 28, 28) @[el2_lib.scala 197:76] - node _T_789 = bits(lsu_match_data[2], 28, 28) @[el2_lib.scala 197:88] - node _T_790 = eq(_T_788, _T_789) @[el2_lib.scala 197:80] - node _T_791 = mux(_T_787, UInt<1>("h01"), _T_790) @[el2_lib.scala 197:25] - _T_588[28] <= _T_791 @[el2_lib.scala 197:19] - node _T_792 = bits(io.trigger_pkt_any[2].tdata2, 28, 0) @[el2_lib.scala 197:30] - node _T_793 = andr(_T_792) @[el2_lib.scala 197:38] - node _T_794 = and(_T_793, _T_591) @[el2_lib.scala 197:43] - node _T_795 = bits(io.trigger_pkt_any[2].tdata2, 29, 29) @[el2_lib.scala 197:76] - node _T_796 = bits(lsu_match_data[2], 29, 29) @[el2_lib.scala 197:88] - node _T_797 = eq(_T_795, _T_796) @[el2_lib.scala 197:80] - node _T_798 = mux(_T_794, UInt<1>("h01"), _T_797) @[el2_lib.scala 197:25] - _T_588[29] <= _T_798 @[el2_lib.scala 197:19] - node _T_799 = bits(io.trigger_pkt_any[2].tdata2, 29, 0) @[el2_lib.scala 197:30] - node _T_800 = andr(_T_799) @[el2_lib.scala 197:38] - node _T_801 = and(_T_800, _T_591) @[el2_lib.scala 197:43] - node _T_802 = bits(io.trigger_pkt_any[2].tdata2, 30, 30) @[el2_lib.scala 197:76] - node _T_803 = bits(lsu_match_data[2], 30, 30) @[el2_lib.scala 197:88] - node _T_804 = eq(_T_802, _T_803) @[el2_lib.scala 197:80] - node _T_805 = mux(_T_801, UInt<1>("h01"), _T_804) @[el2_lib.scala 197:25] - _T_588[30] <= _T_805 @[el2_lib.scala 197:19] - node _T_806 = bits(io.trigger_pkt_any[2].tdata2, 30, 0) @[el2_lib.scala 197:30] - node _T_807 = andr(_T_806) @[el2_lib.scala 197:38] - node _T_808 = and(_T_807, _T_591) @[el2_lib.scala 197:43] - node _T_809 = bits(io.trigger_pkt_any[2].tdata2, 31, 31) @[el2_lib.scala 197:76] - node _T_810 = bits(lsu_match_data[2], 31, 31) @[el2_lib.scala 197:88] - node _T_811 = eq(_T_809, _T_810) @[el2_lib.scala 197:80] - node _T_812 = mux(_T_808, UInt<1>("h01"), _T_811) @[el2_lib.scala 197:25] - _T_588[31] <= _T_812 @[el2_lib.scala 197:19] - node _T_813 = cat(_T_588[1], _T_588[0]) @[el2_lib.scala 198:14] - node _T_814 = cat(_T_588[3], _T_588[2]) @[el2_lib.scala 198:14] - node _T_815 = cat(_T_814, _T_813) @[el2_lib.scala 198:14] - node _T_816 = cat(_T_588[5], _T_588[4]) @[el2_lib.scala 198:14] - node _T_817 = cat(_T_588[7], _T_588[6]) @[el2_lib.scala 198:14] - node _T_818 = cat(_T_817, _T_816) @[el2_lib.scala 198:14] - node _T_819 = cat(_T_818, _T_815) @[el2_lib.scala 198:14] - node _T_820 = cat(_T_588[9], _T_588[8]) @[el2_lib.scala 198:14] - node _T_821 = cat(_T_588[11], _T_588[10]) @[el2_lib.scala 198:14] - node _T_822 = cat(_T_821, _T_820) @[el2_lib.scala 198:14] - node _T_823 = cat(_T_588[13], _T_588[12]) @[el2_lib.scala 198:14] - node _T_824 = cat(_T_588[15], _T_588[14]) @[el2_lib.scala 198:14] - node _T_825 = cat(_T_824, _T_823) @[el2_lib.scala 198:14] - node _T_826 = cat(_T_825, _T_822) @[el2_lib.scala 198:14] - node _T_827 = cat(_T_826, _T_819) @[el2_lib.scala 198:14] - node _T_828 = cat(_T_588[17], _T_588[16]) @[el2_lib.scala 198:14] - node _T_829 = cat(_T_588[19], _T_588[18]) @[el2_lib.scala 198:14] - node _T_830 = cat(_T_829, _T_828) @[el2_lib.scala 198:14] - node _T_831 = cat(_T_588[21], _T_588[20]) @[el2_lib.scala 198:14] - node _T_832 = cat(_T_588[23], _T_588[22]) @[el2_lib.scala 198:14] - node _T_833 = cat(_T_832, _T_831) @[el2_lib.scala 198:14] - node _T_834 = cat(_T_833, _T_830) @[el2_lib.scala 198:14] - node _T_835 = cat(_T_588[25], _T_588[24]) @[el2_lib.scala 198:14] - node _T_836 = cat(_T_588[27], _T_588[26]) @[el2_lib.scala 198:14] - node _T_837 = cat(_T_836, _T_835) @[el2_lib.scala 198:14] - node _T_838 = cat(_T_588[29], _T_588[28]) @[el2_lib.scala 198:14] - node _T_839 = cat(_T_588[31], _T_588[30]) @[el2_lib.scala 198:14] - node _T_840 = cat(_T_839, _T_838) @[el2_lib.scala 198:14] - node _T_841 = cat(_T_840, _T_837) @[el2_lib.scala 198:14] - node _T_842 = cat(_T_841, _T_834) @[el2_lib.scala 198:14] - node _T_843 = cat(_T_842, _T_827) @[el2_lib.scala 198:14] - node _T_844 = and(_T_586, _T_843) @[el2_lsu_trigger.scala 22:86] - node _T_845 = or(_T_583, _T_844) @[el2_lsu_trigger.scala 21:141] - node _T_846 = eq(io.lsu_pkt_m.dma, UInt<1>("h00")) @[el2_lsu_trigger.scala 21:71] - node _T_847 = and(io.lsu_pkt_m.valid, _T_846) @[el2_lsu_trigger.scala 21:69] - node _T_848 = and(io.trigger_pkt_any[3].store, io.lsu_pkt_m.store) @[el2_lsu_trigger.scala 21:120] - node _T_849 = and(_T_847, _T_848) @[el2_lsu_trigger.scala 21:89] - node _T_850 = and(io.trigger_pkt_any[3].load, io.lsu_pkt_m.load) @[el2_lsu_trigger.scala 22:33] - node _T_851 = eq(io.trigger_pkt_any[3].select, UInt<1>("h00")) @[el2_lsu_trigger.scala 22:55] - node _T_852 = and(_T_850, _T_851) @[el2_lsu_trigger.scala 22:53] - node _T_853 = bits(io.trigger_pkt_any[3].match_, 0, 0) @[el2_lsu_trigger.scala 23:106] - wire _T_854 : UInt<1>[32] @[el2_lib.scala 193:24] - node _T_855 = andr(io.trigger_pkt_any[3].tdata2) @[el2_lib.scala 194:45] - node _T_856 = not(_T_855) @[el2_lib.scala 194:39] - node _T_857 = and(_T_853, _T_856) @[el2_lib.scala 194:37] - node _T_858 = bits(io.trigger_pkt_any[3].tdata2, 0, 0) @[el2_lib.scala 195:48] - node _T_859 = bits(lsu_match_data[3], 0, 0) @[el2_lib.scala 195:60] - node _T_860 = eq(_T_858, _T_859) @[el2_lib.scala 195:52] - node _T_861 = or(_T_857, _T_860) @[el2_lib.scala 195:41] - _T_854[0] <= _T_861 @[el2_lib.scala 195:18] - node _T_862 = bits(io.trigger_pkt_any[3].tdata2, 0, 0) @[el2_lib.scala 197:30] - node _T_863 = andr(_T_862) @[el2_lib.scala 197:38] - node _T_864 = and(_T_863, _T_857) @[el2_lib.scala 197:43] - node _T_865 = bits(io.trigger_pkt_any[3].tdata2, 1, 1) @[el2_lib.scala 197:76] - node _T_866 = bits(lsu_match_data[3], 1, 1) @[el2_lib.scala 197:88] - node _T_867 = eq(_T_865, _T_866) @[el2_lib.scala 197:80] - node _T_868 = mux(_T_864, UInt<1>("h01"), _T_867) @[el2_lib.scala 197:25] - _T_854[1] <= _T_868 @[el2_lib.scala 197:19] - node _T_869 = bits(io.trigger_pkt_any[3].tdata2, 1, 0) @[el2_lib.scala 197:30] - node _T_870 = andr(_T_869) @[el2_lib.scala 197:38] - node _T_871 = and(_T_870, _T_857) @[el2_lib.scala 197:43] - node _T_872 = bits(io.trigger_pkt_any[3].tdata2, 2, 2) @[el2_lib.scala 197:76] - node _T_873 = bits(lsu_match_data[3], 2, 2) @[el2_lib.scala 197:88] - node _T_874 = eq(_T_872, _T_873) @[el2_lib.scala 197:80] - node _T_875 = mux(_T_871, UInt<1>("h01"), _T_874) @[el2_lib.scala 197:25] - _T_854[2] <= _T_875 @[el2_lib.scala 197:19] - node _T_876 = bits(io.trigger_pkt_any[3].tdata2, 2, 0) @[el2_lib.scala 197:30] - node _T_877 = andr(_T_876) @[el2_lib.scala 197:38] - node _T_878 = and(_T_877, _T_857) @[el2_lib.scala 197:43] - node _T_879 = bits(io.trigger_pkt_any[3].tdata2, 3, 3) @[el2_lib.scala 197:76] - node _T_880 = bits(lsu_match_data[3], 3, 3) @[el2_lib.scala 197:88] - node _T_881 = eq(_T_879, _T_880) @[el2_lib.scala 197:80] - node _T_882 = mux(_T_878, UInt<1>("h01"), _T_881) @[el2_lib.scala 197:25] - _T_854[3] <= _T_882 @[el2_lib.scala 197:19] - node _T_883 = bits(io.trigger_pkt_any[3].tdata2, 3, 0) @[el2_lib.scala 197:30] - node _T_884 = andr(_T_883) @[el2_lib.scala 197:38] - node _T_885 = and(_T_884, _T_857) @[el2_lib.scala 197:43] - node _T_886 = bits(io.trigger_pkt_any[3].tdata2, 4, 4) @[el2_lib.scala 197:76] - node _T_887 = bits(lsu_match_data[3], 4, 4) @[el2_lib.scala 197:88] - node _T_888 = eq(_T_886, _T_887) @[el2_lib.scala 197:80] - node _T_889 = mux(_T_885, UInt<1>("h01"), _T_888) @[el2_lib.scala 197:25] - _T_854[4] <= _T_889 @[el2_lib.scala 197:19] - node _T_890 = bits(io.trigger_pkt_any[3].tdata2, 4, 0) @[el2_lib.scala 197:30] - node _T_891 = andr(_T_890) @[el2_lib.scala 197:38] - node _T_892 = and(_T_891, _T_857) @[el2_lib.scala 197:43] - node _T_893 = bits(io.trigger_pkt_any[3].tdata2, 5, 5) @[el2_lib.scala 197:76] - node _T_894 = bits(lsu_match_data[3], 5, 5) @[el2_lib.scala 197:88] - node _T_895 = eq(_T_893, _T_894) @[el2_lib.scala 197:80] - node _T_896 = mux(_T_892, UInt<1>("h01"), _T_895) @[el2_lib.scala 197:25] - _T_854[5] <= _T_896 @[el2_lib.scala 197:19] - node _T_897 = bits(io.trigger_pkt_any[3].tdata2, 5, 0) @[el2_lib.scala 197:30] - node _T_898 = andr(_T_897) @[el2_lib.scala 197:38] - node _T_899 = and(_T_898, _T_857) @[el2_lib.scala 197:43] - node _T_900 = bits(io.trigger_pkt_any[3].tdata2, 6, 6) @[el2_lib.scala 197:76] - node _T_901 = bits(lsu_match_data[3], 6, 6) @[el2_lib.scala 197:88] - node _T_902 = eq(_T_900, _T_901) @[el2_lib.scala 197:80] - node _T_903 = mux(_T_899, UInt<1>("h01"), _T_902) @[el2_lib.scala 197:25] - _T_854[6] <= _T_903 @[el2_lib.scala 197:19] - node _T_904 = bits(io.trigger_pkt_any[3].tdata2, 6, 0) @[el2_lib.scala 197:30] - node _T_905 = andr(_T_904) @[el2_lib.scala 197:38] - node _T_906 = and(_T_905, _T_857) @[el2_lib.scala 197:43] - node _T_907 = bits(io.trigger_pkt_any[3].tdata2, 7, 7) @[el2_lib.scala 197:76] - node _T_908 = bits(lsu_match_data[3], 7, 7) @[el2_lib.scala 197:88] - node _T_909 = eq(_T_907, _T_908) @[el2_lib.scala 197:80] - node _T_910 = mux(_T_906, UInt<1>("h01"), _T_909) @[el2_lib.scala 197:25] - _T_854[7] <= _T_910 @[el2_lib.scala 197:19] - node _T_911 = bits(io.trigger_pkt_any[3].tdata2, 7, 0) @[el2_lib.scala 197:30] - node _T_912 = andr(_T_911) @[el2_lib.scala 197:38] - node _T_913 = and(_T_912, _T_857) @[el2_lib.scala 197:43] - node _T_914 = bits(io.trigger_pkt_any[3].tdata2, 8, 8) @[el2_lib.scala 197:76] - node _T_915 = bits(lsu_match_data[3], 8, 8) @[el2_lib.scala 197:88] - node _T_916 = eq(_T_914, _T_915) @[el2_lib.scala 197:80] - node _T_917 = mux(_T_913, UInt<1>("h01"), _T_916) @[el2_lib.scala 197:25] - _T_854[8] <= _T_917 @[el2_lib.scala 197:19] - node _T_918 = bits(io.trigger_pkt_any[3].tdata2, 8, 0) @[el2_lib.scala 197:30] - node _T_919 = andr(_T_918) @[el2_lib.scala 197:38] - node _T_920 = and(_T_919, _T_857) @[el2_lib.scala 197:43] - node _T_921 = bits(io.trigger_pkt_any[3].tdata2, 9, 9) @[el2_lib.scala 197:76] - node _T_922 = bits(lsu_match_data[3], 9, 9) @[el2_lib.scala 197:88] - node _T_923 = eq(_T_921, _T_922) @[el2_lib.scala 197:80] - node _T_924 = mux(_T_920, UInt<1>("h01"), _T_923) @[el2_lib.scala 197:25] - _T_854[9] <= _T_924 @[el2_lib.scala 197:19] - node _T_925 = bits(io.trigger_pkt_any[3].tdata2, 9, 0) @[el2_lib.scala 197:30] - node _T_926 = andr(_T_925) @[el2_lib.scala 197:38] - node _T_927 = and(_T_926, _T_857) @[el2_lib.scala 197:43] - node _T_928 = bits(io.trigger_pkt_any[3].tdata2, 10, 10) @[el2_lib.scala 197:76] - node _T_929 = bits(lsu_match_data[3], 10, 10) @[el2_lib.scala 197:88] - node _T_930 = eq(_T_928, _T_929) @[el2_lib.scala 197:80] - node _T_931 = mux(_T_927, UInt<1>("h01"), _T_930) @[el2_lib.scala 197:25] - _T_854[10] <= _T_931 @[el2_lib.scala 197:19] - node _T_932 = bits(io.trigger_pkt_any[3].tdata2, 10, 0) @[el2_lib.scala 197:30] - node _T_933 = andr(_T_932) @[el2_lib.scala 197:38] - node _T_934 = and(_T_933, _T_857) @[el2_lib.scala 197:43] - node _T_935 = bits(io.trigger_pkt_any[3].tdata2, 11, 11) @[el2_lib.scala 197:76] - node _T_936 = bits(lsu_match_data[3], 11, 11) @[el2_lib.scala 197:88] - node _T_937 = eq(_T_935, _T_936) @[el2_lib.scala 197:80] - node _T_938 = mux(_T_934, UInt<1>("h01"), _T_937) @[el2_lib.scala 197:25] - _T_854[11] <= _T_938 @[el2_lib.scala 197:19] - node _T_939 = bits(io.trigger_pkt_any[3].tdata2, 11, 0) @[el2_lib.scala 197:30] - node _T_940 = andr(_T_939) @[el2_lib.scala 197:38] - node _T_941 = and(_T_940, _T_857) @[el2_lib.scala 197:43] - node _T_942 = bits(io.trigger_pkt_any[3].tdata2, 12, 12) @[el2_lib.scala 197:76] - node _T_943 = bits(lsu_match_data[3], 12, 12) @[el2_lib.scala 197:88] - node _T_944 = eq(_T_942, _T_943) @[el2_lib.scala 197:80] - node _T_945 = mux(_T_941, UInt<1>("h01"), _T_944) @[el2_lib.scala 197:25] - _T_854[12] <= _T_945 @[el2_lib.scala 197:19] - node _T_946 = bits(io.trigger_pkt_any[3].tdata2, 12, 0) @[el2_lib.scala 197:30] - node _T_947 = andr(_T_946) @[el2_lib.scala 197:38] - node _T_948 = and(_T_947, _T_857) @[el2_lib.scala 197:43] - node _T_949 = bits(io.trigger_pkt_any[3].tdata2, 13, 13) @[el2_lib.scala 197:76] - node _T_950 = bits(lsu_match_data[3], 13, 13) @[el2_lib.scala 197:88] - node _T_951 = eq(_T_949, _T_950) @[el2_lib.scala 197:80] - node _T_952 = mux(_T_948, UInt<1>("h01"), _T_951) @[el2_lib.scala 197:25] - _T_854[13] <= _T_952 @[el2_lib.scala 197:19] - node _T_953 = bits(io.trigger_pkt_any[3].tdata2, 13, 0) @[el2_lib.scala 197:30] - node _T_954 = andr(_T_953) @[el2_lib.scala 197:38] - node _T_955 = and(_T_954, _T_857) @[el2_lib.scala 197:43] - node _T_956 = bits(io.trigger_pkt_any[3].tdata2, 14, 14) @[el2_lib.scala 197:76] - node _T_957 = bits(lsu_match_data[3], 14, 14) @[el2_lib.scala 197:88] - node _T_958 = eq(_T_956, _T_957) @[el2_lib.scala 197:80] - node _T_959 = mux(_T_955, UInt<1>("h01"), _T_958) @[el2_lib.scala 197:25] - _T_854[14] <= _T_959 @[el2_lib.scala 197:19] - node _T_960 = bits(io.trigger_pkt_any[3].tdata2, 14, 0) @[el2_lib.scala 197:30] - node _T_961 = andr(_T_960) @[el2_lib.scala 197:38] - node _T_962 = and(_T_961, _T_857) @[el2_lib.scala 197:43] - node _T_963 = bits(io.trigger_pkt_any[3].tdata2, 15, 15) @[el2_lib.scala 197:76] - node _T_964 = bits(lsu_match_data[3], 15, 15) @[el2_lib.scala 197:88] - node _T_965 = eq(_T_963, _T_964) @[el2_lib.scala 197:80] - node _T_966 = mux(_T_962, UInt<1>("h01"), _T_965) @[el2_lib.scala 197:25] - _T_854[15] <= _T_966 @[el2_lib.scala 197:19] - node _T_967 = bits(io.trigger_pkt_any[3].tdata2, 15, 0) @[el2_lib.scala 197:30] - node _T_968 = andr(_T_967) @[el2_lib.scala 197:38] - node _T_969 = and(_T_968, _T_857) @[el2_lib.scala 197:43] - node _T_970 = bits(io.trigger_pkt_any[3].tdata2, 16, 16) @[el2_lib.scala 197:76] - node _T_971 = bits(lsu_match_data[3], 16, 16) @[el2_lib.scala 197:88] - node _T_972 = eq(_T_970, _T_971) @[el2_lib.scala 197:80] - node _T_973 = mux(_T_969, UInt<1>("h01"), _T_972) @[el2_lib.scala 197:25] - _T_854[16] <= _T_973 @[el2_lib.scala 197:19] - node _T_974 = bits(io.trigger_pkt_any[3].tdata2, 16, 0) @[el2_lib.scala 197:30] - node _T_975 = andr(_T_974) @[el2_lib.scala 197:38] - node _T_976 = and(_T_975, _T_857) @[el2_lib.scala 197:43] - node _T_977 = bits(io.trigger_pkt_any[3].tdata2, 17, 17) @[el2_lib.scala 197:76] - node _T_978 = bits(lsu_match_data[3], 17, 17) @[el2_lib.scala 197:88] - node _T_979 = eq(_T_977, _T_978) @[el2_lib.scala 197:80] - node _T_980 = mux(_T_976, UInt<1>("h01"), _T_979) @[el2_lib.scala 197:25] - _T_854[17] <= _T_980 @[el2_lib.scala 197:19] - node _T_981 = bits(io.trigger_pkt_any[3].tdata2, 17, 0) @[el2_lib.scala 197:30] - node _T_982 = andr(_T_981) @[el2_lib.scala 197:38] - node _T_983 = and(_T_982, _T_857) @[el2_lib.scala 197:43] - node _T_984 = bits(io.trigger_pkt_any[3].tdata2, 18, 18) @[el2_lib.scala 197:76] - node _T_985 = bits(lsu_match_data[3], 18, 18) @[el2_lib.scala 197:88] - node _T_986 = eq(_T_984, _T_985) @[el2_lib.scala 197:80] - node _T_987 = mux(_T_983, UInt<1>("h01"), _T_986) @[el2_lib.scala 197:25] - _T_854[18] <= _T_987 @[el2_lib.scala 197:19] - node _T_988 = bits(io.trigger_pkt_any[3].tdata2, 18, 0) @[el2_lib.scala 197:30] - node _T_989 = andr(_T_988) @[el2_lib.scala 197:38] - node _T_990 = and(_T_989, _T_857) @[el2_lib.scala 197:43] - node _T_991 = bits(io.trigger_pkt_any[3].tdata2, 19, 19) @[el2_lib.scala 197:76] - node _T_992 = bits(lsu_match_data[3], 19, 19) @[el2_lib.scala 197:88] - node _T_993 = eq(_T_991, _T_992) @[el2_lib.scala 197:80] - node _T_994 = mux(_T_990, UInt<1>("h01"), _T_993) @[el2_lib.scala 197:25] - _T_854[19] <= _T_994 @[el2_lib.scala 197:19] - node _T_995 = bits(io.trigger_pkt_any[3].tdata2, 19, 0) @[el2_lib.scala 197:30] - node _T_996 = andr(_T_995) @[el2_lib.scala 197:38] - node _T_997 = and(_T_996, _T_857) @[el2_lib.scala 197:43] - node _T_998 = bits(io.trigger_pkt_any[3].tdata2, 20, 20) @[el2_lib.scala 197:76] - node _T_999 = bits(lsu_match_data[3], 20, 20) @[el2_lib.scala 197:88] - node _T_1000 = eq(_T_998, _T_999) @[el2_lib.scala 197:80] - node _T_1001 = mux(_T_997, UInt<1>("h01"), _T_1000) @[el2_lib.scala 197:25] - _T_854[20] <= _T_1001 @[el2_lib.scala 197:19] - node _T_1002 = bits(io.trigger_pkt_any[3].tdata2, 20, 0) @[el2_lib.scala 197:30] - node _T_1003 = andr(_T_1002) @[el2_lib.scala 197:38] - node _T_1004 = and(_T_1003, _T_857) @[el2_lib.scala 197:43] - node _T_1005 = bits(io.trigger_pkt_any[3].tdata2, 21, 21) @[el2_lib.scala 197:76] - node _T_1006 = bits(lsu_match_data[3], 21, 21) @[el2_lib.scala 197:88] - node _T_1007 = eq(_T_1005, _T_1006) @[el2_lib.scala 197:80] - node _T_1008 = mux(_T_1004, UInt<1>("h01"), _T_1007) @[el2_lib.scala 197:25] - _T_854[21] <= _T_1008 @[el2_lib.scala 197:19] - node _T_1009 = bits(io.trigger_pkt_any[3].tdata2, 21, 0) @[el2_lib.scala 197:30] - node _T_1010 = andr(_T_1009) @[el2_lib.scala 197:38] - node _T_1011 = and(_T_1010, _T_857) @[el2_lib.scala 197:43] - node _T_1012 = bits(io.trigger_pkt_any[3].tdata2, 22, 22) @[el2_lib.scala 197:76] - node _T_1013 = bits(lsu_match_data[3], 22, 22) @[el2_lib.scala 197:88] - node _T_1014 = eq(_T_1012, _T_1013) @[el2_lib.scala 197:80] - node _T_1015 = mux(_T_1011, UInt<1>("h01"), _T_1014) @[el2_lib.scala 197:25] - _T_854[22] <= _T_1015 @[el2_lib.scala 197:19] - node _T_1016 = bits(io.trigger_pkt_any[3].tdata2, 22, 0) @[el2_lib.scala 197:30] - node _T_1017 = andr(_T_1016) @[el2_lib.scala 197:38] - node _T_1018 = and(_T_1017, _T_857) @[el2_lib.scala 197:43] - node _T_1019 = bits(io.trigger_pkt_any[3].tdata2, 23, 23) @[el2_lib.scala 197:76] - node _T_1020 = bits(lsu_match_data[3], 23, 23) @[el2_lib.scala 197:88] - node _T_1021 = eq(_T_1019, _T_1020) @[el2_lib.scala 197:80] - node _T_1022 = mux(_T_1018, UInt<1>("h01"), _T_1021) @[el2_lib.scala 197:25] - _T_854[23] <= _T_1022 @[el2_lib.scala 197:19] - node _T_1023 = bits(io.trigger_pkt_any[3].tdata2, 23, 0) @[el2_lib.scala 197:30] - node _T_1024 = andr(_T_1023) @[el2_lib.scala 197:38] - node _T_1025 = and(_T_1024, _T_857) @[el2_lib.scala 197:43] - node _T_1026 = bits(io.trigger_pkt_any[3].tdata2, 24, 24) @[el2_lib.scala 197:76] - node _T_1027 = bits(lsu_match_data[3], 24, 24) @[el2_lib.scala 197:88] - node _T_1028 = eq(_T_1026, _T_1027) @[el2_lib.scala 197:80] - node _T_1029 = mux(_T_1025, UInt<1>("h01"), _T_1028) @[el2_lib.scala 197:25] - _T_854[24] <= _T_1029 @[el2_lib.scala 197:19] - node _T_1030 = bits(io.trigger_pkt_any[3].tdata2, 24, 0) @[el2_lib.scala 197:30] - node _T_1031 = andr(_T_1030) @[el2_lib.scala 197:38] - node _T_1032 = and(_T_1031, _T_857) @[el2_lib.scala 197:43] - node _T_1033 = bits(io.trigger_pkt_any[3].tdata2, 25, 25) @[el2_lib.scala 197:76] - node _T_1034 = bits(lsu_match_data[3], 25, 25) @[el2_lib.scala 197:88] - node _T_1035 = eq(_T_1033, _T_1034) @[el2_lib.scala 197:80] - node _T_1036 = mux(_T_1032, UInt<1>("h01"), _T_1035) @[el2_lib.scala 197:25] - _T_854[25] <= _T_1036 @[el2_lib.scala 197:19] - node _T_1037 = bits(io.trigger_pkt_any[3].tdata2, 25, 0) @[el2_lib.scala 197:30] - node _T_1038 = andr(_T_1037) @[el2_lib.scala 197:38] - node _T_1039 = and(_T_1038, _T_857) @[el2_lib.scala 197:43] - node _T_1040 = bits(io.trigger_pkt_any[3].tdata2, 26, 26) @[el2_lib.scala 197:76] - node _T_1041 = bits(lsu_match_data[3], 26, 26) @[el2_lib.scala 197:88] - node _T_1042 = eq(_T_1040, _T_1041) @[el2_lib.scala 197:80] - node _T_1043 = mux(_T_1039, UInt<1>("h01"), _T_1042) @[el2_lib.scala 197:25] - _T_854[26] <= _T_1043 @[el2_lib.scala 197:19] - node _T_1044 = bits(io.trigger_pkt_any[3].tdata2, 26, 0) @[el2_lib.scala 197:30] - node _T_1045 = andr(_T_1044) @[el2_lib.scala 197:38] - node _T_1046 = and(_T_1045, _T_857) @[el2_lib.scala 197:43] - node _T_1047 = bits(io.trigger_pkt_any[3].tdata2, 27, 27) @[el2_lib.scala 197:76] - node _T_1048 = bits(lsu_match_data[3], 27, 27) @[el2_lib.scala 197:88] - node _T_1049 = eq(_T_1047, _T_1048) @[el2_lib.scala 197:80] - node _T_1050 = mux(_T_1046, UInt<1>("h01"), _T_1049) @[el2_lib.scala 197:25] - _T_854[27] <= _T_1050 @[el2_lib.scala 197:19] - node _T_1051 = bits(io.trigger_pkt_any[3].tdata2, 27, 0) @[el2_lib.scala 197:30] - node _T_1052 = andr(_T_1051) @[el2_lib.scala 197:38] - node _T_1053 = and(_T_1052, _T_857) @[el2_lib.scala 197:43] - node _T_1054 = bits(io.trigger_pkt_any[3].tdata2, 28, 28) @[el2_lib.scala 197:76] - node _T_1055 = bits(lsu_match_data[3], 28, 28) @[el2_lib.scala 197:88] - node _T_1056 = eq(_T_1054, _T_1055) @[el2_lib.scala 197:80] - node _T_1057 = mux(_T_1053, UInt<1>("h01"), _T_1056) @[el2_lib.scala 197:25] - _T_854[28] <= _T_1057 @[el2_lib.scala 197:19] - node _T_1058 = bits(io.trigger_pkt_any[3].tdata2, 28, 0) @[el2_lib.scala 197:30] - node _T_1059 = andr(_T_1058) @[el2_lib.scala 197:38] - node _T_1060 = and(_T_1059, _T_857) @[el2_lib.scala 197:43] - node _T_1061 = bits(io.trigger_pkt_any[3].tdata2, 29, 29) @[el2_lib.scala 197:76] - node _T_1062 = bits(lsu_match_data[3], 29, 29) @[el2_lib.scala 197:88] - node _T_1063 = eq(_T_1061, _T_1062) @[el2_lib.scala 197:80] - node _T_1064 = mux(_T_1060, UInt<1>("h01"), _T_1063) @[el2_lib.scala 197:25] - _T_854[29] <= _T_1064 @[el2_lib.scala 197:19] - node _T_1065 = bits(io.trigger_pkt_any[3].tdata2, 29, 0) @[el2_lib.scala 197:30] - node _T_1066 = andr(_T_1065) @[el2_lib.scala 197:38] - node _T_1067 = and(_T_1066, _T_857) @[el2_lib.scala 197:43] - node _T_1068 = bits(io.trigger_pkt_any[3].tdata2, 30, 30) @[el2_lib.scala 197:76] - node _T_1069 = bits(lsu_match_data[3], 30, 30) @[el2_lib.scala 197:88] - node _T_1070 = eq(_T_1068, _T_1069) @[el2_lib.scala 197:80] - node _T_1071 = mux(_T_1067, UInt<1>("h01"), _T_1070) @[el2_lib.scala 197:25] - _T_854[30] <= _T_1071 @[el2_lib.scala 197:19] - node _T_1072 = bits(io.trigger_pkt_any[3].tdata2, 30, 0) @[el2_lib.scala 197:30] - node _T_1073 = andr(_T_1072) @[el2_lib.scala 197:38] - node _T_1074 = and(_T_1073, _T_857) @[el2_lib.scala 197:43] - node _T_1075 = bits(io.trigger_pkt_any[3].tdata2, 31, 31) @[el2_lib.scala 197:76] - node _T_1076 = bits(lsu_match_data[3], 31, 31) @[el2_lib.scala 197:88] - node _T_1077 = eq(_T_1075, _T_1076) @[el2_lib.scala 197:80] - node _T_1078 = mux(_T_1074, UInt<1>("h01"), _T_1077) @[el2_lib.scala 197:25] - _T_854[31] <= _T_1078 @[el2_lib.scala 197:19] - node _T_1079 = cat(_T_854[1], _T_854[0]) @[el2_lib.scala 198:14] - node _T_1080 = cat(_T_854[3], _T_854[2]) @[el2_lib.scala 198:14] - node _T_1081 = cat(_T_1080, _T_1079) @[el2_lib.scala 198:14] - node _T_1082 = cat(_T_854[5], _T_854[4]) @[el2_lib.scala 198:14] - node _T_1083 = cat(_T_854[7], _T_854[6]) @[el2_lib.scala 198:14] - node _T_1084 = cat(_T_1083, _T_1082) @[el2_lib.scala 198:14] - node _T_1085 = cat(_T_1084, _T_1081) @[el2_lib.scala 198:14] - node _T_1086 = cat(_T_854[9], _T_854[8]) @[el2_lib.scala 198:14] - node _T_1087 = cat(_T_854[11], _T_854[10]) @[el2_lib.scala 198:14] - node _T_1088 = cat(_T_1087, _T_1086) @[el2_lib.scala 198:14] - node _T_1089 = cat(_T_854[13], _T_854[12]) @[el2_lib.scala 198:14] - node _T_1090 = cat(_T_854[15], _T_854[14]) @[el2_lib.scala 198:14] - node _T_1091 = cat(_T_1090, _T_1089) @[el2_lib.scala 198:14] - node _T_1092 = cat(_T_1091, _T_1088) @[el2_lib.scala 198:14] - node _T_1093 = cat(_T_1092, _T_1085) @[el2_lib.scala 198:14] - node _T_1094 = cat(_T_854[17], _T_854[16]) @[el2_lib.scala 198:14] - node _T_1095 = cat(_T_854[19], _T_854[18]) @[el2_lib.scala 198:14] - node _T_1096 = cat(_T_1095, _T_1094) @[el2_lib.scala 198:14] - node _T_1097 = cat(_T_854[21], _T_854[20]) @[el2_lib.scala 198:14] - node _T_1098 = cat(_T_854[23], _T_854[22]) @[el2_lib.scala 198:14] - node _T_1099 = cat(_T_1098, _T_1097) @[el2_lib.scala 198:14] - node _T_1100 = cat(_T_1099, _T_1096) @[el2_lib.scala 198:14] - node _T_1101 = cat(_T_854[25], _T_854[24]) @[el2_lib.scala 198:14] - node _T_1102 = cat(_T_854[27], _T_854[26]) @[el2_lib.scala 198:14] - node _T_1103 = cat(_T_1102, _T_1101) @[el2_lib.scala 198:14] - node _T_1104 = cat(_T_854[29], _T_854[28]) @[el2_lib.scala 198:14] - node _T_1105 = cat(_T_854[31], _T_854[30]) @[el2_lib.scala 198:14] - node _T_1106 = cat(_T_1105, _T_1104) @[el2_lib.scala 198:14] - node _T_1107 = cat(_T_1106, _T_1103) @[el2_lib.scala 198:14] - node _T_1108 = cat(_T_1107, _T_1100) @[el2_lib.scala 198:14] - node _T_1109 = cat(_T_1108, _T_1093) @[el2_lib.scala 198:14] - node _T_1110 = and(_T_852, _T_1109) @[el2_lsu_trigger.scala 22:86] - node _T_1111 = or(_T_849, _T_1110) @[el2_lsu_trigger.scala 21:141] - node _T_1112 = cat(_T_1111, _T_845) @[Cat.scala 29:58] - node _T_1113 = cat(_T_1112, _T_579) @[Cat.scala 29:58] - node _T_1114 = cat(_T_1113, _T_313) @[Cat.scala 29:58] - io.lsu_trigger_match_m <= _T_1114 @[el2_lsu_trigger.scala 21:26] + node _T_11 = bits(io.trigger_pkt_any[0].select, 0, 0) @[el2_lsu_trigger.scala 19:83] + node _T_12 = eq(_T_11, UInt<1>("h00")) @[el2_lsu_trigger.scala 19:53] + node _T_13 = and(io.trigger_pkt_any[0].select, io.trigger_pkt_any[0].store) @[el2_lsu_trigger.scala 19:136] + node _T_14 = bits(_T_13, 0, 0) @[el2_lsu_trigger.scala 19:167] + node _T_15 = mux(_T_12, io.lsu_addr_m, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_16 = mux(_T_14, store_data_trigger_m, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_17 = or(_T_15, _T_16) @[Mux.scala 27:72] + wire lsu_match_data_0 : UInt<32> @[Mux.scala 27:72] + lsu_match_data_0 <= _T_17 @[Mux.scala 27:72] + node _T_18 = bits(io.trigger_pkt_any[1].select, 0, 0) @[el2_lsu_trigger.scala 19:83] + node _T_19 = eq(_T_18, UInt<1>("h00")) @[el2_lsu_trigger.scala 19:53] + node _T_20 = and(io.trigger_pkt_any[1].select, io.trigger_pkt_any[1].store) @[el2_lsu_trigger.scala 19:136] + node _T_21 = bits(_T_20, 0, 0) @[el2_lsu_trigger.scala 19:167] + node _T_22 = mux(_T_19, io.lsu_addr_m, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_23 = mux(_T_21, store_data_trigger_m, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_24 = or(_T_22, _T_23) @[Mux.scala 27:72] + wire lsu_match_data_1 : UInt<32> @[Mux.scala 27:72] + lsu_match_data_1 <= _T_24 @[Mux.scala 27:72] + node _T_25 = bits(io.trigger_pkt_any[2].select, 0, 0) @[el2_lsu_trigger.scala 19:83] + node _T_26 = eq(_T_25, UInt<1>("h00")) @[el2_lsu_trigger.scala 19:53] + node _T_27 = and(io.trigger_pkt_any[2].select, io.trigger_pkt_any[2].store) @[el2_lsu_trigger.scala 19:136] + node _T_28 = bits(_T_27, 0, 0) @[el2_lsu_trigger.scala 19:167] + node _T_29 = mux(_T_26, io.lsu_addr_m, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_30 = mux(_T_28, store_data_trigger_m, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_31 = or(_T_29, _T_30) @[Mux.scala 27:72] + wire lsu_match_data_2 : UInt<32> @[Mux.scala 27:72] + lsu_match_data_2 <= _T_31 @[Mux.scala 27:72] + node _T_32 = bits(io.trigger_pkt_any[3].select, 0, 0) @[el2_lsu_trigger.scala 19:83] + node _T_33 = eq(_T_32, UInt<1>("h00")) @[el2_lsu_trigger.scala 19:53] + node _T_34 = and(io.trigger_pkt_any[3].select, io.trigger_pkt_any[3].store) @[el2_lsu_trigger.scala 19:136] + node _T_35 = bits(_T_34, 0, 0) @[el2_lsu_trigger.scala 19:167] + node _T_36 = mux(_T_33, io.lsu_addr_m, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_37 = mux(_T_35, store_data_trigger_m, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_38 = or(_T_36, _T_37) @[Mux.scala 27:72] + wire lsu_match_data_3 : UInt<32> @[Mux.scala 27:72] + lsu_match_data_3 <= _T_38 @[Mux.scala 27:72] + node _T_39 = eq(io.lsu_pkt_m.dma, UInt<1>("h00")) @[el2_lsu_trigger.scala 20:71] + node _T_40 = and(io.lsu_pkt_m.valid, _T_39) @[el2_lsu_trigger.scala 20:69] + node _T_41 = and(io.trigger_pkt_any[0].store, io.lsu_pkt_m.store) @[el2_lsu_trigger.scala 20:121] + node _T_42 = and(io.trigger_pkt_any[0].load, io.lsu_pkt_m.load) @[el2_lsu_trigger.scala 21:33] + node _T_43 = eq(io.trigger_pkt_any[0].select, UInt<1>("h00")) @[el2_lsu_trigger.scala 21:55] + node _T_44 = and(_T_42, _T_43) @[el2_lsu_trigger.scala 21:53] + node _T_45 = or(_T_41, _T_44) @[el2_lsu_trigger.scala 20:142] + node _T_46 = and(_T_40, _T_45) @[el2_lsu_trigger.scala 20:89] + node _T_47 = bits(io.trigger_pkt_any[0].match_, 0, 0) @[el2_lsu_trigger.scala 22:106] + wire _T_48 : UInt<1>[32] @[el2_lib.scala 202:24] + node _T_49 = bits(_T_47, 0, 0) @[el2_lib.scala 203:37] + node _T_50 = bits(io.trigger_pkt_any[0].tdata2, 31, 0) @[el2_lib.scala 203:53] + node _T_51 = andr(_T_50) @[el2_lib.scala 203:73] + node _T_52 = not(_T_51) @[el2_lib.scala 203:47] + node _T_53 = and(_T_49, _T_52) @[el2_lib.scala 203:44] + node _T_54 = bits(io.trigger_pkt_any[0].tdata2, 0, 0) @[el2_lib.scala 204:48] + node _T_55 = bits(lsu_match_data_0, 0, 0) @[el2_lib.scala 204:60] + node _T_56 = eq(_T_54, _T_55) @[el2_lib.scala 204:52] + node _T_57 = or(_T_53, _T_56) @[el2_lib.scala 204:41] + _T_48[0] <= _T_57 @[el2_lib.scala 204:18] + node _T_58 = bits(io.trigger_pkt_any[0].tdata2, 0, 0) @[el2_lib.scala 206:29] + node _T_59 = andr(_T_58) @[el2_lib.scala 206:37] + node _T_60 = and(_T_59, _T_53) @[el2_lib.scala 206:42] + node _T_61 = bits(io.trigger_pkt_any[0].tdata2, 1, 1) @[el2_lib.scala 206:75] + node _T_62 = bits(lsu_match_data_0, 1, 1) @[el2_lib.scala 206:87] + node _T_63 = eq(_T_61, _T_62) @[el2_lib.scala 206:79] + node _T_64 = mux(_T_60, UInt<1>("h01"), _T_63) @[el2_lib.scala 206:24] + _T_48[1] <= _T_64 @[el2_lib.scala 206:18] + node _T_65 = bits(io.trigger_pkt_any[0].tdata2, 1, 0) @[el2_lib.scala 206:29] + node _T_66 = andr(_T_65) @[el2_lib.scala 206:37] + node _T_67 = and(_T_66, _T_53) @[el2_lib.scala 206:42] + node _T_68 = bits(io.trigger_pkt_any[0].tdata2, 2, 2) @[el2_lib.scala 206:75] + node _T_69 = bits(lsu_match_data_0, 2, 2) @[el2_lib.scala 206:87] + node _T_70 = eq(_T_68, _T_69) @[el2_lib.scala 206:79] + node _T_71 = mux(_T_67, UInt<1>("h01"), _T_70) @[el2_lib.scala 206:24] + _T_48[2] <= _T_71 @[el2_lib.scala 206:18] + node _T_72 = bits(io.trigger_pkt_any[0].tdata2, 2, 0) @[el2_lib.scala 206:29] + node _T_73 = andr(_T_72) @[el2_lib.scala 206:37] + node _T_74 = and(_T_73, _T_53) @[el2_lib.scala 206:42] + node _T_75 = bits(io.trigger_pkt_any[0].tdata2, 3, 3) @[el2_lib.scala 206:75] + node _T_76 = bits(lsu_match_data_0, 3, 3) @[el2_lib.scala 206:87] + node _T_77 = eq(_T_75, _T_76) @[el2_lib.scala 206:79] + node _T_78 = mux(_T_74, UInt<1>("h01"), _T_77) @[el2_lib.scala 206:24] + _T_48[3] <= _T_78 @[el2_lib.scala 206:18] + node _T_79 = bits(io.trigger_pkt_any[0].tdata2, 3, 0) @[el2_lib.scala 206:29] + node _T_80 = andr(_T_79) @[el2_lib.scala 206:37] + node _T_81 = and(_T_80, _T_53) @[el2_lib.scala 206:42] + node _T_82 = bits(io.trigger_pkt_any[0].tdata2, 4, 4) @[el2_lib.scala 206:75] + node _T_83 = bits(lsu_match_data_0, 4, 4) @[el2_lib.scala 206:87] + node _T_84 = eq(_T_82, _T_83) @[el2_lib.scala 206:79] + node _T_85 = mux(_T_81, UInt<1>("h01"), _T_84) @[el2_lib.scala 206:24] + _T_48[4] <= _T_85 @[el2_lib.scala 206:18] + node _T_86 = bits(io.trigger_pkt_any[0].tdata2, 4, 0) @[el2_lib.scala 206:29] + node _T_87 = andr(_T_86) @[el2_lib.scala 206:37] + node _T_88 = and(_T_87, _T_53) @[el2_lib.scala 206:42] + node _T_89 = bits(io.trigger_pkt_any[0].tdata2, 5, 5) @[el2_lib.scala 206:75] + node _T_90 = bits(lsu_match_data_0, 5, 5) @[el2_lib.scala 206:87] + node _T_91 = eq(_T_89, _T_90) @[el2_lib.scala 206:79] + node _T_92 = mux(_T_88, UInt<1>("h01"), _T_91) @[el2_lib.scala 206:24] + _T_48[5] <= _T_92 @[el2_lib.scala 206:18] + node _T_93 = bits(io.trigger_pkt_any[0].tdata2, 5, 0) @[el2_lib.scala 206:29] + node _T_94 = andr(_T_93) @[el2_lib.scala 206:37] + node _T_95 = and(_T_94, _T_53) @[el2_lib.scala 206:42] + node _T_96 = bits(io.trigger_pkt_any[0].tdata2, 6, 6) @[el2_lib.scala 206:75] + node _T_97 = bits(lsu_match_data_0, 6, 6) @[el2_lib.scala 206:87] + node _T_98 = eq(_T_96, _T_97) @[el2_lib.scala 206:79] + node _T_99 = mux(_T_95, UInt<1>("h01"), _T_98) @[el2_lib.scala 206:24] + _T_48[6] <= _T_99 @[el2_lib.scala 206:18] + node _T_100 = bits(io.trigger_pkt_any[0].tdata2, 6, 0) @[el2_lib.scala 206:29] + node _T_101 = andr(_T_100) @[el2_lib.scala 206:37] + node _T_102 = and(_T_101, _T_53) @[el2_lib.scala 206:42] + node _T_103 = bits(io.trigger_pkt_any[0].tdata2, 7, 7) @[el2_lib.scala 206:75] + node _T_104 = bits(lsu_match_data_0, 7, 7) @[el2_lib.scala 206:87] + node _T_105 = eq(_T_103, _T_104) @[el2_lib.scala 206:79] + node _T_106 = mux(_T_102, UInt<1>("h01"), _T_105) @[el2_lib.scala 206:24] + _T_48[7] <= _T_106 @[el2_lib.scala 206:18] + node _T_107 = bits(io.trigger_pkt_any[0].tdata2, 7, 0) @[el2_lib.scala 206:29] + node _T_108 = andr(_T_107) @[el2_lib.scala 206:37] + node _T_109 = and(_T_108, _T_53) @[el2_lib.scala 206:42] + node _T_110 = bits(io.trigger_pkt_any[0].tdata2, 8, 8) @[el2_lib.scala 206:75] + node _T_111 = bits(lsu_match_data_0, 8, 8) @[el2_lib.scala 206:87] + node _T_112 = eq(_T_110, _T_111) @[el2_lib.scala 206:79] + node _T_113 = mux(_T_109, UInt<1>("h01"), _T_112) @[el2_lib.scala 206:24] + _T_48[8] <= _T_113 @[el2_lib.scala 206:18] + node _T_114 = bits(io.trigger_pkt_any[0].tdata2, 8, 0) @[el2_lib.scala 206:29] + node _T_115 = andr(_T_114) @[el2_lib.scala 206:37] + node _T_116 = and(_T_115, _T_53) @[el2_lib.scala 206:42] + node _T_117 = bits(io.trigger_pkt_any[0].tdata2, 9, 9) @[el2_lib.scala 206:75] + node _T_118 = bits(lsu_match_data_0, 9, 9) @[el2_lib.scala 206:87] + node _T_119 = eq(_T_117, _T_118) @[el2_lib.scala 206:79] + node _T_120 = mux(_T_116, UInt<1>("h01"), _T_119) @[el2_lib.scala 206:24] + _T_48[9] <= _T_120 @[el2_lib.scala 206:18] + node _T_121 = bits(io.trigger_pkt_any[0].tdata2, 9, 0) @[el2_lib.scala 206:29] + node _T_122 = andr(_T_121) @[el2_lib.scala 206:37] + node _T_123 = and(_T_122, _T_53) @[el2_lib.scala 206:42] + node _T_124 = bits(io.trigger_pkt_any[0].tdata2, 10, 10) @[el2_lib.scala 206:75] + node _T_125 = bits(lsu_match_data_0, 10, 10) @[el2_lib.scala 206:87] + node _T_126 = eq(_T_124, _T_125) @[el2_lib.scala 206:79] + node _T_127 = mux(_T_123, UInt<1>("h01"), _T_126) @[el2_lib.scala 206:24] + _T_48[10] <= _T_127 @[el2_lib.scala 206:18] + node _T_128 = bits(io.trigger_pkt_any[0].tdata2, 10, 0) @[el2_lib.scala 206:29] + node _T_129 = andr(_T_128) @[el2_lib.scala 206:37] + node _T_130 = and(_T_129, _T_53) @[el2_lib.scala 206:42] + node _T_131 = bits(io.trigger_pkt_any[0].tdata2, 11, 11) @[el2_lib.scala 206:75] + node _T_132 = bits(lsu_match_data_0, 11, 11) @[el2_lib.scala 206:87] + node _T_133 = eq(_T_131, _T_132) @[el2_lib.scala 206:79] + node _T_134 = mux(_T_130, UInt<1>("h01"), _T_133) @[el2_lib.scala 206:24] + _T_48[11] <= _T_134 @[el2_lib.scala 206:18] + node _T_135 = bits(io.trigger_pkt_any[0].tdata2, 11, 0) @[el2_lib.scala 206:29] + node _T_136 = andr(_T_135) @[el2_lib.scala 206:37] + node _T_137 = and(_T_136, _T_53) @[el2_lib.scala 206:42] + node _T_138 = bits(io.trigger_pkt_any[0].tdata2, 12, 12) @[el2_lib.scala 206:75] + node _T_139 = bits(lsu_match_data_0, 12, 12) @[el2_lib.scala 206:87] + node _T_140 = eq(_T_138, _T_139) @[el2_lib.scala 206:79] + node _T_141 = mux(_T_137, UInt<1>("h01"), _T_140) @[el2_lib.scala 206:24] + _T_48[12] <= _T_141 @[el2_lib.scala 206:18] + node _T_142 = bits(io.trigger_pkt_any[0].tdata2, 12, 0) @[el2_lib.scala 206:29] + node _T_143 = andr(_T_142) @[el2_lib.scala 206:37] + node _T_144 = and(_T_143, _T_53) @[el2_lib.scala 206:42] + node _T_145 = bits(io.trigger_pkt_any[0].tdata2, 13, 13) @[el2_lib.scala 206:75] + node _T_146 = bits(lsu_match_data_0, 13, 13) @[el2_lib.scala 206:87] + node _T_147 = eq(_T_145, _T_146) @[el2_lib.scala 206:79] + node _T_148 = mux(_T_144, UInt<1>("h01"), _T_147) @[el2_lib.scala 206:24] + _T_48[13] <= _T_148 @[el2_lib.scala 206:18] + node _T_149 = bits(io.trigger_pkt_any[0].tdata2, 13, 0) @[el2_lib.scala 206:29] + node _T_150 = andr(_T_149) @[el2_lib.scala 206:37] + node _T_151 = and(_T_150, _T_53) @[el2_lib.scala 206:42] + node _T_152 = bits(io.trigger_pkt_any[0].tdata2, 14, 14) @[el2_lib.scala 206:75] + node _T_153 = bits(lsu_match_data_0, 14, 14) @[el2_lib.scala 206:87] + node _T_154 = eq(_T_152, _T_153) @[el2_lib.scala 206:79] + node _T_155 = mux(_T_151, UInt<1>("h01"), _T_154) @[el2_lib.scala 206:24] + _T_48[14] <= _T_155 @[el2_lib.scala 206:18] + node _T_156 = bits(io.trigger_pkt_any[0].tdata2, 14, 0) @[el2_lib.scala 206:29] + node _T_157 = andr(_T_156) @[el2_lib.scala 206:37] + node _T_158 = and(_T_157, _T_53) @[el2_lib.scala 206:42] + node _T_159 = bits(io.trigger_pkt_any[0].tdata2, 15, 15) @[el2_lib.scala 206:75] + node _T_160 = bits(lsu_match_data_0, 15, 15) @[el2_lib.scala 206:87] + node _T_161 = eq(_T_159, _T_160) @[el2_lib.scala 206:79] + node _T_162 = mux(_T_158, UInt<1>("h01"), _T_161) @[el2_lib.scala 206:24] + _T_48[15] <= _T_162 @[el2_lib.scala 206:18] + node _T_163 = bits(io.trigger_pkt_any[0].tdata2, 15, 0) @[el2_lib.scala 206:29] + node _T_164 = andr(_T_163) @[el2_lib.scala 206:37] + node _T_165 = and(_T_164, _T_53) @[el2_lib.scala 206:42] + node _T_166 = bits(io.trigger_pkt_any[0].tdata2, 16, 16) @[el2_lib.scala 206:75] + node _T_167 = bits(lsu_match_data_0, 16, 16) @[el2_lib.scala 206:87] + node _T_168 = eq(_T_166, _T_167) @[el2_lib.scala 206:79] + node _T_169 = mux(_T_165, UInt<1>("h01"), _T_168) @[el2_lib.scala 206:24] + _T_48[16] <= _T_169 @[el2_lib.scala 206:18] + node _T_170 = bits(io.trigger_pkt_any[0].tdata2, 16, 0) @[el2_lib.scala 206:29] + node _T_171 = andr(_T_170) @[el2_lib.scala 206:37] + node _T_172 = and(_T_171, _T_53) @[el2_lib.scala 206:42] + node _T_173 = bits(io.trigger_pkt_any[0].tdata2, 17, 17) @[el2_lib.scala 206:75] + node _T_174 = bits(lsu_match_data_0, 17, 17) @[el2_lib.scala 206:87] + node _T_175 = eq(_T_173, _T_174) @[el2_lib.scala 206:79] + node _T_176 = mux(_T_172, UInt<1>("h01"), _T_175) @[el2_lib.scala 206:24] + _T_48[17] <= _T_176 @[el2_lib.scala 206:18] + node _T_177 = bits(io.trigger_pkt_any[0].tdata2, 17, 0) @[el2_lib.scala 206:29] + node _T_178 = andr(_T_177) @[el2_lib.scala 206:37] + node _T_179 = and(_T_178, _T_53) @[el2_lib.scala 206:42] + node _T_180 = bits(io.trigger_pkt_any[0].tdata2, 18, 18) @[el2_lib.scala 206:75] + node _T_181 = bits(lsu_match_data_0, 18, 18) @[el2_lib.scala 206:87] + node _T_182 = eq(_T_180, _T_181) @[el2_lib.scala 206:79] + node _T_183 = mux(_T_179, UInt<1>("h01"), _T_182) @[el2_lib.scala 206:24] + _T_48[18] <= _T_183 @[el2_lib.scala 206:18] + node _T_184 = bits(io.trigger_pkt_any[0].tdata2, 18, 0) @[el2_lib.scala 206:29] + node _T_185 = andr(_T_184) @[el2_lib.scala 206:37] + node _T_186 = and(_T_185, _T_53) @[el2_lib.scala 206:42] + node _T_187 = bits(io.trigger_pkt_any[0].tdata2, 19, 19) @[el2_lib.scala 206:75] + node _T_188 = bits(lsu_match_data_0, 19, 19) @[el2_lib.scala 206:87] + node _T_189 = eq(_T_187, _T_188) @[el2_lib.scala 206:79] + node _T_190 = mux(_T_186, UInt<1>("h01"), _T_189) @[el2_lib.scala 206:24] + _T_48[19] <= _T_190 @[el2_lib.scala 206:18] + node _T_191 = bits(io.trigger_pkt_any[0].tdata2, 19, 0) @[el2_lib.scala 206:29] + node _T_192 = andr(_T_191) @[el2_lib.scala 206:37] + node _T_193 = and(_T_192, _T_53) @[el2_lib.scala 206:42] + node _T_194 = bits(io.trigger_pkt_any[0].tdata2, 20, 20) @[el2_lib.scala 206:75] + node _T_195 = bits(lsu_match_data_0, 20, 20) @[el2_lib.scala 206:87] + node _T_196 = eq(_T_194, _T_195) @[el2_lib.scala 206:79] + node _T_197 = mux(_T_193, UInt<1>("h01"), _T_196) @[el2_lib.scala 206:24] + _T_48[20] <= _T_197 @[el2_lib.scala 206:18] + node _T_198 = bits(io.trigger_pkt_any[0].tdata2, 20, 0) @[el2_lib.scala 206:29] + node _T_199 = andr(_T_198) @[el2_lib.scala 206:37] + node _T_200 = and(_T_199, _T_53) @[el2_lib.scala 206:42] + node _T_201 = bits(io.trigger_pkt_any[0].tdata2, 21, 21) @[el2_lib.scala 206:75] + node _T_202 = bits(lsu_match_data_0, 21, 21) @[el2_lib.scala 206:87] + node _T_203 = eq(_T_201, _T_202) @[el2_lib.scala 206:79] + node _T_204 = mux(_T_200, UInt<1>("h01"), _T_203) @[el2_lib.scala 206:24] + _T_48[21] <= _T_204 @[el2_lib.scala 206:18] + node _T_205 = bits(io.trigger_pkt_any[0].tdata2, 21, 0) @[el2_lib.scala 206:29] + node _T_206 = andr(_T_205) @[el2_lib.scala 206:37] + node _T_207 = and(_T_206, _T_53) @[el2_lib.scala 206:42] + node _T_208 = bits(io.trigger_pkt_any[0].tdata2, 22, 22) @[el2_lib.scala 206:75] + node _T_209 = bits(lsu_match_data_0, 22, 22) @[el2_lib.scala 206:87] + node _T_210 = eq(_T_208, _T_209) @[el2_lib.scala 206:79] + node _T_211 = mux(_T_207, UInt<1>("h01"), _T_210) @[el2_lib.scala 206:24] + _T_48[22] <= _T_211 @[el2_lib.scala 206:18] + node _T_212 = bits(io.trigger_pkt_any[0].tdata2, 22, 0) @[el2_lib.scala 206:29] + node _T_213 = andr(_T_212) @[el2_lib.scala 206:37] + node _T_214 = and(_T_213, _T_53) @[el2_lib.scala 206:42] + node _T_215 = bits(io.trigger_pkt_any[0].tdata2, 23, 23) @[el2_lib.scala 206:75] + node _T_216 = bits(lsu_match_data_0, 23, 23) @[el2_lib.scala 206:87] + node _T_217 = eq(_T_215, _T_216) @[el2_lib.scala 206:79] + node _T_218 = mux(_T_214, UInt<1>("h01"), _T_217) @[el2_lib.scala 206:24] + _T_48[23] <= _T_218 @[el2_lib.scala 206:18] + node _T_219 = bits(io.trigger_pkt_any[0].tdata2, 23, 0) @[el2_lib.scala 206:29] + node _T_220 = andr(_T_219) @[el2_lib.scala 206:37] + node _T_221 = and(_T_220, _T_53) @[el2_lib.scala 206:42] + node _T_222 = bits(io.trigger_pkt_any[0].tdata2, 24, 24) @[el2_lib.scala 206:75] + node _T_223 = bits(lsu_match_data_0, 24, 24) @[el2_lib.scala 206:87] + node _T_224 = eq(_T_222, _T_223) @[el2_lib.scala 206:79] + node _T_225 = mux(_T_221, UInt<1>("h01"), _T_224) @[el2_lib.scala 206:24] + _T_48[24] <= _T_225 @[el2_lib.scala 206:18] + node _T_226 = bits(io.trigger_pkt_any[0].tdata2, 24, 0) @[el2_lib.scala 206:29] + node _T_227 = andr(_T_226) @[el2_lib.scala 206:37] + node _T_228 = and(_T_227, _T_53) @[el2_lib.scala 206:42] + node _T_229 = bits(io.trigger_pkt_any[0].tdata2, 25, 25) @[el2_lib.scala 206:75] + node _T_230 = bits(lsu_match_data_0, 25, 25) @[el2_lib.scala 206:87] + node _T_231 = eq(_T_229, _T_230) @[el2_lib.scala 206:79] + node _T_232 = mux(_T_228, UInt<1>("h01"), _T_231) @[el2_lib.scala 206:24] + _T_48[25] <= _T_232 @[el2_lib.scala 206:18] + node _T_233 = bits(io.trigger_pkt_any[0].tdata2, 25, 0) @[el2_lib.scala 206:29] + node _T_234 = andr(_T_233) @[el2_lib.scala 206:37] + node _T_235 = and(_T_234, _T_53) @[el2_lib.scala 206:42] + node _T_236 = bits(io.trigger_pkt_any[0].tdata2, 26, 26) @[el2_lib.scala 206:75] + node _T_237 = bits(lsu_match_data_0, 26, 26) @[el2_lib.scala 206:87] + node _T_238 = eq(_T_236, _T_237) @[el2_lib.scala 206:79] + node _T_239 = mux(_T_235, UInt<1>("h01"), _T_238) @[el2_lib.scala 206:24] + _T_48[26] <= _T_239 @[el2_lib.scala 206:18] + node _T_240 = bits(io.trigger_pkt_any[0].tdata2, 26, 0) @[el2_lib.scala 206:29] + node _T_241 = andr(_T_240) @[el2_lib.scala 206:37] + node _T_242 = and(_T_241, _T_53) @[el2_lib.scala 206:42] + node _T_243 = bits(io.trigger_pkt_any[0].tdata2, 27, 27) @[el2_lib.scala 206:75] + node _T_244 = bits(lsu_match_data_0, 27, 27) @[el2_lib.scala 206:87] + node _T_245 = eq(_T_243, _T_244) @[el2_lib.scala 206:79] + node _T_246 = mux(_T_242, UInt<1>("h01"), _T_245) @[el2_lib.scala 206:24] + _T_48[27] <= _T_246 @[el2_lib.scala 206:18] + node _T_247 = bits(io.trigger_pkt_any[0].tdata2, 27, 0) @[el2_lib.scala 206:29] + node _T_248 = andr(_T_247) @[el2_lib.scala 206:37] + node _T_249 = and(_T_248, _T_53) @[el2_lib.scala 206:42] + node _T_250 = bits(io.trigger_pkt_any[0].tdata2, 28, 28) @[el2_lib.scala 206:75] + node _T_251 = bits(lsu_match_data_0, 28, 28) @[el2_lib.scala 206:87] + node _T_252 = eq(_T_250, _T_251) @[el2_lib.scala 206:79] + node _T_253 = mux(_T_249, UInt<1>("h01"), _T_252) @[el2_lib.scala 206:24] + _T_48[28] <= _T_253 @[el2_lib.scala 206:18] + node _T_254 = bits(io.trigger_pkt_any[0].tdata2, 28, 0) @[el2_lib.scala 206:29] + node _T_255 = andr(_T_254) @[el2_lib.scala 206:37] + node _T_256 = and(_T_255, _T_53) @[el2_lib.scala 206:42] + node _T_257 = bits(io.trigger_pkt_any[0].tdata2, 29, 29) @[el2_lib.scala 206:75] + node _T_258 = bits(lsu_match_data_0, 29, 29) @[el2_lib.scala 206:87] + node _T_259 = eq(_T_257, _T_258) @[el2_lib.scala 206:79] + node _T_260 = mux(_T_256, UInt<1>("h01"), _T_259) @[el2_lib.scala 206:24] + _T_48[29] <= _T_260 @[el2_lib.scala 206:18] + node _T_261 = bits(io.trigger_pkt_any[0].tdata2, 29, 0) @[el2_lib.scala 206:29] + node _T_262 = andr(_T_261) @[el2_lib.scala 206:37] + node _T_263 = and(_T_262, _T_53) @[el2_lib.scala 206:42] + node _T_264 = bits(io.trigger_pkt_any[0].tdata2, 30, 30) @[el2_lib.scala 206:75] + node _T_265 = bits(lsu_match_data_0, 30, 30) @[el2_lib.scala 206:87] + node _T_266 = eq(_T_264, _T_265) @[el2_lib.scala 206:79] + node _T_267 = mux(_T_263, UInt<1>("h01"), _T_266) @[el2_lib.scala 206:24] + _T_48[30] <= _T_267 @[el2_lib.scala 206:18] + node _T_268 = bits(io.trigger_pkt_any[0].tdata2, 30, 0) @[el2_lib.scala 206:29] + node _T_269 = andr(_T_268) @[el2_lib.scala 206:37] + node _T_270 = and(_T_269, _T_53) @[el2_lib.scala 206:42] + node _T_271 = bits(io.trigger_pkt_any[0].tdata2, 31, 31) @[el2_lib.scala 206:75] + node _T_272 = bits(lsu_match_data_0, 31, 31) @[el2_lib.scala 206:87] + node _T_273 = eq(_T_271, _T_272) @[el2_lib.scala 206:79] + node _T_274 = mux(_T_270, UInt<1>("h01"), _T_273) @[el2_lib.scala 206:24] + _T_48[31] <= _T_274 @[el2_lib.scala 206:18] + node _T_275 = cat(_T_48[1], _T_48[0]) @[el2_lib.scala 207:14] + node _T_276 = cat(_T_48[3], _T_48[2]) @[el2_lib.scala 207:14] + node _T_277 = cat(_T_276, _T_275) @[el2_lib.scala 207:14] + node _T_278 = cat(_T_48[5], _T_48[4]) @[el2_lib.scala 207:14] + node _T_279 = cat(_T_48[7], _T_48[6]) @[el2_lib.scala 207:14] + node _T_280 = cat(_T_279, _T_278) @[el2_lib.scala 207:14] + node _T_281 = cat(_T_280, _T_277) @[el2_lib.scala 207:14] + node _T_282 = cat(_T_48[9], _T_48[8]) @[el2_lib.scala 207:14] + node _T_283 = cat(_T_48[11], _T_48[10]) @[el2_lib.scala 207:14] + node _T_284 = cat(_T_283, _T_282) @[el2_lib.scala 207:14] + node _T_285 = cat(_T_48[13], _T_48[12]) @[el2_lib.scala 207:14] + node _T_286 = cat(_T_48[15], _T_48[14]) @[el2_lib.scala 207:14] + node _T_287 = cat(_T_286, _T_285) @[el2_lib.scala 207:14] + node _T_288 = cat(_T_287, _T_284) @[el2_lib.scala 207:14] + node _T_289 = cat(_T_288, _T_281) @[el2_lib.scala 207:14] + node _T_290 = cat(_T_48[17], _T_48[16]) @[el2_lib.scala 207:14] + node _T_291 = cat(_T_48[19], _T_48[18]) @[el2_lib.scala 207:14] + node _T_292 = cat(_T_291, _T_290) @[el2_lib.scala 207:14] + node _T_293 = cat(_T_48[21], _T_48[20]) @[el2_lib.scala 207:14] + node _T_294 = cat(_T_48[23], _T_48[22]) @[el2_lib.scala 207:14] + node _T_295 = cat(_T_294, _T_293) @[el2_lib.scala 207:14] + node _T_296 = cat(_T_295, _T_292) @[el2_lib.scala 207:14] + node _T_297 = cat(_T_48[25], _T_48[24]) @[el2_lib.scala 207:14] + node _T_298 = cat(_T_48[27], _T_48[26]) @[el2_lib.scala 207:14] + node _T_299 = cat(_T_298, _T_297) @[el2_lib.scala 207:14] + node _T_300 = cat(_T_48[29], _T_48[28]) @[el2_lib.scala 207:14] + node _T_301 = cat(_T_48[31], _T_48[30]) @[el2_lib.scala 207:14] + node _T_302 = cat(_T_301, _T_300) @[el2_lib.scala 207:14] + node _T_303 = cat(_T_302, _T_299) @[el2_lib.scala 207:14] + node _T_304 = cat(_T_303, _T_296) @[el2_lib.scala 207:14] + node _T_305 = cat(_T_304, _T_289) @[el2_lib.scala 207:14] + node _T_306 = andr(_T_305) @[el2_lib.scala 207:21] + node _T_307 = and(_T_46, _T_306) @[el2_lsu_trigger.scala 21:87] + node _T_308 = eq(io.lsu_pkt_m.dma, UInt<1>("h00")) @[el2_lsu_trigger.scala 20:71] + node _T_309 = and(io.lsu_pkt_m.valid, _T_308) @[el2_lsu_trigger.scala 20:69] + node _T_310 = and(io.trigger_pkt_any[1].store, io.lsu_pkt_m.store) @[el2_lsu_trigger.scala 20:121] + node _T_311 = and(io.trigger_pkt_any[1].load, io.lsu_pkt_m.load) @[el2_lsu_trigger.scala 21:33] + node _T_312 = eq(io.trigger_pkt_any[1].select, UInt<1>("h00")) @[el2_lsu_trigger.scala 21:55] + node _T_313 = and(_T_311, _T_312) @[el2_lsu_trigger.scala 21:53] + node _T_314 = or(_T_310, _T_313) @[el2_lsu_trigger.scala 20:142] + node _T_315 = and(_T_309, _T_314) @[el2_lsu_trigger.scala 20:89] + node _T_316 = bits(io.trigger_pkt_any[1].match_, 0, 0) @[el2_lsu_trigger.scala 22:106] + wire _T_317 : UInt<1>[32] @[el2_lib.scala 202:24] + node _T_318 = bits(_T_316, 0, 0) @[el2_lib.scala 203:37] + node _T_319 = bits(io.trigger_pkt_any[1].tdata2, 31, 0) @[el2_lib.scala 203:53] + node _T_320 = andr(_T_319) @[el2_lib.scala 203:73] + node _T_321 = not(_T_320) @[el2_lib.scala 203:47] + node _T_322 = and(_T_318, _T_321) @[el2_lib.scala 203:44] + node _T_323 = bits(io.trigger_pkt_any[1].tdata2, 0, 0) @[el2_lib.scala 204:48] + node _T_324 = bits(lsu_match_data_1, 0, 0) @[el2_lib.scala 204:60] + node _T_325 = eq(_T_323, _T_324) @[el2_lib.scala 204:52] + node _T_326 = or(_T_322, _T_325) @[el2_lib.scala 204:41] + _T_317[0] <= _T_326 @[el2_lib.scala 204:18] + node _T_327 = bits(io.trigger_pkt_any[1].tdata2, 0, 0) @[el2_lib.scala 206:29] + node _T_328 = andr(_T_327) @[el2_lib.scala 206:37] + node _T_329 = and(_T_328, _T_322) @[el2_lib.scala 206:42] + node _T_330 = bits(io.trigger_pkt_any[1].tdata2, 1, 1) @[el2_lib.scala 206:75] + node _T_331 = bits(lsu_match_data_1, 1, 1) @[el2_lib.scala 206:87] + node _T_332 = eq(_T_330, _T_331) @[el2_lib.scala 206:79] + node _T_333 = mux(_T_329, UInt<1>("h01"), _T_332) @[el2_lib.scala 206:24] + _T_317[1] <= _T_333 @[el2_lib.scala 206:18] + node _T_334 = bits(io.trigger_pkt_any[1].tdata2, 1, 0) @[el2_lib.scala 206:29] + node _T_335 = andr(_T_334) @[el2_lib.scala 206:37] + node _T_336 = and(_T_335, _T_322) @[el2_lib.scala 206:42] + node _T_337 = bits(io.trigger_pkt_any[1].tdata2, 2, 2) @[el2_lib.scala 206:75] + node _T_338 = bits(lsu_match_data_1, 2, 2) @[el2_lib.scala 206:87] + node _T_339 = eq(_T_337, _T_338) @[el2_lib.scala 206:79] + node _T_340 = mux(_T_336, UInt<1>("h01"), _T_339) @[el2_lib.scala 206:24] + _T_317[2] <= _T_340 @[el2_lib.scala 206:18] + node _T_341 = bits(io.trigger_pkt_any[1].tdata2, 2, 0) @[el2_lib.scala 206:29] + node _T_342 = andr(_T_341) @[el2_lib.scala 206:37] + node _T_343 = and(_T_342, _T_322) @[el2_lib.scala 206:42] + node _T_344 = bits(io.trigger_pkt_any[1].tdata2, 3, 3) @[el2_lib.scala 206:75] + node _T_345 = bits(lsu_match_data_1, 3, 3) @[el2_lib.scala 206:87] + node _T_346 = eq(_T_344, _T_345) @[el2_lib.scala 206:79] + node _T_347 = mux(_T_343, UInt<1>("h01"), _T_346) @[el2_lib.scala 206:24] + _T_317[3] <= _T_347 @[el2_lib.scala 206:18] + node _T_348 = bits(io.trigger_pkt_any[1].tdata2, 3, 0) @[el2_lib.scala 206:29] + node _T_349 = andr(_T_348) @[el2_lib.scala 206:37] + node _T_350 = and(_T_349, _T_322) @[el2_lib.scala 206:42] + node _T_351 = bits(io.trigger_pkt_any[1].tdata2, 4, 4) @[el2_lib.scala 206:75] + node _T_352 = bits(lsu_match_data_1, 4, 4) @[el2_lib.scala 206:87] + node _T_353 = eq(_T_351, _T_352) @[el2_lib.scala 206:79] + node _T_354 = mux(_T_350, UInt<1>("h01"), _T_353) @[el2_lib.scala 206:24] + _T_317[4] <= _T_354 @[el2_lib.scala 206:18] + node _T_355 = bits(io.trigger_pkt_any[1].tdata2, 4, 0) @[el2_lib.scala 206:29] + node _T_356 = andr(_T_355) @[el2_lib.scala 206:37] + node _T_357 = and(_T_356, _T_322) @[el2_lib.scala 206:42] + node _T_358 = bits(io.trigger_pkt_any[1].tdata2, 5, 5) @[el2_lib.scala 206:75] + node _T_359 = bits(lsu_match_data_1, 5, 5) @[el2_lib.scala 206:87] + node _T_360 = eq(_T_358, _T_359) @[el2_lib.scala 206:79] + node _T_361 = mux(_T_357, UInt<1>("h01"), _T_360) @[el2_lib.scala 206:24] + _T_317[5] <= _T_361 @[el2_lib.scala 206:18] + node _T_362 = bits(io.trigger_pkt_any[1].tdata2, 5, 0) @[el2_lib.scala 206:29] + node _T_363 = andr(_T_362) @[el2_lib.scala 206:37] + node _T_364 = and(_T_363, _T_322) @[el2_lib.scala 206:42] + node _T_365 = bits(io.trigger_pkt_any[1].tdata2, 6, 6) @[el2_lib.scala 206:75] + node _T_366 = bits(lsu_match_data_1, 6, 6) @[el2_lib.scala 206:87] + node _T_367 = eq(_T_365, _T_366) @[el2_lib.scala 206:79] + node _T_368 = mux(_T_364, UInt<1>("h01"), _T_367) @[el2_lib.scala 206:24] + _T_317[6] <= _T_368 @[el2_lib.scala 206:18] + node _T_369 = bits(io.trigger_pkt_any[1].tdata2, 6, 0) @[el2_lib.scala 206:29] + node _T_370 = andr(_T_369) @[el2_lib.scala 206:37] + node _T_371 = and(_T_370, _T_322) @[el2_lib.scala 206:42] + node _T_372 = bits(io.trigger_pkt_any[1].tdata2, 7, 7) @[el2_lib.scala 206:75] + node _T_373 = bits(lsu_match_data_1, 7, 7) @[el2_lib.scala 206:87] + node _T_374 = eq(_T_372, _T_373) @[el2_lib.scala 206:79] + node _T_375 = mux(_T_371, UInt<1>("h01"), _T_374) @[el2_lib.scala 206:24] + _T_317[7] <= _T_375 @[el2_lib.scala 206:18] + node _T_376 = bits(io.trigger_pkt_any[1].tdata2, 7, 0) @[el2_lib.scala 206:29] + node _T_377 = andr(_T_376) @[el2_lib.scala 206:37] + node _T_378 = and(_T_377, _T_322) @[el2_lib.scala 206:42] + node _T_379 = bits(io.trigger_pkt_any[1].tdata2, 8, 8) @[el2_lib.scala 206:75] + node _T_380 = bits(lsu_match_data_1, 8, 8) @[el2_lib.scala 206:87] + node _T_381 = eq(_T_379, _T_380) @[el2_lib.scala 206:79] + node _T_382 = mux(_T_378, UInt<1>("h01"), _T_381) @[el2_lib.scala 206:24] + _T_317[8] <= _T_382 @[el2_lib.scala 206:18] + node _T_383 = bits(io.trigger_pkt_any[1].tdata2, 8, 0) @[el2_lib.scala 206:29] + node _T_384 = andr(_T_383) @[el2_lib.scala 206:37] + node _T_385 = and(_T_384, _T_322) @[el2_lib.scala 206:42] + node _T_386 = bits(io.trigger_pkt_any[1].tdata2, 9, 9) @[el2_lib.scala 206:75] + node _T_387 = bits(lsu_match_data_1, 9, 9) @[el2_lib.scala 206:87] + node _T_388 = eq(_T_386, _T_387) @[el2_lib.scala 206:79] + node _T_389 = mux(_T_385, UInt<1>("h01"), _T_388) @[el2_lib.scala 206:24] + _T_317[9] <= _T_389 @[el2_lib.scala 206:18] + node _T_390 = bits(io.trigger_pkt_any[1].tdata2, 9, 0) @[el2_lib.scala 206:29] + node _T_391 = andr(_T_390) @[el2_lib.scala 206:37] + node _T_392 = and(_T_391, _T_322) @[el2_lib.scala 206:42] + node _T_393 = bits(io.trigger_pkt_any[1].tdata2, 10, 10) @[el2_lib.scala 206:75] + node _T_394 = bits(lsu_match_data_1, 10, 10) @[el2_lib.scala 206:87] + node _T_395 = eq(_T_393, _T_394) @[el2_lib.scala 206:79] + node _T_396 = mux(_T_392, UInt<1>("h01"), _T_395) @[el2_lib.scala 206:24] + _T_317[10] <= _T_396 @[el2_lib.scala 206:18] + node _T_397 = bits(io.trigger_pkt_any[1].tdata2, 10, 0) @[el2_lib.scala 206:29] + node _T_398 = andr(_T_397) @[el2_lib.scala 206:37] + node _T_399 = and(_T_398, _T_322) @[el2_lib.scala 206:42] + node _T_400 = bits(io.trigger_pkt_any[1].tdata2, 11, 11) @[el2_lib.scala 206:75] + node _T_401 = bits(lsu_match_data_1, 11, 11) @[el2_lib.scala 206:87] + node _T_402 = eq(_T_400, _T_401) @[el2_lib.scala 206:79] + node _T_403 = mux(_T_399, UInt<1>("h01"), _T_402) @[el2_lib.scala 206:24] + _T_317[11] <= _T_403 @[el2_lib.scala 206:18] + node _T_404 = bits(io.trigger_pkt_any[1].tdata2, 11, 0) @[el2_lib.scala 206:29] + node _T_405 = andr(_T_404) @[el2_lib.scala 206:37] + node _T_406 = and(_T_405, _T_322) @[el2_lib.scala 206:42] + node _T_407 = bits(io.trigger_pkt_any[1].tdata2, 12, 12) @[el2_lib.scala 206:75] + node _T_408 = bits(lsu_match_data_1, 12, 12) @[el2_lib.scala 206:87] + node _T_409 = eq(_T_407, _T_408) @[el2_lib.scala 206:79] + node _T_410 = mux(_T_406, UInt<1>("h01"), _T_409) @[el2_lib.scala 206:24] + _T_317[12] <= _T_410 @[el2_lib.scala 206:18] + node _T_411 = bits(io.trigger_pkt_any[1].tdata2, 12, 0) @[el2_lib.scala 206:29] + node _T_412 = andr(_T_411) @[el2_lib.scala 206:37] + node _T_413 = and(_T_412, _T_322) @[el2_lib.scala 206:42] + node _T_414 = bits(io.trigger_pkt_any[1].tdata2, 13, 13) @[el2_lib.scala 206:75] + node _T_415 = bits(lsu_match_data_1, 13, 13) @[el2_lib.scala 206:87] + node _T_416 = eq(_T_414, _T_415) @[el2_lib.scala 206:79] + node _T_417 = mux(_T_413, UInt<1>("h01"), _T_416) @[el2_lib.scala 206:24] + _T_317[13] <= _T_417 @[el2_lib.scala 206:18] + node _T_418 = bits(io.trigger_pkt_any[1].tdata2, 13, 0) @[el2_lib.scala 206:29] + node _T_419 = andr(_T_418) @[el2_lib.scala 206:37] + node _T_420 = and(_T_419, _T_322) @[el2_lib.scala 206:42] + node _T_421 = bits(io.trigger_pkt_any[1].tdata2, 14, 14) @[el2_lib.scala 206:75] + node _T_422 = bits(lsu_match_data_1, 14, 14) @[el2_lib.scala 206:87] + node _T_423 = eq(_T_421, _T_422) @[el2_lib.scala 206:79] + node _T_424 = mux(_T_420, UInt<1>("h01"), _T_423) @[el2_lib.scala 206:24] + _T_317[14] <= _T_424 @[el2_lib.scala 206:18] + node _T_425 = bits(io.trigger_pkt_any[1].tdata2, 14, 0) @[el2_lib.scala 206:29] + node _T_426 = andr(_T_425) @[el2_lib.scala 206:37] + node _T_427 = and(_T_426, _T_322) @[el2_lib.scala 206:42] + node _T_428 = bits(io.trigger_pkt_any[1].tdata2, 15, 15) @[el2_lib.scala 206:75] + node _T_429 = bits(lsu_match_data_1, 15, 15) @[el2_lib.scala 206:87] + node _T_430 = eq(_T_428, _T_429) @[el2_lib.scala 206:79] + node _T_431 = mux(_T_427, UInt<1>("h01"), _T_430) @[el2_lib.scala 206:24] + _T_317[15] <= _T_431 @[el2_lib.scala 206:18] + node _T_432 = bits(io.trigger_pkt_any[1].tdata2, 15, 0) @[el2_lib.scala 206:29] + node _T_433 = andr(_T_432) @[el2_lib.scala 206:37] + node _T_434 = and(_T_433, _T_322) @[el2_lib.scala 206:42] + node _T_435 = bits(io.trigger_pkt_any[1].tdata2, 16, 16) @[el2_lib.scala 206:75] + node _T_436 = bits(lsu_match_data_1, 16, 16) @[el2_lib.scala 206:87] + node _T_437 = eq(_T_435, _T_436) @[el2_lib.scala 206:79] + node _T_438 = mux(_T_434, UInt<1>("h01"), _T_437) @[el2_lib.scala 206:24] + _T_317[16] <= _T_438 @[el2_lib.scala 206:18] + node _T_439 = bits(io.trigger_pkt_any[1].tdata2, 16, 0) @[el2_lib.scala 206:29] + node _T_440 = andr(_T_439) @[el2_lib.scala 206:37] + node _T_441 = and(_T_440, _T_322) @[el2_lib.scala 206:42] + node _T_442 = bits(io.trigger_pkt_any[1].tdata2, 17, 17) @[el2_lib.scala 206:75] + node _T_443 = bits(lsu_match_data_1, 17, 17) @[el2_lib.scala 206:87] + node _T_444 = eq(_T_442, _T_443) @[el2_lib.scala 206:79] + node _T_445 = mux(_T_441, UInt<1>("h01"), _T_444) @[el2_lib.scala 206:24] + _T_317[17] <= _T_445 @[el2_lib.scala 206:18] + node _T_446 = bits(io.trigger_pkt_any[1].tdata2, 17, 0) @[el2_lib.scala 206:29] + node _T_447 = andr(_T_446) @[el2_lib.scala 206:37] + node _T_448 = and(_T_447, _T_322) @[el2_lib.scala 206:42] + node _T_449 = bits(io.trigger_pkt_any[1].tdata2, 18, 18) @[el2_lib.scala 206:75] + node _T_450 = bits(lsu_match_data_1, 18, 18) @[el2_lib.scala 206:87] + node _T_451 = eq(_T_449, _T_450) @[el2_lib.scala 206:79] + node _T_452 = mux(_T_448, UInt<1>("h01"), _T_451) @[el2_lib.scala 206:24] + _T_317[18] <= _T_452 @[el2_lib.scala 206:18] + node _T_453 = bits(io.trigger_pkt_any[1].tdata2, 18, 0) @[el2_lib.scala 206:29] + node _T_454 = andr(_T_453) @[el2_lib.scala 206:37] + node _T_455 = and(_T_454, _T_322) @[el2_lib.scala 206:42] + node _T_456 = bits(io.trigger_pkt_any[1].tdata2, 19, 19) @[el2_lib.scala 206:75] + node _T_457 = bits(lsu_match_data_1, 19, 19) @[el2_lib.scala 206:87] + node _T_458 = eq(_T_456, _T_457) @[el2_lib.scala 206:79] + node _T_459 = mux(_T_455, UInt<1>("h01"), _T_458) @[el2_lib.scala 206:24] + _T_317[19] <= _T_459 @[el2_lib.scala 206:18] + node _T_460 = bits(io.trigger_pkt_any[1].tdata2, 19, 0) @[el2_lib.scala 206:29] + node _T_461 = andr(_T_460) @[el2_lib.scala 206:37] + node _T_462 = and(_T_461, _T_322) @[el2_lib.scala 206:42] + node _T_463 = bits(io.trigger_pkt_any[1].tdata2, 20, 20) @[el2_lib.scala 206:75] + node _T_464 = bits(lsu_match_data_1, 20, 20) @[el2_lib.scala 206:87] + node _T_465 = eq(_T_463, _T_464) @[el2_lib.scala 206:79] + node _T_466 = mux(_T_462, UInt<1>("h01"), _T_465) @[el2_lib.scala 206:24] + _T_317[20] <= _T_466 @[el2_lib.scala 206:18] + node _T_467 = bits(io.trigger_pkt_any[1].tdata2, 20, 0) @[el2_lib.scala 206:29] + node _T_468 = andr(_T_467) @[el2_lib.scala 206:37] + node _T_469 = and(_T_468, _T_322) @[el2_lib.scala 206:42] + node _T_470 = bits(io.trigger_pkt_any[1].tdata2, 21, 21) @[el2_lib.scala 206:75] + node _T_471 = bits(lsu_match_data_1, 21, 21) @[el2_lib.scala 206:87] + node _T_472 = eq(_T_470, _T_471) @[el2_lib.scala 206:79] + node _T_473 = mux(_T_469, UInt<1>("h01"), _T_472) @[el2_lib.scala 206:24] + _T_317[21] <= _T_473 @[el2_lib.scala 206:18] + node _T_474 = bits(io.trigger_pkt_any[1].tdata2, 21, 0) @[el2_lib.scala 206:29] + node _T_475 = andr(_T_474) @[el2_lib.scala 206:37] + node _T_476 = and(_T_475, _T_322) @[el2_lib.scala 206:42] + node _T_477 = bits(io.trigger_pkt_any[1].tdata2, 22, 22) @[el2_lib.scala 206:75] + node _T_478 = bits(lsu_match_data_1, 22, 22) @[el2_lib.scala 206:87] + node _T_479 = eq(_T_477, _T_478) @[el2_lib.scala 206:79] + node _T_480 = mux(_T_476, UInt<1>("h01"), _T_479) @[el2_lib.scala 206:24] + _T_317[22] <= _T_480 @[el2_lib.scala 206:18] + node _T_481 = bits(io.trigger_pkt_any[1].tdata2, 22, 0) @[el2_lib.scala 206:29] + node _T_482 = andr(_T_481) @[el2_lib.scala 206:37] + node _T_483 = and(_T_482, _T_322) @[el2_lib.scala 206:42] + node _T_484 = bits(io.trigger_pkt_any[1].tdata2, 23, 23) @[el2_lib.scala 206:75] + node _T_485 = bits(lsu_match_data_1, 23, 23) @[el2_lib.scala 206:87] + node _T_486 = eq(_T_484, _T_485) @[el2_lib.scala 206:79] + node _T_487 = mux(_T_483, UInt<1>("h01"), _T_486) @[el2_lib.scala 206:24] + _T_317[23] <= _T_487 @[el2_lib.scala 206:18] + node _T_488 = bits(io.trigger_pkt_any[1].tdata2, 23, 0) @[el2_lib.scala 206:29] + node _T_489 = andr(_T_488) @[el2_lib.scala 206:37] + node _T_490 = and(_T_489, _T_322) @[el2_lib.scala 206:42] + node _T_491 = bits(io.trigger_pkt_any[1].tdata2, 24, 24) @[el2_lib.scala 206:75] + node _T_492 = bits(lsu_match_data_1, 24, 24) @[el2_lib.scala 206:87] + node _T_493 = eq(_T_491, _T_492) @[el2_lib.scala 206:79] + node _T_494 = mux(_T_490, UInt<1>("h01"), _T_493) @[el2_lib.scala 206:24] + _T_317[24] <= _T_494 @[el2_lib.scala 206:18] + node _T_495 = bits(io.trigger_pkt_any[1].tdata2, 24, 0) @[el2_lib.scala 206:29] + node _T_496 = andr(_T_495) @[el2_lib.scala 206:37] + node _T_497 = and(_T_496, _T_322) @[el2_lib.scala 206:42] + node _T_498 = bits(io.trigger_pkt_any[1].tdata2, 25, 25) @[el2_lib.scala 206:75] + node _T_499 = bits(lsu_match_data_1, 25, 25) @[el2_lib.scala 206:87] + node _T_500 = eq(_T_498, _T_499) @[el2_lib.scala 206:79] + node _T_501 = mux(_T_497, UInt<1>("h01"), _T_500) @[el2_lib.scala 206:24] + _T_317[25] <= _T_501 @[el2_lib.scala 206:18] + node _T_502 = bits(io.trigger_pkt_any[1].tdata2, 25, 0) @[el2_lib.scala 206:29] + node _T_503 = andr(_T_502) @[el2_lib.scala 206:37] + node _T_504 = and(_T_503, _T_322) @[el2_lib.scala 206:42] + node _T_505 = bits(io.trigger_pkt_any[1].tdata2, 26, 26) @[el2_lib.scala 206:75] + node _T_506 = bits(lsu_match_data_1, 26, 26) @[el2_lib.scala 206:87] + node _T_507 = eq(_T_505, _T_506) @[el2_lib.scala 206:79] + node _T_508 = mux(_T_504, UInt<1>("h01"), _T_507) @[el2_lib.scala 206:24] + _T_317[26] <= _T_508 @[el2_lib.scala 206:18] + node _T_509 = bits(io.trigger_pkt_any[1].tdata2, 26, 0) @[el2_lib.scala 206:29] + node _T_510 = andr(_T_509) @[el2_lib.scala 206:37] + node _T_511 = and(_T_510, _T_322) @[el2_lib.scala 206:42] + node _T_512 = bits(io.trigger_pkt_any[1].tdata2, 27, 27) @[el2_lib.scala 206:75] + node _T_513 = bits(lsu_match_data_1, 27, 27) @[el2_lib.scala 206:87] + node _T_514 = eq(_T_512, _T_513) @[el2_lib.scala 206:79] + node _T_515 = mux(_T_511, UInt<1>("h01"), _T_514) @[el2_lib.scala 206:24] + _T_317[27] <= _T_515 @[el2_lib.scala 206:18] + node _T_516 = bits(io.trigger_pkt_any[1].tdata2, 27, 0) @[el2_lib.scala 206:29] + node _T_517 = andr(_T_516) @[el2_lib.scala 206:37] + node _T_518 = and(_T_517, _T_322) @[el2_lib.scala 206:42] + node _T_519 = bits(io.trigger_pkt_any[1].tdata2, 28, 28) @[el2_lib.scala 206:75] + node _T_520 = bits(lsu_match_data_1, 28, 28) @[el2_lib.scala 206:87] + node _T_521 = eq(_T_519, _T_520) @[el2_lib.scala 206:79] + node _T_522 = mux(_T_518, UInt<1>("h01"), _T_521) @[el2_lib.scala 206:24] + _T_317[28] <= _T_522 @[el2_lib.scala 206:18] + node _T_523 = bits(io.trigger_pkt_any[1].tdata2, 28, 0) @[el2_lib.scala 206:29] + node _T_524 = andr(_T_523) @[el2_lib.scala 206:37] + node _T_525 = and(_T_524, _T_322) @[el2_lib.scala 206:42] + node _T_526 = bits(io.trigger_pkt_any[1].tdata2, 29, 29) @[el2_lib.scala 206:75] + node _T_527 = bits(lsu_match_data_1, 29, 29) @[el2_lib.scala 206:87] + node _T_528 = eq(_T_526, _T_527) @[el2_lib.scala 206:79] + node _T_529 = mux(_T_525, UInt<1>("h01"), _T_528) @[el2_lib.scala 206:24] + _T_317[29] <= _T_529 @[el2_lib.scala 206:18] + node _T_530 = bits(io.trigger_pkt_any[1].tdata2, 29, 0) @[el2_lib.scala 206:29] + node _T_531 = andr(_T_530) @[el2_lib.scala 206:37] + node _T_532 = and(_T_531, _T_322) @[el2_lib.scala 206:42] + node _T_533 = bits(io.trigger_pkt_any[1].tdata2, 30, 30) @[el2_lib.scala 206:75] + node _T_534 = bits(lsu_match_data_1, 30, 30) @[el2_lib.scala 206:87] + node _T_535 = eq(_T_533, _T_534) @[el2_lib.scala 206:79] + node _T_536 = mux(_T_532, UInt<1>("h01"), _T_535) @[el2_lib.scala 206:24] + _T_317[30] <= _T_536 @[el2_lib.scala 206:18] + node _T_537 = bits(io.trigger_pkt_any[1].tdata2, 30, 0) @[el2_lib.scala 206:29] + node _T_538 = andr(_T_537) @[el2_lib.scala 206:37] + node _T_539 = and(_T_538, _T_322) @[el2_lib.scala 206:42] + node _T_540 = bits(io.trigger_pkt_any[1].tdata2, 31, 31) @[el2_lib.scala 206:75] + node _T_541 = bits(lsu_match_data_1, 31, 31) @[el2_lib.scala 206:87] + node _T_542 = eq(_T_540, _T_541) @[el2_lib.scala 206:79] + node _T_543 = mux(_T_539, UInt<1>("h01"), _T_542) @[el2_lib.scala 206:24] + _T_317[31] <= _T_543 @[el2_lib.scala 206:18] + node _T_544 = cat(_T_317[1], _T_317[0]) @[el2_lib.scala 207:14] + node _T_545 = cat(_T_317[3], _T_317[2]) @[el2_lib.scala 207:14] + node _T_546 = cat(_T_545, _T_544) @[el2_lib.scala 207:14] + node _T_547 = cat(_T_317[5], _T_317[4]) @[el2_lib.scala 207:14] + node _T_548 = cat(_T_317[7], _T_317[6]) @[el2_lib.scala 207:14] + node _T_549 = cat(_T_548, _T_547) @[el2_lib.scala 207:14] + node _T_550 = cat(_T_549, _T_546) @[el2_lib.scala 207:14] + node _T_551 = cat(_T_317[9], _T_317[8]) @[el2_lib.scala 207:14] + node _T_552 = cat(_T_317[11], _T_317[10]) @[el2_lib.scala 207:14] + node _T_553 = cat(_T_552, _T_551) @[el2_lib.scala 207:14] + node _T_554 = cat(_T_317[13], _T_317[12]) @[el2_lib.scala 207:14] + node _T_555 = cat(_T_317[15], _T_317[14]) @[el2_lib.scala 207:14] + node _T_556 = cat(_T_555, _T_554) @[el2_lib.scala 207:14] + node _T_557 = cat(_T_556, _T_553) @[el2_lib.scala 207:14] + node _T_558 = cat(_T_557, _T_550) @[el2_lib.scala 207:14] + node _T_559 = cat(_T_317[17], _T_317[16]) @[el2_lib.scala 207:14] + node _T_560 = cat(_T_317[19], _T_317[18]) @[el2_lib.scala 207:14] + node _T_561 = cat(_T_560, _T_559) @[el2_lib.scala 207:14] + node _T_562 = cat(_T_317[21], _T_317[20]) @[el2_lib.scala 207:14] + node _T_563 = cat(_T_317[23], _T_317[22]) @[el2_lib.scala 207:14] + node _T_564 = cat(_T_563, _T_562) @[el2_lib.scala 207:14] + node _T_565 = cat(_T_564, _T_561) @[el2_lib.scala 207:14] + node _T_566 = cat(_T_317[25], _T_317[24]) @[el2_lib.scala 207:14] + node _T_567 = cat(_T_317[27], _T_317[26]) @[el2_lib.scala 207:14] + node _T_568 = cat(_T_567, _T_566) @[el2_lib.scala 207:14] + node _T_569 = cat(_T_317[29], _T_317[28]) @[el2_lib.scala 207:14] + node _T_570 = cat(_T_317[31], _T_317[30]) @[el2_lib.scala 207:14] + node _T_571 = cat(_T_570, _T_569) @[el2_lib.scala 207:14] + node _T_572 = cat(_T_571, _T_568) @[el2_lib.scala 207:14] + node _T_573 = cat(_T_572, _T_565) @[el2_lib.scala 207:14] + node _T_574 = cat(_T_573, _T_558) @[el2_lib.scala 207:14] + node _T_575 = andr(_T_574) @[el2_lib.scala 207:21] + node _T_576 = and(_T_315, _T_575) @[el2_lsu_trigger.scala 21:87] + node _T_577 = eq(io.lsu_pkt_m.dma, UInt<1>("h00")) @[el2_lsu_trigger.scala 20:71] + node _T_578 = and(io.lsu_pkt_m.valid, _T_577) @[el2_lsu_trigger.scala 20:69] + node _T_579 = and(io.trigger_pkt_any[2].store, io.lsu_pkt_m.store) @[el2_lsu_trigger.scala 20:121] + node _T_580 = and(io.trigger_pkt_any[2].load, io.lsu_pkt_m.load) @[el2_lsu_trigger.scala 21:33] + node _T_581 = eq(io.trigger_pkt_any[2].select, UInt<1>("h00")) @[el2_lsu_trigger.scala 21:55] + node _T_582 = and(_T_580, _T_581) @[el2_lsu_trigger.scala 21:53] + node _T_583 = or(_T_579, _T_582) @[el2_lsu_trigger.scala 20:142] + node _T_584 = and(_T_578, _T_583) @[el2_lsu_trigger.scala 20:89] + node _T_585 = bits(io.trigger_pkt_any[2].match_, 0, 0) @[el2_lsu_trigger.scala 22:106] + wire _T_586 : UInt<1>[32] @[el2_lib.scala 202:24] + node _T_587 = bits(_T_585, 0, 0) @[el2_lib.scala 203:37] + node _T_588 = bits(io.trigger_pkt_any[2].tdata2, 31, 0) @[el2_lib.scala 203:53] + node _T_589 = andr(_T_588) @[el2_lib.scala 203:73] + node _T_590 = not(_T_589) @[el2_lib.scala 203:47] + node _T_591 = and(_T_587, _T_590) @[el2_lib.scala 203:44] + node _T_592 = bits(io.trigger_pkt_any[2].tdata2, 0, 0) @[el2_lib.scala 204:48] + node _T_593 = bits(lsu_match_data_2, 0, 0) @[el2_lib.scala 204:60] + node _T_594 = eq(_T_592, _T_593) @[el2_lib.scala 204:52] + node _T_595 = or(_T_591, _T_594) @[el2_lib.scala 204:41] + _T_586[0] <= _T_595 @[el2_lib.scala 204:18] + node _T_596 = bits(io.trigger_pkt_any[2].tdata2, 0, 0) @[el2_lib.scala 206:29] + node _T_597 = andr(_T_596) @[el2_lib.scala 206:37] + node _T_598 = and(_T_597, _T_591) @[el2_lib.scala 206:42] + node _T_599 = bits(io.trigger_pkt_any[2].tdata2, 1, 1) @[el2_lib.scala 206:75] + node _T_600 = bits(lsu_match_data_2, 1, 1) @[el2_lib.scala 206:87] + node _T_601 = eq(_T_599, _T_600) @[el2_lib.scala 206:79] + node _T_602 = mux(_T_598, UInt<1>("h01"), _T_601) @[el2_lib.scala 206:24] + _T_586[1] <= _T_602 @[el2_lib.scala 206:18] + node _T_603 = bits(io.trigger_pkt_any[2].tdata2, 1, 0) @[el2_lib.scala 206:29] + node _T_604 = andr(_T_603) @[el2_lib.scala 206:37] + node _T_605 = and(_T_604, _T_591) @[el2_lib.scala 206:42] + node _T_606 = bits(io.trigger_pkt_any[2].tdata2, 2, 2) @[el2_lib.scala 206:75] + node _T_607 = bits(lsu_match_data_2, 2, 2) @[el2_lib.scala 206:87] + node _T_608 = eq(_T_606, _T_607) @[el2_lib.scala 206:79] + node _T_609 = mux(_T_605, UInt<1>("h01"), _T_608) @[el2_lib.scala 206:24] + _T_586[2] <= _T_609 @[el2_lib.scala 206:18] + node _T_610 = bits(io.trigger_pkt_any[2].tdata2, 2, 0) @[el2_lib.scala 206:29] + node _T_611 = andr(_T_610) @[el2_lib.scala 206:37] + node _T_612 = and(_T_611, _T_591) @[el2_lib.scala 206:42] + node _T_613 = bits(io.trigger_pkt_any[2].tdata2, 3, 3) @[el2_lib.scala 206:75] + node _T_614 = bits(lsu_match_data_2, 3, 3) @[el2_lib.scala 206:87] + node _T_615 = eq(_T_613, _T_614) @[el2_lib.scala 206:79] + node _T_616 = mux(_T_612, UInt<1>("h01"), _T_615) @[el2_lib.scala 206:24] + _T_586[3] <= _T_616 @[el2_lib.scala 206:18] + node _T_617 = bits(io.trigger_pkt_any[2].tdata2, 3, 0) @[el2_lib.scala 206:29] + node _T_618 = andr(_T_617) @[el2_lib.scala 206:37] + node _T_619 = and(_T_618, _T_591) @[el2_lib.scala 206:42] + node _T_620 = bits(io.trigger_pkt_any[2].tdata2, 4, 4) @[el2_lib.scala 206:75] + node _T_621 = bits(lsu_match_data_2, 4, 4) @[el2_lib.scala 206:87] + node _T_622 = eq(_T_620, _T_621) @[el2_lib.scala 206:79] + node _T_623 = mux(_T_619, UInt<1>("h01"), _T_622) @[el2_lib.scala 206:24] + _T_586[4] <= _T_623 @[el2_lib.scala 206:18] + node _T_624 = bits(io.trigger_pkt_any[2].tdata2, 4, 0) @[el2_lib.scala 206:29] + node _T_625 = andr(_T_624) @[el2_lib.scala 206:37] + node _T_626 = and(_T_625, _T_591) @[el2_lib.scala 206:42] + node _T_627 = bits(io.trigger_pkt_any[2].tdata2, 5, 5) @[el2_lib.scala 206:75] + node _T_628 = bits(lsu_match_data_2, 5, 5) @[el2_lib.scala 206:87] + node _T_629 = eq(_T_627, _T_628) @[el2_lib.scala 206:79] + node _T_630 = mux(_T_626, UInt<1>("h01"), _T_629) @[el2_lib.scala 206:24] + _T_586[5] <= _T_630 @[el2_lib.scala 206:18] + node _T_631 = bits(io.trigger_pkt_any[2].tdata2, 5, 0) @[el2_lib.scala 206:29] + node _T_632 = andr(_T_631) @[el2_lib.scala 206:37] + node _T_633 = and(_T_632, _T_591) @[el2_lib.scala 206:42] + node _T_634 = bits(io.trigger_pkt_any[2].tdata2, 6, 6) @[el2_lib.scala 206:75] + node _T_635 = bits(lsu_match_data_2, 6, 6) @[el2_lib.scala 206:87] + node _T_636 = eq(_T_634, _T_635) @[el2_lib.scala 206:79] + node _T_637 = mux(_T_633, UInt<1>("h01"), _T_636) @[el2_lib.scala 206:24] + _T_586[6] <= _T_637 @[el2_lib.scala 206:18] + node _T_638 = bits(io.trigger_pkt_any[2].tdata2, 6, 0) @[el2_lib.scala 206:29] + node _T_639 = andr(_T_638) @[el2_lib.scala 206:37] + node _T_640 = and(_T_639, _T_591) @[el2_lib.scala 206:42] + node _T_641 = bits(io.trigger_pkt_any[2].tdata2, 7, 7) @[el2_lib.scala 206:75] + node _T_642 = bits(lsu_match_data_2, 7, 7) @[el2_lib.scala 206:87] + node _T_643 = eq(_T_641, _T_642) @[el2_lib.scala 206:79] + node _T_644 = mux(_T_640, UInt<1>("h01"), _T_643) @[el2_lib.scala 206:24] + _T_586[7] <= _T_644 @[el2_lib.scala 206:18] + node _T_645 = bits(io.trigger_pkt_any[2].tdata2, 7, 0) @[el2_lib.scala 206:29] + node _T_646 = andr(_T_645) @[el2_lib.scala 206:37] + node _T_647 = and(_T_646, _T_591) @[el2_lib.scala 206:42] + node _T_648 = bits(io.trigger_pkt_any[2].tdata2, 8, 8) @[el2_lib.scala 206:75] + node _T_649 = bits(lsu_match_data_2, 8, 8) @[el2_lib.scala 206:87] + node _T_650 = eq(_T_648, _T_649) @[el2_lib.scala 206:79] + node _T_651 = mux(_T_647, UInt<1>("h01"), _T_650) @[el2_lib.scala 206:24] + _T_586[8] <= _T_651 @[el2_lib.scala 206:18] + node _T_652 = bits(io.trigger_pkt_any[2].tdata2, 8, 0) @[el2_lib.scala 206:29] + node _T_653 = andr(_T_652) @[el2_lib.scala 206:37] + node _T_654 = and(_T_653, _T_591) @[el2_lib.scala 206:42] + node _T_655 = bits(io.trigger_pkt_any[2].tdata2, 9, 9) @[el2_lib.scala 206:75] + node _T_656 = bits(lsu_match_data_2, 9, 9) @[el2_lib.scala 206:87] + node _T_657 = eq(_T_655, _T_656) @[el2_lib.scala 206:79] + node _T_658 = mux(_T_654, UInt<1>("h01"), _T_657) @[el2_lib.scala 206:24] + _T_586[9] <= _T_658 @[el2_lib.scala 206:18] + node _T_659 = bits(io.trigger_pkt_any[2].tdata2, 9, 0) @[el2_lib.scala 206:29] + node _T_660 = andr(_T_659) @[el2_lib.scala 206:37] + node _T_661 = and(_T_660, _T_591) @[el2_lib.scala 206:42] + node _T_662 = bits(io.trigger_pkt_any[2].tdata2, 10, 10) @[el2_lib.scala 206:75] + node _T_663 = bits(lsu_match_data_2, 10, 10) @[el2_lib.scala 206:87] + node _T_664 = eq(_T_662, _T_663) @[el2_lib.scala 206:79] + node _T_665 = mux(_T_661, UInt<1>("h01"), _T_664) @[el2_lib.scala 206:24] + _T_586[10] <= _T_665 @[el2_lib.scala 206:18] + node _T_666 = bits(io.trigger_pkt_any[2].tdata2, 10, 0) @[el2_lib.scala 206:29] + node _T_667 = andr(_T_666) @[el2_lib.scala 206:37] + node _T_668 = and(_T_667, _T_591) @[el2_lib.scala 206:42] + node _T_669 = bits(io.trigger_pkt_any[2].tdata2, 11, 11) @[el2_lib.scala 206:75] + node _T_670 = bits(lsu_match_data_2, 11, 11) @[el2_lib.scala 206:87] + node _T_671 = eq(_T_669, _T_670) @[el2_lib.scala 206:79] + node _T_672 = mux(_T_668, UInt<1>("h01"), _T_671) @[el2_lib.scala 206:24] + _T_586[11] <= _T_672 @[el2_lib.scala 206:18] + node _T_673 = bits(io.trigger_pkt_any[2].tdata2, 11, 0) @[el2_lib.scala 206:29] + node _T_674 = andr(_T_673) @[el2_lib.scala 206:37] + node _T_675 = and(_T_674, _T_591) @[el2_lib.scala 206:42] + node _T_676 = bits(io.trigger_pkt_any[2].tdata2, 12, 12) @[el2_lib.scala 206:75] + node _T_677 = bits(lsu_match_data_2, 12, 12) @[el2_lib.scala 206:87] + node _T_678 = eq(_T_676, _T_677) @[el2_lib.scala 206:79] + node _T_679 = mux(_T_675, UInt<1>("h01"), _T_678) @[el2_lib.scala 206:24] + _T_586[12] <= _T_679 @[el2_lib.scala 206:18] + node _T_680 = bits(io.trigger_pkt_any[2].tdata2, 12, 0) @[el2_lib.scala 206:29] + node _T_681 = andr(_T_680) @[el2_lib.scala 206:37] + node _T_682 = and(_T_681, _T_591) @[el2_lib.scala 206:42] + node _T_683 = bits(io.trigger_pkt_any[2].tdata2, 13, 13) @[el2_lib.scala 206:75] + node _T_684 = bits(lsu_match_data_2, 13, 13) @[el2_lib.scala 206:87] + node _T_685 = eq(_T_683, _T_684) @[el2_lib.scala 206:79] + node _T_686 = mux(_T_682, UInt<1>("h01"), _T_685) @[el2_lib.scala 206:24] + _T_586[13] <= _T_686 @[el2_lib.scala 206:18] + node _T_687 = bits(io.trigger_pkt_any[2].tdata2, 13, 0) @[el2_lib.scala 206:29] + node _T_688 = andr(_T_687) @[el2_lib.scala 206:37] + node _T_689 = and(_T_688, _T_591) @[el2_lib.scala 206:42] + node _T_690 = bits(io.trigger_pkt_any[2].tdata2, 14, 14) @[el2_lib.scala 206:75] + node _T_691 = bits(lsu_match_data_2, 14, 14) @[el2_lib.scala 206:87] + node _T_692 = eq(_T_690, _T_691) @[el2_lib.scala 206:79] + node _T_693 = mux(_T_689, UInt<1>("h01"), _T_692) @[el2_lib.scala 206:24] + _T_586[14] <= _T_693 @[el2_lib.scala 206:18] + node _T_694 = bits(io.trigger_pkt_any[2].tdata2, 14, 0) @[el2_lib.scala 206:29] + node _T_695 = andr(_T_694) @[el2_lib.scala 206:37] + node _T_696 = and(_T_695, _T_591) @[el2_lib.scala 206:42] + node _T_697 = bits(io.trigger_pkt_any[2].tdata2, 15, 15) @[el2_lib.scala 206:75] + node _T_698 = bits(lsu_match_data_2, 15, 15) @[el2_lib.scala 206:87] + node _T_699 = eq(_T_697, _T_698) @[el2_lib.scala 206:79] + node _T_700 = mux(_T_696, UInt<1>("h01"), _T_699) @[el2_lib.scala 206:24] + _T_586[15] <= _T_700 @[el2_lib.scala 206:18] + node _T_701 = bits(io.trigger_pkt_any[2].tdata2, 15, 0) @[el2_lib.scala 206:29] + node _T_702 = andr(_T_701) @[el2_lib.scala 206:37] + node _T_703 = and(_T_702, _T_591) @[el2_lib.scala 206:42] + node _T_704 = bits(io.trigger_pkt_any[2].tdata2, 16, 16) @[el2_lib.scala 206:75] + node _T_705 = bits(lsu_match_data_2, 16, 16) @[el2_lib.scala 206:87] + node _T_706 = eq(_T_704, _T_705) @[el2_lib.scala 206:79] + node _T_707 = mux(_T_703, UInt<1>("h01"), _T_706) @[el2_lib.scala 206:24] + _T_586[16] <= _T_707 @[el2_lib.scala 206:18] + node _T_708 = bits(io.trigger_pkt_any[2].tdata2, 16, 0) @[el2_lib.scala 206:29] + node _T_709 = andr(_T_708) @[el2_lib.scala 206:37] + node _T_710 = and(_T_709, _T_591) @[el2_lib.scala 206:42] + node _T_711 = bits(io.trigger_pkt_any[2].tdata2, 17, 17) @[el2_lib.scala 206:75] + node _T_712 = bits(lsu_match_data_2, 17, 17) @[el2_lib.scala 206:87] + node _T_713 = eq(_T_711, _T_712) @[el2_lib.scala 206:79] + node _T_714 = mux(_T_710, UInt<1>("h01"), _T_713) @[el2_lib.scala 206:24] + _T_586[17] <= _T_714 @[el2_lib.scala 206:18] + node _T_715 = bits(io.trigger_pkt_any[2].tdata2, 17, 0) @[el2_lib.scala 206:29] + node _T_716 = andr(_T_715) @[el2_lib.scala 206:37] + node _T_717 = and(_T_716, _T_591) @[el2_lib.scala 206:42] + node _T_718 = bits(io.trigger_pkt_any[2].tdata2, 18, 18) @[el2_lib.scala 206:75] + node _T_719 = bits(lsu_match_data_2, 18, 18) @[el2_lib.scala 206:87] + node _T_720 = eq(_T_718, _T_719) @[el2_lib.scala 206:79] + node _T_721 = mux(_T_717, UInt<1>("h01"), _T_720) @[el2_lib.scala 206:24] + _T_586[18] <= _T_721 @[el2_lib.scala 206:18] + node _T_722 = bits(io.trigger_pkt_any[2].tdata2, 18, 0) @[el2_lib.scala 206:29] + node _T_723 = andr(_T_722) @[el2_lib.scala 206:37] + node _T_724 = and(_T_723, _T_591) @[el2_lib.scala 206:42] + node _T_725 = bits(io.trigger_pkt_any[2].tdata2, 19, 19) @[el2_lib.scala 206:75] + node _T_726 = bits(lsu_match_data_2, 19, 19) @[el2_lib.scala 206:87] + node _T_727 = eq(_T_725, _T_726) @[el2_lib.scala 206:79] + node _T_728 = mux(_T_724, UInt<1>("h01"), _T_727) @[el2_lib.scala 206:24] + _T_586[19] <= _T_728 @[el2_lib.scala 206:18] + node _T_729 = bits(io.trigger_pkt_any[2].tdata2, 19, 0) @[el2_lib.scala 206:29] + node _T_730 = andr(_T_729) @[el2_lib.scala 206:37] + node _T_731 = and(_T_730, _T_591) @[el2_lib.scala 206:42] + node _T_732 = bits(io.trigger_pkt_any[2].tdata2, 20, 20) @[el2_lib.scala 206:75] + node _T_733 = bits(lsu_match_data_2, 20, 20) @[el2_lib.scala 206:87] + node _T_734 = eq(_T_732, _T_733) @[el2_lib.scala 206:79] + node _T_735 = mux(_T_731, UInt<1>("h01"), _T_734) @[el2_lib.scala 206:24] + _T_586[20] <= _T_735 @[el2_lib.scala 206:18] + node _T_736 = bits(io.trigger_pkt_any[2].tdata2, 20, 0) @[el2_lib.scala 206:29] + node _T_737 = andr(_T_736) @[el2_lib.scala 206:37] + node _T_738 = and(_T_737, _T_591) @[el2_lib.scala 206:42] + node _T_739 = bits(io.trigger_pkt_any[2].tdata2, 21, 21) @[el2_lib.scala 206:75] + node _T_740 = bits(lsu_match_data_2, 21, 21) @[el2_lib.scala 206:87] + node _T_741 = eq(_T_739, _T_740) @[el2_lib.scala 206:79] + node _T_742 = mux(_T_738, UInt<1>("h01"), _T_741) @[el2_lib.scala 206:24] + _T_586[21] <= _T_742 @[el2_lib.scala 206:18] + node _T_743 = bits(io.trigger_pkt_any[2].tdata2, 21, 0) @[el2_lib.scala 206:29] + node _T_744 = andr(_T_743) @[el2_lib.scala 206:37] + node _T_745 = and(_T_744, _T_591) @[el2_lib.scala 206:42] + node _T_746 = bits(io.trigger_pkt_any[2].tdata2, 22, 22) @[el2_lib.scala 206:75] + node _T_747 = bits(lsu_match_data_2, 22, 22) @[el2_lib.scala 206:87] + node _T_748 = eq(_T_746, _T_747) @[el2_lib.scala 206:79] + node _T_749 = mux(_T_745, UInt<1>("h01"), _T_748) @[el2_lib.scala 206:24] + _T_586[22] <= _T_749 @[el2_lib.scala 206:18] + node _T_750 = bits(io.trigger_pkt_any[2].tdata2, 22, 0) @[el2_lib.scala 206:29] + node _T_751 = andr(_T_750) @[el2_lib.scala 206:37] + node _T_752 = and(_T_751, _T_591) @[el2_lib.scala 206:42] + node _T_753 = bits(io.trigger_pkt_any[2].tdata2, 23, 23) @[el2_lib.scala 206:75] + node _T_754 = bits(lsu_match_data_2, 23, 23) @[el2_lib.scala 206:87] + node _T_755 = eq(_T_753, _T_754) @[el2_lib.scala 206:79] + node _T_756 = mux(_T_752, UInt<1>("h01"), _T_755) @[el2_lib.scala 206:24] + _T_586[23] <= _T_756 @[el2_lib.scala 206:18] + node _T_757 = bits(io.trigger_pkt_any[2].tdata2, 23, 0) @[el2_lib.scala 206:29] + node _T_758 = andr(_T_757) @[el2_lib.scala 206:37] + node _T_759 = and(_T_758, _T_591) @[el2_lib.scala 206:42] + node _T_760 = bits(io.trigger_pkt_any[2].tdata2, 24, 24) @[el2_lib.scala 206:75] + node _T_761 = bits(lsu_match_data_2, 24, 24) @[el2_lib.scala 206:87] + node _T_762 = eq(_T_760, _T_761) @[el2_lib.scala 206:79] + node _T_763 = mux(_T_759, UInt<1>("h01"), _T_762) @[el2_lib.scala 206:24] + _T_586[24] <= _T_763 @[el2_lib.scala 206:18] + node _T_764 = bits(io.trigger_pkt_any[2].tdata2, 24, 0) @[el2_lib.scala 206:29] + node _T_765 = andr(_T_764) @[el2_lib.scala 206:37] + node _T_766 = and(_T_765, _T_591) @[el2_lib.scala 206:42] + node _T_767 = bits(io.trigger_pkt_any[2].tdata2, 25, 25) @[el2_lib.scala 206:75] + node _T_768 = bits(lsu_match_data_2, 25, 25) @[el2_lib.scala 206:87] + node _T_769 = eq(_T_767, _T_768) @[el2_lib.scala 206:79] + node _T_770 = mux(_T_766, UInt<1>("h01"), _T_769) @[el2_lib.scala 206:24] + _T_586[25] <= _T_770 @[el2_lib.scala 206:18] + node _T_771 = bits(io.trigger_pkt_any[2].tdata2, 25, 0) @[el2_lib.scala 206:29] + node _T_772 = andr(_T_771) @[el2_lib.scala 206:37] + node _T_773 = and(_T_772, _T_591) @[el2_lib.scala 206:42] + node _T_774 = bits(io.trigger_pkt_any[2].tdata2, 26, 26) @[el2_lib.scala 206:75] + node _T_775 = bits(lsu_match_data_2, 26, 26) @[el2_lib.scala 206:87] + node _T_776 = eq(_T_774, _T_775) @[el2_lib.scala 206:79] + node _T_777 = mux(_T_773, UInt<1>("h01"), _T_776) @[el2_lib.scala 206:24] + _T_586[26] <= _T_777 @[el2_lib.scala 206:18] + node _T_778 = bits(io.trigger_pkt_any[2].tdata2, 26, 0) @[el2_lib.scala 206:29] + node _T_779 = andr(_T_778) @[el2_lib.scala 206:37] + node _T_780 = and(_T_779, _T_591) @[el2_lib.scala 206:42] + node _T_781 = bits(io.trigger_pkt_any[2].tdata2, 27, 27) @[el2_lib.scala 206:75] + node _T_782 = bits(lsu_match_data_2, 27, 27) @[el2_lib.scala 206:87] + node _T_783 = eq(_T_781, _T_782) @[el2_lib.scala 206:79] + node _T_784 = mux(_T_780, UInt<1>("h01"), _T_783) @[el2_lib.scala 206:24] + _T_586[27] <= _T_784 @[el2_lib.scala 206:18] + node _T_785 = bits(io.trigger_pkt_any[2].tdata2, 27, 0) @[el2_lib.scala 206:29] + node _T_786 = andr(_T_785) @[el2_lib.scala 206:37] + node _T_787 = and(_T_786, _T_591) @[el2_lib.scala 206:42] + node _T_788 = bits(io.trigger_pkt_any[2].tdata2, 28, 28) @[el2_lib.scala 206:75] + node _T_789 = bits(lsu_match_data_2, 28, 28) @[el2_lib.scala 206:87] + node _T_790 = eq(_T_788, _T_789) @[el2_lib.scala 206:79] + node _T_791 = mux(_T_787, UInt<1>("h01"), _T_790) @[el2_lib.scala 206:24] + _T_586[28] <= _T_791 @[el2_lib.scala 206:18] + node _T_792 = bits(io.trigger_pkt_any[2].tdata2, 28, 0) @[el2_lib.scala 206:29] + node _T_793 = andr(_T_792) @[el2_lib.scala 206:37] + node _T_794 = and(_T_793, _T_591) @[el2_lib.scala 206:42] + node _T_795 = bits(io.trigger_pkt_any[2].tdata2, 29, 29) @[el2_lib.scala 206:75] + node _T_796 = bits(lsu_match_data_2, 29, 29) @[el2_lib.scala 206:87] + node _T_797 = eq(_T_795, _T_796) @[el2_lib.scala 206:79] + node _T_798 = mux(_T_794, UInt<1>("h01"), _T_797) @[el2_lib.scala 206:24] + _T_586[29] <= _T_798 @[el2_lib.scala 206:18] + node _T_799 = bits(io.trigger_pkt_any[2].tdata2, 29, 0) @[el2_lib.scala 206:29] + node _T_800 = andr(_T_799) @[el2_lib.scala 206:37] + node _T_801 = and(_T_800, _T_591) @[el2_lib.scala 206:42] + node _T_802 = bits(io.trigger_pkt_any[2].tdata2, 30, 30) @[el2_lib.scala 206:75] + node _T_803 = bits(lsu_match_data_2, 30, 30) @[el2_lib.scala 206:87] + node _T_804 = eq(_T_802, _T_803) @[el2_lib.scala 206:79] + node _T_805 = mux(_T_801, UInt<1>("h01"), _T_804) @[el2_lib.scala 206:24] + _T_586[30] <= _T_805 @[el2_lib.scala 206:18] + node _T_806 = bits(io.trigger_pkt_any[2].tdata2, 30, 0) @[el2_lib.scala 206:29] + node _T_807 = andr(_T_806) @[el2_lib.scala 206:37] + node _T_808 = and(_T_807, _T_591) @[el2_lib.scala 206:42] + node _T_809 = bits(io.trigger_pkt_any[2].tdata2, 31, 31) @[el2_lib.scala 206:75] + node _T_810 = bits(lsu_match_data_2, 31, 31) @[el2_lib.scala 206:87] + node _T_811 = eq(_T_809, _T_810) @[el2_lib.scala 206:79] + node _T_812 = mux(_T_808, UInt<1>("h01"), _T_811) @[el2_lib.scala 206:24] + _T_586[31] <= _T_812 @[el2_lib.scala 206:18] + node _T_813 = cat(_T_586[1], _T_586[0]) @[el2_lib.scala 207:14] + node _T_814 = cat(_T_586[3], _T_586[2]) @[el2_lib.scala 207:14] + node _T_815 = cat(_T_814, _T_813) @[el2_lib.scala 207:14] + node _T_816 = cat(_T_586[5], _T_586[4]) @[el2_lib.scala 207:14] + node _T_817 = cat(_T_586[7], _T_586[6]) @[el2_lib.scala 207:14] + node _T_818 = cat(_T_817, _T_816) @[el2_lib.scala 207:14] + node _T_819 = cat(_T_818, _T_815) @[el2_lib.scala 207:14] + node _T_820 = cat(_T_586[9], _T_586[8]) @[el2_lib.scala 207:14] + node _T_821 = cat(_T_586[11], _T_586[10]) @[el2_lib.scala 207:14] + node _T_822 = cat(_T_821, _T_820) @[el2_lib.scala 207:14] + node _T_823 = cat(_T_586[13], _T_586[12]) @[el2_lib.scala 207:14] + node _T_824 = cat(_T_586[15], _T_586[14]) @[el2_lib.scala 207:14] + node _T_825 = cat(_T_824, _T_823) @[el2_lib.scala 207:14] + node _T_826 = cat(_T_825, _T_822) @[el2_lib.scala 207:14] + node _T_827 = cat(_T_826, _T_819) @[el2_lib.scala 207:14] + node _T_828 = cat(_T_586[17], _T_586[16]) @[el2_lib.scala 207:14] + node _T_829 = cat(_T_586[19], _T_586[18]) @[el2_lib.scala 207:14] + node _T_830 = cat(_T_829, _T_828) @[el2_lib.scala 207:14] + node _T_831 = cat(_T_586[21], _T_586[20]) @[el2_lib.scala 207:14] + node _T_832 = cat(_T_586[23], _T_586[22]) @[el2_lib.scala 207:14] + node _T_833 = cat(_T_832, _T_831) @[el2_lib.scala 207:14] + node _T_834 = cat(_T_833, _T_830) @[el2_lib.scala 207:14] + node _T_835 = cat(_T_586[25], _T_586[24]) @[el2_lib.scala 207:14] + node _T_836 = cat(_T_586[27], _T_586[26]) @[el2_lib.scala 207:14] + node _T_837 = cat(_T_836, _T_835) @[el2_lib.scala 207:14] + node _T_838 = cat(_T_586[29], _T_586[28]) @[el2_lib.scala 207:14] + node _T_839 = cat(_T_586[31], _T_586[30]) @[el2_lib.scala 207:14] + node _T_840 = cat(_T_839, _T_838) @[el2_lib.scala 207:14] + node _T_841 = cat(_T_840, _T_837) @[el2_lib.scala 207:14] + node _T_842 = cat(_T_841, _T_834) @[el2_lib.scala 207:14] + node _T_843 = cat(_T_842, _T_827) @[el2_lib.scala 207:14] + node _T_844 = andr(_T_843) @[el2_lib.scala 207:21] + node _T_845 = and(_T_584, _T_844) @[el2_lsu_trigger.scala 21:87] + node _T_846 = eq(io.lsu_pkt_m.dma, UInt<1>("h00")) @[el2_lsu_trigger.scala 20:71] + node _T_847 = and(io.lsu_pkt_m.valid, _T_846) @[el2_lsu_trigger.scala 20:69] + node _T_848 = and(io.trigger_pkt_any[3].store, io.lsu_pkt_m.store) @[el2_lsu_trigger.scala 20:121] + node _T_849 = and(io.trigger_pkt_any[3].load, io.lsu_pkt_m.load) @[el2_lsu_trigger.scala 21:33] + node _T_850 = eq(io.trigger_pkt_any[3].select, UInt<1>("h00")) @[el2_lsu_trigger.scala 21:55] + node _T_851 = and(_T_849, _T_850) @[el2_lsu_trigger.scala 21:53] + node _T_852 = or(_T_848, _T_851) @[el2_lsu_trigger.scala 20:142] + node _T_853 = and(_T_847, _T_852) @[el2_lsu_trigger.scala 20:89] + node _T_854 = bits(io.trigger_pkt_any[3].match_, 0, 0) @[el2_lsu_trigger.scala 22:106] + wire _T_855 : UInt<1>[32] @[el2_lib.scala 202:24] + node _T_856 = bits(_T_854, 0, 0) @[el2_lib.scala 203:37] + node _T_857 = bits(io.trigger_pkt_any[3].tdata2, 31, 0) @[el2_lib.scala 203:53] + node _T_858 = andr(_T_857) @[el2_lib.scala 203:73] + node _T_859 = not(_T_858) @[el2_lib.scala 203:47] + node _T_860 = and(_T_856, _T_859) @[el2_lib.scala 203:44] + node _T_861 = bits(io.trigger_pkt_any[3].tdata2, 0, 0) @[el2_lib.scala 204:48] + node _T_862 = bits(lsu_match_data_3, 0, 0) @[el2_lib.scala 204:60] + node _T_863 = eq(_T_861, _T_862) @[el2_lib.scala 204:52] + node _T_864 = or(_T_860, _T_863) @[el2_lib.scala 204:41] + _T_855[0] <= _T_864 @[el2_lib.scala 204:18] + node _T_865 = bits(io.trigger_pkt_any[3].tdata2, 0, 0) @[el2_lib.scala 206:29] + node _T_866 = andr(_T_865) @[el2_lib.scala 206:37] + node _T_867 = and(_T_866, _T_860) @[el2_lib.scala 206:42] + node _T_868 = bits(io.trigger_pkt_any[3].tdata2, 1, 1) @[el2_lib.scala 206:75] + node _T_869 = bits(lsu_match_data_3, 1, 1) @[el2_lib.scala 206:87] + node _T_870 = eq(_T_868, _T_869) @[el2_lib.scala 206:79] + node _T_871 = mux(_T_867, UInt<1>("h01"), _T_870) @[el2_lib.scala 206:24] + _T_855[1] <= _T_871 @[el2_lib.scala 206:18] + node _T_872 = bits(io.trigger_pkt_any[3].tdata2, 1, 0) @[el2_lib.scala 206:29] + node _T_873 = andr(_T_872) @[el2_lib.scala 206:37] + node _T_874 = and(_T_873, _T_860) @[el2_lib.scala 206:42] + node _T_875 = bits(io.trigger_pkt_any[3].tdata2, 2, 2) @[el2_lib.scala 206:75] + node _T_876 = bits(lsu_match_data_3, 2, 2) @[el2_lib.scala 206:87] + node _T_877 = eq(_T_875, _T_876) @[el2_lib.scala 206:79] + node _T_878 = mux(_T_874, UInt<1>("h01"), _T_877) @[el2_lib.scala 206:24] + _T_855[2] <= _T_878 @[el2_lib.scala 206:18] + node _T_879 = bits(io.trigger_pkt_any[3].tdata2, 2, 0) @[el2_lib.scala 206:29] + node _T_880 = andr(_T_879) @[el2_lib.scala 206:37] + node _T_881 = and(_T_880, _T_860) @[el2_lib.scala 206:42] + node _T_882 = bits(io.trigger_pkt_any[3].tdata2, 3, 3) @[el2_lib.scala 206:75] + node _T_883 = bits(lsu_match_data_3, 3, 3) @[el2_lib.scala 206:87] + node _T_884 = eq(_T_882, _T_883) @[el2_lib.scala 206:79] + node _T_885 = mux(_T_881, UInt<1>("h01"), _T_884) @[el2_lib.scala 206:24] + _T_855[3] <= _T_885 @[el2_lib.scala 206:18] + node _T_886 = bits(io.trigger_pkt_any[3].tdata2, 3, 0) @[el2_lib.scala 206:29] + node _T_887 = andr(_T_886) @[el2_lib.scala 206:37] + node _T_888 = and(_T_887, _T_860) @[el2_lib.scala 206:42] + node _T_889 = bits(io.trigger_pkt_any[3].tdata2, 4, 4) @[el2_lib.scala 206:75] + node _T_890 = bits(lsu_match_data_3, 4, 4) @[el2_lib.scala 206:87] + node _T_891 = eq(_T_889, _T_890) @[el2_lib.scala 206:79] + node _T_892 = mux(_T_888, UInt<1>("h01"), _T_891) @[el2_lib.scala 206:24] + _T_855[4] <= _T_892 @[el2_lib.scala 206:18] + node _T_893 = bits(io.trigger_pkt_any[3].tdata2, 4, 0) @[el2_lib.scala 206:29] + node _T_894 = andr(_T_893) @[el2_lib.scala 206:37] + node _T_895 = and(_T_894, _T_860) @[el2_lib.scala 206:42] + node _T_896 = bits(io.trigger_pkt_any[3].tdata2, 5, 5) @[el2_lib.scala 206:75] + node _T_897 = bits(lsu_match_data_3, 5, 5) @[el2_lib.scala 206:87] + node _T_898 = eq(_T_896, _T_897) @[el2_lib.scala 206:79] + node _T_899 = mux(_T_895, UInt<1>("h01"), _T_898) @[el2_lib.scala 206:24] + _T_855[5] <= _T_899 @[el2_lib.scala 206:18] + node _T_900 = bits(io.trigger_pkt_any[3].tdata2, 5, 0) @[el2_lib.scala 206:29] + node _T_901 = andr(_T_900) @[el2_lib.scala 206:37] + node _T_902 = and(_T_901, _T_860) @[el2_lib.scala 206:42] + node _T_903 = bits(io.trigger_pkt_any[3].tdata2, 6, 6) @[el2_lib.scala 206:75] + node _T_904 = bits(lsu_match_data_3, 6, 6) @[el2_lib.scala 206:87] + node _T_905 = eq(_T_903, _T_904) @[el2_lib.scala 206:79] + node _T_906 = mux(_T_902, UInt<1>("h01"), _T_905) @[el2_lib.scala 206:24] + _T_855[6] <= _T_906 @[el2_lib.scala 206:18] + node _T_907 = bits(io.trigger_pkt_any[3].tdata2, 6, 0) @[el2_lib.scala 206:29] + node _T_908 = andr(_T_907) @[el2_lib.scala 206:37] + node _T_909 = and(_T_908, _T_860) @[el2_lib.scala 206:42] + node _T_910 = bits(io.trigger_pkt_any[3].tdata2, 7, 7) @[el2_lib.scala 206:75] + node _T_911 = bits(lsu_match_data_3, 7, 7) @[el2_lib.scala 206:87] + node _T_912 = eq(_T_910, _T_911) @[el2_lib.scala 206:79] + node _T_913 = mux(_T_909, UInt<1>("h01"), _T_912) @[el2_lib.scala 206:24] + _T_855[7] <= _T_913 @[el2_lib.scala 206:18] + node _T_914 = bits(io.trigger_pkt_any[3].tdata2, 7, 0) @[el2_lib.scala 206:29] + node _T_915 = andr(_T_914) @[el2_lib.scala 206:37] + node _T_916 = and(_T_915, _T_860) @[el2_lib.scala 206:42] + node _T_917 = bits(io.trigger_pkt_any[3].tdata2, 8, 8) @[el2_lib.scala 206:75] + node _T_918 = bits(lsu_match_data_3, 8, 8) @[el2_lib.scala 206:87] + node _T_919 = eq(_T_917, _T_918) @[el2_lib.scala 206:79] + node _T_920 = mux(_T_916, UInt<1>("h01"), _T_919) @[el2_lib.scala 206:24] + _T_855[8] <= _T_920 @[el2_lib.scala 206:18] + node _T_921 = bits(io.trigger_pkt_any[3].tdata2, 8, 0) @[el2_lib.scala 206:29] + node _T_922 = andr(_T_921) @[el2_lib.scala 206:37] + node _T_923 = and(_T_922, _T_860) @[el2_lib.scala 206:42] + node _T_924 = bits(io.trigger_pkt_any[3].tdata2, 9, 9) @[el2_lib.scala 206:75] + node _T_925 = bits(lsu_match_data_3, 9, 9) @[el2_lib.scala 206:87] + node _T_926 = eq(_T_924, _T_925) @[el2_lib.scala 206:79] + node _T_927 = mux(_T_923, UInt<1>("h01"), _T_926) @[el2_lib.scala 206:24] + _T_855[9] <= _T_927 @[el2_lib.scala 206:18] + node _T_928 = bits(io.trigger_pkt_any[3].tdata2, 9, 0) @[el2_lib.scala 206:29] + node _T_929 = andr(_T_928) @[el2_lib.scala 206:37] + node _T_930 = and(_T_929, _T_860) @[el2_lib.scala 206:42] + node _T_931 = bits(io.trigger_pkt_any[3].tdata2, 10, 10) @[el2_lib.scala 206:75] + node _T_932 = bits(lsu_match_data_3, 10, 10) @[el2_lib.scala 206:87] + node _T_933 = eq(_T_931, _T_932) @[el2_lib.scala 206:79] + node _T_934 = mux(_T_930, UInt<1>("h01"), _T_933) @[el2_lib.scala 206:24] + _T_855[10] <= _T_934 @[el2_lib.scala 206:18] + node _T_935 = bits(io.trigger_pkt_any[3].tdata2, 10, 0) @[el2_lib.scala 206:29] + node _T_936 = andr(_T_935) @[el2_lib.scala 206:37] + node _T_937 = and(_T_936, _T_860) @[el2_lib.scala 206:42] + node _T_938 = bits(io.trigger_pkt_any[3].tdata2, 11, 11) @[el2_lib.scala 206:75] + node _T_939 = bits(lsu_match_data_3, 11, 11) @[el2_lib.scala 206:87] + node _T_940 = eq(_T_938, _T_939) @[el2_lib.scala 206:79] + node _T_941 = mux(_T_937, UInt<1>("h01"), _T_940) @[el2_lib.scala 206:24] + _T_855[11] <= _T_941 @[el2_lib.scala 206:18] + node _T_942 = bits(io.trigger_pkt_any[3].tdata2, 11, 0) @[el2_lib.scala 206:29] + node _T_943 = andr(_T_942) @[el2_lib.scala 206:37] + node _T_944 = and(_T_943, _T_860) @[el2_lib.scala 206:42] + node _T_945 = bits(io.trigger_pkt_any[3].tdata2, 12, 12) @[el2_lib.scala 206:75] + node _T_946 = bits(lsu_match_data_3, 12, 12) @[el2_lib.scala 206:87] + node _T_947 = eq(_T_945, _T_946) @[el2_lib.scala 206:79] + node _T_948 = mux(_T_944, UInt<1>("h01"), _T_947) @[el2_lib.scala 206:24] + _T_855[12] <= _T_948 @[el2_lib.scala 206:18] + node _T_949 = bits(io.trigger_pkt_any[3].tdata2, 12, 0) @[el2_lib.scala 206:29] + node _T_950 = andr(_T_949) @[el2_lib.scala 206:37] + node _T_951 = and(_T_950, _T_860) @[el2_lib.scala 206:42] + node _T_952 = bits(io.trigger_pkt_any[3].tdata2, 13, 13) @[el2_lib.scala 206:75] + node _T_953 = bits(lsu_match_data_3, 13, 13) @[el2_lib.scala 206:87] + node _T_954 = eq(_T_952, _T_953) @[el2_lib.scala 206:79] + node _T_955 = mux(_T_951, UInt<1>("h01"), _T_954) @[el2_lib.scala 206:24] + _T_855[13] <= _T_955 @[el2_lib.scala 206:18] + node _T_956 = bits(io.trigger_pkt_any[3].tdata2, 13, 0) @[el2_lib.scala 206:29] + node _T_957 = andr(_T_956) @[el2_lib.scala 206:37] + node _T_958 = and(_T_957, _T_860) @[el2_lib.scala 206:42] + node _T_959 = bits(io.trigger_pkt_any[3].tdata2, 14, 14) @[el2_lib.scala 206:75] + node _T_960 = bits(lsu_match_data_3, 14, 14) @[el2_lib.scala 206:87] + node _T_961 = eq(_T_959, _T_960) @[el2_lib.scala 206:79] + node _T_962 = mux(_T_958, UInt<1>("h01"), _T_961) @[el2_lib.scala 206:24] + _T_855[14] <= _T_962 @[el2_lib.scala 206:18] + node _T_963 = bits(io.trigger_pkt_any[3].tdata2, 14, 0) @[el2_lib.scala 206:29] + node _T_964 = andr(_T_963) @[el2_lib.scala 206:37] + node _T_965 = and(_T_964, _T_860) @[el2_lib.scala 206:42] + node _T_966 = bits(io.trigger_pkt_any[3].tdata2, 15, 15) @[el2_lib.scala 206:75] + node _T_967 = bits(lsu_match_data_3, 15, 15) @[el2_lib.scala 206:87] + node _T_968 = eq(_T_966, _T_967) @[el2_lib.scala 206:79] + node _T_969 = mux(_T_965, UInt<1>("h01"), _T_968) @[el2_lib.scala 206:24] + _T_855[15] <= _T_969 @[el2_lib.scala 206:18] + node _T_970 = bits(io.trigger_pkt_any[3].tdata2, 15, 0) @[el2_lib.scala 206:29] + node _T_971 = andr(_T_970) @[el2_lib.scala 206:37] + node _T_972 = and(_T_971, _T_860) @[el2_lib.scala 206:42] + node _T_973 = bits(io.trigger_pkt_any[3].tdata2, 16, 16) @[el2_lib.scala 206:75] + node _T_974 = bits(lsu_match_data_3, 16, 16) @[el2_lib.scala 206:87] + node _T_975 = eq(_T_973, _T_974) @[el2_lib.scala 206:79] + node _T_976 = mux(_T_972, UInt<1>("h01"), _T_975) @[el2_lib.scala 206:24] + _T_855[16] <= _T_976 @[el2_lib.scala 206:18] + node _T_977 = bits(io.trigger_pkt_any[3].tdata2, 16, 0) @[el2_lib.scala 206:29] + node _T_978 = andr(_T_977) @[el2_lib.scala 206:37] + node _T_979 = and(_T_978, _T_860) @[el2_lib.scala 206:42] + node _T_980 = bits(io.trigger_pkt_any[3].tdata2, 17, 17) @[el2_lib.scala 206:75] + node _T_981 = bits(lsu_match_data_3, 17, 17) @[el2_lib.scala 206:87] + node _T_982 = eq(_T_980, _T_981) @[el2_lib.scala 206:79] + node _T_983 = mux(_T_979, UInt<1>("h01"), _T_982) @[el2_lib.scala 206:24] + _T_855[17] <= _T_983 @[el2_lib.scala 206:18] + node _T_984 = bits(io.trigger_pkt_any[3].tdata2, 17, 0) @[el2_lib.scala 206:29] + node _T_985 = andr(_T_984) @[el2_lib.scala 206:37] + node _T_986 = and(_T_985, _T_860) @[el2_lib.scala 206:42] + node _T_987 = bits(io.trigger_pkt_any[3].tdata2, 18, 18) @[el2_lib.scala 206:75] + node _T_988 = bits(lsu_match_data_3, 18, 18) @[el2_lib.scala 206:87] + node _T_989 = eq(_T_987, _T_988) @[el2_lib.scala 206:79] + node _T_990 = mux(_T_986, UInt<1>("h01"), _T_989) @[el2_lib.scala 206:24] + _T_855[18] <= _T_990 @[el2_lib.scala 206:18] + node _T_991 = bits(io.trigger_pkt_any[3].tdata2, 18, 0) @[el2_lib.scala 206:29] + node _T_992 = andr(_T_991) @[el2_lib.scala 206:37] + node _T_993 = and(_T_992, _T_860) @[el2_lib.scala 206:42] + node _T_994 = bits(io.trigger_pkt_any[3].tdata2, 19, 19) @[el2_lib.scala 206:75] + node _T_995 = bits(lsu_match_data_3, 19, 19) @[el2_lib.scala 206:87] + node _T_996 = eq(_T_994, _T_995) @[el2_lib.scala 206:79] + node _T_997 = mux(_T_993, UInt<1>("h01"), _T_996) @[el2_lib.scala 206:24] + _T_855[19] <= _T_997 @[el2_lib.scala 206:18] + node _T_998 = bits(io.trigger_pkt_any[3].tdata2, 19, 0) @[el2_lib.scala 206:29] + node _T_999 = andr(_T_998) @[el2_lib.scala 206:37] + node _T_1000 = and(_T_999, _T_860) @[el2_lib.scala 206:42] + node _T_1001 = bits(io.trigger_pkt_any[3].tdata2, 20, 20) @[el2_lib.scala 206:75] + node _T_1002 = bits(lsu_match_data_3, 20, 20) @[el2_lib.scala 206:87] + node _T_1003 = eq(_T_1001, _T_1002) @[el2_lib.scala 206:79] + node _T_1004 = mux(_T_1000, UInt<1>("h01"), _T_1003) @[el2_lib.scala 206:24] + _T_855[20] <= _T_1004 @[el2_lib.scala 206:18] + node _T_1005 = bits(io.trigger_pkt_any[3].tdata2, 20, 0) @[el2_lib.scala 206:29] + node _T_1006 = andr(_T_1005) @[el2_lib.scala 206:37] + node _T_1007 = and(_T_1006, _T_860) @[el2_lib.scala 206:42] + node _T_1008 = bits(io.trigger_pkt_any[3].tdata2, 21, 21) @[el2_lib.scala 206:75] + node _T_1009 = bits(lsu_match_data_3, 21, 21) @[el2_lib.scala 206:87] + node _T_1010 = eq(_T_1008, _T_1009) @[el2_lib.scala 206:79] + node _T_1011 = mux(_T_1007, UInt<1>("h01"), _T_1010) @[el2_lib.scala 206:24] + _T_855[21] <= _T_1011 @[el2_lib.scala 206:18] + node _T_1012 = bits(io.trigger_pkt_any[3].tdata2, 21, 0) @[el2_lib.scala 206:29] + node _T_1013 = andr(_T_1012) @[el2_lib.scala 206:37] + node _T_1014 = and(_T_1013, _T_860) @[el2_lib.scala 206:42] + node _T_1015 = bits(io.trigger_pkt_any[3].tdata2, 22, 22) @[el2_lib.scala 206:75] + node _T_1016 = bits(lsu_match_data_3, 22, 22) @[el2_lib.scala 206:87] + node _T_1017 = eq(_T_1015, _T_1016) @[el2_lib.scala 206:79] + node _T_1018 = mux(_T_1014, UInt<1>("h01"), _T_1017) @[el2_lib.scala 206:24] + _T_855[22] <= _T_1018 @[el2_lib.scala 206:18] + node _T_1019 = bits(io.trigger_pkt_any[3].tdata2, 22, 0) @[el2_lib.scala 206:29] + node _T_1020 = andr(_T_1019) @[el2_lib.scala 206:37] + node _T_1021 = and(_T_1020, _T_860) @[el2_lib.scala 206:42] + node _T_1022 = bits(io.trigger_pkt_any[3].tdata2, 23, 23) @[el2_lib.scala 206:75] + node _T_1023 = bits(lsu_match_data_3, 23, 23) @[el2_lib.scala 206:87] + node _T_1024 = eq(_T_1022, _T_1023) @[el2_lib.scala 206:79] + node _T_1025 = mux(_T_1021, UInt<1>("h01"), _T_1024) @[el2_lib.scala 206:24] + _T_855[23] <= _T_1025 @[el2_lib.scala 206:18] + node _T_1026 = bits(io.trigger_pkt_any[3].tdata2, 23, 0) @[el2_lib.scala 206:29] + node _T_1027 = andr(_T_1026) @[el2_lib.scala 206:37] + node _T_1028 = and(_T_1027, _T_860) @[el2_lib.scala 206:42] + node _T_1029 = bits(io.trigger_pkt_any[3].tdata2, 24, 24) @[el2_lib.scala 206:75] + node _T_1030 = bits(lsu_match_data_3, 24, 24) @[el2_lib.scala 206:87] + node _T_1031 = eq(_T_1029, _T_1030) @[el2_lib.scala 206:79] + node _T_1032 = mux(_T_1028, UInt<1>("h01"), _T_1031) @[el2_lib.scala 206:24] + _T_855[24] <= _T_1032 @[el2_lib.scala 206:18] + node _T_1033 = bits(io.trigger_pkt_any[3].tdata2, 24, 0) @[el2_lib.scala 206:29] + node _T_1034 = andr(_T_1033) @[el2_lib.scala 206:37] + node _T_1035 = and(_T_1034, _T_860) @[el2_lib.scala 206:42] + node _T_1036 = bits(io.trigger_pkt_any[3].tdata2, 25, 25) @[el2_lib.scala 206:75] + node _T_1037 = bits(lsu_match_data_3, 25, 25) @[el2_lib.scala 206:87] + node _T_1038 = eq(_T_1036, _T_1037) @[el2_lib.scala 206:79] + node _T_1039 = mux(_T_1035, UInt<1>("h01"), _T_1038) @[el2_lib.scala 206:24] + _T_855[25] <= _T_1039 @[el2_lib.scala 206:18] + node _T_1040 = bits(io.trigger_pkt_any[3].tdata2, 25, 0) @[el2_lib.scala 206:29] + node _T_1041 = andr(_T_1040) @[el2_lib.scala 206:37] + node _T_1042 = and(_T_1041, _T_860) @[el2_lib.scala 206:42] + node _T_1043 = bits(io.trigger_pkt_any[3].tdata2, 26, 26) @[el2_lib.scala 206:75] + node _T_1044 = bits(lsu_match_data_3, 26, 26) @[el2_lib.scala 206:87] + node _T_1045 = eq(_T_1043, _T_1044) @[el2_lib.scala 206:79] + node _T_1046 = mux(_T_1042, UInt<1>("h01"), _T_1045) @[el2_lib.scala 206:24] + _T_855[26] <= _T_1046 @[el2_lib.scala 206:18] + node _T_1047 = bits(io.trigger_pkt_any[3].tdata2, 26, 0) @[el2_lib.scala 206:29] + node _T_1048 = andr(_T_1047) @[el2_lib.scala 206:37] + node _T_1049 = and(_T_1048, _T_860) @[el2_lib.scala 206:42] + node _T_1050 = bits(io.trigger_pkt_any[3].tdata2, 27, 27) @[el2_lib.scala 206:75] + node _T_1051 = bits(lsu_match_data_3, 27, 27) @[el2_lib.scala 206:87] + node _T_1052 = eq(_T_1050, _T_1051) @[el2_lib.scala 206:79] + node _T_1053 = mux(_T_1049, UInt<1>("h01"), _T_1052) @[el2_lib.scala 206:24] + _T_855[27] <= _T_1053 @[el2_lib.scala 206:18] + node _T_1054 = bits(io.trigger_pkt_any[3].tdata2, 27, 0) @[el2_lib.scala 206:29] + node _T_1055 = andr(_T_1054) @[el2_lib.scala 206:37] + node _T_1056 = and(_T_1055, _T_860) @[el2_lib.scala 206:42] + node _T_1057 = bits(io.trigger_pkt_any[3].tdata2, 28, 28) @[el2_lib.scala 206:75] + node _T_1058 = bits(lsu_match_data_3, 28, 28) @[el2_lib.scala 206:87] + node _T_1059 = eq(_T_1057, _T_1058) @[el2_lib.scala 206:79] + node _T_1060 = mux(_T_1056, UInt<1>("h01"), _T_1059) @[el2_lib.scala 206:24] + _T_855[28] <= _T_1060 @[el2_lib.scala 206:18] + node _T_1061 = bits(io.trigger_pkt_any[3].tdata2, 28, 0) @[el2_lib.scala 206:29] + node _T_1062 = andr(_T_1061) @[el2_lib.scala 206:37] + node _T_1063 = and(_T_1062, _T_860) @[el2_lib.scala 206:42] + node _T_1064 = bits(io.trigger_pkt_any[3].tdata2, 29, 29) @[el2_lib.scala 206:75] + node _T_1065 = bits(lsu_match_data_3, 29, 29) @[el2_lib.scala 206:87] + node _T_1066 = eq(_T_1064, _T_1065) @[el2_lib.scala 206:79] + node _T_1067 = mux(_T_1063, UInt<1>("h01"), _T_1066) @[el2_lib.scala 206:24] + _T_855[29] <= _T_1067 @[el2_lib.scala 206:18] + node _T_1068 = bits(io.trigger_pkt_any[3].tdata2, 29, 0) @[el2_lib.scala 206:29] + node _T_1069 = andr(_T_1068) @[el2_lib.scala 206:37] + node _T_1070 = and(_T_1069, _T_860) @[el2_lib.scala 206:42] + node _T_1071 = bits(io.trigger_pkt_any[3].tdata2, 30, 30) @[el2_lib.scala 206:75] + node _T_1072 = bits(lsu_match_data_3, 30, 30) @[el2_lib.scala 206:87] + node _T_1073 = eq(_T_1071, _T_1072) @[el2_lib.scala 206:79] + node _T_1074 = mux(_T_1070, UInt<1>("h01"), _T_1073) @[el2_lib.scala 206:24] + _T_855[30] <= _T_1074 @[el2_lib.scala 206:18] + node _T_1075 = bits(io.trigger_pkt_any[3].tdata2, 30, 0) @[el2_lib.scala 206:29] + node _T_1076 = andr(_T_1075) @[el2_lib.scala 206:37] + node _T_1077 = and(_T_1076, _T_860) @[el2_lib.scala 206:42] + node _T_1078 = bits(io.trigger_pkt_any[3].tdata2, 31, 31) @[el2_lib.scala 206:75] + node _T_1079 = bits(lsu_match_data_3, 31, 31) @[el2_lib.scala 206:87] + node _T_1080 = eq(_T_1078, _T_1079) @[el2_lib.scala 206:79] + node _T_1081 = mux(_T_1077, UInt<1>("h01"), _T_1080) @[el2_lib.scala 206:24] + _T_855[31] <= _T_1081 @[el2_lib.scala 206:18] + node _T_1082 = cat(_T_855[1], _T_855[0]) @[el2_lib.scala 207:14] + node _T_1083 = cat(_T_855[3], _T_855[2]) @[el2_lib.scala 207:14] + node _T_1084 = cat(_T_1083, _T_1082) @[el2_lib.scala 207:14] + node _T_1085 = cat(_T_855[5], _T_855[4]) @[el2_lib.scala 207:14] + node _T_1086 = cat(_T_855[7], _T_855[6]) @[el2_lib.scala 207:14] + node _T_1087 = cat(_T_1086, _T_1085) @[el2_lib.scala 207:14] + node _T_1088 = cat(_T_1087, _T_1084) @[el2_lib.scala 207:14] + node _T_1089 = cat(_T_855[9], _T_855[8]) @[el2_lib.scala 207:14] + node _T_1090 = cat(_T_855[11], _T_855[10]) @[el2_lib.scala 207:14] + node _T_1091 = cat(_T_1090, _T_1089) @[el2_lib.scala 207:14] + node _T_1092 = cat(_T_855[13], _T_855[12]) @[el2_lib.scala 207:14] + node _T_1093 = cat(_T_855[15], _T_855[14]) @[el2_lib.scala 207:14] + node _T_1094 = cat(_T_1093, _T_1092) @[el2_lib.scala 207:14] + node _T_1095 = cat(_T_1094, _T_1091) @[el2_lib.scala 207:14] + node _T_1096 = cat(_T_1095, _T_1088) @[el2_lib.scala 207:14] + node _T_1097 = cat(_T_855[17], _T_855[16]) @[el2_lib.scala 207:14] + node _T_1098 = cat(_T_855[19], _T_855[18]) @[el2_lib.scala 207:14] + node _T_1099 = cat(_T_1098, _T_1097) @[el2_lib.scala 207:14] + node _T_1100 = cat(_T_855[21], _T_855[20]) @[el2_lib.scala 207:14] + node _T_1101 = cat(_T_855[23], _T_855[22]) @[el2_lib.scala 207:14] + node _T_1102 = cat(_T_1101, _T_1100) @[el2_lib.scala 207:14] + node _T_1103 = cat(_T_1102, _T_1099) @[el2_lib.scala 207:14] + node _T_1104 = cat(_T_855[25], _T_855[24]) @[el2_lib.scala 207:14] + node _T_1105 = cat(_T_855[27], _T_855[26]) @[el2_lib.scala 207:14] + node _T_1106 = cat(_T_1105, _T_1104) @[el2_lib.scala 207:14] + node _T_1107 = cat(_T_855[29], _T_855[28]) @[el2_lib.scala 207:14] + node _T_1108 = cat(_T_855[31], _T_855[30]) @[el2_lib.scala 207:14] + node _T_1109 = cat(_T_1108, _T_1107) @[el2_lib.scala 207:14] + node _T_1110 = cat(_T_1109, _T_1106) @[el2_lib.scala 207:14] + node _T_1111 = cat(_T_1110, _T_1103) @[el2_lib.scala 207:14] + node _T_1112 = cat(_T_1111, _T_1096) @[el2_lib.scala 207:14] + node _T_1113 = andr(_T_1112) @[el2_lib.scala 207:21] + node _T_1114 = and(_T_853, _T_1113) @[el2_lsu_trigger.scala 21:87] + node _T_1115 = cat(_T_1114, _T_845) @[Cat.scala 29:58] + node _T_1116 = cat(_T_1115, _T_576) @[Cat.scala 29:58] + node _T_1117 = cat(_T_1116, _T_307) @[Cat.scala 29:58] + io.lsu_trigger_match_m <= _T_1117 @[el2_lsu_trigger.scala 20:26] diff --git a/el2_lsu_trigger.v b/el2_lsu_trigger.v index 82f0a9f6..24e9a5d5 100644 --- a/el2_lsu_trigger.v +++ b/el2_lsu_trigger.v @@ -52,604 +52,588 @@ module el2_lsu_trigger( wire [7:0] _T_6 = _T_4 ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] wire [7:0] _T_8 = _T_6 & io_store_data_m[15:8]; // @[el2_lsu_trigger.scala 18:136] wire [31:0] store_data_trigger_m = {_T_3,_T_8,io_store_data_m[7:0]}; // @[Cat.scala 29:58] - wire _T_11 = ~io_trigger_pkt_any_0_select; // @[el2_lsu_trigger.scala 20:57] - wire [31:0] _T_13 = _T_11 ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] - wire [31:0] _T_14 = _T_13 & io_lsu_addr_m; // @[el2_lsu_trigger.scala 20:88] - wire [31:0] _T_16 = io_trigger_pkt_any_0_select ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] - wire [31:0] _GEN_0 = {{31'd0}, io_trigger_pkt_any_0_store}; // @[el2_lsu_trigger.scala 20:148] - wire [31:0] _T_17 = _T_16 & _GEN_0; // @[el2_lsu_trigger.scala 20:148] - wire [31:0] _T_18 = _T_17 & store_data_trigger_m; // @[el2_lsu_trigger.scala 20:179] - wire [31:0] lsu_match_data_0 = _T_14 | _T_18; // @[el2_lsu_trigger.scala 20:105] - wire _T_20 = ~io_trigger_pkt_any_1_select; // @[el2_lsu_trigger.scala 20:57] - wire [31:0] _T_22 = _T_20 ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] - wire [31:0] _T_23 = _T_22 & io_lsu_addr_m; // @[el2_lsu_trigger.scala 20:88] - wire [31:0] _T_25 = io_trigger_pkt_any_1_select ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] - wire [31:0] _GEN_1 = {{31'd0}, io_trigger_pkt_any_1_store}; // @[el2_lsu_trigger.scala 20:148] - wire [31:0] _T_26 = _T_25 & _GEN_1; // @[el2_lsu_trigger.scala 20:148] - wire [31:0] _T_27 = _T_26 & store_data_trigger_m; // @[el2_lsu_trigger.scala 20:179] - wire [31:0] lsu_match_data_1 = _T_23 | _T_27; // @[el2_lsu_trigger.scala 20:105] - wire _T_29 = ~io_trigger_pkt_any_2_select; // @[el2_lsu_trigger.scala 20:57] - wire [31:0] _T_31 = _T_29 ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] - wire [31:0] _T_32 = _T_31 & io_lsu_addr_m; // @[el2_lsu_trigger.scala 20:88] - wire [31:0] _T_34 = io_trigger_pkt_any_2_select ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] - wire [31:0] _GEN_2 = {{31'd0}, io_trigger_pkt_any_2_store}; // @[el2_lsu_trigger.scala 20:148] - wire [31:0] _T_35 = _T_34 & _GEN_2; // @[el2_lsu_trigger.scala 20:148] - wire [31:0] _T_36 = _T_35 & store_data_trigger_m; // @[el2_lsu_trigger.scala 20:179] - wire [31:0] lsu_match_data_2 = _T_32 | _T_36; // @[el2_lsu_trigger.scala 20:105] - wire _T_38 = ~io_trigger_pkt_any_3_select; // @[el2_lsu_trigger.scala 20:57] - wire [31:0] _T_40 = _T_38 ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] - wire [31:0] _T_41 = _T_40 & io_lsu_addr_m; // @[el2_lsu_trigger.scala 20:88] - wire [31:0] _T_43 = io_trigger_pkt_any_3_select ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] - wire [31:0] _GEN_3 = {{31'd0}, io_trigger_pkt_any_3_store}; // @[el2_lsu_trigger.scala 20:148] - wire [31:0] _T_44 = _T_43 & _GEN_3; // @[el2_lsu_trigger.scala 20:148] - wire [31:0] _T_45 = _T_44 & store_data_trigger_m; // @[el2_lsu_trigger.scala 20:179] - wire [31:0] lsu_match_data_3 = _T_41 | _T_45; // @[el2_lsu_trigger.scala 20:105] - wire _T_48 = ~io_lsu_pkt_m_dma; // @[el2_lsu_trigger.scala 21:71] - wire _T_49 = io_lsu_pkt_m_valid & _T_48; // @[el2_lsu_trigger.scala 21:69] - wire _T_50 = io_trigger_pkt_any_0_store & io_lsu_pkt_m_store; // @[el2_lsu_trigger.scala 21:120] - wire _T_51 = _T_49 & _T_50; // @[el2_lsu_trigger.scala 21:89] - wire _T_52 = io_trigger_pkt_any_0_load & io_lsu_pkt_m_load; // @[el2_lsu_trigger.scala 22:33] - wire _T_54 = _T_52 & _T_11; // @[el2_lsu_trigger.scala 22:53] - wire _T_57 = &io_trigger_pkt_any_0_tdata2; // @[el2_lib.scala 194:45] - wire _T_58 = ~_T_57; // @[el2_lib.scala 194:39] - wire _T_59 = io_trigger_pkt_any_0_match_ & _T_58; // @[el2_lib.scala 194:37] - wire _T_62 = io_trigger_pkt_any_0_tdata2[0] == lsu_match_data_0[0]; // @[el2_lib.scala 195:52] - wire _T_63 = _T_59 | _T_62; // @[el2_lib.scala 195:41] - wire _T_65 = &io_trigger_pkt_any_0_tdata2[0]; // @[el2_lib.scala 197:38] - wire _T_66 = _T_65 & _T_59; // @[el2_lib.scala 197:43] - wire _T_69 = io_trigger_pkt_any_0_tdata2[1] == lsu_match_data_0[1]; // @[el2_lib.scala 197:80] - wire _T_70 = _T_66 | _T_69; // @[el2_lib.scala 197:25] - wire _T_72 = &io_trigger_pkt_any_0_tdata2[1:0]; // @[el2_lib.scala 197:38] - wire _T_73 = _T_72 & _T_59; // @[el2_lib.scala 197:43] - wire _T_76 = io_trigger_pkt_any_0_tdata2[2] == lsu_match_data_0[2]; // @[el2_lib.scala 197:80] - wire _T_77 = _T_73 | _T_76; // @[el2_lib.scala 197:25] - wire _T_79 = &io_trigger_pkt_any_0_tdata2[2:0]; // @[el2_lib.scala 197:38] - wire _T_80 = _T_79 & _T_59; // @[el2_lib.scala 197:43] - wire _T_83 = io_trigger_pkt_any_0_tdata2[3] == lsu_match_data_0[3]; // @[el2_lib.scala 197:80] - wire _T_84 = _T_80 | _T_83; // @[el2_lib.scala 197:25] - wire _T_86 = &io_trigger_pkt_any_0_tdata2[3:0]; // @[el2_lib.scala 197:38] - wire _T_87 = _T_86 & _T_59; // @[el2_lib.scala 197:43] - wire _T_90 = io_trigger_pkt_any_0_tdata2[4] == lsu_match_data_0[4]; // @[el2_lib.scala 197:80] - wire _T_91 = _T_87 | _T_90; // @[el2_lib.scala 197:25] - wire _T_93 = &io_trigger_pkt_any_0_tdata2[4:0]; // @[el2_lib.scala 197:38] - wire _T_94 = _T_93 & _T_59; // @[el2_lib.scala 197:43] - wire _T_97 = io_trigger_pkt_any_0_tdata2[5] == lsu_match_data_0[5]; // @[el2_lib.scala 197:80] - wire _T_98 = _T_94 | _T_97; // @[el2_lib.scala 197:25] - wire _T_100 = &io_trigger_pkt_any_0_tdata2[5:0]; // @[el2_lib.scala 197:38] - wire _T_101 = _T_100 & _T_59; // @[el2_lib.scala 197:43] - wire _T_104 = io_trigger_pkt_any_0_tdata2[6] == lsu_match_data_0[6]; // @[el2_lib.scala 197:80] - wire _T_105 = _T_101 | _T_104; // @[el2_lib.scala 197:25] - wire _T_107 = &io_trigger_pkt_any_0_tdata2[6:0]; // @[el2_lib.scala 197:38] - wire _T_108 = _T_107 & _T_59; // @[el2_lib.scala 197:43] - wire _T_111 = io_trigger_pkt_any_0_tdata2[7] == lsu_match_data_0[7]; // @[el2_lib.scala 197:80] - wire _T_112 = _T_108 | _T_111; // @[el2_lib.scala 197:25] - wire _T_114 = &io_trigger_pkt_any_0_tdata2[7:0]; // @[el2_lib.scala 197:38] - wire _T_115 = _T_114 & _T_59; // @[el2_lib.scala 197:43] - wire _T_118 = io_trigger_pkt_any_0_tdata2[8] == lsu_match_data_0[8]; // @[el2_lib.scala 197:80] - wire _T_119 = _T_115 | _T_118; // @[el2_lib.scala 197:25] - wire _T_121 = &io_trigger_pkt_any_0_tdata2[8:0]; // @[el2_lib.scala 197:38] - wire _T_122 = _T_121 & _T_59; // @[el2_lib.scala 197:43] - wire _T_125 = io_trigger_pkt_any_0_tdata2[9] == lsu_match_data_0[9]; // @[el2_lib.scala 197:80] - wire _T_126 = _T_122 | _T_125; // @[el2_lib.scala 197:25] - wire _T_128 = &io_trigger_pkt_any_0_tdata2[9:0]; // @[el2_lib.scala 197:38] - wire _T_129 = _T_128 & _T_59; // @[el2_lib.scala 197:43] - wire _T_132 = io_trigger_pkt_any_0_tdata2[10] == lsu_match_data_0[10]; // @[el2_lib.scala 197:80] - wire _T_133 = _T_129 | _T_132; // @[el2_lib.scala 197:25] - wire _T_135 = &io_trigger_pkt_any_0_tdata2[10:0]; // @[el2_lib.scala 197:38] - wire _T_136 = _T_135 & _T_59; // @[el2_lib.scala 197:43] - wire _T_139 = io_trigger_pkt_any_0_tdata2[11] == lsu_match_data_0[11]; // @[el2_lib.scala 197:80] - wire _T_140 = _T_136 | _T_139; // @[el2_lib.scala 197:25] - wire _T_142 = &io_trigger_pkt_any_0_tdata2[11:0]; // @[el2_lib.scala 197:38] - wire _T_143 = _T_142 & _T_59; // @[el2_lib.scala 197:43] - wire _T_146 = io_trigger_pkt_any_0_tdata2[12] == lsu_match_data_0[12]; // @[el2_lib.scala 197:80] - wire _T_147 = _T_143 | _T_146; // @[el2_lib.scala 197:25] - wire _T_149 = &io_trigger_pkt_any_0_tdata2[12:0]; // @[el2_lib.scala 197:38] - wire _T_150 = _T_149 & _T_59; // @[el2_lib.scala 197:43] - wire _T_153 = io_trigger_pkt_any_0_tdata2[13] == lsu_match_data_0[13]; // @[el2_lib.scala 197:80] - wire _T_154 = _T_150 | _T_153; // @[el2_lib.scala 197:25] - wire _T_156 = &io_trigger_pkt_any_0_tdata2[13:0]; // @[el2_lib.scala 197:38] - wire _T_157 = _T_156 & _T_59; // @[el2_lib.scala 197:43] - wire _T_160 = io_trigger_pkt_any_0_tdata2[14] == lsu_match_data_0[14]; // @[el2_lib.scala 197:80] - wire _T_161 = _T_157 | _T_160; // @[el2_lib.scala 197:25] - wire _T_163 = &io_trigger_pkt_any_0_tdata2[14:0]; // @[el2_lib.scala 197:38] - wire _T_164 = _T_163 & _T_59; // @[el2_lib.scala 197:43] - wire _T_167 = io_trigger_pkt_any_0_tdata2[15] == lsu_match_data_0[15]; // @[el2_lib.scala 197:80] - wire _T_168 = _T_164 | _T_167; // @[el2_lib.scala 197:25] - wire _T_170 = &io_trigger_pkt_any_0_tdata2[15:0]; // @[el2_lib.scala 197:38] - wire _T_171 = _T_170 & _T_59; // @[el2_lib.scala 197:43] - wire _T_174 = io_trigger_pkt_any_0_tdata2[16] == lsu_match_data_0[16]; // @[el2_lib.scala 197:80] - wire _T_175 = _T_171 | _T_174; // @[el2_lib.scala 197:25] - wire _T_177 = &io_trigger_pkt_any_0_tdata2[16:0]; // @[el2_lib.scala 197:38] - wire _T_178 = _T_177 & _T_59; // @[el2_lib.scala 197:43] - wire _T_181 = io_trigger_pkt_any_0_tdata2[17] == lsu_match_data_0[17]; // @[el2_lib.scala 197:80] - wire _T_182 = _T_178 | _T_181; // @[el2_lib.scala 197:25] - wire _T_184 = &io_trigger_pkt_any_0_tdata2[17:0]; // @[el2_lib.scala 197:38] - wire _T_185 = _T_184 & _T_59; // @[el2_lib.scala 197:43] - wire _T_188 = io_trigger_pkt_any_0_tdata2[18] == lsu_match_data_0[18]; // @[el2_lib.scala 197:80] - wire _T_189 = _T_185 | _T_188; // @[el2_lib.scala 197:25] - wire _T_191 = &io_trigger_pkt_any_0_tdata2[18:0]; // @[el2_lib.scala 197:38] - wire _T_192 = _T_191 & _T_59; // @[el2_lib.scala 197:43] - wire _T_195 = io_trigger_pkt_any_0_tdata2[19] == lsu_match_data_0[19]; // @[el2_lib.scala 197:80] - wire _T_196 = _T_192 | _T_195; // @[el2_lib.scala 197:25] - wire _T_198 = &io_trigger_pkt_any_0_tdata2[19:0]; // @[el2_lib.scala 197:38] - wire _T_199 = _T_198 & _T_59; // @[el2_lib.scala 197:43] - wire _T_202 = io_trigger_pkt_any_0_tdata2[20] == lsu_match_data_0[20]; // @[el2_lib.scala 197:80] - wire _T_203 = _T_199 | _T_202; // @[el2_lib.scala 197:25] - wire _T_205 = &io_trigger_pkt_any_0_tdata2[20:0]; // @[el2_lib.scala 197:38] - wire _T_206 = _T_205 & _T_59; // @[el2_lib.scala 197:43] - wire _T_209 = io_trigger_pkt_any_0_tdata2[21] == lsu_match_data_0[21]; // @[el2_lib.scala 197:80] - wire _T_210 = _T_206 | _T_209; // @[el2_lib.scala 197:25] - wire _T_212 = &io_trigger_pkt_any_0_tdata2[21:0]; // @[el2_lib.scala 197:38] - wire _T_213 = _T_212 & _T_59; // @[el2_lib.scala 197:43] - wire _T_216 = io_trigger_pkt_any_0_tdata2[22] == lsu_match_data_0[22]; // @[el2_lib.scala 197:80] - wire _T_217 = _T_213 | _T_216; // @[el2_lib.scala 197:25] - wire _T_219 = &io_trigger_pkt_any_0_tdata2[22:0]; // @[el2_lib.scala 197:38] - wire _T_220 = _T_219 & _T_59; // @[el2_lib.scala 197:43] - wire _T_223 = io_trigger_pkt_any_0_tdata2[23] == lsu_match_data_0[23]; // @[el2_lib.scala 197:80] - wire _T_224 = _T_220 | _T_223; // @[el2_lib.scala 197:25] - wire _T_226 = &io_trigger_pkt_any_0_tdata2[23:0]; // @[el2_lib.scala 197:38] - wire _T_227 = _T_226 & _T_59; // @[el2_lib.scala 197:43] - wire _T_230 = io_trigger_pkt_any_0_tdata2[24] == lsu_match_data_0[24]; // @[el2_lib.scala 197:80] - wire _T_231 = _T_227 | _T_230; // @[el2_lib.scala 197:25] - wire _T_233 = &io_trigger_pkt_any_0_tdata2[24:0]; // @[el2_lib.scala 197:38] - wire _T_234 = _T_233 & _T_59; // @[el2_lib.scala 197:43] - wire _T_237 = io_trigger_pkt_any_0_tdata2[25] == lsu_match_data_0[25]; // @[el2_lib.scala 197:80] - wire _T_238 = _T_234 | _T_237; // @[el2_lib.scala 197:25] - wire _T_240 = &io_trigger_pkt_any_0_tdata2[25:0]; // @[el2_lib.scala 197:38] - wire _T_241 = _T_240 & _T_59; // @[el2_lib.scala 197:43] - wire _T_244 = io_trigger_pkt_any_0_tdata2[26] == lsu_match_data_0[26]; // @[el2_lib.scala 197:80] - wire _T_245 = _T_241 | _T_244; // @[el2_lib.scala 197:25] - wire _T_247 = &io_trigger_pkt_any_0_tdata2[26:0]; // @[el2_lib.scala 197:38] - wire _T_248 = _T_247 & _T_59; // @[el2_lib.scala 197:43] - wire _T_251 = io_trigger_pkt_any_0_tdata2[27] == lsu_match_data_0[27]; // @[el2_lib.scala 197:80] - wire _T_252 = _T_248 | _T_251; // @[el2_lib.scala 197:25] - wire _T_254 = &io_trigger_pkt_any_0_tdata2[27:0]; // @[el2_lib.scala 197:38] - wire _T_255 = _T_254 & _T_59; // @[el2_lib.scala 197:43] - wire _T_258 = io_trigger_pkt_any_0_tdata2[28] == lsu_match_data_0[28]; // @[el2_lib.scala 197:80] - wire _T_259 = _T_255 | _T_258; // @[el2_lib.scala 197:25] - wire _T_261 = &io_trigger_pkt_any_0_tdata2[28:0]; // @[el2_lib.scala 197:38] - wire _T_262 = _T_261 & _T_59; // @[el2_lib.scala 197:43] - wire _T_265 = io_trigger_pkt_any_0_tdata2[29] == lsu_match_data_0[29]; // @[el2_lib.scala 197:80] - wire _T_266 = _T_262 | _T_265; // @[el2_lib.scala 197:25] - wire _T_268 = &io_trigger_pkt_any_0_tdata2[29:0]; // @[el2_lib.scala 197:38] - wire _T_269 = _T_268 & _T_59; // @[el2_lib.scala 197:43] - wire _T_272 = io_trigger_pkt_any_0_tdata2[30] == lsu_match_data_0[30]; // @[el2_lib.scala 197:80] - wire _T_273 = _T_269 | _T_272; // @[el2_lib.scala 197:25] - wire _T_275 = &io_trigger_pkt_any_0_tdata2[30:0]; // @[el2_lib.scala 197:38] - wire _T_276 = _T_275 & _T_59; // @[el2_lib.scala 197:43] - wire _T_279 = io_trigger_pkt_any_0_tdata2[31] == lsu_match_data_0[31]; // @[el2_lib.scala 197:80] - wire _T_280 = _T_276 | _T_279; // @[el2_lib.scala 197:25] - wire [7:0] _T_287 = {_T_112,_T_105,_T_98,_T_91,_T_84,_T_77,_T_70,_T_63}; // @[el2_lib.scala 198:14] - wire [15:0] _T_295 = {_T_168,_T_161,_T_154,_T_147,_T_140,_T_133,_T_126,_T_119,_T_287}; // @[el2_lib.scala 198:14] - wire [7:0] _T_302 = {_T_224,_T_217,_T_210,_T_203,_T_196,_T_189,_T_182,_T_175}; // @[el2_lib.scala 198:14] - wire [31:0] _T_311 = {_T_280,_T_273,_T_266,_T_259,_T_252,_T_245,_T_238,_T_231,_T_302,_T_295}; // @[el2_lib.scala 198:14] - wire [31:0] _GEN_4 = {{31'd0}, _T_54}; // @[el2_lsu_trigger.scala 22:86] - wire [31:0] _T_312 = _GEN_4 & _T_311; // @[el2_lsu_trigger.scala 22:86] - wire [31:0] _GEN_5 = {{31'd0}, _T_51}; // @[el2_lsu_trigger.scala 21:141] - wire [31:0] _T_313 = _GEN_5 | _T_312; // @[el2_lsu_trigger.scala 21:141] - wire _T_316 = io_trigger_pkt_any_1_store & io_lsu_pkt_m_store; // @[el2_lsu_trigger.scala 21:120] - wire _T_317 = _T_49 & _T_316; // @[el2_lsu_trigger.scala 21:89] - wire _T_318 = io_trigger_pkt_any_1_load & io_lsu_pkt_m_load; // @[el2_lsu_trigger.scala 22:33] - wire _T_320 = _T_318 & _T_20; // @[el2_lsu_trigger.scala 22:53] - wire _T_323 = &io_trigger_pkt_any_1_tdata2; // @[el2_lib.scala 194:45] - wire _T_324 = ~_T_323; // @[el2_lib.scala 194:39] - wire _T_325 = io_trigger_pkt_any_1_match_ & _T_324; // @[el2_lib.scala 194:37] - wire _T_328 = io_trigger_pkt_any_1_tdata2[0] == lsu_match_data_1[0]; // @[el2_lib.scala 195:52] - wire _T_329 = _T_325 | _T_328; // @[el2_lib.scala 195:41] - wire _T_331 = &io_trigger_pkt_any_1_tdata2[0]; // @[el2_lib.scala 197:38] - wire _T_332 = _T_331 & _T_325; // @[el2_lib.scala 197:43] - wire _T_335 = io_trigger_pkt_any_1_tdata2[1] == lsu_match_data_1[1]; // @[el2_lib.scala 197:80] - wire _T_336 = _T_332 | _T_335; // @[el2_lib.scala 197:25] - wire _T_338 = &io_trigger_pkt_any_1_tdata2[1:0]; // @[el2_lib.scala 197:38] - wire _T_339 = _T_338 & _T_325; // @[el2_lib.scala 197:43] - wire _T_342 = io_trigger_pkt_any_1_tdata2[2] == lsu_match_data_1[2]; // @[el2_lib.scala 197:80] - wire _T_343 = _T_339 | _T_342; // @[el2_lib.scala 197:25] - wire _T_345 = &io_trigger_pkt_any_1_tdata2[2:0]; // @[el2_lib.scala 197:38] - wire _T_346 = _T_345 & _T_325; // @[el2_lib.scala 197:43] - wire _T_349 = io_trigger_pkt_any_1_tdata2[3] == lsu_match_data_1[3]; // @[el2_lib.scala 197:80] - wire _T_350 = _T_346 | _T_349; // @[el2_lib.scala 197:25] - wire _T_352 = &io_trigger_pkt_any_1_tdata2[3:0]; // @[el2_lib.scala 197:38] - wire _T_353 = _T_352 & _T_325; // @[el2_lib.scala 197:43] - wire _T_356 = io_trigger_pkt_any_1_tdata2[4] == lsu_match_data_1[4]; // @[el2_lib.scala 197:80] - wire _T_357 = _T_353 | _T_356; // @[el2_lib.scala 197:25] - wire _T_359 = &io_trigger_pkt_any_1_tdata2[4:0]; // @[el2_lib.scala 197:38] - wire _T_360 = _T_359 & _T_325; // @[el2_lib.scala 197:43] - wire _T_363 = io_trigger_pkt_any_1_tdata2[5] == lsu_match_data_1[5]; // @[el2_lib.scala 197:80] - wire _T_364 = _T_360 | _T_363; // @[el2_lib.scala 197:25] - wire _T_366 = &io_trigger_pkt_any_1_tdata2[5:0]; // @[el2_lib.scala 197:38] - wire _T_367 = _T_366 & _T_325; // @[el2_lib.scala 197:43] - wire _T_370 = io_trigger_pkt_any_1_tdata2[6] == lsu_match_data_1[6]; // @[el2_lib.scala 197:80] - wire _T_371 = _T_367 | _T_370; // @[el2_lib.scala 197:25] - wire _T_373 = &io_trigger_pkt_any_1_tdata2[6:0]; // @[el2_lib.scala 197:38] - wire _T_374 = _T_373 & _T_325; // @[el2_lib.scala 197:43] - wire _T_377 = io_trigger_pkt_any_1_tdata2[7] == lsu_match_data_1[7]; // @[el2_lib.scala 197:80] - wire _T_378 = _T_374 | _T_377; // @[el2_lib.scala 197:25] - wire _T_380 = &io_trigger_pkt_any_1_tdata2[7:0]; // @[el2_lib.scala 197:38] - wire _T_381 = _T_380 & _T_325; // @[el2_lib.scala 197:43] - wire _T_384 = io_trigger_pkt_any_1_tdata2[8] == lsu_match_data_1[8]; // @[el2_lib.scala 197:80] - wire _T_385 = _T_381 | _T_384; // @[el2_lib.scala 197:25] - wire _T_387 = &io_trigger_pkt_any_1_tdata2[8:0]; // @[el2_lib.scala 197:38] - wire _T_388 = _T_387 & _T_325; // @[el2_lib.scala 197:43] - wire _T_391 = io_trigger_pkt_any_1_tdata2[9] == lsu_match_data_1[9]; // @[el2_lib.scala 197:80] - wire _T_392 = _T_388 | _T_391; // @[el2_lib.scala 197:25] - wire _T_394 = &io_trigger_pkt_any_1_tdata2[9:0]; // @[el2_lib.scala 197:38] - wire _T_395 = _T_394 & _T_325; // @[el2_lib.scala 197:43] - wire _T_398 = io_trigger_pkt_any_1_tdata2[10] == lsu_match_data_1[10]; // @[el2_lib.scala 197:80] - wire _T_399 = _T_395 | _T_398; // @[el2_lib.scala 197:25] - wire _T_401 = &io_trigger_pkt_any_1_tdata2[10:0]; // @[el2_lib.scala 197:38] - wire _T_402 = _T_401 & _T_325; // @[el2_lib.scala 197:43] - wire _T_405 = io_trigger_pkt_any_1_tdata2[11] == lsu_match_data_1[11]; // @[el2_lib.scala 197:80] - wire _T_406 = _T_402 | _T_405; // @[el2_lib.scala 197:25] - wire _T_408 = &io_trigger_pkt_any_1_tdata2[11:0]; // @[el2_lib.scala 197:38] - wire _T_409 = _T_408 & _T_325; // @[el2_lib.scala 197:43] - wire _T_412 = io_trigger_pkt_any_1_tdata2[12] == lsu_match_data_1[12]; // @[el2_lib.scala 197:80] - wire _T_413 = _T_409 | _T_412; // @[el2_lib.scala 197:25] - wire _T_415 = &io_trigger_pkt_any_1_tdata2[12:0]; // @[el2_lib.scala 197:38] - wire _T_416 = _T_415 & _T_325; // @[el2_lib.scala 197:43] - wire _T_419 = io_trigger_pkt_any_1_tdata2[13] == lsu_match_data_1[13]; // @[el2_lib.scala 197:80] - wire _T_420 = _T_416 | _T_419; // @[el2_lib.scala 197:25] - wire _T_422 = &io_trigger_pkt_any_1_tdata2[13:0]; // @[el2_lib.scala 197:38] - wire _T_423 = _T_422 & _T_325; // @[el2_lib.scala 197:43] - wire _T_426 = io_trigger_pkt_any_1_tdata2[14] == lsu_match_data_1[14]; // @[el2_lib.scala 197:80] - wire _T_427 = _T_423 | _T_426; // @[el2_lib.scala 197:25] - wire _T_429 = &io_trigger_pkt_any_1_tdata2[14:0]; // @[el2_lib.scala 197:38] - wire _T_430 = _T_429 & _T_325; // @[el2_lib.scala 197:43] - wire _T_433 = io_trigger_pkt_any_1_tdata2[15] == lsu_match_data_1[15]; // @[el2_lib.scala 197:80] - wire _T_434 = _T_430 | _T_433; // @[el2_lib.scala 197:25] - wire _T_436 = &io_trigger_pkt_any_1_tdata2[15:0]; // @[el2_lib.scala 197:38] - wire _T_437 = _T_436 & _T_325; // @[el2_lib.scala 197:43] - wire _T_440 = io_trigger_pkt_any_1_tdata2[16] == lsu_match_data_1[16]; // @[el2_lib.scala 197:80] - wire _T_441 = _T_437 | _T_440; // @[el2_lib.scala 197:25] - wire _T_443 = &io_trigger_pkt_any_1_tdata2[16:0]; // @[el2_lib.scala 197:38] - wire _T_444 = _T_443 & _T_325; // @[el2_lib.scala 197:43] - wire _T_447 = io_trigger_pkt_any_1_tdata2[17] == lsu_match_data_1[17]; // @[el2_lib.scala 197:80] - wire _T_448 = _T_444 | _T_447; // @[el2_lib.scala 197:25] - wire _T_450 = &io_trigger_pkt_any_1_tdata2[17:0]; // @[el2_lib.scala 197:38] - wire _T_451 = _T_450 & _T_325; // @[el2_lib.scala 197:43] - wire _T_454 = io_trigger_pkt_any_1_tdata2[18] == lsu_match_data_1[18]; // @[el2_lib.scala 197:80] - wire _T_455 = _T_451 | _T_454; // @[el2_lib.scala 197:25] - wire _T_457 = &io_trigger_pkt_any_1_tdata2[18:0]; // @[el2_lib.scala 197:38] - wire _T_458 = _T_457 & _T_325; // @[el2_lib.scala 197:43] - wire _T_461 = io_trigger_pkt_any_1_tdata2[19] == lsu_match_data_1[19]; // @[el2_lib.scala 197:80] - wire _T_462 = _T_458 | _T_461; // @[el2_lib.scala 197:25] - wire _T_464 = &io_trigger_pkt_any_1_tdata2[19:0]; // @[el2_lib.scala 197:38] - wire _T_465 = _T_464 & _T_325; // @[el2_lib.scala 197:43] - wire _T_468 = io_trigger_pkt_any_1_tdata2[20] == lsu_match_data_1[20]; // @[el2_lib.scala 197:80] - wire _T_469 = _T_465 | _T_468; // @[el2_lib.scala 197:25] - wire _T_471 = &io_trigger_pkt_any_1_tdata2[20:0]; // @[el2_lib.scala 197:38] - wire _T_472 = _T_471 & _T_325; // @[el2_lib.scala 197:43] - wire _T_475 = io_trigger_pkt_any_1_tdata2[21] == lsu_match_data_1[21]; // @[el2_lib.scala 197:80] - wire _T_476 = _T_472 | _T_475; // @[el2_lib.scala 197:25] - wire _T_478 = &io_trigger_pkt_any_1_tdata2[21:0]; // @[el2_lib.scala 197:38] - wire _T_479 = _T_478 & _T_325; // @[el2_lib.scala 197:43] - wire _T_482 = io_trigger_pkt_any_1_tdata2[22] == lsu_match_data_1[22]; // @[el2_lib.scala 197:80] - wire _T_483 = _T_479 | _T_482; // @[el2_lib.scala 197:25] - wire _T_485 = &io_trigger_pkt_any_1_tdata2[22:0]; // @[el2_lib.scala 197:38] - wire _T_486 = _T_485 & _T_325; // @[el2_lib.scala 197:43] - wire _T_489 = io_trigger_pkt_any_1_tdata2[23] == lsu_match_data_1[23]; // @[el2_lib.scala 197:80] - wire _T_490 = _T_486 | _T_489; // @[el2_lib.scala 197:25] - wire _T_492 = &io_trigger_pkt_any_1_tdata2[23:0]; // @[el2_lib.scala 197:38] - wire _T_493 = _T_492 & _T_325; // @[el2_lib.scala 197:43] - wire _T_496 = io_trigger_pkt_any_1_tdata2[24] == lsu_match_data_1[24]; // @[el2_lib.scala 197:80] - wire _T_497 = _T_493 | _T_496; // @[el2_lib.scala 197:25] - wire _T_499 = &io_trigger_pkt_any_1_tdata2[24:0]; // @[el2_lib.scala 197:38] - wire _T_500 = _T_499 & _T_325; // @[el2_lib.scala 197:43] - wire _T_503 = io_trigger_pkt_any_1_tdata2[25] == lsu_match_data_1[25]; // @[el2_lib.scala 197:80] - wire _T_504 = _T_500 | _T_503; // @[el2_lib.scala 197:25] - wire _T_506 = &io_trigger_pkt_any_1_tdata2[25:0]; // @[el2_lib.scala 197:38] - wire _T_507 = _T_506 & _T_325; // @[el2_lib.scala 197:43] - wire _T_510 = io_trigger_pkt_any_1_tdata2[26] == lsu_match_data_1[26]; // @[el2_lib.scala 197:80] - wire _T_511 = _T_507 | _T_510; // @[el2_lib.scala 197:25] - wire _T_513 = &io_trigger_pkt_any_1_tdata2[26:0]; // @[el2_lib.scala 197:38] - wire _T_514 = _T_513 & _T_325; // @[el2_lib.scala 197:43] - wire _T_517 = io_trigger_pkt_any_1_tdata2[27] == lsu_match_data_1[27]; // @[el2_lib.scala 197:80] - wire _T_518 = _T_514 | _T_517; // @[el2_lib.scala 197:25] - wire _T_520 = &io_trigger_pkt_any_1_tdata2[27:0]; // @[el2_lib.scala 197:38] - wire _T_521 = _T_520 & _T_325; // @[el2_lib.scala 197:43] - wire _T_524 = io_trigger_pkt_any_1_tdata2[28] == lsu_match_data_1[28]; // @[el2_lib.scala 197:80] - wire _T_525 = _T_521 | _T_524; // @[el2_lib.scala 197:25] - wire _T_527 = &io_trigger_pkt_any_1_tdata2[28:0]; // @[el2_lib.scala 197:38] - wire _T_528 = _T_527 & _T_325; // @[el2_lib.scala 197:43] - wire _T_531 = io_trigger_pkt_any_1_tdata2[29] == lsu_match_data_1[29]; // @[el2_lib.scala 197:80] - wire _T_532 = _T_528 | _T_531; // @[el2_lib.scala 197:25] - wire _T_534 = &io_trigger_pkt_any_1_tdata2[29:0]; // @[el2_lib.scala 197:38] - wire _T_535 = _T_534 & _T_325; // @[el2_lib.scala 197:43] - wire _T_538 = io_trigger_pkt_any_1_tdata2[30] == lsu_match_data_1[30]; // @[el2_lib.scala 197:80] - wire _T_539 = _T_535 | _T_538; // @[el2_lib.scala 197:25] - wire _T_541 = &io_trigger_pkt_any_1_tdata2[30:0]; // @[el2_lib.scala 197:38] - wire _T_542 = _T_541 & _T_325; // @[el2_lib.scala 197:43] - wire _T_545 = io_trigger_pkt_any_1_tdata2[31] == lsu_match_data_1[31]; // @[el2_lib.scala 197:80] - wire _T_546 = _T_542 | _T_545; // @[el2_lib.scala 197:25] - wire [7:0] _T_553 = {_T_378,_T_371,_T_364,_T_357,_T_350,_T_343,_T_336,_T_329}; // @[el2_lib.scala 198:14] - wire [15:0] _T_561 = {_T_434,_T_427,_T_420,_T_413,_T_406,_T_399,_T_392,_T_385,_T_553}; // @[el2_lib.scala 198:14] - wire [7:0] _T_568 = {_T_490,_T_483,_T_476,_T_469,_T_462,_T_455,_T_448,_T_441}; // @[el2_lib.scala 198:14] - wire [31:0] _T_577 = {_T_546,_T_539,_T_532,_T_525,_T_518,_T_511,_T_504,_T_497,_T_568,_T_561}; // @[el2_lib.scala 198:14] - wire [31:0] _GEN_6 = {{31'd0}, _T_320}; // @[el2_lsu_trigger.scala 22:86] - wire [31:0] _T_578 = _GEN_6 & _T_577; // @[el2_lsu_trigger.scala 22:86] - wire [31:0] _GEN_7 = {{31'd0}, _T_317}; // @[el2_lsu_trigger.scala 21:141] - wire [31:0] _T_579 = _GEN_7 | _T_578; // @[el2_lsu_trigger.scala 21:141] - wire _T_582 = io_trigger_pkt_any_2_store & io_lsu_pkt_m_store; // @[el2_lsu_trigger.scala 21:120] - wire _T_583 = _T_49 & _T_582; // @[el2_lsu_trigger.scala 21:89] - wire _T_584 = io_trigger_pkt_any_2_load & io_lsu_pkt_m_load; // @[el2_lsu_trigger.scala 22:33] - wire _T_586 = _T_584 & _T_29; // @[el2_lsu_trigger.scala 22:53] - wire _T_589 = &io_trigger_pkt_any_2_tdata2; // @[el2_lib.scala 194:45] - wire _T_590 = ~_T_589; // @[el2_lib.scala 194:39] - wire _T_591 = io_trigger_pkt_any_2_match_ & _T_590; // @[el2_lib.scala 194:37] - wire _T_594 = io_trigger_pkt_any_2_tdata2[0] == lsu_match_data_2[0]; // @[el2_lib.scala 195:52] - wire _T_595 = _T_591 | _T_594; // @[el2_lib.scala 195:41] - wire _T_597 = &io_trigger_pkt_any_2_tdata2[0]; // @[el2_lib.scala 197:38] - wire _T_598 = _T_597 & _T_591; // @[el2_lib.scala 197:43] - wire _T_601 = io_trigger_pkt_any_2_tdata2[1] == lsu_match_data_2[1]; // @[el2_lib.scala 197:80] - wire _T_602 = _T_598 | _T_601; // @[el2_lib.scala 197:25] - wire _T_604 = &io_trigger_pkt_any_2_tdata2[1:0]; // @[el2_lib.scala 197:38] - wire _T_605 = _T_604 & _T_591; // @[el2_lib.scala 197:43] - wire _T_608 = io_trigger_pkt_any_2_tdata2[2] == lsu_match_data_2[2]; // @[el2_lib.scala 197:80] - wire _T_609 = _T_605 | _T_608; // @[el2_lib.scala 197:25] - wire _T_611 = &io_trigger_pkt_any_2_tdata2[2:0]; // @[el2_lib.scala 197:38] - wire _T_612 = _T_611 & _T_591; // @[el2_lib.scala 197:43] - wire _T_615 = io_trigger_pkt_any_2_tdata2[3] == lsu_match_data_2[3]; // @[el2_lib.scala 197:80] - wire _T_616 = _T_612 | _T_615; // @[el2_lib.scala 197:25] - wire _T_618 = &io_trigger_pkt_any_2_tdata2[3:0]; // @[el2_lib.scala 197:38] - wire _T_619 = _T_618 & _T_591; // @[el2_lib.scala 197:43] - wire _T_622 = io_trigger_pkt_any_2_tdata2[4] == lsu_match_data_2[4]; // @[el2_lib.scala 197:80] - wire _T_623 = _T_619 | _T_622; // @[el2_lib.scala 197:25] - wire _T_625 = &io_trigger_pkt_any_2_tdata2[4:0]; // @[el2_lib.scala 197:38] - wire _T_626 = _T_625 & _T_591; // @[el2_lib.scala 197:43] - wire _T_629 = io_trigger_pkt_any_2_tdata2[5] == lsu_match_data_2[5]; // @[el2_lib.scala 197:80] - wire _T_630 = _T_626 | _T_629; // @[el2_lib.scala 197:25] - wire _T_632 = &io_trigger_pkt_any_2_tdata2[5:0]; // @[el2_lib.scala 197:38] - wire _T_633 = _T_632 & _T_591; // @[el2_lib.scala 197:43] - wire _T_636 = io_trigger_pkt_any_2_tdata2[6] == lsu_match_data_2[6]; // @[el2_lib.scala 197:80] - wire _T_637 = _T_633 | _T_636; // @[el2_lib.scala 197:25] - wire _T_639 = &io_trigger_pkt_any_2_tdata2[6:0]; // @[el2_lib.scala 197:38] - wire _T_640 = _T_639 & _T_591; // @[el2_lib.scala 197:43] - wire _T_643 = io_trigger_pkt_any_2_tdata2[7] == lsu_match_data_2[7]; // @[el2_lib.scala 197:80] - wire _T_644 = _T_640 | _T_643; // @[el2_lib.scala 197:25] - wire _T_646 = &io_trigger_pkt_any_2_tdata2[7:0]; // @[el2_lib.scala 197:38] - wire _T_647 = _T_646 & _T_591; // @[el2_lib.scala 197:43] - wire _T_650 = io_trigger_pkt_any_2_tdata2[8] == lsu_match_data_2[8]; // @[el2_lib.scala 197:80] - wire _T_651 = _T_647 | _T_650; // @[el2_lib.scala 197:25] - wire _T_653 = &io_trigger_pkt_any_2_tdata2[8:0]; // @[el2_lib.scala 197:38] - wire _T_654 = _T_653 & _T_591; // @[el2_lib.scala 197:43] - wire _T_657 = io_trigger_pkt_any_2_tdata2[9] == lsu_match_data_2[9]; // @[el2_lib.scala 197:80] - wire _T_658 = _T_654 | _T_657; // @[el2_lib.scala 197:25] - wire _T_660 = &io_trigger_pkt_any_2_tdata2[9:0]; // @[el2_lib.scala 197:38] - wire _T_661 = _T_660 & _T_591; // @[el2_lib.scala 197:43] - wire _T_664 = io_trigger_pkt_any_2_tdata2[10] == lsu_match_data_2[10]; // @[el2_lib.scala 197:80] - wire _T_665 = _T_661 | _T_664; // @[el2_lib.scala 197:25] - wire _T_667 = &io_trigger_pkt_any_2_tdata2[10:0]; // @[el2_lib.scala 197:38] - wire _T_668 = _T_667 & _T_591; // @[el2_lib.scala 197:43] - wire _T_671 = io_trigger_pkt_any_2_tdata2[11] == lsu_match_data_2[11]; // @[el2_lib.scala 197:80] - wire _T_672 = _T_668 | _T_671; // @[el2_lib.scala 197:25] - wire _T_674 = &io_trigger_pkt_any_2_tdata2[11:0]; // @[el2_lib.scala 197:38] - wire _T_675 = _T_674 & _T_591; // @[el2_lib.scala 197:43] - wire _T_678 = io_trigger_pkt_any_2_tdata2[12] == lsu_match_data_2[12]; // @[el2_lib.scala 197:80] - wire _T_679 = _T_675 | _T_678; // @[el2_lib.scala 197:25] - wire _T_681 = &io_trigger_pkt_any_2_tdata2[12:0]; // @[el2_lib.scala 197:38] - wire _T_682 = _T_681 & _T_591; // @[el2_lib.scala 197:43] - wire _T_685 = io_trigger_pkt_any_2_tdata2[13] == lsu_match_data_2[13]; // @[el2_lib.scala 197:80] - wire _T_686 = _T_682 | _T_685; // @[el2_lib.scala 197:25] - wire _T_688 = &io_trigger_pkt_any_2_tdata2[13:0]; // @[el2_lib.scala 197:38] - wire _T_689 = _T_688 & _T_591; // @[el2_lib.scala 197:43] - wire _T_692 = io_trigger_pkt_any_2_tdata2[14] == lsu_match_data_2[14]; // @[el2_lib.scala 197:80] - wire _T_693 = _T_689 | _T_692; // @[el2_lib.scala 197:25] - wire _T_695 = &io_trigger_pkt_any_2_tdata2[14:0]; // @[el2_lib.scala 197:38] - wire _T_696 = _T_695 & _T_591; // @[el2_lib.scala 197:43] - wire _T_699 = io_trigger_pkt_any_2_tdata2[15] == lsu_match_data_2[15]; // @[el2_lib.scala 197:80] - wire _T_700 = _T_696 | _T_699; // @[el2_lib.scala 197:25] - wire _T_702 = &io_trigger_pkt_any_2_tdata2[15:0]; // @[el2_lib.scala 197:38] - wire _T_703 = _T_702 & _T_591; // @[el2_lib.scala 197:43] - wire _T_706 = io_trigger_pkt_any_2_tdata2[16] == lsu_match_data_2[16]; // @[el2_lib.scala 197:80] - wire _T_707 = _T_703 | _T_706; // @[el2_lib.scala 197:25] - wire _T_709 = &io_trigger_pkt_any_2_tdata2[16:0]; // @[el2_lib.scala 197:38] - wire _T_710 = _T_709 & _T_591; // @[el2_lib.scala 197:43] - wire _T_713 = io_trigger_pkt_any_2_tdata2[17] == lsu_match_data_2[17]; // @[el2_lib.scala 197:80] - wire _T_714 = _T_710 | _T_713; // @[el2_lib.scala 197:25] - wire _T_716 = &io_trigger_pkt_any_2_tdata2[17:0]; // @[el2_lib.scala 197:38] - wire _T_717 = _T_716 & _T_591; // @[el2_lib.scala 197:43] - wire _T_720 = io_trigger_pkt_any_2_tdata2[18] == lsu_match_data_2[18]; // @[el2_lib.scala 197:80] - wire _T_721 = _T_717 | _T_720; // @[el2_lib.scala 197:25] - wire _T_723 = &io_trigger_pkt_any_2_tdata2[18:0]; // @[el2_lib.scala 197:38] - wire _T_724 = _T_723 & _T_591; // @[el2_lib.scala 197:43] - wire _T_727 = io_trigger_pkt_any_2_tdata2[19] == lsu_match_data_2[19]; // @[el2_lib.scala 197:80] - wire _T_728 = _T_724 | _T_727; // @[el2_lib.scala 197:25] - wire _T_730 = &io_trigger_pkt_any_2_tdata2[19:0]; // @[el2_lib.scala 197:38] - wire _T_731 = _T_730 & _T_591; // @[el2_lib.scala 197:43] - wire _T_734 = io_trigger_pkt_any_2_tdata2[20] == lsu_match_data_2[20]; // @[el2_lib.scala 197:80] - wire _T_735 = _T_731 | _T_734; // @[el2_lib.scala 197:25] - wire _T_737 = &io_trigger_pkt_any_2_tdata2[20:0]; // @[el2_lib.scala 197:38] - wire _T_738 = _T_737 & _T_591; // @[el2_lib.scala 197:43] - wire _T_741 = io_trigger_pkt_any_2_tdata2[21] == lsu_match_data_2[21]; // @[el2_lib.scala 197:80] - wire _T_742 = _T_738 | _T_741; // @[el2_lib.scala 197:25] - wire _T_744 = &io_trigger_pkt_any_2_tdata2[21:0]; // @[el2_lib.scala 197:38] - wire _T_745 = _T_744 & _T_591; // @[el2_lib.scala 197:43] - wire _T_748 = io_trigger_pkt_any_2_tdata2[22] == lsu_match_data_2[22]; // @[el2_lib.scala 197:80] - wire _T_749 = _T_745 | _T_748; // @[el2_lib.scala 197:25] - wire _T_751 = &io_trigger_pkt_any_2_tdata2[22:0]; // @[el2_lib.scala 197:38] - wire _T_752 = _T_751 & _T_591; // @[el2_lib.scala 197:43] - wire _T_755 = io_trigger_pkt_any_2_tdata2[23] == lsu_match_data_2[23]; // @[el2_lib.scala 197:80] - wire _T_756 = _T_752 | _T_755; // @[el2_lib.scala 197:25] - wire _T_758 = &io_trigger_pkt_any_2_tdata2[23:0]; // @[el2_lib.scala 197:38] - wire _T_759 = _T_758 & _T_591; // @[el2_lib.scala 197:43] - wire _T_762 = io_trigger_pkt_any_2_tdata2[24] == lsu_match_data_2[24]; // @[el2_lib.scala 197:80] - wire _T_763 = _T_759 | _T_762; // @[el2_lib.scala 197:25] - wire _T_765 = &io_trigger_pkt_any_2_tdata2[24:0]; // @[el2_lib.scala 197:38] - wire _T_766 = _T_765 & _T_591; // @[el2_lib.scala 197:43] - wire _T_769 = io_trigger_pkt_any_2_tdata2[25] == lsu_match_data_2[25]; // @[el2_lib.scala 197:80] - wire _T_770 = _T_766 | _T_769; // @[el2_lib.scala 197:25] - wire _T_772 = &io_trigger_pkt_any_2_tdata2[25:0]; // @[el2_lib.scala 197:38] - wire _T_773 = _T_772 & _T_591; // @[el2_lib.scala 197:43] - wire _T_776 = io_trigger_pkt_any_2_tdata2[26] == lsu_match_data_2[26]; // @[el2_lib.scala 197:80] - wire _T_777 = _T_773 | _T_776; // @[el2_lib.scala 197:25] - wire _T_779 = &io_trigger_pkt_any_2_tdata2[26:0]; // @[el2_lib.scala 197:38] - wire _T_780 = _T_779 & _T_591; // @[el2_lib.scala 197:43] - wire _T_783 = io_trigger_pkt_any_2_tdata2[27] == lsu_match_data_2[27]; // @[el2_lib.scala 197:80] - wire _T_784 = _T_780 | _T_783; // @[el2_lib.scala 197:25] - wire _T_786 = &io_trigger_pkt_any_2_tdata2[27:0]; // @[el2_lib.scala 197:38] - wire _T_787 = _T_786 & _T_591; // @[el2_lib.scala 197:43] - wire _T_790 = io_trigger_pkt_any_2_tdata2[28] == lsu_match_data_2[28]; // @[el2_lib.scala 197:80] - wire _T_791 = _T_787 | _T_790; // @[el2_lib.scala 197:25] - wire _T_793 = &io_trigger_pkt_any_2_tdata2[28:0]; // @[el2_lib.scala 197:38] - wire _T_794 = _T_793 & _T_591; // @[el2_lib.scala 197:43] - wire _T_797 = io_trigger_pkt_any_2_tdata2[29] == lsu_match_data_2[29]; // @[el2_lib.scala 197:80] - wire _T_798 = _T_794 | _T_797; // @[el2_lib.scala 197:25] - wire _T_800 = &io_trigger_pkt_any_2_tdata2[29:0]; // @[el2_lib.scala 197:38] - wire _T_801 = _T_800 & _T_591; // @[el2_lib.scala 197:43] - wire _T_804 = io_trigger_pkt_any_2_tdata2[30] == lsu_match_data_2[30]; // @[el2_lib.scala 197:80] - wire _T_805 = _T_801 | _T_804; // @[el2_lib.scala 197:25] - wire _T_807 = &io_trigger_pkt_any_2_tdata2[30:0]; // @[el2_lib.scala 197:38] - wire _T_808 = _T_807 & _T_591; // @[el2_lib.scala 197:43] - wire _T_811 = io_trigger_pkt_any_2_tdata2[31] == lsu_match_data_2[31]; // @[el2_lib.scala 197:80] - wire _T_812 = _T_808 | _T_811; // @[el2_lib.scala 197:25] - wire [7:0] _T_819 = {_T_644,_T_637,_T_630,_T_623,_T_616,_T_609,_T_602,_T_595}; // @[el2_lib.scala 198:14] - wire [15:0] _T_827 = {_T_700,_T_693,_T_686,_T_679,_T_672,_T_665,_T_658,_T_651,_T_819}; // @[el2_lib.scala 198:14] - wire [7:0] _T_834 = {_T_756,_T_749,_T_742,_T_735,_T_728,_T_721,_T_714,_T_707}; // @[el2_lib.scala 198:14] - wire [31:0] _T_843 = {_T_812,_T_805,_T_798,_T_791,_T_784,_T_777,_T_770,_T_763,_T_834,_T_827}; // @[el2_lib.scala 198:14] - wire [31:0] _GEN_8 = {{31'd0}, _T_586}; // @[el2_lsu_trigger.scala 22:86] - wire [31:0] _T_844 = _GEN_8 & _T_843; // @[el2_lsu_trigger.scala 22:86] - wire [31:0] _GEN_9 = {{31'd0}, _T_583}; // @[el2_lsu_trigger.scala 21:141] - wire [31:0] _T_845 = _GEN_9 | _T_844; // @[el2_lsu_trigger.scala 21:141] - wire _T_848 = io_trigger_pkt_any_3_store & io_lsu_pkt_m_store; // @[el2_lsu_trigger.scala 21:120] - wire _T_849 = _T_49 & _T_848; // @[el2_lsu_trigger.scala 21:89] - wire _T_850 = io_trigger_pkt_any_3_load & io_lsu_pkt_m_load; // @[el2_lsu_trigger.scala 22:33] - wire _T_852 = _T_850 & _T_38; // @[el2_lsu_trigger.scala 22:53] - wire _T_855 = &io_trigger_pkt_any_3_tdata2; // @[el2_lib.scala 194:45] - wire _T_856 = ~_T_855; // @[el2_lib.scala 194:39] - wire _T_857 = io_trigger_pkt_any_3_match_ & _T_856; // @[el2_lib.scala 194:37] - wire _T_860 = io_trigger_pkt_any_3_tdata2[0] == lsu_match_data_3[0]; // @[el2_lib.scala 195:52] - wire _T_861 = _T_857 | _T_860; // @[el2_lib.scala 195:41] - wire _T_863 = &io_trigger_pkt_any_3_tdata2[0]; // @[el2_lib.scala 197:38] - wire _T_864 = _T_863 & _T_857; // @[el2_lib.scala 197:43] - wire _T_867 = io_trigger_pkt_any_3_tdata2[1] == lsu_match_data_3[1]; // @[el2_lib.scala 197:80] - wire _T_868 = _T_864 | _T_867; // @[el2_lib.scala 197:25] - wire _T_870 = &io_trigger_pkt_any_3_tdata2[1:0]; // @[el2_lib.scala 197:38] - wire _T_871 = _T_870 & _T_857; // @[el2_lib.scala 197:43] - wire _T_874 = io_trigger_pkt_any_3_tdata2[2] == lsu_match_data_3[2]; // @[el2_lib.scala 197:80] - wire _T_875 = _T_871 | _T_874; // @[el2_lib.scala 197:25] - wire _T_877 = &io_trigger_pkt_any_3_tdata2[2:0]; // @[el2_lib.scala 197:38] - wire _T_878 = _T_877 & _T_857; // @[el2_lib.scala 197:43] - wire _T_881 = io_trigger_pkt_any_3_tdata2[3] == lsu_match_data_3[3]; // @[el2_lib.scala 197:80] - wire _T_882 = _T_878 | _T_881; // @[el2_lib.scala 197:25] - wire _T_884 = &io_trigger_pkt_any_3_tdata2[3:0]; // @[el2_lib.scala 197:38] - wire _T_885 = _T_884 & _T_857; // @[el2_lib.scala 197:43] - wire _T_888 = io_trigger_pkt_any_3_tdata2[4] == lsu_match_data_3[4]; // @[el2_lib.scala 197:80] - wire _T_889 = _T_885 | _T_888; // @[el2_lib.scala 197:25] - wire _T_891 = &io_trigger_pkt_any_3_tdata2[4:0]; // @[el2_lib.scala 197:38] - wire _T_892 = _T_891 & _T_857; // @[el2_lib.scala 197:43] - wire _T_895 = io_trigger_pkt_any_3_tdata2[5] == lsu_match_data_3[5]; // @[el2_lib.scala 197:80] - wire _T_896 = _T_892 | _T_895; // @[el2_lib.scala 197:25] - wire _T_898 = &io_trigger_pkt_any_3_tdata2[5:0]; // @[el2_lib.scala 197:38] - wire _T_899 = _T_898 & _T_857; // @[el2_lib.scala 197:43] - wire _T_902 = io_trigger_pkt_any_3_tdata2[6] == lsu_match_data_3[6]; // @[el2_lib.scala 197:80] - wire _T_903 = _T_899 | _T_902; // @[el2_lib.scala 197:25] - wire _T_905 = &io_trigger_pkt_any_3_tdata2[6:0]; // @[el2_lib.scala 197:38] - wire _T_906 = _T_905 & _T_857; // @[el2_lib.scala 197:43] - wire _T_909 = io_trigger_pkt_any_3_tdata2[7] == lsu_match_data_3[7]; // @[el2_lib.scala 197:80] - wire _T_910 = _T_906 | _T_909; // @[el2_lib.scala 197:25] - wire _T_912 = &io_trigger_pkt_any_3_tdata2[7:0]; // @[el2_lib.scala 197:38] - wire _T_913 = _T_912 & _T_857; // @[el2_lib.scala 197:43] - wire _T_916 = io_trigger_pkt_any_3_tdata2[8] == lsu_match_data_3[8]; // @[el2_lib.scala 197:80] - wire _T_917 = _T_913 | _T_916; // @[el2_lib.scala 197:25] - wire _T_919 = &io_trigger_pkt_any_3_tdata2[8:0]; // @[el2_lib.scala 197:38] - wire _T_920 = _T_919 & _T_857; // @[el2_lib.scala 197:43] - wire _T_923 = io_trigger_pkt_any_3_tdata2[9] == lsu_match_data_3[9]; // @[el2_lib.scala 197:80] - wire _T_924 = _T_920 | _T_923; // @[el2_lib.scala 197:25] - wire _T_926 = &io_trigger_pkt_any_3_tdata2[9:0]; // @[el2_lib.scala 197:38] - wire _T_927 = _T_926 & _T_857; // @[el2_lib.scala 197:43] - wire _T_930 = io_trigger_pkt_any_3_tdata2[10] == lsu_match_data_3[10]; // @[el2_lib.scala 197:80] - wire _T_931 = _T_927 | _T_930; // @[el2_lib.scala 197:25] - wire _T_933 = &io_trigger_pkt_any_3_tdata2[10:0]; // @[el2_lib.scala 197:38] - wire _T_934 = _T_933 & _T_857; // @[el2_lib.scala 197:43] - wire _T_937 = io_trigger_pkt_any_3_tdata2[11] == lsu_match_data_3[11]; // @[el2_lib.scala 197:80] - wire _T_938 = _T_934 | _T_937; // @[el2_lib.scala 197:25] - wire _T_940 = &io_trigger_pkt_any_3_tdata2[11:0]; // @[el2_lib.scala 197:38] - wire _T_941 = _T_940 & _T_857; // @[el2_lib.scala 197:43] - wire _T_944 = io_trigger_pkt_any_3_tdata2[12] == lsu_match_data_3[12]; // @[el2_lib.scala 197:80] - wire _T_945 = _T_941 | _T_944; // @[el2_lib.scala 197:25] - wire _T_947 = &io_trigger_pkt_any_3_tdata2[12:0]; // @[el2_lib.scala 197:38] - wire _T_948 = _T_947 & _T_857; // @[el2_lib.scala 197:43] - wire _T_951 = io_trigger_pkt_any_3_tdata2[13] == lsu_match_data_3[13]; // @[el2_lib.scala 197:80] - wire _T_952 = _T_948 | _T_951; // @[el2_lib.scala 197:25] - wire _T_954 = &io_trigger_pkt_any_3_tdata2[13:0]; // @[el2_lib.scala 197:38] - wire _T_955 = _T_954 & _T_857; // @[el2_lib.scala 197:43] - wire _T_958 = io_trigger_pkt_any_3_tdata2[14] == lsu_match_data_3[14]; // @[el2_lib.scala 197:80] - wire _T_959 = _T_955 | _T_958; // @[el2_lib.scala 197:25] - wire _T_961 = &io_trigger_pkt_any_3_tdata2[14:0]; // @[el2_lib.scala 197:38] - wire _T_962 = _T_961 & _T_857; // @[el2_lib.scala 197:43] - wire _T_965 = io_trigger_pkt_any_3_tdata2[15] == lsu_match_data_3[15]; // @[el2_lib.scala 197:80] - wire _T_966 = _T_962 | _T_965; // @[el2_lib.scala 197:25] - wire _T_968 = &io_trigger_pkt_any_3_tdata2[15:0]; // @[el2_lib.scala 197:38] - wire _T_969 = _T_968 & _T_857; // @[el2_lib.scala 197:43] - wire _T_972 = io_trigger_pkt_any_3_tdata2[16] == lsu_match_data_3[16]; // @[el2_lib.scala 197:80] - wire _T_973 = _T_969 | _T_972; // @[el2_lib.scala 197:25] - wire _T_975 = &io_trigger_pkt_any_3_tdata2[16:0]; // @[el2_lib.scala 197:38] - wire _T_976 = _T_975 & _T_857; // @[el2_lib.scala 197:43] - wire _T_979 = io_trigger_pkt_any_3_tdata2[17] == lsu_match_data_3[17]; // @[el2_lib.scala 197:80] - wire _T_980 = _T_976 | _T_979; // @[el2_lib.scala 197:25] - wire _T_982 = &io_trigger_pkt_any_3_tdata2[17:0]; // @[el2_lib.scala 197:38] - wire _T_983 = _T_982 & _T_857; // @[el2_lib.scala 197:43] - wire _T_986 = io_trigger_pkt_any_3_tdata2[18] == lsu_match_data_3[18]; // @[el2_lib.scala 197:80] - wire _T_987 = _T_983 | _T_986; // @[el2_lib.scala 197:25] - wire _T_989 = &io_trigger_pkt_any_3_tdata2[18:0]; // @[el2_lib.scala 197:38] - wire _T_990 = _T_989 & _T_857; // @[el2_lib.scala 197:43] - wire _T_993 = io_trigger_pkt_any_3_tdata2[19] == lsu_match_data_3[19]; // @[el2_lib.scala 197:80] - wire _T_994 = _T_990 | _T_993; // @[el2_lib.scala 197:25] - wire _T_996 = &io_trigger_pkt_any_3_tdata2[19:0]; // @[el2_lib.scala 197:38] - wire _T_997 = _T_996 & _T_857; // @[el2_lib.scala 197:43] - wire _T_1000 = io_trigger_pkt_any_3_tdata2[20] == lsu_match_data_3[20]; // @[el2_lib.scala 197:80] - wire _T_1001 = _T_997 | _T_1000; // @[el2_lib.scala 197:25] - wire _T_1003 = &io_trigger_pkt_any_3_tdata2[20:0]; // @[el2_lib.scala 197:38] - wire _T_1004 = _T_1003 & _T_857; // @[el2_lib.scala 197:43] - wire _T_1007 = io_trigger_pkt_any_3_tdata2[21] == lsu_match_data_3[21]; // @[el2_lib.scala 197:80] - wire _T_1008 = _T_1004 | _T_1007; // @[el2_lib.scala 197:25] - wire _T_1010 = &io_trigger_pkt_any_3_tdata2[21:0]; // @[el2_lib.scala 197:38] - wire _T_1011 = _T_1010 & _T_857; // @[el2_lib.scala 197:43] - wire _T_1014 = io_trigger_pkt_any_3_tdata2[22] == lsu_match_data_3[22]; // @[el2_lib.scala 197:80] - wire _T_1015 = _T_1011 | _T_1014; // @[el2_lib.scala 197:25] - wire _T_1017 = &io_trigger_pkt_any_3_tdata2[22:0]; // @[el2_lib.scala 197:38] - wire _T_1018 = _T_1017 & _T_857; // @[el2_lib.scala 197:43] - wire _T_1021 = io_trigger_pkt_any_3_tdata2[23] == lsu_match_data_3[23]; // @[el2_lib.scala 197:80] - wire _T_1022 = _T_1018 | _T_1021; // @[el2_lib.scala 197:25] - wire _T_1024 = &io_trigger_pkt_any_3_tdata2[23:0]; // @[el2_lib.scala 197:38] - wire _T_1025 = _T_1024 & _T_857; // @[el2_lib.scala 197:43] - wire _T_1028 = io_trigger_pkt_any_3_tdata2[24] == lsu_match_data_3[24]; // @[el2_lib.scala 197:80] - wire _T_1029 = _T_1025 | _T_1028; // @[el2_lib.scala 197:25] - wire _T_1031 = &io_trigger_pkt_any_3_tdata2[24:0]; // @[el2_lib.scala 197:38] - wire _T_1032 = _T_1031 & _T_857; // @[el2_lib.scala 197:43] - wire _T_1035 = io_trigger_pkt_any_3_tdata2[25] == lsu_match_data_3[25]; // @[el2_lib.scala 197:80] - wire _T_1036 = _T_1032 | _T_1035; // @[el2_lib.scala 197:25] - wire _T_1038 = &io_trigger_pkt_any_3_tdata2[25:0]; // @[el2_lib.scala 197:38] - wire _T_1039 = _T_1038 & _T_857; // @[el2_lib.scala 197:43] - wire _T_1042 = io_trigger_pkt_any_3_tdata2[26] == lsu_match_data_3[26]; // @[el2_lib.scala 197:80] - wire _T_1043 = _T_1039 | _T_1042; // @[el2_lib.scala 197:25] - wire _T_1045 = &io_trigger_pkt_any_3_tdata2[26:0]; // @[el2_lib.scala 197:38] - wire _T_1046 = _T_1045 & _T_857; // @[el2_lib.scala 197:43] - wire _T_1049 = io_trigger_pkt_any_3_tdata2[27] == lsu_match_data_3[27]; // @[el2_lib.scala 197:80] - wire _T_1050 = _T_1046 | _T_1049; // @[el2_lib.scala 197:25] - wire _T_1052 = &io_trigger_pkt_any_3_tdata2[27:0]; // @[el2_lib.scala 197:38] - wire _T_1053 = _T_1052 & _T_857; // @[el2_lib.scala 197:43] - wire _T_1056 = io_trigger_pkt_any_3_tdata2[28] == lsu_match_data_3[28]; // @[el2_lib.scala 197:80] - wire _T_1057 = _T_1053 | _T_1056; // @[el2_lib.scala 197:25] - wire _T_1059 = &io_trigger_pkt_any_3_tdata2[28:0]; // @[el2_lib.scala 197:38] - wire _T_1060 = _T_1059 & _T_857; // @[el2_lib.scala 197:43] - wire _T_1063 = io_trigger_pkt_any_3_tdata2[29] == lsu_match_data_3[29]; // @[el2_lib.scala 197:80] - wire _T_1064 = _T_1060 | _T_1063; // @[el2_lib.scala 197:25] - wire _T_1066 = &io_trigger_pkt_any_3_tdata2[29:0]; // @[el2_lib.scala 197:38] - wire _T_1067 = _T_1066 & _T_857; // @[el2_lib.scala 197:43] - wire _T_1070 = io_trigger_pkt_any_3_tdata2[30] == lsu_match_data_3[30]; // @[el2_lib.scala 197:80] - wire _T_1071 = _T_1067 | _T_1070; // @[el2_lib.scala 197:25] - wire _T_1073 = &io_trigger_pkt_any_3_tdata2[30:0]; // @[el2_lib.scala 197:38] - wire _T_1074 = _T_1073 & _T_857; // @[el2_lib.scala 197:43] - wire _T_1077 = io_trigger_pkt_any_3_tdata2[31] == lsu_match_data_3[31]; // @[el2_lib.scala 197:80] - wire _T_1078 = _T_1074 | _T_1077; // @[el2_lib.scala 197:25] - wire [7:0] _T_1085 = {_T_910,_T_903,_T_896,_T_889,_T_882,_T_875,_T_868,_T_861}; // @[el2_lib.scala 198:14] - wire [15:0] _T_1093 = {_T_966,_T_959,_T_952,_T_945,_T_938,_T_931,_T_924,_T_917,_T_1085}; // @[el2_lib.scala 198:14] - wire [7:0] _T_1100 = {_T_1022,_T_1015,_T_1008,_T_1001,_T_994,_T_987,_T_980,_T_973}; // @[el2_lib.scala 198:14] - wire [31:0] _T_1109 = {_T_1078,_T_1071,_T_1064,_T_1057,_T_1050,_T_1043,_T_1036,_T_1029,_T_1100,_T_1093}; // @[el2_lib.scala 198:14] - wire [31:0] _GEN_10 = {{31'd0}, _T_852}; // @[el2_lsu_trigger.scala 22:86] - wire [31:0] _T_1110 = _GEN_10 & _T_1109; // @[el2_lsu_trigger.scala 22:86] - wire [31:0] _GEN_11 = {{31'd0}, _T_849}; // @[el2_lsu_trigger.scala 21:141] - wire [31:0] _T_1111 = _GEN_11 | _T_1110; // @[el2_lsu_trigger.scala 21:141] - wire [127:0] _T_1114 = {_T_1111,_T_845,_T_579,_T_313}; // @[Cat.scala 29:58] - assign io_lsu_trigger_match_m = _T_1114[3:0]; // @[el2_lsu_trigger.scala 16:25 el2_lsu_trigger.scala 21:26] + wire _T_12 = ~io_trigger_pkt_any_0_select; // @[el2_lsu_trigger.scala 19:53] + wire _T_13 = io_trigger_pkt_any_0_select & io_trigger_pkt_any_0_store; // @[el2_lsu_trigger.scala 19:136] + wire [31:0] _T_15 = _T_12 ? io_lsu_addr_m : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_16 = _T_13 ? store_data_trigger_m : 32'h0; // @[Mux.scala 27:72] + wire [31:0] lsu_match_data_0 = _T_15 | _T_16; // @[Mux.scala 27:72] + wire _T_19 = ~io_trigger_pkt_any_1_select; // @[el2_lsu_trigger.scala 19:53] + wire _T_20 = io_trigger_pkt_any_1_select & io_trigger_pkt_any_1_store; // @[el2_lsu_trigger.scala 19:136] + wire [31:0] _T_22 = _T_19 ? io_lsu_addr_m : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_23 = _T_20 ? store_data_trigger_m : 32'h0; // @[Mux.scala 27:72] + wire [31:0] lsu_match_data_1 = _T_22 | _T_23; // @[Mux.scala 27:72] + wire _T_26 = ~io_trigger_pkt_any_2_select; // @[el2_lsu_trigger.scala 19:53] + wire _T_27 = io_trigger_pkt_any_2_select & io_trigger_pkt_any_2_store; // @[el2_lsu_trigger.scala 19:136] + wire [31:0] _T_29 = _T_26 ? io_lsu_addr_m : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_30 = _T_27 ? store_data_trigger_m : 32'h0; // @[Mux.scala 27:72] + wire [31:0] lsu_match_data_2 = _T_29 | _T_30; // @[Mux.scala 27:72] + wire _T_33 = ~io_trigger_pkt_any_3_select; // @[el2_lsu_trigger.scala 19:53] + wire _T_34 = io_trigger_pkt_any_3_select & io_trigger_pkt_any_3_store; // @[el2_lsu_trigger.scala 19:136] + wire [31:0] _T_36 = _T_33 ? io_lsu_addr_m : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_37 = _T_34 ? store_data_trigger_m : 32'h0; // @[Mux.scala 27:72] + wire [31:0] lsu_match_data_3 = _T_36 | _T_37; // @[Mux.scala 27:72] + wire _T_39 = ~io_lsu_pkt_m_dma; // @[el2_lsu_trigger.scala 20:71] + wire _T_40 = io_lsu_pkt_m_valid & _T_39; // @[el2_lsu_trigger.scala 20:69] + wire _T_41 = io_trigger_pkt_any_0_store & io_lsu_pkt_m_store; // @[el2_lsu_trigger.scala 20:121] + wire _T_42 = io_trigger_pkt_any_0_load & io_lsu_pkt_m_load; // @[el2_lsu_trigger.scala 21:33] + wire _T_44 = _T_42 & _T_12; // @[el2_lsu_trigger.scala 21:53] + wire _T_45 = _T_41 | _T_44; // @[el2_lsu_trigger.scala 20:142] + wire _T_46 = _T_40 & _T_45; // @[el2_lsu_trigger.scala 20:89] + wire _T_51 = &io_trigger_pkt_any_0_tdata2; // @[el2_lib.scala 203:73] + wire _T_52 = ~_T_51; // @[el2_lib.scala 203:47] + wire _T_53 = io_trigger_pkt_any_0_match_ & _T_52; // @[el2_lib.scala 203:44] + wire _T_56 = io_trigger_pkt_any_0_tdata2[0] == lsu_match_data_0[0]; // @[el2_lib.scala 204:52] + wire _T_57 = _T_53 | _T_56; // @[el2_lib.scala 204:41] + wire _T_59 = &io_trigger_pkt_any_0_tdata2[0]; // @[el2_lib.scala 206:37] + wire _T_60 = _T_59 & _T_53; // @[el2_lib.scala 206:42] + wire _T_63 = io_trigger_pkt_any_0_tdata2[1] == lsu_match_data_0[1]; // @[el2_lib.scala 206:79] + wire _T_64 = _T_60 | _T_63; // @[el2_lib.scala 206:24] + wire _T_66 = &io_trigger_pkt_any_0_tdata2[1:0]; // @[el2_lib.scala 206:37] + wire _T_67 = _T_66 & _T_53; // @[el2_lib.scala 206:42] + wire _T_70 = io_trigger_pkt_any_0_tdata2[2] == lsu_match_data_0[2]; // @[el2_lib.scala 206:79] + wire _T_71 = _T_67 | _T_70; // @[el2_lib.scala 206:24] + wire _T_73 = &io_trigger_pkt_any_0_tdata2[2:0]; // @[el2_lib.scala 206:37] + wire _T_74 = _T_73 & _T_53; // @[el2_lib.scala 206:42] + wire _T_77 = io_trigger_pkt_any_0_tdata2[3] == lsu_match_data_0[3]; // @[el2_lib.scala 206:79] + wire _T_78 = _T_74 | _T_77; // @[el2_lib.scala 206:24] + wire _T_80 = &io_trigger_pkt_any_0_tdata2[3:0]; // @[el2_lib.scala 206:37] + wire _T_81 = _T_80 & _T_53; // @[el2_lib.scala 206:42] + wire _T_84 = io_trigger_pkt_any_0_tdata2[4] == lsu_match_data_0[4]; // @[el2_lib.scala 206:79] + wire _T_85 = _T_81 | _T_84; // @[el2_lib.scala 206:24] + wire _T_87 = &io_trigger_pkt_any_0_tdata2[4:0]; // @[el2_lib.scala 206:37] + wire _T_88 = _T_87 & _T_53; // @[el2_lib.scala 206:42] + wire _T_91 = io_trigger_pkt_any_0_tdata2[5] == lsu_match_data_0[5]; // @[el2_lib.scala 206:79] + wire _T_92 = _T_88 | _T_91; // @[el2_lib.scala 206:24] + wire _T_94 = &io_trigger_pkt_any_0_tdata2[5:0]; // @[el2_lib.scala 206:37] + wire _T_95 = _T_94 & _T_53; // @[el2_lib.scala 206:42] + wire _T_98 = io_trigger_pkt_any_0_tdata2[6] == lsu_match_data_0[6]; // @[el2_lib.scala 206:79] + wire _T_99 = _T_95 | _T_98; // @[el2_lib.scala 206:24] + wire _T_101 = &io_trigger_pkt_any_0_tdata2[6:0]; // @[el2_lib.scala 206:37] + wire _T_102 = _T_101 & _T_53; // @[el2_lib.scala 206:42] + wire _T_105 = io_trigger_pkt_any_0_tdata2[7] == lsu_match_data_0[7]; // @[el2_lib.scala 206:79] + wire _T_106 = _T_102 | _T_105; // @[el2_lib.scala 206:24] + wire _T_108 = &io_trigger_pkt_any_0_tdata2[7:0]; // @[el2_lib.scala 206:37] + wire _T_109 = _T_108 & _T_53; // @[el2_lib.scala 206:42] + wire _T_112 = io_trigger_pkt_any_0_tdata2[8] == lsu_match_data_0[8]; // @[el2_lib.scala 206:79] + wire _T_113 = _T_109 | _T_112; // @[el2_lib.scala 206:24] + wire _T_115 = &io_trigger_pkt_any_0_tdata2[8:0]; // @[el2_lib.scala 206:37] + wire _T_116 = _T_115 & _T_53; // @[el2_lib.scala 206:42] + wire _T_119 = io_trigger_pkt_any_0_tdata2[9] == lsu_match_data_0[9]; // @[el2_lib.scala 206:79] + wire _T_120 = _T_116 | _T_119; // @[el2_lib.scala 206:24] + wire _T_122 = &io_trigger_pkt_any_0_tdata2[9:0]; // @[el2_lib.scala 206:37] + wire _T_123 = _T_122 & _T_53; // @[el2_lib.scala 206:42] + wire _T_126 = io_trigger_pkt_any_0_tdata2[10] == lsu_match_data_0[10]; // @[el2_lib.scala 206:79] + wire _T_127 = _T_123 | _T_126; // @[el2_lib.scala 206:24] + wire _T_129 = &io_trigger_pkt_any_0_tdata2[10:0]; // @[el2_lib.scala 206:37] + wire _T_130 = _T_129 & _T_53; // @[el2_lib.scala 206:42] + wire _T_133 = io_trigger_pkt_any_0_tdata2[11] == lsu_match_data_0[11]; // @[el2_lib.scala 206:79] + wire _T_134 = _T_130 | _T_133; // @[el2_lib.scala 206:24] + wire _T_136 = &io_trigger_pkt_any_0_tdata2[11:0]; // @[el2_lib.scala 206:37] + wire _T_137 = _T_136 & _T_53; // @[el2_lib.scala 206:42] + wire _T_140 = io_trigger_pkt_any_0_tdata2[12] == lsu_match_data_0[12]; // @[el2_lib.scala 206:79] + wire _T_141 = _T_137 | _T_140; // @[el2_lib.scala 206:24] + wire _T_143 = &io_trigger_pkt_any_0_tdata2[12:0]; // @[el2_lib.scala 206:37] + wire _T_144 = _T_143 & _T_53; // @[el2_lib.scala 206:42] + wire _T_147 = io_trigger_pkt_any_0_tdata2[13] == lsu_match_data_0[13]; // @[el2_lib.scala 206:79] + wire _T_148 = _T_144 | _T_147; // @[el2_lib.scala 206:24] + wire _T_150 = &io_trigger_pkt_any_0_tdata2[13:0]; // @[el2_lib.scala 206:37] + wire _T_151 = _T_150 & _T_53; // @[el2_lib.scala 206:42] + wire _T_154 = io_trigger_pkt_any_0_tdata2[14] == lsu_match_data_0[14]; // @[el2_lib.scala 206:79] + wire _T_155 = _T_151 | _T_154; // @[el2_lib.scala 206:24] + wire _T_157 = &io_trigger_pkt_any_0_tdata2[14:0]; // @[el2_lib.scala 206:37] + wire _T_158 = _T_157 & _T_53; // @[el2_lib.scala 206:42] + wire _T_161 = io_trigger_pkt_any_0_tdata2[15] == lsu_match_data_0[15]; // @[el2_lib.scala 206:79] + wire _T_162 = _T_158 | _T_161; // @[el2_lib.scala 206:24] + wire _T_164 = &io_trigger_pkt_any_0_tdata2[15:0]; // @[el2_lib.scala 206:37] + wire _T_165 = _T_164 & _T_53; // @[el2_lib.scala 206:42] + wire _T_168 = io_trigger_pkt_any_0_tdata2[16] == lsu_match_data_0[16]; // @[el2_lib.scala 206:79] + wire _T_169 = _T_165 | _T_168; // @[el2_lib.scala 206:24] + wire _T_171 = &io_trigger_pkt_any_0_tdata2[16:0]; // @[el2_lib.scala 206:37] + wire _T_172 = _T_171 & _T_53; // @[el2_lib.scala 206:42] + wire _T_175 = io_trigger_pkt_any_0_tdata2[17] == lsu_match_data_0[17]; // @[el2_lib.scala 206:79] + wire _T_176 = _T_172 | _T_175; // @[el2_lib.scala 206:24] + wire _T_178 = &io_trigger_pkt_any_0_tdata2[17:0]; // @[el2_lib.scala 206:37] + wire _T_179 = _T_178 & _T_53; // @[el2_lib.scala 206:42] + wire _T_182 = io_trigger_pkt_any_0_tdata2[18] == lsu_match_data_0[18]; // @[el2_lib.scala 206:79] + wire _T_183 = _T_179 | _T_182; // @[el2_lib.scala 206:24] + wire _T_185 = &io_trigger_pkt_any_0_tdata2[18:0]; // @[el2_lib.scala 206:37] + wire _T_186 = _T_185 & _T_53; // @[el2_lib.scala 206:42] + wire _T_189 = io_trigger_pkt_any_0_tdata2[19] == lsu_match_data_0[19]; // @[el2_lib.scala 206:79] + wire _T_190 = _T_186 | _T_189; // @[el2_lib.scala 206:24] + wire _T_192 = &io_trigger_pkt_any_0_tdata2[19:0]; // @[el2_lib.scala 206:37] + wire _T_193 = _T_192 & _T_53; // @[el2_lib.scala 206:42] + wire _T_196 = io_trigger_pkt_any_0_tdata2[20] == lsu_match_data_0[20]; // @[el2_lib.scala 206:79] + wire _T_197 = _T_193 | _T_196; // @[el2_lib.scala 206:24] + wire _T_199 = &io_trigger_pkt_any_0_tdata2[20:0]; // @[el2_lib.scala 206:37] + wire _T_200 = _T_199 & _T_53; // @[el2_lib.scala 206:42] + wire _T_203 = io_trigger_pkt_any_0_tdata2[21] == lsu_match_data_0[21]; // @[el2_lib.scala 206:79] + wire _T_204 = _T_200 | _T_203; // @[el2_lib.scala 206:24] + wire _T_206 = &io_trigger_pkt_any_0_tdata2[21:0]; // @[el2_lib.scala 206:37] + wire _T_207 = _T_206 & _T_53; // @[el2_lib.scala 206:42] + wire _T_210 = io_trigger_pkt_any_0_tdata2[22] == lsu_match_data_0[22]; // @[el2_lib.scala 206:79] + wire _T_211 = _T_207 | _T_210; // @[el2_lib.scala 206:24] + wire _T_213 = &io_trigger_pkt_any_0_tdata2[22:0]; // @[el2_lib.scala 206:37] + wire _T_214 = _T_213 & _T_53; // @[el2_lib.scala 206:42] + wire _T_217 = io_trigger_pkt_any_0_tdata2[23] == lsu_match_data_0[23]; // @[el2_lib.scala 206:79] + wire _T_218 = _T_214 | _T_217; // @[el2_lib.scala 206:24] + wire _T_220 = &io_trigger_pkt_any_0_tdata2[23:0]; // @[el2_lib.scala 206:37] + wire _T_221 = _T_220 & _T_53; // @[el2_lib.scala 206:42] + wire _T_224 = io_trigger_pkt_any_0_tdata2[24] == lsu_match_data_0[24]; // @[el2_lib.scala 206:79] + wire _T_225 = _T_221 | _T_224; // @[el2_lib.scala 206:24] + wire _T_227 = &io_trigger_pkt_any_0_tdata2[24:0]; // @[el2_lib.scala 206:37] + wire _T_228 = _T_227 & _T_53; // @[el2_lib.scala 206:42] + wire _T_231 = io_trigger_pkt_any_0_tdata2[25] == lsu_match_data_0[25]; // @[el2_lib.scala 206:79] + wire _T_232 = _T_228 | _T_231; // @[el2_lib.scala 206:24] + wire _T_234 = &io_trigger_pkt_any_0_tdata2[25:0]; // @[el2_lib.scala 206:37] + wire _T_235 = _T_234 & _T_53; // @[el2_lib.scala 206:42] + wire _T_238 = io_trigger_pkt_any_0_tdata2[26] == lsu_match_data_0[26]; // @[el2_lib.scala 206:79] + wire _T_239 = _T_235 | _T_238; // @[el2_lib.scala 206:24] + wire _T_241 = &io_trigger_pkt_any_0_tdata2[26:0]; // @[el2_lib.scala 206:37] + wire _T_242 = _T_241 & _T_53; // @[el2_lib.scala 206:42] + wire _T_245 = io_trigger_pkt_any_0_tdata2[27] == lsu_match_data_0[27]; // @[el2_lib.scala 206:79] + wire _T_246 = _T_242 | _T_245; // @[el2_lib.scala 206:24] + wire _T_248 = &io_trigger_pkt_any_0_tdata2[27:0]; // @[el2_lib.scala 206:37] + wire _T_249 = _T_248 & _T_53; // @[el2_lib.scala 206:42] + wire _T_252 = io_trigger_pkt_any_0_tdata2[28] == lsu_match_data_0[28]; // @[el2_lib.scala 206:79] + wire _T_253 = _T_249 | _T_252; // @[el2_lib.scala 206:24] + wire _T_255 = &io_trigger_pkt_any_0_tdata2[28:0]; // @[el2_lib.scala 206:37] + wire _T_256 = _T_255 & _T_53; // @[el2_lib.scala 206:42] + wire _T_259 = io_trigger_pkt_any_0_tdata2[29] == lsu_match_data_0[29]; // @[el2_lib.scala 206:79] + wire _T_260 = _T_256 | _T_259; // @[el2_lib.scala 206:24] + wire _T_262 = &io_trigger_pkt_any_0_tdata2[29:0]; // @[el2_lib.scala 206:37] + wire _T_263 = _T_262 & _T_53; // @[el2_lib.scala 206:42] + wire _T_266 = io_trigger_pkt_any_0_tdata2[30] == lsu_match_data_0[30]; // @[el2_lib.scala 206:79] + wire _T_267 = _T_263 | _T_266; // @[el2_lib.scala 206:24] + wire _T_269 = &io_trigger_pkt_any_0_tdata2[30:0]; // @[el2_lib.scala 206:37] + wire _T_270 = _T_269 & _T_53; // @[el2_lib.scala 206:42] + wire _T_273 = io_trigger_pkt_any_0_tdata2[31] == lsu_match_data_0[31]; // @[el2_lib.scala 206:79] + wire _T_274 = _T_270 | _T_273; // @[el2_lib.scala 206:24] + wire [7:0] _T_281 = {_T_106,_T_99,_T_92,_T_85,_T_78,_T_71,_T_64,_T_57}; // @[el2_lib.scala 207:14] + wire [15:0] _T_289 = {_T_162,_T_155,_T_148,_T_141,_T_134,_T_127,_T_120,_T_113,_T_281}; // @[el2_lib.scala 207:14] + wire [7:0] _T_296 = {_T_218,_T_211,_T_204,_T_197,_T_190,_T_183,_T_176,_T_169}; // @[el2_lib.scala 207:14] + wire [31:0] _T_305 = {_T_274,_T_267,_T_260,_T_253,_T_246,_T_239,_T_232,_T_225,_T_296,_T_289}; // @[el2_lib.scala 207:14] + wire _T_306 = &_T_305; // @[el2_lib.scala 207:21] + wire _T_307 = _T_46 & _T_306; // @[el2_lsu_trigger.scala 21:87] + wire _T_310 = io_trigger_pkt_any_1_store & io_lsu_pkt_m_store; // @[el2_lsu_trigger.scala 20:121] + wire _T_311 = io_trigger_pkt_any_1_load & io_lsu_pkt_m_load; // @[el2_lsu_trigger.scala 21:33] + wire _T_313 = _T_311 & _T_19; // @[el2_lsu_trigger.scala 21:53] + wire _T_314 = _T_310 | _T_313; // @[el2_lsu_trigger.scala 20:142] + wire _T_315 = _T_40 & _T_314; // @[el2_lsu_trigger.scala 20:89] + wire _T_320 = &io_trigger_pkt_any_1_tdata2; // @[el2_lib.scala 203:73] + wire _T_321 = ~_T_320; // @[el2_lib.scala 203:47] + wire _T_322 = io_trigger_pkt_any_1_match_ & _T_321; // @[el2_lib.scala 203:44] + wire _T_325 = io_trigger_pkt_any_1_tdata2[0] == lsu_match_data_1[0]; // @[el2_lib.scala 204:52] + wire _T_326 = _T_322 | _T_325; // @[el2_lib.scala 204:41] + wire _T_328 = &io_trigger_pkt_any_1_tdata2[0]; // @[el2_lib.scala 206:37] + wire _T_329 = _T_328 & _T_322; // @[el2_lib.scala 206:42] + wire _T_332 = io_trigger_pkt_any_1_tdata2[1] == lsu_match_data_1[1]; // @[el2_lib.scala 206:79] + wire _T_333 = _T_329 | _T_332; // @[el2_lib.scala 206:24] + wire _T_335 = &io_trigger_pkt_any_1_tdata2[1:0]; // @[el2_lib.scala 206:37] + wire _T_336 = _T_335 & _T_322; // @[el2_lib.scala 206:42] + wire _T_339 = io_trigger_pkt_any_1_tdata2[2] == lsu_match_data_1[2]; // @[el2_lib.scala 206:79] + wire _T_340 = _T_336 | _T_339; // @[el2_lib.scala 206:24] + wire _T_342 = &io_trigger_pkt_any_1_tdata2[2:0]; // @[el2_lib.scala 206:37] + wire _T_343 = _T_342 & _T_322; // @[el2_lib.scala 206:42] + wire _T_346 = io_trigger_pkt_any_1_tdata2[3] == lsu_match_data_1[3]; // @[el2_lib.scala 206:79] + wire _T_347 = _T_343 | _T_346; // @[el2_lib.scala 206:24] + wire _T_349 = &io_trigger_pkt_any_1_tdata2[3:0]; // @[el2_lib.scala 206:37] + wire _T_350 = _T_349 & _T_322; // @[el2_lib.scala 206:42] + wire _T_353 = io_trigger_pkt_any_1_tdata2[4] == lsu_match_data_1[4]; // @[el2_lib.scala 206:79] + wire _T_354 = _T_350 | _T_353; // @[el2_lib.scala 206:24] + wire _T_356 = &io_trigger_pkt_any_1_tdata2[4:0]; // @[el2_lib.scala 206:37] + wire _T_357 = _T_356 & _T_322; // @[el2_lib.scala 206:42] + wire _T_360 = io_trigger_pkt_any_1_tdata2[5] == lsu_match_data_1[5]; // @[el2_lib.scala 206:79] + wire _T_361 = _T_357 | _T_360; // @[el2_lib.scala 206:24] + wire _T_363 = &io_trigger_pkt_any_1_tdata2[5:0]; // @[el2_lib.scala 206:37] + wire _T_364 = _T_363 & _T_322; // @[el2_lib.scala 206:42] + wire _T_367 = io_trigger_pkt_any_1_tdata2[6] == lsu_match_data_1[6]; // @[el2_lib.scala 206:79] + wire _T_368 = _T_364 | _T_367; // @[el2_lib.scala 206:24] + wire _T_370 = &io_trigger_pkt_any_1_tdata2[6:0]; // @[el2_lib.scala 206:37] + wire _T_371 = _T_370 & _T_322; // @[el2_lib.scala 206:42] + wire _T_374 = io_trigger_pkt_any_1_tdata2[7] == lsu_match_data_1[7]; // @[el2_lib.scala 206:79] + wire _T_375 = _T_371 | _T_374; // @[el2_lib.scala 206:24] + wire _T_377 = &io_trigger_pkt_any_1_tdata2[7:0]; // @[el2_lib.scala 206:37] + wire _T_378 = _T_377 & _T_322; // @[el2_lib.scala 206:42] + wire _T_381 = io_trigger_pkt_any_1_tdata2[8] == lsu_match_data_1[8]; // @[el2_lib.scala 206:79] + wire _T_382 = _T_378 | _T_381; // @[el2_lib.scala 206:24] + wire _T_384 = &io_trigger_pkt_any_1_tdata2[8:0]; // @[el2_lib.scala 206:37] + wire _T_385 = _T_384 & _T_322; // @[el2_lib.scala 206:42] + wire _T_388 = io_trigger_pkt_any_1_tdata2[9] == lsu_match_data_1[9]; // @[el2_lib.scala 206:79] + wire _T_389 = _T_385 | _T_388; // @[el2_lib.scala 206:24] + wire _T_391 = &io_trigger_pkt_any_1_tdata2[9:0]; // @[el2_lib.scala 206:37] + wire _T_392 = _T_391 & _T_322; // @[el2_lib.scala 206:42] + wire _T_395 = io_trigger_pkt_any_1_tdata2[10] == lsu_match_data_1[10]; // @[el2_lib.scala 206:79] + wire _T_396 = _T_392 | _T_395; // @[el2_lib.scala 206:24] + wire _T_398 = &io_trigger_pkt_any_1_tdata2[10:0]; // @[el2_lib.scala 206:37] + wire _T_399 = _T_398 & _T_322; // @[el2_lib.scala 206:42] + wire _T_402 = io_trigger_pkt_any_1_tdata2[11] == lsu_match_data_1[11]; // @[el2_lib.scala 206:79] + wire _T_403 = _T_399 | _T_402; // @[el2_lib.scala 206:24] + wire _T_405 = &io_trigger_pkt_any_1_tdata2[11:0]; // @[el2_lib.scala 206:37] + wire _T_406 = _T_405 & _T_322; // @[el2_lib.scala 206:42] + wire _T_409 = io_trigger_pkt_any_1_tdata2[12] == lsu_match_data_1[12]; // @[el2_lib.scala 206:79] + wire _T_410 = _T_406 | _T_409; // @[el2_lib.scala 206:24] + wire _T_412 = &io_trigger_pkt_any_1_tdata2[12:0]; // @[el2_lib.scala 206:37] + wire _T_413 = _T_412 & _T_322; // @[el2_lib.scala 206:42] + wire _T_416 = io_trigger_pkt_any_1_tdata2[13] == lsu_match_data_1[13]; // @[el2_lib.scala 206:79] + wire _T_417 = _T_413 | _T_416; // @[el2_lib.scala 206:24] + wire _T_419 = &io_trigger_pkt_any_1_tdata2[13:0]; // @[el2_lib.scala 206:37] + wire _T_420 = _T_419 & _T_322; // @[el2_lib.scala 206:42] + wire _T_423 = io_trigger_pkt_any_1_tdata2[14] == lsu_match_data_1[14]; // @[el2_lib.scala 206:79] + wire _T_424 = _T_420 | _T_423; // @[el2_lib.scala 206:24] + wire _T_426 = &io_trigger_pkt_any_1_tdata2[14:0]; // @[el2_lib.scala 206:37] + wire _T_427 = _T_426 & _T_322; // @[el2_lib.scala 206:42] + wire _T_430 = io_trigger_pkt_any_1_tdata2[15] == lsu_match_data_1[15]; // @[el2_lib.scala 206:79] + wire _T_431 = _T_427 | _T_430; // @[el2_lib.scala 206:24] + wire _T_433 = &io_trigger_pkt_any_1_tdata2[15:0]; // @[el2_lib.scala 206:37] + wire _T_434 = _T_433 & _T_322; // @[el2_lib.scala 206:42] + wire _T_437 = io_trigger_pkt_any_1_tdata2[16] == lsu_match_data_1[16]; // @[el2_lib.scala 206:79] + wire _T_438 = _T_434 | _T_437; // @[el2_lib.scala 206:24] + wire _T_440 = &io_trigger_pkt_any_1_tdata2[16:0]; // @[el2_lib.scala 206:37] + wire _T_441 = _T_440 & _T_322; // @[el2_lib.scala 206:42] + wire _T_444 = io_trigger_pkt_any_1_tdata2[17] == lsu_match_data_1[17]; // @[el2_lib.scala 206:79] + wire _T_445 = _T_441 | _T_444; // @[el2_lib.scala 206:24] + wire _T_447 = &io_trigger_pkt_any_1_tdata2[17:0]; // @[el2_lib.scala 206:37] + wire _T_448 = _T_447 & _T_322; // @[el2_lib.scala 206:42] + wire _T_451 = io_trigger_pkt_any_1_tdata2[18] == lsu_match_data_1[18]; // @[el2_lib.scala 206:79] + wire _T_452 = _T_448 | _T_451; // @[el2_lib.scala 206:24] + wire _T_454 = &io_trigger_pkt_any_1_tdata2[18:0]; // @[el2_lib.scala 206:37] + wire _T_455 = _T_454 & _T_322; // @[el2_lib.scala 206:42] + wire _T_458 = io_trigger_pkt_any_1_tdata2[19] == lsu_match_data_1[19]; // @[el2_lib.scala 206:79] + wire _T_459 = _T_455 | _T_458; // @[el2_lib.scala 206:24] + wire _T_461 = &io_trigger_pkt_any_1_tdata2[19:0]; // @[el2_lib.scala 206:37] + wire _T_462 = _T_461 & _T_322; // @[el2_lib.scala 206:42] + wire _T_465 = io_trigger_pkt_any_1_tdata2[20] == lsu_match_data_1[20]; // @[el2_lib.scala 206:79] + wire _T_466 = _T_462 | _T_465; // @[el2_lib.scala 206:24] + wire _T_468 = &io_trigger_pkt_any_1_tdata2[20:0]; // @[el2_lib.scala 206:37] + wire _T_469 = _T_468 & _T_322; // @[el2_lib.scala 206:42] + wire _T_472 = io_trigger_pkt_any_1_tdata2[21] == lsu_match_data_1[21]; // @[el2_lib.scala 206:79] + wire _T_473 = _T_469 | _T_472; // @[el2_lib.scala 206:24] + wire _T_475 = &io_trigger_pkt_any_1_tdata2[21:0]; // @[el2_lib.scala 206:37] + wire _T_476 = _T_475 & _T_322; // @[el2_lib.scala 206:42] + wire _T_479 = io_trigger_pkt_any_1_tdata2[22] == lsu_match_data_1[22]; // @[el2_lib.scala 206:79] + wire _T_480 = _T_476 | _T_479; // @[el2_lib.scala 206:24] + wire _T_482 = &io_trigger_pkt_any_1_tdata2[22:0]; // @[el2_lib.scala 206:37] + wire _T_483 = _T_482 & _T_322; // @[el2_lib.scala 206:42] + wire _T_486 = io_trigger_pkt_any_1_tdata2[23] == lsu_match_data_1[23]; // @[el2_lib.scala 206:79] + wire _T_487 = _T_483 | _T_486; // @[el2_lib.scala 206:24] + wire _T_489 = &io_trigger_pkt_any_1_tdata2[23:0]; // @[el2_lib.scala 206:37] + wire _T_490 = _T_489 & _T_322; // @[el2_lib.scala 206:42] + wire _T_493 = io_trigger_pkt_any_1_tdata2[24] == lsu_match_data_1[24]; // @[el2_lib.scala 206:79] + wire _T_494 = _T_490 | _T_493; // @[el2_lib.scala 206:24] + wire _T_496 = &io_trigger_pkt_any_1_tdata2[24:0]; // @[el2_lib.scala 206:37] + wire _T_497 = _T_496 & _T_322; // @[el2_lib.scala 206:42] + wire _T_500 = io_trigger_pkt_any_1_tdata2[25] == lsu_match_data_1[25]; // @[el2_lib.scala 206:79] + wire _T_501 = _T_497 | _T_500; // @[el2_lib.scala 206:24] + wire _T_503 = &io_trigger_pkt_any_1_tdata2[25:0]; // @[el2_lib.scala 206:37] + wire _T_504 = _T_503 & _T_322; // @[el2_lib.scala 206:42] + wire _T_507 = io_trigger_pkt_any_1_tdata2[26] == lsu_match_data_1[26]; // @[el2_lib.scala 206:79] + wire _T_508 = _T_504 | _T_507; // @[el2_lib.scala 206:24] + wire _T_510 = &io_trigger_pkt_any_1_tdata2[26:0]; // @[el2_lib.scala 206:37] + wire _T_511 = _T_510 & _T_322; // @[el2_lib.scala 206:42] + wire _T_514 = io_trigger_pkt_any_1_tdata2[27] == lsu_match_data_1[27]; // @[el2_lib.scala 206:79] + wire _T_515 = _T_511 | _T_514; // @[el2_lib.scala 206:24] + wire _T_517 = &io_trigger_pkt_any_1_tdata2[27:0]; // @[el2_lib.scala 206:37] + wire _T_518 = _T_517 & _T_322; // @[el2_lib.scala 206:42] + wire _T_521 = io_trigger_pkt_any_1_tdata2[28] == lsu_match_data_1[28]; // @[el2_lib.scala 206:79] + wire _T_522 = _T_518 | _T_521; // @[el2_lib.scala 206:24] + wire _T_524 = &io_trigger_pkt_any_1_tdata2[28:0]; // @[el2_lib.scala 206:37] + wire _T_525 = _T_524 & _T_322; // @[el2_lib.scala 206:42] + wire _T_528 = io_trigger_pkt_any_1_tdata2[29] == lsu_match_data_1[29]; // @[el2_lib.scala 206:79] + wire _T_529 = _T_525 | _T_528; // @[el2_lib.scala 206:24] + wire _T_531 = &io_trigger_pkt_any_1_tdata2[29:0]; // @[el2_lib.scala 206:37] + wire _T_532 = _T_531 & _T_322; // @[el2_lib.scala 206:42] + wire _T_535 = io_trigger_pkt_any_1_tdata2[30] == lsu_match_data_1[30]; // @[el2_lib.scala 206:79] + wire _T_536 = _T_532 | _T_535; // @[el2_lib.scala 206:24] + wire _T_538 = &io_trigger_pkt_any_1_tdata2[30:0]; // @[el2_lib.scala 206:37] + wire _T_539 = _T_538 & _T_322; // @[el2_lib.scala 206:42] + wire _T_542 = io_trigger_pkt_any_1_tdata2[31] == lsu_match_data_1[31]; // @[el2_lib.scala 206:79] + wire _T_543 = _T_539 | _T_542; // @[el2_lib.scala 206:24] + wire [7:0] _T_550 = {_T_375,_T_368,_T_361,_T_354,_T_347,_T_340,_T_333,_T_326}; // @[el2_lib.scala 207:14] + wire [15:0] _T_558 = {_T_431,_T_424,_T_417,_T_410,_T_403,_T_396,_T_389,_T_382,_T_550}; // @[el2_lib.scala 207:14] + wire [7:0] _T_565 = {_T_487,_T_480,_T_473,_T_466,_T_459,_T_452,_T_445,_T_438}; // @[el2_lib.scala 207:14] + wire [31:0] _T_574 = {_T_543,_T_536,_T_529,_T_522,_T_515,_T_508,_T_501,_T_494,_T_565,_T_558}; // @[el2_lib.scala 207:14] + wire _T_575 = &_T_574; // @[el2_lib.scala 207:21] + wire _T_576 = _T_315 & _T_575; // @[el2_lsu_trigger.scala 21:87] + wire _T_579 = io_trigger_pkt_any_2_store & io_lsu_pkt_m_store; // @[el2_lsu_trigger.scala 20:121] + wire _T_580 = io_trigger_pkt_any_2_load & io_lsu_pkt_m_load; // @[el2_lsu_trigger.scala 21:33] + wire _T_582 = _T_580 & _T_26; // @[el2_lsu_trigger.scala 21:53] + wire _T_583 = _T_579 | _T_582; // @[el2_lsu_trigger.scala 20:142] + wire _T_584 = _T_40 & _T_583; // @[el2_lsu_trigger.scala 20:89] + wire _T_589 = &io_trigger_pkt_any_2_tdata2; // @[el2_lib.scala 203:73] + wire _T_590 = ~_T_589; // @[el2_lib.scala 203:47] + wire _T_591 = io_trigger_pkt_any_2_match_ & _T_590; // @[el2_lib.scala 203:44] + wire _T_594 = io_trigger_pkt_any_2_tdata2[0] == lsu_match_data_2[0]; // @[el2_lib.scala 204:52] + wire _T_595 = _T_591 | _T_594; // @[el2_lib.scala 204:41] + wire _T_597 = &io_trigger_pkt_any_2_tdata2[0]; // @[el2_lib.scala 206:37] + wire _T_598 = _T_597 & _T_591; // @[el2_lib.scala 206:42] + wire _T_601 = io_trigger_pkt_any_2_tdata2[1] == lsu_match_data_2[1]; // @[el2_lib.scala 206:79] + wire _T_602 = _T_598 | _T_601; // @[el2_lib.scala 206:24] + wire _T_604 = &io_trigger_pkt_any_2_tdata2[1:0]; // @[el2_lib.scala 206:37] + wire _T_605 = _T_604 & _T_591; // @[el2_lib.scala 206:42] + wire _T_608 = io_trigger_pkt_any_2_tdata2[2] == lsu_match_data_2[2]; // @[el2_lib.scala 206:79] + wire _T_609 = _T_605 | _T_608; // @[el2_lib.scala 206:24] + wire _T_611 = &io_trigger_pkt_any_2_tdata2[2:0]; // @[el2_lib.scala 206:37] + wire _T_612 = _T_611 & _T_591; // @[el2_lib.scala 206:42] + wire _T_615 = io_trigger_pkt_any_2_tdata2[3] == lsu_match_data_2[3]; // @[el2_lib.scala 206:79] + wire _T_616 = _T_612 | _T_615; // @[el2_lib.scala 206:24] + wire _T_618 = &io_trigger_pkt_any_2_tdata2[3:0]; // @[el2_lib.scala 206:37] + wire _T_619 = _T_618 & _T_591; // @[el2_lib.scala 206:42] + wire _T_622 = io_trigger_pkt_any_2_tdata2[4] == lsu_match_data_2[4]; // @[el2_lib.scala 206:79] + wire _T_623 = _T_619 | _T_622; // @[el2_lib.scala 206:24] + wire _T_625 = &io_trigger_pkt_any_2_tdata2[4:0]; // @[el2_lib.scala 206:37] + wire _T_626 = _T_625 & _T_591; // @[el2_lib.scala 206:42] + wire _T_629 = io_trigger_pkt_any_2_tdata2[5] == lsu_match_data_2[5]; // @[el2_lib.scala 206:79] + wire _T_630 = _T_626 | _T_629; // @[el2_lib.scala 206:24] + wire _T_632 = &io_trigger_pkt_any_2_tdata2[5:0]; // @[el2_lib.scala 206:37] + wire _T_633 = _T_632 & _T_591; // @[el2_lib.scala 206:42] + wire _T_636 = io_trigger_pkt_any_2_tdata2[6] == lsu_match_data_2[6]; // @[el2_lib.scala 206:79] + wire _T_637 = _T_633 | _T_636; // @[el2_lib.scala 206:24] + wire _T_639 = &io_trigger_pkt_any_2_tdata2[6:0]; // @[el2_lib.scala 206:37] + wire _T_640 = _T_639 & _T_591; // @[el2_lib.scala 206:42] + wire _T_643 = io_trigger_pkt_any_2_tdata2[7] == lsu_match_data_2[7]; // @[el2_lib.scala 206:79] + wire _T_644 = _T_640 | _T_643; // @[el2_lib.scala 206:24] + wire _T_646 = &io_trigger_pkt_any_2_tdata2[7:0]; // @[el2_lib.scala 206:37] + wire _T_647 = _T_646 & _T_591; // @[el2_lib.scala 206:42] + wire _T_650 = io_trigger_pkt_any_2_tdata2[8] == lsu_match_data_2[8]; // @[el2_lib.scala 206:79] + wire _T_651 = _T_647 | _T_650; // @[el2_lib.scala 206:24] + wire _T_653 = &io_trigger_pkt_any_2_tdata2[8:0]; // @[el2_lib.scala 206:37] + wire _T_654 = _T_653 & _T_591; // @[el2_lib.scala 206:42] + wire _T_657 = io_trigger_pkt_any_2_tdata2[9] == lsu_match_data_2[9]; // @[el2_lib.scala 206:79] + wire _T_658 = _T_654 | _T_657; // @[el2_lib.scala 206:24] + wire _T_660 = &io_trigger_pkt_any_2_tdata2[9:0]; // @[el2_lib.scala 206:37] + wire _T_661 = _T_660 & _T_591; // @[el2_lib.scala 206:42] + wire _T_664 = io_trigger_pkt_any_2_tdata2[10] == lsu_match_data_2[10]; // @[el2_lib.scala 206:79] + wire _T_665 = _T_661 | _T_664; // @[el2_lib.scala 206:24] + wire _T_667 = &io_trigger_pkt_any_2_tdata2[10:0]; // @[el2_lib.scala 206:37] + wire _T_668 = _T_667 & _T_591; // @[el2_lib.scala 206:42] + wire _T_671 = io_trigger_pkt_any_2_tdata2[11] == lsu_match_data_2[11]; // @[el2_lib.scala 206:79] + wire _T_672 = _T_668 | _T_671; // @[el2_lib.scala 206:24] + wire _T_674 = &io_trigger_pkt_any_2_tdata2[11:0]; // @[el2_lib.scala 206:37] + wire _T_675 = _T_674 & _T_591; // @[el2_lib.scala 206:42] + wire _T_678 = io_trigger_pkt_any_2_tdata2[12] == lsu_match_data_2[12]; // @[el2_lib.scala 206:79] + wire _T_679 = _T_675 | _T_678; // @[el2_lib.scala 206:24] + wire _T_681 = &io_trigger_pkt_any_2_tdata2[12:0]; // @[el2_lib.scala 206:37] + wire _T_682 = _T_681 & _T_591; // @[el2_lib.scala 206:42] + wire _T_685 = io_trigger_pkt_any_2_tdata2[13] == lsu_match_data_2[13]; // @[el2_lib.scala 206:79] + wire _T_686 = _T_682 | _T_685; // @[el2_lib.scala 206:24] + wire _T_688 = &io_trigger_pkt_any_2_tdata2[13:0]; // @[el2_lib.scala 206:37] + wire _T_689 = _T_688 & _T_591; // @[el2_lib.scala 206:42] + wire _T_692 = io_trigger_pkt_any_2_tdata2[14] == lsu_match_data_2[14]; // @[el2_lib.scala 206:79] + wire _T_693 = _T_689 | _T_692; // @[el2_lib.scala 206:24] + wire _T_695 = &io_trigger_pkt_any_2_tdata2[14:0]; // @[el2_lib.scala 206:37] + wire _T_696 = _T_695 & _T_591; // @[el2_lib.scala 206:42] + wire _T_699 = io_trigger_pkt_any_2_tdata2[15] == lsu_match_data_2[15]; // @[el2_lib.scala 206:79] + wire _T_700 = _T_696 | _T_699; // @[el2_lib.scala 206:24] + wire _T_702 = &io_trigger_pkt_any_2_tdata2[15:0]; // @[el2_lib.scala 206:37] + wire _T_703 = _T_702 & _T_591; // @[el2_lib.scala 206:42] + wire _T_706 = io_trigger_pkt_any_2_tdata2[16] == lsu_match_data_2[16]; // @[el2_lib.scala 206:79] + wire _T_707 = _T_703 | _T_706; // @[el2_lib.scala 206:24] + wire _T_709 = &io_trigger_pkt_any_2_tdata2[16:0]; // @[el2_lib.scala 206:37] + wire _T_710 = _T_709 & _T_591; // @[el2_lib.scala 206:42] + wire _T_713 = io_trigger_pkt_any_2_tdata2[17] == lsu_match_data_2[17]; // @[el2_lib.scala 206:79] + wire _T_714 = _T_710 | _T_713; // @[el2_lib.scala 206:24] + wire _T_716 = &io_trigger_pkt_any_2_tdata2[17:0]; // @[el2_lib.scala 206:37] + wire _T_717 = _T_716 & _T_591; // @[el2_lib.scala 206:42] + wire _T_720 = io_trigger_pkt_any_2_tdata2[18] == lsu_match_data_2[18]; // @[el2_lib.scala 206:79] + wire _T_721 = _T_717 | _T_720; // @[el2_lib.scala 206:24] + wire _T_723 = &io_trigger_pkt_any_2_tdata2[18:0]; // @[el2_lib.scala 206:37] + wire _T_724 = _T_723 & _T_591; // @[el2_lib.scala 206:42] + wire _T_727 = io_trigger_pkt_any_2_tdata2[19] == lsu_match_data_2[19]; // @[el2_lib.scala 206:79] + wire _T_728 = _T_724 | _T_727; // @[el2_lib.scala 206:24] + wire _T_730 = &io_trigger_pkt_any_2_tdata2[19:0]; // @[el2_lib.scala 206:37] + wire _T_731 = _T_730 & _T_591; // @[el2_lib.scala 206:42] + wire _T_734 = io_trigger_pkt_any_2_tdata2[20] == lsu_match_data_2[20]; // @[el2_lib.scala 206:79] + wire _T_735 = _T_731 | _T_734; // @[el2_lib.scala 206:24] + wire _T_737 = &io_trigger_pkt_any_2_tdata2[20:0]; // @[el2_lib.scala 206:37] + wire _T_738 = _T_737 & _T_591; // @[el2_lib.scala 206:42] + wire _T_741 = io_trigger_pkt_any_2_tdata2[21] == lsu_match_data_2[21]; // @[el2_lib.scala 206:79] + wire _T_742 = _T_738 | _T_741; // @[el2_lib.scala 206:24] + wire _T_744 = &io_trigger_pkt_any_2_tdata2[21:0]; // @[el2_lib.scala 206:37] + wire _T_745 = _T_744 & _T_591; // @[el2_lib.scala 206:42] + wire _T_748 = io_trigger_pkt_any_2_tdata2[22] == lsu_match_data_2[22]; // @[el2_lib.scala 206:79] + wire _T_749 = _T_745 | _T_748; // @[el2_lib.scala 206:24] + wire _T_751 = &io_trigger_pkt_any_2_tdata2[22:0]; // @[el2_lib.scala 206:37] + wire _T_752 = _T_751 & _T_591; // @[el2_lib.scala 206:42] + wire _T_755 = io_trigger_pkt_any_2_tdata2[23] == lsu_match_data_2[23]; // @[el2_lib.scala 206:79] + wire _T_756 = _T_752 | _T_755; // @[el2_lib.scala 206:24] + wire _T_758 = &io_trigger_pkt_any_2_tdata2[23:0]; // @[el2_lib.scala 206:37] + wire _T_759 = _T_758 & _T_591; // @[el2_lib.scala 206:42] + wire _T_762 = io_trigger_pkt_any_2_tdata2[24] == lsu_match_data_2[24]; // @[el2_lib.scala 206:79] + wire _T_763 = _T_759 | _T_762; // @[el2_lib.scala 206:24] + wire _T_765 = &io_trigger_pkt_any_2_tdata2[24:0]; // @[el2_lib.scala 206:37] + wire _T_766 = _T_765 & _T_591; // @[el2_lib.scala 206:42] + wire _T_769 = io_trigger_pkt_any_2_tdata2[25] == lsu_match_data_2[25]; // @[el2_lib.scala 206:79] + wire _T_770 = _T_766 | _T_769; // @[el2_lib.scala 206:24] + wire _T_772 = &io_trigger_pkt_any_2_tdata2[25:0]; // @[el2_lib.scala 206:37] + wire _T_773 = _T_772 & _T_591; // @[el2_lib.scala 206:42] + wire _T_776 = io_trigger_pkt_any_2_tdata2[26] == lsu_match_data_2[26]; // @[el2_lib.scala 206:79] + wire _T_777 = _T_773 | _T_776; // @[el2_lib.scala 206:24] + wire _T_779 = &io_trigger_pkt_any_2_tdata2[26:0]; // @[el2_lib.scala 206:37] + wire _T_780 = _T_779 & _T_591; // @[el2_lib.scala 206:42] + wire _T_783 = io_trigger_pkt_any_2_tdata2[27] == lsu_match_data_2[27]; // @[el2_lib.scala 206:79] + wire _T_784 = _T_780 | _T_783; // @[el2_lib.scala 206:24] + wire _T_786 = &io_trigger_pkt_any_2_tdata2[27:0]; // @[el2_lib.scala 206:37] + wire _T_787 = _T_786 & _T_591; // @[el2_lib.scala 206:42] + wire _T_790 = io_trigger_pkt_any_2_tdata2[28] == lsu_match_data_2[28]; // @[el2_lib.scala 206:79] + wire _T_791 = _T_787 | _T_790; // @[el2_lib.scala 206:24] + wire _T_793 = &io_trigger_pkt_any_2_tdata2[28:0]; // @[el2_lib.scala 206:37] + wire _T_794 = _T_793 & _T_591; // @[el2_lib.scala 206:42] + wire _T_797 = io_trigger_pkt_any_2_tdata2[29] == lsu_match_data_2[29]; // @[el2_lib.scala 206:79] + wire _T_798 = _T_794 | _T_797; // @[el2_lib.scala 206:24] + wire _T_800 = &io_trigger_pkt_any_2_tdata2[29:0]; // @[el2_lib.scala 206:37] + wire _T_801 = _T_800 & _T_591; // @[el2_lib.scala 206:42] + wire _T_804 = io_trigger_pkt_any_2_tdata2[30] == lsu_match_data_2[30]; // @[el2_lib.scala 206:79] + wire _T_805 = _T_801 | _T_804; // @[el2_lib.scala 206:24] + wire _T_807 = &io_trigger_pkt_any_2_tdata2[30:0]; // @[el2_lib.scala 206:37] + wire _T_808 = _T_807 & _T_591; // @[el2_lib.scala 206:42] + wire _T_811 = io_trigger_pkt_any_2_tdata2[31] == lsu_match_data_2[31]; // @[el2_lib.scala 206:79] + wire _T_812 = _T_808 | _T_811; // @[el2_lib.scala 206:24] + wire [7:0] _T_819 = {_T_644,_T_637,_T_630,_T_623,_T_616,_T_609,_T_602,_T_595}; // @[el2_lib.scala 207:14] + wire [15:0] _T_827 = {_T_700,_T_693,_T_686,_T_679,_T_672,_T_665,_T_658,_T_651,_T_819}; // @[el2_lib.scala 207:14] + wire [7:0] _T_834 = {_T_756,_T_749,_T_742,_T_735,_T_728,_T_721,_T_714,_T_707}; // @[el2_lib.scala 207:14] + wire [31:0] _T_843 = {_T_812,_T_805,_T_798,_T_791,_T_784,_T_777,_T_770,_T_763,_T_834,_T_827}; // @[el2_lib.scala 207:14] + wire _T_844 = &_T_843; // @[el2_lib.scala 207:21] + wire _T_845 = _T_584 & _T_844; // @[el2_lsu_trigger.scala 21:87] + wire _T_848 = io_trigger_pkt_any_3_store & io_lsu_pkt_m_store; // @[el2_lsu_trigger.scala 20:121] + wire _T_849 = io_trigger_pkt_any_3_load & io_lsu_pkt_m_load; // @[el2_lsu_trigger.scala 21:33] + wire _T_851 = _T_849 & _T_33; // @[el2_lsu_trigger.scala 21:53] + wire _T_852 = _T_848 | _T_851; // @[el2_lsu_trigger.scala 20:142] + wire _T_853 = _T_40 & _T_852; // @[el2_lsu_trigger.scala 20:89] + wire _T_858 = &io_trigger_pkt_any_3_tdata2; // @[el2_lib.scala 203:73] + wire _T_859 = ~_T_858; // @[el2_lib.scala 203:47] + wire _T_860 = io_trigger_pkt_any_3_match_ & _T_859; // @[el2_lib.scala 203:44] + wire _T_863 = io_trigger_pkt_any_3_tdata2[0] == lsu_match_data_3[0]; // @[el2_lib.scala 204:52] + wire _T_864 = _T_860 | _T_863; // @[el2_lib.scala 204:41] + wire _T_866 = &io_trigger_pkt_any_3_tdata2[0]; // @[el2_lib.scala 206:37] + wire _T_867 = _T_866 & _T_860; // @[el2_lib.scala 206:42] + wire _T_870 = io_trigger_pkt_any_3_tdata2[1] == lsu_match_data_3[1]; // @[el2_lib.scala 206:79] + wire _T_871 = _T_867 | _T_870; // @[el2_lib.scala 206:24] + wire _T_873 = &io_trigger_pkt_any_3_tdata2[1:0]; // @[el2_lib.scala 206:37] + wire _T_874 = _T_873 & _T_860; // @[el2_lib.scala 206:42] + wire _T_877 = io_trigger_pkt_any_3_tdata2[2] == lsu_match_data_3[2]; // @[el2_lib.scala 206:79] + wire _T_878 = _T_874 | _T_877; // @[el2_lib.scala 206:24] + wire _T_880 = &io_trigger_pkt_any_3_tdata2[2:0]; // @[el2_lib.scala 206:37] + wire _T_881 = _T_880 & _T_860; // @[el2_lib.scala 206:42] + wire _T_884 = io_trigger_pkt_any_3_tdata2[3] == lsu_match_data_3[3]; // @[el2_lib.scala 206:79] + wire _T_885 = _T_881 | _T_884; // @[el2_lib.scala 206:24] + wire _T_887 = &io_trigger_pkt_any_3_tdata2[3:0]; // @[el2_lib.scala 206:37] + wire _T_888 = _T_887 & _T_860; // @[el2_lib.scala 206:42] + wire _T_891 = io_trigger_pkt_any_3_tdata2[4] == lsu_match_data_3[4]; // @[el2_lib.scala 206:79] + wire _T_892 = _T_888 | _T_891; // @[el2_lib.scala 206:24] + wire _T_894 = &io_trigger_pkt_any_3_tdata2[4:0]; // @[el2_lib.scala 206:37] + wire _T_895 = _T_894 & _T_860; // @[el2_lib.scala 206:42] + wire _T_898 = io_trigger_pkt_any_3_tdata2[5] == lsu_match_data_3[5]; // @[el2_lib.scala 206:79] + wire _T_899 = _T_895 | _T_898; // @[el2_lib.scala 206:24] + wire _T_901 = &io_trigger_pkt_any_3_tdata2[5:0]; // @[el2_lib.scala 206:37] + wire _T_902 = _T_901 & _T_860; // @[el2_lib.scala 206:42] + wire _T_905 = io_trigger_pkt_any_3_tdata2[6] == lsu_match_data_3[6]; // @[el2_lib.scala 206:79] + wire _T_906 = _T_902 | _T_905; // @[el2_lib.scala 206:24] + wire _T_908 = &io_trigger_pkt_any_3_tdata2[6:0]; // @[el2_lib.scala 206:37] + wire _T_909 = _T_908 & _T_860; // @[el2_lib.scala 206:42] + wire _T_912 = io_trigger_pkt_any_3_tdata2[7] == lsu_match_data_3[7]; // @[el2_lib.scala 206:79] + wire _T_913 = _T_909 | _T_912; // @[el2_lib.scala 206:24] + wire _T_915 = &io_trigger_pkt_any_3_tdata2[7:0]; // @[el2_lib.scala 206:37] + wire _T_916 = _T_915 & _T_860; // @[el2_lib.scala 206:42] + wire _T_919 = io_trigger_pkt_any_3_tdata2[8] == lsu_match_data_3[8]; // @[el2_lib.scala 206:79] + wire _T_920 = _T_916 | _T_919; // @[el2_lib.scala 206:24] + wire _T_922 = &io_trigger_pkt_any_3_tdata2[8:0]; // @[el2_lib.scala 206:37] + wire _T_923 = _T_922 & _T_860; // @[el2_lib.scala 206:42] + wire _T_926 = io_trigger_pkt_any_3_tdata2[9] == lsu_match_data_3[9]; // @[el2_lib.scala 206:79] + wire _T_927 = _T_923 | _T_926; // @[el2_lib.scala 206:24] + wire _T_929 = &io_trigger_pkt_any_3_tdata2[9:0]; // @[el2_lib.scala 206:37] + wire _T_930 = _T_929 & _T_860; // @[el2_lib.scala 206:42] + wire _T_933 = io_trigger_pkt_any_3_tdata2[10] == lsu_match_data_3[10]; // @[el2_lib.scala 206:79] + wire _T_934 = _T_930 | _T_933; // @[el2_lib.scala 206:24] + wire _T_936 = &io_trigger_pkt_any_3_tdata2[10:0]; // @[el2_lib.scala 206:37] + wire _T_937 = _T_936 & _T_860; // @[el2_lib.scala 206:42] + wire _T_940 = io_trigger_pkt_any_3_tdata2[11] == lsu_match_data_3[11]; // @[el2_lib.scala 206:79] + wire _T_941 = _T_937 | _T_940; // @[el2_lib.scala 206:24] + wire _T_943 = &io_trigger_pkt_any_3_tdata2[11:0]; // @[el2_lib.scala 206:37] + wire _T_944 = _T_943 & _T_860; // @[el2_lib.scala 206:42] + wire _T_947 = io_trigger_pkt_any_3_tdata2[12] == lsu_match_data_3[12]; // @[el2_lib.scala 206:79] + wire _T_948 = _T_944 | _T_947; // @[el2_lib.scala 206:24] + wire _T_950 = &io_trigger_pkt_any_3_tdata2[12:0]; // @[el2_lib.scala 206:37] + wire _T_951 = _T_950 & _T_860; // @[el2_lib.scala 206:42] + wire _T_954 = io_trigger_pkt_any_3_tdata2[13] == lsu_match_data_3[13]; // @[el2_lib.scala 206:79] + wire _T_955 = _T_951 | _T_954; // @[el2_lib.scala 206:24] + wire _T_957 = &io_trigger_pkt_any_3_tdata2[13:0]; // @[el2_lib.scala 206:37] + wire _T_958 = _T_957 & _T_860; // @[el2_lib.scala 206:42] + wire _T_961 = io_trigger_pkt_any_3_tdata2[14] == lsu_match_data_3[14]; // @[el2_lib.scala 206:79] + wire _T_962 = _T_958 | _T_961; // @[el2_lib.scala 206:24] + wire _T_964 = &io_trigger_pkt_any_3_tdata2[14:0]; // @[el2_lib.scala 206:37] + wire _T_965 = _T_964 & _T_860; // @[el2_lib.scala 206:42] + wire _T_968 = io_trigger_pkt_any_3_tdata2[15] == lsu_match_data_3[15]; // @[el2_lib.scala 206:79] + wire _T_969 = _T_965 | _T_968; // @[el2_lib.scala 206:24] + wire _T_971 = &io_trigger_pkt_any_3_tdata2[15:0]; // @[el2_lib.scala 206:37] + wire _T_972 = _T_971 & _T_860; // @[el2_lib.scala 206:42] + wire _T_975 = io_trigger_pkt_any_3_tdata2[16] == lsu_match_data_3[16]; // @[el2_lib.scala 206:79] + wire _T_976 = _T_972 | _T_975; // @[el2_lib.scala 206:24] + wire _T_978 = &io_trigger_pkt_any_3_tdata2[16:0]; // @[el2_lib.scala 206:37] + wire _T_979 = _T_978 & _T_860; // @[el2_lib.scala 206:42] + wire _T_982 = io_trigger_pkt_any_3_tdata2[17] == lsu_match_data_3[17]; // @[el2_lib.scala 206:79] + wire _T_983 = _T_979 | _T_982; // @[el2_lib.scala 206:24] + wire _T_985 = &io_trigger_pkt_any_3_tdata2[17:0]; // @[el2_lib.scala 206:37] + wire _T_986 = _T_985 & _T_860; // @[el2_lib.scala 206:42] + wire _T_989 = io_trigger_pkt_any_3_tdata2[18] == lsu_match_data_3[18]; // @[el2_lib.scala 206:79] + wire _T_990 = _T_986 | _T_989; // @[el2_lib.scala 206:24] + wire _T_992 = &io_trigger_pkt_any_3_tdata2[18:0]; // @[el2_lib.scala 206:37] + wire _T_993 = _T_992 & _T_860; // @[el2_lib.scala 206:42] + wire _T_996 = io_trigger_pkt_any_3_tdata2[19] == lsu_match_data_3[19]; // @[el2_lib.scala 206:79] + wire _T_997 = _T_993 | _T_996; // @[el2_lib.scala 206:24] + wire _T_999 = &io_trigger_pkt_any_3_tdata2[19:0]; // @[el2_lib.scala 206:37] + wire _T_1000 = _T_999 & _T_860; // @[el2_lib.scala 206:42] + wire _T_1003 = io_trigger_pkt_any_3_tdata2[20] == lsu_match_data_3[20]; // @[el2_lib.scala 206:79] + wire _T_1004 = _T_1000 | _T_1003; // @[el2_lib.scala 206:24] + wire _T_1006 = &io_trigger_pkt_any_3_tdata2[20:0]; // @[el2_lib.scala 206:37] + wire _T_1007 = _T_1006 & _T_860; // @[el2_lib.scala 206:42] + wire _T_1010 = io_trigger_pkt_any_3_tdata2[21] == lsu_match_data_3[21]; // @[el2_lib.scala 206:79] + wire _T_1011 = _T_1007 | _T_1010; // @[el2_lib.scala 206:24] + wire _T_1013 = &io_trigger_pkt_any_3_tdata2[21:0]; // @[el2_lib.scala 206:37] + wire _T_1014 = _T_1013 & _T_860; // @[el2_lib.scala 206:42] + wire _T_1017 = io_trigger_pkt_any_3_tdata2[22] == lsu_match_data_3[22]; // @[el2_lib.scala 206:79] + wire _T_1018 = _T_1014 | _T_1017; // @[el2_lib.scala 206:24] + wire _T_1020 = &io_trigger_pkt_any_3_tdata2[22:0]; // @[el2_lib.scala 206:37] + wire _T_1021 = _T_1020 & _T_860; // @[el2_lib.scala 206:42] + wire _T_1024 = io_trigger_pkt_any_3_tdata2[23] == lsu_match_data_3[23]; // @[el2_lib.scala 206:79] + wire _T_1025 = _T_1021 | _T_1024; // @[el2_lib.scala 206:24] + wire _T_1027 = &io_trigger_pkt_any_3_tdata2[23:0]; // @[el2_lib.scala 206:37] + wire _T_1028 = _T_1027 & _T_860; // @[el2_lib.scala 206:42] + wire _T_1031 = io_trigger_pkt_any_3_tdata2[24] == lsu_match_data_3[24]; // @[el2_lib.scala 206:79] + wire _T_1032 = _T_1028 | _T_1031; // @[el2_lib.scala 206:24] + wire _T_1034 = &io_trigger_pkt_any_3_tdata2[24:0]; // @[el2_lib.scala 206:37] + wire _T_1035 = _T_1034 & _T_860; // @[el2_lib.scala 206:42] + wire _T_1038 = io_trigger_pkt_any_3_tdata2[25] == lsu_match_data_3[25]; // @[el2_lib.scala 206:79] + wire _T_1039 = _T_1035 | _T_1038; // @[el2_lib.scala 206:24] + wire _T_1041 = &io_trigger_pkt_any_3_tdata2[25:0]; // @[el2_lib.scala 206:37] + wire _T_1042 = _T_1041 & _T_860; // @[el2_lib.scala 206:42] + wire _T_1045 = io_trigger_pkt_any_3_tdata2[26] == lsu_match_data_3[26]; // @[el2_lib.scala 206:79] + wire _T_1046 = _T_1042 | _T_1045; // @[el2_lib.scala 206:24] + wire _T_1048 = &io_trigger_pkt_any_3_tdata2[26:0]; // @[el2_lib.scala 206:37] + wire _T_1049 = _T_1048 & _T_860; // @[el2_lib.scala 206:42] + wire _T_1052 = io_trigger_pkt_any_3_tdata2[27] == lsu_match_data_3[27]; // @[el2_lib.scala 206:79] + wire _T_1053 = _T_1049 | _T_1052; // @[el2_lib.scala 206:24] + wire _T_1055 = &io_trigger_pkt_any_3_tdata2[27:0]; // @[el2_lib.scala 206:37] + wire _T_1056 = _T_1055 & _T_860; // @[el2_lib.scala 206:42] + wire _T_1059 = io_trigger_pkt_any_3_tdata2[28] == lsu_match_data_3[28]; // @[el2_lib.scala 206:79] + wire _T_1060 = _T_1056 | _T_1059; // @[el2_lib.scala 206:24] + wire _T_1062 = &io_trigger_pkt_any_3_tdata2[28:0]; // @[el2_lib.scala 206:37] + wire _T_1063 = _T_1062 & _T_860; // @[el2_lib.scala 206:42] + wire _T_1066 = io_trigger_pkt_any_3_tdata2[29] == lsu_match_data_3[29]; // @[el2_lib.scala 206:79] + wire _T_1067 = _T_1063 | _T_1066; // @[el2_lib.scala 206:24] + wire _T_1069 = &io_trigger_pkt_any_3_tdata2[29:0]; // @[el2_lib.scala 206:37] + wire _T_1070 = _T_1069 & _T_860; // @[el2_lib.scala 206:42] + wire _T_1073 = io_trigger_pkt_any_3_tdata2[30] == lsu_match_data_3[30]; // @[el2_lib.scala 206:79] + wire _T_1074 = _T_1070 | _T_1073; // @[el2_lib.scala 206:24] + wire _T_1076 = &io_trigger_pkt_any_3_tdata2[30:0]; // @[el2_lib.scala 206:37] + wire _T_1077 = _T_1076 & _T_860; // @[el2_lib.scala 206:42] + wire _T_1080 = io_trigger_pkt_any_3_tdata2[31] == lsu_match_data_3[31]; // @[el2_lib.scala 206:79] + wire _T_1081 = _T_1077 | _T_1080; // @[el2_lib.scala 206:24] + wire [7:0] _T_1088 = {_T_913,_T_906,_T_899,_T_892,_T_885,_T_878,_T_871,_T_864}; // @[el2_lib.scala 207:14] + wire [15:0] _T_1096 = {_T_969,_T_962,_T_955,_T_948,_T_941,_T_934,_T_927,_T_920,_T_1088}; // @[el2_lib.scala 207:14] + wire [7:0] _T_1103 = {_T_1025,_T_1018,_T_1011,_T_1004,_T_997,_T_990,_T_983,_T_976}; // @[el2_lib.scala 207:14] + wire [31:0] _T_1112 = {_T_1081,_T_1074,_T_1067,_T_1060,_T_1053,_T_1046,_T_1039,_T_1032,_T_1103,_T_1096}; // @[el2_lib.scala 207:14] + wire _T_1113 = &_T_1112; // @[el2_lib.scala 207:21] + wire _T_1114 = _T_853 & _T_1113; // @[el2_lsu_trigger.scala 21:87] + wire [2:0] _T_1116 = {_T_1114,_T_845,_T_576}; // @[Cat.scala 29:58] + assign io_lsu_trigger_match_m = {_T_1116,_T_307}; // @[el2_lsu_trigger.scala 20:26] endmodule diff --git a/el2_pic_ctrl.anno.json b/el2_pic_ctrl.anno.json new file mode 100644 index 00000000..25feb095 --- /dev/null +++ b/el2_pic_ctrl.anno.json @@ -0,0 +1,30 @@ +[ + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_pic_ctrl|el2_pic_ctrl>io_test", + "sources":[ + "~el2_pic_ctrl|el2_pic_ctrl>io_extintsrc_req" + ] + }, + { + "class":"firrtl.EmitCircuitAnnotation", + "emitter":"firrtl.VerilogEmitter" + }, + { + "class":"firrtl.transforms.BlackBoxResourceAnno", + "target":"el2_pic_ctrl.TEC_RV_ICG", + "resourceId":"/vsrc/TEC_RV_ICG.v" + }, + { + "class":"firrtl.options.TargetDirAnnotation", + "directory":"." + }, + { + "class":"firrtl.options.OutputAnnotationFileAnnotation", + "file":"el2_pic_ctrl" + }, + { + "class":"firrtl.transforms.BlackBoxTargetDirAnno", + "targetDir":"." + } +] \ No newline at end of file diff --git a/el2_pic_ctrl.fir b/el2_pic_ctrl.fir new file mode 100644 index 00000000..ea0b7ce4 --- /dev/null +++ b/el2_pic_ctrl.fir @@ -0,0 +1,372 @@ +;buildInfoPackage: chisel3, version: 3.3.1, scalaVersion: 2.12.11, sbtVersion: 1.3.10 +circuit el2_pic_ctrl : + extmodule TEC_RV_ICG : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG @[beh_lib.scala 331:24] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[beh_lib.scala 332:12] + clkhdr.CK <= io.clk @[beh_lib.scala 333:16] + clkhdr.EN <= io.en @[beh_lib.scala 334:16] + clkhdr.SE <= io.scan_mode @[beh_lib.scala 335:16] + + extmodule TEC_RV_ICG_1 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_1 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_1 @[beh_lib.scala 331:24] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[beh_lib.scala 332:12] + clkhdr.CK <= io.clk @[beh_lib.scala 333:16] + clkhdr.EN <= io.en @[beh_lib.scala 334:16] + clkhdr.SE <= io.scan_mode @[beh_lib.scala 335:16] + + extmodule TEC_RV_ICG_2 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_2 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_2 @[beh_lib.scala 331:24] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[beh_lib.scala 332:12] + clkhdr.CK <= io.clk @[beh_lib.scala 333:16] + clkhdr.EN <= io.en @[beh_lib.scala 334:16] + clkhdr.SE <= io.scan_mode @[beh_lib.scala 335:16] + + extmodule TEC_RV_ICG_3 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_3 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_3 @[beh_lib.scala 331:24] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[beh_lib.scala 332:12] + clkhdr.CK <= io.clk @[beh_lib.scala 333:16] + clkhdr.EN <= io.en @[beh_lib.scala 334:16] + clkhdr.SE <= io.scan_mode @[beh_lib.scala 335:16] + + extmodule TEC_RV_ICG_4 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = TEC_RV_ICG + + + module rvclkhdr_4 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of TEC_RV_ICG_4 @[beh_lib.scala 331:24] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[beh_lib.scala 332:12] + clkhdr.CK <= io.clk @[beh_lib.scala 333:16] + clkhdr.EN <= io.en @[beh_lib.scala 334:16] + clkhdr.SE <= io.scan_mode @[beh_lib.scala 335:16] + + module rvsyncss : + input clock : Clock + input reset : Reset + output io : {flip din : UInt<31>, dout : UInt<31>, flip clk : Clock} + + reg sync_ff1 : UInt, io.clk with : (reset => (reset, UInt<1>("h00"))) @[beh_lib.scala 32:43] + sync_ff1 <= io.din @[beh_lib.scala 32:43] + reg sync_ff2 : UInt, io.clk with : (reset => (reset, UInt<1>("h00"))) @[beh_lib.scala 33:43] + sync_ff2 <= sync_ff1 @[beh_lib.scala 33:43] + io.dout <= sync_ff2 @[beh_lib.scala 37:12] + + module el2_pic_ctrl : + input clock : Clock + input reset : AsyncReset + output io : {flip scan_mode : UInt<1>, flip free_clk : Clock, flip active_clk : Clock, flip clk_override : UInt<1>, flip extintsrc_req : UInt<32>, flip picm_rdaddr : UInt<32>, flip picm_wraddr : UInt<32>, flip picm_wr_data : UInt<32>, flip picm_wren : UInt<1>, flip picm_rden : UInt<1>, flip picm_mken : UInt<1>, flip meicurpl : UInt<4>, flip meipt : UInt<4>, mexintpend : UInt<1>, claimid : UInt<8>, pl : UInt<4>, picm_rd_data : UInt<32>, mhwakeup : UInt<1>, test : UInt} + + io.mexintpend <= UInt<1>("h00") @[el2_pic_ctrl.scala 31:20] + io.claimid <= UInt<1>("h00") @[el2_pic_ctrl.scala 32:20] + io.pl <= UInt<1>("h00") @[el2_pic_ctrl.scala 33:20] + io.picm_rd_data <= UInt<1>("h00") @[el2_pic_ctrl.scala 34:20] + io.mhwakeup <= UInt<1>("h00") @[el2_pic_ctrl.scala 35:20] + wire GW_CONFIG : UInt<32> + GW_CONFIG <= UInt<1>("h00") + wire picm_rd_data_in : UInt<32> + picm_rd_data_in <= UInt<32>("h00") + wire intpend_rd_out : UInt<32> + intpend_rd_out <= UInt<32>("h00") + wire intenable_rd_out : UInt<1> + intenable_rd_out <= UInt<1>("h00") + wire intpriority_rd_out : UInt<4> + intpriority_rd_out <= UInt<4>("h00") + wire gw_config_rd_out : UInt<2> + gw_config_rd_out <= UInt<2>("h00") + wire intpriority_reg_we : UInt<32> + intpriority_reg_we <= UInt<32>("h00") + wire intpriority_reg_re : UInt<32> + intpriority_reg_re <= UInt<32>("h00") + wire intenable_reg : UInt<32> + intenable_reg <= UInt<32>("h00") + wire intenable_reg_we : UInt<32> + intenable_reg_we <= UInt<32>("h00") + wire intenable_reg_re : UInt<32> + intenable_reg_re <= UInt<32>("h00") + wire gw_config_reg_we : UInt<32> + gw_config_reg_we <= UInt<32>("h00") + wire gw_config_reg_re : UInt<32> + gw_config_reg_re <= UInt<32>("h00") + wire gw_clear_reg_we : UInt<32> + gw_clear_reg_we <= UInt<32>("h00") + wire intpend_reg_extended : UInt<64> + intpend_reg_extended <= UInt<64>("h00") + wire selected_int_priority : UInt<4> + selected_int_priority <= UInt<4>("h00") + wire config_reg : UInt<1> + config_reg <= UInt<1>("h00") + wire prithresh_reg_write : UInt<1> + prithresh_reg_write <= UInt<1>("h00") + wire prithresh_reg_read : UInt<1> + prithresh_reg_read <= UInt<1>("h00") + wire picm_wren_ff : UInt<1> + picm_wren_ff <= UInt<1>("h00") + wire picm_rden_ff : UInt<1> + picm_rden_ff <= UInt<1>("h00") + wire picm_raddr_ff : UInt<32> + picm_raddr_ff <= UInt<32>("h00") + wire picm_waddr_ff : UInt<32> + picm_waddr_ff <= UInt<32>("h00") + wire picm_wr_data_ff : UInt<32> + picm_wr_data_ff <= UInt<32>("h00") + wire mask : UInt<4> + mask <= UInt<4>("h00") + wire picm_mken_ff : UInt<1> + picm_mken_ff <= UInt<1>("h00") + wire claimid_in : UInt<8> + claimid_in <= UInt<8>("h00") + wire pl_in : UInt<4> + pl_in <= UInt<4>("h00") + wire extintsrc_req_sync : UInt<32> + extintsrc_req_sync <= UInt<32>("h00") + wire extintsrc_req_gw : UInt<32> + extintsrc_req_gw <= UInt<32>("h00") + wire pic_raddr_c1_clk : Clock @[el2_pic_ctrl.scala 127:42] + wire pic_data_c1_clk : Clock @[el2_pic_ctrl.scala 128:42] + wire pic_pri_c1_clk : Clock @[el2_pic_ctrl.scala 129:42] + wire pic_int_c1_clk : Clock @[el2_pic_ctrl.scala 130:42] + wire gw_config_c1_clk : Clock @[el2_pic_ctrl.scala 131:42] + reg _T : UInt, pic_raddr_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_pic_ctrl.scala 133:56] + _T <= io.picm_rdaddr @[el2_pic_ctrl.scala 133:56] + picm_raddr_ff <= _T @[el2_pic_ctrl.scala 133:46] + reg _T_1 : UInt, pic_data_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_pic_ctrl.scala 134:57] + _T_1 <= io.picm_wraddr @[el2_pic_ctrl.scala 134:57] + picm_waddr_ff <= _T_1 @[el2_pic_ctrl.scala 134:46] + reg _T_2 : UInt<1>, io.active_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_pic_ctrl.scala 135:55] + _T_2 <= io.picm_wren @[el2_pic_ctrl.scala 135:55] + picm_wren_ff <= _T_2 @[el2_pic_ctrl.scala 135:45] + reg _T_3 : UInt<1>, io.active_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_pic_ctrl.scala 136:55] + _T_3 <= io.picm_rden @[el2_pic_ctrl.scala 136:55] + picm_rden_ff <= _T_3 @[el2_pic_ctrl.scala 136:45] + reg _T_4 : UInt<1>, io.active_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_pic_ctrl.scala 137:55] + _T_4 <= io.picm_mken @[el2_pic_ctrl.scala 137:55] + picm_mken_ff <= _T_4 @[el2_pic_ctrl.scala 137:45] + reg _T_5 : UInt, pic_data_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_pic_ctrl.scala 138:58] + _T_5 <= io.picm_wr_data @[el2_pic_ctrl.scala 138:58] + picm_wr_data_ff <= _T_5 @[el2_pic_ctrl.scala 138:48] + node _T_6 = bits(picm_raddr_ff, 31, 7) @[el2_pic_ctrl.scala 140:53] + node raddr_intenable_base_match = eq(_T_6, UInt<25>("h01e01840")) @[el2_pic_ctrl.scala 140:71] + node _T_7 = bits(picm_raddr_ff, 31, 7) @[el2_pic_ctrl.scala 141:53] + node raddr_intpriority_base_match = eq(_T_7, UInt<25>("h01e01800")) @[el2_pic_ctrl.scala 141:71] + node _T_8 = bits(picm_raddr_ff, 31, 7) @[el2_pic_ctrl.scala 142:53] + node raddr_config_gw_base_match = eq(_T_8, UInt<25>("h01e01880")) @[el2_pic_ctrl.scala 142:71] + node _T_9 = bits(picm_raddr_ff, 31, 0) @[el2_pic_ctrl.scala 143:53] + node raddr_config_pic_match = eq(_T_9, UInt<32>("h0f00c3000")) @[el2_pic_ctrl.scala 143:71] + node _T_10 = bits(picm_raddr_ff, 31, 6) @[el2_pic_ctrl.scala 144:53] + node addr_intpend_base_match = eq(_T_10, UInt<26>("h03c03040")) @[el2_pic_ctrl.scala 144:71] + node _T_11 = bits(picm_waddr_ff, 31, 0) @[el2_pic_ctrl.scala 146:53] + node waddr_config_pic_match = eq(_T_11, UInt<32>("h0f00c3000")) @[el2_pic_ctrl.scala 146:71] + node _T_12 = bits(picm_waddr_ff, 31, 7) @[el2_pic_ctrl.scala 147:53] + node addr_clear_gw_base_match = eq(_T_12, UInt<25>("h01e018a0")) @[el2_pic_ctrl.scala 147:71] + node _T_13 = bits(picm_waddr_ff, 31, 7) @[el2_pic_ctrl.scala 148:53] + node waddr_intpriority_base_match = eq(_T_13, UInt<25>("h01e01800")) @[el2_pic_ctrl.scala 148:71] + node _T_14 = bits(picm_waddr_ff, 31, 7) @[el2_pic_ctrl.scala 149:53] + node waddr_intenable_base_match = eq(_T_14, UInt<25>("h01e01840")) @[el2_pic_ctrl.scala 149:71] + node _T_15 = bits(picm_waddr_ff, 31, 7) @[el2_pic_ctrl.scala 150:53] + node waddr_config_gw_base_match = eq(_T_15, UInt<25>("h01e01880")) @[el2_pic_ctrl.scala 150:71] + node _T_16 = and(picm_rden_ff, picm_wren_ff) @[el2_pic_ctrl.scala 151:53] + node _T_17 = eq(picm_raddr_ff, picm_waddr_ff) @[el2_pic_ctrl.scala 151:86] + node picm_bypass_ff = and(_T_16, _T_17) @[el2_pic_ctrl.scala 151:68] + node _T_18 = or(io.picm_mken, io.picm_rden) @[el2_pic_ctrl.scala 155:42] + node pic_raddr_c1_clken = or(_T_18, io.clk_override) @[el2_pic_ctrl.scala 155:57] + node pic_data_c1_clken = or(io.picm_wren, io.clk_override) @[el2_pic_ctrl.scala 156:42] + node _T_19 = and(waddr_intpriority_base_match, picm_wren_ff) @[el2_pic_ctrl.scala 157:59] + node _T_20 = and(raddr_intpriority_base_match, picm_rden_ff) @[el2_pic_ctrl.scala 157:108] + node _T_21 = or(_T_19, _T_20) @[el2_pic_ctrl.scala 157:76] + node pic_pri_c1_clken = or(_T_21, io.clk_override) @[el2_pic_ctrl.scala 157:124] + node _T_22 = and(waddr_intpriority_base_match, picm_wren_ff) @[el2_pic_ctrl.scala 158:59] + node _T_23 = and(raddr_intenable_base_match, picm_rden_ff) @[el2_pic_ctrl.scala 158:106] + node _T_24 = or(_T_22, _T_23) @[el2_pic_ctrl.scala 158:76] + node pic_int_c1_clken = or(_T_24, io.clk_override) @[el2_pic_ctrl.scala 158:122] + node _T_25 = and(waddr_config_gw_base_match, picm_wren_ff) @[el2_pic_ctrl.scala 159:59] + node _T_26 = and(raddr_config_gw_base_match, picm_rden_ff) @[el2_pic_ctrl.scala 159:108] + node _T_27 = or(_T_25, _T_26) @[el2_pic_ctrl.scala 159:76] + node gw_config_c1_clken = or(_T_27, io.clk_override) @[el2_pic_ctrl.scala 159:124] + inst pic_addr_c1_cgc of rvclkhdr @[el2_pic_ctrl.scala 162:32] + pic_addr_c1_cgc.clock <= clock + pic_addr_c1_cgc.reset <= reset + pic_addr_c1_cgc.io.en <= pic_raddr_c1_clken @[el2_pic_ctrl.scala 163:34] + pic_raddr_c1_clk <= pic_addr_c1_cgc.io.l1clk @[el2_pic_ctrl.scala 163:89] + pic_addr_c1_cgc.io.clk <= clock @[el2_pic_ctrl.scala 164:34] + pic_addr_c1_cgc.io.scan_mode <= io.scan_mode @[el2_pic_ctrl.scala 164:89] + inst pic_data_c1_cgc of rvclkhdr_1 @[el2_pic_ctrl.scala 166:32] + pic_data_c1_cgc.clock <= clock + pic_data_c1_cgc.reset <= reset + pic_data_c1_cgc.io.en <= pic_data_c1_clken @[el2_pic_ctrl.scala 167:34] + pic_data_c1_clk <= pic_data_c1_cgc.io.l1clk @[el2_pic_ctrl.scala 167:89] + pic_data_c1_cgc.io.clk <= clock @[el2_pic_ctrl.scala 168:34] + pic_data_c1_cgc.io.scan_mode <= io.scan_mode @[el2_pic_ctrl.scala 168:89] + inst pic_pri_c1_cgc of rvclkhdr_2 @[el2_pic_ctrl.scala 170:31] + pic_pri_c1_cgc.clock <= clock + pic_pri_c1_cgc.reset <= reset + pic_pri_c1_cgc.io.en <= pic_pri_c1_clken @[el2_pic_ctrl.scala 171:33] + pic_pri_c1_clk <= pic_pri_c1_cgc.io.l1clk @[el2_pic_ctrl.scala 171:87] + pic_pri_c1_cgc.io.clk <= clock @[el2_pic_ctrl.scala 172:33] + pic_pri_c1_cgc.io.scan_mode <= io.scan_mode @[el2_pic_ctrl.scala 172:87] + inst pic_int_c1_cgc of rvclkhdr_3 @[el2_pic_ctrl.scala 174:32] + pic_int_c1_cgc.clock <= clock + pic_int_c1_cgc.reset <= reset + pic_int_c1_cgc.io.en <= pic_int_c1_clken @[el2_pic_ctrl.scala 175:33] + pic_int_c1_clk <= pic_int_c1_cgc.io.l1clk @[el2_pic_ctrl.scala 175:87] + pic_int_c1_cgc.io.clk <= clock @[el2_pic_ctrl.scala 176:33] + pic_int_c1_cgc.io.scan_mode <= io.scan_mode @[el2_pic_ctrl.scala 176:87] + inst gw_config_c1_cgc of rvclkhdr_4 @[el2_pic_ctrl.scala 178:33] + gw_config_c1_cgc.clock <= clock + gw_config_c1_cgc.reset <= reset + gw_config_c1_cgc.io.en <= gw_config_c1_clken @[el2_pic_ctrl.scala 179:35] + gw_config_c1_clk <= gw_config_c1_cgc.io.l1clk @[el2_pic_ctrl.scala 179:90] + gw_config_c1_cgc.io.clk <= clock @[el2_pic_ctrl.scala 180:35] + gw_config_c1_cgc.io.scan_mode <= io.scan_mode @[el2_pic_ctrl.scala 180:91] + inst sync_inst of rvsyncss @[el2_pic_ctrl.scala 185:26] + sync_inst.clock <= clock + sync_inst.reset <= reset + node _T_28 = shr(io.extintsrc_req, 1) @[el2_pic_ctrl.scala 186:48] + sync_inst.io.din <= _T_28 @[el2_pic_ctrl.scala 186:29] + node _T_29 = bits(io.extintsrc_req, 0, 0) @[el2_pic_ctrl.scala 187:71] + node _T_30 = cat(sync_inst.io.dout, _T_29) @[Cat.scala 29:58] + extintsrc_req_sync <= _T_30 @[el2_pic_ctrl.scala 187:29] + sync_inst.io.clk <= io.free_clk @[el2_pic_ctrl.scala 188:29] + io.test <= extintsrc_req_sync @[el2_pic_ctrl.scala 190:11] + node config_reg_we = and(waddr_config_pic_match, picm_wren_ff) @[el2_pic_ctrl.scala 195:47] + node config_reg_re = and(raddr_config_pic_match, picm_rden_ff) @[el2_pic_ctrl.scala 196:47] + node config_reg_in = bits(picm_wr_data_ff, 0, 0) @[el2_pic_ctrl.scala 197:39] + node _T_31 = bits(config_reg_we, 0, 0) @[el2_pic_ctrl.scala 198:82] + reg _T_32 : UInt, io.free_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_31 : @[Reg.scala 28:19] + _T_32 <= config_reg_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + config_reg <= _T_32 @[el2_pic_ctrl.scala 198:37] + node _T_33 = bits(config_reg, 0, 0) @[el2_pic_ctrl.scala 204:31] + node _T_34 = not(pl_in) @[el2_pic_ctrl.scala 204:38] + node pl_in_q = mux(_T_33, _T_34, pl_in) @[el2_pic_ctrl.scala 204:20] + reg _T_35 : UInt, io.free_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_pic_ctrl.scala 205:47] + _T_35 <= claimid_in @[el2_pic_ctrl.scala 205:47] + io.claimid <= _T_35 @[el2_pic_ctrl.scala 205:37] + reg _T_36 : UInt, io.free_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_pic_ctrl.scala 206:42] + _T_36 <= pl_in_q @[el2_pic_ctrl.scala 206:42] + io.pl <= _T_36 @[el2_pic_ctrl.scala 206:32] + node _T_37 = bits(config_reg, 0, 0) @[el2_pic_ctrl.scala 207:33] + node _T_38 = eq(io.meipt, UInt<1>("h00")) @[el2_pic_ctrl.scala 207:40] + node meipt_inv = mux(_T_37, _T_38, io.meipt) @[el2_pic_ctrl.scala 207:22] + node _T_39 = bits(config_reg, 0, 0) @[el2_pic_ctrl.scala 208:36] + node _T_40 = eq(io.meicurpl, UInt<1>("h00")) @[el2_pic_ctrl.scala 208:43] + node meicurpl_inv = mux(_T_39, _T_40, io.meicurpl) @[el2_pic_ctrl.scala 208:25] + node _T_41 = gt(selected_int_priority, meipt_inv) @[el2_pic_ctrl.scala 209:47] + node _T_42 = gt(selected_int_priority, meicurpl_inv) @[el2_pic_ctrl.scala 209:86] + node mexintpend_in = and(_T_41, _T_42) @[el2_pic_ctrl.scala 209:60] + reg _T_43 : UInt<1>, io.free_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_pic_ctrl.scala 210:50] + _T_43 <= mexintpend_in @[el2_pic_ctrl.scala 210:50] + io.mexintpend <= _T_43 @[el2_pic_ctrl.scala 210:40] + node _T_44 = bits(config_reg, 0, 0) @[el2_pic_ctrl.scala 211:30] + node maxint = mux(_T_44, UInt<1>("h00"), UInt<4>("h0f")) @[el2_pic_ctrl.scala 211:19] + node mhwakeup_in = eq(pl_in_q, maxint) @[el2_pic_ctrl.scala 212:29] + reg _T_45 : UInt<1>, io.free_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_pic_ctrl.scala 213:48] + _T_45 <= mhwakeup_in @[el2_pic_ctrl.scala 213:48] + io.mhwakeup <= _T_45 @[el2_pic_ctrl.scala 213:38] + node intpend_reg_read = and(addr_intpend_base_match, picm_rden_ff) @[el2_pic_ctrl.scala 219:60] + node intpriority_reg_read = and(raddr_intpriority_base_match, picm_rden_ff) @[el2_pic_ctrl.scala 220:60] + node intenable_reg_read = and(raddr_intenable_base_match, picm_rden_ff) @[el2_pic_ctrl.scala 221:60] + node gw_config_reg_read = and(raddr_config_gw_base_match, picm_rden_ff) @[el2_pic_ctrl.scala 222:60] + node _T_46 = bits(picm_raddr_ff, 5, 2) @[el2_pic_ctrl.scala 227:98] + node _T_47 = eq(_T_46, UInt<1>("h00")) @[el2_pic_ctrl.scala 227:104] + node _T_48 = and(intpend_reg_read, _T_47) @[el2_pic_ctrl.scala 227:83] + node _T_49 = bits(_T_48, 0, 0) @[Bitwise.scala 72:15] + node _T_50 = mux(_T_49, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_51 = bits(intpend_reg_extended, 31, 0) @[el2_pic_ctrl.scala 227:140] + node _T_52 = and(_T_50, _T_51) @[el2_pic_ctrl.scala 227:118] + node _T_53 = bits(picm_raddr_ff, 5, 2) @[el2_pic_ctrl.scala 227:98] + node _T_54 = eq(_T_53, UInt<1>("h01")) @[el2_pic_ctrl.scala 227:104] + node _T_55 = and(intpend_reg_read, _T_54) @[el2_pic_ctrl.scala 227:83] + node _T_56 = bits(_T_55, 0, 0) @[Bitwise.scala 72:15] + node _T_57 = mux(_T_56, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_58 = bits(intpend_reg_extended, 63, 32) @[el2_pic_ctrl.scala 227:140] + node _T_59 = and(_T_57, _T_58) @[el2_pic_ctrl.scala 227:118] + node intpend_rd_part_out = cat(_T_59, _T_52) @[Cat.scala 29:58] + node _T_60 = bits(intpend_rd_part_out, 0, 0) @[el2_pic_ctrl.scala 228:79] + node _T_61 = bits(intpend_rd_part_out, 1, 1) @[el2_pic_ctrl.scala 228:79] + wire _T_62 : UInt<1>[2] @[el2_pic_ctrl.scala 228:56] + _T_62[0] <= _T_60 @[el2_pic_ctrl.scala 228:56] + _T_62[1] <= _T_61 @[el2_pic_ctrl.scala 228:56] + node _T_63 = or(_T_62[0], _T_62[1]) @[el2_pic_ctrl.scala 228:93] + intpend_rd_out <= _T_63 @[el2_pic_ctrl.scala 228:27] + diff --git a/el2_pic_ctrl.v b/el2_pic_ctrl.v new file mode 100644 index 00000000..9fc02173 --- /dev/null +++ b/el2_pic_ctrl.v @@ -0,0 +1,388 @@ +module rvclkhdr( + output io_l1clk, + input io_clk, + input io_en, + input io_scan_mode +); + wire clkhdr_Q; // @[beh_lib.scala 331:24] + wire clkhdr_CK; // @[beh_lib.scala 331:24] + wire clkhdr_EN; // @[beh_lib.scala 331:24] + wire clkhdr_SE; // @[beh_lib.scala 331:24] + TEC_RV_ICG clkhdr ( // @[beh_lib.scala 331:24] + .Q(clkhdr_Q), + .CK(clkhdr_CK), + .EN(clkhdr_EN), + .SE(clkhdr_SE) + ); + assign io_l1clk = clkhdr_Q; // @[beh_lib.scala 332:12] + assign clkhdr_CK = io_clk; // @[beh_lib.scala 333:16] + assign clkhdr_EN = io_en; // @[beh_lib.scala 334:16] + assign clkhdr_SE = io_scan_mode; // @[beh_lib.scala 335:16] +endmodule +module rvsyncss( + input reset, + input [30:0] io_din, + output [30:0] io_dout, + input io_clk +); +`ifdef RANDOMIZE_REG_INIT + reg [31:0] _RAND_0; + reg [31:0] _RAND_1; +`endif // RANDOMIZE_REG_INIT + reg [30:0] sync_ff1; // @[beh_lib.scala 32:43] + reg [30:0] sync_ff2; // @[beh_lib.scala 33:43] + assign io_dout = sync_ff2; // @[beh_lib.scala 37:12] +`ifdef RANDOMIZE_GARBAGE_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_INVALID_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_REG_INIT +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_MEM_INIT +`define RANDOMIZE +`endif +`ifndef RANDOM +`define RANDOM $random +`endif +`ifdef RANDOMIZE_MEM_INIT + integer initvar; +`endif +`ifndef SYNTHESIS +`ifdef FIRRTL_BEFORE_INITIAL +`FIRRTL_BEFORE_INITIAL +`endif +initial begin + `ifdef RANDOMIZE + `ifdef INIT_RANDOM + `INIT_RANDOM + `endif + `ifndef VERILATOR + `ifdef RANDOMIZE_DELAY + #`RANDOMIZE_DELAY begin end + `else + #0.002 begin end + `endif + `endif +`ifdef RANDOMIZE_REG_INIT + _RAND_0 = {1{`RANDOM}}; + sync_ff1 = _RAND_0[30:0]; + _RAND_1 = {1{`RANDOM}}; + sync_ff2 = _RAND_1[30:0]; +`endif // RANDOMIZE_REG_INIT + if (reset) begin + sync_ff1 = 31'h0; + end + if (reset) begin + sync_ff2 = 31'h0; + end + `endif // RANDOMIZE +end // initial +`ifdef FIRRTL_AFTER_INITIAL +`FIRRTL_AFTER_INITIAL +`endif +`endif // SYNTHESIS + always @(posedge io_clk or posedge reset) begin + if (reset) begin + sync_ff1 <= 31'h0; + end else begin + sync_ff1 <= io_din; + end + end + always @(posedge io_clk or posedge reset) begin + if (reset) begin + sync_ff2 <= 31'h0; + end else begin + sync_ff2 <= sync_ff1; + end + end +endmodule +module el2_pic_ctrl( + input clock, + input reset, + input io_scan_mode, + input io_free_clk, + input io_active_clk, + input io_clk_override, + input [31:0] io_extintsrc_req, + input [31:0] io_picm_rdaddr, + input [31:0] io_picm_wraddr, + input [31:0] io_picm_wr_data, + input io_picm_wren, + input io_picm_rden, + input io_picm_mken, + input [3:0] io_meicurpl, + input [3:0] io_meipt, + output io_mexintpend, + output [7:0] io_claimid, + output [3:0] io_pl, + output [31:0] io_picm_rd_data, + output io_mhwakeup, + output [31:0] io_test +); +`ifdef RANDOMIZE_REG_INIT + reg [31:0] _RAND_0; + reg [31:0] _RAND_1; + reg [31:0] _RAND_2; + reg [31:0] _RAND_3; + reg [31:0] _RAND_4; + reg [31:0] _RAND_5; + reg [31:0] _RAND_6; + reg [31:0] _RAND_7; +`endif // RANDOMIZE_REG_INIT + wire pic_addr_c1_cgc_io_l1clk; // @[el2_pic_ctrl.scala 162:32] + wire pic_addr_c1_cgc_io_clk; // @[el2_pic_ctrl.scala 162:32] + wire pic_addr_c1_cgc_io_en; // @[el2_pic_ctrl.scala 162:32] + wire pic_addr_c1_cgc_io_scan_mode; // @[el2_pic_ctrl.scala 162:32] + wire pic_data_c1_cgc_io_l1clk; // @[el2_pic_ctrl.scala 166:32] + wire pic_data_c1_cgc_io_clk; // @[el2_pic_ctrl.scala 166:32] + wire pic_data_c1_cgc_io_en; // @[el2_pic_ctrl.scala 166:32] + wire pic_data_c1_cgc_io_scan_mode; // @[el2_pic_ctrl.scala 166:32] + wire pic_pri_c1_cgc_io_l1clk; // @[el2_pic_ctrl.scala 170:31] + wire pic_pri_c1_cgc_io_clk; // @[el2_pic_ctrl.scala 170:31] + wire pic_pri_c1_cgc_io_en; // @[el2_pic_ctrl.scala 170:31] + wire pic_pri_c1_cgc_io_scan_mode; // @[el2_pic_ctrl.scala 170:31] + wire pic_int_c1_cgc_io_l1clk; // @[el2_pic_ctrl.scala 174:32] + wire pic_int_c1_cgc_io_clk; // @[el2_pic_ctrl.scala 174:32] + wire pic_int_c1_cgc_io_en; // @[el2_pic_ctrl.scala 174:32] + wire pic_int_c1_cgc_io_scan_mode; // @[el2_pic_ctrl.scala 174:32] + wire gw_config_c1_cgc_io_l1clk; // @[el2_pic_ctrl.scala 178:33] + wire gw_config_c1_cgc_io_clk; // @[el2_pic_ctrl.scala 178:33] + wire gw_config_c1_cgc_io_en; // @[el2_pic_ctrl.scala 178:33] + wire gw_config_c1_cgc_io_scan_mode; // @[el2_pic_ctrl.scala 178:33] + wire sync_inst_reset; // @[el2_pic_ctrl.scala 185:26] + wire [30:0] sync_inst_io_din; // @[el2_pic_ctrl.scala 185:26] + wire [30:0] sync_inst_io_dout; // @[el2_pic_ctrl.scala 185:26] + wire sync_inst_io_clk; // @[el2_pic_ctrl.scala 185:26] + wire pic_raddr_c1_clk = pic_addr_c1_cgc_io_l1clk; // @[el2_pic_ctrl.scala 127:42 el2_pic_ctrl.scala 163:89] + reg [31:0] picm_raddr_ff; // @[el2_pic_ctrl.scala 133:56] + wire pic_data_c1_clk = pic_data_c1_cgc_io_l1clk; // @[el2_pic_ctrl.scala 128:42 el2_pic_ctrl.scala 167:89] + reg [31:0] picm_waddr_ff; // @[el2_pic_ctrl.scala 134:57] + reg picm_wren_ff; // @[el2_pic_ctrl.scala 135:55] + reg picm_rden_ff; // @[el2_pic_ctrl.scala 136:55] + reg [31:0] picm_wr_data_ff; // @[el2_pic_ctrl.scala 138:58] + wire raddr_intenable_base_match = picm_raddr_ff[31:7] == 25'h1e01840; // @[el2_pic_ctrl.scala 140:71] + wire raddr_intpriority_base_match = picm_raddr_ff[31:7] == 25'h1e01800; // @[el2_pic_ctrl.scala 141:71] + wire raddr_config_gw_base_match = picm_raddr_ff[31:7] == 25'h1e01880; // @[el2_pic_ctrl.scala 142:71] + wire waddr_config_pic_match = picm_waddr_ff == 32'hf00c3000; // @[el2_pic_ctrl.scala 146:71] + wire waddr_intpriority_base_match = picm_waddr_ff[31:7] == 25'h1e01800; // @[el2_pic_ctrl.scala 148:71] + wire waddr_config_gw_base_match = picm_waddr_ff[31:7] == 25'h1e01880; // @[el2_pic_ctrl.scala 150:71] + wire _T_18 = io_picm_mken | io_picm_rden; // @[el2_pic_ctrl.scala 155:42] + wire _T_19 = waddr_intpriority_base_match & picm_wren_ff; // @[el2_pic_ctrl.scala 157:59] + wire _T_20 = raddr_intpriority_base_match & picm_rden_ff; // @[el2_pic_ctrl.scala 157:108] + wire _T_21 = _T_19 | _T_20; // @[el2_pic_ctrl.scala 157:76] + wire _T_23 = raddr_intenable_base_match & picm_rden_ff; // @[el2_pic_ctrl.scala 158:106] + wire _T_24 = _T_19 | _T_23; // @[el2_pic_ctrl.scala 158:76] + wire _T_25 = waddr_config_gw_base_match & picm_wren_ff; // @[el2_pic_ctrl.scala 159:59] + wire _T_26 = raddr_config_gw_base_match & picm_rden_ff; // @[el2_pic_ctrl.scala 159:108] + wire _T_27 = _T_25 | _T_26; // @[el2_pic_ctrl.scala 159:76] + wire config_reg_we = waddr_config_pic_match & picm_wren_ff; // @[el2_pic_ctrl.scala 195:47] + wire config_reg_in = picm_wr_data_ff[0]; // @[el2_pic_ctrl.scala 197:39] + reg config_reg; // @[Reg.scala 27:20] + wire [3:0] pl_in_q = config_reg ? 4'hf : 4'h0; // @[el2_pic_ctrl.scala 204:20] + reg [3:0] _T_36; // @[el2_pic_ctrl.scala 206:42] + wire [3:0] maxint = config_reg ? 4'h0 : 4'hf; // @[el2_pic_ctrl.scala 211:19] + reg _T_45; // @[el2_pic_ctrl.scala 213:48] + rvclkhdr pic_addr_c1_cgc ( // @[el2_pic_ctrl.scala 162:32] + .io_l1clk(pic_addr_c1_cgc_io_l1clk), + .io_clk(pic_addr_c1_cgc_io_clk), + .io_en(pic_addr_c1_cgc_io_en), + .io_scan_mode(pic_addr_c1_cgc_io_scan_mode) + ); + rvclkhdr pic_data_c1_cgc ( // @[el2_pic_ctrl.scala 166:32] + .io_l1clk(pic_data_c1_cgc_io_l1clk), + .io_clk(pic_data_c1_cgc_io_clk), + .io_en(pic_data_c1_cgc_io_en), + .io_scan_mode(pic_data_c1_cgc_io_scan_mode) + ); + rvclkhdr pic_pri_c1_cgc ( // @[el2_pic_ctrl.scala 170:31] + .io_l1clk(pic_pri_c1_cgc_io_l1clk), + .io_clk(pic_pri_c1_cgc_io_clk), + .io_en(pic_pri_c1_cgc_io_en), + .io_scan_mode(pic_pri_c1_cgc_io_scan_mode) + ); + rvclkhdr pic_int_c1_cgc ( // @[el2_pic_ctrl.scala 174:32] + .io_l1clk(pic_int_c1_cgc_io_l1clk), + .io_clk(pic_int_c1_cgc_io_clk), + .io_en(pic_int_c1_cgc_io_en), + .io_scan_mode(pic_int_c1_cgc_io_scan_mode) + ); + rvclkhdr gw_config_c1_cgc ( // @[el2_pic_ctrl.scala 178:33] + .io_l1clk(gw_config_c1_cgc_io_l1clk), + .io_clk(gw_config_c1_cgc_io_clk), + .io_en(gw_config_c1_cgc_io_en), + .io_scan_mode(gw_config_c1_cgc_io_scan_mode) + ); + rvsyncss sync_inst ( // @[el2_pic_ctrl.scala 185:26] + .reset(sync_inst_reset), + .io_din(sync_inst_io_din), + .io_dout(sync_inst_io_dout), + .io_clk(sync_inst_io_clk) + ); + assign io_mexintpend = 1'h0; // @[el2_pic_ctrl.scala 31:20 el2_pic_ctrl.scala 210:40] + assign io_claimid = 8'h0; // @[el2_pic_ctrl.scala 32:20 el2_pic_ctrl.scala 205:37] + assign io_pl = _T_36; // @[el2_pic_ctrl.scala 33:20 el2_pic_ctrl.scala 206:32] + assign io_picm_rd_data = 32'h0; // @[el2_pic_ctrl.scala 34:20] + assign io_mhwakeup = _T_45; // @[el2_pic_ctrl.scala 35:20 el2_pic_ctrl.scala 213:38] + assign io_test = {sync_inst_io_dout,io_extintsrc_req[0]}; // @[el2_pic_ctrl.scala 190:11] + assign pic_addr_c1_cgc_io_clk = clock; // @[el2_pic_ctrl.scala 164:34] + assign pic_addr_c1_cgc_io_en = _T_18 | io_clk_override; // @[el2_pic_ctrl.scala 163:34] + assign pic_addr_c1_cgc_io_scan_mode = io_scan_mode; // @[el2_pic_ctrl.scala 164:89] + assign pic_data_c1_cgc_io_clk = clock; // @[el2_pic_ctrl.scala 168:34] + assign pic_data_c1_cgc_io_en = io_picm_wren | io_clk_override; // @[el2_pic_ctrl.scala 167:34] + assign pic_data_c1_cgc_io_scan_mode = io_scan_mode; // @[el2_pic_ctrl.scala 168:89] + assign pic_pri_c1_cgc_io_clk = clock; // @[el2_pic_ctrl.scala 172:33] + assign pic_pri_c1_cgc_io_en = _T_21 | io_clk_override; // @[el2_pic_ctrl.scala 171:33] + assign pic_pri_c1_cgc_io_scan_mode = io_scan_mode; // @[el2_pic_ctrl.scala 172:87] + assign pic_int_c1_cgc_io_clk = clock; // @[el2_pic_ctrl.scala 176:33] + assign pic_int_c1_cgc_io_en = _T_24 | io_clk_override; // @[el2_pic_ctrl.scala 175:33] + assign pic_int_c1_cgc_io_scan_mode = io_scan_mode; // @[el2_pic_ctrl.scala 176:87] + assign gw_config_c1_cgc_io_clk = clock; // @[el2_pic_ctrl.scala 180:35] + assign gw_config_c1_cgc_io_en = _T_27 | io_clk_override; // @[el2_pic_ctrl.scala 179:35] + assign gw_config_c1_cgc_io_scan_mode = io_scan_mode; // @[el2_pic_ctrl.scala 180:91] + assign sync_inst_reset = reset; + assign sync_inst_io_din = io_extintsrc_req[31:1]; // @[el2_pic_ctrl.scala 186:29] + assign sync_inst_io_clk = io_free_clk; // @[el2_pic_ctrl.scala 188:29] +`ifdef RANDOMIZE_GARBAGE_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_INVALID_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_REG_INIT +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_MEM_INIT +`define RANDOMIZE +`endif +`ifndef RANDOM +`define RANDOM $random +`endif +`ifdef RANDOMIZE_MEM_INIT + integer initvar; +`endif +`ifndef SYNTHESIS +`ifdef FIRRTL_BEFORE_INITIAL +`FIRRTL_BEFORE_INITIAL +`endif +initial begin + `ifdef RANDOMIZE + `ifdef INIT_RANDOM + `INIT_RANDOM + `endif + `ifndef VERILATOR + `ifdef RANDOMIZE_DELAY + #`RANDOMIZE_DELAY begin end + `else + #0.002 begin end + `endif + `endif +`ifdef RANDOMIZE_REG_INIT + _RAND_0 = {1{`RANDOM}}; + picm_raddr_ff = _RAND_0[31:0]; + _RAND_1 = {1{`RANDOM}}; + picm_waddr_ff = _RAND_1[31:0]; + _RAND_2 = {1{`RANDOM}}; + picm_wren_ff = _RAND_2[0:0]; + _RAND_3 = {1{`RANDOM}}; + picm_rden_ff = _RAND_3[0:0]; + _RAND_4 = {1{`RANDOM}}; + picm_wr_data_ff = _RAND_4[31:0]; + _RAND_5 = {1{`RANDOM}}; + config_reg = _RAND_5[0:0]; + _RAND_6 = {1{`RANDOM}}; + _T_36 = _RAND_6[3:0]; + _RAND_7 = {1{`RANDOM}}; + _T_45 = _RAND_7[0:0]; +`endif // RANDOMIZE_REG_INIT + if (reset) begin + picm_raddr_ff = 32'h0; + end + if (reset) begin + picm_waddr_ff = 32'h0; + end + if (reset) begin + picm_wren_ff = 1'h0; + end + if (reset) begin + picm_rden_ff = 1'h0; + end + if (reset) begin + picm_wr_data_ff = 32'h0; + end + if (reset) begin + config_reg = 1'h0; + end + if (reset) begin + _T_36 = 4'h0; + end + if (reset) begin + _T_45 = 1'h0; + end + `endif // RANDOMIZE +end // initial +`ifdef FIRRTL_AFTER_INITIAL +`FIRRTL_AFTER_INITIAL +`endif +`endif // SYNTHESIS + always @(posedge pic_raddr_c1_clk or posedge reset) begin + if (reset) begin + picm_raddr_ff <= 32'h0; + end else begin + picm_raddr_ff <= io_picm_rdaddr; + end + end + always @(posedge pic_data_c1_clk or posedge reset) begin + if (reset) begin + picm_waddr_ff <= 32'h0; + end else begin + picm_waddr_ff <= io_picm_wraddr; + end + end + always @(posedge io_active_clk or posedge reset) begin + if (reset) begin + picm_wren_ff <= 1'h0; + end else begin + picm_wren_ff <= io_picm_wren; + end + end + always @(posedge io_active_clk or posedge reset) begin + if (reset) begin + picm_rden_ff <= 1'h0; + end else begin + picm_rden_ff <= io_picm_rden; + end + end + always @(posedge pic_data_c1_clk or posedge reset) begin + if (reset) begin + picm_wr_data_ff <= 32'h0; + end else begin + picm_wr_data_ff <= io_picm_wr_data; + end + end + always @(posedge io_free_clk or posedge reset) begin + if (reset) begin + config_reg <= 1'h0; + end else if (config_reg_we) begin + config_reg <= config_reg_in; + end + end + always @(posedge io_free_clk or posedge reset) begin + if (reset) begin + _T_36 <= 4'h0; + end else if (config_reg) begin + _T_36 <= 4'hf; + end else begin + _T_36 <= 4'h0; + end + end + always @(posedge io_free_clk or posedge reset) begin + if (reset) begin + _T_45 <= 1'h0; + end else begin + _T_45 <= pl_in_q == maxint; + end + end +endmodule diff --git a/firrtl_black_box_resource_files.f b/firrtl_black_box_resource_files.f index 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\ No newline at end of file diff --git a/project/target/streams/_global/update/_global/streams/out b/project/target/streams/_global/update/_global/streams/out index 22a7b955..f3dcc397 100644 --- a/project/target/streams/_global/update/_global/streams/out +++ b/project/target/streams/_global/update/_global/streams/out @@ -1,3 +1,3 @@ [debug] "not up to date. inChanged = true, force = false -[debug] Updating ProjectRef(uri("file:/home/waleedbinehsan/Desktop/SweRV-Chislified-master/project/"), "swerv-chislified-master-build")... -[debug] Done updating ProjectRef(uri("file:/home/waleedbinehsan/Desktop/SweRV-Chislified-master/project/"), "swerv-chislified-master-build") +[debug] Updating ProjectRef(uri("file:/home/laraibkhan/Desktop/SweRV-Chislified/project/"), "swerv-chislified-build")... +[debug] Done updating ProjectRef(uri("file:/home/laraibkhan/Desktop/SweRV-Chislified/project/"), "swerv-chislified-build") diff --git a/project/target/streams/compile/_global/_global/compileBinaryFileInputs/previous b/project/target/streams/compile/_global/_global/compileBinaryFileInputs/previous index 2c776575..cad06dfe 100644 --- a/project/target/streams/compile/_global/_global/compileBinaryFileInputs/previous +++ b/project/target/streams/compile/_global/_global/compileBinaryFileInputs/previous @@ -1 +1 @@ -["sbt.Task[scala.collection.immutable.Map[java.lang.String, scala.collection.Seq[scala.Tuple2[java.nio.file.Path, sbt.nio.FileStamp]]]]",{"2.12.10":{"hashes":[],"lastModifiedTimes":[["/home/waleedbinehsan/idea-IE-201.7846.105/plugins/Scala/repo/org.jetbrains/sbt-structure-extractor/scala_2.12/sbt_1.0/2018.2.1+4-88400d3f/jars/sbt-structure-extractor.jar",1592576981000],["/home/waleedbinehsan/idea-IE-201.7846.105/plugins/Scala/repo/org.jetbrains/sbt-idea-shell/scala_2.12/sbt_1.0/2018.3/jars/sbt-idea-shell.jar",1592576981000],["/home/waleedbinehsan/idea-IE-201.7846.105/plugins/Scala/repo/org.jetbrains/sbt-idea-compiler-indices/scala_2.12/sbt_1.0/0.1.3/jars/sbt-idea-compiler-indices.jar",1592576981000],["/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/sbt/1.3.10/sbt-1.3.10.jar",1586919578000],["/home/waleedbinehsan/.sbt/boot/scala-2.12.10/lib/scala-library.jar",1568150453000],["/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/io/github/sugakandrey/scala-compiler-indices-protocol_2.12/0.1.1/scala-compiler-indices-protocol_2.12-0.1.1.jar",1552482712000],["/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/main_2.12/1.3.10/main_2.12-1.3.10.jar",1586919585000],["/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/io_2.12/1.3.4/io_2.12-1.3.4.jar",1585597895000],["/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/io/spray/spray-json_2.12/1.3.4/spray-json_2.12-1.3.4.jar",1508828031000],["/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/logic_2.12/1.3.10/logic_2.12-1.3.10.jar",1586919582000],["/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/actions_2.12/1.3.10/actions_2.12-1.3.10.jar",1586919588000],["/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/main-settings_2.12/1.3.10/main-settings_2.12-1.3.10.jar",1586919593000],["/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/run_2.12/1.3.10/run_2.12-1.3.10.jar",1586919595000],["/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/command_2.12/1.3.10/command_2.12-1.3.10.jar",1586919569000],["/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/collections_2.12/1.3.10/collections_2.12-1.3.10.jar",1586919594000],["/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/scripted-sbt-redux_2.12/1.3.10/scripted-sbt-redux_2.12-1.3.10.jar",1586919582000],["/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/scripted-plugin_2.12/1.3.10/scripted-plugin_2.12-1.3.10.jar",1586919592000],["/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/zinc-lm-integration_2.12/1.3.10/zinc-lm-integration_2.12-1.3.10.jar",1586919595000],["/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-xml_2.12/1.2.0/scala-xml_2.12-1.2.0.jar",1554476959000],["/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/launcher-interface/1.1.3/launcher-interface-1.1.3.jar",1566946835000],["/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/logging/log4j/log4j-api/2.11.2/log4j-api-2.11.2.jar",1549415503000],["/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/logging/log4j/log4j-core/2.11.2/log4j-core-2.11.2.jar",1549415573000],["/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/logging/log4j/log4j-slf4j-impl/2.11.2/log4j-slf4j-impl-2.11.2.jar",1549415635000],["/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/cb372/scalacache-caffeine_2.12/0.20.0/scalacache-caffeine_2.12-0.20.0.jar",1510153827000],["/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/io/get-coursier/lm-coursier-shaded_2.12/2.0.0-RC6-2/lm-coursier-shaded_2.12-2.0.0-RC6-2.jar",1584360077000],["/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/util-logging_2.12/1.3.3/util-logging_2.12-1.3.3.jar",1576119989000],["/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/librarymanagement-core_2.12/1.3.2/librarymanagement-core_2.12-1.3.2.jar",1586906938000],["/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/librarymanagement-ivy_2.12/1.3.2/librarymanagement-ivy_2.12-1.3.2.jar",1586906935000],["/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/compiler-interface/1.3.5/compiler-interface-1.3.5.jar",1585527738000],["/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/zinc-compile_2.12/1.3.5/zinc-compile_2.12-1.3.5.jar",1585527746000],["/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/swoval/file-tree-views/2.1.3/file-tree-views-2.1.3.jar",1562617173000],["/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/net/java/dev/jna/jna/5.5.0/jna-5.5.0.jar",157245345600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\ No newline at end of file diff --git a/project/target/streams/compile/_global/_global/compileOutputs/previous b/project/target/streams/compile/_global/_global/compileOutputs/previous index 135a1390..c886742e 100644 --- a/project/target/streams/compile/_global/_global/compileOutputs/previous +++ b/project/target/streams/compile/_global/_global/compileOutputs/previous @@ -1 +1 @@ -["sbt.Task[scala.collection.Seq[java.nio.file.Path]]",["/home/waleedbinehsan/Desktop/SweRV-Chislified-master/project/target/streams/compile/compileOutputs/_global/streams/inc_compile_2.12.zip"]] \ No newline at end of file +["sbt.Task[scala.collection.Seq[java.nio.file.Path]]",["/home/laraibkhan/Desktop/SweRV-Chislified/project/target/streams/compile/compileOutputs/_global/streams/inc_compile_2.12.zip"]] \ No newline at end of file diff --git a/project/target/streams/compile/_global/_global/dependencyClasspathFiles/previous b/project/target/streams/compile/_global/_global/dependencyClasspathFiles/previous index cb0933f2..161581c3 100644 --- a/project/target/streams/compile/_global/_global/dependencyClasspathFiles/previous +++ b/project/target/streams/compile/_global/_global/dependencyClasspathFiles/previous @@ -1 +1 @@ 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\ No newline at end of file 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\ No newline at end of file diff --git a/project/target/streams/compile/dependencyClasspath/_global/streams/export b/project/target/streams/compile/dependencyClasspath/_global/streams/export index 7a5c37b9..00cb3f57 100644 --- a/project/target/streams/compile/dependencyClasspath/_global/streams/export +++ b/project/target/streams/compile/dependencyClasspath/_global/streams/export @@ -1 +1 @@ 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diff --git a/project/target/streams/compile/exportedProducts/_global/streams/export b/project/target/streams/compile/exportedProducts/_global/streams/export index 1614a19f..fd258ea7 100644 --- a/project/target/streams/compile/exportedProducts/_global/streams/export +++ b/project/target/streams/compile/exportedProducts/_global/streams/export @@ -1 +1 @@ -/home/waleedbinehsan/Desktop/SweRV-Chislified-master/project/target/scala-2.12/sbt-1.0/classes +/home/laraibkhan/Desktop/SweRV-Chislified/project/target/scala-2.12/sbt-1.0/classes diff --git a/project/target/streams/compile/externalDependencyClasspath/_global/streams/export b/project/target/streams/compile/externalDependencyClasspath/_global/streams/export index d4b92b6a..2d34270f 100644 --- a/project/target/streams/compile/externalDependencyClasspath/_global/streams/export +++ b/project/target/streams/compile/externalDependencyClasspath/_global/streams/export @@ -1 +1 @@ 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diff --git a/project/target/streams/compile/managedClasspath/_global/streams/export b/project/target/streams/compile/managedClasspath/_global/streams/export index d4b92b6a..2d34270f 100644 --- a/project/target/streams/compile/managedClasspath/_global/streams/export +++ b/project/target/streams/compile/managedClasspath/_global/streams/export @@ -1 +1 @@ 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diff --git a/project/target/streams/runtime/dependencyClasspath/_global/streams/export b/project/target/streams/runtime/dependencyClasspath/_global/streams/export index 7b12b4ca..aebf979e 100644 --- a/project/target/streams/runtime/dependencyClasspath/_global/streams/export +++ b/project/target/streams/runtime/dependencyClasspath/_global/streams/export @@ -1 +1 @@ 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--git a/project/target/streams/runtime/exportedProducts/_global/streams/export b/project/target/streams/runtime/exportedProducts/_global/streams/export index 1614a19f..fd258ea7 100644 --- a/project/target/streams/runtime/exportedProducts/_global/streams/export +++ b/project/target/streams/runtime/exportedProducts/_global/streams/export @@ -1 +1 @@ -/home/waleedbinehsan/Desktop/SweRV-Chislified-master/project/target/scala-2.12/sbt-1.0/classes +/home/laraibkhan/Desktop/SweRV-Chislified/project/target/scala-2.12/sbt-1.0/classes diff --git a/project/target/streams/runtime/externalDependencyClasspath/_global/streams/export b/project/target/streams/runtime/externalDependencyClasspath/_global/streams/export index 94a89648..c738e783 100644 --- a/project/target/streams/runtime/externalDependencyClasspath/_global/streams/export +++ b/project/target/streams/runtime/externalDependencyClasspath/_global/streams/export @@ -1 +1 @@ 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7b12b4ca..aebf979e 100644 --- a/project/target/streams/runtime/fullClasspath/_global/streams/export +++ b/project/target/streams/runtime/fullClasspath/_global/streams/export @@ -1 +1 @@ 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--git a/project/target/streams/runtime/internalDependencyClasspath/_global/streams/export b/project/target/streams/runtime/internalDependencyClasspath/_global/streams/export index 1614a19f..fd258ea7 100644 --- a/project/target/streams/runtime/internalDependencyClasspath/_global/streams/export +++ b/project/target/streams/runtime/internalDependencyClasspath/_global/streams/export @@ -1 +1 @@ -/home/waleedbinehsan/Desktop/SweRV-Chislified-master/project/target/scala-2.12/sbt-1.0/classes +/home/laraibkhan/Desktop/SweRV-Chislified/project/target/scala-2.12/sbt-1.0/classes diff --git a/project/target/streams/runtime/managedClasspath/_global/streams/export b/project/target/streams/runtime/managedClasspath/_global/streams/export index 94a89648..c738e783 100644 --- a/project/target/streams/runtime/managedClasspath/_global/streams/export +++ b/project/target/streams/runtime/managedClasspath/_global/streams/export @@ -1 +1 @@ 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+/home/laraibkhan/.local/share/JetBrains/IdeaIC2020.2/Scala/repo/org.jetbrains/sbt-structure-extractor/scala_2.12/sbt_1.0/2018.2.1+4-88400d3f/jars/sbt-structure-extractor.jar:/home/laraibkhan/.local/share/JetBrains/IdeaIC2020.2/Scala/repo/org.jetbrains/sbt-idea-shell/scala_2.12/sbt_1.0/2018.3/jars/sbt-idea-shell.jar:/home/laraibkhan/.local/share/JetBrains/IdeaIC2020.2/Scala/repo/org.jetbrains/sbt-idea-compiler-indices/scala_2.12/sbt_1.0/0.1.3/jars/sbt-idea-compiler-indices.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/io/github/sugakandrey/scala-compiler-indices-protocol_2.12/0.1.1/scala-compiler-indices-protocol_2.12-0.1.1.jar:/home/laraibkhan/.sbt/boot/scala-2.12.10/lib/scala-library.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/io/spray/spray-json_2.12/1.3.4/spray-json_2.12-1.3.4.jar diff --git a/rvjtag_tap.anno.json b/rvjtag_tap.anno.json new file mode 100644 index 00000000..ac6ae2a2 --- /dev/null +++ b/rvjtag_tap.anno.json @@ -0,0 +1,18 @@ +[ + { + "class":"firrtl.EmitCircuitAnnotation", + "emitter":"firrtl.VerilogEmitter" + }, + { + "class":"firrtl.options.TargetDirAnnotation", + "directory":"." + }, + { + "class":"firrtl.options.OutputAnnotationFileAnnotation", + "file":"rvjtag_tap" + }, + { + "class":"firrtl.transforms.BlackBoxTargetDirAnno", + "targetDir":"." + } +] \ No newline at end of file diff --git a/rvjtag_tap.fir b/rvjtag_tap.fir new file mode 100644 index 00000000..4a31b428 --- /dev/null +++ b/rvjtag_tap.fir @@ -0,0 +1,221 @@ +;buildInfoPackage: chisel3, version: 3.3.1, scalaVersion: 2.12.11, sbtVersion: 1.3.10 +circuit rvjtag_tap : + module rvjtag_tap : + input clock : Clock + input reset : AsyncReset + output io : {flip tck : Clock, flip tms : UInt<1>, flip tdi : UInt<1>, flip rd_data : UInt<32>, flip rd_status : UInt<2>, flip idle : UInt<3>, flip dmi_stat : UInt<2>, flip jtag_id : UInt<32>, flip version : UInt<4>, tdo : UInt<1>, tdoEnable : UInt<1>, wr_data : UInt<32>, wr_addr : UInt<7>, wr_en : UInt<1>, rd_en : UInt<1>, dmi_reset : UInt<1>, dmi_hard_reset : UInt<1>} + + io.tdo <= UInt<1>("h00") @[rvjtag_tap.scala 38:21] + io.tdoEnable <= UInt<1>("h00") @[rvjtag_tap.scala 39:21] + io.wr_data <= UInt<1>("h00") @[rvjtag_tap.scala 40:21] + io.wr_addr <= UInt<1>("h00") @[rvjtag_tap.scala 41:21] + io.wr_en <= UInt<1>("h00") @[rvjtag_tap.scala 42:21] + io.rd_en <= UInt<1>("h00") @[rvjtag_tap.scala 43:21] + io.dmi_reset <= UInt<1>("h00") @[rvjtag_tap.scala 44:21] + io.dmi_hard_reset <= UInt<1>("h00") @[rvjtag_tap.scala 45:21] + reg sr : UInt<41>, clock with : (reset => (reset, UInt<1>("h00"))) @[rvjtag_tap.scala 48:20] + reg nsr : UInt<41>, clock with : (reset => (reset, UInt<1>("h00"))) @[rvjtag_tap.scala 49:20] + reg dr : UInt<41>, clock with : (reset => (reset, UInt<1>("h00"))) @[rvjtag_tap.scala 50:20] + wire ir : UInt<5> + ir <= UInt<1>("h00") + wire jtag_reset : UInt<1> + jtag_reset <= UInt<1>("h00") + wire shift_dr : UInt<1> + shift_dr <= UInt<1>("h00") + wire pause_dr : UInt<1> + pause_dr <= UInt<1>("h00") + wire update_dr : UInt<1> + update_dr <= UInt<1>("h00") + wire capture_dr : UInt<1> + capture_dr <= UInt<1>("h00") + wire shift_ir : UInt<1> + shift_ir <= UInt<1>("h00") + wire pause_ir : UInt<1> + pause_ir <= UInt<1>("h00") + wire update_ir : UInt<1> + update_ir <= UInt<1>("h00") + wire capture_ir : UInt<1> + capture_ir <= UInt<1>("h00") + wire dr_en : UInt<2> + dr_en <= UInt<1>("h00") + wire devid_sel : UInt<1> + devid_sel <= UInt<1>("h00") + reg state : UInt<4>, clock with : (reset => (reset, UInt<4>("h00"))) @[rvjtag_tap.scala 75:27] + reg nstate : UInt, clock with : (reset => (reset, UInt<4>("h00"))) @[rvjtag_tap.scala 76:27] + nstate <= state @[rvjtag_tap.scala 76:27] + node _T = eq(UInt<4>("h00"), state) @[Conditional.scala 37:30] + when _T : @[Conditional.scala 40:58] + node _T_1 = eq(io.tms, UInt<1>("h01")) @[rvjtag_tap.scala 80:21] + when _T_1 : @[rvjtag_tap.scala 80:32] + nstate <= UInt<4>("h00") @[rvjtag_tap.scala 80:41] + skip @[rvjtag_tap.scala 80:32] + else : @[rvjtag_tap.scala 81:20] + nstate <= UInt<4>("h01") @[rvjtag_tap.scala 81:29] + skip @[rvjtag_tap.scala 81:20] + skip @[Conditional.scala 40:58] + else : @[Conditional.scala 39:67] + node _T_2 = eq(UInt<4>("h01"), state) @[Conditional.scala 37:30] + when _T_2 : @[Conditional.scala 39:67] + node _T_3 = eq(io.tms, UInt<1>("h01")) @[rvjtag_tap.scala 84:21] + when _T_3 : @[rvjtag_tap.scala 84:32] + nstate <= UInt<4>("h02") @[rvjtag_tap.scala 84:40] + skip @[rvjtag_tap.scala 84:32] + else : @[rvjtag_tap.scala 85:20] + nstate <= UInt<4>("h01") @[rvjtag_tap.scala 85:28] + skip @[rvjtag_tap.scala 85:20] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_4 = eq(UInt<4>("h02"), state) @[Conditional.scala 37:30] + when _T_4 : @[Conditional.scala 39:67] + node _T_5 = eq(io.tms, UInt<1>("h01")) @[rvjtag_tap.scala 88:21] + when _T_5 : @[rvjtag_tap.scala 88:32] + nstate <= UInt<4>("h09") @[rvjtag_tap.scala 88:40] + skip @[rvjtag_tap.scala 88:32] + else : @[rvjtag_tap.scala 89:20] + nstate <= UInt<4>("h03") @[rvjtag_tap.scala 89:28] + skip @[rvjtag_tap.scala 89:20] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_6 = eq(UInt<4>("h03"), state) @[Conditional.scala 37:30] + when _T_6 : @[Conditional.scala 39:67] + node _T_7 = eq(io.tms, UInt<1>("h01")) @[rvjtag_tap.scala 92:21] + when _T_7 : @[rvjtag_tap.scala 92:32] + nstate <= UInt<4>("h05") @[rvjtag_tap.scala 92:40] + skip @[rvjtag_tap.scala 92:32] + else : @[rvjtag_tap.scala 93:20] + nstate <= UInt<4>("h04") @[rvjtag_tap.scala 93:28] + skip @[rvjtag_tap.scala 93:20] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_8 = eq(UInt<4>("h04"), state) @[Conditional.scala 37:30] + when _T_8 : @[Conditional.scala 39:67] + node _T_9 = eq(io.tms, UInt<1>("h01")) @[rvjtag_tap.scala 96:21] + when _T_9 : @[rvjtag_tap.scala 96:32] + nstate <= UInt<4>("h05") @[rvjtag_tap.scala 96:40] + skip @[rvjtag_tap.scala 96:32] + else : @[rvjtag_tap.scala 97:20] + nstate <= UInt<4>("h04") @[rvjtag_tap.scala 97:28] + skip @[rvjtag_tap.scala 97:20] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_10 = eq(UInt<4>("h05"), state) @[Conditional.scala 37:30] + when _T_10 : @[Conditional.scala 39:67] + node _T_11 = eq(io.tms, UInt<1>("h01")) @[rvjtag_tap.scala 100:21] + when _T_11 : @[rvjtag_tap.scala 100:32] + nstate <= UInt<4>("h08") @[rvjtag_tap.scala 100:40] + skip @[rvjtag_tap.scala 100:32] + else : @[rvjtag_tap.scala 101:20] + nstate <= UInt<4>("h06") @[rvjtag_tap.scala 101:28] + skip @[rvjtag_tap.scala 101:20] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_12 = eq(UInt<4>("h06"), state) @[Conditional.scala 37:30] + when _T_12 : @[Conditional.scala 39:67] + node _T_13 = eq(io.tms, UInt<1>("h01")) @[rvjtag_tap.scala 104:18] + when _T_13 : @[rvjtag_tap.scala 104:29] + nstate <= UInt<4>("h07") @[rvjtag_tap.scala 104:37] + skip @[rvjtag_tap.scala 104:29] + else : @[rvjtag_tap.scala 105:20] + nstate <= UInt<4>("h06") @[rvjtag_tap.scala 105:28] + skip @[rvjtag_tap.scala 105:20] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_14 = eq(UInt<4>("h07"), state) @[Conditional.scala 37:30] + when _T_14 : @[Conditional.scala 39:67] + node _T_15 = eq(io.tms, UInt<1>("h01")) @[rvjtag_tap.scala 108:18] + when _T_15 : @[rvjtag_tap.scala 108:29] + nstate <= UInt<4>("h08") @[rvjtag_tap.scala 108:37] + skip @[rvjtag_tap.scala 108:29] + else : @[rvjtag_tap.scala 109:20] + nstate <= UInt<4>("h04") @[rvjtag_tap.scala 109:28] + skip @[rvjtag_tap.scala 109:20] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_16 = eq(UInt<4>("h08"), state) @[Conditional.scala 37:30] + when _T_16 : @[Conditional.scala 39:67] + node _T_17 = eq(io.tms, UInt<1>("h01")) @[rvjtag_tap.scala 112:18] + when _T_17 : @[rvjtag_tap.scala 112:29] + nstate <= UInt<4>("h02") @[rvjtag_tap.scala 112:37] + skip @[rvjtag_tap.scala 112:29] + else : @[rvjtag_tap.scala 113:20] + nstate <= UInt<4>("h01") @[rvjtag_tap.scala 113:28] + skip @[rvjtag_tap.scala 113:20] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_18 = eq(UInt<4>("h09"), state) @[Conditional.scala 37:30] + when _T_18 : @[Conditional.scala 39:67] + node _T_19 = eq(io.tms, UInt<1>("h01")) @[rvjtag_tap.scala 116:18] + when _T_19 : @[rvjtag_tap.scala 116:29] + nstate <= UInt<4>("h09") @[rvjtag_tap.scala 116:37] + skip @[rvjtag_tap.scala 116:29] + else : @[rvjtag_tap.scala 117:20] + nstate <= UInt<4>("h0a") @[rvjtag_tap.scala 117:28] + skip @[rvjtag_tap.scala 117:20] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_20 = eq(UInt<4>("h0a"), state) @[Conditional.scala 37:30] + when _T_20 : @[Conditional.scala 39:67] + node _T_21 = eq(io.tms, UInt<1>("h01")) @[rvjtag_tap.scala 120:18] + when _T_21 : @[rvjtag_tap.scala 120:29] + nstate <= UInt<4>("h0c") @[rvjtag_tap.scala 120:37] + skip @[rvjtag_tap.scala 120:29] + else : @[rvjtag_tap.scala 121:20] + nstate <= UInt<4>("h0b") @[rvjtag_tap.scala 121:28] + skip @[rvjtag_tap.scala 121:20] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_22 = eq(UInt<4>("h0b"), state) @[Conditional.scala 37:30] + when _T_22 : @[Conditional.scala 39:67] + node _T_23 = eq(io.tms, UInt<1>("h01")) @[rvjtag_tap.scala 124:18] + when _T_23 : @[rvjtag_tap.scala 124:29] + nstate <= UInt<4>("h0c") @[rvjtag_tap.scala 124:37] + skip @[rvjtag_tap.scala 124:29] + else : @[rvjtag_tap.scala 125:20] + nstate <= UInt<4>("h0b") @[rvjtag_tap.scala 125:28] + skip @[rvjtag_tap.scala 125:20] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_24 = eq(UInt<4>("h0c"), state) @[Conditional.scala 37:30] + when _T_24 : @[Conditional.scala 39:67] + node _T_25 = eq(io.tms, UInt<1>("h01")) @[rvjtag_tap.scala 128:18] + when _T_25 : @[rvjtag_tap.scala 128:29] + nstate <= UInt<4>("h0f") @[rvjtag_tap.scala 128:37] + skip @[rvjtag_tap.scala 128:29] + else : @[rvjtag_tap.scala 129:20] + nstate <= UInt<4>("h0d") @[rvjtag_tap.scala 129:28] + skip @[rvjtag_tap.scala 129:20] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_26 = eq(UInt<4>("h0d"), state) @[Conditional.scala 37:30] + when _T_26 : @[Conditional.scala 39:67] + node _T_27 = eq(io.tms, UInt<1>("h01")) @[rvjtag_tap.scala 132:18] + when _T_27 : @[rvjtag_tap.scala 132:29] + nstate <= UInt<4>("h0e") @[rvjtag_tap.scala 132:37] + skip @[rvjtag_tap.scala 132:29] + else : @[rvjtag_tap.scala 133:20] + nstate <= UInt<4>("h0d") @[rvjtag_tap.scala 133:28] + skip @[rvjtag_tap.scala 133:20] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_28 = eq(UInt<4>("h0e"), state) @[Conditional.scala 37:30] + when _T_28 : @[Conditional.scala 39:67] + node _T_29 = eq(io.tms, UInt<1>("h01")) @[rvjtag_tap.scala 136:18] + when _T_29 : @[rvjtag_tap.scala 136:29] + nstate <= UInt<4>("h0f") @[rvjtag_tap.scala 136:37] + skip @[rvjtag_tap.scala 136:29] + else : @[rvjtag_tap.scala 137:20] + nstate <= UInt<4>("h0b") @[rvjtag_tap.scala 137:28] + skip @[rvjtag_tap.scala 137:20] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_30 = eq(UInt<4>("h0f"), state) @[Conditional.scala 37:30] + when _T_30 : @[Conditional.scala 39:67] + node _T_31 = eq(io.tms, UInt<1>("h01")) @[rvjtag_tap.scala 140:18] + when _T_31 : @[rvjtag_tap.scala 140:29] + nstate <= UInt<4>("h02") @[rvjtag_tap.scala 140:37] + skip @[rvjtag_tap.scala 140:29] + else : @[rvjtag_tap.scala 141:20] + nstate <= UInt<4>("h01") @[rvjtag_tap.scala 141:28] + skip @[rvjtag_tap.scala 141:20] + skip @[Conditional.scala 39:67] + diff --git a/rvjtag_tap.v b/rvjtag_tap.v new file mode 100644 index 00000000..0da18247 --- /dev/null +++ b/rvjtag_tap.v @@ -0,0 +1,30 @@ +module rvjtag_tap( + input clock, + input reset, + input io_tck, + input io_tms, + input io_tdi, + input [31:0] io_rd_data, + input [1:0] io_rd_status, + input [2:0] io_idle, + input [1:0] io_dmi_stat, + input [31:0] io_jtag_id, + input [3:0] io_version, + output io_tdo, + output io_tdoEnable, + output [31:0] io_wr_data, + output [6:0] io_wr_addr, + output io_wr_en, + output io_rd_en, + output io_dmi_reset, + output io_dmi_hard_reset +); + assign io_tdo = 1'h0; // @[rvjtag_tap.scala 38:21] + assign io_tdoEnable = 1'h0; // @[rvjtag_tap.scala 39:21] + assign io_wr_data = 32'h0; // @[rvjtag_tap.scala 40:21] + assign io_wr_addr = 7'h0; // @[rvjtag_tap.scala 41:21] + assign io_wr_en = 1'h0; // @[rvjtag_tap.scala 42:21] + assign io_rd_en = 1'h0; // @[rvjtag_tap.scala 43:21] + assign io_dmi_reset = 1'h0; // @[rvjtag_tap.scala 44:21] + assign io_dmi_hard_reset = 1'h0; // @[rvjtag_tap.scala 45:21] +endmodule diff --git a/src/main/scala/dbg/el2_dbg.scala b/src/main/scala/dbg/el2_dbg.scala deleted file mode 100644 index 3abb3491..00000000 --- a/src/main/scala/dbg/el2_dbg.scala +++ /dev/null @@ -1,5 +0,0 @@ -package dbg - -class el2_dbg { - -} diff --git a/src/main/scala/dmi/dmi_jtag_to_core_sync.scala b/src/main/scala/dmi/dmi_jtag_to_core_sync.scala deleted file mode 100644 index b866beb9..00000000 --- a/src/main/scala/dmi/dmi_jtag_to_core_sync.scala +++ /dev/null @@ -1,5 +0,0 @@ -package dmi - -class dmi_jtag_to_core_sync { - -} diff --git a/src/main/scala/dmi/dmi_wrapper.scala b/src/main/scala/dmi/dmi_wrapper.scala deleted file mode 100644 index 2766360f..00000000 --- a/src/main/scala/dmi/dmi_wrapper.scala +++ /dev/null @@ -1,5 +0,0 @@ -package dmi - -class dmi_wrapper { - -} diff --git a/src/main/scala/dmi/rvjtag_tap.scala b/src/main/scala/dmi/rvjtag_tap.scala deleted file mode 100644 index 731d212b..00000000 --- a/src/main/scala/dmi/rvjtag_tap.scala +++ /dev/null @@ -1,5 +0,0 @@ -package dmi - -class rvjtag_tap { - -} diff --git a/src/main/scala/exu/el2_exu.scala b/src/main/scala/exu/el2_exu.scala index baa0e58e..713285d8 100644 --- a/src/main/scala/exu/el2_exu.scala +++ b/src/main/scala/exu/el2_exu.scala @@ -1,5 +1,299 @@ package exu +import chisel3._ +import scala.collection._ +import chisel3.util._ +import include._ +import lib._ -class el2_exu { +class el2_exu extends Module with param{ + val io=IO(new el2_exu_IO) + val PREDPIPESIZE = BTB_ADDR_HI - BTB_ADDR_LO + BHT_GHR_SIZE + BTB_BTAG_SIZE + val ghr_x_ns = Wire(UInt(BHT_GHR_SIZE.W)) + val ghr_d_ns = Wire(UInt(BHT_GHR_SIZE.W)) + val ghr_d = Wire(UInt(BHT_GHR_SIZE.W)) + val i0_taken_d =Wire(UInt(1.W)) + val mul_valid_x =Wire(UInt(1.W)) + val i0_valid_d =Wire(UInt(1.W)) + val flush_lower_ff =Wire(UInt(1.W)) + val data_gate_en =Wire(UInt(1.W)) + val csr_rs1_in_d =Wire(UInt(32.W)) + val i0_predict_newp_d =Wire(new el2_predict_pkt_t) + val i0_flush_path_d =Wire(UInt(32.W)) + val i0_predict_p_d =Wire(new el2_predict_pkt_t) + val i0_pp_r =Wire(new el2_predict_pkt_t) + val i0_predict_p_x =Wire(new el2_predict_pkt_t) + val final_predict_mp =Wire(new el2_predict_pkt_t) + val pred_correct_npc_r =Wire(UInt(32.W)) + val i0_pred_correct_upper_d =Wire(UInt(1.W)) + val i0_flush_upper_d =Wire(UInt(1.W)) + io.exu_mp_pkt.prett :=0.U + io.exu_mp_pkt.br_start_error:=0.U + io.exu_mp_pkt.br_error :=0.U + io.exu_mp_pkt.valid :=0.U + val x_data_en = io.dec_data_en(1) + val r_data_en = io.dec_data_en(0) + val x_ctl_en = io.dec_ctl_en(1) + val r_ctl_en = io.dec_ctl_en(0) + val predpipe_d = Cat(io.i0_predict_fghr_d, io.i0_predict_index_d, io.i0_predict_btag_d) + + val i0_flush_path_x =rvdffe(i0_flush_path_d,x_data_en.asBool,io.clk,io.scan_mode) + io.exu_csr_rs1_x :=rvdffe(csr_rs1_in_d,x_data_en.asBool,io.clk,io.scan_mode) + i0_predict_p_x :=rvdffe(i0_predict_p_d,x_data_en.asBool,io.clk,io.scan_mode) + val predpipe_x =rvdffe(predpipe_d,x_data_en.asBool,io.clk,io.scan_mode) + val predpipe_r =rvdffe(predpipe_x ,r_data_en.asBool,io.clk,io.scan_mode) + val ghr_x =rvdffe(ghr_x_ns ,x_ctl_en.asBool,io.clk,io.scan_mode) + val i0_pred_correct_upper_x =rvdffe(i0_pred_correct_upper_d ,x_ctl_en.asBool,io.clk,io.scan_mode) + val i0_flush_upper_x =rvdffe(i0_flush_upper_d ,x_ctl_en.asBool,io.clk,io.scan_mode) + val i0_taken_x =rvdffe(i0_taken_d ,x_ctl_en.asBool,io.clk,io.scan_mode) + val i0_valid_x =rvdffe(i0_valid_d ,x_ctl_en.asBool,io.clk,io.scan_mode) + i0_pp_r :=rvdffe(i0_predict_p_x,r_ctl_en.asBool,io.clk,io.scan_mode) + val pred_temp1 =rvdffe(io.pred_correct_npc_x(5,0) ,r_ctl_en.asBool,io.clk,io.scan_mode) + val i0_pred_correct_upper_r =rvdffe(i0_pred_correct_upper_x ,r_ctl_en.asBool,io.clk,io.scan_mode) + val i0_flush_path_upper_r =rvdffe(i0_flush_path_x ,r_data_en.asBool,io.clk,io.scan_mode) + val pred_temp2 =rvdffe(io.pred_correct_npc_x(30,6) ,r_data_en.asBool,io.clk,io.scan_mode) + pred_correct_npc_r :=Cat(pred_temp2,pred_temp1) + + when (BHT_SIZE.asUInt===32.U || BHT_SIZE.asUInt===64.U){ + ghr_d :=withClock(io.clk){RegEnable(ghr_d_ns,0.U,data_gate_en.asBool)} + mul_valid_x :=withClock(io.clk){RegEnable(io.mul_p.valid,0.U,data_gate_en.asBool)} + flush_lower_ff :=withClock(io.clk){RegEnable(io.dec_tlu_flush_lower_r,0.U,data_gate_en.asBool)} + }.otherwise{ + ghr_d :=rvdffe(ghr_d_ns ,data_gate_en.asBool,io.clk,io.scan_mode) + mul_valid_x :=rvdffe(io.mul_p.valid ,data_gate_en.asBool,io.clk,io.scan_mode) + flush_lower_ff :=rvdffe(io.dec_tlu_flush_lower_r ,data_gate_en.asBool,io.clk,io.scan_mode) + } + + + data_gate_en := (ghr_d_ns =/= ghr_d) | ( io.mul_p.valid =/= mul_valid_x) | ( io.dec_tlu_flush_lower_r =/= flush_lower_ff) + val i0_rs1_bypass_en_d = io.dec_i0_rs1_bypass_en_d(0) | io.dec_i0_rs1_bypass_en_d(1) + val i0_rs2_bypass_en_d = io.dec_i0_rs2_bypass_en_d(0) | io.dec_i0_rs2_bypass_en_d(1) + + val i0_rs1_bypass_data_d = Mux1H(Seq( + io.dec_i0_rs1_bypass_en_d(0).asBool -> io.dec_i0_rs1_bypass_data_d, + io.dec_i0_rs1_bypass_en_d(1).asBool -> io.exu_i0_result_x + )) + + val i0_rs2_bypass_data_d = Mux1H(Seq( + io.dec_i0_rs2_bypass_en_d(0).asBool -> io.dec_i0_rs2_bypass_data_d, + io.dec_i0_rs2_bypass_en_d(1).asBool -> io.exu_i0_result_x + )) + + val i0_rs1_d = Mux1H(Seq( + i0_rs1_bypass_en_d.asBool -> i0_rs1_bypass_data_d, + (~i0_rs1_bypass_en_d & io.dec_i0_select_pc_d).asBool -> Cat(io.dec_i0_pc_d,0.U(1.W)), + (~i0_rs1_bypass_en_d & io.dec_debug_wdata_rs1_d).asBool -> io.dbg_cmd_wrdata, + (~i0_rs1_bypass_en_d & ~io.dec_debug_wdata_rs1_d & io.dec_i0_rs1_en_d).asBool -> io.gpr_i0_rs1_d + )) + + val i0_rs2_d=Mux1H(Seq( + (~i0_rs2_bypass_en_d & io.dec_i0_rs2_en_d).asBool -> io.gpr_i0_rs2_d, + (~i0_rs2_bypass_en_d).asBool -> io.dec_i0_immed_d, + (i0_rs2_bypass_en_d).asBool -> i0_rs2_bypass_data_d + )) + + io.exu_lsu_rs1_d:=Mux1H(Seq( + (~i0_rs1_bypass_en_d & ~io.dec_extint_stall & io.dec_i0_rs1_en_d).asBool -> io.gpr_i0_rs1_d, + (i0_rs1_bypass_en_d & ~io.dec_extint_stall).asBool -> i0_rs1_bypass_data_d, + (io.dec_extint_stall).asBool -> Cat(io.dec_tlu_meihap,0.U(2.W)) + )) + + io.exu_lsu_rs2_d:=Mux1H(Seq( + (~i0_rs2_bypass_en_d & ~io.dec_extint_stall & io.dec_i0_rs2_en_d).asBool -> io.gpr_i0_rs2_d, + (i0_rs2_bypass_en_d & ~io.dec_extint_stall).asBool -> i0_rs2_bypass_data_d + )) + + val muldiv_rs1_d=Mux1H(Seq( + (~i0_rs1_bypass_en_d & io.dec_i0_rs1_en_d).asBool -> io.gpr_i0_rs1_d, + (i0_rs1_bypass_en_d).asBool -> i0_rs1_bypass_data_d + )) + + val muldiv_rs2_d=Mux1H(Seq( + (~i0_rs2_bypass_en_d & io.dec_i0_rs2_en_d).asBool -> io.gpr_i0_rs2_d, + (~i0_rs2_bypass_en_d).asBool -> io.dec_i0_immed_d, + (i0_rs2_bypass_en_d).asBool -> i0_rs2_bypass_data_d + )) + + csr_rs1_in_d := Mux( io.dec_csr_ren_d.asBool, i0_rs1_d, io.exu_csr_rs1_x) + + + val i_alu=Module(new el2_exu_alu_ctl) + i_alu.io.scan_mode :=io.scan_mode + i_alu.io.enable :=x_ctl_en + i_alu.io.pp_in :=i0_predict_newp_d + i_alu.io.valid_in :=io.dec_i0_alu_decode_d + i_alu.io.flush_upper_x :=i0_flush_upper_x + i_alu.io.flush_lower_r :=io.dec_tlu_flush_lower_r + i_alu.io.a_in :=i0_rs1_d + i_alu.io.b_in :=i0_rs2_d + i_alu.io.pc_in :=io.dec_i0_pc_d + i_alu.io.brimm_in :=io.dec_i0_br_immed_d + i_alu.io.ap :=io.i0_ap + i_alu.io.csr_ren_in :=io.dec_csr_ren_d + val alu_result_x =i_alu.io.result_ff + i0_flush_upper_d :=i_alu.io.flush_upper_out + io.exu_flush_final :=i_alu.io.flush_final_out + i0_flush_path_d :=i_alu.io.flush_path_out + i0_predict_p_d :=i_alu.io.predict_p_out + i0_pred_correct_upper_d :=i_alu.io.pred_correct_out + io.exu_i0_pc_x :=i_alu.io.pc_ff + + val i_mul=Module(new el2_exu_mul_ctl) + + i_mul.io.scan_mode :=io.scan_mode + i_mul.io.mul_p :=io.mul_p + i_mul.io.rs1_in :=muldiv_rs1_d + i_mul.io.rs2_in :=muldiv_rs2_d + val mul_result_x =i_mul.io.result_x + + val i_div=Module(new el2_exu_div_ctl) + + i_div.io.scan_mode :=io.scan_mode + i_div.io.cancel :=io.dec_div_cancel + i_div.io.dp :=io.div_p + i_div.io.dividend :=muldiv_rs1_d + i_div.io.divisor :=muldiv_rs2_d + io.exu_div_wren :=i_div.io.finish_dly + io.exu_div_result :=i_div.io.out + + io.exu_i0_result_x := Mux(mul_valid_x.asBool, mul_result_x, alu_result_x) + i0_predict_newp_d := io.dec_i0_predict_p_d + i0_predict_newp_d.boffset := io.dec_i0_pc_d(0) // from the start of inst + + io.exu_pmu_i0_br_misp := i0_pp_r.misp + io.exu_pmu_i0_br_ataken := i0_pp_r.ataken + io.exu_pmu_i0_pc4 := i0_pp_r.pc4 + + + i0_valid_d := i0_predict_p_d.valid & io.dec_i0_alu_decode_d & ~io.dec_tlu_flush_lower_r + i0_taken_d := (i0_predict_p_d.ataken & io.dec_i0_alu_decode_d) + + + + // maintain GHR at D + ghr_d_ns:=Mux1H(Seq( + (~io.dec_tlu_flush_lower_r & i0_valid_d).asBool -> Cat(ghr_d(BHT_GHR_SIZE-2,0),i0_taken_d), + (~io.dec_tlu_flush_lower_r & ~i0_valid_d).asBool -> ghr_d, + (io.dec_tlu_flush_lower_r).asBool -> ghr_x + )) + + // maintain GHR at X + ghr_x_ns:=Mux(i0_valid_x===1.U, Cat(ghr_x(BHT_GHR_SIZE-2,0),i0_taken_x), ghr_x ) + + io.exu_i0_br_valid_r := i0_pp_r.valid + io.exu_i0_br_mp_r := i0_pp_r.misp + io.exu_i0_br_way_r := i0_pp_r.way + io.exu_i0_br_hist_r := i0_pp_r.hist + io.exu_i0_br_error_r := i0_pp_r.br_error + io.exu_i0_br_middle_r := i0_pp_r.pc4 ^ i0_pp_r.boffset + io.exu_i0_br_start_error_r := i0_pp_r.br_start_error + io.exu_i0_br_fghr_r := predpipe_r(PREDPIPESIZE-1,BTB_ADDR_HI+BTB_BTAG_SIZE-BTB_ADDR_LO+1) + io.exu_i0_br_index_r := predpipe_r(BTB_ADDR_HI+BTB_BTAG_SIZE-BTB_ADDR_LO,BTB_BTAG_SIZE+1) + final_predict_mp := Mux(i0_flush_upper_x===1.U,i0_predict_p_x,0.U.asTypeOf(i0_predict_p_x)) + val final_predpipe_mp = Mux(i0_flush_upper_x===1.U,predpipe_x,0.U) + + val after_flush_eghr = Mux((i0_flush_upper_x===1.U & ~(io.dec_tlu_flush_lower_r===1.U)), ghr_d, ghr_x) + + + io.exu_mp_pkt.way := final_predict_mp.way + io.exu_mp_pkt.misp := final_predict_mp.misp + io.exu_mp_pkt.pcall := final_predict_mp.pcall + io.exu_mp_pkt.pja := final_predict_mp.pja + io.exu_mp_pkt.pret := final_predict_mp.pret + io.exu_mp_pkt.ataken := final_predict_mp.ataken + io.exu_mp_pkt.boffset := final_predict_mp.boffset + io.exu_mp_pkt.pc4 := final_predict_mp.pc4 + io.exu_mp_pkt.hist := final_predict_mp.hist(1,0) + io.exu_mp_pkt.toffset := final_predict_mp.toffset(11,0) + io.exu_mp_fghr := after_flush_eghr + io.exu_mp_index := final_predpipe_mp(PREDPIPESIZE-BHT_GHR_SIZE-1,BTB_BTAG_SIZE) + io.exu_mp_btag := final_predpipe_mp(BTB_BTAG_SIZE-1,0) + io.exu_mp_eghr := final_predpipe_mp(PREDPIPESIZE-1,BTB_ADDR_HI-BTB_ADDR_LO+BTB_BTAG_SIZE+1) // mp ghr for bht write + io.exu_flush_path_final := Mux(io.dec_tlu_flush_lower_r.asBool, io.dec_tlu_flush_path_r, i0_flush_path_d) + io.exu_npc_r := Mux(i0_pred_correct_upper_r===1.U, pred_correct_npc_r, i0_flush_path_upper_r) } +class el2_exu_IO extends Bundle with param{ + val clk =Input(Clock()) // Top level clock + val rst_l =Input(Bool()) // Reset + val scan_mode =Input(Bool()) // Scan control + + val dec_data_en =Input(UInt(2.W)) // Clock enable {x,r}, one cycle pulse + val dec_ctl_en =Input(UInt(2.W)) // Clock enable {x,r}, two cycle pulse + val dbg_cmd_wrdata =Input(UInt(32.W)) // Debug data to primary I0 RS1 + val i0_ap =Input(new el2_alu_pkt_t) // DEC alu {valid,predecodes} + + val dec_debug_wdata_rs1_d =Input(UInt(1.W)) // Debug select to primary I0 RS1 + val dec_i0_predict_p_d =Input(new el2_predict_pkt_t) // DEC branch predict packet + + val i0_predict_fghr_d =Input(UInt(BHT_GHR_SIZE.W)) // DEC predict fghr + val i0_predict_index_d =Input(UInt((BTB_ADDR_HI-BTB_ADDR_LO).W)) // DEC predict index + val i0_predict_btag_d =Input(UInt(BTB_BTAG_SIZE.W)) // DEC predict branch tag + + val dec_i0_rs1_en_d =Input(UInt(1.W)) // Qualify GPR RS1 data + val dec_i0_rs2_en_d =Input(UInt(1.W)) // Qualify GPR RS2 data + val gpr_i0_rs1_d =Input(UInt(32.W)) // DEC data gpr + val gpr_i0_rs2_d =Input(UInt(32.W)) // DEC data gpr + val dec_i0_immed_d =Input(UInt(32.W)) // DEC data immediate + val dec_i0_rs1_bypass_data_d=Input(UInt(32.W)) // DEC bypass data + val dec_i0_rs2_bypass_data_d=Input(UInt(32.W)) // DEC bypass data + val dec_i0_br_immed_d =Input(UInt(12.W)) // Branch immediate + val dec_i0_alu_decode_d =Input(UInt(1.W)) // Valid to X-stage ALU + val dec_i0_select_pc_d =Input(UInt(1.W)) // PC select to RS1 + val dec_i0_pc_d =Input(UInt(31.W)) // Instruction PC + val dec_i0_rs1_bypass_en_d =Input(UInt(2.W)) // DEC bypass select 1 - X-stage, 0 - dec bypass data + val dec_i0_rs2_bypass_en_d =Input(UInt(2.W)) // DEC bypass select 1 - X-stage, 0 - dec bypass data + val dec_csr_ren_d =Input(UInt(1.W)) // Clear I0 RS1 primary + + val mul_p =Input(new el2_mul_pkt_t) // DEC {valid, operand signs, low, operand bypass} + val div_p =Input(new el2_div_pkt_t) // DEC {valid, unsigned, rem} + val dec_div_cancel =Input(UInt(1.W)) // Cancel the divide operation + + val pred_correct_npc_x =Input(UInt(31.W)) // DEC NPC for correctly predicted branch + + val dec_tlu_flush_lower_r =Input(UInt(1.W)) // Flush divide and secondary ALUs + val dec_tlu_flush_path_r =Input(UInt(31.W)) // Redirect target + + + val dec_extint_stall =Input(UInt(1.W)) // External stall mux select + val dec_tlu_meihap =Input(UInt(30.W)) // External stall mux data + + + val exu_lsu_rs1_d =Output(UInt(32.W)) // LSU operand + val exu_lsu_rs2_d =Output(UInt(32.W)) // LSU operand + + val exu_flush_final =Output(UInt(1.W)) // Pipe is being flushed this cycle + val exu_flush_path_final =Output(UInt(31.W)) // Target for the oldest flush source + + val exu_i0_result_x =Output(UInt(32.W)) // Primary ALU result to DEC + val exu_i0_pc_x =Output(UInt(31.W)) // Primary PC result to DEC + val exu_csr_rs1_x =Output(UInt(32.W)) // RS1 source for a CSR instruction + + val exu_npc_r =Output(UInt(31.W)) // Divide NPC + val exu_i0_br_hist_r =Output(UInt(2.W)) // to DEC I0 branch history + val exu_i0_br_error_r =Output(UInt(1.W)) // to DEC I0 branch error + val exu_i0_br_start_error_r =Output(UInt(1.W)) // to DEC I0 branch start error + val exu_i0_br_index_r =Output(UInt((BTB_ADDR_HI-BTB_ADDR_LO).W)) // to DEC I0 branch index + val exu_i0_br_valid_r =Output(UInt(1.W)) // to DEC I0 branch valid + val exu_i0_br_mp_r =Output(UInt(1.W)) // to DEC I0 branch mispredict + val exu_i0_br_middle_r =Output(UInt(1.W)) // to DEC I0 branch middle + val exu_i0_br_fghr_r =Output(UInt(BHT_GHR_SIZE.W)) // to DEC I0 branch fghr + val exu_i0_br_way_r =Output(UInt(1.W)) // to DEC I0 branch way + val exu_mp_pkt =Output(new el2_predict_pkt_t) // Mispredict branch packet + val exu_mp_eghr =Output(UInt(BHT_GHR_SIZE.W)) // Mispredict global history + val exu_mp_fghr =Output(UInt(BHT_GHR_SIZE.W)) // Mispredict fghr + val exu_mp_index =Output(UInt((BTB_ADDR_HI-BTB_ADDR_LO).W)) // Mispredict index + val exu_mp_btag =Output(UInt(BTB_BTAG_SIZE.W)) // Mispredict btag + + + val exu_pmu_i0_br_misp =Output(UInt(1.W)) // to PMU - I0 E4 branch mispredict + val exu_pmu_i0_br_ataken =Output(UInt(1.W)) // to PMU - I0 E4 taken + val exu_pmu_i0_pc4 =Output(UInt(1.W)) // to PMU - I0 E4 PC + + + val exu_div_result =Output(UInt(32.W)) // Divide result + val exu_div_wren =Output(UInt(1.W)) // Divide write enable to GPR +} + +object exu_gen extends App{ + println(chisel3.Driver.emitVerilog(new el2_exu())) +} \ No newline at end of file diff --git a/src/main/scala/exu/el2_exu_alu_ctl.scala b/src/main/scala/exu/el2_exu_alu_ctl.scala new file mode 100644 index 00000000..648b149e --- /dev/null +++ b/src/main/scala/exu/el2_exu_alu_ctl.scala @@ -0,0 +1,133 @@ +package exu + +import chisel3._ +import chisel3.util._ +import include._ +import lib._ + +class el2_exu_alu_ctl extends Module with el2_lib with RequireAsyncReset{ + val io = IO(new Bundle{ + ////////// Inputs ///////// + // val clk = Input(Clock()) // Top level clock + // val rst_l = Input(UInt(1.W)) // Reset + val scan_mode = Input(UInt(1.W)) // Scan control + val flush_upper_x = Input(UInt(1.W)) // Branch flush from previous cycle + val flush_lower_r = Input(UInt(1.W)) // Master flush of entire pipeline + val enable = Input(Bool()) // Clock enable + val valid_in = Input(UInt(1.W)) // Valid + val ap = Input( new el2_alu_pkt_t ) // predecodes + val csr_ren_in = Input(UInt(1.W)) // extra decode + val a_in = Input(UInt(32.W)) // A operand + val b_in = Input(UInt(32.W)) // B operand + val pc_in = Input(UInt(31.W)) // for pc=pc+2,4 calculations + val pp_in = Input(new el2_predict_pkt_t) // Predicted branch structure + val brimm_in = Input(UInt(12.W)) // Branch offset + ////////// Outputs ///////// + val result_ff = Output(UInt(32.W)) // final result + val flush_upper_out = Output(UInt(1.W)) // Branch flush + val flush_final_out = Output(UInt(1.W)) // Branch flush or flush entire pipeline + val flush_path_out = Output(UInt(31.W)) // Branch flush PC + val pc_ff = Output(UInt(31.W)) // flopped PC + val pred_correct_out = Output(UInt(1.W)) // NPC control + val predict_p_out = Output(new el2_predict_pkt_t) // Predicted branch structure + }) + + io.pc_ff := rvdffe(io.pc_in,io.enable,clock,io.scan_mode.asBool) // any PC is run through here - doesn't have to be alu + val result = WireInit(UInt(32.W),0.U) + io.result_ff := rvdffe(result,io.enable,clock,io.scan_mode.asBool) + + val bm = Mux( io.ap.sub.asBool, ~io.b_in, io.b_in) //H:b modified + + val aout = WireInit(UInt(33.W),0.U) + aout := Mux(io.ap.sub.asBool,(Cat(0.U(1.W),io.a_in) + Cat(0.U(1.W),~io.b_in) + Cat(0.U(32.W),io.ap.sub)), (Cat(0.U(1.W),io.a_in) + Cat(0.U(1.W), io.b_in) + Cat(0.U(32.W),io.ap.sub))) + val cout = aout(32) + + val ov = (~io.a_in(31) & ~bm(31) & aout(31)) | ( io.a_in(31) & bm(31) & ~aout(31) ) //overflow check from last bits + + val eq = (io.a_in === io.b_in) + val ne = ~eq + val neg = aout(31)// check for the last signed bit (for neg) + val lt = (~io.ap.unsign & (neg ^ ov)) | ( io.ap.unsign & ~cout) //if alu packet sends unsigned and there is no cout(i.e no overflow and unsigned pkt) + val ge = ~lt // if not less then + + + val lout = Mux1H(Seq( + io.csr_ren_in.asBool -> io.b_in, //read enable read rs2 + io.ap.land.asBool -> (io.a_in & io.b_in), //and rs1 and 2 + io.ap.lor.asBool -> (io.a_in | io.b_in), + io.ap.lxor.asBool -> (io.a_in ^ io.b_in))) + + val shift_amount = Mux1H(Seq ( + io.ap.sll.asBool -> (32.U(6.W) - Cat(0.U(1.W),io.b_in(4,0))), // [5] unused + io.ap.srl.asBool -> Cat(0.U(1.W),io.b_in(4,0)) , + io.ap.sra.asBool -> Cat(0.U(1.W),io.b_in(4,0)) )) + + val shift_mask = WireInit(UInt(32.W),0.U) + shift_mask := ( "hffffffff".U(32.W) << (repl(5,io.ap.sll) & io.b_in(4,0)) ) + + val shift_extend = WireInit(UInt(63.W),0.U) + shift_extend := Cat((repl(31,io.ap.sra) & repl(31,io.a_in(31))) | (repl(31,io.ap.sll) & io.a_in(30,0)),io.a_in) + + val shift_long = WireInit(UInt(63.W),0.U) + shift_long := ( shift_extend >> shift_amount ); // 62-32 unused + + val sout = ( shift_long(31,0) & shift_mask(31,0) ); //incase of sra shift_mask is 1 + + + val sel_shift = io.ap.sll | io.ap.srl | io.ap.sra + val sel_adder = (io.ap.add | io.ap.sub) & ~io.ap.slt + val sel_pc = io.ap.jal | io.pp_in.pcall | io.pp_in.pja | io.pp_in.pret + val csr_write_data = Mux(io.ap.csr_imm.asBool, io.b_in, io.a_in) + + val slt_one = io.ap.slt & lt + + // for a conditional br pcout[] will be the opposite of the branch prediction + // for jal or pcall, it will be the link address pc+2 or pc+4 + val pcout = rvbradder(Cat(io.pc_in,0.U),Cat(io.brimm_in,0.U)) + + result := lout(31,0) | Cat(0.U(31.W),slt_one) | (Mux1H(Seq( + sel_shift.asBool -> sout(31,0), + sel_adder.asBool -> aout(31,0), + sel_pc.asBool -> pcout, + io.ap.csr_write.asBool -> csr_write_data(31,0)))) + + // *** branch handling *** + + val any_jal = io.ap.jal | //jal + io.pp_in.pcall | //branch is a call inst + io.pp_in.pja | //branch is a jump always + io.pp_in.pret //return inst + + val actual_taken = (io.ap.beq & eq) | (io.ap.bne & ne.asUInt) | (io.ap.blt & lt) | (io.ap.bge & ge) | any_jal + + // pred_correct is for the npc logic + // pred_correct indicates not to use the flush_path + // for any_jal pred_correct==0 + io.pred_correct_out := (io.valid_in & io.ap.predict_nt & !actual_taken & !any_jal) | (io.valid_in & io.ap.predict_t & actual_taken & !any_jal) + // for any_jal adder output is the flush path + io.flush_path_out := Mux(any_jal.asBool, aout(31,1), pcout(31,1)) + + // pcall and pret are included here + val cond_mispredict = (io.ap.predict_t & !actual_taken) | (io.ap.predict_nt & actual_taken.asUInt) + + // target mispredicts on ret's + val target_mispredict = io.pp_in.pret & (io.pp_in.prett =/= aout(31,1)) //predicted return target != aout + + io.flush_upper_out := (io.ap.jal | cond_mispredict | target_mispredict) & io.valid_in & !io.flush_upper_x & !io.flush_lower_r + //there was no entire pipe flush (& previous cycle flush ofc(why check?)) therfore signAL 1 to flush instruction before X stage + io.flush_final_out := ( (io.ap.jal | cond_mispredict | target_mispredict) & io.valid_in & !io.flush_upper_x ) | io.flush_lower_r + //there was entire pipe flush or (there is mispred or a jal) therfore signAL 1 to flush entire pipe + + val newhist = WireInit(UInt(2.W),0.U) + newhist := Cat((io.pp_in.hist(1) & io.pp_in.hist(0)) | (~io.pp_in.hist(0) & actual_taken),//newhist[1] + (~io.pp_in.hist(1) & ~actual_taken) | (io.pp_in.hist(1) & actual_taken)) //newhist[0] + + io.predict_p_out := io.pp_in + io.predict_p_out.misp := ~io.flush_upper_x & ~io.flush_lower_r & (cond_mispredict | target_mispredict);// if 1 tells that it was a misprediction becauseprevious cycle was not a flush and these was no master flush(lower pipe flush) and ifu predicted taken but actually its nt + io.predict_p_out.ataken := actual_taken; // send a control signal telling it branch taken or not + io.predict_p_out.hist := newhist +} + +object alu extends App{ + chisel3.Driver execute(args, () =>new el2_exu_alu_ctl()) +} \ No newline at end of file diff --git a/src/main/scala/exu/el2_exu_div_ctl.scala b/src/main/scala/exu/el2_exu_div_ctl.scala new file mode 100644 index 00000000..57df49cb --- /dev/null +++ b/src/main/scala/exu/el2_exu_div_ctl.scala @@ -0,0 +1,226 @@ +package exu + +import chisel3._ +import chisel3.experimental.chiselName +import chisel3.util._ +import include._ +import lib._ + +@chiselName +class el2_exu_div_ctl extends Module with RequireAsyncReset with el2_lib { + val io = IO(new Bundle{ + val scan_mode = Input(Bool()) + val dp = Input(new el2_div_pkt_t ) + val dividend = Input(UInt(32.W)) + val divisor = Input(UInt(32.W)) + val cancel = Input(UInt(1.W)) + + val out = Output(UInt(32.W)) + val finish_dly = Output(UInt(1.W)) + // val out_s = Output(UInt(33.W)) + // val test = Output(UInt(6.W)) + }) + val exu_div_clk = Wire(Clock()) + val run_state = WireInit(0.U(1.W)) + val count = WireInit(0.U(6.W)) + val m_ff = WireInit(0.U(33.W)) + val q_in = WireInit(0.U(33.W)) + val q_ff = WireInit(0.U(33.W)) + val a_in = WireInit(0.U(33.W)) + val a_ff = WireInit(0.U(33.W)) + val m_eff = WireInit(0.U(33.W)) + val dividend_neg_ff = WireInit(0.U(1.W)) + val divisor_neg_ff = WireInit(0.U(1.W)) + val dividend_comp = WireInit(0.U(32.W)) + val q_ff_comp = WireInit(0.U(32.W)) + val a_ff_comp = WireInit(0.U(32.W)) + val sign_ff = WireInit(0.U(1.W)) + val rem_ff = WireInit(0.U(1.W)) + val add = WireInit(0.U(1.W)) + val a_eff = WireInit(0.U(33.W)) + val a_eff_shift = WireInit(0.U(56.W)) + val rem_correct = WireInit(0.U(1.W)) + val valid_ff_x = WireInit(0.U(1.W)) + val finish_ff = WireInit(0.U(1.W)) + val smallnum_case_ff = WireInit(0.U(1.W)) + val smallnum_ff = WireInit(0.U(4.W)) + val count_in = WireInit(0.U(6.W)) + val dividend_eff = WireInit(0.U(32.W)) + val a_shift = WireInit(0.U(33.W)) + + io.out := 0.U + io.finish_dly := 0.U + + + val valid_x = valid_ff_x & !io.cancel + + // START - short circuit logic for small numbers {{ + // small number divides - any 4b / 4b is done in 1 cycle (divisor != 0) + // smallnum case does not cover divide by 0 + val smallnum_case = ((q_ff(31,4) === 0.U(28.W)) & (m_ff(31,4) === 0.U(28.W)) & (m_ff =/= 0.U(32.W)) & !rem_ff & valid_x) | + ((q_ff === 0.U(32.W)) & (m_ff =/= 0.U(32.W)) & !rem_ff & valid_x) + + def pat(x : List[Int], y : List[Int]) = { + val pat1 = (0 until x.size).map(i=> if(x(i)>=0) q_ff(x(i)) else !q_ff(x(i).abs)).reduce(_&_) + val pat2 = (0 until y.size).map(i=> if(y(i)>=0) m_ff(y(i)) else !m_ff(y(i).abs)).reduce(_&_) + pat1 & pat2 + } + + val smallnum = Cat( + pat(List(3),List(-3, -2, -1)), + + pat(List(3),List(-3, -2))& !m_ff(0) | pat(List(2),List(-3, -2, -1)) | pat(List(3, 2),List(-3, -2)), + + pat(List(2),List(-3, -2))& !m_ff(0) | pat(List(1),List(-3, -2, -1)) | pat(List(3),List(-3, -1))& !m_ff(0) | + pat(List(3, -2),List(-3, -2, 1, 0)) | pat(List(-3, 2, 1),List(-3, -2)) | pat(List(3, 2),List(-3))& !m_ff(0) | + pat(List(3, 2),List(-3, 2, -1)) | pat(List(3, 1),List(-3,-1)) | pat(List(3, 2, 1),List(-3, 2)), + + pat(List(2, 1, 0),List(-3, -1)) | pat(List(3, -2, 0),List(-3, 1, 0)) | pat(List(2),List(-3, -1))& !m_ff(0) | + pat(List(1),List(-3, -2))& !m_ff(0) | pat(List(0),List(-3, -2, -1)) | pat(List(-3, 2, -1),List(-3, -2, 1, 0)) | + pat(List(-3, 2, 1),List(-3))& !m_ff(0) | pat(List(3),List(-2, -1)) & !m_ff(0) | pat(List(3, -2),List(-3, 2, 1)) | + pat(List(-3, 2, 1),List(-3, 2, -1)) | pat(List(-3, 2, 0),List(-3, -1)) | pat(List(3, -2, -1),List(-3, 2, 0)) | + pat(List(-2, 1, 0),List(-3, -2)) | pat(List(3, 2),List(-1)) & !m_ff(0) | pat(List(-3, 2, 1, 0),List(-3, 2)) | + pat(List(3, 2),List(3, -2)) | pat(List(3, 1),List(3,-2,-1)) | pat(List(3, 0),List(-2, -1)) | + pat(List(3, -1),List(-3, 2, 1, 0)) | pat(List(3, 2, 1),List(3)) & !m_ff(0) | pat(List(3, 2, 1),List(3, -1)) | + pat(List(3, 2, 0),List(3, -1)) | pat(List(3, -2, 1),List(-3, 1)) | pat(List(3, 1, 0),List(-2)) | + pat(List(3, 2, 1, 0),List(3)) |pat(List(3, 1),List(-2)) & !m_ff(0) + ) + //io.test := smallnum + // END - short circuit logic for small numbers }} + + // *** Start Short Q *** {{ + val shortq_enable_ff = WireInit(0.U(1.W)) + val short_dividend = WireInit(0.U(33.W)) + val shortq_shift_xx = WireInit(0.U(4.W)) + + short_dividend := Cat (sign_ff & q_ff(31),q_ff(31,0)) + + + val a_cls = Cat( + Mux1H(Seq ( + !short_dividend(32).asBool -> (short_dividend(31,24) =/= Fill(8,0.U)), + short_dividend(32).asBool -> (short_dividend(31,23) =/= Fill(9,1.U)) + )), + Mux1H(Seq ( + !short_dividend(32).asBool -> (short_dividend(23,16) =/= Fill(8,0.U)), + short_dividend(32).asBool -> (short_dividend(22,15) =/= Fill(8,1.U)) + )), + Mux1H(Seq ( + !short_dividend(32).asBool -> (short_dividend(15,8) =/= Fill(8,0.U)), + short_dividend(32).asBool -> (short_dividend(14,7) =/= Fill(8,1.U)) + )) + ) + val b_cls = Cat( + Mux1H(Seq ( + !m_ff(32).asBool -> (m_ff(31,24) =/= Fill(8,0.U)), + m_ff(32).asBool -> (m_ff(31,24) =/= Fill(8,1.U)) + )), + Mux1H(Seq ( + !m_ff(32).asBool -> (m_ff(23,16) =/= Fill(8,0.U)), + m_ff(32).asBool -> (m_ff(23,16) =/= Fill(8,1.U)) + )), + Mux1H(Seq ( + !m_ff(32).asBool -> (m_ff(15,8) =/= Fill(8,0.U)), + m_ff(32).asBool -> (m_ff(15,8) =/= Fill(8,1.U)) + )) + ) + val shortq_raw = Cat( + ( (a_cls(2,1) === "b01".U ) & (b_cls(2) === "b1".U ) ) | // Shift by 32 + ( (a_cls(2,0) === "b001".U ) & (b_cls(2) === "b1".U ) ) | + ( (a_cls(2,0) === "b000".U ) & (b_cls(2) === "b1".U ) ) | + ( (a_cls(2,0) === "b001".U ) & (b_cls(2,1) === "b01".U ) ) | + ( (a_cls(2,0) === "b000".U ) & (b_cls(2,1) === "b01".U ) ) | + ( (a_cls(2,0) === "b000".U ) & (b_cls(2,0) === "b001".U ) ) , + + ( (a_cls(2) === "b1".U ) & (b_cls(2) === "b1".U ) ) | // Shift by 24 + ( (a_cls(2,1) === "b01".U ) & (b_cls(2,1) === "b01".U ) ) | + ( (a_cls(2,0) === "b001".U ) & (b_cls(2,0) === "b001".U ) ) | + ( (a_cls(2,0) === "b000".U ) & (b_cls(2,0) === "b000".U ) ) , + + ( (a_cls(2) === "b1".U ) & (b_cls(2,1) === "b01".U ) ) | // Shift by 16 + ( (a_cls(2,1) === "b01".U ) & (b_cls(2,0) === "b001".U ) ) | + ( (a_cls(2,0) === "b001".U ) & (b_cls(2,0) === "b000".U ) ) , + + ( (a_cls(2) === "b1".U ) & (b_cls(2,0) === "b001".U ) ) | // Shift by 8 + ( (a_cls(2,1) === "b01".U ) & (b_cls(2,0) === "b000".U ) ) + + ) + val shortq_enable = valid_ff_x & (m_ff(31,0) =/= 0.U(32.W)) & (shortq_raw =/= 0.U(4.W)) + val shortq_shift = Fill(4,shortq_enable) & shortq_raw + + withClock(exu_div_clk) {shortq_enable_ff := RegNext(shortq_enable,0.U)} + withClock(exu_div_clk) {shortq_shift_xx := RegNext(shortq_shift,0.U)} + + val shortq_shift_ff = Mux1H(Seq ( + shortq_shift_xx(3).asBool -> "b11111".U, + shortq_shift_xx(2).asBool -> "b11000".U, + shortq_shift_xx(1).asBool -> "b10000".U, + shortq_shift_xx(0).asBool -> "b01000".U + )) + // *** End Short *** }} + + val finish = smallnum_case | Mux(!rem_ff ,count === 32.U(6.W) ,count === 33.U(6.W)) + val div_clken = io.dp.valid | run_state | finish | finish_ff + val run_in = (io.dp.valid | run_state) & !finish & !io.cancel + count_in := Fill(6,(run_state & !finish & !io.cancel & !shortq_enable)) & (count + Cat(0.U,shortq_shift_ff) + (1.U)(6.W)) + //io.test := count_in + + io.finish_dly := finish_ff & !io.cancel + val sign_eff = !io.dp.unsign & (io.divisor =/= 0.U(32.W)) + + q_in := Mux1H(Seq( + (!run_state).asBool -> Cat(0.U(1.W),io.dividend) , + (run_state & valid_ff_x | shortq_enable_ff).asBool -> (Cat(dividend_eff(31,0),!a_in(32)) << shortq_shift_ff) , + (run_state & !(valid_ff_x | shortq_enable_ff)).asBool -> Cat(q_ff(31,0),!a_in(32)) + )) + val qff_enable = io.dp.valid | (run_state & !shortq_enable) + dividend_eff := Mux((sign_ff & dividend_neg_ff).asBool,rvtwoscomp(q_ff(31,0)),q_ff(31,0)) + + + m_eff := Mux(add.asBool , m_ff, ~m_ff ) + a_eff_shift := Cat(0.U(24.W), dividend_eff) << shortq_shift_ff + a_eff := Mux1H(Seq( + rem_correct.asBool -> a_ff , + (!rem_correct & !shortq_enable_ff).asBool -> Cat(a_ff(31,0), q_ff(32)) , + (!rem_correct & shortq_enable_ff).asBool -> Cat(0.U(9.W),a_eff_shift(55,32)) + )) + val aff_enable = io.dp.valid | (run_state & !shortq_enable & (count =/= 33.U(6.W))) | rem_correct + a_shift := Fill(33,run_state) & a_eff + a_in := Fill(33,run_state) & (a_shift + m_eff + Cat(0.U(32.W),!add)) + val m_already_comp = divisor_neg_ff & sign_ff + // if m already complemented, then invert operation add->sub, sub->add + add := (a_ff(32) | rem_correct) ^ m_already_comp + rem_correct := (count === 33.U(6.W)) & rem_ff & a_ff(32) + val q_ff_eff = Mux((sign_ff & (dividend_neg_ff ^ divisor_neg_ff)).asBool,rvtwoscomp(q_ff(31,0)), q_ff(31,0)) + val a_ff_eff = Mux((sign_ff & dividend_neg_ff ).asBool, rvtwoscomp(a_ff(31,0)), a_ff(31,0)) + + io.out := Mux1H(Seq( + smallnum_case_ff.asBool -> Cat(0.U(28.W), smallnum_ff), + rem_ff.asBool -> a_ff_eff , + (!smallnum_case_ff & !rem_ff).asBool -> q_ff_eff + )) + val exu_div_cgc = Module(new rvclkhdr) + exu_div_cgc.io.en := div_clken + exu_div_clk := exu_div_cgc.io.l1clk + exu_div_cgc.io.clk := clock + exu_div_cgc.io.scan_mode := io.scan_mode + + withClock(exu_div_clk){valid_ff_x := RegNext(io.dp.valid & !io.cancel,0.U)} + withClock(exu_div_clk){finish_ff := RegNext(finish & !io.cancel,0.U)} + withClock(exu_div_clk){run_state := RegNext(run_in,0.U)} + withClock(exu_div_clk){count := RegNext(count_in,0.U)} + withClock(exu_div_clk){dividend_neg_ff := RegEnable (io.dividend(31), 0.U, io.dp.valid.asBool)} + withClock(exu_div_clk){divisor_neg_ff := RegEnable (io.divisor(31), 0.U, io.dp.valid.asBool)} + withClock(exu_div_clk){sign_ff := RegEnable (sign_eff, 0.U, io.dp.valid.asBool)} + withClock(exu_div_clk){rem_ff := RegEnable (io.dp.rem, 0.U, io.dp.valid.asBool)} + withClock(exu_div_clk){smallnum_case_ff := RegNext(smallnum_case,0.U)} + withClock(exu_div_clk){smallnum_ff := RegNext(smallnum,0.U)} + q_ff := RegEnable (q_in, 0.U, qff_enable.asBool) + a_ff := RegEnable (a_in, 0.U, aff_enable.asBool) + m_ff := RegEnable (Cat(!io.dp.unsign & io.divisor(31), io.divisor), 0.U, io.dp.valid.asBool) + +} +object div_main extends App{ + println("Generate Verilog") + println((new chisel3.stage.ChiselStage).emitVerilog(new el2_exu_div_ctl())) +} diff --git a/src/main/scala/exu/el2_exu_mul_ctl.scala b/src/main/scala/exu/el2_exu_mul_ctl.scala new file mode 100644 index 00000000..26a2743e --- /dev/null +++ b/src/main/scala/exu/el2_exu_mul_ctl.scala @@ -0,0 +1,37 @@ +package exu + +import chisel3._ +import chisel3.util._ +import include._ +import lib._ + +class el2_exu_mul_ctl extends Module with RequireAsyncReset with el2_lib { + val io = IO(new Bundle{ + val scan_mode = Input(Bool()) + val mul_p = Input(new el2_mul_pkt_t ) + val rs1_in = Input(UInt(32.W)) + val rs2_in = Input(UInt(32.W)) + val result_x = Output(UInt(32.W)) + }) + + val rs1_ext_in = WireInit(SInt(33.W), 0.S) + val rs2_ext_in = WireInit(SInt(33.W), 0.S) + val prod_x = WireInit(SInt(66.W), 0.S) + val low_x = WireInit(0.U(1.W)) + + val mul_x_enable = io.mul_p.valid + rs1_ext_in := Cat(io.mul_p.rs1_sign & io.rs1_in(31),io.rs1_in).asSInt + rs2_ext_in := Cat(io.mul_p.rs2_sign & io.rs2_in(31),io.rs2_in).asSInt + + // --------------------------- Multiply ---------------------------------- + low_x := RegEnable (io.mul_p.low, 0.U, mul_x_enable.asBool) + val rs1_x = RegEnable (rs1_ext_in, 0.S, mul_x_enable.asBool) + val rs2_x = RegEnable (rs2_ext_in, 0.S, mul_x_enable.asBool) + + prod_x := rs1_x * rs2_x + io.result_x := Mux1H (Seq(!low_x.asBool -> prod_x(63,32), low_x.asBool -> prod_x(31,0))) +} +object mul_main extends App{ + println("Generate Verilog") + println((new chisel3.stage.ChiselStage).emitVerilog(new el2_exu_mul_ctl())) +} \ No newline at end of file diff --git a/src/main/scala/include/el2_bundle.scala b/src/main/scala/include/el2_bundle.scala index e453abd1..c18df382 100644 --- a/src/main/scala/include/el2_bundle.scala +++ b/src/main/scala/include/el2_bundle.scala @@ -14,7 +14,6 @@ class el2_trace_pkt_t extends Bundle{ - object el2_inst_pkt_t extends Enumeration{ val NULL = "b0000".U(4.W) val MUL = "b0001".U(4.W) @@ -174,56 +173,56 @@ class el2_lsu_error_pkt_t extends Bundle { } class el2_dec_pkt_t extends Bundle { - val alu = UInt(1.W) - val rs1 = UInt(1.W) - val rs2 = UInt(1.W) - val imm12 = UInt(1.W) - val rd = UInt(1.W) - val shimm5 = UInt(1.W) - val imm20 = UInt(1.W) - val pc = UInt(1.W) - val load = UInt(1.W) - val store = UInt(1.W) - val lsu = UInt(1.W) - val add = UInt(1.W) - val sub = UInt(1.W) - val land = UInt(1.W) - val lor = UInt(1.W) - val lxor = UInt(1.W) - val sll = UInt(1.W) - val sra = UInt(1.W) - val srl = UInt(1.W) - val slt = UInt(1.W) - val unsign = UInt(1.W) - val condbr = UInt(1.W) - val beq = UInt(1.W) - val bne = UInt(1.W) - val bge = UInt(1.W) - val blt = UInt(1.W) - val jal = UInt(1.W) - val by = UInt(1.W) - val half = UInt(1.W) - val word = UInt(1.W) - val csr_read = UInt(1.W) - val csr_clr = UInt(1.W) - val csr_set = UInt(1.W) - val csr_write = UInt(1.W) - val csr_imm = UInt(1.W) - val presync = UInt(1.W) - val postsync = UInt(1.W) - val ebreak = UInt(1.W) - val ecall = UInt(1.W) - val mret = UInt(1.W) - val mul = UInt(1.W) - val rs1_sign = UInt(1.W) - val rs2_sign = UInt(1.W) - val low = UInt(1.W) - val div = UInt(1.W) - val rem = UInt(1.W) - val fence = UInt(1.W) - val fence_i = UInt(1.W) - val pm_alu = UInt(1.W) - val legal = UInt(1.W) + val alu = Bool() + val rs1 = Bool() + val rs2 = Bool() + val imm12 = Bool() + val rd = Bool() + val shimm5 = Bool() + val imm20 = Bool() + val pc = Bool() + val load = Bool() + val store = Bool() + val lsu = Bool() + val add = Bool() + val sub = Bool() + val land = Bool() + val lor = Bool() + val lxor = Bool() + val sll = Bool() + val sra = Bool() + val srl = Bool() + val slt = Bool() + val unsign = Bool() + val condbr = Bool() + val beq = Bool() + val bne = Bool() + val bge = Bool() + val blt = Bool() + val jal = Bool() + val by = Bool() + val half = Bool() + val word = Bool() + val csr_read = Bool() + val csr_clr = Bool() + val csr_set = Bool() + val csr_write = Bool() + val csr_imm = Bool() + val presync = Bool() + val postsync = Bool() + val ebreak = Bool() + val ecall = Bool() + val mret = Bool() + val mul = Bool() + val rs1_sign = Bool() + val rs2_sign = Bool() + val low = Bool() + val div = Bool() + val rem = Bool() + val fence = Bool() + val fence_i = Bool() + val pm_alu = Bool() + val legal = Bool() } diff --git a/src/main/scala/lib/GCD.scala b/src/main/scala/lib/GCD.scala deleted file mode 100644 index 7cb03f12..00000000 --- a/src/main/scala/lib/GCD.scala +++ /dev/null @@ -1,123 +0,0 @@ -package lib - -import chisel3._ -import chisel3.util._ -/* -/////////////////////////////////////////////////////////////// -class rvdff(val Width:Int = 1, val short:Int = 0) extends Module with RequireAsyncReset { - val io = IO(new Bundle { - val in = Input(UInt(Width.W)) - val out = Output(UInt()) - }) - val inter = if(short==0) RegNext(io.in, init =0.U) else io.in - io.out := inter -} - -///////////////////////////////////////////////////////////// -class caller extends Module { - val io = IO(new Bundle { - val in = Input(UInt(32.W)) - val out = Output(UInt()) - }) - val u0 = Module(new rvdff(32)) - io <> u0.io -} - -/////////////////////////////////////////////////////////////// -class reg1 extends Module with RequireAsyncReset{ - val io = IO(new Bundle{ - val in = Input(Bool()) - val out = Output(Bool()) - }) - - io.out := RegNext(io.in, init = 0.U) -} - -class top extends Module with RequireAsyncReset{ - val io = IO(new Bundle{ - val in = Input(Bool()) - val out = Output(Bool()) - }) - val negReset = (~reset.asBool).asAsyncReset - val r0 = Module(new reg1) - r0.io<>io - r0.reset := negReset -} -/////////////////////////////////////////////////////////////// -class rvbradder() extends Module { - val io = IO(new Bundle { - val pc = Input(UInt(31.W)) - val offset = Input(UInt(12.W)) - val dout = Output(UInt()) - }) - val inter = io.pc(11,0) +& io.offset - val cout = inter(inter.getWidth-1) - val pc_inc = io.pc(io.pc.getWidth-1, 12) + 1.U - val pc_dec = io.pc(io.pc.getWidth-1, 12) - 1.U - val sign = io.offset(io.offset.getWidth -1) - - io.dout:= Cat(Fill(19,(sign ^(~cout))) & io.pc(io.pc.getWidth-1,12) | - (Fill(19,(~sign & cout)) & pc_inc) | - (Fill(19,(sign & ~cout)) & pc_dec) , inter(inter.getWidth-2,0)) -} - -/////////////////////////////////////////////////////////////// -class encoder_generator(val width:Int=4) extends Module { - val io = IO (new Bundle { - val in = Input (UInt(width.W)) - val out = Output (UInt(log2Ceil(width).W)) - }) - var z:Array[UInt] = new Array[UInt](width) - for(i<- 0 until width){ - z(i) = i.U - } - io.out := Mux1H(io.in , z) -} - -/////////////////////////////////////////////////////////////// -class rvrangecheck(val CCM_SADR:Int = 0, val CCM_SIZE:Int = 128) extends Module { - val io = IO(new Bundle { - val addr = Input(UInt(32.W)) - val in_range = Output(Bool()) - val in_region = Output(Bool()) - //val test = Output(UInt()) - }) - val start_addr = (CCM_SADR.U)(32.W) - val region = start_addr(31,28) - val MASK_BITS = 10+log2Ceil(CCM_SIZE) - io.in_region := io.addr(31,28) === region - val inter = if(CCM_SIZE == 48) io.addr(31, MASK_BITS) === start_addr(31, MASK_BITS) & ~(io.addr(MASK_BITS-1,MASK_BITS-2).andR) - else (io.addr(31,MASK_BITS)===start_addr(31,MASK_BITS)) - io.in_range := inter -} - - - -//////////////////////////////////////////////////////////////// -class tocopy extends Module{ - val io = IO(new Bundle { - val in1 = Input(UInt(1.W)) - val in2 = Input(UInt(1.W)) - val out = Output(UInt()) - }) - io.out := io.in1 +& io.in2 -} -class exp extends Module{ - val io = IO(new Bundle{ - val in1 = Input(UInt(1.W)) - val in2 = Input(UInt(1.W)) - val out = Output(UInt()) - }) - - val mod_array= new Array[tocopy](2) - mod_array(0) = Module(new tocopy) - mod_array(0).io.in1:=io.in1 - mod_array(0).io.in2:=io.in2 - mod_array(1) = Module(new tocopy) - mod_array(1).io.in1:=io.in1 - mod_array(1).io.in2:=io.in2 - io.out:= mod_array(0).io.out +& mod_array(1).io.out -} -//////////////////////////////////////////////////////////////// - -//println((new chisel3.stage.ChiselStage).emitVerilog(new exp))*/ \ No newline at end of file diff --git a/src/main/scala/lib/beh_ib_func.scala b/src/main/scala/lib/beh_ib_func.scala index 34c53665..f4679842 100644 --- a/src/main/scala/lib/beh_ib_func.scala +++ b/src/main/scala/lib/beh_ib_func.scala @@ -5,32 +5,35 @@ import chisel3.iotesters.{ChiselFlatSpec, Driver, PeekPokeTester} import chisel3.experimental._ import chisel3.util.HasBlackBoxResource import chisel3.withClock - +/* object beh_ib_func extends RequireAsyncReset { - def repl(b:Int, a:UInt) = VecInit.tabulate(b)(i => a).reduce(Cat(_,_)) - def rvsyncss(din:UInt) = RegNext(RegNext(din,0.U),0.U) - def rvlsadder(rs1:UInt,offset:UInt) = { - val w1 = Cat("b0".U,rs1(11,0)) + Cat("b0".U,offset(11,0)) //w1[12] =cout offset[11]=sign - val dout_upper = ((repl(20, ~(offset(11) ^ w1(12)))) & rs1(31,12)) | - ((repl(20, ~offset(11) ^ w1(12))) & (rs1(31,12)+1.U)) | ((repl(20, offset(11) ^ ~w1(12))) & (rs1(31,12)-1.U)) - Cat(dout_upper,w1(11,0))} - def rvbsadder(pc:UInt,offset:UInt) = { // lsb is not using in code - val w1 = Cat("b0".U,pc(12,1)) + Cat("b0".U,offset(12,1)) //w1[12] =cout offset[12]=sign - val dout_upper = ((repl(19, ~(offset(12) ^ w1(12))))& pc(31,13)) | - ((repl(19, ~offset(12) ^ w1(12))) & (pc(31,13)+1.U)) | - ((repl(19, offset(12) ^ ~w1(12))) & (pc(31,13)-1.U)) - Cat(dout_upper,w1(11,0))} + def rvsyncss(din:UInt,clk:Clock) = withClock(clk){RegNext(RegNext(din,0.U),0.U)} + + def rvlsadder(rs1:UInt,offset:UInt) = { + val w1 = Cat(0.U(1.W),rs1(11,0)) + Cat(0.U(1.W),offset(11,0)) //w1[12] =cout offset[11]=sign + val dout_upper = ((Fill(20, ~(offset(11) ^ w1(12)))) & rs1(31,12)) | + ((Fill(20, ~offset(11) & w1(12))) & (rs1(31,12)+1.U)) | + ((Fill(20, offset(11) & ~w1(12))) & (rs1(31,12)-1.U)) + Cat(dout_upper,w1(11,0)) + } + + def rvbradder(pc:UInt,offset:UInt) = { // lsb is not using in code + val w1 = Cat(0.U(1.W),pc(11,0)) + Cat(0.U(1.W),offset(11,0)) //w1[12] =cout offset[12]=sign + val dout_upper = ((Fill(19, ~(offset(11) ^ w1(12))))& pc(30,12)) | + ((Fill(19, ~offset(11) & w1(12))) & (pc(30,12)+1.U)) | + ((Fill(19, offset(11) & ~w1(12))) & (pc(30,12)-1.U)) + Cat(dout_upper,w1(11,0))} def rvtwoscomp(din:UInt) = { //Done for verification and testing val temp = Wire(Vec(din.getWidth-1,UInt(1.W))) for(i <- 1 to din.getWidth-1){ - val done = din(i-1,0).orR - temp(i-1) := Mux(done ,~din(i),din(i)) + temp(i-1) := Mux(din(i-1,0).orR ,~din(i),din(i)) } - Cat(temp.asUInt,din(0))} + Cat(temp.asUInt,din(0)) + } //WIDTH will be inferred @@ -44,15 +47,15 @@ object beh_ib_func extends RequireAsyncReset { } - def rvrangecheck(addr:UInt,CCM_SADR:Int=0, CCM_SIZE:Int=128) = { + def rvrangecheck(addr:UInt,CCM_SADR:UInt, CCM_SIZE:Int=128) = { val REGION_BITS = 4 val MASK_BITS = 10 + log2Ceil(CCM_SIZE) - val start_addr = Wire(CCM_SADR.U(32.W)) + val start_addr = CCM_SADR val region = start_addr(31,(32-REGION_BITS)) val in_region = (addr(31,(32-REGION_BITS)) === region(REGION_BITS-1,0)).asUInt val in_range = Wire(UInt(1.W)) if(CCM_SIZE == 48) - in_range := (addr(31,MASK_BITS) === start_addr(31,MASK_BITS)).asUInt //& ~(addr(MASK_BITS-1,MASK_BITS-2).andR.asUInt) + in_range := (addr(31,MASK_BITS) === start_addr(31,MASK_BITS)).asUInt & ~(addr(MASK_BITS-1,MASK_BITS-2).andR.asUInt) else in_range := (addr(31,MASK_BITS) === start_addr(31,MASK_BITS)).asUInt (in_range,in_region) @@ -93,12 +96,12 @@ object beh_ib_func extends RequireAsyncReset { def rveven_paritycheck(data_in:UInt,parity_in:UInt) = (data_in.xorR.asUInt) ^ parity_in def rvecc_decode(en:UInt,din:UInt,ecc_in:UInt,sed_ded:UInt)= { - val mask0 = Array(1,1,0,1,1,0,1,0,1,0,1,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,1,0,1,0,1,0).reverse - val mask1 = Array(1,0,1,1,0,1,1,0,0,1,1,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,1,1,0,0,1).reverse - val mask2 = Array(0,1,1,1,0,0,0,1,1,1,1,0,0,0,1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,1,1,1).reverse - val mask3 = Array(0,0,0,0,1,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0).reverse - val mask4 = Array(0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0).reverse - val mask5 = Array(0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1).reverse + val mask0 = Array(1,1,0,1,1,0,1,0,1,0,1,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,1,0,1,0,1,0) + val mask1 = Array(1,0,1,1,0,1,1,0,0,1,1,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,1,1,0,0,1) + val mask2 = Array(0,1,1,1,0,0,0,1,1,1,1,0,0,0,1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,1,1,1) + val mask3 = Array(0,0,0,0,1,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0) + val mask4 = Array(0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0) + val mask5 = Array(0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1) val w0 = Wire(Vec(18,UInt(1.W))) val w1 = Wire(Vec(18,UInt(1.W))) @@ -121,8 +124,8 @@ object beh_ib_func extends RequireAsyncReset { } val ecc_check = Cat((din.xorR ^ ecc_in.xorR) & ~sed_ded ,ecc_in(5)^(w5.asUInt.xorR),ecc_in(4)^(w4.asUInt.xorR),ecc_in(3)^(w3.asUInt.xorR),ecc_in(2)^(w2.asUInt.xorR),ecc_in(1)^(w1.asUInt.xorR),ecc_in(0)^(w0.asUInt.xorR)) - val single_ecc_error = en & (ecc_check=/= 0.U) & ((din.xorR ^ ecc_in.xorR) & ~sed_ded) - val double_ecc_error = en & (ecc_check=/= 0.U) & ~((din.xorR ^ ecc_in.xorR) & ~sed_ded) + val single_ecc_error = en & (ecc_check=/= 0.U) & ecc_check(6) + val double_ecc_error = en & (ecc_check=/= 0.U) & ~ecc_check(6) val error_mask = Wire(Vec(39,UInt(1.W))) for(i <- 1 until 40){ @@ -132,8 +135,8 @@ object beh_ib_func extends RequireAsyncReset { val dout_plus_parity = Mux(single_ecc_error.asBool, (error_mask.asUInt ^ din_plus_parity), din_plus_parity) val dout = Cat(dout_plus_parity(37,32),dout_plus_parity(30,16), dout_plus_parity(14,8), dout_plus_parity(6,4), dout_plus_parity(2)) - val ecc_out = Cat(dout_plus_parity(38) ^ (ecc_check(6,0) === 1.U(7.W)), dout_plus_parity(31), dout_plus_parity(15), dout_plus_parity(7), dout_plus_parity(3), dout_plus_parity(1,0)) - (ecc_out,dout,dout,single_ecc_error,double_ecc_error) + val ecc_out = Cat(dout_plus_parity(38) ^ (ecc_check(6,0) === "b1000000".U(7.W)), dout_plus_parity(31), dout_plus_parity(15), dout_plus_parity(7), dout_plus_parity(3), dout_plus_parity(1,0)) + (ecc_out,dout,single_ecc_error,double_ecc_error) } @@ -158,7 +161,7 @@ object beh_ib_func extends RequireAsyncReset { var j = 0;var k = 0;var m = 0; var n =0; var x = 0;var y = 0;var z = 0 - for(i <- 63 to 0) + for(i <- 0 to 63) { if(mask0(i)==1) {w0(j) := din(i); j = j +1 } if(mask1(i)==1) {w1(k) := din(i); k = k +1 } @@ -210,5 +213,5 @@ object beh_ib_func extends RequireAsyncReset { } } - +*/ diff --git a/src/main/scala/lib/beh_lib.scala b/src/main/scala/lib/beh_lib.scala index 083dae9c..e4a33064 100644 --- a/src/main/scala/lib/beh_lib.scala +++ b/src/main/scala/lib/beh_lib.scala @@ -1,6 +1,9 @@ package lib import chisel3._ import chisel3.util._ + +import include._ + //import lib.beh_ib_func._ class rvdff(WIDTH:Int=1,SHORT:Int=0) extends Module{ @@ -24,9 +27,10 @@ class rvsyncss(WIDTH:Int = 251,SHORT:Int = 0) extends Module{ //Done for verifi val io = IO(new Bundle{ val din = Input(UInt(WIDTH.W)) val dout = Output(UInt(WIDTH.W)) + val clk = Input(Clock()) }) - val sync_ff1 = RegNext(io.din,0.U) //RegNext(io.in,init) - val sync_ff2 = RegNext(sync_ff1,0.U) + val sync_ff1 = withClock(io.clk){RegNext(io.din,0.U)} //RegNext(io.in,init) + val sync_ff2 = withClock(io.clk){RegNext(sync_ff1,0.U)} if(SHORT == 1) {io.dout := io.din } else @@ -44,297 +48,295 @@ class rvlsadder extends Module{ //Done for verification and testing val offset = Input(UInt(12.W)) val dout = Output(UInt(32.W)) }) - val w1 = Cat("b0".U,io.rs1(11,0)) + Cat("b0".U,io.offset(11,0)) //w1[12] =cout offset[11]=sign + val w1 = Cat(0.U(1.W),io.rs1(11,0)) + Cat(0.U(1.W),io.offset(11,0)) //w1[12] =cout offset[11]=sign val dout_upper = ((Fill(20, ~(io.offset(11) ^ w1(12)))) & io.rs1(31,12)) | - ((Fill(20, ~io.offset(11) ^ w1(12))) & (io.rs1(31,12)+1.U)) | - ((Fill(20, io.offset(11) ^ ~w1(12))) & (io.rs1(31,12)-1.U)) + ((Fill(20, ~io.offset(11) & w1(12))) & (io.rs1(31,12)+1.U)) | + ((Fill(20, io.offset(11) & ~w1(12))) & (io.rs1(31,12)-1.U)) io.dout := Cat(dout_upper,w1(11,0)) } -class rvbsadder extends Module{ //Done for verification and testing - val io = IO(new Bundle{ - val pc = Input(UInt(32.W)) // lsb is not using in code - val offset = Input(UInt(13.W)) // lsb is not using in code - val dout = Output(UInt(31.W)) - }) - val w1 = Cat("b0".U,io.pc(12,1)) + Cat("b0".U,io.offset(12,1)) //w1[12] =cout offset[12]=sign - val dout_upper = ((Fill(19, ~(io.offset(12) ^ w1(12))))& io.pc(31,13)) | - ((Fill(19, ~io.offset(12) ^ w1(12))) & (io.pc(31,13)+1.U)) | - ((Fill(19, io.offset(12) ^ ~w1(12))) & (io.pc(31,13)-1.U)) - io.dout := Cat(dout_upper,w1(11,0)) +class rvbradder extends Module{ //Done for verification and testing + val io = IO(new Bundle{ + val pc = Input(UInt(31.W)) // 31:1 => 30:0 + val offset = Input(UInt(12.W)) // 12:1 => 11:0 + val dout = Output(UInt(31.W)) // 31:1 => 30:0 + }) + val w1 = Cat(0.U(1.W),io.pc(11,0)) + Cat(0.U(1.W),io.offset(11,0)) //w1[12] =cout offset[12]=sign + val dout_upper = ((Fill(19, ~(io.offset(11) ^ w1(12))))& io.pc(30,12)) | + ((Fill(19, ~io.offset(11) & w1(12))) & (io.pc(30,12)+1.U)) | + ((Fill(19, io.offset(11) & ~w1(12))) & (io.pc(30,12)-1.U)) + io.dout := Cat(dout_upper,w1(11,0)) +} + + +class rvtwoscomp(WIDTH:Int=32) extends Module{ //Done for verification and testing + val io = IO(new Bundle{ + val din = Input(UInt(WIDTH.W)) + val dout = Output(UInt(WIDTH.W)) + }) + val temp = Wire(Vec(WIDTH-1,UInt(1.W))) + for(i <- 1 to WIDTH-1){ + temp(i-1) := Mux(io.din(i-1,0).orR ,~io.din(i),io.din(i))} + io.dout := Cat(temp.asUInt,io.din(0)) +} + +class rvmaskandmatch(WIDTH:Int=32) extends Module{ //Done for verification and testing + val io = IO(new Bundle{ + val mask = Input(UInt(WIDTH.W)) + val data = Input(UInt(WIDTH.W)) + val masken = Input(UInt(1.W)) + val match_out = Output(UInt(1.W)) + }) + + val matchvec = Wire(Vec(WIDTH,UInt(1.W))) + val masken_or_fullmask = io.masken.asBool & (~(io.mask(WIDTH-1,0).andR)) + + matchvec(0) := masken_or_fullmask | (io.mask(0) === io.data(0)).asUInt + + for(i <- 1 to WIDTH-1) + {matchvec(i) := Mux(io.mask(i-1,0).andR & masken_or_fullmask,"b1".U,(io.mask(i) === io.data(i)).asUInt)} + io.match_out := matchvec.asUInt.andR +}//ewrfdxgh + +class rvrangecheck_ch(CCM_SADR:UInt, CCM_SIZE:Int=128) extends Module{ + val io = IO(new Bundle{ + val addr = Input(UInt(32.W)) + val in_range = Output(UInt(1.W)) + val in_region = Output(UInt(1.W)) + }) + val REGION_BITS = 4 + val MASK_BITS = 10 + log2Ceil(CCM_SIZE) + val start_addr = CCM_SADR + val region = start_addr(31,(32-REGION_BITS)) + + io.in_region := (io.addr(31,(32-REGION_BITS)) === region(REGION_BITS-1,0)).asUInt + if(CCM_SIZE == 48) + io.in_range := (io.addr(31,MASK_BITS) === start_addr(31,MASK_BITS)).asUInt & ~(io.addr(MASK_BITS-1,MASK_BITS-2).andR.asUInt) + else + io.in_range := (io.addr(31,MASK_BITS) === start_addr(31,MASK_BITS)).asUInt +} + +class rveven_paritygen(WIDTH:Int= 16) extends Module{ //Done for verification and testing + val io = IO(new Bundle{ + val data_in = Input (UInt(WIDTH.W)) + val parity_out = Output(UInt(1.W)) + }) + io.parity_out := io.data_in.xorR.asUInt +} + +class rveven_paritycheck(WIDTH:Int= 16) extends Module{ //Done for verification and testing + val io = IO(new Bundle{ + val data_in = Input (UInt(WIDTH.W)) + val parity_in = Input (UInt(1.W)) + val parity_err = Output(UInt(1.W)) + }) + io.parity_err := (io.data_in.xorR.asUInt) ^ io.parity_in +} + +class rvecc_encode extends Module{ //Done for verification and testing + val io = IO(new Bundle{ + val din = Input(UInt(32.W)) + val ecc_out = Output(UInt(7.W)) + }) + val mask0 = Array(1,1,0,1,1,0,1,0,1,0,1,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,1,0,1,0,1,0) + val mask1 = Array(1,0,1,1,0,1,1,0,0,1,1,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,1,1,0,0,1) + val mask2 = Array(0,1,1,1,0,0,0,1,1,1,1,0,0,0,1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,1,1,1) + val mask3 = Array(0,0,0,0,1,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0) + val mask4 = Array(0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0) + val mask5 = Array(0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1) + + val w0 = Wire(Vec(18,UInt(1.W))) + val w1 = Wire(Vec(18,UInt(1.W))) + val w2 = Wire(Vec(18,UInt(1.W))) + val w3 = Wire(Vec(15,UInt(1.W))) + val w4 = Wire(Vec(15,UInt(1.W))) + val w5 = Wire(Vec(6, UInt(1.W))) + var j = 0;var k = 0;var m = 0; + var x = 0;var y = 0;var z = 0; + + for(i <- 0 to 31) + { + if(mask0(i)==1) {w0(j) := io.din(i); j = j +1 } + if(mask1(i)==1) {w1(k) := io.din(i); k = k +1 } + if(mask2(i)==1) {w2(m) := io.din(i); m = m +1 } + if(mask3(i)==1) {w3(x) := io.din(i); x = x +1 } + if(mask4(i)==1) {w4(y) := io.din(i); y = y +1 } + if(mask5(i)==1) {w5(z) := io.din(i); z = z +1 } + } + val w6 = Cat((w5.asUInt.xorR),(w4.asUInt.xorR),(w3.asUInt.xorR),(w2.asUInt.xorR),(w1.asUInt.xorR),(w0.asUInt.xorR)) + io.ecc_out := Cat(io.din.xorR ^ w6.xorR, w6) +} + + + +class rvecc_decode extends Module{ //Done for verification and testing + val io = IO(new Bundle{ + val en = Input(UInt(1.W)) + val din = Input(UInt(32.W)) + val ecc_in = Input(UInt(7.W)) + val sed_ded = Input(UInt(1.W)) + val ecc_out = Output(UInt(7.W)) + val dout = Output(UInt(32.W)) + val single_ecc_error = Output(UInt(1.W)) + val double_ecc_error = Output(UInt(1.W)) + }) + + val mask0 = Array(1,1,0,1,1,0,1,0,1,0,1,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,1,0,1,0,1,0) + val mask1 = Array(1,0,1,1,0,1,1,0,0,1,1,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,1,1,0,0,1) + val mask2 = Array(0,1,1,1,0,0,0,1,1,1,1,0,0,0,1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,1,1,1) + val mask3 = Array(0,0,0,0,1,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0) + val mask4 = Array(0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0) + val mask5 = Array(0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1) + + val w0 = Wire(Vec(18,UInt(1.W))) + val w1 = Wire(Vec(18,UInt(1.W))) + val w2 = Wire(Vec(18,UInt(1.W))) + val w3 = Wire(Vec(15,UInt(1.W))) + val w4 = Wire(Vec(15,UInt(1.W))) + val w5 = Wire(Vec(6,UInt(1.W))) + + var j = 0;var k = 0;var m = 0; var n =0; + var x = 0;var y = 0; + + for(i <- 0 to 31) + { + if(mask0(i)==1) {w0(j) := io.din(i); j = j +1 } + if(mask1(i)==1) {w1(k) := io.din(i); k = k +1 } + if(mask2(i)==1) {w2(m) := io.din(i); m = m +1 } + if(mask3(i)==1) {w3(n) := io.din(i); n = n +1 } + if(mask4(i)==1) {w4(x) := io.din(i); x = x +1 } + if(mask5(i)==1) {w5(y) := io.din(i); y = y +1 } } + val ecc_check = Cat((io.din.xorR ^ io.ecc_in.xorR) & ~io.sed_ded ,io.ecc_in(5)^(w5.asUInt.xorR),io.ecc_in(4)^(w4.asUInt.xorR),io.ecc_in(3)^(w3.asUInt.xorR),io.ecc_in(2)^(w2.asUInt.xorR),io.ecc_in(1)^(w1.asUInt.xorR),io.ecc_in(0)^(w0.asUInt.xorR)) - class rvtwoscomp(WIDTH:Int=32) extends Module{ //Done for verification and testing - val io = IO(new Bundle{ - val din = Input(UInt(WIDTH.W)) - val dout = Output(UInt(WIDTH.W)) - }) - val temp = Wire(Vec(WIDTH-1,UInt(1.W))) - val i:Int = 1 - for(i <- 1 to WIDTH-1){ - val done = io.din(i-1,0).orR - temp(i-1) := Mux(done ,~io.din(i),io.din(i)) - } - io.dout := Cat(temp.asUInt,io.din(0)) + + io.single_ecc_error := io.en & (ecc_check =/= 0.U(7.W)) & ecc_check(6) + io.double_ecc_error := io.en & (ecc_check =/= 0.U(7.W)) & ~ecc_check(6) + val error_mask = Wire(Vec(39,UInt(1.W))) + + for(i <- 1 until 40){ + error_mask(i-1) := ecc_check(5,0) === i.asUInt + } + val din_plus_parity = Cat(io.ecc_in(6), io.din(31,26), io.ecc_in(5), io.din(25,11), io.ecc_in(4), io.din(10,4), io.ecc_in(3), io.din(3,1), io.ecc_in(2), io.din(0), io.ecc_in(1,0)) + val dout_plus_parity = Mux(io.single_ecc_error.asBool, (error_mask.asUInt ^ din_plus_parity), din_plus_parity) + + io.dout := Cat(dout_plus_parity(37,32),dout_plus_parity(30,16), dout_plus_parity(14,8), dout_plus_parity(6,4), dout_plus_parity(2)) + io.ecc_out := Cat(dout_plus_parity(38) ^ (ecc_check(6,0) === "b1000000".U(7.W)), dout_plus_parity(31), dout_plus_parity(15), dout_plus_parity(7), dout_plus_parity(3), dout_plus_parity(1,0)) +} + + + +class rvecc_encode_64 extends Module{ //Done for verification and testing + val io = IO(new Bundle{ + val din = Input(UInt(64.W)) + val ecc_out = Output(UInt(7.W)) + }) + val mask0 = Array(1,1,0,1,1,0,1,0,1,0,1,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,1,0,1,0,1,0,1) + val mask1 = Array(1,0,1,1,0,1,1,0,0,1,1,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,1,1,0,0,1,1) + val mask2 = Array(0,1,1,1,0,0,0,1,1,1,1,0,0,0,1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,1,1,1,1) + val mask3 = Array(0,0,0,0,1,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0) + val mask4 = Array(0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0) + val mask5 = Array(0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0) + val mask6 = Array(0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1) + + val w0 = Wire(Vec(35,UInt(1.W))) + val w1 = Wire(Vec(35,UInt(1.W))) + val w2 = Wire(Vec(35,UInt(1.W))) + val w3 = Wire(Vec(31,UInt(1.W))) + val w4 = Wire(Vec(31,UInt(1.W))) + val w5 = Wire(Vec(31,UInt(1.W))) + val w6 = Wire(Vec(7, UInt(1.W))) + + var j = 0;var k = 0;var m = 0; var n =0; + var x = 0;var y = 0;var z = 0 + + for(i <- 0 to 63) + { + if(mask0(i)==1) {w0(j) := io.din(i); j = j +1 } + if(mask1(i)==1) {w1(k) := io.din(i); k = k +1 } + if(mask2(i)==1) {w2(m) := io.din(i); m = m +1 } + if(mask3(i)==1) {w3(n) := io.din(i); n = n +1 } + if(mask4(i)==1) {w4(x) := io.din(i); x = x +1 } + if(mask5(i)==1) {w5(y) := io.din(i); y = y +1 } + if(mask6(i)==1) {w6(z) := io.din(i); z = z +1 } + } + io.ecc_out := Cat((w6.asUInt.xorR),(w5.asUInt.xorR),(w4.asUInt.xorR),(w3.asUInt.xorR),(w2.asUInt.xorR),(w1.asUInt.xorR),(w0.asUInt.xorR)) +} + +class rvecc_decode_64 extends Module{ //Done for verification and testing + val io = IO(new Bundle{ + val en = Input(UInt(1.W)) + val din = Input(UInt(64.W)) + val ecc_in = Input(UInt(7.W)) + val ecc_error = Output(UInt(1.W)) + }) + val mask0 = Array(1,1,0,1,1,0,1,0,1,0,1,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,1,0,1,0,1,0,1) + val mask1 = Array(1,0,1,1,0,1,1,0,0,1,1,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,1,1,0,0,1,1) + val mask2 = Array(0,1,1,1,0,0,0,1,1,1,1,0,0,0,1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,1,1,1,1) + val mask3 = Array(0,0,0,0,1,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0) + val mask4 = Array(0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0) + val mask5 = Array(0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0) + val mask6 = Array(0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1) + + val w0 = Wire(Vec(35,UInt(1.W))) + val w1 = Wire(Vec(35,UInt(1.W))) + val w2 = Wire(Vec(35,UInt(1.W))) + val w3 = Wire(Vec(31,UInt(1.W))) + val w4 = Wire(Vec(31,UInt(1.W))) + val w5 = Wire(Vec(31,UInt(1.W))) + val w6 = Wire(Vec(7, UInt(1.W))) + + var j = 0;var k = 0;var m = 0; var n =0; + var x = 0;var y = 0;var z = 0; + + for(i <- 0 to 63) + { + if(mask0(i)==1) {w0(j) := io.din(i); j = j +1 } + if(mask1(i)==1) {w1(k) := io.din(i); k = k +1 } + if(mask2(i)==1) {w2(m) := io.din(i); m = m +1 } + if(mask3(i)==1) {w3(n) := io.din(i); n = n +1 } + if(mask4(i)==1) {w4(x) := io.din(i); x = x +1 } + if(mask5(i)==1) {w5(y) := io.din(i); y = y +1 } + if(mask6(i)==1) {w6(z) := io.din(i); z = z +1 } } - class rvmaskandmatch(WIDTH:Int=32) extends Module{ //Done for verification and testing - val io = IO(new Bundle{ - val mask = Input(UInt(WIDTH.W)) - val data = Input(UInt(WIDTH.W)) - val masken = Input(UInt(1.W)) - val match_out = Output(UInt(1.W)) - }) - - val matchvec = Wire(Vec(WIDTH,UInt(1.W))) - val masken_or_fullmask = io.masken.asBool & (~(io.mask(WIDTH-1,0).andR)) - - matchvec(0) := masken_or_fullmask | (io.mask(0) === io.data(0)).asUInt - - for(i <- 1 to WIDTH-1) - {matchvec(i) := Mux(io.mask(i-1,0).andR & masken_or_fullmask,"b1".U,(io.mask(i) === io.data(i)).asUInt)} - io.match_out := matchvec.asUInt.andR - } - - class rvrangecheck(CCM_SADR:UInt, CCM_SIZE:Int=128) extends Module{ - val io = IO(new Bundle{ - val addr = Input(UInt(32.W)) - val in_range = Output(UInt(1.W)) - val in_region = Output(UInt(1.W)) - }) - val REGION_BITS = 4 - val MASK_BITS = 10 + log2Ceil(CCM_SIZE) - val start_addr = CCM_SADR - val region = start_addr(31,(32-REGION_BITS)) - - io.in_region := (io.addr(31,(32-REGION_BITS)) === region(REGION_BITS-1,0)).asUInt - if(CCM_SIZE == 48) - io.in_range := (io.addr(31,MASK_BITS) === start_addr(31,MASK_BITS)).asUInt & ~(io.addr(MASK_BITS-1,MASK_BITS-2).andR.asUInt) - else - io.in_range := (io.addr(31,MASK_BITS) === start_addr(31,MASK_BITS)).asUInt - } - - class rveven_paritygen(WIDTH:Int= 16) extends Module{ //Done for verification and testing - val io = IO(new Bundle{ - val data_in = Input (UInt(WIDTH.W)) - val parity_out = Output(UInt(1.W)) - }) - io.parity_out := io.data_in.xorR.asUInt - } - - class rveven_paritycheck(WIDTH:Int= 16) extends Module{ //Done for verification and testing - val io = IO(new Bundle{ - val data_in = Input (UInt(WIDTH.W)) - val parity_in = Input (UInt(1.W)) - val parity_err = Output(UInt(1.W)) - }) - io.parity_err := (io.data_in.xorR.asUInt) ^ io.parity_in - } - - class rvecc_encode extends Module{ //Done for verification and testing - val io = IO(new Bundle{ - val din = Input(UInt(32.W)) - val ecc_out = Output(UInt(7.W)) - }) - val mask0 = Array(1,1,0,1,1,0,1,0,1,0,1,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,1,0,1,0,1,0) - val mask1 = Array(1,0,1,1,0,1,1,0,0,1,1,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,1,1,0,0,1) - val mask2 = Array(0,1,1,1,0,0,0,1,1,1,1,0,0,0,1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,1,1,1) - val mask3 = Array(0,0,0,0,1,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0) - val mask4 = Array(0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0) - val mask5 = Array(0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1) - - val w0 = Wire(Vec(18,UInt(1.W))) - val w1 = Wire(Vec(18,UInt(1.W))) - val w2 = Wire(Vec(18,UInt(1.W))) - val w3 = Wire(Vec(15,UInt(1.W))) - val w4 = Wire(Vec(15,UInt(1.W))) - val w5 = Wire(Vec(6, UInt(1.W))) - var j = 0;var k = 0;var m = 0; - var x = 0;var y = 0;var z = 0; - - for(i <- 0 to 31) - { - if(mask0(i)==1) {w0(j) := io.din(i); j = j +1 } - if(mask1(i)==1) {w1(k) := io.din(i); k = k +1 } - if(mask2(i)==1) {w2(m) := io.din(i); m = m +1 } - if(mask3(i)==1) {w3(x) := io.din(i); x = x +1 } - if(mask4(i)==1) {w4(y) := io.din(i); y = y +1 } - if(mask5(i)==1) {w5(z) := io.din(i); z = z +1 } - } - val w6 = Cat((w5.asUInt.xorR),(w4.asUInt.xorR),(w3.asUInt.xorR),(w2.asUInt.xorR),(w1.asUInt.xorR),(w0.asUInt.xorR)) - io.ecc_out := Cat(io.din.xorR ^ w6.xorR, w6) - } - - - - class rvecc_decode extends Module{ //Done for verification and testing - val io = IO(new Bundle{ - val en = Input(UInt(1.W)) - val din = Input(UInt(32.W)) - val ecc_in = Input(UInt(7.W)) - val sed_ded = Input(UInt(1.W)) - val ecc_out = Output(UInt(7.W)) - val dout = Output(UInt(32.W)) - val single_ecc_error = Output(UInt(1.W)) - val double_ecc_error = Output(UInt(1.W)) - }) - - val mask0 = Array(1,1,0,1,1,0,1,0,1,0,1,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,1,0,1,0,1,0).reverse - val mask1 = Array(1,0,1,1,0,1,1,0,0,1,1,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,1,1,0,0,1).reverse - val mask2 = Array(0,1,1,1,0,0,0,1,1,1,1,0,0,0,1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,1,1,1).reverse - val mask3 = Array(0,0,0,0,1,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0).reverse - val mask4 = Array(0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0).reverse - val mask5 = Array(0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1).reverse - - val w0 = Wire(Vec(18,UInt(1.W))) - val w1 = Wire(Vec(18,UInt(1.W))) - val w2 = Wire(Vec(18,UInt(1.W))) - val w3 = Wire(Vec(15,UInt(1.W))) - val w4 = Wire(Vec(15,UInt(1.W))) - val w5 = Wire(Vec(6,UInt(1.W))) - - var j = 0;var k = 0;var m = 0; var n =0; - var x = 0;var y = 0; - - for(i <- 0 to 31) - { - if(mask0(i)==1) {w0(j) := io.din(i); j = j +1 } - if(mask1(i)==1) {w1(k) := io.din(i); k = k +1 } - if(mask2(i)==1) {w2(m) := io.din(i); m = m +1 } - if(mask3(i)==1) {w3(n) := io.din(i); n = n +1 } - if(mask4(i)==1) {w4(x) := io.din(i); x = x +1 } - if(mask5(i)==1) {w5(y) := io.din(i); y = y +1 } - } - - val ecc_check = Cat((io.din.xorR ^ io.ecc_in.xorR) & ~io.sed_ded ,io.ecc_in(5)^(w5.asUInt.xorR),io.ecc_in(4)^(w4.asUInt.xorR),io.ecc_in(3)^(w3.asUInt.xorR),io.ecc_in(2)^(w2.asUInt.xorR),io.ecc_in(1)^(w1.asUInt.xorR),io.ecc_in(0)^(w0.asUInt.xorR)) - - - io.single_ecc_error := io.en & (ecc_check =/= 0.U(7.W)) & ((io.din.xorR ^ io.ecc_in.xorR) & ~io.sed_ded) - io.double_ecc_error := io.en & (ecc_check =/= 0.U(7.W)) & ~((io.din.xorR ^ io.ecc_in.xorR) & ~io.sed_ded) - val error_mask = Wire(Vec(39,UInt(1.W))) - - for(i <- 1 until 40){ - error_mask(i-1) := ecc_check(5,0) === i.asUInt - } - val din_plus_parity = Cat(io.ecc_in(6), io.din(31,26), io.ecc_in(5), io.din(25,11), io.ecc_in(4), io.din(10,4), io.ecc_in(3), io.din(3,1), io.ecc_in(2), io.din(0), io.ecc_in(1,0)) - val dout_plus_parity = Mux(io.single_ecc_error.asBool, (error_mask.asUInt ^ din_plus_parity), din_plus_parity) - - io.dout := Cat(dout_plus_parity(37,32),dout_plus_parity(30,16), dout_plus_parity(14,8), dout_plus_parity(6,4), dout_plus_parity(2)) - io.ecc_out := Cat(dout_plus_parity(38) ^ (ecc_check(6,0) === 1.U(7.W)), dout_plus_parity(31), dout_plus_parity(15), dout_plus_parity(7), dout_plus_parity(3), dout_plus_parity(1,0)) - } - - - - class rvecc_encode_64 extends Module{ //Done for verification and testing - val io = IO(new Bundle{ - val din = Input(UInt(64.W)) - val ecc_out = Output(UInt(7.W)) - }) - val mask0 = Array(1,1,0,1,1,0,1,0,1,0,1,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,1,0,1,0,1,0,1) - val mask1 = Array(1,0,1,1,0,1,1,0,0,1,1,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,1,1,0,0,1,1) - val mask2 = Array(0,1,1,1,0,0,0,1,1,1,1,0,0,0,1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,1,1,1,1) - val mask3 = Array(0,0,0,0,1,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0) - val mask4 = Array(0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0) - val mask5 = Array(0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0) - val mask6 = Array(0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1) - - val w0 = Wire(Vec(35,UInt(1.W))) - val w1 = Wire(Vec(35,UInt(1.W))) - val w2 = Wire(Vec(35,UInt(1.W))) - val w3 = Wire(Vec(31,UInt(1.W))) - val w4 = Wire(Vec(31,UInt(1.W))) - val w5 = Wire(Vec(31,UInt(1.W))) - val w6 = Wire(Vec(7, UInt(1.W))) - - var j = 0;var k = 0;var m = 0; var n =0; - var x = 0;var y = 0;var z = 0 - - for(i <- 63 to 0) - { - if(mask0(i)==1) {w0(j) := io.din(i); j = j +1 } - if(mask1(i)==1) {w1(k) := io.din(i); k = k +1 } - if(mask2(i)==1) {w2(m) := io.din(i); m = m +1 } - if(mask3(i)==1) {w3(n) := io.din(i); n = n +1 } - if(mask4(i)==1) {w4(x) := io.din(i); x = x +1 } - if(mask5(i)==1) {w5(y) := io.din(i); y = y +1 } - if(mask6(i)==1) {w6(z) := io.din(i); z = z +1 } - } - io.ecc_out := Cat((w0.asUInt.xorR),(w1.asUInt.xorR),(w2.asUInt.xorR),(w3.asUInt.xorR),(w4.asUInt.xorR),(w5.asUInt.xorR),(w6.asUInt.xorR)) - } - - class rvecc_decode_64 extends Module{ //Done for verification and testing - val io = IO(new Bundle{ - val en = Input(UInt(1.W)) - val din = Input(UInt(64.W)) - val ecc_in = Input(UInt(7.W)) - val ecc_error = Output(UInt(1.W)) - }) - val mask0 = Array(1,1,0,1,1,0,1,0,1,0,1,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,1,0,1,0,1,0,1) - val mask1 = Array(1,0,1,1,0,1,1,0,0,1,1,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,1,1,0,0,1,1) - val mask2 = Array(0,1,1,1,0,0,0,1,1,1,1,0,0,0,1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,1,1,1,1) - val mask3 = Array(0,0,0,0,1,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0) - val mask4 = Array(0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0) - val mask5 = Array(0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0) - val mask6 = Array(0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1) - - val w0 = Wire(Vec(35,UInt(1.W))) - val w1 = Wire(Vec(35,UInt(1.W))) - val w2 = Wire(Vec(35,UInt(1.W))) - val w3 = Wire(Vec(31,UInt(1.W))) - val w4 = Wire(Vec(31,UInt(1.W))) - val w5 = Wire(Vec(31,UInt(1.W))) - val w6 = Wire(Vec(7, UInt(1.W))) - - var j = 0;var k = 0;var m = 0; var n =0; - var x = 0;var y = 0;var z = 0; - - for(i <- 0 to 63) - { - if(mask0(i)==1) {w0(j) := io.din(i); j = j +1 } - if(mask1(i)==1) {w1(k) := io.din(i); k = k +1 } - if(mask2(i)==1) {w2(m) := io.din(i); m = m +1 } - if(mask3(i)==1) {w3(n) := io.din(i); n = n +1 } - if(mask4(i)==1) {w4(x) := io.din(i); x = x +1 } - if(mask5(i)==1) {w5(y) := io.din(i); y = y +1 } - if(mask6(i)==1) {w6(z) := io.din(i); z = z +1 } - } - - val ecc_check = Cat((io.ecc_in(6) ^ w6.asUInt.xorR) ,io.ecc_in(5)^(w5.asUInt.xorR),io.ecc_in(4)^(w4.asUInt.xorR),io.ecc_in(3)^(w3.asUInt.xorR),io.ecc_in(2)^(w2.asUInt.xorR),io.ecc_in(1)^(w1.asUInt.xorR),io.ecc_in(0)^(w0.asUInt.xorR)) - io.ecc_error := io.en & (ecc_check(6,0) =/= 0.U(7.W)) - } + val ecc_check = Cat((io.ecc_in(6) ^ w6.asUInt.xorR) ,io.ecc_in(5)^(w5.asUInt.xorR),io.ecc_in(4)^(w4.asUInt.xorR),io.ecc_in(3)^(w3.asUInt.xorR),io.ecc_in(2)^(w2.asUInt.xorR),io.ecc_in(1)^(w1.asUInt.xorR),io.ecc_in(0)^(w0.asUInt.xorR)) + io.ecc_error := io.en & (ecc_check(6,0) =/= 0.U(7.W)) +} - ////////////////////////////TEC_RV_ICG//////////////////////// - class TEC_RV_ICG extends BlackBox with HasBlackBoxResource { - val io = IO(new Bundle { - val Q = Output(Clock()) - val CK = Input(Clock()) - val EN = Input(Bool()) - val SE = Input(Bool()) - }) - addResource("/vsrc/TEC_RV_ICG.v") - } - class rvclkhdr extends Module { - val io = IO(new Bundle { - val l1clk = Output(Clock()) - val clk = Input(Clock()) - val en = Input(Bool()) - val scan_mode = Input(Bool()) - }) - val clkhdr = { Module(new TEC_RV_ICG) } - io.l1clk := clkhdr.io.Q - clkhdr.io.CK := io.clk - clkhdr.io.EN := io.en - clkhdr.io.SE := io.scan_mode - } +////////////////////////////TEC_RV_ICG//////////////////////// +class TEC_RV_ICG extends BlackBox with HasBlackBoxResource { + val io = IO(new Bundle { + val Q = Output(Clock()) + val CK = Input(Clock()) + val EN = Input(Bool()) + val SE = Input(Bool()) + }) + addResource("/vsrc/TEC_RV_ICG.v") +} - object rvclkhdr { +class rvclkhdr extends Module { + val io = IO(new Bundle { + val l1clk = Output(Clock()) + val clk = Input(Clock()) + val en = Input(Bool()) + val scan_mode = Input(Bool()) + }) + val clkhdr = { Module(new TEC_RV_ICG) } + io.l1clk := clkhdr.io.Q + clkhdr.io.CK := io.clk + clkhdr.io.EN := io.en + clkhdr.io.SE := io.scan_mode +} + +object rvclkhdr { def apply(clk: Clock, en: Bool, scan_mode: Bool): Clock = { val cg = Module(new rvclkhdr) cg.io.clk := clk @@ -356,27 +358,39 @@ object rvdffe { RegNext(din, 0.U) } } + def apply(din: Bundle, en: Bool, clk: Clock, scan_mode: Bool) = { + val obj = Module(new rvclkhdr()) + val l1clk = obj.io.l1clk + obj.io.clk := clk + obj.io.en := en + obj.io.scan_mode := scan_mode + withClock(l1clk) { + RegNext(din,0.U.asTypeOf(din.cloneType)) + } + } } /////////////rvdffe ////////////////////////// /* -class class_rvdffe extends Module{ +class class_rvdffe extends Module with RequireAsyncReset{ val io = IO(new Bundle { - val in = Input(UInt(32.W)) - val out = Output(UInt(32.W)) + val lsu_pkt_d = Input(new el2_load_cam_pkt_t) + val lsu_pkt_m = Output(new el2_load_cam_pkt_t) val clk = Input(Clock()) val en = Input(Bool()) val scan_mode = Input(Bool()) }) - io.out := rvdffe(io.in,io.en.asBool,io.clk,io.scan_mode.asBool) + io.lsu_pkt_m := rvdffe(io.lsu_pkt_d,io.en.asBool,io.clk,io.scan_mode.asBool) } + object main extends App{ println("Generate Verilog") - chisel3.Driver.execute(args, ()=> new rvrangecheck) -} -*/ + chisel3.Driver.execute(args, ()=> new class_rvdffe) +}*/ + + diff --git a/src/main/scala/lib/el2_lib.scala b/src/main/scala/lib/el2_lib.scala index 9c34e627..e8e60bd8 100644 --- a/src/main/scala/lib/el2_lib.scala +++ b/src/main/scala/lib/el2_lib.scala @@ -1,4 +1,5 @@ package lib + import chisel3._ import chisel3.util._ trait param { @@ -33,14 +34,14 @@ trait param { val DATA_ACCESS_ADDR5 = 0x00000000 //.U(32.W) val DATA_ACCESS_ADDR6 = 0x00000000 //.U(32.W) val DATA_ACCESS_ADDR7 = 0x00000000 //.U(32.W) - val DATA_ACCESS_ENABLE0 = 0x1 //.U(1.W) - val DATA_ACCESS_ENABLE1 = 0x1 //.U(1.W) - val DATA_ACCESS_ENABLE2 = 0x1 //.U(1.W) - val DATA_ACCESS_ENABLE3 = 0x1 //.U(1.W) - val DATA_ACCESS_ENABLE4 = 0x0 //.U(1.W) - val DATA_ACCESS_ENABLE5 = 0x0 //.U(1.W) - val DATA_ACCESS_ENABLE6 = 0x0 //.U(1.W) - val DATA_ACCESS_ENABLE7 = 0x0 //.U(1.W) + val DATA_ACCESS_ENABLE0 = true //.U(1.W) + val DATA_ACCESS_ENABLE1 = true //.U(1.W) + val DATA_ACCESS_ENABLE2 = true //.U(1.W) + val DATA_ACCESS_ENABLE3 = true //.U(1.W) + val DATA_ACCESS_ENABLE4 = false //.U(1.W) + val DATA_ACCESS_ENABLE5 = false //.U(1.W) + val DATA_ACCESS_ENABLE6 = false //.U(1.W) + val DATA_ACCESS_ENABLE7 = false //.U(1.W) val DATA_ACCESS_MASK0 = 0x7FFFFFFF //.U(32.W) val DATA_ACCESS_MASK1 = 0x3FFFFFFF //.U(32.W) val DATA_ACCESS_MASK2 = 0x1FFFFFFF //.U(32.W) @@ -49,21 +50,21 @@ trait param { val DATA_ACCESS_MASK5 = 0xFFFFFFFF //.U(32.W) val DATA_ACCESS_MASK6 = 0xFFFFFFFF //.U(32.W) val DATA_ACCESS_MASK7 = 0xFFFFFFFF //.U(32.W) - val DCCM_BANK_BITS = 0x2 //.U(3.W) - val DCCM_BITS = 0x10 //.U(5.W) - val DCCM_BYTE_WIDTH = 0x4 //.U(3.W) - val DCCM_DATA_WIDTH = 0x20 //.U(6.W) - val DCCM_ECC_WIDTH = 0x7 //.U(3.W) - val DCCM_ENABLE = 0x1 //.U(1.W) + val DCCM_BANK_BITS = 2 //.U(3.W) + val DCCM_BITS = 16 //.U(5.W) + val DCCM_BYTE_WIDTH = 4 //.U(3.W) + val DCCM_DATA_WIDTH = 32 //.U(6.W) + val DCCM_ECC_WIDTH = 7 //.U(3.W) + val DCCM_ENABLE = true //.U(1.W) val DCCM_FDATA_WIDTH = 0x27 //.U(6.W) val DCCM_INDEX_BITS = 0xC //.U(4.W) val DCCM_NUM_BANKS = 0x04 //.U(5.W) - val DCCM_REGION = 0xF //.U(4.W) + val DCCM_REGION = 15 //.U(4.W) val DCCM_SADR = 0xF0040000 val DCCM_SIZE = 0x040 - val DCCM_WIDTH_BITS = 0x2 //.U(2.W) - val DMA_BUF_DEPTH = 0x5 //.U(3.W) - val DMA_BUS_ID = 0x1 //.U(1.W) + val DCCM_WIDTH_BITS = 2 //.U(2.W) + val DMA_BUF_DEPTH = 5 //.U(3.W) + val DMA_BUS_ID = true //.U(1.W) val DMA_BUS_PRTY = 0x2 //.U(2.W) val DMA_BUS_TAG = 0x1 //.U(4.W) val FAST_INTERRUPT_REDIRECT= 0x1 //.U(1.W) @@ -94,16 +95,16 @@ trait param { val ICACHE_TAG_LO = 13 val ICACHE_WAYPACK = false val ICCM_BANK_BITS = 2 - val ICCM_BANK_HI = 0x03 //.U(5.W) - val ICCM_BANK_INDEX_LO = 0x04 //.U(5.W) - val ICCM_BITS = 0x10 //.U(5.W) - val ICCM_ENABLE = 0x1 //.U(1.W) - val ICCM_ICACHE = 0x1 //.U(1.W) + val ICCM_BANK_HI = 3 //.U(5.W) + val ICCM_BANK_INDEX_LO = 4 //.U(5.W) + val ICCM_BITS = 16 //.U(5.W) + val ICCM_ENABLE = true //.U(1.W) + val ICCM_ICACHE = true //.U(1.W) val ICCM_INDEX_BITS = 0xC //.U(4.W) val ICCM_NUM_BANKS = 0x04 //.U(5.W) val ICCM_ONLY = 0x0 //.U(1.W) val ICCM_REGION = 0xE //.U(4.W) - val ICCM_SADR = 0xEE000000 //.U(32.W) + val ICCM_SADR = 0xEE000000L //.U(32.W) val ICCM_SIZE = 0x040 //.U(10.W) val IFU_BUS_ID = 0x1 //.U(1.W) val IFU_BUS_PRTY = 0x2 //.U(2.W) @@ -155,12 +156,21 @@ trait param { val SB_BUS_PRTY = 0x2 //.U(2.W) val SB_BUS_TAG = 0x1 //.U(4.W) val TIMER_LEGAL_EN = 0x1 //.U(1.W) - } trait el2_lib extends param{ + // Configuration Methods + def MEM_CAL : (Int, Int, Int)= + (ICACHE_WAYPACK, ICACHE_ECC) match{ + case(false,false) => (68,22, 68) + case(false,true) => (71,26, 71) + case(true,false) => (68*ICACHE_NUM_WAYS,22*ICACHE_NUM_WAYS, 68) + case(true,true) => (71*ICACHE_NUM_WAYS,26*ICACHE_NUM_WAYS, 71) + } + val DATA_MEM_LINE = MEM_CAL + def el2_btb_tag_hash(pc : UInt) = - (VecInit.tabulate(3)(i => pc(BTB_ADDR_HI+((i+1)*(BTB_BTAG_SIZE)),BTB_ADDR_HI+(i*BTB_BTAG_SIZE)+1))).reduce(_^_) + VecInit.tabulate(3)(i => pc(BTB_ADDR_HI+((i+1)*(BTB_BTAG_SIZE)),BTB_ADDR_HI+(i*BTB_BTAG_SIZE)+1)).reduce(_^_) def el2_btb_tag_hash_fold(pc : UInt) = pc(BTB_ADDR_HI+(2*BTB_BTAG_SIZE),BTB_ADDR_HI+BTB_BTAG_SIZE+1)^pc(BTB_ADDR_HI+BTB_BTAG_SIZE,BTB_ADDR_HI+1) @@ -173,39 +183,84 @@ trait el2_lib extends param{ if(BHT_GHR_HASH_1) Cat(ghr(BHT_GHR_SIZE-1,BTB_INDEX1_HI-1), hashin(BTB_INDEX1_HI,2) ^ ghr(BTB_INDEX1_HI-2,0)) else hashin(BHT_GHR_SIZE+1,2) ^ ghr(BHT_GHR_SIZE-1,0) - def repl(b:Int, a:UInt) : UInt = - VecInit.tabulate(b)(i => a).reduce(Cat(_,_)) + def repl(b:Int, a:UInt) = VecInit.tabulate(b)(i => a).reduce(Cat(_,_)) - def rveven_paritycheck(data_in:UInt, parity_in:UInt) : UInt = - (data_in.xorR.asUInt) ^ parity_in + def Mux1H_LM(a:Seq[Bool], b:Seq[UInt]) = (0 until b.size).map(i=> repl(b(i).getWidth,a(i)) & b(i)).reduce(_|_) - def rveven_paritygen(data_in : UInt) = - data_in.xorR.asUInt - def memory_cal = - (ICACHE_WAYPACK, ICACHE_ECC) match{ - case(false,false) => 68 - case(false,true) => 71 - case(true,false) => 68*ICACHE_NUM_WAYS - case(true,true) => 71*ICACHE_NUM_WAYS + + def rvsyncss(din:UInt,clk:Clock) = withClock(clk){RegNext(RegNext(din,0.U),0.U)} + + def rvlsadder(rs1:UInt,offset:UInt) = { + val w1 = Cat(0.U(1.W),rs1(11,0)) + Cat(0.U(1.W),offset(11,0)) //w1[12] =cout offset[11]=sign + val dout_upper = ((Fill(20, ~(offset(11) ^ w1(12)))) & rs1(31,12)) | + ((Fill(20, ~offset(11) & w1(12))) & (rs1(31,12)+1.U)) | + ((Fill(20, offset(11) & ~w1(12))) & (rs1(31,12)-1.U)) + Cat(dout_upper,w1(11,0)) + } + + + + def rvbradder(pc:UInt,offset:UInt) = { // lsb is not using in code + val w1 = Cat(0.U(1.W),pc(11,0)) + Cat(0.U(1.W),offset(11,0)) //w1[12] =cout offset[12]=sign + val dout_upper = ((Fill(19, ~(offset(11) ^ w1(12))))& pc(30,12)) | + ((Fill(19, ~offset(11) & w1(12))) & (pc(30,12)+1.U)) | + ((Fill(19, offset(11) & ~w1(12))) & (pc(30,12)-1.U)) + Cat(dout_upper,w1(11,0))} + + def rvbradder_32 (pc:UInt, offset:UInt) = { + val dout_lower = pc(12,1) +& offset(12,1) + val pc_inc = pc(31,13)+1.U + val pc_dec = pc(31,13)-1.U + val sign = offset(12) + Cat(Mux1H(Seq((sign ^ !dout_lower(dout_lower.getWidth-1)).asBool -> pc(31,13), + (!sign & dout_lower(dout_lower.getWidth-1)).asBool -> pc_inc, + (sign & !dout_lower(dout_lower.getWidth-1)).asBool -> pc_dec)) , dout_lower(11,0), 0.U) + } + + + def rvtwoscomp(din:UInt) = { //Done for verification and testing + val temp = Wire(Vec(din.getWidth-1,UInt(1.W))) + for(i <- 1 to din.getWidth-1){ + temp(i-1) := Mux(din(i-1,0).orR ,~din(i),din(i)) } - def rvmaskandmatch(mask:UInt, data:UInt, masken:Bool):UInt={ + Cat(temp.asUInt,din(0)) + } + + + //WIDTH will be inferred + def rvmaskandmatch(mask:UInt,data:UInt,masken:UInt) = { //Done for verification and testing val matchvec = Wire(Vec(data.getWidth,UInt(1.W))) - val masken_or_fullmask = masken & ~mask.andR + val masken_or_fullmask = masken.asBool & (~(mask(data.getWidth-1,0).andR)) matchvec(0) := masken_or_fullmask | (mask(0) === data(0)).asUInt for(i <- 1 to data.getWidth-1) - matchvec(i) := Mux(mask(i-1,0).andR & masken_or_fullmask,"b1".U,(mask(i) === data(i)).asUInt) - matchvec.asUInt + {matchvec(i) := Mux(mask(i-1,0).andR & masken_or_fullmask,"b1".U,(mask(i) === data(i)).asUInt)} + matchvec.asUInt.andR } - val data_mem_size : Int = memory_cal - // Move rvecc_encode to a proper trait - def rvecc_encode(din:UInt) = { //Done for verification and testing - val mask0 = Array(0,1,0,1,0,1,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,1,0,1,0,1,0,1,1,0,1,1) - val mask1 = Array(1,0,0,1,1,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,1,1,0,0,1,1,0,1,1,0,1) - val mask2 = Array(1,1,1,0,0,0,1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,1,1,1,1,0,0,0,1,1,1,0) - val mask3 = Array(0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1,1,1,1,1,1,0,0,0,0) - val mask4 = Array(0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,0,0,0) - val mask5 = Array(1,1,1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0) + + + def rvrangecheck_ch(addr:UInt,CCM_SADR:UInt, CCM_SIZE:Int=128) = { + val REGION_BITS = 4 + val MASK_BITS = 10 + log2Ceil(CCM_SIZE) + val start_addr = CCM_SADR + val region = start_addr(31,(32-REGION_BITS)) + val in_region = (addr(31,(32-REGION_BITS)) === region(REGION_BITS-1,0)).asUInt + val in_range = Wire(UInt(1.W)) + if(CCM_SIZE == 48) + in_range := (addr(31,MASK_BITS) === start_addr(31,MASK_BITS)).asUInt & ~(addr(MASK_BITS-1,MASK_BITS-2).andR.asUInt) + else + in_range := (addr(31,MASK_BITS) === start_addr(31,MASK_BITS)).asUInt + (in_range,in_region) + } + + + def rvecc_encode(din:UInt):UInt = { + val mask0 = Array(1,1,0,1,1,0,1,0,1,0,1,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,1,0,1,0,1,0) + val mask1 = Array(1,0,1,1,0,1,1,0,0,1,1,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,1,1,0,0,1) + val mask2 = Array(0,1,1,1,0,0,0,1,1,1,1,0,0,0,1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,1,1,1) + val mask3 = Array(0,0,0,0,1,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0) + val mask4 = Array(0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0) + val mask5 = Array(0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1) val w0 = Wire(Vec(18,UInt(1.W))) val w1 = Wire(Vec(18,UInt(1.W))) val w2 = Wire(Vec(18,UInt(1.W))) @@ -214,7 +269,6 @@ trait el2_lib extends param{ val w5 = Wire(Vec(6, UInt(1.W))) var j = 0;var k = 0;var m = 0; var x = 0;var y = 0;var z = 0 - for(i <- 0 to 31) { if(mask0(i)==1) {w0(j) := din(i); j = j +1 } @@ -224,22 +278,16 @@ trait el2_lib extends param{ if(mask4(i)==1) {w4(y) := din(i); y = y +1 } if(mask5(i)==1) {w5(z) := din(i); z = z +1 } } - val w6 = Cat((w0.asUInt.xorR),(w1.asUInt.xorR),(w2.asUInt.xorR),(w3.asUInt.xorR),(w4.asUInt.xorR),(w5.asUInt.xorR)) - Cat(din.xorR ^ w6.xorR, w6) + val w6 = Cat((w5.asUInt.xorR),(w4.asUInt.xorR),(w3.asUInt.xorR),(w2.asUInt.xorR),(w1.asUInt.xorR),(w0.asUInt.xorR)) + val ecc_out = Cat(din.xorR ^ w6.xorR, w6) + ecc_out } - class rvecc_decode extends Module{ //Done for verification and testing - val io = IO(new Bundle{ - val en = Input(UInt(1.W)) - val din = Input(UInt(32.W)) - val ecc_in = Input(UInt(7.W)) - val sed_ded = Input(UInt(1.W)) - val ecc_out = Output(UInt(7.W)) - val dout = Output(UInt(32.W)) - val single_ecc_error = Output(UInt(1.W)) - val double_ecc_error = Output(UInt(1.W)) - }) + def rveven_paritygen(data_in:UInt):UInt = data_in.xorR.asUInt + def rveven_paritycheck(data_in:UInt,parity_in:UInt) = (data_in.xorR.asUInt) ^ parity_in + + def rvecc_decode(en:UInt,din:UInt,ecc_in:UInt,sed_ded:UInt)= { val mask0 = Array(1,1,0,1,1,0,1,0,1,0,1,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,1,0,1,0,1,0) val mask1 = Array(1,0,1,1,0,1,1,0,0,1,1,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,1,1,0,0,1) val mask2 = Array(0,1,1,1,0,0,0,1,1,1,1,0,0,0,1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,1,1,1) @@ -259,27 +307,101 @@ trait el2_lib extends param{ for(i <- 0 to 31) { - if(mask0(i)==1) {w0(j) := io.din(i); j = j +1 } - if(mask1(i)==1) {w1(k) := io.din(i); k = k +1 } - if(mask2(i)==1) {w2(m) := io.din(i); m = m +1 } - if(mask3(i)==1) {w3(n) := io.din(i); n = n +1 } - if(mask4(i)==1) {w4(x) := io.din(i); x = x +1 } - if(mask5(i)==1) {w5(y) := io.din(i); y = y +1 } + if(mask0(i)==1) {w0(j) := din(i); j = j +1 } + if(mask1(i)==1) {w1(k) := din(i); k = k +1 } + if(mask2(i)==1) {w2(m) := din(i); m = m +1 } + if(mask3(i)==1) {w3(n) := din(i); n = n +1 } + if(mask4(i)==1) {w4(x) := din(i); x = x +1 } + if(mask5(i)==1) {w5(y) := din(i); y = y +1 } } - val ecc_check = Cat((io.din.xorR ^ io.ecc_in.xorR) & ~io.sed_ded ,io.ecc_in(5)^(w5.asUInt.xorR),io.ecc_in(4)^(w4.asUInt.xorR),io.ecc_in(3)^(w3.asUInt.xorR),io.ecc_in(2)^(w2.asUInt.xorR),io.ecc_in(1)^(w1.asUInt.xorR),io.ecc_in(0)^(w0.asUInt.xorR)) - - io.single_ecc_error := io.en & (ecc_check!= 0.U) & ((io.din.xorR ^ io.ecc_in.xorR) & ~io.sed_ded) - io.double_ecc_error := io.en & (ecc_check!= 0.U) & ((io.din.xorR ^ io.ecc_in.xorR) & ~io.sed_ded) + val ecc_check = Cat((din.xorR ^ ecc_in.xorR) & ~sed_ded ,ecc_in(5)^(w5.asUInt.xorR),ecc_in(4)^(w4.asUInt.xorR),ecc_in(3)^(w3.asUInt.xorR),ecc_in(2)^(w2.asUInt.xorR),ecc_in(1)^(w1.asUInt.xorR),ecc_in(0)^(w0.asUInt.xorR)) + val single_ecc_error = en & (ecc_check=/= 0.U) & ecc_check(6) + val double_ecc_error = en & (ecc_check=/= 0.U) & ~ecc_check(6) val error_mask = Wire(Vec(39,UInt(1.W))) for(i <- 1 until 40){ error_mask(i-1) := ecc_check(5,0) === i.asUInt } - val din_plus_parity = Cat(io.ecc_in(6), io.din(31,26), io.ecc_in(5), io.din(25,11), io.ecc_in(4), io.din(10,4), io.ecc_in(3), io.din(3,1), io.ecc_in(2), io.din(0), io.ecc_in(1,0)) - val dout_plus_parity = Mux(io.single_ecc_error.asBool, (error_mask.asUInt ^ din_plus_parity), din_plus_parity) + val din_plus_parity = Cat(ecc_in(6), din(31,26), ecc_in(5), din(25,11), ecc_in(4), din(10,4), ecc_in(3), din(3,1), ecc_in(2), din(0), ecc_in(1,0)) + val dout_plus_parity = Mux(single_ecc_error.asBool, (error_mask.asUInt ^ din_plus_parity), din_plus_parity) - io.dout := Cat(dout_plus_parity(37,32),dout_plus_parity(30,16), dout_plus_parity(14,8), dout_plus_parity(6,4), dout_plus_parity(2)) - io.ecc_out := Cat(dout_plus_parity(38) ^ (ecc_check(6,0) === "b1000000".U), dout_plus_parity(31), dout_plus_parity(15), dout_plus_parity(7), dout_plus_parity(3), dout_plus_parity(1,0)) + val dout = Cat(dout_plus_parity(37,32),dout_plus_parity(30,16), dout_plus_parity(14,8), dout_plus_parity(6,4), dout_plus_parity(2)) + val ecc_out = Cat(dout_plus_parity(38) ^ (ecc_check(6,0) === "b1000000".U(7.W)), dout_plus_parity(31), dout_plus_parity(15), dout_plus_parity(7), dout_plus_parity(3), dout_plus_parity(1,0)) + (ecc_out,dout,single_ecc_error,double_ecc_error) } -} + + + def rvecc_encode_64(din:UInt):UInt = { + val mask0 = Array(1,1,0,1,1,0,1,0,1,0,1,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,1,0,1,0,1,0,1) + val mask1 = Array(1,0,1,1,0,1,1,0,0,1,1,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,1,1,0,0,1,1) + val mask2 = Array(0,1,1,1,0,0,0,1,1,1,1,0,0,0,1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,1,1,1,1) + val mask3 = Array(0,0,0,0,1,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0) + val mask4 = Array(0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0) + val mask5 = Array(0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0) + val mask6 = Array(0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1) + + + val w0 = Wire(Vec(35,UInt(1.W))) + val w1 = Wire(Vec(35,UInt(1.W))) + val w2 = Wire(Vec(35,UInt(1.W))) + val w3 = Wire(Vec(31,UInt(1.W))) + val w4 = Wire(Vec(31,UInt(1.W))) + val w5 = Wire(Vec(31,UInt(1.W))) + val w6 = Wire(Vec(7, UInt(1.W))) + + var j = 0;var k = 0;var m = 0; var n =0; + var x = 0;var y = 0;var z = 0 + + for(i <- 0 to 63) + { + if(mask0(i)==1) {w0(j) := din(i); j = j +1 } + if(mask1(i)==1) {w1(k) := din(i); k = k +1 } + if(mask2(i)==1) {w2(m) := din(i); m = m +1 } + if(mask3(i)==1) {w3(n) := din(i); n = n +1 } + if(mask4(i)==1) {w4(x) := din(i); x = x +1 } + if(mask5(i)==1) {w5(y) := din(i); y = y +1 } + if(mask6(i)==1) {w6(z) := din(i); z = z +1 } + } + val ecc_out = Cat((w0.asUInt.xorR),(w1.asUInt.xorR),(w2.asUInt.xorR),(w3.asUInt.xorR),(w4.asUInt.xorR),(w5.asUInt.xorR),(w6.asUInt.xorR)) + ecc_out + } + + + def rvecc_decode_64(en:UInt,din:UInt,ecc_in:UInt) = { + val mask0 = Array(1,1,0,1,1,0,1,0,1,0,1,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,1,0,1,0,1,0,1) + val mask1 = Array(1,0,1,1,0,1,1,0,0,1,1,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,1,1,0,0,1,1) + val mask2 = Array(0,1,1,1,0,0,0,1,1,1,1,0,0,0,1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,1,1,1,1) + val mask3 = Array(0,0,0,0,1,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0) + val mask4 = Array(0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0) + val mask5 = Array(0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0) + val mask6 = Array(0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1) + + val w0 = Wire(Vec(35,UInt(1.W))) + val w1 = Wire(Vec(35,UInt(1.W))) + val w2 = Wire(Vec(35,UInt(1.W))) + val w3 = Wire(Vec(31,UInt(1.W))) + val w4 = Wire(Vec(31,UInt(1.W))) + val w5 = Wire(Vec(31,UInt(1.W))) + val w6 = Wire(Vec(7, UInt(1.W))) + + var j = 0;var k = 0;var m = 0; var n =0; + var x = 0;var y = 0;var z = 0 + + for(i <- 0 to 63) + { + if(mask0(i)==1) {w0(j) := din(i); j = j +1 } + if(mask1(i)==1) {w1(k) := din(i); k = k +1 } + if(mask2(i)==1) {w2(m) := din(i); m = m +1 } + if(mask3(i)==1) {w3(n) := din(i); n = n +1 } + if(mask4(i)==1) {w4(x) := din(i); x = x +1 } + if(mask5(i)==1) {w5(y) := din(i); y = y +1 } + if(mask6(i)==1) {w6(z) := din(i); z = z +1 } + } + + val ecc_check = Cat((ecc_in(6) ^ w6.asUInt.xorR) ,ecc_in(5)^(w5.asUInt.xorR),ecc_in(4)^(w4.asUInt.xorR),ecc_in(3)^(w3.asUInt.xorR),ecc_in(2)^(w2.asUInt.xorR),ecc_in(1)^(w1.asUInt.xorR),ecc_in(0)^(w0.asUInt.xorR)) + val ecc_error = en & (ecc_check(6,0) =/= 0.U) + ecc_error + } + +} \ No newline at end of file diff --git a/src/main/scala/lsu/el2_lsu.scala b/src/main/scala/lsu/el2_lsu.scala index dba9130d..b3d298f7 100644 --- a/src/main/scala/lsu/el2_lsu.scala +++ b/src/main/scala/lsu/el2_lsu.scala @@ -1,5 +1,496 @@ package lsu +import lib._ +import chisel3._ +import chisel3.util._ +import include._ -class el2_lsu { + +class el2_lsu extends Module with RequireAsyncReset with param with el2_lib { + val io = IO (new Bundle { + val clk_override = Input(Bool()) + val dec_tlu_flush_lower_r = Input(Bool()) + val dec_tlu_i0_kill_writeb_r = Input(Bool()) + val dec_tlu_force_halt = Input(Bool()) + // chicken signals + val dec_tlu_external_ldfwd_disable = Input(Bool()) + val dec_tlu_wb_coalescing_disable = Input(Bool()) + val dec_tlu_sideeffect_posted_disable = Input(Bool()) + val dec_tlu_core_ecc_disable = Input(Bool()) + + val exu_lsu_rs1_d = Input(UInt(32.W)) + val exu_lsu_rs2_d = Input(UInt(32.W)) + val dec_lsu_offset_d = Input(UInt(12.W)) + val lsu_p = Input(new el2_lsu_pkt_t) + val trigger_pkt_any = Input(Vec(4, new el2_trigger_pkt_t)) + + val dec_lsu_valid_raw_d = Input(Bool()) + val dec_tlu_mrac_ff = Input(UInt(32.W)) + + //Outputs + // val lsu_result_m = Output(UInt(32.W)) + // val lsu_result_corr_r = Output(UInt(32.W)) + val lsu_load_stall_any = Output(Bool()) + val lsu_store_stall_any = Output(Bool()) + val lsu_fastint_stall_any = Output(Bool()) + val lsu_idle_any = Output(Bool()) + val lsu_fir_addr = Output(UInt(32.W)) + val lsu_fir_error = Output(UInt(2.W)) + val lsu_single_ecc_error_incr = Output(Bool()) + val lsu_error_pkt_r = Output(new el2_lsu_error_pkt_t) + val lsu_imprecise_error_load_any = Output(Bool()) + val lsu_imprecise_error_store_any = Output(Bool()) + val lsu_imprecise_error_addr_any = Output(UInt(32.W)) + + // Non-blocking loads + val lsu_nonblock_load_valid_m = Output(Bool()) + val lsu_nonblock_load_tag_m = Output(UInt(LSU_NUM_NBLOAD_WIDTH.W)) + val lsu_nonblock_load_inv_r = Output(Bool()) + val lsu_nonblock_load_inv_tag_r = Output(UInt(LSU_NUM_NBLOAD_WIDTH.W)) + val lsu_nonblock_load_data_valid = Output(Bool()) + val lsu_nonblock_load_data_error = Output(Bool()) + val lsu_nonblock_load_data_tag = Output(UInt(LSU_NUM_NBLOAD_WIDTH.W)) + val lsu_nonblock_load_data = Output(UInt(32.W)) + + val lsu_pmu_load_external_m = Output(Bool()) + val lsu_pmu_store_external_m = Output(Bool()) + val lsu_pmu_misaligned_m = Output(Bool()) + val lsu_pmu_bus_trxn = Output(Bool()) + val lsu_pmu_bus_misaligned = Output(Bool()) + val lsu_pmu_bus_error = Output(Bool()) + val lsu_pmu_bus_busy = Output(Bool()) + + val lsu_trigger_match_m = Output(UInt(4.W)) + // DCCM ports + val dccm_wren = Output(Bool()) + val dccm_rden = Output(Bool()) + val dccm_wr_addr_lo = Output(UInt(DCCM_BITS.W)) + val dccm_wr_addr_hi = Output(UInt(DCCM_BITS.W)) + val dccm_rd_addr_lo = Output(UInt(DCCM_BITS.W)) + val dccm_rd_addr_hi = Output(UInt(DCCM_BITS.W)) + val dccm_wr_data_lo = Output(UInt(DCCM_FDATA_WIDTH.W)) + val dccm_wr_data_hi = Output(UInt(DCCM_FDATA_WIDTH.W)) + val dccm_rd_data_lo = Input(UInt(DCCM_FDATA_WIDTH.W)) + val dccm_rd_data_hi = Input(UInt(DCCM_FDATA_WIDTH.W)) + // PIC ports + val picm_wren = Output(Bool()) + val picm_rden = Output(Bool()) + val picm_mken = Output(Bool()) + val picm_rdaddr = Output(UInt(32.W)) + val picm_wraddr = Output(UInt(32.W)) + val picm_wr_data = Output(UInt(32.W)) + val picm_rd_data = Input(UInt(32.W)) + + // AXI Write Channels + + val lsu_axi_awvalid = Output(Bool()) + val lsu_axi_awlock = Output(Bool()) + val lsu_axi_awready = Input(Bool()) + val lsu_axi_awid = Output(UInt(LSU_BUS_TAG.W)) + val lsu_axi_awaddr = Output(UInt(32.W)) + val lsu_axi_awregion = Output(UInt(4.W)) + val lsu_axi_awlen = Output(UInt(8.W)) + val lsu_axi_awsize = Output(UInt(3.W)) + val lsu_axi_awburst = Output(UInt(2.W)) + val lsu_axi_awcache = Output(UInt(4.W)) + val lsu_axi_awprot = Output(UInt(3.W)) + val lsu_axi_awqos = Output(UInt(4.W)) + val lsu_axi_wvalid = Output(Bool()) + val lsu_axi_wready = Input(Bool()) + val lsu_axi_wdata = Output(UInt(64.W)) + val lsu_axi_wstrb = Output(UInt(8.W)) + val lsu_axi_wlast = Output(Bool()) + val lsu_axi_bvalid = Input(Bool()) + val lsu_axi_bready = Output(Bool()) + val lsu_axi_bresp = Input(UInt(2.W)) + val lsu_axi_bid = Input(UInt(LSU_BUS_TAG.W)) + + // AXI Read Channels + + val lsu_axi_arvalid = Output(Bool()) + val lsu_axi_arlock = Output(Bool()) + val lsu_axi_arready = Input(Bool()) + val lsu_axi_arid = Output(UInt(LSU_BUS_TAG.W)) + val lsu_axi_araddr = Output(UInt(32.W)) + val lsu_axi_arregion = Output(UInt(4.W)) + val lsu_axi_arlen = Output(UInt(8.W)) + val lsu_axi_arsize = Output(UInt(3.W)) + val lsu_axi_arburst = Output(UInt(2.W)) + val lsu_axi_arcache = Output(UInt(4.W)) + val lsu_axi_arprot = Output(UInt(3.W)) + val lsu_axi_arqos = Output(UInt(4.W)) + val lsu_axi_rvalid = Input(Bool()) + val lsu_axi_rready = Output(Bool()) + val lsu_axi_rdata = Input(UInt(64.W)) + val lsu_axi_rlast = Input(Bool()) + val lsu_axi_rresp = Input(UInt(2.W)) + val lsu_axi_rid = Input(UInt(LSU_BUS_TAG.W)) + + val lsu_bus_clk_en = Input(Bool()) + // DMA slave + + val dma_dccm_req = Input(Bool()) + val dma_mem_write = Input(Bool()) + val dccm_dma_rvalid = Output(Bool()) + val dccm_dma_ecc_error = Output(Bool()) + val dma_mem_tag = Input(UInt(3.W)) + val dma_mem_addr = Input(UInt(32.W)) + val dma_mem_sz = Input(UInt(3.W)) + val dma_mem_wdata = Input(UInt(64.W)) + val dccm_dma_rtag = Output(UInt(3.W)) + val dccm_dma_rdata = Output(UInt(64.W)) + val dccm_ready = Output(Bool()) + + val scan_mode = Input(Bool()) + val free_clk = Input(Clock()) + + }) + val dma_dccm_wdata = WireInit(0.U(64.W)) + val dma_dccm_wdata_lo = WireInit(0.U(32.W)) + val dma_dccm_wdata_hi = WireInit(0.U(32.W)) + val dma_mem_tag_m = WireInit(0.U(32.W)) + val lsu_raw_fwd_lo_r = WireInit(0.U(1.W)) + val lsu_raw_fwd_hi_r = WireInit(0.U(1.W)) + + val lsu_lsc_ctl = Module(new el2_lsu_lsc_ctl ) + val dccm_ctl = Module(new el2_lsu_dccm_ctl ) + val stbuf = Module(new el2_lsu_stbuf ) + val ecc = Module(new el2_lsu_ecc ) + val trigger = Module(new el2_lsu_trigger ) + val clkdomain = Module(new el2_lsu_clkdomain ) + val bus_intf = Module(new el2_lsu_bus_intf ) + + val lsu_raw_fwd_lo_m = stbuf.io.stbuf_fwdbyteen_lo_m.orR + val lsu_raw_fwd_hi_m = stbuf.io.stbuf_fwdbyteen_hi_m.orR + + // block stores in decode - for either bus or stbuf reasons + io.lsu_store_stall_any := stbuf.io.lsu_stbuf_full_any | bus_intf.io.lsu_bus_buffer_full_any | dccm_ctl.io.ld_single_ecc_error_r_ff + io.lsu_load_stall_any := bus_intf.io.lsu_bus_buffer_full_any | dccm_ctl.io.ld_single_ecc_error_r_ff + io.lsu_fastint_stall_any := dccm_ctl.io.ld_single_ecc_error_r // Stall the fastint in decode-1 stage + + // Ready to accept dma trxns + // There can't be any inpipe forwarding from non-dma packet to dma packet since they can be flushed so we can't have st in r when dma is in m + val dma_mem_tag_d = io.dma_mem_tag + val ldst_nodma_mtor = lsu_lsc_ctl.io.lsu_pkt_m.valid & !lsu_lsc_ctl.io.lsu_pkt_m.dma & (lsu_lsc_ctl.io.addr_in_dccm_m | lsu_lsc_ctl.io.addr_in_pic_m) & lsu_lsc_ctl.io.lsu_pkt_m.store + io.dccm_ready := !(io.dec_lsu_valid_raw_d | ldst_nodma_mtor | dccm_ctl.io.ld_single_ecc_error_r_ff) + val dma_dccm_wen = io.dma_dccm_req & io.dma_mem_write & lsu_lsc_ctl.io.addr_in_dccm_d + val dma_pic_wen = io.dma_dccm_req & io.dma_mem_write & lsu_lsc_ctl.io.addr_in_pic_d + dma_dccm_wdata := io.dma_mem_wdata >> Cat(io.dma_mem_addr(2,0), 0.U(3.W)) // Shift the dma data to lower bits to make it consistent to lsu stores + dma_dccm_wdata_hi := dma_dccm_wdata(63,32) + dma_dccm_wdata_lo := dma_dccm_wdata(31,0) + + val flush_m_up = io.dec_tlu_flush_lower_r + val flush_r = io.dec_tlu_i0_kill_writeb_r + + // lsu halt idle. This is used for entering the halt mode. Also, DMA accesses are allowed during fence. + // Indicates non-idle if there is a instruction valid in d-r or read/write buffers are non-empty since they can come with error + // Store buffer now have only non-dma dccm stores + // stbuf_empty not needed since it has only dccm stores + io.lsu_idle_any := !((lsu_lsc_ctl.io.lsu_pkt_m.valid & !lsu_lsc_ctl.io.lsu_pkt_m.dma) | (lsu_lsc_ctl.io.lsu_pkt_r.valid & !lsu_lsc_ctl.io.lsu_pkt_r.dma)) & bus_intf.io.lsu_bus_buffer_empty_any & bus_intf.io.lsu_bus_idle_any + // Instantiate the store buffer + val store_stbuf_reqvld_r = lsu_lsc_ctl.io.lsu_pkt_r.valid & lsu_lsc_ctl.io.lsu_pkt_r.store & lsu_lsc_ctl.io.addr_in_dccm_r & !flush_r & !lsu_lsc_ctl.io.lsu_pkt_r.dma + // Disable Forwarding for now + val lsu_cmpen_m = lsu_lsc_ctl.io.lsu_pkt_m.valid & (lsu_lsc_ctl.io.lsu_pkt_m.load | lsu_lsc_ctl.io.lsu_pkt_m.store) & (lsu_lsc_ctl.io.addr_in_dccm_m | lsu_lsc_ctl.io.addr_in_pic_m) + // Bus signals + val lsu_busreq_m = lsu_lsc_ctl.io.lsu_pkt_m.valid & ((lsu_lsc_ctl.io.lsu_pkt_m.load | lsu_lsc_ctl.io.lsu_pkt_m.store) & lsu_lsc_ctl.io.addr_external_m) & !flush_m_up & !lsu_lsc_ctl.io.lsu_exc_m & !lsu_lsc_ctl.io.lsu_pkt_m.fast_int + // PMU signals + io.lsu_pmu_misaligned_m := lsu_lsc_ctl.io.lsu_pkt_m.valid & ((lsu_lsc_ctl.io.lsu_pkt_m.half & lsu_lsc_ctl.io.lsu_addr_m(0)) | (lsu_lsc_ctl.io.lsu_pkt_m.word & lsu_lsc_ctl.io.lsu_addr_m(1,0).orR)) + io.lsu_pmu_load_external_m := lsu_lsc_ctl.io.lsu_pkt_m.valid & lsu_lsc_ctl.io.lsu_pkt_m.load & lsu_lsc_ctl.io.addr_external_m + io.lsu_pmu_store_external_m := lsu_lsc_ctl.io.lsu_pkt_m.valid & lsu_lsc_ctl.io.lsu_pkt_m.store & lsu_lsc_ctl.io.addr_external_m + + //LSU_LSC_Control + //Inputs + lsu_lsc_ctl.io.lsu_c1_m_clk := clkdomain.io.lsu_c1_m_clk + lsu_lsc_ctl.io.lsu_c1_r_clk := clkdomain.io.lsu_c1_r_clk + lsu_lsc_ctl.io.lsu_c2_m_clk := clkdomain.io.lsu_c2_m_clk + lsu_lsc_ctl.io.lsu_c2_r_clk := clkdomain.io.lsu_c2_r_clk + lsu_lsc_ctl.io.lsu_store_c1_m_clk := clkdomain.io.lsu_store_c1_m_clk + lsu_lsc_ctl.io.lsu_ld_data_r := dccm_ctl.io.lsu_ld_data_r + lsu_lsc_ctl.io.lsu_ld_data_corr_r := dccm_ctl.io.lsu_ld_data_corr_r + lsu_lsc_ctl.io.lsu_single_ecc_error_r := ecc.io.lsu_single_ecc_error_r + lsu_lsc_ctl.io.lsu_double_ecc_error_r := ecc.io.lsu_double_ecc_error_r + lsu_lsc_ctl.io.lsu_ld_data_m := dccm_ctl.io.lsu_ld_data_m + lsu_lsc_ctl.io.lsu_single_ecc_error_m := ecc.io.lsu_single_ecc_error_m + lsu_lsc_ctl.io.lsu_double_ecc_error_m := ecc.io.lsu_double_ecc_error_m + lsu_lsc_ctl.io.flush_m_up := flush_m_up + lsu_lsc_ctl.io.flush_r := flush_r + lsu_lsc_ctl.io.exu_lsu_rs1_d := io.exu_lsu_rs1_d + lsu_lsc_ctl.io.exu_lsu_rs2_d := io.exu_lsu_rs2_d + lsu_lsc_ctl.io.lsu_p := io.lsu_p + lsu_lsc_ctl.io.dec_lsu_valid_raw_d := io.dec_lsu_valid_raw_d + lsu_lsc_ctl.io.dec_lsu_offset_d := io.dec_lsu_offset_d + lsu_lsc_ctl.io.picm_mask_data_m := dccm_ctl.io.picm_mask_data_m + lsu_lsc_ctl.io.bus_read_data_m := bus_intf.io.bus_read_data_m + lsu_lsc_ctl.io.dma_dccm_req := io.dma_dccm_req + lsu_lsc_ctl.io.dma_mem_addr := io.dma_mem_addr + lsu_lsc_ctl.io.dma_mem_sz := io.dma_mem_sz + lsu_lsc_ctl.io.dma_mem_write := io.dma_mem_write + lsu_lsc_ctl.io.dma_mem_wdata := io.dma_mem_wdata + lsu_lsc_ctl.io.dec_tlu_mrac_ff := io.dec_tlu_mrac_ff + lsu_lsc_ctl.io.scan_mode := io.scan_mode + //Outputs + + io.lsu_single_ecc_error_incr := lsu_lsc_ctl.io.lsu_single_ecc_error_incr + io.lsu_error_pkt_r := lsu_lsc_ctl.io.lsu_error_pkt_r + io.lsu_fir_addr := lsu_lsc_ctl.io.lsu_fir_addr + io.lsu_fir_error := lsu_lsc_ctl.io.lsu_fir_error + // DCCM Control + //Inputs + dccm_ctl.io.lsu_c2_m_clk := clkdomain.io.lsu_c2_m_clk + dccm_ctl.io.lsu_c2_r_clk := clkdomain.io.lsu_c2_m_clk + dccm_ctl.io.lsu_free_c2_clk := clkdomain.io.lsu_c2_r_clk + dccm_ctl.io.lsu_c1_r_clk := clkdomain.io.lsu_free_c2_clk + dccm_ctl.io.lsu_store_c1_r_clk := clkdomain.io.lsu_c1_r_clk + //dccm_ctl.io.clk := clock + dccm_ctl.io.lsu_pkt_d := lsu_lsc_ctl.io.lsu_pkt_d + dccm_ctl.io.lsu_pkt_m := lsu_lsc_ctl.io.lsu_pkt_m + dccm_ctl.io.lsu_pkt_r := lsu_lsc_ctl.io.lsu_pkt_r + dccm_ctl.io.addr_in_dccm_d := lsu_lsc_ctl.io.addr_in_dccm_d + dccm_ctl.io.addr_in_dccm_m := lsu_lsc_ctl.io.addr_in_dccm_m + dccm_ctl.io.addr_in_dccm_r := lsu_lsc_ctl.io.addr_in_dccm_r + dccm_ctl.io.addr_in_pic_d := lsu_lsc_ctl.io.addr_in_pic_d + dccm_ctl.io.addr_in_pic_m := lsu_lsc_ctl.io.addr_in_pic_m + dccm_ctl.io.addr_in_pic_r := lsu_lsc_ctl.io.addr_in_pic_r + dccm_ctl.io.lsu_raw_fwd_lo_r := lsu_raw_fwd_lo_r + dccm_ctl.io.lsu_raw_fwd_hi_r := lsu_raw_fwd_hi_r + dccm_ctl.io.lsu_commit_r := lsu_lsc_ctl.io.lsu_commit_r + dccm_ctl.io.lsu_addr_d := lsu_lsc_ctl.io.lsu_addr_d + dccm_ctl.io.lsu_addr_m := lsu_lsc_ctl.io.lsu_addr_m + dccm_ctl.io.lsu_addr_r := lsu_lsc_ctl.io.lsu_addr_r + dccm_ctl.io.end_addr_d := lsu_lsc_ctl.io.end_addr_d + dccm_ctl.io.end_addr_m := lsu_lsc_ctl.io.end_addr_m + dccm_ctl.io.end_addr_r := lsu_lsc_ctl.io.end_addr_r + dccm_ctl.io.stbuf_reqvld_any := stbuf.io.stbuf_reqvld_any + dccm_ctl.io.stbuf_addr_any := stbuf.io.stbuf_addr_any + dccm_ctl.io.stbuf_data_any := stbuf.io.stbuf_data_any + dccm_ctl.io.stbuf_ecc_any := ecc.io.stbuf_ecc_any + dccm_ctl.io.stbuf_fwddata_hi_m := stbuf.io.stbuf_fwddata_hi_m + dccm_ctl.io.stbuf_fwddata_lo_m := stbuf.io.stbuf_fwddata_lo_m + dccm_ctl.io.stbuf_fwdbyteen_lo_m := stbuf.io.stbuf_fwdbyteen_lo_m + dccm_ctl.io.stbuf_fwdbyteen_hi_m := stbuf.io.stbuf_fwdbyteen_hi_m + dccm_ctl.io.lsu_double_ecc_error_r := ecc.io.lsu_double_ecc_error_r + dccm_ctl.io.single_ecc_error_hi_r := ecc.io.single_ecc_error_hi_r + dccm_ctl.io.single_ecc_error_lo_r := ecc.io.single_ecc_error_lo_r + dccm_ctl.io.sec_data_hi_r := ecc.io.sec_data_hi_r + dccm_ctl.io.sec_data_lo_r := ecc.io.sec_data_lo_r + dccm_ctl.io.sec_data_hi_r_ff := ecc.io.sec_data_hi_r_ff + dccm_ctl.io.sec_data_lo_r_ff := ecc.io.sec_data_lo_r_ff + dccm_ctl.io.sec_data_ecc_hi_r_ff := ecc.io.sec_data_ecc_hi_r_ff + dccm_ctl.io.sec_data_ecc_lo_r_ff := ecc.io.sec_data_ecc_lo_r_ff + dccm_ctl.io.lsu_double_ecc_error_m := ecc.io.lsu_double_ecc_error_m + dccm_ctl.io.sec_data_hi_m := ecc.io.sec_data_hi_m + dccm_ctl.io.sec_data_lo_m := ecc.io.sec_data_lo_m + dccm_ctl.io.store_data_m := lsu_lsc_ctl.io.store_data_m + dccm_ctl.io.dma_dccm_wen := dma_dccm_wen + dccm_ctl.io.dma_pic_wen := dma_pic_wen + dccm_ctl.io.dma_mem_tag_m := dma_mem_tag_m + dccm_ctl.io.dma_mem_addr := io.dma_mem_addr + dccm_ctl.io.dma_mem_wdata := io.dma_mem_wdata + dccm_ctl.io.dma_dccm_wdata_lo := dma_dccm_wdata_lo + dccm_ctl.io.dma_dccm_wdata_hi := dma_dccm_wdata_hi + dccm_ctl.io.dma_dccm_wdata_ecc_hi := ecc.io.dma_dccm_wdata_ecc_hi + dccm_ctl.io.dma_dccm_wdata_ecc_lo := ecc.io.dma_dccm_wdata_ecc_lo + dccm_ctl.io.dccm_rd_data_lo := io.dccm_rd_data_lo + dccm_ctl.io.dccm_rd_data_hi := io.dccm_rd_data_hi + dccm_ctl.io.picm_rd_data := io.picm_rd_data + dccm_ctl.io.scan_mode := io.scan_mode + //Outputs + io.dccm_dma_rvalid := dccm_ctl.io.dccm_dma_rvalid + io.dccm_dma_ecc_error := dccm_ctl.io.dccm_dma_ecc_error + io.dccm_dma_rtag := dccm_ctl.io.dccm_dma_rtag + io.dccm_dma_rdata := dccm_ctl.io.dccm_dma_rdata + io.dccm_wren := dccm_ctl.io.dccm_wren + io.dccm_rden := dccm_ctl.io.dccm_rden + io.dccm_wr_addr_lo := dccm_ctl.io.dccm_wr_addr_lo + io.dccm_wr_data_lo := dccm_ctl.io.dccm_wr_data_lo + io.dccm_rd_addr_lo := dccm_ctl.io.dccm_rd_addr_lo + io.dccm_wr_addr_hi := dccm_ctl.io.dccm_wr_addr_hi + io.dccm_wr_data_hi := dccm_ctl.io.dccm_wr_data_hi + io.dccm_rd_addr_hi := dccm_ctl.io.dccm_rd_addr_hi + io.picm_wren := dccm_ctl.io.picm_wren + io.picm_rden := dccm_ctl.io.picm_rden + io.picm_mken := dccm_ctl.io.picm_mken + io.picm_rdaddr := dccm_ctl.io.picm_rdaddr + io.picm_wraddr := dccm_ctl.io.picm_wraddr + io.picm_wr_data := dccm_ctl.io.picm_wr_data + //Store Buffer + //Inputs + stbuf.io.lsu_c1_m_clk := clkdomain.io.lsu_c1_m_clk + stbuf.io.lsu_c1_r_clk := clkdomain.io.lsu_c1_m_clk + stbuf.io.lsu_stbuf_c1_clk := clkdomain.io.lsu_stbuf_c1_clk + stbuf.io.lsu_free_c2_clk := clkdomain.io.lsu_free_c2_clk + stbuf.io.lsu_pkt_m := lsu_lsc_ctl.io.lsu_pkt_m + stbuf.io.lsu_pkt_r := lsu_lsc_ctl.io.lsu_pkt_r + stbuf.io.store_stbuf_reqvld_r := store_stbuf_reqvld_r + stbuf.io.lsu_commit_r := lsu_lsc_ctl.io.lsu_commit_r + stbuf.io.dec_lsu_valid_raw_d := io.dec_lsu_valid_raw_d + stbuf.io.store_data_hi_r := dccm_ctl.io.store_data_hi_r + stbuf.io.store_data_lo_r := dccm_ctl.io.store_data_lo_r + stbuf.io.store_datafn_hi_r := dccm_ctl.io.store_datafn_hi_r + stbuf.io.store_datafn_lo_r := dccm_ctl.io.store_datafn_lo_r + stbuf.io.lsu_stbuf_commit_any := dccm_ctl.io.lsu_stbuf_commit_any + stbuf.io.lsu_addr_d := lsu_lsc_ctl.io.lsu_addr_d + stbuf.io.lsu_addr_m := lsu_lsc_ctl.io.lsu_addr_m + stbuf.io.lsu_addr_r := lsu_lsc_ctl.io.lsu_addr_r + stbuf.io.end_addr_d := lsu_lsc_ctl.io.end_addr_d + stbuf.io.end_addr_m := lsu_lsc_ctl.io.end_addr_m + stbuf.io.end_addr_r := lsu_lsc_ctl.io.end_addr_r + stbuf.io.addr_in_dccm_m := lsu_lsc_ctl.io.addr_in_dccm_m + stbuf.io.addr_in_dccm_r := lsu_lsc_ctl.io.addr_in_dccm_r + stbuf.io.lsu_cmpen_m := lsu_cmpen_m + stbuf.io.scan_mode := io.scan_mode + + // ECC + //Inputs + ecc.io.lsu_c2_r_clk := clkdomain.io.lsu_c2_r_clk + ecc.io.lsu_pkt_m := lsu_lsc_ctl.io.lsu_pkt_m + ecc.io.lsu_pkt_r := lsu_lsc_ctl.io.lsu_pkt_r + ecc.io.stbuf_data_any := stbuf.io.stbuf_data_any + ecc.io.dec_tlu_core_ecc_disable := io.dec_tlu_core_ecc_disable + ecc.io.lsu_dccm_rden_r := dccm_ctl.io.lsu_dccm_rden_r + ecc.io.addr_in_dccm_r := lsu_lsc_ctl.io.addr_in_dccm_r + ecc.io.lsu_addr_r := lsu_lsc_ctl.io.lsu_addr_r + ecc.io.end_addr_r := lsu_lsc_ctl.io.end_addr_r + ecc.io.lsu_addr_m := lsu_lsc_ctl.io.lsu_addr_m + ecc.io.end_addr_m := lsu_lsc_ctl.io.end_addr_m + ecc.io.dccm_rdata_hi_r := dccm_ctl.io.dccm_rdata_hi_r + ecc.io.dccm_rdata_lo_r := dccm_ctl.io.dccm_rdata_lo_r + ecc.io.dccm_rdata_hi_m := dccm_ctl.io.dccm_rdata_hi_m + ecc.io.dccm_rdata_lo_m := dccm_ctl.io.dccm_rdata_lo_m + ecc.io.dccm_data_ecc_hi_r := dccm_ctl.io.dccm_data_ecc_hi_r + ecc.io.dccm_data_ecc_lo_r := dccm_ctl.io.dccm_data_ecc_lo_r + ecc.io.dccm_data_ecc_hi_m := dccm_ctl.io.dccm_data_ecc_hi_m + ecc.io.dccm_data_ecc_lo_m := dccm_ctl.io.dccm_data_ecc_lo_m + ecc.io.ld_single_ecc_error_r := dccm_ctl.io.ld_single_ecc_error_r + ecc.io.ld_single_ecc_error_r_ff := dccm_ctl.io.ld_single_ecc_error_r_ff + ecc.io.lsu_dccm_rden_m := dccm_ctl.io.lsu_dccm_rden_m + ecc.io.addr_in_dccm_m := lsu_lsc_ctl.io.addr_in_dccm_m + ecc.io.dma_dccm_wen := dma_dccm_wen + ecc.io.dma_dccm_wdata_lo := dma_dccm_wdata_lo + ecc.io.dma_dccm_wdata_hi := dma_dccm_wdata_hi + ecc.io.scan_mode := io.scan_mode + + //Trigger + //Inputs + trigger.io.trigger_pkt_any := io.trigger_pkt_any + trigger.io.lsu_pkt_m := lsu_lsc_ctl.io.lsu_pkt_m + trigger.io.lsu_addr_m := lsu_lsc_ctl.io.lsu_addr_m + trigger.io.store_data_m := lsu_lsc_ctl.io.store_data_m + //Outputs + io.lsu_trigger_match_m :=trigger.io.lsu_trigger_match_m + + //Clock Domain + //Inputs + clkdomain.io.free_clk := io.free_clk + clkdomain.io.clk_override := io.clk_override + clkdomain.io.addr_in_dccm_m := lsu_lsc_ctl.io.addr_in_dccm_m + clkdomain.io.dma_dccm_req := io.dma_dccm_req + clkdomain.io.ldst_stbuf_reqvld_r := stbuf.io.ldst_stbuf_reqvld_r + clkdomain.io.stbuf_reqvld_any := stbuf.io.stbuf_reqvld_any + clkdomain.io.stbuf_reqvld_flushed_any := stbuf.io.stbuf_reqvld_flushed_any + clkdomain.io.lsu_busreq_r := bus_intf.io.lsu_busreq_r + clkdomain.io.lsu_bus_buffer_pend_any := bus_intf.io.lsu_bus_buffer_pend_any + clkdomain.io.lsu_bus_buffer_empty_any := bus_intf.io.lsu_bus_buffer_empty_any + clkdomain.io.lsu_stbuf_empty_any := stbuf.io.lsu_stbuf_empty_any + clkdomain.io.lsu_bus_clk_en := io.lsu_bus_clk_en + clkdomain.io.lsu_p := io.lsu_p + clkdomain.io.lsu_pkt_d := lsu_lsc_ctl.io.lsu_pkt_d + clkdomain.io.lsu_pkt_m := lsu_lsc_ctl.io.lsu_pkt_m + clkdomain.io.lsu_pkt_r := lsu_lsc_ctl.io.lsu_pkt_r + clkdomain.io.scan_mode := io.scan_mode + + //Bus Interface + //Inputs + bus_intf.io.scan_mode := io.scan_mode + bus_intf.io.dec_tlu_external_ldfwd_disable := io.dec_tlu_external_ldfwd_disable + bus_intf.io.dec_tlu_wb_coalescing_disable := io.dec_tlu_wb_coalescing_disable + bus_intf.io.dec_tlu_sideeffect_posted_disable := io.dec_tlu_sideeffect_posted_disable + bus_intf.io.lsu_c1_m_clk := clkdomain.io.lsu_c1_m_clk + bus_intf.io.lsu_c1_r_clk := clkdomain.io.lsu_c1_r_clk + bus_intf.io.lsu_c2_r_clk := clkdomain.io.lsu_c2_r_clk + bus_intf.io.lsu_bus_ibuf_c1_clk := clkdomain.io.lsu_bus_ibuf_c1_clk + bus_intf.io.lsu_bus_obuf_c1_clk := clkdomain.io.lsu_bus_obuf_c1_clk + bus_intf.io.lsu_bus_buf_c1_clk := clkdomain.io.lsu_bus_buf_c1_clk + bus_intf.io.lsu_free_c2_clk := clkdomain.io.lsu_free_c2_clk + bus_intf.io.free_clk := io.free_clk + bus_intf.io.lsu_busm_clk := clkdomain.io.lsu_busm_clk + bus_intf.io.dec_lsu_valid_raw_d := io.dec_lsu_valid_raw_d + bus_intf.io.lsu_busreq_m := lsu_busreq_m + bus_intf.io.lsu_addr_d := lsu_lsc_ctl.io.lsu_addr_d + bus_intf.io.lsu_addr_m := lsu_lsc_ctl.io.lsu_addr_m + bus_intf.io.lsu_addr_r := lsu_lsc_ctl.io.lsu_addr_r + bus_intf.io.end_addr_d := lsu_lsc_ctl.io.end_addr_d + bus_intf.io.end_addr_m := lsu_lsc_ctl.io.end_addr_m + bus_intf.io.end_addr_r := lsu_lsc_ctl.io.end_addr_r +// bus_intf.io.store_data_m := lsu_lsc_ctl.io.store_data_m + bus_intf.io.dec_tlu_force_halt := io.dec_tlu_force_halt + bus_intf.io.lsu_commit_r := lsu_lsc_ctl.io.lsu_commit_r + bus_intf.io.is_sideeffects_m := lsu_lsc_ctl.io.is_sideeffects_m + bus_intf.io.flush_m_up := flush_m_up + bus_intf.io.flush_r := flush_r + //Outputs + + io.lsu_imprecise_error_load_any := bus_intf.io.lsu_imprecise_error_load_any + io.lsu_imprecise_error_store_any := bus_intf.io.lsu_imprecise_error_store_any + io.lsu_imprecise_error_addr_any := bus_intf.io.lsu_imprecise_error_addr_any + io.lsu_nonblock_load_valid_m := bus_intf.io.lsu_nonblock_load_valid_m + io.lsu_nonblock_load_tag_m := bus_intf.io.lsu_nonblock_load_tag_m + io.lsu_nonblock_load_inv_r := bus_intf.io.lsu_nonblock_load_inv_r + io.lsu_nonblock_load_inv_tag_r := bus_intf.io.lsu_nonblock_load_inv_tag_r + io.lsu_nonblock_load_data_valid := bus_intf.io.lsu_nonblock_load_data_valid + io.lsu_nonblock_load_data_error := bus_intf.io.lsu_nonblock_load_data_error + io.lsu_nonblock_load_data_tag := bus_intf.io.lsu_nonblock_load_data_tag + io.lsu_nonblock_load_data := bus_intf.io.lsu_nonblock_load_data + io.lsu_pmu_bus_trxn := bus_intf.io.lsu_pmu_bus_trxn + io.lsu_pmu_bus_misaligned := bus_intf.io.lsu_pmu_bus_misaligned + io.lsu_pmu_bus_error := bus_intf.io.lsu_pmu_bus_error + io.lsu_pmu_bus_busy := bus_intf.io.lsu_pmu_bus_busy + io.lsu_axi_awvalid := bus_intf.io.lsu_axi_awvalid + bus_intf.io.lsu_axi_awready := io.lsu_axi_awready + io.lsu_axi_awid := bus_intf.io.lsu_axi_awid + io.lsu_axi_awaddr := bus_intf.io.lsu_axi_awaddr + io.lsu_axi_awregion := bus_intf.io.lsu_axi_awregion + io.lsu_axi_awlen := bus_intf.io.lsu_axi_awlen + io.lsu_axi_awsize := bus_intf.io.lsu_axi_awsize + io.lsu_axi_awburst := bus_intf.io.lsu_axi_awburst + io.lsu_axi_awlock := bus_intf.io.lsu_axi_awlock + io.lsu_axi_awcache := bus_intf.io.lsu_axi_awcache + io.lsu_axi_awprot := bus_intf.io.lsu_axi_awprot + io.lsu_axi_awqos := bus_intf.io.lsu_axi_awqos + io.lsu_axi_wvalid := bus_intf.io.lsu_axi_wvalid + bus_intf.io.lsu_axi_wready := io.lsu_axi_wready + io.lsu_axi_wdata := bus_intf.io.lsu_axi_wdata + io.lsu_axi_wstrb := bus_intf.io.lsu_axi_wstrb + io.lsu_axi_wlast := bus_intf.io.lsu_axi_wlast + bus_intf.io.lsu_axi_bvalid := io.lsu_axi_bvalid + io.lsu_axi_bready := bus_intf.io.lsu_axi_bready + bus_intf.io.lsu_axi_bresp := io.lsu_axi_bresp + bus_intf.io.lsu_axi_bid := io.lsu_axi_bid + io.lsu_axi_arvalid := bus_intf.io.lsu_axi_arvalid + bus_intf.io.lsu_axi_arready := io.lsu_axi_arready + io.lsu_axi_arid := bus_intf.io.lsu_axi_arid + io.lsu_axi_araddr := bus_intf.io.lsu_axi_araddr + io.lsu_axi_arregion := bus_intf.io.lsu_axi_arregion + io.lsu_axi_arlen := bus_intf.io.lsu_axi_arlen + io.lsu_axi_arsize := bus_intf.io.lsu_axi_arsize + io.lsu_axi_arburst := bus_intf.io.lsu_axi_arburst + io.lsu_axi_arlock := bus_intf.io.lsu_axi_arlock + io.lsu_axi_arcache := bus_intf.io.lsu_axi_arcache + io.lsu_axi_arprot := bus_intf.io.lsu_axi_arprot + io.lsu_axi_arqos := bus_intf.io.lsu_axi_arqos + bus_intf.io.lsu_axi_rvalid := io.lsu_axi_rvalid + io.lsu_axi_rready := bus_intf.io.lsu_axi_rready + bus_intf.io.lsu_axi_rid := io.lsu_axi_rid + bus_intf.io.lsu_axi_rdata := io.lsu_axi_rdata + bus_intf.io.lsu_axi_rresp := io.lsu_axi_rresp + bus_intf.io.lsu_axi_rlast := io.lsu_axi_rlast + bus_intf.io.lsu_bus_clk_en := io.lsu_bus_clk_en + + withClock(clkdomain.io.lsu_c1_m_clk){dma_mem_tag_m := RegNext(dma_mem_tag_d,0.U)} + withClock(clkdomain.io.lsu_c2_r_clk){lsu_raw_fwd_hi_r := RegNext(lsu_raw_fwd_hi_m,0.U)} + withClock(clkdomain.io.lsu_c2_r_clk){lsu_raw_fwd_lo_r := RegNext(lsu_raw_fwd_lo_m,0.U)} } +object main_lsu_top extends App{ + println("Generate Verilog") + println((new chisel3.stage.ChiselStage).emitVerilog(new el2_lsu)) +} diff --git a/src/main/scala/lsu/el2_lsu_addrcheck.scala b/src/main/scala/lsu/el2_lsu_addrcheck.scala new file mode 100644 index 00000000..e5a771b7 --- /dev/null +++ b/src/main/scala/lsu/el2_lsu_addrcheck.scala @@ -0,0 +1,163 @@ +package lsu + +import include._ +import lib._ +import snapshot._ + +import chisel3._ +import chisel3.util._ +import chisel3.iotesters.{ChiselFlatSpec, Driver, PeekPokeTester} +import chisel3.experimental.ChiselEnum +import chisel3.experimental.{withClock, withReset, withClockAndReset} +import chisel3.experimental.BundleLiterals._ +import chisel3.tester._ +import chisel3.tester.RawTester.test +import chisel3.util.HasBlackBoxResource +import chisel3.experimental.chiselName +@chiselName +class el2_lsu_addrcheck extends Module with RequireAsyncReset +{val io = IO(new Bundle{ + val lsu_c2_m_clk = Input(Clock()) + + val start_addr_d = Input(UInt(32.W)) + val end_addr_d = Input(UInt(32.W)) + val lsu_pkt_d = Input(new el2_lsu_pkt_t) + val dec_tlu_mrac_ff = Input(UInt(32.W)) + val rs1_region_d = Input(UInt(4.W)) + val rs1_d = Input(UInt(32.W)) + + + val is_sideeffects_m = Output(UInt(1.W)) + val addr_in_dccm_d = Output(UInt(1.W)) + val addr_in_pic_d = Output(UInt(1.W)) + val addr_external_d = Output(UInt(1.W)) + val access_fault_d = Output(UInt(1.W)) + val misaligned_fault_d = Output(UInt(1.W)) + val exc_mscause_d = Output(UInt(4.W)) + val fir_dccm_access_error_d = Output(UInt(1.W)) + val fir_nondccm_access_error_d = Output(UInt(1.W)) + val scan_mode = Input(UInt(1.W))}) + + val start_addr_in_dccm_d = WireInit(0.U(1.W)) + val start_addr_in_dccm_region_d = WireInit(0.U(1.W)) + val end_addr_in_dccm_d = WireInit(0.U(1.W)) + val end_addr_in_dccm_region_d = WireInit(0.U(1.W)) + + //DCCM check + // Start address check + if(pt1.DCCM_ENABLE==1){ // Gen_dccm_enable + val start_addr_dccm_rangecheck = Module(new rvrangecheck_ch(pt.DCCM_SADR,pt1.DCCM_SIZE)) + start_addr_dccm_rangecheck.io.addr := io.start_addr_d + start_addr_in_dccm_d := start_addr_dccm_rangecheck.io.in_range + start_addr_in_dccm_region_d := start_addr_dccm_rangecheck.io.in_region + + // End address check + val end_addr_dccm_rangecheck = Module(new rvrangecheck_ch(pt.DCCM_SADR,pt1.DCCM_SIZE)) + end_addr_dccm_rangecheck.io.addr := io.end_addr_d + end_addr_in_dccm_d := end_addr_dccm_rangecheck.io.in_range + end_addr_in_dccm_region_d := end_addr_dccm_rangecheck.io.in_region + } + else{ //Gen_dccm_disable + start_addr_in_dccm_d := 0.U + start_addr_in_dccm_region_d := 0.U + end_addr_in_dccm_d := 0.U + end_addr_in_dccm_region_d := 0.U + } + + val addr_in_iccm = WireInit(0.U(1.W)) + if(pt1.ICCM_ENABLE == 1){ //check_iccm + addr_in_iccm := (io.start_addr_d(31,28) === pt.ICCM_REGION) + } + else{ + addr_in_iccm := 1.U + } + + + //PIC memory check + //start address check + val start_addr_pic_rangecheck = Module(new rvrangecheck_ch(pt.PIC_BASE_ADDR,pt1.PIC_SIZE)) + start_addr_pic_rangecheck.io.addr := io.start_addr_d(31,0) + val start_addr_in_pic_d = start_addr_pic_rangecheck.io.in_range + val start_addr_in_pic_region_d = start_addr_pic_rangecheck.io.in_region + + //End address check + val end_addr_pic_rangecheck = Module(new rvrangecheck_ch(pt.PIC_BASE_ADDR,pt1.PIC_SIZE)) + end_addr_pic_rangecheck.io.addr := io.end_addr_d(31,0) + val end_addr_in_pic_d = end_addr_pic_rangecheck.io.in_range + val end_addr_in_pic_region_d = end_addr_pic_rangecheck.io.in_region + + val start_addr_dccm_or_pic = start_addr_in_dccm_region_d | start_addr_in_pic_region_d + val base_reg_dccm_or_pic = (io.rs1_region_d(3,0) === pt.DCCM_REGION) | (io.rs1_region_d(3,0) === pt.PIC_REGION) //base region + io.addr_in_dccm_d := (start_addr_in_dccm_d & end_addr_in_dccm_d) + io.addr_in_pic_d := (start_addr_in_pic_d & end_addr_in_pic_d) + + io.addr_external_d := ~(start_addr_in_dccm_region_d | start_addr_in_pic_region_d); //if start address does not belong to dccm/pic + val csr_idx = Cat(io.start_addr_d(31,28),1.U) + val is_sideeffects_d = io.dec_tlu_mrac_ff(csr_idx) & ~(start_addr_in_dccm_region_d | start_addr_in_pic_region_d | addr_in_iccm) & io.lsu_pkt_d.valid & (io.lsu_pkt_d.store | io.lsu_pkt_d.load) //every region has the 2 LSB indicating ( 1: sideeffects/no_side effects, and 0: cacheable ). Ignored in internal regions + val is_aligned_d = (io.lsu_pkt_d.word & (io.start_addr_d(1,0) === 0.U)) | (io.lsu_pkt_d.half & (io.start_addr_d(0) === 0.U)) | io.lsu_pkt_d.by + + + val non_dccm_access_ok = (~(Cat(pt.DATA_ACCESS_ENABLE0,pt.DATA_ACCESS_ENABLE1,pt.DATA_ACCESS_ENABLE2,pt.DATA_ACCESS_ENABLE3, + pt.DATA_ACCESS_ENABLE4,pt.DATA_ACCESS_ENABLE5,pt.DATA_ACCESS_ENABLE6,pt.DATA_ACCESS_ENABLE7)).orR) | + (((pt.DATA_ACCESS_ENABLE0 & ((io.start_addr_d(31,0) | pt.DATA_ACCESS_MASK0)) === (pt.DATA_ACCESS_ADDR0 | pt.DATA_ACCESS_MASK0)) | //0111 + (pt.DATA_ACCESS_ENABLE1 & ((io.start_addr_d(31,0) | pt.DATA_ACCESS_MASK1)) === (pt.DATA_ACCESS_ADDR1 | pt.DATA_ACCESS_MASK1)) | //1111 + (pt.DATA_ACCESS_ENABLE2 & ((io.start_addr_d(31,0) | pt.DATA_ACCESS_MASK2)) === (pt.DATA_ACCESS_ADDR2 | pt.DATA_ACCESS_MASK2)) | //1011 + (pt.DATA_ACCESS_ENABLE3 & ((io.start_addr_d(31,0) | pt.DATA_ACCESS_MASK3)) === (pt.DATA_ACCESS_ADDR3 | pt.DATA_ACCESS_MASK3)) | //1000 + (pt.DATA_ACCESS_ENABLE4 & ((io.start_addr_d(31,0) | pt.DATA_ACCESS_MASK4)) === (pt.DATA_ACCESS_ADDR4 | pt.DATA_ACCESS_MASK4)) | + (pt.DATA_ACCESS_ENABLE5 & ((io.start_addr_d(31,0) | pt.DATA_ACCESS_MASK5)) === (pt.DATA_ACCESS_ADDR5 | pt.DATA_ACCESS_MASK5)) | + (pt.DATA_ACCESS_ENABLE6 & ((io.start_addr_d(31,0) | pt.DATA_ACCESS_MASK6)) === (pt.DATA_ACCESS_ADDR6 | pt.DATA_ACCESS_MASK6)) | + (pt.DATA_ACCESS_ENABLE7 & ((io.start_addr_d(31,0) | pt.DATA_ACCESS_MASK7)) === (pt.DATA_ACCESS_ADDR7 | pt.DATA_ACCESS_MASK7))) + & + ((pt.DATA_ACCESS_ENABLE0 & ((io.end_addr_d(31,0) | pt.DATA_ACCESS_MASK0)) === (pt.DATA_ACCESS_ADDR0 | pt.DATA_ACCESS_MASK0)) | + (pt.DATA_ACCESS_ENABLE1 & ((io.end_addr_d(31,0) | pt.DATA_ACCESS_MASK1)) === (pt.DATA_ACCESS_ADDR1 | pt.DATA_ACCESS_MASK1)) | + (pt.DATA_ACCESS_ENABLE2 & ((io.end_addr_d(31,0) | pt.DATA_ACCESS_MASK2)) === (pt.DATA_ACCESS_ADDR2 | pt.DATA_ACCESS_MASK2)) | + (pt.DATA_ACCESS_ENABLE3 & ((io.end_addr_d(31,0) | pt.DATA_ACCESS_MASK3)) === (pt.DATA_ACCESS_ADDR3 | pt.DATA_ACCESS_MASK3)) | + (pt.DATA_ACCESS_ENABLE4 & ((io.end_addr_d(31,0) | pt.DATA_ACCESS_MASK4)) === (pt.DATA_ACCESS_ADDR4 | pt.DATA_ACCESS_MASK4)) | + (pt.DATA_ACCESS_ENABLE5 & ((io.end_addr_d(31,0) | pt.DATA_ACCESS_MASK5)) === (pt.DATA_ACCESS_ADDR5 | pt.DATA_ACCESS_MASK5)) | + (pt.DATA_ACCESS_ENABLE6 & ((io.end_addr_d(31,0) | pt.DATA_ACCESS_MASK6)) === (pt.DATA_ACCESS_ADDR6 | pt.DATA_ACCESS_MASK6)) | + (pt.DATA_ACCESS_ENABLE7 & ((io.end_addr_d(31,0) | pt.DATA_ACCESS_MASK7)) === (pt.DATA_ACCESS_ADDR7 | pt.DATA_ACCESS_MASK7)))) + + val regpred_access_fault_d = (start_addr_dccm_or_pic ^ base_reg_dccm_or_pic) + val picm_access_fault_d = (io.addr_in_pic_d & ((io.start_addr_d(1,0) =/= 0.U(2.W)) | ~io.lsu_pkt_d.word)) + + val unmapped_access_fault_d = WireInit(1.U(1.W)) + val mpu_access_fault_d = WireInit(1.U(1.W)) + if(pt1.DCCM_REGION == pt1.PIC_REGION){ + unmapped_access_fault_d := ((start_addr_in_dccm_region_d & ~(start_addr_in_dccm_d | start_addr_in_pic_d)) | + // 0. Addr in dccm/pic region but not in dccm/pic offset + (end_addr_in_dccm_region_d & ~(end_addr_in_dccm_d | end_addr_in_pic_d)) | + // 0. Addr in dccm/pic region but not in dccm/pic offset + (start_addr_in_dccm_d & end_addr_in_pic_d) | + // 0. DCCM -> PIC cross when DCCM/PIC in same region + (start_addr_in_pic_d & end_addr_in_dccm_d)) + // 0. DCCM -> PIC cross when DCCM/PIC in same region + mpu_access_fault_d := (~start_addr_in_dccm_region_d & ~non_dccm_access_ok) + // 3. Address is not in a populated non-dccm region + } + + else{ + unmapped_access_fault_d := ((start_addr_in_dccm_region_d & ~start_addr_in_dccm_d) | (end_addr_in_dccm_region_d & ~end_addr_in_dccm_d) | + (start_addr_in_pic_region_d & ~start_addr_in_pic_d) | (end_addr_in_pic_region_d & ~end_addr_in_pic_d)) + mpu_access_fault_d := (~start_addr_in_pic_region_d & ~start_addr_in_dccm_region_d & ~non_dccm_access_ok); + // 3. Address is not in a populated non-dccm region + } + + //check width of access_fault_mscause_d + io.access_fault_d := (unmapped_access_fault_d | mpu_access_fault_d | picm_access_fault_d | regpred_access_fault_d) & io.lsu_pkt_d.valid & ~io.lsu_pkt_d.dma + val access_fault_mscause_d = Mux(unmapped_access_fault_d.asBool,2.U(4.W), Mux(mpu_access_fault_d.asBool,3.U(4.W), Mux(regpred_access_fault_d.asBool,5.U(4.W), Mux(picm_access_fault_d.asBool,6.U(4.W),0.U(4.W))))) + val regcross_misaligned_fault_d = (io.start_addr_d(31,28) =/= io.end_addr_d(31,28)) + val sideeffect_misaligned_fault_d = (is_sideeffects_d & ~ is_aligned_d) + io.misaligned_fault_d := (regcross_misaligned_fault_d | (sideeffect_misaligned_fault_d & io.addr_external_d)) & io.lsu_pkt_d.valid & ~io.lsu_pkt_d.dma + val misaligned_fault_mscause_d = Mux(regcross_misaligned_fault_d,2.U(4.W),Mux(sideeffect_misaligned_fault_d.asBool,1.U(4.W),0.U(4.W))) + io.exc_mscause_d := Mux(io.misaligned_fault_d.asBool, misaligned_fault_mscause_d(3,0), access_fault_mscause_d(3,0)) + io.fir_dccm_access_error_d := ((start_addr_in_dccm_region_d & ~start_addr_in_dccm_d)|(end_addr_in_dccm_region_d & ~end_addr_in_dccm_d)) & io.lsu_pkt_d.valid & io.lsu_pkt_d.fast_int + io.fir_nondccm_access_error_d := ~(start_addr_in_dccm_region_d & end_addr_in_dccm_region_d) & io.lsu_pkt_d.valid & io.lsu_pkt_d.fast_int + + withClock(io.lsu_c2_m_clk){io.is_sideeffects_m := RegNext(is_sideeffects_d,0.U)} //TBD for clock and reset +} +//println(chisel3.Driver.emitVerilog(new el2_lsu_addrcheck)) + +object address_checker extends App{ + println("Generate Verilog") + chisel3.Driver.execute(args, ()=> new el2_lsu_addrcheck) +} diff --git a/src/main/scala/lsu/el2_lsu_bus_buffer.scala b/src/main/scala/lsu/el2_lsu_bus_buffer.scala new file mode 100644 index 00000000..34ee1746 --- /dev/null +++ b/src/main/scala/lsu/el2_lsu_bus_buffer.scala @@ -0,0 +1,819 @@ + +package lsu +import chisel3._ +import chisel3.util._ +import lib._ +import include._ +import snapshot._ +import chisel3.experimental.{ChiselEnum, chiselName} +import chisel3.util.ImplicitConversions.intToUInt + +object el2_lsu_bus_buffer { + object State extends ChiselEnum { + val IDLE, WAIT, CMD, RESP, DONE_PARTIAL, DONE_WAIT, DONE = Value + } +} + +@chiselName +class el2_lsu_bus_buffer extends Module with RequireAsyncReset +{ + import el2_lsu_bus_buffer.State + import el2_lsu_bus_buffer.State._ + + val io = IO (new Bundle { + //val clk = Input(Clock()) //implicit + //val rst_l = Input(1.W) //implicit reset + val scan_mode = Input(Bool()) + val dec_tlu_external_ldfwd_disable = Input(Bool()) + val dec_tlu_wb_coalescing_disable = Input(Bool()) + val dec_tlu_sideeffect_posted_disable = Input(Bool()) + val dec_tlu_force_halt = Input(Bool()) + val lsu_c2_r_clk = Input(Clock()) + val lsu_bus_ibuf_c1_clk = Input(Clock()) + val lsu_bus_obuf_c1_clk = Input(Clock()) + val lsu_bus_buf_c1_clk = Input(Clock()) + val lsu_free_c2_clk = Input(Clock()) + val lsu_busm_clk = Input(Clock()) + val dec_lsu_valid_raw_d = Input(Bool()) + val lsu_pkt_m = Input(new el2_lsu_pkt_t) + val lsu_pkt_r = Input(new el2_lsu_pkt_t) + val lsu_addr_m = Input(UInt(32.W)) + val end_addr_m = Input(UInt(32.W)) + val lsu_addr_r = Input(UInt(32.W)) + val end_addr_r = Input(UInt(32.W)) + val store_data_r = Input(UInt(32.W)) + val no_word_merge_r = Input(Bool()) + val no_dword_merge_r = Input(Bool()) + val lsu_busreq_m = Input(Bool()) + val ld_full_hit_m = Input(Bool()) + val flush_m_up = Input(Bool()) + val flush_r = Input(Bool()) + val lsu_commit_r = Input(Bool()) + val is_sideeffects_r = Input(Bool()) + val ldst_dual_d = Input(Bool()) + val ldst_dual_m = Input(Bool()) + val ldst_dual_r = Input(Bool()) + val ldst_byteen_ext_m = Input(UInt(8.W)) + val lsu_axi_awready = Input(Bool()) + val lsu_axi_wready = Input(Bool()) + val lsu_axi_bvalid = Input(Bool()) + val lsu_axi_bresp = Input(UInt(2.W)) + val lsu_axi_bid = Input(UInt(pt1.LSU_BUS_TAG.W)) + val lsu_axi_arready = Input(Bool()) + val lsu_axi_rvalid = Input(Bool()) + val lsu_axi_rid = Input(UInt(pt1.LSU_BUS_TAG.W)) + val lsu_axi_rdata = Input(UInt(64.W)) + val lsu_axi_rresp = Input(UInt(2.W)) + val lsu_bus_clk_en = Input(Bool()) + val lsu_bus_clk_en_q = Input(Bool()) + + val lsu_busreq_r = Output(Bool()) + val lsu_bus_buffer_pend_any = Output(Bool()) + val lsu_bus_buffer_full_any = Output(Bool()) + val lsu_bus_buffer_empty_any = Output(Bool()) + val lsu_bus_idle_any = Output(Bool()) + val ld_byte_hit_buf_lo = Output((UInt(4.W))) + val ld_byte_hit_buf_hi = Output((UInt(4.W))) + val ld_fwddata_buf_lo = Output((UInt(32.W))) + val ld_fwddata_buf_hi = Output((UInt(32.W))) + val lsu_imprecise_error_load_any = Output(Bool()) + val lsu_imprecise_error_store_any = Output(Bool()) + val lsu_imprecise_error_addr_any = Output(UInt(32.W)) + val lsu_nonblock_load_valid_m = Output(Bool()) + val lsu_nonblock_load_tag_m = Output(UInt(pt1.LSU_NUM_NBLOAD_WIDTH.W)) + val lsu_nonblock_load_inv_r = Output(Bool()) + val lsu_nonblock_load_inv_tag_r = Output(UInt(pt1.LSU_NUM_NBLOAD_WIDTH.W)) + val lsu_nonblock_load_data_valid = Output(Bool()) + val lsu_nonblock_load_data_error = Output(Bool()) + val lsu_nonblock_load_data_tag = Output(UInt(pt1.LSU_NUM_NBLOAD_WIDTH.W)) + val lsu_nonblock_load_data = Output(UInt(32.W)) + val lsu_pmu_bus_trxn = Output(Bool()) + val lsu_pmu_bus_misaligned = Output(Bool()) + val lsu_pmu_bus_error = Output(Bool()) + val lsu_pmu_bus_busy = Output(Bool()) + val lsu_axi_awvalid = Output(Bool()) + val lsu_axi_awid = Output(UInt(pt1.LSU_BUS_TAG.W)) + val lsu_axi_awaddr = Output(UInt(32.W)) + val lsu_axi_awregion = Output(UInt(4.W)) + val lsu_axi_awlen = Output(UInt(8.W)) + val lsu_axi_awsize = Output(UInt(3.W)) + val lsu_axi_awburst = Output(UInt(2.W)) + val lsu_axi_awlock = Output(Bool()) + val lsu_axi_awcache = Output(UInt(4.W)) + val lsu_axi_awprot = Output(UInt(3.W)) + val lsu_axi_awqos = Output(UInt(4.W)) + val lsu_axi_wvalid = Output(Bool()) + val lsu_axi_wdata = Output(UInt(64.W)) + val lsu_axi_wstrb = Output(UInt(8.W)) + val lsu_axi_wlast = Output(Bool()) + val lsu_axi_bready = Output(Bool()) + val lsu_axi_arvalid = Output(Bool()) + val lsu_axi_arid = Output(UInt(pt1.LSU_BUS_TAG.W)) + val lsu_axi_araddr = Output(UInt(32.W)) + val lsu_axi_arregion = Output(UInt(4.W)) + val lsu_axi_arlen = Output(UInt(8.W)) + val lsu_axi_arsize = Output(UInt(3.W)) + val lsu_axi_arburst = Output(UInt(2.W)) + val lsu_axi_arlock = Output(Bool()) + val lsu_axi_arcache = Output(UInt(4.W)) + val lsu_axi_arprot = Output(UInt(3.W)) + val lsu_axi_arqos = Output(UInt(4.W)) + val lsu_axi_rready = Output(Bool()) + + }) + + val DEPTH = pt1.LSU_NUM_NBLOAD + val DEPTH_LOG2 = pt1.LSU_NUM_NBLOAD_WIDTH + val TIMER = 8 + val TIMER_MAX = TIMER - 1 + val TIMER_LOG2 = if (TIMER < 2) 1 else log2Ceil(TIMER) + + val ldst_byteen_hi_m = WireInit(UInt(4.W), init = 0.U) + val ldst_byteen_lo_m = WireInit(UInt(4.W), init = 0.U) + val ld_addr_hitvec_lo = WireInit(UInt(4.W), init = 0.U) + val ld_addr_hitvec_hi = WireInit(UInt(4.W), init = 0.U) + + val ld_byte_hitvec_lo = Wire(Vec(4, UInt(DEPTH.W))) + val ld_byte_hitvec_hi = Wire(Vec(4, UInt(DEPTH.W))) + val ld_byte_hitvecfn_lo = Wire(Vec(4, UInt(DEPTH.W))) + val ld_byte_hitvecfn_hi = Wire(Vec(4, UInt(DEPTH.W))) + + val ld_addr_ibuf_hit_lo = WireInit(Bool(), init = false.B) + val ld_addr_ibuf_hit_hi = WireInit(Bool(), init = false.B) + val ld_byte_ibuf_hit_lo = WireInit(UInt(4.W), init = 0.U) + val ld_byte_ibuf_hit_hi = WireInit(UInt(4.W), init = 0.U) + + val ldst_byteen_r = WireInit(UInt(4.W), init = 0.U) + val ldst_byteen_hi_r = WireInit(UInt(4.W), init = 0.U) + val ldst_byteen_lo_r = WireInit(UInt(4.W), init = 0.U) + val store_data_hi_r = WireInit(UInt(32.W), init = 0.U) + val store_data_lo_r = WireInit(UInt(32.W), init = 0.U) + val is_aligned_r = WireInit(Bool(), init = false.B) + val ldst_samedw_r = WireInit(Bool(), init = false.B) + val lsu_nonblock_load_valid_r = WireInit(Bool(), init = false.B) + val lsu_nonblock_load_data_hi = WireInit(UInt(32.W), init = 0.U) + val lsu_nonblock_load_data_lo = WireInit(UInt(32.W), init = 0.U) + val lsu_nonblock_data_unalgn = WireInit(UInt(32.W), init = 0.U) + val lsu_nonblock_addr_offset = WireInit(UInt(2.W), init = 0.U) + val lsu_nonblock_sz = WireInit(UInt(2.W), init = 0.U) + val lsu_nonblock_unsign = WireInit(Bool(), init = false.B) + val lsu_nonblock_dual = WireInit(Bool(), init = false.B) + val lsu_nonblock_load_data_ready = WireInit(Bool(), init = false.B) + + val CmdPtr0Dec = Wire(Vec(DEPTH, Bool())) + val CmdPtr1Dec = Wire(Vec(DEPTH, Bool())) + val RspPtrDec = Wire(Vec(DEPTH, Bool())) + val CmdPtr0 = WireInit(UInt(DEPTH_LOG2.W), init = 0.U) + val CmdPtr1 = WireInit(UInt(DEPTH_LOG2.W), init = 0.U) + val RspPtr = WireInit(UInt(DEPTH_LOG2.W), init = 0.U) + val WrPtr0_m = WireInit(UInt(DEPTH_LOG2.W), init = 0.U) + val WrPtr0_r = WireInit(UInt(DEPTH_LOG2.W), init = 0.U) + val WrPtr1_m = WireInit(UInt(DEPTH_LOG2.W), init = 0.U) + val WrPtr1_r = WireInit(UInt(DEPTH_LOG2.W), init = 0.U) + val found_cmdptr0 = WireInit(Bool(), init = false.B) + val found_cmdptr1 = WireInit(Bool(), init = false.B) + val buf_numvld_any = WireInit(UInt(4.W), init = 0.U) + val buf_numvld_wrcmd_any = WireInit(UInt(4.W), init = 0.U) + val buf_numvld_cmd_any = WireInit(UInt(4.W), init = 0.U) + val buf_numvld_pend_any = WireInit(UInt(4.W), init = 0.U) + val any_done_wait_state = WireInit(Bool(), init = false.B) + val bus_sideeffect_pend = WireInit(Bool(), init = false.B) + val bus_pend_trxn = WireInit(UInt(8.W), init = 0.U) + val bus_pend_trxnQ = WireInit(UInt(8.W), init = 0.U) + val bus_pend_trxn_ns = WireInit(UInt(8.W), init = 0.U) + val lsu_bus_cntr_overflow = WireInit(Bool(), init = false.B) + val bus_coalescing_disable = WireInit(Bool(), init = false.B) + val mdbhd_en = WireInit(Bool(), init = false.B) + + val bus_addr_match_pending = WireInit(Bool(), init = false.B) + val bus_cmd_sent = WireInit(Bool(), init = false.B) + val bus_cmd_ready = WireInit(Bool(), init = false.B) + val bus_wcmd_sent = WireInit(Bool(), init = false.B) + val bus_wdata_sent = WireInit(Bool(), init = false.B) + val bus_rsp_read = WireInit(Bool(), init = false.B) + val bus_rsp_write = WireInit(Bool(), init = false.B) + val bus_rsp_read_tag = WireInit(UInt(pt1.LSU_BUS_TAG.W), init = 0.U) + val bus_rsp_write_tag = WireInit(UInt(pt1.LSU_BUS_TAG.W), init = 0.U) + val bus_rsp_read_error = WireInit(Bool(), init = false.B) + val bus_rsp_write_error = WireInit(Bool(), init = false.B) + val bus_rsp_rdata = WireInit(UInt(64.W), init = 0.U) + + // Bus buffer signals + val buf_state = Wire(Vec(DEPTH, State())) + val buf_sz = Wire(Vec(DEPTH, UInt(2.W))) + val buf_addr = Wire(Vec(DEPTH, UInt(32.W))) + val buf_byteen = Wire(Vec(DEPTH, UInt(4.W))) + val buf_sideeffect = Wire(Vec(DEPTH, Bool())) + val buf_write = Wire(Vec(DEPTH, Bool())) + val buf_unsign = Wire(Vec(DEPTH, Bool())) + val buf_dual = Wire(Vec(DEPTH, Bool())) + val buf_samedw = Wire(Vec(DEPTH, Bool())) + val buf_nomerge = Wire(Vec(DEPTH, Bool())) + val buf_dualhi = Wire(Vec(DEPTH, Bool())) + val buf_dualtag = Wire(Vec(DEPTH, UInt(DEPTH_LOG2.W))) + val buf_ldfwd = Wire(Vec(DEPTH, Bool())) + val buf_ldfwdtag = Wire(Vec(DEPTH, UInt(DEPTH_LOG2.W))) + val buf_error = Wire(Vec(DEPTH, Bool())) + val buf_data = Wire(Vec(DEPTH, UInt(32.W))) + val buf_age = Wire(Vec(DEPTH, Vec(DEPTH, Bool()))) + val buf_age_younger = Wire(Vec(DEPTH, Vec(DEPTH, Bool()))) + val buf_rspage = Wire(Vec(DEPTH, Vec(DEPTH, Bool()))) + val buf_rsp_pickage = Wire(Vec(DEPTH, Vec(DEPTH, Bool()))) + + val buf_nxtstate = Wire(Vec(DEPTH, State())) + val buf_rst = Wire(Vec(DEPTH, Bool())) + val buf_state_en = Wire(Vec(DEPTH, Bool())) + val buf_cmd_state_bus_en = Wire(Vec(DEPTH, Bool())) + val buf_resp_state_bus_en = Wire(Vec(DEPTH, Bool())) + val buf_state_bus_en = Wire(Vec(DEPTH, Bool())) + val buf_dual_in = Wire(Vec(DEPTH, Bool())) + val buf_samedw_in = Wire(Vec(DEPTH, Bool())) + val buf_nomerge_in = Wire(Vec(DEPTH, Bool())) + val buf_sideeffect_in = Wire(Vec(DEPTH, Bool())) + val buf_unsign_in = Wire(Vec(DEPTH, Bool())) + val buf_sz_in = Wire(Vec(DEPTH, UInt(2.W))) + val buf_write_in = Wire(Vec(DEPTH, Bool())) + val buf_wr_en = Wire(Vec(DEPTH, Bool())) + val buf_dualhi_in = Wire(Vec(DEPTH, Bool())) + val buf_dualtag_in = Wire(Vec(DEPTH, UInt(DEPTH_LOG2.W))) + val buf_ldfwd_en = Wire(Vec(DEPTH, Bool())) + val buf_ldfwd_in = Wire(Vec(DEPTH, Bool())) + val buf_ldfwdtag_in = Wire(Vec(DEPTH, UInt(DEPTH_LOG2.W))) + val buf_byteen_in = Wire(Vec(DEPTH, UInt(4.W))) + val buf_addr_in = Wire(Vec(DEPTH, UInt(32.W))) + val buf_data_in = Wire(Vec(DEPTH, UInt(32.W))) + val buf_error_en = Wire(Vec(DEPTH, Bool())) + val buf_data_en = Wire(Vec(DEPTH, Bool())) + val buf_age_in = Wire(Vec(DEPTH, Vec(DEPTH, Bool()))) + val buf_ageQ = Wire(Vec(DEPTH, Vec(DEPTH, Bool()))) + val buf_rspage_set = Wire(Vec(DEPTH, Vec(DEPTH, Bool()))) + val buf_rspage_in = Wire(Vec(DEPTH, Vec(DEPTH, Bool()))) + val buf_rspageQ = Wire(Vec(DEPTH, Vec(DEPTH, Bool()))) + + // Input buffer signals + val ibuf_valid = WireInit(Bool(), init = false.B) + val ibuf_dual = WireInit(Bool(), init = false.B) + val ibuf_samedw = WireInit(Bool(), init = false.B) + val ibuf_nomerge = WireInit(Bool(), init = false.B) + val ibuf_tag = WireInit(UInt(DEPTH_LOG2.W), init = 0.U) + val ibuf_dualtag = WireInit(UInt(DEPTH_LOG2.W), init = 0.U) + val ibuf_sideeffect = WireInit(Bool(), init = false.B) + val ibuf_unsign = WireInit(Bool(), init = false.B) + val ibuf_write = WireInit(Bool(), init = false.B) + val ibuf_sz = WireInit(UInt(2.W), init = 0.U) + val ibuf_byteen = WireInit(UInt(4.W), init = 0.U) + val ibuf_addr = WireInit(UInt(32.W), init = 0.U) + val ibuf_data = WireInit(UInt(32.W), init = 0.U) + val ibuf_timer = WireInit(UInt(TIMER_LOG2.W), init = 0.U) + val ibuf_byp = WireInit(Bool(), init = false.B) + val ibuf_wr_en = WireInit(Bool(), init = false.B) + val ibuf_rst = WireInit(Bool(), init = false.B) + val ibuf_force_drain = WireInit(Bool(), init = false.B) + val ibuf_drain_vld = WireInit(Bool(), init = false.B) + val ibuf_drainvec_vld = Wire(Vec(DEPTH, Bool())) + val ibuf_tag_in = WireInit(UInt(DEPTH_LOG2.W), init = 0.U) + val ibuf_dualtag_in = WireInit(UInt(DEPTH_LOG2.W), init = 0.U) + val ibuf_sz_in = WireInit(UInt(2.W), init = 0.U) + val ibuf_addr_in = WireInit(UInt(32.W), init = 0.U) + val ibuf_byteen_in = WireInit(UInt(4.W), init = 0.U) + val ibuf_data_in = WireInit(UInt(32.W), init = 0.U) + val ibuf_timer_in = WireInit(UInt(TIMER_LOG2.W), init = 0.U) + val ibuf_byteen_out = WireInit(UInt(4.W), init = 0.U) + val ibuf_data_out = WireInit(UInt(32.W), init = 0.U) + val ibuf_merge_en = WireInit(Bool(), init = false.B) + val ibuf_merge_in = WireInit(Bool(), init = false.B) + + // Output buffer signals + val obuf_valid = WireInit(Bool(), init = false.B) + val obuf_write = WireInit(Bool(), init = false.B) + val obuf_nosend = WireInit(Bool(), init = false.B) + val obuf_rdrsp_pend = WireInit(Bool(), init = false.B) + val obuf_sideeffect = WireInit(Bool(), init = false.B) + val obuf_addr = WireInit(UInt(32.W), init = 0.U) + val obuf_data = WireInit(UInt(64.W), init = 0.U) + val obuf_sz = WireInit(UInt(2.W), init = 0.U) + val obuf_byteen = WireInit(UInt(8.W), init = 0.U) + val obuf_merge = WireInit(Bool(), init = false.B) + val obuf_cmd_done = WireInit(Bool(), init = false.B) + val obuf_data_done = WireInit(Bool(), init = false.B) + val obuf_tag0 = WireInit(UInt(pt1.LSU_BUS_TAG.W), init = 0.U) + val obuf_tag1 = WireInit(UInt(pt1.LSU_BUS_TAG.W), init = 0.U) + val obuf_rdrsp_tag = WireInit(UInt(pt1.LSU_BUS_TAG.W), init = 0.U) + + val ibuf_buf_byp = WireInit(Bool(), init = false.B) + val obuf_force_wr_en = WireInit(Bool(), init = false.B) + val obuf_wr_wait = WireInit(Bool(), init = false.B) + val obuf_wr_en = WireInit(Bool(), init = false.B) + val obuf_wr_enQ = WireInit(Bool(), init = false.B) + val obuf_rst = WireInit(Bool(), init = false.B) + val obuf_write_in = WireInit(Bool(), init = false.B) + val obuf_nosend_in = WireInit(Bool(), init = false.B) + val obuf_rdrsp_pend_in = WireInit(Bool(), init = false.B) + val obuf_sideeffect_in = WireInit(Bool(), init = false.B) + val obuf_aligned_in = WireInit(Bool(), init = false.B) + val obuf_addr_in = WireInit(UInt(64.W), init = 0.U) + val obuf_data_in = WireInit(UInt(64.W), init = 0.U) + val obuf_sz_in = WireInit(UInt(2.W), init = 0.U) + val obuf_byteen_in = WireInit(UInt(8.W), init = 0.U) + val obuf_merge_in = WireInit(Bool(), init = false.B) + val obuf_cmd_done_in = WireInit(Bool(), init = false.B) + val obuf_data_done_in = WireInit(Bool(), init = false.B) + val obuf_tag0_in = WireInit(UInt(pt1.LSU_BUS_TAG.W), init = 0.U) + val obuf_tag1_in = WireInit(UInt(pt1.LSU_BUS_TAG.W), init = 0.U) + val obuf_rdrsp_tag_in = WireInit(UInt(pt1.LSU_BUS_TAG.W), init = 0.U) + + val obuf_merge_en = WireInit(Bool(), init = false.B) + val obuf_wr_timer = WireInit(UInt(TIMER_LOG2.W), init = 0.U) + val obuf_wr_timer_in = WireInit(UInt(TIMER_LOG2.W), init = 0.U) + val obuf_byteen0_in = WireInit(UInt(8.W), init = 0.U) + val obuf_byteen1_in = WireInit(UInt(8.W), init = 0.U) + val obuf_data0_in = WireInit(UInt(64.W), init = 0.U) + val obuf_data1_in = WireInit(UInt(64.W), init = 0.U) + + val lsu_axi_awvalid_q = WireInit(Bool(), init = false.B) + val lsu_axi_awready_q = WireInit(Bool(), init = false.B) + val lsu_axi_wvalid_q = WireInit(Bool(), init = false.B) + val lsu_axi_wready_q = WireInit(Bool(), init = false.B) + val lsu_axi_arvalid_q = WireInit(Bool(), init = false.B) + val lsu_axi_arready_q = WireInit(Bool(), init = false.B) + val lsu_axi_bvalid_q = WireInit(Bool(), init = false.B) + val lsu_axi_bready_q = WireInit(Bool(), init = false.B) + val lsu_axi_rvalid_q = WireInit(Bool(), init = false.B) + val lsu_axi_rready_q = WireInit(Bool(), init = false.B) + val lsu_axi_bid_q = WireInit(UInt(pt1.LSU_BUS_TAG.W), init = 0.U) + val lsu_axi_rid_q = WireInit(UInt(pt1.LSU_BUS_TAG.W), init = 0.U) + val lsu_axi_bresp_q = WireInit(UInt(2.W), init = 0.U) + val lsu_axi_rresp_q = WireInit(UInt(2.W), init = 0.U) + val lsu_imprecise_error_store_tag= WireInit(UInt(DEPTH_LOG2.W), init = 0.U) + val lsu_axi_rdata_q = WireInit(UInt(64.W), init = 0.U) + +///////////// Initialization of vectors////////////////// + for (i <- 0 until DEPTH) { + CmdPtr0Dec(i) := 0.U + CmdPtr1Dec(i) := 0.U + RspPtrDec(i) := 0.U + buf_state(i) := IDLE + buf_sz(i) := 0.U + buf_addr(i) := 0.U + buf_byteen(i) := 0.U + buf_sideeffect(i) := 0.U + buf_write(i) := 0.U + buf_unsign(i) := 0.U + buf_dual(i) := 0.U + buf_samedw(i) := 0.U + buf_nomerge(i) := 0.U + buf_dualhi(i) := 0.U + buf_dualtag(i) := 0.U + buf_ldfwd(i) := 0.U + buf_ldfwdtag(i) := 0.U + buf_error(i) := 0.U + buf_data(i) := 0.U + buf_age(i) := (0 until DEPTH).map(j =>false.B) + buf_age_younger(i) := (0 until DEPTH).map(j =>false.B) + buf_rspage(i) := (0 until DEPTH).map(j =>false.B) + buf_rsp_pickage(i) := (0 until DEPTH).map(j =>false.B) + + buf_dual_in(i) := 0.U + buf_samedw_in(i) := 0.U + buf_nomerge_in(i) := 0.U + + buf_sideeffect_in(i) := 0.U + buf_unsign_in(i) := 0.U + buf_sz_in(i) := 0.U + buf_write_in(i) := 0.U + buf_dualhi_in(i) := 0.U + buf_dualtag_in(i) := 0.U + buf_byteen_in(i) := 0.U + buf_addr_in(i) := 0.U + buf_age_in(i) := (0 until DEPTH).map(j =>false.B) + buf_ageQ(i) := (0 until DEPTH).map(j =>false.B) + buf_rspage_set(i) := (0 until DEPTH).map(j =>false.B) + buf_rspage_in(i) := (0 until DEPTH).map(j =>false.B) + buf_rspageQ(i) := (0 until DEPTH).map(j =>false.B) + ibuf_drainvec_vld(i) := 0.U + } +//////////////////////////////////////////////// + +//////////////////////Buffer Hit Logic for load forwarding/////////////////// + ldst_byteen_hi_m := io.ldst_byteen_ext_m(7,4) + ldst_byteen_lo_m := io.ldst_byteen_ext_m(3,0) + + ld_addr_ibuf_hit_lo := (io.lsu_addr_m(31,2) === ibuf_addr(31,2)) & ibuf_write & ibuf_valid & io.lsu_busreq_m + ld_addr_ibuf_hit_hi := (io.end_addr_m(31,2) === ibuf_addr(31,2)) & ibuf_write & ibuf_valid & io.lsu_busreq_m + + ld_byte_ibuf_hit_lo := (0 until 4).map(i =>(ld_addr_ibuf_hit_lo & ibuf_byteen(i) & ldst_byteen_lo_m(i)).asUInt).reverse.reduce(Cat(_,_)) + ld_byte_ibuf_hit_hi := (0 until 4).map(i =>(ld_addr_ibuf_hit_hi & ibuf_byteen(i) & ldst_byteen_hi_m(i)).asUInt).reverse.reduce(Cat(_,_)) + + ld_addr_hitvec_lo := (0 until DEPTH).map(i =>((io.lsu_addr_m(31,2) === buf_addr(i)(31,2)) & buf_write(i) & (buf_state(i) =/= IDLE) & io.lsu_busreq_m).asUInt).reverse.reduce(Cat(_,_)) + ld_addr_hitvec_hi := (0 until DEPTH).map(i =>((io.end_addr_m(31,2) === buf_addr(i)(31,2)) & buf_write(i) & (buf_state(i) =/= IDLE) & io.lsu_busreq_m).asUInt).reverse.reduce(Cat(_,_)) + + io.ld_byte_hit_buf_lo := (0 until 4).map(i =>(ld_byte_ibuf_hit_lo(i) | ld_byte_hitvecfn_lo(i).orR).asUInt).reverse.reduce(Cat(_,_)) + io.ld_byte_hit_buf_hi := (0 until 4).map(i =>(ld_byte_ibuf_hit_lo(i) | ld_byte_hitvecfn_lo(i).orR).asUInt).reverse.reduce(Cat(_,_)) + + ld_byte_hitvec_lo := (0 until 4).map(j =>(0 until DEPTH).map(i =>(ld_addr_hitvec_lo(i) & buf_byteen(i)(j) & ldst_byteen_lo_m(j)).asUInt).reverse.reduce(Cat(_,_))) + ld_byte_hitvec_hi := (0 until 4).map(j =>(0 until DEPTH).map(i =>(ld_addr_hitvec_hi(i) & buf_byteen(i)(j) & ldst_byteen_hi_m(j)).asUInt).reverse.reduce(Cat(_,_))) + + ld_byte_hitvecfn_lo := (0 until 4).map(j =>(0 until DEPTH).map(i =>(ld_byte_hitvec_lo(j)(i) & ~((ld_byte_hitvec_lo(j) & buf_age_younger(i).asUInt).orR) & ~ld_byte_ibuf_hit_lo(j)).asUInt).reverse.reduce(Cat(_,_))) + ld_byte_hitvecfn_hi := (0 until 4).map(j =>(0 until DEPTH).map(i =>(ld_byte_hitvec_hi(j)(i) & ~((ld_byte_hitvec_hi(j) & buf_age_younger(i).asUInt).orR) & ~ld_byte_ibuf_hit_hi(j)).asUInt).reverse.reduce(Cat(_,_))) + + //Forwarding MUX + io.ld_fwddata_buf_lo := (0 until 4).map(i =>(Mux(ld_byte_ibuf_hit_lo(i),ibuf_data(i*8+7,i*8),Mux1H((0 until DEPTH).map(j =>(ld_byte_hitvecfn_lo(i)(j)) -> buf_data(j)(i*8+7,i*8)))))).reverse.reduce(Cat(_,_)) + io.ld_fwddata_buf_hi := (0 until 4).map(i =>(Mux(ld_byte_ibuf_hit_hi(i),ibuf_data(i*8+7,i*8),Mux1H((0 until DEPTH).map(j =>(ld_byte_hitvecfn_hi(i)(j)) -> buf_data(j)(i*8+7,i*8)))))).reverse.reduce(Cat(_,_)) + +///////////////////////////////////////////////////////////////////////////// + bus_coalescing_disable := io.dec_tlu_wb_coalescing_disable | pt.BUILD_AHB_LITE + ldst_byteen_r := Mux1H(Seq( + io.lsu_pkt_r.word.asBool -> 15.U(4.W), + io.lsu_pkt_r.half.asBool -> 3.U(4.W), + io.lsu_pkt_r.by.asBool -> 1.U(4.W) + )) + val ldst_byteen_extended_r = Cat(Fill(4,0.U),ldst_byteen_r(3,0)) << io.lsu_addr_r(1,0) + val store_data_extended_r = Cat(Fill(32,0.U),io.store_data_r(31,0)) << (8.U*io.lsu_addr_r(1,0)) + ldst_byteen_hi_r := ldst_byteen_extended_r(7,4) + ldst_byteen_lo_r := ldst_byteen_extended_r(3,0) + store_data_hi_r := store_data_extended_r(63,32) + store_data_lo_r := store_data_extended_r(31, 0) + ldst_samedw_r := io.lsu_addr_r(3) === io.end_addr_r(3) + is_aligned_r := Mux1H(Seq( + io.lsu_pkt_r.by.asBool -> true.B, + io.lsu_pkt_r.half.asBool -> (io.lsu_addr_r(0).asUInt === 0.U), + io.lsu_pkt_r.word.asBool -> (io.lsu_addr_r(1,0).asUInt === 0.U) + )) +//////////////////////////////////////////////////////////////////////////// + ibuf_byp := (io.lsu_busreq_r & (io.lsu_pkt_r.load | io.no_word_merge_r) & ~ibuf_valid).asBool + ibuf_wr_en := (io.lsu_busreq_r & io.lsu_commit_r & ~ibuf_byp).asBool + ibuf_rst := ((ibuf_drain_vld & ~ibuf_wr_en) | io.dec_tlu_force_halt).asBool + ibuf_force_drain := (io.lsu_busreq_m & ~io.lsu_busreq_r & ibuf_valid & (io.lsu_pkt_m.load | (ibuf_addr(31,2) =/= io.lsu_addr_m(31,2)))).asBool + ibuf_drain_vld := ibuf_valid & (((ibuf_wr_en | (ibuf_timer === (TIMER_MAX.asUInt(TIMER_LOG2.W)))) & ~(ibuf_merge_en & ibuf_merge_in)) | + ibuf_byp | ibuf_force_drain | ibuf_sideeffect | ~ibuf_write | bus_coalescing_disable) + ibuf_tag_in := Mux((ibuf_merge_en & ibuf_merge_in), ibuf_tag(DEPTH_LOG2-1,0),Mux(io.ldst_dual_r,WrPtr1_r,WrPtr0_r)) + ibuf_dualtag_in := WrPtr0_r(DEPTH_LOG2-1,0) + ibuf_sz_in := Cat(io.lsu_pkt_r.word,io.lsu_pkt_r.half) + ibuf_addr_in := Mux(io.ldst_dual_r,io.end_addr_r,io.lsu_addr_r) + ibuf_byteen_in := Mux(ibuf_merge_en & ibuf_merge_in, ibuf_byteen(3,0) | ldst_byteen_lo_r(3,0), Mux(io.ldst_dual_r, ldst_byteen_hi_r(3,0), ldst_byteen_lo_r(3,0))) + ibuf_data_in := (0 until 4).map(i =>(Mux((ibuf_merge_en & ibuf_merge_in),Mux(ldst_byteen_lo_r(i),store_data_lo_r((8*i)+7,(8*i)) , ibuf_data((8*i)+7,(8*i))),Mux(io.ldst_dual_r, store_data_hi_r((8*i)+7,(8*i)), store_data_lo_r((8*i)+7,(8*i)))))).reverse.reduce(Cat(_,_)) + ibuf_timer_in := Mux(ibuf_wr_en, 0.U, Mux(ibuf_timer < (TIMER_MAX.asUInt(TIMER_LOG2.W)), ibuf_timer+1.U, ibuf_timer)) + ibuf_byteen_out := (0 until 4).map(i =>(Mux((ibuf_merge_en & ~ibuf_merge_in),ibuf_byteen(i) | ldst_byteen_lo_r(i), ibuf_byteen(i))).asUInt).reverse.reduce(Cat(_,_)) + ibuf_data_out := (0 until 4).map(i =>(Mux((ibuf_merge_en & ~ibuf_merge_in),Mux(ldst_byteen_lo_r(i),store_data_lo_r((8*i)+7,(8*i)) , ibuf_data((8*i)+7,(8*i))),ibuf_data(i*8+7,i*8)))).reverse.reduce(Cat(_,_)) + ibuf_merge_en := io.lsu_busreq_r & io.lsu_commit_r & io.lsu_pkt_r.store & ibuf_valid & ibuf_write & io.lsu_addr_r(31,2)===ibuf_addr(31,2) & ~io.is_sideeffects_r & ~bus_coalescing_disable + ibuf_merge_in := ~io.ldst_dual_r.asUInt() + + withClock(io.lsu_free_c2_clk){ + ibuf_valid := RegEnable(~ibuf_rst ,init = false.B, (ibuf_wr_en|ibuf_rst).asBool()) + ibuf_timer := RegNext(ibuf_timer_in ,init = 0.U) + } + withClock(io.lsu_bus_ibuf_c1_clk) { + ibuf_dual := RegEnable(io.ldst_dual_r ,init = 0.U, ibuf_wr_en) + ibuf_samedw := RegEnable(ldst_samedw_r ,init = 0.U, ibuf_wr_en) + ibuf_nomerge := RegEnable(io.no_dword_merge_r ,init = 0.U, ibuf_wr_en) + ibuf_sideeffect := RegEnable(io.is_sideeffects_r ,init = 0.U, ibuf_wr_en) + ibuf_unsign := RegEnable(io.lsu_pkt_r.unsign ,init = 0.U, ibuf_wr_en) + ibuf_write := RegEnable(io.lsu_pkt_r.store ,init = 0.U, ibuf_wr_en) + ibuf_sz := RegEnable(ibuf_sz_in(1, 0) ,init = 0.U, ibuf_wr_en) + ibuf_byteen := RegEnable(ibuf_byteen_in ,init = 0.U, ibuf_wr_en) + ibuf_addr := RegEnable(ibuf_addr_in(31, 0) ,init = 0.U, ibuf_wr_en) + ibuf_data := RegEnable(ibuf_data_in(31, 0) ,init = 0.U, ibuf_wr_en) + ibuf_tag := RegEnable(ibuf_tag_in ,init = 0.U, ibuf_wr_en) + ibuf_dualtag := RegEnable(ibuf_dualtag_in ,init = 0.U, ibuf_wr_en) + } +/////////////////////////////////////////////////////////////////////////////////////// + + ibuf_buf_byp := (ibuf_byp & (buf_numvld_pend_any(3,0) === 0.U) & (~io.lsu_pkt_r.store | io.no_dword_merge_r)) + obuf_force_wr_en := io.lsu_busreq_m & ~io.lsu_busreq_r & ~ibuf_valid & (buf_numvld_cmd_any(3,0) === 1.U(4.W)) & (io.lsu_addr_m(31,2) =/= buf_addr(CmdPtr0)(31,2)) + obuf_wr_wait := (buf_numvld_wrcmd_any(3,0) === 1.U(4.W)) & (buf_numvld_cmd_any(3,0) === 1.U(4.W)) & (obuf_wr_timer =/= (TIMER_MAX.asUInt(TIMER_LOG2.W))) & + ~bus_coalescing_disable & ~buf_nomerge(CmdPtr0) & ~buf_sideeffect(CmdPtr0) & ~obuf_force_wr_en + obuf_wr_en := ((ibuf_buf_byp & io.lsu_commit_r & ~(io.is_sideeffects_r & bus_sideeffect_pend)) | + ((buf_state(CmdPtr0) === CMD) & found_cmdptr0 & ~buf_cmd_state_bus_en(CmdPtr0) & ~(buf_sideeffect(CmdPtr0) & bus_sideeffect_pend) & + (~(buf_dual(CmdPtr0) & buf_samedw(CmdPtr0) & ~buf_write(CmdPtr0)) | found_cmdptr1 | buf_nomerge(CmdPtr0) | obuf_force_wr_en))) & + (bus_cmd_ready | ~obuf_valid | obuf_nosend) & ~obuf_wr_wait & ~lsu_bus_cntr_overflow & ~bus_addr_match_pending & io.lsu_bus_clk_en + obuf_rst := ((bus_cmd_sent | (obuf_valid & obuf_nosend)) & ~obuf_wr_en & io.lsu_bus_clk_en) | io.dec_tlu_force_halt + obuf_write_in := Mux(ibuf_buf_byp, io.lsu_pkt_r.store, buf_write(CmdPtr0)) + obuf_nosend_in := (obuf_addr_in(31,3) === obuf_addr(31,3)) & obuf_aligned_in & ~obuf_sideeffect & ~obuf_write & ~obuf_write_in & ~io.dec_tlu_external_ldfwd_disable & + ((obuf_valid & ~obuf_nosend) | (obuf_rdrsp_pend & ~(bus_rsp_read & (bus_rsp_read_tag === obuf_rdrsp_tag)))) + obuf_rdrsp_pend_in := (~(obuf_wr_en & ~obuf_nosend_in) & obuf_rdrsp_pend & ~(bus_rsp_read & (bus_rsp_read_tag === obuf_rdrsp_tag))) | ((bus_cmd_sent & ~obuf_write) & ~io.dec_tlu_force_halt) + obuf_sideeffect_in := Mux(ibuf_buf_byp, io.is_sideeffects_r, buf_sideeffect(CmdPtr0)) + obuf_aligned_in := Mux(ibuf_buf_byp, is_aligned_r, (obuf_sz_in(1,0) === 0.U(2.W) | (obuf_sz_in(0) & ~obuf_addr_in(0)) | (obuf_sz_in(1) & ~(obuf_addr_in(1,0).orR)))) + obuf_addr_in := Mux(ibuf_buf_byp, io.lsu_addr_r, buf_addr(CmdPtr0)) + obuf_data_in := (0 until 8).map(i =>(Mux((obuf_merge_en & obuf_byteen1_in(i)),obuf_data1_in((8*i)+7,(8*i)), obuf_data0_in((8*i)+7,(8*i)))).asUInt).reverse.reduce(Cat(_,_)) + obuf_sz_in := Mux(ibuf_buf_byp, Cat(io.lsu_pkt_r.word,io.lsu_pkt_r.half), buf_sz(CmdPtr0)) + obuf_byteen_in := (0 until 8).map(i =>(obuf_byteen0_in(i) | (obuf_merge_en & obuf_byteen1_in(i))).asUInt).reverse.reduce(Cat(_,_)) + obuf_merge_in := obuf_merge_en + obuf_cmd_done_in := ~(obuf_wr_en | obuf_rst) & (obuf_cmd_done | bus_wcmd_sent ) + obuf_data_done_in := ~(obuf_wr_en | obuf_rst) & (obuf_data_done | bus_wdata_sent) + obuf_tag0_in := Mux(ibuf_buf_byp, WrPtr0_r, CmdPtr0) + obuf_tag1_in := Mux(ibuf_buf_byp, WrPtr1_r, CmdPtr0) + obuf_rdrsp_tag_in := Mux((bus_cmd_sent & ~obuf_write), obuf_tag0(pt1.LSU_BUS_TAG-1,0), obuf_rdrsp_tag(pt1.LSU_BUS_TAG-1,0)) + + obuf_merge_en := ((CmdPtr0 =/= CmdPtr1) & found_cmdptr0 & found_cmdptr1 & (buf_state(CmdPtr0) === CMD) & (buf_state(CmdPtr1) === CMD) & + ~buf_cmd_state_bus_en(CmdPtr0) & ~buf_sideeffect(CmdPtr0) & + ((buf_write(CmdPtr0) & buf_write(CmdPtr1) & (buf_addr(CmdPtr0)(31,3) === buf_addr(CmdPtr1)(31,3)) & ~bus_coalescing_disable & ~pt.BUILD_AXI_NATIVE) | + (~buf_write(CmdPtr0) & buf_dual(CmdPtr0) & ~buf_dualhi(CmdPtr0) & buf_samedw(CmdPtr0)))) | + (ibuf_buf_byp & ldst_samedw_r & io.ldst_dual_r) + obuf_wr_timer_in := Mux(obuf_wr_en, 0.U, Mux(((buf_numvld_cmd_any > 0.U(4.W)) & (obuf_wr_timer < TIMER_MAX.asUInt(TIMER_LOG2.W))), (obuf_wr_timer + 1.U), obuf_wr_timer)) + obuf_byteen0_in := Mux(ibuf_buf_byp, Mux(io.lsu_addr_r(2), Cat(ldst_byteen_lo_r(3,0),0.U(4.W)), Cat(0.U(4.W),ldst_byteen_lo_r(3,0))), Mux(buf_addr(CmdPtr0)(2), Cat(buf_byteen(CmdPtr0),0.U(4.W)), Cat(0.U(4.W),buf_byteen(CmdPtr0)))) + obuf_byteen1_in := Mux(ibuf_buf_byp, Mux(io.end_addr_r(2), Cat(ldst_byteen_hi_r(3,0),0.U(4.W)), Cat(0.U(4.W),ldst_byteen_hi_r(3,0))), Mux(buf_addr(CmdPtr1)(2), Cat(buf_byteen(CmdPtr1),0.U(4.W)), Cat(0.U(4.W),buf_byteen(CmdPtr1)))) + obuf_data0_in := Mux(ibuf_buf_byp, Mux(io.lsu_addr_r(2), Cat(store_data_lo_r(31,0),0.U(32.W)), Cat(0.U(32.W),store_data_lo_r(31,0))), Mux(buf_addr(CmdPtr0)(2), Cat(buf_data(CmdPtr0), 0.U(32.W)), Cat(0.U(32.W), buf_data(CmdPtr0)))) + obuf_data1_in := Mux(ibuf_buf_byp, Mux(io.lsu_addr_r(2), Cat(store_data_hi_r(31,0),0.U(32.W)), Cat(0.U(32.W),store_data_hi_r(31,0))), Mux(buf_addr(CmdPtr1)(2), Cat(buf_data(CmdPtr1), 0.U(32.W)), Cat(0.U(32.W), buf_data(CmdPtr1)))) + + obuf_addr := RegEnable(obuf_addr_in , init = 0.U, obuf_wr_en) + obuf_data := RegEnable(obuf_data_in , init = 0.U, obuf_wr_en) + withClock(io.lsu_busm_clk){ + obuf_rdrsp_pend := RegNext(obuf_rdrsp_pend_in , init = 0.U) + obuf_rdrsp_tag := RegNext(obuf_rdrsp_tag_in , init = 0.U) + obuf_cmd_done := RegNext(obuf_cmd_done_in , init = 0.U) + obuf_data_done := RegNext(obuf_data_done_in , init = 0.U) + obuf_wr_timer := RegNext(obuf_wr_timer_in , init = 0.U) + obuf_wr_enQ := RegNext(obuf_wr_en , init = 0.U) + } + withClock(io.lsu_free_c2_clk){ + obuf_valid := RegEnable(~obuf_rst , init = 0.U, obuf_wr_en|obuf_rst) + obuf_nosend := RegEnable(obuf_nosend_in , init = 0.U, obuf_wr_en) + } + withClock(io.lsu_bus_obuf_c1_clk){ + obuf_write := RegEnable(obuf_write_in , init = 0.U, obuf_wr_en) + obuf_sideeffect := RegEnable(obuf_sideeffect_in , init = 0.U, obuf_wr_en) + obuf_sz := RegEnable(obuf_sz_in , init = 0.U, obuf_wr_en) + obuf_byteen := RegEnable(obuf_byteen_in , init = 0.U, obuf_wr_en) + obuf_merge := RegEnable(obuf_merge_in , init = 0.U, obuf_wr_en) + obuf_tag0 := RegEnable(obuf_tag0_in , init = 0.U, obuf_wr_en) + obuf_tag1 := RegEnable(obuf_tag1_in , init = 0.U, obuf_wr_en) + } +//////////////////////////////////////////////////////////////////////////////////// + WrPtr0_m := PriorityMux((0 until DEPTH).map(i =>(((buf_state(i) === IDLE) & ~((ibuf_valid & (ibuf_tag === i)) | (io.lsu_busreq_r & ((WrPtr0_r === i) | (io.ldst_dual_r & (WrPtr1_r === i)))))).asBool -> i.asUInt(DEPTH_LOG2.W)))) + WrPtr1_m := PriorityMux((0 until DEPTH).map(i =>(((buf_state(i) === IDLE) & ~((ibuf_valid & (ibuf_tag === i)) | (io.lsu_busreq_m & (WrPtr0_m === i)) | (io.lsu_busreq_r & (WrPtr0_r === i) | (io.ldst_dual_r & (WrPtr1_r === i))))).asBool -> i.asUInt(DEPTH_LOG2.W)))) + + for { + i <- 0 until DEPTH + j <- 0 until DEPTH + }{ + CmdPtr0Dec(i) := ~(buf_age(i).asUInt.orR()) & (buf_state(i) === CMD) & ~buf_cmd_state_bus_en(i) + CmdPtr1Dec(i) := ~((buf_age(i).asUInt.orR() & ~CmdPtr0Dec.asUInt)) & ~CmdPtr0Dec(i) & (buf_state(i) === CMD) & ~buf_cmd_state_bus_en(i) + RspPtrDec(i) := ~(buf_rsp_pickage(i).asUInt.orR()) & (buf_state(i) === DONE_WAIT) + + buf_age_in(i)(j) := (((buf_state(i) === IDLE) & buf_state_en(i)) & + (((buf_state(j) === WAIT) | ((buf_state(j) === CMD) & ~buf_cmd_state_bus_en(j))) | + (ibuf_drain_vld & io.lsu_busreq_r & (ibuf_byp | io.ldst_dual_r) & (i === WrPtr0_r) & (j === ibuf_tag)) | + (ibuf_byp & io.lsu_busreq_r & io.ldst_dual_r & (i === WrPtr1_r) & (j === WrPtr0_r)))) | buf_age(i)(j) + + buf_age(i)(j) := buf_ageQ(i)(j) & ~((buf_state(j) === CMD) & buf_cmd_state_bus_en(j)) + buf_age_younger(i)(j) := Mux(i.asUInt(DEPTH_LOG2.W) === j.asUInt(DEPTH_LOG2.W), 0.U, (~buf_age(i)(j) & (buf_state(j) =/= IDLE))) + + buf_rspage_set(i)(j) := ((buf_state(i) === IDLE) & buf_state_en(i)) & (~((buf_state(j) === IDLE) | (buf_state(j) === DONE)) | + (ibuf_drain_vld & io.lsu_busreq_r & (ibuf_byp | io.ldst_dual_r) & (i === WrPtr0_r) & (j === ibuf_tag)) | + (ibuf_byp & io.lsu_busreq_r & io.ldst_dual_r & (i === WrPtr1_r) & (j === WrPtr0_r))) + buf_rspage_in(i)(j) := buf_rspage_set(i)(j) | buf_rspage(i)(j) + buf_rspage(i)(j) := buf_rspageQ(i)(j) & ~((buf_state(j) === DONE) | (buf_state(j) === IDLE)) + buf_rsp_pickage(i)(j) := buf_rspageQ(i)(j) & (buf_state(j) === DONE_WAIT) + } + + CmdPtr0 := PriorityEncoderOH(CmdPtr0Dec.asUInt) + CmdPtr1 := PriorityEncoderOH(CmdPtr1Dec.asUInt) + RspPtr := PriorityEncoderOH(RspPtrDec.asUInt) + found_cmdptr0 := CmdPtr0Dec.reduce(_|_) + found_cmdptr1 := CmdPtr1Dec.reduce(_|_) + +////////////////////////// FSM /////////////////////////////////////// + for (i <- 0 until DEPTH){ + buf_nxtstate(i) := IDLE + buf_state_en(i) := 0.U + buf_cmd_state_bus_en(i) := 0.U + buf_resp_state_bus_en(i) := 0.U + buf_state_bus_en(i) := 0.U + buf_wr_en(i) := 0.U + buf_data_in(i) := 0.U + buf_data_en(i) := 0.U + buf_error_en(i) := 0.U + buf_rst(i) := 0.U + buf_ldfwd_en(i) := 0.U + buf_ldfwd_in(i) := 0.U + buf_ldfwdtag_in(i) := 0.U + + ibuf_drainvec_vld(i) := (ibuf_drain_vld & (i === ibuf_tag)) + buf_byteen_in(i) := Mux(ibuf_drainvec_vld(i), ibuf_byteen_out(3,0), Mux((ibuf_byp & io.ldst_dual_r & (i === WrPtr1_r)).asBool(), ldst_byteen_hi_r(3, 0), ldst_byteen_lo_r(3, 0))) + buf_addr_in(i) := Mux(ibuf_drainvec_vld(i), ibuf_addr(31,0), Mux((ibuf_byp & io.ldst_dual_r & (i === WrPtr1_r)).asBool(), io.end_addr_r(31, 0), io.lsu_addr_r(31, 0))) + buf_dual_in(i) := Mux(ibuf_drainvec_vld(i), ibuf_dual, io.ldst_dual_r) + buf_samedw_in(i) := Mux(ibuf_drainvec_vld(i), ibuf_samedw, ldst_samedw_r) + buf_nomerge_in(i) := Mux(ibuf_drainvec_vld(i), (ibuf_nomerge | ibuf_force_drain), io.no_dword_merge_r) + buf_dualhi_in(i) := Mux(ibuf_drainvec_vld(i), ibuf_dual, (ibuf_byp & io.ldst_dual_r & (i === WrPtr1_r))) + buf_dualtag_in(i) := Mux(ibuf_drainvec_vld(i), ibuf_dualtag, Mux((ibuf_byp & io.ldst_dual_r & (i === WrPtr1_r)).asBool(), WrPtr0_r, WrPtr1_r)) + buf_sideeffect_in(i) := Mux(ibuf_drainvec_vld(i), ibuf_sideeffect, io.is_sideeffects_r) + buf_unsign_in(i) := Mux(ibuf_drainvec_vld(i), ibuf_unsign, io.lsu_pkt_r.unsign) + buf_sz_in(i) := Mux(ibuf_drainvec_vld(i), ibuf_sz, Cat(io.lsu_pkt_r.word, io.lsu_pkt_r.half)) + buf_write_in(i) := Mux(ibuf_drainvec_vld(i), ibuf_write, io.lsu_pkt_r.store) + + // Buffer entry state machine + switch (buf_state(i)){ + is (IDLE) { + buf_nxtstate(i) := Mux(io.lsu_bus_clk_en.asBool(), CMD, WAIT) + buf_state_en(i) := (io.lsu_busreq_r & io.lsu_commit_r & (((ibuf_byp | io.ldst_dual_r) & ~ibuf_merge_en & (i === WrPtr0_r)) | (ibuf_byp & io.ldst_dual_r & (i === WrPtr1_r)))) | (ibuf_drain_vld & (i === ibuf_tag)) + buf_wr_en(i) := buf_state_en(i) + buf_data_en(i) := buf_state_en(i) + buf_data_in(i) := Mux((ibuf_drain_vld & (i === ibuf_tag)).asBool(), ibuf_data_out(31, 0), store_data_lo_r(31, 0)) + } + is (WAIT) { + buf_nxtstate(i) := Mux(io.dec_tlu_force_halt.asBool(), IDLE, CMD) + buf_state_en(i) := io.lsu_bus_clk_en | io.dec_tlu_force_halt + } + is (CMD) { + buf_nxtstate(i) := Mux(io.dec_tlu_force_halt.asBool(), IDLE, Mux((obuf_nosend & bus_rsp_read & (bus_rsp_read_tag === obuf_rdrsp_tag)), DONE_WAIT, RESP)) + buf_cmd_state_bus_en(i) := ((obuf_tag0 === i.asUInt(pt1.LSU_BUS_TAG.W)) | (obuf_merge & (obuf_tag1 === i.asUInt(pt1.LSU_BUS_TAG.W)))) & obuf_valid & obuf_wr_enQ + buf_state_bus_en(i) := buf_cmd_state_bus_en(i) + buf_state_en(i) := (buf_state_bus_en(i) & io.lsu_bus_clk_en) | io.dec_tlu_force_halt + buf_ldfwd_in(i) := 1.U(1.W) + buf_ldfwd_en(i) := buf_state_en(i) & ~buf_write(i) & obuf_nosend & ~io.dec_tlu_force_halt + buf_ldfwdtag_in(i) := (obuf_rdrsp_tag(pt1.LSU_BUS_TAG - 2,0)).asUInt + buf_data_en(i) := buf_state_bus_en(i) & io.lsu_bus_clk_en & obuf_nosend & bus_rsp_read + buf_error_en(i) := buf_state_bus_en(i) & io.lsu_bus_clk_en & obuf_nosend & bus_rsp_read_error + buf_data_in(i) := Mux(buf_error_en(i), bus_rsp_rdata(31,0), Mux(buf_addr(i)(2), bus_rsp_rdata(63, 32), bus_rsp_rdata(31, 0))) + } + is (RESP){ + buf_nxtstate(i) := Mux((io.dec_tlu_force_halt | (buf_write(i) & ~(pt.BUILD_AXI_NATIVE & bus_rsp_write_error))).asBool(), IDLE, + Mux((buf_dual(i) & ~ buf_samedw(i) & ~ buf_write(i) &(buf_state(buf_dualtag(i)) =/= DONE_PARTIAL)), DONE_PARTIAL, + Mux((buf_ldfwd(i) | any_done_wait_state | (buf_dual(i) & ~ buf_samedw(i) & ~ buf_write(i) & buf_ldfwd(buf_dualtag(i)) & (buf_state(buf_dualtag(i)) === DONE_PARTIAL) & any_done_wait_state)), DONE_WAIT, DONE))) + buf_resp_state_bus_en(i):= (bus_rsp_write & (bus_rsp_write_tag === (i.asUInt(pt1.LSU_BUS_TAG.W)))) | + (bus_rsp_read & ((bus_rsp_read_tag === (i.asUInt(pt1.LSU_BUS_TAG.W))) | + (buf_ldfwd(i) & (bus_rsp_read_tag === (buf_ldfwdtag(i)))) | + (buf_dual(i) & buf_dualhi(i) & ~buf_write(i) & buf_samedw(i) & (bus_rsp_read_tag === (buf_dualtag(i)))))) + buf_state_bus_en(i) := buf_resp_state_bus_en(i) + buf_state_en(i) := (buf_state_bus_en(i) & io.lsu_bus_clk_en) | io.dec_tlu_force_halt + buf_data_en(i) := buf_state_bus_en(i) & bus_rsp_read & io.lsu_bus_clk_en + buf_error_en(i) := buf_state_bus_en(i) & io.lsu_bus_clk_en & ((bus_rsp_read_error & (bus_rsp_read_tag === (i.asUInt(pt1.LSU_BUS_TAG.W))) ) | + (bus_rsp_read_error & buf_ldfwd(i) & (bus_rsp_read_tag === buf_ldfwdtag(i))) | + (bus_rsp_write_error & pt.BUILD_AXI_NATIVE & (bus_rsp_write_tag === i.asUInt(pt1.LSU_BUS_TAG.W)))) + buf_data_in(i) := Mux((buf_state_en(i) & ~buf_error_en(i)), Mux(buf_addr(i)(2), bus_rsp_rdata(63, 32), bus_rsp_rdata(31, 0)), bus_rsp_rdata(31, 0)) + } + is (DONE_PARTIAL){ // Other part of dual load hasn't returned + buf_nxtstate(i) := Mux(io.dec_tlu_force_halt.asBool(), IDLE, Mux((buf_ldfwd(i) | buf_ldfwd(buf_dualtag(i)) | any_done_wait_state), DONE_WAIT, DONE)) + buf_state_bus_en(i) := bus_rsp_read & ((bus_rsp_read_tag === buf_dualtag(i).asUInt()) | + (buf_ldfwd(buf_dualtag(i)) & (bus_rsp_read_tag === buf_ldfwdtag(buf_dualtag(i)).asUInt()))) + buf_state_en(i) := (buf_state_bus_en(i) & io.lsu_bus_clk_en) | io.dec_tlu_force_halt + } + is (DONE_WAIT) { // WAIT state if there are multiple outstanding nb returns + buf_nxtstate(i) := Mux(io.dec_tlu_force_halt.asBool(), IDLE, DONE) + buf_state_en(i) := ((RspPtr === i.asUInt(DEPTH_LOG2.W)) |(buf_dual(i) & (buf_dualtag(i) === RspPtr))) | io.dec_tlu_force_halt + } + is (DONE) { + buf_nxtstate(i) := IDLE + buf_rst(i) := 1.U + buf_state_en(i) := 1.U + buf_ldfwd_in(i) := 0.U + buf_ldfwd_en(i) := buf_state_en(i) + } + } + + buf_byteen(i) := RegEnable(buf_byteen_in(i) , init = 0.U ,buf_wr_en(i)) + buf_data(i) := RegEnable(buf_data_in(i) , init = 0.U ,buf_data_en(i)) + withClock(io.lsu_bus_buf_c1_clk){ + buf_state(i) := RegEnable(buf_nxtstate(i) , init = IDLE ,buf_state_en(i)) + buf_dualtag(i) := RegEnable(buf_dualtag_in(i) , init = 0.U ,buf_wr_en(i)) + buf_dual(i) := RegEnable(buf_dual_in(i) , init = 0.U ,buf_wr_en(i)) + buf_samedw(i) := RegEnable(buf_samedw_in(i) , init = 0.U ,buf_wr_en(i)) + buf_nomerge(i) := RegEnable(buf_nomerge_in(i) , init = 0.U ,buf_wr_en(i)) + buf_dualhi(i) := RegEnable(buf_dualhi_in(i) , init = 0.U ,buf_wr_en(i)) + buf_sideeffect(i) := RegEnable(buf_sideeffect_in(i) , init = 0.U ,buf_wr_en(i)) + buf_unsign(i) := RegEnable(buf_unsign_in(i) , init = 0.U ,buf_wr_en(i)) + buf_write(i) := RegEnable(buf_write_in(i) , init = 0.U ,buf_wr_en(i)) + buf_sz(i) := RegEnable(buf_sz_in(i) , init = 0.U ,buf_wr_en(i)) + buf_addr(i) := RegEnable(buf_addr_in(i) , init = 0.U ,buf_wr_en(i)) + buf_ldfwd(i) := RegEnable(buf_ldfwd_in(i) , init = 0.U ,buf_ldfwd_en(i)) + buf_ldfwdtag(i) := RegEnable(buf_ldfwdtag_in(i) , init = 0.U ,buf_ldfwd_en(i)) + buf_error(i) := RegEnable(~buf_rst(i) , init = 0.U ,(buf_error_en(i)|buf_rst(i)).asBool) + buf_ageQ(i) := RegNext(buf_age_in(i) , init = VecInit((0 until 4).map(i=>false.B))) + buf_rspageQ(i) := RegNext(buf_rspage_in(i) , init = VecInit((0 until 4).map(i=>false.B))) + } + } + +////////////////////////////////////////////////////////////////////////////////// + buf_numvld_any := (io.lsu_busreq_m << io.ldst_dual_m) + (io.lsu_busreq_r << io.ldst_dual_r) + ibuf_valid + + {for(i <- 0 until DEPTH) yield ( buf_state(i) =/= IDLE).asUInt }.reduce(_+_) + buf_numvld_wrcmd_any := {for(i <- 0 until DEPTH) yield (( buf_state(i) === CMD) & ~buf_cmd_state_bus_en(i) & buf_write(i)).asUInt }.reduce(_+_) + buf_numvld_cmd_any := {for(i <- 0 until DEPTH) yield (( buf_state(i) === CMD) & ~buf_cmd_state_bus_en(i)).asUInt }.reduce(_+_) + buf_numvld_pend_any := {for(i <- 0 until DEPTH) yield (((buf_state(i) === CMD) & ~buf_cmd_state_bus_en(i)) | (buf_state(i) === WAIT)).asUInt }.reduce(_+_) + any_done_wait_state := {for(i <- 0 until DEPTH) yield buf_state(i) === DONE_WAIT }.reduce(_|_) + + io.lsu_bus_buffer_pend_any := buf_numvld_pend_any =/= 0.U + io.lsu_bus_buffer_full_any := Mux((io.ldst_dual_d & io.dec_lsu_valid_raw_d),buf_numvld_any(3,0) >= (DEPTH-1).asUInt(4.W), buf_numvld_any(3,0) === DEPTH.asUInt(4.W)) + io.lsu_bus_buffer_empty_any := ~((0 until DEPTH).map(i =>(buf_state(i)).asUInt).reduce(_|_)) & ~ibuf_valid & ~obuf_valid + + io.lsu_nonblock_load_valid_m := io.lsu_busreq_m & io.lsu_pkt_m.valid & io.lsu_pkt_m.load & ~io.flush_m_up & ~ io.ld_full_hit_m + io.lsu_nonblock_load_tag_m := WrPtr0_m(DEPTH_LOG2-1,0) + io.lsu_nonblock_load_inv_r := lsu_nonblock_load_valid_r & ~io.lsu_commit_r + io.lsu_nonblock_load_inv_tag_r := WrPtr0_r(DEPTH_LOG2-1,0) + + lsu_nonblock_load_data_ready := Mux1H((0 until DEPTH).map(i =>(buf_state(i) === DONE) -> ~(pt.BUILD_AXI_NATIVE & buf_write(i)))) + io.lsu_nonblock_load_data_error := Mux1H((0 until DEPTH).map(i =>(buf_state(i) === DONE & ~buf_write(i)) -> (buf_error(i)))) + io.lsu_nonblock_load_data_tag := Mux1H((0 until DEPTH).map(i =>(buf_state(i) === DONE & (~buf_dual(i) | ~buf_dualhi(i)) & ~buf_write(i)) -> intToUInt(i))) + lsu_nonblock_load_data_lo := Mux1H((0 until DEPTH).map(i =>(buf_state(i) === DONE & ~buf_write(i) & (~buf_dual(i) | ~buf_dualhi(i))) -> buf_data(i))) + lsu_nonblock_load_data_hi := Mux1H((0 until DEPTH).map(i =>(buf_state(i) === DONE & ~buf_write(i) & ( buf_dual(i) & buf_dualhi(i))) -> buf_data(i))) + + lsu_nonblock_addr_offset := buf_addr(io.lsu_nonblock_load_data_tag)(1,0) + lsu_nonblock_sz := buf_sz(io.lsu_nonblock_load_data_tag)(1,0) + lsu_nonblock_unsign := buf_unsign(io.lsu_nonblock_load_data_tag) + lsu_nonblock_dual := buf_dual(io.lsu_nonblock_load_data_tag) + lsu_nonblock_data_unalgn := (Cat(lsu_nonblock_load_data_hi(31,0), lsu_nonblock_load_data_lo(31,0)) >> 8*lsu_nonblock_addr_offset(1,0))(31,0) + io.lsu_nonblock_load_data_valid := lsu_nonblock_load_data_ready & ~io.lsu_nonblock_load_data_error + io.lsu_nonblock_load_data := Mux1H(Seq( + (lsu_nonblock_unsign & lsu_nonblock_sz === 0.U) -> Cat(Fill(24,0.U(1.W)),lsu_nonblock_data_unalgn(7,0)), + (lsu_nonblock_unsign & lsu_nonblock_sz === 1.U) -> Cat(Fill(16,0.U(1.W)),lsu_nonblock_data_unalgn(15,0)), + (~lsu_nonblock_unsign & lsu_nonblock_sz === 0.U) -> Cat(Fill(24,lsu_nonblock_data_unalgn(7)),lsu_nonblock_data_unalgn(7,0)), + (~lsu_nonblock_unsign & lsu_nonblock_sz === 1.U) -> Cat(Fill(16,lsu_nonblock_data_unalgn(15)),lsu_nonblock_data_unalgn(15,0)), + (lsu_nonblock_unsign & lsu_nonblock_sz === 2.U) -> lsu_nonblock_data_unalgn(31,0) + )) + bus_sideeffect_pend := Mux(obuf_valid,obuf_sideeffect & io.dec_tlu_sideeffect_posted_disable,Mux1H((0 until DEPTH).map(i =>(buf_state(i) === RESP) -> (buf_sideeffect(i) & io.dec_tlu_sideeffect_posted_disable)))) + bus_addr_match_pending := Mux1H((0 until DEPTH).map(i =>(pt.BUILD_AXI_NATIVE & obuf_valid & (obuf_addr(31,3) === buf_addr(i)(31,3))).asBool -> ((buf_state(i) === RESP) & ~((obuf_tag0 === intToUInt(i)) | (obuf_merge & (obuf_tag1 === intToUInt(i))))))) + + bus_cmd_ready := Mux(obuf_write, Mux((obuf_cmd_done | obuf_data_done), Mux(obuf_cmd_done, io.lsu_axi_wready, io.lsu_axi_awready), (io.lsu_axi_awready & io.lsu_axi_wready)), io.lsu_axi_arready) + bus_wcmd_sent := io.lsu_axi_awvalid & io.lsu_axi_awready + bus_wdata_sent := io.lsu_axi_wvalid & io.lsu_axi_wready + bus_cmd_sent := ((obuf_cmd_done | bus_wcmd_sent) & (obuf_data_done | bus_wdata_sent)) | (io.lsu_axi_arvalid & io.lsu_axi_arready) + + bus_rsp_read := io.lsu_axi_rvalid & io.lsu_axi_rready + bus_rsp_write := io.lsu_axi_bvalid & io.lsu_axi_bready + bus_rsp_read_tag := io.lsu_axi_rid(pt1.LSU_BUS_TAG-1,0) + bus_rsp_write_tag := io.lsu_axi_bid(pt1.LSU_BUS_TAG-1,0) + bus_rsp_write_error := bus_rsp_write & (io.lsu_axi_bresp(1,0) =/= 0.U(2.W)) + bus_rsp_read_error := bus_rsp_read & (io.lsu_axi_rresp(1,0) =/= 0.U(2.W)) + bus_rsp_rdata := io.lsu_axi_rdata(63,0) +////////////////////////////////////////////////////////////////////////////////// + lsu_axi_rdata_q := RegEnable(io.lsu_axi_rdata, init = 0.U, io.lsu_axi_rvalid&io.lsu_bus_clk_en) + withClock(io.lsu_c2_r_clk){ + io.lsu_busreq_r := RegNext(RegNext((io.lsu_busreq_m & ~io.flush_r & ~io.ld_full_hit_m), init = 0.U), init = 0.U) + WrPtr0_r := RegNext(WrPtr0_m, init = 0.U) + WrPtr1_r := RegNext(WrPtr1_m, init = 0.U) + lsu_nonblock_load_valid_r := RegNext(io.lsu_nonblock_load_valid_m, init = 0.U) + } + withClock(io.lsu_busm_clk){ + lsu_axi_awvalid_q := RegNext(io.lsu_axi_awvalid, init = 0.U) + lsu_axi_awready_q := RegNext(io.lsu_axi_awready, init = 0.U) + lsu_axi_wvalid_q := RegNext(io.lsu_axi_wvalid, init = 0.U) + lsu_axi_wready_q := RegNext(io.lsu_axi_wready, init = 0.U) + lsu_axi_arvalid_q := RegNext(io.lsu_axi_arvalid, init = 0.U) + lsu_axi_arready_q := RegNext(io.lsu_axi_arready, init = 0.U) + lsu_axi_bvalid_q := RegNext(io.lsu_axi_bvalid, init = 0.U) + lsu_axi_bready_q := RegNext(io.lsu_axi_bready, init = 0.U) + lsu_axi_rvalid_q := RegNext(io.lsu_axi_rvalid, init = 0.U) + lsu_axi_rready_q := RegNext(io.lsu_axi_rready, init = 0.U) + lsu_axi_bid_q := RegNext(io.lsu_axi_bid, init = 0.U) + lsu_axi_rid_q := RegNext(io.lsu_axi_rid, init = 0.U) + lsu_axi_bresp_q := RegNext(io.lsu_axi_bresp, init = 0.U) + lsu_axi_rresp_q := RegNext(io.lsu_axi_rresp, init = 0.U) + } +/////////////////////////////////////////////////////////////////////////////////// + + io.ld_fwddata_buf_lo := 0.U + io.ld_fwddata_buf_hi := 0.U + + lsu_imprecise_error_store_tag := Mux1H((0 until DEPTH).map(i =>(((buf_state(i) === DONE) & buf_error(i) & buf_write(i)) -> intToUInt(i)))) + io.lsu_imprecise_error_load_any := io.lsu_nonblock_load_data_error & ~io.lsu_imprecise_error_store_any + io.lsu_imprecise_error_store_any := {for(i <- 0 until DEPTH) yield io.lsu_bus_clk_en_q & (buf_state(i) === DONE) & buf_error(i) & buf_write(i)}.reduce(_|_) + io.lsu_imprecise_error_addr_any := Mux(io.lsu_imprecise_error_store_any, buf_addr(lsu_imprecise_error_store_tag), buf_addr(io.lsu_nonblock_load_data_tag)) + + bus_pend_trxnQ := 0.U(8.W) + bus_pend_trxn := 0.U(8.W) + bus_pend_trxn_ns := 0.U(8.W) + lsu_bus_cntr_overflow := 0.U(1.W) + io.lsu_bus_idle_any := true.B + + io.lsu_pmu_bus_trxn := (io.lsu_axi_awvalid & io.lsu_axi_awready) | (io.lsu_axi_wvalid & io.lsu_axi_wready) | (io.lsu_axi_arvalid & io.lsu_axi_arready) + io.lsu_pmu_bus_misaligned := io.lsu_busreq_r & io.ldst_dual_r & io.lsu_commit_r + io.lsu_pmu_bus_error := io.lsu_imprecise_error_load_any | io.lsu_imprecise_error_store_any + io.lsu_pmu_bus_busy := (io.lsu_axi_awvalid & ~io.lsu_axi_awready | (io.lsu_axi_wvalid & ~io.lsu_axi_wready) | (io.lsu_axi_arvalid & ~io.lsu_axi_arready)) + + io.lsu_axi_awvalid := obuf_valid & obuf_write & ~obuf_cmd_done & ~bus_addr_match_pending + io.lsu_axi_awid := obuf_tag0.asUInt + io.lsu_axi_awaddr := Mux(obuf_sideeffect, obuf_addr,Cat(obuf_addr(31,3),0.U(3.W))) + io.lsu_axi_awregion := obuf_addr(31,28) + io.lsu_axi_awlen := 0.U(8.W) + io.lsu_axi_awsize := Mux(obuf_sideeffect, Cat(false.B,obuf_sz),3.U(3.W)) + io.lsu_axi_awburst := 1.U(2.W) + io.lsu_axi_awlock := 0.U + io.lsu_axi_awcache := Mux(obuf_sideeffect, 0.U(4.W),15.U(4.W)) + io.lsu_axi_awprot := 0.U(3.W) + io.lsu_axi_awqos := 0.U(4.W) + + io.lsu_axi_wvalid := obuf_valid & obuf_write & ~obuf_data_done & ~bus_addr_match_pending + io.lsu_axi_wdata := obuf_data + io.lsu_axi_wstrb := obuf_byteen & Fill(8,obuf_write) + io.lsu_axi_wlast := 1.U + + io.lsu_axi_arvalid := obuf_valid & ~obuf_write & ~obuf_nosend & ~bus_addr_match_pending + io.lsu_axi_arid := obuf_tag0.asUInt + io.lsu_axi_araddr := io.lsu_axi_awaddr + io.lsu_axi_arregion := obuf_addr(31,28) + io.lsu_axi_arlen := 0.U(8.W) + io.lsu_axi_arsize := io.lsu_axi_awsize + io.lsu_axi_arburst := 1.U(2.W) + io.lsu_axi_arlock := 0.U + io.lsu_axi_arcache := io.lsu_axi_awcache + io.lsu_axi_arprot := 0.U + io.lsu_axi_arqos := 0.U + + io.lsu_axi_bready := 1.U + io.lsu_axi_rready := 1.U + + +} +object BusBufmain extends App{ + println("Generate Verilog") + println((new chisel3.stage.ChiselStage).emitVerilog((new el2_lsu_bus_buffer()))) +} diff --git a/src/main/scala/lsu/el2_lsu_bus_intf.scala b/src/main/scala/lsu/el2_lsu_bus_intf.scala new file mode 100644 index 00000000..c187e861 --- /dev/null +++ b/src/main/scala/lsu/el2_lsu_bus_intf.scala @@ -0,0 +1,299 @@ + +package lsu +import chisel3._ +import chisel3.util._ +import lib._ +import include._ +import snapshot._ +class el2_lsu_bus_intf extends Module with RequireAsyncReset{ + val io = IO (new Bundle { +// val clk = Input(Clock()) //implicit +// val rst_l = Input(1.W) //implicit + val scan_mode = Input(Bool()) + val dec_tlu_external_ldfwd_disable = Input(Bool()) // disable load to load forwarding for externals + val dec_tlu_wb_coalescing_disable = Input(Bool()) // disable write buffer coalescing + val dec_tlu_sideeffect_posted_disable = Input(Bool()) // disable the posted sideeffect load store to the bus + val lsu_c1_m_clk = Input(Clock()) + val lsu_c1_r_clk = Input(Clock()) + val lsu_c2_r_clk = Input(Clock()) + val lsu_bus_ibuf_c1_clk = Input(Clock()) + val lsu_bus_obuf_c1_clk = Input(Clock()) + val lsu_bus_buf_c1_clk = Input(Clock()) + val lsu_free_c2_clk = Input(Clock()) + val free_clk = Input(Clock()) + val lsu_busm_clk = Input(Clock()) + val dec_lsu_valid_raw_d = Input(Bool()) + val lsu_busreq_m = Input(Bool()) + val lsu_pkt_m = Input(new el2_lsu_pkt_t) + val lsu_pkt_r = Input(new el2_lsu_pkt_t) + val lsu_addr_d = Input(UInt(32.W)) + val lsu_addr_m = Input(UInt(32.W)) + val lsu_addr_r = Input(UInt(32.W)) + val end_addr_d = Input(UInt(32.W)) + val end_addr_m = Input(UInt(32.W)) + val end_addr_r = Input(UInt(32.W)) + val store_data_r = Input(UInt(32.W)) + val dec_tlu_force_halt = Input(Bool()) + val lsu_commit_r = Input(Bool()) + val is_sideeffects_m = Input(Bool()) + val flush_m_up = Input(Bool()) + val flush_r = Input(Bool()) + val lsu_axi_awready = Input(Bool()) + val lsu_axi_wready = Input(Bool()) + val lsu_axi_bvalid = Input(Bool()) + val lsu_axi_bresp = Input(UInt(2.W)) + val lsu_axi_bid = Input(UInt(pt1.LSU_BUS_TAG.W)) + val lsu_axi_arready = Input(Bool()) + val lsu_axi_rvalid = Input(Bool()) + val lsu_axi_rid = Input(UInt(pt1.LSU_BUS_TAG.W)) + val lsu_axi_rdata = Input(UInt(64.W)) + val lsu_axi_rresp = Input(UInt(2.W)) + val lsu_axi_rlast = Input(Bool()) + val lsu_bus_clk_en = Input(Bool()) + val lsu_busreq_r = Output(Bool()) + val lsu_bus_buffer_pend_any = Output(Bool()) + val lsu_bus_buffer_full_any = Output(Bool()) + val lsu_bus_buffer_empty_any = Output(Bool()) + val lsu_bus_idle_any = Output(Bool()) + val bus_read_data_m = Output(UInt(32.W)) + val lsu_imprecise_error_load_any = Output(Bool()) + val lsu_imprecise_error_store_any = Output(Bool()) + val lsu_imprecise_error_addr_any = Output(UInt(32.W)) + val lsu_nonblock_load_valid_m = Output(Bool()) + val lsu_nonblock_load_tag_m = Output(UInt(pt1.LSU_NUM_NBLOAD_WIDTH.W)) + val lsu_nonblock_load_inv_r = Output(Bool()) + val lsu_nonblock_load_inv_tag_r = Output(UInt(pt1.LSU_NUM_NBLOAD_WIDTH.W)) + val lsu_nonblock_load_data_valid = Output(Bool()) + val lsu_nonblock_load_data_error = Output(Bool()) + val lsu_nonblock_load_data_tag = Output(UInt(pt1.LSU_NUM_NBLOAD_WIDTH.W)) + val lsu_nonblock_load_data = Output(UInt(32.W)) + val lsu_pmu_bus_trxn = Output(Bool()) + val lsu_pmu_bus_misaligned = Output(Bool()) + val lsu_pmu_bus_error = Output(Bool()) + val lsu_pmu_bus_busy = Output(Bool()) + val lsu_axi_awvalid = Output(Bool()) + val lsu_axi_awid = Output(UInt(pt1.LSU_BUS_TAG.W)) + val lsu_axi_awaddr = Output(UInt(32.W)) + val lsu_axi_awregion = Output(UInt(4.W)) + val lsu_axi_awlen = Output(UInt(8.W)) + val lsu_axi_awsize = Output(UInt(3.W)) + val lsu_axi_awburst = Output(UInt(2.W)) + val lsu_axi_awlock = Output(Bool()) + val lsu_axi_awcache = Output(UInt(4.W)) + val lsu_axi_awprot = Output(UInt(3.W)) + val lsu_axi_awqos = Output(UInt(4.W)) + val lsu_axi_wvalid = Output(Bool()) + val lsu_axi_wdata = Output(UInt(64.W)) + val lsu_axi_wstrb = Output(UInt(8.W)) + val lsu_axi_wlast = Output(Bool()) + val lsu_axi_bready = Output(Bool()) + val lsu_axi_arvalid = Output(Bool()) + val lsu_axi_arid = Output(UInt(pt1.LSU_BUS_TAG.W)) + val lsu_axi_araddr = Output(UInt(32.W)) + val lsu_axi_arregion = Output(UInt(4.W)) + val lsu_axi_arlen = Output(UInt(8.W)) + val lsu_axi_arsize = Output(UInt(3.W)) + val lsu_axi_arburst = Output(UInt(2.W)) + val lsu_axi_arlock = Output(Bool()) + val lsu_axi_arcache = Output(UInt(4.W)) + val lsu_axi_arprot = Output(UInt(3.W)) + val lsu_axi_arqos = Output(UInt(4.W)) + val lsu_axi_rready = Output(Bool()) + }) + + val lsu_bus_clk_en_q = WireInit(Bool(), init = false.B) + val ldst_dual_d = WireInit(Bool(), init = false.B) + val ldst_dual_m = WireInit(Bool(), init = false.B) + val ldst_dual_r = WireInit(Bool(), init = false.B) + val ldst_byteen_m = WireInit(UInt(4.W), init = 0.U) + val ldst_byteen_r = WireInit(UInt(4.W), init = 0.U) + val ldst_byteen_ext_m = WireInit(UInt(8.W), init = 0.U) + val ldst_byteen_ext_r = WireInit(UInt(8.W), init = 0.U) + val ldst_byteen_hi_m = WireInit(UInt(4.W), init = 0.U) + val ldst_byteen_hi_r = WireInit(UInt(4.W), init = 0.U) + val ldst_byteen_lo_m = WireInit(UInt(4.W), init = 0.U) + val ldst_byteen_lo_r = WireInit(UInt(4.W), init = 0.U) + val is_sideeffects_r = WireInit(Bool(), init = false.B) + val store_data_ext_r = WireInit(UInt(64.W), init = 0.U) + val store_data_hi_r = WireInit(UInt(32.W), init = 0.U) + val store_data_lo_r = WireInit(UInt(32.W), init = 0.U) + val addr_match_dw_lo_r_m = WireInit(Bool(), init = false.B) + val addr_match_word_lo_r_m = WireInit(Bool(), init = false.B) + val no_word_merge_r = WireInit(Bool(), init = false.B) + val no_dword_merge_r = WireInit(Bool(), init = false.B) + val ld_addr_rhit_lo_lo = WireInit(Bool(), init = false.B) + val ld_addr_rhit_hi_lo = WireInit(Bool(), init = false.B) + val ld_addr_rhit_lo_hi = WireInit(Bool(), init = false.B) + val ld_addr_rhit_hi_hi = WireInit(Bool(), init = false.B) + val ld_byte_rhit_lo_lo = WireInit(UInt(4.W), init = 0.U) + val ld_byte_rhit_hi_lo = WireInit(UInt(4.W), init = 0.U) + val ld_byte_rhit_lo_hi = WireInit(UInt(4.W), init = 0.U) + val ld_byte_rhit_hi_hi = WireInit(UInt(4.W), init = 0.U) + val ld_byte_hit_lo = WireInit(UInt(4.W), init = 0.U) + val ld_byte_rhit_lo = WireInit(UInt(4.W), init = 0.U) + val ld_byte_hit_hi = WireInit(UInt(4.W), init = 0.U) + val ld_byte_rhit_hi = WireInit(UInt(4.W), init = 0.U) + val ld_fwddata_rpipe_lo = WireInit(UInt(32.W), init = 0.U) + val ld_fwddata_rpipe_hi = WireInit(UInt(32.W), init = 0.U) + val ld_byte_hit_buf_lo = WireInit(UInt(4.W), init = 0.U) + val ld_byte_hit_buf_hi = WireInit(UInt(4.W), init = 0.U) + val ld_fwddata_buf_lo = WireInit(UInt(32.W), init = 0.U) + val ld_fwddata_buf_hi = WireInit(UInt(32.W), init = 0.U) + val ld_fwddata_lo = WireInit(UInt(64.W), init = 0.U) + val ld_fwddata_hi = WireInit(UInt(64.W), init = 0.U) + val ld_fwddata_m = WireInit(UInt(64.W), init = 0.U) + val ld_full_hit_hi_m = WireInit(Bool(), init = true.B) + val ld_full_hit_lo_m = WireInit(Bool(), init = true.B) + val ld_full_hit_m = WireInit(Bool(), init = false.B) + val bus_buffer = Module(new el2_lsu_bus_buffer) + bus_buffer.io.scan_mode := io.scan_mode + bus_buffer.io.dec_tlu_external_ldfwd_disable := io.dec_tlu_external_ldfwd_disable + bus_buffer.io.dec_tlu_wb_coalescing_disable := io.dec_tlu_wb_coalescing_disable + bus_buffer.io.dec_tlu_sideeffect_posted_disable := io.dec_tlu_sideeffect_posted_disable + bus_buffer.io.dec_tlu_force_halt := io.dec_tlu_force_halt + bus_buffer.io.lsu_c2_r_clk := io.lsu_c2_r_clk + bus_buffer.io.lsu_bus_ibuf_c1_clk := io.lsu_bus_ibuf_c1_clk + bus_buffer.io.lsu_bus_obuf_c1_clk := io.lsu_bus_obuf_c1_clk + bus_buffer.io.lsu_bus_buf_c1_clk := io.lsu_bus_buf_c1_clk + bus_buffer.io.lsu_free_c2_clk := io.lsu_free_c2_clk + bus_buffer.io.lsu_busm_clk := io.lsu_busm_clk + bus_buffer.io.dec_lsu_valid_raw_d := io.dec_lsu_valid_raw_d + bus_buffer.io.lsu_pkt_m := io.lsu_pkt_m + bus_buffer.io.lsu_pkt_r := io.lsu_pkt_r + bus_buffer.io.lsu_addr_m := io.lsu_addr_m + bus_buffer.io.end_addr_m := io.end_addr_m + bus_buffer.io.lsu_addr_r := io.lsu_addr_r + bus_buffer.io.end_addr_r := io.end_addr_r + bus_buffer.io.store_data_r := io.store_data_r + bus_buffer.io.no_word_merge_r := no_word_merge_r + bus_buffer.io.no_dword_merge_r := no_dword_merge_r + bus_buffer.io.lsu_busreq_m := io.lsu_busreq_m + bus_buffer.io.ld_full_hit_m := ld_full_hit_m + bus_buffer.io.flush_m_up := io.flush_m_up + bus_buffer.io.flush_r := io.flush_r + bus_buffer.io.lsu_commit_r := io.lsu_commit_r + bus_buffer.io.is_sideeffects_r := is_sideeffects_r + bus_buffer.io.ldst_dual_d := ldst_dual_d + bus_buffer.io.ldst_dual_m := ldst_dual_m + bus_buffer.io.ldst_dual_r := ldst_dual_r + bus_buffer.io.ldst_byteen_ext_m := ldst_byteen_ext_m + bus_buffer.io.lsu_axi_awready := io.lsu_axi_awready + bus_buffer.io.lsu_axi_wready := io.lsu_axi_wready + bus_buffer.io.lsu_axi_bvalid := io.lsu_axi_bvalid + bus_buffer.io.lsu_axi_bresp := io.lsu_axi_bresp + bus_buffer.io.lsu_axi_bid := io.lsu_axi_bid + bus_buffer.io.lsu_axi_arready := io.lsu_axi_arready + bus_buffer.io.lsu_axi_rvalid := io.lsu_axi_rvalid + bus_buffer.io.lsu_axi_rid := io.lsu_axi_rid + bus_buffer.io.lsu_axi_rdata := io.lsu_axi_rdata + bus_buffer.io.lsu_axi_rresp := io.lsu_axi_rresp + bus_buffer.io.lsu_bus_clk_en := io.lsu_bus_clk_en + bus_buffer.io.lsu_bus_clk_en_q := lsu_bus_clk_en_q + + io.lsu_busreq_r := bus_buffer.io.lsu_busreq_r + io.lsu_bus_buffer_pend_any := bus_buffer.io.lsu_bus_buffer_pend_any + io.lsu_bus_buffer_full_any := bus_buffer.io.lsu_bus_buffer_full_any + io.lsu_bus_buffer_empty_any := bus_buffer.io.lsu_bus_buffer_empty_any + io.lsu_bus_idle_any := bus_buffer.io.lsu_bus_idle_any + ld_byte_hit_buf_lo := bus_buffer.io.ld_byte_hit_buf_lo + ld_byte_hit_buf_hi := bus_buffer.io.ld_byte_hit_buf_hi + ld_fwddata_buf_lo := bus_buffer.io.ld_fwddata_buf_lo + ld_fwddata_buf_hi := bus_buffer.io.ld_fwddata_buf_hi + io.lsu_imprecise_error_load_any := bus_buffer.io.lsu_imprecise_error_load_any + io.lsu_imprecise_error_store_any := bus_buffer.io.lsu_imprecise_error_store_any + io.lsu_imprecise_error_addr_any := bus_buffer.io.lsu_imprecise_error_addr_any + io.lsu_nonblock_load_valid_m := bus_buffer.io.lsu_nonblock_load_valid_m + io.lsu_nonblock_load_tag_m := bus_buffer.io.lsu_nonblock_load_tag_m + io.lsu_nonblock_load_inv_r := bus_buffer.io.lsu_nonblock_load_inv_r + io.lsu_nonblock_load_inv_tag_r := bus_buffer.io.lsu_nonblock_load_inv_tag_r + io.lsu_nonblock_load_data_valid := bus_buffer.io.lsu_nonblock_load_data_valid + io.lsu_nonblock_load_data_error := bus_buffer.io.lsu_nonblock_load_data_error + io.lsu_nonblock_load_data_tag := bus_buffer.io.lsu_nonblock_load_data_tag + io.lsu_nonblock_load_data := bus_buffer.io.lsu_nonblock_load_data + io.lsu_pmu_bus_trxn := bus_buffer.io.lsu_pmu_bus_trxn + io.lsu_pmu_bus_misaligned := bus_buffer.io.lsu_pmu_bus_misaligned + io.lsu_pmu_bus_error := bus_buffer.io.lsu_pmu_bus_error + io.lsu_pmu_bus_busy := bus_buffer.io.lsu_pmu_bus_busy + io.lsu_axi_awvalid := bus_buffer.io.lsu_axi_awvalid + io.lsu_axi_awid := bus_buffer.io.lsu_axi_awid + io.lsu_axi_awaddr := bus_buffer.io.lsu_axi_awaddr + io.lsu_axi_awregion := bus_buffer.io.lsu_axi_awregion + io.lsu_axi_awlen := bus_buffer.io.lsu_axi_awlen + io.lsu_axi_awsize := bus_buffer.io.lsu_axi_awsize + io.lsu_axi_awburst := bus_buffer.io.lsu_axi_awburst + io.lsu_axi_awlock := bus_buffer.io.lsu_axi_awlock + io.lsu_axi_awcache := bus_buffer.io.lsu_axi_awcache + io.lsu_axi_awprot := bus_buffer.io.lsu_axi_awprot + io.lsu_axi_awqos := bus_buffer.io.lsu_axi_awqos + io.lsu_axi_wvalid := bus_buffer.io.lsu_axi_wvalid + io.lsu_axi_wdata := bus_buffer.io.lsu_axi_wdata + io.lsu_axi_wstrb := bus_buffer.io.lsu_axi_wstrb + io.lsu_axi_wlast := bus_buffer.io.lsu_axi_wlast + io.lsu_axi_bready := bus_buffer.io.lsu_axi_bready + io.lsu_axi_arvalid := bus_buffer.io.lsu_axi_arvalid + io.lsu_axi_arid := bus_buffer.io.lsu_axi_arid + io.lsu_axi_araddr := bus_buffer.io.lsu_axi_araddr + io.lsu_axi_arregion := bus_buffer.io.lsu_axi_arregion + io.lsu_axi_arlen := bus_buffer.io.lsu_axi_arlen + io.lsu_axi_arsize := bus_buffer.io.lsu_axi_arsize + io.lsu_axi_arburst := bus_buffer.io.lsu_axi_arburst + io.lsu_axi_arlock := bus_buffer.io.lsu_axi_arlock + io.lsu_axi_arcache := bus_buffer.io.lsu_axi_arcache + io.lsu_axi_arprot := bus_buffer.io.lsu_axi_arprot + io.lsu_axi_arqos := bus_buffer.io.lsu_axi_arqos + io.lsu_axi_rready := bus_buffer.io.lsu_axi_rready + + ldst_byteen_m := Mux1H(Seq(io.lsu_pkt_r.word.asBool -> 15.U(4.W), io.lsu_pkt_r.half.asBool -> 3.U(4.W), io.lsu_pkt_r.by.asBool -> 1.U(4.W))) + ldst_dual_d := io.lsu_addr_d(2) =/= io.end_addr_d(2) + addr_match_dw_lo_r_m := (io.lsu_addr_r(31,3) === io.lsu_addr_m(31,3)) + addr_match_word_lo_r_m := addr_match_dw_lo_r_m & ~(io.lsu_addr_r(2)^io.lsu_addr_m(2)) + no_word_merge_r := io.lsu_busreq_r & ~ldst_dual_r & io.lsu_busreq_m & (io.lsu_pkt_m.load | ~addr_match_word_lo_r_m) + no_dword_merge_r := io.lsu_busreq_r & ~ldst_dual_r & io.lsu_busreq_m & (io.lsu_pkt_m.load | ~addr_match_dw_lo_r_m) + ldst_byteen_ext_m := Cat(0.U(4.W),ldst_byteen_m(3,0)) << io.lsu_addr_m(1,0) + ldst_byteen_ext_r := Cat(0.U(4.W),ldst_byteen_r(3,0)) << io.lsu_addr_r(1,0) + store_data_ext_r := Cat(0.U(32.W),io.store_data_r(31,0)) << Cat(io.lsu_addr_r(1,0),0.U(3.W)) + ldst_byteen_hi_m := ldst_byteen_ext_m(7,4) + ldst_byteen_lo_m := ldst_byteen_ext_m(3,0) + ldst_byteen_hi_r := ldst_byteen_ext_r(7,4) + ldst_byteen_lo_r := ldst_byteen_ext_r(3,0) + store_data_hi_r := store_data_ext_r(63,32) + store_data_lo_r := store_data_ext_r(31,0) + ld_addr_rhit_lo_lo := (io.lsu_addr_m(31,2) === io.lsu_addr_r(31,2)) & io.lsu_pkt_r.valid & io.lsu_pkt_r.store & io.lsu_busreq_m + ld_addr_rhit_lo_hi := (io.end_addr_m(31,2) === io.lsu_addr_r(31,2)) & io.lsu_pkt_r.valid & io.lsu_pkt_r.store & io.lsu_busreq_m + ld_addr_rhit_hi_lo := (io.lsu_addr_m(31,2) === io.end_addr_r(31,2)) & io.lsu_pkt_r.valid & io.lsu_pkt_r.store & io.lsu_busreq_m + ld_addr_rhit_hi_hi := (io.end_addr_m(31,2) === io.end_addr_r(31,2)) & io.lsu_pkt_r.valid & io.lsu_pkt_r.store & io.lsu_busreq_m + ld_byte_rhit_lo_lo := (0 until 4).map(i =>(ld_addr_rhit_lo_lo & ldst_byteen_lo_r(i) & ldst_byteen_lo_m(i)).asUInt).reverse.reduce(Cat(_,_)) + ld_byte_rhit_lo_hi := (0 until 4).map(i =>(ld_addr_rhit_lo_hi & ldst_byteen_lo_r(i) & ldst_byteen_hi_m(i)).asUInt).reverse.reduce(Cat(_,_)) + ld_byte_rhit_hi_lo := (0 until 4).map(i =>(ld_addr_rhit_hi_lo & ldst_byteen_hi_r(i) & ldst_byteen_lo_m(i)).asUInt).reverse.reduce(Cat(_,_)) + ld_byte_rhit_hi_hi := (0 until 4).map(i =>(ld_addr_rhit_hi_hi & ldst_byteen_hi_r(i) & ldst_byteen_hi_m(i)).asUInt).reverse.reduce(Cat(_,_)) + ld_byte_hit_lo := (0 until 4).map(i =>(ld_byte_rhit_lo_lo(i) | ld_byte_rhit_hi_lo(i) | ld_byte_hit_buf_lo(i)).asUInt).reverse.reduce(Cat(_,_)) + ld_byte_hit_hi := (0 until 4).map(i =>(ld_byte_rhit_lo_hi(i) | ld_byte_rhit_hi_hi(i) | ld_byte_hit_buf_hi(i)).asUInt).reverse.reduce(Cat(_,_)) + ld_byte_rhit_lo := (0 until 4).map(i =>(ld_byte_rhit_lo_lo(i) | ld_byte_rhit_hi_lo(i) ).asUInt).reverse.reduce(Cat(_,_)) + ld_byte_rhit_hi := (0 until 4).map(i =>(ld_byte_rhit_lo_hi(i) | ld_byte_rhit_hi_hi(i) ).asUInt).reverse.reduce(Cat(_,_)) + ld_fwddata_rpipe_lo := (0 until 4).map(i =>(Mux1H(Seq(ld_byte_rhit_lo_lo(i) -> store_data_lo_r((8*i)+7,(8*i)), ld_byte_rhit_hi_lo(i) -> store_data_hi_r((8*i)+7,(8*i))))).asUInt).reverse.reduce(Cat(_,_)) + ld_fwddata_rpipe_hi := (0 until 4).map(i =>(Mux1H(Seq(ld_byte_rhit_lo_hi(i) -> store_data_lo_r((8*i)+7,(8*i)), ld_byte_rhit_hi_hi(i) -> store_data_hi_r((8*i)+7,(8*i))))).asUInt).reverse.reduce(Cat(_,_)) + ld_fwddata_lo := (0 until 4).map(i =>(Mux(ld_byte_rhit_lo(i), ld_fwddata_rpipe_lo((8*i)+7,(8*i)), ld_fwddata_buf_lo((8*i)+7,(8*i)))).asUInt).reverse.reduce(Cat(_,_)) + ld_fwddata_hi := (0 until 4).map(i =>(Mux(ld_byte_rhit_hi(i), ld_fwddata_rpipe_hi((8*i)+7,(8*i)), ld_fwddata_buf_hi((8*i)+7,(8*i)))).asUInt).reverse.reduce(Cat(_,_)) + ld_full_hit_lo_m := (0 until 4).map(i =>((ld_byte_hit_lo(i) | ~ldst_byteen_lo_m(i))).asUInt).reduce(_&_) + ld_full_hit_hi_m := (0 until 4).map(i =>((ld_byte_hit_hi(i) | ~ldst_byteen_hi_m(i))).asUInt).reduce(_&_) + ld_full_hit_m := ld_full_hit_lo_m & ld_full_hit_hi_m & io.lsu_busreq_m & io.lsu_pkt_m.load & ~io.is_sideeffects_m + ld_fwddata_m := Cat(ld_fwddata_hi(31,0), ld_fwddata_lo(31,0)) >> (8.U*io.lsu_addr_m(1,0)) + io.bus_read_data_m := ld_fwddata_m(31,0) + + withClock(io.free_clk) { + lsu_bus_clk_en_q := RegNext(io.lsu_bus_clk_en, init = 0.U) + } + withClock(io.lsu_c1_m_clk) { + ldst_dual_m := RegNext(io.lsu_bus_clk_en, init = 0.U) + } + withClock(io.lsu_c1_r_clk) { + ldst_dual_r := RegNext(io.lsu_bus_clk_en, init = 0.U) + is_sideeffects_r := RegNext(io.lsu_bus_clk_en, init = 0.U) + ldst_byteen_r := RegNext(io.lsu_bus_clk_en, init = 0.U(4.W)) + } +} + +object BusIntfMain extends App{ + println("Generate Verilog") + println((new chisel3.stage.ChiselStage).emitVerilog(new el2_lsu_bus_intf())) +} \ No newline at end of file diff --git a/src/main/scala/lsu/el2_lsu_clkdomain.scala b/src/main/scala/lsu/el2_lsu_clkdomain.scala new file mode 100644 index 00000000..02b9c2dd --- /dev/null +++ b/src/main/scala/lsu/el2_lsu_clkdomain.scala @@ -0,0 +1,120 @@ + +package lsu +import chisel3._ +import chisel3.util._ +import lib._ +import include._ +import snapshot._ + +//noinspection ScalaStyle +class el2_lsu_clkdomain extends Module with RequireAsyncReset with el2_lib{ + val io = IO (new Bundle { + /* Implicit + val clk = Input(Clock()) // clock + val rst_l = Input(1.W) // reset +*/ + val free_clk = Input(Clock()) // clock + // Inputs + val clk_override = Input(Bool()) // chciken bit to turn off clock gating + val addr_in_dccm_m = Input(Bool()) // address in dccm + val dma_dccm_req = Input(Bool()) // dma is active + val ldst_stbuf_reqvld_r = Input(Bool()) // allocating in to the store queue + + val stbuf_reqvld_any = Input(Bool()) // stbuf is draining + val stbuf_reqvld_flushed_any = Input(Bool()) // instruction going to stbuf is flushed + val lsu_busreq_r = Input(Bool()) // busreq in r + val lsu_bus_buffer_pend_any = Input(Bool()) // bus buffer has a pending bus entry + val lsu_bus_buffer_empty_any = Input(Bool()) // external bus buffer is empty + val lsu_stbuf_empty_any = Input(Bool()) // stbuf is empty + + val lsu_bus_clk_en = Input(Bool()) // bus clock enable + + val lsu_p = Input(new el2_lsu_pkt_t) // lsu packet in decode + val lsu_pkt_d = Input(new el2_lsu_pkt_t) // lsu packet in d + val lsu_pkt_m = Input(new el2_lsu_pkt_t) // lsu packet in m + val lsu_pkt_r = Input(new el2_lsu_pkt_t) // lsu packet in r + + // Outputs + val lsu_c1_m_clk = Output(Clock()) // m pipe single pulse clock + val lsu_c1_r_clk = Output(Clock()) // r pipe single pulse clock + + val lsu_c2_m_clk = Output(Clock()) // m pipe double pulse clock + val lsu_c2_r_clk = Output(Clock()) // r pipe double pulse clock + + val lsu_store_c1_m_clk = Output(Clock()) // store in m + val lsu_store_c1_r_clk = Output(Clock()) // store in r + + val lsu_stbuf_c1_clk = Output(Clock()) + val lsu_bus_obuf_c1_clk = Output(Clock()) // ibuf clock + val lsu_bus_ibuf_c1_clk = Output(Clock()) // ibuf clock + val lsu_bus_buf_c1_clk = Output(Clock()) // ibuf clock + val lsu_busm_clk = Output(Clock()) // bus clock + + val lsu_free_c2_clk = Output(Clock()) + + val scan_mode = Input(Bool()) +}) + + //------------------------------------------------------------------------------------------- + // Clock Enable Logic + //------------------------------------------------------------------------------------------- + val lsu_c1_d_clken_q = Wire(Bool()) + val lsu_c1_m_clken_q = Wire(Bool()) + val lsu_c1_r_clken_q = Wire(Bool()) + val lsu_free_c1_clken_q = Wire(Bool()) + val lsu_c1_d_clken = io.lsu_p.valid | io.dma_dccm_req | io.clk_override + val lsu_c1_m_clken = io.lsu_pkt_d.valid | lsu_c1_d_clken_q | io.clk_override + val lsu_c1_r_clken = io.lsu_pkt_m.valid | lsu_c1_m_clken_q | io.clk_override + + val lsu_c2_m_clken = lsu_c1_m_clken | lsu_c1_m_clken_q | io.clk_override + val lsu_c2_r_clken = lsu_c1_r_clken | lsu_c1_r_clken_q | io.clk_override + + val lsu_store_c1_m_clken = ((lsu_c1_m_clken & io.lsu_pkt_d.store) | io.clk_override) + val lsu_store_c1_r_clken = ((lsu_c1_r_clken & io.lsu_pkt_m.store) | io.clk_override) + val lsu_stbuf_c1_clken = io.ldst_stbuf_reqvld_r | io.stbuf_reqvld_any | io.stbuf_reqvld_flushed_any | io.clk_override + val lsu_bus_ibuf_c1_clken = io.lsu_busreq_r | io.clk_override + val lsu_bus_obuf_c1_clken = (io.lsu_bus_buffer_pend_any | io.lsu_busreq_r | io.clk_override) & io.lsu_bus_clk_en + val lsu_bus_buf_c1_clken = ~io.lsu_bus_buffer_empty_any | io.lsu_busreq_r | io.clk_override + + val lsu_free_c1_clken = (io.lsu_p.valid | io.lsu_pkt_d.valid | io.lsu_pkt_m.valid | io.lsu_pkt_r.valid) | ~io.lsu_bus_buffer_empty_any | ~io.lsu_stbuf_empty_any | io.clk_override + val lsu_free_c2_clken = lsu_free_c1_clken | lsu_free_c1_clken_q | io.clk_override + + + lsu_free_c1_clken_q := withClock(io.free_clk) {RegNext(lsu_free_c1_clken,0.U)} + + lsu_c1_d_clken_q := withClock(io.lsu_free_c2_clk) {RegNext(lsu_c1_d_clken, 0.U)} + lsu_c1_m_clken_q := withClock(io.lsu_free_c2_clk) {RegNext(lsu_c1_m_clken, 0.U)} + lsu_c1_r_clken_q := withClock(io.lsu_free_c2_clk) {RegNext(lsu_c1_r_clken, 0.U)} + + val lsu_c1m_cgc = Module(new rvclkhdr); lsu_c1m_cgc.io.en := lsu_c1_m_clken ; io.lsu_c1_m_clk := lsu_c1m_cgc.io.l1clk + val lsu_c1r_cgc = Module(new rvclkhdr); lsu_c1r_cgc.io.en := lsu_c1_r_clken ; io.lsu_c1_r_clk := lsu_c1r_cgc.io.l1clk + val lsu_c2m_cgc = Module(new rvclkhdr); lsu_c2m_cgc.io.en := lsu_c2_m_clken ; io.lsu_c2_m_clk := lsu_c2m_cgc.io.l1clk + val lsu_c2r_cgc = Module(new rvclkhdr); lsu_c2r_cgc.io.en := lsu_c2_r_clken ; io.lsu_c2_r_clk := lsu_c2r_cgc.io.l1clk + val lsu_store_c1m_cgc = Module(new rvclkhdr); lsu_store_c1m_cgc.io.en := lsu_store_c1_m_clken ; io.lsu_store_c1_m_clk := lsu_store_c1m_cgc.io.l1clk + val lsu_store_c1r_cgc = Module(new rvclkhdr); lsu_store_c1r_cgc.io.en := lsu_store_c1_r_clken ; io.lsu_store_c1_r_clk := lsu_store_c1r_cgc.io.l1clk + val lsu_stbuf_c1_cgc = Module(new rvclkhdr); lsu_stbuf_c1_cgc.io.en := lsu_stbuf_c1_clken ; io.lsu_stbuf_c1_clk := lsu_stbuf_c1_cgc.io.l1clk + val lsu_bus_ibuf_c1_cgc = Module(new rvclkhdr); lsu_bus_ibuf_c1_cgc.io.en := lsu_bus_ibuf_c1_clken; io.lsu_bus_ibuf_c1_clk := lsu_bus_ibuf_c1_cgc.io.l1clk + val lsu_bus_obuf_c1_cgc = Module(new rvclkhdr); lsu_bus_obuf_c1_cgc.io.en := lsu_bus_obuf_c1_clken; io.lsu_bus_obuf_c1_clk := lsu_bus_obuf_c1_cgc.io.l1clk + val lsu_bus_buf_c1_cgc = Module(new rvclkhdr); lsu_bus_buf_c1_cgc.io.en := lsu_bus_buf_c1_clken ; io.lsu_bus_buf_c1_clk := lsu_bus_buf_c1_cgc.io.l1clk + val lsu_busm_cgc = Module(new rvclkhdr); lsu_busm_cgc.io.en := io.lsu_bus_clk_en ; io.lsu_busm_clk := lsu_busm_cgc.io.l1clk + val lsu_free_cgc = Module(new rvclkhdr); lsu_free_cgc.io.en := lsu_free_c2_clken ; io.lsu_free_c2_clk := lsu_free_cgc.io.l1clk + + lsu_c1m_cgc.io.clk := clock; lsu_c1m_cgc.io.scan_mode := io.scan_mode + lsu_c1r_cgc.io.clk := clock; lsu_c1r_cgc.io.scan_mode := io.scan_mode + lsu_c2m_cgc.io.clk := clock; lsu_c2m_cgc.io.scan_mode := io.scan_mode + lsu_c2r_cgc.io.clk := clock; lsu_c2r_cgc.io.scan_mode := io.scan_mode + lsu_store_c1m_cgc.io.clk := clock; lsu_store_c1m_cgc.io.scan_mode := io.scan_mode + lsu_store_c1r_cgc.io.clk := clock; lsu_store_c1r_cgc.io.scan_mode := io.scan_mode + lsu_stbuf_c1_cgc.io.clk := clock; lsu_stbuf_c1_cgc.io.scan_mode := io.scan_mode + lsu_bus_ibuf_c1_cgc.io.clk := clock; lsu_bus_ibuf_c1_cgc.io.scan_mode := io.scan_mode + lsu_bus_obuf_c1_cgc.io.clk := clock; lsu_bus_obuf_c1_cgc.io.scan_mode := io.scan_mode + lsu_bus_buf_c1_cgc.io.clk := clock; lsu_bus_buf_c1_cgc.io.scan_mode := io.scan_mode + lsu_busm_cgc.io.clk := clock; lsu_busm_cgc.io.scan_mode := io.scan_mode + lsu_free_cgc.io.clk := clock; lsu_free_cgc.io.scan_mode := io.scan_mode + + +} +object cgcmain extends App{ + println("Generate Verilog") + println((new chisel3.stage.ChiselStage).emitVerilog(new el2_lsu_clkdomain())) +} diff --git a/src/main/scala/lsu/el2_lsu_dccm_ctl.scala b/src/main/scala/lsu/el2_lsu_dccm_ctl.scala new file mode 100644 index 00000000..de73cf25 --- /dev/null +++ b/src/main/scala/lsu/el2_lsu_dccm_ctl.scala @@ -0,0 +1,367 @@ +package lsu +import include._ +import lib._ +import snapshot._ + +import chisel3._ +import chisel3.util._ +import chisel3.iotesters.{ChiselFlatSpec, Driver, PeekPokeTester} +import chisel3.experimental.ChiselEnum +import chisel3.experimental.{withClock, withReset, withClockAndReset} +import chisel3.experimental.BundleLiterals._ +import chisel3.tester._ +import chisel3.tester.RawTester.test +import chisel3.util.HasBlackBoxResource + +import chisel3.experimental.chiselName +@chiselName +class el2_lsu_dccm_ctl extends Module with RequireAsyncReset +{ + val io = IO(new Bundle{ + //val rst_l = IO(Input(1.W)) //implicit + val lsu_c2_m_clk = Input(Clock()) + val lsu_c2_r_clk = Input(Clock()) + val lsu_free_c2_clk = Input(Clock()) //tbd + val lsu_c1_r_clk = Input(Clock()) + val lsu_store_c1_r_clk = Input(Clock()) + // val clk = Input(Clock()) //tbd + + val lsu_pkt_d = Input(new el2_lsu_pkt_t()) + val lsu_pkt_m = Input(new el2_lsu_pkt_t()) + val lsu_pkt_r = Input(new el2_lsu_pkt_t()) + + val addr_in_dccm_d = Input(UInt(1.W)) + val addr_in_dccm_m = Input(UInt(1.W)) + val addr_in_dccm_r = Input(UInt(1.W)) + val addr_in_pic_d = Input(UInt(1.W)) + val addr_in_pic_m = Input(UInt(1.W)) + val addr_in_pic_r = Input(UInt(1.W)) + + val lsu_raw_fwd_lo_r = Input(UInt(1.W)) + val lsu_raw_fwd_hi_r = Input(UInt(1.W)) + val lsu_commit_r = Input(UInt(1.W)) + + // lsu address down the pipe + val lsu_addr_d = Input(UInt(32.W))//verify bits + val lsu_addr_m = Input(UInt(pt1.DCCM_BITS.W)) + val lsu_addr_r = Input(UInt(32.W)) + + // lsu address down the pipe - needed to check unaligned + val end_addr_d = Input(UInt(pt1.DCCM_BITS.W)) + val end_addr_m = Input(UInt(pt1.DCCM_BITS.W)) + val end_addr_r = Input(UInt(pt1.DCCM_BITS.W)) + + val stbuf_reqvld_any = Input(UInt(1.W)) + val stbuf_addr_any = Input(UInt(pt1.LSU_SB_BITS.W)) + val stbuf_data_any = Input(UInt(pt1.DCCM_DATA_WIDTH.W)) + val stbuf_ecc_any = Input(UInt(pt1.DCCM_ECC_WIDTH.W)) + val stbuf_fwddata_hi_m = Input(UInt(pt1.DCCM_DATA_WIDTH.W)) + val stbuf_fwddata_lo_m = Input(UInt(pt1.DCCM_DATA_WIDTH.W)) + val stbuf_fwdbyteen_lo_m = Input(UInt(pt1.DCCM_BYTE_WIDTH.W)) + val stbuf_fwdbyteen_hi_m = Input(UInt(pt1.DCCM_BYTE_WIDTH.W)) + val dccm_rdata_hi_r = Output(UInt(pt1.DCCM_DATA_WIDTH.W)) + val dccm_rdata_lo_r = Output(UInt(pt1.DCCM_DATA_WIDTH.W)) + val dccm_data_ecc_hi_r = Output(UInt(pt1.DCCM_ECC_WIDTH.W)) + val dccm_data_ecc_lo_r = Output(UInt(pt1.DCCM_ECC_WIDTH.W)) + val lsu_ld_data_r = Output(UInt(pt1.DCCM_DATA_WIDTH.W)) + val lsu_ld_data_corr_r = Output(UInt(pt1.DCCM_DATA_WIDTH.W)) + val lsu_double_ecc_error_r = Input(UInt(1.W)) + val single_ecc_error_hi_r = Input(UInt(1.W)) + val single_ecc_error_lo_r = Input(UInt(1.W)) + val sec_data_hi_r = Input(UInt(pt1.DCCM_DATA_WIDTH.W)) + val sec_data_lo_r = Input(UInt(pt1.DCCM_DATA_WIDTH.W)) + val sec_data_hi_r_ff = Input(UInt(pt1.DCCM_DATA_WIDTH.W)) + val sec_data_lo_r_ff = Input(UInt(pt1.DCCM_DATA_WIDTH.W)) + val sec_data_ecc_hi_r_ff = Input(UInt(pt1.DCCM_ECC_WIDTH.W)) + val sec_data_ecc_lo_r_ff = Input(UInt(pt1.DCCM_ECC_WIDTH.W)) + val dccm_rdata_hi_m = Output(UInt(pt1.DCCM_DATA_WIDTH.W)) + val dccm_rdata_lo_m = Output(UInt(pt1.DCCM_DATA_WIDTH.W)) + val dccm_data_ecc_hi_m = Output(UInt(pt1.DCCM_ECC_WIDTH.W)) + val dccm_data_ecc_lo_m = Output(UInt(pt1.DCCM_ECC_WIDTH.W)) + val lsu_ld_data_m = Output(UInt(pt1.DCCM_DATA_WIDTH.W)) + val lsu_double_ecc_error_m = Input(UInt(1.W)) + val sec_data_hi_m = Input(UInt(pt1.DCCM_DATA_WIDTH.W)) + val sec_data_lo_m = Input(UInt(pt1.DCCM_DATA_WIDTH.W)) + val store_data_m = Input(UInt(32.W)) + val dma_dccm_wen = Input(UInt(1.W)) + val dma_pic_wen = Input(UInt(1.W)) + val dma_mem_tag_m = Input(UInt(3.W)) + val dma_mem_addr = Input(UInt(32.W)) + val dma_mem_wdata = Input(UInt(64.W)) + val dma_dccm_wdata_lo = Input(UInt(32.W)) + val dma_dccm_wdata_hi = Input(UInt(32.W)) + val dma_dccm_wdata_ecc_hi = Input(UInt(pt1.DCCM_ECC_WIDTH.W)) + val dma_dccm_wdata_ecc_lo = Input(UInt(pt1.DCCM_ECC_WIDTH.W)) + val store_data_hi_r = Output(UInt(pt1.DCCM_DATA_WIDTH.W)) + val store_data_lo_r = Output(UInt(pt1.DCCM_DATA_WIDTH.W)) + val store_datafn_hi_r = Output(UInt(pt1.DCCM_DATA_WIDTH.W)) + val store_datafn_lo_r = Output(UInt(pt1.DCCM_DATA_WIDTH.W)) + val store_data_r = Output(UInt(32.W)) + val ld_single_ecc_error_r = Output(UInt(1.W)) + val ld_single_ecc_error_r_ff = Output(UInt(1.W)) + val picm_mask_data_m = Output(UInt(32.W)) + val lsu_stbuf_commit_any = Output(UInt(1.W)) + val lsu_dccm_rden_m = Output(UInt(1.W)) + val lsu_dccm_rden_r = Output(UInt(1.W)) + val dccm_dma_rvalid = Output(UInt(1.W)) + val dccm_dma_ecc_error = Output(UInt(1.W)) + val dccm_dma_rtag = Output(UInt(3.W)) + val dccm_dma_rdata = Output(UInt(64.W)) + val dccm_wren = Output(UInt(1.W)) + val dccm_rden = Output(UInt(1.W)) + val dccm_wr_addr_lo = Output(UInt(pt1.DCCM_BITS.W)) + val dccm_wr_data_lo = Output(UInt(pt1.DCCM_FDATA_WIDTH.W)) + val dccm_rd_addr_lo = Output(UInt(pt1.DCCM_BITS.W)) + val dccm_rd_data_lo = Input(UInt(pt1.DCCM_FDATA_WIDTH.W)) + val dccm_wr_addr_hi = Output(UInt(pt1.DCCM_BITS.W)) + val dccm_wr_data_hi = Output(UInt(pt1.DCCM_FDATA_WIDTH.W)) + val dccm_rd_addr_hi = Output(UInt(pt1.DCCM_BITS.W)) + val dccm_rd_data_hi = Input(UInt(pt1.DCCM_FDATA_WIDTH.W)) + val picm_wren = Output(UInt(1.W)) + val picm_rden = Output(UInt(1.W)) + val picm_mken = Output(UInt(1.W)) + val picm_rdaddr = Output(UInt(32.W)) + val picm_wraddr = Output(UInt(32.W)) + val picm_wr_data = Output(UInt(32.W)) + val picm_rd_data = Input(UInt(32.W)) + val scan_mode = Input(UInt(1.W)) + }) + val picm_rd_data_m = Cat(io.picm_rd_data,io.picm_rd_data) //used in both if and else + val dccm_rdata_corr_r = Cat(io.sec_data_hi_r,io.sec_data_lo_r) + val dccm_rdata_corr_m = Cat(io.sec_data_hi_m,io.sec_data_lo_m) + val dccm_rdata_r = Cat(io.dccm_rdata_hi_r,io.dccm_rdata_lo_r) + val dccm_rdata_m = Cat(io.dccm_rdata_hi_m,io.dccm_rdata_lo_m) + val lsu_rdata_r = WireInit(UInt(64.W),0.U) + val lsu_rdata_m = WireInit(UInt(64.W),0.U) + val lsu_rdata_corr_r = WireInit(UInt(64.W),0.U) + val lsu_rdata_corr_m = WireInit(UInt(64.W),0.U) + val stbuf_fwddata_r = WireInit(UInt(64.W),0.U) + val stbuf_fwdbyteen_r = WireInit(UInt(64.W),0.U) + val picm_rd_data_r_32 = WireInit(UInt(32.W),0.U) + val picm_rd_data_r = WireInit(UInt(64.W),0.U) + val lsu_ld_data_corr_m = WireInit(UInt(64.W),0.U) + + + //Forwarding stbuf + if (pt.LOAD_TO_USE_PLUS1 == 1){ + io.dccm_dma_rvalid := io.lsu_pkt_r.valid & io.lsu_pkt_r.load & io.lsu_pkt_r.dma + io.dccm_dma_ecc_error := io.lsu_double_ecc_error_r //from ecc + io.dccm_dma_rdata := lsu_rdata_corr_r + //Registers + io.dccm_rdata_hi_r := rvdffe(io.dccm_rdata_hi_m,io.lsu_dccm_rden_m.asBool,clock,io.scan_mode.asBool) + io.dccm_rdata_lo_r := rvdffe(io.dccm_rdata_lo_m,io.lsu_dccm_rden_m.asBool,clock,io.scan_mode.asBool) + io.dccm_data_ecc_hi_r := rvdffe(io.dccm_data_ecc_hi_m,io.lsu_dccm_rden_m.asBool,clock,io.scan_mode.asBool) + io.dccm_data_ecc_lo_r := rvdffe(io.dccm_data_ecc_lo_m,io.lsu_dccm_rden_m.asBool,clock,io.scan_mode.asBool) + stbuf_fwdbyteen_r := withClock(io.lsu_c2_r_clk){RegNext(Cat(io.stbuf_fwdbyteen_hi_m,io.stbuf_fwdbyteen_lo_m),0.U)} + stbuf_fwddata_r := withClock(io.lsu_c2_r_clk){RegNext(Cat(io.stbuf_fwddata_hi_m ,io.stbuf_fwddata_lo_m ),0.U)} + picm_rd_data_r_32 := withClock(io.lsu_c2_r_clk){RegNext(picm_rd_data_m(31,0),0.U)} + picm_rd_data_r := Cat(picm_rd_data_r_32,picm_rd_data_r_32) + io.dccm_dma_rtag := withClock(io.lsu_c1_r_clk){RegNext(io.dma_mem_tag_m,0.U)} + + lsu_rdata_corr_r := Reverse(Cat(VecInit.tabulate(8)(i=> Reverse(Mux(stbuf_fwdbyteen_r(i).asBool,stbuf_fwddata_r((8*i)+7,8*i),Mux(io.addr_in_pic_r.asBool,picm_rd_data_r((8*i)+7,8*i),dccm_rdata_corr_r((8*i)+7,8*i))))))) + lsu_rdata_r := Reverse(Cat(VecInit.tabulate(8)(i=> Reverse(Mux(stbuf_fwdbyteen_r(i).asBool,stbuf_fwddata_r((8*i)+7,8*i),Mux(io.addr_in_pic_r.asBool,picm_rd_data_r((8*i)+7,8*i),dccm_rdata_r((8*i)+7,8*i))))))) + io.lsu_ld_data_r := lsu_rdata_r>> 8.U*io.lsu_addr_r(1,0) + io.lsu_ld_data_corr_r := lsu_rdata_corr_r >> 8.U*io.lsu_addr_r(1,0) + } + + else{ + io.dccm_dma_rvalid := io.lsu_pkt_m.valid & io.lsu_pkt_m.load & io.lsu_pkt_m.dma + io.dccm_dma_ecc_error := io.lsu_double_ecc_error_m //from ecc + io.dccm_dma_rdata := lsu_rdata_corr_m + io.dccm_dma_rtag := io.dma_mem_tag_m + io.dccm_rdata_lo_r := 0.U + io.dccm_rdata_hi_r := 0.U + io.dccm_data_ecc_hi_r := 0.U + io.dccm_data_ecc_lo_r := 0.U + io.lsu_ld_data_r := 0.U + //Registers + io.lsu_ld_data_corr_r := withClock(io.lsu_c2_r_clk){RegNext(lsu_ld_data_corr_m,0.U)} + lsu_rdata_corr_m := Reverse(Cat(VecInit.tabulate(8)(i=> Reverse(Mux(((Cat(io.stbuf_fwdbyteen_hi_m,io.stbuf_fwdbyteen_lo_m))(i)).asBool,(Cat(io.stbuf_fwddata_hi_m,io.stbuf_fwddata_lo_m))((8*i)+7,8*i),Mux(io.addr_in_pic_m.asBool,picm_rd_data_m((8*i)+7,8*i),dccm_rdata_corr_m((8*i)+7,8*i))))))) + lsu_rdata_m := Reverse(Cat(VecInit.tabulate(8)(i=> Reverse(Mux(((Cat(io.stbuf_fwdbyteen_hi_m,io.stbuf_fwdbyteen_lo_m))(i)).asBool,(Cat(io.stbuf_fwddata_hi_m,io.stbuf_fwddata_lo_m))((8*i)+7,8*i),Mux(io.addr_in_pic_m.asBool,picm_rd_data_m((8*i)+7,8*i),dccm_rdata_m((8*i)+7,8*i))))))) + io.lsu_ld_data_m := lsu_rdata_m >> 8.U*io.lsu_addr_m(1,0) + lsu_ld_data_corr_m := lsu_rdata_corr_m >> 8.U*io.lsu_addr_m(1,0) + } + + //Ecc error kill + val kill_ecc_corr_lo_r = (((io.lsu_addr_d(pt1.DCCM_BITS-1,2) === io.lsu_addr_r(pt1.DCCM_BITS-1,2)).asUInt | (io.end_addr_d(pt1.DCCM_BITS-1,2) === io.lsu_addr_r(pt1.DCCM_BITS-1,2)).asUInt) & io.lsu_pkt_d.valid & io.lsu_pkt_d.store & io.lsu_pkt_d.dma & io.addr_in_dccm_d) | + (((io.lsu_addr_m(pt1.DCCM_BITS-1,2) === io.lsu_addr_r(pt1.DCCM_BITS-1,2)).asUInt | (io.end_addr_m(pt1.DCCM_BITS-1,2) === io.lsu_addr_r(pt1.DCCM_BITS-1,2)).asUInt) & io.lsu_pkt_m.valid & io.lsu_pkt_m.store & io.lsu_pkt_m.dma & io.addr_in_dccm_m) + + val kill_ecc_corr_hi_r = (((io.lsu_addr_d(pt1.DCCM_BITS-1,2) === io.end_addr_r(pt1.DCCM_BITS-1,2)).asUInt | (io.end_addr_d(pt1.DCCM_BITS-1,2) === io.end_addr_r(pt1.DCCM_BITS-1,2)).asUInt) & io.lsu_pkt_d.valid & io.lsu_pkt_d.store & io.lsu_pkt_d.dma & io.addr_in_dccm_d) | + (((io.lsu_addr_m(pt1.DCCM_BITS-1,2) === io.end_addr_r(pt1.DCCM_BITS-1,2)).asUInt | (io.end_addr_m(pt1.DCCM_BITS-1,2) === io.end_addr_r(pt1.DCCM_BITS-1,2)).asUInt) & io.lsu_pkt_m.valid & io.lsu_pkt_m.store & io.lsu_pkt_m.dma & io.addr_in_dccm_m) + + val ld_single_ecc_error_lo_r = io.lsu_pkt_r.load & io.single_ecc_error_lo_r & ~io.lsu_raw_fwd_lo_r + val ld_single_ecc_error_hi_r = io.lsu_pkt_r.load & io.single_ecc_error_hi_r & ~io.lsu_raw_fwd_hi_r + io.ld_single_ecc_error_r := (ld_single_ecc_error_lo_r | ld_single_ecc_error_hi_r) & ~io.lsu_double_ecc_error_r + val ld_single_ecc_error_lo_r_ns = ld_single_ecc_error_lo_r & (io.lsu_commit_r | io.lsu_pkt_r.dma) & ~kill_ecc_corr_lo_r + val ld_single_ecc_error_hi_r_ns = ld_single_ecc_error_hi_r & (io.lsu_commit_r | io.lsu_pkt_r.dma) & ~kill_ecc_corr_hi_r + + val lsu_double_ecc_error_r_ff = withClock(io.lsu_free_c2_clk){RegNext(io.lsu_double_ecc_error_r,0.U)} + val ld_single_ecc_error_hi_r_ff = withClock(io.lsu_free_c2_clk){RegNext(ld_single_ecc_error_hi_r_ns,0.U)} + val ld_single_ecc_error_lo_r_ff = withClock(io.lsu_free_c2_clk){RegNext(ld_single_ecc_error_lo_r_ns,0.U)} + + val ld_sec_addr_hi_r_ff = rvdffe(io.end_addr_r(pt1.DCCM_BITS-1,0),io.ld_single_ecc_error_r.asBool,clock,io.scan_mode.asBool) + val ld_sec_addr_lo_r_ff = rvdffe(io.lsu_addr_r(pt1.DCCM_BITS-1,0),io.ld_single_ecc_error_r.asBool,clock,io.scan_mode.asBool) + val lsu_dccm_rden_d = io.lsu_pkt_d.valid & (io.lsu_pkt_d.load | (io.lsu_pkt_d.store & (~(io.lsu_pkt_d.word | io.lsu_pkt_d.dword) | (io.lsu_addr_d(1,0) =/= 0.U(2.W))))) & io.addr_in_dccm_d + val lsu_dccm_wren_d = io.dma_dccm_wen + + io.ld_single_ecc_error_r_ff := (ld_single_ecc_error_lo_r_ff | ld_single_ecc_error_hi_r_ff) & ~lsu_double_ecc_error_r_ff + io.lsu_stbuf_commit_any := io.stbuf_reqvld_any & (~(lsu_dccm_rden_d | lsu_dccm_wren_d | io.ld_single_ecc_error_r_ff) | + (lsu_dccm_rden_d & ~((io.stbuf_addr_any(pt1.DCCM_WIDTH_BITS+pt1.DCCM_BANK_BITS-1,pt1.DCCM_WIDTH_BITS) === io.lsu_addr_d(pt1.DCCM_WIDTH_BITS+pt1.DCCM_BANK_BITS-1,pt1.DCCM_WIDTH_BITS)).asUInt | + (io.stbuf_addr_any(pt1.DCCM_WIDTH_BITS+pt1.DCCM_BANK_BITS-1,pt1.DCCM_WIDTH_BITS) === io.end_addr_d(pt1.DCCM_WIDTH_BITS+pt1.DCCM_BANK_BITS-1,pt1.DCCM_WIDTH_BITS)).asUInt))) + + + //DCCM inputs + io.dccm_wren := lsu_dccm_wren_d | io.lsu_stbuf_commit_any | io.ld_single_ecc_error_r_ff + io.dccm_rden := lsu_dccm_rden_d & io.addr_in_dccm_d + + io.dccm_wr_addr_lo := Mux(io.ld_single_ecc_error_r_ff.asBool, + Mux(ld_single_ecc_error_lo_r_ff===1.U,ld_sec_addr_lo_r_ff(pt1.DCCM_BITS-1,0),ld_sec_addr_hi_r_ff(pt1.DCCM_BITS-1,0)), + Mux(lsu_dccm_wren_d.asBool,io.lsu_addr_d(pt1.DCCM_BITS-1,0),io.stbuf_addr_any(pt1.DCCM_BITS-1,0))) + + io.dccm_wr_addr_hi := Mux(io.ld_single_ecc_error_r_ff.asBool, + Mux(ld_single_ecc_error_hi_r_ff===1.U, ld_sec_addr_hi_r_ff(pt1.DCCM_BITS-1,0), ld_sec_addr_lo_r_ff(pt1.DCCM_BITS-1,0)), + Mux(lsu_dccm_wren_d.asBool, io.end_addr_d(pt1.DCCM_BITS-1,0),io.stbuf_addr_any(pt1.DCCM_BITS-1,0))) + + io.dccm_rd_addr_lo := io.lsu_addr_d(pt1.DCCM_BITS-1,0) + io.dccm_rd_addr_hi := io.end_addr_d(pt1.DCCM_BITS-1,0) + + io.dccm_wr_data_lo := Mux(io.ld_single_ecc_error_r_ff.asBool, + Mux(ld_single_ecc_error_lo_r_ff===0.U,Cat(io.sec_data_ecc_lo_r_ff(pt1.DCCM_ECC_WIDTH-1,0),io.sec_data_lo_r_ff(pt1.DCCM_DATA_WIDTH-1,0)) , + Cat(io.sec_data_ecc_hi_r_ff(pt1.DCCM_ECC_WIDTH-1,0),io.sec_data_hi_r_ff(pt1.DCCM_DATA_WIDTH-1,0))) , + Mux(io.dma_dccm_wen.asBool,Cat(io.dma_dccm_wdata_ecc_lo(pt1.DCCM_ECC_WIDTH-1,0),io.dma_dccm_wdata_lo(pt1.DCCM_DATA_WIDTH-1,0)), + Cat(io.stbuf_ecc_any(pt1.DCCM_ECC_WIDTH-1,0),io.stbuf_data_any(pt1.DCCM_DATA_WIDTH-1,0)))) + + io.dccm_wr_data_hi := Mux(io.ld_single_ecc_error_r_ff.asBool, + Mux(ld_single_ecc_error_hi_r_ff===0.U, Cat(io.sec_data_ecc_hi_r_ff(pt1.DCCM_ECC_WIDTH-1,0),io.sec_data_hi_r_ff(pt1.DCCM_DATA_WIDTH-1,0)), + Cat(io.sec_data_ecc_lo_r_ff(pt1.DCCM_ECC_WIDTH-1,0),io.sec_data_lo_r_ff(pt1.DCCM_DATA_WIDTH-1,0))), + Mux(io.dma_dccm_wen.asBool, Cat(io.dma_dccm_wdata_ecc_hi(pt1.DCCM_ECC_WIDTH-1,0),io.dma_dccm_wdata_hi(pt1.DCCM_DATA_WIDTH-1,0)), + Cat(io.stbuf_ecc_any(pt1.DCCM_ECC_WIDTH-1,0),io.stbuf_data_any(pt1.DCCM_DATA_WIDTH-1,0)))) + //////////////////////////////////////////////////////////////////////////////////////////////////////////////// + // DCCM outputs + val store_byteen_m = (Fill(4,io.lsu_pkt_m.store)) & ((Fill(4,io.lsu_pkt_m.by) & 1.U(4.W)) | + (Fill(4,io.lsu_pkt_m.half) & 3.U(4.W)) | + (Fill(4,io.lsu_pkt_m.word) & 15.U(4.W))) + + val store_byteen_r = (Fill(4,io.lsu_pkt_r.store)) & ((Fill(4,io.lsu_pkt_r.by) & 1.U(4.W)) | + (Fill(4,io.lsu_pkt_r.half) & 3.U(4.W)) | + (Fill(4,io.lsu_pkt_r.word) & 15.U(4.W))) + val store_byteen_ext_m = WireInit(UInt(8.W),0.U) + store_byteen_ext_m := store_byteen_m(3,0) << io.lsu_addr_m(1,0) // The packet in m + val store_byteen_ext_r = WireInit(UInt(8.W),0.U) + store_byteen_ext_r := store_byteen_r(3,0) << io.lsu_addr_r(1,0) + + //LM: If store buffer addr matches with the address in the m-stage then there will be bypassed + val dccm_wr_bypass_d_m_lo = (io.stbuf_addr_any(pt1.DCCM_BITS-1,2) === io.lsu_addr_m(pt1.DCCM_BITS-1,2)) & io.addr_in_dccm_m + val dccm_wr_bypass_d_m_hi = (io.stbuf_addr_any(pt1.DCCM_BITS-1,2) === io.end_addr_m(pt1.DCCM_BITS-1,2)) & io.addr_in_dccm_m + + val dccm_wr_bypass_d_r_lo = (io.stbuf_addr_any(pt1.DCCM_BITS-1,2) === io.lsu_addr_r(pt1.DCCM_BITS-1,2)) & io.addr_in_dccm_r + val dccm_wr_bypass_d_r_hi = (io.stbuf_addr_any(pt1.DCCM_BITS-1,2) === io.end_addr_r(pt1.DCCM_BITS-1,2)) & io.addr_in_dccm_r + + val dccm_wr_bypass_d_m_hi_Q = WireInit(0.U(1.W)) + val dccm_wr_bypass_d_m_lo_Q = WireInit(0.U(1.W)) + val dccm_wren_Q = WireInit(0.U(1.W)) + val dccm_wr_data_Q = WireInit(0.U(32.W)) + val store_data_pre_r = WireInit(0.U(64.W)) + val store_data_pre_hi_r = WireInit(0.U(32.W)) + val store_data_pre_lo_r = WireInit(0.U(32.W)) + val store_data_pre_m = WireInit(0.U(64.W)) + val store_data_hi_m = WireInit(0.U(32.W)) + val store_data_lo_m = WireInit(0.U(32.W)) + + if(pt.LOAD_TO_USE_PLUS1 == 1){ + store_data_pre_r := Cat(Fill(32,0.U),io.store_data_r(31,0)) << 8.U*io.lsu_addr_r(1,0) + store_data_pre_hi_r := store_data_pre_r(63,32) + store_data_pre_lo_r := store_data_pre_r(31, 0) + io.store_data_lo_r := Reverse(Cat(VecInit.tabulate(4)(i=> Reverse(Mux(store_byteen_ext_r(i).asBool, store_data_pre_lo_r((8*i)+7,8*i), Mux((dccm_wren_Q & dccm_wr_bypass_d_m_lo_Q).asBool, dccm_wr_data_Q((8*i)+7,8*i),io.sec_data_lo_r((8*i)+7,8*i))))))) + io.store_data_hi_r := Reverse(Cat(VecInit.tabulate(4)(i=> Reverse(Mux(store_byteen_ext_r(i+4).asBool,store_data_pre_hi_r((8*i)+7,8*i), Mux((dccm_wren_Q & dccm_wr_bypass_d_m_hi_Q).asBool, dccm_wr_data_Q((8*i)+7,8*i),io.sec_data_hi_r((8*i)+7,8*i))))))) + io.store_datafn_lo_r := Reverse(Cat(VecInit.tabulate(4)(i=> Reverse(Mux(store_byteen_ext_r(i).asBool, store_data_pre_lo_r((8*i)+7,8*i), Mux((io.lsu_stbuf_commit_any & dccm_wr_bypass_d_r_lo).asBool,io.stbuf_data_any((8*i)+7,(8*i)),Mux((dccm_wren_Q & dccm_wr_bypass_d_m_lo_Q).asBool, dccm_wr_data_Q((8*i)+7,8*i),io.sec_data_lo_r((8*i)+7,8*i)))))))) + io.store_datafn_hi_r := Reverse(Cat(VecInit.tabulate(4)(i=> Reverse(Mux(store_byteen_ext_r(i+4).asBool,store_data_pre_hi_r((8*i)+7,8*i), Mux((io.lsu_stbuf_commit_any & dccm_wr_bypass_d_r_lo).asBool,io.stbuf_data_any((8*i)+7,(8*i)),Mux((dccm_wren_Q & dccm_wr_bypass_d_m_hi_Q).asBool, dccm_wr_data_Q((8*i)+7,8*i),io.sec_data_hi_r((8*i)+7,8*i)))))))) + dccm_wren_Q := withClock(io.lsu_free_c2_clk){RegNext(io.lsu_stbuf_commit_any,0.U)} + dccm_wr_data_Q := rvdffe(io.stbuf_data_any,io.lsu_stbuf_commit_any.asBool,clock,io.scan_mode.asBool) + dccm_wr_bypass_d_m_lo_Q := withClock(io.lsu_free_c2_clk){RegNext(dccm_wr_bypass_d_m_lo,0.U)} + dccm_wr_bypass_d_m_hi_Q := withClock(io.lsu_free_c2_clk){RegNext(dccm_wr_bypass_d_m_hi,0.U)} + io.store_data_r := withClock(io.lsu_store_c1_r_clk){RegNext(io.store_data_m,0.U)} + } + else + { + store_data_pre_m := Cat(Fill(32,0.U),io.store_data_m(31,0)) << 8.U*io.lsu_addr_m(1,0) + store_data_hi_m := store_data_pre_m(63,32) + store_data_lo_m := store_data_pre_m(31, 0) + io.store_data_lo_r := withClock(io.lsu_store_c1_r_clk){RegNext(Reverse(Cat(VecInit.tabulate(4)(i=> Reverse(Mux(store_byteen_ext_m(i).asBool, store_data_lo_m((8*i)+7,8*i), Mux((io.lsu_stbuf_commit_any & dccm_wr_bypass_d_m_lo).asBool, io.stbuf_data_any((8*i)+7,8*i),io.sec_data_lo_m((8*i)+7,8*i))))))),0.U)} + io.store_data_hi_r := withClock(io.lsu_store_c1_r_clk){RegNext(Reverse(Cat(VecInit.tabulate(4)(i=> Reverse(Mux(store_byteen_ext_m(i+4).asBool,store_data_hi_m((8*i)+7,8*i), Mux((io.lsu_stbuf_commit_any & dccm_wr_bypass_d_m_hi).asBool, io.stbuf_data_any((8*i)+7,8*i),io.sec_data_hi_m((8*i)+7,8*i))))))),0.U)} + io.store_datafn_lo_r := Reverse(Cat(VecInit.tabulate(4)(i=> Reverse(Mux((io.lsu_stbuf_commit_any & dccm_wr_bypass_d_r_lo & ~store_byteen_ext_r(i)).asBool,io.stbuf_data_any((8*i)+7,8*i),io.store_data_lo_r((8*i)+7,8*i)))))) + io.store_datafn_hi_r := Reverse(Cat(VecInit.tabulate(4)(i=> Reverse(Mux((io.lsu_stbuf_commit_any & dccm_wr_bypass_d_r_lo & ~store_byteen_ext_r(i)).asBool,io.stbuf_data_any((8*i)+7,8*i),io.store_data_hi_r((8*i)+7,8*i)))))) + io.store_data_r := (Cat(io.store_data_hi_r(31,0),io.store_data_lo_r(31,0)) >> 8.U*io.lsu_addr_r(1,0)) & Reverse(Cat(VecInit.tabulate(4)(i=> Fill(8,store_byteen_r(i))))) + } + io.dccm_rdata_lo_m := io.dccm_rd_data_lo(pt1.DCCM_DATA_WIDTH-1,0) //4 lines + io.dccm_rdata_hi_m := io.dccm_rd_data_hi(pt1.DCCM_DATA_WIDTH-1,0) + io.dccm_data_ecc_lo_m := io.dccm_rd_data_lo(pt1.DCCM_FDATA_WIDTH-1,pt1.DCCM_DATA_WIDTH) + io.dccm_data_ecc_hi_m := io.dccm_rd_data_hi(pt1.DCCM_FDATA_WIDTH-1,pt1.DCCM_DATA_WIDTH) + + io.picm_wren := (io.lsu_pkt_r.valid & io.lsu_pkt_r.store & io.addr_in_pic_r & io.lsu_commit_r) | io.dma_pic_wen + io.picm_rden := io.lsu_pkt_d.valid & io.lsu_pkt_d.load & io.addr_in_pic_d + io.picm_mken := io.lsu_pkt_d.valid & io.lsu_pkt_d.store & io.addr_in_pic_d + io.picm_rdaddr := pt.PIC_BASE_ADDR | Cat(Fill(32-pt1.PIC_BITS,0.U),io.lsu_addr_d(pt1.PIC_BITS-1,0)) + io.picm_wraddr := pt.PIC_BASE_ADDR | Cat(Fill(32-pt1.PIC_BITS,0.U),Mux(io.dma_pic_wen.asBool,io.dma_mem_addr(pt1.PIC_BITS-1,0),io.lsu_addr_r(pt1.PIC_BITS-1,0))) + io.picm_mask_data_m := picm_rd_data_m(31,0) + io.picm_wr_data := Mux(io.dma_pic_wen.asBool,io.dma_mem_wdata(31,0),io.store_datafn_lo_r(31,0)) + + if(pt1.DCCM_ENABLE == 1){ + io.lsu_dccm_rden_m := withClock(io.lsu_c2_m_clk){RegNext(lsu_dccm_rden_d,0.U)} + io.lsu_dccm_rden_r := withClock(io.lsu_c2_r_clk){RegNext(io.lsu_dccm_rden_m,0.U)} + } + else{ + io.lsu_dccm_rden_m := 0.U + io.lsu_dccm_rden_r := 0.U} + + + //io.dccm_wr_addr_lo := 0.U + //io.dccm_wr_addr_hi := 0.U + //io.dccm_rd_addr_lo := 0.U + //io.dccm_rd_addr_hi := 0.U + //io.dccm_wr_data_lo := 0.U + //io.dccm_wr_data_hi := 0.U + + // io.dccm_rdata_hi_m := 0.U + // io.dccm_rdata_lo_m := 0.U + // io.dccm_data_ecc_hi_m := 0.U + // io.dccm_data_ecc_lo_m := 0.U + //io.lsu_ld_data_m := 0.U + + //io.store_data_hi_r := 0.U + //io.store_data_lo_r := 0.U + //io.store_datafn_hi_r := 0.U + //io.store_datafn_lo_r := 0.U + // io.store_data_r := 0.U + //io.ld_single_ecc_error_r := 0.U + //io.ld_single_ecc_error_r_ff := 0.U + //io.picm_mask_data_m := 0.U + //io.lsu_stbuf_commit_any := 0.U + // io.lsu_dccm_rden_m := 0.U + // io.lsu_dccm_rden_r := 0.U + //io.dccm_dma_rvalid := 0.U + //io.dccm_dma_ecc_error := 0.U + //io.dccm_dma_rtag := 0.U + //io.dccm_dma_rdata := 0.U + //io.dccm_wren := 0.U + //io.dccm_rden := 0.U + //io.dccm_wr_addr_lo := 0.U + //io.dccm_wr_data_lo := 0.U + //io.dccm_wr_addr_hi := 0.U + //io.dccm_wr_data_hi := 0.U + //io.dccm_rd_addr_hi := 0.U + //io.dccm_rd_data_hi := 0.U + //io.picm_wren := 0.U + //io.picm_rden := 0.U + //io.picm_mken := 0.U + //io.picm_rdaddr := 0.U + //io.picm_wraddr := 0.U + //io.picm_wr_data := 0.U + //io.picm_rd_data := 0.U +} + +object dccm_ctl extends App{ + println("Generate Verilog") + chisel3.Driver.execute(args, ()=> new el2_lsu_dccm_ctl) +} + diff --git a/src/main/scala/lsu/el2_lsu_dccm_mem.scala b/src/main/scala/lsu/el2_lsu_dccm_mem.scala new file mode 100644 index 00000000..93b40fb2 --- /dev/null +++ b/src/main/scala/lsu/el2_lsu_dccm_mem.scala @@ -0,0 +1,99 @@ +package lsu +import include._ +import lib._ +import snapshot._ +import scala.math._ +import chisel3._ +import chisel3.util._ +class el2_lsu_dccm_mem extends Module { + val io = IO(new Bundle{ + //implicit clk and rst_l + val clk_override = Input(UInt(1.W)) + val scan_mode = Input(UInt(1.W)) + val dccm_wren = Input(UInt(1.W)) + val dccm_rden = Input(UInt(1.W)) + val dccm_wr_addr_lo = Input(UInt(pt1.DCCM_BITS.W)) + val dccm_wr_addr_hi = Input(UInt(pt1.DCCM_BITS.W)) + val dccm_rd_addr_lo = Input(UInt(pt1.DCCM_BITS.W)) + val dccm_rd_addr_hi = Input(UInt(pt1.DCCM_BITS.W)) + val dccm_wr_data_lo = Input(UInt(pt1.DCCM_FDATA_WIDTH.W)) + val dccm_wr_data_hi = Input(UInt(pt1.DCCM_FDATA_WIDTH.W)) + val dccm_rd_data_lo = Output(UInt(pt1.DCCM_FDATA_WIDTH.W)) + val dccm_rd_data_hi = Output(UInt(pt1.DCCM_FDATA_WIDTH.W)) + }) + //DCCM_BYTE_WIDTH = 4 + //DCCM_WIDTH_BITS = 2 + + //DCCM_NUM_BANKS = 4 + //DCCM_BANK_BITS = 2 + + //DCCM_BITS = 16 + //DCCM_FDATA_WIDTH = 39 + + //DCCM_SIZE = 64 + + //DCCM_INDEX_BITS = 12 + //DCCM_INDEX_DEPTH = 4K + + + val DCCM_WIDTH_BITS = log2Ceil(pt1.DCCM_BYTE_WIDTH) + val DCCM_INDEX_BITS = pt1.DCCM_BITS - pt1.DCCM_BANK_BITS - pt1.DCCM_WIDTH_BITS + val DCCM_INDEX_DEPTH = (pt1.DCCM_SIZE*1024)/(pt1.DCCM_BYTE_WIDTH*pt1.DCCM_NUM_BANKS) + + val addr_bank = Wire(Vec(pt1.DCCM_NUM_BANKS,UInt((pt1.DCCM_BITS-pt1.DCCM_BANK_BITS+2).W))) //[15:4] => [11:0] 12 bits per bank => + + //val rd_addr_even = Wire(UInt((pt1.DCCM_BITS-(pt1.DCCM_BANK_BITS+DCCM_WIDTH_BITS)).W)) //[15:4] + //val rd_addr_odd = Wire(UInt((pt1.DCCM_BITS-(pt1.DCCM_BANK_BITS+DCCM_WIDTH_BITS)).W)) //[15:4] + + // val dccm_bank_dout = Wire(Vec(pt1.DCCM_NUM_BANKS,UInt(pt1.DCCM_FDATA_WIDTH.W))) // 3:0, 38:0 + val wr_data_bank = Wire(Vec(pt1.DCCM_NUM_BANKS,UInt(pt1.DCCM_FDATA_WIDTH.W))) // 3:0, 38:0 + + val dccm_rd_addr_lo_q = RegNext(io.dccm_rd_addr_lo(DCCM_WIDTH_BITS+pt1.DCCM_BANK_BITS-1,DCCM_WIDTH_BITS),0.U) //[3:2] => [1:0] + val dccm_rd_addr_hi_q = RegNext(io.dccm_rd_addr_hi(DCCM_WIDTH_BITS+pt1.DCCM_BANK_BITS-1,DCCM_WIDTH_BITS),0.U) + + + //2+2:2 => 4:2rd_unaligned + val rd_unaligned = io.dccm_rd_addr_lo(pt1.DCCM_BANK_BITS+DCCM_WIDTH_BITS-1,DCCM_WIDTH_BITS) =/= io.dccm_rd_addr_hi(pt1.DCCM_BANK_BITS+DCCM_WIDTH_BITS-1,DCCM_WIDTH_BITS) + val wr_unaligned = io.dccm_wr_addr_lo(pt1.DCCM_BANK_BITS+DCCM_WIDTH_BITS-1,DCCM_WIDTH_BITS) =/= io.dccm_wr_addr_hi(pt1.DCCM_BANK_BITS+DCCM_WIDTH_BITS-1,DCCM_WIDTH_BITS) + + + + val wren_bank = Reverse(Cat(VecInit.tabulate(pt1.DCCM_NUM_BANKS)(i=> io.dccm_wren & ((io.dccm_wr_addr_hi(pt1.DCCM_BANK_BITS+1,2) === i.U) | (io.dccm_wr_addr_lo(pt1.DCCM_BANK_BITS+1,2) === i.U)).asUInt))) + val rden_bank = Reverse(Cat(VecInit.tabulate(pt1.DCCM_NUM_BANKS)(i=> io.dccm_rden & ((io.dccm_rd_addr_hi(pt1.DCCM_BANK_BITS+1,2) === i.U) | (io.dccm_rd_addr_lo(pt1.DCCM_BANK_BITS+1,2) === i.U)).asUInt))) + val dccm_clken = Reverse(Cat(VecInit.tabulate(pt1.DCCM_NUM_BANKS)(i=> wren_bank(i) | rden_bank(i) | io.clk_override))) + + + //[15:4] => [11:0] 12 bits per bank + addr_bank := VecInit.tabulate(pt1.DCCM_NUM_BANKS)(i=> Mux(wren_bank(i).asBool, + Mux(((io.dccm_wr_addr_hi(pt1.DCCM_BANK_BITS+1,2) === i.U) & wr_unaligned), + io.dccm_wr_addr_hi(DCCM_INDEX_BITS+pt1.DCCM_BANK_BITS+DCCM_WIDTH_BITS-1, pt1.DCCM_BANK_BITS+DCCM_WIDTH_BITS), + io.dccm_wr_addr_lo(DCCM_INDEX_BITS+pt1.DCCM_BANK_BITS+DCCM_WIDTH_BITS-1, pt1.DCCM_BANK_BITS+DCCM_WIDTH_BITS)), + + Mux(((io.dccm_rd_addr_hi(pt1.DCCM_BANK_BITS+1,2) === i.U) & rd_unaligned), + io.dccm_rd_addr_hi(DCCM_INDEX_BITS+pt1.DCCM_BANK_BITS+DCCM_WIDTH_BITS-1, pt1.DCCM_BANK_BITS+DCCM_WIDTH_BITS), + io.dccm_rd_addr_lo(DCCM_INDEX_BITS+pt1.DCCM_BANK_BITS+DCCM_WIDTH_BITS-1, pt1.DCCM_BANK_BITS+DCCM_WIDTH_BITS)))) + + wr_data_bank := VecInit.tabulate(pt1.DCCM_NUM_BANKS)(i=> + Mux(((io.dccm_wr_addr_hi(pt1.DCCM_BANK_BITS+1,2) === i.U) & wr_unaligned), + io.dccm_wr_data_hi(pt1.DCCM_FDATA_WIDTH-1,0), + io.dccm_wr_data_lo(pt1.DCCM_FDATA_WIDTH-1,0))) + + + + + val mem =SyncReadMem(DCCM_INDEX_DEPTH, Vec(pt1.DCCM_NUM_BANKS, UInt(39.W))) + // Create one write port and one read port + (0 to pt1.DCCM_NUM_BANKS-1).foreach(i => + when(wren_bank(i)& dccm_clken(i)){ + mem.write(addr_bank(i), wr_data_bank)}) + + val dccm_bank_dout = VecInit.tabulate(pt1.DCCM_NUM_BANKS)(i => mem.read(addr_bank(i), ~wren_bank(i)& dccm_clken(i)))//ME && ~WE + + io.dccm_rd_data_lo := dccm_bank_dout(dccm_rd_addr_lo_q).asUInt + io.dccm_rd_data_hi := dccm_bank_dout(dccm_rd_addr_hi_q).asUInt +} + +object DCCM extends App{ + println("Generate Verilog") + chisel3.Driver.execute(args, ()=> new el2_lsu_dccm_mem) +} diff --git a/src/main/scala/lsu/el2_lsu_ecc.scala b/src/main/scala/lsu/el2_lsu_ecc.scala new file mode 100644 index 00000000..3365d921 --- /dev/null +++ b/src/main/scala/lsu/el2_lsu_ecc.scala @@ -0,0 +1,164 @@ +package lsu +import chisel3._ +import chisel3.util._ +import chisel3.experimental.chiselName +import include._ +import lib._ + +@chiselName +class el2_lsu_ecc extends Module with el2_lib with RequireAsyncReset { + val io = IO(new Bundle{ + + val lsu_c2_r_clk = Input(Clock()) + val lsu_pkt_m = Input(new el2_lsu_pkt_t) + val lsu_pkt_r = Input(new el2_lsu_pkt_t) + val stbuf_data_any = Input(UInt(DCCM_DATA_WIDTH.W)) + val dec_tlu_core_ecc_disable = Input(Bool()) + val lsu_dccm_rden_r = Input(Bool()) + val addr_in_dccm_r = Input(Bool()) + + val lsu_addr_r = Input(UInt(DCCM_BITS.W)) + val end_addr_r = Input(UInt(DCCM_BITS.W)) + val lsu_addr_m = Input(UInt(DCCM_BITS.W)) + val end_addr_m = Input(UInt(DCCM_BITS.W)) + + val dccm_rdata_hi_r = Input(UInt(DCCM_DATA_WIDTH.W)) + val dccm_rdata_lo_r = Input(UInt(DCCM_DATA_WIDTH.W)) + val dccm_rdata_hi_m = Input(UInt(DCCM_DATA_WIDTH.W)) + val dccm_rdata_lo_m = Input(UInt(DCCM_DATA_WIDTH.W)) + + val dccm_data_ecc_hi_r = Input(UInt(DCCM_ECC_WIDTH.W)) + val dccm_data_ecc_lo_r = Input(UInt(DCCM_ECC_WIDTH.W)) + val dccm_data_ecc_hi_m = Input(UInt(DCCM_ECC_WIDTH.W)) + val dccm_data_ecc_lo_m = Input(UInt(DCCM_ECC_WIDTH.W)) + + val ld_single_ecc_error_r = Input(Bool()) + val ld_single_ecc_error_r_ff = Input(Bool()) + val lsu_dccm_rden_m = Input(Bool()) + val addr_in_dccm_m = Input(Bool()) + + val dma_dccm_wen = Input(Bool()) + val dma_dccm_wdata_lo = Input(UInt(32.W)) + val dma_dccm_wdata_hi = Input(UInt(32.W)) + + val scan_mode = Input(Bool()) + + //Outputs + val sec_data_hi_r = Output(UInt(DCCM_DATA_WIDTH.W)) + val sec_data_lo_r = Output(UInt(DCCM_DATA_WIDTH.W)) + val sec_data_hi_m = Output(UInt(DCCM_DATA_WIDTH.W)) + val sec_data_lo_m = Output(UInt(DCCM_DATA_WIDTH.W)) + val sec_data_hi_r_ff = Output(UInt(DCCM_DATA_WIDTH.W)) + val sec_data_lo_r_ff = Output(UInt(DCCM_DATA_WIDTH.W)) + + val dma_dccm_wdata_ecc_hi = Output(UInt(DCCM_ECC_WIDTH.W)) + val dma_dccm_wdata_ecc_lo = Output(UInt(DCCM_ECC_WIDTH.W)) + val stbuf_ecc_any = Output(UInt(DCCM_ECC_WIDTH.W)) + val sec_data_ecc_hi_r_ff = Output(UInt(DCCM_ECC_WIDTH.W)) + val sec_data_ecc_lo_r_ff = Output(UInt(DCCM_ECC_WIDTH.W)) + + val single_ecc_error_hi_r = Output(Bool()) + val single_ecc_error_lo_r = Output(Bool()) + val lsu_single_ecc_error_r = Output(Bool()) + val lsu_double_ecc_error_r = Output(Bool()) + val lsu_single_ecc_error_m = Output(Bool()) + val lsu_double_ecc_error_m = Output(Bool()) + }) + val is_ldst_r = WireInit(Bool(),init = 0.U) + val is_ldst_hi_any = WireInit(Bool(),init = 0.U) + val is_ldst_lo_any = WireInit(Bool(),init = 0.U) + val dccm_wdata_hi_any = WireInit(0.U(DCCM_DATA_WIDTH.W)) + val dccm_wdata_lo_any = WireInit(0.U(DCCM_DATA_WIDTH.W)) + val dccm_rdata_hi_any = WireInit(0.U(DCCM_DATA_WIDTH.W)) + val dccm_rdata_lo_any = WireInit(0.U(DCCM_DATA_WIDTH.W)) + // val dccm_wdata_ecc_hi_any = WireInit(0.U(DCCM_ECC_WIDTH.W)) + //val dccm_wdata_ecc_lo_any = WireInit(0.U(DCCM_ECC_WIDTH.W)) + val dccm_data_ecc_hi_any = WireInit(0.U(DCCM_ECC_WIDTH.W)) + val dccm_data_ecc_lo_any = WireInit(0.U(DCCM_ECC_WIDTH.W)) + val double_ecc_error_hi_m = WireInit(Bool(),init = 0.U) + val double_ecc_error_lo_m = WireInit(Bool(),init = 0.U) + val double_ecc_error_hi_r = WireInit(Bool(),init = 0.U) + val double_ecc_error_lo_r = WireInit(Bool(),init = 0.U) + val ldst_dual_m = WireInit(Bool(),init = 0.U) + val ldst_dual_r = WireInit(Bool(),init = 0.U) + val is_ldst_m = WireInit(Bool(),init = 0.U) + val is_ldst_hi_m = WireInit(Bool(),init = 0.U) + val is_ldst_lo_m = WireInit(Bool(),init = 0.U) + val is_ldst_hi_r = WireInit(Bool(),init = 0.U) + val is_ldst_lo_r = WireInit(Bool(),init = 0.U) + + io.sec_data_hi_m :=0.U + io.sec_data_lo_m :=0.U + io.lsu_single_ecc_error_m :=0.U + io.lsu_double_ecc_error_m :=0.U + +//////////////////////////////CODE STARTS HERE/////////////////////// + val (ecc_out_hi_nc, sec_data_hi_any, single_ecc_error_hi_any, double_ecc_error_hi_any) = if(DCCM_ENABLE) + rvecc_decode(is_ldst_hi_any, dccm_rdata_hi_any, dccm_data_ecc_hi_any, 0.U) else (0.U, 0.U, 0.U, 0.U) + val ( ecc_out_lo_nc, sec_data_lo_any, single_ecc_error_lo_any, double_ecc_error_lo_any) = if(DCCM_ENABLE) + rvecc_decode(is_ldst_lo_any, dccm_rdata_lo_any, dccm_data_ecc_lo_any, 0.U) else (0.U, 0.U, 0.U, 0.U) + val dccm_wdata_ecc_lo_any = if(DCCM_ENABLE) rvecc_encode(dccm_wdata_lo_any) else (0.U) + val dccm_wdata_ecc_hi_any = if(DCCM_ENABLE) rvecc_encode(dccm_wdata_hi_any) else (0.U) + + when (LOAD_TO_USE_PLUS1.B) { + ldst_dual_r := io.lsu_addr_r(2) =/= io.end_addr_r(2) + is_ldst_r := io.lsu_pkt_r.valid & (io.lsu_pkt_r.load | io.lsu_pkt_r.store) & io.addr_in_dccm_r & io.lsu_dccm_rden_r + is_ldst_lo_r := is_ldst_r & !io.dec_tlu_core_ecc_disable + is_ldst_hi_r := is_ldst_r & (ldst_dual_r | io.lsu_pkt_r.dma) & !io.dec_tlu_core_ecc_disable + is_ldst_hi_any := is_ldst_hi_r + dccm_rdata_hi_any := io.dccm_rdata_hi_r + dccm_data_ecc_hi_any := io.dccm_data_ecc_hi_r + is_ldst_lo_any := is_ldst_lo_r + dccm_rdata_lo_any := io.dccm_rdata_lo_r + dccm_data_ecc_lo_any := io.dccm_data_ecc_lo_r + io.sec_data_hi_r := sec_data_hi_any; + io.single_ecc_error_hi_r := single_ecc_error_hi_any + double_ecc_error_hi_r := double_ecc_error_hi_any + io.sec_data_lo_r := sec_data_lo_any + io.single_ecc_error_lo_r := single_ecc_error_lo_any + double_ecc_error_lo_r := double_ecc_error_lo_any + io.lsu_single_ecc_error_r := io.single_ecc_error_hi_r | io.single_ecc_error_lo_r; + io.lsu_double_ecc_error_r := double_ecc_error_hi_r | double_ecc_error_lo_r + } + .otherwise { + ldst_dual_m := io.lsu_addr_m(2) =/= io.end_addr_m(2) + is_ldst_m := io.lsu_pkt_m.valid & (io.lsu_pkt_m.load | io.lsu_pkt_m.store) & io.addr_in_dccm_m & io.lsu_dccm_rden_m + is_ldst_lo_m := is_ldst_m & !io.dec_tlu_core_ecc_disable + is_ldst_hi_m := is_ldst_m & (ldst_dual_m | io.lsu_pkt_m.dma) & !io.dec_tlu_core_ecc_disable + is_ldst_hi_any := is_ldst_hi_m + dccm_rdata_hi_any := io.dccm_rdata_hi_m + dccm_data_ecc_hi_any := io.dccm_data_ecc_hi_m + is_ldst_lo_any := is_ldst_lo_m + dccm_rdata_lo_any := io.dccm_rdata_lo_m + dccm_data_ecc_lo_any := io.dccm_data_ecc_lo_m + io.sec_data_hi_m := sec_data_hi_any + double_ecc_error_hi_m := double_ecc_error_hi_any + io.sec_data_lo_m := sec_data_lo_any + double_ecc_error_lo_m := double_ecc_error_lo_any + io.lsu_single_ecc_error_m := single_ecc_error_hi_any | single_ecc_error_lo_any; + io.lsu_double_ecc_error_m := double_ecc_error_hi_m | double_ecc_error_lo_m + + withClock(io.lsu_c2_r_clk) {io.lsu_single_ecc_error_r := RegNext(io.lsu_single_ecc_error_m,0.U)} + withClock(io.lsu_c2_r_clk) {io.lsu_double_ecc_error_r := RegNext(io.lsu_double_ecc_error_m,0.U)} + withClock(io.lsu_c2_r_clk) {io.single_ecc_error_lo_r := RegNext(single_ecc_error_lo_any,0.U)} + withClock(io.lsu_c2_r_clk) {io.single_ecc_error_hi_r := RegNext(single_ecc_error_hi_any,0.U)} + withClock(io.lsu_c2_r_clk) {io.sec_data_hi_r := RegNext(io.sec_data_hi_m,0.U)} + withClock(io.lsu_c2_r_clk) {io.sec_data_lo_r := RegNext(io.sec_data_lo_m,0.U)} + } + // Logic for ECC generation during write + dccm_wdata_lo_any := Mux(io.ld_single_ecc_error_r_ff.asBool, io.sec_data_lo_r_ff,Mux(io.dma_dccm_wen.asBool, io.dma_dccm_wdata_lo, io.stbuf_data_any)) + dccm_wdata_hi_any := Mux(io.ld_single_ecc_error_r_ff.asBool, io.sec_data_hi_r_ff,Mux(io.dma_dccm_wen.asBool, io.dma_dccm_wdata_hi, io.stbuf_data_any)) + io.sec_data_ecc_hi_r_ff := dccm_wdata_ecc_hi_any + io.sec_data_ecc_lo_r_ff := dccm_wdata_ecc_lo_any + io.stbuf_ecc_any := dccm_wdata_ecc_lo_any + io.dma_dccm_wdata_ecc_hi := dccm_wdata_ecc_hi_any + io.dma_dccm_wdata_ecc_lo := dccm_wdata_ecc_lo_any + + io.sec_data_hi_r_ff := RegEnable(io.sec_data_hi_r, 0.U, io.ld_single_ecc_error_r) + io.sec_data_lo_r_ff := RegEnable(io.sec_data_lo_r, 0.U, io.ld_single_ecc_error_r) + +} +object eccmain extends App{ + println("Generate Verilog") + println((new chisel3.stage.ChiselStage).emitVerilog(new el2_lsu_ecc())) +} diff --git a/src/main/scala/lsu/el2_lsu_lsc_ctl.scala b/src/main/scala/lsu/el2_lsu_lsc_ctl.scala new file mode 100644 index 00000000..556aebed --- /dev/null +++ b/src/main/scala/lsu/el2_lsu_lsc_ctl.scala @@ -0,0 +1,292 @@ +package lsu +import include._ +import lib._ +import snapshot._ + +import chisel3._ +import chisel3.util._ +import chisel3.iotesters.{ChiselFlatSpec, Driver, PeekPokeTester} +import chisel3.experimental.ChiselEnum +import chisel3.experimental.{withClock, withReset, withClockAndReset} +import chisel3.experimental.BundleLiterals._ +import chisel3.tester._ +import chisel3.tester.RawTester.test +import chisel3.util.HasBlackBoxResource +import chisel3.experimental.chiselName +@chiselName +class el2_lsu_lsc_ctl extends Module with RequireAsyncReset +{ + val io = IO(new Bundle{ + //val rst_l = IO(Input(1.W)) //implicit + val lsu_c1_m_clk = Input(Clock()) + val lsu_c1_r_clk = Input(Clock()) + val lsu_c2_m_clk = Input(Clock()) + val lsu_c2_r_clk = Input(Clock()) + val lsu_store_c1_m_clk = Input(Clock()) + + val lsu_ld_data_r = Input(UInt(32.W)) //DCCM data + val lsu_ld_data_corr_r = Input(UInt(32.W)) // ECC corrected data + val lsu_single_ecc_error_r = Input(UInt(1.W)) + val lsu_double_ecc_error_r = Input(UInt(1.W)) + + val lsu_ld_data_m = Input(UInt(32.W)) + val lsu_single_ecc_error_m = Input(UInt(1.W)) + val lsu_double_ecc_error_m = Input(UInt(1.W)) + + val flush_m_up = Input(UInt(1.W)) + val flush_r = Input(UInt(1.W)) + + val exu_lsu_rs1_d = Input(UInt(32.W)) // address + val exu_lsu_rs2_d = Input(UInt(32.W)) // store data + + val lsu_p = Input(new el2_lsu_pkt_t()) // lsu control packet //coming from decode + val dec_lsu_valid_raw_d = Input(UInt(1.W)) // Raw valid for address computation + val dec_lsu_offset_d = Input(UInt(12.W)) + + val picm_mask_data_m = Input(UInt(32.W)) + val bus_read_data_m = Input(UInt(32.W)) //coming from bus interface + + val lsu_result_m = Output(UInt(32.W)) + val lsu_result_corr_r = Output(UInt(32.W)) // This is the ECC corrected data going to RF + + // lsu address down the pipe + val lsu_addr_d = Output(UInt(32.W)) + val lsu_addr_m = Output(UInt(32.W)) + val lsu_addr_r = Output(UInt(32.W)) + + // lsu address down the pipe - needed to check unaligned + val end_addr_d = Output(UInt(32.W)) + val end_addr_m = Output(UInt(32.W)) + val end_addr_r = Output(UInt(32.W)) + + // store data down the pipe + val store_data_m = Output(UInt(32.W)) + + val dec_tlu_mrac_ff = Input(UInt(32.W)) // CSR read + + val lsu_exc_m = Output(UInt(1.W)) + val is_sideeffects_m = Output(UInt(1.W)) + val lsu_commit_r = Output(UInt(1.W)) + val lsu_single_ecc_error_incr = Output(UInt(1.W)) + val lsu_error_pkt_r = Output(new el2_lsu_error_pkt_t()) + + val lsu_fir_addr = Output(UInt(31.W)) //(31:1) in sv // fast interrupt address TBD + val lsu_fir_error = Output(UInt(2.W)) // Error during fast interrupt lookup TBD + + // address in dccm/pic/external per pipe stage + val addr_in_dccm_d = Output(UInt(1.W)) + val addr_in_dccm_m = Output(UInt(1.W)) + val addr_in_dccm_r = Output(UInt(1.W)) + + val addr_in_pic_d = Output(UInt(1.W)) + val addr_in_pic_m = Output(UInt(1.W)) + val addr_in_pic_r = Output(UInt(1.W)) + + val addr_external_m = Output(UInt(1.W)) + + // DMA slave + val dma_dccm_req = Input(UInt(1.W)) + val dma_mem_addr = Input(UInt(32.W)) + val dma_mem_sz = Input(UInt(3.W)) + val dma_mem_write = Input(UInt(1.W)) + val dma_mem_wdata = Input(UInt(64.W)) + + // Store buffer related signals + val lsu_pkt_d = Output(new el2_lsu_pkt_t()) + val lsu_pkt_m = Output(new el2_lsu_pkt_t()) + val lsu_pkt_r = Output(new el2_lsu_pkt_t()) + + val scan_mode = Input(UInt(1.W)) + }) + + + val dma_pkt_d = Wire(new el2_lsu_pkt_t()) + val lsu_pkt_m_in = Wire(new el2_lsu_pkt_t()) + val lsu_pkt_r_in = Wire(new el2_lsu_pkt_t()) + val lsu_error_pkt_m = Wire(new el2_lsu_error_pkt_t()) + + val lsu_rs1_d = Mux(io.dec_lsu_valid_raw_d.asBool,io.exu_lsu_rs1_d,io.dma_mem_addr) + val lsu_offset_d = io.dec_lsu_offset_d(11,0) & Fill(12,io.dec_lsu_valid_raw_d) + val rs1_d_raw = lsu_rs1_d + val offset_d = lsu_offset_d + val rs1_d = Mux(io.lsu_pkt_d.load_ldst_bypass_d.asBool,io.lsu_result_m,rs1_d_raw) + + // generate the ls address + val lsadder = Module(new rvlsadder()) + lsadder.io.rs1 := rs1_d + lsadder.io.offset := offset_d + val full_addr_d = lsadder.io.dout + + val addr_offset_d = ((Fill(3,io.lsu_pkt_d.half)) & 1.U(3.W)) | + ((Fill(3,io.lsu_pkt_d.word)) & 3.U(3.W)) | + ((Fill(3,io.lsu_pkt_d.dword)) & 7.U(3.W)) + + val end_addr_offset_d = Cat(offset_d(11),offset_d(11,0)) + Cat(Fill(9,0.U),addr_offset_d(2,0)) + val full_end_addr_d = rs1_d(31,0) + Cat(Fill(19,end_addr_offset_d(12)),end_addr_offset_d(12,0)) + io.end_addr_d := full_end_addr_d + + //optimize with bulk operator + val addrcheck = Module(new el2_lsu_addrcheck()) + + addrcheck.io.lsu_c2_m_clk := io.lsu_c2_m_clk + //val rst_l = IO(Input(1.W)) //implicit + addrcheck.io.start_addr_d := full_addr_d + addrcheck.io.end_addr_d := full_end_addr_d + addrcheck.io.lsu_pkt_d := io.lsu_pkt_d + addrcheck.io.dec_tlu_mrac_ff := io.dec_tlu_mrac_ff + addrcheck.io.rs1_region_d := rs1_d(31,28) + addrcheck.io.rs1_d := rs1_d + io.is_sideeffects_m := addrcheck.io.is_sideeffects_m + io.addr_in_dccm_d := addrcheck.io.addr_in_dccm_d + io.addr_in_pic_d := addrcheck.io.addr_in_pic_d + val addr_external_d = addrcheck.io.addr_external_d + val access_fault_d = addrcheck.io.access_fault_d + val misaligned_fault_d = addrcheck.io.misaligned_fault_d + val exc_mscause_d = addrcheck.io.exc_mscause_d + val fir_dccm_access_error_d = addrcheck.io.fir_dccm_access_error_d + val fir_nondccm_access_error_d = addrcheck.io.fir_nondccm_access_error_d + addrcheck.io.scan_mode := io.scan_mode + + + val exc_mscause_r = WireInit(0.U(4.W)) + val fir_dccm_access_error_r = WireInit(0.U(1.W)) + val fir_nondccm_access_error_r = WireInit(0.U(1.W)) + val access_fault_r = WireInit(0.U(1.W)) + val misaligned_fault_r = WireInit(0.U(1.W)) + val lsu_fir_error_m = WireInit(0.U(2.W)) + val fir_dccm_access_error_m = WireInit(0.U(1.W)) + val fir_nondccm_access_error_m = WireInit(0.U(1.W)) + + val access_fault_m = withClock(io.lsu_c1_m_clk){RegNext(access_fault_d,0.U)} + val misaligned_fault_m = withClock(io.lsu_c1_m_clk){RegNext(misaligned_fault_d,0.U)} + val exc_mscause_m = withClock(io.lsu_c1_m_clk){RegNext(exc_mscause_d,0.U)} + fir_dccm_access_error_m := withClock(io.lsu_c1_m_clk){RegNext(fir_dccm_access_error_d,0.U)} + fir_nondccm_access_error_m := withClock(io.lsu_c1_m_clk){RegNext(fir_nondccm_access_error_d,0.U)} + + io.lsu_exc_m := access_fault_m | misaligned_fault_m + io.lsu_single_ecc_error_incr := (io.lsu_single_ecc_error_r & ~io.lsu_double_ecc_error_r) & (io.lsu_commit_r | io.lsu_pkt_r.dma) & io.lsu_pkt_r.valid + + if (pt1.LOAD_TO_USE_PLUS1 == 1){ + // Generate exception packet + io.lsu_error_pkt_r.exc_valid := (access_fault_r | misaligned_fault_r | io.lsu_double_ecc_error_r) & io.lsu_pkt_r.valid & ~io.lsu_pkt_r.dma & ~io.lsu_pkt_r.fast_int //TBD(lsu_pkt_r.fast_int) + io.lsu_error_pkt_r.single_ecc_error := io.lsu_single_ecc_error_r & ~io.lsu_error_pkt_r.exc_valid & ~io.lsu_pkt_r.dma + io.lsu_error_pkt_r.inst_type := io.lsu_pkt_r.store + io.lsu_error_pkt_r.exc_type := ~misaligned_fault_r + io.lsu_error_pkt_r.mscause := Mux((io.lsu_double_ecc_error_r & ~misaligned_fault_r & ~access_fault_r).asBool,1.U(4.W), exc_mscause_r(3,0)) + io.lsu_error_pkt_r.addr := io.lsu_addr_r(31,0)//lsu_addr_d->lsu_full_addr + io.lsu_fir_error := Mux(fir_nondccm_access_error_r.asBool,3.U(2.W), Mux(fir_dccm_access_error_r.asBool,2.U(2.W), Mux((io.lsu_pkt_r.fast_int & io.lsu_double_ecc_error_r).asBool,1.U(2.W),0.U(2.W)))) + + access_fault_r := withClock(io.lsu_c1_r_clk){RegNext(access_fault_m,0.U)} + exc_mscause_r := withClock(io.lsu_c1_r_clk){RegNext(exc_mscause_m,0.U)} + fir_dccm_access_error_r := withClock(io.lsu_c1_r_clk){RegNext(fir_dccm_access_error_m,0.U)} + fir_nondccm_access_error_r := withClock(io.lsu_c1_r_clk){RegNext(fir_nondccm_access_error_m,0.U)} + misaligned_fault_r := withClock(io.lsu_c1_r_clk){RegNext(misaligned_fault_m,0.U)} + } + + else //L2U_Plus1_0 + { + // Generate exception packet + lsu_error_pkt_m.exc_valid := (access_fault_m | misaligned_fault_m | io.lsu_double_ecc_error_m) & io.lsu_pkt_m.valid & ~io.lsu_pkt_m.dma & ~io.lsu_pkt_m.fast_int & ~io.flush_m_up //TBD(lsu_pkt_r.fast_int) + lsu_error_pkt_m.single_ecc_error := io.lsu_single_ecc_error_m & ~lsu_error_pkt_m.exc_valid & ~io.lsu_pkt_m.dma + lsu_error_pkt_m.inst_type := io.lsu_pkt_m.store + lsu_error_pkt_m.exc_type := ~misaligned_fault_m + lsu_error_pkt_m.mscause := Mux(((io.lsu_double_ecc_error_m & ~misaligned_fault_m & ~access_fault_m)===1.U),1.U(4.W), exc_mscause_m(3,0)) + lsu_error_pkt_m.addr := io.lsu_addr_m(31,0)//lsu_addr_d->lsu_full_addr + lsu_fir_error_m := Mux(fir_nondccm_access_error_m.asBool,3.U(2.W), Mux(fir_dccm_access_error_m.asBool,2.U(2.W), Mux((io.lsu_pkt_m.fast_int & io.lsu_double_ecc_error_m).asBool,1.U(2.W),0.U(2.W)))) + io.lsu_error_pkt_r := withClock(io.lsu_c2_r_clk){RegNext(lsu_error_pkt_m,0.U.asTypeOf(lsu_error_pkt_m.cloneType))} + io.lsu_fir_error := withClock(io.lsu_c2_r_clk){RegNext(lsu_fir_error_m,0.U)} + } + dma_pkt_d.unsign := 0.U + dma_pkt_d.fast_int := 0.U + dma_pkt_d.valid := io.dma_dccm_req + dma_pkt_d.dma := 1.U + dma_pkt_d.store := io.dma_mem_write + dma_pkt_d.load := ~io.dma_mem_write + dma_pkt_d.by := (io.dma_mem_sz(2,0) === 0.U(3.W)) + dma_pkt_d.half := (io.dma_mem_sz(2,0) === 1.U(3.W)) + dma_pkt_d.word := (io.dma_mem_sz(2,0) === 2.U(3.W)) + dma_pkt_d.dword := (io.dma_mem_sz(2,0) === 3.U(3.W)) + dma_pkt_d.store_data_bypass_d := 0.U + dma_pkt_d.load_ldst_bypass_d := 0.U + dma_pkt_d.store_data_bypass_m := 0.U + + val lsu_ld_datafn_r = WireInit(0.U(32.W)) + val lsu_ld_datafn_corr_r = WireInit(0.U(32.W)) + val lsu_ld_datafn_m = WireInit(0.U(32.W)) + + io.lsu_pkt_d := Mux(io.dec_lsu_valid_raw_d.asBool,io.lsu_p,dma_pkt_d) + lsu_pkt_m_in := io.lsu_pkt_d + lsu_pkt_r_in := io.lsu_pkt_m + + io.lsu_pkt_d.valid := (io.lsu_p.valid & ~(io.flush_m_up & ~io.lsu_p.fast_int)) | io.dma_dccm_req + lsu_pkt_m_in.valid := io.lsu_pkt_d.valid & ~(io.flush_m_up & ~io.lsu_pkt_d.dma) + lsu_pkt_r_in.valid := io.lsu_pkt_m.valid & ~(io.flush_m_up & ~io.lsu_pkt_m.dma) + + io.lsu_pkt_m := withClock(io.lsu_c1_m_clk){RegNext(lsu_pkt_m_in,0.U.asTypeOf(lsu_pkt_m_in.cloneType))} + io.lsu_pkt_r := withClock(io.lsu_c1_r_clk){RegNext(lsu_pkt_r_in,0.U.asTypeOf(lsu_pkt_r_in.cloneType))} + io.lsu_pkt_m.valid := withClock(io.lsu_c2_m_clk){RegNext(lsu_pkt_m_in.valid,0.U)} + io.lsu_pkt_r.valid := withClock(io.lsu_c2_r_clk){RegNext(lsu_pkt_r_in.valid,0.U)} + + val dma_mem_wdata_shifted = io.dma_mem_wdata(63,0) >> Cat(io.dma_mem_addr(2,0), 0.U(3.W)) // Shift the dma data to lower bits to make it consistent to lsu stores + val store_data_d = Mux(io.dma_dccm_req.asBool,dma_mem_wdata_shifted(31,0),io.exu_lsu_rs2_d(31,0)) // Write to PIC still happens in r stage + val store_data_m_in = Mux(io.lsu_pkt_d.store_data_bypass_d.asBool,io.lsu_result_m(31,0),store_data_d(31,0)) + + val store_data_pre_m = withClock(io.lsu_store_c1_m_clk){RegNext(store_data_m_in,0.U)} + io.lsu_addr_m := withClock(io.lsu_c1_m_clk){RegNext(io.lsu_addr_d,0.U)} + io.lsu_addr_r := withClock(io.lsu_c1_r_clk){RegNext(io.lsu_addr_m,0.U)} + io.end_addr_m := withClock(io.lsu_c1_m_clk){RegNext(io.end_addr_d,0.U)} + io.end_addr_r := withClock(io.lsu_c1_r_clk){RegNext(io.end_addr_m,0.U)} + io.addr_in_dccm_m := withClock(io.lsu_c1_m_clk){RegNext(io.addr_in_dccm_d,0.U)} + io.addr_in_dccm_r := withClock(io.lsu_c1_r_clk){RegNext(io.addr_in_dccm_m,0.U)} + io.addr_in_pic_m := withClock(io.lsu_c1_m_clk){RegNext(io.addr_in_pic_d,0.U)} + io.addr_in_pic_r := withClock(io.lsu_c1_r_clk){RegNext(io.addr_in_pic_m,0.U)} + io.addr_external_m := withClock(io.lsu_c1_m_clk){RegNext(addr_external_d,0.U)} + val addr_external_r = withClock(io.lsu_c1_r_clk){RegNext(io.addr_external_m,0.U)} + val bus_read_data_r = withClock(io.lsu_c1_r_clk){RegNext(io.bus_read_data_m,0.U)} + // Fast interrupt address + io.lsu_fir_addr := io.lsu_ld_data_corr_r(31,1) //original (31,1) TBD + // absence load/store all 0's + io.lsu_addr_d := full_addr_d + // Interrupt as a flush source allows the WB to occur + io.lsu_commit_r := io.lsu_pkt_r.valid & (io.lsu_pkt_r.store | io.lsu_pkt_r.load) & ~io.flush_r & ~io.lsu_pkt_r.dma + io.store_data_m := (io.picm_mask_data_m(31,0) | Fill(32,~io.addr_in_pic_m)) & Mux(io.lsu_pkt_m.store_data_bypass_m.asBool,io.lsu_result_m,store_data_pre_m) + + if (pt1.LOAD_TO_USE_PLUS1 == 1){ + //bus_read_data_r coming from bus interface, lsu_ld_data_r -> coming from dccm_ctl + lsu_ld_datafn_r := Mux(addr_external_r.asBool, bus_read_data_r,io.lsu_ld_data_r) + lsu_ld_datafn_corr_r := Mux(addr_external_r.asBool, bus_read_data_r,io.lsu_ld_data_corr_r) + // this is really R stage but don't want to make all the changes to support M,R buses + io.lsu_result_m := ((Fill(32,io.lsu_pkt_r.unsign & io.lsu_pkt_r.by)) & Cat(0.U(24.W),lsu_ld_datafn_r(7,0))) | + ((Fill(32,io.lsu_pkt_r.unsign & io.lsu_pkt_r.half)) & Cat(0.U(16.W),lsu_ld_datafn_r(15,0))) | + ((Fill(32,~io.lsu_pkt_r.unsign & io.lsu_pkt_r.by)) & Cat((Fill(24, lsu_ld_datafn_r(7))) ,lsu_ld_datafn_r(7,0))) | + ((Fill(32,~io.lsu_pkt_r.unsign & io.lsu_pkt_r.half)) & Cat((Fill(16,lsu_ld_datafn_r(15))) ,lsu_ld_datafn_r(15,0))) | + ((Fill(32,io.lsu_pkt_r.word)) & lsu_ld_datafn_r(31,0)) + // this signal is used for gpr update + io.lsu_result_corr_r := ((Fill(32,io.lsu_pkt_r.unsign & io.lsu_pkt_r.by)) & Cat(0.U(24.W),lsu_ld_datafn_corr_r(7,0))) | + ((Fill(32,io.lsu_pkt_r.unsign & io.lsu_pkt_r.half)) & Cat(0.U(16.W),lsu_ld_datafn_corr_r(15,0))) | + ((Fill(32,~io.lsu_pkt_r.unsign & io.lsu_pkt_r.by)) & Cat((Fill(24, lsu_ld_datafn_corr_r(7))) ,lsu_ld_datafn_corr_r(7,0))) | + ((Fill(32,~io.lsu_pkt_r.unsign & io.lsu_pkt_r.half)) & Cat((Fill(16,lsu_ld_datafn_corr_r(15))) ,lsu_ld_datafn_corr_r(15,0))) | + ((Fill(32,io.lsu_pkt_r.word)) & lsu_ld_datafn_corr_r(31,0)) + } + + else { + lsu_ld_datafn_m := Mux(io.addr_external_m.asBool, io.bus_read_data_m,io.lsu_ld_data_m) + lsu_ld_datafn_corr_r := Mux(addr_external_r===1.U, bus_read_data_r,io.lsu_ld_data_corr_r) + io.lsu_result_m := ((Fill(32,io.lsu_pkt_m.unsign & io.lsu_pkt_m.by)) & Cat(0.U(24.W),lsu_ld_datafn_m(7,0))) | + ((Fill(32,io.lsu_pkt_m.unsign & io.lsu_pkt_m.half)) & Cat(0.U(16.W),lsu_ld_datafn_m(15,0))) | + ((Fill(32,~io.lsu_pkt_m.unsign & io.lsu_pkt_m.by)) & Cat((Fill(24, lsu_ld_datafn_m(7))) ,lsu_ld_datafn_m(7,0))) | + ((Fill(32,~io.lsu_pkt_m.unsign & io.lsu_pkt_m.half)) & Cat((Fill(16,lsu_ld_datafn_m(15))) ,lsu_ld_datafn_m(15,0))) | + ((Fill(32,io.lsu_pkt_m.word)) & lsu_ld_datafn_m(31,0)) + io.lsu_result_corr_r := ((Fill(32,io.lsu_pkt_r.unsign & io.lsu_pkt_r.by)) & Cat(0.U(24.W),lsu_ld_datafn_corr_r(7,0))) | + ((Fill(32,io.lsu_pkt_r.unsign & io.lsu_pkt_r.half)) & Cat(0.U(16.W),lsu_ld_datafn_corr_r(15,0))) | + ((Fill(32,~io.lsu_pkt_r.unsign & io.lsu_pkt_r.by)) & Cat((Fill(24, lsu_ld_datafn_corr_r(7))) ,lsu_ld_datafn_corr_r(7,0))) | + ((Fill(32,~io.lsu_pkt_r.unsign & io.lsu_pkt_r.half)) & Cat((Fill(16,lsu_ld_datafn_corr_r(15))) ,lsu_ld_datafn_corr_r(15,0))) | + ((Fill(32,io.lsu_pkt_r.word)) & lsu_ld_datafn_corr_r(31,0)) + } +} + +//println(chisel3.Driver.emitVerilog(new el2_lsu_lsc_ctl)) +object lsu_lsc_ctl extends App{ + println("Generate Verilog") + chisel3.Driver.execute(args, ()=> new el2_lsu_lsc_ctl) +} \ No newline at end of file diff --git a/src/main/scala/lsu/el2_lsu_stbuf.scala b/src/main/scala/lsu/el2_lsu_stbuf.scala index a0f9d959..9c5aaab5 100644 --- a/src/main/scala/lsu/el2_lsu_stbuf.scala +++ b/src/main/scala/lsu/el2_lsu_stbuf.scala @@ -1,10 +1,12 @@ package lsu import lib._ import chisel3._ +import chisel3.experimental.chiselName import chisel3.util._ import include._ -class el2_lsu_stbuf extends Module with param { +@chiselName +class el2_lsu_stbuf extends Module with param with RequireAsyncReset { val io = IO (new Bundle { val lsu_c1_m_clk = Input(Clock()) val lsu_c1_r_clk = Input(Clock()) @@ -60,19 +62,20 @@ class el2_lsu_stbuf extends Module with param { io.stbuf_fwdbyteen_lo_m := 0.U - val stbuf_vld = Wire(Vec(LSU_STBUF_DEPTH, Bool())) + val stbuf_vld = WireInit(UInt(LSU_STBUF_DEPTH.W), init = 0.U) + val stbuf_wr_en = WireInit(UInt(LSU_STBUF_DEPTH.W), init = 0.U) val stbuf_dma_kill_en = WireInit(UInt(LSU_STBUF_DEPTH.W), init = 0.U) - val stbuf_dma_kill = Wire(Vec(LSU_STBUF_DEPTH, Bool())) + val stbuf_dma_kill = WireInit(UInt(LSU_STBUF_DEPTH.W), init = 0.U) val stbuf_reset = WireInit(UInt(LSU_STBUF_DEPTH.W), init = 0.U) val store_byteen_ext_r = WireInit(UInt(8.W), init= 0.U) - val stbuf_addr = Wire(Vec(LSU_STBUF_DEPTH,UInt(LSU_SB_BITS.W))) - stbuf_addr := (0 until LSU_STBUF_DEPTH).map(i => 0.U) + val stbuf_addr = Wire(Vec(LSU_STBUF_DEPTH,UInt(LSU_SB_BITS.W))) + stbuf_addr := (0 until LSU_STBUF_DEPTH).map(i => 0.U) val stbuf_byteen = Wire(Vec(LSU_STBUF_DEPTH,UInt(DCCM_BYTE_WIDTH.W))) stbuf_byteen := (0 until LSU_STBUF_DEPTH).map(i => 0.U) val stbuf_data = Wire(Vec(LSU_STBUF_DEPTH,UInt(DCCM_DATA_WIDTH.W))) stbuf_data := (0 until LSU_STBUF_DEPTH).map(i => 0.U) - val stbuf_addrin = Wire(Vec(LSU_STBUF_DEPTH,UInt(LSU_SB_BITS.W))) - stbuf_addrin := (0 until LSU_STBUF_DEPTH).map(i => 0.U) + val stbuf_addrin = Wire(Vec(LSU_STBUF_DEPTH,UInt(LSU_SB_BITS.W))) + stbuf_addrin := (0 until LSU_STBUF_DEPTH).map(i => 0.U) val stbuf_datain = Wire(Vec(LSU_STBUF_DEPTH,UInt(DCCM_DATA_WIDTH.W))) stbuf_datain := (0 until LSU_STBUF_DEPTH).map(i => 0.U) val stbuf_byteenin = Wire(Vec(LSU_STBUF_DEPTH,UInt(DCCM_BYTE_WIDTH.W))) @@ -87,10 +90,10 @@ class el2_lsu_stbuf extends Module with param { val cmpaddr_lo_m = WireInit(0.U(16.W)) val stbuf_fwdata_hi_pre_m = WireInit(UInt(DCCM_DATA_WIDTH.W),init = 0.U) val stbuf_fwdata_lo_pre_m = WireInit(UInt(DCCM_DATA_WIDTH.W),init = 0.U) - val ld_byte_rhit_lo_lo = WireInit(UInt(DCCM_DATA_WIDTH.W),init = 0.U) - val ld_byte_rhit_hi_lo = WireInit(UInt(DCCM_DATA_WIDTH.W),init = 0.U) - val ld_byte_rhit_lo_hi = WireInit(UInt(DCCM_DATA_WIDTH.W),init = 0.U) - val ld_byte_rhit_hi_hi = WireInit(UInt(DCCM_DATA_WIDTH.W),init = 0.U) + val ld_byte_rhit_lo_lo = WireInit(UInt(DCCM_BYTE_WIDTH.W),init = 0.U) + val ld_byte_rhit_hi_lo = WireInit(UInt(DCCM_BYTE_WIDTH.W),init = 0.U) + val ld_byte_rhit_lo_hi = WireInit(UInt(DCCM_BYTE_WIDTH.W),init = 0.U) + val ld_byte_rhit_hi_hi = WireInit(UInt(DCCM_BYTE_WIDTH.W),init = 0.U) val ld_byte_hit_lo = WireInit(UInt(DCCM_BYTE_WIDTH.W),init = 0.U) val ld_byte_rhit_lo = WireInit(UInt(DCCM_BYTE_WIDTH.W),init = 0.U) val ld_byte_hit_hi = WireInit(UInt(DCCM_BYTE_WIDTH.W),init = 0.U) @@ -98,6 +101,7 @@ class el2_lsu_stbuf extends Module with param { val ldst_byteen_ext_r = WireInit(UInt(8.W),init = 0.U) val ld_fwddata_rpipe_lo = WireInit(UInt(32.W),init = 0.U) val ld_fwddata_rpipe_hi = WireInit(UInt(32.W),init = 0.U) + // val datain1 = Wire(Vec(LSU_STBUF_DEPTH,UInt(8.W))) val datain2 = Wire(Vec(LSU_STBUF_DEPTH,UInt(8.W))) @@ -105,73 +109,88 @@ class el2_lsu_stbuf extends Module with param { val datain4 = Wire(Vec(LSU_STBUF_DEPTH,UInt(8.W))) //////////////////////////////////////Code Start here/////////////////////////////// - val ldst_byteen_r = Fill(8,io.lsu_pkt_r.by) & "b00000001".U | - Fill(8,io.lsu_pkt_r.half) & "b00000011".U | - Fill(8,io.lsu_pkt_r.word) & "b00001111".U | - Fill(8,io.lsu_pkt_r.dword) & "b11111111".U + val ldst_byteen_r = Mux1H(Seq( + io.lsu_pkt_r.by.asBool -> "b00000001".U, + io.lsu_pkt_r.half.asBool ->"b00000011".U, + io.lsu_pkt_r.word.asBool -> "b00001111".U, + io.lsu_pkt_r.dword.asBool -> "b11111111".U + )) val ldst_dual_d = io.lsu_addr_d (2) =/= io.end_addr_d(2) val dual_stbuf_write_r = ldst_dual_r & io.store_stbuf_reqvld_r store_byteen_ext_r := ldst_byteen_r << io.lsu_addr_r(1,0) - val store_byteen_hi_r = store_byteen_ext_r (7,4) & Fill(4, io.lsu_pkt_m.store) - val store_byteen_lo_r = store_byteen_ext_r (3,0) & Fill(4, io.lsu_pkt_m.store) + val store_byteen_hi_r = store_byteen_ext_r (7,4) & Fill(4, io.lsu_pkt_r.store) + val store_byteen_lo_r = store_byteen_ext_r (3,0) & Fill(4, io.lsu_pkt_r.store) + val RdPtrPlus1 = RdPtr + "b01".U val WrPtrPlus1 = WrPtr + "b01".U val WrPtrPlus2 = WrPtr + "b10".U io.ldst_stbuf_reqvld_r := io.lsu_commit_r & io.store_stbuf_reqvld_r - val store_matchvec_lo_r = (0 until LSU_STBUF_DEPTH).map(i=> ((stbuf_addr(i)(LSU_SB_BITS-1,log2Ceil(LSU_STBUF_DEPTH)) === io.lsu_addr_r(LSU_SB_BITS-1,log2Ceil(LSU_STBUF_DEPTH))) & stbuf_vld(i) & !stbuf_dma_kill(i) & !stbuf_reset(i)).asUInt).reverse.reduce(Cat(_,_)) - val store_matchvec_hi_r = (0 until LSU_STBUF_DEPTH).map(i=> ((stbuf_addr(i)(LSU_SB_BITS-1,log2Ceil(LSU_STBUF_DEPTH)) === io.end_addr_r(LSU_SB_BITS-1,log2Ceil(LSU_STBUF_DEPTH))) & stbuf_vld(i) & !stbuf_dma_kill(i) & dual_stbuf_write_r & !stbuf_reset(i)).asUInt).reverse.reduce(Cat(_,_)) + val store_matchvec_lo_r = (0 until LSU_STBUF_DEPTH).map(i=> (stbuf_addr(i)(LSU_SB_BITS-1,log2Ceil(DCCM_BYTE_WIDTH)) === io.lsu_addr_r(LSU_SB_BITS-1,log2Ceil(DCCM_BYTE_WIDTH)) & stbuf_vld(i) & !stbuf_dma_kill(i) & !stbuf_reset(i)).asUInt).reverse.reduce(Cat(_,_)) + val store_matchvec_hi_r = (0 until LSU_STBUF_DEPTH).map(i=> (stbuf_addr(i)(LSU_SB_BITS-1,log2Ceil(DCCM_BYTE_WIDTH)) === io.end_addr_r(LSU_SB_BITS-1,log2Ceil(DCCM_BYTE_WIDTH)) & stbuf_vld(i) & !stbuf_dma_kill(i) & dual_stbuf_write_r & !stbuf_reset(i)).asUInt).reverse.reduce(Cat(_,_)) val store_coalesce_lo_r = store_matchvec_lo_r.orR val store_coalesce_hi_r = store_matchvec_hi_r.orR - val stbuf_wr_en= (0 until LSU_STBUF_DEPTH).map(i=> (io.ldst_stbuf_reqvld_r & ((i == WrPtr).asBool & !store_coalesce_lo_r) | ((i == WrPtr).asBool & !dual_stbuf_write_r & !store_coalesce_hi_r) | - ((i == WrPtrPlus1).asBool & dual_stbuf_write_r & !(store_coalesce_lo_r | store_coalesce_hi_r)) | store_matchvec_lo_r(i) | store_matchvec_hi_r(i)).asUInt).reverse.reduce(Cat(_,_)) - stbuf_reset := (0 until LSU_STBUF_DEPTH).map(i=> (io.lsu_stbuf_commit_any | io.stbuf_reqvld_flushed_any) & (i == RdPtr).asBool.asUInt).reverse.reduce(Cat(_,_)) - val sel_lo = (0 until LSU_STBUF_DEPTH).map(i=> (!ldst_dual_r | io.store_stbuf_reqvld_r) & (i == WrPtr).asBool & !store_coalesce_lo_r | store_matchvec_lo_r(i).asUInt).reverse.reduce(Cat(_,_)) + stbuf_wr_en := (0 until LSU_STBUF_DEPTH).map(i=> (io.ldst_stbuf_reqvld_r & ( + ((i.asUInt === WrPtr) & !store_coalesce_lo_r) | + ((i.asUInt === WrPtr) & dual_stbuf_write_r & !store_coalesce_hi_r) | + ((i.asUInt === WrPtrPlus1) & dual_stbuf_write_r & !(store_coalesce_lo_r | store_coalesce_hi_r)) | + store_matchvec_lo_r(i) | store_matchvec_hi_r(i))).asUInt).reverse.reduce(Cat(_,_)) + stbuf_reset := (0 until LSU_STBUF_DEPTH).map(i=> ((io.lsu_stbuf_commit_any | io.stbuf_reqvld_flushed_any) & (i.asUInt === RdPtr).asBool).asUInt).reverse.reduce(Cat(_,_)) + val sel_lo = (0 until LSU_STBUF_DEPTH).map(i=> (((!ldst_dual_r | io.store_stbuf_reqvld_r) & (i.asUInt === WrPtr).asBool & !store_coalesce_lo_r) | store_matchvec_lo_r(i)).asUInt).reverse.reduce(Cat(_,_)) - stbuf_addrin := (0 until LSU_STBUF_DEPTH).map(i=> Mux(sel_lo(i), io.lsu_addr_r, io.end_addr_r).asUInt).reverse - stbuf_byteenin := (0 until LSU_STBUF_DEPTH).map(i=> Mux(sel_lo(i), stbuf_byteen(i) | store_byteen_lo_r, stbuf_byteen(i) | store_byteen_hi_r).asUInt).reverse + stbuf_addrin := (0 until LSU_STBUF_DEPTH).map(i=> Mux(sel_lo(i), io.lsu_addr_r(LSU_SB_BITS-1,0), io.end_addr_r(LSU_SB_BITS-1,0))) + stbuf_byteenin := (0 until LSU_STBUF_DEPTH).map(i=> Mux(sel_lo(i), stbuf_byteen(i) | store_byteen_lo_r, stbuf_byteen(i) | store_byteen_hi_r).asUInt) datain1 := (0 until LSU_STBUF_DEPTH).map(i=> Mux(sel_lo(i), Mux(!stbuf_byteen(i)(0) | store_byteen_lo_r(0), io.store_datafn_lo_r(7, 0), stbuf_data(i)(7, 0)), - Mux(!stbuf_byteen(i)(0) | store_byteen_hi_r(0), io.store_datafn_hi_r(7, 0), stbuf_data(i)(7, 0))).asUInt).reverse + Mux(!stbuf_byteen(i)(0) | store_byteen_hi_r(0), io.store_datafn_hi_r(7, 0), stbuf_data(i)(7, 0))).asUInt) datain2 := (0 until LSU_STBUF_DEPTH).map(i=> Mux(sel_lo(i), Mux(!stbuf_byteen(i)(1) | store_byteen_lo_r(1), io.store_datafn_lo_r(15, 8), stbuf_data(i)(15, 8)), - Mux(!stbuf_byteen(i)(1) | store_byteen_hi_r(1), io.store_datafn_hi_r(15, 8), stbuf_data(i)(15, 8))).asUInt).reverse + Mux(!stbuf_byteen(i)(1) | store_byteen_hi_r(1), io.store_datafn_hi_r(15, 8), stbuf_data(i)(15, 8))).asUInt) datain3 := (0 until LSU_STBUF_DEPTH).map(i=> Mux(sel_lo(i), Mux(!stbuf_byteen(i)(2) | store_byteen_lo_r(2), io.store_datafn_lo_r(23, 16), stbuf_data(i)(23, 16)), - Mux(!stbuf_byteen(i)(2) | store_byteen_hi_r(2), io.store_datafn_hi_r(23, 16), stbuf_data(i)(23, 16))).asUInt).reverse + Mux(!stbuf_byteen(i)(2) | store_byteen_hi_r(2), io.store_datafn_hi_r(23, 16), stbuf_data(i)(23, 16))).asUInt) datain4 := (0 until LSU_STBUF_DEPTH).map(i=> Mux(sel_lo(i), Mux(!stbuf_byteen(i)(3) | store_byteen_lo_r(3), io.store_datafn_lo_r(31, 24), stbuf_data(i)(31, 24)), - Mux(!stbuf_byteen(i)(3) | store_byteen_hi_r(3), io.store_datafn_hi_r(31, 24), stbuf_data(i)(31, 24))).asUInt).reverse + Mux(!stbuf_byteen(i)(3) | store_byteen_hi_r(3), io.store_datafn_hi_r(31, 24), stbuf_data(i)(31, 24))).asUInt) stbuf_datain := (0 until LSU_STBUF_DEPTH).map(i=>Cat(datain4(i), datain3(i), datain2(i), datain1(i))) // io.testout := datain3 - for (i<- 0 until LSU_STBUF_DEPTH) { - withClock(io.lsu_free_c2_clk){ stbuf_vld(i) := RegEnable(1.U & !stbuf_reset(i), 0.U, stbuf_wr_en(i))} - withClock(io.lsu_free_c2_clk){ stbuf_dma_kill(i) := RegEnable(1.U & !stbuf_reset(i), 0.U, stbuf_dma_kill_en(i).asBool)} - stbuf_addr(i) := RegEnable(stbuf_addrin(i), 0.U, stbuf_wr_en(i)) - withClock(io.lsu_stbuf_c1_clk){ stbuf_byteen(i) := RegEnable( stbuf_byteenin(i) & Fill(stbuf_byteenin(i).getWidth, !stbuf_reset(i)), 0.U, stbuf_wr_en(i))} - stbuf_data(i) := RegEnable(stbuf_datain(i), 0.U, stbuf_wr_en(i)) +// for (i<- 0 until LSU_STBUF_DEPTH) { + stbuf_vld := (0 until LSU_STBUF_DEPTH).map(i=> withClock(io.lsu_free_c2_clk){ RegNext(Mux(stbuf_wr_en(i).asBool(),1.U ,stbuf_vld(i)) & !stbuf_reset(i), 0.U)}).reverse.reduce(Cat(_,_)) +// stbuf_addr := (0 until LSU_STBUF_DEPTH).map(i=> RegEnable(stbuf_addrin(i), 0.U, stbuf_wr_en(i).asBool())).reverse.reduce(Cat(_,_)) + stbuf_dma_kill := (0 until LSU_STBUF_DEPTH).map(i=> RegNext(Mux(stbuf_dma_kill_en(i).asBool,1.U ,stbuf_dma_kill(i)) & !stbuf_reset(i), 0.U)).reverse.reduce(Cat(_,_)) + stbuf_byteen := (0 until LSU_STBUF_DEPTH).map(i=> withClock(io.lsu_stbuf_c1_clk){ RegNext(Mux(stbuf_wr_en(i).asBool(),stbuf_byteenin(i) , stbuf_byteen(i)) & Fill(stbuf_byteenin(i).getWidth , !stbuf_reset(i)), 0.U)}) + //stbuf_data := (0 until LSU_STBUF_DEPTH).map(i=> RegEnable(stbuf_datain(i), 0.U, stbuf_wr_en(i).asBool())).reverse.reduce(Cat(_,_)) + for (i<- 0 until LSU_STBUF_DEPTH) { + // withClock(io.lsu_free_c2_clk){ stbuf_dma_kill(i) := RegEnable(1.U & !stbuf_reset(i), 0.U, stbuf_dma_kill_en(i).asBool)} + + stbuf_addr(i) := RegEnable(stbuf_addrin(i), 0.U, stbuf_wr_en(i).asBool()) + // withClock(io.lsu_stbuf_c1_clk){ stbuf_byteen(i) := RegNext( stbuf_byteenin(i) & Fill(stbuf_byteenin(i).getWidth, !stbuf_reset(i)), 0.U, stbuf_wr_en(i).asBool())} + stbuf_data(i) := RegEnable(stbuf_datain(i), 0.U, stbuf_wr_en(i).asBool()) } withClock(io.lsu_c1_m_clk){ldst_dual_m := RegNext(ldst_dual_d,0.U)} withClock(io.lsu_c1_r_clk){ldst_dual_r := RegNext(ldst_dual_m,0.U)} // Store Buffer drain logic io.stbuf_reqvld_flushed_any := stbuf_vld(RdPtr) & stbuf_dma_kill(RdPtr) - io.stbuf_reqvld_any := stbuf_vld(RdPtr) & !stbuf_dma_kill(RdPtr) & !stbuf_dma_kill_en.orR + io.stbuf_reqvld_any := stbuf_vld(RdPtr) & !stbuf_dma_kill(RdPtr) & !(stbuf_dma_kill_en.orR) io.stbuf_addr_any := stbuf_addr(RdPtr) io.stbuf_data_any := stbuf_data(RdPtr) - val WrPtrEn = ((io.ldst_stbuf_reqvld_r & !dual_stbuf_write_r & !(store_coalesce_hi_r | store_coalesce_lo_r)) | + val WrPtrEn = ((io.ldst_stbuf_reqvld_r & !dual_stbuf_write_r & !(store_coalesce_hi_r | store_coalesce_lo_r)) | (io.ldst_stbuf_reqvld_r & dual_stbuf_write_r & !(store_coalesce_hi_r & store_coalesce_lo_r))).asBool val NxtWrPtr = Mux((io.ldst_stbuf_reqvld_r & dual_stbuf_write_r & !(store_coalesce_hi_r | store_coalesce_lo_r)).asBool, WrPtrPlus2, WrPtrPlus1) val RdPtrEn = io.lsu_stbuf_commit_any | io.stbuf_reqvld_flushed_any val NxtRdPtr = RdPtrPlus1 + withClock(io.lsu_stbuf_c1_clk){ WrPtr := RegEnable(NxtWrPtr, 0.U, WrPtrEn)} + withClock(io.lsu_stbuf_c1_clk){ RdPtr := RegEnable(NxtRdPtr, 0.U, RdPtrEn)} + val stbuf_numvld_any = VecInit.tabulate(LSU_STBUF_DEPTH)(i=>Cat(0.U(3.W), stbuf_vld(i))).reduce (_+_) val isdccmst_m = io.lsu_pkt_m.valid & io.lsu_pkt_m.store & io.addr_in_dccm_m & !io.lsu_pkt_m.dma val isdccmst_r = io.lsu_pkt_r.valid & io.lsu_pkt_r.store & io.addr_in_dccm_r & !io.lsu_pkt_r.dma @@ -180,28 +199,29 @@ class el2_lsu_stbuf extends Module with param { stbuf_specvld_r := Cat(0.U(1.W),isdccmst_r) << (isdccmst_r & ldst_dual_r) val stbuf_specvld_any = stbuf_numvld_any + Cat(0.U(2.W), stbuf_specvld_m) + Cat(0.U(2.W), stbuf_specvld_r) - io.lsu_stbuf_full_any := Mux((!ldst_dual_d & io.dec_lsu_valid_raw_d).asBool,stbuf_specvld_any >= LSU_STBUF_DEPTH.U,stbuf_specvld_any >= (LSU_STBUF_DEPTH-1).U) + io.lsu_stbuf_full_any := Mux((!ldst_dual_d & io.dec_lsu_valid_raw_d).asBool,(stbuf_specvld_any >= LSU_STBUF_DEPTH.U),(stbuf_specvld_any >= (LSU_STBUF_DEPTH-1).U)) io.lsu_stbuf_empty_any := stbuf_numvld_any === 0.U val cmpen_hi_m = io.lsu_cmpen_m & ldst_dual_m - cmpaddr_hi_m := io.end_addr_m(LSU_SB_BITS-1,log2Ceil(LSU_STBUF_DEPTH)) + cmpaddr_hi_m := io.end_addr_m(LSU_SB_BITS-1,log2Ceil(DCCM_BYTE_WIDTH)) val cmpen_lo_m = io.lsu_cmpen_m - cmpaddr_lo_m := io.lsu_addr_m(LSU_SB_BITS-1,log2Ceil(LSU_STBUF_DEPTH)) + cmpaddr_lo_m := io.lsu_addr_m(LSU_SB_BITS-1,log2Ceil(DCCM_BYTE_WIDTH)) - val stbuf_match_hi = (0 until LSU_STBUF_DEPTH).map(i=> ((stbuf_addr(i)(LSU_SB_BITS-1,log2Ceil(LSU_STBUF_DEPTH)) === cmpaddr_hi_m(LSU_SB_BITS-1,log2Ceil(LSU_STBUF_DEPTH))) & stbuf_vld(i) & !stbuf_dma_kill(i) & io.addr_in_dccm_m).asUInt).reverse.reduce(Cat(_,_)) - val stbuf_match_lo = (0 until LSU_STBUF_DEPTH).map(i=> ((stbuf_addr(i)(LSU_SB_BITS-1,log2Ceil(LSU_STBUF_DEPTH)) === cmpaddr_lo_m(LSU_SB_BITS-1,log2Ceil(LSU_STBUF_DEPTH))) & stbuf_vld(i) & !stbuf_dma_kill(i) & io.addr_in_dccm_m).asUInt).reverse.reduce(Cat(_,_)) + val stbuf_match_hi = (0 until LSU_STBUF_DEPTH).map(i=> ((stbuf_addr(i)(LSU_SB_BITS-1,log2Ceil(DCCM_BYTE_WIDTH)) === cmpaddr_hi_m(13,0)) & stbuf_vld(i) & !stbuf_dma_kill(i) & io.addr_in_dccm_m).asUInt).reverse.reduce(Cat(_,_)) + val stbuf_match_lo = (0 until LSU_STBUF_DEPTH).map(i=> ((stbuf_addr(i)(LSU_SB_BITS-1,log2Ceil(DCCM_BYTE_WIDTH)) === cmpaddr_lo_m(13,0)) & stbuf_vld(i) & !stbuf_dma_kill(i) & io.addr_in_dccm_m).asUInt).reverse.reduce(Cat(_,_)) stbuf_dma_kill_en := (0 until LSU_STBUF_DEPTH).map(i=> ((stbuf_match_hi(i) | stbuf_match_lo(i)) & io.lsu_pkt_m.valid & io.lsu_pkt_m.dma & io.lsu_pkt_m.store).asUInt).reverse.reduce(Cat(_,_)) - val stbuf_fwdbyteenvec_hi = (0 until LSU_STBUF_DEPTH).map(i=>(0 until DCCM_BYTE_WIDTH).map(j=> stbuf_match_hi(i) & stbuf_byteen(i)(j) & stbuf_vld(i).asUInt()).reverse.reduce(Cat(_,_))) - val stbuf_fwdbyteenvec_lo = (0 until LSU_STBUF_DEPTH).map(i=>(0 until DCCM_BYTE_WIDTH).map(j=> stbuf_match_lo(i) & stbuf_byteen(i)(j) & stbuf_vld(i).asUInt()).reverse.reduce(Cat(_,_))) - val stbuf_fwdbyteen_hi_pre_m = (0 until LSU_STBUF_DEPTH).map(i=>(0 until DCCM_BYTE_WIDTH).map(j=> stbuf_fwdbyteenvec_hi(i)(j).asUInt()).reverse.reduce(_|_)) - val stbuf_fwdbyteen_lo_pre_m = (0 until LSU_STBUF_DEPTH).map(i=>(0 until DCCM_BYTE_WIDTH).map(j=> stbuf_fwdbyteenvec_lo(i)(j).asUInt()).reverse.reduce(_|_)) + val stbuf_fwdbyteenvec_hi = (0 until LSU_STBUF_DEPTH).map(i=>(0 until DCCM_BYTE_WIDTH).map(j=> stbuf_match_hi(i) & stbuf_byteen(i)(j) & stbuf_vld(i).asUInt())) + val stbuf_fwdbyteenvec_lo = (0 until LSU_STBUF_DEPTH).map(i=>(0 until DCCM_BYTE_WIDTH).map(j=> stbuf_match_lo(i) & stbuf_byteen(i)(j) & stbuf_vld(i).asUInt())) + val stbuf_fwdbyteen_hi_pre_m = (0 until LSU_STBUF_DEPTH).map(j=>(0 until DCCM_BYTE_WIDTH).map(i=> stbuf_fwdbyteenvec_hi(i)(j).asUInt()).reduce(_|_)) + val stbuf_fwdbyteen_lo_pre_m = (0 until LSU_STBUF_DEPTH).map(j=>(0 until DCCM_BYTE_WIDTH).map(i=> stbuf_fwdbyteenvec_lo(i)(j).asUInt()).reduce(_|_)) + + val stbuf_fwddata_hi_pre_m = VecInit.tabulate(LSU_STBUF_DEPTH)(i=> Fill(32,stbuf_match_hi(i)) & stbuf_data(i)).reverse.reduce(_|_) + val stbuf_fwddata_lo_pre_m = VecInit.tabulate(LSU_STBUF_DEPTH)(i=> Fill(32,stbuf_match_lo(i)) & stbuf_data(i)).reverse.reduce(_|_) - val stbuf_fwddata_hi_pre_m = VecInit.tabulate(LSU_STBUF_DEPTH)(i=> Fill(32,stbuf_match_hi(i)) & stbuf_data(i)).reduce(_|_) - val stbuf_fwddata_lo_pre_m = VecInit.tabulate(LSU_STBUF_DEPTH)(i=> Fill(32,stbuf_match_lo(i)) & stbuf_data(i)).reduce(_|_) ldst_byteen_ext_r := ldst_byteen_r << io.lsu_addr_r(1,0) val ldst_byteen_hi_r = ldst_byteen_ext_r(7,4) @@ -217,8 +237,8 @@ class el2_lsu_stbuf extends Module with param { ld_byte_rhit_hi_lo := (0 until DCCM_BYTE_WIDTH).map(i=> (ld_addr_rhit_hi_lo & ldst_byteen_hi_r(i)).asUInt).reverse.reduce(Cat(_,_)) ld_byte_rhit_hi_hi := (0 until DCCM_BYTE_WIDTH).map(i=> (ld_addr_rhit_hi_hi & ldst_byteen_hi_r(i)).asUInt).reverse.reduce(Cat(_,_)) - ld_byte_rhit_lo := (0 until DCCM_BYTE_WIDTH).map(i=> (ld_byte_rhit_lo_lo | ld_byte_rhit_hi_lo(i)).asUInt).reverse.reduce(Cat(_,_)) - ld_byte_rhit_hi := (0 until DCCM_BYTE_WIDTH).map(i=> (ld_byte_rhit_lo_hi | ld_byte_rhit_hi_hi(i)).asUInt).reverse.reduce(Cat(_,_)) + ld_byte_rhit_lo := (0 until DCCM_BYTE_WIDTH).map(i=> (ld_byte_rhit_lo_lo(i) | ld_byte_rhit_hi_lo(i)).asUInt).reverse.reduce(Cat(_,_)) + ld_byte_rhit_hi := (0 until DCCM_BYTE_WIDTH).map(i=> (ld_byte_rhit_lo_hi(i) | ld_byte_rhit_hi_hi(i)).asUInt).reverse.reduce(Cat(_,_)) val fwdpipe1_lo = (Fill(8, ld_byte_rhit_lo_lo(0)) & io.store_data_lo_r(7,0)) | (Fill(8, ld_byte_rhit_hi_lo(0)) & io.store_data_hi_r(7,0)) val fwdpipe2_lo = (Fill(8, ld_byte_rhit_lo_lo(1)) & io.store_data_lo_r(15,8)) | (Fill(8, ld_byte_rhit_hi_lo(1)) & io.store_data_hi_r(15,8)) @@ -232,6 +252,9 @@ class el2_lsu_stbuf extends Module with param { val fwdpipe4_hi = (Fill(8, ld_byte_rhit_lo_hi(3)) & io.store_data_lo_r(31,24)) | (Fill(8, ld_byte_rhit_hi_hi(3)) & io.store_data_hi_r(31,8)) ld_fwddata_rpipe_hi := Cat(fwdpipe4_hi,fwdpipe3_hi,fwdpipe2_hi,fwdpipe1_hi) + ld_byte_hit_lo := (0 until DCCM_BYTE_WIDTH).map(i=> (ld_byte_rhit_lo_lo(i) | ld_byte_rhit_hi_lo(i)).asUInt).reverse.reduce(Cat(_,_)) + ld_byte_hit_hi := (0 until DCCM_BYTE_WIDTH).map(i=> (ld_byte_rhit_lo_hi(i) | ld_byte_rhit_hi_hi(i)).asUInt).reverse.reduce(Cat(_,_)) + io.stbuf_fwdbyteen_hi_m := (0 until DCCM_BYTE_WIDTH).map(i=> (ld_byte_hit_hi(i) | stbuf_fwdbyteen_hi_pre_m(i)).asUInt).reverse.reduce(Cat(_,_)) io.stbuf_fwdbyteen_lo_m := (0 until DCCM_BYTE_WIDTH).map(i=> (ld_byte_hit_lo(i) | stbuf_fwdbyteen_lo_pre_m(i)).asUInt).reverse.reduce(Cat(_,_)) @@ -248,11 +271,10 @@ class el2_lsu_stbuf extends Module with param { val stbuf_fwdpipe4_hi = Mux(ld_byte_rhit_hi(3),ld_fwddata_rpipe_hi(31,24),stbuf_fwddata_hi_pre_m(31,24)) io.stbuf_fwddata_hi_m := Cat(stbuf_fwdpipe4_hi,stbuf_fwdpipe3_hi,stbuf_fwdpipe2_hi,stbuf_fwdpipe1_hi) - withClock(io.lsu_stbuf_c1_clk){ WrPtr := RegEnable(NxtWrPtr, 0.U, WrPtrEn)} - withClock(io.lsu_stbuf_c1_clk){ RdPtr := RegEnable(NxtRdPtr, 0.U, RdPtrEn)} + } object stbmain extends App{ println("Generate Verilog") println((new chisel3.stage.ChiselStage).emitVerilog(new el2_lsu_stbuf())) -} \ No newline at end of file +} diff --git a/src/main/scala/lsu/el2_lsu_trigger.scala b/src/main/scala/lsu/el2_lsu_trigger.scala index 4b8aa8c1..e02b36c8 100644 --- a/src/main/scala/lsu/el2_lsu_trigger.scala +++ b/src/main/scala/lsu/el2_lsu_trigger.scala @@ -3,7 +3,7 @@ import chisel3._ import lib._ import chisel3.util._ import include._ -class el2_lsu_trigger extends Module with el2_lib { +class el2_lsu_trigger extends Module with RequireAsyncReset with el2_lib { val io = IO(new Bundle{ val trigger_pkt_any = Input(Vec (4,(new el2_trigger_pkt_t))) val lsu_pkt_m = Input(new el2_lsu_pkt_t) @@ -12,17 +12,17 @@ class el2_lsu_trigger extends Module with el2_lib { val lsu_trigger_match_m = Output(UInt(4.W)) }) - val lsu_match_data = Wire(Vec(4, UInt(32.W))) - io.lsu_trigger_match_m:=0.U val store_data_trigger_m= Cat((Fill(16,io.lsu_pkt_m.word) & io.store_data_m(31,16)),(Fill(8,(io.lsu_pkt_m.half | io.lsu_pkt_m.word)) & io.store_data_m(15,8)), io.store_data_m(7,0)) - - lsu_match_data := VecInit.tabulate(4)(i => (Fill(32, !io.trigger_pkt_any(i).select) & io.lsu_addr_m) | (Fill(32, io.trigger_pkt_any(i).select) & io.trigger_pkt_any(i).store) & store_data_trigger_m) - io.lsu_trigger_match_m := (0 until 4).map(i =>io.lsu_pkt_m.valid & !io.lsu_pkt_m.dma & (io.trigger_pkt_any(i).store & io.lsu_pkt_m.store)| - (io.trigger_pkt_any(i).load & io.lsu_pkt_m.load & !io.trigger_pkt_any(i).select) & + val lsu_match_data = (0 until 4).map(i=>Mux1H(Seq(!io.trigger_pkt_any(i).select.asBool->io.lsu_addr_m, (io.trigger_pkt_any(i).select & io.trigger_pkt_any(i).store).asBool->store_data_trigger_m))) + io.lsu_trigger_match_m := (0 until 4).map(i =>io.lsu_pkt_m.valid & !io.lsu_pkt_m.dma & ((io.trigger_pkt_any(i).store & io.lsu_pkt_m.store)| + (io.trigger_pkt_any(i).load & io.lsu_pkt_m.load & !io.trigger_pkt_any(i).select) )& rvmaskandmatch(io.trigger_pkt_any(i).tdata2, lsu_match_data(i), io.trigger_pkt_any(i).match_.asBool())).reverse.reduce(Cat(_,_)) + } + object main_trigger extends App{ println("Generate Verilog") println((new chisel3.stage.ChiselStage).emitVerilog(new el2_lsu_trigger())) } + diff --git a/src/main/scala/snapshot/el2_param.scala b/src/main/scala/snapshot/el2_param.scala index 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\ No newline at end of file +["sbt.Task[scala.collection.immutable.Map[java.lang.String, scala.collection.Seq[scala.Tuple2[java.nio.file.Path, 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sbt.nio.FileStamp]]]]",{"2.12.10":{"hashes":[["/home/laraibkhan/Desktop/SweRV-Chislified/src/main/scala/lsu/el2_lsu.scala","1ef8375e06a926acc2800ce9f66b230a1a778a47"],["/home/laraibkhan/Desktop/SweRV-Chislified/src/main/scala/lsu/el2_lsu_ecc.scala","8bd39440167c8868c301c3637978d0670e20d1bb"],["/home/laraibkhan/Desktop/SweRV-Chislified/src/main/scala/lsu/el2_lsu_stbuf.scala","abe7ef947d21d2370f498fc4ce67143ff3e47858"],["/home/laraibkhan/Desktop/SweRV-Chislified/src/main/scala/lsu/el2_lsu_trigger.scala","41fa3bfefd3cd286b05976e8202b3085d34e78d9"],["/home/laraibkhan/Desktop/SweRV-Chislified/src/main/scala/lib/GCD.scala","87ca2a3a74fcbb8f524ec3b738f49972feca676f"],["/home/laraibkhan/Desktop/SweRV-Chislified/src/main/scala/lib/el2_lib.scala","e9603e450ff616048da8e754aa95c9fbbc8ad1aa"],["/home/laraibkhan/Desktop/SweRV-Chislified/src/main/scala/lib/beh_ib_func.scala","0be4e29f4a85802c5b199ed9b013ac15f7e6d643"],["/home/laraibkhan/Desktop/SweRV-Chislified/src/main/scala/lib/beh_lib.scala","a34bb1f29d2a6cccf3b2036acf979e1d9f58653d"],["/home/laraibkhan/Desktop/SweRV-Chislified/src/main/scala/dmi/dmi_wrapper.scala","e57d82ef2ee034749d59900097403d64f5d99c7f"],["/home/laraibkhan/Desktop/SweRV-Chislified/src/main/scala/dmi/rvjtag_tap.scala","725d115902c1948b83040e3ae82f26ae3d44ee4b"],["/home/laraibkhan/Desktop/SweRV-Chislified/src/main/scala/dmi/dmi_jtag_to_core_sync.scala","973d8d71d39c2efb8a9869b538f76cb3f12fbd98"],["/home/laraibkhan/Desktop/SweRV-Chislified/src/main/scala/include/el2_bundle.scala","7edde37bfdb50b8d527af6280caded099ccc8f83"],["/home/laraibkhan/Desktop/SweRV-Chislified/src/main/scala/snapshot/el2_param.scala","4d47513eab4ec7a3f9666b29991b75d9be6c6cd7"],["/home/laraibkhan/Desktop/SweRV-Chislified/src/main/scala/dbg/el2_dbg.scala","a9288ad33e4be923745906ebdbedfc6940f5938b"],["/home/laraibkhan/Desktop/SweRV-Chislified/src/main/scala/exu/el2_exu.scala","3f9225ed252ed66244ffaadc30181214d49eae29"]],"lastModifiedTimes":[]}}] \ No newline at end of file diff --git a/target/streams/compile/_global/_global/dependencyClasspathFiles/previous b/target/streams/compile/_global/_global/dependencyClasspathFiles/previous index db3d244f..f929e8f6 100644 --- a/target/streams/compile/_global/_global/dependencyClasspathFiles/previous +++ b/target/streams/compile/_global/_global/dependencyClasspathFiles/previous @@ -1 +1 @@ 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\ No newline at end of file +["sbt.Task[scala.collection.Seq[java.nio.file.Path]]",["/home/laraibkhan/.sbt/boot/scala-2.12.10/lib/scala-library.jar","/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel-iotesters_2.12/1.4.1/chisel-iotesters_2.12-1.4.1.jar","/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chiseltest_2.12/0.2.1/chiseltest_2.12-0.2.1.jar","/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3_2.12/3.3.1/chisel3_2.12-3.3.1.jar","/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/firrtl_2.12/1.3.1/firrtl_2.12-1.3.1.jar","/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/firrtl-interpreter_2.12/1.3.1/firrtl-interpreter_2.12-1.3.1.jar","/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/treadle_2.12/1.2.1/treadle_2.12-1.2.1.jar","/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/junit/junit/4.13/junit-4.13.jar","/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalatest/scalatest_2.12/3.0.8/scalatest_2.12-3.0.8.jar","/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalacheck/scalacheck_2.12/1.14.3/scalacheck_2.12-1.14.3.jar","/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/scopt/scopt_2.12/3.7.1/scopt_2.12-3.7.1.jar","/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/lihaoyi/utest_2.12/0.6.6/utest_2.12-0.6.6.jar","/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3-macros_2.12/3.3.1/chisel3-macros_2.12-3.3.1.jar","/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3-core_2.12/3.3.1/chisel3-core_2.12-3.3.1.jar","/home/laraibkhan/.sbt/boot/scala-2.12.10/lib/scala-reflect.jar","/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/antlr/antlr4-runtime/4.7.1/antlr4-runtime-4.7.1.jar","/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/google/protobuf/protobuf-java/3.9.0/protobuf-java-3.9.0.jar","/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/net/jcazevedo/moultingyaml_2.12/0.4.2/moultingyaml_2.12-0.4.2.jar","/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-native_2.12/3.6.8/json4s-native_2.12-3.6.8.jar","/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/commons/commons-text/1.8/commons-text-1.8.jar","/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-jline/2.12.1/scala-jline-2.12.1.jar","/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/hamcrest/hamcrest-core/1.3/hamcrest-core-1.3.jar","/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalactic/scalactic_2.12/3.0.8/scalactic_2.12-3.0.8.jar","/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-xml_2.12/1.2.0/scala-xml_2.12-1.2.0.jar","/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/test-interface/1.0/test-interface-1.0.jar","/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/portable-scala/portable-scala-reflect_2.12/0.1.0/portable-scala-reflect_2.12-0.1.0.jar","/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/nscala-time/nscala-time_2.12/2.22.0/nscala-time_2.12-2.22.0.jar","/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/yaml/snakeyaml/1.26/snakeyaml-1.26.jar","/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-core_2.12/3.6.8/json4s-core_2.12-3.6.8.jar","/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/commons/commons-lang3/3.9/commons-lang3-3.9.jar","/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/fusesource/jansi/jansi/1.11/jansi-1.11.jar","/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/joda-time/joda-time/2.10.1/joda-time-2.10.1.jar","/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/joda/joda-convert/2.2.0/joda-convert-2.2.0.jar","/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-ast_2.12/3.6.8/json4s-ast_2.12-3.6.8.jar","/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-scalap_2.12/3.6.8/json4s-scalap_2.12-3.6.8.jar","/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/thoughtworks/paranamer/paranamer/2.8/paranamer-2.8.jar"]] \ No newline at end of file diff --git a/target/streams/compile/_global/_global/discoveredMainClasses/data b/target/streams/compile/_global/_global/discoveredMainClasses/data index e73a9ca6..733daaad 100644 --- a/target/streams/compile/_global/_global/discoveredMainClasses/data +++ b/target/streams/compile/_global/_global/discoveredMainClasses/data @@ -1 +1 @@ -["ifu.ifu_ic"] \ No newline at end of file +["lsu.eccmain","lsu.main_trigger","lsu.stbmain"] \ No newline at end of file diff --git a/target/streams/compile/bgRun/_global/streams/out b/target/streams/compile/bgRun/_global/streams/out new file mode 100644 index 00000000..78b567b2 --- /dev/null +++ b/target/streams/compile/bgRun/_global/streams/out @@ -0,0 +1,21 @@ +[error] java.lang.RuntimeException: No main class detected. +[error]  at scala.sys.package$.error(package.scala:30) +[error]  at sbt.Defaults$.$anonfun$bgRunTask$4(Defaults.scala:1477) +[error]  at scala.Option.getOrElse(Option.scala:189) +[error]  at sbt.Defaults$.$anonfun$bgRunTask$3(Defaults.scala:1477) +[error]  at scala.Function1.$anonfun$compose$1(Function1.scala:49) +[error]  at sbt.internal.util.$tilde$greater.$anonfun$$u2219$1(TypeFunctions.scala:62) +[error]  at sbt.std.Transform$$anon$4.work(Transform.scala:67) +[error]  at sbt.Execute.$anonfun$submit$2(Execute.scala:281) +[error]  at sbt.internal.util.ErrorHandling$.wideConvert(ErrorHandling.scala:19) +[error]  at sbt.Execute.work(Execute.scala:290) +[error]  at sbt.Execute.$anonfun$submit$1(Execute.scala:281) +[error]  at sbt.ConcurrentRestrictions$$anon$4.$anonfun$submitValid$1(ConcurrentRestrictions.scala:178) +[error]  at sbt.CompletionService$$anon$2.call(CompletionService.scala:37) +[error]  at java.base/java.util.concurrent.FutureTask.run(FutureTask.java:264) +[error]  at java.base/java.util.concurrent.Executors$RunnableAdapter.call(Executors.java:515) +[error]  at java.base/java.util.concurrent.FutureTask.run(FutureTask.java:264) +[error]  at java.base/java.util.concurrent.ThreadPoolExecutor.runWorker(ThreadPoolExecutor.java:1128) +[error]  at java.base/java.util.concurrent.ThreadPoolExecutor$Worker.run(ThreadPoolExecutor.java:628) +[error]  at java.base/java.lang.Thread.run(Thread.java:834) +[error] (Compile / bgRun) No main class detected. diff --git a/target/streams/compile/compile/_global/streams/out b/target/streams/compile/compile/_global/streams/out index 657500ec..7ebbca26 100644 --- a/target/streams/compile/compile/_global/streams/out +++ b/target/streams/compile/compile/_global/streams/out @@ -1,2 +1,2 @@ -[warn] there were 266 feature warnings; re-run with -feature for details -[warn] one warning found +[debug] Acquiring lock on file /home/laraibkhan/Desktop/SweRV-Chislified/project/target/.sbt-compilation-infos/swerv-chislified-compile/.sbt-idea-lock ... +[debug] Releasing lock on file /home/laraibkhan/Desktop/SweRV-Chislified/project/target/.sbt-compilation-infos/swerv-chislified-compile/.sbt-idea-lock. diff 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b/target/streams/compile/compileIncremental/_global/streams/export index b767ba37..51a9680b 100644 --- a/target/streams/compile/compileIncremental/_global/streams/export +++ b/target/streams/compile/compileIncremental/_global/streams/export @@ -1 +1 @@ -scalac -bootclasspath /home/waleedbinehsan/.sbt/boot/scala-2.12.10/lib/scala-library.jar -classpath /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel-iotesters_2.12/1.4.1/chisel-iotesters_2.12-1.4.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chiseltest_2.12/0.2.1/chiseltest_2.12-0.2.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3_2.12/3.3.1/chisel3_2.12-3.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/firrtl_2.12/1.3.1/firrtl_2.12-1.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/firrtl-interpreter_2.12/1.3.1/firrtl-interpreter_2.12-1.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/treadle_2.12/1.2.1/treadle_2.12-1.2.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/junit/junit/4.13/junit-4.13.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalatest/scalatest_2.12/3.0.8/scalatest_2.12-3.0.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalacheck/scalacheck_2.12/1.14.3/scalacheck_2.12-1.14.3.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/scopt/scopt_2.12/3.7.1/scopt_2.12-3.7.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/lihaoyi/utest_2.12/0.6.6/utest_2.12-0.6.6.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3-macros_2.12/3.3.1/chisel3-macros_2.12-3.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3-core_2.12/3.3.1/chisel3-core_2.12-3.3.1.jar:/home/waleedbinehsan/.sbt/boot/scala-2.12.10/lib/scala-reflect.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/antlr/antlr4-runtime/4.7.1/antlr4-runtime-4.7.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/google/protobuf/protobuf-java/3.9.0/protobuf-java-3.9.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/net/jcazevedo/moultingyaml_2.12/0.4.2/moultingyaml_2.12-0.4.2.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-native_2.12/3.6.8/json4s-native_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/commons/commons-text/1.8/commons-text-1.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-jline/2.12.1/scala-jline-2.12.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/hamcrest/hamcrest-core/1.3/hamcrest-core-1.3.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalactic/scalactic_2.12/3.0.8/scalactic_2.12-3.0.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-xml_2.12/1.2.0/scala-xml_2.12-1.2.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/test-interface/1.0/test-interface-1.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/portable-scala/portable-scala-reflect_2.12/0.1.0/portable-scala-reflect_2.12-0.1.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/nscala-time/nscala-time_2.12/2.22.0/nscala-time_2.12-2.22.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/yaml/snakeyaml/1.26/snakeyaml-1.26.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-core_2.12/3.6.8/json4s-core_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/commons/commons-lang3/3.9/commons-lang3-3.9.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/fusesource/jansi/jansi/1.11/jansi-1.11.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/joda-time/joda-time/2.10.1/joda-time-2.10.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/joda/joda-convert/2.2.0/joda-convert-2.2.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-ast_2.12/3.6.8/json4s-ast_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-scalap_2.12/3.6.8/json4s-scalap_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/thoughtworks/paranamer/paranamer/2.8/paranamer-2.8.jar -Xplugin:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalamacros/paradise_2.12.10/2.1.0/paradise_2.12.10-2.1.0.jar -Xsource:2.11.0 /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/ifu/el2_ifu_bp_ctl.scala /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/ifu/el2_ifu_ic_mem.scala /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/ifu/el2_ifu.scala /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/snapshot/el2_param.scala /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/lsu/el2_lsu.scala /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/exu/el2_exu.scala /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/dbg/el2_dbg.scala /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/lib/RVC.scala /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/lib/GCD.scala /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/lib/el2_lib.scala /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/dmi/rvjtag_tap.scala /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/dmi/dmi_jtag_to_core_sync.scala /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/dmi/dmi_wrapper.scala /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/include/el2_bundle.scala /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/dec/el2_dec_dec_ctl.scala +scalac -bootclasspath /home/laraibkhan/.sbt/boot/scala-2.12.10/lib/scala-library.jar -classpath /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel-iotesters_2.12/1.4.1/chisel-iotesters_2.12-1.4.1.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chiseltest_2.12/0.2.1/chiseltest_2.12-0.2.1.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3_2.12/3.3.1/chisel3_2.12-3.3.1.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/firrtl_2.12/1.3.1/firrtl_2.12-1.3.1.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/firrtl-interpreter_2.12/1.3.1/firrtl-interpreter_2.12-1.3.1.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/treadle_2.12/1.2.1/treadle_2.12-1.2.1.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/junit/junit/4.13/junit-4.13.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalatest/scalatest_2.12/3.0.8/scalatest_2.12-3.0.8.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalacheck/scalacheck_2.12/1.14.3/scalacheck_2.12-1.14.3.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/scopt/scopt_2.12/3.7.1/scopt_2.12-3.7.1.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/lihaoyi/utest_2.12/0.6.6/utest_2.12-0.6.6.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3-macros_2.12/3.3.1/chisel3-macros_2.12-3.3.1.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3-core_2.12/3.3.1/chisel3-core_2.12-3.3.1.jar:/home/laraibkhan/.sbt/boot/scala-2.12.10/lib/scala-reflect.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/antlr/antlr4-runtime/4.7.1/antlr4-runtime-4.7.1.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/google/protobuf/protobuf-java/3.9.0/protobuf-java-3.9.0.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/net/jcazevedo/moultingyaml_2.12/0.4.2/moultingyaml_2.12-0.4.2.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-native_2.12/3.6.8/json4s-native_2.12-3.6.8.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/commons/commons-text/1.8/commons-text-1.8.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-jline/2.12.1/scala-jline-2.12.1.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/hamcrest/hamcrest-core/1.3/hamcrest-core-1.3.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalactic/scalactic_2.12/3.0.8/scalactic_2.12-3.0.8.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-xml_2.12/1.2.0/scala-xml_2.12-1.2.0.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/test-interface/1.0/test-interface-1.0.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/portable-scala/portable-scala-reflect_2.12/0.1.0/portable-scala-reflect_2.12-0.1.0.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/nscala-time/nscala-time_2.12/2.22.0/nscala-time_2.12-2.22.0.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/yaml/snakeyaml/1.26/snakeyaml-1.26.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-core_2.12/3.6.8/json4s-core_2.12-3.6.8.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/commons/commons-lang3/3.9/commons-lang3-3.9.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/fusesource/jansi/jansi/1.11/jansi-1.11.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/joda-time/joda-time/2.10.1/joda-time-2.10.1.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/joda/joda-convert/2.2.0/joda-convert-2.2.0.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-ast_2.12/3.6.8/json4s-ast_2.12-3.6.8.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-scalap_2.12/3.6.8/json4s-scalap_2.12-3.6.8.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/thoughtworks/paranamer/paranamer/2.8/paranamer-2.8.jar -Xplugin:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalamacros/paradise_2.12.10/2.1.0/paradise_2.12.10-2.1.0.jar -Xsource:2.11.0 /home/laraibkhan/Desktop/SweRV-Chislified/src/main/scala/lsu/el2_lsu_ecc.scala diff --git a/target/streams/compile/compileIncremental/_global/streams/out b/target/streams/compile/compileIncremental/_global/streams/out index fcffc860..7ef19cc0 100644 --- a/target/streams/compile/compileIncremental/_global/streams/out +++ b/target/streams/compile/compileIncremental/_global/streams/out @@ -1,30 +1 @@ -[debug]  -[debug] Initial source changes:  -[debug]  removed:Set() -[debug]  added: Set(/home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/ifu/el2_ifu_ic_mem.scala, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/ifu/el2_ifu_bp_ctl.scala, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/lib/el2_lib.scala) -[debug]  modified: Set(/home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/dec/el2_dec_dec_ctl.scala) -[debug] Invalidated products: Set(/home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/encoder_generator.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/rvrangecheck.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/RVCExpander$$anon$1.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/dbg/el2_dbg.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/caller$$anon$2.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/dec/dec$.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/rvrangecheck$.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/exp$$anon$9.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/RVCDecoder.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/rvdff$.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/RVCExpander.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/rvbradder.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/reg1.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/dmi/dmi_jtag_to_core_sync.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/reg1$$anon$3.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/tocopy.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/dmi/dmi_wrapper.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/rvdff$$anon$1.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/snapshot/pt.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/tocopy$$anon$8.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/dec/el2_dec_dec_ctl.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/dec/el2_dec_pkt_t.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/top$$anon$4.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/caller.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/encoder_generator$$anon$6.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/ExpandedInstruction.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/rvrangecheck$$anon$7.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/rvdff.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/rvbradder$$anon$5.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/exp.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/top.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/encoder_generator$.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/snapshot/pt$.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/dec/dec.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/dec/dec$delayedInit$body.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/exu/el2_exu.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/dmi/rvjtag_tap.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lsu/el2_lsu.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/dec/el2_dec_dec_ctl$$anon$1.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/ifu/el2_ifu.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/include/el2_bundle.class) -[debug] External API changes: API Changes: Set() -[debug] Modified binary dependencies: Set() -[debug] Initial directly invalidated classes: Set(dec.dec, dec.el2_dec_dec_ctl, dec.el2_dec_pkt_t) -[debug]  -[debug] Sources indirectly invalidated by: -[debug]  product: Set(/home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/include/el2_bundle.scala, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/dmi/rvjtag_tap.scala, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/lib/RVC.scala, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/exu/el2_exu.scala, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/dbg/el2_dbg.scala, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/dmi/dmi_jtag_to_core_sync.scala, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/dmi/dmi_wrapper.scala, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/dec/el2_dec_dec_ctl.scala, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/lsu/el2_lsu.scala, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/ifu/el2_ifu.scala, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/lib/GCD.scala, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/snapshot/el2_param.scala) -[debug]  binary dep: Set() -[debug]  external source: Set() -[debug] All sources are invalidated. -[debug] Initial set of included nodes: dec.dec, dec.el2_dec_dec_ctl, dec.el2_dec_pkt_t -[debug] Recompiling all sources: number of invalidated sources > 50.0% of all sources -[info] Compiling 15 Scala sources to /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes ... -[debug] Getting org.scala-sbt:compiler-bridge_2.12:1.3.5:compile for Scala 2.12.10 -[debug] Getting org.scala-sbt:compiler-bridge_2.12:1.3.5:compile for Scala 2.12.10 -[debug] [zinc] Running cached compiler 69ba6af for Scala compiler version 2.12.10 -[debug] [zinc] The Scala compiler is invoked with: -[debug]  -Xsource:2.11 -[debug]  -Xplugin:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalamacros/paradise_2.12.10/2.1.0/paradise_2.12.10-2.1.0.jar -[debug]  -bootclasspath -[debug]  /home/waleedbinehsan/.sbt/boot/scala-2.12.10/lib/scala-library.jar -[debug]  -classpath -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel-iotesters_2.12/1.4.1/chisel-iotesters_2.12-1.4.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chiseltest_2.12/0.2.1/chiseltest_2.12-0.2.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3_2.12/3.3.1/chisel3_2.12-3.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/firrtl_2.12/1.3.1/firrtl_2.12-1.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/firrtl-interpreter_2.12/1.3.1/firrtl-interpreter_2.12-1.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/treadle_2.12/1.2.1/treadle_2.12-1.2.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/junit/junit/4.13/junit-4.13.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalatest/scalatest_2.12/3.0.8/scalatest_2.12-3.0.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalacheck/scalacheck_2.12/1.14.3/scalacheck_2.12-1.14.3.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/scopt/scopt_2.12/3.7.1/scopt_2.12-3.7.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/lihaoyi/utest_2.12/0.6.6/utest_2.12-0.6.6.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3-macros_2.12/3.3.1/chisel3-macros_2.12-3.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3-core_2.12/3.3.1/chisel3-core_2.12-3.3.1.jar:/home/waleedbinehsan/.sbt/boot/scala-2.12.10/lib/scala-reflect.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/antlr/antlr4-runtime/4.7.1/antlr4-runtime-4.7.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/google/protobuf/protobuf-java/3.9.0/protobuf-java-3.9.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/net/jcazevedo/moultingyaml_2.12/0.4.2/moultingyaml_2.12-0.4.2.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-native_2.12/3.6.8/json4s-native_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/commons/commons-text/1.8/commons-text-1.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-jline/2.12.1/scala-jline-2.12.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/hamcrest/hamcrest-core/1.3/hamcrest-core-1.3.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalactic/scalactic_2.12/3.0.8/scalactic_2.12-3.0.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-xml_2.12/1.2.0/scala-xml_2.12-1.2.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/test-interface/1.0/test-interface-1.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/portable-scala/portable-scala-reflect_2.12/0.1.0/portable-scala-reflect_2.12-0.1.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/nscala-time/nscala-time_2.12/2.22.0/nscala-time_2.12-2.22.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/yaml/snakeyaml/1.26/snakeyaml-1.26.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-core_2.12/3.6.8/json4s-core_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/commons/commons-lang3/3.9/commons-lang3-3.9.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/fusesource/jansi/jansi/1.11/jansi-1.11.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/joda-time/joda-time/2.10.1/joda-time-2.10.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/joda/joda-convert/2.2.0/joda-convert-2.2.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-ast_2.12/3.6.8/json4s-ast_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-scalap_2.12/3.6.8/json4s-scalap_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/thoughtworks/paranamer/paranamer/2.8/paranamer-2.8.jar -[debug] Scala compilation took 8.031658869 s -[debug] Done compiling. +[debug] No changes diff --git a/target/streams/compile/copyResources/_global/streams/copy-resources b/target/streams/compile/copyResources/_global/streams/copy-resources index 9d348e7b..12686c98 100644 --- a/target/streams/compile/copyResources/_global/streams/copy-resources +++ b/target/streams/compile/copyResources/_global/streams/copy-resources @@ -1 +1 @@ -[[{},{}],{}] \ No newline at end of file +[[{"file:///home/laraibkhan/Desktop/SweRV-Chislified/src/main/resources/vsrc/TEC_RV_ICG.v":["file:///home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/vsrc/TEC_RV_ICG.v"]},{"file:///home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/vsrc/TEC_RV_ICG.v":["file:///home/laraibkhan/Desktop/SweRV-Chislified/src/main/resources/vsrc/TEC_RV_ICG.v"]}],{"file:///home/laraibkhan/Desktop/SweRV-Chislified/src/main/resources/vsrc/TEC_RV_ICG.v":{"file":"file:///home/laraibkhan/Desktop/SweRV-Chislified/src/main/resources/vsrc/TEC_RV_ICG.v","lastModified":1600930953619}}] \ No newline at end of file diff --git a/target/streams/compile/copyResources/_global/streams/out b/target/streams/compile/copyResources/_global/streams/out index f25042f2..9c32f5bd 100644 --- a/target/streams/compile/copyResources/_global/streams/out +++ b/target/streams/compile/copyResources/_global/streams/out @@ -1,2 +1,2 @@ [debug] Copy resource mappings:  -[debug]   +[debug]  (/home/laraibkhan/Desktop/SweRV-Chislified/src/main/resources/vsrc/TEC_RV_ICG.v,/home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/vsrc/TEC_RV_ICG.v) diff --git a/target/streams/compile/dependencyClasspath/_global/streams/export b/target/streams/compile/dependencyClasspath/_global/streams/export index 414eb951..00a41704 100644 --- a/target/streams/compile/dependencyClasspath/_global/streams/export +++ b/target/streams/compile/dependencyClasspath/_global/streams/export @@ -1 +1 @@ -/home/waleedbinehsan/.sbt/boot/scala-2.12.10/lib/scala-library.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel-iotesters_2.12/1.4.1/chisel-iotesters_2.12-1.4.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chiseltest_2.12/0.2.1/chiseltest_2.12-0.2.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3_2.12/3.3.1/chisel3_2.12-3.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/firrtl_2.12/1.3.1/firrtl_2.12-1.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/firrtl-interpreter_2.12/1.3.1/firrtl-interpreter_2.12-1.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/treadle_2.12/1.2.1/treadle_2.12-1.2.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/junit/junit/4.13/junit-4.13.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalatest/scalatest_2.12/3.0.8/scalatest_2.12-3.0.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalacheck/scalacheck_2.12/1.14.3/scalacheck_2.12-1.14.3.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/scopt/scopt_2.12/3.7.1/scopt_2.12-3.7.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/lihaoyi/utest_2.12/0.6.6/utest_2.12-0.6.6.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3-macros_2.12/3.3.1/chisel3-macros_2.12-3.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3-core_2.12/3.3.1/chisel3-core_2.12-3.3.1.jar:/home/waleedbinehsan/.sbt/boot/scala-2.12.10/lib/scala-reflect.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/antlr/antlr4-runtime/4.7.1/antlr4-runtime-4.7.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/google/protobuf/protobuf-java/3.9.0/protobuf-java-3.9.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/net/jcazevedo/moultingyaml_2.12/0.4.2/moultingyaml_2.12-0.4.2.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-native_2.12/3.6.8/json4s-native_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/commons/commons-text/1.8/commons-text-1.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-jline/2.12.1/scala-jline-2.12.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/hamcrest/hamcrest-core/1.3/hamcrest-core-1.3.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalactic/scalactic_2.12/3.0.8/scalactic_2.12-3.0.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-xml_2.12/1.2.0/scala-xml_2.12-1.2.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/test-interface/1.0/test-interface-1.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/portable-scala/portable-scala-reflect_2.12/0.1.0/portable-scala-reflect_2.12-0.1.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/nscala-time/nscala-time_2.12/2.22.0/nscala-time_2.12-2.22.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/yaml/snakeyaml/1.26/snakeyaml-1.26.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-core_2.12/3.6.8/json4s-core_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/commons/commons-lang3/3.9/commons-lang3-3.9.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/fusesource/jansi/jansi/1.11/jansi-1.11.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/joda-time/joda-time/2.10.1/joda-time-2.10.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/joda/joda-convert/2.2.0/joda-convert-2.2.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-ast_2.12/3.6.8/json4s-ast_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-scalap_2.12/3.6.8/json4s-scalap_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/thoughtworks/paranamer/paranamer/2.8/paranamer-2.8.jar +/home/laraibkhan/.sbt/boot/scala-2.12.10/lib/scala-library.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel-iotesters_2.12/1.4.1/chisel-iotesters_2.12-1.4.1.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chiseltest_2.12/0.2.1/chiseltest_2.12-0.2.1.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3_2.12/3.3.1/chisel3_2.12-3.3.1.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/firrtl_2.12/1.3.1/firrtl_2.12-1.3.1.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/firrtl-interpreter_2.12/1.3.1/firrtl-interpreter_2.12-1.3.1.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/treadle_2.12/1.2.1/treadle_2.12-1.2.1.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/junit/junit/4.13/junit-4.13.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalatest/scalatest_2.12/3.0.8/scalatest_2.12-3.0.8.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalacheck/scalacheck_2.12/1.14.3/scalacheck_2.12-1.14.3.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/scopt/scopt_2.12/3.7.1/scopt_2.12-3.7.1.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/lihaoyi/utest_2.12/0.6.6/utest_2.12-0.6.6.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3-macros_2.12/3.3.1/chisel3-macros_2.12-3.3.1.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3-core_2.12/3.3.1/chisel3-core_2.12-3.3.1.jar:/home/laraibkhan/.sbt/boot/scala-2.12.10/lib/scala-reflect.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/antlr/antlr4-runtime/4.7.1/antlr4-runtime-4.7.1.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/google/protobuf/protobuf-java/3.9.0/protobuf-java-3.9.0.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/net/jcazevedo/moultingyaml_2.12/0.4.2/moultingyaml_2.12-0.4.2.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-native_2.12/3.6.8/json4s-native_2.12-3.6.8.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/commons/commons-text/1.8/commons-text-1.8.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-jline/2.12.1/scala-jline-2.12.1.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/hamcrest/hamcrest-core/1.3/hamcrest-core-1.3.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalactic/scalactic_2.12/3.0.8/scalactic_2.12-3.0.8.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-xml_2.12/1.2.0/scala-xml_2.12-1.2.0.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/test-interface/1.0/test-interface-1.0.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/portable-scala/portable-scala-reflect_2.12/0.1.0/portable-scala-reflect_2.12-0.1.0.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/nscala-time/nscala-time_2.12/2.22.0/nscala-time_2.12-2.22.0.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/yaml/snakeyaml/1.26/snakeyaml-1.26.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-core_2.12/3.6.8/json4s-core_2.12-3.6.8.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/commons/commons-lang3/3.9/commons-lang3-3.9.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/fusesource/jansi/jansi/1.11/jansi-1.11.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/joda-time/joda-time/2.10.1/joda-time-2.10.1.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/joda/joda-convert/2.2.0/joda-convert-2.2.0.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-ast_2.12/3.6.8/json4s-ast_2.12-3.6.8.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-scalap_2.12/3.6.8/json4s-scalap_2.12-3.6.8.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/thoughtworks/paranamer/paranamer/2.8/paranamer-2.8.jar diff --git a/target/streams/compile/exportedProductJars/_global/streams/export b/target/streams/compile/exportedProductJars/_global/streams/export index 2101d78b..89ffd520 100644 --- a/target/streams/compile/exportedProductJars/_global/streams/export +++ b/target/streams/compile/exportedProductJars/_global/streams/export @@ -1 +1 @@ -/home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/chisel-module-template_2.12-3.3.0.jar +/home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/chisel-module-template_2.12-3.3.0.jar diff --git a/target/streams/compile/exportedProducts/_global/streams/export b/target/streams/compile/exportedProducts/_global/streams/export index e8935eaa..eeb8a02a 100644 --- a/target/streams/compile/exportedProducts/_global/streams/export +++ b/target/streams/compile/exportedProducts/_global/streams/export @@ -1 +1 @@ -/home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes +/home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes diff --git a/target/streams/compile/externalDependencyClasspath/_global/streams/export b/target/streams/compile/externalDependencyClasspath/_global/streams/export index 414eb951..00a41704 100644 --- a/target/streams/compile/externalDependencyClasspath/_global/streams/export +++ b/target/streams/compile/externalDependencyClasspath/_global/streams/export @@ -1 +1 @@ -/home/waleedbinehsan/.sbt/boot/scala-2.12.10/lib/scala-library.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel-iotesters_2.12/1.4.1/chisel-iotesters_2.12-1.4.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chiseltest_2.12/0.2.1/chiseltest_2.12-0.2.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3_2.12/3.3.1/chisel3_2.12-3.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/firrtl_2.12/1.3.1/firrtl_2.12-1.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/firrtl-interpreter_2.12/1.3.1/firrtl-interpreter_2.12-1.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/treadle_2.12/1.2.1/treadle_2.12-1.2.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/junit/junit/4.13/junit-4.13.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalatest/scalatest_2.12/3.0.8/scalatest_2.12-3.0.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalacheck/scalacheck_2.12/1.14.3/scalacheck_2.12-1.14.3.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/scopt/scopt_2.12/3.7.1/scopt_2.12-3.7.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/lihaoyi/utest_2.12/0.6.6/utest_2.12-0.6.6.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3-macros_2.12/3.3.1/chisel3-macros_2.12-3.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3-core_2.12/3.3.1/chisel3-core_2.12-3.3.1.jar:/home/waleedbinehsan/.sbt/boot/scala-2.12.10/lib/scala-reflect.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/antlr/antlr4-runtime/4.7.1/antlr4-runtime-4.7.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/google/protobuf/protobuf-java/3.9.0/protobuf-java-3.9.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/net/jcazevedo/moultingyaml_2.12/0.4.2/moultingyaml_2.12-0.4.2.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-native_2.12/3.6.8/json4s-native_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/commons/commons-text/1.8/commons-text-1.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-jline/2.12.1/scala-jline-2.12.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/hamcrest/hamcrest-core/1.3/hamcrest-core-1.3.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalactic/scalactic_2.12/3.0.8/scalactic_2.12-3.0.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-xml_2.12/1.2.0/scala-xml_2.12-1.2.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/test-interface/1.0/test-interface-1.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/portable-scala/portable-scala-reflect_2.12/0.1.0/portable-scala-reflect_2.12-0.1.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/nscala-time/nscala-time_2.12/2.22.0/nscala-time_2.12-2.22.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/yaml/snakeyaml/1.26/snakeyaml-1.26.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-core_2.12/3.6.8/json4s-core_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/commons/commons-lang3/3.9/commons-lang3-3.9.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/fusesource/jansi/jansi/1.11/jansi-1.11.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/joda-time/joda-time/2.10.1/joda-time-2.10.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/joda/joda-convert/2.2.0/joda-convert-2.2.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-ast_2.12/3.6.8/json4s-ast_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-scalap_2.12/3.6.8/json4s-scalap_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/thoughtworks/paranamer/paranamer/2.8/paranamer-2.8.jar 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diff --git a/target/streams/compile/managedClasspath/_global/streams/export b/target/streams/compile/managedClasspath/_global/streams/export index 414eb951..00a41704 100644 --- a/target/streams/compile/managedClasspath/_global/streams/export +++ b/target/streams/compile/managedClasspath/_global/streams/export @@ -1 +1 @@ -/home/waleedbinehsan/.sbt/boot/scala-2.12.10/lib/scala-library.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel-iotesters_2.12/1.4.1/chisel-iotesters_2.12-1.4.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chiseltest_2.12/0.2.1/chiseltest_2.12-0.2.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3_2.12/3.3.1/chisel3_2.12-3.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/firrtl_2.12/1.3.1/firrtl_2.12-1.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/firrtl-interpreter_2.12/1.3.1/firrtl-interpreter_2.12-1.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/treadle_2.12/1.2.1/treadle_2.12-1.2.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/junit/junit/4.13/junit-4.13.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalatest/scalatest_2.12/3.0.8/scalatest_2.12-3.0.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalacheck/scalacheck_2.12/1.14.3/scalacheck_2.12-1.14.3.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/scopt/scopt_2.12/3.7.1/scopt_2.12-3.7.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/lihaoyi/utest_2.12/0.6.6/utest_2.12-0.6.6.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3-macros_2.12/3.3.1/chisel3-macros_2.12-3.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3-core_2.12/3.3.1/chisel3-core_2.12-3.3.1.jar:/home/waleedbinehsan/.sbt/boot/scala-2.12.10/lib/scala-reflect.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/antlr/antlr4-runtime/4.7.1/antlr4-runtime-4.7.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/google/protobuf/protobuf-java/3.9.0/protobuf-java-3.9.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/net/jcazevedo/moultingyaml_2.12/0.4.2/moultingyaml_2.12-0.4.2.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-native_2.12/3.6.8/json4s-native_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/commons/commons-text/1.8/commons-text-1.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-jline/2.12.1/scala-jline-2.12.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/hamcrest/hamcrest-core/1.3/hamcrest-core-1.3.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalactic/scalactic_2.12/3.0.8/scalactic_2.12-3.0.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-xml_2.12/1.2.0/scala-xml_2.12-1.2.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/test-interface/1.0/test-interface-1.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/portable-scala/portable-scala-reflect_2.12/0.1.0/portable-scala-reflect_2.12-0.1.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/nscala-time/nscala-time_2.12/2.22.0/nscala-time_2.12-2.22.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/yaml/snakeyaml/1.26/snakeyaml-1.26.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-core_2.12/3.6.8/json4s-core_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/commons/commons-lang3/3.9/commons-lang3-3.9.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/fusesource/jansi/jansi/1.11/jansi-1.11.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/joda-time/joda-time/2.10.1/joda-time-2.10.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/joda/joda-convert/2.2.0/joda-convert-2.2.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-ast_2.12/3.6.8/json4s-ast_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-scalap_2.12/3.6.8/json4s-scalap_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/thoughtworks/paranamer/paranamer/2.8/paranamer-2.8.jar +/home/laraibkhan/.sbt/boot/scala-2.12.10/lib/scala-library.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel-iotesters_2.12/1.4.1/chisel-iotesters_2.12-1.4.1.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chiseltest_2.12/0.2.1/chiseltest_2.12-0.2.1.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3_2.12/3.3.1/chisel3_2.12-3.3.1.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/firrtl_2.12/1.3.1/firrtl_2.12-1.3.1.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/firrtl-interpreter_2.12/1.3.1/firrtl-interpreter_2.12-1.3.1.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/treadle_2.12/1.2.1/treadle_2.12-1.2.1.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/junit/junit/4.13/junit-4.13.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalatest/scalatest_2.12/3.0.8/scalatest_2.12-3.0.8.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalacheck/scalacheck_2.12/1.14.3/scalacheck_2.12-1.14.3.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/scopt/scopt_2.12/3.7.1/scopt_2.12-3.7.1.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/lihaoyi/utest_2.12/0.6.6/utest_2.12-0.6.6.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3-macros_2.12/3.3.1/chisel3-macros_2.12-3.3.1.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3-core_2.12/3.3.1/chisel3-core_2.12-3.3.1.jar:/home/laraibkhan/.sbt/boot/scala-2.12.10/lib/scala-reflect.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/antlr/antlr4-runtime/4.7.1/antlr4-runtime-4.7.1.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/google/protobuf/protobuf-java/3.9.0/protobuf-java-3.9.0.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/net/jcazevedo/moultingyaml_2.12/0.4.2/moultingyaml_2.12-0.4.2.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-native_2.12/3.6.8/json4s-native_2.12-3.6.8.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/commons/commons-text/1.8/commons-text-1.8.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-jline/2.12.1/scala-jline-2.12.1.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/hamcrest/hamcrest-core/1.3/hamcrest-core-1.3.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalactic/scalactic_2.12/3.0.8/scalactic_2.12-3.0.8.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-xml_2.12/1.2.0/scala-xml_2.12-1.2.0.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/test-interface/1.0/test-interface-1.0.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/portable-scala/portable-scala-reflect_2.12/0.1.0/portable-scala-reflect_2.12-0.1.0.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/nscala-time/nscala-time_2.12/2.22.0/nscala-time_2.12-2.22.0.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/yaml/snakeyaml/1.26/snakeyaml-1.26.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-core_2.12/3.6.8/json4s-core_2.12-3.6.8.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/commons/commons-lang3/3.9/commons-lang3-3.9.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/fusesource/jansi/jansi/1.11/jansi-1.11.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/joda-time/joda-time/2.10.1/joda-time-2.10.1.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/joda/joda-convert/2.2.0/joda-convert-2.2.0.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-ast_2.12/3.6.8/json4s-ast_2.12-3.6.8.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-scalap_2.12/3.6.8/json4s-scalap_2.12-3.6.8.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/thoughtworks/paranamer/paranamer/2.8/paranamer-2.8.jar diff --git a/target/streams/compile/packageBin/_global/streams/inputs b/target/streams/compile/packageBin/_global/streams/inputs index 9566067d..5b3894e2 100644 --- a/target/streams/compile/packageBin/_global/streams/inputs +++ b/target/streams/compile/packageBin/_global/streams/inputs @@ -1 +1 @@ -2112381394 \ No newline at end of file +2052818036 \ No newline at end of file diff --git a/target/streams/compile/packageBin/_global/streams/out b/target/streams/compile/packageBin/_global/streams/out index 0a0b3cc5..7ad64f8a 100644 --- a/target/streams/compile/packageBin/_global/streams/out +++ b/target/streams/compile/packageBin/_global/streams/out @@ -1,123 +1 @@ -[debug] Packaging /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/chisel-module-template_2.12-3.3.0.jar ... -[debug] Input file mappings: -[debug]  ifu -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/ifu -[debug]  ifu/ifu_ic.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/ifu/ifu_ic.class -[debug]  ifu/el2_ifu.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/ifu/el2_ifu.class -[debug]  ifu/el2_ifu_ic_mem.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/ifu/el2_ifu_ic_mem.class -[debug]  ifu/ifu_ic$.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/ifu/ifu_ic$.class -[debug]  ifu/ifu$.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/ifu/ifu$.class -[debug]  ifu/el2_ifu_bp_ctl$$anon$1.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/ifu/el2_ifu_bp_ctl$$anon$1.class -[debug]  ifu/el2_ifu_bp_ctl.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/ifu/el2_ifu_bp_ctl.class -[debug]  ifu/ifu.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/ifu/ifu.class -[debug]  ifu/ifu_ic$delayedInit$body.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/ifu/ifu_ic$delayedInit$body.class -[debug]  ifu/el2_ifu_ic_mem$$anon$1.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/ifu/el2_ifu_ic_mem$$anon$1.class -[debug]  ifu/ifu$delayedInit$body.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/ifu/ifu$delayedInit$body.class -[debug]  snapshot -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/snapshot -[debug]  snapshot/pt$.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/snapshot/pt$.class -[debug]  snapshot/pt.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/snapshot/pt.class -[debug]  lsu -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lsu -[debug]  lsu/el2_lsu.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lsu/el2_lsu.class -[debug]  exu -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/exu -[debug]  exu/el2_exu.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/exu/el2_exu.class -[debug]  dbg -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/dbg -[debug]  dbg/el2_dbg.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/dbg/el2_dbg.class -[debug]  lib -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib -[debug]  lib/encoder_generator$$anon$6.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/encoder_generator$$anon$6.class -[debug]  lib/rvrangecheck.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/rvrangecheck.class -[debug]  lib/reg1.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/reg1.class -[debug]  lib/rvrangecheck$.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/rvrangecheck$.class -[debug]  lib/exp.sc -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/exp.sc -[debug]  lib/el2_lib.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/el2_lib.class -[debug]  lib/exp.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/exp.class -[debug]  lib/top.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/top.class -[debug]  lib/rvrangecheck$$anon$7.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/rvrangecheck$$anon$7.class -[debug]  lib/reg1$$anon$3.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/reg1$$anon$3.class -[debug]  lib/caller$$anon$2.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/caller$$anon$2.class -[debug]  lib/RVCExpander$$anon$1.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/RVCExpander$$anon$1.class -[debug]  lib/exp$$anon$9.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/exp$$anon$9.class -[debug]  lib/tocopy$$anon$8.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/tocopy$$anon$8.class -[debug]  lib/RVCExpander.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/RVCExpander.class -[debug]  lib/rvbradder.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/rvbradder.class -[debug]  lib/top$$anon$4.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/top$$anon$4.class -[debug]  lib/rvbradder$$anon$5.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/rvbradder$$anon$5.class -[debug]  lib/rvdff$$anon$1.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/rvdff$$anon$1.class -[debug]  lib/RVCDecoder.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/RVCDecoder.class -[debug]  lib/rvdff$.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/rvdff$.class -[debug]  lib/tocopy.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/tocopy.class -[debug]  lib/encoder_generator.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/encoder_generator.class -[debug]  lib/encoder_generator$.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/encoder_generator$.class -[debug]  lib/caller.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/caller.class -[debug]  lib/param.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/param.class -[debug]  lib/rvdff.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/rvdff.class -[debug]  lib/ExpandedInstruction.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/ExpandedInstruction.class -[debug]  dmi -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/dmi -[debug]  dmi/rvjtag_tap.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/dmi/rvjtag_tap.class -[debug]  dmi/dmi_wrapper.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/dmi/dmi_wrapper.class -[debug]  dmi/dmi_jtag_to_core_sync.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/dmi/dmi_jtag_to_core_sync.class -[debug]  include -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/include -[debug]  include/el2_bundle.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/include/el2_bundle.class -[debug]  dec -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/dec -[debug]  dec/el2_dec_dec_ctl$$anon$1.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/dec/el2_dec_dec_ctl$$anon$1.class -[debug]  dec/el2_dec_pkt_t.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/dec/el2_dec_pkt_t.class -[debug]  dec/el2_dec_dec_ctl.class -[debug]  /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/dec/el2_dec_dec_ctl.class -[debug] Done packaging. +[debug] Jar uptodate: /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/chisel-module-template_2.12-3.3.0.jar diff --git a/target/streams/compile/packageBin/_global/streams/output b/target/streams/compile/packageBin/_global/streams/output index 6522d77d..562f2f34 100644 --- a/target/streams/compile/packageBin/_global/streams/output +++ b/target/streams/compile/packageBin/_global/streams/output @@ -1 +1 @@ --1898733629 \ No newline at end of file +-825163953 \ No newline at end of file diff --git a/target/streams/runtime/dependencyClasspathAsJars/_global/streams/export b/target/streams/runtime/dependencyClasspathAsJars/_global/streams/export index 7a8afe52..90bf138e 100644 --- a/target/streams/runtime/dependencyClasspathAsJars/_global/streams/export +++ b/target/streams/runtime/dependencyClasspathAsJars/_global/streams/export @@ -1 +1 @@ -/home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/chisel-module-template_2.12-3.3.0.jar:/home/waleedbinehsan/.sbt/boot/scala-2.12.10/lib/scala-library.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel-iotesters_2.12/1.4.1/chisel-iotesters_2.12-1.4.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chiseltest_2.12/0.2.1/chiseltest_2.12-0.2.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3_2.12/3.3.1/chisel3_2.12-3.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/firrtl_2.12/1.3.1/firrtl_2.12-1.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/firrtl-interpreter_2.12/1.3.1/firrtl-interpreter_2.12-1.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/treadle_2.12/1.2.1/treadle_2.12-1.2.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/junit/junit/4.13/junit-4.13.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalatest/scalatest_2.12/3.0.8/scalatest_2.12-3.0.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalacheck/scalacheck_2.12/1.14.3/scalacheck_2.12-1.14.3.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/scopt/scopt_2.12/3.7.1/scopt_2.12-3.7.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/lihaoyi/utest_2.12/0.6.6/utest_2.12-0.6.6.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3-macros_2.12/3.3.1/chisel3-macros_2.12-3.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3-core_2.12/3.3.1/chisel3-core_2.12-3.3.1.jar:/home/waleedbinehsan/.sbt/boot/scala-2.12.10/lib/scala-reflect.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/antlr/antlr4-runtime/4.7.1/antlr4-runtime-4.7.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/google/protobuf/protobuf-java/3.9.0/protobuf-java-3.9.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/net/jcazevedo/moultingyaml_2.12/0.4.2/moultingyaml_2.12-0.4.2.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-native_2.12/3.6.8/json4s-native_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/commons/commons-text/1.8/commons-text-1.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-jline/2.12.1/scala-jline-2.12.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/hamcrest/hamcrest-core/1.3/hamcrest-core-1.3.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalactic/scalactic_2.12/3.0.8/scalactic_2.12-3.0.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-xml_2.12/1.2.0/scala-xml_2.12-1.2.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/test-interface/1.0/test-interface-1.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/portable-scala/portable-scala-reflect_2.12/0.1.0/portable-scala-reflect_2.12-0.1.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/nscala-time/nscala-time_2.12/2.22.0/nscala-time_2.12-2.22.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/yaml/snakeyaml/1.26/snakeyaml-1.26.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-core_2.12/3.6.8/json4s-core_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/commons/commons-lang3/3.9/commons-lang3-3.9.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/fusesource/jansi/jansi/1.11/jansi-1.11.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/joda-time/joda-time/2.10.1/joda-time-2.10.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/joda/joda-convert/2.2.0/joda-convert-2.2.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-ast_2.12/3.6.8/json4s-ast_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-scalap_2.12/3.6.8/json4s-scalap_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/thoughtworks/paranamer/paranamer/2.8/paranamer-2.8.jar +/home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/chisel-module-template_2.12-3.3.0.jar:/home/laraibkhan/.sbt/boot/scala-2.12.10/lib/scala-library.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel-iotesters_2.12/1.4.1/chisel-iotesters_2.12-1.4.1.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chiseltest_2.12/0.2.1/chiseltest_2.12-0.2.1.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3_2.12/3.3.1/chisel3_2.12-3.3.1.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/firrtl_2.12/1.3.1/firrtl_2.12-1.3.1.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/firrtl-interpreter_2.12/1.3.1/firrtl-interpreter_2.12-1.3.1.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/treadle_2.12/1.2.1/treadle_2.12-1.2.1.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/junit/junit/4.13/junit-4.13.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalatest/scalatest_2.12/3.0.8/scalatest_2.12-3.0.8.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalacheck/scalacheck_2.12/1.14.3/scalacheck_2.12-1.14.3.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/scopt/scopt_2.12/3.7.1/scopt_2.12-3.7.1.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/lihaoyi/utest_2.12/0.6.6/utest_2.12-0.6.6.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3-macros_2.12/3.3.1/chisel3-macros_2.12-3.3.1.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3-core_2.12/3.3.1/chisel3-core_2.12-3.3.1.jar:/home/laraibkhan/.sbt/boot/scala-2.12.10/lib/scala-reflect.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/antlr/antlr4-runtime/4.7.1/antlr4-runtime-4.7.1.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/google/protobuf/protobuf-java/3.9.0/protobuf-java-3.9.0.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/net/jcazevedo/moultingyaml_2.12/0.4.2/moultingyaml_2.12-0.4.2.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-native_2.12/3.6.8/json4s-native_2.12-3.6.8.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/commons/commons-text/1.8/commons-text-1.8.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-jline/2.12.1/scala-jline-2.12.1.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/hamcrest/hamcrest-core/1.3/hamcrest-core-1.3.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalactic/scalactic_2.12/3.0.8/scalactic_2.12-3.0.8.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-xml_2.12/1.2.0/scala-xml_2.12-1.2.0.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/test-interface/1.0/test-interface-1.0.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/portable-scala/portable-scala-reflect_2.12/0.1.0/portable-scala-reflect_2.12-0.1.0.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/nscala-time/nscala-time_2.12/2.22.0/nscala-time_2.12-2.22.0.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/yaml/snakeyaml/1.26/snakeyaml-1.26.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-core_2.12/3.6.8/json4s-core_2.12-3.6.8.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/commons/commons-lang3/3.9/commons-lang3-3.9.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/fusesource/jansi/jansi/1.11/jansi-1.11.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/joda-time/joda-time/2.10.1/joda-time-2.10.1.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/joda/joda-convert/2.2.0/joda-convert-2.2.0.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-ast_2.12/3.6.8/json4s-ast_2.12-3.6.8.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-scalap_2.12/3.6.8/json4s-scalap_2.12-3.6.8.jar:/home/laraibkhan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/thoughtworks/paranamer/paranamer/2.8/paranamer-2.8.jar diff --git a/target/streams/runtime/exportedProductJars/_global/streams/export b/target/streams/runtime/exportedProductJars/_global/streams/export index 2101d78b..89ffd520 100644 --- a/target/streams/runtime/exportedProductJars/_global/streams/export +++ b/target/streams/runtime/exportedProductJars/_global/streams/export @@ -1 +1 @@ -/home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/chisel-module-template_2.12-3.3.0.jar +/home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/chisel-module-template_2.12-3.3.0.jar diff --git a/target/streams/runtime/externalDependencyClasspath/_global/streams/export b/target/streams/runtime/externalDependencyClasspath/_global/streams/export index 414eb951..00a41704 100644 --- a/target/streams/runtime/externalDependencyClasspath/_global/streams/export +++ b/target/streams/runtime/externalDependencyClasspath/_global/streams/export @@ -1 +1 @@ -/home/waleedbinehsan/.sbt/boot/scala-2.12.10/lib/scala-library.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel-iotesters_2.12/1.4.1/chisel-iotesters_2.12-1.4.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chiseltest_2.12/0.2.1/chiseltest_2.12-0.2.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3_2.12/3.3.1/chisel3_2.12-3.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/firrtl_2.12/1.3.1/firrtl_2.12-1.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/firrtl-interpreter_2.12/1.3.1/firrtl-interpreter_2.12-1.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/treadle_2.12/1.2.1/treadle_2.12-1.2.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/junit/junit/4.13/junit-4.13.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalatest/scalatest_2.12/3.0.8/scalatest_2.12-3.0.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalacheck/scalacheck_2.12/1.14.3/scalacheck_2.12-1.14.3.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/scopt/scopt_2.12/3.7.1/scopt_2.12-3.7.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/lihaoyi/utest_2.12/0.6.6/utest_2.12-0.6.6.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3-macros_2.12/3.3.1/chisel3-macros_2.12-3.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3-core_2.12/3.3.1/chisel3-core_2.12-3.3.1.jar:/home/waleedbinehsan/.sbt/boot/scala-2.12.10/lib/scala-reflect.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/antlr/antlr4-runtime/4.7.1/antlr4-runtime-4.7.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/google/protobuf/protobuf-java/3.9.0/protobuf-java-3.9.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/net/jcazevedo/moultingyaml_2.12/0.4.2/moultingyaml_2.12-0.4.2.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-native_2.12/3.6.8/json4s-native_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/commons/commons-text/1.8/commons-text-1.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-jline/2.12.1/scala-jline-2.12.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/hamcrest/hamcrest-core/1.3/hamcrest-core-1.3.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalactic/scalactic_2.12/3.0.8/scalactic_2.12-3.0.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-xml_2.12/1.2.0/scala-xml_2.12-1.2.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/test-interface/1.0/test-interface-1.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/portable-scala/portable-scala-reflect_2.12/0.1.0/portable-scala-reflect_2.12-0.1.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/nscala-time/nscala-time_2.12/2.22.0/nscala-time_2.12-2.22.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/yaml/snakeyaml/1.26/snakeyaml-1.26.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-core_2.12/3.6.8/json4s-core_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/commons/commons-lang3/3.9/commons-lang3-3.9.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/fusesource/jansi/jansi/1.11/jansi-1.11.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/joda-time/joda-time/2.10.1/joda-time-2.10.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/joda/joda-convert/2.2.0/joda-convert-2.2.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-ast_2.12/3.6.8/json4s-ast_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-scalap_2.12/3.6.8/json4s-scalap_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/thoughtworks/paranamer/paranamer/2.8/paranamer-2.8.jar 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diff --git a/target/streams/runtime/fullClasspathAsJars/_global/streams/export b/target/streams/runtime/fullClasspathAsJars/_global/streams/export index 7a8afe52..90bf138e 100644 --- a/target/streams/runtime/fullClasspathAsJars/_global/streams/export +++ b/target/streams/runtime/fullClasspathAsJars/_global/streams/export @@ -1 +1 @@ -/home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/chisel-module-template_2.12-3.3.0.jar:/home/waleedbinehsan/.sbt/boot/scala-2.12.10/lib/scala-library.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel-iotesters_2.12/1.4.1/chisel-iotesters_2.12-1.4.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chiseltest_2.12/0.2.1/chiseltest_2.12-0.2.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3_2.12/3.3.1/chisel3_2.12-3.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/firrtl_2.12/1.3.1/firrtl_2.12-1.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/firrtl-interpreter_2.12/1.3.1/firrtl-interpreter_2.12-1.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/treadle_2.12/1.2.1/treadle_2.12-1.2.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/junit/junit/4.13/junit-4.13.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalatest/scalatest_2.12/3.0.8/scalatest_2.12-3.0.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalacheck/scalacheck_2.12/1.14.3/scalacheck_2.12-1.14.3.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/scopt/scopt_2.12/3.7.1/scopt_2.12-3.7.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/lihaoyi/utest_2.12/0.6.6/utest_2.12-0.6.6.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3-macros_2.12/3.3.1/chisel3-macros_2.12-3.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3-core_2.12/3.3.1/chisel3-core_2.12-3.3.1.jar:/home/waleedbinehsan/.sbt/boot/scala-2.12.10/lib/scala-reflect.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/antlr/antlr4-runtime/4.7.1/antlr4-runtime-4.7.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/google/protobuf/protobuf-java/3.9.0/protobuf-java-3.9.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/net/jcazevedo/moultingyaml_2.12/0.4.2/moultingyaml_2.12-0.4.2.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-native_2.12/3.6.8/json4s-native_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/commons/commons-text/1.8/commons-text-1.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-jline/2.12.1/scala-jline-2.12.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/hamcrest/hamcrest-core/1.3/hamcrest-core-1.3.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalactic/scalactic_2.12/3.0.8/scalactic_2.12-3.0.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-xml_2.12/1.2.0/scala-xml_2.12-1.2.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/test-interface/1.0/test-interface-1.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/portable-scala/portable-scala-reflect_2.12/0.1.0/portable-scala-reflect_2.12-0.1.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/nscala-time/nscala-time_2.12/2.22.0/nscala-time_2.12-2.22.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/yaml/snakeyaml/1.26/snakeyaml-1.26.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-core_2.12/3.6.8/json4s-core_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/commons/commons-lang3/3.9/commons-lang3-3.9.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/fusesource/jansi/jansi/1.11/jansi-1.11.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/joda-time/joda-time/2.10.1/joda-time-2.10.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/joda/joda-convert/2.2.0/joda-convert-2.2.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-ast_2.12/3.6.8/json4s-ast_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-scalap_2.12/3.6.8/json4s-scalap_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/thoughtworks/paranamer/paranamer/2.8/paranamer-2.8.jar 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diff --git a/target/streams/runtime/internalDependencyAsJars/_global/streams/export b/target/streams/runtime/internalDependencyAsJars/_global/streams/export index 2101d78b..89ffd520 100644 --- a/target/streams/runtime/internalDependencyAsJars/_global/streams/export +++ b/target/streams/runtime/internalDependencyAsJars/_global/streams/export @@ -1 +1 @@ -/home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/chisel-module-template_2.12-3.3.0.jar +/home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/chisel-module-template_2.12-3.3.0.jar diff --git a/target/streams/runtime/managedClasspath/_global/streams/export b/target/streams/runtime/managedClasspath/_global/streams/export index 414eb951..00a41704 100644 --- a/target/streams/runtime/managedClasspath/_global/streams/export +++ b/target/streams/runtime/managedClasspath/_global/streams/export @@ -1 +1 @@ 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