Compressed

This commit is contained in:
waleed-lm 2020-09-28 11:16:16 +05:00
parent 7335a5bccf
commit 5f65e686d3
12 changed files with 2453 additions and 2388 deletions

View File

@ -27,6 +27,13 @@
"~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_din"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_o",
"sources":[
"~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_din"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_legal",

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

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@ -352,7 +352,17 @@ class el2_ifu_bp_ctl extends Module with el2_lib {
val bht_rd_addr_hashed_p1_f = el2_btb_ghr_hash(btb_rd_addr_p1_f, fghr)
val bht_wr_addr0 = mp_hashed
//val bht_wr_addr2 =
val bht_wr_addr2 = br0_hashed_wb
val bht_rd_addr_f = bht_rd_addr_hashed_f
val bht_rd_addr_p1_f = bht_rd_addr_hashed_p1_f
// BTB
// Entry -> Tag[BTB-BTAG-SIZE], toffset[12], pc4, boffset, call, ret, valid
val btb_bank0_rd_data_way0_out = (0 until LRU_SIZE).map(i=>RegEnable(btb_wr_data,0.U,((btb_wr_addr===i.U) & btb_wr_en_way0).asBool))
val btb_bank0_rd_data_way1_out = (0 until LRU_SIZE).map(i=>RegEnable(btb_wr_data,0.U,((btb_wr_addr===i.U) & btb_wr_en_way1).asBool))
}
object ifu_bp extends App {

View File

@ -11,13 +11,14 @@ class el2_ifu_compress_ctl extends Module {
val l2 = Output(UInt(32.W))
val l3 = Output(UInt(32.W))
val legal = Output(Bool())
val o = Output(UInt(32.W))
//val test = Output(Bool())
})
//io.dout := (0 until 32).map(i=> 0.U.asBool)
def pat(y : List[Int]) = (0 until y.size).map(i=> if(y(i)>=0) io.din(y(i)) else !io.din(y(i).abs)).reduce(_&_)
val out = Wire(Vec(32, Bool()))
val out = Wire(Vec(32, UInt(1.W)))
out := (0 until 32).map(i=> 0.U.asBool)
out(30) := pat(List(15, -14, -13, 10, -6, -5, 0)) | pat(List(15, -14, -13, -11, 10, 0))
out(20) := pat(List(-14, 12, -11, -10, -9, -8, -7, -6, -5, -4, -3, -2, 1))
@ -27,17 +28,32 @@ class el2_ifu_compress_ctl extends Module {
out(12) := pat(List(15, -14, -13, 6, 5, 0)) | pat(List(15, -14, -13, -11, 0)) | pat(List(15, -14, -13, -10, 0)) |
pat(List(-15, -14, 1)) | pat(List(15, 14, 13))
out(6) := (pat(List(15, -14, -6, -5, -4, -3, -2)) & !io.din(0)) | pat(List(-14, 13)) | pat(List(15, 14, 0))
out(5) := (io.din(15)&(!io.din(0))) | pat(List(15, 11, 10)) | pat(List(13, -8)) | pat(List(13, 7)) |
pat(List(13, 9)) | pat(List(13, 10)) | pat(List(13, 11)) | pat(List(-14, 13)) | pat(List(15, 14))
out(4) := (pat(List(-14, -11, -10, -9, -8, -7))&(!io.din(0))) | (pat(List(-15, -14))&(!io.din(0))) |
(pat(List(-14, 6))&(!io.din(0))) | pat(List(-15, 14, 0)) | (pat(List(-14, 5))&(!io.din(0))) |
(pat(List(-14, 4))&(!io.din(0))) | (pat(List(-14, 3))&(!io.din(0))) | (pat(List(-14, 2))&(!io.din(0))) |
pat(List(-14, -13, 0))
out(3) := pat(List(-14, 13))
out(2) := pat(List(-14, 12, 11, -6, -5, -4, -3, -2, 1)) | pat(List(-14, 12, 10, -6, -5, -4, -3, -2, 1)) |
pat(List(-14, 12, 9, -6, -5, -4, -3, -2, 1)) | pat(List(-14,12,8,6,-5,-4,-3,-2,1)) | pat(List(-14,12,7,-6,-5,-4,-3,-2,1)) |
(pat(List(15,-14,-12,-6,-5,-4,-3,-2))&(!io.din(0))) | pat(List(-15,13,-8)) | pat(List(-15,13,7)) | pat(List(-15,13,9)) |
pat(List(-15,13,10)) | pat(List(-15,13,11)) | pat(List(-14,13))
out(2) := pat(List(-14, 12, 11, -6, -5, -4, -3, -2, 1)) |
pat(List(-14, 12, 10, -6, -5, -4, -3, -2, 1)) |
pat(List(-14, 12, 9, -6, -5, -4, -3, -2, 1)) |
pat(List(-14, 12, 8, -6,-5,-4, -3, -2,1)) |
pat(List(-14, 12, 7, -6, -5, -4, -3, -2,1)) |
(pat(List(15, -14,-12, -6, -5, -4, -3, -2))&(!io.din(0))) |
pat(List(-15,13,-8)) |
pat(List(-15,13,7)) |
pat(List(-15,13,9)) |
pat(List(-15,13,10)) |
pat(List(-15,13,11)) |
pat(List(-14,13))
out(1) := 1.U.asBool
out(0) := 1.U.asBool
@ -148,6 +164,7 @@ class el2_ifu_compress_ctl extends Module {
io.l2 := l2
io.l3 := l3
io.legal := legal
io.o := out.reverse.reduce(Cat(_,_))
}
/*
class ExpandedInstruction extends Bundle {