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IFC

This commit is contained in:
waleed-lm 2020-09-28 18:06:36 +05:00
parent 6cc8201872
commit 6489e0eb40
12 changed files with 2526 additions and 2511 deletions
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38
el2_ifu_compress_ctl.anno.json
View File

@ -1,4 +1,12 @@
[
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_l2",
"sources":[
"~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_l2_31",
"~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_din"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_sjald",
@ -10,6 +18,7 @@
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_dout",
"sources":[
"~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_l2_31",
"~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_din"
]
},
@ -20,13 +29,6 @@
"~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_din"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_l2",
"sources":[
"~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_din"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_sluimmd",
@ -34,13 +36,6 @@
"~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_din"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_l3",
"sources":[
"~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_din"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_l1",
@ -55,6 +50,13 @@
"~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_din"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_l2_31",
"sources":[
"~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_din"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_simm9d",
@ -62,6 +64,14 @@
"~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_din"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_l3",
"sources":[
"~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_l2_31",
"~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_din"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_uimm5d",

3573
el2_ifu_compress_ctl.fir
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File diff suppressed because it is too large Load Diff

939
el2_ifu_compress_ctl.v
View File

@ -15,317 +15,318 @@ module el2_ifu_compress_ctl(
output [5:0] io_simm9d,
output [7:0] io_uimm9d,
output [5:0] io_simm5d,
output [19:0] io_sjald
output [19:0] io_sjald,
output [11:0] io_l2_31
);
wire _T_2 = ~io_din[14]; // @[el2_ifu_compress_ctl.scala 28:83]
wire _T_4 = ~io_din[13]; // @[el2_ifu_compress_ctl.scala 28:83]
wire _T_7 = ~io_din[6]; // @[el2_ifu_compress_ctl.scala 28:83]
wire _T_9 = ~io_din[5]; // @[el2_ifu_compress_ctl.scala 28:83]
wire _T_11 = io_din[15] & _T_2; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_12 = _T_11 & _T_4; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_13 = _T_12 & io_din[10]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_14 = _T_13 & _T_7; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_15 = _T_14 & _T_9; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_16 = _T_15 & io_din[0]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_23 = ~io_din[11]; // @[el2_ifu_compress_ctl.scala 28:83]
wire _T_28 = _T_12 & _T_23; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_29 = _T_28 & io_din[10]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_30 = _T_29 & io_din[0]; // @[el2_ifu_compress_ctl.scala 28:110]
wire out_30 = _T_16 | _T_30; // @[el2_ifu_compress_ctl.scala 31:53]
wire _T_38 = ~io_din[10]; // @[el2_ifu_compress_ctl.scala 28:83]
wire _T_40 = ~io_din[9]; // @[el2_ifu_compress_ctl.scala 28:83]
wire _T_42 = ~io_din[8]; // @[el2_ifu_compress_ctl.scala 28:83]
wire _T_44 = ~io_din[7]; // @[el2_ifu_compress_ctl.scala 28:83]
wire _T_50 = ~io_din[4]; // @[el2_ifu_compress_ctl.scala 28:83]
wire _T_52 = ~io_din[3]; // @[el2_ifu_compress_ctl.scala 28:83]
wire _T_54 = ~io_din[2]; // @[el2_ifu_compress_ctl.scala 28:83]
wire _T_56 = _T_2 & io_din[12]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_57 = _T_56 & _T_23; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_58 = _T_57 & _T_38; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_59 = _T_58 & _T_40; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_60 = _T_59 & _T_42; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_61 = _T_60 & _T_44; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_62 = _T_61 & _T_7; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_63 = _T_62 & _T_9; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_64 = _T_63 & _T_50; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_65 = _T_64 & _T_52; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_66 = _T_65 & _T_54; // @[el2_ifu_compress_ctl.scala 28:110]
wire out_20 = _T_66 & io_din[1]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_79 = _T_28 & io_din[0]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_90 = _T_12 & _T_38; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_91 = _T_90 & io_din[0]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_92 = _T_79 | _T_91; // @[el2_ifu_compress_ctl.scala 33:46]
wire _T_102 = _T_12 & io_din[6]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_103 = _T_102 & io_din[0]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_104 = _T_92 | _T_103; // @[el2_ifu_compress_ctl.scala 33:80]
wire _T_114 = _T_12 & io_din[5]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_115 = _T_114 & io_din[0]; // @[el2_ifu_compress_ctl.scala 28:110]
wire out_14 = _T_104 | _T_115; // @[el2_ifu_compress_ctl.scala 33:113]
wire _T_128 = _T_12 & io_din[11]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_129 = _T_128 & _T_38; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_130 = _T_129 & io_din[0]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_142 = _T_128 & io_din[6]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_143 = _T_142 & io_din[0]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_144 = _T_130 | _T_143; // @[el2_ifu_compress_ctl.scala 35:50]
wire _T_147 = ~io_din[0]; // @[el2_ifu_compress_ctl.scala 35:101]
wire _T_148 = io_din[14] & _T_147; // @[el2_ifu_compress_ctl.scala 35:99]
wire out_13 = _T_144 | _T_148; // @[el2_ifu_compress_ctl.scala 35:86]
wire _T_161 = _T_102 & io_din[5]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_162 = _T_161 & io_din[0]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_175 = _T_162 | _T_79; // @[el2_ifu_compress_ctl.scala 36:47]
wire _T_188 = _T_175 | _T_91; // @[el2_ifu_compress_ctl.scala 36:81]
wire _T_190 = ~io_din[15]; // @[el2_ifu_compress_ctl.scala 28:83]
wire _T_194 = _T_190 & _T_2; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_195 = _T_194 & io_din[1]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_196 = _T_188 | _T_195; // @[el2_ifu_compress_ctl.scala 36:115]
wire _T_200 = io_din[15] & io_din[14]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_201 = _T_200 & io_din[13]; // @[el2_ifu_compress_ctl.scala 28:110]
wire out_12 = _T_196 | _T_201; // @[el2_ifu_compress_ctl.scala 37:26]
wire _T_217 = _T_11 & _T_7; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_218 = _T_217 & _T_9; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_219 = _T_218 & _T_50; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_220 = _T_219 & _T_52; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_221 = _T_220 & _T_54; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_224 = _T_221 & _T_147; // @[el2_ifu_compress_ctl.scala 38:53]
wire _T_228 = _T_2 & io_din[13]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_229 = _T_224 | _T_228; // @[el2_ifu_compress_ctl.scala 38:67]
wire _T_234 = _T_200 & io_din[0]; // @[el2_ifu_compress_ctl.scala 28:110]
wire out_6 = _T_229 | _T_234; // @[el2_ifu_compress_ctl.scala 38:88]
wire _T_239 = io_din[15] & _T_147; // @[el2_ifu_compress_ctl.scala 40:24]
wire _T_243 = io_din[15] & io_din[11]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_244 = _T_243 & io_din[10]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_245 = _T_239 | _T_244; // @[el2_ifu_compress_ctl.scala 40:39]
wire _T_249 = io_din[13] & _T_42; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_250 = _T_245 | _T_249; // @[el2_ifu_compress_ctl.scala 40:63]
wire _T_253 = io_din[13] & io_din[7]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_254 = _T_250 | _T_253; // @[el2_ifu_compress_ctl.scala 40:83]
wire _T_257 = io_din[13] & io_din[9]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_258 = _T_254 | _T_257; // @[el2_ifu_compress_ctl.scala 40:102]
wire _T_261 = io_din[13] & io_din[10]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_262 = _T_258 | _T_261; // @[el2_ifu_compress_ctl.scala 41:22]
wire _T_265 = io_din[13] & io_din[11]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_266 = _T_262 | _T_265; // @[el2_ifu_compress_ctl.scala 41:42]
wire _T_271 = _T_266 | _T_228; // @[el2_ifu_compress_ctl.scala 41:62]
wire out_5 = _T_271 | _T_200; // @[el2_ifu_compress_ctl.scala 41:83]
wire _T_288 = _T_2 & _T_23; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_289 = _T_288 & _T_38; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_290 = _T_289 & _T_40; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_291 = _T_290 & _T_42; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_292 = _T_291 & _T_44; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_295 = _T_292 & _T_147; // @[el2_ifu_compress_ctl.scala 44:50]
wire _T_303 = _T_194 & _T_147; // @[el2_ifu_compress_ctl.scala 44:87]
wire _T_304 = _T_295 | _T_303; // @[el2_ifu_compress_ctl.scala 44:65]
wire _T_308 = _T_2 & io_din[6]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_311 = _T_308 & _T_147; // @[el2_ifu_compress_ctl.scala 45:23]
wire _T_312 = _T_304 | _T_311; // @[el2_ifu_compress_ctl.scala 44:102]
wire _T_317 = _T_190 & io_din[14]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_318 = _T_317 & io_din[0]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_319 = _T_312 | _T_318; // @[el2_ifu_compress_ctl.scala 45:38]
wire _T_323 = _T_2 & io_din[5]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_326 = _T_323 & _T_147; // @[el2_ifu_compress_ctl.scala 45:82]
wire _T_327 = _T_319 | _T_326; // @[el2_ifu_compress_ctl.scala 45:62]
wire _T_331 = _T_2 & io_din[4]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_334 = _T_331 & _T_147; // @[el2_ifu_compress_ctl.scala 46:23]
wire _T_335 = _T_327 | _T_334; // @[el2_ifu_compress_ctl.scala 45:97]
wire _T_339 = _T_2 & io_din[3]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_342 = _T_339 & _T_147; // @[el2_ifu_compress_ctl.scala 46:58]
wire _T_343 = _T_335 | _T_342; // @[el2_ifu_compress_ctl.scala 46:38]
wire _T_347 = _T_2 & io_din[2]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_350 = _T_347 & _T_147; // @[el2_ifu_compress_ctl.scala 46:93]
wire _T_351 = _T_343 | _T_350; // @[el2_ifu_compress_ctl.scala 46:73]
wire _T_357 = _T_2 & _T_4; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_358 = _T_357 & io_din[0]; // @[el2_ifu_compress_ctl.scala 28:110]
wire out_4 = _T_351 | _T_358; // @[el2_ifu_compress_ctl.scala 46:108]
wire _T_380 = _T_56 & io_din[11]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_381 = _T_380 & _T_7; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_382 = _T_381 & _T_9; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_383 = _T_382 & _T_50; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_384 = _T_383 & _T_52; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_385 = _T_384 & _T_54; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_386 = _T_385 & io_din[1]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_403 = _T_56 & io_din[10]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_404 = _T_403 & _T_7; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_405 = _T_404 & _T_9; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_406 = _T_405 & _T_50; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_407 = _T_406 & _T_52; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_408 = _T_407 & _T_54; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_409 = _T_408 & io_din[1]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_410 = _T_386 | _T_409; // @[el2_ifu_compress_ctl.scala 53:59]
wire _T_427 = _T_56 & io_din[9]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_428 = _T_427 & _T_7; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_429 = _T_428 & _T_9; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_430 = _T_429 & _T_50; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_431 = _T_430 & _T_52; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_432 = _T_431 & _T_54; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_433 = _T_432 & io_din[1]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_434 = _T_410 | _T_433; // @[el2_ifu_compress_ctl.scala 54:59]
wire _T_451 = _T_56 & io_din[8]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_452 = _T_451 & _T_7; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_453 = _T_452 & _T_9; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_454 = _T_453 & _T_50; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_455 = _T_454 & _T_52; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_456 = _T_455 & _T_54; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_457 = _T_456 & io_din[1]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_458 = _T_434 | _T_457; // @[el2_ifu_compress_ctl.scala 55:58]
wire _T_475 = _T_56 & io_din[7]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_476 = _T_475 & _T_7; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_477 = _T_476 & _T_9; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_478 = _T_477 & _T_50; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_479 = _T_478 & _T_52; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_480 = _T_479 & _T_54; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_481 = _T_480 & io_din[1]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_482 = _T_458 | _T_481; // @[el2_ifu_compress_ctl.scala 56:55]
wire _T_487 = ~io_din[12]; // @[el2_ifu_compress_ctl.scala 28:83]
wire _T_499 = _T_11 & _T_487; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_500 = _T_499 & _T_7; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_501 = _T_500 & _T_9; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_502 = _T_501 & _T_50; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_503 = _T_502 & _T_52; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_504 = _T_503 & _T_54; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_507 = _T_504 & _T_147; // @[el2_ifu_compress_ctl.scala 58:56]
wire _T_508 = _T_482 | _T_507; // @[el2_ifu_compress_ctl.scala 57:57]
wire _T_514 = _T_190 & io_din[13]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_515 = _T_514 & _T_42; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_516 = _T_508 | _T_515; // @[el2_ifu_compress_ctl.scala 58:71]
wire _T_522 = _T_514 & io_din[7]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_523 = _T_516 | _T_522; // @[el2_ifu_compress_ctl.scala 59:34]
wire _T_529 = _T_514 & io_din[9]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_530 = _T_523 | _T_529; // @[el2_ifu_compress_ctl.scala 60:33]
wire _T_536 = _T_514 & io_din[10]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_537 = _T_530 | _T_536; // @[el2_ifu_compress_ctl.scala 61:33]
wire _T_543 = _T_514 & io_din[11]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_544 = _T_537 | _T_543; // @[el2_ifu_compress_ctl.scala 62:34]
wire out_2 = _T_544 | _T_228; // @[el2_ifu_compress_ctl.scala 63:34]
wire [4:0] rs2d = io_din[6:2]; // @[el2_ifu_compress_ctl.scala 72:20]
wire [4:0] rdd = io_din[11:7]; // @[el2_ifu_compress_ctl.scala 73:19]
wire _T_2 = ~io_din[14]; // @[el2_ifu_compress_ctl.scala 29:83]
wire _T_4 = ~io_din[13]; // @[el2_ifu_compress_ctl.scala 29:83]
wire _T_7 = ~io_din[6]; // @[el2_ifu_compress_ctl.scala 29:83]
wire _T_9 = ~io_din[5]; // @[el2_ifu_compress_ctl.scala 29:83]
wire _T_11 = io_din[15] & _T_2; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_12 = _T_11 & _T_4; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_13 = _T_12 & io_din[10]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_14 = _T_13 & _T_7; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_15 = _T_14 & _T_9; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_16 = _T_15 & io_din[0]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_23 = ~io_din[11]; // @[el2_ifu_compress_ctl.scala 29:83]
wire _T_28 = _T_12 & _T_23; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_29 = _T_28 & io_din[10]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_30 = _T_29 & io_din[0]; // @[el2_ifu_compress_ctl.scala 29:110]
wire out_30 = _T_16 | _T_30; // @[el2_ifu_compress_ctl.scala 32:53]
wire _T_38 = ~io_din[10]; // @[el2_ifu_compress_ctl.scala 29:83]
wire _T_40 = ~io_din[9]; // @[el2_ifu_compress_ctl.scala 29:83]
wire _T_42 = ~io_din[8]; // @[el2_ifu_compress_ctl.scala 29:83]
wire _T_44 = ~io_din[7]; // @[el2_ifu_compress_ctl.scala 29:83]
wire _T_50 = ~io_din[4]; // @[el2_ifu_compress_ctl.scala 29:83]
wire _T_52 = ~io_din[3]; // @[el2_ifu_compress_ctl.scala 29:83]
wire _T_54 = ~io_din[2]; // @[el2_ifu_compress_ctl.scala 29:83]
wire _T_56 = _T_2 & io_din[12]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_57 = _T_56 & _T_23; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_58 = _T_57 & _T_38; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_59 = _T_58 & _T_40; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_60 = _T_59 & _T_42; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_61 = _T_60 & _T_44; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_62 = _T_61 & _T_7; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_63 = _T_62 & _T_9; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_64 = _T_63 & _T_50; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_65 = _T_64 & _T_52; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_66 = _T_65 & _T_54; // @[el2_ifu_compress_ctl.scala 29:110]
wire out_20 = _T_66 & io_din[1]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_79 = _T_28 & io_din[0]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_90 = _T_12 & _T_38; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_91 = _T_90 & io_din[0]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_92 = _T_79 | _T_91; // @[el2_ifu_compress_ctl.scala 34:46]
wire _T_102 = _T_12 & io_din[6]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_103 = _T_102 & io_din[0]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_104 = _T_92 | _T_103; // @[el2_ifu_compress_ctl.scala 34:80]
wire _T_114 = _T_12 & io_din[5]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_115 = _T_114 & io_din[0]; // @[el2_ifu_compress_ctl.scala 29:110]
wire out_14 = _T_104 | _T_115; // @[el2_ifu_compress_ctl.scala 34:113]
wire _T_128 = _T_12 & io_din[11]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_129 = _T_128 & _T_38; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_130 = _T_129 & io_din[0]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_142 = _T_128 & io_din[6]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_143 = _T_142 & io_din[0]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_144 = _T_130 | _T_143; // @[el2_ifu_compress_ctl.scala 36:50]
wire _T_147 = ~io_din[0]; // @[el2_ifu_compress_ctl.scala 36:101]
wire _T_148 = io_din[14] & _T_147; // @[el2_ifu_compress_ctl.scala 36:99]
wire out_13 = _T_144 | _T_148; // @[el2_ifu_compress_ctl.scala 36:86]
wire _T_161 = _T_102 & io_din[5]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_162 = _T_161 & io_din[0]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_175 = _T_162 | _T_79; // @[el2_ifu_compress_ctl.scala 37:47]
wire _T_188 = _T_175 | _T_91; // @[el2_ifu_compress_ctl.scala 37:81]
wire _T_190 = ~io_din[15]; // @[el2_ifu_compress_ctl.scala 29:83]
wire _T_194 = _T_190 & _T_2; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_195 = _T_194 & io_din[1]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_196 = _T_188 | _T_195; // @[el2_ifu_compress_ctl.scala 37:115]
wire _T_200 = io_din[15] & io_din[14]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_201 = _T_200 & io_din[13]; // @[el2_ifu_compress_ctl.scala 29:110]
wire out_12 = _T_196 | _T_201; // @[el2_ifu_compress_ctl.scala 38:26]
wire _T_217 = _T_11 & _T_7; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_218 = _T_217 & _T_9; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_219 = _T_218 & _T_50; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_220 = _T_219 & _T_52; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_221 = _T_220 & _T_54; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_224 = _T_221 & _T_147; // @[el2_ifu_compress_ctl.scala 39:53]
wire _T_228 = _T_2 & io_din[13]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_229 = _T_224 | _T_228; // @[el2_ifu_compress_ctl.scala 39:67]
wire _T_234 = _T_200 & io_din[0]; // @[el2_ifu_compress_ctl.scala 29:110]
wire out_6 = _T_229 | _T_234; // @[el2_ifu_compress_ctl.scala 39:88]
wire _T_239 = io_din[15] & _T_147; // @[el2_ifu_compress_ctl.scala 41:24]
wire _T_243 = io_din[15] & io_din[11]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_244 = _T_243 & io_din[10]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_245 = _T_239 | _T_244; // @[el2_ifu_compress_ctl.scala 41:39]
wire _T_249 = io_din[13] & _T_42; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_250 = _T_245 | _T_249; // @[el2_ifu_compress_ctl.scala 41:63]
wire _T_253 = io_din[13] & io_din[7]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_254 = _T_250 | _T_253; // @[el2_ifu_compress_ctl.scala 41:83]
wire _T_257 = io_din[13] & io_din[9]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_258 = _T_254 | _T_257; // @[el2_ifu_compress_ctl.scala 41:102]
wire _T_261 = io_din[13] & io_din[10]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_262 = _T_258 | _T_261; // @[el2_ifu_compress_ctl.scala 42:22]
wire _T_265 = io_din[13] & io_din[11]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_266 = _T_262 | _T_265; // @[el2_ifu_compress_ctl.scala 42:42]
wire _T_271 = _T_266 | _T_228; // @[el2_ifu_compress_ctl.scala 42:62]
wire out_5 = _T_271 | _T_200; // @[el2_ifu_compress_ctl.scala 42:83]
wire _T_288 = _T_2 & _T_23; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_289 = _T_288 & _T_38; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_290 = _T_289 & _T_40; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_291 = _T_290 & _T_42; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_292 = _T_291 & _T_44; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_295 = _T_292 & _T_147; // @[el2_ifu_compress_ctl.scala 45:50]
wire _T_303 = _T_194 & _T_147; // @[el2_ifu_compress_ctl.scala 45:87]
wire _T_304 = _T_295 | _T_303; // @[el2_ifu_compress_ctl.scala 45:65]
wire _T_308 = _T_2 & io_din[6]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_311 = _T_308 & _T_147; // @[el2_ifu_compress_ctl.scala 46:23]
wire _T_312 = _T_304 | _T_311; // @[el2_ifu_compress_ctl.scala 45:102]
wire _T_317 = _T_190 & io_din[14]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_318 = _T_317 & io_din[0]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_319 = _T_312 | _T_318; // @[el2_ifu_compress_ctl.scala 46:38]
wire _T_323 = _T_2 & io_din[5]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_326 = _T_323 & _T_147; // @[el2_ifu_compress_ctl.scala 46:82]
wire _T_327 = _T_319 | _T_326; // @[el2_ifu_compress_ctl.scala 46:62]
wire _T_331 = _T_2 & io_din[4]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_334 = _T_331 & _T_147; // @[el2_ifu_compress_ctl.scala 47:23]
wire _T_335 = _T_327 | _T_334; // @[el2_ifu_compress_ctl.scala 46:97]
wire _T_339 = _T_2 & io_din[3]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_342 = _T_339 & _T_147; // @[el2_ifu_compress_ctl.scala 47:58]
wire _T_343 = _T_335 | _T_342; // @[el2_ifu_compress_ctl.scala 47:38]
wire _T_347 = _T_2 & io_din[2]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_350 = _T_347 & _T_147; // @[el2_ifu_compress_ctl.scala 47:93]
wire _T_351 = _T_343 | _T_350; // @[el2_ifu_compress_ctl.scala 47:73]
wire _T_357 = _T_2 & _T_4; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_358 = _T_357 & io_din[0]; // @[el2_ifu_compress_ctl.scala 29:110]
wire out_4 = _T_351 | _T_358; // @[el2_ifu_compress_ctl.scala 47:108]
wire _T_380 = _T_56 & io_din[11]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_381 = _T_380 & _T_7; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_382 = _T_381 & _T_9; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_383 = _T_382 & _T_50; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_384 = _T_383 & _T_52; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_385 = _T_384 & _T_54; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_386 = _T_385 & io_din[1]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_403 = _T_56 & io_din[10]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_404 = _T_403 & _T_7; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_405 = _T_404 & _T_9; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_406 = _T_405 & _T_50; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_407 = _T_406 & _T_52; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_408 = _T_407 & _T_54; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_409 = _T_408 & io_din[1]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_410 = _T_386 | _T_409; // @[el2_ifu_compress_ctl.scala 54:59]
wire _T_427 = _T_56 & io_din[9]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_428 = _T_427 & _T_7; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_429 = _T_428 & _T_9; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_430 = _T_429 & _T_50; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_431 = _T_430 & _T_52; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_432 = _T_431 & _T_54; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_433 = _T_432 & io_din[1]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_434 = _T_410 | _T_433; // @[el2_ifu_compress_ctl.scala 55:59]
wire _T_451 = _T_56 & io_din[8]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_452 = _T_451 & _T_7; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_453 = _T_452 & _T_9; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_454 = _T_453 & _T_50; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_455 = _T_454 & _T_52; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_456 = _T_455 & _T_54; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_457 = _T_456 & io_din[1]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_458 = _T_434 | _T_457; // @[el2_ifu_compress_ctl.scala 56:58]
wire _T_475 = _T_56 & io_din[7]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_476 = _T_475 & _T_7; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_477 = _T_476 & _T_9; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_478 = _T_477 & _T_50; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_479 = _T_478 & _T_52; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_480 = _T_479 & _T_54; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_481 = _T_480 & io_din[1]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_482 = _T_458 | _T_481; // @[el2_ifu_compress_ctl.scala 57:55]
wire _T_487 = ~io_din[12]; // @[el2_ifu_compress_ctl.scala 29:83]
wire _T_499 = _T_11 & _T_487; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_500 = _T_499 & _T_7; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_501 = _T_500 & _T_9; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_502 = _T_501 & _T_50; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_503 = _T_502 & _T_52; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_504 = _T_503 & _T_54; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_507 = _T_504 & _T_147; // @[el2_ifu_compress_ctl.scala 59:56]
wire _T_508 = _T_482 | _T_507; // @[el2_ifu_compress_ctl.scala 58:57]
wire _T_514 = _T_190 & io_din[13]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_515 = _T_514 & _T_42; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_516 = _T_508 | _T_515; // @[el2_ifu_compress_ctl.scala 59:71]
wire _T_522 = _T_514 & io_din[7]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_523 = _T_516 | _T_522; // @[el2_ifu_compress_ctl.scala 60:34]
wire _T_529 = _T_514 & io_din[9]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_530 = _T_523 | _T_529; // @[el2_ifu_compress_ctl.scala 61:33]
wire _T_536 = _T_514 & io_din[10]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_537 = _T_530 | _T_536; // @[el2_ifu_compress_ctl.scala 62:33]
wire _T_543 = _T_514 & io_din[11]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_544 = _T_537 | _T_543; // @[el2_ifu_compress_ctl.scala 63:34]
wire out_2 = _T_544 | _T_228; // @[el2_ifu_compress_ctl.scala 64:34]
wire [4:0] rs2d = io_din[6:2]; // @[el2_ifu_compress_ctl.scala 73:20]
wire [4:0] rdd = io_din[11:7]; // @[el2_ifu_compress_ctl.scala 74:19]
wire [4:0] rdpd = {2'h1,io_din[9:7]}; // @[Cat.scala 29:58]
wire [4:0] rs2pd = {2'h1,io_din[4:2]}; // @[Cat.scala 29:58]
wire _T_557 = _T_308 & io_din[1]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_564 = _T_317 & io_din[11]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_565 = _T_564 & io_din[0]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_566 = _T_557 | _T_565; // @[el2_ifu_compress_ctl.scala 77:33]
wire _T_572 = _T_323 & io_din[1]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_573 = _T_566 | _T_572; // @[el2_ifu_compress_ctl.scala 77:58]
wire _T_580 = _T_317 & io_din[10]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_581 = _T_580 & io_din[0]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_582 = _T_573 | _T_581; // @[el2_ifu_compress_ctl.scala 77:79]
wire _T_588 = _T_331 & io_din[1]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_589 = _T_582 | _T_588; // @[el2_ifu_compress_ctl.scala 77:104]
wire _T_596 = _T_317 & io_din[9]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_597 = _T_596 & io_din[0]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_598 = _T_589 | _T_597; // @[el2_ifu_compress_ctl.scala 78:24]
wire _T_604 = _T_339 & io_din[1]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_605 = _T_598 | _T_604; // @[el2_ifu_compress_ctl.scala 78:48]
wire _T_613 = _T_317 & _T_42; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_614 = _T_613 & io_din[0]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_615 = _T_605 | _T_614; // @[el2_ifu_compress_ctl.scala 78:69]
wire _T_621 = _T_347 & io_din[1]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_622 = _T_615 | _T_621; // @[el2_ifu_compress_ctl.scala 78:94]
wire _T_629 = _T_317 & io_din[7]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_630 = _T_629 & io_din[0]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_631 = _T_622 | _T_630; // @[el2_ifu_compress_ctl.scala 79:22]
wire _T_635 = _T_190 & io_din[1]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_636 = _T_631 | _T_635; // @[el2_ifu_compress_ctl.scala 79:46]
wire _T_642 = _T_190 & _T_4; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_643 = _T_642 & io_din[0]; // @[el2_ifu_compress_ctl.scala 28:110]
wire rdrd = _T_636 | _T_643; // @[el2_ifu_compress_ctl.scala 79:65]
wire _T_651 = _T_380 & io_din[1]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_659 = _T_403 & io_din[1]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_660 = _T_651 | _T_659; // @[el2_ifu_compress_ctl.scala 81:38]
wire _T_668 = _T_427 & io_din[1]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_669 = _T_660 | _T_668; // @[el2_ifu_compress_ctl.scala 82:28]
wire _T_677 = _T_451 & io_din[1]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_678 = _T_669 | _T_677; // @[el2_ifu_compress_ctl.scala 83:27]
wire _T_686 = _T_475 & io_din[1]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_687 = _T_678 | _T_686; // @[el2_ifu_compress_ctl.scala 84:27]
wire _T_703 = _T_2 & _T_487; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_704 = _T_703 & _T_7; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_705 = _T_704 & _T_9; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_706 = _T_705 & _T_50; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_707 = _T_706 & _T_52; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_708 = _T_707 & _T_54; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_709 = _T_708 & io_din[1]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_710 = _T_687 | _T_709; // @[el2_ifu_compress_ctl.scala 85:27]
wire _T_717 = _T_56 & io_din[6]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_718 = _T_717 & io_din[1]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_719 = _T_710 | _T_718; // @[el2_ifu_compress_ctl.scala 86:41]
wire _T_726 = _T_56 & io_din[5]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_727 = _T_726 & io_din[1]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_728 = _T_719 | _T_727; // @[el2_ifu_compress_ctl.scala 87:27]
wire _T_735 = _T_56 & io_din[4]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_736 = _T_735 & io_din[1]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_737 = _T_728 | _T_736; // @[el2_ifu_compress_ctl.scala 88:27]
wire _T_744 = _T_56 & io_din[3]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_745 = _T_744 & io_din[1]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_746 = _T_737 | _T_745; // @[el2_ifu_compress_ctl.scala 89:27]
wire _T_753 = _T_56 & io_din[2]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_754 = _T_753 & io_din[1]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_755 = _T_746 | _T_754; // @[el2_ifu_compress_ctl.scala 90:27]
wire _T_764 = _T_194 & _T_4; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_765 = _T_764 & io_din[0]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_766 = _T_755 | _T_765; // @[el2_ifu_compress_ctl.scala 91:27]
wire rdrs1 = _T_766 | _T_195; // @[el2_ifu_compress_ctl.scala 92:30]
wire _T_777 = io_din[15] & io_din[6]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_778 = _T_777 & io_din[1]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_782 = io_din[15] & io_din[5]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_783 = _T_782 & io_din[1]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_784 = _T_778 | _T_783; // @[el2_ifu_compress_ctl.scala 95:34]
wire _T_788 = io_din[15] & io_din[4]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_789 = _T_788 & io_din[1]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_790 = _T_784 | _T_789; // @[el2_ifu_compress_ctl.scala 95:54]
wire _T_794 = io_din[15] & io_din[3]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_795 = _T_794 & io_din[1]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_796 = _T_790 | _T_795; // @[el2_ifu_compress_ctl.scala 95:74]
wire _T_800 = io_din[15] & io_din[2]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_801 = _T_800 & io_din[1]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_802 = _T_796 | _T_801; // @[el2_ifu_compress_ctl.scala 95:94]
wire _T_807 = _T_200 & io_din[1]; // @[el2_ifu_compress_ctl.scala 28:110]
wire rs2rs2 = _T_802 | _T_807; // @[el2_ifu_compress_ctl.scala 95:114]
wire rdprd = _T_12 & io_din[0]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_820 = io_din[15] & _T_4; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_821 = _T_820 & io_din[0]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_827 = _T_821 | _T_234; // @[el2_ifu_compress_ctl.scala 99:36]
wire _T_830 = ~io_din[1]; // @[el2_ifu_compress_ctl.scala 28:83]
wire _T_831 = io_din[14] & _T_830; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_834 = _T_831 & _T_147; // @[el2_ifu_compress_ctl.scala 99:76]
wire rdprs1 = _T_827 | _T_834; // @[el2_ifu_compress_ctl.scala 99:57]
wire _T_846 = _T_128 & io_din[10]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_847 = _T_846 & io_din[0]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_851 = io_din[15] & _T_830; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_854 = _T_851 & _T_147; // @[el2_ifu_compress_ctl.scala 101:66]
wire rs2prs2 = _T_847 | _T_854; // @[el2_ifu_compress_ctl.scala 101:47]
wire _T_859 = _T_190 & _T_830; // @[el2_ifu_compress_ctl.scala 28:110]
wire rs2prd = _T_859 & _T_147; // @[el2_ifu_compress_ctl.scala 102:33]
wire _T_866 = _T_2 & _T_830; // @[el2_ifu_compress_ctl.scala 28:110]
wire uimm9_2 = _T_866 & _T_147; // @[el2_ifu_compress_ctl.scala 103:34]
wire _T_875 = _T_317 & _T_830; // @[el2_ifu_compress_ctl.scala 28:110]
wire ulwimm6_2 = _T_875 & _T_147; // @[el2_ifu_compress_ctl.scala 104:39]
wire ulwspimm7_2 = _T_317 & io_din[1]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_897 = _T_317 & io_din[13]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_898 = _T_897 & _T_23; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_899 = _T_898 & _T_38; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_900 = _T_899 & _T_40; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_901 = _T_900 & io_din[8]; // @[el2_ifu_compress_ctl.scala 28:110]
wire rdeq2 = _T_901 & _T_44; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1027 = _T_194 & io_din[13]; // @[el2_ifu_compress_ctl.scala 28:110]
wire rdeq1 = _T_482 | _T_1027; // @[el2_ifu_compress_ctl.scala 109:42]
wire _T_1050 = io_din[14] & io_din[1]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1051 = rdeq2 | _T_1050; // @[el2_ifu_compress_ctl.scala 110:53]
wire rs1eq2 = _T_1051 | uimm9_2; // @[el2_ifu_compress_ctl.scala 110:71]
wire _T_1092 = _T_357 & io_din[11]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1093 = _T_1092 & _T_38; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1094 = _T_1093 & io_din[0]; // @[el2_ifu_compress_ctl.scala 28:110]
wire simm5_0 = _T_1094 | _T_643; // @[el2_ifu_compress_ctl.scala 113:45]
wire _T_1112 = _T_897 & io_din[7]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1121 = _T_897 & _T_42; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1122 = _T_1112 | _T_1121; // @[el2_ifu_compress_ctl.scala 115:44]
wire _T_1130 = _T_897 & io_din[9]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1131 = _T_1122 | _T_1130; // @[el2_ifu_compress_ctl.scala 116:29]
wire _T_1139 = _T_897 & io_din[10]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1140 = _T_1131 | _T_1139; // @[el2_ifu_compress_ctl.scala 117:28]
wire _T_1148 = _T_897 & io_din[11]; // @[el2_ifu_compress_ctl.scala 28:110]
wire sluimm17_12 = _T_1140 | _T_1148; // @[el2_ifu_compress_ctl.scala 118:29]
wire uimm5_0 = _T_79 | _T_195; // @[el2_ifu_compress_ctl.scala 120:45]
wire _T_557 = _T_308 & io_din[1]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_564 = _T_317 & io_din[11]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_565 = _T_564 & io_din[0]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_566 = _T_557 | _T_565; // @[el2_ifu_compress_ctl.scala 78:33]
wire _T_572 = _T_323 & io_din[1]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_573 = _T_566 | _T_572; // @[el2_ifu_compress_ctl.scala 78:58]
wire _T_580 = _T_317 & io_din[10]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_581 = _T_580 & io_din[0]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_582 = _T_573 | _T_581; // @[el2_ifu_compress_ctl.scala 78:79]
wire _T_588 = _T_331 & io_din[1]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_589 = _T_582 | _T_588; // @[el2_ifu_compress_ctl.scala 78:104]
wire _T_596 = _T_317 & io_din[9]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_597 = _T_596 & io_din[0]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_598 = _T_589 | _T_597; // @[el2_ifu_compress_ctl.scala 79:24]
wire _T_604 = _T_339 & io_din[1]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_605 = _T_598 | _T_604; // @[el2_ifu_compress_ctl.scala 79:48]
wire _T_613 = _T_317 & _T_42; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_614 = _T_613 & io_din[0]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_615 = _T_605 | _T_614; // @[el2_ifu_compress_ctl.scala 79:69]
wire _T_621 = _T_347 & io_din[1]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_622 = _T_615 | _T_621; // @[el2_ifu_compress_ctl.scala 79:94]
wire _T_629 = _T_317 & io_din[7]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_630 = _T_629 & io_din[0]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_631 = _T_622 | _T_630; // @[el2_ifu_compress_ctl.scala 80:22]
wire _T_635 = _T_190 & io_din[1]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_636 = _T_631 | _T_635; // @[el2_ifu_compress_ctl.scala 80:46]
wire _T_642 = _T_190 & _T_4; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_643 = _T_642 & io_din[0]; // @[el2_ifu_compress_ctl.scala 29:110]
wire rdrd = _T_636 | _T_643; // @[el2_ifu_compress_ctl.scala 80:65]
wire _T_651 = _T_380 & io_din[1]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_659 = _T_403 & io_din[1]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_660 = _T_651 | _T_659; // @[el2_ifu_compress_ctl.scala 82:38]
wire _T_668 = _T_427 & io_din[1]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_669 = _T_660 | _T_668; // @[el2_ifu_compress_ctl.scala 83:28]
wire _T_677 = _T_451 & io_din[1]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_678 = _T_669 | _T_677; // @[el2_ifu_compress_ctl.scala 84:27]
wire _T_686 = _T_475 & io_din[1]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_687 = _T_678 | _T_686; // @[el2_ifu_compress_ctl.scala 85:27]
wire _T_703 = _T_2 & _T_487; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_704 = _T_703 & _T_7; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_705 = _T_704 & _T_9; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_706 = _T_705 & _T_50; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_707 = _T_706 & _T_52; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_708 = _T_707 & _T_54; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_709 = _T_708 & io_din[1]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_710 = _T_687 | _T_709; // @[el2_ifu_compress_ctl.scala 86:27]
wire _T_717 = _T_56 & io_din[6]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_718 = _T_717 & io_din[1]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_719 = _T_710 | _T_718; // @[el2_ifu_compress_ctl.scala 87:41]
wire _T_726 = _T_56 & io_din[5]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_727 = _T_726 & io_din[1]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_728 = _T_719 | _T_727; // @[el2_ifu_compress_ctl.scala 88:27]
wire _T_735 = _T_56 & io_din[4]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_736 = _T_735 & io_din[1]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_737 = _T_728 | _T_736; // @[el2_ifu_compress_ctl.scala 89:27]
wire _T_744 = _T_56 & io_din[3]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_745 = _T_744 & io_din[1]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_746 = _T_737 | _T_745; // @[el2_ifu_compress_ctl.scala 90:27]
wire _T_753 = _T_56 & io_din[2]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_754 = _T_753 & io_din[1]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_755 = _T_746 | _T_754; // @[el2_ifu_compress_ctl.scala 91:27]
wire _T_764 = _T_194 & _T_4; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_765 = _T_764 & io_din[0]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_766 = _T_755 | _T_765; // @[el2_ifu_compress_ctl.scala 92:27]
wire rdrs1 = _T_766 | _T_195; // @[el2_ifu_compress_ctl.scala 93:30]
wire _T_777 = io_din[15] & io_din[6]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_778 = _T_777 & io_din[1]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_782 = io_din[15] & io_din[5]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_783 = _T_782 & io_din[1]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_784 = _T_778 | _T_783; // @[el2_ifu_compress_ctl.scala 96:34]
wire _T_788 = io_din[15] & io_din[4]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_789 = _T_788 & io_din[1]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_790 = _T_784 | _T_789; // @[el2_ifu_compress_ctl.scala 96:54]
wire _T_794 = io_din[15] & io_din[3]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_795 = _T_794 & io_din[1]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_796 = _T_790 | _T_795; // @[el2_ifu_compress_ctl.scala 96:74]
wire _T_800 = io_din[15] & io_din[2]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_801 = _T_800 & io_din[1]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_802 = _T_796 | _T_801; // @[el2_ifu_compress_ctl.scala 96:94]
wire _T_807 = _T_200 & io_din[1]; // @[el2_ifu_compress_ctl.scala 29:110]
wire rs2rs2 = _T_802 | _T_807; // @[el2_ifu_compress_ctl.scala 96:114]
wire rdprd = _T_12 & io_din[0]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_820 = io_din[15] & _T_4; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_821 = _T_820 & io_din[0]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_827 = _T_821 | _T_234; // @[el2_ifu_compress_ctl.scala 100:36]
wire _T_830 = ~io_din[1]; // @[el2_ifu_compress_ctl.scala 29:83]
wire _T_831 = io_din[14] & _T_830; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_834 = _T_831 & _T_147; // @[el2_ifu_compress_ctl.scala 100:76]
wire rdprs1 = _T_827 | _T_834; // @[el2_ifu_compress_ctl.scala 100:57]
wire _T_846 = _T_128 & io_din[10]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_847 = _T_846 & io_din[0]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_851 = io_din[15] & _T_830; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_854 = _T_851 & _T_147; // @[el2_ifu_compress_ctl.scala 102:66]
wire rs2prs2 = _T_847 | _T_854; // @[el2_ifu_compress_ctl.scala 102:47]
wire _T_859 = _T_190 & _T_830; // @[el2_ifu_compress_ctl.scala 29:110]
wire rs2prd = _T_859 & _T_147; // @[el2_ifu_compress_ctl.scala 103:33]
wire _T_866 = _T_2 & _T_830; // @[el2_ifu_compress_ctl.scala 29:110]
wire uimm9_2 = _T_866 & _T_147; // @[el2_ifu_compress_ctl.scala 104:34]
wire _T_875 = _T_317 & _T_830; // @[el2_ifu_compress_ctl.scala 29:110]
wire ulwimm6_2 = _T_875 & _T_147; // @[el2_ifu_compress_ctl.scala 105:39]
wire ulwspimm7_2 = _T_317 & io_din[1]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_897 = _T_317 & io_din[13]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_898 = _T_897 & _T_23; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_899 = _T_898 & _T_38; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_900 = _T_899 & _T_40; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_901 = _T_900 & io_din[8]; // @[el2_ifu_compress_ctl.scala 29:110]
wire rdeq2 = _T_901 & _T_44; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1027 = _T_194 & io_din[13]; // @[el2_ifu_compress_ctl.scala 29:110]
wire rdeq1 = _T_482 | _T_1027; // @[el2_ifu_compress_ctl.scala 110:42]
wire _T_1050 = io_din[14] & io_din[1]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1051 = rdeq2 | _T_1050; // @[el2_ifu_compress_ctl.scala 111:53]
wire rs1eq2 = _T_1051 | uimm9_2; // @[el2_ifu_compress_ctl.scala 111:71]
wire _T_1092 = _T_357 & io_din[11]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1093 = _T_1092 & _T_38; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1094 = _T_1093 & io_din[0]; // @[el2_ifu_compress_ctl.scala 29:110]
wire simm5_0 = _T_1094 | _T_643; // @[el2_ifu_compress_ctl.scala 114:45]
wire _T_1112 = _T_897 & io_din[7]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1121 = _T_897 & _T_42; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1122 = _T_1112 | _T_1121; // @[el2_ifu_compress_ctl.scala 116:44]
wire _T_1130 = _T_897 & io_din[9]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1131 = _T_1122 | _T_1130; // @[el2_ifu_compress_ctl.scala 117:29]
wire _T_1139 = _T_897 & io_din[10]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1140 = _T_1131 | _T_1139; // @[el2_ifu_compress_ctl.scala 118:28]
wire _T_1148 = _T_897 & io_din[11]; // @[el2_ifu_compress_ctl.scala 29:110]
wire sluimm17_12 = _T_1140 | _T_1148; // @[el2_ifu_compress_ctl.scala 119:29]
wire uimm5_0 = _T_79 | _T_195; // @[el2_ifu_compress_ctl.scala 121:45]
wire [6:0] l1_6 = {out_6,out_5,out_4,_T_228,out_2,1'h1,1'h1}; // @[Cat.scala 29:58]
wire [4:0] _T_1192 = rdrd ? rdd : 5'h0; // @[Mux.scala 27:72]
wire [4:0] _T_1193 = rdprd ? rdpd : 5'h0; // @[Mux.scala 27:72]
@ -345,7 +346,7 @@ module el2_ifu_compress_ctl(
wire [4:0] _T_1222 = rs2rs2 ? rs2d : 5'h0; // @[Mux.scala 27:72]
wire [4:0] _T_1223 = rs2prs2 ? rs2pd : 5'h0; // @[Mux.scala 27:72]
wire [4:0] _T_1224 = _T_1222 | _T_1223; // @[Mux.scala 27:72]
wire [4:0] l1_24 = _T_1219 | _T_1224; // @[el2_ifu_compress_ctl.scala 133:67]
wire [4:0] l1_24 = _T_1219 | _T_1224; // @[el2_ifu_compress_ctl.scala 134:67]
wire [14:0] _T_1232 = {out_14,out_13,out_12,l1_11,l1_6}; // @[Cat.scala 29:58]
wire [16:0] _T_1234 = {1'h0,out_30,2'h0,3'h0,l1_24,l1_19}; // @[Cat.scala 29:58]
wire [31:0] l1 = {1'h0,out_30,2'h0,3'h0,l1_24,l1_19,_T_1232}; // @[Cat.scala 29:58]
@ -386,168 +387,168 @@ module el2_ifu_compress_ctl(
wire [11:0] _T_1326 = _T_1325 | _T_1319; // @[Mux.scala 27:72]
wire [11:0] _T_1327 = _T_1326 | _T_1320; // @[Mux.scala 27:72]
wire [11:0] _T_1328 = _T_1327 | _T_1321; // @[Mux.scala 27:72]
wire [11:0] l2_31 = l1[31:20] | _T_1328; // @[el2_ifu_compress_ctl.scala 151:25]
wire [8:0] _T_1335 = _T_228 ? sjald[19:11] : 9'h0; // @[Mux.scala 27:72]
wire [7:0] _T_1336 = sluimm17_12 ? sluimmd[7:0] : 8'h0; // @[Mux.scala 27:72]
wire [8:0] _GEN_0 = {{1'd0}, _T_1336}; // @[Mux.scala 27:72]
wire [8:0] _T_1337 = _T_1335 | _GEN_0; // @[Mux.scala 27:72]
wire [8:0] _GEN_1 = {{1'd0}, l1[19:12]}; // @[el2_ifu_compress_ctl.scala 161:25]
wire [8:0] l2_19 = _GEN_1 | _T_1337; // @[el2_ifu_compress_ctl.scala 161:25]
wire [32:0] l2 = {l2_31,l2_19,l1[11:0]}; // @[Cat.scala 29:58]
wire [8:0] _T_1336 = _T_228 ? sjald[19:11] : 9'h0; // @[Mux.scala 27:72]
wire [7:0] _T_1337 = sluimm17_12 ? sluimmd[7:0] : 8'h0; // @[Mux.scala 27:72]
wire [8:0] _GEN_0 = {{1'd0}, _T_1337}; // @[Mux.scala 27:72]
wire [8:0] _T_1338 = _T_1336 | _GEN_0; // @[Mux.scala 27:72]
wire [8:0] _GEN_1 = {{1'd0}, l1[19:12]}; // @[el2_ifu_compress_ctl.scala 162:25]
wire [8:0] l2_19 = _GEN_1 | _T_1338; // @[el2_ifu_compress_ctl.scala 162:25]
wire [32:0] l2 = {io_l2_31,l2_19,l1[11:0]}; // @[Cat.scala 29:58]
wire [8:0] sbr8d = {io_din[12],io_din[6],io_din[5],io_din[2],io_din[11],io_din[10],io_din[4],io_din[3],1'h0}; // @[Cat.scala 29:58]
wire [6:0] uswimm6d = {io_din[5],io_din[12:10],io_din[6],2'h0}; // @[Cat.scala 29:58]
wire [7:0] uswspimm7d = {io_din[8:7],io_din[12:9],2'h0}; // @[Cat.scala 29:58]
wire [3:0] _T_1368 = sbr8d[8] ? 4'hf : 4'h0; // @[Bitwise.scala 72:12]
wire [6:0] _T_1370 = {_T_1368,sbr8d[7:5]}; // @[Cat.scala 29:58]
wire [6:0] _T_1373 = {5'h0,uswimm6d[6:5]}; // @[Cat.scala 29:58]
wire [6:0] _T_1376 = {4'h0,uswspimm7d[7:5]}; // @[Cat.scala 29:58]
wire [6:0] _T_1377 = _T_234 ? _T_1370 : 7'h0; // @[Mux.scala 27:72]
wire [6:0] _T_1378 = _T_854 ? _T_1373 : 7'h0; // @[Mux.scala 27:72]
wire [6:0] _T_1379 = _T_807 ? _T_1376 : 7'h0; // @[Mux.scala 27:72]
wire [6:0] _T_1380 = _T_1377 | _T_1378; // @[Mux.scala 27:72]
wire [6:0] _T_1381 = _T_1380 | _T_1379; // @[Mux.scala 27:72]
wire [6:0] l3_31 = l2[31:25] | _T_1381; // @[el2_ifu_compress_ctl.scala 169:25]
wire [12:0] l3_24 = l2[24:12]; // @[el2_ifu_compress_ctl.scala 172:17]
wire [4:0] _T_1387 = {sbr8d[4:1],sbr8d[8]}; // @[Cat.scala 29:58]
wire [4:0] _T_1392 = _T_234 ? _T_1387 : 5'h0; // @[Mux.scala 27:72]
wire [4:0] _T_1393 = _T_854 ? uswimm6d[4:0] : 5'h0; // @[Mux.scala 27:72]
wire [4:0] _T_1394 = _T_807 ? uswspimm7d[4:0] : 5'h0; // @[Mux.scala 27:72]
wire [4:0] _T_1395 = _T_1392 | _T_1393; // @[Mux.scala 27:72]
wire [4:0] _T_1396 = _T_1395 | _T_1394; // @[Mux.scala 27:72]
wire [4:0] l3_11 = l2[11:7] | _T_1396; // @[el2_ifu_compress_ctl.scala 173:24]
wire [11:0] _T_1399 = {l3_11,l2[6:0]}; // @[Cat.scala 29:58]
wire [19:0] _T_1400 = {l3_31,l3_24}; // @[Cat.scala 29:58]
wire [3:0] _T_1369 = sbr8d[8] ? 4'hf : 4'h0; // @[Bitwise.scala 72:12]
wire [6:0] _T_1371 = {_T_1369,sbr8d[7:5]}; // @[Cat.scala 29:58]
wire [6:0] _T_1374 = {5'h0,uswimm6d[6:5]}; // @[Cat.scala 29:58]
wire [6:0] _T_1377 = {4'h0,uswspimm7d[7:5]}; // @[Cat.scala 29:58]
wire [6:0] _T_1378 = _T_234 ? _T_1371 : 7'h0; // @[Mux.scala 27:72]
wire [6:0] _T_1379 = _T_854 ? _T_1374 : 7'h0; // @[Mux.scala 27:72]
wire [6:0] _T_1380 = _T_807 ? _T_1377 : 7'h0; // @[Mux.scala 27:72]
wire [6:0] _T_1381 = _T_1378 | _T_1379; // @[Mux.scala 27:72]
wire [6:0] _T_1382 = _T_1381 | _T_1380; // @[Mux.scala 27:72]
wire [6:0] l3_31 = l2[31:25] | _T_1382; // @[el2_ifu_compress_ctl.scala 170:25]
wire [12:0] l3_24 = l2[24:12]; // @[el2_ifu_compress_ctl.scala 173:17]
wire [4:0] _T_1388 = {sbr8d[4:1],sbr8d[8]}; // @[Cat.scala 29:58]
wire [4:0] _T_1393 = _T_234 ? _T_1388 : 5'h0; // @[Mux.scala 27:72]
wire [4:0] _T_1394 = _T_854 ? uswimm6d[4:0] : 5'h0; // @[Mux.scala 27:72]
wire [4:0] _T_1395 = _T_807 ? uswspimm7d[4:0] : 5'h0; // @[Mux.scala 27:72]
wire [4:0] _T_1396 = _T_1393 | _T_1394; // @[Mux.scala 27:72]
wire [4:0] _T_1397 = _T_1396 | _T_1395; // @[Mux.scala 27:72]
wire [4:0] l3_11 = l2[11:7] | _T_1397; // @[el2_ifu_compress_ctl.scala 174:24]
wire [11:0] _T_1400 = {l3_11,l2[6:0]}; // @[Cat.scala 29:58]
wire [19:0] _T_1401 = {l3_31,l3_24}; // @[Cat.scala 29:58]
wire [31:0] l3 = {l3_31,l3_24,l3_11,l2[6:0]}; // @[Cat.scala 29:58]
wire _T_1407 = _T_4 & _T_487; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1408 = _T_1407 & io_din[11]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1409 = _T_1408 & io_din[1]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1412 = _T_1409 & _T_147; // @[el2_ifu_compress_ctl.scala 178:39]
wire _T_1420 = _T_1407 & io_din[6]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1421 = _T_1420 & io_din[1]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1424 = _T_1421 & _T_147; // @[el2_ifu_compress_ctl.scala 178:79]
wire _T_1425 = _T_1412 | _T_1424; // @[el2_ifu_compress_ctl.scala 178:54]
wire _T_1434 = _T_642 & io_din[11]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1435 = _T_1434 & _T_830; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1436 = _T_1425 | _T_1435; // @[el2_ifu_compress_ctl.scala 178:94]
wire _T_1444 = _T_1407 & io_din[5]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1445 = _T_1444 & io_din[1]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1448 = _T_1445 & _T_147; // @[el2_ifu_compress_ctl.scala 179:55]
wire _T_1449 = _T_1436 | _T_1448; // @[el2_ifu_compress_ctl.scala 179:30]
wire _T_1457 = _T_1407 & io_din[10]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1458 = _T_1457 & io_din[1]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1461 = _T_1458 & _T_147; // @[el2_ifu_compress_ctl.scala 179:96]
wire _T_1462 = _T_1449 | _T_1461; // @[el2_ifu_compress_ctl.scala 179:70]
wire _T_1471 = _T_642 & io_din[6]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1472 = _T_1471 & _T_830; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1473 = _T_1462 | _T_1472; // @[el2_ifu_compress_ctl.scala 179:111]
wire _T_1480 = io_din[15] & _T_487; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1481 = _T_1480 & _T_830; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1482 = _T_1481 & io_din[0]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1483 = _T_1473 | _T_1482; // @[el2_ifu_compress_ctl.scala 180:29]
wire _T_1491 = _T_1407 & io_din[9]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1492 = _T_1491 & io_din[1]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1495 = _T_1492 & _T_147; // @[el2_ifu_compress_ctl.scala 180:79]
wire _T_1496 = _T_1483 | _T_1495; // @[el2_ifu_compress_ctl.scala 180:54]
wire _T_1503 = _T_487 & io_din[6]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1504 = _T_1503 & _T_830; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1505 = _T_1504 & io_din[0]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1506 = _T_1496 | _T_1505; // @[el2_ifu_compress_ctl.scala 180:94]
wire _T_1515 = _T_642 & io_din[5]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1516 = _T_1515 & _T_830; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1517 = _T_1506 | _T_1516; // @[el2_ifu_compress_ctl.scala 180:118]
wire _T_1525 = _T_1407 & io_din[8]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1526 = _T_1525 & io_din[1]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1529 = _T_1526 & _T_147; // @[el2_ifu_compress_ctl.scala 181:28]
wire _T_1530 = _T_1517 | _T_1529; // @[el2_ifu_compress_ctl.scala 180:144]
wire _T_1537 = _T_487 & io_din[5]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1538 = _T_1537 & _T_830; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1539 = _T_1538 & io_din[0]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1540 = _T_1530 | _T_1539; // @[el2_ifu_compress_ctl.scala 181:43]
wire _T_1549 = _T_642 & io_din[10]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1550 = _T_1549 & _T_830; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1551 = _T_1540 | _T_1550; // @[el2_ifu_compress_ctl.scala 181:67]
wire _T_1559 = _T_1407 & io_din[7]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1560 = _T_1559 & io_din[1]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1563 = _T_1560 & _T_147; // @[el2_ifu_compress_ctl.scala 182:28]
wire _T_1564 = _T_1551 | _T_1563; // @[el2_ifu_compress_ctl.scala 181:94]
wire _T_1572 = io_din[12] & io_din[11]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1573 = _T_1572 & _T_38; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1574 = _T_1573 & _T_830; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1575 = _T_1574 & io_din[0]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1576 = _T_1564 | _T_1575; // @[el2_ifu_compress_ctl.scala 182:43]
wire _T_1585 = _T_642 & io_din[9]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1586 = _T_1585 & _T_830; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1587 = _T_1576 | _T_1586; // @[el2_ifu_compress_ctl.scala 182:71]
wire _T_1595 = _T_1407 & io_din[4]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1596 = _T_1595 & io_din[1]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1599 = _T_1596 & _T_147; // @[el2_ifu_compress_ctl.scala 183:28]
wire _T_1600 = _T_1587 | _T_1599; // @[el2_ifu_compress_ctl.scala 182:97]
wire _T_1606 = io_din[13] & io_din[12]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1607 = _T_1606 & _T_830; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1608 = _T_1607 & io_din[0]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1609 = _T_1600 | _T_1608; // @[el2_ifu_compress_ctl.scala 183:43]
wire _T_1618 = _T_642 & io_din[8]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1619 = _T_1618 & _T_830; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1620 = _T_1609 | _T_1619; // @[el2_ifu_compress_ctl.scala 183:67]
wire _T_1628 = _T_1407 & io_din[3]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1629 = _T_1628 & io_din[1]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1632 = _T_1629 & _T_147; // @[el2_ifu_compress_ctl.scala 184:28]
wire _T_1633 = _T_1620 | _T_1632; // @[el2_ifu_compress_ctl.scala 183:93]
wire _T_1639 = io_din[13] & io_din[4]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1640 = _T_1639 & _T_830; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1641 = _T_1640 & io_din[0]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1642 = _T_1633 | _T_1641; // @[el2_ifu_compress_ctl.scala 184:43]
wire _T_1650 = _T_1407 & io_din[2]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1651 = _T_1650 & io_din[1]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1654 = _T_1651 & _T_147; // @[el2_ifu_compress_ctl.scala 184:91]
wire _T_1655 = _T_1642 | _T_1654; // @[el2_ifu_compress_ctl.scala 184:66]
wire _T_1664 = _T_642 & io_din[7]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1665 = _T_1664 & _T_830; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1666 = _T_1655 | _T_1665; // @[el2_ifu_compress_ctl.scala 184:106]
wire _T_1672 = io_din[13] & io_din[3]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1673 = _T_1672 & _T_830; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1674 = _T_1673 & io_din[0]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1675 = _T_1666 | _T_1674; // @[el2_ifu_compress_ctl.scala 185:29]
wire _T_1681 = io_din[13] & io_din[2]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1682 = _T_1681 & _T_830; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1683 = _T_1682 & io_din[0]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1684 = _T_1675 | _T_1683; // @[el2_ifu_compress_ctl.scala 185:52]
wire _T_1690 = io_din[14] & _T_4; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1691 = _T_1690 & _T_830; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1692 = _T_1684 | _T_1691; // @[el2_ifu_compress_ctl.scala 185:75]
wire _T_1701 = _T_703 & _T_830; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1702 = _T_1701 & io_din[0]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1703 = _T_1692 | _T_1702; // @[el2_ifu_compress_ctl.scala 185:98]
wire _T_1710 = _T_820 & io_din[12]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1711 = _T_1710 & io_din[1]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1714 = _T_1711 & _T_147; // @[el2_ifu_compress_ctl.scala 186:54]
wire _T_1715 = _T_1703 | _T_1714; // @[el2_ifu_compress_ctl.scala 186:29]
wire _T_1724 = _T_642 & _T_487; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1725 = _T_1724 & io_din[1]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1728 = _T_1725 & _T_147; // @[el2_ifu_compress_ctl.scala 186:96]
wire _T_1729 = _T_1715 | _T_1728; // @[el2_ifu_compress_ctl.scala 186:69]
wire _T_1738 = _T_642 & io_din[12]; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1739 = _T_1738 & _T_830; // @[el2_ifu_compress_ctl.scala 28:110]
wire _T_1740 = _T_1729 | _T_1739; // @[el2_ifu_compress_ctl.scala 186:111]
wire _T_1747 = _T_1690 & _T_147; // @[el2_ifu_compress_ctl.scala 187:50]
wire legal = _T_1740 | _T_1747; // @[el2_ifu_compress_ctl.scala 187:30]
wire [31:0] _T_1749 = legal ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12]
wire [9:0] _T_1759 = {1'h0,out_30,1'h0,1'h0,1'h0,1'h0,1'h0,1'h0,1'h0,1'h0}; // @[Cat.scala 29:58]
wire [18:0] _T_1768 = {_T_1759,1'h0,out_20,1'h0,1'h0,1'h0,1'h0,1'h0,out_14,out_13}; // @[Cat.scala 29:58]
wire [27:0] _T_1777 = {_T_1768,out_12,1'h0,1'h0,1'h0,1'h0,1'h0,out_6,out_5,out_4}; // @[Cat.scala 29:58]
wire [30:0] _T_1780 = {_T_1777,_T_228,out_2,1'h1}; // @[Cat.scala 29:58]
assign io_dout = l3 & _T_1749; // @[el2_ifu_compress_ctl.scala 189:10]
assign io_l1 = {_T_1234,_T_1232}; // @[el2_ifu_compress_ctl.scala 190:9]
assign io_l2 = l2[31:0]; // @[el2_ifu_compress_ctl.scala 191:9]
assign io_l3 = {_T_1400,_T_1399}; // @[el2_ifu_compress_ctl.scala 192:9]
assign io_legal = _T_1740 | _T_1747; // @[el2_ifu_compress_ctl.scala 193:12]
assign io_o = {_T_1780,1'h1}; // @[el2_ifu_compress_ctl.scala 194:8]
assign io_sluimmd = {_T_1281,rs2d}; // @[el2_ifu_compress_ctl.scala 149:14]
assign io_uimm5d = {io_din[12],rs2d}; // @[el2_ifu_compress_ctl.scala 204:13]
assign io_ulwspimm7d = {_T_1258,io_din[6:4]}; // @[el2_ifu_compress_ctl.scala 205:17]
assign io_ulwimm6d = {_T_1254,io_din[6]}; // @[el2_ifu_compress_ctl.scala 206:15]
assign io_simm9d = {_T_1250,_T_1248}; // @[el2_ifu_compress_ctl.scala 207:13]
assign io_uimm9d = {_T_1242,_T_1241}; // @[el2_ifu_compress_ctl.scala 208:13]
assign io_simm5d = {io_din[12],rs2d}; // @[el2_ifu_compress_ctl.scala 209:13]
assign io_sjald = {sjald_12,sjald_1}; // @[el2_ifu_compress_ctl.scala 203:12]
wire _T_1408 = _T_4 & _T_487; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1409 = _T_1408 & io_din[11]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1410 = _T_1409 & io_din[1]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1413 = _T_1410 & _T_147; // @[el2_ifu_compress_ctl.scala 179:39]
wire _T_1421 = _T_1408 & io_din[6]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1422 = _T_1421 & io_din[1]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1425 = _T_1422 & _T_147; // @[el2_ifu_compress_ctl.scala 179:79]
wire _T_1426 = _T_1413 | _T_1425; // @[el2_ifu_compress_ctl.scala 179:54]
wire _T_1435 = _T_642 & io_din[11]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1436 = _T_1435 & _T_830; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1437 = _T_1426 | _T_1436; // @[el2_ifu_compress_ctl.scala 179:94]
wire _T_1445 = _T_1408 & io_din[5]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1446 = _T_1445 & io_din[1]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1449 = _T_1446 & _T_147; // @[el2_ifu_compress_ctl.scala 180:55]
wire _T_1450 = _T_1437 | _T_1449; // @[el2_ifu_compress_ctl.scala 180:30]
wire _T_1458 = _T_1408 & io_din[10]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1459 = _T_1458 & io_din[1]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1462 = _T_1459 & _T_147; // @[el2_ifu_compress_ctl.scala 180:96]
wire _T_1463 = _T_1450 | _T_1462; // @[el2_ifu_compress_ctl.scala 180:70]
wire _T_1472 = _T_642 & io_din[6]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1473 = _T_1472 & _T_830; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1474 = _T_1463 | _T_1473; // @[el2_ifu_compress_ctl.scala 180:111]
wire _T_1481 = io_din[15] & _T_487; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1482 = _T_1481 & _T_830; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1483 = _T_1482 & io_din[0]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1484 = _T_1474 | _T_1483; // @[el2_ifu_compress_ctl.scala 181:29]
wire _T_1492 = _T_1408 & io_din[9]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1493 = _T_1492 & io_din[1]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1496 = _T_1493 & _T_147; // @[el2_ifu_compress_ctl.scala 181:79]
wire _T_1497 = _T_1484 | _T_1496; // @[el2_ifu_compress_ctl.scala 181:54]
wire _T_1504 = _T_487 & io_din[6]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1505 = _T_1504 & _T_830; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1506 = _T_1505 & io_din[0]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1507 = _T_1497 | _T_1506; // @[el2_ifu_compress_ctl.scala 181:94]
wire _T_1516 = _T_642 & io_din[5]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1517 = _T_1516 & _T_830; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1518 = _T_1507 | _T_1517; // @[el2_ifu_compress_ctl.scala 181:118]
wire _T_1526 = _T_1408 & io_din[8]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1527 = _T_1526 & io_din[1]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1530 = _T_1527 & _T_147; // @[el2_ifu_compress_ctl.scala 182:28]
wire _T_1531 = _T_1518 | _T_1530; // @[el2_ifu_compress_ctl.scala 181:144]
wire _T_1538 = _T_487 & io_din[5]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1539 = _T_1538 & _T_830; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1540 = _T_1539 & io_din[0]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1541 = _T_1531 | _T_1540; // @[el2_ifu_compress_ctl.scala 182:43]
wire _T_1550 = _T_642 & io_din[10]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1551 = _T_1550 & _T_830; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1552 = _T_1541 | _T_1551; // @[el2_ifu_compress_ctl.scala 182:67]
wire _T_1560 = _T_1408 & io_din[7]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1561 = _T_1560 & io_din[1]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1564 = _T_1561 & _T_147; // @[el2_ifu_compress_ctl.scala 183:28]
wire _T_1565 = _T_1552 | _T_1564; // @[el2_ifu_compress_ctl.scala 182:94]
wire _T_1573 = io_din[12] & io_din[11]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1574 = _T_1573 & _T_38; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1575 = _T_1574 & _T_830; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1576 = _T_1575 & io_din[0]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1577 = _T_1565 | _T_1576; // @[el2_ifu_compress_ctl.scala 183:43]
wire _T_1586 = _T_642 & io_din[9]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1587 = _T_1586 & _T_830; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1588 = _T_1577 | _T_1587; // @[el2_ifu_compress_ctl.scala 183:71]
wire _T_1596 = _T_1408 & io_din[4]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1597 = _T_1596 & io_din[1]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1600 = _T_1597 & _T_147; // @[el2_ifu_compress_ctl.scala 184:28]
wire _T_1601 = _T_1588 | _T_1600; // @[el2_ifu_compress_ctl.scala 183:97]
wire _T_1607 = io_din[13] & io_din[12]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1608 = _T_1607 & _T_830; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1609 = _T_1608 & io_din[0]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1610 = _T_1601 | _T_1609; // @[el2_ifu_compress_ctl.scala 184:43]
wire _T_1619 = _T_642 & io_din[8]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1620 = _T_1619 & _T_830; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1621 = _T_1610 | _T_1620; // @[el2_ifu_compress_ctl.scala 184:67]
wire _T_1629 = _T_1408 & io_din[3]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1630 = _T_1629 & io_din[1]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1633 = _T_1630 & _T_147; // @[el2_ifu_compress_ctl.scala 185:28]
wire _T_1634 = _T_1621 | _T_1633; // @[el2_ifu_compress_ctl.scala 184:93]
wire _T_1640 = io_din[13] & io_din[4]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1641 = _T_1640 & _T_830; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1642 = _T_1641 & io_din[0]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1643 = _T_1634 | _T_1642; // @[el2_ifu_compress_ctl.scala 185:43]
wire _T_1651 = _T_1408 & io_din[2]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1652 = _T_1651 & io_din[1]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1655 = _T_1652 & _T_147; // @[el2_ifu_compress_ctl.scala 185:91]
wire _T_1656 = _T_1643 | _T_1655; // @[el2_ifu_compress_ctl.scala 185:66]
wire _T_1665 = _T_642 & io_din[7]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1666 = _T_1665 & _T_830; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1667 = _T_1656 | _T_1666; // @[el2_ifu_compress_ctl.scala 185:106]
wire _T_1673 = io_din[13] & io_din[3]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1674 = _T_1673 & _T_830; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1675 = _T_1674 & io_din[0]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1676 = _T_1667 | _T_1675; // @[el2_ifu_compress_ctl.scala 186:29]
wire _T_1682 = io_din[13] & io_din[2]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1683 = _T_1682 & _T_830; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1684 = _T_1683 & io_din[0]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1685 = _T_1676 | _T_1684; // @[el2_ifu_compress_ctl.scala 186:52]
wire _T_1691 = io_din[14] & _T_4; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1692 = _T_1691 & _T_830; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1693 = _T_1685 | _T_1692; // @[el2_ifu_compress_ctl.scala 186:75]
wire _T_1702 = _T_703 & _T_830; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1703 = _T_1702 & io_din[0]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1704 = _T_1693 | _T_1703; // @[el2_ifu_compress_ctl.scala 186:98]
wire _T_1711 = _T_820 & io_din[12]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1712 = _T_1711 & io_din[1]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1715 = _T_1712 & _T_147; // @[el2_ifu_compress_ctl.scala 187:54]
wire _T_1716 = _T_1704 | _T_1715; // @[el2_ifu_compress_ctl.scala 187:29]
wire _T_1725 = _T_642 & _T_487; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1726 = _T_1725 & io_din[1]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1729 = _T_1726 & _T_147; // @[el2_ifu_compress_ctl.scala 187:96]
wire _T_1730 = _T_1716 | _T_1729; // @[el2_ifu_compress_ctl.scala 187:69]
wire _T_1739 = _T_642 & io_din[12]; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1740 = _T_1739 & _T_830; // @[el2_ifu_compress_ctl.scala 29:110]
wire _T_1741 = _T_1730 | _T_1740; // @[el2_ifu_compress_ctl.scala 187:111]
wire _T_1748 = _T_1691 & _T_147; // @[el2_ifu_compress_ctl.scala 188:50]
wire legal = _T_1741 | _T_1748; // @[el2_ifu_compress_ctl.scala 188:30]
wire [31:0] _T_1750 = legal ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12]
wire [9:0] _T_1760 = {1'h0,out_30,1'h0,1'h0,1'h0,1'h0,1'h0,1'h0,1'h0,1'h0}; // @[Cat.scala 29:58]
wire [18:0] _T_1769 = {_T_1760,1'h0,out_20,1'h0,1'h0,1'h0,1'h0,1'h0,out_14,out_13}; // @[Cat.scala 29:58]
wire [27:0] _T_1778 = {_T_1769,out_12,1'h0,1'h0,1'h0,1'h0,1'h0,out_6,out_5,out_4}; // @[Cat.scala 29:58]
wire [30:0] _T_1781 = {_T_1778,_T_228,out_2,1'h1}; // @[Cat.scala 29:58]
assign io_dout = l3 & _T_1750; // @[el2_ifu_compress_ctl.scala 190:10]
assign io_l1 = {_T_1234,_T_1232}; // @[el2_ifu_compress_ctl.scala 191:9]
assign io_l2 = l2[31:0]; // @[el2_ifu_compress_ctl.scala 192:9]
assign io_l3 = {_T_1401,_T_1400}; // @[el2_ifu_compress_ctl.scala 193:9]
assign io_legal = _T_1741 | _T_1748; // @[el2_ifu_compress_ctl.scala 194:12]
assign io_o = {_T_1781,1'h1}; // @[el2_ifu_compress_ctl.scala 195:8]
assign io_sluimmd = {_T_1281,rs2d}; // @[el2_ifu_compress_ctl.scala 150:14]
assign io_uimm5d = {io_din[12],rs2d}; // @[el2_ifu_compress_ctl.scala 205:13]
assign io_ulwspimm7d = {_T_1258,io_din[6:4]}; // @[el2_ifu_compress_ctl.scala 206:17]
assign io_ulwimm6d = {_T_1254,io_din[6]}; // @[el2_ifu_compress_ctl.scala 207:15]
assign io_simm9d = {_T_1250,_T_1248}; // @[el2_ifu_compress_ctl.scala 208:13]
assign io_uimm9d = {_T_1242,_T_1241}; // @[el2_ifu_compress_ctl.scala 209:13]
assign io_simm5d = {io_din[12],rs2d}; // @[el2_ifu_compress_ctl.scala 210:13]
assign io_sjald = {sjald_12,sjald_1}; // @[el2_ifu_compress_ctl.scala 204:12]
assign io_l2_31 = l1[31:20] | _T_1328; // @[el2_ifu_compress_ctl.scala 152:12]
endmodule

311
el2_ifu_ifc_ctrl.fir
View File

@ -86,166 +86,167 @@ circuit el2_ifu_ifc_ctrl :
_T_27 <= _T_26 @[Mux.scala 27:72]
io.ifc_fetch_addr_bf <= _T_27 @[el2_ifu_ifc_ctrl.scala 81:24]
line_wrap <= UInt<1>("h00") @[el2_ifu_ifc_ctrl.scala 88:13]
node _T_28 = bits(io.ifc_fetch_addr_f, 30, 1) @[el2_ifu_ifc_ctrl.scala 90:42]
node _T_29 = add(_T_28, UInt<1>("h01")) @[el2_ifu_ifc_ctrl.scala 90:48]
node _T_30 = tail(_T_29, 1) @[el2_ifu_ifc_ctrl.scala 90:48]
fetch_addr_next <= _T_30 @[el2_ifu_ifc_ctrl.scala 90:19]
node _T_31 = not(idle) @[el2_ifu_ifc_ctrl.scala 93:30]
io.ifc_fetch_req_bf_raw <= _T_31 @[el2_ifu_ifc_ctrl.scala 93:27]
node _T_32 = or(io.ifu_fb_consume2, io.ifu_fb_consume1) @[el2_ifu_ifc_ctrl.scala 95:91]
node _T_33 = not(_T_32) @[el2_ifu_ifc_ctrl.scala 95:70]
node _T_34 = and(fb_full_f_ns, _T_33) @[el2_ifu_ifc_ctrl.scala 95:68]
node _T_35 = not(_T_34) @[el2_ifu_ifc_ctrl.scala 95:53]
node _T_36 = and(io.ifc_fetch_req_bf_raw, _T_35) @[el2_ifu_ifc_ctrl.scala 95:51]
node _T_37 = not(dma_stall) @[el2_ifu_ifc_ctrl.scala 96:5]
node _T_38 = and(_T_36, _T_37) @[el2_ifu_ifc_ctrl.scala 95:114]
node _T_39 = not(io.ic_write_stall) @[el2_ifu_ifc_ctrl.scala 96:18]
node _T_40 = and(_T_38, _T_39) @[el2_ifu_ifc_ctrl.scala 96:16]
node _T_41 = not(io.dec_tlu_flush_noredir_wb) @[el2_ifu_ifc_ctrl.scala 96:39]
node _T_42 = and(_T_40, _T_41) @[el2_ifu_ifc_ctrl.scala 96:37]
io.ifc_fetch_req_bf <= _T_42 @[el2_ifu_ifc_ctrl.scala 95:23]
node _T_43 = or(io.exu_flush_final, io.ifc_fetch_req_f) @[el2_ifu_ifc_ctrl.scala 98:37]
fetch_bf_en <= _T_43 @[el2_ifu_ifc_ctrl.scala 98:15]
node _T_44 = not(io.ic_hit_f) @[el2_ifu_ifc_ctrl.scala 100:34]
node _T_45 = and(io.ifc_fetch_req_f, _T_44) @[el2_ifu_ifc_ctrl.scala 100:32]
node _T_46 = not(io.exu_flush_final) @[el2_ifu_ifc_ctrl.scala 100:49]
node _T_47 = and(_T_45, _T_46) @[el2_ifu_ifc_ctrl.scala 100:47]
miss_f <= _T_47 @[el2_ifu_ifc_ctrl.scala 100:10]
node _T_48 = or(io.ifu_ic_mb_empty, io.exu_flush_final) @[el2_ifu_ifc_ctrl.scala 102:39]
node _T_49 = not(dma_stall) @[el2_ifu_ifc_ctrl.scala 102:63]
node _T_50 = and(_T_48, _T_49) @[el2_ifu_ifc_ctrl.scala 102:61]
node _T_51 = not(miss_f) @[el2_ifu_ifc_ctrl.scala 102:76]
node _T_52 = and(_T_50, _T_51) @[el2_ifu_ifc_ctrl.scala 102:74]
node _T_53 = not(miss_a) @[el2_ifu_ifc_ctrl.scala 102:86]
node _T_54 = and(_T_52, _T_53) @[el2_ifu_ifc_ctrl.scala 102:84]
mb_empty_mod <= _T_54 @[el2_ifu_ifc_ctrl.scala 102:16]
node _T_55 = and(io.exu_flush_final, io.dec_tlu_flush_noredir_wb) @[el2_ifu_ifc_ctrl.scala 104:35]
goto_idle <= _T_55 @[el2_ifu_ifc_ctrl.scala 104:13]
node _T_56 = not(io.dec_tlu_flush_noredir_wb) @[el2_ifu_ifc_ctrl.scala 106:38]
node _T_57 = and(io.exu_flush_final, _T_56) @[el2_ifu_ifc_ctrl.scala 106:36]
node _T_58 = and(_T_57, idle) @[el2_ifu_ifc_ctrl.scala 106:67]
leave_idle <= _T_58 @[el2_ifu_ifc_ctrl.scala 106:14]
node _T_59 = bits(state, 1, 1) @[el2_ifu_ifc_ctrl.scala 108:29]
node _T_60 = not(_T_59) @[el2_ifu_ifc_ctrl.scala 108:23]
node _T_61 = bits(state, 0, 0) @[el2_ifu_ifc_ctrl.scala 108:40]
node _T_62 = and(_T_60, _T_61) @[el2_ifu_ifc_ctrl.scala 108:33]
node _T_63 = and(_T_62, miss_f) @[el2_ifu_ifc_ctrl.scala 108:44]
node _T_64 = not(goto_idle) @[el2_ifu_ifc_ctrl.scala 108:55]
node _T_65 = and(_T_63, _T_64) @[el2_ifu_ifc_ctrl.scala 108:53]
node _T_66 = bits(state, 1, 1) @[el2_ifu_ifc_ctrl.scala 109:11]
node _T_67 = not(mb_empty_mod) @[el2_ifu_ifc_ctrl.scala 109:17]
node _T_68 = and(_T_66, _T_67) @[el2_ifu_ifc_ctrl.scala 109:15]
node _T_69 = not(goto_idle) @[el2_ifu_ifc_ctrl.scala 109:33]
node _T_70 = and(_T_68, _T_69) @[el2_ifu_ifc_ctrl.scala 109:31]
node next_state_1 = or(_T_65, _T_70) @[el2_ifu_ifc_ctrl.scala 108:67]
node _T_71 = not(goto_idle) @[el2_ifu_ifc_ctrl.scala 111:23]
node _T_72 = and(_T_71, leave_idle) @[el2_ifu_ifc_ctrl.scala 111:34]
node _T_73 = bits(state, 0, 0) @[el2_ifu_ifc_ctrl.scala 111:56]
node _T_74 = not(goto_idle) @[el2_ifu_ifc_ctrl.scala 111:62]
node _T_75 = and(_T_73, _T_74) @[el2_ifu_ifc_ctrl.scala 111:60]
node next_state_0 = or(_T_72, _T_75) @[el2_ifu_ifc_ctrl.scala 111:48]
node _T_76 = cat(next_state_0, next_state_0) @[Cat.scala 29:58]
reg _T_77 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_ifc_ctrl.scala 113:19]
_T_77 <= _T_76 @[el2_ifu_ifc_ctrl.scala 113:19]
state <= _T_77 @[el2_ifu_ifc_ctrl.scala 113:9]
node _T_28 = bits(io.ifc_fetch_addr_f, 30, 1) @[el2_ifu_ifc_ctrl.scala 90:45]
node _T_29 = add(_T_28, UInt<1>("h01")) @[el2_ifu_ifc_ctrl.scala 90:51]
node _T_30 = tail(_T_29, 1) @[el2_ifu_ifc_ctrl.scala 90:51]
node _T_31 = cat(_T_30, UInt<1>("h00")) @[Cat.scala 29:58]
fetch_addr_next <= _T_31 @[el2_ifu_ifc_ctrl.scala 90:19]
node _T_32 = not(idle) @[el2_ifu_ifc_ctrl.scala 93:30]
io.ifc_fetch_req_bf_raw <= _T_32 @[el2_ifu_ifc_ctrl.scala 93:27]
node _T_33 = or(io.ifu_fb_consume2, io.ifu_fb_consume1) @[el2_ifu_ifc_ctrl.scala 95:91]
node _T_34 = not(_T_33) @[el2_ifu_ifc_ctrl.scala 95:70]
node _T_35 = and(fb_full_f_ns, _T_34) @[el2_ifu_ifc_ctrl.scala 95:68]
node _T_36 = not(_T_35) @[el2_ifu_ifc_ctrl.scala 95:53]
node _T_37 = and(io.ifc_fetch_req_bf_raw, _T_36) @[el2_ifu_ifc_ctrl.scala 95:51]
node _T_38 = not(dma_stall) @[el2_ifu_ifc_ctrl.scala 96:5]
node _T_39 = and(_T_37, _T_38) @[el2_ifu_ifc_ctrl.scala 95:114]
node _T_40 = not(io.ic_write_stall) @[el2_ifu_ifc_ctrl.scala 96:18]
node _T_41 = and(_T_39, _T_40) @[el2_ifu_ifc_ctrl.scala 96:16]
node _T_42 = not(io.dec_tlu_flush_noredir_wb) @[el2_ifu_ifc_ctrl.scala 96:39]
node _T_43 = and(_T_41, _T_42) @[el2_ifu_ifc_ctrl.scala 96:37]
io.ifc_fetch_req_bf <= _T_43 @[el2_ifu_ifc_ctrl.scala 95:23]
node _T_44 = or(io.exu_flush_final, io.ifc_fetch_req_f) @[el2_ifu_ifc_ctrl.scala 98:37]
fetch_bf_en <= _T_44 @[el2_ifu_ifc_ctrl.scala 98:15]
node _T_45 = not(io.ic_hit_f) @[el2_ifu_ifc_ctrl.scala 100:34]
node _T_46 = and(io.ifc_fetch_req_f, _T_45) @[el2_ifu_ifc_ctrl.scala 100:32]
node _T_47 = not(io.exu_flush_final) @[el2_ifu_ifc_ctrl.scala 100:49]
node _T_48 = and(_T_46, _T_47) @[el2_ifu_ifc_ctrl.scala 100:47]
miss_f <= _T_48 @[el2_ifu_ifc_ctrl.scala 100:10]
node _T_49 = or(io.ifu_ic_mb_empty, io.exu_flush_final) @[el2_ifu_ifc_ctrl.scala 102:39]
node _T_50 = not(dma_stall) @[el2_ifu_ifc_ctrl.scala 102:63]
node _T_51 = and(_T_49, _T_50) @[el2_ifu_ifc_ctrl.scala 102:61]
node _T_52 = not(miss_f) @[el2_ifu_ifc_ctrl.scala 102:76]
node _T_53 = and(_T_51, _T_52) @[el2_ifu_ifc_ctrl.scala 102:74]
node _T_54 = not(miss_a) @[el2_ifu_ifc_ctrl.scala 102:86]
node _T_55 = and(_T_53, _T_54) @[el2_ifu_ifc_ctrl.scala 102:84]
mb_empty_mod <= _T_55 @[el2_ifu_ifc_ctrl.scala 102:16]
node _T_56 = and(io.exu_flush_final, io.dec_tlu_flush_noredir_wb) @[el2_ifu_ifc_ctrl.scala 104:35]
goto_idle <= _T_56 @[el2_ifu_ifc_ctrl.scala 104:13]
node _T_57 = not(io.dec_tlu_flush_noredir_wb) @[el2_ifu_ifc_ctrl.scala 106:38]
node _T_58 = and(io.exu_flush_final, _T_57) @[el2_ifu_ifc_ctrl.scala 106:36]
node _T_59 = and(_T_58, idle) @[el2_ifu_ifc_ctrl.scala 106:67]
leave_idle <= _T_59 @[el2_ifu_ifc_ctrl.scala 106:14]
node _T_60 = bits(state, 1, 1) @[el2_ifu_ifc_ctrl.scala 108:29]
node _T_61 = not(_T_60) @[el2_ifu_ifc_ctrl.scala 108:23]
node _T_62 = bits(state, 0, 0) @[el2_ifu_ifc_ctrl.scala 108:40]
node _T_63 = and(_T_61, _T_62) @[el2_ifu_ifc_ctrl.scala 108:33]
node _T_64 = and(_T_63, miss_f) @[el2_ifu_ifc_ctrl.scala 108:44]
node _T_65 = not(goto_idle) @[el2_ifu_ifc_ctrl.scala 108:55]
node _T_66 = and(_T_64, _T_65) @[el2_ifu_ifc_ctrl.scala 108:53]
node _T_67 = bits(state, 1, 1) @[el2_ifu_ifc_ctrl.scala 109:11]
node _T_68 = not(mb_empty_mod) @[el2_ifu_ifc_ctrl.scala 109:17]
node _T_69 = and(_T_67, _T_68) @[el2_ifu_ifc_ctrl.scala 109:15]
node _T_70 = not(goto_idle) @[el2_ifu_ifc_ctrl.scala 109:33]
node _T_71 = and(_T_69, _T_70) @[el2_ifu_ifc_ctrl.scala 109:31]
node next_state_1 = or(_T_66, _T_71) @[el2_ifu_ifc_ctrl.scala 108:67]
node _T_72 = not(goto_idle) @[el2_ifu_ifc_ctrl.scala 111:23]
node _T_73 = and(_T_72, leave_idle) @[el2_ifu_ifc_ctrl.scala 111:34]
node _T_74 = bits(state, 0, 0) @[el2_ifu_ifc_ctrl.scala 111:56]
node _T_75 = not(goto_idle) @[el2_ifu_ifc_ctrl.scala 111:62]
node _T_76 = and(_T_74, _T_75) @[el2_ifu_ifc_ctrl.scala 111:60]
node next_state_0 = or(_T_73, _T_76) @[el2_ifu_ifc_ctrl.scala 111:48]
node _T_77 = cat(next_state_0, next_state_0) @[Cat.scala 29:58]
reg _T_78 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_ifc_ctrl.scala 113:19]
_T_78 <= _T_77 @[el2_ifu_ifc_ctrl.scala 113:19]
state <= _T_78 @[el2_ifu_ifc_ctrl.scala 113:9]
flush_fb <= io.exu_flush_final @[el2_ifu_ifc_ctrl.scala 118:12]
node _T_78 = not(io.ifu_fb_consume2) @[el2_ifu_ifc_ctrl.scala 120:38]
node _T_79 = and(io.ifu_fb_consume1, _T_78) @[el2_ifu_ifc_ctrl.scala 120:36]
node _T_80 = not(io.ifc_fetch_req_f) @[el2_ifu_ifc_ctrl.scala 120:61]
node _T_81 = or(_T_80, miss_f) @[el2_ifu_ifc_ctrl.scala 120:81]
node _T_82 = and(_T_79, _T_81) @[el2_ifu_ifc_ctrl.scala 120:58]
node _T_83 = and(io.ifu_fb_consume2, io.ifc_fetch_req_f) @[el2_ifu_ifc_ctrl.scala 121:25]
node _T_84 = or(_T_82, _T_83) @[el2_ifu_ifc_ctrl.scala 120:92]
fb_right <= _T_84 @[el2_ifu_ifc_ctrl.scala 120:12]
node _T_85 = not(io.ifc_fetch_req_f) @[el2_ifu_ifc_ctrl.scala 123:39]
node _T_86 = or(_T_85, miss_f) @[el2_ifu_ifc_ctrl.scala 123:59]
node _T_87 = and(io.ifu_fb_consume2, _T_86) @[el2_ifu_ifc_ctrl.scala 123:36]
fb_right2 <= _T_87 @[el2_ifu_ifc_ctrl.scala 123:13]
node _T_88 = or(io.ifu_fb_consume1, io.ifu_fb_consume2) @[el2_ifu_ifc_ctrl.scala 124:56]
node _T_89 = not(_T_88) @[el2_ifu_ifc_ctrl.scala 124:35]
node _T_90 = and(io.ifc_fetch_req_f, _T_89) @[el2_ifu_ifc_ctrl.scala 124:33]
node _T_91 = not(miss_f) @[el2_ifu_ifc_ctrl.scala 124:80]
node _T_92 = and(_T_90, _T_91) @[el2_ifu_ifc_ctrl.scala 124:78]
fb_left <= _T_92 @[el2_ifu_ifc_ctrl.scala 124:11]
node _T_93 = bits(flush_fb, 0, 0) @[el2_ifu_ifc_ctrl.scala 126:37]
node _T_94 = not(flush_fb) @[el2_ifu_ifc_ctrl.scala 127:6]
node _T_95 = and(_T_94, fb_right) @[el2_ifu_ifc_ctrl.scala 127:16]
node _T_96 = bits(_T_95, 0, 0) @[el2_ifu_ifc_ctrl.scala 127:28]
node _T_97 = bits(fb_write_f, 3, 1) @[el2_ifu_ifc_ctrl.scala 127:62]
node _T_98 = cat(UInt<1>("h00"), _T_97) @[Cat.scala 29:58]
node _T_99 = not(flush_fb) @[el2_ifu_ifc_ctrl.scala 128:6]
node _T_100 = and(_T_99, fb_right2) @[el2_ifu_ifc_ctrl.scala 128:16]
node _T_101 = bits(_T_100, 0, 0) @[el2_ifu_ifc_ctrl.scala 128:29]
node _T_102 = bits(fb_write_f, 3, 2) @[el2_ifu_ifc_ctrl.scala 128:63]
node _T_103 = cat(UInt<2>("h00"), _T_102) @[Cat.scala 29:58]
node _T_104 = not(flush_fb) @[el2_ifu_ifc_ctrl.scala 129:6]
node _T_105 = and(_T_104, fb_left) @[el2_ifu_ifc_ctrl.scala 129:16]
node _T_106 = bits(_T_105, 0, 0) @[el2_ifu_ifc_ctrl.scala 129:27]
node _T_107 = bits(fb_write_f, 2, 0) @[el2_ifu_ifc_ctrl.scala 129:51]
node _T_108 = cat(_T_107, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_109 = not(flush_fb) @[el2_ifu_ifc_ctrl.scala 130:6]
node _T_110 = not(fb_right) @[el2_ifu_ifc_ctrl.scala 130:18]
node _T_111 = and(_T_109, _T_110) @[el2_ifu_ifc_ctrl.scala 130:16]
node _T_112 = not(fb_right2) @[el2_ifu_ifc_ctrl.scala 130:30]
node _T_113 = and(_T_111, _T_112) @[el2_ifu_ifc_ctrl.scala 130:28]
node _T_114 = not(fb_left) @[el2_ifu_ifc_ctrl.scala 130:43]
node _T_115 = and(_T_113, _T_114) @[el2_ifu_ifc_ctrl.scala 130:41]
node _T_116 = bits(_T_115, 0, 0) @[el2_ifu_ifc_ctrl.scala 130:53]
node _T_117 = bits(fb_write_f, 3, 0) @[el2_ifu_ifc_ctrl.scala 130:73]
node _T_118 = mux(_T_93, UInt<4>("h01"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_119 = mux(_T_96, _T_98, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_120 = mux(_T_101, _T_103, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_121 = mux(_T_106, _T_108, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_122 = mux(_T_116, _T_117, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_123 = or(_T_118, _T_119) @[Mux.scala 27:72]
node _T_124 = or(_T_123, _T_120) @[Mux.scala 27:72]
node _T_79 = not(io.ifu_fb_consume2) @[el2_ifu_ifc_ctrl.scala 120:38]
node _T_80 = and(io.ifu_fb_consume1, _T_79) @[el2_ifu_ifc_ctrl.scala 120:36]
node _T_81 = not(io.ifc_fetch_req_f) @[el2_ifu_ifc_ctrl.scala 120:61]
node _T_82 = or(_T_81, miss_f) @[el2_ifu_ifc_ctrl.scala 120:81]
node _T_83 = and(_T_80, _T_82) @[el2_ifu_ifc_ctrl.scala 120:58]
node _T_84 = and(io.ifu_fb_consume2, io.ifc_fetch_req_f) @[el2_ifu_ifc_ctrl.scala 121:25]
node _T_85 = or(_T_83, _T_84) @[el2_ifu_ifc_ctrl.scala 120:92]
fb_right <= _T_85 @[el2_ifu_ifc_ctrl.scala 120:12]
node _T_86 = not(io.ifc_fetch_req_f) @[el2_ifu_ifc_ctrl.scala 123:39]
node _T_87 = or(_T_86, miss_f) @[el2_ifu_ifc_ctrl.scala 123:59]
node _T_88 = and(io.ifu_fb_consume2, _T_87) @[el2_ifu_ifc_ctrl.scala 123:36]
fb_right2 <= _T_88 @[el2_ifu_ifc_ctrl.scala 123:13]
node _T_89 = or(io.ifu_fb_consume1, io.ifu_fb_consume2) @[el2_ifu_ifc_ctrl.scala 124:56]
node _T_90 = not(_T_89) @[el2_ifu_ifc_ctrl.scala 124:35]
node _T_91 = and(io.ifc_fetch_req_f, _T_90) @[el2_ifu_ifc_ctrl.scala 124:33]
node _T_92 = not(miss_f) @[el2_ifu_ifc_ctrl.scala 124:80]
node _T_93 = and(_T_91, _T_92) @[el2_ifu_ifc_ctrl.scala 124:78]
fb_left <= _T_93 @[el2_ifu_ifc_ctrl.scala 124:11]
node _T_94 = bits(flush_fb, 0, 0) @[el2_ifu_ifc_ctrl.scala 126:37]
node _T_95 = not(flush_fb) @[el2_ifu_ifc_ctrl.scala 127:6]
node _T_96 = and(_T_95, fb_right) @[el2_ifu_ifc_ctrl.scala 127:16]
node _T_97 = bits(_T_96, 0, 0) @[el2_ifu_ifc_ctrl.scala 127:28]
node _T_98 = bits(fb_write_f, 3, 1) @[el2_ifu_ifc_ctrl.scala 127:62]
node _T_99 = cat(UInt<1>("h00"), _T_98) @[Cat.scala 29:58]
node _T_100 = not(flush_fb) @[el2_ifu_ifc_ctrl.scala 128:6]
node _T_101 = and(_T_100, fb_right2) @[el2_ifu_ifc_ctrl.scala 128:16]
node _T_102 = bits(_T_101, 0, 0) @[el2_ifu_ifc_ctrl.scala 128:29]
node _T_103 = bits(fb_write_f, 3, 2) @[el2_ifu_ifc_ctrl.scala 128:63]
node _T_104 = cat(UInt<2>("h00"), _T_103) @[Cat.scala 29:58]
node _T_105 = not(flush_fb) @[el2_ifu_ifc_ctrl.scala 129:6]
node _T_106 = and(_T_105, fb_left) @[el2_ifu_ifc_ctrl.scala 129:16]
node _T_107 = bits(_T_106, 0, 0) @[el2_ifu_ifc_ctrl.scala 129:27]
node _T_108 = bits(fb_write_f, 2, 0) @[el2_ifu_ifc_ctrl.scala 129:51]
node _T_109 = cat(_T_108, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_110 = not(flush_fb) @[el2_ifu_ifc_ctrl.scala 130:6]
node _T_111 = not(fb_right) @[el2_ifu_ifc_ctrl.scala 130:18]
node _T_112 = and(_T_110, _T_111) @[el2_ifu_ifc_ctrl.scala 130:16]
node _T_113 = not(fb_right2) @[el2_ifu_ifc_ctrl.scala 130:30]
node _T_114 = and(_T_112, _T_113) @[el2_ifu_ifc_ctrl.scala 130:28]
node _T_115 = not(fb_left) @[el2_ifu_ifc_ctrl.scala 130:43]
node _T_116 = and(_T_114, _T_115) @[el2_ifu_ifc_ctrl.scala 130:41]
node _T_117 = bits(_T_116, 0, 0) @[el2_ifu_ifc_ctrl.scala 130:53]
node _T_118 = bits(fb_write_f, 3, 0) @[el2_ifu_ifc_ctrl.scala 130:73]
node _T_119 = mux(_T_94, UInt<4>("h01"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_120 = mux(_T_97, _T_99, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_121 = mux(_T_102, _T_104, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_122 = mux(_T_107, _T_109, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_123 = mux(_T_117, _T_118, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_124 = or(_T_119, _T_120) @[Mux.scala 27:72]
node _T_125 = or(_T_124, _T_121) @[Mux.scala 27:72]
node _T_126 = or(_T_125, _T_122) @[Mux.scala 27:72]
wire _T_127 : UInt<4> @[Mux.scala 27:72]
_T_127 <= _T_126 @[Mux.scala 27:72]
fb_write_ns <= _T_127 @[el2_ifu_ifc_ctrl.scala 126:15]
node _T_128 = bits(fb_write_ns, 3, 3) @[el2_ifu_ifc_ctrl.scala 133:38]
reg _T_129 : UInt<1>, clock with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_ifc_ctrl.scala 133:26]
_T_129 <= _T_128 @[el2_ifu_ifc_ctrl.scala 133:26]
fb_full_f_ns <= _T_129 @[el2_ifu_ifc_ctrl.scala 133:16]
node _T_130 = eq(state, UInt<2>("h00")) @[el2_ifu_ifc_ctrl.scala 135:17]
idle <= _T_130 @[el2_ifu_ifc_ctrl.scala 135:8]
node _T_131 = eq(state, UInt<2>("h03")) @[el2_ifu_ifc_ctrl.scala 136:16]
wfm <= _T_131 @[el2_ifu_ifc_ctrl.scala 136:7]
node _T_132 = bits(fb_write_ns, 3, 3) @[el2_ifu_ifc_ctrl.scala 138:30]
fb_full_f_ns <= _T_132 @[el2_ifu_ifc_ctrl.scala 138:16]
node _T_127 = or(_T_126, _T_123) @[Mux.scala 27:72]
wire _T_128 : UInt<4> @[Mux.scala 27:72]
_T_128 <= _T_127 @[Mux.scala 27:72]
fb_write_ns <= _T_128 @[el2_ifu_ifc_ctrl.scala 126:15]
node _T_129 = bits(fb_write_ns, 3, 3) @[el2_ifu_ifc_ctrl.scala 133:38]
reg _T_130 : UInt<1>, clock with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_ifc_ctrl.scala 133:26]
_T_130 <= _T_129 @[el2_ifu_ifc_ctrl.scala 133:26]
fb_full_f_ns <= _T_130 @[el2_ifu_ifc_ctrl.scala 133:16]
node _T_131 = eq(state, UInt<2>("h00")) @[el2_ifu_ifc_ctrl.scala 135:17]
idle <= _T_131 @[el2_ifu_ifc_ctrl.scala 135:8]
node _T_132 = eq(state, UInt<2>("h03")) @[el2_ifu_ifc_ctrl.scala 136:16]
wfm <= _T_132 @[el2_ifu_ifc_ctrl.scala 136:7]
node _T_133 = bits(fb_write_ns, 3, 3) @[el2_ifu_ifc_ctrl.scala 138:30]
fb_full_f_ns <= _T_133 @[el2_ifu_ifc_ctrl.scala 138:16]
reg fb_full_f : UInt<1>, clock with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_ifc_ctrl.scala 139:26]
fb_full_f <= fb_full_f_ns @[el2_ifu_ifc_ctrl.scala 139:26]
reg _T_133 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_ifc_ctrl.scala 140:24]
_T_133 <= fb_write_ns @[el2_ifu_ifc_ctrl.scala 140:24]
fb_write_f <= _T_133 @[el2_ifu_ifc_ctrl.scala 140:14]
node _T_134 = or(io.ifu_fb_consume2, io.ifu_fb_consume1) @[el2_ifu_ifc_ctrl.scala 143:26]
node _T_135 = or(_T_134, io.exu_flush_final) @[el2_ifu_ifc_ctrl.scala 143:47]
node _T_136 = not(_T_135) @[el2_ifu_ifc_ctrl.scala 143:5]
node _T_137 = and(fb_full_f, _T_136) @[el2_ifu_ifc_ctrl.scala 142:75]
node _T_138 = or(_T_137, dma_stall) @[el2_ifu_ifc_ctrl.scala 143:70]
node _T_139 = and(io.ifc_fetch_req_bf_raw, _T_138) @[el2_ifu_ifc_ctrl.scala 142:60]
node _T_140 = or(wfm, _T_139) @[el2_ifu_ifc_ctrl.scala 142:33]
io.ifu_pmu_fetch_stall <= _T_140 @[el2_ifu_ifc_ctrl.scala 142:26]
node _T_141 = cat(io.ifc_fetch_addr_bf, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_142 = bits(_T_141, 31, 28) @[el2_lib.scala 214:25]
node iccm_acc_in_region_bf = eq(_T_142, UInt<4>("h0e")) @[el2_lib.scala 214:47]
node _T_143 = bits(_T_141, 31, 16) @[el2_lib.scala 217:14]
node iccm_acc_in_range_bf = eq(_T_143, UInt<16>("h0ee00")) @[el2_lib.scala 217:29]
reg _T_134 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_ifc_ctrl.scala 140:24]
_T_134 <= fb_write_ns @[el2_ifu_ifc_ctrl.scala 140:24]
fb_write_f <= _T_134 @[el2_ifu_ifc_ctrl.scala 140:14]
node _T_135 = or(io.ifu_fb_consume2, io.ifu_fb_consume1) @[el2_ifu_ifc_ctrl.scala 143:26]
node _T_136 = or(_T_135, io.exu_flush_final) @[el2_ifu_ifc_ctrl.scala 143:47]
node _T_137 = not(_T_136) @[el2_ifu_ifc_ctrl.scala 143:5]
node _T_138 = and(fb_full_f, _T_137) @[el2_ifu_ifc_ctrl.scala 142:75]
node _T_139 = or(_T_138, dma_stall) @[el2_ifu_ifc_ctrl.scala 143:70]
node _T_140 = and(io.ifc_fetch_req_bf_raw, _T_139) @[el2_ifu_ifc_ctrl.scala 142:60]
node _T_141 = or(wfm, _T_140) @[el2_ifu_ifc_ctrl.scala 142:33]
io.ifu_pmu_fetch_stall <= _T_141 @[el2_ifu_ifc_ctrl.scala 142:26]
node _T_142 = cat(io.ifc_fetch_addr_bf, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_143 = bits(_T_142, 31, 28) @[el2_lib.scala 214:25]
node iccm_acc_in_region_bf = eq(_T_143, UInt<4>("h0e")) @[el2_lib.scala 214:47]
node _T_144 = bits(_T_142, 31, 16) @[el2_lib.scala 217:14]
node iccm_acc_in_range_bf = eq(_T_144, UInt<16>("h0ee00")) @[el2_lib.scala 217:29]
io.ifc_iccm_access_bf <= iccm_acc_in_range_bf @[el2_ifu_ifc_ctrl.scala 149:25]
node _T_144 = bits(io.ifc_fetch_addr_bf, 30, 27) @[el2_ifu_ifc_ctrl.scala 150:78]
node _T_145 = cat(_T_144, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_146 = dshr(io.dec_tlu_mrac_ff, _T_145) @[el2_ifu_ifc_ctrl.scala 150:53]
node _T_147 = bits(_T_146, 0, 0) @[el2_ifu_ifc_ctrl.scala 150:53]
node _T_148 = not(_T_147) @[el2_ifu_ifc_ctrl.scala 150:34]
io.ifc_fetch_uncacheable_bf <= _T_148 @[el2_ifu_ifc_ctrl.scala 150:31]
reg _T_149 : UInt<1>, clock with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_ifc_ctrl.scala 154:32]
_T_149 <= io.ifc_fetch_req_bf @[el2_ifu_ifc_ctrl.scala 154:32]
io.ifc_fetch_req_f <= _T_149 @[el2_ifu_ifc_ctrl.scala 154:22]
node _T_150 = or(io.exu_flush_final, io.ifc_fetch_req_f) @[el2_ifu_ifc_ctrl.scala 157:88]
reg _T_151 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_150 : @[Reg.scala 28:19]
_T_151 <= io.ifc_fetch_addr_bf @[Reg.scala 28:23]
node _T_145 = bits(io.ifc_fetch_addr_bf, 30, 27) @[el2_ifu_ifc_ctrl.scala 150:78]
node _T_146 = cat(_T_145, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_147 = dshr(io.dec_tlu_mrac_ff, _T_146) @[el2_ifu_ifc_ctrl.scala 150:53]
node _T_148 = bits(_T_147, 0, 0) @[el2_ifu_ifc_ctrl.scala 150:53]
node _T_149 = not(_T_148) @[el2_ifu_ifc_ctrl.scala 150:34]
io.ifc_fetch_uncacheable_bf <= _T_149 @[el2_ifu_ifc_ctrl.scala 150:31]
reg _T_150 : UInt<1>, clock with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_ifc_ctrl.scala 154:32]
_T_150 <= io.ifc_fetch_req_bf @[el2_ifu_ifc_ctrl.scala 154:32]
io.ifc_fetch_req_f <= _T_150 @[el2_ifu_ifc_ctrl.scala 154:22]
node _T_151 = or(io.exu_flush_final, io.ifc_fetch_req_f) @[el2_ifu_ifc_ctrl.scala 157:88]
reg _T_152 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when _T_151 : @[Reg.scala 28:19]
_T_152 <= io.ifc_fetch_addr_bf @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
io.ifc_fetch_addr_f <= _T_151 @[el2_ifu_ifc_ctrl.scala 157:23]
io.ifc_fetch_addr_f <= _T_152 @[el2_ifu_ifc_ctrl.scala 157:23]

153
el2_ifu_ifc_ctrl.v
View File

@ -53,8 +53,9 @@ module el2_ifu_ifc_ctrl(
wire [30:0] _T_20 = io_exu_flush_final ? io_exu_flush_path_final : 31'h0; // @[Mux.scala 27:72]
wire [30:0] _T_21 = io_sel_last_addr_bf ? io_ifc_fetch_addr_f : 31'h0; // @[Mux.scala 27:72]
wire [30:0] _T_22 = io_sel_btb_addr_bf ? io_ifu_bp_btb_target_f : 31'h0; // @[Mux.scala 27:72]
wire [29:0] _T_30 = io_ifc_fetch_addr_f[30:1] + 30'h1; // @[el2_ifu_ifc_ctrl.scala 90:48]
wire [31:0] fetch_addr_next = {{2'd0}, _T_30}; // @[el2_ifu_ifc_ctrl.scala 90:19]
wire [29:0] _T_30 = io_ifc_fetch_addr_f[30:1] + 30'h1; // @[el2_ifu_ifc_ctrl.scala 90:51]
wire [30:0] _T_31 = {_T_30,1'h0}; // @[Cat.scala 29:58]
wire [31:0] fetch_addr_next = {{1'd0}, _T_31}; // @[el2_ifu_ifc_ctrl.scala 90:19]
wire [31:0] _T_23 = io_sel_next_addr_bf ? fetch_addr_next : 32'h0; // @[Mux.scala 27:72]
wire [30:0] _T_24 = _T_20 | _T_21; // @[Mux.scala 27:72]
wire [30:0] _T_25 = _T_24 | _T_22; // @[Mux.scala 27:72]
@ -62,82 +63,82 @@ module el2_ifu_ifc_ctrl(
wire [31:0] _T_26 = _GEN_1 | _T_23; // @[Mux.scala 27:72]
reg [1:0] state; // @[el2_ifu_ifc_ctrl.scala 113:19]
wire idle = state == 2'h0; // @[el2_ifu_ifc_ctrl.scala 135:17]
wire _T_32 = io_ifu_fb_consume2 | io_ifu_fb_consume1; // @[el2_ifu_ifc_ctrl.scala 95:91]
wire _T_33 = ~_T_32; // @[el2_ifu_ifc_ctrl.scala 95:70]
wire [3:0] _T_118 = io_exu_flush_final ? 4'h1 : 4'h0; // @[Mux.scala 27:72]
wire _T_78 = ~io_ifu_fb_consume2; // @[el2_ifu_ifc_ctrl.scala 120:38]
wire _T_79 = io_ifu_fb_consume1 & _T_78; // @[el2_ifu_ifc_ctrl.scala 120:36]
wire _T_45 = io_ifc_fetch_req_f & _T_4; // @[el2_ifu_ifc_ctrl.scala 100:32]
wire miss_f = _T_45 & _T_2; // @[el2_ifu_ifc_ctrl.scala 100:47]
wire _T_81 = _T_3 | miss_f; // @[el2_ifu_ifc_ctrl.scala 120:81]
wire _T_82 = _T_79 & _T_81; // @[el2_ifu_ifc_ctrl.scala 120:58]
wire _T_83 = io_ifu_fb_consume2 & io_ifc_fetch_req_f; // @[el2_ifu_ifc_ctrl.scala 121:25]
wire fb_right = _T_82 | _T_83; // @[el2_ifu_ifc_ctrl.scala 120:92]
wire _T_95 = _T_2 & fb_right; // @[el2_ifu_ifc_ctrl.scala 127:16]
wire _T_33 = io_ifu_fb_consume2 | io_ifu_fb_consume1; // @[el2_ifu_ifc_ctrl.scala 95:91]
wire _T_34 = ~_T_33; // @[el2_ifu_ifc_ctrl.scala 95:70]
wire [3:0] _T_119 = io_exu_flush_final ? 4'h1 : 4'h0; // @[Mux.scala 27:72]
wire _T_79 = ~io_ifu_fb_consume2; // @[el2_ifu_ifc_ctrl.scala 120:38]
wire _T_80 = io_ifu_fb_consume1 & _T_79; // @[el2_ifu_ifc_ctrl.scala 120:36]
wire _T_46 = io_ifc_fetch_req_f & _T_4; // @[el2_ifu_ifc_ctrl.scala 100:32]
wire miss_f = _T_46 & _T_2; // @[el2_ifu_ifc_ctrl.scala 100:47]
wire _T_82 = _T_3 | miss_f; // @[el2_ifu_ifc_ctrl.scala 120:81]
wire _T_83 = _T_80 & _T_82; // @[el2_ifu_ifc_ctrl.scala 120:58]
wire _T_84 = io_ifu_fb_consume2 & io_ifc_fetch_req_f; // @[el2_ifu_ifc_ctrl.scala 121:25]
wire fb_right = _T_83 | _T_84; // @[el2_ifu_ifc_ctrl.scala 120:92]
wire _T_96 = _T_2 & fb_right; // @[el2_ifu_ifc_ctrl.scala 127:16]
reg [3:0] fb_write_f; // @[el2_ifu_ifc_ctrl.scala 140:24]
wire [3:0] _T_98 = {1'h0,fb_write_f[3:1]}; // @[Cat.scala 29:58]
wire [3:0] _T_119 = _T_95 ? _T_98 : 4'h0; // @[Mux.scala 27:72]
wire [3:0] _T_123 = _T_118 | _T_119; // @[Mux.scala 27:72]
wire fb_right2 = io_ifu_fb_consume2 & _T_81; // @[el2_ifu_ifc_ctrl.scala 123:36]
wire _T_100 = _T_2 & fb_right2; // @[el2_ifu_ifc_ctrl.scala 128:16]
wire [3:0] _T_103 = {2'h0,fb_write_f[3:2]}; // @[Cat.scala 29:58]
wire [3:0] _T_120 = _T_100 ? _T_103 : 4'h0; // @[Mux.scala 27:72]
wire [3:0] _T_124 = _T_123 | _T_120; // @[Mux.scala 27:72]
wire _T_88 = io_ifu_fb_consume1 | io_ifu_fb_consume2; // @[el2_ifu_ifc_ctrl.scala 124:56]
wire _T_89 = ~_T_88; // @[el2_ifu_ifc_ctrl.scala 124:35]
wire _T_90 = io_ifc_fetch_req_f & _T_89; // @[el2_ifu_ifc_ctrl.scala 124:33]
wire _T_91 = ~miss_f; // @[el2_ifu_ifc_ctrl.scala 124:80]
wire fb_left = _T_90 & _T_91; // @[el2_ifu_ifc_ctrl.scala 124:78]
wire _T_105 = _T_2 & fb_left; // @[el2_ifu_ifc_ctrl.scala 129:16]
wire [3:0] _T_108 = {fb_write_f[2:0],1'h0}; // @[Cat.scala 29:58]
wire [3:0] _T_121 = _T_105 ? _T_108 : 4'h0; // @[Mux.scala 27:72]
wire [3:0] _T_99 = {1'h0,fb_write_f[3:1]}; // @[Cat.scala 29:58]
wire [3:0] _T_120 = _T_96 ? _T_99 : 4'h0; // @[Mux.scala 27:72]
wire [3:0] _T_124 = _T_119 | _T_120; // @[Mux.scala 27:72]
wire fb_right2 = io_ifu_fb_consume2 & _T_82; // @[el2_ifu_ifc_ctrl.scala 123:36]
wire _T_101 = _T_2 & fb_right2; // @[el2_ifu_ifc_ctrl.scala 128:16]
wire [3:0] _T_104 = {2'h0,fb_write_f[3:2]}; // @[Cat.scala 29:58]
wire [3:0] _T_121 = _T_101 ? _T_104 : 4'h0; // @[Mux.scala 27:72]
wire [3:0] _T_125 = _T_124 | _T_121; // @[Mux.scala 27:72]
wire _T_110 = ~fb_right; // @[el2_ifu_ifc_ctrl.scala 130:18]
wire _T_111 = _T_2 & _T_110; // @[el2_ifu_ifc_ctrl.scala 130:16]
wire _T_112 = ~fb_right2; // @[el2_ifu_ifc_ctrl.scala 130:30]
wire _T_113 = _T_111 & _T_112; // @[el2_ifu_ifc_ctrl.scala 130:28]
wire _T_114 = ~fb_left; // @[el2_ifu_ifc_ctrl.scala 130:43]
wire _T_115 = _T_113 & _T_114; // @[el2_ifu_ifc_ctrl.scala 130:41]
wire [3:0] _T_122 = _T_115 ? fb_write_f : 4'h0; // @[Mux.scala 27:72]
wire [3:0] fb_write_ns = _T_125 | _T_122; // @[Mux.scala 27:72]
wire _T_89 = io_ifu_fb_consume1 | io_ifu_fb_consume2; // @[el2_ifu_ifc_ctrl.scala 124:56]
wire _T_90 = ~_T_89; // @[el2_ifu_ifc_ctrl.scala 124:35]
wire _T_91 = io_ifc_fetch_req_f & _T_90; // @[el2_ifu_ifc_ctrl.scala 124:33]
wire _T_92 = ~miss_f; // @[el2_ifu_ifc_ctrl.scala 124:80]
wire fb_left = _T_91 & _T_92; // @[el2_ifu_ifc_ctrl.scala 124:78]
wire _T_106 = _T_2 & fb_left; // @[el2_ifu_ifc_ctrl.scala 129:16]
wire [3:0] _T_109 = {fb_write_f[2:0],1'h0}; // @[Cat.scala 29:58]
wire [3:0] _T_122 = _T_106 ? _T_109 : 4'h0; // @[Mux.scala 27:72]
wire [3:0] _T_126 = _T_125 | _T_122; // @[Mux.scala 27:72]
wire _T_111 = ~fb_right; // @[el2_ifu_ifc_ctrl.scala 130:18]
wire _T_112 = _T_2 & _T_111; // @[el2_ifu_ifc_ctrl.scala 130:16]
wire _T_113 = ~fb_right2; // @[el2_ifu_ifc_ctrl.scala 130:30]
wire _T_114 = _T_112 & _T_113; // @[el2_ifu_ifc_ctrl.scala 130:28]
wire _T_115 = ~fb_left; // @[el2_ifu_ifc_ctrl.scala 130:43]
wire _T_116 = _T_114 & _T_115; // @[el2_ifu_ifc_ctrl.scala 130:41]
wire [3:0] _T_123 = _T_116 ? fb_write_f : 4'h0; // @[Mux.scala 27:72]
wire [3:0] fb_write_ns = _T_126 | _T_123; // @[Mux.scala 27:72]
wire fb_full_f_ns = fb_write_ns[3]; // @[el2_ifu_ifc_ctrl.scala 138:30]
wire _T_34 = fb_full_f_ns & _T_33; // @[el2_ifu_ifc_ctrl.scala 95:68]
wire _T_35 = ~_T_34; // @[el2_ifu_ifc_ctrl.scala 95:53]
wire _T_36 = io_ifc_fetch_req_bf_raw & _T_35; // @[el2_ifu_ifc_ctrl.scala 95:51]
wire _T_37 = ~dma_stall; // @[el2_ifu_ifc_ctrl.scala 96:5]
wire _T_38 = _T_36 & _T_37; // @[el2_ifu_ifc_ctrl.scala 95:114]
wire _T_39 = ~io_ic_write_stall; // @[el2_ifu_ifc_ctrl.scala 96:18]
wire _T_40 = _T_38 & _T_39; // @[el2_ifu_ifc_ctrl.scala 96:16]
wire _T_41 = ~io_dec_tlu_flush_noredir_wb; // @[el2_ifu_ifc_ctrl.scala 96:39]
wire _T_35 = fb_full_f_ns & _T_34; // @[el2_ifu_ifc_ctrl.scala 95:68]
wire _T_36 = ~_T_35; // @[el2_ifu_ifc_ctrl.scala 95:53]
wire _T_37 = io_ifc_fetch_req_bf_raw & _T_36; // @[el2_ifu_ifc_ctrl.scala 95:51]
wire _T_38 = ~dma_stall; // @[el2_ifu_ifc_ctrl.scala 96:5]
wire _T_39 = _T_37 & _T_38; // @[el2_ifu_ifc_ctrl.scala 95:114]
wire _T_40 = ~io_ic_write_stall; // @[el2_ifu_ifc_ctrl.scala 96:18]
wire _T_41 = _T_39 & _T_40; // @[el2_ifu_ifc_ctrl.scala 96:16]
wire _T_42 = ~io_dec_tlu_flush_noredir_wb; // @[el2_ifu_ifc_ctrl.scala 96:39]
wire fetch_bf_en = io_exu_flush_final | io_ifc_fetch_req_f; // @[el2_ifu_ifc_ctrl.scala 98:37]
wire goto_idle = io_exu_flush_final & io_dec_tlu_flush_noredir_wb; // @[el2_ifu_ifc_ctrl.scala 104:35]
wire _T_57 = io_exu_flush_final & _T_41; // @[el2_ifu_ifc_ctrl.scala 106:36]
wire leave_idle = _T_57 & idle; // @[el2_ifu_ifc_ctrl.scala 106:67]
wire _T_64 = ~goto_idle; // @[el2_ifu_ifc_ctrl.scala 108:55]
wire _T_72 = _T_64 & leave_idle; // @[el2_ifu_ifc_ctrl.scala 111:34]
wire _T_75 = state[0] & _T_64; // @[el2_ifu_ifc_ctrl.scala 111:60]
wire next_state_0 = _T_72 | _T_75; // @[el2_ifu_ifc_ctrl.scala 111:48]
wire [1:0] _T_76 = {next_state_0,next_state_0}; // @[Cat.scala 29:58]
wire _T_58 = io_exu_flush_final & _T_42; // @[el2_ifu_ifc_ctrl.scala 106:36]
wire leave_idle = _T_58 & idle; // @[el2_ifu_ifc_ctrl.scala 106:67]
wire _T_65 = ~goto_idle; // @[el2_ifu_ifc_ctrl.scala 108:55]
wire _T_73 = _T_65 & leave_idle; // @[el2_ifu_ifc_ctrl.scala 111:34]
wire _T_76 = state[0] & _T_65; // @[el2_ifu_ifc_ctrl.scala 111:60]
wire next_state_0 = _T_73 | _T_76; // @[el2_ifu_ifc_ctrl.scala 111:48]
wire [1:0] _T_77 = {next_state_0,next_state_0}; // @[Cat.scala 29:58]
wire wfm = state == 2'h3; // @[el2_ifu_ifc_ctrl.scala 136:16]
reg fb_full_f; // @[el2_ifu_ifc_ctrl.scala 139:26]
wire _T_135 = _T_32 | io_exu_flush_final; // @[el2_ifu_ifc_ctrl.scala 143:47]
wire _T_136 = ~_T_135; // @[el2_ifu_ifc_ctrl.scala 143:5]
wire _T_137 = fb_full_f & _T_136; // @[el2_ifu_ifc_ctrl.scala 142:75]
wire _T_138 = _T_137 | dma_stall; // @[el2_ifu_ifc_ctrl.scala 143:70]
wire _T_139 = io_ifc_fetch_req_bf_raw & _T_138; // @[el2_ifu_ifc_ctrl.scala 142:60]
wire [31:0] _T_141 = {io_ifc_fetch_addr_bf,1'h0}; // @[Cat.scala 29:58]
wire [4:0] _T_145 = {io_ifc_fetch_addr_bf[30:27],1'h0}; // @[Cat.scala 29:58]
wire [31:0] _T_146 = io_dec_tlu_mrac_ff >> _T_145; // @[el2_ifu_ifc_ctrl.scala 150:53]
reg _T_149; // @[el2_ifu_ifc_ctrl.scala 154:32]
reg [30:0] _T_151; // @[Reg.scala 27:20]
assign io_ifc_fetch_addr_f = _T_151; // @[el2_ifu_ifc_ctrl.scala 157:23]
wire _T_136 = _T_33 | io_exu_flush_final; // @[el2_ifu_ifc_ctrl.scala 143:47]
wire _T_137 = ~_T_136; // @[el2_ifu_ifc_ctrl.scala 143:5]
wire _T_138 = fb_full_f & _T_137; // @[el2_ifu_ifc_ctrl.scala 142:75]
wire _T_139 = _T_138 | dma_stall; // @[el2_ifu_ifc_ctrl.scala 143:70]
wire _T_140 = io_ifc_fetch_req_bf_raw & _T_139; // @[el2_ifu_ifc_ctrl.scala 142:60]
wire [31:0] _T_142 = {io_ifc_fetch_addr_bf,1'h0}; // @[Cat.scala 29:58]
wire [4:0] _T_146 = {io_ifc_fetch_addr_bf[30:27],1'h0}; // @[Cat.scala 29:58]
wire [31:0] _T_147 = io_dec_tlu_mrac_ff >> _T_146; // @[el2_ifu_ifc_ctrl.scala 150:53]
reg _T_150; // @[el2_ifu_ifc_ctrl.scala 154:32]
reg [30:0] _T_152; // @[Reg.scala 27:20]
assign io_ifc_fetch_addr_f = _T_152; // @[el2_ifu_ifc_ctrl.scala 157:23]
assign io_ifc_fetch_addr_bf = _T_26[30:0]; // @[el2_ifu_ifc_ctrl.scala 81:24]
assign io_ifc_fetch_req_f = _T_149; // @[el2_ifu_ifc_ctrl.scala 154:22]
assign io_ifu_pmu_fetch_stall = wfm | _T_139; // @[el2_ifu_ifc_ctrl.scala 142:26]
assign io_ifc_fetch_uncacheable_bf = ~_T_146[0]; // @[el2_ifu_ifc_ctrl.scala 150:31]
assign io_ifc_fetch_req_bf = _T_40 & _T_41; // @[el2_ifu_ifc_ctrl.scala 95:23]
assign io_ifc_fetch_req_f = _T_150; // @[el2_ifu_ifc_ctrl.scala 154:22]
assign io_ifu_pmu_fetch_stall = wfm | _T_140; // @[el2_ifu_ifc_ctrl.scala 142:26]
assign io_ifc_fetch_uncacheable_bf = ~_T_147[0]; // @[el2_ifu_ifc_ctrl.scala 150:31]
assign io_ifc_fetch_req_bf = _T_41 & _T_42; // @[el2_ifu_ifc_ctrl.scala 95:23]
assign io_ifc_fetch_req_bf_raw = ~idle; // @[el2_ifu_ifc_ctrl.scala 93:27]
assign io_ifc_iccm_access_bf = _T_141[31:16] == 16'hee00; // @[el2_ifu_ifc_ctrl.scala 149:25]
assign io_ifc_iccm_access_bf = _T_142[31:16] == 16'hee00; // @[el2_ifu_ifc_ctrl.scala 149:25]
assign io_ifc_region_acc_fault_bf = 1'h0; // @[el2_ifu_ifc_ctrl.scala 42:30]
assign io_ifc_dma_access_ok = 1'h0; // @[el2_ifu_ifc_ctrl.scala 43:24]
assign io_sel_last_addr_bf = _T_2 & _T_5; // @[el2_ifu_ifc_ctrl.scala 76:23]
@ -187,9 +188,9 @@ initial begin
_RAND_3 = {1{`RANDOM}};
fb_full_f = _RAND_3[0:0];
_RAND_4 = {1{`RANDOM}};
_T_149 = _RAND_4[0:0];
_T_150 = _RAND_4[0:0];
_RAND_5 = {1{`RANDOM}};
_T_151 = _RAND_5[30:0];
_T_152 = _RAND_5[30:0];
`endif // RANDOMIZE_REG_INIT
`endif // RANDOMIZE
end // initial
@ -206,7 +207,7 @@ end // initial
if (reset) begin
state <= 2'h0;
end else begin
state <= _T_76;
state <= _T_77;
end
if (reset) begin
fb_write_f <= 4'h0;
@ -219,14 +220,14 @@ end // initial
fb_full_f <= fb_full_f_ns;
end
if (reset) begin
_T_149 <= 1'h0;
_T_150 <= 1'h0;
end else begin
_T_149 <= io_ifc_fetch_req_bf;
_T_150 <= io_ifc_fetch_req_bf;
end
if (reset) begin
_T_151 <= 31'h0;
_T_152 <= 31'h0;
end else if (fetch_bf_en) begin
_T_151 <= io_ifc_fetch_addr_bf;
_T_152 <= io_ifc_fetch_addr_bf;
end
end
endmodule

21
src/main/scala/ifu/el2_ifu_compress_ctl.scala
View File

@ -21,6 +21,7 @@ class el2_ifu_compress_ctl extends Module {
val uimm9d = Output(UInt())
val simm5d = Output(UInt())
val sjald = Output(UInt())
val l2_31 = Output(UInt())
})
//io.dout := (0 until 32).map(i=> 0.U.asBool)
@ -148,19 +149,19 @@ class el2_ifu_compress_ctl extends Module {
val sluimmd = Cat(Fill(15, io.din(12)), io.din(6,2))
io.sluimmd := sluimmd
val l2_31 = l1(31,20) |
Mux1H(Seq(simm5_0.asBool->Cat(Fill(7, simm5d(5)), simm5d(4,0)),
uimm9_2.asBool->Cat(0.U(2.W), uimm9d, 0.U(2.W)),
simm9_4.asBool->Cat(Fill(3, simm9d(5)), simm9d(4,0), 0.U(4.W)),
ulwimm6_2.asBool->Cat(0.U(5.W), ulwimm6d, 0.U(2.W)),
ulwspimm7_2.asBool->Cat(0.U(4.W), ulwspimm7d, 0.U(2.W)),
uimm5_0.asBool->Cat(0.U(6.W), uimm5d),
sjaloffset11_1->Cat(sjald(19), sjald(9,0), sjald(10)),
sluimm17_12->sluimmd(19,8)))
io.l2_31 := l1(31,20)// |
// Mux1H(Seq(simm5_0.asBool->Cat(Fill(7, simm5d(5)), simm5d(4,0)),
// uimm9_2.asBool->Cat(0.U(2.W), uimm9d, 0.U(2.W)),
// simm9_4.asBool->Cat(Fill(3, simm9d(5)), simm9d(4,0), 0.U(4.W)),
// ulwimm6_2.asBool->Cat(0.U(5.W), ulwimm6d, 0.U(2.W)),
// ulwspimm7_2.asBool->Cat(0.U(4.W), ulwspimm7d, 0.U(2.W)),
// uimm5_0.asBool->Cat(0.U(6.W), uimm5d),
// sjaloffset11_1->Cat(sjald(19), sjald(9,0), sjald(10)),
// sluimm17_12->sluimmd(19,8)))
val l2_19 = l1(19,12) | Mux1H(Seq(sjaloffset11_1.asBool->sjald(19,11),
sluimm17_12.asBool->sluimmd(7,0)))
val l2 = Cat(l2_31, l2_19, l1(11,0))
val l2 = Cat(io.l2_31, l2_19, l1(11,0))
val sbr8d = Cat(io.din(12),io.din(6),io.din(5),io.din(2),io.din(11),io.din(10),io.din(4),io.din(3),0.U)

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src/main/scala/ifu/el2_ifu_ifc_ctrl.scala
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@ -87,7 +87,7 @@ val io = IO(new Bundle{
line_wrap := 0.U//fetch_addr_next(ICACHE_TAG_INDEX_LO) ^ io.ifc_fetch_addr_f(ICACHE_TAG_INDEX_LO)
fetch_addr_next := io.ifc_fetch_addr_f(30,1)+1.U //|
fetch_addr_next := Cat(io.ifc_fetch_addr_f(30,1)+1.U, 0.U) //|
//Mux(line_wrap.asBool(), 0.U, io.ifc_fetch_addr_f(0)))
io.ifc_fetch_req_bf_raw := ~idle

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target/scala-2.12/classes/ifu/el2_ifu_compress_ctl$$anon$1.class
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target/scala-2.12/classes/ifu/el2_ifu_compress_ctl.class
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target/scala-2.12/classes/ifu/el2_ifu_ifc_ctrl.class
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target/scala-2.12/classes/ifu/ifu_compress$.class
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target/scala-2.12/classes/ifu/ifu_compress$delayedInit$body.class
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