diff --git a/el2_lsu_bus_buffer.anno.json b/el2_lsu_bus_buffer.anno.json index d4e32574..27609fe0 100644 --- a/el2_lsu_bus_buffer.anno.json +++ b/el2_lsu_bus_buffer.anno.json @@ -114,6 +114,38 @@ "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_ldst_dual_r" ] }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_test", + "sources":[ + "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_store_data_r", + "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_axi_rdata", + "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_addr_r", + "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_dec_tlu_wb_coalescing_disable", + "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_ldst_dual_r", + "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_is_sideeffects_r", + "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_bus_clk_en", + "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_dec_tlu_force_halt", + "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_busreq_r", + "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_commit_r", + "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_pkt_m_load", + "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_axi_bresp", + "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_busreq_m", + "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_pkt_r_store", + "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_pkt_r_word", + "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_axi_rvalid", + "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_axi_rready", + "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_pkt_r_load", + "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_no_word_merge_r", + "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_addr_m", + "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_pkt_r_by", + "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_pkt_r_half", + "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_axi_bid", + "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_axi_rid", + "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_axi_bvalid", + "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_axi_bready" + ] + }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_pmu_bus_busy", diff --git a/el2_lsu_bus_buffer.fir b/el2_lsu_bus_buffer.fir index 8e65eba3..18e5ac6e 100644 --- a/el2_lsu_bus_buffer.fir +++ b/el2_lsu_bus_buffer.fir @@ -2840,7 +2840,6 @@ circuit el2_lsu_bus_buffer : node _T_2001 = cat(_T_1986, _T_1993) @[Cat.scala 29:58] node _T_2002 = cat(_T_2001, _T_2000) @[Cat.scala 29:58] CmdPtr0 <= _T_2002 @[el2_lsu_bus_buffer.scala 418:11] - io.test <= CmdPtr0 @[el2_lsu_bus_buffer.scala 419:11] node _T_2003 = mux(UInt<1>("h00"), UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] node _T_2004 = cat(_T_2003, CmdPtr1Dec) @[Cat.scala 29:58] node _T_2005 = bits(_T_2004, 4, 4) @[el2_lsu_bus_buffer.scala 413:39] @@ -5751,673 +5750,677 @@ circuit el2_lsu_bus_buffer : node _T_4325 = cat(_T_4324, buf_data_en[1]) @[Cat.scala 29:58] node _T_4326 = cat(_T_4325, buf_data_en[0]) @[Cat.scala 29:58] io.data_en <= _T_4326 @[el2_lsu_bus_buffer.scala 545:14] - node _T_4327 = neq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 546:60] - node _T_4328 = neq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 546:60] - node _T_4329 = neq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 546:60] - node _T_4330 = neq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 546:60] - node _T_4331 = add(_T_4330, _T_4329) @[el2_lsu_bus_buffer.scala 546:96] - node _T_4332 = add(_T_4331, _T_4328) @[el2_lsu_bus_buffer.scala 546:96] - node buf_numvld_any = add(_T_4332, _T_4327) @[el2_lsu_bus_buffer.scala 546:96] - node _T_4333 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 547:60] - node _T_4334 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 547:79] - node _T_4335 = and(_T_4333, _T_4334) @[el2_lsu_bus_buffer.scala 547:64] - node _T_4336 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 547:91] - node _T_4337 = and(_T_4335, _T_4336) @[el2_lsu_bus_buffer.scala 547:89] - node _T_4338 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 547:60] - node _T_4339 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 547:79] - node _T_4340 = and(_T_4338, _T_4339) @[el2_lsu_bus_buffer.scala 547:64] - node _T_4341 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 547:91] - node _T_4342 = and(_T_4340, _T_4341) @[el2_lsu_bus_buffer.scala 547:89] - node _T_4343 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 547:60] - node _T_4344 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 547:79] - node _T_4345 = and(_T_4343, _T_4344) @[el2_lsu_bus_buffer.scala 547:64] - node _T_4346 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 547:91] - node _T_4347 = and(_T_4345, _T_4346) @[el2_lsu_bus_buffer.scala 547:89] - node _T_4348 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 547:60] - node _T_4349 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 547:79] - node _T_4350 = and(_T_4348, _T_4349) @[el2_lsu_bus_buffer.scala 547:64] - node _T_4351 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 547:91] - node _T_4352 = and(_T_4350, _T_4351) @[el2_lsu_bus_buffer.scala 547:89] - node _T_4353 = add(_T_4352, _T_4347) @[el2_lsu_bus_buffer.scala 547:142] - node _T_4354 = add(_T_4353, _T_4342) @[el2_lsu_bus_buffer.scala 547:142] - node _T_4355 = add(_T_4354, _T_4337) @[el2_lsu_bus_buffer.scala 547:142] - buf_numvld_wrcmd_any <= _T_4355 @[el2_lsu_bus_buffer.scala 547:24] - node _T_4356 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 548:63] - node _T_4357 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 548:75] - node _T_4358 = and(_T_4356, _T_4357) @[el2_lsu_bus_buffer.scala 548:73] - node _T_4359 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 548:63] - node _T_4360 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 548:75] - node _T_4361 = and(_T_4359, _T_4360) @[el2_lsu_bus_buffer.scala 548:73] - node _T_4362 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 548:63] - node _T_4363 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 548:75] - node _T_4364 = and(_T_4362, _T_4363) @[el2_lsu_bus_buffer.scala 548:73] - node _T_4365 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 548:63] - node _T_4366 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 548:75] - node _T_4367 = and(_T_4365, _T_4366) @[el2_lsu_bus_buffer.scala 548:73] - node _T_4368 = add(_T_4367, _T_4364) @[el2_lsu_bus_buffer.scala 548:126] - node _T_4369 = add(_T_4368, _T_4361) @[el2_lsu_bus_buffer.scala 548:126] - node _T_4370 = add(_T_4369, _T_4358) @[el2_lsu_bus_buffer.scala 548:126] - buf_numvld_cmd_any <= _T_4370 @[el2_lsu_bus_buffer.scala 548:22] - node _T_4371 = eq(buf_state[0], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 549:63] - node _T_4372 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 549:90] - node _T_4373 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 549:102] - node _T_4374 = and(_T_4372, _T_4373) @[el2_lsu_bus_buffer.scala 549:100] - node _T_4375 = or(_T_4371, _T_4374) @[el2_lsu_bus_buffer.scala 549:74] - node _T_4376 = eq(buf_state[1], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 549:63] - node _T_4377 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 549:90] - node _T_4378 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 549:102] - node _T_4379 = and(_T_4377, _T_4378) @[el2_lsu_bus_buffer.scala 549:100] - node _T_4380 = or(_T_4376, _T_4379) @[el2_lsu_bus_buffer.scala 549:74] - node _T_4381 = eq(buf_state[2], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 549:63] - node _T_4382 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 549:90] - node _T_4383 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 549:102] - node _T_4384 = and(_T_4382, _T_4383) @[el2_lsu_bus_buffer.scala 549:100] - node _T_4385 = or(_T_4381, _T_4384) @[el2_lsu_bus_buffer.scala 549:74] - node _T_4386 = eq(buf_state[3], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 549:63] - node _T_4387 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 549:90] - node _T_4388 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 549:102] - node _T_4389 = and(_T_4387, _T_4388) @[el2_lsu_bus_buffer.scala 549:100] - node _T_4390 = or(_T_4386, _T_4389) @[el2_lsu_bus_buffer.scala 549:74] - node _T_4391 = add(_T_4390, _T_4385) @[el2_lsu_bus_buffer.scala 549:154] - node _T_4392 = add(_T_4391, _T_4380) @[el2_lsu_bus_buffer.scala 549:154] - node _T_4393 = add(_T_4392, _T_4375) @[el2_lsu_bus_buffer.scala 549:154] - buf_numvld_pend_any <= _T_4393 @[el2_lsu_bus_buffer.scala 549:23] - node _T_4394 = eq(buf_state[0], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 550:61] - node _T_4395 = eq(buf_state[1], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 550:61] - node _T_4396 = eq(buf_state[2], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 550:61] - node _T_4397 = eq(buf_state[3], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 550:61] - node _T_4398 = or(_T_4397, _T_4396) @[el2_lsu_bus_buffer.scala 550:93] - node _T_4399 = or(_T_4398, _T_4395) @[el2_lsu_bus_buffer.scala 550:93] - node _T_4400 = or(_T_4399, _T_4394) @[el2_lsu_bus_buffer.scala 550:93] - any_done_wait_state <= _T_4400 @[el2_lsu_bus_buffer.scala 550:23] - node _T_4401 = orr(buf_numvld_pend_any) @[el2_lsu_bus_buffer.scala 551:53] - io.lsu_bus_buffer_pend_any <= _T_4401 @[el2_lsu_bus_buffer.scala 551:30] - node _T_4402 = and(io.ldst_dual_d, io.dec_lsu_valid_raw_d) @[el2_lsu_bus_buffer.scala 552:52] - node _T_4403 = geq(buf_numvld_any, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 552:92] - node _T_4404 = eq(buf_numvld_any, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 552:119] - node _T_4405 = mux(_T_4402, _T_4403, _T_4404) @[el2_lsu_bus_buffer.scala 552:36] - io.lsu_bus_buffer_full_any <= _T_4405 @[el2_lsu_bus_buffer.scala 552:30] - node _T_4406 = orr(buf_state[0]) @[el2_lsu_bus_buffer.scala 553:52] - node _T_4407 = orr(buf_state[1]) @[el2_lsu_bus_buffer.scala 553:52] - node _T_4408 = orr(buf_state[2]) @[el2_lsu_bus_buffer.scala 553:52] - node _T_4409 = orr(buf_state[3]) @[el2_lsu_bus_buffer.scala 553:52] - node _T_4410 = or(_T_4406, _T_4407) @[el2_lsu_bus_buffer.scala 553:65] - node _T_4411 = or(_T_4410, _T_4408) @[el2_lsu_bus_buffer.scala 553:65] - node _T_4412 = or(_T_4411, _T_4409) @[el2_lsu_bus_buffer.scala 553:65] - node _T_4413 = eq(_T_4412, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 553:34] - node _T_4414 = eq(ibuf_valid, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 553:72] - node _T_4415 = and(_T_4413, _T_4414) @[el2_lsu_bus_buffer.scala 553:70] - node _T_4416 = eq(obuf_valid, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 553:86] - node _T_4417 = and(_T_4415, _T_4416) @[el2_lsu_bus_buffer.scala 553:84] - io.lsu_bus_buffer_empty_any <= _T_4417 @[el2_lsu_bus_buffer.scala 553:31] - node _T_4418 = and(io.lsu_busreq_m, io.lsu_pkt_m.valid) @[el2_lsu_bus_buffer.scala 555:51] - node _T_4419 = and(_T_4418, io.lsu_pkt_m.load) @[el2_lsu_bus_buffer.scala 555:72] - node _T_4420 = eq(io.flush_m_up, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 555:94] - node _T_4421 = and(_T_4419, _T_4420) @[el2_lsu_bus_buffer.scala 555:92] - node _T_4422 = eq(io.ld_full_hit_m, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 555:111] - node _T_4423 = and(_T_4421, _T_4422) @[el2_lsu_bus_buffer.scala 555:109] - io.lsu_nonblock_load_valid_m <= _T_4423 @[el2_lsu_bus_buffer.scala 555:32] - io.lsu_nonblock_load_tag_m <= WrPtr0_m @[el2_lsu_bus_buffer.scala 556:30] + node _T_4327 = cat(buf_data_in[3], buf_data_in[2]) @[Cat.scala 29:58] + node _T_4328 = cat(_T_4327, buf_data_in[1]) @[Cat.scala 29:58] + node _T_4329 = cat(_T_4328, buf_data_in[0]) @[Cat.scala 29:58] + io.test <= _T_4329 @[el2_lsu_bus_buffer.scala 546:11] + node _T_4330 = neq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 547:60] + node _T_4331 = neq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 547:60] + node _T_4332 = neq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 547:60] + node _T_4333 = neq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 547:60] + node _T_4334 = add(_T_4333, _T_4332) @[el2_lsu_bus_buffer.scala 547:96] + node _T_4335 = add(_T_4334, _T_4331) @[el2_lsu_bus_buffer.scala 547:96] + node buf_numvld_any = add(_T_4335, _T_4330) @[el2_lsu_bus_buffer.scala 547:96] + node _T_4336 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 548:60] + node _T_4337 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 548:79] + node _T_4338 = and(_T_4336, _T_4337) @[el2_lsu_bus_buffer.scala 548:64] + node _T_4339 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 548:91] + node _T_4340 = and(_T_4338, _T_4339) @[el2_lsu_bus_buffer.scala 548:89] + node _T_4341 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 548:60] + node _T_4342 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 548:79] + node _T_4343 = and(_T_4341, _T_4342) @[el2_lsu_bus_buffer.scala 548:64] + node _T_4344 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 548:91] + node _T_4345 = and(_T_4343, _T_4344) @[el2_lsu_bus_buffer.scala 548:89] + node _T_4346 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 548:60] + node _T_4347 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 548:79] + node _T_4348 = and(_T_4346, _T_4347) @[el2_lsu_bus_buffer.scala 548:64] + node _T_4349 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 548:91] + node _T_4350 = and(_T_4348, _T_4349) @[el2_lsu_bus_buffer.scala 548:89] + node _T_4351 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 548:60] + node _T_4352 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 548:79] + node _T_4353 = and(_T_4351, _T_4352) @[el2_lsu_bus_buffer.scala 548:64] + node _T_4354 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 548:91] + node _T_4355 = and(_T_4353, _T_4354) @[el2_lsu_bus_buffer.scala 548:89] + node _T_4356 = add(_T_4355, _T_4350) @[el2_lsu_bus_buffer.scala 548:142] + node _T_4357 = add(_T_4356, _T_4345) @[el2_lsu_bus_buffer.scala 548:142] + node _T_4358 = add(_T_4357, _T_4340) @[el2_lsu_bus_buffer.scala 548:142] + buf_numvld_wrcmd_any <= _T_4358 @[el2_lsu_bus_buffer.scala 548:24] + node _T_4359 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 549:63] + node _T_4360 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 549:75] + node _T_4361 = and(_T_4359, _T_4360) @[el2_lsu_bus_buffer.scala 549:73] + node _T_4362 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 549:63] + node _T_4363 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 549:75] + node _T_4364 = and(_T_4362, _T_4363) @[el2_lsu_bus_buffer.scala 549:73] + node _T_4365 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 549:63] + node _T_4366 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 549:75] + node _T_4367 = and(_T_4365, _T_4366) @[el2_lsu_bus_buffer.scala 549:73] + node _T_4368 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 549:63] + node _T_4369 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 549:75] + node _T_4370 = and(_T_4368, _T_4369) @[el2_lsu_bus_buffer.scala 549:73] + node _T_4371 = add(_T_4370, _T_4367) @[el2_lsu_bus_buffer.scala 549:126] + node _T_4372 = add(_T_4371, _T_4364) @[el2_lsu_bus_buffer.scala 549:126] + node _T_4373 = add(_T_4372, _T_4361) @[el2_lsu_bus_buffer.scala 549:126] + buf_numvld_cmd_any <= _T_4373 @[el2_lsu_bus_buffer.scala 549:22] + node _T_4374 = eq(buf_state[0], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 550:63] + node _T_4375 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 550:90] + node _T_4376 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 550:102] + node _T_4377 = and(_T_4375, _T_4376) @[el2_lsu_bus_buffer.scala 550:100] + node _T_4378 = or(_T_4374, _T_4377) @[el2_lsu_bus_buffer.scala 550:74] + node _T_4379 = eq(buf_state[1], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 550:63] + node _T_4380 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 550:90] + node _T_4381 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 550:102] + node _T_4382 = and(_T_4380, _T_4381) @[el2_lsu_bus_buffer.scala 550:100] + node _T_4383 = or(_T_4379, _T_4382) @[el2_lsu_bus_buffer.scala 550:74] + node _T_4384 = eq(buf_state[2], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 550:63] + node _T_4385 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 550:90] + node _T_4386 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 550:102] + node _T_4387 = and(_T_4385, _T_4386) @[el2_lsu_bus_buffer.scala 550:100] + node _T_4388 = or(_T_4384, _T_4387) @[el2_lsu_bus_buffer.scala 550:74] + node _T_4389 = eq(buf_state[3], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 550:63] + node _T_4390 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 550:90] + node _T_4391 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 550:102] + node _T_4392 = and(_T_4390, _T_4391) @[el2_lsu_bus_buffer.scala 550:100] + node _T_4393 = or(_T_4389, _T_4392) @[el2_lsu_bus_buffer.scala 550:74] + node _T_4394 = add(_T_4393, _T_4388) @[el2_lsu_bus_buffer.scala 550:154] + node _T_4395 = add(_T_4394, _T_4383) @[el2_lsu_bus_buffer.scala 550:154] + node _T_4396 = add(_T_4395, _T_4378) @[el2_lsu_bus_buffer.scala 550:154] + buf_numvld_pend_any <= _T_4396 @[el2_lsu_bus_buffer.scala 550:23] + node _T_4397 = eq(buf_state[0], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 551:61] + node _T_4398 = eq(buf_state[1], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 551:61] + node _T_4399 = eq(buf_state[2], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 551:61] + node _T_4400 = eq(buf_state[3], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 551:61] + node _T_4401 = or(_T_4400, _T_4399) @[el2_lsu_bus_buffer.scala 551:93] + node _T_4402 = or(_T_4401, _T_4398) @[el2_lsu_bus_buffer.scala 551:93] + node _T_4403 = or(_T_4402, _T_4397) @[el2_lsu_bus_buffer.scala 551:93] + any_done_wait_state <= _T_4403 @[el2_lsu_bus_buffer.scala 551:23] + node _T_4404 = orr(buf_numvld_pend_any) @[el2_lsu_bus_buffer.scala 552:53] + io.lsu_bus_buffer_pend_any <= _T_4404 @[el2_lsu_bus_buffer.scala 552:30] + node _T_4405 = and(io.ldst_dual_d, io.dec_lsu_valid_raw_d) @[el2_lsu_bus_buffer.scala 553:52] + node _T_4406 = geq(buf_numvld_any, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 553:92] + node _T_4407 = eq(buf_numvld_any, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 553:119] + node _T_4408 = mux(_T_4405, _T_4406, _T_4407) @[el2_lsu_bus_buffer.scala 553:36] + io.lsu_bus_buffer_full_any <= _T_4408 @[el2_lsu_bus_buffer.scala 553:30] + node _T_4409 = orr(buf_state[0]) @[el2_lsu_bus_buffer.scala 554:52] + node _T_4410 = orr(buf_state[1]) @[el2_lsu_bus_buffer.scala 554:52] + node _T_4411 = orr(buf_state[2]) @[el2_lsu_bus_buffer.scala 554:52] + node _T_4412 = orr(buf_state[3]) @[el2_lsu_bus_buffer.scala 554:52] + node _T_4413 = or(_T_4409, _T_4410) @[el2_lsu_bus_buffer.scala 554:65] + node _T_4414 = or(_T_4413, _T_4411) @[el2_lsu_bus_buffer.scala 554:65] + node _T_4415 = or(_T_4414, _T_4412) @[el2_lsu_bus_buffer.scala 554:65] + node _T_4416 = eq(_T_4415, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 554:34] + node _T_4417 = eq(ibuf_valid, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 554:72] + node _T_4418 = and(_T_4416, _T_4417) @[el2_lsu_bus_buffer.scala 554:70] + node _T_4419 = eq(obuf_valid, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 554:86] + node _T_4420 = and(_T_4418, _T_4419) @[el2_lsu_bus_buffer.scala 554:84] + io.lsu_bus_buffer_empty_any <= _T_4420 @[el2_lsu_bus_buffer.scala 554:31] + node _T_4421 = and(io.lsu_busreq_m, io.lsu_pkt_m.valid) @[el2_lsu_bus_buffer.scala 556:51] + node _T_4422 = and(_T_4421, io.lsu_pkt_m.load) @[el2_lsu_bus_buffer.scala 556:72] + node _T_4423 = eq(io.flush_m_up, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 556:94] + node _T_4424 = and(_T_4422, _T_4423) @[el2_lsu_bus_buffer.scala 556:92] + node _T_4425 = eq(io.ld_full_hit_m, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 556:111] + node _T_4426 = and(_T_4424, _T_4425) @[el2_lsu_bus_buffer.scala 556:109] + io.lsu_nonblock_load_valid_m <= _T_4426 @[el2_lsu_bus_buffer.scala 556:32] + io.lsu_nonblock_load_tag_m <= WrPtr0_m @[el2_lsu_bus_buffer.scala 557:30] wire lsu_nonblock_load_valid_r : UInt<1> lsu_nonblock_load_valid_r <= UInt<1>("h00") - node _T_4424 = eq(io.lsu_commit_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 558:61] - node _T_4425 = and(lsu_nonblock_load_valid_r, _T_4424) @[el2_lsu_bus_buffer.scala 558:59] - io.lsu_nonblock_load_inv_r <= _T_4425 @[el2_lsu_bus_buffer.scala 558:30] - io.lsu_nonblock_load_inv_tag_r <= WrPtr0_r @[el2_lsu_bus_buffer.scala 559:34] - node _T_4426 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 560:80] - node _T_4427 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 560:127] - node _T_4428 = and(UInt<1>("h01"), _T_4427) @[el2_lsu_bus_buffer.scala 560:116] - node _T_4429 = eq(_T_4428, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 560:95] - node _T_4430 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 560:80] - node _T_4431 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 560:127] - node _T_4432 = and(UInt<1>("h01"), _T_4431) @[el2_lsu_bus_buffer.scala 560:116] - node _T_4433 = eq(_T_4432, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 560:95] - node _T_4434 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 560:80] - node _T_4435 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 560:127] - node _T_4436 = and(UInt<1>("h01"), _T_4435) @[el2_lsu_bus_buffer.scala 560:116] - node _T_4437 = eq(_T_4436, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 560:95] - node _T_4438 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 560:80] - node _T_4439 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 560:127] - node _T_4440 = and(UInt<1>("h01"), _T_4439) @[el2_lsu_bus_buffer.scala 560:116] - node _T_4441 = eq(_T_4440, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 560:95] - node _T_4442 = mux(_T_4426, _T_4429, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4443 = mux(_T_4430, _T_4433, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4444 = mux(_T_4434, _T_4437, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4445 = mux(_T_4438, _T_4441, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4446 = or(_T_4442, _T_4443) @[Mux.scala 27:72] - node _T_4447 = or(_T_4446, _T_4444) @[Mux.scala 27:72] - node _T_4448 = or(_T_4447, _T_4445) @[Mux.scala 27:72] + node _T_4427 = eq(io.lsu_commit_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 559:61] + node _T_4428 = and(lsu_nonblock_load_valid_r, _T_4427) @[el2_lsu_bus_buffer.scala 559:59] + io.lsu_nonblock_load_inv_r <= _T_4428 @[el2_lsu_bus_buffer.scala 559:30] + io.lsu_nonblock_load_inv_tag_r <= WrPtr0_r @[el2_lsu_bus_buffer.scala 560:34] + node _T_4429 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 561:80] + node _T_4430 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 561:127] + node _T_4431 = and(UInt<1>("h01"), _T_4430) @[el2_lsu_bus_buffer.scala 561:116] + node _T_4432 = eq(_T_4431, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 561:95] + node _T_4433 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 561:80] + node _T_4434 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 561:127] + node _T_4435 = and(UInt<1>("h01"), _T_4434) @[el2_lsu_bus_buffer.scala 561:116] + node _T_4436 = eq(_T_4435, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 561:95] + node _T_4437 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 561:80] + node _T_4438 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 561:127] + node _T_4439 = and(UInt<1>("h01"), _T_4438) @[el2_lsu_bus_buffer.scala 561:116] + node _T_4440 = eq(_T_4439, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 561:95] + node _T_4441 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 561:80] + node _T_4442 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 561:127] + node _T_4443 = and(UInt<1>("h01"), _T_4442) @[el2_lsu_bus_buffer.scala 561:116] + node _T_4444 = eq(_T_4443, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 561:95] + node _T_4445 = mux(_T_4429, _T_4432, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4446 = mux(_T_4433, _T_4436, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4447 = mux(_T_4437, _T_4440, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4448 = mux(_T_4441, _T_4444, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4449 = or(_T_4445, _T_4446) @[Mux.scala 27:72] + node _T_4450 = or(_T_4449, _T_4447) @[Mux.scala 27:72] + node _T_4451 = or(_T_4450, _T_4448) @[Mux.scala 27:72] wire lsu_nonblock_load_data_ready : UInt<1> @[Mux.scala 27:72] - lsu_nonblock_load_data_ready <= _T_4448 @[Mux.scala 27:72] - node _T_4449 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 561:80] - node _T_4450 = bits(buf_error, 0, 0) @[el2_lsu_bus_buffer.scala 561:104] - node _T_4451 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 561:120] - node _T_4452 = eq(_T_4451, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 561:110] - node _T_4453 = and(_T_4450, _T_4452) @[el2_lsu_bus_buffer.scala 561:108] - node _T_4454 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 561:80] - node _T_4455 = bits(buf_error, 1, 1) @[el2_lsu_bus_buffer.scala 561:104] - node _T_4456 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 561:120] - node _T_4457 = eq(_T_4456, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 561:110] - node _T_4458 = and(_T_4455, _T_4457) @[el2_lsu_bus_buffer.scala 561:108] - node _T_4459 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 561:80] - node _T_4460 = bits(buf_error, 2, 2) @[el2_lsu_bus_buffer.scala 561:104] - node _T_4461 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 561:120] - node _T_4462 = eq(_T_4461, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 561:110] - node _T_4463 = and(_T_4460, _T_4462) @[el2_lsu_bus_buffer.scala 561:108] - node _T_4464 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 561:80] - node _T_4465 = bits(buf_error, 3, 3) @[el2_lsu_bus_buffer.scala 561:104] - node _T_4466 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 561:120] - node _T_4467 = eq(_T_4466, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 561:110] - node _T_4468 = and(_T_4465, _T_4467) @[el2_lsu_bus_buffer.scala 561:108] - node _T_4469 = mux(_T_4449, _T_4453, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4470 = mux(_T_4454, _T_4458, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4471 = mux(_T_4459, _T_4463, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4472 = mux(_T_4464, _T_4468, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4473 = or(_T_4469, _T_4470) @[Mux.scala 27:72] - node _T_4474 = or(_T_4473, _T_4471) @[Mux.scala 27:72] - node _T_4475 = or(_T_4474, _T_4472) @[Mux.scala 27:72] - wire _T_4476 : UInt<1> @[Mux.scala 27:72] - _T_4476 <= _T_4475 @[Mux.scala 27:72] - io.lsu_nonblock_load_data_error <= _T_4476 @[el2_lsu_bus_buffer.scala 561:35] - node _T_4477 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 562:79] - node _T_4478 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 562:102] - node _T_4479 = eq(_T_4478, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 562:92] - node _T_4480 = and(_T_4477, _T_4479) @[el2_lsu_bus_buffer.scala 562:90] - node _T_4481 = eq(buf_dual[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 562:109] - node _T_4482 = eq(buf_dualhi[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 562:124] - node _T_4483 = or(_T_4481, _T_4482) @[el2_lsu_bus_buffer.scala 562:122] - node _T_4484 = and(_T_4480, _T_4483) @[el2_lsu_bus_buffer.scala 562:106] - node _T_4485 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 562:79] - node _T_4486 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 562:102] - node _T_4487 = eq(_T_4486, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 562:92] - node _T_4488 = and(_T_4485, _T_4487) @[el2_lsu_bus_buffer.scala 562:90] - node _T_4489 = eq(buf_dual[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 562:109] - node _T_4490 = eq(buf_dualhi[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 562:124] - node _T_4491 = or(_T_4489, _T_4490) @[el2_lsu_bus_buffer.scala 562:122] - node _T_4492 = and(_T_4488, _T_4491) @[el2_lsu_bus_buffer.scala 562:106] - node _T_4493 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 562:79] - node _T_4494 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 562:102] - node _T_4495 = eq(_T_4494, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 562:92] - node _T_4496 = and(_T_4493, _T_4495) @[el2_lsu_bus_buffer.scala 562:90] - node _T_4497 = eq(buf_dual[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 562:109] - node _T_4498 = eq(buf_dualhi[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 562:124] - node _T_4499 = or(_T_4497, _T_4498) @[el2_lsu_bus_buffer.scala 562:122] - node _T_4500 = and(_T_4496, _T_4499) @[el2_lsu_bus_buffer.scala 562:106] - node _T_4501 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 562:79] - node _T_4502 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 562:102] - node _T_4503 = eq(_T_4502, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 562:92] - node _T_4504 = and(_T_4501, _T_4503) @[el2_lsu_bus_buffer.scala 562:90] - node _T_4505 = eq(buf_dual[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 562:109] - node _T_4506 = eq(buf_dualhi[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 562:124] - node _T_4507 = or(_T_4505, _T_4506) @[el2_lsu_bus_buffer.scala 562:122] - node _T_4508 = and(_T_4504, _T_4507) @[el2_lsu_bus_buffer.scala 562:106] - node _T_4509 = mux(_T_4484, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4510 = mux(_T_4492, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4511 = mux(_T_4500, UInt<2>("h02"), UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4512 = mux(_T_4508, UInt<2>("h03"), UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4513 = or(_T_4509, _T_4510) @[Mux.scala 27:72] - node _T_4514 = or(_T_4513, _T_4511) @[Mux.scala 27:72] - node _T_4515 = or(_T_4514, _T_4512) @[Mux.scala 27:72] - wire _T_4516 : UInt<2> @[Mux.scala 27:72] - _T_4516 <= _T_4515 @[Mux.scala 27:72] - io.lsu_nonblock_load_data_tag <= _T_4516 @[el2_lsu_bus_buffer.scala 562:33] - node _T_4517 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 563:78] - node _T_4518 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 563:101] - node _T_4519 = eq(_T_4518, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 563:91] - node _T_4520 = and(_T_4517, _T_4519) @[el2_lsu_bus_buffer.scala 563:89] - node _T_4521 = eq(buf_dual[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 563:108] - node _T_4522 = eq(buf_dualhi[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 563:123] - node _T_4523 = or(_T_4521, _T_4522) @[el2_lsu_bus_buffer.scala 563:121] - node _T_4524 = and(_T_4520, _T_4523) @[el2_lsu_bus_buffer.scala 563:105] - node _T_4525 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 563:78] - node _T_4526 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 563:101] - node _T_4527 = eq(_T_4526, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 563:91] - node _T_4528 = and(_T_4525, _T_4527) @[el2_lsu_bus_buffer.scala 563:89] - node _T_4529 = eq(buf_dual[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 563:108] - node _T_4530 = eq(buf_dualhi[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 563:123] - node _T_4531 = or(_T_4529, _T_4530) @[el2_lsu_bus_buffer.scala 563:121] - node _T_4532 = and(_T_4528, _T_4531) @[el2_lsu_bus_buffer.scala 563:105] - node _T_4533 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 563:78] - node _T_4534 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 563:101] - node _T_4535 = eq(_T_4534, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 563:91] - node _T_4536 = and(_T_4533, _T_4535) @[el2_lsu_bus_buffer.scala 563:89] - node _T_4537 = eq(buf_dual[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 563:108] - node _T_4538 = eq(buf_dualhi[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 563:123] - node _T_4539 = or(_T_4537, _T_4538) @[el2_lsu_bus_buffer.scala 563:121] - node _T_4540 = and(_T_4536, _T_4539) @[el2_lsu_bus_buffer.scala 563:105] - node _T_4541 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 563:78] - node _T_4542 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 563:101] - node _T_4543 = eq(_T_4542, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 563:91] - node _T_4544 = and(_T_4541, _T_4543) @[el2_lsu_bus_buffer.scala 563:89] - node _T_4545 = eq(buf_dual[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 563:108] - node _T_4546 = eq(buf_dualhi[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 563:123] - node _T_4547 = or(_T_4545, _T_4546) @[el2_lsu_bus_buffer.scala 563:121] - node _T_4548 = and(_T_4544, _T_4547) @[el2_lsu_bus_buffer.scala 563:105] - node _T_4549 = mux(_T_4524, buf_data[0], UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4550 = mux(_T_4532, buf_data[1], UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4551 = mux(_T_4540, buf_data[2], UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4552 = mux(_T_4548, buf_data[3], UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4553 = or(_T_4549, _T_4550) @[Mux.scala 27:72] - node _T_4554 = or(_T_4553, _T_4551) @[Mux.scala 27:72] - node _T_4555 = or(_T_4554, _T_4552) @[Mux.scala 27:72] + lsu_nonblock_load_data_ready <= _T_4451 @[Mux.scala 27:72] + node _T_4452 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 562:80] + node _T_4453 = bits(buf_error, 0, 0) @[el2_lsu_bus_buffer.scala 562:104] + node _T_4454 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 562:120] + node _T_4455 = eq(_T_4454, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 562:110] + node _T_4456 = and(_T_4453, _T_4455) @[el2_lsu_bus_buffer.scala 562:108] + node _T_4457 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 562:80] + node _T_4458 = bits(buf_error, 1, 1) @[el2_lsu_bus_buffer.scala 562:104] + node _T_4459 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 562:120] + node _T_4460 = eq(_T_4459, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 562:110] + node _T_4461 = and(_T_4458, _T_4460) @[el2_lsu_bus_buffer.scala 562:108] + node _T_4462 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 562:80] + node _T_4463 = bits(buf_error, 2, 2) @[el2_lsu_bus_buffer.scala 562:104] + node _T_4464 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 562:120] + node _T_4465 = eq(_T_4464, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 562:110] + node _T_4466 = and(_T_4463, _T_4465) @[el2_lsu_bus_buffer.scala 562:108] + node _T_4467 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 562:80] + node _T_4468 = bits(buf_error, 3, 3) @[el2_lsu_bus_buffer.scala 562:104] + node _T_4469 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 562:120] + node _T_4470 = eq(_T_4469, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 562:110] + node _T_4471 = and(_T_4468, _T_4470) @[el2_lsu_bus_buffer.scala 562:108] + node _T_4472 = mux(_T_4452, _T_4456, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4473 = mux(_T_4457, _T_4461, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4474 = mux(_T_4462, _T_4466, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4475 = mux(_T_4467, _T_4471, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4476 = or(_T_4472, _T_4473) @[Mux.scala 27:72] + node _T_4477 = or(_T_4476, _T_4474) @[Mux.scala 27:72] + node _T_4478 = or(_T_4477, _T_4475) @[Mux.scala 27:72] + wire _T_4479 : UInt<1> @[Mux.scala 27:72] + _T_4479 <= _T_4478 @[Mux.scala 27:72] + io.lsu_nonblock_load_data_error <= _T_4479 @[el2_lsu_bus_buffer.scala 562:35] + node _T_4480 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 563:79] + node _T_4481 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 563:102] + node _T_4482 = eq(_T_4481, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 563:92] + node _T_4483 = and(_T_4480, _T_4482) @[el2_lsu_bus_buffer.scala 563:90] + node _T_4484 = eq(buf_dual[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 563:109] + node _T_4485 = eq(buf_dualhi[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 563:124] + node _T_4486 = or(_T_4484, _T_4485) @[el2_lsu_bus_buffer.scala 563:122] + node _T_4487 = and(_T_4483, _T_4486) @[el2_lsu_bus_buffer.scala 563:106] + node _T_4488 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 563:79] + node _T_4489 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 563:102] + node _T_4490 = eq(_T_4489, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 563:92] + node _T_4491 = and(_T_4488, _T_4490) @[el2_lsu_bus_buffer.scala 563:90] + node _T_4492 = eq(buf_dual[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 563:109] + node _T_4493 = eq(buf_dualhi[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 563:124] + node _T_4494 = or(_T_4492, _T_4493) @[el2_lsu_bus_buffer.scala 563:122] + node _T_4495 = and(_T_4491, _T_4494) @[el2_lsu_bus_buffer.scala 563:106] + node _T_4496 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 563:79] + node _T_4497 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 563:102] + node _T_4498 = eq(_T_4497, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 563:92] + node _T_4499 = and(_T_4496, _T_4498) @[el2_lsu_bus_buffer.scala 563:90] + node _T_4500 = eq(buf_dual[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 563:109] + node _T_4501 = eq(buf_dualhi[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 563:124] + node _T_4502 = or(_T_4500, _T_4501) @[el2_lsu_bus_buffer.scala 563:122] + node _T_4503 = and(_T_4499, _T_4502) @[el2_lsu_bus_buffer.scala 563:106] + node _T_4504 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 563:79] + node _T_4505 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 563:102] + node _T_4506 = eq(_T_4505, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 563:92] + node _T_4507 = and(_T_4504, _T_4506) @[el2_lsu_bus_buffer.scala 563:90] + node _T_4508 = eq(buf_dual[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 563:109] + node _T_4509 = eq(buf_dualhi[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 563:124] + node _T_4510 = or(_T_4508, _T_4509) @[el2_lsu_bus_buffer.scala 563:122] + node _T_4511 = and(_T_4507, _T_4510) @[el2_lsu_bus_buffer.scala 563:106] + node _T_4512 = mux(_T_4487, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4513 = mux(_T_4495, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4514 = mux(_T_4503, UInt<2>("h02"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4515 = mux(_T_4511, UInt<2>("h03"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4516 = or(_T_4512, _T_4513) @[Mux.scala 27:72] + node _T_4517 = or(_T_4516, _T_4514) @[Mux.scala 27:72] + node _T_4518 = or(_T_4517, _T_4515) @[Mux.scala 27:72] + wire _T_4519 : UInt<2> @[Mux.scala 27:72] + _T_4519 <= _T_4518 @[Mux.scala 27:72] + io.lsu_nonblock_load_data_tag <= _T_4519 @[el2_lsu_bus_buffer.scala 563:33] + node _T_4520 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 564:78] + node _T_4521 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 564:101] + node _T_4522 = eq(_T_4521, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 564:91] + node _T_4523 = and(_T_4520, _T_4522) @[el2_lsu_bus_buffer.scala 564:89] + node _T_4524 = eq(buf_dual[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 564:108] + node _T_4525 = eq(buf_dualhi[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 564:123] + node _T_4526 = or(_T_4524, _T_4525) @[el2_lsu_bus_buffer.scala 564:121] + node _T_4527 = and(_T_4523, _T_4526) @[el2_lsu_bus_buffer.scala 564:105] + node _T_4528 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 564:78] + node _T_4529 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 564:101] + node _T_4530 = eq(_T_4529, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 564:91] + node _T_4531 = and(_T_4528, _T_4530) @[el2_lsu_bus_buffer.scala 564:89] + node _T_4532 = eq(buf_dual[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 564:108] + node _T_4533 = eq(buf_dualhi[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 564:123] + node _T_4534 = or(_T_4532, _T_4533) @[el2_lsu_bus_buffer.scala 564:121] + node _T_4535 = and(_T_4531, _T_4534) @[el2_lsu_bus_buffer.scala 564:105] + node _T_4536 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 564:78] + node _T_4537 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 564:101] + node _T_4538 = eq(_T_4537, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 564:91] + node _T_4539 = and(_T_4536, _T_4538) @[el2_lsu_bus_buffer.scala 564:89] + node _T_4540 = eq(buf_dual[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 564:108] + node _T_4541 = eq(buf_dualhi[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 564:123] + node _T_4542 = or(_T_4540, _T_4541) @[el2_lsu_bus_buffer.scala 564:121] + node _T_4543 = and(_T_4539, _T_4542) @[el2_lsu_bus_buffer.scala 564:105] + node _T_4544 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 564:78] + node _T_4545 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 564:101] + node _T_4546 = eq(_T_4545, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 564:91] + node _T_4547 = and(_T_4544, _T_4546) @[el2_lsu_bus_buffer.scala 564:89] + node _T_4548 = eq(buf_dual[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 564:108] + node _T_4549 = eq(buf_dualhi[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 564:123] + node _T_4550 = or(_T_4548, _T_4549) @[el2_lsu_bus_buffer.scala 564:121] + node _T_4551 = and(_T_4547, _T_4550) @[el2_lsu_bus_buffer.scala 564:105] + node _T_4552 = mux(_T_4527, buf_data[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4553 = mux(_T_4535, buf_data[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4554 = mux(_T_4543, buf_data[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4555 = mux(_T_4551, buf_data[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4556 = or(_T_4552, _T_4553) @[Mux.scala 27:72] + node _T_4557 = or(_T_4556, _T_4554) @[Mux.scala 27:72] + node _T_4558 = or(_T_4557, _T_4555) @[Mux.scala 27:72] wire lsu_nonblock_load_data_lo : UInt<32> @[Mux.scala 27:72] - lsu_nonblock_load_data_lo <= _T_4555 @[Mux.scala 27:72] - node _T_4556 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 564:78] - node _T_4557 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 564:101] - node _T_4558 = eq(_T_4557, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 564:91] - node _T_4559 = and(_T_4556, _T_4558) @[el2_lsu_bus_buffer.scala 564:89] - node _T_4560 = or(buf_dual[0], buf_dualhi[0]) @[el2_lsu_bus_buffer.scala 564:120] - node _T_4561 = and(_T_4559, _T_4560) @[el2_lsu_bus_buffer.scala 564:105] - node _T_4562 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 564:78] - node _T_4563 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 564:101] - node _T_4564 = eq(_T_4563, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 564:91] - node _T_4565 = and(_T_4562, _T_4564) @[el2_lsu_bus_buffer.scala 564:89] - node _T_4566 = or(buf_dual[1], buf_dualhi[1]) @[el2_lsu_bus_buffer.scala 564:120] - node _T_4567 = and(_T_4565, _T_4566) @[el2_lsu_bus_buffer.scala 564:105] - node _T_4568 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 564:78] - node _T_4569 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 564:101] - node _T_4570 = eq(_T_4569, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 564:91] - node _T_4571 = and(_T_4568, _T_4570) @[el2_lsu_bus_buffer.scala 564:89] - node _T_4572 = or(buf_dual[2], buf_dualhi[2]) @[el2_lsu_bus_buffer.scala 564:120] - node _T_4573 = and(_T_4571, _T_4572) @[el2_lsu_bus_buffer.scala 564:105] - node _T_4574 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 564:78] - node _T_4575 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 564:101] - node _T_4576 = eq(_T_4575, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 564:91] - node _T_4577 = and(_T_4574, _T_4576) @[el2_lsu_bus_buffer.scala 564:89] - node _T_4578 = or(buf_dual[3], buf_dualhi[3]) @[el2_lsu_bus_buffer.scala 564:120] - node _T_4579 = and(_T_4577, _T_4578) @[el2_lsu_bus_buffer.scala 564:105] - node _T_4580 = mux(_T_4561, buf_data[0], UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4581 = mux(_T_4567, buf_data[1], UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4582 = mux(_T_4573, buf_data[2], UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4583 = mux(_T_4579, buf_data[3], UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4584 = or(_T_4580, _T_4581) @[Mux.scala 27:72] - node _T_4585 = or(_T_4584, _T_4582) @[Mux.scala 27:72] - node _T_4586 = or(_T_4585, _T_4583) @[Mux.scala 27:72] + lsu_nonblock_load_data_lo <= _T_4558 @[Mux.scala 27:72] + node _T_4559 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 565:78] + node _T_4560 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 565:101] + node _T_4561 = eq(_T_4560, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 565:91] + node _T_4562 = and(_T_4559, _T_4561) @[el2_lsu_bus_buffer.scala 565:89] + node _T_4563 = or(buf_dual[0], buf_dualhi[0]) @[el2_lsu_bus_buffer.scala 565:120] + node _T_4564 = and(_T_4562, _T_4563) @[el2_lsu_bus_buffer.scala 565:105] + node _T_4565 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 565:78] + node _T_4566 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 565:101] + node _T_4567 = eq(_T_4566, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 565:91] + node _T_4568 = and(_T_4565, _T_4567) @[el2_lsu_bus_buffer.scala 565:89] + node _T_4569 = or(buf_dual[1], buf_dualhi[1]) @[el2_lsu_bus_buffer.scala 565:120] + node _T_4570 = and(_T_4568, _T_4569) @[el2_lsu_bus_buffer.scala 565:105] + node _T_4571 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 565:78] + node _T_4572 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 565:101] + node _T_4573 = eq(_T_4572, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 565:91] + node _T_4574 = and(_T_4571, _T_4573) @[el2_lsu_bus_buffer.scala 565:89] + node _T_4575 = or(buf_dual[2], buf_dualhi[2]) @[el2_lsu_bus_buffer.scala 565:120] + node _T_4576 = and(_T_4574, _T_4575) @[el2_lsu_bus_buffer.scala 565:105] + node _T_4577 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 565:78] + node _T_4578 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 565:101] + node _T_4579 = eq(_T_4578, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 565:91] + node _T_4580 = and(_T_4577, _T_4579) @[el2_lsu_bus_buffer.scala 565:89] + node _T_4581 = or(buf_dual[3], buf_dualhi[3]) @[el2_lsu_bus_buffer.scala 565:120] + node _T_4582 = and(_T_4580, _T_4581) @[el2_lsu_bus_buffer.scala 565:105] + node _T_4583 = mux(_T_4564, buf_data[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4584 = mux(_T_4570, buf_data[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4585 = mux(_T_4576, buf_data[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4586 = mux(_T_4582, buf_data[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4587 = or(_T_4583, _T_4584) @[Mux.scala 27:72] + node _T_4588 = or(_T_4587, _T_4585) @[Mux.scala 27:72] + node _T_4589 = or(_T_4588, _T_4586) @[Mux.scala 27:72] wire lsu_nonblock_load_data_hi : UInt<32> @[Mux.scala 27:72] - lsu_nonblock_load_data_hi <= _T_4586 @[Mux.scala 27:72] - node _T_4587 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 114:123] - node _T_4588 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 114:123] - node _T_4589 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 114:123] - node _T_4590 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 114:123] - node _T_4591 = mux(_T_4587, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4592 = mux(_T_4588, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4593 = mux(_T_4589, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4594 = mux(_T_4590, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4595 = or(_T_4591, _T_4592) @[Mux.scala 27:72] - node _T_4596 = or(_T_4595, _T_4593) @[Mux.scala 27:72] - node _T_4597 = or(_T_4596, _T_4594) @[Mux.scala 27:72] - wire _T_4598 : UInt<32> @[Mux.scala 27:72] - _T_4598 <= _T_4597 @[Mux.scala 27:72] - node lsu_nonblock_addr_offset = bits(_T_4598, 1, 0) @[el2_lsu_bus_buffer.scala 565:83] - node _T_4599 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 114:123] - node _T_4600 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 114:123] - node _T_4601 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 114:123] - node _T_4602 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 114:123] - node _T_4603 = mux(_T_4599, buf_sz[0], UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4604 = mux(_T_4600, buf_sz[1], UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4605 = mux(_T_4601, buf_sz[2], UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4606 = mux(_T_4602, buf_sz[3], UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4607 = or(_T_4603, _T_4604) @[Mux.scala 27:72] - node _T_4608 = or(_T_4607, _T_4605) @[Mux.scala 27:72] - node _T_4609 = or(_T_4608, _T_4606) @[Mux.scala 27:72] + lsu_nonblock_load_data_hi <= _T_4589 @[Mux.scala 27:72] + node _T_4590 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 114:123] + node _T_4591 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 114:123] + node _T_4592 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 114:123] + node _T_4593 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 114:123] + node _T_4594 = mux(_T_4590, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4595 = mux(_T_4591, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4596 = mux(_T_4592, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4597 = mux(_T_4593, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4598 = or(_T_4594, _T_4595) @[Mux.scala 27:72] + node _T_4599 = or(_T_4598, _T_4596) @[Mux.scala 27:72] + node _T_4600 = or(_T_4599, _T_4597) @[Mux.scala 27:72] + wire _T_4601 : UInt<32> @[Mux.scala 27:72] + _T_4601 <= _T_4600 @[Mux.scala 27:72] + node lsu_nonblock_addr_offset = bits(_T_4601, 1, 0) @[el2_lsu_bus_buffer.scala 566:83] + node _T_4602 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 114:123] + node _T_4603 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 114:123] + node _T_4604 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 114:123] + node _T_4605 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 114:123] + node _T_4606 = mux(_T_4602, buf_sz[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4607 = mux(_T_4603, buf_sz[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4608 = mux(_T_4604, buf_sz[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4609 = mux(_T_4605, buf_sz[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4610 = or(_T_4606, _T_4607) @[Mux.scala 27:72] + node _T_4611 = or(_T_4610, _T_4608) @[Mux.scala 27:72] + node _T_4612 = or(_T_4611, _T_4609) @[Mux.scala 27:72] wire lsu_nonblock_sz : UInt<2> @[Mux.scala 27:72] - lsu_nonblock_sz <= _T_4609 @[Mux.scala 27:72] - node _T_4610 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 113:118] - node _T_4611 = bits(buf_unsign, 0, 0) @[el2_lsu_bus_buffer.scala 113:129] - node _T_4612 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 113:118] - node _T_4613 = bits(buf_unsign, 1, 1) @[el2_lsu_bus_buffer.scala 113:129] - node _T_4614 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 113:118] - node _T_4615 = bits(buf_unsign, 2, 2) @[el2_lsu_bus_buffer.scala 113:129] - node _T_4616 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 113:118] - node _T_4617 = bits(buf_unsign, 3, 3) @[el2_lsu_bus_buffer.scala 113:129] - node _T_4618 = mux(_T_4610, _T_4611, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4619 = mux(_T_4612, _T_4613, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4620 = mux(_T_4614, _T_4615, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4621 = mux(_T_4616, _T_4617, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4622 = or(_T_4618, _T_4619) @[Mux.scala 27:72] - node _T_4623 = or(_T_4622, _T_4620) @[Mux.scala 27:72] - node _T_4624 = or(_T_4623, _T_4621) @[Mux.scala 27:72] + lsu_nonblock_sz <= _T_4612 @[Mux.scala 27:72] + node _T_4613 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 113:118] + node _T_4614 = bits(buf_unsign, 0, 0) @[el2_lsu_bus_buffer.scala 113:129] + node _T_4615 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 113:118] + node _T_4616 = bits(buf_unsign, 1, 1) @[el2_lsu_bus_buffer.scala 113:129] + node _T_4617 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 113:118] + node _T_4618 = bits(buf_unsign, 2, 2) @[el2_lsu_bus_buffer.scala 113:129] + node _T_4619 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 113:118] + node _T_4620 = bits(buf_unsign, 3, 3) @[el2_lsu_bus_buffer.scala 113:129] + node _T_4621 = mux(_T_4613, _T_4614, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4622 = mux(_T_4615, _T_4616, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4623 = mux(_T_4617, _T_4618, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4624 = mux(_T_4619, _T_4620, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4625 = or(_T_4621, _T_4622) @[Mux.scala 27:72] + node _T_4626 = or(_T_4625, _T_4623) @[Mux.scala 27:72] + node _T_4627 = or(_T_4626, _T_4624) @[Mux.scala 27:72] wire lsu_nonblock_unsign : UInt<1> @[Mux.scala 27:72] - lsu_nonblock_unsign <= _T_4624 @[Mux.scala 27:72] - node _T_4625 = cat(buf_dual[3], buf_dual[2]) @[Cat.scala 29:58] - node _T_4626 = cat(_T_4625, buf_dual[1]) @[Cat.scala 29:58] - node _T_4627 = cat(_T_4626, buf_dual[0]) @[Cat.scala 29:58] - node _T_4628 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 113:118] - node _T_4629 = bits(_T_4627, 0, 0) @[el2_lsu_bus_buffer.scala 113:129] - node _T_4630 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 113:118] - node _T_4631 = bits(_T_4627, 1, 1) @[el2_lsu_bus_buffer.scala 113:129] - node _T_4632 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 113:118] - node _T_4633 = bits(_T_4627, 2, 2) @[el2_lsu_bus_buffer.scala 113:129] - node _T_4634 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 113:118] - node _T_4635 = bits(_T_4627, 3, 3) @[el2_lsu_bus_buffer.scala 113:129] - node _T_4636 = mux(_T_4628, _T_4629, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4637 = mux(_T_4630, _T_4631, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4638 = mux(_T_4632, _T_4633, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4639 = mux(_T_4634, _T_4635, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4640 = or(_T_4636, _T_4637) @[Mux.scala 27:72] - node _T_4641 = or(_T_4640, _T_4638) @[Mux.scala 27:72] - node _T_4642 = or(_T_4641, _T_4639) @[Mux.scala 27:72] + lsu_nonblock_unsign <= _T_4627 @[Mux.scala 27:72] + node _T_4628 = cat(buf_dual[3], buf_dual[2]) @[Cat.scala 29:58] + node _T_4629 = cat(_T_4628, buf_dual[1]) @[Cat.scala 29:58] + node _T_4630 = cat(_T_4629, buf_dual[0]) @[Cat.scala 29:58] + node _T_4631 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 113:118] + node _T_4632 = bits(_T_4630, 0, 0) @[el2_lsu_bus_buffer.scala 113:129] + node _T_4633 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 113:118] + node _T_4634 = bits(_T_4630, 1, 1) @[el2_lsu_bus_buffer.scala 113:129] + node _T_4635 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 113:118] + node _T_4636 = bits(_T_4630, 2, 2) @[el2_lsu_bus_buffer.scala 113:129] + node _T_4637 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 113:118] + node _T_4638 = bits(_T_4630, 3, 3) @[el2_lsu_bus_buffer.scala 113:129] + node _T_4639 = mux(_T_4631, _T_4632, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4640 = mux(_T_4633, _T_4634, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4641 = mux(_T_4635, _T_4636, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4642 = mux(_T_4637, _T_4638, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4643 = or(_T_4639, _T_4640) @[Mux.scala 27:72] + node _T_4644 = or(_T_4643, _T_4641) @[Mux.scala 27:72] + node _T_4645 = or(_T_4644, _T_4642) @[Mux.scala 27:72] wire lsu_nonblock_dual : UInt<1> @[Mux.scala 27:72] - lsu_nonblock_dual <= _T_4642 @[Mux.scala 27:72] - node _T_4643 = cat(lsu_nonblock_load_data_hi, lsu_nonblock_load_data_lo) @[Cat.scala 29:58] - node _T_4644 = mul(lsu_nonblock_addr_offset, UInt<4>("h08")) @[el2_lsu_bus_buffer.scala 569:121] - node lsu_nonblock_data_unalgn = dshr(_T_4643, _T_4644) @[el2_lsu_bus_buffer.scala 569:92] - io.data_hi <= lsu_nonblock_load_data_hi @[el2_lsu_bus_buffer.scala 570:14] - io.data_lo <= lsu_nonblock_load_data_lo @[el2_lsu_bus_buffer.scala 571:14] - node _T_4645 = eq(io.lsu_nonblock_load_data_error, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 572:69] - node _T_4646 = and(lsu_nonblock_load_data_ready, _T_4645) @[el2_lsu_bus_buffer.scala 572:67] - io.lsu_nonblock_load_data_valid <= _T_4646 @[el2_lsu_bus_buffer.scala 572:35] - node _T_4647 = eq(lsu_nonblock_sz, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 573:81] - node _T_4648 = and(lsu_nonblock_unsign, _T_4647) @[el2_lsu_bus_buffer.scala 573:63] - node _T_4649 = bits(lsu_nonblock_data_unalgn, 7, 0) @[el2_lsu_bus_buffer.scala 573:131] - node _T_4650 = cat(UInt<24>("h00"), _T_4649) @[Cat.scala 29:58] - node _T_4651 = eq(lsu_nonblock_sz, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 574:45] - node _T_4652 = and(lsu_nonblock_unsign, _T_4651) @[el2_lsu_bus_buffer.scala 574:26] - node _T_4653 = bits(lsu_nonblock_data_unalgn, 15, 0) @[el2_lsu_bus_buffer.scala 574:95] - node _T_4654 = cat(UInt<16>("h00"), _T_4653) @[Cat.scala 29:58] - node _T_4655 = eq(lsu_nonblock_unsign, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 575:6] - node _T_4656 = eq(lsu_nonblock_sz, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 575:45] - node _T_4657 = and(_T_4655, _T_4656) @[el2_lsu_bus_buffer.scala 575:27] - node _T_4658 = bits(lsu_nonblock_data_unalgn, 7, 7) @[el2_lsu_bus_buffer.scala 575:93] - node _T_4659 = bits(_T_4658, 0, 0) @[Bitwise.scala 72:15] - node _T_4660 = mux(_T_4659, UInt<24>("h0ffffff"), UInt<24>("h00")) @[Bitwise.scala 72:12] - node _T_4661 = bits(lsu_nonblock_data_unalgn, 7, 0) @[el2_lsu_bus_buffer.scala 575:123] - node _T_4662 = cat(_T_4660, _T_4661) @[Cat.scala 29:58] - node _T_4663 = eq(lsu_nonblock_unsign, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 576:6] - node _T_4664 = eq(lsu_nonblock_sz, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 576:45] - node _T_4665 = and(_T_4663, _T_4664) @[el2_lsu_bus_buffer.scala 576:27] - node _T_4666 = bits(lsu_nonblock_data_unalgn, 15, 15) @[el2_lsu_bus_buffer.scala 576:93] - node _T_4667 = bits(_T_4666, 0, 0) @[Bitwise.scala 72:15] - node _T_4668 = mux(_T_4667, UInt<16>("h0ffff"), UInt<16>("h00")) @[Bitwise.scala 72:12] - node _T_4669 = bits(lsu_nonblock_data_unalgn, 15, 0) @[el2_lsu_bus_buffer.scala 576:124] - node _T_4670 = cat(_T_4668, _T_4669) @[Cat.scala 29:58] - node _T_4671 = eq(lsu_nonblock_sz, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 577:21] - node _T_4672 = mux(_T_4648, _T_4650, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4673 = mux(_T_4652, _T_4654, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4674 = mux(_T_4657, _T_4662, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4675 = mux(_T_4665, _T_4670, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4676 = mux(_T_4671, lsu_nonblock_data_unalgn, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4677 = or(_T_4672, _T_4673) @[Mux.scala 27:72] - node _T_4678 = or(_T_4677, _T_4674) @[Mux.scala 27:72] - node _T_4679 = or(_T_4678, _T_4675) @[Mux.scala 27:72] - node _T_4680 = or(_T_4679, _T_4676) @[Mux.scala 27:72] - wire _T_4681 : UInt<64> @[Mux.scala 27:72] - _T_4681 <= _T_4680 @[Mux.scala 27:72] - io.lsu_nonblock_load_data <= _T_4681 @[el2_lsu_bus_buffer.scala 573:29] - node _T_4682 = eq(buf_state[0], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 578:62] - node _T_4683 = bits(buf_sideeffect, 0, 0) @[el2_lsu_bus_buffer.scala 578:89] - node _T_4684 = and(_T_4682, _T_4683) @[el2_lsu_bus_buffer.scala 578:73] - node _T_4685 = and(_T_4684, io.dec_tlu_sideeffect_posted_disable) @[el2_lsu_bus_buffer.scala 578:93] - node _T_4686 = eq(buf_state[1], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 578:62] - node _T_4687 = bits(buf_sideeffect, 1, 1) @[el2_lsu_bus_buffer.scala 578:89] - node _T_4688 = and(_T_4686, _T_4687) @[el2_lsu_bus_buffer.scala 578:73] - node _T_4689 = and(_T_4688, io.dec_tlu_sideeffect_posted_disable) @[el2_lsu_bus_buffer.scala 578:93] - node _T_4690 = eq(buf_state[2], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 578:62] - node _T_4691 = bits(buf_sideeffect, 2, 2) @[el2_lsu_bus_buffer.scala 578:89] - node _T_4692 = and(_T_4690, _T_4691) @[el2_lsu_bus_buffer.scala 578:73] - node _T_4693 = and(_T_4692, io.dec_tlu_sideeffect_posted_disable) @[el2_lsu_bus_buffer.scala 578:93] - node _T_4694 = eq(buf_state[3], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 578:62] - node _T_4695 = bits(buf_sideeffect, 3, 3) @[el2_lsu_bus_buffer.scala 578:89] - node _T_4696 = and(_T_4694, _T_4695) @[el2_lsu_bus_buffer.scala 578:73] - node _T_4697 = and(_T_4696, io.dec_tlu_sideeffect_posted_disable) @[el2_lsu_bus_buffer.scala 578:93] - node _T_4698 = or(_T_4685, _T_4689) @[el2_lsu_bus_buffer.scala 578:141] - node _T_4699 = or(_T_4698, _T_4693) @[el2_lsu_bus_buffer.scala 578:141] - node _T_4700 = or(_T_4699, _T_4697) @[el2_lsu_bus_buffer.scala 578:141] - bus_sideeffect_pend <= _T_4700 @[el2_lsu_bus_buffer.scala 578:23] - node _T_4701 = eq(buf_state[0], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 579:71] - node _T_4702 = and(UInt<1>("h01"), obuf_valid) @[el2_lsu_bus_buffer.scala 580:25] - node _T_4703 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 580:50] - node _T_4704 = bits(buf_addr[0], 31, 3) @[el2_lsu_bus_buffer.scala 580:70] - node _T_4705 = eq(_T_4703, _T_4704) @[el2_lsu_bus_buffer.scala 580:56] - node _T_4706 = and(_T_4702, _T_4705) @[el2_lsu_bus_buffer.scala 580:38] - node _T_4707 = eq(obuf_tag0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 580:92] - node _T_4708 = eq(obuf_tag1, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 580:126] - node _T_4709 = and(obuf_merge, _T_4708) @[el2_lsu_bus_buffer.scala 580:114] - node _T_4710 = or(_T_4707, _T_4709) @[el2_lsu_bus_buffer.scala 580:100] - node _T_4711 = eq(_T_4710, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 580:80] - node _T_4712 = and(_T_4706, _T_4711) @[el2_lsu_bus_buffer.scala 580:78] - node _T_4713 = eq(buf_state[1], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 579:71] - node _T_4714 = and(UInt<1>("h01"), obuf_valid) @[el2_lsu_bus_buffer.scala 580:25] - node _T_4715 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 580:50] - node _T_4716 = bits(buf_addr[1], 31, 3) @[el2_lsu_bus_buffer.scala 580:70] - node _T_4717 = eq(_T_4715, _T_4716) @[el2_lsu_bus_buffer.scala 580:56] - node _T_4718 = and(_T_4714, _T_4717) @[el2_lsu_bus_buffer.scala 580:38] - node _T_4719 = eq(obuf_tag0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 580:92] - node _T_4720 = eq(obuf_tag1, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 580:126] - node _T_4721 = and(obuf_merge, _T_4720) @[el2_lsu_bus_buffer.scala 580:114] - node _T_4722 = or(_T_4719, _T_4721) @[el2_lsu_bus_buffer.scala 580:100] - node _T_4723 = eq(_T_4722, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 580:80] - node _T_4724 = and(_T_4718, _T_4723) @[el2_lsu_bus_buffer.scala 580:78] - node _T_4725 = eq(buf_state[2], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 579:71] - node _T_4726 = and(UInt<1>("h01"), obuf_valid) @[el2_lsu_bus_buffer.scala 580:25] - node _T_4727 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 580:50] - node _T_4728 = bits(buf_addr[2], 31, 3) @[el2_lsu_bus_buffer.scala 580:70] - node _T_4729 = eq(_T_4727, _T_4728) @[el2_lsu_bus_buffer.scala 580:56] - node _T_4730 = and(_T_4726, _T_4729) @[el2_lsu_bus_buffer.scala 580:38] - node _T_4731 = eq(obuf_tag0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 580:92] - node _T_4732 = eq(obuf_tag1, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 580:126] - node _T_4733 = and(obuf_merge, _T_4732) @[el2_lsu_bus_buffer.scala 580:114] - node _T_4734 = or(_T_4731, _T_4733) @[el2_lsu_bus_buffer.scala 580:100] - node _T_4735 = eq(_T_4734, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 580:80] - node _T_4736 = and(_T_4730, _T_4735) @[el2_lsu_bus_buffer.scala 580:78] - node _T_4737 = eq(buf_state[3], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 579:71] - node _T_4738 = and(UInt<1>("h01"), obuf_valid) @[el2_lsu_bus_buffer.scala 580:25] - node _T_4739 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 580:50] - node _T_4740 = bits(buf_addr[3], 31, 3) @[el2_lsu_bus_buffer.scala 580:70] - node _T_4741 = eq(_T_4739, _T_4740) @[el2_lsu_bus_buffer.scala 580:56] - node _T_4742 = and(_T_4738, _T_4741) @[el2_lsu_bus_buffer.scala 580:38] - node _T_4743 = eq(obuf_tag0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 580:92] - node _T_4744 = eq(obuf_tag1, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 580:126] - node _T_4745 = and(obuf_merge, _T_4744) @[el2_lsu_bus_buffer.scala 580:114] - node _T_4746 = or(_T_4743, _T_4745) @[el2_lsu_bus_buffer.scala 580:100] - node _T_4747 = eq(_T_4746, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 580:80] - node _T_4748 = and(_T_4742, _T_4747) @[el2_lsu_bus_buffer.scala 580:78] - node _T_4749 = mux(_T_4701, _T_4712, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4750 = mux(_T_4713, _T_4724, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4751 = mux(_T_4725, _T_4736, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4752 = mux(_T_4737, _T_4748, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4753 = or(_T_4749, _T_4750) @[Mux.scala 27:72] - node _T_4754 = or(_T_4753, _T_4751) @[Mux.scala 27:72] - node _T_4755 = or(_T_4754, _T_4752) @[Mux.scala 27:72] - wire _T_4756 : UInt<1> @[Mux.scala 27:72] - _T_4756 <= _T_4755 @[Mux.scala 27:72] - bus_addr_match_pending <= _T_4756 @[el2_lsu_bus_buffer.scala 579:26] - node _T_4757 = or(obuf_cmd_done, obuf_data_done) @[el2_lsu_bus_buffer.scala 582:54] - node _T_4758 = mux(obuf_cmd_done, io.lsu_axi_wready, io.lsu_axi_awready) @[el2_lsu_bus_buffer.scala 582:75] - node _T_4759 = and(io.lsu_axi_awready, io.lsu_axi_awready) @[el2_lsu_bus_buffer.scala 582:150] - node _T_4760 = mux(_T_4757, _T_4758, _T_4759) @[el2_lsu_bus_buffer.scala 582:39] - node _T_4761 = mux(obuf_write, _T_4760, io.lsu_axi_arready) @[el2_lsu_bus_buffer.scala 582:23] - bus_cmd_ready <= _T_4761 @[el2_lsu_bus_buffer.scala 582:17] - node _T_4762 = and(io.lsu_axi_awvalid, io.lsu_axi_awready) @[el2_lsu_bus_buffer.scala 583:39] - bus_wcmd_sent <= _T_4762 @[el2_lsu_bus_buffer.scala 583:17] - node _T_4763 = and(io.lsu_axi_wvalid, io.lsu_axi_wready) @[el2_lsu_bus_buffer.scala 584:39] - bus_wdata_sent <= _T_4763 @[el2_lsu_bus_buffer.scala 584:18] - node _T_4764 = or(obuf_cmd_done, bus_wcmd_sent) @[el2_lsu_bus_buffer.scala 585:35] - node _T_4765 = or(obuf_data_done, bus_wdata_sent) @[el2_lsu_bus_buffer.scala 585:70] - node _T_4766 = and(_T_4764, _T_4765) @[el2_lsu_bus_buffer.scala 585:52] - node _T_4767 = and(io.lsu_axi_arvalid, io.lsu_axi_arready) @[el2_lsu_bus_buffer.scala 585:111] - node _T_4768 = or(_T_4766, _T_4767) @[el2_lsu_bus_buffer.scala 585:89] - bus_cmd_sent <= _T_4768 @[el2_lsu_bus_buffer.scala 585:16] - node _T_4769 = and(io.lsu_axi_rvalid, io.lsu_axi_rready) @[el2_lsu_bus_buffer.scala 586:37] - bus_rsp_read <= _T_4769 @[el2_lsu_bus_buffer.scala 586:16] - node _T_4770 = and(io.lsu_axi_bvalid, io.lsu_axi_bready) @[el2_lsu_bus_buffer.scala 587:38] - bus_rsp_write <= _T_4770 @[el2_lsu_bus_buffer.scala 587:17] - bus_rsp_read_tag <= io.lsu_axi_rid @[el2_lsu_bus_buffer.scala 588:20] - bus_rsp_write_tag <= io.lsu_axi_bid @[el2_lsu_bus_buffer.scala 589:21] - node _T_4771 = neq(io.lsu_axi_bresp, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 590:60] - node _T_4772 = and(bus_rsp_write, _T_4771) @[el2_lsu_bus_buffer.scala 590:40] - bus_rsp_write_error <= _T_4772 @[el2_lsu_bus_buffer.scala 590:23] - node _T_4773 = neq(io.lsu_axi_bresp, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 591:58] - node _T_4774 = and(bus_rsp_read, _T_4773) @[el2_lsu_bus_buffer.scala 591:38] - bus_rsp_read_error <= _T_4774 @[el2_lsu_bus_buffer.scala 591:22] - bus_rsp_rdata <= io.lsu_axi_rdata @[el2_lsu_bus_buffer.scala 592:17] - node _T_4775 = and(obuf_valid, obuf_write) @[el2_lsu_bus_buffer.scala 595:36] - node _T_4776 = eq(obuf_cmd_done, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 595:51] - node _T_4777 = and(_T_4775, _T_4776) @[el2_lsu_bus_buffer.scala 595:49] - node _T_4778 = eq(bus_addr_match_pending, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 595:68] - node _T_4779 = and(_T_4777, _T_4778) @[el2_lsu_bus_buffer.scala 595:66] - io.lsu_axi_awvalid <= _T_4779 @[el2_lsu_bus_buffer.scala 595:22] - io.lsu_axi_awid <= obuf_tag0 @[el2_lsu_bus_buffer.scala 596:19] - node _T_4780 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 597:69] - node _T_4781 = cat(_T_4780, UInt<3>("h00")) @[Cat.scala 29:58] - node _T_4782 = mux(obuf_sideeffect, obuf_addr, _T_4781) @[el2_lsu_bus_buffer.scala 597:27] - io.lsu_axi_awaddr <= _T_4782 @[el2_lsu_bus_buffer.scala 597:21] - node _T_4783 = cat(UInt<1>("h00"), obuf_sz) @[Cat.scala 29:58] - node _T_4784 = mux(obuf_sideeffect, _T_4783, UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 598:27] - io.lsu_axi_awsize <= _T_4784 @[el2_lsu_bus_buffer.scala 598:21] - io.lsu_axi_awprot <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 599:21] - node _T_4785 = mux(obuf_sideeffect, UInt<1>("h00"), UInt<4>("h0f")) @[el2_lsu_bus_buffer.scala 600:28] - io.lsu_axi_awcache <= _T_4785 @[el2_lsu_bus_buffer.scala 600:22] - node _T_4786 = bits(obuf_addr, 31, 28) @[el2_lsu_bus_buffer.scala 601:35] - io.lsu_axi_awregion <= _T_4786 @[el2_lsu_bus_buffer.scala 601:23] - io.lsu_axi_awlen <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 602:20] - io.lsu_axi_awburst <= UInt<2>("h01") @[el2_lsu_bus_buffer.scala 603:22] - io.lsu_axi_awqos <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 604:20] - io.lsu_axi_awlock <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 605:21] - node _T_4787 = and(obuf_valid, obuf_write) @[el2_lsu_bus_buffer.scala 607:35] - node _T_4788 = eq(obuf_data_done, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 607:50] - node _T_4789 = and(_T_4787, _T_4788) @[el2_lsu_bus_buffer.scala 607:48] - node _T_4790 = eq(bus_addr_match_pending, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 607:68] - node _T_4791 = and(_T_4789, _T_4790) @[el2_lsu_bus_buffer.scala 607:66] - io.lsu_axi_wvalid <= _T_4791 @[el2_lsu_bus_buffer.scala 607:21] - node _T_4792 = bits(obuf_write, 0, 0) @[Bitwise.scala 72:15] - node _T_4793 = mux(_T_4792, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] - node _T_4794 = and(obuf_byteen, _T_4793) @[el2_lsu_bus_buffer.scala 608:35] - io.lsu_axi_wstrb <= _T_4794 @[el2_lsu_bus_buffer.scala 608:20] - io.lsu_axi_wdata <= obuf_data @[el2_lsu_bus_buffer.scala 609:20] - io.lsu_axi_wlast <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 610:20] - node _T_4795 = eq(obuf_write, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 612:38] - node _T_4796 = and(obuf_valid, _T_4795) @[el2_lsu_bus_buffer.scala 612:36] - node _T_4797 = eq(obuf_nosend, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 612:52] - node _T_4798 = and(_T_4796, _T_4797) @[el2_lsu_bus_buffer.scala 612:50] - node _T_4799 = eq(bus_addr_match_pending, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 612:67] - node _T_4800 = and(_T_4798, _T_4799) @[el2_lsu_bus_buffer.scala 612:65] - io.lsu_axi_arvalid <= _T_4800 @[el2_lsu_bus_buffer.scala 612:22] - io.lsu_axi_arid <= obuf_tag0 @[el2_lsu_bus_buffer.scala 613:19] - node _T_4801 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 614:69] - node _T_4802 = cat(_T_4801, UInt<3>("h00")) @[Cat.scala 29:58] - node _T_4803 = mux(obuf_sideeffect, obuf_addr, _T_4802) @[el2_lsu_bus_buffer.scala 614:27] - io.lsu_axi_araddr <= _T_4803 @[el2_lsu_bus_buffer.scala 614:21] - node _T_4804 = cat(UInt<1>("h00"), obuf_sz) @[Cat.scala 29:58] - node _T_4805 = mux(obuf_sideeffect, _T_4804, UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 615:27] - io.lsu_axi_arsize <= _T_4805 @[el2_lsu_bus_buffer.scala 615:21] - io.lsu_axi_arprot <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 616:21] - node _T_4806 = mux(obuf_sideeffect, UInt<4>("h00"), UInt<4>("h0f")) @[el2_lsu_bus_buffer.scala 617:28] - io.lsu_axi_arcache <= _T_4806 @[el2_lsu_bus_buffer.scala 617:22] - node _T_4807 = bits(obuf_addr, 31, 28) @[el2_lsu_bus_buffer.scala 618:35] - io.lsu_axi_arregion <= _T_4807 @[el2_lsu_bus_buffer.scala 618:23] - io.lsu_axi_arlen <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 619:20] - io.lsu_axi_arburst <= UInt<2>("h01") @[el2_lsu_bus_buffer.scala 620:22] - io.lsu_axi_arqos <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 621:20] - io.lsu_axi_arlock <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 622:21] - io.lsu_axi_bready <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 623:21] - io.lsu_axi_rready <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 624:21] - node _T_4808 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 625:81] - node _T_4809 = bits(buf_error, 0, 0) @[el2_lsu_bus_buffer.scala 625:125] - node _T_4810 = and(io.lsu_bus_clk_en_q, _T_4809) @[el2_lsu_bus_buffer.scala 625:114] - node _T_4811 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 625:140] - node _T_4812 = and(_T_4810, _T_4811) @[el2_lsu_bus_buffer.scala 625:129] - node _T_4813 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 625:81] - node _T_4814 = bits(buf_error, 1, 1) @[el2_lsu_bus_buffer.scala 625:125] - node _T_4815 = and(io.lsu_bus_clk_en_q, _T_4814) @[el2_lsu_bus_buffer.scala 625:114] - node _T_4816 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 625:140] - node _T_4817 = and(_T_4815, _T_4816) @[el2_lsu_bus_buffer.scala 625:129] - node _T_4818 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 625:81] - node _T_4819 = bits(buf_error, 2, 2) @[el2_lsu_bus_buffer.scala 625:125] - node _T_4820 = and(io.lsu_bus_clk_en_q, _T_4819) @[el2_lsu_bus_buffer.scala 625:114] - node _T_4821 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 625:140] - node _T_4822 = and(_T_4820, _T_4821) @[el2_lsu_bus_buffer.scala 625:129] - node _T_4823 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 625:81] - node _T_4824 = bits(buf_error, 3, 3) @[el2_lsu_bus_buffer.scala 625:125] - node _T_4825 = and(io.lsu_bus_clk_en_q, _T_4824) @[el2_lsu_bus_buffer.scala 625:114] - node _T_4826 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 625:140] - node _T_4827 = and(_T_4825, _T_4826) @[el2_lsu_bus_buffer.scala 625:129] - node _T_4828 = mux(_T_4808, _T_4812, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4829 = mux(_T_4813, _T_4817, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4830 = mux(_T_4818, _T_4822, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4831 = mux(_T_4823, _T_4827, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4832 = or(_T_4828, _T_4829) @[Mux.scala 27:72] - node _T_4833 = or(_T_4832, _T_4830) @[Mux.scala 27:72] - node _T_4834 = or(_T_4833, _T_4831) @[Mux.scala 27:72] - wire _T_4835 : UInt<1> @[Mux.scala 27:72] - _T_4835 <= _T_4834 @[Mux.scala 27:72] - io.lsu_imprecise_error_store_any <= _T_4835 @[el2_lsu_bus_buffer.scala 625:36] - node _T_4836 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 626:87] - node _T_4837 = bits(buf_error, 0, 0) @[el2_lsu_bus_buffer.scala 626:109] - node _T_4838 = and(_T_4836, _T_4837) @[el2_lsu_bus_buffer.scala 626:98] - node _T_4839 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 626:124] - node _T_4840 = and(_T_4838, _T_4839) @[el2_lsu_bus_buffer.scala 626:113] - node _T_4841 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 626:87] - node _T_4842 = bits(buf_error, 1, 1) @[el2_lsu_bus_buffer.scala 626:109] - node _T_4843 = and(_T_4841, _T_4842) @[el2_lsu_bus_buffer.scala 626:98] - node _T_4844 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 626:124] - node _T_4845 = and(_T_4843, _T_4844) @[el2_lsu_bus_buffer.scala 626:113] - node _T_4846 = mux(_T_4840, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4847 = mux(_T_4845, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4848 = or(_T_4846, _T_4847) @[Mux.scala 27:72] + lsu_nonblock_dual <= _T_4645 @[Mux.scala 27:72] + node _T_4646 = cat(lsu_nonblock_load_data_hi, lsu_nonblock_load_data_lo) @[Cat.scala 29:58] + node _T_4647 = mul(lsu_nonblock_addr_offset, UInt<4>("h08")) @[el2_lsu_bus_buffer.scala 570:121] + node lsu_nonblock_data_unalgn = dshr(_T_4646, _T_4647) @[el2_lsu_bus_buffer.scala 570:92] + io.data_hi <= lsu_nonblock_load_data_hi @[el2_lsu_bus_buffer.scala 571:14] + io.data_lo <= lsu_nonblock_load_data_lo @[el2_lsu_bus_buffer.scala 572:14] + node _T_4648 = eq(io.lsu_nonblock_load_data_error, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 573:69] + node _T_4649 = and(lsu_nonblock_load_data_ready, _T_4648) @[el2_lsu_bus_buffer.scala 573:67] + io.lsu_nonblock_load_data_valid <= _T_4649 @[el2_lsu_bus_buffer.scala 573:35] + node _T_4650 = eq(lsu_nonblock_sz, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 574:81] + node _T_4651 = and(lsu_nonblock_unsign, _T_4650) @[el2_lsu_bus_buffer.scala 574:63] + node _T_4652 = bits(lsu_nonblock_data_unalgn, 7, 0) @[el2_lsu_bus_buffer.scala 574:131] + node _T_4653 = cat(UInt<24>("h00"), _T_4652) @[Cat.scala 29:58] + node _T_4654 = eq(lsu_nonblock_sz, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 575:45] + node _T_4655 = and(lsu_nonblock_unsign, _T_4654) @[el2_lsu_bus_buffer.scala 575:26] + node _T_4656 = bits(lsu_nonblock_data_unalgn, 15, 0) @[el2_lsu_bus_buffer.scala 575:95] + node _T_4657 = cat(UInt<16>("h00"), _T_4656) @[Cat.scala 29:58] + node _T_4658 = eq(lsu_nonblock_unsign, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 576:6] + node _T_4659 = eq(lsu_nonblock_sz, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 576:45] + node _T_4660 = and(_T_4658, _T_4659) @[el2_lsu_bus_buffer.scala 576:27] + node _T_4661 = bits(lsu_nonblock_data_unalgn, 7, 7) @[el2_lsu_bus_buffer.scala 576:93] + node _T_4662 = bits(_T_4661, 0, 0) @[Bitwise.scala 72:15] + node _T_4663 = mux(_T_4662, UInt<24>("h0ffffff"), UInt<24>("h00")) @[Bitwise.scala 72:12] + node _T_4664 = bits(lsu_nonblock_data_unalgn, 7, 0) @[el2_lsu_bus_buffer.scala 576:123] + node _T_4665 = cat(_T_4663, _T_4664) @[Cat.scala 29:58] + node _T_4666 = eq(lsu_nonblock_unsign, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 577:6] + node _T_4667 = eq(lsu_nonblock_sz, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 577:45] + node _T_4668 = and(_T_4666, _T_4667) @[el2_lsu_bus_buffer.scala 577:27] + node _T_4669 = bits(lsu_nonblock_data_unalgn, 15, 15) @[el2_lsu_bus_buffer.scala 577:93] + node _T_4670 = bits(_T_4669, 0, 0) @[Bitwise.scala 72:15] + node _T_4671 = mux(_T_4670, UInt<16>("h0ffff"), UInt<16>("h00")) @[Bitwise.scala 72:12] + node _T_4672 = bits(lsu_nonblock_data_unalgn, 15, 0) @[el2_lsu_bus_buffer.scala 577:124] + node _T_4673 = cat(_T_4671, _T_4672) @[Cat.scala 29:58] + node _T_4674 = eq(lsu_nonblock_sz, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 578:21] + node _T_4675 = mux(_T_4651, _T_4653, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4676 = mux(_T_4655, _T_4657, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4677 = mux(_T_4660, _T_4665, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4678 = mux(_T_4668, _T_4673, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4679 = mux(_T_4674, lsu_nonblock_data_unalgn, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4680 = or(_T_4675, _T_4676) @[Mux.scala 27:72] + node _T_4681 = or(_T_4680, _T_4677) @[Mux.scala 27:72] + node _T_4682 = or(_T_4681, _T_4678) @[Mux.scala 27:72] + node _T_4683 = or(_T_4682, _T_4679) @[Mux.scala 27:72] + wire _T_4684 : UInt<64> @[Mux.scala 27:72] + _T_4684 <= _T_4683 @[Mux.scala 27:72] + io.lsu_nonblock_load_data <= _T_4684 @[el2_lsu_bus_buffer.scala 574:29] + node _T_4685 = eq(buf_state[0], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 579:62] + node _T_4686 = bits(buf_sideeffect, 0, 0) @[el2_lsu_bus_buffer.scala 579:89] + node _T_4687 = and(_T_4685, _T_4686) @[el2_lsu_bus_buffer.scala 579:73] + node _T_4688 = and(_T_4687, io.dec_tlu_sideeffect_posted_disable) @[el2_lsu_bus_buffer.scala 579:93] + node _T_4689 = eq(buf_state[1], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 579:62] + node _T_4690 = bits(buf_sideeffect, 1, 1) @[el2_lsu_bus_buffer.scala 579:89] + node _T_4691 = and(_T_4689, _T_4690) @[el2_lsu_bus_buffer.scala 579:73] + node _T_4692 = and(_T_4691, io.dec_tlu_sideeffect_posted_disable) @[el2_lsu_bus_buffer.scala 579:93] + node _T_4693 = eq(buf_state[2], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 579:62] + node _T_4694 = bits(buf_sideeffect, 2, 2) @[el2_lsu_bus_buffer.scala 579:89] + node _T_4695 = and(_T_4693, _T_4694) @[el2_lsu_bus_buffer.scala 579:73] + node _T_4696 = and(_T_4695, io.dec_tlu_sideeffect_posted_disable) @[el2_lsu_bus_buffer.scala 579:93] + node _T_4697 = eq(buf_state[3], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 579:62] + node _T_4698 = bits(buf_sideeffect, 3, 3) @[el2_lsu_bus_buffer.scala 579:89] + node _T_4699 = and(_T_4697, _T_4698) @[el2_lsu_bus_buffer.scala 579:73] + node _T_4700 = and(_T_4699, io.dec_tlu_sideeffect_posted_disable) @[el2_lsu_bus_buffer.scala 579:93] + node _T_4701 = or(_T_4688, _T_4692) @[el2_lsu_bus_buffer.scala 579:141] + node _T_4702 = or(_T_4701, _T_4696) @[el2_lsu_bus_buffer.scala 579:141] + node _T_4703 = or(_T_4702, _T_4700) @[el2_lsu_bus_buffer.scala 579:141] + bus_sideeffect_pend <= _T_4703 @[el2_lsu_bus_buffer.scala 579:23] + node _T_4704 = eq(buf_state[0], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 580:71] + node _T_4705 = and(UInt<1>("h01"), obuf_valid) @[el2_lsu_bus_buffer.scala 581:25] + node _T_4706 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 581:50] + node _T_4707 = bits(buf_addr[0], 31, 3) @[el2_lsu_bus_buffer.scala 581:70] + node _T_4708 = eq(_T_4706, _T_4707) @[el2_lsu_bus_buffer.scala 581:56] + node _T_4709 = and(_T_4705, _T_4708) @[el2_lsu_bus_buffer.scala 581:38] + node _T_4710 = eq(obuf_tag0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 581:92] + node _T_4711 = eq(obuf_tag1, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 581:126] + node _T_4712 = and(obuf_merge, _T_4711) @[el2_lsu_bus_buffer.scala 581:114] + node _T_4713 = or(_T_4710, _T_4712) @[el2_lsu_bus_buffer.scala 581:100] + node _T_4714 = eq(_T_4713, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 581:80] + node _T_4715 = and(_T_4709, _T_4714) @[el2_lsu_bus_buffer.scala 581:78] + node _T_4716 = eq(buf_state[1], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 580:71] + node _T_4717 = and(UInt<1>("h01"), obuf_valid) @[el2_lsu_bus_buffer.scala 581:25] + node _T_4718 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 581:50] + node _T_4719 = bits(buf_addr[1], 31, 3) @[el2_lsu_bus_buffer.scala 581:70] + node _T_4720 = eq(_T_4718, _T_4719) @[el2_lsu_bus_buffer.scala 581:56] + node _T_4721 = and(_T_4717, _T_4720) @[el2_lsu_bus_buffer.scala 581:38] + node _T_4722 = eq(obuf_tag0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 581:92] + node _T_4723 = eq(obuf_tag1, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 581:126] + node _T_4724 = and(obuf_merge, _T_4723) @[el2_lsu_bus_buffer.scala 581:114] + node _T_4725 = or(_T_4722, _T_4724) @[el2_lsu_bus_buffer.scala 581:100] + node _T_4726 = eq(_T_4725, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 581:80] + node _T_4727 = and(_T_4721, _T_4726) @[el2_lsu_bus_buffer.scala 581:78] + node _T_4728 = eq(buf_state[2], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 580:71] + node _T_4729 = and(UInt<1>("h01"), obuf_valid) @[el2_lsu_bus_buffer.scala 581:25] + node _T_4730 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 581:50] + node _T_4731 = bits(buf_addr[2], 31, 3) @[el2_lsu_bus_buffer.scala 581:70] + node _T_4732 = eq(_T_4730, _T_4731) @[el2_lsu_bus_buffer.scala 581:56] + node _T_4733 = and(_T_4729, _T_4732) @[el2_lsu_bus_buffer.scala 581:38] + node _T_4734 = eq(obuf_tag0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 581:92] + node _T_4735 = eq(obuf_tag1, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 581:126] + node _T_4736 = and(obuf_merge, _T_4735) @[el2_lsu_bus_buffer.scala 581:114] + node _T_4737 = or(_T_4734, _T_4736) @[el2_lsu_bus_buffer.scala 581:100] + node _T_4738 = eq(_T_4737, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 581:80] + node _T_4739 = and(_T_4733, _T_4738) @[el2_lsu_bus_buffer.scala 581:78] + node _T_4740 = eq(buf_state[3], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 580:71] + node _T_4741 = and(UInt<1>("h01"), obuf_valid) @[el2_lsu_bus_buffer.scala 581:25] + node _T_4742 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 581:50] + node _T_4743 = bits(buf_addr[3], 31, 3) @[el2_lsu_bus_buffer.scala 581:70] + node _T_4744 = eq(_T_4742, _T_4743) @[el2_lsu_bus_buffer.scala 581:56] + node _T_4745 = and(_T_4741, _T_4744) @[el2_lsu_bus_buffer.scala 581:38] + node _T_4746 = eq(obuf_tag0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 581:92] + node _T_4747 = eq(obuf_tag1, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 581:126] + node _T_4748 = and(obuf_merge, _T_4747) @[el2_lsu_bus_buffer.scala 581:114] + node _T_4749 = or(_T_4746, _T_4748) @[el2_lsu_bus_buffer.scala 581:100] + node _T_4750 = eq(_T_4749, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 581:80] + node _T_4751 = and(_T_4745, _T_4750) @[el2_lsu_bus_buffer.scala 581:78] + node _T_4752 = mux(_T_4704, _T_4715, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4753 = mux(_T_4716, _T_4727, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4754 = mux(_T_4728, _T_4739, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4755 = mux(_T_4740, _T_4751, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4756 = or(_T_4752, _T_4753) @[Mux.scala 27:72] + node _T_4757 = or(_T_4756, _T_4754) @[Mux.scala 27:72] + node _T_4758 = or(_T_4757, _T_4755) @[Mux.scala 27:72] + wire _T_4759 : UInt<1> @[Mux.scala 27:72] + _T_4759 <= _T_4758 @[Mux.scala 27:72] + bus_addr_match_pending <= _T_4759 @[el2_lsu_bus_buffer.scala 580:26] + node _T_4760 = or(obuf_cmd_done, obuf_data_done) @[el2_lsu_bus_buffer.scala 583:54] + node _T_4761 = mux(obuf_cmd_done, io.lsu_axi_wready, io.lsu_axi_awready) @[el2_lsu_bus_buffer.scala 583:75] + node _T_4762 = and(io.lsu_axi_awready, io.lsu_axi_awready) @[el2_lsu_bus_buffer.scala 583:150] + node _T_4763 = mux(_T_4760, _T_4761, _T_4762) @[el2_lsu_bus_buffer.scala 583:39] + node _T_4764 = mux(obuf_write, _T_4763, io.lsu_axi_arready) @[el2_lsu_bus_buffer.scala 583:23] + bus_cmd_ready <= _T_4764 @[el2_lsu_bus_buffer.scala 583:17] + node _T_4765 = and(io.lsu_axi_awvalid, io.lsu_axi_awready) @[el2_lsu_bus_buffer.scala 584:39] + bus_wcmd_sent <= _T_4765 @[el2_lsu_bus_buffer.scala 584:17] + node _T_4766 = and(io.lsu_axi_wvalid, io.lsu_axi_wready) @[el2_lsu_bus_buffer.scala 585:39] + bus_wdata_sent <= _T_4766 @[el2_lsu_bus_buffer.scala 585:18] + node _T_4767 = or(obuf_cmd_done, bus_wcmd_sent) @[el2_lsu_bus_buffer.scala 586:35] + node _T_4768 = or(obuf_data_done, bus_wdata_sent) @[el2_lsu_bus_buffer.scala 586:70] + node _T_4769 = and(_T_4767, _T_4768) @[el2_lsu_bus_buffer.scala 586:52] + node _T_4770 = and(io.lsu_axi_arvalid, io.lsu_axi_arready) @[el2_lsu_bus_buffer.scala 586:111] + node _T_4771 = or(_T_4769, _T_4770) @[el2_lsu_bus_buffer.scala 586:89] + bus_cmd_sent <= _T_4771 @[el2_lsu_bus_buffer.scala 586:16] + node _T_4772 = and(io.lsu_axi_rvalid, io.lsu_axi_rready) @[el2_lsu_bus_buffer.scala 587:37] + bus_rsp_read <= _T_4772 @[el2_lsu_bus_buffer.scala 587:16] + node _T_4773 = and(io.lsu_axi_bvalid, io.lsu_axi_bready) @[el2_lsu_bus_buffer.scala 588:38] + bus_rsp_write <= _T_4773 @[el2_lsu_bus_buffer.scala 588:17] + bus_rsp_read_tag <= io.lsu_axi_rid @[el2_lsu_bus_buffer.scala 589:20] + bus_rsp_write_tag <= io.lsu_axi_bid @[el2_lsu_bus_buffer.scala 590:21] + node _T_4774 = neq(io.lsu_axi_bresp, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 591:60] + node _T_4775 = and(bus_rsp_write, _T_4774) @[el2_lsu_bus_buffer.scala 591:40] + bus_rsp_write_error <= _T_4775 @[el2_lsu_bus_buffer.scala 591:23] + node _T_4776 = neq(io.lsu_axi_bresp, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 592:58] + node _T_4777 = and(bus_rsp_read, _T_4776) @[el2_lsu_bus_buffer.scala 592:38] + bus_rsp_read_error <= _T_4777 @[el2_lsu_bus_buffer.scala 592:22] + bus_rsp_rdata <= io.lsu_axi_rdata @[el2_lsu_bus_buffer.scala 593:17] + node _T_4778 = and(obuf_valid, obuf_write) @[el2_lsu_bus_buffer.scala 596:36] + node _T_4779 = eq(obuf_cmd_done, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 596:51] + node _T_4780 = and(_T_4778, _T_4779) @[el2_lsu_bus_buffer.scala 596:49] + node _T_4781 = eq(bus_addr_match_pending, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 596:68] + node _T_4782 = and(_T_4780, _T_4781) @[el2_lsu_bus_buffer.scala 596:66] + io.lsu_axi_awvalid <= _T_4782 @[el2_lsu_bus_buffer.scala 596:22] + io.lsu_axi_awid <= obuf_tag0 @[el2_lsu_bus_buffer.scala 597:19] + node _T_4783 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 598:69] + node _T_4784 = cat(_T_4783, UInt<3>("h00")) @[Cat.scala 29:58] + node _T_4785 = mux(obuf_sideeffect, obuf_addr, _T_4784) @[el2_lsu_bus_buffer.scala 598:27] + io.lsu_axi_awaddr <= _T_4785 @[el2_lsu_bus_buffer.scala 598:21] + node _T_4786 = cat(UInt<1>("h00"), obuf_sz) @[Cat.scala 29:58] + node _T_4787 = mux(obuf_sideeffect, _T_4786, UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 599:27] + io.lsu_axi_awsize <= _T_4787 @[el2_lsu_bus_buffer.scala 599:21] + io.lsu_axi_awprot <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 600:21] + node _T_4788 = mux(obuf_sideeffect, UInt<1>("h00"), UInt<4>("h0f")) @[el2_lsu_bus_buffer.scala 601:28] + io.lsu_axi_awcache <= _T_4788 @[el2_lsu_bus_buffer.scala 601:22] + node _T_4789 = bits(obuf_addr, 31, 28) @[el2_lsu_bus_buffer.scala 602:35] + io.lsu_axi_awregion <= _T_4789 @[el2_lsu_bus_buffer.scala 602:23] + io.lsu_axi_awlen <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 603:20] + io.lsu_axi_awburst <= UInt<2>("h01") @[el2_lsu_bus_buffer.scala 604:22] + io.lsu_axi_awqos <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 605:20] + io.lsu_axi_awlock <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 606:21] + node _T_4790 = and(obuf_valid, obuf_write) @[el2_lsu_bus_buffer.scala 608:35] + node _T_4791 = eq(obuf_data_done, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 608:50] + node _T_4792 = and(_T_4790, _T_4791) @[el2_lsu_bus_buffer.scala 608:48] + node _T_4793 = eq(bus_addr_match_pending, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 608:68] + node _T_4794 = and(_T_4792, _T_4793) @[el2_lsu_bus_buffer.scala 608:66] + io.lsu_axi_wvalid <= _T_4794 @[el2_lsu_bus_buffer.scala 608:21] + node _T_4795 = bits(obuf_write, 0, 0) @[Bitwise.scala 72:15] + node _T_4796 = mux(_T_4795, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_4797 = and(obuf_byteen, _T_4796) @[el2_lsu_bus_buffer.scala 609:35] + io.lsu_axi_wstrb <= _T_4797 @[el2_lsu_bus_buffer.scala 609:20] + io.lsu_axi_wdata <= obuf_data @[el2_lsu_bus_buffer.scala 610:20] + io.lsu_axi_wlast <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 611:20] + node _T_4798 = eq(obuf_write, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 613:38] + node _T_4799 = and(obuf_valid, _T_4798) @[el2_lsu_bus_buffer.scala 613:36] + node _T_4800 = eq(obuf_nosend, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 613:52] + node _T_4801 = and(_T_4799, _T_4800) @[el2_lsu_bus_buffer.scala 613:50] + node _T_4802 = eq(bus_addr_match_pending, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 613:67] + node _T_4803 = and(_T_4801, _T_4802) @[el2_lsu_bus_buffer.scala 613:65] + io.lsu_axi_arvalid <= _T_4803 @[el2_lsu_bus_buffer.scala 613:22] + io.lsu_axi_arid <= obuf_tag0 @[el2_lsu_bus_buffer.scala 614:19] + node _T_4804 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 615:69] + node _T_4805 = cat(_T_4804, UInt<3>("h00")) @[Cat.scala 29:58] + node _T_4806 = mux(obuf_sideeffect, obuf_addr, _T_4805) @[el2_lsu_bus_buffer.scala 615:27] + io.lsu_axi_araddr <= _T_4806 @[el2_lsu_bus_buffer.scala 615:21] + node _T_4807 = cat(UInt<1>("h00"), obuf_sz) @[Cat.scala 29:58] + node _T_4808 = mux(obuf_sideeffect, _T_4807, UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 616:27] + io.lsu_axi_arsize <= _T_4808 @[el2_lsu_bus_buffer.scala 616:21] + io.lsu_axi_arprot <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 617:21] + node _T_4809 = mux(obuf_sideeffect, UInt<4>("h00"), UInt<4>("h0f")) @[el2_lsu_bus_buffer.scala 618:28] + io.lsu_axi_arcache <= _T_4809 @[el2_lsu_bus_buffer.scala 618:22] + node _T_4810 = bits(obuf_addr, 31, 28) @[el2_lsu_bus_buffer.scala 619:35] + io.lsu_axi_arregion <= _T_4810 @[el2_lsu_bus_buffer.scala 619:23] + io.lsu_axi_arlen <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 620:20] + io.lsu_axi_arburst <= UInt<2>("h01") @[el2_lsu_bus_buffer.scala 621:22] + io.lsu_axi_arqos <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 622:20] + io.lsu_axi_arlock <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 623:21] + io.lsu_axi_bready <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 624:21] + io.lsu_axi_rready <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 625:21] + node _T_4811 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 626:81] + node _T_4812 = bits(buf_error, 0, 0) @[el2_lsu_bus_buffer.scala 626:125] + node _T_4813 = and(io.lsu_bus_clk_en_q, _T_4812) @[el2_lsu_bus_buffer.scala 626:114] + node _T_4814 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 626:140] + node _T_4815 = and(_T_4813, _T_4814) @[el2_lsu_bus_buffer.scala 626:129] + node _T_4816 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 626:81] + node _T_4817 = bits(buf_error, 1, 1) @[el2_lsu_bus_buffer.scala 626:125] + node _T_4818 = and(io.lsu_bus_clk_en_q, _T_4817) @[el2_lsu_bus_buffer.scala 626:114] + node _T_4819 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 626:140] + node _T_4820 = and(_T_4818, _T_4819) @[el2_lsu_bus_buffer.scala 626:129] + node _T_4821 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 626:81] + node _T_4822 = bits(buf_error, 2, 2) @[el2_lsu_bus_buffer.scala 626:125] + node _T_4823 = and(io.lsu_bus_clk_en_q, _T_4822) @[el2_lsu_bus_buffer.scala 626:114] + node _T_4824 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 626:140] + node _T_4825 = and(_T_4823, _T_4824) @[el2_lsu_bus_buffer.scala 626:129] + node _T_4826 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 626:81] + node _T_4827 = bits(buf_error, 3, 3) @[el2_lsu_bus_buffer.scala 626:125] + node _T_4828 = and(io.lsu_bus_clk_en_q, _T_4827) @[el2_lsu_bus_buffer.scala 626:114] + node _T_4829 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 626:140] + node _T_4830 = and(_T_4828, _T_4829) @[el2_lsu_bus_buffer.scala 626:129] + node _T_4831 = mux(_T_4811, _T_4815, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4832 = mux(_T_4816, _T_4820, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4833 = mux(_T_4821, _T_4825, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4834 = mux(_T_4826, _T_4830, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4835 = or(_T_4831, _T_4832) @[Mux.scala 27:72] + node _T_4836 = or(_T_4835, _T_4833) @[Mux.scala 27:72] + node _T_4837 = or(_T_4836, _T_4834) @[Mux.scala 27:72] + wire _T_4838 : UInt<1> @[Mux.scala 27:72] + _T_4838 <= _T_4837 @[Mux.scala 27:72] + io.lsu_imprecise_error_store_any <= _T_4838 @[el2_lsu_bus_buffer.scala 626:36] + node _T_4839 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 627:87] + node _T_4840 = bits(buf_error, 0, 0) @[el2_lsu_bus_buffer.scala 627:109] + node _T_4841 = and(_T_4839, _T_4840) @[el2_lsu_bus_buffer.scala 627:98] + node _T_4842 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 627:124] + node _T_4843 = and(_T_4841, _T_4842) @[el2_lsu_bus_buffer.scala 627:113] + node _T_4844 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 627:87] + node _T_4845 = bits(buf_error, 1, 1) @[el2_lsu_bus_buffer.scala 627:109] + node _T_4846 = and(_T_4844, _T_4845) @[el2_lsu_bus_buffer.scala 627:98] + node _T_4847 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 627:124] + node _T_4848 = and(_T_4846, _T_4847) @[el2_lsu_bus_buffer.scala 627:113] + node _T_4849 = mux(_T_4843, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4850 = mux(_T_4848, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4851 = or(_T_4849, _T_4850) @[Mux.scala 27:72] wire lsu_imprecise_error_store_tag : UInt<1> @[Mux.scala 27:72] - lsu_imprecise_error_store_tag <= _T_4848 @[Mux.scala 27:72] - node _T_4849 = eq(io.lsu_imprecise_error_store_any, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 628:72] - node _T_4850 = and(io.lsu_nonblock_load_data_error, _T_4849) @[el2_lsu_bus_buffer.scala 628:70] - io.lsu_imprecise_error_load_any <= _T_4850 @[el2_lsu_bus_buffer.scala 628:35] - node _T_4851 = eq(lsu_imprecise_error_store_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 114:123] - node _T_4852 = eq(lsu_imprecise_error_store_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 114:123] - node _T_4853 = mux(_T_4851, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4854 = mux(_T_4852, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4855 = or(_T_4853, _T_4854) @[Mux.scala 27:72] - wire _T_4856 : UInt<32> @[Mux.scala 27:72] - _T_4856 <= _T_4855 @[Mux.scala 27:72] - node _T_4857 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 114:123] - node _T_4858 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 114:123] - node _T_4859 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 114:123] - node _T_4860 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 114:123] - node _T_4861 = mux(_T_4857, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4862 = mux(_T_4858, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4863 = mux(_T_4859, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4864 = mux(_T_4860, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4865 = or(_T_4861, _T_4862) @[Mux.scala 27:72] - node _T_4866 = or(_T_4865, _T_4863) @[Mux.scala 27:72] - node _T_4867 = or(_T_4866, _T_4864) @[Mux.scala 27:72] - wire _T_4868 : UInt<32> @[Mux.scala 27:72] - _T_4868 <= _T_4867 @[Mux.scala 27:72] - node _T_4869 = mux(io.lsu_imprecise_error_store_any, _T_4856, _T_4868) @[el2_lsu_bus_buffer.scala 629:41] - io.lsu_imprecise_error_addr_any <= _T_4869 @[el2_lsu_bus_buffer.scala 629:35] - lsu_bus_cntr_overflow <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 630:25] - io.lsu_bus_idle_any <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 632:23] - node _T_4870 = and(io.lsu_axi_awvalid, io.lsu_axi_awready) @[el2_lsu_bus_buffer.scala 635:46] - node _T_4871 = and(io.lsu_axi_wvalid, io.lsu_axi_wready) @[el2_lsu_bus_buffer.scala 635:89] - node _T_4872 = or(_T_4870, _T_4871) @[el2_lsu_bus_buffer.scala 635:68] - node _T_4873 = and(io.lsu_axi_arvalid, io.lsu_axi_arready) @[el2_lsu_bus_buffer.scala 635:132] - node _T_4874 = or(_T_4872, _T_4873) @[el2_lsu_bus_buffer.scala 635:110] - io.lsu_pmu_bus_trxn <= _T_4874 @[el2_lsu_bus_buffer.scala 635:23] - node _T_4875 = and(io.lsu_busreq_r, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 636:48] - node _T_4876 = and(_T_4875, io.lsu_commit_r) @[el2_lsu_bus_buffer.scala 636:65] - io.lsu_pmu_bus_misaligned <= _T_4876 @[el2_lsu_bus_buffer.scala 636:29] - node _T_4877 = or(io.lsu_imprecise_error_load_any, io.lsu_imprecise_error_store_any) @[el2_lsu_bus_buffer.scala 637:59] - io.lsu_pmu_bus_error <= _T_4877 @[el2_lsu_bus_buffer.scala 637:24] - node _T_4878 = eq(io.lsu_axi_awready, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 639:48] - node _T_4879 = and(io.lsu_axi_awvalid, _T_4878) @[el2_lsu_bus_buffer.scala 639:46] - node _T_4880 = eq(io.lsu_axi_wready, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 639:92] - node _T_4881 = and(io.lsu_axi_wvalid, _T_4880) @[el2_lsu_bus_buffer.scala 639:90] - node _T_4882 = or(_T_4879, _T_4881) @[el2_lsu_bus_buffer.scala 639:69] - node _T_4883 = eq(io.lsu_axi_arready, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 639:136] - node _T_4884 = and(io.lsu_axi_arvalid, _T_4883) @[el2_lsu_bus_buffer.scala 639:134] - node _T_4885 = or(_T_4882, _T_4884) @[el2_lsu_bus_buffer.scala 639:112] - io.lsu_pmu_bus_busy <= _T_4885 @[el2_lsu_bus_buffer.scala 639:23] - reg _T_4886 : UInt, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 641:49] - _T_4886 <= WrPtr0_m @[el2_lsu_bus_buffer.scala 641:49] - WrPtr0_r <= _T_4886 @[el2_lsu_bus_buffer.scala 641:12] - reg _T_4887 : UInt, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 642:49] - _T_4887 <= WrPtr1_m @[el2_lsu_bus_buffer.scala 642:49] - WrPtr1_r <= _T_4887 @[el2_lsu_bus_buffer.scala 642:12] - node _T_4888 = eq(io.flush_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 643:75] - node _T_4889 = and(io.lsu_busreq_m, _T_4888) @[el2_lsu_bus_buffer.scala 643:73] - node _T_4890 = eq(io.ld_full_hit_m, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 643:89] - node _T_4891 = and(_T_4889, _T_4890) @[el2_lsu_bus_buffer.scala 643:87] - reg _T_4892 : UInt<1>, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 643:56] - _T_4892 <= _T_4891 @[el2_lsu_bus_buffer.scala 643:56] - io.lsu_busreq_r <= _T_4892 @[el2_lsu_bus_buffer.scala 643:19] - reg _T_4893 : UInt<1>, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 644:66] - _T_4893 <= io.lsu_nonblock_load_valid_m @[el2_lsu_bus_buffer.scala 644:66] - lsu_nonblock_load_valid_r <= _T_4893 @[el2_lsu_bus_buffer.scala 644:29] + lsu_imprecise_error_store_tag <= _T_4851 @[Mux.scala 27:72] + node _T_4852 = eq(io.lsu_imprecise_error_store_any, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 629:72] + node _T_4853 = and(io.lsu_nonblock_load_data_error, _T_4852) @[el2_lsu_bus_buffer.scala 629:70] + io.lsu_imprecise_error_load_any <= _T_4853 @[el2_lsu_bus_buffer.scala 629:35] + node _T_4854 = eq(lsu_imprecise_error_store_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 114:123] + node _T_4855 = eq(lsu_imprecise_error_store_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 114:123] + node _T_4856 = mux(_T_4854, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4857 = mux(_T_4855, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4858 = or(_T_4856, _T_4857) @[Mux.scala 27:72] + wire _T_4859 : UInt<32> @[Mux.scala 27:72] + _T_4859 <= _T_4858 @[Mux.scala 27:72] + node _T_4860 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 114:123] + node _T_4861 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 114:123] + node _T_4862 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 114:123] + node _T_4863 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 114:123] + node _T_4864 = mux(_T_4860, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4865 = mux(_T_4861, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4866 = mux(_T_4862, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4867 = mux(_T_4863, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4868 = or(_T_4864, _T_4865) @[Mux.scala 27:72] + node _T_4869 = or(_T_4868, _T_4866) @[Mux.scala 27:72] + node _T_4870 = or(_T_4869, _T_4867) @[Mux.scala 27:72] + wire _T_4871 : UInt<32> @[Mux.scala 27:72] + _T_4871 <= _T_4870 @[Mux.scala 27:72] + node _T_4872 = mux(io.lsu_imprecise_error_store_any, _T_4859, _T_4871) @[el2_lsu_bus_buffer.scala 630:41] + io.lsu_imprecise_error_addr_any <= _T_4872 @[el2_lsu_bus_buffer.scala 630:35] + lsu_bus_cntr_overflow <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 631:25] + io.lsu_bus_idle_any <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 633:23] + node _T_4873 = and(io.lsu_axi_awvalid, io.lsu_axi_awready) @[el2_lsu_bus_buffer.scala 636:46] + node _T_4874 = and(io.lsu_axi_wvalid, io.lsu_axi_wready) @[el2_lsu_bus_buffer.scala 636:89] + node _T_4875 = or(_T_4873, _T_4874) @[el2_lsu_bus_buffer.scala 636:68] + node _T_4876 = and(io.lsu_axi_arvalid, io.lsu_axi_arready) @[el2_lsu_bus_buffer.scala 636:132] + node _T_4877 = or(_T_4875, _T_4876) @[el2_lsu_bus_buffer.scala 636:110] + io.lsu_pmu_bus_trxn <= _T_4877 @[el2_lsu_bus_buffer.scala 636:23] + node _T_4878 = and(io.lsu_busreq_r, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 637:48] + node _T_4879 = and(_T_4878, io.lsu_commit_r) @[el2_lsu_bus_buffer.scala 637:65] + io.lsu_pmu_bus_misaligned <= _T_4879 @[el2_lsu_bus_buffer.scala 637:29] + node _T_4880 = or(io.lsu_imprecise_error_load_any, io.lsu_imprecise_error_store_any) @[el2_lsu_bus_buffer.scala 638:59] + io.lsu_pmu_bus_error <= _T_4880 @[el2_lsu_bus_buffer.scala 638:24] + node _T_4881 = eq(io.lsu_axi_awready, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 640:48] + node _T_4882 = and(io.lsu_axi_awvalid, _T_4881) @[el2_lsu_bus_buffer.scala 640:46] + node _T_4883 = eq(io.lsu_axi_wready, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 640:92] + node _T_4884 = and(io.lsu_axi_wvalid, _T_4883) @[el2_lsu_bus_buffer.scala 640:90] + node _T_4885 = or(_T_4882, _T_4884) @[el2_lsu_bus_buffer.scala 640:69] + node _T_4886 = eq(io.lsu_axi_arready, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 640:136] + node _T_4887 = and(io.lsu_axi_arvalid, _T_4886) @[el2_lsu_bus_buffer.scala 640:134] + node _T_4888 = or(_T_4885, _T_4887) @[el2_lsu_bus_buffer.scala 640:112] + io.lsu_pmu_bus_busy <= _T_4888 @[el2_lsu_bus_buffer.scala 640:23] + reg _T_4889 : UInt, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 642:49] + _T_4889 <= WrPtr0_m @[el2_lsu_bus_buffer.scala 642:49] + WrPtr0_r <= _T_4889 @[el2_lsu_bus_buffer.scala 642:12] + reg _T_4890 : UInt, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 643:49] + _T_4890 <= WrPtr1_m @[el2_lsu_bus_buffer.scala 643:49] + WrPtr1_r <= _T_4890 @[el2_lsu_bus_buffer.scala 643:12] + node _T_4891 = eq(io.flush_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 644:75] + node _T_4892 = and(io.lsu_busreq_m, _T_4891) @[el2_lsu_bus_buffer.scala 644:73] + node _T_4893 = eq(io.ld_full_hit_m, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 644:89] + node _T_4894 = and(_T_4892, _T_4893) @[el2_lsu_bus_buffer.scala 644:87] + reg _T_4895 : UInt<1>, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 644:56] + _T_4895 <= _T_4894 @[el2_lsu_bus_buffer.scala 644:56] + io.lsu_busreq_r <= _T_4895 @[el2_lsu_bus_buffer.scala 644:19] + reg _T_4896 : UInt<1>, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 645:66] + _T_4896 <= io.lsu_nonblock_load_valid_m @[el2_lsu_bus_buffer.scala 645:66] + lsu_nonblock_load_valid_r <= _T_4896 @[el2_lsu_bus_buffer.scala 645:29] diff --git a/el2_lsu_bus_buffer.v b/el2_lsu_bus_buffer.v index ad0e32f0..80769b5f 100644 --- a/el2_lsu_bus_buffer.v +++ b/el2_lsu_bus_buffer.v @@ -141,7 +141,7 @@ module el2_lsu_bus_buffer( output [2:0] io_lsu_axi_arprot, output [3:0] io_lsu_axi_arqos, output io_lsu_axi_rready, - output [1:0] io_test, + output [15:0] io_test, output [31:0] io_data_hi, output [31:0] io_data_lo, output [3:0] io_data_en @@ -931,8 +931,8 @@ module el2_lsu_bus_buffer( wire ibuf_drain_vld = ibuf_valid & _T_787; // @[el2_lsu_bus_buffer.scala 250:32] wire _T_769 = ibuf_drain_vld & _T_768; // @[el2_lsu_bus_buffer.scala 244:34] wire ibuf_rst = _T_769 | io_dec_tlu_force_halt; // @[el2_lsu_bus_buffer.scala 244:49] - reg [1:0] WrPtr1_r; // @[el2_lsu_bus_buffer.scala 642:49] - reg [1:0] WrPtr0_r; // @[el2_lsu_bus_buffer.scala 641:49] + reg [1:0] WrPtr1_r; // @[el2_lsu_bus_buffer.scala 643:49] + reg [1:0] WrPtr0_r; // @[el2_lsu_bus_buffer.scala 642:49] reg [1:0] ibuf_tag; // @[Reg.scala 27:20] wire [1:0] ibuf_sz_in = {io_lsu_pkt_r_word,io_lsu_pkt_r_half}; // @[Cat.scala 29:58] wire [3:0] _T_794 = ibuf_byteen | ldst_byteen_lo_r; // @[el2_lsu_bus_buffer.scala 260:77] @@ -973,33 +973,33 @@ module el2_lsu_bus_buffer( reg ibuf_nomerge; // @[Reg.scala 27:20] reg ibuf_unsign; // @[Reg.scala 27:20] reg [1:0] ibuf_sz; // @[Reg.scala 27:20] - wire _T_4350 = buf_write[3] & _T_2531; // @[el2_lsu_bus_buffer.scala 547:64] - wire _T_4351 = ~buf_cmd_state_bus_en_3; // @[el2_lsu_bus_buffer.scala 547:91] - wire _T_4352 = _T_4350 & _T_4351; // @[el2_lsu_bus_buffer.scala 547:89] - wire _T_4345 = buf_write[2] & _T_2527; // @[el2_lsu_bus_buffer.scala 547:64] - wire _T_4346 = ~buf_cmd_state_bus_en_2; // @[el2_lsu_bus_buffer.scala 547:91] - wire _T_4347 = _T_4345 & _T_4346; // @[el2_lsu_bus_buffer.scala 547:89] - wire [1:0] _T_4353 = _T_4352 + _T_4347; // @[el2_lsu_bus_buffer.scala 547:142] - wire _T_4340 = buf_write[1] & _T_2523; // @[el2_lsu_bus_buffer.scala 547:64] - wire _T_4341 = ~buf_cmd_state_bus_en_1; // @[el2_lsu_bus_buffer.scala 547:91] - wire _T_4342 = _T_4340 & _T_4341; // @[el2_lsu_bus_buffer.scala 547:89] - wire [1:0] _GEN_365 = {{1'd0}, _T_4342}; // @[el2_lsu_bus_buffer.scala 547:142] - wire [2:0] _T_4354 = _T_4353 + _GEN_365; // @[el2_lsu_bus_buffer.scala 547:142] - wire _T_4335 = buf_write[0] & _T_2519; // @[el2_lsu_bus_buffer.scala 547:64] - wire _T_4336 = ~buf_cmd_state_bus_en_0; // @[el2_lsu_bus_buffer.scala 547:91] - wire _T_4337 = _T_4335 & _T_4336; // @[el2_lsu_bus_buffer.scala 547:89] - wire [2:0] _GEN_366 = {{2'd0}, _T_4337}; // @[el2_lsu_bus_buffer.scala 547:142] - wire [3:0] buf_numvld_wrcmd_any = _T_4354 + _GEN_366; // @[el2_lsu_bus_buffer.scala 547:142] + wire _T_4353 = buf_write[3] & _T_2531; // @[el2_lsu_bus_buffer.scala 548:64] + wire _T_4354 = ~buf_cmd_state_bus_en_3; // @[el2_lsu_bus_buffer.scala 548:91] + wire _T_4355 = _T_4353 & _T_4354; // @[el2_lsu_bus_buffer.scala 548:89] + wire _T_4348 = buf_write[2] & _T_2527; // @[el2_lsu_bus_buffer.scala 548:64] + wire _T_4349 = ~buf_cmd_state_bus_en_2; // @[el2_lsu_bus_buffer.scala 548:91] + wire _T_4350 = _T_4348 & _T_4349; // @[el2_lsu_bus_buffer.scala 548:89] + wire [1:0] _T_4356 = _T_4355 + _T_4350; // @[el2_lsu_bus_buffer.scala 548:142] + wire _T_4343 = buf_write[1] & _T_2523; // @[el2_lsu_bus_buffer.scala 548:64] + wire _T_4344 = ~buf_cmd_state_bus_en_1; // @[el2_lsu_bus_buffer.scala 548:91] + wire _T_4345 = _T_4343 & _T_4344; // @[el2_lsu_bus_buffer.scala 548:89] + wire [1:0] _GEN_365 = {{1'd0}, _T_4345}; // @[el2_lsu_bus_buffer.scala 548:142] + wire [2:0] _T_4357 = _T_4356 + _GEN_365; // @[el2_lsu_bus_buffer.scala 548:142] + wire _T_4338 = buf_write[0] & _T_2519; // @[el2_lsu_bus_buffer.scala 548:64] + wire _T_4339 = ~buf_cmd_state_bus_en_0; // @[el2_lsu_bus_buffer.scala 548:91] + wire _T_4340 = _T_4338 & _T_4339; // @[el2_lsu_bus_buffer.scala 548:89] + wire [2:0] _GEN_366 = {{2'd0}, _T_4340}; // @[el2_lsu_bus_buffer.scala 548:142] + wire [3:0] buf_numvld_wrcmd_any = _T_4357 + _GEN_366; // @[el2_lsu_bus_buffer.scala 548:142] wire _T_942 = buf_numvld_wrcmd_any == 4'h1; // @[el2_lsu_bus_buffer.scala 296:43] - wire _T_4367 = _T_2531 & _T_4351; // @[el2_lsu_bus_buffer.scala 548:73] - wire _T_4364 = _T_2527 & _T_4346; // @[el2_lsu_bus_buffer.scala 548:73] - wire [1:0] _T_4368 = _T_4367 + _T_4364; // @[el2_lsu_bus_buffer.scala 548:126] - wire _T_4361 = _T_2523 & _T_4341; // @[el2_lsu_bus_buffer.scala 548:73] - wire [1:0] _GEN_367 = {{1'd0}, _T_4361}; // @[el2_lsu_bus_buffer.scala 548:126] - wire [2:0] _T_4369 = _T_4368 + _GEN_367; // @[el2_lsu_bus_buffer.scala 548:126] - wire _T_4358 = _T_2519 & _T_4336; // @[el2_lsu_bus_buffer.scala 548:73] - wire [2:0] _GEN_368 = {{2'd0}, _T_4358}; // @[el2_lsu_bus_buffer.scala 548:126] - wire [3:0] buf_numvld_cmd_any = _T_4369 + _GEN_368; // @[el2_lsu_bus_buffer.scala 548:126] + wire _T_4370 = _T_2531 & _T_4354; // @[el2_lsu_bus_buffer.scala 549:73] + wire _T_4367 = _T_2527 & _T_4349; // @[el2_lsu_bus_buffer.scala 549:73] + wire [1:0] _T_4371 = _T_4370 + _T_4367; // @[el2_lsu_bus_buffer.scala 549:126] + wire _T_4364 = _T_2523 & _T_4344; // @[el2_lsu_bus_buffer.scala 549:73] + wire [1:0] _GEN_367 = {{1'd0}, _T_4364}; // @[el2_lsu_bus_buffer.scala 549:126] + wire [2:0] _T_4372 = _T_4371 + _GEN_367; // @[el2_lsu_bus_buffer.scala 549:126] + wire _T_4361 = _T_2519 & _T_4339; // @[el2_lsu_bus_buffer.scala 549:73] + wire [2:0] _GEN_368 = {{2'd0}, _T_4361}; // @[el2_lsu_bus_buffer.scala 549:126] + wire [3:0] buf_numvld_cmd_any = _T_4372 + _GEN_368; // @[el2_lsu_bus_buffer.scala 549:126] wire _T_943 = buf_numvld_cmd_any == 4'h1; // @[el2_lsu_bus_buffer.scala 296:72] wire _T_944 = _T_942 & _T_943; // @[el2_lsu_bus_buffer.scala 296:51] reg [2:0] obuf_wr_timer; // @[el2_lsu_bus_buffer.scala 393:54] @@ -1029,59 +1029,59 @@ module el2_lsu_bus_buffer( wire _T_983 = obuf_wr_timer < 3'h7; // @[el2_lsu_bus_buffer.scala 299:95] wire _T_984 = _T_982 & _T_983; // @[el2_lsu_bus_buffer.scala 299:79] wire [2:0] _T_986 = obuf_wr_timer + 3'h1; // @[el2_lsu_bus_buffer.scala 299:121] - wire _T_4386 = buf_state_3 == 3'h1; // @[el2_lsu_bus_buffer.scala 549:63] - wire _T_4390 = _T_4386 | _T_4367; // @[el2_lsu_bus_buffer.scala 549:74] - wire _T_4381 = buf_state_2 == 3'h1; // @[el2_lsu_bus_buffer.scala 549:63] - wire _T_4385 = _T_4381 | _T_4364; // @[el2_lsu_bus_buffer.scala 549:74] - wire [1:0] _T_4391 = _T_4390 + _T_4385; // @[el2_lsu_bus_buffer.scala 549:154] - wire _T_4376 = buf_state_1 == 3'h1; // @[el2_lsu_bus_buffer.scala 549:63] - wire _T_4380 = _T_4376 | _T_4361; // @[el2_lsu_bus_buffer.scala 549:74] - wire [1:0] _GEN_369 = {{1'd0}, _T_4380}; // @[el2_lsu_bus_buffer.scala 549:154] - wire [2:0] _T_4392 = _T_4391 + _GEN_369; // @[el2_lsu_bus_buffer.scala 549:154] - wire _T_4371 = buf_state_0 == 3'h1; // @[el2_lsu_bus_buffer.scala 549:63] - wire _T_4375 = _T_4371 | _T_4358; // @[el2_lsu_bus_buffer.scala 549:74] - wire [2:0] _GEN_370 = {{2'd0}, _T_4375}; // @[el2_lsu_bus_buffer.scala 549:154] - wire [3:0] buf_numvld_pend_any = _T_4392 + _GEN_370; // @[el2_lsu_bus_buffer.scala 549:154] + wire _T_4389 = buf_state_3 == 3'h1; // @[el2_lsu_bus_buffer.scala 550:63] + wire _T_4393 = _T_4389 | _T_4370; // @[el2_lsu_bus_buffer.scala 550:74] + wire _T_4384 = buf_state_2 == 3'h1; // @[el2_lsu_bus_buffer.scala 550:63] + wire _T_4388 = _T_4384 | _T_4367; // @[el2_lsu_bus_buffer.scala 550:74] + wire [1:0] _T_4394 = _T_4393 + _T_4388; // @[el2_lsu_bus_buffer.scala 550:154] + wire _T_4379 = buf_state_1 == 3'h1; // @[el2_lsu_bus_buffer.scala 550:63] + wire _T_4383 = _T_4379 | _T_4364; // @[el2_lsu_bus_buffer.scala 550:74] + wire [1:0] _GEN_369 = {{1'd0}, _T_4383}; // @[el2_lsu_bus_buffer.scala 550:154] + wire [2:0] _T_4395 = _T_4394 + _GEN_369; // @[el2_lsu_bus_buffer.scala 550:154] + wire _T_4374 = buf_state_0 == 3'h1; // @[el2_lsu_bus_buffer.scala 550:63] + wire _T_4378 = _T_4374 | _T_4361; // @[el2_lsu_bus_buffer.scala 550:74] + wire [2:0] _GEN_370 = {{2'd0}, _T_4378}; // @[el2_lsu_bus_buffer.scala 550:154] + wire [3:0] buf_numvld_pend_any = _T_4395 + _GEN_370; // @[el2_lsu_bus_buffer.scala 550:154] wire _T_1013 = buf_numvld_pend_any == 4'h0; // @[el2_lsu_bus_buffer.scala 302:53] wire _T_1014 = ibuf_byp & _T_1013; // @[el2_lsu_bus_buffer.scala 302:31] wire _T_1015 = ~io_lsu_pkt_r_store; // @[el2_lsu_bus_buffer.scala 302:64] wire _T_1016 = _T_1015 | io_no_dword_merge_r; // @[el2_lsu_bus_buffer.scala 302:84] wire ibuf_buf_byp = _T_1014 & _T_1016; // @[el2_lsu_bus_buffer.scala 302:61] wire _T_1017 = ibuf_buf_byp & io_lsu_commit_r; // @[el2_lsu_bus_buffer.scala 317:32] - wire _T_4682 = buf_state_0 == 3'h3; // @[el2_lsu_bus_buffer.scala 578:62] - wire _T_4684 = _T_4682 & buf_sideeffect[0]; // @[el2_lsu_bus_buffer.scala 578:73] - wire _T_4685 = _T_4684 & io_dec_tlu_sideeffect_posted_disable; // @[el2_lsu_bus_buffer.scala 578:93] - wire _T_4686 = buf_state_1 == 3'h3; // @[el2_lsu_bus_buffer.scala 578:62] - wire _T_4688 = _T_4686 & buf_sideeffect[1]; // @[el2_lsu_bus_buffer.scala 578:73] - wire _T_4689 = _T_4688 & io_dec_tlu_sideeffect_posted_disable; // @[el2_lsu_bus_buffer.scala 578:93] - wire _T_4698 = _T_4685 | _T_4689; // @[el2_lsu_bus_buffer.scala 578:141] - wire _T_4690 = buf_state_2 == 3'h3; // @[el2_lsu_bus_buffer.scala 578:62] - wire _T_4692 = _T_4690 & buf_sideeffect[2]; // @[el2_lsu_bus_buffer.scala 578:73] - wire _T_4693 = _T_4692 & io_dec_tlu_sideeffect_posted_disable; // @[el2_lsu_bus_buffer.scala 578:93] - wire _T_4699 = _T_4698 | _T_4693; // @[el2_lsu_bus_buffer.scala 578:141] - wire _T_4694 = buf_state_3 == 3'h3; // @[el2_lsu_bus_buffer.scala 578:62] - wire _T_4696 = _T_4694 & buf_sideeffect[3]; // @[el2_lsu_bus_buffer.scala 578:73] - wire _T_4697 = _T_4696 & io_dec_tlu_sideeffect_posted_disable; // @[el2_lsu_bus_buffer.scala 578:93] - wire bus_sideeffect_pend = _T_4699 | _T_4697; // @[el2_lsu_bus_buffer.scala 578:141] + wire _T_4685 = buf_state_0 == 3'h3; // @[el2_lsu_bus_buffer.scala 579:62] + wire _T_4687 = _T_4685 & buf_sideeffect[0]; // @[el2_lsu_bus_buffer.scala 579:73] + wire _T_4688 = _T_4687 & io_dec_tlu_sideeffect_posted_disable; // @[el2_lsu_bus_buffer.scala 579:93] + wire _T_4689 = buf_state_1 == 3'h3; // @[el2_lsu_bus_buffer.scala 579:62] + wire _T_4691 = _T_4689 & buf_sideeffect[1]; // @[el2_lsu_bus_buffer.scala 579:73] + wire _T_4692 = _T_4691 & io_dec_tlu_sideeffect_posted_disable; // @[el2_lsu_bus_buffer.scala 579:93] + wire _T_4701 = _T_4688 | _T_4692; // @[el2_lsu_bus_buffer.scala 579:141] + wire _T_4693 = buf_state_2 == 3'h3; // @[el2_lsu_bus_buffer.scala 579:62] + wire _T_4695 = _T_4693 & buf_sideeffect[2]; // @[el2_lsu_bus_buffer.scala 579:73] + wire _T_4696 = _T_4695 & io_dec_tlu_sideeffect_posted_disable; // @[el2_lsu_bus_buffer.scala 579:93] + wire _T_4702 = _T_4701 | _T_4696; // @[el2_lsu_bus_buffer.scala 579:141] + wire _T_4697 = buf_state_3 == 3'h3; // @[el2_lsu_bus_buffer.scala 579:62] + wire _T_4699 = _T_4697 & buf_sideeffect[3]; // @[el2_lsu_bus_buffer.scala 579:73] + wire _T_4700 = _T_4699 & io_dec_tlu_sideeffect_posted_disable; // @[el2_lsu_bus_buffer.scala 579:93] + wire bus_sideeffect_pend = _T_4702 | _T_4700; // @[el2_lsu_bus_buffer.scala 579:141] wire _T_1018 = io_is_sideeffects_r & bus_sideeffect_pend; // @[el2_lsu_bus_buffer.scala 317:74] wire _T_1019 = ~_T_1018; // @[el2_lsu_bus_buffer.scala 317:52] wire _T_1020 = _T_1017 & _T_1019; // @[el2_lsu_bus_buffer.scala 317:50] wire _T_1904 = |buf_age_3; // @[el2_lsu_bus_buffer.scala 405:58] wire _T_1905 = ~_T_1904; // @[el2_lsu_bus_buffer.scala 405:45] wire _T_1907 = _T_1905 & _T_2531; // @[el2_lsu_bus_buffer.scala 405:63] - wire _T_1909 = _T_1907 & _T_4351; // @[el2_lsu_bus_buffer.scala 405:88] + wire _T_1909 = _T_1907 & _T_4354; // @[el2_lsu_bus_buffer.scala 405:88] wire _T_1898 = |buf_age_2; // @[el2_lsu_bus_buffer.scala 405:58] wire _T_1899 = ~_T_1898; // @[el2_lsu_bus_buffer.scala 405:45] wire _T_1901 = _T_1899 & _T_2527; // @[el2_lsu_bus_buffer.scala 405:63] - wire _T_1903 = _T_1901 & _T_4346; // @[el2_lsu_bus_buffer.scala 405:88] + wire _T_1903 = _T_1901 & _T_4349; // @[el2_lsu_bus_buffer.scala 405:88] wire _T_1892 = |buf_age_1; // @[el2_lsu_bus_buffer.scala 405:58] wire _T_1893 = ~_T_1892; // @[el2_lsu_bus_buffer.scala 405:45] wire _T_1895 = _T_1893 & _T_2523; // @[el2_lsu_bus_buffer.scala 405:63] - wire _T_1897 = _T_1895 & _T_4341; // @[el2_lsu_bus_buffer.scala 405:88] + wire _T_1897 = _T_1895 & _T_4344; // @[el2_lsu_bus_buffer.scala 405:88] wire _T_1886 = |buf_age_0; // @[el2_lsu_bus_buffer.scala 405:58] wire _T_1887 = ~_T_1886; // @[el2_lsu_bus_buffer.scala 405:45] wire _T_1889 = _T_1887 & _T_2519; // @[el2_lsu_bus_buffer.scala 405:63] - wire _T_1891 = _T_1889 & _T_4336; // @[el2_lsu_bus_buffer.scala 405:88] + wire _T_1891 = _T_1889 & _T_4339; // @[el2_lsu_bus_buffer.scala 405:88] wire [3:0] CmdPtr0Dec = {_T_1909,_T_1903,_T_1897,_T_1891}; // @[Cat.scala 29:58] wire found_cmdptr0 = |CmdPtr0Dec; // @[el2_lsu_bus_buffer.scala 410:31] wire _T_1034 = _T_2519 & found_cmdptr0; // @[el2_lsu_bus_buffer.scala 318:47] @@ -1112,28 +1112,28 @@ module el2_lsu_bus_buffer( wire _T_1950 = ~CmdPtr0Dec[3]; // @[el2_lsu_bus_buffer.scala 406:83] wire _T_1951 = _T_1948 & _T_1950; // @[el2_lsu_bus_buffer.scala 406:81] wire _T_1953 = _T_1951 & _T_2531; // @[el2_lsu_bus_buffer.scala 406:98] - wire _T_1955 = _T_1953 & _T_4351; // @[el2_lsu_bus_buffer.scala 406:123] + wire _T_1955 = _T_1953 & _T_4354; // @[el2_lsu_bus_buffer.scala 406:123] wire [3:0] _T_1935 = buf_age_2 & _T_1945; // @[el2_lsu_bus_buffer.scala 406:59] wire _T_1936 = |_T_1935; // @[el2_lsu_bus_buffer.scala 406:76] wire _T_1937 = ~_T_1936; // @[el2_lsu_bus_buffer.scala 406:45] wire _T_1939 = ~CmdPtr0Dec[2]; // @[el2_lsu_bus_buffer.scala 406:83] wire _T_1940 = _T_1937 & _T_1939; // @[el2_lsu_bus_buffer.scala 406:81] wire _T_1942 = _T_1940 & _T_2527; // @[el2_lsu_bus_buffer.scala 406:98] - wire _T_1944 = _T_1942 & _T_4346; // @[el2_lsu_bus_buffer.scala 406:123] + wire _T_1944 = _T_1942 & _T_4349; // @[el2_lsu_bus_buffer.scala 406:123] wire [3:0] _T_1924 = buf_age_1 & _T_1945; // @[el2_lsu_bus_buffer.scala 406:59] wire _T_1925 = |_T_1924; // @[el2_lsu_bus_buffer.scala 406:76] wire _T_1926 = ~_T_1925; // @[el2_lsu_bus_buffer.scala 406:45] wire _T_1928 = ~CmdPtr0Dec[1]; // @[el2_lsu_bus_buffer.scala 406:83] wire _T_1929 = _T_1926 & _T_1928; // @[el2_lsu_bus_buffer.scala 406:81] wire _T_1931 = _T_1929 & _T_2523; // @[el2_lsu_bus_buffer.scala 406:98] - wire _T_1933 = _T_1931 & _T_4341; // @[el2_lsu_bus_buffer.scala 406:123] + wire _T_1933 = _T_1931 & _T_4344; // @[el2_lsu_bus_buffer.scala 406:123] wire [3:0] _T_1913 = buf_age_0 & _T_1945; // @[el2_lsu_bus_buffer.scala 406:59] wire _T_1914 = |_T_1913; // @[el2_lsu_bus_buffer.scala 406:76] wire _T_1915 = ~_T_1914; // @[el2_lsu_bus_buffer.scala 406:45] wire _T_1917 = ~CmdPtr0Dec[0]; // @[el2_lsu_bus_buffer.scala 406:83] wire _T_1918 = _T_1915 & _T_1917; // @[el2_lsu_bus_buffer.scala 406:81] wire _T_1920 = _T_1918 & _T_2519; // @[el2_lsu_bus_buffer.scala 406:98] - wire _T_1922 = _T_1920 & _T_4336; // @[el2_lsu_bus_buffer.scala 406:123] + wire _T_1922 = _T_1920 & _T_4339; // @[el2_lsu_bus_buffer.scala 406:123] wire [3:0] CmdPtr1Dec = {_T_1955,_T_1944,_T_1933,_T_1922}; // @[Cat.scala 29:58] wire found_cmdptr1 = |CmdPtr1Dec; // @[el2_lsu_bus_buffer.scala 411:31] wire _T_1133 = _T_1132 | found_cmdptr1; // @[el2_lsu_bus_buffer.scala 320:181] @@ -1145,10 +1145,10 @@ module el2_lsu_bus_buffer( reg obuf_write; // @[Reg.scala 27:20] reg obuf_cmd_done; // @[el2_lsu_bus_buffer.scala 380:54] reg obuf_data_done; // @[el2_lsu_bus_buffer.scala 381:55] - wire _T_4757 = obuf_cmd_done | obuf_data_done; // @[el2_lsu_bus_buffer.scala 582:54] - wire _T_4758 = obuf_cmd_done ? io_lsu_axi_wready : io_lsu_axi_awready; // @[el2_lsu_bus_buffer.scala 582:75] - wire _T_4760 = _T_4757 ? _T_4758 : io_lsu_axi_awready; // @[el2_lsu_bus_buffer.scala 582:39] - wire bus_cmd_ready = obuf_write ? _T_4760 : io_lsu_axi_arready; // @[el2_lsu_bus_buffer.scala 582:23] + wire _T_4760 = obuf_cmd_done | obuf_data_done; // @[el2_lsu_bus_buffer.scala 583:54] + wire _T_4761 = obuf_cmd_done ? io_lsu_axi_wready : io_lsu_axi_awready; // @[el2_lsu_bus_buffer.scala 583:75] + wire _T_4763 = _T_4760 ? _T_4761 : io_lsu_axi_awready; // @[el2_lsu_bus_buffer.scala 583:39] + wire bus_cmd_ready = obuf_write ? _T_4763 : io_lsu_axi_arready; // @[el2_lsu_bus_buffer.scala 583:23] wire _T_1157 = ~obuf_valid; // @[el2_lsu_bus_buffer.scala 321:48] wire _T_1158 = bus_cmd_ready | _T_1157; // @[el2_lsu_bus_buffer.scala 321:46] reg obuf_nosend; // @[Reg.scala 27:20] @@ -1157,52 +1157,52 @@ module el2_lsu_bus_buffer( wire _T_1161 = ~obuf_wr_wait; // @[el2_lsu_bus_buffer.scala 321:77] wire _T_1162 = _T_1160 & _T_1161; // @[el2_lsu_bus_buffer.scala 321:75] reg [31:0] obuf_addr; // @[el2_lib.scala 491:16] - wire _T_4705 = obuf_addr[31:3] == buf_addr_0[31:3]; // @[el2_lsu_bus_buffer.scala 580:56] - wire _T_4706 = obuf_valid & _T_4705; // @[el2_lsu_bus_buffer.scala 580:38] - wire _T_4708 = obuf_tag1 == 2'h0; // @[el2_lsu_bus_buffer.scala 580:126] - wire _T_4709 = obuf_merge & _T_4708; // @[el2_lsu_bus_buffer.scala 580:114] - wire _T_4710 = _T_3471 | _T_4709; // @[el2_lsu_bus_buffer.scala 580:100] - wire _T_4711 = ~_T_4710; // @[el2_lsu_bus_buffer.scala 580:80] - wire _T_4712 = _T_4706 & _T_4711; // @[el2_lsu_bus_buffer.scala 580:78] - wire _T_4749 = _T_4682 & _T_4712; // @[Mux.scala 27:72] - wire _T_4717 = obuf_addr[31:3] == buf_addr_1[31:3]; // @[el2_lsu_bus_buffer.scala 580:56] - wire _T_4718 = obuf_valid & _T_4717; // @[el2_lsu_bus_buffer.scala 580:38] - wire _T_4720 = obuf_tag1 == 2'h1; // @[el2_lsu_bus_buffer.scala 580:126] - wire _T_4721 = obuf_merge & _T_4720; // @[el2_lsu_bus_buffer.scala 580:114] - wire _T_4722 = _T_3664 | _T_4721; // @[el2_lsu_bus_buffer.scala 580:100] - wire _T_4723 = ~_T_4722; // @[el2_lsu_bus_buffer.scala 580:80] - wire _T_4724 = _T_4718 & _T_4723; // @[el2_lsu_bus_buffer.scala 580:78] - wire _T_4750 = _T_4686 & _T_4724; // @[Mux.scala 27:72] - wire _T_4753 = _T_4749 | _T_4750; // @[Mux.scala 27:72] - wire _T_4729 = obuf_addr[31:3] == buf_addr_2[31:3]; // @[el2_lsu_bus_buffer.scala 580:56] - wire _T_4730 = obuf_valid & _T_4729; // @[el2_lsu_bus_buffer.scala 580:38] - wire _T_4732 = obuf_tag1 == 2'h2; // @[el2_lsu_bus_buffer.scala 580:126] - wire _T_4733 = obuf_merge & _T_4732; // @[el2_lsu_bus_buffer.scala 580:114] - wire _T_4734 = _T_3857 | _T_4733; // @[el2_lsu_bus_buffer.scala 580:100] - wire _T_4735 = ~_T_4734; // @[el2_lsu_bus_buffer.scala 580:80] - wire _T_4736 = _T_4730 & _T_4735; // @[el2_lsu_bus_buffer.scala 580:78] - wire _T_4751 = _T_4690 & _T_4736; // @[Mux.scala 27:72] - wire _T_4754 = _T_4753 | _T_4751; // @[Mux.scala 27:72] - wire _T_4741 = obuf_addr[31:3] == buf_addr_3[31:3]; // @[el2_lsu_bus_buffer.scala 580:56] - wire _T_4742 = obuf_valid & _T_4741; // @[el2_lsu_bus_buffer.scala 580:38] - wire _T_4744 = obuf_tag1 == 2'h3; // @[el2_lsu_bus_buffer.scala 580:126] - wire _T_4745 = obuf_merge & _T_4744; // @[el2_lsu_bus_buffer.scala 580:114] - wire _T_4746 = _T_4050 | _T_4745; // @[el2_lsu_bus_buffer.scala 580:100] - wire _T_4747 = ~_T_4746; // @[el2_lsu_bus_buffer.scala 580:80] - wire _T_4748 = _T_4742 & _T_4747; // @[el2_lsu_bus_buffer.scala 580:78] - wire _T_4752 = _T_4694 & _T_4748; // @[Mux.scala 27:72] - wire bus_addr_match_pending = _T_4754 | _T_4752; // @[Mux.scala 27:72] + wire _T_4708 = obuf_addr[31:3] == buf_addr_0[31:3]; // @[el2_lsu_bus_buffer.scala 581:56] + wire _T_4709 = obuf_valid & _T_4708; // @[el2_lsu_bus_buffer.scala 581:38] + wire _T_4711 = obuf_tag1 == 2'h0; // @[el2_lsu_bus_buffer.scala 581:126] + wire _T_4712 = obuf_merge & _T_4711; // @[el2_lsu_bus_buffer.scala 581:114] + wire _T_4713 = _T_3471 | _T_4712; // @[el2_lsu_bus_buffer.scala 581:100] + wire _T_4714 = ~_T_4713; // @[el2_lsu_bus_buffer.scala 581:80] + wire _T_4715 = _T_4709 & _T_4714; // @[el2_lsu_bus_buffer.scala 581:78] + wire _T_4752 = _T_4685 & _T_4715; // @[Mux.scala 27:72] + wire _T_4720 = obuf_addr[31:3] == buf_addr_1[31:3]; // @[el2_lsu_bus_buffer.scala 581:56] + wire _T_4721 = obuf_valid & _T_4720; // @[el2_lsu_bus_buffer.scala 581:38] + wire _T_4723 = obuf_tag1 == 2'h1; // @[el2_lsu_bus_buffer.scala 581:126] + wire _T_4724 = obuf_merge & _T_4723; // @[el2_lsu_bus_buffer.scala 581:114] + wire _T_4725 = _T_3664 | _T_4724; // @[el2_lsu_bus_buffer.scala 581:100] + wire _T_4726 = ~_T_4725; // @[el2_lsu_bus_buffer.scala 581:80] + wire _T_4727 = _T_4721 & _T_4726; // @[el2_lsu_bus_buffer.scala 581:78] + wire _T_4753 = _T_4689 & _T_4727; // @[Mux.scala 27:72] + wire _T_4756 = _T_4752 | _T_4753; // @[Mux.scala 27:72] + wire _T_4732 = obuf_addr[31:3] == buf_addr_2[31:3]; // @[el2_lsu_bus_buffer.scala 581:56] + wire _T_4733 = obuf_valid & _T_4732; // @[el2_lsu_bus_buffer.scala 581:38] + wire _T_4735 = obuf_tag1 == 2'h2; // @[el2_lsu_bus_buffer.scala 581:126] + wire _T_4736 = obuf_merge & _T_4735; // @[el2_lsu_bus_buffer.scala 581:114] + wire _T_4737 = _T_3857 | _T_4736; // @[el2_lsu_bus_buffer.scala 581:100] + wire _T_4738 = ~_T_4737; // @[el2_lsu_bus_buffer.scala 581:80] + wire _T_4739 = _T_4733 & _T_4738; // @[el2_lsu_bus_buffer.scala 581:78] + wire _T_4754 = _T_4693 & _T_4739; // @[Mux.scala 27:72] + wire _T_4757 = _T_4756 | _T_4754; // @[Mux.scala 27:72] + wire _T_4744 = obuf_addr[31:3] == buf_addr_3[31:3]; // @[el2_lsu_bus_buffer.scala 581:56] + wire _T_4745 = obuf_valid & _T_4744; // @[el2_lsu_bus_buffer.scala 581:38] + wire _T_4747 = obuf_tag1 == 2'h3; // @[el2_lsu_bus_buffer.scala 581:126] + wire _T_4748 = obuf_merge & _T_4747; // @[el2_lsu_bus_buffer.scala 581:114] + wire _T_4749 = _T_4050 | _T_4748; // @[el2_lsu_bus_buffer.scala 581:100] + wire _T_4750 = ~_T_4749; // @[el2_lsu_bus_buffer.scala 581:80] + wire _T_4751 = _T_4745 & _T_4750; // @[el2_lsu_bus_buffer.scala 581:78] + wire _T_4755 = _T_4697 & _T_4751; // @[Mux.scala 27:72] + wire bus_addr_match_pending = _T_4757 | _T_4755; // @[Mux.scala 27:72] wire _T_1165 = ~bus_addr_match_pending; // @[el2_lsu_bus_buffer.scala 321:118] wire _T_1166 = _T_1162 & _T_1165; // @[el2_lsu_bus_buffer.scala 321:116] wire obuf_wr_en = _T_1166 & io_lsu_bus_clk_en; // @[el2_lsu_bus_buffer.scala 321:142] wire _T_1168 = obuf_valid & obuf_nosend; // @[el2_lsu_bus_buffer.scala 323:47] - wire bus_wcmd_sent = io_lsu_axi_awvalid & io_lsu_axi_awready; // @[el2_lsu_bus_buffer.scala 583:39] - wire _T_4764 = obuf_cmd_done | bus_wcmd_sent; // @[el2_lsu_bus_buffer.scala 585:35] - wire bus_wdata_sent = io_lsu_axi_wvalid & io_lsu_axi_wready; // @[el2_lsu_bus_buffer.scala 584:39] - wire _T_4765 = obuf_data_done | bus_wdata_sent; // @[el2_lsu_bus_buffer.scala 585:70] - wire _T_4766 = _T_4764 & _T_4765; // @[el2_lsu_bus_buffer.scala 585:52] - wire _T_4767 = io_lsu_axi_arvalid & io_lsu_axi_arready; // @[el2_lsu_bus_buffer.scala 585:111] - wire bus_cmd_sent = _T_4766 | _T_4767; // @[el2_lsu_bus_buffer.scala 585:89] + wire bus_wcmd_sent = io_lsu_axi_awvalid & io_lsu_axi_awready; // @[el2_lsu_bus_buffer.scala 584:39] + wire _T_4767 = obuf_cmd_done | bus_wcmd_sent; // @[el2_lsu_bus_buffer.scala 586:35] + wire bus_wdata_sent = io_lsu_axi_wvalid & io_lsu_axi_wready; // @[el2_lsu_bus_buffer.scala 585:39] + wire _T_4768 = obuf_data_done | bus_wdata_sent; // @[el2_lsu_bus_buffer.scala 586:70] + wire _T_4769 = _T_4767 & _T_4768; // @[el2_lsu_bus_buffer.scala 586:52] + wire _T_4770 = io_lsu_axi_arvalid & io_lsu_axi_arready; // @[el2_lsu_bus_buffer.scala 586:111] + wire bus_cmd_sent = _T_4769 | _T_4770; // @[el2_lsu_bus_buffer.scala 586:89] wire _T_1169 = bus_cmd_sent | _T_1168; // @[el2_lsu_bus_buffer.scala 323:33] wire _T_1170 = ~obuf_wr_en; // @[el2_lsu_bus_buffer.scala 323:65] wire _T_1171 = _T_1169 & _T_1170; // @[el2_lsu_bus_buffer.scala 323:63] @@ -1240,7 +1240,7 @@ module el2_lsu_bus_buffer( wire _T_1275 = ~obuf_nosend; // @[el2_lsu_bus_buffer.scala 356:20] wire _T_1276 = obuf_valid & _T_1275; // @[el2_lsu_bus_buffer.scala 356:18] reg obuf_rdrsp_pend; // @[el2_lsu_bus_buffer.scala 382:56] - wire bus_rsp_read = io_lsu_axi_rvalid & io_lsu_axi_rready; // @[el2_lsu_bus_buffer.scala 586:37] + wire bus_rsp_read = io_lsu_axi_rvalid & io_lsu_axi_rready; // @[el2_lsu_bus_buffer.scala 587:37] reg [2:0] obuf_rdrsp_tag; // @[el2_lsu_bus_buffer.scala 383:55] wire _T_1277 = io_lsu_axi_rid == obuf_rdrsp_tag; // @[el2_lsu_bus_buffer.scala 356:90] wire _T_1278 = bus_rsp_read & _T_1277; // @[el2_lsu_bus_buffer.scala 356:70] @@ -1428,17 +1428,6 @@ module el2_lsu_bus_buffer( wire _T_1970 = |buf_rsp_pickage_3; // @[el2_lsu_bus_buffer.scala 409:65] wire _T_1971 = ~_T_1970; // @[el2_lsu_bus_buffer.scala 409:44] wire _T_1973 = _T_1971 & _T_2655; // @[el2_lsu_bus_buffer.scala 409:70] - wire [7:0] _T_1979 = {4'h0,_T_1909,_T_1903,_T_1897,_T_1891}; // @[Cat.scala 29:58] - wire _T_1982 = _T_1979[4] | _T_1979[5]; // @[el2_lsu_bus_buffer.scala 413:42] - wire _T_1984 = _T_1982 | _T_1979[6]; // @[el2_lsu_bus_buffer.scala 413:48] - wire _T_1986 = _T_1984 | _T_1979[7]; // @[el2_lsu_bus_buffer.scala 413:54] - wire _T_1989 = _T_1979[2] | _T_1979[3]; // @[el2_lsu_bus_buffer.scala 413:67] - wire _T_1991 = _T_1989 | _T_1979[6]; // @[el2_lsu_bus_buffer.scala 413:73] - wire _T_1993 = _T_1991 | _T_1979[7]; // @[el2_lsu_bus_buffer.scala 413:79] - wire _T_1996 = _T_1979[1] | _T_1979[3]; // @[el2_lsu_bus_buffer.scala 413:92] - wire _T_1998 = _T_1996 | _T_1979[5]; // @[el2_lsu_bus_buffer.scala 413:98] - wire _T_2000 = _T_1998 | _T_1979[7]; // @[el2_lsu_bus_buffer.scala 413:104] - wire [2:0] _T_2002 = {_T_1986,_T_1993,_T_2000}; // @[Cat.scala 29:58] wire [7:0] _T_2029 = {4'h0,_T_1973,_T_1969,_T_1965,_T_1961}; // @[Cat.scala 29:58] wire _T_2032 = _T_2029[4] | _T_2029[5]; // @[el2_lsu_bus_buffer.scala 413:42] wire _T_2034 = _T_2032 | _T_2029[6]; // @[el2_lsu_bus_buffer.scala 413:48] @@ -1465,7 +1454,7 @@ module el2_lsu_bus_buffer( wire _T_3453 = _T_3450 | _T_3452; // @[el2_lsu_bus_buffer.scala 470:183] wire _T_3463 = io_lsu_bus_clk_en | io_dec_tlu_force_halt; // @[el2_lsu_bus_buffer.scala 477:46] wire _T_3498 = 3'h3 == buf_state_0; // @[Conditional.scala 37:30] - wire bus_rsp_write = io_lsu_axi_bvalid & io_lsu_axi_bready; // @[el2_lsu_bus_buffer.scala 587:38] + wire bus_rsp_write = io_lsu_axi_bvalid & io_lsu_axi_bready; // @[el2_lsu_bus_buffer.scala 588:38] wire _T_3543 = io_lsu_axi_bid == 3'h0; // @[el2_lsu_bus_buffer.scala 495:73] wire _T_3544 = bus_rsp_write & _T_3543; // @[el2_lsu_bus_buffer.scala 495:52] wire _T_3545 = io_lsu_axi_rid == 3'h0; // @[el2_lsu_bus_buffer.scala 496:46] @@ -1532,7 +1521,7 @@ module el2_lsu_bus_buffer( wire _T_2062 = _T_2060 & _T_3441; // @[el2_lsu_bus_buffer.scala 435:41] wire _T_2064 = _T_2062 & _T_1782; // @[el2_lsu_bus_buffer.scala 435:71] wire _T_2066 = _T_2064 & _T_1780; // @[el2_lsu_bus_buffer.scala 435:92] - wire _T_2067 = _T_4375 | _T_2066; // @[el2_lsu_bus_buffer.scala 434:86] + wire _T_2067 = _T_4378 | _T_2066; // @[el2_lsu_bus_buffer.scala 434:86] wire _T_2068 = ibuf_byp & io_lsu_busreq_r; // @[el2_lsu_bus_buffer.scala 436:17] wire _T_2069 = _T_2068 & io_ldst_dual_r; // @[el2_lsu_bus_buffer.scala 436:35] wire _T_2071 = _T_2069 & _T_1785; // @[el2_lsu_bus_buffer.scala 436:52] @@ -1541,19 +1530,19 @@ module el2_lsu_bus_buffer( wire _T_2075 = _T_2054 & _T_2074; // @[el2_lsu_bus_buffer.scala 433:113] wire _T_2077 = _T_2075 | buf_age_0[0]; // @[el2_lsu_bus_buffer.scala 436:97] wire _T_2091 = _T_2064 & _T_1791; // @[el2_lsu_bus_buffer.scala 435:92] - wire _T_2092 = _T_4380 | _T_2091; // @[el2_lsu_bus_buffer.scala 434:86] + wire _T_2092 = _T_4383 | _T_2091; // @[el2_lsu_bus_buffer.scala 434:86] wire _T_2098 = _T_2071 & _T_1793; // @[el2_lsu_bus_buffer.scala 436:73] wire _T_2099 = _T_2092 | _T_2098; // @[el2_lsu_bus_buffer.scala 435:114] wire _T_2100 = _T_2054 & _T_2099; // @[el2_lsu_bus_buffer.scala 433:113] wire _T_2102 = _T_2100 | buf_age_0[1]; // @[el2_lsu_bus_buffer.scala 436:97] wire _T_2116 = _T_2064 & _T_1802; // @[el2_lsu_bus_buffer.scala 435:92] - wire _T_2117 = _T_4385 | _T_2116; // @[el2_lsu_bus_buffer.scala 434:86] + wire _T_2117 = _T_4388 | _T_2116; // @[el2_lsu_bus_buffer.scala 434:86] wire _T_2123 = _T_2071 & _T_1804; // @[el2_lsu_bus_buffer.scala 436:73] wire _T_2124 = _T_2117 | _T_2123; // @[el2_lsu_bus_buffer.scala 435:114] wire _T_2125 = _T_2054 & _T_2124; // @[el2_lsu_bus_buffer.scala 433:113] wire _T_2127 = _T_2125 | buf_age_0[2]; // @[el2_lsu_bus_buffer.scala 436:97] wire _T_2141 = _T_2064 & _T_1813; // @[el2_lsu_bus_buffer.scala 435:92] - wire _T_2142 = _T_4390 | _T_2141; // @[el2_lsu_bus_buffer.scala 434:86] + wire _T_2142 = _T_4393 | _T_2141; // @[el2_lsu_bus_buffer.scala 434:86] wire _T_2148 = _T_2071 & _T_1815; // @[el2_lsu_bus_buffer.scala 436:73] wire _T_2149 = _T_2142 | _T_2148; // @[el2_lsu_bus_buffer.scala 435:114] wire _T_2150 = _T_2054 & _T_2149; // @[el2_lsu_bus_buffer.scala 433:113] @@ -1624,26 +1613,26 @@ module el2_lsu_bus_buffer( wire _T_2156 = _T_1790 & buf_state_en_1; // @[el2_lsu_bus_buffer.scala 433:94] wire _T_2166 = _T_2062 & _T_1793; // @[el2_lsu_bus_buffer.scala 435:71] wire _T_2168 = _T_2166 & _T_1780; // @[el2_lsu_bus_buffer.scala 435:92] - wire _T_2169 = _T_4375 | _T_2168; // @[el2_lsu_bus_buffer.scala 434:86] + wire _T_2169 = _T_4378 | _T_2168; // @[el2_lsu_bus_buffer.scala 434:86] wire _T_2173 = _T_2069 & _T_1796; // @[el2_lsu_bus_buffer.scala 436:52] wire _T_2175 = _T_2173 & _T_1782; // @[el2_lsu_bus_buffer.scala 436:73] wire _T_2176 = _T_2169 | _T_2175; // @[el2_lsu_bus_buffer.scala 435:114] wire _T_2177 = _T_2156 & _T_2176; // @[el2_lsu_bus_buffer.scala 433:113] wire _T_2179 = _T_2177 | buf_age_1[0]; // @[el2_lsu_bus_buffer.scala 436:97] wire _T_2193 = _T_2166 & _T_1791; // @[el2_lsu_bus_buffer.scala 435:92] - wire _T_2194 = _T_4380 | _T_2193; // @[el2_lsu_bus_buffer.scala 434:86] + wire _T_2194 = _T_4383 | _T_2193; // @[el2_lsu_bus_buffer.scala 434:86] wire _T_2200 = _T_2173 & _T_1793; // @[el2_lsu_bus_buffer.scala 436:73] wire _T_2201 = _T_2194 | _T_2200; // @[el2_lsu_bus_buffer.scala 435:114] wire _T_2202 = _T_2156 & _T_2201; // @[el2_lsu_bus_buffer.scala 433:113] wire _T_2204 = _T_2202 | buf_age_1[1]; // @[el2_lsu_bus_buffer.scala 436:97] wire _T_2218 = _T_2166 & _T_1802; // @[el2_lsu_bus_buffer.scala 435:92] - wire _T_2219 = _T_4385 | _T_2218; // @[el2_lsu_bus_buffer.scala 434:86] + wire _T_2219 = _T_4388 | _T_2218; // @[el2_lsu_bus_buffer.scala 434:86] wire _T_2225 = _T_2173 & _T_1804; // @[el2_lsu_bus_buffer.scala 436:73] wire _T_2226 = _T_2219 | _T_2225; // @[el2_lsu_bus_buffer.scala 435:114] wire _T_2227 = _T_2156 & _T_2226; // @[el2_lsu_bus_buffer.scala 433:113] wire _T_2229 = _T_2227 | buf_age_1[2]; // @[el2_lsu_bus_buffer.scala 436:97] wire _T_2243 = _T_2166 & _T_1813; // @[el2_lsu_bus_buffer.scala 435:92] - wire _T_2244 = _T_4390 | _T_2243; // @[el2_lsu_bus_buffer.scala 434:86] + wire _T_2244 = _T_4393 | _T_2243; // @[el2_lsu_bus_buffer.scala 434:86] wire _T_2250 = _T_2173 & _T_1815; // @[el2_lsu_bus_buffer.scala 436:73] wire _T_2251 = _T_2244 | _T_2250; // @[el2_lsu_bus_buffer.scala 435:114] wire _T_2252 = _T_2156 & _T_2251; // @[el2_lsu_bus_buffer.scala 433:113] @@ -1714,26 +1703,26 @@ module el2_lsu_bus_buffer( wire _T_2258 = _T_1801 & buf_state_en_2; // @[el2_lsu_bus_buffer.scala 433:94] wire _T_2268 = _T_2062 & _T_1804; // @[el2_lsu_bus_buffer.scala 435:71] wire _T_2270 = _T_2268 & _T_1780; // @[el2_lsu_bus_buffer.scala 435:92] - wire _T_2271 = _T_4375 | _T_2270; // @[el2_lsu_bus_buffer.scala 434:86] + wire _T_2271 = _T_4378 | _T_2270; // @[el2_lsu_bus_buffer.scala 434:86] wire _T_2275 = _T_2069 & _T_1807; // @[el2_lsu_bus_buffer.scala 436:52] wire _T_2277 = _T_2275 & _T_1782; // @[el2_lsu_bus_buffer.scala 436:73] wire _T_2278 = _T_2271 | _T_2277; // @[el2_lsu_bus_buffer.scala 435:114] wire _T_2279 = _T_2258 & _T_2278; // @[el2_lsu_bus_buffer.scala 433:113] wire _T_2281 = _T_2279 | buf_age_2[0]; // @[el2_lsu_bus_buffer.scala 436:97] wire _T_2295 = _T_2268 & _T_1791; // @[el2_lsu_bus_buffer.scala 435:92] - wire _T_2296 = _T_4380 | _T_2295; // @[el2_lsu_bus_buffer.scala 434:86] + wire _T_2296 = _T_4383 | _T_2295; // @[el2_lsu_bus_buffer.scala 434:86] wire _T_2302 = _T_2275 & _T_1793; // @[el2_lsu_bus_buffer.scala 436:73] wire _T_2303 = _T_2296 | _T_2302; // @[el2_lsu_bus_buffer.scala 435:114] wire _T_2304 = _T_2258 & _T_2303; // @[el2_lsu_bus_buffer.scala 433:113] wire _T_2306 = _T_2304 | buf_age_2[1]; // @[el2_lsu_bus_buffer.scala 436:97] wire _T_2320 = _T_2268 & _T_1802; // @[el2_lsu_bus_buffer.scala 435:92] - wire _T_2321 = _T_4385 | _T_2320; // @[el2_lsu_bus_buffer.scala 434:86] + wire _T_2321 = _T_4388 | _T_2320; // @[el2_lsu_bus_buffer.scala 434:86] wire _T_2327 = _T_2275 & _T_1804; // @[el2_lsu_bus_buffer.scala 436:73] wire _T_2328 = _T_2321 | _T_2327; // @[el2_lsu_bus_buffer.scala 435:114] wire _T_2329 = _T_2258 & _T_2328; // @[el2_lsu_bus_buffer.scala 433:113] wire _T_2331 = _T_2329 | buf_age_2[2]; // @[el2_lsu_bus_buffer.scala 436:97] wire _T_2345 = _T_2268 & _T_1813; // @[el2_lsu_bus_buffer.scala 435:92] - wire _T_2346 = _T_4390 | _T_2345; // @[el2_lsu_bus_buffer.scala 434:86] + wire _T_2346 = _T_4393 | _T_2345; // @[el2_lsu_bus_buffer.scala 434:86] wire _T_2352 = _T_2275 & _T_1815; // @[el2_lsu_bus_buffer.scala 436:73] wire _T_2353 = _T_2346 | _T_2352; // @[el2_lsu_bus_buffer.scala 435:114] wire _T_2354 = _T_2258 & _T_2353; // @[el2_lsu_bus_buffer.scala 433:113] @@ -1804,26 +1793,26 @@ module el2_lsu_bus_buffer( wire _T_2360 = _T_1812 & buf_state_en_3; // @[el2_lsu_bus_buffer.scala 433:94] wire _T_2370 = _T_2062 & _T_1815; // @[el2_lsu_bus_buffer.scala 435:71] wire _T_2372 = _T_2370 & _T_1780; // @[el2_lsu_bus_buffer.scala 435:92] - wire _T_2373 = _T_4375 | _T_2372; // @[el2_lsu_bus_buffer.scala 434:86] + wire _T_2373 = _T_4378 | _T_2372; // @[el2_lsu_bus_buffer.scala 434:86] wire _T_2377 = _T_2069 & _T_1818; // @[el2_lsu_bus_buffer.scala 436:52] wire _T_2379 = _T_2377 & _T_1782; // @[el2_lsu_bus_buffer.scala 436:73] wire _T_2380 = _T_2373 | _T_2379; // @[el2_lsu_bus_buffer.scala 435:114] wire _T_2381 = _T_2360 & _T_2380; // @[el2_lsu_bus_buffer.scala 433:113] wire _T_2383 = _T_2381 | buf_age_3[0]; // @[el2_lsu_bus_buffer.scala 436:97] wire _T_2397 = _T_2370 & _T_1791; // @[el2_lsu_bus_buffer.scala 435:92] - wire _T_2398 = _T_4380 | _T_2397; // @[el2_lsu_bus_buffer.scala 434:86] + wire _T_2398 = _T_4383 | _T_2397; // @[el2_lsu_bus_buffer.scala 434:86] wire _T_2404 = _T_2377 & _T_1793; // @[el2_lsu_bus_buffer.scala 436:73] wire _T_2405 = _T_2398 | _T_2404; // @[el2_lsu_bus_buffer.scala 435:114] wire _T_2406 = _T_2360 & _T_2405; // @[el2_lsu_bus_buffer.scala 433:113] wire _T_2408 = _T_2406 | buf_age_3[1]; // @[el2_lsu_bus_buffer.scala 436:97] wire _T_2422 = _T_2370 & _T_1802; // @[el2_lsu_bus_buffer.scala 435:92] - wire _T_2423 = _T_4385 | _T_2422; // @[el2_lsu_bus_buffer.scala 434:86] + wire _T_2423 = _T_4388 | _T_2422; // @[el2_lsu_bus_buffer.scala 434:86] wire _T_2429 = _T_2377 & _T_1804; // @[el2_lsu_bus_buffer.scala 436:73] wire _T_2430 = _T_2423 | _T_2429; // @[el2_lsu_bus_buffer.scala 435:114] wire _T_2431 = _T_2360 & _T_2430; // @[el2_lsu_bus_buffer.scala 433:113] wire _T_2433 = _T_2431 | buf_age_3[2]; // @[el2_lsu_bus_buffer.scala 436:97] wire _T_2447 = _T_2370 & _T_1813; // @[el2_lsu_bus_buffer.scala 435:92] - wire _T_2448 = _T_4390 | _T_2447; // @[el2_lsu_bus_buffer.scala 434:86] + wire _T_2448 = _T_4393 | _T_2447; // @[el2_lsu_bus_buffer.scala 434:86] wire _T_2454 = _T_2377 & _T_1815; // @[el2_lsu_bus_buffer.scala 436:73] wire _T_2455 = _T_2448 | _T_2454; // @[el2_lsu_bus_buffer.scala 435:114] wire _T_2456 = _T_2360 & _T_2455; // @[el2_lsu_bus_buffer.scala 433:113] @@ -2002,15 +1991,15 @@ module el2_lsu_bus_buffer( wire _T_3484 = _T_3482 & _T_1259; // @[el2_lsu_bus_buffer.scala 485:74] wire _T_3487 = _T_3477 & obuf_nosend; // @[el2_lsu_bus_buffer.scala 487:67] wire _T_3488 = _T_3487 & bus_rsp_read; // @[el2_lsu_bus_buffer.scala 487:81] - wire _T_4773 = io_lsu_axi_bresp != 2'h0; // @[el2_lsu_bus_buffer.scala 591:58] - wire bus_rsp_read_error = bus_rsp_read & _T_4773; // @[el2_lsu_bus_buffer.scala 591:38] + wire _T_4776 = io_lsu_axi_bresp != 2'h0; // @[el2_lsu_bus_buffer.scala 592:58] + wire bus_rsp_read_error = bus_rsp_read & _T_4776; // @[el2_lsu_bus_buffer.scala 592:38] wire _T_3491 = _T_3487 & bus_rsp_read_error; // @[el2_lsu_bus_buffer.scala 488:82] wire [31:0] _T_3496 = buf_addr_0[2] ? io_lsu_axi_rdata[63:32] : io_lsu_axi_rdata[31:0]; // @[el2_lsu_bus_buffer.scala 489:73] wire _T_3566 = bus_rsp_read_error & _T_3545; // @[el2_lsu_bus_buffer.scala 502:91] wire _T_3568 = bus_rsp_read_error & buf_ldfwd[0]; // @[el2_lsu_bus_buffer.scala 503:31] wire _T_3570 = _T_3568 & _T_3547; // @[el2_lsu_bus_buffer.scala 503:46] wire _T_3571 = _T_3566 | _T_3570; // @[el2_lsu_bus_buffer.scala 502:143] - wire bus_rsp_write_error = bus_rsp_write & _T_4773; // @[el2_lsu_bus_buffer.scala 590:40] + wire bus_rsp_write_error = bus_rsp_write & _T_4776; // @[el2_lsu_bus_buffer.scala 591:40] wire _T_3574 = bus_rsp_write_error & _T_3543; // @[el2_lsu_bus_buffer.scala 504:53] wire _T_3575 = _T_3571 | _T_3574; // @[el2_lsu_bus_buffer.scala 503:88] wire _T_3576 = _T_3477 & _T_3575; // @[el2_lsu_bus_buffer.scala 502:68] @@ -2030,9 +2019,9 @@ module el2_lsu_bus_buffer( wire [2:0] _GEN_21 = 2'h3 == buf_dualtag_0 ? buf_state_3 : _GEN_20; // @[el2_lsu_bus_buffer.scala 493:90] wire _T_3510 = _GEN_21 != 3'h4; // @[el2_lsu_bus_buffer.scala 493:90] wire _T_3511 = _T_3509 & _T_3510; // @[el2_lsu_bus_buffer.scala 493:61] - wire _T_4398 = _T_2655 | _T_2652; // @[el2_lsu_bus_buffer.scala 550:93] - wire _T_4399 = _T_4398 | _T_2649; // @[el2_lsu_bus_buffer.scala 550:93] - wire any_done_wait_state = _T_4399 | _T_2646; // @[el2_lsu_bus_buffer.scala 550:93] + wire _T_4401 = _T_2655 | _T_2652; // @[el2_lsu_bus_buffer.scala 551:93] + wire _T_4402 = _T_4401 | _T_2649; // @[el2_lsu_bus_buffer.scala 551:93] + wire any_done_wait_state = _T_4402 | _T_2646; // @[el2_lsu_bus_buffer.scala 551:93] wire _T_3513 = buf_ldfwd[0] | any_done_wait_state; // @[el2_lsu_bus_buffer.scala 494:31] wire _T_3519 = buf_dualtag_0 == 2'h0; // @[el2_lsu_bus_buffer.scala 113:118] wire _T_3521 = buf_dualtag_0 == 2'h1; // @[el2_lsu_bus_buffer.scala 113:118] @@ -2330,187 +2319,192 @@ module el2_lsu_bus_buffer( wire _T_4317 = buf_error_en_3 | buf_error[3]; // @[el2_lsu_bus_buffer.scala 544:86] wire _T_4318 = ~buf_rst_3; // @[el2_lsu_bus_buffer.scala 544:128] wire [2:0] _T_4325 = {buf_data_en_3,buf_data_en_2,buf_data_en_1}; // @[Cat.scala 29:58] - wire [1:0] _T_4331 = _T_26 + _T_19; // @[el2_lsu_bus_buffer.scala 546:96] - wire [1:0] _GEN_391 = {{1'd0}, _T_12}; // @[el2_lsu_bus_buffer.scala 546:96] - wire [2:0] _T_4332 = _T_4331 + _GEN_391; // @[el2_lsu_bus_buffer.scala 546:96] - wire [2:0] _GEN_392 = {{2'd0}, _T_5}; // @[el2_lsu_bus_buffer.scala 546:96] - wire [3:0] buf_numvld_any = _T_4332 + _GEN_392; // @[el2_lsu_bus_buffer.scala 546:96] - wire _T_4402 = io_ldst_dual_d & io_dec_lsu_valid_raw_d; // @[el2_lsu_bus_buffer.scala 552:52] - wire _T_4403 = buf_numvld_any >= 4'h3; // @[el2_lsu_bus_buffer.scala 552:92] - wire _T_4404 = buf_numvld_any == 4'h3; // @[el2_lsu_bus_buffer.scala 552:119] - wire _T_4406 = |buf_state_0; // @[el2_lsu_bus_buffer.scala 553:52] - wire _T_4407 = |buf_state_1; // @[el2_lsu_bus_buffer.scala 553:52] - wire _T_4408 = |buf_state_2; // @[el2_lsu_bus_buffer.scala 553:52] - wire _T_4409 = |buf_state_3; // @[el2_lsu_bus_buffer.scala 553:52] - wire _T_4410 = _T_4406 | _T_4407; // @[el2_lsu_bus_buffer.scala 553:65] - wire _T_4411 = _T_4410 | _T_4408; // @[el2_lsu_bus_buffer.scala 553:65] - wire _T_4412 = _T_4411 | _T_4409; // @[el2_lsu_bus_buffer.scala 553:65] - wire _T_4413 = ~_T_4412; // @[el2_lsu_bus_buffer.scala 553:34] - wire _T_4415 = _T_4413 & _T_765; // @[el2_lsu_bus_buffer.scala 553:70] - wire _T_4418 = io_lsu_busreq_m & io_lsu_pkt_m_valid; // @[el2_lsu_bus_buffer.scala 555:51] - wire _T_4419 = _T_4418 & io_lsu_pkt_m_load; // @[el2_lsu_bus_buffer.scala 555:72] - wire _T_4420 = ~io_flush_m_up; // @[el2_lsu_bus_buffer.scala 555:94] - wire _T_4421 = _T_4419 & _T_4420; // @[el2_lsu_bus_buffer.scala 555:92] - wire _T_4422 = ~io_ld_full_hit_m; // @[el2_lsu_bus_buffer.scala 555:111] - wire _T_4424 = ~io_lsu_commit_r; // @[el2_lsu_bus_buffer.scala 558:61] - reg lsu_nonblock_load_valid_r; // @[el2_lsu_bus_buffer.scala 644:66] - wire _T_4442 = _T_2708 & _T_1130; // @[Mux.scala 27:72] - wire _T_4443 = _T_2730 & _T_3745; // @[Mux.scala 27:72] - wire _T_4444 = _T_2752 & _T_3938; // @[Mux.scala 27:72] - wire _T_4445 = _T_2774 & _T_4131; // @[Mux.scala 27:72] - wire _T_4446 = _T_4442 | _T_4443; // @[Mux.scala 27:72] - wire _T_4447 = _T_4446 | _T_4444; // @[Mux.scala 27:72] - wire lsu_nonblock_load_data_ready = _T_4447 | _T_4445; // @[Mux.scala 27:72] - wire _T_4453 = buf_error[0] & _T_1130; // @[el2_lsu_bus_buffer.scala 561:108] - wire _T_4458 = buf_error[1] & _T_3745; // @[el2_lsu_bus_buffer.scala 561:108] - wire _T_4463 = buf_error[2] & _T_3938; // @[el2_lsu_bus_buffer.scala 561:108] - wire _T_4468 = buf_error[3] & _T_4131; // @[el2_lsu_bus_buffer.scala 561:108] - wire _T_4469 = _T_2708 & _T_4453; // @[Mux.scala 27:72] - wire _T_4470 = _T_2730 & _T_4458; // @[Mux.scala 27:72] - wire _T_4471 = _T_2752 & _T_4463; // @[Mux.scala 27:72] - wire _T_4472 = _T_2774 & _T_4468; // @[Mux.scala 27:72] - wire _T_4473 = _T_4469 | _T_4470; // @[Mux.scala 27:72] - wire _T_4474 = _T_4473 | _T_4471; // @[Mux.scala 27:72] - wire _T_4481 = ~buf_dual_0; // @[el2_lsu_bus_buffer.scala 562:109] - wire _T_4482 = ~buf_dualhi_0; // @[el2_lsu_bus_buffer.scala 562:124] - wire _T_4483 = _T_4481 | _T_4482; // @[el2_lsu_bus_buffer.scala 562:122] - wire _T_4484 = _T_4442 & _T_4483; // @[el2_lsu_bus_buffer.scala 562:106] - wire _T_4489 = ~buf_dual_1; // @[el2_lsu_bus_buffer.scala 562:109] - wire _T_4490 = ~buf_dualhi_1; // @[el2_lsu_bus_buffer.scala 562:124] - wire _T_4491 = _T_4489 | _T_4490; // @[el2_lsu_bus_buffer.scala 562:122] - wire _T_4492 = _T_4443 & _T_4491; // @[el2_lsu_bus_buffer.scala 562:106] - wire _T_4497 = ~buf_dual_2; // @[el2_lsu_bus_buffer.scala 562:109] - wire _T_4498 = ~buf_dualhi_2; // @[el2_lsu_bus_buffer.scala 562:124] - wire _T_4499 = _T_4497 | _T_4498; // @[el2_lsu_bus_buffer.scala 562:122] - wire _T_4500 = _T_4444 & _T_4499; // @[el2_lsu_bus_buffer.scala 562:106] - wire _T_4505 = ~buf_dual_3; // @[el2_lsu_bus_buffer.scala 562:109] - wire _T_4506 = ~buf_dualhi_3; // @[el2_lsu_bus_buffer.scala 562:124] - wire _T_4507 = _T_4505 | _T_4506; // @[el2_lsu_bus_buffer.scala 562:122] - wire _T_4508 = _T_4445 & _T_4507; // @[el2_lsu_bus_buffer.scala 562:106] - wire [1:0] _T_4511 = _T_4500 ? 2'h2 : 2'h0; // @[Mux.scala 27:72] - wire [1:0] _T_4512 = _T_4508 ? 2'h3 : 2'h0; // @[Mux.scala 27:72] - wire [1:0] _GEN_393 = {{1'd0}, _T_4492}; // @[Mux.scala 27:72] - wire [1:0] _T_4514 = _GEN_393 | _T_4511; // @[Mux.scala 27:72] - wire [31:0] _T_4549 = _T_4484 ? buf_data_0 : 32'h0; // @[Mux.scala 27:72] - wire [31:0] _T_4550 = _T_4492 ? buf_data_1 : 32'h0; // @[Mux.scala 27:72] - wire [31:0] _T_4551 = _T_4500 ? buf_data_2 : 32'h0; // @[Mux.scala 27:72] - wire [31:0] _T_4552 = _T_4508 ? buf_data_3 : 32'h0; // @[Mux.scala 27:72] - wire [31:0] _T_4553 = _T_4549 | _T_4550; // @[Mux.scala 27:72] - wire [31:0] _T_4554 = _T_4553 | _T_4551; // @[Mux.scala 27:72] - wire [31:0] lsu_nonblock_load_data_lo = _T_4554 | _T_4552; // @[Mux.scala 27:72] - wire _T_4560 = buf_dual_0 | buf_dualhi_0; // @[el2_lsu_bus_buffer.scala 564:120] - wire _T_4561 = _T_4442 & _T_4560; // @[el2_lsu_bus_buffer.scala 564:105] - wire _T_4566 = buf_dual_1 | buf_dualhi_1; // @[el2_lsu_bus_buffer.scala 564:120] - wire _T_4567 = _T_4443 & _T_4566; // @[el2_lsu_bus_buffer.scala 564:105] - wire _T_4572 = buf_dual_2 | buf_dualhi_2; // @[el2_lsu_bus_buffer.scala 564:120] - wire _T_4573 = _T_4444 & _T_4572; // @[el2_lsu_bus_buffer.scala 564:105] - wire _T_4578 = buf_dual_3 | buf_dualhi_3; // @[el2_lsu_bus_buffer.scala 564:120] - wire _T_4579 = _T_4445 & _T_4578; // @[el2_lsu_bus_buffer.scala 564:105] - wire [31:0] _T_4580 = _T_4561 ? buf_data_0 : 32'h0; // @[Mux.scala 27:72] - wire [31:0] _T_4581 = _T_4567 ? buf_data_1 : 32'h0; // @[Mux.scala 27:72] - wire [31:0] _T_4582 = _T_4573 ? buf_data_2 : 32'h0; // @[Mux.scala 27:72] - wire [31:0] _T_4583 = _T_4579 ? buf_data_3 : 32'h0; // @[Mux.scala 27:72] - wire [31:0] _T_4584 = _T_4580 | _T_4581; // @[Mux.scala 27:72] - wire [31:0] _T_4585 = _T_4584 | _T_4582; // @[Mux.scala 27:72] - wire [31:0] lsu_nonblock_load_data_hi = _T_4585 | _T_4583; // @[Mux.scala 27:72] - wire _T_4587 = io_lsu_nonblock_load_data_tag == 2'h0; // @[el2_lsu_bus_buffer.scala 114:123] - wire _T_4588 = io_lsu_nonblock_load_data_tag == 2'h1; // @[el2_lsu_bus_buffer.scala 114:123] - wire _T_4589 = io_lsu_nonblock_load_data_tag == 2'h2; // @[el2_lsu_bus_buffer.scala 114:123] - wire _T_4590 = io_lsu_nonblock_load_data_tag == 2'h3; // @[el2_lsu_bus_buffer.scala 114:123] - wire [31:0] _T_4591 = _T_4587 ? buf_addr_0 : 32'h0; // @[Mux.scala 27:72] - wire [31:0] _T_4592 = _T_4588 ? buf_addr_1 : 32'h0; // @[Mux.scala 27:72] - wire [31:0] _T_4593 = _T_4589 ? buf_addr_2 : 32'h0; // @[Mux.scala 27:72] - wire [31:0] _T_4594 = _T_4590 ? buf_addr_3 : 32'h0; // @[Mux.scala 27:72] - wire [31:0] _T_4595 = _T_4591 | _T_4592; // @[Mux.scala 27:72] - wire [31:0] _T_4596 = _T_4595 | _T_4593; // @[Mux.scala 27:72] - wire [31:0] _T_4597 = _T_4596 | _T_4594; // @[Mux.scala 27:72] - wire [1:0] lsu_nonblock_addr_offset = _T_4597[1:0]; // @[el2_lsu_bus_buffer.scala 565:83] - wire [1:0] _T_4603 = _T_4587 ? buf_sz_0 : 2'h0; // @[Mux.scala 27:72] - wire [1:0] _T_4604 = _T_4588 ? buf_sz_1 : 2'h0; // @[Mux.scala 27:72] - wire [1:0] _T_4605 = _T_4589 ? buf_sz_2 : 2'h0; // @[Mux.scala 27:72] - wire [1:0] _T_4606 = _T_4590 ? buf_sz_3 : 2'h0; // @[Mux.scala 27:72] - wire [1:0] _T_4607 = _T_4603 | _T_4604; // @[Mux.scala 27:72] - wire [1:0] _T_4608 = _T_4607 | _T_4605; // @[Mux.scala 27:72] - wire [1:0] lsu_nonblock_sz = _T_4608 | _T_4606; // @[Mux.scala 27:72] - wire _T_4618 = _T_4587 & buf_unsign[0]; // @[Mux.scala 27:72] - wire _T_4619 = _T_4588 & buf_unsign[1]; // @[Mux.scala 27:72] - wire _T_4620 = _T_4589 & buf_unsign[2]; // @[Mux.scala 27:72] - wire _T_4621 = _T_4590 & buf_unsign[3]; // @[Mux.scala 27:72] - wire _T_4622 = _T_4618 | _T_4619; // @[Mux.scala 27:72] - wire _T_4623 = _T_4622 | _T_4620; // @[Mux.scala 27:72] - wire lsu_nonblock_unsign = _T_4623 | _T_4621; // @[Mux.scala 27:72] - wire [63:0] _T_4643 = {lsu_nonblock_load_data_hi,lsu_nonblock_load_data_lo}; // @[Cat.scala 29:58] - wire [3:0] _GEN_394 = {{2'd0}, lsu_nonblock_addr_offset}; // @[el2_lsu_bus_buffer.scala 569:121] - wire [5:0] _T_4644 = _GEN_394 * 4'h8; // @[el2_lsu_bus_buffer.scala 569:121] - wire [63:0] lsu_nonblock_data_unalgn = _T_4643 >> _T_4644; // @[el2_lsu_bus_buffer.scala 569:92] - wire _T_4645 = ~io_lsu_nonblock_load_data_error; // @[el2_lsu_bus_buffer.scala 572:69] - wire _T_4647 = lsu_nonblock_sz == 2'h0; // @[el2_lsu_bus_buffer.scala 573:81] - wire _T_4648 = lsu_nonblock_unsign & _T_4647; // @[el2_lsu_bus_buffer.scala 573:63] - wire [31:0] _T_4650 = {24'h0,lsu_nonblock_data_unalgn[7:0]}; // @[Cat.scala 29:58] - wire _T_4651 = lsu_nonblock_sz == 2'h1; // @[el2_lsu_bus_buffer.scala 574:45] - wire _T_4652 = lsu_nonblock_unsign & _T_4651; // @[el2_lsu_bus_buffer.scala 574:26] - wire [31:0] _T_4654 = {16'h0,lsu_nonblock_data_unalgn[15:0]}; // @[Cat.scala 29:58] - wire _T_4655 = ~lsu_nonblock_unsign; // @[el2_lsu_bus_buffer.scala 575:6] - wire _T_4657 = _T_4655 & _T_4647; // @[el2_lsu_bus_buffer.scala 575:27] - wire [23:0] _T_4660 = lsu_nonblock_data_unalgn[7] ? 24'hffffff : 24'h0; // @[Bitwise.scala 72:12] - wire [31:0] _T_4662 = {_T_4660,lsu_nonblock_data_unalgn[7:0]}; // @[Cat.scala 29:58] - wire _T_4665 = _T_4655 & _T_4651; // @[el2_lsu_bus_buffer.scala 576:27] - wire [15:0] _T_4668 = lsu_nonblock_data_unalgn[15] ? 16'hffff : 16'h0; // @[Bitwise.scala 72:12] - wire [31:0] _T_4670 = {_T_4668,lsu_nonblock_data_unalgn[15:0]}; // @[Cat.scala 29:58] - wire _T_4671 = lsu_nonblock_sz == 2'h2; // @[el2_lsu_bus_buffer.scala 577:21] - wire [31:0] _T_4672 = _T_4648 ? _T_4650 : 32'h0; // @[Mux.scala 27:72] - wire [31:0] _T_4673 = _T_4652 ? _T_4654 : 32'h0; // @[Mux.scala 27:72] - wire [31:0] _T_4674 = _T_4657 ? _T_4662 : 32'h0; // @[Mux.scala 27:72] - wire [31:0] _T_4675 = _T_4665 ? _T_4670 : 32'h0; // @[Mux.scala 27:72] - wire [63:0] _T_4676 = _T_4671 ? lsu_nonblock_data_unalgn : 64'h0; // @[Mux.scala 27:72] - wire [31:0] _T_4677 = _T_4672 | _T_4673; // @[Mux.scala 27:72] - wire [31:0] _T_4678 = _T_4677 | _T_4674; // @[Mux.scala 27:72] - wire [31:0] _T_4679 = _T_4678 | _T_4675; // @[Mux.scala 27:72] - wire [63:0] _GEN_395 = {{32'd0}, _T_4679}; // @[Mux.scala 27:72] - wire [63:0] _T_4680 = _GEN_395 | _T_4676; // @[Mux.scala 27:72] - wire _T_4775 = obuf_valid & obuf_write; // @[el2_lsu_bus_buffer.scala 595:36] - wire _T_4776 = ~obuf_cmd_done; // @[el2_lsu_bus_buffer.scala 595:51] - wire _T_4777 = _T_4775 & _T_4776; // @[el2_lsu_bus_buffer.scala 595:49] - wire [31:0] _T_4781 = {obuf_addr[31:3],3'h0}; // @[Cat.scala 29:58] - wire [2:0] _T_4783 = {1'h0,obuf_sz}; // @[Cat.scala 29:58] - wire _T_4788 = ~obuf_data_done; // @[el2_lsu_bus_buffer.scala 607:50] - wire _T_4789 = _T_4775 & _T_4788; // @[el2_lsu_bus_buffer.scala 607:48] - wire [7:0] _T_4793 = obuf_write ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] - wire _T_4796 = obuf_valid & _T_1269; // @[el2_lsu_bus_buffer.scala 612:36] - wire _T_4798 = _T_4796 & _T_1275; // @[el2_lsu_bus_buffer.scala 612:50] - wire _T_4810 = io_lsu_bus_clk_en_q & buf_error[0]; // @[el2_lsu_bus_buffer.scala 625:114] - wire _T_4812 = _T_4810 & buf_write[0]; // @[el2_lsu_bus_buffer.scala 625:129] - wire _T_4815 = io_lsu_bus_clk_en_q & buf_error[1]; // @[el2_lsu_bus_buffer.scala 625:114] - wire _T_4817 = _T_4815 & buf_write[1]; // @[el2_lsu_bus_buffer.scala 625:129] - wire _T_4820 = io_lsu_bus_clk_en_q & buf_error[2]; // @[el2_lsu_bus_buffer.scala 625:114] - wire _T_4822 = _T_4820 & buf_write[2]; // @[el2_lsu_bus_buffer.scala 625:129] - wire _T_4825 = io_lsu_bus_clk_en_q & buf_error[3]; // @[el2_lsu_bus_buffer.scala 625:114] - wire _T_4827 = _T_4825 & buf_write[3]; // @[el2_lsu_bus_buffer.scala 625:129] - wire _T_4828 = _T_2708 & _T_4812; // @[Mux.scala 27:72] - wire _T_4829 = _T_2730 & _T_4817; // @[Mux.scala 27:72] - wire _T_4830 = _T_2752 & _T_4822; // @[Mux.scala 27:72] - wire _T_4831 = _T_2774 & _T_4827; // @[Mux.scala 27:72] - wire _T_4832 = _T_4828 | _T_4829; // @[Mux.scala 27:72] - wire _T_4833 = _T_4832 | _T_4830; // @[Mux.scala 27:72] - wire _T_4843 = _T_2730 & buf_error[1]; // @[el2_lsu_bus_buffer.scala 626:98] - wire lsu_imprecise_error_store_tag = _T_4843 & buf_write[1]; // @[el2_lsu_bus_buffer.scala 626:113] - wire _T_4849 = ~io_lsu_imprecise_error_store_any; // @[el2_lsu_bus_buffer.scala 628:72] - wire _T_4851 = ~lsu_imprecise_error_store_tag; // @[el2_lsu_bus_buffer.scala 114:123] - wire [31:0] _T_4853 = _T_4851 ? buf_addr_0 : 32'h0; // @[Mux.scala 27:72] - wire [31:0] _T_4854 = lsu_imprecise_error_store_tag ? buf_addr_1 : 32'h0; // @[Mux.scala 27:72] - wire [31:0] _T_4855 = _T_4853 | _T_4854; // @[Mux.scala 27:72] - wire _T_4872 = bus_wcmd_sent | bus_wdata_sent; // @[el2_lsu_bus_buffer.scala 635:68] - wire _T_4875 = io_lsu_busreq_r & io_ldst_dual_r; // @[el2_lsu_bus_buffer.scala 636:48] - wire _T_4878 = ~io_lsu_axi_awready; // @[el2_lsu_bus_buffer.scala 639:48] - wire _T_4879 = io_lsu_axi_awvalid & _T_4878; // @[el2_lsu_bus_buffer.scala 639:46] - wire _T_4880 = ~io_lsu_axi_wready; // @[el2_lsu_bus_buffer.scala 639:92] - wire _T_4881 = io_lsu_axi_wvalid & _T_4880; // @[el2_lsu_bus_buffer.scala 639:90] - wire _T_4882 = _T_4879 | _T_4881; // @[el2_lsu_bus_buffer.scala 639:69] - wire _T_4883 = ~io_lsu_axi_arready; // @[el2_lsu_bus_buffer.scala 639:136] - wire _T_4884 = io_lsu_axi_arvalid & _T_4883; // @[el2_lsu_bus_buffer.scala 639:134] - wire _T_4888 = ~io_flush_r; // @[el2_lsu_bus_buffer.scala 643:75] - wire _T_4889 = io_lsu_busreq_m & _T_4888; // @[el2_lsu_bus_buffer.scala 643:73] - reg _T_4892; // @[el2_lsu_bus_buffer.scala 643:56] + wire [3:0] buf_data_in_3 = _GEN_307[3:0]; // @[el2_lsu_bus_buffer.scala 151:25 el2_lsu_bus_buffer.scala 152:15 el2_lsu_bus_buffer.scala 473:24 el2_lsu_bus_buffer.scala 489:24 el2_lsu_bus_buffer.scala 505:24] + wire [3:0] buf_data_in_2 = _GEN_231[3:0]; // @[el2_lsu_bus_buffer.scala 151:25 el2_lsu_bus_buffer.scala 152:15 el2_lsu_bus_buffer.scala 473:24 el2_lsu_bus_buffer.scala 489:24 el2_lsu_bus_buffer.scala 505:24] + wire [3:0] buf_data_in_1 = _GEN_155[3:0]; // @[el2_lsu_bus_buffer.scala 151:25 el2_lsu_bus_buffer.scala 152:15 el2_lsu_bus_buffer.scala 473:24 el2_lsu_bus_buffer.scala 489:24 el2_lsu_bus_buffer.scala 505:24] + wire [11:0] _T_4328 = {buf_data_in_3,buf_data_in_2,buf_data_in_1}; // @[Cat.scala 29:58] + wire [3:0] buf_data_in_0 = _GEN_79[3:0]; // @[el2_lsu_bus_buffer.scala 151:25 el2_lsu_bus_buffer.scala 152:15 el2_lsu_bus_buffer.scala 473:24 el2_lsu_bus_buffer.scala 489:24 el2_lsu_bus_buffer.scala 505:24] + wire [1:0] _T_4334 = _T_26 + _T_19; // @[el2_lsu_bus_buffer.scala 547:96] + wire [1:0] _GEN_391 = {{1'd0}, _T_12}; // @[el2_lsu_bus_buffer.scala 547:96] + wire [2:0] _T_4335 = _T_4334 + _GEN_391; // @[el2_lsu_bus_buffer.scala 547:96] + wire [2:0] _GEN_392 = {{2'd0}, _T_5}; // @[el2_lsu_bus_buffer.scala 547:96] + wire [3:0] buf_numvld_any = _T_4335 + _GEN_392; // @[el2_lsu_bus_buffer.scala 547:96] + wire _T_4405 = io_ldst_dual_d & io_dec_lsu_valid_raw_d; // @[el2_lsu_bus_buffer.scala 553:52] + wire _T_4406 = buf_numvld_any >= 4'h3; // @[el2_lsu_bus_buffer.scala 553:92] + wire _T_4407 = buf_numvld_any == 4'h3; // @[el2_lsu_bus_buffer.scala 553:119] + wire _T_4409 = |buf_state_0; // @[el2_lsu_bus_buffer.scala 554:52] + wire _T_4410 = |buf_state_1; // @[el2_lsu_bus_buffer.scala 554:52] + wire _T_4411 = |buf_state_2; // @[el2_lsu_bus_buffer.scala 554:52] + wire _T_4412 = |buf_state_3; // @[el2_lsu_bus_buffer.scala 554:52] + wire _T_4413 = _T_4409 | _T_4410; // @[el2_lsu_bus_buffer.scala 554:65] + wire _T_4414 = _T_4413 | _T_4411; // @[el2_lsu_bus_buffer.scala 554:65] + wire _T_4415 = _T_4414 | _T_4412; // @[el2_lsu_bus_buffer.scala 554:65] + wire _T_4416 = ~_T_4415; // @[el2_lsu_bus_buffer.scala 554:34] + wire _T_4418 = _T_4416 & _T_765; // @[el2_lsu_bus_buffer.scala 554:70] + wire _T_4421 = io_lsu_busreq_m & io_lsu_pkt_m_valid; // @[el2_lsu_bus_buffer.scala 556:51] + wire _T_4422 = _T_4421 & io_lsu_pkt_m_load; // @[el2_lsu_bus_buffer.scala 556:72] + wire _T_4423 = ~io_flush_m_up; // @[el2_lsu_bus_buffer.scala 556:94] + wire _T_4424 = _T_4422 & _T_4423; // @[el2_lsu_bus_buffer.scala 556:92] + wire _T_4425 = ~io_ld_full_hit_m; // @[el2_lsu_bus_buffer.scala 556:111] + wire _T_4427 = ~io_lsu_commit_r; // @[el2_lsu_bus_buffer.scala 559:61] + reg lsu_nonblock_load_valid_r; // @[el2_lsu_bus_buffer.scala 645:66] + wire _T_4445 = _T_2708 & _T_1130; // @[Mux.scala 27:72] + wire _T_4446 = _T_2730 & _T_3745; // @[Mux.scala 27:72] + wire _T_4447 = _T_2752 & _T_3938; // @[Mux.scala 27:72] + wire _T_4448 = _T_2774 & _T_4131; // @[Mux.scala 27:72] + wire _T_4449 = _T_4445 | _T_4446; // @[Mux.scala 27:72] + wire _T_4450 = _T_4449 | _T_4447; // @[Mux.scala 27:72] + wire lsu_nonblock_load_data_ready = _T_4450 | _T_4448; // @[Mux.scala 27:72] + wire _T_4456 = buf_error[0] & _T_1130; // @[el2_lsu_bus_buffer.scala 562:108] + wire _T_4461 = buf_error[1] & _T_3745; // @[el2_lsu_bus_buffer.scala 562:108] + wire _T_4466 = buf_error[2] & _T_3938; // @[el2_lsu_bus_buffer.scala 562:108] + wire _T_4471 = buf_error[3] & _T_4131; // @[el2_lsu_bus_buffer.scala 562:108] + wire _T_4472 = _T_2708 & _T_4456; // @[Mux.scala 27:72] + wire _T_4473 = _T_2730 & _T_4461; // @[Mux.scala 27:72] + wire _T_4474 = _T_2752 & _T_4466; // @[Mux.scala 27:72] + wire _T_4475 = _T_2774 & _T_4471; // @[Mux.scala 27:72] + wire _T_4476 = _T_4472 | _T_4473; // @[Mux.scala 27:72] + wire _T_4477 = _T_4476 | _T_4474; // @[Mux.scala 27:72] + wire _T_4484 = ~buf_dual_0; // @[el2_lsu_bus_buffer.scala 563:109] + wire _T_4485 = ~buf_dualhi_0; // @[el2_lsu_bus_buffer.scala 563:124] + wire _T_4486 = _T_4484 | _T_4485; // @[el2_lsu_bus_buffer.scala 563:122] + wire _T_4487 = _T_4445 & _T_4486; // @[el2_lsu_bus_buffer.scala 563:106] + wire _T_4492 = ~buf_dual_1; // @[el2_lsu_bus_buffer.scala 563:109] + wire _T_4493 = ~buf_dualhi_1; // @[el2_lsu_bus_buffer.scala 563:124] + wire _T_4494 = _T_4492 | _T_4493; // @[el2_lsu_bus_buffer.scala 563:122] + wire _T_4495 = _T_4446 & _T_4494; // @[el2_lsu_bus_buffer.scala 563:106] + wire _T_4500 = ~buf_dual_2; // @[el2_lsu_bus_buffer.scala 563:109] + wire _T_4501 = ~buf_dualhi_2; // @[el2_lsu_bus_buffer.scala 563:124] + wire _T_4502 = _T_4500 | _T_4501; // @[el2_lsu_bus_buffer.scala 563:122] + wire _T_4503 = _T_4447 & _T_4502; // @[el2_lsu_bus_buffer.scala 563:106] + wire _T_4508 = ~buf_dual_3; // @[el2_lsu_bus_buffer.scala 563:109] + wire _T_4509 = ~buf_dualhi_3; // @[el2_lsu_bus_buffer.scala 563:124] + wire _T_4510 = _T_4508 | _T_4509; // @[el2_lsu_bus_buffer.scala 563:122] + wire _T_4511 = _T_4448 & _T_4510; // @[el2_lsu_bus_buffer.scala 563:106] + wire [1:0] _T_4514 = _T_4503 ? 2'h2 : 2'h0; // @[Mux.scala 27:72] + wire [1:0] _T_4515 = _T_4511 ? 2'h3 : 2'h0; // @[Mux.scala 27:72] + wire [1:0] _GEN_393 = {{1'd0}, _T_4495}; // @[Mux.scala 27:72] + wire [1:0] _T_4517 = _GEN_393 | _T_4514; // @[Mux.scala 27:72] + wire [31:0] _T_4552 = _T_4487 ? buf_data_0 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4553 = _T_4495 ? buf_data_1 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4554 = _T_4503 ? buf_data_2 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4555 = _T_4511 ? buf_data_3 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4556 = _T_4552 | _T_4553; // @[Mux.scala 27:72] + wire [31:0] _T_4557 = _T_4556 | _T_4554; // @[Mux.scala 27:72] + wire [31:0] lsu_nonblock_load_data_lo = _T_4557 | _T_4555; // @[Mux.scala 27:72] + wire _T_4563 = buf_dual_0 | buf_dualhi_0; // @[el2_lsu_bus_buffer.scala 565:120] + wire _T_4564 = _T_4445 & _T_4563; // @[el2_lsu_bus_buffer.scala 565:105] + wire _T_4569 = buf_dual_1 | buf_dualhi_1; // @[el2_lsu_bus_buffer.scala 565:120] + wire _T_4570 = _T_4446 & _T_4569; // @[el2_lsu_bus_buffer.scala 565:105] + wire _T_4575 = buf_dual_2 | buf_dualhi_2; // @[el2_lsu_bus_buffer.scala 565:120] + wire _T_4576 = _T_4447 & _T_4575; // @[el2_lsu_bus_buffer.scala 565:105] + wire _T_4581 = buf_dual_3 | buf_dualhi_3; // @[el2_lsu_bus_buffer.scala 565:120] + wire _T_4582 = _T_4448 & _T_4581; // @[el2_lsu_bus_buffer.scala 565:105] + wire [31:0] _T_4583 = _T_4564 ? buf_data_0 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4584 = _T_4570 ? buf_data_1 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4585 = _T_4576 ? buf_data_2 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4586 = _T_4582 ? buf_data_3 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4587 = _T_4583 | _T_4584; // @[Mux.scala 27:72] + wire [31:0] _T_4588 = _T_4587 | _T_4585; // @[Mux.scala 27:72] + wire [31:0] lsu_nonblock_load_data_hi = _T_4588 | _T_4586; // @[Mux.scala 27:72] + wire _T_4590 = io_lsu_nonblock_load_data_tag == 2'h0; // @[el2_lsu_bus_buffer.scala 114:123] + wire _T_4591 = io_lsu_nonblock_load_data_tag == 2'h1; // @[el2_lsu_bus_buffer.scala 114:123] + wire _T_4592 = io_lsu_nonblock_load_data_tag == 2'h2; // @[el2_lsu_bus_buffer.scala 114:123] + wire _T_4593 = io_lsu_nonblock_load_data_tag == 2'h3; // @[el2_lsu_bus_buffer.scala 114:123] + wire [31:0] _T_4594 = _T_4590 ? buf_addr_0 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4595 = _T_4591 ? buf_addr_1 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4596 = _T_4592 ? buf_addr_2 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4597 = _T_4593 ? buf_addr_3 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4598 = _T_4594 | _T_4595; // @[Mux.scala 27:72] + wire [31:0] _T_4599 = _T_4598 | _T_4596; // @[Mux.scala 27:72] + wire [31:0] _T_4600 = _T_4599 | _T_4597; // @[Mux.scala 27:72] + wire [1:0] lsu_nonblock_addr_offset = _T_4600[1:0]; // @[el2_lsu_bus_buffer.scala 566:83] + wire [1:0] _T_4606 = _T_4590 ? buf_sz_0 : 2'h0; // @[Mux.scala 27:72] + wire [1:0] _T_4607 = _T_4591 ? buf_sz_1 : 2'h0; // @[Mux.scala 27:72] + wire [1:0] _T_4608 = _T_4592 ? buf_sz_2 : 2'h0; // @[Mux.scala 27:72] + wire [1:0] _T_4609 = _T_4593 ? buf_sz_3 : 2'h0; // @[Mux.scala 27:72] + wire [1:0] _T_4610 = _T_4606 | _T_4607; // @[Mux.scala 27:72] + wire [1:0] _T_4611 = _T_4610 | _T_4608; // @[Mux.scala 27:72] + wire [1:0] lsu_nonblock_sz = _T_4611 | _T_4609; // @[Mux.scala 27:72] + wire _T_4621 = _T_4590 & buf_unsign[0]; // @[Mux.scala 27:72] + wire _T_4622 = _T_4591 & buf_unsign[1]; // @[Mux.scala 27:72] + wire _T_4623 = _T_4592 & buf_unsign[2]; // @[Mux.scala 27:72] + wire _T_4624 = _T_4593 & buf_unsign[3]; // @[Mux.scala 27:72] + wire _T_4625 = _T_4621 | _T_4622; // @[Mux.scala 27:72] + wire _T_4626 = _T_4625 | _T_4623; // @[Mux.scala 27:72] + wire lsu_nonblock_unsign = _T_4626 | _T_4624; // @[Mux.scala 27:72] + wire [63:0] _T_4646 = {lsu_nonblock_load_data_hi,lsu_nonblock_load_data_lo}; // @[Cat.scala 29:58] + wire [3:0] _GEN_394 = {{2'd0}, lsu_nonblock_addr_offset}; // @[el2_lsu_bus_buffer.scala 570:121] + wire [5:0] _T_4647 = _GEN_394 * 4'h8; // @[el2_lsu_bus_buffer.scala 570:121] + wire [63:0] lsu_nonblock_data_unalgn = _T_4646 >> _T_4647; // @[el2_lsu_bus_buffer.scala 570:92] + wire _T_4648 = ~io_lsu_nonblock_load_data_error; // @[el2_lsu_bus_buffer.scala 573:69] + wire _T_4650 = lsu_nonblock_sz == 2'h0; // @[el2_lsu_bus_buffer.scala 574:81] + wire _T_4651 = lsu_nonblock_unsign & _T_4650; // @[el2_lsu_bus_buffer.scala 574:63] + wire [31:0] _T_4653 = {24'h0,lsu_nonblock_data_unalgn[7:0]}; // @[Cat.scala 29:58] + wire _T_4654 = lsu_nonblock_sz == 2'h1; // @[el2_lsu_bus_buffer.scala 575:45] + wire _T_4655 = lsu_nonblock_unsign & _T_4654; // @[el2_lsu_bus_buffer.scala 575:26] + wire [31:0] _T_4657 = {16'h0,lsu_nonblock_data_unalgn[15:0]}; // @[Cat.scala 29:58] + wire _T_4658 = ~lsu_nonblock_unsign; // @[el2_lsu_bus_buffer.scala 576:6] + wire _T_4660 = _T_4658 & _T_4650; // @[el2_lsu_bus_buffer.scala 576:27] + wire [23:0] _T_4663 = lsu_nonblock_data_unalgn[7] ? 24'hffffff : 24'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_4665 = {_T_4663,lsu_nonblock_data_unalgn[7:0]}; // @[Cat.scala 29:58] + wire _T_4668 = _T_4658 & _T_4654; // @[el2_lsu_bus_buffer.scala 577:27] + wire [15:0] _T_4671 = lsu_nonblock_data_unalgn[15] ? 16'hffff : 16'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_4673 = {_T_4671,lsu_nonblock_data_unalgn[15:0]}; // @[Cat.scala 29:58] + wire _T_4674 = lsu_nonblock_sz == 2'h2; // @[el2_lsu_bus_buffer.scala 578:21] + wire [31:0] _T_4675 = _T_4651 ? _T_4653 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4676 = _T_4655 ? _T_4657 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4677 = _T_4660 ? _T_4665 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4678 = _T_4668 ? _T_4673 : 32'h0; // @[Mux.scala 27:72] + wire [63:0] _T_4679 = _T_4674 ? lsu_nonblock_data_unalgn : 64'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4680 = _T_4675 | _T_4676; // @[Mux.scala 27:72] + wire [31:0] _T_4681 = _T_4680 | _T_4677; // @[Mux.scala 27:72] + wire [31:0] _T_4682 = _T_4681 | _T_4678; // @[Mux.scala 27:72] + wire [63:0] _GEN_395 = {{32'd0}, _T_4682}; // @[Mux.scala 27:72] + wire [63:0] _T_4683 = _GEN_395 | _T_4679; // @[Mux.scala 27:72] + wire _T_4778 = obuf_valid & obuf_write; // @[el2_lsu_bus_buffer.scala 596:36] + wire _T_4779 = ~obuf_cmd_done; // @[el2_lsu_bus_buffer.scala 596:51] + wire _T_4780 = _T_4778 & _T_4779; // @[el2_lsu_bus_buffer.scala 596:49] + wire [31:0] _T_4784 = {obuf_addr[31:3],3'h0}; // @[Cat.scala 29:58] + wire [2:0] _T_4786 = {1'h0,obuf_sz}; // @[Cat.scala 29:58] + wire _T_4791 = ~obuf_data_done; // @[el2_lsu_bus_buffer.scala 608:50] + wire _T_4792 = _T_4778 & _T_4791; // @[el2_lsu_bus_buffer.scala 608:48] + wire [7:0] _T_4796 = obuf_write ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire _T_4799 = obuf_valid & _T_1269; // @[el2_lsu_bus_buffer.scala 613:36] + wire _T_4801 = _T_4799 & _T_1275; // @[el2_lsu_bus_buffer.scala 613:50] + wire _T_4813 = io_lsu_bus_clk_en_q & buf_error[0]; // @[el2_lsu_bus_buffer.scala 626:114] + wire _T_4815 = _T_4813 & buf_write[0]; // @[el2_lsu_bus_buffer.scala 626:129] + wire _T_4818 = io_lsu_bus_clk_en_q & buf_error[1]; // @[el2_lsu_bus_buffer.scala 626:114] + wire _T_4820 = _T_4818 & buf_write[1]; // @[el2_lsu_bus_buffer.scala 626:129] + wire _T_4823 = io_lsu_bus_clk_en_q & buf_error[2]; // @[el2_lsu_bus_buffer.scala 626:114] + wire _T_4825 = _T_4823 & buf_write[2]; // @[el2_lsu_bus_buffer.scala 626:129] + wire _T_4828 = io_lsu_bus_clk_en_q & buf_error[3]; // @[el2_lsu_bus_buffer.scala 626:114] + wire _T_4830 = _T_4828 & buf_write[3]; // @[el2_lsu_bus_buffer.scala 626:129] + wire _T_4831 = _T_2708 & _T_4815; // @[Mux.scala 27:72] + wire _T_4832 = _T_2730 & _T_4820; // @[Mux.scala 27:72] + wire _T_4833 = _T_2752 & _T_4825; // @[Mux.scala 27:72] + wire _T_4834 = _T_2774 & _T_4830; // @[Mux.scala 27:72] + wire _T_4835 = _T_4831 | _T_4832; // @[Mux.scala 27:72] + wire _T_4836 = _T_4835 | _T_4833; // @[Mux.scala 27:72] + wire _T_4846 = _T_2730 & buf_error[1]; // @[el2_lsu_bus_buffer.scala 627:98] + wire lsu_imprecise_error_store_tag = _T_4846 & buf_write[1]; // @[el2_lsu_bus_buffer.scala 627:113] + wire _T_4852 = ~io_lsu_imprecise_error_store_any; // @[el2_lsu_bus_buffer.scala 629:72] + wire _T_4854 = ~lsu_imprecise_error_store_tag; // @[el2_lsu_bus_buffer.scala 114:123] + wire [31:0] _T_4856 = _T_4854 ? buf_addr_0 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4857 = lsu_imprecise_error_store_tag ? buf_addr_1 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4858 = _T_4856 | _T_4857; // @[Mux.scala 27:72] + wire _T_4875 = bus_wcmd_sent | bus_wdata_sent; // @[el2_lsu_bus_buffer.scala 636:68] + wire _T_4878 = io_lsu_busreq_r & io_ldst_dual_r; // @[el2_lsu_bus_buffer.scala 637:48] + wire _T_4881 = ~io_lsu_axi_awready; // @[el2_lsu_bus_buffer.scala 640:48] + wire _T_4882 = io_lsu_axi_awvalid & _T_4881; // @[el2_lsu_bus_buffer.scala 640:46] + wire _T_4883 = ~io_lsu_axi_wready; // @[el2_lsu_bus_buffer.scala 640:92] + wire _T_4884 = io_lsu_axi_wvalid & _T_4883; // @[el2_lsu_bus_buffer.scala 640:90] + wire _T_4885 = _T_4882 | _T_4884; // @[el2_lsu_bus_buffer.scala 640:69] + wire _T_4886 = ~io_lsu_axi_arready; // @[el2_lsu_bus_buffer.scala 640:136] + wire _T_4887 = io_lsu_axi_arvalid & _T_4886; // @[el2_lsu_bus_buffer.scala 640:134] + wire _T_4891 = ~io_flush_r; // @[el2_lsu_bus_buffer.scala 644:75] + wire _T_4892 = io_lsu_busreq_m & _T_4891; // @[el2_lsu_bus_buffer.scala 644:73] + reg _T_4895; // @[el2_lsu_bus_buffer.scala 644:56] rvclkhdr rvclkhdr ( // @[el2_lib.scala 485:23] .io_l1clk(rvclkhdr_io_l1clk), .io_clk(rvclkhdr_io_clk), @@ -2583,61 +2577,61 @@ module el2_lsu_bus_buffer( .io_en(rvclkhdr_11_io_en), .io_scan_mode(rvclkhdr_11_io_scan_mode) ); - assign io_lsu_busreq_r = _T_4892; // @[el2_lsu_bus_buffer.scala 643:19] - assign io_lsu_bus_buffer_pend_any = |buf_numvld_pend_any; // @[el2_lsu_bus_buffer.scala 551:30] - assign io_lsu_bus_buffer_full_any = _T_4402 ? _T_4403 : _T_4404; // @[el2_lsu_bus_buffer.scala 552:30] - assign io_lsu_bus_buffer_empty_any = _T_4415 & _T_1157; // @[el2_lsu_bus_buffer.scala 553:31] - assign io_lsu_bus_idle_any = 1'h1; // @[el2_lsu_bus_buffer.scala 632:23] + assign io_lsu_busreq_r = _T_4895; // @[el2_lsu_bus_buffer.scala 644:19] + assign io_lsu_bus_buffer_pend_any = |buf_numvld_pend_any; // @[el2_lsu_bus_buffer.scala 552:30] + assign io_lsu_bus_buffer_full_any = _T_4405 ? _T_4406 : _T_4407; // @[el2_lsu_bus_buffer.scala 553:30] + assign io_lsu_bus_buffer_empty_any = _T_4418 & _T_1157; // @[el2_lsu_bus_buffer.scala 554:31] + assign io_lsu_bus_idle_any = 1'h1; // @[el2_lsu_bus_buffer.scala 633:23] assign io_ld_byte_hit_buf_lo = {_T_69,_T_58}; // @[el2_lsu_bus_buffer.scala 191:25] assign io_ld_byte_hit_buf_hi = {_T_84,_T_73}; // @[el2_lsu_bus_buffer.scala 192:25] assign io_ld_fwddata_buf_lo = _T_646[31:0]; // @[el2_lsu_bus_buffer.scala 217:24] assign io_ld_fwddata_buf_hi = _T_741[31:0]; // @[el2_lsu_bus_buffer.scala 222:24] - assign io_lsu_imprecise_error_load_any = io_lsu_nonblock_load_data_error & _T_4849; // @[el2_lsu_bus_buffer.scala 628:35] - assign io_lsu_imprecise_error_store_any = _T_4833 | _T_4831; // @[el2_lsu_bus_buffer.scala 625:36] - assign io_lsu_imprecise_error_addr_any = io_lsu_imprecise_error_store_any ? _T_4855 : _T_4597; // @[el2_lsu_bus_buffer.scala 629:35] - assign io_lsu_nonblock_load_valid_m = _T_4421 & _T_4422; // @[el2_lsu_bus_buffer.scala 555:32] - assign io_lsu_nonblock_load_tag_m = _T_1789 ? 2'h0 : _T_1825; // @[el2_lsu_bus_buffer.scala 556:30] - assign io_lsu_nonblock_load_inv_r = lsu_nonblock_load_valid_r & _T_4424; // @[el2_lsu_bus_buffer.scala 558:30] - assign io_lsu_nonblock_load_inv_tag_r = WrPtr0_r; // @[el2_lsu_bus_buffer.scala 559:34] - assign io_lsu_nonblock_load_data_valid = lsu_nonblock_load_data_ready & _T_4645; // @[el2_lsu_bus_buffer.scala 572:35] - assign io_lsu_nonblock_load_data_error = _T_4474 | _T_4472; // @[el2_lsu_bus_buffer.scala 561:35] - assign io_lsu_nonblock_load_data_tag = _T_4514 | _T_4512; // @[el2_lsu_bus_buffer.scala 562:33] - assign io_lsu_nonblock_load_data = _T_4680[31:0]; // @[el2_lsu_bus_buffer.scala 573:29] - assign io_lsu_pmu_bus_trxn = _T_4872 | _T_4767; // @[el2_lsu_bus_buffer.scala 635:23] - assign io_lsu_pmu_bus_misaligned = _T_4875 & io_lsu_commit_r; // @[el2_lsu_bus_buffer.scala 636:29] - assign io_lsu_pmu_bus_error = io_lsu_imprecise_error_load_any | io_lsu_imprecise_error_store_any; // @[el2_lsu_bus_buffer.scala 637:24] - assign io_lsu_pmu_bus_busy = _T_4882 | _T_4884; // @[el2_lsu_bus_buffer.scala 639:23] - assign io_lsu_axi_awvalid = _T_4777 & _T_1165; // @[el2_lsu_bus_buffer.scala 595:22] - assign io_lsu_axi_awid = {{1'd0}, _T_1774}; // @[el2_lsu_bus_buffer.scala 596:19] - assign io_lsu_axi_awaddr = obuf_sideeffect ? obuf_addr : _T_4781; // @[el2_lsu_bus_buffer.scala 597:21] - assign io_lsu_axi_awregion = obuf_addr[31:28]; // @[el2_lsu_bus_buffer.scala 601:23] - assign io_lsu_axi_awlen = 8'h0; // @[el2_lsu_bus_buffer.scala 602:20] - assign io_lsu_axi_awsize = obuf_sideeffect ? _T_4783 : 3'h3; // @[el2_lsu_bus_buffer.scala 598:21] - assign io_lsu_axi_awburst = 2'h1; // @[el2_lsu_bus_buffer.scala 603:22] - assign io_lsu_axi_awlock = 1'h0; // @[el2_lsu_bus_buffer.scala 605:21] - assign io_lsu_axi_awcache = obuf_sideeffect ? 4'h0 : 4'hf; // @[el2_lsu_bus_buffer.scala 600:22] - assign io_lsu_axi_awprot = 3'h0; // @[el2_lsu_bus_buffer.scala 599:21] - assign io_lsu_axi_awqos = 4'h0; // @[el2_lsu_bus_buffer.scala 604:20] - assign io_lsu_axi_wvalid = _T_4789 & _T_1165; // @[el2_lsu_bus_buffer.scala 607:21] - assign io_lsu_axi_wdata = obuf_data; // @[el2_lsu_bus_buffer.scala 609:20] - assign io_lsu_axi_wstrb = obuf_byteen & _T_4793; // @[el2_lsu_bus_buffer.scala 608:20] - assign io_lsu_axi_wlast = 1'h1; // @[el2_lsu_bus_buffer.scala 610:20] - assign io_lsu_axi_bready = 1'h1; // @[el2_lsu_bus_buffer.scala 623:21] - assign io_lsu_axi_arvalid = _T_4798 & _T_1165; // @[el2_lsu_bus_buffer.scala 612:22] - assign io_lsu_axi_arid = {{1'd0}, _T_1774}; // @[el2_lsu_bus_buffer.scala 613:19] - assign io_lsu_axi_araddr = obuf_sideeffect ? obuf_addr : _T_4781; // @[el2_lsu_bus_buffer.scala 614:21] - assign io_lsu_axi_arregion = obuf_addr[31:28]; // @[el2_lsu_bus_buffer.scala 618:23] - assign io_lsu_axi_arlen = 8'h0; // @[el2_lsu_bus_buffer.scala 619:20] - assign io_lsu_axi_arsize = obuf_sideeffect ? _T_4783 : 3'h3; // @[el2_lsu_bus_buffer.scala 615:21] - assign io_lsu_axi_arburst = 2'h1; // @[el2_lsu_bus_buffer.scala 620:22] - assign io_lsu_axi_arlock = 1'h0; // @[el2_lsu_bus_buffer.scala 622:21] - assign io_lsu_axi_arcache = obuf_sideeffect ? 4'h0 : 4'hf; // @[el2_lsu_bus_buffer.scala 617:22] - assign io_lsu_axi_arprot = 3'h0; // @[el2_lsu_bus_buffer.scala 616:21] - assign io_lsu_axi_arqos = 4'h0; // @[el2_lsu_bus_buffer.scala 621:20] - assign io_lsu_axi_rready = 1'h1; // @[el2_lsu_bus_buffer.scala 624:21] - assign io_test = _T_2002[1:0]; // @[el2_lsu_bus_buffer.scala 419:11] - assign io_data_hi = _T_4585 | _T_4583; // @[el2_lsu_bus_buffer.scala 570:14] - assign io_data_lo = _T_4554 | _T_4552; // @[el2_lsu_bus_buffer.scala 571:14] + assign io_lsu_imprecise_error_load_any = io_lsu_nonblock_load_data_error & _T_4852; // @[el2_lsu_bus_buffer.scala 629:35] + assign io_lsu_imprecise_error_store_any = _T_4836 | _T_4834; // @[el2_lsu_bus_buffer.scala 626:36] + assign io_lsu_imprecise_error_addr_any = io_lsu_imprecise_error_store_any ? _T_4858 : _T_4600; // @[el2_lsu_bus_buffer.scala 630:35] + assign io_lsu_nonblock_load_valid_m = _T_4424 & _T_4425; // @[el2_lsu_bus_buffer.scala 556:32] + assign io_lsu_nonblock_load_tag_m = _T_1789 ? 2'h0 : _T_1825; // @[el2_lsu_bus_buffer.scala 557:30] + assign io_lsu_nonblock_load_inv_r = lsu_nonblock_load_valid_r & _T_4427; // @[el2_lsu_bus_buffer.scala 559:30] + assign io_lsu_nonblock_load_inv_tag_r = WrPtr0_r; // @[el2_lsu_bus_buffer.scala 560:34] + assign io_lsu_nonblock_load_data_valid = lsu_nonblock_load_data_ready & _T_4648; // @[el2_lsu_bus_buffer.scala 573:35] + assign io_lsu_nonblock_load_data_error = _T_4477 | _T_4475; // @[el2_lsu_bus_buffer.scala 562:35] + assign io_lsu_nonblock_load_data_tag = _T_4517 | _T_4515; // @[el2_lsu_bus_buffer.scala 563:33] + assign io_lsu_nonblock_load_data = _T_4683[31:0]; // @[el2_lsu_bus_buffer.scala 574:29] + assign io_lsu_pmu_bus_trxn = _T_4875 | _T_4770; // @[el2_lsu_bus_buffer.scala 636:23] + assign io_lsu_pmu_bus_misaligned = _T_4878 & io_lsu_commit_r; // @[el2_lsu_bus_buffer.scala 637:29] + assign io_lsu_pmu_bus_error = io_lsu_imprecise_error_load_any | io_lsu_imprecise_error_store_any; // @[el2_lsu_bus_buffer.scala 638:24] + assign io_lsu_pmu_bus_busy = _T_4885 | _T_4887; // @[el2_lsu_bus_buffer.scala 640:23] + assign io_lsu_axi_awvalid = _T_4780 & _T_1165; // @[el2_lsu_bus_buffer.scala 596:22] + assign io_lsu_axi_awid = {{1'd0}, _T_1774}; // @[el2_lsu_bus_buffer.scala 597:19] + assign io_lsu_axi_awaddr = obuf_sideeffect ? obuf_addr : _T_4784; // @[el2_lsu_bus_buffer.scala 598:21] + assign io_lsu_axi_awregion = obuf_addr[31:28]; // @[el2_lsu_bus_buffer.scala 602:23] + assign io_lsu_axi_awlen = 8'h0; // @[el2_lsu_bus_buffer.scala 603:20] + assign io_lsu_axi_awsize = obuf_sideeffect ? _T_4786 : 3'h3; // @[el2_lsu_bus_buffer.scala 599:21] + assign io_lsu_axi_awburst = 2'h1; // @[el2_lsu_bus_buffer.scala 604:22] + assign io_lsu_axi_awlock = 1'h0; // @[el2_lsu_bus_buffer.scala 606:21] + assign io_lsu_axi_awcache = obuf_sideeffect ? 4'h0 : 4'hf; // @[el2_lsu_bus_buffer.scala 601:22] + assign io_lsu_axi_awprot = 3'h0; // @[el2_lsu_bus_buffer.scala 600:21] + assign io_lsu_axi_awqos = 4'h0; // @[el2_lsu_bus_buffer.scala 605:20] + assign io_lsu_axi_wvalid = _T_4792 & _T_1165; // @[el2_lsu_bus_buffer.scala 608:21] + assign io_lsu_axi_wdata = obuf_data; // @[el2_lsu_bus_buffer.scala 610:20] + assign io_lsu_axi_wstrb = obuf_byteen & _T_4796; // @[el2_lsu_bus_buffer.scala 609:20] + assign io_lsu_axi_wlast = 1'h1; // @[el2_lsu_bus_buffer.scala 611:20] + assign io_lsu_axi_bready = 1'h1; // @[el2_lsu_bus_buffer.scala 624:21] + assign io_lsu_axi_arvalid = _T_4801 & _T_1165; // @[el2_lsu_bus_buffer.scala 613:22] + assign io_lsu_axi_arid = {{1'd0}, _T_1774}; // @[el2_lsu_bus_buffer.scala 614:19] + assign io_lsu_axi_araddr = obuf_sideeffect ? obuf_addr : _T_4784; // @[el2_lsu_bus_buffer.scala 615:21] + assign io_lsu_axi_arregion = obuf_addr[31:28]; // @[el2_lsu_bus_buffer.scala 619:23] + assign io_lsu_axi_arlen = 8'h0; // @[el2_lsu_bus_buffer.scala 620:20] + assign io_lsu_axi_arsize = obuf_sideeffect ? _T_4786 : 3'h3; // @[el2_lsu_bus_buffer.scala 616:21] + assign io_lsu_axi_arburst = 2'h1; // @[el2_lsu_bus_buffer.scala 621:22] + assign io_lsu_axi_arlock = 1'h0; // @[el2_lsu_bus_buffer.scala 623:21] + assign io_lsu_axi_arcache = obuf_sideeffect ? 4'h0 : 4'hf; // @[el2_lsu_bus_buffer.scala 618:22] + assign io_lsu_axi_arprot = 3'h0; // @[el2_lsu_bus_buffer.scala 617:21] + assign io_lsu_axi_arqos = 4'h0; // @[el2_lsu_bus_buffer.scala 622:20] + assign io_lsu_axi_rready = 1'h1; // @[el2_lsu_bus_buffer.scala 625:21] + assign io_test = {_T_4328,buf_data_in_0}; // @[el2_lsu_bus_buffer.scala 546:11] + assign io_data_hi = _T_4588 | _T_4586; // @[el2_lsu_bus_buffer.scala 571:14] + assign io_data_lo = _T_4557 | _T_4555; // @[el2_lsu_bus_buffer.scala 572:14] assign io_data_en = {_T_4325,buf_data_en_0}; // @[el2_lsu_bus_buffer.scala 545:14] assign rvclkhdr_io_clk = clock; // @[el2_lib.scala 487:18] assign rvclkhdr_io_en = _T_766 & _T_767; // @[el2_lib.scala 488:17] @@ -2923,7 +2917,7 @@ initial begin _RAND_105 = {1{`RANDOM}}; lsu_nonblock_load_valid_r = _RAND_105[0:0]; _RAND_106 = {1{`RANDOM}}; - _T_4892 = _RAND_106[0:0]; + _T_4895 = _RAND_106[0:0]; `endif // RANDOMIZE_REG_INIT if (reset) begin buf_addr_0 = 32'h0; @@ -3244,7 +3238,7 @@ initial begin lsu_nonblock_load_valid_r = 1'h0; end if (reset) begin - _T_4892 = 1'h0; + _T_4895 = 1'h0; end `endif // RANDOMIZE end // initial @@ -3943,14 +3937,14 @@ end // initial if (reset) begin obuf_cmd_done <= 1'h0; end else begin - obuf_cmd_done <= _T_1231 & _T_4764; + obuf_cmd_done <= _T_1231 & _T_4767; end end always @(posedge io_lsu_busm_clk or posedge reset) begin if (reset) begin obuf_data_done <= 1'h0; end else begin - obuf_data_done <= _T_1231 & _T_4765; + obuf_data_done <= _T_1231 & _T_4768; end end always @(posedge io_lsu_free_c2_clk or posedge reset) begin @@ -4348,9 +4342,9 @@ end // initial end always @(posedge io_lsu_c2_r_clk or posedge reset) begin if (reset) begin - _T_4892 <= 1'h0; + _T_4895 <= 1'h0; end else begin - _T_4892 <= _T_4889 & _T_4422; + _T_4895 <= _T_4892 & _T_4425; end end endmodule diff --git a/src/main/scala/lsu/el2_lsu_bus_buffer.scala b/src/main/scala/lsu/el2_lsu_bus_buffer.scala index 912deaed..cd872607 100644 --- a/src/main/scala/lsu/el2_lsu_bus_buffer.scala +++ b/src/main/scala/lsu/el2_lsu_bus_buffer.scala @@ -398,7 +398,7 @@ class el2_lsu_bus_buffer extends Module with RequireAsyncReset with el2_lib { val found_array2 = (0 until DEPTH).map(i=>((buf_state(i)===idle_C) & !((ibuf_valid & (ibuf_tag===i.U)) | (io.lsu_busreq_m & (WrPtr0_m===i.U)) | (io.lsu_busreq_r & (WrPtr0_r === i.U)) | (io.ldst_dual_r & (WrPtr1_r===i.U))))->i.U) val WrPtr1_m = MuxCase(0.U, found_array2) - //io.test := WrPtr1_m + val buf_age = Wire(Vec(DEPTH, UInt(DEPTH.W))) buf_age := buf_age.map(i=> 0.U) @@ -416,7 +416,7 @@ class el2_lsu_bus_buffer extends Module with RequireAsyncReset with el2_lib { val CmdPtr1 = WireInit(UInt(DEPTH_LOG2.W), 0.U) val RspPtr = WireInit(UInt(DEPTH_LOG2.W), 0.U) CmdPtr0 := Enc8x3(Cat(Fill(8-DEPTH, 0.U),CmdPtr0Dec)) - io.test := CmdPtr0 + CmdPtr1 := Enc8x3(Cat(Fill(8-DEPTH, 0.U),CmdPtr1Dec)) RspPtr := Enc8x3(Cat(Fill(8-DEPTH, 0.U),RspPtrDec)) val buf_state_en = Wire(Vec(DEPTH, Bool())) @@ -543,6 +543,7 @@ class el2_lsu_bus_buffer extends Module with RequireAsyncReset with el2_lib { buf_data := (0 until DEPTH).map(i=>rvdffe(buf_data_in(i), buf_data_en(i), clock, io.scan_mode)) buf_error := (0 until DEPTH).map(i=>(withClock(io.lsu_bus_buf_c1_clk){RegNext(Mux(buf_error_en(i), true.B, buf_error(i)) & !buf_rst(i), false.B)}).asUInt()).reverse.reduce(Cat(_,_)) io.data_en := (0 until DEPTH).map(i=>buf_data_en(i).asUInt()).reverse.reduce(Cat(_,_)) + io.test := (0 until DEPTH).map(i=>buf_data_in(i).asUInt()).reverse.reduce(Cat(_,_)) val buf_numvld_any = (0 until DEPTH).map(i=>(buf_state(i)=/=idle_C).asUInt).reverse.reduce(_ +& _) buf_numvld_wrcmd_any := (0 until DEPTH).map(i=>(buf_write(i) & (buf_state(i)===cmd_C) & !buf_cmd_state_bus_en(i)).asUInt).reverse.reduce(_ +& _) buf_numvld_cmd_any := (0 until DEPTH).map(i=>((buf_state(i)===cmd_C) & !buf_cmd_state_bus_en(i)).asUInt).reverse.reduce(_ +& _) diff --git a/target/scala-2.12/classes/lsu/BusBufmain$.class b/target/scala-2.12/classes/lsu/BusBufmain$.class index 40b7ea33..dd2beb6d 100644 Binary files a/target/scala-2.12/classes/lsu/BusBufmain$.class and b/target/scala-2.12/classes/lsu/BusBufmain$.class differ diff --git a/target/scala-2.12/classes/lsu/BusBufmain$delayedInit$body.class b/target/scala-2.12/classes/lsu/BusBufmain$delayedInit$body.class index 3dc65afd..32dc62ff 100644 Binary files a/target/scala-2.12/classes/lsu/BusBufmain$delayedInit$body.class and b/target/scala-2.12/classes/lsu/BusBufmain$delayedInit$body.class differ diff --git a/target/scala-2.12/classes/lsu/el2_lsu_bus_buffer.class b/target/scala-2.12/classes/lsu/el2_lsu_bus_buffer.class index 55ee025f..b2124b83 100644 Binary files a/target/scala-2.12/classes/lsu/el2_lsu_bus_buffer.class and b/target/scala-2.12/classes/lsu/el2_lsu_bus_buffer.class differ