Compressed
This commit is contained in:
waleed-lm
parent
a7a5263f72
commit
7335a5bccf
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@ -1,4 +1,17 @@
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[
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[
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_ifu_bp_btb_target_f",
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"sources":[
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_ifc_fetch_addr_f",
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_ifc_fetch_req_f",
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_dec_tlu_flush_leak_one_wb",
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_dec_tlu_flush_lower_wb",
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_dec_tlu_br0_r_pkt_br_start_error",
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_dec_tlu_br0_r_pkt_br_error",
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_exu_i0_br_index_r"
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]
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},
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{
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{
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"class":"firrtl.transforms.CombinationalPath",
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_ifu_bp_pc4_f",
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"sink":"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_ifu_bp_pc4_f",
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@ -6,7 +19,17 @@
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_ifc_fetch_addr_f",
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_ifc_fetch_addr_f",
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_ifc_fetch_req_f",
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_ifc_fetch_req_f",
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_dec_tlu_flush_leak_one_wb",
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_dec_tlu_flush_leak_one_wb",
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_dec_tlu_flush_lower_wb"
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_dec_tlu_flush_lower_wb",
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_dec_tlu_br0_r_pkt_br_start_error",
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_dec_tlu_br0_r_pkt_br_error",
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_exu_i0_br_index_r"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_ifu_bp_hist0_f",
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"sources":[
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_ifc_fetch_addr_f"
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]
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]
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},
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},
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{
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{
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@ -19,14 +42,10 @@
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_dec_tlu_flush_leak_one_wb",
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_dec_tlu_flush_leak_one_wb",
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_dec_tlu_flush_lower_wb",
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_dec_tlu_flush_lower_wb",
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_exu_mp_btag",
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_exu_mp_btag",
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_exu_mp_pkt_misp"
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_exu_mp_pkt_misp",
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]
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_dec_tlu_br0_r_pkt_br_start_error",
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},
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_dec_tlu_br0_r_pkt_br_error",
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{
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_exu_i0_br_index_r"
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_ifu_bp_hist0_f",
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"sources":[
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_ifc_fetch_addr_f"
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]
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]
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},
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},
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{
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{
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@ -36,17 +55,10 @@
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_ifc_fetch_addr_f",
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_ifc_fetch_addr_f",
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_ifc_fetch_req_f",
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_ifc_fetch_req_f",
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_dec_tlu_flush_leak_one_wb",
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_dec_tlu_flush_leak_one_wb",
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_dec_tlu_flush_lower_wb"
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_dec_tlu_flush_lower_wb",
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]
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_dec_tlu_br0_r_pkt_br_start_error",
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},
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_dec_tlu_br0_r_pkt_br_error",
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{
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_exu_i0_br_index_r"
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_ifu_bp_ret_f",
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"sources":[
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_ifc_fetch_addr_f",
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_ifc_fetch_req_f",
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_dec_tlu_flush_leak_one_wb",
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_dec_tlu_flush_lower_wb"
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]
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]
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},
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},
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{
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{
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@ -57,7 +69,23 @@
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_ifc_fetch_addr_f",
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_ifc_fetch_addr_f",
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_ifc_fetch_req_f",
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_ifc_fetch_req_f",
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_dec_tlu_flush_leak_one_wb",
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_dec_tlu_flush_leak_one_wb",
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_dec_tlu_flush_lower_wb"
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_dec_tlu_flush_lower_wb",
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_dec_tlu_br0_r_pkt_br_start_error",
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_dec_tlu_br0_r_pkt_br_error",
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_exu_i0_br_index_r"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_ifu_bp_ret_f",
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"sources":[
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_ifc_fetch_addr_f",
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_ifc_fetch_req_f",
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_dec_tlu_flush_leak_one_wb",
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_dec_tlu_flush_lower_wb",
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_dec_tlu_br0_r_pkt_br_start_error",
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_dec_tlu_br0_r_pkt_br_error",
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"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_exu_i0_br_index_r"
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]
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]
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},
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},
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{
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{
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1221
el2_ifu_bp_ctl.fir
1221
el2_ifu_bp_ctl.fir
File diff suppressed because it is too large
Load Diff
159
el2_ifu_bp_ctl.v
159
el2_ifu_bp_ctl.v
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@ -56,77 +56,102 @@ module el2_ifu_bp_ctl(
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reg [255:0] _RAND_3;
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reg [255:0] _RAND_3;
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reg [31:0] _RAND_4;
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reg [31:0] _RAND_4;
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`endif // RANDOMIZE_REG_INIT
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`endif // RANDOMIZE_REG_INIT
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wire _T_26 = io_dec_tlu_flush_leak_one_wb & io_dec_tlu_flush_lower_wb; // @[el2_ifu_bp_ctl.scala 133:47]
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wire _T_36 = io_dec_tlu_flush_leak_one_wb & io_dec_tlu_flush_lower_wb; // @[el2_ifu_bp_ctl.scala 137:47]
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reg leak_one_f_d1; // @[el2_ifu_bp_ctl.scala 128:30]
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reg leak_one_f_d1; // @[el2_ifu_bp_ctl.scala 132:30]
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wire _T_27 = leak_one_f_d1 & io_dec_tlu_flush_lower_wb; // @[el2_ifu_bp_ctl.scala 133:93]
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wire _T_37 = leak_one_f_d1 & io_dec_tlu_flush_lower_wb; // @[el2_ifu_bp_ctl.scala 137:93]
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wire leak_one_f = _T_26 | _T_27; // @[el2_ifu_bp_ctl.scala 133:76]
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wire leak_one_f = _T_36 | _T_37; // @[el2_ifu_bp_ctl.scala 137:76]
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wire _T = ~leak_one_f; // @[el2_ifu_bp_ctl.scala 67:43]
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wire _T = ~leak_one_f; // @[el2_ifu_bp_ctl.scala 69:43]
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wire exu_mp_valid = io_exu_mp_pkt_misp & _T; // @[el2_ifu_bp_ctl.scala 67:41]
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wire exu_mp_valid = io_exu_mp_pkt_misp & _T; // @[el2_ifu_bp_ctl.scala 69:41]
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wire [7:0] _T_3 = io_ifc_fetch_addr_f[9:2] ^ io_ifc_fetch_addr_f[17:10]; // @[el2_lib.scala 182:42]
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wire [7:0] _T_3 = io_ifc_fetch_addr_f[9:2] ^ io_ifc_fetch_addr_f[17:10]; // @[el2_lib.scala 182:42]
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wire [7:0] btb_rd_addr_f = _T_3 ^ io_ifc_fetch_addr_f[25:18]; // @[el2_lib.scala 182:76]
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wire [7:0] btb_rd_addr_f = _T_3 ^ io_ifc_fetch_addr_f[25:18]; // @[el2_lib.scala 182:76]
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wire [31:0] fetch_addr_p1_f = io_ifc_fetch_addr_f + 32'h4; // @[el2_ifu_bp_ctl.scala 106:45]
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wire [31:0] fetch_addr_p1_f = io_ifc_fetch_addr_f + 32'h4; // @[el2_ifu_bp_ctl.scala 108:45]
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wire [7:0] _T_8 = fetch_addr_p1_f[9:2] ^ fetch_addr_p1_f[17:10]; // @[el2_lib.scala 182:42]
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wire [7:0] _T_8 = fetch_addr_p1_f[9:2] ^ fetch_addr_p1_f[17:10]; // @[el2_lib.scala 182:42]
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wire [7:0] btb_rd_addr_p1_f = _T_8 ^ fetch_addr_p1_f[25:18]; // @[el2_lib.scala 182:76]
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wire [7:0] btb_rd_addr_p1_f = _T_8 ^ fetch_addr_p1_f[25:18]; // @[el2_lib.scala 182:76]
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wire _T_129 = ~io_ifc_fetch_addr_f[1]; // @[el2_ifu_bp_ctl.scala 180:40]
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wire _T_139 = ~io_ifc_fetch_addr_f[1]; // @[el2_ifu_bp_ctl.scala 184:40]
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wire _T_18 = io_exu_mp_btag == 5'h0; // @[el2_ifu_bp_ctl.scala 125:46]
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wire [4:0] _T_22 = io_ifc_fetch_addr_f[14:10] ^ io_ifc_fetch_addr_f[19:15]; // @[el2_lib.scala 175:111]
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wire _T_19 = _T_18 & exu_mp_valid; // @[el2_ifu_bp_ctl.scala 125:66]
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wire [4:0] fetch_rd_tag_f = _T_22 ^ io_ifc_fetch_addr_f[24:20]; // @[el2_lib.scala 175:111]
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wire _T_20 = _T_19 & io_ifc_fetch_req_f; // @[el2_ifu_bp_ctl.scala 125:81]
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wire [4:0] _T_27 = fetch_addr_p1_f[14:10] ^ fetch_addr_p1_f[19:15]; // @[el2_lib.scala 175:111]
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wire [7:0] _GEN_2 = {{1'd0}, io_exu_mp_index}; // @[el2_ifu_bp_ctl.scala 125:117]
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wire [4:0] fetch_rd_tag_p1_f = _T_27 ^ fetch_addr_p1_f[24:20]; // @[el2_lib.scala 175:111]
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wire _T_21 = _GEN_2 == btb_rd_addr_f; // @[el2_ifu_bp_ctl.scala 125:117]
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wire [1:0] fetch_start_f = {io_ifc_fetch_addr_f[1],_T_139}; // @[Cat.scala 29:58]
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wire fetch_mp_collision_f = _T_20 & _T_21; // @[el2_ifu_bp_ctl.scala 125:102]
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wire _T_28 = io_exu_mp_btag == fetch_rd_tag_f; // @[el2_ifu_bp_ctl.scala 129:46]
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wire _T_25 = _GEN_2 == btb_rd_addr_p1_f; // @[el2_ifu_bp_ctl.scala 126:123]
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wire _T_29 = _T_28 & exu_mp_valid; // @[el2_ifu_bp_ctl.scala 129:66]
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wire fetch_mp_collision_p1_f = _T_20 & _T_25; // @[el2_ifu_bp_ctl.scala 126:108]
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wire _T_30 = _T_29 & io_ifc_fetch_req_f; // @[el2_ifu_bp_ctl.scala 129:81]
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reg exu_mp_way_f; // @[el2_ifu_bp_ctl.scala 130:29]
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wire [7:0] _GEN_12 = {{1'd0}, io_exu_mp_index}; // @[el2_ifu_bp_ctl.scala 129:117]
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reg exu_flush_final_d1; // @[el2_ifu_bp_ctl.scala 131:35]
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wire _T_31 = _GEN_12 == btb_rd_addr_f; // @[el2_ifu_bp_ctl.scala 129:117]
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wire [127:0] mp_wrindex_dec = 128'h0 << io_exu_mp_index; // @[el2_ifu_bp_ctl.scala 184:38]
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wire fetch_mp_collision_f = _T_30 & _T_31; // @[el2_ifu_bp_ctl.scala 129:102]
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wire [255:0] fetch_wrindex_dec = 256'h0 << btb_rd_addr_f; // @[el2_ifu_bp_ctl.scala 185:41]
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wire _T_32 = io_exu_mp_btag == fetch_rd_tag_p1_f; // @[el2_ifu_bp_ctl.scala 130:49]
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wire [255:0] fetch_wrindex_p1_dec = 256'h0 << btb_rd_addr_p1_f; // @[el2_ifu_bp_ctl.scala 186:44]
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wire _T_33 = _T_32 & exu_mp_valid; // @[el2_ifu_bp_ctl.scala 130:72]
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wire [255:0] _T_135 = exu_mp_valid ? 256'hffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff : 256'h0; // @[Bitwise.scala 72:12]
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wire _T_34 = _T_33 & io_ifc_fetch_req_f; // @[el2_ifu_bp_ctl.scala 130:87]
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wire [255:0] _GEN_4 = {{128'd0}, mp_wrindex_dec}; // @[el2_ifu_bp_ctl.scala 187:36]
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wire _T_35 = _GEN_12 == btb_rd_addr_p1_f; // @[el2_ifu_bp_ctl.scala 130:123]
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wire [255:0] mp_wrlru_b0 = _GEN_4 & _T_135; // @[el2_ifu_bp_ctl.scala 187:36]
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wire fetch_mp_collision_p1_f = _T_34 & _T_35; // @[el2_ifu_bp_ctl.scala 130:108]
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wire [255:0] btb_lru_b0_hold = ~mp_wrlru_b0; // @[el2_ifu_bp_ctl.scala 196:25]
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reg exu_mp_way_f; // @[el2_ifu_bp_ctl.scala 134:29]
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wire _T_161 = ~io_exu_mp_pkt_way; // @[el2_ifu_bp_ctl.scala 200:33]
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reg exu_flush_final_d1; // @[el2_ifu_bp_ctl.scala 135:35]
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wire [255:0] _T_164 = _T_161 ? mp_wrlru_b0 : 256'h0; // @[Mux.scala 27:72]
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wire [127:0] mp_wrindex_dec = 128'h0 << io_exu_mp_index; // @[el2_ifu_bp_ctl.scala 188:38]
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wire [255:0] fetch_wrindex_dec = 256'h0 << btb_rd_addr_f; // @[el2_ifu_bp_ctl.scala 189:41]
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wire [255:0] fetch_wrindex_p1_dec = 256'h0 << btb_rd_addr_p1_f; // @[el2_ifu_bp_ctl.scala 190:44]
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wire [255:0] _T_145 = exu_mp_valid ? 256'hffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff : 256'h0; // @[Bitwise.scala 72:12]
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wire [255:0] _GEN_14 = {{128'd0}, mp_wrindex_dec}; // @[el2_ifu_bp_ctl.scala 191:36]
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wire [255:0] mp_wrlru_b0 = _GEN_14 & _T_145; // @[el2_ifu_bp_ctl.scala 191:36]
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wire [255:0] btb_lru_b0_hold = ~mp_wrlru_b0; // @[el2_ifu_bp_ctl.scala 200:25]
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wire _T_171 = ~io_exu_mp_pkt_way; // @[el2_ifu_bp_ctl.scala 204:33]
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wire [255:0] _T_174 = _T_171 ? mp_wrlru_b0 : 256'h0; // @[Mux.scala 27:72]
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reg [255:0] btb_lru_b0_f; // @[Reg.scala 27:20]
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reg [255:0] btb_lru_b0_f; // @[Reg.scala 27:20]
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wire [255:0] _T_170 = btb_lru_b0_hold & btb_lru_b0_f; // @[el2_ifu_bp_ctl.scala 202:71]
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wire [255:0] _T_180 = btb_lru_b0_hold & btb_lru_b0_f; // @[el2_ifu_bp_ctl.scala 206:71]
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wire [255:0] btb_lru_b0_ns = _T_164 | _T_170; // @[el2_ifu_bp_ctl.scala 202:53]
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wire [255:0] btb_lru_b0_ns = _T_174 | _T_180; // @[el2_ifu_bp_ctl.scala 206:53]
|
||||||
wire [255:0] _T_172 = fetch_wrindex_dec & btb_lru_b0_f; // @[el2_ifu_bp_ctl.scala 204:78]
|
wire [255:0] _T_182 = fetch_wrindex_dec & btb_lru_b0_f; // @[el2_ifu_bp_ctl.scala 208:78]
|
||||||
wire _T_173 = |_T_172; // @[el2_ifu_bp_ctl.scala 204:94]
|
wire _T_183 = |_T_182; // @[el2_ifu_bp_ctl.scala 208:94]
|
||||||
wire btb_lru_rd_f = fetch_mp_collision_f ? exu_mp_way_f : _T_173; // @[el2_ifu_bp_ctl.scala 204:25]
|
wire btb_lru_rd_f = fetch_mp_collision_f ? exu_mp_way_f : _T_183; // @[el2_ifu_bp_ctl.scala 208:25]
|
||||||
wire [255:0] _T_175 = fetch_wrindex_p1_dec & btb_lru_b0_f; // @[el2_ifu_bp_ctl.scala 205:87]
|
wire [255:0] _T_185 = fetch_wrindex_p1_dec & btb_lru_b0_f; // @[el2_ifu_bp_ctl.scala 209:87]
|
||||||
wire _T_176 = |_T_175; // @[el2_ifu_bp_ctl.scala 205:103]
|
wire _T_186 = |_T_185; // @[el2_ifu_bp_ctl.scala 209:103]
|
||||||
wire btb_lru_rd_p1_f = fetch_mp_collision_p1_f ? exu_mp_way_f : _T_176; // @[el2_ifu_bp_ctl.scala 205:28]
|
wire btb_lru_rd_p1_f = fetch_mp_collision_p1_f ? exu_mp_way_f : _T_186; // @[el2_ifu_bp_ctl.scala 209:28]
|
||||||
wire [1:0] _T_179 = {btb_lru_rd_f,btb_lru_rd_f}; // @[Cat.scala 29:58]
|
wire [1:0] _T_189 = {btb_lru_rd_f,btb_lru_rd_f}; // @[Cat.scala 29:58]
|
||||||
wire [1:0] _T_182 = {btb_lru_rd_p1_f,btb_lru_rd_f}; // @[Cat.scala 29:58]
|
wire [1:0] _T_192 = {btb_lru_rd_p1_f,btb_lru_rd_f}; // @[Cat.scala 29:58]
|
||||||
wire [1:0] _T_183 = _T_129 ? _T_179 : 2'h0; // @[Mux.scala 27:72]
|
wire [1:0] _T_193 = _T_139 ? _T_189 : 2'h0; // @[Mux.scala 27:72]
|
||||||
wire [1:0] _T_184 = io_ifc_fetch_addr_f[1] ? _T_182 : 2'h0; // @[Mux.scala 27:72]
|
wire [1:0] _T_194 = io_ifc_fetch_addr_f[1] ? _T_192 : 2'h0; // @[Mux.scala 27:72]
|
||||||
wire _T_199 = io_ifc_fetch_req_f | exu_mp_valid; // @[el2_ifu_bp_ctl.scala 215:75]
|
wire _T_209 = io_ifc_fetch_req_f | exu_mp_valid; // @[el2_ifu_bp_ctl.scala 219:75]
|
||||||
wire _T_223 = ~leak_one_f_d1; // @[el2_ifu_bp_ctl.scala 229:79]
|
wire _T_233 = ~leak_one_f_d1; // @[el2_ifu_bp_ctl.scala 233:79]
|
||||||
reg [7:0] fghr; // @[el2_ifu_bp_ctl.scala 277:18]
|
reg [7:0] fghr; // @[el2_ifu_bp_ctl.scala 281:18]
|
||||||
wire _T_307 = ~exu_flush_final_d1; // @[el2_ifu_bp_ctl.scala 274:6]
|
wire _T_317 = ~exu_flush_final_d1; // @[el2_ifu_bp_ctl.scala 278:6]
|
||||||
wire _T_308 = _T_307 & io_ifc_fetch_req_f; // @[el2_ifu_bp_ctl.scala 274:26]
|
wire _T_318 = _T_317 & io_ifc_fetch_req_f; // @[el2_ifu_bp_ctl.scala 278:26]
|
||||||
wire _T_309 = _T_308 & io_ic_hit_f; // @[el2_ifu_bp_ctl.scala 274:47]
|
wire _T_319 = _T_318 & io_ic_hit_f; // @[el2_ifu_bp_ctl.scala 278:47]
|
||||||
wire _T_311 = _T_309 & _T_223; // @[el2_ifu_bp_ctl.scala 274:61]
|
wire _T_321 = _T_319 & _T_233; // @[el2_ifu_bp_ctl.scala 278:61]
|
||||||
wire _T_314 = io_ifc_fetch_req_f & io_ic_hit_f; // @[el2_ifu_bp_ctl.scala 275:49]
|
wire _T_324 = io_ifc_fetch_req_f & io_ic_hit_f; // @[el2_ifu_bp_ctl.scala 279:49]
|
||||||
wire _T_316 = _T_314 & _T_223; // @[el2_ifu_bp_ctl.scala 275:63]
|
wire _T_326 = _T_324 & _T_233; // @[el2_ifu_bp_ctl.scala 279:63]
|
||||||
wire _T_317 = ~_T_316; // @[el2_ifu_bp_ctl.scala 275:28]
|
wire _T_327 = ~_T_326; // @[el2_ifu_bp_ctl.scala 279:28]
|
||||||
wire _T_318 = _T_307 & _T_317; // @[el2_ifu_bp_ctl.scala 275:26]
|
wire _T_328 = _T_317 & _T_327; // @[el2_ifu_bp_ctl.scala 279:26]
|
||||||
wire [7:0] _T_320 = exu_flush_final_d1 ? io_exu_mp_fghr : 8'h0; // @[Mux.scala 27:72]
|
wire [7:0] _T_330 = exu_flush_final_d1 ? io_exu_mp_fghr : 8'h0; // @[Mux.scala 27:72]
|
||||||
wire [7:0] _T_321 = _T_311 ? fghr : 8'h0; // @[Mux.scala 27:72]
|
wire [7:0] _T_331 = _T_321 ? fghr : 8'h0; // @[Mux.scala 27:72]
|
||||||
wire [7:0] _T_322 = _T_318 ? fghr : 8'h0; // @[Mux.scala 27:72]
|
wire [7:0] _T_332 = _T_328 ? fghr : 8'h0; // @[Mux.scala 27:72]
|
||||||
wire [7:0] _T_323 = _T_320 | _T_321; // @[Mux.scala 27:72]
|
wire [7:0] _T_333 = _T_330 | _T_331; // @[Mux.scala 27:72]
|
||||||
wire [7:0] fghr_ns = _T_323 | _T_322; // @[Mux.scala 27:72]
|
wire [7:0] fghr_ns = _T_333 | _T_332; // @[Mux.scala 27:72]
|
||||||
assign io_ifu_bp_hit_taken_f = 1'h0; // @[el2_ifu_bp_ctl.scala 42:25]
|
wire _T_342 = ~fetch_start_f[0]; // @[el2_ifu_bp_ctl.scala 292:36]
|
||||||
assign io_ifu_bp_btb_target_f = 31'h0; // @[el2_ifu_bp_ctl.scala 43:26]
|
wire [1:0] bloc_f = {fetch_start_f[0],_T_342}; // @[Cat.scala 29:58]
|
||||||
assign io_ifu_bp_inst_mask_f = 1'h0; // @[el2_ifu_bp_ctl.scala 44:25]
|
wire use_fa_plus = io_ifc_fetch_addr_f[0]; // @[el2_ifu_bp_ctl.scala 295:56]
|
||||||
assign io_ifu_bp_fghr_f = fghr; // @[el2_ifu_bp_ctl.scala 45:20 el2_ifu_bp_ctl.scala 278:20]
|
wire bp_total_branch_offset_f = bloc_f[1]; // @[el2_ifu_bp_ctl.scala 298:40]
|
||||||
assign io_ifu_bp_way_f = _T_183 | _T_184; // @[el2_ifu_bp_ctl.scala 46:19 el2_ifu_bp_ctl.scala 280:19]
|
wire _T_374 = ~use_fa_plus; // @[el2_ifu_bp_ctl.scala 305:27]
|
||||||
assign io_ifu_bp_ret_f = 2'h0; // @[el2_ifu_bp_ctl.scala 47:19 el2_ifu_bp_ctl.scala 286:19]
|
wire [31:0] _T_378 = use_fa_plus ? fetch_addr_p1_f : 32'h0; // @[Mux.scala 27:72]
|
||||||
assign io_ifu_bp_hist1_f = 2'h0; // @[el2_ifu_bp_ctl.scala 48:21 el2_ifu_bp_ctl.scala 281:21]
|
wire [29:0] _T_380 = _T_374 ? io_ifc_fetch_addr_f[31:2] : 30'h0; // @[Mux.scala 27:72]
|
||||||
assign io_ifu_bp_hist0_f = 2'h0; // @[el2_ifu_bp_ctl.scala 49:21 el2_ifu_bp_ctl.scala 282:21]
|
wire [31:0] _GEN_15 = {{2'd0}, _T_380}; // @[Mux.scala 27:72]
|
||||||
assign io_ifu_bp_pc4_f = 2'h0; // @[el2_ifu_bp_ctl.scala 50:19 el2_ifu_bp_ctl.scala 283:19]
|
wire [31:0] adder_pc_in_f = _T_378 | _GEN_15; // @[Mux.scala 27:72]
|
||||||
assign io_ifu_bp_valid_f = 2'h0; // @[el2_ifu_bp_ctl.scala 51:21 el2_ifu_bp_ctl.scala 285:21]
|
wire [31:0] _T_385 = {adder_pc_in_f[31:2],bp_total_branch_offset_f,1'h0}; // @[Cat.scala 29:58]
|
||||||
assign io_ifu_bp_poffset_f = 12'h0; // @[el2_ifu_bp_ctl.scala 52:23]
|
wire [12:0] _T_389 = {{1'd0}, _T_385[12:1]}; // @[el2_lib.scala 199:31]
|
||||||
|
wire [18:0] _T_392 = _T_385[31:13] + 19'h1; // @[el2_lib.scala 200:27]
|
||||||
|
wire _T_398 = ~_T_389[12]; // @[el2_lib.scala 203:27]
|
||||||
|
wire [18:0] _T_410 = _T_398 ? _T_385[31:13] : 19'h0; // @[Mux.scala 27:72]
|
||||||
|
wire [18:0] _T_411 = _T_389[12] ? _T_392 : 19'h0; // @[Mux.scala 27:72]
|
||||||
|
wire [18:0] _T_413 = _T_410 | _T_411; // @[Mux.scala 27:72]
|
||||||
|
wire [31:0] bp_btb_target_adder_f = {_T_413,_T_389[11:0],1'h0}; // @[Cat.scala 29:58]
|
||||||
|
assign io_ifu_bp_hit_taken_f = 1'h0; // @[el2_ifu_bp_ctl.scala 44:25]
|
||||||
|
assign io_ifu_bp_btb_target_f = bp_btb_target_adder_f[31:1]; // @[el2_ifu_bp_ctl.scala 45:26 el2_ifu_bp_ctl.scala 312:26]
|
||||||
|
assign io_ifu_bp_inst_mask_f = 1'h0; // @[el2_ifu_bp_ctl.scala 46:25]
|
||||||
|
assign io_ifu_bp_fghr_f = fghr; // @[el2_ifu_bp_ctl.scala 47:20 el2_ifu_bp_ctl.scala 282:20]
|
||||||
|
assign io_ifu_bp_way_f = _T_193 | _T_194; // @[el2_ifu_bp_ctl.scala 48:19 el2_ifu_bp_ctl.scala 284:19]
|
||||||
|
assign io_ifu_bp_ret_f = 2'h0; // @[el2_ifu_bp_ctl.scala 49:19 el2_ifu_bp_ctl.scala 290:19]
|
||||||
|
assign io_ifu_bp_hist1_f = 2'h0; // @[el2_ifu_bp_ctl.scala 50:21 el2_ifu_bp_ctl.scala 285:21]
|
||||||
|
assign io_ifu_bp_hist0_f = 2'h0; // @[el2_ifu_bp_ctl.scala 51:21 el2_ifu_bp_ctl.scala 286:21]
|
||||||
|
assign io_ifu_bp_pc4_f = 2'h0; // @[el2_ifu_bp_ctl.scala 52:19 el2_ifu_bp_ctl.scala 287:19]
|
||||||
|
assign io_ifu_bp_valid_f = 2'h0; // @[el2_ifu_bp_ctl.scala 53:21 el2_ifu_bp_ctl.scala 289:21]
|
||||||
|
assign io_ifu_bp_poffset_f = 12'h0; // @[el2_ifu_bp_ctl.scala 54:23]
|
||||||
`ifdef RANDOMIZE_GARBAGE_ASSIGN
|
`ifdef RANDOMIZE_GARBAGE_ASSIGN
|
||||||
`define RANDOMIZE
|
`define RANDOMIZE
|
||||||
`endif
|
`endif
|
||||||
|
|
@ -197,7 +222,7 @@ end // initial
|
||||||
end
|
end
|
||||||
if (reset) begin
|
if (reset) begin
|
||||||
btb_lru_b0_f <= 256'h0;
|
btb_lru_b0_f <= 256'h0;
|
||||||
end else if (_T_199) begin
|
end else if (_T_209) begin
|
||||||
btb_lru_b0_f <= btb_lru_b0_ns;
|
btb_lru_b0_f <= btb_lru_b0_ns;
|
||||||
end
|
end
|
||||||
if (reset) begin
|
if (reset) begin
|
||||||
|
|
|
||||||
|
|
@ -6,6 +6,34 @@
|
||||||
"~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_din"
|
"~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_din"
|
||||||
]
|
]
|
||||||
},
|
},
|
||||||
|
{
|
||||||
|
"class":"firrtl.transforms.CombinationalPath",
|
||||||
|
"sink":"~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_l2",
|
||||||
|
"sources":[
|
||||||
|
"~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_din"
|
||||||
|
]
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"class":"firrtl.transforms.CombinationalPath",
|
||||||
|
"sink":"~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_l3",
|
||||||
|
"sources":[
|
||||||
|
"~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_din"
|
||||||
|
]
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"class":"firrtl.transforms.CombinationalPath",
|
||||||
|
"sink":"~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_l1",
|
||||||
|
"sources":[
|
||||||
|
"~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_din"
|
||||||
|
]
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"class":"firrtl.transforms.CombinationalPath",
|
||||||
|
"sink":"~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_legal",
|
||||||
|
"sources":[
|
||||||
|
"~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_din"
|
||||||
|
]
|
||||||
|
},
|
||||||
{
|
{
|
||||||
"class":"firrtl.EmitCircuitAnnotation",
|
"class":"firrtl.EmitCircuitAnnotation",
|
||||||
"emitter":"firrtl.VerilogEmitter"
|
"emitter":"firrtl.VerilogEmitter"
|
||||||
|
|
|
||||||
File diff suppressed because it is too large
Load Diff
|
|
@ -2,324 +2,328 @@ module el2_ifu_compress_ctl(
|
||||||
input clock,
|
input clock,
|
||||||
input reset,
|
input reset,
|
||||||
input [15:0] io_din,
|
input [15:0] io_din,
|
||||||
output [31:0] io_dout
|
output [31:0] io_dout,
|
||||||
|
output [31:0] io_l1,
|
||||||
|
output [31:0] io_l2,
|
||||||
|
output [31:0] io_l3,
|
||||||
|
output io_legal
|
||||||
);
|
);
|
||||||
wire _T_2 = ~io_din[14]; // @[el2_ifu_compress_ctl.scala 15:83]
|
wire _T_2 = ~io_din[14]; // @[el2_ifu_compress_ctl.scala 19:83]
|
||||||
wire _T_4 = ~io_din[13]; // @[el2_ifu_compress_ctl.scala 15:83]
|
wire _T_4 = ~io_din[13]; // @[el2_ifu_compress_ctl.scala 19:83]
|
||||||
wire _T_7 = ~io_din[6]; // @[el2_ifu_compress_ctl.scala 15:83]
|
wire _T_7 = ~io_din[6]; // @[el2_ifu_compress_ctl.scala 19:83]
|
||||||
wire _T_9 = ~io_din[5]; // @[el2_ifu_compress_ctl.scala 15:83]
|
wire _T_9 = ~io_din[5]; // @[el2_ifu_compress_ctl.scala 19:83]
|
||||||
wire _T_11 = io_din[15] & _T_2; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_11 = io_din[15] & _T_2; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_12 = _T_11 & _T_4; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_12 = _T_11 & _T_4; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_13 = _T_12 & io_din[10]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_13 = _T_12 & io_din[10]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_14 = _T_13 & _T_7; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_14 = _T_13 & _T_7; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_15 = _T_14 & _T_9; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_15 = _T_14 & _T_9; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_16 = _T_15 & io_din[0]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_16 = _T_15 & io_din[0]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_23 = ~io_din[11]; // @[el2_ifu_compress_ctl.scala 15:83]
|
wire _T_23 = ~io_din[11]; // @[el2_ifu_compress_ctl.scala 19:83]
|
||||||
wire _T_28 = _T_12 & _T_23; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_28 = _T_12 & _T_23; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_29 = _T_28 & io_din[10]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_29 = _T_28 & io_din[10]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_30 = _T_29 & io_din[0]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_30 = _T_29 & io_din[0]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire out_30 = _T_16 | _T_30; // @[el2_ifu_compress_ctl.scala 18:53]
|
wire out_30 = _T_16 | _T_30; // @[el2_ifu_compress_ctl.scala 22:53]
|
||||||
wire _T_38 = ~io_din[10]; // @[el2_ifu_compress_ctl.scala 15:83]
|
wire _T_38 = ~io_din[10]; // @[el2_ifu_compress_ctl.scala 19:83]
|
||||||
wire _T_40 = ~io_din[9]; // @[el2_ifu_compress_ctl.scala 15:83]
|
wire _T_40 = ~io_din[9]; // @[el2_ifu_compress_ctl.scala 19:83]
|
||||||
wire _T_42 = ~io_din[8]; // @[el2_ifu_compress_ctl.scala 15:83]
|
wire _T_42 = ~io_din[8]; // @[el2_ifu_compress_ctl.scala 19:83]
|
||||||
wire _T_44 = ~io_din[7]; // @[el2_ifu_compress_ctl.scala 15:83]
|
wire _T_44 = ~io_din[7]; // @[el2_ifu_compress_ctl.scala 19:83]
|
||||||
wire _T_50 = ~io_din[4]; // @[el2_ifu_compress_ctl.scala 15:83]
|
wire _T_50 = ~io_din[4]; // @[el2_ifu_compress_ctl.scala 19:83]
|
||||||
wire _T_52 = ~io_din[3]; // @[el2_ifu_compress_ctl.scala 15:83]
|
wire _T_52 = ~io_din[3]; // @[el2_ifu_compress_ctl.scala 19:83]
|
||||||
wire _T_54 = ~io_din[2]; // @[el2_ifu_compress_ctl.scala 15:83]
|
wire _T_54 = ~io_din[2]; // @[el2_ifu_compress_ctl.scala 19:83]
|
||||||
wire _T_56 = _T_2 & io_din[12]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_56 = _T_2 & io_din[12]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_57 = _T_56 & _T_23; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_57 = _T_56 & _T_23; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_58 = _T_57 & _T_38; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_58 = _T_57 & _T_38; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_59 = _T_58 & _T_40; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_59 = _T_58 & _T_40; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_60 = _T_59 & _T_42; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_60 = _T_59 & _T_42; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_61 = _T_60 & _T_44; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_61 = _T_60 & _T_44; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_62 = _T_61 & _T_7; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_62 = _T_61 & _T_7; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_63 = _T_62 & _T_9; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_63 = _T_62 & _T_9; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_64 = _T_63 & _T_50; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_64 = _T_63 & _T_50; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_65 = _T_64 & _T_52; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_65 = _T_64 & _T_52; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_66 = _T_65 & _T_54; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_66 = _T_65 & _T_54; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire out_20 = _T_66 & io_din[1]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire out_20 = _T_66 & io_din[1]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_79 = _T_28 & io_din[0]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_79 = _T_28 & io_din[0]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_90 = _T_12 & _T_38; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_90 = _T_12 & _T_38; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_91 = _T_90 & io_din[0]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_91 = _T_90 & io_din[0]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_92 = _T_79 | _T_91; // @[el2_ifu_compress_ctl.scala 20:46]
|
wire _T_92 = _T_79 | _T_91; // @[el2_ifu_compress_ctl.scala 24:46]
|
||||||
wire _T_102 = _T_12 & io_din[6]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_102 = _T_12 & io_din[6]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_103 = _T_102 & io_din[0]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_103 = _T_102 & io_din[0]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_104 = _T_92 | _T_103; // @[el2_ifu_compress_ctl.scala 20:80]
|
wire _T_104 = _T_92 | _T_103; // @[el2_ifu_compress_ctl.scala 24:80]
|
||||||
wire _T_114 = _T_12 & io_din[5]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_114 = _T_12 & io_din[5]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_115 = _T_114 & io_din[0]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_115 = _T_114 & io_din[0]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire out_14 = _T_104 | _T_115; // @[el2_ifu_compress_ctl.scala 20:113]
|
wire out_14 = _T_104 | _T_115; // @[el2_ifu_compress_ctl.scala 24:113]
|
||||||
wire _T_128 = _T_12 & io_din[11]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_128 = _T_12 & io_din[11]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_129 = _T_128 & _T_38; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_129 = _T_128 & _T_38; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_130 = _T_129 & io_din[0]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_130 = _T_129 & io_din[0]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_142 = _T_128 & io_din[6]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_142 = _T_128 & io_din[6]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_143 = _T_142 & io_din[0]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_143 = _T_142 & io_din[0]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_144 = _T_130 | _T_143; // @[el2_ifu_compress_ctl.scala 22:50]
|
wire _T_144 = _T_130 | _T_143; // @[el2_ifu_compress_ctl.scala 26:50]
|
||||||
wire _T_147 = ~io_din[0]; // @[el2_ifu_compress_ctl.scala 22:101]
|
wire _T_147 = ~io_din[0]; // @[el2_ifu_compress_ctl.scala 26:101]
|
||||||
wire _T_148 = io_din[14] & _T_147; // @[el2_ifu_compress_ctl.scala 22:99]
|
wire _T_148 = io_din[14] & _T_147; // @[el2_ifu_compress_ctl.scala 26:99]
|
||||||
wire out_13 = _T_144 | _T_148; // @[el2_ifu_compress_ctl.scala 22:86]
|
wire out_13 = _T_144 | _T_148; // @[el2_ifu_compress_ctl.scala 26:86]
|
||||||
wire _T_161 = _T_102 & io_din[5]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_161 = _T_102 & io_din[5]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_162 = _T_161 & io_din[0]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_162 = _T_161 & io_din[0]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_175 = _T_162 | _T_79; // @[el2_ifu_compress_ctl.scala 23:47]
|
wire _T_175 = _T_162 | _T_79; // @[el2_ifu_compress_ctl.scala 27:47]
|
||||||
wire _T_188 = _T_175 | _T_91; // @[el2_ifu_compress_ctl.scala 23:81]
|
wire _T_188 = _T_175 | _T_91; // @[el2_ifu_compress_ctl.scala 27:81]
|
||||||
wire _T_190 = ~io_din[15]; // @[el2_ifu_compress_ctl.scala 15:83]
|
wire _T_190 = ~io_din[15]; // @[el2_ifu_compress_ctl.scala 19:83]
|
||||||
wire _T_194 = _T_190 & _T_2; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_194 = _T_190 & _T_2; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_195 = _T_194 & io_din[1]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_195 = _T_194 & io_din[1]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_196 = _T_188 | _T_195; // @[el2_ifu_compress_ctl.scala 23:115]
|
wire _T_196 = _T_188 | _T_195; // @[el2_ifu_compress_ctl.scala 27:115]
|
||||||
wire _T_200 = io_din[15] & io_din[14]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_200 = io_din[15] & io_din[14]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_201 = _T_200 & io_din[13]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_201 = _T_200 & io_din[13]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire out_12 = _T_196 | _T_201; // @[el2_ifu_compress_ctl.scala 24:26]
|
wire out_12 = _T_196 | _T_201; // @[el2_ifu_compress_ctl.scala 28:26]
|
||||||
wire _T_217 = _T_11 & _T_7; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_217 = _T_11 & _T_7; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_218 = _T_217 & _T_9; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_218 = _T_217 & _T_9; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_219 = _T_218 & _T_50; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_219 = _T_218 & _T_50; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_220 = _T_219 & _T_52; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_220 = _T_219 & _T_52; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_221 = _T_220 & _T_54; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_221 = _T_220 & _T_54; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_224 = _T_221 & _T_147; // @[el2_ifu_compress_ctl.scala 25:53]
|
wire _T_224 = _T_221 & _T_147; // @[el2_ifu_compress_ctl.scala 29:53]
|
||||||
wire _T_228 = _T_2 & io_din[13]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_228 = _T_2 & io_din[13]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_229 = _T_224 | _T_228; // @[el2_ifu_compress_ctl.scala 25:67]
|
wire _T_229 = _T_224 | _T_228; // @[el2_ifu_compress_ctl.scala 29:67]
|
||||||
wire _T_234 = _T_200 & io_din[0]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_234 = _T_200 & io_din[0]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire out_6 = _T_229 | _T_234; // @[el2_ifu_compress_ctl.scala 25:88]
|
wire out_6 = _T_229 | _T_234; // @[el2_ifu_compress_ctl.scala 29:88]
|
||||||
wire _T_239 = io_din[15] & _T_147; // @[el2_ifu_compress_ctl.scala 26:24]
|
wire _T_239 = io_din[15] & _T_147; // @[el2_ifu_compress_ctl.scala 30:24]
|
||||||
wire _T_243 = io_din[15] & io_din[11]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_243 = io_din[15] & io_din[11]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_244 = _T_243 & io_din[10]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_244 = _T_243 & io_din[10]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_245 = _T_239 | _T_244; // @[el2_ifu_compress_ctl.scala 26:39]
|
wire _T_245 = _T_239 | _T_244; // @[el2_ifu_compress_ctl.scala 30:39]
|
||||||
wire _T_249 = io_din[13] & _T_42; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_249 = io_din[13] & _T_42; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_250 = _T_245 | _T_249; // @[el2_ifu_compress_ctl.scala 26:63]
|
wire _T_250 = _T_245 | _T_249; // @[el2_ifu_compress_ctl.scala 30:63]
|
||||||
wire _T_253 = io_din[13] & io_din[7]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_253 = io_din[13] & io_din[7]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_254 = _T_250 | _T_253; // @[el2_ifu_compress_ctl.scala 26:83]
|
wire _T_254 = _T_250 | _T_253; // @[el2_ifu_compress_ctl.scala 30:83]
|
||||||
wire _T_257 = io_din[13] & io_din[9]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_257 = io_din[13] & io_din[9]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_258 = _T_254 | _T_257; // @[el2_ifu_compress_ctl.scala 26:102]
|
wire _T_258 = _T_254 | _T_257; // @[el2_ifu_compress_ctl.scala 30:102]
|
||||||
wire _T_261 = io_din[13] & io_din[10]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_261 = io_din[13] & io_din[10]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_262 = _T_258 | _T_261; // @[el2_ifu_compress_ctl.scala 27:22]
|
wire _T_262 = _T_258 | _T_261; // @[el2_ifu_compress_ctl.scala 31:22]
|
||||||
wire _T_265 = io_din[13] & io_din[11]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_265 = io_din[13] & io_din[11]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_266 = _T_262 | _T_265; // @[el2_ifu_compress_ctl.scala 27:42]
|
wire _T_266 = _T_262 | _T_265; // @[el2_ifu_compress_ctl.scala 31:42]
|
||||||
wire _T_271 = _T_266 | _T_228; // @[el2_ifu_compress_ctl.scala 27:62]
|
wire _T_271 = _T_266 | _T_228; // @[el2_ifu_compress_ctl.scala 31:62]
|
||||||
wire out_5 = _T_271 | _T_200; // @[el2_ifu_compress_ctl.scala 27:83]
|
wire out_5 = _T_271 | _T_200; // @[el2_ifu_compress_ctl.scala 31:83]
|
||||||
wire _T_288 = _T_2 & _T_23; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_288 = _T_2 & _T_23; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_289 = _T_288 & _T_38; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_289 = _T_288 & _T_38; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_290 = _T_289 & _T_40; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_290 = _T_289 & _T_40; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_291 = _T_290 & _T_42; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_291 = _T_290 & _T_42; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_292 = _T_291 & _T_44; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_292 = _T_291 & _T_44; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_295 = _T_292 & _T_147; // @[el2_ifu_compress_ctl.scala 28:50]
|
wire _T_295 = _T_292 & _T_147; // @[el2_ifu_compress_ctl.scala 32:50]
|
||||||
wire _T_303 = _T_194 & _T_147; // @[el2_ifu_compress_ctl.scala 28:87]
|
wire _T_303 = _T_194 & _T_147; // @[el2_ifu_compress_ctl.scala 32:87]
|
||||||
wire _T_304 = _T_295 | _T_303; // @[el2_ifu_compress_ctl.scala 28:65]
|
wire _T_304 = _T_295 | _T_303; // @[el2_ifu_compress_ctl.scala 32:65]
|
||||||
wire _T_308 = _T_2 & io_din[6]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_308 = _T_2 & io_din[6]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_311 = _T_308 & _T_147; // @[el2_ifu_compress_ctl.scala 29:23]
|
wire _T_311 = _T_308 & _T_147; // @[el2_ifu_compress_ctl.scala 33:23]
|
||||||
wire _T_312 = _T_304 | _T_311; // @[el2_ifu_compress_ctl.scala 28:102]
|
wire _T_312 = _T_304 | _T_311; // @[el2_ifu_compress_ctl.scala 32:102]
|
||||||
wire _T_317 = _T_190 & io_din[14]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_317 = _T_190 & io_din[14]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_318 = _T_317 & io_din[0]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_318 = _T_317 & io_din[0]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_319 = _T_312 | _T_318; // @[el2_ifu_compress_ctl.scala 29:38]
|
wire _T_319 = _T_312 | _T_318; // @[el2_ifu_compress_ctl.scala 33:38]
|
||||||
wire _T_323 = _T_2 & io_din[5]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_323 = _T_2 & io_din[5]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_326 = _T_323 & _T_147; // @[el2_ifu_compress_ctl.scala 29:82]
|
wire _T_326 = _T_323 & _T_147; // @[el2_ifu_compress_ctl.scala 33:82]
|
||||||
wire _T_327 = _T_319 | _T_326; // @[el2_ifu_compress_ctl.scala 29:62]
|
wire _T_327 = _T_319 | _T_326; // @[el2_ifu_compress_ctl.scala 33:62]
|
||||||
wire _T_331 = _T_2 & io_din[4]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_331 = _T_2 & io_din[4]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_334 = _T_331 & _T_147; // @[el2_ifu_compress_ctl.scala 30:23]
|
wire _T_334 = _T_331 & _T_147; // @[el2_ifu_compress_ctl.scala 34:23]
|
||||||
wire _T_335 = _T_327 | _T_334; // @[el2_ifu_compress_ctl.scala 29:97]
|
wire _T_335 = _T_327 | _T_334; // @[el2_ifu_compress_ctl.scala 33:97]
|
||||||
wire _T_339 = _T_2 & io_din[3]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_339 = _T_2 & io_din[3]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_342 = _T_339 & _T_147; // @[el2_ifu_compress_ctl.scala 30:58]
|
wire _T_342 = _T_339 & _T_147; // @[el2_ifu_compress_ctl.scala 34:58]
|
||||||
wire _T_343 = _T_335 | _T_342; // @[el2_ifu_compress_ctl.scala 30:38]
|
wire _T_343 = _T_335 | _T_342; // @[el2_ifu_compress_ctl.scala 34:38]
|
||||||
wire _T_347 = _T_2 & io_din[2]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_347 = _T_2 & io_din[2]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_350 = _T_347 & _T_147; // @[el2_ifu_compress_ctl.scala 30:93]
|
wire _T_350 = _T_347 & _T_147; // @[el2_ifu_compress_ctl.scala 34:93]
|
||||||
wire _T_351 = _T_343 | _T_350; // @[el2_ifu_compress_ctl.scala 30:73]
|
wire _T_351 = _T_343 | _T_350; // @[el2_ifu_compress_ctl.scala 34:73]
|
||||||
wire _T_357 = _T_2 & _T_4; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_357 = _T_2 & _T_4; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_358 = _T_357 & io_din[0]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_358 = _T_357 & io_din[0]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire out_4 = _T_351 | _T_358; // @[el2_ifu_compress_ctl.scala 30:108]
|
wire out_4 = _T_351 | _T_358; // @[el2_ifu_compress_ctl.scala 34:108]
|
||||||
wire _T_380 = _T_56 & io_din[11]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_380 = _T_56 & io_din[11]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_381 = _T_380 & _T_7; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_381 = _T_380 & _T_7; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_382 = _T_381 & _T_9; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_382 = _T_381 & _T_9; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_383 = _T_382 & _T_50; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_383 = _T_382 & _T_50; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_384 = _T_383 & _T_52; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_384 = _T_383 & _T_52; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_385 = _T_384 & _T_54; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_385 = _T_384 & _T_54; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_386 = _T_385 & io_din[1]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_386 = _T_385 & io_din[1]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_403 = _T_56 & io_din[10]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_403 = _T_56 & io_din[10]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_404 = _T_403 & _T_7; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_404 = _T_403 & _T_7; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_405 = _T_404 & _T_9; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_405 = _T_404 & _T_9; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_406 = _T_405 & _T_50; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_406 = _T_405 & _T_50; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_407 = _T_406 & _T_52; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_407 = _T_406 & _T_52; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_408 = _T_407 & _T_54; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_408 = _T_407 & _T_54; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_409 = _T_408 & io_din[1]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_409 = _T_408 & io_din[1]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_410 = _T_386 | _T_409; // @[el2_ifu_compress_ctl.scala 33:59]
|
wire _T_410 = _T_386 | _T_409; // @[el2_ifu_compress_ctl.scala 37:59]
|
||||||
wire _T_427 = _T_56 & io_din[9]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_427 = _T_56 & io_din[9]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_428 = _T_427 & _T_7; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_428 = _T_427 & _T_7; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_429 = _T_428 & _T_9; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_429 = _T_428 & _T_9; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_430 = _T_429 & _T_50; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_430 = _T_429 & _T_50; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_431 = _T_430 & _T_52; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_431 = _T_430 & _T_52; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_432 = _T_431 & _T_54; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_432 = _T_431 & _T_54; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_433 = _T_432 & io_din[1]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_433 = _T_432 & io_din[1]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_434 = _T_410 | _T_433; // @[el2_ifu_compress_ctl.scala 33:107]
|
wire _T_434 = _T_410 | _T_433; // @[el2_ifu_compress_ctl.scala 37:107]
|
||||||
wire _T_450 = _T_56 & io_din[8]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_450 = _T_56 & io_din[8]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_451 = _T_450 & io_din[6]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_451 = _T_450 & io_din[6]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_452 = _T_451 & _T_9; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_452 = _T_451 & _T_9; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_453 = _T_452 & _T_50; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_453 = _T_452 & _T_50; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_454 = _T_453 & _T_52; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_454 = _T_453 & _T_52; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_455 = _T_454 & _T_54; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_455 = _T_454 & _T_54; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_456 = _T_455 & io_din[1]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_456 = _T_455 & io_din[1]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_457 = _T_434 | _T_456; // @[el2_ifu_compress_ctl.scala 34:48]
|
wire _T_457 = _T_434 | _T_456; // @[el2_ifu_compress_ctl.scala 38:48]
|
||||||
wire _T_474 = _T_56 & io_din[7]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_474 = _T_56 & io_din[7]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_475 = _T_474 & _T_7; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_475 = _T_474 & _T_7; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_476 = _T_475 & _T_9; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_476 = _T_475 & _T_9; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_477 = _T_476 & _T_50; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_477 = _T_476 & _T_50; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_478 = _T_477 & _T_52; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_478 = _T_477 & _T_52; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_479 = _T_478 & _T_54; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_479 = _T_478 & _T_54; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_480 = _T_479 & io_din[1]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_480 = _T_479 & io_din[1]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_481 = _T_457 | _T_480; // @[el2_ifu_compress_ctl.scala 34:86]
|
wire _T_481 = _T_457 | _T_480; // @[el2_ifu_compress_ctl.scala 38:86]
|
||||||
wire _T_486 = ~io_din[12]; // @[el2_ifu_compress_ctl.scala 15:83]
|
wire _T_486 = ~io_din[12]; // @[el2_ifu_compress_ctl.scala 19:83]
|
||||||
wire _T_498 = _T_11 & _T_486; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_498 = _T_11 & _T_486; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_499 = _T_498 & _T_7; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_499 = _T_498 & _T_7; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_500 = _T_499 & _T_9; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_500 = _T_499 & _T_9; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_501 = _T_500 & _T_50; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_501 = _T_500 & _T_50; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_502 = _T_501 & _T_52; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_502 = _T_501 & _T_52; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_503 = _T_502 & _T_54; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_503 = _T_502 & _T_54; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_506 = _T_503 & _T_147; // @[el2_ifu_compress_ctl.scala 35:42]
|
wire _T_506 = _T_503 & _T_147; // @[el2_ifu_compress_ctl.scala 39:42]
|
||||||
wire _T_507 = _T_481 | _T_506; // @[el2_ifu_compress_ctl.scala 34:125]
|
wire _T_507 = _T_481 | _T_506; // @[el2_ifu_compress_ctl.scala 38:125]
|
||||||
wire _T_513 = _T_190 & io_din[13]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_513 = _T_190 & io_din[13]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_514 = _T_513 & _T_42; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_514 = _T_513 & _T_42; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_515 = _T_507 | _T_514; // @[el2_ifu_compress_ctl.scala 35:57]
|
wire _T_515 = _T_507 | _T_514; // @[el2_ifu_compress_ctl.scala 39:57]
|
||||||
wire _T_521 = _T_513 & io_din[7]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_521 = _T_513 & io_din[7]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_522 = _T_515 | _T_521; // @[el2_ifu_compress_ctl.scala 35:80]
|
wire _T_522 = _T_515 | _T_521; // @[el2_ifu_compress_ctl.scala 39:80]
|
||||||
wire _T_528 = _T_513 & io_din[9]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_528 = _T_513 & io_din[9]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_529 = _T_522 | _T_528; // @[el2_ifu_compress_ctl.scala 35:102]
|
wire _T_529 = _T_522 | _T_528; // @[el2_ifu_compress_ctl.scala 39:102]
|
||||||
wire _T_535 = _T_513 & io_din[10]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_535 = _T_513 & io_din[10]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_536 = _T_529 | _T_535; // @[el2_ifu_compress_ctl.scala 35:124]
|
wire _T_536 = _T_529 | _T_535; // @[el2_ifu_compress_ctl.scala 39:124]
|
||||||
wire _T_542 = _T_513 & io_din[11]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_542 = _T_513 & io_din[11]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_543 = _T_536 | _T_542; // @[el2_ifu_compress_ctl.scala 36:24]
|
wire _T_543 = _T_536 | _T_542; // @[el2_ifu_compress_ctl.scala 40:24]
|
||||||
wire out_2 = _T_543 | _T_228; // @[el2_ifu_compress_ctl.scala 36:47]
|
wire out_2 = _T_543 | _T_228; // @[el2_ifu_compress_ctl.scala 40:47]
|
||||||
wire [4:0] rs2d = io_din[6:2]; // @[el2_ifu_compress_ctl.scala 44:20]
|
wire [4:0] rs2d = io_din[6:2]; // @[el2_ifu_compress_ctl.scala 48:20]
|
||||||
wire [4:0] rdd = io_din[11:7]; // @[el2_ifu_compress_ctl.scala 45:19]
|
wire [4:0] rdd = io_din[11:7]; // @[el2_ifu_compress_ctl.scala 49:19]
|
||||||
wire [4:0] rdpd = {2'h1,io_din[9:7]}; // @[Cat.scala 29:58]
|
wire [4:0] rdpd = {2'h1,io_din[9:7]}; // @[Cat.scala 29:58]
|
||||||
wire [4:0] rs2pd = {2'h1,io_din[4:2]}; // @[Cat.scala 29:58]
|
wire [4:0] rs2pd = {2'h1,io_din[4:2]}; // @[Cat.scala 29:58]
|
||||||
wire _T_556 = _T_308 & io_din[1]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_556 = _T_308 & io_din[1]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_563 = _T_317 & io_din[11]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_563 = _T_317 & io_din[11]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_564 = _T_563 & io_din[0]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_564 = _T_563 & io_din[0]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_565 = _T_556 | _T_564; // @[el2_ifu_compress_ctl.scala 49:33]
|
wire _T_565 = _T_556 | _T_564; // @[el2_ifu_compress_ctl.scala 53:33]
|
||||||
wire _T_571 = _T_323 & io_din[1]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_571 = _T_323 & io_din[1]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_572 = _T_565 | _T_571; // @[el2_ifu_compress_ctl.scala 49:58]
|
wire _T_572 = _T_565 | _T_571; // @[el2_ifu_compress_ctl.scala 53:58]
|
||||||
wire _T_579 = _T_317 & io_din[10]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_579 = _T_317 & io_din[10]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_580 = _T_579 & io_din[0]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_580 = _T_579 & io_din[0]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_581 = _T_572 | _T_580; // @[el2_ifu_compress_ctl.scala 49:79]
|
wire _T_581 = _T_572 | _T_580; // @[el2_ifu_compress_ctl.scala 53:79]
|
||||||
wire _T_587 = _T_331 & io_din[1]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_587 = _T_331 & io_din[1]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_588 = _T_581 | _T_587; // @[el2_ifu_compress_ctl.scala 49:104]
|
wire _T_588 = _T_581 | _T_587; // @[el2_ifu_compress_ctl.scala 53:104]
|
||||||
wire _T_595 = _T_317 & io_din[9]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_595 = _T_317 & io_din[9]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_596 = _T_595 & io_din[0]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_596 = _T_595 & io_din[0]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_597 = _T_588 | _T_596; // @[el2_ifu_compress_ctl.scala 50:24]
|
wire _T_597 = _T_588 | _T_596; // @[el2_ifu_compress_ctl.scala 54:24]
|
||||||
wire _T_603 = _T_339 & io_din[1]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_603 = _T_339 & io_din[1]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_604 = _T_597 | _T_603; // @[el2_ifu_compress_ctl.scala 50:48]
|
wire _T_604 = _T_597 | _T_603; // @[el2_ifu_compress_ctl.scala 54:48]
|
||||||
wire _T_612 = _T_317 & _T_42; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_612 = _T_317 & _T_42; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_613 = _T_612 & io_din[0]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_613 = _T_612 & io_din[0]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_614 = _T_604 | _T_613; // @[el2_ifu_compress_ctl.scala 50:69]
|
wire _T_614 = _T_604 | _T_613; // @[el2_ifu_compress_ctl.scala 54:69]
|
||||||
wire _T_620 = _T_347 & io_din[1]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_620 = _T_347 & io_din[1]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_621 = _T_614 | _T_620; // @[el2_ifu_compress_ctl.scala 50:94]
|
wire _T_621 = _T_614 | _T_620; // @[el2_ifu_compress_ctl.scala 54:94]
|
||||||
wire _T_628 = _T_317 & io_din[7]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_628 = _T_317 & io_din[7]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_629 = _T_628 & io_din[0]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_629 = _T_628 & io_din[0]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_630 = _T_621 | _T_629; // @[el2_ifu_compress_ctl.scala 51:22]
|
wire _T_630 = _T_621 | _T_629; // @[el2_ifu_compress_ctl.scala 55:22]
|
||||||
wire _T_634 = _T_190 & io_din[1]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_634 = _T_190 & io_din[1]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_635 = _T_630 | _T_634; // @[el2_ifu_compress_ctl.scala 51:46]
|
wire _T_635 = _T_630 | _T_634; // @[el2_ifu_compress_ctl.scala 55:46]
|
||||||
wire _T_641 = _T_190 & _T_4; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_641 = _T_190 & _T_4; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_642 = _T_641 & io_din[0]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_642 = _T_641 & io_din[0]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire rdrd = _T_635 | _T_642; // @[el2_ifu_compress_ctl.scala 51:65]
|
wire rdrd = _T_635 | _T_642; // @[el2_ifu_compress_ctl.scala 55:65]
|
||||||
wire _T_650 = _T_380 & io_din[1]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_650 = _T_380 & io_din[1]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_658 = _T_403 & io_din[1]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_658 = _T_403 & io_din[1]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_659 = _T_650 | _T_658; // @[el2_ifu_compress_ctl.scala 53:38]
|
wire _T_659 = _T_650 | _T_658; // @[el2_ifu_compress_ctl.scala 57:38]
|
||||||
wire _T_667 = _T_427 & io_din[1]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_667 = _T_427 & io_din[1]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_668 = _T_659 | _T_667; // @[el2_ifu_compress_ctl.scala 53:63]
|
wire _T_668 = _T_659 | _T_667; // @[el2_ifu_compress_ctl.scala 57:63]
|
||||||
wire _T_676 = _T_450 & io_din[1]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_676 = _T_450 & io_din[1]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_677 = _T_668 | _T_676; // @[el2_ifu_compress_ctl.scala 53:87]
|
wire _T_677 = _T_668 | _T_676; // @[el2_ifu_compress_ctl.scala 57:87]
|
||||||
wire _T_685 = _T_474 & io_din[1]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_685 = _T_474 & io_din[1]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_686 = _T_677 | _T_685; // @[el2_ifu_compress_ctl.scala 53:111]
|
wire _T_686 = _T_677 | _T_685; // @[el2_ifu_compress_ctl.scala 57:111]
|
||||||
wire _T_702 = _T_2 & _T_486; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_702 = _T_2 & _T_486; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_703 = _T_702 & _T_7; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_703 = _T_702 & _T_7; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_704 = _T_703 & _T_9; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_704 = _T_703 & _T_9; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_705 = _T_704 & _T_50; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_705 = _T_704 & _T_50; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_706 = _T_705 & _T_52; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_706 = _T_705 & _T_52; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_707 = _T_706 & _T_54; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_707 = _T_706 & _T_54; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_708 = _T_707 & io_din[1]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_708 = _T_707 & io_din[1]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_709 = _T_686 | _T_708; // @[el2_ifu_compress_ctl.scala 54:27]
|
wire _T_709 = _T_686 | _T_708; // @[el2_ifu_compress_ctl.scala 58:27]
|
||||||
wire _T_716 = _T_56 & io_din[6]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_716 = _T_56 & io_din[6]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_717 = _T_716 & io_din[1]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_717 = _T_716 & io_din[1]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_718 = _T_709 | _T_717; // @[el2_ifu_compress_ctl.scala 54:65]
|
wire _T_718 = _T_709 | _T_717; // @[el2_ifu_compress_ctl.scala 58:65]
|
||||||
wire _T_725 = _T_56 & io_din[5]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_725 = _T_56 & io_din[5]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_726 = _T_725 & io_din[1]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_726 = _T_725 & io_din[1]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_727 = _T_718 | _T_726; // @[el2_ifu_compress_ctl.scala 54:89]
|
wire _T_727 = _T_718 | _T_726; // @[el2_ifu_compress_ctl.scala 58:89]
|
||||||
wire _T_734 = _T_56 & io_din[4]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_734 = _T_56 & io_din[4]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_735 = _T_734 & io_din[1]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_735 = _T_734 & io_din[1]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_736 = _T_727 | _T_735; // @[el2_ifu_compress_ctl.scala 54:113]
|
wire _T_736 = _T_727 | _T_735; // @[el2_ifu_compress_ctl.scala 58:113]
|
||||||
wire _T_743 = _T_56 & io_din[3]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_743 = _T_56 & io_din[3]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_744 = _T_743 & io_din[1]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_744 = _T_743 & io_din[1]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_745 = _T_736 | _T_744; // @[el2_ifu_compress_ctl.scala 55:27]
|
wire _T_745 = _T_736 | _T_744; // @[el2_ifu_compress_ctl.scala 59:27]
|
||||||
wire _T_752 = _T_56 & io_din[2]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_752 = _T_56 & io_din[2]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_753 = _T_752 & io_din[1]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_753 = _T_752 & io_din[1]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_754 = _T_745 | _T_753; // @[el2_ifu_compress_ctl.scala 55:51]
|
wire _T_754 = _T_745 | _T_753; // @[el2_ifu_compress_ctl.scala 59:51]
|
||||||
wire _T_763 = _T_194 & _T_4; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_763 = _T_194 & _T_4; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_764 = _T_763 & io_din[0]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_764 = _T_763 & io_din[0]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire rdrs1 = _T_754 | _T_764; // @[el2_ifu_compress_ctl.scala 55:75]
|
wire rdrs1 = _T_754 | _T_764; // @[el2_ifu_compress_ctl.scala 59:75]
|
||||||
wire _T_768 = io_din[15] & io_din[6]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_768 = io_din[15] & io_din[6]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_769 = _T_768 & io_din[1]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_769 = _T_768 & io_din[1]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_773 = io_din[15] & io_din[5]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_773 = io_din[15] & io_din[5]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_774 = _T_773 & io_din[1]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_774 = _T_773 & io_din[1]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_775 = _T_769 | _T_774; // @[el2_ifu_compress_ctl.scala 57:34]
|
wire _T_775 = _T_769 | _T_774; // @[el2_ifu_compress_ctl.scala 61:34]
|
||||||
wire _T_779 = io_din[15] & io_din[4]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_779 = io_din[15] & io_din[4]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_780 = _T_779 & io_din[1]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_780 = _T_779 & io_din[1]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_781 = _T_775 | _T_780; // @[el2_ifu_compress_ctl.scala 57:54]
|
wire _T_781 = _T_775 | _T_780; // @[el2_ifu_compress_ctl.scala 61:54]
|
||||||
wire _T_785 = io_din[15] & io_din[3]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_785 = io_din[15] & io_din[3]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_786 = _T_785 & io_din[1]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_786 = _T_785 & io_din[1]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_787 = _T_781 | _T_786; // @[el2_ifu_compress_ctl.scala 57:74]
|
wire _T_787 = _T_781 | _T_786; // @[el2_ifu_compress_ctl.scala 61:74]
|
||||||
wire _T_791 = io_din[15] & io_din[2]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_791 = io_din[15] & io_din[2]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_792 = _T_791 & io_din[1]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_792 = _T_791 & io_din[1]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_793 = _T_787 | _T_792; // @[el2_ifu_compress_ctl.scala 57:94]
|
wire _T_793 = _T_787 | _T_792; // @[el2_ifu_compress_ctl.scala 61:94]
|
||||||
wire _T_798 = _T_200 & io_din[1]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_798 = _T_200 & io_din[1]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire rs2rs2 = _T_793 | _T_798; // @[el2_ifu_compress_ctl.scala 57:114]
|
wire rs2rs2 = _T_793 | _T_798; // @[el2_ifu_compress_ctl.scala 61:114]
|
||||||
wire rdprd = _T_12 & io_din[0]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire rdprd = _T_12 & io_din[0]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_811 = io_din[15] & _T_4; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_811 = io_din[15] & _T_4; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_812 = _T_811 & io_din[0]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_812 = _T_811 & io_din[0]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_818 = _T_812 | _T_234; // @[el2_ifu_compress_ctl.scala 61:36]
|
wire _T_818 = _T_812 | _T_234; // @[el2_ifu_compress_ctl.scala 65:36]
|
||||||
wire _T_821 = ~io_din[1]; // @[el2_ifu_compress_ctl.scala 15:83]
|
wire _T_821 = ~io_din[1]; // @[el2_ifu_compress_ctl.scala 19:83]
|
||||||
wire _T_822 = io_din[14] & _T_821; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_822 = io_din[14] & _T_821; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_825 = _T_822 & _T_147; // @[el2_ifu_compress_ctl.scala 61:76]
|
wire _T_825 = _T_822 & _T_147; // @[el2_ifu_compress_ctl.scala 65:76]
|
||||||
wire rdprs1 = _T_818 | _T_825; // @[el2_ifu_compress_ctl.scala 61:57]
|
wire rdprs1 = _T_818 | _T_825; // @[el2_ifu_compress_ctl.scala 65:57]
|
||||||
wire _T_837 = _T_128 & io_din[10]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_837 = _T_128 & io_din[10]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_838 = _T_837 & io_din[0]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_838 = _T_837 & io_din[0]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_842 = io_din[15] & _T_821; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_842 = io_din[15] & _T_821; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_845 = _T_842 & _T_147; // @[el2_ifu_compress_ctl.scala 63:66]
|
wire _T_845 = _T_842 & _T_147; // @[el2_ifu_compress_ctl.scala 67:66]
|
||||||
wire rs2prs2 = _T_838 | _T_845; // @[el2_ifu_compress_ctl.scala 63:47]
|
wire rs2prs2 = _T_838 | _T_845; // @[el2_ifu_compress_ctl.scala 67:47]
|
||||||
wire _T_850 = _T_190 & _T_821; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_850 = _T_190 & _T_821; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire rs2prd = _T_850 & _T_147; // @[el2_ifu_compress_ctl.scala 64:33]
|
wire rs2prd = _T_850 & _T_147; // @[el2_ifu_compress_ctl.scala 68:33]
|
||||||
wire _T_857 = _T_2 & _T_821; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_857 = _T_2 & _T_821; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire uimm9_2 = _T_857 & _T_147; // @[el2_ifu_compress_ctl.scala 65:34]
|
wire uimm9_2 = _T_857 & _T_147; // @[el2_ifu_compress_ctl.scala 69:34]
|
||||||
wire _T_866 = _T_317 & _T_821; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_866 = _T_317 & _T_821; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire ulwimm6_2 = _T_866 & _T_147; // @[el2_ifu_compress_ctl.scala 66:39]
|
wire ulwimm6_2 = _T_866 & _T_147; // @[el2_ifu_compress_ctl.scala 70:39]
|
||||||
wire ulwspimm7_2 = _T_317 & io_din[1]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire ulwspimm7_2 = _T_317 & io_din[1]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_888 = _T_317 & io_din[13]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_888 = _T_317 & io_din[13]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_889 = _T_888 & _T_23; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_889 = _T_888 & _T_23; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_890 = _T_889 & _T_38; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_890 = _T_889 & _T_38; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_891 = _T_890 & _T_40; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_891 = _T_890 & _T_40; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_892 = _T_891 & io_din[8]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_892 = _T_891 & io_din[8]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire rdeq2 = _T_892 & _T_44; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire rdeq2 = _T_892 & _T_44; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_981 = _T_450 & _T_7; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_981 = _T_450 & _T_7; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_982 = _T_981 & _T_9; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_982 = _T_981 & _T_9; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_983 = _T_982 & _T_50; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_983 = _T_982 & _T_50; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_984 = _T_983 & _T_52; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_984 = _T_983 & _T_52; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_985 = _T_984 & _T_54; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_985 = _T_984 & _T_54; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_986 = _T_985 & io_din[1]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_986 = _T_985 & io_din[1]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_987 = _T_434 | _T_986; // @[el2_ifu_compress_ctl.scala 70:42]
|
wire _T_987 = _T_434 | _T_986; // @[el2_ifu_compress_ctl.scala 74:42]
|
||||||
wire _T_1011 = _T_987 | _T_480; // @[el2_ifu_compress_ctl.scala 70:81]
|
wire _T_1011 = _T_987 | _T_480; // @[el2_ifu_compress_ctl.scala 74:81]
|
||||||
wire _T_1018 = _T_194 & io_din[13]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1018 = _T_194 & io_din[13]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire rdeq1 = _T_1011 | _T_1018; // @[el2_ifu_compress_ctl.scala 71:42]
|
wire rdeq1 = _T_1011 | _T_1018; // @[el2_ifu_compress_ctl.scala 75:42]
|
||||||
wire _T_1041 = io_din[14] & io_din[1]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1041 = io_din[14] & io_din[1]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1042 = rdeq2 | _T_1041; // @[el2_ifu_compress_ctl.scala 72:53]
|
wire _T_1042 = rdeq2 | _T_1041; // @[el2_ifu_compress_ctl.scala 76:53]
|
||||||
wire rs1eq2 = _T_1042 | uimm9_2; // @[el2_ifu_compress_ctl.scala 72:71]
|
wire rs1eq2 = _T_1042 | uimm9_2; // @[el2_ifu_compress_ctl.scala 76:71]
|
||||||
wire _T_1083 = _T_357 & io_din[11]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1083 = _T_357 & io_din[11]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1084 = _T_1083 & _T_38; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1084 = _T_1083 & _T_38; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1085 = _T_1084 & io_din[0]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1085 = _T_1084 & io_din[0]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire simm5_0 = _T_1085 | _T_642; // @[el2_ifu_compress_ctl.scala 75:45]
|
wire simm5_0 = _T_1085 | _T_642; // @[el2_ifu_compress_ctl.scala 79:45]
|
||||||
wire _T_1103 = _T_888 & io_din[7]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1103 = _T_888 & io_din[7]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1112 = _T_888 & _T_42; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1112 = _T_888 & _T_42; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1113 = _T_1103 | _T_1112; // @[el2_ifu_compress_ctl.scala 77:44]
|
wire _T_1113 = _T_1103 | _T_1112; // @[el2_ifu_compress_ctl.scala 81:44]
|
||||||
wire _T_1121 = _T_888 & io_din[9]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1121 = _T_888 & io_din[9]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1122 = _T_1113 | _T_1121; // @[el2_ifu_compress_ctl.scala 77:70]
|
wire _T_1122 = _T_1113 | _T_1121; // @[el2_ifu_compress_ctl.scala 81:70]
|
||||||
wire _T_1130 = _T_888 & io_din[10]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1130 = _T_888 & io_din[10]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1131 = _T_1122 | _T_1130; // @[el2_ifu_compress_ctl.scala 77:95]
|
wire _T_1131 = _T_1122 | _T_1130; // @[el2_ifu_compress_ctl.scala 81:95]
|
||||||
wire _T_1139 = _T_888 & io_din[11]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1139 = _T_888 & io_din[11]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire sluimm17_12 = _T_1131 | _T_1139; // @[el2_ifu_compress_ctl.scala 78:29]
|
wire sluimm17_12 = _T_1131 | _T_1139; // @[el2_ifu_compress_ctl.scala 82:29]
|
||||||
wire uimm5_0 = _T_79 | _T_195; // @[el2_ifu_compress_ctl.scala 79:45]
|
wire uimm5_0 = _T_79 | _T_195; // @[el2_ifu_compress_ctl.scala 83:45]
|
||||||
wire [4:0] _T_1185 = rdrd ? rdd : 5'h0; // @[Mux.scala 27:72]
|
wire [4:0] _T_1185 = rdrd ? rdd : 5'h0; // @[Mux.scala 27:72]
|
||||||
wire [4:0] _T_1186 = rdprd ? rdpd : 5'h0; // @[Mux.scala 27:72]
|
wire [4:0] _T_1186 = rdprd ? rdpd : 5'h0; // @[Mux.scala 27:72]
|
||||||
wire [4:0] _T_1187 = rs2prd ? rs2pd : 5'h0; // @[Mux.scala 27:72]
|
wire [4:0] _T_1187 = rs2prd ? rs2pd : 5'h0; // @[Mux.scala 27:72]
|
||||||
|
|
@ -334,12 +338,13 @@ module el2_ifu_compress_ctl(
|
||||||
wire [4:0] _T_1206 = rs1eq2 ? 5'h2 : 5'h0; // @[Mux.scala 27:72]
|
wire [4:0] _T_1206 = rs1eq2 ? 5'h2 : 5'h0; // @[Mux.scala 27:72]
|
||||||
wire [4:0] _T_1207 = _T_1204 | _T_1205; // @[Mux.scala 27:72]
|
wire [4:0] _T_1207 = _T_1204 | _T_1205; // @[Mux.scala 27:72]
|
||||||
wire [4:0] l1_19 = _T_1207 | _T_1206; // @[Mux.scala 27:72]
|
wire [4:0] l1_19 = _T_1207 | _T_1206; // @[Mux.scala 27:72]
|
||||||
wire [4:0] _T_1214 = {out_20,1'h0,1'h0,2'h0}; // @[el2_ifu_compress_ctl.scala 90:64]
|
wire [4:0] _T_1214 = {out_20,1'h0,1'h0,2'h0}; // @[el2_ifu_compress_ctl.scala 94:64]
|
||||||
wire [4:0] _T_1217 = rs2rs2 ? rs2d : 5'h0; // @[Mux.scala 27:72]
|
wire [4:0] _T_1217 = rs2rs2 ? rs2d : 5'h0; // @[Mux.scala 27:72]
|
||||||
wire [4:0] _T_1218 = rs2prs2 ? rs2pd : 5'h0; // @[Mux.scala 27:72]
|
wire [4:0] _T_1218 = rs2prs2 ? rs2pd : 5'h0; // @[Mux.scala 27:72]
|
||||||
wire [4:0] _T_1219 = _T_1217 | _T_1218; // @[Mux.scala 27:72]
|
wire [4:0] _T_1219 = _T_1217 | _T_1218; // @[Mux.scala 27:72]
|
||||||
wire [4:0] l1_24 = _T_1214 | _T_1219; // @[el2_ifu_compress_ctl.scala 90:71]
|
wire [4:0] l1_24 = _T_1214 | _T_1219; // @[el2_ifu_compress_ctl.scala 94:71]
|
||||||
wire [14:0] _T_1228 = {out_14,out_13,out_12,l1_11,2'h3,out_2,_T_228,out_4,out_5,out_6}; // @[Cat.scala 29:58]
|
wire [14:0] _T_1228 = {out_14,out_13,out_12,l1_11,2'h3,out_2,_T_228,out_4,out_5,out_6}; // @[Cat.scala 29:58]
|
||||||
|
wire [16:0] _T_1230 = {4'h0,1'h0,out_30,1'h0,l1_24,l1_19}; // @[Cat.scala 29:58]
|
||||||
wire [31:0] l1 = {4'h0,1'h0,out_30,1'h0,l1_24,l1_19,_T_1228}; // @[Cat.scala 29:58]
|
wire [31:0] l1 = {4'h0,1'h0,out_30,1'h0,l1_24,l1_19,_T_1228}; // @[Cat.scala 29:58]
|
||||||
wire [5:0] simm5d = {io_din[12],rs2d}; // @[Cat.scala 29:58]
|
wire [5:0] simm5d = {io_din[12],rs2d}; // @[Cat.scala 29:58]
|
||||||
wire [5:0] simm9d = {io_din[12],io_din[4:3],io_din[5],io_din[2],io_din[6]}; // @[Cat.scala 29:58]
|
wire [5:0] simm9d = {io_din[12],io_din[4:3],io_din[5],io_din[2],io_din[6]}; // @[Cat.scala 29:58]
|
||||||
|
|
@ -371,13 +376,13 @@ module el2_ifu_compress_ctl(
|
||||||
wire [11:0] _T_1322 = _T_1321 | _T_1315; // @[Mux.scala 27:72]
|
wire [11:0] _T_1322 = _T_1321 | _T_1315; // @[Mux.scala 27:72]
|
||||||
wire [11:0] _T_1323 = _T_1322 | _T_1316; // @[Mux.scala 27:72]
|
wire [11:0] _T_1323 = _T_1322 | _T_1316; // @[Mux.scala 27:72]
|
||||||
wire [11:0] _T_1324 = _T_1323 | _T_1317; // @[Mux.scala 27:72]
|
wire [11:0] _T_1324 = _T_1323 | _T_1317; // @[Mux.scala 27:72]
|
||||||
wire [11:0] l2_31 = l1[31:20] | _T_1324; // @[el2_ifu_compress_ctl.scala 106:25]
|
wire [11:0] l2_31 = l1[31:20] | _T_1324; // @[el2_ifu_compress_ctl.scala 110:25]
|
||||||
wire [8:0] _T_1331 = _T_228 ? sjald[19:11] : 9'h0; // @[Mux.scala 27:72]
|
wire [8:0] _T_1331 = _T_228 ? sjald[19:11] : 9'h0; // @[Mux.scala 27:72]
|
||||||
wire [7:0] _T_1332 = sluimm17_12 ? sluimmd[7:0] : 8'h0; // @[Mux.scala 27:72]
|
wire [7:0] _T_1332 = sluimm17_12 ? sluimmd[7:0] : 8'h0; // @[Mux.scala 27:72]
|
||||||
wire [8:0] _GEN_0 = {{1'd0}, _T_1332}; // @[Mux.scala 27:72]
|
wire [8:0] _GEN_0 = {{1'd0}, _T_1332}; // @[Mux.scala 27:72]
|
||||||
wire [8:0] _T_1333 = _T_1331 | _GEN_0; // @[Mux.scala 27:72]
|
wire [8:0] _T_1333 = _T_1331 | _GEN_0; // @[Mux.scala 27:72]
|
||||||
wire [8:0] _GEN_1 = {{1'd0}, l1[19:12]}; // @[el2_ifu_compress_ctl.scala 116:25]
|
wire [8:0] _GEN_1 = {{1'd0}, l1[19:12]}; // @[el2_ifu_compress_ctl.scala 120:25]
|
||||||
wire [8:0] l2_19 = _GEN_1 | _T_1333; // @[el2_ifu_compress_ctl.scala 116:25]
|
wire [8:0] l2_19 = _GEN_1 | _T_1333; // @[el2_ifu_compress_ctl.scala 120:25]
|
||||||
wire [32:0] l2 = {l2_31,l2_19,l1[11:0]}; // @[Cat.scala 29:58]
|
wire [32:0] l2 = {l2_31,l2_19,l1[11:0]}; // @[Cat.scala 29:58]
|
||||||
wire [8:0] sbr8d = {io_din[12],io_din[6],io_din[5],io_din[2],io_din[11],io_din[10],io_din[4],io_din[3],1'h0}; // @[Cat.scala 29:58]
|
wire [8:0] sbr8d = {io_din[12],io_din[6],io_din[5],io_din[2],io_din[11],io_din[10],io_din[4],io_din[3],1'h0}; // @[Cat.scala 29:58]
|
||||||
wire [6:0] uswimm6d = {io_din[5],io_din[12:10],io_din[6],2'h0}; // @[Cat.scala 29:58]
|
wire [6:0] uswimm6d = {io_din[5],io_din[12:10],io_din[6],2'h0}; // @[Cat.scala 29:58]
|
||||||
|
|
@ -391,129 +396,135 @@ module el2_ifu_compress_ctl(
|
||||||
wire [6:0] _T_1375 = _T_798 ? _T_1372 : 7'h0; // @[Mux.scala 27:72]
|
wire [6:0] _T_1375 = _T_798 ? _T_1372 : 7'h0; // @[Mux.scala 27:72]
|
||||||
wire [6:0] _T_1376 = _T_1373 | _T_1374; // @[Mux.scala 27:72]
|
wire [6:0] _T_1376 = _T_1373 | _T_1374; // @[Mux.scala 27:72]
|
||||||
wire [6:0] _T_1377 = _T_1376 | _T_1375; // @[Mux.scala 27:72]
|
wire [6:0] _T_1377 = _T_1376 | _T_1375; // @[Mux.scala 27:72]
|
||||||
wire [6:0] l3_31 = l2[31:25] | _T_1377; // @[el2_ifu_compress_ctl.scala 122:25]
|
wire [6:0] l3_31 = l2[31:25] | _T_1377; // @[el2_ifu_compress_ctl.scala 126:25]
|
||||||
wire [12:0] l3_24 = l2[24:12]; // @[el2_ifu_compress_ctl.scala 125:17]
|
wire [12:0] l3_24 = l2[24:12]; // @[el2_ifu_compress_ctl.scala 129:17]
|
||||||
wire [4:0] _T_1383 = {sbr8d[4:1],sbr8d[8]}; // @[Cat.scala 29:58]
|
wire [4:0] _T_1383 = {sbr8d[4:1],sbr8d[8]}; // @[Cat.scala 29:58]
|
||||||
wire [4:0] _T_1388 = _T_234 ? _T_1383 : 5'h0; // @[Mux.scala 27:72]
|
wire [4:0] _T_1388 = _T_234 ? _T_1383 : 5'h0; // @[Mux.scala 27:72]
|
||||||
wire [4:0] _T_1389 = _T_845 ? uswimm6d[4:0] : 5'h0; // @[Mux.scala 27:72]
|
wire [4:0] _T_1389 = _T_845 ? uswimm6d[4:0] : 5'h0; // @[Mux.scala 27:72]
|
||||||
wire [4:0] _T_1390 = _T_798 ? uswspimm7d[4:0] : 5'h0; // @[Mux.scala 27:72]
|
wire [4:0] _T_1390 = _T_798 ? uswspimm7d[4:0] : 5'h0; // @[Mux.scala 27:72]
|
||||||
wire [4:0] _T_1391 = _T_1388 | _T_1389; // @[Mux.scala 27:72]
|
wire [4:0] _T_1391 = _T_1388 | _T_1389; // @[Mux.scala 27:72]
|
||||||
wire [4:0] _T_1392 = _T_1391 | _T_1390; // @[Mux.scala 27:72]
|
wire [4:0] _T_1392 = _T_1391 | _T_1390; // @[Mux.scala 27:72]
|
||||||
wire [4:0] l3_11 = l2[11:7] | _T_1392; // @[el2_ifu_compress_ctl.scala 126:24]
|
wire [4:0] l3_11 = l2[11:7] | _T_1392; // @[el2_ifu_compress_ctl.scala 130:24]
|
||||||
|
wire [11:0] _T_1395 = {l3_11,l2[6:0]}; // @[Cat.scala 29:58]
|
||||||
|
wire [19:0] _T_1396 = {l3_31,l3_24}; // @[Cat.scala 29:58]
|
||||||
wire [31:0] l3 = {l3_31,l3_24,l3_11,l2[6:0]}; // @[Cat.scala 29:58]
|
wire [31:0] l3 = {l3_31,l3_24,l3_11,l2[6:0]}; // @[Cat.scala 29:58]
|
||||||
wire _T_1403 = _T_4 & _T_486; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1403 = _T_4 & _T_486; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1404 = _T_1403 & io_din[11]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1404 = _T_1403 & io_din[11]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1405 = _T_1404 & io_din[1]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1405 = _T_1404 & io_din[1]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1408 = _T_1405 & _T_147; // @[el2_ifu_compress_ctl.scala 131:39]
|
wire _T_1408 = _T_1405 & _T_147; // @[el2_ifu_compress_ctl.scala 135:39]
|
||||||
wire _T_1416 = _T_1403 & io_din[6]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1416 = _T_1403 & io_din[6]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1417 = _T_1416 & io_din[1]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1417 = _T_1416 & io_din[1]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1420 = _T_1417 & _T_147; // @[el2_ifu_compress_ctl.scala 131:79]
|
wire _T_1420 = _T_1417 & _T_147; // @[el2_ifu_compress_ctl.scala 135:79]
|
||||||
wire _T_1421 = _T_1408 | _T_1420; // @[el2_ifu_compress_ctl.scala 131:54]
|
wire _T_1421 = _T_1408 | _T_1420; // @[el2_ifu_compress_ctl.scala 135:54]
|
||||||
wire _T_1430 = _T_641 & io_din[11]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1430 = _T_641 & io_din[11]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1431 = _T_1430 & _T_821; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1431 = _T_1430 & _T_821; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1432 = _T_1421 | _T_1431; // @[el2_ifu_compress_ctl.scala 131:94]
|
wire _T_1432 = _T_1421 | _T_1431; // @[el2_ifu_compress_ctl.scala 135:94]
|
||||||
wire _T_1440 = _T_1403 & io_din[5]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1440 = _T_1403 & io_din[5]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1441 = _T_1440 & io_din[1]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1441 = _T_1440 & io_din[1]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1444 = _T_1441 & _T_147; // @[el2_ifu_compress_ctl.scala 132:55]
|
wire _T_1444 = _T_1441 & _T_147; // @[el2_ifu_compress_ctl.scala 136:55]
|
||||||
wire _T_1445 = _T_1432 | _T_1444; // @[el2_ifu_compress_ctl.scala 132:30]
|
wire _T_1445 = _T_1432 | _T_1444; // @[el2_ifu_compress_ctl.scala 136:30]
|
||||||
wire _T_1453 = _T_1403 & io_din[10]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1453 = _T_1403 & io_din[10]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1454 = _T_1453 & io_din[1]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1454 = _T_1453 & io_din[1]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1457 = _T_1454 & _T_147; // @[el2_ifu_compress_ctl.scala 132:96]
|
wire _T_1457 = _T_1454 & _T_147; // @[el2_ifu_compress_ctl.scala 136:96]
|
||||||
wire _T_1458 = _T_1445 | _T_1457; // @[el2_ifu_compress_ctl.scala 132:70]
|
wire _T_1458 = _T_1445 | _T_1457; // @[el2_ifu_compress_ctl.scala 136:70]
|
||||||
wire _T_1467 = _T_641 & io_din[6]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1467 = _T_641 & io_din[6]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1468 = _T_1467 & _T_821; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1468 = _T_1467 & _T_821; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1469 = _T_1458 | _T_1468; // @[el2_ifu_compress_ctl.scala 132:111]
|
wire _T_1469 = _T_1458 | _T_1468; // @[el2_ifu_compress_ctl.scala 136:111]
|
||||||
wire _T_1476 = io_din[15] & _T_486; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1476 = io_din[15] & _T_486; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1477 = _T_1476 & _T_821; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1477 = _T_1476 & _T_821; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1478 = _T_1477 & io_din[0]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1478 = _T_1477 & io_din[0]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1479 = _T_1469 | _T_1478; // @[el2_ifu_compress_ctl.scala 133:29]
|
wire _T_1479 = _T_1469 | _T_1478; // @[el2_ifu_compress_ctl.scala 137:29]
|
||||||
wire _T_1487 = _T_1403 & io_din[9]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1487 = _T_1403 & io_din[9]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1488 = _T_1487 & io_din[1]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1488 = _T_1487 & io_din[1]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1491 = _T_1488 & _T_147; // @[el2_ifu_compress_ctl.scala 133:79]
|
wire _T_1491 = _T_1488 & _T_147; // @[el2_ifu_compress_ctl.scala 137:79]
|
||||||
wire _T_1492 = _T_1479 | _T_1491; // @[el2_ifu_compress_ctl.scala 133:54]
|
wire _T_1492 = _T_1479 | _T_1491; // @[el2_ifu_compress_ctl.scala 137:54]
|
||||||
wire _T_1499 = _T_486 & io_din[6]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1499 = _T_486 & io_din[6]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1500 = _T_1499 & _T_821; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1500 = _T_1499 & _T_821; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1501 = _T_1500 & io_din[0]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1501 = _T_1500 & io_din[0]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1502 = _T_1492 | _T_1501; // @[el2_ifu_compress_ctl.scala 133:94]
|
wire _T_1502 = _T_1492 | _T_1501; // @[el2_ifu_compress_ctl.scala 137:94]
|
||||||
wire _T_1511 = _T_641 & io_din[5]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1511 = _T_641 & io_din[5]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1512 = _T_1511 & _T_821; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1512 = _T_1511 & _T_821; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1513 = _T_1502 | _T_1512; // @[el2_ifu_compress_ctl.scala 133:118]
|
wire _T_1513 = _T_1502 | _T_1512; // @[el2_ifu_compress_ctl.scala 137:118]
|
||||||
wire _T_1521 = _T_1403 & io_din[8]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1521 = _T_1403 & io_din[8]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1522 = _T_1521 & io_din[1]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1522 = _T_1521 & io_din[1]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1525 = _T_1522 & _T_147; // @[el2_ifu_compress_ctl.scala 134:28]
|
wire _T_1525 = _T_1522 & _T_147; // @[el2_ifu_compress_ctl.scala 138:28]
|
||||||
wire _T_1526 = _T_1513 | _T_1525; // @[el2_ifu_compress_ctl.scala 133:144]
|
wire _T_1526 = _T_1513 | _T_1525; // @[el2_ifu_compress_ctl.scala 137:144]
|
||||||
wire _T_1533 = _T_486 & io_din[5]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1533 = _T_486 & io_din[5]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1534 = _T_1533 & _T_821; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1534 = _T_1533 & _T_821; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1535 = _T_1534 & io_din[0]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1535 = _T_1534 & io_din[0]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1536 = _T_1526 | _T_1535; // @[el2_ifu_compress_ctl.scala 134:43]
|
wire _T_1536 = _T_1526 | _T_1535; // @[el2_ifu_compress_ctl.scala 138:43]
|
||||||
wire _T_1545 = _T_641 & io_din[10]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1545 = _T_641 & io_din[10]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1546 = _T_1545 & _T_821; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1546 = _T_1545 & _T_821; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1547 = _T_1536 | _T_1546; // @[el2_ifu_compress_ctl.scala 134:67]
|
wire _T_1547 = _T_1536 | _T_1546; // @[el2_ifu_compress_ctl.scala 138:67]
|
||||||
wire _T_1555 = _T_1403 & io_din[7]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1555 = _T_1403 & io_din[7]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1556 = _T_1555 & io_din[1]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1556 = _T_1555 & io_din[1]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1559 = _T_1556 & _T_147; // @[el2_ifu_compress_ctl.scala 135:28]
|
wire _T_1559 = _T_1556 & _T_147; // @[el2_ifu_compress_ctl.scala 139:28]
|
||||||
wire _T_1560 = _T_1547 | _T_1559; // @[el2_ifu_compress_ctl.scala 134:94]
|
wire _T_1560 = _T_1547 | _T_1559; // @[el2_ifu_compress_ctl.scala 138:94]
|
||||||
wire _T_1568 = io_din[12] & io_din[11]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1568 = io_din[12] & io_din[11]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1569 = _T_1568 & _T_38; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1569 = _T_1568 & _T_38; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1570 = _T_1569 & _T_821; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1570 = _T_1569 & _T_821; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1571 = _T_1570 & io_din[0]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1571 = _T_1570 & io_din[0]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1572 = _T_1560 | _T_1571; // @[el2_ifu_compress_ctl.scala 135:43]
|
wire _T_1572 = _T_1560 | _T_1571; // @[el2_ifu_compress_ctl.scala 139:43]
|
||||||
wire _T_1581 = _T_641 & io_din[9]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1581 = _T_641 & io_din[9]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1582 = _T_1581 & _T_821; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1582 = _T_1581 & _T_821; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1583 = _T_1572 | _T_1582; // @[el2_ifu_compress_ctl.scala 135:71]
|
wire _T_1583 = _T_1572 | _T_1582; // @[el2_ifu_compress_ctl.scala 139:71]
|
||||||
wire _T_1591 = _T_1403 & io_din[4]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1591 = _T_1403 & io_din[4]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1592 = _T_1591 & io_din[1]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1592 = _T_1591 & io_din[1]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1595 = _T_1592 & _T_147; // @[el2_ifu_compress_ctl.scala 136:28]
|
wire _T_1595 = _T_1592 & _T_147; // @[el2_ifu_compress_ctl.scala 140:28]
|
||||||
wire _T_1596 = _T_1583 | _T_1595; // @[el2_ifu_compress_ctl.scala 135:97]
|
wire _T_1596 = _T_1583 | _T_1595; // @[el2_ifu_compress_ctl.scala 139:97]
|
||||||
wire _T_1602 = io_din[13] & io_din[12]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1602 = io_din[13] & io_din[12]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1603 = _T_1602 & _T_821; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1603 = _T_1602 & _T_821; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1604 = _T_1603 & io_din[0]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1604 = _T_1603 & io_din[0]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1605 = _T_1596 | _T_1604; // @[el2_ifu_compress_ctl.scala 136:43]
|
wire _T_1605 = _T_1596 | _T_1604; // @[el2_ifu_compress_ctl.scala 140:43]
|
||||||
wire _T_1614 = _T_641 & io_din[8]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1614 = _T_641 & io_din[8]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1615 = _T_1614 & _T_821; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1615 = _T_1614 & _T_821; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1616 = _T_1605 | _T_1615; // @[el2_ifu_compress_ctl.scala 136:67]
|
wire _T_1616 = _T_1605 | _T_1615; // @[el2_ifu_compress_ctl.scala 140:67]
|
||||||
wire _T_1624 = _T_1403 & io_din[3]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1624 = _T_1403 & io_din[3]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1625 = _T_1624 & io_din[1]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1625 = _T_1624 & io_din[1]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1628 = _T_1625 & _T_147; // @[el2_ifu_compress_ctl.scala 137:28]
|
wire _T_1628 = _T_1625 & _T_147; // @[el2_ifu_compress_ctl.scala 141:28]
|
||||||
wire _T_1629 = _T_1616 | _T_1628; // @[el2_ifu_compress_ctl.scala 136:93]
|
wire _T_1629 = _T_1616 | _T_1628; // @[el2_ifu_compress_ctl.scala 140:93]
|
||||||
wire _T_1635 = io_din[13] & io_din[4]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1635 = io_din[13] & io_din[4]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1636 = _T_1635 & _T_821; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1636 = _T_1635 & _T_821; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1637 = _T_1636 & io_din[0]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1637 = _T_1636 & io_din[0]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1638 = _T_1629 | _T_1637; // @[el2_ifu_compress_ctl.scala 137:43]
|
wire _T_1638 = _T_1629 | _T_1637; // @[el2_ifu_compress_ctl.scala 141:43]
|
||||||
wire _T_1646 = _T_1403 & io_din[2]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1646 = _T_1403 & io_din[2]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1647 = _T_1646 & io_din[1]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1647 = _T_1646 & io_din[1]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1650 = _T_1647 & _T_147; // @[el2_ifu_compress_ctl.scala 137:91]
|
wire _T_1650 = _T_1647 & _T_147; // @[el2_ifu_compress_ctl.scala 141:91]
|
||||||
wire _T_1651 = _T_1638 | _T_1650; // @[el2_ifu_compress_ctl.scala 137:66]
|
wire _T_1651 = _T_1638 | _T_1650; // @[el2_ifu_compress_ctl.scala 141:66]
|
||||||
wire _T_1660 = _T_641 & io_din[7]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1660 = _T_641 & io_din[7]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1661 = _T_1660 & _T_821; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1661 = _T_1660 & _T_821; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1662 = _T_1651 | _T_1661; // @[el2_ifu_compress_ctl.scala 137:106]
|
wire _T_1662 = _T_1651 | _T_1661; // @[el2_ifu_compress_ctl.scala 141:106]
|
||||||
wire _T_1668 = io_din[13] & io_din[3]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1668 = io_din[13] & io_din[3]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1669 = _T_1668 & _T_821; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1669 = _T_1668 & _T_821; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1670 = _T_1669 & io_din[0]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1670 = _T_1669 & io_din[0]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1671 = _T_1662 | _T_1670; // @[el2_ifu_compress_ctl.scala 138:29]
|
wire _T_1671 = _T_1662 | _T_1670; // @[el2_ifu_compress_ctl.scala 142:29]
|
||||||
wire _T_1677 = io_din[13] & io_din[2]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1677 = io_din[13] & io_din[2]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1678 = _T_1677 & _T_821; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1678 = _T_1677 & _T_821; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1679 = _T_1678 & io_din[0]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1679 = _T_1678 & io_din[0]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1680 = _T_1671 | _T_1679; // @[el2_ifu_compress_ctl.scala 138:52]
|
wire _T_1680 = _T_1671 | _T_1679; // @[el2_ifu_compress_ctl.scala 142:52]
|
||||||
wire _T_1686 = io_din[14] & _T_4; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1686 = io_din[14] & _T_4; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1687 = _T_1686 & _T_821; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1687 = _T_1686 & _T_821; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1688 = _T_1680 | _T_1687; // @[el2_ifu_compress_ctl.scala 138:75]
|
wire _T_1688 = _T_1680 | _T_1687; // @[el2_ifu_compress_ctl.scala 142:75]
|
||||||
wire _T_1697 = _T_702 & _T_821; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1697 = _T_702 & _T_821; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1698 = _T_1697 & io_din[0]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1698 = _T_1697 & io_din[0]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1699 = _T_1688 | _T_1698; // @[el2_ifu_compress_ctl.scala 138:98]
|
wire _T_1699 = _T_1688 | _T_1698; // @[el2_ifu_compress_ctl.scala 142:98]
|
||||||
wire _T_1706 = _T_811 & io_din[12]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1706 = _T_811 & io_din[12]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1707 = _T_1706 & io_din[1]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1707 = _T_1706 & io_din[1]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1710 = _T_1707 & _T_147; // @[el2_ifu_compress_ctl.scala 139:54]
|
wire _T_1710 = _T_1707 & _T_147; // @[el2_ifu_compress_ctl.scala 143:54]
|
||||||
wire _T_1711 = _T_1699 | _T_1710; // @[el2_ifu_compress_ctl.scala 139:29]
|
wire _T_1711 = _T_1699 | _T_1710; // @[el2_ifu_compress_ctl.scala 143:29]
|
||||||
wire _T_1720 = _T_641 & _T_486; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1720 = _T_641 & _T_486; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1721 = _T_1720 & io_din[1]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1721 = _T_1720 & io_din[1]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1724 = _T_1721 & _T_147; // @[el2_ifu_compress_ctl.scala 139:96]
|
wire _T_1724 = _T_1721 & _T_147; // @[el2_ifu_compress_ctl.scala 143:96]
|
||||||
wire _T_1725 = _T_1711 | _T_1724; // @[el2_ifu_compress_ctl.scala 139:69]
|
wire _T_1725 = _T_1711 | _T_1724; // @[el2_ifu_compress_ctl.scala 143:69]
|
||||||
wire _T_1734 = _T_641 & io_din[12]; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1734 = _T_641 & io_din[12]; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1735 = _T_1734 & _T_821; // @[el2_ifu_compress_ctl.scala 15:110]
|
wire _T_1735 = _T_1734 & _T_821; // @[el2_ifu_compress_ctl.scala 19:110]
|
||||||
wire _T_1736 = _T_1725 | _T_1735; // @[el2_ifu_compress_ctl.scala 139:111]
|
wire _T_1736 = _T_1725 | _T_1735; // @[el2_ifu_compress_ctl.scala 143:111]
|
||||||
wire _T_1743 = _T_1686 & _T_147; // @[el2_ifu_compress_ctl.scala 140:50]
|
wire _T_1743 = _T_1686 & _T_147; // @[el2_ifu_compress_ctl.scala 144:50]
|
||||||
wire legal = _T_1736 | _T_1743; // @[el2_ifu_compress_ctl.scala 140:30]
|
wire legal = _T_1736 | _T_1743; // @[el2_ifu_compress_ctl.scala 144:30]
|
||||||
wire [31:0] _T_1745 = legal ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12]
|
wire [31:0] _T_1745 = legal ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12]
|
||||||
assign io_dout = l3 & _T_1745; // @[el2_ifu_compress_ctl.scala 142:10]
|
assign io_dout = l3 & _T_1745; // @[el2_ifu_compress_ctl.scala 146:10]
|
||||||
|
assign io_l1 = {_T_1230,_T_1228}; // @[el2_ifu_compress_ctl.scala 147:9]
|
||||||
|
assign io_l2 = l2[31:0]; // @[el2_ifu_compress_ctl.scala 148:9]
|
||||||
|
assign io_l3 = {_T_1396,_T_1395}; // @[el2_ifu_compress_ctl.scala 149:9]
|
||||||
|
assign io_legal = _T_1736 | _T_1743; // @[el2_ifu_compress_ctl.scala 150:12]
|
||||||
endmodule
|
endmodule
|
||||||
|
|
|
||||||
|
|
@ -38,6 +38,8 @@ class el2_ifu_bp_ctl extends Module with el2_lib {
|
||||||
val ifu_bp_pc4_f = Output(UInt(2.W))
|
val ifu_bp_pc4_f = Output(UInt(2.W))
|
||||||
val ifu_bp_valid_f = Output(UInt(2.W))
|
val ifu_bp_valid_f = Output(UInt(2.W))
|
||||||
val ifu_bp_poffset_f = Output(UInt(12.W))
|
val ifu_bp_poffset_f = Output(UInt(12.W))
|
||||||
|
|
||||||
|
// val test = Output(Vec(8,UInt(32.W)))
|
||||||
})
|
})
|
||||||
io.ifu_bp_hit_taken_f := 0.U
|
io.ifu_bp_hit_taken_f := 0.U
|
||||||
io.ifu_bp_btb_target_f := 0.U
|
io.ifu_bp_btb_target_f := 0.U
|
||||||
|
|
@ -86,8 +88,8 @@ class el2_ifu_bp_ctl extends Module with el2_lib {
|
||||||
val dec_tlu_br0_start_error_wb = io.dec_tlu_br0_r_pkt.br_start_error
|
val dec_tlu_br0_start_error_wb = io.dec_tlu_br0_r_pkt.br_start_error
|
||||||
val exu_i0_br_fghr_wb = io.exu_i0_br_fghr_r
|
val exu_i0_br_fghr_wb = io.exu_i0_br_fghr_r
|
||||||
|
|
||||||
val fetch_rd_tag_p1_f = WireInit(UInt(BTB_BTAG_SIZE.W), 0.U)
|
//val fetch_rd_tag_p1_f = WireInit(UInt(BTB_BTAG_SIZE.W), 0.U)
|
||||||
val fetch_rd_tag_f = WireInit(UInt(BTB_BTAG_SIZE.W), 0.U)
|
//val fetch_rd_tag_f = WireInit(UInt(BTB_BTAG_SIZE.W), 0.U)
|
||||||
val bht_dir_f = WireInit(UInt(2.W), 0.U)
|
val bht_dir_f = WireInit(UInt(2.W), 0.U)
|
||||||
val dec_tlu_error_wb = WireInit(Bool(), 0.U)
|
val dec_tlu_error_wb = WireInit(Bool(), 0.U)
|
||||||
val btb_error_addr_wb = WireInit(UInt((BTB_ADDR_HI-BTB_ADDR_LO).W), 0.U)
|
val btb_error_addr_wb = WireInit(UInt((BTB_ADDR_HI-BTB_ADDR_LO).W), 0.U)
|
||||||
|
|
@ -121,6 +123,8 @@ class el2_ifu_bp_ctl extends Module with el2_lib {
|
||||||
val branch_error_bank_conflict_f = branch_error_collision_f & dec_tlu_error_wb
|
val branch_error_bank_conflict_f = branch_error_collision_f & dec_tlu_error_wb
|
||||||
val branch_error_bank_conflict_p1_f = branch_error_collision_p1_f & dec_tlu_error_wb
|
val branch_error_bank_conflict_p1_f = branch_error_collision_p1_f & dec_tlu_error_wb
|
||||||
|
|
||||||
|
val fetch_rd_tag_f = if(BTB_BTAG_FOLD) el2_btb_tag_hash_fold(io.ifc_fetch_addr_f) else el2_btb_tag_hash(io.ifc_fetch_addr_f)
|
||||||
|
val fetch_rd_tag_p1_f = if(BTB_BTAG_FOLD) el2_btb_tag_hash_fold(fetch_addr_p1_f) else el2_btb_tag_hash(fetch_addr_p1_f)
|
||||||
// There is a misprediction and the exu is writing back
|
// There is a misprediction and the exu is writing back
|
||||||
val fetch_mp_collision_f = (io.exu_mp_btag === fetch_rd_tag_f) & exu_mp_valid & io.ifc_fetch_req_f & (exu_mp_addr === btb_rd_addr_f)
|
val fetch_mp_collision_f = (io.exu_mp_btag === fetch_rd_tag_f) & exu_mp_valid & io.ifc_fetch_req_f & (exu_mp_addr === btb_rd_addr_f)
|
||||||
val fetch_mp_collision_p1_f = (io.exu_mp_btag === fetch_rd_tag_p1_f) & exu_mp_valid & io.ifc_fetch_req_f & (exu_mp_addr === btb_rd_addr_p1_f)
|
val fetch_mp_collision_p1_f = (io.exu_mp_btag === fetch_rd_tag_p1_f) & exu_mp_valid & io.ifc_fetch_req_f & (exu_mp_addr === btb_rd_addr_p1_f)
|
||||||
|
|
@ -301,24 +305,57 @@ class el2_ifu_bp_ctl extends Module with el2_lib {
|
||||||
(!btb_fg_crossing_f & !use_fa_plus).asBool->io.ifc_fetch_addr_f(31,2)))
|
(!btb_fg_crossing_f & !use_fa_plus).asBool->io.ifc_fetch_addr_f(31,2)))
|
||||||
|
|
||||||
val bp_btb_target_adder_f = rvbradder(Cat(adder_pc_in_f(31,2),bp_total_branch_offset_f, 0.U), Cat(btb_rd_tgt_f,0.U))
|
val bp_btb_target_adder_f = rvbradder(Cat(adder_pc_in_f(31,2),bp_total_branch_offset_f, 0.U), Cat(btb_rd_tgt_f,0.U))
|
||||||
//
|
val rets_out = Wire(Vec(RET_STACK_SIZE, UInt(32.W)))
|
||||||
// val rets_out = Wire(Vec(RET_STACK_SIZE, UInt(32.W)))
|
rets_out := (0 until RET_STACK_SIZE).map(i=>0.U)
|
||||||
// rets_out := (0 until RET_STACK_SIZE).map(i=>0.U)
|
|
||||||
// io.ifu_bp_btb_target_f := Mux((btb_rd_ret_f & ~btb_rd_call_f & rets_out(0)(0)).asBool,
|
|
||||||
// rets_out(0)(31,1),bp_btb_target_adder_f(31,1))
|
|
||||||
|
|
||||||
//val bp_rs_call_target_f = rvbradder(Cat(adder_pc_in_f(31,2),bp_total_branch_offset_f, 0.U), Cat(Fill(11, 0.U),~btb_rd_pc4_f, 0.U))
|
//io.test := bp_btb_target_adder_f
|
||||||
|
io.ifu_bp_btb_target_f := Mux((btb_rd_ret_f & ~btb_rd_call_f & rets_out(0)(0)).asBool,
|
||||||
// val rs_push = btb_rd_call_f & ~btb_rd_ret_f & ifu_bp_hit_taken_f
|
rets_out(0)(31,1),bp_btb_target_adder_f(31,1))
|
||||||
// val rs_pop = btb_rd_ret_f & ~btb_rd_call_f & ifu_bp_hit_taken_f
|
|
||||||
// val rs_hold = ~rs_push & ~rs_pop
|
|
||||||
|
|
||||||
// Return stack
|
// Return stack
|
||||||
|
val bp_rs_call_target_f = rvbradder(Cat(adder_pc_in_f(31,2),bp_total_branch_offset_f, 0.U), Cat(Fill(11, 0.U),~btb_rd_pc4_f, 0.U))
|
||||||
|
|
||||||
|
val rs_push = btb_rd_call_f & ~btb_rd_ret_f & ifu_bp_hit_taken_f
|
||||||
|
val rs_pop = btb_rd_ret_f & ~btb_rd_call_f & ifu_bp_hit_taken_f
|
||||||
|
val rs_hold = ~rs_push & ~rs_pop
|
||||||
|
|
||||||
|
val rsenable = (0 until RET_STACK_SIZE).map(i=> if(i==0) !rs_hold else if(i==RET_STACK_SIZE-1) rs_push else rs_push | rs_pop)
|
||||||
|
|
||||||
|
val rets_in = (0 until RET_STACK_SIZE).map(i=> if(i==0)
|
||||||
|
Mux1H(Seq(rs_push.asBool -> Cat(bp_rs_call_target_f(31,1),1.U), rs_pop.asBool -> rets_out(1)))
|
||||||
|
else if(i==RET_STACK_SIZE-1) rets_out(i-1)
|
||||||
|
else Mux1H(Seq(rs_push.asBool->rets_out(i-1), rs_pop.asBool->rets_out(i+1))))
|
||||||
|
rets_out := (0 until RET_STACK_SIZE).map(i=>RegEnable(rets_in(i),0.U,rsenable(i).asBool))
|
||||||
|
|
||||||
|
dec_tlu_error_wb := dec_tlu_br0_start_error_wb | dec_tlu_br0_error_wb
|
||||||
|
btb_error_addr_wb := dec_tlu_br0_addr_wb
|
||||||
|
dec_tlu_way_wb := dec_tlu_br0_way_wb
|
||||||
|
val btb_valid = exu_mp_valid & (!dec_tlu_error_wb)
|
||||||
|
val btb_wr_tag = io.exu_mp_btag
|
||||||
|
|
||||||
|
val btb_wr_data = Cat(btb_wr_tag, exu_mp_tgt, exu_mp_pc4, exu_mp_boffset, exu_mp_call | exu_mp_ja, exu_mp_ret | exu_mp_ja, btb_valid)
|
||||||
|
val exu_mp_valid_write = exu_mp_valid & exu_mp_ataken
|
||||||
|
|
||||||
|
val btb_wr_en_way0 = ((!exu_mp_way) & exu_mp_valid_write & (!dec_tlu_error_wb)) | ((!dec_tlu_way_wb) & dec_tlu_error_wb)
|
||||||
|
val btb_wr_en_way1 = (exu_mp_way & exu_mp_valid_write & (!dec_tlu_error_wb)) | (dec_tlu_way_wb & dec_tlu_error_wb)
|
||||||
|
|
||||||
|
val btb_wr_addr = Mux(dec_tlu_error_wb.asBool , btb_error_addr_wb, exu_mp_addr)
|
||||||
|
val middle_of_bank = exu_mp_pc4 ^ exu_mp_boffset
|
||||||
|
val bht_wr_en0 = Fill(2, exu_mp_valid & !exu_mp_call & !exu_mp_ret & !exu_mp_ja) & Cat(middle_of_bank, ~middle_of_bank)
|
||||||
|
val bht_wr_en2 = Fill(2, dec_tlu_br0_v_wb) & Cat(dec_tlu_br0_middle_wb, ~dec_tlu_br0_middle_wb)
|
||||||
|
val bht_wr_data0 = exu_mp_hist
|
||||||
|
val bht_wr_data2 = dec_tlu_br0_hist_wb
|
||||||
|
|
||||||
|
val mp_hashed = el2_btb_ghr_hash(exu_mp_addr, io.exu_mp_eghr)
|
||||||
|
val br0_hashed_wb = el2_btb_ghr_hash(dec_tlu_br0_addr_wb, exu_i0_br_fghr_wb)
|
||||||
|
val bht_rd_addr_hashed_f = el2_btb_ghr_hash(btb_rd_addr_f, fghr)
|
||||||
|
val bht_rd_addr_hashed_p1_f = el2_btb_ghr_hash(btb_rd_addr_p1_f, fghr)
|
||||||
|
|
||||||
|
val bht_wr_addr0 = mp_hashed
|
||||||
|
//val bht_wr_addr2 =
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
|
||||||
object ifu_bp extends App {
|
object ifu_bp extends App {
|
||||||
println((new chisel3.stage.ChiselStage).emitVerilog(new el2_ifu_bp_ctl()))
|
println((new chisel3.stage.ChiselStage).emitVerilog(new el2_ifu_bp_ctl()))
|
||||||
}*/
|
}
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -7,6 +7,10 @@ class el2_ifu_compress_ctl extends Module {
|
||||||
val io = IO(new Bundle{
|
val io = IO(new Bundle{
|
||||||
val din = Input(UInt(16.W))
|
val din = Input(UInt(16.W))
|
||||||
val dout = Output(UInt(32.W))
|
val dout = Output(UInt(32.W))
|
||||||
|
val l1 = Output(UInt(32.W))
|
||||||
|
val l2 = Output(UInt(32.W))
|
||||||
|
val l3 = Output(UInt(32.W))
|
||||||
|
val legal = Output(Bool())
|
||||||
//val test = Output(Bool())
|
//val test = Output(Bool())
|
||||||
})
|
})
|
||||||
|
|
||||||
|
|
@ -140,6 +144,10 @@ class el2_ifu_compress_ctl extends Module {
|
||||||
pat(List(-15,-13,12,-1)) | (pat(List(14,-13))&(!io.din(0)))
|
pat(List(-15,-13,12,-1)) | (pat(List(14,-13))&(!io.din(0)))
|
||||||
|
|
||||||
io.dout:= l3 & Fill(32, legal)
|
io.dout:= l3 & Fill(32, legal)
|
||||||
|
io.l1 := l1
|
||||||
|
io.l2 := l2
|
||||||
|
io.l3 := l3
|
||||||
|
io.legal := legal
|
||||||
}
|
}
|
||||||
/*
|
/*
|
||||||
class ExpandedInstruction extends Bundle {
|
class ExpandedInstruction extends Bundle {
|
||||||
|
|
|
||||||
|
|
@ -196,13 +196,13 @@ trait el2_lib extends param{
|
||||||
data_in.xorR.asUInt
|
data_in.xorR.asUInt
|
||||||
|
|
||||||
def rvbradder (pc:UInt, offset:UInt) = {
|
def rvbradder (pc:UInt, offset:UInt) = {
|
||||||
val dout_lower = Cat(pc(12,1) +& offset(12,1), 0.U)
|
val dout_lower = pc(12,1) +& offset(12,1)
|
||||||
val pc_inc = pc(31,13)+1.U
|
val pc_inc = pc(31,13)+1.U
|
||||||
val pc_dec = pc(31,13)+1.U
|
val pc_dec = pc(31,13)+1.U
|
||||||
val sign = offset(12)
|
val sign = offset(12)
|
||||||
Cat(Mux1H(Seq((sign ^ !dout_lower(dout_lower.getWidth-1)).asBool -> pc(31,13),
|
Cat(Mux1H(Seq((sign ^ !dout_lower(dout_lower.getWidth-1)).asBool -> pc(31,13),
|
||||||
(!sign & dout_lower(dout_lower.getWidth-1)).asBool -> (pc(31,13)+1.U),
|
(!sign & dout_lower(dout_lower.getWidth-1)).asBool -> pc_inc,
|
||||||
(sign & !dout_lower(dout_lower.getWidth-1)).asBool -> (pc(31,13)-1.U))) , dout_lower(11,1), 0.U)
|
(sign & !dout_lower(dout_lower.getWidth-1)).asBool -> pc_dec)) , dout_lower(11,0), 0.U)
|
||||||
}
|
}
|
||||||
|
|
||||||
// RV range
|
// RV range
|
||||||
|
|
|
||||||
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Reference in New Issue