diff --git a/el2_ifu_aln_ctl.fir b/el2_ifu_aln_ctl.fir
index 569ad067..e7d25a59 100644
--- a/el2_ifu_aln_ctl.fir
+++ b/el2_ifu_aln_ctl.fir
@@ -1996,7 +1996,7 @@ circuit el2_ifu_aln_ctl :
   module el2_ifu_aln_ctl : 
     input clock : Clock
     input reset : UInt<1>
-    output io : {flip scan_mode : UInt<1>, flip active_clk : Clock, flip ifu_async_error_start : UInt<1>, flip iccm_rd_ecc_double_err : UInt<1>, flip ic_access_fault_f : UInt<1>, flip ic_access_fault_type_f : UInt<2>, flip ifu_bp_fghr_f : UInt<8>, flip ifu_bp_btb_target_f : UInt<32>, flip ifu_bp_poffset_f : UInt<12>, flip ifu_bp_hist0_f : UInt<2>, flip ifu_bp_hist1_f : UInt<2>, flip ifu_bp_pc4_f : UInt<2>, flip ifu_bp_way_f : UInt<2>, flip ifu_bp_valid_f : UInt<2>, flip ifu_bp_ret_f : UInt<2>, flip exu_flush_final : UInt<1>, flip dec_i0_decode_d : UInt<1>, flip ifu_fetch_data_f : UInt<32>, flip ifu_fetch_val : UInt<2>, flip ifu_fetch_pc : UInt<31>, ifu_i0_valid : UInt<1>, ifu_i0_icaf : UInt<1>, ifu_i0_icaf_type : UInt<2>, ifu_i0_icaf_f1 : UInt<1>, ifu_i0_dbecc : UInt<1>, ifu_i0_instr : UInt<32>, ifu_i0_pc : UInt<31>, ifu_i0_pc4 : UInt<1>, ifu_fb_consume1 : UInt<1>, ifu_fb_consume2 : UInt<1>, ifu_i0_bp_index : UInt<8>, ifu_i0_bp_fghr : UInt<8>, ifu_i0_bp_btag : UInt<5>, ifu_pmu_instr_aligned : UInt<1>, ifu_i0_cinst : UInt<16>, i0_brp : {valid : UInt<1>, toffset : UInt<12>, hist : UInt<2>, br_error : UInt<1>, br_start_error : UInt<1>, bank : UInt<1>, prett : UInt<31>, way : UInt<1>, ret : UInt<1>}}
+    output io : {flip scan_mode : UInt<1>, flip active_clk : Clock, flip ifu_async_error_start : UInt<1>, flip iccm_rd_ecc_double_err : UInt<1>, flip ic_access_fault_f : UInt<1>, flip ic_access_fault_type_f : UInt<2>, flip ifu_bp_fghr_f : UInt<8>, flip ifu_bp_btb_target_f : UInt<31>, flip ifu_bp_poffset_f : UInt<12>, flip ifu_bp_hist0_f : UInt<2>, flip ifu_bp_hist1_f : UInt<2>, flip ifu_bp_pc4_f : UInt<2>, flip ifu_bp_way_f : UInt<2>, flip ifu_bp_valid_f : UInt<2>, flip ifu_bp_ret_f : UInt<2>, flip exu_flush_final : UInt<1>, flip dec_i0_decode_d : UInt<1>, flip ifu_fetch_data_f : UInt<32>, flip ifu_fetch_val : UInt<2>, flip ifu_fetch_pc : UInt<31>, ifu_i0_valid : UInt<1>, ifu_i0_icaf : UInt<1>, ifu_i0_icaf_type : UInt<2>, ifu_i0_icaf_f1 : UInt<1>, ifu_i0_dbecc : UInt<1>, ifu_i0_instr : UInt<32>, ifu_i0_pc : UInt<31>, ifu_i0_pc4 : UInt<1>, ifu_fb_consume1 : UInt<1>, ifu_fb_consume2 : UInt<1>, ifu_i0_bp_index : UInt<8>, ifu_i0_bp_fghr : UInt<8>, ifu_i0_bp_btag : UInt<5>, ifu_pmu_instr_aligned : UInt<1>, ifu_i0_cinst : UInt<16>, i0_brp : {valid : UInt<1>, toffset : UInt<12>, hist : UInt<2>, br_error : UInt<1>, br_start_error : UInt<1>, bank : UInt<1>, prett : UInt<31>, way : UInt<1>, ret : UInt<1>}}
     
     io.ifu_i0_valid <= UInt<1>("h00") @[el2_ifu_aln_ctl.scala 47:19]
     io.ifu_i0_icaf <= UInt<1>("h00") @[el2_ifu_aln_ctl.scala 48:18]
@@ -2403,756 +2403,755 @@ circuit el2_ifu_aln_ctl :
     node q0sel = cat(q0ptr, _T_202) @[Cat.scala 29:58]
     node _T_203 = eq(q1ptr, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 196:26]
     node q1sel = cat(q1ptr, _T_203) @[Cat.scala 29:58]
-    node _T_204 = bits(io.ifu_bp_btb_target_f, 31, 1) @[el2_ifu_aln_ctl.scala 199:27]
-    node _T_205 = cat(_T_204, io.ifu_bp_poffset_f) @[Cat.scala 29:58]
-    node _T_206 = cat(_T_205, io.ifu_bp_fghr_f) @[Cat.scala 29:58]
-    node _T_207 = cat(io.iccm_rd_ecc_double_err, io.ic_access_fault_f) @[Cat.scala 29:58]
-    node _T_208 = cat(_T_207, io.ic_access_fault_type_f) @[Cat.scala 29:58]
-    node _T_209 = cat(_T_208, _T_206) @[Cat.scala 29:58]
-    misc_data_in <= _T_209 @[el2_ifu_aln_ctl.scala 198:16]
-    node _T_210 = bits(qren, 0, 0) @[el2_ifu_aln_ctl.scala 201:31]
-    node _T_211 = bits(_T_210, 0, 0) @[el2_ifu_aln_ctl.scala 201:41]
-    node _T_212 = cat(misc1, misc0) @[Cat.scala 29:58]
-    node _T_213 = bits(qren, 1, 1) @[el2_ifu_aln_ctl.scala 202:9]
-    node _T_214 = bits(_T_213, 0, 0) @[el2_ifu_aln_ctl.scala 202:19]
-    node _T_215 = cat(misc2, misc1) @[Cat.scala 29:58]
-    node _T_216 = bits(qren, 2, 2) @[el2_ifu_aln_ctl.scala 203:9]
-    node _T_217 = bits(_T_216, 0, 0) @[el2_ifu_aln_ctl.scala 203:19]
-    node _T_218 = cat(misc0, misc2) @[Cat.scala 29:58]
-    node _T_219 = mux(_T_211, _T_212, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_220 = mux(_T_214, _T_215, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_221 = mux(_T_217, _T_218, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_222 = or(_T_219, _T_220) @[Mux.scala 27:72]
-    node _T_223 = or(_T_222, _T_221) @[Mux.scala 27:72]
+    node _T_204 = cat(io.ifu_bp_btb_target_f, io.ifu_bp_poffset_f) @[Cat.scala 29:58]
+    node _T_205 = cat(_T_204, io.ifu_bp_fghr_f) @[Cat.scala 29:58]
+    node _T_206 = cat(io.iccm_rd_ecc_double_err, io.ic_access_fault_f) @[Cat.scala 29:58]
+    node _T_207 = cat(_T_206, io.ic_access_fault_type_f) @[Cat.scala 29:58]
+    node _T_208 = cat(_T_207, _T_205) @[Cat.scala 29:58]
+    misc_data_in <= _T_208 @[el2_ifu_aln_ctl.scala 198:16]
+    node _T_209 = bits(qren, 0, 0) @[el2_ifu_aln_ctl.scala 201:31]
+    node _T_210 = bits(_T_209, 0, 0) @[el2_ifu_aln_ctl.scala 201:41]
+    node _T_211 = cat(misc1, misc0) @[Cat.scala 29:58]
+    node _T_212 = bits(qren, 1, 1) @[el2_ifu_aln_ctl.scala 202:9]
+    node _T_213 = bits(_T_212, 0, 0) @[el2_ifu_aln_ctl.scala 202:19]
+    node _T_214 = cat(misc2, misc1) @[Cat.scala 29:58]
+    node _T_215 = bits(qren, 2, 2) @[el2_ifu_aln_ctl.scala 203:9]
+    node _T_216 = bits(_T_215, 0, 0) @[el2_ifu_aln_ctl.scala 203:19]
+    node _T_217 = cat(misc0, misc2) @[Cat.scala 29:58]
+    node _T_218 = mux(_T_210, _T_211, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_219 = mux(_T_213, _T_214, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_220 = mux(_T_216, _T_217, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_221 = or(_T_218, _T_219) @[Mux.scala 27:72]
+    node _T_222 = or(_T_221, _T_220) @[Mux.scala 27:72]
     wire misceff : UInt<108> @[Mux.scala 27:72]
-    misceff <= _T_223 @[Mux.scala 27:72]
+    misceff <= _T_222 @[Mux.scala 27:72]
     node misc1eff = bits(misceff, 107, 55) @[el2_ifu_aln_ctl.scala 205:25]
     node misc0eff = bits(misceff, 54, 0) @[el2_ifu_aln_ctl.scala 206:25]
     node f1dbecc = bits(misc1eff, 52, 52) @[el2_ifu_aln_ctl.scala 209:25]
-    node _T_224 = bits(misc1eff, 51, 51) @[el2_ifu_aln_ctl.scala 210:21]
-    f1icaf <= _T_224 @[el2_ifu_aln_ctl.scala 210:10]
+    node _T_223 = bits(misc1eff, 51, 51) @[el2_ifu_aln_ctl.scala 210:21]
+    f1icaf <= _T_223 @[el2_ifu_aln_ctl.scala 210:10]
     node f1ictype = bits(misc1eff, 50, 49) @[el2_ifu_aln_ctl.scala 211:26]
     node f1prett = bits(misc1eff, 48, 18) @[el2_ifu_aln_ctl.scala 212:25]
     node f1poffset = bits(misc1eff, 19, 8) @[el2_ifu_aln_ctl.scala 213:27]
     node f1fghr = bits(misc1eff, 7, 0) @[el2_ifu_aln_ctl.scala 214:24]
     node f0dbecc = bits(misc0eff, 54, 54) @[el2_ifu_aln_ctl.scala 216:25]
-    node _T_225 = bits(misc0eff, 53, 53) @[el2_ifu_aln_ctl.scala 217:21]
-    f0icaf <= _T_225 @[el2_ifu_aln_ctl.scala 217:10]
+    node _T_224 = bits(misc0eff, 53, 53) @[el2_ifu_aln_ctl.scala 217:21]
+    f0icaf <= _T_224 @[el2_ifu_aln_ctl.scala 217:10]
     node f0ictype = bits(misc0eff, 52, 51) @[el2_ifu_aln_ctl.scala 218:26]
     node f0prett = bits(misc0eff, 50, 18) @[el2_ifu_aln_ctl.scala 219:25]
     node f0poffset = bits(misc0eff, 17, 5) @[el2_ifu_aln_ctl.scala 220:27]
     node f0fghr = bits(misc0eff, 4, 0) @[el2_ifu_aln_ctl.scala 221:24]
-    node _T_226 = bits(io.ifu_bp_hist1_f, 1, 1) @[el2_ifu_aln_ctl.scala 223:37]
-    node _T_227 = bits(io.ifu_bp_hist0_f, 1, 1) @[el2_ifu_aln_ctl.scala 223:58]
-    node _T_228 = bits(io.ifu_bp_pc4_f, 1, 1) @[el2_ifu_aln_ctl.scala 223:77]
-    node _T_229 = bits(io.ifu_bp_way_f, 1, 1) @[el2_ifu_aln_ctl.scala 223:96]
-    node _T_230 = bits(io.ifu_bp_valid_f, 1, 1) @[el2_ifu_aln_ctl.scala 223:117]
-    node _T_231 = bits(io.ifu_bp_ret_f, 1, 1) @[el2_ifu_aln_ctl.scala 224:20]
-    node _T_232 = bits(io.ifu_bp_hist1_f, 0, 0) @[el2_ifu_aln_ctl.scala 224:42]
-    node _T_233 = bits(io.ifu_bp_hist0_f, 0, 0) @[el2_ifu_aln_ctl.scala 224:63]
-    node _T_234 = bits(io.ifu_bp_pc4_f, 0, 0) @[el2_ifu_aln_ctl.scala 224:82]
-    node _T_235 = bits(io.ifu_bp_way_f, 0, 0) @[el2_ifu_aln_ctl.scala 224:101]
-    node _T_236 = bits(io.ifu_bp_valid_f, 0, 0) @[el2_ifu_aln_ctl.scala 225:22]
-    node _T_237 = bits(io.ifu_bp_ret_f, 0, 0) @[el2_ifu_aln_ctl.scala 225:41]
-    node _T_238 = cat(_T_235, _T_236) @[Cat.scala 29:58]
-    node _T_239 = cat(_T_238, _T_237) @[Cat.scala 29:58]
-    node _T_240 = cat(_T_232, _T_233) @[Cat.scala 29:58]
-    node _T_241 = cat(_T_240, _T_234) @[Cat.scala 29:58]
-    node _T_242 = cat(_T_241, _T_239) @[Cat.scala 29:58]
-    node _T_243 = cat(_T_229, _T_230) @[Cat.scala 29:58]
-    node _T_244 = cat(_T_243, _T_231) @[Cat.scala 29:58]
-    node _T_245 = cat(_T_226, _T_227) @[Cat.scala 29:58]
-    node _T_246 = cat(_T_245, _T_228) @[Cat.scala 29:58]
-    node _T_247 = cat(_T_246, _T_244) @[Cat.scala 29:58]
-    node _T_248 = cat(_T_247, _T_242) @[Cat.scala 29:58]
-    brdata_in <= _T_248 @[el2_ifu_aln_ctl.scala 223:13]
-    node _T_249 = bits(qren, 0, 0) @[el2_ifu_aln_ctl.scala 227:33]
-    node _T_250 = bits(_T_249, 0, 0) @[el2_ifu_aln_ctl.scala 227:37]
-    node _T_251 = cat(brdata1, brdata0) @[Cat.scala 29:58]
-    node _T_252 = bits(qren, 1, 1) @[el2_ifu_aln_ctl.scala 228:9]
-    node _T_253 = bits(_T_252, 0, 0) @[el2_ifu_aln_ctl.scala 228:13]
-    node _T_254 = cat(brdata2, brdata1) @[Cat.scala 29:58]
-    node _T_255 = bits(qren, 2, 2) @[el2_ifu_aln_ctl.scala 229:9]
-    node _T_256 = bits(_T_255, 0, 0) @[el2_ifu_aln_ctl.scala 229:13]
-    node _T_257 = cat(brdata0, brdata2) @[Cat.scala 29:58]
-    node _T_258 = mux(_T_250, _T_251, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_259 = mux(_T_253, _T_254, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_260 = mux(_T_256, _T_257, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_261 = or(_T_258, _T_259) @[Mux.scala 27:72]
-    node _T_262 = or(_T_261, _T_260) @[Mux.scala 27:72]
+    node _T_225 = bits(io.ifu_bp_hist1_f, 1, 1) @[el2_ifu_aln_ctl.scala 223:37]
+    node _T_226 = bits(io.ifu_bp_hist0_f, 1, 1) @[el2_ifu_aln_ctl.scala 223:58]
+    node _T_227 = bits(io.ifu_bp_pc4_f, 1, 1) @[el2_ifu_aln_ctl.scala 223:77]
+    node _T_228 = bits(io.ifu_bp_way_f, 1, 1) @[el2_ifu_aln_ctl.scala 223:96]
+    node _T_229 = bits(io.ifu_bp_valid_f, 1, 1) @[el2_ifu_aln_ctl.scala 223:117]
+    node _T_230 = bits(io.ifu_bp_ret_f, 1, 1) @[el2_ifu_aln_ctl.scala 224:20]
+    node _T_231 = bits(io.ifu_bp_hist1_f, 0, 0) @[el2_ifu_aln_ctl.scala 224:42]
+    node _T_232 = bits(io.ifu_bp_hist0_f, 0, 0) @[el2_ifu_aln_ctl.scala 224:63]
+    node _T_233 = bits(io.ifu_bp_pc4_f, 0, 0) @[el2_ifu_aln_ctl.scala 224:82]
+    node _T_234 = bits(io.ifu_bp_way_f, 0, 0) @[el2_ifu_aln_ctl.scala 224:101]
+    node _T_235 = bits(io.ifu_bp_valid_f, 0, 0) @[el2_ifu_aln_ctl.scala 225:22]
+    node _T_236 = bits(io.ifu_bp_ret_f, 0, 0) @[el2_ifu_aln_ctl.scala 225:41]
+    node _T_237 = cat(_T_234, _T_235) @[Cat.scala 29:58]
+    node _T_238 = cat(_T_237, _T_236) @[Cat.scala 29:58]
+    node _T_239 = cat(_T_231, _T_232) @[Cat.scala 29:58]
+    node _T_240 = cat(_T_239, _T_233) @[Cat.scala 29:58]
+    node _T_241 = cat(_T_240, _T_238) @[Cat.scala 29:58]
+    node _T_242 = cat(_T_228, _T_229) @[Cat.scala 29:58]
+    node _T_243 = cat(_T_242, _T_230) @[Cat.scala 29:58]
+    node _T_244 = cat(_T_225, _T_226) @[Cat.scala 29:58]
+    node _T_245 = cat(_T_244, _T_227) @[Cat.scala 29:58]
+    node _T_246 = cat(_T_245, _T_243) @[Cat.scala 29:58]
+    node _T_247 = cat(_T_246, _T_241) @[Cat.scala 29:58]
+    brdata_in <= _T_247 @[el2_ifu_aln_ctl.scala 223:13]
+    node _T_248 = bits(qren, 0, 0) @[el2_ifu_aln_ctl.scala 227:33]
+    node _T_249 = bits(_T_248, 0, 0) @[el2_ifu_aln_ctl.scala 227:37]
+    node _T_250 = cat(brdata1, brdata0) @[Cat.scala 29:58]
+    node _T_251 = bits(qren, 1, 1) @[el2_ifu_aln_ctl.scala 228:9]
+    node _T_252 = bits(_T_251, 0, 0) @[el2_ifu_aln_ctl.scala 228:13]
+    node _T_253 = cat(brdata2, brdata1) @[Cat.scala 29:58]
+    node _T_254 = bits(qren, 2, 2) @[el2_ifu_aln_ctl.scala 229:9]
+    node _T_255 = bits(_T_254, 0, 0) @[el2_ifu_aln_ctl.scala 229:13]
+    node _T_256 = cat(brdata0, brdata2) @[Cat.scala 29:58]
+    node _T_257 = mux(_T_249, _T_250, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_258 = mux(_T_252, _T_253, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_259 = mux(_T_255, _T_256, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_260 = or(_T_257, _T_258) @[Mux.scala 27:72]
+    node _T_261 = or(_T_260, _T_259) @[Mux.scala 27:72]
     wire brdataeff : UInt<24> @[Mux.scala 27:72]
-    brdataeff <= _T_262 @[Mux.scala 27:72]
+    brdataeff <= _T_261 @[Mux.scala 27:72]
     node brdata0eff = bits(brdataeff, 11, 0) @[el2_ifu_aln_ctl.scala 231:43]
     node brdata1eff = bits(brdataeff, 23, 12) @[el2_ifu_aln_ctl.scala 231:61]
-    node _T_263 = bits(q0sel, 0, 0) @[el2_ifu_aln_ctl.scala 233:37]
-    node _T_264 = bits(_T_263, 0, 0) @[el2_ifu_aln_ctl.scala 233:41]
-    node _T_265 = bits(q0sel, 1, 1) @[el2_ifu_aln_ctl.scala 233:68]
-    node _T_266 = bits(_T_265, 0, 0) @[el2_ifu_aln_ctl.scala 233:72]
-    node _T_267 = bits(brdata0eff, 11, 6) @[el2_ifu_aln_ctl.scala 233:92]
-    node _T_268 = mux(_T_264, brdata0eff, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_269 = mux(_T_266, _T_267, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_270 = or(_T_268, _T_269) @[Mux.scala 27:72]
+    node _T_262 = bits(q0sel, 0, 0) @[el2_ifu_aln_ctl.scala 233:37]
+    node _T_263 = bits(_T_262, 0, 0) @[el2_ifu_aln_ctl.scala 233:41]
+    node _T_264 = bits(q0sel, 1, 1) @[el2_ifu_aln_ctl.scala 233:68]
+    node _T_265 = bits(_T_264, 0, 0) @[el2_ifu_aln_ctl.scala 233:72]
+    node _T_266 = bits(brdata0eff, 11, 6) @[el2_ifu_aln_ctl.scala 233:92]
+    node _T_267 = mux(_T_263, brdata0eff, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_268 = mux(_T_265, _T_266, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_269 = or(_T_267, _T_268) @[Mux.scala 27:72]
     wire brdata0final : UInt<12> @[Mux.scala 27:72]
-    brdata0final <= _T_270 @[Mux.scala 27:72]
-    node _T_271 = bits(q1sel, 0, 0) @[el2_ifu_aln_ctl.scala 234:37]
-    node _T_272 = bits(_T_271, 0, 0) @[el2_ifu_aln_ctl.scala 234:41]
-    node _T_273 = bits(q1sel, 1, 1) @[el2_ifu_aln_ctl.scala 234:68]
-    node _T_274 = bits(_T_273, 0, 0) @[el2_ifu_aln_ctl.scala 234:72]
-    node _T_275 = bits(brdata1eff, 11, 6) @[el2_ifu_aln_ctl.scala 234:92]
-    node _T_276 = mux(_T_272, brdata1eff, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_277 = mux(_T_274, _T_275, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_278 = or(_T_276, _T_277) @[Mux.scala 27:72]
+    brdata0final <= _T_269 @[Mux.scala 27:72]
+    node _T_270 = bits(q1sel, 0, 0) @[el2_ifu_aln_ctl.scala 234:37]
+    node _T_271 = bits(_T_270, 0, 0) @[el2_ifu_aln_ctl.scala 234:41]
+    node _T_272 = bits(q1sel, 1, 1) @[el2_ifu_aln_ctl.scala 234:68]
+    node _T_273 = bits(_T_272, 0, 0) @[el2_ifu_aln_ctl.scala 234:72]
+    node _T_274 = bits(brdata1eff, 11, 6) @[el2_ifu_aln_ctl.scala 234:92]
+    node _T_275 = mux(_T_271, brdata1eff, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_276 = mux(_T_273, _T_274, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_277 = or(_T_275, _T_276) @[Mux.scala 27:72]
     wire brdata1final : UInt<12> @[Mux.scala 27:72]
-    brdata1final <= _T_278 @[Mux.scala 27:72]
-    node _T_279 = bits(brdata0final, 6, 6) @[el2_ifu_aln_ctl.scala 236:31]
-    node _T_280 = bits(brdata0final, 0, 0) @[el2_ifu_aln_ctl.scala 236:47]
-    node f0ret = cat(_T_279, _T_280) @[Cat.scala 29:58]
-    node _T_281 = bits(brdata0final, 7, 7) @[el2_ifu_aln_ctl.scala 237:33]
-    node _T_282 = bits(brdata0final, 1, 1) @[el2_ifu_aln_ctl.scala 237:49]
-    node f0brend = cat(_T_281, _T_282) @[Cat.scala 29:58]
-    node _T_283 = bits(brdata0final, 8, 8) @[el2_ifu_aln_ctl.scala 238:31]
-    node _T_284 = bits(brdata0final, 2, 2) @[el2_ifu_aln_ctl.scala 238:47]
-    node f0way = cat(_T_283, _T_284) @[Cat.scala 29:58]
-    node _T_285 = bits(brdata0final, 9, 9) @[el2_ifu_aln_ctl.scala 239:31]
-    node _T_286 = bits(brdata0final, 3, 3) @[el2_ifu_aln_ctl.scala 239:47]
-    node f0pc4 = cat(_T_285, _T_286) @[Cat.scala 29:58]
-    node _T_287 = bits(brdata0final, 10, 10) @[el2_ifu_aln_ctl.scala 240:33]
-    node _T_288 = bits(brdata0final, 4, 4) @[el2_ifu_aln_ctl.scala 240:50]
-    node f0hist0 = cat(_T_287, _T_288) @[Cat.scala 29:58]
-    node _T_289 = bits(brdata0final, 11, 11) @[el2_ifu_aln_ctl.scala 241:33]
-    node _T_290 = bits(brdata0final, 5, 5) @[el2_ifu_aln_ctl.scala 241:50]
-    node f0hist1 = cat(_T_289, _T_290) @[Cat.scala 29:58]
-    node _T_291 = bits(brdata1final, 6, 6) @[el2_ifu_aln_ctl.scala 243:31]
-    node _T_292 = bits(brdata1final, 0, 0) @[el2_ifu_aln_ctl.scala 243:47]
-    node f1ret = cat(_T_291, _T_292) @[Cat.scala 29:58]
-    node _T_293 = bits(brdata1final, 7, 7) @[el2_ifu_aln_ctl.scala 244:33]
-    node _T_294 = bits(brdata1final, 1, 1) @[el2_ifu_aln_ctl.scala 244:49]
-    node f1brend = cat(_T_293, _T_294) @[Cat.scala 29:58]
-    node _T_295 = bits(brdata1final, 8, 8) @[el2_ifu_aln_ctl.scala 245:31]
-    node _T_296 = bits(brdata1final, 2, 2) @[el2_ifu_aln_ctl.scala 245:47]
-    node f1way = cat(_T_295, _T_296) @[Cat.scala 29:58]
-    node _T_297 = bits(brdata1final, 9, 9) @[el2_ifu_aln_ctl.scala 246:31]
-    node _T_298 = bits(brdata1final, 3, 3) @[el2_ifu_aln_ctl.scala 246:47]
-    node f1pc4 = cat(_T_297, _T_298) @[Cat.scala 29:58]
-    node _T_299 = bits(brdata1final, 10, 10) @[el2_ifu_aln_ctl.scala 247:33]
-    node _T_300 = bits(brdata1final, 4, 4) @[el2_ifu_aln_ctl.scala 247:50]
-    node f1hist0 = cat(_T_299, _T_300) @[Cat.scala 29:58]
-    node _T_301 = bits(brdata1final, 11, 11) @[el2_ifu_aln_ctl.scala 248:33]
-    node _T_302 = bits(brdata1final, 5, 5) @[el2_ifu_aln_ctl.scala 248:50]
-    node f1hist1 = cat(_T_301, _T_302) @[Cat.scala 29:58]
-    node _T_303 = bits(f2val, 0, 0) @[el2_ifu_aln_ctl.scala 251:20]
-    f2_valid <= _T_303 @[el2_ifu_aln_ctl.scala 251:12]
-    node _T_304 = bits(sf1val, 0, 0) @[el2_ifu_aln_ctl.scala 252:22]
-    sf1_valid <= _T_304 @[el2_ifu_aln_ctl.scala 252:13]
-    node _T_305 = bits(sf0val, 0, 0) @[el2_ifu_aln_ctl.scala 253:22]
-    sf0_valid <= _T_305 @[el2_ifu_aln_ctl.scala 253:13]
-    node _T_306 = bits(sf0val, 0, 0) @[el2_ifu_aln_ctl.scala 255:28]
-    node _T_307 = eq(_T_306, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 255:21]
-    node _T_308 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 255:39]
-    node consume_fb0 = and(_T_307, _T_308) @[el2_ifu_aln_ctl.scala 255:32]
-    node _T_309 = bits(sf1val, 0, 0) @[el2_ifu_aln_ctl.scala 256:28]
-    node _T_310 = eq(_T_309, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 256:21]
-    node _T_311 = bits(f1val, 0, 0) @[el2_ifu_aln_ctl.scala 256:39]
-    node consume_fb1 = and(_T_310, _T_311) @[el2_ifu_aln_ctl.scala 256:32]
-    node _T_312 = eq(consume_fb1, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 258:39]
-    node _T_313 = and(consume_fb0, _T_312) @[el2_ifu_aln_ctl.scala 258:37]
-    node _T_314 = eq(io.exu_flush_final, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 258:54]
-    node _T_315 = and(_T_313, _T_314) @[el2_ifu_aln_ctl.scala 258:52]
-    io.ifu_fb_consume1 <= _T_315 @[el2_ifu_aln_ctl.scala 258:22]
-    node _T_316 = and(consume_fb0, consume_fb1) @[el2_ifu_aln_ctl.scala 259:37]
-    node _T_317 = eq(io.exu_flush_final, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 259:54]
-    node _T_318 = and(_T_316, _T_317) @[el2_ifu_aln_ctl.scala 259:52]
-    io.ifu_fb_consume2 <= _T_318 @[el2_ifu_aln_ctl.scala 259:22]
-    node _T_319 = bits(io.ifu_fetch_val, 0, 0) @[el2_ifu_aln_ctl.scala 261:30]
-    ifvalid <= _T_319 @[el2_ifu_aln_ctl.scala 261:11]
-    node _T_320 = eq(sf0_valid, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 263:18]
-    node _T_321 = and(_T_320, sf1_valid) @[el2_ifu_aln_ctl.scala 263:29]
-    shift_f1_f0 <= _T_321 @[el2_ifu_aln_ctl.scala 263:15]
-    node _T_322 = eq(sf0_valid, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 264:18]
-    node _T_323 = eq(sf1_valid, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 264:31]
-    node _T_324 = and(_T_322, _T_323) @[el2_ifu_aln_ctl.scala 264:29]
-    node _T_325 = and(_T_324, f2_valid) @[el2_ifu_aln_ctl.scala 264:42]
-    shift_f2_f0 <= _T_325 @[el2_ifu_aln_ctl.scala 264:15]
-    node _T_326 = eq(sf0_valid, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 265:18]
-    node _T_327 = and(_T_326, sf1_valid) @[el2_ifu_aln_ctl.scala 265:29]
-    node _T_328 = and(_T_327, f2_valid) @[el2_ifu_aln_ctl.scala 265:42]
-    shift_f2_f1 <= _T_328 @[el2_ifu_aln_ctl.scala 265:15]
-    node _T_329 = eq(sf0_valid, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 267:26]
-    node _T_330 = eq(sf1_valid, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 267:39]
-    node _T_331 = and(_T_329, _T_330) @[el2_ifu_aln_ctl.scala 267:37]
-    node _T_332 = eq(f2_valid, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 267:52]
-    node _T_333 = and(_T_331, _T_332) @[el2_ifu_aln_ctl.scala 267:50]
-    node _T_334 = and(_T_333, ifvalid) @[el2_ifu_aln_ctl.scala 267:62]
-    fetch_to_f0 <= _T_334 @[el2_ifu_aln_ctl.scala 267:22]
-    node _T_335 = eq(sf0_valid, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 268:26]
-    node _T_336 = eq(sf1_valid, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 268:39]
-    node _T_337 = and(_T_335, _T_336) @[el2_ifu_aln_ctl.scala 268:37]
-    node _T_338 = and(_T_337, f2_valid) @[el2_ifu_aln_ctl.scala 268:50]
-    node _T_339 = and(_T_338, ifvalid) @[el2_ifu_aln_ctl.scala 268:62]
-    node _T_340 = eq(sf0_valid, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 269:26]
-    node _T_341 = and(_T_340, sf1_valid) @[el2_ifu_aln_ctl.scala 269:37]
-    node _T_342 = eq(f2_valid, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 269:52]
-    node _T_343 = and(_T_341, _T_342) @[el2_ifu_aln_ctl.scala 269:50]
-    node _T_344 = and(_T_343, ifvalid) @[el2_ifu_aln_ctl.scala 269:62]
-    node _T_345 = or(_T_339, _T_344) @[el2_ifu_aln_ctl.scala 268:74]
-    node _T_346 = eq(sf1_valid, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 270:39]
-    node _T_347 = and(sf0_valid, _T_346) @[el2_ifu_aln_ctl.scala 270:37]
-    node _T_348 = eq(f2_valid, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 270:52]
-    node _T_349 = and(_T_347, _T_348) @[el2_ifu_aln_ctl.scala 270:50]
-    node _T_350 = and(_T_349, ifvalid) @[el2_ifu_aln_ctl.scala 270:62]
-    node _T_351 = or(_T_345, _T_350) @[el2_ifu_aln_ctl.scala 269:74]
-    fetch_to_f1 <= _T_351 @[el2_ifu_aln_ctl.scala 268:22]
-    node _T_352 = eq(sf0_valid, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 272:26]
-    node _T_353 = and(_T_352, sf1_valid) @[el2_ifu_aln_ctl.scala 272:37]
-    node _T_354 = and(_T_353, f2_valid) @[el2_ifu_aln_ctl.scala 272:50]
-    node _T_355 = and(_T_354, ifvalid) @[el2_ifu_aln_ctl.scala 272:62]
-    node _T_356 = and(sf0_valid, sf1_valid) @[el2_ifu_aln_ctl.scala 273:37]
-    node _T_357 = eq(f2_valid, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 273:52]
-    node _T_358 = and(_T_356, _T_357) @[el2_ifu_aln_ctl.scala 273:50]
-    node _T_359 = and(_T_358, ifvalid) @[el2_ifu_aln_ctl.scala 273:62]
-    node _T_360 = or(_T_355, _T_359) @[el2_ifu_aln_ctl.scala 272:74]
-    fetch_to_f2 <= _T_360 @[el2_ifu_aln_ctl.scala 272:22]
-    node _T_361 = add(f0pc, UInt<1>("h01")) @[el2_ifu_aln_ctl.scala 275:25]
-    node f0pc_plus1 = tail(_T_361, 1) @[el2_ifu_aln_ctl.scala 275:25]
-    node _T_362 = add(f1pc, UInt<1>("h01")) @[el2_ifu_aln_ctl.scala 277:25]
-    node f1pc_plus1 = tail(_T_362, 1) @[el2_ifu_aln_ctl.scala 277:25]
-    node _T_363 = bits(f1_shift_2B, 0, 0) @[Bitwise.scala 72:15]
-    node _T_364 = mux(_T_363, UInt<31>("h07fffffff"), UInt<31>("h00")) @[Bitwise.scala 72:12]
-    node _T_365 = and(_T_364, f1pc_plus1) @[el2_ifu_aln_ctl.scala 279:38]
-    node _T_366 = eq(f1_shift_2B, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 279:64]
-    node _T_367 = bits(_T_366, 0, 0) @[Bitwise.scala 72:15]
-    node _T_368 = mux(_T_367, UInt<31>("h07fffffff"), UInt<31>("h00")) @[Bitwise.scala 72:12]
-    node _T_369 = and(_T_368, f1pc) @[el2_ifu_aln_ctl.scala 279:78]
-    node sf1pc = or(_T_365, _T_369) @[el2_ifu_aln_ctl.scala 279:52]
-    node _T_370 = bits(fetch_to_f1, 0, 0) @[el2_ifu_aln_ctl.scala 281:36]
-    node _T_371 = bits(shift_f2_f1, 0, 0) @[el2_ifu_aln_ctl.scala 282:17]
-    node _T_372 = eq(fetch_to_f1, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 283:6]
-    node _T_373 = eq(shift_f2_f1, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 283:21]
-    node _T_374 = and(_T_372, _T_373) @[el2_ifu_aln_ctl.scala 283:19]
-    node _T_375 = bits(_T_374, 0, 0) @[el2_ifu_aln_ctl.scala 283:35]
-    node _T_376 = mux(_T_370, io.ifu_fetch_pc, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_377 = mux(_T_371, f2pc, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_378 = mux(_T_375, sf1pc, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_379 = or(_T_376, _T_377) @[Mux.scala 27:72]
-    node _T_380 = or(_T_379, _T_378) @[Mux.scala 27:72]
-    wire _T_381 : UInt @[Mux.scala 27:72]
-    _T_381 <= _T_380 @[Mux.scala 27:72]
-    f1pc_in <= _T_381 @[el2_ifu_aln_ctl.scala 281:11]
-    node _T_382 = bits(fetch_to_f0, 0, 0) @[el2_ifu_aln_ctl.scala 285:36]
-    node _T_383 = bits(shift_f2_f0, 0, 0) @[el2_ifu_aln_ctl.scala 286:36]
-    node _T_384 = bits(shift_f1_f0, 0, 0) @[el2_ifu_aln_ctl.scala 287:36]
-    node _T_385 = eq(fetch_to_f0, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 288:24]
-    node _T_386 = eq(shift_f2_f0, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 288:39]
-    node _T_387 = and(_T_385, _T_386) @[el2_ifu_aln_ctl.scala 288:37]
-    node _T_388 = eq(shift_f1_f0, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 288:54]
-    node _T_389 = and(_T_387, _T_388) @[el2_ifu_aln_ctl.scala 288:52]
-    node _T_390 = bits(_T_389, 0, 0) @[el2_ifu_aln_ctl.scala 288:68]
-    node _T_391 = mux(_T_382, io.ifu_fetch_pc, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_392 = mux(_T_383, f2pc, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_393 = mux(_T_384, sf1pc, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_394 = mux(_T_390, f0pc_plus1, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_395 = or(_T_391, _T_392) @[Mux.scala 27:72]
+    brdata1final <= _T_277 @[Mux.scala 27:72]
+    node _T_278 = bits(brdata0final, 6, 6) @[el2_ifu_aln_ctl.scala 236:31]
+    node _T_279 = bits(brdata0final, 0, 0) @[el2_ifu_aln_ctl.scala 236:47]
+    node f0ret = cat(_T_278, _T_279) @[Cat.scala 29:58]
+    node _T_280 = bits(brdata0final, 7, 7) @[el2_ifu_aln_ctl.scala 237:33]
+    node _T_281 = bits(brdata0final, 1, 1) @[el2_ifu_aln_ctl.scala 237:49]
+    node f0brend = cat(_T_280, _T_281) @[Cat.scala 29:58]
+    node _T_282 = bits(brdata0final, 8, 8) @[el2_ifu_aln_ctl.scala 238:31]
+    node _T_283 = bits(brdata0final, 2, 2) @[el2_ifu_aln_ctl.scala 238:47]
+    node f0way = cat(_T_282, _T_283) @[Cat.scala 29:58]
+    node _T_284 = bits(brdata0final, 9, 9) @[el2_ifu_aln_ctl.scala 239:31]
+    node _T_285 = bits(brdata0final, 3, 3) @[el2_ifu_aln_ctl.scala 239:47]
+    node f0pc4 = cat(_T_284, _T_285) @[Cat.scala 29:58]
+    node _T_286 = bits(brdata0final, 10, 10) @[el2_ifu_aln_ctl.scala 240:33]
+    node _T_287 = bits(brdata0final, 4, 4) @[el2_ifu_aln_ctl.scala 240:50]
+    node f0hist0 = cat(_T_286, _T_287) @[Cat.scala 29:58]
+    node _T_288 = bits(brdata0final, 11, 11) @[el2_ifu_aln_ctl.scala 241:33]
+    node _T_289 = bits(brdata0final, 5, 5) @[el2_ifu_aln_ctl.scala 241:50]
+    node f0hist1 = cat(_T_288, _T_289) @[Cat.scala 29:58]
+    node _T_290 = bits(brdata1final, 6, 6) @[el2_ifu_aln_ctl.scala 243:31]
+    node _T_291 = bits(brdata1final, 0, 0) @[el2_ifu_aln_ctl.scala 243:47]
+    node f1ret = cat(_T_290, _T_291) @[Cat.scala 29:58]
+    node _T_292 = bits(brdata1final, 7, 7) @[el2_ifu_aln_ctl.scala 244:33]
+    node _T_293 = bits(brdata1final, 1, 1) @[el2_ifu_aln_ctl.scala 244:49]
+    node f1brend = cat(_T_292, _T_293) @[Cat.scala 29:58]
+    node _T_294 = bits(brdata1final, 8, 8) @[el2_ifu_aln_ctl.scala 245:31]
+    node _T_295 = bits(brdata1final, 2, 2) @[el2_ifu_aln_ctl.scala 245:47]
+    node f1way = cat(_T_294, _T_295) @[Cat.scala 29:58]
+    node _T_296 = bits(brdata1final, 9, 9) @[el2_ifu_aln_ctl.scala 246:31]
+    node _T_297 = bits(brdata1final, 3, 3) @[el2_ifu_aln_ctl.scala 246:47]
+    node f1pc4 = cat(_T_296, _T_297) @[Cat.scala 29:58]
+    node _T_298 = bits(brdata1final, 10, 10) @[el2_ifu_aln_ctl.scala 247:33]
+    node _T_299 = bits(brdata1final, 4, 4) @[el2_ifu_aln_ctl.scala 247:50]
+    node f1hist0 = cat(_T_298, _T_299) @[Cat.scala 29:58]
+    node _T_300 = bits(brdata1final, 11, 11) @[el2_ifu_aln_ctl.scala 248:33]
+    node _T_301 = bits(brdata1final, 5, 5) @[el2_ifu_aln_ctl.scala 248:50]
+    node f1hist1 = cat(_T_300, _T_301) @[Cat.scala 29:58]
+    node _T_302 = bits(f2val, 0, 0) @[el2_ifu_aln_ctl.scala 251:20]
+    f2_valid <= _T_302 @[el2_ifu_aln_ctl.scala 251:12]
+    node _T_303 = bits(sf1val, 0, 0) @[el2_ifu_aln_ctl.scala 252:22]
+    sf1_valid <= _T_303 @[el2_ifu_aln_ctl.scala 252:13]
+    node _T_304 = bits(sf0val, 0, 0) @[el2_ifu_aln_ctl.scala 253:22]
+    sf0_valid <= _T_304 @[el2_ifu_aln_ctl.scala 253:13]
+    node _T_305 = bits(sf0val, 0, 0) @[el2_ifu_aln_ctl.scala 255:28]
+    node _T_306 = eq(_T_305, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 255:21]
+    node _T_307 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 255:39]
+    node consume_fb0 = and(_T_306, _T_307) @[el2_ifu_aln_ctl.scala 255:32]
+    node _T_308 = bits(sf1val, 0, 0) @[el2_ifu_aln_ctl.scala 256:28]
+    node _T_309 = eq(_T_308, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 256:21]
+    node _T_310 = bits(f1val, 0, 0) @[el2_ifu_aln_ctl.scala 256:39]
+    node consume_fb1 = and(_T_309, _T_310) @[el2_ifu_aln_ctl.scala 256:32]
+    node _T_311 = eq(consume_fb1, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 258:39]
+    node _T_312 = and(consume_fb0, _T_311) @[el2_ifu_aln_ctl.scala 258:37]
+    node _T_313 = eq(io.exu_flush_final, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 258:54]
+    node _T_314 = and(_T_312, _T_313) @[el2_ifu_aln_ctl.scala 258:52]
+    io.ifu_fb_consume1 <= _T_314 @[el2_ifu_aln_ctl.scala 258:22]
+    node _T_315 = and(consume_fb0, consume_fb1) @[el2_ifu_aln_ctl.scala 259:37]
+    node _T_316 = eq(io.exu_flush_final, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 259:54]
+    node _T_317 = and(_T_315, _T_316) @[el2_ifu_aln_ctl.scala 259:52]
+    io.ifu_fb_consume2 <= _T_317 @[el2_ifu_aln_ctl.scala 259:22]
+    node _T_318 = bits(io.ifu_fetch_val, 0, 0) @[el2_ifu_aln_ctl.scala 261:30]
+    ifvalid <= _T_318 @[el2_ifu_aln_ctl.scala 261:11]
+    node _T_319 = eq(sf0_valid, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 263:18]
+    node _T_320 = and(_T_319, sf1_valid) @[el2_ifu_aln_ctl.scala 263:29]
+    shift_f1_f0 <= _T_320 @[el2_ifu_aln_ctl.scala 263:15]
+    node _T_321 = eq(sf0_valid, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 264:18]
+    node _T_322 = eq(sf1_valid, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 264:31]
+    node _T_323 = and(_T_321, _T_322) @[el2_ifu_aln_ctl.scala 264:29]
+    node _T_324 = and(_T_323, f2_valid) @[el2_ifu_aln_ctl.scala 264:42]
+    shift_f2_f0 <= _T_324 @[el2_ifu_aln_ctl.scala 264:15]
+    node _T_325 = eq(sf0_valid, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 265:18]
+    node _T_326 = and(_T_325, sf1_valid) @[el2_ifu_aln_ctl.scala 265:29]
+    node _T_327 = and(_T_326, f2_valid) @[el2_ifu_aln_ctl.scala 265:42]
+    shift_f2_f1 <= _T_327 @[el2_ifu_aln_ctl.scala 265:15]
+    node _T_328 = eq(sf0_valid, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 267:26]
+    node _T_329 = eq(sf1_valid, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 267:39]
+    node _T_330 = and(_T_328, _T_329) @[el2_ifu_aln_ctl.scala 267:37]
+    node _T_331 = eq(f2_valid, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 267:52]
+    node _T_332 = and(_T_330, _T_331) @[el2_ifu_aln_ctl.scala 267:50]
+    node _T_333 = and(_T_332, ifvalid) @[el2_ifu_aln_ctl.scala 267:62]
+    fetch_to_f0 <= _T_333 @[el2_ifu_aln_ctl.scala 267:22]
+    node _T_334 = eq(sf0_valid, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 268:26]
+    node _T_335 = eq(sf1_valid, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 268:39]
+    node _T_336 = and(_T_334, _T_335) @[el2_ifu_aln_ctl.scala 268:37]
+    node _T_337 = and(_T_336, f2_valid) @[el2_ifu_aln_ctl.scala 268:50]
+    node _T_338 = and(_T_337, ifvalid) @[el2_ifu_aln_ctl.scala 268:62]
+    node _T_339 = eq(sf0_valid, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 269:26]
+    node _T_340 = and(_T_339, sf1_valid) @[el2_ifu_aln_ctl.scala 269:37]
+    node _T_341 = eq(f2_valid, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 269:52]
+    node _T_342 = and(_T_340, _T_341) @[el2_ifu_aln_ctl.scala 269:50]
+    node _T_343 = and(_T_342, ifvalid) @[el2_ifu_aln_ctl.scala 269:62]
+    node _T_344 = or(_T_338, _T_343) @[el2_ifu_aln_ctl.scala 268:74]
+    node _T_345 = eq(sf1_valid, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 270:39]
+    node _T_346 = and(sf0_valid, _T_345) @[el2_ifu_aln_ctl.scala 270:37]
+    node _T_347 = eq(f2_valid, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 270:52]
+    node _T_348 = and(_T_346, _T_347) @[el2_ifu_aln_ctl.scala 270:50]
+    node _T_349 = and(_T_348, ifvalid) @[el2_ifu_aln_ctl.scala 270:62]
+    node _T_350 = or(_T_344, _T_349) @[el2_ifu_aln_ctl.scala 269:74]
+    fetch_to_f1 <= _T_350 @[el2_ifu_aln_ctl.scala 268:22]
+    node _T_351 = eq(sf0_valid, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 272:26]
+    node _T_352 = and(_T_351, sf1_valid) @[el2_ifu_aln_ctl.scala 272:37]
+    node _T_353 = and(_T_352, f2_valid) @[el2_ifu_aln_ctl.scala 272:50]
+    node _T_354 = and(_T_353, ifvalid) @[el2_ifu_aln_ctl.scala 272:62]
+    node _T_355 = and(sf0_valid, sf1_valid) @[el2_ifu_aln_ctl.scala 273:37]
+    node _T_356 = eq(f2_valid, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 273:52]
+    node _T_357 = and(_T_355, _T_356) @[el2_ifu_aln_ctl.scala 273:50]
+    node _T_358 = and(_T_357, ifvalid) @[el2_ifu_aln_ctl.scala 273:62]
+    node _T_359 = or(_T_354, _T_358) @[el2_ifu_aln_ctl.scala 272:74]
+    fetch_to_f2 <= _T_359 @[el2_ifu_aln_ctl.scala 272:22]
+    node _T_360 = add(f0pc, UInt<1>("h01")) @[el2_ifu_aln_ctl.scala 275:25]
+    node f0pc_plus1 = tail(_T_360, 1) @[el2_ifu_aln_ctl.scala 275:25]
+    node _T_361 = add(f1pc, UInt<1>("h01")) @[el2_ifu_aln_ctl.scala 277:25]
+    node f1pc_plus1 = tail(_T_361, 1) @[el2_ifu_aln_ctl.scala 277:25]
+    node _T_362 = bits(f1_shift_2B, 0, 0) @[Bitwise.scala 72:15]
+    node _T_363 = mux(_T_362, UInt<31>("h07fffffff"), UInt<31>("h00")) @[Bitwise.scala 72:12]
+    node _T_364 = and(_T_363, f1pc_plus1) @[el2_ifu_aln_ctl.scala 279:38]
+    node _T_365 = eq(f1_shift_2B, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 279:64]
+    node _T_366 = bits(_T_365, 0, 0) @[Bitwise.scala 72:15]
+    node _T_367 = mux(_T_366, UInt<31>("h07fffffff"), UInt<31>("h00")) @[Bitwise.scala 72:12]
+    node _T_368 = and(_T_367, f1pc) @[el2_ifu_aln_ctl.scala 279:78]
+    node sf1pc = or(_T_364, _T_368) @[el2_ifu_aln_ctl.scala 279:52]
+    node _T_369 = bits(fetch_to_f1, 0, 0) @[el2_ifu_aln_ctl.scala 281:36]
+    node _T_370 = bits(shift_f2_f1, 0, 0) @[el2_ifu_aln_ctl.scala 282:17]
+    node _T_371 = eq(fetch_to_f1, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 283:6]
+    node _T_372 = eq(shift_f2_f1, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 283:21]
+    node _T_373 = and(_T_371, _T_372) @[el2_ifu_aln_ctl.scala 283:19]
+    node _T_374 = bits(_T_373, 0, 0) @[el2_ifu_aln_ctl.scala 283:35]
+    node _T_375 = mux(_T_369, io.ifu_fetch_pc, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_376 = mux(_T_370, f2pc, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_377 = mux(_T_374, sf1pc, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_378 = or(_T_375, _T_376) @[Mux.scala 27:72]
+    node _T_379 = or(_T_378, _T_377) @[Mux.scala 27:72]
+    wire _T_380 : UInt @[Mux.scala 27:72]
+    _T_380 <= _T_379 @[Mux.scala 27:72]
+    f1pc_in <= _T_380 @[el2_ifu_aln_ctl.scala 281:11]
+    node _T_381 = bits(fetch_to_f0, 0, 0) @[el2_ifu_aln_ctl.scala 285:36]
+    node _T_382 = bits(shift_f2_f0, 0, 0) @[el2_ifu_aln_ctl.scala 286:36]
+    node _T_383 = bits(shift_f1_f0, 0, 0) @[el2_ifu_aln_ctl.scala 287:36]
+    node _T_384 = eq(fetch_to_f0, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 288:24]
+    node _T_385 = eq(shift_f2_f0, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 288:39]
+    node _T_386 = and(_T_384, _T_385) @[el2_ifu_aln_ctl.scala 288:37]
+    node _T_387 = eq(shift_f1_f0, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 288:54]
+    node _T_388 = and(_T_386, _T_387) @[el2_ifu_aln_ctl.scala 288:52]
+    node _T_389 = bits(_T_388, 0, 0) @[el2_ifu_aln_ctl.scala 288:68]
+    node _T_390 = mux(_T_381, io.ifu_fetch_pc, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_391 = mux(_T_382, f2pc, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_392 = mux(_T_383, sf1pc, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_393 = mux(_T_389, f0pc_plus1, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_394 = or(_T_390, _T_391) @[Mux.scala 27:72]
+    node _T_395 = or(_T_394, _T_392) @[Mux.scala 27:72]
     node _T_396 = or(_T_395, _T_393) @[Mux.scala 27:72]
-    node _T_397 = or(_T_396, _T_394) @[Mux.scala 27:72]
-    wire _T_398 : UInt @[Mux.scala 27:72]
-    _T_398 <= _T_397 @[Mux.scala 27:72]
-    f0pc_in <= _T_398 @[el2_ifu_aln_ctl.scala 285:11]
-    node _T_399 = eq(io.exu_flush_final, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 290:40]
-    node _T_400 = and(fetch_to_f2, _T_399) @[el2_ifu_aln_ctl.scala 290:38]
-    node _T_401 = bits(_T_400, 0, 0) @[el2_ifu_aln_ctl.scala 290:61]
-    node _T_402 = eq(fetch_to_f2, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 291:25]
-    node _T_403 = eq(shift_f2_f1, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 291:40]
-    node _T_404 = and(_T_402, _T_403) @[el2_ifu_aln_ctl.scala 291:38]
-    node _T_405 = eq(shift_f2_f0, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 291:55]
-    node _T_406 = and(_T_404, _T_405) @[el2_ifu_aln_ctl.scala 291:53]
-    node _T_407 = eq(io.exu_flush_final, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 291:70]
-    node _T_408 = and(_T_406, _T_407) @[el2_ifu_aln_ctl.scala 291:68]
-    node _T_409 = bits(_T_408, 0, 0) @[el2_ifu_aln_ctl.scala 291:91]
-    node _T_410 = mux(_T_401, io.ifu_fetch_val, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_411 = mux(_T_409, f2val, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_412 = or(_T_410, _T_411) @[Mux.scala 27:72]
-    wire _T_413 : UInt @[Mux.scala 27:72]
-    _T_413 <= _T_412 @[Mux.scala 27:72]
-    f2val_in <= _T_413 @[el2_ifu_aln_ctl.scala 290:12]
-    node _T_414 = bits(f1_shift_2B, 0, 0) @[el2_ifu_aln_ctl.scala 293:35]
-    node _T_415 = bits(f1val, 1, 1) @[el2_ifu_aln_ctl.scala 293:48]
-    node _T_416 = bits(f1_shift_2B, 0, 0) @[el2_ifu_aln_ctl.scala 293:66]
-    node _T_417 = eq(_T_416, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 293:53]
-    node _T_418 = mux(_T_414, _T_415, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_419 = mux(_T_417, f1val, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_420 = or(_T_418, _T_419) @[Mux.scala 27:72]
-    wire _T_421 : UInt @[Mux.scala 27:72]
-    _T_421 <= _T_420 @[Mux.scala 27:72]
-    sf1val <= _T_421 @[el2_ifu_aln_ctl.scala 293:10]
-    node _T_422 = eq(io.exu_flush_final, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 295:71]
-    node _T_423 = and(fetch_to_f1, _T_422) @[el2_ifu_aln_ctl.scala 295:39]
-    node _T_424 = bits(_T_423, 0, 0) @[el2_ifu_aln_ctl.scala 295:92]
-    node _T_425 = eq(io.exu_flush_final, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 296:71]
-    node _T_426 = and(shift_f2_f1, _T_425) @[el2_ifu_aln_ctl.scala 296:54]
-    node _T_427 = bits(_T_426, 0, 0) @[el2_ifu_aln_ctl.scala 296:92]
-    node _T_428 = eq(fetch_to_f1, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 297:26]
-    node _T_429 = eq(shift_f2_f1, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 297:41]
-    node _T_430 = and(_T_428, _T_429) @[el2_ifu_aln_ctl.scala 297:39]
-    node _T_431 = eq(shift_f1_f0, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 297:56]
-    node _T_432 = and(_T_430, _T_431) @[el2_ifu_aln_ctl.scala 297:54]
-    node _T_433 = eq(io.exu_flush_final, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 297:71]
-    node _T_434 = and(_T_432, _T_433) @[el2_ifu_aln_ctl.scala 297:69]
-    node _T_435 = bits(_T_434, 0, 0) @[el2_ifu_aln_ctl.scala 297:92]
-    node _T_436 = mux(_T_424, io.ifu_fetch_val, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_437 = mux(_T_427, f2val, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_438 = mux(_T_435, sf1val, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_439 = or(_T_436, _T_437) @[Mux.scala 27:72]
-    node _T_440 = or(_T_439, _T_438) @[Mux.scala 27:72]
-    wire _T_441 : UInt @[Mux.scala 27:72]
-    _T_441 <= _T_440 @[Mux.scala 27:72]
-    f1val_in <= _T_441 @[el2_ifu_aln_ctl.scala 295:12]
-    node _T_442 = bits(shift_2B, 0, 0) @[el2_ifu_aln_ctl.scala 299:32]
-    node _T_443 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 299:54]
-    node _T_444 = cat(UInt<1>("h00"), _T_443) @[Cat.scala 29:58]
-    node _T_445 = eq(shift_2B, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 300:18]
-    node _T_446 = eq(shift_4B, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 300:30]
-    node _T_447 = and(_T_445, _T_446) @[el2_ifu_aln_ctl.scala 300:28]
-    node _T_448 = bits(_T_447, 0, 0) @[el2_ifu_aln_ctl.scala 300:41]
-    node _T_449 = mux(_T_442, _T_444, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_450 = mux(_T_448, f0val, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_451 = or(_T_449, _T_450) @[Mux.scala 27:72]
-    wire _T_452 : UInt @[Mux.scala 27:72]
-    _T_452 <= _T_451 @[Mux.scala 27:72]
-    sf0val <= _T_452 @[el2_ifu_aln_ctl.scala 299:10]
-    node _T_453 = eq(io.exu_flush_final, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 302:71]
-    node _T_454 = and(fetch_to_f0, _T_453) @[el2_ifu_aln_ctl.scala 302:38]
-    node _T_455 = bits(_T_454, 0, 0) @[el2_ifu_aln_ctl.scala 302:92]
-    node _T_456 = eq(io.exu_flush_final, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 303:71]
-    node _T_457 = and(shift_f2_f0, _T_456) @[el2_ifu_aln_ctl.scala 303:54]
-    node _T_458 = bits(_T_457, 0, 0) @[el2_ifu_aln_ctl.scala 303:92]
-    node _T_459 = eq(io.exu_flush_final, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 304:71]
-    node _T_460 = and(shift_f1_f0, _T_459) @[el2_ifu_aln_ctl.scala 304:69]
-    node _T_461 = bits(_T_460, 0, 0) @[el2_ifu_aln_ctl.scala 304:92]
-    node _T_462 = eq(fetch_to_f0, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 305:26]
-    node _T_463 = eq(shift_f2_f0, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 305:41]
-    node _T_464 = and(_T_462, _T_463) @[el2_ifu_aln_ctl.scala 305:39]
-    node _T_465 = eq(shift_f1_f0, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 305:56]
-    node _T_466 = and(_T_464, _T_465) @[el2_ifu_aln_ctl.scala 305:54]
-    node _T_467 = eq(io.exu_flush_final, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 305:71]
-    node _T_468 = and(_T_466, _T_467) @[el2_ifu_aln_ctl.scala 305:69]
-    node _T_469 = bits(_T_468, 0, 0) @[el2_ifu_aln_ctl.scala 305:92]
-    node _T_470 = mux(_T_455, io.ifu_fetch_val, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_471 = mux(_T_458, f2val, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_472 = mux(_T_461, sf1val, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_473 = mux(_T_469, sf0val, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_474 = or(_T_470, _T_471) @[Mux.scala 27:72]
+    wire _T_397 : UInt @[Mux.scala 27:72]
+    _T_397 <= _T_396 @[Mux.scala 27:72]
+    f0pc_in <= _T_397 @[el2_ifu_aln_ctl.scala 285:11]
+    node _T_398 = eq(io.exu_flush_final, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 290:40]
+    node _T_399 = and(fetch_to_f2, _T_398) @[el2_ifu_aln_ctl.scala 290:38]
+    node _T_400 = bits(_T_399, 0, 0) @[el2_ifu_aln_ctl.scala 290:61]
+    node _T_401 = eq(fetch_to_f2, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 291:25]
+    node _T_402 = eq(shift_f2_f1, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 291:40]
+    node _T_403 = and(_T_401, _T_402) @[el2_ifu_aln_ctl.scala 291:38]
+    node _T_404 = eq(shift_f2_f0, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 291:55]
+    node _T_405 = and(_T_403, _T_404) @[el2_ifu_aln_ctl.scala 291:53]
+    node _T_406 = eq(io.exu_flush_final, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 291:70]
+    node _T_407 = and(_T_405, _T_406) @[el2_ifu_aln_ctl.scala 291:68]
+    node _T_408 = bits(_T_407, 0, 0) @[el2_ifu_aln_ctl.scala 291:91]
+    node _T_409 = mux(_T_400, io.ifu_fetch_val, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_410 = mux(_T_408, f2val, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_411 = or(_T_409, _T_410) @[Mux.scala 27:72]
+    wire _T_412 : UInt @[Mux.scala 27:72]
+    _T_412 <= _T_411 @[Mux.scala 27:72]
+    f2val_in <= _T_412 @[el2_ifu_aln_ctl.scala 290:12]
+    node _T_413 = bits(f1_shift_2B, 0, 0) @[el2_ifu_aln_ctl.scala 293:35]
+    node _T_414 = bits(f1val, 1, 1) @[el2_ifu_aln_ctl.scala 293:48]
+    node _T_415 = bits(f1_shift_2B, 0, 0) @[el2_ifu_aln_ctl.scala 293:66]
+    node _T_416 = eq(_T_415, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 293:53]
+    node _T_417 = mux(_T_413, _T_414, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_418 = mux(_T_416, f1val, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_419 = or(_T_417, _T_418) @[Mux.scala 27:72]
+    wire _T_420 : UInt @[Mux.scala 27:72]
+    _T_420 <= _T_419 @[Mux.scala 27:72]
+    sf1val <= _T_420 @[el2_ifu_aln_ctl.scala 293:10]
+    node _T_421 = eq(io.exu_flush_final, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 295:71]
+    node _T_422 = and(fetch_to_f1, _T_421) @[el2_ifu_aln_ctl.scala 295:39]
+    node _T_423 = bits(_T_422, 0, 0) @[el2_ifu_aln_ctl.scala 295:92]
+    node _T_424 = eq(io.exu_flush_final, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 296:71]
+    node _T_425 = and(shift_f2_f1, _T_424) @[el2_ifu_aln_ctl.scala 296:54]
+    node _T_426 = bits(_T_425, 0, 0) @[el2_ifu_aln_ctl.scala 296:92]
+    node _T_427 = eq(fetch_to_f1, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 297:26]
+    node _T_428 = eq(shift_f2_f1, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 297:41]
+    node _T_429 = and(_T_427, _T_428) @[el2_ifu_aln_ctl.scala 297:39]
+    node _T_430 = eq(shift_f1_f0, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 297:56]
+    node _T_431 = and(_T_429, _T_430) @[el2_ifu_aln_ctl.scala 297:54]
+    node _T_432 = eq(io.exu_flush_final, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 297:71]
+    node _T_433 = and(_T_431, _T_432) @[el2_ifu_aln_ctl.scala 297:69]
+    node _T_434 = bits(_T_433, 0, 0) @[el2_ifu_aln_ctl.scala 297:92]
+    node _T_435 = mux(_T_423, io.ifu_fetch_val, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_436 = mux(_T_426, f2val, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_437 = mux(_T_434, sf1val, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_438 = or(_T_435, _T_436) @[Mux.scala 27:72]
+    node _T_439 = or(_T_438, _T_437) @[Mux.scala 27:72]
+    wire _T_440 : UInt @[Mux.scala 27:72]
+    _T_440 <= _T_439 @[Mux.scala 27:72]
+    f1val_in <= _T_440 @[el2_ifu_aln_ctl.scala 295:12]
+    node _T_441 = bits(shift_2B, 0, 0) @[el2_ifu_aln_ctl.scala 299:32]
+    node _T_442 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 299:54]
+    node _T_443 = cat(UInt<1>("h00"), _T_442) @[Cat.scala 29:58]
+    node _T_444 = eq(shift_2B, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 300:18]
+    node _T_445 = eq(shift_4B, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 300:30]
+    node _T_446 = and(_T_444, _T_445) @[el2_ifu_aln_ctl.scala 300:28]
+    node _T_447 = bits(_T_446, 0, 0) @[el2_ifu_aln_ctl.scala 300:41]
+    node _T_448 = mux(_T_441, _T_443, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_449 = mux(_T_447, f0val, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_450 = or(_T_448, _T_449) @[Mux.scala 27:72]
+    wire _T_451 : UInt @[Mux.scala 27:72]
+    _T_451 <= _T_450 @[Mux.scala 27:72]
+    sf0val <= _T_451 @[el2_ifu_aln_ctl.scala 299:10]
+    node _T_452 = eq(io.exu_flush_final, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 302:71]
+    node _T_453 = and(fetch_to_f0, _T_452) @[el2_ifu_aln_ctl.scala 302:38]
+    node _T_454 = bits(_T_453, 0, 0) @[el2_ifu_aln_ctl.scala 302:92]
+    node _T_455 = eq(io.exu_flush_final, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 303:71]
+    node _T_456 = and(shift_f2_f0, _T_455) @[el2_ifu_aln_ctl.scala 303:54]
+    node _T_457 = bits(_T_456, 0, 0) @[el2_ifu_aln_ctl.scala 303:92]
+    node _T_458 = eq(io.exu_flush_final, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 304:71]
+    node _T_459 = and(shift_f1_f0, _T_458) @[el2_ifu_aln_ctl.scala 304:69]
+    node _T_460 = bits(_T_459, 0, 0) @[el2_ifu_aln_ctl.scala 304:92]
+    node _T_461 = eq(fetch_to_f0, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 305:26]
+    node _T_462 = eq(shift_f2_f0, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 305:41]
+    node _T_463 = and(_T_461, _T_462) @[el2_ifu_aln_ctl.scala 305:39]
+    node _T_464 = eq(shift_f1_f0, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 305:56]
+    node _T_465 = and(_T_463, _T_464) @[el2_ifu_aln_ctl.scala 305:54]
+    node _T_466 = eq(io.exu_flush_final, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 305:71]
+    node _T_467 = and(_T_465, _T_466) @[el2_ifu_aln_ctl.scala 305:69]
+    node _T_468 = bits(_T_467, 0, 0) @[el2_ifu_aln_ctl.scala 305:92]
+    node _T_469 = mux(_T_454, io.ifu_fetch_val, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_470 = mux(_T_457, f2val, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_471 = mux(_T_460, sf1val, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_472 = mux(_T_468, sf0val, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_473 = or(_T_469, _T_470) @[Mux.scala 27:72]
+    node _T_474 = or(_T_473, _T_471) @[Mux.scala 27:72]
     node _T_475 = or(_T_474, _T_472) @[Mux.scala 27:72]
-    node _T_476 = or(_T_475, _T_473) @[Mux.scala 27:72]
-    wire _T_477 : UInt @[Mux.scala 27:72]
-    _T_477 <= _T_476 @[Mux.scala 27:72]
-    f0val_in <= _T_477 @[el2_ifu_aln_ctl.scala 302:12]
-    node _T_478 = bits(qren, 0, 0) @[el2_ifu_aln_ctl.scala 307:28]
-    node _T_479 = bits(_T_478, 0, 0) @[el2_ifu_aln_ctl.scala 307:32]
-    node _T_480 = cat(q1, q0) @[Cat.scala 29:58]
-    node _T_481 = bits(qren, 1, 1) @[el2_ifu_aln_ctl.scala 308:9]
-    node _T_482 = bits(_T_481, 0, 0) @[el2_ifu_aln_ctl.scala 308:13]
-    node _T_483 = cat(q2, q1) @[Cat.scala 29:58]
-    node _T_484 = bits(qren, 2, 2) @[el2_ifu_aln_ctl.scala 309:9]
-    node _T_485 = bits(_T_484, 0, 0) @[el2_ifu_aln_ctl.scala 309:13]
-    node _T_486 = cat(q0, q2) @[Cat.scala 29:58]
-    node _T_487 = mux(_T_479, _T_480, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_488 = mux(_T_482, _T_483, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_489 = mux(_T_485, _T_486, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_490 = or(_T_487, _T_488) @[Mux.scala 27:72]
-    node _T_491 = or(_T_490, _T_489) @[Mux.scala 27:72]
+    wire _T_476 : UInt @[Mux.scala 27:72]
+    _T_476 <= _T_475 @[Mux.scala 27:72]
+    f0val_in <= _T_476 @[el2_ifu_aln_ctl.scala 302:12]
+    node _T_477 = bits(qren, 0, 0) @[el2_ifu_aln_ctl.scala 307:28]
+    node _T_478 = bits(_T_477, 0, 0) @[el2_ifu_aln_ctl.scala 307:32]
+    node _T_479 = cat(q1, q0) @[Cat.scala 29:58]
+    node _T_480 = bits(qren, 1, 1) @[el2_ifu_aln_ctl.scala 308:9]
+    node _T_481 = bits(_T_480, 0, 0) @[el2_ifu_aln_ctl.scala 308:13]
+    node _T_482 = cat(q2, q1) @[Cat.scala 29:58]
+    node _T_483 = bits(qren, 2, 2) @[el2_ifu_aln_ctl.scala 309:9]
+    node _T_484 = bits(_T_483, 0, 0) @[el2_ifu_aln_ctl.scala 309:13]
+    node _T_485 = cat(q0, q2) @[Cat.scala 29:58]
+    node _T_486 = mux(_T_478, _T_479, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_487 = mux(_T_481, _T_482, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_488 = mux(_T_484, _T_485, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_489 = or(_T_486, _T_487) @[Mux.scala 27:72]
+    node _T_490 = or(_T_489, _T_488) @[Mux.scala 27:72]
     wire qeff : UInt<64> @[Mux.scala 27:72]
-    qeff <= _T_491 @[Mux.scala 27:72]
+    qeff <= _T_490 @[Mux.scala 27:72]
     node q1eff = bits(qeff, 63, 32) @[el2_ifu_aln_ctl.scala 310:29]
     node q0eff = bits(qeff, 31, 0) @[el2_ifu_aln_ctl.scala 310:42]
-    node _T_492 = bits(q0sel, 0, 0) @[el2_ifu_aln_ctl.scala 312:29]
-    node _T_493 = bits(_T_492, 0, 0) @[el2_ifu_aln_ctl.scala 312:33]
-    node _T_494 = bits(q0sel, 1, 1) @[el2_ifu_aln_ctl.scala 312:53]
-    node _T_495 = bits(_T_494, 0, 0) @[el2_ifu_aln_ctl.scala 312:57]
-    node _T_496 = bits(q0eff, 31, 16) @[el2_ifu_aln_ctl.scala 312:70]
-    node _T_497 = mux(_T_493, q0eff, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_498 = mux(_T_495, _T_496, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_499 = or(_T_497, _T_498) @[Mux.scala 27:72]
-    wire _T_500 : UInt<32> @[Mux.scala 27:72]
-    _T_500 <= _T_499 @[Mux.scala 27:72]
-    q0final <= _T_500 @[el2_ifu_aln_ctl.scala 312:11]
-    node _T_501 = bits(q1sel, 0, 0) @[el2_ifu_aln_ctl.scala 314:29]
-    node _T_502 = bits(_T_501, 0, 0) @[el2_ifu_aln_ctl.scala 314:33]
-    node _T_503 = bits(q1eff, 15, 0) @[el2_ifu_aln_ctl.scala 314:46]
-    node _T_504 = bits(q1sel, 1, 1) @[el2_ifu_aln_ctl.scala 314:59]
-    node _T_505 = bits(_T_504, 0, 0) @[el2_ifu_aln_ctl.scala 314:63]
-    node _T_506 = bits(q1eff, 31, 16) @[el2_ifu_aln_ctl.scala 314:76]
-    node _T_507 = mux(_T_502, _T_503, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_508 = mux(_T_505, _T_506, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_509 = or(_T_507, _T_508) @[Mux.scala 27:72]
-    wire _T_510 : UInt<16> @[Mux.scala 27:72]
-    _T_510 <= _T_509 @[Mux.scala 27:72]
-    q1final <= _T_510 @[el2_ifu_aln_ctl.scala 314:11]
-    node _T_511 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 316:34]
-    node _T_512 = bits(_T_511, 0, 0) @[el2_ifu_aln_ctl.scala 316:38]
-    node _T_513 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 316:64]
-    node _T_514 = not(_T_513) @[el2_ifu_aln_ctl.scala 316:58]
-    node _T_515 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 316:75]
-    node _T_516 = and(_T_514, _T_515) @[el2_ifu_aln_ctl.scala 316:68]
-    node _T_517 = bits(_T_516, 0, 0) @[el2_ifu_aln_ctl.scala 316:80]
-    node _T_518 = bits(q1final, 15, 0) @[el2_ifu_aln_ctl.scala 316:101]
-    node _T_519 = bits(q0final, 15, 0) @[el2_ifu_aln_ctl.scala 316:115]
-    node _T_520 = cat(_T_518, _T_519) @[Cat.scala 29:58]
-    node _T_521 = mux(_T_512, q0final, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_522 = mux(_T_517, _T_520, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_523 = or(_T_521, _T_522) @[Mux.scala 27:72]
+    node _T_491 = bits(q0sel, 0, 0) @[el2_ifu_aln_ctl.scala 312:29]
+    node _T_492 = bits(_T_491, 0, 0) @[el2_ifu_aln_ctl.scala 312:33]
+    node _T_493 = bits(q0sel, 1, 1) @[el2_ifu_aln_ctl.scala 312:53]
+    node _T_494 = bits(_T_493, 0, 0) @[el2_ifu_aln_ctl.scala 312:57]
+    node _T_495 = bits(q0eff, 31, 16) @[el2_ifu_aln_ctl.scala 312:70]
+    node _T_496 = mux(_T_492, q0eff, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_497 = mux(_T_494, _T_495, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_498 = or(_T_496, _T_497) @[Mux.scala 27:72]
+    wire _T_499 : UInt<32> @[Mux.scala 27:72]
+    _T_499 <= _T_498 @[Mux.scala 27:72]
+    q0final <= _T_499 @[el2_ifu_aln_ctl.scala 312:11]
+    node _T_500 = bits(q1sel, 0, 0) @[el2_ifu_aln_ctl.scala 314:29]
+    node _T_501 = bits(_T_500, 0, 0) @[el2_ifu_aln_ctl.scala 314:33]
+    node _T_502 = bits(q1eff, 15, 0) @[el2_ifu_aln_ctl.scala 314:46]
+    node _T_503 = bits(q1sel, 1, 1) @[el2_ifu_aln_ctl.scala 314:59]
+    node _T_504 = bits(_T_503, 0, 0) @[el2_ifu_aln_ctl.scala 314:63]
+    node _T_505 = bits(q1eff, 31, 16) @[el2_ifu_aln_ctl.scala 314:76]
+    node _T_506 = mux(_T_501, _T_502, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_507 = mux(_T_504, _T_505, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_508 = or(_T_506, _T_507) @[Mux.scala 27:72]
+    wire _T_509 : UInt<16> @[Mux.scala 27:72]
+    _T_509 <= _T_508 @[Mux.scala 27:72]
+    q1final <= _T_509 @[el2_ifu_aln_ctl.scala 314:11]
+    node _T_510 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 316:34]
+    node _T_511 = bits(_T_510, 0, 0) @[el2_ifu_aln_ctl.scala 316:38]
+    node _T_512 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 316:64]
+    node _T_513 = not(_T_512) @[el2_ifu_aln_ctl.scala 316:58]
+    node _T_514 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 316:75]
+    node _T_515 = and(_T_513, _T_514) @[el2_ifu_aln_ctl.scala 316:68]
+    node _T_516 = bits(_T_515, 0, 0) @[el2_ifu_aln_ctl.scala 316:80]
+    node _T_517 = bits(q1final, 15, 0) @[el2_ifu_aln_ctl.scala 316:101]
+    node _T_518 = bits(q0final, 15, 0) @[el2_ifu_aln_ctl.scala 316:115]
+    node _T_519 = cat(_T_517, _T_518) @[Cat.scala 29:58]
+    node _T_520 = mux(_T_511, q0final, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_521 = mux(_T_516, _T_519, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_522 = or(_T_520, _T_521) @[Mux.scala 27:72]
     wire aligndata : UInt<32> @[Mux.scala 27:72]
-    aligndata <= _T_523 @[Mux.scala 27:72]
-    node _T_524 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 318:30]
-    node _T_525 = bits(_T_524, 0, 0) @[el2_ifu_aln_ctl.scala 318:34]
-    node _T_526 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 318:54]
-    node _T_527 = eq(_T_526, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 318:48]
-    node _T_528 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 318:65]
-    node _T_529 = and(_T_527, _T_528) @[el2_ifu_aln_ctl.scala 318:58]
-    node _T_530 = bits(f1val, 0, 0) @[el2_ifu_aln_ctl.scala 318:82]
-    node _T_531 = cat(_T_530, UInt<1>("h01")) @[Cat.scala 29:58]
-    node _T_532 = mux(_T_525, UInt<2>("h03"), UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_533 = mux(_T_529, _T_531, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_534 = or(_T_532, _T_533) @[Mux.scala 27:72]
-    wire _T_535 : UInt<2> @[Mux.scala 27:72]
-    _T_535 <= _T_534 @[Mux.scala 27:72]
-    alignval <= _T_535 @[el2_ifu_aln_ctl.scala 318:12]
-    node _T_536 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 320:34]
-    node _T_537 = bits(_T_536, 0, 0) @[el2_ifu_aln_ctl.scala 320:38]
-    node _T_538 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 320:63]
-    node _T_539 = not(_T_538) @[el2_ifu_aln_ctl.scala 320:57]
-    node _T_540 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 320:74]
-    node _T_541 = and(_T_539, _T_540) @[el2_ifu_aln_ctl.scala 320:67]
-    node _T_542 = bits(_T_541, 0, 0) @[el2_ifu_aln_ctl.scala 320:79]
-    node _T_543 = cat(f1icaf, f0icaf) @[Cat.scala 29:58]
-    node _T_544 = mux(_T_537, f0icaf, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_545 = mux(_T_542, _T_543, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_546 = or(_T_544, _T_545) @[Mux.scala 27:72]
+    aligndata <= _T_522 @[Mux.scala 27:72]
+    node _T_523 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 318:30]
+    node _T_524 = bits(_T_523, 0, 0) @[el2_ifu_aln_ctl.scala 318:34]
+    node _T_525 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 318:54]
+    node _T_526 = eq(_T_525, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 318:48]
+    node _T_527 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 318:65]
+    node _T_528 = and(_T_526, _T_527) @[el2_ifu_aln_ctl.scala 318:58]
+    node _T_529 = bits(f1val, 0, 0) @[el2_ifu_aln_ctl.scala 318:82]
+    node _T_530 = cat(_T_529, UInt<1>("h01")) @[Cat.scala 29:58]
+    node _T_531 = mux(_T_524, UInt<2>("h03"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_532 = mux(_T_528, _T_530, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_533 = or(_T_531, _T_532) @[Mux.scala 27:72]
+    wire _T_534 : UInt<2> @[Mux.scala 27:72]
+    _T_534 <= _T_533 @[Mux.scala 27:72]
+    alignval <= _T_534 @[el2_ifu_aln_ctl.scala 318:12]
+    node _T_535 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 320:34]
+    node _T_536 = bits(_T_535, 0, 0) @[el2_ifu_aln_ctl.scala 320:38]
+    node _T_537 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 320:63]
+    node _T_538 = not(_T_537) @[el2_ifu_aln_ctl.scala 320:57]
+    node _T_539 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 320:74]
+    node _T_540 = and(_T_538, _T_539) @[el2_ifu_aln_ctl.scala 320:67]
+    node _T_541 = bits(_T_540, 0, 0) @[el2_ifu_aln_ctl.scala 320:79]
+    node _T_542 = cat(f1icaf, f0icaf) @[Cat.scala 29:58]
+    node _T_543 = mux(_T_536, f0icaf, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_544 = mux(_T_541, _T_542, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_545 = or(_T_543, _T_544) @[Mux.scala 27:72]
     wire alignicaf : UInt<2> @[Mux.scala 27:72]
-    alignicaf <= _T_546 @[Mux.scala 27:72]
-    node _T_547 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 322:35]
-    node _T_548 = bits(_T_547, 0, 0) @[el2_ifu_aln_ctl.scala 322:39]
-    node _T_549 = bits(f0dbecc, 0, 0) @[Bitwise.scala 72:15]
-    node _T_550 = mux(_T_549, UInt<2>("h03"), UInt<2>("h00")) @[Bitwise.scala 72:12]
-    node _T_551 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 322:73]
-    node _T_552 = eq(_T_551, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 322:67]
-    node _T_553 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 322:84]
-    node _T_554 = and(_T_552, _T_553) @[el2_ifu_aln_ctl.scala 322:77]
-    node _T_555 = bits(_T_554, 0, 0) @[el2_ifu_aln_ctl.scala 322:89]
-    node _T_556 = cat(f1dbecc, f0dbecc) @[Cat.scala 29:58]
-    node _T_557 = mux(_T_548, _T_550, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_558 = mux(_T_555, _T_556, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_559 = or(_T_557, _T_558) @[Mux.scala 27:72]
+    alignicaf <= _T_545 @[Mux.scala 27:72]
+    node _T_546 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 322:35]
+    node _T_547 = bits(_T_546, 0, 0) @[el2_ifu_aln_ctl.scala 322:39]
+    node _T_548 = bits(f0dbecc, 0, 0) @[Bitwise.scala 72:15]
+    node _T_549 = mux(_T_548, UInt<2>("h03"), UInt<2>("h00")) @[Bitwise.scala 72:12]
+    node _T_550 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 322:73]
+    node _T_551 = eq(_T_550, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 322:67]
+    node _T_552 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 322:84]
+    node _T_553 = and(_T_551, _T_552) @[el2_ifu_aln_ctl.scala 322:77]
+    node _T_554 = bits(_T_553, 0, 0) @[el2_ifu_aln_ctl.scala 322:89]
+    node _T_555 = cat(f1dbecc, f0dbecc) @[Cat.scala 29:58]
+    node _T_556 = mux(_T_547, _T_549, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_557 = mux(_T_554, _T_555, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_558 = or(_T_556, _T_557) @[Mux.scala 27:72]
     wire aligndbecc : UInt<2> @[Mux.scala 27:72]
-    aligndbecc <= _T_559 @[Mux.scala 27:72]
-    node _T_560 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 324:35]
-    node _T_561 = bits(_T_560, 0, 0) @[el2_ifu_aln_ctl.scala 324:45]
-    node _T_562 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 324:65]
-    node _T_563 = eq(_T_562, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 324:59]
-    node _T_564 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 324:76]
-    node _T_565 = and(_T_563, _T_564) @[el2_ifu_aln_ctl.scala 324:69]
-    node _T_566 = bits(_T_565, 0, 0) @[el2_ifu_aln_ctl.scala 324:81]
-    node _T_567 = bits(f1brend, 0, 0) @[el2_ifu_aln_ctl.scala 324:100]
-    node _T_568 = bits(f0brend, 0, 0) @[el2_ifu_aln_ctl.scala 324:111]
-    node _T_569 = cat(_T_567, _T_568) @[Cat.scala 29:58]
-    node _T_570 = mux(_T_561, f0brend, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_571 = mux(_T_566, _T_569, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_572 = or(_T_570, _T_571) @[Mux.scala 27:72]
+    aligndbecc <= _T_558 @[Mux.scala 27:72]
+    node _T_559 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 324:35]
+    node _T_560 = bits(_T_559, 0, 0) @[el2_ifu_aln_ctl.scala 324:45]
+    node _T_561 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 324:65]
+    node _T_562 = eq(_T_561, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 324:59]
+    node _T_563 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 324:76]
+    node _T_564 = and(_T_562, _T_563) @[el2_ifu_aln_ctl.scala 324:69]
+    node _T_565 = bits(_T_564, 0, 0) @[el2_ifu_aln_ctl.scala 324:81]
+    node _T_566 = bits(f1brend, 0, 0) @[el2_ifu_aln_ctl.scala 324:100]
+    node _T_567 = bits(f0brend, 0, 0) @[el2_ifu_aln_ctl.scala 324:111]
+    node _T_568 = cat(_T_566, _T_567) @[Cat.scala 29:58]
+    node _T_569 = mux(_T_560, f0brend, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_570 = mux(_T_565, _T_568, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_571 = or(_T_569, _T_570) @[Mux.scala 27:72]
     wire alignbrend : UInt<2> @[Mux.scala 27:72]
-    alignbrend <= _T_572 @[Mux.scala 27:72]
-    node _T_573 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 326:33]
-    node _T_574 = bits(_T_573, 0, 0) @[el2_ifu_aln_ctl.scala 326:43]
-    node _T_575 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 326:61]
-    node _T_576 = eq(_T_575, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 326:55]
-    node _T_577 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 326:72]
-    node _T_578 = and(_T_576, _T_577) @[el2_ifu_aln_ctl.scala 326:65]
-    node _T_579 = bits(_T_578, 0, 0) @[el2_ifu_aln_ctl.scala 326:77]
-    node _T_580 = bits(f1pc4, 0, 0) @[el2_ifu_aln_ctl.scala 326:94]
-    node _T_581 = bits(f0pc4, 0, 0) @[el2_ifu_aln_ctl.scala 326:103]
-    node _T_582 = cat(_T_580, _T_581) @[Cat.scala 29:58]
-    node _T_583 = mux(_T_574, f0pc4, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_584 = mux(_T_579, _T_582, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_585 = or(_T_583, _T_584) @[Mux.scala 27:72]
+    alignbrend <= _T_571 @[Mux.scala 27:72]
+    node _T_572 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 326:33]
+    node _T_573 = bits(_T_572, 0, 0) @[el2_ifu_aln_ctl.scala 326:43]
+    node _T_574 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 326:61]
+    node _T_575 = eq(_T_574, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 326:55]
+    node _T_576 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 326:72]
+    node _T_577 = and(_T_575, _T_576) @[el2_ifu_aln_ctl.scala 326:65]
+    node _T_578 = bits(_T_577, 0, 0) @[el2_ifu_aln_ctl.scala 326:77]
+    node _T_579 = bits(f1pc4, 0, 0) @[el2_ifu_aln_ctl.scala 326:94]
+    node _T_580 = bits(f0pc4, 0, 0) @[el2_ifu_aln_ctl.scala 326:103]
+    node _T_581 = cat(_T_579, _T_580) @[Cat.scala 29:58]
+    node _T_582 = mux(_T_573, f0pc4, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_583 = mux(_T_578, _T_581, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_584 = or(_T_582, _T_583) @[Mux.scala 27:72]
     wire alignpc4 : UInt<2> @[Mux.scala 27:72]
-    alignpc4 <= _T_585 @[Mux.scala 27:72]
-    node _T_586 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 328:33]
-    node _T_587 = bits(_T_586, 0, 0) @[el2_ifu_aln_ctl.scala 328:43]
-    node _T_588 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 328:61]
-    node _T_589 = eq(_T_588, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 328:55]
-    node _T_590 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 328:72]
-    node _T_591 = and(_T_589, _T_590) @[el2_ifu_aln_ctl.scala 328:65]
-    node _T_592 = bits(_T_591, 0, 0) @[el2_ifu_aln_ctl.scala 328:77]
-    node _T_593 = bits(f1ret, 0, 0) @[el2_ifu_aln_ctl.scala 328:94]
-    node _T_594 = bits(f0ret, 0, 0) @[el2_ifu_aln_ctl.scala 328:103]
-    node _T_595 = cat(_T_593, _T_594) @[Cat.scala 29:58]
-    node _T_596 = mux(_T_587, f0ret, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_597 = mux(_T_592, _T_595, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_598 = or(_T_596, _T_597) @[Mux.scala 27:72]
+    alignpc4 <= _T_584 @[Mux.scala 27:72]
+    node _T_585 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 328:33]
+    node _T_586 = bits(_T_585, 0, 0) @[el2_ifu_aln_ctl.scala 328:43]
+    node _T_587 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 328:61]
+    node _T_588 = eq(_T_587, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 328:55]
+    node _T_589 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 328:72]
+    node _T_590 = and(_T_588, _T_589) @[el2_ifu_aln_ctl.scala 328:65]
+    node _T_591 = bits(_T_590, 0, 0) @[el2_ifu_aln_ctl.scala 328:77]
+    node _T_592 = bits(f1ret, 0, 0) @[el2_ifu_aln_ctl.scala 328:94]
+    node _T_593 = bits(f0ret, 0, 0) @[el2_ifu_aln_ctl.scala 328:103]
+    node _T_594 = cat(_T_592, _T_593) @[Cat.scala 29:58]
+    node _T_595 = mux(_T_586, f0ret, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_596 = mux(_T_591, _T_594, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_597 = or(_T_595, _T_596) @[Mux.scala 27:72]
     wire alignret : UInt<2> @[Mux.scala 27:72]
-    alignret <= _T_598 @[Mux.scala 27:72]
-    node _T_599 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 330:33]
-    node _T_600 = bits(_T_599, 0, 0) @[el2_ifu_aln_ctl.scala 330:43]
-    node _T_601 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 330:61]
-    node _T_602 = eq(_T_601, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 330:55]
-    node _T_603 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 330:72]
-    node _T_604 = and(_T_602, _T_603) @[el2_ifu_aln_ctl.scala 330:65]
-    node _T_605 = bits(_T_604, 0, 0) @[el2_ifu_aln_ctl.scala 330:77]
-    node _T_606 = bits(f1way, 0, 0) @[el2_ifu_aln_ctl.scala 330:94]
-    node _T_607 = bits(f0way, 0, 0) @[el2_ifu_aln_ctl.scala 330:103]
-    node _T_608 = cat(_T_606, _T_607) @[Cat.scala 29:58]
-    node _T_609 = mux(_T_600, f0way, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_610 = mux(_T_605, _T_608, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_611 = or(_T_609, _T_610) @[Mux.scala 27:72]
+    alignret <= _T_597 @[Mux.scala 27:72]
+    node _T_598 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 330:33]
+    node _T_599 = bits(_T_598, 0, 0) @[el2_ifu_aln_ctl.scala 330:43]
+    node _T_600 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 330:61]
+    node _T_601 = eq(_T_600, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 330:55]
+    node _T_602 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 330:72]
+    node _T_603 = and(_T_601, _T_602) @[el2_ifu_aln_ctl.scala 330:65]
+    node _T_604 = bits(_T_603, 0, 0) @[el2_ifu_aln_ctl.scala 330:77]
+    node _T_605 = bits(f1way, 0, 0) @[el2_ifu_aln_ctl.scala 330:94]
+    node _T_606 = bits(f0way, 0, 0) @[el2_ifu_aln_ctl.scala 330:103]
+    node _T_607 = cat(_T_605, _T_606) @[Cat.scala 29:58]
+    node _T_608 = mux(_T_599, f0way, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_609 = mux(_T_604, _T_607, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_610 = or(_T_608, _T_609) @[Mux.scala 27:72]
     wire alignway : UInt<2> @[Mux.scala 27:72]
-    alignway <= _T_611 @[Mux.scala 27:72]
-    node _T_612 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 332:35]
-    node _T_613 = bits(_T_612, 0, 0) @[el2_ifu_aln_ctl.scala 332:45]
-    node _T_614 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 332:65]
-    node _T_615 = eq(_T_614, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 332:59]
-    node _T_616 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 332:76]
-    node _T_617 = and(_T_615, _T_616) @[el2_ifu_aln_ctl.scala 332:69]
-    node _T_618 = bits(_T_617, 0, 0) @[el2_ifu_aln_ctl.scala 332:81]
-    node _T_619 = bits(f1hist1, 0, 0) @[el2_ifu_aln_ctl.scala 332:100]
-    node _T_620 = bits(f0hist1, 0, 0) @[el2_ifu_aln_ctl.scala 332:111]
-    node _T_621 = cat(_T_619, _T_620) @[Cat.scala 29:58]
-    node _T_622 = mux(_T_613, f0hist1, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_623 = mux(_T_618, _T_621, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_624 = or(_T_622, _T_623) @[Mux.scala 27:72]
+    alignway <= _T_610 @[Mux.scala 27:72]
+    node _T_611 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 332:35]
+    node _T_612 = bits(_T_611, 0, 0) @[el2_ifu_aln_ctl.scala 332:45]
+    node _T_613 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 332:65]
+    node _T_614 = eq(_T_613, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 332:59]
+    node _T_615 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 332:76]
+    node _T_616 = and(_T_614, _T_615) @[el2_ifu_aln_ctl.scala 332:69]
+    node _T_617 = bits(_T_616, 0, 0) @[el2_ifu_aln_ctl.scala 332:81]
+    node _T_618 = bits(f1hist1, 0, 0) @[el2_ifu_aln_ctl.scala 332:100]
+    node _T_619 = bits(f0hist1, 0, 0) @[el2_ifu_aln_ctl.scala 332:111]
+    node _T_620 = cat(_T_618, _T_619) @[Cat.scala 29:58]
+    node _T_621 = mux(_T_612, f0hist1, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_622 = mux(_T_617, _T_620, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_623 = or(_T_621, _T_622) @[Mux.scala 27:72]
     wire alignhist1 : UInt<2> @[Mux.scala 27:72]
-    alignhist1 <= _T_624 @[Mux.scala 27:72]
-    node _T_625 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 334:35]
-    node _T_626 = bits(_T_625, 0, 0) @[el2_ifu_aln_ctl.scala 334:45]
-    node _T_627 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 334:65]
-    node _T_628 = eq(_T_627, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 334:59]
-    node _T_629 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 334:76]
-    node _T_630 = and(_T_628, _T_629) @[el2_ifu_aln_ctl.scala 334:69]
-    node _T_631 = bits(_T_630, 0, 0) @[el2_ifu_aln_ctl.scala 334:81]
-    node _T_632 = bits(f1hist0, 0, 0) @[el2_ifu_aln_ctl.scala 334:100]
-    node _T_633 = bits(f0hist0, 0, 0) @[el2_ifu_aln_ctl.scala 334:111]
-    node _T_634 = cat(_T_632, _T_633) @[Cat.scala 29:58]
-    node _T_635 = mux(_T_626, f0hist0, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_636 = mux(_T_631, _T_634, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_637 = or(_T_635, _T_636) @[Mux.scala 27:72]
+    alignhist1 <= _T_623 @[Mux.scala 27:72]
+    node _T_624 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 334:35]
+    node _T_625 = bits(_T_624, 0, 0) @[el2_ifu_aln_ctl.scala 334:45]
+    node _T_626 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 334:65]
+    node _T_627 = eq(_T_626, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 334:59]
+    node _T_628 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 334:76]
+    node _T_629 = and(_T_627, _T_628) @[el2_ifu_aln_ctl.scala 334:69]
+    node _T_630 = bits(_T_629, 0, 0) @[el2_ifu_aln_ctl.scala 334:81]
+    node _T_631 = bits(f1hist0, 0, 0) @[el2_ifu_aln_ctl.scala 334:100]
+    node _T_632 = bits(f0hist0, 0, 0) @[el2_ifu_aln_ctl.scala 334:111]
+    node _T_633 = cat(_T_631, _T_632) @[Cat.scala 29:58]
+    node _T_634 = mux(_T_625, f0hist0, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_635 = mux(_T_630, _T_633, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_636 = or(_T_634, _T_635) @[Mux.scala 27:72]
     wire alignhist0 : UInt<2> @[Mux.scala 27:72]
-    alignhist0 <= _T_637 @[Mux.scala 27:72]
-    node _T_638 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 336:27]
-    node _T_639 = eq(_T_638, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 336:21]
-    node _T_640 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 336:38]
-    node alignfromf1 = and(_T_639, _T_640) @[el2_ifu_aln_ctl.scala 336:31]
-    node _T_641 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 338:33]
-    node _T_642 = bits(_T_641, 0, 0) @[el2_ifu_aln_ctl.scala 338:43]
-    node _T_643 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 338:67]
-    node _T_644 = eq(_T_643, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 338:61]
-    node _T_645 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 338:78]
-    node _T_646 = and(_T_644, _T_645) @[el2_ifu_aln_ctl.scala 338:71]
-    node _T_647 = bits(_T_646, 0, 0) @[el2_ifu_aln_ctl.scala 338:83]
-    node _T_648 = mux(_T_642, f0pc_plus1, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_649 = mux(_T_647, f1pc, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_650 = or(_T_648, _T_649) @[Mux.scala 27:72]
+    alignhist0 <= _T_636 @[Mux.scala 27:72]
+    node _T_637 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 336:27]
+    node _T_638 = eq(_T_637, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 336:21]
+    node _T_639 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 336:38]
+    node alignfromf1 = and(_T_638, _T_639) @[el2_ifu_aln_ctl.scala 336:31]
+    node _T_640 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 338:33]
+    node _T_641 = bits(_T_640, 0, 0) @[el2_ifu_aln_ctl.scala 338:43]
+    node _T_642 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 338:67]
+    node _T_643 = eq(_T_642, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 338:61]
+    node _T_644 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 338:78]
+    node _T_645 = and(_T_643, _T_644) @[el2_ifu_aln_ctl.scala 338:71]
+    node _T_646 = bits(_T_645, 0, 0) @[el2_ifu_aln_ctl.scala 338:83]
+    node _T_647 = mux(_T_641, f0pc_plus1, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_648 = mux(_T_646, f1pc, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_649 = or(_T_647, _T_648) @[Mux.scala 27:72]
     wire secondpc : UInt @[Mux.scala 27:72]
-    secondpc <= _T_650 @[Mux.scala 27:72]
+    secondpc <= _T_649 @[Mux.scala 27:72]
     io.ifu_i0_pc <= f0pc @[el2_ifu_aln_ctl.scala 340:16]
     io.ifu_i0_pc4 <= first4B @[el2_ifu_aln_ctl.scala 344:17]
-    node _T_651 = bits(aligndata, 15, 0) @[el2_ifu_aln_ctl.scala 346:31]
-    io.ifu_i0_cinst <= _T_651 @[el2_ifu_aln_ctl.scala 346:19]
-    node _T_652 = bits(aligndata, 1, 0) @[el2_ifu_aln_ctl.scala 348:23]
-    node _T_653 = eq(_T_652, UInt<2>("h03")) @[el2_ifu_aln_ctl.scala 348:29]
-    first4B <= _T_653 @[el2_ifu_aln_ctl.scala 348:11]
+    node _T_650 = bits(aligndata, 15, 0) @[el2_ifu_aln_ctl.scala 346:31]
+    io.ifu_i0_cinst <= _T_650 @[el2_ifu_aln_ctl.scala 346:19]
+    node _T_651 = bits(aligndata, 1, 0) @[el2_ifu_aln_ctl.scala 348:23]
+    node _T_652 = eq(_T_651, UInt<2>("h03")) @[el2_ifu_aln_ctl.scala 348:29]
+    first4B <= _T_652 @[el2_ifu_aln_ctl.scala 348:11]
     node first2B = not(first4B) @[el2_ifu_aln_ctl.scala 350:17]
-    node _T_654 = bits(first4B, 0, 0) @[el2_ifu_aln_ctl.scala 352:40]
-    node _T_655 = bits(alignval, 1, 1) @[el2_ifu_aln_ctl.scala 352:58]
-    node _T_656 = bits(first2B, 0, 0) @[el2_ifu_aln_ctl.scala 352:71]
-    node _T_657 = bits(alignval, 0, 0) @[el2_ifu_aln_ctl.scala 352:89]
-    node _T_658 = mux(_T_654, _T_655, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_659 = mux(_T_656, _T_657, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_660 = or(_T_658, _T_659) @[Mux.scala 27:72]
-    wire _T_661 : UInt<1> @[Mux.scala 27:72]
-    _T_661 <= _T_660 @[Mux.scala 27:72]
-    io.ifu_i0_valid <= _T_661 @[el2_ifu_aln_ctl.scala 352:19]
-    node _T_662 = bits(first4B, 0, 0) @[el2_ifu_aln_ctl.scala 354:39]
-    node _T_663 = orr(alignicaf) @[el2_ifu_aln_ctl.scala 354:59]
-    node _T_664 = bits(first2B, 0, 0) @[el2_ifu_aln_ctl.scala 354:72]
-    node _T_665 = bits(alignicaf, 0, 0) @[el2_ifu_aln_ctl.scala 354:91]
-    node _T_666 = mux(_T_662, _T_663, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_667 = mux(_T_664, _T_665, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_668 = or(_T_666, _T_667) @[Mux.scala 27:72]
-    wire _T_669 : UInt<1> @[Mux.scala 27:72]
-    _T_669 <= _T_668 @[Mux.scala 27:72]
-    io.ifu_i0_icaf <= _T_669 @[el2_ifu_aln_ctl.scala 354:18]
-    node _T_670 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 356:47]
-    node _T_671 = eq(_T_670, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 356:41]
-    node _T_672 = and(first4B, _T_671) @[el2_ifu_aln_ctl.scala 356:39]
-    node _T_673 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 356:58]
-    node _T_674 = and(_T_672, _T_673) @[el2_ifu_aln_ctl.scala 356:51]
-    node _T_675 = bits(alignicaf, 0, 0) @[el2_ifu_aln_ctl.scala 356:74]
-    node _T_676 = eq(_T_675, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 356:64]
-    node _T_677 = and(_T_674, _T_676) @[el2_ifu_aln_ctl.scala 356:62]
-    node _T_678 = bits(aligndbecc, 0, 0) @[el2_ifu_aln_ctl.scala 356:91]
-    node _T_679 = eq(_T_678, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 356:80]
-    node _T_680 = and(_T_677, _T_679) @[el2_ifu_aln_ctl.scala 356:78]
-    node _T_681 = bits(_T_680, 0, 0) @[el2_ifu_aln_ctl.scala 356:96]
-    node _T_682 = mux(_T_681, f1ictype, f0ictype) @[el2_ifu_aln_ctl.scala 356:29]
-    io.ifu_i0_icaf_type <= _T_682 @[el2_ifu_aln_ctl.scala 356:23]
-    node _T_683 = bits(alignicaf, 1, 1) @[el2_ifu_aln_ctl.scala 358:27]
-    node _T_684 = bits(aligndbecc, 1, 1) @[el2_ifu_aln_ctl.scala 358:43]
-    node icaf_eff = or(_T_683, _T_684) @[el2_ifu_aln_ctl.scala 358:31]
-    node _T_685 = and(first4B, icaf_eff) @[el2_ifu_aln_ctl.scala 360:32]
-    node _T_686 = and(_T_685, alignfromf1) @[el2_ifu_aln_ctl.scala 360:43]
-    io.ifu_i0_icaf_f1 <= _T_686 @[el2_ifu_aln_ctl.scala 360:21]
-    node _T_687 = bits(first4B, 0, 0) @[el2_ifu_aln_ctl.scala 362:40]
-    node _T_688 = orr(aligndbecc) @[el2_ifu_aln_ctl.scala 362:59]
-    node _T_689 = bits(first2B, 0, 0) @[el2_ifu_aln_ctl.scala 362:72]
-    node _T_690 = bits(aligndbecc, 0, 0) @[el2_ifu_aln_ctl.scala 362:90]
-    node _T_691 = mux(_T_687, _T_688, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_692 = mux(_T_689, _T_690, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_693 = or(_T_691, _T_692) @[Mux.scala 27:72]
-    wire _T_694 : UInt<1> @[Mux.scala 27:72]
-    _T_694 <= _T_693 @[Mux.scala 27:72]
-    io.ifu_i0_dbecc <= _T_694 @[el2_ifu_aln_ctl.scala 362:19]
+    node _T_653 = bits(first4B, 0, 0) @[el2_ifu_aln_ctl.scala 352:40]
+    node _T_654 = bits(alignval, 1, 1) @[el2_ifu_aln_ctl.scala 352:58]
+    node _T_655 = bits(first2B, 0, 0) @[el2_ifu_aln_ctl.scala 352:71]
+    node _T_656 = bits(alignval, 0, 0) @[el2_ifu_aln_ctl.scala 352:89]
+    node _T_657 = mux(_T_653, _T_654, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_658 = mux(_T_655, _T_656, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_659 = or(_T_657, _T_658) @[Mux.scala 27:72]
+    wire _T_660 : UInt<1> @[Mux.scala 27:72]
+    _T_660 <= _T_659 @[Mux.scala 27:72]
+    io.ifu_i0_valid <= _T_660 @[el2_ifu_aln_ctl.scala 352:19]
+    node _T_661 = bits(first4B, 0, 0) @[el2_ifu_aln_ctl.scala 354:39]
+    node _T_662 = orr(alignicaf) @[el2_ifu_aln_ctl.scala 354:59]
+    node _T_663 = bits(first2B, 0, 0) @[el2_ifu_aln_ctl.scala 354:72]
+    node _T_664 = bits(alignicaf, 0, 0) @[el2_ifu_aln_ctl.scala 354:91]
+    node _T_665 = mux(_T_661, _T_662, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_666 = mux(_T_663, _T_664, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_667 = or(_T_665, _T_666) @[Mux.scala 27:72]
+    wire _T_668 : UInt<1> @[Mux.scala 27:72]
+    _T_668 <= _T_667 @[Mux.scala 27:72]
+    io.ifu_i0_icaf <= _T_668 @[el2_ifu_aln_ctl.scala 354:18]
+    node _T_669 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 356:47]
+    node _T_670 = eq(_T_669, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 356:41]
+    node _T_671 = and(first4B, _T_670) @[el2_ifu_aln_ctl.scala 356:39]
+    node _T_672 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 356:58]
+    node _T_673 = and(_T_671, _T_672) @[el2_ifu_aln_ctl.scala 356:51]
+    node _T_674 = bits(alignicaf, 0, 0) @[el2_ifu_aln_ctl.scala 356:74]
+    node _T_675 = eq(_T_674, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 356:64]
+    node _T_676 = and(_T_673, _T_675) @[el2_ifu_aln_ctl.scala 356:62]
+    node _T_677 = bits(aligndbecc, 0, 0) @[el2_ifu_aln_ctl.scala 356:91]
+    node _T_678 = eq(_T_677, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 356:80]
+    node _T_679 = and(_T_676, _T_678) @[el2_ifu_aln_ctl.scala 356:78]
+    node _T_680 = bits(_T_679, 0, 0) @[el2_ifu_aln_ctl.scala 356:96]
+    node _T_681 = mux(_T_680, f1ictype, f0ictype) @[el2_ifu_aln_ctl.scala 356:29]
+    io.ifu_i0_icaf_type <= _T_681 @[el2_ifu_aln_ctl.scala 356:23]
+    node _T_682 = bits(alignicaf, 1, 1) @[el2_ifu_aln_ctl.scala 358:27]
+    node _T_683 = bits(aligndbecc, 1, 1) @[el2_ifu_aln_ctl.scala 358:43]
+    node icaf_eff = or(_T_682, _T_683) @[el2_ifu_aln_ctl.scala 358:31]
+    node _T_684 = and(first4B, icaf_eff) @[el2_ifu_aln_ctl.scala 360:32]
+    node _T_685 = and(_T_684, alignfromf1) @[el2_ifu_aln_ctl.scala 360:43]
+    io.ifu_i0_icaf_f1 <= _T_685 @[el2_ifu_aln_ctl.scala 360:21]
+    node _T_686 = bits(first4B, 0, 0) @[el2_ifu_aln_ctl.scala 362:40]
+    node _T_687 = orr(aligndbecc) @[el2_ifu_aln_ctl.scala 362:59]
+    node _T_688 = bits(first2B, 0, 0) @[el2_ifu_aln_ctl.scala 362:72]
+    node _T_689 = bits(aligndbecc, 0, 0) @[el2_ifu_aln_ctl.scala 362:90]
+    node _T_690 = mux(_T_686, _T_687, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_691 = mux(_T_688, _T_689, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_692 = or(_T_690, _T_691) @[Mux.scala 27:72]
+    wire _T_693 : UInt<1> @[Mux.scala 27:72]
+    _T_693 <= _T_692 @[Mux.scala 27:72]
+    io.ifu_i0_dbecc <= _T_693 @[el2_ifu_aln_ctl.scala 362:19]
     inst decompressed of el2_ifu_compress_ctl @[el2_ifu_aln_ctl.scala 366:28]
     decompressed.clock <= clock
     decompressed.reset <= reset
-    node _T_695 = bits(first4B, 0, 0) @[el2_ifu_aln_ctl.scala 368:40]
-    node _T_696 = bits(first2B, 0, 0) @[el2_ifu_aln_ctl.scala 368:66]
-    node _T_697 = mux(_T_695, aligndata, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_698 = mux(_T_696, decompressed.io.dout, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_699 = or(_T_697, _T_698) @[Mux.scala 27:72]
-    wire _T_700 : UInt<32> @[Mux.scala 27:72]
-    _T_700 <= _T_699 @[Mux.scala 27:72]
-    io.ifu_i0_instr <= _T_700 @[el2_ifu_aln_ctl.scala 368:19]
-    node _T_701 = bits(f0pc, 8, 1) @[el2_lib.scala 191:12]
-    node _T_702 = bits(f0pc, 16, 9) @[el2_lib.scala 191:50]
-    node _T_703 = xor(_T_701, _T_702) @[el2_lib.scala 191:46]
-    node _T_704 = bits(f0pc, 24, 17) @[el2_lib.scala 191:88]
-    node firstpc_hash = xor(_T_703, _T_704) @[el2_lib.scala 191:84]
-    node _T_705 = bits(secondpc, 8, 1) @[el2_lib.scala 191:12]
-    node _T_706 = bits(secondpc, 16, 9) @[el2_lib.scala 191:50]
-    node _T_707 = xor(_T_705, _T_706) @[el2_lib.scala 191:46]
-    node _T_708 = bits(secondpc, 24, 17) @[el2_lib.scala 191:88]
-    node secondpc_hash = xor(_T_707, _T_708) @[el2_lib.scala 191:84]
-    node _T_709 = bits(f0pc, 13, 9) @[el2_lib.scala 182:32]
-    node _T_710 = bits(f0pc, 18, 14) @[el2_lib.scala 182:32]
-    node _T_711 = bits(f0pc, 23, 19) @[el2_lib.scala 182:32]
-    wire _T_712 : UInt<5>[3] @[el2_lib.scala 182:24]
-    _T_712[0] <= _T_709 @[el2_lib.scala 182:24]
-    _T_712[1] <= _T_710 @[el2_lib.scala 182:24]
-    _T_712[2] <= _T_711 @[el2_lib.scala 182:24]
-    node _T_713 = xor(_T_712[0], _T_712[1]) @[el2_lib.scala 182:111]
-    node firstbrtag_hash = xor(_T_713, _T_712[2]) @[el2_lib.scala 182:111]
-    node _T_714 = bits(secondpc, 13, 9) @[el2_lib.scala 182:32]
-    node _T_715 = bits(secondpc, 18, 14) @[el2_lib.scala 182:32]
-    node _T_716 = bits(secondpc, 23, 19) @[el2_lib.scala 182:32]
-    wire _T_717 : UInt<5>[3] @[el2_lib.scala 182:24]
-    _T_717[0] <= _T_714 @[el2_lib.scala 182:24]
-    _T_717[1] <= _T_715 @[el2_lib.scala 182:24]
-    _T_717[2] <= _T_716 @[el2_lib.scala 182:24]
-    node _T_718 = xor(_T_717[0], _T_717[1]) @[el2_lib.scala 182:111]
-    node secondbrtag_hash = xor(_T_718, _T_717[2]) @[el2_lib.scala 182:111]
-    node _T_719 = bits(alignbrend, 0, 0) @[el2_ifu_aln_ctl.scala 378:42]
-    node _T_720 = and(first2B, _T_719) @[el2_ifu_aln_ctl.scala 378:30]
-    node _T_721 = bits(alignbrend, 1, 1) @[el2_ifu_aln_ctl.scala 378:70]
-    node _T_722 = and(first4B, _T_721) @[el2_ifu_aln_ctl.scala 378:58]
-    node _T_723 = or(_T_720, _T_722) @[el2_ifu_aln_ctl.scala 378:47]
-    node _T_724 = bits(alignval, 1, 1) @[el2_ifu_aln_ctl.scala 378:96]
-    node _T_725 = and(first4B, _T_724) @[el2_ifu_aln_ctl.scala 378:86]
-    node _T_726 = bits(alignbrend, 0, 0) @[el2_ifu_aln_ctl.scala 378:112]
-    node _T_727 = and(_T_725, _T_726) @[el2_ifu_aln_ctl.scala 378:100]
-    node _T_728 = or(_T_723, _T_727) @[el2_ifu_aln_ctl.scala 378:75]
-    io.i0_brp.valid <= _T_728 @[el2_ifu_aln_ctl.scala 378:19]
-    node _T_729 = bits(alignret, 0, 0) @[el2_ifu_aln_ctl.scala 380:39]
-    node _T_730 = and(first2B, _T_729) @[el2_ifu_aln_ctl.scala 380:29]
-    node _T_731 = bits(alignret, 1, 1) @[el2_ifu_aln_ctl.scala 380:65]
-    node _T_732 = and(first4B, _T_731) @[el2_ifu_aln_ctl.scala 380:55]
-    node _T_733 = or(_T_730, _T_732) @[el2_ifu_aln_ctl.scala 380:44]
-    io.i0_brp.ret <= _T_733 @[el2_ifu_aln_ctl.scala 380:17]
-    node _T_734 = bits(alignpc4, 0, 0) @[el2_ifu_aln_ctl.scala 382:39]
-    node _T_735 = and(first2B, _T_734) @[el2_ifu_aln_ctl.scala 382:29]
-    node _T_736 = bits(alignpc4, 1, 1) @[el2_ifu_aln_ctl.scala 382:65]
-    node _T_737 = and(first4B, _T_736) @[el2_ifu_aln_ctl.scala 382:55]
-    node i0_brp_pc4 = or(_T_735, _T_737) @[el2_ifu_aln_ctl.scala 382:44]
-    node _T_738 = bits(alignbrend, 0, 0) @[el2_ifu_aln_ctl.scala 384:45]
-    node _T_739 = or(first2B, _T_738) @[el2_ifu_aln_ctl.scala 384:33]
-    node _T_740 = bits(_T_739, 0, 0) @[el2_ifu_aln_ctl.scala 384:50]
-    node _T_741 = bits(alignway, 0, 0) @[el2_ifu_aln_ctl.scala 384:66]
-    node _T_742 = bits(alignway, 1, 1) @[el2_ifu_aln_ctl.scala 384:80]
-    node _T_743 = mux(_T_740, _T_741, _T_742) @[el2_ifu_aln_ctl.scala 384:23]
-    io.i0_brp.way <= _T_743 @[el2_ifu_aln_ctl.scala 384:17]
-    node _T_744 = bits(alignhist1, 0, 0) @[el2_ifu_aln_ctl.scala 386:46]
-    node _T_745 = and(first2B, _T_744) @[el2_ifu_aln_ctl.scala 386:34]
-    node _T_746 = bits(alignhist1, 1, 1) @[el2_ifu_aln_ctl.scala 386:74]
-    node _T_747 = and(first4B, _T_746) @[el2_ifu_aln_ctl.scala 386:62]
-    node _T_748 = or(_T_745, _T_747) @[el2_ifu_aln_ctl.scala 386:51]
-    node _T_749 = bits(alignhist0, 0, 0) @[el2_ifu_aln_ctl.scala 387:26]
-    node _T_750 = and(first2B, _T_749) @[el2_ifu_aln_ctl.scala 387:14]
-    node _T_751 = bits(alignhist0, 1, 1) @[el2_ifu_aln_ctl.scala 387:54]
-    node _T_752 = and(first4B, _T_751) @[el2_ifu_aln_ctl.scala 387:42]
-    node _T_753 = or(_T_750, _T_752) @[el2_ifu_aln_ctl.scala 387:31]
-    node _T_754 = cat(_T_748, _T_753) @[Cat.scala 29:58]
-    io.i0_brp.hist <= _T_754 @[el2_ifu_aln_ctl.scala 386:18]
+    node _T_694 = bits(first4B, 0, 0) @[el2_ifu_aln_ctl.scala 368:40]
+    node _T_695 = bits(first2B, 0, 0) @[el2_ifu_aln_ctl.scala 368:66]
+    node _T_696 = mux(_T_694, aligndata, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_697 = mux(_T_695, decompressed.io.dout, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_698 = or(_T_696, _T_697) @[Mux.scala 27:72]
+    wire _T_699 : UInt<32> @[Mux.scala 27:72]
+    _T_699 <= _T_698 @[Mux.scala 27:72]
+    io.ifu_i0_instr <= _T_699 @[el2_ifu_aln_ctl.scala 368:19]
+    node _T_700 = bits(f0pc, 8, 1) @[el2_lib.scala 191:12]
+    node _T_701 = bits(f0pc, 16, 9) @[el2_lib.scala 191:50]
+    node _T_702 = xor(_T_700, _T_701) @[el2_lib.scala 191:46]
+    node _T_703 = bits(f0pc, 24, 17) @[el2_lib.scala 191:88]
+    node firstpc_hash = xor(_T_702, _T_703) @[el2_lib.scala 191:84]
+    node _T_704 = bits(secondpc, 8, 1) @[el2_lib.scala 191:12]
+    node _T_705 = bits(secondpc, 16, 9) @[el2_lib.scala 191:50]
+    node _T_706 = xor(_T_704, _T_705) @[el2_lib.scala 191:46]
+    node _T_707 = bits(secondpc, 24, 17) @[el2_lib.scala 191:88]
+    node secondpc_hash = xor(_T_706, _T_707) @[el2_lib.scala 191:84]
+    node _T_708 = bits(f0pc, 13, 9) @[el2_lib.scala 182:32]
+    node _T_709 = bits(f0pc, 18, 14) @[el2_lib.scala 182:32]
+    node _T_710 = bits(f0pc, 23, 19) @[el2_lib.scala 182:32]
+    wire _T_711 : UInt<5>[3] @[el2_lib.scala 182:24]
+    _T_711[0] <= _T_708 @[el2_lib.scala 182:24]
+    _T_711[1] <= _T_709 @[el2_lib.scala 182:24]
+    _T_711[2] <= _T_710 @[el2_lib.scala 182:24]
+    node _T_712 = xor(_T_711[0], _T_711[1]) @[el2_lib.scala 182:111]
+    node firstbrtag_hash = xor(_T_712, _T_711[2]) @[el2_lib.scala 182:111]
+    node _T_713 = bits(secondpc, 13, 9) @[el2_lib.scala 182:32]
+    node _T_714 = bits(secondpc, 18, 14) @[el2_lib.scala 182:32]
+    node _T_715 = bits(secondpc, 23, 19) @[el2_lib.scala 182:32]
+    wire _T_716 : UInt<5>[3] @[el2_lib.scala 182:24]
+    _T_716[0] <= _T_713 @[el2_lib.scala 182:24]
+    _T_716[1] <= _T_714 @[el2_lib.scala 182:24]
+    _T_716[2] <= _T_715 @[el2_lib.scala 182:24]
+    node _T_717 = xor(_T_716[0], _T_716[1]) @[el2_lib.scala 182:111]
+    node secondbrtag_hash = xor(_T_717, _T_716[2]) @[el2_lib.scala 182:111]
+    node _T_718 = bits(alignbrend, 0, 0) @[el2_ifu_aln_ctl.scala 378:42]
+    node _T_719 = and(first2B, _T_718) @[el2_ifu_aln_ctl.scala 378:30]
+    node _T_720 = bits(alignbrend, 1, 1) @[el2_ifu_aln_ctl.scala 378:70]
+    node _T_721 = and(first4B, _T_720) @[el2_ifu_aln_ctl.scala 378:58]
+    node _T_722 = or(_T_719, _T_721) @[el2_ifu_aln_ctl.scala 378:47]
+    node _T_723 = bits(alignval, 1, 1) @[el2_ifu_aln_ctl.scala 378:96]
+    node _T_724 = and(first4B, _T_723) @[el2_ifu_aln_ctl.scala 378:86]
+    node _T_725 = bits(alignbrend, 0, 0) @[el2_ifu_aln_ctl.scala 378:112]
+    node _T_726 = and(_T_724, _T_725) @[el2_ifu_aln_ctl.scala 378:100]
+    node _T_727 = or(_T_722, _T_726) @[el2_ifu_aln_ctl.scala 378:75]
+    io.i0_brp.valid <= _T_727 @[el2_ifu_aln_ctl.scala 378:19]
+    node _T_728 = bits(alignret, 0, 0) @[el2_ifu_aln_ctl.scala 380:39]
+    node _T_729 = and(first2B, _T_728) @[el2_ifu_aln_ctl.scala 380:29]
+    node _T_730 = bits(alignret, 1, 1) @[el2_ifu_aln_ctl.scala 380:65]
+    node _T_731 = and(first4B, _T_730) @[el2_ifu_aln_ctl.scala 380:55]
+    node _T_732 = or(_T_729, _T_731) @[el2_ifu_aln_ctl.scala 380:44]
+    io.i0_brp.ret <= _T_732 @[el2_ifu_aln_ctl.scala 380:17]
+    node _T_733 = bits(alignpc4, 0, 0) @[el2_ifu_aln_ctl.scala 382:39]
+    node _T_734 = and(first2B, _T_733) @[el2_ifu_aln_ctl.scala 382:29]
+    node _T_735 = bits(alignpc4, 1, 1) @[el2_ifu_aln_ctl.scala 382:65]
+    node _T_736 = and(first4B, _T_735) @[el2_ifu_aln_ctl.scala 382:55]
+    node i0_brp_pc4 = or(_T_734, _T_736) @[el2_ifu_aln_ctl.scala 382:44]
+    node _T_737 = bits(alignbrend, 0, 0) @[el2_ifu_aln_ctl.scala 384:45]
+    node _T_738 = or(first2B, _T_737) @[el2_ifu_aln_ctl.scala 384:33]
+    node _T_739 = bits(_T_738, 0, 0) @[el2_ifu_aln_ctl.scala 384:50]
+    node _T_740 = bits(alignway, 0, 0) @[el2_ifu_aln_ctl.scala 384:66]
+    node _T_741 = bits(alignway, 1, 1) @[el2_ifu_aln_ctl.scala 384:80]
+    node _T_742 = mux(_T_739, _T_740, _T_741) @[el2_ifu_aln_ctl.scala 384:23]
+    io.i0_brp.way <= _T_742 @[el2_ifu_aln_ctl.scala 384:17]
+    node _T_743 = bits(alignhist1, 0, 0) @[el2_ifu_aln_ctl.scala 386:46]
+    node _T_744 = and(first2B, _T_743) @[el2_ifu_aln_ctl.scala 386:34]
+    node _T_745 = bits(alignhist1, 1, 1) @[el2_ifu_aln_ctl.scala 386:74]
+    node _T_746 = and(first4B, _T_745) @[el2_ifu_aln_ctl.scala 386:62]
+    node _T_747 = or(_T_744, _T_746) @[el2_ifu_aln_ctl.scala 386:51]
+    node _T_748 = bits(alignhist0, 0, 0) @[el2_ifu_aln_ctl.scala 387:26]
+    node _T_749 = and(first2B, _T_748) @[el2_ifu_aln_ctl.scala 387:14]
+    node _T_750 = bits(alignhist0, 1, 1) @[el2_ifu_aln_ctl.scala 387:54]
+    node _T_751 = and(first4B, _T_750) @[el2_ifu_aln_ctl.scala 387:42]
+    node _T_752 = or(_T_749, _T_751) @[el2_ifu_aln_ctl.scala 387:31]
+    node _T_753 = cat(_T_747, _T_752) @[Cat.scala 29:58]
+    io.i0_brp.hist <= _T_753 @[el2_ifu_aln_ctl.scala 386:18]
     node i0_ends_f1 = and(first4B, alignfromf1) @[el2_ifu_aln_ctl.scala 389:28]
-    node _T_755 = bits(i0_ends_f1, 0, 0) @[el2_ifu_aln_ctl.scala 390:39]
-    node _T_756 = mux(_T_755, f1poffset, f0poffset) @[el2_ifu_aln_ctl.scala 390:27]
-    io.i0_brp.toffset <= _T_756 @[el2_ifu_aln_ctl.scala 390:21]
-    node _T_757 = bits(i0_ends_f1, 0, 0) @[el2_ifu_aln_ctl.scala 392:37]
-    node _T_758 = mux(_T_757, f1prett, f0prett) @[el2_ifu_aln_ctl.scala 392:25]
-    io.i0_brp.prett <= _T_758 @[el2_ifu_aln_ctl.scala 392:19]
-    node _T_759 = bits(alignval, 1, 1) @[el2_ifu_aln_ctl.scala 394:51]
-    node _T_760 = and(first4B, _T_759) @[el2_ifu_aln_ctl.scala 394:41]
-    node _T_761 = bits(alignbrend, 0, 0) @[el2_ifu_aln_ctl.scala 394:67]
-    node _T_762 = and(_T_760, _T_761) @[el2_ifu_aln_ctl.scala 394:55]
-    io.i0_brp.br_start_error <= _T_762 @[el2_ifu_aln_ctl.scala 394:29]
-    node _T_763 = bits(alignbrend, 0, 0) @[el2_ifu_aln_ctl.scala 396:57]
-    node _T_764 = or(first2B, _T_763) @[el2_ifu_aln_ctl.scala 396:45]
-    node _T_765 = bits(_T_764, 0, 0) @[el2_ifu_aln_ctl.scala 396:62]
-    node _T_766 = bits(f0pc, 1, 1) @[el2_ifu_aln_ctl.scala 396:77]
-    node _T_767 = bits(secondpc, 1, 1) @[el2_ifu_aln_ctl.scala 396:90]
-    node _T_768 = mux(_T_765, _T_766, _T_767) @[el2_ifu_aln_ctl.scala 396:35]
-    io.i0_brp.bank <= _T_768 @[el2_ifu_aln_ctl.scala 396:29]
-    node _T_769 = and(io.i0_brp.valid, i0_brp_pc4) @[el2_ifu_aln_ctl.scala 398:42]
-    node _T_770 = and(_T_769, first2B) @[el2_ifu_aln_ctl.scala 398:56]
-    node _T_771 = eq(i0_brp_pc4, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 398:89]
-    node _T_772 = and(io.i0_brp.valid, _T_771) @[el2_ifu_aln_ctl.scala 398:87]
-    node _T_773 = and(_T_772, first4B) @[el2_ifu_aln_ctl.scala 398:101]
-    node _T_774 = or(_T_770, _T_773) @[el2_ifu_aln_ctl.scala 398:68]
-    io.i0_brp.br_error <= _T_774 @[el2_ifu_aln_ctl.scala 398:22]
-    node _T_775 = bits(alignbrend, 0, 0) @[el2_ifu_aln_ctl.scala 400:50]
-    node _T_776 = or(first2B, _T_775) @[el2_ifu_aln_ctl.scala 400:38]
-    node _T_777 = bits(_T_776, 0, 0) @[el2_ifu_aln_ctl.scala 400:55]
-    node _T_778 = mux(_T_777, firstpc_hash, secondpc_hash) @[el2_ifu_aln_ctl.scala 400:28]
-    io.ifu_i0_bp_index <= _T_778 @[el2_ifu_aln_ctl.scala 400:22]
-    node _T_779 = and(first4B, alignfromf1) @[el2_ifu_aln_ctl.scala 402:37]
-    node _T_780 = bits(_T_779, 0, 0) @[el2_ifu_aln_ctl.scala 402:52]
-    node _T_781 = mux(_T_780, f1fghr, f0fghr) @[el2_ifu_aln_ctl.scala 402:27]
-    io.ifu_i0_bp_fghr <= _T_781 @[el2_ifu_aln_ctl.scala 402:21]
-    node _T_782 = bits(alignbrend, 0, 0) @[el2_ifu_aln_ctl.scala 404:49]
-    node _T_783 = or(first2B, _T_782) @[el2_ifu_aln_ctl.scala 404:37]
-    node _T_784 = bits(_T_783, 0, 0) @[el2_ifu_aln_ctl.scala 404:54]
-    node _T_785 = mux(_T_784, firstbrtag_hash, secondbrtag_hash) @[el2_ifu_aln_ctl.scala 404:27]
-    io.ifu_i0_bp_btag <= _T_785 @[el2_ifu_aln_ctl.scala 404:21]
+    node _T_754 = bits(i0_ends_f1, 0, 0) @[el2_ifu_aln_ctl.scala 390:39]
+    node _T_755 = mux(_T_754, f1poffset, f0poffset) @[el2_ifu_aln_ctl.scala 390:27]
+    io.i0_brp.toffset <= _T_755 @[el2_ifu_aln_ctl.scala 390:21]
+    node _T_756 = bits(i0_ends_f1, 0, 0) @[el2_ifu_aln_ctl.scala 392:37]
+    node _T_757 = mux(_T_756, f1prett, f0prett) @[el2_ifu_aln_ctl.scala 392:25]
+    io.i0_brp.prett <= _T_757 @[el2_ifu_aln_ctl.scala 392:19]
+    node _T_758 = bits(alignval, 1, 1) @[el2_ifu_aln_ctl.scala 394:51]
+    node _T_759 = and(first4B, _T_758) @[el2_ifu_aln_ctl.scala 394:41]
+    node _T_760 = bits(alignbrend, 0, 0) @[el2_ifu_aln_ctl.scala 394:67]
+    node _T_761 = and(_T_759, _T_760) @[el2_ifu_aln_ctl.scala 394:55]
+    io.i0_brp.br_start_error <= _T_761 @[el2_ifu_aln_ctl.scala 394:29]
+    node _T_762 = bits(alignbrend, 0, 0) @[el2_ifu_aln_ctl.scala 396:57]
+    node _T_763 = or(first2B, _T_762) @[el2_ifu_aln_ctl.scala 396:45]
+    node _T_764 = bits(_T_763, 0, 0) @[el2_ifu_aln_ctl.scala 396:62]
+    node _T_765 = bits(f0pc, 1, 1) @[el2_ifu_aln_ctl.scala 396:77]
+    node _T_766 = bits(secondpc, 1, 1) @[el2_ifu_aln_ctl.scala 396:90]
+    node _T_767 = mux(_T_764, _T_765, _T_766) @[el2_ifu_aln_ctl.scala 396:35]
+    io.i0_brp.bank <= _T_767 @[el2_ifu_aln_ctl.scala 396:29]
+    node _T_768 = and(io.i0_brp.valid, i0_brp_pc4) @[el2_ifu_aln_ctl.scala 398:42]
+    node _T_769 = and(_T_768, first2B) @[el2_ifu_aln_ctl.scala 398:56]
+    node _T_770 = eq(i0_brp_pc4, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 398:89]
+    node _T_771 = and(io.i0_brp.valid, _T_770) @[el2_ifu_aln_ctl.scala 398:87]
+    node _T_772 = and(_T_771, first4B) @[el2_ifu_aln_ctl.scala 398:101]
+    node _T_773 = or(_T_769, _T_772) @[el2_ifu_aln_ctl.scala 398:68]
+    io.i0_brp.br_error <= _T_773 @[el2_ifu_aln_ctl.scala 398:22]
+    node _T_774 = bits(alignbrend, 0, 0) @[el2_ifu_aln_ctl.scala 400:50]
+    node _T_775 = or(first2B, _T_774) @[el2_ifu_aln_ctl.scala 400:38]
+    node _T_776 = bits(_T_775, 0, 0) @[el2_ifu_aln_ctl.scala 400:55]
+    node _T_777 = mux(_T_776, firstpc_hash, secondpc_hash) @[el2_ifu_aln_ctl.scala 400:28]
+    io.ifu_i0_bp_index <= _T_777 @[el2_ifu_aln_ctl.scala 400:22]
+    node _T_778 = and(first4B, alignfromf1) @[el2_ifu_aln_ctl.scala 402:37]
+    node _T_779 = bits(_T_778, 0, 0) @[el2_ifu_aln_ctl.scala 402:52]
+    node _T_780 = mux(_T_779, f1fghr, f0fghr) @[el2_ifu_aln_ctl.scala 402:27]
+    io.ifu_i0_bp_fghr <= _T_780 @[el2_ifu_aln_ctl.scala 402:21]
+    node _T_781 = bits(alignbrend, 0, 0) @[el2_ifu_aln_ctl.scala 404:49]
+    node _T_782 = or(first2B, _T_781) @[el2_ifu_aln_ctl.scala 404:37]
+    node _T_783 = bits(_T_782, 0, 0) @[el2_ifu_aln_ctl.scala 404:54]
+    node _T_784 = mux(_T_783, firstbrtag_hash, secondbrtag_hash) @[el2_ifu_aln_ctl.scala 404:27]
+    io.ifu_i0_bp_btag <= _T_784 @[el2_ifu_aln_ctl.scala 404:21]
     decompressed.io.din <= aligndata @[el2_ifu_aln_ctl.scala 406:23]
-    node _T_786 = not(error_stall) @[el2_ifu_aln_ctl.scala 408:39]
-    node i0_shift = and(io.dec_i0_decode_d, _T_786) @[el2_ifu_aln_ctl.scala 408:37]
+    node _T_785 = not(error_stall) @[el2_ifu_aln_ctl.scala 408:39]
+    node i0_shift = and(io.dec_i0_decode_d, _T_785) @[el2_ifu_aln_ctl.scala 408:37]
     io.ifu_pmu_instr_aligned <= i0_shift @[el2_ifu_aln_ctl.scala 410:28]
-    node _T_787 = and(i0_shift, first2B) @[el2_ifu_aln_ctl.scala 412:24]
-    shift_2B <= _T_787 @[el2_ifu_aln_ctl.scala 412:12]
-    node _T_788 = and(i0_shift, first4B) @[el2_ifu_aln_ctl.scala 413:24]
-    shift_4B <= _T_788 @[el2_ifu_aln_ctl.scala 413:12]
-    node _T_789 = bits(shift_2B, 0, 0) @[el2_ifu_aln_ctl.scala 415:37]
-    node _T_790 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 415:52]
-    node _T_791 = bits(shift_4B, 0, 0) @[el2_ifu_aln_ctl.scala 415:66]
-    node _T_792 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 415:83]
-    node _T_793 = eq(_T_792, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 415:77]
-    node _T_794 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 415:94]
-    node _T_795 = and(_T_793, _T_794) @[el2_ifu_aln_ctl.scala 415:87]
-    node _T_796 = mux(_T_789, _T_790, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_797 = mux(_T_791, _T_795, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_798 = or(_T_796, _T_797) @[Mux.scala 27:72]
-    wire _T_799 : UInt<1> @[Mux.scala 27:72]
-    _T_799 <= _T_798 @[Mux.scala 27:72]
-    f0_shift_2B <= _T_799 @[el2_ifu_aln_ctl.scala 415:15]
-    node _T_800 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 416:24]
-    node _T_801 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 416:36]
-    node _T_802 = eq(_T_801, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 416:30]
-    node _T_803 = and(_T_800, _T_802) @[el2_ifu_aln_ctl.scala 416:28]
-    node _T_804 = and(_T_803, shift_4B) @[el2_ifu_aln_ctl.scala 416:40]
-    f1_shift_2B <= _T_804 @[el2_ifu_aln_ctl.scala 416:15]
+    node _T_786 = and(i0_shift, first2B) @[el2_ifu_aln_ctl.scala 412:24]
+    shift_2B <= _T_786 @[el2_ifu_aln_ctl.scala 412:12]
+    node _T_787 = and(i0_shift, first4B) @[el2_ifu_aln_ctl.scala 413:24]
+    shift_4B <= _T_787 @[el2_ifu_aln_ctl.scala 413:12]
+    node _T_788 = bits(shift_2B, 0, 0) @[el2_ifu_aln_ctl.scala 415:37]
+    node _T_789 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 415:52]
+    node _T_790 = bits(shift_4B, 0, 0) @[el2_ifu_aln_ctl.scala 415:66]
+    node _T_791 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 415:83]
+    node _T_792 = eq(_T_791, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 415:77]
+    node _T_793 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 415:94]
+    node _T_794 = and(_T_792, _T_793) @[el2_ifu_aln_ctl.scala 415:87]
+    node _T_795 = mux(_T_788, _T_789, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_796 = mux(_T_790, _T_794, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_797 = or(_T_795, _T_796) @[Mux.scala 27:72]
+    wire _T_798 : UInt<1> @[Mux.scala 27:72]
+    _T_798 <= _T_797 @[Mux.scala 27:72]
+    f0_shift_2B <= _T_798 @[el2_ifu_aln_ctl.scala 415:15]
+    node _T_799 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 416:24]
+    node _T_800 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 416:36]
+    node _T_801 = eq(_T_800, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 416:30]
+    node _T_802 = and(_T_799, _T_801) @[el2_ifu_aln_ctl.scala 416:28]
+    node _T_803 = and(_T_802, shift_4B) @[el2_ifu_aln_ctl.scala 416:40]
+    f1_shift_2B <= _T_803 @[el2_ifu_aln_ctl.scala 416:15]
     
diff --git a/el2_ifu_aln_ctl.v b/el2_ifu_aln_ctl.v
index e9d736b3..6a8ca383 100644
--- a/el2_ifu_aln_ctl.v
+++ b/el2_ifu_aln_ctl.v
@@ -517,7 +517,7 @@ module el2_ifu_aln_ctl(
   input         io_ic_access_fault_f,
   input  [1:0]  io_ic_access_fault_type_f,
   input  [7:0]  io_ifu_bp_fghr_f,
-  input  [31:0] io_ifu_bp_btb_target_f,
+  input  [30:0] io_ifu_bp_btb_target_f,
   input  [11:0] io_ifu_bp_poffset_f,
   input  [1:0]  io_ifu_bp_hist0_f,
   input  [1:0]  io_ifu_bp_hist1_f,
@@ -592,8 +592,8 @@ module el2_ifu_aln_ctl(
   reg  q2off; // @[el2_ifu_aln_ctl.scala 136:48]
   reg  q1off; // @[el2_ifu_aln_ctl.scala 137:48]
   reg  q0off; // @[el2_ifu_aln_ctl.scala 138:48]
-  wire  _T_786 = ~error_stall; // @[el2_ifu_aln_ctl.scala 408:39]
-  wire  i0_shift = io_dec_i0_decode_d & _T_786; // @[el2_ifu_aln_ctl.scala 408:37]
+  wire  _T_785 = ~error_stall; // @[el2_ifu_aln_ctl.scala 408:39]
+  wire  i0_shift = io_dec_i0_decode_d & _T_785; // @[el2_ifu_aln_ctl.scala 408:37]
   wire  _T_186 = rdptr == 2'h0; // @[el2_ifu_aln_ctl.scala 188:31]
   wire  _T_189 = _T_186 & q0off; // @[Mux.scala 27:72]
   wire  _T_187 = rdptr == 2'h1; // @[el2_ifu_aln_ctl.scala 189:11]
@@ -607,23 +607,23 @@ module el2_ifu_aln_ctl(
   wire [2:0] qren = {_T_188,_T_187,_T_186}; // @[Cat.scala 29:58]
   reg [31:0] q1; // @[Reg.scala 27:20]
   reg [31:0] q0; // @[Reg.scala 27:20]
-  wire [63:0] _T_480 = {q1,q0}; // @[Cat.scala 29:58]
-  wire [63:0] _T_487 = qren[0] ? _T_480 : 64'h0; // @[Mux.scala 27:72]
+  wire [63:0] _T_479 = {q1,q0}; // @[Cat.scala 29:58]
+  wire [63:0] _T_486 = qren[0] ? _T_479 : 64'h0; // @[Mux.scala 27:72]
   reg [31:0] q2; // @[Reg.scala 27:20]
-  wire [63:0] _T_483 = {q2,q1}; // @[Cat.scala 29:58]
-  wire [63:0] _T_488 = qren[1] ? _T_483 : 64'h0; // @[Mux.scala 27:72]
-  wire [63:0] _T_490 = _T_487 | _T_488; // @[Mux.scala 27:72]
-  wire [63:0] _T_486 = {q0,q2}; // @[Cat.scala 29:58]
-  wire [63:0] _T_489 = qren[2] ? _T_486 : 64'h0; // @[Mux.scala 27:72]
-  wire [63:0] qeff = _T_490 | _T_489; // @[Mux.scala 27:72]
+  wire [63:0] _T_482 = {q2,q1}; // @[Cat.scala 29:58]
+  wire [63:0] _T_487 = qren[1] ? _T_482 : 64'h0; // @[Mux.scala 27:72]
+  wire [63:0] _T_489 = _T_486 | _T_487; // @[Mux.scala 27:72]
+  wire [63:0] _T_485 = {q0,q2}; // @[Cat.scala 29:58]
+  wire [63:0] _T_488 = qren[2] ? _T_485 : 64'h0; // @[Mux.scala 27:72]
+  wire [63:0] qeff = _T_489 | _T_488; // @[Mux.scala 27:72]
   wire [31:0] q0eff = qeff[31:0]; // @[el2_ifu_aln_ctl.scala 310:42]
-  wire [31:0] _T_497 = q0sel[0] ? q0eff : 32'h0; // @[Mux.scala 27:72]
-  wire [15:0] _T_498 = q0sel[1] ? q0eff[31:16] : 16'h0; // @[Mux.scala 27:72]
-  wire [31:0] _GEN_12 = {{16'd0}, _T_498}; // @[Mux.scala 27:72]
-  wire [31:0] q0final = _T_497 | _GEN_12; // @[Mux.scala 27:72]
-  wire [31:0] _T_521 = f0val[0] ? q0final : 32'h0; // @[Mux.scala 27:72]
-  wire  _T_514 = ~f0val[1]; // @[el2_ifu_aln_ctl.scala 316:58]
-  wire  _T_516 = _T_514 & f0val[0]; // @[el2_ifu_aln_ctl.scala 316:68]
+  wire [31:0] _T_496 = q0sel[0] ? q0eff : 32'h0; // @[Mux.scala 27:72]
+  wire [15:0] _T_497 = q0sel[1] ? q0eff[31:16] : 16'h0; // @[Mux.scala 27:72]
+  wire [31:0] _GEN_12 = {{16'd0}, _T_497}; // @[Mux.scala 27:72]
+  wire [31:0] q0final = _T_496 | _GEN_12; // @[Mux.scala 27:72]
+  wire [31:0] _T_520 = f0val[0] ? q0final : 32'h0; // @[Mux.scala 27:72]
+  wire  _T_513 = ~f0val[1]; // @[el2_ifu_aln_ctl.scala 316:58]
+  wire  _T_515 = _T_513 & f0val[0]; // @[el2_ifu_aln_ctl.scala 316:68]
   wire  _T_197 = _T_186 & q1off; // @[Mux.scala 27:72]
   wire  _T_198 = _T_187 & q2off; // @[Mux.scala 27:72]
   wire  _T_200 = _T_197 | _T_198; // @[Mux.scala 27:72]
@@ -632,92 +632,92 @@ module el2_ifu_aln_ctl(
   wire  _T_203 = ~q1ptr; // @[el2_ifu_aln_ctl.scala 196:26]
   wire [1:0] q1sel = {q1ptr,_T_203}; // @[Cat.scala 29:58]
   wire [31:0] q1eff = qeff[63:32]; // @[el2_ifu_aln_ctl.scala 310:29]
-  wire [15:0] _T_507 = q1sel[0] ? q1eff[15:0] : 16'h0; // @[Mux.scala 27:72]
-  wire [15:0] _T_508 = q1sel[1] ? q1eff[31:16] : 16'h0; // @[Mux.scala 27:72]
-  wire [15:0] q1final = _T_507 | _T_508; // @[Mux.scala 27:72]
-  wire [31:0] _T_520 = {q1final,q0final[15:0]}; // @[Cat.scala 29:58]
-  wire [31:0] _T_522 = _T_516 ? _T_520 : 32'h0; // @[Mux.scala 27:72]
-  wire [31:0] aligndata = _T_521 | _T_522; // @[Mux.scala 27:72]
+  wire [15:0] _T_506 = q1sel[0] ? q1eff[15:0] : 16'h0; // @[Mux.scala 27:72]
+  wire [15:0] _T_507 = q1sel[1] ? q1eff[31:16] : 16'h0; // @[Mux.scala 27:72]
+  wire [15:0] q1final = _T_506 | _T_507; // @[Mux.scala 27:72]
+  wire [31:0] _T_519 = {q1final,q0final[15:0]}; // @[Cat.scala 29:58]
+  wire [31:0] _T_521 = _T_515 ? _T_519 : 32'h0; // @[Mux.scala 27:72]
+  wire [31:0] aligndata = _T_520 | _T_521; // @[Mux.scala 27:72]
   wire  first4B = aligndata[1:0] == 2'h3; // @[el2_ifu_aln_ctl.scala 348:29]
   wire  first2B = ~first4B; // @[el2_ifu_aln_ctl.scala 350:17]
   wire  shift_2B = i0_shift & first2B; // @[el2_ifu_aln_ctl.scala 412:24]
-  wire [1:0] _T_444 = {1'h0,f0val[1]}; // @[Cat.scala 29:58]
-  wire [1:0] _T_449 = shift_2B ? _T_444 : 2'h0; // @[Mux.scala 27:72]
-  wire  _T_445 = ~shift_2B; // @[el2_ifu_aln_ctl.scala 300:18]
+  wire [1:0] _T_443 = {1'h0,f0val[1]}; // @[Cat.scala 29:58]
+  wire [1:0] _T_448 = shift_2B ? _T_443 : 2'h0; // @[Mux.scala 27:72]
+  wire  _T_444 = ~shift_2B; // @[el2_ifu_aln_ctl.scala 300:18]
   wire  shift_4B = i0_shift & first4B; // @[el2_ifu_aln_ctl.scala 413:24]
-  wire  _T_446 = ~shift_4B; // @[el2_ifu_aln_ctl.scala 300:30]
-  wire  _T_447 = _T_445 & _T_446; // @[el2_ifu_aln_ctl.scala 300:28]
-  wire [1:0] _T_450 = _T_447 ? f0val : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] sf0val = _T_449 | _T_450; // @[Mux.scala 27:72]
+  wire  _T_445 = ~shift_4B; // @[el2_ifu_aln_ctl.scala 300:30]
+  wire  _T_446 = _T_444 & _T_445; // @[el2_ifu_aln_ctl.scala 300:28]
+  wire [1:0] _T_449 = _T_446 ? f0val : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] sf0val = _T_448 | _T_449; // @[Mux.scala 27:72]
   wire  sf0_valid = sf0val[0]; // @[el2_ifu_aln_ctl.scala 253:22]
-  wire  _T_352 = ~sf0_valid; // @[el2_ifu_aln_ctl.scala 272:26]
-  wire  _T_803 = f0val[0] & _T_514; // @[el2_ifu_aln_ctl.scala 416:28]
-  wire  f1_shift_2B = _T_803 & shift_4B; // @[el2_ifu_aln_ctl.scala 416:40]
-  wire  _T_418 = f1_shift_2B & f1val[1]; // @[Mux.scala 27:72]
-  wire  _T_417 = ~f1_shift_2B; // @[el2_ifu_aln_ctl.scala 293:53]
-  wire [1:0] _T_419 = _T_417 ? f1val : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] _GEN_13 = {{1'd0}, _T_418}; // @[Mux.scala 27:72]
-  wire [1:0] sf1val = _GEN_13 | _T_419; // @[Mux.scala 27:72]
+  wire  _T_351 = ~sf0_valid; // @[el2_ifu_aln_ctl.scala 272:26]
+  wire  _T_802 = f0val[0] & _T_513; // @[el2_ifu_aln_ctl.scala 416:28]
+  wire  f1_shift_2B = _T_802 & shift_4B; // @[el2_ifu_aln_ctl.scala 416:40]
+  wire  _T_417 = f1_shift_2B & f1val[1]; // @[Mux.scala 27:72]
+  wire  _T_416 = ~f1_shift_2B; // @[el2_ifu_aln_ctl.scala 293:53]
+  wire [1:0] _T_418 = _T_416 ? f1val : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] _GEN_13 = {{1'd0}, _T_417}; // @[Mux.scala 27:72]
+  wire [1:0] sf1val = _GEN_13 | _T_418; // @[Mux.scala 27:72]
   wire  sf1_valid = sf1val[0]; // @[el2_ifu_aln_ctl.scala 252:22]
-  wire  _T_353 = _T_352 & sf1_valid; // @[el2_ifu_aln_ctl.scala 272:37]
+  wire  _T_352 = _T_351 & sf1_valid; // @[el2_ifu_aln_ctl.scala 272:37]
   wire  f2_valid = f2val[0]; // @[el2_ifu_aln_ctl.scala 251:20]
-  wire  _T_354 = _T_353 & f2_valid; // @[el2_ifu_aln_ctl.scala 272:50]
+  wire  _T_353 = _T_352 & f2_valid; // @[el2_ifu_aln_ctl.scala 272:50]
   wire  ifvalid = io_ifu_fetch_val[0]; // @[el2_ifu_aln_ctl.scala 261:30]
-  wire  _T_355 = _T_354 & ifvalid; // @[el2_ifu_aln_ctl.scala 272:62]
-  wire  _T_356 = sf0_valid & sf1_valid; // @[el2_ifu_aln_ctl.scala 273:37]
-  wire  _T_357 = ~f2_valid; // @[el2_ifu_aln_ctl.scala 273:52]
-  wire  _T_358 = _T_356 & _T_357; // @[el2_ifu_aln_ctl.scala 273:50]
-  wire  _T_359 = _T_358 & ifvalid; // @[el2_ifu_aln_ctl.scala 273:62]
-  wire  fetch_to_f2 = _T_355 | _T_359; // @[el2_ifu_aln_ctl.scala 272:74]
+  wire  _T_354 = _T_353 & ifvalid; // @[el2_ifu_aln_ctl.scala 272:62]
+  wire  _T_355 = sf0_valid & sf1_valid; // @[el2_ifu_aln_ctl.scala 273:37]
+  wire  _T_356 = ~f2_valid; // @[el2_ifu_aln_ctl.scala 273:52]
+  wire  _T_357 = _T_355 & _T_356; // @[el2_ifu_aln_ctl.scala 273:50]
+  wire  _T_358 = _T_357 & ifvalid; // @[el2_ifu_aln_ctl.scala 273:62]
+  wire  fetch_to_f2 = _T_354 | _T_358; // @[el2_ifu_aln_ctl.scala 272:74]
   reg [30:0] f2pc; // @[Reg.scala 27:20]
-  wire  _T_336 = ~sf1_valid; // @[el2_ifu_aln_ctl.scala 268:39]
-  wire  _T_337 = _T_352 & _T_336; // @[el2_ifu_aln_ctl.scala 268:37]
-  wire  _T_338 = _T_337 & f2_valid; // @[el2_ifu_aln_ctl.scala 268:50]
-  wire  _T_339 = _T_338 & ifvalid; // @[el2_ifu_aln_ctl.scala 268:62]
-  wire  _T_343 = _T_353 & _T_357; // @[el2_ifu_aln_ctl.scala 269:50]
-  wire  _T_344 = _T_343 & ifvalid; // @[el2_ifu_aln_ctl.scala 269:62]
-  wire  _T_345 = _T_339 | _T_344; // @[el2_ifu_aln_ctl.scala 268:74]
-  wire  _T_347 = sf0_valid & _T_336; // @[el2_ifu_aln_ctl.scala 270:37]
-  wire  _T_349 = _T_347 & _T_357; // @[el2_ifu_aln_ctl.scala 270:50]
-  wire  _T_350 = _T_349 & ifvalid; // @[el2_ifu_aln_ctl.scala 270:62]
-  wire  fetch_to_f1 = _T_345 | _T_350; // @[el2_ifu_aln_ctl.scala 269:74]
-  wire  _T_25 = fetch_to_f1 | _T_354; // @[el2_ifu_aln_ctl.scala 157:33]
+  wire  _T_335 = ~sf1_valid; // @[el2_ifu_aln_ctl.scala 268:39]
+  wire  _T_336 = _T_351 & _T_335; // @[el2_ifu_aln_ctl.scala 268:37]
+  wire  _T_337 = _T_336 & f2_valid; // @[el2_ifu_aln_ctl.scala 268:50]
+  wire  _T_338 = _T_337 & ifvalid; // @[el2_ifu_aln_ctl.scala 268:62]
+  wire  _T_342 = _T_352 & _T_356; // @[el2_ifu_aln_ctl.scala 269:50]
+  wire  _T_343 = _T_342 & ifvalid; // @[el2_ifu_aln_ctl.scala 269:62]
+  wire  _T_344 = _T_338 | _T_343; // @[el2_ifu_aln_ctl.scala 268:74]
+  wire  _T_346 = sf0_valid & _T_335; // @[el2_ifu_aln_ctl.scala 270:37]
+  wire  _T_348 = _T_346 & _T_356; // @[el2_ifu_aln_ctl.scala 270:50]
+  wire  _T_349 = _T_348 & ifvalid; // @[el2_ifu_aln_ctl.scala 270:62]
+  wire  fetch_to_f1 = _T_344 | _T_349; // @[el2_ifu_aln_ctl.scala 269:74]
+  wire  _T_25 = fetch_to_f1 | _T_353; // @[el2_ifu_aln_ctl.scala 157:33]
   wire  f1_shift_wr_en = _T_25 | f1_shift_2B; // @[el2_ifu_aln_ctl.scala 157:47]
   reg [30:0] f1pc; // @[Reg.scala 27:20]
-  wire [30:0] _T_376 = fetch_to_f1 ? io_ifu_fetch_pc : 31'h0; // @[Mux.scala 27:72]
-  wire [30:0] _T_377 = _T_354 ? f2pc : 31'h0; // @[Mux.scala 27:72]
-  wire [30:0] _T_379 = _T_376 | _T_377; // @[Mux.scala 27:72]
-  wire  _T_372 = ~fetch_to_f1; // @[el2_ifu_aln_ctl.scala 283:6]
-  wire  _T_373 = ~_T_354; // @[el2_ifu_aln_ctl.scala 283:21]
-  wire  _T_374 = _T_372 & _T_373; // @[el2_ifu_aln_ctl.scala 283:19]
-  wire [30:0] _T_364 = f1_shift_2B ? 31'h7fffffff : 31'h0; // @[Bitwise.scala 72:12]
+  wire [30:0] _T_375 = fetch_to_f1 ? io_ifu_fetch_pc : 31'h0; // @[Mux.scala 27:72]
+  wire [30:0] _T_376 = _T_353 ? f2pc : 31'h0; // @[Mux.scala 27:72]
+  wire [30:0] _T_378 = _T_375 | _T_376; // @[Mux.scala 27:72]
+  wire  _T_371 = ~fetch_to_f1; // @[el2_ifu_aln_ctl.scala 283:6]
+  wire  _T_372 = ~_T_353; // @[el2_ifu_aln_ctl.scala 283:21]
+  wire  _T_373 = _T_371 & _T_372; // @[el2_ifu_aln_ctl.scala 283:19]
+  wire [30:0] _T_363 = f1_shift_2B ? 31'h7fffffff : 31'h0; // @[Bitwise.scala 72:12]
   wire [30:0] f1pc_plus1 = f1pc + 31'h1; // @[el2_ifu_aln_ctl.scala 277:25]
-  wire [30:0] _T_365 = _T_364 & f1pc_plus1; // @[el2_ifu_aln_ctl.scala 279:38]
-  wire [30:0] _T_368 = _T_417 ? 31'h7fffffff : 31'h0; // @[Bitwise.scala 72:12]
-  wire [30:0] _T_369 = _T_368 & f1pc; // @[el2_ifu_aln_ctl.scala 279:78]
-  wire [30:0] sf1pc = _T_365 | _T_369; // @[el2_ifu_aln_ctl.scala 279:52]
-  wire [30:0] _T_378 = _T_374 ? sf1pc : 31'h0; // @[Mux.scala 27:72]
-  wire [30:0] f1pc_in = _T_379 | _T_378; // @[Mux.scala 27:72]
-  wire  _T_333 = _T_337 & _T_357; // @[el2_ifu_aln_ctl.scala 267:50]
-  wire  fetch_to_f0 = _T_333 & ifvalid; // @[el2_ifu_aln_ctl.scala 267:62]
-  wire  _T_27 = fetch_to_f0 | _T_338; // @[el2_ifu_aln_ctl.scala 158:33]
-  wire  _T_28 = _T_27 | _T_353; // @[el2_ifu_aln_ctl.scala 158:47]
+  wire [30:0] _T_364 = _T_363 & f1pc_plus1; // @[el2_ifu_aln_ctl.scala 279:38]
+  wire [30:0] _T_367 = _T_416 ? 31'h7fffffff : 31'h0; // @[Bitwise.scala 72:12]
+  wire [30:0] _T_368 = _T_367 & f1pc; // @[el2_ifu_aln_ctl.scala 279:78]
+  wire [30:0] sf1pc = _T_364 | _T_368; // @[el2_ifu_aln_ctl.scala 279:52]
+  wire [30:0] _T_377 = _T_373 ? sf1pc : 31'h0; // @[Mux.scala 27:72]
+  wire [30:0] f1pc_in = _T_378 | _T_377; // @[Mux.scala 27:72]
+  wire  _T_332 = _T_336 & _T_356; // @[el2_ifu_aln_ctl.scala 267:50]
+  wire  fetch_to_f0 = _T_332 & ifvalid; // @[el2_ifu_aln_ctl.scala 267:62]
+  wire  _T_27 = fetch_to_f0 | _T_337; // @[el2_ifu_aln_ctl.scala 158:33]
+  wire  _T_28 = _T_27 | _T_352; // @[el2_ifu_aln_ctl.scala 158:47]
   wire  _T_29 = _T_28 | shift_2B; // @[el2_ifu_aln_ctl.scala 158:61]
   wire  f0_shift_wr_en = _T_29 | shift_4B; // @[el2_ifu_aln_ctl.scala 158:72]
   reg [30:0] f0pc; // @[Reg.scala 27:20]
-  wire [30:0] _T_391 = fetch_to_f0 ? io_ifu_fetch_pc : 31'h0; // @[Mux.scala 27:72]
-  wire [30:0] _T_392 = _T_338 ? f2pc : 31'h0; // @[Mux.scala 27:72]
-  wire [30:0] _T_395 = _T_391 | _T_392; // @[Mux.scala 27:72]
-  wire [30:0] _T_393 = _T_353 ? sf1pc : 31'h0; // @[Mux.scala 27:72]
-  wire [30:0] _T_396 = _T_395 | _T_393; // @[Mux.scala 27:72]
-  wire  _T_385 = ~fetch_to_f0; // @[el2_ifu_aln_ctl.scala 288:24]
-  wire  _T_386 = ~_T_338; // @[el2_ifu_aln_ctl.scala 288:39]
-  wire  _T_387 = _T_385 & _T_386; // @[el2_ifu_aln_ctl.scala 288:37]
-  wire  _T_388 = ~_T_353; // @[el2_ifu_aln_ctl.scala 288:54]
-  wire  _T_389 = _T_387 & _T_388; // @[el2_ifu_aln_ctl.scala 288:52]
+  wire [30:0] _T_390 = fetch_to_f0 ? io_ifu_fetch_pc : 31'h0; // @[Mux.scala 27:72]
+  wire [30:0] _T_391 = _T_337 ? f2pc : 31'h0; // @[Mux.scala 27:72]
+  wire [30:0] _T_394 = _T_390 | _T_391; // @[Mux.scala 27:72]
+  wire [30:0] _T_392 = _T_352 ? sf1pc : 31'h0; // @[Mux.scala 27:72]
+  wire [30:0] _T_395 = _T_394 | _T_392; // @[Mux.scala 27:72]
+  wire  _T_384 = ~fetch_to_f0; // @[el2_ifu_aln_ctl.scala 288:24]
+  wire  _T_385 = ~_T_337; // @[el2_ifu_aln_ctl.scala 288:39]
+  wire  _T_386 = _T_384 & _T_385; // @[el2_ifu_aln_ctl.scala 288:37]
+  wire  _T_387 = ~_T_352; // @[el2_ifu_aln_ctl.scala 288:54]
+  wire  _T_388 = _T_386 & _T_387; // @[el2_ifu_aln_ctl.scala 288:52]
   wire [30:0] f0pc_plus1 = f0pc + 31'h1; // @[el2_ifu_aln_ctl.scala 275:25]
-  wire [30:0] _T_394 = _T_389 ? f0pc_plus1 : 31'h0; // @[Mux.scala 27:72]
-  wire [30:0] f0pc_in = _T_396 | _T_394; // @[Mux.scala 27:72]
+  wire [30:0] _T_393 = _T_388 ? f0pc_plus1 : 31'h0; // @[Mux.scala 27:72]
+  wire [30:0] f0pc_in = _T_395 | _T_393; // @[Mux.scala 27:72]
   wire  _T_35 = wrptr == 2'h2; // @[el2_ifu_aln_ctl.scala 161:21]
   wire  _T_36 = _T_35 & ifvalid; // @[el2_ifu_aln_ctl.scala 161:29]
   wire  _T_37 = wrptr == 2'h1; // @[el2_ifu_aln_ctl.scala 161:46]
@@ -726,12 +726,12 @@ module el2_ifu_aln_ctl(
   wire  _T_40 = _T_39 & ifvalid; // @[el2_ifu_aln_ctl.scala 161:79]
   wire [2:0] qwen = {_T_36,_T_38,_T_40}; // @[Cat.scala 29:58]
   reg [11:0] brdata2; // @[Reg.scala 27:20]
-  wire [5:0] _T_242 = {io_ifu_bp_hist1_f[0],io_ifu_bp_hist0_f[0],io_ifu_bp_pc4_f[0],io_ifu_bp_way_f[0],io_ifu_bp_valid_f[0],io_ifu_bp_ret_f[0]}; // @[Cat.scala 29:58]
-  wire [11:0] brdata_in = {io_ifu_bp_hist1_f[1],io_ifu_bp_hist0_f[1],io_ifu_bp_pc4_f[1],io_ifu_bp_way_f[1],io_ifu_bp_valid_f[1],io_ifu_bp_ret_f[1],_T_242}; // @[Cat.scala 29:58]
+  wire [5:0] _T_241 = {io_ifu_bp_hist1_f[0],io_ifu_bp_hist0_f[0],io_ifu_bp_pc4_f[0],io_ifu_bp_way_f[0],io_ifu_bp_valid_f[0],io_ifu_bp_ret_f[0]}; // @[Cat.scala 29:58]
+  wire [11:0] brdata_in = {io_ifu_bp_hist1_f[1],io_ifu_bp_hist0_f[1],io_ifu_bp_pc4_f[1],io_ifu_bp_way_f[1],io_ifu_bp_valid_f[1],io_ifu_bp_ret_f[1],_T_241}; // @[Cat.scala 29:58]
   reg [11:0] brdata1; // @[Reg.scala 27:20]
   reg [11:0] brdata0; // @[Reg.scala 27:20]
   reg [54:0] _T_14; // @[Reg.scala 27:20]
-  wire [54:0] misc_data_in = {io_iccm_rd_ecc_double_err,io_ic_access_fault_f,io_ic_access_fault_type_f,io_ifu_bp_btb_target_f[31:1],io_ifu_bp_poffset_f,io_ifu_bp_fghr_f}; // @[Cat.scala 29:58]
+  wire [54:0] misc_data_in = {io_iccm_rd_ecc_double_err,io_ic_access_fault_f,io_ic_access_fault_type_f,io_ifu_bp_btb_target_f,io_ifu_bp_poffset_f,io_ifu_bp_fghr_f}; // @[Cat.scala 29:58]
   reg [54:0] _T_16; // @[Reg.scala 27:20]
   reg [54:0] _T_18; // @[Reg.scala 27:20]
   wire  _T_44 = qren[0] & io_ifu_fb_consume1; // @[el2_ifu_aln_ctl.scala 163:34]
@@ -766,11 +766,11 @@ module el2_ifu_aln_ctl(
   wire [1:0] wrptr_in = _T_113 | _T_112; // @[Mux.scala 27:72]
   wire  _T_118 = ~qwen[2]; // @[el2_ifu_aln_ctl.scala 176:26]
   wire  _T_120 = _T_118 & _T_188; // @[el2_ifu_aln_ctl.scala 176:35]
-  wire  _T_796 = shift_2B & f0val[0]; // @[Mux.scala 27:72]
-  wire  _T_793 = ~f0val[0]; // @[el2_ifu_aln_ctl.scala 415:77]
-  wire  _T_795 = _T_793 & f0val[0]; // @[el2_ifu_aln_ctl.scala 415:87]
-  wire  _T_797 = shift_4B & _T_795; // @[Mux.scala 27:72]
-  wire  f0_shift_2B = _T_796 | _T_797; // @[Mux.scala 27:72]
+  wire  _T_795 = shift_2B & f0val[0]; // @[Mux.scala 27:72]
+  wire  _T_792 = ~f0val[0]; // @[el2_ifu_aln_ctl.scala 415:77]
+  wire  _T_794 = _T_792 & f0val[0]; // @[el2_ifu_aln_ctl.scala 415:87]
+  wire  _T_796 = shift_4B & _T_794; // @[Mux.scala 27:72]
+  wire  f0_shift_2B = _T_795 | _T_796; // @[Mux.scala 27:72]
   wire  _T_122 = q2off | f0_shift_2B; // @[el2_ifu_aln_ctl.scala 176:74]
   wire  _T_126 = _T_118 & _T_187; // @[el2_ifu_aln_ctl.scala 177:15]
   wire  _T_128 = q2off | f1_shift_2B; // @[el2_ifu_aln_ctl.scala 177:54]
@@ -804,15 +804,15 @@ module el2_ifu_aln_ctl(
   wire  q0off_in = _T_183 | _T_182; // @[Mux.scala 27:72]
   wire [53:0] misc1 = _T_16[53:0]; // @[el2_ifu_aln_ctl.scala 149:9]
   wire [53:0] misc0 = _T_18[53:0]; // @[el2_ifu_aln_ctl.scala 150:9]
-  wire [107:0] _T_212 = {misc1,misc0}; // @[Cat.scala 29:58]
+  wire [107:0] _T_211 = {misc1,misc0}; // @[Cat.scala 29:58]
   wire [53:0] misc2 = _T_14[53:0]; // @[el2_ifu_aln_ctl.scala 148:9]
-  wire [107:0] _T_215 = {misc2,misc1}; // @[Cat.scala 29:58]
-  wire [107:0] _T_218 = {misc0,misc2}; // @[Cat.scala 29:58]
-  wire [107:0] _T_219 = qren[0] ? _T_212 : 108'h0; // @[Mux.scala 27:72]
-  wire [107:0] _T_220 = qren[1] ? _T_215 : 108'h0; // @[Mux.scala 27:72]
-  wire [107:0] _T_221 = qren[2] ? _T_218 : 108'h0; // @[Mux.scala 27:72]
-  wire [107:0] _T_222 = _T_219 | _T_220; // @[Mux.scala 27:72]
-  wire [107:0] misceff = _T_222 | _T_221; // @[Mux.scala 27:72]
+  wire [107:0] _T_214 = {misc2,misc1}; // @[Cat.scala 29:58]
+  wire [107:0] _T_217 = {misc0,misc2}; // @[Cat.scala 29:58]
+  wire [107:0] _T_218 = qren[0] ? _T_211 : 108'h0; // @[Mux.scala 27:72]
+  wire [107:0] _T_219 = qren[1] ? _T_214 : 108'h0; // @[Mux.scala 27:72]
+  wire [107:0] _T_220 = qren[2] ? _T_217 : 108'h0; // @[Mux.scala 27:72]
+  wire [107:0] _T_221 = _T_218 | _T_219; // @[Mux.scala 27:72]
+  wire [107:0] misceff = _T_221 | _T_220; // @[Mux.scala 27:72]
   wire [52:0] misc1eff = misceff[107:55]; // @[el2_ifu_aln_ctl.scala 205:25]
   wire [54:0] misc0eff = misceff[54:0]; // @[el2_ifu_aln_ctl.scala 206:25]
   wire  f1dbecc = misc1eff[52]; // @[el2_ifu_aln_ctl.scala 209:25]
@@ -827,24 +827,24 @@ module el2_ifu_aln_ctl(
   wire [32:0] f0prett = misc0eff[50:18]; // @[el2_ifu_aln_ctl.scala 219:25]
   wire [12:0] f0poffset = misc0eff[17:5]; // @[el2_ifu_aln_ctl.scala 220:27]
   wire [4:0] f0fghr = misc0eff[4:0]; // @[el2_ifu_aln_ctl.scala 221:24]
-  wire [23:0] _T_251 = {brdata1,brdata0}; // @[Cat.scala 29:58]
-  wire [23:0] _T_254 = {brdata2,brdata1}; // @[Cat.scala 29:58]
-  wire [23:0] _T_257 = {brdata0,brdata2}; // @[Cat.scala 29:58]
-  wire [23:0] _T_258 = qren[0] ? _T_251 : 24'h0; // @[Mux.scala 27:72]
-  wire [23:0] _T_259 = qren[1] ? _T_254 : 24'h0; // @[Mux.scala 27:72]
-  wire [23:0] _T_260 = qren[2] ? _T_257 : 24'h0; // @[Mux.scala 27:72]
-  wire [23:0] _T_261 = _T_258 | _T_259; // @[Mux.scala 27:72]
-  wire [23:0] brdataeff = _T_261 | _T_260; // @[Mux.scala 27:72]
+  wire [23:0] _T_250 = {brdata1,brdata0}; // @[Cat.scala 29:58]
+  wire [23:0] _T_253 = {brdata2,brdata1}; // @[Cat.scala 29:58]
+  wire [23:0] _T_256 = {brdata0,brdata2}; // @[Cat.scala 29:58]
+  wire [23:0] _T_257 = qren[0] ? _T_250 : 24'h0; // @[Mux.scala 27:72]
+  wire [23:0] _T_258 = qren[1] ? _T_253 : 24'h0; // @[Mux.scala 27:72]
+  wire [23:0] _T_259 = qren[2] ? _T_256 : 24'h0; // @[Mux.scala 27:72]
+  wire [23:0] _T_260 = _T_257 | _T_258; // @[Mux.scala 27:72]
+  wire [23:0] brdataeff = _T_260 | _T_259; // @[Mux.scala 27:72]
   wire [11:0] brdata0eff = brdataeff[11:0]; // @[el2_ifu_aln_ctl.scala 231:43]
   wire [11:0] brdata1eff = brdataeff[23:12]; // @[el2_ifu_aln_ctl.scala 231:61]
-  wire [11:0] _T_268 = q0sel[0] ? brdata0eff : 12'h0; // @[Mux.scala 27:72]
-  wire [5:0] _T_269 = q0sel[1] ? brdata0eff[11:6] : 6'h0; // @[Mux.scala 27:72]
-  wire [11:0] _GEN_17 = {{6'd0}, _T_269}; // @[Mux.scala 27:72]
-  wire [11:0] brdata0final = _T_268 | _GEN_17; // @[Mux.scala 27:72]
-  wire [11:0] _T_276 = q1sel[0] ? brdata1eff : 12'h0; // @[Mux.scala 27:72]
-  wire [5:0] _T_277 = q1sel[1] ? brdata1eff[11:6] : 6'h0; // @[Mux.scala 27:72]
-  wire [11:0] _GEN_18 = {{6'd0}, _T_277}; // @[Mux.scala 27:72]
-  wire [11:0] brdata1final = _T_276 | _GEN_18; // @[Mux.scala 27:72]
+  wire [11:0] _T_267 = q0sel[0] ? brdata0eff : 12'h0; // @[Mux.scala 27:72]
+  wire [5:0] _T_268 = q0sel[1] ? brdata0eff[11:6] : 6'h0; // @[Mux.scala 27:72]
+  wire [11:0] _GEN_17 = {{6'd0}, _T_268}; // @[Mux.scala 27:72]
+  wire [11:0] brdata0final = _T_267 | _GEN_17; // @[Mux.scala 27:72]
+  wire [11:0] _T_275 = q1sel[0] ? brdata1eff : 12'h0; // @[Mux.scala 27:72]
+  wire [5:0] _T_276 = q1sel[1] ? brdata1eff[11:6] : 6'h0; // @[Mux.scala 27:72]
+  wire [11:0] _GEN_18 = {{6'd0}, _T_276}; // @[Mux.scala 27:72]
+  wire [11:0] brdata1final = _T_275 | _GEN_18; // @[Mux.scala 27:72]
   wire [1:0] f0ret = {brdata0final[6],brdata0final[0]}; // @[Cat.scala 29:58]
   wire [1:0] f0brend = {brdata0final[7],brdata0final[1]}; // @[Cat.scala 29:58]
   wire [1:0] f0way = {brdata0final[8],brdata0final[2]}; // @[Cat.scala 29:58]
@@ -857,158 +857,158 @@ module el2_ifu_aln_ctl(
   wire [1:0] f1pc4 = {brdata1final[9],brdata1final[3]}; // @[Cat.scala 29:58]
   wire [1:0] f1hist0 = {brdata1final[10],brdata1final[4]}; // @[Cat.scala 29:58]
   wire [1:0] f1hist1 = {brdata1final[11],brdata1final[5]}; // @[Cat.scala 29:58]
-  wire  consume_fb0 = _T_352 & f0val[0]; // @[el2_ifu_aln_ctl.scala 255:32]
-  wire  consume_fb1 = _T_336 & f1val[0]; // @[el2_ifu_aln_ctl.scala 256:32]
-  wire  _T_312 = ~consume_fb1; // @[el2_ifu_aln_ctl.scala 258:39]
-  wire  _T_313 = consume_fb0 & _T_312; // @[el2_ifu_aln_ctl.scala 258:37]
-  wire  _T_316 = consume_fb0 & consume_fb1; // @[el2_ifu_aln_ctl.scala 259:37]
-  wire  _T_400 = fetch_to_f2 & _T_1; // @[el2_ifu_aln_ctl.scala 290:38]
-  wire  _T_402 = ~fetch_to_f2; // @[el2_ifu_aln_ctl.scala 291:25]
-  wire  _T_404 = _T_402 & _T_373; // @[el2_ifu_aln_ctl.scala 291:38]
-  wire  _T_406 = _T_404 & _T_386; // @[el2_ifu_aln_ctl.scala 291:53]
-  wire  _T_408 = _T_406 & _T_1; // @[el2_ifu_aln_ctl.scala 291:68]
-  wire [1:0] _T_410 = _T_400 ? io_ifu_fetch_val : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] _T_411 = _T_408 ? f2val : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] f2val_in = _T_410 | _T_411; // @[Mux.scala 27:72]
-  wire  _T_423 = fetch_to_f1 & _T_1; // @[el2_ifu_aln_ctl.scala 295:39]
-  wire  _T_426 = _T_354 & _T_1; // @[el2_ifu_aln_ctl.scala 296:54]
-  wire  _T_432 = _T_374 & _T_388; // @[el2_ifu_aln_ctl.scala 297:54]
-  wire  _T_434 = _T_432 & _T_1; // @[el2_ifu_aln_ctl.scala 297:69]
-  wire [1:0] _T_436 = _T_423 ? io_ifu_fetch_val : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] _T_437 = _T_426 ? f2val : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] _T_438 = _T_434 ? sf1val : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] _T_439 = _T_436 | _T_437; // @[Mux.scala 27:72]
-  wire [1:0] f1val_in = _T_439 | _T_438; // @[Mux.scala 27:72]
-  wire  _T_454 = fetch_to_f0 & _T_1; // @[el2_ifu_aln_ctl.scala 302:38]
-  wire  _T_457 = _T_338 & _T_1; // @[el2_ifu_aln_ctl.scala 303:54]
-  wire  _T_460 = _T_353 & _T_1; // @[el2_ifu_aln_ctl.scala 304:69]
-  wire  _T_468 = _T_389 & _T_1; // @[el2_ifu_aln_ctl.scala 305:69]
-  wire [1:0] _T_470 = _T_454 ? io_ifu_fetch_val : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] _T_471 = _T_457 ? f2val : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] _T_472 = _T_460 ? sf1val : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] _T_473 = _T_468 ? sf0val : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] _T_474 = _T_470 | _T_471; // @[Mux.scala 27:72]
-  wire [1:0] _T_475 = _T_474 | _T_472; // @[Mux.scala 27:72]
-  wire [1:0] f0val_in = _T_475 | _T_473; // @[Mux.scala 27:72]
-  wire [1:0] _T_531 = {f1val[0],1'h1}; // @[Cat.scala 29:58]
-  wire [1:0] _T_532 = f0val[1] ? 2'h3 : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] _T_533 = _T_516 ? _T_531 : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] alignval = _T_532 | _T_533; // @[Mux.scala 27:72]
-  wire [1:0] _T_543 = {f1icaf,f0icaf}; // @[Cat.scala 29:58]
-  wire  _T_544 = f0val[1] & f0icaf; // @[Mux.scala 27:72]
-  wire [1:0] _T_545 = _T_516 ? _T_543 : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] _GEN_19 = {{1'd0}, _T_544}; // @[Mux.scala 27:72]
-  wire [1:0] alignicaf = _GEN_19 | _T_545; // @[Mux.scala 27:72]
-  wire [1:0] _T_550 = f0dbecc ? 2'h3 : 2'h0; // @[Bitwise.scala 72:12]
-  wire [1:0] _T_556 = {f1dbecc,f0dbecc}; // @[Cat.scala 29:58]
-  wire [1:0] _T_557 = f0val[1] ? _T_550 : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] _T_558 = _T_516 ? _T_556 : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] aligndbecc = _T_557 | _T_558; // @[Mux.scala 27:72]
-  wire [1:0] _T_569 = {f1brend[0],f0brend[0]}; // @[Cat.scala 29:58]
-  wire [1:0] _T_570 = f0val[1] ? f0brend : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] _T_571 = _T_516 ? _T_569 : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] alignbrend = _T_570 | _T_571; // @[Mux.scala 27:72]
-  wire [1:0] _T_582 = {f1pc4[0],f0pc4[0]}; // @[Cat.scala 29:58]
-  wire [1:0] _T_583 = f0val[1] ? f0pc4 : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] _T_584 = _T_516 ? _T_582 : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] alignpc4 = _T_583 | _T_584; // @[Mux.scala 27:72]
-  wire [1:0] _T_595 = {f1ret[0],f0ret[0]}; // @[Cat.scala 29:58]
-  wire [1:0] _T_596 = f0val[1] ? f0ret : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] _T_597 = _T_516 ? _T_595 : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] alignret = _T_596 | _T_597; // @[Mux.scala 27:72]
-  wire [1:0] _T_608 = {f1way[0],f0way[0]}; // @[Cat.scala 29:58]
-  wire [1:0] _T_609 = f0val[1] ? f0way : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] _T_610 = _T_516 ? _T_608 : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] alignway = _T_609 | _T_610; // @[Mux.scala 27:72]
-  wire [1:0] _T_621 = {f1hist1[0],f0hist1[0]}; // @[Cat.scala 29:58]
-  wire [1:0] _T_622 = f0val[1] ? f0hist1 : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] _T_623 = _T_516 ? _T_621 : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] alignhist1 = _T_622 | _T_623; // @[Mux.scala 27:72]
-  wire [1:0] _T_634 = {f1hist0[0],f0hist0[0]}; // @[Cat.scala 29:58]
-  wire [1:0] _T_635 = f0val[1] ? f0hist0 : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] _T_636 = _T_516 ? _T_634 : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] alignhist0 = _T_635 | _T_636; // @[Mux.scala 27:72]
-  wire [30:0] _T_648 = f0val[1] ? f0pc_plus1 : 31'h0; // @[Mux.scala 27:72]
-  wire [30:0] _T_649 = _T_516 ? f1pc : 31'h0; // @[Mux.scala 27:72]
-  wire [30:0] secondpc = _T_648 | _T_649; // @[Mux.scala 27:72]
-  wire  _T_658 = first4B & alignval[1]; // @[Mux.scala 27:72]
-  wire  _T_659 = first2B & alignval[0]; // @[Mux.scala 27:72]
-  wire  _T_663 = |alignicaf; // @[el2_ifu_aln_ctl.scala 354:59]
-  wire  _T_666 = first4B & _T_663; // @[Mux.scala 27:72]
-  wire  _T_667 = first2B & alignicaf[0]; // @[Mux.scala 27:72]
-  wire  _T_672 = first4B & _T_514; // @[el2_ifu_aln_ctl.scala 356:39]
-  wire  _T_674 = _T_672 & f0val[0]; // @[el2_ifu_aln_ctl.scala 356:51]
-  wire  _T_676 = ~alignicaf[0]; // @[el2_ifu_aln_ctl.scala 356:64]
-  wire  _T_677 = _T_674 & _T_676; // @[el2_ifu_aln_ctl.scala 356:62]
-  wire  _T_679 = ~aligndbecc[0]; // @[el2_ifu_aln_ctl.scala 356:80]
-  wire  _T_680 = _T_677 & _T_679; // @[el2_ifu_aln_ctl.scala 356:78]
+  wire  consume_fb0 = _T_351 & f0val[0]; // @[el2_ifu_aln_ctl.scala 255:32]
+  wire  consume_fb1 = _T_335 & f1val[0]; // @[el2_ifu_aln_ctl.scala 256:32]
+  wire  _T_311 = ~consume_fb1; // @[el2_ifu_aln_ctl.scala 258:39]
+  wire  _T_312 = consume_fb0 & _T_311; // @[el2_ifu_aln_ctl.scala 258:37]
+  wire  _T_315 = consume_fb0 & consume_fb1; // @[el2_ifu_aln_ctl.scala 259:37]
+  wire  _T_399 = fetch_to_f2 & _T_1; // @[el2_ifu_aln_ctl.scala 290:38]
+  wire  _T_401 = ~fetch_to_f2; // @[el2_ifu_aln_ctl.scala 291:25]
+  wire  _T_403 = _T_401 & _T_372; // @[el2_ifu_aln_ctl.scala 291:38]
+  wire  _T_405 = _T_403 & _T_385; // @[el2_ifu_aln_ctl.scala 291:53]
+  wire  _T_407 = _T_405 & _T_1; // @[el2_ifu_aln_ctl.scala 291:68]
+  wire [1:0] _T_409 = _T_399 ? io_ifu_fetch_val : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] _T_410 = _T_407 ? f2val : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] f2val_in = _T_409 | _T_410; // @[Mux.scala 27:72]
+  wire  _T_422 = fetch_to_f1 & _T_1; // @[el2_ifu_aln_ctl.scala 295:39]
+  wire  _T_425 = _T_353 & _T_1; // @[el2_ifu_aln_ctl.scala 296:54]
+  wire  _T_431 = _T_373 & _T_387; // @[el2_ifu_aln_ctl.scala 297:54]
+  wire  _T_433 = _T_431 & _T_1; // @[el2_ifu_aln_ctl.scala 297:69]
+  wire [1:0] _T_435 = _T_422 ? io_ifu_fetch_val : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] _T_436 = _T_425 ? f2val : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] _T_437 = _T_433 ? sf1val : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] _T_438 = _T_435 | _T_436; // @[Mux.scala 27:72]
+  wire [1:0] f1val_in = _T_438 | _T_437; // @[Mux.scala 27:72]
+  wire  _T_453 = fetch_to_f0 & _T_1; // @[el2_ifu_aln_ctl.scala 302:38]
+  wire  _T_456 = _T_337 & _T_1; // @[el2_ifu_aln_ctl.scala 303:54]
+  wire  _T_459 = _T_352 & _T_1; // @[el2_ifu_aln_ctl.scala 304:69]
+  wire  _T_467 = _T_388 & _T_1; // @[el2_ifu_aln_ctl.scala 305:69]
+  wire [1:0] _T_469 = _T_453 ? io_ifu_fetch_val : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] _T_470 = _T_456 ? f2val : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] _T_471 = _T_459 ? sf1val : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] _T_472 = _T_467 ? sf0val : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] _T_473 = _T_469 | _T_470; // @[Mux.scala 27:72]
+  wire [1:0] _T_474 = _T_473 | _T_471; // @[Mux.scala 27:72]
+  wire [1:0] f0val_in = _T_474 | _T_472; // @[Mux.scala 27:72]
+  wire [1:0] _T_530 = {f1val[0],1'h1}; // @[Cat.scala 29:58]
+  wire [1:0] _T_531 = f0val[1] ? 2'h3 : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] _T_532 = _T_515 ? _T_530 : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] alignval = _T_531 | _T_532; // @[Mux.scala 27:72]
+  wire [1:0] _T_542 = {f1icaf,f0icaf}; // @[Cat.scala 29:58]
+  wire  _T_543 = f0val[1] & f0icaf; // @[Mux.scala 27:72]
+  wire [1:0] _T_544 = _T_515 ? _T_542 : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] _GEN_19 = {{1'd0}, _T_543}; // @[Mux.scala 27:72]
+  wire [1:0] alignicaf = _GEN_19 | _T_544; // @[Mux.scala 27:72]
+  wire [1:0] _T_549 = f0dbecc ? 2'h3 : 2'h0; // @[Bitwise.scala 72:12]
+  wire [1:0] _T_555 = {f1dbecc,f0dbecc}; // @[Cat.scala 29:58]
+  wire [1:0] _T_556 = f0val[1] ? _T_549 : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] _T_557 = _T_515 ? _T_555 : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] aligndbecc = _T_556 | _T_557; // @[Mux.scala 27:72]
+  wire [1:0] _T_568 = {f1brend[0],f0brend[0]}; // @[Cat.scala 29:58]
+  wire [1:0] _T_569 = f0val[1] ? f0brend : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] _T_570 = _T_515 ? _T_568 : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] alignbrend = _T_569 | _T_570; // @[Mux.scala 27:72]
+  wire [1:0] _T_581 = {f1pc4[0],f0pc4[0]}; // @[Cat.scala 29:58]
+  wire [1:0] _T_582 = f0val[1] ? f0pc4 : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] _T_583 = _T_515 ? _T_581 : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] alignpc4 = _T_582 | _T_583; // @[Mux.scala 27:72]
+  wire [1:0] _T_594 = {f1ret[0],f0ret[0]}; // @[Cat.scala 29:58]
+  wire [1:0] _T_595 = f0val[1] ? f0ret : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] _T_596 = _T_515 ? _T_594 : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] alignret = _T_595 | _T_596; // @[Mux.scala 27:72]
+  wire [1:0] _T_607 = {f1way[0],f0way[0]}; // @[Cat.scala 29:58]
+  wire [1:0] _T_608 = f0val[1] ? f0way : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] _T_609 = _T_515 ? _T_607 : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] alignway = _T_608 | _T_609; // @[Mux.scala 27:72]
+  wire [1:0] _T_620 = {f1hist1[0],f0hist1[0]}; // @[Cat.scala 29:58]
+  wire [1:0] _T_621 = f0val[1] ? f0hist1 : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] _T_622 = _T_515 ? _T_620 : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] alignhist1 = _T_621 | _T_622; // @[Mux.scala 27:72]
+  wire [1:0] _T_633 = {f1hist0[0],f0hist0[0]}; // @[Cat.scala 29:58]
+  wire [1:0] _T_634 = f0val[1] ? f0hist0 : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] _T_635 = _T_515 ? _T_633 : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] alignhist0 = _T_634 | _T_635; // @[Mux.scala 27:72]
+  wire [30:0] _T_647 = f0val[1] ? f0pc_plus1 : 31'h0; // @[Mux.scala 27:72]
+  wire [30:0] _T_648 = _T_515 ? f1pc : 31'h0; // @[Mux.scala 27:72]
+  wire [30:0] secondpc = _T_647 | _T_648; // @[Mux.scala 27:72]
+  wire  _T_657 = first4B & alignval[1]; // @[Mux.scala 27:72]
+  wire  _T_658 = first2B & alignval[0]; // @[Mux.scala 27:72]
+  wire  _T_662 = |alignicaf; // @[el2_ifu_aln_ctl.scala 354:59]
+  wire  _T_665 = first4B & _T_662; // @[Mux.scala 27:72]
+  wire  _T_666 = first2B & alignicaf[0]; // @[Mux.scala 27:72]
+  wire  _T_671 = first4B & _T_513; // @[el2_ifu_aln_ctl.scala 356:39]
+  wire  _T_673 = _T_671 & f0val[0]; // @[el2_ifu_aln_ctl.scala 356:51]
+  wire  _T_675 = ~alignicaf[0]; // @[el2_ifu_aln_ctl.scala 356:64]
+  wire  _T_676 = _T_673 & _T_675; // @[el2_ifu_aln_ctl.scala 356:62]
+  wire  _T_678 = ~aligndbecc[0]; // @[el2_ifu_aln_ctl.scala 356:80]
+  wire  _T_679 = _T_676 & _T_678; // @[el2_ifu_aln_ctl.scala 356:78]
   wire  icaf_eff = alignicaf[1] | aligndbecc[1]; // @[el2_ifu_aln_ctl.scala 358:31]
-  wire  _T_685 = first4B & icaf_eff; // @[el2_ifu_aln_ctl.scala 360:32]
-  wire  _T_688 = |aligndbecc; // @[el2_ifu_aln_ctl.scala 362:59]
-  wire  _T_691 = first4B & _T_688; // @[Mux.scala 27:72]
-  wire  _T_692 = first2B & aligndbecc[0]; // @[Mux.scala 27:72]
-  wire [31:0] _T_697 = first4B ? aligndata : 32'h0; // @[Mux.scala 27:72]
-  wire [31:0] _T_698 = first2B ? decompressed_io_dout : 32'h0; // @[Mux.scala 27:72]
-  wire [7:0] _T_703 = f0pc[8:1] ^ f0pc[16:9]; // @[el2_lib.scala 191:46]
-  wire [7:0] firstpc_hash = _T_703 ^ f0pc[24:17]; // @[el2_lib.scala 191:84]
-  wire [7:0] _T_707 = secondpc[8:1] ^ secondpc[16:9]; // @[el2_lib.scala 191:46]
-  wire [7:0] secondpc_hash = _T_707 ^ secondpc[24:17]; // @[el2_lib.scala 191:84]
-  wire [4:0] _T_713 = f0pc[13:9] ^ f0pc[18:14]; // @[el2_lib.scala 182:111]
-  wire [4:0] firstbrtag_hash = _T_713 ^ f0pc[23:19]; // @[el2_lib.scala 182:111]
-  wire [4:0] _T_718 = secondpc[13:9] ^ secondpc[18:14]; // @[el2_lib.scala 182:111]
-  wire [4:0] secondbrtag_hash = _T_718 ^ secondpc[23:19]; // @[el2_lib.scala 182:111]
-  wire  _T_720 = first2B & alignbrend[0]; // @[el2_ifu_aln_ctl.scala 378:30]
-  wire  _T_722 = first4B & alignbrend[1]; // @[el2_ifu_aln_ctl.scala 378:58]
-  wire  _T_723 = _T_720 | _T_722; // @[el2_ifu_aln_ctl.scala 378:47]
-  wire  _T_727 = _T_658 & alignbrend[0]; // @[el2_ifu_aln_ctl.scala 378:100]
-  wire  _T_730 = first2B & alignret[0]; // @[el2_ifu_aln_ctl.scala 380:29]
-  wire  _T_732 = first4B & alignret[1]; // @[el2_ifu_aln_ctl.scala 380:55]
-  wire  _T_735 = first2B & alignpc4[0]; // @[el2_ifu_aln_ctl.scala 382:29]
-  wire  _T_737 = first4B & alignpc4[1]; // @[el2_ifu_aln_ctl.scala 382:55]
-  wire  i0_brp_pc4 = _T_735 | _T_737; // @[el2_ifu_aln_ctl.scala 382:44]
-  wire  _T_739 = first2B | alignbrend[0]; // @[el2_ifu_aln_ctl.scala 384:33]
-  wire  _T_745 = first2B & alignhist1[0]; // @[el2_ifu_aln_ctl.scala 386:34]
-  wire  _T_747 = first4B & alignhist1[1]; // @[el2_ifu_aln_ctl.scala 386:62]
-  wire  _T_748 = _T_745 | _T_747; // @[el2_ifu_aln_ctl.scala 386:51]
-  wire  _T_750 = first2B & alignhist0[0]; // @[el2_ifu_aln_ctl.scala 387:14]
-  wire  _T_752 = first4B & alignhist0[1]; // @[el2_ifu_aln_ctl.scala 387:42]
-  wire  _T_753 = _T_750 | _T_752; // @[el2_ifu_aln_ctl.scala 387:31]
-  wire  i0_ends_f1 = first4B & _T_516; // @[el2_ifu_aln_ctl.scala 389:28]
-  wire [12:0] _T_756 = i0_ends_f1 ? {{1'd0}, f1poffset} : f0poffset; // @[el2_ifu_aln_ctl.scala 390:27]
-  wire [32:0] _T_758 = i0_ends_f1 ? {{2'd0}, f1prett} : f0prett; // @[el2_ifu_aln_ctl.scala 392:25]
-  wire  _T_769 = io_i0_brp_valid & i0_brp_pc4; // @[el2_ifu_aln_ctl.scala 398:42]
-  wire  _T_770 = _T_769 & first2B; // @[el2_ifu_aln_ctl.scala 398:56]
-  wire  _T_771 = ~i0_brp_pc4; // @[el2_ifu_aln_ctl.scala 398:89]
-  wire  _T_772 = io_i0_brp_valid & _T_771; // @[el2_ifu_aln_ctl.scala 398:87]
-  wire  _T_773 = _T_772 & first4B; // @[el2_ifu_aln_ctl.scala 398:101]
+  wire  _T_684 = first4B & icaf_eff; // @[el2_ifu_aln_ctl.scala 360:32]
+  wire  _T_687 = |aligndbecc; // @[el2_ifu_aln_ctl.scala 362:59]
+  wire  _T_690 = first4B & _T_687; // @[Mux.scala 27:72]
+  wire  _T_691 = first2B & aligndbecc[0]; // @[Mux.scala 27:72]
+  wire [31:0] _T_696 = first4B ? aligndata : 32'h0; // @[Mux.scala 27:72]
+  wire [31:0] _T_697 = first2B ? decompressed_io_dout : 32'h0; // @[Mux.scala 27:72]
+  wire [7:0] _T_702 = f0pc[8:1] ^ f0pc[16:9]; // @[el2_lib.scala 191:46]
+  wire [7:0] firstpc_hash = _T_702 ^ f0pc[24:17]; // @[el2_lib.scala 191:84]
+  wire [7:0] _T_706 = secondpc[8:1] ^ secondpc[16:9]; // @[el2_lib.scala 191:46]
+  wire [7:0] secondpc_hash = _T_706 ^ secondpc[24:17]; // @[el2_lib.scala 191:84]
+  wire [4:0] _T_712 = f0pc[13:9] ^ f0pc[18:14]; // @[el2_lib.scala 182:111]
+  wire [4:0] firstbrtag_hash = _T_712 ^ f0pc[23:19]; // @[el2_lib.scala 182:111]
+  wire [4:0] _T_717 = secondpc[13:9] ^ secondpc[18:14]; // @[el2_lib.scala 182:111]
+  wire [4:0] secondbrtag_hash = _T_717 ^ secondpc[23:19]; // @[el2_lib.scala 182:111]
+  wire  _T_719 = first2B & alignbrend[0]; // @[el2_ifu_aln_ctl.scala 378:30]
+  wire  _T_721 = first4B & alignbrend[1]; // @[el2_ifu_aln_ctl.scala 378:58]
+  wire  _T_722 = _T_719 | _T_721; // @[el2_ifu_aln_ctl.scala 378:47]
+  wire  _T_726 = _T_657 & alignbrend[0]; // @[el2_ifu_aln_ctl.scala 378:100]
+  wire  _T_729 = first2B & alignret[0]; // @[el2_ifu_aln_ctl.scala 380:29]
+  wire  _T_731 = first4B & alignret[1]; // @[el2_ifu_aln_ctl.scala 380:55]
+  wire  _T_734 = first2B & alignpc4[0]; // @[el2_ifu_aln_ctl.scala 382:29]
+  wire  _T_736 = first4B & alignpc4[1]; // @[el2_ifu_aln_ctl.scala 382:55]
+  wire  i0_brp_pc4 = _T_734 | _T_736; // @[el2_ifu_aln_ctl.scala 382:44]
+  wire  _T_738 = first2B | alignbrend[0]; // @[el2_ifu_aln_ctl.scala 384:33]
+  wire  _T_744 = first2B & alignhist1[0]; // @[el2_ifu_aln_ctl.scala 386:34]
+  wire  _T_746 = first4B & alignhist1[1]; // @[el2_ifu_aln_ctl.scala 386:62]
+  wire  _T_747 = _T_744 | _T_746; // @[el2_ifu_aln_ctl.scala 386:51]
+  wire  _T_749 = first2B & alignhist0[0]; // @[el2_ifu_aln_ctl.scala 387:14]
+  wire  _T_751 = first4B & alignhist0[1]; // @[el2_ifu_aln_ctl.scala 387:42]
+  wire  _T_752 = _T_749 | _T_751; // @[el2_ifu_aln_ctl.scala 387:31]
+  wire  i0_ends_f1 = first4B & _T_515; // @[el2_ifu_aln_ctl.scala 389:28]
+  wire [12:0] _T_755 = i0_ends_f1 ? {{1'd0}, f1poffset} : f0poffset; // @[el2_ifu_aln_ctl.scala 390:27]
+  wire [32:0] _T_757 = i0_ends_f1 ? {{2'd0}, f1prett} : f0prett; // @[el2_ifu_aln_ctl.scala 392:25]
+  wire  _T_768 = io_i0_brp_valid & i0_brp_pc4; // @[el2_ifu_aln_ctl.scala 398:42]
+  wire  _T_769 = _T_768 & first2B; // @[el2_ifu_aln_ctl.scala 398:56]
+  wire  _T_770 = ~i0_brp_pc4; // @[el2_ifu_aln_ctl.scala 398:89]
+  wire  _T_771 = io_i0_brp_valid & _T_770; // @[el2_ifu_aln_ctl.scala 398:87]
+  wire  _T_772 = _T_771 & first4B; // @[el2_ifu_aln_ctl.scala 398:101]
   el2_ifu_compress_ctl decompressed ( // @[el2_ifu_aln_ctl.scala 366:28]
     .io_din(decompressed_io_din),
     .io_dout(decompressed_io_dout)
   );
-  assign io_ifu_i0_valid = _T_658 | _T_659; // @[el2_ifu_aln_ctl.scala 47:19 el2_ifu_aln_ctl.scala 352:19]
-  assign io_ifu_i0_icaf = _T_666 | _T_667; // @[el2_ifu_aln_ctl.scala 48:18 el2_ifu_aln_ctl.scala 354:18]
-  assign io_ifu_i0_icaf_type = _T_680 ? f1ictype : f0ictype; // @[el2_ifu_aln_ctl.scala 49:23 el2_ifu_aln_ctl.scala 356:23]
-  assign io_ifu_i0_icaf_f1 = _T_685 & _T_516; // @[el2_ifu_aln_ctl.scala 50:21 el2_ifu_aln_ctl.scala 360:21]
-  assign io_ifu_i0_dbecc = _T_691 | _T_692; // @[el2_ifu_aln_ctl.scala 51:19 el2_ifu_aln_ctl.scala 362:19]
-  assign io_ifu_i0_instr = _T_697 | _T_698; // @[el2_ifu_aln_ctl.scala 52:19 el2_ifu_aln_ctl.scala 368:19]
+  assign io_ifu_i0_valid = _T_657 | _T_658; // @[el2_ifu_aln_ctl.scala 47:19 el2_ifu_aln_ctl.scala 352:19]
+  assign io_ifu_i0_icaf = _T_665 | _T_666; // @[el2_ifu_aln_ctl.scala 48:18 el2_ifu_aln_ctl.scala 354:18]
+  assign io_ifu_i0_icaf_type = _T_679 ? f1ictype : f0ictype; // @[el2_ifu_aln_ctl.scala 49:23 el2_ifu_aln_ctl.scala 356:23]
+  assign io_ifu_i0_icaf_f1 = _T_684 & _T_515; // @[el2_ifu_aln_ctl.scala 50:21 el2_ifu_aln_ctl.scala 360:21]
+  assign io_ifu_i0_dbecc = _T_690 | _T_691; // @[el2_ifu_aln_ctl.scala 51:19 el2_ifu_aln_ctl.scala 362:19]
+  assign io_ifu_i0_instr = _T_696 | _T_697; // @[el2_ifu_aln_ctl.scala 52:19 el2_ifu_aln_ctl.scala 368:19]
   assign io_ifu_i0_pc = f0pc; // @[el2_ifu_aln_ctl.scala 53:16 el2_ifu_aln_ctl.scala 340:16]
   assign io_ifu_i0_pc4 = aligndata[1:0] == 2'h3; // @[el2_ifu_aln_ctl.scala 54:17 el2_ifu_aln_ctl.scala 344:17]
-  assign io_ifu_fb_consume1 = _T_313 & _T_1; // @[el2_ifu_aln_ctl.scala 55:22 el2_ifu_aln_ctl.scala 258:22]
-  assign io_ifu_fb_consume2 = _T_316 & _T_1; // @[el2_ifu_aln_ctl.scala 56:22 el2_ifu_aln_ctl.scala 259:22]
-  assign io_ifu_i0_bp_index = _T_739 ? firstpc_hash : secondpc_hash; // @[el2_ifu_aln_ctl.scala 57:22 el2_ifu_aln_ctl.scala 400:22]
+  assign io_ifu_fb_consume1 = _T_312 & _T_1; // @[el2_ifu_aln_ctl.scala 55:22 el2_ifu_aln_ctl.scala 258:22]
+  assign io_ifu_fb_consume2 = _T_315 & _T_1; // @[el2_ifu_aln_ctl.scala 56:22 el2_ifu_aln_ctl.scala 259:22]
+  assign io_ifu_i0_bp_index = _T_738 ? firstpc_hash : secondpc_hash; // @[el2_ifu_aln_ctl.scala 57:22 el2_ifu_aln_ctl.scala 400:22]
   assign io_ifu_i0_bp_fghr = i0_ends_f1 ? f1fghr : {{3'd0}, f0fghr}; // @[el2_ifu_aln_ctl.scala 58:21 el2_ifu_aln_ctl.scala 402:21]
-  assign io_ifu_i0_bp_btag = _T_739 ? firstbrtag_hash : secondbrtag_hash; // @[el2_ifu_aln_ctl.scala 59:21 el2_ifu_aln_ctl.scala 404:21]
-  assign io_ifu_pmu_instr_aligned = io_dec_i0_decode_d & _T_786; // @[el2_ifu_aln_ctl.scala 60:28 el2_ifu_aln_ctl.scala 410:28]
+  assign io_ifu_i0_bp_btag = _T_738 ? firstbrtag_hash : secondbrtag_hash; // @[el2_ifu_aln_ctl.scala 59:21 el2_ifu_aln_ctl.scala 404:21]
+  assign io_ifu_pmu_instr_aligned = io_dec_i0_decode_d & _T_785; // @[el2_ifu_aln_ctl.scala 60:28 el2_ifu_aln_ctl.scala 410:28]
   assign io_ifu_i0_cinst = aligndata[15:0]; // @[el2_ifu_aln_ctl.scala 61:19 el2_ifu_aln_ctl.scala 346:19]
-  assign io_i0_brp_valid = _T_723 | _T_727; // @[el2_ifu_aln_ctl.scala 378:19]
-  assign io_i0_brp_toffset = _T_756[11:0]; // @[el2_ifu_aln_ctl.scala 390:21]
-  assign io_i0_brp_hist = {_T_748,_T_753}; // @[el2_ifu_aln_ctl.scala 386:18]
-  assign io_i0_brp_br_error = _T_770 | _T_773; // @[el2_ifu_aln_ctl.scala 398:22]
-  assign io_i0_brp_br_start_error = _T_658 & alignbrend[0]; // @[el2_ifu_aln_ctl.scala 394:29]
-  assign io_i0_brp_bank = _T_739 ? f0pc[1] : secondpc[1]; // @[el2_ifu_aln_ctl.scala 396:29]
-  assign io_i0_brp_prett = _T_758[30:0]; // @[el2_ifu_aln_ctl.scala 392:19]
-  assign io_i0_brp_way = _T_739 ? alignway[0] : alignway[1]; // @[el2_ifu_aln_ctl.scala 384:17]
-  assign io_i0_brp_ret = _T_730 | _T_732; // @[el2_ifu_aln_ctl.scala 380:17]
+  assign io_i0_brp_valid = _T_722 | _T_726; // @[el2_ifu_aln_ctl.scala 378:19]
+  assign io_i0_brp_toffset = _T_755[11:0]; // @[el2_ifu_aln_ctl.scala 390:21]
+  assign io_i0_brp_hist = {_T_747,_T_752}; // @[el2_ifu_aln_ctl.scala 386:18]
+  assign io_i0_brp_br_error = _T_769 | _T_772; // @[el2_ifu_aln_ctl.scala 398:22]
+  assign io_i0_brp_br_start_error = _T_657 & alignbrend[0]; // @[el2_ifu_aln_ctl.scala 394:29]
+  assign io_i0_brp_bank = _T_738 ? f0pc[1] : secondpc[1]; // @[el2_ifu_aln_ctl.scala 396:29]
+  assign io_i0_brp_prett = _T_757[30:0]; // @[el2_ifu_aln_ctl.scala 392:19]
+  assign io_i0_brp_way = _T_738 ? alignway[0] : alignway[1]; // @[el2_ifu_aln_ctl.scala 384:17]
+  assign io_i0_brp_ret = _T_729 | _T_731; // @[el2_ifu_aln_ctl.scala 380:17]
   assign decompressed_io_din = aligndata[15:0]; // @[el2_ifu_aln_ctl.scala 406:23]
 `ifdef RANDOMIZE_GARBAGE_ASSIGN
 `define RANDOMIZE
diff --git a/src/main/scala/ifu/el2_ifu_aln_ctl.scala b/src/main/scala/ifu/el2_ifu_aln_ctl.scala
index cedf5903..9db2c6ee 100644
--- a/src/main/scala/ifu/el2_ifu_aln_ctl.scala
+++ b/src/main/scala/ifu/el2_ifu_aln_ctl.scala
@@ -13,7 +13,7 @@ class el2_ifu_aln_ctl extends Module with el2_lib {
     val ic_access_fault_f       = Input(Bool())
     val ic_access_fault_type_f  = Input(UInt(2.W))
     val ifu_bp_fghr_f           = Input(UInt(BHT_GHR_SIZE.W))
-    val ifu_bp_btb_target_f     = Input(UInt(32.W))
+    val ifu_bp_btb_target_f     = Input(UInt(31.W))
     val ifu_bp_poffset_f        = Input(UInt(12.W))
     val ifu_bp_hist0_f          = Input(UInt(2.W))
     val ifu_bp_hist1_f          = Input(UInt(2.W))
@@ -196,7 +196,7 @@ class el2_ifu_aln_ctl extends Module with el2_lib {
   val q1sel = Cat(q1ptr, !q1ptr)
 
   misc_data_in := Cat(io.iccm_rd_ecc_double_err, io.ic_access_fault_f, io.ic_access_fault_type_f,
-    io.ifu_bp_btb_target_f(31,1), io.ifu_bp_poffset_f, io.ifu_bp_fghr_f)
+    io.ifu_bp_btb_target_f, io.ifu_bp_poffset_f, io.ifu_bp_fghr_f)
 
   val misceff = Mux1H(Seq(qren(0).asBool() -> Cat(misc1, misc0),
     qren(1).asBool()->Cat(misc2, misc1),
diff --git a/target/scala-2.12/classes/ifu/el2_ifu_aln_ctl$$anon$1.class b/target/scala-2.12/classes/ifu/el2_ifu_aln_ctl$$anon$1.class
index 37cf7c9f..18f942c6 100644
Binary files a/target/scala-2.12/classes/ifu/el2_ifu_aln_ctl$$anon$1.class and b/target/scala-2.12/classes/ifu/el2_ifu_aln_ctl$$anon$1.class differ
diff --git a/target/scala-2.12/classes/ifu/el2_ifu_aln_ctl.class b/target/scala-2.12/classes/ifu/el2_ifu_aln_ctl.class
index 85ee9987..39849059 100644
Binary files a/target/scala-2.12/classes/ifu/el2_ifu_aln_ctl.class and b/target/scala-2.12/classes/ifu/el2_ifu_aln_ctl.class differ